Git-Mirrors/tillitis-key
1
0
Fork 0
mirror of https://github.com/tillitis/tillitis-key1.git synced 2025-05-02 22:25:00 -04:00
Code Issues Projects Releases Packages Wiki Activity

Merge branch 'pll'

Browse source
This commit is contained in:
Joachim Strömbergson 2022-09-30 10:06:48 +02:00
commit 1aa2d7bd95
4 changed files with 52 additions and 26 deletions
Download patch file Download diff file Expand all files Collapse all files

17
hw/application_fpga/rtl/application_fpga.v
View file

@ -139,24 +139,11 @@ module application_fpga(
wire fw_app_mode;
//----------------------------------------------------------------
// Concurrent assignments.
//----------------------------------------------------------------
//----------------------------------------------------------------
// Module instantiations.
//----------------------------------------------------------------
// Use the FPGA internal High Frequency OSCillator as clock source.
// 00: 48MHz, 01: 24MHz, 10: 12MHz, 11: 6MHz
/* verilator lint_off PINMISSING */
SB_HFOSC #(.CLKHF_DIV("0b10")
) u_hfosc (.CLKHFPU(1'b1),.CLKHFEN(1'b1),.CLKHF(clk));
/* verilator lint_on PINMISSING */
reset_gen #(.RESET_CYCLES(200))
reset_gen_inst(.clk(clk), .rst_n(reset_n));
clk_reset_gen #(.RESET_CYCLES(200))
reset_gen_inst(.clk(clk), .rst_n(reset_n));
picorv32 #(