2022-09-19 02:51:11 -04:00
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/*
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2023-01-30 04:33:02 -05:00
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* Copyright (C) 2022, 2023 - Tillitis AB
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2022-09-19 02:51:11 -04:00
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* SPDX-License-Identifier: GPL-2.0-only
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*/
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2022-10-20 08:50:21 -04:00
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#include "../tk1_mem.h"
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2023-02-27 11:11:03 -05:00
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#include "assert.h"
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2022-09-19 02:51:11 -04:00
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#include "blake2s/blake2s.h"
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#include "lib.h"
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#include "proto.h"
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2023-03-09 08:11:43 -05:00
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#include "state.h"
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2022-09-19 02:51:11 -04:00
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#include "types.h"
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// clang-format off
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2022-12-09 11:34:17 -05:00
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static volatile uint32_t *uds = (volatile uint32_t *)TK1_MMIO_UDS_FIRST;
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static volatile uint32_t *switch_app = (volatile uint32_t *)TK1_MMIO_TK1_SWITCH_APP;
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static volatile uint32_t *name0 = (volatile uint32_t *)TK1_MMIO_TK1_NAME0;
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static volatile uint32_t *name1 = (volatile uint32_t *)TK1_MMIO_TK1_NAME1;
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static volatile uint32_t *ver = (volatile uint32_t *)TK1_MMIO_TK1_VERSION;
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static volatile uint32_t *udi = (volatile uint32_t *)TK1_MMIO_TK1_UDI_FIRST;
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static volatile uint32_t *cdi = (volatile uint32_t *)TK1_MMIO_TK1_CDI_FIRST;
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static volatile uint32_t *app_addr = (volatile uint32_t *)TK1_MMIO_TK1_APP_ADDR;
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static volatile uint32_t *app_size = (volatile uint32_t *)TK1_MMIO_TK1_APP_SIZE;
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static volatile uint32_t *fw_blake2s_addr = (volatile uint32_t *)TK1_MMIO_TK1_BLAKE2S;
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2022-12-12 09:58:46 -05:00
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static volatile uint32_t *trng_status = (volatile uint32_t *)TK1_MMIO_TRNG_STATUS;
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static volatile uint32_t *trng_entropy = (volatile uint32_t *)TK1_MMIO_TRNG_ENTROPY;
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static volatile uint32_t *timer = (volatile uint32_t *)TK1_MMIO_TIMER_TIMER;
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static volatile uint32_t *timer_prescaler = (volatile uint32_t *)TK1_MMIO_TIMER_PRESCALER;
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static volatile uint32_t *timer_status = (volatile uint32_t *)TK1_MMIO_TIMER_STATUS;
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static volatile uint32_t *timer_ctrl = (volatile uint32_t *)TK1_MMIO_TIMER_CTRL;
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2024-03-18 10:57:55 -04:00
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static volatile uint32_t *ram_rand = (volatile uint32_t *)TK1_MMIO_TK1_RAM_ADDR_RAND;
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2023-03-09 02:47:53 -05:00
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static volatile uint32_t *ram_scramble = (volatile uint32_t *)TK1_MMIO_TK1_RAM_SCRAMBLE;
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2022-10-06 10:00:33 -04:00
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// clang-format on
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2022-09-19 02:51:11 -04:00
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2023-03-09 09:00:16 -05:00
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// Context for the loading of a TKey program
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struct context {
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2023-03-21 09:11:08 -04:00
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uint32_t left; // Bytes left to receive
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2023-03-09 09:00:16 -05:00
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uint8_t digest[32]; // Program digest
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uint8_t *loadaddr; // Where we are currently loading a TKey program
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uint8_t use_uss; // Use USS?
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uint8_t uss[32]; // User Supplied Secret, if any
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};
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2024-03-04 09:53:12 -05:00
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static void print_hw_version(void);
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2023-03-10 06:14:25 -05:00
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static void print_digest(uint8_t *md);
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2024-03-04 09:53:12 -05:00
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static uint32_t rnd_word(void);
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2023-03-21 09:11:08 -04:00
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static void compute_cdi(const uint8_t *digest, const uint8_t use_uss,
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const uint8_t *uss);
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2023-03-10 06:14:25 -05:00
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static void copy_name(uint8_t *buf, const size_t bufsiz, const uint32_t word);
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static enum state initial_commands(const struct frame_header *hdr,
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const uint8_t *cmd, enum state state,
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struct context *ctx);
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static enum state loading_commands(const struct frame_header *hdr,
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const uint8_t *cmd, enum state state,
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struct context *ctx);
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static void run(const struct context *ctx);
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2024-04-04 09:27:31 -04:00
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static uint32_t xorwow(uint32_t state, uint32_t acc);
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2024-03-04 09:53:12 -05:00
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static void scramble_ram(void);
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2023-03-10 06:14:25 -05:00
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2024-03-04 09:53:12 -05:00
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static void print_hw_version(void)
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2022-09-19 02:51:11 -04:00
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{
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2023-03-09 11:09:23 -05:00
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htif_puts("Hello, I'm firmware with");
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htif_puts(" tk1_name0:");
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htif_putinthex(*name0);
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htif_puts(" tk1_name1:");
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htif_putinthex(*name1);
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htif_puts(" tk1_version:");
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htif_putinthex(*ver);
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2022-12-02 09:09:10 -05:00
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htif_lf();
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2022-11-25 08:00:53 -05:00
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}
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2022-09-19 02:51:11 -04:00
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static void print_digest(uint8_t *md)
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{
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2022-12-02 09:09:10 -05:00
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htif_puts("The app digest:\n");
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2022-09-19 02:51:11 -04:00
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for (int j = 0; j < 4; j++) {
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for (int i = 0; i < 8; i++) {
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2022-12-02 09:09:10 -05:00
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htif_puthex(md[i + 8 * j]);
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2022-09-19 02:51:11 -04:00
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}
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2022-12-02 09:09:10 -05:00
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htif_lf();
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2022-09-19 02:51:11 -04:00
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}
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2022-12-02 09:09:10 -05:00
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htif_lf();
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2022-09-19 02:51:11 -04:00
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}
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2024-03-04 09:53:12 -05:00
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static uint32_t rnd_word(void)
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2023-03-09 02:47:53 -05:00
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{
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while ((*trng_status & (1 << TK1_MMIO_TRNG_STATUS_READY_BIT)) == 0) {
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}
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return *trng_entropy;
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}
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2022-10-13 09:18:09 -04:00
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// CDI = blake2s(uds, blake2s(app), uss)
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2023-03-21 09:11:08 -04:00
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static void compute_cdi(const uint8_t *digest, const uint8_t use_uss,
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const uint8_t *uss)
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2022-10-13 09:18:09 -04:00
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{
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2024-03-21 07:32:08 -04:00
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uint32_t local_uds[8] = {0};
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uint32_t local_cdi[8] = {0};
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2023-03-16 08:51:24 -04:00
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blake2s_ctx secure_ctx = {0};
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uint32_t rnd_sleep = 0;
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int blake2err = 0;
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2022-10-13 09:18:09 -04:00
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2023-03-01 09:10:27 -05:00
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// Prepare to sleep a random number of cycles before reading out UDS
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2022-12-12 09:58:46 -05:00
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*timer_prescaler = 1;
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2023-03-16 08:17:42 -04:00
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rnd_sleep = rnd_word();
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2022-12-12 09:58:46 -05:00
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// Up to 65536 cycles
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2023-03-16 08:17:42 -04:00
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rnd_sleep &= 0xffff;
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2023-03-21 09:11:08 -04:00
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*timer = (uint32_t)(rnd_sleep == 0 ? 1 : rnd_sleep);
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2023-01-30 04:33:02 -05:00
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*timer_ctrl = (1 << TK1_MMIO_TIMER_CTRL_START_BIT);
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while (*timer_status & (1 << TK1_MMIO_TIMER_STATUS_RUNNING_BIT)) {
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2022-12-12 09:58:46 -05:00
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}
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2023-03-09 10:08:51 -05:00
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blake2err = blake2s_init(&secure_ctx, 32, NULL, 0);
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2023-03-01 09:10:27 -05:00
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assert(blake2err == 0);
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// Update hash with UDS. This means UDS will live for a short
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2023-03-02 12:20:28 -05:00
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// while on the firmware stack which is in the special fw_ram.
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2023-03-27 08:57:58 -04:00
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wordcpy_s(local_uds, 8, (void *)uds, 8);
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blake2s_update(&secure_ctx, (const void *)local_uds, 32);
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2024-02-02 08:20:21 -05:00
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(void)secure_wipe(local_uds, sizeof(local_uds));
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2023-03-01 09:10:27 -05:00
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// Update with TKey program digest
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2023-03-02 12:20:28 -05:00
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blake2s_update(&secure_ctx, digest, 32);
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2023-03-01 09:10:27 -05:00
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// Possibly hash in the USS as well
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2022-11-03 06:30:00 -04:00
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if (use_uss != 0) {
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2023-03-02 12:20:28 -05:00
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blake2s_update(&secure_ctx, uss, 32);
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2022-11-03 06:30:00 -04:00
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}
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2022-10-13 09:18:09 -04:00
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2023-03-01 09:10:27 -05:00
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// Write hashed result to Compound Device Identity (CDI)
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2023-03-21 09:11:08 -04:00
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blake2s_final(&secure_ctx, &local_cdi);
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2022-10-13 09:18:09 -04:00
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2023-03-16 08:30:56 -04:00
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// Clear secure_ctx of any residue of UDS. Don't want to keep
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// that for long even though fw_ram is cleared later.
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2024-02-02 08:20:21 -05:00
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(void)secure_wipe(&secure_ctx, sizeof(secure_ctx));
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2022-10-13 09:18:09 -04:00
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2023-03-01 09:10:27 -05:00
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// CDI only word writable
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2023-03-21 09:11:08 -04:00
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wordcpy_s((void *)cdi, 8, &local_cdi, 8);
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2022-10-13 09:18:09 -04:00
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}
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2023-03-09 11:09:23 -05:00
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static void copy_name(uint8_t *buf, const size_t bufsiz, const uint32_t word)
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{
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assert(bufsiz >= 4);
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buf[0] = word >> 24;
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buf[1] = word >> 16;
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buf[2] = word >> 8;
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buf[3] = word;
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}
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2023-03-10 01:41:28 -05:00
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static enum state initial_commands(const struct frame_header *hdr,
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const uint8_t *cmd, enum state state,
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struct context *ctx)
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2023-03-09 09:00:16 -05:00
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{
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uint8_t rsp[CMDLEN_MAXBYTES] = {0};
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switch (cmd[0]) {
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2023-03-09 11:09:23 -05:00
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case FW_CMD_NAME_VERSION:
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2023-03-09 09:00:16 -05:00
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htif_puts("cmd: name-version\n");
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if (hdr->len != 1) {
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2023-03-09 10:33:48 -05:00
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// Bad length
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2023-03-10 01:41:28 -05:00
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state = FW_STATE_FAIL;
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break;
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2023-03-09 09:00:16 -05:00
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}
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2023-03-09 11:09:23 -05:00
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copy_name(rsp, CMDLEN_MAXBYTES, *name0);
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copy_name(&rsp[4], CMDLEN_MAXBYTES - 4, *name1);
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wordcpy_s(&rsp[8], CMDLEN_MAXBYTES / 4 - 2, (void *)ver, 1);
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2023-03-09 09:00:16 -05:00
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fwreply(*hdr, FW_RSP_NAME_VERSION, rsp);
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2023-03-10 01:41:28 -05:00
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// still initial state
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2023-03-09 11:09:23 -05:00
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break;
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2023-03-09 09:00:16 -05:00
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2023-03-09 10:08:51 -05:00
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case FW_CMD_GET_UDI: {
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uint32_t udi_words[2];
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2023-03-09 09:00:16 -05:00
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htif_puts("cmd: get-udi\n");
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if (hdr->len != 1) {
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2023-03-09 10:33:48 -05:00
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// Bad length
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2023-03-10 01:41:28 -05:00
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state = FW_STATE_FAIL;
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break;
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2023-03-09 09:00:16 -05:00
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}
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rsp[0] = STATUS_OK;
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2023-03-21 09:11:08 -04:00
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wordcpy_s(&udi_words, 2, (void *)udi, 2);
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memcpy_s(&rsp[1], CMDLEN_MAXBYTES - 1, &udi_words, 2 * 4);
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2023-03-09 09:00:16 -05:00
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fwreply(*hdr, FW_RSP_GET_UDI, rsp);
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2023-03-10 01:41:28 -05:00
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// still initial state
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break;
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}
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2023-03-09 10:08:51 -05:00
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case FW_CMD_LOAD_APP: {
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uint32_t local_app_size;
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2023-03-09 09:00:16 -05:00
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htif_puts("cmd: load-app(size, uss)\n");
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2023-03-24 06:47:30 -04:00
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if (hdr->len != 128) {
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2023-03-09 09:00:16 -05:00
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// Bad length
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2023-03-10 01:41:28 -05:00
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state = FW_STATE_FAIL;
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break;
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2023-03-09 09:00:16 -05:00
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}
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// cmd[1..4] contains the size.
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2023-03-09 10:08:51 -05:00
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local_app_size =
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2023-03-09 09:00:16 -05:00
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cmd[1] + (cmd[2] << 8) + (cmd[3] << 16) + (cmd[4] << 24);
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htif_puts("app size: ");
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htif_putinthex(local_app_size);
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htif_lf();
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if (local_app_size == 0 || local_app_size > TK1_APP_MAX_SIZE) {
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rsp[0] = STATUS_BAD;
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fwreply(*hdr, FW_RSP_LOAD_APP, rsp);
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2023-03-10 01:41:28 -05:00
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// still initial state
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break;
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2023-03-09 09:00:16 -05:00
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}
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*app_size = local_app_size;
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// Do we have a USS at all?
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if (cmd[5] != 0) {
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// Yes
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ctx->use_uss = TRUE;
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memcpy_s(ctx->uss, 32, &cmd[6], 32);
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} else {
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ctx->use_uss = FALSE;
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}
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rsp[0] = STATUS_OK;
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fwreply(*hdr, FW_RSP_LOAD_APP, rsp);
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assert(*app_size != 0);
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assert(*app_size <= TK1_APP_MAX_SIZE);
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ctx->left = *app_size;
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2023-03-10 01:41:28 -05:00
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state = FW_STATE_LOADING;
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break;
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}
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2023-03-09 09:00:16 -05:00
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default:
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htif_puts("Got unknown firmware cmd: 0x");
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htif_puthex(cmd[0]);
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htif_lf();
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2023-03-10 01:41:28 -05:00
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state = FW_STATE_FAIL;
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break;
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2023-03-09 09:00:16 -05:00
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}
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2023-03-10 01:41:28 -05:00
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return state;
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2023-03-09 09:00:16 -05:00
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}
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2023-03-10 01:41:28 -05:00
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static enum state loading_commands(const struct frame_header *hdr,
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const uint8_t *cmd, enum state state,
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struct context *ctx)
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2023-03-09 09:00:16 -05:00
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{
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uint8_t rsp[CMDLEN_MAXBYTES] = {0};
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2023-03-21 09:11:08 -04:00
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uint32_t nbytes = 0;
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2023-03-09 09:00:16 -05:00
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switch (cmd[0]) {
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case FW_CMD_LOAD_APP_DATA:
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htif_puts("cmd: load-app-data\n");
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2023-03-24 06:47:30 -04:00
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if (hdr->len != 128) {
|
2023-03-09 10:33:48 -05:00
|
|
|
// Bad length
|
2023-03-10 01:41:28 -05:00
|
|
|
state = FW_STATE_FAIL;
|
|
|
|
break;
|
2023-03-09 09:00:16 -05:00
|
|
|
}
|
|
|
|
|
2023-03-24 06:47:30 -04:00
|
|
|
if (ctx->left > (128 - 1)) {
|
|
|
|
nbytes = 128 - 1;
|
2023-03-09 09:00:16 -05:00
|
|
|
} else {
|
|
|
|
nbytes = ctx->left;
|
|
|
|
}
|
|
|
|
memcpy_s(ctx->loadaddr, ctx->left, cmd + 1, nbytes);
|
2024-03-21 07:32:08 -04:00
|
|
|
/*@-mustfreeonly@*/
|
2023-03-09 09:00:16 -05:00
|
|
|
ctx->loadaddr += nbytes;
|
2024-03-21 07:32:08 -04:00
|
|
|
/*@+mustfreeonly@*/
|
2023-03-09 09:00:16 -05:00
|
|
|
ctx->left -= nbytes;
|
|
|
|
|
|
|
|
if (ctx->left == 0) {
|
2023-03-21 09:11:08 -04:00
|
|
|
blake2s_ctx b2s_ctx = {0};
|
|
|
|
int blake2err = 0;
|
|
|
|
|
2023-03-09 09:00:16 -05:00
|
|
|
htif_puts("Fully loaded ");
|
|
|
|
htif_putinthex(*app_size);
|
|
|
|
htif_lf();
|
|
|
|
|
|
|
|
// Compute Blake2S digest of the app,
|
|
|
|
// storing it for FW_STATE_RUN
|
2023-03-21 09:11:08 -04:00
|
|
|
blake2err = blake2s(&ctx->digest, 32, NULL, 0,
|
|
|
|
(const void *)TK1_RAM_BASE,
|
|
|
|
*app_size, &b2s_ctx);
|
|
|
|
assert(blake2err == 0);
|
2023-03-09 09:00:16 -05:00
|
|
|
print_digest(ctx->digest);
|
|
|
|
|
|
|
|
// And return the digest in final
|
|
|
|
// response
|
|
|
|
rsp[0] = STATUS_OK;
|
|
|
|
memcpy_s(&rsp[1], CMDLEN_MAXBYTES - 1, &ctx->digest,
|
|
|
|
32);
|
|
|
|
fwreply(*hdr, FW_RSP_LOAD_APP_DATA_READY, rsp);
|
|
|
|
|
2023-03-10 01:41:28 -05:00
|
|
|
state = FW_STATE_RUN;
|
|
|
|
break;
|
2023-03-09 09:00:16 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
rsp[0] = STATUS_OK;
|
|
|
|
fwreply(*hdr, FW_RSP_LOAD_APP_DATA, rsp);
|
2023-03-10 01:41:28 -05:00
|
|
|
// still loading state
|
2023-03-09 09:00:16 -05:00
|
|
|
break;
|
|
|
|
|
|
|
|
default:
|
|
|
|
htif_puts("Got unknown firmware cmd: 0x");
|
|
|
|
htif_puthex(cmd[0]);
|
|
|
|
htif_lf();
|
2023-03-10 01:41:28 -05:00
|
|
|
state = FW_STATE_FAIL;
|
|
|
|
break;
|
2023-03-09 09:00:16 -05:00
|
|
|
}
|
|
|
|
|
|
|
|
return state;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void run(const struct context *ctx)
|
|
|
|
{
|
|
|
|
*app_addr = TK1_RAM_BASE;
|
|
|
|
|
|
|
|
// CDI = hash(uds, hash(app), uss)
|
|
|
|
compute_cdi(ctx->digest, ctx->use_uss, ctx->uss);
|
|
|
|
|
|
|
|
htif_puts("Flipping to app mode!\n");
|
|
|
|
htif_puts("Jumping to ");
|
|
|
|
htif_putinthex(*app_addr);
|
|
|
|
htif_lf();
|
|
|
|
|
|
|
|
// Clear the firmware stack
|
|
|
|
// clang-format off
|
2023-03-21 09:11:08 -04:00
|
|
|
#ifndef S_SPLINT_S
|
2023-03-09 09:00:16 -05:00
|
|
|
asm volatile(
|
|
|
|
"li a0, 0xd0000000;" // FW_RAM
|
|
|
|
"li a1, 0xd0000800;" // End of 2 KB FW_RAM (just past the end)
|
|
|
|
"loop:;"
|
|
|
|
"sw zero, 0(a0);"
|
|
|
|
"addi a0, a0, 4;"
|
|
|
|
"blt a0, a1, loop;"
|
|
|
|
::: "memory");
|
2023-03-21 09:11:08 -04:00
|
|
|
#endif
|
2023-03-09 09:00:16 -05:00
|
|
|
// clang-format on
|
|
|
|
|
|
|
|
// Flip over to application mode
|
|
|
|
*switch_app = 1;
|
|
|
|
|
|
|
|
// XXX Firmware stack now no longer available
|
|
|
|
// Don't use any function calls!
|
|
|
|
|
|
|
|
// Jump to app - doesn't return
|
|
|
|
// clang-format off
|
2023-03-21 09:11:08 -04:00
|
|
|
#ifndef S_SPLINT_S
|
2023-03-09 09:00:16 -05:00
|
|
|
asm volatile(
|
|
|
|
// Get value at TK1_MMIO_TK1_APP_ADDR
|
|
|
|
"lui a0,0xff000;"
|
|
|
|
"lw a0,0x030(a0);"
|
|
|
|
// Jump to it
|
|
|
|
"jalr x0,0(a0);"
|
|
|
|
::: "memory");
|
2023-03-21 09:11:08 -04:00
|
|
|
#endif
|
2023-03-09 09:00:16 -05:00
|
|
|
// clang-format on
|
|
|
|
|
|
|
|
__builtin_unreachable();
|
|
|
|
}
|
|
|
|
|
2024-04-04 09:27:31 -04:00
|
|
|
static uint32_t xorwow(uint32_t state, uint32_t acc)
|
|
|
|
{
|
|
|
|
state ^= state << 13;
|
|
|
|
state ^= state >> 17;
|
|
|
|
state ^= state << 5;
|
|
|
|
state += acc;
|
|
|
|
return state;
|
|
|
|
}
|
|
|
|
|
2024-03-04 09:53:12 -05:00
|
|
|
static void scramble_ram(void)
|
2022-09-19 02:51:11 -04:00
|
|
|
{
|
2023-03-09 09:50:55 -05:00
|
|
|
uint32_t *ram = (uint32_t *)(TK1_RAM_BASE);
|
|
|
|
|
2023-03-09 02:47:53 -05:00
|
|
|
// Set RAM address and data scrambling values
|
2024-03-18 10:57:55 -04:00
|
|
|
*ram_rand = rnd_word();
|
2023-03-09 02:47:53 -05:00
|
|
|
*ram_scramble = rnd_word();
|
|
|
|
|
2024-04-04 09:27:31 -04:00
|
|
|
// Fill RAM with random data
|
|
|
|
// Get random state and accumulator seeds.
|
|
|
|
uint32_t data_state = rnd_word();
|
|
|
|
uint32_t data_acc = rnd_word();
|
|
|
|
|
2023-03-09 02:47:53 -05:00
|
|
|
for (uint32_t w = 0; w < TK1_RAM_SIZE / 4; w++) {
|
2024-04-04 09:27:31 -04:00
|
|
|
data_state = xorwow(data_state, data_acc);
|
|
|
|
ram[w] = data_state;
|
2023-03-09 02:47:53 -05:00
|
|
|
}
|
|
|
|
|
2024-04-04 09:27:31 -04:00
|
|
|
// Set new address and RAM scrambling values,
|
|
|
|
// for all use of RAM by app.
|
2024-03-18 10:57:55 -04:00
|
|
|
*ram_rand = rnd_word();
|
2023-03-09 02:47:53 -05:00
|
|
|
*ram_scramble = rnd_word();
|
2023-03-09 09:50:55 -05:00
|
|
|
}
|
2023-03-09 02:47:53 -05:00
|
|
|
|
2024-03-04 09:53:12 -05:00
|
|
|
int main(void)
|
2023-03-09 09:50:55 -05:00
|
|
|
{
|
2023-03-09 09:00:16 -05:00
|
|
|
struct context ctx = {0};
|
2023-03-16 08:51:24 -04:00
|
|
|
struct frame_header hdr = {0};
|
|
|
|
uint8_t cmd[CMDLEN_MAXBYTES] = {0};
|
2022-11-03 06:30:00 -04:00
|
|
|
enum state state = FW_STATE_INITIAL;
|
2023-03-09 09:50:55 -05:00
|
|
|
|
2023-03-09 11:09:23 -05:00
|
|
|
print_hw_version();
|
|
|
|
|
2022-12-09 11:34:17 -05:00
|
|
|
// Let the app know the function adddress for blake2s()
|
|
|
|
*fw_blake2s_addr = (uint32_t)blake2s;
|
2023-03-09 09:00:16 -05:00
|
|
|
|
2024-03-21 07:32:08 -04:00
|
|
|
/*@-mustfreeonly@*/
|
|
|
|
/* Yes, splint, this points directly to RAM and we don't care
|
|
|
|
* about freeing anything was pointing to 0x0 before.
|
|
|
|
*/
|
2023-03-09 09:00:16 -05:00
|
|
|
ctx.loadaddr = (uint8_t *)TK1_RAM_BASE;
|
2024-03-21 07:32:08 -04:00
|
|
|
/*@+mustfreeonly@*/
|
2023-03-09 09:00:16 -05:00
|
|
|
ctx.use_uss = FALSE;
|
2022-09-19 02:51:11 -04:00
|
|
|
|
2023-03-09 09:50:55 -05:00
|
|
|
scramble_ram();
|
|
|
|
|
2022-09-19 02:51:11 -04:00
|
|
|
for (;;) {
|
2022-11-03 06:30:00 -04:00
|
|
|
switch (state) {
|
|
|
|
case FW_STATE_INITIAL:
|
2023-03-09 08:11:43 -05:00
|
|
|
if (readcommand(&hdr, cmd, state) == -1) {
|
|
|
|
state = FW_STATE_FAIL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2023-03-09 09:00:16 -05:00
|
|
|
state = initial_commands(&hdr, cmd, state, &ctx);
|
2022-11-03 06:30:00 -04:00
|
|
|
break;
|
|
|
|
|
|
|
|
case FW_STATE_LOADING:
|
2023-03-09 08:11:43 -05:00
|
|
|
if (readcommand(&hdr, cmd, state) == -1) {
|
|
|
|
state = FW_STATE_FAIL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
2023-03-09 09:00:16 -05:00
|
|
|
state = loading_commands(&hdr, cmd, state, &ctx);
|
2022-11-03 06:30:00 -04:00
|
|
|
break;
|
|
|
|
|
|
|
|
case FW_STATE_RUN:
|
2023-03-09 09:00:16 -05:00
|
|
|
run(&ctx);
|
2022-11-03 06:30:00 -04:00
|
|
|
break; // This is never reached!
|
|
|
|
|
2023-03-07 09:08:24 -05:00
|
|
|
case FW_STATE_FAIL:
|
|
|
|
// fallthrough
|
2022-11-03 06:30:00 -04:00
|
|
|
default:
|
2023-03-07 09:08:24 -05:00
|
|
|
htif_puts("firmware state 0x");
|
2022-12-02 09:09:10 -05:00
|
|
|
htif_puthex(state);
|
|
|
|
htif_lf();
|
2024-03-14 10:07:42 -04:00
|
|
|
assert(1 == 2);
|
2022-11-03 06:30:00 -04:00
|
|
|
break; // Not reached
|
|
|
|
}
|
2022-09-19 02:51:11 -04:00
|
|
|
}
|
|
|
|
|
2024-03-21 07:32:08 -04:00
|
|
|
/*@ -compdestroy @*/
|
|
|
|
/* We don't care about memory leaks here. */
|
2022-09-19 02:51:11 -04:00
|
|
|
return (int)0xcafebabe;
|
|
|
|
}
|