tillitis-key/hw/application_fpga
2024-06-11 15:28:29 +02:00
..
core Adding testbench and simulation targets for the SPI master. 2024-06-11 15:28:29 +02:00
data A construction of a minimal SPI master. 2024-06-11 15:28:29 +02:00
fw A construction of a minimal SPI master. 2024-06-11 15:28:29 +02:00
rtl A construction of a minimal SPI master. 2024-06-11 15:28:29 +02:00
tb Rename to TK1 2022-10-26 09:20:02 +02:00
tools hw/tool: UDI/UDS storage 2024-04-03 11:27:00 +02:00
application_fpga.bin.sha256 Fill RAM with random data using xorwow. 2024-06-11 11:15:00 +02:00
config.vlt Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal 2023-03-01 13:37:31 +01:00
firmware.bin.sha512 Fill RAM with random data using xorwow. 2024-06-11 11:15:00 +02:00
Makefile A construction of a minimal SPI master. 2024-06-11 15:28:29 +02:00