10 Commits

Author	SHA1	Message	Date
Jared Boone	1eb6f10fa6	CPLD: Finish the job of renaming MCU_LCD_(RD|WR). ... Caused issue #114, presumably due to RDX being assigned to an unused pin, which was pulled high, and was therefore never asserted.	2017-08-11 14:59:48 -07:00
Jared Boone	8916550e9e	CPLD: Enable PCI_IO clamp, unnecessary for LCD_BACKLIGHT signal.	2017-07-20 16:35:17 -07:00
Jared Boone	751ae92509	CPLD: Switch sense of LCD_RD/WR pins. ... Should keep CPLD settled when in HackRF mode.	2017-07-20 16:33:55 -07:00
Jared Boone	8bc878c5e5	CPLD: Update 20150901 bitstream due to Makefile changes. ... Not sure if any changes have actual significance, but...	2017-07-18 22:08:49 -07:00
Jared Boone	f4744e651b	CPLD: Match 20150901 constraints to newer project.	2017-07-17 16:50:26 -07:00
Jared Boone	b3c21c3762	CPLD: Ask Quartus to use maximum number of processors.	2017-06-13 21:21:25 -07:00
Jared Boone	9a0fa128c0	CPLD: Clean up *.qws files.	2017-06-13 21:20:19 -07:00
Jared Boone	797e63a590	CPLD: Use correct bitstream for updating hardware. ... Determine hardware version and use one of two CPLD bitstream files.	2017-05-31 22:28:07 -07:00
Jared Boone	73d62367d1	CPLD: Makefiles for both hardware variants.	2017-05-31 21:05:47 -07:00
Jared Boone	0fd52a7483	CPLD: Move HDL project to hardware revision-specific directory.	2017-05-31 11:50:59 -07:00