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JTAG: Add functions to check EEPROM, load SRAM of HackRF CPLD.
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@ -21,11 +21,14 @@
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#include "cpld_update.hpp"
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#include "hackrf_gpio.hpp"
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#include "portapack_hal.hpp"
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#include "jtag_target_gpio.hpp"
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#include "cpld_max5.hpp"
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#include "cpld_xilinx.hpp"
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#include "portapack_cpld_data.hpp"
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#include "hackrf_cpld_data.hpp"
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bool cpld_update_if_necessary() {
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jtag::GPIOTarget target {
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@ -82,3 +85,31 @@ bool cpld_update_if_necessary() {
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return ok;
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}
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static jtag::GPIOTarget jtag_target_hackrf() {
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return {
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hackrf::one::gpio_cpld_tck,
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hackrf::one::gpio_cpld_tms,
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hackrf::one::gpio_cpld_tdi,
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hackrf::one::gpio_cpld_tdo,
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};
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}
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bool cpld_hackrf_load_sram() {
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auto jtag_target_hackrf_cpld = jtag_target_hackrf();
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cpld::xilinx::XC2C64A hackrf_cpld { jtag_target_hackrf_cpld };
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hackrf_cpld.write_sram(hackrf::one::cpld::verify_blocks);
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const auto ok = hackrf_cpld.verify_sram(hackrf::one::cpld::verify_blocks);
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return ok;
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}
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bool cpld_hackrf_verify_eeprom() {
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auto jtag_target_hackrf_cpld = jtag_target_hackrf();
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cpld::xilinx::XC2C64A hackrf_cpld { jtag_target_hackrf_cpld };
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const auto ok = hackrf_cpld.verify_eeprom(hackrf::one::cpld::verify_blocks);
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return ok;
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}
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@ -24,4 +24,7 @@
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bool cpld_update_if_necessary();
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bool cpld_hackrf_load_sram();
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bool cpld_hackrf_verify_eeprom();
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#endif/*__CPLD_UPDATE_H__*/
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