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https://github.com/eried/portapack-mayhem.git
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Adding_TX_IQ_phase_Calibration_to_Mic_App (#1843)
* Adding_TX_IQ_phase_Calibration_to_Mic_App * Adding_persistent_CAL_data_and_correct_init_data
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@ -31,6 +31,7 @@
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#include "tonesets.hpp"
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#include "ui_tone_key.hpp"
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#include "wm8731.hpp"
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#include "radio.hpp"
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#include <cstring>
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@ -336,6 +337,7 @@ MicTXView::MicTXView(
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&field_rxlna,
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&field_rxvga,
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&field_rxamp,
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hackrf_r9 ? &field_tx_iq_phase_cal_2839 : &field_tx_iq_phase_cal_2837,
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&tx_button,
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&tx_icon});
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@ -368,6 +370,21 @@ MicTXView::MicTXView(
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receiver_model.set_rf_amp(v);
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};
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radio::set_tx_max283x_iq_phase_calibration(iq_phase_calibration_value);
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if (hackrf_r9) { // MAX2839 has 6 bits IQ CAL phasse adjustment.
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field_tx_iq_phase_cal_2839.set_value(iq_phase_calibration_value);
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field_tx_iq_phase_cal_2839.on_change = [this](int32_t v) {
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iq_phase_calibration_value = v;
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radio::set_tx_max283x_iq_phase_calibration(iq_phase_calibration_value);
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};
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} else { // MAX2837 has 5 bits IQ CAL phase adjustment.
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field_tx_iq_phase_cal_2837.set_value(iq_phase_calibration_value);
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field_tx_iq_phase_cal_2837.on_change = [this](int32_t v) {
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iq_phase_calibration_value = v;
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radio::set_tx_max283x_iq_phase_calibration(iq_phase_calibration_value);
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};
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}
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options_gain.on_change = [this](size_t, int32_t v) {
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mic_gain_x10 = v;
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configure_baseband();
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@ -113,6 +113,7 @@ class MicTXView : public View {
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uint32_t va_level{40};
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uint32_t attack_ms{500};
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uint32_t decay_ms{1000};
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uint8_t iq_phase_calibration_value{15};
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app_settings::SettingsManager settings_{
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"tx_mic",
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app_settings::Mode::RX_TX,
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@ -132,6 +133,7 @@ class MicTXView : public View {
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{"vox"sv, &va_enabled},
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{"rogerbeep"sv, &rogerbeep_enabled},
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{"tone_key_index"sv, &tone_key_index},
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{"iq_phase_calibration"sv, &iq_phase_calibration_value},
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}};
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rf::Frequency tx_frequency{0};
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@ -160,7 +162,8 @@ class MicTXView : public View {
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{{5 * 8, (25 * 8) + 2}, "F_RX:", Color::light_grey()},
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{{5 * 8, (27 * 8) + 2}, "LNA:", Color::light_grey()},
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{{12 * 8, (27 * 8) + 2}, "VGA:", Color::light_grey()},
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{{19 * 8, (27 * 8) + 2}, "AMP:", Color::light_grey()}};
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{{19 * 8, (27 * 8) + 2}, "AMP:", Color::light_grey()},
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{{21 * 8, (31 * 8)}, "TX-IQ-CAL:", Color::light_grey()}};
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Labels labels_WM8731{
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{{17 * 8, 1 * 8}, "Boost", Color::light_grey()}};
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Labels labels_AK4951{
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@ -338,6 +341,22 @@ class MicTXView : public View {
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' ',
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};
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NumberField field_tx_iq_phase_cal_2837{
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{24 * 8, (33 * 8)},
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2,
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{0, 31}, // 5 bits IQ CAL phase adjustment.
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1,
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' ',
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};
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NumberField field_tx_iq_phase_cal_2839{
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{24 * 8, (33 * 8)},
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2,
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{0, 63}, // 6 bits IQ CAL phasse adjustment.
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1,
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' ',
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};
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Button tx_button{
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{10 * 8, 30 * 8, 10 * 8, 5 * 8},
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"PTT TX",
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@ -149,7 +149,33 @@ void MAX2837::init() {
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set_mode(Mode::Standby);
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}
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enum class Mask {
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void MAX2837::set_tx_LO_iq_phase_calibration(const size_t v) {
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/* IQ phase deg CAL adj (+4 ...-4) in 32 steps (5 bits), 00000 = +4deg (Q lags I by 94degs, default), 01111 = +0deg, 11111 = -4deg (Q lags I by 86degs) */
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// TX calibration , Logic pins , ENABLE, RXENABLE, TXENABLE = 1,0,1 (5dec), and Reg address 16, D1 (CAL mode 1):DO (CHIP ENABLE 1)
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set_mode(Mode::Tx_Calibration); // write to ram 3 LOGIC Pins .
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gpio_max283x_enable.output();
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gpio_max2837_rxenable.output();
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gpio_max2837_txenable.output();
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_map.r.spi_en.CAL_SPI = 1; // Register Settings reg address 16, D1 (CAL mode 1)
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_map.r.spi_en.EN_SPI = 1; // Register Settings reg address 16, DO (CHIP ENABLE 1)
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flush_one(Register::SPI_EN);
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_map.r.tx_lo_iq.TXLO_IQ_SPI_EN = 1; // reg 30 D5, TX LO I/Q Phase SPI Adjust. Active when Address 30 D5 (TXLO_IQ_SPI_EN) = 1.
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_map.r.tx_lo_iq.TXLO_IQ_SPI = v; // reg 30 D4:D0, TX LO I/Q Phase SPI Adjust.
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flush_one(Register::TX_LO_IQ);
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// Exit Calibration mode, Go back to reg 16, D1:D0 , Out of CALIBRATION , back to default conditions, but keep CS activated.
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_map.r.spi_en.CAL_SPI = 0; // Register Settings reg address 16, D1 (0 = Normal operation (default)
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_map.r.spi_en.EN_SPI = 1; // Register Settings reg address 16, DO (1 = Chip select enable )
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flush_one(Register::SPI_EN);
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set_mode(Mode::Standby); // Back 3 logic pins CALIBRATION mode -> Standby.
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}
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enum class Mask { // There are class Mask ,and class mode with same names, but they are not same.
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Enable = 0b001,
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RxEnable = 0b010,
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TxEnable = 0b100,
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@ -157,9 +183,11 @@ enum class Mask {
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Standby = Enable,
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Receive = Enable | RxEnable,
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Transmit = Enable | TxEnable,
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Rx_calibration = Enable | RxEnable, // sets the same 3 x logic pins to the Receive operating mode.
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Tx_calibration = Enable | TxEnable, // sets the same 3 x logic pins to the Transmit operating mode.
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};
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Mask mode_mask(const Mode mode) {
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Mask mode_mask(const Mode mode) { // based on enum Mode cases, we set up the correct 3 logic PINS .
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switch (mode) {
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case Mode::Standby:
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return Mask::Standby;
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@ -167,12 +195,16 @@ Mask mode_mask(const Mode mode) {
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return Mask::Receive;
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case Mode::Transmit:
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return Mask::Transmit;
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case Mode::Rx_Calibration: // Let's add those two CAL logic pin settings- Rx and Tx calibration modes.
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return Mask::Rx_calibration; // same logic pins as Receive mode = Enable | RxEnable, (the difference is in Reg add 16 D1:DO)
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case Mode::Tx_Calibration: // Let's add this CAL Tx calibration mode = Transmit.
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return Mask::Tx_calibration; // same logic pins as Transmit = Enable | TxEnable,(the difference is in Reg add 16 D1:DO)
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default:
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return Mask::Shutdown;
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}
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}
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void MAX2837::set_mode(const Mode mode) {
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void MAX2837::set_mode(const Mode mode) { // We set up the 3 Logic Pins ENABLE, RXENABLE, TXENABLE accordingly to the max2837 mode case, that we want to set up .
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Mask mask = mode_mask(mode);
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gpio_max283x_enable.write(toUType(mask) & toUType(Mask::Enable));
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gpio_max2837_rxenable.write(toUType(mask) & toUType(Mask::RxEnable));
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@ -829,6 +829,7 @@ class MAX2837 : public MAX283x {
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bool set_frequency(const rf::Frequency lo_frequency) override;
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void set_rx_lo_iq_calibration(const size_t v) override;
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void set_tx_LO_iq_phase_calibration(const size_t v) override;
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void set_rx_bias_trim(const size_t v);
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void set_vco_bias(const size_t v);
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void set_rx_buff_vcm(const size_t v) override;
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@ -142,6 +142,31 @@ void MAX2839::init() {
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set_mode(Mode::Standby);
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}
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void MAX2839::set_tx_LO_iq_phase_calibration(const size_t v) {
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/* IQ phase deg CAL adj (+4 ...-4) This IC in 64 steps (6 bits), 000000 = +4deg (Q lags I by 94degs, default), 011111 = +0deg, 111111 = -4deg (Q lags I by 86degs) */
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// TX calibration , 2 x Logic pins , ENABLE, RXENABLE = 1,0, (2dec), and Reg address 16, D1 (CAL mode 1):DO (CHIP ENABLE 1)
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set_mode(Mode::Tx_Calibration); // write to ram 3 LOGIC Pins .
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gpio_max283x_enable.output(); // max2839 has only 2 x pins + regs to decide mode.
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gpio_max2839_rxtx.output(); // Here is combined rx & tx pin in one port.
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_map.r.spi_en.CAL_SPI = 1; // Register Settings reg address 16, D1 (CAL mode 1)
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_map.r.spi_en.EN_SPI = 1; // Register Settings reg address 16, DO (CHIP ENABLE 1)
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flush_one(Register::SPI_EN);
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_map.r.pa_drv.TXLO_IQ_SPI_EN = 1; // reg 27 D6, TX LO I/Q Phase SPI Adjust. Active when Address 27 D6 (TXLO_IQ_SPI_EN) = 1.
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_map.r.pa_drv.TXLO_IQ_SPI = v; // reg 27 D5:D0 6 bits, TX LO I/Q Phase SPI Adjust.
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flush_one(Register::PA_DRV);
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// Exit Calibration mode, Go back to reg 16, D1:D0 , Out of CALIBRATION , back to default conditions, but keep CS activated.
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_map.r.spi_en.CAL_SPI = 0; // Register Settings reg address 16, D1 (0 = Normal operation (default)
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_map.r.spi_en.EN_SPI = 1; // Register Settings reg address 16, DO (1 = Chip select enable )
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flush_one(Register::SPI_EN);
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set_mode(Mode::Standby); // Back 3 logic pins CALIBRATION mode -> Standby.
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}
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enum class Mask {
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Enable = 0b01,
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RxTx = 0b10,
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@ -149,6 +174,8 @@ enum class Mask {
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Standby = RxTx,
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Receive = Enable | RxTx,
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Transmit = Enable,
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Rx_calibration = Enable | RxTx, // sets the same 2 x logic pins to the Receive operating mode.
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Tx_calibration = Enable, // sets the same 2 x logic pins to the Transmit operating mode.
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};
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Mask mode_mask(const Mode mode) {
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@ -159,6 +186,10 @@ Mask mode_mask(const Mode mode) {
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return Mask::Receive;
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case Mode::Transmit:
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return Mask::Transmit;
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case Mode::Rx_Calibration: // Let's add this not used previously Rx calibration mode.
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return Mask::Rx_calibration; // same logic pins as Receive mode = Enable | RxTx, ,(the difference is in Regs )
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case Mode::Tx_Calibration: // Let's add this not used previously Tx calibration mode.
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return Mask::Tx_calibration; // same logic pins as Transmit = Enable , (the difference is in Reg add 16 D1:DO)
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default:
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return Mask::Shutdown;
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}
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@ -690,6 +690,7 @@ class MAX2839 : public MAX283x {
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void set_lpf_rf_bandwidth_tx(const uint32_t bandwidth_minimum) override;
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bool set_frequency(const rf::Frequency lo_frequency) override;
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void set_rx_lo_iq_calibration(const size_t v) override;
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void set_tx_LO_iq_phase_calibration(const size_t v) override;
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void set_rx_buff_vcm(const size_t v) override;
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int8_t temp_sense() override;
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@ -98,11 +98,13 @@ constexpr auto bandwidth_maximum = bandwidths[bandwidths.size() - 1];
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/*************************************************************************/
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enum Mode {
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enum Mode { // MAX283x Operating modes.
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Shutdown,
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Standby,
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Receive,
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Transmit,
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Rx_Calibration, // just add the sequential enum of those two CAL operating modes .
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Tx_Calibration,
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};
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using reg_t = uint16_t;
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@ -124,6 +126,8 @@ class MAX283x {
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virtual bool set_frequency(const rf::Frequency lo_frequency);
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virtual void set_rx_lo_iq_calibration(const size_t v);
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virtual void set_tx_LO_iq_phase_calibration(const size_t v);
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virtual void set_rx_buff_vcm(const size_t v);
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virtual int8_t temp_sense();
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@ -248,6 +248,10 @@ void set_antenna_bias(const bool on) {
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}
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}
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void set_tx_max283x_iq_phase_calibration(const size_t v) {
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second_if->set_tx_LO_iq_phase_calibration(v);
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}
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/*void enable(Configuration configuration) {
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configure(configuration);
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}
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@ -54,6 +54,7 @@ void set_baseband_filter_bandwidth_rx(const uint32_t bandwidth_minimum);
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void set_baseband_filter_bandwidth_tx(const uint32_t bandwidth_minimum);
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void set_baseband_rate(const uint32_t rate);
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void set_antenna_bias(const bool on);
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void set_tx_max283x_iq_phase_calibration(const size_t v);
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/* Use ReceiverModel or TransmitterModel instead. */
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// void enable(Configuration configuration);
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