2018-06-20 02:45:49 -04:00
|
|
|
#ifndef ROM_H
|
|
|
|
#define ROM_H
|
|
|
|
|
|
|
|
#define CHECKSUMMED_SIZE 0x0B
|
|
|
|
|
2022-01-22 15:43:52 -05:00
|
|
|
#define PRODUCT_RNODE 0x03
|
|
|
|
#define PRODUCT_HMBRW 0xF0
|
|
|
|
#define PRODUCT_TBEAM 0xE0
|
|
|
|
#define PRODUCT_T32_20 0xB0
|
|
|
|
#define PRODUCT_T32_21 0xB1
|
2022-06-16 13:12:28 -04:00
|
|
|
#define PRODUCT_H32_V2 0xC0
|
2018-06-20 02:45:49 -04:00
|
|
|
#define MODEL_A4 0xA4
|
|
|
|
#define MODEL_A9 0xA9
|
2022-06-16 13:12:28 -04:00
|
|
|
#define MODEL_A3 0xA3
|
|
|
|
#define MODEL_A8 0xA8
|
|
|
|
#define MODEL_A2 0xA2
|
|
|
|
#define MODEL_A7 0xA7
|
2022-01-22 15:43:52 -05:00
|
|
|
#define MODEL_B3 0xB3
|
|
|
|
#define MODEL_B8 0xB8
|
|
|
|
#define MODEL_B4 0xB4
|
|
|
|
#define MODEL_B9 0xB9
|
2022-06-16 13:12:28 -04:00
|
|
|
#define MODEL_C4 0xC4
|
|
|
|
#define MODEL_C9 0xC9
|
2022-01-09 17:40:30 -05:00
|
|
|
#define MODEL_E4 0xE4
|
|
|
|
#define MODEL_E9 0xE9
|
2022-06-29 08:28:01 -04:00
|
|
|
#define MODEL_FE 0xFE
|
2022-01-09 17:40:30 -05:00
|
|
|
#define MODEL_FF 0xFF
|
2018-06-20 02:45:49 -04:00
|
|
|
|
|
|
|
#define ADDR_PRODUCT 0x00
|
|
|
|
#define ADDR_MODEL 0x01
|
|
|
|
#define ADDR_HW_REV 0x02
|
|
|
|
#define ADDR_SERIAL 0x03
|
|
|
|
#define ADDR_MADE 0x07
|
|
|
|
#define ADDR_CHKSUM 0x0B
|
|
|
|
#define ADDR_SIGNATURE 0x1B
|
|
|
|
#define ADDR_INFO_LOCK 0x9B
|
|
|
|
|
|
|
|
#define ADDR_CONF_SF 0x9C
|
|
|
|
#define ADDR_CONF_CR 0x9D
|
|
|
|
#define ADDR_CONF_TXP 0x9E
|
|
|
|
#define ADDR_CONF_BW 0x9F
|
|
|
|
#define ADDR_CONF_FREQ 0xA3
|
|
|
|
#define ADDR_CONF_OK 0xA7
|
|
|
|
|
|
|
|
#define INFO_LOCK_BYTE 0x73
|
|
|
|
#define CONF_OK_BYTE 0x73
|
|
|
|
|
|
|
|
#define EEPROM_RESERVED 200
|
|
|
|
#endif
|