This commit is contained in:
Mark Qvist 2014-04-03 22:21:37 +02:00
commit c898b090dd
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/**
* \file
* <!--
* This file is part of BeRTOS.
*
* Bertos is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* As a special exception, you may use this file as part of a free software
* library without restriction. Specifically, if other files instantiate
* templates or use macros or inline functions from this file, or you compile
* this file and link it with other files to produce an executable, this
* file does not by itself cause the resulting executable to be covered by
* the GNU General Public License. This exception does not however
* invalidate any other reasons why the executable file might be covered by
* the GNU General Public License.
*
* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
*
* -->
*
* \brief Cortex-M3 architecture's entry point
*
* \author Andrea Righi <arighi@develer.com>
*/
#define CONTROL_UNPRIVILEGED 1
#define CONTROL_PSP 2
.syntax unified
.thumb
.section .init, "ax", %progbits
.weak __init
.set __init, __init0
.weak __init1
.set __init1, __dummy_init
.weak __init2
.set __init2, __dummy_init
.balign 2
.thumb_func
__dummy_init:
bx lr
/*
* Reset handler.
*/
.balign 2
.thumb_func
__init0:
/* Disable IRQs */
cpsid i
/*
* Initialize process stack pointer.
*/
ldr r0, =__psp_end
msr psp, r0
/* Call the early hardware initialization routine */
bl __init1
/* Copy the data segment initializers from flash to SRAM */
ldr r0, =__text_end
ldr r1, =__data_start
ldr r2, =__data_end
data_loop:
cmp r1, r2
ittt lo
ldrlo r3, [r0], #4
strlo r3, [r1], #4
blo data_loop
/* Zero fill the bss segment */
ldr r1, =__bss_start
ldr r2, =__bss_end
mov r0, #0
bss_loop:
cmp r1, r2
itt lo
strlo r0, [r1], #4
blo bss_loop
/* Switch to the process stack */
movs r0, CONTROL_PSP
msr control, r0
isb
/* Call the hardware initialization routine */
bl __init2
/* Call the application's entry point */
cpsie i
mov r0, #0
mov r1, #0
bl main
end:
wfi
b end

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MODULE ?cstartup
CONTROL_UNPRIVILEGED SET 1
CONTROL_PSP SET 2
AAPCS INTERWORK, VFP_COMPATIBLE, ROPI
PRESERVE8
SECTION .vtable:CODE:NOROOT(3)
RSEG IRQ_STACK:DATA(3)
RSEG CSTACK:DATA(3)
RSEG DATABSS:DATA(3)
EXTERN __cmain
EXTERN __init2
EXTERN __region_RAM_end__
PUBLIC __iar_program_start
SECTION .text:CODE:REORDER(2)
PUBWEAK __dummy_init
__dummy_init:
bx lr
THUMB
__iar_program_start:
cpsid i
ldr r0, =__region_RAM_end__
sub r0, r0, #16
msr psp, r0
movs r0, #CONTROL_PSP
msr control, r0
isb
bl __init2
cpsie i
mov r0, #0
mov r1, #0
bl __cmain
end:
wfi
b end
END

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SECTION .text:CODE(2)
; Exported functions
EXPORT CPU_READ_IPSR
EXPORT irq_running
EXPORT asm_switch_context
CPU_READ_IPSR:
mrs r0, ipsr
bx lr
irq_running:
mrs r0, msp
cmp sp, r0
ite ne
movne r0, #0x0
moveq r0, #0x1
bx lr
asm_switch_context:
mrs r12, psp
stmdb r12!, {r4-r11, lr}
str r12, [r1]
ldr r12, [r0]
ldmia r12!, {r4-r11, lr}
msr psp, r12
bx lr
END

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/**
* \file
* <!--
* This file is part of BeRTOS.
*
* Bertos is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* As a special exception, you may use this file as part of a free software
* library without restriction. Specifically, if other files instantiate
* templates or use macros or inline functions from this file, or you compile
* this file and link it with other files to produce an executable, this
* file does not by itself cause the resulting executable to be covered by
* the GNU General Public License. This exception does not however
* invalidate any other reasons why the executable file might be covered by
* the GNU General Public License.
*
* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
*
* -->
*
* \brief Cortex-M3 architecture's entry point
*
* \author Andrea Righi <arighi@develer.com>
*/
#include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */
#include "switch_ctx_cm3.h"
#include <cfg/compiler.h>
#include <cfg/debug.h>
#include <cpu/attr.h> /* PAUSE */
#include <cpu/irq.h> /* IRQ_DISABLE */
#include <cpu/types.h>
#include <drv/irq_cm3.h>
#include <drv/clock_cm3.h>
#include <kern/proc_p.h>
#include <io/cm3.h>
#ifndef __IAR_SYSTEMS_ICC__
extern size_t __text_end, __data_start, __data_end, __bss_start, __bss_end;
#endif
extern void __init2(void);
/* Architecture's entry point */
void __init2(void)
{
/*
* The main application expects IRQs disabled.
*/
IRQ_DISABLE;
/* Set the appropriate clocking configuration */
clock_init();
/* Initialize IRQ vector table in RAM */
sysirq_init();
#if (CONFIG_KERN && CONFIG_KERN_PREEMPT)
/*
* Voluntary context switch handler.
*
* This software interrupt can always be triggered and must be
* dispatched as soon as possible, thus we just disable IRQ priority
* for it.
*/
sysirq_setHandler(FAULT_SVCALL, svcall_handler);
sysirq_setPriority(FAULT_SVCALL, IRQ_PRIO_MAX);
/*
* Preemptible context switch handler
*
* The priority of this IRQ must be the lowest priority in the system
* in order to run last in the interrupt service routines' chain.
*/
sysirq_setHandler(FAULT_PENDSV, pendsv_handler);
sysirq_setPriority(FAULT_PENDSV, IRQ_PRIO_MIN);
#endif
}

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/**
* \file
* <!--
* This file is part of BeRTOS.
*
* Bertos is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* As a special exception, you may use this file as part of a free software
* library without restriction. Specifically, if other files instantiate
* templates or use macros or inline functions from this file, or you compile
* this file and link it with other files to produce an executable, this
* file does not by itself cause the resulting executable to be covered by
* the GNU General Public License. This exception does not however
* invalidate any other reasons why the executable file might be covered by
* the GNU General Public License.
*
* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
*
* -->
*
* \brief Cortex-M3 context switch
*
* \author Andrea Righi <arighi@develer.com>
*/
#include <cfg/compiler.h>
#include <cfg/cfg_proc.h> /* CONFIG_KERN_PREEMPT */
#include <cpu/irq.h> /* IRQ_PRIO_DISABLED */
#include <cpu/types.h> /* cpu_stack_t */
#include <kern/proc_p.h> /* asm_switch_context() prototype */
#include <kern/proc.h> /* proc_preempt() */
#include "switch_ctx_cm3.h"
#if CONFIG_KERN_PREEMPT
/*
* Kernel preemption: implementation details.
*
* The kernel preemption is implemented using the PendSV IRQ. Inside the
* SysTick handler when a process needs to be interrupted (expires its time
* quantum or a high-priority process is awakend) a pending PendSV call is
* triggered.
*
* The PendSV handler is called immediately after the SysTick handler, using
* the architecture's tail-chaining functionality (an ISR call without the
* overhead of state saving and restoration between different IRQs). Inside the
* PendSV handler we perform the stack-switching between the old and new
* processes.
*
* Voluntary context switch is implemented as a soft-interrupt call (SVCall),
* so any process is always suspended and resumed from an interrupt context.
*
* NOTE: interrupts must be disabled or enabled when resuming a process context
* depending of the type of the previous suspension. If a process was suspended
* by a voluntary context switch IRQs must be disabled on resume (voluntary
* context switch always happen with IRQs disabled). Instead, if a process was
* suspended by the kernel preemption IRQs must be always re-enabled, because
* the PendSV handler resumes directly the process context. To keep track of
* this, we save the state of the IRQ priority in register r3 before performing
* the context switch.
*
* If CONFIG_KERN_PREEMPT is not enabled the cooperative implementation
* fallbacks to the default stack-switching mechanism, performed directly in
* thread-mode and implemented as a normal function call.
*/
/*
* Voluntary context switch handler.
*/
void NAKED svcall_handler(void)
{
asm volatile (
/* Save context */
"mrs r3, basepri\n\t"
"mrs ip, psp\n\t"
"stmdb ip!, {r3-r11, lr}\n\t"
/* Stack switch */
"str ip, [r1]\n\t"
"ldr ip, [r0]\n\t"
/* Restore context */
"ldmia ip!, {r3-r11, lr}\n\t"
"msr psp, ip\n\t"
"msr basepri, r3\n\t"
"bx lr" : : : "memory");
}
/*
* Preemptible context switch handler.
*/
void NAKED pendsv_handler(void)
{
register cpu_stack_t *stack asm("ip");
asm volatile (
"mrs r3, basepri\n\t"
"mov %0, %2\n\t"
"msr basepri, %0\n\t"
"mrs %0, psp\n\t"
"stmdb %0!, {r3-r11, lr}\n\t"
: "=r"(stack)
: "r"(stack), "i"(IRQ_PRIO_DISABLED)
: "r3", "memory");
proc_current()->stack = stack;
proc_preempt();
stack = proc_current()->stack;
asm volatile (
"ldmia %0!, {r3-r11, lr}\n\t"
"msr psp, %0\n\t"
"msr basepri, r3\n\t"
"bx lr"
: "=r"(stack) : "r"(stack)
: "memory");
}
#else /* !CONFIG_KERN_PREEMPT */
#ifdef __IAR_SYSTEMS_ICC__
#else /* __IAR_SYSTEMS_ICC__ */
void NAKED asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp)
{
register cpu_stack_t **_new_sp asm("r0") = new_sp;
register cpu_stack_t **_old_sp asm("r1") = old_sp;
asm volatile (
"mrs ip, psp\n\t"
/* Save registers */
"stmdb ip!, {r4-r11, lr}\n\t"
/* Save old stack pointer */
"str ip, [%1]\n\t"
/* Load new stack pointer */
"ldr ip, [%0]\n\t"
/* Load new registers */
"ldmia ip!, {r4-r11, lr}\n\t"
"msr psp, ip\n\t"
"bx lr"
: : "r"(_new_sp), "r"(_old_sp) : "ip", "memory");
}
#endif /* __IAR_SYSTEMS_ICC__ */
#endif /* CONFIG_KERN_PREEMPT */

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/**
* \file
* <!--
* This file is part of BeRTOS.
*
* Bertos is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* As a special exception, you may use this file as part of a free software
* library without restriction. Specifically, if other files instantiate
* templates or use macros or inline functions from this file, or you compile
* this file and link it with other files to produce an executable, this
* file does not by itself cause the resulting executable to be covered by
* the GNU General Public License. This exception does not however
* invalidate any other reasons why the executable file might be covered by
* the GNU General Public License.
*
* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
*
* -->
*
* \brief Cortex-M3 context switch
*/
#ifndef SWITCH_CTX_CM3_H
#define SWITCH_CTX_CM3_H
#if CONFIG_KERN_PREEMPT
extern void svcall_handler(void);
extern void pendsv_handler(void);
#endif /* CONFIG_KERN_PREEMPT */
#endif /* SWITCH_CTX_CM3_H */

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/**
* \file
* <!--
* This file is part of BeRTOS.
*
* Bertos is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*
* As a special exception, you may use this file as part of a free software
* library without restriction. Specifically, if other files instantiate
* templates or use macros or inline functions from this file, or you compile
* this file and link it with other files to produce an executable, this
* file does not by itself cause the resulting executable to be covered by
* the GNU General Public License. This exception does not however
* invalidate any other reasons why the executable file might be covered by
* the GNU General Public License.
*
* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
*
* -->
*
* \brief Cortex-M3 startup interrupt vector table
*
* \author Andrea Righi <arighi@develer.com>
*/
.syntax unified
.thumb
.text
.thumb_func
default_isr:
wfi
b default_isr
.section .vectors,"ax",%progbits
irq_vectors:
.word __msp_end /* Initial stack pointer */
.word __init /* The reset handler */
.word default_isr /* The NMI handler */
.word default_isr /* The hard fault handler */
/*
* This IRQ vector table will be replaced by another one in RAM after the IRQ
* module initialization and the reset handler disables IRQ at the very
* beginning, so there is no chance to trigger the following IRQs.
*
* We can safely trim the rest of this table to reduce the memory footprint and
* save some space in flash.
*/

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MODULE ?vectors
AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE
PRESERVE8
SECTION IRQSTACK:DATA:NOROOT(3)
SECTION .vtable:CODE:NOROOT(3)
EXTERN __iar_program_start
PUBLIC __vector_table
DATA
__vector_table:
DCD SFE(IRQSTACK)
DCD __iar_program_start
DCD default_isr
DCD default_isr
SECTION .text:CODE:REORDER(1)
THUMB
default_isr:
wfi
b default_isr
END