From c898b090dd42cb667e9210c0a1557547dbda275f Mon Sep 17 00:00:00 2001 From: Mark Qvist Date: Thu, 3 Apr 2014 22:21:37 +0200 Subject: [PATCH] Working --- .gitignore | 2 + Makefile | 17 + Modem.project | 1215 ++ Modem.workspace | 12 + Modem/.spec | 8 + Modem/Modem.mk | 88 + Modem/Modem_user.mk | 45 + Modem/afsk.c | 534 + Modem/afsk.h | 185 + Modem/cfg/cfg_adc.h | 149 + Modem/cfg/cfg_afsk.h | 113 + Modem/cfg/cfg_ax25.h | 75 + Modem/cfg/cfg_battfs.h | 67 + Modem/cfg/cfg_context_switch.h | 71 + Modem/cfg/cfg_dac.h | 88 + Modem/cfg/cfg_dataflash.h | 55 + Modem/cfg/cfg_dc_motor.h | 111 + Modem/cfg/cfg_debug.h | 70 + Modem/cfg/cfg_eeprom.h | 64 + Modem/cfg/cfg_emb_flash.h | 73 + Modem/cfg/cfg_eth.h | 57 + Modem/cfg/cfg_fat.h | 156 + Modem/cfg/cfg_flash25.h | 51 + Modem/cfg/cfg_formatwr.h | 65 + Modem/cfg/cfg_gfx.h | 67 + Modem/cfg/cfg_hashtable.h | 51 + Modem/cfg/cfg_heap.h | 50 + Modem/cfg/cfg_i2c.h | 83 + Modem/cfg/cfg_i2s.h | 74 + Modem/cfg/cfg_ini_reader.h | 48 + Modem/cfg/cfg_kbd.h | 58 + Modem/cfg/cfg_keytag.h | 61 + Modem/cfg/cfg_kfile.h | 61 + Modem/cfg/cfg_lcd_32122a.h | 63 + Modem/cfg/cfg_lcd_hd44.h | 69 + Modem/cfg/cfg_led_7seg.h | 80 + Modem/cfg/cfg_lm75.h | 57 + Modem/cfg/cfg_lwip.h | 1863 ++ Modem/cfg/cfg_md2.h | 53 + Modem/cfg/cfg_monitor.h | 47 + Modem/cfg/cfg_nand.h | 111 + Modem/cfg/cfg_nmea.h | 85 + Modem/cfg/cfg_parser.h | 66 + Modem/cfg/cfg_phase.h | 55 + Modem/cfg/cfg_pocketbus.h | 71 + Modem/cfg/cfg_proc.h | 113 + Modem/cfg/cfg_pwm.h | 64 + Modem/cfg/cfg_ramp.h | 115 + Modem/cfg/cfg_randpool.h | 55 + Modem/cfg/cfg_sd.h | 75 + Modem/cfg/cfg_sem.h | 47 + Modem/cfg/cfg_ser.h | 222 + Modem/cfg/cfg_signal.h | 47 + Modem/cfg/cfg_spi_bitbang.h | 51 + Modem/cfg/cfg_stepper.h | 69 + Modem/cfg/cfg_tas5706a.h | 50 + Modem/cfg/cfg_tftp.h | 20 + Modem/cfg/cfg_thermo.h | 71 + Modem/cfg/cfg_timer.h | 67 + Modem/cfg/cfg_usb.h | 85 + Modem/cfg/cfg_usbkbd.h | 78 + Modem/cfg/cfg_usbmouse.h | 78 + Modem/cfg/cfg_usbser.h | 78 + Modem/cfg/cfg_wdt.h | 47 + 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Modem/hw/phase_map.h | 57 + Modem/hw/pwm_map.h | 60 + Modem/hw/thermo_map.h | 69 + Modem/main.c | 43 + VERSION | 1 + bertos/algo/crc.c | 102 + bertos/algo/crc.h | 115 + bertos/algo/crc_ccitt.c | 83 + bertos/algo/crc_ccitt.h | 78 + bertos/algo/crc_test.c | 75 + bertos/algo/md2.c | 336 + bertos/algo/md2.h | 74 + bertos/algo/mean.h | 41 + bertos/algo/pid_control.c | 115 + bertos/algo/pid_control.h | 115 + bertos/algo/ramp.c | 200 + bertos/algo/ramp.h | 166 + bertos/algo/ramp_test.c | 186 + bertos/algo/rand.c | 52 + bertos/algo/rand.h | 44 + bertos/algo/randpool.c | 257 + bertos/algo/randpool.h | 75 + bertos/algo/reverse_test.c | 87 + bertos/algo/rle.c | 150 + bertos/algo/rle.h | 46 + bertos/algo/rotating_hash.h | 83 + bertos/algo/tea.c | 131 + bertos/algo/tea.h | 58 + bertos/benchmark/context_switch.c | 136 + bertos/benchmark/context_switch.h | 49 + bertos/benchmark/kernel_footprint.c | 96 + bertos/benchmark/kernel_footprint.h | 46 + bertos/cfg/cfg_adc.h | 149 + bertos/cfg/cfg_afsk.h | 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create mode 100644 bertos/cfg/cfg_stepper.h create mode 100644 bertos/cfg/cfg_tas5706a.h create mode 100644 bertos/cfg/cfg_tftp.h create mode 100644 bertos/cfg/cfg_thermo.h create mode 100644 bertos/cfg/cfg_timer.h create mode 100644 bertos/cfg/cfg_usb.h create mode 100644 bertos/cfg/cfg_usbkbd.h create mode 100644 bertos/cfg/cfg_usbmouse.h create mode 100644 bertos/cfg/cfg_usbser.h create mode 100644 bertos/cfg/cfg_wdt.h create mode 100644 bertos/cfg/cfg_xmodem.h create mode 100644 bertos/cfg/compiler.h create mode 100644 bertos/cfg/debug.h create mode 100644 bertos/cfg/depend.h create mode 100644 bertos/cfg/kfile_debug.c create mode 100644 bertos/cfg/kfile_debug.h create mode 100644 bertos/cfg/log.h create mode 100644 bertos/cfg/macros.h create mode 100644 bertos/cfg/module.h create mode 100644 bertos/cfg/os.h create mode 100644 bertos/cfg/test.h create mode 100644 bertos/config.mk create mode 100644 bertos/cpu/arm/drv/adc_arm.c create mode 100644 bertos/cpu/arm/drv/adc_arm.h create mode 100644 bertos/cpu/arm/drv/adc_at91.c create mode 100644 bertos/cpu/arm/drv/adc_at91.h create mode 100644 bertos/cpu/arm/drv/eth_at91.c create mode 100644 bertos/cpu/arm/drv/eth_at91.h create mode 100644 bertos/cpu/arm/drv/flash_arm.h create mode 100644 bertos/cpu/arm/drv/flash_at91.c create mode 100644 bertos/cpu/arm/drv/flash_at91.h create mode 100644 bertos/cpu/arm/drv/flash_lpc2.c create mode 100644 bertos/cpu/arm/drv/flash_lpc2.h create mode 100644 bertos/cpu/arm/drv/i2c_arm.h create mode 100644 bertos/cpu/arm/drv/i2c_at91.h create mode 100644 bertos/cpu/arm/drv/i2c_lpc2.c create mode 100644 bertos/cpu/arm/drv/i2c_lpc2.h create mode 100644 bertos/cpu/arm/drv/i2s_at91.c create mode 100644 bertos/cpu/arm/drv/i2s_at91.h create mode 100644 bertos/cpu/arm/drv/kdebug_arm.c create mode 100644 bertos/cpu/arm/drv/kdebug_at91.c create mode 100644 bertos/cpu/arm/drv/kdebug_at91.h create mode 100644 bertos/cpu/arm/drv/kdebug_lpc2.c create mode 100644 bertos/cpu/arm/drv/pwm_arm.c create mode 100644 bertos/cpu/arm/drv/pwm_arm.h create mode 100644 bertos/cpu/arm/drv/pwm_at91.c create mode 100644 bertos/cpu/arm/drv/pwm_at91.h create mode 100644 bertos/cpu/arm/drv/ser_arm.c create mode 100644 bertos/cpu/arm/drv/ser_arm.h create mode 100644 bertos/cpu/arm/drv/ser_at91.c create mode 100644 bertos/cpu/arm/drv/ser_at91.h create mode 100644 bertos/cpu/arm/drv/ser_lpc2.c create mode 100644 bertos/cpu/arm/drv/ser_lpc2.h create mode 100644 bertos/cpu/arm/drv/spi_dma_at91.c create mode 100644 bertos/cpu/arm/drv/spi_dma_at91.h create mode 100644 bertos/cpu/arm/drv/stepper_arm.c create mode 100644 bertos/cpu/arm/drv/stepper_arm.h create mode 100644 bertos/cpu/arm/drv/stepper_at91.c create mode 100644 bertos/cpu/arm/drv/stepper_at91.h create mode 100644 bertos/cpu/arm/drv/stepper_at91_hwtest.c create mode 100644 bertos/cpu/arm/drv/sysirq_at91.c create mode 100644 bertos/cpu/arm/drv/sysirq_at91.h create mode 100644 bertos/cpu/arm/drv/timer_arm.c create mode 100644 bertos/cpu/arm/drv/timer_arm.h create mode 100644 bertos/cpu/arm/drv/timer_at91.c create mode 100644 bertos/cpu/arm/drv/timer_at91.h create mode 100644 bertos/cpu/arm/drv/timer_lpc2.c create mode 100644 bertos/cpu/arm/drv/timer_lpc2.h create mode 100644 bertos/cpu/arm/drv/twi_arm.c create mode 100644 bertos/cpu/arm/drv/twi_arm.h create mode 100644 bertos/cpu/arm/drv/twi_at91.c create mode 100644 bertos/cpu/arm/drv/twi_at91.h create mode 100644 bertos/cpu/arm/drv/vic_lpc2.c create mode 100644 bertos/cpu/arm/drv/vic_lpc2.h create mode 100644 bertos/cpu/arm/drv/wdt_arm.h create mode 100644 bertos/cpu/arm/hw/crt_arm7tdmi.S create mode 100644 bertos/cpu/arm/hw/crtat91sam7_rom.S create mode 100644 bertos/cpu/arm/hw/init_at91.c create mode 100644 bertos/cpu/arm/hw/init_lpc2.c create mode 100644 bertos/cpu/arm/hw/pll_at91.h create mode 100644 bertos/cpu/arm/hw/switch_arm.S create mode 100644 bertos/cpu/arm/hw/switch_ctx_arm.S create mode 100644 bertos/cpu/arm/hw/vectors_at91.S create mode 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bertos/cpu/arm/scripts/at91sam7_256_rom.ld create mode 100644 bertos/cpu/arm/scripts/at91sam7_512_ram.ld create mode 100644 bertos/cpu/arm/scripts/at91sam7_512_rom.ld create mode 100644 bertos/cpu/arm/scripts/at91sam7_64_ram.ld create mode 100644 bertos/cpu/arm/scripts/at91sam7_64_rom.ld create mode 100644 bertos/cpu/arm/scripts/lpc2378.ld create mode 100644 bertos/cpu/attr.h create mode 100644 bertos/cpu/avr/drv/adc_avr.c create mode 100644 bertos/cpu/avr/drv/adc_avr.h create mode 100644 bertos/cpu/avr/drv/flash_avr.c create mode 100644 bertos/cpu/avr/drv/flash_avr.h create mode 100644 bertos/cpu/avr/drv/i2c_avr.c create mode 100644 bertos/cpu/avr/drv/i2c_avr.h create mode 100644 bertos/cpu/avr/drv/kdebug_avr.c create mode 100644 bertos/cpu/avr/drv/kdebug_mega.c create mode 100644 bertos/cpu/avr/drv/kdebug_xmega.c create mode 100644 bertos/cpu/avr/drv/pwm_avr.c create mode 100644 bertos/cpu/avr/drv/pwm_avr.h create mode 100644 bertos/cpu/avr/drv/ser_avr.c create mode 100644 bertos/cpu/avr/drv/ser_avr.h create mode 100644 bertos/cpu/avr/drv/ser_mega.c create mode 100644 bertos/cpu/avr/drv/ser_mega.h create mode 100644 bertos/cpu/avr/drv/ser_simple_avr.c create mode 100644 bertos/cpu/avr/drv/ser_simple_avr.h create mode 100644 bertos/cpu/avr/drv/ser_xmega.c create mode 100644 bertos/cpu/avr/drv/ser_xmega.h create mode 100644 bertos/cpu/avr/drv/stepper_avr.c create mode 100644 bertos/cpu/avr/drv/stepper_avr.h create mode 100644 bertos/cpu/avr/drv/timer_avr.c create mode 100644 bertos/cpu/avr/drv/timer_avr.h create mode 100644 bertos/cpu/avr/drv/timer_mega.c create mode 100644 bertos/cpu/avr/drv/timer_mega.h create mode 100644 bertos/cpu/avr/drv/timer_simple_avr.c create mode 100644 bertos/cpu/avr/drv/timer_simple_avr.h create mode 100644 bertos/cpu/avr/drv/timer_xmega.c create mode 100644 bertos/cpu/avr/drv/timer_xmega.h create mode 100644 bertos/cpu/avr/drv/wdt_avr.h create mode 100644 bertos/cpu/avr/hw/init_xmega.c create mode 100644 bertos/cpu/avr/hw/switch_avr.S create mode 100644 bertos/cpu/avr/hw/switch_ctx_avr.S create mode 100644 bertos/cpu/avr/info/ATmega103.cdef create mode 100644 bertos/cpu/avr/info/ATmega128.cdef create mode 100644 bertos/cpu/avr/info/ATmega1280.cdef create mode 100644 bertos/cpu/avr/info/ATmega1281.cdef create mode 100644 bertos/cpu/avr/info/ATmega168.cdef create mode 100644 bertos/cpu/avr/info/ATmega2560.cdef create mode 100644 bertos/cpu/avr/info/ATmega32.cdef create mode 100644 bertos/cpu/avr/info/ATmega328P.cdef create mode 100644 bertos/cpu/avr/info/ATmega64.cdef create mode 100644 bertos/cpu/avr/info/ATmega8.cdef create mode 100644 bertos/cpu/avr/info/ATxmega32D4.cdef create mode 100644 bertos/cpu/avr/info/avr.common create mode 100644 bertos/cpu/avr/info/avr_post.common create mode 100644 bertos/cpu/avr/info/mega.common create mode 100644 bertos/cpu/byteorder.h create mode 100644 bertos/cpu/byteorder_test.c create mode 100644 bertos/cpu/cortex-m3/drv/adc_cm3.h create mode 100644 bertos/cpu/cortex-m3/drv/adc_lm3s.c create mode 100644 bertos/cpu/cortex-m3/drv/adc_lm3s.h create mode 100644 bertos/cpu/cortex-m3/drv/adc_sam3.c create mode 100644 bertos/cpu/cortex-m3/drv/adc_sam3.h create mode 100644 bertos/cpu/cortex-m3/drv/adc_stm32.c create mode 100644 bertos/cpu/cortex-m3/drv/adc_stm32.h create mode 100644 bertos/cpu/cortex-m3/drv/clock_cm3.h create mode 100644 bertos/cpu/cortex-m3/drv/clock_lm3s.c create mode 100644 bertos/cpu/cortex-m3/drv/clock_lm3s.h create mode 100644 bertos/cpu/cortex-m3/drv/clock_sam3.c create mode 100644 bertos/cpu/cortex-m3/drv/clock_sam3.h create mode 100644 bertos/cpu/cortex-m3/drv/clock_stm32.c create mode 100644 bertos/cpu/cortex-m3/drv/clock_stm32.h create mode 100644 bertos/cpu/cortex-m3/drv/dac_cm3.h create mode 100644 bertos/cpu/cortex-m3/drv/dac_sam3.c create mode 100644 bertos/cpu/cortex-m3/drv/dac_sam3.h create mode 100644 bertos/cpu/cortex-m3/drv/eth_sam3.c create mode 100644 bertos/cpu/cortex-m3/drv/eth_sam3.h create mode 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bertos/cpu/cortex-m3/drv/spi_dma_sam3.c create mode 100644 bertos/cpu/cortex-m3/drv/ssi_lm3s.c create mode 100644 bertos/cpu/cortex-m3/drv/ssi_lm3s.h create mode 100644 bertos/cpu/cortex-m3/drv/timer_cm3.c create mode 100644 bertos/cpu/cortex-m3/drv/timer_cm3.h create mode 100644 bertos/cpu/cortex-m3/drv/usb_stm32.c create mode 100644 bertos/cpu/cortex-m3/drv/usb_stm32.h create mode 100644 bertos/cpu/cortex-m3/hw/crt_cm3.S create mode 100644 bertos/cpu/cortex-m3/hw/crt_cm3_iar.S create mode 100644 bertos/cpu/cortex-m3/hw/iar_cm3.S create mode 100644 bertos/cpu/cortex-m3/hw/init_cm3.c create mode 100644 bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c create mode 100644 bertos/cpu/cortex-m3/hw/switch_ctx_cm3.h create mode 100644 bertos/cpu/cortex-m3/hw/vectors_cm3.S create mode 100644 bertos/cpu/cortex-m3/hw/vectors_cm3_iar.S create mode 100644 bertos/cpu/cortex-m3/info/LM3S1968.cdef create mode 100644 bertos/cpu/cortex-m3/info/LM3S8962.cdef create mode 100644 bertos/cpu/cortex-m3/info/SAM3N4.cdef create mode 100644 bertos/cpu/cortex-m3/info/SAM3X8.cdef create mode 100644 bertos/cpu/cortex-m3/info/STM32F100RB.cdef create mode 100644 bertos/cpu/cortex-m3/info/STM32F101C4.cdef create mode 100644 bertos/cpu/cortex-m3/info/STM32F103RB.cdef create mode 100644 bertos/cpu/cortex-m3/info/STM32F103RE.cdef create mode 100644 bertos/cpu/cortex-m3/info/cm3.common create mode 100644 bertos/cpu/cortex-m3/io/cm3.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s_adc.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s_com.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s_gpio.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s_i2c.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s_ints.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s_memmap.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s_nvic.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s_pwm.h create mode 100644 bertos/cpu/cortex-m3/io/lm3s_ssi.h create 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bertos/cpu/cortex-m3/io/sam3_sysctl.h create mode 100644 bertos/cpu/cortex-m3/io/sam3_tc.h create mode 100644 bertos/cpu/cortex-m3/io/sam3_twi.h create mode 100644 bertos/cpu/cortex-m3/io/sam3_uart.h create mode 100644 bertos/cpu/cortex-m3/io/sam3_usart.h create mode 100644 bertos/cpu/cortex-m3/io/sam3_wdt.h create mode 100644 bertos/cpu/cortex-m3/io/sam3n.h create mode 100644 bertos/cpu/cortex-m3/io/stm32.h create mode 100644 bertos/cpu/cortex-m3/io/stm32_adc.h create mode 100644 bertos/cpu/cortex-m3/io/stm32_flash.h create mode 100644 bertos/cpu/cortex-m3/io/stm32_gpio.h create mode 100644 bertos/cpu/cortex-m3/io/stm32_i2c.h create mode 100644 bertos/cpu/cortex-m3/io/stm32_ints.h create mode 100644 bertos/cpu/cortex-m3/io/stm32_memmap.h create mode 100644 bertos/cpu/cortex-m3/io/stm32_nvic.h create mode 100644 bertos/cpu/cortex-m3/io/stm32_pwr.h create mode 100644 bertos/cpu/cortex-m3/io/stm32_uart.h create mode 100644 bertos/cpu/cortex-m3/scripts/cortex-m3_ram.ld create mode 100644 bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld create mode 100644 bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld create mode 100644 bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld create mode 100644 bertos/cpu/cortex-m3/scripts/lm3s8962_ram.ld create mode 100644 bertos/cpu/cortex-m3/scripts/lm3s8962_rom.ld create mode 100644 bertos/cpu/cortex-m3/scripts/sam3n4_ram.ld create mode 100644 bertos/cpu/cortex-m3/scripts/sam3n4_rom.ld create mode 100644 bertos/cpu/cortex-m3/scripts/sam3x8_ram.icf create mode 100644 bertos/cpu/cortex-m3/scripts/sam3x8_rom.icf create mode 100644 bertos/cpu/cortex-m3/scripts/sam3x8_rom.ld create mode 100644 bertos/cpu/cortex-m3/scripts/stm32f100rb_rom.ld create mode 100644 bertos/cpu/cortex-m3/scripts/stm32f101c4_ram.ld create mode 100644 bertos/cpu/cortex-m3/scripts/stm32f101c4_rom.ld create mode 100644 bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld create mode 100644 bertos/cpu/cortex-m3/scripts/stm32f103re_rom.ld create mode 100644 bertos/cpu/detect.h create mode 100644 bertos/cpu/dsp56k/drv/buzzerled_dsp56k.h create mode 100644 bertos/cpu/dsp56k/drv/kdebug_dsp56k.c create mode 100644 bertos/cpu/dsp56k/drv/ser_dsp56k.c create mode 100644 bertos/cpu/dsp56k/drv/ser_dsp56k.h create mode 100644 bertos/cpu/dsp56k/drv/timer_dsp56k.h create mode 100644 bertos/cpu/dsp56k/hw/switch_dsp56k.c create mode 100644 bertos/cpu/frame.h create mode 100644 bertos/cpu/i196/drv/kdebug_i196.c create mode 100644 bertos/cpu/i196/drv/ser_i196.c create mode 100644 bertos/cpu/i196/drv/timer_i196.h create mode 100644 bertos/cpu/i196/hw/switch_i196.s32 create mode 100644 bertos/cpu/irq.h create mode 100644 bertos/cpu/msp430/drv/kdebug_msp430.c create mode 100644 bertos/cpu/msp430/drv/kdebug_msp430.h create mode 100644 bertos/cpu/msp430/info/MSP430F2274.cdef create mode 100644 bertos/cpu/msp430/info/MSP430G2231.cdef create mode 100644 bertos/cpu/msp430/info/msp430.common create mode 100644 bertos/cpu/msp430/info/msp430_post.common create mode 100755 bertos/cpu/newcore create mode 100644 bertos/cpu/path.common create mode 100644 bertos/cpu/pgm.h create mode 100644 bertos/cpu/power.h create mode 100644 bertos/cpu/types.h create mode 100644 bertos/drv/adc.c create mode 100644 bertos/drv/adc.h create mode 100644 bertos/drv/buzzer.c create mode 100644 bertos/drv/buzzer.h create mode 100644 bertos/drv/buzzerled.c create mode 100644 bertos/drv/buzzerled.h create mode 100644 bertos/drv/dac.h create mode 100644 bertos/drv/dataflash.c create mode 100644 bertos/drv/dataflash.h create mode 100644 bertos/drv/dataflash_hwtest.c create mode 100644 bertos/drv/dc_motor.c create mode 100644 bertos/drv/dc_motor.h create mode 100644 bertos/drv/dc_motor_hwtest.c create mode 100644 bertos/drv/eeprom.c create mode 100644 bertos/drv/eeprom.h create mode 100644 bertos/drv/eth.h create mode 100644 bertos/drv/flash.h create mode 100644 bertos/drv/flash25.c create mode 100644 bertos/drv/flash25.h create mode 100644 bertos/drv/flash25_hwtest.c create mode 100644 bertos/drv/ft245rl.c create mode 100644 bertos/drv/ft245rl.h create mode 100644 bertos/drv/i2c.c create mode 100644 bertos/drv/i2c.h create mode 100644 bertos/drv/i2c_bitbang.c create mode 100644 bertos/drv/kbd.c create mode 100644 bertos/drv/kbd.h create mode 100644 bertos/drv/kdebug.c create mode 100644 bertos/drv/lcd_32122a.c create mode 100644 bertos/drv/lcd_32122a.h create mode 100644 bertos/drv/lcd_gfx_hwtest.c create mode 100644 bertos/drv/lcd_gfx_qt.cpp create mode 100644 bertos/drv/lcd_gfx_qt.h create mode 100644 bertos/drv/lcd_hd44.c create mode 100644 bertos/drv/lcd_hd44.h create mode 100644 bertos/drv/lcd_hd44_hwtest.c create mode 100644 bertos/drv/lcd_hx8347.c create mode 100644 bertos/drv/lcd_hx8347.h create mode 100644 bertos/drv/lcd_ili9225.c create mode 100644 bertos/drv/lcd_ili9225.h create mode 100644 bertos/drv/lcd_lm44_qt.cpp create mode 100644 bertos/drv/lcd_lm44_qt.h create mode 100644 bertos/drv/lcd_rit128x96.c create mode 100644 bertos/drv/lcd_rit128x96.h create mode 100644 bertos/drv/lcd_text.c create mode 100644 bertos/drv/lcd_text.h create mode 100644 bertos/drv/lcd_text_hwtest.c create mode 100644 bertos/drv/led_7seg.c create mode 100644 bertos/drv/led_7seg.h create mode 100644 bertos/drv/lm75.c create mode 100644 bertos/drv/lm75.h create mode 100644 bertos/drv/mcp41.c create mode 100644 bertos/drv/mcp41.h create mode 100644 bertos/drv/mpxx6115a.h create mode 100644 bertos/drv/nand.c create mode 100644 bertos/drv/nand.h create mode 100644 bertos/drv/ntc.c create mode 100644 bertos/drv/ntc.h create mode 100644 bertos/drv/pcf8574.c create mode 100644 bertos/drv/pcf8574.h create mode 100644 bertos/drv/phase.c create mode 100644 bertos/drv/phase.h create mode 100644 bertos/drv/pwm.c create mode 100644 bertos/drv/pwm.h create mode 100644 bertos/drv/pwm_hwtest.c create mode 100644 bertos/drv/rtc.h create mode 100644 bertos/drv/sd.c create mode 100644 bertos/drv/sd.h create mode 100644 bertos/drv/ser.c create mode 100644 bertos/drv/ser.h create mode 100644 bertos/drv/ser_p.h create mode 100644 bertos/drv/sipo.c create mode 100644 bertos/drv/sipo.h create mode 100644 bertos/drv/spi_bitbang.c create mode 100644 bertos/drv/spi_bitbang.h create mode 100644 bertos/drv/spi_dma.h create mode 100644 bertos/drv/stepper.c create mode 100644 bertos/drv/stepper.h create mode 100644 bertos/drv/tas5706a.c create mode 100644 bertos/drv/tas5706a.h create mode 100644 bertos/drv/tc520.c create mode 100644 bertos/drv/tc520.h create mode 100644 bertos/drv/thermo.c create mode 100644 bertos/drv/thermo.h create mode 100644 bertos/drv/timer.c create mode 100644 bertos/drv/timer.h create mode 100644 bertos/drv/timer_test.c create mode 100644 bertos/drv/tlv5618.c create mode 100644 bertos/drv/tlv5618.h create mode 100644 bertos/drv/tmp123.c create mode 100644 bertos/drv/tmp123.h create mode 100644 bertos/drv/usb.h create mode 100644 bertos/drv/usb_endpoint.h create mode 100644 bertos/drv/usb_hid.h create mode 100644 bertos/drv/usbkbd.c create mode 100644 bertos/drv/usbkbd.h create mode 100644 bertos/drv/usbmouse.c create mode 100644 bertos/drv/usbmouse.h create mode 100644 bertos/drv/usbser.c create mode 100644 bertos/drv/usbser.h create mode 100644 bertos/drv/wdt.h create mode 100644 bertos/dt/dnotifier.c create mode 100644 bertos/dt/dnotifier.h create mode 100644 bertos/dt/dtag.h create mode 100644 bertos/dt/dwidget.c create mode 100644 bertos/dt/dwidget.h create mode 100644 bertos/dt/editbool.c create mode 100644 bertos/dt/editbool.h create mode 100644 bertos/dt/editint.c create mode 100644 bertos/dt/editint.h create mode 100644 bertos/emul/diskio_emul.c create mode 100644 bertos/emul/emul.cpp create mode 100644 bertos/emul/emul.h create mode 100644 bertos/emul/emul.mk create mode 100644 bertos/emul/emulkbd.cpp create mode 100644 bertos/emul/emulkbd.h create mode 100644 bertos/emul/emulwin.cpp create mode 100644 bertos/emul/emulwin.h create mode 100644 bertos/emul/kfile_posix.c create mode 100644 bertos/emul/kfile_posix.h create mode 100644 bertos/emul/ser_posix.c create mode 100644 bertos/emul/switch.S create mode 100644 bertos/emul/switch_ctx_emul.S create mode 100644 bertos/emul/switch_i386.S create mode 100644 bertos/emul/switch_ppc.S create mode 100644 bertos/emul/switch_win32.s create mode 100644 bertos/emul/switch_x86_64.s create mode 100644 bertos/emul/timer_posix.c create mode 100644 bertos/emul/timer_posix.h create mode 100644 bertos/emul/timer_qt.c create mode 100644 bertos/emul/timer_qt.h create mode 100755 bertos/fonts/convbdf create mode 100644 bertos/fonts/fixed6x8.c create mode 100644 bertos/fonts/fonts.mk create mode 100644 bertos/fonts/gohu.bdf create mode 100644 bertos/fonts/gohu.c create mode 100644 bertos/fonts/helvB10.bdf create mode 100644 bertos/fonts/helvB10.c create mode 100644 bertos/fonts/luBS14.bdf create mode 100644 bertos/fonts/luBS14.c create mode 100644 bertos/fonts/ncenB18.bdf create mode 100644 bertos/fonts/ncenB18.c create mode 100644 bertos/fs/battfs.c create mode 100644 bertos/fs/battfs.h create mode 100644 bertos/fs/battfs_test.c create mode 100644 bertos/fs/fat.c create mode 100644 bertos/fs/fat.h create mode 100644 bertos/fs/fat_test.c create mode 100644 bertos/fs/fatfs/00readme.txt create mode 100644 bertos/fs/fatfs/diskio.c create mode 100644 bertos/fs/fatfs/diskio.h create mode 100644 bertos/fs/fatfs/ff.c create mode 100644 bertos/fs/fatfs/ff.h create mode 100644 bertos/fs/fatfs/integer.h create mode 100644 bertos/fs/fatfs/option/cc932.c create mode 100644 bertos/fs/fatfs/option/cc936.c create mode 100644 bertos/fs/fatfs/option/cc949.c create mode 100644 bertos/fs/fatfs/option/cc950.c create mode 100644 bertos/fs/fatfs/option/ccsbcs.c create mode 100644 bertos/fs/fatfs/option/syncobj.c create mode 100644 bertos/gfx/bitmap.c create mode 100644 bertos/gfx/charts.c create mode 100644 bertos/gfx/charts.h create mode 100644 bertos/gfx/fillpoly.cpp create mode 100644 bertos/gfx/font.h create mode 100644 bertos/gfx/font_10x20.c create mode 100644 bertos/gfx/gfx.h create mode 100644 bertos/gfx/gfx_p.h create mode 100644 bertos/gfx/line.c create mode 100644 bertos/gfx/text.c create mode 100644 bertos/gfx/text.h create mode 100644 bertos/gfx/text_format.c create mode 100644 bertos/gfx/win.c create mode 100644 bertos/gfx/win.h create mode 100644 bertos/gui/levelbar.c create mode 100644 bertos/gui/levelbar.h create mode 100644 bertos/gui/leveledit.c create mode 100644 bertos/gui/leveledit.h create mode 100644 bertos/gui/menu.c create mode 100644 bertos/gui/menu.h create mode 100644 bertos/gui/menubar.c create mode 100644 bertos/gui/menubar.h create mode 100644 bertos/hw/hw_afsk.h create mode 100644 bertos/hw/hw_blanker.h create mode 100644 bertos/hw/hw_boot.h create mode 100644 bertos/hw/hw_buzzer.h create mode 100644 bertos/hw/hw_buzzerled.h create mode 100644 bertos/hw/hw_cpufreq.h create mode 100644 bertos/hw/hw_dataflash.c create mode 100644 bertos/hw/hw_dataflash.h create mode 100644 bertos/hw/hw_dc_motor.h create mode 100644 bertos/hw/hw_eth.c create mode 100644 bertos/hw/hw_eth.h create mode 100644 bertos/hw/hw_ft245rl.h create mode 100644 bertos/hw/hw_hx8347.h create mode 100644 bertos/hw/hw_i2c_bitbang.h create mode 100644 bertos/hw/hw_ili9225.h create mode 100644 bertos/hw/hw_input.h create mode 100644 bertos/hw/hw_kbd.h create mode 100644 bertos/hw/hw_lcd.h create mode 100644 bertos/hw/hw_lcd_32122a.h create mode 100644 bertos/hw/hw_lcd_hd44.h create mode 100644 bertos/hw/hw_led.h create mode 100644 bertos/hw/hw_led_7seg.h create mode 100644 bertos/hw/hw_lm75.h create mode 100644 bertos/hw/hw_mcp41.c create mode 100644 bertos/hw/hw_mcp41.h create mode 100644 bertos/hw/hw_ntc.c create mode 100644 bertos/hw/hw_ntc.h create mode 100644 bertos/hw/hw_phase.c create mode 100644 bertos/hw/hw_phase.h create mode 100644 bertos/hw/hw_rit128x96.h create mode 100644 bertos/hw/hw_sd.h create mode 100644 bertos/hw/hw_sensor.h create mode 100644 bertos/hw/hw_ser.h create mode 100644 bertos/hw/hw_sipo.h create mode 100644 bertos/hw/hw_spi.h create mode 100644 bertos/hw/hw_spi_dma.h create mode 100644 bertos/hw/hw_stepper.h create mode 100644 bertos/hw/hw_tas5706a.h create mode 100644 bertos/hw/hw_tc520.h create mode 100644 bertos/hw/hw_thermo.h create mode 100644 bertos/hw/hw_timer.h create mode 100644 bertos/hw/hw_tlv5618.h create mode 100644 bertos/hw/hw_tmp123.h create mode 100644 bertos/hw/kbd_map.h create mode 100644 bertos/hw/mcp41_map.h create mode 100644 bertos/hw/ntc_map.h create mode 100644 bertos/hw/phase_map.h create mode 100644 bertos/hw/pwm_map.h create mode 100644 bertos/hw/thermo_map.h create mode 100644 bertos/icons/Makefile create mode 100644 bertos/icons/flipimage.cpp create mode 100644 bertos/icons/logo.c create mode 100644 bertos/icons/logo.h create mode 100755 bertos/icons/logo.png create mode 100644 bertos/io/kblock.c create mode 100644 bertos/io/kblock.h create mode 100644 bertos/io/kblock_posix.c create mode 100644 bertos/io/kblock_posix.h create mode 100644 bertos/io/kblock_ram.c create mode 100644 bertos/io/kblock_ram.h create mode 100644 bertos/io/kfile.c create mode 100644 bertos/io/kfile.h create mode 100644 bertos/io/kfile_block.c create mode 100644 bertos/io/kfile_block.h create mode 100644 bertos/io/kfile_test.c create mode 100644 bertos/io/reblock.c create mode 100644 bertos/io/reblock.h create mode 100644 bertos/kern/coop.c create mode 100644 bertos/kern/irq.c create mode 100644 bertos/kern/irq.h create mode 100644 bertos/kern/kfile.h create mode 100644 bertos/kern/monitor.c create mode 100644 bertos/kern/monitor.h create mode 100644 bertos/kern/msg.h create mode 100644 bertos/kern/msg_test.c create mode 100644 bertos/kern/preempt.c create mode 100644 bertos/kern/proc.c create mode 100644 bertos/kern/proc.h create mode 100644 bertos/kern/proc_p.h create mode 100644 bertos/kern/proc_test.c create mode 100644 bertos/kern/proc_test/coop_heap_test.c create mode 100644 bertos/kern/proc_test/coop_msg_test.c create mode 100644 bertos/kern/proc_test/coop_pri_heap_test.c create mode 100644 bertos/kern/proc_test/coop_pri_test.c create mode 100644 bertos/kern/proc_test/coop_sem_test.c create mode 100644 bertos/kern/proc_test/coop_signal_test.c create mode 100644 bertos/kern/proc_test/coop_test.c create mode 100644 bertos/kern/proc_test/preempt_heap_test.c create mode 100644 bertos/kern/proc_test/preempt_msg_test.c create mode 100644 bertos/kern/proc_test/preempt_pri_heap_test.c create mode 100644 bertos/kern/proc_test/preempt_pri_test.c create mode 100644 bertos/kern/proc_test/preempt_sem_test.c create mode 100644 bertos/kern/proc_test/preempt_signal_test.c create mode 100644 bertos/kern/proc_test/preempt_test.c create mode 100644 bertos/kern/sem.c create mode 100644 bertos/kern/sem.h create mode 100644 bertos/kern/sem_test.c create mode 100644 bertos/kern/signal.c create mode 100644 bertos/kern/signal.h create mode 100644 bertos/kern/signal_test.c create mode 100644 bertos/mware/blanker.c create mode 100644 bertos/mware/blanker.h create mode 100644 bertos/mware/byteorder.h create mode 100644 bertos/mware/cmd_hunk.h create mode 100644 bertos/mware/event.c create mode 100644 bertos/mware/event.h create mode 100644 bertos/mware/except.h create mode 100644 bertos/mware/formatwr.c create mode 100644 bertos/mware/formatwr.h create mode 100644 bertos/mware/hex.c create mode 100644 bertos/mware/hex.h create mode 100644 bertos/mware/ini_reader.c create mode 100644 bertos/mware/ini_reader.h create mode 100644 bertos/mware/ini_reader_test.c create mode 100644 bertos/mware/messages.c create mode 100644 bertos/mware/messages.h create mode 100644 bertos/mware/observer.c create mode 100644 bertos/mware/observer.h create mode 100644 bertos/mware/parser.c create mode 100644 bertos/mware/parser.h create mode 100644 bertos/mware/pgm.h create mode 100644 bertos/mware/readline.c create mode 100644 bertos/mware/readline.h create mode 100644 bertos/mware/resource.c create mode 100644 bertos/mware/resource.h create mode 100644 bertos/mware/rle.h create mode 100644 bertos/mware/sprintf.c create mode 100644 bertos/mware/sprintf_test.c create mode 100644 bertos/mware/strtol10.c create mode 100644 bertos/mware/strtol10.h create mode 100644 bertos/net/afsk.c create mode 100644 bertos/net/afsk.h create mode 100644 bertos/net/afsk_test.c create mode 100644 bertos/net/ax25.c create mode 100644 bertos/net/ax25.h create mode 100644 bertos/net/ax25_test.c create mode 100644 bertos/net/keytag.c create mode 100644 bertos/net/keytag.h create mode 100644 bertos/net/lwip.c create mode 100644 bertos/net/lwip.h create mode 100644 bertos/net/lwip/CHANGELOG create mode 100644 bertos/net/lwip/COPYING create mode 100644 bertos/net/lwip/FILES create mode 100644 bertos/net/lwip/README create mode 100644 bertos/net/lwip/doc/FILES create mode 100644 bertos/net/lwip/doc/contrib.txt create mode 100644 bertos/net/lwip/doc/rawapi.txt create mode 100644 bertos/net/lwip/doc/savannah.txt create mode 100644 bertos/net/lwip/doc/snmp_agent.txt create mode 100644 bertos/net/lwip/doc/sys_arch.txt create mode 100644 bertos/net/lwip/src/FILES create mode 100644 bertos/net/lwip/src/api/api_lib.c create mode 100644 bertos/net/lwip/src/api/api_msg.c create mode 100644 bertos/net/lwip/src/api/err.c create mode 100644 bertos/net/lwip/src/api/netbuf.c create mode 100644 bertos/net/lwip/src/api/netdb.c create mode 100644 bertos/net/lwip/src/api/netifapi.c create mode 100644 bertos/net/lwip/src/api/sockets.c create mode 100644 bertos/net/lwip/src/api/tcpip.c create mode 100644 bertos/net/lwip/src/arch/sys_arch.c create mode 100644 bertos/net/lwip/src/core/dhcp.c create mode 100644 bertos/net/lwip/src/core/dns.c create mode 100644 bertos/net/lwip/src/core/init.c create mode 100644 bertos/net/lwip/src/core/ipv4/autoip.c create mode 100644 bertos/net/lwip/src/core/ipv4/icmp.c create mode 100644 bertos/net/lwip/src/core/ipv4/igmp.c create mode 100644 bertos/net/lwip/src/core/ipv4/inet.c create mode 100644 bertos/net/lwip/src/core/ipv4/inet_chksum.c create mode 100644 bertos/net/lwip/src/core/ipv4/ip.c create mode 100644 bertos/net/lwip/src/core/ipv4/ip_addr.c create mode 100644 bertos/net/lwip/src/core/ipv4/ip_frag.c create mode 100644 bertos/net/lwip/src/core/ipv6/README create mode 100644 bertos/net/lwip/src/core/ipv6/icmp6.c create mode 100644 bertos/net/lwip/src/core/ipv6/inet6.c create mode 100644 bertos/net/lwip/src/core/ipv6/ip6.c create mode 100644 bertos/net/lwip/src/core/ipv6/ip6_addr.c create mode 100644 bertos/net/lwip/src/core/mem.c create mode 100644 bertos/net/lwip/src/core/memp.c create mode 100644 bertos/net/lwip/src/core/netif.c create mode 100644 bertos/net/lwip/src/core/pbuf.c create mode 100644 bertos/net/lwip/src/core/raw.c create mode 100644 bertos/net/lwip/src/core/snmp/asn1_dec.c create mode 100644 bertos/net/lwip/src/core/snmp/asn1_enc.c create mode 100644 bertos/net/lwip/src/core/snmp/mib2.c create mode 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100644 bertos/net/pocketbus.c create mode 100644 bertos/net/pocketbus.h create mode 100644 bertos/net/pocketcmd.c create mode 100644 bertos/net/pocketcmd.h create mode 100644 bertos/net/tftp.c create mode 100644 bertos/net/tftp.h create mode 100644 bertos/net/xmodem.c create mode 100644 bertos/net/xmodem.h create mode 100644 bertos/os/hptime.c create mode 100644 bertos/os/hptime.h create mode 100755 bertos/remote_merge create mode 100644 bertos/rules.mk create mode 100644 bertos/struct/bitarray.h create mode 100644 bertos/struct/bitarray_test.c create mode 100644 bertos/struct/fifobuf.h create mode 100644 bertos/struct/hashtable.c create mode 100644 bertos/struct/hashtable.h create mode 100644 bertos/struct/hashtable_test.c create mode 100644 bertos/struct/heap.c create mode 100644 bertos/struct/heap.h create mode 100644 bertos/struct/heap_test.c create mode 100644 bertos/struct/kfile_fifo.c create mode 100644 bertos/struct/kfile_fifo.h create mode 100644 bertos/struct/kfile_fifo_test.c create mode 100644 bertos/struct/kfile_mem.c create mode 100644 bertos/struct/kfile_mem.h create mode 100644 bertos/struct/list.h create mode 100644 bertos/struct/pool.h create mode 100644 bertos/verstag.c create mode 100644 bertos/verstag.h create mode 100644 buildrev.h create mode 100755 flash create mode 100644 project.bertos diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..b0950a8 --- /dev/null +++ b/.gitignore @@ -0,0 +1,2 @@ +obj +images diff --git a/Makefile b/Makefile new file mode 100644 index 0000000..20cb33e --- /dev/null +++ b/Makefile @@ -0,0 +1,17 @@ +# +# Copyright 2009 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Author: Lorenzo Berni +# + +# Set to 1 for verbose build output, 0 for terse output +V := 0 + +default: all + +include bertos/config.mk + +include Modem/Modem.mk + +include bertos/rules.mk diff --git a/Modem.project b/Modem.project new file mode 100644 index 0000000..7abe5be --- /dev/null +++ b/Modem.project @@ -0,0 +1,1215 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +source + + +shell sleep 2 + + + + + + + make clean + make + + + + None + $(WorkspacePath) + + + + + + + + + + + + + + + + + + + + + make clean + make + + + + None + $(WorkspacePath) + + + + + + + + diff --git a/Modem.workspace b/Modem.workspace new file mode 100644 index 0000000..5353f58 --- /dev/null +++ b/Modem.workspace @@ -0,0 +1,12 @@ + + + + + + + + + + + + diff --git a/Modem/.spec b/Modem/.spec new file mode 100644 index 0000000..f3edfbc --- /dev/null +++ b/Modem/.spec @@ -0,0 +1,8 @@ +name = 'empty preset' +advanced = True +description=""" +

+This is a minimalist project, it just initializes the hardware of the +supported board and proposes an empty main. +<\p> +""" diff --git a/Modem/Modem.mk b/Modem/Modem.mk new file mode 100644 index 0000000..da008f8 --- /dev/null +++ b/Modem/Modem.mk @@ -0,0 +1,88 @@ +# +# Wizard autogenerated makefile. +# DO NOT EDIT, use the Modem_user.mk file instead. +# + +# Constants automatically defined by the selected modules +Modem_DEBUG = 1 + +# Our target application +TRG += Modem + +Modem_PREFIX = "/usr/bin/avr-" + +Modem_SUFFIX = "" + +Modem_SRC_PATH = Modem + +Modem_HW_PATH = Modem + +# Files automatically generated by the wizard. DO NOT EDIT, USE Modem_USER_CSRC INSTEAD! +Modem_WIZARD_CSRC = \ + bertos/cpu/avr/drv/ser_avr.c \ + bertos/cpu/avr/drv/ser_mega.c \ + bertos/cpu/avr/drv/timer_avr.c \ + bertos/cpu/avr/drv/timer_mega.c \ + bertos/drv/ser.c \ + bertos/drv/timer.c \ + bertos/io/kfile.c \ + bertos/mware/event.c \ + bertos/mware/formatwr.c \ + bertos/mware/hex.c \ + bertos/struct/heap.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE Modem_USER_PCSRC INSTEAD! +Modem_WIZARD_PCSRC = \ + bertos/mware/formatwr.c \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE Modem_USER_CPPASRC INSTEAD! +Modem_WIZARD_CPPASRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE Modem_USER_CXXSRC INSTEAD! +Modem_WIZARD_CXXSRC = \ + \ + # + +# Files automatically generated by the wizard. DO NOT EDIT, USE Modem_USER_ASRC INSTEAD! +Modem_WIZARD_ASRC = \ + \ + # + +Modem_CPPFLAGS = -D'CPU_FREQ=(16000000UL)' -D'ARCH=(ARCH_DEFAULT)' -D'WIZ_AUTOGEN' -I$(Modem_HW_PATH) -I$(Modem_SRC_PATH) $(Modem_CPU_CPPFLAGS) $(Modem_USER_CPPFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +Modem_LDFLAGS = $(Modem_CPU_LDFLAGS) $(Modem_WIZARD_LDFLAGS) $(Modem_USER_LDFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +Modem_CPPAFLAGS = $(Modem_CPU_CPPAFLAGS) $(Modem_WIZARD_CPPAFLAGS) $(Modem_USER_CPPAFLAGS) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +Modem_CSRC = $(Modem_CPU_CSRC) $(Modem_WIZARD_CSRC) $(Modem_USER_CSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +Modem_PCSRC = $(Modem_CPU_PCSRC) $(Modem_WIZARD_PCSRC) $(Modem_USER_PCSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +Modem_CPPASRC = $(Modem_CPU_CPPASRC) $(Modem_WIZARD_CPPASRC) $(Modem_USER_CPPASRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +Modem_CXXSRC = $(Modem_CPU_CXXSRC) $(Modem_WIZARD_CXXSRC) $(Modem_USER_CXXSRC) + +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +Modem_ASRC = $(Modem_CPU_ASRC) $(Modem_WIZARD_ASRC) $(Modem_USER_ASRC) + +# CPU specific flags and options, defined in the CPU definition files. +# Automatically generated by the wizard. PLEASE DO NOT EDIT! +Modem_MCU = atmega328p +Modem_CPU_CPPFLAGS = -Os -Ibertos/cpu/avr/ +Modem_PROGRAMMER_CPU = atmega328p +Modem_STOPFLASH_SCRIPT = bertos/prg_scripts/avr/stopflash.sh +Modem_STOPDEBUG_SCRIPT = bertos/prg_scripts/none.sh +Modem_DEBUG_SCRIPT = bertos/prg_scripts/nodebug.sh +Modem_FLASH_SCRIPT = bertos/prg_scripts/avr/flash.sh + +include $(Modem_SRC_PATH)/Modem_user.mk diff --git a/Modem/Modem_user.mk b/Modem/Modem_user.mk new file mode 100644 index 0000000..f6fad09 --- /dev/null +++ b/Modem/Modem_user.mk @@ -0,0 +1,45 @@ +# +# User makefile. +# Edit this file to change compiler options and related stuff. +# + +# Programmer interface configuration, see http://dev.bertos.org/wiki/ProgrammerInterface for help +Modem_PROGRAMMER_TYPE = none +Modem_PROGRAMMER_PORT = none + +# Files included by the user. +Modem_USER_CSRC = \ + $(Modem_SRC_PATH)/main.c \ + $(Modem_HW_PATH)/hardware.c \ + $(Modem_HW_PATH)/afsk.c \ + # + +# Files included by the user. +Modem_USER_PCSRC = \ + # + +# Files included by the user. +Modem_USER_CPPASRC = \ + # + +# Files included by the user. +Modem_USER_CXXSRC = \ + # + +# Files included by the user. +Modem_USER_ASRC = \ + # + +# Flags included by the user. +Modem_USER_LDFLAGS = \ + # + +# Flags included by the user. +Modem_USER_CPPAFLAGS = \ + # + +# Flags included by the user. +Modem_USER_CPPFLAGS = \ + -fno-strict-aliasing \ + -fwrapv \ + # diff --git a/Modem/afsk.c b/Modem/afsk.c new file mode 100644 index 0000000..1c8b187 --- /dev/null +++ b/Modem/afsk.c @@ -0,0 +1,534 @@ +#include "afsk.h" +//#include + +#include "config.h" +#include "hardware.h" + +#include + +#include + +#define HDLC_FLAG 0x7E +#define HDLC_RESET 0x7F +#define AX25_ESC 0x1B + +#define LOG_LEVEL AFSK_LOG_LEVEL +#define LOG_FORMAT AFSK_LOG_FORMAT +#include + +#include +#include +#include + +#include /* memset */ + +#define PHASE_BIT 8 +#define PHASE_INC 1 + +#define PHASE_MAX (SAMPLEPERBIT * PHASE_BIT) +#define PHASE_THRES (PHASE_MAX / 2) // - PHASE_BIT / 2) + +// Modulator constants +#define MARK_FREQ 1200 +#define MARK_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)MARK_FREQ, CONFIG_AFSK_DAC_SAMPLERATE)) + +#define SPACE_FREQ 2200 +#define SPACE_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)SPACE_FREQ, CONFIG_AFSK_DAC_SAMPLERATE)) + +//Ensure sample rate is a multiple of bit rate +STATIC_ASSERT(!(CONFIG_AFSK_DAC_SAMPLERATE % BITRATE)); + +#define DAC_SAMPLEPERBIT (CONFIG_AFSK_DAC_SAMPLERATE / BITRATE) + +/** + * Sine table for the first quarter of wave. + * The rest of the wave is computed from this first quarter. + * This table is used to generate the modulated data. + */ +static const uint8_t PROGMEM sin_table[] = +{ + 128, 129, 131, 132, 134, 135, 137, 138, 140, 142, 143, 145, 146, 148, 149, 151, + 152, 154, 155, 157, 158, 160, 162, 163, 165, 166, 167, 169, 170, 172, 173, 175, + 176, 178, 179, 181, 182, 183, 185, 186, 188, 189, 190, 192, 193, 194, 196, 197, + 198, 200, 201, 202, 203, 205, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217, + 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, + 234, 234, 235, 236, 237, 238, 238, 239, 240, 241, 241, 242, 243, 243, 244, 245, + 245, 246, 246, 247, 248, 248, 249, 249, 250, 250, 250, 251, 251, 252, 252, 252, + 253, 253, 253, 253, 254, 254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255, +}; + +#define SIN_LEN 512 ///< Full wave length + +STATIC_ASSERT(sizeof(sin_table) == SIN_LEN / 4); + + +/** + * Given the index, this function computes the correct sine sample + * based only on the first quarter of wave. + */ +INLINE uint8_t sin_sample(uint16_t idx) +{ + ASSERT(idx < SIN_LEN); + uint16_t new_idx = idx % (SIN_LEN / 2); + new_idx = (new_idx >= (SIN_LEN / 4)) ? (SIN_LEN / 2 - new_idx - 1) : new_idx; + + uint8_t data = pgm_read8(&sin_table[new_idx]); + + return (idx >= (SIN_LEN / 2)) ? (255 - data) : data; +} + + +#define BIT_DIFFER(bitline1, bitline2) (((bitline1) ^ (bitline2)) & 0x01) +#define EDGE_FOUND(bitline) BIT_DIFFER((bitline), (bitline) >> 1) + +/** + * High-Level Data Link Control parsing function. + * Parse bitstream in order to find characters. + * + * \param hdlc HDLC context. + * \param bit current bit to be parsed. + * \param fifo FIFO buffer used to push characters. + * + * \return true if all is ok, false if the fifo is full. + */ +static bool hdlc_parse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo) +{ + bool ret = true; + + hdlc->demod_bits <<= 1; + hdlc->demod_bits |= bit ? 1 : 0; + + /* HDLC Flag */ + if (hdlc->demod_bits == HDLC_FLAG) + { + if (!fifo_isfull(fifo)) + { + fifo_push(fifo, HDLC_FLAG); + hdlc->rxstart = true; + } + else + { + ret = false; + hdlc->rxstart = false; + } + + hdlc->currchar = 0; + hdlc->bit_idx = 0; + return ret; + } + + /* Reset */ + if ((hdlc->demod_bits & HDLC_RESET) == HDLC_RESET) + { + hdlc->rxstart = false; + return ret; + } + + if (!hdlc->rxstart) + return ret; + + /* Stuffed bit */ + if ((hdlc->demod_bits & 0x3f) == 0x3e) + return ret; + + if (hdlc->demod_bits & 0x01) + hdlc->currchar |= 0x80; + + if (++hdlc->bit_idx >= 8) + { + if ((hdlc->currchar == HDLC_FLAG + || hdlc->currchar == HDLC_RESET + || hdlc->currchar == AX25_ESC)) + { + if (!fifo_isfull(fifo)) + fifo_push(fifo, AX25_ESC); + else + { + hdlc->rxstart = false; + ret = false; + } + } + + if (!fifo_isfull(fifo)) + fifo_push(fifo, hdlc->currchar); + else + { + hdlc->rxstart = false; + ret = false; + } + + hdlc->currchar = 0; + hdlc->bit_idx = 0; + } + else + hdlc->currchar >>= 1; + + return ret; +} + + +/** + * ADC ISR callback. + * This function has to be called by the ADC ISR when a sample of the configured + * channel is available. + * \param af Afsk context to operate on. + * \param curr_sample current sample from the ADC. + */ +void afsk_adc_isr(Afsk *af, int8_t curr_sample) +{ + AFSK_STROBE_ON(); + + /* + * Frequency discriminator and LP IIR filter. + * This filter is designed to work + * at the given sample rate and bit rate. + */ + STATIC_ASSERT(SAMPLERATE == 9600); + STATIC_ASSERT(BITRATE == 1200); + + /* + * Frequency discrimination is achieved by simply multiplying + * the sample with a delayed sample of (samples per bit) / 2. + * Then the signal is lowpass filtered with a first order, + * 600 Hz filter. The filter implementation is selectable + * through the CONFIG_AFSK_FILTER config variable. + */ + + af->iir_x[0] = af->iir_x[1]; + + #if (CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH) + af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2; + //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 6.027339492; + #elif (CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV) + af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2; + //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 3.558147322; + #else + #error Filter type not found! + #endif + + af->iir_y[0] = af->iir_y[1]; + + #if CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH + /* + * This strange sum + shift is an optimization for af->iir_y[0] * 0.668. + * iir * 0.668 ~= (iir * 21) / 32 = + * = (iir * 16) / 32 + (iir * 4) / 32 + iir / 32 = + * = iir / 2 + iir / 8 + iir / 32 = + * = iir >> 1 + iir >> 3 + iir >> 5 + */ + af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1) + (af->iir_y[0] >> 3) + (af->iir_y[0] >> 5); + //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.6681786379; + #elif CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV + /* + * This should be (af->iir_y[0] * 0.438) but + * (af->iir_y[0] >> 1) is a faster approximation :-) + */ + af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1); + //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.4379097269; + #endif + + /* Save this sampled bit in a delay line */ + af->sampled_bits <<= 1; + af->sampled_bits |= (af->iir_y[1] > 0) ? 1 : 0; + + /* Store current ADC sample in the af->delay_fifo */ + fifo_push(&af->delay_fifo, curr_sample); + + /* If there is an edge, adjust phase sampling */ + if (EDGE_FOUND(af->sampled_bits)) + { + if (af->curr_phase < PHASE_THRES) + af->curr_phase += PHASE_INC; + else + af->curr_phase -= PHASE_INC; + } + af->curr_phase += PHASE_BIT; + + /* sample the bit */ + if (af->curr_phase >= PHASE_MAX) + { + af->curr_phase %= PHASE_MAX; + + /* Shift 1 position in the shift register of the found bits */ + af->found_bits <<= 1; + + /* + * Determine bit value by reading the last 3 sampled bits. + * If the number of ones is two or greater, the bit value is a 1, + * otherwise is a 0. + * This algorithm presumes that there are 8 samples per bit. + */ + STATIC_ASSERT(SAMPLEPERBIT == 8); + uint8_t bits = af->sampled_bits & 0x07; + if (bits == 0x07 // 111, 3 bits set to 1 + || bits == 0x06 // 110, 2 bits + || bits == 0x05 // 101, 2 bits + || bits == 0x03 // 011, 2 bits + ) + af->found_bits |= 1; + + /* + * NRZI coding: if 2 consecutive bits have the same value + * a 1 is received, otherwise it's a 0. + */ + if (!hdlc_parse(&af->hdlc, !EDGE_FOUND(af->found_bits), &af->rx_fifo)) + af->status |= AFSK_RXFIFO_OVERRUN; + } + + + AFSK_STROBE_OFF(); +} + +static void afsk_txStart(Afsk *af) +{ + if (!af->sending) + { + af->phase_inc = MARK_INC; + af->phase_acc = 0; + af->stuff_cnt = 0; + af->sending = true; + af->preamble_len = DIV_ROUND(CONFIG_AFSK_PREAMBLE_LEN * BITRATE, 8000); + AFSK_DAC_IRQ_START(af->dac_ch); + } + ATOMIC(af->trailer_len = DIV_ROUND(CONFIG_AFSK_TRAILER_LEN * BITRATE, 8000)); +} + +#define BIT_STUFF_LEN 5 + +#define SWITCH_TONE(inc) (((inc) == MARK_INC) ? SPACE_INC : MARK_INC) + +/** + * DAC ISR callback. + * This function has to be called by the DAC ISR when a sample of the configured + * channel has been converted out. + * + * \param af Afsk context to operate on. + * + * \return The next DAC output sample. + */ +uint8_t afsk_dac_isr(Afsk *af) +{ + AFSK_STROBE_ON(); + + /* Check if we are at a start of a sample cycle */ + if (af->sample_count == 0) + { + if (af->tx_bit == 0) + { + /* We have just finished transimitting a char, get a new one. */ + if (fifo_isempty(&af->tx_fifo) && af->trailer_len == 0) + { + AFSK_DAC_IRQ_STOP(af->dac_ch); + af->sending = false; + AFSK_STROBE_OFF(); + return 0; + } + else + { + /* + * If we have just finished sending an unstuffed byte, + * reset bitstuff counter. + */ + if (!af->bit_stuff) + af->stuff_cnt = 0; + + af->bit_stuff = true; + + /* + * Handle preamble and trailer + */ + if (af->preamble_len == 0) + { + if (fifo_isempty(&af->tx_fifo)) + { + af->trailer_len--; + af->curr_out = HDLC_FLAG; + } + else + af->curr_out = fifo_pop(&af->tx_fifo); + } + else + { + af->preamble_len--; + af->curr_out = HDLC_FLAG; + } + + /* Handle char escape */ + if (af->curr_out == AX25_ESC) + { + if (fifo_isempty(&af->tx_fifo)) + { + AFSK_DAC_IRQ_STOP(af->dac_ch); + af->sending = false; + AFSK_STROBE_OFF(); + return 0; + } + else + af->curr_out = fifo_pop(&af->tx_fifo); + } + else if (af->curr_out == HDLC_FLAG || af->curr_out == HDLC_RESET) + /* If these chars are not escaped disable bit stuffing */ + af->bit_stuff = false; + } + /* Start with LSB mask */ + af->tx_bit = 0x01; + } + + /* check for bit stuffing */ + if (af->bit_stuff && af->stuff_cnt >= BIT_STUFF_LEN) + { + /* If there are more than 5 ones in a row insert a 0 */ + af->stuff_cnt = 0; + /* switch tone */ + af->phase_inc = SWITCH_TONE(af->phase_inc); + } + else + { + /* + * NRZI: if we want to transmit a 1 the modulated frequency will stay + * unchanged; with a 0, there will be a change in the tone. + */ + if (af->curr_out & af->tx_bit) + { + /* + * Transmit a 1: + * - Stay on the previous tone + * - Increase bit stuff counter + */ + af->stuff_cnt++; + } + else + { + /* + * Transmit a 0: + * - Reset bit stuff counter + * - Switch tone + */ + af->stuff_cnt = 0; + af->phase_inc = SWITCH_TONE(af->phase_inc); + } + + /* Go to the next bit */ + af->tx_bit <<= 1; + } + af->sample_count = DAC_SAMPLEPERBIT; + } + + /* Get new sample and put it out on the DAC */ + af->phase_acc += af->phase_inc; + af->phase_acc %= SIN_LEN; + + af->sample_count--; + AFSK_STROBE_OFF(); + return sin_sample(af->phase_acc); +} + + +static size_t afsk_read(KFile *fd, void *_buf, size_t size) +{ + Afsk *af = AFSK_CAST(fd); + uint8_t *buf = (uint8_t *)_buf; + + #if CONFIG_AFSK_RXTIMEOUT == 0 + while (size-- && !fifo_isempty_locked(&af->rx_fifo)) + #else + while (size--) + #endif + { + #if CONFIG_AFSK_RXTIMEOUT != -1 + ticks_t start = timer_clock(); + #endif + + while (fifo_isempty_locked(&af->rx_fifo)) + { + cpu_relax(); + #if CONFIG_AFSK_RXTIMEOUT != -1 + if (timer_clock() - start > ms_to_ticks(CONFIG_AFSK_RXTIMEOUT)) + return buf - (uint8_t *)_buf; + #endif + } + + *buf++ = fifo_pop_locked(&af->rx_fifo); + } + + return buf - (uint8_t *)_buf; +} + +static size_t afsk_write(KFile *fd, const void *_buf, size_t size) +{ + Afsk *af = AFSK_CAST(fd); + const uint8_t *buf = (const uint8_t *)_buf; + + while (size--) + { + while (fifo_isfull_locked(&af->tx_fifo)) + cpu_relax(); + + fifo_push_locked(&af->tx_fifo, *buf++); + afsk_txStart(af); + } + + return buf - (const uint8_t *)_buf; +} + +static int afsk_flush(KFile *fd) +{ + Afsk *af = AFSK_CAST(fd); + while (af->sending) + cpu_relax(); + return 0; +} + +static int afsk_error(KFile *fd) +{ + Afsk *af = AFSK_CAST(fd); + int err; + + ATOMIC(err = af->status); + return err; +} + +static void afsk_clearerr(KFile *fd) +{ + Afsk *af = AFSK_CAST(fd); + ATOMIC(af->status = 0); +} + + +/** + * Initialize an AFSK1200 modem. + * \param af Afsk context to operate on. + * \param adc_ch ADC channel used by the demodulator. + * \param dac_ch DAC channel used by the modulator. + */ +void afsk_init(Afsk *af, int adc_ch, int dac_ch) +{ + #if CONFIG_AFSK_RXTIMEOUT != -1 + MOD_CHECK(timer); + #endif + memset(af, 0, sizeof(*af)); + af->adc_ch = adc_ch; + af->dac_ch = dac_ch; + + fifo_init(&af->delay_fifo, (uint8_t *)af->delay_buf, sizeof(af->delay_buf)); + fifo_init(&af->rx_fifo, af->rx_buf, sizeof(af->rx_buf)); + + /* Fill sample FIFO with 0 */ + for (int i = 0; i < SAMPLEPERBIT / 2; i++) + fifo_push(&af->delay_fifo, 0); + + fifo_init(&af->tx_fifo, af->tx_buf, sizeof(af->tx_buf)); + + AFSK_ADC_INIT(adc_ch, af); + AFSK_DAC_INIT(dac_ch, af); + AFSK_STROBE_INIT(); + LOG_INFO("MARK_INC %d, SPACE_INC %d\n", MARK_INC, SPACE_INC); + + DB(af->fd._type = KFT_AFSK); + af->fd.write = afsk_write; + af->fd.read = afsk_read; + af->fd.flush = afsk_flush; + af->fd.error = afsk_error; + af->fd.clearerr = afsk_clearerr; + af->phase_inc = MARK_INC; +} diff --git a/Modem/afsk.h b/Modem/afsk.h new file mode 100644 index 0000000..05c3039 --- /dev/null +++ b/Modem/afsk.h @@ -0,0 +1,185 @@ + +#ifndef NET_AFSK_H +#define NET_AFSK_H + +#include "cfg/cfg_afsk.h" +#include "hw/hw_afsk.h" + +#include + +#include + +#include + + + +/** + * ADC sample rate. + * The demodulator filters are designed to work at this frequency. + * If you need to change this remember to update afsk_adc_isr(). + */ +#define SAMPLERATE 9600 + +/** + * Bitrate of the received/transmitted data. + * The demodulator filters and decoderes are designed to work at this frequency. + * If you need to change this remember to update afsk_adc_isr(). + */ +#define BITRATE 1200 + +#define SAMPLEPERBIT (SAMPLERATE / BITRATE) + +/** + * HDLC (High-Level Data Link Control) context. + * Maybe to be moved in a separate HDLC module one day. + */ +typedef struct Hdlc +{ + uint8_t demod_bits; ///< Bitstream from the demodulator. + uint8_t bit_idx; ///< Current received bit. + uint8_t currchar; ///< Current received character. + bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream. +} Hdlc; + +/** + * RX FIFO buffer full error. + */ +#define AFSK_RXFIFO_OVERRUN BV(0) + +/** + * AFSK1200 modem context. + */ +typedef struct Afsk +{ + /** Base "class" */ + KFile fd; + + /** ADC channel to be used by the demodulator */ + int adc_ch; + + /** DAC channel to be used by the modulator */ + int dac_ch; + + /** Current sample of bit for output data. */ + uint8_t sample_count; + + /** Current character to be modulated */ + uint8_t curr_out; + + /** Mask of current modulated bit */ + uint8_t tx_bit; + + /** True if bit stuff is allowed, false otherwise */ + bool bit_stuff; + + /** Counter for bit stuffing */ + uint8_t stuff_cnt; + /** + * DDS phase accumulator for generating modulated data. + */ + uint16_t phase_acc; + + /** Current phase increment for current modulated bit */ + uint16_t phase_inc; + + /** Delay line used to delay samples by (SAMPLEPERBIT / 2) */ + FIFOBuffer delay_fifo; + + /** + * Buffer for delay FIFO. + * The 1 is added because the FIFO macros need + * 1 byte more to handle a buffer (SAMPLEPERBIT / 2) bytes long. + */ + int8_t delay_buf[SAMPLEPERBIT / 2 + 1]; + + /** FIFO for received data */ + FIFOBuffer rx_fifo; + + /** FIFO rx buffer */ + uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN]; + + /** FIFO for transmitted data */ + FIFOBuffer tx_fifo; + + /** FIFO tx buffer */ + uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN]; + + /** IIR filter X cells, used to filter sampled data by the demodulator */ + int16_t iir_x[2]; + + /** IIR filter Y cells, used to filter sampled data by the demodulator */ + int16_t iir_y[2]; + + /** + * Bits sampled by the demodulator are here. + * Since ADC samplerate is higher than the bitrate, the bits here are + * SAMPLEPERBIT times the bitrate. + */ + uint8_t sampled_bits; + + /** + * Current phase, needed to know when the bitstream at ADC speed + * should be sampled. + */ + int8_t curr_phase; + + /** Bits found by the demodulator at the correct bitrate speed. */ + uint8_t found_bits; + + /** True while modem sends data */ + volatile bool sending; + + /** + * AFSK modem status. + * If 0 all is ok, otherwise errors are present. + */ + volatile int status; + + /** Hdlc context */ + Hdlc hdlc; + + /** + * Preamble length. + * When the AFSK modem wants to send data, before sending the actual data, + * shifts out preamble_len HDLC_FLAG characters. + * This helps to synchronize the demodulator filters on the receiver side. + */ + uint16_t preamble_len; + + /** + * Trailer length. + * After sending the actual data, the AFSK shifts out + * trailer_len HDLC_FLAG characters. + * This helps to synchronize the demodulator filters on the receiver side. + */ + uint16_t trailer_len; +} Afsk; + +#define KFT_AFSK MAKE_ID('A', 'F', 'S', 'K') + +INLINE Afsk *AFSK_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_AFSK); + return (Afsk *)fd; +} + + +void afsk_adc_isr(Afsk *af, int8_t sample); +uint8_t afsk_dac_isr(Afsk *af); +void afsk_init(Afsk *af, int adc_ch, int dac_ch); + + +/** + * \name Afsk filter types. + * $WIZ$ afsk_filter_list = "AFSK_BUTTERWORTH", "AFSK_CHEBYSHEV" + * \{ + */ +#define AFSK_BUTTERWORTH 0 +#define AFSK_CHEBYSHEV 1 +/* \} */ + +int afsk_testSetup(void); +int afsk_testRun(void); +int afsk_testTearDown(void); + +#endif /* NET_AFSK_H */ diff --git a/Modem/cfg/cfg_adc.h b/Modem/cfg/cfg_adc.h new file mode 100644 index 0000000..62ee6ed --- /dev/null +++ b/Modem/cfg/cfg_adc.h @@ -0,0 +1,149 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * This frequency will be rounded down to an integer + * submultiple of CPU_FREQ. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + * $WIZ$ max = 5000000 + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 20 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [ns]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 600 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + + +/** + * Start up timer[s] = startup value / ADCClock [Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_sut" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_SUT ADC_SUT512 + +/** + * Analog Settling Time[s] = settling value / ADCClock[Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_stt" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_STTLING ADC_AST17 + +/** + * Tracking Time[s] = (TRACKTIM + 1) / ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRACKTIM 0 + +/** + * Transfer Period[s] = (TRANSFER * 2 + 3) ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRANSFER 1 + +#endif /* CFG_ADC_H */ diff --git a/Modem/cfg/cfg_afsk.h b/Modem/cfg/cfg_afsk.h new file mode 100644 index 0000000..cce47c1 --- /dev/null +++ b/Modem/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/Modem/cfg/cfg_ax25.h b/Modem/cfg/cfg_ax25.h new file mode 100644 index 0000000..f561d21 --- /dev/null +++ b/Modem/cfg/cfg_ax25.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/Modem/cfg/cfg_battfs.h b/Modem/cfg/cfg_battfs.h new file mode 100644 index 0000000..249dda7 --- /dev/null +++ b/Modem/cfg/cfg_battfs.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/Modem/cfg/cfg_context_switch.h b/Modem/cfg/cfg_context_switch.h new file mode 100644 index 0000000..fe0b4f8 --- /dev/null +++ b/Modem/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/Modem/cfg/cfg_dac.h b/Modem/cfg/cfg_dac.h new file mode 100644 index 0000000..1ae1e98 --- /dev/null +++ b/Modem/cfg/cfg_dac.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for DAC module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DAC_H +#define CFG_DAC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DAC_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DAC_LOG_FORMAT LOG_FMT_TERSE + +/** + * DAC Refresh Period = 1024*REFRESH/DACC Clock + * + * $WIZ$ type = "int" + * $WIZ$ supports = "sam3x" + * $WIZ$ min = 0 + * $WIZ$ max = 65536 + */ +#define CONFIG_DAC_REFRESH 16 + +/** + * DAC Startup Time Selection. + * see datasheet table. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "sam3x" + * $WIZ$ min = 0 + * $WIZ$ max = 63 + */ +#define CONFIG_DAC_STARTUP 0 + +/** + * DAC Trigger Selection. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3x_dac_tc" + * $WIZ$ supports = "sam3x" + */ +#define CONFIG_DAC_TIMER DACC_TRGSEL_TIO_CH0 + +#endif /* CFG_DAC_H */ diff --git a/Modem/cfg/cfg_dataflash.h b/Modem/cfg/cfg_dataflash.h new file mode 100644 index 0000000..4e7dfbd --- /dev/null +++ b/Modem/cfg/cfg_dataflash.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/Modem/cfg/cfg_dc_motor.h b/Modem/cfg/cfg_dc_motor.h new file mode 100644 index 0000000..fd9bac7 --- /dev/null +++ b/Modem/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/Modem/cfg/cfg_debug.h b/Modem/cfg/cfg_debug.h new file mode 100644 index 0000000..1063984 --- /dev/null +++ b/Modem/cfg/cfg_debug.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +/** + * Clock source for the UART module. You need to write the code to reprogram the respective clock at the required frequency in your project before calling kdbg_init(). + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "kdbg_clk_src" + * $WIZ$ supports = "msp430" + */ +#define CONFIG_KDEBUG_CLOCK_SOURCE KDBG_UART_SMCLK + +/** + * Clock frequency. (Only if different from MCLK's frequency, otherwise leave it zero) + * $WIZ$ type = "int"; min = 0 + * $WIZ$ supports = "msp430" + */ +#define CONFIG_KDEBUG_CLOCK_FREQ 0UL + +#endif /* CFG_DEBUG_H */ diff --git a/Modem/cfg/cfg_eeprom.h b/Modem/cfg/cfg_eeprom.h new file mode 100644 index 0000000..b56c1f9 --- /dev/null +++ b/Modem/cfg/cfg_eeprom.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Configuration file for the Eeprom module. + * + * \author Daniele Basile + */ + +#ifndef CFG_EEPROM_H +#define CFG_EEPROM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define EEPROM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define EEPROM_LOG_FORMAT LOG_FMT_TERSE + +/** + * Check this to disable Eeprom deprecated API support. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_EEPROM_DISABLE_OLD_API 0 + +#endif /* CFG_EEPROM_H */ diff --git a/Modem/cfg/cfg_emb_flash.h b/Modem/cfg/cfg_emb_flash.h new file mode 100644 index 0000000..82d96e5 --- /dev/null +++ b/Modem/cfg/cfg_emb_flash.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Configuration file for embedded flash module. + */ + +#ifndef CFG_EMB_FLASH_H +#define CFG_EMB_FLASH_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_FLASH_EMB_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_FLASH_EMB_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Write emb flash timeout. + * For how many milliseconds the cpu wait + * to complete write operation. + * + * $WIZ$ type = "int" + */ +#define CONFIG_FLASH_WR_TIMEOUT 100 + +/** + * Check this to disable embedded flash deprecated API support. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_FLASH_DISABLE_OLD_API 0 + +#endif /* CFG_FLASH_AT91_H */ diff --git a/Modem/cfg/cfg_eth.h b/Modem/cfg/cfg_eth.h new file mode 100644 index 0000000..a378808 --- /dev/null +++ b/Modem/cfg/cfg_eth.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the generic ethernet driver module + */ + +#ifndef CFG_ETH_H +#define CFG_ETH_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ETH_LOG_LEVEL LOG_LVL_WARN + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ETH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_ETH_H */ diff --git a/Modem/cfg/cfg_fat.h b/Modem/cfg/cfg_fat.h new file mode 100644 index 0000000..fcd717a --- /dev/null +++ b/Modem/cfg/cfg_fat.h @@ -0,0 +1,156 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define FAT_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define FAT_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/Modem/cfg/cfg_flash25.h b/Modem/cfg/cfg_flash25.h new file mode 100644 index 0000000..4b478b2 --- /dev/null +++ b/Modem/cfg/cfg_flash25.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/Modem/cfg/cfg_formatwr.h b/Modem/cfg/cfg_formatwr.h new file mode 100644 index 0000000..bac8aca --- /dev/null +++ b/Modem/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/Modem/cfg/cfg_gfx.h b/Modem/cfg/cfg_gfx.h new file mode 100644 index 0000000..59dde04 --- /dev/null +++ b/Modem/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/Modem/cfg/cfg_hashtable.h b/Modem/cfg/cfg_hashtable.h new file mode 100644 index 0000000..e4645f3 --- /dev/null +++ b/Modem/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/Modem/cfg/cfg_heap.h b/Modem/cfg/cfg_heap.h new file mode 100644 index 0000000..e1a37b7 --- /dev/null +++ b/Modem/cfg/cfg_heap.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/Modem/cfg/cfg_i2c.h b/Modem/cfg/cfg_i2c.h new file mode 100644 index 0000000..ea599a8 --- /dev/null +++ b/Modem/cfg/cfg_i2c.h @@ -0,0 +1,83 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * Check this to disable I2c deprecated API support. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_I2C_DISABLE_OLD_API 0 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/Modem/cfg/cfg_i2s.h b/Modem/cfg/cfg_i2s.h new file mode 100644 index 0000000..6657157 --- /dev/null +++ b/Modem/cfg/cfg_i2s.h @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/Modem/cfg/cfg_ini_reader.h b/Modem/cfg/cfg_ini_reader.h new file mode 100644 index 0000000..d0be438 --- /dev/null +++ b/Modem/cfg/cfg_ini_reader.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/Modem/cfg/cfg_kbd.h b/Modem/cfg/cfg_kbd.h new file mode 100644 index 0000000..92aa272 --- /dev/null +++ b/Modem/cfg/cfg_kbd.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/Modem/cfg/cfg_keytag.h b/Modem/cfg/cfg_keytag.h new file mode 100644 index 0000000..8bedadf --- /dev/null +++ b/Modem/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/Modem/cfg/cfg_kfile.h b/Modem/cfg/cfg_kfile.h new file mode 100644 index 0000000..0ebed7b --- /dev/null +++ b/Modem/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/Modem/cfg/cfg_lcd_32122a.h b/Modem/cfg/cfg_lcd_32122a.h new file mode 100644 index 0000000..5a9b3ca --- /dev/null +++ b/Modem/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/Modem/cfg/cfg_lcd_hd44.h b/Modem/cfg/cfg_lcd_hd44.h new file mode 100644 index 0000000..7bea437 --- /dev/null +++ b/Modem/cfg/cfg_lcd_hd44.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +/** + * Number of columns in LCD display. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "lcd_hd44_cols" + */ +#define CONFIG_LCD_COLS LCD_HD44_COLS_16 + +/** + * Number of rows in LCD display. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "lcd_hd44_rows" + */ +#define CONFIG_LCD_ROWS LCD_HD44_ROWS_2 + +#endif /* CFG_LCD_H */ + diff --git a/Modem/cfg/cfg_led_7seg.h b/Modem/cfg/cfg_led_7seg.h new file mode 100644 index 0000000..d854b11 --- /dev/null +++ b/Modem/cfg/cfg_led_7seg.h @@ -0,0 +1,80 @@ +/** + * \file cfg_led_7seg.h + * + * + * \brief Configuration file for led 7 segment display. + * + * \author Fabio Bizzi + * + * \addtogroup SevenSegDisplay 7 Segments LED Displays Driver + * \{ + * + */ + +#ifndef CFG_LED_7SEG_H +#define CFG_LED_7SEG_H + +/** + * Use a Common Cathode display. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LED_7SEG_CCAT 0 + +/** + * Number of digit present in the LED display. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + * $WIZ$ max = 8 + */ +#define CONFIG_LED_7SEG_DIGIT 4 + +/** + * Max lenght of the string to be displayed. + * $WIZ$ type = "int" + * $WIZ$ min = 16 + * $WIZ$ max = 255 + */ +#define CONFIG_LED_7SEG_STRLEN 255 + +/** + * Default scrolling speed (ms * CONFIG_LED_7SEG_RTIME). + * $WIZ$ type = "int" + */ +#define CONFIG_LED_7SEG_SSPEED 10 + +/** + * Default refresh time (ms). + * $WIZ$ type = "int" + */ +#define CONFIG_LED_7SEG_RTIME 5 + +#endif /* CFG_LED_7SEG_H */ + /** \} */ //defgroup drivers + diff --git a/Modem/cfg/cfg_lm75.h b/Modem/cfg/cfg_lm75.h new file mode 100644 index 0000000..91b347a --- /dev/null +++ b/Modem/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/Modem/cfg/cfg_lwip.h b/Modem/cfg/cfg_lwip.h new file mode 100644 index 0000000..73acb91 --- /dev/null +++ b/Modem/cfg/cfg_lwip.h @@ -0,0 +1,1863 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the lwIP TCP/IP stack module + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef CFG_LWIP_H +#define CFG_LWIP_H + +/* + ----------------------------------------------- + ---------- Platform specific locking ---------- + ----------------------------------------------- +*/ + +/** + * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain + * critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#ifndef SYS_LIGHTWEIGHT_PROT +#define SYS_LIGHTWEIGHT_PROT 1 +#endif + +/** + * NO_SYS==1: Provides VERY minimal functionality. Otherwise, + * use lwIP facilities. + */ +#ifndef NO_SYS +#define NO_SYS 0 +#endif + +/** + * MEMCPY: override this if you have a faster implementation at hand than the + * one included in your C library + */ +#ifndef MEMCPY +#define MEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/** + * SMEMCPY: override this with care! Some compilers (e.g. gcc) can inline a + * call to memcpy() if the length is known at compile time and is small. + */ +#ifndef SMEMCPY +#define SMEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/* + ------------------------------------ + ---------- Memory options ---------- + ------------------------------------ +*/ +/** + * MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library + * instead of the lwip internal allocator. Can save code size if you + * already use it. + */ +#ifndef MEM_LIBC_MALLOC +#define MEM_LIBC_MALLOC 0 +#endif + +/** + * Use mem_malloc/mem_free instead of the lwip pool allocator. + * + * $WIZ$ type = "boolean" + */ +#ifndef MEMP_MEM_MALLOC +#define MEMP_MEM_MALLOC 0 +#endif + +/** + * MEM_ALIGNMENT: should be set to the alignment of the CPU + * \verbatim + * 4 byte alignment -> #define MEM_ALIGNMENT 4 + * 2 byte alignment -> #define MEM_ALIGNMENT 2 + * \endverbatim + */ +#ifndef MEM_ALIGNMENT +#define MEM_ALIGNMENT 4 +#endif + +/** + * The size of the lwIP heap memory. + * + * If the application will send a lot of data that needs to be copied, this + * should be set high. + * + * $WIZ$ type = "int"; min = 1600 + */ +#define MEM_SIZE 1600 + +/** + * Dynamic pool memory overflow protection check level. + * + * MEMP_OVERFLOW_CHECK == 0 no checking + * MEMP_OVERFLOW_CHECK == 1 checks each element when it is freed + * MEMP_OVERFLOW_CHECK >= 2 checks each element in every pool every time + * memp_malloc() or memp_free() is called (useful but slow!) + * + * $WIZ$ type = "int"; min = "0"; max = "2" + */ +#define MEMP_OVERFLOW_CHECK 0 + +/** + * Run a sanity check after each memp_free(). + * + * $WIZ$ type = "boolean" + */ +#define MEMP_SANITY_CHECK 0 + +/** + * MEM_USE_POOLS==1: Use an alternative to malloc() by allocating from a set + * of memory pools of various sizes. When mem_malloc is called, an element of + * the smallest pool that can provide the length needed is returned. + * To use this, MEMP_USE_CUSTOM_POOLS also has to be enabled. + */ +#ifndef MEM_USE_POOLS +#define MEM_USE_POOLS 0 +#endif + +/** + * MEM_USE_POOLS_TRY_BIGGER_POOL==1: if one malloc-pool is empty, try the next + * bigger pool - WARNING: THIS MIGHT WASTE MEMORY but it can make a system more + * reliable. */ +#ifndef MEM_USE_POOLS_TRY_BIGGER_POOL +#define MEM_USE_POOLS_TRY_BIGGER_POOL 0 +#endif + +/** + * MEMP_USE_CUSTOM_POOLS==1: whether to include a user file lwippools.h + * that defines additional pools beyond the "standard" ones required + * by lwIP. If you set this to 1, you must have lwippools.h in your + * inlude path somewhere. + */ +#ifndef MEMP_USE_CUSTOM_POOLS +#define MEMP_USE_CUSTOM_POOLS 0 +#endif + +/** + * Set this to 1 if you want to free PBUF_RAM pbufs (or call mem_free()) from + * interrupt context (or another context that doesn't allow waiting for a + * semaphore). + * If set to 1, mem_malloc will be protected by a semaphore and SYS_ARCH_PROTECT, + * while mem_free will only use SYS_ARCH_PROTECT. mem_malloc SYS_ARCH_UNPROTECTs + * with each loop so that mem_free can run. + * + * ATTENTION: As you can see from the above description, this leads to dis-/ + * enabling interrupts often, which can be slow! Also, on low memory, mem_malloc + * can need longer. + * + * If you don't want that, at least for NO_SYS=0, you can still use the following + * functions to enqueue a deallocation call which then runs in the tcpip_thread + * context: + * - pbuf_free_callback(p); + * - mem_free_callback(m); + */ +#ifndef LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT +#define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0 +#endif + +/* + ------------------------------------------------ + ---------- Internal Memory Pool Sizes ---------- + ------------------------------------------------ +*/ +/** + * MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF). + * If the application sends a lot of data out of ROM (or other static memory), + * this should be set high. + */ +#ifndef MEMP_NUM_PBUF +#define MEMP_NUM_PBUF 16 +#endif + +/** + * MEMP_NUM_RAW_PCB: Number of raw connection PCBs + * (requires the LWIP_RAW option) + */ +#ifndef MEMP_NUM_RAW_PCB +#define MEMP_NUM_RAW_PCB 4 +#endif + +/** + * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One + * per active UDP "connection". + * (requires the LWIP_UDP option) + */ +#ifndef MEMP_NUM_UDP_PCB +#define MEMP_NUM_UDP_PCB 4 +#endif + +/** + * MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB +#define MEMP_NUM_TCP_PCB 5 +#endif + +/** + * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB_LISTEN +#define MEMP_NUM_TCP_PCB_LISTEN 8 +#endif + +/** + * MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_SEG +#define MEMP_NUM_TCP_SEG 16 +#endif + +/** + * MEMP_NUM_REASSDATA: the number of simultaneously IP packets queued for + * reassembly (whole packets, not fragments!) + */ +#ifndef MEMP_NUM_REASSDATA +#define MEMP_NUM_REASSDATA 5 +#endif + +/** + * MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing + * packets (pbufs) that are waiting for an ARP request (to resolve + * their destination address) to finish. + * (requires the ARP_QUEUEING option) + */ +#ifndef MEMP_NUM_ARP_QUEUE +#define MEMP_NUM_ARP_QUEUE 30 +#endif + +/** + * MEMP_NUM_IGMP_GROUP: The number of multicast groups whose network interfaces + * can be members et the same time (one per netif - allsystems group -, plus one + * per netif membership). + * (requires the LWIP_IGMP option) + */ +#ifndef MEMP_NUM_IGMP_GROUP +#define MEMP_NUM_IGMP_GROUP 8 +#endif + +/** + * MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts. + * (requires NO_SYS==0) + */ +#ifndef MEMP_NUM_SYS_TIMEOUT +#define MEMP_NUM_SYS_TIMEOUT 8 +#endif + +/** + * MEMP_NUM_NETBUF: the number of struct netbufs. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETBUF +#define MEMP_NUM_NETBUF 2 +#endif + +/** + * MEMP_NUM_NETCONN: the number of struct netconns. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETCONN +#define MEMP_NUM_NETCONN 4 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used + * for callback/timeout API communication. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_API +#define MEMP_NUM_TCPIP_MSG_API 8 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used + * for incoming packets. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_INPKT +#define MEMP_NUM_TCPIP_MSG_INPKT 8 +#endif + +/** + * PBUF_POOL_SIZE: the number of buffers in the pbuf pool. + */ +#ifndef PBUF_POOL_SIZE +#define PBUF_POOL_SIZE 16 +#endif + +/* + --------------------------------- + ---------- ARP options ---------- + --------------------------------- +*/ +/** + * LWIP_ARP==1: Enable ARP functionality. + */ +#ifndef LWIP_ARP +#define LWIP_ARP 1 +#endif + +/** + * ARP_TABLE_SIZE: Number of active MAC-IP address pairs cached. + */ +#ifndef ARP_TABLE_SIZE +#define ARP_TABLE_SIZE 10 +#endif + +/** + * ARP_QUEUEING==1: Outgoing packets are queued during hardware address + * resolution. + */ +#ifndef ARP_QUEUEING +#define ARP_QUEUEING 1 +#endif + +/** + * ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be + * updated with the source MAC and IP addresses supplied in the packet. + * You may want to disable this if you do not trust LAN peers to have the + * correct addresses, or as a limited approach to attempt to handle + * spoofing. If disabled, lwIP will need to make a new ARP request if + * the peer is not already in the ARP table, adding a little latency. + */ +#ifndef ETHARP_TRUST_IP_MAC +#define ETHARP_TRUST_IP_MAC 1 +#endif + +/** + * ETHARP_SUPPORT_VLAN==1: support receiving ethernet packets with VLAN header. + * Additionally, you can define ETHARP_VLAN_CHECK to an u16_t VLAN ID to check. + * If ETHARP_VLAN_CHECK is defined, only VLAN-traffic for this VLAN is accepted. + * If ETHARP_VLAN_CHECK is not defined, all traffic is accepted. + */ +#ifndef ETHARP_SUPPORT_VLAN +#define ETHARP_SUPPORT_VLAN 0 +#endif + +/* + -------------------------------- + ---------- IP options ---------- + -------------------------------- +*/ +/** + * IP_FORWARD==1: Enables the ability to forward IP packets across network + * interfaces. If you are going to run lwIP on a device with only one network + * interface, define this to 0. + */ +#ifndef IP_FORWARD +#define IP_FORWARD 0 +#endif + +/** + * IP_OPTIONS_ALLOWED: Defines the behavior for IP options. + * IP_OPTIONS_ALLOWED==0: All packets with IP options are dropped. + * IP_OPTIONS_ALLOWED==1: IP options are allowed (but not parsed). + */ +#ifndef IP_OPTIONS_ALLOWED +#define IP_OPTIONS_ALLOWED 1 +#endif + +/** + * Reassemble incoming fragmented IP packets. + * + * $WIZ$ type = "boolean" + */ +#define IP_REASSEMBLY 1 + +/** + * Fragment outgoing IP packets if their size exceeds MTU. + * + * $WIZ$ type = "boolean" + */ +#define IP_FRAG 1 + +/** + * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) + * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived + * in this time, the whole packet is discarded. + */ +#ifndef IP_REASS_MAXAGE +#define IP_REASS_MAXAGE 3 +#endif + +/** + * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled. + * Since the received pbufs are enqueued, be sure to configure + * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive + * packets even if the maximum amount of fragments is enqueued for reassembly! + */ +#ifndef IP_REASS_MAX_PBUFS +#define IP_REASS_MAX_PBUFS 10 +#endif + +/** + * IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP + * fragmentation. Otherwise pbufs are allocated and reference the original + * packet data to be fragmented. + */ +#ifndef IP_FRAG_USES_STATIC_BUF +#define IP_FRAG_USES_STATIC_BUF 1 +#endif + +/** + * IP_FRAG_MAX_MTU: Assumed max MTU on any interface for IP frag buffer + * (requires IP_FRAG_USES_STATIC_BUF==1) + */ +#if IP_FRAG_USES_STATIC_BUF && !defined(IP_FRAG_MAX_MTU) +#define IP_FRAG_MAX_MTU 1500 +#endif + +/** + * IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers. + */ +#ifndef IP_DEFAULT_TTL +#define IP_DEFAULT_TTL 255 +#endif + +/** + * IP_SOF_BROADCAST=1: Use the SOF_BROADCAST field to enable broadcast + * filter per pcb on udp and raw send operations. To enable broadcast filter + * on recv operations, you also have to set IP_SOF_BROADCAST_RECV=1. + */ +#ifndef IP_SOF_BROADCAST +#define IP_SOF_BROADCAST 0 +#endif + +/** + * IP_SOF_BROADCAST_RECV (requires IP_SOF_BROADCAST=1) enable the broadcast + * filter on recv operations. + */ +#ifndef IP_SOF_BROADCAST_RECV +#define IP_SOF_BROADCAST_RECV 0 +#endif + +/* + ---------------------------------- + ---------- ICMP options ---------- + ---------------------------------- +*/ +/** + * Enable ICMP module inside the IP stack. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_ICMP 1 + +/** + * ICMP_TTL: Default value for Time-To-Live used by ICMP packets. + */ +#ifndef ICMP_TTL +#define ICMP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_BROADCAST_PING==1: respond to broadcast pings (default is unicast only) + */ +#ifndef LWIP_BROADCAST_PING +#define LWIP_BROADCAST_PING 0 +#endif + +/** + * LWIP_MULTICAST_PING==1: respond to multicast pings (default is unicast only) + */ +#ifndef LWIP_MULTICAST_PING +#define LWIP_MULTICAST_PING 0 +#endif + +/* + --------------------------------- + ---------- RAW options ---------- + --------------------------------- +*/ +/** + * Enable application layer to hook into the IP layer itself. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_RAW 1 + +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef RAW_TTL +#define RAW_TTL (IP_DEFAULT_TTL) +#endif + +/* + ---------------------------------- + ---------- DHCP options ---------- + ---------------------------------- +*/ +/** + * Enable DHCP module. UDP must be also available. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_DHCP 1 + +/** + * DHCP_DOES_ARP_CHECK==1: Do an ARP check on the offered address. + */ +#ifndef DHCP_DOES_ARP_CHECK +#define DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP)) +#endif + +/* + ------------------------------------ + ---------- AUTOIP options ---------- + ------------------------------------ +*/ +/** + * LWIP_AUTOIP==1: Enable AUTOIP module. + */ +#ifndef LWIP_AUTOIP +#define LWIP_AUTOIP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on + * the same interface at the same time. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP +#define LWIP_DHCP_AUTOIP_COOP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes + * that should be sent before falling back on AUTOIP. This can be set + * as low as 1 to get an AutoIP address very quickly, but you should + * be prepared to handle a changing IP address when DHCP overrides + * AutoIP. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP_TRIES +#define LWIP_DHCP_AUTOIP_COOP_TRIES 9 +#endif + +/* + ---------------------------------- + ---------- SNMP options ---------- + ---------------------------------- +*/ +/** + * Turn on SNMP module. UDP must be also available. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_SNMP 0 + +/** + * SNMP_CONCURRENT_REQUESTS: Number of concurrent requests the module will + * allow. At least one request buffer is required. + */ +#ifndef SNMP_CONCURRENT_REQUESTS +#define SNMP_CONCURRENT_REQUESTS 1 +#endif + +/** + * SNMP_TRAP_DESTINATIONS: Number of trap destinations. At least one trap + * destination is required + */ +#ifndef SNMP_TRAP_DESTINATIONS +#define SNMP_TRAP_DESTINATIONS 1 +#endif + +/** + * SNMP_PRIVATE_MIB: + */ +#ifndef SNMP_PRIVATE_MIB +#define SNMP_PRIVATE_MIB 0 +#endif + +/** + * Only allow SNMP write actions that are 'safe' (e.g. disabeling netifs is not + * a safe action and disabled when SNMP_SAFE_REQUESTS = 1). + * Unsafe requests are disabled by default! + */ +#ifndef SNMP_SAFE_REQUESTS +#define SNMP_SAFE_REQUESTS 1 +#endif + +/* + ---------------------------------- + ---------- IGMP options ---------- + ---------------------------------- +*/ +/** + * Turn on IGMP module. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_IGMP 0 + +/* + ---------------------------------- + ---------- DNS options ----------- + ---------------------------------- +*/ +/** + * Turn on DNS module. UDP must be available for DNS transport. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_DNS 0 + +/** DNS maximum number of entries to maintain locally. */ +#ifndef DNS_TABLE_SIZE +#define DNS_TABLE_SIZE 4 +#endif + +/** DNS maximum host name length supported in the name table. */ +#ifndef DNS_MAX_NAME_LENGTH +#define DNS_MAX_NAME_LENGTH 256 +#endif + +/** The maximum of DNS servers */ +#ifndef DNS_MAX_SERVERS +#define DNS_MAX_SERVERS 2 +#endif + +/** DNS do a name checking between the query and the response. */ +#ifndef DNS_DOES_NAME_CHECK +#define DNS_DOES_NAME_CHECK 1 +#endif + +/** DNS use a local buffer if DNS_USES_STATIC_BUF=0, a static one if + DNS_USES_STATIC_BUF=1, or a dynamic one if DNS_USES_STATIC_BUF=2. + The buffer will be of size DNS_MSG_SIZE */ +#ifndef DNS_USES_STATIC_BUF +#define DNS_USES_STATIC_BUF 1 +#endif + +/** DNS message max. size. Default value is RFC compliant. */ +#ifndef DNS_MSG_SIZE +#define DNS_MSG_SIZE 512 +#endif + +/** DNS_LOCAL_HOSTLIST: Implements a local host-to-address list. If enabled, + * you have to define + * \code + * #define DNS_LOCAL_HOSTLIST_INIT {{"host1", 0x123}, {"host2", 0x234}} + * \endcode + * (an array of structs name/address, where address is an u32_t in network + * byte order). + * + * Instead, you can also use an external function: + * \code + * #define DNS_LOOKUP_LOCAL_EXTERN(x) extern u32_t my_lookup_function(const char *name) + * \endcode + * that returns the IP address or INADDR_NONE if not found. + */ +#ifndef DNS_LOCAL_HOSTLIST +#define DNS_LOCAL_HOSTLIST 0 +#endif /* DNS_LOCAL_HOSTLIST */ + +/** If this is turned on, the local host-list can be dynamically changed + * at runtime. */ +#ifndef DNS_LOCAL_HOSTLIST_IS_DYNAMIC +#define DNS_LOCAL_HOSTLIST_IS_DYNAMIC 0 +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +/* + --------------------------------- + ---------- UDP options ---------- + --------------------------------- +*/ +/** + * Turn on UDP. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_UDP 1 + +/** + * LWIP_UDPLITE==1: Turn on UDP-Lite. (Requires LWIP_UDP) + */ +#ifndef LWIP_UDPLITE +#define LWIP_UDPLITE 0 +#endif + +/** + * UDP_TTL: Default Time-To-Live value. + */ +#ifndef UDP_TTL +#define UDP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_NETBUF_RECVINFO==1: append destination addr and port to every netbuf. + */ +#ifndef LWIP_NETBUF_RECVINFO +#define LWIP_NETBUF_RECVINFO 0 +#endif + +/* + --------------------------------- + ---------- TCP options ---------- + --------------------------------- +*/ +/** + * Turn on TCP. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_TCP 1 + +/** + * TCP_TTL: Default Time-To-Live value. + */ +#ifndef TCP_TTL +#define TCP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * TCP_WND: The size of a TCP window. This must be at least + * (2 * TCP_MSS) for things to work well + */ +#ifndef TCP_WND +#define TCP_WND (4 * TCP_MSS) +#endif + +/** + * TCP_MAXRTX: Maximum number of retransmissions of data segments. + */ +#ifndef TCP_MAXRTX +#define TCP_MAXRTX 12 +#endif + +/** + * TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments. + */ +#ifndef TCP_SYNMAXRTX +#define TCP_SYNMAXRTX 6 +#endif + +/** + * TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order. + * Define to 0 if your device is low on memory. + */ +#ifndef TCP_QUEUE_OOSEQ +#define TCP_QUEUE_OOSEQ (LWIP_TCP) +#endif + +/** + * TCP_MSS: TCP Maximum segment size. (default is 536, a conservative default, + * you might want to increase this.) + * For the receive side, this MSS is advertised to the remote side + * when opening a connection. For the transmit size, this MSS sets + * an upper limit on the MSS advertised by the remote host. + */ +#ifndef TCP_MSS +#define TCP_MSS 536 +#endif + +/** + * TCP_CALCULATE_EFF_SEND_MSS: "The maximum size of a segment that TCP really + * sends, the 'effective send MSS,' MUST be the smaller of the send MSS (which + * reflects the available reassembly buffer size at the remote host) and the + * largest size permitted by the IP layer" (RFC 1122) + * Setting this to 1 enables code that checks TCP_MSS against the MTU of the + * netif used for a connection and limits the MSS if it would be too big otherwise. + */ +#ifndef TCP_CALCULATE_EFF_SEND_MSS +#define TCP_CALCULATE_EFF_SEND_MSS 1 +#endif + + +/** + * TCP_SND_BUF: TCP sender buffer space (bytes). + */ +#ifndef TCP_SND_BUF +#define TCP_SND_BUF (2 * TCP_MSS) +#endif + +/** + * TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least + * as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. + */ +#ifndef TCP_SND_QUEUELEN +#define TCP_SND_QUEUELEN (4 * (TCP_SND_BUF)/(TCP_MSS)) +#endif + +/** + * TCP_SNDLOWAT: TCP writable space (bytes). This must be less than or equal + * to TCP_SND_BUF. It is the amount of space which must be available in the + * TCP snd_buf for select to return writable. + */ +#ifndef TCP_SNDLOWAT +#define TCP_SNDLOWAT ((TCP_SND_BUF)/2) +#endif + +/** + * TCP_LISTEN_BACKLOG: Enable the backlog option for tcp listen pcb. + */ +#ifndef TCP_LISTEN_BACKLOG +#define TCP_LISTEN_BACKLOG 0 +#endif + +/** + * The maximum allowed backlog for TCP listen netconns. + * This backlog is used unless another is explicitly specified. + * 0xff is the maximum (u8_t). + */ +#ifndef TCP_DEFAULT_LISTEN_BACKLOG +#define TCP_DEFAULT_LISTEN_BACKLOG 0xff +#endif + +/** + * LWIP_TCP_TIMESTAMPS==1: support the TCP timestamp option. + */ +#ifndef LWIP_TCP_TIMESTAMPS +#define LWIP_TCP_TIMESTAMPS 0 +#endif + +/** + * TCP_WND_UPDATE_THRESHOLD: difference in window to trigger an + * explicit window update + */ +#ifndef TCP_WND_UPDATE_THRESHOLD +#define TCP_WND_UPDATE_THRESHOLD (TCP_WND / 4) +#endif + +/* + ---------------------------------- + ---------- Pbuf options ---------- + ---------------------------------- +*/ +/** + * PBUF_LINK_HLEN: the number of bytes that should be allocated for a + * link level header. The default is 14, the standard value for + * Ethernet. + */ +#ifndef PBUF_LINK_HLEN +#define PBUF_LINK_HLEN 14 +#endif + +/** + * PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. The default is + * designed to accomodate single full size TCP frame in one pbuf, including + * TCP_MSS, IP header, and link header. + */ +#ifndef PBUF_POOL_BUFSIZE +#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN) +#endif + +/* + ------------------------------------------------ + ---------- Network Interfaces options ---------- + ------------------------------------------------ +*/ +/** + * Use DHCP_OPTION_HOSTNAME with netif's hostname field. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_NETIF_HOSTNAME 1 + +/** + * Support netif api (in netifapi.c) + * + * $WIZ$ type = "boolean" + */ +#define LWIP_NETIF_API 0 + +/** + * LWIP_NETIF_STATUS_CALLBACK==1: Support a callback function whenever an interface + * changes its up/down status (i.e., due to DHCP IP acquistion) + */ +#ifndef LWIP_NETIF_STATUS_CALLBACK +#define LWIP_NETIF_STATUS_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface + * whenever the link changes (i.e., link down) + */ +#ifndef LWIP_NETIF_LINK_CALLBACK +#define LWIP_NETIF_LINK_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_HWADDRHINT==1: Cache link-layer-address hints (e.g. table + * indices) in struct netif. TCP and UDP can make use of this to prevent + * scanning the ARP table for every sent packet. While this is faster for big + * ARP tables or many concurrent connections, it might be counterproductive + * if you have a tiny ARP table or if there never are concurrent connections. + */ +#ifndef LWIP_NETIF_HWADDRHINT +#define LWIP_NETIF_HWADDRHINT 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP + * address equal to the netif IP address, looping them back up the stack. + */ +#ifndef LWIP_NETIF_LOOPBACK +#define LWIP_NETIF_LOOPBACK 0 +#endif + +/** + * LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback + * sending for each netif (0 = disabled) + */ +#ifndef LWIP_LOOPBACK_MAX_PBUFS +#define LWIP_LOOPBACK_MAX_PBUFS 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK_MULTITHREADING: Indicates whether threading is enabled in + * the system, as netifs must change how they behave depending on this setting + * for the LWIP_NETIF_LOOPBACK option to work. + * Setting this is needed to avoid reentering non-reentrant functions like + * tcp_input(). + * LWIP_NETIF_LOOPBACK_MULTITHREADING==1: Indicates that the user is using a + * multithreaded environment like tcpip.c. In this case, netif->input() + * is called directly. + * LWIP_NETIF_LOOPBACK_MULTITHREADING==0: Indicates a polling (or NO_SYS) setup. + * The packets are put on a list and netif_poll() must be called in + * the main application loop. + */ +#ifndef LWIP_NETIF_LOOPBACK_MULTITHREADING +#define LWIP_NETIF_LOOPBACK_MULTITHREADING (!NO_SYS) +#endif + +/** + * LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP tries to put all data + * to be sent into one single pbuf. This is for compatibility with DMA-enabled + * MACs that do not support scatter-gather. + * Beware that this might involve CPU-memcpy before transmitting that would not + * be needed without this flag! Use this only if you need to! + * + * @todo: TCP and IP-frag do not work with this, yet: + */ +#ifndef LWIP_NETIF_TX_SINGLE_PBUF +#define LWIP_NETIF_TX_SINGLE_PBUF 0 +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + +/* + ------------------------------------ + ---------- LOOPIF options ---------- + ------------------------------------ +*/ +/** + * Support loop interface (127.0.0.1) and loopif.c + * + * $WIZ$ type = "boolean" + */ +#define LWIP_HAVE_LOOPIF 0 + +/* + ------------------------------------ + ---------- SLIPIF options ---------- + ------------------------------------ +*/ +/** + * Support slip interface and slipif.c + * + * $WIZ$ type = "boolean" + */ +#define LWIP_HAVE_SLIPIF 0 + +/* + ------------------------------------ + ---------- Thread options ---------- + ------------------------------------ +*/ +/** + * TCPIP_THREAD_NAME: The name assigned to the main tcpip thread. + */ +#ifndef TCPIP_THREAD_NAME +#define TCPIP_THREAD_NAME "tcpip_thread" +#endif + +/** + * TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_STACKSIZE +#define TCPIP_THREAD_STACKSIZE (KERN_MINSTACKSIZE * 3) +#endif + +/** + * TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_PRIO +#define TCPIP_THREAD_PRIO 0 +#endif + +/** + * TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when tcpip_init is called. + */ +#ifndef TCPIP_MBOX_SIZE +#define TCPIP_MBOX_SIZE 0 +#endif + +/** + * SLIPIF_THREAD_NAME: The name assigned to the slipif_loop thread. + */ +#ifndef SLIPIF_THREAD_NAME +#define SLIPIF_THREAD_NAME "slipif_loop" +#endif + +/** + * SLIP_THREAD_STACKSIZE: The stack size used by the slipif_loop thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_STACKSIZE +#define SLIPIF_THREAD_STACKSIZE 0 +#endif + +/** + * SLIPIF_THREAD_PRIO: The priority assigned to the slipif_loop thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_PRIO +#define SLIPIF_THREAD_PRIO 1 +#endif + +/** + * PPP_THREAD_NAME: The name assigned to the pppMain thread. + */ +#ifndef PPP_THREAD_NAME +#define PPP_THREAD_NAME "pppMain" +#endif + +/** + * PPP_THREAD_STACKSIZE: The stack size used by the pppMain thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_STACKSIZE +#define PPP_THREAD_STACKSIZE 0 +#endif + +/** + * PPP_THREAD_PRIO: The priority assigned to the pppMain thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_PRIO +#define PPP_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_THREAD_NAME: The name assigned to any other lwIP thread. + */ +#ifndef DEFAULT_THREAD_NAME +#define DEFAULT_THREAD_NAME "lwIP" +#endif + +/** + * DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_STACKSIZE +#define DEFAULT_THREAD_STACKSIZE (KERN_MINSTACKSIZE * 3) +#endif + +/** + * DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_PRIO +#define DEFAULT_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_RAW. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_RAW_RECVMBOX_SIZE +#define DEFAULT_RAW_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_UDP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_UDP_RECVMBOX_SIZE +#define DEFAULT_UDP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_TCP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_TCP_RECVMBOX_SIZE +#define DEFAULT_TCP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections. + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when the acceptmbox is created. + */ +#ifndef DEFAULT_ACCEPTMBOX_SIZE +#define DEFAULT_ACCEPTMBOX_SIZE 0 +#endif + +/* + ---------------------------------------------- + ---------- Sequential layer options ---------- + ---------------------------------------------- +*/ +/** + * LWIP_TCPIP_CORE_LOCKING: (EXPERIMENTAL!) + * Don't use it if you're not an active lwIP project member + */ +#ifndef LWIP_TCPIP_CORE_LOCKING +#define LWIP_TCPIP_CORE_LOCKING 0 +#endif + +/** + * Enable Netconn API (require to use api_lib.c) + * + * $WIZ$ type = "boolean" + */ +#define LWIP_NETCONN 1 + +/* + ------------------------------------ + ---------- Socket options ---------- + ------------------------------------ +*/ +/** + * Enable Socket API (require to use sockets.c) + * + * $WIZ$ type = "boolean" + */ +#define LWIP_SOCKET 1 +#if LWIP_SOCKET + /* + * The sockets.c file requires this macro to be defined to really + * set errno on errors. + */ + #define ERRNO +#endif + +/** + * Enable BSD-style sockets functions names. + * + * NOTE: do not change this!!! + */ +#ifndef LWIP_COMPAT_SOCKETS +#define LWIP_COMPAT_SOCKETS 0 +#endif + +/** + * LWIP_POSIX_SOCKETS_IO_NAMES==1: Enable POSIX-style sockets functions names. + * Disable this option if you use a POSIX operating system that uses the same + * names (read, write & close). (only used if you use sockets.c) + */ +#ifndef LWIP_POSIX_SOCKETS_IO_NAMES +#define LWIP_POSIX_SOCKETS_IO_NAMES 0 +#endif + +/** + * LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT + * options processing. Note that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set + * in seconds. (does not require sockets.c, and will affect tcp.c) + */ +#ifndef LWIP_TCP_KEEPALIVE +#define LWIP_TCP_KEEPALIVE 0 +#endif + +/** + * LWIP_SO_RCVTIMEO==1: Enable SO_RCVTIMEO processing. + */ +#ifndef LWIP_SO_RCVTIMEO +#define LWIP_SO_RCVTIMEO 0 +#endif + +/** + * LWIP_SO_RCVBUF==1: Enable SO_RCVBUF processing. + */ +#ifndef LWIP_SO_RCVBUF +#define LWIP_SO_RCVBUF 0 +#endif + +/** + * If LWIP_SO_RCVBUF is used, this is the default value for recv_bufsize. + */ +#ifndef RECV_BUFSIZE_DEFAULT +#define RECV_BUFSIZE_DEFAULT INT_MAX +#endif + +/** + * SO_REUSE==1: Enable SO_REUSEADDR and SO_REUSEPORT options. DO NOT USE! + */ +#ifndef SO_REUSE +#define SO_REUSE 0 +#endif + +/* + ---------------------------------------- + ---------- Statistics options ---------- + ---------------------------------------- +*/ +/** + * LWIP_STATS==1: Enable statistics collection in lwip_stats. + */ +#ifndef LWIP_STATS +#define LWIP_STATS 0 +#endif + +#if LWIP_STATS + +/** + * LWIP_STATS_DISPLAY==1: Compile in the statistics output functions. + */ +#ifndef LWIP_STATS_DISPLAY +#define LWIP_STATS_DISPLAY 0 +#endif + +/** + * LINK_STATS==1: Enable link stats. + */ +#ifndef LINK_STATS +#define LINK_STATS 1 +#endif + +/** + * ETHARP_STATS==1: Enable etharp stats. + */ +#ifndef ETHARP_STATS +#define ETHARP_STATS (LWIP_ARP) +#endif + +/** + * IP_STATS==1: Enable IP stats. + */ +#ifndef IP_STATS +#define IP_STATS 1 +#endif + +/** + * IPFRAG_STATS==1: Enable IP fragmentation stats. Default is + * on if using either frag or reass. + */ +#ifndef IPFRAG_STATS +#define IPFRAG_STATS (IP_REASSEMBLY || IP_FRAG) +#endif + +/** + * ICMP_STATS==1: Enable ICMP stats. + */ +#ifndef ICMP_STATS +#define ICMP_STATS 1 +#endif + +/** + * IGMP_STATS==1: Enable IGMP stats. + */ +#ifndef IGMP_STATS +#define IGMP_STATS (LWIP_IGMP) +#endif + +/** + * UDP_STATS==1: Enable UDP stats. Default is on if + * UDP enabled, otherwise off. + */ +#ifndef UDP_STATS +#define UDP_STATS (LWIP_UDP) +#endif + +/** + * TCP_STATS==1: Enable TCP stats. Default is on if TCP + * enabled, otherwise off. + */ +#ifndef TCP_STATS +#define TCP_STATS (LWIP_TCP) +#endif + +/** + * MEM_STATS==1: Enable mem.c stats. + */ +#ifndef MEM_STATS +#define MEM_STATS ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0)) +#endif + +/** + * MEMP_STATS==1: Enable memp.c pool stats. + */ +#ifndef MEMP_STATS +#define MEMP_STATS (MEMP_MEM_MALLOC == 0) +#endif + +/** + * SYS_STATS==1: Enable system stats (sem and mbox counts, etc). + */ +#ifndef SYS_STATS +#define SYS_STATS (NO_SYS == 0) +#endif + +#else + +#define LINK_STATS 0 +#define ETHARP_STATS 0 +#define IP_STATS 0 +#define IPFRAG_STATS 0 +#define ICMP_STATS 0 +#define IGMP_STATS 0 +#define UDP_STATS 0 +#define TCP_STATS 0 +#define MEM_STATS 0 +#define MEMP_STATS 0 +#define SYS_STATS 0 +#define LWIP_STATS_DISPLAY 0 + +#endif /* LWIP_STATS */ + +/* + --------------------------------- + ---------- PPP options ---------- + --------------------------------- +*/ +/** + * Enable PPP. + * + * $WIZ$ type = "boolean" + */ +#define PPP_SUPPORT 0 + +/** + * Enable PPP Over Ethernet. + * + * $WIZ$ type = "boolean" + */ +#define PPPOE_SUPPORT 0 + +/** + * PPPOS_SUPPORT==1: Enable PPP Over Serial + */ +#ifndef PPPOS_SUPPORT +#define PPPOS_SUPPORT PPP_SUPPORT +#endif + +#if PPP_SUPPORT + +/** + * NUM_PPP: Max PPP sessions. + */ +#ifndef NUM_PPP +#define NUM_PPP 1 +#endif + +/** + * PAP_SUPPORT==1: Support PAP. + */ +#ifndef PAP_SUPPORT +#define PAP_SUPPORT 0 +#endif + +/** + * CHAP_SUPPORT==1: Support CHAP. + */ +#ifndef CHAP_SUPPORT +#define CHAP_SUPPORT 0 +#endif + +/** + * MSCHAP_SUPPORT==1: Support MSCHAP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef MSCHAP_SUPPORT +#define MSCHAP_SUPPORT 0 +#endif + +/** + * CBCP_SUPPORT==1: Support CBCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CBCP_SUPPORT +#define CBCP_SUPPORT 0 +#endif + +/** + * CCP_SUPPORT==1: Support CCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CCP_SUPPORT +#define CCP_SUPPORT 0 +#endif + +/** + * VJ_SUPPORT==1: Support VJ header compression. + */ +#ifndef VJ_SUPPORT +#define VJ_SUPPORT 0 +#endif + +/** + * MD5_SUPPORT==1: Support MD5 (see also CHAP). + */ +#ifndef MD5_SUPPORT +#define MD5_SUPPORT 0 +#endif + +/* + * Timeouts + */ +#ifndef FSM_DEFTIMEOUT +#define FSM_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef FSM_DEFMAXTERMREQS +#define FSM_DEFMAXTERMREQS 2 /* Maximum Terminate-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXCONFREQS +#define FSM_DEFMAXCONFREQS 10 /* Maximum Configure-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXNAKLOOPS +#define FSM_DEFMAXNAKLOOPS 5 /* Maximum number of nak loops */ +#endif + +#ifndef UPAP_DEFTIMEOUT +#define UPAP_DEFTIMEOUT 6 /* Timeout (seconds) for retransmitting req */ +#endif + +#ifndef UPAP_DEFREQTIME +#define UPAP_DEFREQTIME 30 /* Time to wait for auth-req from peer */ +#endif + +#ifndef CHAP_DEFTIMEOUT +#define CHAP_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef CHAP_DEFTRANSMITS +#define CHAP_DEFTRANSMITS 10 /* max # times to send challenge */ +#endif + +/* Interval in seconds between keepalive echo requests, 0 to disable. */ +#ifndef LCP_ECHOINTERVAL +#define LCP_ECHOINTERVAL 0 +#endif + +/* Number of unanswered echo requests before failure. */ +#ifndef LCP_MAXECHOFAILS +#define LCP_MAXECHOFAILS 3 +#endif + +/* Max Xmit idle time (in jiffies) before resend flag char. */ +#ifndef PPP_MAXIDLEFLAG +#define PPP_MAXIDLEFLAG 100 +#endif + +/* + * Packet sizes + * + * Note - lcp shouldn't be allowed to negotiate stuff outside these + * limits. See lcp.h in the pppd directory. + * (XXX - these constants should simply be shared by lcp.c instead + * of living in lcp.h) + */ +#define PPP_MTU 1500 /* Default MTU (size of Info field) */ +#ifndef PPP_MAXMTU +/* #define PPP_MAXMTU 65535 - (PPP_HDRLEN + PPP_FCSLEN) */ +#define PPP_MAXMTU 1500 /* Largest MTU we allow */ +#endif +#define PPP_MINMTU 64 +#define PPP_MRU 1500 /* default MRU = max length of info field */ +#define PPP_MAXMRU 1500 /* Largest MRU we allow */ +#ifndef PPP_DEFMRU +#define PPP_DEFMRU 296 /* Try for this */ +#endif +#define PPP_MINMRU 128 /* No MRUs below this */ + +#ifndef MAXNAMELEN +#define MAXNAMELEN 256 /* max length of hostname or name for auth */ +#endif +#ifndef MAXSECRETLEN +#define MAXSECRETLEN 256 /* max length of password or secret */ +#endif + +#endif /* PPP_SUPPORT */ + +/* + -------------------------------------- + ---------- Checksum options ---------- + -------------------------------------- +*/ +/** + * CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets. + */ +#ifndef CHECKSUM_GEN_IP +#define CHECKSUM_GEN_IP 1 +#endif + +/** + * CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets. + */ +#ifndef CHECKSUM_GEN_UDP +#define CHECKSUM_GEN_UDP 1 +#endif + +/** + * CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets. + */ +#ifndef CHECKSUM_GEN_TCP +#define CHECKSUM_GEN_TCP 1 +#endif + +/** + * CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets. + */ +#ifndef CHECKSUM_CHECK_IP +#define CHECKSUM_CHECK_IP 1 +#endif + +/** + * CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets. + */ +#ifndef CHECKSUM_CHECK_UDP +#define CHECKSUM_CHECK_UDP 1 +#endif + +/** + * CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets. + */ +#ifndef CHECKSUM_CHECK_TCP +#define CHECKSUM_CHECK_TCP 1 +#endif + +/* + --------------------------------------- + ---------- Debugging options ---------- + --------------------------------------- +*/ + +#ifdef _DEBUG +#define LWIP_DEBUG +#endif + +/** + * LWIP_DBG_MIN_LEVEL: After masking, the value of the debug is + * compared against this value. If it is smaller, then debugging + * messages are written. + */ +#ifndef LWIP_DBG_MIN_LEVEL +#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL +#endif + +/** + * LWIP_DBG_TYPES_ON: A mask that can be used to globally enable/disable + * debug messages of certain types. + */ +#ifndef LWIP_DBG_TYPES_ON +#define LWIP_DBG_TYPES_ON LWIP_DBG_ON +#endif + +/** + * ETHARP_DEBUG: Enable debugging in etharp.c. + */ +#ifndef ETHARP_DEBUG +#define ETHARP_DEBUG LWIP_DBG_OFF +#endif + +/** + * NETIF_DEBUG: Enable debugging in netif.c. + */ +#ifndef NETIF_DEBUG +#define NETIF_DEBUG LWIP_DBG_OFF +#endif + +/** + * PBUF_DEBUG: Enable debugging in pbuf.c. + */ +#ifndef PBUF_DEBUG +#define PBUF_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_LIB_DEBUG: Enable debugging in api_lib.c. + */ +#ifndef API_LIB_DEBUG +#define API_LIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_MSG_DEBUG: Enable debugging in api_msg.c. + */ +#ifndef API_MSG_DEBUG +#define API_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SOCKETS_DEBUG: Enable debugging in sockets.c. + */ +#ifndef SOCKETS_DEBUG +#define SOCKETS_DEBUG LWIP_DBG_OFF +#endif + +/** + * ICMP_DEBUG: Enable debugging in icmp.c. + */ +#ifndef ICMP_DEBUG +#define ICMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IGMP_DEBUG: Enable debugging in igmp.c. + */ +#ifndef IGMP_DEBUG +#define IGMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * INET_DEBUG: Enable debugging in inet.c. + */ +#ifndef INET_DEBUG +#define INET_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_DEBUG: Enable debugging for IP. + */ +#ifndef IP_DEBUG +#define IP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_REASS_DEBUG: Enable debugging in ip_frag.c for both frag & reass. + */ +#ifndef IP_REASS_DEBUG +#define IP_REASS_DEBUG LWIP_DBG_OFF +#endif + +/** + * RAW_DEBUG: Enable debugging in raw.c. + */ +#ifndef RAW_DEBUG +#define RAW_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEM_DEBUG: Enable debugging in mem.c. + */ +#ifndef MEM_DEBUG +#define MEM_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEMP_DEBUG: Enable debugging in memp.c. + */ +#ifndef MEMP_DEBUG +#define MEMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SYS_DEBUG: Enable debugging in sys.c. + */ +#ifndef SYS_DEBUG +#define SYS_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_DEBUG: Enable debugging for TCP. + */ +#ifndef TCP_DEBUG +#define TCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_INPUT_DEBUG: Enable debugging in tcp_in.c for incoming debug. + */ +#ifndef TCP_INPUT_DEBUG +#define TCP_INPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_FR_DEBUG: Enable debugging in tcp_in.c for fast retransmit. + */ +#ifndef TCP_FR_DEBUG +#define TCP_FR_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RTO_DEBUG: Enable debugging in TCP for retransmit + * timeout. + */ +#ifndef TCP_RTO_DEBUG +#define TCP_RTO_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_CWND_DEBUG: Enable debugging for TCP congestion window. + */ +#ifndef TCP_CWND_DEBUG +#define TCP_CWND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_WND_DEBUG: Enable debugging in tcp_in.c for window updating. + */ +#ifndef TCP_WND_DEBUG +#define TCP_WND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_OUTPUT_DEBUG: Enable debugging in tcp_out.c output functions. + */ +#ifndef TCP_OUTPUT_DEBUG +#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RST_DEBUG: Enable debugging for TCP with the RST message. + */ +#ifndef TCP_RST_DEBUG +#define TCP_RST_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_QLEN_DEBUG: Enable debugging for TCP queue lengths. + */ +#ifndef TCP_QLEN_DEBUG +#define TCP_QLEN_DEBUG LWIP_DBG_OFF +#endif + +/** + * UDP_DEBUG: Enable debugging in UDP. + */ +#ifndef UDP_DEBUG +#define UDP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCPIP_DEBUG: Enable debugging in tcpip.c. + */ +#ifndef TCPIP_DEBUG +#define TCPIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * PPP_DEBUG: Enable debugging for PPP. + */ +#ifndef PPP_DEBUG +#define PPP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SLIP_DEBUG: Enable debugging in slipif.c. + */ +#ifndef SLIP_DEBUG +#define SLIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * DHCP_DEBUG: Enable debugging in dhcp.c. + */ +#ifndef DHCP_DEBUG +#define DHCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * AUTOIP_DEBUG: Enable debugging in autoip.c. + */ +#ifndef AUTOIP_DEBUG +#define AUTOIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MSG_DEBUG: Enable debugging for SNMP messages. + */ +#ifndef SNMP_MSG_DEBUG +#define SNMP_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MIB_DEBUG: Enable debugging for SNMP MIBs. + */ +#ifndef SNMP_MIB_DEBUG +#define SNMP_MIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * DNS_DEBUG: Enable debugging for DNS. + */ +#ifndef DNS_DEBUG +#define DNS_DEBUG LWIP_DBG_OFF +#endif + +/* Custom definitions: !!!DO NOT CHANGE THIS SECTION!!! */ +#define LWIP_TIMEVAL_PRIVATE 0 + +#endif /* CFG_LWIP_H */ diff --git a/Modem/cfg/cfg_md2.h b/Modem/cfg/cfg_md2.h new file mode 100644 index 0000000..e937b90 --- /dev/null +++ b/Modem/cfg/cfg_md2.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/Modem/cfg/cfg_monitor.h b/Modem/cfg/cfg_monitor.h new file mode 100644 index 0000000..78f222b --- /dev/null +++ b/Modem/cfg/cfg_monitor.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/Modem/cfg/cfg_nand.h b/Modem/cfg/cfg_nand.h new file mode 100644 index 0000000..bd3b262 --- /dev/null +++ b/Modem/cfg/cfg_nand.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Configuration file for NAND driver module. + */ + +#ifndef CFG_NAND_H +#define CFG_NAND_H + +/** + * Page data size + * + * Size of the data section of a programmable page in bytes. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_DATA_SIZE 2048 + +/** + * Page spare area size + * + * Size of the spare section of a programmable page in bytes. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_SPARE_SIZE 64 + +/** + * Pages per block + * + * Number of pages in a erase block. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_PAGES_PER_BLOCK 64 + +/** + * Number of blocks + * + * Total number of erase blocks in one NAND chip. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_NUM_BLOCK 2048 + +/** + * Number of reserved blocks + * + * Blocks reserved for remapping defective NAND blocks. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_NUM_REMAP_BLOCKS 128 + +/** + * NAND operations timeout + * + * How many milliseconds the cpu waits for + * completion of NAND operations. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_TMOUT 100 + +/** + * Module logging level + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_NAND_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_NAND_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_NAND_H */ diff --git a/Modem/cfg/cfg_nmea.h b/Modem/cfg/cfg_nmea.h new file mode 100644 index 0000000..9249a9a --- /dev/null +++ b/Modem/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/Modem/cfg/cfg_parser.h b/Modem/cfg/cfg_parser.h new file mode 100644 index 0000000..67e091a --- /dev/null +++ b/Modem/cfg/cfg_parser.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + +/** + * Max number of arguments and results for each command + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_PARSER_MAX_ARGS 4 + +/** + * Max number of commands + * $WIZ$ type = "int" + * $WIZ$ min = 8 + */ +#define CONFIG_MAX_COMMANDS_NUMBER 16 + +/** + * Enable compatibility behaviour. + * + * Skip the first word from incoming commands. Don't enable in new projects. + * $WIZ$ type = "boolean" + */ +#define CONFIG_ENABLE_COMPAT_BEHAVIOUR 1 + +#endif /* CFG_PARSER_H */ + + + diff --git a/Modem/cfg/cfg_phase.h b/Modem/cfg/cfg_phase.h new file mode 100644 index 0000000..1ed5107 --- /dev/null +++ b/Modem/cfg/cfg_phase.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/Modem/cfg/cfg_pocketbus.h b/Modem/cfg/cfg_pocketbus.h new file mode 100644 index 0000000..aa0b090 --- /dev/null +++ b/Modem/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/Modem/cfg/cfg_proc.h b/Modem/cfg/cfg_proc.h new file mode 100644 index 0000000..19aa198 --- /dev/null +++ b/Modem/cfg/cfg_proc.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 1 + +/** + * Priority-inheritance protocol. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI_INHERIT 0 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/Modem/cfg/cfg_pwm.h b/Modem/cfg/cfg_pwm.h new file mode 100644 index 0000000..68d6283 --- /dev/null +++ b/Modem/cfg/cfg_pwm.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Enable the OLD pwm API. + * Not recommended for new projects. + * + * $WIZ$ type = "boolean" + */ +#define CFG_PWM_ENABLE_OLD_API 1 + +#endif /* CFG_PWM_H */ diff --git a/Modem/cfg/cfg_ramp.h b/Modem/cfg/cfg_ramp.h new file mode 100644 index 0000000..162d2db --- /dev/null +++ b/Modem/cfg/cfg_ramp.h @@ -0,0 +1,115 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/Modem/cfg/cfg_randpool.h b/Modem/cfg/cfg_randpool.h new file mode 100644 index 0000000..3038363 --- /dev/null +++ b/Modem/cfg/cfg_randpool.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/Modem/cfg/cfg_sd.h b/Modem/cfg/cfg_sd.h new file mode 100644 index 0000000..8c40f82 --- /dev/null +++ b/Modem/cfg/cfg_sd.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file Secure Digital module. + * + * + * \author Francesco Sacchi + */ + +#ifndef CFG_SD_H +#define CFG_SD_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define SD_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define SD_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Enable autoassignment of SD driver to disk drive number 0 of FatFs module. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "fat" + */ +#define CONFIG_SD_AUTOASSIGN_FAT 1 + +/** + * Enable backward compatibility for sd_init(). + * If enabled, sd_init() will allocate internally an Sd context, + * otherwise sd_init() will need the context to be passed explicitly. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_SD_OLD_INIT 1 + +#endif /* CFG_SD_H */ diff --git a/Modem/cfg/cfg_sem.h b/Modem/cfg/cfg_sem.h new file mode 100644 index 0000000..51811da --- /dev/null +++ b/Modem/cfg/cfg_sem.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/Modem/cfg/cfg_ser.h b/Modem/cfg/cfg_ser.h new file mode 100644 index 0000000..91a10e0 --- /dev/null +++ b/Modem/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/Modem/cfg/cfg_signal.h b/Modem/cfg/cfg_signal.h new file mode 100644 index 0000000..e48d86a --- /dev/null +++ b/Modem/cfg/cfg_signal.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/Modem/cfg/cfg_spi_bitbang.h b/Modem/cfg/cfg_spi_bitbang.h new file mode 100644 index 0000000..1a3a8a9 --- /dev/null +++ b/Modem/cfg/cfg_spi_bitbang.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/Modem/cfg/cfg_stepper.h b/Modem/cfg/cfg_stepper.h new file mode 100644 index 0000000..2925fb6 --- /dev/null +++ b/Modem/cfg/cfg_stepper.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/Modem/cfg/cfg_tas5706a.h b/Modem/cfg/cfg_tas5706a.h new file mode 100644 index 0000000..32b3598 --- /dev/null +++ b/Modem/cfg/cfg_tas5706a.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/Modem/cfg/cfg_tftp.h b/Modem/cfg/cfg_tftp.h new file mode 100644 index 0000000..36cc622 --- /dev/null +++ b/Modem/cfg/cfg_tftp.h @@ -0,0 +1,20 @@ +#ifndef CFG_TFTP_H +#define CFG_TFTP_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define TFTP_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define TFTP_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_TFTP_H */ diff --git a/Modem/cfg/cfg_thermo.h b/Modem/cfg/cfg_thermo.h new file mode 100644 index 0000000..2734f89 --- /dev/null +++ b/Modem/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/Modem/cfg/cfg_timer.h b/Modem/cfg/cfg_timer.h new file mode 100644 index 0000000..b6d43b3 --- /dev/null +++ b/Modem/cfg/cfg_timer.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/Modem/cfg/cfg_usb.h b/Modem/cfg/cfg_usb.h new file mode 100644 index 0000000..dbfd6fe --- /dev/null +++ b/Modem/cfg/cfg_usb.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the USB driver module + */ + +#ifndef CFG_USB_H +#define CFG_USB_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define USB_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define USB_LOG_FORMAT LOG_FMT_TERSE + +/** + * Size of the USB buffer used for endpoint transfers [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_USB_BUFSIZE 64 + +/** + * Maximum number of USB device interfaces (default = 1). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_USB_INTERFACE_MAX 1 + +/** + * Maximum number of allocated endpoints (0 = auto). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_USB_EP_MAX 0 + +/** + * Maximum packet size of the control endpoint 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 8 + */ +#define CONFIG_EP0_MAX_SIZE 8 + +#endif /* CFG_USB_H */ diff --git a/Modem/cfg/cfg_usbkbd.h b/Modem/cfg/cfg_usbkbd.h new file mode 100644 index 0000000..5b6fb65 --- /dev/null +++ b/Modem/cfg/cfg_usbkbd.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the usbkbd driver module + */ + +#ifndef CFG_USBKBD_H +#define CFG_USBKBD_H + +/** + * Enable the usbkbd module. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_USBKBD 0 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define USB_KEYBOARD_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define USB_KEYBOARD_LOG_FORMAT LOG_FMT_TERSE + +/** + * USB vendor ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_KEYBOARD_VENDOR_ID 0x046d + +/** + * USB product ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_KEYBOARD_PRODUCT_ID 0xffff + +#endif /* CFG_USB_KEYBOARD_H */ diff --git a/Modem/cfg/cfg_usbmouse.h b/Modem/cfg/cfg_usbmouse.h new file mode 100644 index 0000000..7314328 --- /dev/null +++ b/Modem/cfg/cfg_usbmouse.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the usbmouse driver module + */ + +#ifndef CFG_USBMOUSE_H +#define CFG_USBMOUSE_H + +/** + * Enable the usbmouse module. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_USBMOUSE 0 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define USB_MOUSE_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define USB_MOUSE_LOG_FORMAT LOG_FMT_TERSE + +/** + * USB vendor ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_MOUSE_VENDOR_ID 0xffff + +/** + * USB product ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_MOUSE_PRODUCT_ID 0x0000 + +#endif /* CFG_USBMOUSE_H */ diff --git a/Modem/cfg/cfg_usbser.h b/Modem/cfg/cfg_usbser.h new file mode 100644 index 0000000..1fa44e7 --- /dev/null +++ b/Modem/cfg/cfg_usbser.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the USB serial driver module + */ + +#ifndef CFG_USBSER_H +#define CFG_USBSER_H + +/** + * Enable the usb-serial module. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_USBSER 0 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define USB_SERIAL_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define USB_SERIAL_LOG_FORMAT LOG_FMT_TERSE + +/** + * USB vendor ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_SERIAL_VENDOR_ID 0x05f9 + +/** + * USB product ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_SERIAL_PRODUCT_ID 0xffff + +#endif /* CFG_USBSER_H */ diff --git a/Modem/cfg/cfg_wdt.h b/Modem/cfg/cfg_wdt.h new file mode 100644 index 0000000..b53b327 --- /dev/null +++ b/Modem/cfg/cfg_wdt.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/Modem/cfg/cfg_xmodem.h b/Modem/cfg/cfg_xmodem.h new file mode 100644 index 0000000..38db735 --- /dev/null +++ b/Modem/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/Modem/config.h b/Modem/config.h new file mode 100644 index 0000000..cab3b7f --- /dev/null +++ b/Modem/config.h @@ -0,0 +1,77 @@ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 64 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 64 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/Modem/hardware.c b/Modem/hardware.c new file mode 100644 index 0000000..4b6ad8f --- /dev/null +++ b/Modem/hardware.c @@ -0,0 +1,63 @@ + +#include "hardware.h" + +#include +#include + +#include +#include + + +/* + * Here we are using only one modem. If you need to receive + * from multiple modems, you need to define an array of contexts. + */ +static Afsk *ctx; + +void hw_afsk_adcInit(int ch, Afsk *_ctx) +{ + ctx = _ctx; + ASSERT(ch <= 5); + + AFSK_STROBE_INIT(); + AFSK_STROBE_OFF(); + /* Set prescaler to clk/8 (2 MHz), CTC, top = ICR1 */ + TCCR1A = 0; + TCCR1B = BV(CS11) | BV(WGM13) | BV(WGM12); + /* Set max value to obtain a 9600Hz freq */ + ICR1 = ((CPU_FREQ / 8) / 9600) - 1; + + /* Set reference to AVCC (5V), select CH */ + ADMUX = BV(REFS0) | ch; + + DDRC &= ~BV(ch); + PORTC &= ~BV(ch); + DIDR0 |= BV(ch); + + /* Set autotrigger on Timer1 Input capture flag */ + ADCSRB = BV(ADTS2) | BV(ADTS1) | BV(ADTS0); + /* Enable ADC, autotrigger, 1MHz, IRQ enabled */ + /* We are using the ADC a bit out of specifications otherwise it's not fast enough for our + * purposes */ + ADCSRA = BV(ADEN) | // ADC Enable + BV(ADSC) | // ADC Start converting + BV(ADATE) | // Enable autotriggering + BV(ADIE) | // ADC Interrupt enable + BV(ADPS2); // Enable prescaler flag 2 (1-0-0 = division by 16 = 1MHz) +} + + +bool hw_afsk_dac_isr; + +/* + * This is how you declare an ISR. + */ +DECLARE_ISR(ADC_vect) +{ + TIFR1 = BV(ICF1); + afsk_adc_isr(ctx, ((int16_t)((ADC) >> 2) - 128)); + if (hw_afsk_dac_isr) + PORTD = afsk_dac_isr(ctx) & 0xF0; + else + PORTD = 128; +} diff --git a/Modem/hardware.h b/Modem/hardware.h new file mode 100644 index 0000000..603ec12 --- /dev/null +++ b/Modem/hardware.h @@ -0,0 +1,73 @@ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#include + +struct Afsk; +void hw_afsk_adcInit(int ch, struct Afsk *_ctx); +void hw_afsk_dacInit(int ch, struct Afsk *_ctx); + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ + +/* + * This macro will be called for AFSK initialization. We could implement everything here as a macro, + * but since initialization is rather complicated we decided to split its own function. Such function + * is defined in hw_afsk.c. + * Remember: since this .c file is not created by the wizard, you must add it to your_project_name.mk. + * If you create the file using BeRTOS SDK, it will be added for you. + */ +#define AFSK_ADC_INIT(ch, ctx) hw_afsk_adcInit(ch, ctx) + +/* + * Activate strobe pin. We use it for debugging purposes. If you don't use it, simply + * leave empty the following macros + */ +#define AFSK_STROBE_INIT() do { DDRB |= BV(5); } while (0) + +/* + * Set the pin high. This macro is called at the beginning of the interrupt routine + */ +#define AFSK_STROBE_ON() do { PORTB |= BV(5); } while (0) + +/* + * Set the pin low. This macro is called at the end of the interrupt routine + */ +#define AFSK_STROBE_OFF() do { PORTB &= ~BV(5); } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; DDRD |= 0xF0; DDRB |= BV(3); } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB |= BV(3); hw_afsk_dac_isr = true; } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB &= ~BV(3); hw_afsk_dac_isr = false; } while (0) + +#endif /* HW_AFSK_H */ diff --git a/Modem/hw/hw_afsk.c b/Modem/hw/hw_afsk.c new file mode 100644 index 0000000..892b2a3 --- /dev/null +++ b/Modem/hw/hw_afsk.c @@ -0,0 +1,97 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * + * \author Francesco Sacchi + */ + + +#include "hw_afsk.h" + +#include +#include + +#include +#include + + +/* + * Here we are using only one modem. If you need to receive + * from multiple modems, you need to define an array of contexts. + */ +static Afsk *ctx; + +void hw_afsk_adcInit(int ch, Afsk *_ctx) +{ + ctx = _ctx; + ASSERT(ch <= 5); + + AFSK_STROBE_INIT(); + AFSK_STROBE_OFF(); + /* Set prescaler to clk/8 (2 MHz), CTC, top = ICR1 */ + TCCR1A = 0; + TCCR1B = BV(CS11) | BV(WGM13) | BV(WGM12); + /* Set max value to obtain a 9600Hz freq */ + ICR1 = ((CPU_FREQ / 8) / 9600) - 1; + + /* Set reference to AVCC (5V), select CH */ + ADMUX = BV(REFS0) | ch; + + DDRC &= ~BV(ch); + PORTC &= ~BV(ch); + DIDR0 |= BV(ch); + + /* Set autotrigger on Timer1 Input capture flag */ + ADCSRB = BV(ADTS2) | BV(ADTS1) | BV(ADTS0); + /* Enable ADC, autotrigger, 1MHz, IRQ enabled */ + /* We are using the ADC a bit out of specifications otherwise it's not fast enough for our + * purposes */ + ADCSRA = BV(ADEN) | BV(ADSC) | BV(ADATE) | BV(ADIE) | BV(ADPS2); +} + + +bool hw_afsk_dac_isr; + +/* + * This is how you declare an ISR. + */ +DECLARE_ISR(ADC_vect) +{ + TIFR1 = BV(ICF1); + afsk_adc_isr(ctx, ((int16_t)((ADC) >> 2) - 128)); + if (hw_afsk_dac_isr) + PORTD = afsk_dac_isr(ctx) & 0xF0; + else + PORTD = 128; +} diff --git a/Modem/hw/hw_afsk.h b/Modem/hw/hw_afsk.h new file mode 100644 index 0000000..4bebf74 --- /dev/null +++ b/Modem/hw/hw_afsk.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#include + +struct Afsk; +void hw_afsk_adcInit(int ch, struct Afsk *_ctx); +void hw_afsk_dacInit(int ch, struct Afsk *_ctx); + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ + +/* + * This macro will be called for AFSK initialization. We could implement everything here as a macro, + * but since initialization is rather complicated we decided to split its own function. Such function + * is defined in hw_afsk.c. + * Remember: since this .c file is not created by the wizard, you must add it to your_project_name.mk. + * If you create the file using BeRTOS SDK, it will be added for you. + */ +#define AFSK_ADC_INIT(ch, ctx) hw_afsk_adcInit(ch, ctx) + +/* + * Activate strobe pin. We use it for debugging purposes. If you don't use it, simply + * leave empty the following macros + */ +#define AFSK_STROBE_INIT() do { DDRB |= BV(5); } while (0) + +/* + * Set the pin high. This macro is called at the beginning of the interrupt routine + */ +#define AFSK_STROBE_ON() do { PORTB |= BV(5); } while (0) + +/* + * Set the pin low. This macro is called at the end of the interrupt routine + */ +#define AFSK_STROBE_OFF() do { PORTB &= ~BV(5); } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; DDRD |= 0xF0; DDRB |= BV(3); } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB |= BV(3); hw_afsk_dac_isr = true; } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; extern bool hw_afsk_dac_isr; PORTB &= ~BV(3); hw_afsk_dac_isr = false; } while (0) + +#endif /* HW_AFSK_H */ diff --git a/Modem/hw/hw_buzzer.h b/Modem/hw/hw_buzzer.h new file mode 100644 index 0000000..d597478 --- /dev/null +++ b/Modem/hw/hw_buzzer.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/Modem/hw/hw_dataflash.c b/Modem/hw/hw_dataflash.c new file mode 100644 index 0000000..1a758a8 --- /dev/null +++ b/Modem/hw/hw_dataflash.c @@ -0,0 +1,125 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/Modem/hw/hw_dataflash.h b/Modem/hw/hw_dataflash.h new file mode 100644 index 0000000..0ea2fc9 --- /dev/null +++ b/Modem/hw/hw_dataflash.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/Modem/hw/hw_dc_motor.h b/Modem/hw/hw_dc_motor.h new file mode 100644 index 0000000..a414d53 --- /dev/null +++ b/Modem/hw/hw_dc_motor.h @@ -0,0 +1,84 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +typedef enum MotorDCMap +{ + + /* Put here motor dc declaration */ + MOTOR_DC_CNT + +} MotorDCMap; + +/* + * Init all pin and device to manage dc motor. + */ +#define MOTOR_DC_INIT() \ + do { \ + /* Implement me! */ \ + } while (0) + + +/* + * Enable DC motor. + */ +#define DC_MOTOR_ENABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Disable DC motor. + */ +#define DC_MOTOR_DISABLE(dev) \ + do { \ + /* Implement me! */ \ + } while (0) + +/* + * Set direction for DC motor. + */ +#define DC_MOTOR_SET_DIR(dev, dir) \ + do { \ + /* Implement me! */ \ + } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/Modem/hw/hw_ft245rl.h b/Modem/hw/hw_ft245rl.h new file mode 100644 index 0000000..e260020 --- /dev/null +++ b/Modem/hw/hw_ft245rl.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/Modem/hw/hw_i2c_bitbang.h b/Modem/hw/hw_i2c_bitbang.h new file mode 100644 index 0000000..6aabb46 --- /dev/null +++ b/Modem/hw/hw_i2c_bitbang.h @@ -0,0 +1,127 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + + +/* + * New api + */ +#include + +INLINE void i2c_sdaHi(int dev) +{ + (void)(dev); + /* Implement me:Set SDA High by setting SDA pin as input */ +} + +INLINE void i2c_sdaLo(int dev) +{ + (void)(dev); + /* Implement me:Set SDA Low by setting SDA pin as open collector output */ +} + +INLINE void i2c_sclHi(int dev) +{ + (void)(dev); + /* Implement me:Set SCL High by setting SCL pin as input */ +} + +INLINE void i2c_sclLo(int dev) +{ + (void)(dev); + /* Implement me:Set SCL Low by setting SCL pin as open collector output */ +} + +INLINE bool i2c_sdaIn(int dev) +{ + (void)(dev); + /* Implement me: read SDA pin state */ + return true; +} + +INLINE bool i2c_sclIn(int dev) +{ + (void)(dev); + /* Implement me: read SCL pin state */ + return true; +} + +/** + * Half bit delay routine used to generate the correct timings. + */ +INLINE void i2c_halfbitDelay(int dev) +{ + (void)(dev); + /* Implement me! */ +} + +/** + * This macro should set SDA and SCL lines as input. + */ +INLINE void i2c_bitbangInit(int dev) +{ + (void)(dev); + /* Implement me! */ +} + +#endif /* HW_I2C_BITBANG_H */ diff --git a/Modem/hw/hw_kbd.h b/Modem/hw/hw_kbd.h new file mode 100644 index 0000000..e78a1ce --- /dev/null +++ b/Modem/hw/hw_kbd.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/Modem/hw/hw_lcd_32122a.h b/Modem/hw/hw_lcd_32122a.h new file mode 100644 index 0000000..6ec29c5 --- /dev/null +++ b/Modem/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/Modem/hw/hw_lcd_hd44.h b/Modem/hw/hw_lcd_hd44.h new file mode 100644 index 0000000..dfebbca --- /dev/null +++ b/Modem/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/Modem/hw/hw_led.h b/Modem/hw/hw_led.h new file mode 100644 index 0000000..2bd46ee --- /dev/null +++ b/Modem/hw/hw_led.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Led on/off macros. + * + * \author Daniele Basile + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#include + +#define LED_ON() PORTB |= BV(5) +#define LED_OFF() PORTB &= ~BV(5) +#define LED_INIT() DDRB |= BV(5) + +#endif /* HW_LED_H */ diff --git a/Modem/hw/hw_lm75.h b/Modem/hw/hw_lm75.h new file mode 100644 index 0000000..290dae0 --- /dev/null +++ b/Modem/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/Modem/hw/hw_mcp41.c b/Modem/hw/hw_mcp41.c new file mode 100644 index 0000000..512b19a --- /dev/null +++ b/Modem/hw/hw_mcp41.c @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/Modem/hw/hw_mcp41.h b/Modem/hw/hw_mcp41.h new file mode 100644 index 0000000..b31a7dd --- /dev/null +++ b/Modem/hw/hw_mcp41.h @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/Modem/hw/hw_ntc.c b/Modem/hw/hw_ntc.c new file mode 100644 index 0000000..2509239 --- /dev/null +++ b/Modem/hw/hw_ntc.c @@ -0,0 +1,45 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/Modem/hw/hw_ntc.h b/Modem/hw/hw_ntc.h new file mode 100644 index 0000000..0f6743a --- /dev/null +++ b/Modem/hw/hw_ntc.h @@ -0,0 +1,135 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *

+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/Modem/hw/hw_phase.c b/Modem/hw/hw_phase.c new file mode 100644 index 0000000..cd50242 --- /dev/null +++ b/Modem/hw/hw_phase.c @@ -0,0 +1,45 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/Modem/hw/hw_phase.h b/Modem/hw/hw_phase.h new file mode 100644 index 0000000..7cae67c --- /dev/null +++ b/Modem/hw/hw_phase.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/Modem/hw/hw_rit128x96.h b/Modem/hw/hw_rit128x96.h new file mode 100644 index 0000000..c24d1a8 --- /dev/null +++ b/Modem/hw/hw_rit128x96.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN 0 /* Implement me! */ + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN 0 /* Implement me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +/* Send data to the display */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + /* Implement me! */ +} + +#endif /* HW_RIT128x96_H */ diff --git a/Modem/hw/hw_sd.h b/Modem/hw/hw_sd.h new file mode 100644 index 0000000..ed10b80 --- /dev/null +++ b/Modem/hw/hw_sd.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/Modem/hw/hw_ser.h b/Modem/hw/hw_ser.h new file mode 100644 index 0000000..2033c98 --- /dev/null +++ b/Modem/hw/hw_ser.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/Modem/hw/hw_sipo.h b/Modem/hw/hw_sipo.h new file mode 100644 index 0000000..552d4dd --- /dev/null +++ b/Modem/hw/hw_sipo.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/Modem/hw/hw_spi.h b/Modem/hw/hw_spi.h new file mode 100644 index 0000000..991b86a --- /dev/null +++ b/Modem/hw/hw_spi.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/Modem/hw/hw_stepper.h b/Modem/hw/hw_stepper.h new file mode 100644 index 0000000..b97bacb --- /dev/null +++ b/Modem/hw/hw_stepper.h @@ -0,0 +1,308 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/Modem/hw/hw_tas5706a.h b/Modem/hw/hw_tas5706a.h new file mode 100644 index 0000000..fda85e1 --- /dev/null +++ b/Modem/hw/hw_tas5706a.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/Modem/hw/hw_thermo.h b/Modem/hw/hw_thermo.h new file mode 100644 index 0000000..3bb4735 --- /dev/null +++ b/Modem/hw/hw_thermo.h @@ -0,0 +1,181 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "thermo_map.h" +#include "ntc_map.h" + +#include +#include + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* Put here convertion function to temperature size */ + break; + + /* Put here your thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + +/*! + * This function should return the timeout for reaching the + * target temperature. + */ +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + /* return ms_to_ticks(60000); */ + break; + + /* Put here a time out for select thermo device */ + + default: + ASSERT(0); + } + + return 0; +} + + + +/*! + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + return ntc_read(dev); +} + + +/*! + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + switch (dev) + { + case THERMO_TEST: + phase_setPower(TRIAC_TEST, 0); + break; + + /* Put here a thermo device to turn off */ + + default: + ASSERT(0); + } + +} + + +/*! + * Based on the current temperature \a cur_temp and the target temperature \a target, this function turns on and off specific + * triac channel and handles the freezer alarm. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + deg_t dist = target - cur_temp; + //kprintf("dev[%d], dist[%d]\n", dev, dist); + + switch(dev) + { + case THERMO_TEST: + if (dist > 0) + { + /* phase_setPower(TRIAC_TEST, dist * PID_TEST_K); */ + } + else + { + /* phase_setPower(TRIAC_TEST, 0); */ + } + break; + + /* Put here an other thermo device */ + + default: + ASSERT(0); + } +} + + +#define THERMO_HW_INIT _thermo_hw_init() + +/*! + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + ASSERT(phase_initialized); + ASSERT(ntc_initialized); + + phase_setPower(TRIAC_TEST, 0); + + /* Add here the other thermo device */ +} + +#endif /* HW_THERMO_H */ diff --git a/Modem/hw/hw_tlv5618.h b/Modem/hw/hw_tlv5618.h new file mode 100644 index 0000000..4a2b420 --- /dev/null +++ b/Modem/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/Modem/hw/hw_tmp123.h b/Modem/hw/hw_tmp123.h new file mode 100644 index 0000000..adb1858 --- /dev/null +++ b/Modem/hw/hw_tmp123.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H + +#warning TODO:This is an example implentation, you must implement it! + +#define TMP123_HW_CS_EN() /* Implement me! */ +#define TMP123_HW_CS_DIS() /* Implement me! */ + +#define TMP123_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/Modem/hw/kbd_map.h b/Modem/hw/kbd_map.h new file mode 100644 index 0000000..15e4f08 --- /dev/null +++ b/Modem/hw/kbd_map.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/Modem/hw/mcp41_map.h b/Modem/hw/mcp41_map.h new file mode 100644 index 0000000..b2d223c --- /dev/null +++ b/Modem/hw/mcp41_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/Modem/hw/ntc_map.h b/Modem/hw/ntc_map.h new file mode 100644 index 0000000..6d256be --- /dev/null +++ b/Modem/hw/ntc_map.h @@ -0,0 +1,60 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/Modem/hw/phase_map.h b/Modem/hw/phase_map.h new file mode 100644 index 0000000..185a36f --- /dev/null +++ b/Modem/hw/phase_map.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/Modem/hw/pwm_map.h b/Modem/hw/pwm_map.h new file mode 100644 index 0000000..634f3ec --- /dev/null +++ b/Modem/hw/pwm_map.h @@ -0,0 +1,60 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/Modem/hw/thermo_map.h b/Modem/hw/thermo_map.h new file mode 100644 index 0000000..beaa39b --- /dev/null +++ b/Modem/hw/thermo_map.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + +#warning TODO:This is an example implentation, you must implement it! + +typedef uint8_t thermostatus_t; + +#define THERMO_OFF 0 +#define THERMO_HEATING BV(0) +#define THERMO_FREEZING BV(1) +#define THERMO_TGT_REACH BV(2) +#define THERMOERRF_NTCSHORT BV(3) +#define THERMOERRF_NTCOPEN BV(4) +#define THERMOERRF_TIMEOUT BV(5) +#define THERMO_ACTIVE BV(6) + +#define THERMO_ERRMASK (THERMOERRF_NTCSHORT | THERMOERRF_NTCOPEN | THERMOERRF_TIMEOUT) + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT, +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/Modem/main.c b/Modem/main.c new file mode 100644 index 0000000..3722b3e --- /dev/null +++ b/Modem/main.c @@ -0,0 +1,43 @@ + +#include +#include + +#include "afsk.h" + +#include +#include + +#include +#include + +static Afsk afsk; +static Serial ser; + +#define ADC_CH 0 + +static void init(void) +{ + IRQ_ENABLE; + kdbg_init(); + timer_init(); + + afsk_init(&afsk, ADC_CH, 0); + + ser_init(&ser, SER_UART0); + ser_setbaudrate(&ser, 115200); +} + +int main(void) +{ + init(); + ticks_t start = timer_clock(); + + while (1) + { + if (!fifo_isempty(&afsk.rx_fifo)) { + char c = fifo_pop(&afsk.rx_fifo); + kprintf("%c", c); + } + } + return 0; +} diff --git a/VERSION b/VERSION new file mode 100644 index 0000000..b52b88f --- /dev/null +++ b/VERSION @@ -0,0 +1 @@ +BeRTOS 2.7.0 [local copy] diff --git a/bertos/algo/crc.c b/bertos/algo/crc.c new file mode 100644 index 0000000..d4293f9 --- /dev/null +++ b/bertos/algo/crc.c @@ -0,0 +1,102 @@ +/** + * \file + * + * + * \brief CRC table and support routines + * + * \author Bernie Innocenti + */ + +#include "crc.h" + +/* + * The boot on AVR cpu is placed at the end of flash memory, but the avr + * address memory by byte and the pointers are 16bits long, so we are able + * to address 64Kbyte memory max. For this reason we can't read the crctab + * from flash, because it is placed at the end of memory. This is true every + * time we have an AVR cpu with more that 64Kbyte of flash. To fix this problem + * we let the compiler copy the table in RAM at startup. Obviously this solution + * is not efficent, but for now this is the only way. + */ +#if CPU_HARVARD && !(defined(ARCH_BOOT) && (ARCH & ARCH_BOOT)) + #define CRC_TABLE const uint16_t PROGMEM crc16tab[256] +#else + #define CRC_TABLE const uint16_t crc16tab[256] +#endif + +/** + * crctab calculated by Mark G. Mendel, Network Systems Corporation + */ +CRC_TABLE = { + 0x0000, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, + 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, + 0x1231, 0x0210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, + 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, + 0x2462, 0x3443, 0x0420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, + 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, + 0x3653, 0x2672, 0x1611, 0x0630, 0x76d7, 0x66f6, 0x5695, 0x46b4, + 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, + 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x0840, 0x1861, 0x2802, 0x3823, + 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, + 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0x0a50, 0x3a33, 0x2a12, + 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, + 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0x0c60, 0x1c41, + 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, + 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0x0e70, + 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, + 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, + 0x1080, 0x00a1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, + 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, + 0x02b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, + 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, + 0x34e2, 0x24c3, 0x14a0, 0x0481, 0x7466, 0x6447, 0x5424, 0x4405, + 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, + 0x26d3, 0x36f2, 0x0691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, + 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, + 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x08e1, 0x3882, 0x28a3, + 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, + 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0x0af1, 0x1ad0, 0x2ab3, 0x3a92, + 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, + 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0x0cc1, + 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, + 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0x0ed1, 0x1ef0 +}; + +uint16_t crc16(uint16_t crc, const void *buffer, size_t len) +{ + const unsigned char *buf = (const unsigned char *)buffer; + while(len--) + crc = UPDCRC16(*buf++, crc); + + return crc; +} + diff --git a/bertos/algo/crc.h b/bertos/algo/crc.h new file mode 100644 index 0000000..c5c1eef --- /dev/null +++ b/bertos/algo/crc.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief Cyclic Redundancy Check 16 (CRC). This algorithm is the one used by the XMODEM protocol. + * + * \note This algorithm is incompatible with the CCITT-CRC16. + * + * This code is based on the article Copyright 1986 Stephen Satchell. + * + * Programmers may incorporate any or all code into their programs, + * giving proper credit within the source. Publication of the + * source routines is permitted so long as proper credit is given + * to Stephen Satchell, Satchell Evaluations and Chuck Forsberg, + * Omen Technology. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "crc16" + */ + +#ifndef ALGO_CRC_H +#define ALGO_CRC_H + +#include "cfg/cfg_arch.h" + +#include +#include + +EXTERN_C_BEGIN + +/* CRC table */ +extern const uint16_t crc16tab[256]; + + +/** + * \brief Compute the updated CRC16 value for one octet (macro version) + * + * \note This version is only intended for old/broken compilers. + * Use the inline function in new code. + * + * \param c New octet (range 0-255) + * \param oldcrc Previous CRC16 value (referenced twice, beware of side effects) + */ +#if CPU_HARVARD && !(defined(ARCH_BOOT) && (ARCH & ARCH_BOOT)) + #define UPDCRC16(c, oldcrc) (pgm_read_uint16_t(&crc16tab[((oldcrc) >> 8) ^ ((unsigned char)(c))]) ^ ((oldcrc) << 8)) +#else + #define UPDCRC16(c, oldcrc) ((crc16tab[((oldcrc) >> 8) ^ ((unsigned char)(c))]) ^ ((oldcrc) << 8)) +#endif + +/** CRC-16 init value */ +#define CRC16_INIT_VAL ((uint16_t)0) + +#ifdef INLINE +/** + * \brief Compute the updated CRC16 value for one octet (inline version) + */ +INLINE uint16_t updcrc16(uint8_t c, uint16_t oldcrc) +{ +#if CPU_HARVARD && !(defined(ARCH_BOOT) && (ARCH & ARCH_BOOT)) + return pgm_read_uint16_t(&crc16tab[(oldcrc >> 8) ^ c]) ^ (oldcrc << 8); +#else + return crc16tab[(oldcrc >> 8) ^ c] ^ (oldcrc << 8); +#endif +} +#endif // INLINE + + +/** + * This function implements the CRC 16 calculation on a buffer. + * + * \param crc Current CRC16 value. + * \param buf The buffer to perform CRC calculation on. + * \param len The length of the Buffer. + * + * \return The updated CRC16 value. + */ +extern uint16_t crc16(uint16_t crc, const void *buf, size_t len); + +int crc_testSetup(void); +int crc_testRun(void); +int crc_testTearDown(void); + +EXTERN_C_END + +#endif /* ALGO_CRC_H */ diff --git a/bertos/algo/crc_ccitt.c b/bertos/algo/crc_ccitt.c new file mode 100644 index 0000000..feaf624 --- /dev/null +++ b/bertos/algo/crc_ccitt.c @@ -0,0 +1,83 @@ +/** + * \file + * + * + * \brief CRC-CCITT table and support routines + * + * \author Francesco Sacchi + */ + +#include "crc_ccitt.h" + +const uint16_t PROGMEM crc_ccitt_tab[256] = { + 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, + 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, + 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, + 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, + 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, + 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, + 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, + 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, + 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, + 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, + 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, + 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, + 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, + 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, + 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, + 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, + 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, + 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, + 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, + 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, + 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, + 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, + 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, + 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, + 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, + 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, + 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, + 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, + 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, + 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, + 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, + 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78, +}; + +uint16_t crc_ccitt(uint16_t crc, const void *buffer, size_t len) +{ + const unsigned char *buf = (const unsigned char *)buffer; + while (len--) + crc = updcrc_ccitt(*buf++, crc); + + return crc; +} + diff --git a/bertos/algo/crc_ccitt.h b/bertos/algo/crc_ccitt.h new file mode 100644 index 0000000..240e6e1 --- /dev/null +++ b/bertos/algo/crc_ccitt.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief CCITT Cyclic Redundancy Check (CRC-CCITT). + * + * \note This algorithm is incompatible with the CRC16. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "crc-ccitt" + */ + +#ifndef ALGO_CRC_CCITT_H +#define ALGO_CRC_CCITT_H + +#include +#include + +EXTERN_C_BEGIN + +/* CRC table */ +extern const uint16_t crc_ccitt_tab[256]; + +/** + * \brief Compute the updated CRC-CCITT value for one octet (inline version) + */ +INLINE uint16_t updcrc_ccitt(uint8_t c, uint16_t oldcrc) +{ + return (oldcrc >> 8) ^ pgm_read16(&crc_ccitt_tab[(oldcrc ^ c) & 0xff]); +} + +/** CRC-CCITT init value */ +#define CRC_CCITT_INIT_VAL ((uint16_t)0xFFFF) + + +/** + * This function implements the CRC-CCITT calculation on a buffer. + * + * \param crc Current CRC-CCITT value. + * \param buf The buffer to perform CRC calculation on. + * \param len The length of the Buffer. + * + * \return The updated CRC-CCITT value. + */ +extern uint16_t crc_ccitt(uint16_t crc, const void *buf, size_t len); + +EXTERN_C_END + +#endif /* ALGO_CRC_CCITT_H */ diff --git a/bertos/algo/crc_test.c b/bertos/algo/crc_test.c new file mode 100644 index 0000000..1a93e3b --- /dev/null +++ b/bertos/algo/crc_test.c @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief CRC-CCITT table and support routines + * + * \author Francesco Sacchi + */ + +#include "crc_ccitt.h" +#include "crc.h" + +#include +#include + + +int crc_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int crc_testTearDown(void) +{ + return 0; +} + +int crc_testRun(void) +{ + char vector[9] = "123456789"; + + uint16_t crc = CRC_CCITT_INIT_VAL; + + crc = crc_ccitt(crc, vector, sizeof(vector)); + kprintf("crc_ccitt [%04X]\n", crc); + ASSERT(crc == 0x6F91); + + crc = CRC16_INIT_VAL; + crc = crc16(crc, vector, sizeof(vector)); + kprintf("crc16 [%04X]\n", crc); + ASSERT(crc == 0x31C3); + + return 0; +} + +TEST_MAIN(crc); diff --git a/bertos/algo/md2.c b/bertos/algo/md2.c new file mode 100644 index 0000000..589d989 --- /dev/null +++ b/bertos/algo/md2.c @@ -0,0 +1,336 @@ +/** + * \file + * + * + * \brief MD2 Message-Digest algorithm. + * + * The MD2 algorithm work with a constant array of 256 permutationt + * defined in RFC1319. If you don't want to use a standard array of + * permutatione you can use a md2_perm() function that generate an + * array of 256 "casual" permutation. To swich from a standard array + * to md2_perm function you must chanche CONFIG_MD2_STD_PERM defined in + * appconfig.h. + * If you need to store array in program memory you must define + * a macro _PROGMEM (for more info see cpu/pgm.h). + * + * + * \author Daniele Basile + */ + +#include "md2.h" + +#include //memset(), memcpy(); +#include +#include //ASSERT() +#include //MIN(), countof(), ROTR(); +#include + + +#if CONFIG_MD2_STD_PERM + /* + * Official array of 256 byte pemutation contructed from digits of pi, defined + * in the RFC 1319. + */ + static const uint8_t PROGMEM md2_perm[256] = + { + 41, 46, 67, 201, 162, 216, 124, 1, 61, 54, 84, 161, 236, 240, 6, + 19, 98, 167, 5, 243, 192, 199, 115, 140, 152, 147, 43, 217, 188, + 76, 130, 202, 30, 155, 87, 60, 253, 212, 224, 22, 103, 66, 111, 24, + 138, 23, 229, 18, 190, 78, 196, 214, 218, 158, 222, 73, 160, 251, + 245, 142, 187, 47, 238, 122, 169, 104, 121, 145, 21, 178, 7, 63, + 148, 194, 16, 137, 11, 34, 95, 33, 128, 127, 93, 154, 90, 144, 50, + 39, 53, 62, 204, 231, 191, 247, 151, 3, 255, 25, 48, 179, 72, 165, + 181, 209, 215, 94, 146, 42, 172, 86, 170, 198, 79, 184, 56, 210, + 150, 164, 125, 182, 118, 252, 107, 226, 156, 116, 4, 241, 69, 157, + 112, 89, 100, 113, 135, 32, 134, 91, 207, 101, 230, 45, 168, 2, 27, + 96, 37, 173, 174, 176, 185, 246, 28, 70, 97, 105, 52, 64, 126, 15, + 85, 71, 163, 35, 221, 81, 175, 58, 195, 92, 249, 206, 186, 197, + 234, 38, 44, 83, 13, 110, 133, 40, 132, 9, 211, 223, 205, 244, 65, + 129, 77, 82, 106, 220, 55, 200, 108, 193, 171, 250, 36, 225, 123, + 8, 12, 189, 177, 74, 120, 136, 149, 139, 227, 99, 232, 109, 233, + 203, 213, 254, 59, 0, 29, 57, 242, 239, 183, 14, 102, 88, 208, 228, + 166, 119, 114, 248, 235, 117, 75, 10, 49, 68, 80, 180, 143, 237, + 31, 26, 219, 153, 141, 51, 159, 17, 131, 20 + }; + + #define MD2_PERM(x) pgm_read8(&md2_perm[x]) +#else + /** + * Md2_perm() function generate an array of 256 "casual" permutation. + */ + + /** + * Costant define for computing an array of 256 "casual" permutation. + * \{ + */ + #define K1 5 + #define K2 3 + #define R 2 + #define X 172 + /*\}*/ + + static uint8_t md2_perm(uint8_t i) + { + + i = i * K1; + i = ROTR(i, R); + i ^= X; + i = i * K2; + + return i; + } + + #define MD2_PERM(x) md2_perm(x) + +#endif + + +/** + * Pad function. Put len_pad unsigned char in + * input block. + */ +static void md2_pad(void *_block, size_t len_pad) +{ + uint8_t *block; + + block = (uint8_t *)_block; + + ASSERT(len_pad <= CONFIG_MD2_BLOCK_LEN); + + /* + * Fill input block with len_pad char. + */ + memset(block, len_pad, len_pad); + +} + +static void md2_compute(void *_state, void *_checksum, void *_block) +{ + int i = 0; + uint16_t t = 0; + uint8_t compute_array[COMPUTE_ARRAY_LEN]; + uint8_t *state; + uint8_t *checksum; + uint8_t *block; + + state = (uint8_t *)_state; + checksum = (uint8_t *)_checksum; + block = (uint8_t *)_block; + + /* + * Copy state and checksum context in compute array. + */ + memcpy(compute_array, state, CONFIG_MD2_BLOCK_LEN); + memcpy(compute_array + CONFIG_MD2_BLOCK_LEN, block, CONFIG_MD2_BLOCK_LEN); + + /* + * Fill compute array with state XOR block + */ + for(i = 0; i < CONFIG_MD2_BLOCK_LEN; i++) + compute_array[i + (CONFIG_MD2_BLOCK_LEN * 2)] = state[i] ^ block[i]; + + /* + * Encryt block. + */ + for(i = 0; i < NUM_COMPUTE_ROUNDS; i++) + { + for(int j = 0; j < COMPUTE_ARRAY_LEN; j++) + { + compute_array[j] ^= MD2_PERM(t); + t = compute_array[j]; + } + + t = (t + i) & 0xff; //modulo 256. + } + /* + * Update checksum. + */ + t = checksum[CONFIG_MD2_BLOCK_LEN - 1]; + + for(i = 0; i < CONFIG_MD2_BLOCK_LEN; i++) + { + checksum[i] ^= MD2_PERM(block[i] ^ t); + t = checksum[i]; + } + + /* + * Update state and clean compute array. + */ + memcpy(state, compute_array, CONFIG_MD2_BLOCK_LEN); + memset(compute_array, 0, sizeof(compute_array)); +} + +/** + * Algorithm initialization. + * + * \param context empty context. + */ +void md2_init(Md2Context *context) +{ + + memset(context, 0, sizeof(Md2Context)); + +} + +/** + * Update block. + */ +void md2_update(Md2Context *context, const void *_block_in, size_t block_len) +{ + + const uint8_t *block_in; + size_t cpy_len; + + + block_in = (const uint8_t *)_block_in; + + while(block_len > 0) + { + /* + * Choose a number of block that fill input context buffer. + */ + cpy_len = MIN(block_len, CONFIG_MD2_BLOCK_LEN - context->counter); + + + /* + * Copy in the buffer input block. + */ + memcpy(&context->buffer[context->counter], block_in, cpy_len); + + /* + * Update a context counter, input block length and remaning + * context buffer block lenght. + */ + context->counter += cpy_len; + block_len -= cpy_len; + block_in += cpy_len; + + /* + * If buffer is full, compute it. + */ + if (context->counter >= CONFIG_MD2_BLOCK_LEN) + { + md2_compute(context->state, context->checksum, context->buffer); + context->counter = 0; + } + } + + +} +/** + * Ends an MD2 message digest operation. + * This fuction take an context and return a pointer + * to context state. + * + * \param context in input. + * \return a pointer to context state (message digest). + */ +uint8_t *md2_end(Md2Context *context) +{ + + uint8_t buf[CONFIG_MD2_BLOCK_LEN]; + + /* + * Fill remaning empty context buffer. + */ + md2_pad(buf, CONFIG_MD2_BLOCK_LEN - context->counter); + + /* + * Update context buffer and compute it. + */ + md2_update(context, buf, CONFIG_MD2_BLOCK_LEN - context->counter); + + /* + * Add context checksum to message input. + */ + md2_update(context, context->checksum, CONFIG_MD2_BLOCK_LEN); + + + return context->state; //return a pointer to message digest. +} +/** + * MD2 test fuction. + * This function test MD2 algorithm with a standard string specified + * in RFC 1319. + * + * \note This test work with official array of 256 byte pemutation + * contructed from digits of pi, defined in the RFC 1319. + * + */ +bool md2_test(void) +{ + + Md2Context context; + + const char *test[] = + { + "", + "message digest", + "abcdefghijklmnopqrstuvwxyz", + "12345678901234567890123456789012345678901234567890123456789012345678901234567890" + }; + + + const char *result[] = { + "\x83\x50\xe5\xa3\xe2\x4c\x15\x3d\xf2\x27\x5c\x9f\x80\x69\x27\x73", + "\xab\x4f\x49\x6b\xfb\x2a\x53\x0b\x21\x9f\xf3\x30\x31\xfe\x06\xb0", + "\x4e\x8d\xdf\xf3\x65\x02\x92\xab\x5a\x41\x08\xc3\xaa\x47\x94\x0b", + "\xd5\x97\x6f\x79\xd8\x3d\x3a\x0d\xc9\x80\x6c\x3c\x66\xf3\xef\xd8", + }; + + + for (size_t i = 0; i < countof(test); i++) + { + md2_init(&context); + md2_update(&context, test[i], strlen(test[i])); + + if(memcmp(result[i], md2_end(&context), MD2_DIGEST_LEN)) + return false; + } + + return true; +} + +#if 0 + +#include +int main(int argc, char * argv[]) +{ + + if(md2_test()) + printf("MD2 algorithm work well!\n"); + else + printf("MD2 algorithm doesn't work well.\n"); + +} + +#endif + diff --git a/bertos/algo/md2.h b/bertos/algo/md2.h new file mode 100644 index 0000000..f7642b9 --- /dev/null +++ b/bertos/algo/md2.h @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief MD2 Message-Digest algorithm. + * + * The algorithm takes as input a message of arbitrary length and produces + * as output a 128-bit message digest of the input. + * It is conjectured that it is computationally infeasible to produce + * two messages having the same message digest, or to produce any + * message having a given prespecified target message digest. + * + * + * \author Daniele Basile + * + * $WIZ$ module_name = "md2" + * $WIZ$ module_configuration = "bertos/cfg/cfg_md2.h" + */ + +#ifndef ALGO_MD2_H +#define ALGO_MD2_H + +#include "cfg/cfg_md2.h" +#include + +#define NUM_COMPUTE_ROUNDS 18 ///< Number of compute rounds. +#define COMPUTE_ARRAY_LEN CONFIG_MD2_BLOCK_LEN * 3 ///< Lenght of compute array. +#define MD2_DIGEST_LEN CONFIG_MD2_BLOCK_LEN +/** + * Context for MD2 computation. + */ +typedef struct Md2Context +{ + uint8_t buffer[CONFIG_MD2_BLOCK_LEN]; ///< Input buffer. + uint8_t state[CONFIG_MD2_BLOCK_LEN]; ///< Current state buffer. + uint8_t checksum[CONFIG_MD2_BLOCK_LEN]; ///< Checksum. + size_t counter; ///< Counter of remaining bytes. + +} Md2Context; + +void md2_init(Md2Context *context); +void md2_update(Md2Context *context, const void *block_in, size_t block_len); +uint8_t *md2_end(Md2Context *context); +bool md2_test(void); + +#endif /* ALGO_MD2_H */ diff --git a/bertos/algo/mean.h b/bertos/algo/mean.h new file mode 100644 index 0000000..893241e --- /dev/null +++ b/bertos/algo/mean.h @@ -0,0 +1,41 @@ +#warning revise me! + + +/** + * DECLARE_SMEAN(temperature, uint8_t, uint16_t); + * for (i = 0; i < TEMP_MEANS; ++i) + * SMEAN_ADD(temperature, adc_get(), TEMP_MEANS); + * printf("mean temperature = %d\n", SMEAN_GET(temperature)); + */ + +/** + * Instantiate a mean instance + */ +#define DECLARE_SMEAN(name, Type, SumType) \ + struct { \ + SumType sum; \ + Type result; \ + int count; \ + } name = { 0, 0, 0 } + +/** + * Insert a new sample into the mean. + * + * \note \a mean and \a max_samples are evaluated multiple times + */ +#define SMEAN_ADD(mean, sample, max_samples) \ + do { \ + (mean).sum += (sample); \ + if ((mean).count++ >= (max_samples)) \ + { \ + (mean).result = (mean).sum / (max_samples); \ + (mean).sum = 0; \ + (mean).count = 0; \ + } \ + } while (0) + +/** + * Return current mean value. + */ +#define SMEAN_GET(mean) ((mean).result) + diff --git a/bertos/algo/pid_control.c b/bertos/algo/pid_control.c new file mode 100644 index 0000000..73e7ffd --- /dev/null +++ b/bertos/algo/pid_control.c @@ -0,0 +1,115 @@ +/** + * \file + * + * + * + * \brief Proportional, integral, derivative controller (PID controller) (implementation) + * + * + * \author Daniele Basile + */ + +#include "pid_control.h" + +#include "cfg/cfg_pid.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL PID_LOG_LEVEL +#define LOG_VERBOSITY PID_LOG_FORMAT + +#include +#include + +/** + * Compute next value for reaching \a target point. + */ +piddata_t pid_control_update(PidContext *pid_ctx, piddata_t target, piddata_t curr_pos) +{ + piddata_t P; + piddata_t I; + piddata_t D; + piddata_t err; + + //Compute current error. + err = target - curr_pos; + + /* + * Compute Proportional contribute + */ + P = err * pid_ctx->cfg->kp; + + //Update integral state error + pid_ctx->i_state += err; + + //Clamp integral state between i_min and i_max + pid_ctx->i_state = MINMAX(pid_ctx->cfg->i_min, pid_ctx->i_state, pid_ctx->cfg->i_max); + + /* + * Compute Integral contribute + * + * note: for computing the integral contribute we use a sample period in seconds + * and so we divide sample_period in microsenconds for 1000. + */ + I = pid_ctx->i_state * pid_ctx->cfg->ki * ((piddata_t)pid_ctx->cfg->sample_period / 1000); + + + /* + * Compute derivative contribute + */ + D = (err - pid_ctx->prev_err) * pid_ctx->cfg->kd / ((piddata_t)pid_ctx->cfg->sample_period / 1000); + + + LOG_INFO("curr_pos[%lf],tgt[%lf],err[%f],P[%f],I[%f],D[%f]", curr_pos, target, err, P, I, D); + + + //Store the last error value + pid_ctx->prev_err = err; + piddata_t pid = MINMAX(pid_ctx->cfg->out_min, (P + I + D), pid_ctx->cfg->out_max); + + LOG_INFO("pid[%lf]",pid); + + //Clamp out between out_min and out_max + return pid; +} + +/** + * Init PID control. + */ +void pid_control_init(PidContext *pid_ctx, const PidCfg *pid_cfg) +{ + /* + * Init all values of pid control struct + */ + pid_ctx->cfg = pid_cfg; + + pid_control_reset(pid_ctx); + +} + diff --git a/bertos/algo/pid_control.h b/bertos/algo/pid_control.h new file mode 100644 index 0000000..c21319a --- /dev/null +++ b/bertos/algo/pid_control.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * + * \brief Proportional, integral, derivative controller (PID controller). + * + * + * \author Daniele Basile + * + * $WIZ$ module_name = "pid_control" + * $WIZ$ module_depends = "timer" + */ + +#ifndef ALGO_PID_CONTROL_H +#define ALGO_PID_CONTROL_H + +#include + +/** + * Data type for pid coefficient. + */ +typedef float pidk_t; +typedef float piddata_t; + +/** + * PID context structure. + */ +typedef struct PidCfg +{ + pidk_t kp; ///< Proportional term of PID control method (Gain). + pidk_t ki; ///< Integral term of PID control method (Integral Gain). + pidk_t kd; ///< Derivative of PID control method (Derivative Gain). + + piddata_t i_max; ///< Max value of integral term. + piddata_t i_min; ///< Min value of integral term. + + piddata_t out_max; ///< Man value of output. + piddata_t out_min; ///< Min value of output. + + mtime_t sample_period; ///< Sample period in milliseconds. + +} PidCfg; + + +/** + * PID context structure. + */ +typedef struct PidContext +{ + const PidCfg *cfg; + + piddata_t prev_err; ///< Previous error. + piddata_t i_state; ///< Integrator state (sum of all the preceding errors). + +} PidContext; + +/** + * Set Kp, Ki, Kd constants of PID control. + */ +INLINE void pid_control_setPid(PidCfg *pid_cfg, pidk_t kp, pidk_t ki, pidk_t kd) +{ + pid_cfg->kp = kp; + pid_cfg->ki = ki; + pid_cfg->kd = kd; +} + +/** + * Set sample period for PID control. + */ +INLINE void pid_control_setPeriod(PidCfg *pid_cfg, mtime_t sample_period) +{ + pid_cfg->sample_period = sample_period; +} + +/** + * Clear a pid control structure + */ +INLINE void pid_control_reset(PidContext *pid_ctx) +{ + pid_ctx->i_state = 0; + pid_ctx->prev_err = 0; +} + +piddata_t pid_control_update(PidContext *pid_ctx, piddata_t target, piddata_t curr_pos); +void pid_control_init(PidContext *pid_ctx, const PidCfg *pid_cfg); + +#endif /* ALGO_PID_CONTROL_H */ diff --git a/bertos/algo/ramp.c b/bertos/algo/ramp.c new file mode 100644 index 0000000..fff8a6c --- /dev/null +++ b/bertos/algo/ramp.c @@ -0,0 +1,200 @@ +/*! + * \file + * + * + * \brief Compute, save and load ramps for stepper motors (implementation) + * + * + * \author Simone Zinanni + * \author Bernie Innocenti + * \author Giovanni Bajo + * \author Daniele Basile + * + * + * The formula used by the ramp is the following: + * + * 
+ *            a * b
+ * f(t) = -------------
+ *         lerp(a,b,t)
+ *
+ * + * Where a and b are the maximum and minimum speed + * respectively (minimum and maximum wavelength respectively), and lerp + * is a linear interpolation with a factor: + * + * 
+ * lerp(a,b,t) =  a + t * (b - a)  =  (a * (1 - t)) + (b * t)
+ *
+ * + * t must be in the [0,1] interval. It is easy to see that the + * following holds true: + * + * 
+ * f(0) = b,   f(1) = a
+ *
+ * + * And that the function is monotonic. So, the function effectively interpolates + * between the maximum and minimum speed through its domain ([0,1] -> [b,a]). + * + * The curve drawn by this function is similar to 1 / (sqrt(n)), so it is slower + * than a linear acceleration (which would be 1/n). + * + * The floating point version uses a slightly modified function which accepts + * the parameter in the domain [0, MT] (where MT is maxTime, the length of the + * ramp, which is a setup parameter for the ramp). This is done to reduce the + * number of operations per step. The formula looks like this: + * + * 
+ *               a * b * MT
+ * g(t) = ----------------------------
+ *           (a * MT) + t * (b - a)
+ *
+ * + * It can be shown that this g(t) = f(t * MT). The denominator + * is a linear interpolation in the range [b*MT, a*MT], as t moves in the + * interval [0, MT]. So the interpolation interval of the function is again + * [b, a]. The implementation caches the value of the numerator and parts + * of the denominator, so that the formula becomes: + * + * 
+ * alpha = a * b * MT
+ * beta = a * MT
+ * gamma = b - a
+ *
+ *                alpha
+ * g(t) = ----------------------
+ *           beta + t * gamma
+ *
+ * + * and t is exactly the parameter that ramp_evaluate() gets, + * that is the current time (in range [0, MT]). The operations performed + * for each step are just an addition, a multiplication and a division. + * + * The fixed point version of the formula instead transforms the original + * function as follows: + * + * 
+ *                   a * b                         a
+ *  f(t) =  -------------------------  =  --------------------
+ *                 a                         a
+ *           b * ( - * (1 - t) + t )         - * (1 - t) + t
+ *                 b                         b
+ *
+ * + * t must be computed by dividing the current time (24 bit integer) + * by the maximum time (24 bit integer). This is done by precomputing the + * reciprocal of the maximum time as a 0.32 fixed point number, and multiplying + * it to the current time. Multiplication is performed 8-bits a time by + * FIX_MULT32(), so that we end up with a 0.16 fixed point number for + * t (and 1-t is just its twos-complement negation). + * a/b is in the range [0,1] (because a is always less than b, + * being the minimum wavelength), so it is precomputed as a 0.16 fixed point. + * The final step is then computing the denominator and executing the division + * (32 cycles using the 1-step division instruction in the DSP). + * + * The assembly implementation is needed for efficiency, but a C version of it + * can be easily written, in case it is needed in the future. + * + */ + +#include "ramp.h" +#include + +#include // memcpy() + +void ramp_compute(struct Ramp *ramp, uint32_t clocksRamp, uint16_t clocksMinWL, uint16_t clocksMaxWL) +{ + ASSERT(clocksMaxWL >= clocksMinWL); + + // Save values in ramp struct + ramp->clocksRamp = clocksRamp; + ramp->clocksMinWL = clocksMinWL; + ramp->clocksMaxWL = clocksMaxWL; + +#if RAMP_USE_FLOATING_POINT + ramp->precalc.gamma = ramp->clocksMaxWL - ramp->clocksMinWL; + ramp->precalc.beta = (float)ramp->clocksMinWL * (float)ramp->clocksRamp; + ramp->precalc.alpha = ramp->precalc.beta * (float)ramp->clocksMaxWL; + +#else + ramp->precalc.max_div_min = ((uint32_t)clocksMinWL << 16) / (uint32_t)clocksMaxWL; + + /* Calcola 1/total_time in fixed point .32. Assumiamo che la rampa possa al + * massimo avere 25 bit (cioé valore in tick fino a 2^25, che con il + * prescaler=3 sono circa 7 secondi). Inoltre, togliamo qualche bit di precisione + * da destra (secondo quanto specificato in RAMP_CLOCK_SHIFT_PRECISION). + */ + ASSERT(ramp->clocksRamp < (1UL << (24 + RAMP_CLOCK_SHIFT_PRECISION))); + ramp->precalc.inv_total_time = 0xFFFFFFFFUL / (ramp->clocksRamp >> RAMP_CLOCK_SHIFT_PRECISION); + ASSERT(ramp->precalc.inv_total_time < 0x1000000UL); + +#endif +} + + +void ramp_setup(struct Ramp* ramp, uint32_t length, uint32_t minFreq, uint32_t maxFreq) +{ + uint32_t minWL, maxWL; + + minWL = TIME2CLOCKS(FREQ2MICROS(maxFreq)); + maxWL = TIME2CLOCKS(FREQ2MICROS(minFreq)); + + ASSERT2(minWL < 65536UL, "Maximum frequency too high"); + ASSERT2(maxWL < 65536UL, "Minimum frequency too high"); + ASSERT(maxFreq > minFreq); + + ramp_compute( + ramp, + TIME2CLOCKS(length), + TIME2CLOCKS(FREQ2MICROS(maxFreq)), + TIME2CLOCKS(FREQ2MICROS(minFreq)) + ); +} + +void ramp_default(struct Ramp *ramp) +{ + ramp_setup(ramp, RAMP_DEF_TIME, RAMP_DEF_MINFREQ, RAMP_DEF_MAXFREQ); +} + +#if RAMP_USE_FLOATING_POINT + +float ramp_evaluate(const struct Ramp* ramp, float curClock) +{ + return ramp->precalc.alpha / (curClock * ramp->precalc.gamma + ramp->precalc.beta); +} + +#else + +INLINE uint32_t fix_mult32(uint32_t m1, uint32_t m2) +{ + uint32_t accum = 0; + accum += m1 * ((m2 >> 0) & 0xFF); + accum >>= 8; + accum += m1 * ((m2 >> 8) & 0xFF); + accum >>= 8; + accum += m1 * ((m2 >> 16) & 0xFF); + return accum; +} + +// a*b >> 16 +INLINE uint16_t fix_mult16(uint16_t a, uint32_t b) +{ + return (b*(uint32_t)a) >> 16; +} + +uint16_t FAST_FUNC ramp_evaluate(const struct Ramp* ramp, uint32_t curClock) +{ + uint16_t t = FIX_MULT32(curClock >> RAMP_CLOCK_SHIFT_PRECISION, ramp->precalc.inv_total_time); + uint16_t denom = fix_mult16((uint16_t)~t + 1, ramp->precalc.max_div_min) + t; + uint16_t cur_delta = ((uint32_t)ramp->clocksMinWL << 16) / denom; + + return cur_delta; +} + +#endif + + diff --git a/bertos/algo/ramp.h b/bertos/algo/ramp.h new file mode 100644 index 0000000..ad3c919 --- /dev/null +++ b/bertos/algo/ramp.h @@ -0,0 +1,166 @@ +/** + * \file + * + * + * \brief Compute, save and load ramps for stepper motors. + * + * The acceleration ramp is used to properly accelerate a stepper motor. The main + * entry point is the function ramp_evaluate(), which must be called at every step + * of the motor: it gets as input the time elapsed since the stepper started + * accelerating, and returns the time to wait before sending the next step. A pseudo + * usage pattern is as follows: + * + * 
+ *  float time = 0;
+ *  while (1)
+ *  {
+ *      float delta = ramp_evaluate(&my_ramp, time);
+ *      sleep(delta);
+ *      do_motor_step();
+ *      time += delta;
+ *  }
+ *
+ * + * A similar pattern can be used to decelerate (it is sufficient to move the total + * time backward, such as "time -= delta"). + * + * The ramp can be configured with ramp_setup(), providing it with the minimum and + * maximum operating frequency of the motor, and the total acceleration time in + * milliseconds (that is, the time that will be needed to accelerate from the + * minimum frequency to the maximum frequency). + * + * Both a very precise floating point and a very fast fixed point implementation + * of the ramp evaluation are provided. The fixed point is hand-optimized assembly + * for DSP56000 (but a portable C version of it can be easily written, see the + * comments in the code). + * + * + * \author Simone Zinanni + * \author Giovanni Bajo + * \author Daniele Basile + * + * $WIZ$ module_name = "ramp" + * $WIZ$ module_configuration = "bertos/cfg/cfg_ramp.h" + */ + +#ifndef ALGO_RAMP_H +#define ALGO_RAMP_H + +#include "hw/hw_stepper.h" + +#include "cfg/cfg_ramp.h" + +#include + + +/** + * Convert microseconds to timer clock ticks + */ +#define TIME2CLOCKS(micros) ((uint32_t)(micros) * (STEPPER_CLOCK / 1000000)) + +/** + * Convert timer clock ticks back to microseconds + */ +#define CLOCKS2TIME(clocks) ((uint32_t)(clocks) / (STEPPER_CLOCK / 1000000)) + +/** + * Convert microseconds to Hz + */ +#define MICROS2FREQ(micros) (1000000UL / ((uint32_t)(micros))) + +/** + * Convert frequency (in Hz) to time (in microseconds) + */ +#define FREQ2MICROS(hz) (1000000UL / ((uint32_t)(hz))) + +/** + * Multiply \p a and \p b two integer at 32 bit and extract the high 16 bit word. + */ +#define FIX_MULT32(a,b) (((uint64_t)(a)*(uint32_t)(b)) >> 16) + +/** + * Structure holding pre-calculated data for speeding up real-time evaluation + * of the ramp. This structure is totally different between the fixed and the + * floating point version of the code. + * + * Consult the file-level documentation of ramp.c for more information about + * the values of this structure. + */ +struct RampPrecalc +{ +#if RAMP_USE_FLOATING_POINT + float beta; + float alpha; + float gamma; +#else + uint16_t max_div_min; + uint32_t inv_total_time; +#endif +}; + + +/** + * Ramp structure + */ +struct Ramp +{ + uint32_t clocksRamp; + uint16_t clocksMinWL; + uint16_t clocksMaxWL; + + struct RampPrecalc precalc; ///< pre-calculated values for speed +}; + + +/* + * Function prototypes + */ +void ramp_compute( + struct Ramp * ramp, + uint32_t clocksInRamp, + uint16_t clocksInMinWavelength, + uint16_t clocksInMaxWavelength); + + +/** Setup an acceleration ramp for a stepper motor + * + * \param ramp Ramp to fill + * \param length Length of the ramp (milliseconds) + * \param minFreq Minimum operating frequency of the motor (hertz) + * \param maxFreq Maximum operating frequency of the motor (hertz) + * + */ +void ramp_setup(struct Ramp* ramp, uint32_t length, uint32_t minFreq, uint32_t maxFreq); + + +/** + * Initialize a new ramp with default values + */ +void ramp_default(struct Ramp *ramp); + + +/** + * Evaluate the ramp at the given point. Given a \a ramp, and the current \a clock since + * the start of the acceleration, compute the next step, that is the interval at which + * send the signal to the motor. + * + * \note The fixed point version does not work when curClock is zero. Anyway, + * the first step is always clocksMaxWL, as stored within the ramp structure. + */ +#if RAMP_USE_FLOATING_POINT + float ramp_evaluate(const struct Ramp* ramp, float curClock); +#else + uint16_t ramp_evaluate(const struct Ramp* ramp, uint32_t curClock); +#endif + + +/** Self test */ +int ramp_testSetup(void); +int ramp_testRun(void); +int ramp_testTearDown(void); + +#endif /* ALGO_RAMP_H */ + diff --git a/bertos/algo/ramp_test.c b/bertos/algo/ramp_test.c new file mode 100644 index 0000000..0e7d58c --- /dev/null +++ b/bertos/algo/ramp_test.c @@ -0,0 +1,186 @@ +/*! + * \file + * + * + * \brief Test for compute, save and load ramps for stepper motors (implementation) + * + * + * \author Simone Zinanni + * \author Bernie Innocenti + * \author Giovanni Bajo + * \author Daniele Basile + * + * + * The formula used by the ramp is the following: + * + * 
+ *            a * b
+ * f(t) = -------------
+ *         lerp(a,b,t)
+ *
+ * + * Where a and b are the maximum and minimum speed + * respectively (minimum and maximum wavelength respectively), and lerp + * is a linear interpolation with a factor: + * + * 
+ * lerp(a,b,t) =  a + t * (b - a)  =  (a * (1 - t)) + (b * t)
+ *
+ * + * t must be in the [0,1] interval. It is easy to see that the + * following holds true: + * + * 
+ * f(0) = b,   f(1) = a
+ *
+ * + * And that the function is monotonic. So, the function effectively interpolates + * between the maximum and minimum speed through its domain ([0,1] -> [b,a]). + * + * The curve drawn by this function is similar to 1 / (sqrt(n)), so it is slower + * than a linear acceleration (which would be 1/n). + * + * The floating point version uses a slightly modified function which accepts + * the parameter in the domain [0, MT] (where MT is maxTime, the length of the + * ramp, which is a setup parameter for the ramp). This is done to reduce the + * number of operations per step. The formula looks like this: + * + * 
+ *               a * b * MT
+ * g(t) = ----------------------------
+ *           (a * MT) + t * (b - a)
+ *
+ * + * It can be shown that this g(t) = f(t * MT). The denominator + * is a linear interpolation in the range [b*MT, a*MT], as t moves in the + * interval [0, MT]. So the interpolation interval of the function is again + * [b, a]. The implementation caches the value of the numerator and parts + * of the denominator, so that the formula becomes: + * + * 
+ * alpha = a * b * MT
+ * beta = a * MT
+ * gamma = b - a
+ *
+ *                alpha
+ * g(t) = ----------------------
+ *           beta + t * gamma
+ *
+ * + * and t is exactly the parameter that ramp_evaluate() gets, + * that is the current time (in range [0, MT]). The operations performed + * for each step are just an addition, a multiplication and a division. + * + * The fixed point version of the formula instead transforms the original + * function as follows: + * + * 
+ *                   a * b                         a
+ *  f(t) =  -------------------------  =  --------------------
+ *                 a                         a
+ *           b * ( - * (1 - t) + t )         - * (1 - t) + t
+ *                 b                         b
+ *
+ * + * t must be computed by dividing the current time (24 bit integer) + * by the maximum time (24 bit integer). This is done by precomputing the + * reciprocal of the maximum time as a 0.32 fixed point number, and multiplying + * it to the current time. Multiplication is performed 8-bits a time by + * FIX_MULT32(), so that we end up with a 0.16 fixed point number for + * t (and 1-t is just its twos-complement negation). + * a/b is in the range [0,1] (because a is always less than b, + * being the minimum wavelength), so it is precomputed as a 0.16 fixed point. + * The final step is then computing the denominator and executing the division + * (32 cycles using the 1-step division instruction in the DSP). + * + * The assembly implementation is needed for efficiency, but a C version of it + * can be easily written, in case it is needed in the future. + * + */ + +#include "ramp.h" +#include +#include + + +static bool ramp_test_single(uint32_t minFreq, uint32_t maxFreq, uint32_t length) +{ + struct Ramp r; + uint16_t cur, old; + uint32_t clock; + uint32_t oldclock; + + ramp_setup(&r, length, minFreq, maxFreq); + + cur = old = r.clocksMaxWL; + clock = 0; + oldclock = 0; + + kprintf("testing ramp: (length=%lu, min=%lu, max=%lu)\n", (unsigned long)length, (unsigned long)minFreq, (unsigned long)maxFreq); + kprintf(" [length=%lu, max=%04x, min=%04x]\n", (unsigned long)r.clocksRamp, r.clocksMaxWL, r.clocksMinWL); + + int i = 0; + int nonbyte = 0; + + while (clock + cur < r.clocksRamp) + { + oldclock = clock; + old = cur; + + clock += cur; + cur = ramp_evaluate(&r, clock); + + if (old < cur) + { + uint16_t t1 = FIX_MULT32(oldclock >> RAMP_CLOCK_SHIFT_PRECISION, r.precalc.inv_total_time); + uint16_t t2 = FIX_MULT32(clock >> RAMP_CLOCK_SHIFT_PRECISION, r.precalc.inv_total_time); + uint16_t denom1 = FIX_MULT32((uint16_t)((~t1) + 1), r.precalc.max_div_min) + t1; + uint16_t denom2 = FIX_MULT32((uint16_t)((~t2) + 1), r.precalc.max_div_min) + t2; + + kprintf(" Failed: %04x @ %lu --> %04x @ %lu\n", old, (unsigned long)oldclock, cur, (unsigned long)clock); + kprintf(" T: %04x -> %04x\n", t1, t2); + kprintf(" DENOM: %04x -> %04x\n", denom1, denom2); + + cur = ramp_evaluate(&r, clock); + return false; + } + i++; + if ((old-cur) >= 256) + nonbyte++; + } + + + + kprintf("Test finished: %04x @ %lu [min=%04x, totlen=%lu, numsteps:%d, nonbyte:%d]\n", cur, (unsigned long)clock, r.clocksMinWL, (unsigned long)r.clocksRamp, i, nonbyte); + + return true; +} + +int ramp_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int ramp_testTearDown(void) +{ + return 0; +} + +int ramp_testRun(void) +{ + #define TEST_RAMP(min, max, len) do { \ + if (!ramp_test_single(min, max, len)) \ + return -1; \ + } while(0) + + TEST_RAMP(200, 5000, 3000000); + TEST_RAMP(1000, 2000, 1000000); + + return 0; +} + +TEST_MAIN(ramp); diff --git a/bertos/algo/rand.c b/bertos/algo/rand.c new file mode 100644 index 0000000..901e23f --- /dev/null +++ b/bertos/algo/rand.c @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Very simple rand() algorithm. + * + * \author Bernie Innocenti + */ + +#include "rand.h" + +/** + * This would really belong to libc + */ +int rand(void) +{ + static unsigned long seed; + + /* Randomize seed */ + seed = (seed ^ 0x4BAD5A39UL) + 6513973UL; + + return (int)(seed>>16); +} diff --git a/bertos/algo/rand.h b/bertos/algo/rand.h new file mode 100644 index 0000000..773429f --- /dev/null +++ b/bertos/algo/rand.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \brief Very simple rand() algorithm. + * + * \author Bernie Innocenti + */ + +#ifndef RAND_H +#define RAND_H + +int rand(void); + +#endif diff --git a/bertos/algo/randpool.c b/bertos/algo/randpool.c new file mode 100644 index 0000000..4d420f3 --- /dev/null +++ b/bertos/algo/randpool.c @@ -0,0 +1,257 @@ +/** + * \file + * + * + * \brief API function for to manage entropy pool. + * + * \author Daniele Basile + */ + +#include "randpool.h" +#include "md2.h" + +#include +#include //ASSERT() +#include //MIN(), ROUND_UP(); + +#include //sprintf(); +#include //memset(), memcpy(); + +#if CONFIG_RANDPOOL_TIMER + #include //timer_clock(); +#endif + + + +/* + * Insert bytes in entropy pool, making a XOR of bytes present + * in entropy pool. + */ +static void randpool_push(EntropyPool *pool, void *_byte, size_t n_byte) +{ + size_t i = pool->pos_add; // Current number of byte insert in entropy pool. + uint8_t *byte; + + byte = (uint8_t *)_byte; + + /* + * Insert a bytes in entropy pool. + */ + for(size_t j = 0; j < n_byte; j++) + { + pool->pool_entropy[i] = pool->pool_entropy[i] ^ byte[j]; + i++; + i = i % CONFIG_SIZE_ENTROPY_POOL; + } + + pool->pos_add = i; // Update a insert bytes. +} + + +/* + * This function stir entropy pool with MD2 function hash. + * + */ +static void randpool_stir(EntropyPool *pool) +{ + size_t entropy = pool->entropy; //Save current calue of entropy. + Md2Context context; + uint8_t tmp_buf[((sizeof(size_t) * 2) + sizeof(int)) * 2 + 1]; //Temporary buffer. + + md2_init(&context); //Init MD2 algorithm. + + randpool_add(pool, NULL, 0); + + for (int i = 0; i < (CONFIG_SIZE_ENTROPY_POOL / MD2_DIGEST_LEN); i++) + { + sprintf((char *)tmp_buf, "%0x%0x%0x", pool->counter, i, pool->pos_add); + + /* + * Hash with MD2 algorithm the entropy pool. + */ + md2_update(&context, pool->pool_entropy, CONFIG_SIZE_ENTROPY_POOL); + + md2_update(&context, tmp_buf, sizeof(tmp_buf) - 1); + + /*Insert a message digest in entropy pool.*/ + randpool_push(pool, md2_end(&context), MD2_DIGEST_LEN); + + pool->counter = pool->counter + 1; + + } + + /*Insert in pool the difference between a two call of this function (see above).*/ + randpool_add(pool, NULL, 0); + + pool->entropy = entropy; //Restore old value of entropy. We haven't add entropy. +} + +/** + * Add \param entropy bits from \param data buffer to the entropy \param pool + */ +void randpool_add(EntropyPool *pool, void *data, size_t entropy) +{ + uint8_t sep[] = "\xaa\xaa\xaa\xaa"; // ?? + size_t data_len = ROUND_UP(entropy, 8) / 8; //Number of entropy byte in input. + + randpool_push(pool, data, data_len); //Insert data to entropy pool. + +#if CONFIG_RANDPOOL_TIMER + + ticks_t event = timer_clock(); + ticks_t delta; + + /*Difference of time between a two accese to entropy pool.*/ + delta = event - pool->last_counter; + + randpool_push(pool, &event, sizeof(ticks_t)); + randpool_push(pool, sep, sizeof(sep) - 1); // ?? + randpool_push(pool, &delta, sizeof(delta)); + + /* + * Count of number entropy bit add with delta. + */ + delta = delta & 0xff; + while(delta) + { + delta >>= 1; + entropy++; + } + + pool->last_counter = event; + +#endif + + pool->entropy += entropy; //Update a entropy of the pool. +} + +/** + * Randpool function initialization. + * The entropy pool can be initialize also with + * a previous entropy pool. + */ +void randpool_init(EntropyPool *pool, void *_data, size_t len) +{ + uint8_t *data; + + data = (uint8_t *)_data; + + memset(pool, 0, sizeof(EntropyPool)); + pool->pos_get = MD2_DIGEST_LEN; + +#if CONFIG_RANDPOOL_TIMER + pool->last_counter = timer_clock(); +#endif + + if(data) + { + /* + * Initialize a entropy pool with a + * previous pool, and assume all pool as + * entropy. + */ + len = MIN(len,(size_t)CONFIG_SIZE_ENTROPY_POOL); + memcpy(pool->pool_entropy, data, len); + pool->entropy = len; + } + +} + +/** + * Get the actual value of entropy. + */ +size_t randpool_size(EntropyPool *pool) +{ + return pool->entropy; +} + +/** + * Get \param n_byte from entropy pool. If n_byte is larger than number + * byte of entropy in entropy pool, randpool_get continue + * to generate pseudocasual value from previous state of + * pool. + * \param n_byte number fo bytes to read. + * \param pool is the pool entropy context. + * \param _data is the pointer to write the random data to. + */ +void randpool_get(EntropyPool *pool, void *_data, size_t n_byte) +{ + Md2Context context; + size_t i = pool->pos_get; + size_t n = n_byte; + size_t pos_write = 0; //Number of block has been written in data. + size_t len = MIN((size_t)MD2_DIGEST_LEN, n_byte); + uint8_t *data; + + data = (uint8_t *)_data; + + /* Test if i + CONFIG_MD2_BLOCK_LEN is inside of entropy pool.*/ + ASSERT((MD2_DIGEST_LEN + i) <= CONFIG_SIZE_ENTROPY_POOL); + + md2_init(&context); + + while(n > 0) + { + + /*Hash previous state of pool*/ + md2_update(&context, &pool->pool_entropy[i], MD2_DIGEST_LEN); + + memcpy(&data[pos_write], md2_end(&context), len); + + pos_write += len; //Update number of block has been written in data. + n -= len; //Number of byte copied in data. + + len = MIN(n,(size_t)MD2_DIGEST_LEN); + + i = (i + MD2_DIGEST_LEN) % CONFIG_SIZE_ENTROPY_POOL; + + /* If we haven't more entropy pool to hash, we stir it.*/ + if(i < MD2_DIGEST_LEN) + { + randpool_stir(pool); + i = pool->pos_get; + } + + } + + pool->pos_get = i; //Current number of byte we get from pool. + pool->entropy -= n_byte; //Update a entropy. + +} + +/** + * Return a pointer to entropy pool. + */ +uint8_t *randpool_pool(EntropyPool *pool) +{ + return pool->pool_entropy; +} + diff --git a/bertos/algo/randpool.h b/bertos/algo/randpool.h new file mode 100644 index 0000000..fbfdaaa --- /dev/null +++ b/bertos/algo/randpool.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Collection of functions to manage entropy pool. + * + * + * \author Daniele Basile + * + * $WIZ$ module_name = "randpool" + * $WIZ$ module_depends = "timer", "sprintf" + * $WIZ$ module_configuration = "bertos/cfg/cfg_randpool.h" + */ + +#ifndef ALGO_RANDPOOL_H +#define ALGO_RANDPOOL_H + +#include "cfg/cfg_randpool.h" +#include + + +/** + * Sturct data of entropy pool. + */ +typedef struct EntropyPool +{ + size_t entropy; ///< Actual value of entropy (byte). + size_t pos_add; ///< Number of byte added in entropy pool. + size_t pos_get; ///< Number of byte got in entropy pool. + size_t counter; ///< Counter. + +#if CONFIG_RANDPOOL_TIMER + size_t last_counter; ///< Last timer value. +#endif + + uint8_t pool_entropy[CONFIG_SIZE_ENTROPY_POOL]; ///< Entropy pool. + +} EntropyPool; + + +void randpool_add(EntropyPool *pool, void *data, size_t entropy); +void randpool_init(EntropyPool *pool, void *_data, size_t len); +size_t randpool_size(EntropyPool *pool); +void randpool_get(EntropyPool *pool, void *data, size_t n_byte); +uint8_t *randpool_pool(EntropyPool *pool); + +#endif /* ALGO_RANDPOOL_H */ diff --git a/bertos/algo/reverse_test.c b/bertos/algo/reverse_test.c new file mode 100644 index 0000000..26de751 --- /dev/null +++ b/bertos/algo/reverse_test.c @@ -0,0 +1,87 @@ +/** + * \file + * + * + * \brief REVERSE macro test. + * + * \author Francesco Sacchi + */ + +#include +#include +#include + + +/* Silent compiler warning */ +int reverse_testSetup(void); +int reverse_testRun(void); +int reverse_testTearDown(void); + + +int reverse_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int reverse_testTearDown(void) +{ + return 0; +} + +/** + * Naive reverse implementation. + */ +static uint8_t reverse(uint8_t b) +{ + uint8_t r = 0; + + for (int i = 0; i < 8; i++) + { + r <<= 1; + r |= (b & BV(i)) ? 1 : 0; + } + + return r; +} + +int reverse_testRun(void) +{ + for (int i = 0; i < 256; i++) + { + kprintf("i [%02X], REVERSE(i) [%02X], reverse(i) [%02X]\n", i, REVERSE_UINT8(i), reverse(i)); + ASSERT(reverse(i) == REVERSE_UINT8(i)); + } + return 0; +} + +TEST_MAIN(reverse); diff --git a/bertos/algo/rle.c b/bertos/algo/rle.c new file mode 100644 index 0000000..5fda48c --- /dev/null +++ b/bertos/algo/rle.c @@ -0,0 +1,150 @@ +/** + * \file + * + * + * \brief General-purpose run-length {en,de}coding algorithm (implementation) + * + * Original source code from http://www.compuphase.com/compress.htm + * + * \author Bernie Innocenti + */ + +#include "rle.h" + + +/** + * Run-length encode \a len bytes from the \a input buffer + * to the \a output buffer. + */ +int rle(unsigned char *output, const unsigned char *input, int len) +{ + int count, index, i; + unsigned char first; + unsigned char *out; + + + out = output; + count = 0; + while (count < len) + { + index = count; + first = input[index++]; + + /* Scan for bytes identical to the first one */ + while ((index < len) && (index - count < 127) && (input[index] == first)) + index++; + + if (index - count == 1) + { + /* Failed to "replicate" the current byte. See how many to copy. + */ + while ((index < len) && (index - count < 127)) + { + /* Avoid a replicate run of only 2-bytes after a literal run. + * There is no gain in this, and there is a risc of loss if the + * run after the two identical bytes is another literal run. + * So search for 3 identical bytes. + */ + if ((input[index] == input[index - 1]) && + ((index > 1) && (input[index] == input[index - 2]))) + { + /* Reset the index so we can back up these three identical + * bytes in the next run. + */ + index -= 2; + break; + } + + index++; + } + + /* Output a run of uncompressed bytes: write length and values */ + *out++ = (unsigned char)(count - index); + for (i = count; i < index; i++) + *out++ = input[i]; + } + else + { + /* Output a compressed run: write length and value */ + *out++ = (unsigned char)(index - count); + *out++ = first; + } + + count = index; + } + + /* Output EOF marker */ + *out++ = 0; + + return (out - output); +} + + +/** + * Run-length decode from the \a input buffer to the \a output + * buffer. + * + * \note The output buffer must be large enough to accomodate + * all decoded output. + */ +int unrle(unsigned char *output, const unsigned char *input) +{ + signed char count; + unsigned char *out; + unsigned char value; + + + out = output; + + for (;;) + { + count = (signed char)*input++; + if (count > 0) + { + /* replicate run */ + value = *input++; + while (count--) + *out++ = value; + } + else if (count < 0) + { + /* literal run */ + while (count++) + *out++ = *input++; + } + else + /* EOF */ + break; + } + + return (out - output); +} diff --git a/bertos/algo/rle.h b/bertos/algo/rle.h new file mode 100644 index 0000000..1c29a60 --- /dev/null +++ b/bertos/algo/rle.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief General-purpose run-length {en,de}coding algorithm. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "rle" + */ +#ifndef RLE_H +#define RLE_H + +int rle(unsigned char *output, const unsigned char *input, int length); +int unrle(unsigned char *output, const unsigned char *input); + +#endif /* RLE_H */ diff --git a/bertos/algo/rotating_hash.h b/bertos/algo/rotating_hash.h new file mode 100644 index 0000000..791e90b --- /dev/null +++ b/bertos/algo/rotating_hash.h @@ -0,0 +1,83 @@ +/** + * \file + * + * + * \brief Rotating Hash algorithm. + * + * This is a simple yet powerfull checksum algorithm. + * Instead of just xor-ing the data, rotating hash + * circular shift the checksum 4 place left before xoring. + * This is a bit more stronger than simply sum the data. + * + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "rotating_hash" + */ + + +#ifndef ALGO_ROTATING_H +#define ALGO_ROTATING_H + +#include + +typedef uint16_t rotating_t; + + +/** + * Init rotating checksum. + */ +INLINE void rotating_init(rotating_t *rot) +{ + *rot = 0; +} + +/** + * Update checksum pointed by \c rot with \c c data. + */ +INLINE void rotating_update1(uint8_t c, rotating_t *rot) +{ + *rot = (*rot << 4) ^ (*rot >> 12) ^ c; +} + +/** + * Update checksum pointed by \c rot with data supplied in \c buf. + */ +INLINE void rotating_update(const void *_buf, size_t len, rotating_t *rot) +{ + const uint8_t *buf = (const uint8_t *)_buf; + + while (len--) + rotating_update1(*buf++, rot); +} + + +#endif // ALGO_ROTATING_H diff --git a/bertos/algo/tea.c b/bertos/algo/tea.c new file mode 100644 index 0000000..5db72cf --- /dev/null +++ b/bertos/algo/tea.c @@ -0,0 +1,131 @@ +/** + * \file + * + * + * \brief TEA Tiny Encription Algorith functions (implementation). + * + * \author Francesco Sacchi + * + * The Tiny Encryption Algorithm (TEA) by David Wheeler and Roger Needham + * of the Cambridge Computer Laboratory + * + * Placed in the Public Domain by David Wheeler and Roger Needham. + * + * **** ANSI C VERSION **** + * + * Notes: + * + * TEA is a Feistel cipher with XOR and and addition as the non-linear + * mixing functions. + * + * Takes 64 bits of data in v[0] and v[1]. Returns 64 bits of data in w[0] + * and w[1]. Takes 128 bits of key in k[0] - k[3]. + * + * TEA can be operated in any of the modes of DES. Cipher Block Chaining is, + * for example, simple to implement. + * + * n is the number of iterations. 32 is ample, 16 is sufficient, as few + * as eight may be OK. The algorithm achieves good dispersion after six + * iterations. The iteration count can be made variable if required. + * + * Note this is optimised for 32-bit CPUs with fast shift capabilities. It + * can very easily be ported to assembly language on most CPUs. + * + * delta is chosen to be the real part of (the golden ratio Sqrt(5/4) - + * 1/2 ~ 0.618034 multiplied by 2^32). + */ + +#include "tea.h" +#include + +static uint32_t tea_func(uint32_t *in, uint32_t *sum, uint32_t *k) +{ + return ((*in << 4) + cpu_to_le32(k[0])) ^ (*in + *sum) ^ ((*in >> 5) + cpu_to_le32(k[1])); +} + +/** + * \brief TEA encryption function. + * This function encrypts v with k and returns the + * encrypted data in v. + * \param _v Array of two long values containing the data block. + * \param _k Array of four long values containing the key. + */ +void tea_enc(void *_v, void *_k) +{ + uint32_t y, z; + uint32_t sum = 0; + uint8_t n = ROUNDS; + uint32_t *v = (uint32_t *)_v; + uint32_t *k = (uint32_t *)_k; + + y=cpu_to_le32(v[0]); + z=cpu_to_le32(v[1]); + + while(n-- > 0) + { + sum += DELTA; + y += tea_func(&z, &sum, &(k[0])); + z += tea_func(&y, &sum, &(k[2])); + } + + v[0] = le32_to_cpu(y); + v[1] = le32_to_cpu(z); +} + +/** + * \brief TEA decryption function. + * This function decrypts v with k and returns the + * decrypted data in v. + * \param _v Array of two long values containing the data block. + * \param _k Array of four long values containing the key. + */ +void tea_dec(void *_v, void *_k) +{ + uint32_t y, z; + uint32_t sum = DELTA * ROUNDS; + uint8_t n = ROUNDS; + uint32_t *v = (uint32_t *)_v; + uint32_t *k = (uint32_t *)_k; + + y = cpu_to_le32(v[0]); + z = cpu_to_le32(v[1]); + + while(n-- > 0) + { + z -= tea_func(&y, &sum, &(k[2])); + y -= tea_func(&z, &sum, &(k[0])); + sum -= DELTA; + } + + v[0] = le32_to_cpu(y); + v[1] = le32_to_cpu(z); +} + diff --git a/bertos/algo/tea.h b/bertos/algo/tea.h new file mode 100644 index 0000000..bf21444 --- /dev/null +++ b/bertos/algo/tea.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief TEA Tiny Encription Algorith functions. + * + * Documentation for TEA is available at + * http://en.wikipedia.org/wiki/Tiny_Encryption_Algorithm + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "tea" + */ + +#ifndef ALGO_TEA_H +#define ALGO_TEA_H + +#include + +#define TEA_KEY_LEN 16 //!< TEA key size. +#define TEA_BLOCK_LEN 8 //!< TEA block length. + +#define DELTA 0x9E3779B9 //!< Magic value. (Golden number * 2^31) +#define ROUNDS 32 //!< Number of rounds. + +void tea_enc(void *_v, void *_k); +void tea_dec(void *_v, void *_k); + +#endif /* ALGO_TEA_H */ + diff --git a/bertos/benchmark/context_switch.c b/bertos/benchmark/context_switch.c new file mode 100644 index 0000000..1229889 --- /dev/null +++ b/bertos/benchmark/context_switch.c @@ -0,0 +1,136 @@ +/** + * \file + * + * + * \brief Context switch benchmark + * + * \author Andrea Righi + * \author Daniele Basiele + */ + +#include "context_switch.h" + +#include "hw/hw_led.h" + +#include "cfg/cfg_context_switch.h" +#include + +#include +#include + +#include +#if CONFIG_USE_HP_TIMER +#include +static Serial out; +#endif + +#include + +#define PROC_STACK_SIZE KERN_MINSTACKSIZE + +static PROC_DEFINE_STACK(hp_stack, PROC_STACK_SIZE); +static PROC_DEFINE_STACK(lp_stack, PROC_STACK_SIZE); + +static Process *hp_proc, *lp_proc, *main_proc; +#if CONFIG_USE_HP_TIMER +static hptime_t start, end; +#endif + +static void NORETURN hp_process(void) +{ + while (1) + { + sig_wait(SIG_USER0); + #if CONFIG_USE_LED + LED_ON(); + #endif + #if CONFIG_USE_HP_TIMER + end = timer_hw_hpread(); + #endif + sig_send(main_proc, SIG_USER0); + } +} + +static void NORETURN lp_process(void) +{ + while (1) + { + sig_wait(SIG_USER0); + #if CONFIG_USE_LED + LED_ON(); + LED_OFF(); + #endif + #if CONFIG_USE_HP_TIMER + start = timer_hw_hpread(); + #endif + sig_send(hp_proc, SIG_USER0); + } +} + + +void NORETURN context_switch(void) +{ + IRQ_ENABLE; + timer_init(); + proc_init(); + + #if CONFIG_USE_HP_TIMER + ser_init(&out, CONFIG_CTX_DEBUG_PORT); + ser_setbaudrate(&out, CONFIG_CTX_DEBUG_BAUDRATE); + #endif + + #if CONFIG_USE_LED + LED_INIT(); + #endif + + proc_forbid(); + hp_proc = proc_new(hp_process, NULL, PROC_STACK_SIZE, hp_stack); + lp_proc = proc_new(lp_process, NULL, PROC_STACK_SIZE, lp_stack); + main_proc = proc_current(); + proc_setPri(hp_proc, 2); + proc_setPri(lp_proc, 1); + proc_permit(); + + while (1) + { + timer_delay(100); + + sig_send(lp_proc, SIG_USER0); + sig_wait(SIG_USER0); + + #if CONFIG_USE_HP_TIMER + kfile_printf(&out.fd, + "Switch: %lu.%lu usec\n\r", + hptime_to_us((end - start)), + hptime_to_us((end - start) * 1000) % 1000); + #endif + } +} diff --git a/bertos/benchmark/context_switch.h b/bertos/benchmark/context_switch.h new file mode 100644 index 0000000..350a531 --- /dev/null +++ b/bertos/benchmark/context_switch.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Context switch benchmark + * + * \author Andrea Righi + * \author Daniele Basiele + * + * $WIZ$ module_name = "context_switch" + * $WIZ$ module_depends = "kfile", "kern", "signal", "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_context_switch.h" + * $WIZ$ module_hw = "bertos/hw/hw_led.h" + */ + +#ifndef BENCHMARK_CONTEXT_SWITCH_H +#define BENCHMARK_CONTEXT_SWITCH_H + +void context_switch(void); + +#endif /* BENCHMARK_CONTEXT_SWITCH_H */ diff --git a/bertos/benchmark/kernel_footprint.c b/bertos/benchmark/kernel_footprint.c new file mode 100644 index 0000000..b3cd045 --- /dev/null +++ b/bertos/benchmark/kernel_footprint.c @@ -0,0 +1,96 @@ +/** + * \file + * + * + * \author Luca Ottaviano + * \author Andrea Righi + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + */ + +#include "kernel_footprint.h" + +#include + +#include +#include +#include +#include + +MsgPort in_port; + +static void init(void) +{ + IRQ_ENABLE; + proc_init(); +} + +static PROC_DEFINE_STACK(proc1_stack, KERN_MINSTACKSIZE); + +static NORETURN void proc1_main(void) +{ + int i; + for(;;) + { + i++; + } +} + +void kernel_footprint(void) +{ + init(); + + // generate code for process + struct Process *p = + proc_new(proc1_main, 0, sizeof(proc1_stack), proc1_stack); + proc_setPri(p, 5); + proc_yield(); + + // generate code for msg + Msg msg; + msg_initPort(&in_port, event_createSignal(p, SIG_USER1)); + msg_put(&in_port, &msg); + msg_peek(&in_port); + Msg *msg_re = msg_get(&in_port); + msg_reply(msg_re); + + // generate code for signals + sig_send(p, SIG_USER0); + + // generate code for msg + Semaphore sem; + sem_init(&sem); + sem_obtain(&sem); + sem_release(&sem); + + sig_wait(SIG_USER0); +} diff --git a/bertos/benchmark/kernel_footprint.h b/bertos/benchmark/kernel_footprint.h new file mode 100644 index 0000000..3df0a0c --- /dev/null +++ b/bertos/benchmark/kernel_footprint.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Kernel footprint benchmark. + * + * $WIZ$ module_name = "kernel_footprint" + * $WIZ$ module_depends = "kfile", "kern", "signal", "msg", "semaphores", "event" + */ + +#ifndef BENCHMARK_KERNEL_FOOTPRINT_H +#define BENCHMARK_KERNEL_FOOTPRINT_H + +void kernel_footprint(void); + +#endif /* BENCHMARK_KERNEL_FOOTPRINT_H */ diff --git a/bertos/cfg/cfg_adc.h b/bertos/cfg/cfg_adc.h new file mode 100644 index 0000000..62ee6ed --- /dev/null +++ b/bertos/cfg/cfg_adc.h @@ -0,0 +1,149 @@ +/** + * \file + * + * + * \brief Configuration file for the ADC module. + * + * \author Daniele Basile + */ + +#ifndef CFG_ADC_H +#define CFG_ADC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ADC_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ADC_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Clock Frequency for ADC conversion. + * This frequency will be rounded down to an integer + * submultiple of CPU_FREQ. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "at91" + * $WIZ$ max = 5000000 + */ +#define CONFIG_ADC_CLOCK 4800000UL + +/** + * Minimum time for starting up a conversion [us]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 20 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_STARTUP_TIME 20 + +/** + * Minimum time for sample and hold [ns]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 600 + * $WIZ$ supports = "at91" + */ +#define CONFIG_ADC_SHTIME 834 + +/** + * ADC Voltage Reference. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "avr_adc_refs" + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_REF ADC_AVR_AVCC + +/** + * ADC clock divisor from main crystal. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ max = 128 + * $WIZ$ supports = "avr" + */ +#define CONFIG_ADC_AVR_DIVISOR 2 + +/** + * Enable ADC strobe for debugging ADC ISR. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_ADC_STROBE 0 + + +/** + * Start up timer[s] = startup value / ADCClock [Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_sut" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_SUT ADC_SUT512 + +/** + * Analog Settling Time[s] = settling value / ADCClock[Hz] + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3_adc_stt" + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_STTLING ADC_AST17 + +/** + * Tracking Time[s] = (TRACKTIM + 1) / ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRACKTIM 0 + +/** + * Transfer Period[s] = (TRANSFER * 2 + 3) ADCClock[Hz] + * + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ supports = "sam3" + */ +#define CONFIG_ADC_TRANSFER 1 + +#endif /* CFG_ADC_H */ diff --git a/bertos/cfg/cfg_afsk.h b/bertos/cfg/cfg_afsk.h new file mode 100644 index 0000000..cce47c1 --- /dev/null +++ b/bertos/cfg/cfg_afsk.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Configuration file for AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AFSK_H +#define CFG_AFSK_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AFSK_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AFSK_LOG_FORMAT LOG_FMT_TERSE + + +/** + * AFSK discriminator filter type. + * + * $WIZ$ type = "enum"; value_list = "afsk_filter_list" + */ +#define CONFIG_AFSK_FILTER AFSK_CHEBYSHEV + + +/** + * AFSK receiver buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_RX_BUFLEN 32 + +/** + * AFSK transimtter buffer length. + * + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_AFSK_TX_BUFLEN 32 + +/** + * AFSK DAC sample rate for modem outout. + * $WIZ$ type = "int" + * $WIZ$ min = 2400 + */ +#define CONFIG_AFSK_DAC_SAMPLERATE 9600 + +/** + * AFSK RX timeout in ms, set to -1 to disable. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_AFSK_RXTIMEOUT 0 + + +/** + * AFSK Preamble length in [ms], before starting transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_PREAMBLE_LEN 300UL + + + +/** + * AFSK Trailer length in [ms], before stopping transmissions. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_AFSK_TRAILER_LEN 50UL + +#endif /* CFG_AFSK_H */ diff --git a/bertos/cfg/cfg_arch.h b/bertos/cfg/cfg_arch.h new file mode 100644 index 0000000..2b8faf5 --- /dev/null +++ b/bertos/cfg/cfg_arch.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Set system configuration. + * + * + * \author Bernie Innocenti + * + */ + + +#ifndef CFG_ARCH_CONFIG_H +#define CFG_ARCH_CONFIG_H + +#define ARCH_DEFAULT (1<<0) ///< Default architecture + +#define ARCH_EMUL (1<<2) ///< EMUL architecture +#define ARCH_QT (1<<3) ///< QT architecture +#define ARCH_UNITTEST (1<<4) ///< UNITTEST architecture +#define ARCH_NIGHTTEST (1<<5) ///< NIGHTTEST architecture + +#endif /* CFG_ARCH_CONFIG_H */ diff --git a/bertos/cfg/cfg_attr.h b/bertos/cfg/cfg_attr.h new file mode 100644 index 0000000..9ff65e3 --- /dev/null +++ b/bertos/cfg/cfg_attr.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_ATTR_H +#define CFG_ATTR_H + +/// Put a function or critical code in fast memory. +#define CONFIG_FAST_MEM 0 + + +#endif /* CFG_ATTR_H */ diff --git a/bertos/cfg/cfg_ax25.h b/bertos/cfg/cfg_ax25.h new file mode 100644 index 0000000..f561d21 --- /dev/null +++ b/bertos/cfg/cfg_ax25.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file for the AX25 protocol module. + * + * \author Francesco Sacchi + */ + +#ifndef CFG_AX25_H +#define CFG_AX25_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define AX25_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define AX25_LOG_FORMAT LOG_FMT_TERSE + +/** + * AX25 frame buffer lenght. + * + * $WIZ$ type = "int" + * $WIZ$ min = 18 + */ +#define CONFIG_AX25_FRAME_BUF_LEN 330 + + +/** + * Enable repeaters listing in AX25 frames. + * If enabled use 56 addtional bytes of RAM + * for each message received. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_AX25_RPT_LST 1 + +#endif /* CFG_AX25_H */ diff --git a/bertos/cfg/cfg_battfs.h b/bertos/cfg/cfg_battfs.h new file mode 100644 index 0000000..249dda7 --- /dev/null +++ b/bertos/cfg/cfg_battfs.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for BattFS module. + * + * \author Daniele Basile + */ + +#ifndef CFG_BATTFS_H +#define CFG_BATTFS_H + + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define BATTFS_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define BATTFS_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Set to 1 to enable free page shuffling. + * This increase memories life but makes debugging + * more difficult due to its unrepeteable state. + * $WIZ$ type = "boolean" + */ +#define CONFIG_BATTFS_SHUFFLE_FREE_PAGES 0 + + +#endif /* BATTFS */ diff --git a/bertos/cfg/cfg_boot.h b/bertos/cfg/cfg_boot.h new file mode 100644 index 0000000..96319e1 --- /dev/null +++ b/bertos/cfg/cfg_boot.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Configuration file for bootloader module. + */ + +#ifndef CFG_BOOT_H +#define CFG_BOOT_H + +/// Bootloader log level +#define CONFIG_BOOT_LOG_LEVEL LOG_LVL_INFO + +/// Bootoloader log format +#define CONFIG_BOOT_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_FLASH_AT91_H */ diff --git a/bertos/cfg/cfg_buzzerled.h b/bertos/cfg/cfg_buzzerled.h new file mode 100644 index 0000000..7763022 --- /dev/null +++ b/bertos/cfg/cfg_buzzerled.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Configuration file for buzzerled module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_BUZZERLED_H +#define CFG_BUZZERLED_H + +/// TODO +#define CONFIG_NUM_BLDS 1 + + +#endif /* CFG_BUZZERLED_H */ + diff --git a/bertos/cfg/cfg_context_switch.h b/bertos/cfg/cfg_context_switch.h new file mode 100644 index 0000000..fe0b4f8 --- /dev/null +++ b/bertos/cfg/cfg_context_switch.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for the context switch benchmark. + * + * \author Daniele Basile + */ + +#ifndef CFG_CONTEXT_SWITCH_H +#define CFG_CONTEXT_SWITCH_H + +/** + * Use hp timer for the bechmark. + * + * $WIZ$ type = "boolean" + * $WIZ$ module= "boolean" + * $WIZ$ conditional_deps = "ser" + */ +#define CONFIG_USE_HP_TIMER 1 + + +/** + * Use board led for benchmark. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_USE_LED 1 + + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_CTX_DEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_CTX_DEBUG_BAUDRATE 115200UL + +#endif /* CFG_CONTEXT_SWITCH_H */ diff --git a/bertos/cfg/cfg_dac.h b/bertos/cfg/cfg_dac.h new file mode 100644 index 0000000..1ae1e98 --- /dev/null +++ b/bertos/cfg/cfg_dac.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief Configuration file for DAC module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DAC_H +#define CFG_DAC_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DAC_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DAC_LOG_FORMAT LOG_FMT_TERSE + +/** + * DAC Refresh Period = 1024*REFRESH/DACC Clock + * + * $WIZ$ type = "int" + * $WIZ$ supports = "sam3x" + * $WIZ$ min = 0 + * $WIZ$ max = 65536 + */ +#define CONFIG_DAC_REFRESH 16 + +/** + * DAC Startup Time Selection. + * see datasheet table. + * + * $WIZ$ type = "int" + * $WIZ$ supports = "sam3x" + * $WIZ$ min = 0 + * $WIZ$ max = 63 + */ +#define CONFIG_DAC_STARTUP 0 + +/** + * DAC Trigger Selection. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "sam3x_dac_tc" + * $WIZ$ supports = "sam3x" + */ +#define CONFIG_DAC_TIMER DACC_TRGSEL_TIO_CH0 + +#endif /* CFG_DAC_H */ diff --git a/bertos/cfg/cfg_dataflash.h b/bertos/cfg/cfg_dataflash.h new file mode 100644 index 0000000..4e7dfbd --- /dev/null +++ b/bertos/cfg/cfg_dataflash.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for data flash memory module. + * + * \author Daniele Basile + */ + +#ifndef CFG_DATAFLASH_H +#define CFG_DATAFLASH_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DATAFLASH_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DATAFLASH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_DATAFLASH_H */ diff --git a/bertos/cfg/cfg_dc_motor.h b/bertos/cfg/cfg_dc_motor.h new file mode 100644 index 0000000..fd9bac7 --- /dev/null +++ b/bertos/cfg/cfg_dc_motor.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \brief Configuration file for DC motor module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DC_MOTOR_H +#define CFG_DC_MOTOR_H + +/** + * Number of the DC motors to manage. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_DC_MOTOR 4 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define DC_MOTOR_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define DC_MOTOR_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Min value of DC motor speed. + * \note Generally this value is the min value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_MIN_SPEED 0 + + +/** + * Max value of DC motor speed. + * \note Generally this value is the max value of the ADC conversion, + * if you use it. + * + * $WIZ$ type = "int" + * $WIZ$ max = 65535 + */ +#define CONFIG_DC_MOTOR_MAX_SPEED 65535 + + +/** + * Sampling period in millisecond. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_PERIOD 40 + +/** + * Amount of millisecond before to read sample. + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_SAMPLE_DELAY 2 + +/** + * This control set which mode the driver use to lock share + * resources when we use the preempitive kernel. + * If we set to 1 we use the semaphore module otherwise the + * driver disable the switch context every time we need to access + * to shared sources. + * + * $WIZ$ type = "int" + */ +#define CONFIG_DC_MOTOR_USE_SEM 1 + +#endif /* CFG_DC_MOTOR_H */ diff --git a/bertos/cfg/cfg_debug.h b/bertos/cfg/cfg_debug.h new file mode 100644 index 0000000..1063984 --- /dev/null +++ b/bertos/cfg/cfg_debug.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Configuration file for Debug module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_DEBUG_H +#define CFG_DEBUG_H + +/** + * Debug console port. + * $WIZ$ type = "int"; min = 0 + */ +#define CONFIG_KDEBUG_PORT 0 + +/** + * Baudrate for the debug console. + * $WIZ$ type = "int"; min = 300 + */ +#define CONFIG_KDEBUG_BAUDRATE 115200UL + +/** + * Clock source for the UART module. You need to write the code to reprogram the respective clock at the required frequency in your project before calling kdbg_init(). + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "kdbg_clk_src" + * $WIZ$ supports = "msp430" + */ +#define CONFIG_KDEBUG_CLOCK_SOURCE KDBG_UART_SMCLK + +/** + * Clock frequency. (Only if different from MCLK's frequency, otherwise leave it zero) + * $WIZ$ type = "int"; min = 0 + * $WIZ$ supports = "msp430" + */ +#define CONFIG_KDEBUG_CLOCK_FREQ 0UL + +#endif /* CFG_DEBUG_H */ diff --git a/bertos/cfg/cfg_eeprom.h b/bertos/cfg/cfg_eeprom.h new file mode 100644 index 0000000..b56c1f9 --- /dev/null +++ b/bertos/cfg/cfg_eeprom.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Configuration file for the Eeprom module. + * + * \author Daniele Basile + */ + +#ifndef CFG_EEPROM_H +#define CFG_EEPROM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define EEPROM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define EEPROM_LOG_FORMAT LOG_FMT_TERSE + +/** + * Check this to disable Eeprom deprecated API support. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_EEPROM_DISABLE_OLD_API 0 + +#endif /* CFG_EEPROM_H */ diff --git a/bertos/cfg/cfg_emb_flash.h b/bertos/cfg/cfg_emb_flash.h new file mode 100644 index 0000000..82d96e5 --- /dev/null +++ b/bertos/cfg/cfg_emb_flash.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Configuration file for embedded flash module. + */ + +#ifndef CFG_EMB_FLASH_H +#define CFG_EMB_FLASH_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_FLASH_EMB_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_FLASH_EMB_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Write emb flash timeout. + * For how many milliseconds the cpu wait + * to complete write operation. + * + * $WIZ$ type = "int" + */ +#define CONFIG_FLASH_WR_TIMEOUT 100 + +/** + * Check this to disable embedded flash deprecated API support. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_FLASH_DISABLE_OLD_API 0 + +#endif /* CFG_FLASH_AT91_H */ diff --git a/bertos/cfg/cfg_eth.h b/bertos/cfg/cfg_eth.h new file mode 100644 index 0000000..a378808 --- /dev/null +++ b/bertos/cfg/cfg_eth.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the generic ethernet driver module + */ + +#ifndef CFG_ETH_H +#define CFG_ETH_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define ETH_LOG_LEVEL LOG_LVL_WARN + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define ETH_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_ETH_H */ diff --git a/bertos/cfg/cfg_fat.h b/bertos/cfg/cfg_fat.h new file mode 100644 index 0000000..fcd717a --- /dev/null +++ b/bertos/cfg/cfg_fat.h @@ -0,0 +1,156 @@ +/** + * \file + * + * + * \brief Configuration file for Fat module. + * + * + * \author Luca Ottaviano + * \author Francesco Sacchi + */ + +#ifndef CFG_FAT_H +#define CFG_FAT_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define FAT_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define FAT_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Use word alignment to access FAT structure. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_WORD_ACCESS 0 +#define _WORD_ACCESS CONFIG_FAT_WORD_ACCESS + +/** + * Enable read functions only. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_READONLY 0 +#define _FS_READONLY CONFIG_FAT_FS_READONLY + +/** + * Minimization level to remove some functions. + * $WIZ$ type = "int"; min = 0; max = 3 + */ +#define CONFIG_FAT_FS_MINIMIZE 0 +#define _FS_MINIMIZE CONFIG_FAT_FS_MINIMIZE + +/** + * If enabled, this reduces memory consumption 512 bytes each file object by using a shared buffer. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_FS_TINY 1 +#define _FS_TINY CONFIG_FAT_FS_TINY + +/** + * To enable string functions, set _USE_STRFUNC to 1 or 2. + * $WIZ$ type = "int" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_USE_STRFUNC 0 +#define _USE_STRFUNC CONFIG_FAT_USE_STRFUNC + +/** + * Enable f_mkfs function. Requires CONFIG_FAT_FS_READONLY = 0. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_MKFS 0 +#define _USE_MKFS (CONFIG_FAT_USE_MKFS && !CONFIG_FAT_FS_READONLY) + +/** + * Enable f_forward function. Requires CONFIG_FAT_FS_TINY. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_FORWARD 0 +#define _USE_FORWARD (CONFIG_FAT_USE_FORWARD && CONFIG_FAT_FS_TINY) + +/** + * Number of volumes (logical drives) to be used. + * $WIZ$ type = "int"; min = 1; max = 255 + */ +#define CONFIG_FAT_DRIVES 1 +#define _DRIVES CONFIG_FAT_DRIVES + +/** + * Maximum sector size to be handled. (512/1024/2048/4096). + * 512 for memory card and hard disk, 1024 for floppy disk, 2048 for MO disk + * $WIZ$ type = "int"; min = 512; max = 4096 + */ +#define CONFIG_FAT_MAX_SS 512 +#define _MAX_SS CONFIG_FAT_MAX_SS + +/** + * When _MULTI_PARTITION is set to 0, each volume is bound to the same physical + * drive number and can mount only first primaly partition. When it is set to 1, + * each volume is tied to the partitions listed in Drives[]. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_FAT_MULTI_PARTITION 0 +#define _MULTI_PARTITION CONFIG_FAT_MULTI_PARTITION + +/** + * Specifies the OEM code page to be used on the target system. + * $WIZ$ type = "int" + */ +#define CONFIG_FAT_CODE_PAGE 850 +#define _CODE_PAGE CONFIG_FAT_CODE_PAGE + +/** + * Support for long filenames. Enable only if you have a valid Microsoft license. + * $WIZ$ type = "boolean" + */ +#define CONFIG_FAT_USE_LFN 0 +#define _USE_LFN CONFIG_FAT_USE_LFN + +/** + * Maximum Long File Name length to handle. + * $WIZ$ type = "int"; min = 8; max = 255 + */ +#define CONFIG_FAT_MAX_LFN 255 +#define _MAX_LFN CONFIG_FAT_MAX_LFN + +#endif /* CFG_FAT_H */ diff --git a/bertos/cfg/cfg_flash25.h b/bertos/cfg/cfg_flash25.h new file mode 100644 index 0000000..4b478b2 --- /dev/null +++ b/bertos/cfg/cfg_flash25.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for flash25 module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_FLASH25_H +#define CFG_FLASH25_H + +/** + * Eeprom memory type. + * + *$WIZ$ type = "enum" + *$WIZ$ value_list = "flash25_list" + */ +#define CONFIG_FLASH25 FLASH25_AT25F2048 + +#endif /* CFG_FALSH25_H */ + diff --git a/bertos/cfg/cfg_formatwr.h b/bertos/cfg/cfg_formatwr.h new file mode 100644 index 0000000..bac8aca --- /dev/null +++ b/bertos/cfg/cfg_formatwr.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Configuration file for formatted write module. + * + * \author Daniele Basile + */ + +#ifndef CFG_FORMATWR_H +#define CFG_FORMATWR_H + +/** + * printf()-style formatter configuration. + * $WIZ$ type = "enum"; value_list = "printf_list" + * + * \sa PRINTF_DISABLED + * \sa PRINTF_NOMODIFIERS + * \sa PRINTF_REDUCED + * \sa PRINTF_NOFLOAT + * \sa PRINTF_FULL + */ +#define CONFIG_PRINTF PRINTF_FULL + +/** + * Size of buffer to format "%" sequences in printf. + * + * Warning: no check on buffer size is done when formatting, be careful especially + * with big numbers and %f formatting. + * + * $WIZ$ type = "int" + * $WIZ$ min = 4 + */ +#define CONFIG_FRMWRI_BUFSIZE 134 + +#endif /* CFG_FORMATWR_H */ + diff --git a/bertos/cfg/cfg_gfx.h b/bertos/cfg/cfg_gfx.h new file mode 100644 index 0000000..59dde04 --- /dev/null +++ b/bertos/cfg/cfg_gfx.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for GFX module. + * + * \author Daniele Basile + */ + +#ifndef CFG_GFX_H +#define CFG_GFX_H + +/** + * Enable line clipping algorithm. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_CLIPPING 1 + +/** + * Enable text rendering in bitmaps. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_TEXT 1 + +/** + * Enable virtual coordinate system. + * $WIZ$ type = "boolean" + */ +#define CONFIG_GFX_VCOORDS 1 + +/** + * Select bitmap pixel format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "bitmap_format" + */ +#define CONFIG_BITMAP_FMT BITMAP_FMT_PLANAR_V_LSB + +#endif /* CFG_GFX_H */ + diff --git a/bertos/cfg/cfg_hashtable.h b/bertos/cfg/cfg_hashtable.h new file mode 100644 index 0000000..e4645f3 --- /dev/null +++ b/bertos/cfg/cfg_hashtable.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for hashtable module. + * + * \author Daniele Basile + */ + +#ifndef CFG_HASHTABLE_H +#define CFG_HASHTABLE_H + +/** + * Enable/disable support to declare special hash tables which maintain a copy of the key internally instead of relying on the hook to extract it from the data. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_HT_OPTIONAL_INTERNAL_KEY 1 + +#endif /* CFG_HASHTABLE_H */ + + + diff --git a/bertos/cfg/cfg_heap.h b/bertos/cfg/cfg_heap.h new file mode 100644 index 0000000..e1a37b7 --- /dev/null +++ b/bertos/cfg/cfg_heap.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Configuration file for heap module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_HEAP_H +#define CFG_HEAP_H + +/** + * Enable malloc/free like API. + * $WIZ$ type = "boolean" + */ +#define CONFIG_HEAP_MALLOC 1 + +#endif /* CFG_HEAP_H */ + + diff --git a/bertos/cfg/cfg_i2c.h b/bertos/cfg/cfg_i2c.h new file mode 100644 index 0000000..ea599a8 --- /dev/null +++ b/bertos/cfg/cfg_i2c.h @@ -0,0 +1,83 @@ +/** + * \file + * + * + * \brief Configuration file for I2C module. + * + * \author Daniele Basile + */ + +#ifndef CFG_I2C_H +#define CFG_I2C_H + +/** +*Comunication frequency. +* +* $WIZ$ type = "int" +*/ +#define CONFIG_I2C_FREQ 100000UL + +/** + * I2C start timeout. + * For how many milliseconds the i2c_start + * should try to get an ACK before + * returning error. + * + * $WIZ$ type = "int" + */ +#define CONFIG_I2C_START_TIMEOUT 100 + +/** + * Check this to disable I2c deprecated API support. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_I2C_DISABLE_OLD_API 0 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2C_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2C_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2C_H */ + + diff --git a/bertos/cfg/cfg_i2s.h b/bertos/cfg/cfg_i2s.h new file mode 100644 index 0000000..6657157 --- /dev/null +++ b/bertos/cfg/cfg_i2s.h @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief Configuration file for I2S module. + * + * + * \author Luca Ottaviano + */ + +#ifndef CFG_I2S_H +#define CFG_I2S_H + +/** + * Length of each play buffer. + * + * $WIZ$ type = "int" + */ +#define CONFIG_PLAY_BUF_LEN 8192 + +/** + * Sampling frequency of the audio file. + * + * $WIZ$ type = "int" + * $WIZ$ min = 32000 + * $WIZ$ max = 192000 + */ +#define CONFIG_SAMPLE_FREQ 44100UL + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define I2S_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define I2S_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_I2S_H */ diff --git a/bertos/cfg/cfg_ini_reader.h b/bertos/cfg/cfg_ini_reader.h new file mode 100644 index 0000000..d0be438 --- /dev/null +++ b/bertos/cfg/cfg_ini_reader.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Configuration file for ini reader module. + * + * + * \author Luca Ottaviano + */ + +#ifndef CFG_INI_READER_H +#define CFG_INI_READER_H + +/** + * Maximum ini file line length (chars). + * $WIZ$ type = "int"; min = 1 + */ +#define CONFIG_INI_MAX_LINE_LEN 64 + +#endif /* CFG_INI_READER_H */ diff --git a/bertos/cfg/cfg_kbd.h b/bertos/cfg/cfg_kbd.h new file mode 100644 index 0000000..92aa272 --- /dev/null +++ b/bertos/cfg/cfg_kbd.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Configuration file for keyboard module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_KBD_H +#define CFG_KBD_H + +/// Keyboard polling method. $WIZ$ supports = "False" +#define CONFIG_KBD_POLL KBD_POLL_SOFTINT + +/// Enable keyboard event delivery to observers. $WIZ$ type = "boolean" +#define CONFIG_KBD_OBSERVER 0 + +/// Enable key beeps. $WIZ$ type = "boolean" +#define CONFIG_KBD_BEEP 0 + +/// Enable long pression handler for keys. $WIZ$ type = "boolean" +#define CONFIG_KBD_LONGPRESS 0 + +/// Enable calling poor man's scheduler to be called inside kbd_peek. $WIZ$ type = "boolean" +#define CONFIG_KBD_SCHED 0 + +#endif /* CFG_KBD_H */ + diff --git a/bertos/cfg/cfg_kern.h b/bertos/cfg/cfg_kern.h new file mode 100644 index 0000000..1330abc --- /dev/null +++ b/bertos/cfg/cfg_kern.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters (deprecated) + * + * \author Bernie Innocenti + */ + +#ifndef CFG_KERN_H +#define CFG_KERN_H + +#warning This file is deprecated, you should use the correct combination of cfg_proc.h, cfg_sem.h, cfg_signal.h and cfg_monitor.h +#include "cfg_proc.h" +#include "cfg_sem.h" +#include "cfg_signal.h" +#include "cfg_monitor.h" + + +/** + * Left for backwards compatibility. + * Do not use this anymore, will be deprecated soon. + */ +#define CONFIG_KERN_SCHED CONFIG_KERN + +#endif /* CFG_KERN_H */ diff --git a/bertos/cfg/cfg_keytag.h b/bertos/cfg/cfg_keytag.h new file mode 100644 index 0000000..8bedadf --- /dev/null +++ b/bertos/cfg/cfg_keytag.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for keytag module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KEYTAG_H +#define CFG_KEYTAG_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_KEYTAG_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_KEYTAG_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max buffer lenght + * $WIZ$ type = "int" + */ +#define CONFIG_TAG_MAX_LEN 14U + +#endif /* CFG_KEYTAG_H */ + diff --git a/bertos/cfg/cfg_kfile.h b/bertos/cfg/cfg_kfile.h new file mode 100644 index 0000000..0ebed7b --- /dev/null +++ b/bertos/cfg/cfg_kfile.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Configuration file for KFile interface module. + * + * \author Daniele Basile + */ + +#ifndef CFG_KFILE_H +#define CFG_KFILE_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KFILE_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KFILE_LOG_FORMAT LOG_FMT_TERSE + +/** + * Enable the gets function with echo. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KFILE_GETS 0 + +#endif /* CFG_KFILE_H */ diff --git a/bertos/cfg/cfg_lcd_32122a.h b/bertos/cfg/cfg_lcd_32122a.h new file mode 100644 index 0000000..5a9b3ca --- /dev/null +++ b/bertos/cfg/cfg_lcd_32122a.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver configuration file. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ +#ifndef CFG_LCD_32122A_H +#define CFG_LCD_32122A_H + +/** + * Enable soft interrupt to refresh the LCD. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_SOFTINT_REFRESH 0 + +/** + * Enable wait macro when display is busy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_WAIT 0 + +/** + * Display refresh time 32122a. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_LCD_REFRESH 100 + +#endif /* CFG_LCD_32122A_H */ + diff --git a/bertos/cfg/cfg_lcd_hd44.h b/bertos/cfg/cfg_lcd_hd44.h new file mode 100644 index 0000000..7bea437 --- /dev/null +++ b/bertos/cfg/cfg_lcd_hd44.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief Configuration file for lcd display module. + * + * \author Daniele Basile + */ + +#ifndef CFG_LCD_H +#define CFG_LCD_H + +/** + * Use 4 bit addressing mode. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_4BIT 0 + +/** + * Use a table to speed up LCD memory addressing. + * This will use about 100 bytes of RAM. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LCD_ADDRESS_FAST 1 + +/** + * Number of columns in LCD display. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "lcd_hd44_cols" + */ +#define CONFIG_LCD_COLS LCD_HD44_COLS_16 + +/** + * Number of rows in LCD display. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "lcd_hd44_rows" + */ +#define CONFIG_LCD_ROWS LCD_HD44_ROWS_2 + +#endif /* CFG_LCD_H */ + diff --git a/bertos/cfg/cfg_led_7seg.h b/bertos/cfg/cfg_led_7seg.h new file mode 100644 index 0000000..d854b11 --- /dev/null +++ b/bertos/cfg/cfg_led_7seg.h @@ -0,0 +1,80 @@ +/** + * \file cfg_led_7seg.h + * + * + * \brief Configuration file for led 7 segment display. + * + * \author Fabio Bizzi + * + * \addtogroup SevenSegDisplay 7 Segments LED Displays Driver + * \{ + * + */ + +#ifndef CFG_LED_7SEG_H +#define CFG_LED_7SEG_H + +/** + * Use a Common Cathode display. + * $WIZ$ type = "boolean" + */ +#define CONFIG_LED_7SEG_CCAT 0 + +/** + * Number of digit present in the LED display. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + * $WIZ$ max = 8 + */ +#define CONFIG_LED_7SEG_DIGIT 4 + +/** + * Max lenght of the string to be displayed. + * $WIZ$ type = "int" + * $WIZ$ min = 16 + * $WIZ$ max = 255 + */ +#define CONFIG_LED_7SEG_STRLEN 255 + +/** + * Default scrolling speed (ms * CONFIG_LED_7SEG_RTIME). + * $WIZ$ type = "int" + */ +#define CONFIG_LED_7SEG_SSPEED 10 + +/** + * Default refresh time (ms). + * $WIZ$ type = "int" + */ +#define CONFIG_LED_7SEG_RTIME 5 + +#endif /* CFG_LED_7SEG_H */ + /** \} */ //defgroup drivers + diff --git a/bertos/cfg/cfg_lm75.h b/bertos/cfg/cfg_lm75.h new file mode 100644 index 0000000..91b347a --- /dev/null +++ b/bertos/cfg/cfg_lm75.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Configuration file for the LM75 sensor temperature. + * + * \author Daniele Basile + */ + +#ifndef CFG_LM75_H +#define CFG_LM75_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define LM75_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define LM75_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_AX25_H */ diff --git a/bertos/cfg/cfg_lwip.h b/bertos/cfg/cfg_lwip.h new file mode 100644 index 0000000..73acb91 --- /dev/null +++ b/bertos/cfg/cfg_lwip.h @@ -0,0 +1,1863 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the lwIP TCP/IP stack module + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef CFG_LWIP_H +#define CFG_LWIP_H + +/* + ----------------------------------------------- + ---------- Platform specific locking ---------- + ----------------------------------------------- +*/ + +/** + * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain + * critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#ifndef SYS_LIGHTWEIGHT_PROT +#define SYS_LIGHTWEIGHT_PROT 1 +#endif + +/** + * NO_SYS==1: Provides VERY minimal functionality. Otherwise, + * use lwIP facilities. + */ +#ifndef NO_SYS +#define NO_SYS 0 +#endif + +/** + * MEMCPY: override this if you have a faster implementation at hand than the + * one included in your C library + */ +#ifndef MEMCPY +#define MEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/** + * SMEMCPY: override this with care! Some compilers (e.g. gcc) can inline a + * call to memcpy() if the length is known at compile time and is small. + */ +#ifndef SMEMCPY +#define SMEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/* + ------------------------------------ + ---------- Memory options ---------- + ------------------------------------ +*/ +/** + * MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library + * instead of the lwip internal allocator. Can save code size if you + * already use it. + */ +#ifndef MEM_LIBC_MALLOC +#define MEM_LIBC_MALLOC 0 +#endif + +/** + * Use mem_malloc/mem_free instead of the lwip pool allocator. + * + * $WIZ$ type = "boolean" + */ +#ifndef MEMP_MEM_MALLOC +#define MEMP_MEM_MALLOC 0 +#endif + +/** + * MEM_ALIGNMENT: should be set to the alignment of the CPU + * \verbatim + * 4 byte alignment -> #define MEM_ALIGNMENT 4 + * 2 byte alignment -> #define MEM_ALIGNMENT 2 + * \endverbatim + */ +#ifndef MEM_ALIGNMENT +#define MEM_ALIGNMENT 4 +#endif + +/** + * The size of the lwIP heap memory. + * + * If the application will send a lot of data that needs to be copied, this + * should be set high. + * + * $WIZ$ type = "int"; min = 1600 + */ +#define MEM_SIZE 1600 + +/** + * Dynamic pool memory overflow protection check level. + * + * MEMP_OVERFLOW_CHECK == 0 no checking + * MEMP_OVERFLOW_CHECK == 1 checks each element when it is freed + * MEMP_OVERFLOW_CHECK >= 2 checks each element in every pool every time + * memp_malloc() or memp_free() is called (useful but slow!) + * + * $WIZ$ type = "int"; min = "0"; max = "2" + */ +#define MEMP_OVERFLOW_CHECK 0 + +/** + * Run a sanity check after each memp_free(). + * + * $WIZ$ type = "boolean" + */ +#define MEMP_SANITY_CHECK 0 + +/** + * MEM_USE_POOLS==1: Use an alternative to malloc() by allocating from a set + * of memory pools of various sizes. When mem_malloc is called, an element of + * the smallest pool that can provide the length needed is returned. + * To use this, MEMP_USE_CUSTOM_POOLS also has to be enabled. + */ +#ifndef MEM_USE_POOLS +#define MEM_USE_POOLS 0 +#endif + +/** + * MEM_USE_POOLS_TRY_BIGGER_POOL==1: if one malloc-pool is empty, try the next + * bigger pool - WARNING: THIS MIGHT WASTE MEMORY but it can make a system more + * reliable. */ +#ifndef MEM_USE_POOLS_TRY_BIGGER_POOL +#define MEM_USE_POOLS_TRY_BIGGER_POOL 0 +#endif + +/** + * MEMP_USE_CUSTOM_POOLS==1: whether to include a user file lwippools.h + * that defines additional pools beyond the "standard" ones required + * by lwIP. If you set this to 1, you must have lwippools.h in your + * inlude path somewhere. + */ +#ifndef MEMP_USE_CUSTOM_POOLS +#define MEMP_USE_CUSTOM_POOLS 0 +#endif + +/** + * Set this to 1 if you want to free PBUF_RAM pbufs (or call mem_free()) from + * interrupt context (or another context that doesn't allow waiting for a + * semaphore). + * If set to 1, mem_malloc will be protected by a semaphore and SYS_ARCH_PROTECT, + * while mem_free will only use SYS_ARCH_PROTECT. mem_malloc SYS_ARCH_UNPROTECTs + * with each loop so that mem_free can run. + * + * ATTENTION: As you can see from the above description, this leads to dis-/ + * enabling interrupts often, which can be slow! Also, on low memory, mem_malloc + * can need longer. + * + * If you don't want that, at least for NO_SYS=0, you can still use the following + * functions to enqueue a deallocation call which then runs in the tcpip_thread + * context: + * - pbuf_free_callback(p); + * - mem_free_callback(m); + */ +#ifndef LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT +#define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0 +#endif + +/* + ------------------------------------------------ + ---------- Internal Memory Pool Sizes ---------- + ------------------------------------------------ +*/ +/** + * MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF). + * If the application sends a lot of data out of ROM (or other static memory), + * this should be set high. + */ +#ifndef MEMP_NUM_PBUF +#define MEMP_NUM_PBUF 16 +#endif + +/** + * MEMP_NUM_RAW_PCB: Number of raw connection PCBs + * (requires the LWIP_RAW option) + */ +#ifndef MEMP_NUM_RAW_PCB +#define MEMP_NUM_RAW_PCB 4 +#endif + +/** + * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One + * per active UDP "connection". + * (requires the LWIP_UDP option) + */ +#ifndef MEMP_NUM_UDP_PCB +#define MEMP_NUM_UDP_PCB 4 +#endif + +/** + * MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB +#define MEMP_NUM_TCP_PCB 5 +#endif + +/** + * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB_LISTEN +#define MEMP_NUM_TCP_PCB_LISTEN 8 +#endif + +/** + * MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_SEG +#define MEMP_NUM_TCP_SEG 16 +#endif + +/** + * MEMP_NUM_REASSDATA: the number of simultaneously IP packets queued for + * reassembly (whole packets, not fragments!) + */ +#ifndef MEMP_NUM_REASSDATA +#define MEMP_NUM_REASSDATA 5 +#endif + +/** + * MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing + * packets (pbufs) that are waiting for an ARP request (to resolve + * their destination address) to finish. + * (requires the ARP_QUEUEING option) + */ +#ifndef MEMP_NUM_ARP_QUEUE +#define MEMP_NUM_ARP_QUEUE 30 +#endif + +/** + * MEMP_NUM_IGMP_GROUP: The number of multicast groups whose network interfaces + * can be members et the same time (one per netif - allsystems group -, plus one + * per netif membership). + * (requires the LWIP_IGMP option) + */ +#ifndef MEMP_NUM_IGMP_GROUP +#define MEMP_NUM_IGMP_GROUP 8 +#endif + +/** + * MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts. + * (requires NO_SYS==0) + */ +#ifndef MEMP_NUM_SYS_TIMEOUT +#define MEMP_NUM_SYS_TIMEOUT 8 +#endif + +/** + * MEMP_NUM_NETBUF: the number of struct netbufs. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETBUF +#define MEMP_NUM_NETBUF 2 +#endif + +/** + * MEMP_NUM_NETCONN: the number of struct netconns. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETCONN +#define MEMP_NUM_NETCONN 4 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used + * for callback/timeout API communication. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_API +#define MEMP_NUM_TCPIP_MSG_API 8 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used + * for incoming packets. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_INPKT +#define MEMP_NUM_TCPIP_MSG_INPKT 8 +#endif + +/** + * PBUF_POOL_SIZE: the number of buffers in the pbuf pool. + */ +#ifndef PBUF_POOL_SIZE +#define PBUF_POOL_SIZE 16 +#endif + +/* + --------------------------------- + ---------- ARP options ---------- + --------------------------------- +*/ +/** + * LWIP_ARP==1: Enable ARP functionality. + */ +#ifndef LWIP_ARP +#define LWIP_ARP 1 +#endif + +/** + * ARP_TABLE_SIZE: Number of active MAC-IP address pairs cached. + */ +#ifndef ARP_TABLE_SIZE +#define ARP_TABLE_SIZE 10 +#endif + +/** + * ARP_QUEUEING==1: Outgoing packets are queued during hardware address + * resolution. + */ +#ifndef ARP_QUEUEING +#define ARP_QUEUEING 1 +#endif + +/** + * ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be + * updated with the source MAC and IP addresses supplied in the packet. + * You may want to disable this if you do not trust LAN peers to have the + * correct addresses, or as a limited approach to attempt to handle + * spoofing. If disabled, lwIP will need to make a new ARP request if + * the peer is not already in the ARP table, adding a little latency. + */ +#ifndef ETHARP_TRUST_IP_MAC +#define ETHARP_TRUST_IP_MAC 1 +#endif + +/** + * ETHARP_SUPPORT_VLAN==1: support receiving ethernet packets with VLAN header. + * Additionally, you can define ETHARP_VLAN_CHECK to an u16_t VLAN ID to check. + * If ETHARP_VLAN_CHECK is defined, only VLAN-traffic for this VLAN is accepted. + * If ETHARP_VLAN_CHECK is not defined, all traffic is accepted. + */ +#ifndef ETHARP_SUPPORT_VLAN +#define ETHARP_SUPPORT_VLAN 0 +#endif + +/* + -------------------------------- + ---------- IP options ---------- + -------------------------------- +*/ +/** + * IP_FORWARD==1: Enables the ability to forward IP packets across network + * interfaces. If you are going to run lwIP on a device with only one network + * interface, define this to 0. + */ +#ifndef IP_FORWARD +#define IP_FORWARD 0 +#endif + +/** + * IP_OPTIONS_ALLOWED: Defines the behavior for IP options. + * IP_OPTIONS_ALLOWED==0: All packets with IP options are dropped. + * IP_OPTIONS_ALLOWED==1: IP options are allowed (but not parsed). + */ +#ifndef IP_OPTIONS_ALLOWED +#define IP_OPTIONS_ALLOWED 1 +#endif + +/** + * Reassemble incoming fragmented IP packets. + * + * $WIZ$ type = "boolean" + */ +#define IP_REASSEMBLY 1 + +/** + * Fragment outgoing IP packets if their size exceeds MTU. + * + * $WIZ$ type = "boolean" + */ +#define IP_FRAG 1 + +/** + * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) + * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived + * in this time, the whole packet is discarded. + */ +#ifndef IP_REASS_MAXAGE +#define IP_REASS_MAXAGE 3 +#endif + +/** + * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled. + * Since the received pbufs are enqueued, be sure to configure + * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive + * packets even if the maximum amount of fragments is enqueued for reassembly! + */ +#ifndef IP_REASS_MAX_PBUFS +#define IP_REASS_MAX_PBUFS 10 +#endif + +/** + * IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP + * fragmentation. Otherwise pbufs are allocated and reference the original + * packet data to be fragmented. + */ +#ifndef IP_FRAG_USES_STATIC_BUF +#define IP_FRAG_USES_STATIC_BUF 1 +#endif + +/** + * IP_FRAG_MAX_MTU: Assumed max MTU on any interface for IP frag buffer + * (requires IP_FRAG_USES_STATIC_BUF==1) + */ +#if IP_FRAG_USES_STATIC_BUF && !defined(IP_FRAG_MAX_MTU) +#define IP_FRAG_MAX_MTU 1500 +#endif + +/** + * IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers. + */ +#ifndef IP_DEFAULT_TTL +#define IP_DEFAULT_TTL 255 +#endif + +/** + * IP_SOF_BROADCAST=1: Use the SOF_BROADCAST field to enable broadcast + * filter per pcb on udp and raw send operations. To enable broadcast filter + * on recv operations, you also have to set IP_SOF_BROADCAST_RECV=1. + */ +#ifndef IP_SOF_BROADCAST +#define IP_SOF_BROADCAST 0 +#endif + +/** + * IP_SOF_BROADCAST_RECV (requires IP_SOF_BROADCAST=1) enable the broadcast + * filter on recv operations. + */ +#ifndef IP_SOF_BROADCAST_RECV +#define IP_SOF_BROADCAST_RECV 0 +#endif + +/* + ---------------------------------- + ---------- ICMP options ---------- + ---------------------------------- +*/ +/** + * Enable ICMP module inside the IP stack. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_ICMP 1 + +/** + * ICMP_TTL: Default value for Time-To-Live used by ICMP packets. + */ +#ifndef ICMP_TTL +#define ICMP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_BROADCAST_PING==1: respond to broadcast pings (default is unicast only) + */ +#ifndef LWIP_BROADCAST_PING +#define LWIP_BROADCAST_PING 0 +#endif + +/** + * LWIP_MULTICAST_PING==1: respond to multicast pings (default is unicast only) + */ +#ifndef LWIP_MULTICAST_PING +#define LWIP_MULTICAST_PING 0 +#endif + +/* + --------------------------------- + ---------- RAW options ---------- + --------------------------------- +*/ +/** + * Enable application layer to hook into the IP layer itself. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_RAW 1 + +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef RAW_TTL +#define RAW_TTL (IP_DEFAULT_TTL) +#endif + +/* + ---------------------------------- + ---------- DHCP options ---------- + ---------------------------------- +*/ +/** + * Enable DHCP module. UDP must be also available. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_DHCP 1 + +/** + * DHCP_DOES_ARP_CHECK==1: Do an ARP check on the offered address. + */ +#ifndef DHCP_DOES_ARP_CHECK +#define DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP)) +#endif + +/* + ------------------------------------ + ---------- AUTOIP options ---------- + ------------------------------------ +*/ +/** + * LWIP_AUTOIP==1: Enable AUTOIP module. + */ +#ifndef LWIP_AUTOIP +#define LWIP_AUTOIP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on + * the same interface at the same time. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP +#define LWIP_DHCP_AUTOIP_COOP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes + * that should be sent before falling back on AUTOIP. This can be set + * as low as 1 to get an AutoIP address very quickly, but you should + * be prepared to handle a changing IP address when DHCP overrides + * AutoIP. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP_TRIES +#define LWIP_DHCP_AUTOIP_COOP_TRIES 9 +#endif + +/* + ---------------------------------- + ---------- SNMP options ---------- + ---------------------------------- +*/ +/** + * Turn on SNMP module. UDP must be also available. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_SNMP 0 + +/** + * SNMP_CONCURRENT_REQUESTS: Number of concurrent requests the module will + * allow. At least one request buffer is required. + */ +#ifndef SNMP_CONCURRENT_REQUESTS +#define SNMP_CONCURRENT_REQUESTS 1 +#endif + +/** + * SNMP_TRAP_DESTINATIONS: Number of trap destinations. At least one trap + * destination is required + */ +#ifndef SNMP_TRAP_DESTINATIONS +#define SNMP_TRAP_DESTINATIONS 1 +#endif + +/** + * SNMP_PRIVATE_MIB: + */ +#ifndef SNMP_PRIVATE_MIB +#define SNMP_PRIVATE_MIB 0 +#endif + +/** + * Only allow SNMP write actions that are 'safe' (e.g. disabeling netifs is not + * a safe action and disabled when SNMP_SAFE_REQUESTS = 1). + * Unsafe requests are disabled by default! + */ +#ifndef SNMP_SAFE_REQUESTS +#define SNMP_SAFE_REQUESTS 1 +#endif + +/* + ---------------------------------- + ---------- IGMP options ---------- + ---------------------------------- +*/ +/** + * Turn on IGMP module. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_IGMP 0 + +/* + ---------------------------------- + ---------- DNS options ----------- + ---------------------------------- +*/ +/** + * Turn on DNS module. UDP must be available for DNS transport. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_DNS 0 + +/** DNS maximum number of entries to maintain locally. */ +#ifndef DNS_TABLE_SIZE +#define DNS_TABLE_SIZE 4 +#endif + +/** DNS maximum host name length supported in the name table. */ +#ifndef DNS_MAX_NAME_LENGTH +#define DNS_MAX_NAME_LENGTH 256 +#endif + +/** The maximum of DNS servers */ +#ifndef DNS_MAX_SERVERS +#define DNS_MAX_SERVERS 2 +#endif + +/** DNS do a name checking between the query and the response. */ +#ifndef DNS_DOES_NAME_CHECK +#define DNS_DOES_NAME_CHECK 1 +#endif + +/** DNS use a local buffer if DNS_USES_STATIC_BUF=0, a static one if + DNS_USES_STATIC_BUF=1, or a dynamic one if DNS_USES_STATIC_BUF=2. + The buffer will be of size DNS_MSG_SIZE */ +#ifndef DNS_USES_STATIC_BUF +#define DNS_USES_STATIC_BUF 1 +#endif + +/** DNS message max. size. Default value is RFC compliant. */ +#ifndef DNS_MSG_SIZE +#define DNS_MSG_SIZE 512 +#endif + +/** DNS_LOCAL_HOSTLIST: Implements a local host-to-address list. If enabled, + * you have to define + * \code + * #define DNS_LOCAL_HOSTLIST_INIT {{"host1", 0x123}, {"host2", 0x234}} + * \endcode + * (an array of structs name/address, where address is an u32_t in network + * byte order). + * + * Instead, you can also use an external function: + * \code + * #define DNS_LOOKUP_LOCAL_EXTERN(x) extern u32_t my_lookup_function(const char *name) + * \endcode + * that returns the IP address or INADDR_NONE if not found. + */ +#ifndef DNS_LOCAL_HOSTLIST +#define DNS_LOCAL_HOSTLIST 0 +#endif /* DNS_LOCAL_HOSTLIST */ + +/** If this is turned on, the local host-list can be dynamically changed + * at runtime. */ +#ifndef DNS_LOCAL_HOSTLIST_IS_DYNAMIC +#define DNS_LOCAL_HOSTLIST_IS_DYNAMIC 0 +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +/* + --------------------------------- + ---------- UDP options ---------- + --------------------------------- +*/ +/** + * Turn on UDP. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_UDP 1 + +/** + * LWIP_UDPLITE==1: Turn on UDP-Lite. (Requires LWIP_UDP) + */ +#ifndef LWIP_UDPLITE +#define LWIP_UDPLITE 0 +#endif + +/** + * UDP_TTL: Default Time-To-Live value. + */ +#ifndef UDP_TTL +#define UDP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_NETBUF_RECVINFO==1: append destination addr and port to every netbuf. + */ +#ifndef LWIP_NETBUF_RECVINFO +#define LWIP_NETBUF_RECVINFO 0 +#endif + +/* + --------------------------------- + ---------- TCP options ---------- + --------------------------------- +*/ +/** + * Turn on TCP. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_TCP 1 + +/** + * TCP_TTL: Default Time-To-Live value. + */ +#ifndef TCP_TTL +#define TCP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * TCP_WND: The size of a TCP window. This must be at least + * (2 * TCP_MSS) for things to work well + */ +#ifndef TCP_WND +#define TCP_WND (4 * TCP_MSS) +#endif + +/** + * TCP_MAXRTX: Maximum number of retransmissions of data segments. + */ +#ifndef TCP_MAXRTX +#define TCP_MAXRTX 12 +#endif + +/** + * TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments. + */ +#ifndef TCP_SYNMAXRTX +#define TCP_SYNMAXRTX 6 +#endif + +/** + * TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order. + * Define to 0 if your device is low on memory. + */ +#ifndef TCP_QUEUE_OOSEQ +#define TCP_QUEUE_OOSEQ (LWIP_TCP) +#endif + +/** + * TCP_MSS: TCP Maximum segment size. (default is 536, a conservative default, + * you might want to increase this.) + * For the receive side, this MSS is advertised to the remote side + * when opening a connection. For the transmit size, this MSS sets + * an upper limit on the MSS advertised by the remote host. + */ +#ifndef TCP_MSS +#define TCP_MSS 536 +#endif + +/** + * TCP_CALCULATE_EFF_SEND_MSS: "The maximum size of a segment that TCP really + * sends, the 'effective send MSS,' MUST be the smaller of the send MSS (which + * reflects the available reassembly buffer size at the remote host) and the + * largest size permitted by the IP layer" (RFC 1122) + * Setting this to 1 enables code that checks TCP_MSS against the MTU of the + * netif used for a connection and limits the MSS if it would be too big otherwise. + */ +#ifndef TCP_CALCULATE_EFF_SEND_MSS +#define TCP_CALCULATE_EFF_SEND_MSS 1 +#endif + + +/** + * TCP_SND_BUF: TCP sender buffer space (bytes). + */ +#ifndef TCP_SND_BUF +#define TCP_SND_BUF (2 * TCP_MSS) +#endif + +/** + * TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least + * as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. + */ +#ifndef TCP_SND_QUEUELEN +#define TCP_SND_QUEUELEN (4 * (TCP_SND_BUF)/(TCP_MSS)) +#endif + +/** + * TCP_SNDLOWAT: TCP writable space (bytes). This must be less than or equal + * to TCP_SND_BUF. It is the amount of space which must be available in the + * TCP snd_buf for select to return writable. + */ +#ifndef TCP_SNDLOWAT +#define TCP_SNDLOWAT ((TCP_SND_BUF)/2) +#endif + +/** + * TCP_LISTEN_BACKLOG: Enable the backlog option for tcp listen pcb. + */ +#ifndef TCP_LISTEN_BACKLOG +#define TCP_LISTEN_BACKLOG 0 +#endif + +/** + * The maximum allowed backlog for TCP listen netconns. + * This backlog is used unless another is explicitly specified. + * 0xff is the maximum (u8_t). + */ +#ifndef TCP_DEFAULT_LISTEN_BACKLOG +#define TCP_DEFAULT_LISTEN_BACKLOG 0xff +#endif + +/** + * LWIP_TCP_TIMESTAMPS==1: support the TCP timestamp option. + */ +#ifndef LWIP_TCP_TIMESTAMPS +#define LWIP_TCP_TIMESTAMPS 0 +#endif + +/** + * TCP_WND_UPDATE_THRESHOLD: difference in window to trigger an + * explicit window update + */ +#ifndef TCP_WND_UPDATE_THRESHOLD +#define TCP_WND_UPDATE_THRESHOLD (TCP_WND / 4) +#endif + +/* + ---------------------------------- + ---------- Pbuf options ---------- + ---------------------------------- +*/ +/** + * PBUF_LINK_HLEN: the number of bytes that should be allocated for a + * link level header. The default is 14, the standard value for + * Ethernet. + */ +#ifndef PBUF_LINK_HLEN +#define PBUF_LINK_HLEN 14 +#endif + +/** + * PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. The default is + * designed to accomodate single full size TCP frame in one pbuf, including + * TCP_MSS, IP header, and link header. + */ +#ifndef PBUF_POOL_BUFSIZE +#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN) +#endif + +/* + ------------------------------------------------ + ---------- Network Interfaces options ---------- + ------------------------------------------------ +*/ +/** + * Use DHCP_OPTION_HOSTNAME with netif's hostname field. + * + * $WIZ$ type = "boolean" + */ +#define LWIP_NETIF_HOSTNAME 1 + +/** + * Support netif api (in netifapi.c) + * + * $WIZ$ type = "boolean" + */ +#define LWIP_NETIF_API 0 + +/** + * LWIP_NETIF_STATUS_CALLBACK==1: Support a callback function whenever an interface + * changes its up/down status (i.e., due to DHCP IP acquistion) + */ +#ifndef LWIP_NETIF_STATUS_CALLBACK +#define LWIP_NETIF_STATUS_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface + * whenever the link changes (i.e., link down) + */ +#ifndef LWIP_NETIF_LINK_CALLBACK +#define LWIP_NETIF_LINK_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_HWADDRHINT==1: Cache link-layer-address hints (e.g. table + * indices) in struct netif. TCP and UDP can make use of this to prevent + * scanning the ARP table for every sent packet. While this is faster for big + * ARP tables or many concurrent connections, it might be counterproductive + * if you have a tiny ARP table or if there never are concurrent connections. + */ +#ifndef LWIP_NETIF_HWADDRHINT +#define LWIP_NETIF_HWADDRHINT 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP + * address equal to the netif IP address, looping them back up the stack. + */ +#ifndef LWIP_NETIF_LOOPBACK +#define LWIP_NETIF_LOOPBACK 0 +#endif + +/** + * LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback + * sending for each netif (0 = disabled) + */ +#ifndef LWIP_LOOPBACK_MAX_PBUFS +#define LWIP_LOOPBACK_MAX_PBUFS 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK_MULTITHREADING: Indicates whether threading is enabled in + * the system, as netifs must change how they behave depending on this setting + * for the LWIP_NETIF_LOOPBACK option to work. + * Setting this is needed to avoid reentering non-reentrant functions like + * tcp_input(). + * LWIP_NETIF_LOOPBACK_MULTITHREADING==1: Indicates that the user is using a + * multithreaded environment like tcpip.c. In this case, netif->input() + * is called directly. + * LWIP_NETIF_LOOPBACK_MULTITHREADING==0: Indicates a polling (or NO_SYS) setup. + * The packets are put on a list and netif_poll() must be called in + * the main application loop. + */ +#ifndef LWIP_NETIF_LOOPBACK_MULTITHREADING +#define LWIP_NETIF_LOOPBACK_MULTITHREADING (!NO_SYS) +#endif + +/** + * LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP tries to put all data + * to be sent into one single pbuf. This is for compatibility with DMA-enabled + * MACs that do not support scatter-gather. + * Beware that this might involve CPU-memcpy before transmitting that would not + * be needed without this flag! Use this only if you need to! + * + * @todo: TCP and IP-frag do not work with this, yet: + */ +#ifndef LWIP_NETIF_TX_SINGLE_PBUF +#define LWIP_NETIF_TX_SINGLE_PBUF 0 +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + +/* + ------------------------------------ + ---------- LOOPIF options ---------- + ------------------------------------ +*/ +/** + * Support loop interface (127.0.0.1) and loopif.c + * + * $WIZ$ type = "boolean" + */ +#define LWIP_HAVE_LOOPIF 0 + +/* + ------------------------------------ + ---------- SLIPIF options ---------- + ------------------------------------ +*/ +/** + * Support slip interface and slipif.c + * + * $WIZ$ type = "boolean" + */ +#define LWIP_HAVE_SLIPIF 0 + +/* + ------------------------------------ + ---------- Thread options ---------- + ------------------------------------ +*/ +/** + * TCPIP_THREAD_NAME: The name assigned to the main tcpip thread. + */ +#ifndef TCPIP_THREAD_NAME +#define TCPIP_THREAD_NAME "tcpip_thread" +#endif + +/** + * TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_STACKSIZE +#define TCPIP_THREAD_STACKSIZE (KERN_MINSTACKSIZE * 3) +#endif + +/** + * TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_PRIO +#define TCPIP_THREAD_PRIO 0 +#endif + +/** + * TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when tcpip_init is called. + */ +#ifndef TCPIP_MBOX_SIZE +#define TCPIP_MBOX_SIZE 0 +#endif + +/** + * SLIPIF_THREAD_NAME: The name assigned to the slipif_loop thread. + */ +#ifndef SLIPIF_THREAD_NAME +#define SLIPIF_THREAD_NAME "slipif_loop" +#endif + +/** + * SLIP_THREAD_STACKSIZE: The stack size used by the slipif_loop thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_STACKSIZE +#define SLIPIF_THREAD_STACKSIZE 0 +#endif + +/** + * SLIPIF_THREAD_PRIO: The priority assigned to the slipif_loop thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_PRIO +#define SLIPIF_THREAD_PRIO 1 +#endif + +/** + * PPP_THREAD_NAME: The name assigned to the pppMain thread. + */ +#ifndef PPP_THREAD_NAME +#define PPP_THREAD_NAME "pppMain" +#endif + +/** + * PPP_THREAD_STACKSIZE: The stack size used by the pppMain thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_STACKSIZE +#define PPP_THREAD_STACKSIZE 0 +#endif + +/** + * PPP_THREAD_PRIO: The priority assigned to the pppMain thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_PRIO +#define PPP_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_THREAD_NAME: The name assigned to any other lwIP thread. + */ +#ifndef DEFAULT_THREAD_NAME +#define DEFAULT_THREAD_NAME "lwIP" +#endif + +/** + * DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_STACKSIZE +#define DEFAULT_THREAD_STACKSIZE (KERN_MINSTACKSIZE * 3) +#endif + +/** + * DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_PRIO +#define DEFAULT_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_RAW. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_RAW_RECVMBOX_SIZE +#define DEFAULT_RAW_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_UDP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_UDP_RECVMBOX_SIZE +#define DEFAULT_UDP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_TCP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_TCP_RECVMBOX_SIZE +#define DEFAULT_TCP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections. + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when the acceptmbox is created. + */ +#ifndef DEFAULT_ACCEPTMBOX_SIZE +#define DEFAULT_ACCEPTMBOX_SIZE 0 +#endif + +/* + ---------------------------------------------- + ---------- Sequential layer options ---------- + ---------------------------------------------- +*/ +/** + * LWIP_TCPIP_CORE_LOCKING: (EXPERIMENTAL!) + * Don't use it if you're not an active lwIP project member + */ +#ifndef LWIP_TCPIP_CORE_LOCKING +#define LWIP_TCPIP_CORE_LOCKING 0 +#endif + +/** + * Enable Netconn API (require to use api_lib.c) + * + * $WIZ$ type = "boolean" + */ +#define LWIP_NETCONN 1 + +/* + ------------------------------------ + ---------- Socket options ---------- + ------------------------------------ +*/ +/** + * Enable Socket API (require to use sockets.c) + * + * $WIZ$ type = "boolean" + */ +#define LWIP_SOCKET 1 +#if LWIP_SOCKET + /* + * The sockets.c file requires this macro to be defined to really + * set errno on errors. + */ + #define ERRNO +#endif + +/** + * Enable BSD-style sockets functions names. + * + * NOTE: do not change this!!! + */ +#ifndef LWIP_COMPAT_SOCKETS +#define LWIP_COMPAT_SOCKETS 0 +#endif + +/** + * LWIP_POSIX_SOCKETS_IO_NAMES==1: Enable POSIX-style sockets functions names. + * Disable this option if you use a POSIX operating system that uses the same + * names (read, write & close). (only used if you use sockets.c) + */ +#ifndef LWIP_POSIX_SOCKETS_IO_NAMES +#define LWIP_POSIX_SOCKETS_IO_NAMES 0 +#endif + +/** + * LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT + * options processing. Note that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set + * in seconds. (does not require sockets.c, and will affect tcp.c) + */ +#ifndef LWIP_TCP_KEEPALIVE +#define LWIP_TCP_KEEPALIVE 0 +#endif + +/** + * LWIP_SO_RCVTIMEO==1: Enable SO_RCVTIMEO processing. + */ +#ifndef LWIP_SO_RCVTIMEO +#define LWIP_SO_RCVTIMEO 0 +#endif + +/** + * LWIP_SO_RCVBUF==1: Enable SO_RCVBUF processing. + */ +#ifndef LWIP_SO_RCVBUF +#define LWIP_SO_RCVBUF 0 +#endif + +/** + * If LWIP_SO_RCVBUF is used, this is the default value for recv_bufsize. + */ +#ifndef RECV_BUFSIZE_DEFAULT +#define RECV_BUFSIZE_DEFAULT INT_MAX +#endif + +/** + * SO_REUSE==1: Enable SO_REUSEADDR and SO_REUSEPORT options. DO NOT USE! + */ +#ifndef SO_REUSE +#define SO_REUSE 0 +#endif + +/* + ---------------------------------------- + ---------- Statistics options ---------- + ---------------------------------------- +*/ +/** + * LWIP_STATS==1: Enable statistics collection in lwip_stats. + */ +#ifndef LWIP_STATS +#define LWIP_STATS 0 +#endif + +#if LWIP_STATS + +/** + * LWIP_STATS_DISPLAY==1: Compile in the statistics output functions. + */ +#ifndef LWIP_STATS_DISPLAY +#define LWIP_STATS_DISPLAY 0 +#endif + +/** + * LINK_STATS==1: Enable link stats. + */ +#ifndef LINK_STATS +#define LINK_STATS 1 +#endif + +/** + * ETHARP_STATS==1: Enable etharp stats. + */ +#ifndef ETHARP_STATS +#define ETHARP_STATS (LWIP_ARP) +#endif + +/** + * IP_STATS==1: Enable IP stats. + */ +#ifndef IP_STATS +#define IP_STATS 1 +#endif + +/** + * IPFRAG_STATS==1: Enable IP fragmentation stats. Default is + * on if using either frag or reass. + */ +#ifndef IPFRAG_STATS +#define IPFRAG_STATS (IP_REASSEMBLY || IP_FRAG) +#endif + +/** + * ICMP_STATS==1: Enable ICMP stats. + */ +#ifndef ICMP_STATS +#define ICMP_STATS 1 +#endif + +/** + * IGMP_STATS==1: Enable IGMP stats. + */ +#ifndef IGMP_STATS +#define IGMP_STATS (LWIP_IGMP) +#endif + +/** + * UDP_STATS==1: Enable UDP stats. Default is on if + * UDP enabled, otherwise off. + */ +#ifndef UDP_STATS +#define UDP_STATS (LWIP_UDP) +#endif + +/** + * TCP_STATS==1: Enable TCP stats. Default is on if TCP + * enabled, otherwise off. + */ +#ifndef TCP_STATS +#define TCP_STATS (LWIP_TCP) +#endif + +/** + * MEM_STATS==1: Enable mem.c stats. + */ +#ifndef MEM_STATS +#define MEM_STATS ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0)) +#endif + +/** + * MEMP_STATS==1: Enable memp.c pool stats. + */ +#ifndef MEMP_STATS +#define MEMP_STATS (MEMP_MEM_MALLOC == 0) +#endif + +/** + * SYS_STATS==1: Enable system stats (sem and mbox counts, etc). + */ +#ifndef SYS_STATS +#define SYS_STATS (NO_SYS == 0) +#endif + +#else + +#define LINK_STATS 0 +#define ETHARP_STATS 0 +#define IP_STATS 0 +#define IPFRAG_STATS 0 +#define ICMP_STATS 0 +#define IGMP_STATS 0 +#define UDP_STATS 0 +#define TCP_STATS 0 +#define MEM_STATS 0 +#define MEMP_STATS 0 +#define SYS_STATS 0 +#define LWIP_STATS_DISPLAY 0 + +#endif /* LWIP_STATS */ + +/* + --------------------------------- + ---------- PPP options ---------- + --------------------------------- +*/ +/** + * Enable PPP. + * + * $WIZ$ type = "boolean" + */ +#define PPP_SUPPORT 0 + +/** + * Enable PPP Over Ethernet. + * + * $WIZ$ type = "boolean" + */ +#define PPPOE_SUPPORT 0 + +/** + * PPPOS_SUPPORT==1: Enable PPP Over Serial + */ +#ifndef PPPOS_SUPPORT +#define PPPOS_SUPPORT PPP_SUPPORT +#endif + +#if PPP_SUPPORT + +/** + * NUM_PPP: Max PPP sessions. + */ +#ifndef NUM_PPP +#define NUM_PPP 1 +#endif + +/** + * PAP_SUPPORT==1: Support PAP. + */ +#ifndef PAP_SUPPORT +#define PAP_SUPPORT 0 +#endif + +/** + * CHAP_SUPPORT==1: Support CHAP. + */ +#ifndef CHAP_SUPPORT +#define CHAP_SUPPORT 0 +#endif + +/** + * MSCHAP_SUPPORT==1: Support MSCHAP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef MSCHAP_SUPPORT +#define MSCHAP_SUPPORT 0 +#endif + +/** + * CBCP_SUPPORT==1: Support CBCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CBCP_SUPPORT +#define CBCP_SUPPORT 0 +#endif + +/** + * CCP_SUPPORT==1: Support CCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CCP_SUPPORT +#define CCP_SUPPORT 0 +#endif + +/** + * VJ_SUPPORT==1: Support VJ header compression. + */ +#ifndef VJ_SUPPORT +#define VJ_SUPPORT 0 +#endif + +/** + * MD5_SUPPORT==1: Support MD5 (see also CHAP). + */ +#ifndef MD5_SUPPORT +#define MD5_SUPPORT 0 +#endif + +/* + * Timeouts + */ +#ifndef FSM_DEFTIMEOUT +#define FSM_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef FSM_DEFMAXTERMREQS +#define FSM_DEFMAXTERMREQS 2 /* Maximum Terminate-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXCONFREQS +#define FSM_DEFMAXCONFREQS 10 /* Maximum Configure-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXNAKLOOPS +#define FSM_DEFMAXNAKLOOPS 5 /* Maximum number of nak loops */ +#endif + +#ifndef UPAP_DEFTIMEOUT +#define UPAP_DEFTIMEOUT 6 /* Timeout (seconds) for retransmitting req */ +#endif + +#ifndef UPAP_DEFREQTIME +#define UPAP_DEFREQTIME 30 /* Time to wait for auth-req from peer */ +#endif + +#ifndef CHAP_DEFTIMEOUT +#define CHAP_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef CHAP_DEFTRANSMITS +#define CHAP_DEFTRANSMITS 10 /* max # times to send challenge */ +#endif + +/* Interval in seconds between keepalive echo requests, 0 to disable. */ +#ifndef LCP_ECHOINTERVAL +#define LCP_ECHOINTERVAL 0 +#endif + +/* Number of unanswered echo requests before failure. */ +#ifndef LCP_MAXECHOFAILS +#define LCP_MAXECHOFAILS 3 +#endif + +/* Max Xmit idle time (in jiffies) before resend flag char. */ +#ifndef PPP_MAXIDLEFLAG +#define PPP_MAXIDLEFLAG 100 +#endif + +/* + * Packet sizes + * + * Note - lcp shouldn't be allowed to negotiate stuff outside these + * limits. See lcp.h in the pppd directory. + * (XXX - these constants should simply be shared by lcp.c instead + * of living in lcp.h) + */ +#define PPP_MTU 1500 /* Default MTU (size of Info field) */ +#ifndef PPP_MAXMTU +/* #define PPP_MAXMTU 65535 - (PPP_HDRLEN + PPP_FCSLEN) */ +#define PPP_MAXMTU 1500 /* Largest MTU we allow */ +#endif +#define PPP_MINMTU 64 +#define PPP_MRU 1500 /* default MRU = max length of info field */ +#define PPP_MAXMRU 1500 /* Largest MRU we allow */ +#ifndef PPP_DEFMRU +#define PPP_DEFMRU 296 /* Try for this */ +#endif +#define PPP_MINMRU 128 /* No MRUs below this */ + +#ifndef MAXNAMELEN +#define MAXNAMELEN 256 /* max length of hostname or name for auth */ +#endif +#ifndef MAXSECRETLEN +#define MAXSECRETLEN 256 /* max length of password or secret */ +#endif + +#endif /* PPP_SUPPORT */ + +/* + -------------------------------------- + ---------- Checksum options ---------- + -------------------------------------- +*/ +/** + * CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets. + */ +#ifndef CHECKSUM_GEN_IP +#define CHECKSUM_GEN_IP 1 +#endif + +/** + * CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets. + */ +#ifndef CHECKSUM_GEN_UDP +#define CHECKSUM_GEN_UDP 1 +#endif + +/** + * CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets. + */ +#ifndef CHECKSUM_GEN_TCP +#define CHECKSUM_GEN_TCP 1 +#endif + +/** + * CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets. + */ +#ifndef CHECKSUM_CHECK_IP +#define CHECKSUM_CHECK_IP 1 +#endif + +/** + * CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets. + */ +#ifndef CHECKSUM_CHECK_UDP +#define CHECKSUM_CHECK_UDP 1 +#endif + +/** + * CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets. + */ +#ifndef CHECKSUM_CHECK_TCP +#define CHECKSUM_CHECK_TCP 1 +#endif + +/* + --------------------------------------- + ---------- Debugging options ---------- + --------------------------------------- +*/ + +#ifdef _DEBUG +#define LWIP_DEBUG +#endif + +/** + * LWIP_DBG_MIN_LEVEL: After masking, the value of the debug is + * compared against this value. If it is smaller, then debugging + * messages are written. + */ +#ifndef LWIP_DBG_MIN_LEVEL +#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL +#endif + +/** + * LWIP_DBG_TYPES_ON: A mask that can be used to globally enable/disable + * debug messages of certain types. + */ +#ifndef LWIP_DBG_TYPES_ON +#define LWIP_DBG_TYPES_ON LWIP_DBG_ON +#endif + +/** + * ETHARP_DEBUG: Enable debugging in etharp.c. + */ +#ifndef ETHARP_DEBUG +#define ETHARP_DEBUG LWIP_DBG_OFF +#endif + +/** + * NETIF_DEBUG: Enable debugging in netif.c. + */ +#ifndef NETIF_DEBUG +#define NETIF_DEBUG LWIP_DBG_OFF +#endif + +/** + * PBUF_DEBUG: Enable debugging in pbuf.c. + */ +#ifndef PBUF_DEBUG +#define PBUF_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_LIB_DEBUG: Enable debugging in api_lib.c. + */ +#ifndef API_LIB_DEBUG +#define API_LIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_MSG_DEBUG: Enable debugging in api_msg.c. + */ +#ifndef API_MSG_DEBUG +#define API_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SOCKETS_DEBUG: Enable debugging in sockets.c. + */ +#ifndef SOCKETS_DEBUG +#define SOCKETS_DEBUG LWIP_DBG_OFF +#endif + +/** + * ICMP_DEBUG: Enable debugging in icmp.c. + */ +#ifndef ICMP_DEBUG +#define ICMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IGMP_DEBUG: Enable debugging in igmp.c. + */ +#ifndef IGMP_DEBUG +#define IGMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * INET_DEBUG: Enable debugging in inet.c. + */ +#ifndef INET_DEBUG +#define INET_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_DEBUG: Enable debugging for IP. + */ +#ifndef IP_DEBUG +#define IP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_REASS_DEBUG: Enable debugging in ip_frag.c for both frag & reass. + */ +#ifndef IP_REASS_DEBUG +#define IP_REASS_DEBUG LWIP_DBG_OFF +#endif + +/** + * RAW_DEBUG: Enable debugging in raw.c. + */ +#ifndef RAW_DEBUG +#define RAW_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEM_DEBUG: Enable debugging in mem.c. + */ +#ifndef MEM_DEBUG +#define MEM_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEMP_DEBUG: Enable debugging in memp.c. + */ +#ifndef MEMP_DEBUG +#define MEMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SYS_DEBUG: Enable debugging in sys.c. + */ +#ifndef SYS_DEBUG +#define SYS_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_DEBUG: Enable debugging for TCP. + */ +#ifndef TCP_DEBUG +#define TCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_INPUT_DEBUG: Enable debugging in tcp_in.c for incoming debug. + */ +#ifndef TCP_INPUT_DEBUG +#define TCP_INPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_FR_DEBUG: Enable debugging in tcp_in.c for fast retransmit. + */ +#ifndef TCP_FR_DEBUG +#define TCP_FR_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RTO_DEBUG: Enable debugging in TCP for retransmit + * timeout. + */ +#ifndef TCP_RTO_DEBUG +#define TCP_RTO_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_CWND_DEBUG: Enable debugging for TCP congestion window. + */ +#ifndef TCP_CWND_DEBUG +#define TCP_CWND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_WND_DEBUG: Enable debugging in tcp_in.c for window updating. + */ +#ifndef TCP_WND_DEBUG +#define TCP_WND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_OUTPUT_DEBUG: Enable debugging in tcp_out.c output functions. + */ +#ifndef TCP_OUTPUT_DEBUG +#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RST_DEBUG: Enable debugging for TCP with the RST message. + */ +#ifndef TCP_RST_DEBUG +#define TCP_RST_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_QLEN_DEBUG: Enable debugging for TCP queue lengths. + */ +#ifndef TCP_QLEN_DEBUG +#define TCP_QLEN_DEBUG LWIP_DBG_OFF +#endif + +/** + * UDP_DEBUG: Enable debugging in UDP. + */ +#ifndef UDP_DEBUG +#define UDP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCPIP_DEBUG: Enable debugging in tcpip.c. + */ +#ifndef TCPIP_DEBUG +#define TCPIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * PPP_DEBUG: Enable debugging for PPP. + */ +#ifndef PPP_DEBUG +#define PPP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SLIP_DEBUG: Enable debugging in slipif.c. + */ +#ifndef SLIP_DEBUG +#define SLIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * DHCP_DEBUG: Enable debugging in dhcp.c. + */ +#ifndef DHCP_DEBUG +#define DHCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * AUTOIP_DEBUG: Enable debugging in autoip.c. + */ +#ifndef AUTOIP_DEBUG +#define AUTOIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MSG_DEBUG: Enable debugging for SNMP messages. + */ +#ifndef SNMP_MSG_DEBUG +#define SNMP_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MIB_DEBUG: Enable debugging for SNMP MIBs. + */ +#ifndef SNMP_MIB_DEBUG +#define SNMP_MIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * DNS_DEBUG: Enable debugging for DNS. + */ +#ifndef DNS_DEBUG +#define DNS_DEBUG LWIP_DBG_OFF +#endif + +/* Custom definitions: !!!DO NOT CHANGE THIS SECTION!!! */ +#define LWIP_TIMEVAL_PRIVATE 0 + +#endif /* CFG_LWIP_H */ diff --git a/bertos/cfg/cfg_md2.h b/bertos/cfg/cfg_md2.h new file mode 100644 index 0000000..e937b90 --- /dev/null +++ b/bertos/cfg/cfg_md2.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Configuration file for MD2 module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_MD2_H +#define CFG_MD2_H + +/** + * Size of block for MD2 algorithm. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_MD2_BLOCK_LEN 16 + +/// Use standard permutation in MD2 algorithm. $WIZ$ type = "boolean" +#define CONFIG_MD2_STD_PERM 0 + +#endif /* CFG_MD2_H */ + diff --git a/bertos/cfg/cfg_menu.h b/bertos/cfg/cfg_menu.h new file mode 100644 index 0000000..bbfa1e7 --- /dev/null +++ b/bertos/cfg/cfg_menu.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for Menu module. + * + * \author Daniele Basile + */ + +#ifndef CFG_MENU_H +#define CFG_MENU_H + +/** + * Enable button bar behind menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_MENUBAR 0 + +/** + * Level Edit Timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_LEVELEDIT_TIMEOUT 0 + +/** + * Menu timeout + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_TIMEOUT 0 + +/** + * Enable smooth scrolling in menus + * $WIZ$ type = "boolean" + */ +#define CONFIG_MENU_SMOOTH 1 + + +#endif /* CFG_MENU_H */ + diff --git a/bertos/cfg/cfg_monitor.h b/bertos/cfg/cfg_monitor.h new file mode 100644 index 0000000..78f222b --- /dev/null +++ b/bertos/cfg/cfg_monitor.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel monitor configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_MONITOR_H +#define CFG_MONITOR_H + +/** + * Process monitor. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_MONITOR 0 + +#endif /* CFG_MONITOR_H */ diff --git a/bertos/cfg/cfg_nand.h b/bertos/cfg/cfg_nand.h new file mode 100644 index 0000000..bd3b262 --- /dev/null +++ b/bertos/cfg/cfg_nand.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Configuration file for NAND driver module. + */ + +#ifndef CFG_NAND_H +#define CFG_NAND_H + +/** + * Page data size + * + * Size of the data section of a programmable page in bytes. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_DATA_SIZE 2048 + +/** + * Page spare area size + * + * Size of the spare section of a programmable page in bytes. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_SPARE_SIZE 64 + +/** + * Pages per block + * + * Number of pages in a erase block. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_PAGES_PER_BLOCK 64 + +/** + * Number of blocks + * + * Total number of erase blocks in one NAND chip. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_NUM_BLOCK 2048 + +/** + * Number of reserved blocks + * + * Blocks reserved for remapping defective NAND blocks. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_NUM_REMAP_BLOCKS 128 + +/** + * NAND operations timeout + * + * How many milliseconds the cpu waits for + * completion of NAND operations. + * + * $WIZ$ type = "int" + */ +#define CONFIG_NAND_TMOUT 100 + +/** + * Module logging level + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_NAND_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_NAND_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_NAND_H */ diff --git a/bertos/cfg/cfg_nmea.h b/bertos/cfg/cfg_nmea.h new file mode 100644 index 0000000..9249a9a --- /dev/null +++ b/bertos/cfg/cfg_nmea.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief Configuration file for NMEA module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NMEA_H +#define CFG_NMEA_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define NMEA_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define NMEA_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Maximum number of sentence parsers supported. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCES 8 + +/** + * Max length of a complete sentence. The standard says 82 bytes, but its probably + * better to go at least 128 since some units don't adhere to the 82 bytes + * especially for proprietary sentences. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_SENTENCE_LENGTH 255 + +/** + * Max tokens in one sentence. 24 is enough for any standard sentence. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NMEAP_MAX_TOKENS 24 + +#endif /* CFG_NMEA_H */ + diff --git a/bertos/cfg/cfg_ntc.h b/bertos/cfg/cfg_ntc.h new file mode 100644 index 0000000..09b57e2 --- /dev/null +++ b/bertos/cfg/cfg_ntc.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Configuration file for NTC module. + * + * \author Daniele Basile + */ + +#ifndef CFG_NTC_H +#define CFG_NTC_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_NTC_LOG_LEVEL LOG_LVL_INFO +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_NTC_LOG_FORMAT LOG_FMT_TERSE + +#endif /* CFG_NTC_H */ diff --git a/bertos/cfg/cfg_parser.h b/bertos/cfg/cfg_parser.h new file mode 100644 index 0000000..67e091a --- /dev/null +++ b/bertos/cfg/cfg_parser.h @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Configuration file for parser module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PARSER_H +#define CFG_PARSER_H + +/** + * Max number of arguments and results for each command + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_PARSER_MAX_ARGS 4 + +/** + * Max number of commands + * $WIZ$ type = "int" + * $WIZ$ min = 8 + */ +#define CONFIG_MAX_COMMANDS_NUMBER 16 + +/** + * Enable compatibility behaviour. + * + * Skip the first word from incoming commands. Don't enable in new projects. + * $WIZ$ type = "boolean" + */ +#define CONFIG_ENABLE_COMPAT_BEHAVIOUR 1 + +#endif /* CFG_PARSER_H */ + + + diff --git a/bertos/cfg/cfg_phase.h b/bertos/cfg/cfg_phase.h new file mode 100644 index 0000000..1ed5107 --- /dev/null +++ b/bertos/cfg/cfg_phase.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for phase module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PHASE_H +#define CFG_PHASE_H + +/** + * Max value of the duty cycle on triac. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_DUTY 100 + +/** + * Max value of the triac power. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TRIAC_MAX_POWER 100 + +#endif /* CFG_PHASE_H */ diff --git a/bertos/cfg/cfg_pid.h b/bertos/cfg/cfg_pid.h new file mode 100644 index 0000000..6d515a3 --- /dev/null +++ b/bertos/cfg/cfg_pid.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PID_H +#define CFG_PID_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PID_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PID_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PID_H */ diff --git a/bertos/cfg/cfg_pocketbus.h b/bertos/cfg/cfg_pocketbus.h new file mode 100644 index 0000000..aa0b090 --- /dev/null +++ b/bertos/cfg/cfg_pocketbus.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for pocketbus module. + * + * \author Daniele Basile + */ + +#ifndef CFG_POCKETBUS_H +#define CFG_POCKETBUS_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define POCKETBUS_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define POCKETBUS_LOG_FORMAT LOG_FMT_TERSE + + +/** + *Buffer len for pockebus protocol. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_POCKETBUS_BUFLEN 128 + +/** + * Command replay timeout in milliseconds. + * $WIZ$ type = "int" + */ +#define CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT 50 + +#endif /* CFG_POCKETBUS_H */ diff --git a/bertos/cfg/cfg_proc.h b/bertos/cfg/cfg_proc.h new file mode 100644 index 0000000..fca6ede --- /dev/null +++ b/bertos/cfg/cfg_proc.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Kernel configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_PROC_H +#define CFG_PROC_H + +/** + * Enable the multithreading kernel. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN 0 + +/** + * Kernel interrupt supervisor. WARNING: Experimental, still incomplete! + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_KERN_IRQ 0 + +/** + * Preemptive process scheduling. + * + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "timer" + */ +#define CONFIG_KERN_PREEMPT 0 + +/** + * Time sharing quantum (a prime number prevents interference effects) [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_KERN_QUANTUM 11 + +/** + * Priority-based scheduling policy. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI 0 + +/** + * Priority-inheritance protocol. + * $WIZ$ type = "boolean" + */ +#define CONFIG_KERN_PRI_INHERIT 0 + +/** + * Dynamic memory allocation for processes. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "heap" + */ +#define CONFIG_KERN_HEAP 0 + +/** + * Size of the dynamic memory pool used by processes. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_KERN_HEAP_SIZE 2048L + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define KERN_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define KERN_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_PROC_H */ diff --git a/bertos/cfg/cfg_pwm.h b/bertos/cfg/cfg_pwm.h new file mode 100644 index 0000000..68d6283 --- /dev/null +++ b/bertos/cfg/cfg_pwm.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief Configuration file for PWM module. + * + * \author Daniele Basile + */ + +#ifndef CFG_PWM_H +#define CFG_PWM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define PWM_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define PWM_LOG_FORMAT LOG_FMT_VERBOSE + +/** + * Enable the OLD pwm API. + * Not recommended for new projects. + * + * $WIZ$ type = "boolean" + */ +#define CFG_PWM_ENABLE_OLD_API 1 + +#endif /* CFG_PWM_H */ diff --git a/bertos/cfg/cfg_ramp.h b/bertos/cfg/cfg_ramp.h new file mode 100644 index 0000000..162d2db --- /dev/null +++ b/bertos/cfg/cfg_ramp.h @@ -0,0 +1,115 @@ + /** + * \file + * + * + * \brief Configuration file Ramp algorithm module. + * + * \author Daniele Basile + */ + +#ifndef CFG_RAMP_H +#define CFG_RAMP_H + +/** + * Define whether the ramp will use floating point calculation within ramp_evaluate(). + * Otherwise, a less precise fixed point version will be used, which is faster on + * platforms which do no support floating point operations. + * + * \note Floating point operations will be always done within ramp_compute() to + * precalculate values, so there has to be at least a floating point emulation support. + * + * $WIZ$ type = "boolean" + */ +#define RAMP_USE_FLOATING_POINT 0 + + +#if !RAMP_USE_FLOATING_POINT + + /** + * Number of least-significant bits which are stripped away during ramp evaluation. + * This setting allows to specify larger ramps at the price of less precision. + * + * The maximum ramp size allowed is 2^(24 + RAMP_CLOCK_SHIFT_PRECISION), in clocks. + * For instance, using RAMP_CLOCK_SHIFT_PRECISION 1, and a 8x prescaler, the maximum + * length of a ramp is about 6.7 secs. Raising RAMP_CLOCK_SHIFT_PRECISION to 2 + * brings the maximum length to 13.4 secs, at the price of less precision. + * + * ramp_compute() will check that the length is below the maximum allowed through + * a runtime assertion. + * + * \note This macro is used only for the fixed-point version of the ramp. + * $WIZ$ type = "int" + * $WIZ$ min = 0 + * $WIZ$ max = 32 + */ + #define RAMP_CLOCK_SHIFT_PRECISION 2 +#endif + + +/** +* Negative pulse width for ramp. +* $WIZ$ type = "int" +* $WIZ$ min = 1 +*/ +#define RAMP_PULSE_WIDTH 50 + +/** + * Default ramp time (microsecs). + * $WIZ$ type = "int" + * $WIZ$ min = 1000 + */ +#define RAMP_DEF_TIME 6000000UL +/** + * Default ramp maxfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MAXFREQ 5000 +/** + * Default ramp minfreq (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define RAMP_DEF_MINFREQ 200 +/** + * Default ramp powerrun (deciampere). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERRUN 10 +/** + * Default ramp poweridle (Hz). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define RAMP_DEF_POWERIDLE 1 + +#endif /* CFG_RAMP_H */ diff --git a/bertos/cfg/cfg_random.h b/bertos/cfg/cfg_random.h new file mode 100644 index 0000000..5e3afdf --- /dev/null +++ b/bertos/cfg/cfg_random.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the "random" module + */ + +#ifndef CFG_RANDOM_H +#define CFG_RANDOM_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define RANDOM_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define RANDOM_LOG_FORMAT LOG_FMT_TERSE + +/** + * Random security level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "random_level" + */ +#define RANDOM_SECURITY_LEVEL RANDOM_SECURITY_MINIMUM + +#endif /* CFG_RANDOM_H */ diff --git a/bertos/cfg/cfg_randpool.h b/bertos/cfg/cfg_randpool.h new file mode 100644 index 0000000..3038363 --- /dev/null +++ b/bertos/cfg/cfg_randpool.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Configuration file for randpool module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_RANDPOOL_H +#define CFG_RANDPOOL_H + + +/** + * Define a size, in byte, of entropy pool. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SIZE_ENTROPY_POOL 64 + +/// Enable timer in randpool algo. $WIZ$ type = "boolean" +#define CONFIG_RANDPOOL_TIMER 1 + +#endif /* CFG_RANDPOOL_H */ + + diff --git a/bertos/cfg/cfg_sd.h b/bertos/cfg/cfg_sd.h new file mode 100644 index 0000000..8c40f82 --- /dev/null +++ b/bertos/cfg/cfg_sd.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Configuration file Secure Digital module. + * + * + * \author Francesco Sacchi + */ + +#ifndef CFG_SD_H +#define CFG_SD_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define SD_LOG_LEVEL LOG_LVL_ERR + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define SD_LOG_FORMAT LOG_FMT_VERBOSE + + +/** + * Enable autoassignment of SD driver to disk drive number 0 of FatFs module. + * $WIZ$ type = "boolean" + * $WIZ$ conditional_deps = "fat" + */ +#define CONFIG_SD_AUTOASSIGN_FAT 1 + +/** + * Enable backward compatibility for sd_init(). + * If enabled, sd_init() will allocate internally an Sd context, + * otherwise sd_init() will need the context to be passed explicitly. + * + * $WIZ$ type = "boolean" + */ +#define CONFIG_SD_OLD_INIT 1 + +#endif /* CFG_SD_H */ diff --git a/bertos/cfg/cfg_sem.h b/bertos/cfg/cfg_sem.h new file mode 100644 index 0000000..51811da --- /dev/null +++ b/bertos/cfg/cfg_sem.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel semaphores configuration parameters. + * + * \author Bernie Innocenti + */ + +#ifndef CFG_SEM_H +#define CFG_SEM_H + +/** + * Re-entrant mutual exclusion primitives. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SEMAPHORES 0 + +#endif /* CFG_SEM_H */ diff --git a/bertos/cfg/cfg_ser.h b/bertos/cfg/cfg_ser.h new file mode 100644 index 0000000..91a10e0 --- /dev/null +++ b/bertos/cfg/cfg_ser.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief Configuration file for serial module. + * + * \author Daniele Basile + */ + +#ifndef CFG_SER_H +#define CFG_SER_H + +/** + * Example of setting for serial port and + * spi port. + * Edit these define for your project. + */ + +/** + * Size of the outbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_UART0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2 or (at91 and not atmega8 and not atmega168 and not atmega32)" + */ +#define CONFIG_UART1_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 2 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lm3s or lpc2" + */ +#define CONFIG_UART2_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for port 3 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "lpc2" + */ +#define CONFIG_UART3_RXBUFSIZE 32 + + +/** + * Size of the outbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI0_RXBUFSIZE 32 + +/** + * Size of the outbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_TXBUFSIZE 32 + +/** + * Size of the inbound FIFO buffer for SPI port 1 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + * $WIZ$ supports = "at91" + */ +#define CONFIG_SPI1_RXBUFSIZE 32 + +/** + * SPI data order. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_order_bit" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_DATA_ORDER SER_MSB_FIRST + +/** + * SPI clock division factor. + * $WIZ$ type = "int" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_DIV 16 + +/** + * SPI clock polarity: normal low or normal high. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_pol" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_POL SPI_NORMAL_LOW + +/** + * SPI clock phase you can choose sample on first edge or + * sample on second clock edge. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ser_spi_phase" + * $WIZ$ supports = "avr" + */ +#define CONFIG_SPI_CLOCK_PHASE SPI_SAMPLE_ON_FIRST_EDGE + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_TXTIMEOUT -1 + +/** + * Default receive timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SER_RXTIMEOUT -1 + +/** + * Use RTS/CTS handshake. + * $WIZ$ type = "boolean" + * $WIZ$ supports = "False" + */ +#define CONFIG_SER_HWHANDSHAKE 0 + +/** + * Default baudrate for all serial ports (set to 0 to disable). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_SER_DEFBAUDRATE 0UL + +/// Enable strobe pin for debugging serial interrupt. $WIZ$ type = "boolean" +#define CONFIG_SER_STROBE 0 + +#endif /* CFG_SER_H */ diff --git a/bertos/cfg/cfg_signal.h b/bertos/cfg/cfg_signal.h new file mode 100644 index 0000000..e48d86a --- /dev/null +++ b/bertos/cfg/cfg_signal.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Kernel signals configuration parameters + * + * \author Bernie Innocenti + */ + +#ifndef CFG_SIGNAL_H +#define CFG_SIGNAL_H + +/** + * Inter-process signals. + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_KERN_SIGNALS 0 + +#endif /* CFG_SIGNAL_H */ diff --git a/bertos/cfg/cfg_spi_bitbang.h b/bertos/cfg/cfg_spi_bitbang.h new file mode 100644 index 0000000..1a3a8a9 --- /dev/null +++ b/bertos/cfg/cfg_spi_bitbang.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Configuration file for SPI bitbang module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_SPI_BITBANG_H +#define CFG_SPI_BITBANG_H + +/** + * Set data order for emulated SPI. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "ordet_bit_list" + */ +#define CONFIG_SPI_DATAORDER SPI_LSB_FIRST + +#endif /* CFG_SPI_BITBANG_H */ + diff --git a/bertos/cfg/cfg_spi_dma.h b/bertos/cfg/cfg_spi_dma.h new file mode 100644 index 0000000..1a0d292 --- /dev/null +++ b/bertos/cfg/cfg_spi_dma.h @@ -0,0 +1,60 @@ +/** + * \file + * + * + * \brief Configuration file for spi dma module. + * + * + * \author Francesco Sacchi + */ + +#ifndef CFG_SPI_DMA_H +#define CFG_SPI_DMA_H + + +/** + * Max size received for each DMA transfer [bytes]. + * Longer buffers will be split in two or more transfers of this size. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_SPI_DMA_MAX_RX 512 + + +/** + * Default transmit timeout (ms). Set to -1 to disable timeout support. + * $WIZ$ type = "int" + * $WIZ$ min = -1 + */ +#define CONFIG_SPI_DMA_TX_TIMEOUT -1 + + +#endif /* CFG_SER_H */ diff --git a/bertos/cfg/cfg_stepper.h b/bertos/cfg/cfg_stepper.h new file mode 100644 index 0000000..2925fb6 --- /dev/null +++ b/bertos/cfg/cfg_stepper.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief Configuration file for stepper motor module. + * + * \author Daniele Basile + */ + +#ifndef CFG_STEPPER_H +#define CFG_STEPPER_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define STEPPER_LOG_LEVEL LOG_LVL_INFO + +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define STEPPER_LOG_FORMAT LOG_FMT_TERSE + +/** + * Max number of the stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_NUM_STEPPER_MOTORS 6 + +/** + * Max number of the timer usable on target to drive stepper motor. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_TC_STEPPER_MAX_NUM 6 + +#endif /* CFG_STEPPER_H */ diff --git a/bertos/cfg/cfg_tas5706a.h b/bertos/cfg/cfg_tas5706a.h new file mode 100644 index 0000000..32b3598 --- /dev/null +++ b/bertos/cfg/cfg_tas5706a.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Configuration file for the TAS5706A module. + * + * \author Luca Ottaviano + */ + +#ifndef CFG_TAS5706A_H +#define CFG_TAS5706A_H + +/** + * Maximum output volume for TAS chip [dB]. + * + * $WIZ$ type = "int" + * $WIZ$ min = -100 + * $WIZ$ max = 24 + */ +#define CONFIG_TAS_MAX_VOL -39 + +#endif /* CFG_TAS5706A_H */ diff --git a/bertos/cfg/cfg_tftp.h b/bertos/cfg/cfg_tftp.h new file mode 100644 index 0000000..36cc622 --- /dev/null +++ b/bertos/cfg/cfg_tftp.h @@ -0,0 +1,20 @@ +#ifndef CFG_TFTP_H +#define CFG_TFTP_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define TFTP_LOG_LEVEL LOG_LVL_WARN + +/** + * Module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define TFTP_LOG_FORMAT LOG_FMT_VERBOSE + +#endif /* CFG_TFTP_H */ diff --git a/bertos/cfg/cfg_thermo.h b/bertos/cfg/cfg_thermo.h new file mode 100644 index 0000000..2734f89 --- /dev/null +++ b/bertos/cfg/cfg_thermo.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Configuration file for thermo module. + * + * \author Daniele Basile + */ + +#ifndef CFG_THERMO_H +#define CFG_THERMO_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_THERMO_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_THERMO_LOG_FORMAT LOG_FMT_TERSE + + +/** + * Interval at which thermo control is performed [ms]. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_INTERVAL_MS 100 + +/** + * Number of different samples we interpolate over to get the hifi temperature. + * + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_THERMO_HIFI_NUM_SAMPLES 10 + +#endif /* CFG_THERMO_H */ diff --git a/bertos/cfg/cfg_timer.h b/bertos/cfg/cfg_timer.h new file mode 100644 index 0000000..b6d43b3 --- /dev/null +++ b/bertos/cfg/cfg_timer.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Configuration file for timer module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_TIMER_H +#define CFG_TIMER_H + +/** + * Hardware timer selection for drv/timer.c. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "timer_select" + */ +#define CONFIG_TIMER TIMER_DEFAULT + +/** + * Debug timer interrupt using a strobe pin. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_STROBE 0 + +/** + * Enable asynchronous timers. + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_EVENTS 1 + +/** + * Support hi-res timer_usleep(). + * $WIZ$ type = "boolean" + */ +#define CONFIG_TIMER_UDELAY 1 + +#endif /* CFG_TIMER_H */ diff --git a/bertos/cfg/cfg_usb.h b/bertos/cfg/cfg_usb.h new file mode 100644 index 0000000..dbfd6fe --- /dev/null +++ b/bertos/cfg/cfg_usb.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the USB driver module + */ + +#ifndef CFG_USB_H +#define CFG_USB_H + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define USB_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define USB_LOG_FORMAT LOG_FMT_TERSE + +/** + * Size of the USB buffer used for endpoint transfers [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 2 + */ +#define CONFIG_USB_BUFSIZE 64 + +/** + * Maximum number of USB device interfaces (default = 1). + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_USB_INTERFACE_MAX 1 + +/** + * Maximum number of allocated endpoints (0 = auto). + * $WIZ$ type = "int" + * $WIZ$ min = 0 + */ +#define CONFIG_USB_EP_MAX 0 + +/** + * Maximum packet size of the control endpoint 0 [bytes]. + * $WIZ$ type = "int" + * $WIZ$ min = 8 + */ +#define CONFIG_EP0_MAX_SIZE 8 + +#endif /* CFG_USB_H */ diff --git a/bertos/cfg/cfg_usbkbd.h b/bertos/cfg/cfg_usbkbd.h new file mode 100644 index 0000000..5b6fb65 --- /dev/null +++ b/bertos/cfg/cfg_usbkbd.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the usbkbd driver module + */ + +#ifndef CFG_USBKBD_H +#define CFG_USBKBD_H + +/** + * Enable the usbkbd module. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_USBKBD 0 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define USB_KEYBOARD_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define USB_KEYBOARD_LOG_FORMAT LOG_FMT_TERSE + +/** + * USB vendor ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_KEYBOARD_VENDOR_ID 0x046d + +/** + * USB product ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_KEYBOARD_PRODUCT_ID 0xffff + +#endif /* CFG_USB_KEYBOARD_H */ diff --git a/bertos/cfg/cfg_usbmouse.h b/bertos/cfg/cfg_usbmouse.h new file mode 100644 index 0000000..7314328 --- /dev/null +++ b/bertos/cfg/cfg_usbmouse.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the usbmouse driver module + */ + +#ifndef CFG_USBMOUSE_H +#define CFG_USBMOUSE_H + +/** + * Enable the usbmouse module. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_USBMOUSE 0 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define USB_MOUSE_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define USB_MOUSE_LOG_FORMAT LOG_FMT_TERSE + +/** + * USB vendor ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_MOUSE_VENDOR_ID 0xffff + +/** + * USB product ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_MOUSE_PRODUCT_ID 0x0000 + +#endif /* CFG_USBMOUSE_H */ diff --git a/bertos/cfg/cfg_usbser.h b/bertos/cfg/cfg_usbser.h new file mode 100644 index 0000000..1fa44e7 --- /dev/null +++ b/bertos/cfg/cfg_usbser.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Configuration file for the USB serial driver module + */ + +#ifndef CFG_USBSER_H +#define CFG_USBSER_H + +/** + * Enable the usb-serial module. + * + * $WIZ$ type = "autoenabled" + */ +#define CONFIG_USBSER 0 + +/** + * Module logging level. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define USB_SERIAL_LOG_LEVEL LOG_LVL_INFO + +/** + * module logging format. + * + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define USB_SERIAL_LOG_FORMAT LOG_FMT_TERSE + +/** + * USB vendor ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_SERIAL_VENDOR_ID 0x05f9 + +/** + * USB product ID (please change this in your project, using a valid ID number!). + * + * $WIZ$ type = "hex" + */ +#define USB_SERIAL_PRODUCT_ID 0xffff + +#endif /* CFG_USBSER_H */ diff --git a/bertos/cfg/cfg_wdt.h b/bertos/cfg/cfg_wdt.h new file mode 100644 index 0000000..b53b327 --- /dev/null +++ b/bertos/cfg/cfg_wdt.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Configuration file for watchdog module. + * + * + * \author Daniele Basile + */ + +#ifndef CFG_WDT_H +#define CFG_WDT_H + +/// Enable watchdog timer. $WIZ$ type = "autoenabled" +#define CONFIG_WATCHDOG 0 + +#endif /* CFG_WDT_H */ + + diff --git a/bertos/cfg/cfg_xmodem.h b/bertos/cfg/cfg_xmodem.h new file mode 100644 index 0000000..38db735 --- /dev/null +++ b/bertos/cfg/cfg_xmodem.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Configuration file for xmodem module. + * + * \author Daniele Basile + */ + +#ifndef CFG_XMODEM_H +#define CFG_XMODEM_H + +/** + * Module logging level. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_level" + */ +#define CONFIG_XMODEM_LOG_LEVEL LOG_LVL_ERR +/** + * Module logging format. + * $WIZ$ type = "enum" + * $WIZ$ value_list = "log_format" + */ +#define CONFIG_XMODEM_LOG_FORMAT LOG_FMT_TERSE + + +/// Enable Rx. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_RECV 1 + +/// Enable TX. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_SEND 1 + +/// Allow a Rx/Tx of 1Kbyte block. $WIZ$ type = "boolean" +#define CONFIG_XMODEM_1KCRC 1 + +/** + * Max retries before giving up. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXRETRIES 15 + +/** + * Max retries before switching to BCC. + * $WIZ$ type = "int" + * $WIZ$ min = 1 + */ +#define CONFIG_XMODEM_MAXCRCRETRIES 7 + +#endif /* CFG_XMODEM_H */ + diff --git a/bertos/cfg/compiler.h b/bertos/cfg/compiler.h new file mode 100644 index 0000000..0d401bc --- /dev/null +++ b/bertos/cfg/compiler.h @@ -0,0 +1,640 @@ +/** + * \file + * + * + * \brief Additional support macros for compiler independance + * + * \author Bernie Innocenti + */ + +#ifndef BERTOS_COMPILER_H +#define BERTOS_COMPILER_H + +#include + + +#if defined __GNUC__ && defined __GNUC_MINOR__ + #define GNUC_PREREQ(maj, min) \ + ((__GNUC__ << 16) + __GNUC_MINOR__ >= ((maj) << 16) + (min)) +#else + #define GNUC_PREREQ(maj, min) 0 +#endif + +/* Some CW versions do not allow enabling C99 from the settings panel. */ +#if defined(__MWERKS__) + #pragma c99 on +#endif + +#if defined(__STDC_VERSION__) + #if (__STDC_VERSION__ == 199409L) // IAR + #define COMPILER_C99 1 // not true, because partial C99, avoid miscompilation + #elif (__STDC_VERSION__ >= 199901L) // GCC + #define COMPILER_C99 1 + #else + #define COMPILER_C99 0 + #endif +#endif + + +/** Concatenate two different preprocessor tokens (allowing macros to expand) */ +#define PP_CAT(x,y) PP_CAT__(x,y) +#define PP_CAT__(x,y) x ## y +#define PP_CAT3(x,y,z) PP_CAT(PP_CAT(x,y),z) +#define PP_CAT4(x,y,z,w) PP_CAT(PP_CAT3(x,y,z),w) +#define PP_CAT5(x,y,z,w,j) PP_CAT(PP_CAT4(x,y,z,w),j) + +/** String-ize a token (allowing macros to expand) */ +#define PP_STRINGIZE(x) PP_STRINGIZE__(x) +#define PP_STRINGIZE__(x) #x + + +/** + */ +#if COMPILER_C99 + #define COUNT_PARMS2(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _, ...) _ + #define COUNT_PARMS(...) \ + COUNT_PARMS2(11 , ## __VA_ARGS__, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) + + /** + * usage: + * \code + * #define foo_init(...) PP_CAT(foo_init_, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) + * \endcode + */ + +#else + #define COUNT_PARMS2(_0, _1, _2, _3, _4, _5, _6, _7, _8, _9, _10, _, ...) _ + #define COUNT_PARMS(args...) \ + COUNT_PARMS2(11 , ## args, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) + + /** + * usage: + * \code + * #define foo_init(args...) PP_CAT(foo_init_, COUNT_PARMS(args)) (args) + * \endcode + */ + +#endif + +#if defined(__IAR_SYSTEMS_ICC) || defined(__IAR_SYSTEMS_ICC__) + + #pragma language=extended + + /* IAR iccarm specific functions */ + #include + #pragma diag_suppress=Pe940 + #pragma inline = forced + + #define MEMORY_BARRIER asm("") + + #if CPU_ARM || CPU_CM3 + + #define COMPILER_VARIADIC_MACROS 1 + + #define INTERRUPT(x) __irq __arm void x (void) + #define INLINE static inline + #define NAKED + + /* Include some standard C89/C99 stuff */ + #include + #include + #include + + #elif CPU_I196 + + // IAR has size_t as built-in type, but does not define this symbol. + #define _SIZE_T_DEFINED + + #define INTERRUPT(x) interrupt [x] + #define REGISTER shortad + #define INLINE /* unsupported */ + + /* + * Imported from . Unfortunately, we can't just include + * this header because it typedefs jmp_buf to be an array of chars. + * This would allow the compiler to place the buffer on an odd address. + * The CPU _should_ be able to perform word accesses to + * unaligned data, but there are *BUGS* in the 80196KC with + * some combinations of opcodes and addressing modes. One of + * these, "ST SP,[?GR]+" is used in the longjmp() implementation + * provided by the IAR compiler ANSI C library. When ?GR contains + * an odd address, surprisingly the CPU will copy the high order + * byte of the source operand (SP) in the low order byte of the + * destination operand (the memory location pointed to by ?GR). + * + * We also need to replace the library setjmp()/longjmp() with + * our own versions because the IAR implementation "forgets" to + * save the contents of local registers (?LR). + */ + struct _JMP_BUF + { + void *sp; /* Stack pointer */ + void *return_addr; /* Return address */ + int lr[6]; /* 6 local registers */ + }; + + typedef struct _JMP_BUF jmp_buf[1]; + + int setjmp(jmp_buf env); + void longjmp(jmp_buf env, int val); + + /* Fake bool support */ + #define true (1==1) + #define false (1!=1) + typedef unsigned char bool; + + #else + #error Unsupported CPU + #endif + +#elif defined(_MSC_VER) /* Win32 emulation support */ + + /* MSVC doesn't provide . */ + #ifndef __cplusplus + #define true (1==1) + #define false (1!=1) + typedef int bool; + #endif /* !__cplusplus */ + + /* These C99 functions are oddly named in MSVCRT32.lib */ + #define snprintf _snprintf + #define vsnprintf _vsnprintf + + /* MSVC doesn't support C99's __func__, but has a similar extension. */ + #define __func__ __FUNCTION__ + + /* MSVC doesn't support C99's inline keyword */ + #ifndef __cplusplus + #define INLINE __inline + #endif + +#elif defined(__GNUC__) + + /* Compiler features */ + #define COMPILER_VARIADIC_MACROS 1 /* Even in C++ */ + #define COMPILER_TYPEOF 1 + #define COMPILER_STATEMENT_EXPRESSIONS 1 + + /* GCC attributes */ + #define FORMAT(type,fmt,first) __attribute__((__format__(type, fmt, first))) + #define NORETURN __attribute__((__noreturn__)) + #define UNUSED_ARG(type,arg) __attribute__((__unused__)) type arg + #define UNUSED_VAR(type,name) __attribute__((__unused__)) type name + #define USED_VAR(type,name) __attribute__((__used__)) type name + #define INLINE static inline __attribute__((__always_inline__)) + #define NOINLINE __attribute__((noinline)) + #define LIKELY(x) __builtin_expect(!!(x), 1) + #define UNLIKELY(x) __builtin_expect(!!(x), 0) + #define PURE_FUNC __attribute__((pure)) + #define CONST_FUNC __attribute__((const)) + #define UNUSED_FUNC __attribute__((unused)) + #define USED_FUNC __attribute__((__used__)) + #define RESTRICT __restrict__ + #define MUST_CHECK __attribute__((warn_unused_result)) + #define PACKED __attribute__((packed)) + #define ALIGNED(x) __attribute__ ((__aligned__(x))) + #if CPU_ARM | CPU_CM3 + #define NAKED __attribute__((naked)) + #else + #define NAKED + #endif + + /** + * Force compiler to reload context variable. + */ + #define MEMORY_BARRIER asm volatile ("" : : : "memory") + + #if GNUC_PREREQ(3,1) + #define DEPRECATED __attribute__((__deprecated__)) + #endif + + #if GNUC_PREREQ(4,5) + #define UNREACHABLE() __builtin_unreachable() + #endif + + #ifndef __cplusplus + #define ASSERT_TYPE_EQUAL(var1, var2) \ + STATIC_ASSERT(__builtin_types_compatible_p(typeof(var1), typeof(var2))) + #define ASSERT_TYPE_IS(var, type) \ + STATIC_ASSERT(__builtin_types_compatible_p(typeof(var), type)) + #endif + + /* Include some standard C89/C99 stuff */ + #include + #include + #include + #if !CPU_AVR + #include /* for ssize_t */ + #endif + + #ifndef __cplusplus + /* + * Disallow some C++ keywords as identifiers in C programs, + * for improved portability. + */ + #pragma GCC poison new delete class template typename + #pragma GCC poison private protected public operator + #pragma GCC poison friend mutable using namespace + #pragma GCC poison cin cout cerr clog + #endif + + + +#elif defined(__MWERKS__) + + /* Compiler features */ + #define COMPILER_VARIADIC_MACROS 1 + #define COMPILER_TYPEOF 1 + #define COMPILER_STATEMENT_EXPRESSIONS 1 + + #define typeof __typeof__ + + #define UNUSED_ARG(type,arg) type + + #include + #include + #include + + // CodeWarrior has size_t as built-in type, but does not define this symbol. + #define _SIZE_T_DEFINED + +#else + #error unknown compiler +#endif + + +/* Defaults for compiler extensions. */ + +/** + * \def COMPILER_VARIADIC_MACROS + * Support for macros with variable arguments. + */ +#ifndef COMPILER_VARIADIC_MACROS +#define COMPILER_VARIADIC_MACROS (COMPILER_C99 != 0) +#endif + +/** + * \def COMPILER_TYPEOF + * Support for dynamic type identification. + */ +#ifndef COMPILER_TYPEOF +#define COMPILER_TYPEOF 0 +#endif + +/** + * \def COMPILER_STATEMENT_EXPRESSIONS + * Support for statement expressions. + */ +#ifndef COMPILER_STATEMENT_EXPRESSIONS +#define COMPILER_STATEMENT_EXPRESSIONS 0 +#endif + +/* A few defaults for missing compiler features. */ +#ifndef INLINE +#define INLINE static inline +#endif +#ifndef NOINLINE +#define NOINLINE /* nothing */ +#endif +#ifndef NORETURN +#define NORETURN /* nothing */ +#endif +#ifndef FORMAT +#define FORMAT(type,fmt,first) /* nothing */ +#endif +#ifndef DEPRECATED +#define DEPRECATED /* nothing */ +#endif +#ifndef UNUSED_ARG +#define UNUSED_ARG(type,arg) type arg +#endif +#ifndef UNUSED_VAR +#define UNUSED_VAR(type,name) type name +#endif +#ifndef USED_VAR +#define USED_VAR(type,name) type name +#endif +#ifndef REGISTER +#define REGISTER /* nothing */ +#endif +#ifndef LIKELY +#define LIKELY(x) x +#endif +#ifndef UNLIKELY +#define UNLIKELY(x) x +#endif +#ifndef PURE_FUNC +#define PURE_FUNC /* nothing */ +#endif +#ifndef CONST_FUNC +#define CONST_FUNC /* nothing */ +#endif +#ifndef UNUSED_FUNC +#define UNUSED_FUNC /* nothing */ +#endif +#ifndef USED_FUNC +#define USED_FUNC /* nothing */ +#endif +#ifndef RESTRICT +#define RESTRICT /* nothing */ +#endif +#ifndef MUST_CHECK +#define MUST_CHECK /* nothing */ +#endif +#ifndef PACKED +#define PACKED /* nothing */ +#endif +#ifndef ALIGNED +#define ALIGNED /* nothing */ +#endif +#ifndef MEMORY_BARRIER +#define MEMORY_BARRIER /* nothing */ +#warning No memory barrier defined for select compiler. If you use the kernel check it. +#endif +#ifndef UNREACHABLE +#define UNREACHABLE() for (;;) +#endif + + +/* Misc definitions */ +#ifndef NULL +#define NULL (void *)0 +#endif +#ifndef EOF +#define EOF (-1) +#endif + +/* Support for hybrid C/C++ applications. */ +#ifdef __cplusplus + #define EXTERN_C extern "C" + #define EXTERN_C_BEGIN extern "C" { + #define EXTERN_C_END } + #define EXTERN_CONST extern const + #define CONST_CAST(TYPE,EXPR) (const_cast(EXPR)) +#else + #define EXTERN_C extern + #define EXTERN_C_BEGIN /* nothing */ + #define EXTERN_C_END /* nothing */ + #define EXTERN_CONST const + #define CONST_CAST(TYPE,EXPR) ((TYPE)(EXPR)) /* FIXME: How can we suppress the warning in C? */ +#endif + + +#if defined(_MSC_VER) \ + || ((defined(__IAR_SYSTEMS_ICC) || defined(__IAR_SYSTEMS_ICC__)) && CPU_I196) + /** + * \name ISO C99 fixed-size types + * + * These should be in , but a few compilers lack them. + * \{ + */ + typedef signed char int8_t; + typedef unsigned char uint8_t; + typedef short int int16_t; + typedef unsigned short int uint16_t; + typedef long int int32_t; /* _WIN64 safe */ + typedef unsigned long int uint32_t; /* _WIN64 safe */ + + #ifdef _MSC_VER + typedef __int64 int64_t; + typedef unsigned __int64 uint64_t; + #else + typedef long long int64_t; + typedef unsigned long long uint64_t; + #endif + /* \} */ +#else + /* This is the standard location. */ + #include +#endif + +#if CPU_AVR_ATMEGA8 + /* + * The ATmega8 has a very small Flash, so we can't afford + * to link in support routines for 32bit integer arithmetic. + */ + typedef int16_t ticks_t; /**< Type for time expressed in ticks. */ + typedef int16_t mtime_t; /**< Type for time expressed in milliseconds. */ + typedef int16_t utime_t; /**< Type for time expressed in microseconds. */ + #define SIZEOF_MTIME_T (16 / CPU_BITS_PER_CHAR) + #define SIZEOF_UTIME_T (16 / CPU_BITS_PER_CHAR) + #define MTIME_INFINITE 0x7FFFL +#else + typedef int32_t ticks_t; /**< Type for time expressed in ticks. */ + + typedef int32_t utime_t; /**< Type for time expressed in microseconds. */ + #define SIZEOF_UTIME_T (32 / CPU_BITS_PER_CHAR) + + #ifndef DEVLIB_MTIME_DEFINED + #define DEVLIB_MTIME_DEFINED 1 /* Resolve conflict with */ + typedef int32_t mtime_t; /**< Type for time expressed in milliseconds. */ + #define SIZEOF_MTIME_T (32 / CPU_BITS_PER_CHAR) + #define MTIME_INFINITE 0x7FFFFFFFL + #endif +#endif + +/** User defined callback type */ +typedef void (*Hook)(void *); + +/** Bulk storage large enough for both pointers or integers. */ +typedef void * iptr_t; + +/** Bulk storage large enough for both pointers to constants or integers. */ +typedef const void * const_iptr_t; + +typedef unsigned char sigbit_t; /**< Type for signal bits. */ +typedef unsigned char sigmask_t; /**< Type for signal masks. */ + +/** + * Signal structure + */ +typedef struct Signal +{ + sigmask_t wait; /**< Signals the process is waiting for */ + sigmask_t recv; /**< Received signals */ +} Signal; + +/** + * \name Standard type definitions. + * + * These should be in or , but many compilers + * and C libraries lack them. + * + * We check for some common definitions to avoid redefinitions: + * + * glibc, avr-libc: _SIZE_T_DEFINED, __ssize_t_defined + * Darwin libc: _BSD_SIZE_T_DEFINED_, _SIZE_T + * IAR ARM: _SIZE_T + * + * \{ + */ +#if !(defined(size_t) || defined(_SIZE_T_DEFINED) || defined(_BSD_SIZE_T_DEFINED_) \ + || defined(_SIZE_T)) + #if CPU_X86 + /* 32bit or 64bit (32bit for _WIN64). */ + typedef unsigned long size_t; + #else + #error Unknown CPU + #endif +#endif + +#if !(defined(ssize_t) || defined(_SSIZE_T) || defined(__ssize_t_defined)) + #if CPU_X86 + /* 32bit or 64bit (32bit for _WIN64). */ + typedef long ssize_t; + #elif CPU_ARM || CPU_CM3 + typedef int ssize_t; + #elif CPU_AVR || CPU_MSP430 + /* 16bit (missing in avr-/msp430-libc's sys/types.h). */ + typedef int ssize_t; + #else + #error Unknown CPU + #endif +#endif +/*\}*/ + + +/** + * \name Types for hardware registers. + * + * Only use these types for registers whose contents can + * be changed asynchronously by external hardware. + * + * \{ + */ +#if CPU_DSP56K + /* Registers can be accessed only through 16-bit pointers */ + typedef volatile uint16_t reg16_t; +#else + typedef volatile uint8_t reg8_t; + typedef volatile uint16_t reg16_t; + typedef volatile uint32_t reg32_t; +#endif +/*\}*/ + + +/* Quasi-ANSI macros */ +#ifndef offsetof + /** + * Return the byte offset of the member \a m in struct \a s. + * + * \note This macro should be defined in "stddef.h" and is sometimes + * compiler-specific (g++ has a builtin for it). + */ + #define offsetof(s,m) (size_t)&(((s *)0)->m) +#endif +#ifndef countof + /** + * Count the number of elements in the static array \a a. + * + * \note This macro is non-standard, but implements a very common idiom + */ + #if defined(__GNUC__) && !defined(__cplusplus) + /* + * Perform a compile time type checking: countof() can only + * work with static arrays, so throw a compile time error if a + * pointer is passed as argument. + * + * NOTE: the construct __builtin_types_compatible_p() is only + * available for C. + */ + #define countof(a) (sizeof(a) / sizeof(*(a)) + \ + STATIC_ASSERT_EXPR( \ + !__builtin_types_compatible_p( \ + typeof(a), typeof(&a[0])))) + #else + #define countof(a) (sizeof(a) / sizeof(*(a))) + #endif +#endif +#ifndef alignof + /** + * Return the alignment in memory of a generic data type. + * + * \note We need to worry about alignment when allocating memory that + * will be used later by unknown objects (e.g., malloc()) or, more + * generally, whenever creating generic container types. + */ + #define alignof(type) offsetof(struct { char c; type member; }, member) +#endif + +/** + * Cast a member of a structure out to the containing structure. + * + * \param ptr the pointer to the member. + * \param type the type of the container struct this is embedded in. + * \param member the name of the member within the struct. + */ +#if COMPILER_TYPEOF && COMPILER_STATEMENT_EXPRESSIONS + #define containerof(ptr, type, member) ({ \ + typeof( ((type *)0)->member ) *_mptr = (ptr); /* type check */ \ + (type *)(void *)((char *)_mptr - offsetof(type, member)); \ + }) +#else + #define containerof(ptr, type, member) \ + ( (type *)(void *)((char *)(ptr) - offsetof(type, member)) ) +#endif + +/** Issue a compilation error if the \a condition is false */ +#define STATIC_ASSERT(condition) \ + UNUSED_VAR(extern char, STATIC_ASSERTION_FAILED__[(condition) ? 1 : -1]) + +/** + * Issue a compilation error if \a __cond is false (this can be used inside an + * expression). + */ +#define STATIC_ASSERT_EXPR(__cond) \ + (sizeof(struct { int STATIC_ASSERTION_FAILED__:!!(__cond); }) * 0) + +#ifndef ASSERT_TYPE_EQUAL + /** Ensure two variables have the same type. */ + #define ASSERT_TYPE_EQUAL(var1, var2) \ + do { (void)(&(var1) == &(var2)); } while(0) +#endif + +#ifndef ASSERT_TYPE_IS + /** Ensure variable is of specified type. */ + #define ASSERT_TYPE_IS(var, type) \ + do { (void)(&(var) == (type *)0); } while(0) +#endif + +/** + * Prevent the compiler from optimizing access to the variable \a x, enforcing + * a refetch from memory. This also forbid from reordering successing instances + * of ACCESS_SAFE(). + */ +#ifdef __ICCARM__ +#define ACCESS_SAFE(x) x +#else +#define ACCESS_SAFE(x) (*(volatile typeof(x) *)&(x)) +#endif + +#endif /* BERTOS_COMPILER_H */ diff --git a/bertos/cfg/debug.h b/bertos/cfg/debug.h new file mode 100644 index 0000000..ef6717c --- /dev/null +++ b/bertos/cfg/debug.h @@ -0,0 +1,346 @@ +/** + * \file + * + * + * \defgroup debug Debugging facilities and macros + * \ingroup core + * \{ + * + * \brief Simple debug facilities for hosted and embedded C/C++ applications. + * + * Debug output goes to stderr in hosted applications. + * Freestanding (AKA embedded) applications use \c drv/kdebug.c to output + * diagnostic messages to a serial terminal or a JTAG debugger. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "debug" + * $WIZ$ module_configuration = "bertos/cfg/cfg_debug.h" + * $WIZ$ DEBUG = 1 + * $WIZ$ module_depends = "formatwr" + * $WIZ$ module_supports = "not atmega103" + */ + +#ifndef BERTOS_DEBUG_H +#define BERTOS_DEBUG_H + +#include +#include + +#include "cfg/cfg_debug.h" /* CONFIG_KDEBUG_* */ + +/* + * Defaults for rarely used config stuff. + */ +#ifndef CONFIG_KDEBUG_TRACE +#define CONFIG_KDEBUG_TRACE 1 +#endif + +#ifndef CONFIG_KDEBUG_VERBOSE_ASSERT +#define CONFIG_KDEBUG_VERBOSE_ASSERT 1 +#endif + +#ifndef CONFIG_KDEBUG_WALLS +#define CONFIG_KDEBUG_WALLS 1 +#endif + +#if defined(__doxygen__) + /** + * Preprocessor symbol defined only for debug builds. + * + * The build infrastructure must arrange for _DEBUG to + * be predefined for all the source files being compiled. + * + * This is compatible with the MSVC convention for the + * default Debug and Release project targets. + */ + #define _DEBUG 1 +#endif + +#ifdef _DEBUG + // STLport specific: enable extra checks + #define __STL_DEBUG 1 + + // MSVC specific: Enable memory allocation debug + #if defined(_MSC_VER) + #include + #endif + + /* + * On UNIX systems the extabilished practice is to define + * NDEBUG for release builds and nothing for debug builds. + */ + #ifdef NDEBUG + #undef NDEBUG + #endif + + /** + * This macro duplicates the old MSVC trick of redefining + * THIS_FILE locally to avoid the overhead of many duplicate + * strings in ASSERT(). + */ + #ifndef THIS_FILE + #define THIS_FILE __FILE__ + #endif + + /** + * This macro can be used to conditionally exclude one or more + * statements conditioned on \c _DEBUG, avoiding the clutter + * of ifdef/endif pairs. + * + * \code + * struct FooBar + * { + * int foo; + * bool bar; + * DB(int ref_count;) // Track number of users + * + * void release() + * { + * DB(--ref_count;) + * } + * }; + * \endcode + */ + #define DB(x) x + + #include /* CPU_HARVARD */ + + /* These are implemented in drv/kdebug.c */ + void kdbg_init(void); + void kputchar(char c); + int kputnum(int num); + void kdump(const void *buf, size_t len); + void __init_wall(long *wall, int size); + + #if CPU_HARVARD + #include + void kputs_P(const char *PROGMEM str); + void kprintf_P(const char *PROGMEM fmt, ...) FORMAT(__printf__, 1, 2); + int __bassert_P(const char *PROGMEM cond, const char *PROGMEM file, int line); + void __trace_P(const char *func); + void __tracemsg_P(const char *func, const char *PROGMEM fmt, ...); + int __invalid_ptr_P(void *p, const char *PROGMEM name, const char *PROGMEM file, int line); + int __check_wall_P(long *wall, int size, const char * PGM_ATTR name, const char * PGM_ATTR file, int line); + #define kputs(str) kputs_P(PSTR(str)) + #define kprintf(fmt, ...) kprintf_P(PSTR(fmt) ,## __VA_ARGS__) + #define __bassert(cond, file, line) __bassert_P(PSTR(cond), PSTR(file), (line)) + #define __trace(func) __trace_P(func) + #define __tracemsg(func, fmt, ...) __tracemsg_P(func, PSTR(fmt), ## __VA_ARGS__) + #define __invalid_ptr(p, name, file, line) __invalid_ptr_P((p), PSTR(name), PSTR(file), (line)) + #define __check_wall(wall, size, name, file, line) __check_wall_P(wall, size, PSTR(name), PSTR(file), (line)) + #else /* !CPU_HARVARD */ + void kputs(const char *str); + void kprintf(const char *fmt, ...) FORMAT(__printf__, 1, 2); + int __bassert(const char *cond, const char *file, int line); + void __trace(const char *func); + void __tracemsg(const char *func, const char *fmt, ...) FORMAT(__printf__, 2, 3); + int __invalid_ptr(void *p, const char *name, const char *file, int line); + int __check_wall(long *wall, int size, const char *name, const char *file, int line); + #endif /* !CPU_HARVARD */ + + #if CONFIG_KDEBUG_VERBOSE_ASSERT + /** + * Assert a pre-condition on code. + */ + #define ASSERT(x) ((void)(LIKELY(x) ? 0 : __bassert(#x, THIS_FILE, __LINE__))) + /** + * Assert a pre-condition and give explanation message when assert fails + */ + #define ASSERT2(x, help) ((void)(LIKELY(x) ? 0 : __bassert(help " (" #x ")", THIS_FILE, __LINE__))) + #else + #define ASSERT(x) ((void)(LIKELY(x) ? 0 : __bassert("", THIS_FILE, __LINE__))) + #define ASSERT2(x, help) ((void)ASSERT(x)) + #endif + + #define IS_VALID_PTR(p) (LIKELY((void *)(p) >= (void *)CPU_RAM_START)) + /** + * Check that the given pointer is either NULL or pointing to valid memory. + * + * The assumption here is that valid pointers never point to low + * memory regions. This helps catching pointers taken from + * struct/class memebers when the struct pointer was NULL. + * + * \see ASSERT_VALID_PTR_OR_NULL() + */ + #define ASSERT_VALID_PTR(p) (IS_VALID_PTR(p) \ + ? 0 : __invalid_ptr(p, #p, THIS_FILE, __LINE__)) + + /** + * Check that the given pointer is not pointing to invalid memory. + * + * \note The check for invalid memory is architecture specific and + * conservative. The current implementation only checks against + * a lower bound. + * + * \see ASSERT_VALID_PTR() + */ + #define ASSERT_VALID_PTR_OR_NULL(p) ((void)(LIKELY((p == NULL) \ + || ((void *)(p) >= (void *)CPU_RAM_START)) \ + ? 0 : __invalid_ptr((p), #p, THIS_FILE, __LINE__))) + + #if CONFIG_KDEBUG_TRACE + #define TRACE __trace(__func__) + #define TRACEMSG(msg,...) __tracemsg(__func__, msg, ## __VA_ARGS__) + #else + #define TRACE do {} while(0) + #define TRACEMSG(...) do {} while(0) + #endif + + /** + * Check that the given pointer actually points to an object + * of the specified type. + */ + #define ASSERT_VALID_OBJ(_t, _o) do { \ + ASSERT_VALID_PTR((_o)); \ + ASSERT(dynamic_cast<_t>((_o)) != NULL); \ + } + + /** + * \name Debug object creation and destruction. + * + * These macros help track some kinds of leaks in C++ programs. + * Usage is as follows: + * + * \code + * class Foo + * { + * DECLARE_INSTANCE_TRACKING(Foo) + * + * Foo() + * { + * NEW_INSTANCE(Foo); + * // ... + * } + * + * ~Foo() + * { + * DELETE_INSTANCE(Foo); + * // ... + * } + * }; + * + * // Put this in the implementation file of the class + * IMPLEMENT_INSTANCE_TRACKING(Foo) + * + * // Client code + * int main(void) + * { + * Foo *foo = new Foo; + * cout << GET_INSTANCE_COUNT(Foo) << endl; // prints "1" + * delete foo; + * ASSERT_ZERO_INSTANCES(Foo); // OK + * } + * \endcode + * \{ + */ + #define NEW_INSTANCE(CLASS) do { ++CLASS::__instances } while (0) + #define DELETE_INSTANCE(CLASS) do { --CLASS::__instances } while (0) + #define ASSERT_ZERO_INSTANCES(CLASS) ASSERT(CLASS::__instances == 0) + #define GET_INSTANCE_COUNT(CLASS) (CLASS::__instances) + #define DECLARE_INSTANCE_TRACKING(CLASS) static int __instances + #define IMPLEMENT_INSTANCE_TRACKING(CLASS) int CLASS::__instances = 0 + /*\}*/ + +#else /* !_DEBUG */ + + /* + * On UNIX systems the extabilished practice is to define + * NDEBUG for release builds and nothing for debug builds. + */ + #ifndef NDEBUG + #define NDEBUG 1 + #endif + + #define DB(x) /* nothing */ + #ifndef ASSERT + #define ASSERT(x) ((void)0) + #endif /* ASSERT */ + #define ASSERT2(x, help) ((void)0) + #define IS_VALID_PTR(p) (1) + #define ASSERT_VALID_PTR(p) ((void)0) + #define ASSERT_VALID_PTR_OR_NULL(p) ((void)0) + #define ASSERT_VALID_OBJ(_t, _o) ((void)0) + #define TRACE do {} while (0) + #if COMPILER_VARIADIC_MACROS + #define TRACEMSG(x, ...) do {} while (0) + #else + INLINE void TRACEMSG(UNUSED_ARG(const char *, msg), ...) + { + /* NOP */ + } + #endif + + #define NEW_INSTANCE(CLASS) do {} while (0) + #define DELETE_INSTANCE(CLASS) do {} while (0) + #define ASSERT_ZERO_INSTANCES(CLASS) do {} while (0) + #define GET_INSTANCE_COUNT(CLASS) ERROR_ONLY_FOR_DEBUG + #define DECLARE_INSTANCE_TRACKING(CLASS) + #define IMPLEMENT_INSTANCE_TRACKING(CLASS) + + INLINE void kdbg_init(void) { /* nop */ } + INLINE void kputchar(UNUSED_ARG(char, c)) { /* nop */ } + INLINE int kputnum(UNUSED_ARG(int, num)) { return 0; } + INLINE void kputs(UNUSED_ARG(const char *, str)) { /* nop */ } + INLINE void kdump(UNUSED_ARG(const void *, buf), UNUSED_ARG(size_t, len)) { /* nop */ } + + #if defined(__cplusplus) && COMPILER_VARIADIC_MACROS + /* G++ can't inline functions with variable arguments... */ + #define kprintf(fmt,...) do { (void)(fmt); } while(0) + #else + /* ...but GCC can. */ + INLINE void kprintf(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #endif + +#endif /* _DEBUG */ + +#if CONFIG_KDEBUG_WALLS + /** + * \name Walls to detect data corruption + * \{ + */ + #define WALL_SIZE 8 + #define WALL_VALUE (long)0xABADCAFEL + #define DECLARE_WALL(name,size) long name[(size) / sizeof(long)]; + #define FWD_DECLARE_WALL(name,size) extern long name[(size) / sizeof(long)]; + #define INIT_WALL(name) __init_wall((name), countof(name)) + #define CHECK_WALL(name) __check_wall((name), countof(name), #name, THIS_FILE, __LINE__) + /*\}*/ +#else + #define DECLARE_WALL(name, size) /* nothing */ + #define FWD_DECLARE_WALL(name, size) /* nothing */ + #define INIT_WALL(name) do {} while (0) + #define CHECK_WALL(name) do {} while (0) +#endif + +/** \} */ // defgroup debug + +#endif /* BERTOS_DEBUG_H */ diff --git a/bertos/cfg/depend.h b/bertos/cfg/depend.h new file mode 100644 index 0000000..dcbbfac --- /dev/null +++ b/bertos/cfg/depend.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Depend module. + * + * \author Bernie Innocenti + * + */ + +#ifndef CFG_DEPEND_H +#define CFG_DEPEND_H + +#include // STATIC_ASSERT() + +/** + * Compile-time enforcement of dependencies between configuration options + */ +#define CONFIG_DEPEND(FEATURE, DEPS) STATIC_ASSERT(!(FEATURE) || !!(DEPS)) + +#endif // CFG_DEPEND_H diff --git a/bertos/cfg/kfile_debug.c b/bertos/cfg/kfile_debug.c new file mode 100644 index 0000000..40233a0 --- /dev/null +++ b/bertos/cfg/kfile_debug.c @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief KFile interface over debug. + * + * \author Francesco Sacchi + */ + +#include "kfile_debug.h" + +#include + +#include + + +static size_t kfiledebug_write(struct KFile *_fd, const void *buf, size_t size) +{ + KFILEDEBUG_CAST(_fd); + + kprintf("%.*s", (int)size, (const char *)buf); + + return size; +} + +void kfiledebug_init(KFileDebug *kd) +{ + ASSERT(kd); + + memset(kd, 0, sizeof(*kd)); + + kfile_init(&kd->fd); + kd->fd.write = kfiledebug_write; + DB(kd->fd._type = KFT_KFILEDEBUG); +} diff --git a/bertos/cfg/kfile_debug.h b/bertos/cfg/kfile_debug.h new file mode 100644 index 0000000..0dce7e7 --- /dev/null +++ b/bertos/cfg/kfile_debug.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief KFile interface over a debug console. + * + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kfiledebug" + * $WIZ$ module_depends = "kfile" + */ + +#ifndef CFG_KFILE_DEBUG +#define CFG_KFILE_DEBUG + +#include + +/** + * Context for KFile over debug console. + */ +typedef struct KFileDebug +{ + KFile fd; ///< KFile base class +} KFileDebug; + +/** + * ID for KFileDebug. + */ +#define KFT_KFILEDEBUG MAKE_ID('K', 'D', 'B', 'G') + +/** + * Convert + ASSERT from generic KFile to KFileDebug. + */ +INLINE KFileDebug * KFILEDEBUG_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_KFILEDEBUG); + return (KFileDebug *)fd; +} + +/** + * Initialize KFileMem struct. + * + * \param km Interface to initialize. + */ +void kfiledebug_init(KFileDebug *km); + +#endif /* CFG_KFILE_DEBUG */ diff --git a/bertos/cfg/log.h b/bertos/cfg/log.h new file mode 100644 index 0000000..1e4fc15 --- /dev/null +++ b/bertos/cfg/log.h @@ -0,0 +1,200 @@ +/** + * \file + * + * + * \defgroup logging Logging facilities + * \ingroup core + * \{ + * \brief Logging system module. + * + * This module implement a simple interface to use the multi level logging system. + * The log message have the priority order, like this: + * + * - error message (highest) + * - warning message + * - info message (lowest) + * + * With this priority system we log only the messages that have priority higher + * or equal to the log level that has been configurated; messages below the + * selected log level are not included at compile time, so no time and space + * is wasted on unused functions. + * + * Furthermore you can define different log levels for each module. To do this + * you just need to define LOG_LEVEL in the configuration file for the + * selected module. + * + * This module provides two types of macros: + * + * - LOG_* macros: these macros allow formatted output, using the same format + * as kprintf + * - LOG_*B macros: these macros allow to optionally compile a block of code + * depending on the logging level chosen + * + * To use the logging system you should include this module in your driver + * and use one of the LOG_ERR, LOG_WARN and LOG_INFO macros to output error + * messages. + * Then you should define a LOG_LEVEL and LOG_VERBOSE costant in your + * \c cfg/cfg_\.h using the follow policy: + * + * - in your file \c cfg/cfg_\.h, define the logging + * level and verbosity mode for your specific module: + * + * \code + * /// Module logging level. + * #define _LOG_LEVEL LOG_LVL_INFO + * + * /// Module logging format. + * #define _LOG_FORMAT LOG_FMT_VERBOSE + * \endcode + * + * - then, in the module where you use the logging macros you should define + * the macros LOG_LEVEL and LOG_FORMAT and you should include cfg/log.h + * module, as demonstrated in the following example: + * + * \code + * // Define log settings for cfg/log.h. + * #define LOG_LEVEL _LOG_LEVEL + * #define LOG_FORMAT _LOG_FORMAT + * #include + * \endcode + * + * if you include a log.h module without defining the LOG_LEVEL and LOG_VERBOSE + * macros, the module uses the default settings. + * + * WARNING: when using the log.h module make sure to include this module after + * a \c cfg_.h, because the LOG_LEVEL and LOG_VERBOSE macros + * must be defined before including the log module. Otherwise the log module + * will use the default settings. + * + * \author Daniele Basile + * + * $WIZ$ + */ + +#ifndef CFG_LOG_H +#define CFG_LOG_H + +#include + +// Use a default setting if nobody defined a log level +#ifndef LOG_LEVEL +#define LOG_LEVEL LOG_LVL_ERR +#endif + +// Use a default setting if nobody defined a log format +#ifndef LOG_FORMAT +#define LOG_FORMAT LOG_FMT_TERSE +#endif + +/** + * \name Logging level definition + * + * When you choose a log level messages you choose + * also which print function are linked. + * When using a log level, you link all log functions that have a priority + * higher or equal than the level you chose. + * The priority level go from error (highest) to info (lowest). + * + * $WIZ$ log_level = "LOG_LVL_NONE", "LOG_LVL_ERR", "LOG_LVL_WARN", "LOG_LVL_INFO" + * \{ + */ +#define LOG_LVL_NONE 0 +#define LOG_LVL_ERR 1 +#define LOG_LVL_WARN 2 +#define LOG_LVL_INFO 3 +/** \} */ + +/** + * \name Logging format + * + * There are two logging format: terse and verbose. The latter prepends + * function names and line number information to each log entry. + * + * $WIZ$ log_format = "LOG_FMT_VERBOSE", "LOG_FMT_TERSE" + * \{ + */ +#define LOG_FMT_VERBOSE 1 +#define LOG_FMT_TERSE 0 +/** \} */ + +#if LOG_FORMAT == LOG_FMT_VERBOSE + #define LOG_PRINT(str_level, str,...) kprintf("%s():%d:%s: " str, __func__, __LINE__, str_level, ## __VA_ARGS__) +#elif LOG_FORMAT == LOG_FMT_TERSE + #define LOG_PRINT(str_level, str,...) kprintf("%s: " str, str_level, ## __VA_ARGS__) +#else + #error No LOG_FORMAT defined +#endif + +#if LOG_LEVEL >= LOG_LVL_ERR + /** + * Output an error message + */ + #define LOG_ERR(str,...) LOG_PRINT("ERR", str, ## __VA_ARGS__) + /** + * Define a code block that will be compiled only when LOG_LEVEL >= LOG_LVL_ERR + */ + #define LOG_ERRB(x) x +#else + INLINE void LOG_ERR(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #define LOG_ERRB(x) /* Nothing */ +#endif + +#if LOG_LEVEL >= LOG_LVL_WARN + /** + * Output a warning message + */ + #define LOG_WARN(str,...) LOG_PRINT("WARN", str, ## __VA_ARGS__) + /** + * Define a code block that will be compiled only when LOG_LEVEL >= LOG_LVL_WARN + */ + #define LOG_WARNB(x) x +#else + INLINE void LOG_WARN(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #define LOG_WARNB(x) /* Nothing */ +#endif + +#if LOG_LEVEL >= LOG_LVL_INFO + /** + * Output an informative message + */ + #define LOG_INFO(str,...) LOG_PRINT("INFO", str, ## __VA_ARGS__) + /** + * Define a code block that will be compiled only when LOG_LEVEL >= LOG_LVL_INFO + */ + #define LOG_INFOB(x) x +#else + INLINE void LOG_INFO(UNUSED_ARG(const char *, fmt), ...) { /* nop */ } + #define LOG_INFOB(x) /* Nothing */ +#endif +/** \} */ + + +#endif /* CFG_LOG_H */ diff --git a/bertos/cfg/macros.h b/bertos/cfg/macros.h new file mode 100644 index 0000000..073ad55 --- /dev/null +++ b/bertos/cfg/macros.h @@ -0,0 +1,412 @@ +/** + * \file + * + * + * \defgroup macros General purpose macros + * \ingroup core + * \{ + * + * \brief Common and handy function macros + * + * \author Bernie Innocenti + * \author Giovanni Bajo + */ +#ifndef CFG_MACROS_H +#define CFG_MACROS_H + +#include + +/* avr-gcc does not seem to support libstdc++ */ +#if defined(__cplusplus) && !CPU_AVR + /* Type-generic macros implemented with template functions. */ + #include + + template inline T ABS(T n) { return n >= 0 ? n : -n; } + #define MIN(a,b) std::min(a, b) + #define MAX(a,b) std::max(a, b) + #define SWAP(a,b) std::swap(a, b) +#elif (COMPILER_STATEMENT_EXPRESSIONS && COMPILER_TYPEOF) + /* Type-generic macros implemented with statement expressions. */ + #define ABS(n) ({ \ + typeof(n) _n = (n); \ + (_n < 0) ? -_n : _n; \ + }) + #define MIN(a,b) ({ \ + typeof(a) _a = (a); \ + typeof(b) _b = (b); \ + ASSERT_TYPE_EQUAL(_a, _b); \ + /** \ + * The (typeof(_a)) cast in necessary: \ + * result type of conditional expressions is \ + * *NOT* the type of the value returned but \ + * the type that would be produced if _a and _b \ + * were mixed in an expression. \ + * Even in _a and _b are of the same type, \ + * if mixed in an expression the type will be \ + * (at least) promoted to int! \ + */ \ + ((typeof(_a))((_a < _b) ? _a : _b)); \ + }) + #define MAX(a,b) ({ \ + typeof(a) _a = (a); \ + typeof(b) _b = (b); \ + ASSERT_TYPE_EQUAL(_a, _b); \ + /** \ + * The (typeof(_a)) cast in necessary: \ + * result type of conditional expressions is \ + * *NOT* the type of the value returned but \ + * the type that would be produced if _a and _b \ + * were mixed in an expression. \ + * Even in _a and _b are of the same type, \ + * if mixed in an expression the type will be \ + * (at least) promoted to int! \ + */ \ + ((typeof(_a))((_a > _b) ? _a : _b)); \ + }) +#else /* !(COMPILER_STATEMENT_EXPRESSIONS && COMPILER_TYPEOF) */ + /* Buggy macros for inferior compilers. */ + #define ABS(a) (((a) < 0) ? -(a) : (a)) + #define MIN(a,b) (((a) < (b)) ? (a) : (b)) + #define MAX(a,b) (((a) > (b)) ? (a) : (b)) +#endif /* !(COMPILER_STATEMENT_EXPRESSIONS && COMPILER_TYPEOF) */ + +/** Align \p value to the next \p align boundary */ +#define ALIGN_UP(value, align) (((value) & ((align) - 1)) ? \ + (((value) + ((align) - 1)) & ~((align) - 1)) : \ + (value)) + +/** Bound \a x between \a min and \a max. */ +#define MINMAX(min,x,max) (MIN(MAX(min, x), max)) + +#ifdef __cplusplus + /* Use standard implementation from */ + #define SWAP(a,b) std::swap(a, b) +#elif COMPILER_TYPEOF + /** + * Type-generic macro to swap \a a with \a b. + * + * \note Arguments are evaluated multiple times. + */ + #define SWAP(a, b) \ + do { \ + typeof(a) tmp; \ + ASSERT_TYPE_EQUAL(a, b); \ + tmp = (a); \ + (a) = (b); \ + (b) = tmp; \ + } while (0) +#else /* !COMPILER_TYPEOF */ + /* Sub-optimal implementation that only works with integral types. */ + #define SWAP(a, b) \ + do { \ + (a) ^= (b); \ + (b) ^= (a); \ + (a) ^= (b); \ + } while (0) + +#endif /* COMPILER_TYPEOF */ + +/** + * Shuffle the content of \a array that counts \a len elements. + */ +#define SHUFFLE(array, len) \ + do { \ + int i, j; \ + for (i = (len) - 1; i > 0; i--) \ + { \ + j = ((i + 1) * (rand() / (RAND_MAX + 1.0))); \ + SWAP((array)[i], (array)[j]); \ + } \ + } while (0) + +/** + * Macro to swap \a a with \a b, with explicit type \a T for dumb C89 compilers. + * + * \note Arguments are evaluated multiple times. + */ +#define SWAP_T(a, b, T) \ + do { \ + T tmp; \ + ASSERT_TYPE_IS(a, T); \ + ASSERT_TYPE_IS(b, T); \ + tmp = (a); \ + (a) = (b); \ + (b) = tmp; \ + } while (0) + +/** + * Reverse the bits contained in b (LSB becomes the MSB and so on). + * \note \a b is evaluated twice + */ +#define REVERSE_UINT8(b) \ + ((uint8_t)((((b) * 0x0802UL & 0x22110UL) | ((b) * 0x8020UL & 0x88440UL)) * 0x10101UL >> 16)) + +#ifndef BV + /** Convert a bit value to a binary flag. */ + #define BV(x) (1<<(x)) +#endif + +/** Same as BV() but with 32 bit result */ +#define BV32(x) ((uint32_t)1<<(x)) + +/** Same as BV() but with 16 bit result */ +#define BV16(x) ((uint16_t)1<<(x)) + +/** Same as BV() but with 8 bit result */ +#define BV8(x) ((uint8_t)1<<(x)) + +/** + * Perform an integer division rounding the result to the nearest int value. + * \note \a divisor should preferibly be a costant, otherwise this macro generates + * 2 division. Also divisor is evaluated twice. + */ +#define DIV_ROUND(dividend, divisor) (((dividend) + (divisor) / 2) / (divisor)) + +/** + * Perform an integer division rounding the result to the upper int value. + * \note \a divisor is evaluated twice. + */ +#define DIV_ROUNDUP(dividend, divisor) (((dividend) + (divisor) - 1) / (divisor)) + + +/** + * Perform a multiply between the integer \a a and the float constant \a f. + * + * This macro can be used in order to avoid floating point arithmetics + * in expressions like this: + * \code + * int a, b; + * a = b * 0.5579652750; + * \endcode + * + * This macro rounds the floating point constant to a fraction, + * usign (2 ^ prec) as the denominator. + * For instance, with prec = 8, the constant 0.5579652750 will be rounded to: + * (143 / 256) = 0.55859375 + * So, the former code will be transformed to: + * \code + * a = b * 143 / 256; + * \endcode + * + * Since the denominator is a power of 2, we rely on the compiler to optimize + * this to a right shift. + * So, when you have to multiply an integer by a float constant, this macro + * will not use the floating point arithmentics. + * The operation will be converted to a mul + shift, with a huge performance boost. + * + * \note \a f MUST be a constant in order gain performance benefits. + * + * \param a integer you want to multiply + * \param f floating point constant which you want to multply with \a a + * \param prec conversion precision, ranges from 1 to the number of bits in a long. + * The higher, the better the approximation of the float constant will be. + */ +#define INT_MULT(a, f, prec) (((a) * (long)((f) * (1 << (prec)) + 0.5)) >> (prec)) + + +/** Round up \a x to an even multiple of the 2's power \a pad. */ +#define ROUND_UP2(x, pad) (((x) + ((pad) - 1)) & ~((pad) - 1)) + +/** + * \name Integer round macros. + * + * Round \a x to a multiple of \a base. + * \note If \a x is signed these macros generate a lot of code. + * \{ + */ +#define ROUND_DOWN(x, base) ( (x) - ((x) % (base)) ) +#define ROUND_UP(x, base) ( ((x) + (base) - 1) - (((x) + (base) - 1) % (base)) ) +#define ROUND_NEAREST(x, base) ( ((x) + (base) / 2) - (((x) + (base) / 2) % (base)) ) +/* \} */ + +/** Check if \a x is an integer power of 2. */ +#define IS_POW2(x) (!(bool)((x) & ((x)-1))) + +/** Calculate a compile-time log2 for a uint8_t */ +#define UINT8_LOG2(x) \ + ((x) < 2 ? 0 : \ + ((x) < 4 ? 1 : \ + ((x) < 8 ? 2 : \ + ((x) < 16 ? 3 : \ + ((x) < 32 ? 4 : \ + ((x) < 64 ? 5 : \ + ((x) < 128 ? 6 : 7))))))) + +/** Calculate a compile-time log2 for a uint16_t */ +#define UINT16_LOG2(x) \ + ((x < 256) ? UINT8_LOG2(x) : UINT8_LOG2((x) >> 8) + 8) + +/** Calculate a compile-time log2 for a uint32_t */ +#define UINT32_LOG2(x) \ + ((x < 65536UL) ? UINT16_LOG2(x) : UINT16_LOG2((x) >> 16) + 16) + +#if COMPILER_VARIADIC_MACROS + /** Count the number of arguments (up to 16). */ + #define PP_COUNT(...) \ + PP_COUNT__(__VA_ARGS__,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0) + #define PP_COUNT__(a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15,count,...) \ + count +#endif + +#if COMPILER_VARIADIC_MACROS + /** + * \def BIT_CHANGE(reg, (mask, value), ...) + * + * This macro allows for efficient and compact bit toggling in a hardware + * register. It is meant to replace hand-coded cruft which toggles bits + * in sequence. + * + * It is possible to specify an unlimited pair of (mask, value) parameters. + * For instance: + * + * \code + * void set_timer(bool start) + * { + * BIT_CHANGE(REG_CTRL_TIMER, + * (TIMER_MODE, MODE_COUNT), + * (OVL_IRQ, 1), + * (CMP_IRQ, 1), + * (START, start) + * ); + * } + * \endcode + * + * The macro expansion will be roughly the following: + * + * \code + * REG_CTRL_TIMER = (REG_CTRL_TIMER & ~(TIMER_MODE|OVL_IRQ|CMP_IRQ|START) + * | (MODE_COUNT|OVL_IRQ|CMP_IRQ|(start ? START : 0)); + * \endcode + * + * It is up to the compiler to produce the optimal code. We checked that GCC produces + * the best code in most cases. We preferred this expansion over the use of a block + * with a local variable because CodeWarrior 6.1 was not able to remove completely the + * allocation of the local from the stack. + * + * \note This macro is available only in C99 because it makes use of variadic macros. + * It would be possible to make up an implementation with a slightly different syntax + * for use with C90 compilers, through Boost Preprocessor. + */ + + /** + * \def BIT_CHANGE_BV(reg, (bit, value), ...) + * + * Similar to BIT_CHANGE(), but get bits instead of masks (and applies BV() to convert + * them to masks). + */ + + #define BIT_EXTRACT_FLAG_0(bit, value) bit + #define BIT_EXTRACT_FLAG_1(bit, value) BV(bit) + #define BIT_EXTRACT_VALUE__(bit, value) value + + #define BIT_MASK_SINGLE__(use_bv, index, max, arg) \ + ((index < max) ? (PP_CAT(BIT_EXTRACT_FLAG_, use_bv) arg) : 0) \ + /* */ + + #define BIT_MASK_IF_SINGLE__(use_bv, index, max, arg) \ + (((index < max) && (BIT_EXTRACT_VALUE__ arg)) ? (PP_CAT(BIT_EXTRACT_FLAG_, use_bv) arg) : 0) \ + /* */ + + #define BIT_ITER__2(macro, use_bv, max, a0,a1,a2,a3,a4,a5,a6,a7,a8,a9,a10,a11,a12,a13,a14,a15, ...) \ + (macro(use_bv, 0, max, a0) | \ + macro(use_bv, 1, max, a1) | \ + macro(use_bv, 2, max, a2) | \ + macro(use_bv, 3, max, a3) | \ + macro(use_bv, 4, max, a4) | \ + macro(use_bv, 5, max, a5) | \ + macro(use_bv, 6, max, a6) | \ + macro(use_bv, 7, max, a7) | \ + macro(use_bv, 8, max, a8) | \ + macro(use_bv, 9, max, a9) | \ + macro(use_bv, 10, max, a10) | \ + macro(use_bv, 11, max, a11) | \ + macro(use_bv, 12, max, a12) | \ + macro(use_bv, 13, max, a13) | \ + macro(use_bv, 14, max, a14) | \ + macro(use_bv, 15, max, a15)) \ + /* */ + + #define BIT_ITER__(macro, use_bv, ...) \ + BIT_ITER__2(macro, use_bv, PP_COUNT(__VA_ARGS__), __VA_ARGS__, (0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1),(0,1)) \ + /* */ + + #define BIT_MASKS__(use_bv, ...) \ + BIT_ITER__(BIT_MASK_SINGLE__, use_bv, __VA_ARGS__) + /* */ + + #define BIT_MASKS_CONDITIONAL__(use_bv, ...) \ + BIT_ITER__(BIT_MASK_IF_SINGLE__, use_bv, __VA_ARGS__) + /* */ + + #define BIT_CHANGE__(reg, use_bv, ...) \ + ((reg) = ((reg) & ~BIT_MASKS__(use_bv, __VA_ARGS__)) | BIT_MASKS_CONDITIONAL__(use_bv, __VA_ARGS__)) \ + /* */ + + #define BIT_CHANGE(reg, ...) BIT_CHANGE__(reg, 0, __VA_ARGS__) + #define BIT_CHANGE_BV(reg, ...) BIT_CHANGE__(reg, 1, __VA_ARGS__) + +#endif /* COMPILER_VARIADIC_MACROS */ + +/** + * Macro for rotating bit left or right. + * \{ + */ +#define ROTR(var, rot) (((var) >> (rot)) | ((var) << ((sizeof(var) * 8) - (rot)))) +#define ROTL(var, rot) (((var) << (rot)) | ((var) >> ((sizeof(var) * 8) - (rot)))) +/*\}*/ + +/** + * Make an id from 4 letters, useful for + * file formats and kfile ids. + */ +#define MAKE_ID(a,b,c,d) \ + ( ((uint32_t)(a) << 24) \ + | ((uint32_t)(b) << 16) \ + | ((uint32_t)(c) << 8) \ + | ((uint32_t)(d) << 0) ) + +/** + * Type for id generated by MAKE_ID(). + */ +typedef uint32_t id_t; + +/** + * Check if a pointer is aligned to a certain power-of-2 size + */ +INLINE bool is_aligned(const void *addr, size_t size) +{ + return ((size_t)addr & (size - 1)) == 0; +} + +/** \} */ //defgroup macros + +#endif /* MACROS_H */ + diff --git a/bertos/cfg/module.h b/bertos/cfg/module.h new file mode 100644 index 0000000..0de48f8 --- /dev/null +++ b/bertos/cfg/module.h @@ -0,0 +1,123 @@ +/** + * \file + * + * + * \brief Debug macros for inter-module dependency checking. + * + * These macros expand to nothing in release builds. In debug + * builds, they perform run-time dependency checks for modules. + * + * The usage pattern looks like this: + * + * \code + * MOD_DEFINE(phaser) + * + * void phaser_init(void) + * { + * MOD_CHECK(computer); + * MOD_CHECK(warp_core); + * + * [...charge weapons...] + * + * MOD_INIT(phaser); + * } + * + * void phaser_cleanup(void) + * { + * MOD_CLEANUP(phaser); + * + * [...disarm phaser...] + * } + * \endcode + * + * \author Bernie Innocenti + */ +#ifndef CFG_MODULE_H +#define CFG_MODULE_H + +#include + +/** + * Declare a global variable for module dependency check. + * + * \see MOD_INIT(), MOD_CHECK() + */ +#define MOD_DEFINE(module) DB(extern bool module ## _initialized; bool module ## _initialized;) + +/** + * Check that \a module was already initialized. + * + * Put this check just before accessing any facility + * provided by a module that requires prior initialization. + * + * \see MOD_INIT() + */ + +#define MOD_CHECK(module) \ +do { \ + DB(extern bool module ## _initialized;) \ + ASSERT(module ## _initialized); \ +} while (0) + +/** + * Mark module as initialized. + * + * Marking initialization requires the global data + * previously defined by MOD_DEFINE(). + * + * To prevent double initialization bugs, an initialized + * module must first be cleaned up with MOD_CLEANUP() before + * calling MOD_INIT() another time. + * + * \see MOD_CLEANUP(), MOD_CHECK(), MOD_DEFINE() + */ +#define MOD_INIT(module) \ +do { \ + ASSERT(!module ## _initialized); \ + DB(module ## _initialized = true;) \ +} while (0) + +/** + * Mark module as being no longer initialized. + * + * Marking initialization requires the global data + * previously defined by MOD_DEFINE(). + * + * \see MOD_INIT(), MOD_CHECK(), MOD_DEFINE() + */ +#define MOD_CLEANUP(module) \ +do { \ + ASSERT(module ## _initialized); \ + DB(module ## _initialized = false;) \ +} while (0) + +#endif /* CFG_MODULE_H */ + diff --git a/bertos/cfg/os.h b/bertos/cfg/os.h new file mode 100644 index 0000000..36e11eb --- /dev/null +++ b/bertos/cfg/os.h @@ -0,0 +1,219 @@ +/** + * \file + * + * + * \brief OS-specific definitions + * + * \author Bernie Innocenti + */ + +#ifndef CFG_OS_H +#define CFG_OS_H + +#include "cfg/cfg_proc.h" + +/* + * OS autodetection (Some systems trigger multiple OS definitions) + */ +#ifdef _WIN32 + #define OS_WIN32 1 + #define OS_ID win32 + + // FIXME: Maybe disable Win32 exceptions? + typedef int cpu_flags_t; + #define IRQ_DISABLE FIXME + #define IRQ_ENABLE FIXME + #define IRQ_SAVE_DISABLE(old_sigs) FIXME + #define IRQ_RESTORE(old_sigs) FIXME + +#else + #define OS_WIN32 0 +#endif + +#if defined(__unix__) || (defined(__APPLE__) && defined(__MACH__)) + #define OS_UNIX 1 + #define OS_POSIX 1 /* Not strictly UNIX, but no way to autodetect it. */ + #define OS_ID posix + + /* + * The POSIX moral equivalent of disabling IRQs is disabling signals. + */ + #include + typedef sigset_t cpu_flags_t; + + #define SET_ALL_SIGNALS(sigs) \ + do { \ + sigfillset(&sigs); \ + sigdelset(&sigs, SIGINT); \ + sigdelset(&sigs, SIGSTOP); \ + sigdelset(&sigs, SIGCONT); \ + } while(0) + + #define IRQ_DISABLE \ + do { \ + sigset_t sigs; \ + SET_ALL_SIGNALS(sigs); \ + sigprocmask(SIG_BLOCK, &sigs, NULL); \ + } while (0) + + #define IRQ_ENABLE \ + do { \ + sigset_t sigs; \ + SET_ALL_SIGNALS(sigs); \ + sigprocmask(SIG_UNBLOCK, &sigs, NULL); \ + } while (0) + + #define IRQ_SAVE_DISABLE(old_sigs) \ + do { \ + sigset_t sigs; \ + SET_ALL_SIGNALS(sigs); \ + sigprocmask(SIG_BLOCK, &sigs, &old_sigs); \ + } while (0) + + #define IRQ_RESTORE(old_sigs) \ + do { \ + sigprocmask(SIG_SETMASK, &old_sigs, NULL); \ + } while (0) + + #define IRQ_ENABLED() \ + ({ \ + sigset_t sigs__; \ + sigprocmask(SIG_SETMASK, NULL, &sigs__); \ + sigismember(&sigs__, SIGALRM) ? false : true; \ + }) + + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + #define DECLARE_ISR_CONTEXT_SWITCH(vect) \ + void vect(UNUSED_ARG(int, arg)); \ + INLINE void __isr_##vect(void); \ + void vect(UNUSED_ARG(int, arg)) \ + { \ + __isr_##vect(); \ + IRQ_PREEMPT_HANDLER(); \ + } \ + INLINE void __isr_##vect(void) + /** + * With task priorities enabled each ISR is used a point to + * check if we need to perform a context switch. + * + * Instead, without priorities a context switch can occur only + * when the running task expires its time quantum. In this last + * case, the context switch can only occur in the timer ISR, + * that must be always declared with the + * DECLARE_ISR_CONTEXT_SWITCH() macro. + */ + #if CONFIG_KERN_PRI + #define DECLARE_ISR(vect) \ + DECLARE_ISR_CONTEXT_SWITCH(vect) + #endif /* CONFIG_KERN_PRI */ + #endif + #ifndef DECLARE_ISR + #define DECLARE_ISR(vect) \ + void vect(UNUSED_ARG(int, arg)) + #endif + #ifndef DECLARE_ISR_CONTEXT_SWITCH + #define DECLARE_ISR_CONTEXT_SWITCH(vect) \ + void vect(UNUSED_ARG(int, arg)) + #endif + +#else + #define OS_UNIX 0 + #define OS_POSIX 0 +#endif + +#ifdef __linux__ + #define OS_LINUX 1 +#else + #define OS_LINUX 0 +#endif + +#if defined(__APPLE__) && defined(__MACH__) + #define OS_DARWIN 1 +#else + #define OS_DARWIN 0 +#endif + + +#include "cfg/cfg_arch.h" /* For ARCH_QT */ + +/* + * We want Qt and other frameworks to look like OSes because you would + * tipically want their portable abstractions if you're using one of these. + */ +#if defined(_QT) || (defined(ARCH_QT) && (ARCH & ARCH_QT)) + #define OS_QT 1 + #undef OS_ID + #define OS_ID qt +#else + #define OS_QT 0 +#endif + +/* + * Summarize hosted environments as OS_HOSTED and embedded + * environment with OS_EMBEDDED. + */ +#if OS_WIN32 || OS_UNIX || OS_DARWIN || OS_QT + #define OS_HOSTED 1 + #define OS_EMBEDDED 0 +#else + #define OS_HOSTED 0 + #define OS_EMBEDDED 1 + + /* Embedded environments fall back to CPU-specific code. */ + #define OS_ID CPU_ID +#endif + +/* Self-check for the detection */ +#if !defined(OS_ID) + #error OS_ID not defined +#endif +#if OS_HOSTED && OS_EMBEDDED + #error Both hosted and embedded OS environment +#endif +#if !OS_HOSTED && !OS_EMBEDDED + #error Neither hosted nor embedded OS environment +#endif + +#if OS_HOSTED + + /// Macro to include OS-specific headers. + #define OS_HEADER(module) PP_STRINGIZE(emul/PP_CAT3(module, _, OS_ID).h) + + /// Macro to include OS-specific source files. + #define OS_CSOURCE(module) PP_STRINGIZE(emul/PP_CAT3(module, _, OS_ID).c) + +#else + // Fallbacks for embedded systems + #define OS_HEADER(module) CPU_HEADER(module) + #define OS_CSOURCE(module) CPU_CSOURCE(module) +#endif + +#endif /* CFG_OS_H */ diff --git a/bertos/cfg/test.h b/bertos/cfg/test.h new file mode 100644 index 0000000..6f700e1 --- /dev/null +++ b/bertos/cfg/test.h @@ -0,0 +1,117 @@ +/** + * \file + * + * + * \brief Utility for the test suite. + * + * + * \author Daniele Basile + * \author Francesco Sacchi + * + * When you want to test a module that is emulable on hosted + * platforms, these macros come in handy. + * Your module_test should supply three basic functions: + * + * \code + * int module_testSetup(void) + * int module_testRun(void) + * int module_testTearDown(void) + * \endcode + * + * All of these should return 0 if ok or a value != 0 on errors. + * + * Then, at the end of your module_test you can write: + * \code + * #if UNIT_TEST + * #include + * #include + * #include <...> + * + * TEST_MAIN(module); + * #endif + * \endcode + * + * Including directly into your module the file.c you need to + * run the test allows you to build and run the test compiling + * only one file. + * + * To achieve this you also need a main() that is supplied by + * the TEST_MAIN macro. + * This will expand to a full main that calls, in sequence: + * Setup, Run and TearDown of your module. + */ + +#ifndef CFG_TEST_H +#define CFG_TEST_H + +#include "cfg/cfg_arch.h" + +#if defined(ARCH_UNITTEST) && (ARCH & ARCH_UNITTEST) + #define UNIT_TEST 1 + + /** + * Macro used to generate a main() for a test to be compiled + * on hosted platform. + */ + #define TEST_MAIN(module) \ + int main(void) \ + { \ + if (module##_testSetup() != 0) \ + return 1; \ + if (module##_testRun() != 0) \ + return 2; \ + if (module##_testTearDown() != 0) \ + return 3; \ + return 0; \ + } +#else /* !TEST */ + #define UNIT_TEST 0 + + #define TEST_MAIN(module) /* nothing */ +#endif /* TEST */ + + +/** + * Silent an assert in a test. + * + * This is useful when we run a test and we want to test + * an error condition. We know that an assert will fail but + * this is not really an error. To ignore that we mark it + * with this macro, where str is the message string of the assert + * that we want to drop. + * To use this macro copy the assert log message and paste as argument + * of this macro. In assert message log is reported also the line number + * of the code that have generated the assert. + * In this way you can trap only the selected assert message. + */ +#define SILENT_ASSERT(str) kputs("SILENT_ASSERT:$"str"$\n") + +#endif /* CFG_TEST_H */ diff --git a/bertos/config.mk b/bertos/config.mk new file mode 100644 index 0000000..1c53640 --- /dev/null +++ b/bertos/config.mk @@ -0,0 +1,117 @@ +# +# $Id: config.mk 4643 2010-12-20 12:10:41Z lottaviano $ +# Copyright 2002,2003, 2004, 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Author: Bernie Innocenti +# Based on: GCC-AVR standard Makefile part 1, Volker Oth 1/2000 +# + +# +# Programmer type +# see local pgm_config.mk for programmer customization. + +OPTCFLAGS = -ffunction-sections -fdata-sections +#OPTCFLAGS = -funsafe-loop-optimizations + +# For AVRStudio +#DEBUGCFLAGS = -gdwarf-2 + +# For GDB +DEBUGCFLAGS = -ggdb + +# +# define some variables based on the AVR base path in $(AVR) +# +CC = gcc +CXX = g++ +AR = ar +AS = $(CC) -x assembler-with-cpp +LD = $(CC) +LDXX = $(CXX) +OBJCOPY = objcopy +STRIP = strip +INSTALL = cp -a +RM = rm -f +RM_R = rm -rf +RN = mv +MKDIR_P = mkdir -p +SHELL = /bin/sh +CHECKER = sparse +DOXYGEN = doxygen +AVRDUDE = avrdude +FLEXCAT = $(top_srcdir)/tools/flexcat/flexcat + +# For conversion from ELF to COFF for use in debugging / simulating in AVR Studio or VMLAB. +COFFCONVERT=$(OBJCOPY) \ + --debugging \ + --change-section-address .data-0x800000 \ + --change-section-address .bss-0x800000 \ + --change-section-address .noinit-0x800000 \ + --change-section-address .eeprom-0x810000 + +INCDIR = -I. -Ibertos -Ibertos/net/lwip/src/include -Ibertos/net/lwip/src/include/ipv4 +LIBDIR = lib +OBJDIR = obj +OUTDIR = images + +# output format can be srec, ihex (avrobj is always created) +FORMAT = srec +#FORMAT = ihex + +# Compiler flags for generating dependencies +DEP_FLAGS = -MMD -MP + +# Compiler flags for generating source listings +LIST_FLAGS = -Wa,-anhlmsd=$(@:.o=.lst) -dp + +# Linker flags for generating map files +# Only in embedded related projects generate map files +MAP_FLAGS_EMB = -Wl,-Map=$(@:%.elf=%.map),--cref +MAP_FLAGS_HOST = + +# Compiler warning flags for both C and C++ +WARNFLAGS = \ + -W -Wformat -Wall -Wundef -Wpointer-arith -Wcast-qual \ + -Wcast-align -Wwrite-strings -Wsign-compare \ + -Wmissing-noreturn \ + -Wextra -Wstrict-aliasing=2 \ +# -Wunsafe-loop-optimizations + +# Compiler warning flags for C only +C_WARNFLAGS = \ + -Wmissing-prototypes -Wstrict-prototypes + +C_COMPILER_STD = -std=gnu99 + +# Default C preprocessor flags (for C, C++ and cpp+as) +CPPFLAGS = $(INCDIR) + +# Default C compiler flags +CFLAGS = $(OPTCFLAGS) $(DEBUGCFLAGS) $(WARNFLAGS) $(C_WARNFLAGS) \ + $(DEP_FLAGS) $(LIST_FLAGS) $(C_COMPILER_STD) + +# Default C++ compiler flags +CXXFLAGS = $(OPTCFLAGS) $(DEBUGCFLAGS) $(WARNFLAGS) \ + $(DEP_FLAGS) $(LIST_FLAGS) + +# Default compiler assembly flags +CPPAFLAGS = $(DEBUGCFLAGS) -MMD + +# Default assembler flags +ASFLAGS = $(DEBUGCFLAGS) + +# Default linker flags +#LDFLAGS = $(MAP_FLAGS) + +#bernie: does not complain for missing symbols! +LDFLAGS = -Wl,--gc-sections + +# Flags for avrdude +AVRDUDEFLAGS = $(DPROG) + +# additional libs +LIB = -lm + +# Archiver flags +ARFLAGS = rcs diff --git a/bertos/cpu/arm/drv/adc_arm.c b/bertos/cpu/arm/drv/adc_arm.c new file mode 100644 index 0000000..3b7463d --- /dev/null +++ b/bertos/cpu/arm/drv/adc_arm.c @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Low-level ADC module for ARM (inplementation). + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + * + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use adc_at91.c + + #include + + #if CPU_ARM_AT91 + #include "adc_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ diff --git a/bertos/cpu/arm/drv/adc_arm.h b/bertos/cpu/arm/drv/adc_arm.h new file mode 100644 index 0000000..080b12f --- /dev/null +++ b/bertos/cpu/arm/drv/adc_arm.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Low-level ADC module for ARM (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "adc_at91.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/arm/drv/adc_at91.c b/bertos/cpu/arm/drv/adc_at91.c new file mode 100644 index 0000000..66d0bde --- /dev/null +++ b/bertos/cpu/arm/drv/adc_at91.c @@ -0,0 +1,210 @@ +/** + * \file + * + * + * \brief ADC hardware-specific implementation + * + * This ADC module should be use both whit kernel or none. + * If you are using a kernel, the adc drive does not wait the finish of + * conversion but use a singal every time a required conversion are + * ended. This signal wake up a process that return a result of + * conversion. Otherwise, if you not use a kernl, this module wait + * whit a loop the finishing of conversion. + * + * + * \author Daniele Basile + */ + + +#include "adc_at91.h" + +#include + +#include "cfg/cfg_adc.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" +#include +#include + +// Define log settings for cfg/log.h. +#define LOG_LEVEL ADC_LOG_LEVEL +#define LOG_FORMAT ADC_LOG_FORMAT +#include + +#include + +#include + +#if CONFIG_KERN + #include + #include + #include + + + #if !CONFIG_KERN_SIGNALS + #error Signals must be active to use ADC with kernel + #endif + + /* Signal adc convertion end */ + #define SIG_ADC_COMPLETE SIG_USER0 + + /* ADC waiting process */ + static struct Process *adc_process; + + /** + * ADC ISR. + * Simply signal the adc process that convertion is complete. + */ + static DECLARE_ISR(adc_conversion_end_irq) + { + sig_post(adc_process, SIG_ADC_COMPLETE); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + } + + static void adc_enable_irq(void) + { + + // Disable all interrupt + ADC_IDR = 0xFFFFFFFF; + + //Register interrupt vector + AIC_SVR(ADC_ID) = adc_conversion_end_irq; + AIC_SMR(ADC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED; + AIC_IECR = BV(ADC_ID); + + //Enable data ready irq + ADC_IER = BV(ADC_DRDY); + } + +#endif /* CONFIG_KERN */ + + +/** + * Select mux channel \a ch. + * \todo only first 8 channels are selectable! + */ +void adc_hw_select_ch(uint8_t ch) +{ + //Disable all channels + ADC_CHDR = ADC_CH_MASK; + //Enable select channel + ADC_CHER = BV(ch); +} + + +/** + * Start an ADC convertion. + * If a kernel is present, preempt until convertion is complete, otherwise + * a busy wait on ADC_DRDY bit is done. + */ +uint16_t adc_hw_read(void) +{ + #if CONFIG_KERN + /* Ensure ADC is not already in use by another process */ + ASSERT(adc_process == NULL); + adc_process = proc_current(); + #endif + + // Start convertion + ADC_CR = BV(ADC_START); + + #if CONFIG_KERN + // Ensure IRQs enabled. + IRQ_ASSERT_ENABLED(); + sig_wait(SIG_ADC_COMPLETE); + + /* Prevent race condition in case of preemptive kernel */ + uint16_t ret = ADC_LCDR; + MEMORY_BARRIER; + adc_process = NULL; + return ret; + #else + //Wait in polling until is done + while (!(ADC_SR & BV(ADC_DRDY))); + + //Return the last converted data + return(ADC_LCDR); + #endif +} + +/** + * Init ADC hardware. + */ +void adc_hw_init(void) +{ + //Init ADC pins. + ADC_INIT_PINS(); + + /* + * Set adc mode register: + * - Disable hardware trigger and enable software trigger. + * - Select normal mode. + * - Set ADC_BITS bit convertion resolution. + * + * \{ + */ + ADC_MR = 0; + #if ADC_BITS == 10 + ADC_MR &= ~BV(ADC_LOWRES); + #elif ADC_BITS == 8 + ADC_MR |= BV(ADC_LOWRES); + #else + #error No select bit resolution is supported to this CPU + #endif + /* \} */ + + LOG_INFO("Computed ADC_CLOCK %ld\n", ADC_COMPUTED_CLOCK); + LOG_INFO("prescaler[%ld], stup[%ld], shtim[%ld]\n",ADC_COMPUTED_PRESCALER, ADC_COMPUTED_STARTUPTIME, ADC_COMPUTED_SHTIME); + + + //Apply computed prescaler value + ADC_MR &= ~ADC_PRESCALER_MASK; + ADC_MR |= ((ADC_COMPUTED_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK); + LOG_INFO("prescaler[%ld]\n", (ADC_COMPUTED_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK); + + //Apply computed start up time + ADC_MR &= ~ADC_STARTUP_MASK; + ADC_MR |= ((ADC_COMPUTED_STARTUPTIME << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK); + LOG_INFO("sttime[%ld]\n", (ADC_COMPUTED_STARTUPTIME << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK); + + //Apply computed sample and hold time + ADC_MR &= ~ADC_SHTIME_MASK; + ADC_MR |= ((ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK); + LOG_INFO("shtime[%ld]\n", (ADC_COMPUTED_SHTIME << ADC_SHTIME_SHIFT) & ADC_SHTIME_MASK); + + #if CONFIG_KERN + //Register and enable irq for adc. + adc_enable_irq(); + #endif + +} diff --git a/bertos/cpu/arm/drv/adc_at91.h b/bertos/cpu/arm/drv/adc_at91.h new file mode 100644 index 0000000..5e70477 --- /dev/null +++ b/bertos/cpu/arm/drv/adc_at91.h @@ -0,0 +1,95 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Daniele Basile + */ + +#ifndef DRV_ADC_AT91_H +#define DRV_ADC_AT91_H + +#include + +#include "cfg/cfg_adc.h" + +#include + +/** + * ADC config define. + */ +#define ADC_MUX_MAXCH 8 //Max number of channel for ADC. +#define ADC_BITS 10 //Bit resolution for ADC converter. + +/** + * Macro for computing correct value to write into ADC + * register. + */ +#define ADC_COMPUTED_PRESCALER (DIV_ROUNDUP(CPU_FREQ, 2 * CONFIG_ADC_CLOCK) - 1) +#define ADC_COMPUTED_CLOCK (CPU_FREQ / ((ADC_COMPUTED_PRESCALER + 1) * 2)) +#define ADC_COMPUTED_STARTUPTIME (((CONFIG_ADC_STARTUP_TIME * ADC_COMPUTED_CLOCK) / 8000000UL) - 1) +#define ADC_COMPUTED_SHTIME ((uint32_t)((CONFIG_ADC_SHTIME * (uint64_t)ADC_COMPUTED_CLOCK) / 1000000000UL) - 1) + +/** + * Init pins macro for adc. + */ + +/** + * Define PIO controller for enable ADC function. + * \{ + */ +#if CPU_ARM_SAM7X + #define ADC_PIO_DISABLE PIOB_PDR + #define ADC_PIO_EN_FUNC PIOB_ASR + +#elif CPU_ARM_SAM7S_LARGE + #define ADC_PIO_DISABLE PIOA_PDR + #define ADC_PIO_EN_FUNC PIOA_BSR + +#else + #error No ADC pins name definitions for selected ARM CPU +#endif +/*\}*/ + +/** + * Init the ADC pins. + * Implement it if necessary. + */ +#define ADC_INIT_PINS() \ + do { \ + } while (0) + +void adc_hw_select_ch(uint8_t ch); +uint16_t adc_hw_read(void); +void adc_hw_init(void); + +#endif /* DRV_ADC_AT91_H */ diff --git a/bertos/cpu/arm/drv/eth_at91.c b/bertos/cpu/arm/drv/eth_at91.c new file mode 100644 index 0000000..4f19fca --- /dev/null +++ b/bertos/cpu/arm/drv/eth_at91.c @@ -0,0 +1,473 @@ +/** + * \file + * + * + * \brief EMAC driver for AT91SAM7X Family. + * + * \author Daniele Basile + * \author Andrea Righi + */ + +#include "cfg/cfg_eth.h" + +#define LOG_LEVEL ETH_LOG_LEVEL +#define LOG_FORMAT ETH_LOG_FORMAT + +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include +#include + +#include + +#include + +#include "eth_at91.h" + +#define EMAC_RX_INTS (BV(EMAC_RCOMP) | BV(EMAC_ROVR) | BV(EMAC_RXUBR)) +#define EMAC_TX_INTS (BV(EMAC_TCOMP) | BV(EMAC_TXUBR) | BV(EMAC_RLEX)) + +/* Silent Doxygen bug... */ +#ifndef __doxygen__ +/* + * NOTE: this buffer should be declared as 'volatile' because it is read by the + * hardware. However, this is accessed only via memcpy() that should guarantee + * coherency when copying from/to buffers. + */ +static uint8_t tx_buf[EMAC_TX_BUFFERS * EMAC_TX_BUFSIZ] ALIGNED(8); +static volatile BufDescriptor tx_buf_tab[EMAC_TX_DESCRIPTORS] ALIGNED(8); + +/* + * NOTE: this buffer should be declared as 'volatile' because it is wrote by + * the hardware. However, this is accessed only via memcpy() that should + * guarantee coherency when copying from/to buffers. + */ +static uint8_t rx_buf[EMAC_RX_BUFFERS * EMAC_RX_BUFSIZ] ALIGNED(8); +static volatile BufDescriptor rx_buf_tab[EMAC_RX_DESCRIPTORS] ALIGNED(8); +#endif + +static int tx_buf_idx; +static int tx_buf_offset; +static int rx_buf_idx; + +static Event recv_wait, send_wait; + +static DECLARE_ISR(emac_irqHandler) +{ + /* Read interrupt status and disable interrupts. */ + uint32_t isr = EMAC_ISR; + + /* Receiver interrupt */ + if ((isr & EMAC_RX_INTS)) + { + if (isr & BV(EMAC_RCOMP)) + event_do(&recv_wait); + EMAC_RSR = EMAC_RX_INTS; + } + /* Transmitter interrupt */ + if (isr & EMAC_TX_INTS) + { + if (isr & BV(EMAC_TCOMP)) + event_do(&send_wait); + EMAC_TSR = EMAC_TX_INTS; + } + AIC_EOICR = 0; +} + +/* + * \brief Read contents of PHY register. + * + * \param reg PHY register number. + * + * \return Contents of the specified register. + */ +static uint16_t phy_hw_read(reg8_t reg) +{ + // PHY read command. + EMAC_MAN = EMAC_SOF | EMAC_RW_READ | (NIC_PHY_ADDR << EMAC_PHYA_SHIFT) + | ((reg << EMAC_REGA_SHIFT) & EMAC_REGA) | EMAC_CODE; + + // Wait until PHY logic completed. + while (!(EMAC_NSR & BV(EMAC_IDLE))) + cpu_relax(); + + // Get data from PHY maintenance register. + return (uint16_t)(EMAC_MAN & EMAC_DATA); +} + +/* + * \brief Write value to PHY register. + * + * \param reg PHY register number. + * \param val Value to write. + */ +static void phy_hw_write(reg8_t reg, uint16_t val) +{ + // PHY write command. + EMAC_MAN = EMAC_SOF | EMAC_RW_WRITE | (NIC_PHY_ADDR << EMAC_PHYA_SHIFT) + | ((reg << EMAC_REGA_SHIFT) & EMAC_REGA) | EMAC_CODE | val; + + // Wait until PHY logic completed. + while (!(EMAC_NSR & BV(EMAC_IDLE))) + cpu_relax(); +} + +static int emac_reset(void) +{ + uint16_t phy_cr; + + // Enable devices + PMC_PCER = BV(PIOA_ID); + PMC_PCER = BV(PIOB_ID); + PMC_PCER = BV(EMAC_ID); + + // Disable RMII and TESTMODE by disabling pull-ups. + PIOB_PUDR = BV(PHY_COL_RMII_BIT) | BV(PHY_RXDV_TESTMODE_BIT); + + // Disable PHY power down. + PIOB_PER = BV(PHY_PWRDN_BIT); + PIOB_OER = BV(PHY_PWRDN_BIT); + PIOB_CODR = BV(PHY_PWRDN_BIT); + + // Toggle external hardware reset pin. + RSTC_MR = RSTC_KEY | (1 << RSTC_ERSTL_SHIFT) | BV(RSTC_URSTEN); + RSTC_CR = RSTC_KEY | BV(RSTC_EXTRST); + + while ((RSTC_SR & BV(RSTC_NRSTL)) == 0) + cpu_relax(); + + // Configure MII port. + PIOB_ASR = PHY_MII_PINS; + PIOB_BSR = 0; + PIOB_PDR = PHY_MII_PINS; + + // Enable receive and transmit clocks. + EMAC_USRIO = BV(EMAC_CLKEN); + + // Enable management port. + EMAC_NCR |= BV(EMAC_MPE); + EMAC_NCFGR |= EMAC_CLK_HCLK_32; + + // Set local MAC address. + EMAC_SA1L = (mac_addr[3] << 24) | (mac_addr[2] << 16) | + (mac_addr[1] << 8) | mac_addr[0]; + EMAC_SA1H = (mac_addr[5] << 8) | mac_addr[4]; + + // Wait for PHY ready + timer_delay(255); + + // Clear MII isolate. + phy_hw_read(NIC_PHY_BMCR); + phy_cr = phy_hw_read(NIC_PHY_BMCR); + + phy_cr &= ~NIC_PHY_BMCR_ISOLATE; + phy_hw_write(NIC_PHY_BMCR, phy_cr); + + phy_cr = phy_hw_read(NIC_PHY_BMCR); + + LOG_INFO("%s: PHY ID %#04x %#04x\n", + __func__, + phy_hw_read(NIC_PHY_ID1), phy_hw_read(NIC_PHY_ID2)); + + // Wait for auto negotiation completed. + phy_hw_read(NIC_PHY_BMSR); + for (;;) + { + if (phy_hw_read(NIC_PHY_BMSR) & NIC_PHY_BMSR_ANCOMPL) + break; + cpu_relax(); + } + + // Disable management port. + EMAC_NCR &= ~BV(EMAC_MPE); + + return 0; +} + +static int emac_start(void) +{ + uint32_t addr; + int i; + + for (i = 0; i < EMAC_RX_DESCRIPTORS; i++) + { + addr = (uint32_t)(rx_buf + (i * EMAC_RX_BUFSIZ)); + rx_buf_tab[i].addr = addr & BUF_ADDRMASK; + } + rx_buf_tab[EMAC_RX_DESCRIPTORS - 1].addr |= RXBUF_WRAP; + + for (i = 0; i < EMAC_TX_DESCRIPTORS; i++) + { + addr = (uint32_t)(tx_buf + (i * EMAC_TX_BUFSIZ)); + tx_buf_tab[i].addr = addr & BUF_ADDRMASK; + tx_buf_tab[i].stat = TXS_USED; + } + tx_buf_tab[EMAC_TX_DESCRIPTORS - 1].stat = TXS_USED | TXS_WRAP; + + /* Tell the EMAC where to find the descriptors. */ + EMAC_RBQP = (uint32_t)rx_buf_tab; + EMAC_TBQP = (uint32_t)tx_buf_tab; + + /* Clear receiver status. */ + EMAC_RSR = BV(EMAC_OVR) | BV(EMAC_REC) | BV(EMAC_BNA); + + /* Copy all frames and discard FCS. */ + EMAC_NCFGR |= BV(EMAC_CAF) | BV(EMAC_DRFCS); + + /* Enable receiver, transmitter and statistics. */ + EMAC_NCR |= BV(EMAC_TE) | BV(EMAC_RE) | BV(EMAC_WESTAT); + + return 0; +} + +ssize_t eth_putFrame(const uint8_t *buf, size_t len) +{ + size_t wr_len; + + if (UNLIKELY(!len)) + return -1; + ASSERT(len <= sizeof(tx_buf)); + + /* Check if the transmit buffer is available */ + while (!(tx_buf_tab[tx_buf_idx].stat & TXS_USED)) + event_wait(&send_wait); + + /* Copy the data into the buffer and prepare descriptor */ + wr_len = MIN(len, (size_t)EMAC_TX_BUFSIZ - tx_buf_offset); + memcpy((uint8_t *)tx_buf_tab[tx_buf_idx].addr + tx_buf_offset, + buf, wr_len); + tx_buf_offset += wr_len; + + return wr_len; +} + +void eth_sendFrame(void) +{ + tx_buf_tab[tx_buf_idx].stat = (tx_buf_offset & TXS_LENGTH_FRAME) | + TXS_LAST_BUFF | + ((tx_buf_idx == EMAC_TX_DESCRIPTORS - 1) ? TXS_WRAP : 0); + EMAC_NCR |= BV(EMAC_TSTART); + + tx_buf_offset = 0; + if (++tx_buf_idx >= EMAC_TX_DESCRIPTORS) + tx_buf_idx = 0; +} + +ssize_t eth_send(const uint8_t *buf, size_t len) + { + if (UNLIKELY(!len)) + return -1; + + len = eth_putFrame(buf, len); + eth_sendFrame(); + + return len; +} + +static void eth_buf_realign(int idx) +{ + /* Empty buffer found. Realign. */ + do { + rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP; + if (++rx_buf_idx >= EMAC_RX_BUFFERS) + rx_buf_idx = 0; + } while (idx != rx_buf_idx); +} + +static size_t __eth_getFrameLen(void) +{ + int idx, n = EMAC_RX_BUFFERS; + +skip: + /* Skip empty buffers */ + while ((n > 0) && !(rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP)) + { + if (++rx_buf_idx >= EMAC_RX_BUFFERS) + rx_buf_idx = 0; + n--; + } + if (UNLIKELY(!n)) + { + LOG_INFO("no frame found\n"); + return 0; + } + /* Search the start of frame and cleanup fragments */ + while ((n > 0) && (rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP) && + !(rx_buf_tab[rx_buf_idx].stat & RXS_SOF)) + { + rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP; + if (++rx_buf_idx >= EMAC_RX_BUFFERS) + rx_buf_idx = 0; + n--; + } + if (UNLIKELY(!n)) + { + LOG_INFO("no SOF found\n"); + return 0; + } + /* Search end of frame to evaluate the total frame size */ + idx = rx_buf_idx; +restart: + while (n > 0) + { + if (UNLIKELY(!(rx_buf_tab[idx].addr & RXBUF_OWNERSHIP))) + { + /* Empty buffer found. Realign. */ + eth_buf_realign(idx); + goto skip; + } + if (rx_buf_tab[idx].stat & RXS_EOF) + return rx_buf_tab[idx].stat & RXS_LENGTH_FRAME; + if (UNLIKELY((idx != rx_buf_idx) && + (rx_buf_tab[idx].stat & RXS_SOF))) + { + /* Another start of frame found. Realign. */ + eth_buf_realign(idx); + goto restart; + } + if (++idx >= EMAC_RX_BUFFERS) + idx = 0; + n--; + } + LOG_INFO("no EOF found\n"); + return 0; +} + +size_t eth_getFrameLen(void) +{ + size_t len; + + /* Check if there is at least one available frame in the buffer */ + while (1) + { + len = __eth_getFrameLen(); + if (LIKELY(len)) + break; + /* Wait for RX interrupt */ + event_wait(&recv_wait); + } + return len; +} + +ssize_t eth_getFrame(uint8_t *buf, size_t len) +{ + uint8_t *addr; + size_t rd_len = 0; + + if (UNLIKELY(!len)) + return -1; + ASSERT(len <= sizeof(rx_buf)); + + /* Copy data from the RX buffer */ + addr = (uint8_t *)(rx_buf_tab[rx_buf_idx].addr & BUF_ADDRMASK); + if (addr + len > &rx_buf[countof(rx_buf)]) + { + size_t count = &rx_buf[countof(rx_buf)] - addr; + + memcpy(buf, addr, count); + memcpy(buf + count, rx_buf, len - count); + } + else + { + memcpy(buf, addr, len); + } + /* Update descriptors */ + while (rd_len < len) + { + if (len - rd_len >= EMAC_RX_BUFSIZ) + rd_len += EMAC_RX_BUFSIZ; + else + rd_len += len - rd_len; + if (UNLIKELY(!(rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP))) + { + LOG_INFO("bad frame found\n"); + return 0; + } + rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP; + if (++rx_buf_idx >= EMAC_RX_DESCRIPTORS) + rx_buf_idx = 0; + } + + return rd_len; +} + +ssize_t eth_recv(uint8_t *buf, size_t len) +{ + if (UNLIKELY(!len)) + return -1; + len = MIN(len, eth_getFrameLen()); + return len ? eth_getFrame(buf, len) : 0; +} + +int eth_init() +{ + cpu_flags_t flags; + + emac_reset(); + emac_start(); + + event_initGeneric(&recv_wait); + event_initGeneric(&send_wait); + + // Register interrupt vector + IRQ_SAVE_DISABLE(flags); + + /* Disable all emac interrupts */ + EMAC_IDR = 0xFFFFFFFF; + + /* Set the vector. */ + AIC_SVR(EMAC_ID) = emac_irqHandler; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(EMAC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED; + /* Clear pending interrupt */ + AIC_ICCR = BV(EMAC_ID); + /* Enable the system IRQ */ + AIC_IECR = BV(EMAC_ID); + + /* Enable interrupts */ + EMAC_IER = EMAC_RX_INTS | EMAC_TX_INTS; + + IRQ_RESTORE(flags); + + return 0; +} diff --git a/bertos/cpu/arm/drv/eth_at91.h b/bertos/cpu/arm/drv/eth_at91.h new file mode 100644 index 0000000..41fb4dc --- /dev/null +++ b/bertos/cpu/arm/drv/eth_at91.h @@ -0,0 +1,165 @@ +/** + * \file + * + * + * \brief EMAC driver for AT91SAM7X Family, interface. + * + * \author Daniele Basile + * \author Andrea Righi + */ + +#ifndef ETH_AT91_H +#define ETH_AT91_H + +// Settings and definition for DAVICOM 9161A +// \{ +#define NIC_PHY_ADDR 31 + +//Registry definition +#define NIC_PHY_BMCR 0x00 // Basic mode control register. +#define NIC_PHY_BMCR_COLTEST 0x0080 // Collision test. +#define NIC_PHY_BMCR_FDUPLEX 0x0100 // Full duplex mode. +#define NIC_PHY_BMCR_ANEGSTART 0x0200 // Restart auto negotiation. +#define NIC_PHY_BMCR_ISOLATE 0x0400 // Isolate from MII. +#define NIC_PHY_BMCR_PWRDN 0x0800 // Power-down. +#define NIC_PHY_BMCR_ANEGENA 0x1000 // Enable auto negotiation. +#define NIC_PHY_BMCR_100MBPS 0x2000 // Select 100 Mbps. +#define NIC_PHY_BMCR_LOOPBACK 0x4000 // Enable loopback mode. +#define NIC_PHY_BMCR_RESET 0x8000 // Software reset. + +#define NIC_PHY_BMSR 0x01 // Basic mode status register. +#define NIC_PHY_BMSR_ANCOMPL 0x0020 // Auto negotiation complete. +#define NIC_PHY_BMSR_ANEGCAPABLE 0x0008 // Able to do auto-negotiation +#define NIC_PHY_BMSR_LINKSTAT 0x0004 // Link status. + +#define NIC_PHY_ID1 0x02 // PHY identifier register 1. +#define NIC_PHY_ID2 0x03 // PHY identifier register 2. +#define NIC_PHY_ANAR 0x04 // Auto negotiation advertisement register. +#define NIC_PHY_ANLPAR 0x05 // Auto negotiation link partner availability register. +#define NIC_PHY_ANER 0x06 // Auto negotiation expansion register. + +// Pin definition for DAVICOM 9161A +// See schematic for at91sam7x-ek evalution board +#define PHY_TXCLK_ISOLATE_BIT 0 +#define PHY_REFCLK_XT2_BIT 0 +#define PHY_TXEN_BIT 1 +#define PHY_TXD0_BIT 2 +#define PHY_TXD1_BIT 3 +#define PHY_CRS_AD4_BIT 4 +#define PHY_RXD0_AD0_BIT 5 +#define PHY_RXD1_AD1_BIT 6 +#define PHY_RXER_RXD4_RPTR_BIT 7 +#define PHY_MDC_BIT 8 +#define PHY_MDIO_BIT 9 +#define PHY_TXD2_BIT 10 +#define PHY_TXD3_BIT 11 +#define PHY_TXER_TXD4_BIT 12 +#define PHY_RXD2_AD2_BIT 13 +#define PHY_RXD3_AD3_BIT 14 +#define PHY_RXDV_TESTMODE_BIT 15 +#define PHY_COL_RMII_BIT 16 +#define PHY_RXCLK_10BTSER_BIT 17 +#define PHY_PWRDN_BIT 18 +#define PHY_MDINTR_BIT 26 + +#define PHY_MII_PINS BV(PHY_REFCLK_XT2_BIT) \ + | BV(PHY_TXEN_BIT) \ + | BV(PHY_TXD0_BIT) \ + | BV(PHY_TXD1_BIT) \ + | BV(PHY_CRS_AD4_BIT) \ + | BV(PHY_RXD0_AD0_BIT) \ + | BV(PHY_RXD1_AD1_BIT) \ + | BV(PHY_RXER_RXD4_RPTR_BIT) \ + | BV(PHY_MDC_BIT) \ + | BV(PHY_MDIO_BIT) \ + | BV(PHY_TXD2_BIT) \ + | BV(PHY_TXD3_BIT) \ + | BV(PHY_TXER_TXD4_BIT) \ + | BV(PHY_RXD2_AD2_BIT) \ + | BV(PHY_RXD3_AD3_BIT) \ + | BV(PHY_RXDV_TESTMODE_BIT) \ + | BV(PHY_COL_RMII_BIT) \ + | BV(PHY_RXCLK_10BTSER_BIT) +// \} + +#define EMAC_TX_BUFSIZ 1518 //!!! Don't change this +#define EMAC_TX_BUFFERS 1 //!!! Don't change this +#define EMAC_TX_DESCRIPTORS EMAC_TX_BUFFERS + +#define EMAC_RX_BUFFERS 32 //!!! Don't change this +#define EMAC_RX_BUFSIZ 128 //!!! Don't change this +#define EMAC_RX_DESCRIPTORS EMAC_RX_BUFFERS + +// Flag to manage local tx buffer +#define TXS_USED 0x80000000 //Used buffer. +#define TXS_WRAP 0x40000000 //Last descriptor. +#define TXS_ERROR 0x20000000 //Retry limit exceeded. +#define TXS_UNDERRUN 0x10000000 //Transmit underrun. +#define TXS_NO_BUFFER 0x08000000 //Buffer exhausted. +#define TXS_NO_CRC 0x00010000 //CRC not appended. +#define TXS_LAST_BUFF 0x00008000 //Last buffer of frame. +#define TXS_LENGTH_FRAME 0x000007FF // Length of frame including FCS. + +// Flag to manage local rx buffer +#define RXBUF_OWNERSHIP 0x00000001 +#define RXBUF_WRAP 0x00000002 + +#define BUF_ADDRMASK 0xFFFFFFFC + +#define RXS_BROADCAST_ADDR 0x80000000 // Broadcast address detected. +#define RXS_MULTICAST_HASH 0x40000000 // Multicast hash match. +#define RXS_UNICAST_HASH 0x20000000 // Unicast hash match. +#define RXS_EXTERNAL_ADDR 0x10000000 // External address match. +#define RXS_SA1_ADDR 0x04000000 // Specific address register 1 match. +#define RXS_SA2_ADDR 0x02000000 // Specific address register 2 match. +#define RXS_SA3_ADDR 0x01000000 // Specific address register 3 match. +#define RXS_SA4_ADDR 0x00800000 // Specific address register 4 match. +#define RXS_TYPE_ID 0x00400000 // Type ID match. +#define RXS_VLAN_TAG 0x00200000 // VLAN tag detected. +#define RXS_PRIORITY_TAG 0x00100000 // Priority tag detected. +#define RXS_VLAN_PRIORITY 0x000E0000 // VLAN priority. +#define RXS_CFI_IND 0x00010000 // Concatenation format indicator. +#define RXS_EOF 0x00008000 // End of frame. +#define RXS_SOF 0x00004000 // Start of frame. +#define RXS_RBF_OFFSET 0x00003000 // Receive buffer offset mask. +#define RXS_LENGTH_FRAME 0x000007FF // Length of frame including FCS. + +#define EMAC_RSR_BITS (BV(EMAC_BNA) | BV(EMAC_REC) | BV(EMAC_OVR)) +#define EMAC_TSR_BITS (BV(EMAC_UBR) | BV(EMAC_COL) | BV(EMAC_RLES) | \ + BV(EMAC_BEX) | BV(EMAC_COMP) | BV(EMAC_UND)) + +typedef struct BufDescriptor +{ + volatile uint32_t addr; + volatile uint32_t stat; +} BufDescriptor; + +#endif /* ETH_AT91_H */ diff --git a/bertos/cpu/arm/drv/flash_arm.h b/bertos/cpu/arm/drv/flash_arm.h new file mode 100644 index 0000000..cd3e085 --- /dev/null +++ b/bertos/cpu/arm/drv/flash_arm.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Low-level flash module for ARM (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "flash_at91.h" +#elif CPU_ARM_LPC2 + #include "flash_lpc2.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/arm/drv/flash_at91.c b/bertos/cpu/arm/drv/flash_at91.c new file mode 100644 index 0000000..514d54e --- /dev/null +++ b/bertos/cpu/arm/drv/flash_at91.c @@ -0,0 +1,241 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief At91sam7 Internal flash read/write driver. + * + * + */ + +#include "flash_at91.h" + +#include "cfg/cfg_emb_flash.h" +#include + +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_FLASH_EMB_LOG_LEVEL +#define LOG_FORMAT CONFIG_FLASH_EMB_LOG_FORMAT +#include + +#include +#include +#include + +#include +#include +#include + +#include +#include + +#include + +struct FlashHardware +{ + uint8_t status; +}; + + +/** + * Really send the flash write command. + * + * \note This function has to be placed in RAM because + * executing code from flash while a writing process + * is in progress is forbidden. + */ +RAM_FUNC NOINLINE static void write_page(uint32_t page) +{ + // Send the 'write page' command + MC_FCR = MC_KEY | MC_FCMD_WP | (MC_PAGEN_MASK & (page << 8)); + + // Wait for the end of command + while(!(MC_FSR & BV(MC_FRDY))) + { + //NOP; + } +} + + +/** + * Send write command. + * + * After WR command cpu write bufferd page into flash memory. + * + */ +INLINE void flash_sendWRcmd(uint32_t page) +{ + cpu_flags_t flags; + + LOG_INFO("Writing page %ld...\n", page); + + IRQ_SAVE_DISABLE(flags); + write_page(page); + + IRQ_RESTORE(flags); + LOG_INFO("Done\n"); +} + +/** + * Return true if no error are occurred after flash memory + * read or write operation, otherwise return error code. + */ +static bool flash_getStatus(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + /* + * This bit is set to one if an invalid command and/or a bad keywords was/were + * written in the Flash Command Register. + */ + if(MC_FSR & BV(MC_PROGE)) + { + fls->hw->status |= FLASH_WR_ERR; + LOG_ERR("flash not erased..\n"); + return false; + } + + /* + * This bit is set to one if we programming of at least one locked lock + * region. + */ + if(MC_FSR & BV(MC_LOCKE)) + { + fls->hw->status |= FLASH_WR_PROTECT; + LOG_ERR("wr protect..\n"); + return false; + } + + return true; +} + +static size_t at91_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size) +{ + memcpy(buf, (void *)(idx * blk->blk_size + FLASH_BASE + offset), size); + return size; +} + +static size_t at91_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size) +{ + ASSERT(offset == 0); + ASSERT(size == blk->blk_size); + + uint32_t *addr = (uint32_t *)(idx * blk->blk_size + FLASH_BASE); + const uint8_t *buf = (const uint8_t *)_buf; + + while (size) + { + uint32_t data = (*(buf + 3) << 24) | + (*(buf + 2) << 16) | + (*(buf + 1) << 8) | + *buf; + *addr = data; + + size -= 4; + buf += 4; + addr++; + } + + flash_sendWRcmd(idx); + + if (!flash_getStatus(blk)) + return 0; + + return blk->blk_size; +} + + +static int at91_flash_error(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + return fls->hw->status; +} + +static void at91_flash_clearerror(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + fls->hw->status = 0; +} + +static const KBlockVTable flash_at91_buffered_vt = +{ + .readDirect = at91_flash_readDirect, + .writeDirect = at91_flash_writeDirect, + + .readBuf = kblock_swReadBuf, + .writeBuf = kblock_swWriteBuf, + .load = kblock_swLoad, + .store = kblock_swStore, + + .error = at91_flash_error, + .clearerr = at91_flash_clearerror, +}; + +static const KBlockVTable flash_at91_unbuffered_vt = +{ + .readDirect = at91_flash_readDirect, + .writeDirect = at91_flash_writeDirect, + + .error = at91_flash_error, + .clearerr = at91_flash_clearerror, +}; + +static struct FlashHardware flash_at91_hw; +static uint8_t flash_buf[FLASH_PAGE_SIZE_BYTES]; + +static void common_init(Flash *fls) +{ + memset(fls, 0, sizeof(*fls)); + DB(fls->blk.priv.type = KBT_FLASH); + + fls->hw = &flash_at91_hw; + + fls->blk.blk_size = FLASH_PAGE_SIZE_BYTES; + fls->blk.blk_cnt = FLASH_MEM_SIZE / FLASH_PAGE_SIZE_BYTES; +} + +void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags)) +{ + common_init(fls); + fls->blk.priv.vt = &flash_at91_buffered_vt; + fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE; + fls->blk.priv.buf = flash_buf; + + /* Load the first block in the cache */ + memcpy(fls->blk.priv.buf, (void *)(FLASH_BASE), fls->blk.blk_size); +} + +void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags)) +{ + common_init(fls); + fls->blk.priv.vt = &flash_at91_unbuffered_vt; +} + diff --git a/bertos/cpu/arm/drv/flash_at91.h b/bertos/cpu/arm/drv/flash_at91.h new file mode 100644 index 0000000..a706e5e --- /dev/null +++ b/bertos/cpu/arm/drv/flash_at91.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief At91sam7 Internal flash read/write driver. + * + * + */ + +#ifndef FLASH_AT91_H +#define FLASH_AT91_H + +#include "cfg/cfg_emb_flash.h" + +#if !CONFIG_FLASH_DISABLE_OLD_API + + /* For backwards compatibility */ + #define FlashAt91 Flash + #define flash_at91_init(fls) flash_init(fls); +#endif /* !CONFIG_FLASH_DISABLE_OLD_API */ + +#endif /* DRV_FLASH_ARM_H */ diff --git a/bertos/cpu/arm/drv/flash_lpc2.c b/bertos/cpu/arm/drv/flash_lpc2.c new file mode 100644 index 0000000..e1a3391 --- /dev/null +++ b/bertos/cpu/arm/drv/flash_lpc2.c @@ -0,0 +1,365 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * \brief NPX lpc23xx embedded flash read/write driver. + * + * notest:arm + */ + +#include "flash_lpc2.h" +#include "cfg/cfg_emb_flash.h" + +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_FLASH_EMB_LOG_LEVEL +#define LOG_FORMAT CONFIG_FLASH_EMB_LOG_FORMAT +#include +#include + +#include +#include +#include +#include + +#include +#include + +#include +#include + +#include + +#include + +/* Embedded flash programming defines. */ +#define IAP_ADDRESS 0x7ffffff1 + +typedef enum IapCommands +{ + PREPARE_SECTOR_FOR_WRITE = 50, + COPY_RAM_TO_FLASH = 51, + ERASE_SECTOR = 52, + BLANK_CHECK_SECTOR = 53, + READ_PART_ID = 54, + READ_BOOT_VER = 55, + COMPARE = 56, + REINVOKE_ISP = 57, +} IapCommands; + +#if CPU_ARM_LPC2378 + #define FLASH_MEM_SIZE (504 * 1024L) + #define FLASH_PAGE_SIZE_BYTES 4096 + #define FLASH_REAL_PAGE_CNT 28 +#else + #error Unknown CPU +#endif + +#define CMD_SUCCESS 0 + +struct FlashHardware +{ + uint8_t status; + int flags; +}; + +#define FLASH_PAGE_CNT FLASH_MEM_SIZE / FLASH_PAGE_SIZE_BYTES + +BITARRAY_ALLOC(page_dirty, FLASH_PAGE_CNT); +static BitArray lpc2_bitx; + +uint8_t erase_group[] = { + + 4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES, + 4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES, + + 4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES, + 4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES, + + 32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES, + 32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES, + + 32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES, + 32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES, + + 32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES, + 32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES, + + 32768 / FLASH_PAGE_SIZE_BYTES, 32768 / FLASH_PAGE_SIZE_BYTES, + 4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES, + + 4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES, + 4096 / FLASH_PAGE_SIZE_BYTES, 4096 / FLASH_PAGE_SIZE_BYTES, +}; + +typedef struct IapCmd +{ + uint32_t cmd; + uint32_t param[4]; +} IapCmd; + +typedef struct IapRes +{ + uint32_t status; + uint32_t res[2]; +} IapRes; + +typedef void (*iap_callback_t)(IapCmd *, IapRes *); + +iap_callback_t iap = (iap_callback_t)IAP_ADDRESS; + +static size_t sector_size(uint32_t page) +{ + if (page < 8) + return 4096; + else if (page < 22) + return 32768; + else if (page < 28) + return 4096; + + ASSERT(0); + return 0; +} + +static size_t sector_addr(uint32_t page) +{ + if (page < 8) + return page * 4096; + else if (page < 22) + return (page - 8) * 32768 + 4096 * 8; + else if (page < 28) + return (page - 22) * 4096 + 32768 * 14 + 4096 * 8; + + ASSERT(0); + return 0; +} + + +static uint32_t addr_to_sector(size_t addr) +{ + if (addr < 4096 * 8) + return addr / 4096; + else if (addr < 4096 * 8 + 32768L * 14) + return ((addr - 4096 * 8) / 32768) + 8; + else if (addr < 4096 * 8 + 32768L * 14 + 4096 * 6) + return ((addr - 4096 * 8 - 32768L * 14) / 4096) + 22; + + ASSERT(0); + return 0; +} + +static size_t lpc2_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size) +{ + memcpy(buf, (void *)(idx * blk->blk_size + offset), size); + return size; +} + +static size_t lpc2_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size) +{ + ASSERT(offset == 0); + ASSERT(FLASH_PAGE_SIZE_BYTES == size); + + Flash *fls = FLASH_CAST(blk); + if (!(fls->hw->flags & FLASH_WRITE_ONCE)) + ASSERT(sector_size(idx) <= FLASH_PAGE_SIZE_BYTES); + + const uint8_t *buf = (const uint8_t *)_buf; + cpu_flags_t flags; + + //Compute page address of current page. + uint32_t addr = idx * blk->blk_size; + uint32_t sector = addr_to_sector(addr); + // Compute the first page index in the sector to manage the status + int idx_sector = sector_addr(sector) / blk->blk_size; + + LOG_INFO("Writing page[%ld]sector[%ld]idx[%d]\n", idx, sector, idx_sector); + IRQ_SAVE_DISABLE(flags); + + IapCmd cmd; + IapRes res; + cmd.cmd = PREPARE_SECTOR_FOR_WRITE; + cmd.param[0] = cmd.param[1] = sector; + iap(&cmd, &res); + + if (res.status != CMD_SUCCESS) + goto flash_error; + + if ((fls->hw->flags & FLASH_WRITE_ONCE) && + bitarray_isRangeFull(&lpc2_bitx, idx_sector, erase_group[sector])) + { + kputs("blocchi pieni\n"); + ASSERT(0); + goto flash_error; + } + + bool erase = false; + if ((fls->hw->flags & FLASH_WRITE_ONCE) && + bitarray_isRangeEmpty(&lpc2_bitx, idx_sector, erase_group[sector])) + erase = true; + + if (!(fls->hw->flags & FLASH_WRITE_ONCE)) + erase = true; + + if (erase) + { + cmd.cmd = ERASE_SECTOR; + cmd.param[0] = cmd.param[1] = sector; + cmd.param[2] = CPU_FREQ / 1000; + iap(&cmd, &res); + + if (res.status != CMD_SUCCESS) + goto flash_error; + } + + LOG_INFO("Writing page [%ld], addr [%ld] in sector[%ld]\n", idx, addr, sector); + cmd.cmd = PREPARE_SECTOR_FOR_WRITE; + cmd.param[0] = cmd.param[1] = sector; + iap(&cmd, &res); + + if (res.status != CMD_SUCCESS) + goto flash_error; + + if (fls->hw->flags & FLASH_WRITE_ONCE) + { + if (bitarray_test(&lpc2_bitx, idx)) + { + ASSERT(0); + goto flash_error; + } + else + bitarray_set(&lpc2_bitx, idx); + } + + cmd.cmd = COPY_RAM_TO_FLASH; + cmd.param[0] = addr; + cmd.param[1] = (uint32_t)buf; + cmd.param[2] = FLASH_PAGE_SIZE_BYTES; + cmd.param[3] = CPU_FREQ / 1000; + iap(&cmd, &res); + + if (res.status != CMD_SUCCESS) + goto flash_error; + + IRQ_RESTORE(flags); + LOG_INFO("Done\n"); + + return blk->blk_size; + +flash_error: + IRQ_RESTORE(flags); + LOG_ERR("%ld\n", res.status); + fls->hw->status |= FLASH_WR_ERR; + return 0; +} + +static int lpc2_flash_close(UNUSED_ARG(struct KBlock, *blk)) +{ + memset(page_dirty, 0, sizeof(page_dirty)); + return 0; +} + + +static int lpc2_flash_error(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + return fls->hw->status; +} + +static void lpc2_flash_clearerror(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + fls->hw->status = 0; +} + +static const KBlockVTable flash_lpc2_buffered_vt = +{ + .readDirect = lpc2_flash_readDirect, + .writeDirect = lpc2_flash_writeDirect, + + .readBuf = kblock_swReadBuf, + .writeBuf = kblock_swWriteBuf, + .load = kblock_swLoad, + .store = kblock_swStore, + + .close = lpc2_flash_close, + + .error = lpc2_flash_error, + .clearerr = lpc2_flash_clearerror, +}; + +static const KBlockVTable flash_lpc2_unbuffered_vt = +{ + .readDirect = lpc2_flash_readDirect, + .writeDirect = lpc2_flash_writeDirect, + + .close = lpc2_flash_close, + + .error = lpc2_flash_error, + .clearerr = lpc2_flash_clearerror, +}; + +static struct FlashHardware flash_lpc2_hw; +static uint8_t flash_buf[FLASH_PAGE_SIZE_BYTES]; + +static void common_init(Flash *fls, int flags) +{ + memset(fls, 0, sizeof(*fls)); + DB(fls->blk.priv.type = KBT_FLASH); + + fls->hw = &flash_lpc2_hw; + fls->hw->flags = flags; + + fls->blk.blk_size = FLASH_PAGE_SIZE_BYTES; + fls->blk.blk_cnt = FLASH_MEM_SIZE / FLASH_PAGE_SIZE_BYTES; + + bitarray_init(&lpc2_bitx, FLASH_PAGE_CNT, page_dirty, sizeof(page_dirty)); +} + +void flash_hw_init(Flash *fls, int flags) +{ + common_init(fls, flags); + fls->blk.priv.vt = &flash_lpc2_buffered_vt; + fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE; + fls->blk.priv.buf = flash_buf; + + + /* Load the first block in the cache */ + void *flash_start = 0x0; + memcpy(fls->blk.priv.buf, flash_start, fls->blk.blk_size); +} + +void flash_hw_initUnbuffered(Flash *fls, int flags) +{ + common_init(fls, flags); + fls->blk.priv.vt = &flash_lpc2_unbuffered_vt; +} diff --git a/bertos/cpu/arm/drv/flash_lpc2.h b/bertos/cpu/arm/drv/flash_lpc2.h new file mode 100644 index 0000000..34eab97 --- /dev/null +++ b/bertos/cpu/arm/drv/flash_lpc2.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief NPX lpc23xx embedded flash read/write driver. + * + * + */ + +#ifndef FLASH_LPC2_H +#define FLASH_LPC2_H + + +#endif /* DRV_FLASH_ARM_H */ diff --git a/bertos/cpu/arm/drv/i2c_arm.h b/bertos/cpu/arm/drv/i2c_arm.h new file mode 100644 index 0000000..9bdc054 --- /dev/null +++ b/bertos/cpu/arm/drv/i2c_arm.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Low-level I2C module for ARM (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "i2c_at91.h" +#elif CPU_ARM_LPC2378 + #include "i2c_lpc2.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/arm/drv/i2c_at91.h b/bertos/cpu/arm/drv/i2c_at91.h new file mode 100644 index 0000000..88b5ab5 --- /dev/null +++ b/bertos/cpu/arm/drv/i2c_at91.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Driver for the AT91SAM7X I2C (interface) + * + * \author Daniele Basile + * + */ + +#ifndef I2C_AT91_H +#define I2C_AT91_H + +#include + +/** + * \name I2C devices enum + */ +enum +{ + I2C0, + + I2C_CNT /**< Number of serial ports */ +}; + +#endif /* I2C_AT91_H */ diff --git a/bertos/cpu/arm/drv/i2c_lpc2.c b/bertos/cpu/arm/drv/i2c_lpc2.c new file mode 100644 index 0000000..fd6a9fd --- /dev/null +++ b/bertos/cpu/arm/drv/i2c_lpc2.c @@ -0,0 +1,336 @@ +/** + * \file + * + * + * \brief Driver for the LPC23xx I2C (implementation) + * + * \author Daniele Basile + */ + +#include "cfg/cfg_i2c.h" + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT + +#include + +#include +#include // BV() + +#include +#include +#include + +#include +#include + +#include + +struct I2cHardware +{ + uint32_t base; + uint32_t pconp; + uint32_t pinsel_port; + uint32_t pinsel; + uint32_t pinsel_mask; + uint32_t pclksel; + uint32_t pclk_mask; + uint32_t pclk_div; +}; + +/* + * Wait that SI bit is set. + * + * Note: this bit is set when the I2C state changes. However, entering + * state F8 does not set SI since there is nothing for an interrupt service + * routine to do in that case. + */ +#define WAIT_SI(i2c) \ + do { \ + ticks_t start = timer_clock(); \ + while( !(HWREG(i2c->hw->base + I2C_CONSET_OFF) & BV(I2CON_SI)) ) \ + { \ + if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) \ + { \ + LOG_ERR("Timeout SI assert\n"); \ + LOG_ERR("[%08lx]\n", HWREG(i2c->hw->base + I2C_STAT_OFF)); \ + break; \ + } \ + cpu_relax(); \ + } \ + } while (0) + +static void i2c_hw_restart(I2c *i2c) +{ + // Clear all pending flags. + HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC); + + // Set start and ack bit. + HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STA); + + WAIT_SI(i2c); +} + + +static void i2c_hw_stop(I2c *i2c) +{ + /* Set the stop bit */ + HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STO); + /* Clear pending flags */ + HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC); +} + +static void i2c_lpc2_putc(I2c *i2c, uint8_t data) +{ + HWREG(i2c->hw->base + I2C_DAT_OFF) = data; + HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC); + + WAIT_SI(i2c); + + uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF); + + + /* Generate the stop if we finish to send all programmed bytes */ + if (i2c->xfer_size == 1) + { + if (I2C_TEST_STOP(i2c->flags) == I2C_STOP) + i2c_hw_stop(i2c); + } + + if (status == I2C_STAT_DATA_NACK) + { + LOG_ERR("Data NACK\n"); + i2c->errors |= I2C_NO_ACK; + i2c_hw_stop(i2c); + } + else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW)) + { + LOG_ERR("I2C error.\n"); + i2c->errors |= I2C_ERR; + i2c_hw_stop(i2c); + } +} + +static uint8_t i2c_lpc2_getc(I2c *i2c) +{ + /* + * Set ack bit if we want read more byte, otherwise + * we disable it + */ + if (i2c->xfer_size > 1) + HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_AA); + else + HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_AAC); + + HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC); + + WAIT_SI(i2c); + + uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF); + uint8_t data = (uint8_t)HWREG(i2c->hw->base + I2C_DAT_OFF); + + if (status == I2C_STAT_RDATA_ACK) + { + return data; + } + else if (status == I2C_STAT_RDATA_NACK) + { + /* + * last byte to read generate the stop if + * required + */ + if (I2C_TEST_STOP(i2c->flags) == I2C_STOP) + i2c_hw_stop(i2c); + + return data; + } + else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW)) + { + LOG_ERR("I2C error.\n"); + i2c->errors |= I2C_ERR; + i2c_hw_stop(i2c); + } + + return 0xFF; +} + +static void i2c_lpc2_start(struct I2c *i2c, uint16_t slave_addr) +{ + if (I2C_TEST_START(i2c->flags) == I2C_START_W) + { + ticks_t start = timer_clock(); + while (true) + { + i2c_hw_restart(i2c); + + uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF); + + /* Start status ok, set addres and the R/W bit */ + if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND)) + HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr & ~I2C_READBIT; + + /* Clear the start bit and clear the SI bit */ + HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC); + + if (status == I2C_STAT_SLAW_ACK) + break; + + if (status == I2C_STAT_ARB_LOST) + { + LOG_ERR("Arbitration lost\n"); + i2c->errors |= I2C_ARB_LOST; + i2c_hw_stop(i2c); + } + + if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("Timeout on I2C START\n"); + i2c->errors |= I2C_NO_ACK; + i2c_hw_stop(i2c); + break; + } + } + } + else if (I2C_TEST_START(i2c->flags) == I2C_START_R) + { + i2c_hw_restart(i2c); + + uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF); + + /* Start status ok, set addres and the R/W bit */ + if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND)) + HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr | I2C_READBIT; + + /* Clear the start bit and clear the SI bit */ + HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC); + + WAIT_SI(i2c); + + status = HWREG(i2c->hw->base + I2C_STAT_OFF); + + if (status == I2C_STAT_SLAR_NACK) + { + LOG_ERR("SLAR NACK:%02x\n", status); + i2c->errors |= I2C_NO_ACK; + i2c_hw_stop(i2c); + } + + if (status == I2C_STAT_ARB_LOST) + { + LOG_ERR("Arbitration lost\n"); + i2c->errors |= I2C_ARB_LOST; + i2c_hw_stop(i2c); + } + } + else + { + ASSERT(0); + } +} + +static const I2cVT i2c_lpc_vt = +{ + .start = i2c_lpc2_start, + .getc = i2c_lpc2_getc, + .putc = i2c_lpc2_putc, + .write = i2c_genericWrite, + .read = i2c_genericRead, +}; + +static struct I2cHardware i2c_lpc2_hw[] = +{ + { /* I2C0 */ + .base = I2C0_BASE_ADDR, + .pconp = BV(PCONP_PCI2C0), + .pinsel_port = PINSEL1_OFF, + .pinsel = I2C0_PINSEL, + .pinsel_mask = I2C0_PINSEL_MASK, + .pclksel = PCLKSEL0_OFF, + .pclk_mask = I2C0_PCLK_MASK, + .pclk_div = I2C0_PCLK_DIV8, + }, + { /* I2C1 */ + .base = I2C1_BASE_ADDR, + .pconp = BV(PCONP_PCI2C1), + .pinsel_port = PINSEL0_OFF, + .pinsel = I2C1_PINSEL, + .pinsel_mask = I2C1_PINSEL_MASK, + .pclksel = PCLKSEL1_OFF, + .pclk_mask = I2C1_PCLK_MASK, + .pclk_div = I2C1_PCLK_DIV8, + }, + { /* I2C2 */ + .base = I2C2_BASE_ADDR, + .pconp = BV(PCONP_PCI2C2), + .pinsel_port = PINSEL0_OFF, + .pinsel = I2C2_PINSEL, + .pinsel_mask = I2C2_PINSEL_MASK, + .pclksel = PCLKSEL1_OFF, + .pclk_mask = I2C2_PCLK_MASK, + .pclk_div = I2C2_PCLK_DIV8, + }, +}; + +/** + * Initialize I2C module. + */ +void i2c_hw_init(I2c *i2c, int dev, uint32_t clock) +{ + i2c->hw = &i2c_lpc2_hw[dev]; + i2c->vt = &i2c_lpc_vt; + + /* Enable I2C clock */ + PCONP |= i2c->hw->pconp; + + ASSERT(clock <= 400000); + + HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_I2ENC) | BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC); + + /* + * Bit Frequency = Fplk / (I2C_I2SCLH + I2C_I2SCLL) + * value of I2SCLH and I2SCLL must be different + */ + HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) &= ~i2c->hw->pclk_mask; + HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) |= i2c->hw->pclk_div; + + HWREG(i2c->hw->base + I2C_SCLH_OFF) = (((CPU_FREQ / 8) / clock) / 2) + 1; + HWREG(i2c->hw->base + I2C_SCLL_OFF) = (((CPU_FREQ / 8) / clock) / 2); + + ASSERT(HWREG(i2c->hw->base + I2C_SCLH_OFF) > 4); + ASSERT(HWREG(i2c->hw->base + I2C_SCLL_OFF) > 4); + + /* Assign pins to SCL and SDA */ + HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) &= ~i2c->hw->pinsel_mask; + HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) |= i2c->hw->pinsel; + + // Enable I2C + HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_I2EN); +} diff --git a/bertos/cpu/arm/drv/i2c_lpc2.h b/bertos/cpu/arm/drv/i2c_lpc2.h new file mode 100644 index 0000000..e0d9b3c --- /dev/null +++ b/bertos/cpu/arm/drv/i2c_lpc2.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Driver for the LPC23xx I2C (interface) + * + * \author Daniele Basile + * + */ + +#ifndef I2C_LPC2_H +#define I2C_LPC2_H + +#include + +/** + * \name I2C devices enum + */ +enum +{ + I2C0, + I2C1, + I2C2, + + I2C_CNT /**< Number of serial ports */ +}; + +#endif /* I2C_LPC2_H */ diff --git a/bertos/cpu/arm/drv/i2s_at91.c b/bertos/cpu/arm/drv/i2s_at91.c new file mode 100644 index 0000000..f6b039e --- /dev/null +++ b/bertos/cpu/arm/drv/i2s_at91.c @@ -0,0 +1,185 @@ +/** + * \file + * + * + * \brief I2S driver implementation. + * + * \author Luca Ottaviano + */ + + +/* + * TODO: Revise the public api of this module to be more generic. Evalutate to + * implement the more generic layer to be common to all I2S BeRTOS drivers. + */ +#include "i2s_at91.h" +#include "cfg/cfg_i2s.h" + +// Define log settings for cfg/log.h. +#define LOG_LEVEL I2S_LOG_LEVEL +#define LOG_FORMAT I2S_LOG_FORMAT +#include + +#include +#include + +#define DATALEN (15 & SSC_DATLEN_MASK) +// FIXME: this is not correct for 16 <= DATALEN < 24 +#define PDC_DIV ((DATALEN / 8) + 1) +/* + * PDC_DIV must be 1, 2 or 4, which are the bytes that are transferred + * each time the PDC reads from memory. + */ +STATIC_ASSERT(PDC_DIV % 2 == 0); +#define PDC_COUNT (CONFIG_PLAY_BUF_LEN / PDC_DIV) + +static uint8_t play_buf1[CONFIG_PLAY_BUF_LEN]; +static uint8_t play_buf2[CONFIG_PLAY_BUF_LEN]; + +// the buffer in PDC next is play_buf2 +volatile bool is_second_buf_next; + +uint8_t *i2s_getBuffer(unsigned buf_num) +{ + LOG_INFO("getBuffer start\n"); + + if (i2s_isPlaying()) + { + ASSERT(0); + return 0; + } + + if (buf_num == I2S_SECOND_BUF) + return play_buf2; + else if (buf_num == I2S_FIRST_BUF) + return play_buf1; + else + return 0; +} + +uint8_t *i2s_getFreeBuffer(void) +{ + if (!i2s_isPlaying()) + { + ASSERT(0); + return 0; + } + + // wait PDC transmission end + if (!(SSC_SR & BV(SSC_ENDTX))) + return 0; + + uint8_t *ret_buf = 0; + // the last time we got called, the second buffer was in PDC next + if (is_second_buf_next) + { + is_second_buf_next = false; + ret_buf = play_buf1; + } + // the last time the first buffer was in PDC next + else + { + is_second_buf_next = true; + ret_buf = play_buf2; + } + + if (ret_buf) + { + SSC_TNPR = (reg32_t) ret_buf; + SSC_TNCR = PDC_COUNT; + } + return ret_buf; +} + +bool i2s_start(void) +{ + /* Some time must pass between disabling and enabling again the transmission + * on SSC. A good empirical value seems >15 us. We try to avoid putting an + * explicit delay, instead we disable the transmitter when a sound finishes + * and hope that the delay has passed before we enter here again. + */ + SSC_CR = BV(SSC_TXDIS); + timer_delay(10); + + SSC_PTCR = BV(PDC_TXTDIS); + SSC_TPR = (reg32_t)play_buf1; + SSC_TCR = PDC_COUNT; + SSC_TNPR = (reg32_t)play_buf2; + SSC_TNCR = PDC_COUNT; + is_second_buf_next = true; + + SSC_PTCR = BV(PDC_TXTEN); + + /* enable output */ + SSC_CR = BV(SSC_TXEN); + + return true; +} + +#define BITS_PER_CHANNEL 16 +#define N_OF_CHANNEL 2 +// TODO: check the computed value? +/* The last parameter (2) is due to the hadware on at91sam7s. */ +#define MCK_DIV (CPU_FREQ / CONFIG_SAMPLE_FREQ / BITS_PER_CHANNEL / N_OF_CHANNEL / 2) + +#define CONFIG_DELAY 1 +#define CONFIG_PERIOD 15 +#define CONFIG_DATNB 1 +#define CONFIG_FSLEN 15 + +#define DELAY ((CONFIG_DELAY << SSC_STTDLY_SHIFT) & SSC_STTDLY_MASK) +#define PERIOD ((CONFIG_PERIOD << (SSC_PERIOD_SHIFT)) & SSC_PERIOD_MASK) +#define DATNB ((CONFIG_DATNB << SSC_DATNB_SHIFT) & SSC_DATNB_MASK) +#define FSLEN ((CONFIG_FSLEN << SSC_FSLEN_SHIFT) & SSC_FSLEN_MASK) + +#define SSC_DMA_IRQ_PRIORITY 5 + +void i2s_init(void) +{ + PIOA_PDR = BV(SSC_TK) | BV(SSC_TF) | BV(SSC_TD); + /* reset device */ + SSC_CR = BV(SSC_SWRST); + + SSC_CMR = MCK_DIV & SSC_DIV_MASK; + SSC_TCMR = SSC_CKS_DIV | SSC_CKO_CONT | SSC_CKG_NONE | DELAY | PERIOD | SSC_START_FALL_F; + SSC_TFMR = DATALEN | DATNB | FSLEN | BV(SSC_MSBF) | SSC_FSOS_NEGATIVE; + + /* Disable all irqs */ + SSC_IDR = 0xFFFFFFFF; + + /* Enable the SSC IRQ */ + AIC_IECR = BV(SSC_ID); + + /* enable i2s */ + PMC_PCER = BV(SSC_ID); + + /* Enable SSC */ + SSC_CR = BV(SSC_TXEN); +} diff --git a/bertos/cpu/arm/drv/i2s_at91.h b/bertos/cpu/arm/drv/i2s_at91.h new file mode 100644 index 0000000..af3aba0 --- /dev/null +++ b/bertos/cpu/arm/drv/i2s_at91.h @@ -0,0 +1,115 @@ +/** + * \file + * + * + * \brief I2S driver functions. + * + * This driver uses a double buffering technique to keep i2s bus busy. First fill in the two buffers + * using i2s_getBuffer(), then start audio playing with i2s_start(). Then call i2s_getFreeBuffer() + * until you have finished your samples. The reproduction will automatically stop if you don't + * call i2s_getFreeBuffer() frequently enough. + * + * Example: + * \code + * // fill in the buffers before start + * buf = i2s_getBuffer(I2S_FIRST_BUF); + * // ... + * buf = i2s_getBuffer(I2S_SECOND_BUF); + * // ... + * // here the driver will play only the first two buffers... + * i2s_start(); + * // ...call getFreeBuffer() to continue playing. + * while (!(buf = i2s_getFreeBuffer())) + * ; + * // now fill the buffer again + * \endcode + * + * \author Luca Ottaviano + * + * $WIZ$ module_name = "i2s" + * $WIZ$ module_configuration = "bertos/cfg/cfg_i2s.h" + * $WIZ$ module_supports = "at91" + */ + +#ifndef DRV_I2S_AT91_H +#define DRV_I2S_AT91_H + + +#include +#include +#include + +/** + * First buffer. + */ +#define I2S_FIRST_BUF 0 +/** + * Second buffer. + */ +#define I2S_SECOND_BUF 1 + +/** + * Initializes the module and sets current buffer to I2S_FIRST_BUF. + */ +void i2s_init(void); + +/** + * Returns one of the two buffers or NULL if none is available. + * + * You can't call this function if you have already started the player. + * \param buf_num The number of the buffer, ie I2S_FIRST_BUF or I2S_SECOND_BUF. + * \return A pointer to the buffer if the buffer is available (not full), 0 on errors + */ +uint8_t *i2s_getBuffer(unsigned buf_num); + +/** + * Returns a buffer that will be played after the current one. + * + * You should fill it faster than your reproduction time. You can't call this function + * if the player is not running + * \return The next buffer to be played, 0 if both are busy. + */ +uint8_t *i2s_getFreeBuffer(void); + +/** + * Starts playing from I2S_FIRST_BUFFER. + * + * You must have filled both buffers before calling this function. Does nothing if already playing. + * \return false on errors, true otherwise. + */ +bool i2s_start(void); + +INLINE bool i2s_isPlaying(void) +{ + return !(SSC_SR & BV(SSC_TXEMPTY)); +} + +#endif /* DRV_I2S_AT91_H */ diff --git a/bertos/cpu/arm/drv/kdebug_arm.c b/bertos/cpu/arm/drv/kdebug_arm.c new file mode 100644 index 0000000..05b9675 --- /dev/null +++ b/bertos/cpu/arm/drv/kdebug_arm.c @@ -0,0 +1,48 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief Low-level kdebug module for ARM (inplementation). + */ + +#include + +#if CPU_ARM_AT91 + #include "kdebug_at91.c" +#elif CPU_ARM_LPC2 + #include "kdebug_lpc2.c" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/arm/drv/kdebug_at91.c b/bertos/cpu/arm/drv/kdebug_at91.c new file mode 100644 index 0000000..2f4a9c5 --- /dev/null +++ b/bertos/cpu/arm/drv/kdebug_at91.c @@ -0,0 +1,93 @@ +/** + * \file + * + * + * \brief ARM debug support (implementation). + * + * \author Francesco Sacchi + */ + +#include "kdebug_at91.h" +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* Required for bus macros overrides */ + +#include "cfg/cfg_debug.h" +#include /* for BV(), DIV_ROUND */ + +#include + +#if CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU + #define KDBG_WAIT_READY() while (!(DBGU_SR & BV(US_TXRDY))) {} + #define KDBG_WAIT_TXDONE() while (!(DBGU_SR & BV(US_TXEMPTY))) {} + + #define KDBG_WRITE_CHAR(c) do { DBGU_THR = (c); } while(0) + + /* Debug unit is used only for debug purposes so does not generate interrupts. */ + #define KDBG_MASK_IRQ(old) do { (void)old; } while(0) + + /* Debug unit is used only for debug purposes so does not generate interrupts. */ + #define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0) + + typedef uint32_t kdbg_irqsave_t; + +#else + #error CONFIG_KDEBUG_PORT should be KDEBUG_PORT_DBGU +#endif + + +INLINE void kdbg_hw_init(void) +{ + #if CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU + /* Disable all DBGU interrupts. */ + DBGU_IDR = 0xFFFFFFFF; + /* Reset DBGU */ + DBGU_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS); + /* Set baudrate */ + DBGU_BRGR = DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE); + /* Set DBGU mode to 8 data bits, no parity and 1 stop bit. */ + DBGU_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_PAR_NO | US_NBSTOP_1; + /* Enable DBGU transmitter. */ + DBGU_CR = BV(US_TXEN); + /* Disable PIO on DGBU tx pin. */ + PIOA_PDR = BV(DTXD); + PIOA_ASR = BV(DTXD); + + #if 0 /* Disable Rx for now */ + /* Enable DBGU receiver. */ + DBGU_CR = BV(US_RXEN); + /* Disable PIO on DGBU rx pin. */ + PIOA_PDR = BV(DRXD); + PIOA_ASR = BV(DRXD); + #endif + #else + #error CONFIG_KDEBUG_PORT should be KDEBUG_PORT_DBGU + #endif /* CONFIG_KDEBUG_PORT == KDEBUG_PORT_DBGU */ +} diff --git a/bertos/cpu/arm/drv/kdebug_at91.h b/bertos/cpu/arm/drv/kdebug_at91.h new file mode 100644 index 0000000..ada761e --- /dev/null +++ b/bertos/cpu/arm/drv/kdebug_at91.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief ARM debug support (interface). + */ + +#ifndef DRV_KDEBUG_AT91_H +#define DRV_KDEBUG_AT91_H + +/** + * \name Values for CONFIG_KDEBUG_PORT. + * + * Select which hardware UART to use for system debug. + * + * \{ + */ +#define KDEBUG_PORT_DBGU 0 ///< Debug on Debug Unit. + +#define KDEBUG_PORT_DEFAULT KDEBUG_PORT_DBGU ///< Default debug port. +/* \} */ + +#endif /* DRV_KDEBUG_AT91_H */ diff --git a/bertos/cpu/arm/drv/kdebug_lpc2.c b/bertos/cpu/arm/drv/kdebug_lpc2.c new file mode 100644 index 0000000..0de6fb3 --- /dev/null +++ b/bertos/cpu/arm/drv/kdebug_lpc2.c @@ -0,0 +1,92 @@ +/** + * \file + * + * + * \brief ARM debug support (implementation). + * + * \author Francesco Sacchi + */ + +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* Required for bus macros overrides */ + +#include "cfg/cfg_debug.h" +#include /* for BV(), DIV_ROUND */ + +#include + +#if CONFIG_KDEBUG_PORT == 0 + #define KDBG_WAIT_READY() while (!(U0LSR & BV(5))) {} + #define KDBG_WAIT_TXDONE() while (!(U0LSR & BV(6))) {} + + #define KDBG_WRITE_CHAR(c) do { U0THR = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = U0IER; \ + U0IER &= ~BV(1); \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + U0IER = (old); \ + } while(0) + + typedef uint32_t kdbg_irqsave_t; + +#else + #error CONFIG_KDEBUG_PORT should be 0 +#endif + + +INLINE void kdbg_hw_init(void) +{ + #if CONFIG_KDEBUG_PORT == 0 + /* Enable clock for UART0 */ + PCONP = BV(3); + /* Set UART0 clk to CPU_FREQ */ + PCLKSEL0 &= ~0xC0; + PCLKSEL0 |= 0x40; + /* Set 8bit, 1 stop bit, no parity, DLAB = 1 (enable divisor modify) */ + U0LCR = 0x83; + U0DLL = DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) & 0xFF; + U0DLM = (DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) >> 8) & 0xFF; + U0FDR = 0x10; + /* Assign TX pin to UART0*/ + PINSEL0 &= ~0x30; + PINSEL0 |= 0x10; + /* Set 8bit, 1 stop bit, no parity, DLAB = 0 (disable divisor modify) */ + U0LCR = 0x03; + /* Enable transmitter */ + U0TER = BV(7); + #else + #error CONFIG_KDEBUG_PORT should be 0 + #endif /* CONFIG_KDEBUG_PORT == 0 */ +} diff --git a/bertos/cpu/arm/drv/pwm_arm.c b/bertos/cpu/arm/drv/pwm_arm.c new file mode 100644 index 0000000..18b699a --- /dev/null +++ b/bertos/cpu/arm/drv/pwm_arm.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Low-level PWM module for ARM (inplementation). + * + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + * + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use pwm_at91.c + + #include + + #if CPU_ARM_AT91 + #include "pwm_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ + diff --git a/bertos/cpu/arm/drv/pwm_arm.h b/bertos/cpu/arm/drv/pwm_arm.h new file mode 100644 index 0000000..93bd8bc --- /dev/null +++ b/bertos/cpu/arm/drv/pwm_arm.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Low-level PWM module for ARM (interface). + * + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "pwm_at91.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/arm/drv/pwm_at91.c b/bertos/cpu/arm/drv/pwm_at91.c new file mode 100644 index 0000000..c5780c3 --- /dev/null +++ b/bertos/cpu/arm/drv/pwm_at91.c @@ -0,0 +1,387 @@ +/** + * \file + * + * + * + * \brief PWM hardware-specific implementation + * + * \author Daniele Basile + * \author Francesco Sacchi + */ + +#include +#include "pwm_at91.h" +#include +#include "cfg/cfg_pwm.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL PWM_LOG_LEVEL +#define LOG_FORMAT PWM_LOG_FORMAT +#include + +#include +#include + +#include +#include + +#define PWM_HW_MAX_PRESCALER_STEP 10 +#define PWM_HW_MAX_PERIOD 0xFFFF + +#if CFG_PWM_ENABLE_OLD_API + #include "hw/pwm_map.h" + + /** + * Register structure for pwm driver. + * This array content all data and register pointer + * to manage pwm peripheral device. + */ + static PwmChannel pwm_map[PWM_CNT] = + { + {//PWM Channel 0 + .duty_zero = false, + .pol = false, + .pwm_pin = BV(PWM0), + .mode_reg = &PWM_CMR0, + .duty_reg = &PWM_CDTY0, + .period_reg = &PWM_CPRD0, + .update_reg = &PWM_CUPD0, + }, + {//PWM Channel 1 + .duty_zero = false, + .pol = false, + .pwm_pin = BV(PWM1), + .mode_reg = &PWM_CMR1, + .duty_reg = &PWM_CDTY1, + .period_reg = &PWM_CPRD1, + .update_reg = &PWM_CUPD1, + }, + {//PWM Channel 2 + .duty_zero = false, + .pol = false, + .pwm_pin = BV(PWM2), + .mode_reg = &PWM_CMR2, + .duty_reg = &PWM_CDTY2, + .period_reg = &PWM_CPRD2, + .update_reg = &PWM_CUPD2, + }, + {//PWM Channel 3 + .duty_zero = false, + .pol = false, + .pwm_pin = BV(PWM3), + .mode_reg = &PWM_CMR3, + .duty_reg = &PWM_CDTY3, + .period_reg = &PWM_CPRD3, + .update_reg = &PWM_CUPD3, + } + }; + + + /** + * Get preiod from select channel + * + * \a dev channel + */ + pwm_period_t pwm_hw_getPeriod(PwmDev dev) + { + return *pwm_map[dev].period_reg; + } + + /** + * Set pwm waveform frequecy. + * + * \a freq in Hz + */ + void pwm_hw_setFrequency(PwmDev dev, uint32_t freq) + { + uint32_t period = 0; + + for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++) + { + period = CPU_FREQ / (BV(i) * freq); + LOG_INFO("period[%ld], prescale[%d]\n", period, i); + if ((period < PWM_HW_MAX_PERIOD) && (period != 0)) + { + //Clean previous channel prescaler, and set new + *pwm_map[dev].mode_reg &= ~PWM_CPRE_MCK_MASK; + *pwm_map[dev].mode_reg |= i; + //Set pwm period + *pwm_map[dev].period_reg = period; + break; + } + } + + LOG_INFO("PWM ch[%d] period[%ld]\n", dev, period); + } + + /** + * Set pwm duty cycle. + * + * \a duty value 0 - 2^16 + */ + void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty) + { + ASSERT(duty <= (uint16_t)*pwm_map[dev].period_reg); + + + /* + * If polarity flag is true we must invert + * PWM polarity. + */ + if (pwm_map[dev].pol) + { + duty = (uint16_t)*pwm_map[dev].period_reg - duty; + LOG_INFO("Inverted duty[%d], pol[%d]\n", duty, pwm_map[dev].pol); + } + + /* + * WARNING: is forbidden to write 0 to duty cycle value, + * and so for duty = 0 we must enable PIO and clear output! + */ + if (!duty) + { + PWM_PIO_CODR = pwm_map[dev].pwm_pin; + PWM_PIO_PER = pwm_map[dev].pwm_pin; + pwm_map[dev].duty_zero = true; + } + else + { + PWM_PIO_PDR = pwm_map[dev].pwm_pin; + PWM_PIO_ABSR = pwm_map[dev].pwm_pin; + + *pwm_map[dev].update_reg = duty; + pwm_map[dev].duty_zero = false; + } + + PWM_ENA = BV(dev); + LOG_INFO("PWM ch[%d] duty[%d], period[%ld]\n", dev, duty, *pwm_map[dev].period_reg); + } + + + /** + * Enable select pwm channel + */ + void pwm_hw_enable(PwmDev dev) + { + if (!pwm_map[dev].duty_zero) + { + PWM_PIO_PDR = pwm_map[dev].pwm_pin; + PWM_PIO_ABSR = pwm_map[dev].pwm_pin; + } + } + + /** + * Disable select pwm channel + */ + void pwm_hw_disable(PwmDev dev) + { + PWM_PIO_PER = pwm_map[dev].pwm_pin; + } + + /** + * Set PWM polarity to select pwm channel + */ + void pwm_hw_setPolarity(PwmDev dev, bool pol) + { + pwm_map[dev].pol = pol; + LOG_INFO("Set pol[%d]\n", pwm_map[dev].pol); + } + + /** + * Init pwm. + */ + void pwm_hw_init(void) + { + + /* + * Init pwm: + * WARNING: is forbidden to write 0 to duty cycle value, + * and so for duty = 0 we must enable PIO and clear output! + * - clear PIO outputs + * - enable PIO outputs + * - Disable PIO and enable PWM functions + * - Power on PWM + */ + PWM_PIO_CODR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3); + PWM_PIO_OER = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3); + PWM_PIO_PDR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3); + PWM_PIO_ABSR = BV(PWM0) | BV(PWM1) | BV(PWM2) | BV(PWM3); + PMC_PCER |= BV(PWMC_ID); + + /* Disable all channels. */ + PWM_DIS = 0xFFFFFFFF; + /* Disable prescalers A and B */ + PWM_MR = 0; + + /* + * Set pwm mode: + * - set period alidned to left + * - set output waveform to start at high level + * - allow duty cycle modify at next period event + */ + for (int ch = 0; ch < PWM_CNT; ch++) + { + *pwm_map[ch].mode_reg = 0; + *pwm_map[ch].mode_reg = BV(PWM_CPOL); + } + + } + +#else + + typedef struct PwmChannelRegs + { + reg32_t CMR; + reg32_t CDTY; + reg32_t CPRD; + reg32_t CCNT; + reg32_t CUPD; + } PwmChannelRegs; + + + /* + * Set pwm waveform frequecy. + */ + void pwm_hw_setFrequency(Pwm *ctx, pwm_freq_t freq) + { + uint32_t period = 0; + + for(int i = 0; i <= PWM_HW_MAX_PRESCALER_STEP; i++) + { + period = CPU_FREQ / (BV(i) * freq); + LOG_INFO("period[%ld], prescale[%d]\n", period, i); + if ((period < PWM_HW_MAX_PERIOD) && (period != 0)) + { + //Clear previous channel prescaler, and set new + ctx->hw->base->CMR &= ~PWM_CPRE_MCK_MASK; + ctx->hw->base->CMR |= i; + //Set pwm period + ATOMIC( + ctx->hw->base->CPRD = period; + ctx->hw->base->CDTY = period; + ); + break; + } + } + + LOG_INFO("PWM ch[%d] period[%ld]\n", ctx->ch, period); + } + + pwm_hwreg_t pwm_hw_getPeriod(Pwm *ctx) + { + return ctx->hw->base->CPRD; + } + + /* + * Set pwm duty cycle. + * + * duty value 0 - (2^16 - 1) + */ + void pwm_hw_setDuty(Pwm *ctx, pwm_hwreg_t hw_duty) + { + ASSERT(hw_duty <= ctx->hw->base->CPRD); + + /* + * WARNING: is forbidden to write 0 or 1 to duty cycle value, + * and so for duty < 2 we must enable PIO and clear output! + */ + if (hw_duty < 2) + { + hw_duty = 2; + PWM_PIO_PER = ctx->hw->pwm_pin; + } + else + PWM_PIO_PDR = ctx->hw->pwm_pin; + + ctx->hw->base->CUPD = hw_duty; + LOG_INFO("PWM ch[%d] duty[%d], period[%ld]\n", ctx->ch, hw_duty, ctx->hw->base->CPRD); + } + + static PwmHardware pwm_channels[] = + { + {//PWM Channel 0 + .pwm_pin = BV(PWM0), + .base = (volatile PwmChannelRegs *)&PWM_CMR0, + }, + {//PWM Channel 1 + .pwm_pin = BV(PWM1), + .base = (volatile PwmChannelRegs *)&PWM_CMR1, + }, + {//PWM Channel 2 + .pwm_pin = BV(PWM2), + .base = (volatile PwmChannelRegs *)&PWM_CMR2, + }, + {//PWM Channel 3 + .pwm_pin = BV(PWM3), + .base = (volatile PwmChannelRegs *)&PWM_CMR3, + }, + }; + + /* + * Init pwm. + */ + void pwm_hw_init(Pwm *ctx, unsigned ch) + { + + ctx->hw = &pwm_channels[ch]; + + /* + * Init pwm: + * - clear PIO outputs + * - enable PIO outputs + * - Enable PWM functions + * - Power on PWM + */ + PWM_PIO_CODR = ctx->hw->pwm_pin; + PWM_PIO_OER = ctx->hw->pwm_pin; + PWM_PIO_PER = ctx->hw->pwm_pin; + PWM_PIO_ABSR = ctx->hw->pwm_pin; + + PMC_PCER |= BV(PWMC_ID); + + /* Disable prescalers A and B */ + PWM_MR = 0; + + /* + * Set pwm mode: + * WARNING: is forbidden to write 0 or 1 to duty cycle value, + * and so for start we set duty to 2. + * Also: + * - set period aligned to left + * - set output waveform to start at high level + * - allow duty cycle modify at next period event + */ + ctx->hw->base->CDTY = 2; + ctx->hw->base->CMR = BV(PWM_CPOL); + PWM_ENA = BV(ch); + } + +#endif diff --git a/bertos/cpu/arm/drv/pwm_at91.h b/bertos/cpu/arm/drv/pwm_at91.h new file mode 100644 index 0000000..403b9f5 --- /dev/null +++ b/bertos/cpu/arm/drv/pwm_at91.h @@ -0,0 +1,103 @@ +/** + * \file + * + * + * + * \brief PWM hardware-specific definition + * + * + * \author Daniele Basile + */ + +#ifndef DRV_PWM_AT91_H +#define DRV_PWM_AT91_H + +#include +#include + +#include "cfg/cfg_pwm.h" + +#include + +#if CFG_PWM_ENABLE_OLD_API + + #include "hw/pwm_map.h" + + /** + * Type definition for pwm period. + */ + typedef uint16_t pwm_period_t; + + /** + * Structur definition for pwm driver. + */ + typedef struct PwmChannel + { + bool duty_zero; ///< True if duty cyle is zero, false otherwise. + bool pol; ///< PWM polarty flag. + int pwm_pin; ///< PWM pin. + reg32_t *mode_reg; ///< PWM mode register. + reg32_t *duty_reg; ///< PWM duty cycle register. + reg32_t *period_reg; ///< PWM periodic register. + reg32_t *update_reg; ///< Update setting register for PWM. + + } PwmChannel; + + + void pwm_hw_init(void); + void pwm_hw_setFrequency(PwmDev dev, uint32_t freq); + void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty); + void pwm_hw_disable(PwmDev dev); + void pwm_hw_enable(PwmDev dev); + void pwm_hw_setPolarity(PwmDev dev, bool pol); + pwm_period_t pwm_hw_getPeriod(PwmDev dev); + +#else + #include + + typedef uint16_t pwm_hwreg_t; + + struct PwmChannelRegs; //fwd decl + + typedef struct PwmHardware + { + uint32_t pwm_pin; ///< PWM pin. + volatile struct PwmChannelRegs *base; + } PwmHardware; + + pwm_hwreg_t pwm_hw_getPeriod(Pwm *ctx); + void pwm_hw_setFrequency(struct Pwm *ctx, pwm_freq_t freq); + void pwm_hw_setDuty(Pwm *ctx, pwm_hwreg_t duty); + void pwm_hw_init(struct Pwm *ctx, unsigned ch); + +#endif + +#endif /* DRV_ADC_AT91_H */ diff --git a/bertos/cpu/arm/drv/ser_arm.c b/bertos/cpu/arm/drv/ser_arm.c new file mode 100644 index 0000000..f19f1b0 --- /dev/null +++ b/bertos/cpu/arm/drv/ser_arm.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Low-level serial module for ARM (inplementation). + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + * + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use ser_at91.c + + #include + + #if CPU_ARM_AT91 + #include "ser_at91.c" + #elif CPU_ARM_LPC2378 + #include "ser_lpc2.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ diff --git a/bertos/cpu/arm/drv/ser_arm.h b/bertos/cpu/arm/drv/ser_arm.h new file mode 100644 index 0000000..62dfc3f --- /dev/null +++ b/bertos/cpu/arm/drv/ser_arm.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Low-level serial module for ARM (interface). + * + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "ser_at91.h" +#elif CPU_ARM_LPC2378 + #include "ser_lpc2.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/arm/drv/ser_at91.c b/bertos/cpu/arm/drv/ser_at91.c new file mode 100644 index 0000000..2d778d1 --- /dev/null +++ b/bertos/cpu/arm/drv/ser_at91.c @@ -0,0 +1,918 @@ +/** + * \file + * + * + * \brief ARM UART and SPI I/O driver + * + * + * \author Daniele Basile + */ + +#include "hw/hw_ser.h" /* Required for bus macros overrides */ +#include /* CPU_FREQ */ + +#include "cfg/cfg_ser.h" +#include + + +#include + +#include + +#include +#include + +#include + + +#define SERIRQ_PRIORITY 4 ///< default priority for serial irqs. + +/** + * \name Overridable serial bus hooks + * + * These can be redefined in hw.h to implement + * special bus policies such as half-duplex, 485, etc. + * + * + * \code + * TXBEGIN TXCHAR TXEND TXOFF + * | __________|__________ | | + * | | | | | | | | | + * v v v v v v v v v + * ______ __ __ __ __ __ __ ________________ + * \/ \/ \/ \/ \/ \/ \/ + * ______/\__/\__/\__/\__/\__/\__/ + * + * \endcode + * + * \{ + */ + +#ifndef SER_UART0_BUS_TXINIT + /** + * Default TXINIT macro - invoked in uart0_init() + * + * - Disable GPIO on USART0 tx/rx pins + */ + #if !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X + #warning Check USART0 pins! + #endif + #define SER_UART0_BUS_TXINIT do { \ + PIOA_PDR = BV(RXD0) | BV(TXD0); \ + } while (0) + +#endif + +#ifndef SER_UART0_BUS_TXBEGIN + /** + * Invoked before starting a transmission + */ + #define SER_UART0_BUS_TXBEGIN +#endif + +#ifndef SER_UART0_BUS_TXCHAR + /** + * Invoked to send one character. + */ + #define SER_UART0_BUS_TXCHAR(c) do { \ + US0_THR = (c); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXEND + /** + * Invoked as soon as the txfifo becomes empty + */ + #define SER_UART0_BUS_TXEND +#endif + +/* End USART0 macros */ + +#ifndef SER_UART1_BUS_TXINIT + /** + * Default TXINIT macro - invoked in uart1_init() + * + * - Disable GPIO on USART1 tx/rx pins + */ + #if !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X + #warning Check USART1 pins! + #endif + #define SER_UART1_BUS_TXINIT do { \ + PIOA_PDR = BV(RXD1) | BV(TXD1); \ + } while (0) + +#endif + +#ifndef SER_UART1_BUS_TXBEGIN + /** + * Invoked before starting a transmission + */ + #define SER_UART1_BUS_TXBEGIN +#endif + +#ifndef SER_UART1_BUS_TXCHAR + /** + * Invoked to send one character. + */ + #define SER_UART1_BUS_TXCHAR(c) do { \ + US1_THR = (c); \ + } while (0) +#endif + +#ifndef SER_UART1_BUS_TXEND + /** + * Invoked as soon as the txfifo becomes empty + */ + #define SER_UART1_BUS_TXEND +#endif + +/** +* \name Overridable SPI hooks +* +* These can be redefined in hw.h to implement +* special bus policies such as slave select pin handling, etc. +* +* \{ +*/ + +#ifndef SER_SPI0_BUS_TXINIT + /** + * Default TXINIT macro - invoked in spi_init() + * The default is no action. + */ + #define SER_SPI0_BUS_TXINIT +#endif + +#ifndef SER_SPI0_BUS_TXCLOSE + /** + * Invoked after the last character has been transmitted. + * The default is no action. + */ + #define SER_SPI0_BUS_TXCLOSE +#endif + +#if CPU_ARM_SAM7X + + #ifndef SER_SPI1_BUS_TXINIT + /** + * Default TXINIT macro - invoked in spi_init() + * The default is no action. + */ + #define SER_SPI1_BUS_TXINIT + #endif + + #ifndef SER_SPI1_BUS_TXCLOSE + /** + * Invoked after the last character has been transmitted. + * The default is no action. + */ + #define SER_SPI1_BUS_TXCLOSE + #endif +#endif +/*\}*/ + + + + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +/* TX and RX buffers */ +static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE]; +static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE]; + +static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE]; +static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE]; + +static unsigned char spi0_txbuffer[CONFIG_SPI0_TXBUFSIZE]; +static unsigned char spi0_rxbuffer[CONFIG_SPI0_RXBUFSIZE]; +#if CPU_ARM_SAM7X +static unsigned char spi1_txbuffer[CONFIG_SPI1_TXBUFSIZE]; +static unsigned char spi1_rxbuffer[CONFIG_SPI1_RXBUFSIZE]; +#endif + +/** + * Internal hardware state structure + * + * The \a sending variable is true while the transmission + * interrupt is retriggering itself. + * + * For the USARTs the \a sending flag is useful for taking specific + * actions before sending a burst of data, at the start of a trasmission + * but not before every char sent. + * + * For the SPI, this flag is necessary because the SPI sends and receives + * bytes at the same time and the SPI IRQ is unique for send/receive. + * The only way to start transmission is to write data in SPDR (this + * is done by spi_starttx()). We do this *only* if a transfer is + * not already started. + */ +struct ArmSerial +{ + struct SerialHardware hw; + volatile bool sending; +}; + +static ISR_PROTO(uart0_irq_dispatcher); +static ISR_PROTO(uart1_irq_dispatcher); +static ISR_PROTO(spi0_irq_handler); +#if CPU_ARM_SAM7X +static ISR_PROTO(spi1_irq_handler); +#endif +/* + * Callbacks for USART0 + */ +static void uart0_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + US0_IDR = 0xFFFFFFFF; + /* Set the vector. */ + AIC_SVR(US0_ID) = uart0_irq_dispatcher; + /* Initialize to level sensitive with defined priority. */ + AIC_SMR(US0_ID) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | SERIRQ_PRIORITY; + PMC_PCER = BV(US0_ID); + + /* + * - Reset USART0 + * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none + * - Enable both the receiver and the transmitter + * - Enable only the RX complete interrupt + */ + US0_CR = BV(US_RSTRX) | BV(US_RSTTX); + US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO; + US0_CR = BV(US_RXEN) | BV(US_TXEN); + US0_IER = BV(US_RXRDY); + + SER_UART0_BUS_TXINIT; + + /* Enable the USART IRQ */ + AIC_IECR = BV(US0_ID); + + SER_STROBE_INIT; +} + +static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + US0_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA); +} + +static void uart0_enabletxirq(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt sets hw->sending to false + * when it runs with an empty fifo. The order of statements in the + * if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + /* + * - Enable the transmitter + * - Enable TX empty interrupt + */ + SER_UART0_BUS_TXBEGIN; + US0_IER = BV(US_TXEMPTY); + } +} + +static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + /* Compute baud-rate period */ + US0_BRGR = CPU_FREQ / (16 * rate); + //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);) +} + +static void uart0_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + US0_MR &= ~US_PAR_MASK; + /* Set UART parity */ + switch(parity) + { + case SER_PARITY_NONE: + { + /* Parity none. */ + US0_MR |= US_PAR_NO; + break; + } + case SER_PARITY_EVEN: + { + /* Even parity. */ + US0_MR |= US_PAR_EVEN; + break; + } + case SER_PARITY_ODD: + { + /* Odd parity. */ + US0_MR |= US_PAR_ODD; + break; + } + default: + ASSERT(0); + } + +} +/* + * Callbacks for USART1 + */ +static void uart1_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + US1_IDR = 0xFFFFFFFF; + /* Set the vector. */ + AIC_SVR(US1_ID) = uart1_irq_dispatcher; + /* Initialize to level sensitive with defined priority. */ + AIC_SMR(US1_ID) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE | SERIRQ_PRIORITY; + PMC_PCER = BV(US1_ID); + + /* + * - Reset USART1 + * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none + * - Enable both the receiver and the transmitter + * - Enable only the RX complete interrupt + */ + US1_CR = BV(US_RSTRX) | BV(US_RSTTX); + US1_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO; + US1_CR = BV(US_RXEN) | BV(US_TXEN); + US1_IER = BV(US_RXRDY); + + SER_UART1_BUS_TXINIT; + + /* Enable the USART IRQ */ + AIC_IECR = BV(US1_ID); + + SER_STROBE_INIT; +} + +static void uart1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + US1_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA); +} + +static void uart1_enabletxirq(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt sets hw->sending to false + * when it runs with an empty fifo. The order of statements in the + * if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + /* + * - Enable the transmitter + * - Enable TX empty interrupt + */ + SER_UART1_BUS_TXBEGIN; + US1_IER = BV(US_TXEMPTY); + } +} + +static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + /* Compute baud-rate period */ + US1_BRGR = CPU_FREQ / (16 * rate); + //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);) +} + +static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + US1_MR &= ~US_PAR_MASK; + /* Set UART parity */ + switch(parity) + { + case SER_PARITY_NONE: + { + /* Parity none. */ + US1_MR |= US_PAR_NO; + break; + } + case SER_PARITY_EVEN: + { + /* Even parity. */ + US1_MR |= US_PAR_EVEN; + break; + } + case SER_PARITY_ODD: + { + /* Odd parity. */ + US1_MR |= US_PAR_ODD; + break; + } + default: + ASSERT(0); + } + +} + +/* SPI driver */ +static void spi0_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser)) +{ + /* Disable PIO on SPI pins */ + PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); + + /* Reset device */ + SPI0_CR = BV(SPI_SWRST); + + /* + * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, + * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 + */ + SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + + /* + * Set SPI mode. + * At reset clock division factor is set to 0, that is + * *forbidden*. Set SPI clock to minimum to keep it valid. + */ + SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + + /* Disable all irqs */ + SPI0_IDR = 0xFFFFFFFF; + /* Set the vector. */ + AIC_SVR(SPI0_ID) = spi0_irq_handler; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(SPI0_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY; + /* Enable the USART IRQ */ + AIC_IECR = BV(SPI0_ID); + PMC_PCER = BV(SPI0_ID); + + /* Enable interrupt on tx buffer empty */ + SPI0_IER = BV(SPI_TXEMPTY); + + /* Enable SPI */ + SPI0_CR = BV(SPI_SPIEN); + + + SER_SPI0_BUS_TXINIT; + + SER_STROBE_INIT; +} + +static void spi0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + /* Disable SPI */ + SPI0_CR = BV(SPI_SPIDIS); + + /* Disable all irqs */ + SPI0_IDR = 0xFFFFFFFF; + + SER_SPI0_BUS_TXCLOSE; + + /* Enable PIO on SPI pins */ + PIOA_PER = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); +} + +static void spi0_starttx(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Send data only if the SPI is not already transmitting */ + if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI0]->txfifo)) + { + hw->sending = true; + SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo); + } + + IRQ_RESTORE(flags); +} + +static void spi0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + SPI0_CSR0 &= ~SPI_SCBR; + + ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate)); + SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT; +} + +#if CPU_ARM_SAM7X +/* SPI driver */ +static void spi1_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser)) +{ + /* Disable PIO on SPI pins */ + PIOA_PDR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); + + /* SPI1 pins are on B peripheral function! */ + PIOA_BSR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); + + /* Reset device */ + SPI1_CR = BV(SPI_SWRST); + + /* + * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, + * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 + */ + SPI1_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + + /* + * Set SPI mode. + * At reset clock division factor is set to 0, that is + * *forbidden*. Set SPI clock to minimum to keep it valid. + */ + SPI1_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + + /* Disable all irqs */ + SPI1_IDR = 0xFFFFFFFF; + /* Set the vector. */ + AIC_SVR(SPI1_ID) = spi1_irq_handler; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(SPI1_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SERIRQ_PRIORITY; + /* Enable the USART IRQ */ + AIC_IECR = BV(SPI1_ID); + PMC_PCER = BV(SPI1_ID); + + /* Enable interrupt on tx buffer empty */ + SPI1_IER = BV(SPI_TXEMPTY); + + /* Enable SPI */ + SPI1_CR = BV(SPI_SPIEN); + + + SER_SPI1_BUS_TXINIT; + + SER_STROBE_INIT; +} + +static void spi1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + /* Disable SPI */ + SPI1_CR = BV(SPI_SPIDIS); + + /* Disable all irqs */ + SPI1_IDR = 0xFFFFFFFF; + + SER_SPI1_BUS_TXCLOSE; + + /* Enable PIO on SPI pins */ + PIOA_PER = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); +} + +static void spi1_starttx(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Send data only if the SPI is not already transmitting */ + if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI1]->txfifo)) + { + hw->sending = true; + SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo); + } + + IRQ_RESTORE(flags); +} + +static void spi1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + SPI1_CSR0 &= ~SPI_SCBR; + + ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate)); + SPI1_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT; +} +#endif + +static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity)) +{ + // nop +} + + +static bool tx_sending(struct SerialHardware* _hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + return hw->sending; +} + +// FIXME: move into compiler.h? Ditch? +#if COMPILER_C99 + #define C99INIT(name,val) .name = val +#elif defined(__GNUC__) + #define C99INIT(name,val) name: val +#else + #warning No designated initializers, double check your code + #define C99INIT(name,val) (val) +#endif + +/* + * High-level interface data structures + */ +static const struct SerialHardwareVT UART0_VT = +{ + C99INIT(init, uart0_init), + C99INIT(cleanup, uart0_cleanup), + C99INIT(setBaudrate, uart0_setbaudrate), + C99INIT(setParity, uart0_setparity), + C99INIT(txStart, uart0_enabletxirq), + C99INIT(txSending, tx_sending), +}; + +static const struct SerialHardwareVT UART1_VT = +{ + C99INIT(init, uart1_init), + C99INIT(cleanup, uart1_cleanup), + C99INIT(setBaudrate, uart1_setbaudrate), + C99INIT(setParity, uart1_setparity), + C99INIT(txStart, uart1_enabletxirq), + C99INIT(txSending, tx_sending), +}; + +static const struct SerialHardwareVT SPI0_VT = +{ + C99INIT(init, spi0_init), + C99INIT(cleanup, spi0_cleanup), + C99INIT(setBaudrate, spi0_setbaudrate), + C99INIT(setParity, spi_setparity), + C99INIT(txStart, spi0_starttx), + C99INIT(txSending, tx_sending), +}; +#if CPU_ARM_SAM7X +static const struct SerialHardwareVT SPI1_VT = +{ + C99INIT(init, spi1_init), + C99INIT(cleanup, spi1_cleanup), + C99INIT(setBaudrate, spi1_setbaudrate), + C99INIT(setParity, spi_setparity), + C99INIT(txStart, spi1_starttx), + C99INIT(txSending, tx_sending), +}; +#endif + +static struct ArmSerial UARTDescs[SER_CNT] = +{ + { + C99INIT(hw, /**/) { + C99INIT(table, &UART0_VT), + C99INIT(txbuffer, uart0_txbuffer), + C99INIT(rxbuffer, uart0_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)), + }, + C99INIT(sending, false), + }, + { + C99INIT(hw, /**/) { + C99INIT(table, &UART1_VT), + C99INIT(txbuffer, uart1_txbuffer), + C99INIT(rxbuffer, uart1_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)), + }, + C99INIT(sending, false), + }, + + { + C99INIT(hw, /**/) { + C99INIT(table, &SPI0_VT), + C99INIT(txbuffer, spi0_txbuffer), + C99INIT(rxbuffer, spi0_rxbuffer), + C99INIT(txbuffer_size, sizeof(spi0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(spi0_rxbuffer)), + }, + C99INIT(sending, false), + }, + #if CPU_ARM_SAM7X + { + C99INIT(hw, /**/) { + C99INIT(table, &SPI1_VT), + C99INIT(txbuffer, spi1_txbuffer), + C99INIT(rxbuffer, spi1_rxbuffer), + C99INIT(txbuffer_size, sizeof(spi1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(spi1_rxbuffer)), + }, + C99INIT(sending, false), + } + + #endif +}; + +struct SerialHardware *ser_hw_getdesc(int unit) +{ + ASSERT(unit < SER_CNT); + return &UARTDescs[unit].hw; +} + +/** + * Serial 0 TX interrupt handler + */ +INLINE void uart0_irq_tx(void) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo; + + if (fifo_isempty(txfifo)) + { + /* + * - Disable the TX empty interrupts + */ + US0_IDR = BV(US_TXEMPTY); + SER_UART0_BUS_TXEND; + UARTDescs[SER_UART0].sending = false; + } + else + { + char c = fifo_pop(txfifo); + SER_UART0_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +/** + * Serial 0 RX complete interrupt handler. + */ +INLINE void uart0_irq_rx(void) +{ + SER_STROBE_ON; + + /* Should be read before US_CRS */ + ser_handles[SER_UART0]->status |= US0_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + US0_CR = BV(US_RSTSTA); + + char c = US0_RHR; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART0]->rxfifo; + + if (fifo_isfull(rxfifo)) + ser_handles[SER_UART0]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + + SER_STROBE_OFF; +} + +/** + * Serial IRQ dispatcher for USART0. + */ +static DECLARE_ISR(uart0_irq_dispatcher) +{ + if (US0_CSR & BV(US_RXRDY)) + uart0_irq_rx(); + + if (US0_CSR & BV(US_TXEMPTY)) + uart0_irq_tx(); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + +/** + * Serial 1 TX interrupt handler + */ +INLINE void uart1_irq_tx(void) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo; + + if (fifo_isempty(txfifo)) + { + /* + * - Disable the TX empty interrupts + */ + US1_IDR = BV(US_TXEMPTY); + SER_UART1_BUS_TXEND; + UARTDescs[SER_UART1].sending = false; + } + else + { + char c = fifo_pop(txfifo); + SER_UART1_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +/** + * Serial 1 RX complete interrupt handler. + */ +INLINE void uart1_irq_rx(void) +{ + SER_STROBE_ON; + + /* Should be read before US_CRS */ + ser_handles[SER_UART1]->status |= US1_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + US1_CR = BV(US_RSTSTA); + + char c = US1_RHR; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART1]->rxfifo; + + if (fifo_isfull(rxfifo)) + ser_handles[SER_UART1]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + + SER_STROBE_OFF; +} + +/** + * Serial IRQ dispatcher for USART1. + */ +static DECLARE_ISR(uart1_irq_dispatcher) +{ + if (US1_CSR & BV(US_RXRDY)) + uart1_irq_rx(); + + if (US1_CSR & BV(US_TXEMPTY)) + uart1_irq_tx(); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + +/** + * SPI0 interrupt handler + */ +static DECLARE_ISR(spi0_irq_handler) +{ + SER_STROBE_ON; + + char c = SPI0_RDR; + /* Read incoming byte. */ + if (!fifo_isfull(&ser_handles[SER_SPI0]->rxfifo)) + fifo_push(&ser_handles[SER_SPI0]->rxfifo, c); + /* + * FIXME + else + ser_handles[SER_SPI0]->status |= SERRF_RXFIFOOVERRUN; + */ + + /* Send */ + if (!fifo_isempty(&ser_handles[SER_SPI0]->txfifo)) + SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo); + else + UARTDescs[SER_SPI0].sending = false; + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + SER_STROBE_OFF; +} + + +#if CPU_ARM_SAM7X +/** + * SPI1 interrupt handler + */ +static DECLARE_ISR(spi1_irq_handler) +{ + SER_STROBE_ON; + + char c = SPI1_RDR; + /* Read incoming byte. */ + if (!fifo_isfull(&ser_handles[SER_SPI1]->rxfifo)) + fifo_push(&ser_handles[SER_SPI1]->rxfifo, c); + /* + * FIXME + else + ser_handles[SER_SPI1]->status |= SERRF_RXFIFOOVERRUN; + */ + + /* Send */ + if (!fifo_isempty(&ser_handles[SER_SPI1]->txfifo)) + SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo); + else + UARTDescs[SER_SPI1].sending = false; + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + SER_STROBE_OFF; +} +#endif diff --git a/bertos/cpu/arm/drv/ser_at91.h b/bertos/cpu/arm/drv/ser_at91.h new file mode 100644 index 0000000..f7eb986 --- /dev/null +++ b/bertos/cpu/arm/drv/ser_at91.h @@ -0,0 +1,82 @@ +/** + * \file + * + * + * \brief High level serial I/O API + * + * \author Daniele Basile + */ + +#ifndef SER_AT91_H +#define SER_AT91_H + +#include /* BV() */ +#include /* uint32_t */ +#include /* CPU_* */ + +/** \name Serial Error/status flags. */ +/*\{*/ +typedef uint32_t serstatus_t; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ +#define SERRF_RXTIMEOUT BV(1) /**< Receive timeout */ +#define SERRF_TXTIMEOUT BV(2) /**< Transmit timeout */ + +/* + * Hardware errors. + * These flags map directly to the ARM USART Channel Status Register (US_CSR). + */ +#define SERRF_RXSROVERRUN BV(5) /**< Rx shift register overrun */ +#define SERRF_FRAMEERROR BV(6) /**< Stop bit missing */ +#define SERRF_PARITYERROR BV(7) /**< Parity error */ +#define SERRF_NOISEERROR 0 /**< Unsupported */ +/*\}*/ + +/** + * \name Serial hw numbers + * + * \{ + */ +enum +{ +SER_UART0, +SER_UART1, +SER_SPI0, +#if CPU_ARM_SAM7X +SER_SPI1, +#endif +SER_CNT /**< Number of serial ports */ +}; +/*\}*/ + +#endif /* SER_AT91_H */ diff --git a/bertos/cpu/arm/drv/ser_lpc2.c b/bertos/cpu/arm/drv/ser_lpc2.c new file mode 100644 index 0000000..ed4ca26 --- /dev/null +++ b/bertos/cpu/arm/drv/ser_lpc2.c @@ -0,0 +1,487 @@ +/** + * \file + * + * + * \brief LPC23xx UART driver. + * + * \author Andrea Righi + * + * notest:arm + */ + +#include "ser_lpc2.h" + +#include "cfg/cfg_ser.h" + +#include /* for BV() */ + +#include /* cpu_relax() */ + +#include +#include +#include /* vic_handler_t */ + +#include + + +/* Register offsets */ +#define RBR 0x00 +#define THR 0x00 +#define DLL 0x00 +#define DLM 0x04 +#define IER 0x04 +#define IIR 0x08 +#define FCR 0x08 +#define LCR 0x0c +#define LSR 0x14 +#define SCR 0x1c +#define ACR 0x20 +#define ICR 0x24 +#define FDR 0x28 +#define TER 0x30 + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +struct LPC2Serial +{ + struct SerialHardware hw; + bool sending; + int irq; +}; + +/* Forward declaration */ +static struct LPC2Serial UARTDesc[SER_CNT]; + +struct uart_config +{ + uint32_t base; + uint32_t pconp; + uint32_t pclksel0; + uint32_t pclksel0_mask; + uint32_t pclksel1; + uint32_t pclksel1_mask; + uint32_t pinsel0; + uint32_t pinsel0_mask; + uint32_t pinsel4; + uint32_t pinsel4_mask; +}; + +/* UART registers configuration */ +static const struct uart_config uart_param[] = +{ + /* UART0 */ + { + .base = UART0_BASE_ADDR, + .pconp = BV(3), + + .pclksel0 = BV(6), + .pclksel0_mask = BV(7) | BV(6), + + .pclksel1 = 0, + .pclksel1_mask = 0, + + .pinsel0 = BV(6) | BV(4), + .pinsel0_mask = BV(7) | BV(6) | BV(5) | BV(4), + + .pinsel4 = 0, + .pinsel4_mask = 0, + }, + /* UART1 */ + { + .base = UART1_BASE_ADDR, + .pconp = BV(4), + + .pclksel0 = BV(8), + .pclksel0_mask = BV(9) | BV(8), + + .pclksel1 = 0, + .pclksel1_mask = 0, + + .pinsel0 = 0, + .pinsel0_mask = 0, + + .pinsel4 = BV(3) | BV(1), + .pinsel4_mask = BV(3) | BV(2) | BV(1) | BV(0), + }, + /* UART2 */ + { + .base = UART2_BASE_ADDR, + .pconp = BV(24), + + .pclksel0 = 0, + .pclksel0_mask = 0, + + .pclksel1 = BV(16), + .pclksel1_mask = BV(17) | BV(16), + + .pinsel0 = 0, + .pinsel0_mask = 0, + + .pinsel4 = BV(19) | BV(17), + .pinsel4_mask = BV(19) | BV(18) | BV(17) | BV(16), + }, + /* UART3 */ + { + .base = UART3_BASE_ADDR, + .pconp = BV(25), + + .pclksel0 = 0, + .pclksel0_mask = 0, + + .pclksel1 = BV(18), + .pclksel1_mask = BV(19) | BV(18), + + .pinsel0 = BV(3) | BV(1), + .pinsel0_mask = BV(3) | BV(2) | BV(1) | BV(0), + + .pinsel4 = 0, + .pinsel4_mask = 0, + }, +}; + +static void lpc2_uartSetBaudRate(int port, unsigned long baud) +{ + cpu_flags_t flags; + + IRQ_SAVE_DISABLE(flags); + + /* LCR: DLAB = 1 (enable divisor modify) */ + *(reg8_t *)(uart_param[port].base + LCR) |= 0x80; + /* DLL */ + *(reg8_t *)(uart_param[port].base + DLL) = + DIV_ROUND(CPU_FREQ, 16 * baud) & 0xFF; + /* DLM */ + *(reg8_t *)(uart_param[port].base + DLM) = + (DIV_ROUND(CPU_FREQ, 16 * baud) >> 8) & 0xFF; + *(reg32_t *)(uart_param[port].base + LCR) &= ~0x80; + /* LCR: DLAB = 0 (disable divisor modify) */ + *(reg8_t *)(uart_param[port].base + LCR) &= ~0x80; + + IRQ_RESTORE(flags); +} + +static void lpc2_uartSetParity(int port, int parity) +{ + /* Set 8-bit word, one stop bit by default */ + uint32_t config = BV(1) | BV(0); + + cpu_flags_t flags; + + IRQ_SAVE_DISABLE(flags); + + switch(parity) + { + case SER_PARITY_NONE: + break; + case SER_PARITY_ODD: + config |= BV(3); + break; + case SER_PARITY_EVEN: + config |= BV(4) | BV(3); + break; + default: + ASSERT(0); + IRQ_RESTORE(flags); + return; + } + /* LCR */ + *(reg8_t *)(uart_param[port].base + LCR) = config; + + IRQ_RESTORE(flags); +} + +static void lpc2_uartPutChar(uint32_t base, uint8_t c) +{ + reg8_t *lsr = (reg8_t *)base + LSR; + reg8_t *thr = (reg8_t *)base + THR; + + while (!(*lsr & BV(6))) + cpu_relax(); + *thr = c; +} + +void lpc2_uartInit(int port) +{ + cpu_flags_t flags; + + IRQ_SAVE_DISABLE(flags); + + /* Power-on the device */ + PCONP |= uart_param[port].pconp; + /* Set UART clk to CPU_FREQ */ + PCLKSEL0 &= ~uart_param[port].pclksel0_mask; + PCLKSEL0 |= uart_param[port].pclksel0; + PCLKSEL1 &= ~uart_param[port].pclksel1_mask; + PCLKSEL1 |= uart_param[port].pclksel1; + + /* LCR: 8bit, 1 stop bit, no parity, DLAB = 1 (enable divisor modify) */ + *(reg8_t *)(uart_param[port].base + LCR) = 0x83; + /* DLL */ + *(reg8_t *)(uart_param[port].base + DLL) = + DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) & 0xFF; + /* DLM */ + *(reg8_t *)(uart_param[port].base + DLM) = + (DIV_ROUND(CPU_FREQ, 16 * CONFIG_KDEBUG_BAUDRATE) >> 8) & 0xFF; + /* FDR */ + *(reg32_t *)(uart_param[port].base + FDR) = 0x10; + + /* Assign TX pin to UART0*/ + PINSEL0 &= ~uart_param[port].pinsel0_mask; + PINSEL0 |= uart_param[port].pinsel0; + PINSEL4 &= ~uart_param[port].pinsel4_mask; + PINSEL4 |= uart_param[port].pinsel4; + /* LCR: set 8bit, 1 stop bit, no parity, DLAB = 0 (disable divisor modify) */ + *(reg8_t *)(uart_param[port].base + LCR) = 0x03; + + /* TER: Enable transmitter */ + *(reg8_t *)(uart_param[port].base + TER) = BV(7); + /* IER: Enable RBR interrupt */ + *(reg8_t *)(uart_param[port].base + IER) = BV(0); + + IRQ_RESTORE(flags); +} + +static bool tx_sending(struct SerialHardware *_hw) +{ + struct LPC2Serial *hw = (struct LPC2Serial *)_hw; + return hw->sending; +} + +INLINE bool lpc2_uartRxReady(int port) +{ + /* LSR: check Receiver Data Ready (RDR) bit */ + return *(reg8_t *)(uart_param[port].base + LSR) & BV(0) ? true : false; +} + +static void uart_irq_rx(int port) +{ + struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo; + char c; + + while (lpc2_uartRxReady(port)) + { + /* RBR: read a character from the Receiver Buffer Register */ + c = *(reg8_t *)(uart_param[port].base + RBR); + if (fifo_isfull(rxfifo)) + ser_handles[port]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + } +} + +INLINE bool lpc2_uartTxReady(int port) +{ + /* LSR: check Transmitter Holding Register Empty (THRE) bit */ + return *(reg8_t *)(uart_param[port].base + LSR) & BV(5) ? true : false; +} + +static void uart_irq_tx(int port) +{ + struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; + + while (lpc2_uartTxReady(port)) + { + /* + * Disable TX empty interrupts if there're no more + * characters to transmit. + */ + if (fifo_isempty(txfifo)) + { + /* IER: Disable THRE interrupt */ + *(reg8_t *)(uart_param[port].base + IER) &= ~BV(1); + UARTDesc[port].sending = false; + break; + } + /* THR: put a character to the Transmit Holding Register */ + *(reg8_t *)(uart_param[port].base + THR) = fifo_pop(txfifo); + } +} + +static void uart_common_irq_handler(int port) +{ + /* IIR: identify the interrupt source */ + uint32_t status = *(reg32_t *)(uart_param[port].base + IIR) >> 1 & 0x7; + + /* Receiver Data Ready (RDR) */ + if (status == 0x02) + uart_irq_rx(port); + /* Transmit Holding Register Empty (THRE) */ + else if (status == 0x01) + uart_irq_tx(port); + /* Signal the VIC we have completed the ISR */ + VICVectAddr = 0; +} + +static void lpc2_uartIRQEnable(int port, vic_handler_t handler) +{ + vic_setVector(UARTDesc[port].irq, handler); + vic_enable(UARTDesc[port].irq); +} + +static void lpc2_uartIRQDisable(int port) +{ + vic_disable(UARTDesc[port].irq); +} + +/* UART class definition */ +#define UART_PORT(port) \ + /* UART TX and RX buffers */ \ + static unsigned char \ + uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE]; \ + static unsigned char \ + uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE]; \ + \ + /* UART interrupt handler */ \ + static DECLARE_ISR(uart ## port ## _irq_handler) \ + { \ + uart_common_irq_handler(port); \ + } \ + \ + /* UART public methods */ \ + static void \ + uart ## port ## _txStart(struct SerialHardware *_hw) \ + { \ + struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; \ + struct LPC2Serial *hw = (struct LPC2Serial *)_hw; \ + \ + if (hw->sending) \ + return; \ + lpc2_uartPutChar(UART ## port ## _BASE_ADDR, fifo_pop(txfifo)); \ + if (!fifo_isempty(txfifo)) \ + { \ + hw->sending = true; \ + /* IER: Enable THRE interrupt */ \ + *(reg8_t *)(uart_param[port].base + IER) |= BV(1); \ + } \ + } \ + \ + static void \ + uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw), \ + unsigned long baud) \ + { \ + lpc2_uartSetBaudRate(port, baud); \ + } \ + \ + static void \ + uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw), \ + int parity) \ + { \ + lpc2_uartSetParity(port, parity); \ + } \ + \ + static void \ + uart ## port ## _cleanup(struct SerialHardware *_hw) \ + { \ + struct LPC2Serial *hw = (struct LPC2Serial *)_hw; \ + \ + hw->sending = false; \ + lpc2_uartIRQDisable(port); \ + } \ + \ + static void \ + uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw), \ + UNUSED_ARG(struct Serial *, ser)) \ + { \ + lpc2_uartInit(port); \ + lpc2_uartIRQEnable(port, uart ## port ## _irq_handler); \ + } \ + \ + /* UART operations */ \ + static const struct SerialHardwareVT UART ## port ## _VT = \ + { \ + .init = uart ## port ## _init, \ + .cleanup = uart ## port ## _cleanup, \ + .setBaudrate = uart ## port ## _setbaudrate, \ + .setParity = uart ## port ## _setparity, \ + .txStart = uart ## port ## _txStart, \ + .txSending = tx_sending, \ + }; + +/* UART port instances */ +UART_PORT(0) +UART_PORT(1) +UART_PORT(2) +UART_PORT(3) + +static struct LPC2Serial UARTDesc[SER_CNT] = +{ + { + .hw = { + .table = &UART0_VT, + .txbuffer = uart0_txbuffer, + .rxbuffer = uart0_rxbuffer, + .txbuffer_size = sizeof(uart0_txbuffer), + .rxbuffer_size = sizeof(uart0_rxbuffer), + }, + .sending = false, + .irq = INT_UART0, + }, + { + .hw = { + .table = &UART1_VT, + .txbuffer = uart1_txbuffer, + .rxbuffer = uart1_rxbuffer, + .txbuffer_size = sizeof(uart1_txbuffer), + .rxbuffer_size = sizeof(uart1_rxbuffer), + }, + .sending = false, + .irq = INT_UART1, + }, + { + .hw = { + .table = &UART2_VT, + .txbuffer = uart2_txbuffer, + .rxbuffer = uart2_rxbuffer, + .txbuffer_size = sizeof(uart2_txbuffer), + .rxbuffer_size = sizeof(uart2_rxbuffer), + }, + .sending = false, + .irq = INT_UART2, + }, + { + .hw = { + .table = &UART3_VT, + .txbuffer = uart3_txbuffer, + .rxbuffer = uart3_rxbuffer, + .txbuffer_size = sizeof(uart3_txbuffer), + .rxbuffer_size = sizeof(uart3_rxbuffer), + }, + .sending = false, + .irq = INT_UART3, + }, +}; + +struct SerialHardware *ser_hw_getdesc(int port) +{ + ASSERT(port >= 0 && port < SER_CNT); + return &UARTDesc[port].hw; +} diff --git a/bertos/cpu/arm/drv/ser_lpc2.h b/bertos/cpu/arm/drv/ser_lpc2.h new file mode 100644 index 0000000..cd0669d --- /dev/null +++ b/bertos/cpu/arm/drv/ser_lpc2.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \brief LPC23xx UART driver. + * + * \author Andrea Righi + */ + +#ifndef SER_LPC2_H +#define SER_LPC2_H + +#include +#include + +/* Serial hardware numbers */ +enum +{ + SER_UART0, + SER_UART1, + SER_UART2, + SER_UART3, + + SER_CNT //< Number of serial ports +}; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) //< Rx FIFO buffer overrun +#define SERRF_RXTIMEOUT BV(1) //< Receive timeout +#define SERRF_TXTIMEOUT BV(2) //< Transmit timeout + +/* + * Hardware errors. + */ +#define SERRF_RXSROVERRUN 0 //< Input overrun +#define SERRF_FRAMEERROR 0 //< Stop bit missing +#define SERRF_PARITYERROR 0 //< Parity error +#define SERRF_NOISEERROR 0 //< Noise error + +/* Serial error/status flags */ +typedef uint32_t serstatus_t; + +void lpc2_uartInit(int port); + +#endif /* SER_LPC2_H */ diff --git a/bertos/cpu/arm/drv/spi_dma_at91.c b/bertos/cpu/arm/drv/spi_dma_at91.c new file mode 100644 index 0000000..57ed2fb --- /dev/null +++ b/bertos/cpu/arm/drv/spi_dma_at91.c @@ -0,0 +1,170 @@ +/** + * \file + * + * + * \brief SPI driver with DMA. + * + * \author Francesco Sacchi + * \author Luca Ottaviano + */ + +#include + +#include "cfg/cfg_spi_dma.h" +#include "hw/hw_spi_dma.h" + +#include +#include + +#include +#include + +#include + +#include +#include + +#include /* memset */ + + +void spi_dma_setclock(uint32_t rate) +{ + SPI0_CSR0 &= ~SPI_SCBR; + + ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate)); + SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT; +} + + +static int spi_dma_flush(UNUSED_ARG(struct KFile *, fd)) +{ + /* Wait for DMA to finish */ + while (!(SPI0_SR & BV(SPI_TXBUFE))) + cpu_relax(); + + /* Wait until last bit has been shifted out */ + while (!(SPI0_SR & BV(SPI_TXEMPTY))) + cpu_relax(); + + return 0; +} + +static size_t spi_dma_write(struct KFile *fd, const void *_buf, size_t size) +{ + SPI0_PTCR = BV(PDC_TXTDIS); + SPI0_TPR = (reg32_t)_buf; + SPI0_TCR = size; + SPI0_PTCR = BV(PDC_TXTEN); + spi_dma_flush(fd); + return size; +} + + +/* + * Dummy buffer used to transmit 0xff chars while receiving data. + * This buffer is completetly constant and the compiler should allocate it + * in flash memory. + */ +static const uint8_t tx_dummy_buf[CONFIG_SPI_DMA_MAX_RX] = { [0 ... (CONFIG_SPI_DMA_MAX_RX - 1)] = 0xFF }; + +static size_t spi_dma_read(UNUSED_ARG(struct KFile *, fd), void *_buf, size_t size) +{ + size_t count, total_rx = 0; + uint8_t *buf = (uint8_t *)_buf; + + while (size) + { + count = MIN(size, (size_t)CONFIG_SPI_DMA_MAX_RX); + + SPI0_PTCR = BV(PDC_TXTDIS) | BV(PDC_RXTDIS); + + SPI0_RPR = (reg32_t)buf; + SPI0_RCR = count; + SPI0_TPR = (reg32_t)tx_dummy_buf; + SPI0_TCR = count; + + /* Avoid reading the previous sent char */ + *buf = SPI0_RDR; + + /* Start transfer */ + SPI0_PTCR = BV(PDC_RXTEN) | BV(PDC_TXTEN); + + /* wait for transfer to finish */ + while (!(SPI0_SR & BV(SPI_ENDRX))) + cpu_relax(); + + size -= count; + total_rx += count; + buf += count; + } + SPI0_PTCR = BV(PDC_RXTDIS) | BV(PDC_TXTDIS); + + return total_rx; +} + +#define SPI_DMA_IRQ_PRIORITY 4 + +void spi_dma_init(SpiDma *spi) +{ + /* Disable PIO on SPI pins */ + PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); + + /* Reset device */ + SPI0_CR = BV(SPI_SWRST); + + /* + * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, + * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 + */ + SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + + /* + * Set SPI mode. + * At reset clock division factor is set to 0, that is + * *forbidden*. Set SPI clock to minimum to keep it valid. + */ + SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + + /* Disable all irqs */ + SPI0_IDR = 0xFFFFFFFF; + /* Enable SPI clock. */ + PMC_PCER = BV(SPI0_ID); + + /* Enable SPI */ + SPI0_CR = BV(SPI_SPIEN); + + DB(spi->fd._type = KFT_SPIDMA); + spi->fd.write = spi_dma_write; + spi->fd.read = spi_dma_read; + spi->fd.flush = spi_dma_flush; + + SPI_DMA_STROBE_INIT(); +} diff --git a/bertos/cpu/arm/drv/spi_dma_at91.h b/bertos/cpu/arm/drv/spi_dma_at91.h new file mode 100644 index 0000000..7dc5e27 --- /dev/null +++ b/bertos/cpu/arm/drv/spi_dma_at91.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief SPI driver with DMA. + * + * \note Only one copy of SpiDmaAt91 is allowed for each application. + * + * \author Francesco Sacchi + * \author Luca Ottaviano + */ + +#ifndef DRV_SPI_DMA_AT91_H +#define DRV_SPI_DMA_AT91_H + +#include + +typedef struct SpiDmaAt91 +{ + KFile fd; +} SpiDmaAt91; + +#define KFT_SPIDMAAT91 MAKE_ID('S', 'P', 'I', 'A') + +INLINE SpiDmaAt91 * SPIDMAAT91_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_SPIDMAAT91); + return (SpiDmaAt91 *)fd; +} + +/** + * Init DMA SPI driver. + * \param spi A pointer to a SpiDmaAt91 structure. + */ +void spi_dma_init(SpiDmaAt91 *spi); + +/** + * Set the clock rate for SPI bus. + * + * \param rate The rate you want to set for SPI. + */ +void spi_dma_setclock(uint32_t rate); + +#endif /* DRV_SPI_DMA_AT91_H */ diff --git a/bertos/cpu/arm/drv/stepper_arm.c b/bertos/cpu/arm/drv/stepper_arm.c new file mode 100644 index 0000000..93d02d9 --- /dev/null +++ b/bertos/cpu/arm/drv/stepper_arm.c @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Low-level stepper timer module for ARM (inplementation). + * + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + */ +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use stepper_at91.c + + #include + + #if CPU_ARM_AT91 + #include "stepper_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ + diff --git a/bertos/cpu/arm/drv/stepper_arm.h b/bertos/cpu/arm/drv/stepper_arm.h new file mode 100644 index 0000000..f01263b --- /dev/null +++ b/bertos/cpu/arm/drv/stepper_arm.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Low-level stepper timer module for ARM (inplementation). + * + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "stepper_at91.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/arm/drv/stepper_at91.c b/bertos/cpu/arm/drv/stepper_at91.c new file mode 100644 index 0000000..df748da --- /dev/null +++ b/bertos/cpu/arm/drv/stepper_at91.c @@ -0,0 +1,417 @@ +/** + * \file + * + * + * \brief Stepper driver interface implementation. + * + * This module use the three timer on the at91 family, to generate a + * six periodic variable pwm waveform. The pulse width is fix, and could + * change by setting the STEPPER_DELAY_ON_COMPARE_C define, but you make + * an attention to do this, becouse the pulse width is not exactly + * STEPPER_DELAY_ON_COMPARE_C. The pulse width depend also to latency + * time of cpu to serve an interrupt, this generate an pwm waveform affect + * to noise. This noise not effect the period but only the pulse width, + * becouse the raising edge is generate by hardware comply with the our + * period settings. + * + * Note: is most important to set STEPPER_DELAY_ON_COMPARE_C value minor + * than a interrupt time service, becouse the falling edge must be happen + * inside to inerrupt service to guarantee a correct functionaly of pwm + * generator. + * + * + * + * \author Daniele Basile + */ + +#include "stepper_at91.h" + +#include "cfg/cfg_stepper.h" +#include +#include + +#include +#include + +#include + + +/* + * Delay to set C compare to clear output + * on select TIO output + */ +#define STEPPER_DELAY_ON_COMPARE_C 20 + +/* + * Forward declaration for interrupt handler + */ +static ISR_PROTO(stepper_tc0_irq); +static ISR_PROTO(stepper_tc1_irq); +static ISR_PROTO(stepper_tc2_irq); + +///< Static array of timer counter struct for stepper. +static struct TimerCounter stepper_timers[CONFIG_TC_STEPPER_MAX_NUM] = +{ + { //Timer Counter settings for TIOA0 output pin + .timer_id = TC0_ID, + .blk_ctrl_set = TC_NONEXC0, + .chl_mode_reg = &TC0_CMR, + .chl_ctrl_reg = &TC0_CCR, + .comp_effect_mask = TC_ACPA_MASK, + .comp_effect_set = TC_ACPA_SET_OUTPUT, + .comp_effect_clear = TC_ACPA_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_ACPC_MASK, + .comp_effect_c_clear = TC_ACPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC0, + .comp_reg = &TC0_RA, + .comp_c_reg = &TC0_RC, + .count_val_reg = &TC0_CV, + .irq_enable_reg = &TC0_IER, + .irq_disable_reg = &TC0_IDR, + .irq_set_mask = BV(TC_CPAS), + .irq_mask_reg = &TC0_IMR, + .isr = stepper_tc0_irq, + .status_reg = &TC0_SR, + .tio_pin = TIOA0, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOB0 output pin + .timer_id = TC0_ID, + .blk_ctrl_set = TC_NONEXC0, + .chl_mode_reg = &TC0_CMR, + .chl_ctrl_reg = &TC0_CCR, + .comp_reg = &TC0_RB, + .comp_c_reg = &TC0_RC, + .count_val_reg = &TC0_CV, + .comp_effect_mask = TC_BCPB_MASK, + .comp_effect_set = TC_BCPB_SET_OUTPUT, + .comp_effect_clear = TC_BCPB_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_BCPC_MASK, + .comp_effect_c_clear = TC_BCPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC0, + .irq_enable_reg = &TC0_IER, + .irq_disable_reg = &TC0_IDR, + .irq_set_mask = BV(TC_CPBS), + .irq_mask_reg = &TC0_IMR, + .isr = stepper_tc0_irq, + .status_reg = &TC0_SR, + .tio_pin = TIOB0, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOA1 output pin + .timer_id = TC1_ID, + .blk_ctrl_set = TC_NONEXC1, + .chl_mode_reg = &TC1_CMR, + .chl_ctrl_reg = &TC1_CCR, + .comp_reg = &TC1_RA, + .comp_c_reg = &TC1_RC, + .count_val_reg = &TC1_CV, + .comp_effect_mask = TC_ACPA_MASK, + .comp_effect_set = TC_ACPA_SET_OUTPUT, + .comp_effect_clear = TC_ACPA_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_ACPC_MASK, + .comp_effect_c_clear = TC_ACPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC1, + .irq_enable_reg = &TC1_IER, + .irq_disable_reg = &TC1_IDR, + .irq_set_mask = BV(TC_CPAS), + .irq_mask_reg = &TC1_IMR, + .isr = stepper_tc1_irq, + .status_reg = &TC1_SR, + .tio_pin = TIOA1, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOB1 output pin + .timer_id = TC1_ID, + .blk_ctrl_set = TC_NONEXC1, + .chl_mode_reg = &TC1_CMR, + .chl_ctrl_reg = &TC1_CCR, + .comp_reg = &TC1_RB, + .comp_c_reg = &TC1_RC, + .count_val_reg = &TC1_CV, + .comp_effect_mask = TC_BCPB_MASK, + .comp_effect_set = TC_BCPB_SET_OUTPUT, + .comp_effect_clear = TC_BCPB_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_BCPC_MASK, + .comp_effect_c_clear = TC_BCPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC1, + .irq_enable_reg = &TC1_IER, + .irq_disable_reg = &TC1_IDR, + .irq_set_mask = BV(TC_CPBS), + .irq_mask_reg = &TC1_IMR, + .isr = stepper_tc1_irq, + .status_reg = &TC1_SR, + .tio_pin = TIOB1, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOA2 output pin + .timer_id = TC2_ID, + .blk_ctrl_set = TC_NONEXC2, + .chl_mode_reg = &TC2_CMR, + .chl_ctrl_reg = &TC2_CCR, + .comp_reg = &TC2_RA, + .comp_c_reg = &TC2_RC, + .count_val_reg = &TC2_CV, + .comp_effect_mask = TC_ACPA_MASK, + .comp_effect_set = TC_ACPA_SET_OUTPUT, + .comp_effect_clear = TC_ACPA_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_ACPC_MASK, + .comp_effect_c_clear = TC_ACPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC2, + .irq_enable_reg = &TC2_IER, + .irq_disable_reg = &TC2_IDR, + .irq_set_mask = BV(TC_CPAS), + .irq_mask_reg = &TC2_IMR, + .isr = stepper_tc2_irq, + .status_reg = &TC2_SR, + .tio_pin = TIOA2, + .callback = NULL, + .motor = NULL, + }, + { //Timer Counter settings for TIOB2 output pin + .timer_id = TC2_ID, + .blk_ctrl_set = TC_NONEXC2, + .chl_mode_reg = &TC2_CMR, + .chl_ctrl_reg = &TC2_CCR, + .comp_reg = &TC2_RB, + .comp_c_reg = &TC2_RC, + .count_val_reg = &TC2_CV, + .comp_effect_mask = TC_BCPB_MASK, + .comp_effect_set = TC_BCPB_SET_OUTPUT, + .comp_effect_clear = TC_BCPB_CLEAR_OUTPUT, + .comp_effect_c_mask = TC_BCPC_MASK, + .comp_effect_c_clear = TC_BCPC_CLEAR_OUTPUT, + .ext_event_set = TC_EEVT_XC2, + .irq_enable_reg = &TC2_IER, + .irq_disable_reg = &TC2_IDR, + .irq_set_mask = BV(TC_CPBS), + .irq_mask_reg = &TC2_IMR, + .isr = stepper_tc2_irq, + .status_reg = &TC2_SR, + .tio_pin = TIOB2, + .callback = NULL, + .motor = NULL, + } +}; + +/** + * Generic TIO interrupt handler. + */ +INLINE void stepper_tc_tio_irq(struct TimerCounter * t) +{ + // + *t->chl_mode_reg &= ~t->comp_effect_c_mask; + *t->chl_mode_reg |= t->comp_effect_c_clear; + + /* + * Cleat TIO output on c register compare. + * This generate an pulse with variable lenght, this + * depend to delay that interrupt is realy service. + */ + *t->comp_c_reg = *t->count_val_reg + STEPPER_DELAY_ON_COMPARE_C; + + //Call the associate callback + t->callback(t->motor); + + *t->chl_mode_reg &= ~t->comp_effect_c_mask; +} + + +/* + * Interrupt handler for timer counter TCKL0 + */ +DECLARE_ISR(stepper_tc0_irq) +{ + /* + * Warning: when we read the status_reg register, we reset it. + * That mean if is occur an interrupt event we can read only + * the last that has been occur. To not miss an interrupt event + * we save the status_reg register and then we read it. + */ + uint32_t status_reg = TC0_SR & TC0_IMR; + + if (status_reg & BV(TC_CPAS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOA0]); + + if (status_reg & BV(TC_CPBS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOB0]); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + +} + +/* + * Interrupt handler for timer counter TCKL1 + */ +DECLARE_ISR(stepper_tc1_irq) +{ + /* + * Warning: when we read the status_reg register, we reset it. + * That mean if is occur an interrupt event we can read only + * the last that has been occur. To not miss an interrupt event + * we save the status_reg register and then we read it. + */ + uint32_t status_reg = TC1_SR & TC1_IMR; + + if (status_reg & BV(TC_CPAS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOA1]); + + if (status_reg & BV(TC_CPBS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOB1]); + + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + + +/* + * Interrupt handler for timer counter TCKL2 + */ +DECLARE_ISR(stepper_tc2_irq) +{ + + /* + * Warning: when we read the status_reg register, we reset it. + * That mean if is occur an interrupt event we can read only + * the last that has been occur. To not miss an interrupt event + * we save the status_reg register and then we read it. + */ + uint32_t status_reg = TC2_SR & TC2_IMR; + + if (status_reg & BV(TC_CPAS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOA2]); + + if (status_reg & BV(TC_CPBS)) + stepper_tc_tio_irq(&stepper_timers[TC_TIOB2]); + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; + +} + +/** + * Timer couter setup. + * + * This function apply to select timer couter all needed settings. + * Every settings are stored in stepper_timers[]. + */ +void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor) +{ + ASSERT(index < CONFIG_TC_STEPPER_MAX_NUM); + + motor->timer = &stepper_timers[index]; + + //Disable PIO controller and enable TIO function + TIO_PIO_PDR = BV(motor->timer->tio_pin); + TIO_PIO_ABSR = BV(motor->timer->tio_pin); + + /* + * Sets timer counter in waveform mode. + * We set as default: + * - Waveform mode 00 (see datasheet for more detail.) + * - Master clock prescaler to STEPPER_MCK_PRESCALER + * - Set none external event + * - Clear pin output on comp_reg + * - None effect on reg C compare + */ + *motor->timer->chl_mode_reg = BV(TC_WAVE); + *motor->timer->chl_mode_reg |= motor->timer->ext_event_set; + *motor->timer->chl_mode_reg &= ~TC_WAVSEL_MASK; + *motor->timer->chl_mode_reg |= TC_WAVSEL_UP; + *motor->timer->chl_mode_reg |= STEPPER_MCK_PRESCALER; + *motor->timer->chl_mode_reg |= motor->timer->comp_effect_clear; + *motor->timer->chl_mode_reg &= ~motor->timer->comp_effect_c_mask; + + //Reset comp_reg and C compare register + *motor->timer->comp_reg = 0; + *motor->timer->comp_c_reg = 0; + + //Register interrupt vector + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Warning: To guarantee a correct management of interrupt event, we must + * trig the interrupt on level sensitive. This becouse, we have only a common + * line for interrupt request, and if we have at the same time two interrupt + * request could be that the is service normaly but the second will never + * been detected and interrupt will stay active but never serviced. + */ + AIC_SVR(motor->timer->timer_id) = motor->timer->isr; + AIC_SMR(motor->timer->timer_id) = AIC_SRCTYPE_INT_LEVEL_SENSITIVE; + AIC_IECR = BV(motor->timer->timer_id); + + // Disable interrupt on select timer counter + stepper_tc_irq_disable(motor->timer); + + IRQ_RESTORE(flags); + + //Register callback + motor->timer->callback = callback; + motor->timer->motor = motor; +} + +/** + * Timer counter init. + */ +void stepper_tc_init(void) +{ + STEPPER_STROBE_INIT; + + ASSERT(CONFIG_NUM_STEPPER_MOTORS <= CONFIG_TC_STEPPER_MAX_NUM); + + /* + * Enable timer counter: + * - power on all timer counter + * - disable all interrupt + * - disable all external event/timer source + */ + for (int i = 0; i < CONFIG_TC_STEPPER_MAX_NUM; i++) + { + PMC_PCER = BV(stepper_timers[i].timer_id); + *stepper_timers[i].irq_disable_reg = 0xFFFFFFFF; + TC_BMR = stepper_timers[i].blk_ctrl_set; + } + + /* + * Enable timer counter and start it. + */ + for (int i = 0; i < CONFIG_TC_STEPPER_MAX_NUM; i++) + *stepper_timers[i].chl_ctrl_reg = (BV(TC_CLKEN) | BV(TC_SWTRG)); + +} + diff --git a/bertos/cpu/arm/drv/stepper_at91.h b/bertos/cpu/arm/drv/stepper_at91.h new file mode 100644 index 0000000..d4ad6f9 --- /dev/null +++ b/bertos/cpu/arm/drv/stepper_at91.h @@ -0,0 +1,185 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * + * \author Daniele Basile + */ + + +#include +#include +#include +#include + +/** + * Setting master clock prescaler for all timer couter + * + * You could choise one of these: + * - TC_CLKS_MCK2: Selects MCK / 2 + * - TC_CLKS_MCK8: Selects MCK / 8 + * - TC_CLKS_MCK32: Selects MCK / 32 + * - TC_CLKS_MCK128: Selects MCK / 128 + * - TC_CLKS_MCK1024: Selects MCK / 1024 + */ +#if STEPPER_PRESCALER_LOG2 == 1 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK2 +#elif STEPPER_PRESCALER_LOG2 == 3 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK8 +#elif STEPPER_PRESCALER_LOG2 == 5 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK32 +#elif STEPPER_PRESCALER_LOG2 == 7 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK128 +#elif STEPPER_PRESCALER_LOG2 == 10 + #define STEPPER_MCK_PRESCALER TC_CLKS_MCK1024 +#else + #error Unsupported stepper prescaler value. +#endif + +/** + * Timer counter hw enumeration. + */ +enum +{ + TC_TIOA0 = 0, + TC_TIOB0, + TC_TIOA1, + TC_TIOB1, + TC_TIOA2, + TC_TIOB2, + + TC_CNT +}; + +/** + * IRQ callback function type definition. + */ +typedef void (*irq_t)(void); + +/** + * Timer contex structure. + */ +typedef struct TimerCounter +{ + int timer_id; ///< Timer counter ID + uint32_t blk_ctrl_set; ///< Control block setting for this timer + reg32_t *chl_mode_reg; ///< Channel mode register + reg32_t *chl_ctrl_reg; ///< Channel control register + reg32_t *comp_reg; ///< Compare register + reg32_t *comp_c_reg; ///< C compare register + reg32_t *count_val_reg; ///< Current timer counter value + uint32_t comp_effect_mask; ///< Bit mask for TIO register compare effects + uint32_t comp_effect_set; ///< Set TIO on register compare event + uint32_t comp_effect_clear; ///< Clear TIO on register compare event + uint32_t comp_effect_c_mask; ///< Bit mask for TIO on C register compare effects + uint32_t comp_effect_c_clear; ///< Clear TIO on C register compare event + uint32_t ext_event_set; ///< Setting for extern event trigger for TIOB + reg32_t *irq_enable_reg; ///< Enable interrupt register + reg32_t *irq_disable_reg; ///< Disable interrupt register + uint32_t irq_set_mask; ///< IRQ flag bit for select TIO + reg32_t *irq_mask_reg; ///< IRQ mask register + irq_t isr; ///< IRQ handler + reg32_t *status_reg; ///< Timer status register + int tio_pin; ///< Timer I/O pin + stepper_isr_t callback; ///< Interrupt callback pointer + struct Stepper *motor; ///< Stepper context structure + +} TimerCounter; + +/** + * Enable interrupt for timer counter compare event. + */ +INLINE void stepper_tc_irq_enable(struct TimerCounter *timer) +{ + *timer->irq_enable_reg = timer->irq_set_mask; +} + +/** + * Disable interrupt for timer counter compare event. + */ +INLINE void stepper_tc_irq_disable(struct TimerCounter *timer) +{ + *timer->irq_disable_reg = timer->irq_set_mask; +} + +/** + * Set delay for next interrupt compare event. + */ +INLINE void stepper_tc_setDelay(struct TimerCounter *timer, stepper_time_t delay) +{ + *timer->comp_reg += delay; +} + + +/** + * Set delay for next interrupt compare event. + */ +INLINE void stepper_tc_resetTimer(struct TimerCounter *timer) +{ + *timer->comp_reg = 0; +} + +/** + * Programm timer counter to generate a pulse on select TIO output. + */ +INLINE void FAST_FUNC stepper_tc_doPulse(struct TimerCounter *timer) +{ + *timer->chl_mode_reg &= ~timer->comp_effect_mask; + *timer->chl_mode_reg |= timer->comp_effect_set; +} + +/** + * Programm timer counter to not generate a pulse on select TIO output. + */ +INLINE void FAST_FUNC stepper_tc_skipPulse(struct TimerCounter *timer) +{ + *timer->chl_mode_reg &= ~timer->comp_effect_mask; +} + +void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor); +void stepper_tc_init(void); + +/* + * Test the hardware timer counter on board. + * This test generate a square waveform through irq, setting + * the timer register. + */ +void stepper_timer_test_brute(void); +/* + * Test the timer driver structure. + * This test generate a square waveform through irq. + * The irq callback is programmable, and all timer setting + * are save in one data structure. Every pulse is generate through + * a call of this irq callback. + */ +void stepper_timer_test_prestepper(struct Stepper *local_motor, struct StepperConfig *local_cfg, int index); diff --git a/bertos/cpu/arm/drv/stepper_at91_hwtest.c b/bertos/cpu/arm/drv/stepper_at91_hwtest.c new file mode 100644 index 0000000..19b3031 --- /dev/null +++ b/bertos/cpu/arm/drv/stepper_at91_hwtest.c @@ -0,0 +1,174 @@ +/** + * \file + * + * + * \brief Low level test for stepper driver interface implementation. + * + * + * \author Daniele Basile + */ + +#include "stepper_at91.h" + +#include "cfg/cfg_stepper.h" +#include +#include + +#include +#include + +#include + + +#warning FIXME:This test is incomplete.. you MUST review.. + +#if 0 +static void stepper_test_irq_schedule(struct Stepper *motor, stepper_time_t delay) +{ + stepper_tc_doPulse(motor->timer); + stepper_tc_setDelay(motor->timer, delay); +} + +static void stepper_test_irq(struct Stepper *motor) +{ + + stepper_test_irq_schedule(motor, 300); +} +/* + * Test a timer couter driver + */ +void stepper_timer_test_prestepper(struct Stepper *local_motor, struct StepperConfig *local_cfg, int index) +{ + local_cfg->pulse = 300; + + local_motor->cfg = local_cfg; + stepper_tc_init(index, &stepper_test_irq, local_motor); + stepper_tc_irq_enable(local_motor->timer); +} + + +bool su = true; +bool sub = true; +uint16_t periodo_st0 = 100; +uint16_t periodo_st1 = 233; + +static void tc_irq(void) __attribute__ ((interrupt)); +static void tc_irq(void) +{ + uint32_t status_reg = TC2_SR & TC2_IMR; + + if (status_reg & BV(TC_CPAS)) + { + TC2_CMR &= ~TC_ACPA_MASK; + if (su) + { + TC2_CMR |= TC_ACPA_CLEAR_OUTPUT; + TC2_RA += periodo_st0; + } + else + { + TC2_CMR |= TC_ACPA_SET_OUTPUT; + TC2_RA += periodo_st1; + } + su = !su; + } + if (status_reg & BV(TC_CPBS)) + { + TC2_CMR &= ~TC_BCPB_MASK ; + if (sub) + { + TC2_CMR |= TC_BCPB_CLEAR_OUTPUT; + TC2_RB += periodo_st0; + } + else + { + TC2_CMR |= TC_BCPB_SET_OUTPUT; + TC2_RB += periodo_st1; + } + sub = !sub; + } + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + +/* + * Test a timer couter hardware + */ +void stepper_timer_test_brute(void) +{ + PIOA_PDR |= BV(26) | BV(27); + PIOA_BSR |= BV(26) | BV(27); + + // Power on TCLK0 + PMC_PCER |= BV(TC2_ID);// | BV(TC1_ID) | BV(TC2_ID); + + TC_BCR = 1; + TC_BMR |= TC_NONEXC2; + + // Select waveform mode + TC2_CMR = BV(TC_WAVE); + + TC2_CMR |= TC_EEVT_XC2; + TC2_CMR |= TC_WAVSEL_UP; + TC2_CMR |= TC_CLKS_MCK8; + + //Set waveform on TIOA and TIOB + TC2_CMR |= TC_ACPA_SET_OUTPUT; + TC2_CMR |= TC_BCPB_SET_OUTPUT; + + + //Reset all comp_reg register + TC2_RA = 0; + TC2_RB = 0; + + cpuflags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Set the vector. */ + AIC_SVR(TC2_ID) = tc_irq; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(TC2_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED; + /* Enable the USART IRQ */ + AIC_IECR = BV(TC2_ID); + + IRQ_RESTORE(flags); + + // Disable all interrupt + TC2_IDR = 0xFFFFFFFF; + + //Enable interrupt on RA, RB + TC2_IER = BV(TC_CPAS) | BV(TC_CPBS); + + //Enable timer and trig it + TC2_CCR = BV(TC_CLKEN) | BV(TC_SWTRG); +} +#endif + diff --git a/bertos/cpu/arm/drv/sysirq_at91.c b/bertos/cpu/arm/drv/sysirq_at91.c new file mode 100644 index 0000000..23596e5 --- /dev/null +++ b/bertos/cpu/arm/drv/sysirq_at91.c @@ -0,0 +1,176 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief System IRQ handler for Atmel AT91 ARM7 processors. + * + * In Atmel AT91 ARM7TDMI processors, there are various + * peripheral interrupt sources. + * In general, every source has its own interrupt vector, so it + * is possible to assign a specific handler for each interrupt + * independently. + * However, there are a few sources called "system sources" that + * share a common IRQ line and vector, called "system IRQ". + * So a unique system IRQ dispatcher is implemented here. + * This module also contains an interface to manage every source + * independently. It is possible to assign to every system IRQ + * a specific IRQ handler. + * + * \see sysirq_setHandler + * \see sysirq_setEnable + */ + +#include "sysirq_at91.h" +#include +#include +#include +#include +#include + +/** + * Enable/disable the Periodic Interrupt Timer + * interrupt. + */ +INLINE void pit_setEnable(bool enable) +{ + if (enable) + PIT_MR |= BV(PITIEN); + else + PIT_MR &= ~BV(PITIEN); +} + +/** + * Table containing all system irqs. + */ +static SysIrq sysirq_tab[] = +{ + /* PIT, Periodic Interval Timer (System timer)*/ + { + .enabled = false, + .setEnable = pit_setEnable, + .handler = NULL, + }, + /* TODO: add other system sources here */ +}; + +STATIC_ASSERT(countof(sysirq_tab) == SYSIRQ_CNT); + +/** + * System IRQ dispatcher. + * This is the entry point for all system IRQs in AT91. + * This function checks for interrupt enable state of + * various sources (system timer, etc..) and calls + * the corresponding handler. + * + * \note On AT91SAM7, all system IRQs (timer included) are handled + * by the sysirq_dispatcher, so we can't differentiate between + * context-switch and non-context-switch ISR inside this + * class of IRQs. + */ +static DECLARE_ISR_CONTEXT_SWITCH(sysirq_dispatcher) +{ + unsigned int i; + + for (i = 0; i < countof(sysirq_tab); i++) + { + if (sysirq_tab[i].enabled + && sysirq_tab[i].handler) + sysirq_tab[i].handler(); + } + + /* Inform hw that we have served the IRQ */ + AIC_EOICR = 0; +} + +#define SYSIRQ_PRIORITY 0 ///< default priority for system irqs. + + +MOD_DEFINE(sysirq); + +/** + * Init system IRQ handling. + * \note all system interrupts are disabled. + */ +void sysirq_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Disable all system interrupts */ + for (unsigned i = 0; i < countof(sysirq_tab); i++) + sysirq_tab[i].setEnable(false); + + /* Set the vector. */ + AIC_SVR(SYSC_ID) = sysirq_dispatcher; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(SYSC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED | SYSIRQ_PRIORITY; + /* Clear pending interrupt */ + AIC_ICCR = BV(SYSC_ID); + /* Enable the system IRQ */ + AIC_IECR = BV(SYSC_ID); + + IRQ_RESTORE(flags); + MOD_INIT(sysirq); +} + + +/** + * Helper function used to set handler for system IRQ \a irq. + */ +void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler) +{ + ASSERT(irq < SYSIRQ_CNT); + sysirq_tab[irq].handler = handler; +} + +/** + * Helper function used to enable/disable system IRQ \a irq. + */ +void sysirq_setEnable(sysirq_t irq, bool enable) +{ + ASSERT(irq < SYSIRQ_CNT); + + sysirq_tab[irq].setEnable(enable); + sysirq_tab[irq].enabled = enable; +} + +/** + * Helper function used to get system IRQ \a irq state. + */ +bool sysirq_enabled(sysirq_t irq) +{ + ASSERT(irq < SYSIRQ_CNT); + + return sysirq_tab[irq].enabled; +} diff --git a/bertos/cpu/arm/drv/sysirq_at91.h b/bertos/cpu/arm/drv/sysirq_at91.h new file mode 100644 index 0000000..186c44c --- /dev/null +++ b/bertos/cpu/arm/drv/sysirq_at91.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief System irq handler for Atmel AT91 ARM7 processors (interface). + */ + +#ifndef DRV_AT91_SYSIRQ_H +#define DRV_AT91_SYSIRQ_H + +#include + +typedef void (* sysirq_handler_t)(void); ///< Type for system irq handler. +typedef void (* sysirq_setEnable_t)(bool); ///< Type for system irq enable/disable function. + +/** + * Structure used to define a system interrupt source. + */ +typedef struct SysIrq +{ + bool enabled; ///< Getter for irq enable/disable state. + sysirq_setEnable_t setEnable; ///< Setter for irq enable/disable state. + sysirq_handler_t handler; ///< IRQ handler. +} SysIrq; + +/** + * System IRQ ID list. + */ +typedef enum sysirq_t +{ + SYSIRQ_PIT, ///< Periodic Interval Timer + /* TODO: add all system irqs */ + SYSIRQ_CNT +} sysirq_t; + +void sysirq_init(void); +void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler); +void sysirq_setEnable(sysirq_t irq, bool enable); +bool sysirq_enabled(sysirq_t irq); + +#endif /* ARCH_ARM_SYSIRQ_H */ diff --git a/bertos/cpu/arm/drv/timer_arm.c b/bertos/cpu/arm/drv/timer_arm.c new file mode 100644 index 0000000..6a7339f --- /dev/null +++ b/bertos/cpu/arm/drv/timer_arm.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for ARM (inplementation). + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use timer_at91.c + + #include + #include + + #if CPU_ARM_AT91 + #include "timer_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif + +#endif /* WIZ_AUTOGEN */ diff --git a/bertos/cpu/arm/drv/timer_arm.h b/bertos/cpu/arm/drv/timer_arm.h new file mode 100644 index 0000000..61a37f2 --- /dev/null +++ b/bertos/cpu/arm/drv/timer_arm.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for ARM (interface). + */ + +#include + +#if CPU_ARM_AT91 + #include "timer_at91.h" +#elif CPU_ARM_LPC2 + #include "timer_lpc2.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/arm/drv/timer_at91.c b/bertos/cpu/arm/drv/timer_at91.c new file mode 100644 index 0000000..beab00d --- /dev/null +++ b/bertos/cpu/arm/drv/timer_at91.c @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for Atmel AT91 (inplementation). + */ + +#include "timer_at91.h" +#include +#include "sysirq_at91.h" + +#include // BV() +#include +#include +#include + + +/** HW dependent timer initialization */ +#if (CONFIG_TIMER == TIMER_ON_PIT) + + ISR_PROTO_CONTEXT_SWITCH(timer_handler); + + void timer_hw_init(void) + { + sysirq_init(); + + cpu_flags_t flags; + + MOD_CHECK(sysirq); + + IRQ_SAVE_DISABLE(flags); + + PIT_MR = TIMER_HW_CNT; + /* Register system interrupt handler. */ + sysirq_setHandler(SYSIRQ_PIT, timer_handler); + + /* Enable interval timer and interval timer interrupts */ + PIT_MR |= BV(PITEN); + sysirq_setEnable(SYSIRQ_PIT, true); + + /* Reset counters, this is needed to start timer and interrupt flags */ + uint32_t dummy = PIVR; + (void) dummy; + + IRQ_RESTORE(flags); + } + +#else + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ diff --git a/bertos/cpu/arm/drv/timer_at91.h b/bertos/cpu/arm/drv/timer_at91.h new file mode 100644 index 0000000..0628d39 --- /dev/null +++ b/bertos/cpu/arm/drv/timer_at91.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for Atmel AT91 (interface). + */ + +#ifndef DRV_AT91_TIMER_H +#define DRV_AT91_TIMER_H + +#include /* CPU_FREQ */ + +#include "cfg/cfg_timer.h" /* CONFIG_TIMER */ +#include /* uint8_t */ +#include /* BV */ + +#include + +/** + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * + * $WIZ$ timer_select = "TIMER_ON_PIT", "TIMER_DEFAULT" + */ +#define TIMER_ON_PIT 1 ///< System timer on Periodic interval timer + +#define TIMER_DEFAULT TIMER_ON_PIT ///< Default system timer + +/* + * Hardware dependent timer initialization. + */ +#if (CONFIG_TIMER == TIMER_ON_PIT) + + /* + * On ARM all system IRQs are handled by the sysirq_dispatcher, so the actual + * timer handler can be treated like any other normal routine. + */ + #define DEFINE_TIMER_ISR void timer_handler(void); \ + void timer_handler(void) + + #define TIMER_TICKS_PER_SEC 1000 + #define TIMER_HW_CNT (CPU_FREQ / (16 * TIMER_TICKS_PER_SEC) - 1) + + /** Frequency of the hardware high-precision timer. */ + #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ / 16) + + /** Type of time expressed in ticks of the hardware high-precision timer */ + typedef uint32_t hptime_t; + #define SIZEOF_HPTIME_T 4 + + INLINE void timer_hw_irq(void) + { + /* Reset counters, this is needed to reset timer and interrupt flags */ + uint32_t dummy = PIVR; + (void) dummy; + } + + INLINE bool timer_hw_triggered(void) + { + return PIT_SR & BV(PITS); + } + + INLINE hptime_t timer_hw_hpread(void) + { + /* In the upper part of PIT_PIIR there is unused data */ + return PIIR & CPIV_MASK; + } + +#else + + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + +void timer_hw_init(void); + + +#endif /* DRV_TIMER_AT91_H */ diff --git a/bertos/cpu/arm/drv/timer_lpc2.c b/bertos/cpu/arm/drv/timer_lpc2.c new file mode 100644 index 0000000..cd4ac56 --- /dev/null +++ b/bertos/cpu/arm/drv/timer_lpc2.c @@ -0,0 +1,81 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for LPC2xxx (implementation). + * + * notest:arm + */ +#include "cfg/cfg_timer.h" +#include // BV() +#include // BV() + +#include +#include +#include "timer_lpc2.h" + +/** HW dependent timer initialization */ +#if (CONFIG_TIMER == TIMER0_COMPARE0) + #define TIMER0_ID 4 + void timer_hw_init(void) + { + /* Power on timer0 */ + PCONP |= BV(1); + + /* Set TIMER0 clk to CPU_FREQ */ + PCLKSEL0 &= ~0x0C; + PCLKSEL0 |= 0x04; + + /* reset prescaler counter */ + T0PR = 0; + + /* Set match register 0 */ + T0MR0 = TIMER_HW_CNT; + /* IRQ and reset counter on compare match 0 */ + T0MCR &= ~0x03; + T0MCR |= 0x03; + /* Reset timer0 counter and prescaler */ + T0TCR = 0x02; + + vic_setVector(TIMER0_ID, timer_handler); + vic_enable(TIMER0_ID); + + /* Start timer0 */ + T0TCR = 0x01; + } + + +#else + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + diff --git a/bertos/cpu/arm/drv/timer_lpc2.h b/bertos/cpu/arm/drv/timer_lpc2.h new file mode 100644 index 0000000..7a79640 --- /dev/null +++ b/bertos/cpu/arm/drv/timer_lpc2.h @@ -0,0 +1,103 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level timer module for NXP LPC2xxx (interface). + */ + +#ifndef DRV_LPC2_TIMER_H +#define DRV_LPC2_TIMER_H + +#include /* CPU_FREQ */ + +#include "cfg/cfg_timer.h" /* CONFIG_TIMER */ +#include /* uint8_t */ +#include /* BV */ + +#include + +/** + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * + * $WIZ$ timer_select = "TIMER0_COMPARE0", "TIMER_DEFAULT" + */ +#define TIMER0_COMPARE0 0 ///< System timer on Timer0 Compare match0 + +#define TIMER_DEFAULT TIMER0_COMPARE0 ///< Default system timer + +/* + * Hardware dependent timer initialization. + */ +#if (CONFIG_TIMER == TIMER0_COMPARE0) + ISR_PROTO_CONTEXT_SWITCH(timer_handler); + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_handler) + + #define TIMER_TICKS_PER_SEC 1000 + #define TIMER_HW_CNT (CPU_FREQ / TIMER_TICKS_PER_SEC - 1) + + /** Frequency of the hardware high-precision timer. */ + #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ) + + /** Type of time expressed in ticks of the hardware high-precision timer */ + typedef uint32_t hptime_t; + #define SIZEOF_HPTIME_T 4 + + INLINE void timer_hw_irq(void) + { + /* Reset The match0 irq flag */ + T0IR = 0x01; + /* Signal the VIC we have completed the ISR */ + VICVectAddr = 0; + } + + INLINE bool timer_hw_triggered(void) + { + return true; + } + + INLINE hptime_t timer_hw_hpread(void) + { + return T0TC; + } + +#else + + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + +void timer_hw_init(void); + + +#endif /* DRV_LPC2_TIMER_H */ diff --git a/bertos/cpu/arm/drv/twi_arm.c b/bertos/cpu/arm/drv/twi_arm.c new file mode 100644 index 0000000..efbc34a --- /dev/null +++ b/bertos/cpu/arm/drv/twi_arm.c @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Low-level TWI module for ARM (inplementation). + * + * + * \author Daniele Basile + * + * This module is automatically included so no need to include + * in test list. + * notest: arm + * + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should use twi_at91.c + + #include + + #if CPU_ARM_AT91 + #include "twi_at91.c" + /*#elif Add other ARM families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ diff --git a/bertos/cpu/arm/drv/twi_arm.h b/bertos/cpu/arm/drv/twi_arm.h new file mode 100644 index 0000000..f52ec56 --- /dev/null +++ b/bertos/cpu/arm/drv/twi_arm.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Low-level TWI module for ARM (interface). + * + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_ARM_AT91 + #include "twi_at91.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/arm/drv/twi_at91.c b/bertos/cpu/arm/drv/twi_at91.c new file mode 100644 index 0000000..ad95f50 --- /dev/null +++ b/bertos/cpu/arm/drv/twi_at91.c @@ -0,0 +1,267 @@ +/** + * \file + * + * + * \brief Driver for the AT91 ARM TWI (implementation) + * + * + * \author Francesco Sacchi + */ + +#include "twi_at91.h" + +#include "cfg/cfg_i2c.h" +#include +#include +#include +#include + +#include + +#include + +/** + * Timeout for ACK slave waiting. + */ +#define TWI_TIMEOUT ms_to_ticks(50) + +/** + * Send \a size bytes over the twi line to slave \a id. + * If the device requires internal addressing before writing, \a byte1 \a byte2 and \a byte3 can + * be specified. Internal addressign bytes not used *must* be set to TWI_NO_IADDR. If 1 or 2 bytes + * are required for internal addressing you *must* first use \a byte1 and than \a byte2. + * \note Atmel TWI implementation is broken so it was not possible to supply a better + * interface. Additionally NACK handling is also broken, so if the i2c device reply nack + * this function will return after TWI_TIMEOUT. + * \return true if ok, false on slave timeout. + */ +bool twi_write(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, const void *_buf, size_t size) +{ + uint8_t addr_size = 0; + const uint8_t *buf = (const uint8_t *)_buf; + ticks_t start; + + /* At least 1 byte *must* be transmitted, thanks to crappy hw implementation */ + ASSERT(size >= 1); + + /* Check internal byte address presence */ + if (byte1 != TWI_NO_IADDR) + addr_size++; + + if (byte2 != TWI_NO_IADDR) + { + ASSERT(addr_size == 1); + addr_size++; + } + + if (byte3 != TWI_NO_IADDR) + { + ASSERT(addr_size == 2); + addr_size++; + } + + start = timer_clock(); + /* Wait tx buffer empty */ + while (!(TWI_SR & BV(TWI_TXRDY))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + + /* Set slave address and (optional) internal slave addresses */ + TWI_MMR = (uint32_t)id << TWI_DADR_SHIFT | (uint32_t)addr_size << TWI_IADRSZ_SHIFT; + + TWI_IADR = ((uint32_t)(byte3 & 0xff) << 16) | ((uint32_t)(byte2 & 0xff) << 8) | ((uint32_t)(byte1 & 0xff)); + + while (size--) + { + /* Send data */ + TWI_THR = *buf++; + + start = timer_clock(); + /* Wait tx buffer empty */ + while (!(TWI_SR & BV(TWI_TXRDY))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + } + + /* Wait transmit complete bit */ + start = timer_clock(); + while (!(TWI_SR & BV(TWI_TXCOMP))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + + return true; +} + + +/** + * Read \a size bytes from the twi line from slave \a id. + * If the device requires internal addressing before reading, \a byte1 \a byte2 and \a byte3 must + * be specified. Internal addressign bytes not used *must* be set to TWI_NO_IADDR. If 1 or 2 bytes + * are required for internal addressing you *must* first use \a byte1 and than \a byte2. + * \note Atmel TWI implementation is broken so it was not possible to supply a better + * interface. Additionally NACK handling is also broken, so if the i2c device reply nack + * this function will return after TWI_TIMEOUT. + * \return true if ok, false on slave timeout. + */ +bool twi_read(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, void *_buf, size_t size) +{ + uint8_t addr_size = 0; + uint8_t *buf = (uint8_t *)_buf; + bool stopped = false; + ticks_t start; + + /* At least 1 byte *must* be transmitted, thanks to crappy twi implementation */ + ASSERT(size >= 1); + + /* Check internal byte address presence */ + if (byte1 != TWI_NO_IADDR) + addr_size++; + + if (byte2 != TWI_NO_IADDR) + { + ASSERT(addr_size == 1); + addr_size++; + } + + if (byte3 != TWI_NO_IADDR) + { + ASSERT(addr_size == 2); + addr_size++; + } + + /* Wait tx buffer empty */ + start = timer_clock(); + while (!(TWI_SR & BV(TWI_TXRDY))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + + + /* Set slave address and (optional) internal slave addresses */ + TWI_MMR = ((uint32_t)id << TWI_DADR_SHIFT) | BV(TWI_MREAD) | ((uint32_t)addr_size << TWI_IADRSZ_SHIFT); + + TWI_IADR = ((uint32_t)(byte3 & 0xff) << 16) | ((uint32_t)(byte2 & 0xff) << 8) | ((uint32_t)(byte1 & 0xff)); + + /* + * Start reception. + * Kludge: if we want to receive only 1 byte, the stop but *must* be set here + * (thanks to crappy twi implementation again). + */ + if (size == 1) + { + TWI_CR = BV(TWI_START) | BV(TWI_STOP); + stopped = true; + } + else + TWI_CR = BV(TWI_START); + + while (size--) + { + /* If we are at the last byte, inform the crappy hw that we + want to stop the reception. */ + if (!size && !stopped) + TWI_CR = BV(TWI_STOP); + + /* Wait until a byte is received */ + start = timer_clock(); + while (!(TWI_SR & BV(TWI_RXRDY))) + { + if (timer_clock() - start > TWI_TIMEOUT) + { + TWI_CR = BV(TWI_STOP); + return false; + } + } + + + *buf++ = TWI_RHR; + } + + /* Wait transmit complete bit */ + start = timer_clock(); + while (!(TWI_SR & BV(TWI_TXCOMP))) + { + if (timer_clock() - start > TWI_TIMEOUT) + return false; + } + + return true; +} + +MOD_DEFINE(twi); + +/** + * Init the (broken) sam7 twi driver. + */ +void twi_init(void) +{ + /* Disable PIO on TWI pins */ + PIOA_PDR = BV(TWD) | BV(TWCK); + + /* Enable oper drain on TWI pins */ + PIOA_MDER = BV(TWD); + + /* Disable all irqs */ + TWI_IDR = 0xFFFFFFFF; + + TWI_CR = BV(TWI_SWRST); + + /* Enable master mode */ + TWI_CR = BV(TWI_MSEN); + + PMC_PCER = BV(TWI_ID); + + /* + * Compute twi clock. + * CLDIV = ((Tlow * 2^CKDIV) -3) * Tmck + * CHDIV = ((THigh * 2^CKDIV) -3) * Tmck + * Only CLDIV is computed since CLDIV = CHDIV (50% duty cycle) + */ + uint16_t cldiv, ckdiv = 0; + while ((cldiv = ((CPU_FREQ / (2 * CONFIG_I2C_FREQ)) - 3) / (1 << ckdiv)) > 255) + ckdiv++; + + /* Atmel errata states that ckdiv *must* be less than 5 for unknown reason */ + ASSERT(ckdiv < 5); + + TWI_CWGR = ((uint32_t)ckdiv << TWI_CKDIV_SHIFT) | (cldiv << TWI_CLDIV_SHIFT) | (cldiv << TWI_CHDIV_SHIFT); + TRACEMSG("TWI_CWGR [%08lx]", TWI_CWGR); + + MOD_INIT(twi); +} + diff --git a/bertos/cpu/arm/drv/twi_at91.h b/bertos/cpu/arm/drv/twi_at91.h new file mode 100644 index 0000000..c0423af --- /dev/null +++ b/bertos/cpu/arm/drv/twi_at91.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Driver for the AT91 ARM TWI (implementation) + * + * \author Francesco Sacchi + */ + + +#ifndef DRV_AT91_TWI_H +#define DRV_AT91_TWI_H + +#include + +typedef int16_t twi_iaddr_t; + +#define TWI_NO_IADDR (-1) + +void twi_init(void); +bool twi_read(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, void *_buf, size_t len); +bool twi_write(uint8_t id, twi_iaddr_t byte1, twi_iaddr_t byte2, twi_iaddr_t byte3, const void *_buf, size_t len); + +#endif /* DRV_AT91_TWI_H */ diff --git a/bertos/cpu/arm/drv/vic_lpc2.c b/bertos/cpu/arm/drv/vic_lpc2.c new file mode 100644 index 0000000..066e7fe --- /dev/null +++ b/bertos/cpu/arm/drv/vic_lpc2.c @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Vectored Interrupt Controller VIC driver. + * + * notest:arm + */ +#include "vic_lpc2.h" +#include + + +void NORETURN vic_defaultHandler(void) +{ + IRQ_DISABLE; + LOG_ERR("Unhandled IRQ\n" + "VICIRQStatus %08lX\n" + "VICFIQStatus %08lX\n", VICIRQStatus, VICFIQStatus); + while (1) + PAUSE; +} diff --git a/bertos/cpu/arm/drv/vic_lpc2.h b/bertos/cpu/arm/drv/vic_lpc2.h new file mode 100644 index 0000000..22a2bda --- /dev/null +++ b/bertos/cpu/arm/drv/vic_lpc2.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Vectored Interrupt Controller VIC driver. + */ + +#ifndef DRV_VIC_LPC2_H +#define DRV_VIC_LPC2_H + +#include +#include + +#if CPU_ARM_LPC2378 + #include + #define vic_vector(i) (*(&VICVectAddr0 + i)) + #define vic_priority(i) (*(&VICVectCntl0 + i)) + #define VIC_SRC_CNT 32 + #define vic_enable(i) do { ASSERT(i < VIC_SRC_CNT); VICIntEnable = BV(i); } while (0) + #define vic_disable(i) do { ASSERT(i < VIC_SRC_CNT); VICIntEnClr = BV(i); } while (0) + + typedef void vic_handler_t(void); + void vic_defaultHandler(void); + + INLINE void vic_init(void) + { + IRQ_DISABLE; + /* Assign all sources to IRQ (not to FIQ) */ + VICIntSelect = 0; + /* Disable all sw interrupts */ + VICSoftIntClr = 0xFFFFFFFF; + /* Disable all interrupts */ + VICIntEnClr = 0xFFFFFFFF; + + for (int i = 0; i < VIC_SRC_CNT; i++) + vic_vector(i) = (reg32_t)vic_defaultHandler; + } + + INLINE void vic_setVector(int id, vic_handler_t *handler) + { + ASSERT(id < VIC_SRC_CNT); + vic_vector(id) = (reg32_t)handler; + } +#else + #error Unknown CPU +#endif + +#endif /* DRV_VIC_LPC2_H */ diff --git a/bertos/cpu/arm/drv/wdt_arm.h b/bertos/cpu/arm/drv/wdt_arm.h new file mode 100644 index 0000000..2e631bd --- /dev/null +++ b/bertos/cpu/arm/drv/wdt_arm.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Watchdog interface for ARM architecture. + * + * + * \author Luca Ottaviano + * + */ +#ifndef DRV_WDT_ARM_H +#define DRV_WDT_ARM_H + +#include // INLINE + +#warning TODO: This module is not implemented for at91 CPUs + +INLINE void wdt_start(uint32_t _timeout) { (void) _timeout; /* implement me */ } +INLINE void wdt_stop(void) { /*implement me */ } +INLINE void wdt_reset(void) { /* implement me */ } + +#endif //DRV_WDT_ARM_H diff --git a/bertos/cpu/arm/hw/crt_arm7tdmi.S b/bertos/cpu/arm/hw/crt_arm7tdmi.S new file mode 100644 index 0000000..bf80e7e --- /dev/null +++ b/bertos/cpu/arm/hw/crt_arm7tdmi.S @@ -0,0 +1,192 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief ARM7TDMI CRT. + */ + +#define ARM_MODE_USR 0x10 +#define ARM_MODE_FIQ 0x11 +#define ARM_MODE_IRQ 0x12 +#define ARM_MODE_SVC 0x13 +#define ARM_MODE_ABORT 0x17 +#define ARM_MODE_UNDEF 0x1B +#define ARM_MODE_SYS 0x1F + +#define IRQ_BIT 0x80 +#define FIQ_BIT 0x40 + + +/* + * Hardware initialization. + */ + .section .init, "ax", %progbits +__init0: + /* + * Set stack pointers + */ + ldr r0, =__stack_fiq_end + msr CPSR_c, #ARM_MODE_FIQ | IRQ_BIT | FIQ_BIT + mov r13, r0 + ldr r0, =__stack_irq_end + msr CPSR_c, #ARM_MODE_IRQ | IRQ_BIT | FIQ_BIT + mov r13, r0 + ldr r0, =__stack_abt_end + msr CPSR_c, #ARM_MODE_ABORT | IRQ_BIT | FIQ_BIT + mov r13, r0 + ldr r0, =__stack_und_end + msr CPSR_c, #ARM_MODE_UNDEF | IRQ_BIT | FIQ_BIT + mov r13, r0 + ldr r0, =__stack_svc_end + msr CPSR_c, #ARM_MODE_SVC | IRQ_BIT | FIQ_BIT + mov r13, r0 + + /* + * Early hw initialization #1. + * Called before clearing .bss and + * loading .data segments. + */ + bl __init1 + + /* + * Clear .bss + */ + ldr r1, =__bss_start + ldr r2, =__bss_end + ldr r3, =0 + +bss_loop: + cmp r1, r2 + strne r3, [r1], #+4 + bne bss_loop + + /* + * Relocate .data section (Copy from ROM to RAM). + */ + ldr r1, =__etext + ldr r2, =__data_start + ldr r3, =__data_end + +data_loop: + cmp r2, r3 + ldrlo r0, [r1], #4 + strlo r0, [r2], #4 + blo data_loop + + /* + * Early hw initialization #2. + * Called after setting up .bss and .data segments + * but before calling main(). + */ + bl __init2 + + /* + * Jump to main + */ + bl main + +end: + b end + +__dummy_init: + mov pc, lr + + /* + * Redefine your own __init() in order to supply + * a completely custom initialization routine. + */ + .weak __init + .set __init, __init0 + + /* + * Redefine your own __init1() in order to supply + * an hardware initialization routine. + * Remember that __init1() is called *before* + * clearing .bss and loading .data sections. + */ + .weak __init1 + .set __init1, __dummy_init + + /* + * Redefine your own __init2() in order to supply + * an hardware initialization routine. + * Remember that __init2() is called *after* + * clearing .bss and loading .data sections, just + * before calling main(). + */ + .weak __init2 + .set __init2, __dummy_init + + /* + * Redefine your own __undef() in order to supply + * a custom handler for undefined instruction exception. + */ + .weak __undef + .set __undef, __xcpt_dummy_undef + + /* + * Redefine your own __swi() in order to supply + * a custom handler for software interrupt exception. + */ + .weak __swi + .set __swi, __xcpt_dummy_swi + + /* + * Redefine your own __prefetch_abort() in order to supply + * a custom handler for prefetch abort exception. + */ + .weak __prefetch_abort + .set __prefetch_abort, __xcpt_dummy_pref + + /* + * Redefine your own __data_abort() in order to supply + * a custom handler for data abort exception. + */ + .weak __data_abort + .set __data_abort, __xcpt_dummy_dab + + .ltorg + + .section .exceptions, "ax", %progbits + +__xcpt_dummy_undef: + b __xcpt_dummy_undef + +__xcpt_dummy_swi: + b __xcpt_dummy_swi + +__xcpt_dummy_pref: + b __xcpt_dummy_pref + +__xcpt_dummy_dab: + b __xcpt_dummy_dab diff --git a/bertos/cpu/arm/hw/crtat91sam7_rom.S b/bertos/cpu/arm/hw/crtat91sam7_rom.S new file mode 100644 index 0000000..51635fd --- /dev/null +++ b/bertos/cpu/arm/hw/crtat91sam7_rom.S @@ -0,0 +1,377 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief AT91SAM7S256 CRT, adapted from NUt/OS, see license below. + */ + +/* + * Copyright (C) 2005-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + * + */ + +#include +#include "cfg/cfg_arch.h" + + +#if CPU_FREQ != 48054857L + /* Avoid errors on nightly test */ + #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) + #warning Clock registers set for 48.055MHz operation, revise following code if you want a different clock. + #endif +#endif + + +#if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X + /* + * With a 18.432MHz cristal, master clock is: + * (((18.432 * (PLL_MUL_VAL + 1)) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.055MHz + */ + #define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */ + #define PLL_DIV_VAL 14 + #define AT91MCK_PRES PMC_PRES_CLK_2 + + /* + * Register I/O adresses. + */ + #define MC_BASE 0xFFFFFF00 + #define MC_FMR_OFF 0x00000060 + #define MC_FWS_2R3W 0x00000100 + + #define AIC_BASE 0xFFFFF000 + #define AIC_EOICR_OFF 0x00000130 + #define AIC_IDCR_OFF 0x00000124 + + #define WDT_BASE 0xFFFFFD40 + #define WDT_MR_OFF 0x00000004 + #define WDT_WDDIS (1 << 15) + + #define PMC_BASE 0xFFFFFC00 + #define PMC_PCER_OFF 0x00000010 + #define PMC_SR_OFF 0x00000068 + #define PMC_MCKR_OFF 0x00000030 + #define PMC_MOSCS (1 << 0) + #define PMC_LOCK (1 << 2) + #define PMC_MCKRDY (1 << 3) + #define PMC_CSS_MASK 0x00000003 + #define PMC_CSS_PLL_CLK 0x00000003 + #define PMC_PRES_MASK 0x0000001C + #define PMC_PRES_CLK_2 0x00000004 + + #if CPU_ARM_SAM7S_LARGE + #define PMC_PIO_CLK_EN (1 << 2) + #elif CPU_ARM_SAM7X + #define PMC_PIO_CLK_EN ((1 << 2) | (1 << 3)) + #else + #error CPU not supported + #endif + + #define CKGR_MOR_OFF 0x00000020 + #define CKGR_PLLR_OFF 0x0000002C + #define CKGR_MOSCEN (1 << 0) + #define CKGR_MUL_SHIFT 16 + #define CKGR_PLLCOUNT_SHIFT 8 + + #define RSTC_MR 0xFFFFFD08 + #define RSTC_KEY 0xA5000000 + #define RSTC_URSTEN (1 << 0) + + #define ARM_MODE_USR 0x10 + #define ARM_MODE_FIQ 0x11 + #define ARM_MODE_IRQ 0x12 + #define ARM_MODE_SVC 0x13 + #define ARM_MODE_ABORT 0x17 + #define ARM_MODE_UNDEF 0x1B + #define ARM_MODE_SYS 0x1F + +#else + #error No register I/O definition for selected ARM CPU +#endif +/*\}*/ + +/* + * Section 0: Vector table and reset entry. + */ + .section .vectors,"ax",%progbits + + .global __vectors +__vectors: + ldr pc, [pc, #24] /* Reset */ + ldr pc, [pc, #24] /* Undefined instruction */ + ldr pc, [pc, #24] /* Software interrupt */ + ldr pc, [pc, #24] /* Prefetch abort */ + ldr pc, [pc, #24] /* Data abort */ + ldr pc, [pc, #24] /* Reserved */ + + /* + * On IRQ the PC will be loaded from AIC_IVR, which + * provides the address previously set in AIC_SVR. + * The interrupt routine will be called in ARM_MODE_IRQ + * with IRQ disabled and FIQ unchanged. + */ + ldr pc, [pc, #-0xF20] /* Interrupt request, auto vectoring. */ + ldr pc, [pc, #-0xF20] /* Fast interrupt request, auto vectoring. */ + + .word _init + .word __undef + .word __swi + .word __prefetch_abort + .word __data_abort + + .weak __undef + .set __undef, __xcpt_dummy_undef + .weak __swi + .set __swi, __xcpt_dummy_swi + .weak __prefetch_abort + .set __prefetch_abort, __xcpt_dummy_pref + .weak __data_abort + .set __data_abort, __xcpt_dummy_dab + +/** .global __xcpt_dummy*/ +__xcpt_dummy_undef: + b __xcpt_dummy_undef + +__xcpt_dummy_swi: + b __xcpt_dummy_swi + +__xcpt_dummy_pref: + b __xcpt_dummy_pref + +__xcpt_dummy_dab: + b __xcpt_dummy_dab + + + .ltorg +/* + * Hardware initialization. + */ + .section .init, "ax", %progbits + .globl _init +_init: + /* + * Use 2 cycles for flash access. + */ + ldr r1, =MC_BASE + mov r0, #MC_FWS_2R3W + str r0, [r1, #MC_FMR_OFF] + + /* + * Disable all interrupts. Useful for debugging w/o target reset. + */ + ldr r1, =AIC_BASE + mvn r0, #0 + str r0, [r1, #AIC_EOICR_OFF] + str r0, [r1, #AIC_IDCR_OFF] + + /* + * The watchdog is enabled after processor reset. Disable it. + */ + ldr r1, =WDT_BASE + ldr r0, =WDT_WDDIS + str r0, [r1, #WDT_MR_OFF] + + /* + * Enable the main oscillator. Set startup time of 6 * 8 slow + * clock cycles and wait until oscillator is stabilized. + */ + ldr r1, =PMC_BASE + mov r0, #(6 << 8) + orr r0, r0, #CKGR_MOSCEN + str r0, [r1, #CKGR_MOR_OFF] +wait_moscs: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MOSCS + beq wait_moscs + + /* + * Switch to Slow oscillator clock. + */ + ldr r0, [r1, #PMC_MCKR_OFF] + and r0, r0, #~PMC_CSS_MASK + str r0, [r1, #PMC_MCKR_OFF] +wait_slowosc: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MCKRDY + beq wait_slowosc + + /* + * Switch to prescaler div 1 factor. + */ + ldr r0, [r1, #PMC_MCKR_OFF] + and r0, r0, #~PMC_PRES_MASK + str r0, [r1, #PMC_MCKR_OFF] +wait_presc: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MCKRDY + beq wait_presc + + /* + * Set PLL: + * PLLfreq = crystal / divider * (multiplier + 1) + * Wait 28 clock cycles until PLL is locked. + */ + ldr r0, =((PLL_MUL_VAL << CKGR_MUL_SHIFT) | (28 << CKGR_PLLCOUNT_SHIFT) | PLL_DIV_VAL) + + str r0, [r1, #CKGR_PLLR_OFF] +wait_lock: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_LOCK + beq wait_lock + + /* + * Set master clock prescaler. + */ + mov r0, #AT91MCK_PRES + str r0, [r1, #PMC_MCKR_OFF] +wait_presrdy: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MCKRDY + beq wait_presrdy + + /* + * Switch to PLL clock. Trying to set this together with the + * prescaler fails (see datasheets). + */ + ldr r0, [r1, #PMC_MCKR_OFF] + orr r0, r0, #PMC_CSS_PLL_CLK + str r0, [r1, #PMC_MCKR_OFF] +wait_pllsel: + ldr r0, [r1, #PMC_SR_OFF] + tst r0, #PMC_MCKRDY + beq wait_pllsel + + /* + * Enable external reset key. + */ + ldr r0, =(RSTC_KEY | RSTC_URSTEN) + ldr r1, =RSTC_MR + str r0, [r1, #0] + + /* + * Set exception stack pointers + */ + ldr r0, =__stack_fiq_end + msr CPSR_c, #ARM_MODE_FIQ | 0xC0 + mov r13, r0 + ldr r0, =__stack_irq_end + msr CPSR_c, #ARM_MODE_IRQ | 0xC0 + mov r13, r0 + ldr r0, =__stack_abt_end + msr CPSR_c, #ARM_MODE_ABORT | 0xC0 + mov r13, r0 + ldr r0, =__stack_und_end + msr CPSR_c, #ARM_MODE_UNDEF | 0xC0 + mov r13, r0 + ldr r0, =__stack_svc_end + msr CPSR_c, #ARM_MODE_SVC | 0xC0 + mov r13, r0 + + /* + * Clear .bss + */ + ldr r1, =__bss_start + ldr r2, =__bss_end + ldr r3, =0 + +_40: + cmp r1, r2 + strne r3, [r1], #+4 + bne _40 + + /* + * Relocate .data section (Copy from ROM to RAM). + */ + ldr r1, =__etext + ldr r2, =__data_start + ldr r3, =__data_end + +_41: + cmp r2, r3 + ldrlo r0, [r1], #4 + strlo r0, [r2], #4 + blo _41 + + /* + * Initialize user stack pointer. + */ + /* msr CPSR_c, #ARM_MODE_SYS | 0xC0 */ + ldr r13, =__stack_end + + + /* + * Enable clock for PIO(s) + */ + ldr r1, =PMC_BASE + mov r0, #PMC_PIO_CLK_EN + str r0, [r1, #PMC_PCER_OFF] + + + /* + * Jump to main + */ + ldr r0, =main + bx r0 + +End: + b End + + .ltorg diff --git a/bertos/cpu/arm/hw/init_at91.c b/bertos/cpu/arm/hw/init_at91.c new file mode 100644 index 0000000..fc7ffaf --- /dev/null +++ b/bertos/cpu/arm/hw/init_at91.c @@ -0,0 +1,240 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief AT91SAM7S256 CRT. + */ + +#include +#include + +#define USE_FIXED_PLL 1 + +#define XTAL_FREQ 18432000UL + +#if USE_FIXED_PLL + #if CPU_FREQ != 48054857L + /* Avoid errors on nightly test */ + #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) + #warning Clock registers set for 48.055MHz operation, revise following code if you want a different clock. + #endif + #endif + + /* + * With a 18.432MHz cristal, master clock is: + * (((18.432 * (PLL_MUL_VAL + 1)) / PLL_DIV_VAL) / AT91MCK_PRES) = 48.055MHz + */ + #define PLL_MUL_VAL 72 /**< Real multiplier value is PLL_MUL_VAL + 1! */ + #define PLL_DIV_VAL 14 + #define AT91MCK_PRES PMC_PRES_CLK_2 + +#else /* !USE_FIXED_PLL*/ + + #define PLL_IN_MIN 1000000UL + #define PLL_IN_MAX 32000000UL + #define PLL_OUT_MIN 80000000UL + #define PLL_OUT_MAX 160000000UL + + #define DIV_HARD_MIN 1 + #define DIV_HARD_MAX 255 + + #define DIV_MIN (DIV_ROUND(XTAL_FREQ, PLL_IN_MAX) \ + < DIV_HARD_MIN ? DIV_HARD_MIN : DIV_ROUND(XTAL_FREQ, PLL_IN_MAX)) + + #define DIV_MAX (DIV_ROUND(XTAL_FREQ, PLL_IN_MIN) \ + > DIV_HARD_MAX ? DIV_HARD_MAX : DIV_ROUND(XTAL_FREQ, PLL_IN_MIN)) + + #define MUL_MIN 0 + #define MUL_MAX 2047 + + typedef struct PllRegs + { + uint32_t mul; + uint32_t div; + uint32_t pres; + } PllRegs; + + /** + * Code used to automatically compute the PLL registers. + * Since the processor uses the internal 32kHz oscillator + * this function takes a lot of time to be executed (~3s!). + */ + static const PllRegs pllCostants(void) + { + uint32_t best_err = CPU_FREQ; + PllRegs res; + + for (uint32_t div = DIV_MIN; div <= DIV_MAX; div++) + { + for (uint32_t pres = 0; pres < 8; pres++) + { + uint32_t mul = DIV_ROUND((CPU_FREQ * div) << pres, XTAL_FREQ) - 1; + if (mul <= MUL_MAX) + { + uint32_t pll = (XTAL_FREQ * (mul + 1)) / div; + if (pll >= PLL_OUT_MIN && pll <= PLL_OUT_MAX) + { + uint32_t err = ABS((int32_t)((pll >> pres) - CPU_FREQ)); + if (err == 0) + { + res.div = div; + res.mul = mul; + res.pres = pres; + return res; + } + if (err < best_err) + { + best_err = err; + res.div = div; + res.mul = mul; + res.pres = pres; + } + } + } + } + } + return res; + } +#endif /* !USE_FIXED_PLL*/ + +/* + * Override dummy hardware init functions supplied by the ASM startup + * routine. + */ + +void __init1(void); +void __init2(void); + +/** + * Early hardware initialization routine1. + * This will be called by the ASM CRT routine just + * *before* clearing .bss and loading .data sections. + * Usually only basic tasks are performed here (i.e. setting the PLL). + * For more generic tasks, __init2() should be used. + * + * \note Please keep in mind that since .bss and .data are not yet set, care + * must be taken. No static data can be used inside this funcition. + * Also some libc functions or floating point operations could potentially + * use initialized static data, be aware! + */ +void __init1(void) +{ + /* + * Compute number of master clock cycles in 1.5us. + * Needed by flash writing functions. + * The maximum FMCN value is 0xFF and 0 can be used only if + * master clock is less than 33kHz. + */ + #define MCN DIV_ROUNDUP(CPU_FREQ, 666667UL) + #define FMCN (CPU_FREQ <= 33333UL ? 0 : (MCN < 0xFF ? MCN : 0xFF)) + + #if CPU_FREQ < 30000000UL + /* Use 1 cycles for flash access. */ + MC_FMR = FMCN << MC_FMCN_SHIFT | MC_FWS_1R2W; + #else + /* Use 2 cycles for flash access. */ + MC_FMR = FMCN << MC_FMCN_SHIFT | MC_FWS_2R3W; + #endif + + /* Disable all interrupts. Useful for debugging w/o target reset. */ + AIC_EOICR = 0xFFFFFFFF; + AIC_IDCR = 0xFFFFFFFF; + + /* The watchdog is enabled after processor reset. Disable it. */ + WDT_MR = BV(WDT_WDDIS); + + /* + * Enable the main oscillator. Set startup time of 6 * 8 slow + * clock cycles and wait until oscillator is stabilized. + */ + CKGR_MOR = (6 << 8) | BV(CKGR_MOSCEN); + while (!(PMC_SR & BV(PMC_MOSCS))) ; + + /* Switch to Slow oscillator clock. */ + PMC_MCKR &= ~PMC_CSS_MASK; + while (!(PMC_SR & BV(PMC_MCKRDY))) ; + + /* Switch to prescaler div 1 factor. */ + PMC_MCKR &= ~PMC_PRES_MASK; + while (!(PMC_SR & BV(PMC_MCKRDY))) ; + + uint32_t div, pres, mul; + #if USE_FIXED_PLL + div = PLL_DIV_VAL; + mul = PLL_MUL_VAL; + pres = AT91MCK_PRES; + #else + PllRegs pll = pllCostants(); + div = pll.div; + mul = pll.mul; + pres = pll.pres << PMC_PRES_SHIFT; + #endif + + /* + * Set PLL: + * PLLfreq = crystal / divider * (multiplier + 1) + * Wait 28 clock cycles until PLL is locked. + */ + CKGR_PLLR = ((mul << CKGR_MUL_SHIFT) + | (28 << CKGR_PLLCOUNT_SHIFT) | div); + while (!(PMC_SR & BV(PMC_LOCK))) ; + + /* Set master clock prescaler. */ + PMC_MCKR = pres; + while (!(PMC_SR & BV(PMC_MCKRDY))) ; + + /* + * Switch to PLL clock. Trying to set this together with the + * prescaler fails (see datasheets). + */ + PMC_MCKR |= PMC_CSS_PLL_CLK; + while (!(PMC_SR & BV(PMC_MCKRDY))) ; +} + +/** + * Early hardware initialization routine2. + * This will be called by the ASM CRT routine just + * *after* clearing .bss and loading .data sections and before calling main(). + */ +void __init2(void) +{ + /* Enable external reset key. */ + RSTC_MR = (RSTC_KEY | BV(RSTC_URSTEN)); + + /* Enable clock for PIO(s) */ + PMC_PCER = BV(PIOA_ID); + #if CPU_ARM_SAM7X + PMC_PCER |= BV(PIOB_ID); + #endif +} diff --git a/bertos/cpu/arm/hw/init_lpc2.c b/bertos/cpu/arm/hw/init_lpc2.c new file mode 100644 index 0000000..033216d --- /dev/null +++ b/bertos/cpu/arm/hw/init_lpc2.c @@ -0,0 +1,129 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief LPC2378 CRT. + * notest:arm + */ +#include +#include +#include + +#if CPU_FREQ != 72000000UL + /* Avoid errors on nightly test */ + #if !defined(ARCH_NIGHTTEST) || !(ARCH & ARCH_NIGHTTEST) + #warning Clock registers set for 72MHz operation, revise following code if you want a different clock. + #endif +#endif + +/* + * With a 12MHz cristal, master clock is: + * (((2 * 12 * (PLL_MUL_VAL + 1)) / (PLL_DIV_VAL + 1)) / (LPC2_CPUCLOCK_DIV + 1))= 72MHz + */ +#define PLL_MUL_VAL 11 +#define PLL_DIV_VAL 0 +#define LPC2_CPUCLOCK_DIV 3 + + +/* PLL feed sequence */ +#define PLL_FEED_SEQ() ATOMIC(PLLFEED = 0xAA; PLLFEED = 0x55;) + +static void configurePll(void) +{ + /* Disconnect and disable the PLL, if already active */ + if (PLLSTAT & (1 << 25)) + { + /* Disconnect PLL, but leave it enabled */ + PLLCON = 0x01; + PLL_FEED_SEQ(); + /* Disable PLL */ + PLLCON = 0; + PLL_FEED_SEQ(); + } + + /* Enable the main oscillator and wait for it to be stable */ + SCS |= (1 << 5); + while (!(SCS & (1 << 6))) ; + + /* Select the main oscillator as the PLL clock source */ + CLKSRCSEL = 0x01; + + /* Set up PLL mul and div */ + PLLCFG = PLL_MUL_VAL | (PLL_DIV_VAL << 16); + PLL_FEED_SEQ(); + + /* Enable PLL, disconnected */ + PLLCON = 0x01; + PLL_FEED_SEQ(); + + /* Set clock divider */ + CCLKCFG = LPC2_CPUCLOCK_DIV; + + /* Wait for the PLL to lock */ + while (!(PLLSTAT & (1 << 26))) ; + + /* Enable and connect the PLL */ + PLLCON = 0x03; + PLL_FEED_SEQ(); +} + +void __init1(void); + +void __init1(void) +{ + /* Map irq vectors to internal flash */ + MEMMAP = 0x01; + /* Configure PLL, switch from IRC to Main OSC */ + configurePll(); + + /* Set memory accelerator module flash timings */ +#if CPU_FREQ < 20000000UL + MAMTIM = 1; +#elif CPU_FREQ < 40000000UL + MAMTIM = 2; +#elif CPU_FREQ < 60000000UL + MAMTIM = 3; +#else + MAMTIM = 4; +#endif + + /* Memory accelerator module fully enabled */ + MAMCR = 0x02; +} + +void __init2(void); + +void __init2(void) +{ + vic_init(); +} diff --git a/bertos/cpu/arm/hw/pll_at91.h b/bertos/cpu/arm/hw/pll_at91.h new file mode 100644 index 0000000..9bf05f8 --- /dev/null +++ b/bertos/cpu/arm/hw/pll_at91.h @@ -0,0 +1,153 @@ +/** + * \file + * + * + * + * \author Giovanni Bajo + * + * \brief AT91SAM7S256 CRT. + */ + +#include +#include + +#if 1 +// Versione completamente unrollata + +#define CREATE_PLL_STEP(xtal, cpufreq) + +#define PLL_STEP(xtal, cpufreq, d, k) \ + do { \ + uint32_t m = (((cpufreq * (1LL << k) * (d)) + (xtal / 2)) / xtal) - 1; \ + if (m < 2048) \ + { \ + uint32_t pll = (d != 0) ? (xtal * (m + 1)) / (d) : 0; \ + if (80000000 <= pll && pll <= 160000000) \ + { \ + uint32_t err = ABS((int32_t)((pll >> k) - cpufreq)); \ + if (err < best_err) \ + { \ + best_err=err; best_m=m; best_k=k; best_d=d; \ + } \ + } \ + } \ + } while (0) + +#else + +// Versione con funzione nestata (GCC only) +// Tempo di compilazione più rapido + +#define CREATE_PLL_STEP(xtal, cpufreq) \ + void __attribute__((always_inline)) PLL_STEP(int u1, int u2, int32_t d, long long k) \ + { \ + (void)u1; (void)u2; \ + uint32_t m = ((((cpufreq * (1LL << k) * (d)) + (xtal / 2)) / xtal) - 1; \ + if (m < 2048) \ + { \ + uint32_t pll = (xtal * (m + 1)) / (d); \ + if (80000000UL <= pll && pll <= 160000000UL) \ + { \ + uint32_t err = ABS((int32_t)((pll >> k) - cpufreq)); \ + if (err < best_err) \ + { \ + best_err=err; best_m=m; best_k=k; best_d=d; \ + } \ + } \ + } \ + } + +#endif + +#define PLL_MACRO_STEP(xtal, cpufreq, d) \ + do { \ + if ((d) > 0 && (d) <= 255 && \ + (d) <= xtal / 1000000 && (d) >= xtal / 32000000) \ + { \ + PLL_STEP(xtal, cpufreq, d, 0); \ + PLL_STEP(xtal, cpufreq, d, 1); \ + PLL_STEP(xtal, cpufreq, d, 2); \ + PLL_STEP(xtal, cpufreq, d, 3); \ + PLL_STEP(xtal, cpufreq, d, 4); \ + PLL_STEP(xtal, cpufreq, d, 5); \ + PLL_STEP(xtal, cpufreq, d, 6); \ + } \ + } while (0) + +#define PLL_ITERATION_4(xtal, cpufreq, d) \ + PLL_MACRO_STEP(xtal, cpufreq, d) + +#define PLL_ITERATION_3(xtal, cpufreq, d) \ + PLL_ITERATION_4(xtal, cpufreq, (d)*4+0); \ + PLL_ITERATION_4(xtal, cpufreq, (d)*4+1); \ + PLL_ITERATION_4(xtal, cpufreq, (d)*4+2); \ + PLL_ITERATION_4(xtal, cpufreq, (d)*4+3); + +#define PLL_ITERATION_2(xtal, cpufreq, d) \ + PLL_ITERATION_3(xtal, cpufreq, (d)*4+0); \ + PLL_ITERATION_3(xtal, cpufreq, (d)*4+1); \ + PLL_ITERATION_3(xtal, cpufreq, (d)*4+2); \ + PLL_ITERATION_3(xtal, cpufreq, (d)*4+3); + +#define PLL_ITERATION_1(xtal, cpufreq, d) \ + PLL_ITERATION_2(xtal, cpufreq, (d)*4+0); \ + PLL_ITERATION_2(xtal, cpufreq, (d)*4+1); \ + PLL_ITERATION_2(xtal, cpufreq, (d)*4+2); \ + PLL_ITERATION_2(xtal, cpufreq, (d)*4+3); + +#define PLL_ITERATION(xtal, cpufreq) \ + PLL_ITERATION_1(xtal, cpufreq, 0); \ + PLL_ITERATION_1(xtal, cpufreq, 1); \ + PLL_ITERATION_1(xtal, cpufreq, 2); \ + PLL_ITERATION_1(xtal, cpufreq, 3) + +#define PLL_CALC(xtal, cpufreq, m, d, k) do \ + { \ + uint32_t best_err=cpufreq, best_m, best_k, best_d; \ + CREATE_PLL_STEP(xtal, cpufreq) \ + PLL_ITERATION(xtal, cpufreq); \ + *(m)=best_m; *(d)=best_d; *(k)=best_k; \ + } while (0) + +#if 0 +int main(int argc, char *argv[]) +{ + int32_t m, d, k; + PLL_CALC(18432000, 48054857, &m, &d, &k); + + if (__builtin_constant_p(m) && __builtin_constant_p(k) && __builtin_constant_p(d)) + printf("SUCCESS -- compile time evaluation\n"); + else + printf("FAILURE -- run time evaluation\n"); + + printf("M:%d D:%d K:%d\n", m, d, k); +} +#endif diff --git a/bertos/cpu/arm/hw/switch_arm.S b/bertos/cpu/arm/hw/switch_arm.S new file mode 100644 index 0000000..0e7d697 --- /dev/null +++ b/bertos/cpu/arm/hw/switch_arm.S @@ -0,0 +1,6 @@ +#include + +#if !(ARCH & ARCH_NIGHTTEST) + #warning This file is deprecated, use switch_ctx_arm.S + #include "switch_ctx_arm.S" +#endif diff --git a/bertos/cpu/arm/hw/switch_ctx_arm.S b/bertos/cpu/arm/hw/switch_ctx_arm.S new file mode 100644 index 0000000..db4f297 --- /dev/null +++ b/bertos/cpu/arm/hw/switch_ctx_arm.S @@ -0,0 +1,99 @@ +/** + * \file + * + * + * \brief ARM context switch + * + * + * \author Stefano Fedrigo + * \author Francesco Sacchi + * \author Andrea Righi + */ + +#include "cfg/cfg_proc.h" + +/* void asm_switch_context(void **new_sp [r0], void **save_sp [r1]) */ +.globl asm_switch_context +asm_switch_context: + /* Save registers */ + stmfd sp!, {r4 - r11, lr} + /* Save old stack pointer */ + str sp, [r1] + /* Load new stack pointer */ + ldr sp, [r0] + /* Load new registers */ + ldmfd sp!, {r4 - r11, pc} + +#if CONFIG_KERN_PREEMPT + +/* ARM interrupt mode with IRQ and FIQ disabled */ +#define ARM_IRQ_MODE 0xD2 +/* ARM supervisor mode with IRQ and FIQ disabled */ +#define ARM_SVC_MODE 0xD3 + +.globl asm_irq_switch_context +asm_irq_switch_context: + /* Return if preemption is not needed */ + bl proc_needPreempt + cmp r0, #0 + ldmeqfd sp!, {r0 - r3, ip, pc}^ + + /* Otherwise restore regs used by the ISR */ + ldmfd sp!, {r0 - r3, ip, lr} + + /* Save current process context */ + msr cpsr_c, #ARM_SVC_MODE + stmfd sp!, {r0 - r3, ip, lr} + + /* Save lr_irq and spsr_irq in process stack */ + msr cpsr_c, #ARM_IRQ_MODE + mov r0, lr + mrs r1, spsr + msr cpsr_c, #ARM_SVC_MODE + stmfd sp!, {r0, r1} + + /* Perform the context switch */ + bl proc_preempt + + /* Restore lr_irq and spsr_irq from process stack */ + ldmfd sp!, {r0, r1} + msr cpsr_c, #ARM_IRQ_MODE + mov lr, r0 + msr spsr_cxsf, r1 + + /* Restore process regs */ + msr cpsr_c, #ARM_SVC_MODE + ldmfd sp!, {r0 - r3, ip, lr} + + /* Exit from ISR */ + msr cpsr_c, #ARM_IRQ_MODE + movs pc, lr +#endif /* CONFIG_KERN_PREEMPT */ diff --git a/bertos/cpu/arm/hw/vectors_at91.S b/bertos/cpu/arm/hw/vectors_at91.S new file mode 100644 index 0000000..ce4991e --- /dev/null +++ b/bertos/cpu/arm/hw/vectors_at91.S @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Atmel AT91SAM interrupt vectors. + */ + +#include "cfg/cfg_arch.h" +#if defined(ARCH_NIGHTTEST) && (ARCH & ARCH_NIGHTTEST) + /* Avoid errors during nigthly test */ + #define __vectors __vectors_at91 +#endif + + +/* + * Section 0: Vector table and reset entry. + */ + .section .vectors,"ax",%progbits + + .global __vectors +__vectors: + ldr pc, _init /* Reset */ + ldr pc, _undef /* Undefined instruction */ + ldr pc, _swi /* Software interrupt */ + ldr pc, _prefetch_abort /* Prefetch abort */ + ldr pc, _data_abort /* Data abort */ + .word 0 /* Reserved */ + + /* + * On IRQ the PC will be loaded from AIC_IVR, which + * provides the address previously set in AIC_SVR. + * The interrupt routine will be called in ARM_MODE_IRQ + * with IRQ disabled and FIQ unchanged. + */ + ldr pc, [pc, #-0xF20] /* Interrupt request, auto vectoring. */ + ldr pc, [pc, #-0xF20] /* Fast interrupt request, auto vectoring. */ + +_init: + .word __init +_undef: + .word __undef +_swi: + .word __swi +_prefetch_abort: + .word __prefetch_abort +_data_abort: + .word __data_abort + + .ltorg diff --git a/bertos/cpu/arm/hw/vectors_lpc2.S b/bertos/cpu/arm/hw/vectors_lpc2.S new file mode 100644 index 0000000..06d0a7d --- /dev/null +++ b/bertos/cpu/arm/hw/vectors_lpc2.S @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief NXP LPC2xxx interrupt vectors. + */ + +#include +#include "cfg/cfg_arch.h" +#if defined(ARCH_NIGHTTEST) && (ARCH & ARCH_NIGHTTEST) + /* Avoid errors during nigthly test */ + #define __vectors __vectors_lpc2 +#endif + +/* + * Section 0: Vector table and reset entry. + */ + .section .vectors,"ax",%progbits + + .global __vectors +__vectors: + ldr pc, _init /* Reset */ + ldr pc, _undef /* Undefined instruction */ + ldr pc, _swi /* Software interrupt */ + ldr pc, _prefetch_abort /* Prefetch abort */ + ldr pc, _data_abort /* Data abort */ +#if CPU_ARM_LPC2378 + .word 0xb9206e58 /* In LPX2xxx, this location holds the checksum of the previous vectors */ + ldr pc, [pc, #-0x120] /* Use VIC */ +#else + .word 0xb9205f88 /* In LPX2xxx, this location holds the checksum of the previous vectors */ + #if CPU_ARM_LPC2 + #warning Check correct VICAddress register for this CPU, default set to 0xFFFFF030 + #endif + ldr pc, [pc, #-0xFF0] /* Use VIC */ +#endif + ldr pc, _fiq /* Fast interrupt request */ +_init: + .word __init +_undef: + .word __undef +_swi: + .word __swi +_prefetch_abort: + .word __prefetch_abort +_data_abort: + .word __data_abort +_fiq: + .word __fiq + + .weak __fiq +__fiq: + b __fiq + + .ltorg diff --git a/bertos/cpu/arm/info/AT91SAM7S128.cdef b/bertos/cpu/arm/info/AT91SAM7S128.cdef new file mode 100644 index 0000000..d618221 --- /dev/null +++ b/bertos/cpu/arm/info/AT91SAM7S128.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7S128. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7S family. +include("at91sam7s.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbytes internal flash memory", + "32 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7S128__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "at91sam7_128_rom.ld" + diff --git a/bertos/cpu/arm/info/AT91SAM7S256.cdef b/bertos/cpu/arm/info/AT91SAM7S256.cdef new file mode 100644 index 0000000..e388e0e --- /dev/null +++ b/bertos/cpu/arm/info/AT91SAM7S256.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7S256. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7S family. +include("at91sam7s.common") + +# Short description of the cpu. +CPU_DESC += [ "256 Kbytes internal flash memory", + "64 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7S256__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "at91sam7_256_rom.ld" + + diff --git a/bertos/cpu/arm/info/AT91SAM7S512.cdef b/bertos/cpu/arm/info/AT91SAM7S512.cdef new file mode 100644 index 0000000..3121c54 --- /dev/null +++ b/bertos/cpu/arm/info/AT91SAM7S512.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7S512. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7S family. +include("at91sam7s.common") + +# Short description of the cpu. +CPU_DESC += [ "512 Kbytes internal flash memory", + "64 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7S512__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "at91sam7_512_rom.ld" + diff --git a/bertos/cpu/arm/info/AT91SAM7S64.cdef b/bertos/cpu/arm/info/AT91SAM7S64.cdef new file mode 100644 index 0000000..514457b --- /dev/null +++ b/bertos/cpu/arm/info/AT91SAM7S64.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7S64. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7S family. +include("at91sam7s.common") + +# Short description of the cpu. +CPU_DESC += [ "64 Kbytes internal flash memory", + "16 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7S64__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "at91sam7_64_rom.ld" + diff --git a/bertos/cpu/arm/info/AT91SAM7X128.cdef b/bertos/cpu/arm/info/AT91SAM7X128.cdef new file mode 100644 index 0000000..05dbc8c --- /dev/null +++ b/bertos/cpu/arm/info/AT91SAM7X128.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7X128. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7X family. +include("at91sam7x.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbytes internal flash memory", + "32 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7X128__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "at91sam7_128_rom.ld" + diff --git a/bertos/cpu/arm/info/AT91SAM7X256.cdef b/bertos/cpu/arm/info/AT91SAM7X256.cdef new file mode 100644 index 0000000..c8a9102 --- /dev/null +++ b/bertos/cpu/arm/info/AT91SAM7X256.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7X256. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7X family. +include("at91sam7x.common") + +# Short description of the cpu. +CPU_DESC += [ "256 Kbytes internal flash memory", + "64 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7X256__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "at91sam7_256_rom.ld" + diff --git a/bertos/cpu/arm/info/AT91SAM7X512.cdef b/bertos/cpu/arm/info/AT91SAM7X512.cdef new file mode 100644 index 0000000..6bb1e81 --- /dev/null +++ b/bertos/cpu/arm/info/AT91SAM7X512.cdef @@ -0,0 +1,53 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the AT91SAM7X512. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the AT91SAM7X family. +include("at91sam7x.common") + +# Short description of the cpu. +CPU_DESC += [ "512 Kbytes internal flash memory", + "64 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_AT91SAM7X512__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "at91sam7_512_rom.ld" + diff --git a/bertos/cpu/arm/info/LPC2378.cdef b/bertos/cpu/arm/info/LPC2378.cdef new file mode 100644 index 0000000..b009a27 --- /dev/null +++ b/bertos/cpu/arm/info/LPC2378.cdef @@ -0,0 +1,56 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for NXP LPC2 family. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Francesco Sacchi +# +# + +# Import the common settings for the lpc2xxx family. +include("lpc2.common") + +# Short description of the cpu. +CPU_DESC += [ "512 Kbytes internal flash memory", + "32 Kbytes internal SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_LPC2378__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "lpc2378.ld" + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "lpc2378" + diff --git a/bertos/cpu/arm/info/at91sam7.common b/bertos/cpu/arm/info/at91sam7.common new file mode 100644 index 0000000..beefc0e --- /dev/null +++ b/bertos/cpu/arm/info/at91sam7.common @@ -0,0 +1,87 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for AT91SAM7 family. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = ["ATMEL AT91 ARM", + "ARMTDMI ARM Thumb Processor", + "32-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "arm" + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "arm7tdmi" + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "at91sam7" + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_CPU = CORE_CPU + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "48054857UL" + +# Special CPU related tags. +CPU_TAGS = ["at91", CORE_CPU, TOOLCHAIN] + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "arm/scripts/" +HW_DIR = CPU_DIR + "arm/hw/" + +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash.sh" +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/debug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" + +GDB_INIT_SCRIPT = PRG_SCRIPTS_DIR + "arm/openocd/gdbinit-sam7" + +# Common GCC flags. +MK_CPU_CPPAFLAGS = "-g -gdwarf-2" +MK_CPU_CPPFLAGS = "-O0 -g3 -gdwarf-2 -fverbose-asm -I" + CPU_DIR + "arm/" +MK_CPU_LDFLAGS = "-nostartfiles -Wl,--no-warn-mismatch" + +# CRT files. +MK_CPU_CPPASRC = HW_DIR + "crt_arm7tdmi.S " + HW_DIR + "vectors_at91.S" +MK_CPU_CSRC = HW_DIR + "init_at91.c" diff --git a/bertos/cpu/arm/info/at91sam7s.common b/bertos/cpu/arm/info/at91sam7s.common new file mode 100644 index 0000000..79b0584 --- /dev/null +++ b/bertos/cpu/arm/info/at91sam7s.common @@ -0,0 +1,47 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for AT91SAM7X architecture. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("at91sam7.common") + +# Special CPU related tags. +CPU_TAGS += ["at91sam7s"] diff --git a/bertos/cpu/arm/info/at91sam7x.common b/bertos/cpu/arm/info/at91sam7x.common new file mode 100644 index 0000000..132d3fe --- /dev/null +++ b/bertos/cpu/arm/info/at91sam7x.common @@ -0,0 +1,47 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for AT91SAM7X architecture. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("at91sam7.common") + +# Special CPU related tags. +CPU_TAGS += ["at91sam7x"] diff --git a/bertos/cpu/arm/info/lpc2.common b/bertos/cpu/arm/info/lpc2.common new file mode 100644 index 0000000..b6b8004 --- /dev/null +++ b/bertos/cpu/arm/info/lpc2.common @@ -0,0 +1,85 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for NXP LPC2 family. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Francesco Sacchi +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = ["NXP LPC2xxx ARM", + "ARMTDMI ARM Thumb Processor", + "32-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "arm" + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "arm7tdmi" + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_CPU = CORE_CPU + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "72000000UL" + +# Special CPU related tags. +CPU_TAGS = ["lpc2", CORE_CPU, TOOLCHAIN] + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "arm/scripts/" +HW_DIR = CPU_DIR + "arm/hw/" +DRV_DIR = CPU_DIR + "arm/drv/" + +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash.sh" +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/debug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" + +GDB_INIT_SCRIPT = PRG_SCRIPTS_DIR + "arm/openocd/gdbinit-sam7" + +# Common GCC flags. +MK_CPU_CPPAFLAGS = "-g -gdwarf-2" +MK_CPU_CPPFLAGS = "-O0 -g3 -gdwarf-2 -fverbose-asm -I" + CPU_DIR + "arm/" +MK_CPU_LDFLAGS = "-nostartfiles -Wl,--no-warn-mismatch" + +# CRT files. +MK_CPU_CPPASRC = HW_DIR + "crt_arm7tdmi.S " + HW_DIR + "vectors_lpc2.S" +MK_CPU_CSRC = HW_DIR + "init_lpc2.c " + DRV_DIR + "vic_lpc2.c" diff --git a/bertos/cpu/arm/io/arm.h b/bertos/cpu/arm/io/arm.h new file mode 100644 index 0000000..40c67a9 --- /dev/null +++ b/bertos/cpu/arm/io/arm.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * ARM I/O registers. + */ + + +#ifndef ARM_H +#define ARM_H + +#include + +#if CPU_ARM_AT91 + #include "at91.h" +#elif CPU_ARM_LPC2 + #include "lpc23xx.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif + + +#endif /* ARM_H */ diff --git a/bertos/cpu/arm/io/at91.h b/bertos/cpu/arm/io/at91.h new file mode 100644 index 0000000..9f7e0a5 --- /dev/null +++ b/bertos/cpu/arm/io/at91.h @@ -0,0 +1,84 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91 common definitions. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_H +#define AT91_H + +#include + +#if CPU_ARM_SAM7S_LARGE || CPU_ARM_SAM7X + #include "at91sam7.h" + +#else + #error Missing I/O definitions for CPU. +#endif + +#endif /* AT91_H */ diff --git a/bertos/cpu/arm/io/at91_adc.h b/bertos/cpu/arm/io/at91_adc.h new file mode 100644 index 0000000..815e44c --- /dev/null +++ b/bertos/cpu/arm/io/at91_adc.h @@ -0,0 +1,197 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * AT91SAM7 Analog to Digital Converter. + * + */ + + +#ifndef AT91_ADC_H +#define AT91_ADC_H + + +/** + * ADC control register + */ +#define ADC_CR_OFF 0x00000000 ///< Control register offeset. +#define ADC_CR (*((reg32_t *)(ADC_BASE + ADC_CR_OFF))) ///< Control register address. +#define ADC_SWRST 0 ///< Software reset. +#define ADC_START 1 ///< Start conversion. + + +/** + * ADC mode register + */ +#define ADC_MR_OFF 0x00000004 ///< Mode register offeset. +#define ADC_MR (*((reg32_t *)(ADC_BASE + ADC_MR_OFF))) ///< Mode register address. +#define ADC_TRGEN 0 ///< Trigger enable. + +#define ADC_TRGSEL_TIOA0 0x00000000 ///< TIOA output of the timer counter channel 0. +#define ADC_TRGSEL_TIOA1 0x00000002 ///< TIOA output of the timer counter channel 1. +#define ADC_TRGSEL_TIOA2 0x00000004 ///< TIOA output of the timer counter channel 2. +#define ADC_TRGSEL_EXT 0x0000000C ///< External trigger. + +#define ADC_LOWRES 4 ///< Resolution 0: 10-bit, 1: 8-bit. +#define ADC_SLEEP 5 ///< Sleep mode. + +/** + * Prescaler rate selection. + * ADCClock = MCK / ((ADC_PRESCALER_VALUE + 1) * 2) + */ +#define ADC_PRESCALER_MASK 0x00003F00 ///< Prescaler rate selection mask. +#define ADC_PRESCALER_SHIFT 8 ///< Prescale rate selection shift. + +/** + * Start up timer. + * Startup time = (ADC_STARTUP_VALUE + 1) * 8 /ADCClock + */ +#define ADC_STARTUP_MASK 0x001F0000 ///< Start up timer mask. +#define ADC_STARTUP_SHIFT 16 ///< Start up timer shift. + + +/** + * Sample & hold time. + * Sample & hold time = (ADC_SHTIM_VALUE + 1) * 8 /ADCClock + */ +#define ADC_SHTIME_MASK 0x0F000000 ///< Sample & hold time mask. +#define ADC_SHTIME_SHIFT 24 ///< Sample & hold time shift. + + +/** + * ADC channel enable register + */ +#define ADC_CHER_OFF 0x00000010 ///< Channel enable register offeset. +#define ADC_CHER (*((reg32_t *)(ADC_BASE + ADC_CHER_OFF))) ///< Channel enable register address. + +/** + * ADC channel disable register + */ +#define ADC_CHDR_OFF 0x00000014 ///< Channel disable register offeset. +#define ADC_CHDR (*((reg32_t *)(ADC_BASE + ADC_CHDR_OFF))) ///< Channel disable register address. + +/** + * ADC channel status register + */ +#define ADC_CHSR_OFF 0x00000018 ///< Channel status register offeset. +#define ADC_CHSR (*((reg32_t *)(ADC_BASE + ADC_CHSR_OFF))) ///< Channel status register address. + +#define ADC_CH_MASK 0x000000FF ///< Channel mask. +#define ADC_CH0 0 ///< Channel 0 +#define ADC_CH1 1 ///< Channel 1 +#define ADC_CH2 2 ///< Channel 2 +#define ADC_CH3 3 ///< Channel 3 +#define ADC_CH4 4 ///< Channel 4 +#define ADC_CH5 5 ///< Channel 5 +#define ADC_CH6 6 ///< Channel 6 +#define ADC_CH7 7 ///< Channel 7 + +/** + * ADC status register + */ +#define ADC_SR_OFF 0x0000001C ///< Status register offeset. +#define ADC_SR (*((reg32_t *)(ADC_BASE + ADC_SR_OFF))) ///< Status register address. + +/** + * ADC Interrupt enable register. + */ +#define ADC_IER_OFF 0x00000024 ///< Interrupt enable register offeset. +#define ADC_IER (*((reg32_t *)(ADC_BASE + ADC_IER_OFF))) ///< Interrupt enable register. + +/** + * ADC Interrupt disable register. + */ +#define ADC_IDR_OFF 0x00000028 ///< Interrupt disable register offeset. +#define ADC_IDR (*((reg32_t *)(ADC_BASE + ADC_IDR_OFF))) ///< Interrupt disable register. + +/** + * ADC Interrupt mask register. + */ +#define ADC_IMR_OFF 0x0000002C ///< Interrupt mask register offeset. +#define ADC_IMR (*((reg32_t *)(ADC_BASE + ADC_IMR_OFF))) ///< Interrupt mask register. + +#define ADC_EOC_MASK 0x000000FF ///< End of converison mask. +#define ADC_EOC0 0 ///< End of conversion channel 0. +#define ADC_EOC1 1 ///< End of conversion channel 1. +#define ADC_EOC2 2 ///< End of conversion channel 2. +#define ADC_EOC3 3 ///< End of conversion channel 3. +#define ADC_EOC4 4 ///< End of conversion channel 4. +#define ADC_EOC5 5 ///< End of conversion channel 5. +#define ADC_EOC6 6 ///< End of conversion channel 6. +#define ADC_EOC7 7 ///< End of conversion channel 7. + +#define ADC_OVRE0 8 ///< Overrun error channel 0. +#define ADC_OVRE1 9 ///< Overrun error channel 1. +#define ADC_OVRE2 10 ///< Overrun error channel 2. +#define ADC_OVRE3 11 ///< Overrun error channel 3. +#define ADC_OVRE4 12 ///< Overrun error channel 4. +#define ADC_OVRE5 13 ///< Overrun error channel 5. +#define ADC_OVRE6 14 ///< Overrun error channel 6. +#define ADC_OVRE7 15 ///< Overrun error channel 7. + +#define ADC_DRDY 16 ///< Data ready. +#define ADC_GOVRE 17 ///< General overrun error. +#define ADC_ENDRX 18 ///< End of RX buffer. +#define ADC_RXBUFF 19 ///< Rx buffer full. + +/** + * ADC last convert data register. + */ +#define ADC_LCDR_OFF 0x00000020 ///< Last converted data register offeset. +#define ADC_LCDR (*((reg32_t *)(ADC_BASE + ADC_LCDR_OFF))) ///< Last converted data register. + +/** + * ADC channel data register. + * + * \{ + */ +#define ADC_CDR0_OFF 0x00000030 ///< Channel data register 0 offeset. +#define ADC_CDR1_OFF 0x00000034 ///< Channel data register 1 offeset. +#define ADC_CDR2_OFF 0x00000038 ///< Channel data register 2 offeset. +#define ADC_CDR3_OFF 0x0000003C ///< Channel data register 3 offeset. +#define ADC_CDR4_OFF 0x00000040 ///< Channel data register 4 offeset. +#define ADC_CDR5_OFF 0x00000044 ///< Channel data register 5 offeset. +#define ADC_CDR6_OFF 0x00000048 ///< Channel data register 6 offeset. +#define ADC_CDR7_OFF 0x0000004C ///< Channel data register 7 offeset. + +#define ADC_CDR0 (*((reg32_t *)(ADC_BASE + ADC_CDR0_OFF))) ///< Channel data register 0. +#define ADC_CDR1 (*((reg32_t *)(ADC_BASE + ADC_CDR1_OFF))) ///< Channel data register 1. +#define ADC_CDR2 (*((reg32_t *)(ADC_BASE + ADC_CDR2_OFF))) ///< Channel data register 2. +#define ADC_CDR3 (*((reg32_t *)(ADC_BASE + ADC_CDR3_OFF))) ///< Channel data register 3. +#define ADC_CDR4 (*((reg32_t *)(ADC_BASE + ADC_CDR4_OFF))) ///< Channel data register 4. +#define ADC_CDR5 (*((reg32_t *)(ADC_BASE + ADC_CDR5_OFF))) ///< Channel data register 5. +#define ADC_CDR6 (*((reg32_t *)(ADC_BASE + ADC_CDR6_OFF))) ///< Channel data register 6. +#define ADC_CDR7 (*((reg32_t *)(ADC_BASE + ADC_CDR7_OFF))) ///< Channel data register 7. +/* \} */ + +#endif /* AT91_ADC_H */ diff --git a/bertos/cpu/arm/io/at91_aic.h b/bertos/cpu/arm/io/at91_aic.h new file mode 100644 index 0000000..58bd741 --- /dev/null +++ b/bertos/cpu/arm/io/at91_aic.h @@ -0,0 +1,222 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91 advanced interrupt controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_AIC_H +#define AT91_AIC_H + +#include + + + +/** + * Source mode register array. + */ +#define AIC_SMR(i) (*((reg32_t *)(AIC_BASE + (i) * 4))) + +/** + * Priority mask. + * Priority levels can be between 0 (lowest) and 7 (highest). + */ +#define AIC_PRIOR_MASK 0x00000007 + +/** + * Interrupt source type mask. + * Internal interrupts can level sensitive or edge triggered. + * + * External interrupts can triggered on positive or negative levels or + * on rising or falling edges. + */ +/*\{*/ +#define AIC_SRCTYPE_MASK 0x00000060 + +#define AIC_SRCTYPE_INT_LEVEL_SENSITIVE 0x00000000 ///< Internal level sensitive. +#define AIC_SRCTYPE_INT_EDGE_TRIGGERED 0x00000020 ///< Internal edge triggered. +#define AIC_SRCTYPE_EXT_LOW_LEVEL 0x00000000 ///< External low level. +#define AIC_SRCTYPE_EXT_NEGATIVE_EDGE 0x00000020 ///< External falling edge. +#define AIC_SRCTYPE_EXT_HIGH_LEVEL 0x00000040 ///< External high level. +#define AIC_SRCTYPE_EXT_POSITIVE_EDGE 0x00000060 ///< External rising edge. +/*\}*/ + + +/** + * Type for interrupt handlers. + */ +typedef void (*irq_handler_t)(void); + +/** Interrupt Source Vector Registers */ +/*\{*/ +/** Source vector register array. + * + * Stores the addresses of the corresponding interrupt handlers. + */ +#define AIC_SVR(i) (*((volatile irq_handler_t *)(AIC_BASE + 0x80 + (i) * 4))) +/*\}*/ + +/** Interrupt Vector Register */ +/*\{*/ +#define AIC_IVR_OFF 0x00000100 ///< IRQ vector register offset. +#define AIC_IVR (*((reg32_t *)(AIC_BASE + AIC_IVR_OFF))) ///< IRQ vector register address. +/*\}*/ + +/** Fast Interrupt Vector Register */ +/*\{*/ +#define AIC_FVR_OFF 0x00000104 ///< FIQ vector register offset. +#define AIC_FVR (*((reg32_t *)(AIC_BASE + AIC_FVR_OFF))) ///< FIQ vector register address. +/*\}*/ + +/** Interrupt Status Register */ +/*\{*/ +#define AIC_ISR_OFF 0x00000108 ///< Interrupt status register offset. +#define AIC_ISR (*((reg32_t *)(AIC_BASE + AIC_ISR_OFF))) ///< Interrupt status register address. +#define AIC_IRQID_MASK 0x0000001F ///< Current interrupt identifier mask. +/*\}*/ + +/** Interrupt Pending Register */ +/*\{*/ +#define AIC_IPR_OFF 0x0000010C ///< Interrupt pending register offset. +#define AIC_IPR (*((reg32_t *)(AIC_BASE + AIC_IPR_OFF))) ///< Interrupt pending register address. +/*\}*/ + +/** Interrupt Mask Register */ +/*\{*/ +#define AIC_IMR_OFF 0x00000110 ///< Interrupt mask register offset. +#define AIC_IMR (*((reg32_t *)(AIC_BASE + AIC_IMR_OFF))) ///< Interrupt mask register address. +/*\}*/ + +/** Interrupt Core Status Register */ +/*\{*/ +#define AIC_CISR_OFF 0x00000114 ///< Core interrupt status register offset. +#define AIC_CISR (*((reg32_t *)(AIC_BASE + AIC_CISR_OFF))) ///< Core interrupt status register address. +#define AIC_NFIQ 1 ///< Core FIQ Status +#define AIC_NIRQ 2 ///< Core IRQ Status +/*\}*/ + +/** Interrupt Enable Command Register */ +/*\{*/ +#define AIC_IECR_OFF 0x00000120 ///< Interrupt enable command register offset. +#define AIC_IECR (*((reg32_t *)(AIC_BASE + AIC_IECR_OFF))) ///< Interrupt enable command register address. +/*\}*/ + +/** Interrupt Disable Command Register */ +/*\{*/ +#define AIC_IDCR_OFF 0x00000124 ///< Interrupt disable command register offset. +#define AIC_IDCR (*((reg32_t *)(AIC_BASE + AIC_IDCR_OFF))) ///< Interrupt disable command register address. +/*\}*/ + +/** Interrupt Clear Command Register */ +/*\{*/ +#define AIC_ICCR_OFF 0x00000128 ///< Interrupt clear command register offset. +#define AIC_ICCR (*((reg32_t *)(AIC_BASE + AIC_ICCR_OFF))) ///< Interrupt clear command register address. +/*\}*/ + +/** Interrupt Set Command Register */ +/*\{*/ +#define AIC_ISCR_OFF 0x0000012C ///< Interrupt set command register offset. +#define AIC_ISCR (*((reg32_t *)(AIC_BASE + AIC_ISCR_OFF))) ///< Interrupt set command register address. +/*\}*/ + +/** End Of Interrupt Command Register */ +/*\{*/ +#define AIC_EOICR_OFF 0x00000130 ///< End of interrupt command register offset. +#define AIC_EOICR (*((reg32_t *)(AIC_BASE + AIC_EOICR_OFF))) ///< End of interrupt command register address. +/*\}*/ + +/** Spurious Interrupt Vector Register */ +/*\{*/ +#define AIC_SPU_OFF 0x00000134 ///< Spurious vector register offset. +#define AIC_SPU (*((reg32_t *)(AIC_BASE + AIC_SPU_OFF)== ///< Spurious vector register address. +/*\}*/ + +/** Debug Control Register */ +/*\{*/ +#define AIC_DCR_OFF 0x0000138 ///< Debug control register offset. +#define AIC_DCR (*((reg32_t *)(AIC_BASE + AIC_DCR_OFF))) ///< Debug control register address. +/*\}*/ + +/** Fast Forcing Enable Register */ +/*\{*/ +#define AIC_FFER_OFF 0x00000140 ///< Fast forcing enable register offset. +#define AIC_FFER (*((reg32_t *)(AIC_BASE + AIC_FFER_OFF))) ///< Fast forcing enable register address. +/*\}*/ + +/** Fast Forcing Disable Register */ +/*\{*/ +#define AIC_FFDR_OFF 0x00000144 ///< Fast forcing disable register address. +#define AIC_FFDR (*((reg32_t *)(AIC_BASE + AIC_FFDR_OFF))) ///< Fast forcing disable register address. +/*\}*/ + +/** Fast Forcing Status Register */ +/*\{*/ +#define AIC_FFSR_OFF 0x00000148 ///< Fast forcing status register address. +#define AIC_FFSR (*((reg32_t *)(AIC_BASE + AIC_FFSR_OFF))) ///< Fast forcing status register address. +/*\}*/ + +#endif /* AT91_AIC_H */ diff --git a/bertos/cpu/arm/io/at91_dbgu.h b/bertos/cpu/arm/io/at91_dbgu.h new file mode 100644 index 0000000..fbd2c3c --- /dev/null +++ b/bertos/cpu/arm/io/at91_dbgu.h @@ -0,0 +1,106 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91 Debug unit. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ +#ifndef AT91_DBGU_H +#define AT91_DBGU_H + +#define DBGU_CR (*((reg32_t *)(DBGU_BASE + US_CR_OFF))) /// + * + * \author Daniele Basile + * + * AT91 Ethernet MAC 10/100 controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_EMAC_H +#define AT91_EMAC_H + + +/** + * + * Network Control Register + * + */ +/* \{ */ +#define EMAC_NCR_OFF 0x00000000 ///< Network control register offset. +#define EMAC_NCR (*((reg32_t *)(EMAC_BASE + EMAC_NCR_OFF))) ///< Network Control register address. +#define EMAC_LB 0 ///< PHY loopback. +#define EMAC_LLB 1 ///< EMAC loopback. +#define EMAC_RE 2 ///< Receive enable. +#define EMAC_TE 3 ///< Transmit enable. +#define EMAC_MPE 4 ///< Management port enable. +#define EMAC_CLRSTAT 5 ///< Clear statistics registers. +#define EMAC_INCSTAT 6 ///< Increment statistics registers. +#define EMAC_WESTAT 7 ///< Write enable for statistics registers. +#define EMAC_BP 8 ///< Back pressure. +#define EMAC_TSTART 9 ///< Start Transmission. +#define EMAC_THALT 10 ///< Transmission halt. +// Not in sam7x +//#define EMAC_TPFR 11 ///< Transmit pause frame. +//#define EMAC_TZQ 12 ///< Transmit zero quantum pause frame. +/* \} */ + +/** + * Network Configuration Register + * + */ +/* \{ */ +#define EMAC_NCFGR_OFF 0x00000004 ///< Network configuration register offset. +#define EMAC_NCFGR (*((reg32_t *)(EMAC_BASE + EMAC_NCFGR_OFF))) ///< Network configuration register address. +#define EMAC_SPD 0 ///< Speed, set for 100Mb. +#define EMAC_FD 1 ///< Full duplex. +#define EMAC_JFRAME 3 ///< Jumbo Frames. +#define EMAC_CAF 4 ///< Copy all frames. +#define EMAC_NBC 5 ///< No broadcast. +#define EMAC_MTI 6 ///< Multicast hash event enable. +#define EMAC_UNI 7 ///< Unicast hash enable. +#define EMAC_BIG 8 ///< Receive 1522 bytes. +// Not in sam7x +//#define EMAC_EAE 9 ///< External address match enable. +#define EMAC_CLK 0x00000C00 ///< Clock divider mask. +#define EMAC_CLK_HCLK_8 0x00000000 ///< HCLK divided by 8. +#define EMAC_CLK_HCLK_16 0x00000400 ///< HCLK divided by 16. +#define EMAC_CLK_HCLK_32 0x00000800 ///< HCLK divided by 32. +#define EMAC_CLK_HCLK_64 0x00000C00 ///< HCLK divided by 64. +#define EMAC_RTY 12 ///< Retry test. +#define EMAC_PAE 13 ///< Pause enable. +#define EMAC_RBOF 0x0000C000 ///< Receive buffer offset. +#define EMAC_RBOF_OFFSET_0 0x00000000 ///< No offset from start of receive buffer. +#define EMAC_RBOF_OFFSET_1 0x00004000 ///< One byte offset from start of receive buffer. +#define EMAC_RBOF_OFFSET_2 0x00008000 ///< Two bytes offset from start of receive buffer. +#define EMAC_RBOF_OFFSET_3 0x0000C000 ///< Three bytes offset from start of receive buffer. +#define EMAC_RLCE 16 ///< Receive length field checking enable. +#define EMAC_DRFCS 17 ///< Discard receive FCS. +#define EMAC_EFRHD 18 ///< Allow receive during transmit in half duplex. +#define EMAC_IRXFCS 19 ///< Ignore received FCS. +/* \} */ + +/** + * Network Status Register + * + */ +/* \{ */ +#define EMAC_NSR_OFF 0x00000008 ///< Network Status register offset. +#define EMAC_NSR (*((reg32_t *)(EMAC_BASE + EMAC_NSR_OFF))) ///< Network Status register address. +// Not in sam7x +//#define EMAC_LINKR 0 ///< . +#define EMAC_MDIO 1 ///< Status of MDIO input pin. +#define EMAC_IDLE 2 ///< Set when PHY is running. +/* \} */ + +/** + * Transmit Status Register + */ +/* \{ */ +#define EMAC_TSR_OFF 0x00000014 ///< Transmit Status register offset. +#define EMAC_TSR (*((reg32_t *)(EMAC_BASE + EMAC_TSR_OFF))) ///< Transmit Status register address. + +#define EMAC_UBR 0 ///< Used bit read. +#define EMAC_COL 1 ///< Collision occurred. +#define EMAC_RLES 2 ///< Retry limit exceeded. +#define EMAC_TGO 3 ///< Transmit active. +#define EMAC_BEX 4 ///< Buffers exhausted mid frame. +#define EMAC_COMP 5 ///< Transmit complete. +#define EMAC_UND 6 ///< Transmit underrun. +/* \} */ + +/** + * Buffer Queue Pointer Register + * + */ +/* \{ */ +#define EMAC_RBQP_OFF 0x00000018 ///< Receive buffer queue pointer. +#define EMAC_RBQP (*((reg32_t *)(EMAC_BASE + EMAC_RBQP_OFF))) ///< Receive buffer queue pointer. +#define EMAC_TBQP_OFF 0x0000001C ///< Transmit buffer queue pointer. +#define EMAC_TBQP (*((reg32_t *)(EMAC_BASE + EMAC_TBQP_OFF))) ///< Transmit buffer queue pointer. +/* \} */ + +/** + * Receive Status Register + */ +/* \{ */ +#define EMAC_RSR_OFF 0x00000020 ///< Receive status register offset. +#define EMAC_RSR (*((reg32_t *)(EMAC_BASE + EMAC_RSR_OFF))) ///< Receive status register address. +#define EMAC_BNA 0 ///< Buffer not available. +#define EMAC_REC 1 ///< Frame received. +#define EMAC_OVR 2 ///< Receive overrun. +/* \} */ + +/** Interrupt Registers */ +/* \{ */ +#define EMAC_ISR_OFF 0x00000024 ///< Status register offset. +#define EMAC_ISR (*((reg32_t *)(EMAC_BASE + EMAC_ISR_OFF))) ///< Status register address. +#define EMAC_IER_OFF 0x00000028 ///< Enable register offset. +#define EMAC_IER (*((reg32_t *)(EMAC_BASE + EMAC_IER_OFF))) ///< Enable register address. +#define EMAC_IDR_OFF 0x0000002C ///< Disable register offset. +#define EMAC_IDR (*((reg32_t *)(EMAC_BASE + EMAC_IDR_OFF))) ///< Disable register address. +#define EMAC_IMR_OFF 0x00000030 ///< Mask register offset. +#define EMAC_IMR (*((reg32_t *)(EMAC_BASE + EMAC_IMR_OFF))) ///< Mask register address. + +#define EMAC_MFD 0 ///< Management frame done. +#define EMAC_RCOMP 1 ///< Receive complete. +#define EMAC_RXUBR 2 ///< Receive used bit read. +#define EMAC_TXUBR 3 ///< Transmit used bit read. +#define EMAC_TUND 4 ///< Ethernet transmit buffer underrun. +#define EMAC_RLEX 5 ///< Retry limit exceeded. +#define EMAC_TXERR 6 ///< Transmit error. +#define EMAC_TCOMP 7 ///< Transmit complete. +//Not in sam7x +//#define EMAC_LINK 8 ///< . +#define EMAC_ROVR 10 ///< Receive overrun. +#define EMAC_HRESP 11 ///< DMA bus error. +#define EMAC_PFR 12 ///< Pause frame received. +#define EMAC_PTZ 13 ///< Pause time zero. +/* \} */ + +/** + * PHY Maintenance Register + * + */ +/* \{ */ +#define EMAC_MAN_OFF 0x00000034 ///< PHY maintenance register offset. +#define EMAC_MAN (*((reg32_t *)(EMAC_BASE + EMAC_MAN_OFF))) ///< PHY maintenance register address. +#define EMAC_DATA 0x0000FFFF ///< PHY data mask. +#define EMAC_CODE 0x00020000 ///< Fixed value. +#define EMAC_REGA 0x007C0000 ///< PHY register address mask. +#define EMAC_REGA_SHIFT 18 ///< PHY register address mask. +#define EMAC_PHYA 0x0F800000 ///< PHY address mask. +#define EMAC_PHYA_SHIFT 23 ///< PHY address mask. +#define EMAC_RW 0x30000000 ///< PHY read/write command mask. +#define EMAC_RW_READ 0x20000000 ///< PHY read command. +#define EMAC_RW_WRITE 0x10000000 ///< PHY write command. +#define EMAC_SOF 0x40000000 ///< Fixed value. +/* \} */ + +/** + * Pause Time Register + * + */ +/* \{ */ +#define EMAC_PTR_OFF 0x00000038 ///< Pause time register offset. +#define EMAC_PTR (*((reg32_t *)(EMAC_BASE + EMAC_PTR_OFF))) ///< Pause time register address. +#define EMAC_PTIME 0x0000FFFF ///< Pause time mask. +/* \} */ + +/** + * Statistics Registers + */ +/* \{ */ +#define EMAC_PFRR_OFF 0x0000003C ///< Pause frames received register offset. +#define EMAC_PFRR (*((reg32_t *)(EMAC_BASE + EMAC_PFRR_OFF))) ///< Pause frames received register address. +#define EMAC_FTO_OFF 0x00000040 ///< Frames transmitted OK register offset. +#define EMAC_FTO (*((reg32_t *)(EMAC_BASE + EMAC_FTO_OFF))) ///< Frames transmitted OK register address. +#define EMAC_SCF_OFF 0x00000044 ///< Single collision frame register offset. +#define EMAC_SCF (*((reg32_t *)(EMAC_BASE + EMAC_SCF_OFF))) ///< Single collision frame register address. +#define EMAC_MCF_OFF 0x00000048 ///< Multiple collision frame register offset. +#define EMAC_MCF (*((reg32_t *)(EMAC_BASE + EMAC_MCF_OFF))) ///< Multiple collision frame register address. +#define EMAC_FRO_OFF 0x0000004C ///< Frames received OK register offset. +#define EMAC_FRO (*((reg32_t *)(EMAC_BASE + EMAC_FRO_OFF))) ///< Frames received OK register address. +#define EMAC_FCSE_OFF 0x00000050 ///< Frame check sequence error register offset. +#define EMAC_FCSE (*((reg32_t *)(EMAC_BASE + EMAC_FCSE_OFF))) ///< Frame check sequence error register address. +#define EMAC_ALE_OFF 0x00000054 ///< Alignment error register offset. +#define EMAC_ALE (*((reg32_t *)(EMAC_BASE + EMAC_ALE_OFF))) ///< Alignment error register address. +#define EMAC_DTF_OFF 0x00000058 ///< Deferred transmission frame register offset. +#define EMAC_DTF (*((reg32_t *)(EMAC_BASE + EMAC_DTF_OFF))) ///< Deferred transmission frame register address. +#define EMAC_LCOL_OFF 0x0000005C ///< Late collision register offset. +#define EMAC_LCOL (*((reg32_t *)(EMAC_BASE + EMAC_LCOL_OFF))) ///< Late collision register address. +#define EMAC_ECOL_OFF 0x00000060 ///< Excessive collision register offset. +#define EMAC_ECOL (*((reg32_t *)(EMAC_BASE + EMAC_ECOL_OFF))) ///< Excessive collision register address. +#define EMAC_TUNDR_OFF 0x00000064 ///< Transmit underrun error register offset. +#define EMAC_TUNDR (*((reg32_t *)(EMAC_BASE + EMAC_TUNDR_OFF))) ///< Transmit underrun error register address. +#define EMAC_CSE_OFF 0x00000068 ///< Carrier sense error register offset. +#define EMAC_CSE (*((reg32_t *)(EMAC_BASE + EMAC_CSE_OFF))) ///< Carrier sense error register address. +#define EMAC_RRE_OFF 0x0000006C ///< Receive resource error register offset. +#define EMAC_RRE (*((reg32_t *)(EMAC_BASE + EMAC_RRE_OFF))) ///< Receive resource error register address. +#define EMAC_ROV_OFF 0x00000070 ///< Receive overrun errors register offset. +#define EMAC_ROV (*((reg32_t *)(EMAC_BASE + EMAC_ROV_OFF))) ///< Receive overrun errors register address. +#define EMAC_RSE_OFF 0x00000074 ///< Receive symbol errors register offset. +#define EMAC_RSE (*((reg32_t *)(EMAC_BASE + EMAC_RSE_OFF))) ///< Receive symbol errors register address. +#define EMAC_ELE_OFF 0x00000078 ///< Excessive length errors register offset. +#define EMAC_ELE (*((reg32_t *)(EMAC_BASE + EMAC_ELE_OFF))) ///< Excessive length errors register address. +#define EMAC_RJA_OFF 0x0000007C ///< Receive jabbers register offset. +#define EMAC_RJA (*((reg32_t *)(EMAC_BASE + EMAC_RJA_OFF))) ///< Receive jabbers register address. +#define EMAC_USF_OFF 0x00000080 ///< Undersize frames register offset. +#define EMAC_USF (*((reg32_t *)(EMAC_BASE + EMAC_USF_OFF))) ///< Undersize frames register address. +#define EMAC_STE_OFF 0x00000084 ///< SQE test error register offset. +#define EMAC_STE (*((reg32_t *)(EMAC_BASE + EMAC_STE_OFF))) ///< SQE test error register address. +#define EMAC_RLE_OFF 0x00000088 ///< Receive length field mismatch register offset. +#define EMAC_RLE (*((reg32_t *)(EMAC_BASE + EMAC_RLE_OFF))) ///< Receive length field mismatch register address. +// Not in sam7x +//#define EMAC_TPF_OFF 0x0000008C ///< Transmitted pause frames register offset. +//#define EMAC_TPF (*((reg32_t *)(EMAC_BASE + EMAC_TPF_OFF) ///< Transmitted pause frames register address. +/* \} */ + +/** + * MAC Adressing Registers + * + */ +/* \{ */ +#define EMAC_HRB_OFF 0x00000090 ///< Hash address bottom[31:0]. +#define EMAC_HRB (*((reg32_t *)(EMAC_BASE + EMAC_HRB_OFF))) ///< Hash address bottom[31:0]. +#define EMAC_HRT_OFF 0x00000094 ///< Hash address top[63:32]. +#define EMAC_HRT (*((reg32_t *)(EMAC_BASE + EMAC_HRT_OFF))) ///< Hash address top[63:32]. +#define EMAC_SA1L_OFF 0x00000098 ///< Specific address 1 bottom, first 4 bytes. +#define EMAC_SA1L (*((reg32_t *)(EMAC_BASE + EMAC_SA1L_OFF))) ///< Specific address 1 bottom, first 4 bytes. +#define EMAC_SA1H_OFF 0x0000009C ///< Specific address 1 top, last 2 bytes. +#define EMAC_SA1H (*((reg32_t *)(EMAC_BASE + EMAC_SA1H_OFF))) ///< Specific address 1 top, last 2 bytes. +#define EMAC_SA2L_OFF 0x000000A0 ///< Specific address 2 bottom, first 4 bytes. +#define EMAC_SA2L (*((reg32_t *)(EMAC_BASE + EMAC_SA2L_OFF))) ///< Specific address 2 bottom, first 4 bytes. +#define EMAC_SA2H_OFF 0x000000A4 ///< Specific address 2 top, last 2 bytes. +#define EMAC_SA2H (*((reg32_t *)(EMAC_BASE + EMAC_SA2H_OFF))) ///< Specific address 2 top, last 2 bytes. +#define EMAC_SA3L_OFF 0x000000A8 ///< Specific address 3 bottom, first 4 bytes. +#define EMAC_SA3L (*((reg32_t *)(EMAC_BASE + EMAC_SA3L_OFF))) ///< Specific address 3 bottom, first 4 bytes. +#define EMAC_SA3H_OFF 0x000000AC ///< Specific address 3 top, last 2 bytes. +#define EMAC_SA3H (*((reg32_t *)(EMAC_BASE + EMAC_SA3H_OFF))) ///< Specific address 3 top, last 2 bytes. +#define EMAC_SA4L_OFF 0x000000B0 ///< Specific address 4 bottom, first 4 bytes. +#define EMAC_SA4L (*((reg32_t *)(EMAC_BASE + EMAC_SA4L_OFF))) ///< Specific address 4 bottom, first 4 bytes. +#define EMAC_SA4H_OFF 0x000000B4 ///< Specific address 4 top, last 2 bytes. +#define EMAC_SA4H (*((reg32_t *)(EMAC_BASE + EMAC_SA4H_OFF))) ///< Specific address 4 top, last 2 bytes. +/* \} */ + +/** + * Type ID Register + * + */ +/* \{ */ +#define EMAC_TID_OFF 0x000000B8 ///< Type ID checking register offset. +#define EMAC_TID (*((reg32_t *)(EMAC_BASE + EMAC_TID_OFF))) ///< Type ID checking register address. +// Not in sam7x +//#define EMAC_TPQ_OFF 0x000000BC ///< Transmit pause quantum register offset. +//#define EMAC_TPQ (*((reg32_t *)(EMAC_BASE + EMAC_TPQ_OFF))) ///< Transmit pause quantum register address. +/* \} */ + +/** + * User Input/Output Register + * + */ +/* \{ */ +#define EMAC_USRIO_OFF 0x000000C0 ///< User input/output register offset. +#define EMAC_USRIO (*((reg32_t *)(EMAC_BASE + EMAC_USRIO_OFF))) ///< User input/output register address. + +#define EMAC_RMII 0 ///< Enable reduced MII. +#define EMAC_CLKEN 1 ///< Enable tranceiver input clock. +/* \} */ + +// Not in sam7x +/* + * Wake On LAN Register + * + * +* \{ * +#define EMAC_WOL_OFF 0x000000C4 ///< Wake On LAN register offset. +#define EMAC_WOL (*((reg32_t *)(EMAC_BASE + EMAC_WOL_OFF) ///< Wake On LAN register address. +#define EMAC_IP 0x0000FFFF ///< ARP request IP address mask. +#define EMAC_MAG 0x00010000 ///< Magic packet event enable. +#define EMAC_ARP 0x00020000 ///< ARP request event enable. +#define EMAC_SA1 0x00040000 ///< Specific address register 1 event enable. +* \} * + +** Revision Register * +* \{ * +#define EMAC_REV_OFF 0x000000FC ///< Revision register offset. +#define EMAC_REV (*((reg32_t *)(EMAC_BASE + EMAC_REV_OFF) ///< Revision register address. +#define EMAC_REVREF 0x0000FFFF ///< Revision. +#define EMAC_PARTREF 0xFFFF0000 ///< Part. +* \} * +*/ + +#endif /* AT91_EMAC_H */ diff --git a/bertos/cpu/arm/io/at91_mc.h b/bertos/cpu/arm/io/at91_mc.h new file mode 100644 index 0000000..7f28ba2 --- /dev/null +++ b/bertos/cpu/arm/io/at91_mc.h @@ -0,0 +1,153 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91 Memory controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_MC_H +#define AT91_MC_H + +#define MC_RCR_OFF 0x00000000 ///< MC remap control register offset. +#define MC_RCR (*((reg32_t *)(MC_BASE + MC_RCR_OFF))) ///< MC remap control register address. +#define MC_RCB 0 ///< Remap command. + +#define MC_ASR_OFF 0x00000004 ///< MC abort status register offset. +#define MC_ASR (*((reg32_t *)(MC_BASE + MC_ASR_OFF))) ///< MC abort status register address. +#define MC_UNDADD 0 ///< Undefined Addess Abort status. +#define MC_MISADD 1 ///< Misaligned Addess Abort status. +#define MC_ABTSZ_MASK 0x00000300 ///< Abort size status mask. +#define MC_ABTSZ_BYTE 0x00000000 ///< Byte size abort. +#define MC_ABTSZ_HWORD 0x00000100 ///< Half-word size abort. +#define MC_ABTSZ_WORD 0x00000200 ///< Word size abort. +#define MC_ABTTYP_MASK 0x00000C00 ///< Abort type status mask. +#define MC_ABTTYP_DATAR 0x00000000 ///< Data read abort. +#define MC_ABTTYP_DATAW 0x00000400 ///< Data write abort. +#define MC_ABTTYP_FETCH 0x00000800 ///< Code fetch abort. +#define MC_MST_PDC 0x00020000 ///< PDC abort source. +#define MC_MST_ARM 0x00040000 ///< ARM abort source. +#define MC_SVMST_PDC 0x02000000 ///< Saved PDC abort source. +#define MC_SVMST_ARM 0x04000000 ///< Saved ARM abort source. + +#define MC_AASR_OFF 0x00000008 ///< MC abort address status register offset. +#define MC_AASR (*((reg32_t *)(MC_BASE + MC_AASR_OFF))) ///< MC abort address status register address. + +#define MC_FMR_OFF 0x00000060 ///< MC flash mode register offset. +#define MC_FMR (*((reg32_t *)(MC_BASE + MC_FMR_OFF))) ///< MC flash mode register address. +#define MC_FRDY 0 ///< Flash ready. +#define MC_LOCKE 2 ///< Lock error. +#define MC_PROGE 3 ///< Programming error. +#define MC_NEBP 7 ///< No erase before programming. +#define MC_FWS_MASK 0x00000300 ///< Flash wait state mask. +#define MC_FWS_1R2W 0x00000000 ///< 1 cycle for read, 2 for write operations. +#define MC_FWS_2R3W 0x00000100 ///< 2 cycles for read, 3 for write operations. +#define MC_FWS_3R4W 0x00000200 ///< 3 cycles for read, 4 for write operations. +#define MC_FWS_4R4W 0x00000300 ///< 4 cycles for read and write operations. +#define MC_FMCN_MASK 0x00FF0000 ///< Flash microsecond cycle number mask. +#define MC_FMCN_SHIFT 16 ///< Flash microsecond cycle number shift. + +#define MC_FCR_OFF 0x00000064 ///< MC flash command register offset. +#define MC_FCR (*((reg32_t *)(MC_BASE + MC_FCR_OFF))) ///< MC flash command register address. +#define MC_FCMD_MASK 0x0000000F ///< Flash command mask. +#define MC_FCMD_NOP 0x00000000 ///< No command. +#define MC_FCMD_WP 0x00000001 ///< Write page. +#define MC_FCMD_SLB 0x00000002 ///< Set lock bit. +#define MC_FCMD_WPL 0x00000003 ///< Write page and lock. +#define MC_FCMD_CLB 0x00000004 ///< Clear lock bit. +#define MC_FCMD_EA 0x00000008 ///< Erase all. +#define MC_FCMD_SGPB 0x0000000B ///< Set general purpose NVM bit. +#define MC_FCMD_CGPB 0x0000000D ///< Clear general purpose NVM bit. +#define MC_FCMD_SSB 0x0000000F ///< Set security bit. +#define MC_PAGEN_MASK 0x0003FF00 ///< Page number mask. +#define MC_KEY 0x5A000000 ///< Writing protect key. + +#define MC_FSR_OFF 0x00000068 ///< MC flash status register offset. +#define MC_FSR (*((reg32_t *)(MC_BASE + MC_FSR_OFF))) ///< MC flash status register address. +#define MC_SECURITY 4 ///< Security bit status. + +#define MC_GPNVM0 8 ///< General purpose NVM bit 0. +#define MC_GPNVM1 9 ///< General purpose NVM bit 1. +#define MC_GPNVM2 10 ///< General purpose NVM bit 2. + +#define MC_LOCKS0 16 ///< Lock region 0 lock status. +#define MC_LOCKS1 17 ///< Lock region 1 lock status. +#define MC_LOCKS2 18 ///< Lock region 2 lock status. +#define MC_LOCKS3 19 ///< Lock region 3 lock status. +#define MC_LOCKS4 20 ///< Lock region 4 lock status. +#define MC_LOCKS5 21 ///< Lock region 5 lock status. +#define MC_LOCKS6 22 ///< Lock region 6 lock status. +#define MC_LOCKS7 23 ///< Lock region 7 lock status. +#define MC_LOCKS8 24 ///< Lock region 8 lock status. +#define MC_LOCKS9 25 ///< Lock region 9 lock status. +#define MC_LOCKS10 26 ///< Lock region 10 lock status. +#define MC_LOCKS11 27 ///< Lock region 11 lock status. +#define MC_LOCKS12 28 ///< Lock region 12 lock status. +#define MC_LOCKS13 29 ///< Lock region 13 lock status. +#define MC_LOCKS14 30 ///< Lock region 14 lock status. +#define MC_LOCKS15 31 ///< Lock region 15 lock status. + +#endif /* AT91_MC_H */ diff --git a/bertos/cpu/arm/io/at91_pio.h b/bertos/cpu/arm/io/at91_pio.h new file mode 100644 index 0000000..3bc5741 --- /dev/null +++ b/bertos/cpu/arm/io/at91_pio.h @@ -0,0 +1,296 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91 Parallel input/output controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_PIO_H +#define AT91_PIO_H + +/** PIO Register Offsets */ +/*\{*/ +#define PIO_PER_OFF 0x00000000 ///< PIO enable register offset. +#define PIO_PDR_OFF 0x00000004 ///< PIO disable register offset. +#define PIO_PSR_OFF 0x00000008 ///< PIO status register offset. +#define PIO_OER_OFF 0x00000010 ///< Output enable register offset. +#define PIO_ODR_OFF 0x00000014 ///< Output disable register offset. +#define PIO_OSR_OFF 0x00000018 ///< Output status register offset. +#define PIO_IFER_OFF 0x00000020 ///< Input filter enable register offset. +#define PIO_IFDR_OFF 0x00000024 ///< Input filter disable register offset. +#define PIO_IFSR_OFF 0x00000028 ///< Input filter status register offset. +#define PIO_SODR_OFF 0x00000030 ///< Set output data register offset. +#define PIO_CODR_OFF 0x00000034 ///< Clear output data register offset. +#define PIO_ODSR_OFF 0x00000038 ///< Output data status register offset. +#define PIO_PDSR_OFF 0x0000003C ///< Pin data status register offset. +#define PIO_IER_OFF 0x00000040 ///< Interrupt enable register offset. +#define PIO_IDR_OFF 0x00000044 ///< Interrupt disable register offset. +#define PIO_IMR_OFF 0x00000048 ///< Interrupt mask register offset. +#define PIO_ISR_OFF 0x0000004C ///< Interrupt status register offset. +#if PIO_HAS_MULTIDRIVER +#define PIO_MDER_OFF 0x00000050 ///< Multi-driver enable register offset. +#define PIO_MDDR_OFF 0x00000054 ///< Multi-driver disable register offset. +#define PIO_MDSR_OFF 0x00000058 ///< Multi-driver status register offset. +#endif /* PIO_HAS_MULTIDRIVER */ +#if PIO_HAS_PULLUP +#define PIO_PUDR_OFF 0x00000060 ///< Pull-up disable register offset. +#define PIO_PUER_OFF 0x00000064 ///< Pull-up enable register offset. +#define PIO_PUSR_OFF 0x00000068 ///< Pull-up status register offset. +#endif /* PIO_HAS_PULLUP */ +#if PIO_HAS_PERIPHERALSELECT +#define PIO_ASR_OFF 0x00000070 ///< PIO peripheral A select register offset. +#define PIO_BSR_OFF 0x00000074 ///< PIO peripheral B select register offset. +#define PIO_ABSR_OFF 0x00000078 ///< PIO peripheral AB status register offset. +#endif /* PIO_HAS_PERIPHERALSELECT */ +#if PIO_HAS_OUTPUTWRITEENABLE +#define PIO_OWER_OFF 0x000000A0 ///< PIO output write enable register offset. +#define PIO_OWDR_OFF 0x000000A4 ///< PIO output write disable register offset. +#define PIO_OWSR_OFF 0x000000A8 ///< PIO output write status register offset. +#endif /* PIO_HAS_OUTPUTWRITEENABLE */ +/*\}*/ + +/** Single PIO Register Addresses */ +/*\{*/ +#if defined(PIO_BASE) + #define PIO_ACCESS(offset) (*((reg32_t *)(PIO_BASE + (offset)))) + + #define PIO_PER PIO_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIO_PDR PIO_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIO_PSR PIO_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIO_OER PIO_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIO_ODR PIO_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIO_OSR PIO_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIO_IFER PIO_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIO_IFDR PIO_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIO_IFSR PIO_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIO_SODR PIO_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIO_CODR PIO_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIO_ODSR PIO_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIO_PDSR PIO_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIO_IER PIO_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIO_IDR PIO_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIO_IMR PIO_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIO_ISR PIO_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #if PIO_HAS_MULTIDRIVER + #define PIO_MDER PIO_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIO_MDDR PIO_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIO_MDSR PIO_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #endif /* PIO_HAS_MULTIDRIVER */ + #if PIO_HAS_PULLUP + #define PIO_PUDR PIO_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIO_PUER PIO_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIO_PUSR PIO_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. + #endif /* PIO_HAS_PULLUP */ + #if PIO_HAS_PERIPHERALSELECT + #define PIO_ASR PIO_ACCESS(PIO_ASR_OFF) ///< PIO peripheral A select register address. + #define PIO_BSR PIO_ACCESS(PIO_BSR_OFF) ///< PIO peripheral B select register address. + #define PIO_ABSR PIO_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral AB status register address. + #endif /* PIO_HAS_PERIPHERALSELECT */ + #if PIO_HAS_OUTPUTWRITEENABLE + #define PIO_OWER PIO_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIO_OWDR PIO_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIO_OWSR PIO_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + #endif /* PIO_HAS_OUTPUTWRITEENABLE */ +#endif /* PIO_BASE */ +/*\}*/ + +/** PIO A Register Addresses */ +/*\{*/ +#if defined(PIOA_BASE) + #define PIOA_ACCESS(offset) (*((reg32_t *)(PIOA_BASE + (offset)))) + + #define PIOA_PER PIOA_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOA_PDR PIOA_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOA_PSR PIOA_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOA_OER PIOA_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOA_ODR PIOA_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOA_OSR PIOA_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOA_IFER PIOA_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOA_IFDR PIOA_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOA_IFSR PIOA_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOA_SODR PIOA_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOA_CODR PIOA_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOA_ODSR PIOA_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOA_PDSR PIOA_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOA_IER PIOA_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOA_IDR PIOA_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOA_IMR PIOA_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOA_ISR PIOA_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #if PIO_HAS_MULTIDRIVER + #define PIOA_MDER PIOA_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOA_MDDR PIOA_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOA_MDSR PIOA_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #endif /* PIO_HAS_MULTIDRIVER */ + #if PIO_HAS_PULLUP + #define PIOA_PUDR PIOA_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOA_PUER PIOA_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOA_PUSR PIOA_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. + #endif /* PIO_HAS_PULLUP */ + #if PIO_HAS_PERIPHERALSELECT + #define PIOA_ASR PIOA_ACCESS(PIO_ASR_OFF) ///< PIO peripheral A select register address. + #define PIOA_BSR PIOA_ACCESS(PIO_BSR_OFF) ///< PIO peripheral B select register address. + #define PIOA_ABSR PIOA_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral AB status register address. + #endif /* PIO_HAS_PERIPHERALSELECT */ + #if PIO_HAS_OUTPUTWRITEENABLE + #define PIOA_OWER PIOA_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOA_OWDR PIOA_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOA_OWSR PIOA_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + #endif /* PIO_HAS_OUTPUTWRITEENABLE */ +#endif /* PIOA_BASE */ +/*\}*/ + +/** PIO B Register Addresses */ +/*\{*/ +#if defined(PIOB_BASE) + #define PIOB_ACCESS(offset) (*((reg32_t *)(PIOB_BASE + (offset)))) + + #define PIOB_PER PIOB_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOB_PDR PIOB_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOB_PSR PIOB_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOB_OER PIOB_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOB_ODR PIOB_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOB_OSR PIOB_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOB_IFER PIOB_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOB_IFDR PIOB_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOB_IFSR PIOB_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOB_SODR PIOB_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOB_CODR PIOB_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOB_ODSR PIOB_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOB_PDSR PIOB_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOB_IER PIOB_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOB_IDR PIOB_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOB_IMR PIOB_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOB_ISR PIOB_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #if PIO_HAS_MULTIDRIVER + #define PIOB_MDER PIOB_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOB_MDDR PIOB_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOB_MDSR PIOB_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #endif /* PIO_HAS_MULTIDRIVER */ + #if PIO_HAS_PULLUP + #define PIOB_PUDR PIOB_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOB_PUER PIOB_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOB_PUSR PIOB_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. + #endif /* PIO_HAS_PULLUP */ + #if PIO_HAS_PERIPHERALSELECT + #define PIOB_ASR PIOB_ACCESS(PIO_ASR_OFF) ///< PIO peripheral A select register address. + #define PIOB_BSR PIOB_ACCESS(PIO_BSR_OFF) ///< PIO peripheral B select register address. + #define PIOB_ABSR PIOB_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral AB status register address. + #endif /* PIO_HAS_PERIPHERALSELECT */ + #if PIO_HAS_OUTPUTWRITEENABLE + #define PIOB_OWER PIOB_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOB_OWDR PIOB_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOB_OWSR PIOB_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + #endif /* PIO_HAS_OUTPUTWRITEENABLE */ +#endif /* PIOB_BASE */ +/*\}*/ + +/** PIO C Register Addresses */ +/*\{*/ +#if defined(PIOC_BASE) + #define PIOC_ACCESS(offset) (*((reg32_t *)(PIOC_BASE + (offset)))) + + #define PIOC_PER PIOC_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOC_PDR PIOC_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOC_PSR PIOC_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOC_OER PIOC_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOC_ODR PIOC_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOC_OSR PIOC_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOC_IFER PIOC_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOC_IFDR PIOC_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOC_IFSR PIOC_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOC_SODR PIOC_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOC_CODR PIOC_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOC_ODSR PIOC_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOC_PDSR PIOC_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOC_IER PIOC_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOC_IDR PIOC_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOC_IMR PIOC_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOC_ISR PIOC_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #if PIO_HAS_MULTIDRIVER + #define PIOC_MDER PIOC_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOC_MDDR PIOC_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOC_MDSR PIOC_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #endif /* PIO_HAS_MULTIDRIVER */ + #if PIO_HAS_PULLUP + #define PIOC_PUDR PIOC_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOC_PUER PIOC_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOC_PUSR PIOC_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. + #endif /* PIO_HAS_PULLUP */ + #if PIO_HAS_PERIPHERALSELECT + #define PIOC_ASR PIOC_ACCESS(PIO_ASR_OFF) ///< PIO peripheral A select register address. + #define PIOC_BSR PIOC_ACCESS(PIO_BSR_OFF) ///< PIO peripheral B select register address. + #define PIOC_ABSR PIOC_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral AB status register address. + #endif /* PIO_HAS_PERIPHERALSELECT */ + #if PIO_HAS_OUTPUTWRITEENABLE + #define PIOC_OWER PIOC_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOC_OWDR PIOC_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOC_OWSR PIOC_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + #endif /* PIO_HAS_OUTPUTWRITEENABLE */ +#endif /* PIOC_BASE */ +/*\}*/ + +#endif /* AT91_PIO_H */ diff --git a/bertos/cpu/arm/io/at91_pit.h b/bertos/cpu/arm/io/at91_pit.h new file mode 100644 index 0000000..64e4d45 --- /dev/null +++ b/bertos/cpu/arm/io/at91_pit.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91 periodic interval timer. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_PIT_H +#define AT91_PIT_H + +#include +/** + *Periodic Inverval Timer Mode Register + *\{ + */ +#define PIT_MR_OFF 0x00000000 ///< Mode register offset. +#define PIT_MR (*((reg32_t *)(PIT_BASE + PIT_MR_OFF))) ///< Mode register address. + +#define PIV_MASK 0x000FFFFF ///< Periodic interval value mask. +#define PIV_SHIFT 0 ///< Periodic interval value shift. +#define PITEN 24 ///< Periodic interval timer enable. +#define PITIEN 25 ///< Periodic interval timer interrupt enable. +/*\}*/ + +/** + * Periodic Inverval Timer Status Register + *\{ + */ +#define PIT_SR_OFF 0x00000004 ///< Status register offset. +#define PIT_SR (*((reg32_t *)(PIT_BASE + PIT_SR_OFF))) ///< Status register address. + +#define PITS 0 ///< Timer has reached PIV. +/*\}*/ + +/** + * Periodic Inverval Timer Value and Image Registers + *\{ + */ +#define PIVR_OFF 0x00000008 ///< Value register offset. +#define PIVR (*((reg32_t *)(PIT_BASE + PIVR_OFF))) ///< Value register address. + +#define PIIR_OFF 0x0000000C ///< Image register offset. +#define PIIR (*((reg32_t *)(PIT_BASE + PIIR_OFF))) ///< Image register address. +#define CPIV_MASK 0x000FFFFF ///< Current periodic interval value mask. +#define CPIV_SHIFT 0 ///< Current periodic interval value SHIFT. +#define PICNT_MASK 0xFFF00000 ///< Periodic interval counter mask. +#define PICNT_SHIFT 20 ///< Periodic interval counter LSB. +/*\}*/ + +#endif /* AT91_PIT_H */ diff --git a/bertos/cpu/arm/io/at91_pmc.h b/bertos/cpu/arm/io/at91_pmc.h new file mode 100644 index 0000000..e684632 --- /dev/null +++ b/bertos/cpu/arm/io/at91_pmc.h @@ -0,0 +1,194 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91 power management controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_PMC_H +#define AT91_PMC_H + +/** System Clock Enable, Disable and Status Register */ +/*\{*/ +#define PMC_SCER_OFF 0x00000000 ///< System clock enable register offset. +#define PMC_SCER (*((reg32_t *)(PMC_BASE + PMC_SCER_OFF))) ///< System clock enable register address. +#define PMC_SCDR_OFF 0x00000004 ///< System clock disable register offset. +#define PMC_SCDR (*((reg32_t *)(PMC_BASE + PMC_SCDR_OFF))) ///< System clock disable register address. +#define PMC_SCSR_OFF 0x00000008 ///< System clock status register offset. +#define PMC_SCSR (*((reg32_t *)(PMC_BASE + PMC_SCSR_OFF))) ///< System clock status register address. + +#define PMC_PCK 0 ///< Processor clock. +#define PMC_UDP 7 ///< USB device port clock. +#define PMC_PCK0 8 ///< Programmable clock 0 output. +#define PMC_PCK1 9 ///< Programmable clock 1 output. +#define PMC_PCK2 10 ///< Programmable clock 2 output. +/*\}*/ + +/** Peripheral Clock Enable, Disable and Status Register */ +/*\{*/ +#define PMC_PCER_OFF 0x00000010 ///< Peripheral clock enable register offset. +#define PMC_PCER (*((reg32_t *)(PMC_BASE + PMC_PCER_OFF))) ///< Peripheral clock enable register address. +#define PMC_PCDR_OFF 0x00000014 ///< Peripheral clock disable register offset. +#define PMC_PCDR (*((reg32_t *)(PMC_BASE + PMC_PCDR_OFF))) ///< Peripheral clock disable register address. +#define PMC_PCSR_OFF 0x00000018 ///< Peripheral clock status register offset. +#define PMC_PCSR (*((reg32_t *)(PMC_BASE + PMC_PCSR_OFF))) ///< Peripheral clock status register address. +/*\}*/ + +/** Clock Generator Main Oscillator Register */ +/*\{*/ +#define CKGR_MOR_OFF 0x00000020 ///< Main oscillator register offset. +#define CKGR_MOR (*((reg32_t *)(PMC_BASE + CKGR_MOR_OFF))) ///< Main oscillator register address. + +#define CKGR_MOSCEN 0 ///< Main oscillator enable. +#define CKGR_OSCBYPASS 1 ///< Main oscillator bypass. +#define CKGR_OSCOUNT_MASK 0x0000FF00 ///< Main oscillator start-up time mask. +#define CKGR_OSCOUNT_SHIFT 8 ///< Main oscillator start-up time LSB. +/*\}*/ + +/** Clock Generator Main Clock Frequency Register */ +/*\{*/ +#define CKGR_MCFR_OFF 0x00000024 ///< Main clock frequency register offset. +#define CKGR_MCFR (*((reg32_t *)(PMC_BASE + CKGR_MCFR_OFF))) ///< Main clock frequency register address. + +#define CKGR_MAINF_MASK 0x0000FFFF ///< Main clock frequency mask mask. +#define CKGR_MAINRDY 16 ///< Main clock ready. +/*\}*/ + +/** PLL Registers */ +/*\{*/ +#define CKGR_PLLR_OFF 0x0000002C ///< Clock generator PLL register offset. +#define CKGR_PLLR (*((reg32_t *)(PMC_BASE + CKGR_PLLR_OFF))) ///< Clock generator PLL register address. + +#define CKGR_DIV_MASK 0x000000FF ///< Divider. +#define CKGR_DIV_SHIFT 0 ///< Least significant bit of the divider. +#define CKGR_DIV_0 0x00000000 ///< Divider output is 0. +#define CKGR_DIV_BYPASS 0x00000001 ///< Divider is bypassed. +#define CKGR_PLLCOUNT_MASK 0x00003F00 ///< PLL counter mask. +#define CKGR_PLLCOUNT_SHIFT 8 ///< PLL counter LSB. + +#define CKGR_OUT_MASK 0x0000C000 ///< PLL output frequency range. +#define CKGR_OUT_0 0x00000000 ///< Please refer to the PLL datasheet. +#define CKGR_OUT_1 0x00004000 ///< Please refer to the PLL datasheet. +#define CKGR_OUT_2 0x00008000 ///< Please refer to the PLL datasheet. +#define CKGR_OUT_3 0x0000C000 ///< Please refer to the PLL datasheet. +#define CKGR_MUL_MASK 0x07FF0000 ///< PLL multiplier. +#define CKGR_MUL_SHIFT 16 ///< Least significant bit of the PLL multiplier. + +#define CKGR_USBDIV_MASK 0x30000000 ///< Divider for USB clocks. +#define CKGR_USBDIV_1 0x00000000 ///< Divider output is PLL clock output. +#define CKGR_USBDIV_2 0x10000000 ///< Divider output is PLL clock output divided by 2. +#define CKGR_USBDIV_4 0x20000000 ///< Divider output is PLL clock output divided by 4. +/*\}*/ + +/** Master Clock Register */ +/*\{*/ +#define PMC_MCKR_OFF 0x00000030 ///< Master clock register offset. +#define PMC_MCKR (*((reg32_t *)(PMC_BASE + PMC_MCKR_OFF))) ///< Master clock register address. + +#define PMC_PCKR0_OFF 0x00000040 ///< Programmable clock 0 register offset. +#define PMC_PCKR0 (*((reg32_t *)(PMC_BASE + PMC_PCKR0_OFF))) ///< Programmable clock 0 register address. +#define PMC_PCKR1_OFF 0x00000044 ///< Programmable clock 1 register offset. +#define PMC_PCKR1 (*((reg32_t *)(PMC_BASE + PMC_PCKR1_OFF))) ///< Programmable clock 1 register address. +#define PMC_PCKR2_OFF 0x00000048 ///< Programmable clock 2 register offset. +#define PMC_PCKR2 (*((reg32_t *)(PMC_BASE + PMC_PCKR2_OFF))) ///< Programmable clock 2 register address. + +#define PMC_CSS_MASK 0x00000003 ///< Clock selection mask. +#define PMC_CSS_SLOW_CLK 0x00000000 ///< Slow clock selected. +#define PMC_CSS_MAIN_CLK 0x00000001 ///< Main clock selected. +#define PMC_CSS_PLL_CLK 0x00000003 ///< PLL clock selected. + +#define PMC_PRES_MASK 0x0000001C ///< Clock prescaler mask. +#define PMC_PRES_SHIFT 2 ///< Clock prescaler LSB. +#define PMC_PRES_CLK 0x00000000 ///< Selected clock, not divided. +#define PMC_PRES_CLK_2 0x00000004 ///< Selected clock divided by 2. +#define PMC_PRES_CLK_4 0x00000008 ///< Selected clock divided by 4. +#define PMC_PRES_CLK_8 0x0000000C ///< Selected clock divided by 8. +#define PMC_PRES_CLK_16 0x00000010 ///< Selected clock divided by 16. +#define PMC_PRES_CLK_32 0x00000014 ///< Selected clock divided by 32. +#define PMC_PRES_CLK_64 0x00000018 ///< Selected clock divided by 64. +/*\}*/ + +/** Power Management Status and Interrupt Registers */ +/*\{*/ +#define PMC_IER_OFF 0x00000060 ///< Interrupt enable register offset. +#define PMC_IER (*((reg32_t *)(PMC_BASE + PMC_IER_OFF))) ///< Interrupt enable register address. +#define PMC_IDR_OFF 0x00000064 ///< Interrupt disable register offset. +#define PMC_IDR (*((reg32_t *)(PMC_BASE + PMC_IDR_OFF))) ///< Interrupt disable register address. +#define PMC_SR_OFF 0x00000068 ///< Status register offset. +#define PMC_SR (*((reg32_t *)(PMC_BASE + PMC_SR_OFF))) ///< Status register address. +#define PMC_IMR_OFF 0x0000006C ///< Interrupt mask register offset. +#define PMC_IMR (*((reg32_t *)(PMC_BASE + PMC_IMR_OFF))) ///< Interrupt mask register address. + +#define PMC_MOSCS 0 ///< Main oscillator. +#define PMC_LOCK 2 ///< PLL lock. +#define PMC_MCKRDY 3 ///< Master clock ready. +#define PMC_PCKRDY0 8 ///< Programmable clock 0 ready. +#define PMC_PCKRDY1 9 ///< Programmable clock 1 ready. +#define PMC_PCKRDY2 10 ///< Programmable clock 2 ready. +/*\}*/ + +#endif /* AT91_PMC_H */ diff --git a/bertos/cpu/arm/io/at91_pwm.h b/bertos/cpu/arm/io/at91_pwm.h new file mode 100644 index 0000000..23174ad --- /dev/null +++ b/bertos/cpu/arm/io/at91_pwm.h @@ -0,0 +1,221 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91SAM7 Pulse Width Modulation Controller. + */ + +#ifndef AT91_PWM_H +#define AT91_PWM_H + +/** + * PWM Mode Register. + */ +/*\{*/ +#define PWM_MR_OFF 0x00000000 ///< PWM Mode Register offset. +#define PWM_MR (*((reg32_t *)(PWMC_BASE + PWM_MR_OFF))) ///< PWM Mode Register. +#define PWM_MR_DIVA_MASK 0x000000FF ///< PWM Mode Divide factor A Mask. +#define PWM_MR_DIVA_SHIFT 0 ///< PWM Mode Divide factor A LSB. +#define PWM_MR_DIVB_MASK 0x00FF0000 ///< PWM Mode Divide factor B Mask. +#define PWM_MR_DIVB_SHIFT 16 ///< PWM Mode Divide factor B LSB. + +#define PWM_MR_PREA_MASK 0x00000F00 ///< PWM Mode prescaler A Mask. +#define PWM_MR_PREA_SHIFT 8 ///< PWM Mode prescaler A LSB. +#define PWM_MR_PREB_MASK 0x0F000000 ///< PWM Mode prescaler B Mask. +#define PWM_MR_PREB_SHIFT 24 ///< PWM Mode prescaler B LSB. + +#define PWM_MR_PRE_MCK 0 ///< PWM Mode prescaler set to MCK. +#define PWM_MR_PRE_MCK_DIV2 1 ///< PWM Mode prescaler set to MCK/2. +#define PWM_MR_PRE_MCK_DIV4 2 ///< PWM Mode prescaler set to MCK/4. +#define PWM_MR_PRE_MCK_DIV8 3 ///< PWM Mode prescaler set to MCK/8. +#define PWM_MR_PRE_MCK_DIV16 4 ///< PWM Mode prescaler set to MCK/16. +#define PWM_MR_PRE_MCK_DIV32 5 ///< PWM Mode prescaler set to MCK/32. +#define PWM_MR_PRE_MCK_DIV64 6 ///< PWM Mode prescaler set to MCK/64. +#define PWM_MR_PRE_MCK_DIV128 7 ///< PWM Mode prescaler set to MCK/128. +#define PWM_MR_PRE_MCK_DIV256 8 ///< PWM Mode prescaler set to MCK/256. +#define PWM_MR_PRE_MCK_DIV512 9 ///< PWM Mode prescaler set to MCK/512. +#define PWM_MR_PRE_MCK_DIV1024 10 ///< PWM Mode prescaler set to MCK/1024. +/*\}*/ + +/** + * PWM Channel IDs. + */ +/*\{*/ +#define PWM_CHID_MASK 0x0000000F +#define PWM_CHID0 0 +#define PWM_CHID1 1 +#define PWM_CHID2 2 +#define PWM_CHID3 3 +/*\}*/ + +/** + * PWM Enable Register. + */ +/*\{*/ +#define PWM_ENA_OFF 0x00000004 ///< PWM Enable Register offset. +#define PWM_ENA (*((reg32_t *)(PWMC_BASE + PWM_ENA_OFF))) ///< PWM Enable Register. +/*\}*/ + +/** + * PWM Disable Register. + */ +/*\{*/ +#define PWM_DIS_OFF 0x00000008 ///< PWM Disable Register offset. +#define PWM_DIS (*((reg32_t *)(PWMC_BASE + PWM_DIS_OFF))) ///< PWM Disable Register. +/*\}*/ + +/** + * PWM Status Register. + */ +/*\{*/ +#define PWM_SR_OFF 0x0000000C ///< PWM Status Register offset. +#define PWM_SR (*((reg32_t *)(PWMC_BASE + PWM_SR_OFF))) ///< PWM Status Register. +/*\}*/ + +/** + * PWM Interrupt Enable Register. + */ +/*\{*/ +#define PWM_IER_OFF 0x00000010 ///< PWM Interrupt Enable Register offset. +#define PWM_IER (*((reg32_t *)(PWMC_BASE + PWM_IER_OFF))) ///< PWM Interrupt Enable Register. +/*\}*/ + +/** + * PWM Interrupt Disable Register. + */ +/*\{*/ +#define PWM_IDR_OFF 0x00000014 ///< PWM Interrupt Disable Register offset. +#define PWM_IDR (*((reg32_t *)(PWMC_BASE + PWM_IDR_OFF))) ///< PWM Interrupt Disable Register. +/*\}*/ + +/** + * PWM Interrupt Mask Register. + */ +/*\{*/ +#define PWM_IMR_OFF 0x00000018 ///< PWM Interrupt Mask Register offset. +#define PWM_IMR (*((reg32_t *)(PWMC_BASE + PWM_IMR_OFF))) ///< PWM Interrupt Mask Register. +/*\}*/ + +/** + * PWM Interrupt Status Register. + */ +/*\{*/ +#define PWM_ISR_OFF 0x0000001C ///< PWM Interrupt Status Register offset. +#define PWM_ISR (*((reg32_t *)(PWMC_BASE + PWM_ISR_OFF))) ///< PWM Interrupt Status Register. +/*\}*/ + +#define PWM_CH0_OFF 0x00000200 ///< PWM Channel 0 registers offset. +#define PWM_CH1_OFF 0x00000220 ///< PWM Channel 1 registers offset. +#define PWM_CH2_OFF 0x00000240 ///< PWM Channel 2 registers offset. +#define PWM_CH3_OFF 0x00000260 ///< PWM Channel 3 registers offset. + +/** + * PWM Channel Mode Register. + */ +/*\{*/ +#define PWM_CMR_OFF 0x00000000 ///< PWM Channel Mode Register offset. +#define PWM_CMR0 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Mode Register. +#define PWM_CMR1 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Mode Register. +#define PWM_CMR2 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Mode Register. +#define PWM_CMR3 (*((reg32_t *)(PWMC_BASE + PWM_CMR_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Mode Register. + +#define PWM_CPRE_MCK_MASK 0x0000000F ///< PWM Mode prescaler mask. +#define PWM_CPRE_MCK 0 ///< PWM Mode prescaler set to MCK. +#define PWM_CPRE_MCK_DIV2 1 ///< PWM Mode prescaler set to MCK/2. +#define PWM_CPRE_MCK_DIV4 2 ///< PWM Mode prescaler set to MCK/4. +#define PWM_CPRE_MCK_DIV8 3 ///< PWM Mode prescaler set to MCK/8. +#define PWM_CPRE_MCK_DIV16 4 ///< PWM Mode prescaler set to MCK/16. +#define PWM_CPRE_MCK_DIV32 5 ///< PWM Mode prescaler set to MCK/32. +#define PWM_CPRE_MCK_DIV64 6 ///< PWM Mode prescaler set to MCK/64. +#define PWM_CPRE_MCK_DIV128 7 ///< PWM Mode prescaler set to MCK/128. +#define PWM_CPRE_MCK_DIV256 8 ///< PWM Mode prescaler set to MCK/256. +#define PWM_CPRE_MCK_DIV512 9 ///< PWM Mode prescaler set to MCK/512. +#define PWM_CPRE_MCK_DIV1024 10 ///< PWM Mode prescaler set to MCK/1024. +#define PWM_CPRE_CLKA 11 ///< PWM Mode prescaler set to CLKA. +#define PWM_CPRE_CLKB 12 ///< PWM Mode prescaler set to CLKB. + +#define PWM_CALG 8 ///< PWM Mode channel alignment. +#define PWM_CPOL 9 ///< PWM Mode channel polarity. +#define PWM_CPD 10 ///< PWM Mode channel update period. +/*\}*/ + + +/** + * PWM Channel Duty Cycle Register. + */ +/*\{*/ +#define PWM_CDTY_OFF 0x00000004 ///< PWM Channel Duty Cycle Register offset. +#define PWM_CDTY0 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Duty Cycle Register. +#define PWM_CDTY1 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Duty Cycle Register. +#define PWM_CDTY2 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Duty Cycle Register. +#define PWM_CDTY3 (*((reg32_t *)(PWMC_BASE + PWM_CDTY_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Duty Cycle Register. +/*\}*/ + + +/** + * PWM Channel Period Register. + */ +/*\{*/ +#define PWM_CPRD_OFF 0x00000008 ///< PWM Channel Period Register offset. +#define PWM_CPRD0 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Period Register. +#define PWM_CPRD1 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Period Register. +#define PWM_CPRD2 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Period Register. +#define PWM_CPRD3 (*((reg32_t *)(PWMC_BASE + PWM_CPRD_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Period Register. +/*\}*/ + + +/** + * PWM Channel Counter Register. + */ +/*\{*/ +#define PWM_CCNT_OFF 0x0000000C ///< PWM Channel Counter Register offset. +#define PWM_CCNT0 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Counter Register. +#define PWM_CCNT1 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Counter Register. +#define PWM_CCNT2 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Counter Register. +#define PWM_CCNT3 (*((reg32_t *)(PWMC_BASE + PWM_CCNT_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Counter Register. +/*\}*/ + + +/** + * PWM Channel Update Register. + */ +/*\{*/ +#define PWM_CUPD_OFF 0x00000010 ///< PWM Channel Update Register offset. +#define PWM_CUPD0 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH0_OFF))) ///< PWM Channel 0 Update Register. +#define PWM_CUPD1 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH1_OFF))) ///< PWM Channel 1 Update Register. +#define PWM_CUPD2 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH2_OFF))) ///< PWM Channel 2 Update Register. +#define PWM_CUPD3 (*((reg32_t *)(PWMC_BASE + PWM_CUPD_OFF + PWM_CH3_OFF))) ///< PWM Channel 3 Update Register. +/*\}*/ + +#endif /* AT91_PWM_H */ diff --git a/bertos/cpu/arm/io/at91_rstc.h b/bertos/cpu/arm/io/at91_rstc.h new file mode 100644 index 0000000..fd1b28f --- /dev/null +++ b/bertos/cpu/arm/io/at91_rstc.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91 reset controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_RTSC_H +#define AT91_RTSC_H + +/** Reset Controller Control Register */ +/*\{*/ +#define RSTC_CR (*((reg32_t *)(RSTC_BASE + 0x00))) ///< Reset controller control register address. +#define RSTC_PROCRST 0 ///< Processor reset. +#define RSTC_PERRST 2 ///< Peripheral reset. +#define RSTC_EXTRST 3 ///< External reset. +#define RSTC_KEY 0xA5000000 ///< Password. +/*\}*/ + +/** Reset Controller Status Register */ +/*\{*/ +#define RSTC_SR (*((reg32_t *)(RSTC_BASE + 0x04))) ///< Reset controller status register address. +#define RSTC_URSTS 0 ///< User reset status. +#define RSTC_BODSTS 1 ///< Brownout detection status. +#define RSTC_RSTTYP_MASK 0x00000700 ///< Reset type. +#define RSTC_RSTTYP_POWERUP 0x00000000 ///< Power-up reset. +//#define RSTC_RSTTYP_WAKEUP 0x00000100 ///< VDDCORE rising. +#define RSTC_RSTTYP_WATCHDOG 0x00000200 ///< Watchdog reset. +#define RSTC_RSTTYP_SOFTWARE 0x00000300 ///< Software reset. +#define RSTC_RSTTYP_USER 0x00000400 ///< User reset. +#define RSTC_RSTTYP_BROWNOUT 0x00000500 ///< Brownout reset. +#define RSTC_NRSTL 16 ///< NRST pin level. +#define RSTC_SRCMP 17 ///< Software reset command in progress. +/*\}*/ + +/** Reset Controller Mode Register */ +/*\{*/ +#define RSTC_MR (*((reg32_t *)(RSTC_BASE + 0x08))) ///< Reset controller mode register address. +#define RSTC_URSTEN 0 ///< User reset enable. +#define RSTC_URSTIEN 4 ///< User reset interrupt enable. +#define RSTC_ERSTL_MASK 0x00000F00 ///< External reset length. +#define RSTC_ERSTL_SHIFT 8 ///< Least significant bit of external reset length. +#define RSTC_BODIEN 16 ///< Brown-out detection interrupt enable. +/*\}*/ + + +#endif /* AT91_RTSC_H */ diff --git a/bertos/cpu/arm/io/at91_spi.h b/bertos/cpu/arm/io/at91_spi.h new file mode 100644 index 0000000..91ea8ca --- /dev/null +++ b/bertos/cpu/arm/io/at91_spi.h @@ -0,0 +1,281 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91SAM7 SPI register definitions. + * This file is based on NUT/OS implementation. See license below. + + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + + */ + +#ifndef AT91_SPI_H +#define AT91_SPI_H + +/** + * SPI Control Register + */ +/*\{*/ +#define SPI_CR_OFF 0x00000000 ///< Control register offset. + +#define SPI_SPIEN 0 ///< SPI enable. +#define SPI_SPIDIS 1 ///< SPI disable. +#define SPI_SWRST 7 ///< Software reset. +#define SPI_LASTXFER 24 ///< Last transfer. +/*\}*/ + +/** + * SPI Mode Register + */ +/*\{*/ +#define SPI_MR_OFF 0x00000004 ///< Mode register offset. + +#define SPI_MSTR 0 ///< Master mode. +#define SPI_PS 1 ///< Peripheral select. +#define SPI_PCSDEC 2 ///< Chip select decode. +#define SPI_FDIV 3 ///< Clock selection. +#define SPI_MODFDIS 4 ///< Mode fault detection. +#define SPI_LLB 7 ///< Local loopback enable. +#define SPI_PCS 0x000F0000 ///< Peripheral chip select mask. +#define SPI_PCS_0 0x000E0000 ///< Peripheral chip select 0. +#define SPI_PCS_1 0x000D0000 ///< Peripheral chip select 1. +#define SPI_PCS_2 0x000B0000 ///< Peripheral chip select 2. +#define SPI_PCS_3 0x00070000 ///< Peripheral chip select 3. +#define SPI_PCS_SHIFT 16 ///< Least significant bit of peripheral chip select. +#define SPI_DLYBCS 0xFF000000 ///< Mask for delay between chip selects. +#define SPI_DLYBCS_SHIFT 24 ///< Least significant bit of delay between chip selects. +/*\}*/ + +/** + * SPI Receive Data Register + */ +/*\{*/ +#define SPI_RDR_OFF 0x00000008 ///< Receive data register offset. + +#define SPI_RD 0x0000FFFF ///< Receive data mask. +#define SPI_RD_SHIFT 0 ///< Least significant bit of receive data. +/*\}*/ + +/** + * SPI Transmit Data Register + */ +/*\{*/ +#define SPI_TDR_OFF 0x0000000C ///< Transmit data register offset. + +#define SPI_TD 0x0000FFFF ///< Transmit data mask. +#define SPI_TD_SHIFT 0 ///< Least significant bit of transmit data. +/*\}*/ + +/** + * SPI Status and Interrupt Register + */ +/*\{*/ +#define SPI_SR_OFF 0x00000010 ///< Status register offset. +#define SPI_IER_OFF 0x00000014 ///< Interrupt enable register offset. +#define SPI_IDR_OFF 0x00000018 ///< Interrupt disable register offset. +#define SPI_IMR_OFF 0x0000001C ///< Interrupt mask register offset. + +#define SPI_RDRF 0 ///< Receive data register full. +#define SPI_TDRE 1 ///< Transmit data register empty. +#define SPI_MODF 2 ///< Mode fault error. +#define SPI_OVRES 3 ///< Overrun error status. +#define SPI_ENDRX 4 ///< End of RX buffer. +#define SPI_ENDTX 5 ///< End of TX buffer. +#define SPI_RXBUFF 6 ///< RX buffer full. +#define SPI_TXBUFE 7 ///< TX buffer empty. +#define SPI_NSSR 8 ///< NSS rising. +#define SPI_TXEMPTY 9 ///< Transmission register empty. +#define SPI_SPIENS 16 ///< SPI enable status. +/*\}*/ + +/** + * SPI Chip Select Registers + */ +/*\{*/ +#define SPI_CSR0_OFF 0x00000030 ///< Chip select register 0 offset. +#define SPI_CSR1_OFF 0x00000034 ///< Chip select register 1 offset. +#define SPI_CSR2_OFF 0x00000038 ///< Chip select register 2 offset. +#define SPI_CSR3_OFF 0x0000003C ///< Chip select register 3 offset. + +#define SPI_CPOL 0 ///< Clock polarity. +#define SPI_NCPHA 1 ///< Clock phase. +#define SPI_CSAAT 3 ///< Chip select active after transfer. +#define SPI_BITS 0x000000F0 ///< Bits per transfer mask. +#define SPI_BITS_8 0x00000000 ///< 8 bits per transfer. +#define SPI_BITS_9 0x00000010 ///< 9 bits per transfer. +#define SPI_BITS_10 0x00000020 ///< 10 bits per transfer. +#define SPI_BITS_11 0x00000030 ///< 11 bits per transfer. +#define SPI_BITS_12 0x00000040 ///< 12 bits per transfer. +#define SPI_BITS_13 0x00000050 ///< 13 bits per transfer. +#define SPI_BITS_14 0x00000060 ///< 14 bits per transfer. +#define SPI_BITS_15 0x00000070 ///< 15 bits per transfer. +#define SPI_BITS_16 0x00000080 ///< 16 bits per transfer. +#define SPI_BITS_SHIFT 4 ///< Least significant bit of bits per transfer. +#define SPI_SCBR 0x0000FF00 ///< Serial clock baud rate mask. +#define SPI_SCBR_SHIFT 8 ///< Least significant bit of serial clock baud rate. +#define SPI_DLYBS 0x00FF0000 ///< Delay before SPCK mask. +#define SPI_DLYBS_SHIFT 16 ///< Least significant bit of delay before SPCK. +#define SPI_DLYBCT 0xFF000000 ///< Delay between consecutive transfers mask. +#define SPI_DLYBCT_SHIFT 24 ///< Least significant bit of delay between consecutive transfers. +/*\}*/ + +/** + * Single SPI Register Addresses + */ +/*\{*/ +#if defined(SPI_BASE) + #define SPI0_BASE SPI_BASE + #define SPI_CR SPI0_CR ///< SPI Control Register Write-only. + #define SPI_MR SPI0_MR ///< SPI Mode Register Read/Write Reset=0x0. + #define SPI_RDR SPI0_RDR ///< SPI Receive Data Register Read-only Reset=0x0. + #define SPI_TDR SPI0_TDR ///< SPI Transmit Data Register Write-only . + #define SPI_SR SPI0_SR ///< SPI Status Register Read-only Reset=0x000000F0. + #define SPI_IER SPI0_IER ///< SPI Interrupt Enable Register Write-only. + #define SPI_IDR SPI0_IDR ///< SPI Interrupt Disable Register Write-only. + #define SPI_IMR SPI0_IMR ///< SPI Interrupt Mask Register Read-only Reset=0x0. + #define SPI_CSR0 SPI0_CSR0 ///< SPI Chip Select Register 0 Read/Write Reset=0x0. + #define SPI_CSR1 SPI0_CSR1 ///< SPI Chip Select Register 1 Read/Write Reset=0x0. + #define SPI_CSR2 SPI0_CSR2 ///< SPI Chip Select Register 2 Read/Write Reset=0x0. + #define SPI_CSR3 SPI0_CSR3 ///< SPI Chip Select Register 3 Read/Write Reset=0x0. + #if defined(SPI_HAS_PDC) + #define SPI_RPR SPI0_RPR ///< PDC channel 0 receive pointer register. + #define SPI_RCR SPI0_RCR ///< PDC channel 0 receive counter register. + #define SPI_TPR SPI0_TPR ///< PDC channel 0 transmit pointer register. + #define SPI_TCR SPI0_TCR ///< PDC channel 0 transmit counter register. + #define SPI_RNPR SPI0_RNPR ///< PDC channel 0 receive next pointer register. + #define SPI_RNCR SPI0_RNCR ///< PDC channel 0 receive next counter register. + #define SPI_TNPR SPI0_TNPR ///< PDC channel 0 transmit next pointer register. + #define SPI_TNCR SPI0_TNCR ///< PDC channel 0 transmit next counter register. + #define SPI_PTCR SPI0_PTCR ///< PDC channel 0 transfer control register. + #define SPI_PTSR SPI0_PTSR ///< PDC channel 0 transfer status register. + #endif /* SPI_HAS_PDC */ +#endif /* SPI_BASE */ +/*\}*/ + +/** + * SPI 0 Register Addresses + */ +/*\{*/ +#if defined(SPI0_BASE) + #define SPI0_CR (*((reg32_t *)(SPI0_BASE + SPI_CR_OFF))) ///< SPI Control Register Write-only. + #define SPI0_MR (*((reg32_t *)(SPI0_BASE + SPI_MR_OFF))) ///< SPI Mode Register Read/Write Reset=0x0. + #define SPI0_RDR (*((reg32_t *)(SPI0_BASE + SPI_RDR_OFF))) ///< SPI Receive Data Register Read-only Reset=0x0. + #define SPI0_TDR (*((reg32_t *)(SPI0_BASE + SPI_TDR_OFF))) ///< SPI Transmit Data Register Write-only . + #define SPI0_SR (*((reg32_t *)(SPI0_BASE + SPI_SR_OFF))) ///< SPI Status Register Read-only Reset=0x000000F0. + #define SPI0_IER (*((reg32_t *)(SPI0_BASE + SPI_IER_OFF))) ///< SPI Interrupt Enable Register Write-only. + #define SPI0_IDR (*((reg32_t *)(SPI0_BASE + SPI_IDR_OFF))) ///< SPI Interrupt Disable Register Write-only. + #define SPI0_IMR (*((reg32_t *)(SPI0_BASE + SPI_IMR_OFF))) ///< SPI Interrupt Mask Register Read-only Reset=0x0. + #define SPI0_CSR0 (*((reg32_t *)(SPI0_BASE + SPI_CSR0_OFF))) ///< SPI Chip Select Register 0 Read/Write Reset=0x0. + #define SPI0_CSR1 (*((reg32_t *)(SPI0_BASE + SPI_CSR1_OFF))) ///< SPI Chip Select Register 1 Read/Write Reset=0x0. + #define SPI0_CSR2 (*((reg32_t *)(SPI0_BASE + SPI_CSR2_OFF))) ///< SPI Chip Select Register 2 Read/Write Reset=0x0. + #define SPI0_CSR3 (*((reg32_t *)(SPI0_BASE + SPI_CSR3_OFF))) ///< SPI Chip Select Register 3 Read/Write Reset=0x0. + #if defined(SPI_HAS_PDC) + #define SPI0_RPR (*((reg32_t *)(SPI0_BASE + PERIPH_RPR_OFF))) ///< PDC channel 0 receive pointer register. + #define SPI0_RCR (*((reg32_t *)(SPI0_BASE + PERIPH_RCR_OFF))) ///< PDC channel 0 receive counter register. + #define SPI0_TPR (*((reg32_t *)(SPI0_BASE + PERIPH_TPR_OFF))) ///< PDC channel 0 transmit pointer register. + #define SPI0_TCR (*((reg32_t *)(SPI0_BASE + PERIPH_TCR_OFF))) ///< PDC channel 0 transmit counter register. + #define SPI0_RNPR (*((reg32_t *)(SPI0_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 0 receive next pointer register. + #define SPI0_RNCR (*((reg32_t *)(SPI0_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 0 receive next counter register. + #define SPI0_TNPR (*((reg32_t *)(SPI0_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 0 transmit next pointer register. + #define SPI0_TNCR (*((reg32_t *)(SPI0_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 0 transmit next counter register. + #define SPI0_PTCR (*((reg32_t *)(SPI0_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 0 transfer control register. + #define SPI0_PTSR (*((reg32_t *)(SPI0_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 0 transfer status register. + #endif /* SPI_HAS_PDC */ +#endif /* SPI0_BASE */ +/*\}*/ + +/** + * SPI 1 Register Addresses + */ +/*\{*/ +#if defined(SPI1_BASE) + #define SPI1_CR (*((reg32_t *)(SPI1_BASE + SPI_CR_OFF))) ///< SPI Control Register Write-only. + #define SPI1_MR (*((reg32_t *)(SPI1_BASE + SPI_MR_OFF))) ///< SPI Mode Register Read/Write Reset=0x0. + #define SPI1_RDR (*((reg32_t *)(SPI1_BASE + SPI_RDR_OFF))) ///< SPI Receive Data Register Read-only Reset=0x0. + #define SPI1_TDR (*((reg32_t *)(SPI1_BASE + SPI_TDR_OFF))) ///< SPI Transmit Data Register Write-only . + #define SPI1_SR (*((reg32_t *)(SPI1_BASE + SPI_SR_OFF))) ///< SPI Status Register Read-only Reset=0x000000F0. + #define SPI1_IER (*((reg32_t *)(SPI1_BASE + SPI_IER_OFF))) ///< SPI Interrupt Enable Register Write-only. + #define SPI1_IDR (*((reg32_t *)(SPI1_BASE + SPI_IDR_OFF))) ///< SPI Interrupt Disable Register Write-only. + #define SPI1_IMR (*((reg32_t *)(SPI1_BASE + SPI_IMR_OFF))) ///< SPI Interrupt Mask Register Read-only Reset=0x0. + #define SPI1_CSR0 (*((reg32_t *)(SPI1_BASE + SPI_CSR0_OFF))) ///< SPI Chip Select Register 0 Read/Write Reset=0x0. + #define SPI1_CSR1 (*((reg32_t *)(SPI1_BASE + SPI_CSR1_OFF))) ///< SPI Chip Select Register 1 Read/Write Reset=0x0. + #define SPI1_CSR2 (*((reg32_t *)(SPI1_BASE + SPI_CSR2_OFF))) ///< SPI Chip Select Register 2 Read/Write Reset=0x0. + #define SPI1_CSR3 (*((reg32_t *)(SPI1_BASE + SPI_CSR3_OFF))) ///< SPI Chip Select Register 3 Read/Write Reset=0x0. + #if defined(SPI_HAS_PDC) + #define SPI1_RPR (*((reg32_t *)(SPI1_BASE + PERIPH_RPR_OFF))) ///< PDC channel 1 receive pointer register. + #define SPI1_RCR (*((reg32_t *)(SPI1_BASE + PERIPH_RCR_OFF))) ///< PDC channel 1 receive counter register. + #define SPI1_TPR (*((reg32_t *)(SPI1_BASE + PERIPH_TPR_OFF))) ///< PDC channel 1 transmit pointer register. + #define SPI1_TCR (*((reg32_t *)(SPI1_BASE + PERIPH_TCR_OFF))) ///< PDC channel 1 transmit counter register. + #define SPI1_RNPR (*((reg32_t *)(SPI1_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 1 receive next pointer register. + #define SPI1_RNCR (*((reg32_t *)(SPI1_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 1 receive next counter register. + #define SPI1_TNPR (*((reg32_t *)(SPI1_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 1 transmit next pointer register. + #define SPI1_TNCR (*((reg32_t *)(SPI1_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 1 transmit next counter register. + #define SPI1_PTCR (*((reg32_t *)(SPI1_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 1 transfer control register. + #define SPI1_PTSR (*((reg32_t *)(SPI1_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 1 transfer status register. + #endif /* SPI_HAS_PDC */ +#endif /* SPI1_BASE */ +/*\}*/ + +#endif /* AT91_SPI_H */ diff --git a/bertos/cpu/arm/io/at91_ssc.h b/bertos/cpu/arm/io/at91_ssc.h new file mode 100644 index 0000000..4cee304 --- /dev/null +++ b/bertos/cpu/arm/io/at91_ssc.h @@ -0,0 +1,264 @@ +/** + * \file + * + * + * + * \author Luca Ottaviano + * + * AT91SAM7 SSC register definitions. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_SSC_H +#define AT91_SSC_H + +#include + +/** + * SSC Control Register + */ +/*\{*/ +#define SSC_CR_OFF 0x00000000 ///< Control register offset. + +#define SSC_RXEN 0 ///< Receive enable. +#define SSC_RXDIS 1 ///< Receive disable. +#define SSC_TXEN 8 ///< Transmit enable. +#define SSC_TXDIS 9 ///< Transmit disable. +#define SSC_SWRST 15 ///< Software reset. +/*\}*/ + +/** + * SSC Clock Mode Register + */ +/*\{*/ +#define SSC_CMR_OFF 0x00000004 ///< Clock mode register offset. + +#define SSC_DIV_MASK 0x00000FFF ///< Clock divider. +/*\}*/ + +/** + * SSC Receive/Transmit Clock Mode Register + */ +/*\{*/ +#define SSC_RCMR_OFF 0x00000010 ///< Receive clock mode register offset. +#define SSC_TCMR_OFF 0x00000018 ///< Transmit clock mode register offset. + +#define SSC_CKS_MASK 0x00000003 ///< Receive clock selection. +#define SSC_CKS_DIV 0x00000000 ///< Divided clock. +#define SSC_CKS_CLK 0x00000001 ///< RK/TK clock signal. +#define SSC_CKS_PIN 0x00000002 ///< TK/RK pin. +#define SSC_CKO_MASK 0x0000001C ///< Receive clock output mode selection. +#define SSC_CKO_NONE 0x00000000 ///< None. +#define SSC_CKO_CONT 0x00000004 ///< Continous receive clock. +#define SSC_CKO_TRAN 0x00000008 ///< Receive clock only during data transfers. +#define SSC_CKI 5 ///< Receive clock inversion. +#define SSC_CKG_MASK 0x000000C0 ///< Receive clock gating selection. +#define SSC_CKG_NONE 0x00000000 ///< None, continous clock. +#define SSC_CKG_FL 0x00000040 ///< Continous receive clock. +#define SSC_CKG_FH 0x00000080 ///< Receive clock only during data transfers. +#define SSC_START_MASK 0x00000F00 ///< Receive start selection. +#define SSC_START_CONT 0x00000000 ///< Receive start as soon as enabled. +#define SSC_START_TX 0x00000100 ///< Receive start on transmit start. +#define SSC_START_RX 0x00000100 ///< Receive start on receive start. +#define SSC_START_LOW_F 0x00000200 ///< Receive start on low level RF. +#define SSC_START_HIGH_F 0x00000300 ///< Receive start on high level RF. +#define SSC_START_FALL_F 0x00000400 ///< Receive start on falling edge RF. +#define SSC_START_RISE_F 0x00000500 ///< Receive start on rising edge RF. +#define SSC_START_LEVEL_F 0x00000600 ///< Receive start on any RF level change. +#define SSC_START_EDGE_F 0x00000700 ///< Receive start on any RF edge. +#define SSC_START_COMP0 0x00000800 ///< Receive on compare 0. +#define SSC_STOP 12 ///< Receive stop selection. +#define SSC_STTDLY_MASK 0x00FF0000 ///< Receive start delay. +#define SSC_STTDLY_SHIFT 16 ///< Least significant bit of receive start delay. +#define SSC_PERIOD_MASK 0xFF000000 ///< Receive period divider selection. +#define SSC_PERIOD_SHIFT 24 ///< Least significant bit of receive period divider selection. +/*\}*/ + +/** + * SSC Receive/Transmit Frame Mode Registers + */ +/*\{*/ +#define SSC_RFMR_OFF 0x00000014 ///< Receive frame mode register offset. +#define SSC_TFMR_OFF 0x0000001C ///< Transmit frame mode register offset. + +#define SSC_DATLEN_MASK 0x0000001F ///< Data length. +#define SSC_LOOP 5 ///< Receiver loop mode. +#define SSC_DATDEF 5 ///< Transmit default value. + +#define SSC_MSBF 7 ///< Most significant bit first. +#define SSC_DATNB_MASK 0x00000F00 ///< Data number per frame. +#define SSC_DATNB_SHIFT 8 ///< Least significant bit of data number per frame. +#define SSC_FSLEN_MASK 0x000F0000 ///< Receive frame sync. length. +#define SSC_FSLEN_SHIFT 16 ///< Least significant bit of receive frame sync. length. +#define SSC_FSOS 0x00700000 ///< Receive frame sync. output selection. +#define SSC_FSOS_NONE 0x00000000 ///< No frame sync. Line set to input. +#define SSC_FSOS_NEGATIVE 0x00100000 ///< Negative pulse. +#define SSC_FSOS_POSITIVE 0x00200000 ///< Positive pulse. +#define SSC_FSOS_LOW 0x00300000 ///< Low during transfer. +#define SSC_FSOS_HIGH 0x00400000 ///< High during transfer. +#define SSC_FSOS_TOGGLE 0x00500000 ///< Toggling at each start. +#define SSC_FSDEN 23 ///< Frame sync. data enable. +#define SSC_FSEDGE 24 ///< Frame sync. edge detection. +/*\}*/ + +/** + * SSC Receive Holding Register + */ +/*\{*/ +#define SSC_RHR_OFF 0x00000020 ///< Receive holding register offset. +/*\}*/ + +/** + * SSC Transmit Holding Register + */ +/*\{*/ +#define SSC_THR_OFF 0x00000024 ///< Transmit holding register offset. +/*\}*/ + +/** + * SSC Receive Sync. Holding Register + */ +/*\{*/ +#define SSC_RSHR_OFF 0x00000030 ///< Receive sync. holding register offset. +/*\}*/ + +/** + * SSC Transmit Sync. Holding Register + */ +/*\{*/ +#define SSC_TSHR_OFF 0x00000034 ///< Transmit sync. holding register offset. +/*\}*/ + +/** + * SSC Receive Compare 0 Register + */ +/*\{*/ +#define SSC_RC0R_OFF 0x00000038 ///< Receive compare 0 register offset. +/*\}*/ + +/** + * SSC Receive Compare 1 Register + */ +/*\{*/ +#define SSC_RC1R_OFF 0x0000003C ///< Receive compare 1 register offset. +/*\}*/ + +/** + * SSC Status and Interrupt Register + */ +/*\{*/ +#define SSC_SR_OFF 0x00000040 ///< Status register offset. +#define SSC_IER_OFF 0x00000044 ///< Interrupt enable register offset. +#define SSC_IDR_OFF 0x00000048 ///< Interrupt disable register offset. +#define SSC_IMR_OFF 0x0000004C ///< Interrupt mask register offset. + +#define SSC_TXRDY 0 ///< Transmit ready. +#define SSC_TXEMPTY 1 ///< Transmit empty. +#define SSC_ENDTX 2 ///< End of transmission. +#define SSC_TXBUFE 3 ///< Transmit buffer empty. +#define SSC_RXRDY 4 ///< Receive ready. +#define SSC_OVRUN 5 ///< Receive overrun. +#define SSC_ENDRX 6 ///< End of receiption. +#define SSC_RXBUFF 7 ///< Receive buffer full. +#define SSC_CP0 8 ///< Compare 0. +#define SSC_CP1 9 ///< Compare 1. +#define SSC_TXSYN 10 ///< Transmit sync. +#define SSC_RXSYN 11 ///< Receive sync. +#define SSC_TXENA 16 ///< Transmit enable. +#define SSC_RXENA 17 ///< Receive enable. + + +#if defined(SSC_BASE) + #define SSC_CR (*((reg32_t *)(SSC_BASE + SSC_CR_OFF))) ///< Control register address. + #define SSC_CMR (*((reg32_t *)(SSC_BASE + SSC_CMR_OFF))) ///< Clock mode register address. + #define SSC_RCMR (*((reg32_t *)(SSC_BASE + SSC_RCMR_OFF))) ///< Receive clock mode register address. + #define SSC_TCMR (*((reg32_t *)(SSC_BASE + SSC_TCMR_OFF))) ///< Transmit clock mode register address. + #define SSC_RFMR (*((reg32_t *)(SSC_BASE + SSC_RFMR_OFF))) ///< Receive frame mode register address. + #define SSC_TFMR (*((reg32_t *)(SSC_BASE + SSC_TFMR_OFF))) ///< Transmit frame mode register address. + #define SSC_RHR (*((reg32_t *)(SSC_BASE + SSC_RHR_OFF))) ///< Receive holding register address. + #define SSC_THR (*((reg32_t *)(SSC_BASE + SSC_THR_OFF))) ///< Transmit holding register address. + #define SSC_RSHR (*((reg32_t *)(SSC_BASE + SSC_RSHR_OFF))) ///< Receive sync. holding register address. + #define SSC_TSHR (*((reg32_t *)(SSC_BASE + SSC_TSHR_OFF))) ///< Transmit sync. holding register address. + #define SSC_RC0R (*((reg32_t *)(SSC_BASE + SSC_RC0R_OFF))) ///< Receive compare 0 register address. + #define SSC_RC1R (*((reg32_t *)(SSC_BASE + SSC_RC1R_OFF))) ///< Receive compare 1 register address. + #define SSC_SR (*((reg32_t *)(SSC_BASE + SSC_SR_OFF))) ///< Status register address. + #define SSC_IER (*((reg32_t *)(SSC_BASE + SSC_IER_OFF))) ///< Interrupt enable register address. + #define SSC_IDR (*((reg32_t *)(SSC_BASE + SSC_IDR_OFF))) ///< Interrupt disable register address. + #define SSC_IMR (*((reg32_t *)(SSC_BASE + SSC_IMR_OFF))) ///< Interrupt mask register address. + #if defined(SSC_HAS_PDC) + #define SSC_RPR (*((reg32_t *)(SSC_BASE + PERIPH_RPR_OFF))) ///< PDC receive pointer register address. + #define SSC_RCR (*((reg32_t *)(SSC_BASE + PERIPH_RCR_OFF))) ///< PDC receive counter register address. + #define SSC_TPR (*((reg32_t *)(SSC_BASE + PERIPH_TPR_OFF))) ///< PDC transmit pointer register address. + #define SSC_TCR (*((reg32_t *)(SSC_BASE + PERIPH_TCR_OFF))) ///< PDC transmit counter register address. + #define SSC_RNPR (*((reg32_t *)(SSC_BASE + PERIPH_RNPR_OFF))) ///< PDC receive next pointer register address. + #define SSC_RNCR (*((reg32_t *)(SSC_BASE + PERIPH_RNCR_OFF))) ///< PDC receive next counter register address. + #define SSC_TNPR (*((reg32_t *)(SSC_BASE + PERIPH_TNPR_OFF))) ///< PDC transmit next pointer register address. + #define SSC_TNCR (*((reg32_t *)(SSC_BASE + PERIPH_TNCR_OFF))) ///< PDC transmit next counter register address. + #define SSC_PTCR (*((reg32_t *)(SSC_BASE + PERIPH_PTCR_OFF))) ///< PDC transfer control register address. + #define SSC_PTSR (*((reg32_t *)(SSC_BASE + PERIPH_PTSR_OFF))) ///< PDC transfer status register address. + #endif /* SSC_HAS_PDC */ + +#endif /* SSC_BASE */ + + +#endif /* AT91_SSC_H */ diff --git a/bertos/cpu/arm/io/at91_tc.h b/bertos/cpu/arm/io/at91_tc.h new file mode 100644 index 0000000..b9dd182 --- /dev/null +++ b/bertos/cpu/arm/io/at91_tc.h @@ -0,0 +1,320 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * AT91SAM7 Conunter timer definition. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_TC_H +#define AT91_TC_H + + +/** + * Timer Counter Control Register + */ +#define TC_TC0_OFF 0x00000000 ///< Channel 0 control register offset. +#define TC_TC1_OFF 0x00000040 ///< Channel 1 control register offset. +#define TC_TC2_OFF 0x00000080 ///< Channel 2 control register offset. +#define TC0_CCR (*((reg32_t *)(TC_BASE + TC_TC0_OFF))) ///< Channel 0 control register address. +#define TC1_CCR (*((reg32_t *)(TC_BASE + TC_TC1_OFF))) ///< Channel 1 control register address. +#define TC2_CCR (*((reg32_t *)(TC_BASE + TC_TC2_OFF))) ///< Channel 2 control register address. +#define TC_CLKEN 0 ///< Clock enable command. +#define TC_CLKDIS 1 ///< Clock disable command. +#define TC_SWTRG 2 ///< Software trigger command. + +/** + * Timer Counter Channel Mode Register + */ +#define TC_CMR_OFF 0x00000004 ///< Mode register offset. +#define TC0_CMR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CMR_OFF))) ///< Channel 0 mode register address. +#define TC1_CMR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CMR_OFF))) ///< Channel 1 mode register address. +#define TC2_CMR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CMR_OFF))) ///< Channel 2 mode register address. + +#define TC_CLKS_MASK 0x00000007 ///< Clock selection mask. +#define TC_CLKS_MCK2 0x00000000 ///< Selects MCK / 2. +#define TC_CLKS_MCK8 0x00000001 ///< Selects MCK / 8. +#define TC_CLKS_MCK32 0x00000002 ///< Selects MCK / 32. +#define TC_CLKS_MCK128 0x00000003 ///< Selects MCK / 128. +#define TC_CLKS_MCK1024 0x00000004 ///< Selects MCK / 1024. +#define TC_CLKS_XC0 0x00000005 ///< Selects external clock 0. +#define TC_CLKS_XC1 0x00000006 ///< Selects external clock 1. +#define TC_CLKS_XC2 0x00000007 ///< Selects external clock 2. + +#define TC_CLKI 3 ///< Increments on falling edge. + +#define TC_BURST_MASK 0x00000030 ///< Burst signal selection mask. +#define TC_BURST_NONE 0x00000000 ///< Clock is not gated by an external signal. +#define TC_BUSRT_XC0 0x00000010 ///< ANDed with external clock 0. +#define TC_BURST_XC1 0x00000020 ///< ANDed with external clock 1. +#define TC_BURST_XC2 0x00000030 ///< ANDed with external clock 2. + + + +#define TC_WAVE 15 ///< Selects waveform mode. +//To select capture mode you must set TC_WAVE bit to 0. +//#define TC_CAPT 15 ///< Selects capture mode. + +/** + * Capture Mode + */ +#define TC_CPCTRG 14 ///< RC Compare Enable Trigger Enable. +#define TC_LDBSTOP 6 ///< Counter clock stopped on RB loading. +#define TC_LDBDIS 7 ///< Counter clock disabled on RB loading. + +#define TC_ETRGEDG_MASK 0x00000300 ///< External trigger edge selection mask. +#define TC_ETRGEDG_RISING_EDGE 0x00000100 ///< Trigger on external rising edge. +#define TC_ETRGEDG_FALLING_EDGE 0x00000200 ///< Trigger on external falling edge. +#define TC_ETRGEDG_BOTH_EDGE 0x00000300 ///< Trigger on both external edges. + +#define TC_ABETRG_MASK 0x00000400 ///< TIOA or TIOB external trigger selection mask. +#define TC_ABETRG_TIOA 10 ///< TIOA used as an external trigger. +//To use external trigger TIOB you must set TC_ABETRG_TIOA bit to 0. +//#define TC_ABETRG_TIOB 10 ///< TIOB used as an external trigger. + + +#define TC_LDRA_MASK 0x00030000 ///< RA loading selection mask. +#define TC_LDRA_RISING_EDGE 0x00010000 ///< Load RA on rising edge of TIOA. +#define TC_LDRA_FALLING_EDGE 0x00020000 ///< Load RA on falling edge of TIOA. +#define TC_LDRA_BOTH_EDGE 0x00030000 ///< Load RA on any edge of TIOA. + +#define TC_LDRB_MASK 0x000C0000 ///< RB loading selection mask. +#define TC_LDRB_RISING_EDGE 0x00040000 ///< Load RB on rising edge of TIOA. +#define TC_LDRB_FALLING_EDGE 0x00080000 ///< Load RB on falling edge of TIOA. +#define TC_LDRB_BOTH_EDGE 0x000C0000 ///< Load RB on any edge of TIOA. + + +/** + * Waveform Mode + */ +#define TC_CPCSTOP 6 ///< Counter clock stopped on RC compare. +#define TC_CPCDIS 7 ///< Counter clock disabled on RC compare. + +#define TC_EEVTEDG_MASK 0x00000300 ///< External event edge selection mask. +#define TC_EEVTEDG_RISING_EDGE 0x00000100 ///< External event on rising edge.. +#define TC_EEVTEDG_FALLING_EDGE 0x00000200 ///< External event on falling edge.. +#define TC_EEVTEDG_BOTH_EDGE 0x00000300 ///< External event on any edge.. + +#define TC_EEVT_MASK 0x00000C00 ///< External event selection mask. +#define TC_EEVT_TIOB 0x00000000 ///< TIOB selected as external event. +#define TC_EEVT_XC0 0x00000400 ///< XC0 selected as external event. +#define TC_EEVT_XC1 0x00000800 ///< XC1 selected as external event. +#define TC_EEVT_XC2 0x00000C00 ///< XC2 selected as external event. + +#define TC_ENETRG 12 ///< External event trigger enable. + +#define TC_WAVSEL_MASK 0x00006000 ///< Waveform selection mask. +#define TC_WAVSEL_UP 0x00000000 ///< UP mode whitout automatic trigger on RC compare. +#define TC_WAVSEL_UP_RC_TRG 0x00004000 ///< UP mode whit automatic trigger on RC compare. +#define TC_WAVSEL_UPDOWN 0x00002000 ///< UPDOWN mode whitout automatic trigger on RC compare. +#define TC_WAVSEL_UPDOWN_RC_TRG 0x00003000 ///< UPDOWN mode whit automatic trigger on RC compare. + + +#define TC_ACPA_MASK 0x00030000 ///< Masks RA compare effect on TIOA. +#define TC_ACPA_SET_OUTPUT 0x00010000 ///< RA compare sets TIOA. +#define TC_ACPA_CLEAR_OUTPUT 0x00020000 ///< RA compare clears TIOA. +#define TC_ACPA_TOGGLE_OUTPUT 0x00030000 ///< RA compare toggles TIOA. + +#define TC_ACPC_MASK 0x000C0000 ///< Masks RC compare effect on TIOA. +#define TC_ACPC_SET_OUTPUT 0x00040000 ///< RC compare sets TIOA. +#define TC_ACPC_CLEAR_OUTPUT 0x00080000 ///< RC compare clears TIOA. +#define TC_ACPC_TOGGLE_OUTPUT 0x000C0000 ///< RC compare toggles TIOA. + +#define TC_AEEVT_MASK 0x00300000 ///< Masks external event effect on TIOA. +#define TC_AEEVT_SET_OUTPUT 0x00100000 ///< External event sets TIOA. +#define TC_AEEVT_CLEAR_OUTPUT 0x00200000 ///< External event clears TIOA. +#define TC_AEEVT_TOGGLE_OUTPUT 0x00300000 ///< External event toggles TIOA. + +#define TC_ASWTRG_MASK 0x00C00000 ///< Masks software trigger effect on TIOA. +#define TC_ASWTRG_SET_OUTPUT 0x00400000 ///< Software trigger sets TIOA. +#define TC_ASWTRG_CLEAR_OUTPUT 0x00800000 ///< Software trigger clears TIOA. +#define TC_ASWTRG_TOGGLE_OUTPUT 0x00C00000 ///< Software trigger toggles TIOA. + +#define TC_BCPB_MASK 0x03000000 ///< Masks RB compare effect on TIOB. +#define TC_BCPB_SET_OUTPUT 0x01000000 ///< RB compare sets TIOB. +#define TC_BCPB_CLEAR_OUTPUT 0x02000000 ///< RB compare clears TIOB. +#define TC_BCPB_TOGGLE_OUTPUT 0x03000000 ///< RB compare toggles TIOB. + +#define TC_BCPC_MASK 0x0C000000 ///< Masks RC compare effect on TIOB. +#define TC_BCPC_SET_OUTPUT 0x04000000 ///< RC compare sets TIOB. +#define TC_BCPC_CLEAR_OUTPUT 0x08000000 ///< RC compare clears TIOB. +#define TC_BCPC_TOGGLE_OUTPUT 0x0C000000 ///< RC compare toggles TIOB. + +#define TC_BEEVT_MASK 0x30000000 ///< Masks external event effect on TIOB. +#define TC_BEEVT_SET_OUTPUT 0x10000000 ///< External event sets TIOB. +#define TC_BEEVT_CLEAR_OUTPUT 0x20000000 ///< External event clears TIOB. +#define TC_BEEVT_TOGGLE_OUTPUT 0x30000000 ///< External event toggles TIOB. + +#define TC_BSWTRG_MASK 0xC0000000 ///< Masks software trigger effect on TIOB. +#define TC_BSWTRG_SET_OUTPUT 0x40000000 ///< Software trigger sets TIOB. +#define TC_BSWTRG_CLEAR_OUTPUT 0x80000000 ///< Software trigger clears TIOB. +#define TC_BSWTRG_TOGGLE_OUTPUT 0xC0000000 ///< Software trigger toggles TIOB. + +/** + * Counter Value Register + */ +#define TC_CV_OFF 0x00000010 ///< Counter register value offset. +#define TC0_CV (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_CV_OFF))) ///< Counter 0 value. +#define TC1_CV (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_CV_OFF))) ///< Counter 1 value. +#define TC2_CV (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_CV_OFF))) ///< Counter 2 value. + +/** + * Timer Counter Register A + */ +#define TC_RA_OFF 0x00000014 ///< Register A offset. +#define TC0_RA (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RA_OFF))) ///< Channel 0 register A. +#define TC1_RA (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RA_OFF))) ///< Channel 1 register A. +#define TC2_RA (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RA_OFF))) ///< Channel 2 register A. + + +/** + * Timer Counter Register B + */ +#define TC_RB_OFF 0x00000018 ///< Register B offset. +#define TC0_RB (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RB_OFF))) ///< Channel 0 register B. +#define TC1_RB (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RB_OFF))) ///< Channel 1 register B. +#define TC2_RB (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RB_OFF))) ///< Channel 2 register B. + + +/** + * Timer Counter Register C + */ +#define TC_RC_OFF 0x0000001C ///< Register C offset. +#define TC0_RC (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_RC_OFF))) ///< Channel 0 register C. +#define TC1_RC (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_RC_OFF))) ///< Channel 1 register C. +#define TC2_RC (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_RC_OFF))) ///< Channel 2 register C. + + + +/** + * Timer Counter Status and Interrupt Registers + */ +#define TC_SR_OFF 0x00000020 ///< Status Register offset. +#define TC0_SR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_SR_OFF))) ///< Status register address. +#define TC1_SR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_SR_OFF))) ///< Status register address. +#define TC2_SR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_SR_OFF))) ///< Status register address. + +#define TC_IER_OFF 0x00000024 ///< Interrupt Enable Register offset. +#define TC0_IER (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IER_OFF))) ///< Channel 0 interrupt enable register address. +#define TC1_IER (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IER_OFF))) ///< Channel 1 interrupt enable register address. +#define TC2_IER (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IER_OFF))) ///< Channel 2 interrupt enable register address. + +#define TC_IDR_OFF 0x00000028 ///< Interrupt Disable Register offset. +#define TC0_IDR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IDR_OFF))) ///< Channel 0 interrupt disable register address. +#define TC1_IDR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IDR_OFF))) ///< Channel 1 interrupt disable register address. +#define TC2_IDR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IDR_OFF))) ///< Channel 2 interrupt disable register address. + +#define TC_IMR_OFF 0x0000002C ///< Interrupt Mask Register offset. +#define TC0_IMR (*((reg32_t *)(TC_BASE + TC_TC0_OFF + TC_IMR_OFF))) ///< Channel 0 interrupt mask register address. +#define TC1_IMR (*((reg32_t *)(TC_BASE + TC_TC1_OFF + TC_IMR_OFF))) ///< Channel 1 interrupt mask register address. +#define TC2_IMR (*((reg32_t *)(TC_BASE + TC_TC2_OFF + TC_IMR_OFF))) ///< Channel 2 interrupt mask register address. + +#define TC_COVFS 0 ///< Counter overflow flag. +#define TC_LOVRS 1 ///< Load overrun flag. +#define TC_CPAS 2 ///< RA compare flag. +#define TC_CPBS 3 ///< RB compare flag. +#define TC_CPCS 4 ///< RC compare flag. +#define TC_LDRAS 5 ///< RA loading flag. +#define TC_LDRBS 6 ///< RB loading flag. +#define TC_ETRGS 7 ///< External trigger flag. +#define TC_CLKSTA 16 ///< Clock enable flag. +#define TC_MTIOA 17 ///< TIOA flag. +#define TC_MTIOB 18 ///< TIOB flag. + + +/** + * Timer Counter Block Control Register + */ +#define TC_BCR_OFF 0x000000C0 ///< Block control register offset. +#define TC_BCR (*((reg32_t *)(TC_BASE + TC_BCR_OFF))) ///< Block control register address. +#define TC_SYNC 0 ///< Synchronisation trigger + + +/** + * Timer Counter Block Mode Register + */ +#define TC_BMR_OFF 0x000000C4 ///< Block mode register offset. +#define TC_BMR (*((reg32_t *)(TC_BASE + TC_BMR_OFF))) ///< Block mode register address. +#define TC_TC0XC0S 0x00000003 ///< External clock signal 0 selection mask. +#define TC_TCLK0XC0 0x00000000 ///< Selects TCLK0. +#define TC_NONEXC0 0x00000001 ///< None selected. +#define TC_TIOA1XC0 0x00000002 ///< Selects TIOA1. +#define TC_TIOA2XC0 0x00000003 ///< Selects TIOA2. + +#define TC_TC1XC1S 0x0000000C ///< External clock signal 1 selection mask. +#define TC_TCLK1XC1 0x00000000 ///< Selects TCLK1. +#define TC_NONEXC1 0x00000004 ///< None selected. +#define TC_TIOA0XC1 0x00000008 ///< Selects TIOA0. +#define TC_TIOA2XC1 0x0000000C ///< Selects TIOA2. + +#define TC_TC2XC2S 0x00000030 ///< External clock signal 2 selection mask. +#define TC_TCLK2XC2 0x00000000 ///< Selects TCLK2. +#define TC_NONEXC2 0x00000010 ///< None selected. +#define TC_TIOA0XC2 0x00000020 ///< Selects TIOA0. +#define TC_TIOA1XC2 0x00000030 ///< Selects TIOA1. + + +#endif /* AT91_TC_H */ diff --git a/bertos/cpu/arm/io/at91_twi.h b/bertos/cpu/arm/io/at91_twi.h new file mode 100644 index 0000000..ed08d80 --- /dev/null +++ b/bertos/cpu/arm/io/at91_twi.h @@ -0,0 +1,190 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91SAM7 Two wire interface. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (*((reg32_t *)(INCLUDING NEGLIGENCE OR OTHERWISE))) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_TWI_H +#define AT91_TWI_H + + +/** + * TWI Control Register. + * \{ + */ +#define TWI_CR_OFF 0x00000000 ///< Control register offset. +#define TWI_CR (*((reg32_t *)(TWI_BASE + TWI_CR_OFF))) ///< Control register address. +#define TWI_START 0 ///< Send start condition. +#define TWI_STOP 1 ///< Send stop condition. +#define TWI_MSEN 2 ///< Enable master mode. +#define TWI_MSDIS 3 ///< Disable master mode. +/* +#define TWI_SVEN 4 ///< Enable slave mode. +#define TWI_SVDIS 5 ///< Disable slave mode. +*/ +#define TWI_SWRST 7 ///< Software reset. +/*\}*/ + +/** + * TWI Master Mode Register. + * \{ + */ +#define TWI_MMR_OFF 0x00000004 ///< Master mode register offset. +#define TWI_MMR (*((reg32_t *)(TWI_BASE + TWI_MMR_OFF))) ///< Master mode register address. +#define TWI_IADRSZ_SHIFT 8 ///< Internal device address size shift. +#define TWI_IADRSZ 0x00000300 ///< Internal device address size mask. +#define TWI_IADRSZ_NONE 0x00000000 ///< No internal device address. +#define TWI_IADRSZ_1BYTE 0x00000100 ///< One byte internal device address. +#define TWI_IADRSZ_2BYTE 0x00000200 ///< Two byte internal device address. +#define TWI_IADRSZ_3BYTE 0x00000300 ///< Three byte internal device address. +#define TWI_MREAD 12 ///< Master read direction. +#define TWI_DADR 0x007F0000 ///< Device address mask. +#define TWI_DADR_SHIFT 16 ///< Device address LSB. +/*\}*/ + +/** + * TWI Internal Address Register. + * \{ + */ +#define TWI_IADR_OFF 0x0000000C ///< Internal address register offset. +#define TWI_IADR (*((reg32_t *)(TWI_BASE + TWI_IADR_OFF))) ///< Internal address register address. +#define TWI_IADR_MASK 0x00FFFFFF ///< Internal address mask. +#define TWI_IADR_SHIFT 0 ///< Internal address LSB. +/*\}*/ + +/** + * TWI Clock Waveform Generator Register. + * \{ + */ +#define TWI_CWGR_OFF 0x00000010 ///< Clock waveform generator register offset. +#define TWI_CWGR (*((reg32_t *)(TWI_BASE + TWI_CWGR_OFF))) ///< Clock waveform generator register address. +#define TWI_CLDIV 0x000000FF ///< Clock low divider mask. +#define TWI_CLDIV_SHIFT 0 ///< Clock low divider LSB. +#define TWI_CHDIV 0x0000FF00 ///< Clock high divider mask. +#define TWI_CHDIV_SHIFT 8 ///< Clock high divider LSB. +#define TWI_CKDIV 0x00070000 ///< Clock divider mask. +#define TWI_CKDIV_SHIFT 16 ///< Clock divider LSB. +/*\}*/ + +/** + * TWI Status and Interrupt Registers. + * \{ + */ +#define TWI_SR_OFF 0x00000020 ///< Status register offset. +#define TWI_SR (*((reg32_t *)(TWI_BASE + TWI_SR_OFF))) ///< Status register address. + +#define TWI_IER_OFF 0x00000024 ///< Interrupt enable register offset. +#define TWI_IER (*((reg32_t *)(TWI_BASE + TWI_IER_OFF))) ///< Interrupt enable register address. + +#define TWI_IDR_OFF 0x00000028 ///< Interrupt disable register offset. +#define TWI_IDR (*((reg32_t *)(TWI_BASE + TWI_IDR_OFF))) ///< Interrupt disable register address. + +#define TWI_IMR_OFF 0x0000002C ///< Interrupt mask register offset. +#define TWI_IMR (*((reg32_t *)(TWI_BASE + TWI_IMR_OFF))) ///< Interrupt mask register address. + +#define TWI_TXCOMP 0 ///< Transmission completed. +#define TWI_RXRDY 1 ///< Receive holding register ready. +#define TWI_TXRDY 2 ///< Transmit holding register ready. + +/* +#define TWI_SVREAD 0x00000008 ///< Slave read. +#define TWI_SVACC 0x00000010 ///< Slave access. +#define TWI_GACC 0x00000020 ///< General call access. +*/ + +#if CPU_ARM_SAM7X +#define TWI_OVRE 6 ///< Overrun error. +#define TWI_UNRE 7 ///< Underrun error. +#endif + +#define TWI_NACK 8 ///< Not acknowledged. +/* +#define TWI_ARBLST 0x00000200 ///< Arbitration lost. +#define TWI_SCLWS 0x00000400 ///< Clock wait state. +#define TWI_EOSACC 0x00000800 ///< End of slave access. +*/ +/*\}*/ + +/** + * TWI Receive Holding Register. + * \{ + */ +#define TWI_RHR_OFF 0x00000030 ///< Receive holding register offset. +#define TWI_RHR (*((reg32_t *)(TWI_BASE + TWI_RHR_OFF))) ///< Receive holding register address. +/*\}*/ + +/** + * TWI Transmit Holding Register. + * \{ + */ +#define TWI_THR_OFF 0x00000034 ///< Transmit holding register offset. +#define TWI_THR (*((reg32_t *)(TWI_BASE + TWI_THR_OFF))) ///< Transmit holding register address. +/*\}*/ + + +#endif /* AT91_TWI_H */ diff --git a/bertos/cpu/arm/io/at91_us.h b/bertos/cpu/arm/io/at91_us.h new file mode 100644 index 0000000..1fddfde --- /dev/null +++ b/bertos/cpu/arm/io/at91_us.h @@ -0,0 +1,343 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * AT91 UART User interface. + * This file is based on NUT/OS implementation. See license below. + */ +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_US_H +#define AT91_US_H + +/** + * USART Control Register + */ +/*\{*/ +#define US_CR_OFF 0x00000000 ///< USART control register offset. +#define US0_CR (*((reg32_t *)(USART0_BASE + US_CR_OFF))) ///< Channel 0 control register address. +#define US1_CR (*((reg32_t *)(USART1_BASE + US_CR_OFF))) ///< Channel 1 control register address. +#define US_RSTRX 2 ///< Reset receiver. +#define US_RSTTX 3 ///< Reset transmitter. +#define US_RXEN 4 ///< Receiver enable. +#define US_RXDIS 5 ///< Receiver disable. +#define US_TXEN 6 ///< Transmitter enable. +#define US_TXDIS 7 ///< Transmitter disable. +#define US_RSTSTA 8 ///< Reset status bits. +#define US_STTBRK 9 ///< Start break. +#define US_STPBRK 10 ///< Stop break. +#define US_STTTO 11 ///< Start timeout. +#define US_SENDA 12 ///< Send next byte with address bit set. +#define US_RSTIT 13 ///< Reset interations. +#define US_RSTNAK 14 ///< Reset non acknowledge. +#define US_RETTO 15 ///< Rearm time out. +#define US_DTREN 16 ///< Data terminal ready enable. +#define US_DTRDIS 17 ///< Data terminal ready disable. +#define US_RTSEN 18 ///< Request to send enable. +#define US_RTSDIS 19 ///< Request to send disable. +/*\}*/ + +/** + * Mode Register + */ +/*\{*/ +#define US_MR_OFF 0x00000004 ///< USART mode register offset. +#define US0_MR (*((reg32_t *)(USART0_BASE + US_MR_OFF))) ///< Channel 0 mode register address. +#define US1_MR (*((reg32_t *)(USART1_BASE + US_MR_OFF))) ///< Channel 1 mode register address. + +#define US_USART_MODE_MASK 0x0000000F ///< USART mode mask. +#define US_USART_MODE_NORMA 0x00000000 ///< Normal. +#define US_USART_MODE_RS485 0x00000001 ///< RS485. +#define US_USART_MODE_HW_HDSH 0x00000002 ///< Hardware handshaking. +#define US_USART_MODE_MODEM 0x00000003 ///< Modem. +#define US_USART_MODE_ISO7816T0 0x00000004 ///< ISO7816 protocol: T=0. +#define US_USART_MODE_ISO7816T1 0x00000006 ///< ISO7816 protocol: T=1. +#define US_USART_MODE_IRDA 0x00000008 ///< IrDA. + +#define US_CLKS_MASK 0x00000030 ///< Clock selection mask. +#define US_CLKS_MCK 0x00000000 ///< Master clock. +#define US_CLKS_MCK8 0x00000010 ///< Master clock divided by 8. +#define US_CLKS_SCK 0x00000020 ///< External clock. +#define US_CLKS_SLCK 0x00000030 ///< Slow clock. + +#define US_CHRL_MASK 0x000000C0 ///< Masks data length. +#define US_CHRL_5 0x00000000 ///< 5 data bits. +#define US_CHRL_6 0x00000040 ///< 6 data bits. +#define US_CHRL_7 0x00000080 ///< 7 data bits. +#define US_CHRL_8 0x000000C0 ///< 8 data bits. + +#define US_SYNC 8 ///< Synchronous mode enable. + +#define US_PAR_MASK 0x00000E00 ///< Parity mode mask. +#define US_PAR_EVEN 0x00000000 ///< Even parity. +#define US_PAR_ODD 0x00000200 ///< Odd parity. +#define US_PAR_SPACE 0x00000400 ///< Space parity. +#define US_PAR_MARK 0x00000600 ///< Marked parity. +#define US_PAR_NO 0x00000800 ///< No parity. +#define US_PAR_MULTIDROP 0x00000C00 ///< Multi-drop mode. + +#define US_NBSTOP_MASK 0x00003000 ///< Masks stop bit length. +#define US_NBSTOP_1 0x00000000 ///< 1 stop bit. +#define US_NBSTOP_1_5 0x00001000 ///< 1.5 stop bits. +#define US_NBSTOP_2 0x00002000 ///< 2 stop bits. + +#define US_CHMODE_MASK 0x0000C000 ///< Channel mode mask. +#define US_CHMODE_NORMAL 0x00000000 ///< Normal mode. +#define US_CHMODE_AUTOMATIC_ECHO 0x00004000 ///< Automatic echo. +#define US_CHMODE_LOCAL_LOOPBACK 0x00008000 ///< Local loopback. +#define US_CHMODE_REMOTE_LOOPBACK 0x0000C000 ///< Remote loopback. + +#define US_MSBF 16 ///< Bit order. +#define US_MODE9 17 ///< 9 bit mode. +#define US_CLKO 18 ///< Clock output select. +#define US_OVER 19 ///< Oversampling mode. +#define US_INACK 20 ///< Inhibit non acknowledge. +#define US_DSNACK 21 ///< Disable successive nack. + +#define US_MAX_INTERATION_MASK 0x07000000 ///< Max numer of interation in mode ISO7816 T=0. + +#define US_FILTER 28 ///< Infrared receive line filter. + +/*\}*/ + +/** + * Status and Interrupt Register + */ +/*\{*/ +#define US_IER_OFF 0x00000008 ///< USART interrupt enable register offset. +#define US0_IER (*((reg32_t *)(USART0_BASE + US_IER_OFF))) ///< Channel 0 interrupt enable register address. +#define US1_IER (*((reg32_t *)(USART1_BASE + US_IER_OFF))) ///< Channel 1 interrupt enable register address. + +#define US_IDR_OFF 0x0000000C ///< USART interrupt disable register offset. +#define US0_IDR (*((reg32_t *)(USART0_BASE + US_IDR_OFF))) ///< Channel 0 interrupt disable register address. +#define US1_IDR (*((reg32_t *)(USART1_BASE + US_IDR_OFF))) ///< Channel 1 interrupt disable register address. + +#define US_IMR_OFF 0x00000010 ///< USART interrupt mask register offset. +#define US0_IMR (*((reg32_t *)(USART0_BASE + US_IMR_OFF))) ///< Channel 0 interrupt mask register address. +#define US1_IMR (*((reg32_t *)(USART1_BASE + US_IMR_OFF))) ///< Channel 1 interrupt mask register address. + +#define US_CSR_OFF 0x00000014 ///< USART status register offset. +#define US0_CSR (*((reg32_t *)(USART0_BASE + US_CSR_OFF))) ///< Channel 0 status register address. +#define US1_CSR (*((reg32_t *)(USART1_BASE + US_CSR_OFF))) ///< Channel 1 status register address. +#define US_CSR_RI 20 ///< Image of RI input. +#define US_CSR_DSR 21 ///< Image of DSR input. +#define US_CSR_DCD 22 ///< Image of DCD input. +#define US_CSR_CTS 23 ///< Image of CTS input. + +#define US_RXRDY 0 ///< Receiver ready. +#define US_TXRDY 1 ///< Transmitter ready. +#define US_RXBRK 2 ///< Receiver break. +#define US_ENDRX 3 ///< End of receiver PDC transfer. +#define US_ENDTX 4 ///< End of transmitter PDC transfer. +#define US_OVRE 5 ///< Overrun error. +#define US_FRAME 6 ///< Framing error. +#define US_PARE 7 ///< Parity error. +#define US_TIMEOUT 8 ///< Receiver timeout. +#define US_TXEMPTY 9 ///< Transmitter empty. +#define US_ITERATION 10 ///< Iteration interrupt enable. +#define US_TXBUFE 11 ///< Buffer empty interrupt enable. +#define US_RXBUFF 12 ///< Buffer full interrupt enable. +#define US_NACK 13 ///< Non acknowledge interrupt enable. +#define US_RIIC 16 ///< Ring indicator input change enable. +#define US_DSRIC 17 ///< Data set ready input change enable. +#define US_DCDIC 18 ///< Data carrier detect input change interrupt enable. +#define US_CTSIC 19 ///< Clear to send input change interrupt enable. + +/** + * Receiver Holding Register + */ +/*\{*/ +#define US_RHR_OFF 0x00000018 ///< USART receiver holding register offset. +#define US0_RHR (*((reg32_t *)(USART0_BASE + US_RHR_OFF))) ///< Channel 0 receiver holding register address. +#define US1_RHR (*((reg32_t *)(USART1_BASE + US_RHR_OFF))) ///< Channel 1 receiver holding register address. +#define US_RHR_RXCHR_MASK 0x000001FF ///< Last char received if US_RXRDY is set. +#define US_RHR_RXSYNH 15 ///< Received sync. +/*\}*/ + +/** + * Transmitter Holding Register + */ +/*\{*/ +#define US_THR_OFF 0x0000001C ///< USART transmitter holding register offset. +#define US0_THR (*((reg32_t *)(USART0_BASE + US_THR_OFF))) ///< Channel 0 transmitter holding register address. +#define US1_THR (*((reg32_t *)(USART1_BASE + US_THR_OFF))) ///< Channel 1 transmitter holding register address. +#define US_THR_TXCHR_MASK 0x000001FF ///< Next char to be trasmitted. +#define US_THR_TXSYNH 15 ///< Sync field to be trasmitted. +/*\}*/ + +/** + * Baud Rate Generator Register + */ +/*\{*/ +#define US_BRGR_OFF 0x00000020 ///< USART baud rate register offset. +#define US0_BRGR (*((reg32_t *)(USART0_BASE + US_BRGR_OFF))) ///< Channel 0 baud rate register address. +#define US1_BRGR (*((reg32_t *)(USART1_BASE + US_BRGR_OFF))) ///< Channel 1 baud rate register address. +/*\}*/ + +/** + * Receiver Timeout Register + */ +/*\{*/ +#define US_RTOR_OFF 0x00000024 ///< USART receiver timeout register offset. +#define US0_RTOR (*((reg32_t *)(USART0_BASE + US_RTOR_OFF))) ///< Channel 0 receiver timeout register address. +#define US1_RTOR (*((reg32_t *)(USART1_BASE + US_RTOR_OFF))) ///< Channel 1 receiver timeout register address. +/*\}*/ + +/** + * Transmitter Time Guard Register + */ +/*\{*/ +#define US_TTGR_OFF 0x00000028 ///< USART transmitter time guard register offset. +#define US0_TTGR (*((reg32_t *)(USART0_BASE + US_TTGR_OFF))) ///< Channel 0 transmitter time guard register address. +#define US1_TTGR (*((reg32_t *)(USART1_BASE + US_TTGR_OFF))) ///< Channel 1 transmitter time guard register address. +/*\}*/ + +/** + * FI DI Ratio Register +*/ +/*\{*/ +#define US_FIDI_OFF 0x00000040 ///< USART FI DI ratio register offset. +#define US0_FIDI (*((reg32_t *)(USART0_BASE + US_FIDI_OFF))) ///< Channel 0 FI DI ratio register address. +#define US1_FIDI (*((reg32_t *)(USART1_BASE + US_FIDI_OFF))) ///< Channel 1 FI DI ratio register address. +/*\}*/ + +/** + * Error Counter Register + */ +/*\{*/ +#define US_NER_OFF 0x00000044 ///< USART error counter register offset. +#define US0_NER (*((reg32_t *)(USART0_BASE + US_NER_OFF))) ///< Channel 0 error counter register address. +#define US1_NER (*((reg32_t *)(USART1_BASE + US_NER_OFF))) ///< Channel 1 error counter register address. +/*\}*/ + +/** + * IrDA Filter Register + */ +/*\{*/ +#define US_IF_OFF 0x0000004C ///< USART IrDA filter register offset. +#define US0_IF (*((reg32_t *)(USART0_BASE + US_IF_OFF))) ///< Channel 0 IrDA filter register address. +#define US1_IF (*((reg32_t *)(USART1_BASE + US_IF_OFF))) ///< Channel 1 IrDA filter register address. +/*\}*/ + +#if USART_HAS_PDC + + /** + * Receive Pointer Register + */ + /*\{*/ + #define US0_RPR (*((reg32_t *)(USART0_BASE + PERIPH_RPR_OFF))) ///< Channel 0 receive pointer register address. + #define US1_RPR (*((reg32_t *)(USART1_BASE + PERIPH_RPR_OFF))) ///< Channel 1 receive pointer register address. + /*\}*/ + + /** + * Receive Counter Register + */ + /*\{*/ + #define US0_RCR (*((reg32_t *)(USART0_BASE + PERIPH_RCR_OFF))) ///< Channel 0 receive counter register address. + #define US1_RCR (*((reg32_t *)(USART1_BASE + PERIPH_RCR_OFF))) ///< Channel 1 receive counter register address. + /*\}*/ + + /** + * Transmit Pointer Register + */ + /*\{*/ + #define US0_TPR (*((reg32_t *)(USART0_BASE + PERIPH_TPR_OFF))) ///< Channel 0 transmit pointer register address. + #define US1_TPR (*((reg32_t *)(USART1_BASE + PERIPH_TPR_OFF))) ///< Channel 1 transmit pointer register address. + /*\}*/ + + /** + * Transmit Counter Register + */ + /*\{*/ + #define US0_TCR (*((reg32_t *)(USART0_BASE + PERIPH_TCR_OFF))) ///< Channel 0 transmit counter register address. + #define US1_TCR (*((reg32_t *)(USART1_BASE + PERIPH_TCR_OFF))) ///< Channel 1 transmit counter register address. + /*\}*/ + + #if defined(PERIPH_RNPR_OFF) && defined(PERIPH_RNCR_OFF) + #define US0_RNPR (*((reg32_t *)(USART0_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 0 receive next pointer register. + #define US1_RNPR (*((reg32_t *)(USART1_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 1 receive next pointer register. + #define US0_RNCR (*((reg32_t *)(USART0_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 0 receive next counter register. + #define US1_RNCR (*((reg32_t *)(USART1_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 1 receive next counter register. + #endif + + #if defined(PERIPH_TNPR_OFF) && defined(PERIPH_TNCR_OFF) + #define US0_TNPR (*((reg32_t *)(USART0_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 0 transmit next pointer register. + #define US1_TNPR (*((reg32_t *)(USART1_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 1 transmit next pointer register. + #define US0_TNCR (*((reg32_t *)(USART0_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 0 transmit next counter register. + #define US1_TNCR (*((reg32_t *)(USART1_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 1 transmit next counter register. + #endif + + #if defined(PERIPH_PTCR_OFF) + #define US0_PTCR (*((reg32_t *)(USART0_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 0 transfer control register. + #define US1_PTCR (*((reg32_t *)(USART1_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 1 transfer control register. + #endif + + #if defined(PERIPH_PTSR_OFF) + #define US0_PTSR (*((reg32_t *)(USART0_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 0 transfer status register. + #define US1_PTSR (*((reg32_t *)(USART1_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 1 transfer status register. + #endif + +#endif /* USART_HAS_PDC */ + +#endif /* AT91_US_H */ diff --git a/bertos/cpu/arm/io/at91_wdt.h b/bertos/cpu/arm/io/at91_wdt.h new file mode 100644 index 0000000..6e656a7 --- /dev/null +++ b/bertos/cpu/arm/io/at91_wdt.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * AT91 Watchdog. + * This file is based on NUT/OS implementation. See license below. + */ + + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91_WDT_H +#define AT91_WDT_H + + +/** Watch Dog Control Register */ +/*\{*/ +#define WDT_CR_OFF 0x00000000 ///< Watchdog control register offset. +#define WDT_CR (*((reg32_t *)(WDT_BASE + WDT_CR_OFF))) ///< Watchdog control register address. +#define WDT_WDRSTT 0 ///< Watchdog restart. +#define WDT_KEY 0xA5000000 ///< Watchdog password. +/*\}*/ + +/** Watch Dog Mode Register */ +/*\{*/ +#define WDT_MR_OFF 0x00000004 ///< Mode register offset. +#define WDT_MR (*((reg32_t *)(WDT_BASE + WDT_MR_OFF))) ///< Mode register address. +#define WDT_WDV_MASK 0x00000FFF ///< Counter value mask. +#define WDT_WDV_SHIFT 0 ///< Counter value LSB. +#define WDT_WDFIEN 12 ///< Fault interrupt enable. +#define WDT_WDRSTEN 13 ///< Reset enable. +#define WDT_WDRPROC 14 ///< Eset processor enable. +#define WDT_WDDIS 15 ///< Watchdog disable. +#define WDT_WDD_MASK 0x0FFF0000 ///< Delta value mask. +#define WDT_WDD_SHIFT 16 ///< Delta value LSB. +#define WDT_WDDBGHLT 28 ///< Watchdog debug halt. +#define WDT_WDIDLEHLT 29 ///< Watchdog idle halt. +/*\}*/ + +/** Watch Dog Status Register */ +/*\{*/ +#define WDT_SR_OFF 0x00000008 ///< Status register offset. +#define WDT_SR (*((reg32_t *)(WDT_BASE + WDT_SR_OFF))) ///< Status register address. +#define WDT_WDUNF 0 ///< Watchdog underflow. +#define WDT_WDERR 1 ///< Watchdog error. +/*\}*/ + + +#endif /* AT91_WDT_H */ diff --git a/bertos/cpu/arm/io/at91sam7.h b/bertos/cpu/arm/io/at91sam7.h new file mode 100644 index 0000000..5388df0 --- /dev/null +++ b/bertos/cpu/arm/io/at91sam7.h @@ -0,0 +1,433 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * AT91SAM7 register definitions. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef AT91SAM7_H +#define AT91SAM7_H + +#include + +#if CPU_ARM_SAM7X || CPU_ARM_SAM7S_LARGE + #define FLASH_BASE 0x100000UL + #define RAM_BASE 0x200000UL + + #define TC_BASE 0xFFFA0000 ///< Timer/counter base address. + #define UDP_BASE 0xFFFB0000 ///< USB device port base address. + #define TWI_BASE 0xFFFB8000 ///< Two-wire interface base address. + #define USART0_BASE 0xFFFC0000 ///< USART 0 base address. + #define USART1_BASE 0xFFFC4000 ///< USART 1 base address. + #define PWMC_BASE 0xFFFCC000 ///< PWM controller base address. + #define SSC_BASE 0xFFFD4000 ///< Serial synchronous controller base address. + #define ADC_BASE 0xFFFD8000 ///< ADC base address. + + #define AIC_BASE 0xFFFFF000 ///< AIC base address. + #define DBGU_BASE 0xFFFFF200 ///< DBGU base address. + #define PIOA_BASE 0xFFFFF400 ///< PIO A base address. + #define PMC_BASE 0xFFFFFC00 ///< PMC base address. + #define RSTC_BASE 0xFFFFFD00 ///< Resect controller register base address. + #define RTT_BASE 0xFFFFFD20 ///< Realtime timer base address. + #define PIT_BASE 0xFFFFFD30 ///< Periodic interval timer base address. + #define WDT_BASE 0xFFFFFD40 ///< Watch Dog register base address. + #define VREG_BASE 0xFFFFFD60 ///< Voltage regulator mode controller base address. + #define MC_BASE 0xFFFFFF00 ///< Memory controller base. + + #if CPU_ARM_SAM7X + #define CAN_BASE 0xFFFD0000 ///< PWM controller base address. + #define EMAC_BASE 0xFFFDC000 ///< Ethernet MAC address. + #define SPI0_BASE 0xFFFE0000 ///< SPI0 base address. + #define SPI1_BASE 0xFFFE4000 ///< SPI1 base address. + #define PIOB_BASE 0xFFFFF600 ///< PIO base address. + #endif + + #if CPU_ARM_SAM7S_LARGE + #define SPI_BASE 0xFFFE0000 ///< SPI0 base address. + #endif + + #define PIO_HAS_MULTIDRIVER 1 + #define PIO_HAS_PULLUP 1 + #define PIO_HAS_PERIPHERALSELECT 1 + #define PIO_HAS_OUTPUTWRITEENABLE 1 + + #define DBGU_HAS_PDC 1 + #define SPI_HAS_PDC 1 + #define SSC_HAS_PDC 1 + #define USART_HAS_PDC 1 + + /* PDC registers */ + #define PERIPH_RPR_OFF 0x100 ///< Receive Pointer Register. + #define PERIPH_RCR_OFF 0x104 ///< Receive Counter Register. + #define PERIPH_TPR_OFF 0x108 ///< Transmit Pointer Register. + #define PERIPH_TCR_OFF 0x10C ///< Transmit Counter Register. + #define PERIPH_RNPR_OFF 0x110 ///< Receive Next Pointer Register. + #define PERIPH_RNCR_OFF 0x114 ///< Receive Next Counter Register. + #define PERIPH_TNPR_OFF 0x118 ///< Transmit Next Pointer Register. + #define PERIPH_TNCR_OFF 0x11C ///< Transmit Next Counter Register. + #define PERIPH_PTCR_OFF 0x120 ///< PDC Transfer Control Register. + #define PERIPH_PTSR_OFF 0x124 ///< PDC Transfer Status Register. + + #define PDC_RXTEN 0 + #define PDC_RXTDIS 1 + #define PDC_TXTEN 8 + #define PDC_TXTDIS 9 + +#else + #error No base address register definition for selected ARM CPU + +#endif + +#if CPU_ARM_AT91SAM7S64 + #define FLASH_MEM_SIZE 0x10000UL ///< Internal flash memory size + #define FLASH_PAGE_SIZE_BYTES 128 ///< Size of cpu flash memory page in bytes + #define FLASH_BANKS_NUM 1 ///< Number of flash banks + #define FLASH_SECTORS_NUM 16 ///< Number of flash sector + #define FLASH_PAGE_PER_SECTOR 32 ///< Number of page for sector + +#elif CPU_ARM_AT91SAM7S128 || CPU_ARM_AT91SAM7X128 + #define FLASH_MEM_SIZE 0x20000UL ///< Internal flash memory size + #define FLASH_PAGE_SIZE_BYTES 256 ///< Size of cpu flash memory page in bytes + #define FLASH_BANKS_NUM 1 ///< Number of flash banks + #define FLASH_SECTORS_NUM 8 ///< Number of flash sector + #define FLASH_PAGE_PER_SECTOR 64 ///< Number of page for sector + +#elif CPU_ARM_AT91SAM7S256 || CPU_ARM_AT91SAM7X256 + #define FLASH_MEM_SIZE 0x40000UL ///< Internal flash memory size + #define FLASH_PAGE_SIZE_BYTES 256 ///< Size of cpu flash memory page in bytes + #define FLASH_BANKS_NUM 1 ///< Number of flash banks + #define FLASH_SECTORS_NUM 16 ///< Number of flash sector + #define FLASH_PAGE_PER_SECTOR 64 ///< Number of page for sector + +#elif CPU_ARM_AT91SAM7S512 || CPU_ARM_AT91SAM7X512 + #define FLASH_MEM_SIZE 0x80000UL ///< Internal flash memory size + #define FLASH_PAGE_SIZE_BYTES 256 ///< Size of cpu flash memory page in bytes + #define FLASH_BANKS_NUM 2 ///< Number of flash banks + #define FLASH_SECTORS_NUM 32 ///< Number of flash sector + #define FLASH_PAGE_PER_SECTOR 64 ///< Number of page for sector + +#else + #error Memory size definition for selected ARM CPU +#endif + +#include "at91_aic.h" +#include "at91_pit.h" +#include "at91_pmc.h" +#include "at91_mc.h" +#include "at91_wdt.h" +#include "at91_rstc.h" +#include "at91_pio.h" +#include "at91_us.h" +#include "at91_dbgu.h" +#include "at91_tc.h" +#include "at91_adc.h" +#include "at91_pwm.h" +#include "at91_spi.h" +#include "at91_twi.h" +#include "at91_ssc.h" +#include "at91_emac.h" +//TODO: add other peripherals + +/** + * Peripheral Identifiers and Interrupts + *\{ + */ +#if CPU_ARM_SAM7X || CPU_ARM_SAM7S_LARGE + #define FIQ_ID 0 ///< Fast interrupt ID. + #define SYSC_ID 1 ///< System controller interrupt. + #define US0_ID 6 ///< USART 0 ID. + #define US1_ID 7 ///< USART 1 ID. + #define SSC_ID 8 ///< Synchronous serial controller ID. + #define TWI_ID 9 ///< Two-wire interface ID. + #define PWMC_ID 10 ///< PWM controller ID. + #define UDP_ID 11 ///< USB device port ID. + #define TC0_ID 12 ///< Timer 0 ID. + #define TC1_ID 13 ///< Timer 1 ID. + #define TC2_ID 14 ///< Timer 2 ID. + + #define IRQ0_ID 30 ///< External interrupt 0 ID. + #define IRQ1_ID 31 ///< External interrupt 1 ID. + + #if CPU_ARM_SAM7X + #define PIOA_ID 2 ///< Parallel A I/O controller ID. + #define PIOB_ID 3 ///< Parallel B I/O controller ID. + #define SPI0_ID 4 ///< Serial peripheral interface 0 ID. + #define SPI1_ID 5 ///< Serial peripheral interface 1 ID. + #define CAN_ID 15 ///< CAN controller ID. + #define EMAC_ID 16 ///< Ethernet MAC ID. + #define ADC_ID 17 ///< Analog to digital converter ID. + /* 18-29 Reserved */ + + #endif + + #if CPU_ARM_SAM7S_LARGE + #define PIOA_ID 2 ///< Parallel I/O controller ID. + /* ID 3 is reserved */ + #define ADC_ID 4 ///< Analog to digital converter ID. + #define SPI_ID 5 ///< Serial peripheral interface ID. + #define SPI0_ID SPI_ID ///< Alias + #endif + +#else + #error No peripheral ID and interrupts definition for selected ARM CPU + +#endif +/*\}*/ + +/** + * USART & DEBUG pin names + *\{ + */ +#if CPU_ARM_SAM7S_LARGE + #define RXD0 5 + #define TXD0 6 + #define RXD1 21 + #define TXD1 22 + #define DTXD 10 + #define DRXD 9 +#elif CPU_ARM_SAM7X + #define RXD0 0 // PA0 + #define TXD0 1 // PA1 + #define RXD1 5 // PA5 + #define TXD1 6 // PA6 + #define DTXD 28 // PA28 + #define DRXD 27 // PA27 +#else + #error No USART & debug pin names definition for selected ARM CPU +#endif +/*\}*/ + +/** + * SPI pins name + *\{ + */ +#if CPU_ARM_SAM7S_LARGE + #define SPI0_NPCS0 11 // Same as NSS pin. + #define SPI0_MISO 12 + #define SPI0_MOSI 13 + #define SPI0_SPCK 14 + +#elif CPU_ARM_SAM7X + #define SPI0_NPCS0 12 // Same as NSS pin. PA12 + #define SPI0_NPCS1 13 // PA13 + #define SPI0_NPCS2 14 // PA14 + #define SPI0_NPCS3 15 // PA15 + #define SPI0_MISO 16 // PA16 + #define SPI0_MOSI 17 // PA17 + #define SPI0_SPCK 18 // PA18 + + #define SPI1_NPCS0 21 // Same as NSS pin. PA21 + #define SPI1_NPCS1 25 // PA25 + #define SPI1_NPCS2 26 // PA26 + #define SPI1_NPCS3 29 // PA29 + #define SPI1_MISO 24 // PA24 + #define SPI1_MOSI 23 // PA23 + #define SPI1_SPCK 22 // PA22 + +#else + #error No SPI pins name definition for selected ARM CPU + +#endif +/*\}*/ + +/** + * SSC pins name + *\{ + */ +#if CPU_ARM_SAM7S_LARGE + + #define SSC_TF 15 // PA15 + #define SSC_TK 16 // PA16 + #define SSC_TD 17 // PA17 + #define SSC_RD 18 // PA18 + #define SSC_RK 19 // PA19 + #define SSC_RF 20 // PA20 + +#elif CPU_ARM_SAM7X + + #define SSC_TF 21 // PA21 + #define SSC_TK 22 // PA22 + #define SSC_TD 23 // PA23 + #define SSC_RD 24 // PA24 + #define SSC_RK 25 // PA25 + #define SSC_RF 26 // PA26 + +#else + #error No SSC pins name definition for selected ARM CPU + +#endif +/*\}*/ + +/** + * Timer counter pins definition. + *\{ + */ +#if CPU_ARM_SAM7X + #define TIOA0 23 // PB23 + #define TIOB0 24 // PB24 + #define TIOA1 25 // PB25 + #define TIOB1 26 // PB26 + #define TIOA2 27 // PB27 + #define TIOB2 28 // PB28 + + #define TIO_PIO_PDR PIOB_PDR + #define TIO_PIO_ABSR PIOB_ASR + +#elif CPU_ARM_SAM7S_LARGE + #define TIOA0 0 // PA0 + #define TIOB0 1 // PA1 + #define TIOA1 15 // PA15 + #define TIOB1 16 // PA16 + #define TIOA2 26 // PA26 + #define TIOB2 27 // PA27 + + #define TIO_PIO_PDR PIOA_PDR + #define TIO_PIO_ABSR PIOA_BSR + +#else + #error No Timer Counter names of pins definition for selected ARM CPU + +#endif +/*\}*/ + + +/** + * PWM pins definition. + *\{ + */ +#if CPU_ARM_SAM7X + #define PWM0 19 // PB19 + #define PWM1 20 // PB20 + #define PWM2 21 // PB21 + #define PWM3 22 // PB22 + + #define PWM_PIO_PDR PIOB_PDR + #define PWM_PIO_PER PIOB_PER + #define PWM_PIO_CODR PIOB_CODR + #define PWM_PIO_OER PIOB_OER + #define PWM_PIO_ABSR PIOB_ASR + +#elif CPU_ARM_SAM7S_LARGE + #define PWM0 11 // PA11 + #define PWM1 12 // PA12 + #define PWM2 13 // PA13 + #define PWM3 14 // PA14 + + #define PWM_PIO_PDR PIOA_PDR + #define PWM_PIO_PER PIOA_PER + #define PWM_PIO_CODR PIOA_CODR + #define PWM_PIO_OER PIOA_OER + #define PWM_PIO_ABSR PIOA_BSR + +#else + #error No PWM names of pins definition for selected ARM CPU + +#endif +/*\}*/ + +/** + * TWI pins definition. + *\{ + */ +#if CPU_ARM_SAM7X + #define TWD 10 + #define TWCK 11 + +#elif CPU_ARM_SAM7S_LARGE + #define TWD 3 //PA3 + #define TWCK 4 //PA4 + +#else + #error No TWI names of pins definition for selected ARM CPU +#endif + +/** + * ADC pins definition. + *\{ + */ +#if CPU_ARM_SAM7X + #define ADTRG 18 // PB18 + #define AD0 23 // PB27 + #define AD1 24 // PB28 + #define AD2 25 // PB29 + #define AD3 26 // PB30 + +#elif CPU_ARM_SAM7S_LARGE + #define ADTRG 18 // PA8 + #define AD0 0 // PA17 + #define AD1 1 // PA18 + #define AD2 15 // PA19 + #define AD3 16 // PA20 + +#else + #error No ADC names of pins definition for selected ARM CPU + +#endif +/*\}*/ + +#endif /* AT91SAM7_H */ diff --git a/bertos/cpu/arm/io/lpc23xx.h b/bertos/cpu/arm/io/lpc23xx.h new file mode 100644 index 0000000..605211c --- /dev/null +++ b/bertos/cpu/arm/io/lpc23xx.h @@ -0,0 +1,1244 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * LPC23xx I/O registers. + */ + +#ifndef LPC23XX_H +#define LPC23XX_H + +#include + +#include +/* Vectored Interrupt Controller (VIC) */ +#define VIC_BASE_ADDR 0xFFFFF000 +#define VICIRQStatus (*(reg32_t *)(VIC_BASE_ADDR + 0x000)) +#define VICFIQStatus (*(reg32_t *)(VIC_BASE_ADDR + 0x004)) +#define VICRawIntr (*(reg32_t *)(VIC_BASE_ADDR + 0x008)) +#define VICIntSelect (*(reg32_t *)(VIC_BASE_ADDR + 0x00C)) +#define VICIntEnable (*(reg32_t *)(VIC_BASE_ADDR + 0x010)) +#define VICIntEnClr (*(reg32_t *)(VIC_BASE_ADDR + 0x014)) +#define VICSoftInt (*(reg32_t *)(VIC_BASE_ADDR + 0x018)) +#define VICSoftIntClr (*(reg32_t *)(VIC_BASE_ADDR + 0x01C)) +#define VICProtection (*(reg32_t *)(VIC_BASE_ADDR + 0x020)) +#define VICSWPrioMask (*(reg32_t *)(VIC_BASE_ADDR + 0x024)) + +#define VICVectAddr0 (*(reg32_t *)(VIC_BASE_ADDR + 0x100)) +#define VICVectAddr1 (*(reg32_t *)(VIC_BASE_ADDR + 0x104)) +#define VICVectAddr2 (*(reg32_t *)(VIC_BASE_ADDR + 0x108)) +#define VICVectAddr3 (*(reg32_t *)(VIC_BASE_ADDR + 0x10C)) +#define VICVectAddr4 (*(reg32_t *)(VIC_BASE_ADDR + 0x110)) +#define VICVectAddr5 (*(reg32_t *)(VIC_BASE_ADDR + 0x114)) +#define VICVectAddr6 (*(reg32_t *)(VIC_BASE_ADDR + 0x118)) +#define VICVectAddr7 (*(reg32_t *)(VIC_BASE_ADDR + 0x11C)) +#define VICVectAddr8 (*(reg32_t *)(VIC_BASE_ADDR + 0x120)) +#define VICVectAddr9 (*(reg32_t *)(VIC_BASE_ADDR + 0x124)) +#define VICVectAddr10 (*(reg32_t *)(VIC_BASE_ADDR + 0x128)) +#define VICVectAddr11 (*(reg32_t *)(VIC_BASE_ADDR + 0x12C)) +#define VICVectAddr12 (*(reg32_t *)(VIC_BASE_ADDR + 0x130)) +#define VICVectAddr13 (*(reg32_t *)(VIC_BASE_ADDR + 0x134)) +#define VICVectAddr14 (*(reg32_t *)(VIC_BASE_ADDR + 0x138)) +#define VICVectAddr15 (*(reg32_t *)(VIC_BASE_ADDR + 0x13C)) +#define VICVectAddr16 (*(reg32_t *)(VIC_BASE_ADDR + 0x140)) +#define VICVectAddr17 (*(reg32_t *)(VIC_BASE_ADDR + 0x144)) +#define VICVectAddr18 (*(reg32_t *)(VIC_BASE_ADDR + 0x148)) +#define VICVectAddr19 (*(reg32_t *)(VIC_BASE_ADDR + 0x14C)) +#define VICVectAddr20 (*(reg32_t *)(VIC_BASE_ADDR + 0x150)) +#define VICVectAddr21 (*(reg32_t *)(VIC_BASE_ADDR + 0x154)) +#define VICVectAddr22 (*(reg32_t *)(VIC_BASE_ADDR + 0x158)) +#define VICVectAddr23 (*(reg32_t *)(VIC_BASE_ADDR + 0x15C)) +#define VICVectAddr24 (*(reg32_t *)(VIC_BASE_ADDR + 0x160)) +#define VICVectAddr25 (*(reg32_t *)(VIC_BASE_ADDR + 0x164)) +#define VICVectAddr26 (*(reg32_t *)(VIC_BASE_ADDR + 0x168)) +#define VICVectAddr27 (*(reg32_t *)(VIC_BASE_ADDR + 0x16C)) +#define VICVectAddr28 (*(reg32_t *)(VIC_BASE_ADDR + 0x170)) +#define VICVectAddr29 (*(reg32_t *)(VIC_BASE_ADDR + 0x174)) +#define VICVectAddr30 (*(reg32_t *)(VIC_BASE_ADDR + 0x178)) +#define VICVectAddr31 (*(reg32_t *)(VIC_BASE_ADDR + 0x17C)) + +/* The name convention below is from previous LPC2000 family MCUs, in LPC23xx/24xx, +these registers are known as "VICVectPriority(x)". */ +#define VICVectCntl0 (*(reg32_t *)(VIC_BASE_ADDR + 0x200)) +#define VICVectCntl1 (*(reg32_t *)(VIC_BASE_ADDR + 0x204)) +#define VICVectCntl2 (*(reg32_t *)(VIC_BASE_ADDR + 0x208)) +#define VICVectCntl3 (*(reg32_t *)(VIC_BASE_ADDR + 0x20C)) +#define VICVectCntl4 (*(reg32_t *)(VIC_BASE_ADDR + 0x210)) +#define VICVectCntl5 (*(reg32_t *)(VIC_BASE_ADDR + 0x214)) +#define VICVectCntl6 (*(reg32_t *)(VIC_BASE_ADDR + 0x218)) +#define VICVectCntl7 (*(reg32_t *)(VIC_BASE_ADDR + 0x21C)) +#define VICVectCntl8 (*(reg32_t *)(VIC_BASE_ADDR + 0x220)) +#define VICVectCntl9 (*(reg32_t *)(VIC_BASE_ADDR + 0x224)) +#define VICVectCntl10 (*(reg32_t *)(VIC_BASE_ADDR + 0x228)) +#define VICVectCntl11 (*(reg32_t *)(VIC_BASE_ADDR + 0x22C)) +#define VICVectCntl12 (*(reg32_t *)(VIC_BASE_ADDR + 0x230)) +#define VICVectCntl13 (*(reg32_t *)(VIC_BASE_ADDR + 0x234)) +#define VICVectCntl14 (*(reg32_t *)(VIC_BASE_ADDR + 0x238)) +#define VICVectCntl15 (*(reg32_t *)(VIC_BASE_ADDR + 0x23C)) +#define VICVectCntl16 (*(reg32_t *)(VIC_BASE_ADDR + 0x240)) +#define VICVectCntl17 (*(reg32_t *)(VIC_BASE_ADDR + 0x244)) +#define VICVectCntl18 (*(reg32_t *)(VIC_BASE_ADDR + 0x248)) +#define VICVectCntl19 (*(reg32_t *)(VIC_BASE_ADDR + 0x24C)) +#define VICVectCntl20 (*(reg32_t *)(VIC_BASE_ADDR + 0x250)) +#define VICVectCntl21 (*(reg32_t *)(VIC_BASE_ADDR + 0x254)) +#define VICVectCntl22 (*(reg32_t *)(VIC_BASE_ADDR + 0x258)) +#define VICVectCntl23 (*(reg32_t *)(VIC_BASE_ADDR + 0x25C)) +#define VICVectCntl24 (*(reg32_t *)(VIC_BASE_ADDR + 0x260)) +#define VICVectCntl25 (*(reg32_t *)(VIC_BASE_ADDR + 0x264)) +#define VICVectCntl26 (*(reg32_t *)(VIC_BASE_ADDR + 0x268)) +#define VICVectCntl27 (*(reg32_t *)(VIC_BASE_ADDR + 0x26C)) +#define VICVectCntl28 (*(reg32_t *)(VIC_BASE_ADDR + 0x270)) +#define VICVectCntl29 (*(reg32_t *)(VIC_BASE_ADDR + 0x274)) +#define VICVectCntl30 (*(reg32_t *)(VIC_BASE_ADDR + 0x278)) +#define VICVectCntl31 (*(reg32_t *)(VIC_BASE_ADDR + 0x27C)) + +#define VICVectAddr (*(reg32_t *)(VIC_BASE_ADDR + 0xF00)) + + +/* Pin Connect Block */ +#define PINSEL_BASE_ADDR 0xE002C000 +#define PINSEL0 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x00)) +#define PINSEL1 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x04)) +#define PINSEL2 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x08)) +#define PINSEL3 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x0C)) +#define PINSEL4 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x10)) +#define PINSEL5 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x14)) +#define PINSEL6 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x18)) +#define PINSEL7 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x1C)) +#define PINSEL8 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x20)) +#define PINSEL9 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x24)) +#define PINSEL10 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x28)) + +#define PINSEL0_OFF 0x00 +#define PINSEL1_OFF 0x04 +#define PINSEL2_OFF 0x08 +#define PINSEL3_OFF 0x0C +#define PINSEL4_OFF 0x10 +#define PINSEL5_OFF 0x14 +#define PINSEL6_OFF 0x18 +#define PINSEL7_OFF 0x1C +#define PINSEL8_OFF 0x20 +#define PINSEL9_OFF 0x24 +#define PINSEL10_OFF 0x28 + +#define PINMODE0 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x40)) +#define PINMODE1 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x44)) +#define PINMODE2 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x48)) +#define PINMODE3 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x4C)) +#define PINMODE4 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x50)) +#define PINMODE5 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x54)) +#define PINMODE6 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x58)) +#define PINMODE7 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x5C)) +#define PINMODE8 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x60)) +#define PINMODE9 (*(reg32_t *)(PINSEL_BASE_ADDR + 0x64)) + +/* General Purpose Input/Output (GPIO) */ +#define GPIO_BASE_ADDR 0xE0028000 +#define IOPIN0 (*(reg32_t *)(GPIO_BASE_ADDR + 0x00)) +#define IOSET0 (*(reg32_t *)(GPIO_BASE_ADDR + 0x04)) +#define IODIR0 (*(reg32_t *)(GPIO_BASE_ADDR + 0x08)) +#define IOCLR0 (*(reg32_t *)(GPIO_BASE_ADDR + 0x0C)) +#define IOPIN1 (*(reg32_t *)(GPIO_BASE_ADDR + 0x10)) +#define IOSET1 (*(reg32_t *)(GPIO_BASE_ADDR + 0x14)) +#define IODIR1 (*(reg32_t *)(GPIO_BASE_ADDR + 0x18)) +#define IOCLR1 (*(reg32_t *)(GPIO_BASE_ADDR + 0x1C)) + +/* GPIO Interrupt Registers */ +#define IO0_INT_EN_R (*(reg32_t *)(GPIO_BASE_ADDR + 0x90)) +#define IO0_INT_EN_F (*(reg32_t *)(GPIO_BASE_ADDR + 0x94)) +#define IO0_INT_STAT_R (*(reg32_t *)(GPIO_BASE_ADDR + 0x84)) +#define IO0_INT_STAT_F (*(reg32_t *)(GPIO_BASE_ADDR + 0x88)) +#define IO0_INT_CLR (*(reg32_t *)(GPIO_BASE_ADDR + 0x8C)) + +#define IO2_INT_EN_R (*(reg32_t *)(GPIO_BASE_ADDR + 0xB0)) +#define IO2_INT_EN_F (*(reg32_t *)(GPIO_BASE_ADDR + 0xB4)) +#define IO2_INT_STAT_R (*(reg32_t *)(GPIO_BASE_ADDR + 0xA4)) +#define IO2_INT_STAT_F (*(reg32_t *)(GPIO_BASE_ADDR + 0xA8)) +#define IO2_INT_CLR (*(reg32_t *)(GPIO_BASE_ADDR + 0xAC)) + +#define IO_INT_STAT (*(reg32_t *)(GPIO_BASE_ADDR + 0x80)) + +#define PARTCFG_BASE_ADDR 0x3FFF8000 +#define PARTCFG (*(reg32_t *)(PARTCFG_BASE_ADDR + 0x00)) + +/* Fast I/O setup */ +#define FIO_BASE_ADDR 0x3FFFC000 +#define FIO0DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x00)) +#define FIO0MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x10)) +#define FIO0PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x14)) +#define FIO0SET (*(reg32_t *)(FIO_BASE_ADDR + 0x18)) +#define FIO0CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x1C)) + +#define FIO1DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x20)) +#define FIO1MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x30)) +#define FIO1PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x34)) +#define FIO1SET (*(reg32_t *)(FIO_BASE_ADDR + 0x38)) +#define FIO1CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x3C)) + +#define FIO2DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x40)) +#define FIO2MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x50)) +#define FIO2PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x54)) +#define FIO2SET (*(reg32_t *)(FIO_BASE_ADDR + 0x58)) +#define FIO2CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x5C)) + +#define FIO3DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x60)) +#define FIO3MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x70)) +#define FIO3PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x74)) +#define FIO3SET (*(reg32_t *)(FIO_BASE_ADDR + 0x78)) +#define FIO3CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x7C)) + +#define FIO4DIR (*(reg32_t *)(FIO_BASE_ADDR + 0x80)) +#define FIO4MASK (*(reg32_t *)(FIO_BASE_ADDR + 0x90)) +#define FIO4PIN (*(reg32_t *)(FIO_BASE_ADDR + 0x94)) +#define FIO4SET (*(reg32_t *)(FIO_BASE_ADDR + 0x98)) +#define FIO4CLR (*(reg32_t *)(FIO_BASE_ADDR + 0x9C)) + +/* FIOs can be accessed through WORD, HALF-WORD or BYTE. */ +#define FIO0DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x00)) +#define FIO1DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x20)) +#define FIO2DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x40)) +#define FIO3DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x60)) +#define FIO4DIR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x80)) + +#define FIO0DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x01)) +#define FIO1DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x21)) +#define FIO2DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x41)) +#define FIO3DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x61)) +#define FIO4DIR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x81)) + +#define FIO0DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x02)) +#define FIO1DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x22)) +#define FIO2DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x42)) +#define FIO3DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x62)) +#define FIO4DIR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x82)) + +#define FIO0DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x03)) +#define FIO1DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x23)) +#define FIO2DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x43)) +#define FIO3DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x63)) +#define FIO4DIR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x83)) + +#define FIO0DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x00)) +#define FIO1DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x20)) +#define FIO2DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x40)) +#define FIO3DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x60)) +#define FIO4DIRL (*(reg16_t *)(FIO_BASE_ADDR + 0x80)) + +#define FIO0DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x02)) +#define FIO1DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x22)) +#define FIO2DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x42)) +#define FIO3DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x62)) +#define FIO4DIRU (*(reg16_t *)(FIO_BASE_ADDR + 0x82)) + +#define FIO0MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x10)) +#define FIO1MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x30)) +#define FIO2MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x50)) +#define FIO3MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x70)) +#define FIO4MASK0 (*(reg8_t *)(FIO_BASE_ADDR + 0x90)) + +#define FIO0MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x11)) +#define FIO1MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x21)) +#define FIO2MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x51)) +#define FIO3MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x71)) +#define FIO4MASK1 (*(reg8_t *)(FIO_BASE_ADDR + 0x91)) + +#define FIO0MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x12)) +#define FIO1MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x32)) +#define FIO2MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x52)) +#define FIO3MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x72)) +#define FIO4MASK2 (*(reg8_t *)(FIO_BASE_ADDR + 0x92)) + +#define FIO0MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x13)) +#define FIO1MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x33)) +#define FIO2MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x53)) +#define FIO3MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x73)) +#define FIO4MASK3 (*(reg8_t *)(FIO_BASE_ADDR + 0x93)) + +#define FIO0MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x10)) +#define FIO1MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x30)) +#define FIO2MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x50)) +#define FIO3MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x70)) +#define FIO4MASKL (*(reg16_t *)(FIO_BASE_ADDR + 0x90)) + +#define FIO0MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x12)) +#define FIO1MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x32)) +#define FIO2MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x52)) +#define FIO3MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x72)) +#define FIO4MASKU (*(reg16_t *)(FIO_BASE_ADDR + 0x92)) + +#define FIO0PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x14)) +#define FIO1PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x34)) +#define FIO2PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x54)) +#define FIO3PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x74)) +#define FIO4PIN0 (*(reg8_t *)(FIO_BASE_ADDR + 0x94)) + +#define FIO0PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x15)) +#define FIO1PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x25)) +#define FIO2PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x55)) +#define FIO3PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x75)) +#define FIO4PIN1 (*(reg8_t *)(FIO_BASE_ADDR + 0x95)) + +#define FIO0PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x16)) +#define FIO1PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x36)) +#define FIO2PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x56)) +#define FIO3PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x76)) +#define FIO4PIN2 (*(reg8_t *)(FIO_BASE_ADDR + 0x96)) + +#define FIO0PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x17)) +#define FIO1PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x37)) +#define FIO2PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x57)) +#define FIO3PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x77)) +#define FIO4PIN3 (*(reg8_t *)(FIO_BASE_ADDR + 0x97)) + +#define FIO0PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x14)) +#define FIO1PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x34)) +#define FIO2PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x54)) +#define FIO3PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x74)) +#define FIO4PINL (*(reg16_t *)(FIO_BASE_ADDR + 0x94)) + +#define FIO0PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x16)) +#define FIO1PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x36)) +#define FIO2PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x56)) +#define FIO3PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x76)) +#define FIO4PINU (*(reg16_t *)(FIO_BASE_ADDR + 0x96)) + +#define FIO0SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x18)) +#define FIO1SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x38)) +#define FIO2SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x58)) +#define FIO3SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x78)) +#define FIO4SET0 (*(reg8_t *)(FIO_BASE_ADDR + 0x98)) + +#define FIO0SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x19)) +#define FIO1SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x29)) +#define FIO2SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x59)) +#define FIO3SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x79)) +#define FIO4SET1 (*(reg8_t *)(FIO_BASE_ADDR + 0x99)) + +#define FIO0SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x1A)) +#define FIO1SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x3A)) +#define FIO2SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x5A)) +#define FIO3SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x7A)) +#define FIO4SET2 (*(reg8_t *)(FIO_BASE_ADDR + 0x9A)) + +#define FIO0SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x1B)) +#define FIO1SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x3B)) +#define FIO2SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x5B)) +#define FIO3SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x7B)) +#define FIO4SET3 (*(reg8_t *)(FIO_BASE_ADDR + 0x9B)) + +#define FIO0SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x18)) +#define FIO1SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x38)) +#define FIO2SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x58)) +#define FIO3SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x78)) +#define FIO4SETL (*(reg16_t *)(FIO_BASE_ADDR + 0x98)) + +#define FIO0SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x1A)) +#define FIO1SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x3A)) +#define FIO2SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x5A)) +#define FIO3SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x7A)) +#define FIO4SETU (*(reg16_t *)(FIO_BASE_ADDR + 0x9A)) + +#define FIO0CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x1C)) +#define FIO1CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x3C)) +#define FIO2CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x5C)) +#define FIO3CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x7C)) +#define FIO4CLR0 (*(reg8_t *)(FIO_BASE_ADDR + 0x9C)) + +#define FIO0CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x1D)) +#define FIO1CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x2D)) +#define FIO2CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x5D)) +#define FIO3CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x7D)) +#define FIO4CLR1 (*(reg8_t *)(FIO_BASE_ADDR + 0x9D)) + +#define FIO0CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x1E)) +#define FIO1CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x3E)) +#define FIO2CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x5E)) +#define FIO3CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x7E)) +#define FIO4CLR2 (*(reg8_t *)(FIO_BASE_ADDR + 0x9E)) + +#define FIO0CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x1F)) +#define FIO1CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x3F)) +#define FIO2CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x5F)) +#define FIO3CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x7F)) +#define FIO4CLR3 (*(reg8_t *)(FIO_BASE_ADDR + 0x9F)) + +#define FIO0CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x1C)) +#define FIO1CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x3C)) +#define FIO2CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x5C)) +#define FIO3CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x7C)) +#define FIO4CLRL (*(reg16_t *)(FIO_BASE_ADDR + 0x9C)) + +#define FIO0CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x1E)) +#define FIO1CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x3E)) +#define FIO2CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x5E)) +#define FIO3CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x7E)) +#define FIO4CLRU (*(reg16_t *)(FIO_BASE_ADDR + 0x9E)) + + +/* System Control Block(SCB) modules include Memory Accelerator Module, +Phase Locked Loop, VPB divider, Power Control, External Interrupt, +Reset, and Code Security/Debugging */ +#define SCB_BASE_ADDR 0xE01FC000 + +/* Memory Accelerator Module (MAM) */ +#define MAMCR (*(reg32_t *)(SCB_BASE_ADDR + 0x000)) +#define MAMTIM (*(reg32_t *)(SCB_BASE_ADDR + 0x004)) +#define MEMMAP (*(reg32_t *)(SCB_BASE_ADDR + 0x040)) + +/* Phase Locked Loop (PLL) */ +#define PLLCON (*(reg32_t *)(SCB_BASE_ADDR + 0x080)) +#define PLLCFG (*(reg32_t *)(SCB_BASE_ADDR + 0x084)) +#define PLLSTAT (*(reg32_t *)(SCB_BASE_ADDR + 0x088)) +#define PLLFEED (*(reg32_t *)(SCB_BASE_ADDR + 0x08C)) + +/* Power Control */ +#define PCON (*(reg32_t *)(SCB_BASE_ADDR + 0x0C0)) +#define PCONP (*(reg32_t *)(SCB_BASE_ADDR + 0x0C4)) +#define PCONP_PCI2C0 7 +#define PCONP_PCI2C1 19 +#define PCONP_PCI2C2 26 + + +/* Clock Divider */ +// #define APBDIV (*(reg32_t *)(SCB_BASE_ADDR + 0x100)) +#define CCLKCFG (*(reg32_t *)(SCB_BASE_ADDR + 0x104)) +#define USBCLKCFG (*(reg32_t *)(SCB_BASE_ADDR + 0x108)) +#define CLKSRCSEL (*(reg32_t *)(SCB_BASE_ADDR + 0x10C)) +#define PCLKSEL0 (*(reg32_t *)(SCB_BASE_ADDR + 0x1A8)) +#define PCLKSEL1 (*(reg32_t *)(SCB_BASE_ADDR + 0x1AC)) + +#define CCLKCFG_OFF 0x104 +#define USBCLKCFG_OFF 0x108 +#define CLKSRCSEL_OFF 0x10C +#define PCLKSEL0_OFF 0x1A8 +#define PCLKSEL1_OFF 0x1AC + + +/* External Interrupts */ +#define EXTINT (*(reg32_t *)(SCB_BASE_ADDR + 0x140)) +#define INTWAKE (*(reg32_t *)(SCB_BASE_ADDR + 0x144)) +#define EXTMODE (*(reg32_t *)(SCB_BASE_ADDR + 0x148)) +#define EXTPOLAR (*(reg32_t *)(SCB_BASE_ADDR + 0x14C)) + +/* Reset, reset source identification */ +#define RSIR (*(reg32_t *)(SCB_BASE_ADDR + 0x180)) + +/* RSID, code security protection */ +#define CSPR (*(reg32_t *)(SCB_BASE_ADDR + 0x184)) + +/* AHB configuration */ +#define AHBCFG1 (*(reg32_t *)(SCB_BASE_ADDR + 0x188)) +#define AHBCFG2 (*(reg32_t *)(SCB_BASE_ADDR + 0x18C)) + +/* System Controls and Status */ +#define SCS (*(reg32_t *)(SCB_BASE_ADDR + 0x1A0)) + +/* MPMC(EMC) registers, note: all the external memory controller(EMC) registers +are for LPC24xx only. */ +#define STATIC_MEM0_BASE 0x80000000 +#define STATIC_MEM1_BASE 0x81000000 +#define STATIC_MEM2_BASE 0x82000000 +#define STATIC_MEM3_BASE 0x83000000 + +#define DYNAMIC_MEM0_BASE 0xA0000000 +#define DYNAMIC_MEM1_BASE 0xB0000000 +#define DYNAMIC_MEM2_BASE 0xC0000000 +#define DYNAMIC_MEM3_BASE 0xD0000000 + +/* External Memory Controller (EMC) */ +#define EMC_BASE_ADDR 0xFFE08000 +#define EMC_CTRL (*(reg32_t *)(EMC_BASE_ADDR + 0x000)) +#define EMC_STAT (*(reg32_t *)(EMC_BASE_ADDR + 0x004)) +#define EMC_CONFIG (*(reg32_t *)(EMC_BASE_ADDR + 0x008)) + +/* Dynamic RAM access registers */ +#define EMC_DYN_CTRL (*(reg32_t *)(EMC_BASE_ADDR + 0x020)) +#define EMC_DYN_RFSH (*(reg32_t *)(EMC_BASE_ADDR + 0x024)) +#define EMC_DYN_RD_CFG (*(reg32_t *)(EMC_BASE_ADDR + 0x028)) +#define EMC_DYN_RP (*(reg32_t *)(EMC_BASE_ADDR + 0x030)) +#define EMC_DYN_RAS (*(reg32_t *)(EMC_BASE_ADDR + 0x034)) +#define EMC_DYN_SREX (*(reg32_t *)(EMC_BASE_ADDR + 0x038)) +#define EMC_DYN_APR (*(reg32_t *)(EMC_BASE_ADDR + 0x03C)) +#define EMC_DYN_DAL (*(reg32_t *)(EMC_BASE_ADDR + 0x040)) +#define EMC_DYN_WR (*(reg32_t *)(EMC_BASE_ADDR + 0x044)) +#define EMC_DYN_RC (*(reg32_t *)(EMC_BASE_ADDR + 0x048)) +#define EMC_DYN_RFC (*(reg32_t *)(EMC_BASE_ADDR + 0x04C)) +#define EMC_DYN_XSR (*(reg32_t *)(EMC_BASE_ADDR + 0x050)) +#define EMC_DYN_RRD (*(reg32_t *)(EMC_BASE_ADDR + 0x054)) +#define EMC_DYN_MRD (*(reg32_t *)(EMC_BASE_ADDR + 0x058)) + +#define EMC_DYN_CFG0 (*(reg32_t *)(EMC_BASE_ADDR + 0x100)) +#define EMC_DYN_RASCAS0 (*(reg32_t *)(EMC_BASE_ADDR + 0x104)) +#define EMC_DYN_CFG1 (*(reg32_t *)(EMC_BASE_ADDR + 0x140)) +#define EMC_DYN_RASCAS1 (*(reg32_t *)(EMC_BASE_ADDR + 0x144)) +#define EMC_DYN_CFG2 (*(reg32_t *)(EMC_BASE_ADDR + 0x160)) +#define EMC_DYN_RASCAS2 (*(reg32_t *)(EMC_BASE_ADDR + 0x164)) +#define EMC_DYN_CFG3 (*(reg32_t *)(EMC_BASE_ADDR + 0x180)) +#define EMC_DYN_RASCAS3 (*(reg32_t *)(EMC_BASE_ADDR + 0x184)) + +/* static RAM access registers */ +#define EMC_STA_CFG0 (*(reg32_t *)(EMC_BASE_ADDR + 0x200)) +#define EMC_STA_WAITWEN0 (*(reg32_t *)(EMC_BASE_ADDR + 0x204)) +#define EMC_STA_WAITOEN0 (*(reg32_t *)(EMC_BASE_ADDR + 0x208)) +#define EMC_STA_WAITRD0 (*(reg32_t *)(EMC_BASE_ADDR + 0x20C)) +#define EMC_STA_WAITPAGE0 (*(reg32_t *)(EMC_BASE_ADDR + 0x210)) +#define EMC_STA_WAITWR0 (*(reg32_t *)(EMC_BASE_ADDR + 0x214)) +#define EMC_STA_WAITTURN0 (*(reg32_t *)(EMC_BASE_ADDR + 0x218)) + +#define EMC_STA_CFG1 (*(reg32_t *)(EMC_BASE_ADDR + 0x220)) +#define EMC_STA_WAITWEN1 (*(reg32_t *)(EMC_BASE_ADDR + 0x224)) +#define EMC_STA_WAITOEN1 (*(reg32_t *)(EMC_BASE_ADDR + 0x228)) +#define EMC_STA_WAITRD1 (*(reg32_t *)(EMC_BASE_ADDR + 0x22C)) +#define EMC_STA_WAITPAGE1 (*(reg32_t *)(EMC_BASE_ADDR + 0x230)) +#define EMC_STA_WAITWR1 (*(reg32_t *)(EMC_BASE_ADDR + 0x234)) +#define EMC_STA_WAITTURN1 (*(reg32_t *)(EMC_BASE_ADDR + 0x238)) + +#define EMC_STA_CFG2 (*(reg32_t *)(EMC_BASE_ADDR + 0x240)) +#define EMC_STA_WAITWEN2 (*(reg32_t *)(EMC_BASE_ADDR + 0x244)) +#define EMC_STA_WAITOEN2 (*(reg32_t *)(EMC_BASE_ADDR + 0x248)) +#define EMC_STA_WAITRD2 (*(reg32_t *)(EMC_BASE_ADDR + 0x24C)) +#define EMC_STA_WAITPAGE2 (*(reg32_t *)(EMC_BASE_ADDR + 0x250)) +#define EMC_STA_WAITWR2 (*(reg32_t *)(EMC_BASE_ADDR + 0x254)) +#define EMC_STA_WAITTURN2 (*(reg32_t *)(EMC_BASE_ADDR + 0x258)) + +#define EMC_STA_CFG3 (*(reg32_t *)(EMC_BASE_ADDR + 0x260)) +#define EMC_STA_WAITWEN3 (*(reg32_t *)(EMC_BASE_ADDR + 0x264)) +#define EMC_STA_WAITOEN3 (*(reg32_t *)(EMC_BASE_ADDR + 0x268)) +#define EMC_STA_WAITRD3 (*(reg32_t *)(EMC_BASE_ADDR + 0x26C)) +#define EMC_STA_WAITPAGE3 (*(reg32_t *)(EMC_BASE_ADDR + 0x270)) +#define EMC_STA_WAITWR3 (*(reg32_t *)(EMC_BASE_ADDR + 0x274)) +#define EMC_STA_WAITTURN3 (*(reg32_t *)(EMC_BASE_ADDR + 0x278)) + +#define EMC_STA_EXT_WAIT (*(reg32_t *)(EMC_BASE_ADDR + 0x880)) + + +/* Timer 0 */ +#define TMR0_BASE_ADDR 0xE0004000 +#define T0IR (*(reg32_t *)(TMR0_BASE_ADDR + 0x00)) +#define T0TCR (*(reg32_t *)(TMR0_BASE_ADDR + 0x04)) +#define T0TC (*(reg32_t *)(TMR0_BASE_ADDR + 0x08)) +#define T0PR (*(reg32_t *)(TMR0_BASE_ADDR + 0x0C)) +#define T0PC (*(reg32_t *)(TMR0_BASE_ADDR + 0x10)) +#define T0MCR (*(reg32_t *)(TMR0_BASE_ADDR + 0x14)) +#define T0MR0 (*(reg32_t *)(TMR0_BASE_ADDR + 0x18)) +#define T0MR1 (*(reg32_t *)(TMR0_BASE_ADDR + 0x1C)) +#define T0MR2 (*(reg32_t *)(TMR0_BASE_ADDR + 0x20)) +#define T0MR3 (*(reg32_t *)(TMR0_BASE_ADDR + 0x24)) +#define T0CCR (*(reg32_t *)(TMR0_BASE_ADDR + 0x28)) +#define T0CR0 (*(reg32_t *)(TMR0_BASE_ADDR + 0x2C)) +#define T0CR1 (*(reg32_t *)(TMR0_BASE_ADDR + 0x30)) +#define T0CR2 (*(reg32_t *)(TMR0_BASE_ADDR + 0x34)) +#define T0CR3 (*(reg32_t *)(TMR0_BASE_ADDR + 0x38)) +#define T0EMR (*(reg32_t *)(TMR0_BASE_ADDR + 0x3C)) +#define T0CTCR (*(reg32_t *)(TMR0_BASE_ADDR + 0x70)) + +/* Timer 1 */ +#define TMR1_BASE_ADDR 0xE0008000 +#define T1IR (*(reg32_t *)(TMR1_BASE_ADDR + 0x00)) +#define T1TCR (*(reg32_t *)(TMR1_BASE_ADDR + 0x04)) +#define T1TC (*(reg32_t *)(TMR1_BASE_ADDR + 0x08)) +#define T1PR (*(reg32_t *)(TMR1_BASE_ADDR + 0x0C)) +#define T1PC (*(reg32_t *)(TMR1_BASE_ADDR + 0x10)) +#define T1MCR (*(reg32_t *)(TMR1_BASE_ADDR + 0x14)) +#define T1MR0 (*(reg32_t *)(TMR1_BASE_ADDR + 0x18)) +#define T1MR1 (*(reg32_t *)(TMR1_BASE_ADDR + 0x1C)) +#define T1MR2 (*(reg32_t *)(TMR1_BASE_ADDR + 0x20)) +#define T1MR3 (*(reg32_t *)(TMR1_BASE_ADDR + 0x24)) +#define T1CCR (*(reg32_t *)(TMR1_BASE_ADDR + 0x28)) +#define T1CR0 (*(reg32_t *)(TMR1_BASE_ADDR + 0x2C)) +#define T1CR1 (*(reg32_t *)(TMR1_BASE_ADDR + 0x30)) +#define T1CR2 (*(reg32_t *)(TMR1_BASE_ADDR + 0x34)) +#define T1CR3 (*(reg32_t *)(TMR1_BASE_ADDR + 0x38)) +#define T1EMR (*(reg32_t *)(TMR1_BASE_ADDR + 0x3C)) +#define T1CTCR (*(reg32_t *)(TMR1_BASE_ADDR + 0x70)) + +/* Timer 2 */ +#define TMR2_BASE_ADDR 0xE0070000 +#define T2IR (*(reg32_t *)(TMR2_BASE_ADDR + 0x00)) +#define T2TCR (*(reg32_t *)(TMR2_BASE_ADDR + 0x04)) +#define T2TC (*(reg32_t *)(TMR2_BASE_ADDR + 0x08)) +#define T2PR (*(reg32_t *)(TMR2_BASE_ADDR + 0x0C)) +#define T2PC (*(reg32_t *)(TMR2_BASE_ADDR + 0x10)) +#define T2MCR (*(reg32_t *)(TMR2_BASE_ADDR + 0x14)) +#define T2MR0 (*(reg32_t *)(TMR2_BASE_ADDR + 0x18)) +#define T2MR1 (*(reg32_t *)(TMR2_BASE_ADDR + 0x1C)) +#define T2MR2 (*(reg32_t *)(TMR2_BASE_ADDR + 0x20)) +#define T2MR3 (*(reg32_t *)(TMR2_BASE_ADDR + 0x24)) +#define T2CCR (*(reg32_t *)(TMR2_BASE_ADDR + 0x28)) +#define T2CR0 (*(reg32_t *)(TMR2_BASE_ADDR + 0x2C)) +#define T2CR1 (*(reg32_t *)(TMR2_BASE_ADDR + 0x30)) +#define T2CR2 (*(reg32_t *)(TMR2_BASE_ADDR + 0x34)) +#define T2CR3 (*(reg32_t *)(TMR2_BASE_ADDR + 0x38)) +#define T2EMR (*(reg32_t *)(TMR2_BASE_ADDR + 0x3C)) +#define T2CTCR (*(reg32_t *)(TMR2_BASE_ADDR + 0x70)) + +/* Timer 3 */ +#define TMR3_BASE_ADDR 0xE0074000 +#define T3IR (*(reg32_t *)(TMR3_BASE_ADDR + 0x00)) +#define T3TCR (*(reg32_t *)(TMR3_BASE_ADDR + 0x04)) +#define T3TC (*(reg32_t *)(TMR3_BASE_ADDR + 0x08)) +#define T3PR (*(reg32_t *)(TMR3_BASE_ADDR + 0x0C)) +#define T3PC (*(reg32_t *)(TMR3_BASE_ADDR + 0x10)) +#define T3MCR (*(reg32_t *)(TMR3_BASE_ADDR + 0x14)) +#define T3MR0 (*(reg32_t *)(TMR3_BASE_ADDR + 0x18)) +#define T3MR1 (*(reg32_t *)(TMR3_BASE_ADDR + 0x1C)) +#define T3MR2 (*(reg32_t *)(TMR3_BASE_ADDR + 0x20)) +#define T3MR3 (*(reg32_t *)(TMR3_BASE_ADDR + 0x24)) +#define T3CCR (*(reg32_t *)(TMR3_BASE_ADDR + 0x28)) +#define T3CR0 (*(reg32_t *)(TMR3_BASE_ADDR + 0x2C)) +#define T3CR1 (*(reg32_t *)(TMR3_BASE_ADDR + 0x30)) +#define T3CR2 (*(reg32_t *)(TMR3_BASE_ADDR + 0x34)) +#define T3CR3 (*(reg32_t *)(TMR3_BASE_ADDR + 0x38)) +#define T3EMR (*(reg32_t *)(TMR3_BASE_ADDR + 0x3C)) +#define T3CTCR (*(reg32_t *)(TMR3_BASE_ADDR + 0x70)) + + +/* Pulse Width Modulator (PWM) */ +#define PWM0_BASE_ADDR 0xE0014000 +#define PWM0IR (*(reg32_t *)(PWM0_BASE_ADDR + 0x00)) +#define PWM0TCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x04)) +#define PWM0TC (*(reg32_t *)(PWM0_BASE_ADDR + 0x08)) +#define PWM0PR (*(reg32_t *)(PWM0_BASE_ADDR + 0x0C)) +#define PWM0PC (*(reg32_t *)(PWM0_BASE_ADDR + 0x10)) +#define PWM0MCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x14)) +#define PWM0MR0 (*(reg32_t *)(PWM0_BASE_ADDR + 0x18)) +#define PWM0MR1 (*(reg32_t *)(PWM0_BASE_ADDR + 0x1C)) +#define PWM0MR2 (*(reg32_t *)(PWM0_BASE_ADDR + 0x20)) +#define PWM0MR3 (*(reg32_t *)(PWM0_BASE_ADDR + 0x24)) +#define PWM0CCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x28)) +#define PWM0CR0 (*(reg32_t *)(PWM0_BASE_ADDR + 0x2C)) +#define PWM0CR1 (*(reg32_t *)(PWM0_BASE_ADDR + 0x30)) +#define PWM0CR2 (*(reg32_t *)(PWM0_BASE_ADDR + 0x34)) +#define PWM0CR3 (*(reg32_t *)(PWM0_BASE_ADDR + 0x38)) +#define PWM0EMR (*(reg32_t *)(PWM0_BASE_ADDR + 0x3C)) +#define PWM0MR4 (*(reg32_t *)(PWM0_BASE_ADDR + 0x40)) +#define PWM0MR5 (*(reg32_t *)(PWM0_BASE_ADDR + 0x44)) +#define PWM0MR6 (*(reg32_t *)(PWM0_BASE_ADDR + 0x48)) +#define PWM0PCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x4C)) +#define PWM0LER (*(reg32_t *)(PWM0_BASE_ADDR + 0x50)) +#define PWM0CTCR (*(reg32_t *)(PWM0_BASE_ADDR + 0x70)) + +#define PWM1_BASE_ADDR 0xE0018000 +#define PWM1IR (*(reg32_t *)(PWM1_BASE_ADDR + 0x00)) +#define PWM1TCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x04)) +#define PWM1TC (*(reg32_t *)(PWM1_BASE_ADDR + 0x08)) +#define PWM1PR (*(reg32_t *)(PWM1_BASE_ADDR + 0x0C)) +#define PWM1PC (*(reg32_t *)(PWM1_BASE_ADDR + 0x10)) +#define PWM1MCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x14)) +#define PWM1MR0 (*(reg32_t *)(PWM1_BASE_ADDR + 0x18)) +#define PWM1MR1 (*(reg32_t *)(PWM1_BASE_ADDR + 0x1C)) +#define PWM1MR2 (*(reg32_t *)(PWM1_BASE_ADDR + 0x20)) +#define PWM1MR3 (*(reg32_t *)(PWM1_BASE_ADDR + 0x24)) +#define PWM1CCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x28)) +#define PWM1CR0 (*(reg32_t *)(PWM1_BASE_ADDR + 0x2C)) +#define PWM1CR1 (*(reg32_t *)(PWM1_BASE_ADDR + 0x30)) +#define PWM1CR2 (*(reg32_t *)(PWM1_BASE_ADDR + 0x34)) +#define PWM1CR3 (*(reg32_t *)(PWM1_BASE_ADDR + 0x38)) +#define PWM1EMR (*(reg32_t *)(PWM1_BASE_ADDR + 0x3C)) +#define PWM1MR4 (*(reg32_t *)(PWM1_BASE_ADDR + 0x40)) +#define PWM1MR5 (*(reg32_t *)(PWM1_BASE_ADDR + 0x44)) +#define PWM1MR6 (*(reg32_t *)(PWM1_BASE_ADDR + 0x48)) +#define PWM1PCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x4C)) +#define PWM1LER (*(reg32_t *)(PWM1_BASE_ADDR + 0x50)) +#define PWM1CTCR (*(reg32_t *)(PWM1_BASE_ADDR + 0x70)) + + +/* Universal Asynchronous Receiver Transmitter 0 (UART0) */ +#define UART0_BASE_ADDR 0xE000C000 +#define U0RBR (*(reg32_t *)(UART0_BASE_ADDR + 0x00)) +#define U0THR (*(reg32_t *)(UART0_BASE_ADDR + 0x00)) +#define U0DLL (*(reg32_t *)(UART0_BASE_ADDR + 0x00)) +#define U0DLM (*(reg32_t *)(UART0_BASE_ADDR + 0x04)) +#define U0IER (*(reg32_t *)(UART0_BASE_ADDR + 0x04)) +#define U0IIR (*(reg32_t *)(UART0_BASE_ADDR + 0x08)) +#define U0FCR (*(reg32_t *)(UART0_BASE_ADDR + 0x08)) +#define U0LCR (*(reg32_t *)(UART0_BASE_ADDR + 0x0C)) +#define U0LSR (*(reg32_t *)(UART0_BASE_ADDR + 0x14)) +#define U0SCR (*(reg32_t *)(UART0_BASE_ADDR + 0x1C)) +#define U0ACR (*(reg32_t *)(UART0_BASE_ADDR + 0x20)) +#define U0ICR (*(reg32_t *)(UART0_BASE_ADDR + 0x24)) +#define U0FDR (*(reg32_t *)(UART0_BASE_ADDR + 0x28)) +#define U0TER (*(reg32_t *)(UART0_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 1 (UART1) */ +#define UART1_BASE_ADDR 0xE0010000 +#define U1RBR (*(reg32_t *)(UART1_BASE_ADDR + 0x00)) +#define U1THR (*(reg32_t *)(UART1_BASE_ADDR + 0x00)) +#define U1DLL (*(reg32_t *)(UART1_BASE_ADDR + 0x00)) +#define U1DLM (*(reg32_t *)(UART1_BASE_ADDR + 0x04)) +#define U1IER (*(reg32_t *)(UART1_BASE_ADDR + 0x04)) +#define U1IIR (*(reg32_t *)(UART1_BASE_ADDR + 0x08)) +#define U1FCR (*(reg32_t *)(UART1_BASE_ADDR + 0x08)) +#define U1LCR (*(reg32_t *)(UART1_BASE_ADDR + 0x0C)) +#define U1MCR (*(reg32_t *)(UART1_BASE_ADDR + 0x10)) +#define U1LSR (*(reg32_t *)(UART1_BASE_ADDR + 0x14)) +#define U1MSR (*(reg32_t *)(UART1_BASE_ADDR + 0x18)) +#define U1SCR (*(reg32_t *)(UART1_BASE_ADDR + 0x1C)) +#define U1ACR (*(reg32_t *)(UART1_BASE_ADDR + 0x20)) +#define U1FDR (*(reg32_t *)(UART1_BASE_ADDR + 0x28)) +#define U1TER (*(reg32_t *)(UART1_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 2 (UART2) */ +#define UART2_BASE_ADDR 0xE0078000 +#define U2RBR (*(reg32_t *)(UART2_BASE_ADDR + 0x00)) +#define U2THR (*(reg32_t *)(UART2_BASE_ADDR + 0x00)) +#define U2DLL (*(reg32_t *)(UART2_BASE_ADDR + 0x00)) +#define U2DLM (*(reg32_t *)(UART2_BASE_ADDR + 0x04)) +#define U2IER (*(reg32_t *)(UART2_BASE_ADDR + 0x04)) +#define U2IIR (*(reg32_t *)(UART2_BASE_ADDR + 0x08)) +#define U2FCR (*(reg32_t *)(UART2_BASE_ADDR + 0x08)) +#define U2LCR (*(reg32_t *)(UART2_BASE_ADDR + 0x0C)) +#define U2LSR (*(reg32_t *)(UART2_BASE_ADDR + 0x14)) +#define U2SCR (*(reg32_t *)(UART2_BASE_ADDR + 0x1C)) +#define U2ACR (*(reg32_t *)(UART2_BASE_ADDR + 0x20)) +#define U2ICR (*(reg32_t *)(UART2_BASE_ADDR + 0x24)) +#define U2FDR (*(reg32_t *)(UART2_BASE_ADDR + 0x28)) +#define U2TER (*(reg32_t *)(UART2_BASE_ADDR + 0x30)) + +/* Universal Asynchronous Receiver Transmitter 3 (UART3) */ +#define UART3_BASE_ADDR 0xE007C000 +#define U3RBR (*(reg32_t *)(UART3_BASE_ADDR + 0x00)) +#define U3THR (*(reg32_t *)(UART3_BASE_ADDR + 0x00)) +#define U3DLL (*(reg32_t *)(UART3_BASE_ADDR + 0x00)) +#define U3DLM (*(reg32_t *)(UART3_BASE_ADDR + 0x04)) +#define U3IER (*(reg32_t *)(UART3_BASE_ADDR + 0x04)) +#define U3IIR (*(reg32_t *)(UART3_BASE_ADDR + 0x08)) +#define U3FCR (*(reg32_t *)(UART3_BASE_ADDR + 0x08)) +#define U3LCR (*(reg32_t *)(UART3_BASE_ADDR + 0x0C)) +#define U3LSR (*(reg32_t *)(UART3_BASE_ADDR + 0x14)) +#define U3SCR (*(reg32_t *)(UART3_BASE_ADDR + 0x1C)) +#define U3ACR (*(reg32_t *)(UART3_BASE_ADDR + 0x20)) +#define U3ICR (*(reg32_t *)(UART3_BASE_ADDR + 0x24)) +#define U3FDR (*(reg32_t *)(UART3_BASE_ADDR + 0x28)) +#define U3TER (*(reg32_t *)(UART3_BASE_ADDR + 0x30)) + +/* I2C Interface 0 */ +#define I2C0_BASE_ADDR 0xE001C000 +#define I20CONSET (*(reg32_t *)(I2C0_BASE_ADDR + 0x00)) +#define I20STAT (*(reg32_t *)(I2C0_BASE_ADDR + 0x04)) +#define I20DAT (*(reg32_t *)(I2C0_BASE_ADDR + 0x08)) +#define I20ADR (*(reg32_t *)(I2C0_BASE_ADDR + 0x0C)) +#define I20SCLH (*(reg32_t *)(I2C0_BASE_ADDR + 0x10)) +#define I20SCLL (*(reg32_t *)(I2C0_BASE_ADDR + 0x14)) +#define I20CONCLR (*(reg32_t *)(I2C0_BASE_ADDR + 0x18)) + +/* I2C Interface 1 */ +#define I2C1_BASE_ADDR 0xE005C000 +#define I21CONSET (*(reg32_t *)(I2C1_BASE_ADDR + 0x00)) +#define I21STAT (*(reg32_t *)(I2C1_BASE_ADDR + 0x04)) +#define I21DAT (*(reg32_t *)(I2C1_BASE_ADDR + 0x08)) +#define I21ADR (*(reg32_t *)(I2C1_BASE_ADDR + 0x0C)) +#define I21SCLH (*(reg32_t *)(I2C1_BASE_ADDR + 0x10)) +#define I21SCLL (*(reg32_t *)(I2C1_BASE_ADDR + 0x14)) +#define I21CONCLR (*(reg32_t *)(I2C1_BASE_ADDR + 0x18)) + +/* I2C Interface 2 */ +#define I2C2_BASE_ADDR 0xE0080000 +#define I22CONSET (*(reg32_t *)(I2C2_BASE_ADDR + 0x00)) +#define I22STAT (*(reg32_t *)(I2C2_BASE_ADDR + 0x04)) +#define I22DAT (*(reg32_t *)(I2C2_BASE_ADDR + 0x08)) +#define I22ADR (*(reg32_t *)(I2C2_BASE_ADDR + 0x0C)) +#define I22SCLH (*(reg32_t *)(I2C2_BASE_ADDR + 0x10)) +#define I22SCLL (*(reg32_t *)(I2C2_BASE_ADDR + 0x14)) +#define I22CONCLR (*(reg32_t *)(I2C2_BASE_ADDR + 0x18)) + +/* I2C offesets */ +#define I2C_CONSET_OFF 0x00 +#define I2C_STAT_OFF 0x04 +#define I2C_DAT_OFF 0x08 +#define I2C_ADR_OFF 0x0C +#define I2C_SCLH_OFF 0x10 +#define I2C_SCLL_OFF 0x14 +#define I2C_CONCLR_OFF 0x18 + +/* I2C register definition Clear */ +#define I2CON_I2ENC 6 // I2C interface Disable bit +#define I2CON_STAC 5 // START flag Clear bit +#define I2CON_SIC 3 // I2C interrupt Clear bit +#define I2CON_AAC 2 // Assert acknowledge Clear bit + +/* I2C register definition Set */ +#define I2CON_I2EN 6 // I2C interface enable +#define I2CON_STA 5 // START flag Clear bit +#define I2CON_STO 4 // STOP flag Clear bit +#define I2CON_SI 3 // I2C interrupt Clear bit +#define I2CON_AA 2 // Assert acknowledge Clear bit + +/* I2C Status codes */ +#define I2C_STAT_ERROR 0x00 +#define I2C_STAT_UNKNOW 0xF8 +#define I2C_STAT_SEND 0x08 +#define I2C_STAT_RESEND 0x10 +#define I2C_STAT_SLAW_ACK 0x18 +#define I2C_STAT_SLAW_NACK 0x20 +#define I2C_STAT_SLAR_ACK 0x40 +#define I2C_STAT_SLAR_NACK 0x48 +#define I2C_STAT_DATA_ACK 0x28 +#define I2C_STAT_DATA_NACK 0x30 +#define I2C_STAT_RDATA_ACK 0x50 +#define I2C_STAT_RDATA_NACK 0x58 +#define I2C_STAT_ARB_LOST 0x38 + +#define I2C0_PCLK_MASK 0xC000 +#define I2C0_PCLK_DIV8 0xC000 +#define I2C0_PCLK_DIV4 0x4000 +#define I2C1_PCLK_MASK 0x00C0 +#define I2C1_PCLK_DIV8 0x00C0 +#define I2C1_PCLK_DIV4 0x0040 +#define I2C2_PCLK_MASK 0x300000 +#define I2C2_PCLK_DIV8 0x300000 +#define I2C2_PCLK_DIV4 0x100000 + +/* I2C pins defines */ +#define I2C0_PINSEL_MASK 0x3C00000 +#define I2C0_PINSEL 0x1400000 +#define I2C1_PINSEL_MASK 0x000000F +#define I2C1_PINSEL 0x000000F +#define I2C2_PINSEL_MASK 0x0F00000 +#define I2C2_PINSEL 0x0A00000 + +/* SPI0 (Serial Peripheral Interface 0) */ +#define SPI0_BASE_ADDR 0xE0020000 +#define S0SPCR (*(reg32_t *)(SPI0_BASE_ADDR + 0x00)) +#define S0SPSR (*(reg32_t *)(SPI0_BASE_ADDR + 0x04)) +#define S0SPDR (*(reg32_t *)(SPI0_BASE_ADDR + 0x08)) +#define S0SPCCR (*(reg32_t *)(SPI0_BASE_ADDR + 0x0C)) +#define S0SPINT (*(reg32_t *)(SPI0_BASE_ADDR + 0x1C)) + +/* SSP0 Controller */ +#define SSP0_BASE_ADDR 0xE0068000 +#define SSP0CR0 (*(reg32_t *)(SSP0_BASE_ADDR + 0x00)) +#define SSP0CR1 (*(reg32_t *)(SSP0_BASE_ADDR + 0x04)) +#define SSP0DR (*(reg32_t *)(SSP0_BASE_ADDR + 0x08)) +#define SSP0SR (*(reg32_t *)(SSP0_BASE_ADDR + 0x0C)) +#define SSP0CPSR (*(reg32_t *)(SSP0_BASE_ADDR + 0x10)) +#define SSP0IMSC (*(reg32_t *)(SSP0_BASE_ADDR + 0x14)) +#define SSP0RIS (*(reg32_t *)(SSP0_BASE_ADDR + 0x18)) +#define SSP0MIS (*(reg32_t *)(SSP0_BASE_ADDR + 0x1C)) +#define SSP0ICR (*(reg32_t *)(SSP0_BASE_ADDR + 0x20)) +#define SSP0DMACR (*(reg32_t *)(SSP0_BASE_ADDR + 0x24)) + +/* SSP1 Controller */ +#define SSP1_BASE_ADDR 0xE0030000 +#define SSP1CR0 (*(reg32_t *)(SSP1_BASE_ADDR + 0x00)) +#define SSP1CR1 (*(reg32_t *)(SSP1_BASE_ADDR + 0x04)) +#define SSP1DR (*(reg32_t *)(SSP1_BASE_ADDR + 0x08)) +#define SSP1SR (*(reg32_t *)(SSP1_BASE_ADDR + 0x0C)) +#define SSP1CPSR (*(reg32_t *)(SSP1_BASE_ADDR + 0x10)) +#define SSP1IMSC (*(reg32_t *)(SSP1_BASE_ADDR + 0x14)) +#define SSP1RIS (*(reg32_t *)(SSP1_BASE_ADDR + 0x18)) +#define SSP1MIS (*(reg32_t *)(SSP1_BASE_ADDR + 0x1C)) +#define SSP1ICR (*(reg32_t *)(SSP1_BASE_ADDR + 0x20)) +#define SSP1DMACR (*(reg32_t *)(SSP1_BASE_ADDR + 0x24)) + + +/* Real Time Clock */ +#define RTC_BASE_ADDR 0xE0024000 +#define RTC_ILR (*(reg32_t *)(RTC_BASE_ADDR + 0x00)) +#define RTC_CTC (*(reg32_t *)(RTC_BASE_ADDR + 0x04)) +#define RTC_CCR (*(reg32_t *)(RTC_BASE_ADDR + 0x08)) +#define RTC_CIIR (*(reg32_t *)(RTC_BASE_ADDR + 0x0C)) +#define RTC_AMR (*(reg32_t *)(RTC_BASE_ADDR + 0x10)) +#define RTC_CTIME0 (*(reg32_t *)(RTC_BASE_ADDR + 0x14)) +#define RTC_CTIME1 (*(reg32_t *)(RTC_BASE_ADDR + 0x18)) +#define RTC_CTIME2 (*(reg32_t *)(RTC_BASE_ADDR + 0x1C)) +#define RTC_SEC (*(reg32_t *)(RTC_BASE_ADDR + 0x20)) +#define RTC_MIN (*(reg32_t *)(RTC_BASE_ADDR + 0x24)) +#define RTC_HOUR (*(reg32_t *)(RTC_BASE_ADDR + 0x28)) +#define RTC_DOM (*(reg32_t *)(RTC_BASE_ADDR + 0x2C)) +#define RTC_DOW (*(reg32_t *)(RTC_BASE_ADDR + 0x30)) +#define RTC_DOY (*(reg32_t *)(RTC_BASE_ADDR + 0x34)) +#define RTC_MONTH (*(reg32_t *)(RTC_BASE_ADDR + 0x38)) +#define RTC_YEAR (*(reg32_t *)(RTC_BASE_ADDR + 0x3C)) +#define RTC_CISS (*(reg32_t *)(RTC_BASE_ADDR + 0x40)) +#define RTC_ALSEC (*(reg32_t *)(RTC_BASE_ADDR + 0x60)) +#define RTC_ALMIN (*(reg32_t *)(RTC_BASE_ADDR + 0x64)) +#define RTC_ALHOUR (*(reg32_t *)(RTC_BASE_ADDR + 0x68)) +#define RTC_ALDOM (*(reg32_t *)(RTC_BASE_ADDR + 0x6C)) +#define RTC_ALDOW (*(reg32_t *)(RTC_BASE_ADDR + 0x70)) +#define RTC_ALDOY (*(reg32_t *)(RTC_BASE_ADDR + 0x74)) +#define RTC_ALMON (*(reg32_t *)(RTC_BASE_ADDR + 0x78)) +#define RTC_ALYEAR (*(reg32_t *)(RTC_BASE_ADDR + 0x7C)) +#define RTC_PREINT (*(reg32_t *)(RTC_BASE_ADDR + 0x80)) +#define RTC_PREFRAC (*(reg32_t *)(RTC_BASE_ADDR + 0x84)) + + +/* A/D Converter 0 (AD0) */ +#define AD0_BASE_ADDR 0xE0034000 +#define AD0CR (*(reg32_t *)(AD0_BASE_ADDR + 0x00)) +#define AD0GDR (*(reg32_t *)(AD0_BASE_ADDR + 0x04)) +#define AD0INTEN (*(reg32_t *)(AD0_BASE_ADDR + 0x0C)) +#define AD0DR0 (*(reg32_t *)(AD0_BASE_ADDR + 0x10)) +#define AD0DR1 (*(reg32_t *)(AD0_BASE_ADDR + 0x14)) +#define AD0DR2 (*(reg32_t *)(AD0_BASE_ADDR + 0x18)) +#define AD0DR3 (*(reg32_t *)(AD0_BASE_ADDR + 0x1C)) +#define AD0DR4 (*(reg32_t *)(AD0_BASE_ADDR + 0x20)) +#define AD0DR5 (*(reg32_t *)(AD0_BASE_ADDR + 0x24)) +#define AD0DR6 (*(reg32_t *)(AD0_BASE_ADDR + 0x28)) +#define AD0DR7 (*(reg32_t *)(AD0_BASE_ADDR + 0x2C)) +#define AD0STAT (*(reg32_t *)(AD0_BASE_ADDR + 0x30)) + + +/* D/A Converter */ +#define DAC_BASE_ADDR 0xE006C000 +#define DACR (*(reg32_t *)(DAC_BASE_ADDR + 0x00)) + + +/* Watchdog */ +#define WDG_BASE_ADDR 0xE0000000 +#define WDMOD (*(reg32_t *)(WDG_BASE_ADDR + 0x00)) +#define WDTC (*(reg32_t *)(WDG_BASE_ADDR + 0x04)) +#define WDFEED (*(reg32_t *)(WDG_BASE_ADDR + 0x08)) +#define WDTV (*(reg32_t *)(WDG_BASE_ADDR + 0x0C)) +#define WDCLKSEL (*(reg32_t *)(WDG_BASE_ADDR + 0x10)) + +/* CAN CONTROLLERS AND ACCEPTANCE FILTER */ +#define CAN_ACCEPT_BASE_ADDR 0xE003C000 +#define CAN_AFMR (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x00)) +#define CAN_SFF_SA (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x04)) +#define CAN_SFF_GRP_SA (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x08)) +#define CAN_EFF_SA (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x0C)) +#define CAN_EFF_GRP_SA (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x10)) +#define CAN_EOT (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x14)) +#define CAN_LUT_ERR_ADR (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x18)) +#define CAN_LUT_ERR (*(reg32_t *)(CAN_ACCEPT_BASE_ADDR + 0x1C)) + +#define CAN_CENTRAL_BASE_ADDR 0xE0040000 +#define CAN_TX_SR (*(reg32_t *)(CAN_CENTRAL_BASE_ADDR + 0x00)) +#define CAN_RX_SR (*(reg32_t *)(CAN_CENTRAL_BASE_ADDR + 0x04)) +#define CAN_MSR (*(reg32_t *)(CAN_CENTRAL_BASE_ADDR + 0x08)) + +#define CAN1_BASE_ADDR 0xE0044000 +#define CAN1MOD (*(reg32_t *)(CAN1_BASE_ADDR + 0x00)) +#define CAN1CMR (*(reg32_t *)(CAN1_BASE_ADDR + 0x04)) +#define CAN1GSR (*(reg32_t *)(CAN1_BASE_ADDR + 0x08)) +#define CAN1ICR (*(reg32_t *)(CAN1_BASE_ADDR + 0x0C)) +#define CAN1IER (*(reg32_t *)(CAN1_BASE_ADDR + 0x10)) +#define CAN1BTR (*(reg32_t *)(CAN1_BASE_ADDR + 0x14)) +#define CAN1EWL (*(reg32_t *)(CAN1_BASE_ADDR + 0x18)) +#define CAN1SR (*(reg32_t *)(CAN1_BASE_ADDR + 0x1C)) +#define CAN1RFS (*(reg32_t *)(CAN1_BASE_ADDR + 0x20)) +#define CAN1RID (*(reg32_t *)(CAN1_BASE_ADDR + 0x24)) +#define CAN1RDA (*(reg32_t *)(CAN1_BASE_ADDR + 0x28)) +#define CAN1RDB (*(reg32_t *)(CAN1_BASE_ADDR + 0x2C)) + +#define CAN1TFI1 (*(reg32_t *)(CAN1_BASE_ADDR + 0x30)) +#define CAN1TID1 (*(reg32_t *)(CAN1_BASE_ADDR + 0x34)) +#define CAN1TDA1 (*(reg32_t *)(CAN1_BASE_ADDR + 0x38)) +#define CAN1TDB1 (*(reg32_t *)(CAN1_BASE_ADDR + 0x3C)) +#define CAN1TFI2 (*(reg32_t *)(CAN1_BASE_ADDR + 0x40)) +#define CAN1TID2 (*(reg32_t *)(CAN1_BASE_ADDR + 0x44)) +#define CAN1TDA2 (*(reg32_t *)(CAN1_BASE_ADDR + 0x48)) +#define CAN1TDB2 (*(reg32_t *)(CAN1_BASE_ADDR + 0x4C)) +#define CAN1TFI3 (*(reg32_t *)(CAN1_BASE_ADDR + 0x50)) +#define CAN1TID3 (*(reg32_t *)(CAN1_BASE_ADDR + 0x54)) +#define CAN1TDA3 (*(reg32_t *)(CAN1_BASE_ADDR + 0x58)) +#define CAN1TDB3 (*(reg32_t *)(CAN1_BASE_ADDR + 0x5C)) + +#define CAN2_BASE_ADDR 0xE0048000 +#define CAN2MOD (*(reg32_t *)(CAN2_BASE_ADDR + 0x00)) +#define CAN2CMR (*(reg32_t *)(CAN2_BASE_ADDR + 0x04)) +#define CAN2GSR (*(reg32_t *)(CAN2_BASE_ADDR + 0x08)) +#define CAN2ICR (*(reg32_t *)(CAN2_BASE_ADDR + 0x0C)) +#define CAN2IER (*(reg32_t *)(CAN2_BASE_ADDR + 0x10)) +#define CAN2BTR (*(reg32_t *)(CAN2_BASE_ADDR + 0x14)) +#define CAN2EWL (*(reg32_t *)(CAN2_BASE_ADDR + 0x18)) +#define CAN2SR (*(reg32_t *)(CAN2_BASE_ADDR + 0x1C)) +#define CAN2RFS (*(reg32_t *)(CAN2_BASE_ADDR + 0x20)) +#define CAN2RID (*(reg32_t *)(CAN2_BASE_ADDR + 0x24)) +#define CAN2RDA (*(reg32_t *)(CAN2_BASE_ADDR + 0x28)) +#define CAN2RDB (*(reg32_t *)(CAN2_BASE_ADDR + 0x2C)) + +#define CAN2TFI1 (*(reg32_t *)(CAN2_BASE_ADDR + 0x30)) +#define CAN2TID1 (*(reg32_t *)(CAN2_BASE_ADDR + 0x34)) +#define CAN2TDA1 (*(reg32_t *)(CAN2_BASE_ADDR + 0x38)) +#define CAN2TDB1 (*(reg32_t *)(CAN2_BASE_ADDR + 0x3C)) +#define CAN2TFI2 (*(reg32_t *)(CAN2_BASE_ADDR + 0x40)) +#define CAN2TID2 (*(reg32_t *)(CAN2_BASE_ADDR + 0x44)) +#define CAN2TDA2 (*(reg32_t *)(CAN2_BASE_ADDR + 0x48)) +#define CAN2TDB2 (*(reg32_t *)(CAN2_BASE_ADDR + 0x4C)) +#define CAN2TFI3 (*(reg32_t *)(CAN2_BASE_ADDR + 0x50)) +#define CAN2TID3 (*(reg32_t *)(CAN2_BASE_ADDR + 0x54)) +#define CAN2TDA3 (*(reg32_t *)(CAN2_BASE_ADDR + 0x58)) +#define CAN2TDB3 (*(reg32_t *)(CAN2_BASE_ADDR + 0x5C)) + + +/* MultiMedia Card Interface(MCI) Controller */ +#define MCI_BASE_ADDR 0xE008C000 +#define MCI_POWER (*(reg32_t *)(MCI_BASE_ADDR + 0x00)) +#define MCI_CLOCK (*(reg32_t *)(MCI_BASE_ADDR + 0x04)) +#define MCI_ARGUMENT (*(reg32_t *)(MCI_BASE_ADDR + 0x08)) +#define MCI_COMMAND (*(reg32_t *)(MCI_BASE_ADDR + 0x0C)) +#define MCI_RESP_CMD (*(reg32_t *)(MCI_BASE_ADDR + 0x10)) +#define MCI_RESP0 (*(reg32_t *)(MCI_BASE_ADDR + 0x14)) +#define MCI_RESP1 (*(reg32_t *)(MCI_BASE_ADDR + 0x18)) +#define MCI_RESP2 (*(reg32_t *)(MCI_BASE_ADDR + 0x1C)) +#define MCI_RESP3 (*(reg32_t *)(MCI_BASE_ADDR + 0x20)) +#define MCI_DATA_TMR (*(reg32_t *)(MCI_BASE_ADDR + 0x24)) +#define MCI_DATA_LEN (*(reg32_t *)(MCI_BASE_ADDR + 0x28)) +#define MCI_DATA_CTRL (*(reg32_t *)(MCI_BASE_ADDR + 0x2C)) +#define MCI_DATA_CNT (*(reg32_t *)(MCI_BASE_ADDR + 0x30)) +#define MCI_STATUS (*(reg32_t *)(MCI_BASE_ADDR + 0x34)) +#define MCI_CLEAR (*(reg32_t *)(MCI_BASE_ADDR + 0x38)) +#define MCI_MASK0 (*(reg32_t *)(MCI_BASE_ADDR + 0x3C)) +#define MCI_MASK1 (*(reg32_t *)(MCI_BASE_ADDR + 0x40)) +#define MCI_FIFO_CNT (*(reg32_t *)(MCI_BASE_ADDR + 0x48)) +#define MCI_FIFO (*(reg32_t *)(MCI_BASE_ADDR + 0x80)) + + +/* I2S Interface Controller (I2S) */ +#define I2S_BASE_ADDR 0xE0088000 +#define I2S_DAO (*(reg32_t *)(I2S_BASE_ADDR + 0x00)) +#define I2S_DAI (*(reg32_t *)(I2S_BASE_ADDR + 0x04)) +#define I2S_TX_FIFO (*(reg32_t *)(I2S_BASE_ADDR + 0x08)) +#define I2S_RX_FIFO (*(reg32_t *)(I2S_BASE_ADDR + 0x0C)) +#define I2S_STATE (*(reg32_t *)(I2S_BASE_ADDR + 0x10)) +#define I2S_DMA1 (*(reg32_t *)(I2S_BASE_ADDR + 0x14)) +#define I2S_DMA2 (*(reg32_t *)(I2S_BASE_ADDR + 0x18)) +#define I2S_IRQ (*(reg32_t *)(I2S_BASE_ADDR + 0x1C)) +#define I2S_TXRATE (*(reg32_t *)(I2S_BASE_ADDR + 0x20)) +#define I2S_RXRATE (*(reg32_t *)(I2S_BASE_ADDR + 0x24)) + + +/* General-purpose DMA Controller */ +#define DMA_BASE_ADDR 0xFFE04000 +#define GPDMA_INT_STAT (*(reg32_t *)(DMA_BASE_ADDR + 0x000)) +#define GPDMA_INT_TCSTAT (*(reg32_t *)(DMA_BASE_ADDR + 0x004)) +#define GPDMA_INT_TCCLR (*(reg32_t *)(DMA_BASE_ADDR + 0x008)) +#define GPDMA_INT_ERR_STAT (*(reg32_t *)(DMA_BASE_ADDR + 0x00C)) +#define GPDMA_INT_ERR_CLR (*(reg32_t *)(DMA_BASE_ADDR + 0x010)) +#define GPDMA_RAW_INT_TCSTAT (*(reg32_t *)(DMA_BASE_ADDR + 0x014)) +#define GPDMA_RAW_INT_ERR_STAT (*(reg32_t *)(DMA_BASE_ADDR + 0x018)) +#define GPDMA_ENABLED_CHNS (*(reg32_t *)(DMA_BASE_ADDR + 0x01C)) +#define GPDMA_SOFT_BREQ (*(reg32_t *)(DMA_BASE_ADDR + 0x020)) +#define GPDMA_SOFT_SREQ (*(reg32_t *)(DMA_BASE_ADDR + 0x024)) +#define GPDMA_SOFT_LBREQ (*(reg32_t *)(DMA_BASE_ADDR + 0x028)) +#define GPDMA_SOFT_LSREQ (*(reg32_t *)(DMA_BASE_ADDR + 0x02C)) +#define GPDMA_CONFIG (*(reg32_t *)(DMA_BASE_ADDR + 0x030)) +#define GPDMA_SYNC (*(reg32_t *)(DMA_BASE_ADDR + 0x034)) + +/* DMA channel 0 registers */ +#define GPDMA_CH0_SRC (*(reg32_t *)(DMA_BASE_ADDR + 0x100)) +#define GPDMA_CH0_DEST (*(reg32_t *)(DMA_BASE_ADDR + 0x104)) +#define GPDMA_CH0_LLI (*(reg32_t *)(DMA_BASE_ADDR + 0x108)) +#define GPDMA_CH0_CTRL (*(reg32_t *)(DMA_BASE_ADDR + 0x10C)) +#define GPDMA_CH0_CFG (*(reg32_t *)(DMA_BASE_ADDR + 0x110)) + +/* DMA channel 1 registers */ +#define GPDMA_CH1_SRC (*(reg32_t *)(DMA_BASE_ADDR + 0x120)) +#define GPDMA_CH1_DEST (*(reg32_t *)(DMA_BASE_ADDR + 0x124)) +#define GPDMA_CH1_LLI (*(reg32_t *)(DMA_BASE_ADDR + 0x128)) +#define GPDMA_CH1_CTRL (*(reg32_t *)(DMA_BASE_ADDR + 0x12C)) +#define GPDMA_CH1_CFG (*(reg32_t *)(DMA_BASE_ADDR + 0x130)) + + +/* USB Controller */ +#define USB_INT_BASE_ADDR 0xE01FC1C0 +#define USB_BASE_ADDR 0xFFE0C200 /* USB Base Address */ + +#define USB_INT_STAT (*(reg32_t *)(USB_INT_BASE_ADDR + 0x00)) + +/* USB Device Interrupt Registers */ +#define DEV_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x00)) +#define DEV_INT_EN (*(reg32_t *)(USB_BASE_ADDR + 0x04)) +#define DEV_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0x08)) +#define DEV_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0x0C)) +#define DEV_INT_PRIO (*(reg32_t *)(USB_BASE_ADDR + 0x2C)) + +/* USB Device Endpoint Interrupt Registers */ +#define EP_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x30)) +#define EP_INT_EN (*(reg32_t *)(USB_BASE_ADDR + 0x34)) +#define EP_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0x38)) +#define EP_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0x3C)) +#define EP_INT_PRIO (*(reg32_t *)(USB_BASE_ADDR + 0x40)) + +/* USB Device Endpoint Realization Registers */ +#define REALIZE_EP (*(reg32_t *)(USB_BASE_ADDR + 0x44)) +#define EP_INDEX (*(reg32_t *)(USB_BASE_ADDR + 0x48)) +#define MAXPACKET_SIZE (*(reg32_t *)(USB_BASE_ADDR + 0x4C)) + +/* USB Device Command Reagisters */ +#define CMD_CODE (*(reg32_t *)(USB_BASE_ADDR + 0x10)) +#define CMD_DATA (*(reg32_t *)(USB_BASE_ADDR + 0x14)) + +/* USB Device Data Transfer Registers */ +#define RX_DATA (*(reg32_t *)(USB_BASE_ADDR + 0x18)) +#define TX_DATA (*(reg32_t *)(USB_BASE_ADDR + 0x1C)) +#define RX_PLENGTH (*(reg32_t *)(USB_BASE_ADDR + 0x20)) +#define TX_PLENGTH (*(reg32_t *)(USB_BASE_ADDR + 0x24)) +#define USB_CTRL (*(reg32_t *)(USB_BASE_ADDR + 0x28)) + +/* USB Device DMA Registers */ +#define DMA_REQ_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x50)) +#define DMA_REQ_CLR (*(reg32_t *)(USB_BASE_ADDR + 0x54)) +#define DMA_REQ_SET (*(reg32_t *)(USB_BASE_ADDR + 0x58)) +#define UDCA_HEAD (*(reg32_t *)(USB_BASE_ADDR + 0x80)) +#define EP_DMA_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x84)) +#define EP_DMA_EN (*(reg32_t *)(USB_BASE_ADDR + 0x88)) +#define EP_DMA_DIS (*(reg32_t *)(USB_BASE_ADDR + 0x8C)) +#define DMA_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0x90)) +#define DMA_INT_EN (*(reg32_t *)(USB_BASE_ADDR + 0x94)) +#define EOT_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0xA0)) +#define EOT_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0xA4)) +#define EOT_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0xA8)) +#define NDD_REQ_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0xAC)) +#define NDD_REQ_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0xB0)) +#define NDD_REQ_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0xB4)) +#define SYS_ERR_INT_STAT (*(reg32_t *)(USB_BASE_ADDR + 0xB8)) +#define SYS_ERR_INT_CLR (*(reg32_t *)(USB_BASE_ADDR + 0xBC)) +#define SYS_ERR_INT_SET (*(reg32_t *)(USB_BASE_ADDR + 0xC0)) + +/* USB Host and OTG registers are for LPC24xx only */ +/* USB Host Controller */ +#define USBHC_BASE_ADDR 0xFFE0C000 +#define HC_REVISION (*(reg32_t *)(USBHC_BASE_ADDR + 0x00)) +#define HC_CONTROL (*(reg32_t *)(USBHC_BASE_ADDR + 0x04)) +#define HC_CMD_STAT (*(reg32_t *)(USBHC_BASE_ADDR + 0x08)) +#define HC_INT_STAT (*(reg32_t *)(USBHC_BASE_ADDR + 0x0C)) +#define HC_INT_EN (*(reg32_t *)(USBHC_BASE_ADDR + 0x10)) +#define HC_INT_DIS (*(reg32_t *)(USBHC_BASE_ADDR + 0x14)) +#define HC_HCCA (*(reg32_t *)(USBHC_BASE_ADDR + 0x18)) +#define HC_PERIOD_CUR_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x1C)) +#define HC_CTRL_HEAD_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x20)) +#define HC_CTRL_CUR_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x24)) +#define HC_BULK_HEAD_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x28)) +#define HC_BULK_CUR_ED (*(reg32_t *)(USBHC_BASE_ADDR + 0x2C)) +#define HC_DONE_HEAD (*(reg32_t *)(USBHC_BASE_ADDR + 0x30)) +#define HC_FM_INTERVAL (*(reg32_t *)(USBHC_BASE_ADDR + 0x34)) +#define HC_FM_REMAINING (*(reg32_t *)(USBHC_BASE_ADDR + 0x38)) +#define HC_FM_NUMBER (*(reg32_t *)(USBHC_BASE_ADDR + 0x3C)) +#define HC_PERIOD_START (*(reg32_t *)(USBHC_BASE_ADDR + 0x40)) +#define HC_LS_THRHLD (*(reg32_t *)(USBHC_BASE_ADDR + 0x44)) +#define HC_RH_DESCA (*(reg32_t *)(USBHC_BASE_ADDR + 0x48)) +#define HC_RH_DESCB (*(reg32_t *)(USBHC_BASE_ADDR + 0x4C)) +#define HC_RH_STAT (*(reg32_t *)(USBHC_BASE_ADDR + 0x50)) +#define HC_RH_PORT_STAT1 (*(reg32_t *)(USBHC_BASE_ADDR + 0x54)) +#define HC_RH_PORT_STAT2 (*(reg32_t *)(USBHC_BASE_ADDR + 0x58)) + +/* USB OTG Controller */ +#define USBOTG_BASE_ADDR 0xFFE0C100 +#define OTG_INT_STAT (*(reg32_t *)(USBOTG_BASE_ADDR + 0x00)) +#define OTG_INT_EN (*(reg32_t *)(USBOTG_BASE_ADDR + 0x04)) +#define OTG_INT_SET (*(reg32_t *)(USBOTG_BASE_ADDR + 0x08)) +#define OTG_INT_CLR (*(reg32_t *)(USBOTG_BASE_ADDR + 0x0C)) +/* On LPC23xx, the name is USBPortSel, on LPC24xx, the name is OTG_STAT_CTRL */ +#define OTG_STAT_CTRL (*(reg32_t *)(USBOTG_BASE_ADDR + 0x10)) +#define OTG_TIMER (*(reg32_t *)(USBOTG_BASE_ADDR + 0x14)) + +#define USBOTG_I2C_BASE_ADDR 0xFFE0C300 +#define OTG_I2C_RX (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x00)) +#define OTG_I2C_TX (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x00)) +#define OTG_I2C_STS (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x04)) +#define OTG_I2C_CTL (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x08)) +#define OTG_I2C_CLKHI (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x0C)) +#define OTG_I2C_CLKLO (*(reg32_t *)(USBOTG_I2C_BASE_ADDR + 0x10)) + +/* On LPC23xx, the names are USBClkCtrl and USBClkSt; on LPC24xx, the names are +OTG_CLK_CTRL and OTG_CLK_STAT respectively. */ +#define USBOTG_CLK_BASE_ADDR 0xFFE0CFF0 +#define OTG_CLK_CTRL (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x04)) +#define OTG_CLK_STAT (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x08)) + +/* Note: below three register name convention is for LPC23xx USB device only, match +with the spec. update in USB Device Section. */ +#define USBPortSel (*(reg32_t *)(USBOTG_BASE_ADDR + 0x10)) +#define USBClkCtrl (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x04)) +#define USBClkSt (*(reg32_t *)(USBOTG_CLK_BASE_ADDR + 0x08)) + +/* Ethernet MAC (32 bit data bus) -- all registers are RW unless indicated in parentheses */ +#define MAC_BASE_ADDR 0xFFE00000 /* AHB Peripheral # 0 */ +#define MAC_MAC1 (*(reg32_t *)(MAC_BASE_ADDR + 0x000)) /* MAC config reg 1 */ +#define MAC_MAC2 (*(reg32_t *)(MAC_BASE_ADDR + 0x004)) /* MAC config reg 2 */ +#define MAC_IPGT (*(reg32_t *)(MAC_BASE_ADDR + 0x008)) /* b2b InterPacketGap reg */ +#define MAC_IPGR (*(reg32_t *)(MAC_BASE_ADDR + 0x00C)) /* non b2b InterPacketGap reg */ +#define MAC_CLRT (*(reg32_t *)(MAC_BASE_ADDR + 0x010)) /* CoLlision window/ReTry reg */ +#define MAC_MAXF (*(reg32_t *)(MAC_BASE_ADDR + 0x014)) /* MAXimum Frame reg */ +#define MAC_SUPP (*(reg32_t *)(MAC_BASE_ADDR + 0x018)) /* PHY SUPPort reg */ +#define MAC_TEST (*(reg32_t *)(MAC_BASE_ADDR + 0x01C)) /* TEST reg */ +#define MAC_MCFG (*(reg32_t *)(MAC_BASE_ADDR + 0x020)) /* MII Mgmt ConFiG reg */ +#define MAC_MCMD (*(reg32_t *)(MAC_BASE_ADDR + 0x024)) /* MII Mgmt CoMmanD reg */ +#define MAC_MADR (*(reg32_t *)(MAC_BASE_ADDR + 0x028)) /* MII Mgmt ADdRess reg */ +#define MAC_MWTD (*(reg32_t *)(MAC_BASE_ADDR + 0x02C)) /* MII Mgmt WriTe Data reg (WO) */ +#define MAC_MRDD (*(reg32_t *)(MAC_BASE_ADDR + 0x030)) /* MII Mgmt ReaD Data reg (RO) */ +#define MAC_MIND (*(reg32_t *)(MAC_BASE_ADDR + 0x034)) /* MII Mgmt INDicators reg (RO) */ + +#define MAC_SA0 (*(reg32_t *)(MAC_BASE_ADDR + 0x040)) /* Station Address 0 reg */ +#define MAC_SA1 (*(reg32_t *)(MAC_BASE_ADDR + 0x044)) /* Station Address 1 reg */ +#define MAC_SA2 (*(reg32_t *)(MAC_BASE_ADDR + 0x048)) /* Station Address 2 reg */ + +#define MAC_COMMAND (*(reg32_t *)(MAC_BASE_ADDR + 0x100)) /* Command reg */ +#define MAC_STATUS (*(reg32_t *)(MAC_BASE_ADDR + 0x104)) /* Status reg (RO) */ +#define MAC_RXDESCRIPTOR (*(reg32_t *)(MAC_BASE_ADDR + 0x108)) /* Rx descriptor base address reg */ +#define MAC_RXSTATUS (*(reg32_t *)(MAC_BASE_ADDR + 0x10C)) /* Rx status base address reg */ +#define MAC_RXDESCRIPTORNUM (*(reg32_t *)(MAC_BASE_ADDR + 0x110)) /* Rx number of descriptors reg */ +#define MAC_RXPRODUCEINDEX (*(reg32_t *)(MAC_BASE_ADDR + 0x114)) /* Rx produce index reg (RO) */ +#define MAC_RXCONSUMEINDEX (*(reg32_t *)(MAC_BASE_ADDR + 0x118)) /* Rx consume index reg */ +#define MAC_TXDESCRIPTOR (*(reg32_t *)(MAC_BASE_ADDR + 0x11C)) /* Tx descriptor base address reg */ +#define MAC_TXSTATUS (*(reg32_t *)(MAC_BASE_ADDR + 0x120)) /* Tx status base address reg */ +#define MAC_TXDESCRIPTORNUM (*(reg32_t *)(MAC_BASE_ADDR + 0x124)) /* Tx number of descriptors reg */ +#define MAC_TXPRODUCEINDEX (*(reg32_t *)(MAC_BASE_ADDR + 0x128)) /* Tx produce index reg */ +#define MAC_TXCONSUMEINDEX (*(reg32_t *)(MAC_BASE_ADDR + 0x12C)) /* Tx consume index reg (RO) */ + +#define MAC_TSV0 (*(reg32_t *)(MAC_BASE_ADDR + 0x158)) /* Tx status vector 0 reg (RO) */ +#define MAC_TSV1 (*(reg32_t *)(MAC_BASE_ADDR + 0x15C)) /* Tx status vector 1 reg (RO) */ +#define MAC_RSV (*(reg32_t *)(MAC_BASE_ADDR + 0x160)) /* Rx status vector reg (RO) */ + +#define MAC_FLOWCONTROLCNT (*(reg32_t *)(MAC_BASE_ADDR + 0x170)) /* Flow control counter reg */ +#define MAC_FLOWCONTROLSTS (*(reg32_t *)(MAC_BASE_ADDR + 0x174)) /* Flow control status reg */ + +#define MAC_RXFILTERCTRL (*(reg32_t *)(MAC_BASE_ADDR + 0x200)) /* Rx filter ctrl reg */ +#define MAC_RXFILTERWOLSTS (*(reg32_t *)(MAC_BASE_ADDR + 0x204)) /* Rx filter WoL status reg (RO) */ +#define MAC_RXFILTERWOLCLR (*(reg32_t *)(MAC_BASE_ADDR + 0x208)) /* Rx filter WoL clear reg (WO) */ + +#define MAC_HASHFILTERL (*(reg32_t *)(MAC_BASE_ADDR + 0x210)) /* Hash filter LSBs reg */ +#define MAC_HASHFILTERH (*(reg32_t *)(MAC_BASE_ADDR + 0x214)) /* Hash filter MSBs reg */ + +#define MAC_INTSTATUS (*(reg32_t *)(MAC_BASE_ADDR + 0xFE0)) /* Interrupt status reg (RO) */ +#define MAC_INTENABLE (*(reg32_t *)(MAC_BASE_ADDR + 0xFE4)) /* Interrupt enable reg */ +#define MAC_INTCLEAR (*(reg32_t *)(MAC_BASE_ADDR + 0xFE8)) /* Interrupt clear reg (WO) */ +#define MAC_INTSET (*(reg32_t *)(MAC_BASE_ADDR + 0xFEC)) /* Interrupt set reg (WO) */ + +#define MAC_POWERDOWN (*(reg32_t *)(MAC_BASE_ADDR + 0xFF4)) /* Power-down reg */ +#define MAC_MODULEID (*(reg32_t *)(MAC_BASE_ADDR + 0xFFC)) /* Module ID reg (RO) */ + + +/* IRQ numbers */ +#define INT_I2C0 9 +#define INT_I2C1 19 +#define INT_I2C2 30 +#define INT_UART0 6 +#define INT_UART1 7 +#define INT_UART2 28 +#define INT_UART3 29 + +#endif /* LPC23XX_H */ diff --git a/bertos/cpu/arm/scripts/arm7tdmi_ram.ld b/bertos/cpu/arm/scripts/arm7tdmi_ram.ld new file mode 100644 index 0000000..278256e --- /dev/null +++ b/bertos/cpu/arm/scripts/arm7tdmi_ram.ld @@ -0,0 +1,135 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Linker Script for Atmel AT91SAM7 family processors, RAM execution. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0400; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x1000; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.exceptions)); + . = ALIGN (4); + *(.init); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + *(.gcc*); + . = ALIGN(4); + *(.ctors); + . = ALIGN(4); + *(.dtors); + _etext = .; + PROVIDE (__etext = .); + } > ram + + + .data : AT (_etext) + { + PROVIDE (__data_start = .); + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocate stack at the end of bss section. + * Data heap is allocated at end of stack. + */ + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_svc_end = .); + + PROVIDE (__stack_end = .); + + PROVIDE (__heap_start = .); +} diff --git a/bertos/cpu/arm/scripts/arm7tdmi_rom.ld b/bertos/cpu/arm/scripts/arm7tdmi_rom.ld new file mode 100644 index 0000000..8c60ed9 --- /dev/null +++ b/bertos/cpu/arm/scripts/arm7tdmi_rom.ld @@ -0,0 +1,138 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * \brief Linker Script for Atmel AT91SAM7 family processors, ROM execution. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + +/* + * Define stack size here + */ +FIQ_STACK_SIZE = 0x0100; +IRQ_STACK_SIZE = 0x0400; +ABT_STACK_SIZE = 0x0100; +UND_STACK_SIZE = 0x0100; +SVC_STACK_SIZE = 0x1000; + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.exceptions)); + . = ALIGN (4); + *(.init); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + *(.gcc*); + . = ALIGN(4); + *(.ctors); + . = ALIGN(4); + *(.dtors); + _etext = .; + PROVIDE (__etext = .); + } > rom + + + .data : AT (_etext) + { + PROVIDE (__data_start = .); + . = ALIGN (4); + *(.ramfunc) + . = ALIGN (4); + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocate stack at the end of bss section. + * Data heap is allocated at end of stack. + */ + PROVIDE (__stack_start = .); + + PROVIDE (__stack_fiq_start = .); + . += FIQ_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_fiq_end = .); + + PROVIDE (__stack_irq_start = .); + . += IRQ_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_irq_end = .); + + PROVIDE (__stack_abt_start = .); + . += ABT_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_abt_end = .); + + PROVIDE (__stack_und_start = .); + . += UND_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_und_end = .); + + PROVIDE (__stack_svc_start = .); + . += SVC_STACK_SIZE; + . = ALIGN(8); + PROVIDE (__stack_svc_end = .); + + PROVIDE (__stack_end = .); + + PROVIDE (__heap_start = .); +} diff --git a/bertos/cpu/arm/scripts/at91sam7_128_ram.ld b/bertos/cpu/arm/scripts/at91sam7_128_ram.ld new file mode 100644 index 0000000..a5b49ce --- /dev/null +++ b/bertos/cpu/arm/scripts/at91sam7_128_ram.ld @@ -0,0 +1,51 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_128 family processors. + * + */ + + + +/* + * Define memory configuration for AT91SAM7_128 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 128k + ram(rwx) : org = 0x00200000, len = 32k +} + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_ram.ld" diff --git a/bertos/cpu/arm/scripts/at91sam7_128_rom.ld b/bertos/cpu/arm/scripts/at91sam7_128_rom.ld new file mode 100644 index 0000000..df42209 --- /dev/null +++ b/bertos/cpu/arm/scripts/at91sam7_128_rom.ld @@ -0,0 +1,51 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_128 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_128 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 128k + ram(rwx) : org = 0x00200000, len = 32k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/bertos/cpu/arm/scripts/at91sam7_256_ram.ld b/bertos/cpu/arm/scripts/at91sam7_256_ram.ld new file mode 100644 index 0000000..f6de9c5 --- /dev/null +++ b/bertos/cpu/arm/scripts/at91sam7_256_ram.ld @@ -0,0 +1,51 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_256 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_256 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 256k + ram(rwx) : org = 0x00200000, len = 64k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_ram.ld" diff --git a/bertos/cpu/arm/scripts/at91sam7_256_rom.ld b/bertos/cpu/arm/scripts/at91sam7_256_rom.ld new file mode 100644 index 0000000..1307a03 --- /dev/null +++ b/bertos/cpu/arm/scripts/at91sam7_256_rom.ld @@ -0,0 +1,51 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_256 family processors. + * + */ + + + +/* + * Define memory configuration for AT91SAM7_256 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 256k + ram(rwx) : org = 0x00200000, len = 64k +} + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/bertos/cpu/arm/scripts/at91sam7_512_ram.ld b/bertos/cpu/arm/scripts/at91sam7_512_ram.ld new file mode 100644 index 0000000..3818ed9 --- /dev/null +++ b/bertos/cpu/arm/scripts/at91sam7_512_ram.ld @@ -0,0 +1,51 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_512 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_512 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 512k + ram(rwx) : org = 0x00200000, len = 64k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_ram.ld" diff --git a/bertos/cpu/arm/scripts/at91sam7_512_rom.ld b/bertos/cpu/arm/scripts/at91sam7_512_rom.ld new file mode 100644 index 0000000..6ef050d --- /dev/null +++ b/bertos/cpu/arm/scripts/at91sam7_512_rom.ld @@ -0,0 +1,51 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_512 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_512 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 512k + ram(rwx) : org = 0x00200000, len = 64k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/bertos/cpu/arm/scripts/at91sam7_64_ram.ld b/bertos/cpu/arm/scripts/at91sam7_64_ram.ld new file mode 100644 index 0000000..2a2535e --- /dev/null +++ b/bertos/cpu/arm/scripts/at91sam7_64_ram.ld @@ -0,0 +1,51 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_64 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_64 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 64k + ram(rwx) : org = 0x00200000, len = 16k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_ram.ld" diff --git a/bertos/cpu/arm/scripts/at91sam7_64_rom.ld b/bertos/cpu/arm/scripts/at91sam7_64_rom.ld new file mode 100644 index 0000000..8fa27df --- /dev/null +++ b/bertos/cpu/arm/scripts/at91sam7_64_rom.ld @@ -0,0 +1,51 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * \brief Script linker for Atmel AT91SAM7_64 family processors. + * + */ + + +/* + * Define memory configuration for AT91SAM7_64 family + */ +MEMORY +{ + rom(rx) : org = 0x00100000, len = 64k + ram(rwx) : org = 0x00200000, len = 16k +} + + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/bertos/cpu/arm/scripts/lpc2378.ld b/bertos/cpu/arm/scripts/lpc2378.ld new file mode 100644 index 0000000..908da10 --- /dev/null +++ b/bertos/cpu/arm/scripts/lpc2378.ld @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \author Francesco sacchi + * + * \brief Linker Script for NXP LPC2378 processors. + * + */ + + +MEMORY +{ + /* last 8k used by the bootloader */ + rom(rx) : org = 0x00000000, len = 512k - 8k + /* First 0x200 bytes and last 288 used by bootloader and debugger */ + ram(rwx) : org = 0x40000200, len = 32k - 0x200 - 288 +} + +/* USB RAM */ +__usb_ram_start = 0x7FD00000; +__usb_ram_size = 8k; +__usb_ram_end = __usb_ram_start + __usb_ram_size; + +/* Ethernet RAM */ +__eth_ram_start = 0x7FE00000; +__eth_ram_size = 16k; +__eth_ram_end = __eth_ram_start + __eth_ram_size; + +INCLUDE "bertos/cpu/arm/scripts/arm7tdmi_rom.ld" diff --git a/bertos/cpu/attr.h b/bertos/cpu/attr.h new file mode 100644 index 0000000..e0e97ef --- /dev/null +++ b/bertos/cpu/attr.h @@ -0,0 +1,303 @@ +/** + * \file + * + * + * \brief CPU-specific attributes. + * + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ +#ifndef CPU_ATTR_H +#define CPU_ATTR_H + +#include "detect.h" + +#include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */ +#include "cfg/cfg_attr.h" /* CONFIG_FAST_MEM */ + + +/** + * \name Macros for determining CPU endianness. + * \{ + */ +#define CPU_BIG_ENDIAN 0x1234 +#define CPU_LITTLE_ENDIAN 0x3412 /* Look twice, pal. This is not a bug. */ +/*\}*/ + +/** Macro to include cpu-specific versions of the headers. */ +#define CPU_HEADER(module) PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).h) + +/** Macro to include cpu-specific versions of implementation files. */ +#define CPU_CSOURCE(module) PP_STRINGIZE(drv/PP_CAT3(module, _, CPU_ID).c) + + +#if CPU_I196 + + #define NOP nop_instruction() + + #define CPU_REG_BITS 16 + #define CPU_REGS_CNT 16 + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x100 + +#elif CPU_X86 + + #define CPU_REGS_CNT 7 + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #define CPU_HARVARD 0 + + #if CPU_X86_64 + #define CPU_REG_BITS 64 + + #ifdef __WIN64__ + /* WIN64 is an IL32-P64 weirdo. */ + #define SIZEOF_LONG 4 + #endif + #else + #define CPU_REG_BITS 32 + #endif + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x1000 + + #ifdef __GNUC__ + #define NOP asm volatile ("nop") + /* This is a good thing to insert into busy-wait loops. */ + #define PAUSE asm volatile ("rep; nop" ::: "memory") + #define BREAKPOINT asm volatile ("int3" ::) + #endif + +#elif CPU_ARM + + #define CPU_REG_BITS 32 + #define CPU_REGS_CNT 16 + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #if CPU_ARM_AT91 + #define CPU_RAM_START 0x00200000 + #elif CPU_ARM_LPC2 + #define CPU_RAM_START 0x40000000 + #else + #warning Fix CPU_RAM_START address for your ARM, default value set to 0x200 + #define CPU_RAM_START 0x200 + #endif + + #ifdef __IAR_SYSTEMS_ICC__ + #warning Check CPU_BYTE_ORDER + #define CPU_BYTE_ORDER (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN) + + #define NOP __no_operation() + + #else /* GCC and compatibles */ + + #if defined(__ARMEB__) + #define CPU_BYTE_ORDER CPU_BIG_ENDIAN + #elif defined(__ARMEL__) + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #else + #error Unable to detect ARM endianness! + #endif + + #define NOP asm volatile ("mov r0,r0" ::) + #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */ + + #if CONFIG_FAST_MEM + /** + * Function attribute for use with performance critical code. + * + * On the AT91 family, code residing in flash has wait states. + * Moving functions to the data section is a quick & dirty way + * to get them transparently copied to SRAM for zero-wait-state + * operation. + */ + #define FAST_FUNC __attribute__((section(".ramfunc"))) + + /** + * Data attribute to move constant data to fast memory storage. + * + * \see FAST_FUNC + */ + #define FAST_RODATA __attribute__((section(".data"))) + + #else // !CONFIG_FAST_MEM + #define FAST_RODATA /**/ + #define FAST_FUNC /**/ + #endif + + /* + * Function attribute to move it into ram memory. + */ + #define RAM_FUNC __attribute__((section(".ramfunc"))) + + #endif /* !__IAR_SYSTEMS_ICC_ */ +#elif CPU_CM3 + + #define CPU_REG_BITS 32 + #define CPU_REGS_CNT 16 + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #if (CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 || CPU_CM3_STM32 || CPU_CM3_SAM3) + #define CPU_RAM_START 0x20000000 + #else + #warning Fix CPU_RAM_START address for your Cortex-M3, default value set to 0x20000000 + #define CPU_RAM_START 0x20000000 + #endif + + #if defined( __ICCARM__) + #if ((defined __LITTLE_ENDIAN__) && (__LITTLE_ENDIAN__ == 0)) + #define CPU_BYTE_ORDER CPU_BIG_ENDIAN + #elif ((defined __LITTLE_ENDIAN__) && (__LITTLE_ENDIAN__ == 1)) + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #else + #error Unable to detect Cortex-M3 endianess! + #endif + + #define NOP __no_operation() + #else + #if defined(__ARMEB__) // GCC + #define CPU_BYTE_ORDER CPU_BIG_ENDIAN + #elif defined(__ARMEL__) // GCC + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #else + #error Unable to detect Cortex-M3 endianess! + #endif + + #define NOP asm volatile ("nop") + #define PAUSE asm volatile ("wfi" ::: "memory") + #define BREAKPOINT /* asm("bkpt 0") DOES NOT WORK */ + + /* + * Function attribute to move it into ram memory. + */ + #define RAM_FUNC __attribute__((section(".ramfunc"))) + #endif + +#elif CPU_PPC + + #define CPU_REG_BITS (CPU_PPC32 ? 32 : 64) + #define CPU_REGS_CNT FIXME + #define CPU_BYTE_ORDER (__BIG_ENDIAN__ ? CPU_BIG_ENDIAN : CPU_LITTLE_ENDIAN) + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x1000 + + #ifdef __GNUC__ + #define NOP asm volatile ("nop" ::) + #define BREAKPOINT asm volatile ("twge 2,2" ::) + #endif + +#elif CPU_DSP56K + + #define CPU_REG_BITS 16 + #define CPU_REGS_CNT FIXME + #define CPU_BYTE_ORDER CPU_BIG_ENDIAN + #define CPU_HARVARD 1 + + /* Memory is word-addessed in the DSP56K */ + #define CPU_BITS_PER_CHAR 16 + #define SIZEOF_SHORT 1 + #define SIZEOF_INT 1 + #define SIZEOF_LONG 2 + #define SIZEOF_PTR 1 + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x200 + + #define NOP asm(nop) + #define BREAKPOINT asm(debug) + +#elif CPU_AVR + + #define NOP asm volatile ("nop" ::) + + #define CPU_REG_BITS 8 + #define CPU_REGS_CNT 33 /* Includes SREG */ + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #define CPU_HARVARD 1 + + /// Valid pointers should be >= than this value (used for debug) + #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA103 + #define CPU_RAM_START 0x60 + #elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define CPU_RAM_START 0x100 + #elif CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + #define CPU_RAM_START 0x200 + #elif CPU_AVR_XMEGA_D + #define CPU_RAM_START 0x2000 + #else + #warning Fix CPU_RAM_START address for your AVR, default value set to 0x100 + #define CPU_RAM_START 0x100 + #endif + +#elif CPU_MSP430 + + #define CPU_REG_BITS 16 + #define CPU_REGS_CNT 12 + #define CPU_BYTE_ORDER CPU_LITTLE_ENDIAN + #define CPU_HARVARD 0 + + /// Valid pointers should be >= than this value (used for debug) + #define CPU_RAM_START 0x200 + + #define NOP __asm__ __volatile__ ("nop") + +#else + #error No CPU_... defined. +#endif + +#ifndef BREAKPOINT +#define BREAKPOINT /* nop */ +#endif + +#ifndef FAST_FUNC + /// Function attribute for use with performance critical code. + #define FAST_FUNC /* */ +#endif + +#ifndef FAST_RODATA + /// Data attribute to move constant data to fast memory storage. + #define FAST_RODATA /* */ +#endif + +#ifndef PAUSE + /// Generic PAUSE implementation. + #define PAUSE do {NOP; MEMORY_BARRIER;} while (0) +#endif + +#endif /* CPU_ATTR_H */ diff --git a/bertos/cpu/avr/drv/adc_avr.c b/bertos/cpu/avr/drv/adc_avr.c new file mode 100644 index 0000000..51c81ca --- /dev/null +++ b/bertos/cpu/avr/drv/adc_avr.c @@ -0,0 +1,211 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Francesco Sacchi + * + * This module is automatically included so no need to include + * in test list. + * notest: avr + * + * $WIZ$ + */ + +#include "adc_avr.h" + +#include "cfg/cfg_adc.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" +#include +#include + +#include // IRQ_ASSERT_ENABLED() + +#include + +#include +#include + +/** + * ADC voltage referencese. + * + * $WIZ$ avr_adc_refs = "ADC_AVR_AREF", "ADC_AVR_AVCC", "ADC_AVR_INT256" + * \{ + */ +#define ADC_AVR_AREF 0 +#define ADC_AVR_AVCC 1 +#define ADC_AVR_INT256 2 +/* \} */ + +#if CONFIG_KERN + #include + #include + #include + + + #if !CONFIG_KERN_SIGNALS + #error Signals must be active to use the ADC with kernel + #endif + + /* Signal adc convertion end */ + #define SIG_ADC_COMPLETE SIG_SINGLE + + /* ADC waiting process */ + static struct Process *adc_process; + + /** + * ADC ISR. + * Simply signal the adc process that convertion is complete. + */ + ISR(ADC_vect) + { + sig_post(adc_process, SIG_ADC_COMPLETE); + } +#endif /* CONFIG_KERN */ + +/** + * Select mux channel \a ch. + * \todo only first 8 channels are selectable! + */ +void adc_hw_select_ch(uint8_t ch) +{ + /* Set to 0 all mux registers */ + #if CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA168 + ADMUX &= ~(BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0)); + #elif CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 \ + || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + ADMUX &= ~(BV(MUX4) | BV(MUX3) | BV(MUX2) | BV(MUX1) | BV(MUX0)); + #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + ADCSRB &= ~(BV(MUX5)); + #endif + #else + #error Unknown CPU + #endif + + /* Select channel, only first 8 channel modes are supported */ + ADMUX |= (ch & 0x07); + + #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + /* Select channel, all 16 channels are supported */ + if (ch > 0x07) + ADCSRB |= BV(MUX5); + + #endif + +} + + +/** + * Start an ADC convertion. + * If a kernel is present, preempt until convertion is complete, otherwise + * a busy wait on ADCS bit is done. + */ +uint16_t adc_hw_read(void) +{ + // Ensure another convertion is not running. + ASSERT(!(ADCSRA & BV(ADSC))); + + // Start convertion + ADCSRA |= BV(ADSC); + + #if CONFIG_KERN + // Ensure IRQs enabled. + IRQ_ASSERT_ENABLED(); + adc_process = proc_current(); + sig_wait(SIG_ADC_COMPLETE); + #else + //Wait in polling until is done + while (ADCSRA & BV(ADSC)) ; + #endif + + return(ADC); +} + +/** + * Init ADC hardware. + */ +void adc_hw_init(void) +{ + /* + * Select channel 0 as default, + * result right adjusted. + */ + ADMUX = 0; + + #if CONFIG_ADC_AVR_REF == ADC_AVR_AREF + /* External voltage at AREF as analog ref source */ + /* None */ + #elif CONFIG_ADC_AVR_REF == ADC_AVR_AVCC + /* AVCC as analog ref source */ + ADMUX |= BV(REFS0); + #elif CONFIG_ADC_AVR_REF == ADC_AVR_INT256 + /* Internal 2.56V as ref source */ + ADMUX |= BV(REFS1) | BV(REFS0); + #else + #error Unsupported ADC ref value. + #endif + + #if defined(ADCSRB) + /* Disable Auto trigger source: ADC in Free running mode. */ + ADCSRB = 0; + #endif + + /* Enable ADC, disable autotrigger mode. */ + ADCSRA = BV(ADEN); + + #if CONFIG_KERN + MOD_CHECK(proc); + ADCSRA |= BV(ADIE); + #endif + + /* Set convertion frequency */ + #if CONFIG_ADC_AVR_DIVISOR == 2 + ADCSRA |= BV(ADPS0); + #elif CONFIG_ADC_AVR_DIVISOR == 4 + ADCSRA |= BV(ADPS1); + #elif CONFIG_ADC_AVR_DIVISOR == 8 + ADCSRA |= BV(ADPS1) | BV(ADPS0); + #elif CONFIG_ADC_AVR_DIVISOR == 16 + ADCSRA |= BV(ADPS2); + #elif CONFIG_ADC_AVR_DIVISOR == 32 + ADCSRA |= BV(ADPS2) | BV(ADPS0); + #elif CONFIG_ADC_AVR_DIVISOR == 64 + ADCSRA |= BV(ADPS2) | BV(ADPS1); + #elif CONFIG_ADC_AVR_DIVISOR == 128 + ADCSRA |= BV(ADPS2) | BV(ADPS1) | BV(ADPS0); + #else + #error Unsupported ADC prescaler value. + #endif + + /* Start a convertion to init ADC hw */ + adc_hw_read(); +} diff --git a/bertos/cpu/avr/drv/adc_avr.h b/bertos/cpu/avr/drv/adc_avr.h new file mode 100644 index 0000000..6c77ca3 --- /dev/null +++ b/bertos/cpu/avr/drv/adc_avr.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Francesco Sacchi + */ + +#ifndef DRV_ADC_AVR_H +#define DRV_ADC_AVR_H + +#include + +#if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + /* 16 channels aivailable */ + #define ADC_MUX_MAXCH 15 +#else + /* only 8 channels aivailable */ + #define ADC_MUX_MAXCH 7 +#endif +#define ADC_BITS 10 + +void adc_hw_select_ch(uint8_t ch); +uint16_t adc_hw_read(void); +void adc_hw_init(void); + +#endif /* DRV_ADC_AVR_H */ diff --git a/bertos/cpu/avr/drv/flash_avr.c b/bertos/cpu/avr/drv/flash_avr.c new file mode 100644 index 0000000..2c0baa1 --- /dev/null +++ b/bertos/cpu/avr/drv/flash_avr.c @@ -0,0 +1,178 @@ +/** + * \file + * + * + * \brief Self programming routines. + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * This module implements a kfile-like access for Atmel avr internal flash. + * Internal flash writing access is controlled by BOOTSZ fuses, check + * datasheet for details. + */ + +#include "flash_avr.h" + +#include "cfg/cfg_emb_flash.h" + +#include // MIN() +#include +#include +#include + +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_FLASH_EMB_LOG_LEVEL +#define LOG_FORMAT CONFIG_FLASH_EMB_LOG_FORMAT +#include + +#include +#include + +#include +#include +#include + +#include +#include +#include + +#include + +struct FlashHardware; + +static size_t avr_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size) +{ + memcpy_P(buf, (const void *)(uint16_t)(idx * blk->blk_size + offset), size); + return blk->blk_size; +} + +static size_t avr_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size) +{ + ASSERT(offset == 0); + ASSERT(size == blk->blk_size); + + uint32_t page_addr = idx * blk->blk_size; + uint32_t addr = idx * blk->blk_size; + const uint8_t *buf = (const uint8_t *)_buf; + + /* Wait while the SPM instruction is busy. */ + boot_spm_busy_wait(); + + /* Fill the temporary buffer of the AVR */ + while (size) + { + uint16_t data = ((*buf + 1) << 8) | *buf; + ATOMIC(boot_page_fill(addr, data)); + + buf += 2; + size -= 2; + addr += 2; + } + + wdt_reset(); + + /* Page erase */ + ATOMIC(boot_page_erase(page_addr)); + + /* Wait until the memory is erased. */ + boot_spm_busy_wait(); + + /* Store buffer in flash page. */ + ATOMIC(boot_page_write(page_addr)); + + /* Wait while the SPM instruction is busy. */ + boot_spm_busy_wait(); + + /* + * Reenable RWW-section again. We need this if we want to jump back + * to the application after bootloading. + */ + ATOMIC(boot_rww_enable()); + + return blk->blk_size; +} + +static int avr_flash_dummy(UNUSED_ARG(struct KBlock, *blk)) +{ + return 0; +} + +static const KBlockVTable flash_avr_buffered_vt = +{ + .readDirect = avr_flash_readDirect, + .writeDirect = avr_flash_writeDirect, + + .readBuf = kblock_swReadBuf, + .writeBuf = kblock_swWriteBuf, + .load = kblock_swLoad, + .store = kblock_swStore, + + .error = avr_flash_dummy, + .clearerr = (kblock_clearerr_t)avr_flash_dummy, +}; + +static const KBlockVTable flash_avr_unbuffered_vt = +{ + .readDirect = avr_flash_readDirect, + .writeDirect = avr_flash_writeDirect, + + .error = avr_flash_dummy, + .clearerr = (kblock_clearerr_t)avr_flash_dummy, +}; + +static uint8_t flash_buf[SPM_PAGESIZE]; + +static void common_init(Flash *fls) +{ + memset(fls, 0, sizeof(*fls)); + DB(fls->blk.priv.type = KBT_FLASH); + + fls->blk.blk_size = SPM_PAGESIZE; + fls->blk.blk_cnt = (FLASHEND + 1) / SPM_PAGESIZE; +} + + +void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags)) +{ + common_init(fls); + fls->blk.priv.vt = &flash_avr_buffered_vt; + fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE; + fls->blk.priv.buf = flash_buf; +} + +void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags)) +{ + common_init(fls); + fls->blk.priv.vt = &flash_avr_unbuffered_vt; +} + + diff --git a/bertos/cpu/avr/drv/flash_avr.h b/bertos/cpu/avr/drv/flash_avr.h new file mode 100644 index 0000000..b75a38b --- /dev/null +++ b/bertos/cpu/avr/drv/flash_avr.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * \brief AVR Internal flash read/write driver. + */ + +#ifndef FLASH_AVR_H +#define FLASH_AVR_H + +#include "cfg/cfg_emb_flash.h" + +#if !CONFIG_FLASH_DISABLE_OLD_API + + /* For backwards compatibility */ + #define FlashAvr Flash + #define flash_avr_init(fls) flash_init(fls); +#endif /* !CONFIG_FLASH_DISABLE_OLD_API */ + +#endif /* DRV_FLASH_AVR_H */ diff --git a/bertos/cpu/avr/drv/i2c_avr.c b/bertos/cpu/avr/drv/i2c_avr.c new file mode 100644 index 0000000..eb8b8da --- /dev/null +++ b/bertos/cpu/avr/drv/i2c_avr.c @@ -0,0 +1,411 @@ +/** + * \file + * + * + * \brief Driver for the AVR ATMega TWI (implementation) + * + * \author Stefano Fedrigo + * \author Bernie Innocenti + * \author Daniele Basile + */ + + +#include "cfg/cfg_i2c.h" + +#include /* CPU_FREQ */ + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT + +#include + +#include +#include // BV() +#include + +#include +#include +#include +#include + +#include + +#include + +#if !CONFIG_I2C_DISABLE_OLD_API + +/* Wait for TWINT flag set: bus is ready */ +#define WAIT_TWI_READY do {} while (!(TWCR & BV(TWINT))) + +/** + * Send START condition on the bus. + * + * \return true on success, false otherwise. + */ +static bool i2c_builtin_start(void) +{ + TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN); + WAIT_TWI_READY; + + if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START) + return true; + + LOG_ERR("!TW_(REP)START: %x\n", TWSR); + return false; +} + + +/** + * Send START condition and select slave for write. + * \c id is the device id comprehensive of address left shifted by 1. + * The LSB of \c id is ignored and reset to 0 for write operation. + * + * \return true on success, false otherwise. + */ +bool i2c_builtin_start_w(uint8_t id) +{ + /* + * Loop on the select write sequence: when the eeprom is busy + * writing previously sent data it will reply to the SLA_W + * control byte with a NACK. In this case, we must + * keep trying until the eeprom responds with an ACK. + */ + ticks_t start = timer_clock(); + while (i2c_builtin_start()) + { + TWDR = id & ~I2C_READBIT; + TWCR = BV(TWINT) | BV(TWEN); + WAIT_TWI_READY; + + if (TW_STATUS == TW_MT_SLA_ACK) + return true; + else if (TW_STATUS != TW_MT_SLA_NACK) + { + LOG_ERR("!TW_MT_SLA_(N)ACK: %x\n", TWSR); + break; + } + else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("Timeout on TWI_MT_START\n"); + break; + } + } + + return false; +} + + +/** + * Send START condition and select slave for read. + * \c id is the device id comprehensive of address left shifted by 1. + * The LSB of \c id is ignored and set to 1 for read operation. + * + * \return true on success, false otherwise. + */ +bool i2c_builtin_start_r(uint8_t id) +{ + if (i2c_builtin_start()) + { + TWDR = id | I2C_READBIT; + TWCR = BV(TWINT) | BV(TWEN); + WAIT_TWI_READY; + + if (TW_STATUS == TW_MR_SLA_ACK) + return true; + + LOG_ERR("!TW_MR_SLA_ACK: %x\n", TWSR); + } + + return false; +} + + +/** + * Send STOP condition. + */ +void i2c_builtin_stop(void) +{ + TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO); +} + + +/** + * Put a single byte in master transmitter mode + * to the selected slave device through the TWI bus. + * + * \return true on success, false on error. + */ +bool i2c_builtin_put(const uint8_t data) +{ + TWDR = data; + TWCR = BV(TWINT) | BV(TWEN); + WAIT_TWI_READY; + if (TW_STATUS != TW_MT_DATA_ACK) + { + LOG_ERR("!TW_MT_DATA_ACK: %x\n", TWSR); + return false; + } + return true; +} + +/** + * Get 1 byte from slave in master transmitter mode + * to the selected slave device through the TWI bus. + * If \a ack is true issue a ACK after getting the byte, + * otherwise a NACK is issued. + * + * \return the byte read if ok, EOF on errors. + */ +int i2c_builtin_get(bool ack) +{ + TWCR = BV(TWINT) | BV(TWEN) | (ack ? BV(TWEA) : 0); + WAIT_TWI_READY; + + if (ack) + { + if (TW_STATUS != TW_MR_DATA_ACK) + { + LOG_ERR("!TW_MR_DATA_ACK: %x\n", TWSR); + return EOF; + } + } + else + { + if (TW_STATUS != TW_MR_DATA_NACK) + { + LOG_ERR("!TW_MR_DATA_NACK: %x\n", TWSR); + return EOF; + } + } + + /* avoid sign extension */ + return (int)(uint8_t)TWDR; +} + +#endif /* !CONFIG_I2C_DISABLE_OLD_API */ + +/* + * New Api + */ +struct I2cHardware +{ +}; + + +/* Wait for TWINT flag set: bus is ready */ +#define WAIT_READY() \ + do { \ + while (!(TWCR & BV(TWINT))) \ + cpu_relax(); \ + } while (0) + +/** + * Send START condition on the bus. + */ +INLINE bool i2c_hw_start(void) +{ + TWCR = BV(TWINT) | BV(TWSTA) | BV(TWEN); + WAIT_READY(); + + if (TW_STATUS == TW_START || TW_STATUS == TW_REP_START) + return true; + + return false; +} + +/** + * Send STOP condition. + */ +INLINE void i2c_hw_stop(void) +{ + TWCR = BV(TWINT) | BV(TWEN) | BV(TWSTO); +} + +static void i2c_avr_start(I2c *i2c, uint16_t slave_addr) +{ + /* + * Loop on the select write sequence: when the eeprom is busy + * writing previously sent data it will reply to the SLA_W + * control byte with a NACK. In this case, we must + * keep trying until the slave responds with an ACK. + */ + ticks_t start = timer_clock(); + while (i2c_hw_start()) + { + uint8_t sla_ack = 0; + uint8_t sla_nack = 0; + if (I2C_TEST_START(i2c->flags) == I2C_START_W) + { + TWDR = slave_addr & ~I2C_READBIT; + sla_ack = TW_MT_SLA_ACK; + sla_nack = TW_MT_SLA_NACK; + } + else + { + TWDR = slave_addr | I2C_READBIT; + sla_ack = TW_MR_SLA_ACK; + sla_nack = TW_MR_SLA_NACK; + } + + TWCR = BV(TWINT) | BV(TWEN); + WAIT_READY(); + + if (TW_STATUS == sla_ack) + return; + else if (TW_STATUS != sla_nack) + { + LOG_ERR("Start addr NACK[%x]\n", TWSR); + i2c->errors |= I2C_NO_ACK; + i2c_hw_stop(); + break; + } + else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("Start timeout\n"); + i2c->errors |= I2C_START_TIMEOUT; + i2c_hw_stop(); + break; + } + } + + LOG_ERR("I2c error\n"); + i2c->errors |= I2C_ERR; + i2c_hw_stop(); +} + +static void i2c_avr_putc(I2c *i2c, const uint8_t data) +{ + + TWDR = data; + TWCR = BV(TWINT) | BV(TWEN); + WAIT_READY(); + + if (TW_STATUS != TW_MT_DATA_ACK) + { + LOG_ERR("Data nack[%x]\n", TWSR); + i2c->errors |= I2C_DATA_NACK; + i2c_hw_stop(); + } + + if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP)) + i2c_hw_stop(); +} + +static uint8_t i2c_avr_getc(I2c *i2c) +{ + uint8_t data_flag = 0; + if (i2c->xfer_size == 1) + { + TWCR = BV(TWINT) | BV(TWEN); + data_flag = TW_MR_DATA_NACK; + } + else + { + TWCR = BV(TWINT) | BV(TWEN) | BV(TWEA); + data_flag = TW_MR_DATA_ACK; + } + + WAIT_READY(); + + if (TW_STATUS != data_flag) + { + LOG_ERR("Data nack[%x]\n", TWSR); + i2c->errors |= I2C_DATA_NACK; + i2c_hw_stop(); + + return 0xFF; + } + + uint8_t data = TWDR; + + if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP)) + i2c_hw_stop(); + + return data; +} + + +static const I2cVT i2c_avr_vt = +{ + .start = i2c_avr_start, + .getc = i2c_avr_getc, + .putc = i2c_avr_putc, + .write = i2c_genericWrite, + .read = i2c_genericRead, +}; + +struct I2cHardware i2c_avr_hw[] = +{ + { /* I2C0 */ + }, +}; + +/** + * Initialize I2C module. + */ +void i2c_hw_init(I2c *i2c, int dev, uint32_t clock) +{ + i2c->hw = &i2c_avr_hw[dev]; + i2c->vt = &i2c_avr_vt; + + ATOMIC( + /* + * This is pretty useless according to AVR's datasheet, + * but it helps us driving the TWI data lines on boards + * where the bus pull-up resistors are missing. This is + * probably due to some unwanted interaction between the + * port pin and the TWI lines. + */ + #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + PORTD |= BV(PD0) | BV(PD1); + DDRD |= BV(PD0) | BV(PD1); + #elif CPU_AVR_ATMEGA8 + PORTC |= BV(PC4) | BV(PC5); + DDRC |= BV(PC4) | BV(PC5); + #elif CPU_AVR_ATMEGA32 + PORTC |= BV(PC1) | BV(PC0); + DDRC |= BV(PC1) | BV(PC0); + #else + #error Unsupported architecture + #endif + + /* + * Set speed: + * F = CPU_FREQ / (16 + 2*TWBR * 4^TWPS) + */ + ASSERT(clock); + #define TWI_PRESC 1 /* 4 ^ TWPS */ + + TWBR = (CPU_FREQ / (2 * clock * TWI_PRESC)) - (8 / TWI_PRESC); + TWSR = 0; + TWCR = BV(TWEN); + ); +} diff --git a/bertos/cpu/avr/drv/i2c_avr.h b/bertos/cpu/avr/drv/i2c_avr.h new file mode 100644 index 0000000..6b1fac9 --- /dev/null +++ b/bertos/cpu/avr/drv/i2c_avr.h @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Driver for the AVR ATMega TWI (implementation) + * + * \author Daniele Basile + */ + +#ifndef I2C_AVR_H +#define I2C_AVR_H + +#include + +/** + * \name I2C devices enum + */ +enum +{ + I2C0, + + I2C_CNT /**< Number of serial ports */ +}; + +#endif /* I2C_LM3S_H */ + diff --git a/bertos/cpu/avr/drv/kdebug_avr.c b/bertos/cpu/avr/drv/kdebug_avr.c new file mode 100644 index 0000000..88a7b97 --- /dev/null +++ b/bertos/cpu/avr/drv/kdebug_avr.c @@ -0,0 +1,47 @@ +/** + * \file + * + * + * + * \author Luca Ottaviano + * + * \brief Low-level kdebug module for AVR (inplementation). + */ + +#include + +#if CPU_AVR_MEGA + #include "kdebug_mega.c" +#elif CPU_AVR_XMEGA + #include "kdebug_xmega.c" +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/avr/drv/kdebug_mega.c b/bertos/cpu/avr/drv/kdebug_mega.c new file mode 100644 index 0000000..e5718c9 --- /dev/null +++ b/bertos/cpu/avr/drv/kdebug_mega.c @@ -0,0 +1,384 @@ +/** + * \file + * + * + * \brief AVR debug support (implementation). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ + +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* Required for bus macros overrides */ + +#include "cfg/cfg_debug.h" +#include /* for BV(), DIV_ROUND */ + +#include +#include + +#include + +#if CONFIG_KDEBUG_PORT == 0 + + /* + * Support for special bus policies or external transceivers + * on UART0 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART0_BUS_INIT + #define KDBG_UART0_BUS_INIT do { \ + UCR = BV(TXEN0); \ + } while (0) + #endif + #ifndef KDBG_UART0_BUS_RX + #define KDBG_UART0_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART0_BUS_TX + #define KDBG_UART0_BUS_TX do {} while (0) + #endif + + #if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 \ + || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560 + #define UCR UCSR0B + #define UDR UDR0 + #define USR UCSR0A + #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 + #define UCR UCSRB + #define USR UCSRA + #define TXEN0 TXEN + #define UDRE0 UDRE + #define TXC0 TXC + #define TXCIE0 TXCIE + #define UDRIE0 UDRIE + #else + #error Unknown CPU + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(USR, UDRE0); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(USR, TXC0); } while(0) + + /* + * We must clear the TXC flag before sending a new character to allow + * KDBG_WAIT_TXDONE() to work properly. + * + * BUG: if KDBG_WRITE_CHAR() is called after the TXC flag is set by hardware, + * a new TXC could be generated after we've cleared it and before the new + * character is written to UDR. On a 485 bus, the transceiver will be put + * in RX mode while still transmitting the last char. + */ + #define KDBG_WRITE_CHAR(c) do { USR |= BV(TXC0); UDR = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCR; \ + UCR |= BV(TXEN0); \ + UCR &= ~(BV(TXCIE0) | BV(UDRIE0)); \ + KDBG_UART0_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART0_BUS_RX; \ + UCR = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + +#elif CONFIG_KDEBUG_PORT == 1 + + /* + * Support for special bus policies or external transceivers + * on UART1 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART1_BUS_INIT + #define KDBG_UART1_BUS_INIT do { \ + UCSR1B = BV(TXEN1); \ + } while (0) + #endif + #ifndef KDBG_UART1_BUS_RX + #define KDBG_UART1_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART1_BUS_TX + #define KDBG_UART1_BUS_TX do {} while (0) + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR1A, UDRE1); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR1A, TXC1); } while(0) + #define KDBG_WRITE_CHAR(c) do { UCSR1A |= BV(TXC1); UDR1 = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCSR1B; \ + UCSR1B |= BV(TXEN1); \ + UCSR1B &= ~(BV(TXCIE1) | BV(UDRIE1)); \ + KDBG_UART1_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART1_BUS_RX; \ + UCSR1B = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + +#elif CONFIG_KDEBUG_PORT == 2 + + /* + * Support for special bus policies or external transceivers + * on UART2 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART2_BUS_INIT + #define KDBG_UART2_BUS_INIT do { \ + UCSR2B = BV(TXEN2); \ + } while (0) + #endif + #ifndef KDBG_UART2_BUS_RX + #define KDBG_UART2_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART2_BUS_TX + #define KDBG_UART2_BUS_TX do {} while (0) + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR2A, UDRE2); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR2A, TXC2); } while(0) + #define KDBG_WRITE_CHAR(c) do { UCSR2A |= BV(TXC2); UDR2 = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCSR2B; \ + UCSR2B |= BV(TXEN2); \ + UCSR2B &= ~(BV(TXCIE2) | BV(UDRIE2)); \ + KDBG_UART2_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART2_BUS_RX; \ + UCSR2B = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + +#elif CONFIG_KDEBUG_PORT == 3 + + /* + * Support for special bus policies or external transceivers + * on UART3 (to be overridden in "hw/hw_ser.h"). + * + * HACK: if we don't set TXEN, kdbg disables the transmitter + * after each output statement until the serial driver + * is initialized. These glitches confuse the debug + * terminal that ends up printing some trash. + */ + #ifndef KDBG_UART3_BUS_INIT + #define KDBG_UART3_BUS_INIT do { \ + UCSR3B = BV(TXEN3); \ + } while (0) + #endif + #ifndef KDBG_UART3_BUS_RX + #define KDBG_UART3_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART3_BUS_TX + #define KDBG_UART3_BUS_TX do {} while (0) + #endif + + #define KDBG_WAIT_READY() do { loop_until_bit_is_set(UCSR3A, UDRE3); } while(0) + #define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set(UCSR3A, TXC3); } while(0) + #define KDBG_WRITE_CHAR(c) do { UCSR3A |= BV(TXC3); UDR3 = (c); } while(0) + + #define KDBG_MASK_IRQ(old) do { \ + (old) = UCSR3B; \ + UCSR3B |= BV(TXEN3); \ + UCSR3B &= ~(BV(TXCIE3) | BV(UDRIE3)); \ + KDBG_UART3_BUS_TX; \ + } while(0) + + #define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_UART3_BUS_RX; \ + UCSR3B = (old); \ + } while(0) + + typedef uint8_t kdbg_irqsave_t; + + +/* + * Special debug port for BitBanged Serial see below for details... + */ +#elif CONFIG_KDEBUG_PORT == 666 + #include "hw/hw_ser.h" + #define KDBG_WAIT_READY() do { /*nop*/ } while(0) + #define KDBG_WRITE_CHAR(c) _kdebug_bitbang_putchar((c)) + #define KDBG_MASK_IRQ(old) do { IRQ_SAVE_DISABLE((old)); } while(0) + #define KDBG_RESTORE_IRQ(old) do { IRQ_RESTORE((old)); } while(0) + typedef cpu_flags_t kdbg_irqsave_t; + + #define KDBG_DELAY (((CPU_FREQ + CONFIG_KDEBUG_BAUDRATE / 2) / CONFIG_KDEBUG_BAUDRATE) + 7) / 14 + + static void _kdebug_bitbang_delay(void) + { + unsigned long i; + + for (i = 0; i < KDBG_DELAY; i++) + { + NOP; + NOP; + NOP; + NOP; + NOP; + } + } + + /** + * Putchar for BITBANG serial debug console. + * Sometimes, we can't permit to use a whole serial for debugging purpose. + * Since debug console is in output only it is useful to use a single generic I/O pin for debug. + * This is achieved by this simple function, that shift out the data like a UART, but + * in software :) + * The only requirement is that SER_BITBANG_* macros will be defined somewhere (usually hw_ser.h) + * \note All interrupts are disabled during debug prints! + */ + static void _kdebug_bitbang_putchar(char c) + { + int i; + uint16_t data = c; + + /* Add stop bit */ + data |= 0x0100; + + /* Add start bit*/ + data <<= 1; + + /* Shift out data */ + uint16_t shift = 1; + for (i = 0; i < 10; i++) + { + if (data & shift) + SER_BITBANG_HIGH; + else + SER_BITBANG_LOW; + _kdebug_bitbang_delay(); + shift <<= 1; + } + } +#else + #error CONFIG_KDEBUG_PORT should be either 0, 1, 2, 3 or 666 +#endif + + +INLINE void kdbg_hw_init(void) +{ + #if CONFIG_KDEBUG_PORT == 666 + SER_BITBANG_INIT; + #else /* CONFIG_KDEBUG_PORT != 666 */ + /* Compute the baud rate */ + uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, CONFIG_KDEBUG_BAUDRATE) - 1; + + #if (CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281) + #if CONFIG_KDEBUG_PORT == 0 + UBRR0H = (uint8_t)(period>>8); + UBRR0L = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #elif CONFIG_KDEBUG_PORT == 1 + UBRR1H = (uint8_t)(period>>8); + UBRR1L = (uint8_t)period; + KDBG_UART1_BUS_INIT; + #else + #error CONFIG_KDEBUG_PORT must be either 0 or 1 + #endif + + #elif CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + #if CONFIG_KDEBUG_PORT == 0 + UBRR0H = (uint8_t)(period>>8); + UBRR0L = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #elif CONFIG_KDEBUG_PORT == 1 + UBRR1H = (uint8_t)(period>>8); + UBRR1L = (uint8_t)period; + KDBG_UART1_BUS_INIT; + #elif CONFIG_KDEBUG_PORT == 2 + UBRR2H = (uint8_t)(period>>8); + UBRR2L = (uint8_t)period; + KDBG_UART2_BUS_INIT; + #elif CONFIG_KDEBUG_PORT == 3 + UBRR3H = (uint8_t)(period>>8); + UBRR3L = (uint8_t)period; + KDBG_UART3_BUS_INIT; + #else + #error CONFIG_KDEBUG_PORT must be either 0 or 1 or 2 or 3 + #endif + + #elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #if CONFIG_KDEBUG_PORT == 0 + UBRR0H = (uint8_t)(period>>8); + UBRR0L = (uint8_t)period; + UCSR0A = 0; /* The Arduino Uno bootloader turns on U2X0 */ + KDBG_UART0_BUS_INIT; + #else + #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu + #endif + + #elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 + #if CONFIG_KDEBUG_PORT == 0 + UBRRH = (uint8_t)(period>>8); + UBRRL = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #else + #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu + #endif + #elif CPU_AVR_ATMEGA103 + #if CONFIG_KDEBUG_PORT == 0 + UBRR = (uint8_t)period; + KDBG_UART0_BUS_INIT; + #else + #error Only CONFIG_KDEBUG_PORT 0 is supported for this cpu + #endif + #else + #error Unknown CPU + #endif + #endif /* CONFIG_KDEBUG_PORT == 666 */ +} + diff --git a/bertos/cpu/avr/drv/kdebug_xmega.c b/bertos/cpu/avr/drv/kdebug_xmega.c new file mode 100644 index 0000000..aa40e4c --- /dev/null +++ b/bertos/cpu/avr/drv/kdebug_xmega.c @@ -0,0 +1,212 @@ +/** + * \file + * + * + * \brief AVR XMega debug support (implementation). + * + * This file is heavily inspired by the AVR implementation for BeRTOS, + * but uses a different approach for implementing the different debug + * ports, by using the USART_t structs. + * + * \author Onno + * notest:all + */ + +#include /* for CPU_FREQ */ +#include "hw/hw_ser.h" /* Required for bus macros overrides */ + +#include "cfg/cfg_debug.h" /* for debugging configuration settings */ +#include /* for BV(), DIV_ROUND */ + +#include +#include + +#include + +/* Set KDBG_USART, KDBG_USART_PORT and KDBG_USART_TX_PIN_bm + * according to the CONFIG_KDEBUG_PORT setting + * The Xmega A and D families support at least 2 UARTS + */ +#if CONFIG_KDEBUG_PORT == 0 + #define KDBG_USART USARTC0 + #define KDBG_USART_PORT PORTC + #define KDBG_USART_TX_PIN_bm PIN3_bm +#elif CONFIG_KDEBUG_PORT == 1 + #define KDBG_USART USARTD0 + #define KDBG_USART_PORT PORTD + #define KDBG_USART_TX_PIN_bm PIN3_bm +#endif +/* Allow the configuration of the extra 3 UARTS for the + * Xmega A family + */ +#ifdef CPU_AVR_XMEGA_A + #if CONFIG_KDEBUG_PORT == 2 + #define KDBG_USART USARTC1 + #define KDBG_USART_PORT PORTC + #define KDBG_USART_TX_PIN_bm PIN7_bm + #elif CONFIG_KDEBUG_PORT == 3 + #define KDBG_USART USARTD1 + #define KDBG_USART_PORT PORTD + #define KDBG_USART_TX_PIN_bm PIN7_bm + #elif CONFIG_KDEBUG_PORT == 4 + #define KDBG_USART USARTE0 + #define KDBG_USART_PORT PORTE + #define KDBG_USART_TX_PIN_bm PIN3_bm + #endif +#endif +/* Check if all required KDBG_ macros are defined + */ +#ifndef KDBG_USART + #if CPU_AVR_XMEGA_D + #error CONFIG_KDEBUG_PORT should be either 0 or 1 + #elif CPU_AVR_XMEGA_A + #error CONFIG_KDEBUG_PORT should be either 0, 1, 2, 3 or 4 + #endif +#endif + +/* + * Scalefactor to use for computing the baudrate + * this scalefactor should be an integer value between -7 + * and 7 + */ +#ifndef KDBG_USART_SCALE_FACTOR + #define KDBG_USART_SCALE_FACTOR (-7) +#else + #if KDBG_USART_SCALE_FACTOR > 7 || KDBG_USART_SCALE_FACTOR < -7 + #error KDBG_USART_SCALE_FACTOR should be an integer between -7 and 7 + #endif +#endif + +/* + * \name KDBG macros + * + * Used to set or alter the KDB_USART operation, + * enable the usart or send a byte. + * Some of these methods are called/included from kdbg_hw_init() + * others are called/included from the cpu independ kdebug implementation + * These macros are heavily imspired by the examples provided by atmel + * + * \{ + */ +#define KDBG_SET_FORMAT(_charSize, _parityMode, _twoStopBits) \ + (KDBG_USART).CTRLC = (uint8_t) _charSize | _parityMode | \ + (_twoStopBits ? USART_SBMODE_bm : 0) + +#define KDBG_SET_BAUDRATE(_bselValue, _bScaleFactor) \ + (KDBG_USART).BAUDCTRLA =(uint8_t)_bselValue; \ + (KDBG_USART).BAUDCTRLB =(_bScaleFactor << USART_BSCALE0_bp)|(_bselValue >> 8) + +#define KDBG_TX_ENABLE() ((KDBG_USART).CTRLB |= USART_TXEN_bm) + +#define KDBG_SET_MODE(_usartMode) \ + ((KDBG_USART).CTRLC = ((KDBG_USART).CTRLC & (~USART_CMODE_gm)) | _usartMode) + +#define KDBG_WAIT_READY() do{ loop_until_bit_is_set((KDBG_USART).STATUS, USART_DREIF_bp); } while(0) +#define KDBG_WAIT_TXDONE() do { loop_until_bit_is_set((KDBG_USART).STATUS, USART_TXCIF_bp); } while(0) +#define KDBG_WRITE_CHAR(c) do { (KDBG_USART).DATA = (c); } while(0) + +#define KDBG_SET_TX_INTERRUPTLEVEL(_txdIntLevel) \ + (KDBG_USART).CTRLA = ((KDBG_USART).CTRLA & ~USART_TXCINTLVL_gm) | _txdIntLevel + +#define KDBG_SET_DRE_INTERRUPTLEVEL(_dreIntLevel) \ + (KDBG_USART).CTRLA = ((KDBG_USART).CTRLA & ~USART_DREINTLVL_gm) | _dreIntLevel + +/*\}*/ + +/* + * To restore the USART state, to registers need to be restored + * These registers (CTRLA and CTRLB) can be saved to the + * kdbg_avr_xmaga_irqsave structure + */ +struct kdbg_avr_xmega_irqsave +{ + uint8_t ctrlb; + uint8_t ctrla; +}; +typedef struct kdbg_avr_xmega_irqsave kdbg_irqsave_t; + +/* + * param is the kdbg_irqsave_t structure + * + * * Stores the current state of the USART.CTRLA and + * the USART.CTRLB registers + * * Disables Transmit Complete and Date Register Empty interrupts + * * Enabled the transmitter + */ +#define KDBG_MASK_IRQ(old) do { \ + (old).ctrlb = KDBG_USART.CTRLB; \ + (old).ctrla = KDBG_USART.CTRLA; \ + KDBG_SET_TX_INTERRUPTLEVEL(USART_TXCINTLVL_OFF_gc); \ + KDBG_SET_DRE_INTERRUPTLEVEL(USART_DREINTLVL_OFF_gc); \ + KDBG_TX_ENABLE(); \ +} while(0) + +/* + * param is the kdbg_irqsave_t structure + * + * * waits until all data has been transmitted + * * restores the USART.CTRLA and USART.CTRLB registers + */ +#define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + KDBG_USART.CTRLB = (old).ctrlb; \ + KDBG_USART.CTRLA = (old).ctrla; \ +} while(0) + + +/* + * method included from the cpu independent kdebug.c file. + * it initializes KDBG_USART by: + * * Setting the KDBG_USART_TX_PIN_bm as an outputpin + * * Setting KDBG_USART to use 8 bits, No parity, 1 stopbit + * * Setting the baudrate to 115200 + * * Enabeling the transmitter + */ +INLINE void kdbg_hw_init(void) +{ + //set transmit pin as output + KDBG_USART_PORT.OUT = KDBG_USART_PORT.OUT & ~KDBG_USART_TX_PIN_bm; + KDBG_USART_PORT.DIRSET = KDBG_USART_TX_PIN_bm; + //set 8 bits, no parity, 1 stop bit + KDBG_SET_FORMAT(USART_CHSIZE_8BIT_gc, USART_PMODE_DISABLED_gc, false); + //compute and set the baud rate + /* Compute baud-rate period, this requires a valid USART_SCALE_FACTOR */ + #if KDBG_USART_SCALE_FACTOR < 0 + uint16_t bsel = DIV_ROUND((1 << (-(KDBG_USART_SCALE_FACTOR))) * (CPU_FREQ - (16 * CONFIG_KDEBUG_BAUDRATE)), 16 * CONFIG_KDEBUG_BAUDRATE); + #else + uint16_t bsel = DIV_ROUND(CPU_FREQ, (1 << (KDBG_USART_SCALE_FACTOR)) * 16 * CONFIG_KDEBUG_BAUDRATE) - 1; + #endif + KDBG_SET_BAUDRATE(bsel, KDBG_USART_SCALE_FACTOR); + //enable the Transmitter + KDBG_TX_ENABLE(); +} diff --git a/bertos/cpu/avr/drv/pwm_avr.c b/bertos/cpu/avr/drv/pwm_avr.c new file mode 100644 index 0000000..bea3ef5 --- /dev/null +++ b/bertos/cpu/avr/drv/pwm_avr.c @@ -0,0 +1,159 @@ +/** + * \file + * + * + * \brief Low-level PWM module for AVR (inplementation). + * + * + * \author Daniele Basile + * + */ + + +#include "pwm_avr.h" +#include + +#warning TODO:This is an exmple of implementation of PWM low level channel for AVR, implemnt it! + +/** + * Set PWM polarity to select pwm channel + */ +void pwm_hw_setPolarity(PwmDev dev, bool pol) +{ + + /* + * Put here a code to PWM polarity of select + * PWM channel + */ + + //Only for test remove when implement this function + (void)dev; + (void)pol; +} + +/** + * Get preiod from select channel + * + * \a dev channel + */ +pwm_period_t pwm_hw_getPeriod(PwmDev dev) +{ + /* + * Put here a code to get period value of select + * PWM channel + */ + + //Only for test remove when implement this function + (void)dev; + + return 0; +} + +/** + * Set pwm waveform frequecy. + * + * \a freq in Hz + */ +void pwm_hw_setFrequency(PwmDev dev, uint32_t freq) +{ + /* + * Put here a code to set frequency of select + * PWM channel + */ + + //Only for test remove when implement this function + (void)dev; + (void)freq; + +} + +/** + * Set pwm duty cycle. + * + * \a duty value 0 - 2^16 + */ +void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty) +{ + /* + * Put here a code to set duty of select + * PWM channel + */ + + //Only for test remove when implement this function + (void)dev; + (void)duty; + +} + + +/** + * Enable select pwm channel + */ +void pwm_hw_enable(PwmDev dev) +{ + /* + * Put here a code to enable + * a select PWM channel + */ + + //Only for test remove when implement this function + (void)dev; +} + +/** + * Disable select pwm channel + */ +void pwm_hw_disable(PwmDev dev) +{ + /* + * Put here a code to disable + * a select PWM channel + */ + + //Only for test remove when implement this function + (void)dev; +} + + +/** + * Init pwm. + */ +void pwm_hw_init(void) +{ + /* + * Put here a code to init + * a PWM hawdware + */ +} + + + + diff --git a/bertos/cpu/avr/drv/pwm_avr.h b/bertos/cpu/avr/drv/pwm_avr.h new file mode 100644 index 0000000..76c1620 --- /dev/null +++ b/bertos/cpu/avr/drv/pwm_avr.h @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \brief Low-level PWM module for AVR (interface). + * + * + * \author Daniele Basile + * + */ + +#ifndef DRV_PWM_AVR_H +#define DRV_PWM_AVR_H + +#include "hw/pwm_map.h" + +#include + +#define PWM_HW_MAX_PRESCALER_STEP 10 +#define PWM_HW_MAX_PERIOD 0xFFFF + +/** + * Type definition for pwm period. + */ +typedef uint16_t pwm_period_t; + +/** + * Structur definition for pwm driver. + */ +typedef struct PwmChannel +{ + /* */ +} PwmChannel; + + +void pwm_hw_init(void); +void pwm_hw_setFrequency(PwmDev dev, uint32_t freq); +void pwm_hw_setDutyUnlock(PwmDev dev, uint16_t duty); +void pwm_hw_disable(PwmDev dev); +void pwm_hw_enable(PwmDev dev); +void pwm_hw_setPolarity(PwmDev dev, bool pol); +pwm_period_t pwm_hw_getPeriod(PwmDev dev); + +#endif /* DRV_ADC_AT91_H */ diff --git a/bertos/cpu/avr/drv/ser_avr.c b/bertos/cpu/avr/drv/ser_avr.c new file mode 100644 index 0000000..f87f3b0 --- /dev/null +++ b/bertos/cpu/avr/drv/ser_avr.c @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief AVR UART and SPI I/O driver (Implementation) + * + * \author Onno + * + * This module is automatically included so no need to include + * in test list. + * notest: avr + */ + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should probably use ser_mega.c + + #include + + #if CPU_AVR_MEGA + #include "ser_mega.c" + #elif CPU_AVR_XMEGA + #include "ser_xmega.c" + /*#elif Add other AVR families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ diff --git a/bertos/cpu/avr/drv/ser_avr.h b/bertos/cpu/avr/drv/ser_avr.h new file mode 100644 index 0000000..4909613 --- /dev/null +++ b/bertos/cpu/avr/drv/ser_avr.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * + * \author Onno + * + * \brief Low-level serial module for AVR (interface). + * + */ +#ifndef SER_AVR_H_ +#define SER_AVR_H_ + +#include + +#if CPU_AVR_MEGA + #include "ser_mega.h" +#elif CPU_AVR_XMEGA + #include "ser_xmega.h" +/*#elif Add other AVR families here */ +#else + #error Unknown CPU +#endif + +#endif /* SER_AVR_H_ */ diff --git a/bertos/cpu/avr/drv/ser_mega.c b/bertos/cpu/avr/drv/ser_mega.c new file mode 100644 index 0000000..5e89325 --- /dev/null +++ b/bertos/cpu/avr/drv/ser_mega.c @@ -0,0 +1,1404 @@ +/** + * \file + * + * + * \brief AVR MEGA UART and SPI I/O driver (Implementation) + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Luca Ottaviano + */ + +#include "hw/hw_ser.h" /* Required for bus macros overrides */ +#include /* CPU_FREQ */ + +#include "cfg/cfg_ser.h" + +#include /* DIV_ROUND */ +#include +#include // ARCH_NIGHTTEST + +#include +#include +#include + +#include + +#include + +#if defined(__AVR_LIBC_VERSION__) && (__AVR_LIBC_VERSION__ >= 10400UL) + #include +#else + #include +#endif + + +#if !CONFIG_SER_HWHANDSHAKE + /** + * \name Hardware handshake (RTS/CTS). + * \{ + */ + #define RTS_ON do {} while (0) + #define RTS_OFF do {} while (0) + #define IS_CTS_ON true + #define EIMSKF_CTS 0 /**< Dummy value, must be overridden */ + /*\}*/ +#endif + +#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + #define BIT_RXCIE0 RXCIE0 + #define BIT_RXEN0 RXEN0 + #define BIT_TXEN0 TXEN0 + #define BIT_UDRIE0 UDRIE0 + + #define BIT_RXCIE1 RXCIE1 + #define BIT_RXEN1 RXEN1 + #define BIT_TXEN1 TXEN1 + #define BIT_UDRIE1 UDRIE1 + #if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + #define BIT_RXCIE2 RXCIE2 + #define BIT_RXEN2 RXEN2 + #define BIT_TXEN2 TXEN2 + #define BIT_UDRIE2 UDRIE2 + + #define BIT_RXCIE3 RXCIE3 + #define BIT_RXEN3 RXEN3 + #define BIT_TXEN3 TXEN3 + #define BIT_UDRIE3 UDRIE3 + #endif +#elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define BIT_RXCIE0 RXCIE0 + #define BIT_RXEN0 RXEN0 + #define BIT_TXEN0 TXEN0 + #define BIT_UDRIE0 UDRIE0 + + #define BIT_RXCIE1 RXCIE0 + #define BIT_RXEN1 RXEN0 + #define BIT_TXEN1 TXEN0 + #define BIT_UDRIE1 UDRIE0 +#else + #define BIT_RXCIE0 RXCIE + #define BIT_RXEN0 RXEN + #define BIT_TXEN0 TXEN + #define BIT_UDRIE0 UDRIE + + #define BIT_RXCIE1 RXCIE + #define BIT_RXEN1 RXEN + #define BIT_TXEN1 TXEN + #define BIT_UDRIE1 UDRIE +#endif + + +/** + * \name Overridable serial bus hooks + * + * These can be redefined in hw.h to implement + * special bus policies such as half-duplex, 485, etc. + * + * + * \code + * TXBEGIN TXCHAR TXEND TXOFF + * | __________|__________ | | + * | | | | | | | | | + * v v v v v v v v v + * ______ __ __ __ __ __ __ ________________ + * \/ \/ \/ \/ \/ \/ \/ + * ______/\__/\__/\__/\__/\__/\__/ + * + * \endcode + * + * \{ + */ +#ifndef SER_UART0_BUS_TXINIT + /** + * Default TXINIT macro - invoked in uart0_init() + * + * - Enable both the receiver and the transmitter + * - Enable only the RX complete interrupt + */ + #define SER_UART0_BUS_TXINIT do { \ + UCSR0A = 0; /* The Arduino Uno bootloader turns on U2X0 */ \ + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXBEGIN + /** + * Invoked before starting a transmission + * + * - Enable both the receiver and the transmitter + * - Enable both the RX complete and UDR empty interrupts + */ + #define SER_UART0_BUS_TXBEGIN do { \ + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXCHAR + /** + * Invoked to send one character. + */ + #define SER_UART0_BUS_TXCHAR(c) do { \ + UDR0 = (c); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXEND + /** + * Invoked as soon as the txfifo becomes empty + * + * - Keep both the receiver and the transmitter enabled + * - Keep the RX complete interrupt enabled + * - Disable the UDR empty interrupt + */ + #define SER_UART0_BUS_TXEND do { \ + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXOFF + /** + * \def SER_UART0_BUS_TXOFF + * + * Invoked after the last character has been transmitted + * + * The default is no action. + */ + #ifdef __doxygen__ + #define SER_UART0_BUS_TXOFF + #endif +#endif + +#ifndef SER_UART1_BUS_TXINIT + /** \sa SER_UART0_BUS_TXINIT */ + #define SER_UART1_BUS_TXINIT do { \ + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \ + } while (0) +#endif +#ifndef SER_UART1_BUS_TXBEGIN + /** \sa SER_UART0_BUS_TXBEGIN */ + #define SER_UART1_BUS_TXBEGIN do { \ + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_UDRIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \ + } while (0) +#endif +#ifndef SER_UART1_BUS_TXCHAR + /** \sa SER_UART0_BUS_TXCHAR */ + #define SER_UART1_BUS_TXCHAR(c) do { \ + UDR1 = (c); \ + } while (0) +#endif +#ifndef SER_UART1_BUS_TXEND + /** \sa SER_UART0_BUS_TXEND */ + #define SER_UART1_BUS_TXEND do { \ + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); \ + } while (0) +#endif +#ifndef SER_UART1_BUS_TXOFF + /** + * \def SER_UART1_BUS_TXOFF + * + * \see SER_UART0_BUS_TXOFF + */ + #ifdef __doxygen__ + #define SER_UART1_BUS_TXOFF + #endif +#endif + +#ifndef SER_UART2_BUS_TXINIT + /** \sa SER_UART0_BUS_TXINIT */ + #define SER_UART2_BUS_TXINIT do { \ + UCSR2B = BV(BIT_RXCIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); \ + } while (0) +#endif +#ifndef SER_UART2_BUS_TXBEGIN + /** \sa SER_UART0_BUS_TXBEGIN */ + #define SER_UART2_BUS_TXBEGIN do { \ + UCSR2B = BV(BIT_RXCIE2) | BV(BIT_UDRIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); \ + } while (0) +#endif +#ifndef SER_UART2_BUS_TXCHAR + /** \sa SER_UART0_BUS_TXCHAR */ + #define SER_UART2_BUS_TXCHAR(c) do { \ + UDR2 = (c); \ + } while (0) +#endif +#ifndef SER_UART2_BUS_TXEND + /** \sa SER_UART0_BUS_TXEND */ + #define SER_UART2_BUS_TXEND do { \ + UCSR2B = BV(BIT_RXCIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); \ + } while (0) +#endif +#ifndef SER_UART2_BUS_TXOFF + /** + * \def SER_UART2_BUS_TXOFF + * + * \see SER_UART0_BUS_TXOFF + */ + #ifdef __doxygen__ + #define SER_UART2_BUS_TXOFF + #endif +#endif + +#ifndef SER_UART3_BUS_TXINIT + /** \sa SER_UART0_BUS_TXINIT */ + #define SER_UART3_BUS_TXINIT do { \ + UCSR3B = BV(BIT_RXCIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); \ + } while (0) +#endif +#ifndef SER_UART3_BUS_TXBEGIN + /** \sa SER_UART0_BUS_TXBEGIN */ + #define SER_UART3_BUS_TXBEGIN do { \ + UCSR3B = BV(BIT_RXCIE3) | BV(BIT_UDRIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); \ + } while (0) +#endif +#ifndef SER_UART3_BUS_TXCHAR + /** \sa SER_UART0_BUS_TXCHAR */ + #define SER_UART3_BUS_TXCHAR(c) do { \ + UDR3 = (c); \ + } while (0) +#endif +#ifndef SER_UART3_BUS_TXEND + /** \sa SER_UART0_BUS_TXEND */ + #define SER_UART3_BUS_TXEND do { \ + UCSR3B = BV(BIT_RXCIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); \ + } while (0) +#endif +#ifndef SER_UART3_BUS_TXOFF + /** + * \def SER_UART3_BUS_TXOFF + * + * \see SER_UART0_BUS_TXOFF + */ + #ifdef __doxygen__ + #define SER_UART3_BUS_TXOFF + #endif +#endif +/*\}*/ + + +/** + * \name Overridable SPI hooks + * + * These can be redefined in hw.h to implement + * special bus policies such as slave select pin handling, etc. + * + * \{ + */ +#ifndef SER_SPI_BUS_TXINIT + /** + * Default TXINIT macro - invoked in spi_init() + * The default is no action. + */ + #define SER_SPI_BUS_TXINIT +#endif + +#ifndef SER_SPI_BUS_TXCLOSE + /** + * Invoked after the last character has been transmitted. + * The default is no action. + */ + #define SER_SPI_BUS_TXCLOSE +#endif +/*\}*/ + + +/* SPI port and pin configuration */ +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA1281 \ + || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + #define SPI_PORT PORTB + #define SPI_DDR DDRB + #define SPI_SS_BIT PB0 + #define SPI_SCK_BIT PB1 + #define SPI_MOSI_BIT PB2 + #define SPI_MISO_BIT PB3 +// TODO: these bits are the same as ATMEGA8 but the defines in avr-gcc are different. +// They should be the same! +#elif CPU_AVR_ATMEGA328P + #define SPI_PORT PORTB + #define SPI_DDR DDRB + #define SPI_SS_BIT PORTB2 + #define SPI_SCK_BIT PORTB5 + #define SPI_MOSI_BIT PORTB3 + #define SPI_MISO_BIT PORTB4 +#elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA168 + #define SPI_PORT PORTB + #define SPI_DDR DDRB + #define SPI_SS_BIT PB2 + #define SPI_SCK_BIT PB5 + #define SPI_MOSI_BIT PB3 + #define SPI_MISO_BIT PB4 +#elif CPU_AVR_ATMEGA32 + #define SPI_PORT PORTB + #define SPI_DDR DDRB + #define SPI_SS_BIT PB4 + #define SPI_SCK_BIT PB7 + #define SPI_MOSI_BIT PB5 + #define SPI_MISO_BIT PB6 +#else + #error Unknown architecture +#endif + +/* USART register definitions */ +#if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + #define AVR_HAS_UART1 1 + #define AVR_HAS_UART2 1 + #define AVR_HAS_UART3 1 +#elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 + #define AVR_HAS_UART1 1 + #define AVR_HAS_UART2 0 + #define AVR_HAS_UART3 0 +#elif CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P + #define AVR_HAS_UART1 0 + #define AVR_HAS_UART2 0 + #define AVR_HAS_UART3 0 + #define USART0_UDRE_vect USART_UDRE_vect + #define USART0_RX_vect USART_RX_vect + #define USART0_TX_vect USART_TX_vect +#elif CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 + #define AVR_HAS_UART1 0 + #define AVR_HAS_UART2 0 + #define AVR_HAS_UART3 0 + #define UCSR0A UCSRA + #define UCSR0B UCSRB + #define UCSR0C UCSRC + #define UDR0 UDR + #define UBRR0L UBRRL + #define UBRR0H UBRRH + #define UPM01 UPM1 + #define UPM00 UPM0 + #define USART0_UDRE_vect USART_UDRE_vect + #define USART0_RX_vect USART_RXC_vect + #define USART0_TX_vect USART_TXC_vect +#elif CPU_AVR_ATMEGA103 + #define AVR_HAS_UART1 0 + #define AVR_HAS_UART2 0 + #define AVR_HAS_UART3 0 + #define UCSR0B UCR + #define UDR0 UDR + #define UCSR0A USR + #define UBRR0L UBRR + #define USART0_UDRE_vect USART_UDRE_vect + #define USART0_RX_vect USART_RX_vect + #define USART0_TX_vect USART_TX_vect +#else + #error Unknown architecture +#endif + + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +/* TX and RX buffers */ +static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE]; +static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE]; +#if AVR_HAS_UART1 + static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE]; + static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE]; +#endif +#if AVR_HAS_UART2 + static unsigned char uart2_txbuffer[CONFIG_UART2_TXBUFSIZE]; + static unsigned char uart2_rxbuffer[CONFIG_UART2_RXBUFSIZE]; +#endif +#if AVR_HAS_UART3 + static unsigned char uart3_txbuffer[CONFIG_UART3_TXBUFSIZE]; + static unsigned char uart3_rxbuffer[CONFIG_UART3_RXBUFSIZE]; +#endif +static unsigned char spi_txbuffer[CONFIG_SPI_TXBUFSIZE]; +static unsigned char spi_rxbuffer[CONFIG_SPI_RXBUFSIZE]; + + +/** + * Internal hardware state structure + * + * The \a sending variable is true while the transmission + * interrupt is retriggering itself. + * + * For the USARTs the \a sending flag is useful for taking specific + * actions before sending a burst of data, at the start of a trasmission + * but not before every char sent. + * + * For the SPI, this flag is necessary because the SPI sends and receives + * bytes at the same time and the SPI IRQ is unique for send/receive. + * The only way to start transmission is to write data in SPDR (this + * is done by spi_starttx()). We do this *only* if a transfer is + * not already started. + */ +struct AvrSerial +{ + struct SerialHardware hw; + volatile bool sending; +}; + +static uint16_t uart_period(unsigned long bps) +{ + uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, bps) - 1; + + #ifdef _DEBUG + long skew = bps - (long)(period + 1) * (CPU_FREQ / 16); + /* 8N1 is reliable within 3% skew */ + if ((unsigned long)ABS(skew) > bps / (100 / 3)) + kprintf("Baudrate off by %ldbps\n", skew); + #endif + + //DB(kprintf("uart_period(bps=%lu): period=%u\n", bps, period);) + return period; +} + +/* + * Callbacks + */ +static void uart0_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + SER_UART0_BUS_TXINIT; + RTS_ON; + SER_STROBE_INIT; +} + +static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + UCSR0B = 0; +} + +static void uart0_enabletxirq(struct SerialHardware *_hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt sets hw->sending to false + * when it runs with an empty fifo. The order of statements in the + * if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + SER_UART0_BUS_TXBEGIN; + } +} + +static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + uint16_t period = uart_period(rate); + +#if !CPU_AVR_ATMEGA103 + UBRR0H = period >> 8; +#endif + UBRR0L = period; +} + +static void uart0_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ +#if !CPU_AVR_ATMEGA103 + UCSR0C = (UCSR0C & ~(BV(UPM01) | BV(UPM00))) | ((parity) << UPM00); +#endif +} + +#if AVR_HAS_UART1 + +static void uart1_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + SER_UART1_BUS_TXINIT; + RTS_ON; + SER_STROBE_INIT; +} + +static void uart1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + UCSR1B = 0; +} + +static void uart1_enabletxirq(struct SerialHardware *_hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt + * sets hw->sending to false when it runs with + * an empty fifo. The order of the statements + * in the if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + SER_UART1_BUS_TXBEGIN; + } +} + +static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + uint16_t period = uart_period(rate); + UBRR1H = period >> 8; + UBRR1L = period; +} + +static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + UCSR1C = (UCSR1C & ~(BV(UPM11) | BV(UPM10))) | ((parity) << UPM10); +} + +#endif // AVR_HAS_UART1 + +#if AVR_HAS_UART2 + +static void uart2_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + SER_UART2_BUS_TXINIT; + RTS_ON; + SER_STROBE_INIT; +} + +static void uart2_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + UCSR2B = 0; +} + +static void uart2_enabletxirq(struct SerialHardware *_hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt + * sets hw->sending to false when it runs with + * an empty fifo. The order of the statements + * in the if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + SER_UART2_BUS_TXBEGIN; + } +} + +static void uart2_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + uint16_t period = uart_period(rate); + UBRR2H = period >> 8; + UBRR2L = period; +} + +static void uart2_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + UCSR2C = (UCSR2C & ~(BV(UPM21) | BV(UPM20))) | ((parity) << UPM20); +} + +#endif // AVR_HAS_UART2 + +#if AVR_HAS_UART3 + +static void uart3_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + SER_UART3_BUS_TXINIT; + RTS_ON; + SER_STROBE_INIT; +} + +static void uart3_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + UCSR3B = 0; +} + +static void uart3_enabletxirq(struct SerialHardware *_hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt + * sets hw->sending to false when it runs with + * an empty fifo. The order of the statements + * in the if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + SER_UART3_BUS_TXBEGIN; + } +} + +static void uart3_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + uint16_t period = uart_period(rate); + UBRR3H = period >> 8; + UBRR3L = period; +} + +static void uart3_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + UCSR3C = (UCSR3C & ~(BV(UPM31) | BV(UPM30))) | ((parity) << UPM30); +} + +#endif // AVR_HAS_UART3 + + +static void spi_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser)) +{ + /* + * Set MOSI and SCK ports out, MISO in. + * + * The ATmega64/128 datasheet explicitly states that the input/output + * state of the SPI pins is not significant, as when the SPI is + * active the I/O port are overrided. + * This is *blatantly FALSE*. + * + * Moreover, the MISO pin on the board_kc *must* be in high impedance + * state even when the SPI is off, because the line is wired together + * with the KBus serial RX, and the transmitter of the slave boards + * would be unable to drive the line. + */ + ATOMIC(SPI_DDR |= (BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT))); + + /* + * If the SPI master mode is activated and the SS pin is in input and tied low, + * the SPI hardware will automatically switch to slave mode! + * For proper communication this pins should therefore be: + * - as output + * - as input but tied high forever! + * This driver set the pin as output. + */ + #warning FIXME:SPI SS pin set as output for proper operation, check schematics for possible conflicts. + ATOMIC(SPI_DDR |= BV(SPI_SS_BIT)); + + ATOMIC(SPI_DDR &= ~BV(SPI_MISO_BIT)); + /* Enable SPI, IRQ on, Master */ + SPCR = BV(SPE) | BV(SPIE) | BV(MSTR); + + /* Set data order */ + #if CONFIG_SPI_DATA_ORDER == SER_LSB_FIRST + SPCR |= BV(DORD); + #endif + + /* Set SPI clock rate */ + #if CONFIG_SPI_CLOCK_DIV == 128 + SPCR |= (BV(SPR1) | BV(SPR0)); + #elif (CONFIG_SPI_CLOCK_DIV == 64 || CONFIG_SPI_CLOCK_DIV == 32) + SPCR |= BV(SPR1); + #elif (CONFIG_SPI_CLOCK_DIV == 16 || CONFIG_SPI_CLOCK_DIV == 8) + SPCR |= BV(SPR0); + #elif (CONFIG_SPI_CLOCK_DIV == 4 || CONFIG_SPI_CLOCK_DIV == 2) + // SPR0 & SDPR1 both at 0 + #else + #error Unsupported SPI clock division factor. + #endif + + /* Set SPI2X bit (spi double frequency) */ + #if (CONFIG_SPI_CLOCK_DIV == 128 || CONFIG_SPI_CLOCK_DIV == 64 \ + || CONFIG_SPI_CLOCK_DIV == 16 || CONFIG_SPI_CLOCK_DIV == 4) + SPSR &= ~BV(SPI2X); + #elif (CONFIG_SPI_CLOCK_DIV == 32 || CONFIG_SPI_CLOCK_DIV == 8 || CONFIG_SPI_CLOCK_DIV == 2) + SPSR |= BV(SPI2X); + #else + #error Unsupported SPI clock division factor. + #endif + + /* Set clock polarity */ + #if CONFIG_SPI_CLOCK_POL == 1 + SPCR |= BV(CPOL); + #endif + + /* Set clock phase */ + #if CONFIG_SPI_CLOCK_PHASE == 1 + SPCR |= BV(CPHA); + #endif + SER_SPI_BUS_TXINIT; + + SER_STROBE_INIT; +} + +static void spi_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + SPCR = 0; + + SER_SPI_BUS_TXCLOSE; + + /* Set all pins as inputs */ + ATOMIC(SPI_DDR &= ~(BV(SPI_MISO_BIT) | BV(SPI_MOSI_BIT) | BV(SPI_SCK_BIT) | BV(SPI_SS_BIT))); +} + +static void spi_starttx(struct SerialHardware *_hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Send data only if the SPI is not already transmitting */ + if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI]->txfifo)) + { + hw->sending = true; + SPDR = fifo_pop(&ser_handles[SER_SPI]->txfifo); + } + + IRQ_RESTORE(flags); +} + +static void spi_setbaudrate( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(unsigned long, rate)) +{ + // nop +} + +static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity)) +{ + // nop +} + +static bool tx_sending(struct SerialHardware* _hw) +{ + struct AvrSerial *hw = (struct AvrSerial *)_hw; + return hw->sending; +} + + + +// FIXME: move into compiler.h? Ditch? +#if COMPILER_C99 + #define C99INIT(name,val) .name = val +#elif defined(__GNUC__) + #define C99INIT(name,val) name: val +#else + #warning No designated initializers, double check your code + #define C99INIT(name,val) (val) +#endif + +/* + * High-level interface data structures + */ +static const struct SerialHardwareVT UART0_VT = +{ + C99INIT(init, uart0_init), + C99INIT(cleanup, uart0_cleanup), + C99INIT(setBaudrate, uart0_setbaudrate), + C99INIT(setParity, uart0_setparity), + C99INIT(txStart, uart0_enabletxirq), + C99INIT(txSending, tx_sending), +}; + +#if AVR_HAS_UART1 +static const struct SerialHardwareVT UART1_VT = +{ + C99INIT(init, uart1_init), + C99INIT(cleanup, uart1_cleanup), + C99INIT(setBaudrate, uart1_setbaudrate), + C99INIT(setParity, uart1_setparity), + C99INIT(txStart, uart1_enabletxirq), + C99INIT(txSending, tx_sending), +}; +#endif // AVR_HAS_UART1 + +#if AVR_HAS_UART2 +static const struct SerialHardwareVT UART2_VT = +{ + C99INIT(init, uart2_init), + C99INIT(cleanup, uart2_cleanup), + C99INIT(setBaudrate, uart2_setbaudrate), + C99INIT(setParity, uart2_setparity), + C99INIT(txStart, uart2_enabletxirq), + C99INIT(txSending, tx_sending), +}; +#endif // AVR_HAS_UART2 + +#if AVR_HAS_UART3 +static const struct SerialHardwareVT UART3_VT = +{ + C99INIT(init, uart3_init), + C99INIT(cleanup, uart3_cleanup), + C99INIT(setBaudrate, uart3_setbaudrate), + C99INIT(setParity, uart3_setparity), + C99INIT(txStart, uart3_enabletxirq), + C99INIT(txSending, tx_sending), +}; +#endif // AVR_HAS_UART3 + +static const struct SerialHardwareVT SPI_VT = +{ + C99INIT(init, spi_init), + C99INIT(cleanup, spi_cleanup), + C99INIT(setBaudrate, spi_setbaudrate), + C99INIT(setParity, spi_setparity), + C99INIT(txStart, spi_starttx), + C99INIT(txSending, tx_sending), +}; + +static struct AvrSerial UARTDescs[SER_CNT] = +{ + { + C99INIT(hw, /**/) { + C99INIT(table, &UART0_VT), + C99INIT(txbuffer, uart0_txbuffer), + C99INIT(rxbuffer, uart0_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)), + }, + C99INIT(sending, false), + }, +#if AVR_HAS_UART1 + { + C99INIT(hw, /**/) { + C99INIT(table, &UART1_VT), + C99INIT(txbuffer, uart1_txbuffer), + C99INIT(rxbuffer, uart1_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)), + }, + C99INIT(sending, false), + }, +#endif +#if AVR_HAS_UART2 + { + C99INIT(hw, /**/) { + C99INIT(table, &UART2_VT), + C99INIT(txbuffer, uart2_txbuffer), + C99INIT(rxbuffer, uart2_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart2_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart2_rxbuffer)), + }, + C99INIT(sending, false), + }, +#endif +#if AVR_HAS_UART3 + { + C99INIT(hw, /**/) { + C99INIT(table, &UART3_VT), + C99INIT(txbuffer, uart3_txbuffer), + C99INIT(rxbuffer, uart3_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart3_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart3_rxbuffer)), + }, + C99INIT(sending, false), + }, +#endif + { + C99INIT(hw, /**/) { + C99INIT(table, &SPI_VT), + C99INIT(txbuffer, spi_txbuffer), + C99INIT(rxbuffer, spi_rxbuffer), + C99INIT(txbuffer_size, sizeof(spi_txbuffer)), + C99INIT(rxbuffer_size, sizeof(spi_rxbuffer)), + }, + C99INIT(sending, false), + } +}; + +struct SerialHardware *ser_hw_getdesc(int unit) +{ + ASSERT(unit < SER_CNT); + return &UARTDescs[unit].hw; +} + + +/* + * Interrupt handlers + */ + +#if CONFIG_SER_HWHANDSHAKE + +/// This interrupt is triggered when the CTS line goes high +DECLARE_ISR(SIG_CTS) +{ + // Re-enable UDR empty interrupt and TX, then disable CTS interrupt + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); + EIMSK &= ~EIMSKF_CTS; +} + +#endif // CONFIG_SER_HWHANDSHAKE + + +/** + * Serial 0 TX interrupt handler + */ +DECLARE_ISR(USART0_UDRE_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo; + + if (fifo_isempty(txfifo)) + { + SER_UART0_BUS_TXEND; +#ifndef SER_UART0_BUS_TXOFF + UARTDescs[SER_UART0].sending = false; +#endif + } +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103 + else if (!IS_CTS_ON) + { + // Disable rx interrupt and tx, enable CTS interrupt + // UNTESTED + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); + EIFR |= EIMSKF_CTS; + EIMSK |= EIMSKF_CTS; + } +#endif + else + { + char c = fifo_pop(txfifo); + SER_UART0_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +#ifdef SER_UART0_BUS_TXOFF +/** + * Serial port 0 TX complete interrupt handler. + * + * This IRQ is usually disabled. The UDR-empty interrupt + * enables it when there's no more data to transmit. + * We need to wait until the last character has been + * transmitted before switching the 485 transceiver to + * receive mode. + * + * The txfifo might have been refilled by putchar() while + * we were waiting for the transmission complete interrupt. + * In this case, we must restart the UDR empty interrupt, + * otherwise we'd stop the serial port with some data + * still pending in the buffer. + */ +DECLARE_ISR(USART0_TX_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo; + if (fifo_isempty(txfifo)) + { + SER_UART0_BUS_TXOFF; + UARTDescs[SER_UART0].sending = false; + } + else + UCSR0B = BV(BIT_RXCIE0) | BV(BIT_UDRIE0) | BV(BIT_RXEN0) | BV(BIT_TXEN0); + + SER_STROBE_OFF; +} +#endif /* SER_UART0_BUS_TXOFF */ + + +#if AVR_HAS_UART1 + +/** + * Serial 1 TX interrupt handler + */ +DECLARE_ISR(USART1_UDRE_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo; + + if (fifo_isempty(txfifo)) + { + SER_UART1_BUS_TXEND; +#ifndef SER_UART1_BUS_TXOFF + UARTDescs[SER_UART1].sending = false; +#endif + } +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA103 + else if (!IS_CTS_ON) + { + // Disable rx interrupt and tx, enable CTS interrupt + // UNTESTED + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); + EIFR |= EIMSKF_CTS; + EIMSK |= EIMSKF_CTS; + } +#endif + else + { + char c = fifo_pop(txfifo); + SER_UART1_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +#ifdef SER_UART1_BUS_TXOFF +/** + * Serial port 1 TX complete interrupt handler. + * + * \sa port 0 TX complete handler. + */ +DECLARE_ISR(USART1_TX_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo; + if (fifo_isempty(txfifo)) + { + SER_UART1_BUS_TXOFF; + UARTDescs[SER_UART1].sending = false; + } + else + UCSR1B = BV(BIT_RXCIE1) | BV(BIT_UDRIE1) | BV(BIT_RXEN1) | BV(BIT_TXEN1); + + SER_STROBE_OFF; +} +#endif /* SER_UART1_BUS_TXOFF */ + +#endif // AVR_HAS_UART1 + +#if AVR_HAS_UART2 + +/** + * Serial 2 TX interrupt handler + */ +DECLARE_ISR(USART2_UDRE_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART2]->txfifo; + + if (fifo_isempty(txfifo)) + { + SER_UART2_BUS_TXEND; +#ifndef SER_UART2_BUS_TXOFF + UARTDescs[SER_UART2].sending = false; +#endif + } + else + { + char c = fifo_pop(txfifo); + SER_UART2_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +#ifdef SER_UART2_BUS_TXOFF +/** + * Serial port 2 TX complete interrupt handler. + * + * \sa port 0 TX complete handler. + */ +DECLARE_ISR(USART2_TX_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART2]->txfifo; + if (fifo_isempty(txfifo)) + { + SER_UART2_BUS_TXOFF; + UARTDescs[SER_UART2].sending = false; + } + else + UCSR2B = BV(BIT_RXCIE2) | BV(BIT_UDRIE2) | BV(BIT_RXEN2) | BV(BIT_TXEN2); + + SER_STROBE_OFF; +} +#endif /* SER_UART2_BUS_TXOFF */ + +#endif // AVR_HAS_UART2 + +#if AVR_HAS_UART3 + +/** + * Serial 3 TX interrupt handler + */ +DECLARE_ISR(USART3_UDRE_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART3]->txfifo; + + if (fifo_isempty(txfifo)) + { + SER_UART3_BUS_TXEND; +#ifndef SER_UART3_BUS_TXOFF + UARTDescs[SER_UART3].sending = false; +#endif + } + else + { + char c = fifo_pop(txfifo); + SER_UART3_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +#ifdef SER_UART3_BUS_TXOFF +/** + * Serial port 3 TX complete interrupt handler. + * + * \sa port 0 TX complete handler. + */ +DECLARE_ISR(USART3_TX_vect) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART3]->txfifo; + if (fifo_isempty(txfifo)) + { + SER_UART3_BUS_TXOFF; + UARTDescs[SER_UART3].sending = false; + } + else + UCSR3B = BV(BIT_RXCIE3) | BV(BIT_UDRIE3) | BV(BIT_RXEN3) | BV(BIT_TXEN3); + + SER_STROBE_OFF; +} +#endif /* SER_UART3_BUS_TXOFF */ + +#endif // AVR_HAS_UART3 + + +/** + * Serial 0 RX complete interrupt handler. + * + * This handler is interruptible. + * Interrupt are reenabled as soon as recv complete interrupt is + * disabled. Using INTERRUPT() is troublesome when the serial + * is heavily loaded, because an interrupt could be retriggered + * when executing the handler prologue before RXCIE is disabled. + * + * \note The code that re-enables interrupts is commented out + * because in some nasty cases the interrupt is retriggered. + * This is probably due to the RXC flag being set before + * RXCIE is cleared. Unfortunately the RXC flag is read-only + * and can't be cleared by code. + */ +DECLARE_ISR(USART0_RX_vect) +{ + SER_STROBE_ON; + + /* Disable Recv complete IRQ */ + //UCSR0B &= ~BV(RXCIE); + //IRQ_ENABLE; + + /* Should be read before UDR */ + ser_handles[SER_UART0]->status |= UCSR0A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + + /* To clear the RXC flag we must _always_ read the UDR even when we're + * not going to accept the incoming data, otherwise a new interrupt + * will occur once the handler terminates. + */ + char c = UDR0; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART0]->rxfifo; + + if (fifo_isfull(rxfifo)) + ser_handles[SER_UART0]->status |= SERRF_RXFIFOOVERRUN; + else + { + fifo_push(rxfifo, c); +#if CONFIG_SER_HWHANDSHAKE + if (fifo_isfull(rxfifo)) + RTS_OFF; +#endif + } + + /* Reenable receive complete int */ + //IRQ_DISABLE; + //UCSR0B |= BV(RXCIE); + + SER_STROBE_OFF; +} + + +#if AVR_HAS_UART1 + +/** + * Serial 1 RX complete interrupt handler. + * + * This handler is interruptible. + * Interrupt are reenabled as soon as recv complete interrupt is + * disabled. Using INTERRUPT() is troublesome when the serial + * is heavily loaded, because an interrupt could be retriggered + * when executing the handler prologue before RXCIE is disabled. + * + * \see DECLARE_ISR(USART1_RX_vect) + */ +DECLARE_ISR(USART1_RX_vect) +{ + SER_STROBE_ON; + + /* Disable Recv complete IRQ */ + //UCSR1B &= ~BV(RXCIE); + //IRQ_ENABLE; + + /* Should be read before UDR */ + ser_handles[SER_UART1]->status |= UCSR1A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + + /* To avoid an IRQ storm, we must _always_ read the UDR even when we're + * not going to accept the incoming data + */ + char c = UDR1; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART1]->rxfifo; + //ASSERT_VALID_FIFO(rxfifo); + + if (UNLIKELY(fifo_isfull(rxfifo))) + ser_handles[SER_UART1]->status |= SERRF_RXFIFOOVERRUN; + else + { + fifo_push(rxfifo, c); +#if CONFIG_SER_HWHANDSHAKE + if (fifo_isfull(rxfifo)) + RTS_OFF; +#endif + } + /* Re-enable receive complete int */ + //IRQ_DISABLE; + //UCSR1B |= BV(RXCIE); + + SER_STROBE_OFF; +} + +#endif // AVR_HAS_UART1 + +#if AVR_HAS_UART2 + +/** + * Serial 2 RX complete interrupt handler. + * + * This handler is interruptible. + * Interrupt are reenabled as soon as recv complete interrupt is + * disabled. Using INTERRUPT() is troublesome when the serial + * is heavily loaded, because an interrupt could be retriggered + * when executing the handler prologue before RXCIE is disabled. + * + * \see DECLARE_ISR(USART2_RX_vect) + */ +DECLARE_ISR(USART2_RX_vect) +{ + SER_STROBE_ON; + + /* Disable Recv complete IRQ */ + //UCSR1B &= ~BV(RXCIE); + //IRQ_ENABLE; + + /* Should be read before UDR */ + ser_handles[SER_UART2]->status |= UCSR2A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + + /* To avoid an IRQ storm, we must _always_ read the UDR even when we're + * not going to accept the incoming data + */ + char c = UDR2; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART2]->rxfifo; + //ASSERT_VALID_FIFO(rxfifo); + + if (UNLIKELY(fifo_isfull(rxfifo))) + ser_handles[SER_UART2]->status |= SERRF_RXFIFOOVERRUN; + else + { + fifo_push(rxfifo, c); +#if CONFIG_SER_HWHANDSHAKE + if (fifo_isfull(rxfifo)) + RTS_OFF; +#endif + } + /* Re-enable receive complete int */ + //IRQ_DISABLE; + //UCSR1B |= BV(RXCIE); + + SER_STROBE_OFF; +} + +#endif // AVR_HAS_UART2 + +#if AVR_HAS_UART3 + +/** + * Serial 3 RX complete interrupt handler. + * + * This handler is interruptible. + * Interrupt are reenabled as soon as recv complete interrupt is + * disabled. Using INTERRUPT() is troublesome when the serial + * is heavily loaded, because an interrupt could be retriggered + * when executing the handler prologue before RXCIE is disabled. + * + * \see DECLARE_ISR(USART3_RX_vect) + */ +DECLARE_ISR(USART3_RX_vect) +{ + SER_STROBE_ON; + + /* Disable Recv complete IRQ */ + //UCSR1B &= ~BV(RXCIE); + //IRQ_ENABLE; + + /* Should be read before UDR */ + ser_handles[SER_UART3]->status |= UCSR3A & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + + /* To avoid an IRQ storm, we must _always_ read the UDR even when we're + * not going to accept the incoming data + */ + char c = UDR3; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART3]->rxfifo; + //ASSERT_VALID_FIFO(rxfifo); + + if (UNLIKELY(fifo_isfull(rxfifo))) + ser_handles[SER_UART3]->status |= SERRF_RXFIFOOVERRUN; + else + { + fifo_push(rxfifo, c); +#if CONFIG_SER_HWHANDSHAKE + if (fifo_isfull(rxfifo)) + RTS_OFF; +#endif + } + /* Re-enable receive complete int */ + //IRQ_DISABLE; + //UCSR1B |= BV(RXCIE); + + SER_STROBE_OFF; +} + +#endif // AVR_HAS_UART3 + + +/** + * SPI interrupt handler + */ +DECLARE_ISR(SPI_STC_vect) +{ + SER_STROBE_ON; + + /* Read incoming byte. */ + if (!fifo_isfull(&ser_handles[SER_SPI]->rxfifo)) + fifo_push(&ser_handles[SER_SPI]->rxfifo, SPDR); + /* + * FIXME + else + ser_handles[SER_SPI]->status |= SERRF_RXFIFOOVERRUN; + */ + + /* Send */ + if (!fifo_isempty(&ser_handles[SER_SPI]->txfifo)) + SPDR = fifo_pop(&ser_handles[SER_SPI]->txfifo); + else + UARTDescs[SER_SPI].sending = false; + + SER_STROBE_OFF; +} diff --git a/bertos/cpu/avr/drv/ser_mega.h b/bertos/cpu/avr/drv/ser_mega.h new file mode 100644 index 0000000..5668305 --- /dev/null +++ b/bertos/cpu/avr/drv/ser_mega.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * \author Luca Ottaviano + * + * \brief Low-level serial module for AVR MEGA(interface). + * + */ + +#ifndef DRV_SER_MEGA_H +#define DRV_SER_MEGA_H + +#include /* BV() */ +#include /* uint32_t */ + +typedef uint8_t serstatus_t; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ +#define SERRF_RXTIMEOUT BV(5) /**< Receive timeout */ +#define SERRF_TXTIMEOUT BV(6) /**< Transmit timeout */ + +/* +* Hardware errors. +* These flags map directly to the AVR UART Status Register (USR). +*/ +#define SERRF_RXSROVERRUN BV(3) /**< Rx shift register overrun */ +#define SERRF_FRAMEERROR BV(4) /**< Stop bit missing */ +#define SERRF_PARITYERROR BV(7) /**< Parity error */ +#define SERRF_NOISEERROR 0 /**< Unsupported */ + + +/** + * SPI clock polarity. + * + * $WIZ$ ser_spi_pol = "SPI_NORMAL_LOW", "SPI_NORMAL_HIGH" + * } + */ +#define SPI_NORMAL_LOW 0 +#define SPI_NORMAL_HIGH 1 + +/** + * SPI clock phase. + * + * $WIZ$ ser_spi_phase = "SPI_SAMPLE_ON_FIRST_EDGE", "SPI_SAMPLE_ON_SECOND_EDGE" + * } + */ +#define SPI_SAMPLE_ON_FIRST_EDGE 0 +#define SPI_SAMPLE_ON_SECOND_EDGE 1 + +/** + * \name Serial hw numbers + * + * \{ + */ +enum +{ +#if CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + SER_UART0, + SER_UART1, + SER_UART2, + SER_UART3, + SER_SPI, +#elif CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA1281 + SER_UART0, + SER_UART1, + SER_SPI, +#elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8 || CPU_AVR_ATMEGA32 || CPU_AVR_ATMEGA168 \ + || CPU_AVR_ATMEGA328P + SER_UART0, + SER_SPI, +#else + #error unknown architecture +#endif + SER_CNT /**< Number of serial ports */ +}; +/*\}*/ + +#endif /* DRV_SER_MEGA_H */ diff --git a/bertos/cpu/avr/drv/ser_simple_avr.c b/bertos/cpu/avr/drv/ser_simple_avr.c new file mode 100644 index 0000000..3151034 --- /dev/null +++ b/bertos/cpu/avr/drv/ser_simple_avr.c @@ -0,0 +1,171 @@ +/** + * \file + * + * + * \brief Simple serial I/O driver + * + * \author Francesco Sacchi + */ + + +#warning FIXME:This module is obsolete, yuo must refactor it. + +#if 0 +#include "ser_simple_avr.h" + +#include +#include +#include /* BV() */ +#include + +#include + +/** + * Send a character over the serial line. + * + * \return the character sent. + */ +int _ser_putchar(int c) +{ + /* Disable Rx to avoid echo*/ + UCSR0B &= ~BV(RXEN); + /* Enable tx*/ + UCSR0B |= BV(TXEN); + /* Prepare transmission */ + UDR0 = c; + /* Wait until byte sent */ + while (!(UCSR0A & BV(TXC))) {} + /* Disable tx to avoid short circuit when tx and rx share the same wire. */ + UCSR0B &= ~BV(TXEN); + /* Enable Rx */ + UCSR0B |= BV(RXEN); + /* Delete TRANSMIT_COMPLETE_BIT flag */ + UCSR0A |= BV(TXC); + return c; +} + + +/** + * Get a character from the serial line. + * If ther is no character in the buffer this function wait until + * one is received (no timeout). + * + * \return the character received. + */ +int _ser_getchar(void) +{ + /* Wait for data */ + while (!(UCSR0A & BV(RXC))) {} + return UDR0; + +} + + +/** + * Get a character from the receiver buffer + * If the buffer is empty, ser_getchar_nowait() returns + * immediatly EOF. + */ +int _ser_getchar_nowait(void) +{ + if (!(UCSR0A & BV(RXC))) return EOF; + else return UDR0; +} + +void _ser_settimeouts(void) +{ +} + +/** + * Set the baudrate. + */ +void _ser_setbaudrate(unsigned long rate) +{ + /* Compute baud-rate period */ + uint16_t period = DIV_ROUND(CPU_FREQ / 16UL, rate) - 1; + + UBRR0H = (period) >> 8; + UBRR0L = (period); +} + +/** + * Send a string. + */ +int _ser_print(const char *s) +{ + while(*s) _ser_putchar(*s++); + return 0; +} + + +void _ser_setparity(int parity) +{ + /* Set the new parity */ + UCSR0C |= (UCSR0C & ~(BV(UPM1) | BV(UPM0))) | (parity << UPM0); +} + +/** + * Dummy functions. + */ +void _ser_purge(void) +{ + while (_ser_getchar_nowait() != EOF) {} +} + +/** + * Initialize serial. + */ +struct Serial * _ser_open(void) +{ + /* + * Set Rx and Tx pins as input to avoid short + * circuit when serial is disabled. + */ + DDRE &= ~(BV(PE0)|BV(PE1)); + PORTE &= ~BV(PE0); + PORTE |= BV(PE1); + /* Enable only Rx section */ + UCSR0B = BV(RXEN); + return NULL; +} + + +/** + * Clean up serial port, disabling the associated hardware. + */ +void _ser_close(void) +{ + /* Disable Rx & Tx. */ + UCSR0B &= ~(BV(RXEN) | BV(TXEN)); +} + +#endif + diff --git a/bertos/cpu/avr/drv/ser_simple_avr.h b/bertos/cpu/avr/drv/ser_simple_avr.h new file mode 100644 index 0000000..474987d --- /dev/null +++ b/bertos/cpu/avr/drv/ser_simple_avr.h @@ -0,0 +1,150 @@ +/** + * \file + * + * + * \brief Simple serial I/O driver + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#ifndef DRV_SER_SIMPLE_AVR_H +#define DRV_SER_SIMPLE_AVR_H + +#warning FIXME:This module is obsolete, yuo must refactor it. + +#if 0 +/* For checking which serial driver is linked */ +#define SER_SIMPLE + +#include +#include + + +#if 0 +#if CPU_AVR + typedef uint8_t serstatus_t; + + /* Software errors */ + #define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ + #define SERRF_RXTIMEOUT BV(5) /**< Receive timeout */ + #define SERRF_TXTIMEOUT BV(6) /**< Transmit timeout */ + + /* Hardware errors */ + #define SERRF_RXSROVERRUN BV(3) /**< Rx shift register overrun */ + #define SERRF_FRAMEERROR BV(4) /**< Stop bit missing */ + #define SERRF_PARITYERROR BV(7) /**< Parity error */ +#else + #error unknown architecture +#endif +/*\}*/ + +/** + * \name Serial hw numbers + * + * \{ + */ +enum +{ +#if CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA128 + SER_UART0, + SER_UART1, + SER_SPI, +#elif CPU_AVR_ATMEGA103 || CPU_AVR_ATMEGA8 + SER_UART0, + SER_SPI, +#else + #error unknown architecture +#endif + SER_CNT /**< Number of serial ports */ +}; +/*\}*/ +#endif + +/** \name Parity settings for ser_setparity() */ +/*\{*/ +#define SER_PARITY_NONE 0 +#define SER_PARITY_EVEN 2 +#define SER_PARITY_ODD 3 +/*\}*/ + + +/** Serial handle structure */ +struct Serial; + +/* Function prototypes */ +extern int _ser_putchar(int c); +extern int _ser_getchar(void); +extern int _ser_getchar_nowait(void); +/* +extern int ser_write(struct Serial *port, const void *buf, size_t len); +extern int ser_read(struct Serial *port, void *buf, size_t size); + +extern int ser_printf(struct Serial *port, const char *format, ...) FORMAT(__printf__, 2, 3); + +extern int ser_gets(struct Serial *port, char *buf, int size); +extern int ser_gets_echo(struct Serial *port, char *buf, int size, bool echo); +*/ +extern int _ser_print(const char *s); + +extern void _ser_setbaudrate(unsigned long rate); +extern void _ser_setparity(int parity); +extern void _ser_settimeouts(void); +extern void _ser_setstatus(void); +/* +extern void ser_resync(struct Serial *port, time_t delay); +extern void ser_drain(struct Serial *port); +*/ +extern void _ser_purge(void); +extern struct Serial *_ser_open(void); +extern void _ser_close(void); + +/** + * \name Functions implemented as macros + * + * \{ + */ +#define ser_putchar(c, port) _ser_putchar(c) +#define ser_getchar(port) _ser_getchar() +#define ser_getchar_nowait(port) _ser_getchar_nowait() +#define ser_print(port, s) _ser_print(s) +#define ser_setbaudrate(port, y) _ser_setbaudrate(y) +#define ser_setparity(port, par) _ser_setparity(par) +#define ser_settimeouts(port, y, z) _ser_settimeouts() +#define ser_purge(port) _ser_purge() +#define ser_open(port) _ser_open() +#define ser_getstatus(h) 0 +#define ser_setstatus(h, x) do {(void)(x);} while(0) +/* \} */ + +#endif /* DRV_SER_SIMPLE_AVR_H */ + +#endif diff --git a/bertos/cpu/avr/drv/ser_xmega.c b/bertos/cpu/avr/drv/ser_xmega.c new file mode 100644 index 0000000..9b1e2c1 --- /dev/null +++ b/bertos/cpu/avr/drv/ser_xmega.c @@ -0,0 +1,736 @@ +/** + * \file + * + * + * \brief AVR XMEGA USART driver (Implementation) + * + * This file is heavily inspired by the AVR implementation for BeRTOS, + * but uses a different approach for implementing the different debug + * ports, by using the USART_t structs. + * + * \author Onno + * notest:all + */ + +#include "hw/hw_ser.h" /* Required for bus macros overrides */ +#include /* CPU_FREQ */ + +#include "cfg/cfg_ser.h" /* Serialport configuration settings */ + +#include /* DIV_ROUND */ +#include /* debug configuration */ + +#include +#include +#include + +#include + +#include /* AVR IO ports and structures */ +#include /* AVR Interrupt methods */ + +/* + * Scalefactor to use for computing the baudrate + * this scalefactor should be an integer value between -7 + * and 7 + */ +#ifndef USART_SCALE_FACTOR + #define USART_SCALE_FACTOR (-7) +#else + #if USART_SCALE_FACTOR > 7 || USART_SCALE_FACTOR < -7 + #error USART_SCALE_FACTOR should be an integer between -7 and 7 + #endif +#endif + +/* Helper macros, mostly taken from the Atmel Examples + * Slightly alterd to match the BeRTOS naming convention + */ + +/* \brief Set USART baud rate. + * + * Sets the USART's baud rate register. + * + * UBRR_Value : Value written to UBRR + * ScaleFactor : Time Base Generator Scale Factor + * + * Equation for calculation of BSEL value in asynchronous normal speed mode: + * If ScaleFactor >= 0 + * BSEL = ((I/O clock frequency)/(2^(ScaleFactor)*16*Baudrate))-1 + * If ScaleFactor < 0 + * BSEL = (1/(2^(ScaleFactor)*16))*(((I/O clock frequency)/Baudrate)-1) + * + * \note See XMEGA manual for equations for calculation of BSEL value in other + * modes. + * + * \param _usart Pointer to the USART module. + * \param _bselValue Value to write to BSEL part of Baud control register. + * Use uint16_t type. + * \param _bScaleFactor USART baud rate scale factor. + * Use uint8_t type + */ +#define USART_SET_BAUDRATE(_usart, _bselValue, _bScaleFactor) \ + (_usart)->BAUDCTRLA =(uint8_t)_bselValue; \ + (_usart)->BAUDCTRLB =(_bScaleFactor << USART_BSCALE0_bp)|(_bselValue >> 8) + +/* \brief Enable USART receiver. + * + * \param _usart Pointer to the USART module + */ +#define USART_RX_ENABLE(_usart) ((_usart)->CTRLB |= USART_RXEN_bm) + +/* \brief Disable USART receiver. + * + * \param _usart Pointer to the USART module. + */ +#define USART_RX_DISABLE(_usart) ((_usart)->CTRLB &= ~USART_RXEN_bm) + +/* \brief Enable USART transmitter. + * + * \param _usart Pointer to the USART module. + */ +#define USART_TX_ENABLE(_usart) ((_usart)->CTRLB |= USART_TXEN_bm) + +/* \brief Disable USART transmitter. + * + * \param _usart Pointer to the USART module. + */ +#define USART_TX_DISABLE(_usart) ((_usart)->CTRLB &= ~USART_TXEN_bm) + +/* \brief Set USART RXD interrupt level. + * + * Sets the interrupt level on RX Complete interrupt. + * + * \param _usart Pointer to the USART module. + * \param _rxdIntLevel Interrupt level of the RXD interrupt. + * Use USART_RXCINTLVL_t type. + */ +#define USART_SET_RX_INTERRUPT_LEVEL(_usart, _rxdIntLevel) \ + ((_usart)->CTRLA = ((_usart)->CTRLA & ~USART_RXCINTLVL_gm) | _rxdIntLevel) + +/* \brief Set USART TXD interrupt level. + * + * Sets the interrupt level on TX Complete interrupt. + * + * \param _usart Pointer to the USART module. + * \param _txdIntLevel Interrupt level of the TXD interrupt. + * Use USART_TXCINTLVL_t type. + */ +#define USART_SET_TX_INTERRUPT_LEVEL(_usart, _txdIntLevel) \ + (_usart)->CTRLA = ((_usart)->CTRLA & ~USART_TXCINTLVL_gm) | _txdIntLevel + +/* \brief Set USART DRE interrupt level. + * + * Sets the interrupt level on Data Register interrupt. + * + * \param _usart Pointer to the USART module. + * \param _dreIntLevel Interrupt level of the DRE interrupt. + * Use USART_DREINTLVL_t type. + */ +#define USART_SET_DRE_INTERRUPT_LEVEL(_usart, _dreIntLevel) \ + (_usart)->CTRLA = ((_usart)->CTRLA & ~USART_DREINTLVL_gm) | _dreIntLevel + +/* \brief Set the mode the USART run in. + * + * Set the mode the USART run in. The default mode is asynchronous mode. + * + * \param _usart Pointer to the USART module register section. + * \param _usartMode Selects the USART mode. Use USART_CMODE_t type. + * + * USART modes: + * - 0x0 : Asynchronous mode. + * - 0x1 : Synchronous mode. + * - 0x2 : IrDA mode. + * - 0x3 : Master SPI mode. + */ +#define USART_SET_MODE(_usart, _usartMode) \ + ((_usart)->CTRLC = ((_usart)->CTRLC & (~USART_CMODE_gm)) | _usartMode) + +/* \brief Check if data register empty flag is set. + * + * \param _usart The USART module. + */ +#define USART_IS_TX_DATA_REGISTER_EMPTY(_usart) (((_usart)->STATUS & USART_DREIF_bm) != 0) + +/* \brief Put data (5-8 bit character). + * + * Use the macro USART_IsTXDataRegisterEmpty before using this function to + * put data to the TX register. + * + * \param _usart The USART module. + * \param _data The data to send. + */ +#define USART_PUT_CHAR(_usart, _data) ((_usart)->DATA = _data) + +/* \brief Checks if the RX complete interrupt flag is set. + * + * Checks if the RX complete interrupt flag is set. + * + * \param _usart The USART module. + */ +#define USART_IS_RX_COMPLETE(_usart) (((_usart)->STATUS & USART_RXCIF_bm) != 0) + +/* \brief Get received data (5-8 bit character). + * + * This macro reads out the RX register. + * Use the macro USART_RX_Complete to check if anything is received. + * + * \param _usart The USART module. + * + * \retval Received data. + */ +#define USART_GET_CHAR(_usart) ((_usart)->DATA) + +/* configurable macros */ + +#if !CONFIG_SER_HWHANDSHAKE + /** + * \name Hardware handshake (RTS/CTS). + * \{ + */ + #define RTS_ON do {} while (0) + #define RTS_OFF do {} while (0) + #define IS_CTS_ON true + #define EIMSKF_CTS 0 /**< Dummy value, must be overridden */ + /*\}*/ +#endif + +/* + * \name Overridable serial bus hooks + * + * These can be redefined in hw.h to implement + * special bus policies such as half-duplex, 485, etc. + * + * + * \code + * TXBEGIN TXCHAR TXEND TXOFF + * | __________|__________ | | + * | | | | | | | | | + * v v v v v v v v v + * ______ __ __ __ __ __ __ ________________ + * \/ \/ \/ \/ \/ \/ \/ + * ______/\__/\__/\__/\__/\__/\__/ + * + * \endcode + * + * \{ + */ + +#ifndef SER_UART_BUS_TXINIT + /* + * Default TXINIT macro - invoked in uart_init() + * + * - Enable both the receiver and the transmitter + * - Enable only the RX complete interrupt + */ + #define SER_UART_BUS_TXINIT(_usart) do { \ + USART_RX_ENABLE(_usart); \ + USART_TX_ENABLE(_usart); \ + USART_SET_RX_INTERRUPT_LEVEL(_usart, USART_RXCINTLVL_MED_gc); \ + } while (0) +#endif + +#ifndef SER_UART_BUS_TXBEGIN + /* + * Invoked before starting a transmission + * + * - Enable both the receiver and the transmitter + * - Enable both the RX complete and UDR empty interrupts + */ + #define SER_UART_BUS_TXBEGIN(_usart) do { \ + USART_SET_RX_INTERRUPT_LEVEL(_usart, USART_RXCINTLVL_MED_gc); \ + USART_SET_DRE_INTERRUPT_LEVEL(_usart, USART_DREINTLVL_MED_gc);\ + } while (0) +#endif + +#ifndef SER_UART_BUS_TXCHAR + /* + * Invoked to send one character. + */ + #define SER_UART_BUS_TXCHAR(_usart, c) do { \ + USART_PUT_CHAR(_usart, c); \ + } while (0) +#endif + +#ifndef SER_UART_BUS_TXEND + /* + * Invoked as soon as the txfifo becomes empty + * + * - Keep both the receiver and the transmitter enabled + * - Keep the RX complete interrupt enabled + * - Disable the UDR empty interrupt + */ + #define SER_UART_BUS_TXEND(_usart) do { \ + USART_SET_DRE_INTERRUPT_LEVEL(_usart, USART_DREINTLVL_OFF_gc); \ + } while (0) +#endif + +#ifndef SER_UART_BUS_TXOFF + /* + * \def SER_UART_BUS_TXOFF + * + * Invoked after the last character has been transmitted + * + * The default is no action. + */ + #ifdef __doxygen__ + #define SER_UART_BUS_TXOFF(_usart) + #endif +#endif + +/*\}*/ + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +/* TX and RX buffers */ +static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE]; +static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE]; +static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE]; +static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE]; +#ifdef CPU_AVR_XMEGA_A +static unsigned char uart2_txbuffer[CONFIG_UART2_TXBUFSIZE]; +static unsigned char uart2_rxbuffer[CONFIG_UART2_RXBUFSIZE]; +static unsigned char uart3_txbuffer[CONFIG_UART3_TXBUFSIZE]; +static unsigned char uart3_rxbuffer[CONFIG_UART3_RXBUFSIZE]; +static unsigned char uart4_txbuffer[CONFIG_UART4_TXBUFSIZE]; +static unsigned char uart4_rxbuffer[CONFIG_UART4_RXBUFSIZE]; +#endif + +/* + * Internal hardware state structure + * + * The \a sending variable is true while the transmission + * interrupt is retriggering itself. + * + * the \a usart variable will point to the USART_t structure + * that should be used. + * + * the \a port variable will point to the PORT_t structure + * that should be modified to set the tx pin as an output and the + * rx pin as an input + * + * the \a txpin variable will hold the pinnumber of the pin to use + * as the tx output + * + * the \a rxpin variable will hold the pinnumber of the pin to use + * as the rx input + * + * For the USARTs the \a sending flag is useful for taking specific + * actions before sending a burst of data, at the start of a trasmission + * but not before every char sent. + * + * For the SPI, this flag is necessary because the SPI sends and receives + * bytes at the same time and the SPI IRQ is unique for send/receive. + * The only way to start transmission is to write data in SPDR (this + * is done by spi_starttx()). We do this *only* if a transfer is + * not already started. + */ +struct AvrxmegaSerial +{ + struct SerialHardware hw; + volatile bool sending; + volatile USART_t* usart; + volatile PORT_t* port; + uint8_t txpin; + uint8_t rxpin; +}; + +/* + * Callbacks + * The same callbacks are used for all USARTS. + * By casting the SerialHardware structure to the AvrxmegaSerial + * structure a pointer to the USART_t structure can be obtained, + * to perform the callback for the specific USART. + * This methode might cost some more cpu time, but saves on + * code duplication and code size. + */ + + +/* + * \brief Initializes the uart + * + * The TX pin of the uart will be set as an outputpin + * The RX pin of the uart will be set as an inputpin + * The usart will be initialized + * \see SER_UART_BUS_TXINIT + * + * \param _hw struct AvrxmegaSerial + * \param ser Unused + */ +static void uart_init(struct SerialHardware * _hw, UNUSED_ARG(struct Serial *, ser)) +{ + struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw; + //set transmit pin as output + hw->port->DIRSET = BV(hw->txpin); + hw->port->OUTCLR = BV(hw->txpin); + //set receive pin as input + hw->port->DIRCLR = BV(hw->rxpin); + //initialize the USART + SER_UART_BUS_TXINIT(hw->usart); + RTS_ON; + SER_STROBE_INIT; +} + +/* + * \brief Cleans up / Disables the uart + * + * \param _hw struct AvrxmegaSerial + */ +static void uart_cleanup(struct SerialHardware * _hw) +{ + struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw; + hw->usart->CTRLA = 0; + hw->usart->CTRLB = 0; +} + +/* + * \brief Enableds the TX interrupt + * + * \param _hw struct AvrxmegaSerial + */ +static void uart_enabletxirq(struct SerialHardware *_hw) +{ + struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt sets hw->sending to false + * when it runs with an empty fifo. The order of statements in the + * if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + SER_UART_BUS_TXBEGIN(hw->usart); + } +} + +/* + * \brief sets the uart to the provided baudrate + * + * For setting the baudrate an scale factor (bscale) and a period + * setting (BSEL) is required. + * + * The scale factor should be privided by defining USART_SCALE_FACTOR + * + * Atmel specifies BSEL for normal speed mode and bscale >= 0 as: + * BSEL = (cpu_freq / ((2^bscale) * 16 * rate)) - 1 + * To allow BSEL to be calculated with an power function this can be + * rewriten to: + * BSEL = BSEL = (cpu_freq / ((1 << bscale) * 16 * rate)) - 1 + * + * Atmel specifies BSEL for normal speed mode and bscale < 0 as: + * BSEL = (1 / (2^bscale)) * ( (cpu_freq / (16 * rate)) - 1) + * To calculte this float atheritmic is required as the second product will be smaller + * than zero in a lot of cases. + * To allow BSEL to be calculated with interger devision and no power function + * this can be rewriten by folowing simple math rules to: + * BSEL = ((1 << -bscale) * (cpu_freq - (16 * rate)) / (16 * rate) + * + * \param _hw struct AvrxmegaSerial + * \param _rate the required baudrate + * + */ +static void uart_setbaudrate(struct SerialHardware * _hw, unsigned long _rate) +{ + struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw; + /* Compute baud-rate period, this requires a valid USART_SCALE_FACTOR */ + #if USART_SCALE_FACTOR < 0 + uint16_t bsel = DIV_ROUND((1 << (-(USART_SCALE_FACTOR))) * (CPU_FREQ - (16 * _rate)), 16 * _rate); + #else + uint16_t bsel = DIV_ROUND(CPU_FREQ, (1 << (USART_SCALE_FACTOR)) * 16 * _rate) - 1; + #endif + USART_SET_BAUDRATE(hw->usart, bsel, USART_SCALE_FACTOR); +} + +/* + * \brief Sets the parity of the uart + * + * \param _hw struct AvrxmegaSerial + * \param _parity the parity to set + */ +static void uart_setparity(struct SerialHardware * _hw, int _parity) +{ + struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw; + USART_SET_MODE(hw->usart, _parity); +} + +/* + * \brief Returns true if Transmitter is sending + * + * \param _hw struct AvrxmegaSerial + * \return true if transmitter is sending + */ +static bool tx_sending(struct SerialHardware* _hw) +{ + struct AvrxmegaSerial *hw = (struct AvrxmegaSerial *)_hw; + return hw->sending; +} + + +// FIXME: move into compiler.h? Ditch? +#if COMPILER_C99 + #define C99INIT(name,val) .name = val +#elif defined(__GNUC__) + #define C99INIT(name,val) name: val +#else + #warning No designated initializers, double check your code + #define C99INIT(name,val) (val) +#endif + +/* + * High-level interface data structures + */ +static const struct SerialHardwareVT UART_VT = +{ + C99INIT(init, uart_init), + C99INIT(cleanup, uart_cleanup), + C99INIT(setBaudrate, uart_setbaudrate), + C99INIT(setParity, uart_setparity), + C99INIT(txStart, uart_enabletxirq), + C99INIT(txSending, tx_sending) +}; + +static struct AvrxmegaSerial UARTDescs[SER_CNT] = +{ + { + C99INIT(hw, /**/) { + C99INIT(table, &UART_VT), + C99INIT(txbuffer, uart0_txbuffer), + C99INIT(rxbuffer, uart0_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)), + }, + C99INIT(sending, false), + C99INIT(usart, &USARTC0), + C99INIT(port, &PORTC), + C99INIT(txpin, PIN3_bp), + C99INIT(rxpin, PIN2_bp), + }, + { + C99INIT(hw, /**/) { + C99INIT(table, &UART_VT), + C99INIT(txbuffer, uart1_txbuffer), + C99INIT(rxbuffer, uart1_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)), + }, + C99INIT(sending, false), + C99INIT(usart, &USARTD0), + C99INIT(port, &PORTD), + C99INIT(txpin, PIN3_bp), + C99INIT(rxpin, PIN2_bp), + }, +#ifdef CPU_AVR_XMEGA_A + { + C99INIT(hw, /**/) { + C99INIT(table, &UART_VT), + C99INIT(txbuffer, uart2_txbuffer), + C99INIT(rxbuffer, uart2_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart2_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart2_rxbuffer)), + }, + C99INIT(sending, false), + C99INIT(usart, &USARTC1), + C99INIT(port, &PORTC), + C99INIT(txpin, PIN7_bp), + C99INIT(rxpin, PIN6_bp), + }, + { + C99INIT(hw, /**/) { + C99INIT(table, &UART_VT), + C99INIT(txbuffer, uart3_txbuffer), + C99INIT(rxbuffer, uart3_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart3_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart3_rxbuffer)), + }, + C99INIT(sending, false), + C99INIT(usart, &USARTD1), + C99INIT(port, &PORTD), + C99INIT(txpin, PIN7_bp), + C99INIT(rxpin, PIN6_bp), + }, + { + C99INIT(hw, /**/) { + C99INIT(table, &UART_VT), + C99INIT(txbuffer, uart4_txbuffer), + C99INIT(rxbuffer, uart4_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart4_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart4_rxbuffer)), + }, + C99INIT(sending, false), + C99INIT(usart, &USARTE0), + C99INIT(port, &PORTE), + C99INIT(txpin, PIN3_bp), + C99INIT(rxpin, PIN2_bp), + }, +#endif //CPU_AVR_XMEGA_A +}; + +struct SerialHardware *ser_hw_getdesc(int unit) +{ + ASSERT(unit < SER_CNT); + return &UARTDescs[unit].hw; +} + + +/* + * Interrupt handlers + */ +static inline void usart_handleDreInterrupt(uint8_t usartNumber) +{ + SER_STROBE_ON; + struct FIFOBuffer * const txfifo = &ser_handles[usartNumber]->txfifo; + if (fifo_isempty(txfifo)) + { + SER_UART_BUS_TXEND(UARTDescs[usartNumber].usart); + #ifndef SER_UART_BUS_TXOFF + UARTDescs[usartNumber].sending = false; + #endif + } + else + { + char c = fifo_pop(txfifo); + SER_UART_BUS_TXCHAR(UARTDescs[usartNumber].usart, c); + } + SER_STROBE_OFF; +} + +#define USART_DRE_INTERRUPT_VECTOR(_vector, _usart) \ +DECLARE_ISR(_vector) \ +{ \ + usart_handleDreInterrupt( _usart ); \ +} + +USART_DRE_INTERRUPT_VECTOR(USARTC0_DRE_vect, SER_UART0) +USART_DRE_INTERRUPT_VECTOR(USARTD0_DRE_vect, SER_UART1) +#ifdef CPU_AVR_XMEGA_A + USART_DRE_INTERRUPT_VECTOR(USARTC1_DRE_vect, SER_UART2) + USART_DRE_INTERRUPT_VECTOR(USARTD1_DRE_VECT, SER_UART3) + USART_DRE_INTERRUPT_VECTOR(USARTE0_DRE_vect, SER_UART4) +#endif + +#ifdef SER_UART_BUS_TXOFF + static inline void USART_handleTXCInterrupt(uint8_t usartNumber) + { + SER_STROBE_ON; + struct FIFOBuffer * const txfifo = &ser_handles[usartNumber]->txfifo; + if (fifo_isempty(txfifo)) + { + SER_UART_BUS_TXOFF(UARTDescs[usartNumber].usart); + UARTDescs[usartNumber].sending = false; + } + else + { + SER_UART_BUS_TXBEGIN(UARTDescs[usartNumber].usart); + } + SER_STROBE_OFF; + } + + /* + * Serial port 0 TX complete interrupt handler. + * + * This IRQ is usually disabled. The UDR-empty interrupt + * enables it when there's no more data to transmit. + * We need to wait until the last character has been + * transmitted before switching the 485 transceiver to + * receive mode. + * + * The txfifo might have been refilled by putchar() while + * we were waiting for the transmission complete interrupt. + * In this case, we must restart the UDR empty interrupt, + * otherwise we'd stop the serial port with some data + * still pending in the buffer. + */ + #define USART_TXC_INTERRUPT_VECTOR(_vector, _usart) \ + DECLARE_ISR(_vector) \ + { \ + USART_handleTXCInterrupt( _usart ); \ + } + + USART_TXC_INTERRUPT_VECTOR(USARTC0_TXC_vect, SER_UART0) + USART_TXC_INTERRUPT_VECTOR(USARTD0_TXC_vect, SER_UART1) + #ifdef CPU_AVR_XMEGA_A + USART_TXC_INTERRUPT_VECTOR(USARTC1_TXC_vect, SER_UART2) + USART_TXC_INTERRUPT_VECTOR(USARTD1_TXC_vect, SER_UART3) + USART_TXC_INTERRUPT_VECTOR(USARTE0_TXC_vect, SER_UART4) + #endif /* CPU_AVR_XMEGA_A */ +#endif /* SER_UART_BUS_TXOFF */ + +/* + * Serial RX complete interrupt handler. + * + * This handler is interruptible. + * Interrupt are reenabled as soon as recv complete interrupt is + * disabled. Using INTERRUPT() is troublesome when the serial + * is heavily loaded, because an interrupt could be retriggered + * when executing the handler prologue before RXCIE is disabled. + */ +static inline void USART_handleRXCInterrupt(uint8_t usartNumber) +{ + SER_STROBE_ON; + /* read status */ + ser_handles[usartNumber]->status |= (UARTDescs[usartNumber].usart)->STATUS & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + /* To clear the RXC flag we must _always_ read the UDR even when we're + * not going to accept the incoming data, otherwise a new interrupt + * will occur once the handler terminates. + */ + char c = (UARTDescs[usartNumber].usart)->DATA; + struct FIFOBuffer * const rxfifo = &ser_handles[usartNumber]->rxfifo; + if (fifo_isfull(rxfifo)) + { + ser_handles[usartNumber]->status |= SERRF_RXFIFOOVERRUN; + } + else + { + fifo_push(rxfifo, c); + #if CONFIG_SER_HWHANDSHAKE + if (fifo_isfull(rxfifo)) + { + RTS_OFF(UARTDescs[usartNumber].usart); + } + #endif + } + SER_STROBE_OFF; +} + +#define USART_RXC_INTERRUPT_VECTOR(_vector, _usart) \ +DECLARE_ISR(_vector) \ +{ \ + USART_handleRXCInterrupt( _usart ); \ +} +USART_RXC_INTERRUPT_VECTOR(USARTC0_RXC_vect, SER_UART0) +USART_RXC_INTERRUPT_VECTOR(USARTD0_RXC_vect, SER_UART1) +#ifdef CPU_AVR_XMEGA_A + USART_RXC_INTERRUPT_VECTOR(USARTC1_RXC_vect, SER_UART2) + USART_RXC_INTERRUPT_VECTOR(USARTD1_RXC_vect, SER_UART3) + USART_RXC_INTERRUPT_VECTOR(USARTE0_RXC_vect, SER_UART4) +#endif diff --git a/bertos/cpu/avr/drv/ser_xmega.h b/bertos/cpu/avr/drv/ser_xmega.h new file mode 100644 index 0000000..cad8b1e --- /dev/null +++ b/bertos/cpu/avr/drv/ser_xmega.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * + * \brief Low-level serial module for AVR XMEGA (interface). + * + * This file is heavily inspired by the AVR implementation for BeRTOS, + * but uses a different approach for implementing the different debug + * ports, by using the USART_t structs. + * + * \author Onno + * + */ + +#ifndef DRV_SER_XMEGA_H +#define DRV_SER_XMEGA_H + +#include /* BV() */ +#include /* uint8_t */ + +typedef uint8_t serstatus_t; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ +#define SERRF_RXTIMEOUT BV(5) /**< Receive timeout */ +#define SERRF_TXTIMEOUT BV(6) /**< Transmit timeout */ + +/* +* Hardware errors. +* These flags map directly to the AVR XMEGA UART Status Register. +*/ +#define SERRF_RXSROVERRUN BV(3) /**< Rx shift register overrun */ +#define SERRF_FRAMEERROR BV(4) /**< Stop bit missing */ +#define SERRF_PARITYERROR BV(2) /**< Parity error */ +#define SERRF_NOISEERROR 0 /**< Unsupported */ + +/* + * \name Serial hw numbers + * + * \{ + */ +enum +{ + SER_UART0, + SER_UART1, +#ifdef CPU_AVR_XMEGA_A + //the XMEGA A Family have 5 USART ports + SER_UART2, + SER_UART3, + SER_UART4, +#endif + SER_CNT /**< Number of serial ports */ +}; +/*\}*/ + +#endif /* DRV_SER_XMEGA_H */ diff --git a/bertos/cpu/avr/drv/stepper_avr.c b/bertos/cpu/avr/drv/stepper_avr.c new file mode 100644 index 0000000..60cfbc8 --- /dev/null +++ b/bertos/cpu/avr/drv/stepper_avr.c @@ -0,0 +1,87 @@ +/** + * \file + * + * + * \brief Low-level stepper timer module for AVR (inplementation). + * + * + * \author Daniele Basile + * + */ + +#include "stepper_avr.h" + +#include "cfg/cfg_stepper.h" +#include +#include + +#include +#include + + +#warning TODO:This is an example, you must implement it! + +///< Static array of timer counter struct for stepper. +/* + static struct TimerCounter stepper_timers[CONFIG_TC_STEPPER_MAX_NUM] = + { + { //Timer Counter settings for TIO0 output pin + // fill with stepper timer channel settings + } + + // Add here other stepper timer channel settings + }; +*/ + +/** + * Timer couter setup. + * + * This function apply to select timer couter all needed settings. + * Every settings are stored in stepper_timers[]. + */ +void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor) +{ + /* Put here the code to setup the stepper timer drive */ + + //Only for test remove when implement this function + (void)index; + (void)callback; + (void)motor; +} + +/** + * Timer counter init. + */ +void stepper_tc_init(void) +{ + /* Put here the code to init the stepper timer drive */ +} + diff --git a/bertos/cpu/avr/drv/stepper_avr.h b/bertos/cpu/avr/drv/stepper_avr.h new file mode 100644 index 0000000..5517478 --- /dev/null +++ b/bertos/cpu/avr/drv/stepper_avr.h @@ -0,0 +1,140 @@ +/** + * \file + * + * + * \brief Low-level stepper timer module for AVR (inplementation). + * + * + * \author Daniele Basile + * + */ + +#ifndef DRV_STEPPER_AVR_H +#define DRV_STEPPER_AVR_H + + +#include +#include + +#include + +#warning TODO:This is an example, you must implement it! + +/** + * IRQ callback function type definition. + */ +typedef void (*irq_t)(void); + +/** + * Timer contex structure. + */ +typedef struct TimerCounter +{ + int timer_id; ///< Timer counter ID + irq_t isr; ///< IRQ handler + stepper_isr_t callback; ///< Interrupt callback pointer + struct Stepper *motor; ///< Stepper context structure + +} TimerCounter; + +/** + * Enable interrupt for timer counter compare event. + */ +INLINE void stepper_tc_irq_enable(struct TimerCounter *timer) +{ + /* put here code to enable timer irq */ + + //Only for test remove when implement this function + (void)timer; +} + + +/** + * Disable interrupt for timer counter compare event. + */ +INLINE void stepper_tc_irq_disable(struct TimerCounter *timer) +{ + /* put here code to disable timer irq */ + + //Only for test remove when implement this function + (void)timer; +} + +/** + * Set delay for next interrupt compare event. + */ +INLINE void stepper_tc_setDelay(struct TimerCounter *timer, stepper_time_t delay) +{ + /* put here code to set the delay for next irq */ + + //Only for test remove when implement this function + (void)timer; + (void)delay; +} + + +/** + * Set delay for next interrupt compare event. + */ +INLINE void stepper_tc_resetTimer(struct TimerCounter *timer) +{ + /* put here code to reset the timer */ + + //Only for test remove when implement this function + (void)timer; +} + +/** + * Programm timer counter to generate a pulse on select TIO output. + */ +INLINE void FAST_FUNC stepper_tc_doPulse(struct TimerCounter *timer) +{ + /* put here code to generate a pulse */ + + //Only for test remove when implement this function + (void)timer; +} + +/** + * Programm timer counter to not generate a pulse on select TIO output. + */ +INLINE void FAST_FUNC stepper_tc_skipPulse(struct TimerCounter *timer) +{ + /* put here code to skip a pulse */ + + //Only for test remove when implement this function + (void)timer; +} + +void stepper_tc_setup(int index, stepper_isr_t callback, struct Stepper *motor); +void stepper_tc_init(void); + +#endif /*DRV_STEPPER_AVR_H */ diff --git a/bertos/cpu/avr/drv/timer_avr.c b/bertos/cpu/avr/drv/timer_avr.c new file mode 100644 index 0000000..2141cc3 --- /dev/null +++ b/bertos/cpu/avr/drv/timer_avr.c @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \author Onno + * + * \brief Low-level timer module for AVR (implementation). + * + * This module is automatically included so no need to include + * in test list. + * notest: avr + */ + + +#ifndef WIZ_AUTOGEN + #warning This file is deprecated, you should probably use timer_mega.c + + #include + + #if CPU_AVR_MEGA + #include "timer_mega.c" + #elif CPU_AVR_XMEGA + #include "timer_xmega.c" + /*#elif Add other AVR families here */ + #else + #error Unknown CPU + #endif +#endif /* WIZ_AUTOGEN */ + diff --git a/bertos/cpu/avr/drv/timer_avr.h b/bertos/cpu/avr/drv/timer_avr.h new file mode 100644 index 0000000..ecabb9d --- /dev/null +++ b/bertos/cpu/avr/drv/timer_avr.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Low-level timer module for AVR (interface). + * + * \author Onno + * + */ + +#ifndef TIMER_AVR_H_ +#define TIMER_AVR_H_ + +#include + +#if CPU_AVR_MEGA + #include "timer_mega.h" +#elif CPU_AVR_XMEGA + #include "timer_xmega.h" +/*#elif Add other AVR families here */ +#else + #error Unknown CPU +#endif + + +#endif /* TIMER_AVR_H_ */ diff --git a/bertos/cpu/avr/drv/timer_mega.c b/bertos/cpu/avr/drv/timer_mega.c new file mode 100644 index 0000000..8b76045 --- /dev/null +++ b/bertos/cpu/avr/drv/timer_mega.c @@ -0,0 +1,257 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Francesco Sacchi + * \author Luca Ottaviano + * + * \brief Low-level timer module for AVR MEGA (implementation). + * + * This module is automatically included so no need to include + * in test list. + * notest: avr + */ + +#include +#include // BV() + +#include +#include + +#include + +#if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560 + #define REG_TIFR0 TIFR0 + #define REG_TIFR1 TIFR1 + #define REG_TIFR2 TIFR2 + #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + #define REG_TIFR3 TIFR3 + #endif + + #define REG_TIMSK0 TIMSK0 + #define REG_TIMSK1 TIMSK1 + #define REG_TIMSK2 TIMSK2 + #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA2560 + #define REG_TIMSK3 TIMSK3 + #endif + + #define REG_TCCR0A TCCR0A + #define REG_TCCR0B TCCR0B + + #define REG_TCCR2A TCCR2A + #define REG_TCCR2B TCCR2B + + #define REG_OCR0A OCR0A + #define REG_OCR2A OCR2A + + #define BIT_OCF0A OCF0A + #define BIT_OCF2A OCF2A + + #define BIT_OCIE0A OCIE0A + #define BIT_OCIE2A OCIE2A +#else + #define REG_TIFR0 TIFR + #define REG_TIFR1 TIFR + #define REG_TIFR2 TIFR + #define REG_TIFR3 TIFR + + #define REG_TIMSK0 TIMSK + #define REG_TIMSK1 TIMSK + #define REG_TIMSK2 TIMSK + #define REG_TIMSK3 ETIMSK + + #define REG_TCCR0A TCCR0 + #define REG_TCCR0B TCCR0 + + #define REG_TCCR2A TCCR2 + #define REG_TCCR2B TCCR2 + + #define REG_OCR0A OCR0 + #define REG_OCR2A OCR2 + + #define BIT_OCF0A OCF0 + #define BIT_OCF2A OCF2 + + #define BIT_OCIE0A OCIE0 + #define BIT_OCIE2A OCIE2 +#endif + +#if CPU_AVR_ATMEGA128 || CPU_AVR_ATMEGA64 || CPU_AVR_ATMEGA103 + /* These ATMega have different prescaler options. */ + #define TIMER0_PRESCALER_64 BV(CS02) + #define TIMER2_PRESCALER_64 (BV(CS21) | BV(CS20)) +#else + #define TIMER0_PRESCALER_64 (BV(CS01) | BV(CS00)) + #define TIMER2_PRESCALER_64 BV(CS22) +#endif + +/** HW dependent timer initialization */ +#if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0) + + void timer_hw_init(void) + { + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Reset Timer flags */ + REG_TIFR0 = BV(BIT_OCF0A) | BV(TOV0); + + /* Setup Timer/Counter interrupt */ + REG_TCCR0A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to + REG_TCCR0B = 0; + + REG_TCCR0A = BV(WGM01); /* Clear on Compare match */ + #if TIMER_PRESCALER == 64 + REG_TCCR0B |= TIMER0_PRESCALER_64; + #else + #error Unsupported value of TIMER_PRESCALER + #endif + + TCNT0 = 0x00; /* Initialization of Timer/Counter */ + REG_OCR0A = OCR_DIVISOR; /* Timer/Counter Output Compare Register */ + + /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */ + REG_TIMSK0 &= ~BV(TOIE0); + REG_TIMSK0 |= BV(BIT_OCIE0A); + + IRQ_RESTORE(flags); + } + +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1) + + void timer_hw_init(void) + { + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Reset Timer overflow flag */ + REG_TIFR1 |= BV(TOV1); + + /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */ + #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9) + TCCR1A |= BV(WGM11); + TCCR1A &= ~BV(WGM10); + TCCR1B |= BV(WGM12) | BV(CS10); + TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12)); + /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */ + #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8) + TCCR1A |= BV(WGM10); + TCCR1A &= ~BV(WGM11); + TCCR1B |= BV(WGM12) | BV(CS10); + TCCR1B &= ~(BV(WGM13) | BV(CS11) | BV(CS12)); + #else + #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS + #endif + + TCNT1 = 0x00; /* initialization of Timer/Counter */ + + /* Enable timer interrupt: Timer/Counter1 Overflow */ + REG_TIMSK1 |= BV(TOIE1); + + IRQ_RESTORE(flags); + } + +#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2) + void timer_hw_init(void) + { + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Reset Timer flags */ + REG_TIFR2 = BV(BIT_OCF2A) | BV(TOV2); + + /* Setup Timer/Counter interrupt */ + REG_TCCR2A = 0; // TCCR2 reg could be separate or a unique register with both A & B values, this is needed to + REG_TCCR2B = 0; // ensure correct initialization. + + REG_TCCR2A = BV(WGM21); + #if TIMER_PRESCALER == 64 + REG_TCCR2B |= TIMER2_PRESCALER_64; + #else + #error Unsupported value of TIMER_PRESCALER + #endif + + /* Clear on Compare match & prescaler = 64, internal sys clock. + When changing prescaler change TIMER_HW_HPTICKS_PER_SEC too */ + TCNT2 = 0x00; /* initialization of Timer/Counter */ + REG_OCR2A = (uint8_t)OCR_DIVISOR; /* Timer/Counter Output Compare Register */ + + /* Enable timer interrupts: Timer/Counter2 Output Compare (OCIE2) */ + REG_TIMSK2 &= ~BV(TOIE2); + REG_TIMSK2 |= BV(BIT_OCIE2A); + + IRQ_RESTORE(flags); + } + +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3) + + #if CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA32 + #error For select target there is not TIMER_ON_OVERFLOW3, please select an other one. + #endif + + void timer_hw_init(void) + { + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Reset Timer overflow flag */ + REG_TIFR3 |= BV(TOV3); + + /* Fast PWM mode, 9 bit, 24 kHz, no prescaling. */ + #if (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 9) + TCCR3A |= BV(WGM31); + TCCR3A &= ~BV(WGM30); + TCCR3B |= BV(WGM32) | BV(CS30); + TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32)); + /* Fast PWM mode, 8 bit, 24 kHz, no prescaling. */ + #elif (TIMER_PRESCALER == 1) && (TIMER_HW_BITS == 8) + TCCR3A |= BV(WGM30); + TCCR3A &= ~BV(WGM31); + TCCR3B |= BV(WGM32) | BV(CS30); + TCCR3B &= ~(BV(WGM33) | BV(CS31) | BV(CS32)); + #else + #error Unsupported value of TIMER_PRESCALER or TIMER_HW_BITS + #endif + + /* initialization of Timer/Counter */ + TCNT3 = 0x00; + + /* Enable timer interrupt: Timer/Counter3 Overflow */ + REG_TIMSK3 |= BV(TOIE3); + + IRQ_RESTORE(flags); + } + +#else + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + diff --git a/bertos/cpu/avr/drv/timer_mega.h b/bertos/cpu/avr/drv/timer_mega.h new file mode 100644 index 0000000..d0d98c2 --- /dev/null +++ b/bertos/cpu/avr/drv/timer_mega.h @@ -0,0 +1,173 @@ +/** + * \file + * + * + * \brief Low-level timer module for AVR MEGA (interface). + * + * \author Bernie Innocenti + * \author Francesco Sacchi + * \author Luca Ottaviano + * + */ + +#ifndef DRV_TIMER_MEGA_H +#define DRV_TIMER_MEGA_H + +#include /* CPU_FREQ */ + +#include "cfg/cfg_timer.h" /* CONFIG_TIMER */ +#include /* uint8_t */ +#include /* DIV_ROUND */ + +#include +#include + +/** + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * \note The timer 1 overflow mode set the timer as a 24 kHz PWM. + * $WIZ$ timer_select = "TIMER_ON_OUTPUT_COMPARE0", "TIMER_ON_OVERFLOW1", "TIMER_ON_OUTPUT_COMPARE2", "TIMER_ON_OVERFLOW3", "TIMER_DEFAULT" + */ +#define TIMER_ON_OUTPUT_COMPARE0 1 +#define TIMER_ON_OVERFLOW1 2 +#define TIMER_ON_OUTPUT_COMPARE2 3 +#define TIMER_ON_OVERFLOW3 4 + +#define TIMER_DEFAULT TIMER_ON_OUTPUT_COMPARE0 ///< Default system timer + +/* + * Hardware dependent timer initialization. + */ +#if (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE0) + + #define TIMER_PRESCALER 64 + #define TIMER_HW_BITS 8 + #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560 + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMPA_vect) + #else + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER0_COMP_vect) + #endif + #define TIMER_TICKS_PER_SEC 1000 + #define TIMER_HW_CNT OCR_DIVISOR + + /// Type of time expressed in ticks of the hardware high-precision timer + typedef uint8_t hptime_t; + #define SIZEOF_HPTIME_T 1 + + INLINE hptime_t timer_hw_hpread(void) + { + return TCNT0; + } + +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW1) + + #define TIMER_PRESCALER 1 + #define TIMER_HW_BITS 8 + /** This value is the maximum in overflow based timers. */ + #define TIMER_HW_CNT (1 << TIMER_HW_BITS) + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER1_OVF_vect) + #define TIMER_TICKS_PER_SEC DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT) + + /// Type of time expressed in ticks of the hardware high precision timer + typedef uint16_t hptime_t; + #define SIZEOF_HPTIME_T 2 + + INLINE hptime_t timer_hw_hpread(void) + { + return TCNT1; + } + +#elif (CONFIG_TIMER == TIMER_ON_OUTPUT_COMPARE2) + + #define TIMER_PRESCALER 64 + #define TIMER_HW_BITS 8 + #if CPU_AVR_ATMEGA1281 || CPU_AVR_ATMEGA1280 || CPU_AVR_ATMEGA168 || CPU_AVR_ATMEGA328P || CPU_AVR_ATMEGA2560 + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMPA_vect) + #else + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER2_COMP_vect) + #endif + #define TIMER_TICKS_PER_SEC 1000 + /** Value for OCR register in output-compare based timers. */ + #define TIMER_HW_CNT OCR_DIVISOR + + /// Type of time expressed in ticks of the hardware high precision timer + typedef uint8_t hptime_t; + #define SIZEOF_HPTIME_T 1 + + INLINE hptime_t timer_hw_hpread(void) + { + return TCNT2; + } + +#elif (CONFIG_TIMER == TIMER_ON_OVERFLOW3) + + #define TIMER_PRESCALER 1 + #define TIMER_HW_BITS 8 + /** This value is the maximum in overflow based timers. */ + #define TIMER_HW_CNT (1 << TIMER_HW_BITS) + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER3_OVF_vect) + #define TIMER_TICKS_PER_SEC DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, TIMER_HW_CNT) + + /// Type of time expressed in ticks of the hardware high precision timer + typedef uint16_t hptime_t; + #define SIZEOF_HPTIME_T 2 + + INLINE hptime_t timer_hw_hpread(void) + { + return TCNT3; + } + +#else + + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + + +/** Frequency of the hardware high precision timer. */ +#define TIMER_HW_HPTICKS_PER_SEC DIV_ROUND(CPU_FREQ, TIMER_PRESCALER) + +/** + * System timer: additional division after the prescaler + * 12288000 / 64 / 192 (0..191) = 1 ms + */ +#define OCR_DIVISOR (DIV_ROUND(DIV_ROUND(CPU_FREQ, TIMER_PRESCALER), TIMER_TICKS_PER_SEC) - 1) + +/** Not needed, IRQ timer flag cleared automatically */ +#define timer_hw_irq() do {} while (0) + +/** Not needed, timer IRQ handler called only for timer source */ +#define timer_hw_triggered() (true) + +void timer_hw_init(void); + +#endif /* DRV_TIMER_MEGA_H */ diff --git a/bertos/cpu/avr/drv/timer_simple_avr.c b/bertos/cpu/avr/drv/timer_simple_avr.c new file mode 100644 index 0000000..231241b --- /dev/null +++ b/bertos/cpu/avr/drv/timer_simple_avr.c @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief Some simple delay routines. + * + * Simple serial driver + * \author Francesco Sacchi + */ + +#warning FIXME:This module is obsolete, yuo must refactor it. + +#if 0 +#include +#include "timer_simple_avr.h" +#include +#include +#include /* BV() */ + +#include + + +#define MS_PER_SEC 1000UL +#define TIMER_PRESCALER 64UL +#define TIMER_DELAY_1MS (255 - CPU_FREQ / TIMER_PRESCALER / MS_PER_SEC) + +/** + * Wait \a time ms using timer 0. + * + */ +void timer_delay(mtime_t time) +{ + /* Set timer clock to clock_freq/64 */ + TCCR0 = BV(CS02); + + while (time--) + { + /* Initialize timer counter register */ + TCNT0 = TIMER_DELAY_1MS; + /* Clear overflow bit. */ + TIFR |= BV(TOV0); + /* Wait overflow. */ + while (!(TIFR & BV(TOV0))); +#if CONFIG_WATCHDOG + wdt_reset(); +#endif + } +} +#endif + diff --git a/bertos/cpu/avr/drv/timer_simple_avr.h b/bertos/cpu/avr/drv/timer_simple_avr.h new file mode 100644 index 0000000..496ff24 --- /dev/null +++ b/bertos/cpu/avr/drv/timer_simple_avr.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Simple delay routine + * + * \author Francesco Sacchi + */ + +#ifndef DRV_TIMER_SIMPLE_AVR_H +#define DRV_TIMER_SIMPLE_AVR_H + +#warning FIXME:This module is obsolete, yuo must refactor it. + +#if 0 +#include + +extern void timer_delay(mtime_t time); + +#endif /* TIMER_SIMPLE_H */ + +#endif diff --git a/bertos/cpu/avr/drv/timer_xmega.c b/bertos/cpu/avr/drv/timer_xmega.c new file mode 100644 index 0000000..0ef69d2 --- /dev/null +++ b/bertos/cpu/avr/drv/timer_xmega.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \author Onno + * + * \brief Low-level timer module for AVR XMEGA (implementation). + * + * This file is heavily inspired by the AVR implementation for BeRTOS, + * but uses a different approach for implementing the different debug + * ports, by using the timer structs. + * + * This module is automatically included so no need to include + * in test list. + * notest: all + */ + +#include +#include // BV() + +#include +#include + +#include + +/* Helper MACROS taken from the Atmel examples and altered + * + * The AVR XMEGA has different structures for TC0 and TC1, + * however these only differ in the amount of compare/capture + * channels, so for this purpose they can be used exactly the same + */ + +//check if the bitvalues of the TC0 and TC1 Timer/Counters are really the same +#if TC0_CLKSEL_gm != TC1_CLKSEL_gm || TC0_WGMODE_gm != TC1_WGMODE_gm || TC0_OVFINTLVL_gm != TC1_OVFINTLVL_gm + #error TC0 and TC1 Timer/Counters cannot be configured with the same bitvalues +#endif + +#define TIMER_CONFIG_CLOCK_SOURCE(_clkSel)\ + ((TIMERCOUNTER).CTRLA = ((TIMERCOUNTER).CTRLA & ~TC0_CLKSEL_gm) | _clkSel) + +#define TIMER_CLEAR_FLAGS() ((TIMERCOUNTER).INTFLAGS = 0xFF) + +#define TIMER_SET_PERIOD( _period ) ( (TIMERCOUNTER).PER = (_period) ) + +#define TIMER_SET_OVERFLOW_INTERRUPT_LEVEL( _interruptLevel )\ + ((TIMERCOUNTER).INTCTRLA = ( (TIMERCOUNTER).INTCTRLA & ~TC0_OVFINTLVL_gm ) | _interruptLevel) + +#define TIMER_CONFIG_WGM(_wgm)\ + ((TIMERCOUNTER).CTRLB = ( (TIMERCOUNTER).CTRLB & ~TC0_WGMODE_gm ) | _wgm) + +#define TIMER_RESET() ( (TIMERCOUNTER).CTRLFSET = TC_CMD_RESET_gc ) + +//Define TIMER_PRESCALE_REG_VALUE bases on the provided +//TIMER_PRESCALER value +#if TIMER_PRESCALER == 0 + #define TIMER_CLKSEL_gc TC_CLKSEL_OFF_gc +#elif TIMER_PRESCALER == 1 + #define TIMER_CLKSEL_gc TC_CLKSEL_DIV1_gc +#elif TIMER_PRESCALER == 2 + #define TIMER_CLKSEL_gc TC_CLKSEL_DIV2_gc +#elif TIMER_PRESCALER == 4 + #define TIMER_CLKSEL_gc TC_CLKSEL_DIV4_gc +#elif TIMER_PRESCALER == 16 + #define TIMER_CLKSEL_gc TC_CLKSEL_DIV16_gc +#elif TIMER_PRESCALER == 64 + #define TIMER_CLKSEL_gc TC_CLKSEL_DIV64_gc +#elif TIMER_PRESCALER == 256 + #define TIMER_CLKSEL_gc TC_CLKSEL_DIV256_gc +#elif TIMER_PRESCALER == 1024 + #define TIMER_CLKSEL_gc TC_CLKSEL_DIV1024_gc +#else + #error Invalid value for TIMER_PRESCALER has been defined! Using default of 1 + #define TIMER_CLKSEL_gc TC_CLKSEL_DIV1_gc +#endif + +void timer_hw_init(void) +{ + //Save and disable IRQ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + //disable the timer + TIMER_CONFIG_CLOCK_SOURCE(TC_CLKSEL_OFF_gc); + //clear all flags + TIMER_CLEAR_FLAGS(); + //setup the Periode register value + //CNT register will be reset to 0 when CNT == PER + TIMER_SET_PERIOD(TIMER_PERIOD_VALUE); + //set the Waveform Generation Mode to Normal + TIMER_CONFIG_WGM(TC_WGMODE_NORMAL_gc); + //enable the overflow interrupt + //use the highest priority + TIMER_SET_OVERFLOW_INTERRUPT_LEVEL(TC_OVFINTLVL_HI_gc); + //enable timer by setting the correct prescaler/clock + TIMER_CONFIG_CLOCK_SOURCE(TIMER_CLKSEL_gc); + //Restore IRQ + IRQ_RESTORE(flags); +} diff --git a/bertos/cpu/avr/drv/timer_xmega.h b/bertos/cpu/avr/drv/timer_xmega.h new file mode 100644 index 0000000..092cb4c --- /dev/null +++ b/bertos/cpu/avr/drv/timer_xmega.h @@ -0,0 +1,134 @@ +/** + * \file + * + * + * \brief Low-level timer module for AVR XMEGA (interface). + * + * This file is heavily inspired by the AVR implementation for BeRTOS, + * but uses a different approach for implementing the different debug + * ports, by using the timer structs. + * + * \author Onno + * + */ + +#ifndef DRV_TIMER_XMEGA_H +#define DRV_TIMER_XMEGA_H + +#include /* CPU_FREQ */ + +#include "cfg/cfg_timer.h" /* CONFIG_TIMER */ +#include /* uint8_t */ +#include /* DIV_ROUND */ + +#include +#include + +/* + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * $WIZ$ timer_select = "TIMER_USE_TCC0", "TIMER_USE_TCC1", "TIMER_USE_TCD0", "TIMER_USE_TCE0", "TIMER_USE_TCD1", "TIMER_DEFAULT" + */ +#define TIMER_USE_TCC0 1 +#define TIMER_USE_TCC1 2 +#define TIMER_USE_TCD0 3 +#define TIMER_USE_TCE0 4 +// The XMEGA A Family has one extra timer +#ifdef CPU_AVR_XMEGA_A + #define TIMER_USE_TCD1 5 +#endif + +#define TIMER_DEFAULT TIMER_USE_TCC1 ///< Default system timer + +/* + * Hardware dependent timer initialization. + */ +#if (CONFIG_TIMER == TIMER_USE_TCC0) + #define TIMER_OVF_VECT TCC0_OVF_vect + #define TIMERCOUNTER TCC0 +#elif (CONFIG_TIMER == TIMER_USE_TCC1) + #define TIMER_OVF_VECT TCC1_OVF_vect + #define TIMERCOUNTER TCC1 +#elif (CONFIG_TIMER == TIMER_USE_TCD0) + #define TIMER_OVF_VECT TCD0_OVF_vect + #define TIMERCOUNTER TCD0 +#elif (CONFIG_TIMER == TIMER_USE_TCE0) + #define TIMER_OVF_VECT TCE0_OVF_vect + #define TIMERCOUNTER TCE0 +#elif (CONFIG_TIMER == TIMER_USE_TCD1) + #define TIMER_OVF_VECT TCD1_OVF_vect + #define TIMERCOUNTER TCD1 +#else + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + +//define the Interrupt Service Routine for this Timer Mode +#define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(TIMER_OVF_VECT) +//define the Ticks per second we want +#define TIMER_TICKS_PER_SEC 1000 +//define the Prescaler to use, which is dependend on the amount +//of ticks per second, the maximum value for the TOP value of the +//timer (0xFFFF) and the clock frequency. +//The maximum clock frequency is 32Mhz, so as long as the TIMER_TICKS_PER_SEC +//is larger then (about) 500 no prescaler is required. +#define TIMER_PRESCALER 1 +//define the TOP/PERIOD value +#define TIMER_PERIOD_VALUE DIV_ROUND(DIV_ROUND(CPU_FREQ, TIMER_PRESCALER), TIMER_TICKS_PER_SEC) +//check if the TIMER_PRESCALER is large enough to accomate for the TIMER_TICKS_PER_SEC +#if TIMER_PERIOD_VALUE > 0xFFFF + #error Timer cannot generate the required Ticks per second, please adjust TIMER_PRESCALER +#endif +//define TIMER_HW_CNT it is used by the timer.c module to determine the 'edge' of the hardware counter +#define TIMER_HW_CNT TIMER_PERIOD_VALUE +/** Frequency of the hardware high precision timer. */ +#define TIMER_HW_HPTICKS_PER_SEC DIV_ROUND(CPU_FREQ, TIMER_PRESCALER) + +// Type of time expressed in ticks of the hardware high-precision timer +typedef uint16_t hptime_t; +#define SIZEOF_HPTIME_T 2 + +INLINE hptime_t timer_hw_hpread(void) +{ + return (TIMERCOUNTER).CNT; +} + +/* Not needed, IRQ timer flag cleared automatically */ +#define timer_hw_irq() do {} while (0) + +/* Not needed, timer IRQ handler called only for timer source */ +#define timer_hw_triggered() (true) + +void timer_hw_init(void); + +#endif /* DRV_TIMER_XMEGA_H */ diff --git a/bertos/cpu/avr/drv/wdt_avr.h b/bertos/cpu/avr/drv/wdt_avr.h new file mode 100644 index 0000000..816bb23 --- /dev/null +++ b/bertos/cpu/avr/drv/wdt_avr.h @@ -0,0 +1,96 @@ +/** + * \file + * + * + * \brief Watchdog interface for AVR architecture. + * + * \note The avr-libc already provide an api to manage the watchdog on AVR architecture. + * In avr-libc are also available several constants used to set the timeout value + * (see documentation for more detail). + * + * + * \author Daniele Basile + * + */ + +#ifndef DRV_WDT_AVR_H +#define DRV_WDT_AVR_H + +#include "cfg/cfg_wdt.h" + +#include // INLINE + +#include +#include + +/** + * Reset the watchdog timer. + * + * This functions is already defind in avr-libc. + */ +// void wdt_reset(void) + +/** + * Start the watchdog timer that fire at the select + * timeout. + * + * \param _timeout you can use the macro that are defineded in + * avr/wdt.h. + * + * (from avr libc documentation) + * WDTO_15MS + * WDTO_30MS + * WDTO_60MS + * WDTO_120MS + * WDTO_250MS + * WDTO_500MS + * WDTO_1S + * WDTO_2S + * WDTO_4S + * WDTO_8S + */ +INLINE void wdt_start(uint32_t _timeout) +{ + uint8_t timeout = _timeout; + + wdt_enable(timeout); +} + +/** + * Stop watchdog timer. + */ +INLINE void wdt_stop(void) +{ + wdt_disable(); +} + + +#endif /* DRV_WDT_AVR_H */ diff --git a/bertos/cpu/avr/hw/init_xmega.c b/bertos/cpu/avr/hw/init_xmega.c new file mode 100644 index 0000000..cabde0f --- /dev/null +++ b/bertos/cpu/avr/hw/init_xmega.c @@ -0,0 +1,50 @@ +/** + * \file + * + * + * + * \author Luca Ottaviano + * + * \brief AVR XMega initialization routine. + * notest:all + */ +#include +#include + +void __init(void) NAKED __attribute__ ((section (".init3"))); + +/* + * Initialize all interrupt priorities present in AVR XMega CPU. + */ +void __init(void) +{ + PMIC.CTRL |= PMIC_LOLVLEX_bm | PMIC_MEDLVLEX_bm | PMIC_HILVLEX_bm; +} diff --git a/bertos/cpu/avr/hw/switch_avr.S b/bertos/cpu/avr/hw/switch_avr.S new file mode 100644 index 0000000..8de975f --- /dev/null +++ b/bertos/cpu/avr/hw/switch_avr.S @@ -0,0 +1,6 @@ +#include + +#if !(ARCH & ARCH_NIGHTTEST) + #warning This file is deprecated, use switch_ctx_avr.S + #include "switch_ctx_avr.S" +#endif diff --git a/bertos/cpu/avr/hw/switch_ctx_avr.S b/bertos/cpu/avr/hw/switch_ctx_avr.S new file mode 100644 index 0000000..db80e94 --- /dev/null +++ b/bertos/cpu/avr/hw/switch_ctx_avr.S @@ -0,0 +1,116 @@ +/*! + * \file + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief AVR context switch + * + */ + +#include + +/* void asm_switch_context(void **new_sp [r24:r25], void **save_sp [r22:r23]) */ +.globl asm_switch_context +asm_switch_context: + +; r0 is the TEMP REG and can be used freely. +; r1 is the ZERO REG and must always contain 0. +; +; Stack frame is 18 byte, remember to update +; CPU_SAVED_REGS_CNT if you change pushed regs. + + push r2 + push r3 + push r4 + push r5 + push r6 + push r7 + push r8 + push r9 + push r10 + push r11 + push r12 + push r13 + push r14 + push r15 + push r16 + push r17 + + push r28 + push r29 + + in r18,SPL-__SFR_OFFSET ; r18:r19 = SP + in r19,SPH-__SFR_OFFSET + movw r26,r22 ; X = save_sp + st X+,r18 ; *save_sp = SP + st X,r19 + movw r26,r24 ; X = new_sp + ld r18,X+ + ld r19,X + +;FIXME: We probably need to safe the RAMP registers for some XMEGA devices / setups + +; Set new stack pointer. +; AVR is an 8 bit processor so +; care must be taken when updating +; SP that is a 16 bit reg. +; Two instructions are required to update SP +; so an IRQ can sneak in between them. +; So IRQ *MUST* be disabled and then restored. + in r0, SREG-__SFR_OFFSET + cli ; Disable interrupt + out SPL-__SFR_OFFSET,r18 ; SP = *new_sp + out SPH-__SFR_OFFSET,r19 + out SREG-__SFR_OFFSET,r0 ; Restore previous IRQ state + + pop r29 + pop r28 + + pop r17 + pop r16 + pop r15 + pop r14 + pop r13 + pop r12 + pop r11 + pop r10 + pop r9 + pop r8 + pop r7 + pop r6 + pop r5 + pop r4 + pop r3 + pop r2 + + ret diff --git a/bertos/cpu/avr/info/ATmega103.cdef b/bertos/cpu/avr/info/ATmega103.cdef new file mode 100644 index 0000000..b519ba8 --- /dev/null +++ b/bertos/cpu/avr/info/ATmega103.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega103. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbyte in-System Programmable Flash", + "4 Kbytes internal SRAM memory", + "4 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega103" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATmega128.cdef b/bertos/cpu/avr/info/ATmega128.cdef new file mode 100644 index 0000000..dc824d4 --- /dev/null +++ b/bertos/cpu/avr/info/ATmega128.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega128. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbyte in-System Programmable Flash", + "4 Kbytes internal SRAM memory", + "4 bytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega128" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATmega1280.cdef b/bertos/cpu/avr/info/ATmega1280.cdef new file mode 100644 index 0000000..0c42215 --- /dev/null +++ b/bertos/cpu/avr/info/ATmega1280.cdef @@ -0,0 +1,55 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega1280. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbyte in-System Programmable Flash", + "8 Kbytes internal SRAM memory", + "4 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega1280" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATmega1281.cdef b/bertos/cpu/avr/info/ATmega1281.cdef new file mode 100644 index 0000000..03166cb --- /dev/null +++ b/bertos/cpu/avr/info/ATmega1281.cdef @@ -0,0 +1,55 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega1281. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "128 Kbyte in-System Programmable Flash", + "8 Kbytes internal SRAM memory", + "4 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega1281" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATmega168.cdef b/bertos/cpu/avr/info/ATmega168.cdef new file mode 100644 index 0000000..c657b36 --- /dev/null +++ b/bertos/cpu/avr/info/ATmega168.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega168. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "16 Kbyte in-System Programmable Flash", + "1 Kbytes internal SRAM memory", + "512 bytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega168" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATmega2560.cdef b/bertos/cpu/avr/info/ATmega2560.cdef new file mode 100644 index 0000000..1530f48 --- /dev/null +++ b/bertos/cpu/avr/info/ATmega2560.cdef @@ -0,0 +1,55 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega2560. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "256 Kbyte in-System Programmable Flash", + "8 Kbytes internal SRAM memory", + "4 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega2560" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATmega32.cdef b/bertos/cpu/avr/info/ATmega32.cdef new file mode 100644 index 0000000..47848cc --- /dev/null +++ b/bertos/cpu/avr/info/ATmega32.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega32. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "32 Kbyte in-System Programmable Flash", + "2 Kbytes internal SRAM memory", + "1 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega32" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATmega328P.cdef b/bertos/cpu/avr/info/ATmega328P.cdef new file mode 100644 index 0000000..bc03ba5 --- /dev/null +++ b/bertos/cpu/avr/info/ATmega328P.cdef @@ -0,0 +1,55 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega328P. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Luca Ottaviano +# +# + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "Arduino Duemilanove", + "32 Kbyte in-System Programmable Flash", + "2 Kbytes internal SRAM memory", + "1 Kbyte EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega328p" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATmega64.cdef b/bertos/cpu/avr/info/ATmega64.cdef new file mode 100644 index 0000000..c451fe9 --- /dev/null +++ b/bertos/cpu/avr/info/ATmega64.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega64. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "64 Kbyte in-System Programmable Flash", + "4 Kbytes internal SRAM memory", + "2 Kbytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega64" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATmega8.cdef b/bertos/cpu/avr/info/ATmega8.cdef new file mode 100644 index 0000000..e474767 --- /dev/null +++ b/bertos/cpu/avr/info/ATmega8.cdef @@ -0,0 +1,54 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATMega8. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("mega.common") + +# Short description of the cpu. +CPU_DESC += [ "8 Kbyte in-System Programmable Flash", + "1 Kbytes internal SRAM memory", + "512 bytes EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atmega8" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/ATxmega32D4.cdef b/bertos/cpu/avr/info/ATxmega32D4.cdef new file mode 100644 index 0000000..57a1496 --- /dev/null +++ b/bertos/cpu/avr/info/ATxmega32D4.cdef @@ -0,0 +1,56 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the ATxmega32D4. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Onno +# +# + + +# Import the common settings for the path. +include("avr.common") + +# Short description of the cpu. +CPU_DESC += [ "32 Kbyte in-System Programmable Flash", + "4 Kbyte Boot Code Section with Independent Lock Bits", + "4 Kbyte internal SRAM memory", + "1 Kbyte EEPROM memory" ] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "atxmega32d4" +HW_DIR = CPU_DIR + "avr/hw/" +MK_CPU_CSRC = HW_DIR + "init_xmega.c" + +include("avr_post.common") diff --git a/bertos/cpu/avr/info/avr.common b/bertos/cpu/avr/info/avr.common new file mode 100644 index 0000000..f0fd278 --- /dev/null +++ b/bertos/cpu/avr/info/avr.common @@ -0,0 +1,69 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition AVR family. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = [ "ATMEL AVR Microcontroller ", + "8-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "avr" + +# Special CPU related tags. +CPU_TAGS = ["harvard", TOOLCHAIN] + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "8000000UL" + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "avr/scripts/" + +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "avr/flash.sh" +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "avr/stopflash.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "nodebug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "none.sh" + +# Common GCC flags. +MK_CPU_CPPFLAGS = "-Os -I" + CPU_DIR + "avr/" + diff --git a/bertos/cpu/avr/info/avr_post.common b/bertos/cpu/avr/info/avr_post.common new file mode 100644 index 0000000..b5aa27f --- /dev/null +++ b/bertos/cpu/avr/info/avr_post.common @@ -0,0 +1,9 @@ + +# CPU type used for flashing +MK_PROGRAMMER_CPU = CORE_CPU + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_MCU = CORE_CPU + +# Add CPU core to tags +CPU_TAGS += [ CORE_CPU ] diff --git a/bertos/cpu/avr/info/mega.common b/bertos/cpu/avr/info/mega.common new file mode 100644 index 0000000..e6f23ce --- /dev/null +++ b/bertos/cpu/avr/info/mega.common @@ -0,0 +1,48 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition AVR family. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("avr.common") + +# Special CPU related tags. +CPU_TAGS += ["mega"] + diff --git a/bertos/cpu/byteorder.h b/bertos/cpu/byteorder.h new file mode 100644 index 0000000..37d7a84 --- /dev/null +++ b/bertos/cpu/byteorder.h @@ -0,0 +1,261 @@ +/** + * \file + * + * + * \brief Functions to convert integers to/from host byte-order. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#ifndef MWARE_BYTEORDER_H +#define MWARE_BYTEORDER_H + +#include +#include +#include +#include +#include + +/** + * Swap upper and lower bytes in a 16-bit value. + */ +#define SWAB16(x) ((uint16_t)(ROTR((x), 8) + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint16_t)))) + +/* + * On Cortex-M3, GCC 4.4 builtin implementation is slower than our own + * rot-based implementation. + */ +#if GNUC_PREREQ(4, 3) && !CPU_CM3 +#define SWAB32(x) ((uint32_t)(__builtin_bswap32((x) + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint32_t))))) +#else +/** + * Reverse bytes in a 32-bit value (e.g.: 0x12345678 -> 0x78563412). + */ +#define SWAB32(x) ((uint32_t)(( \ + (ROTR(x, 8) & 0xFF00FF00) | \ + (ROTL(x, 8) & 0x00FF00FF))) + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint32_t))) +#endif + +#if GNUC_PREREQ(4, 3) +#define SWAB64(x) ((uint64_t)(__builtin_bswap64((x) + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint64_t))))) +#else +/** + * Reverse bytes in a 64-bit value. + */ +#define SWAB64(x) ((uint64_t)( \ + (((uint64_t)(x) & (uint64_t)0x00000000000000ffULL) << 56) | \ + (((uint64_t)(x) & (uint64_t)0x000000000000ff00ULL) << 40) | \ + (((uint64_t)(x) & (uint64_t)0x0000000000ff0000ULL) << 24) | \ + (((uint64_t)(x) & (uint64_t)0x00000000ff000000ULL) << 8) | \ + (((uint64_t)(x) & (uint64_t)0x000000ff00000000ULL) >> 8) | \ + (((uint64_t)(x) & (uint64_t)0x0000ff0000000000ULL) >> 24) | \ + (((uint64_t)(x) & (uint64_t)0x00ff000000000000ULL) >> 40) | \ + (((uint64_t)(x) & (uint64_t)0xff00000000000000ULL) >> 56) + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint64_t)))) +#endif + +#if CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN +#define cpu_to_le16(x) ((uint16_t)(x + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint16_t)))) +#define cpu_to_le32(x) ((uint32_t)(x + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint32_t)))) +#define cpu_to_le64(x) ((uint64_t)(x + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint64_t)))) +#define cpu_to_be16(x) SWAB16(x) +#define cpu_to_be32(x) SWAB32(x) +#define cpu_to_be64(x) SWAB64(x) +#elif CPU_BYTE_ORDER == CPU_BIG_ENDIAN +#define cpu_to_le16(x) SWAB16(x) +#define cpu_to_le32(x) SWAB32(x) +#define cpu_to_le64(x) SWAB64(x) +#define cpu_to_be16(x) ((uint16_t)(x + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint16_t)))) +#define cpu_to_be32(x) ((uint32_t)(x + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint32_t)))) +#define cpu_to_be64(x) ((uint64_t)(x + \ + STATIC_ASSERT_EXPR(sizeof(x) == sizeof(uint64_t)))) +#else +#error "unrecognized CPU endianness" +#endif + +#define be16_to_cpu(x) cpu_to_be16(x) +#define le16_to_cpu(x) cpu_to_le16(x) +#define be32_to_cpu(x) cpu_to_be32(x) +#define le32_to_cpu(x) cpu_to_le32(x) +#define be64_to_cpu(x) cpu_to_be64(x) +#define le64_to_cpu(x) cpu_to_le64(x) + +#define host_to_net16(x) cpu_to_be16(x) +#define net_to_host16(x) be16_to_cpu(x) +#define host_to_net32(x) cpu_to_be32(x) +#define net_to_host32(x) be32_to_cpu(x) +#define host_to_net64(x) cpu_to_be64(x) +#define net_to_host64(x) be64_to_cpu(x) + +/** + * Reverse bytes in a float value. + */ +INLINE float swab_float(float x) +{ + /* Avoid breaking strict aliasing rules. */ + char *cx = (char *)(&x); + STATIC_ASSERT(sizeof(float) == 4); + #define BYTEORDER_SWAP(a, b) do { (a) ^= (b); (b) ^= (a); (a) ^= (b); } while(0) + BYTEORDER_SWAP(cx[0], cx[3]); + BYTEORDER_SWAP(cx[1], cx[2]); + #undef BYTEORDER_SWAP + return x; +} + +INLINE float cpu_to_be_float(float x) +{ + return (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN) ? swab_float(x) : x; +} + +INLINE float cpu_to_le_float(float x) +{ + return (CPU_BYTE_ORDER == CPU_BIG_ENDIAN) ? swab_float(x) : x; +} + +INLINE float be_float_to_cpu(float x) +{ + return cpu_to_be_float(x); +} + +INLINE float le_float_to_cpu(float x) +{ + return cpu_to_le_float(x); +} + +INLINE float host_to_net_float(float x) +{ + return cpu_to_be_float(x); +} + +INLINE float net_to_host_float(float x) +{ + return be_float_to_cpu(x); +} + +#if CPU_ARM +INLINE cpu_atomic_t +cpu_atomic_xchg(volatile cpu_atomic_t *ptr, cpu_atomic_t val) +{ + cpu_atomic_t ret; + + asm volatile( + "swp %0, %1, [%2]" + + : "=&r" (ret) + : "r" (val), "r" (ptr) + : "memory", "cc"); + + return ret; +} +#else /* CPU_ARM */ +#include + +INLINE cpu_atomic_t +cpu_atomic_xchg(volatile cpu_atomic_t *ptr, cpu_atomic_t val) +{ + cpu_atomic_t ret; + + ATOMIC( + ret = *ptr; + *ptr = val; + ); + return ret; +} +#endif /* CPU_ARM */ + +#ifdef __cplusplus + +/// Type generic byte swapping. +template +INLINE T swab(T x); + +template<> INLINE uint16_t swab(uint16_t x) { return SWAB16(x); } +template<> INLINE uint32_t swab(uint32_t x) { return SWAB32(x); } +template<> INLINE uint64_t swab(uint64_t x) { return SWAB64(x); } +template<> INLINE int16_t swab(int16_t x) { return static_cast(SWAB16(static_cast(x))); } +template<> INLINE int32_t swab(int32_t x) { return static_cast(SWAB32(static_cast(x))); } +template<> INLINE int64_t swab(int64_t x) { return static_cast(SWAB64(static_cast(x))); } +template<> INLINE float swab(float x) { return swab_float(x); } + +/// Type generic conversion from CPU byte order to big-endian byte order. +template +INLINE T cpu_to_be(T x) +{ + return (CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN) ? swab(x) : x; +} + +/// Type generic conversion from CPU byte-order to little-endian. +template +INLINE T cpu_to_le(T x) +{ + return (CPU_BYTE_ORDER == CPU_BIG_ENDIAN) ? swab(x) : x; +} + +/// Type generic conversion from big endian byte-order to CPU byte order. +template +INLINE T be_to_cpu(T x) +{ + return cpu_to_be(x); +} + +/// Type generic conversion from little-endian byte order to CPU byte order. +template +INLINE T le_to_cpu(T x) +{ + return cpu_to_le(x); +} + +/// Type generic conversion from network byte order to host byte order. +template +INLINE T net_to_host(T x) +{ + return be_to_cpu(x); +} + +/// Type generic conversion from host byte order to network byte order. +template +INLINE T host_to_net(T x) +{ + return net_to_host(x); +} + +#endif /* __cplusplus */ + +#endif /* MWARE_BYTEORDER_H */ diff --git a/bertos/cpu/byteorder_test.c b/bertos/cpu/byteorder_test.c new file mode 100644 index 0000000..0064c62 --- /dev/null +++ b/bertos/cpu/byteorder_test.c @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief byteorder.h macros test. + * + * \author Francesco Sacchi + */ + +#include +#include +#include + +#include "byteorder.h" + +int byteorder_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int byteorder_testTearDown(void) +{ + return 0; +} + +int byteorder_testRun(void) +{ + float a; + float b; + float c; + + for (a = 0; a < 12345; a += 0.01) + { + b = swab_float(a); + c = swab_float(b); +// kprintf("a=%08lX, b=%08lX, c=%08lX\n", *((uint32_t *)&a), *((uint32_t *)&b), *((uint32_t *)&c)); + ASSERT(a == c); + } + return 0; +} + +TEST_MAIN(byteorder); diff --git a/bertos/cpu/cortex-m3/drv/adc_cm3.h b/bertos/cpu/cortex-m3/drv/adc_cm3.h new file mode 100644 index 0000000..168a5da --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_cm3.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Low-level ADC module for ARM (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_CM3_LM3S + #include "adc_lm3s.h" +#elif CPU_CM3_STM32 + #include "adc_stm32.h" +#elif CPU_CM3_SAM3X + #include "adc_sam3.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/cortex-m3/drv/adc_lm3s.c b/bertos/cpu/cortex-m3/drv/adc_lm3s.c new file mode 100644 index 0000000..a59400e --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_lm3s.c @@ -0,0 +1,199 @@ +/** + * \file + * + * + * \brief ADC hardware-specific implementation + * + * This ADC module should be use both whit kernel or none. + * If you are using a kernel, the adc drive does not wait the finish of + * conversion but use a singal every time a required conversion are + * ended. This signal wake up a process that return a result of + * conversion. Otherwise, if you not use a kernl, this module wait + * whit a loop the finishing of conversion. + * + * + * \author Daniele Basile + */ + + +#include "adc_lm3s.h" + +#include + +#include "cfg/cfg_adc.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" + +#include +#include +#include + +// Define log settings for cfg/log.h. +#define LOG_LEVEL ADC_LOG_LEVEL +#define LOG_FORMAT ADC_LOG_FORMAT +#include + +#include +#include +#include + +#include + +/* Select witch ADC use */ +#if CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 + #define ADC_BASE ADC0_BASE + #define SYSCTL_RCGC_R SYSCTL_RCGC0_R + #define SYSCTL_RCGC_ADC SYSCTL_RCGC0_ADC0 +#else + #error Unknow ADC register for select cpu core +#endif + + +#if CONFIG_KERN + #include + + #include + #include + + #include + + + #if !CONFIG_KERN_SIGNALS + #error Signals must be active to use ADC with kernel + #endif + + /* Signal adc convertion end */ + #define SIG_ADC_COMPLETE SIG_USER0 + + /* ADC waiting process */ + static struct Process *adc_process; + + /** + * ADC ISR. + * Simply signal the adc process that convertion is complete. + */ + static DECLARE_ISR(adc_conversion_end_irq) + { + sig_post(adc_process, SIG_ADC_COMPLETE); + + /* Clear the status bit */ + HWREG(ADC_BASE + ADC_O_ISC) |= ADC_ISC_IN3; + + } + + static void adc_enable_irq(void) + { + /* Clear all pending irq */ + HWREG(ADC_BASE + ADC_O_ISC) = 0; + /* Register the IRQ handler */ + sysirq_setHandler(INT_ADC3, adc_conversion_end_irq); + /* Enable IRQ */ + HWREG(ADC_BASE + ADC_O_SSCTL3) |= ADC_SSCTL3_IE0; + HWREG(ADC_BASE + ADC_O_IM) |= ADC_IM_MASK3; + } + +#endif /* CONFIG_KERN */ + +/** + * Select mux channel \a ch. + * Generally the stm32 cpu family allow us to program the order + * of adc channel that we want to read. + * In this driver implementation we put as fist channel to read the + * select ones. + */ +void adc_hw_select_ch(uint8_t ch) +{ + /* Select channel that we want read */ + HWREG(ADC_BASE + ADC_O_SSMUX3) = ch; + /* Make single acquisition */ + HWREG(ADC_BASE + ADC_O_SSCTL3) |= ADC_SSCTL3_END0; + /* Enable sequence S03 (single sample on select channel) */ + HWREG(ADC_BASE + ADC_O_ACTSS) |= ADC_ACTSS_ASEN3; +} + +/** + * Start an ADC convertion. + * If a kernel is present, preempt until convertion is complete, otherwise + * a busy wait on ADC_DRDY bit is done. + */ +uint16_t adc_hw_read(void) +{ + #if CONFIG_KERN + /* Ensure ADC is not already in use by another process */ + ASSERT(adc_process == NULL); + adc_process = proc_current(); + #endif + + /* Start convertion */ + HWREG(ADC0_BASE + ADC_O_PSSI) |= ADC_PSSI_SS3; + + #if CONFIG_KERN + /* Ensure IRQs enabled. */ + IRQ_ASSERT_ENABLED(); + sig_wait(SIG_ADC_COMPLETE); + + /* Prevent race condition in case of preemptive kernel */ + uint16_t ret = (uint16_t)HWREG(ADC_BASE + ADC_O_SSFIFO3); + MEMORY_BARRIER; + adc_process = NULL; + return ret; + #else + /* Wait in polling until conversion is done */ + while (!(HWREG(ADC_BASE + ADC_O_SSFSTAT3) & ADC_SSFSTAT3_FULL)); + + /* Return the last converted data */ + return (uint16_t)HWREG(ADC_BASE + ADC_O_SSFIFO3); + #endif +} + +/** + * Init ADC hardware. + */ +void adc_hw_init(void) +{ + /* Enable ADC0 clock */ + SYSCTL_RCGC_R |= SYSCTL_RCGC_ADC; + + /* + * We wait some time because the clock is istable + * and that could cause system hardfault + */ + lm3s_busyWait(10); + + /* Disable all sequence */ + HWREG(ADC_BASE + ADC_O_ACTSS) = 0; + /* Set trigger event to programmed (for all sequence) */ + HWREG(ADC_BASE + ADC_O_EMUX) = 0; + + #if CONFIG_KERN + adc_enable_irq(); + #endif +} diff --git a/bertos/cpu/cortex-m3/drv/adc_lm3s.h b/bertos/cpu/cortex-m3/drv/adc_lm3s.h new file mode 100644 index 0000000..1ffe33f --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_lm3s.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Daniele Basile + */ + +#ifndef DRV_ADC_LM3S_H +#define DRV_ADC_LM3S_H + +#include "cfg/cfg_adc.h" + +#include + +/** + * ADC config define. + */ +#if CPU_CM3_LM3S1968 + #define ADC_MUX_MAXCH 8 //Max number of channel for ADC. + #define ADC_BITS 10 //Bit resolution for ADC converter. +#elif CPU_CM3_LM3S8962 + #define ADC_MUX_MAXCH 4 //Max number of channel for ADC. + #define ADC_BITS 10 //Bit resolution for ADC convert +#endif + +/** + * Init the ADC pins. + * Implement it if necessary. + */ +#define ADC_INIT_PINS() \ + do { \ + } while (0) + +void adc_hw_select_ch(uint8_t ch); +uint16_t adc_hw_read(void); +void adc_hw_init(void); + +#endif /* DRV_ADC_LM3S_H */ diff --git a/bertos/cpu/cortex-m3/drv/adc_sam3.c b/bertos/cpu/cortex-m3/drv/adc_sam3.c new file mode 100644 index 0000000..303689f --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_sam3.c @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief ADC hardware-specific implementation + * + * \author Daniele Basile + */ + + +#include "adc_sam3.h" + +#include "cfg/cfg_adc.h" + +#include +#include + +// Define log settings for cfg/log.h. +#define LOG_LEVEL ADC_LOG_LEVEL +#define LOG_FORMAT ADC_LOG_FORMAT +#include + +#include +#include + +#include + +#include + +#include + + +/* We use event to signal the end of conversion */ +static Event data_ready; +/* The last converted data */ +static uint32_t data; + +/** + * ADC ISR. + * + * The interrupt is connected to ready data, so when the + * adc ends the conversion we generate an event and then + * we return the converted value. + * + * \note to clear the Ready data bit and End of conversion + * bit we should read the Last Converted Data register, otherwise + * the ready data interrupt loop on this call. + */ +static DECLARE_ISR(adc_conversion_end_irq) +{ + data = 0; + if (ADC_ISR & BV(ADC_DRDY)) + { + data = ADC_LDATA; + event_do(&data_ready); + } +} + +/** + * Select mux channel \a ch. + */ +void adc_hw_select_ch(uint8_t ch) +{ + /* Disable all channels */ + ADC_CHDR = ADC_CH_MASK; + /* Enable select channel */ + ADC_CHER = BV(ch); +} + +/** + * Start an ADC convertion. + */ +uint16_t adc_hw_read(void) +{ + ADC_CR = BV(ADC_START); + event_wait(&data_ready); + return(data); +} + +/** + * Init ADC hardware. + */ +void adc_hw_init(void) +{ + /* Make sure that interrupt are enabled */ + IRQ_ASSERT_ENABLED(); + + /* Initialize the dataready event */ + event_initGeneric(&data_ready); + + /* Clock ADC peripheral */ + pmc_periphEnable(ADC_ID); + + /* Reset adc controller */ + ADC_CR = ADC_SWRST; + + /* + * Set adc mode register: + * - Disable hardware trigger and enable software trigger. + * - Select normal mode. + */ + ADC_MR = 0; + + /* Set ADC_BITS bit convertion resolution. */ + #if ADC_BITS == 12 + ADC_MR &= ~BV(ADC_LOWRES); + #elif ADC_BITS == 10 + ADC_MR |= BV(ADC_LOWRES); + #else + #error No select bit resolution is supported to this CPU + #endif + + /* Setup ADC */ + LOG_INFO("Computed ADC_CLOCK %ld\n", ADC_CLOCK); + ADC_MR |= ((ADC_PRESCALER << ADC_PRESCALER_SHIFT) & ADC_PRESCALER_MASK); + LOG_INFO("prescaler[%ld]\n", ADC_PRESCALER); + ADC_MR |= ((CONFIG_ADC_SUT << ADC_STARTUP_SHIFT) & ADC_STARTUP_MASK); + LOG_INFO("starup[%d]\n", CONFIG_ADC_SUT); + ADC_MR |= ((CONFIG_ADC_STTLING << ADC_SETTLING_SHIFT) & ADC_SETTLING_MASK); + LOG_INFO("sttime[%d]\n", CONFIG_ADC_STTLING); + ADC_MR |= ((CONFIG_ADC_TRACKTIM << ADC_TRACKTIM_SHIFT) & ADC_TRACKTIM_MASK); + LOG_INFO("tracking[%d]\n", CONFIG_ADC_TRACKTIM); + ADC_MR |= ((CONFIG_ADC_TRANSFER << ADC_TRANSFER_SHIFT) & ADC_TRANSFER_MASK); + LOG_INFO("tranfer[%d]\n", CONFIG_ADC_TRANSFER); + + /* Register and enable irq for adc. */ + sysirq_setHandler(INT_ADC, adc_conversion_end_irq); + ADC_IER = BV(ADC_DRDY); +} diff --git a/bertos/cpu/cortex-m3/drv/adc_sam3.h b/bertos/cpu/cortex-m3/drv/adc_sam3.h new file mode 100644 index 0000000..f46f940 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_sam3.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Daniele Basile + */ + +#ifndef DRV_ADC_SAM3_H +#define DRV_ADC_SAM3_H + +#include + +#include "cfg/cfg_adc.h" + +#include + +/** + * ADC config define. + */ +#define ADC_MUX_MAXCH 16 //Max number of channel for ADC. +#define ADC_BITS 12 //Bit resolution for ADC converter. + +/** + * Macro for computing correct value to write into ADC + * register. + */ +#define ADC_PRESCALER (DIV_ROUNDUP(CPU_FREQ, 2 * CONFIG_ADC_CLOCK) - 1) +#define ADC_CLOCK (CPU_FREQ / ((ADC_PRESCALER + 1) * 2)) + +void adc_hw_select_ch(uint8_t ch); +uint16_t adc_hw_read(void); +void adc_hw_init(void); + +#endif /* DRV_ADC_SAM3_H */ diff --git a/bertos/cpu/cortex-m3/drv/adc_stm32.c b/bertos/cpu/cortex-m3/drv/adc_stm32.c new file mode 100644 index 0000000..10ee143 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_stm32.c @@ -0,0 +1,215 @@ +/** + * \file + * + * + * \brief ADC hardware-specific implementation + * + * This ADC module should be use both whit kernel or none. + * If you are using a kernel, the adc drive does not wait the finish of + * conversion but use a singal every time a required conversion are + * ended. This signal wake up a process that return a result of + * conversion. Otherwise, if you not use a kernl, this module wait + * whit a loop the finishing of conversion. + * + * + * \author Daniele Basile + */ + + +#include "adc_stm32.h" + +#include + +#include "cfg/cfg_adc.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" + +#include +#include +#include + +// Define log settings for cfg/log.h. +#define LOG_LEVEL ADC_LOG_LEVEL +#define LOG_FORMAT ADC_LOG_FORMAT +#include + +#include +#include +#include + +#include + +struct stm32_adc *adc = (struct stm32_adc *)ADC1_BASE; + +#if CONFIG_KERN + #include + + #include + #include + + #include + + + #if !CONFIG_KERN_SIGNALS + #error Signals must be active to use ADC with kernel + #endif + + /* Signal adc convertion end */ + #define SIG_ADC_COMPLETE SIG_USER0 + + /* ADC waiting process */ + static struct Process *adc_process; + + /** + * ADC ISR. + * Simply signal the adc process that convertion is complete. + */ + static DECLARE_ISR(adc_conversion_end_irq) + { + sig_post(adc_process, SIG_ADC_COMPLETE); + + /* Clear the status bit */ + adc->SR &= ~BV(SR_EOC); + } + + static void adc_enable_irq(void) + { + /* Register the IRQ handler */ + sysirq_setHandler(ADC_IRQHANDLER, adc_conversion_end_irq); + adc->CR1 |= BV(CR1_EOCIE); + } + +#endif /* CONFIG_KERN */ + +/** + * Select mux channel \a ch. + * Generally the stm32 cpu family allow us to program the order + * of adc channel that we want to read. + * In this driver implementation we put as fist channel to read the + * select ones. + */ +void adc_hw_select_ch(uint8_t ch) +{ + /* We sample only from one channel */ + adc->SQR1 |= BV(SQR1_SQ_LEN_SHIFT); + adc->SQR3 = (ch & SQR3_SQ_MASK); +} + +/** + * Start an ADC convertion. + * If a kernel is present, preempt until convertion is complete, otherwise + * a busy wait on ADC_DRDY bit is done. + */ +uint16_t adc_hw_read(void) +{ + #if CONFIG_KERN + /* Ensure ADC is not already in use by another process */ + ASSERT(adc_process == NULL); + adc_process = proc_current(); + #endif + + /* Start convertion */ + adc->CR2 |= CR2_EXTTRIG_SWSTRT_SET; + + #if CONFIG_KERN + /* Ensure IRQs enabled. */ + IRQ_ASSERT_ENABLED(); + sig_wait(SIG_ADC_COMPLETE); + + /* Prevent race condition in case of preemptive kernel */ + uint16_t ret = adc->DR; + MEMORY_BARRIER; + adc_process = NULL; + return ret; + #else + /* Wait in polling until conversion is done */ + while (!(adc->SR & BV(SR_EOC))); + + /* Return the last converted data */ + return (adc->DR); + #endif +} + +/** + * Init ADC hardware. + */ +void adc_hw_init(void) +{ + RCC->APB2ENR |= (RCC_APB2_GPIOA | RCC_APB2_GPIOB | RCC_APB2_GPIOC); + RCC->APB2ENR |= RCC_APB2_ADC1; + + /* Reset registry */ + adc->CR1 = 0; + adc->CR2 = 0; + adc->SQR1 = 0; + adc->SQR2 = 0; + adc->SQR3 = 0; + + /* Calibrate ADC */ + adc->CR2 |= BV(CR2_RTSCAL); + adc->CR2 |= BV(CR2_CAL); + + /* Wait in polling until calibration is done */ + while (adc->CR2 & BV(CR2_CAL)); + + /* + * Configure ADC + * - Regular mode + * - Wake up adc + * - Wake up temperature and Vrefint + */ + adc->CR2 |= (BV(CR2_ADON) | ADC_EXTERNALTRIGCONV_NONE | BV(CR2_TSVREFE)); + + /* Set 17.1usec sampling time*/ + adc->SMPR1 |= ((ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH17) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH16) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH15) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH14) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH13) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH12) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH11) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH10)); + + adc->SMPR2 |= ((ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH9) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH8) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH7) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH6) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH5) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH4) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH3) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH2) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH1) | + (ADC_SAMPLETIME_239CYCLES5 << SMPR2_CH0)); + + #if CONFIG_KERN + adc_enable_irq(); + #endif +} diff --git a/bertos/cpu/cortex-m3/drv/adc_stm32.h b/bertos/cpu/cortex-m3/drv/adc_stm32.h new file mode 100644 index 0000000..4ed4eaa --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/adc_stm32.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief ADC hardware-specific definition + * + * \author Daniele Basile + */ + +#ifndef DRV_ADC_STM32_H +#define DRV_ADC_STM32_H + +#include + +#include "cfg/cfg_adc.h" + +#include + +/** + * ADC config define. + */ +#define ADC_MUX_MAXCH 17 //Max number of channel for ADC. +#define ADC_BITS 12 //Bit resolution for ADC converter. + +/** + * Init the ADC pins. + * Implement it if necessary. + */ +#define ADC_INIT_PINS() \ + do { \ + } while (0) + +void adc_hw_select_ch(uint8_t ch); +uint16_t adc_hw_read(void); +void adc_hw_init(void); + +#endif /* DRV_ADC_STM32_H */ diff --git a/bertos/cpu/cortex-m3/drv/clock_cm3.h b/bertos/cpu/cortex-m3/drv/clock_cm3.h new file mode 100644 index 0000000..6353c6a --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/clock_cm3.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Low-level Clock module for ARM Cortex-m3 (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_CM3_LM3S + #include "clock_lm3s.h" +#elif CPU_CM3_STM32 + #include "clock_stm32.h" +#elif CPU_CM3_SAM3 + #include "clock_sam3.h" +/*#elif Add other Cortex-M3 CPUs here */ +#else + #error Unknown CPU +#endif + diff --git a/bertos/cpu/cortex-m3/drv/clock_lm3s.c b/bertos/cpu/cortex-m3/drv/clock_lm3s.c new file mode 100644 index 0000000..0c79f87 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/clock_lm3s.c @@ -0,0 +1,199 @@ +/** + * \file + * + * + * \brief LM3S1968 Clocking driver. + * + * \author Andrea Righi + */ + +#include "clock_lm3s.h" + +#include +#include + +#include + + +/* The PLL VCO frequency is 400 MHz */ +#define PLL_VCO 400000000UL + +/* Extract the system clock divisor from the RCC register */ +#define RCC_TO_DIV(rcc) \ + (((rcc & SYSCTL_RCC_SYSDIV_MASK) >> \ + SYSCTL_RCC_SYSDIV_SHIFT) + 1) + +/* + * Very small delay: each loop takes 3 cycles. + */ +void NAKED lm3s_busyWait(unsigned long iterations) +{ + register uint32_t __n asm("r0") = iterations; + + asm volatile ( + "1: subs r0, #1\n\t" + "bne 1b\n\t" + "bx lr\n\t" + : : "r"(__n) : "memory", "cc"); +} + +INLINE unsigned long clock_get_rate(void) +{ + reg32_t rcc = HWREG(SYSCTL_RCC); + + return rcc & SYSCTL_RCC_USESYSDIV ? + PLL_VCO / 2 / RCC_TO_DIV(rcc) : PLL_VCO; +} + +/* + * Try to evaluate the correct SYSDIV value depending on the desired CPU + * frequency. + */ +INLINE int evaluate_sysdiv(unsigned long freq) +{ + int i; + + /* + * NOTE: with BYPASS=0, SYSDIV < 3 are reserved values (see LM3S1968 + * Microcontroller DATASHEET, p.78). + */ + for (i = 3; i < 16; i++) + if (freq >= (PLL_VCO / 2 / (i + 1))) + break; + return i; +} + +void clock_init(void) +{ + reg32_t rcc, rcc2; + unsigned long clk; + int i; + + /* + * PLL may not function properly at default LDO setting. + * + * Description: + * + * In designs that enable and use the PLL module, unstable device + * behavior may occur with the LDO set at its default of 2.5 volts or + * below (minimum of 2.25 volts). Designs that do not use the PLL + * module are not affected. + * + * Workaround: Prior to enabling the PLL module, it is recommended that + * the default LDO voltage setting of 2.5 V be adjusted to 2.75 V using + * the LDO Power Control (LDOPCTL) register. + * + * Silicon Revision Affected: A1, A2 + * + * See also: Stellaris LM3S1968 A2 Errata documentation. + */ + if (REVISION_IS_A1 | REVISION_IS_A2) + HWREG(SYSCTL_LDOPCTL) = SYSCTL_LDOPCTL_2_75V; + + rcc = HWREG(SYSCTL_RCC); + rcc2 = HWREG(SYSCTL_RCC2); + + /* + * Step #1: bypass the PLL and system clock divider by setting the + * BYPASS bit and clearing the USESYS bit in the RCC register. This + * configures the system to run off a “raw†clock source (using the + * main oscillator or internal oscillator) and allows for the new PLL + * configuration to be validated before switching the system clock to + * the PLL. + */ + rcc |= SYSCTL_RCC_BYPASS; + rcc &= ~SYSCTL_RCC_USESYSDIV; + rcc2 |= SYSCTL_RCC2_BYPASS2; + + /* Write back RCC/RCC2 registers */ + HWREG(SYSCTL_RCC) = rcc; + HWREG(SYSCTL_RCC) = rcc2; + + lm3s_busyWait(16); + + /* + * Step #2: select the crystal value (XTAL) and oscillator source + * (OSCSRC), and clear the PWRDN bit in RCC/RCC2. Setting the XTAL + * field automatically pulls valid PLL configuration data for the + * appropriate crystal, and clearing the PWRDN bit powers and enables + * the PLL and its output. + */ + + /* Enable the main oscillator first. */ + rcc &= ~(SYSCTL_RCC_IOSCDIS | SYSCTL_RCC_MOSCDIS); + rcc |= SYSCTL_RCC_IOSCDIS; + + /* Do not override RCC register fields */ + rcc2 &= ~SYSCTL_RCC2_USERCC2; + + rcc &= ~(SYSCTL_RCC_XTAL_M | SYSCTL_RCC_OSCSRC_M | SYSCTL_RCC_PWRDN); + rcc |= XTAL_FREQ | SYSCTL_RCC_OSCSRC_MAIN; + + /* Clear the PLL lock interrupt. */ + HWREG(SYSCTL_MISC) = SYSCTL_INT_PLL_LOCK; + + HWREG(SYSCTL_RCC) = rcc; + HWREG(SYSCTL_RCC) = rcc2; + + lm3s_busyWait(16); + + /* + * Step #3: select the desired system divider (SYSDIV) in RCC/RCC2 and + * set the USESYS bit in RCC. The SYSDIV field determines the system + * frequency for the microcontroller. + */ + rcc &= ~(SYSCTL_RCC_SYSDIV_M | SYSCTL_RCC_USESYSDIV); + + clk = PLL_VCO / 2; + for (i = 3; i < 16; i++) + if (CPU_FREQ >= (clk / (i + 1))) + break; + rcc |= SYSCTL_RCC_USESYSDIV | + (evaluate_sysdiv(CPU_FREQ) << SYSCTL_RCC_SYSDIV_SHIFT); + + /* + * Step #4: wait for the PLL to lock by polling the PLLLRIS bit in the + * Raw Interrupt Status (RIS) register. + */ + for (i = 0; i < 32768; i++) + if (HWREG(SYSCTL_RIS) & SYSCTL_INT_PLL_LOCK) + break; + + /* + * Step #5: enable use of the PLL by clearing the BYPASS bit in + * RCC/RCC2. + */ + rcc &= ~SYSCTL_RCC_BYPASS; + + HWREG(SYSCTL_RCC) = rcc; + + lm3s_busyWait(16); +} diff --git a/bertos/cpu/cortex-m3/drv/clock_lm3s.h b/bertos/cpu/cortex-m3/drv/clock_lm3s.h new file mode 100644 index 0000000..0f93e8f --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/clock_lm3s.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Low-level clocking driver for LM3S1968. + * + * \author Andrea Righi + */ + +#ifndef DRV_LM3S1968_CLOCK_H +#define DRV_LM3S1968_CLOCK_H + +/* Crystal frequency attached to the main oscillator. */ +#define XTAL_FREQ SYSCTL_RCC_XTAL_8MHZ + +extern void lm3s_busyWait(unsigned long iterations); + +void clock_init(void); + +#endif /* DRV_LM3S1968_CLOCK_H */ diff --git a/bertos/cpu/cortex-m3/drv/clock_sam3.c b/bertos/cpu/cortex-m3/drv/clock_sam3.c new file mode 100644 index 0000000..fcb46c4 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/clock_sam3.c @@ -0,0 +1,146 @@ +/** + * \file + * + * + * \brief Atmel SAM3 clock setup. + * + * \author Stefano Fedrigo + */ + +#include "clock_sam3.h" +#include +#include +#include + + +/* Frequency of board main oscillator */ +#define BOARDOSC_FREQ 12000000 + +/* Timer countdown timeout for clock initialization operations */ +#define CLOCK_TIMEOUT 0xFFFFFFFF + + +#if CPU_FREQ == 84000000 || CPU_FREQ == 48000000 + +INLINE uint32_t evaluate_pll(void) +{ + return CKGR_PLLR_MUL(CPU_FREQ / BOARDOSC_FREQ * 2 - 1) | CKGR_PLLR_DIV(2); +} + +#else + +#warning CPU clock frequency non-standard setting: multiplier and divider values \ + will be computed at runtime: effective computed frequency could be different \ + from expected. + +/* + * Try to evaluate the correct divider and multiplier value depending + * on the desired CPU frequency. + * + * We try all combinations in a certain range of divider and multiplier + * values. Start with higher multipliers and divisors, generally better. + */ +INLINE uint32_t evaluate_pll(void) +{ + int mul, div, best_mul, best_div; + int best_delta = CPU_FREQ; + int freq = 0; + + for (mul = 13; mul > 0; mul--) + { + for (div = 24; div > 0; div--) + { + freq = BOARDOSC_FREQ / div * (1 + mul); + if (ABS((int)CPU_FREQ - freq) < best_delta) { + best_delta = ABS((int)CPU_FREQ - freq); + best_mul = mul; + best_div = div; + } + } + } + + return CKGR_PLLR_DIV(best_div) | CKGR_PLLR_MUL(best_mul); +} + +#endif /* CPU_FREQ */ + +void clock_init(void) +{ + uint32_t timeout; + + /* Disable watchdog */ + WDT_MR = BV(WDT_WDDIS); + + /* Set wait states for flash access, needed for higher CPU clock rates */ + EEFC0_FMR = EEFC_FMR_FWS(3); +#ifdef EEFC1_FMR + EEFC1_FMR = EEFC_FMR_FWS(3); +#endif + + // Initialize main oscillator + if (!(CKGR_MOR & BV(CKGR_MOR_MOSCSEL))) + { + CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCXTST(0x8) + | BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN); + timeout = CLOCK_TIMEOUT; + while (!(PMC_SR & BV(PMC_SR_MOSCXTS)) && --timeout); + } + + // Switch to external oscillator + CKGR_MOR = CKGR_MOR_KEY(0x37) | CKGR_MOR_MOSCXTST(0x8) + | BV(CKGR_MOR_MOSCRCEN) | BV(CKGR_MOR_MOSCXTEN) | BV(CKGR_MOR_MOSCSEL); + timeout = CLOCK_TIMEOUT; + while (!(PMC_SR & BV(PMC_SR_MOSCXTS)) && --timeout); + + // Initialize and enable PLL clock + CKGR_PLLR = evaluate_pll() | BV(CKGR_PLLR_STUCKTO1) | CKGR_PLLR_PLLCOUNT(0x2); + timeout = CLOCK_TIMEOUT; + while (!(PMC_SR & BV(PMC_SR_LOCK)) && --timeout); + + PMC_MCKR = PMC_MCKR_CSS_MAIN_CLK; + timeout = CLOCK_TIMEOUT; + while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout); + + PMC_MCKR = PMC_MCKR_CSS_PLL_CLK; + timeout = CLOCK_TIMEOUT; + while (!(PMC_SR & BV(PMC_SR_MCKRDY)) && --timeout); + + /* Enable clock on PIO for inputs */ + // TODO: move this in gpio_init() for better power management? + pmc_periphEnable(PIOA_ID); + pmc_periphEnable(PIOB_ID); + pmc_periphEnable(PIOC_ID); +#ifdef PIOF_ID + pmc_periphEnable(PIOD_ID); + pmc_periphEnable(PIOE_ID); + pmc_periphEnable(PIOF_ID); +#endif +} diff --git a/bertos/cpu/cortex-m3/drv/clock_sam3.h b/bertos/cpu/cortex-m3/drv/clock_sam3.h new file mode 100644 index 0000000..88f21a2 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/clock_sam3.h @@ -0,0 +1,43 @@ +/** + * \file + * + * + * \brief Low-level clocking driver for SAM3. + * + * \author Stefano Fedrigo + */ + +#ifndef DRV_SAM3_CLOCK_H +#define DRV_SAM3_CLOCK_H + +void clock_init(void); + +#endif /* DRV_SAM3_CLOCK_H */ diff --git a/bertos/cpu/cortex-m3/drv/clock_stm32.c b/bertos/cpu/cortex-m3/drv/clock_stm32.c new file mode 100644 index 0000000..c1db8b6 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/clock_stm32.c @@ -0,0 +1,151 @@ +/** + * \file + * + * + * \brief STM32 Clocking driver. + * + * \author Andrea Righi + */ + +#include "clock_stm32.h" + +#include +#include + +#include + +struct RCC *RCC; + +INLINE int rcc_get_flag_status(uint32_t flag) +{ + uint32_t id; + reg32_t reg; + + /* Get the RCC register index */ + id = flag >> 5; + /* The flag to check is in CR register */ + if (id == 1) + reg = RCC->CR; + /* The flag to check is in BDCR register */ + else if (id == 2) + reg = RCC->BDCR; + /* The flag to check is in CSR register */ + else + reg = RCC->CSR; + /* Get the flag position */ + id = flag & FLAG_MASK; + + return reg & (1 << id); +} + +INLINE uint16_t pll_clock(void) +{ + unsigned int div, mul; + + /* Hopefully this is evaluate at compile time... */ + for (div = 2; div; div--) + for (mul = 2; mul <= 16; mul++) + if (CPU_FREQ <= (PLL_VCO / div * mul)) + break; + return mul << 8 | div; +} + +INLINE void rcc_pll_config(void) +{ + reg32_t reg = RCC->CFGR & CFGR_PLL_MASK; + + /* Evaluate clock parameters */ + uint16_t clock = pll_clock(); + uint32_t pll_mul = ((clock >> 8) - 2) << 18; + uint32_t pll_div = ((clock & 0xff) << 1 | 1) << 16; + + /* Set the PLL configuration bits */ + reg |= pll_div | pll_mul; + + /* Store the new value */ + RCC->CFGR = reg; + + /* Enable PLL */ + *CR_PLLON_BB = 1; +} + +INLINE void rcc_set_clock_source(uint32_t source) +{ + reg32_t reg; + + reg = RCC->CFGR & CFGR_SW_MASK; + reg |= source; + RCC->CFGR = reg; +} + +void clock_init(void) +{ + /* Initialize global RCC structure */ + RCC = (struct RCC *)RCC_BASE; + + /* Enable the internal oscillator */ + *CR_HSION_BB = 1; + while (!rcc_get_flag_status(RCC_FLAG_HSIRDY)); + + /* Clock the system from internal HSI RC (8 MHz) */ + rcc_set_clock_source(RCC_SYSCLK_HSI); + + /* Enable external oscillator */ + RCC->CR &= CR_HSEON_RESET; + RCC->CR &= CR_HSEBYP_RESET; + RCC->CR |= CR_HSEON_SET; + while (!rcc_get_flag_status(RCC_FLAG_HSERDY)); + + /* Initialize PLL according to CPU_FREQ */ + rcc_pll_config(); + while(!rcc_get_flag_status(RCC_FLAG_PLLRDY)); + + /* Configure USB clock (48MHz) */ + *CFGR_USBPRE_BB = RCC_USBCLK_PLLCLK_1DIV5; + /* Configure ADC clock: PCLK2 (9MHz) */ + RCC->CFGR &= CFGR_ADCPRE_RESET_MASK; + RCC->CFGR |= RCC_PCLK2_DIV8; + /* Configure system clock dividers: PCLK2 (72MHz) */ + RCC->CFGR &= CFGR_PPRE2_RESET_MASK; + RCC->CFGR |= RCC_HCLK_DIV1 << 3; + /* Configure system clock dividers: PCLK1 (36MHz) */ + RCC->CFGR &= CFGR_PPRE1_RESET_MASK; + RCC->CFGR |= RCC_HCLK_DIV2; + /* Configure system clock dividers: HCLK */ + RCC->CFGR &= CFGR_HPRE_RESET_MASK; + RCC->CFGR |= RCC_SYSCLK_DIV1; + + /* Set 1 wait state for the flash memory */ + *(reg32_t *)FLASH_BASE = 0x12; + + /* Clock the system from the PLL */ + rcc_set_clock_source(RCC_SYSCLK_PLLCLK); +} diff --git a/bertos/cpu/cortex-m3/drv/clock_stm32.h b/bertos/cpu/cortex-m3/drv/clock_stm32.h new file mode 100644 index 0000000..e91753d --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/clock_stm32.h @@ -0,0 +1,276 @@ +/** + * \file + * + * + * \brief Low-level clocking driver for Cortex-M3 STM32. + * + * \author Andrea Righi + */ + +#ifndef CLOCK_STM32_H +#define CLOCK_STM32_H + + +#include + +/* RCC registers bit address */ +#define RCC_OFFSET (RCC_BASE - PERIPH_BASE) + +/** + * CR Register + */ +/*\{*/ +/* Alias word address of HSION bit */ +#define CR_OFFSET (RCC_OFFSET + 0x00) +#define HSION_BITNUMBER 0x00 +#define CR_HSION_BB ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (HSION_BITNUMBER * 4))) + +/* Alias word address of PLLON bit */ +#define PLLON_BITNUMBER 0x18 +#define CR_PLLON_BB ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (PLLON_BITNUMBER * 4))) + +/* Alias word address of CSSON bit */ +#define CSSON_BITNUMBER 0x13 +#define CR_CSSON_BB ((reg32_t *)(PERIPH_BB_BASE + (CR_OFFSET * 32) + (CSSON_BITNUMBER * 4))) +/*\}*/ + +/** + * CFGR Register + */ +/*\{*/ +/* Alias word address of USBPRE bit */ +#define CFGR_OFFSET (RCC_OFFSET + 0x04) +#define USBPRE_BITNUMBER 0x16 +#define CFGR_USBPRE_BB ((reg32_t *)(PERIPH_BB_BASE + (CFGR_OFFSET * 32) + (USBPRE_BITNUMBER * 4))) +/*\}*/ + +/** + * BDCR Register + */ +/*\{*/ +/* Alias word address of RTCEN bit */ +#define BDCR_OFFSET (RCC_OFFSET + 0x20) +#define RTCEN_BITNUMBER 0x0F +#define BDCR_RTCEN_BB ((reg32_t *)(PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (RTCEN_BITNUMBER * 4))) + +/* Alias word address of BDRST bit */ +#define BDRST_BITNUMBER 0x10 +#define BDCR_BDRST_BB ((reg32_t *)(PERIPH_BB_BASE + (BDCR_OFFSET * 32) + (BDRST_BITNUMBER * 4))) +/*\}*/ + +/** + * CSR Register + */ +/*\{*/ +/* Alias word address of LSION bit */ +#define CSR_OFFSET (RCC_OFFSET + 0x24) +#define LSION_BITNUMBER 0x00 +#define CSR_LSION_BB ((reg32_t *)(PERIPH_BB_BASE + (CSR_OFFSET * 32) + (LSION_BITNUMBER * 4))) +/*\}*/ + +/** + * RCC registers bit mask + */ +/*\{*/ +/* CR register bit mask */ +#define CR_HSEBYP_RESET (0xFFFBFFFF) +#define CR_HSEBYP_SET (0x00040000) +#define CR_HSEON_RESET (0xFFFEFFFF) +#define CR_HSEON_SET (0x00010000) +#define CR_HSITRIM_MASK (0xFFFFFF07) + +/* CFGR register bit mask */ +#define CFGR_PLL_MASK (0xFFC0FFFF) +#define CFGR_PLLMull_MASK (0x003C0000) +#define CFGR_PLLSRC_MASK (0x00010000) +#define CFGR_PLLXTPRE_MASK (0x00020000) +#define CFGR_SWS_MASK (0x0000000C) +#define CFGR_SW_MASK (0xFFFFFFFC) +#define CFGR_HPRE_RESET_MASK (0xFFFFFF0F) +#define CFGR_HPRE_SET_MASK (0x000000F0) +#define CFGR_PPRE1_RESET_MASK (0xFFFFF8FF) +#define CFGR_PPRE1_SET_MASK (0x00000700) +#define CFGR_PPRE2_RESET_MASK (0xFFFFC7FF) +#define CFGR_PPRE2_SET_MASK (0x00003800) +#define CFGR_ADCPRE_RESET_MASK (0xFFFF3FFF) +#define CFGR_ADCPRE_SET_MASK (0x0000C000) + +/* CSR register bit mask */ +#define CSR_RVMF_SET (0x01000000) + +/* RCC Flag MASK */ +#define FLAG_MASK (0x1F) + +/* Typical VALUE of the HSI in Hz */ +#define HSI_VALUE (8000000) + +/* BDCR register base address */ +#define BDCR_BASE (PERIPH_BASE + BDCR_OFFSET) + +/* RCC Flag */ +#define RCC_FLAG_HSIRDY (0x20) +#define RCC_FLAG_HSERDY (0x31) +#define RCC_FLAG_PLLRDY (0x39) +#define RCC_FLAG_LSERDY (0x41) +#define RCC_FLAG_LSIRDY (0x61) +#define RCC_FLAG_PINRST (0x7A) +#define RCC_FLAG_PORRST (0x7B) +#define RCC_FLAG_SFTRST (0x7C) +#define RCC_FLAG_IWDGRST (0x7D) +#define RCC_FLAG_WWDGRST (0x7E) +#define RCC_FLAG_LPWRRST (0x7F) + +/* System clock source */ +#define RCC_SYSCLK_HSI (0x00000000) +#define RCC_SYSCLK_HSE (0x00000001) +#define RCC_SYSCLK_PLLCLK (0x00000002) + +/* PLL entry clock source */ +#define RCC_PLL_HSI_DIV2 (0x00000000) +#define RCC_PLL_HSE_DIV1 (0x00010000) +#define RCC_PLL_HSE_DIV2 (0x00030000) + +/* PLL multiplication factor */ +#define RCC_PLLMUL_2 (0x00000000) +#define RCC_PLLMUL_3 (0x00040000) +#define RCC_PLLMUL_4 (0x00080000) +#define RCC_PLLMUL_5 (0x000C0000) +#define RCC_PLLMUL_6 (0x00100000) +#define RCC_PLLMUL_7 (0x00140000) +#define RCC_PLLMUL_8 (0x00180000) +#define RCC_PLLMUL_9 (0x001C0000) +#define RCC_PLLMUL_10 (0x00200000) +#define RCC_PLLMUL_11 (0x00240000) +#define RCC_PLLMUL_12 (0x00280000) +#define RCC_PLLMUL_13 (0x002C0000) +#define RCC_PLLMUL_14 (0x00300000) +#define RCC_PLLMUL_15 (0x00340000) +#define RCC_PLLMUL_16 (0x00380000) + +/* APB1/APB2 clock source */ +#define RCC_HCLK_DIV1 (0x00000000) +#define RCC_HCLK_DIV2 (0x00000400) +#define RCC_HCLK_DIV4 (0x00000500) +#define RCC_HCLK_DIV8 (0x00000600) +#define RCC_HCLK_DIV16 (0x00000700) + +/* USB clock source */ +#define RCC_USBCLK_PLLCLK_1DIV5 (0x00) +#define RCC_USBCLK_PLLCLK_DIV1 (0x01) + +/* ADC clock source */ +#define RCC_PCLK2_DIV2 (0x00000000) +#define RCC_PCLK2_DIV4 (0x00004000) +#define RCC_PCLK2_DIV6 (0x00008000) +#define RCC_PCLK2_DIV8 (0x0000C000) + +/* AHB clock source */ +#define RCC_SYSCLK_DIV1 (0x00000000) +#define RCC_SYSCLK_DIV2 (0x00000080) +#define RCC_SYSCLK_DIV4 (0x00000090) +#define RCC_SYSCLK_DIV8 (0x000000A0) +#define RCC_SYSCLK_DIV16 (0x000000B0) +#define RCC_SYSCLK_DIV64 (0x000000C0) +#define RCC_SYSCLK_DIV128 (0x000000D0) +#define RCC_SYSCLK_DIV256 (0x000000E0) +#define RCC_SYSCLK_DIV512 (0x000000F0) +/*\}*/ + +/** + * RCC register: APB1 peripheral + */ +/*\{*/ +#define RCC_APB1_TIM2 (0x00000001) +#define RCC_APB1_TIM3 (0x00000002) +#define RCC_APB1_TIM4 (0x00000004) +#define RCC_APB1_WWDG (0x00000800) +#define RCC_APB1_SPI2 (0x00004000) +#define RCC_APB1_USART2 (0x00020000) +#define RCC_APB1_USART3 (0x00040000) +#define RCC_APB1_I2C1 (0x00200000) +#define RCC_APB1_I2C2 (0x00400000) +#define RCC_APB1_USB (0x00800000) +#define RCC_APB1_CAN (0x02000000) +#define RCC_APB1_BKP (0x08000000) +#define RCC_APB1_PWR (0x10000000) +#define RCC_APB1_ALL (0x1AE64807) +/*\}*/ + +/** + * RCC register: APB2 peripheral + */ +/*\{*/ +#define RCC_APB2_AFIO (0x00000001) +#define RCC_APB2_GPIOA (0x00000004) +#define RCC_APB2_GPIOB (0x00000008) +#define RCC_APB2_GPIOC (0x00000010) +#define RCC_APB2_GPIOD (0x00000020) +#define RCC_APB2_GPIOE (0x00000040) +#define RCC_APB2_ADC1 (0x00000200) +#define RCC_APB2_ADC2 (0x00000400) +#define RCC_APB2_TIM1 (0x00000800) +#define RCC_APB2_SPI1 (0x00001000) +#define RCC_APB2_USART1 (0x00004000) +#define RCC_APB2_ALL (0x00005E7D) + +/** + * RCC register: BCDR + */ +#define RCC_BDCR_LSEON (0x00000001) +#define RCC_BDCR_LSERDY (0x00000002) +#define RCC_BDCR_RTCSEL (0x00000300) +#define RCC_BDCR_RTCEN (0x00008000) +/*\}*/ + +/* Crystal frequency of the main oscillator (8MHz) */ +#define PLL_VCO 8000000 + +/* Reset and Clock Controller registers */ +struct RCC +{ + reg32_t CR; + reg32_t CFGR; + reg32_t CIR; + reg32_t APB2RSTR; + reg32_t APB1RSTR; + reg32_t AHBENR; + reg32_t APB2ENR; + reg32_t APB1ENR; + reg32_t BDCR; + reg32_t CSR; +}; + +/* RCC registers base */ +extern struct RCC *RCC; + +void clock_init(void); + +#endif /* CLOCK_STM32_h */ diff --git a/bertos/cpu/cortex-m3/drv/dac_cm3.h b/bertos/cpu/cortex-m3/drv/dac_cm3.h new file mode 100644 index 0000000..3cebff7 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/dac_cm3.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Low-level DAC module for Cortex-m3. + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_CM3_SAM3X + #include "adc_sam3.h" +/*#elif Add other ARM families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/cortex-m3/drv/dac_sam3.c b/bertos/cpu/cortex-m3/drv/dac_sam3.c new file mode 100644 index 0000000..f409046 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/dac_sam3.c @@ -0,0 +1,334 @@ +/** + * \file + * + * + * \brief DAC hardware-specific implementation + * + * \author Daniele Basile + */ + +#include "dac_sam3.h" + +#include "cfg/cfg_dac.h" + +#include +#include + +// Define log settings for cfg/log.h. +#define LOG_LEVEL DAC_LOG_LEVEL +#define LOG_FORMAT DAC_LOG_FORMAT +#include + +#include +#include +#include + +#include + +#include + +#include + +#include + +struct DacHardware +{ + uint16_t channels; + uint32_t rate; + bool end; +}; + +struct DacHardware dac_hw; + + +/* We use event to signal the end of conversion */ +static Event buff_emtpy; + +#if CONFIG_DAC_TIMER == DACC_TRGSEL_TIO_CH0 /* Select Timer counter TIO Channel 0 */ + #define DAC_TC_ID TC0_ID + #define DAC_TC_CCR TC0_CCR0 + #define DAC_TC_IDR TC0_IDR0 + #define DAC_TC_CMR TC0_CMR0 + #define DAC_TC_SR TC0_SR0 + #define DAC_TC_RA TC0_RA0 + #define DAC_TC_RC TC0_RC0 +#elif CONFIG_DAC_TIMER == DACC_TRGSEL_TIO_CH1 /* Select Timer counter TIO Channel 1 */ + #define DAC_TC_ID TC1_ID + #define DAC_TC_CCR TC0_CCR1 + #define DAC_TC_IDR TC0_IDR1 + #define DAC_TC_CMR TC0_CMR1 + #define DAC_TC_SR TC0_SR1 + #define DAC_TC_RA TC0_RA1 + #define DAC_TC_RC TC0_RC1 +#elif CONFIG_DAC_TIMER == DACC_TRGSEL_TIO_CH2 /* Select Timer counter TIO Channel 2 */ + #define DAC_TC_ID TC2_ID + #define DAC_TC_CCR TC0_CCR2 + #define DAC_TC_IDR TC0_IDR2 + #define DAC_TC_CMR TC0_CMR2 + #define DAC_TC_SR TC0_SR2 + #define DAC_TC_RA TC0_RA2 + #define DAC_TC_RC TC0_RC2 +#elif CONFIG_DAC_TIMER == DACC_TRGSEL_PWM0 || CONFIG_DAC_TIMER == DACC_TRGSEL_PWM1 + #error unimplemented pwm triger select. +#endif + + +INLINE void tc_init(void) +{ + pmc_periphEnable(DAC_TC_ID); + + /* Disable TC clock */ + DAC_TC_CCR = BV(TC_CCR_CLKDIS); + /* Disable interrupts */ + DAC_TC_IDR = 0xFFFFFFFF; + /* Clear status register */ + volatile uint32_t dummy = DAC_TC_SR; + (void)dummy; + + /* + * Setup the timer counter: + * - select clock TCLK1 (MCK/2) + * - enable wave form mode + * - RA compare effect SET + * - RC compare effect CLEAR + * - UP mode with automatic trigger on RC Compare + */ + DAC_TC_CMR = TC_TIMER_CLOCK1 | BV(TC_CMR_WAVE) | TC_CMR_ACPA_SET | TC_CMR_ACPC_CLEAR | BV(TC_CMR_CPCTRG); + + + /* Setup the pio: TODO: fix for more generic */ + PIOB_PDR = BV(25); + PIO_PERIPH_SEL(PIOB_BASE, BV(25), PIO_PERIPH_B); +} + +INLINE void tc_setup(uint32_t freq, size_t n_sample) +{ + /* + * Compute the sample frequency + * the RC counter will update every MCK/2 (see above) + * so to convert one sample at the user freq we generate + * the trigger every TC_CLK / (numer_of_sample * user_freq) + * where TC_CLK = MCK / 2. + */ + uint32_t rc = DIV_ROUND((CPU_FREQ / 2), n_sample * freq); + DAC_TC_RC = rc; + /* generate the square wave with duty = 50% */ + DAC_TC_RA = DIV_ROUND(50 * rc, 100); +} + +INLINE void tc_start(void) +{ + DAC_TC_CCR = BV(TC_CCR_CLKEN)| BV(TC_CCR_SWTRG); +} + +INLINE void tc_stop(void) +{ + DAC_TC_CCR = BV(TC_CCR_CLKDIS); +} + +static int sam3x_dac_write(struct Dac *dac, unsigned channel, uint16_t sample) +{ + (void)dac; + + ASSERT(channel <= DAC_MAXCH); + + DACC_MR |= (channel << DACC_USER_SEL_SHIFT) & DACC_USER_SEL_MASK; + DACC_CHER |= BV(channel); + + DACC_CDR = sample ; + + return 0; +} + +static void sam3x_dac_setCh(struct Dac *dac, uint32_t mask) +{ + /* we have only the ch0 and ch1 */ + ASSERT(mask < BV(3)); + dac->hw->channels = mask; + + if (mask & BV(DACC_CH0)) + DACC_MR |= (DACC_CH0 << DACC_USER_SEL_SHIFT) & DACC_USER_SEL_MASK; + + if (mask & BV(DACC_CH1)) + DACC_MR |= (DACC_CH1 << DACC_USER_SEL_SHIFT) & DACC_USER_SEL_MASK; + + DACC_CHER |= mask; + +} + +static void sam3x_dac_setSampleRate(struct Dac *dac, uint32_t rate) +{ + /* Eneble hw trigger */ + DACC_MR |= BV(DACC_TRGEN) | (CONFIG_DAC_TIMER << DACC_TRGSEL_SHIFT); + dac->hw->rate = rate; +} + +static void sam3x_dac_conversion(struct Dac *dac, void *buf, size_t len) +{ + /* setup timer and start it */ + tc_setup(dac->hw->rate, len); + tc_start(); + + /* Setup dma and start it */ + DACC_TPR = (uint32_t)buf; + DACC_TCR = len; + DACC_PTCR |= BV(DACC_PTCR_TXTEN); +} + +static uint16_t *sample_buff; +static size_t next_idx = 0; +static size_t chunk_size = 0; +static size_t remaing_size = 0; + +static DECLARE_ISR(irq_dac) +{ + if (DACC_ISR & BV(DACC_ENDTX)) + { + if (remaing_size > 0) + { + DACC_TNPR = (uint32_t)&sample_buff[next_idx]; + DACC_TNCR = chunk_size; + + remaing_size -= chunk_size; + next_idx += chunk_size; + } + else + /* Clear the pending irq when the dma ends the conversion */ + DACC_TCR = 1; + } + event_do(&buff_emtpy); +} + + +static bool sam3x_dac_isFinished(struct Dac *dac) +{ + return dac->hw->end; +} + +static void sam3x_dac_start(struct Dac *dac, void *_buf, size_t len, size_t slice_len) +{ + ASSERT(dac); + ASSERT(len >= slice_len); + + /* Reset the previous status. */ + dac->hw->end = false; + + sample_buff = (uint16_t *)_buf; + next_idx = 0; + chunk_size = slice_len; + remaing_size = len; + + + /* Program the dma with the first and second chunk of samples and update counter */ + dac->ctx.callback(dac, &sample_buff[0], chunk_size); + DACC_TPR = (uint32_t)&sample_buff[0]; + DACC_TCR = chunk_size; + remaing_size -= chunk_size; + next_idx += chunk_size; + + if (chunk_size <= remaing_size) + { + dac->ctx.callback(dac, &sample_buff[next_idx], chunk_size); + + DACC_TNPR = (uint32_t)&sample_buff[next_idx]; + DACC_TNCR = chunk_size; + + remaing_size -= chunk_size; + next_idx += chunk_size; + + } + + DACC_PTCR |= BV(DACC_PTCR_TXTEN); + DACC_IER = BV(DACC_ENDTX); + + /* Set up timer and trig the conversions */ + tc_setup(dac->hw->rate, len); + tc_start(); + + while (1) + { + event_wait(&buff_emtpy); + if (remaing_size <= 0) + { + DAC_TC_CCR = BV(TC_CCR_CLKDIS); + dac->hw->end = true; + next_idx = 0; + chunk_size = 0; + remaing_size = 0; + break; + } + + dac->ctx.callback(dac, &sample_buff[next_idx], chunk_size); + } +} + +static void sam3x_dac_stop(struct Dac *dac) +{ + dac->hw->end = false; + /* Disable the irq, timer and channel */ + DACC_IDR = BV(DACC_ENDTX); + DACC_PTCR |= BV(DACC_PTCR_TXTDIS); + DAC_TC_CCR = BV(TC_CCR_CLKDIS); +} + + +void dac_init(struct Dac *dac) +{ + /* Initialize the dataready event */ + event_initGeneric(&buff_emtpy); + + /* Fill the virtual table */ + dac->ctx.write = sam3x_dac_write; + dac->ctx.setCh = sam3x_dac_setCh; + dac->ctx.setSampleRate = sam3x_dac_setSampleRate; + dac->ctx.conversion = sam3x_dac_conversion; + dac->ctx.isFinished = sam3x_dac_isFinished; + dac->ctx.start = sam3x_dac_start; + dac->ctx.stop = sam3x_dac_stop; + DB(dac->ctx._type = DAC_SAM3X;) + dac->hw = &dac_hw; + + /* Clock DAC peripheral */ + pmc_periphEnable(DACC_ID); + + /* Reset hw */ + DACC_CR |= BV(DACC_SWRST); + DACC_MR = 0; + + /* Configure the dac */ + DACC_MR |= (CONFIG_DAC_REFRESH << DACC_REFRESH_SHIFT) & DACC_REFRESH_MASK; + DACC_MR |= (CONFIG_DAC_STARTUP << DACC_STARTUP_SHIFT) & DACC_STARTUP_MASK; + + DACC_IDR = 0xFFFFFFFF; + sysirq_setHandler(INT_DACC, irq_dac); + + tc_init(); +} diff --git a/bertos/cpu/cortex-m3/drv/dac_sam3.h b/bertos/cpu/cortex-m3/drv/dac_sam3.h new file mode 100644 index 0000000..e5d68a2 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/dac_sam3.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief DAC hardware-specific definition + * + * \author Daniele Basile + */ + +#ifndef DRV_DAC_SAM3_H +#define DRV_DAC_SAM3_H + +#include + +/** + * DAC config define. + */ +#define DAC_MAXCH 2 //Max number of channel for ADC. +#define DAC_BITS 12 //Bit resolution for ADC converter. + +#define DAC_SAM3X MAKE_ID('S', 'D', '3', 'X') + +#endif /* DRV_DAC_SAM3_H */ diff --git a/bertos/cpu/cortex-m3/drv/eth_sam3.c b/bertos/cpu/cortex-m3/drv/eth_sam3.c new file mode 100644 index 0000000..f93275d --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/eth_sam3.c @@ -0,0 +1,533 @@ +/** + * \file + * + * + * \brief EMAC driver for AT91SAM family with Davicom 9161A phy. + * + * \author Daniele Basile + * \author Andrea Righi + * \author Stefano Fedrigo + */ + +#include "cfg/cfg_eth.h" + +#define LOG_LEVEL ETH_LOG_LEVEL +#define LOG_FORMAT ETH_LOG_FORMAT + +#include + +#include +#include +#include +#include + +// TODO: unify includes +//#include +//#include +//#include +#include +#include + +#include +#include +#include + +#include +#include + +#include + +#include + +#include "eth_sam3.h" + +#define EMAC_RX_INTS (BV(EMAC_RCOMP) | BV(EMAC_ROVR) | BV(EMAC_RXUBR)) +#define EMAC_TX_INTS (BV(EMAC_TCOMP) | BV(EMAC_TXUBR) | BV(EMAC_RLEX)) + +/* Silent Doxygen bug... */ +#ifndef __doxygen__ +/* + * NOTE: this buffer should be declared as 'volatile' because it is read by the + * hardware. However, this is accessed only via memcpy() that should guarantee + * coherency when copying from/to buffers. + */ +static uint8_t tx_buf[EMAC_TX_BUFFERS * EMAC_TX_BUFSIZ] ALIGNED(8); +static volatile BufDescriptor tx_buf_tab[EMAC_TX_DESCRIPTORS] ALIGNED(8); + +/* + * NOTE: this buffer should be declared as 'volatile' because it is wrote by + * the hardware. However, this is accessed only via memcpy() that should + * guarantee coherency when copying from/to buffers. + */ +static uint8_t rx_buf[EMAC_RX_BUFFERS * EMAC_RX_BUFSIZ] ALIGNED(8); +static volatile BufDescriptor rx_buf_tab[EMAC_RX_DESCRIPTORS] ALIGNED(8); +#endif + +static int tx_buf_idx; +static int tx_buf_offset; +static int rx_buf_idx; + +static Event recv_wait, send_wait; + +static DECLARE_ISR(emac_irqHandler) +{ + /* Read interrupt status and disable interrupts. */ + uint32_t isr = EMAC_ISR; + + /* Receiver interrupt */ + if ((isr & EMAC_RX_INTS)) + { + if (isr & BV(EMAC_RCOMP)) + event_do(&recv_wait); + EMAC_RSR = EMAC_RX_INTS; + } + /* Transmitter interrupt */ + if (isr & EMAC_TX_INTS) + { + if (isr & BV(EMAC_TCOMP)) + event_do(&send_wait); + EMAC_TSR = EMAC_TX_INTS; + } + //AIC_EOICR = 0; +} + +/* + * \brief Read contents of PHY register. + * + * \param reg PHY register number. + * + * \return Contents of the specified register. + */ +static uint16_t phy_hw_read(uint8_t phy_addr, reg8_t reg) +{ + // PHY read command. + EMAC_MAN = EMAC_SOF | EMAC_RW_READ + | ((phy_addr << EMAC_PHYA_SHIFT) & EMAC_PHYA) + | ((reg << EMAC_REGA_SHIFT) & EMAC_REGA) + | EMAC_CODE; + + // Wait until PHY logic completed. + while (!(EMAC_NSR & BV(EMAC_IDLE))) + cpu_relax(); + + // Get data from PHY maintenance register. + return (uint16_t)(EMAC_MAN & EMAC_DATA); +} + +#if 0 +/* + * \brief Write value to PHY register. + * + * \param reg PHY register number. + * \param val Value to write. + */ +static void phy_hw_write(uint8_t phy_addr, reg8_t reg, uint16_t val) +{ + // PHY write command. + EMAC_MAN = EMAC_SOF | EMAC_RW_WRITE + | ((phy_addr << EMAC_PHYA_SHIFT) & EMAC_PHYA) + | ((reg << EMAC_REGA_SHIFT) & EMAC_REGA) + | EMAC_CODE | val; + + // Wait until PHY logic completed. + while (!(EMAC_NSR & BV(EMAC_IDLE))) + cpu_relax(); +} +#endif + +/* + * Check link speed and duplex as negotiated by the PHY + * and configure CPU EMAC accordingly. + * Requires active PHY maintenance mode. + */ +static void emac_autoNegotiation(void) +{ + uint16_t reg; + time_t start; + + // Wait for auto-negotation to complete + start = timer_clock(); + do { + reg = phy_hw_read(NIC_PHY_ADDR, NIC_PHY_BMSR); + if (timer_clock() - start > 2000) + { + kprintf("eth error: auto-negotiation timeout\n"); + return; + } + } + while (!(reg & NIC_PHY_BMSR_ANCOMPL)); + + reg = phy_hw_read(NIC_PHY_ADDR, NIC_PHY_ANLPAR); + + if ((reg & NIC_PHY_ANLPAR_TX_FDX) || (reg & NIC_PHY_ANLPAR_TX_HDX)) + { + LOG_INFO("eth: 100BASE-TX\n"); + EMAC_NCFGR |= BV(EMAC_SPD); + } + else + { + LOG_INFO("eth: 10BASE-T\n"); + EMAC_NCFGR &= ~BV(EMAC_SPD); + } + + if ((reg & NIC_PHY_ANLPAR_TX_FDX) || (reg & NIC_PHY_ANLPAR_10_FDX)) + { + LOG_INFO("eth: full duplex\n"); + EMAC_NCFGR |= BV(EMAC_FD); + } + else + { + LOG_INFO("eth: half duplex\n"); + EMAC_NCFGR &= ~BV(EMAC_FD); + } +} + + +static int emac_reset(void) +{ +#if CPU_ARM_AT91 + // Enable devices + PMC_PCER = BV(PIOA_ID); + PMC_PCER = BV(PIOB_ID); + PMC_PCER = BV(EMAC_ID); + + // Disable TESTMODE and RMII + PIOB_PUDR = BV(PHY_RXDV_TESTMODE_BIT); + PIOB_PUDR = BV(PHY_COL_RMII_BIT); + + // Disable PHY power down. + PIOB_PER = BV(PHY_PWRDN_BIT); + PIOB_OER = BV(PHY_PWRDN_BIT); + PIOB_CODR = BV(PHY_PWRDN_BIT); +#else + pmc_periphEnable(PIOA_ID); + pmc_periphEnable(PIOB_ID); + pmc_periphEnable(PIOC_ID); + pmc_periphEnable(PIOD_ID); + pmc_periphEnable(EMAC_ID); + + // Disable TESTMODE + PIOB_PUDR = BV(PHY_RXDV_TESTMODE_BIT); +#endif + + // Toggle external hardware reset pin. + RSTC_MR = RSTC_KEY | (1 << RSTC_ERSTL_SHIFT) | BV(RSTC_URSTEN); + RSTC_CR = RSTC_KEY | BV(RSTC_EXTRST); + + while ((RSTC_SR & BV(RSTC_NRSTL)) == 0) + cpu_relax(); + + // Configure MII ports. +#if CPU_ARM_AT91 + PIOB_ASR = PHY_MII_PINS; + PIOB_BSR = 0; + PIOB_PDR = PHY_MII_PINS; + + // Enable receive and transmit clocks. + EMAC_USRIO = BV(EMAC_CLKEN); +#else + PIO_PERIPH_SEL(PIOB_BASE, PHY_MII_PINS_PORTB, PIO_PERIPH_A); + PIOB_PDR = PHY_MII_PINS_PORTB; + + // Enable receive, transmit clocks and RMII mode. + EMAC_USRIO = BV(EMAC_CLKEN) | BV(EMAC_RMII); +#endif + + // Enable management port. + EMAC_NCR |= BV(EMAC_MPE); + EMAC_NCFGR |= EMAC_CLK_HCLK_64; + + // Set local MAC address. + EMAC_SA1L = (mac_addr[3] << 24) | (mac_addr[2] << 16) | + (mac_addr[1] << 8) | mac_addr[0]; + EMAC_SA1H = (mac_addr[5] << 8) | mac_addr[4]; + + emac_autoNegotiation(); + + // Disable management port. + EMAC_NCR &= ~BV(EMAC_MPE); + + return 0; +} + + +static int emac_start(void) +{ + uint32_t addr; + int i; + + for (i = 0; i < EMAC_RX_DESCRIPTORS; i++) + { + addr = (uint32_t)(rx_buf + (i * EMAC_RX_BUFSIZ)); + rx_buf_tab[i].addr = addr & BUF_ADDRMASK; + } + rx_buf_tab[EMAC_RX_DESCRIPTORS - 1].addr |= RXBUF_WRAP; + + for (i = 0; i < EMAC_TX_DESCRIPTORS; i++) + { + addr = (uint32_t)(tx_buf + (i * EMAC_TX_BUFSIZ)); + tx_buf_tab[i].addr = addr & BUF_ADDRMASK; + tx_buf_tab[i].stat = TXS_USED; + } + tx_buf_tab[EMAC_TX_DESCRIPTORS - 1].stat = TXS_USED | TXS_WRAP; + + /* Tell the EMAC where to find the descriptors. */ + EMAC_RBQP = (uint32_t)rx_buf_tab; + EMAC_TBQP = (uint32_t)tx_buf_tab; + + /* Clear receiver status. */ + EMAC_RSR = BV(EMAC_OVR) | BV(EMAC_REC) | BV(EMAC_BNA); + + /* Copy all frames and discard FCS. */ + EMAC_NCFGR |= BV(EMAC_CAF) | BV(EMAC_DRFCS); + + /* Enable receiver, transmitter and statistics. */ + EMAC_NCR |= BV(EMAC_TE) | BV(EMAC_RE) | BV(EMAC_WESTAT); + + return 0; +} + +ssize_t eth_putFrame(const uint8_t *buf, size_t len) +{ + size_t wr_len; + + if (UNLIKELY(!len)) + return -1; + ASSERT(len <= sizeof(tx_buf)); + + /* Check if the transmit buffer is available */ + while (!(tx_buf_tab[tx_buf_idx].stat & TXS_USED)) + event_wait(&send_wait); + + /* Copy the data into the buffer and prepare descriptor */ + wr_len = MIN(len, (size_t)EMAC_TX_BUFSIZ - tx_buf_offset); + memcpy((uint8_t *)tx_buf_tab[tx_buf_idx].addr + tx_buf_offset, + buf, wr_len); + tx_buf_offset += wr_len; + + return wr_len; +} + +void eth_sendFrame(void) +{ + tx_buf_tab[tx_buf_idx].stat = (tx_buf_offset & TXS_LENGTH_FRAME) | + TXS_LAST_BUFF | + ((tx_buf_idx == EMAC_TX_DESCRIPTORS - 1) ? TXS_WRAP : 0); + EMAC_NCR |= BV(EMAC_TSTART); + + tx_buf_offset = 0; + if (++tx_buf_idx >= EMAC_TX_DESCRIPTORS) + tx_buf_idx = 0; +} + +ssize_t eth_send(const uint8_t *buf, size_t len) + { + if (UNLIKELY(!len)) + return -1; + + len = eth_putFrame(buf, len); + eth_sendFrame(); + + return len; +} + +static void eth_buf_realign(int idx) +{ + /* Empty buffer found. Realign. */ + do { + rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP; + if (++rx_buf_idx >= EMAC_RX_BUFFERS) + rx_buf_idx = 0; + } while (idx != rx_buf_idx); +} + +static size_t __eth_getFrameLen(void) +{ + int idx, n = EMAC_RX_BUFFERS; + +skip: + /* Skip empty buffers */ + while ((n > 0) && !(rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP)) + { + if (++rx_buf_idx >= EMAC_RX_BUFFERS) + rx_buf_idx = 0; + n--; + } + if (UNLIKELY(!n)) + { + LOG_INFO("no frame found\n"); + return 0; + } + /* Search the start of frame and cleanup fragments */ + while ((n > 0) && (rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP) && + !(rx_buf_tab[rx_buf_idx].stat & RXS_SOF)) + { + rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP; + if (++rx_buf_idx >= EMAC_RX_BUFFERS) + rx_buf_idx = 0; + n--; + } + if (UNLIKELY(!n)) + { + LOG_INFO("no SOF found\n"); + return 0; + } + /* Search end of frame to evaluate the total frame size */ + idx = rx_buf_idx; +restart: + while (n > 0) + { + if (UNLIKELY(!(rx_buf_tab[idx].addr & RXBUF_OWNERSHIP))) + { + /* Empty buffer found. Realign. */ + eth_buf_realign(idx); + goto skip; + } + if (rx_buf_tab[idx].stat & RXS_EOF) + return rx_buf_tab[idx].stat & RXS_LENGTH_FRAME; + if (UNLIKELY((idx != rx_buf_idx) && + (rx_buf_tab[idx].stat & RXS_SOF))) + { + /* Another start of frame found. Realign. */ + eth_buf_realign(idx); + goto restart; + } + if (++idx >= EMAC_RX_BUFFERS) + idx = 0; + n--; + } + LOG_INFO("no EOF found\n"); + return 0; +} + +size_t eth_getFrameLen(void) +{ + size_t len; + + /* Check if there is at least one available frame in the buffer */ + while (1) + { + len = __eth_getFrameLen(); + if (LIKELY(len)) + break; + /* Wait for RX interrupt */ + event_wait(&recv_wait); + } + return len; +} + +ssize_t eth_getFrame(uint8_t *buf, size_t len) +{ + uint8_t *addr; + size_t rd_len = 0; + + if (UNLIKELY(!len)) + return -1; + ASSERT(len <= sizeof(rx_buf)); + + /* Copy data from the RX buffer */ + addr = (uint8_t *)(rx_buf_tab[rx_buf_idx].addr & BUF_ADDRMASK); + if (addr + len > &rx_buf[countof(rx_buf)]) + { + size_t count = &rx_buf[countof(rx_buf)] - addr; + + memcpy(buf, addr, count); + memcpy(buf + count, rx_buf, len - count); + } + else + { + memcpy(buf, addr, len); + } + /* Update descriptors */ + while (rd_len < len) + { + if (len - rd_len >= EMAC_RX_BUFSIZ) + rd_len += EMAC_RX_BUFSIZ; + else + rd_len += len - rd_len; + if (UNLIKELY(!(rx_buf_tab[rx_buf_idx].addr & RXBUF_OWNERSHIP))) + { + LOG_INFO("bad frame found\n"); + return 0; + } + rx_buf_tab[rx_buf_idx].addr &= ~RXBUF_OWNERSHIP; + if (++rx_buf_idx >= EMAC_RX_DESCRIPTORS) + rx_buf_idx = 0; + } + + return rd_len; +} + +ssize_t eth_recv(uint8_t *buf, size_t len) +{ + if (UNLIKELY(!len)) + return -1; + len = MIN(len, eth_getFrameLen()); + return len ? eth_getFrame(buf, len) : 0; +} + +int eth_init() +{ + cpu_flags_t flags; + + emac_reset(); + emac_start(); + + event_initGeneric(&recv_wait); + event_initGeneric(&send_wait); + + // Register interrupt vector + IRQ_SAVE_DISABLE(flags); + + /* Disable all emac interrupts */ + EMAC_IDR = 0xFFFFFFFF; + +#if CPU_ARM_AT91 + // TODO: define sysirq_set... + /* Set the vector. */ + AIC_SVR(EMAC_ID) = emac_irqHandler; + /* Initialize to edge triggered with defined priority. */ + AIC_SMR(EMAC_ID) = AIC_SRCTYPE_INT_EDGE_TRIGGERED; + /* Clear pending interrupt */ + AIC_ICCR = BV(EMAC_ID); + /* Enable the system IRQ */ + AIC_IECR = BV(EMAC_ID); +#else + sysirq_setHandler(INT_EMAC, emac_irqHandler); +#endif + + /* Enable interrupts */ + EMAC_IER = EMAC_RX_INTS | EMAC_TX_INTS; + + IRQ_RESTORE(flags); + + return 0; +} diff --git a/bertos/cpu/cortex-m3/drv/eth_sam3.h b/bertos/cpu/cortex-m3/drv/eth_sam3.h new file mode 100644 index 0000000..7ed89bd --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/eth_sam3.h @@ -0,0 +1,210 @@ +/** + * \file + * + * + * \brief EMAC driver for AT91SAM family with Davicom 9161A phy, interface. + * + * \author Daniele Basile + * \author Andrea Righi + * \author Stefano Fedrigo + */ + +#ifndef ETH_SAM3_H +#define ETH_SAM3_H + +// Settings and definition for DAVICOM 9161A +// \{ +#define NIC_PHY_ADDR 0 + +// Register bits definition +#define NIC_PHY_BMCR 0x00 // Basic mode control register. +#define NIC_PHY_BMCR_COLTEST 0x0080 // Collision test. +#define NIC_PHY_BMCR_FDUPLEX 0x0100 // Full duplex mode. +#define NIC_PHY_BMCR_ANEGSTART 0x0200 // Restart auto negotiation. +#define NIC_PHY_BMCR_ISOLATE 0x0400 // Isolate from MII. +#define NIC_PHY_BMCR_PWRDN 0x0800 // Power-down. +#define NIC_PHY_BMCR_ANEGENA 0x1000 // Enable auto negotiation. +#define NIC_PHY_BMCR_100MBPS 0x2000 // Select 100 Mbps. +#define NIC_PHY_BMCR_LOOPBACK 0x4000 // Enable loopback mode. +#define NIC_PHY_BMCR_RESET 0x8000 // Software reset. + +#define NIC_PHY_BMSR 0x01 // Basic mode status register. +#define NIC_PHY_BMSR_ANCOMPL 0x0020 // Auto negotiation complete. +#define NIC_PHY_BMSR_ANEGCAPABLE 0x0008 // Able to do auto-negotiation +#define NIC_PHY_BMSR_LINKSTAT 0x0004 // Link status. + +#define NIC_PHY_ANLPAR_10_HDX BV(5) // 10BASE-T half duplex +#define NIC_PHY_ANLPAR_10_FDX BV(6) // 10BASE-T full duplex +#define NIC_PHY_ANLPAR_TX_HDX BV(7) // 100BASE-TX half duplex +#define NIC_PHY_ANLPAR_TX_FDX BV(8) // 100BASE-TX full duplex + +#define NIC_PHY_ID1 0x02 // PHY identifier register 1. +#define NIC_PHY_ID2 0x03 // PHY identifier register 2. +#define NIC_PHY_ANAR 0x04 // Auto negotiation advertisement register. +#define NIC_PHY_ANLPAR 0x05 // Auto negotiation link partner availability register. +#define NIC_PHY_ANER 0x06 // Auto negotiation expansion register. + +#if CPU_ARM_AT91 + +/* + * Pin definition for DAVICOM 9161A. + * See schematics for AT91SAM7X-EK evalution board. + */ +// All pins in port B +#define PHY_REFCLK_XT2_BIT 0 +#define PHY_TXEN_BIT 1 +#define PHY_TXD0_BIT 2 +#define PHY_TXD1_BIT 3 +#define PHY_CRS_AD4_BIT 4 +#define PHY_RXD0_AD0_BIT 5 +#define PHY_RXD1_AD1_BIT 6 +#define PHY_RXER_RXD4_RPTR_BIT 7 +#define PHY_MDC_BIT 8 +#define PHY_MDIO_BIT 9 +#define PHY_TXD2_BIT 10 +#define PHY_TXD3_BIT 11 +#define PHY_TXER_TXD4_BIT 12 +#define PHY_RXD2_AD2_BIT 13 +#define PHY_RXD3_AD3_BIT 14 +#define PHY_RXDV_TESTMODE_BIT 15 +#define PHY_COL_RMII_BIT 16 +#define PHY_RXCLK_10BTSER_BIT 17 +#define PHY_PWRDN_BIT 18 +#define PHY_MDINTR_BIT 26 + +#define PHY_MII_PINS \ + BV(PHY_REFCLK_XT2_BIT) \ + | BV(PHY_TXEN_BIT) \ + | BV(PHY_TXD0_BIT) \ + | BV(PHY_TXD1_BIT) \ + | BV(PHY_CRS_AD4_BIT) \ + | BV(PHY_RXD0_AD0_BIT) \ + | BV(PHY_RXD1_AD1_BIT) \ + | BV(PHY_RXER_RXD4_RPTR_BIT) \ + | BV(PHY_MDC_BIT) \ + | BV(PHY_MDIO_BIT) \ + | BV(PHY_TXD2_BIT) \ + | BV(PHY_TXD3_BIT) \ + | BV(PHY_TXER_TXD4_BIT) \ + | BV(PHY_RXD2_AD2_BIT) \ + | BV(PHY_RXD3_AD3_BIT) \ + | BV(PHY_RXDV_TESTMODE_BIT) \ + | BV(PHY_COL_RMII_BIT) \ + | BV(PHY_RXCLK_10BTSER_BIT) + +#else + +/* + * Pin definition for DAVICOM 9161A. + * See schematics for SAM3X-EK evalution board. + */ +// Port B +#define PHY_REFCLK_XT2_BIT 0 +#define PHY_TXEN_BIT 1 +#define PHY_TXD0_BIT 2 +#define PHY_TXD1_BIT 3 +#define PHY_RXDV_TESTMODE_BIT 4 +#define PHY_RXD0_AD0_BIT 5 +#define PHY_RXD1_AD1_BIT 6 +#define PHY_RXER_RXD4_RPTR_BIT 7 +#define PHY_MDC_BIT 8 +#define PHY_MDIO_BIT 9 +// Port A +#define PHY_MDINTR_BIT 5 + +#define PHY_MII_PINS_PORTB \ + BV(PHY_REFCLK_XT2_BIT) \ + | BV(PHY_TXEN_BIT) \ + | BV(PHY_TXD0_BIT) \ + | BV(PHY_TXD1_BIT) \ + | BV(PHY_RXD0_AD0_BIT) \ + | BV(PHY_RXD1_AD1_BIT) \ + | BV(PHY_RXER_RXD4_RPTR_BIT) \ + | BV(PHY_MDC_BIT) \ + | BV(PHY_MDIO_BIT) + +#endif /* CPU_ARM_AT91 */ +// \} + + +#define EMAC_TX_BUFSIZ 1518 //!!! Don't change this +#define EMAC_TX_BUFFERS 1 //!!! Don't change this +#define EMAC_TX_DESCRIPTORS EMAC_TX_BUFFERS + +#define EMAC_RX_BUFFERS 32 //!!! Don't change this +#define EMAC_RX_BUFSIZ 128 //!!! Don't change this +#define EMAC_RX_DESCRIPTORS EMAC_RX_BUFFERS + +// Flag to manage local tx buffer +#define TXS_USED 0x80000000 //Used buffer. +#define TXS_WRAP 0x40000000 //Last descriptor. +#define TXS_ERROR 0x20000000 //Retry limit exceeded. +#define TXS_UNDERRUN 0x10000000 //Transmit underrun. +#define TXS_NO_BUFFER 0x08000000 //Buffer exhausted. +#define TXS_NO_CRC 0x00010000 //CRC not appended. +#define TXS_LAST_BUFF 0x00008000 //Last buffer of frame. +#define TXS_LENGTH_FRAME 0x000007FF // Length of frame including FCS. + +// Flag to manage local rx buffer +#define RXBUF_OWNERSHIP 0x00000001 +#define RXBUF_WRAP 0x00000002 + +#define BUF_ADDRMASK 0xFFFFFFFC + +#define RXS_BROADCAST_ADDR 0x80000000 // Broadcast address detected. +#define RXS_MULTICAST_HASH 0x40000000 // Multicast hash match. +#define RXS_UNICAST_HASH 0x20000000 // Unicast hash match. +#define RXS_EXTERNAL_ADDR 0x10000000 // External address match. +#define RXS_SA1_ADDR 0x04000000 // Specific address register 1 match. +#define RXS_SA2_ADDR 0x02000000 // Specific address register 2 match. +#define RXS_SA3_ADDR 0x01000000 // Specific address register 3 match. +#define RXS_SA4_ADDR 0x00800000 // Specific address register 4 match. +#define RXS_TYPE_ID 0x00400000 // Type ID match. +#define RXS_VLAN_TAG 0x00200000 // VLAN tag detected. +#define RXS_PRIORITY_TAG 0x00100000 // Priority tag detected. +#define RXS_VLAN_PRIORITY 0x000E0000 // VLAN priority. +#define RXS_CFI_IND 0x00010000 // Concatenation format indicator. +#define RXS_EOF 0x00008000 // End of frame. +#define RXS_SOF 0x00004000 // Start of frame. +#define RXS_RBF_OFFSET 0x00003000 // Receive buffer offset mask. +#define RXS_LENGTH_FRAME 0x000007FF // Length of frame including FCS. + +#define EMAC_RSR_BITS (BV(EMAC_BNA) | BV(EMAC_REC) | BV(EMAC_OVR)) +#define EMAC_TSR_BITS (BV(EMAC_UBR) | BV(EMAC_COL) | BV(EMAC_RLES) | \ + BV(EMAC_BEX) | BV(EMAC_COMP) | BV(EMAC_UND)) + +typedef struct BufDescriptor +{ + volatile uint32_t addr; + volatile uint32_t stat; +} BufDescriptor; + +#endif /* ETH_SAM3_H */ diff --git a/bertos/cpu/cortex-m3/drv/flash_cm3.h b/bertos/cpu/cortex-m3/drv/flash_cm3.h new file mode 100644 index 0000000..6b4bf11 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/flash_cm3.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Low-level flash module for Cortex-M3 (interface). + * + * \author Daniele Basile + */ + +#include + +#if CPU_CM3_LM3S + #include "flash_lm3s.h" +#elif CPU_CM3_STM32 + #include "flash_stm32.h" +/*#elif Add other Cortex-M3 CPUs here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/cortex-m3/drv/flash_lm3s.c b/bertos/cpu/cortex-m3/drv/flash_lm3s.c new file mode 100644 index 0000000..ffec0db --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/flash_lm3s.c @@ -0,0 +1,223 @@ +/** + * \file + * + * + * \brief LM3S1968 internal flash memory driver. + * + * \author Andrea Righi + */ + +#include "flash_lm3s.h" +#include "cfg/cfg_emb_flash.h" + +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_FLASH_EMB_LOG_LEVEL +#define LOG_FORMAT CONFIG_FLASH_EMB_LOG_FORMAT +#include +#include + +#include + +#include +#include + +#include /* cpu_relax() */ +#include + +#include /* memcpy() */ + +struct FlashHardware +{ + int status; +}; + +static bool flash_wait(struct KBlock *blk, uint32_t event) +{ + Flash *fls = FLASH_CAST(blk); + ticks_t start = timer_clock(); + while (true) + { + if (!(FLASH_FMC_R & event)) + break; + + if (FLASH_FCRIS_R & FLASH_FCRIS_ARIS) + { + fls->hw->status |= FLASH_WR_PROTECT; + LOG_ERR("wr protect..\n"); + return false; + } + + if (timer_clock() - start > ms_to_ticks(CONFIG_FLASH_WR_TIMEOUT)) + { + fls->hw->status |= FLASH_WR_TIMEOUT; + LOG_ERR("Timeout..\n"); + return false; + } + + cpu_relax(); + } + + return true; +} + +static int lm3s_erasePage(struct KBlock *blk, uint32_t addr) +{ + FLASH_FCMISC_R = FLASH_FCMISC_AMISC; + + FLASH_FMA_R = (volatile uint32_t)addr; + FLASH_FMC_R = FLASH_FMC_WRKEY | FLASH_FMC_ERASE; + + return flash_wait(blk, FLASH_FMC_ERASE); +} + +static int lm3s_writeWord(struct KBlock *blk, uint32_t addr, uint32_t data) +{ + FLASH_FCMISC_R = FLASH_FCMISC_AMISC; + + FLASH_FMA_R = (volatile uint32_t)addr; + FLASH_FMD_R = (volatile uint32_t)data; + FLASH_FMC_R = FLASH_FMC_WRKEY | FLASH_FMC_WRITE; + + return flash_wait(blk, FLASH_FMC_WRITE); +} + +static size_t lm3s_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size) +{ + memcpy(buf, (void *)(idx * blk->blk_size + offset), size); + return size; +} + +static size_t lm3s_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size) +{ + (void)offset; + ASSERT(offset == 0); + ASSERT(size == blk->blk_size); + + if (!lm3s_erasePage(blk, (idx * blk->blk_size))) + return 0; + + uint32_t addr = idx * blk->blk_size; + const uint8_t *buf = (const uint8_t *)_buf; + + while (size) + { + uint32_t data = (*(buf + 3) << 24) | + (*(buf + 2) << 16) | + (*(buf + 1) << 8) | + *buf; + + if (!lm3s_writeWord(blk, addr, data)) + return 0; + + size -= 4; + buf += 4; + addr += 4; + } + + return blk->blk_size; +} + +static int lm3s_flash_error(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + return fls->hw->status; +} + +static void lm3s_flash_clearerror(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + fls->hw->status = 0; +} + +static const KBlockVTable flash_lm3s_buffered_vt = +{ + .readDirect = lm3s_flash_readDirect, + .writeDirect = lm3s_flash_writeDirect, + + .readBuf = kblock_swReadBuf, + .writeBuf = kblock_swWriteBuf, + .load = kblock_swLoad, + .store = kblock_swStore, + + .close = kblock_swClose, + + .error = lm3s_flash_error, + .clearerr = lm3s_flash_clearerror, +}; + +static const KBlockVTable flash_lm3s_unbuffered_vt = +{ + .readDirect = lm3s_flash_readDirect, + .writeDirect = lm3s_flash_writeDirect, + + .close = kblock_swClose, + + .error = lm3s_flash_error, + .clearerr = lm3s_flash_clearerror, +}; + +static struct FlashHardware flash_lm3s_hw; +static uint8_t flash_buf[FLASH_PAGE_SIZE]; + +static void common_init(Flash *fls) +{ + memset(fls, 0, sizeof(*fls)); + DB(fls->blk.priv.type = KBT_FLASH); + + FLASH_USECRL_R = CPU_FREQ / 1000000 - 1; + + fls->hw = &flash_lm3s_hw; + + fls->blk.blk_size = FLASH_PAGE_SIZE; + fls->blk.blk_cnt = FLASH_SIZE / FLASH_PAGE_SIZE; +} + + +void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags)) +{ + common_init(fls); + fls->blk.priv.vt = &flash_lm3s_buffered_vt; + fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE; + fls->blk.priv.buf = flash_buf; + + /* Load the first block in the cache */ + void *flash_start = 0x0; + memcpy(fls->blk.priv.buf, flash_start, fls->blk.blk_size); +} + +void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags)) +{ + common_init(fls); + fls->blk.priv.vt = &flash_lm3s_unbuffered_vt; +} + + + diff --git a/bertos/cpu/cortex-m3/drv/flash_lm3s.h b/bertos/cpu/cortex-m3/drv/flash_lm3s.h new file mode 100644 index 0000000..8c8852f --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/flash_lm3s.h @@ -0,0 +1,41 @@ +/** + * \file + * + * + * \brief LM3S1968 internal flash memory driver. + * + * \author Andrea Righi + */ + +#ifndef FLASH_LM3S_H +#define FLASH_LM3S_H + +#endif /* FLASH_LM3S_H */ diff --git a/bertos/cpu/cortex-m3/drv/flash_stm32.c b/bertos/cpu/cortex-m3/drv/flash_stm32.c new file mode 100644 index 0000000..d92e914 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/flash_stm32.c @@ -0,0 +1,252 @@ +/** + * \file + * + * + * \brief STM32F103xx internal flash memory driver. + * + * \author Daniele Basile + */ + +#include "flash_stm32.h" + +#include "cfg/cfg_emb_flash.h" + +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_FLASH_EMB_LOG_LEVEL +#define LOG_FORMAT CONFIG_FLASH_EMB_LOG_FORMAT +#include + +#include +#include + +#include +#include + +#include + +#include + +#define EMB_FLASH ((struct stm32_flash*)FLASH_R_BASE) + +struct FlashHardware +{ + uint8_t status; +}; + +static bool flash_wait(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + ticks_t start = timer_clock(); + while (true) + { + cpu_relax(); + if (!(EMB_FLASH->SR & FLASH_FLAG_BSY)) + break; + + if (EMB_FLASH->SR & FLASH_FLAG_PGERR) + { + fls->hw->status |= FLASH_NOT_ERASED; + LOG_ERR("flash not erased..\n"); + return false; + } + + if (EMB_FLASH->SR & FLASH_FLAG_WRPRTERR) + { + fls->hw->status |= FLASH_WR_PROTECT; + LOG_ERR("wr protect..\n"); + return false; + } + + if (timer_clock() - start > ms_to_ticks(CONFIG_FLASH_WR_TIMEOUT)) + { + fls->hw->status |= FLASH_WR_TIMEOUT; + LOG_ERR("Timeout..\n"); + return false; + } + } + + return true; +} + +static bool stm32_erasePage(struct KBlock *blk, uint32_t page_add) +{ + + EMB_FLASH->CR |= CR_PER_SET; + EMB_FLASH->AR = page_add; + EMB_FLASH->CR |= CR_STRT_SET; + + if (!flash_wait(blk)) + return false; + + EMB_FLASH->CR &= CR_PER_RESET; + + return true; +} + +#if 0 +// not used for now +static bool stm32_eraseAll(struct KBlock *blk) +{ + EMB_FLASH->CR |= CR_MER_SET; + EMB_FLASH->CR |= CR_STRT_SET; + + if (!flash_wait(blk)) + return false; + + EMB_FLASH->CR &= CR_MER_RESET; + + return true; +} +#endif + +static int stm32_flash_error(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + return fls->hw->status; +} + +static void stm32_flash_clearerror(struct KBlock *blk) +{ + Flash *fls = FLASH_CAST(blk); + fls->hw->status = 0; +} + +static size_t stm32_flash_readDirect(struct KBlock *blk, block_idx_t idx, void *buf, size_t offset, size_t size) +{ + memcpy(buf, (void *)(idx * blk->blk_size + offset), size); + return size; +} + + +INLINE bool stm32_writeWord(struct KBlock *blk, uint32_t addr, uint16_t data) +{ + ASSERT(!(addr % 2)); + + EMB_FLASH->CR |= CR_PG_SET; + + *(reg16_t *)addr = data; + + if (!flash_wait(blk)) + return false; + + EMB_FLASH->CR &= CR_PG_RESET; + + return true; +} + +static size_t stm32_flash_writeDirect(struct KBlock *blk, block_idx_t idx, const void *_buf, size_t offset, size_t size) +{ + ASSERT(offset == 0); + ASSERT(size == blk->blk_size); + + if (!stm32_erasePage(blk, (idx * blk->blk_size))) + return 0; + + uint32_t addr = idx * blk->blk_size; + const uint8_t *buf = (const uint8_t *)_buf; + + while (size) + { + uint16_t data = (*(buf + 1) << 8) | *buf; + if (!stm32_writeWord(blk, addr, data)) + return 0; + + buf += 2; + size -= 2; + addr += 2; + } + + return blk->blk_size; +} + +static const KBlockVTable flash_stm32_buffered_vt = +{ + .readDirect = stm32_flash_readDirect, + .writeDirect = stm32_flash_writeDirect, + + .readBuf = kblock_swReadBuf, + .writeBuf = kblock_swWriteBuf, + .load = kblock_swLoad, + .store = kblock_swStore, + + .close = kblock_swClose, + + .error = stm32_flash_error, + .clearerr = stm32_flash_clearerror, +}; + +static const KBlockVTable flash_stm32_unbuffered_vt = +{ + .readDirect = stm32_flash_readDirect, + .writeDirect = stm32_flash_writeDirect, + + .close = kblock_swClose, + + .error = stm32_flash_error, + .clearerr = stm32_flash_clearerror, +}; + +static struct FlashHardware flash_stm32_hw; +static uint8_t flash_buf[FLASH_PAGE_SIZE]; + +static void common_init(Flash *fls) +{ + memset(fls, 0, sizeof(*fls)); + DB(fls->blk.priv.type = KBT_FLASH); + + fls->hw = &flash_stm32_hw; + + fls->blk.blk_size = FLASH_PAGE_SIZE; + fls->blk.blk_cnt = (F_SIZE * 1024) / FLASH_PAGE_SIZE; + + /* Unlock flash memory for the FPEC Access */ + EMB_FLASH->KEYR = FLASH_KEY1; + EMB_FLASH->KEYR = FLASH_KEY2; +} + + +void flash_hw_init(Flash *fls, UNUSED_ARG(int, flags)) +{ + common_init(fls); + fls->blk.priv.vt = &flash_stm32_buffered_vt; + fls->blk.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE; + fls->blk.priv.buf = flash_buf; + + /* Load the first block in the cache */ + void *flash_start = 0x0; + memcpy(fls->blk.priv.buf, flash_start, fls->blk.blk_size); +} + +void flash_hw_initUnbuffered(Flash *fls, UNUSED_ARG(int, flags)) +{ + common_init(fls); + fls->blk.priv.vt = &flash_stm32_unbuffered_vt; +} diff --git a/bertos/cpu/cortex-m3/drv/flash_stm32.h b/bertos/cpu/cortex-m3/drv/flash_stm32.h new file mode 100644 index 0000000..51bf35c --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/flash_stm32.h @@ -0,0 +1,41 @@ +/** + * \file + * + * + * \brief STM32F103xx internal flash memory driver. + * + * \author Daniele Basile + */ + +#ifndef FLASH_STM32_H +#define FLASH_STM32_H + +#endif /* FLASH_STM32_H */ diff --git a/bertos/cpu/cortex-m3/drv/gpio_lm3s.c b/bertos/cpu/cortex-m3/drv/gpio_lm3s.c new file mode 100644 index 0000000..6ed16e4 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/gpio_lm3s.c @@ -0,0 +1,206 @@ +/** + * \file + * + * + * \brief LM3S1968 GPIO control interface. + * + * \author Andrea Righi + */ + + +#include "gpio_lm3s.h" + +#include +#include + +#include + + +/* Set the pin(s) direction and mode */ +INLINE int lm3s_gpioPinConfigMode(uint32_t port, uint8_t pins, uint32_t mode) +{ + if (mode == GPIO_DIR_MODE_IN) + { + HWREG(port + GPIO_O_DIR) &= ~pins; + HWREG(port + GPIO_O_AFSEL) &= ~pins; + } + else if (mode == GPIO_DIR_MODE_OUT) + { + HWREG(port + GPIO_O_DIR) |= pins; + HWREG(port + GPIO_O_AFSEL) &= ~pins; + } + else if (mode == GPIO_DIR_MODE_HW) + { + HWREG(port + GPIO_O_DIR) &= ~pins; + HWREG(port + GPIO_O_AFSEL) |= pins; + } + else + { + ASSERT(0); + return -1; + } + return 0; +} + +/* Set the pin(s) output strength */ +INLINE int +lm3s_gpioPinConfigStrength(uint32_t port, uint8_t pins, uint32_t strength) +{ + if (strength == GPIO_STRENGTH_2MA) + { + HWREG(port + GPIO_O_DR2R) |= pins; + HWREG(port + GPIO_O_DR4R) &= ~pins; + HWREG(port + GPIO_O_DR8R) &= ~pins; + HWREG(port + GPIO_O_SLR) &= ~pins; + } + else if (strength == GPIO_STRENGTH_4MA) + { + HWREG(port + GPIO_O_DR2R) &= ~pins; + HWREG(port + GPIO_O_DR4R) |= pins; + HWREG(port + GPIO_O_DR8R) &= ~pins; + HWREG(port + GPIO_O_SLR) &= ~pins; + } + else if (strength == GPIO_STRENGTH_8MA) + { + HWREG(port + GPIO_O_DR2R) &= ~pins; + HWREG(port + GPIO_O_DR4R) &= ~pins; + HWREG(port + GPIO_O_DR8R) |= pins; + HWREG(port + GPIO_O_SLR) &= ~pins; + } + else if (strength == GPIO_STRENGTH_8MA_SC) + { + HWREG(port + GPIO_O_DR2R) &= ~pins; + HWREG(port + GPIO_O_DR4R) &= ~pins; + HWREG(port + GPIO_O_DR8R) |= pins; + HWREG(port + GPIO_O_SLR) |= pins; + } + else + { + ASSERT(0); + return -1; + } + return 0; +} + +/* Set the pin(s) type */ +INLINE int lm3s_gpioPinConfigType(uint32_t port, uint8_t pins, uint32_t type) +{ + if (type == GPIO_PIN_TYPE_STD) + { + HWREG(port + GPIO_O_ODR) &= ~pins; + HWREG(port + GPIO_O_PUR) &= ~pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_STD_WPU) + { + HWREG(port + GPIO_O_ODR) &= ~pins; + HWREG(port + GPIO_O_PUR) |= pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_STD_WPD) + { + HWREG(port + GPIO_O_ODR) &= ~pins; + HWREG(port + GPIO_O_PUR) &= ~pins; + HWREG(port + GPIO_O_PDR) |= pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_OD) + { + HWREG(port + GPIO_O_ODR) |= pins; + HWREG(port + GPIO_O_PUR) &= ~pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_OD_WPU) + { + HWREG(port + GPIO_O_ODR) |= pins; + HWREG(port + GPIO_O_PUR) |= pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_OD_WPD) + { + HWREG(port + GPIO_O_ODR) |= pins; + HWREG(port + GPIO_O_PUR) &= pins; + HWREG(port + GPIO_O_PDR) |= pins; + HWREG(port + GPIO_O_DEN) |= pins; + HWREG(port + GPIO_O_AMSEL) &= ~pins; + } + else if (type == GPIO_PIN_TYPE_ANALOG) + { + HWREG(port + GPIO_O_ODR) &= ~pins; + HWREG(port + GPIO_O_PUR) &= ~pins; + HWREG(port + GPIO_O_PDR) &= ~pins; + HWREG(port + GPIO_O_DEN) &= ~pins; + HWREG(port + GPIO_O_AMSEL) |= pins; + } + else + { + ASSERT(0); + return -1; + } + return 0; +} + +/** + * Configure a GPIO pin + * + * \param port Base address of the GPIO port + * \param pins Bit-packed representation of the pin(s) + * \param mode Pin(s) configuration mode + * \param strength Output drive strength + * \param type Pin(s) type + * + * Return 0 on success, otherwise a negative value. + */ +int lm3s_gpioPinConfig(uint32_t port, uint8_t pins, + uint32_t mode, uint32_t strength, uint32_t type) +{ + int ret; + + ret = lm3s_gpioPinConfigMode(port, pins, mode); + if (UNLIKELY(ret < 0)) + return ret; + ret = lm3s_gpioPinConfigStrength(port, pins, strength); + if (UNLIKELY(ret < 0)) + return ret; + ret = lm3s_gpioPinConfigType(port, pins, type); + if (UNLIKELY(ret < 0)) + return ret; + return 0; +} diff --git a/bertos/cpu/cortex-m3/drv/gpio_lm3s.h b/bertos/cpu/cortex-m3/drv/gpio_lm3s.h new file mode 100644 index 0000000..d80c033 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/gpio_lm3s.h @@ -0,0 +1,97 @@ +/** + * \file + * + * + * \brief LM3S1968 GPIO control interface. + */ + +#ifndef GPIO_LM3S_H +#define GPIO_LM3S_H + +#include + +/** + * GPIO mode + */ +/*\{*/ +enum +{ + GPIO_DIR_MODE_IN = 0, //< Pin is a GPIO input + GPIO_DIR_MODE_OUT, //< Pin is a GPIO output + GPIO_DIR_MODE_HW, //< Pin is a peripheral function +}; +/*\}*/ + +/** + * GPIO strenght + */ +/*\{*/ +enum +{ + GPIO_STRENGTH_2MA = 0, //< 2mA drive strength + GPIO_STRENGTH_4MA, //< 4mA drive strength + GPIO_STRENGTH_8MA, //< 8mA drive strength + GPIO_STRENGTH_8MA_SC, //< 8mA drive with slew rate control +}; +/*\}*/ + +/** + * GPIO type + */ +/*\{*/ +enum +{ + GPIO_PIN_TYPE_ANALOG = 0, //< Analog comparator + GPIO_PIN_TYPE_STD, //< Push-pull + GPIO_PIN_TYPE_STD_WPU, //< Push-pull with weak pull-up + GPIO_PIN_TYPE_STD_WPD, //< Push-pull with weak pull-down + GPIO_PIN_TYPE_OD, //< Open-drain + GPIO_PIN_TYPE_OD_WPU, //< Open-drain with weak pull-up + GPIO_PIN_TYPE_OD_WPD, //< Open-drain with weak pull-down +}; +/*\}*/ + +/* Write a value to the specified pin(s) */ +INLINE void lm3s_gpioPinWrite(uint32_t port, uint8_t pins, uint8_t val) +{ + HWREG(port + GPIO_O_DATA + (pins << 2)) = val; +} + +/* Read a value from the specified pin(s) */ +INLINE uint32_t lm3s_gpioPinRead(uint32_t port, uint8_t pins) +{ + return HWREG(port + GPIO_O_DATA + (pins << 2)); +} + +int lm3s_gpioPinConfig(uint32_t port, uint8_t pins, + uint32_t mode, uint32_t strength, uint32_t type); + +#endif /* GPIO_LM3S_H */ diff --git a/bertos/cpu/cortex-m3/drv/gpio_stm32.c b/bertos/cpu/cortex-m3/drv/gpio_stm32.c new file mode 100644 index 0000000..552d15b --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/gpio_stm32.c @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief STM32 GPIO control interface. + * + * \author Andrea Righi + */ + +#include "gpio_stm32.h" + +#include +#include + +#include + + +/** + * Configure a GPIO pin + * + * \param base Base address of the GPIO port + * \param pins Bit-packed representation of the pin(s) + * \param mode Pin(s) configuration mode + * \param speed Output drive speed + * + * Return 0 on success, otherwise a negative value. + */ +int stm32_gpioPinConfig(struct stm32_gpio *base, + uint16_t pins, uint8_t mode, uint8_t speed) +{ + uint32_t reg_mode = mode & 0x0f; + int i; + + if (mode & 0x10) + reg_mode |= speed; + + if (pins & 0xff) + { + uint32_t reg = base->CRL; + + for (i = 0; i < 8; i++) + { + uint32_t pos = 1 << i; + + if (pins & pos) + { + pos = i << 2; + reg &= ~(0x0f << pos); + reg |= reg_mode << pos; + + if (mode == GPIO_MODE_IPD) + base->BRR = 0x01 << i; + if (mode == GPIO_MODE_IPU) + base->BSRR = 0x01 << i; + } + } + base->CRL = reg; + } + if (pins > 0xff) + { + uint32_t reg = base->CRH; + + for (i = 0; i < 8; i++) + { + uint32_t pos = 1 << (i + 8); + + if (pins & pos) + { + pos = i << 2; + reg &= ~(0x0f << pos); + reg |= reg_mode << pos; + + if (mode == GPIO_MODE_IPD) + base->BRR = 0x01 << (i + 8); + if (mode == GPIO_MODE_IPU) + base->BSRR = 0x01 << (i + 8); + } + } + base->CRH = reg; + } + return 0; +} diff --git a/bertos/cpu/cortex-m3/drv/gpio_stm32.h b/bertos/cpu/cortex-m3/drv/gpio_stm32.h new file mode 100644 index 0000000..17be2f5 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/gpio_stm32.h @@ -0,0 +1,106 @@ +/** + * \file + * + * + * \brief STM32 GPIO control interface. + */ + +#ifndef GPIO_STM32_H +#define GPIO_STM32_H + +#include + +/** + * GPIO mode + * \{ + */ +enum +{ + GPIO_MODE_AIN = 0x0, + GPIO_MODE_IN_FLOATING = 0x04, + GPIO_MODE_IPD = 0x28, + GPIO_MODE_IPU = 0x48, + GPIO_MODE_OUT_OD = 0x14, + GPIO_MODE_OUT_PP = 0x10, + GPIO_MODE_AF_OD = 0x1C, + GPIO_MODE_AF_PP = 0x18, +}; +/*\}*/ + +/** + * GPIO speed + *\{ + */ +enum +{ + GPIO_SPEED_10MHZ = 1, + GPIO_SPEED_2MHZ, + GPIO_SPEED_50MHZ, +}; +/*\}*/ + +/** + * Write a value to the specified pin(s) + * + * \param base gpio register address + * \param pins mask of pins that we want set or clear + * \param val true to set selected pins of false to clear they. + */ +INLINE void stm32_gpioPinWrite(struct stm32_gpio *base, uint16_t pins, bool val) +{ + if (val) + base->BSRR |= pins; + else + base->BRR |= pins; +} + +/** + * Read a value from the specified pin(s) + * + * \param base gpio register address + * \param pins mask of pins that we want read + */ +INLINE uint16_t stm32_gpioPinRead(struct stm32_gpio *base, uint16_t pins) +{ + return (base->IDR & pins); +} + +/** + * Initialize a GPIO peripheral configuration + * + * \param base gpio register address + * \param pins mask of pins that we want to configure + * \param mode select the behaviour of selected pins + * \param speed clock frequency for selected gpio ports + */ +int stm32_gpioPinConfig(struct stm32_gpio *base, uint16_t pins, uint8_t mode, uint8_t speed); + +#endif /* GPIO_STM32_H */ diff --git a/bertos/cpu/cortex-m3/drv/i2c_cm3.h b/bertos/cpu/cortex-m3/drv/i2c_cm3.h new file mode 100644 index 0000000..1af140d --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/i2c_cm3.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Low-level I2C module for ARM Cortex-m3 (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_CM3_LM3S + #include "i2c_lm3s.h" +#elif CPU_CM3_STM32 + #include "i2c_stm32.h" +#elif CPU_CM3_SAM3 + #include "i2c_sam3.h" +/*#elif Add other Cortex-M3 CPUs here */ +#else + #error Unknown CPU +#endif + diff --git a/bertos/cpu/cortex-m3/drv/i2c_lm3s.c b/bertos/cpu/cortex-m3/drv/i2c_lm3s.c new file mode 100644 index 0000000..fd2f590 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/i2c_lm3s.c @@ -0,0 +1,256 @@ +/** + * \file + * + * + * \brief Driver for the LM3S I2C (implementation) + * + * \author Daniele Basile + * + */ + +#include "cfg/cfg_i2c.h" + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT + +#include + +#include +#include // BV() + +#include +#include +#include +#include + +#include + +#include +#include +#include +#include + + +struct I2cHardware +{ + uint32_t base; + uint32_t sys_cntl; + uint32_t sys_gpio; + uint32_t pin_mask; + uint32_t gpio_base; + bool first_xtranf; +}; + +#define WAIT_BUSY(base) \ + do { \ + while (HWREG(base + I2C_O_MCS) & I2C_MCS_BUSY ) \ + cpu_relax(); \ + } while (0); + + +/* + * The start is not performed when we call the start function + * because the hardware should know the first data byte to send. + * Generally to perform a byte send we should write the slave address + * in slave address register and the first byte to send in data registry. + * After then we can perform the start write procedure, and send really + * the our data. To use common bertos i2c api the really start will be + * performed when the user "put" or "send" its data. These tricks are hide + * from the driver implementation. + */ +static void i2c_lm3s_start(struct I2c *i2c, uint16_t slave_addr) +{ + i2c->hw->first_xtranf = true; + + if (I2C_TEST_START(i2c->flags) == I2C_START_W) + HWREG(i2c->hw->base + I2C_O_MSA) = slave_addr & ~BV(0); + else /* (I2C_TEST_START(i2c->flags) == I2C_START_R) */ + HWREG(i2c->hw->base + I2C_O_MSA) = slave_addr | BV(0); +} + +INLINE bool wait_addrAck(I2c *i2c, uint32_t mode_mask) +{ + ticks_t start = timer_clock(); + while (1) + { + uint32_t status = HWREG(i2c->hw->base + I2C_O_MCS); + + if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) + return false; + + if(status & I2C_MCS_ADRACK) + { + HWREG(i2c->hw->base + I2C_O_MCS) = mode_mask; + WAIT_BUSY(i2c->hw->base); + } + else + break; + + cpu_relax(); + } + return true; +} + +static void i2c_lm3s_putc(I2c *i2c, const uint8_t data) +{ + HWREG(i2c->hw->base + I2C_O_MDR) = data; + + if (i2c->hw->first_xtranf) + { + HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN | I2C_MCS_START; + while( HWREG(i2c->hw->base + I2C_O_MCS) & I2C_MCS_BUSY ); + + if (!wait_addrAck(i2c, I2C_MCS_RUN | I2C_MCS_START)) + { + LOG_ERR("Start timeout\n"); + i2c->errors |= I2C_START_TIMEOUT; + HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP; + WAIT_BUSY(i2c->hw->base); + return; + } + + i2c->hw->first_xtranf = false; + } + else + { + HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN; + WAIT_BUSY(i2c->hw->base); + } + + if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP)) + { + HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP; + WAIT_BUSY(i2c->hw->base); + } +} + +static uint8_t i2c_lm3s_getc(I2c *i2c) +{ + uint8_t data; + if (i2c->hw->first_xtranf) + { + uint32_t start_mode; + if (i2c->xfer_size == 1) + start_mode = I2C_MCS_RUN | I2C_MCS_START; + else + start_mode = I2C_MCS_ACK | I2C_MCS_RUN | I2C_MCS_START; + + HWREG(i2c->hw->base + I2C_O_MCS) = start_mode; + WAIT_BUSY(i2c->hw->base); + if (!wait_addrAck(i2c, start_mode)) + { + LOG_ERR("Start timeout\n"); + i2c->errors |= I2C_START_TIMEOUT; + HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP; + WAIT_BUSY(i2c->hw->base); + return 0xFF; + } + + data = HWREG(i2c->hw->base + I2C_O_MDR); + i2c->hw->first_xtranf = false; + } + else + { + if (i2c->xfer_size > 1) + HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_ACK | I2C_MCS_RUN; + else + HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_RUN; + + WAIT_BUSY(i2c->hw->base); + data = HWREG(i2c->hw->base + I2C_O_MDR); + } + + if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP)) + { + HWREG(i2c->hw->base + I2C_O_MCS) = I2C_MCS_STOP; + WAIT_BUSY(i2c->hw->base); + } + return data; +} + +static const I2cVT i2c_lm3s_vt = +{ + .start = i2c_lm3s_start, + .getc = i2c_lm3s_getc, + .putc = i2c_lm3s_putc, + .write = i2c_genericWrite, + .read = i2c_genericRead, +}; + +static struct I2cHardware i2c_lm3s_hw[] = +{ + { /* I2C0 */ + .base = I2C0_MASTER_BASE, + .sys_cntl = SYSCTL_RCGC1_I2C0, + .sys_gpio = SYSCTL_RCGC2_GPIOB, + .pin_mask = (GPIO_I2C0_SCL_PIN | GPIO_I2C0_SDA_PIN), + .gpio_base = GPIO_PORTB_BASE, + }, + { /* I2C1 */ + .base = I2C1_MASTER_BASE, + .sys_cntl = SYSCTL_RCGC1_I2C1, + .sys_gpio = SYSCTL_RCGC2_GPIOA, + .pin_mask = (GPIO_I2C1_SCL_PIN | GPIO_I2C1_SDA_PIN), + .gpio_base = GPIO_PORTA_BASE, + }, +}; + +/** + * Initialize I2C module. + */ +void i2c_hw_init(I2c *i2c, int dev, uint32_t clock) +{ + i2c->hw = &i2c_lm3s_hw[dev]; + i2c->vt = &i2c_lm3s_vt; + + /* Enable the peripheral clock */ + SYSCTL_RCGC1_R |= i2c->hw->sys_cntl; + SYSCTL_RCGC2_R |= i2c->hw->sys_gpio; + + /* Configure GPIO pins to work as I2C pins */ + lm3s_gpioPinConfig(i2c->hw->gpio_base, i2c->hw->pin_mask, + GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_OD_WPU); + /* + * Note: to set correctly the i2c speed we shold before enable the i2c + * device and then set in master time period the correct value + */ + + /* Enable i2c device */ + HWREG(i2c->hw->base + I2C_O_MCR) |= I2C_MCR_MFE; + + /* + * Compute the clock divider that achieves the fastest speed less than or + * equal to the desired speed. The numerator is biased to favor a larger + * clock divider so that the resulting clock is always less than or equal + * to the desired clock, never greater. + */ + HWREG(i2c->hw->base + I2C_O_MTPR) = ((CPU_FREQ + (2 * 10 * clock) - 1) / (2 * 10 * clock)) - 1; +} diff --git a/bertos/cpu/cortex-m3/drv/i2c_lm3s.h b/bertos/cpu/cortex-m3/drv/i2c_lm3s.h new file mode 100644 index 0000000..5a76f93 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/i2c_lm3s.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Driver for the LM3S I2C (interface) + * + * \author Daniele Basile + */ + +#ifndef I2C_LM3S_H +#define I2C_LM3S_H + +#include + +/** + * \name I2C devices enum + */ +enum +{ +#if CPU_CM3_LM3S1968 + I2C0, + I2C1, +#elif CPU_CM3_LM3S8962 + I2C0, +#enif + I2C_CNT /**< Number of serial ports */ +}; + +#endif /* I2C_LM3S_H */ diff --git a/bertos/cpu/cortex-m3/drv/i2c_sam3.c b/bertos/cpu/cortex-m3/drv/i2c_sam3.c new file mode 100644 index 0000000..8330a70 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/i2c_sam3.c @@ -0,0 +1,253 @@ +/** + * \file + * + * + * \brief TWI driver for SAM3 (implementation) + * + * Only master mode is supported. + * + * \author Stefano Fedrigo + */ + + +#include "cfg/cfg_i2c.h" + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT + +#include + +#include // CPU_FREQ +#include +#include // BV() +#include +#include +#include +#include +#include +#include +#include + + +struct I2cHardware +{ + uint32_t base; + bool first_xtranf; +}; + + +INLINE bool waitTxRdy(I2c *i2c, time_t ms_timeout) +{ + ticks_t start = timer_clock(); + + while (!(HWREG(i2c->hw->base + TWI_SR_OFF) & TWI_SR_TXRDY)) + { + if (timer_clock() - start > ms_to_ticks(ms_timeout)) + return false; + cpu_relax(); + } + + return true; +} + +INLINE bool waitRxRdy(I2c *i2c, time_t ms_timeout) +{ + ticks_t start = timer_clock(); + + while (!(HWREG(i2c->hw->base + TWI_SR_OFF) & TWI_SR_RXRDY)) + { + if (timer_clock() - start > ms_to_ticks(ms_timeout)) + return false; + cpu_relax(); + } + + return true; +} + +INLINE void waitXferComplete(I2c *i2c) +{ + while (!(HWREG(i2c->hw->base + TWI_SR_OFF) & TWI_SR_TXCOMP)) + cpu_relax(); +} + + +/* + * The start is not performed when we call the start function + * because the hardware should know the first data byte to send. + * Generally to perform a byte send we should write the slave address + * in slave address register and the first byte to send in data registry. + * After then we can perform the start write procedure, and send really + * the our data. To use common bertos i2c api the really start will be + * performed when the user "put" or "send" its data. These tricks are hide + * from the driver implementation. + */ +static void i2c_sam3_start(struct I2c *i2c, uint16_t slave_addr) +{ + i2c->hw->first_xtranf = true; + + if (I2C_TEST_START(i2c->flags) == I2C_START_R) + HWREG(i2c->hw->base + TWI_MMR_OFF) = TWI_MMR_DADR(slave_addr >> 1) | TWI_MMR_MREAD; + else + HWREG(i2c->hw->base + TWI_MMR_OFF) = TWI_MMR_DADR(slave_addr >> 1); +} + +static void i2c_sam3_putc(I2c *i2c, const uint8_t data) +{ + if (!waitTxRdy(i2c, CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("i2c: txready timeout\n"); + i2c->errors |= I2C_START_TIMEOUT; + return; + } + + HWREG(i2c->hw->base + TWI_THR_OFF) = data; + + if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP)) + HWREG(i2c->hw->base + TWI_CR_OFF) = TWI_CR_STOP; + + // On first byte sent wait for start timeout + if (i2c->hw->first_xtranf && !waitTxRdy(i2c, CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("i2c: write start timeout\n"); + i2c->errors |= I2C_START_TIMEOUT; + HWREG(i2c->hw->base + TWI_CR_OFF) = TWI_CR_STOP; + waitXferComplete(i2c); + return; + } + i2c->hw->first_xtranf = false; + + if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP)) + waitXferComplete(i2c); +} + +static uint8_t i2c_sam3_getc(I2c *i2c) +{ + uint8_t data; + uint32_t cr = 0; + + if (i2c->hw->first_xtranf) + { + cr |= TWI_CR_START; + i2c->hw->first_xtranf = false; + } + if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP)) + cr |= TWI_CR_STOP; + + HWREG(i2c->hw->base + TWI_CR_OFF) = cr; + + if (!waitRxRdy(i2c, CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("i2c: read start timeout\n"); + i2c->errors |= I2C_START_TIMEOUT; + return 0xFF; + } + + data = HWREG(i2c->hw->base + TWI_RHR_OFF); + + if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP)) + waitXferComplete(i2c); + + return data; +} + +static void i2c_setClock(I2c *i2c, int clock) +{ + uint32_t ck_div = 0; + uint32_t cl_div; + + for (;;) + { + cl_div = ((CPU_FREQ / (2 * clock)) - 4) / (1 << ck_div); + + if (cl_div <= 255) + break; + + ck_div++; + } + + ASSERT(ck_div < 8); + LOG_INFO("i2c: using CKDIV = %lu and CLDIV/CHDIV = %lu\n\n", ck_div, cl_div); + + HWREG(i2c->hw->base + TWI_CWGR_OFF) = 0; + HWREG(i2c->hw->base + TWI_CWGR_OFF) = (ck_div << 16) | (cl_div << 8) | cl_div; +} + + +static const I2cVT i2c_sam3_vt = +{ + .start = i2c_sam3_start, + .getc = i2c_sam3_getc, + .putc = i2c_sam3_putc, + .write = i2c_genericWrite, + .read = i2c_genericRead, +}; + +struct I2cHardware i2c_sam3_hw[I2C_CNT]; + + +/** + * Initialize I2C module. + */ +void i2c_hw_init(I2c *i2c, int dev, uint32_t clock) +{ + ASSERT(dev < I2C_CNT); + + i2c->hw = &i2c_sam3_hw[dev]; + i2c->vt = &i2c_sam3_vt; + + pmc_periphEnable(PIOA_ID); + + switch (dev) + { + case I2C0: + i2c->hw->base = TWI0_BASE; + PIO_PERIPH_SEL(TWI0_PORT, BV(TWI0_TWD) | BV(TWI0_TWCK), TWI0_PERIPH); + HWREG(TWI0_PORT + PIO_PDR_OFF) = BV(TWI0_TWD) | BV(TWI0_TWCK); + pmc_periphEnable(TWI0_ID); + break; + case I2C1: + i2c->hw->base = TWI1_BASE; + PIO_PERIPH_SEL(TWI1_PORT, BV(TWI1_TWD) | BV(TWI1_TWCK), TWI1_PERIPH); + HWREG(TWI1_PORT + PIO_PDR_OFF) = BV(TWI1_TWD) | BV(TWI1_TWCK); + pmc_periphEnable(TWI1_ID); + break; + default: + ASSERT(!"i2c: invalid dev number"); + return; + } + + + // Reset and set master mode + HWREG(i2c->hw->base + TWI_CR_OFF) = TWI_CR_SWRST; + HWREG(i2c->hw->base + TWI_CR_OFF) = TWI_CR_MSEN | TWI_CR_SVDIS; + + i2c_setClock(i2c, clock); +} diff --git a/bertos/cpu/cortex-m3/drv/i2c_sam3.h b/bertos/cpu/cortex-m3/drv/i2c_sam3.h new file mode 100644 index 0000000..5ecbc25 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/i2c_sam3.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief TWI driver for SAM3 (interface) + * + * \author Stefano Fedrigo + */ + +#ifndef DRV_I2C_SAM3_H +#define DRV_I2C_SAM3_H + +/** + * \name I2C devices enum + */ +enum +{ + I2C0, + I2C1, + + I2C_CNT /**< Number of ports */ +}; + +#endif /* DRV_I2C_SAM3_H */ + diff --git a/bertos/cpu/cortex-m3/drv/i2c_stm32.c b/bertos/cpu/cortex-m3/drv/i2c_stm32.c new file mode 100644 index 0000000..9fd53f0 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/i2c_stm32.c @@ -0,0 +1,353 @@ +/** + * \file + * + * + * \brief STM32F103xx I2C driver. + * + * \author Daniele Basile + */ + +#include "cfg/cfg_i2c.h" + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT +#include + +#include +#include // BV() +#include + +#include +#include +#include +#include +#include +#include + +#include + + +struct I2cHardware +{ + struct stm32_i2c *base; + uint32_t clk_i2c_en; + uint32_t pin_mask; + uint8_t cache[2]; + bool cached; +}; + +#define WAIT_BTF(base) \ + do { \ + while (!(base->SR1 & BV(SR1_BTF))) \ + cpu_relax(); \ + } while (0) + +#define WAIT_RXNE(base) \ + do { \ + while (!(base->SR1 & BV(SR1_RXNE))) \ + cpu_relax(); \ + } while (0) + +INLINE uint32_t get_status(struct stm32_i2c *base) +{ + return ((base->SR1 | (base->SR2 << 16)) & 0x00FFFFFF); +} + +/* + * This fuction read the status registers of the i2c device + * and waint until the selec event happen. If occur one error + * the funtions return false. + */ +INLINE bool wait_event(I2c *i2c, uint32_t event) +{ + while (true) + { + uint32_t stat = get_status(i2c->hw->base); + + if (stat == event) + break; + + if (stat & SR1_ERR_MASK) + { + i2c->hw->base->SR1 &= ~SR1_ERR_MASK; + return false; + } + cpu_relax(); + } + return true; +} + + +INLINE void start_w(struct I2c *i2c, uint16_t slave_addr) +{ + /* + * Loop on the select write sequence: when the eeprom is busy + * writing previously sent data it will reply to the SLA_W + * control byte with a NACK. In this case, we must + * keep trying until the eeprom responds with an ACK. + */ + ticks_t start = timer_clock(); + while (true) + { + i2c->hw->base->CR1 |= CR1_ACK_SET | CR1_START_SET; + + if(!wait_event(i2c, I2C_EVENT_MASTER_MODE_SELECT)) + { + LOG_ERR("ARBIT lost\n"); + i2c->errors |= I2C_ARB_LOST; + break; + } + + i2c->hw->base->DR = slave_addr & OAR1_ADD0_RESET; + + if(wait_event(i2c, I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED)) + break; + + if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("Timeout on I2C START\n"); + i2c->errors |= I2C_START_TIMEOUT; + i2c->hw->base->CR1 |= CR1_STOP_SET; + break; + } + } +} + +INLINE bool start_and_addr(struct I2c *i2c, uint16_t slave_addr) +{ + i2c->hw->base->CR1 |= CR1_START_SET; + if(!wait_event(i2c, I2C_EVENT_MASTER_MODE_SELECT)) + { + LOG_ERR("ARBIT lost\n"); + i2c->errors |= I2C_ARB_LOST; + i2c->hw->base->CR1 |= CR1_STOP_SET; + return false; + } + + i2c->hw->base->DR = (slave_addr | OAR1_ADD0_SET); + + if (i2c->xfer_size == 2) + i2c->hw->base->CR1 |= CR1_ACK_SET | CR1_POS_SET; + + if(!wait_event(i2c, I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED)) + { + LOG_ERR("SLAR NACK:%08lx\n", get_status(i2c->hw->base)); + i2c->errors |= I2C_NO_ACK; + i2c->hw->base->CR1 |= CR1_STOP_SET; + return false; + } + + return true; +} + +INLINE void start_r(struct I2c *i2c, uint16_t slave_addr) +{ + if (!start_and_addr(i2c, slave_addr)) + return; + /* + * Due to the hardware receive bytes from slave in automatically mode + * we should manage contextually all cases that we want to read one, two or more + * than two bytes. To comply this behaviour to our api we shoul bufferd some byte + * to hide all special case that needs to use this device. + */ + if (i2c->xfer_size == 1) + { + i2c->hw->base->CR1 &= CR1_ACK_RESET; + + cpu_flags_t irq; + + IRQ_SAVE_DISABLE(irq); + (void)i2c->hw->base->SR2; + if (I2C_TEST_STOP(i2c->flags) == I2C_STOP) + i2c->hw->base->CR1 |= CR1_STOP_SET; + IRQ_RESTORE(irq); + + WAIT_RXNE(i2c->hw->base); + + i2c->hw->cache[0] = i2c->hw->base->DR; + i2c->hw->cached = true; + + if (I2C_TEST_STOP(i2c->flags) == I2C_STOP) + while (i2c->hw->base->CR1 & CR1_STOP_SET); + + i2c->hw->base->CR1 |= CR1_ACK_SET; + } + else if (i2c->xfer_size == 2) + { + cpu_flags_t irq; + + IRQ_SAVE_DISABLE(irq); + (void)i2c->hw->base->SR2; + i2c->hw->base->CR1 &= CR1_ACK_RESET; + IRQ_RESTORE(irq); + + WAIT_BTF(i2c->hw->base); + + IRQ_SAVE_DISABLE(irq); + if (I2C_TEST_STOP(i2c->flags) == I2C_STOP) + i2c->hw->base->CR1 |= CR1_STOP_SET; + /* + * We store read bytes like a fifo.. + */ + i2c->hw->cache[1] = i2c->hw->base->DR; + i2c->hw->cache[0] = i2c->hw->base->DR; + i2c->hw->cached = true; + IRQ_RESTORE(irq); + + i2c->hw->base->CR1 &= CR1_POS_RESET; + i2c->hw->base->CR1 |= CR1_ACK_SET; + } +} + +static void i2c_stm32_start(struct I2c *i2c, uint16_t slave_addr) +{ + i2c->hw->cached = false; + + if (I2C_TEST_START(i2c->flags) == I2C_START_W) + start_w(i2c, slave_addr); + else /* (I2C_TEST_START(i2c->flags) == I2C_START_R) */ + start_r(i2c, slave_addr); +} + +static void i2c_stm32_putc(I2c *i2c, const uint8_t data) +{ + i2c->hw->base->DR = data; + + WAIT_BTF(i2c->hw->base); + + /* Generate the stop if we finish to send all programmed bytes */ + if ((i2c->xfer_size == 1) && (I2C_TEST_STOP(i2c->flags) == I2C_STOP)) + { + wait_event(i2c, I2C_EVENT_MASTER_BYTE_TRANSMITTED); + i2c->hw->base->CR1 |= CR1_STOP_SET; + } +} + +static uint8_t i2c_stm32_getc(I2c *i2c) +{ + if (i2c->hw->cached) + { + ASSERT(i2c->xfer_size <= 2); + return i2c->hw->cache[i2c->xfer_size - 1]; + } + else + { + WAIT_BTF(i2c->hw->base); + + if (i2c->xfer_size == 3) + { + i2c->hw->base->CR1 &= CR1_ACK_RESET; + + cpu_flags_t irq; + IRQ_SAVE_DISABLE(irq); + + uint8_t data = i2c->hw->base->DR; + + if (I2C_TEST_STOP(i2c->flags) == I2C_STOP) + i2c->hw->base->CR1 |= CR1_STOP_SET; + + i2c->hw->cache[1] = i2c->hw->base->DR; + + IRQ_RESTORE(irq); + + WAIT_RXNE(i2c->hw->base); + + i2c->hw->cache[0] = i2c->hw->base->DR; + i2c->hw->cached = true; + + if (I2C_TEST_STOP(i2c->flags) == I2C_STOP) + while (i2c->hw->base->CR1 & CR1_STOP_SET); + + return data; + } + else + return i2c->hw->base->DR; + } +} + + +static const I2cVT i2c_stm32_vt = +{ + .start = i2c_stm32_start, + .getc = i2c_stm32_getc, + .putc = i2c_stm32_putc, + .write = i2c_genericWrite, + .read = i2c_genericRead, +}; + +static struct I2cHardware i2c_stm32_hw[] = +{ + { /* I2C1 */ + .base = (struct stm32_i2c *)I2C1_BASE, + .clk_i2c_en = RCC_APB1_I2C1, + .pin_mask = (GPIO_I2C1_SCL_PIN | GPIO_I2C1_SDA_PIN), + }, + { /* I2C2 */ + .base = (struct stm32_i2c *)I2C2_BASE, + .clk_i2c_en = RCC_APB1_I2C2, + .pin_mask = (GPIO_I2C2_SCL_PIN | GPIO_I2C2_SDA_PIN), + }, +}; + +/** + * Initialize I2C module. + */ +void i2c_hw_init(I2c *i2c, int dev, uint32_t clock) +{ + + i2c->hw = &i2c_stm32_hw[dev]; + i2c->vt = &i2c_stm32_vt; + + RCC->APB2ENR |= RCC_APB2_GPIOB; + RCC->APB1ENR |= i2c->hw->clk_i2c_en; + + /* Set gpio to use I2C driver */ + stm32_gpioPinConfig((struct stm32_gpio *)GPIOB_BASE, i2c->hw->pin_mask, + GPIO_MODE_AF_OD, GPIO_SPEED_50MHZ); + + /* Clear all needed registers */ + i2c->hw->base->CR1 = 0; + i2c->hw->base->CR2 = 0; + i2c->hw->base->CCR = 0; + i2c->hw->base->TRISE = 0; + i2c->hw->base->OAR1 = 0; + + /* Set PCLK1 frequency accornding to the master clock settings. See stm32_clock.c */ + i2c->hw->base->CR2 |= CR2_FREQ_36MHZ; + + /* Configure spi in standard mode */ + ASSERT2(clock >= 100000, "fast mode not supported"); + + i2c->hw->base->CCR |= (uint16_t)((CR2_FREQ_36MHZ * 1000000) / (clock << 1)); + i2c->hw->base->TRISE |= (CR2_FREQ_36MHZ + 1); + + i2c->hw->base->CR1 |= CR1_PE_SET; +} diff --git a/bertos/cpu/cortex-m3/drv/i2c_stm32.h b/bertos/cpu/cortex-m3/drv/i2c_stm32.h new file mode 100644 index 0000000..152ab6e --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/i2c_stm32.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Driver for the STM32F103xx I2C (interface) + * + */ + +#ifndef I2C_STM32_H +#define I2C_STM32_H + +#include + +/** + * \name I2C devices enum + */ +enum +{ + I2C1, + I2C2, + + I2C_CNT /**< Number of serial ports */ +}; + +#endif /* I2C_STM32_H */ diff --git a/bertos/cpu/cortex-m3/drv/irq_cm3.c b/bertos/cpu/cortex-m3/drv/irq_cm3.c new file mode 100644 index 0000000..14311d9 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/irq_cm3.c @@ -0,0 +1,138 @@ +/** + * \file + * + * + * \brief Cortex-M3 IRQ management. + * + * \author Andrea Righi + */ + +#include "irq_cm3.h" + +#include /* ASSERT() */ +#include /* LOG_ERR() */ +#include + + +#ifdef __IAR_SYSTEMS_ICC__ +#pragma data_alignment=0x400 +static void (*irq_table[NUM_INTERRUPTS])(void); +#else +static void (*irq_table[NUM_INTERRUPTS])(void) + __attribute__((section("vtable"))); +#endif + +/* Priority register / IRQ number table */ +static const uint32_t nvic_prio_reg[] = +{ + /* System exception registers */ + 0, NVIC_SYS_PRI1, NVIC_SYS_PRI2, NVIC_SYS_PRI3, + + /* External interrupts registers */ + NVIC_PRI0, NVIC_PRI1, NVIC_PRI2, NVIC_PRI3, + NVIC_PRI4, NVIC_PRI5, NVIC_PRI6, NVIC_PRI7, + NVIC_PRI8, NVIC_PRI9, NVIC_PRI10, NVIC_PRI11, + NVIC_PRI12, NVIC_PRI13 +}; + +/* Unhandled IRQ */ +static NAKED NORETURN void unhandled_isr(void) +{ + register uint32_t reg; + +#ifdef __IAR_SYSTEMS_ICC__ + reg = CPU_READ_IPSR(); +#else + asm volatile ("mrs %0, ipsr" : "=r"(reg)); +#endif + LOG_ERR("unhandled IRQ %lu\n", reg); + while (1) + PAUSE; +} + +void sysirq_setPriority(sysirq_t irq, int prio) +{ + uint32_t pos = (irq & 3) * 8; + reg32_t reg = nvic_prio_reg[irq >> 2]; + uint32_t val; + + val = HWREG(reg); + val &= ~(0xff << pos); + val |= prio << pos; + HWREG(reg) = val; +} + +static void sysirq_enable(sysirq_t irq) +{ + /* Enable the IRQ line (only for generic IRQs) */ + if (irq >= 16 && irq < 48) + NVIC_EN0_R = 1 << (irq - 16); + else if (irq >= 48) + NVIC_EN1_R = 1 << (irq - 48); +} + +void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler) +{ + cpu_flags_t flags; + + ASSERT(irq < NUM_INTERRUPTS); + + IRQ_SAVE_DISABLE(flags); + irq_table[irq] = handler; + sysirq_setPriority(irq, IRQ_PRIO); + sysirq_enable(irq); + IRQ_RESTORE(flags); +} + +void sysirq_freeHandler(sysirq_t irq) +{ + cpu_flags_t flags; + + ASSERT(irq < NUM_INTERRUPTS); + + IRQ_SAVE_DISABLE(flags); + irq_table[irq] = unhandled_isr; + IRQ_RESTORE(flags); +} + +void sysirq_init(void) +{ + cpu_flags_t flags; + int i; + + IRQ_SAVE_DISABLE(flags); + for (i = 0; i < NUM_INTERRUPTS; i++) + irq_table[i] = unhandled_isr; + + /* Update NVIC to point to the new vector table */ + NVIC_VTABLE_R = (size_t)irq_table; + IRQ_RESTORE(flags); +} diff --git a/bertos/cpu/cortex-m3/drv/irq_cm3.h b/bertos/cpu/cortex-m3/drv/irq_cm3.h new file mode 100644 index 0000000..8498183 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/irq_cm3.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief IRQ management for the Cortex-M3 processor. + * + * \author Andrea Righi + */ + +#ifndef DRV_CORTEX_M3_SYSIRQ_H +#define DRV_CORTEX_M3_SYSIRQ_H + +#include + +#if CPU_CM3_LM3S + #include +#elif CPU_CM3_STM32 + #include +#elif CPU_CM3_SAM3 + #include +/*#elif Add other families here */ +#else + #error Unknown CPU +#endif + +typedef void (*sysirq_handler_t)(void); +typedef unsigned int sysirq_t; + +void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler); +void sysirq_setPriority(sysirq_t irq, int prio); +void sysirq_freeHandler(sysirq_t irq); + +void sysirq_init(void); + +#endif /* DRV_CORTEX_M3_SYSIRQ_H */ diff --git a/bertos/cpu/cortex-m3/drv/kdebug_cm3.c b/bertos/cpu/cortex-m3/drv/kdebug_cm3.c new file mode 100644 index 0000000..ea59237 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/kdebug_cm3.c @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Low-level kdebug module for Cortex-M3 (inplementation). + */ + +#include + +#if CPU_CM3_LM3S + #include "kdebug_lm3s.c" +#elif CPU_CM3_STM32 + #include "kdebug_stm32.c" +#elif CPU_CM3_SAM3 + #include "kdebug_sam3.c" +/*#elif Add other families here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/cortex-m3/drv/kdebug_lm3s.c b/bertos/cpu/cortex-m3/drv/kdebug_lm3s.c new file mode 100644 index 0000000..3025884 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/kdebug_lm3s.c @@ -0,0 +1,118 @@ +/** + * \file + * + * + * \brief LM3S debug support (implementation). + * + * \author Andrea Righi + */ + +#include +#include /* for BV() */ +#include /* lm3s_busyWait() */ +#include +#include +#include "kdebug_lm3s.h" + +#if CONFIG_KDEBUG_PORT == 0 + #define UART_BASE UART0_BASE + #define UART_GPIO_BASE GPIO_PORTA_BASE + #define UART_PINS (BV(1) | BV(0)) + #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOA +#elif CONFIG_KDEBUG_PORT == 1 + #define UART_BASE UART1_BASE + #define UART_GPIO_BASE GPIO_PORTD_BASE + #define UART_PINS (BV(3) | BV(2)) + #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOD +#elif CONFIG_KDEBUG_PORT == 2 + #define UART_BASE UART2_BASE + #define UART_GPIO_BASE GPIO_PORTG_BASE + #define UART_PINS (BV(1) | BV(0)) + #define UART_REG_SYSCTL SYSCTL_RCGC2_GPIOG +#else + #error "UART port not supported in this board" +#endif + +#define KDBG_WAIT_READY() while (!lm3s_uartReady(UART_BASE)) {} +#define KDBG_WAIT_TXDONE() while (!lm3s_uartTxDone(UART_BASE)) {} + +#define KDBG_WRITE_CHAR(c) do { lm3s_uartPutCharNonBlocking(UART_BASE, c); } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_MASK_IRQ(old) do { (void)old; } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0) + +typedef uint32_t kdbg_irqsave_t; + +INLINE void uart_hw_config(void) +{ + unsigned long div, baud = CONFIG_KDEBUG_BAUDRATE; + bool hi_speed = false; + + if (baud * 16 > CPU_FREQ) + { + hi_speed = true; + baud /= 2; + } + div = (CPU_FREQ * 8 / baud + 1) / 2; + + lm3s_uartDisable(UART_BASE); + if (hi_speed) + HWREG(UART_BASE + UART_O_CTL) |= UART_CTL_HSE; + else + HWREG(UART_BASE + UART_O_CTL) &= ~UART_CTL_HSE; + /* Set the baud rate */ + HWREG(UART_BASE + UART_O_IBRD) = div / 64; + HWREG(UART_BASE + UART_O_FBRD) = div % 64; + /* Set word lenght and parity */ + HWREG(UART_BASE + UART_O_LCRH) = UART_LCRH_WLEN_8; + lm3s_uartClear(UART_BASE); + lm3s_uartEnable(UART_BASE); +} + +INLINE void kdbg_hw_init(void) +{ + uint32_t reg_clock = 1 << CONFIG_KDEBUG_PORT; + + /* Enable the peripheral clock */ + SYSCTL_RCGC1_R |= reg_clock; + SYSCTL_RCGC2_R |= UART_REG_SYSCTL; + lm3s_busyWait(512); + + /* Configure GPIO pins to work as UART pins */ + lm3s_gpioPinConfig(UART_GPIO_BASE, UART_PINS, + GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD); + + /* Low-level UART configuration */ + uart_hw_config(); +} diff --git a/bertos/cpu/cortex-m3/drv/kdebug_lm3s.h b/bertos/cpu/cortex-m3/drv/kdebug_lm3s.h new file mode 100644 index 0000000..faabef4 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/kdebug_lm3s.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \brief LM3S debug support (interface). + * + * \author Andrea Righi + */ + +#ifndef DRV_KDEBUG_LM3S_H +#define DRV_KDEBUG_LM3S_H + +#define KDEBUG_PORT_DEFAULT 0 ///< Default debug port. +/* \} */ + +#endif /* DRV_KDEBUG_LM3S_H */ diff --git a/bertos/cpu/cortex-m3/drv/kdebug_sam3.c b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c new file mode 100644 index 0000000..45b2cf5 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/kdebug_sam3.c @@ -0,0 +1,100 @@ +/** + * \file + * + * + * \brief SAM3 debug support (implementation). + * + * \author Stefano Fedrigo + */ + +#include +#include /* for BV() */ + +#include + +#include + + +#if (CONFIG_KDEBUG_PORT == 0) + #define UART_BASE UART0_BASE + #define UART_ID UART0_ID + #define UART_PIO_BASE UART0_PORT + #define UART_PERIPH UART0_PERIPH + #define UART_PINS (BV(URXD0) | BV(UTXD0)) +#elif (CONFIG_KDEBUG_PORT == 1) && UART_PORTS > 1 + #define UART_BASE UART1_BASE + #define UART_ID UART1_ID + #define UART_PIO_BASE UART1_PORT + #define UART_PERIPH UART1_PERIPH + #define UART_PINS (BV(URXD1) | BV(UTXD1)) +#else + #error "UART port not supported in this board" +#endif + +// TODO: refactor serial simple functions and use them, see lm3s kdebug +#define KDBG_WAIT_READY() while (!(HWREG(UART_BASE + UART_SR_OFF) & BV(UART_SR_TXRDY))) {} +#define KDBG_WAIT_TXDONE() while (!(HWREG(UART_BASE + UART_SR_OFF) & BV(UART_SR_TXEMPTY))) {} + +#define KDBG_WRITE_CHAR(c) do { HWREG(UART_BASE + UART_THR_OFF) = (c); } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_MASK_IRQ(old) do { (void)old; } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0) + +typedef uint32_t kdbg_irqsave_t; + + +INLINE void kdbg_hw_init(void) +{ + /* + * Disable PIO mode and set appropriate UART pins peripheral mode. + * SAM3X,A,N,S,U: all of them has all UARTs on peripheral A. + */ + HWREG(UART_PIO_BASE + PIO_PDR_OFF) = UART_PINS; + PIO_PERIPH_SEL(UART_PIO_BASE, UART_PINS, UART_PERIPH); + + /* Enable the peripheral clock */ + pmc_periphEnable(UART_ID); + + /* Reset and disable receiver & transmitter */ + HWREG(UART_BASE + UART_CR_OFF) = BV(UART_CR_RSTRX) | BV(UART_CR_RSTTX) | BV(UART_CR_RXDIS) | BV(UART_CR_TXDIS); + + /* Set mode: normal, no parity */ + HWREG(UART_BASE + UART_MR_OFF) = UART_MR_PAR_NO; + + /* Set baud rate */ + HWREG(UART_BASE + UART_BRGR_OFF) = CPU_FREQ / CONFIG_KDEBUG_BAUDRATE / 16; + + /* Enable receiver & transmitter */ + HWREG(UART_BASE + UART_CR_OFF) = BV(UART_CR_RXEN) | BV(UART_CR_TXEN); +} diff --git a/bertos/cpu/cortex-m3/drv/kdebug_stm32.c b/bertos/cpu/cortex-m3/drv/kdebug_stm32.c new file mode 100644 index 0000000..a60d19e --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/kdebug_stm32.c @@ -0,0 +1,103 @@ +/** + * \file + * + * + * \brief STM32 debug support (implementation). + * + * \author Andrea Righi + */ + +#include "kdebug_stm32.h" + +#include + +#include +#include /* RCC */ + +#include + + + +#if CONFIG_KDEBUG_PORT == 0 + #define UART_BASE ((struct stm32_usart *)USART1_BASE) +#elif CONFIG_KDEBUG_PORT == 1 + #define UART_BASE ((struct stm32_usart *)USART2_BASE) +#elif CONFIG_KDEBUG_PORT == 2 + #define UART_BASE ((struct stm32_usart *)USART3_BASE) +#else + #error "UART port not supported in this board" +#endif + +#define KDBG_WAIT_READY() while (!(UART_BASE->SR & USART_FLAG_TXE)) +#define KDBG_WAIT_TXDONE() while (!(UART_BASE->SR & USART_FLAG_TC)) + +#define KDBG_WRITE_CHAR(c) do { UART_BASE->DR = (c) & 0x1ff; } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_MASK_IRQ(old) do { (void)old; } while(0) + +/* Debug unit is used only for debug purposes so does not generate interrupts. */ +#define KDBG_RESTORE_IRQ(old) do { (void)old; } while(0) + +typedef uint32_t kdbg_irqsave_t; + + +/* Initialize UART debug port */ +INLINE void kdbg_hw_init(void) +{ + /* Enable clocking on AFIO */ + RCC->APB2ENR |= RCC_APB2_AFIO; + /* Configure USART pins */ +#if CONFIG_KDEBUG_PORT == 0 + RCC->APB2ENR |= RCC_APB2_GPIOA; + RCC->APB2ENR |= RCC_APB2_USART1; + stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE, GPIO_USART1_TX_PIN, + GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ); +#elif CONFIG_KDEBUG_PORT == 1 + RCC->APB2ENR |= RCC_APB2_GPIOA; + RCC->APB1ENR |= RCC_APB1_USART2; + stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE, GPIO_USART2_TX_PIN, + GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ); +#elif CONFIG_KDEBUG_PORT == 2 + RCC->APB2ENR |= RCC_APB2_GPIOB; + RCC->APB1ENR |= RCC_APB1_USART3; + stm32_gpioPinConfig((struct stm32_gpio *)GPIOB_BASE, GPIO_USART3_TX_PIN, + GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ); +#else + #error "UART port not supported in this board" +#endif + /* Enable the USART by writing the UE bit */ + UART_BASE->CR1 |= CR1_RUN_SET; + /* Configure the desired baud rate */ + UART_BASE->BRR = (uint16_t)evaluate_brr(UART_BASE, CPU_FREQ, CONFIG_KDEBUG_BAUDRATE); + /* Set the Transmitter Enable bit in CR1 */ + UART_BASE->CR1 |= USART_MODE_TX; +} diff --git a/bertos/cpu/cortex-m3/drv/kdebug_stm32.h b/bertos/cpu/cortex-m3/drv/kdebug_stm32.h new file mode 100644 index 0000000..acb71a5 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/kdebug_stm32.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \brief STM32 debug support (interface). + * + * \author Andrea Righi + */ + +#ifndef DRV_KDEBUG_STM32_H +#define DRV_KDEBUG_STM32_H + +#define KDEBUG_PORT_DEFAULT 1 ///< Default debug port. +/* \} */ + +#endif /* DRV_KDEBUG_STM32_H */ diff --git a/bertos/cpu/cortex-m3/drv/nand_sam3.c b/bertos/cpu/cortex-m3/drv/nand_sam3.c new file mode 100644 index 0000000..85350cb --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/nand_sam3.c @@ -0,0 +1,272 @@ +/** + * \file + * + * + * \brief NAND driver hardware implementation for SAM3's static memory controller. + * + * \author Stefano Fedrigo + */ + +#include +#include +#include +#include +#include // cpu_relax() + + +/* + * PIO definitions. + */ +#define NAND_PIN_CE BV(6) +#define NAND_PIN_RB BV(2) +#define NAND_PINS_PORTA (NAND_PIN_CE | NAND_PIN_RB) +#define NAND_PERIPH_PORTA PIO_PERIPH_B + +#define NAND_PIN_OE BV(19) +#define NAND_PIN_WE BV(20) +#define NAND_PIN_IO 0x0000FFFF +#define NAND_PINS_PORTC (NAND_PIN_OE | NAND_PIN_WE | NAND_PIN_IO) +#define NAND_PERIPH_PORTC PIO_PERIPH_A + +#define NAND_PIN_CLE BV(9) +#define NAND_PIN_ALE BV(8) +#define NAND_PINS_PORTD (NAND_PIN_CLE | NAND_PIN_ALE) +#define NAND_PERIPH_PORTD PIO_PERIPH_A + + +/* + * Wait for edge transition of READY/BUSY NAND + * signal. + * Return true for edge detection, false in case of timeout. + */ +bool nand_waitReadyBusy(UNUSED_ARG(Nand *, chip), time_t timeout) +{ + time_t start = timer_clock(); + + while (!(SMC_SR & SMC_SR_RB_EDGE0)) + { + cpu_relax(); + if (timer_clock() - start > timeout) + { + LOG_INFO("nand: R/B timeout\n"); + return false; + } + } + + return true; +} + + +/* + * Wait for transfer to complete until timeout. + * If transfer completes return true, false in case of timeout. + */ +bool nand_waitTransferComplete(UNUSED_ARG(Nand *, chip), time_t timeout) +{ + time_t start = timer_clock(); + + while (!(SMC_SR & SMC_SR_XFRDONE)) + { + cpu_relax(); + if (timer_clock() - start > timeout) + { + LOG_INFO("nand: xfer complete timeout\n"); + return false; + } + } + + return true; +} + + +/* + * Send command to NAND and wait for completion. + */ +void nand_sendCommand(Nand *chip, + uint32_t cmd1, uint32_t cmd2, + int num_cycles, uint32_t cycle0, uint32_t cycle1234) +{ + reg32_t *cmd_addr; + uint32_t cmd_val; + + while (HWREG(NFC_CMD_BASE_ADDR + NFC_CMD_NFCCMD) & 0x8000000); + + if (num_cycles == 5) + SMC_ADDR = cycle0; + + cmd_val = NFC_CMD_NFCCMD + | ((chip->chip_select << NFC_CMD_CSID_SHIFT) & NFC_CMD_CSID_MASK) + | ((num_cycles << NFC_CMD_ACYCLE_SHIFT) & NFC_CMD_ACYCLE_MASK) + | cmd1 << 2 + | cmd2 << 10; + + // Check for commands transferring data + if (cmd1 == NAND_CMD_WRITE_1 || cmd1 == NAND_CMD_READ_1 || cmd1 == NAND_CMD_READID) + cmd_val |= NFC_CMD_NFCEN; + + // Check for commands writing data + if (cmd1 == NAND_CMD_WRITE_1) + cmd_val |= NFC_CMD_NFCWR; + + // Check for two command cycles + if (cmd2) + cmd_val |= NFC_CMD_VCMD2; + + cmd_addr = (reg32_t *)(NFC_CMD_BASE_ADDR + cmd_val); + *cmd_addr = cycle1234; + + while (!(SMC_SR & SMC_SR_CMDDONE)); +} + + +/* + * Get NAND chip status register. + * + * NOTE: this is global between different chip selects, so returns + * the status register of the last used NAND chip. + */ +uint8_t nand_getChipStatus(UNUSED_ARG(Nand *, chip)) +{ + return (uint8_t)HWREG(NFC_CMD_BASE_ADDR); +} + + +/* + * Return pointer to buffer where data are read to or written from + * by nand_sendCommand(). + */ +void *nand_dataBuffer(UNUSED_ARG(Nand *, chip)) +{ + return (void *)NFC_SRAM_BASE_ADDR; +} + + +/* + * Extract ECC data from ECC_PRx registers. + */ +bool nand_checkEcc(UNUSED_ARG(Nand *, chip)) +{ + uint32_t sr1 = SMC_ECC_SR1; + if (sr1) + { + LOG_INFO("ECC error, ECC_SR1=0x%lx\n", sr1); + return false; + } + else + return true; +} + + +/* + * Compute ECC on data in a buffer. + * + * \param chip nand context + * \param buf buffer containing data + * \param size size of data buffer + * \param ecc pointer to buffer where computed ECC is stored + * \param ecc_size max size for ecc buffer + */ +void nand_computeEcc(UNUSED_ARG(Nand *, chip), + UNUSED_ARG(const void *, buf), UNUSED_ARG(size_t, size), uint32_t *ecc, size_t ecc_size) +{ + size_t i; + for (i = 0; i < ecc_size; i++) + ecc[i] = *((reg32_t *)(SMC_BASE + SMC_ECC_PR0_OFF) + i); +} + + +/* + * Low-level hardware driver initialization. + */ +void nand_hwInit(UNUSED_ARG(Nand *, chip)) +{ + // FIXME: Parameters specific for MT29F8G08AAD + + // PIO init + pmc_periphEnable(PIOA_ID); + pmc_periphEnable(PIOC_ID); + pmc_periphEnable(PIOD_ID); + + PIO_PERIPH_SEL(PIOA_BASE, NAND_PINS_PORTA, NAND_PERIPH_PORTA); + PIOA_PDR = NAND_PINS_PORTA; + PIOA_PUER = NAND_PINS_PORTA; + + PIO_PERIPH_SEL(PIOC_BASE, NAND_PINS_PORTC, NAND_PERIPH_PORTC); + PIOC_PDR = NAND_PINS_PORTC; + PIOC_PUER = NAND_PINS_PORTC; + + PIO_PERIPH_SEL(PIOD_BASE, NAND_PINS_PORTD, NAND_PERIPH_PORTD); + PIOD_PDR = NAND_PINS_PORTD; + PIOD_PUER = NAND_PINS_PORTD; + + pmc_periphEnable(SMC_SDRAMC_ID); + + // SMC init + SMC_SETUP0 = SMC_SETUP_NWE_SETUP(0) + | SMC_SETUP_NCS_WR_SETUP(0) + | SMC_SETUP_NRD_SETUP(0) + | SMC_SETUP_NCS_RD_SETUP(0); + + SMC_PULSE0 = SMC_PULSE_NWE_PULSE(2) + | SMC_PULSE_NCS_WR_PULSE(3) + | SMC_PULSE_NRD_PULSE(2) + | SMC_PULSE_NCS_RD_PULSE(3); + + SMC_CYCLE0 = SMC_CYCLE_NWE_CYCLE(3) + | SMC_CYCLE_NRD_CYCLE(3); + + SMC_TIMINGS0 = SMC_TIMINGS_TCLR(1) + | SMC_TIMINGS_TADL(6) + | SMC_TIMINGS_TAR(4) + | SMC_TIMINGS_TRR(2) + | SMC_TIMINGS_TWB(9) + | SMC_TIMINGS_RBNSEL(7) + | SMC_TIMINGS_NFSEL; + + SMC_MODE0 = SMC_MODE_READ_MODE + | SMC_MODE_WRITE_MODE; + + SMC_CFG = SMC_CFG_PAGESIZE_PS2048_64 + | SMC_CFG_EDGECTRL + | SMC_CFG_DTOMUL_X1048576 + | SMC_CFG_DTOCYC(0xF) + | SMC_CFG_WSPARE + | SMC_CFG_RSPARE; + + // Disable SMC interrupts, reset and enable NFC controller + SMC_IDR = ~0; + SMC_CTRL = 0; + SMC_CTRL = SMC_CTRL_NFCEN; + + // Enable ECC, 1 ECC per 256 bytes + SMC_ECC_CTRL = SMC_ECC_CTRL_SWRST; + SMC_ECC_MD = SMC_ECC_MD_ECC_PAGESIZE_PS2048_64 | SMC_ECC_MD_TYPCORREC_C256B; +} diff --git a/bertos/cpu/cortex-m3/drv/random_lm3s.c b/bertos/cpu/cortex-m3/drv/random_lm3s.c new file mode 100644 index 0000000..71ce64d --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/random_lm3s.c @@ -0,0 +1,93 @@ +/** + * \file + * + * + * \brief LM3 backend implementation entropy pulling. + * \author Giovanni Bajo + */ + +#include "random_p.h" + +#include + +#include + +#include + +/* + * Return the cpu core temperature in raw format + */ +INLINE uint16_t hw_readRawTemp(void) +{ + /* Trig the temperature sampling */ + HWREG(ADC0_BASE + ADC_O_PSSI) |= ADC_PSSI_SS3; + + while (!(HWREG(ADC0_BASE + ADC_O_SSFSTAT3) & ADC_SSFSTAT3_FULL)) + cpu_relax(); + + return (uint16_t)HWREG(ADC0_BASE + ADC_O_SSFIFO3); +} + +INLINE void hw_initIntTemp(void) +{ + SYSCTL_RCGC0_R |= SYSCTL_RCGC0_ADC0; + + lm3s_busyWait(10); + + /* Disable all sequence */ + HWREG(ADC0_BASE + ADC_O_ACTSS) = 0; + /* Set trigger event to programmed (for all sequence) */ + HWREG(ADC0_BASE + ADC_O_EMUX) = 0; + /* Enalbe read of temperature sensor */ + HWREG(ADC0_BASE + ADC_O_SSCTL3) |= ADC_SSCTL3_TS0; + /* Enable sequence S03 (single sample on select channel) */ + HWREG(ADC0_BASE + ADC_O_ACTSS) |= ADC_ACTSS_ASEN3; +} + + +void random_pull_entropy(uint8_t *entropy, size_t len) +{ + // We use the internal temperature sensor of LM3S as a source of entropy. + // The last bit of the acquisition is very variable and with a decent distribution + // to consider it "entropic". It does not really matter because it will + // go through a randomness extractor anyway. + hw_initIntTemp(); + + for (size_t j=0; j + * + * \brief STM32 backend implementation entropy pulling. + * \author Daniele Basile + * + */ + +#include + +#include + +#include + +#include + +struct stm32_adc *adc = (struct stm32_adc *)ADC1_BASE; + +/* + * Return the cpu core temperature in raw format + */ +INLINE uint16_t hw_readRawTemp(void) +{ + /* We sample only from one channel */ + adc->SQR1 |= BV(SQR1_SQ_LEN_SHIFT); + adc->SQR3 = (ADC_TEMP_CH & SQR3_SQ_MASK); + + /* Start convertion */ + adc->CR2 |= CR2_EXTTRIG_SWSTRT_SET; + + /* Wait in polling until conversion is done */ + while (!(adc->SR & BV(SR_EOC))) + cpu_relax(); + + /* Return the last converted data */ + return (uint16_t)adc->DR; +} + +INLINE void hw_initIntTemp(void) +{ + RCC->APB2ENR |= RCC_APB2_ADC1; + + /* Reset registry */ + adc->CR1 = 0; + adc->CR2 = 0; + adc->SQR1 = 0; + adc->SQR2 = 0; + adc->SQR3 = 0; + + /* + * Configure ADC + * - Regular mode + * - Wake up adc + * - Wake up temperature and Vrefint + */ + adc->CR2 |= BV(CR2_ADON) | ADC_EXTERNALTRIGCONV_NONE | BV(CR2_TSVREFE); + + /* Set 17.1usec sampling time*/ + adc->SMPR1 |= ((ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH17) | (ADC_SAMPLETIME_239CYCLES5 << SMPR1_CH16)); +} + + +void random_pull_entropy(uint8_t *entropy, size_t len) +{ + // We use the internal temperature sensor of LM3S as a source of entropy. + // The last bit of the acquisition is very variable and with a decent distribution + // to consider it "entropic". It does not really matter because it will + // go through a randomness extractor anyway. + hw_initIntTemp(); + + for (size_t j=0; j + * + * \brief STM32 RTC driver. + * + * \author Andrea Righi + */ + +#include "clock_stm32.h" + +#include +#include +#include + +#include +#include + +#include // cpu_relax() + +#include + +/* PWR registers base */ +static struct PWR *PWR = (struct PWR *)PWR_BASE; + +/* RTC clock source: LSE */ +#define RTC_CLKSRC 0x00000100 +/* RTC clock: 32768 Hz */ +#define RTC_CLOCK 32768 +/* RTC clock period (in ms) */ +#define RTC_PERIOD 1000 + +/* RTC control register */ +#define RTC_CRH (*(reg16_t *)(RTC_BASE + 0x00)) +#define RTC_CRL (*(reg16_t *)(RTC_BASE + 0x04)) + +#define RTC_CRL_SECIE BV(0) +#define RTC_CRL_ALRIE BV(1) +#define RTC_CRL_OWIE BV(2) + +#define RTC_CRL_SECF BV(0) +#define RTC_CRL_ALRF BV(1) +#define RTC_CRL_OWF BV(2) +#define RTC_CRL_RSF BV(3) +#define RTC_CRL_CNF BV(4) +#define RTC_CRL_RTOFF BV(5) + +/* RTC prescaler load register */ +#define RTC_PRLH (*(reg16_t *)(RTC_BASE + 0x08)) +#define RTC_PRLL (*(reg16_t *)(RTC_BASE + 0x0c)) + +/* RTC prescaler divider register */ +#define RTC_DIVH (*(reg16_t *)(RTC_BASE + 0x10)) +#define RTC_DIVL (*(reg16_t *)(RTC_BASE + 0x14)) + +/* RTC counter register */ +#define RTC_CNTH (*(reg16_t *)(RTC_BASE + 0x18)) +#define RTC_CNTL (*(reg16_t *)(RTC_BASE + 0x1c)) + +/* RTC alarm register */ +#define RTC_ALRH (*(reg16_t *)(RTC_BASE + 0x20)) +#define RTC_ALRL (*(reg16_t *)(RTC_BASE + 0x24)) + +static void rtc_enterConfig(void) +{ + /* Enter configuration mode */ + RTC_CRL |= RTC_CRL_CNF; +} + +static void rtc_exitConfig(void) +{ + /* Exit from configuration mode */ + RTC_CRL &= ~RTC_CRL_CNF; + while (!(RTC_CRL & RTC_CRL_RTOFF)) + cpu_relax(); +} + +uint32_t rtc_time(void) +{ + return (RTC_CNTH << 16) | RTC_CNTL; +} + +void rtc_setTime(uint32_t val) +{ + rtc_enterConfig(); + RTC_CNTH = (val >> 16) & 0xffff; + RTC_CNTL = val & 0xffff; + rtc_exitConfig(); +} + +/* Initialize the RTC clock */ +int rtc_init(void) +{ +#if CONFIG_KERN + MOD_CHECK(proc); +#endif + /* Enable clock for Power interface */ + RCC->APB1ENR |= RCC_APB1_PWR; + + /* Enable access to RTC registers */ + PWR->CR |= PWR_CR_DBP; + + /* Enable LSE */ + RCC->BDCR |= RCC_BDCR_LSEON; + /* Wait for LSE ready */ + while (!(RCC->BDCR & RCC_BDCR_LSERDY)) + cpu_relax(); + + /* Set clock source and enable RTC peripheral */ + RCC->BDCR |= RTC_CLKSRC | RCC_BDCR_RTCEN; + + rtc_enterConfig(); + + /* Set prescaler */ + RTC_PRLH = ((RTC_PERIOD * RTC_CLOCK / 1000 - 1) >> 16) & 0xff; + RTC_PRLL = ((RTC_PERIOD * RTC_CLOCK / 1000 - 1)) & 0xffff; + + rtc_exitConfig(); + + /* Disable access to the RTC registers */ + PWR->CR &= ~PWR_CR_DBP; + + return 0; +} diff --git a/bertos/cpu/cortex-m3/drv/ser_cm3.h b/bertos/cpu/cortex-m3/drv/ser_cm3.h new file mode 100644 index 0000000..ddc78be --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/ser_cm3.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Low-level serial module for Cortex-M3 (interface). + * + * \author Andrea Righi + */ + +#include + +#if CPU_CM3_LM3S + #include "ser_lm3s.h" +#elif CPU_CM3_STM32 + #include "ser_stm32.h" +#elif CPU_CM3_SAM3 + #include "ser_sam3.h" +/*#elif Add other Cortex-M3 CPUs here */ +#else + #error Unknown CPU +#endif diff --git a/bertos/cpu/cortex-m3/drv/ser_lm3s.c b/bertos/cpu/cortex-m3/drv/ser_lm3s.c new file mode 100644 index 0000000..12590b8 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/ser_lm3s.c @@ -0,0 +1,369 @@ +/** + * \file + * + * + * \brief LM3S1968 UART interface driver. + * + * \author Andrea Righi + */ + +#include /* for BV() */ +#include +#include +#include +#include +#include "cfg/cfg_ser.h" +#include "ser_lm3s.h" + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +struct CM3Serial +{ + struct SerialHardware hw; + bool sending; + uint32_t base; + sysirq_t irq; +}; + +/* Forward declaration */ +static struct CM3Serial UARTDesc[SER_CNT]; + +/* GPIO descriptor for UART pins */ +struct gpio_uart_info +{ + /* Sysctl */ + uint32_t sysctl; + /* GPIO base address register */ + uint32_t base; + /* Pin(s) bitmask */ + uint8_t pins; +}; + +/* Table to retrieve GPIO pins configuration to work as UART pins */ +static const struct gpio_uart_info gpio_uart[SER_CNT] = +{ + /* UART0 */ + { + .base = GPIO_PORTA_BASE, + .pins = BV(1) | BV(0), + .sysctl = SYSCTL_RCGC2_GPIOA, + }, + /* UART1 */ + { + .base = GPIO_PORTD_BASE, + .pins = BV(3) | BV(2), + .sysctl = SYSCTL_RCGC2_GPIOD, + }, + /* UART2 */ + { + .base = GPIO_PORTG_BASE, + .pins = BV(1) | BV(0), + .sysctl = SYSCTL_RCGC2_GPIOG, + }, +}; + +void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud) +{ + unsigned long div; + bool hi_speed; + + if (baud * 16 > CPU_FREQ) + { + hi_speed = true; + baud /= 2; + } + div = (CPU_FREQ * 8 / baud + 1) / 2; + + lm3s_uartDisable(base); + if (hi_speed) + HWREG(base + UART_O_CTL) |= UART_CTL_HSE; + else + HWREG(base + UART_O_CTL) &= ~UART_CTL_HSE; + /* Set the baud rate */ + HWREG(base + UART_O_IBRD) = div / 64; + HWREG(base + UART_O_FBRD) = div % 64; + lm3s_uartClear(base); + lm3s_uartEnable(base); +} + +void lm3s_uartSetParity(uint32_t base, int parity) +{ + /* Set 8-bit word, one stop bit by default */ + uint32_t config = UART_LCRH_WLEN_8; + + switch(parity) + { + case SER_PARITY_NONE: + break; + case SER_PARITY_ODD: + config |= UART_LCRH_PEN; + break; + case SER_PARITY_EVEN: + config |= UART_LCRH_EPS | UART_LCRH_PEN; + break; + default: + ASSERT(0); + return; + } + lm3s_uartDisable(base); + HWREG(base + UART_O_LCRH) = config; + lm3s_uartClear(base); + lm3s_uartEnable(base); +} + +void lm3s_uartInit(int port) +{ + uint32_t reg_clock, base; + + ASSERT(port >= 0 && port < SER_CNT); + + base = UARTDesc[port].base; + reg_clock = 1 << port; + + /* Enable the peripheral clock */ + SYSCTL_RCGC1_R |= reg_clock; + SYSCTL_RCGC2_R |= gpio_uart[port].sysctl; + lm3s_busyWait(512); + + /* Configure GPIO pins to work as UART pins */ + lm3s_gpioPinConfig(gpio_uart[port].base, gpio_uart[port].pins, + GPIO_DIR_MODE_HW, GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD); + + /* Set serial param: 115.200 bps, no parity */ + lm3s_uartSetBaudRate(base, 115200); + lm3s_uartSetParity(base, SER_PARITY_NONE); +} + +static bool tx_sending(struct SerialHardware *_hw) +{ + struct CM3Serial *hw = (struct CM3Serial *)_hw; + return hw->sending; +} + +static void uart_irq_rx(int port) +{ + struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo; + uint32_t base = UARTDesc[port].base; + char c; + + while (lm3s_uartRxReady(base)) + { + c = HWREG(base + UART_O_DR); + if (fifo_isfull(rxfifo)) + ser_handles[port]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + } +} + +static void uart_irq_tx(int port) +{ + struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; + uint32_t base = UARTDesc[port].base; + + while (lm3s_uartTxReady(base)) + { + if (fifo_isempty(txfifo)) + { + /* + * Disable TX empty interrupts if there're no more + * characters to transmit. + */ + HWREG(base + UART_O_IM) &= ~UART_IM_TXIM; + UARTDesc[port].sending = false; + break; + } + HWREG(base + UART_O_DR) = fifo_pop(txfifo); + } +} + +static void uart_common_irq_handler(int port) +{ + uint32_t base = UARTDesc[port].base; + uint32_t status; + + /* Read and clear the IRQ status */ + status = HWREG(base + UART_O_RIS); + + /* Process the IRQ */ + if (status & (UART_RIS_RXRIS | UART_RIS_RTRIS)) + uart_irq_rx(port); + if (status & UART_RIS_TXRIS) + uart_irq_tx(port); +} + +static void lm3s_uartIRQEnable(int port, sysirq_handler_t handler) +{ + uint32_t base = UARTDesc[port].base; + sysirq_t irq = UARTDesc[port].irq; + + /* Register the IRQ handler */ + sysirq_setHandler(irq, handler); + /* Enable RX interrupt in the UART interrupt mask register */ + HWREG(base + UART_O_IM) |= UART_IM_RXIM | UART_IM_RTIM; +} + +static void lm3s_uartIRQDisable(int port) +{ + uint32_t base = UARTDesc[port].base; + + HWREG(base + UART_O_IM) &= + ~(UART_IM_TXIM | UART_IM_RXIM | UART_IM_RTIM); +} + +/* UART class definition */ +#define UART_PORT(port) \ + /* UART TX and RX buffers */ \ + static unsigned char \ + uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE]; \ + static unsigned char \ + uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE]; \ + \ + /* UART interrupt handler */ \ + static DECLARE_ISR(uart ## port ## _irq_handler) \ + { \ + uart_common_irq_handler(port); \ + } \ + \ + /* UART public methods */ \ + static void \ + uart ## port ## _txStart(struct SerialHardware *_hw) \ + { \ + struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; \ + struct CM3Serial *hw = (struct CM3Serial *)_hw; \ + \ + if (hw->sending) \ + return; \ + lm3s_uartPutChar(UART ## port ## _BASE, fifo_pop(txfifo)); \ + if (!fifo_isempty(txfifo)) \ + { \ + HWREG(UART ## port ## _BASE + UART_O_IM) |= \ + UART_IM_TXIM; \ + hw->sending = true; \ + } \ + } \ + \ + static void \ + uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw), \ + unsigned long baud) \ + { \ + lm3s_uartSetBaudRate(UART ## port ## _BASE, baud); \ + } \ + \ + static void \ + uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw), \ + int parity) \ + { \ + lm3s_uartSetParity(UART ## port ## _BASE, parity); \ + } \ + \ + static void \ + uart ## port ## _cleanup(struct SerialHardware *_hw) \ + { \ + struct CM3Serial *hw = (struct CM3Serial *)_hw; \ + \ + hw->sending = false; \ + lm3s_uartIRQDisable(port); \ + lm3s_uartClear(UART ## port ## _BASE); \ + lm3s_uartDisable(UART ## port ## _BASE); \ + } \ + \ + static void \ + uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw), \ + UNUSED_ARG(struct Serial *, ser)) \ + { \ + lm3s_uartInit(port); \ + lm3s_uartEnable(UART ## port ## _BASE); \ + lm3s_uartIRQEnable(port, uart ## port ## _irq_handler); \ + } \ + \ + /* UART operations */ \ + static const struct SerialHardwareVT UART ## port ## _VT = \ + { \ + .init = uart ## port ## _init, \ + .cleanup = uart ## port ## _cleanup, \ + .setBaudrate = uart ## port ## _setbaudrate, \ + .setParity = uart ## port ## _setparity, \ + .txStart = uart ## port ## _txStart, \ + .txSending = tx_sending, \ + }; + +/* UART port instances */ +UART_PORT(0) +UART_PORT(1) +UART_PORT(2) + +static struct CM3Serial UARTDesc[SER_CNT] = +{ + { + .hw = { + .table = &UART0_VT, + .txbuffer = uart0_txbuffer, + .rxbuffer = uart0_rxbuffer, + .txbuffer_size = sizeof(uart0_txbuffer), + .rxbuffer_size = sizeof(uart0_rxbuffer), + }, + .sending = false, + .base = UART0_BASE, + .irq = INT_UART0, + }, + { + .hw = { + .table = &UART1_VT, + .txbuffer = uart1_txbuffer, + .rxbuffer = uart1_rxbuffer, + .txbuffer_size = sizeof(uart1_txbuffer), + .rxbuffer_size = sizeof(uart1_rxbuffer), + }, + .sending = false, + .base = UART1_BASE, + .irq = INT_UART1, + }, + { + .hw = { + .table = &UART2_VT, + .txbuffer = uart2_txbuffer, + .rxbuffer = uart2_rxbuffer, + .txbuffer_size = sizeof(uart2_txbuffer), + .rxbuffer_size = sizeof(uart2_rxbuffer), + }, + .sending = false, + .base = UART2_BASE, + .irq = INT_UART2, + }, +}; + +struct SerialHardware *ser_hw_getdesc(int port) +{ + ASSERT(port >= 0 && port < SER_CNT); + return &UARTDesc[port].hw; +} diff --git a/bertos/cpu/cortex-m3/drv/ser_lm3s.h b/bertos/cpu/cortex-m3/drv/ser_lm3s.h new file mode 100644 index 0000000..e58738a --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/ser_lm3s.h @@ -0,0 +1,154 @@ +/** + * \file + * + * + * \brief LM3S1968 UART interface driver. + * + * \author Andrea Righi + */ + +#ifndef SER_LM3S_H +#define SER_LM3S_H + +#include +#include /* cpu_relax() */ +#include /* lm3s_busyWait() */ +#include + +/* Serial hardware numbers */ +enum +{ + SER_UART0, + SER_UART1, + SER_UART2, + + SER_CNT //< Number of serial ports +}; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) //< Rx FIFO buffer overrun +#define SERRF_RXTIMEOUT BV(1) //< Receive timeout +#define SERRF_TXTIMEOUT BV(2) //< Transmit timeout + +/* + * Hardware errors. + */ +#define SERRF_RXSROVERRUN 0 //< Input overrun +#define SERRF_FRAMEERROR 0 //< Stop bit missing +#define SERRF_PARITYERROR 0 //< Parity error +#define SERRF_NOISEERROR 0 //< Noise error + +/* Serial error/status flags */ +typedef uint32_t serstatus_t; + +INLINE void lm3s_uartDisable(uint32_t base) +{ + /* Disable the hardware FIFO */ + HWREG(base + UART_O_LCRH) &= ~UART_LCRH_FEN; + + /* Disable the UART */ + HWREG(base + UART_O_CTL) &= + ~(UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE); + lm3s_busyWait(512); +} + +INLINE void lm3s_uartEnable(uint32_t base) +{ + /* Enable the hardware FIFO */ + HWREG(base + UART_O_LCRH) |= UART_LCRH_FEN; + + /* Enable RX, TX, and the UART */ + HWREG(base + UART_O_CTL) |= + UART_CTL_UARTEN | UART_CTL_TXE | UART_CTL_RXE; + lm3s_busyWait(512); +} + +/* Clear the flags register */ +INLINE void lm3s_uartClear(uint32_t base) +{ + HWREG(base + UART_O_FR) = 0; +} + +INLINE bool lm3s_uartTxDone(uint32_t base) +{ + return HWREG(base + UART_O_FR) & UART_FR_TXFE ? true : false; +} + +INLINE bool lm3s_uartTxReady(uint32_t base) +{ + return HWREG(base + UART_O_FR) & UART_FR_TXFF ? false : true; +} + +INLINE bool lm3s_uartRxReady(uint32_t base) +{ + return HWREG(base + UART_O_FR) & UART_FR_RXFE ? false : true; +} + +INLINE bool lm3s_uartReady(uint32_t base) +{ + return HWREG(base + UART_O_FR) & UART_FR_BUSY ? false : true; +} + +INLINE int lm3s_uartPutCharNonBlocking(uint32_t base, unsigned char c) +{ + if (!lm3s_uartTxReady(base)) + return EOF; + HWREG(base + UART_O_DR) = c; + return c; +} + +INLINE int lm3s_uartPutChar(uint32_t base, unsigned char c) +{ + while (!lm3s_uartTxReady(base)) + cpu_relax(); + HWREG(base + UART_O_DR) = c; + return c; +} + +INLINE int lm3s_uartGetCharNonBlocking(uint32_t base) +{ + if (!lm3s_uartRxReady(base)) + return EOF; + return HWREG(base + UART_O_DR); +} + +INLINE int lm3s_uartGetChar(uint32_t base) +{ + while (!lm3s_uartRxReady(base)) + cpu_relax(); + return HWREG(base + UART_O_DR); +} + +void lm3s_uartSetBaudRate(uint32_t base, unsigned long baud); +void lm3s_uartSetParity(uint32_t base, int parity); +void lm3s_uartInit(int port); + +#endif /* SER_LM3S_H */ diff --git a/bertos/cpu/cortex-m3/drv/ser_sam3.c b/bertos/cpu/cortex-m3/drv/ser_sam3.c new file mode 100644 index 0000000..c330ca8 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/ser_sam3.c @@ -0,0 +1,996 @@ +/** + * \file + * + * + * \brief ARM UART and SPI I/O driver + * + * + * \author Daniele Basile + * \author Stefano Fedrigo + */ + +#include "hw/hw_ser.h" /* Required for bus macros overrides */ +#include /* CPU_FREQ */ + +#include "cfg/cfg_ser.h" +#include + + +//#include +#include +#include + +#include + +#include +#include + +#include + + +#define SERIRQ_PRIORITY 4 ///< default priority for serial irqs. + +/** + * \name Overridable serial bus hooks + * + * These can be redefined in hw.h to implement + * special bus policies such as half-duplex, 485, etc. + * + * + * \code + * TXBEGIN TXCHAR TXEND TXOFF + * | __________|__________ | | + * | | | | | | | | | + * v v v v v v v v v + * ______ __ __ __ __ __ __ ________________ + * \/ \/ \/ \/ \/ \/ \/ + * ______/\__/\__/\__/\__/\__/\__/ + * + * \endcode + * + * \{ + */ + +#ifndef SER_UART0_BUS_TXINIT + /** + * Default TXINIT macro - invoked in uart0_init() + * + * - Disable GPIO on USART0 tx/rx pins + */ + #if CPU_ARM_AT91 && !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X + #warning Check USART0 pins! + #endif + #define SER_UART0_BUS_TXINIT do { \ + PIOA_PDR = BV(RXD0) | BV(TXD0); \ + PIO_PERIPH_SEL(PIOA_BASE, BV(RXD0) | BV(TXD0), USART0_PERIPH); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXBEGIN + /** + * Invoked before starting a transmission + */ + #define SER_UART0_BUS_TXBEGIN +#endif + +#ifndef SER_UART0_BUS_TXCHAR + /** + * Invoked to send one character. + */ + #define SER_UART0_BUS_TXCHAR(c) do { \ + US0_THR = (c); \ + } while (0) +#endif + +#ifndef SER_UART0_BUS_TXEND + /** + * Invoked as soon as the txfifo becomes empty + */ + #define SER_UART0_BUS_TXEND +#endif + +/* End USART0 macros */ + +#if USART_PORTS > 1 + + #ifndef SER_UART1_BUS_TXINIT + /** + * Default TXINIT macro - invoked in uart1_init() + * + * - Disable GPIO on USART1 tx/rx pins + */ + #if CPU_ARM_AT91 && !CPU_ARM_SAM7S_LARGE && !CPU_ARM_SAM7X + #warning Check USART1 pins! + #endif + #define SER_UART1_BUS_TXINIT do { \ + PIOA_PDR = BV(RXD1) | BV(TXD1); \ + PIO_PERIPH_SEL(PIOA_BASE, BV(RXD1) | BV(TXD1), USART1_PERIPH); \ + } while (0) + #endif + + #ifndef SER_UART1_BUS_TXBEGIN + /** + * Invoked before starting a transmission + */ + #define SER_UART1_BUS_TXBEGIN + #endif + + #ifndef SER_UART1_BUS_TXCHAR + /** + * Invoked to send one character. + */ + #define SER_UART1_BUS_TXCHAR(c) do { \ + US1_THR = (c); \ + } while (0) + #endif + + #ifndef SER_UART1_BUS_TXEND + /** + * Invoked as soon as the txfifo becomes empty + */ + #define SER_UART1_BUS_TXEND + #endif + +#endif + +/** +* \name Overridable SPI hooks +* +* These can be redefined in hw.h to implement +* special bus policies such as slave select pin handling, etc. +* +* \{ +*/ + +#ifndef SER_SPI0_BUS_TXINIT + /** + * Default TXINIT macro - invoked in spi_init() + * The default is no action. + */ + #if CPU_CM3_SAM3 + #define SER_SPI0_BUS_TXINIT do { \ + /* Disable PIO on SPI pins */ \ + PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); \ + /* SPI is peripheral A on SAM3X,A,N,S,U */ \ + PIO_PERIPH_SEL(PIOA_BASE, BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO), PIO_PERIPH_A); \ + } while (0) + #else + #define SER_SPI0_BUS_TXINIT do { \ + /* Disable PIO on SPI pins */ \ + PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); \ + } while (0) + #endif +#endif + +#ifndef SER_SPI0_BUS_TXCLOSE + /** + * Invoked after the last character has been transmitted. + * The default is no action. + */ + #define SER_SPI0_BUS_TXCLOSE do { \ + /* Enable PIO on SPI pins */ \ + PIOA_PER = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); \ + } while (0) +#endif + +#if CPU_ARM_SAM7X + + #ifndef SER_SPI1_BUS_TXINIT + /** + * Default TXINIT macro - invoked in spi_init() + * The default is no action. + */ + #define SER_SPI1_BUS_TXINIT do { \ + /* Disable PIO on SPI pins */ \ + PIOA_PDR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); \ + /* SPI1 pins are on B peripheral function! */ \ + PIOA_BSR = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); \ + } while (0) + #endif + + #ifndef SER_SPI1_BUS_TXCLOSE + /** + * Invoked after the last character has been transmitted. + * The default is no action. + */ + #define SER_SPI1_BUS_TXCLOSE do { \ + /* Enable PIO on SPI pins */ \ + PIOA_PER = BV(SPI1_SPCK) | BV(SPI1_MOSI) | BV(SPI1_MISO); \ + } while (0) + #endif +#endif +/*\}*/ + + +/** + * \name Core dependent interrupt handling macros + * + * Atmel serial hardware is used on different CPU cores, + * i.e. SAM3 and SAM7. The user interface of the serial + * subsystem is identical but core interrupt controllers + * are different. + * + * \{ + */ +#if CPU_ARM_AT91 + +INLINE void sysirq_setHandler(sysirq_t irq, sysirq_handler_t handler) +{ + /* Set the vector. */ + AIC_SVR(irq) = uart0_irq_dispatcher; + + /* Initialize to level/edge sensitive with defined priority. */ +#if CPU_ARM_SAM7X + if (irq == SPI0_ID || irq == SPI1_ID) +#else + if (irq == SPI0_ID) +#endif + AIC_SMR(irq) = (AIC_SMR(irq) & ~AIC_SRCTYPE_MASK) | AIC_SRCTYPE_INT_EDGE_TRIGGERED; + else // USART/UART + AIC_SMR(irq) = (AIC_SMR(irq) & ~AIC_SRCTYPE_MASK) | AIC_SRCTYPE_INT_LEVEL_SENSITIVE; + + /* Enable IRQ */ + AIC_IECR = BV(irq); +} + +INLINE void sysirq_setPriority(sysirq_t irq, int prio) +{ + AIC_SMR(irq) = (AIC_SMR(irq) & ~AIC_PRIOR_MASK) | SERIRQ_PRIORITY; +} + +/** Inform hw that we have served the IRQ */ +#define SER_INT_ACK do { \ + AIC_EOICR = 0; \ +} while (0) + +#elif CPU_CM3_SAM3 + +/** Inform hw that we have served the IRQ */ +#define SER_INT_ACK do { /* nop */ } while (0) + +#else + #error No interrupt handling macros defined for current architecture +#endif + +/*\}*/ + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +/* TX and RX buffers */ +static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE]; +static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE]; +#if USART_PORTS > 1 +static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE]; +static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE]; +#endif +static unsigned char spi0_txbuffer[CONFIG_SPI0_TXBUFSIZE]; +static unsigned char spi0_rxbuffer[CONFIG_SPI0_RXBUFSIZE]; +#if CPU_ARM_SAM7X +static unsigned char spi1_txbuffer[CONFIG_SPI1_TXBUFSIZE]; +static unsigned char spi1_rxbuffer[CONFIG_SPI1_RXBUFSIZE]; +#endif + +/** + * Internal hardware state structure + * + * The \a sending variable is true while the transmission + * interrupt is retriggering itself. + * + * For the USARTs the \a sending flag is useful for taking specific + * actions before sending a burst of data, at the start of a trasmission + * but not before every char sent. + * + * For the SPI, this flag is necessary because the SPI sends and receives + * bytes at the same time and the SPI IRQ is unique for send/receive. + * The only way to start transmission is to write data in SPDR (this + * is done by spi_starttx()). We do this *only* if a transfer is + * not already started. + */ +struct ArmSerial +{ + struct SerialHardware hw; + volatile bool sending; +}; + +static ISR_PROTO(uart0_irq_dispatcher); +#if USART_PORTS > 1 +static ISR_PROTO(uart1_irq_dispatcher); +#endif +static ISR_PROTO(spi0_irq_handler); +#if CPU_ARM_SAM7X +static ISR_PROTO(spi1_irq_handler); +#endif +/* + * Callbacks for USART0 + */ +static void uart0_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + US0_IDR = 0xFFFFFFFF; + pmc_periphEnable(US0_ID); + + /* + * - Reset USART0 + * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none + * - Enable both the receiver and the transmitter + * - Enable only the RX complete interrupt + */ + US0_CR = BV(US_RSTRX) | BV(US_RSTTX); + US0_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO; + US0_CR = BV(US_RXEN) | BV(US_TXEN); + US0_IER = BV(US_RXRDY); + + SER_UART0_BUS_TXINIT; + + sysirq_setPriority(INT_US0, SERIRQ_PRIORITY); + sysirq_setHandler(INT_US0, uart0_irq_dispatcher); + + SER_STROBE_INIT; +} + +static void uart0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + US0_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA); +} + +static void uart0_enabletxirq(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt sets hw->sending to false + * when it runs with an empty fifo. The order of statements in the + * if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + /* + * - Enable the transmitter + * - Enable TX empty interrupt + */ + SER_UART0_BUS_TXBEGIN; + US0_IER = BV(US_TXEMPTY); + } +} + +static void uart0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + /* Compute baud-rate period */ + US0_BRGR = CPU_FREQ / (16 * rate); + //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);) +} + +static void uart0_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + US0_MR &= ~US_PAR_MASK; + /* Set UART parity */ + switch(parity) + { + case SER_PARITY_NONE: + { + /* Parity none. */ + US0_MR |= US_PAR_NO; + break; + } + case SER_PARITY_EVEN: + { + /* Even parity. */ + US0_MR |= US_PAR_EVEN; + break; + } + case SER_PARITY_ODD: + { + /* Odd parity. */ + US0_MR |= US_PAR_ODD; + break; + } + default: + ASSERT(0); + } +} + +#if USART_PORTS > 1 + +/* + * Callbacks for USART1 + */ +static void uart1_init( + UNUSED_ARG(struct SerialHardware *, _hw), + UNUSED_ARG(struct Serial *, ser)) +{ + US1_IDR = 0xFFFFFFFF; + pmc_periphEnable(US1_ID); + + /* + * - Reset USART1 + * - Set serial param: mode Normal, 8bit data, 1bit stop, parity none + * - Enable both the receiver and the transmitter + * - Enable only the RX complete interrupt + */ + US1_CR = BV(US_RSTRX) | BV(US_RSTTX); + US1_MR = US_CHMODE_NORMAL | US_CHRL_8 | US_NBSTOP_1 | US_PAR_NO; + US1_CR = BV(US_RXEN) | BV(US_TXEN); + US1_IER = BV(US_RXRDY); + + SER_UART1_BUS_TXINIT; + + sysirq_setPriority(INT_US1, SERIRQ_PRIORITY); + sysirq_setHandler(INT_US1, uart1_irq_dispatcher); + + SER_STROBE_INIT; +} + +static void uart1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + US1_CR = BV(US_RSTRX) | BV(US_RSTTX) | BV(US_RXDIS) | BV(US_TXDIS) | BV(US_RSTSTA); +} + +static void uart1_enabletxirq(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + /* + * WARNING: racy code here! The tx interrupt sets hw->sending to false + * when it runs with an empty fifo. The order of statements in the + * if-block matters. + */ + if (!hw->sending) + { + hw->sending = true; + /* + * - Enable the transmitter + * - Enable TX empty interrupt + */ + SER_UART1_BUS_TXBEGIN; + US1_IER = BV(US_TXEMPTY); + } +} + +static void uart1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + /* Compute baud-rate period */ + US1_BRGR = CPU_FREQ / (16 * rate); + //DB(kprintf("uart0_setbaudrate(rate=%lu): period=%d\n", rate, period);) +} + +static void uart1_setparity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + US1_MR &= ~US_PAR_MASK; + /* Set UART parity */ + switch(parity) + { + case SER_PARITY_NONE: + { + /* Parity none. */ + US1_MR |= US_PAR_NO; + break; + } + case SER_PARITY_EVEN: + { + /* Even parity. */ + US1_MR |= US_PAR_EVEN; + break; + } + case SER_PARITY_ODD: + { + /* Odd parity. */ + US1_MR |= US_PAR_ODD; + break; + } + default: + ASSERT(0); + } +} + +#endif /* USART_PORTS > 1 */ + +/* SPI driver */ +static void spi0_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser)) +{ + SER_SPI0_BUS_TXINIT; + + /* Reset device */ + SPI0_CR = BV(SPI_SWRST); + + /* + * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, + * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 + */ + SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + + /* + * Set SPI mode. + * At reset clock division factor is set to 0, that is + * *forbidden*. Set SPI clock to minimum to keep it valid. + * Set all possible chip select registers in case user manually + * change CPS field in SPI_MR. + */ + SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + SPI0_CSR1 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + SPI0_CSR2 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + SPI0_CSR3 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + + /* Disable all irqs */ + SPI0_IDR = 0xFFFFFFFF; + + //sysirq_setPriority(INT_SPI0, SERIRQ_PRIORITY); + sysirq_setHandler(INT_SPI0, spi0_irq_handler); + pmc_periphEnable(SPI0_ID); + + /* Enable SPI */ + SPI0_CR = BV(SPI_SPIEN); + + SER_STROBE_INIT; +} + +static void spi0_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + /* Disable SPI */ + SPI0_CR = BV(SPI_SPIDIS); + + /* Disable all irqs */ + SPI0_IDR = 0xFFFFFFFF; + + SER_SPI0_BUS_TXCLOSE; +} + +static void spi0_starttx(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Send data only if the SPI is not already transmitting */ + if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI0]->txfifo)) + { + hw->sending = true; + SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo); + /* Enable interrupt on tx buffer empty */ + SPI0_IER = BV(SPI_TXEMPTY); + } + + IRQ_RESTORE(flags); +} + +static void spi0_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + SPI0_CSR0 &= ~SPI_SCBR; + + ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate)); + SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT; +} + +#if CPU_ARM_SAM7X +/* SPI driver */ +static void spi1_init(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(struct Serial *, ser)) +{ + SER_SPI1_BUS_TXINIT; + + /* Reset device */ + SPI1_CR = BV(SPI_SWRST); + + /* + * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, + * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 + */ + SPI1_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + + /* + * Set SPI mode. + * At reset clock division factor is set to 0, that is + * *forbidden*. Set SPI clock to minimum to keep it valid. + * Set all possible chip select registers in case user manually + * change chip select. + */ + SPI1_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + SPI1_CSR1 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + SPI1_CSR2 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + SPI1_CSR3 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + + /* Disable all SPI irqs */ + SPI1_IDR = 0xFFFFFFFF; + + sysirq_setPriority(INT_SPI1, SERIRQ_PRIORITY); + sysirq_setHandler(INT_SPI1, spi1_irq_dispatcher); + pmc_periphEnable(SPI1_ID); + + /* Enable SPI */ + SPI1_CR = BV(SPI_SPIEN); + + SER_STROBE_INIT; +} + +static void spi1_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + /* Disable SPI */ + SPI1_CR = BV(SPI_SPIDIS); + + /* Disable all irqs */ + SPI1_IDR = 0xFFFFFFFF; + + SER_SPI1_BUS_TXCLOSE; +} + +static void spi1_starttx(struct SerialHardware *_hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Send data only if the SPI is not already transmitting */ + if (!hw->sending && !fifo_isempty(&ser_handles[SER_SPI1]->txfifo)) + { + hw->sending = true; + SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo); + /* Enable interrupt on tx buffer empty */ + SPI1_IER = BV(SPI_TXEMPTY); + } + + IRQ_RESTORE(flags); +} + +static void spi1_setbaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + SPI1_CSR0 &= ~SPI_SCBR; + + ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate)); + SPI1_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT; +} +#endif + +static void spi_setparity(UNUSED_ARG(struct SerialHardware *, _hw), UNUSED_ARG(int, parity)) +{ + // nop +} + + +static bool tx_sending(struct SerialHardware* _hw) +{ + struct ArmSerial *hw = (struct ArmSerial *)_hw; + return hw->sending; +} + +// FIXME: move into compiler.h? Ditch? +#if COMPILER_C99 + #define C99INIT(name,val) .name = val +#elif defined(__GNUC__) + #define C99INIT(name,val) name: val +#else + #warning No designated initializers, double check your code + #define C99INIT(name,val) (val) +#endif + +/* + * High-level interface data structures + */ +static const struct SerialHardwareVT UART0_VT = +{ + C99INIT(init, uart0_init), + C99INIT(cleanup, uart0_cleanup), + C99INIT(setBaudrate, uart0_setbaudrate), + C99INIT(setParity, uart0_setparity), + C99INIT(txStart, uart0_enabletxirq), + C99INIT(txSending, tx_sending), +}; + +#if USART_PORTS > 1 + +static const struct SerialHardwareVT UART1_VT = +{ + C99INIT(init, uart1_init), + C99INIT(cleanup, uart1_cleanup), + C99INIT(setBaudrate, uart1_setbaudrate), + C99INIT(setParity, uart1_setparity), + C99INIT(txStart, uart1_enabletxirq), + C99INIT(txSending, tx_sending), +}; + +#endif /* USART_PORTS > 1 */ + +static const struct SerialHardwareVT SPI0_VT = +{ + C99INIT(init, spi0_init), + C99INIT(cleanup, spi0_cleanup), + C99INIT(setBaudrate, spi0_setbaudrate), + C99INIT(setParity, spi_setparity), + C99INIT(txStart, spi0_starttx), + C99INIT(txSending, tx_sending), +}; +#if CPU_ARM_SAM7X +static const struct SerialHardwareVT SPI1_VT = +{ + C99INIT(init, spi1_init), + C99INIT(cleanup, spi1_cleanup), + C99INIT(setBaudrate, spi1_setbaudrate), + C99INIT(setParity, spi_setparity), + C99INIT(txStart, spi1_starttx), + C99INIT(txSending, tx_sending), +}; +#endif + +static struct ArmSerial UARTDescs[SER_CNT] = +{ + { + C99INIT(hw, /**/) { + C99INIT(table, &UART0_VT), + C99INIT(txbuffer, uart0_txbuffer), + C99INIT(rxbuffer, uart0_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)), + }, + C99INIT(sending, false), + }, +#if USART_PORTS > 1 + { + C99INIT(hw, /**/) { + C99INIT(table, &UART1_VT), + C99INIT(txbuffer, uart1_txbuffer), + C99INIT(rxbuffer, uart1_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)), + }, + C99INIT(sending, false), + }, +#endif + + { + C99INIT(hw, /**/) { + C99INIT(table, &SPI0_VT), + C99INIT(txbuffer, spi0_txbuffer), + C99INIT(rxbuffer, spi0_rxbuffer), + C99INIT(txbuffer_size, sizeof(spi0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(spi0_rxbuffer)), + }, + C99INIT(sending, false), + }, + #if CPU_ARM_SAM7X + { + C99INIT(hw, /**/) { + C99INIT(table, &SPI1_VT), + C99INIT(txbuffer, spi1_txbuffer), + C99INIT(rxbuffer, spi1_rxbuffer), + C99INIT(txbuffer_size, sizeof(spi1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(spi1_rxbuffer)), + }, + C99INIT(sending, false), + } + + #endif +}; + +struct SerialHardware *ser_hw_getdesc(int unit) +{ + ASSERT(unit < SER_CNT); + return &UARTDescs[unit].hw; +} + +/** + * Serial 0 TX interrupt handler + */ +INLINE void uart0_irq_tx(void) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART0]->txfifo; + + if (fifo_isempty(txfifo)) + { + /* + * - Disable the TX empty interrupts + */ + US0_IDR = BV(US_TXEMPTY); + SER_UART0_BUS_TXEND; + UARTDescs[SER_UART0].sending = false; + } + else + { + char c = fifo_pop(txfifo); + SER_UART0_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +/** + * Serial 0 RX complete interrupt handler. + */ +INLINE void uart0_irq_rx(void) +{ + SER_STROBE_ON; + + /* Should be read before US_CRS */ + ser_handles[SER_UART0]->status |= US0_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + US0_CR = BV(US_RSTSTA); + + char c = US0_RHR; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART0]->rxfifo; + + if (fifo_isfull(rxfifo)) + ser_handles[SER_UART0]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + + SER_STROBE_OFF; +} + +/** + * Serial IRQ dispatcher for USART0. + */ +static DECLARE_ISR(uart0_irq_dispatcher) +{ + if (US0_CSR & BV(US_RXRDY)) + uart0_irq_rx(); + + if (US0_CSR & BV(US_TXEMPTY)) + uart0_irq_tx(); + + SER_INT_ACK; +} + +#if USART_PORTS > 1 + +/** + * Serial 1 TX interrupt handler + */ +INLINE void uart1_irq_tx(void) +{ + SER_STROBE_ON; + + struct FIFOBuffer * const txfifo = &ser_handles[SER_UART1]->txfifo; + + if (fifo_isempty(txfifo)) + { + /* + * - Disable the TX empty interrupts + */ + US1_IDR = BV(US_TXEMPTY); + SER_UART1_BUS_TXEND; + UARTDescs[SER_UART1].sending = false; + } + else + { + char c = fifo_pop(txfifo); + SER_UART1_BUS_TXCHAR(c); + } + + SER_STROBE_OFF; +} + +/** + * Serial 1 RX complete interrupt handler. + */ +INLINE void uart1_irq_rx(void) +{ + SER_STROBE_ON; + + /* Should be read before US_CRS */ + ser_handles[SER_UART1]->status |= US1_CSR & (SERRF_RXSROVERRUN | SERRF_FRAMEERROR); + US1_CR = BV(US_RSTSTA); + + char c = US1_RHR; + struct FIFOBuffer * const rxfifo = &ser_handles[SER_UART1]->rxfifo; + + if (fifo_isfull(rxfifo)) + ser_handles[SER_UART1]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + + SER_STROBE_OFF; +} + +/** + * Serial IRQ dispatcher for USART1. + */ +static DECLARE_ISR(uart1_irq_dispatcher) +{ + if (US1_CSR & BV(US_RXRDY)) + uart1_irq_rx(); + + if (US1_CSR & BV(US_TXEMPTY)) + uart1_irq_tx(); + + SER_INT_ACK; +} + +#endif /* USART_PORTS > 1 */ + +/** + * SPI0 interrupt handler + */ +static DECLARE_ISR(spi0_irq_handler) +{ + SER_STROBE_ON; + + char c = SPI0_RDR; + /* Read incoming byte. */ + if (!fifo_isfull(&ser_handles[SER_SPI0]->rxfifo)) + fifo_push(&ser_handles[SER_SPI0]->rxfifo, c); + /* + * FIXME + else + ser_handles[SER_SPI0]->status |= SERRF_RXFIFOOVERRUN; + */ + + /* Send */ + if (!fifo_isempty(&ser_handles[SER_SPI0]->txfifo)) + SPI0_TDR = fifo_pop(&ser_handles[SER_SPI0]->txfifo); + else + { + UARTDescs[SER_SPI0].sending = false; + /* Disable interrupt on tx buffer empty */ + SPI0_IDR = BV(SPI_TXEMPTY); + } + + SER_INT_ACK; + + SER_STROBE_OFF; +} + + +#if CPU_ARM_SAM7X +/** + * SPI1 interrupt handler + */ +static DECLARE_ISR(spi1_irq_handler) +{ + SER_STROBE_ON; + + char c = SPI1_RDR; + /* Read incoming byte. */ + if (!fifo_isfull(&ser_handles[SER_SPI1]->rxfifo)) + fifo_push(&ser_handles[SER_SPI1]->rxfifo, c); + /* + * FIXME + else + ser_handles[SER_SPI1]->status |= SERRF_RXFIFOOVERRUN; + */ + + /* Send */ + if (!fifo_isempty(&ser_handles[SER_SPI1]->txfifo)) + SPI1_TDR = fifo_pop(&ser_handles[SER_SPI1]->txfifo); + else + { + UARTDescs[SER_SPI1].sending = false; + /* Disable interrupt on tx buffer empty */ + SPI1_IDR = BV(SPI_TXEMPTY); + } + + SER_INT_ACK; + + SER_STROBE_OFF; +} +#endif diff --git a/bertos/cpu/cortex-m3/drv/ser_sam3.h b/bertos/cpu/cortex-m3/drv/ser_sam3.h new file mode 100644 index 0000000..e1e0d9e --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/ser_sam3.h @@ -0,0 +1,81 @@ +/** + * \file + * + * + * \brief High level serial I/O API + * + * \author Daniele Basile + */ + +#ifndef SER_SAM3_H +#define SER_SAM3_H + +#include /* BV() */ +#include /* uint32_t */ +#include /* CPU_* */ + +/** \name Serial Error/status flags. */ +/*\{*/ +typedef uint32_t serstatus_t; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ +#define SERRF_RXTIMEOUT BV(1) /**< Receive timeout */ +#define SERRF_TXTIMEOUT BV(2) /**< Transmit timeout */ + +/* + * Hardware errors. + * These flags map directly to the ARM USART Channel Status Register (US_CSR). + */ +#define SERRF_RXSROVERRUN BV(5) /**< Rx shift register overrun */ +#define SERRF_FRAMEERROR BV(6) /**< Stop bit missing */ +#define SERRF_PARITYERROR BV(7) /**< Parity error */ +#define SERRF_NOISEERROR 0 /**< Unsupported */ +/*\}*/ + +/** + * \name Serial hw numbers + * + * \{ + */ +enum +{ + SER_UART0, +#if !CPU_CM3_SAM3U + SER_UART1, +#endif + SER_SPI0, + SER_CNT /**< Number of serial ports */ +}; +/*\}*/ + +#endif /* SER_SAM3_H */ diff --git a/bertos/cpu/cortex-m3/drv/ser_stm32.c b/bertos/cpu/cortex-m3/drv/ser_stm32.c new file mode 100644 index 0000000..0b8c4f3 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/ser_stm32.c @@ -0,0 +1,392 @@ +/** + * \file + * + * + * \brief STM32 UART interface driver. + * + * \author Daniele Basile + */ + +#include "ser_stm32.h" + +#include "cfg/cfg_ser.h" + +#include /* for BV() */ +#include + +#include +#include +#include +#include +#include + + +/* From the high-level serial driver */ +extern struct Serial *ser_handles[SER_CNT]; + +struct CM3Serial +{ + struct SerialHardware hw; + volatile bool sending; + uint32_t base; + sysirq_t irq; +}; + +/* Forward declaration */ +static struct CM3Serial UARTDesc[SER_CNT]; + +/* GPIO descriptor for UART pins */ +struct gpio_uart_info +{ + /* GPIO base address register */ + uint32_t base; + /* Pin(s) bitmask */ + uint32_t rx_pin; + uint32_t tx_pin; + /* Sysctl */ + uint32_t sysctl_gpio; + uint32_t sysctl_usart; + +}; + +/* Table to retrieve GPIO pins configuration to work as UART pins */ +static const struct gpio_uart_info gpio_uart[SER_CNT] = +{ + /* UART1 */ + { + .base = GPIOA_BASE, + .rx_pin = GPIO_USART1_RX_PIN, + .tx_pin = GPIO_USART1_TX_PIN, + .sysctl_gpio = RCC_APB2_GPIOA, + .sysctl_usart = RCC_APB2_USART1, + }, + /* UART2 */ + { + .base = GPIOA_BASE, + .rx_pin = GPIO_USART2_RX_PIN, + .tx_pin = GPIO_USART2_TX_PIN, + .sysctl_gpio = RCC_APB2_GPIOA, + .sysctl_usart = RCC_APB1_USART2, + }, +#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE + /* UART3 */ + { + .base = GPIOB_BASE, + .rx_pin = GPIO_USART3_RX_PIN, + .tx_pin = GPIO_USART3_TX_PIN, + .sysctl_gpio = RCC_APB2_GPIOB, + .sysctl_usart = RCC_APB1_USART3, + }, +#endif +}; + +#define USART1_PORT 0 +#define USART2_PORT 1 +#define USART3_PORT 2 + +void stm32_uartSetBaudRate(uint32_t base, unsigned long baud) +{ + struct stm32_usart *_base = (struct stm32_usart *)base; + _base->BRR = evaluate_brr(_base, CPU_FREQ, baud); +} + +void stm32_uartSetParity(uint32_t base, int parity) +{ + struct stm32_usart *_base = (struct stm32_usart *)base; + + /* USART_WORD_LEN_8B */ + _base->CR1 &= ~BV(CR1_M); + + switch(parity) + { + case SER_PARITY_NONE: + _base->CR1 &= ~BV(CR1_PCE); + break; + case SER_PARITY_ODD: + _base->CR1 |= (BV(CR1_PCE) | BV(CR1_PS)); + break; + case SER_PARITY_EVEN: + _base->CR1 |= BV(CR1_PCE); + _base->CR1 &= ~BV(CR1_PS); + break; + default: + ASSERT(0); + return; + } +} + +void stm32_uartInit(int port) +{ + struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base; + + ASSERT(port >= 0 && port < SER_CNT); + + /* Enable clocking on AFIO */ + RCC->APB2ENR |= RCC_APB2_AFIO; + RCC->APB2ENR |= gpio_uart[port].sysctl_gpio; + + /* Configure USART pins */ + if (port == USART1_PORT) + { + RCC->APB2ENR |= gpio_uart[port].sysctl_usart; + } + else + { + RCC->APB1ENR |= gpio_uart[port].sysctl_usart; + } + + stm32_gpioPinConfig((struct stm32_gpio *)gpio_uart[port].base, gpio_uart[port].tx_pin, + GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ); + + stm32_gpioPinConfig((struct stm32_gpio *)gpio_uart[port].base, gpio_uart[port].rx_pin, + GPIO_MODE_IN_FLOATING, GPIO_SPEED_50MHZ); + + /* Clear control registry */ + base->CR2 = 0; + base->CR1 = 0; + base->CR3 = 0; + base->SR = 0; + + /* Set serial param: 115.200 bps, no parity */ + stm32_uartSetBaudRate(UARTDesc[port].base, 115200); + stm32_uartSetParity(UARTDesc[port].base, SER_PARITY_NONE); + + + /* Enable trasmision and receiver */ + base->CR1 |= (BV(CR1_TE) | BV(CR1_RE)); + +} + +static bool tx_sending(struct SerialHardware *_hw) +{ + struct CM3Serial *hw = (struct CM3Serial *)_hw; + return hw->sending; +} + +static void uart_irq_rx(int port) +{ + struct FIFOBuffer *rxfifo = &ser_handles[port]->rxfifo; + struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base; + char c; + + while (stm32_uartRxReady(UARTDesc[port].base)) + { + c = base->DR; + if (fifo_isfull(rxfifo)) + ser_handles[port]->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(rxfifo, c); + } +} + +static void uart_irq_tx(int port) +{ + struct FIFOBuffer *txfifo = &ser_handles[port]->txfifo; + struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base; + + if (fifo_isempty(txfifo)) + { + /* + * Disable TX empty interrupts if there're no more + * characters to transmit. + */ + base->CR1 &= ~BV(CR1_TXEIE); + UARTDesc[port].sending = false; + } + else + { + base->DR = fifo_pop(txfifo); + } +} + +static void uart_common_irq_handler(int port) +{ + struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base; + uint32_t status; + + /* Read and clear the IRQ status */ + status = base->SR; + + /* Check hw errors */ + ser_handles[port]->status = status & + (BV(SR_ORE) | BV(SR_FE) | BV(SR_PE) | BV(SR_NE)); + + /* Process the IRQ */ + if (status & BV(CR1_RXNEIE)) + { + uart_irq_rx(port); + } + if (status & (BV(CR1_TXEIE) | BV(CR1_TCIE))) + { + uart_irq_tx(port); + } +} + +static void stm32_uartIRQEnable(int port, sysirq_handler_t handler) +{ + struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base; + + /* Register the IRQ handler */ + sysirq_setHandler(UARTDesc[port].irq, handler); + + base->CR1 |= BV(CR1_RXNEIE); +} + +static void stm32_uartIRQDisable(int port) +{ + struct stm32_usart *base = (struct stm32_usart *)UARTDesc[port].base; + + base->CR1 &= ~(BV(CR1_RXNEIE) | USART_FLAG_TXE); +} + + +/* UART class definition */ +#define UART_PORT(port) \ + /* UART TX and RX buffers */ \ + static unsigned char uart ## port ## _txbuffer[CONFIG_UART ## port ## _TXBUFSIZE]; \ + static unsigned char uart ## port ## _rxbuffer[CONFIG_UART ## port ## _RXBUFSIZE]; \ + \ + /* UART interrupt handler */ \ + static DECLARE_ISR(uart ## port ## _irq_handler) \ + { \ + uart_common_irq_handler(USART ## port ## _PORT); \ + } \ + \ + /* UART public methods */ \ + static void uart ## port ## _txStart(struct SerialHardware *_hw) \ + { \ + struct FIFOBuffer *txfifo = &ser_handles[USART ## port ## _PORT]->txfifo; \ + struct CM3Serial *hw = (struct CM3Serial *)_hw; \ + struct stm32_usart *base = (struct stm32_usart *)USART## port ## _BASE; \ + if (hw->sending) \ + return; \ + stm32_uartPutChar(USART ## port ## _BASE, fifo_pop(txfifo)); \ + if (!fifo_isempty(txfifo)) \ + { \ + hw->sending = true; \ + base->CR1 |= BV(CR1_TXEIE); \ + } \ + } \ + \ + static void uart ## port ## _setbaudrate(UNUSED_ARG(struct SerialHardware *, hw), \ + unsigned long baud) \ + { \ + stm32_uartSetBaudRate(USART## port ## _BASE, baud); \ + } \ + \ + static void uart ## port ## _setparity(UNUSED_ARG(struct SerialHardware *, hw), \ + int parity) \ + { \ + stm32_uartSetParity(USART## port ## _BASE, parity); \ + } \ + \ + static void uart ## port ## _cleanup(struct SerialHardware *_hw) \ + { \ + struct CM3Serial *hw = (struct CM3Serial *)_hw; \ + hw->sending = false; \ + stm32_uartIRQDisable(USART ## port ## _PORT); \ + stm32_uartClear(USART## port ## _BASE); \ + stm32_uartDisable(USART## port ## _BASE); \ + } \ + \ + static void uart ## port ## _init(UNUSED_ARG(struct SerialHardware *, hw), \ + UNUSED_ARG(struct Serial *, ser)) \ + { \ + stm32_uartInit(USART ## port ## _PORT); \ + stm32_uartEnable(USART## port ## _BASE); \ + stm32_uartIRQEnable(USART ## port ## _PORT, uart ## port ## _irq_handler); \ + } \ + \ + /* UART operations */ \ + static const struct SerialHardwareVT USART ## port ## _VT = \ + { \ + .init = uart ## port ## _init, \ + .cleanup = uart ## port ## _cleanup, \ + .setBaudrate = uart ## port ## _setbaudrate, \ + .setParity = uart ## port ## _setparity, \ + .txStart = uart ## port ## _txStart, \ + .txSending = tx_sending, \ + }; + +/* UART port instances */ +UART_PORT(1) +UART_PORT(2) +#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE +UART_PORT(3) +#endif + +static struct CM3Serial UARTDesc[SER_CNT] = +{ + { + .hw = { + .table = &USART1_VT, + .txbuffer = uart1_txbuffer, + .rxbuffer = uart1_rxbuffer, + .txbuffer_size = sizeof(uart1_txbuffer), + .rxbuffer_size = sizeof(uart1_rxbuffer), + }, + .sending = false, + .base = USART1_BASE, + .irq = USART1_IRQHANDLER, + }, + { + .hw = { + .table = &USART2_VT, + .txbuffer = uart2_txbuffer, + .rxbuffer = uart2_rxbuffer, + .txbuffer_size = sizeof(uart2_txbuffer), + .rxbuffer_size = sizeof(uart2_rxbuffer), + }, + .sending = false, + .base = USART2_BASE, + .irq = USART2_IRQHANDLER, + }, +#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE + { + .hw = { + .table = &USART3_VT, + .txbuffer = uart3_txbuffer, + .rxbuffer = uart3_rxbuffer, + .txbuffer_size = sizeof(uart3_txbuffer), + .rxbuffer_size = sizeof(uart3_rxbuffer), + }, + .sending = false, + .base = USART3_BASE, + .irq = USART3_IRQHANDLER, + }, +#endif +}; + +struct SerialHardware *ser_hw_getdesc(int port) +{ + ASSERT(port >= 0 && port < SER_CNT); + return &UARTDesc[port].hw; +} diff --git a/bertos/cpu/cortex-m3/drv/ser_stm32.h b/bertos/cpu/cortex-m3/drv/ser_stm32.h new file mode 100644 index 0000000..885513b --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/ser_stm32.h @@ -0,0 +1,130 @@ +/** + * \file + * + * + * \brief STM32F10xx UART interface driver. + * + * \author Daniele Basile + */ + +#ifndef SER_STM32_H +#define SER_STM32_H + +#include + +#include /* cpu_relax() */ + +#include + +/* Serial hardware numbers */ +enum +{ + SER_UART1 = 0, + SER_UART2, +#if CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE + SER_UART3, +#endif + SER_CNT //< Number of serial ports +}; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(6) //< Rx FIFO buffer overrun +#define SERRF_RXTIMEOUT BV(5) //< Receive timeout +#define SERRF_TXTIMEOUT BV(4) //< Transmit timeout + +/* + * Hardware errors. + */ +#define SERRF_RXSROVERRUN SR_ORE //< Input overrun +#define SERRF_FRAMEERROR SR_FE //< Stop bit missing +#define SERRF_PARITYERROR SR_PE //< Parity error +#define SERRF_NOISEERROR SR_NE //< Noise error + +/* Serial error/status flags */ +typedef uint32_t serstatus_t; + +INLINE void stm32_uartDisable(uint32_t base) +{ + struct stm32_usart *_base = (struct stm32_usart *)base; + _base->CR1 &= ~CR1_RUN_RESET; +} + +INLINE void stm32_uartEnable(uint32_t base) +{ + struct stm32_usart *_base = (struct stm32_usart *)base; + _base->CR1 |= CR1_RUN_SET; +} + +/* Clear the flags register */ +INLINE void stm32_uartClear(uint32_t base) +{ + struct stm32_usart *_base = (struct stm32_usart *)base; + _base->SR &= ~USART_FLAG_MASK; +} + +INLINE bool stm32_uartTxDone(uint32_t base) +{ + struct stm32_usart *_base = (struct stm32_usart *)base; + return (_base->SR & USART_FLAG_TC); +} + +INLINE bool stm32_uartTxReady(uint32_t base) +{ + struct stm32_usart *_base = (struct stm32_usart *)base; + return (_base->SR & (BV(CR1_TXEIE) | BV(CR1_TCIE))); +} + +INLINE bool stm32_uartRxReady(uint32_t base) +{ + struct stm32_usart *_base = (struct stm32_usart *)base; + return (_base->SR & BV(CR1_RXNEIE)); +} + +INLINE int stm32_uartPutChar(uint32_t base, unsigned char c) +{ + struct stm32_usart *_base = (struct stm32_usart *)base; + while (!stm32_uartTxReady(base)) + cpu_relax(); + _base->DR = c; + return c; +} + +INLINE int stm32_uartGetChar(uint32_t base) +{ + struct stm32_usart * _base = (struct stm32_usart *)base; + return _base->DR; +} + +void stm32_uartSetBaudRate(uint32_t base, unsigned long baud); +void stm32_uartSetParity(uint32_t base, int parity); +void stm32_uartInit(int port); + +#endif /* SER_STM32_H */ diff --git a/bertos/cpu/cortex-m3/drv/spi_dma_sam3.c b/bertos/cpu/cortex-m3/drv/spi_dma_sam3.c new file mode 100644 index 0000000..2034599 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/spi_dma_sam3.c @@ -0,0 +1,170 @@ +/** + * \file + * + * + * \brief SPI driver with DMA. + * + * \author Francesco Sacchi + * \author Luca Ottaviano + */ + +#include "cfg/cfg_spi_dma.h" +#include "hw/hw_spi_dma.h" + +#include +#include + +#include +#include + +#include +#include + + +#include +#include + +#include /* memset */ + + +void spi_dma_setclock(uint32_t rate) +{ + SPI0_CSR0 &= ~SPI_SCBR; + + ASSERT((uint8_t)DIV_ROUND(CPU_FREQ, rate)); + SPI0_CSR0 |= DIV_ROUND(CPU_FREQ, rate) << SPI_SCBR_SHIFT; +} + + +static int spi_dma_flush(UNUSED_ARG(struct KFile *, fd)) +{ + /* Wait for DMA to finish */ + while (!(SPI0_SR & BV(SPI_TXBUFE))) + cpu_relax(); + + /* Wait until last bit has been shifted out */ + while (!(SPI0_SR & BV(SPI_TXEMPTY))) + cpu_relax(); + + return 0; +} + +static size_t spi_dma_write(struct KFile *fd, const void *_buf, size_t size) +{ + SPI0_PTCR = BV(PDC_PTCR_TXTDIS); + SPI0_TPR = (reg32_t)_buf; + SPI0_TCR = size; + SPI0_PTCR = BV(PDC_PTSR_TXTEN); + spi_dma_flush(fd); + return size; +} + + +/* + * Dummy buffer used to transmit 0xff chars while receiving data. + * This buffer is completetly constant and the compiler should allocate it + * in flash memory. + */ +static const uint8_t tx_dummy_buf[CONFIG_SPI_DMA_MAX_RX] = { [0 ... (CONFIG_SPI_DMA_MAX_RX - 1)] = 0xFF }; + +static size_t spi_dma_read(UNUSED_ARG(struct KFile *, fd), void *_buf, size_t size) +{ + size_t count, total_rx = 0; + uint8_t *buf = (uint8_t *)_buf; + + while (size) + { + count = MIN(size, (size_t)CONFIG_SPI_DMA_MAX_RX); + + SPI0_PTCR = BV(PDC_PTCR_TXTDIS) | BV(PDC_PTCR_RXTDIS); + + SPI0_RPR = (reg32_t)buf; + SPI0_RCR = count; + SPI0_TPR = (reg32_t)tx_dummy_buf; + SPI0_TCR = count; + + /* Avoid reading the previous sent char */ + *buf = SPI0_RDR; + + /* Start transfer */ + SPI0_PTCR = BV(PDC_PTCR_RXTEN) | BV(PDC_PTCR_TXTEN); + + /* wait for transfer to finish */ + while (!(SPI0_SR & BV(SPI_ENDRX))) + cpu_relax(); + + size -= count; + total_rx += count; + buf += count; + } + SPI0_PTCR = BV(PDC_PTCR_RXTDIS) | BV(PDC_PTCR_TXTDIS); + + return total_rx; +} + +#define SPI_DMA_IRQ_PRIORITY 4 + +void spi_dma_init(SpiDma *spi) +{ + /* Disable PIO on SPI pins */ + PIOA_PDR = BV(SPI0_SPCK) | BV(SPI0_MOSI) | BV(SPI0_MISO); + + /* Reset device */ + SPI0_CR = BV(SPI_SWRST); + + /* + * Set SPI to master mode, fixed peripheral select, chip select directly connected to a peripheral device, + * SPI clock set to MCK, mode fault detection disabled, loopback disable, NPCS0 active, Delay between CS = 0 + */ + SPI0_MR = BV(SPI_MSTR) | BV(SPI_MODFDIS); + + /* + * Set SPI mode. + * At reset clock division factor is set to 0, that is + * *forbidden*. Set SPI clock to minimum to keep it valid. + */ + SPI0_CSR0 = BV(SPI_NCPHA) | (255 << SPI_SCBR_SHIFT); + + /* Disable all irqs */ + SPI0_IDR = 0xFFFFFFFF; + /* Enable SPI clock. */ + PMC_PCER = BV(SPI0_ID); + + /* Enable SPI */ + SPI0_CR = BV(SPI_SPIEN); + + DB(spi->fd._type = KFT_SPIDMA); + spi->fd.write = spi_dma_write; + spi->fd.read = spi_dma_read; + spi->fd.flush = spi_dma_flush; + + SPI_DMA_STROBE_INIT(); +} diff --git a/bertos/cpu/cortex-m3/drv/ssi_lm3s.c b/bertos/cpu/cortex-m3/drv/ssi_lm3s.c new file mode 100644 index 0000000..8d314db --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/ssi_lm3s.c @@ -0,0 +1,208 @@ +/** + * \file + * + * + * \brief LM3S1968 Synchronous Serial Interface (SSI) driver. + * + * \author Andrea Righi + */ + + +#include "ssi_lm3s.h" + +#include +#include + +#include /* memset() */ + +/* SSI clocking informations (CPSDVSR + SCR) */ +struct SSIClock +{ + unsigned int cpsdvsr; + unsigned int scr; +}; + +/* + * Evaluate the SSI clock prescale (SSICPSR) and SSI serial clock rate (SCR). + */ +INLINE struct SSIClock +lm3s_ssiPrescale(unsigned int bitrate) +{ + struct SSIClock ret; + + for (ret.cpsdvsr = 2, ret.scr = CPU_FREQ / bitrate / ret.cpsdvsr - 1; + ret.scr > 255; ret.cpsdvsr += 2); + ASSERT(ret.cpsdvsr < 255); + + return ret; +} + +/* + * Initialize the SSI interface. + * + * Return 0 in case of success, a negative value otherwise. + */ +int lm3s_ssiOpen(uint32_t addr, uint32_t frame, int mode, + int bitrate, uint32_t data_width) +{ + struct SSIClock ssi_clock; + + ASSERT(addr == SSI0_BASE || addr == SSI1_BASE); + /* Configure the SSI operating mode */ + switch (mode) + { + /* SSI Slave Mode Output Disable */ + case SSI_MODE_SLAVE_OD: + HWREG(addr + SSI_O_CR1) = SSI_CR1_SOD; + break; + /* SSI Slave */ + case SSI_MODE_SLAVE: + HWREG(addr + SSI_O_CR1) = SSI_CR1_MS; + break; + /* SSI Master */ + case SSI_MODE_MASTER: + HWREG(addr + SSI_O_CR1) = 0; + break; + default: + ASSERT(0); + return -1; + } + /* Configure the peripheral clock and frame format */ + ssi_clock = lm3s_ssiPrescale(bitrate); + HWREG(addr + SSI_O_CPSR) = ssi_clock.cpsdvsr; + HWREG(addr + SSI_O_CR0) = + (ssi_clock.scr << 8) | + ((frame & 3) << 6) | + (frame & SSI_CR0_FRF_M) | + (data_width - 1); + /* Enable the SSI interface */ + HWREG(addr + SSI_O_CR1) |= SSI_CR1_SSE; + + return 0; +} + +/* + * Write data to the SSI bus. + * + * Return the number of bytes written to the bus. + */ +static size_t lm3s_ssiWrite(struct KFile *fd, const void *buf, size_t size) +{ + LM3SSSI *fds = LM3SSSI_CAST(fd); + const char *p = (const char *)buf; + uint32_t frame; + size_t count = 0; + + while (count < size) + { + frame = p[count]; + if (fds->flags & LM3S_SSI_NONBLOCK) + { + if (!lm3s_ssiWriteFrameNonBlocking(fds->addr, + frame)) + break; + } + else + lm3s_ssiWriteFrame(fds->addr, frame); + count++; + } + return count; +} + +/* + * Read data from the SSI bus. + * + * Return the number of bytes read from the bus. + */ +static size_t lm3s_ssiRead(struct KFile *fd, void *buf, size_t size) +{ + LM3SSSI *fds = LM3SSSI_CAST(fd); + + uint8_t *p = (uint8_t *)buf; + uint32_t frame; + size_t count = 0; + + while (count < size) + { + if (fds->flags & LM3S_SSI_NONBLOCK) + { + if (!lm3s_ssiReadFrameNonBlocking(fds->addr, &frame)) + break; + } + else + lm3s_ssiReadFrame(fds->addr, &frame); + *p++ = (uint8_t)frame; + count++; + } + return count; +} + + +/* Wait for data in the TX FIFO being actually transmitted */ +static int lm3s_ssiFlush(struct KFile *fd) +{ + LM3SSSI *fds = LM3SSSI_CAST(fd); + + while (!lm3s_ssiTxDone(fds->addr)) + cpu_relax(); + return 0; +} + +/* Disable the SSI interface */ +static int lm3s_ssiClose(struct KFile *fd) +{ + LM3SSSI *fds = LM3SSSI_CAST(fd); + + lm3s_ssiFlush(fd); + HWREG(fds->addr + SSI_O_CR1) &= ~SSI_CR1_SSE; + return 0; +} + +/** + * Initialize a LM3S SSI driver. + */ +void lm3s_ssiInit(struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode, + int bitrate, uint32_t data_width) +{ + memset(fds, 0, sizeof(*fds)); + DB(fds->fd._type = KFT_LM3SSSI); + + /* TODO: only 8-bit frame size is supported */ + ASSERT(data_width == 8); + + fds->fd.write = lm3s_ssiWrite; + fds->fd.read = lm3s_ssiRead; + fds->fd.close = lm3s_ssiClose; + fds->fd.flush = lm3s_ssiFlush; + + fds->addr = addr; + lm3s_ssiOpen(addr, frame, mode, bitrate, data_width); +} diff --git a/bertos/cpu/cortex-m3/drv/ssi_lm3s.h b/bertos/cpu/cortex-m3/drv/ssi_lm3s.h new file mode 100644 index 0000000..d8ab39e --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/ssi_lm3s.h @@ -0,0 +1,191 @@ +/** + * \file + * + * + * \brief LM3S1968 Synchronous Serial Interface (SSI) driver. + * + */ + +#ifndef SSI_LM3S_H +#define SSI_LM3S_H + +#include /* cpu_relax() */ +#include /* KFile */ +#include + +/** + * LM3S1968 SSI frame format + */ +/*\{*/ +#define SSI_FRF_MOTO_MODE_0 0x00000000 //< Moto fmt, polarity 0, phase 0 +#define SSI_FRF_MOTO_MODE_1 0x00000002 //< Moto fmt, polarity 0, phase 1 +#define SSI_FRF_MOTO_MODE_2 0x00000001 //< Moto fmt, polarity 1, phase 0 +#define SSI_FRF_MOTO_MODE_3 0x00000003 //< Moto fmt, polarity 1, phase 1 +#define SSI_FRF_TI 0x00000010 //< TI frame format +#define SSI_FRF_NMW 0x00000020 //< National MicroWire frame format +/*\}*/ + +/** + * LM3S1968 SSI operational mode + */ +/*\{*/ +#define SSI_MODE_MASTER 0x00000000 //< SSI master +#define SSI_MODE_SLAVE 0x00000001 //< SSI slave +#define SSI_MODE_SLAVE_OD 0x00000002 //< SSI slave with output disabled +/*\}*/ + +/* LM3S SSI handle properties */ +enum +{ + /* Non-blocking I/O */ + LM3S_SSI_NONBLOCK = 1, +}; + +/** LM3S1968 SSI handle structure */ +typedef struct LM3SSSI +{ + /* SSI Kfile structure */ + KFile fd; + + /* Handle properties */ + uint32_t flags; + + /* SSI port address */ + uint32_t addr; +} LM3SSSI; + +/** + * ID for LM3S SSI. + */ +#define KFT_LM3SSSI MAKE_ID('L', 'S', 'S', 'I') + +INLINE LM3SSSI *LM3SSSI_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_LM3SSSI); + return (LM3SSSI *)fd; +} + +/* KFile interface to LM3S SSI */ +void lm3s_ssiInit(struct LM3SSSI *fds, uint32_t addr, uint32_t frame, int mode, + int bitrate, uint32_t data_width); + +/* Raw interface to LM3S SSI */ +int lm3s_ssiOpen(uint32_t addr, uint32_t frame, int mode, + int bitrate, uint32_t data_width); + +/* + * Check if the SSI transmitter is busy or not + * + * This allows to determine whether the TX FIFO have been cleared by the + * hardware, so the transmission can be safely considered completed. + */ +INLINE bool lm3s_ssiTxDone(uint32_t base) +{ + return (HWREG(base + SSI_O_SR) & SSI_SR_BSY) ? true : false; +} + +/* + * Check if the SSI TX FIFO is full + */ +INLINE bool lm3s_ssiTxReady(uint32_t base) +{ + return (HWREG(base + SSI_O_SR) & SSI_SR_TNF) ? true : false; +} + +/* + * Check for data available in the RX FIFO + */ +INLINE bool lm3s_ssiRxReady(uint32_t base) +{ + return (HWREG(base + SSI_O_SR) & SSI_SR_RNE) ? true : false; +} + +/* + * Get a frame into the SSI receive FIFO without blocking. + * + * Return the number of frames read from the RX FIFO. + */ +INLINE int lm3s_ssiReadFrameNonBlocking(uint32_t base, uint32_t *val) +{ + /* Check for data available in the RX FIFO */ + if (!lm3s_ssiRxReady(base)) + return 0; + /* Read data from SSI RX FIFO */ + *val = HWREG(base + SSI_O_DR); + return 1; +} + +/* + * Get a frame from the SSI receive FIFO. + */ +INLINE void lm3s_ssiReadFrame(uint32_t base, uint32_t *val) +{ + /* Wait for data available in the RX FIFO */ + while (!lm3s_ssiRxReady(base)) + cpu_relax(); + /* Read data from SSI RX FIFO */ + *val = HWREG(base + SSI_O_DR); +} + +/* + * Put a frame into the SSI transmit FIFO without blocking. + * + * NOTE: the upper bits of the frame will be automatically discarded by the + * hardware according to the frame data width. + * + * Return the number of frames written to the TX FIFO. + */ +INLINE int lm3s_ssiWriteFrameNonBlocking(uint32_t base, uint32_t val) +{ + /* Check for available space in the TX FIFO */ + if (!lm3s_ssiTxReady(base)) + return 0; + /* Enqueue data to the TX FIFO */ + HWREG(base + SSI_O_DR) = val; + return 1; +} + +/* + * Put a frame into the SSI transmit FIFO. + * + * NOTE: the upper bits of the frame will be automatically discarded by the + * hardware according to the frame data width. + */ +INLINE void lm3s_ssiWriteFrame(uint32_t base, uint32_t val) +{ + /* Wait for available space in the TX FIFO */ + while (!lm3s_ssiTxReady(base)) + cpu_relax(); + /* Enqueue data to the TX FIFO */ + HWREG(base + SSI_O_DR) = val; +} + +#endif /* SSI_LM3S_H */ diff --git a/bertos/cpu/cortex-m3/drv/timer_cm3.c b/bertos/cpu/cortex-m3/drv/timer_cm3.c new file mode 100644 index 0000000..ac8512e --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/timer_cm3.c @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief Low-level timer driver (SysTick) for LM3S1968. + * + * \author Andrea Righi + */ + +#include "timer_cm3.h" + +#include + +#include + +#include + +INLINE void timer_hw_setPeriod(unsigned long period) +{ + ASSERT(period < (1 << 24)); + NVIC_ST_RELOAD_R = period - 1; +} + +static void timer_hw_enable(void) +{ + NVIC_ST_CTRL_R |= + NVIC_ST_CTRL_CLK_SRC | NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN; +} + +static void timer_hw_disable(void) +{ + NVIC_ST_CTRL_R &= ~(NVIC_ST_CTRL_ENABLE | NVIC_ST_CTRL_INTEN); +} + +void timer_hw_init(void) +{ + timer_hw_setPeriod(CPU_FREQ / TIMER_TICKS_PER_SEC); + sysirq_setHandler(FAULT_SYSTICK, timer_handler); + timer_hw_enable(); +} + +void timer_hw_exit(void) +{ + timer_hw_disable(); + sysirq_freeHandler(FAULT_SYSTICK); +} diff --git a/bertos/cpu/cortex-m3/drv/timer_cm3.h b/bertos/cpu/cortex-m3/drv/timer_cm3.h new file mode 100644 index 0000000..0d45ad2 --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/timer_cm3.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Low-level timer driver (SysTick) for Cortex-M3. + */ + +#ifndef TIMER_CM3_H +#define TIMER_CM3_H + +#include "cfg/cfg_timer.h" /* CONFIG_TIMER */ + +#include +#include + +#if CPU_CM3_LM3S + #include +#elif CPU_CM3_STM32 + #include +#elif CPU_CM3_SAM3 + #include +/*#elif Add other families here */ +#else + #error Unknown CPU +#endif + +/** + * \name Values for CONFIG_TIMER. + * + * Select which hardware timer interrupt to use for system clock and softtimers. + * + * $WIZ$ timer_select = "TIMER_DEFAULT", "TIMER_ON_GPTM" + */ +#define TIMER_ON_GPTM 1 + +#define TIMER_DEFAULT TIMER_ON_GPTM ///< Default system timer + +#if (CONFIG_TIMER == TIMER_ON_GPTM) + /* Ticks frequency (HZ) */ + #define TIMER_TICKS_PER_SEC 1000 + + /* Frequency of the hardware high-precision timer. */ + #define TIMER_HW_HPTICKS_PER_SEC (CPU_FREQ) + + /* Maximum value of the high-precision hardware counter register */ + #define TIMER_HW_CNT (CPU_FREQ / TIMER_TICKS_PER_SEC) + + /** Type of time expressed in ticks of the hardware high-precision timer */ + typedef uint32_t hptime_t; + #define SIZEOF_HPTIME_T 4 + + /* Timer ISR prototype */ + ISR_PROTO_CONTEXT_SWITCH(timer_handler); + #define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_handler) + + INLINE void timer_hw_irq(void) + { + } + + + INLINE bool timer_hw_triggered(void) + { + return true; + } + + INLINE hptime_t timer_hw_hpread(void) + { + return (TIMER_HW_CNT - NVIC_ST_CURRENT_R); + } + +#else + + #error Unimplemented value for CONFIG_TIMER +#endif /* CONFIG_TIMER */ + +void timer_hw_init(void); +void timer_hw_exit(void); + +#endif /* TIMER_CM3_H */ diff --git a/bertos/cpu/cortex-m3/drv/usb_stm32.c b/bertos/cpu/cortex-m3/drv/usb_stm32.c new file mode 100644 index 0000000..393b3cc --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/usb_stm32.c @@ -0,0 +1,1943 @@ +/** + * \file + * + * + * \brief STM32 USB driver + * + * \author Andrea Righi + */ + +#include "cfg/cfg_usb.h" + +#define LOG_LEVEL USB_LOG_LEVEL +#define LOG_FORMAT USB_LOG_FORMAT + +#include +#include +#include +#include + +#include +#include + +#include +#include +#include +#include +#include + +#include + +#include /* memcpy() */ + +#include "usb_stm32.h" + +/* XXX: consider to move this to cfg/macros.h */ + +/* XXX: redefine this to make it usable within C expression */ +#define _MIN(a,b) (((a) < (b)) ? (a) : (b)) + +/* STM32 USB registers */ +struct stm32_usb +{ + reg32_t EP0R; + reg32_t EP1R; + reg32_t EP2R; + reg32_t EP3R; + reg32_t EP4R; + reg32_t EP5R; + reg32_t EP6R; + reg32_t EP7R; + reg32_t __reserved[8]; + reg32_t CNTR; + reg32_t ISTR; + reg32_t FNR; + reg32_t DADDR; + reg32_t BTABLE; +}; + +/* Hardware registers */ +static struct stm32_usb *usb = (struct stm32_usb *)USB_BASE_ADDR; + +/* Endpoint descriptors: used for handling requests to use with endpoints */ +static stm32_UsbEp ep_cnfg[EP_MAX_NUM]; +STATIC_ASSERT(EP_MAX_NUM <= EP_MAX_HW_NUM); + +/* USB EP0 control descriptor */ +static const UsbEndpointDesc USB_CtrlEpDescr0 = +{ + .bLength = sizeof(USB_CtrlEpDescr0), + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = USB_DIR_OUT | 0, + .bmAttributes = USB_ENDPOINT_XFER_CONTROL, + .wMaxPacketSize = USB_EP0_MAX_SIZE, + .bInterval = 0, +}; + +/* USB EP1 control descriptor */ +static const UsbEndpointDesc USB_CtrlEpDescr1 = +{ + .bLength = sizeof(USB_CtrlEpDescr1), + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = USB_DIR_IN | 0, + .bmAttributes = USB_ENDPOINT_XFER_CONTROL, + .wMaxPacketSize = USB_EP0_MAX_SIZE, + .bInterval = 0, +}; + +/* USB setup packet */ +static UsbCtrlRequest setup_packet; + +/* USB device controller: max supported interfaces */ +#define USB_MAX_INTERFACE CONFIG_USB_INTERFACE_MAX + +/* USB device controller features */ +#define STM32_UDC_FEATURE_SELFPOWERED BV(0) +#define STM32_UDC_FEATURE_REMOTE_WAKEUP BV(1) + +/* Hardware-specific USB device controller structure */ +typedef struct stm32_udc +{ + uint8_t state; + uint32_t cfg_id; + const UsbConfigDesc *cfg; + uint32_t interfaces; + uint32_t alt[USB_MAX_INTERFACE]; + uint32_t address; + uint8_t feature; +} PACKED stm32_udc_t; + +/* Hardware-specific USB Device Controller */ +static stm32_udc_t udc; + +/* Generic USB Device Controller structure */ +static UsbDevice *usb_dev; + +/* USB packet memory management: list of allocated chunks */ +static stm32_UsbMemSlot *mem_use; + +/* USB packet memory management: memory buffer metadata */ +static stm32_UsbMemSlot memory_buffer[EP_MAX_NUM]; + +/* Endpoint TX and RX buffers */ +static size_t rx_size, tx_size; + +#define EP_BUFFER_SIZE _MIN(CONFIG_USB_BUFSIZE, USB_XFER_MAX_SIZE) +STATIC_ASSERT(!(EP_BUFFER_SIZE & 0x03)); + +static uint8_t ep_buffer[EP_MAX_NUM][EP_BUFFER_SIZE] ALIGNED(4); + +static Event usb_event_done[EP_MAX_SLOTS]; + +/* Check if we're running in atomic (non-sleepable) context or not */ +static volatile bool in_atomic = false; + +/* Allocate a free block of the packet memory */ +static stm32_UsbMemSlot *usb_malloc(void) +{ + unsigned int i; + + for (i = 0; i < countof(memory_buffer); i++) + if (memory_buffer[i].Size == 0) + return &memory_buffer[i]; + return NULL; +} + +/* Release a block of the packet memory */ +static void usb_free(stm32_UsbMemSlot *pPntr) +{ + pPntr->Size = 0; +} + +/* Allocate a free chunk of the packet memory (inside a block) */ +static bool usb_alloc_buffer(uint16_t *pOffset, uint32_t *size, + int EndPoint) +{ + stm32_UsbMemSlot *mem = mem_use, + *memNext, *mem_useNew; + uint32_t max_size = *size; + + /* + * Packet size alignment: + * - fine-granularity allocation: size alignment by 2; + * - coarse-granularity allocation: size alignment by 32. + */ + if (max_size < 62) + max_size = ALIGN_UP(max_size, 2); + else + max_size = ALIGN_UP(max_size, 32); + /* + * Finding free memory chunks from the allocated blocks of the USB + * packet memory. + */ + *pOffset = 0; + while (mem != NULL) + { + /* Offset alignment by 4 */ + *pOffset = ALIGN_UP(mem->Start + mem->Size, 4); + memNext = mem->next; + if ((mem->next == NULL) || + (memNext->Start >= + *pOffset + max_size)) + break; + mem = mem->next; + } + /* Check for out-of-memory condition */ + if (UNLIKELY((*pOffset + max_size) >= USB_BDT_OFFSET)) + return false; + /* + * Allocate a new memory block, next to the last allocated block. + */ + mem_useNew = usb_malloc(); + if (UNLIKELY(mem_useNew == NULL)) + return false; + /* Insert the block to the list of allocated blocks */ + if (mem_use == NULL) + { + mem_use = mem_useNew; + mem_use->next = NULL; + } + else + { + mem_useNew->next = mem->next; + mem->next = mem_useNew; + } + /* Update block's metadata */ + mem_useNew->ep_addr = EndPoint; + mem_useNew->Start = *pOffset; + mem_useNew->Size = max_size; + + *size = max_size; + + return true; +} + +/* Release a chunk of the packet memory (inside a block) */ +static void usb_free_buffer(int EndPoint) +{ + stm32_UsbMemSlot *mem, *memPrev = NULL; + mem = mem_use; + + while (mem != NULL) + { + if (mem->ep_addr == EndPoint) + { + if (UNLIKELY(memPrev == NULL)) + { + /* Free the first element of the list */ + mem_use = mem_use->next; + usb_free(mem); + mem = mem_use; + continue; + } + memPrev->next = mem->next; + usb_free(mem); + } + else + memPrev = mem; + mem = memPrev->next; + } +} + +/*-------------------------------------------------------------------------*/ + +/* Connect USB controller */ +static void usb_connect(void) +{ + stm32_gpioPinWrite((struct stm32_gpio *)GPIOC_BASE, 1 << 11, 0); +} + +/* Set USB device address */ +static void usb_set_address(uint32_t addr) +{ + usb->DADDR = addr | 0x80; +} + +/* Suspend USB controller */ +static void usb_suspend(void) +{ + usb->CNTR |= bmFSUSP | bmLPMODE; +} + +/* Resume USB controller */ +static void usb_resume(void) +{ + uint32_t line_status; + + line_status = usb->FNR & 0xc000; + if (!line_status) + return; + /* check for noise and eventually return to sleep */ + if (line_status == 0xc000) + usb_suspend(); + else + usb->CNTR &= ~(bmFSUSP | bmLPMODE); +} + +/* Convert logical EP address to physical EP address */ +static int usb_ep_logical_to_hw(uint8_t ep_addr) +{ + int addr = (ep_addr & 0x0f) << 1; + return (ep_addr & 0x80) ? addr + 1 : addr; +} + +/* Set EP address */ +static void ep_ctrl_set_ea(reg32_t *reg, uint32_t val) +{ + val &= 0x0f; + val |= *reg & 0x0700; + val |= USB_CTRL_CLEAR_ONLY_MASK; + *reg = val; +} + +/* Get EP IN status */ +static uint32_t ep_ctrl_get_stat_tx(reg32_t *reg) +{ + return (*reg & (0x3UL << 4)) >> 4; +} + +/* Set EP IN state */ +static void ep_ctrl_set_stat_tx(reg32_t *reg, stm32_UsbEpState val) +{ + uint32_t state; + int i; + + /* + * The EP can change state between read and write operations from VALID + * to NAK and result of set operation will be invalid. + */ + for (i = 0; i < 2; i++) + { + if (ep_ctrl_get_stat_tx(reg) == val) + return; + state = val; + state <<= 4; + state ^= *reg; + state |= USB_CTRL_CLEAR_ONLY_MASK; + /* Clear the toggle bits without STAT_TX (4,5) */ + state &= ~0x7040; + *reg = state; + } +} + +/* Set EP DTOG_TX bit (IN) */ +static void ep_ctrl_set_dtog_tx(reg32_t *reg, uint32_t val) +{ + val = val ? (*reg ^ (1UL << 6)) : *reg; + /* Clear the toggle bits without DTOG_TX (6) */ + val &= ~0x7030; + val |= USB_CTRL_CLEAR_ONLY_MASK; + *reg = val; +} + +/* Clear EP CTR_TX bit (IN) */ +static void ep_ctrl_clr_ctr_tx(reg32_t *reg) +{ + uint32_t val = *reg; + + val &= ~(USB_CTRL_TOGGLE_MASK | 1UL << 7); + /* Set RX_CTR */ + val |= 1UL << 15; + *reg = val; +} + +/* Clear EP CTR_RX bit (OUT) */ +static void ep_ctrl_clr_ctr_rx(reg32_t *reg) +{ + uint32_t val = *reg; + val &= ~(USB_CTRL_TOGGLE_MASK | 1UL << 15); + /* Set TX_CTR */ + val |= 1UL << 7; + *reg = val; +} + +/* Set EP KIND bit */ +static void ep_ctrl_set_ep_kind(reg32_t *reg, uint32_t val) +{ + val = val ? (1UL << 8) : 0; + val |= *reg & ~(USB_CTRL_TOGGLE_MASK | (1UL << 8)); + val |= USB_CTRL_CLEAR_ONLY_MASK; + *reg = val; +} + +/* Set EP type */ +static int ep_ctrl_set_ep_type(reg32_t *reg, uint8_t val) +{ + uint32_t type; + + if (UNLIKELY(val >= EP_TYPE_MAX)) + { + ASSERT(0); + return USB_INVAL_ERROR; + } + type = val; + type <<= 9; + type |= *reg & ~(USB_CTRL_TOGGLE_MASK | (0x3UL << 9)); + type |= USB_CTRL_CLEAR_ONLY_MASK; + *reg = type; + + return USB_OK; +} + +/* Get EP STAT_RX (OUT) */ +static uint32_t ep_ctrl_get_stat_rx(reg32_t *reg) +{ + uint32_t val = *reg & (0x3UL << 12); + return val >> 12; +} + +/* Set EP STAT_RX (OUT) */ +static void ep_ctrl_set_stat_rx(reg32_t *reg, stm32_UsbEpState val) +{ + uint32_t state; + int i; + + /* + * The EP can change state between read and write operations from VALID + * to NAK and result of set operation will be invalid. + */ + for (i = 0; i < 2; i++) + { + if (ep_ctrl_get_stat_rx(reg) == val) + return; + state = val; + state <<= 12; + state ^= *reg; + state |= USB_CTRL_CLEAR_ONLY_MASK; + /* Clear the toggle bits without STAT_RX (12,13) */ + state &= ~0x4070; + *reg = state; + } +} + +/* Set DTOG_RX bit */ +static void ep_ctrl_set_dtog_rx(reg32_t *reg, uint32_t val) +{ + val = val ? (*reg ^ (1UL << 14)) : *reg; + /* Clear the toggle bits without DTOG_RX (14) */ + val &= ~0x3070; + val |= USB_CTRL_CLEAR_ONLY_MASK; + *reg = val; +} + +/* Get EP SETUP bit */ +static uint32_t ep_ctrl_get_setup(reg32_t *reg) +{ + uint32_t val = *reg & (1UL << 11); + return val ? 1 : 0; +} + +/* Core endpoint I/O function */ +static void __usb_ep_io(int EP) +{ + ssize_t Count, CountHold, Offset; + uint32_t *pDst, *pSrc, Data; + stm32_UsbEp *epd = &ep_cnfg[EP]; + + if (UNLIKELY(epd->hw == NULL)) + { + LOG_ERR("%s: invalid endpoint (EP%d-%s)\n", + __func__, + EP >> 1, + (EP & 0x01) ? "IN" : "OUT"); + ASSERT(0); + return; + } + if (epd->status != BEGIN_SERVICED && epd->status != NO_SERVICED) + return; + + if (EP & 0x01) + { + /* EP IN */ + Count = epd->size - epd->offset; + while (epd->avail_data) + { + if (!Count && !(epd->flags & STM32_USB_EP_ZERO_PACKET)) + break; + + /* Set Status */ + epd->status = BEGIN_SERVICED; + /* Get data size */ + if ((epd->flags & STM32_USB_EP_ZERO_PACKET) && + (Count == epd->max_size)) + epd->flags |= STM32_USB_EP_ZERO_PACKET | + STM32_USB_EP_ZERO_POSSIBLE; + + CountHold = Count = MIN(Count, epd->max_size); + if (!Count) + epd->flags |= STM32_USB_EP_ZERO_PACKET; + Offset = epd->offset; + epd->offset += Count; + switch (epd->type) + { + case USB_ENDPOINT_XFER_CONTROL: + case USB_ENDPOINT_XFER_INT: + pDst = (uint32_t *)USB_MEM_ADDR(EP_DTB_READ(EP >> 1, ADDR_TX_OFFSET)); + break; + case USB_ENDPOINT_XFER_BULK: + pDst = (uint32_t *)USB_MEM_ADDR(EP_DTB_READ(EP >> 1, ADDR_TX_OFFSET)); + break; + case USB_ENDPOINT_XFER_ISOC: + LOG_ERR("%s: isochronous transfer not supported\n", + __func__); + /* Fallback to default */ + default: + ASSERT(0); + return; + } + + /* Write data to packet memory buffer */ + while (Count) + { + Data = *(epd->write_buffer + Offset++); + if (--Count) + { + Data |= (uint32_t)(*(epd->write_buffer + Offset++)) << 8; + --Count; + } + *pDst++ = Data; + } + + EP_DTB_WRITE(EP >> 1, COUNT_TX_OFFSET, CountHold); + ep_ctrl_set_stat_tx(epd->hw, EP_VALID); + + --ep_cnfg[EP].avail_data; + Count = epd->size - epd->offset; + } + if (!Count && !(epd->flags & STM32_USB_EP_ZERO_PACKET)) + { + epd->status = COMPLETE; + /* call callback function */ + if (epd->complete) + epd->complete(EP); + } + } + else + { + /* EP OUT */ + while (epd->avail_data) + { + /* Get data size and buffer pointer */ + switch (epd->type) + { + case USB_ENDPOINT_XFER_CONTROL: + case USB_ENDPOINT_XFER_INT: + /* Get received bytes number */ + Count = EP_DTB_READ(EP >> 1, COUNT_RX_OFFSET) & 0x3FF; + /* Get address of the USB packet buffer for corresponding EP */ + pSrc = (uint32_t *)USB_MEM_ADDR(EP_DTB_READ(EP >> 1, ADDR_RX_OFFSET)); + break; + case USB_ENDPOINT_XFER_BULK: + /* Get received bytes number */ + Count = EP_DTB_READ(EP >> 1, COUNT_RX_OFFSET) & 0x3FF; + /* Get address of the USB packet buffer for corresponding EP */ + pSrc = (uint32_t *)USB_MEM_ADDR(EP_DTB_READ(EP >> 1, ADDR_RX_OFFSET)); + break; + case USB_ENDPOINT_XFER_ISOC: + LOG_ERR("%s: isochronous transfer not supported\n", + __func__); + /* Fallback to default */ + default: + ASSERT(0); + return; + } + + if (Count > (epd->size - epd->offset)) + { + epd->status = BUFFER_OVERRUN; + epd->size = ep_cnfg[EP].offset; + break; + } + else if (Count < ep_cnfg[EP].max_size) + { + epd->status = BUFFER_UNDERRUN; + epd->size = ep_cnfg[EP].offset + Count; + } + else + epd->status = BEGIN_SERVICED; + + Offset = epd->offset; + epd->offset += Count; + + /* Read data from packet memory buffer */ + while (Count) + { + Data = *pSrc++; + *(epd->read_buffer + Offset++) = Data; + if (--Count) + { + Data >>= 8; + *(epd->read_buffer + Offset++) = Data; + --Count; + } + } + + ep_ctrl_set_stat_rx(epd->hw, EP_VALID); + + --ep_cnfg[EP].avail_data; + + if (*epd->hw & (1UL << 11)) + { + ep_cnfg[EP].status = SETUP_OVERWRITE; + return; + } + if (!(Count = (epd->size - epd->offset))) + { + epd->status = COMPLETE; + break; + } + } + if (epd->status != BEGIN_SERVICED && epd->status != NO_SERVICED) + { + /* call callback function */ + if (epd->complete) + epd->complete(EP); + } + } +} + +/* + * Return the lower value from Host expected size and size and set a flag + * STM32_USB_EP_ZERO_POSSIBLE when size is lower that host expected size. + */ +static size_t usb_size(size_t size, size_t host_size) +{ + if (size < host_size) + { + ep_cnfg[CTRL_ENP_IN].flags |= STM32_USB_EP_ZERO_POSSIBLE; + return size; + } + return host_size; +} + +/* Configure an EP descriptor before performing a I/O operation */ +#define USB_EP_IO(__EP, __op, __buf, __size, __complete) \ +({ \ + cpu_flags_t flags; \ + stm32_UsbIoStatus ret; \ + \ + /* Fill EP descriptor */ \ + IRQ_SAVE_DISABLE(flags); \ + if (__size < 0) \ + { \ + ep_cnfg[__EP].status = NOT_READY; \ + ep_cnfg[__EP].complete = NULL; \ + ret = NOT_READY; \ + goto out; \ + } \ + if (ep_cnfg[__EP].status == BEGIN_SERVICED) \ + { \ + ret = NOT_READY; \ + goto out; \ + } \ + /* \ + * NOTE: the write_buffer and read_buffer are actually the \ + * same location in memory (it's a union). \ + * \ + * We have to do this trick to silent a build warning by \ + * casting the I/O buffer to (void *) or (const void *). \ + */ \ + ep_cnfg[__EP].__op ## _buffer = __buf; \ + ep_cnfg[__EP].offset = 0; \ + ep_cnfg[__EP].size = __size; \ + ep_cnfg[__EP].complete = __complete; \ + if (!size) \ + ep_cnfg[__EP].flags = STM32_USB_EP_ZERO_PACKET; \ + else \ + ep_cnfg[__EP].flags = 0; \ + ep_cnfg[__EP].status = NO_SERVICED; \ + \ + /* Perform the I/O operation */ \ + __usb_ep_io(__EP); \ + \ + ret = ep_cnfg[__EP].status; \ +out: \ + IRQ_RESTORE(flags); \ + ret; \ +}) + +/* Configure and endponint and perform a read operation */ +static stm32_UsbIoStatus +__usb_ep_read(int ep, void *buffer, ssize_t size, void (*complete)(int)) +{ + if (UNLIKELY((ep >= EP_MAX_NUM) || (ep & 0x01))) + { + LOG_ERR("%s: invalid EP number %d\n", __func__, ep); + ASSERT(0); + return STALLED; + } + if (UNLIKELY((size_t)buffer & 0x03)) + { + LOG_ERR("%s: unaligned buffer @ %p\n", __func__, buffer); + ASSERT(0); + return STALLED; + } + return USB_EP_IO(ep, read, buffer, size, complete); +} + +/* Configure and endponint and perform a write operation */ +static stm32_UsbIoStatus +__usb_ep_write(int ep, const void *buffer, ssize_t size, void (*complete)(int)) +{ + if (UNLIKELY((ep >= EP_MAX_NUM) || !(ep & 0x01))) + { + LOG_ERR("%s: invalid EP number %d\n", __func__, ep); + ASSERT(0); + return STALLED; + } + if (UNLIKELY((size_t)buffer & 0x03)) + { + LOG_ERR("%s: unaligned buffer @ %p\n", __func__, buffer); + ASSERT(0); + return STALLED; + } + return USB_EP_IO(ep, write, buffer, size, complete); +} + +static void usb_ep_low_level_config(int ep, uint16_t offset, uint16_t size) +{ + stm32_UsbEp *epc = &ep_cnfg[ep]; + + /* IN EP */ + if (ep & 0x01) + { + /* Disable EP */ + ep_ctrl_set_stat_tx(epc->hw, EP_DISABLED); + /* Clear Tx toggle */ + ep_ctrl_set_dtog_tx(epc->hw, 0); + /* Clear Correct Transfer for transmission flag */ + ep_ctrl_clr_ctr_tx(epc->hw); + + /* Update EP description table */ + EP_DTB_WRITE(ep >> 1, ADDR_TX_OFFSET, offset); + EP_DTB_WRITE(ep >> 1, COUNT_TX_OFFSET, 0); + } + /* OUT EP */ + else + { + uint16_t rx_count = 0; + + /* Disable EP */ + ep_ctrl_set_stat_rx(epc->hw, EP_DISABLED); + /* Clear Rx toggle */ + ep_ctrl_set_dtog_rx(epc->hw, 0); + /* Clear Correct Transfer for reception flag */ + ep_ctrl_clr_ctr_rx(epc->hw); + /* Descriptor block size field */ + rx_count |= (size > 62) << 15; + /* Descriptor number of blocks field */ + rx_count |= (((size > 62) ? (size >> 5) - 1 : size >> 1) & + 0x1f) << 10; + /* Update EP description table */ + EP_DTB_WRITE(ep >> 1, ADDR_RX_OFFSET, offset); + EP_DTB_WRITE(ep >> 1, COUNT_RX_OFFSET, rx_count); + } +} + +/* Enable/Disable an endpoint */ +static int usb_ep_configure(const UsbEndpointDesc *epd, bool enable) +{ + int EP; + stm32_UsbEp *ep_hw; + reg32_t *hw; + uint16_t Offset; + uint32_t size; + + EP = usb_ep_logical_to_hw(epd->bEndpointAddress); + ep_hw = &ep_cnfg[EP]; + + if (enable) + { + /* + * Allocate packet memory for EP buffer/s calculate actual size + * only for the OUT EPs. + */ + size = epd->wMaxPacketSize; + if (!usb_alloc_buffer(&Offset, &size, EP)) + return -USB_MEMORY_FULL; + + /* Set EP status */ + ep_hw->status = NOT_READY; + /* Init EP flags */ + ep_hw->flags = 0; + + /* Set endpoint type */ + ep_hw->type = usb_endpointType(epd); + /* Init EP max packet size */ + ep_hw->max_size = epd->wMaxPacketSize; + + if (EP & 0x01) + ep_hw->avail_data = 1; + else + ep_hw->avail_data = 0; + hw = (reg32_t *)&usb->EP0R; + hw += EP >> 1; + + /* Set Ep Address */ + ep_ctrl_set_ea(hw, EP >> 1); + ep_hw->hw = hw; + LOG_INFO("%s: EP%d-%s configured\n", + __func__, EP >> 1, EP & 1 ? "IN" : "OUT"); + + /* Low-level endpoint configuration */ + usb_ep_low_level_config(EP, Offset, size); + + /* Set EP Kind & enable */ + switch (ep_hw->type) + { + case USB_ENDPOINT_XFER_CONTROL: + LOG_INFO("EP%d: CONTROL %s\n", EP >> 1, + EP & 1 ? "IN" : "OUT"); + ep_ctrl_set_ep_type(hw, EP_CTRL); + ep_ctrl_set_ep_kind(hw, 0); + break; + case USB_ENDPOINT_XFER_INT: + LOG_INFO("EP%d: INTERRUPT %s\n", EP >> 1, + EP & 1 ? "IN" : "OUT"); + ep_ctrl_set_ep_type(hw, EP_INTERRUPT); + ep_ctrl_set_ep_kind(hw, 0); + break; + case USB_ENDPOINT_XFER_BULK: + LOG_INFO("EP%d: BULK %s\n", EP >> 1, + EP & 1 ? "IN" : "OUT"); + ep_ctrl_set_ep_type(hw, EP_BULK); + ep_ctrl_set_ep_kind(hw, 0); + break; + case USB_ENDPOINT_XFER_ISOC: + LOG_ERR("EP%d: ISOCHRONOUS %s: not supported\n", + EP >> 1, + EP & 1 ? "IN" : "OUT"); + /* Fallback to default */ + default: + ASSERT(0); + return -USB_NODEV_ERROR; + } + if (EP & 0x01) + { + /* Enable EP */ + ep_ctrl_set_stat_tx(hw, EP_NAK); + /* Clear Correct Transfer for transmission flag */ + ep_ctrl_clr_ctr_tx(hw); + } + else + { + /* Enable EP */ + ep_ctrl_set_stat_rx(hw, EP_VALID); + } + } + else if (ep_cnfg[EP].hw) + { + hw = (reg32_t *)&usb->EP0R; + hw += EP >> 1; + + /* IN EP */ + if (EP & 0x01) + { + /* Disable IN EP */ + ep_ctrl_set_stat_tx(hw, EP_DISABLED); + /* Clear Correct Transfer for reception flag */ + ep_ctrl_clr_ctr_tx(hw); + } + /* OUT EP */ + else + { + /* Disable OUT EP */ + ep_ctrl_set_stat_rx(hw, EP_DISABLED); + /* Clear Correct Transfer for reception flag */ + ep_ctrl_clr_ctr_rx(hw); + } + /* Release buffer */ + usb_free_buffer(EP); + ep_cnfg[EP].hw = NULL; + } + return 0; +} + +/* Get EP stall/unstall */ +static int usb_ep_get_stall(int EP, bool *pStall) +{ + if (ep_cnfg[EP].hw == NULL) + return -USB_NODEV_ERROR; + + *pStall = (EP & 0x01) ? + (ep_ctrl_get_stat_tx(ep_cnfg[EP].hw) == EP_STALL): /* IN EP */ + (ep_ctrl_get_stat_rx(ep_cnfg[EP].hw) == EP_STALL); /* OUT EP */ + + return USB_OK; +} + +/* Set EP stall/unstall */ +static int usb_ep_set_stall(int EP, bool Stall) +{ + if (ep_cnfg[EP].hw == NULL) + return -USB_NODEV_ERROR; + + if (Stall) + { + ep_cnfg[EP].status = STALLED; + if (EP & 0x01) + { + /* IN EP */ + ep_ctrl_set_stat_tx(ep_cnfg[EP].hw, EP_STALL); + ep_cnfg[EP].avail_data = 1; + } + else + { + /* OUT EP */ + ep_ctrl_set_stat_rx(ep_cnfg[EP].hw, EP_STALL); + ep_cnfg[EP].avail_data = 0; + } + } + else + { + ep_cnfg[EP].status = NOT_READY; + if(EP & 0x01) + { + /* IN EP */ + ep_cnfg[EP].avail_data = 1; + /* reset Data Toggle bit */ + ep_ctrl_set_dtog_tx(ep_cnfg[EP].hw, 0); + ep_ctrl_set_stat_tx(ep_cnfg[EP].hw, EP_NAK); + } + else + { + /* OUT EP */ + ep_cnfg[EP].avail_data = 0; + /* reset Data Toggle bit */ + ep_ctrl_set_dtog_rx(ep_cnfg[EP].hw, 0); + ep_ctrl_set_stat_rx(ep_cnfg[EP].hw, EP_VALID); + } + } + return USB_OK; +} + +/* Stall both directions of the control EP */ +static void usb_ep_set_stall_ctrl(void) +{ + ep_cnfg[CTRL_ENP_IN].avail_data = 1; + ep_cnfg[CTRL_ENP_IN].status = STALLED; + ep_cnfg[CTRL_ENP_OUT].avail_data = 0; + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + + usb_ep_set_stall(CTRL_ENP_IN, true); + usb_ep_set_stall(CTRL_ENP_OUT, true); +} + +/* + * Find the position of an interface descriptor inside the configuration + * descriptor. + */ +static int usb_find_interface(uint32_t num, uint32_t alt) +{ + const UsbInterfaceDesc *id; + int i; + + for (i = 0; ; i++) + { + /* TODO: support more than one configuration per device */ + id = (const UsbInterfaceDesc *)usb_dev->config[i]; + if (id == NULL) + break; + if (id->bDescriptorType != USB_DT_INTERFACE) + continue; + if ((id->bInterfaceNumber == num) && + (id->bAlternateSetting == alt)) + return i; + } + return -USB_NODEV_ERROR; +} + +/* + * Configure/deconfigure EPs of a certain interface. + */ +static void +usb_configure_ep_interface(unsigned int num, unsigned int alt, bool enable) +{ + const UsbEndpointDesc *epd; + int i, start; + + /* + * Find the position of the interface descriptor (inside the + * configuration descriptor). + */ + start = usb_find_interface(num, alt); + if (start < 0) + { + LOG_ERR("%s: interface (%u,%u) not found\n", + __func__, num, alt); + return; + } + /* + * Cycle over endpoint descriptors. + * + * NOTE: the first endpoint descriptor is placed next to the interface + * descriptor, so we need to add +1 to the position of the interface + * descriptor to find it. + */ + for (i = start + 1; ; i++) + { + epd = (const UsbEndpointDesc *)usb_dev->config[i]; + if ((epd == NULL) || (epd->bDescriptorType == USB_DT_INTERFACE)) + break; + if (epd->bDescriptorType != USB_DT_ENDPOINT) + continue; + if (UNLIKELY(usb_ep_configure(epd, enable) < 0)) + { + LOG_ERR("%s: out of memory, can't initialize EP\n", + __func__); + return; + } + } +} + +/* Set device state */ +static void usb_set_device_state(int state) +{ + unsigned int i; + + LOG_INFO("%s: new state %d\n", __func__, state); + + if (udc.state == USB_STATE_CONFIGURED) + { + /* Deconfigure device */ + for (i = 0; i < udc.interfaces; ++i) + usb_configure_ep_interface(i, + udc.alt[i], false); + } + switch (state) + { + case USB_STATE_ATTACHED: + case USB_STATE_POWERED: + case USB_STATE_DEFAULT: + usb_set_address(0); + usb_dev->configured = false; + udc.address = udc.cfg_id = 0; + break; + case USB_STATE_ADDRESS: + udc.cfg_id = 0; + break; + case USB_STATE_CONFIGURED: + /* Configure device */ + for (i = 0; i < udc.interfaces; ++i) + usb_configure_ep_interface(i, + udc.alt[i], true); + break; + default: + /* Unknown state: disconnected or connection in progress */ + usb_dev->configured = false; + udc.address = 0; + udc.cfg_id = 0; + break; + } + udc.state = state; +} + +/* Setup packet: set address status phase end handler */ +static void usb_add_status_handler_end(UNUSED_ARG(int, EP)) +{ + uint16_t w_value; + + w_value = usb_le16_to_cpu(setup_packet.wValue); + udc.address = w_value & 0xff; + usb_set_address(udc.address); + + if (udc.address) + usb_set_device_state(USB_STATE_ADDRESS); + else + usb_set_device_state(USB_STATE_DEFAULT); + + __usb_ep_write(CTRL_ENP_IN, NULL, -1, NULL); + __usb_ep_read(CTRL_ENP_OUT, NULL, -1, NULL); +} + +/* Prepare status phase */ +static void usb_status_phase(bool in) +{ + if (in) + __usb_ep_write(CTRL_ENP_IN, NULL, 0, NULL); +} + +/* Setup packet: status phase end handler */ +static void usb_status_handler_end(UNUSED_ARG(int, EP)) +{ + __usb_ep_write(CTRL_ENP_IN, NULL, -1, NULL); + __usb_ep_read(CTRL_ENP_OUT, NULL, -1, NULL); +} + +/* Address status handler */ +static void usb_status_handler(UNUSED_ARG(int, EP)) +{ + if (setup_packet.mRequestType & USB_DIR_IN) + { + usb_status_phase(false); + ep_cnfg[CTRL_ENP_OUT].complete = usb_status_handler_end; + } + else + { + usb_status_phase(true); + ep_cnfg[CTRL_ENP_IN].complete = + (setup_packet.bRequest == USB_REQ_SET_ADDRESS) ? + usb_add_status_handler_end : + usb_status_handler_end; + } +} + +static void usb_endpointRead_complete(int ep) +{ + if (UNLIKELY(ep >= EP_MAX_NUM)) + { + ASSERT(0); + return; + } + ASSERT(!(ep & 0x01)); + + event_do(&usb_event_done[ep >> 1]); + rx_size = ep_cnfg[ep].size; +} + +ssize_t usb_endpointReadTimeout(int ep, void *buffer, ssize_t size, + ticks_t timeout) +{ + int ep_num = usb_ep_logical_to_hw(ep); + ssize_t max_size = sizeof(ep_buffer[ep_num]); + + /* Non-blocking read for EP0 */ + if (in_atomic && (ep_num == CTRL_ENP_OUT)) + { + size = usb_size(size, usb_le16_to_cpu(setup_packet.wLength)); + if (UNLIKELY(size > max_size)) + { + LOG_ERR("%s: ep_buffer exceeded, try to enlarge CONFIG_USB_BUFSIZE\n", + __func__); + ASSERT(0); + return -USB_BUF_OVERFLOW; + } + if (!size) + usb_status_handler(ep_num); + else + { + __usb_ep_read(ep_num, ep_buffer[ep_num], size, + usb_status_handler); + memcpy(buffer, ep_buffer[ep_num], size); + } + return size; + } + if (UNLIKELY(!size)) + return 0; + size = MIN(size, max_size); + event_initGeneric(&usb_event_done[ep_num >> 1]); + rx_size = 0; + + /* Blocking read */ + __usb_ep_read(ep_num, ep_buffer[ep_num], size, + usb_endpointRead_complete); + if (timeout < 0) + event_wait(&usb_event_done[ep_num >> 1]); + else + if (!event_waitTimeout(&usb_event_done[ep_num >> 1], timeout)) + return 0; + memcpy(buffer, ep_buffer[ep_num], rx_size); + + return rx_size; +} + +static void usb_endpointWrite_complete(int ep) +{ + if (UNLIKELY(ep >= EP_MAX_NUM)) + { + ASSERT(0); + return; + } + ASSERT(ep & 0x01); + + event_do(&usb_event_done[ep >> 1]); + tx_size = ep_cnfg[ep].size; +} + +ssize_t usb_endpointWriteTimeout(int ep, const void *buffer, ssize_t size, + ticks_t timeout) +{ + int ep_num = usb_ep_logical_to_hw(ep); + ssize_t max_size = sizeof(ep_buffer[ep_num]); + + /* Non-blocking write for EP0 */ + if (in_atomic && (ep_num == CTRL_ENP_IN)) + { + size = usb_size(size, usb_le16_to_cpu(setup_packet.wLength)); + if (UNLIKELY(size > max_size)) + { + LOG_ERR("%s: ep_buffer exceeded, try to enlarge CONFIG_USB_BUFSIZE\n", + __func__); + ASSERT(0); + return -USB_BUF_OVERFLOW; + } + if (!size) + usb_status_handler(ep_num); + else + { + memcpy(ep_buffer[ep_num], buffer, size); + __usb_ep_write(ep_num, ep_buffer[ep_num], size, + usb_status_handler); + } + return size; + } + if (UNLIKELY(!size)) + return 0; + size = MIN(size, max_size); + event_initGeneric(&usb_event_done[ep_num >> 1]); + tx_size = 0; + + /* Blocking write */ + memcpy(ep_buffer[ep_num], buffer, size); + __usb_ep_write(ep_num, ep_buffer[ep_num], size, + usb_endpointWrite_complete); + if (timeout < 0) + event_wait(&usb_event_done[ep_num >> 1]); + else + if (!event_waitTimeout(&usb_event_done[ep_num >> 1], timeout)) + return 0; + + return tx_size; +} + +/* Global variable to handle the following non-blocking I/O operations */ +static uint32_t InData; + +/* Get device status */ +static int usb_send_device_status(uint16_t index) +{ + if (index) + return -USB_NODEV_ERROR; + + InData = ((uint32_t)udc.feature) & 0xff; + __usb_ep_write(CTRL_ENP_IN, + (uint8_t *)&InData, sizeof(uint16_t), + usb_status_handler); + return 0; +} + +/* Get interface status */ +static int usb_send_interface_status(UNUSED_ARG(uint16_t, index)) +{ + InData = 0; + __usb_ep_write(CTRL_ENP_IN, + (uint8_t *)&InData, sizeof(uint16_t), + usb_status_handler); + return 0; +} + +/* Get endpoint status */ +static int usb_send_ep_status(uint16_t index) +{ + if ((index & 0x7F) > 16) + return -USB_NODEV_ERROR; + + InData = 0; + usb_ep_get_stall(usb_ep_logical_to_hw(index), (bool *)&InData); + __usb_ep_write(CTRL_ENP_IN, + (uint8_t *)&InData, sizeof(uint16_t), + usb_status_handler); + return 0; +} + +/* USB setup packet: GET_STATUS request handler */ +static void usb_get_status_handler(void) +{ + uint16_t w_value = usb_le16_to_cpu(setup_packet.wValue); + uint16_t w_index = usb_le16_to_cpu(setup_packet.wIndex); + uint16_t w_length = usb_le16_to_cpu(setup_packet.wLength); + + /* GET_STATUS sanity checks */ + if (udc.state < USB_STATE_ADDRESS) + { + LOG_WARN("%s: bad GET_STATUS request (State=%02x)\n", + __func__, udc.state); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + return; + } + if (w_length != 2) + { + LOG_WARN("%s: bad GET_STATUS request (wLength.Word=%02x)\n", + __func__, w_length); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + return; + } + if (!(setup_packet.mRequestType & USB_DIR_IN)) + { + LOG_WARN("%s: bad GET_STATUS request (mRequestType=%02x)\n", + __func__, setup_packet.mRequestType); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + return; + } + if (w_value) + { + LOG_WARN("%s: bad GET_STATUS request (wValue=%02x)\n", + __func__, w_value); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + return; + } + + /* Process GET_STATUS request */ + switch (setup_packet.mRequestType & USB_RECIP_MASK) + { + case USB_RECIP_DEVICE: + if (usb_send_device_status(w_index) < 0) + { + LOG_WARN("%s: GET_STATUS: invalid UsbRecipientDevice\n", + __func__); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + return; + } + LOG_INFO("%s: GET_STATUS: mRequestType=%02x (UsbRecipientDevice)\n", + __func__, setup_packet.mRequestType); + break; + case USB_RECIP_INTERFACE: + if (usb_send_interface_status(w_index) < 0) + { + LOG_WARN("%s: GET_STATUS: invalid UsbRecipientInterface\n", + __func__); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + return; + } + LOG_INFO("%s: GET_STATUS: mRequestType=%02x (UsbRecipientInterface)\n", + __func__, setup_packet.mRequestType); + break; + case USB_RECIP_ENDPOINT: + if (usb_send_ep_status(w_index) < 0) + { + LOG_WARN("%s: GET_STATUS: invalid UsbRecipientEndpoint\n", + __func__); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + return; + } + LOG_INFO("%s: GET_STATUS: mRequestType=%02x (UsbRecipientEndpoint)\n", + __func__, setup_packet.mRequestType); + break; + default: + LOG_WARN("%s: GET_STATUS: invalid UsbRecipientEndpoint\n", + __func__); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + break; + } +} + +static int usb_get_device_descriptor(int id) +{ + if (id) + return -USB_NODEV_ERROR; + + usb_dev->device->bMaxPacketSize0 = USB_EP0_MAX_SIZE; + __usb_ep_write(CTRL_ENP_IN, (const uint8_t *)usb_dev->device, + usb_size(usb_dev->device->bLength, + usb_le16_to_cpu(setup_packet.wLength)), + usb_status_handler); + return 0; +} + +/* + * TODO: refactor this part to remove this temporary buffer. + * + * It would be better to define all the USB descriptors in the right order and + * send them as a contiguous buffer directly from the flash / rodata memory. + */ +#define USB_BUFSIZE (128) +static uint8_t usb_cfg_buffer[USB_BUFSIZE]; +STATIC_ASSERT(USB_BUFSIZE < (1 << (sizeof(uint16_t) * 8))); + +static int usb_get_configuration_descriptor(int id) +{ + const UsbConfigDesc **config = + (const UsbConfigDesc **)usb_dev->config; + uint8_t *p = usb_cfg_buffer; + int i; + + /* TODO: support more than one configuration per device */ + if (UNLIKELY(id > 0)) + return -USB_NODEV_ERROR; + + for (i = 0; config[i]; i++) + { + memcpy(p, config[i], config[i]->bLength); + p += config[i]->bLength; + + if (UNLIKELY((p - usb_cfg_buffer) > USB_BUFSIZE)) + { + ASSERT(0); + return -USB_BUF_OVERFLOW; + } + } + ((UsbConfigDesc *)usb_cfg_buffer)->wTotalLength = + usb_cpu_to_le16((uint16_t)(p - usb_cfg_buffer)); + __usb_ep_write(CTRL_ENP_IN, + usb_cfg_buffer, + usb_size(p - usb_cfg_buffer, + usb_le16_to_cpu(setup_packet.wLength)), + usb_status_handler); + return 0; +} + +static int usb_get_string_descriptor(unsigned int id) +{ + const UsbStringDesc *lang_str; + unsigned int lang_id, str_id; + uint16_t w_index_lo = usb_le16_to_cpu(setup_packet.wIndex) & 0x00ff; + uint16_t w_index_hi = (usb_le16_to_cpu(setup_packet.wIndex) & + 0xff00) >> 8; + + ASSERT(usb_dev->strings != NULL); + ASSERT(usb_dev->strings[0] != NULL); + + lang_str = usb_dev->strings[0]; + if (id) + { + /* Find Language index */ + for (lang_id = 0; ; lang_id++) + { + const UsbStringDesc *str = + usb_dev->strings[lang_id]; + if (UNLIKELY(str == NULL)) + return -USB_NODEV_ERROR; + if ((str->data[0] == w_index_lo) && + (str->data[1] == w_index_hi)) + break; + } + /* Check buffer overflow to find string index */ + for (str_id = 0; str_id < id; str_id++) + { + lang_str = usb_dev->strings[lang_id + 1 + str_id]; + if (lang_str == NULL) + return -USB_NODEV_ERROR; + } + } + __usb_ep_write(CTRL_ENP_IN, + lang_str, + usb_size(lang_str->bLength, + usb_le16_to_cpu(setup_packet.wLength)), + usb_status_handler); + return 0; +} + +static void usb_get_descriptor(void) +{ + uint16_t w_value_lo = usb_le16_to_cpu(setup_packet.wValue) & 0x00ff; + uint16_t w_value_hi = (usb_le16_to_cpu(setup_packet.wValue) & 0xff00) >> 8; + + if (udc.state < USB_STATE_DEFAULT) + { + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + return; + } + switch (w_value_hi) + { + case USB_DT_DEVICE: + LOG_INFO("%s: GET_DEVICE_DESCRIPTOR: id=%d, state=%d\n", + __func__, + w_value_lo, + udc.state); + if (usb_get_device_descriptor(w_value_lo) < 0) + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + break; + case USB_DT_CONFIG: + LOG_INFO("%s: GET_CONFIG_DESCRIPTOR: id=%d, state=%d\n", + __func__, w_value_lo, udc.state); + if (usb_get_configuration_descriptor(w_value_lo) < 0) + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + break; + case USB_DT_STRING: + LOG_INFO("%s: GET_STRING_DESCRIPTOR: id=%d, state=%d\n", + __func__, w_value_lo, udc.state); + if (usb_get_string_descriptor(w_value_lo) < 0) + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + break; + default: + LOG_WARN("%s: GET_UNKNOWN_DESCRIPTOR: id=%d, state=%d\n", + __func__, w_value_lo, udc.state); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + break; + } +} + +/* USB setup packet: class/vendor request handler */ +static void usb_event_handler(UsbDevice *dev) +{ + /* + * TODO: get the appropriate usb_dev in function of the endpoint + * address. + */ + if (dev->event_cb) + dev->event_cb(&setup_packet); +} + +/* USB setup packet: GET_DESCRIPTOR handler */ +static void usb_get_descriptor_handler(void) +{ + LOG_INFO("%s: GET_DESCRIPTOR: RECIP = %d\n", + __func__, + setup_packet.mRequestType & USB_RECIP_MASK); + if ((setup_packet.mRequestType & USB_RECIP_MASK) == + USB_RECIP_DEVICE) + usb_get_descriptor(); + else + usb_event_handler(usb_dev); +} + +/* USB setup packet: SET_ADDRESS handler */ +static void usb_set_address_handler(void) +{ + uint16_t w_value = usb_le16_to_cpu(setup_packet.wValue); + uint16_t w_index = usb_le16_to_cpu(setup_packet.wIndex); + uint16_t w_length = usb_le16_to_cpu(setup_packet.wLength); + + LOG_INFO("%s: SET_ADDRESS: %d\n", + __func__, usb_le16_to_cpu(setup_packet.wValue)); + if ((udc.state >= USB_STATE_DEFAULT) && + ((setup_packet.mRequestType & USB_RECIP_MASK) == + USB_RECIP_DEVICE) && + (w_index == 0) && (w_length == 0) && (w_value < 128)) + usb_status_handler(CTRL_ENP_IN); + else + ep_cnfg[CTRL_ENP_OUT].status = STALLED; +} + +/* USB setup packet: GET_CONFIGURATION handler */ +static void usb_get_config_handler(void) +{ + uint16_t w_value = usb_le16_to_cpu(setup_packet.wValue); + uint16_t w_index = usb_le16_to_cpu(setup_packet.wIndex); + + LOG_INFO("%s: GET_CONFIGURATION\n", __func__); + if ((udc.state >= USB_STATE_ADDRESS) && + (w_value == 0) && (w_index == 0) && (w_value == 1)) + { + InData = udc.cfg_id; + __usb_ep_write(CTRL_ENP_IN, (uint8_t *)&InData, 1, usb_status_handler); + } + else + ep_cnfg[CTRL_ENP_OUT].status = STALLED; +} + +static const UsbConfigDesc *usb_find_configuration(int num) +{ + const UsbConfigDesc *cfg; + int i; + + for (i = 0; ; i++) + { + cfg = (const UsbConfigDesc *)usb_dev->config[i]; + if (cfg == NULL) + break; + if (cfg->bDescriptorType != USB_DT_CONFIG) + continue; + if (cfg->bConfigurationValue == num) + return cfg; + } + return NULL; +} + +static int usb_set_config_state(uint32_t conf) +{ + const UsbConfigDesc *pCnfg; + unsigned int i; + + if (conf) + { + /* Find configuration descriptor */ + pCnfg = usb_find_configuration(conf); + if (pCnfg == NULL) + return -USB_NODEV_ERROR; + + /* Reset current configuration */ + usb_set_device_state(USB_STATE_ADDRESS); + usb_dev->configured = false; + udc.cfg = pCnfg; + + /* Set Interface and Alternative Setting */ + udc.cfg_id = conf; + /* Set self-powered state */ + if (pCnfg->bmAttributes & USB_CONFIG_ATT_SELFPOWER) + udc.feature |= STM32_UDC_FEATURE_SELFPOWERED; + + /* Configure all existing interfaces to alternative setting 0 */ + ASSERT(pCnfg->bNumInterfaces <= USB_MAX_INTERFACE); + udc.interfaces = pCnfg->bNumInterfaces; + for (i = 0; i < udc.interfaces; i++) + udc.alt[i] = 0; + usb_set_device_state(USB_STATE_CONFIGURED); + usb_dev->configured = true; + event_do(&usb_event_done[0]); + LOG_INFO("%s: device configured\n", __func__); + } + else + { + usb_dev->configured = false; + usb_set_device_state(USB_STATE_ADDRESS); + } + return 0; +} + +/* USB setup packet: SET_CONFIGURATION handler */ +static void usb_set_config_handler(void) +{ + uint16_t w_value = usb_le16_to_cpu(setup_packet.wValue); + uint16_t w_index = usb_le16_to_cpu(setup_packet.wIndex); + uint16_t w_length = usb_le16_to_cpu(setup_packet.wLength); + + LOG_INFO("%s: SET_CONFIGURATION: %d\n", + __func__, w_value); + if ((udc.state >= USB_STATE_ADDRESS) && + (w_index == 0) && (w_length == 0) && + (usb_set_config_state(w_value & 0xff) == 0)) + usb_status_handler(CTRL_ENP_OUT); + else + ep_cnfg[CTRL_ENP_OUT].status = STALLED; +} + +/* USB setup packet: standard request handler */ +static void usb_standard_request_handler(void) +{ + switch (setup_packet.bRequest) + { + case USB_REQ_GET_STATUS: + usb_get_status_handler(); + break; + case USB_REQ_CLEAR_FEATURE: + LOG_INFO("%s: bRequest=%d (CLEAR_FEATURE)\n", + __func__, setup_packet.bRequest); + break; + case USB_REQ_SET_FEATURE: + LOG_INFO("%s: bRequest=%d (SET_FEATURE)\n", + __func__, setup_packet.bRequest); + break; + case USB_REQ_SET_ADDRESS: + usb_set_address_handler(); + break; + case USB_REQ_GET_DESCRIPTOR: + usb_get_descriptor_handler(); + break; + case USB_REQ_SET_DESCRIPTOR: + LOG_INFO("%s: bRequest=%d (SET_DESCRIPTOR)\n", + __func__, setup_packet.bRequest); + break; + case USB_REQ_GET_CONFIGURATION: + usb_get_config_handler(); + break; + case USB_REQ_SET_CONFIGURATION: + usb_set_config_handler(); + break; + case USB_REQ_GET_INTERFACE: + LOG_INFO("%s: bRequest=%d (GET_INTERFACE)\n", + __func__, setup_packet.bRequest); + break; + case USB_REQ_SET_INTERFACE: + LOG_INFO("%s: bRequest=%d (SET_INTERFACE)\n", + __func__, setup_packet.bRequest); + break; + case USB_REQ_SYNCH_FRAME: + LOG_INFO("%s: bRequest=%d (SYNCH_FRAME)\n", + __func__, setup_packet.bRequest); + break; + default: + LOG_WARN("%s: bRequest=%d (Unknown)\n", + __func__, setup_packet.bRequest); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + break; + } +} + +/* USB setup packet handler */ +static void usb_setup_handler(void) +{ + switch (setup_packet.mRequestType & USB_TYPE_MASK) + { + /* Standard */ + case USB_TYPE_STANDARD: + LOG_INFO("%s: bmRequestType=%02x (Standard)\n", + __func__, setup_packet.mRequestType); + usb_standard_request_handler(); + break; + /* Class */ + case USB_TYPE_CLASS: + LOG_INFO("%s: bmRequestType=%02x (Class)\n", + __func__, setup_packet.mRequestType); + usb_event_handler(usb_dev); + break; + /* Vendor */ + case USB_TYPE_VENDOR: + LOG_INFO("%s: bmRequestType=%02x (Vendor)\n", + __func__, setup_packet.mRequestType); + usb_event_handler(usb_dev); + break; + case USB_TYPE_RESERVED: + LOG_INFO("%s: bmRequestType=%02x (Reserved)\n", + __func__, setup_packet.mRequestType); + break; + /* Other */ + default: + LOG_WARN("%s: bmRequestType=%02x (Unknown)\n", + __func__, setup_packet.mRequestType); + ep_cnfg[CTRL_ENP_OUT].status = STALLED; + break; + } +} + +/* USB: low-level hardware initialization */ +static void usb_hw_reset(void) +{ + unsigned int i; + int ret; + + /* Initialize endpoint descriptors */ + for (i = 0; i < countof(ep_cnfg); i++) + ep_cnfg[i].hw = NULL; + + /* Initialize USB memory */ + for (i = 0; i < countof(memory_buffer); i++) + memory_buffer[i].Size = 0; + usb->BTABLE = USB_BDT_OFFSET; + mem_use = NULL; + + /* Endpoint initialization */ + ret = usb_ep_configure(&USB_CtrlEpDescr0, true); + if (UNLIKELY(ret < 0)) + { + LOG_WARN("%s: out of memory, cannot initialize EP0\n", + __func__); + return; + } + ret = usb_ep_configure(&USB_CtrlEpDescr1, true); + if (UNLIKELY(ret < 0)) + { + LOG_WARN("%s: out of memory, cannot initialize EP1\n", + __func__); + return; + } + + /* Set default address */ + usb_set_address(0); + + /* Enable all the device interrupts */ + usb->CNTR = bmCTRM | bmRESETM | bmSOFM | bmERRM | bmPMAOVRM | + bmSUSPM | bmWKUPM; +} + +/* Handle a correct transfer under ISR */ +static void usb_isr_correct_transfer(stm32_usb_irq_status_t interrupt) +{ + int EP; + reg32_t *pReg = (reg32_t *)&usb->EP0R; + + /* Find corresponding EP */ + pReg += interrupt.EP_ID; + EP = (int)(((*pReg & 0x0f) << 1) + (interrupt.DIR ? 0 : 1)); + ep_cnfg[EP].avail_data = 1; + + ASSERT(ep_cnfg[EP].hw); + /* IN EP */ + if (EP & 0x01) + ep_ctrl_clr_ctr_tx(ep_cnfg[EP].hw); + else + ep_ctrl_clr_ctr_rx(ep_cnfg[EP].hw); + if (EP == CTRL_ENP_OUT) + { + /* Determinate type of packet (only for control EP) */ + bool SetupPacket = ep_ctrl_get_setup(ep_cnfg[CTRL_ENP_OUT].hw); + + if (SetupPacket) + { + ep_cnfg[CTRL_ENP_IN].avail_data = 1; + /* init IO to receive Setup packet */ + __usb_ep_write(CTRL_ENP_IN, NULL, -1, NULL); + __usb_ep_read(CTRL_ENP_OUT, &setup_packet, + sizeof(setup_packet), NULL); + + /* reset EP IO ctrl */ + if (setup_packet.mRequestType & USB_DIR_IN) + usb_status_handler(CTRL_ENP_OUT); + usb_setup_handler(); + if (ep_cnfg[CTRL_ENP_OUT].status == STALLED) + usb_ep_set_stall_ctrl(); + } + else + { + if (ep_cnfg[CTRL_ENP_OUT].complete && + setup_packet.mRequestType & USB_DIR_IN) + ep_cnfg[CTRL_ENP_OUT].complete(CTRL_ENP_OUT); + else + __usb_ep_io(EP); + } + } + else if (EP == CTRL_ENP_IN) + { + if (ep_cnfg[CTRL_ENP_IN].complete && + !(setup_packet.mRequestType & USB_DIR_IN)) + ep_cnfg[CTRL_ENP_IN].complete(CTRL_ENP_IN); + else + __usb_ep_io(EP); + + } + else + __usb_ep_io(EP); +} + +/* USB: interrupt service routine */ +static void usb_isr(void) +{ + stm32_usb_irq_status_t interrupt; + + /* Get masked interrupt flags */ + interrupt.status = usb->ISTR; + interrupt.status &= usb->CNTR | 0x1f; + + /* Set the context as atomic */ + in_atomic = true; + + if (interrupt.PMAOVR) + { + LOG_WARN("%s: DMA overrun / underrun\n", __func__); + usb->ISTR = ~bmPMAOVRM; + } + if (interrupt.ERR) + { + LOG_WARN("%s: engine error\n", __func__); + usb->ISTR = ~bmERRM; + } + if (interrupt.RESET) + { + LOG_INFO("%s: device reset\n", __func__); + usb->ISTR = ~bmRESETM; + usb_hw_reset(); + usb_set_device_state(USB_STATE_DEFAULT); + } + if (interrupt.SOF) + { +#if 0 + /* + * XXX: disable logging of frame interrupts (too much noise!) + */ + uint16_t frame_nr = usb->FNR & 0x0fff; + LOG_INFO("%s: frame %#x\n", __func__, frame_nr); +#endif + usb->ISTR = ~bmSOFM; + } + if (interrupt.WKUP) + { + LOG_INFO("%s: wake-up\n", __func__); + usb->ISTR = ~(bmSUSPM | bmWKUPM); + usb_resume(); + } + if (interrupt.SUSP) + { + LOG_INFO("%s: suspend\n", __func__); + usb_suspend(); + usb->ISTR = ~(bmSUSPM | bmWKUPM); + } + if (interrupt.ESOF) + { + LOG_INFO("%s: expected frame\n", __func__); + usb->ISTR = ~bmESOFM; + } + if (interrupt.CTR) + { + usb_isr_correct_transfer(interrupt); + } + in_atomic = false; +} + +/* USB: hardware initialization */ +static void usb_hw_init(void) +{ + /* Enable clocking on the required GPIO pins */ + RCC->APB2ENR |= RCC_APB2_GPIOA | RCC_APB2_GPIOC; + + /* Make sure that the CAN controller is disabled and held in reset */ + RCC->APB1ENR &= ~RCC_APB1_CAN; + + /* Configure USB_DM and USB_DP to work as USB lines */ + stm32_gpioPinConfig((struct stm32_gpio *)GPIOA_BASE, + USB_DM_PIN | USB_DP_PIN, + GPIO_MODE_AF_PP, GPIO_SPEED_50MHZ); + /* Configure USB_DISC to work as USB disconnect */ + stm32_gpioPinConfig((struct stm32_gpio *)GPIOC_BASE, + USB_DISC_PIN, + GPIO_MODE_OUT_PP, GPIO_SPEED_50MHZ); + stm32_gpioPinWrite((struct stm32_gpio *)GPIOC_BASE, + USB_DISC_PIN, 1); + + /* Ensure the USB clock is disabled before setting the prescaler */ + RCC->APB1ENR &= ~RCC_APB1_USB; + + /* Configure USB clock (48MHz) */ + *CFGR_USBPRE_BB &= ~RCC_USBCLK_PLLCLK_1DIV5; + + /* Activate USB clock */ + RCC->APB1ENR |= RCC_APB1_USB; + + /* Force USB reset and disable USB interrupts */ + usb->CNTR = bmFRES; + timer_delayHp(1); + + /* Issue a USB reset */ + usb_hw_reset(); + + /* Clear spurious pending interrupt */ + usb->ISTR = 0; + + /* Register interrupt handler */ + sysirq_setHandler(USB_LP_CAN_RX0_IRQHANDLER, usb_isr); + + /* Software connection enable */ + usb_connect(); +} + +/* Initialize the USB controller */ +static void usb_init(void) +{ + udc.state = USB_STATE_NOTATTACHED; + udc.feature = 0; + + usb_hw_init(); +} + +/* Register an upper layer USB device into the driver */ +int usb_deviceRegister(UsbDevice *dev) +{ +#if CONFIG_KERN + MOD_CHECK(proc); +#endif + usb_dev = dev; + usb_dev->configured = false; + + event_initGeneric(&usb_event_done[0]); + usb_init(); + event_wait(&usb_event_done[0]); + + return 0; +} diff --git a/bertos/cpu/cortex-m3/drv/usb_stm32.h b/bertos/cpu/cortex-m3/drv/usb_stm32.h new file mode 100644 index 0000000..7801e2c --- /dev/null +++ b/bertos/cpu/cortex-m3/drv/usb_stm32.h @@ -0,0 +1,233 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief STM32: USB full-speed device driver + * + * Low-level USB device driver for the STM32 architecture. + */ + +#ifndef USB_STM32_H +#define USB_STM32_H + +#include +#include +#include + +#define USB_BASE_ADDR 0x40005C00 + +#define USB_DM_PIN (1 << 11) +#define USB_DP_PIN (1 << 12) +#define USB_DISC_PIN (1 << 11) + +#define USB_EP0_MAX_SIZE CONFIG_EP0_MAX_SIZE +#define USB_XFER_MAX_SIZE 64 + +#define EP_MAX_SLOTS USB_EP_MAX +#define EP_MAX_NUM (EP_MAX_SLOTS << 1) + +/* USB packet memory organization */ +#define USB_PACKET_MEMORY_BASE 0x40006000 +#define USB_PACKET_MEMORY_SIZE 512 + +/* Offset of the buffer descriptor table inside the packet memory */ +#define USB_BDT_OFFSET \ + ((USB_PACKET_MEMORY_SIZE - (sizeof(stm32_UsbBd) * EP_MAX_NUM)) & ~7) + +#define USB_MEM_ADDR(offset) \ + (USB_PACKET_MEMORY_BASE + ((offset << 1) & ~3) + (offset & 1)) + +#define EP_DTB_READ(slot, offset) \ + (*((uint16_t *)(USB_MEM_ADDR((USB_BDT_OFFSET + \ + (slot) * sizeof(stm32_UsbBd) + \ + (offset)))))) + +#define EP_DTB_WRITE(slot, offset, data) (EP_DTB_READ(slot, offset) = data) + +#define ADDR_TX_OFFSET offsetof(stm32_UsbBd, AddrTx) +#define COUNT_TX_OFFSET offsetof(stm32_UsbBd, CountTx) +#define ADDR_RX_OFFSET offsetof(stm32_UsbBd, AddrRx) +#define COUNT_RX_OFFSET offsetof(stm32_UsbBd, CountRx) + +#define USB_CTRL_RW_MASK 0x070F +#define USB_CTRL_CLEAR_ONLY_MASK 0x8080 +#define USB_CTRL_TOGGLE_MASK 0x7070 + +/* CNTR register flags */ +#define bmCTRM 0x8000 +#define bmPMAOVRM 0x4000 +#define bmERRM 0x2000 +#define bmWKUPM 0x1000 +#define bmSUSPM 0x0800 +#define bmRESETM 0x0400 +#define bmSOFM 0x0200 +#define bmESOFM 0x0100 + +#define bmRESUME 0x0010 +#define bmFSUSP 0x0008 +#define bmLPMODE 0x0004 +#define bmPDWN 0x0002 +#define bmFRES 0x0001 + +/* USB error codes */ +enum stm32_usb_error +{ + USB_OK = 0, + USB_INTR_ERROR, + USB_INVAL_ERROR, + USB_NODEV_ERROR, + USB_MEMORY_FULL, + USB_BUF_OVERFLOW, + USB_EP_STALLED, + USB_FATAL_ERROR, +}; + +/* STM32 USB endpoint types */ +enum stm32_UsbEpype +{ + EP_BULK = 0, + EP_CTRL, + EP_ISO, + EP_INTERRUPT, + + EP_TYPE_MAX +}; + +/* STM32 USB interrupt status register bits */ +typedef union +{ + uint32_t status; + struct { + uint8_t EP_ID : 4; + uint8_t DIR : 1; + uint8_t : 2; + uint8_t SZDPR : 1; + uint8_t ESOF : 1; + uint8_t SOF : 1; + uint8_t RESET : 1; + uint8_t SUSP : 1; + uint8_t WKUP : 1; + uint8_t ERR : 1; + uint8_t PMAOVR : 1; + uint8_t CTR : 1; + }; +} PACKED stm32_usb_irq_status_t; + +/* Endpoint state */ +typedef enum +{ + EP_DISABLED = 0, + EP_STALL, + EP_NAK, + EP_VALID +} stm32_UsbEpState; + +/* STM32 USB supported endpoints */ +typedef enum stm32_UsbEP +{ + CTRL_ENP_OUT = 0, CTRL_ENP_IN, + ENP1_OUT, ENP1_IN, + ENP2_OUT, ENP2_IN, + ENP3_OUT, ENP3_IN, + ENP4_OUT, ENP4_IN, + ENP5_OUT, ENP5_IN, + ENP6_OUT, ENP6_IN, + ENP7_OUT, ENP7_IN, + ENP8_OUT, ENP8_IN, + ENP9_OUT, ENP9_IN, + ENP10_OUT, ENP10_IN, + ENP11_OUT, ENP11_IN, + ENP12_OUT, ENP12_IN, + ENP13_OUT, ENP13_IN, + ENP14_OUT, ENP14_IN, + ENP15_OUT, ENP15_IN, + + EP_MAX_HW_NUM +} stm32_UsbEP; + +/* STM32 USB packet memory slot */ +typedef struct stm32_UsbMemSlot +{ + stm32_UsbEP ep_addr; + uint16_t Start; + uint16_t Size; + struct stm32_UsbMemSlot *next; +} stm32_UsbMemSlot; + +/* STM32 USB buffer descriptor (packet memory) */ +typedef struct stm32_UsbBd +{ + uint16_t AddrTx; + uint16_t CountTx; + uint16_t AddrRx; + uint16_t CountRx; +} PACKED stm32_UsbBd; + +/* STM32 USB endpoint I/O status */ +typedef enum stm32_UsbIoStatus +{ + NOT_READY = 0, + NO_SERVICED, + BEGIN_SERVICED, + COMPLETE, + BUFFER_UNDERRUN, + BUFFER_OVERRUN, + SETUP_OVERWRITE, + STALLED, +} stm32_UsbIoStatus; + +/* STM32 USB hardware endpoint descriptor */ +typedef struct stm32_UsbEp +{ + reg32_t *hw; + uint8_t type; + void (*complete)(int); + ssize_t max_size; + ssize_t offset; + ssize_t size; + stm32_UsbIoStatus status; + union + { + uint8_t *read_buffer; + const uint8_t *write_buffer; + }; + int32_t avail_data; + uint8_t flags; +} stm32_UsbEp; + +/* STM32 USB hardware endpoint flags */ +#define STM32_USB_EP_AVAIL_DATA BV(0) +#define STM32_USB_EP_ZERO_PACKET BV(1) +#define STM32_USB_EP_ZERO_POSSIBLE BV(2) + +#endif /* USB_STM32_H */ diff --git a/bertos/cpu/cortex-m3/hw/crt_cm3.S b/bertos/cpu/cortex-m3/hw/crt_cm3.S new file mode 100644 index 0000000..c23d837 --- /dev/null +++ b/bertos/cpu/cortex-m3/hw/crt_cm3.S @@ -0,0 +1,112 @@ +/** + * \file + * + * + * \brief Cortex-M3 architecture's entry point + * + * \author Andrea Righi + */ + +#define CONTROL_UNPRIVILEGED 1 +#define CONTROL_PSP 2 + +.syntax unified +.thumb +.section .init, "ax", %progbits + +.weak __init +.set __init, __init0 + +.weak __init1 +.set __init1, __dummy_init + +.weak __init2 +.set __init2, __dummy_init + +.balign 2 +.thumb_func +__dummy_init: + bx lr + +/* + * Reset handler. + */ +.balign 2 +.thumb_func +__init0: + /* Disable IRQs */ + cpsid i + /* + * Initialize process stack pointer. + */ + ldr r0, =__psp_end + msr psp, r0 + + /* Call the early hardware initialization routine */ + bl __init1 + + /* Copy the data segment initializers from flash to SRAM */ + ldr r0, =__text_end + ldr r1, =__data_start + ldr r2, =__data_end +data_loop: + cmp r1, r2 + ittt lo + ldrlo r3, [r0], #4 + strlo r3, [r1], #4 + blo data_loop + + /* Zero fill the bss segment */ + ldr r1, =__bss_start + ldr r2, =__bss_end + mov r0, #0 +bss_loop: + cmp r1, r2 + itt lo + strlo r0, [r1], #4 + blo bss_loop + + /* Switch to the process stack */ + movs r0, CONTROL_PSP + msr control, r0 + isb + + /* Call the hardware initialization routine */ + bl __init2 + + /* Call the application's entry point */ + cpsie i + mov r0, #0 + mov r1, #0 + bl main +end: + wfi + b end diff --git a/bertos/cpu/cortex-m3/hw/crt_cm3_iar.S b/bertos/cpu/cortex-m3/hw/crt_cm3_iar.S new file mode 100644 index 0000000..6bb71e1 --- /dev/null +++ b/bertos/cpu/cortex-m3/hw/crt_cm3_iar.S @@ -0,0 +1,47 @@ + MODULE ?cstartup + +CONTROL_UNPRIVILEGED SET 1 +CONTROL_PSP SET 2 + + AAPCS INTERWORK, VFP_COMPATIBLE, ROPI + PRESERVE8 + + SECTION .vtable:CODE:NOROOT(3) + + RSEG IRQ_STACK:DATA(3) + RSEG CSTACK:DATA(3) + RSEG DATABSS:DATA(3) + + EXTERN __cmain + EXTERN __init2 + EXTERN __region_RAM_end__ + PUBLIC __iar_program_start + + SECTION .text:CODE:REORDER(2) + + PUBWEAK __dummy_init + __dummy_init: + bx lr + + THUMB + __iar_program_start: + cpsid i + ldr r0, =__region_RAM_end__ + sub r0, r0, #16 + msr psp, r0 + + movs r0, #CONTROL_PSP + msr control, r0 + isb + + bl __init2 + + cpsie i + mov r0, #0 + mov r1, #0 + bl __cmain + end: + wfi + b end + + END diff --git a/bertos/cpu/cortex-m3/hw/iar_cm3.S b/bertos/cpu/cortex-m3/hw/iar_cm3.S new file mode 100644 index 0000000..c537384 --- /dev/null +++ b/bertos/cpu/cortex-m3/hw/iar_cm3.S @@ -0,0 +1,28 @@ + SECTION .text:CODE(2) + + ; Exported functions + EXPORT CPU_READ_IPSR + EXPORT irq_running + EXPORT asm_switch_context + + CPU_READ_IPSR: + mrs r0, ipsr + bx lr + + irq_running: + mrs r0, msp + cmp sp, r0 + ite ne + movne r0, #0x0 + moveq r0, #0x1 + bx lr + + asm_switch_context: + mrs r12, psp + stmdb r12!, {r4-r11, lr} + str r12, [r1] + ldr r12, [r0] + ldmia r12!, {r4-r11, lr} + msr psp, r12 + bx lr + END diff --git a/bertos/cpu/cortex-m3/hw/init_cm3.c b/bertos/cpu/cortex-m3/hw/init_cm3.c new file mode 100644 index 0000000..4ce2f86 --- /dev/null +++ b/bertos/cpu/cortex-m3/hw/init_cm3.c @@ -0,0 +1,94 @@ +/** + * \file + * + * + * \brief Cortex-M3 architecture's entry point + * + * \author Andrea Righi + */ + +#include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */ +#include "switch_ctx_cm3.h" + +#include +#include + +#include /* PAUSE */ +#include /* IRQ_DISABLE */ +#include + +#include +#include + +#include + +#include + +#ifndef __IAR_SYSTEMS_ICC__ +extern size_t __text_end, __data_start, __data_end, __bss_start, __bss_end; +#endif + +extern void __init2(void); + +/* Architecture's entry point */ +void __init2(void) +{ + /* + * The main application expects IRQs disabled. + */ + IRQ_DISABLE; + + /* Set the appropriate clocking configuration */ + clock_init(); + + /* Initialize IRQ vector table in RAM */ + sysirq_init(); + +#if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + /* + * Voluntary context switch handler. + * + * This software interrupt can always be triggered and must be + * dispatched as soon as possible, thus we just disable IRQ priority + * for it. + */ + sysirq_setHandler(FAULT_SVCALL, svcall_handler); + sysirq_setPriority(FAULT_SVCALL, IRQ_PRIO_MAX); + /* + * Preemptible context switch handler + * + * The priority of this IRQ must be the lowest priority in the system + * in order to run last in the interrupt service routines' chain. + */ + sysirq_setHandler(FAULT_PENDSV, pendsv_handler); + sysirq_setPriority(FAULT_PENDSV, IRQ_PRIO_MIN); +#endif +} diff --git a/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c b/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c new file mode 100644 index 0000000..b9afaae --- /dev/null +++ b/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.c @@ -0,0 +1,148 @@ +/** + * \file + * + * + * \brief Cortex-M3 context switch + * + * \author Andrea Righi + */ + +#include +#include /* CONFIG_KERN_PREEMPT */ +#include /* IRQ_PRIO_DISABLED */ +#include /* cpu_stack_t */ +#include /* asm_switch_context() prototype */ +#include /* proc_preempt() */ +#include "switch_ctx_cm3.h" + +#if CONFIG_KERN_PREEMPT +/* + * Kernel preemption: implementation details. + * + * The kernel preemption is implemented using the PendSV IRQ. Inside the + * SysTick handler when a process needs to be interrupted (expires its time + * quantum or a high-priority process is awakend) a pending PendSV call is + * triggered. + * + * The PendSV handler is called immediately after the SysTick handler, using + * the architecture's tail-chaining functionality (an ISR call without the + * overhead of state saving and restoration between different IRQs). Inside the + * PendSV handler we perform the stack-switching between the old and new + * processes. + * + * Voluntary context switch is implemented as a soft-interrupt call (SVCall), + * so any process is always suspended and resumed from an interrupt context. + * + * NOTE: interrupts must be disabled or enabled when resuming a process context + * depending of the type of the previous suspension. If a process was suspended + * by a voluntary context switch IRQs must be disabled on resume (voluntary + * context switch always happen with IRQs disabled). Instead, if a process was + * suspended by the kernel preemption IRQs must be always re-enabled, because + * the PendSV handler resumes directly the process context. To keep track of + * this, we save the state of the IRQ priority in register r3 before performing + * the context switch. + * + * If CONFIG_KERN_PREEMPT is not enabled the cooperative implementation + * fallbacks to the default stack-switching mechanism, performed directly in + * thread-mode and implemented as a normal function call. + */ + +/* + * Voluntary context switch handler. + */ +void NAKED svcall_handler(void) +{ + asm volatile ( + /* Save context */ + "mrs r3, basepri\n\t" + "mrs ip, psp\n\t" + "stmdb ip!, {r3-r11, lr}\n\t" + /* Stack switch */ + "str ip, [r1]\n\t" + "ldr ip, [r0]\n\t" + /* Restore context */ + "ldmia ip!, {r3-r11, lr}\n\t" + "msr psp, ip\n\t" + "msr basepri, r3\n\t" + "bx lr" : : : "memory"); +} + +/* + * Preemptible context switch handler. + */ +void NAKED pendsv_handler(void) +{ + register cpu_stack_t *stack asm("ip"); + + asm volatile ( + "mrs r3, basepri\n\t" + "mov %0, %2\n\t" + "msr basepri, %0\n\t" + "mrs %0, psp\n\t" + "stmdb %0!, {r3-r11, lr}\n\t" + : "=r"(stack) + : "r"(stack), "i"(IRQ_PRIO_DISABLED) + : "r3", "memory"); + proc_current()->stack = stack; + proc_preempt(); + stack = proc_current()->stack; + asm volatile ( + "ldmia %0!, {r3-r11, lr}\n\t" + "msr psp, %0\n\t" + "msr basepri, r3\n\t" + "bx lr" + : "=r"(stack) : "r"(stack) + : "memory"); +} +#else /* !CONFIG_KERN_PREEMPT */ +#ifdef __IAR_SYSTEMS_ICC__ +#else /* __IAR_SYSTEMS_ICC__ */ +void NAKED asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp) +{ + register cpu_stack_t **_new_sp asm("r0") = new_sp; + register cpu_stack_t **_old_sp asm("r1") = old_sp; + + asm volatile ( + "mrs ip, psp\n\t" + /* Save registers */ + "stmdb ip!, {r4-r11, lr}\n\t" + /* Save old stack pointer */ + "str ip, [%1]\n\t" + /* Load new stack pointer */ + "ldr ip, [%0]\n\t" + /* Load new registers */ + "ldmia ip!, {r4-r11, lr}\n\t" + "msr psp, ip\n\t" + "bx lr" + : : "r"(_new_sp), "r"(_old_sp) : "ip", "memory"); +} +#endif /* __IAR_SYSTEMS_ICC__ */ +#endif /* CONFIG_KERN_PREEMPT */ diff --git a/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.h b/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.h new file mode 100644 index 0000000..24efcc2 --- /dev/null +++ b/bertos/cpu/cortex-m3/hw/switch_ctx_cm3.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \brief Cortex-M3 context switch + */ + +#ifndef SWITCH_CTX_CM3_H +#define SWITCH_CTX_CM3_H + +#if CONFIG_KERN_PREEMPT +extern void svcall_handler(void); +extern void pendsv_handler(void); +#endif /* CONFIG_KERN_PREEMPT */ + +#endif /* SWITCH_CTX_CM3_H */ diff --git a/bertos/cpu/cortex-m3/hw/vectors_cm3.S b/bertos/cpu/cortex-m3/hw/vectors_cm3.S new file mode 100644 index 0000000..dfd464a --- /dev/null +++ b/bertos/cpu/cortex-m3/hw/vectors_cm3.S @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief Cortex-M3 startup interrupt vector table + * + * \author Andrea Righi + */ + +.syntax unified +.thumb + +.text +.thumb_func +default_isr: + wfi + b default_isr + +.section .vectors,"ax",%progbits + +irq_vectors: + .word __msp_end /* Initial stack pointer */ + .word __init /* The reset handler */ + .word default_isr /* The NMI handler */ + .word default_isr /* The hard fault handler */ +/* + * This IRQ vector table will be replaced by another one in RAM after the IRQ + * module initialization and the reset handler disables IRQ at the very + * beginning, so there is no chance to trigger the following IRQs. + * + * We can safely trim the rest of this table to reduce the memory footprint and + * save some space in flash. + */ diff --git a/bertos/cpu/cortex-m3/hw/vectors_cm3_iar.S b/bertos/cpu/cortex-m3/hw/vectors_cm3_iar.S new file mode 100644 index 0000000..eab02c6 --- /dev/null +++ b/bertos/cpu/cortex-m3/hw/vectors_cm3_iar.S @@ -0,0 +1,27 @@ + MODULE ?vectors + + AAPCS INTERWORK, VFP_COMPATIBLE, RWPI_COMPATIBLE + PRESERVE8 + + SECTION IRQSTACK:DATA:NOROOT(3) + SECTION .vtable:CODE:NOROOT(3) + + EXTERN __iar_program_start + PUBLIC __vector_table + + DATA + +__vector_table: + DCD SFE(IRQSTACK) + DCD __iar_program_start + DCD default_isr + DCD default_isr + + SECTION .text:CODE:REORDER(1) + THUMB + +default_isr: + wfi + b default_isr + + END diff --git a/bertos/cpu/cortex-m3/info/LM3S1968.cdef b/bertos/cpu/cortex-m3/info/LM3S1968.cdef new file mode 100644 index 0000000..c10c70e --- /dev/null +++ b/bertos/cpu/cortex-m3/info/LM3S1968.cdef @@ -0,0 +1,68 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based LM3S1968 board. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Righi +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "lm3s" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-lm3s.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "50000000UL" + +# Special CPU related tags. +CPU_TAGS += ["lm3s"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_lm3s.c " + DRV_DIR + "clock_lm3s.c " + +# Short description of the cpu. +CPU_DESC += [ "256 Kbytes on-chip flash memory", + "64 Kbytes on-chip SRAM memory", + "3 UARTs interfaces", + "2 I2C interfaces", + "2 ADC x8 channel 10-bit" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_LM3S1968__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "lm3s1968_rom.ld" diff --git a/bertos/cpu/cortex-m3/info/LM3S8962.cdef b/bertos/cpu/cortex-m3/info/LM3S8962.cdef new file mode 100644 index 0000000..d624fa5 --- /dev/null +++ b/bertos/cpu/cortex-m3/info/LM3S8962.cdef @@ -0,0 +1,65 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based LM3S8962 board. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Righi +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "lm3s" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-lm3s.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "50000000UL" + +# Special CPU related tags. +CPU_TAGS += ["lm3s"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_lm3s.c " + DRV_DIR + "clock_lm3s.c " + +# Short description of the cpu. +CPU_DESC += [ "256 Kbytes on-chip flash memory", + "64 Kbytes on-chip SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_LM3S8962__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "lm3s8962_rom.ld" diff --git a/bertos/cpu/cortex-m3/info/SAM3N4.cdef b/bertos/cpu/cortex-m3/info/SAM3N4.cdef new file mode 100644 index 0000000..e13cc3e --- /dev/null +++ b/bertos/cpu/cortex-m3/info/SAM3N4.cdef @@ -0,0 +1,65 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info definitions for Cortex-M3-based Atmel SAM3N4 cpu. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Stefano Fedrigo +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "sam3" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-sam3.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "48000000UL" + +# Special CPU related tags. +CPU_TAGS += ["sam3n"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "clock_sam3.c " + +# Short description of the cpu. +CPU_DESC += [ "256 Kbytes on-chip flash memory", + "24 Kbytes on-chip SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_SAM3N4__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "sam3n4_rom.ld" diff --git a/bertos/cpu/cortex-m3/info/SAM3X8.cdef b/bertos/cpu/cortex-m3/info/SAM3X8.cdef new file mode 100644 index 0000000..b64fb18 --- /dev/null +++ b/bertos/cpu/cortex-m3/info/SAM3X8.cdef @@ -0,0 +1,65 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info definitions for Cortex-M3-based Atmel SAM3X8 cpu. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Stefano Fedrigo +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "sam3" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-sam3.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "84000000UL" + +# Special CPU related tags. +CPU_TAGS += [ "sam3", "sam3x" ] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "clock_sam3.c " + +# Short description of the cpu. +CPU_DESC += [ "512 Kbytes on-chip flash memory", + "64 Kbytes on-chip SRAM memory" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_SAM3X8__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "sam3x8_rom.ld" diff --git a/bertos/cpu/cortex-m3/info/STM32F100RB.cdef b/bertos/cpu/cortex-m3/info/STM32F100RB.cdef new file mode 100644 index 0000000..2b96069 --- /dev/null +++ b/bertos/cpu/cortex-m3/info/STM32F100RB.cdef @@ -0,0 +1,68 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based STM32VLDiscovery board. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Scalise +# \author Matteo Silvestri +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "stm32" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-stm32.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "24000000UL" + +# Special CPU related tags. +CPU_TAGS += ["stm32"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_stm32.c " + DRV_DIR + "clock_stm32.c " + +# Short description of the cpu. +CPU_DESC += [ "128 Kbytes on-chip flash memory", + "8 Kbytes on-chip SRAM memory", + "2 UART interfaces", + "1 I2C interfaces" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_STM32F100RB__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "stm32f100rb_rom.ld" diff --git a/bertos/cpu/cortex-m3/info/STM32F101C4.cdef b/bertos/cpu/cortex-m3/info/STM32F101C4.cdef new file mode 100644 index 0000000..d8880b9 --- /dev/null +++ b/bertos/cpu/cortex-m3/info/STM32F101C4.cdef @@ -0,0 +1,68 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based STM32F101C4 cpu. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Stefano Fedrigo +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "stm32" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-stm32.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "36000000UL" + +# Special CPU related tags. +CPU_TAGS += ["stm32"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_stm32.c " + DRV_DIR + "clock_stm32.c " + +# Short description of the cpu. +CPU_DESC += [ "16 Kbytes on-chip flash memory", + "4 Kbytes on-chip SRAM memory", + "2 UARTs interfaces", + "1 I2C interface", + "1 ADC x10 channels 12-bit" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_STM32F101C4__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "stm32f101c4_rom.ld" diff --git a/bertos/cpu/cortex-m3/info/STM32F103RB.cdef b/bertos/cpu/cortex-m3/info/STM32F103RB.cdef new file mode 100644 index 0000000..fec9a27 --- /dev/null +++ b/bertos/cpu/cortex-m3/info/STM32F103RB.cdef @@ -0,0 +1,68 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based STM32-P103 board. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Righi +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "stm32" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-stm32.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "72000000UL" + +# Special CPU related tags. +CPU_TAGS += ["stm32"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_stm32.c " + DRV_DIR + "clock_stm32.c " + +# Short description of the cpu. +CPU_DESC += [ "128 Kbytes on-chip flash memory", + "20 Kbytes on-chip SRAM memory", + "2 UARTs interfaces", + "2 I2C interfaces", + "2 ADC x16 channel 12-bit" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_STM32F103RB__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "stm32f103rb_rom.ld" diff --git a/bertos/cpu/cortex-m3/info/STM32F103RE.cdef b/bertos/cpu/cortex-m3/info/STM32F103RE.cdef new file mode 100644 index 0000000..4ff398d --- /dev/null +++ b/bertos/cpu/cortex-m3/info/STM32F103RE.cdef @@ -0,0 +1,68 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based STM32F103RE. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Luca Ottaviano +# +# + +# Import the common settings for the path. +include("cm3.common") + +# CPU type used for flashing/debugging +MK_PROGRAMMER_CPU = "stm32" +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/flash-stm32.sh" + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "72000000UL" + +# Special CPU related tags. +CPU_TAGS += ["stm32"] + +# Additional hw drivers. +MK_CPU_CSRC += DRV_DIR + "gpio_stm32.c " + DRV_DIR + "clock_stm32.c " + +# Short description of the cpu. +CPU_DESC += [ "512 Kbytes on-chip flash memory", + "64 Kbytes on-chip SRAM memory", + "3 UARTs interfaces", + "2 I2C interfaces", + "2 ADC x16 channel 12-bit" ] + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__ARM_STM32F103RE__" +MK_CPU_LDFLAGS += " -Wl,-dT " + SCRIPT_DIR + "stm32f103re_rom.ld" diff --git a/bertos/cpu/cortex-m3/info/cm3.common b/bertos/cpu/cortex-m3/info/cm3.common new file mode 100644 index 0000000..380a02b --- /dev/null +++ b/bertos/cpu/cortex-m3/info/cm3.common @@ -0,0 +1,81 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition for Cortex-M3-based boards. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Andrea Righi +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = ["ARM Cortex-M3", + "ARMv7-M Thumb-2 ISA", + "16-bit and 32-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "arm" + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "cortex-m3" + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_CPU = CORE_CPU + +# Special CPU related tags. +CPU_TAGS = ["cm3"] + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "cortex-m3/scripts/" +HW_DIR = CPU_DIR + "cortex-m3/hw/" +DRV_DIR = CPU_DIR + "cortex-m3/drv/" + +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/debug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "arm/stopopenocd.sh" + +GDB_INIT_SCRIPT = PRG_SCRIPTS_DIR + "arm/openocd/gdbinit-sam7" + +# Common GCC flags. +MK_CPU_CPPAFLAGS = "-g -gdwarf-2 -mthumb -mno-thumb-interwork" +MK_CPU_CPPFLAGS = "-O0 -g3 -gdwarf-2 -mthumb -mno-thumb-interwork -fno-strict-aliasing -fwrapv -fverbose-asm -I" + CPU_DIR + "cortex-m3/" +MK_CPU_LDFLAGS = "-mthumb -mno-thumb-interwork -nostartfiles -Wl,--no-warn-mismatch" + +# CRT files. +MK_CPU_CPPASRC = HW_DIR + "crt_cm3.S " + HW_DIR + "vectors_cm3.S " +MK_CPU_CSRC = HW_DIR + "init_cm3.c " + DRV_DIR + "irq_cm3.c " diff --git a/bertos/cpu/cortex-m3/io/cm3.h b/bertos/cpu/cortex-m3/io/cm3.h new file mode 100644 index 0000000..8d1b415 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/cm3.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Low-level Registry definition for ARM Cortex-m3 (interface). + * + * \author Daniele Basile + * + */ + +#include + +#if CPU_CM3_LM3S + #include "lm3s.h" +#elif CPU_CM3_STM32 + #include "stm32.h" +#elif CPU_CM3_SAM3 + #include "sam3.h" +/*#elif Add other Cortex-M3 CPUs here */ +#else + #error Unknown CPU +#endif + diff --git a/bertos/cpu/cortex-m3/io/lm3s.h b/bertos/cpu/cortex-m3/io/lm3s.h new file mode 100644 index 0000000..9720f17 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \author Andrea Righi + */ + +#ifndef LM3S_H +#define LM3S_H + +#include +#include + +#include "lm3s_com.h" +#include "lm3s_types.h" +#include "lm3s_ints.h" +#include "lm3s_nvic.h" +#include "lm3s_sysctl.h" +#include "lm3s_gpio.h" +#include "lm3s_memmap.h" +#include "lm3s_uart.h" +#include "lm3s_ssi.h" +#include "lm3s_i2c.h" +#include "lm3s_adc.h" + +#if CPU_CM3_LM3S1968 + #define GPIO_I2C0_SCL_PIN BV(2) + #define GPIO_I2C0_SDA_PIN BV(3) + + #define GPIO_I2C1_SCL_PIN BV(6) + #define GPIO_I2C1_SDA_PIN BV(7) +#elif CPU_CM3_LM3S8962 + #define GPIO_I2C0_SCL_PIN BV(2) + #define GPIO_I2C0_SDA_PIN BV(3) +#else + #error No i2c pins are defined for select cpu +#endif + +/* Flash memory mapping */ +#if CPU_CM3_LM3S1968 || CPU_CM3_LM3S8962 + #define FLASH_SIZE 0x40000 //< 256KiB + #define FLASH_PAGE_SIZE 0x400 //< 1KiB +#else + #error No embedded definition for select cpu +#endif + +#endif /* LM3S_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_adc.h b/bertos/cpu/cortex-m3/io/lm3s_adc.h new file mode 100644 index 0000000..1fa1423 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_adc.h @@ -0,0 +1,1361 @@ +/** + * \file + * + * + * \brief LM3S ADC definition. + */ + +#ifndef LM3S_ADC_H +#define LM3S_ADC_H + + +/* + * The following are defines for the ADC register offsets. + */ +#define ADC_O_ACTSS 0x00000000 ///< ADC Active Sample Sequencer +#define ADC_O_RIS 0x00000004 ///< ADC Raw Interrupt Status +#define ADC_O_IM 0x00000008 ///< ADC Interrupt Mask +#define ADC_O_ISC 0x0000000C ///< ADC Interrupt Status and Clear +#define ADC_O_OSTAT 0x00000010 ///< ADC Overflow Status +#define ADC_O_EMUX 0x00000014 ///< ADC Event Multiplexer Select +#define ADC_O_USTAT 0x00000018 ///< ADC Underflow Status +#define ADC_O_SSPRI 0x00000020 ///< ADC Sample Sequencer Priority +#define ADC_O_SPC 0x00000024 ///< ADC Sample Phase Control +#define ADC_O_PSSI 0x00000028 ///< ADC Processor Sample Sequence + ///< Initiate +#define ADC_O_SAC 0x00000030 ///< ADC Sample Averaging Control +#define ADC_O_DCISC 0x00000034 ///< ADC Digital Comparator Interrupt + ///< Status and Clear +#define ADC_O_CTL 0x00000038 ///< ADC Control +#define ADC_O_SSMUX0 0x00000040 ///< ADC Sample Sequence Input + ///< Multiplexer Select 0 +#define ADC_O_SSCTL0 0x00000044 ///< ADC Sample Sequence Control 0 +#define ADC_O_SSFIFO0 0x00000048 ///< ADC Sample Sequence Result FIFO + ///< 0 +#define ADC_O_SSFSTAT0 0x0000004C ///< ADC Sample Sequence FIFO 0 + ///< Status +#define ADC_O_SSOP0 0x00000050 ///< ADC Sample Sequence 0 Operation +#define ADC_O_SSDC0 0x00000054 ///< ADC Sample Sequence 0 Digital + ///< Comparator Select +#define ADC_O_SSMUX1 0x00000060 ///< ADC Sample Sequence Input + ///< Multiplexer Select 1 +#define ADC_O_SSCTL1 0x00000064 ///< ADC Sample Sequence Control 1 +#define ADC_O_SSFIFO1 0x00000068 ///< ADC Sample Sequence Result FIFO + ///< 1 +#define ADC_O_SSFSTAT1 0x0000006C ///< ADC Sample Sequence FIFO 1 + ///< Status +#define ADC_O_SSOP1 0x00000070 ///< ADC Sample Sequence 1 Operation +#define ADC_O_SSDC1 0x00000074 ///< ADC Sample Sequence 1 Digital + ///< Comparator Select +#define ADC_O_SSMUX2 0x00000080 ///< ADC Sample Sequence Input + ///< Multiplexer Select 2 +#define ADC_O_SSCTL2 0x00000084 ///< ADC Sample Sequence Control 2 +#define ADC_O_SSFIFO2 0x00000088 ///< ADC Sample Sequence Result FIFO + ///< 2 +#define ADC_O_SSFSTAT2 0x0000008C ///< ADC Sample Sequence FIFO 2 + ///< Status +#define ADC_O_SSOP2 0x00000090 ///< ADC Sample Sequence 2 Operation +#define ADC_O_SSDC2 0x00000094 ///< ADC Sample Sequence 2 Digital + ///< Comparator Select +#define ADC_O_SSMUX3 0x000000A0 ///< ADC Sample Sequence Input + ///< Multiplexer Select 3 +#define ADC_O_SSCTL3 0x000000A4 ///< ADC Sample Sequence Control 3 +#define ADC_O_SSFIFO3 0x000000A8 ///< ADC Sample Sequence Result FIFO + ///< 3 +#define ADC_O_SSFSTAT3 0x000000AC ///< ADC Sample Sequence FIFO 3 + ///< Status +#define ADC_O_SSOP3 0x000000B0 ///< ADC Sample Sequence 3 Operation +#define ADC_O_SSDC3 0x000000B4 ///< ADC Sample Sequence 3 Digital + ///< Comparator Select +#define ADC_O_TMLB 0x00000100 ///< ADC Test Mode Loopback +#define ADC_O_DCRIC 0x00000D00 ///< ADC Digital Comparator Reset + ///< Initial Conditions +#define ADC_O_DCCTL0 0x00000E00 ///< ADC Digital Comparator Control 0 +#define ADC_O_DCCTL1 0x00000E04 ///< ADC Digital Comparator Control 1 +#define ADC_O_DCCTL2 0x00000E08 ///< ADC Digital Comparator Control 2 +#define ADC_O_DCCTL3 0x00000E0C ///< ADC Digital Comparator Control 3 +#define ADC_O_DCCTL4 0x00000E10 ///< ADC Digital Comparator Control 4 +#define ADC_O_DCCTL5 0x00000E14 ///< ADC Digital Comparator Control 5 +#define ADC_O_DCCTL6 0x00000E18 ///< ADC Digital Comparator Control 6 +#define ADC_O_DCCTL7 0x00000E1C ///< ADC Digital Comparator Control 7 +#define ADC_O_DCCMP0 0x00000E40 ///< ADC Digital Comparator Range 0 +#define ADC_O_DCCMP1 0x00000E44 ///< ADC Digital Comparator Range 1 +#define ADC_O_DCCMP2 0x00000E48 ///< ADC Digital Comparator Range 2 +#define ADC_O_DCCMP3 0x00000E4C ///< ADC Digital Comparator Range 3 +#define ADC_O_DCCMP4 0x00000E50 ///< ADC Digital Comparator Range 4 +#define ADC_O_DCCMP5 0x00000E54 ///< ADC Digital Comparator Range 5 +#define ADC_O_DCCMP6 0x00000E58 ///< ADC Digital Comparator Range 6 +#define ADC_O_DCCMP7 0x00000E5C ///< ADC Digital Comparator Range 7 + + +/* + * The following are defines for the bit fields in the ADC_O_ACTSS register. + */ +#define ADC_ACTSS_ASEN3 0x00000008 ///< ADC SS3 Enable +#define ADC_ACTSS_ASEN2 0x00000004 ///< ADC SS2 Enable +#define ADC_ACTSS_ASEN1 0x00000002 ///< ADC SS1 Enable +#define ADC_ACTSS_ASEN0 0x00000001 ///< ADC SS0 Enable + + +/* + * The following are defines for the bit fields in the ADC_O_RIS register. + */ +#define ADC_RIS_INRDC 0x00010000 ///< Digital Comparator Raw Interrupt + ///< Status +#define ADC_RIS_INR3 0x00000008 ///< SS3 Raw Interrupt Status +#define ADC_RIS_INR2 0x00000004 ///< SS2 Raw Interrupt Status +#define ADC_RIS_INR1 0x00000002 ///< SS1 Raw Interrupt Status +#define ADC_RIS_INR0 0x00000001 ///< SS0 Raw Interrupt Status + + +/* + * The following are defines for the bit fields in the ADC_O_IM register. + */ +#define ADC_IM_DCONSS3 0x00080000 ///< Digital Comparator Interrupt on + ///< SS3 +#define ADC_IM_DCONSS2 0x00040000 ///< Digital Comparator Interrupt on + ///< SS2 +#define ADC_IM_DCONSS1 0x00020000 ///< Digital Comparator Interrupt on + ///< SS1 +#define ADC_IM_DCONSS0 0x00010000 ///< Digital Comparator Interrupt on + ///< SS0 +#define ADC_IM_MASK3 0x00000008 ///< SS3 Interrupt Mask +#define ADC_IM_MASK2 0x00000004 ///< SS2 Interrupt Mask +#define ADC_IM_MASK1 0x00000002 ///< SS1 Interrupt Mask +#define ADC_IM_MASK0 0x00000001 ///< SS0 Interrupt Mask + + +/* + * The following are defines for the bit fields in the ADC_O_ISC register. + */ +#define ADC_ISC_DCINSS3 0x00080000 ///< Digital Comparator Interrupt + ///< Status on SS3 +#define ADC_ISC_DCINSS2 0x00040000 ///< Digital Comparator Interrupt + ///< Status on SS2 +#define ADC_ISC_DCINSS1 0x00020000 ///< Digital Comparator Interrupt + ///< Status on SS1 +#define ADC_ISC_DCINSS0 0x00010000 ///< Digital Comparator Interrupt + ///< Status on SS0 +#define ADC_ISC_IN3 0x00000008 ///< SS3 Interrupt Status and Clear +#define ADC_ISC_IN2 0x00000004 ///< SS2 Interrupt Status and Clear +#define ADC_ISC_IN1 0x00000002 ///< SS1 Interrupt Status and Clear +#define ADC_ISC_IN0 0x00000001 ///< SS0 Interrupt Status and Clear + + +/* + * The following are defines for the bit fields in the ADC_O_OSTAT register. + */ +#define ADC_OSTAT_OV3 0x00000008 ///< SS3 FIFO Overflow +#define ADC_OSTAT_OV2 0x00000004 ///< SS2 FIFO Overflow +#define ADC_OSTAT_OV1 0x00000002 ///< SS1 FIFO Overflow +#define ADC_OSTAT_OV0 0x00000001 ///< SS0 FIFO Overflow + + +/* + * The following are defines for the bit fields in the ADC_O_EMUX register. + */ +#define ADC_EMUX_EM3_M 0x0000F000 ///< SS3 Trigger Select +#define ADC_EMUX_EM3_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM3_COMP0 0x00001000 ///< Analog Comparator 0 +#define ADC_EMUX_EM3_COMP1 0x00002000 ///< Analog Comparator 1 +#define ADC_EMUX_EM3_COMP2 0x00003000 ///< Analog Comparator 2 +#define ADC_EMUX_EM3_EXTERNAL 0x00004000 ///< External (GPIO PB4) +#define ADC_EMUX_EM3_TIMER 0x00005000 ///< Timer +#define ADC_EMUX_EM3_PWM0 0x00006000 ///< PWM0 +#define ADC_EMUX_EM3_PWM1 0x00007000 ///< PWM1 +#define ADC_EMUX_EM3_PWM2 0x00008000 ///< PWM2 +#define ADC_EMUX_EM3_PWM3 0x00009000 ///< PWM3 +#define ADC_EMUX_EM3_ALWAYS 0x0000F000 ///< Always (continuously sample) +#define ADC_EMUX_EM2_M 0x00000F00 ///< SS2 Trigger Select +#define ADC_EMUX_EM2_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM2_COMP0 0x00000100 ///< Analog Comparator 0 +#define ADC_EMUX_EM2_COMP1 0x00000200 ///< Analog Comparator 1 +#define ADC_EMUX_EM2_COMP2 0x00000300 ///< Analog Comparator 2 +#define ADC_EMUX_EM2_EXTERNAL 0x00000400 ///< External (GPIO PB4) +#define ADC_EMUX_EM2_TIMER 0x00000500 ///< Timer +#define ADC_EMUX_EM2_PWM0 0x00000600 ///< PWM0 +#define ADC_EMUX_EM2_PWM1 0x00000700 ///< PWM1 +#define ADC_EMUX_EM2_PWM2 0x00000800 ///< PWM2 +#define ADC_EMUX_EM2_PWM3 0x00000900 ///< PWM3 +#define ADC_EMUX_EM2_ALWAYS 0x00000F00 ///< Always (continuously sample) +#define ADC_EMUX_EM1_M 0x000000F0 ///< SS1 Trigger Select +#define ADC_EMUX_EM1_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM1_COMP0 0x00000010 ///< Analog Comparator 0 +#define ADC_EMUX_EM1_COMP1 0x00000020 ///< Analog Comparator 1 +#define ADC_EMUX_EM1_COMP2 0x00000030 ///< Analog Comparator 2 +#define ADC_EMUX_EM1_EXTERNAL 0x00000040 ///< External (GPIO PB4) +#define ADC_EMUX_EM1_TIMER 0x00000050 ///< Timer +#define ADC_EMUX_EM1_PWM0 0x00000060 ///< PWM0 +#define ADC_EMUX_EM1_PWM1 0x00000070 ///< PWM1 +#define ADC_EMUX_EM1_PWM2 0x00000080 ///< PWM2 +#define ADC_EMUX_EM1_PWM3 0x00000090 ///< PWM3 +#define ADC_EMUX_EM1_ALWAYS 0x000000F0 ///< Always (continuously sample) +#define ADC_EMUX_EM0_M 0x0000000F ///< SS0 Trigger Select +#define ADC_EMUX_EM0_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM0_COMP0 0x00000001 ///< Analog Comparator 0 +#define ADC_EMUX_EM0_COMP1 0x00000002 ///< Analog Comparator 1 +#define ADC_EMUX_EM0_COMP2 0x00000003 ///< Analog Comparator 2 +#define ADC_EMUX_EM0_EXTERNAL 0x00000004 ///< External (GPIO PB4) +#define ADC_EMUX_EM0_TIMER 0x00000005 ///< Timer +#define ADC_EMUX_EM0_PWM0 0x00000006 ///< PWM0 +#define ADC_EMUX_EM0_PWM1 0x00000007 ///< PWM1 +#define ADC_EMUX_EM0_PWM2 0x00000008 ///< PWM2 +#define ADC_EMUX_EM0_PWM3 0x00000009 ///< PWM3 +#define ADC_EMUX_EM0_ALWAYS 0x0000000F ///< Always (continuously sample) + + +/* + * The following are defines for the bit fields in the ADC_O_USTAT register. + */ +#define ADC_USTAT_UV3 0x00000008 ///< SS3 FIFO Underflow +#define ADC_USTAT_UV2 0x00000004 ///< SS2 FIFO Underflow +#define ADC_USTAT_UV1 0x00000002 ///< SS1 FIFO Underflow +#define ADC_USTAT_UV0 0x00000001 ///< SS0 FIFO Underflow + + +/* + * The following are defines for the bit fields in the ADC_O_SSPRI register. + */ +#define ADC_SSPRI_SS3_M 0x00003000 ///< SS3 Priority +#define ADC_SSPRI_SS3_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS3_2ND 0x00001000 ///< Second priority +#define ADC_SSPRI_SS3_3RD 0x00002000 ///< Third priority +#define ADC_SSPRI_SS3_4TH 0x00003000 ///< Fourth priority +#define ADC_SSPRI_SS2_M 0x00000300 ///< SS2 Priority +#define ADC_SSPRI_SS2_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS2_2ND 0x00000100 ///< Second priority +#define ADC_SSPRI_SS2_3RD 0x00000200 ///< Third priority +#define ADC_SSPRI_SS2_4TH 0x00000300 ///< Fourth priority +#define ADC_SSPRI_SS1_M 0x00000030 ///< SS1 Priority +#define ADC_SSPRI_SS1_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS1_2ND 0x00000010 ///< Second priority +#define ADC_SSPRI_SS1_3RD 0x00000020 ///< Third priority +#define ADC_SSPRI_SS1_4TH 0x00000030 ///< Fourth priority +#define ADC_SSPRI_SS0_M 0x00000003 ///< SS0 Priority +#define ADC_SSPRI_SS0_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS0_2ND 0x00000001 ///< Second priority +#define ADC_SSPRI_SS0_3RD 0x00000002 ///< Third priority +#define ADC_SSPRI_SS0_4TH 0x00000003 ///< Fourth priority + + +/* + * The following are defines for the bit fields in the ADC_O_SPC register. + */ + +#define ADC_SPC_PHASE_M 0x0000000F ///< Phase Difference +#define ADC_SPC_PHASE_0 0x00000000 ///< ADC sample lags by 0.0 +#define ADC_SPC_PHASE_22_5 0x00000001 ///< ADC sample lags by 22.5 +#define ADC_SPC_PHASE_45 0x00000002 ///< ADC sample lags by 45.0 +#define ADC_SPC_PHASE_67_5 0x00000003 ///< ADC sample lags by 67.5 +#define ADC_SPC_PHASE_90 0x00000004 ///< ADC sample lags by 90.0 +#define ADC_SPC_PHASE_112_5 0x00000005 ///< ADC sample lags by 112.5 +#define ADC_SPC_PHASE_135 0x00000006 ///< ADC sample lags by 135.0 +#define ADC_SPC_PHASE_157_5 0x00000007 ///< ADC sample lags by 157.5 +#define ADC_SPC_PHASE_180 0x00000008 ///< ADC sample lags by 180.0 +#define ADC_SPC_PHASE_202_5 0x00000009 ///< ADC sample lags by 202.5 +#define ADC_SPC_PHASE_225 0x0000000A ///< ADC sample lags by 225.0 +#define ADC_SPC_PHASE_247_5 0x0000000B ///< ADC sample lags by 247.5 +#define ADC_SPC_PHASE_270 0x0000000C ///< ADC sample lags by 270.0 +#define ADC_SPC_PHASE_292_5 0x0000000D ///< ADC sample lags by 292.5 +#define ADC_SPC_PHASE_315 0x0000000E ///< ADC sample lags by 315.0 +#define ADC_SPC_PHASE_337_5 0x0000000F ///< ADC sample lags by 337.5 + + +/* + * The following are defines for the bit fields in the ADC_O_PSSI register. + */ +#define ADC_PSSI_GSYNC 0x80000000 ///< Global Synchronize +#define ADC_PSSI_SYNCWAIT 0x08000000 ///< Synchronize Wait +#define ADC_PSSI_SS3 0x00000008 ///< SS3 Initiate +#define ADC_PSSI_SS2 0x00000004 ///< SS2 Initiate +#define ADC_PSSI_SS1 0x00000002 ///< SS1 Initiate +#define ADC_PSSI_SS0 0x00000001 ///< SS0 Initiate + + +/* + * The following are defines for the bit fields in the ADC_O_SAC register. + */ +#define ADC_SAC_AVG_M 0x00000007 ///< Hardware Averaging Control +#define ADC_SAC_AVG_OFF 0x00000000 ///< No hardware oversampling +#define ADC_SAC_AVG_2X 0x00000001 ///< 2x hardware oversampling +#define ADC_SAC_AVG_4X 0x00000002 ///< 4x hardware oversampling +#define ADC_SAC_AVG_8X 0x00000003 ///< 8x hardware oversampling +#define ADC_SAC_AVG_16X 0x00000004 ///< 16x hardware oversampling +#define ADC_SAC_AVG_32X 0x00000005 ///< 32x hardware oversampling +#define ADC_SAC_AVG_64X 0x00000006 ///< 64x hardware oversampling + + +/* + * The following are defines for the bit fields in the ADC_O_DCISC register. + */ +#define ADC_DCISC_DCINT7 0x00000080 ///< Digital Comparator 7 Interrupt + ///< Status and Clear +#define ADC_DCISC_DCINT6 0x00000040 ///< Digital Comparator 6 Interrupt + ///< Status and Clear +#define ADC_DCISC_DCINT5 0x00000020 ///< Digital Comparator 5 Interrupt + ///< Status and Clear +#define ADC_DCISC_DCINT4 0x00000010 ///< Digital Comparator 4 Interrupt + ///< Status and Clear +#define ADC_DCISC_DCINT3 0x00000008 ///< Digital Comparator 3 Interrupt + ///< Status and Clear +#define ADC_DCISC_DCINT2 0x00000004 ///< Digital Comparator 2 Interrupt + ///< Status and Clear +#define ADC_DCISC_DCINT1 0x00000002 ///< Digital Comparator 1 Interrupt + ///< Status and Clear +#define ADC_DCISC_DCINT0 0x00000001 ///< Digital Comparator 0 Interrupt + ///< Status and Clear + + +/* + * The following are defines for the bit fields in the ADC_O_CTL register. + */ +#define ADC_CTL_VREF 0x00000001 ///< Voltage Reference Select + + + +/** + * The following are defines for the bit fields in the ADC_O_ACTSS register. + */ +/*\{*/ +#define ADC_ACTSS_ASEN3 0x00000008 ///< ADC SS3 Enable +#define ADC_ACTSS_ASEN2 0x00000004 ///< ADC SS2 Enable +#define ADC_ACTSS_ASEN1 0x00000002 ///< ADC SS1 Enable +#define ADC_ACTSS_ASEN0 0x00000001 ///< ADC SS0 Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_RIS register. + */ +/*\{*/ +#define ADC_RIS_INR3 0x00000008 ///< SS3 Raw Interrupt Status +#define ADC_RIS_INR2 0x00000004 ///< SS2 Raw Interrupt Status +#define ADC_RIS_INR1 0x00000002 ///< SS1 Raw Interrupt Status +#define ADC_RIS_INR0 0x00000001 ///< SS0 Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_IM register. + */ +/*\{*/ +#define ADC_IM_MASK3 0x00000008 ///< SS3 Interrupt Mask +#define ADC_IM_MASK2 0x00000004 ///< SS2 Interrupt Mask +#define ADC_IM_MASK1 0x00000002 ///< SS1 Interrupt Mask +#define ADC_IM_MASK0 0x00000001 ///< SS0 Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_ISC register. + */ +/*\{*/ +#define ADC_ISC_IN3 0x00000008 ///< SS3 Interrupt Status and Clear +#define ADC_ISC_IN2 0x00000004 ///< SS2 Interrupt Status and Clear +#define ADC_ISC_IN1 0x00000002 ///< SS1 Interrupt Status and Clear +#define ADC_ISC_IN0 0x00000001 ///< SS0 Interrupt Status and Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_OSTAT register. + */ +/*\{*/ +#define ADC_OSTAT_OV3 0x00000008 ///< SS3 FIFO Overflow +#define ADC_OSTAT_OV2 0x00000004 ///< SS2 FIFO Overflow +#define ADC_OSTAT_OV1 0x00000002 ///< SS1 FIFO Overflow +#define ADC_OSTAT_OV0 0x00000001 ///< SS0 FIFO Overflow +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_EMUX register. + */ +/*\{*/ +#define ADC_EMUX_EM3_M 0x0000F000 ///< SS3 Trigger Select +#define ADC_EMUX_EM3_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM3_COMP0 0x00001000 ///< Analog Comparator 0 +#define ADC_EMUX_EM3_COMP1 0x00002000 ///< Analog Comparator 1 +#define ADC_EMUX_EM3_COMP2 0x00003000 ///< Analog Comparator 2 +#define ADC_EMUX_EM3_EXTERNAL 0x00004000 ///< External (GPIO PB4) +#define ADC_EMUX_EM3_TIMER 0x00005000 ///< Timer +#define ADC_EMUX_EM3_PWM0 0x00006000 ///< PWM0 +#define ADC_EMUX_EM3_PWM1 0x00007000 ///< PWM1 +#define ADC_EMUX_EM3_PWM2 0x00008000 ///< PWM2 +#define ADC_EMUX_EM3_ALWAYS 0x0000F000 ///< Always (continuously sample) +#define ADC_EMUX_EM2_M 0x00000F00 ///< SS2 Trigger Select +#define ADC_EMUX_EM2_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM2_COMP0 0x00000100 ///< Analog Comparator 0 +#define ADC_EMUX_EM2_COMP1 0x00000200 ///< Analog Comparator 1 +#define ADC_EMUX_EM2_COMP2 0x00000300 ///< Analog Comparator 2 +#define ADC_EMUX_EM2_EXTERNAL 0x00000400 ///< External (GPIO PB4) +#define ADC_EMUX_EM2_TIMER 0x00000500 ///< Timer +#define ADC_EMUX_EM2_PWM0 0x00000600 ///< PWM0 +#define ADC_EMUX_EM2_PWM1 0x00000700 ///< PWM1 +#define ADC_EMUX_EM2_PWM2 0x00000800 ///< PWM2 +#define ADC_EMUX_EM2_ALWAYS 0x00000F00 ///< Always (continuously sample) +#define ADC_EMUX_EM1_M 0x000000F0 ///< SS1 Trigger Select +#define ADC_EMUX_EM1_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM1_COMP0 0x00000010 ///< Analog Comparator 0 +#define ADC_EMUX_EM1_COMP1 0x00000020 ///< Analog Comparator 1 +#define ADC_EMUX_EM1_COMP2 0x00000030 ///< Analog Comparator 2 +#define ADC_EMUX_EM1_EXTERNAL 0x00000040 ///< External (GPIO PB4) +#define ADC_EMUX_EM1_TIMER 0x00000050 ///< Timer +#define ADC_EMUX_EM1_PWM0 0x00000060 ///< PWM0 +#define ADC_EMUX_EM1_PWM1 0x00000070 ///< PWM1 +#define ADC_EMUX_EM1_PWM2 0x00000080 ///< PWM2 +#define ADC_EMUX_EM1_ALWAYS 0x000000F0 ///< Always (continuously sample) +#define ADC_EMUX_EM0_M 0x0000000F ///< SS0 Trigger Select +#define ADC_EMUX_EM0_PROCESSOR 0x00000000 ///< Processor (default) +#define ADC_EMUX_EM0_COMP0 0x00000001 ///< Analog Comparator 0 +#define ADC_EMUX_EM0_COMP1 0x00000002 ///< Analog Comparator 1 +#define ADC_EMUX_EM0_COMP2 0x00000003 ///< Analog Comparator 2 +#define ADC_EMUX_EM0_EXTERNAL 0x00000004 ///< External (GPIO PB4) +#define ADC_EMUX_EM0_TIMER 0x00000005 ///< Timer +#define ADC_EMUX_EM0_PWM0 0x00000006 ///< PWM0 +#define ADC_EMUX_EM0_PWM1 0x00000007 ///< PWM1 +#define ADC_EMUX_EM0_PWM2 0x00000008 ///< PWM2 +#define ADC_EMUX_EM0_ALWAYS 0x0000000F ///< Always (continuously sample) +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_USTAT register. + */ +/*\{*/ +#define ADC_USTAT_UV3 0x00000008 ///< SS3 FIFO Underflow +#define ADC_USTAT_UV2 0x00000004 ///< SS2 FIFO Underflow +#define ADC_USTAT_UV1 0x00000002 ///< SS1 FIFO Underflow +#define ADC_USTAT_UV0 0x00000001 ///< SS0 FIFO Underflow +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSPRI register. + */ +/*\{*/ +#define ADC_SSPRI_SS3_M 0x00003000 ///< SS3 Priority +#define ADC_SSPRI_SS3_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS3_2ND 0x00001000 ///< Second priority +#define ADC_SSPRI_SS3_3RD 0x00002000 ///< Third priority +#define ADC_SSPRI_SS3_4TH 0x00003000 ///< Fourth priority +#define ADC_SSPRI_SS2_M 0x00000300 ///< SS2 Priority +#define ADC_SSPRI_SS2_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS2_2ND 0x00000100 ///< Second priority +#define ADC_SSPRI_SS2_3RD 0x00000200 ///< Third priority +#define ADC_SSPRI_SS2_4TH 0x00000300 ///< Fourth priority +#define ADC_SSPRI_SS1_M 0x00000030 ///< SS1 Priority +#define ADC_SSPRI_SS1_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS1_2ND 0x00000010 ///< Second priority +#define ADC_SSPRI_SS1_3RD 0x00000020 ///< Third priority +#define ADC_SSPRI_SS1_4TH 0x00000030 ///< Fourth priority +#define ADC_SSPRI_SS0_M 0x00000003 ///< SS0 Priority +#define ADC_SSPRI_SS0_1ST 0x00000000 ///< First priority +#define ADC_SSPRI_SS0_2ND 0x00000001 ///< Second priority +#define ADC_SSPRI_SS0_3RD 0x00000002 ///< Third priority +#define ADC_SSPRI_SS0_4TH 0x00000003 ///< Fourth priority +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_PSSI register. + */ +/*\{*/ +#define ADC_PSSI_SS3 0x00000008 ///< SS3 Initiate +#define ADC_PSSI_SS2 0x00000004 ///< SS2 Initiate +#define ADC_PSSI_SS1 0x00000002 ///< SS1 Initiate +#define ADC_PSSI_SS0 0x00000001 ///< SS0 Initiate +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SAC register. + */ +/*\{*/ +#define ADC_SAC_AVG_M 0x00000007 ///< Hardware Averaging Control +#define ADC_SAC_AVG_OFF 0x00000000 ///< No hardware oversampling +#define ADC_SAC_AVG_2X 0x00000001 ///< 2x hardware oversampling +#define ADC_SAC_AVG_4X 0x00000002 ///< 4x hardware oversampling +#define ADC_SAC_AVG_8X 0x00000003 ///< 8x hardware oversampling +#define ADC_SAC_AVG_16X 0x00000004 ///< 16x hardware oversampling +#define ADC_SAC_AVG_32X 0x00000005 ///< 32x hardware oversampling +#define ADC_SAC_AVG_64X 0x00000006 ///< 64x hardware oversampling +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSMUX0 register. + */ +/*\{*/ +#define ADC_SSMUX0_MUX7_M 0x70000000 ///< 8th Sample Input Select +#define ADC_SSMUX0_MUX6_M 0x07000000 ///< 7th Sample Input Select +#define ADC_SSMUX0_MUX5_M 0x00700000 ///< 6th Sample Input Select +#define ADC_SSMUX0_MUX4_M 0x00070000 ///< 5th Sample Input Select +#define ADC_SSMUX0_MUX3_M 0x00007000 ///< 4th Sample Input Select +#define ADC_SSMUX0_MUX2_M 0x00000700 ///< 3rd Sample Input Select +#define ADC_SSMUX0_MUX1_M 0x00000070 ///< 2nd Sample Input Select +#define ADC_SSMUX0_MUX0_M 0x00000007 ///< 1st Sample Input Select +#define ADC_SSMUX0_MUX7_S 28 +#define ADC_SSMUX0_MUX6_S 24 +#define ADC_SSMUX0_MUX5_S 20 +#define ADC_SSMUX0_MUX4_S 16 +#define ADC_SSMUX0_MUX3_S 12 +#define ADC_SSMUX0_MUX2_S 8 +#define ADC_SSMUX0_MUX1_S 4 +#define ADC_SSMUX0_MUX0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSCTL0 register. + */ +/*\{*/ +#define ADC_SSCTL0_TS7 0x80000000 ///< 8th Sample Temp Sensor Select +#define ADC_SSCTL0_IE7 0x40000000 ///< 8th Sample Interrupt Enable +#define ADC_SSCTL0_END7 0x20000000 ///< 8th Sample is End of Sequence +#define ADC_SSCTL0_D7 0x10000000 ///< 8th Sample Diff Input Select +#define ADC_SSCTL0_TS6 0x08000000 ///< 7th Sample Temp Sensor Select +#define ADC_SSCTL0_IE6 0x04000000 ///< 7th Sample Interrupt Enable +#define ADC_SSCTL0_END6 0x02000000 ///< 7th Sample is End of Sequence +#define ADC_SSCTL0_D6 0x01000000 ///< 7th Sample Diff Input Select +#define ADC_SSCTL0_TS5 0x00800000 ///< 6th Sample Temp Sensor Select +#define ADC_SSCTL0_IE5 0x00400000 ///< 6th Sample Interrupt Enable +#define ADC_SSCTL0_END5 0x00200000 ///< 6th Sample is End of Sequence +#define ADC_SSCTL0_D5 0x00100000 ///< 6th Sample Diff Input Select +#define ADC_SSCTL0_TS4 0x00080000 ///< 5th Sample Temp Sensor Select +#define ADC_SSCTL0_IE4 0x00040000 ///< 5th Sample Interrupt Enable +#define ADC_SSCTL0_END4 0x00020000 ///< 5th Sample is End of Sequence +#define ADC_SSCTL0_D4 0x00010000 ///< 5th Sample Diff Input Select +#define ADC_SSCTL0_TS3 0x00008000 ///< 4th Sample Temp Sensor Select +#define ADC_SSCTL0_IE3 0x00004000 ///< 4th Sample Interrupt Enable +#define ADC_SSCTL0_END3 0x00002000 ///< 4th Sample is End of Sequence +#define ADC_SSCTL0_D3 0x00001000 ///< 4th Sample Diff Input Select +#define ADC_SSCTL0_TS2 0x00000800 ///< 3rd Sample Temp Sensor Select +#define ADC_SSCTL0_IE2 0x00000400 ///< 3rd Sample Interrupt Enable +#define ADC_SSCTL0_END2 0x00000200 ///< 3rd Sample is End of Sequence +#define ADC_SSCTL0_D2 0x00000100 ///< 3rd Sample Diff Input Select +#define ADC_SSCTL0_TS1 0x00000080 ///< 2nd Sample Temp Sensor Select +#define ADC_SSCTL0_IE1 0x00000040 ///< 2nd Sample Interrupt Enable +#define ADC_SSCTL0_END1 0x00000020 ///< 2nd Sample is End of Sequence +#define ADC_SSCTL0_D1 0x00000010 ///< 2nd Sample Diff Input Select +#define ADC_SSCTL0_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL0_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL0_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL0_D0 0x00000001 ///< 1st Sample Diff Input Select +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFIFO0 register. + */ +/*\{*/ +#define ADC_SSFIFO0_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO0_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFSTAT0 register. + */ +/*\{*/ +#define ADC_SSFSTAT0_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT0_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT0_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT0_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT0_HPTR_S 4 +#define ADC_SSFSTAT0_TPTR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSMUX1 register. + */ +/*\{*/ +#define ADC_SSMUX1_MUX3_M 0x00007000 ///< 4th Sample Input Select +#define ADC_SSMUX1_MUX2_M 0x00000700 ///< 3rd Sample Input Select +#define ADC_SSMUX1_MUX1_M 0x00000070 ///< 2nd Sample Input Select +#define ADC_SSMUX1_MUX0_M 0x00000007 ///< 1st Sample Input Select +#define ADC_SSMUX1_MUX3_S 12 +#define ADC_SSMUX1_MUX2_S 8 +#define ADC_SSMUX1_MUX1_S 4 +#define ADC_SSMUX1_MUX0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSCTL1 register. + */ +/*\{*/ +#define ADC_SSCTL1_TS3 0x00008000 ///< 4th Sample Temp Sensor Select +#define ADC_SSCTL1_IE3 0x00004000 ///< 4th Sample Interrupt Enable +#define ADC_SSCTL1_END3 0x00002000 ///< 4th Sample is End of Sequence +#define ADC_SSCTL1_D3 0x00001000 ///< 4th Sample Diff Input Select +#define ADC_SSCTL1_TS2 0x00000800 ///< 3rd Sample Temp Sensor Select +#define ADC_SSCTL1_IE2 0x00000400 ///< 3rd Sample Interrupt Enable +#define ADC_SSCTL1_END2 0x00000200 ///< 3rd Sample is End of Sequence +#define ADC_SSCTL1_D2 0x00000100 ///< 3rd Sample Diff Input Select +#define ADC_SSCTL1_TS1 0x00000080 ///< 2nd Sample Temp Sensor Select +#define ADC_SSCTL1_IE1 0x00000040 ///< 2nd Sample Interrupt Enable +#define ADC_SSCTL1_END1 0x00000020 ///< 2nd Sample is End of Sequence +#define ADC_SSCTL1_D1 0x00000010 ///< 2nd Sample Diff Input Select +#define ADC_SSCTL1_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL1_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL1_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL1_D0 0x00000001 ///< 1st Sample Diff Input Select +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFIFO1 register. + */ +/*\{*/ +#define ADC_SSFIFO1_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO1_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFSTAT1 register. + */ +/*\{*/ +#define ADC_SSFSTAT1_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT1_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT1_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT1_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT1_HPTR_S 4 +#define ADC_SSFSTAT1_TPTR_S 0 +/*\}*/ + + +/** + * The following are defines for the bit fields in the ADC_O_SSCTL2 register. + */ +/*\{*/ +#define ADC_SSCTL2_TS3 0x00008000 ///< 4th Sample Temp Sensor Select +#define ADC_SSCTL2_IE3 0x00004000 ///< 4th Sample Interrupt Enable +#define ADC_SSCTL2_END3 0x00002000 ///< 4th Sample is End of Sequence +#define ADC_SSCTL2_D3 0x00001000 ///< 4th Sample Diff Input Select +#define ADC_SSCTL2_TS2 0x00000800 ///< 3rd Sample Temp Sensor Select +#define ADC_SSCTL2_IE2 0x00000400 ///< 3rd Sample Interrupt Enable +#define ADC_SSCTL2_END2 0x00000200 ///< 3rd Sample is End of Sequence +#define ADC_SSCTL2_D2 0x00000100 ///< 3rd Sample Diff Input Select +#define ADC_SSCTL2_TS1 0x00000080 ///< 2nd Sample Temp Sensor Select +#define ADC_SSCTL2_IE1 0x00000040 ///< 2nd Sample Interrupt Enable +#define ADC_SSCTL2_END1 0x00000020 ///< 2nd Sample is End of Sequence +#define ADC_SSCTL2_D1 0x00000010 ///< 2nd Sample Diff Input Select +#define ADC_SSCTL2_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL2_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL2_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL2_D0 0x00000001 ///< 1st Sample Diff Input Select +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFIFO2 register. + */ +/*\{*/ +#define ADC_SSFIFO2_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO2_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFSTAT2 register. + */ +/*\{*/ +#define ADC_SSFSTAT2_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT2_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT2_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT2_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT2_HPTR_S 4 +#define ADC_SSFSTAT2_TPTR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSCTL3 register. + */ +/*\{*/ +#define ADC_SSCTL3_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL3_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL3_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL3_D0 0x00000001 ///< 1st Sample Diff Input Select +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFIFO3 register. + */ +/*\{*/ +#define ADC_SSFIFO3_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO3_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_SSFSTAT3 register. + */ +/*\{*/ +#define ADC_SSFSTAT3_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT3_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT3_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT3_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT3_HPTR_S 4 +#define ADC_SSFSTAT3_TPTR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the ADC_O_TMLB register. + */ +/*\{*/ +#define ADC_TMLB_LB 0x00000001 ///< Loopback Mode Enable +/*\}*/ + +/** + * The following are defines for the the interpretation of the data in the +* SSFIFOx when the ADC TMLB is enabled. + */ +/*\{*/ +#define ADC_SSFIFO_TMLB_CNT_M 0x000003C0 ///< Continuous Sample Counter +#define ADC_SSFIFO_TMLB_CONT 0x00000020 ///< Continuation Sample Indicator +#define ADC_SSFIFO_TMLB_DIFF 0x00000010 ///< Differential Sample Indicator +#define ADC_SSFIFO_TMLB_TS 0x00000008 ///< Temp Sensor Sample Indicator +#define ADC_SSFIFO_TMLB_MUX_M 0x00000007 ///< Analog Input Indicator +#define ADC_SSFIFO_TMLB_CNT_S 6 ///< Sample counter shift +#define ADC_SSFIFO_TMLB_MUX_S 0 ///< Input channel number shift +/*\}*/ + + +/* + * The following are defines for the bit fields in the ADC_O_SSMUX0 register. + */ +#define ADC_SSMUX0_MUX7_S 28 +#define ADC_SSMUX0_MUX6_S 24 +#define ADC_SSMUX0_MUX5_S 20 +#define ADC_SSMUX0_MUX4_S 16 +#define ADC_SSMUX0_MUX3_S 12 +#define ADC_SSMUX0_MUX2_S 8 +#define ADC_SSMUX0_MUX1_S 4 +#define ADC_SSMUX0_MUX0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSCTL0 register. + */ +#define ADC_SSCTL0_TS7 0x80000000 ///< 8th Sample Temp Sensor Select +#define ADC_SSCTL0_IE7 0x40000000 ///< 8th Sample Interrupt Enable +#define ADC_SSCTL0_END7 0x20000000 ///< 8th Sample is End of Sequence +#define ADC_SSCTL0_D7 0x10000000 ///< 8th Sample Diff Input Select +#define ADC_SSCTL0_TS6 0x08000000 ///< 7th Sample Temp Sensor Select +#define ADC_SSCTL0_IE6 0x04000000 ///< 7th Sample Interrupt Enable +#define ADC_SSCTL0_END6 0x02000000 ///< 7th Sample is End of Sequence +#define ADC_SSCTL0_D6 0x01000000 ///< 7th Sample Diff Input Select +#define ADC_SSCTL0_TS5 0x00800000 ///< 6th Sample Temp Sensor Select +#define ADC_SSCTL0_IE5 0x00400000 ///< 6th Sample Interrupt Enable +#define ADC_SSCTL0_END5 0x00200000 ///< 6th Sample is End of Sequence +#define ADC_SSCTL0_D5 0x00100000 ///< 6th Sample Diff Input Select +#define ADC_SSCTL0_TS4 0x00080000 ///< 5th Sample Temp Sensor Select +#define ADC_SSCTL0_IE4 0x00040000 ///< 5th Sample Interrupt Enable +#define ADC_SSCTL0_END4 0x00020000 ///< 5th Sample is End of Sequence +#define ADC_SSCTL0_D4 0x00010000 ///< 5th Sample Diff Input Select +#define ADC_SSCTL0_TS3 0x00008000 ///< 4th Sample Temp Sensor Select +#define ADC_SSCTL0_IE3 0x00004000 ///< 4th Sample Interrupt Enable +#define ADC_SSCTL0_END3 0x00002000 ///< 4th Sample is End of Sequence +#define ADC_SSCTL0_D3 0x00001000 ///< 4th Sample Diff Input Select +#define ADC_SSCTL0_TS2 0x00000800 ///< 3rd Sample Temp Sensor Select +#define ADC_SSCTL0_IE2 0x00000400 ///< 3rd Sample Interrupt Enable +#define ADC_SSCTL0_END2 0x00000200 ///< 3rd Sample is End of Sequence +#define ADC_SSCTL0_D2 0x00000100 ///< 3rd Sample Diff Input Select +#define ADC_SSCTL0_TS1 0x00000080 ///< 2nd Sample Temp Sensor Select +#define ADC_SSCTL0_IE1 0x00000040 ///< 2nd Sample Interrupt Enable +#define ADC_SSCTL0_END1 0x00000020 ///< 2nd Sample is End of Sequence +#define ADC_SSCTL0_D1 0x00000010 ///< 2nd Sample Diff Input Select +#define ADC_SSCTL0_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL0_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL0_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL0_D0 0x00000001 ///< 1st Sample Diff Input Select + + +/* + * The following are defines for the bit fields in the ADC_O_SSFIFO0 register. + */ +#define ADC_SSFIFO0_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO0_DATA_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSFSTAT0 register. + */ +#define ADC_SSFSTAT0_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT0_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT0_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT0_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT0_HPTR_S 4 +#define ADC_SSFSTAT0_TPTR_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSOP0 register. + */ +#define ADC_SSOP0_S7DCOP 0x10000000 ///< Sample 7 Digital Comparator + ///< Operation +#define ADC_SSOP0_S6DCOP 0x01000000 ///< Sample 6 Digital Comparator + ///< Operation +#define ADC_SSOP0_S5DCOP 0x00100000 ///< Sample 5 Digital Comparator + ///< Operation +#define ADC_SSOP0_S4DCOP 0x00010000 ///< Sample 4 Digital Comparator + ///< Operation +#define ADC_SSOP0_S3DCOP 0x00001000 ///< Sample 3 Digital Comparator + ///< Operation +#define ADC_SSOP0_S2DCOP 0x00000100 ///< Sample 2 Digital Comparator + ///< Operation +#define ADC_SSOP0_S1DCOP 0x00000010 ///< Sample 1 Digital Comparator + ///< Operation +#define ADC_SSOP0_S0DCOP 0x00000001 ///< Sample 0 Digital Comparator + ///< Operation + + +/* + * The following are defines for the bit fields in the ADC_O_SSDC0 register. + */ +#define ADC_SSDC0_S7DCSEL_M 0xF0000000 ///< Sample 7 Digital Comparator + ///< Select +#define ADC_SSDC0_S6DCSEL_M 0x0F000000 ///< Sample 6 Digital Comparator + ///< Select +#define ADC_SSDC0_S5DCSEL_M 0x00F00000 ///< Sample 5 Digital Comparator + ///< Select +#define ADC_SSDC0_S4DCSEL_M 0x000F0000 ///< Sample 4 Digital Comparator + ///< Select +#define ADC_SSDC0_S3DCSEL_M 0x0000F000 ///< Sample 3 Digital Comparator + ///< Select +#define ADC_SSDC0_S2DCSEL_M 0x00000F00 ///< Sample 2 Digital Comparator + ///< Select +#define ADC_SSDC0_S1DCSEL_M 0x000000F0 ///< Sample 1 Digital Comparator + ///< Select +#define ADC_SSDC0_S0DCSEL_M 0x0000000F ///< Sample 0 Digital Comparator + ///< Select +#define ADC_SSDC0_S6DCSEL_S 24 +#define ADC_SSDC0_S5DCSEL_S 20 +#define ADC_SSDC0_S4DCSEL_S 16 +#define ADC_SSDC0_S3DCSEL_S 12 +#define ADC_SSDC0_S2DCSEL_S 8 +#define ADC_SSDC0_S1DCSEL_S 4 +#define ADC_SSDC0_S0DCSEL_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSCTL1 register. + */ +#define ADC_SSCTL1_TS3 0x00008000 ///< 4th Sample Temp Sensor Select +#define ADC_SSCTL1_IE3 0x00004000 ///< 4th Sample Interrupt Enable +#define ADC_SSCTL1_END3 0x00002000 ///< 4th Sample is End of Sequence +#define ADC_SSCTL1_D3 0x00001000 ///< 4th Sample Diff Input Select +#define ADC_SSCTL1_TS2 0x00000800 ///< 3rd Sample Temp Sensor Select +#define ADC_SSCTL1_IE2 0x00000400 ///< 3rd Sample Interrupt Enable +#define ADC_SSCTL1_END2 0x00000200 ///< 3rd Sample is End of Sequence +#define ADC_SSCTL1_D2 0x00000100 ///< 3rd Sample Diff Input Select +#define ADC_SSCTL1_TS1 0x00000080 ///< 2nd Sample Temp Sensor Select +#define ADC_SSCTL1_IE1 0x00000040 ///< 2nd Sample Interrupt Enable +#define ADC_SSCTL1_END1 0x00000020 ///< 2nd Sample is End of Sequence +#define ADC_SSCTL1_D1 0x00000010 ///< 2nd Sample Diff Input Select +#define ADC_SSCTL1_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL1_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL1_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL1_D0 0x00000001 ///< 1st Sample Diff Input Select + + +/* + * The following are defines for the bit fields in the ADC_O_SSFIFO1 register. + */ +#define ADC_SSFIFO1_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO1_DATA_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSFSTAT1 register. + */ +#define ADC_SSFSTAT1_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT1_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT1_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT1_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT1_HPTR_S 4 +#define ADC_SSFSTAT1_TPTR_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSOP1 register. + */ +#define ADC_SSOP1_S3DCOP 0x00001000 ///< Sample 3 Digital Comparator + ///< Operation +#define ADC_SSOP1_S2DCOP 0x00000100 ///< Sample 2 Digital Comparator + ///< Operation +#define ADC_SSOP1_S1DCOP 0x00000010 ///< Sample 1 Digital Comparator + ///< Operation +#define ADC_SSOP1_S0DCOP 0x00000001 ///< Sample 0 Digital Comparator + ///< Operation + + +/* + * The following are defines for the bit fields in the ADC_O_SSDC1 register. + */ +#define ADC_SSDC1_S3DCSEL_M 0x0000F000 ///< Sample 3 Digital Comparator + ///< Select +#define ADC_SSDC1_S2DCSEL_M 0x00000F00 ///< Sample 2 Digital Comparator + ///< Select +#define ADC_SSDC1_S1DCSEL_M 0x000000F0 ///< Sample 1 Digital Comparator + ///< Select +#define ADC_SSDC1_S0DCSEL_M 0x0000000F ///< Sample 0 Digital Comparator + ///< Select +#define ADC_SSDC1_S2DCSEL_S 8 +#define ADC_SSDC1_S1DCSEL_S 4 +#define ADC_SSDC1_S0DCSEL_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSMUX2 register. + */ +#define ADC_SSMUX2_MUX3_M 0x0000F000 ///< 4th Sample Input Select +#define ADC_SSMUX2_MUX2_M 0x00000F00 ///< 3rd Sample Input Select +#define ADC_SSMUX2_MUX1_M 0x000000F0 ///< 2nd Sample Input Select +#define ADC_SSMUX2_MUX0_M 0x0000000F ///< 1st Sample Input Select +#define ADC_SSMUX2_MUX3_S 12 +#define ADC_SSMUX2_MUX2_S 8 +#define ADC_SSMUX2_MUX1_S 4 +#define ADC_SSMUX2_MUX0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSCTL2 register. + */ +#define ADC_SSCTL2_TS3 0x00008000 ///< 4th Sample Temp Sensor Select +#define ADC_SSCTL2_IE3 0x00004000 ///< 4th Sample Interrupt Enable +#define ADC_SSCTL2_END3 0x00002000 ///< 4th Sample is End of Sequence +#define ADC_SSCTL2_D3 0x00001000 ///< 4th Sample Diff Input Select +#define ADC_SSCTL2_TS2 0x00000800 ///< 3rd Sample Temp Sensor Select +#define ADC_SSCTL2_IE2 0x00000400 ///< 3rd Sample Interrupt Enable +#define ADC_SSCTL2_END2 0x00000200 ///< 3rd Sample is End of Sequence +#define ADC_SSCTL2_D2 0x00000100 ///< 3rd Sample Diff Input Select +#define ADC_SSCTL2_TS1 0x00000080 ///< 2nd Sample Temp Sensor Select +#define ADC_SSCTL2_IE1 0x00000040 ///< 2nd Sample Interrupt Enable +#define ADC_SSCTL2_END1 0x00000020 ///< 2nd Sample is End of Sequence +#define ADC_SSCTL2_D1 0x00000010 ///< 2nd Sample Diff Input Select +#define ADC_SSCTL2_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL2_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL2_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL2_D0 0x00000001 ///< 1st Sample Diff Input Select + + +/* + * The following are defines for the bit fields in the ADC_O_SSFIFO2 register. + */ +#define ADC_SSFIFO2_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO2_DATA_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSFSTAT2 register. + */ +#define ADC_SSFSTAT2_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT2_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT2_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT2_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT2_HPTR_S 4 +#define ADC_SSFSTAT2_TPTR_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSOP2 register. + */ +#define ADC_SSOP2_S3DCOP 0x00001000 ///< Sample 3 Digital Comparator + ///< Operation +#define ADC_SSOP2_S2DCOP 0x00000100 ///< Sample 2 Digital Comparator + ///< Operation +#define ADC_SSOP2_S1DCOP 0x00000010 ///< Sample 1 Digital Comparator + ///< Operation +#define ADC_SSOP2_S0DCOP 0x00000001 ///< Sample 0 Digital Comparator + ///< Operation + + +/* + * The following are defines for the bit fields in the ADC_O_SSDC2 register. + */ +#define ADC_SSDC2_S3DCSEL_M 0x0000F000 ///< Sample 3 Digital Comparator + ///< Select +#define ADC_SSDC2_S2DCSEL_M 0x00000F00 ///< Sample 2 Digital Comparator + ///< Select +#define ADC_SSDC2_S1DCSEL_M 0x000000F0 ///< Sample 1 Digital Comparator + ///< Select +#define ADC_SSDC2_S0DCSEL_M 0x0000000F ///< Sample 0 Digital Comparator + ///< Select +#define ADC_SSDC2_S2DCSEL_S 8 +#define ADC_SSDC2_S1DCSEL_S 4 +#define ADC_SSDC2_S0DCSEL_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSMUX3 register. + */ +#define ADC_SSMUX3_MUX0_M 0x0000000F ///< 1st Sample Input Select +#define ADC_SSMUX3_MUX0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSCTL3 register. + */ +#define ADC_SSCTL3_TS0 0x00000008 ///< 1st Sample Temp Sensor Select +#define ADC_SSCTL3_IE0 0x00000004 ///< 1st Sample Interrupt Enable +#define ADC_SSCTL3_END0 0x00000002 ///< 1st Sample is End of Sequence +#define ADC_SSCTL3_D0 0x00000001 ///< 1st Sample Diff Input Select + + +/* + * The following are defines for the bit fields in the ADC_O_SSFIFO3 register. + */ +#define ADC_SSFIFO3_DATA_M 0x000003FF ///< Conversion Result Data +#define ADC_SSFIFO3_DATA_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSFSTAT3 register. + */ +#define ADC_SSFSTAT3_FULL 0x00001000 ///< FIFO Full +#define ADC_SSFSTAT3_EMPTY 0x00000100 ///< FIFO Empty +#define ADC_SSFSTAT3_HPTR_M 0x000000F0 ///< FIFO Head Pointer +#define ADC_SSFSTAT3_TPTR_M 0x0000000F ///< FIFO Tail Pointer +#define ADC_SSFSTAT3_HPTR_S 4 +#define ADC_SSFSTAT3_TPTR_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_SSOP3 register. + */ +#define ADC_SSOP3_S0DCOP 0x00000001 ///< Sample 0 Digital Comparator + ///< Operation + + +/* + * The following are defines for the bit fields in the ADC_O_SSDC3 register. + */ +#define ADC_SSDC3_S0DCSEL_M 0x0000000F ///< Sample 0 Digital Comparator + ///< Select + + +/* + * The following are defines for the bit fields in the ADC_O_TMLB register. + */ +#define ADC_TMLB_LB 0x00000001 ///< Loopback Mode Enable + + +/* + * The following are defines for the bit fields in the ADC_O_DCRIC register. + */ +#define ADC_DCRIC_DCTRIG7 0x00800000 ///< Digital Comparator Trigger 7 +#define ADC_DCRIC_DCTRIG6 0x00400000 ///< Digital Comparator Trigger 6 +#define ADC_DCRIC_DCTRIG5 0x00200000 ///< Digital Comparator Trigger 5 +#define ADC_DCRIC_DCTRIG4 0x00100000 ///< Digital Comparator Trigger 4 +#define ADC_DCRIC_DCTRIG3 0x00080000 ///< Digital Comparator Trigger 3 +#define ADC_DCRIC_DCTRIG2 0x00040000 ///< Digital Comparator Trigger 2 +#define ADC_DCRIC_DCTRIG1 0x00020000 ///< Digital Comparator Trigger 1 +#define ADC_DCRIC_DCTRIG0 0x00010000 ///< Digital Comparator Trigger 0 +#define ADC_DCRIC_DCINT7 0x00000080 ///< Digital Comparator Interrupt 7 +#define ADC_DCRIC_DCINT6 0x00000040 ///< Digital Comparator Interrupt 6 +#define ADC_DCRIC_DCINT5 0x00000020 ///< Digital Comparator Interrupt 5 +#define ADC_DCRIC_DCINT4 0x00000010 ///< Digital Comparator Interrupt 4 +#define ADC_DCRIC_DCINT3 0x00000008 ///< Digital Comparator Interrupt 3 +#define ADC_DCRIC_DCINT2 0x00000004 ///< Digital Comparator Interrupt 2 +#define ADC_DCRIC_DCINT1 0x00000002 ///< Digital Comparator Interrupt 1 +#define ADC_DCRIC_DCINT0 0x00000001 ///< Digital Comparator Interrupt 0 + + +/* + * The following are defines for the bit fields in the ADC_O_DCCTL0 register. + */ +#define ADC_DCCTL0_CTE 0x00001000 ///< Comparison Trigger Enable +#define ADC_DCCTL0_CTC_M 0x00000C00 ///< Comparison Trigger Condition +#define ADC_DCCTL0_CTC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL0_CTC_MID 0x00000400 ///< Mid Band +#define ADC_DCCTL0_CTC_HIGH 0x00000C00 ///< High Band +#define ADC_DCCTL0_CTM_M 0x00000300 ///< Comparison Trigger Mode +#define ADC_DCCTL0_CTM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL0_CTM_ONCE 0x00000100 ///< Once +#define ADC_DCCTL0_CTM_HALWAYS 0x00000200 ///< Hysteresis Always +#define ADC_DCCTL0_CTM_HONCE 0x00000300 ///< Hysteresis Once +#define ADC_DCCTL0_CIE 0x00000010 ///< Comparison Interrupt Enable +#define ADC_DCCTL0_CIC_M 0x0000000C ///< Comparison Interrupt Condition +#define ADC_DCCTL0_CIC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL0_CIC_MID 0x00000004 ///< Mid Band +#define ADC_DCCTL0_CIC_HIGH 0x0000000C ///< High Band +#define ADC_DCCTL0_CIM_M 0x00000003 ///< Comparison Interrupt Mode +#define ADC_DCCTL0_CIM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL0_CIM_ONCE 0x00000001 ///< Once +#define ADC_DCCTL0_CIM_HALWAYS 0x00000002 ///< Hysteresis Always +#define ADC_DCCTL0_CIM_HONCE 0x00000003 ///< Hysteresis Once + + +/* + * The following are defines for the bit fields in the ADC_O_DCCTL1 register. + */ +#define ADC_DCCTL1_CTE 0x00001000 ///< Comparison Trigger Enable +#define ADC_DCCTL1_CTC_M 0x00000C00 ///< Comparison Trigger Condition +#define ADC_DCCTL1_CTC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL1_CTC_MID 0x00000400 ///< Mid Band +#define ADC_DCCTL1_CTC_HIGH 0x00000C00 ///< High Band +#define ADC_DCCTL1_CTM_M 0x00000300 ///< Comparison Trigger Mode +#define ADC_DCCTL1_CTM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL1_CTM_ONCE 0x00000100 ///< Once +#define ADC_DCCTL1_CTM_HALWAYS 0x00000200 ///< Hysteresis Always +#define ADC_DCCTL1_CTM_HONCE 0x00000300 ///< Hysteresis Once +#define ADC_DCCTL1_CIE 0x00000010 ///< Comparison Interrupt Enable +#define ADC_DCCTL1_CIC_M 0x0000000C ///< Comparison Interrupt Condition +#define ADC_DCCTL1_CIC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL1_CIC_MID 0x00000004 ///< Mid Band +#define ADC_DCCTL1_CIC_HIGH 0x0000000C ///< High Band +#define ADC_DCCTL1_CIM_M 0x00000003 ///< Comparison Interrupt Mode +#define ADC_DCCTL1_CIM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL1_CIM_ONCE 0x00000001 ///< Once +#define ADC_DCCTL1_CIM_HALWAYS 0x00000002 ///< Hysteresis Always +#define ADC_DCCTL1_CIM_HONCE 0x00000003 ///< Hysteresis Once + + +/* + * The following are defines for the bit fields in the ADC_O_DCCTL2 register. + */ +#define ADC_DCCTL2_CTE 0x00001000 ///< Comparison Trigger Enable +#define ADC_DCCTL2_CTC_M 0x00000C00 ///< Comparison Trigger Condition +#define ADC_DCCTL2_CTC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL2_CTC_MID 0x00000400 ///< Mid Band +#define ADC_DCCTL2_CTC_HIGH 0x00000C00 ///< High Band +#define ADC_DCCTL2_CTM_M 0x00000300 ///< Comparison Trigger Mode +#define ADC_DCCTL2_CTM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL2_CTM_ONCE 0x00000100 ///< Once +#define ADC_DCCTL2_CTM_HALWAYS 0x00000200 ///< Hysteresis Always +#define ADC_DCCTL2_CTM_HONCE 0x00000300 ///< Hysteresis Once +#define ADC_DCCTL2_CIE 0x00000010 ///< Comparison Interrupt Enable +#define ADC_DCCTL2_CIC_M 0x0000000C ///< Comparison Interrupt Condition +#define ADC_DCCTL2_CIC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL2_CIC_MID 0x00000004 ///< Mid Band +#define ADC_DCCTL2_CIC_HIGH 0x0000000C ///< High Band +#define ADC_DCCTL2_CIM_M 0x00000003 ///< Comparison Interrupt Mode +#define ADC_DCCTL2_CIM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL2_CIM_ONCE 0x00000001 ///< Once +#define ADC_DCCTL2_CIM_HALWAYS 0x00000002 ///< Hysteresis Always +#define ADC_DCCTL2_CIM_HONCE 0x00000003 ///< Hysteresis Once + + +/* + * The following are defines for the bit fields in the ADC_O_DCCTL3 register. + */ +#define ADC_DCCTL3_CTE 0x00001000 ///< Comparison Trigger Enable +#define ADC_DCCTL3_CTC_M 0x00000C00 ///< Comparison Trigger Condition +#define ADC_DCCTL3_CTC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL3_CTC_MID 0x00000400 ///< Mid Band +#define ADC_DCCTL3_CTC_HIGH 0x00000C00 ///< High Band +#define ADC_DCCTL3_CTM_M 0x00000300 ///< Comparison Trigger Mode +#define ADC_DCCTL3_CTM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL3_CTM_ONCE 0x00000100 ///< Once +#define ADC_DCCTL3_CTM_HALWAYS 0x00000200 ///< Hysteresis Always +#define ADC_DCCTL3_CTM_HONCE 0x00000300 ///< Hysteresis Once +#define ADC_DCCTL3_CIE 0x00000010 ///< Comparison Interrupt Enable +#define ADC_DCCTL3_CIC_M 0x0000000C ///< Comparison Interrupt Condition +#define ADC_DCCTL3_CIC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL3_CIC_MID 0x00000004 ///< Mid Band +#define ADC_DCCTL3_CIC_HIGH 0x0000000C ///< High Band +#define ADC_DCCTL3_CIM_M 0x00000003 ///< Comparison Interrupt Mode +#define ADC_DCCTL3_CIM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL3_CIM_ONCE 0x00000001 ///< Once +#define ADC_DCCTL3_CIM_HALWAYS 0x00000002 ///< Hysteresis Always +#define ADC_DCCTL3_CIM_HONCE 0x00000003 ///< Hysteresis Once + + +/* + * The following are defines for the bit fields in the ADC_O_DCCTL4 register. + */ +#define ADC_DCCTL4_CTE 0x00001000 ///< Comparison Trigger Enable +#define ADC_DCCTL4_CTC_M 0x00000C00 ///< Comparison Trigger Condition +#define ADC_DCCTL4_CTC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL4_CTC_MID 0x00000400 ///< Mid Band +#define ADC_DCCTL4_CTC_HIGH 0x00000C00 ///< High Band +#define ADC_DCCTL4_CTM_M 0x00000300 ///< Comparison Trigger Mode +#define ADC_DCCTL4_CTM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL4_CTM_ONCE 0x00000100 ///< Once +#define ADC_DCCTL4_CTM_HALWAYS 0x00000200 ///< Hysteresis Always +#define ADC_DCCTL4_CTM_HONCE 0x00000300 ///< Hysteresis Once +#define ADC_DCCTL4_CIE 0x00000010 ///< Comparison Interrupt Enable +#define ADC_DCCTL4_CIC_M 0x0000000C ///< Comparison Interrupt Condition +#define ADC_DCCTL4_CIC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL4_CIC_MID 0x00000004 ///< Mid Band +#define ADC_DCCTL4_CIC_HIGH 0x0000000C ///< High Band +#define ADC_DCCTL4_CIM_M 0x00000003 ///< Comparison Interrupt Mode +#define ADC_DCCTL4_CIM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL4_CIM_ONCE 0x00000001 ///< Once +#define ADC_DCCTL4_CIM_HALWAYS 0x00000002 ///< Hysteresis Always +#define ADC_DCCTL4_CIM_HONCE 0x00000003 ///< Hysteresis Once + + +/* + * The following are defines for the bit fields in the ADC_O_DCCTL5 register. + */ +#define ADC_DCCTL5_CTE 0x00001000 ///< Comparison Trigger Enable +#define ADC_DCCTL5_CTC_M 0x00000C00 ///< Comparison Trigger Condition +#define ADC_DCCTL5_CTC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL5_CTC_MID 0x00000400 ///< Mid Band +#define ADC_DCCTL5_CTC_HIGH 0x00000C00 ///< High Band +#define ADC_DCCTL5_CTM_M 0x00000300 ///< Comparison Trigger Mode +#define ADC_DCCTL5_CTM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL5_CTM_ONCE 0x00000100 ///< Once +#define ADC_DCCTL5_CTM_HALWAYS 0x00000200 ///< Hysteresis Always +#define ADC_DCCTL5_CTM_HONCE 0x00000300 ///< Hysteresis Once +#define ADC_DCCTL5_CIE 0x00000010 ///< Comparison Interrupt Enable +#define ADC_DCCTL5_CIC_M 0x0000000C ///< Comparison Interrupt Condition +#define ADC_DCCTL5_CIC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL5_CIC_MID 0x00000004 ///< Mid Band +#define ADC_DCCTL5_CIC_HIGH 0x0000000C ///< High Band +#define ADC_DCCTL5_CIM_M 0x00000003 ///< Comparison Interrupt Mode +#define ADC_DCCTL5_CIM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL5_CIM_ONCE 0x00000001 ///< Once +#define ADC_DCCTL5_CIM_HALWAYS 0x00000002 ///< Hysteresis Always +#define ADC_DCCTL5_CIM_HONCE 0x00000003 ///< Hysteresis Once + + +/* + * The following are defines for the bit fields in the ADC_O_DCCTL6 register. + */ +#define ADC_DCCTL6_CTE 0x00001000 ///< Comparison Trigger Enable +#define ADC_DCCTL6_CTC_M 0x00000C00 ///< Comparison Trigger Condition +#define ADC_DCCTL6_CTC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL6_CTC_MID 0x00000400 ///< Mid Band +#define ADC_DCCTL6_CTC_HIGH 0x00000C00 ///< High Band +#define ADC_DCCTL6_CTM_M 0x00000300 ///< Comparison Trigger Mode +#define ADC_DCCTL6_CTM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL6_CTM_ONCE 0x00000100 ///< Once +#define ADC_DCCTL6_CTM_HALWAYS 0x00000200 ///< Hysteresis Always +#define ADC_DCCTL6_CTM_HONCE 0x00000300 ///< Hysteresis Once +#define ADC_DCCTL6_CIE 0x00000010 ///< Comparison Interrupt Enable +#define ADC_DCCTL6_CIC_M 0x0000000C ///< Comparison Interrupt Condition +#define ADC_DCCTL6_CIC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL6_CIC_MID 0x00000004 ///< Mid Band +#define ADC_DCCTL6_CIC_HIGH 0x0000000C ///< High Band +#define ADC_DCCTL6_CIM_M 0x00000003 ///< Comparison Interrupt Mode +#define ADC_DCCTL6_CIM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL6_CIM_ONCE 0x00000001 ///< Once +#define ADC_DCCTL6_CIM_HALWAYS 0x00000002 ///< Hysteresis Always +#define ADC_DCCTL6_CIM_HONCE 0x00000003 ///< Hysteresis Once + + +/* + * The following are defines for the bit fields in the ADC_O_DCCTL7 register. + */ +#define ADC_DCCTL7_CTE 0x00001000 ///< Comparison Trigger Enable +#define ADC_DCCTL7_CTC_M 0x00000C00 ///< Comparison Trigger Condition +#define ADC_DCCTL7_CTC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL7_CTC_MID 0x00000400 ///< Mid Band +#define ADC_DCCTL7_CTC_HIGH 0x00000C00 ///< High Band +#define ADC_DCCTL7_CTM_M 0x00000300 ///< Comparison Trigger Mode +#define ADC_DCCTL7_CTM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL7_CTM_ONCE 0x00000100 ///< Once +#define ADC_DCCTL7_CTM_HALWAYS 0x00000200 ///< Hysteresis Always +#define ADC_DCCTL7_CTM_HONCE 0x00000300 ///< Hysteresis Once +#define ADC_DCCTL7_CIE 0x00000010 ///< Comparison Interrupt Enable +#define ADC_DCCTL7_CIC_M 0x0000000C ///< Comparison Interrupt Condition +#define ADC_DCCTL7_CIC_LOW 0x00000000 ///< Low Band +#define ADC_DCCTL7_CIC_MID 0x00000004 ///< Mid Band +#define ADC_DCCTL7_CIC_HIGH 0x0000000C ///< High Band +#define ADC_DCCTL7_CIM_M 0x00000003 ///< Comparison Interrupt Mode +#define ADC_DCCTL7_CIM_ALWAYS 0x00000000 ///< Always +#define ADC_DCCTL7_CIM_ONCE 0x00000001 ///< Once +#define ADC_DCCTL7_CIM_HALWAYS 0x00000002 ///< Hysteresis Always +#define ADC_DCCTL7_CIM_HONCE 0x00000003 ///< Hysteresis Once + + +/* + * The following are defines for the bit fields in the ADC_O_DCCMP0 register. + */ +#define ADC_DCCMP0_COMP1_M 0x03FF0000 ///< Compare 1 +#define ADC_DCCMP0_COMP0_M 0x000003FF ///< Compare 0 +#define ADC_DCCMP0_COMP1_S 16 +#define ADC_DCCMP0_COMP0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_DCCMP1 register. + */ +#define ADC_DCCMP1_COMP1_M 0x03FF0000 ///< Compare 1 +#define ADC_DCCMP1_COMP0_M 0x000003FF ///< Compare 0 +#define ADC_DCCMP1_COMP1_S 16 +#define ADC_DCCMP1_COMP0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_DCCMP2 register. + */ +#define ADC_DCCMP2_COMP1_M 0x03FF0000 ///< Compare 1 +#define ADC_DCCMP2_COMP0_M 0x000003FF ///< Compare 0 +#define ADC_DCCMP2_COMP1_S 16 +#define ADC_DCCMP2_COMP0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_DCCMP3 register. + */ +#define ADC_DCCMP3_COMP1_M 0x03FF0000 ///< Compare 1 +#define ADC_DCCMP3_COMP0_M 0x000003FF ///< Compare 0 +#define ADC_DCCMP3_COMP1_S 16 +#define ADC_DCCMP3_COMP0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_DCCMP4 register. + */ +#define ADC_DCCMP4_COMP1_M 0x03FF0000 ///< Compare 1 +#define ADC_DCCMP4_COMP0_M 0x000003FF ///< Compare 0 +#define ADC_DCCMP4_COMP1_S 16 +#define ADC_DCCMP4_COMP0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_DCCMP5 register. + */ +#define ADC_DCCMP5_COMP1_M 0x03FF0000 ///< Compare 1 +#define ADC_DCCMP5_COMP0_M 0x000003FF ///< Compare 0 +#define ADC_DCCMP5_COMP1_S 16 +#define ADC_DCCMP5_COMP0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_DCCMP6 register. + */ +#define ADC_DCCMP6_COMP1_M 0x03FF0000 ///< Compare 1 +#define ADC_DCCMP6_COMP0_M 0x000003FF ///< Compare 0 +#define ADC_DCCMP6_COMP1_S 16 +#define ADC_DCCMP6_COMP0_S 0 + + +/* + * The following are defines for the bit fields in the ADC_O_DCCMP7 register. + */ +#define ADC_DCCMP7_COMP1_M 0x03FF0000 ///< Compare 1 +#define ADC_DCCMP7_COMP0_M 0x000003FF ///< Compare 0 +#define ADC_DCCMP7_COMP1_S 16 +#define ADC_DCCMP7_COMP0_S 0 + + +/* + * The following are defines for the the interpretation of the data in the + * SSFIFOx when the ADC TMLB is enabled. + */ + +#define ADC_SSFIFO_TMLB_CNT_M 0x000003C0 ///< Continuous Sample Counter +#define ADC_SSFIFO_TMLB_CONT 0x00000020 ///< Continuation Sample Indicator +#define ADC_SSFIFO_TMLB_DIFF 0x00000010 ///< Differential Sample Indicator +#define ADC_SSFIFO_TMLB_TS 0x00000008 ///< Temp Sensor Sample Indicator +#define ADC_SSFIFO_TMLB_MUX_M 0x00000007 ///< Analog Input Indicator +#define ADC_SSFIFO_TMLB_CNT_S 6 ///< Sample counter shift +#define ADC_SSFIFO_TMLB_MUX_S 0 ///< Input channel number shift + +#endif /* LM3S_ADC_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_com.h b/bertos/cpu/cortex-m3/io/lm3s_com.h new file mode 100644 index 0000000..ee87158 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_com.h @@ -0,0 +1,3355 @@ +/** + * \file + * + * + * \brief LM3S1968 registers definition. + */ + +#ifndef LM3S1968_H +#define LM3S1968_H + +#include + +/** + * Watchdog Timer registers (WATCHDOG0) + */ +/*\{*/ +#define WATCHDOG0_LOAD_R (*((reg32_t *)0x40000000)) +#define WATCHDOG0_VALUE_R (*((reg32_t *)0x40000004)) +#define WATCHDOG0_CTL_R (*((reg32_t *)0x40000008)) +#define WATCHDOG0_ICR_R (*((reg32_t *)0x4000000C)) +#define WATCHDOG0_RIS_R (*((reg32_t *)0x40000010)) +#define WATCHDOG0_MIS_R (*((reg32_t *)0x40000014)) +#define WATCHDOG0_TEST_R (*((reg32_t *)0x40000418)) +#define WATCHDOG0_LOCK_R (*((reg32_t *)0x40000C00)) +/*\}*/ + +/** + * GPIO registers (PORTA) + */ +/*\{*/ +#define GPIO_PORTA_DATA_BITS_R ((reg32_t *)0x40004000) +#define GPIO_PORTA_DATA_R (*((reg32_t *)0x400043FC)) +#define GPIO_PORTA_DIR_R (*((reg32_t *)0x40004400)) +#define GPIO_PORTA_IS_R (*((reg32_t *)0x40004404)) +#define GPIO_PORTA_IBE_R (*((reg32_t *)0x40004408)) +#define GPIO_PORTA_IEV_R (*((reg32_t *)0x4000440C)) +#define GPIO_PORTA_IM_R (*((reg32_t *)0x40004410)) +#define GPIO_PORTA_RIS_R (*((reg32_t *)0x40004414)) +#define GPIO_PORTA_MIS_R (*((reg32_t *)0x40004418)) +#define GPIO_PORTA_ICR_R (*((reg32_t *)0x4000441C)) +#define GPIO_PORTA_AFSEL_R (*((reg32_t *)0x40004420)) +#define GPIO_PORTA_DR2R_R (*((reg32_t *)0x40004500)) +#define GPIO_PORTA_DR4R_R (*((reg32_t *)0x40004504)) +#define GPIO_PORTA_DR8R_R (*((reg32_t *)0x40004508)) +#define GPIO_PORTA_ODR_R (*((reg32_t *)0x4000450C)) +#define GPIO_PORTA_PUR_R (*((reg32_t *)0x40004510)) +#define GPIO_PORTA_PDR_R (*((reg32_t *)0x40004514)) +#define GPIO_PORTA_SLR_R (*((reg32_t *)0x40004518)) +#define GPIO_PORTA_DEN_R (*((reg32_t *)0x4000451C)) +#define GPIO_PORTA_LOCK_R (*((reg32_t *)0x40004520)) +#define GPIO_PORTA_CR_R (*((reg32_t *)0x40004524)) +/*\}*/ + +/** + * GPIO registers (PORTB) + */ +/*\{*/ +#define GPIO_PORTB_DATA_BITS_R ((reg32_t *)0x40005000) +#define GPIO_PORTB_DATA_R (*((reg32_t *)0x400053FC)) +#define GPIO_PORTB_DIR_R (*((reg32_t *)0x40005400)) +#define GPIO_PORTB_IS_R (*((reg32_t *)0x40005404)) +#define GPIO_PORTB_IBE_R (*((reg32_t *)0x40005408)) +#define GPIO_PORTB_IEV_R (*((reg32_t *)0x4000540C)) +#define GPIO_PORTB_IM_R (*((reg32_t *)0x40005410)) +#define GPIO_PORTB_RIS_R (*((reg32_t *)0x40005414)) +#define GPIO_PORTB_MIS_R (*((reg32_t *)0x40005418)) +#define GPIO_PORTB_ICR_R (*((reg32_t *)0x4000541C)) +#define GPIO_PORTB_AFSEL_R (*((reg32_t *)0x40005420)) +#define GPIO_PORTB_DR2R_R (*((reg32_t *)0x40005500)) +#define GPIO_PORTB_DR4R_R (*((reg32_t *)0x40005504)) +#define GPIO_PORTB_DR8R_R (*((reg32_t *)0x40005508)) +#define GPIO_PORTB_ODR_R (*((reg32_t *)0x4000550C)) +#define GPIO_PORTB_PUR_R (*((reg32_t *)0x40005510)) +#define GPIO_PORTB_PDR_R (*((reg32_t *)0x40005514)) +#define GPIO_PORTB_SLR_R (*((reg32_t *)0x40005518)) +#define GPIO_PORTB_DEN_R (*((reg32_t *)0x4000551C)) +#define GPIO_PORTB_LOCK_R (*((reg32_t *)0x40005520)) +#define GPIO_PORTB_CR_R (*((reg32_t *)0x40005524)) +/*\}*/ + +/** + * GPIO registers (PORTC) + */ +/*\{*/ +#define GPIO_PORTC_DATA_BITS_R ((reg32_t *)0x40006000) +#define GPIO_PORTC_DATA_R (*((reg32_t *)0x400063FC)) +#define GPIO_PORTC_DIR_R (*((reg32_t *)0x40006400)) +#define GPIO_PORTC_IS_R (*((reg32_t *)0x40006404)) +#define GPIO_PORTC_IBE_R (*((reg32_t *)0x40006408)) +#define GPIO_PORTC_IEV_R (*((reg32_t *)0x4000640C)) +#define GPIO_PORTC_IM_R (*((reg32_t *)0x40006410)) +#define GPIO_PORTC_RIS_R (*((reg32_t *)0x40006414)) +#define GPIO_PORTC_MIS_R (*((reg32_t *)0x40006418)) +#define GPIO_PORTC_ICR_R (*((reg32_t *)0x4000641C)) +#define GPIO_PORTC_AFSEL_R (*((reg32_t *)0x40006420)) +#define GPIO_PORTC_DR2R_R (*((reg32_t *)0x40006500)) +#define GPIO_PORTC_DR4R_R (*((reg32_t *)0x40006504)) +#define GPIO_PORTC_DR8R_R (*((reg32_t *)0x40006508)) +#define GPIO_PORTC_ODR_R (*((reg32_t *)0x4000650C)) +#define GPIO_PORTC_PUR_R (*((reg32_t *)0x40006510)) +#define GPIO_PORTC_PDR_R (*((reg32_t *)0x40006514)) +#define GPIO_PORTC_SLR_R (*((reg32_t *)0x40006518)) +#define GPIO_PORTC_DEN_R (*((reg32_t *)0x4000651C)) +#define GPIO_PORTC_LOCK_R (*((reg32_t *)0x40006520)) +#define GPIO_PORTC_CR_R (*((reg32_t *)0x40006524)) +/*\}*/ + +/** + * GPIO registers (PORTD) + */ +/*\{*/ +#define GPIO_PORTD_DATA_BITS_R ((reg32_t *)0x40007000) +#define GPIO_PORTD_DATA_R (*((reg32_t *)0x400073FC)) +#define GPIO_PORTD_DIR_R (*((reg32_t *)0x40007400)) +#define GPIO_PORTD_IS_R (*((reg32_t *)0x40007404)) +#define GPIO_PORTD_IBE_R (*((reg32_t *)0x40007408)) +#define GPIO_PORTD_IEV_R (*((reg32_t *)0x4000740C)) +#define GPIO_PORTD_IM_R (*((reg32_t *)0x40007410)) +#define GPIO_PORTD_RIS_R (*((reg32_t *)0x40007414)) +#define GPIO_PORTD_MIS_R (*((reg32_t *)0x40007418)) +#define GPIO_PORTD_ICR_R (*((reg32_t *)0x4000741C)) +#define GPIO_PORTD_AFSEL_R (*((reg32_t *)0x40007420)) +#define GPIO_PORTD_DR2R_R (*((reg32_t *)0x40007500)) +#define GPIO_PORTD_DR4R_R (*((reg32_t *)0x40007504)) +#define GPIO_PORTD_DR8R_R (*((reg32_t *)0x40007508)) +#define GPIO_PORTD_ODR_R (*((reg32_t *)0x4000750C)) +#define GPIO_PORTD_PUR_R (*((reg32_t *)0x40007510)) +#define GPIO_PORTD_PDR_R (*((reg32_t *)0x40007514)) +#define GPIO_PORTD_SLR_R (*((reg32_t *)0x40007518)) +#define GPIO_PORTD_DEN_R (*((reg32_t *)0x4000751C)) +#define GPIO_PORTD_LOCK_R (*((reg32_t *)0x40007520)) +#define GPIO_PORTD_CR_R (*((reg32_t *)0x40007524)) +/*\}*/ + +/** + * SSI registers (SSI0) + */ +/*\{*/ +#define SSI0_CR0_R (*((reg32_t *)0x40008000)) +#define SSI0_CR1_R (*((reg32_t *)0x40008004)) +#define SSI0_DR_R (*((reg32_t *)0x40008008)) +#define SSI0_SR_R (*((reg32_t *)0x4000800C)) +#define SSI0_CPSR_R (*((reg32_t *)0x40008010)) +#define SSI0_IM_R (*((reg32_t *)0x40008014)) +#define SSI0_RIS_R (*((reg32_t *)0x40008018)) +#define SSI0_MIS_R (*((reg32_t *)0x4000801C)) +#define SSI0_ICR_R (*((reg32_t *)0x40008020)) +/*\}*/ + +/** + * SSI registers (SSI1) + */ +/*\{*/ +#define SSI1_CR0_R (*((reg32_t *)0x40009000)) +#define SSI1_CR1_R (*((reg32_t *)0x40009004)) +#define SSI1_DR_R (*((reg32_t *)0x40009008)) +#define SSI1_SR_R (*((reg32_t *)0x4000900C)) +#define SSI1_CPSR_R (*((reg32_t *)0x40009010)) +#define SSI1_IM_R (*((reg32_t *)0x40009014)) +#define SSI1_RIS_R (*((reg32_t *)0x40009018)) +#define SSI1_MIS_R (*((reg32_t *)0x4000901C)) +#define SSI1_ICR_R (*((reg32_t *)0x40009020)) +/*\}*/ + +/** + * UART registers (UART0) + */ +/*\{*/ +#define UART0_DR_R (*((reg32_t *)0x4000C000)) +#define UART0_RSR_R (*((reg32_t *)0x4000C004)) +#define UART0_ECR_R (*((reg32_t *)0x4000C004)) +#define UART0_FR_R (*((reg32_t *)0x4000C018)) +#define UART0_ILPR_R (*((reg32_t *)0x4000C020)) +#define UART0_IBRD_R (*((reg32_t *)0x4000C024)) +#define UART0_FBRD_R (*((reg32_t *)0x4000C028)) +#define UART0_LCRH_R (*((reg32_t *)0x4000C02C)) +#define UART0_CTL_R (*((reg32_t *)0x4000C030)) +#define UART0_IFLS_R (*((reg32_t *)0x4000C034)) +#define UART0_IM_R (*((reg32_t *)0x4000C038)) +#define UART0_RIS_R (*((reg32_t *)0x4000C03C)) +#define UART0_MIS_R (*((reg32_t *)0x4000C040)) +#define UART0_ICR_R (*((reg32_t *)0x4000C044)) +/*\}*/ + +/** + * UART registers (UART1) + */ +/*\{*/ +#define UART1_DR_R (*((reg32_t *)0x4000D000)) +#define UART1_RSR_R (*((reg32_t *)0x4000D004)) +#define UART1_ECR_R (*((reg32_t *)0x4000D004)) +#define UART1_FR_R (*((reg32_t *)0x4000D018)) +#define UART1_ILPR_R (*((reg32_t *)0x4000D020)) +#define UART1_IBRD_R (*((reg32_t *)0x4000D024)) +#define UART1_FBRD_R (*((reg32_t *)0x4000D028)) +#define UART1_LCRH_R (*((reg32_t *)0x4000D02C)) +#define UART1_CTL_R (*((reg32_t *)0x4000D030)) +#define UART1_IFLS_R (*((reg32_t *)0x4000D034)) +#define UART1_IM_R (*((reg32_t *)0x4000D038)) +#define UART1_RIS_R (*((reg32_t *)0x4000D03C)) +#define UART1_MIS_R (*((reg32_t *)0x4000D040)) +#define UART1_ICR_R (*((reg32_t *)0x4000D044)) +/*\}*/ + +/** + * UART registers (UART2) + */ +/*\{*/ +#define UART2_DR_R (*((reg32_t *)0x4000E000)) +#define UART2_RSR_R (*((reg32_t *)0x4000E004)) +#define UART2_ECR_R (*((reg32_t *)0x4000E004)) +#define UART2_FR_R (*((reg32_t *)0x4000E018)) +#define UART2_ILPR_R (*((reg32_t *)0x4000E020)) +#define UART2_IBRD_R (*((reg32_t *)0x4000E024)) +#define UART2_FBRD_R (*((reg32_t *)0x4000E028)) +#define UART2_LCRH_R (*((reg32_t *)0x4000E02C)) +#define UART2_CTL_R (*((reg32_t *)0x4000E030)) +#define UART2_IFLS_R (*((reg32_t *)0x4000E034)) +#define UART2_IM_R (*((reg32_t *)0x4000E038)) +#define UART2_RIS_R (*((reg32_t *)0x4000E03C)) +#define UART2_MIS_R (*((reg32_t *)0x4000E040)) +#define UART2_ICR_R (*((reg32_t *)0x4000E044)) +/*\}*/ + +/** + * I2C registers (I2C0 MASTER) + */ +/*\{*/ +#define I2C0_MASTER_MSA_R (*((reg32_t *)0x40020000)) +#define I2C0_MASTER_SOAR_R (*((reg32_t *)0x40020000)) +#define I2C0_MASTER_SCSR_R (*((reg32_t *)0x40020004)) +#define I2C0_MASTER_MCS_R (*((reg32_t *)0x40020004)) +#define I2C0_MASTER_SDR_R (*((reg32_t *)0x40020008)) +#define I2C0_MASTER_MDR_R (*((reg32_t *)0x40020008)) +#define I2C0_MASTER_MTPR_R (*((reg32_t *)0x4002000C)) +#define I2C0_MASTER_SIMR_R (*((reg32_t *)0x4002000C)) +#define I2C0_MASTER_SRIS_R (*((reg32_t *)0x40020010)) +#define I2C0_MASTER_MIMR_R (*((reg32_t *)0x40020010)) +#define I2C0_MASTER_MRIS_R (*((reg32_t *)0x40020014)) +#define I2C0_MASTER_SMIS_R (*((reg32_t *)0x40020014)) +#define I2C0_MASTER_SICR_R (*((reg32_t *)0x40020018)) +#define I2C0_MASTER_MMIS_R (*((reg32_t *)0x40020018)) +#define I2C0_MASTER_MICR_R (*((reg32_t *)0x4002001C)) +#define I2C0_MASTER_MCR_R (*((reg32_t *)0x40020020)) +/*\}*/ + +/** + * I2C registers (I2C0 SLAVE) + */ +/*\{*/ +#define I2C0_SLAVE_MSA_R (*((reg32_t *)0x40020800)) +#define I2C0_SLAVE_SOAR_R (*((reg32_t *)0x40020800)) +#define I2C0_SLAVE_SCSR_R (*((reg32_t *)0x40020804)) +#define I2C0_SLAVE_MCS_R (*((reg32_t *)0x40020804)) +#define I2C0_SLAVE_SDR_R (*((reg32_t *)0x40020808)) +#define I2C0_SLAVE_MDR_R (*((reg32_t *)0x40020808)) +#define I2C0_SLAVE_MTPR_R (*((reg32_t *)0x4002080C)) +#define I2C0_SLAVE_SIMR_R (*((reg32_t *)0x4002080C)) +#define I2C0_SLAVE_SRIS_R (*((reg32_t *)0x40020810)) +#define I2C0_SLAVE_MIMR_R (*((reg32_t *)0x40020810)) +#define I2C0_SLAVE_MRIS_R (*((reg32_t *)0x40020814)) +#define I2C0_SLAVE_SMIS_R (*((reg32_t *)0x40020814)) +#define I2C0_SLAVE_SICR_R (*((reg32_t *)0x40020818)) +#define I2C0_SLAVE_MMIS_R (*((reg32_t *)0x40020818)) +#define I2C0_SLAVE_MICR_R (*((reg32_t *)0x4002081C)) +#define I2C0_SLAVE_MCR_R (*((reg32_t *)0x40020820)) +/*\}*/ + +/** + * I2C registers (I2C1 MASTER) + */ +/*\{*/ +#define I2C1_MASTER_MSA_R (*((reg32_t *)0x40021000)) +#define I2C1_MASTER_SOAR_R (*((reg32_t *)0x40021000)) +#define I2C1_MASTER_SCSR_R (*((reg32_t *)0x40021004)) +#define I2C1_MASTER_MCS_R (*((reg32_t *)0x40021004)) +#define I2C1_MASTER_SDR_R (*((reg32_t *)0x40021008)) +#define I2C1_MASTER_MDR_R (*((reg32_t *)0x40021008)) +#define I2C1_MASTER_MTPR_R (*((reg32_t *)0x4002100C)) +#define I2C1_MASTER_SIMR_R (*((reg32_t *)0x4002100C)) +#define I2C1_MASTER_SRIS_R (*((reg32_t *)0x40021010)) +#define I2C1_MASTER_MIMR_R (*((reg32_t *)0x40021010)) +#define I2C1_MASTER_MRIS_R (*((reg32_t *)0x40021014)) +#define I2C1_MASTER_SMIS_R (*((reg32_t *)0x40021014)) +#define I2C1_MASTER_SICR_R (*((reg32_t *)0x40021018)) +#define I2C1_MASTER_MMIS_R (*((reg32_t *)0x40021018)) +#define I2C1_MASTER_MICR_R (*((reg32_t *)0x4002101C)) +#define I2C1_MASTER_MCR_R (*((reg32_t *)0x40021020)) +/*\}*/ + +/** + * I2C registers (I2C1 SLAVE) + */ +/*\{*/ +#define I2C1_SLAVE_MSA_R (*((reg32_t *)0x40021800)) +#define I2C1_SLAVE_SOAR_R (*((reg32_t *)0x40021800)) +#define I2C1_SLAVE_SCSR_R (*((reg32_t *)0x40021804)) +#define I2C1_SLAVE_MCS_R (*((reg32_t *)0x40021804)) +#define I2C1_SLAVE_SDR_R (*((reg32_t *)0x40021808)) +#define I2C1_SLAVE_MDR_R (*((reg32_t *)0x40021808)) +#define I2C1_SLAVE_MTPR_R (*((reg32_t *)0x4002180C)) +#define I2C1_SLAVE_SIMR_R (*((reg32_t *)0x4002180C)) +#define I2C1_SLAVE_SRIS_R (*((reg32_t *)0x40021810)) +#define I2C1_SLAVE_MIMR_R (*((reg32_t *)0x40021810)) +#define I2C1_SLAVE_MRIS_R (*((reg32_t *)0x40021814)) +#define I2C1_SLAVE_SMIS_R (*((reg32_t *)0x40021814)) +#define I2C1_SLAVE_SICR_R (*((reg32_t *)0x40021818)) +#define I2C1_SLAVE_MMIS_R (*((reg32_t *)0x40021818)) +#define I2C1_SLAVE_MICR_R (*((reg32_t *)0x4002181C)) +#define I2C1_SLAVE_MCR_R (*((reg32_t *)0x40021820)) +/*\}*/ + +/** + * GPIO registers (PORTE) + */ +/*\{*/ +#define GPIO_PORTE_DATA_BITS_R ((reg32_t *)0x40024000) +#define GPIO_PORTE_DATA_R (*((reg32_t *)0x400243FC)) +#define GPIO_PORTE_DIR_R (*((reg32_t *)0x40024400)) +#define GPIO_PORTE_IS_R (*((reg32_t *)0x40024404)) +#define GPIO_PORTE_IBE_R (*((reg32_t *)0x40024408)) +#define GPIO_PORTE_IEV_R (*((reg32_t *)0x4002440C)) +#define GPIO_PORTE_IM_R (*((reg32_t *)0x40024410)) +#define GPIO_PORTE_RIS_R (*((reg32_t *)0x40024414)) +#define GPIO_PORTE_MIS_R (*((reg32_t *)0x40024418)) +#define GPIO_PORTE_ICR_R (*((reg32_t *)0x4002441C)) +#define GPIO_PORTE_AFSEL_R (*((reg32_t *)0x40024420)) +#define GPIO_PORTE_DR2R_R (*((reg32_t *)0x40024500)) +#define GPIO_PORTE_DR4R_R (*((reg32_t *)0x40024504)) +#define GPIO_PORTE_DR8R_R (*((reg32_t *)0x40024508)) +#define GPIO_PORTE_ODR_R (*((reg32_t *)0x4002450C)) +#define GPIO_PORTE_PUR_R (*((reg32_t *)0x40024510)) +#define GPIO_PORTE_PDR_R (*((reg32_t *)0x40024514)) +#define GPIO_PORTE_SLR_R (*((reg32_t *)0x40024518)) +#define GPIO_PORTE_DEN_R (*((reg32_t *)0x4002451C)) +#define GPIO_PORTE_LOCK_R (*((reg32_t *)0x40024520)) +#define GPIO_PORTE_CR_R (*((reg32_t *)0x40024524)) +/*\}*/ + +/** + * GPIO registers (PORTF) + */ +/*\{*/ +#define GPIO_PORTF_DATA_BITS_R ((reg32_t *)0x40025000) +#define GPIO_PORTF_DATA_R (*((reg32_t *)0x400253FC)) +#define GPIO_PORTF_DIR_R (*((reg32_t *)0x40025400)) +#define GPIO_PORTF_IS_R (*((reg32_t *)0x40025404)) +#define GPIO_PORTF_IBE_R (*((reg32_t *)0x40025408)) +#define GPIO_PORTF_IEV_R (*((reg32_t *)0x4002540C)) +#define GPIO_PORTF_IM_R (*((reg32_t *)0x40025410)) +#define GPIO_PORTF_RIS_R (*((reg32_t *)0x40025414)) +#define GPIO_PORTF_MIS_R (*((reg32_t *)0x40025418)) +#define GPIO_PORTF_ICR_R (*((reg32_t *)0x4002541C)) +#define GPIO_PORTF_AFSEL_R (*((reg32_t *)0x40025420)) +#define GPIO_PORTF_DR2R_R (*((reg32_t *)0x40025500)) +#define GPIO_PORTF_DR4R_R (*((reg32_t *)0x40025504)) +#define GPIO_PORTF_DR8R_R (*((reg32_t *)0x40025508)) +#define GPIO_PORTF_ODR_R (*((reg32_t *)0x4002550C)) +#define GPIO_PORTF_PUR_R (*((reg32_t *)0x40025510)) +#define GPIO_PORTF_PDR_R (*((reg32_t *)0x40025514)) +#define GPIO_PORTF_SLR_R (*((reg32_t *)0x40025518)) +#define GPIO_PORTF_DEN_R (*((reg32_t *)0x4002551C)) +#define GPIO_PORTF_LOCK_R (*((reg32_t *)0x40025520)) +#define GPIO_PORTF_CR_R (*((reg32_t *)0x40025524)) +/*\}*/ + +/** + * GPIO registers (PORTG) + */ +/*\{*/ +#define GPIO_PORTG_DATA_BITS_R ((reg32_t *)0x40026000) +#define GPIO_PORTG_DATA_R (*((reg32_t *)0x400263FC)) +#define GPIO_PORTG_DIR_R (*((reg32_t *)0x40026400)) +#define GPIO_PORTG_IS_R (*((reg32_t *)0x40026404)) +#define GPIO_PORTG_IBE_R (*((reg32_t *)0x40026408)) +#define GPIO_PORTG_IEV_R (*((reg32_t *)0x4002640C)) +#define GPIO_PORTG_IM_R (*((reg32_t *)0x40026410)) +#define GPIO_PORTG_RIS_R (*((reg32_t *)0x40026414)) +#define GPIO_PORTG_MIS_R (*((reg32_t *)0x40026418)) +#define GPIO_PORTG_ICR_R (*((reg32_t *)0x4002641C)) +#define GPIO_PORTG_AFSEL_R (*((reg32_t *)0x40026420)) +#define GPIO_PORTG_DR2R_R (*((reg32_t *)0x40026500)) +#define GPIO_PORTG_DR4R_R (*((reg32_t *)0x40026504)) +#define GPIO_PORTG_DR8R_R (*((reg32_t *)0x40026508)) +#define GPIO_PORTG_ODR_R (*((reg32_t *)0x4002650C)) +#define GPIO_PORTG_PUR_R (*((reg32_t *)0x40026510)) +#define GPIO_PORTG_PDR_R (*((reg32_t *)0x40026514)) +#define GPIO_PORTG_SLR_R (*((reg32_t *)0x40026518)) +#define GPIO_PORTG_DEN_R (*((reg32_t *)0x4002651C)) +#define GPIO_PORTG_LOCK_R (*((reg32_t *)0x40026520)) +#define GPIO_PORTG_CR_R (*((reg32_t *)0x40026524)) +/*\}*/ + +/** + * GPIO registers (PORTH) + */ +/*\{*/ +#define GPIO_PORTH_DATA_BITS_R ((reg32_t *)0x40027000) +#define GPIO_PORTH_DATA_R (*((reg32_t *)0x400273FC)) +#define GPIO_PORTH_DIR_R (*((reg32_t *)0x40027400)) +#define GPIO_PORTH_IS_R (*((reg32_t *)0x40027404)) +#define GPIO_PORTH_IBE_R (*((reg32_t *)0x40027408)) +#define GPIO_PORTH_IEV_R (*((reg32_t *)0x4002740C)) +#define GPIO_PORTH_IM_R (*((reg32_t *)0x40027410)) +#define GPIO_PORTH_RIS_R (*((reg32_t *)0x40027414)) +#define GPIO_PORTH_MIS_R (*((reg32_t *)0x40027418)) +#define GPIO_PORTH_ICR_R (*((reg32_t *)0x4002741C)) +#define GPIO_PORTH_AFSEL_R (*((reg32_t *)0x40027420)) +#define GPIO_PORTH_DR2R_R (*((reg32_t *)0x40027500)) +#define GPIO_PORTH_DR4R_R (*((reg32_t *)0x40027504)) +#define GPIO_PORTH_DR8R_R (*((reg32_t *)0x40027508)) +#define GPIO_PORTH_ODR_R (*((reg32_t *)0x4002750C)) +#define GPIO_PORTH_PUR_R (*((reg32_t *)0x40027510)) +#define GPIO_PORTH_PDR_R (*((reg32_t *)0x40027514)) +#define GPIO_PORTH_SLR_R (*((reg32_t *)0x40027518)) +#define GPIO_PORTH_DEN_R (*((reg32_t *)0x4002751C)) +#define GPIO_PORTH_LOCK_R (*((reg32_t *)0x40027520)) +#define GPIO_PORTH_CR_R (*((reg32_t *)0x40027524)) +/*\}*/ + +/** + * PWM registers (PWM) + */ +/*\{*/ +#define PWM_CTL_R (*((reg32_t *)0x40028000)) +#define PWM_SYNC_R (*((reg32_t *)0x40028004)) +#define PWM_ENABLE_R (*((reg32_t *)0x40028008)) +#define PWM_INVERT_R (*((reg32_t *)0x4002800C)) +#define PWM_FAULT_R (*((reg32_t *)0x40028010)) +#define PWM_INTEN_R (*((reg32_t *)0x40028014)) +#define PWM_RIS_R (*((reg32_t *)0x40028018)) +#define PWM_ISC_R (*((reg32_t *)0x4002801C)) +#define PWM_STATUS_R (*((reg32_t *)0x40028020)) +#define PWM_0_CTL_R (*((reg32_t *)0x40028040)) +#define PWM_0_INTEN_R (*((reg32_t *)0x40028044)) +#define PWM_0_RIS_R (*((reg32_t *)0x40028048)) +#define PWM_0_ISC_R (*((reg32_t *)0x4002804C)) +#define PWM_0_LOAD_R (*((reg32_t *)0x40028050)) +#define PWM_0_COUNT_R (*((reg32_t *)0x40028054)) +#define PWM_0_CMPA_R (*((reg32_t *)0x40028058)) +#define PWM_0_CMPB_R (*((reg32_t *)0x4002805C)) +#define PWM_0_GENA_R (*((reg32_t *)0x40028060)) +#define PWM_0_GENB_R (*((reg32_t *)0x40028064)) +#define PWM_0_DBCTL_R (*((reg32_t *)0x40028068)) +#define PWM_0_DBRISE_R (*((reg32_t *)0x4002806C)) +#define PWM_0_DBFALL_R (*((reg32_t *)0x40028070)) +#define PWM_1_CTL_R (*((reg32_t *)0x40028080)) +#define PWM_1_INTEN_R (*((reg32_t *)0x40028084)) +#define PWM_1_RIS_R (*((reg32_t *)0x40028088)) +#define PWM_1_ISC_R (*((reg32_t *)0x4002808C)) +#define PWM_1_LOAD_R (*((reg32_t *)0x40028090)) +#define PWM_1_COUNT_R (*((reg32_t *)0x40028094)) +#define PWM_1_CMPA_R (*((reg32_t *)0x40028098)) +#define PWM_1_CMPB_R (*((reg32_t *)0x4002809C)) +#define PWM_1_GENA_R (*((reg32_t *)0x400280A0)) +#define PWM_1_GENB_R (*((reg32_t *)0x400280A4)) +#define PWM_1_DBCTL_R (*((reg32_t *)0x400280A8)) +#define PWM_1_DBRISE_R (*((reg32_t *)0x400280AC)) +#define PWM_1_DBFALL_R (*((reg32_t *)0x400280B0)) +#define PWM_2_CTL_R (*((reg32_t *)0x400280C0)) +#define PWM_2_INTEN_R (*((reg32_t *)0x400280C4)) +#define PWM_2_RIS_R (*((reg32_t *)0x400280C8)) +#define PWM_2_ISC_R (*((reg32_t *)0x400280CC)) +#define PWM_2_LOAD_R (*((reg32_t *)0x400280D0)) +#define PWM_2_COUNT_R (*((reg32_t *)0x400280D4)) +#define PWM_2_CMPA_R (*((reg32_t *)0x400280D8)) +#define PWM_2_CMPB_R (*((reg32_t *)0x400280DC)) +#define PWM_2_GENA_R (*((reg32_t *)0x400280E0)) +#define PWM_2_GENB_R (*((reg32_t *)0x400280E4)) +#define PWM_2_DBCTL_R (*((reg32_t *)0x400280E8)) +#define PWM_2_DBRISE_R (*((reg32_t *)0x400280EC)) +#define PWM_2_DBFALL_R (*((reg32_t *)0x400280F0)) +/*\}*/ + +/** + * QEI registers (QEI0) + */ +/*\{*/ +#define QEI0_CTL_R (*((reg32_t *)0x4002C000)) +#define QEI0_STAT_R (*((reg32_t *)0x4002C004)) +#define QEI0_POS_R (*((reg32_t *)0x4002C008)) +#define QEI0_MAXPOS_R (*((reg32_t *)0x4002C00C)) +#define QEI0_LOAD_R (*((reg32_t *)0x4002C010)) +#define QEI0_TIME_R (*((reg32_t *)0x4002C014)) +#define QEI0_COUNT_R (*((reg32_t *)0x4002C018)) +#define QEI0_SPEED_R (*((reg32_t *)0x4002C01C)) +#define QEI0_INTEN_R (*((reg32_t *)0x4002C020)) +#define QEI0_RIS_R (*((reg32_t *)0x4002C024)) +#define QEI0_ISC_R (*((reg32_t *)0x4002C028)) +/*\}*/ + +/** + * QEI registers (QEI1) + */ +/*\{*/ +#define QEI1_CTL_R (*((reg32_t *)0x4002D000)) +#define QEI1_STAT_R (*((reg32_t *)0x4002D004)) +#define QEI1_POS_R (*((reg32_t *)0x4002D008)) +#define QEI1_MAXPOS_R (*((reg32_t *)0x4002D00C)) +#define QEI1_LOAD_R (*((reg32_t *)0x4002D010)) +#define QEI1_TIME_R (*((reg32_t *)0x4002D014)) +#define QEI1_COUNT_R (*((reg32_t *)0x4002D018)) +#define QEI1_SPEED_R (*((reg32_t *)0x4002D01C)) +#define QEI1_INTEN_R (*((reg32_t *)0x4002D020)) +#define QEI1_RIS_R (*((reg32_t *)0x4002D024)) +#define QEI1_ISC_R (*((reg32_t *)0x4002D028)) +/*\}*/ + +/** + * Timer registers (TIMER0) + */ +/*\{*/ +#define TIMER0_CFG_R (*((reg32_t *)0x40030000)) +#define TIMER0_TAMR_R (*((reg32_t *)0x40030004)) +#define TIMER0_TBMR_R (*((reg32_t *)0x40030008)) +#define TIMER0_CTL_R (*((reg32_t *)0x4003000C)) +#define TIMER0_IMR_R (*((reg32_t *)0x40030018)) +#define TIMER0_RIS_R (*((reg32_t *)0x4003001C)) +#define TIMER0_MIS_R (*((reg32_t *)0x40030020)) +#define TIMER0_ICR_R (*((reg32_t *)0x40030024)) +#define TIMER0_TAILR_R (*((reg32_t *)0x40030028)) +#define TIMER0_TBILR_R (*((reg32_t *)0x4003002C)) +#define TIMER0_TAMATCHR_R (*((reg32_t *)0x40030030)) +#define TIMER0_TBMATCHR_R (*((reg32_t *)0x40030034)) +#define TIMER0_TAPR_R (*((reg32_t *)0x40030038)) +#define TIMER0_TBPR_R (*((reg32_t *)0x4003003C)) +#define TIMER0_TAPMR_R (*((reg32_t *)0x40030040)) +#define TIMER0_TBPMR_R (*((reg32_t *)0x40030044)) +#define TIMER0_TAR_R (*((reg32_t *)0x40030048)) +#define TIMER0_TBR_R (*((reg32_t *)0x4003004C)) +/*\}*/ + +/** + * Timer registers (TIMER1) + */ +/*\{*/ +#define TIMER1_CFG_R (*((reg32_t *)0x40031000)) +#define TIMER1_TAMR_R (*((reg32_t *)0x40031004)) +#define TIMER1_TBMR_R (*((reg32_t *)0x40031008)) +#define TIMER1_CTL_R (*((reg32_t *)0x4003100C)) +#define TIMER1_IMR_R (*((reg32_t *)0x40031018)) +#define TIMER1_RIS_R (*((reg32_t *)0x4003101C)) +#define TIMER1_MIS_R (*((reg32_t *)0x40031020)) +#define TIMER1_ICR_R (*((reg32_t *)0x40031024)) +#define TIMER1_TAILR_R (*((reg32_t *)0x40031028)) +#define TIMER1_TBILR_R (*((reg32_t *)0x4003102C)) +#define TIMER1_TAMATCHR_R (*((reg32_t *)0x40031030)) +#define TIMER1_TBMATCHR_R (*((reg32_t *)0x40031034)) +#define TIMER1_TAPR_R (*((reg32_t *)0x40031038)) +#define TIMER1_TBPR_R (*((reg32_t *)0x4003103C)) +#define TIMER1_TAPMR_R (*((reg32_t *)0x40031040)) +#define TIMER1_TBPMR_R (*((reg32_t *)0x40031044)) +#define TIMER1_TAR_R (*((reg32_t *)0x40031048)) +#define TIMER1_TBR_R (*((reg32_t *)0x4003104C)) +/*\}*/ + +/** + * Timer registers (TIMER2) + */ +/*\{*/ +#define TIMER2_CFG_R (*((reg32_t *)0x40032000)) +#define TIMER2_TAMR_R (*((reg32_t *)0x40032004)) +#define TIMER2_TBMR_R (*((reg32_t *)0x40032008)) +#define TIMER2_CTL_R (*((reg32_t *)0x4003200C)) +#define TIMER2_IMR_R (*((reg32_t *)0x40032018)) +#define TIMER2_RIS_R (*((reg32_t *)0x4003201C)) +#define TIMER2_MIS_R (*((reg32_t *)0x40032020)) +#define TIMER2_ICR_R (*((reg32_t *)0x40032024)) +#define TIMER2_TAILR_R (*((reg32_t *)0x40032028)) +#define TIMER2_TBILR_R (*((reg32_t *)0x4003202C)) +#define TIMER2_TAMATCHR_R (*((reg32_t *)0x40032030)) +#define TIMER2_TBMATCHR_R (*((reg32_t *)0x40032034)) +#define TIMER2_TAPR_R (*((reg32_t *)0x40032038)) +#define TIMER2_TBPR_R (*((reg32_t *)0x4003203C)) +#define TIMER2_TAPMR_R (*((reg32_t *)0x40032040)) +#define TIMER2_TBPMR_R (*((reg32_t *)0x40032044)) +#define TIMER2_TAR_R (*((reg32_t *)0x40032048)) +#define TIMER2_TBR_R (*((reg32_t *)0x4003204C)) +/*\}*/ + +/** + * Timer registers (TIMER3) + */ +/*\{*/ +#define TIMER3_CFG_R (*((reg32_t *)0x40033000)) +#define TIMER3_TAMR_R (*((reg32_t *)0x40033004)) +#define TIMER3_TBMR_R (*((reg32_t *)0x40033008)) +#define TIMER3_CTL_R (*((reg32_t *)0x4003300C)) +#define TIMER3_IMR_R (*((reg32_t *)0x40033018)) +#define TIMER3_RIS_R (*((reg32_t *)0x4003301C)) +#define TIMER3_MIS_R (*((reg32_t *)0x40033020)) +#define TIMER3_ICR_R (*((reg32_t *)0x40033024)) +#define TIMER3_TAILR_R (*((reg32_t *)0x40033028)) +#define TIMER3_TBILR_R (*((reg32_t *)0x4003302C)) +#define TIMER3_TAMATCHR_R (*((reg32_t *)0x40033030)) +#define TIMER3_TBMATCHR_R (*((reg32_t *)0x40033034)) +#define TIMER3_TAPR_R (*((reg32_t *)0x40033038)) +#define TIMER3_TBPR_R (*((reg32_t *)0x4003303C)) +#define TIMER3_TAPMR_R (*((reg32_t *)0x40033040)) +#define TIMER3_TBPMR_R (*((reg32_t *)0x40033044)) +#define TIMER3_TAR_R (*((reg32_t *)0x40033048)) +#define TIMER3_TBR_R (*((reg32_t *)0x4003304C)) +/*\}*/ + +/** + * ADC registers (ADC0) + */ +/*\{*/ +#define ADC0_ACTSS_R (*((reg32_t *)0x40038000)) +#define ADC0_RIS_R (*((reg32_t *)0x40038004)) +#define ADC0_IM_R (*((reg32_t *)0x40038008)) +#define ADC0_ISC_R (*((reg32_t *)0x4003800C)) +#define ADC0_OSTAT_R (*((reg32_t *)0x40038010)) +#define ADC0_EMUX_R (*((reg32_t *)0x40038014)) +#define ADC0_USTAT_R (*((reg32_t *)0x40038018)) +#define ADC0_SSPRI_R (*((reg32_t *)0x40038020)) +#define ADC0_PSSI_R (*((reg32_t *)0x40038028)) +#define ADC0_SAC_R (*((reg32_t *)0x40038030)) +#define ADC0_SSMUX0_R (*((reg32_t *)0x40038040)) +#define ADC0_SSCTL0_R (*((reg32_t *)0x40038044)) +#define ADC0_SSFIFO0_R (*((reg32_t *)0x40038048)) +#define ADC0_SSFSTAT0_R (*((reg32_t *)0x4003804C)) +#define ADC0_SSMUX1_R (*((reg32_t *)0x40038060)) +#define ADC0_SSCTL1_R (*((reg32_t *)0x40038064)) +#define ADC0_SSFIFO1_R (*((reg32_t *)0x40038068)) +#define ADC0_SSFSTAT1_R (*((reg32_t *)0x4003806C)) +#define ADC0_SSMUX2_R (*((reg32_t *)0x40038080)) +#define ADC0_SSCTL2_R (*((reg32_t *)0x40038084)) +#define ADC0_SSFIFO2_R (*((reg32_t *)0x40038088)) +#define ADC0_SSFSTAT2_R (*((reg32_t *)0x4003808C)) +#define ADC0_SSMUX3_R (*((reg32_t *)0x400380A0)) +#define ADC0_SSCTL3_R (*((reg32_t *)0x400380A4)) +#define ADC0_SSFIFO3_R (*((reg32_t *)0x400380A8)) +#define ADC0_SSFSTAT3_R (*((reg32_t *)0x400380AC)) +#define ADC0_TMLB_R (*((reg32_t *)0x40038100)) +/*\}*/ + +/** + * Comparator registers (COMP) + */ +/*\{*/ +#define COMP_ACMIS_R (*((reg32_t *)0x4003C000)) +#define COMP_ACRIS_R (*((reg32_t *)0x4003C004)) +#define COMP_ACINTEN_R (*((reg32_t *)0x4003C008)) +#define COMP_ACREFCTL_R (*((reg32_t *)0x4003C010)) +#define COMP_ACSTAT0_R (*((reg32_t *)0x4003C020)) +#define COMP_ACCTL0_R (*((reg32_t *)0x4003C024)) +#define COMP_ACSTAT1_R (*((reg32_t *)0x4003C040)) +#define COMP_ACCTL1_R (*((reg32_t *)0x4003C044)) +#define COMP_ACSTAT2_R (*((reg32_t *)0x4003C060)) +#define COMP_ACCTL2_R (*((reg32_t *)0x4003C064)) +/*\}*/ + +/** + * Hibernation module registers (HIB) + */ +/*\{*/ +#define HIB_RTCC_R (*((reg32_t *)0x400FC000)) +#define HIB_RTCM0_R (*((reg32_t *)0x400FC004)) +#define HIB_RTCM1_R (*((reg32_t *)0x400FC008)) +#define HIB_RTCLD_R (*((reg32_t *)0x400FC00C)) +#define HIB_CTL_R (*((reg32_t *)0x400FC010)) +#define HIB_IM_R (*((reg32_t *)0x400FC014)) +#define HIB_RIS_R (*((reg32_t *)0x400FC018)) +#define HIB_MIS_R (*((reg32_t *)0x400FC01C)) +#define HIB_IC_R (*((reg32_t *)0x400FC020)) +#define HIB_RTCT_R (*((reg32_t *)0x400FC024)) +#define HIB_DATA_R (*((reg32_t *)0x400FC030)) +/*\}*/ + +/** + * FLASH registers (FLASH CTRL) + */ +/*\{*/ +#define FLASH_FMA_R (*((reg32_t *)0x400FD000)) +#define FLASH_FMD_R (*((reg32_t *)0x400FD004)) +#define FLASH_FMC_R (*((reg32_t *)0x400FD008)) +#define FLASH_FCRIS_R (*((reg32_t *)0x400FD00C)) +#define FLASH_FCIM_R (*((reg32_t *)0x400FD010)) +#define FLASH_FCMISC_R (*((reg32_t *)0x400FD014)) +#define FLASH_USECRL_R (*((reg32_t *)0x400FE140)) +#define FLASH_USERDBG_R (*((reg32_t *)0x400FE1D0)) +#define FLASH_USERREG0_R (*((reg32_t *)0x400FE1E0)) +#define FLASH_USERREG1_R (*((reg32_t *)0x400FE1E4)) +#define FLASH_FMPRE0_R (*((reg32_t *)0x400FE200)) +#define FLASH_FMPRE1_R (*((reg32_t *)0x400FE204)) +#define FLASH_FMPRE2_R (*((reg32_t *)0x400FE208)) +#define FLASH_FMPRE3_R (*((reg32_t *)0x400FE20C)) +#define FLASH_FMPPE0_R (*((reg32_t *)0x400FE400)) +#define FLASH_FMPPE1_R (*((reg32_t *)0x400FE404)) +#define FLASH_FMPPE2_R (*((reg32_t *)0x400FE408)) +#define FLASH_FMPPE3_R (*((reg32_t *)0x400FE40C)) +/*\}*/ + +/** + * System Control registers (SYSCTL) + */ +/*\{*/ +#define SYSCTL_DID0_R (*((reg32_t *)0x400FE000)) +#define SYSCTL_DID1_R (*((reg32_t *)0x400FE004)) +#define SYSCTL_DC0_R (*((reg32_t *)0x400FE008)) +#define SYSCTL_DC1_R (*((reg32_t *)0x400FE010)) +#define SYSCTL_DC2_R (*((reg32_t *)0x400FE014)) +#define SYSCTL_DC3_R (*((reg32_t *)0x400FE018)) +#define SYSCTL_DC4_R (*((reg32_t *)0x400FE01C)) +#define SYSCTL_PBORCTL_R (*((reg32_t *)0x400FE030)) +#define SYSCTL_LDOPCTL_R (*((reg32_t *)0x400FE034)) +#define SYSCTL_SRCR0_R (*((reg32_t *)0x400FE040)) +#define SYSCTL_SRCR1_R (*((reg32_t *)0x400FE044)) +#define SYSCTL_SRCR2_R (*((reg32_t *)0x400FE048)) +#define SYSCTL_RIS_R (*((reg32_t *)0x400FE050)) +#define SYSCTL_IMC_R (*((reg32_t *)0x400FE054)) +#define SYSCTL_MISC_R (*((reg32_t *)0x400FE058)) +#define SYSCTL_RESC_R (*((reg32_t *)0x400FE05C)) +#define SYSCTL_RCC_R (*((reg32_t *)0x400FE060)) +#define SYSCTL_PLLCFG_R (*((reg32_t *)0x400FE064)) +#define SYSCTL_RCC2_R (*((reg32_t *)0x400FE070)) +#define SYSCTL_RCGC0_R (*((reg32_t *)0x400FE100)) +#define SYSCTL_RCGC1_R (*((reg32_t *)0x400FE104)) +#define SYSCTL_RCGC2_R (*((reg32_t *)0x400FE108)) +#define SYSCTL_SCGC0_R (*((reg32_t *)0x400FE110)) +#define SYSCTL_SCGC1_R (*((reg32_t *)0x400FE114)) +#define SYSCTL_SCGC2_R (*((reg32_t *)0x400FE118)) +#define SYSCTL_DCGC0_R (*((reg32_t *)0x400FE120)) +#define SYSCTL_DCGC1_R (*((reg32_t *)0x400FE124)) +#define SYSCTL_DCGC2_R (*((reg32_t *)0x400FE128)) +#define SYSCTL_DSLPCLKCFG_R (*((reg32_t *)0x400FE144)) +/*\}*/ + +/** + * NVIC registers (NVIC) + */ +/*\{*/ +#define NVIC_INT_TYPE_R (*((reg32_t *)0xE000E004)) +#define NVIC_ST_CTRL_R (*((reg32_t *)0xE000E010)) +#define NVIC_ST_RELOAD_R (*((reg32_t *)0xE000E014)) +#define NVIC_ST_CURRENT_R (*((reg32_t *)0xE000E018)) +#define NVIC_ST_CAL_R (*((reg32_t *)0xE000E01C)) +#define NVIC_EN0_R (*((reg32_t *)0xE000E100)) +#define NVIC_EN1_R (*((reg32_t *)0xE000E104)) +#define NVIC_DIS0_R (*((reg32_t *)0xE000E180)) +#define NVIC_DIS1_R (*((reg32_t *)0xE000E184)) +#define NVIC_PEND0_R (*((reg32_t *)0xE000E200)) +#define NVIC_PEND1_R (*((reg32_t *)0xE000E204)) +#define NVIC_UNPEND0_R (*((reg32_t *)0xE000E280)) +#define NVIC_UNPEND1_R (*((reg32_t *)0xE000E284)) +#define NVIC_ACTIVE0_R (*((reg32_t *)0xE000E300)) +#define NVIC_ACTIVE1_R (*((reg32_t *)0xE000E304)) +#define NVIC_PRI0_R (*((reg32_t *)0xE000E400)) +#define NVIC_PRI1_R (*((reg32_t *)0xE000E404)) +#define NVIC_PRI2_R (*((reg32_t *)0xE000E408)) +#define NVIC_PRI3_R (*((reg32_t *)0xE000E40C)) +#define NVIC_PRI4_R (*((reg32_t *)0xE000E410)) +#define NVIC_PRI5_R (*((reg32_t *)0xE000E414)) +#define NVIC_PRI6_R (*((reg32_t *)0xE000E418)) +#define NVIC_PRI7_R (*((reg32_t *)0xE000E41C)) +#define NVIC_PRI8_R (*((reg32_t *)0xE000E420)) +#define NVIC_PRI9_R (*((reg32_t *)0xE000E424)) +#define NVIC_PRI10_R (*((reg32_t *)0xE000E428)) +#define NVIC_CPUID_R (*((reg32_t *)0xE000ED00)) +#define NVIC_INT_CTRL_R (*((reg32_t *)0xE000ED04)) +#define NVIC_VTABLE_R (*((reg32_t *)0xE000ED08)) +#define NVIC_APINT_R (*((reg32_t *)0xE000ED0C)) +#define NVIC_SYS_CTRL_R (*((reg32_t *)0xE000ED10)) +#define NVIC_CFG_CTRL_R (*((reg32_t *)0xE000ED14)) +#define NVIC_SYS_PRI1_R (*((reg32_t *)0xE000ED18)) +#define NVIC_SYS_PRI2_R (*((reg32_t *)0xE000ED1C)) +#define NVIC_SYS_PRI3_R (*((reg32_t *)0xE000ED20)) +#define NVIC_SYS_HND_CTRL_R (*((reg32_t *)0xE000ED24)) +#define NVIC_FAULT_STAT_R (*((reg32_t *)0xE000ED28)) +#define NVIC_HFAULT_STAT_R (*((reg32_t *)0xE000ED2C)) +#define NVIC_DEBUG_STAT_R (*((reg32_t *)0xE000ED30)) +#define NVIC_MM_ADDR_R (*((reg32_t *)0xE000ED34)) +#define NVIC_FAULT_ADDR_R (*((reg32_t *)0xE000ED38)) +#define NVIC_MPU_TYPE_R (*((reg32_t *)0xE000ED90)) +#define NVIC_MPU_CTRL_R (*((reg32_t *)0xE000ED94)) +#define NVIC_MPU_NUMBER_R (*((reg32_t *)0xE000ED98)) +#define NVIC_MPU_BASE_R (*((reg32_t *)0xE000ED9C)) +#define NVIC_MPU_ATTR_R (*((reg32_t *)0xE000EDA0)) +#define NVIC_DBG_CTRL_R (*((reg32_t *)0xE000EDF0)) +#define NVIC_DBG_XFER_R (*((reg32_t *)0xE000EDF4)) +#define NVIC_DBG_DATA_R (*((reg32_t *)0xE000EDF8)) +#define NVIC_DBG_INT_R (*((reg32_t *)0xE000EDFC)) +#define NVIC_SW_TRIG_R (*((reg32_t *)0xE000EF00)) +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_LOAD register. + */ +/*\{*/ +#define WDT_LOAD_M 0xFFFFFFFF ///< Watchdog Load Value +#define WDT_LOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_VALUE register. + */ +/*\{*/ +#define WDT_VALUE_M 0xFFFFFFFF ///< Watchdog Value +#define WDT_VALUE_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_CTL register. + */ +/*\{*/ +#define WDT_CTL_RESEN 0x00000002 ///< Watchdog Reset Enable +#define WDT_CTL_INTEN 0x00000001 ///< Watchdog Interrupt Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_ICR register. + */ +/*\{*/ +#define WDT_ICR_M 0xFFFFFFFF ///< Watchdog Interrupt Clear +#define WDT_ICR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_RIS register. + */ +/*\{*/ +#define WDT_RIS_WDTRIS 0x00000001 ///< Watchdog Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_MIS register. + */ +/*\{*/ +#define WDT_MIS_WDTMIS 0x00000001 ///< Watchdog Masked Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_TEST register. + */ +/*\{*/ +#define WDT_TEST_STALL 0x00000100 ///< Watchdog Stall Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the WDT_O_LOCK register. + */ +/*\{*/ +#define WDT_LOCK_M 0xFFFFFFFF ///< Watchdog Lock +#define WDT_LOCK_UNLOCKED 0x00000000 ///< Unlocked +#define WDT_LOCK_LOCKED 0x00000001 ///< Locked +#define WDT_LOCK_UNLOCK 0x1ACCE551 ///< Unlocks the watchdog timer +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_O_LOCK register. + */ +/*\{*/ +#define GPIO_LOCK_M 0xFFFFFFFF ///< GPIO Lock +#define GPIO_LOCK_UNLOCKED 0x00000000 ///< The GPIOCR register is unlocked + ///< and may be modified +#define GPIO_LOCK_LOCKED 0x00000001 ///< The GPIOCR register is locked + ///< and may not be modified +#define GPIO_LOCK_KEY 0x1ACCE551 ///< Unlocks the GPIO_CR register +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CR0 register. + */ +/*\{*/ +#define SSI_CR0_SCR_M 0x0000FF00 ///< SSI Serial Clock Rate +#define SSI_CR0_SPH 0x00000080 ///< SSI Serial Clock Phase +#define SSI_CR0_SPO 0x00000040 ///< SSI Serial Clock Polarity +#define SSI_CR0_FRF_M 0x00000030 ///< SSI Frame Format Select +#define SSI_CR0_FRF_MOTO 0x00000000 ///< Freescale SPI Frame Format +#define SSI_CR0_FRF_TI 0x00000010 ///< Texas Instruments Synchronous + ///< Serial Frame Format +#define SSI_CR0_FRF_NMW 0x00000020 ///< MICROWIRE Frame Format +#define SSI_CR0_DSS_M 0x0000000F ///< SSI Data Size Select +#define SSI_CR0_DSS_4 0x00000003 ///< 4-bit data +#define SSI_CR0_DSS_5 0x00000004 ///< 5-bit data +#define SSI_CR0_DSS_6 0x00000005 ///< 6-bit data +#define SSI_CR0_DSS_7 0x00000006 ///< 7-bit data +#define SSI_CR0_DSS_8 0x00000007 ///< 8-bit data +#define SSI_CR0_DSS_9 0x00000008 ///< 9-bit data +#define SSI_CR0_DSS_10 0x00000009 ///< 10-bit data +#define SSI_CR0_DSS_11 0x0000000A ///< 11-bit data +#define SSI_CR0_DSS_12 0x0000000B ///< 12-bit data +#define SSI_CR0_DSS_13 0x0000000C ///< 13-bit data +#define SSI_CR0_DSS_14 0x0000000D ///< 14-bit data +#define SSI_CR0_DSS_15 0x0000000E ///< 15-bit data +#define SSI_CR0_DSS_16 0x0000000F ///< 16-bit data +#define SSI_CR0_SCR_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CR1 register. + */ +/*\{*/ +#define SSI_CR1_SOD 0x00000008 ///< SSI Slave Mode Output Disable +#define SSI_CR1_MS 0x00000004 ///< SSI Master/Slave Select +#define SSI_CR1_SSE 0x00000002 ///< SSI Synchronous Serial Port + ///< Enable +#define SSI_CR1_LBM 0x00000001 ///< SSI Loopback Mode +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_DR register. + */ +/*\{*/ +#define SSI_DR_DATA_M 0x0000FFFF ///< SSI Receive/Transmit Data +#define SSI_DR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_SR register. + */ +/*\{*/ +#define SSI_SR_BSY 0x00000010 ///< SSI Busy Bit +#define SSI_SR_RFF 0x00000008 ///< SSI Receive FIFO Full +#define SSI_SR_RNE 0x00000004 ///< SSI Receive FIFO Not Empty +#define SSI_SR_TNF 0x00000002 ///< SSI Transmit FIFO Not Full +#define SSI_SR_TFE 0x00000001 ///< SSI Transmit FIFO Empty +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CPSR register. + */ +/*\{*/ +#define SSI_CPSR_CPSDVSR_M 0x000000FF ///< SSI Clock Prescale Divisor +#define SSI_CPSR_CPSDVSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_IM register. + */ +/*\{*/ +#define SSI_IM_TXIM 0x00000008 ///< SSI Transmit FIFO Interrupt Mask +#define SSI_IM_RXIM 0x00000004 ///< SSI Receive FIFO Interrupt Mask +#define SSI_IM_RTIM 0x00000002 ///< SSI Receive Time-Out Interrupt + ///< Mask +#define SSI_IM_RORIM 0x00000001 ///< SSI Receive Overrun Interrupt + ///< Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_RIS register. + */ +/*\{*/ +#define SSI_RIS_TXRIS 0x00000008 ///< SSI Transmit FIFO Raw Interrupt + ///< Status +#define SSI_RIS_RXRIS 0x00000004 ///< SSI Receive FIFO Raw Interrupt + ///< Status +#define SSI_RIS_RTRIS 0x00000002 ///< SSI Receive Time-Out Raw + ///< Interrupt Status +#define SSI_RIS_RORRIS 0x00000001 ///< SSI Receive Overrun Raw + ///< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_MIS register. + */ +/*\{*/ +#define SSI_MIS_TXMIS 0x00000008 ///< SSI Transmit FIFO Masked + ///< Interrupt Status +#define SSI_MIS_RXMIS 0x00000004 ///< SSI Receive FIFO Masked + ///< Interrupt Status +#define SSI_MIS_RTMIS 0x00000002 ///< SSI Receive Time-Out Masked + ///< Interrupt Status +#define SSI_MIS_RORMIS 0x00000001 ///< SSI Receive Overrun Masked + ///< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_ICR register. + */ +/*\{*/ +#define SSI_ICR_RTIC 0x00000002 ///< SSI Receive Time-Out Interrupt + ///< Clear +#define SSI_ICR_RORIC 0x00000001 ///< SSI Receive Overrun Interrupt + ///< Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_DR register. + */ +/*\{*/ +#define UART_DR_OE 0x00000800 ///< UART Overrun Error +#define UART_DR_BE 0x00000400 ///< UART Break Error +#define UART_DR_PE 0x00000200 ///< UART Parity Error +#define UART_DR_FE 0x00000100 ///< UART Framing Error +#define UART_DR_DATA_M 0x000000FF ///< Data Transmitted or Received +#define UART_DR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_RSR register. + */ +/*\{*/ +#define UART_RSR_OE 0x00000008 ///< UART Overrun Error +#define UART_RSR_BE 0x00000004 ///< UART Break Error +#define UART_RSR_PE 0x00000002 ///< UART Parity Error +#define UART_RSR_FE 0x00000001 ///< UART Framing Error +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ECR register. + */ +/*\{*/ +#define UART_ECR_DATA_M 0x000000FF ///< Error Clear +#define UART_ECR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_FR register. + */ +/*\{*/ +#define UART_FR_TXFE 0x00000080 ///< UART Transmit FIFO Empty +#define UART_FR_RXFF 0x00000040 ///< UART Receive FIFO Full +#define UART_FR_TXFF 0x00000020 ///< UART Transmit FIFO Full +#define UART_FR_RXFE 0x00000010 ///< UART Receive FIFO Empty +#define UART_FR_BUSY 0x00000008 ///< UART Busy +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ILPR register. + */ +/*\{*/ +#define UART_ILPR_ILPDVSR_M 0x000000FF ///< IrDA Low-Power Divisor +#define UART_ILPR_ILPDVSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IBRD register. + */ +/*\{*/ +#define UART_IBRD_DIVINT_M 0x0000FFFF ///< Integer Baud-Rate Divisor +#define UART_IBRD_DIVINT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_FBRD register. + */ +/*\{*/ +#define UART_FBRD_DIVFRAC_M 0x0000003F ///< Fractional Baud-Rate Divisor +#define UART_FBRD_DIVFRAC_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LCRH register. + */ +/*\{*/ +#define UART_LCRH_SPS 0x00000080 ///< UART Stick Parity Select +#define UART_LCRH_WLEN_M 0x00000060 ///< UART Word Length +#define UART_LCRH_WLEN_5 0x00000000 ///< 5 bits (default) +#define UART_LCRH_WLEN_6 0x00000020 ///< 6 bits +#define UART_LCRH_WLEN_7 0x00000040 ///< 7 bits +#define UART_LCRH_WLEN_8 0x00000060 ///< 8 bits +#define UART_LCRH_FEN 0x00000010 ///< UART Enable FIFOs +#define UART_LCRH_STP2 0x00000008 ///< UART Two Stop Bits Select +#define UART_LCRH_EPS 0x00000004 ///< UART Even Parity Select +#define UART_LCRH_PEN 0x00000002 ///< UART Parity Enable +#define UART_LCRH_BRK 0x00000001 ///< UART Send Break +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_CTL register. + */ +/*\{*/ +#define UART_CTL_RXE 0x00000200 ///< UART Receive Enable +#define UART_CTL_TXE 0x00000100 ///< UART Transmit Enable +#define UART_CTL_LBE 0x00000080 ///< UART Loop Back Enable +#define UART_CTL_SIRLP 0x00000004 ///< UART SIR Low-Power Mode +#define UART_CTL_SIREN 0x00000002 ///< UART SIR Enable +#define UART_CTL_UARTEN 0x00000001 ///< UART Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IFLS register. + */ +/*\{*/ +#define UART_IFLS_RX_M 0x00000038 ///< UART Receive Interrupt FIFO + ///< Level Select +#define UART_IFLS_RX1_8 0x00000000 ///< RX FIFO >= 1/8 full +#define UART_IFLS_RX2_8 0x00000008 ///< RX FIFO >= 1/4 full +#define UART_IFLS_RX4_8 0x00000010 ///< RX FIFO >= 1/2 full (default) +#define UART_IFLS_RX6_8 0x00000018 ///< RX FIFO >= 3/4 full +#define UART_IFLS_RX7_8 0x00000020 ///< RX FIFO >= 7/8 full +#define UART_IFLS_TX_M 0x00000007 ///< UART Transmit Interrupt FIFO + ///< Level Select +#define UART_IFLS_TX1_8 0x00000000 ///< TX FIFO <= 1/8 full +#define UART_IFLS_TX2_8 0x00000001 ///< TX FIFO <= 1/4 full +#define UART_IFLS_TX4_8 0x00000002 ///< TX FIFO <= 1/2 full (default) +#define UART_IFLS_TX6_8 0x00000003 ///< TX FIFO <= 3/4 full +#define UART_IFLS_TX7_8 0x00000004 ///< TX FIFO <= 7/8 full +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IM register. + */ +/*\{*/ +#define UART_IM_OEIM 0x00000400 ///< UART Overrun Error Interrupt + ///< Mask +#define UART_IM_BEIM 0x00000200 ///< UART Break Error Interrupt Mask +#define UART_IM_PEIM 0x00000100 ///< UART Parity Error Interrupt Mask +#define UART_IM_FEIM 0x00000080 ///< UART Framing Error Interrupt + ///< Mask +#define UART_IM_RTIM 0x00000040 ///< UART Receive Time-Out Interrupt + ///< Mask +#define UART_IM_TXIM 0x00000020 ///< UART Transmit Interrupt Mask +#define UART_IM_RXIM 0x00000010 ///< UART Receive Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_RIS register. + */ +/*\{*/ +#define UART_RIS_OERIS 0x00000400 ///< UART Overrun Error Raw Interrupt + ///< Status +#define UART_RIS_BERIS 0x00000200 ///< UART Break Error Raw Interrupt + ///< Status +#define UART_RIS_PERIS 0x00000100 ///< UART Parity Error Raw Interrupt + ///< Status +#define UART_RIS_FERIS 0x00000080 ///< UART Framing Error Raw Interrupt + ///< Status +#define UART_RIS_RTRIS 0x00000040 ///< UART Receive Time-Out Raw + ///< Interrupt Status +#define UART_RIS_TXRIS 0x00000020 ///< UART Transmit Raw Interrupt + ///< Status +#define UART_RIS_RXRIS 0x00000010 ///< UART Receive Raw Interrupt + ///< Status +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_MIS register. + */ +/*\{*/ +#define UART_MIS_OEMIS 0x00000400 ///< UART Overrun Error Masked + ///< Interrupt Status +#define UART_MIS_BEMIS 0x00000200 ///< UART Break Error Masked + ///< Interrupt Status +#define UART_MIS_PEMIS 0x00000100 ///< UART Parity Error Masked + ///< Interrupt Status +#define UART_MIS_FEMIS 0x00000080 ///< UART Framing Error Masked + ///< Interrupt Status +#define UART_MIS_RTMIS 0x00000040 ///< UART Receive Time-Out Masked + ///< Interrupt Status +#define UART_MIS_TXMIS 0x00000020 ///< UART Transmit Masked Interrupt + ///< Status +#define UART_MIS_RXMIS 0x00000010 ///< UART Receive Masked Interrupt + ///< Status +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ICR register. + */ +/*\{*/ +#define UART_ICR_OEIC 0x00000400 ///< Overrun Error Interrupt Clear +#define UART_ICR_BEIC 0x00000200 ///< Break Error Interrupt Clear +#define UART_ICR_PEIC 0x00000100 ///< Parity Error Interrupt Clear +#define UART_ICR_FEIC 0x00000080 ///< Framing Error Interrupt Clear +#define UART_ICR_RTIC 0x00000040 ///< Receive Time-Out Interrupt Clear +#define UART_ICR_TXIC 0x00000020 ///< Transmit Interrupt Clear +#define UART_ICR_RXIC 0x00000010 ///< Receive Interrupt Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MSA register. + */ +/*\{*/ +#define I2C_MSA_SA_M 0x000000FE ///< I2C Slave Address +#define I2C_MSA_RS 0x00000001 ///< Receive not send +#define I2C_MSA_SA_S 1 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SOAR register. + */ +/*\{*/ +#define I2C_SOAR_OAR_M 0x0000007F ///< I2C Slave Own Address +#define I2C_SOAR_OAR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SCSR register. + */ +/*\{*/ +#define I2C_SCSR_FBR 0x00000004 ///< First Byte Received +#define I2C_SCSR_TREQ 0x00000002 ///< Transmit Request +#define I2C_SCSR_DA 0x00000001 ///< Device Active +#define I2C_SCSR_RREQ 0x00000001 ///< Receive Request +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MCS register. + */ +/*\{*/ +#define I2C_MCS_BUSBSY 0x00000040 ///< Bus Busy +#define I2C_MCS_IDLE 0x00000020 ///< I2C Idle +#define I2C_MCS_ARBLST 0x00000010 ///< Arbitration Lost +#define I2C_MCS_ACK 0x00000008 ///< Data Acknowledge Enable +#define I2C_MCS_DATACK 0x00000008 ///< Acknowledge Data +#define I2C_MCS_ADRACK 0x00000004 ///< Acknowledge Address +#define I2C_MCS_STOP 0x00000004 ///< Generate STOP +#define I2C_MCS_START 0x00000002 ///< Generate START +#define I2C_MCS_ERROR 0x00000002 ///< Error +#define I2C_MCS_RUN 0x00000001 ///< I2C Master Enable +#define I2C_MCS_BUSY 0x00000001 ///< I2C Busy +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SDR register. + */ +/*\{*/ +#define I2C_SDR_DATA_M 0x000000FF ///< Data for Transfer +#define I2C_SDR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MDR register. + */ +/*\{*/ +#define I2C_MDR_DATA_M 0x000000FF ///< Data Transferred +#define I2C_MDR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MTPR register. + */ +/*\{*/ +#define I2C_MTPR_TPR_M 0x000000FF ///< SCL Clock Period +#define I2C_MTPR_TPR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SIMR register. + */ +/*\{*/ +#define I2C_SIMR_DATAIM 0x00000001 ///< Data Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SRIS register. + */ +/*\{*/ +#define I2C_SRIS_DATARIS 0x00000001 ///< Data Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MIMR register. + */ +/*\{*/ +#define I2C_MIMR_IM 0x00000001 ///< Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MRIS register. + */ +/*\{*/ +#define I2C_MRIS_RIS 0x00000001 ///< Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SMIS register. + */ +/*\{*/ +#define I2C_SMIS_DATAMIS 0x00000001 ///< Data Masked Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_SICR register. + */ +/*\{*/ +#define I2C_SICR_DATAIC 0x00000001 ///< Data Interrupt Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MMIS register. + */ +/*\{*/ +#define I2C_MMIS_MIS 0x00000001 ///< Masked Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MICR register. + */ +/*\{*/ +#define I2C_MICR_IC 0x00000001 ///< Interrupt Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the I2C_O_MCR register. + */ +/*\{*/ +#define I2C_MCR_SFE 0x00000020 ///< I2C Slave Function Enable +#define I2C_MCR_MFE 0x00000010 ///< I2C Master Function Enable +#define I2C_MCR_LPBK 0x00000001 ///< I2C Loopback +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_CTL register. + */ +/*\{*/ +#define PWM_CTL_GLOBALSYNC2 0x00000004 ///< Update PWM Generator 2 +#define PWM_CTL_GLOBALSYNC1 0x00000002 ///< Update PWM Generator 1 +#define PWM_CTL_GLOBALSYNC0 0x00000001 ///< Update PWM Generator 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_SYNC register. + */ +/*\{*/ +#define PWM_SYNC_SYNC2 0x00000004 ///< Reset Generator 2 Counter +#define PWM_SYNC_SYNC1 0x00000002 ///< Reset Generator 1 Counter +#define PWM_SYNC_SYNC0 0x00000001 ///< Reset Generator 0 Counter +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_ENABLE register. + */ +/*\{*/ +#define PWM_ENABLE_PWM5EN 0x00000020 ///< PWM5 Output Enable +#define PWM_ENABLE_PWM4EN 0x00000010 ///< PWM4 Output Enable +#define PWM_ENABLE_PWM3EN 0x00000008 ///< PWM3 Output Enable +#define PWM_ENABLE_PWM2EN 0x00000004 ///< PWM2 Output Enable +#define PWM_ENABLE_PWM1EN 0x00000002 ///< PWM1 Output Enable +#define PWM_ENABLE_PWM0EN 0x00000001 ///< PWM0 Output Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_INVERT register. + */ +/*\{*/ +#define PWM_INVERT_PWM5INV 0x00000020 ///< Invert PWM5 Signal +#define PWM_INVERT_PWM4INV 0x00000010 ///< Invert PWM4 Signal +#define PWM_INVERT_PWM3INV 0x00000008 ///< Invert PWM3 Signal +#define PWM_INVERT_PWM2INV 0x00000004 ///< Invert PWM2 Signal +#define PWM_INVERT_PWM1INV 0x00000002 ///< Invert PWM1 Signal +#define PWM_INVERT_PWM0INV 0x00000001 ///< Invert PWM0 Signal +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_FAULT register. + */ +/*\{*/ +#define PWM_FAULT_FAULT5 0x00000020 ///< PWM5 Fault +#define PWM_FAULT_FAULT4 0x00000010 ///< PWM4 Fault +#define PWM_FAULT_FAULT3 0x00000008 ///< PWM3 Fault +#define PWM_FAULT_FAULT2 0x00000004 ///< PWM2 Fault +#define PWM_FAULT_FAULT1 0x00000002 ///< PWM1 Fault +#define PWM_FAULT_FAULT0 0x00000001 ///< PWM0 Fault +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_INTEN register. + */ +/*\{*/ +#define PWM_INTEN_INTFAULT 0x00010000 ///< Fault Interrupt Enable +#define PWM_INTEN_INTPWM2 0x00000004 ///< PWM2 Interrupt Enable +#define PWM_INTEN_INTPWM1 0x00000002 ///< PWM1 Interrupt Enable +#define PWM_INTEN_INTPWM0 0x00000001 ///< PWM0 Interrupt Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_RIS register. + */ +/*\{*/ +#define PWM_RIS_INTFAULT 0x00010000 ///< Fault Interrupt Asserted +#define PWM_RIS_INTPWM2 0x00000004 ///< PWM2 Interrupt Asserted +#define PWM_RIS_INTPWM1 0x00000002 ///< PWM1 Interrupt Asserted +#define PWM_RIS_INTPWM0 0x00000001 ///< PWM0 Interrupt Asserted +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_ISC register. + */ +/*\{*/ +#define PWM_ISC_INTFAULT 0x00010000 ///< Fault Interrupt Asserted +#define PWM_ISC_INTPWM2 0x00000004 ///< PWM2 Interrupt Status +#define PWM_ISC_INTPWM1 0x00000002 ///< PWM1 Interrupt Status +#define PWM_ISC_INTPWM0 0x00000001 ///< PWM0 Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_STATUS register. + */ +/*\{*/ +#define PWM_STATUS_FAULT 0x00000001 ///< Fault Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_CTL register. + */ +/*\{*/ +#define PWM_X_CTL_CMPBUPD 0x00000020 ///< Comparator B Update Mode +#define PWM_X_CTL_CMPAUPD 0x00000010 ///< Comparator A Update Mode +#define PWM_X_CTL_LOADUPD 0x00000008 ///< Load Register Update Mode +#define PWM_X_CTL_DEBUG 0x00000004 ///< Debug Mode +#define PWM_X_CTL_MODE 0x00000002 ///< Counter Mode +#define PWM_X_CTL_ENABLE 0x00000001 ///< PWM Block Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_INTEN register. + */ +/*\{*/ +#define PWM_X_INTEN_TRCMPBD 0x00002000 ///< Trigger for Counter=PWMnCMPB + ///< Down +#define PWM_X_INTEN_TRCMPBU 0x00001000 ///< Trigger for Counter=PWMnCMPB Up +#define PWM_X_INTEN_TRCMPAD 0x00000800 ///< Trigger for Counter=PWMnCMPA + ///< Down +#define PWM_X_INTEN_TRCMPAU 0x00000400 ///< Trigger for Counter=PWMnCMPA Up +#define PWM_X_INTEN_TRCNTLOAD 0x00000200 ///< Trigger for Counter=PWMnLOAD +#define PWM_X_INTEN_TRCNTZERO 0x00000100 ///< Trigger for Counter=0 +#define PWM_X_INTEN_INTCMPBD 0x00000020 ///< Interrupt for Counter=PWMnCMPB + ///< Down +#define PWM_X_INTEN_INTCMPBU 0x00000010 ///< Interrupt for Counter=PWMnCMPB + ///< Up +#define PWM_X_INTEN_INTCMPAD 0x00000008 ///< Interrupt for Counter=PWMnCMPA + ///< Down +#define PWM_X_INTEN_INTCMPAU 0x00000004 ///< Interrupt for Counter=PWMnCMPA + ///< Up +#define PWM_X_INTEN_INTCNTLOAD 0x00000002 ///< Interrupt for Counter=PWMnLOAD +#define PWM_X_INTEN_INTCNTZERO 0x00000001 ///< Interrupt for Counter=0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_RIS register. + */ +/*\{*/ +#define PWM_X_RIS_INTCMPBD 0x00000020 ///< Comparator B Down Interrupt + ///< Status +#define PWM_X_RIS_INTCMPBU 0x00000010 ///< Comparator B Up Interrupt Status +#define PWM_X_RIS_INTCMPAD 0x00000008 ///< Comparator A Down Interrupt + ///< Status +#define PWM_X_RIS_INTCMPAU 0x00000004 ///< Comparator A Up Interrupt Status +#define PWM_X_RIS_INTCNTLOAD 0x00000002 ///< Counter=Load Interrupt Status +#define PWM_X_RIS_INTCNTZERO 0x00000001 ///< Counter=0 Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_ISC register. + */ +/*\{*/ +#define PWM_X_ISC_INTCMPBD 0x00000020 ///< Comparator B Down Interrupt +#define PWM_X_ISC_INTCMPBU 0x00000010 ///< Comparator B Up Interrupt +#define PWM_X_ISC_INTCMPAD 0x00000008 ///< Comparator A Down Interrupt +#define PWM_X_ISC_INTCMPAU 0x00000004 ///< Comparator A Up Interrupt +#define PWM_X_ISC_INTCNTLOAD 0x00000002 ///< Counter=Load Interrupt +#define PWM_X_ISC_INTCNTZERO 0x00000001 ///< Counter=0 Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_LOAD register. + */ +/*\{*/ +#define PWM_X_LOAD_M 0x0000FFFF ///< Counter Load Value +#define PWM_X_LOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_COUNT register. + */ +/*\{*/ +#define PWM_X_COUNT_M 0x0000FFFF ///< Counter Value +#define PWM_X_COUNT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_CMPA register. + */ +/*\{*/ +#define PWM_X_CMPA_M 0x0000FFFF ///< Comparator A Value +#define PWM_X_CMPA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_CMPB register. + */ +/*\{*/ +#define PWM_X_CMPB_M 0x0000FFFF ///< Comparator B Value +#define PWM_X_CMPB_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_GENA register. + */ +/*\{*/ +#define PWM_X_GENA_ACTCMPBD_M 0x00000C00 ///< Action for Comparator B Down +#define PWM_X_GENA_ACTCMPBD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTCMPBD_INV 0x00000400 ///< Invert pwmA +#define PWM_X_GENA_ACTCMPBD_ZERO 0x00000800 ///< Drive pwmA Low +#define PWM_X_GENA_ACTCMPBD_ONE 0x00000C00 ///< Drive pwmA High +#define PWM_X_GENA_ACTCMPBU_M 0x00000300 ///< Action for Comparator B Up +#define PWM_X_GENA_ACTCMPBU_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTCMPBU_INV 0x00000100 ///< Invert pwmA +#define PWM_X_GENA_ACTCMPBU_ZERO 0x00000200 ///< Drive pwmA Low +#define PWM_X_GENA_ACTCMPBU_ONE 0x00000300 ///< Drive pwmA High +#define PWM_X_GENA_ACTCMPAD_M 0x000000C0 ///< Action for Comparator A Down +#define PWM_X_GENA_ACTCMPAD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTCMPAD_INV 0x00000040 ///< Invert pwmA +#define PWM_X_GENA_ACTCMPAD_ZERO 0x00000080 ///< Drive pwmA Low +#define PWM_X_GENA_ACTCMPAD_ONE 0x000000C0 ///< Drive pwmA High +#define PWM_X_GENA_ACTCMPAU_M 0x00000030 ///< Action for Comparator A Up +#define PWM_X_GENA_ACTCMPAU_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTCMPAU_INV 0x00000010 ///< Invert pwmA +#define PWM_X_GENA_ACTCMPAU_ZERO 0x00000020 ///< Drive pwmA Low +#define PWM_X_GENA_ACTCMPAU_ONE 0x00000030 ///< Drive pwmA High +#define PWM_X_GENA_ACTLOAD_M 0x0000000C ///< Action for Counter=LOAD +#define PWM_X_GENA_ACTLOAD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTLOAD_INV 0x00000004 ///< Invert pwmA +#define PWM_X_GENA_ACTLOAD_ZERO 0x00000008 ///< Drive pwmA Low +#define PWM_X_GENA_ACTLOAD_ONE 0x0000000C ///< Drive pwmA High +#define PWM_X_GENA_ACTZERO_M 0x00000003 ///< Action for Counter=0 +#define PWM_X_GENA_ACTZERO_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENA_ACTZERO_INV 0x00000001 ///< Invert pwmA +#define PWM_X_GENA_ACTZERO_ZERO 0x00000002 ///< Drive pwmA Low +#define PWM_X_GENA_ACTZERO_ONE 0x00000003 ///< Drive pwmA High +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_GENB register. + */ +/*\{*/ +#define PWM_X_GENB_ACTCMPBD_M 0x00000C00 ///< Action for Comparator B Down +#define PWM_X_GENB_ACTCMPBD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTCMPBD_INV 0x00000400 ///< Invert pwmB +#define PWM_X_GENB_ACTCMPBD_ZERO 0x00000800 ///< Drive pwmB Low +#define PWM_X_GENB_ACTCMPBD_ONE 0x00000C00 ///< Drive pwmB High +#define PWM_X_GENB_ACTCMPBU_M 0x00000300 ///< Action for Comparator B Up +#define PWM_X_GENB_ACTCMPBU_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTCMPBU_INV 0x00000100 ///< Invert pwmB +#define PWM_X_GENB_ACTCMPBU_ZERO 0x00000200 ///< Drive pwmB Low +#define PWM_X_GENB_ACTCMPBU_ONE 0x00000300 ///< Drive pwmB High +#define PWM_X_GENB_ACTCMPAD_M 0x000000C0 ///< Action for Comparator A Down +#define PWM_X_GENB_ACTCMPAD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTCMPAD_INV 0x00000040 ///< Invert pwmB +#define PWM_X_GENB_ACTCMPAD_ZERO 0x00000080 ///< Drive pwmB Low +#define PWM_X_GENB_ACTCMPAD_ONE 0x000000C0 ///< Drive pwmB High +#define PWM_X_GENB_ACTCMPAU_M 0x00000030 ///< Action for Comparator A Up +#define PWM_X_GENB_ACTCMPAU_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTCMPAU_INV 0x00000010 ///< Invert pwmB +#define PWM_X_GENB_ACTCMPAU_ZERO 0x00000020 ///< Drive pwmB Low +#define PWM_X_GENB_ACTCMPAU_ONE 0x00000030 ///< Drive pwmB High +#define PWM_X_GENB_ACTLOAD_M 0x0000000C ///< Action for Counter=LOAD +#define PWM_X_GENB_ACTLOAD_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTLOAD_INV 0x00000004 ///< Invert pwmB +#define PWM_X_GENB_ACTLOAD_ZERO 0x00000008 ///< Drive pwmB Low +#define PWM_X_GENB_ACTLOAD_ONE 0x0000000C ///< Drive pwmB High +#define PWM_X_GENB_ACTZERO_M 0x00000003 ///< Action for Counter=0 +#define PWM_X_GENB_ACTZERO_NONE 0x00000000 ///< Do nothing +#define PWM_X_GENB_ACTZERO_INV 0x00000001 ///< Invert pwmB +#define PWM_X_GENB_ACTZERO_ZERO 0x00000002 ///< Drive pwmB Low +#define PWM_X_GENB_ACTZERO_ONE 0x00000003 ///< Drive pwmB High +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_DBCTL register. + */ +/*\{*/ +#define PWM_X_DBCTL_ENABLE 0x00000001 ///< Dead-Band Generator Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_DBRISE register. + */ +/*\{*/ +#define PWM_X_DBRISE_DELAY_M 0x00000FFF ///< Dead-Band Rise Delay +#define PWM_X_DBRISE_DELAY_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the PWM_O_X_DBFALL register. + */ +/*\{*/ +#define PWM_X_DBFALL_DELAY_M 0x00000FFF ///< Dead-Band Fall Delay +#define PWM_X_DBFALL_DELAY_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_CTL register. + */ +/*\{*/ +#define QEI_CTL_STALLEN 0x00001000 ///< Stall QEI +#define QEI_CTL_INVI 0x00000800 ///< Invert Index Pulse +#define QEI_CTL_INVB 0x00000400 ///< Invert PhB +#define QEI_CTL_INVA 0x00000200 ///< Invert PhA +#define QEI_CTL_VELDIV_M 0x000001C0 ///< Predivide Velocity +#define QEI_CTL_VELDIV_1 0x00000000 ///< QEI clock /1 +#define QEI_CTL_VELDIV_2 0x00000040 ///< QEI clock /2 +#define QEI_CTL_VELDIV_4 0x00000080 ///< QEI clock /4 +#define QEI_CTL_VELDIV_8 0x000000C0 ///< QEI clock /8 +#define QEI_CTL_VELDIV_16 0x00000100 ///< QEI clock /16 +#define QEI_CTL_VELDIV_32 0x00000140 ///< QEI clock /32 +#define QEI_CTL_VELDIV_64 0x00000180 ///< QEI clock /64 +#define QEI_CTL_VELDIV_128 0x000001C0 ///< QEI clock /128 +#define QEI_CTL_VELEN 0x00000020 ///< Capture Velocity +#define QEI_CTL_RESMODE 0x00000010 ///< Reset Mode +#define QEI_CTL_CAPMODE 0x00000008 ///< Capture Mode +#define QEI_CTL_SIGMODE 0x00000004 ///< Signal Mode +#define QEI_CTL_SWAP 0x00000002 ///< Swap Signals +#define QEI_CTL_ENABLE 0x00000001 ///< Enable QEI +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_STAT register. + */ +/*\{*/ +#define QEI_STAT_DIRECTION 0x00000002 ///< Direction of Rotation +#define QEI_STAT_ERROR 0x00000001 ///< Error Detected +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_POS register. + */ +/*\{*/ +#define QEI_POS_M 0xFFFFFFFF ///< Current Position Integrator Value +#define QEI_POS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_MAXPOS register. + */ +/*\{*/ +#define QEI_MAXPOS_M 0xFFFFFFFF ///< Maximum Position Integrator Value +#define QEI_MAXPOS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_LOAD register. + */ +/*\{*/ +#define QEI_LOAD_M 0xFFFFFFFF ///< Velocity Timer Load Value +#define QEI_LOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_TIME register. + */ +/*\{*/ +#define QEI_TIME_M 0xFFFFFFFF ///< Velocity Timer Current Value +#define QEI_TIME_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_COUNT register. + */ +/*\{*/ +#define QEI_COUNT_M 0xFFFFFFFF ///< Velocity Pulse Count +#define QEI_COUNT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_SPEED register. + */ +/*\{*/ +#define QEI_SPEED_M 0xFFFFFFFF ///< Velocity +#define QEI_SPEED_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_INTEN register. + */ +/*\{*/ +#define QEI_INTEN_ERROR 0x00000008 ///< Phase Error Interrupt Enable +#define QEI_INTEN_DIR 0x00000004 ///< Direction Change Interrupt + ///< Enable +#define QEI_INTEN_TIMER 0x00000002 ///< Timer Expires Interrupt Enable +#define QEI_INTEN_INDEX 0x00000001 ///< Index Pulse Detected Interrupt + ///< Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_RIS register. + */ +/*\{*/ +#define QEI_RIS_ERROR 0x00000008 ///< Phase Error Detected +#define QEI_RIS_DIR 0x00000004 ///< Direction Change Detected +#define QEI_RIS_TIMER 0x00000002 ///< Velocity Timer Expired +#define QEI_RIS_INDEX 0x00000001 ///< Index Pulse Asserted +/*\}*/ + +/** + * The following are defines for the bit fields in the QEI_O_ISC register. + */ +/*\{*/ +#define QEI_ISC_ERROR 0x00000008 ///< Phase Error Interrupt +#define QEI_ISC_DIR 0x00000004 ///< Direction Change Interrupt +#define QEI_ISC_TIMER 0x00000002 ///< Velocity Timer Expired Interrupt +#define QEI_ISC_INDEX 0x00000001 ///< Index Pulse Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_CFG register. + */ +/*\{*/ +#define TIMER_CFG_M 0x00000007 ///< GPTM Configuration +#define TIMER_CFG_32_BIT_TIMER 0x00000000 ///< 32-bit timer configuration +#define TIMER_CFG_32_BIT_RTC 0x00000001 ///< 32-bit real-time clock (RTC) + ///< counter configuration +#define TIMER_CFG_16_BIT 0x00000004 ///< 16-bit timer configuration. The + ///< function is controlled by bits + ///< 1:0 of GPTMTAMR and GPTMTBMR +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAMR register. + */ +/*\{*/ +#define TIMER_TAMR_TAAMS 0x00000008 ///< GPTM Timer A Alternate Mode + ///< Select +#define TIMER_TAMR_TACMR 0x00000004 ///< GPTM Timer A Capture Mode +#define TIMER_TAMR_TAMR_M 0x00000003 ///< GPTM Timer A Mode +#define TIMER_TAMR_TAMR_1_SHOT 0x00000001 ///< One-Shot Timer mode +#define TIMER_TAMR_TAMR_PERIOD 0x00000002 ///< Periodic Timer mode +#define TIMER_TAMR_TAMR_CAP 0x00000003 ///< Capture mode +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBMR register. + */ +/*\{*/ +#define TIMER_TBMR_TBAMS 0x00000008 ///< GPTM Timer B Alternate Mode + ///< Select +#define TIMER_TBMR_TBCMR 0x00000004 ///< GPTM Timer B Capture Mode +#define TIMER_TBMR_TBMR_M 0x00000003 ///< GPTM Timer B Mode +#define TIMER_TBMR_TBMR_1_SHOT 0x00000001 ///< One-Shot Timer mode +#define TIMER_TBMR_TBMR_PERIOD 0x00000002 ///< Periodic Timer mode +#define TIMER_TBMR_TBMR_CAP 0x00000003 ///< Capture mode +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_CTL register. + */ +/*\{*/ +#define TIMER_CTL_TBPWML 0x00004000 ///< GPTM Timer B PWM Output Level +#define TIMER_CTL_TBOTE 0x00002000 ///< GPTM Timer B Output Trigger + ///< Enable +#define TIMER_CTL_TBEVENT_M 0x00000C00 ///< GPTM Timer B Event Mode +#define TIMER_CTL_TBEVENT_POS 0x00000000 ///< Positive edge +#define TIMER_CTL_TBEVENT_NEG 0x00000400 ///< Negative edge +#define TIMER_CTL_TBEVENT_BOTH 0x00000C00 ///< Both edges +#define TIMER_CTL_TBSTALL 0x00000200 ///< GPTM Timer B Stall Enable +#define TIMER_CTL_TBEN 0x00000100 ///< GPTM Timer B Enable +#define TIMER_CTL_TAPWML 0x00000040 ///< GPTM Timer A PWM Output Level +#define TIMER_CTL_TAOTE 0x00000020 ///< GPTM Timer A Output Trigger + ///< Enable +#define TIMER_CTL_RTCEN 0x00000010 ///< GPTM RTC Enable +#define TIMER_CTL_TAEVENT_M 0x0000000C ///< GPTM Timer A Event Mode +#define TIMER_CTL_TAEVENT_POS 0x00000000 ///< Positive edge +#define TIMER_CTL_TAEVENT_NEG 0x00000004 ///< Negative edge +#define TIMER_CTL_TAEVENT_BOTH 0x0000000C ///< Both edges +#define TIMER_CTL_TASTALL 0x00000002 ///< GPTM Timer A Stall Enable +#define TIMER_CTL_TAEN 0x00000001 ///< GPTM Timer A Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_IMR register. + */ +/*\{*/ +#define TIMER_IMR_CBEIM 0x00000400 ///< GPTM Capture B Event Interrupt + ///< Mask +#define TIMER_IMR_CBMIM 0x00000200 ///< GPTM Capture B Match Interrupt + ///< Mask +#define TIMER_IMR_TBTOIM 0x00000100 ///< GPTM Timer B Time-Out Interrupt + ///< Mask +#define TIMER_IMR_RTCIM 0x00000008 ///< GPTM RTC Interrupt Mask +#define TIMER_IMR_CAEIM 0x00000004 ///< GPTM Capture A Event Interrupt + ///< Mask +#define TIMER_IMR_CAMIM 0x00000002 ///< GPTM Capture A Match Interrupt + ///< Mask +#define TIMER_IMR_TATOIM 0x00000001 ///< GPTM Timer A Time-Out Interrupt + ///< Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_RIS register. + */ +/*\{*/ +#define TIMER_RIS_CBERIS 0x00000400 ///< GPTM Capture B Event Raw + ///< Interrupt +#define TIMER_RIS_CBMRIS 0x00000200 ///< GPTM Capture B Match Raw + ///< Interrupt +#define TIMER_RIS_TBTORIS 0x00000100 ///< GPTM Timer B Time-Out Raw + ///< Interrupt +#define TIMER_RIS_RTCRIS 0x00000008 ///< GPTM RTC Raw Interrupt +#define TIMER_RIS_CAERIS 0x00000004 ///< GPTM Capture A Event Raw + ///< Interrupt +#define TIMER_RIS_CAMRIS 0x00000002 ///< GPTM Capture A Match Raw + ///< Interrupt +#define TIMER_RIS_TATORIS 0x00000001 ///< GPTM Timer A Time-Out Raw + ///< Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_MIS register. + */ +/*\{*/ +#define TIMER_MIS_CBEMIS 0x00000400 ///< GPTM Capture B Event Masked + ///< Interrupt +#define TIMER_MIS_CBMMIS 0x00000200 ///< GPTM Capture B Match Masked + ///< Interrupt +#define TIMER_MIS_TBTOMIS 0x00000100 ///< GPTM Timer B Time-Out Masked + ///< Interrupt +#define TIMER_MIS_RTCMIS 0x00000008 ///< GPTM RTC Masked Interrupt +#define TIMER_MIS_CAEMIS 0x00000004 ///< GPTM Capture A Event Masked + ///< Interrupt +#define TIMER_MIS_CAMMIS 0x00000002 ///< GPTM Capture A Match Masked + ///< Interrupt +#define TIMER_MIS_TATOMIS 0x00000001 ///< GPTM Timer A Time-Out Masked + ///< Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_ICR register. + */ +/*\{*/ +#define TIMER_ICR_CBECINT 0x00000400 ///< GPTM Capture B Event Interrupt + ///< Clear +#define TIMER_ICR_CBMCINT 0x00000200 ///< GPTM Capture B Match Interrupt + ///< Clear +#define TIMER_ICR_TBTOCINT 0x00000100 ///< GPTM Timer B Time-Out Interrupt + ///< Clear +#define TIMER_ICR_RTCCINT 0x00000008 ///< GPTM RTC Interrupt Clear +#define TIMER_ICR_CAECINT 0x00000004 ///< GPTM Capture A Event Interrupt + ///< Clear +#define TIMER_ICR_CAMCINT 0x00000002 ///< GPTM Capture A Match Interrupt + ///< Clear +#define TIMER_ICR_TATOCINT 0x00000001 ///< GPTM Timer A Time-Out Raw + ///< Interrupt +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAILR register. + */ +/*\{*/ +#define TIMER_TAILR_TAILRH_M 0xFFFF0000 ///< GPTM Timer A Interval Load + ///< Register High +#define TIMER_TAILR_TAILRL_M 0x0000FFFF ///< GPTM Timer A Interval Load + ///< Register Low +#define TIMER_TAILR_TAILRH_S 16 +#define TIMER_TAILR_TAILRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBILR register. + */ +/*\{*/ +#define TIMER_TBILR_TBILRL_M 0x0000FFFF ///< GPTM Timer B Interval Load + ///< Register +#define TIMER_TBILR_TBILRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAMATCHR +* register. + */ +/*\{*/ +#define TIMER_TAMATCHR_TAMRH_M 0xFFFF0000 ///< GPTM Timer A Match Register High +#define TIMER_TAMATCHR_TAMRL_M 0x0000FFFF ///< GPTM Timer A Match Register Low +#define TIMER_TAMATCHR_TAMRH_S 16 +#define TIMER_TAMATCHR_TAMRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBMATCHR +* register. + */ +/*\{*/ +#define TIMER_TBMATCHR_TBMRL_M 0x0000FFFF ///< GPTM Timer B Match Register Low +#define TIMER_TBMATCHR_TBMRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAPR register. + */ +/*\{*/ +#define TIMER_TAPR_TAPSR_M 0x000000FF ///< GPTM Timer A Prescale +#define TIMER_TAPR_TAPSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBPR register. + */ +/*\{*/ +#define TIMER_TBPR_TBPSR_M 0x000000FF ///< GPTM Timer B Prescale +#define TIMER_TBPR_TBPSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAPMR register. + */ +/*\{*/ +#define TIMER_TAPMR_TAPSMR_M 0x000000FF ///< GPTM TimerA Prescale Match +#define TIMER_TAPMR_TAPSMR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBPMR register. + */ +/*\{*/ +#define TIMER_TBPMR_TBPSMR_M 0x000000FF ///< GPTM TimerB Prescale Match +#define TIMER_TBPMR_TBPSMR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TAR register. + */ +/*\{*/ +#define TIMER_TAR_TARH_M 0xFFFF0000 ///< GPTM Timer A Register High +#define TIMER_TAR_TARL_M 0x0000FFFF ///< GPTM Timer A Register Low +#define TIMER_TAR_TARH_S 16 +#define TIMER_TAR_TARL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the TIMER_O_TBR register. + */ +/*\{*/ +#define TIMER_TBR_TBRL_M 0x0000FFFF ///< GPTM Timer B +#define TIMER_TBR_TBRL_S 0 +/*\}*/ + + +/** + * The following are defines for the bit fields in the COMP_O_ACMIS register. + */ +/*\{*/ +#define COMP_ACMIS_IN2 0x00000004 ///< Comparator 2 Masked Interrupt + ///< Status +#define COMP_ACMIS_IN1 0x00000002 ///< Comparator 1 Masked Interrupt + ///< Status +#define COMP_ACMIS_IN0 0x00000001 ///< Comparator 0 Masked Interrupt + ///< Status +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACRIS register. + */ +/*\{*/ +#define COMP_ACRIS_IN2 0x00000004 ///< Comparator 2 Interrupt Status +#define COMP_ACRIS_IN1 0x00000002 ///< Comparator 1 Interrupt Status +#define COMP_ACRIS_IN0 0x00000001 ///< Comparator 0 Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACINTEN register. + */ +/*\{*/ +#define COMP_ACINTEN_IN2 0x00000004 ///< Comparator 2 Interrupt Enable +#define COMP_ACINTEN_IN1 0x00000002 ///< Comparator 1 Interrupt Enable +#define COMP_ACINTEN_IN0 0x00000001 ///< Comparator 0 Interrupt Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACREFCTL +* register. + */ +/*\{*/ +#define COMP_ACREFCTL_EN 0x00000200 ///< Resistor Ladder Enable +#define COMP_ACREFCTL_RNG 0x00000100 ///< Resistor Ladder Range +#define COMP_ACREFCTL_VREF_M 0x0000000F ///< Resistor Ladder Voltage Ref +#define COMP_ACREFCTL_VREF_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACSTAT0 register. + */ +/*\{*/ +#define COMP_ACSTAT0_OVAL 0x00000002 ///< Comparator Output Value +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACCTL0 register. + */ +/*\{*/ +#define COMP_ACCTL0_TOEN 0x00000800 ///< Trigger Output Enable +#define COMP_ACCTL0_ASRCP_M 0x00000600 ///< Analog Source Positive +#define COMP_ACCTL0_ASRCP_PIN 0x00000000 ///< Pin value of Cn+ +#define COMP_ACCTL0_ASRCP_PIN0 0x00000200 ///< Pin value of C0+ +#define COMP_ACCTL0_ASRCP_REF 0x00000400 ///< Internal voltage reference + ///< (VIREF) +#define COMP_ACCTL0_TSLVAL 0x00000080 ///< Trigger Sense Level Value +#define COMP_ACCTL0_TSEN_M 0x00000060 ///< Trigger Sense +#define COMP_ACCTL0_TSEN_LEVEL 0x00000000 ///< Level sense, see TSLVAL +#define COMP_ACCTL0_TSEN_FALL 0x00000020 ///< Falling edge +#define COMP_ACCTL0_TSEN_RISE 0x00000040 ///< Rising edge +#define COMP_ACCTL0_TSEN_BOTH 0x00000060 ///< Either edge +#define COMP_ACCTL0_ISLVAL 0x00000010 ///< Interrupt Sense Level Value +#define COMP_ACCTL0_ISEN_M 0x0000000C ///< Interrupt Sense +#define COMP_ACCTL0_ISEN_LEVEL 0x00000000 ///< Level sense, see ISLVAL +#define COMP_ACCTL0_ISEN_FALL 0x00000004 ///< Falling edge +#define COMP_ACCTL0_ISEN_RISE 0x00000008 ///< Rising edge +#define COMP_ACCTL0_ISEN_BOTH 0x0000000C ///< Either edge +#define COMP_ACCTL0_CINV 0x00000002 ///< Comparator Output Invert +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACSTAT1 register. + */ +/*\{*/ +#define COMP_ACSTAT1_OVAL 0x00000002 ///< Comparator Output Value +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACCTL1 register. + */ +/*\{*/ +#define COMP_ACCTL1_TOEN 0x00000800 ///< Trigger Output Enable +#define COMP_ACCTL1_ASRCP_M 0x00000600 ///< Analog Source Positive +#define COMP_ACCTL1_ASRCP_PIN 0x00000000 ///< Pin value of Cn+ +#define COMP_ACCTL1_ASRCP_PIN0 0x00000200 ///< Pin value of C0+ +#define COMP_ACCTL1_ASRCP_REF 0x00000400 ///< Internal voltage reference + ///< (VIREF) +#define COMP_ACCTL1_TSLVAL 0x00000080 ///< Trigger Sense Level Value +#define COMP_ACCTL1_TSEN_M 0x00000060 ///< Trigger Sense +#define COMP_ACCTL1_TSEN_LEVEL 0x00000000 ///< Level sense, see TSLVAL +#define COMP_ACCTL1_TSEN_FALL 0x00000020 ///< Falling edge +#define COMP_ACCTL1_TSEN_RISE 0x00000040 ///< Rising edge +#define COMP_ACCTL1_TSEN_BOTH 0x00000060 ///< Either edge +#define COMP_ACCTL1_ISLVAL 0x00000010 ///< Interrupt Sense Level Value +#define COMP_ACCTL1_ISEN_M 0x0000000C ///< Interrupt Sense +#define COMP_ACCTL1_ISEN_LEVEL 0x00000000 ///< Level sense, see ISLVAL +#define COMP_ACCTL1_ISEN_FALL 0x00000004 ///< Falling edge +#define COMP_ACCTL1_ISEN_RISE 0x00000008 ///< Rising edge +#define COMP_ACCTL1_ISEN_BOTH 0x0000000C ///< Either edge +#define COMP_ACCTL1_CINV 0x00000002 ///< Comparator Output Invert +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACSTAT2 register. + */ +/*\{*/ +#define COMP_ACSTAT2_OVAL 0x00000002 ///< Comparator Output Value +/*\}*/ + +/** + * The following are defines for the bit fields in the COMP_O_ACCTL2 register. + */ +/*\{*/ +#define COMP_ACCTL2_TOEN 0x00000800 ///< Trigger Output Enable +#define COMP_ACCTL2_ASRCP_M 0x00000600 ///< Analog Source Positive +#define COMP_ACCTL2_ASRCP_PIN 0x00000000 ///< Pin value of Cn+ +#define COMP_ACCTL2_ASRCP_PIN0 0x00000200 ///< Pin value of C0+ +#define COMP_ACCTL2_ASRCP_REF 0x00000400 ///< Internal voltage reference + ///< (VIREF) +#define COMP_ACCTL2_TSLVAL 0x00000080 ///< Trigger Sense Level Value +#define COMP_ACCTL2_TSEN_M 0x00000060 ///< Trigger Sense +#define COMP_ACCTL2_TSEN_LEVEL 0x00000000 ///< Level sense, see TSLVAL +#define COMP_ACCTL2_TSEN_FALL 0x00000020 ///< Falling edge +#define COMP_ACCTL2_TSEN_RISE 0x00000040 ///< Rising edge +#define COMP_ACCTL2_TSEN_BOTH 0x00000060 ///< Either edge +#define COMP_ACCTL2_ISLVAL 0x00000010 ///< Interrupt Sense Level Value +#define COMP_ACCTL2_ISEN_M 0x0000000C ///< Interrupt Sense +#define COMP_ACCTL2_ISEN_LEVEL 0x00000000 ///< Level sense, see ISLVAL +#define COMP_ACCTL2_ISEN_FALL 0x00000004 ///< Falling edge +#define COMP_ACCTL2_ISEN_RISE 0x00000008 ///< Rising edge +#define COMP_ACCTL2_ISEN_BOTH 0x0000000C ///< Either edge +#define COMP_ACCTL2_CINV 0x00000002 ///< Comparator Output Invert +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCC register. + */ +/*\{*/ +#define HIB_RTCC_M 0xFFFFFFFF ///< RTC Counter +#define HIB_RTCC_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCM0 register. + */ +/*\{*/ +#define HIB_RTCM0_M 0xFFFFFFFF ///< RTC Match 0 +#define HIB_RTCM0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCM1 register. + */ +/*\{*/ +#define HIB_RTCM1_M 0xFFFFFFFF ///< RTC Match 1 +#define HIB_RTCM1_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCLD register. + */ +/*\{*/ +#define HIB_RTCLD_M 0xFFFFFFFF ///< RTC Load +#define HIB_RTCLD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_CTL register. + */ +/*\{*/ +#define HIB_CTL_VABORT 0x00000080 ///< Power Cut Abort Enable +#define HIB_CTL_CLK32EN 0x00000040 ///< Clocking Enable +#define HIB_CTL_LOWBATEN 0x00000020 ///< Low Battery Monitoring Enable +#define HIB_CTL_PINWEN 0x00000010 ///< External WAKE Pin Enable +#define HIB_CTL_RTCWEN 0x00000008 ///< RTC Wake-up Enable +#define HIB_CTL_CLKSEL 0x00000004 ///< Hibernation Module Clock Select +#define HIB_CTL_HIBREQ 0x00000002 ///< Hibernation Request +#define HIB_CTL_RTCEN 0x00000001 ///< RTC Timer Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_IM register. + */ +/*\{*/ +#define HIB_IM_EXTW 0x00000008 ///< External Wake-Up Interrupt Mask +#define HIB_IM_LOWBAT 0x00000004 ///< Low Battery Voltage Interrupt + ///< Mask +#define HIB_IM_RTCALT1 0x00000002 ///< RTC Alert 1 Interrupt Mask +#define HIB_IM_RTCALT0 0x00000001 ///< RTC Alert 0 Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RIS register. + */ +/*\{*/ +#define HIB_RIS_EXTW 0x00000008 ///< External Wake-Up Raw Interrupt + ///< Status +#define HIB_RIS_LOWBAT 0x00000004 ///< Low Battery Voltage Raw + ///< Interrupt Status +#define HIB_RIS_RTCALT1 0x00000002 ///< RTC Alert 1 Raw Interrupt Status +#define HIB_RIS_RTCALT0 0x00000001 ///< RTC Alert 0 Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_MIS register. + */ +/*\{*/ +#define HIB_MIS_EXTW 0x00000008 ///< External Wake-Up Masked + ///< Interrupt Status +#define HIB_MIS_LOWBAT 0x00000004 ///< Low Battery Voltage Masked + ///< Interrupt Status +#define HIB_MIS_RTCALT1 0x00000002 ///< RTC Alert 1 Masked Interrupt + ///< Status +#define HIB_MIS_RTCALT0 0x00000001 ///< RTC Alert 0 Masked Interrupt + ///< Status +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_IC register. + */ +/*\{*/ +#define HIB_IC_EXTW 0x00000008 ///< External Wake-Up Masked + ///< Interrupt Clear +#define HIB_IC_LOWBAT 0x00000004 ///< Low Battery Voltage Masked + ///< Interrupt Clear +#define HIB_IC_RTCALT1 0x00000002 ///< RTC Alert1 Masked Interrupt + ///< Clear +#define HIB_IC_RTCALT0 0x00000001 ///< RTC Alert0 Masked Interrupt + ///< Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_RTCT register. + */ +/*\{*/ +#define HIB_RTCT_TRIM_M 0x0000FFFF ///< RTC Trim Value +#define HIB_RTCT_TRIM_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the HIB_DATA register. + */ +/*\{*/ +#define HIB_DATA_RTD_M 0xFFFFFFFF ///< Hibernation Module NV Data +#define HIB_DATA_RTD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FMA register. + */ +/*\{*/ +#define FLASH_FMA_OFFSET_M 0x0003FFFF ///< Address Offset +#define FLASH_FMA_OFFSET_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FMD register. + */ +/*\{*/ +#define FLASH_FMD_DATA_M 0xFFFFFFFF ///< Data Value +#define FLASH_FMD_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FMC register. + */ +/*\{*/ +#define FLASH_FMC_WRKEY 0xA4420000 ///< FLASH write key +#define FLASH_FMC_COMT 0x00000008 ///< Commit Register Value +#define FLASH_FMC_MERASE 0x00000004 ///< Mass Erase Flash Memory +#define FLASH_FMC_ERASE 0x00000002 ///< Erase a Page of Flash Memory +#define FLASH_FMC_WRITE 0x00000001 ///< Write a Word into Flash Memory +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FCRIS register. + */ +/*\{*/ +#define FLASH_FCRIS_PRIS 0x00000002 ///< Programming Raw Interrupt Status +#define FLASH_FCRIS_ARIS 0x00000001 ///< Access Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FCIM register. + */ +/*\{*/ +#define FLASH_FCIM_PMASK 0x00000002 ///< Programming Interrupt Mask +#define FLASH_FCIM_AMASK 0x00000001 ///< Access Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_FCMISC register. + */ +/*\{*/ +#define FLASH_FCMISC_PMISC 0x00000002 ///< Programming Masked Interrupt + ///< Status and Clear +#define FLASH_FCMISC_AMISC 0x00000001 ///< Access Masked Interrupt Status + ///< and Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_USECRL register. + */ +/*\{*/ +#define FLASH_USECRL_M 0x000000FF ///< Microsecond Reload Value +#define FLASH_USECRL_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_USERDBG register. + */ +/*\{*/ +#define FLASH_USERDBG_NW 0x80000000 ///< User Debug Not Written +#define FLASH_USERDBG_DATA_M 0x7FFFFFFC ///< User Data +#define FLASH_USERDBG_DBG1 0x00000002 ///< Debug Control 1 +#define FLASH_USERDBG_DBG0 0x00000001 ///< Debug Control 0 +#define FLASH_USERDBG_DATA_S 2 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_USERREG0 register. + */ +/*\{*/ +#define FLASH_USERREG0_NW 0x80000000 ///< Not Written +#define FLASH_USERREG0_DATA_M 0x7FFFFFFF ///< User Data +#define FLASH_USERREG0_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the FLASH_USERREG1 register. + */ +/*\{*/ +#define FLASH_USERREG1_NW 0x80000000 ///< Not Written +#define FLASH_USERREG1_DATA_M 0x7FFFFFFF ///< User Data +#define FLASH_USERREG1_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the erase size of the FLASH block that is +* erased by an erase operation, and the protect size is the size of the FLASH +* block that is protected by each protection register. + */ +/*\{*/ +#define FLASH_PROTECT_SIZE 0x00000800 +#define FLASH_ERASE_SIZE 0x00000400 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_TYPE register. + */ +/*\{*/ +#define NVIC_INT_TYPE_LINES_M 0x0000001F ///< Number of interrupt lines (x32) +#define NVIC_INT_TYPE_LINES_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CTRL register. + */ +/*\{*/ +#define NVIC_ST_CTRL_COUNT 0x00010000 ///< Count flag +#define NVIC_ST_CTRL_CLK_SRC 0x00000004 ///< Clock Source +#define NVIC_ST_CTRL_INTEN 0x00000002 ///< Interrupt enable +#define NVIC_ST_CTRL_ENABLE 0x00000001 ///< Counter mode +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_RELOAD register. + */ +/*\{*/ +#define NVIC_ST_RELOAD_M 0x00FFFFFF ///< Counter load value +#define NVIC_ST_RELOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CURRENT +* register. + */ +/*\{*/ +#define NVIC_ST_CURRENT_M 0x00FFFFFF ///< Counter current value +#define NVIC_ST_CURRENT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CAL register. + */ +/*\{*/ +#define NVIC_ST_CAL_NOREF 0x80000000 ///< No reference clock +#define NVIC_ST_CAL_SKEW 0x40000000 ///< Clock skew +#define NVIC_ST_CAL_ONEMS_M 0x00FFFFFF ///< 1ms reference value +#define NVIC_ST_CAL_ONEMS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN0 register. + */ +/*\{*/ +#define NVIC_EN0_INT31 0x80000000 ///< Interrupt 31 enable +#define NVIC_EN0_INT30 0x40000000 ///< Interrupt 30 enable +#define NVIC_EN0_INT29 0x20000000 ///< Interrupt 29 enable +#define NVIC_EN0_INT28 0x10000000 ///< Interrupt 28 enable +#define NVIC_EN0_INT27 0x08000000 ///< Interrupt 27 enable +#define NVIC_EN0_INT26 0x04000000 ///< Interrupt 26 enable +#define NVIC_EN0_INT25 0x02000000 ///< Interrupt 25 enable +#define NVIC_EN0_INT24 0x01000000 ///< Interrupt 24 enable +#define NVIC_EN0_INT23 0x00800000 ///< Interrupt 23 enable +#define NVIC_EN0_INT22 0x00400000 ///< Interrupt 22 enable +#define NVIC_EN0_INT21 0x00200000 ///< Interrupt 21 enable +#define NVIC_EN0_INT20 0x00100000 ///< Interrupt 20 enable +#define NVIC_EN0_INT19 0x00080000 ///< Interrupt 19 enable +#define NVIC_EN0_INT18 0x00040000 ///< Interrupt 18 enable +#define NVIC_EN0_INT17 0x00020000 ///< Interrupt 17 enable +#define NVIC_EN0_INT16 0x00010000 ///< Interrupt 16 enable +#define NVIC_EN0_INT15 0x00008000 ///< Interrupt 15 enable +#define NVIC_EN0_INT14 0x00004000 ///< Interrupt 14 enable +#define NVIC_EN0_INT13 0x00002000 ///< Interrupt 13 enable +#define NVIC_EN0_INT12 0x00001000 ///< Interrupt 12 enable +#define NVIC_EN0_INT11 0x00000800 ///< Interrupt 11 enable +#define NVIC_EN0_INT10 0x00000400 ///< Interrupt 10 enable +#define NVIC_EN0_INT9 0x00000200 ///< Interrupt 9 enable +#define NVIC_EN0_INT8 0x00000100 ///< Interrupt 8 enable +#define NVIC_EN0_INT7 0x00000080 ///< Interrupt 7 enable +#define NVIC_EN0_INT6 0x00000040 ///< Interrupt 6 enable +#define NVIC_EN0_INT5 0x00000020 ///< Interrupt 5 enable +#define NVIC_EN0_INT4 0x00000010 ///< Interrupt 4 enable +#define NVIC_EN0_INT3 0x00000008 ///< Interrupt 3 enable +#define NVIC_EN0_INT2 0x00000004 ///< Interrupt 2 enable +#define NVIC_EN0_INT1 0x00000002 ///< Interrupt 1 enable +#define NVIC_EN0_INT0 0x00000001 ///< Interrupt 0 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN1 register. + */ +/*\{*/ +#define NVIC_EN1_INT59 0x08000000 ///< Interrupt 59 enable +#define NVIC_EN1_INT58 0x04000000 ///< Interrupt 58 enable +#define NVIC_EN1_INT57 0x02000000 ///< Interrupt 57 enable +#define NVIC_EN1_INT56 0x01000000 ///< Interrupt 56 enable +#define NVIC_EN1_INT55 0x00800000 ///< Interrupt 55 enable +#define NVIC_EN1_INT54 0x00400000 ///< Interrupt 54 enable +#define NVIC_EN1_INT53 0x00200000 ///< Interrupt 53 enable +#define NVIC_EN1_INT52 0x00100000 ///< Interrupt 52 enable +#define NVIC_EN1_INT51 0x00080000 ///< Interrupt 51 enable +#define NVIC_EN1_INT50 0x00040000 ///< Interrupt 50 enable +#define NVIC_EN1_INT49 0x00020000 ///< Interrupt 49 enable +#define NVIC_EN1_INT48 0x00010000 ///< Interrupt 48 enable +#define NVIC_EN1_INT47 0x00008000 ///< Interrupt 47 enable +#define NVIC_EN1_INT46 0x00004000 ///< Interrupt 46 enable +#define NVIC_EN1_INT45 0x00002000 ///< Interrupt 45 enable +#define NVIC_EN1_INT44 0x00001000 ///< Interrupt 44 enable +#define NVIC_EN1_INT43 0x00000800 ///< Interrupt 43 enable +#define NVIC_EN1_INT42 0x00000400 ///< Interrupt 42 enable +#define NVIC_EN1_INT41 0x00000200 ///< Interrupt 41 enable +#define NVIC_EN1_INT40 0x00000100 ///< Interrupt 40 enable +#define NVIC_EN1_INT39 0x00000080 ///< Interrupt 39 enable +#define NVIC_EN1_INT38 0x00000040 ///< Interrupt 38 enable +#define NVIC_EN1_INT37 0x00000020 ///< Interrupt 37 enable +#define NVIC_EN1_INT36 0x00000010 ///< Interrupt 36 enable +#define NVIC_EN1_INT35 0x00000008 ///< Interrupt 35 enable +#define NVIC_EN1_INT34 0x00000004 ///< Interrupt 34 enable +#define NVIC_EN1_INT33 0x00000002 ///< Interrupt 33 enable +#define NVIC_EN1_INT32 0x00000001 ///< Interrupt 32 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS0 register. + */ +/*\{*/ +#define NVIC_DIS0_INT31 0x80000000 ///< Interrupt 31 disable +#define NVIC_DIS0_INT30 0x40000000 ///< Interrupt 30 disable +#define NVIC_DIS0_INT29 0x20000000 ///< Interrupt 29 disable +#define NVIC_DIS0_INT28 0x10000000 ///< Interrupt 28 disable +#define NVIC_DIS0_INT27 0x08000000 ///< Interrupt 27 disable +#define NVIC_DIS0_INT26 0x04000000 ///< Interrupt 26 disable +#define NVIC_DIS0_INT25 0x02000000 ///< Interrupt 25 disable +#define NVIC_DIS0_INT24 0x01000000 ///< Interrupt 24 disable +#define NVIC_DIS0_INT23 0x00800000 ///< Interrupt 23 disable +#define NVIC_DIS0_INT22 0x00400000 ///< Interrupt 22 disable +#define NVIC_DIS0_INT21 0x00200000 ///< Interrupt 21 disable +#define NVIC_DIS0_INT20 0x00100000 ///< Interrupt 20 disable +#define NVIC_DIS0_INT19 0x00080000 ///< Interrupt 19 disable +#define NVIC_DIS0_INT18 0x00040000 ///< Interrupt 18 disable +#define NVIC_DIS0_INT17 0x00020000 ///< Interrupt 17 disable +#define NVIC_DIS0_INT16 0x00010000 ///< Interrupt 16 disable +#define NVIC_DIS0_INT15 0x00008000 ///< Interrupt 15 disable +#define NVIC_DIS0_INT14 0x00004000 ///< Interrupt 14 disable +#define NVIC_DIS0_INT13 0x00002000 ///< Interrupt 13 disable +#define NVIC_DIS0_INT12 0x00001000 ///< Interrupt 12 disable +#define NVIC_DIS0_INT11 0x00000800 ///< Interrupt 11 disable +#define NVIC_DIS0_INT10 0x00000400 ///< Interrupt 10 disable +#define NVIC_DIS0_INT9 0x00000200 ///< Interrupt 9 disable +#define NVIC_DIS0_INT8 0x00000100 ///< Interrupt 8 disable +#define NVIC_DIS0_INT7 0x00000080 ///< Interrupt 7 disable +#define NVIC_DIS0_INT6 0x00000040 ///< Interrupt 6 disable +#define NVIC_DIS0_INT5 0x00000020 ///< Interrupt 5 disable +#define NVIC_DIS0_INT4 0x00000010 ///< Interrupt 4 disable +#define NVIC_DIS0_INT3 0x00000008 ///< Interrupt 3 disable +#define NVIC_DIS0_INT2 0x00000004 ///< Interrupt 2 disable +#define NVIC_DIS0_INT1 0x00000002 ///< Interrupt 1 disable +#define NVIC_DIS0_INT0 0x00000001 ///< Interrupt 0 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS1 register. + */ +/*\{*/ +#define NVIC_DIS1_INT59 0x08000000 ///< Interrupt 59 disable +#define NVIC_DIS1_INT58 0x04000000 ///< Interrupt 58 disable +#define NVIC_DIS1_INT57 0x02000000 ///< Interrupt 57 disable +#define NVIC_DIS1_INT56 0x01000000 ///< Interrupt 56 disable +#define NVIC_DIS1_INT55 0x00800000 ///< Interrupt 55 disable +#define NVIC_DIS1_INT54 0x00400000 ///< Interrupt 54 disable +#define NVIC_DIS1_INT53 0x00200000 ///< Interrupt 53 disable +#define NVIC_DIS1_INT52 0x00100000 ///< Interrupt 52 disable +#define NVIC_DIS1_INT51 0x00080000 ///< Interrupt 51 disable +#define NVIC_DIS1_INT50 0x00040000 ///< Interrupt 50 disable +#define NVIC_DIS1_INT49 0x00020000 ///< Interrupt 49 disable +#define NVIC_DIS1_INT48 0x00010000 ///< Interrupt 48 disable +#define NVIC_DIS1_INT47 0x00008000 ///< Interrupt 47 disable +#define NVIC_DIS1_INT46 0x00004000 ///< Interrupt 46 disable +#define NVIC_DIS1_INT45 0x00002000 ///< Interrupt 45 disable +#define NVIC_DIS1_INT44 0x00001000 ///< Interrupt 44 disable +#define NVIC_DIS1_INT43 0x00000800 ///< Interrupt 43 disable +#define NVIC_DIS1_INT42 0x00000400 ///< Interrupt 42 disable +#define NVIC_DIS1_INT41 0x00000200 ///< Interrupt 41 disable +#define NVIC_DIS1_INT40 0x00000100 ///< Interrupt 40 disable +#define NVIC_DIS1_INT39 0x00000080 ///< Interrupt 39 disable +#define NVIC_DIS1_INT38 0x00000040 ///< Interrupt 38 disable +#define NVIC_DIS1_INT37 0x00000020 ///< Interrupt 37 disable +#define NVIC_DIS1_INT36 0x00000010 ///< Interrupt 36 disable +#define NVIC_DIS1_INT35 0x00000008 ///< Interrupt 35 disable +#define NVIC_DIS1_INT34 0x00000004 ///< Interrupt 34 disable +#define NVIC_DIS1_INT33 0x00000002 ///< Interrupt 33 disable +#define NVIC_DIS1_INT32 0x00000001 ///< Interrupt 32 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND0 register. + */ +/*\{*/ +#define NVIC_PEND0_INT31 0x80000000 ///< Interrupt 31 pend +#define NVIC_PEND0_INT30 0x40000000 ///< Interrupt 30 pend +#define NVIC_PEND0_INT29 0x20000000 ///< Interrupt 29 pend +#define NVIC_PEND0_INT28 0x10000000 ///< Interrupt 28 pend +#define NVIC_PEND0_INT27 0x08000000 ///< Interrupt 27 pend +#define NVIC_PEND0_INT26 0x04000000 ///< Interrupt 26 pend +#define NVIC_PEND0_INT25 0x02000000 ///< Interrupt 25 pend +#define NVIC_PEND0_INT24 0x01000000 ///< Interrupt 24 pend +#define NVIC_PEND0_INT23 0x00800000 ///< Interrupt 23 pend +#define NVIC_PEND0_INT22 0x00400000 ///< Interrupt 22 pend +#define NVIC_PEND0_INT21 0x00200000 ///< Interrupt 21 pend +#define NVIC_PEND0_INT20 0x00100000 ///< Interrupt 20 pend +#define NVIC_PEND0_INT19 0x00080000 ///< Interrupt 19 pend +#define NVIC_PEND0_INT18 0x00040000 ///< Interrupt 18 pend +#define NVIC_PEND0_INT17 0x00020000 ///< Interrupt 17 pend +#define NVIC_PEND0_INT16 0x00010000 ///< Interrupt 16 pend +#define NVIC_PEND0_INT15 0x00008000 ///< Interrupt 15 pend +#define NVIC_PEND0_INT14 0x00004000 ///< Interrupt 14 pend +#define NVIC_PEND0_INT13 0x00002000 ///< Interrupt 13 pend +#define NVIC_PEND0_INT12 0x00001000 ///< Interrupt 12 pend +#define NVIC_PEND0_INT11 0x00000800 ///< Interrupt 11 pend +#define NVIC_PEND0_INT10 0x00000400 ///< Interrupt 10 pend +#define NVIC_PEND0_INT9 0x00000200 ///< Interrupt 9 pend +#define NVIC_PEND0_INT8 0x00000100 ///< Interrupt 8 pend +#define NVIC_PEND0_INT7 0x00000080 ///< Interrupt 7 pend +#define NVIC_PEND0_INT6 0x00000040 ///< Interrupt 6 pend +#define NVIC_PEND0_INT5 0x00000020 ///< Interrupt 5 pend +#define NVIC_PEND0_INT4 0x00000010 ///< Interrupt 4 pend +#define NVIC_PEND0_INT3 0x00000008 ///< Interrupt 3 pend +#define NVIC_PEND0_INT2 0x00000004 ///< Interrupt 2 pend +#define NVIC_PEND0_INT1 0x00000002 ///< Interrupt 1 pend +#define NVIC_PEND0_INT0 0x00000001 ///< Interrupt 0 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND1 register. + */ +/*\{*/ +#define NVIC_PEND1_INT59 0x08000000 ///< Interrupt 59 pend +#define NVIC_PEND1_INT58 0x04000000 ///< Interrupt 58 pend +#define NVIC_PEND1_INT57 0x02000000 ///< Interrupt 57 pend +#define NVIC_PEND1_INT56 0x01000000 ///< Interrupt 56 pend +#define NVIC_PEND1_INT55 0x00800000 ///< Interrupt 55 pend +#define NVIC_PEND1_INT54 0x00400000 ///< Interrupt 54 pend +#define NVIC_PEND1_INT53 0x00200000 ///< Interrupt 53 pend +#define NVIC_PEND1_INT52 0x00100000 ///< Interrupt 52 pend +#define NVIC_PEND1_INT51 0x00080000 ///< Interrupt 51 pend +#define NVIC_PEND1_INT50 0x00040000 ///< Interrupt 50 pend +#define NVIC_PEND1_INT49 0x00020000 ///< Interrupt 49 pend +#define NVIC_PEND1_INT48 0x00010000 ///< Interrupt 48 pend +#define NVIC_PEND1_INT47 0x00008000 ///< Interrupt 47 pend +#define NVIC_PEND1_INT46 0x00004000 ///< Interrupt 46 pend +#define NVIC_PEND1_INT45 0x00002000 ///< Interrupt 45 pend +#define NVIC_PEND1_INT44 0x00001000 ///< Interrupt 44 pend +#define NVIC_PEND1_INT43 0x00000800 ///< Interrupt 43 pend +#define NVIC_PEND1_INT42 0x00000400 ///< Interrupt 42 pend +#define NVIC_PEND1_INT41 0x00000200 ///< Interrupt 41 pend +#define NVIC_PEND1_INT40 0x00000100 ///< Interrupt 40 pend +#define NVIC_PEND1_INT39 0x00000080 ///< Interrupt 39 pend +#define NVIC_PEND1_INT38 0x00000040 ///< Interrupt 38 pend +#define NVIC_PEND1_INT37 0x00000020 ///< Interrupt 37 pend +#define NVIC_PEND1_INT36 0x00000010 ///< Interrupt 36 pend +#define NVIC_PEND1_INT35 0x00000008 ///< Interrupt 35 pend +#define NVIC_PEND1_INT34 0x00000004 ///< Interrupt 34 pend +#define NVIC_PEND1_INT33 0x00000002 ///< Interrupt 33 pend +#define NVIC_PEND1_INT32 0x00000001 ///< Interrupt 32 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND0 register. + */ +/*\{*/ +#define NVIC_UNPEND0_INT31 0x80000000 ///< Interrupt 31 unpend +#define NVIC_UNPEND0_INT30 0x40000000 ///< Interrupt 30 unpend +#define NVIC_UNPEND0_INT29 0x20000000 ///< Interrupt 29 unpend +#define NVIC_UNPEND0_INT28 0x10000000 ///< Interrupt 28 unpend +#define NVIC_UNPEND0_INT27 0x08000000 ///< Interrupt 27 unpend +#define NVIC_UNPEND0_INT26 0x04000000 ///< Interrupt 26 unpend +#define NVIC_UNPEND0_INT25 0x02000000 ///< Interrupt 25 unpend +#define NVIC_UNPEND0_INT24 0x01000000 ///< Interrupt 24 unpend +#define NVIC_UNPEND0_INT23 0x00800000 ///< Interrupt 23 unpend +#define NVIC_UNPEND0_INT22 0x00400000 ///< Interrupt 22 unpend +#define NVIC_UNPEND0_INT21 0x00200000 ///< Interrupt 21 unpend +#define NVIC_UNPEND0_INT20 0x00100000 ///< Interrupt 20 unpend +#define NVIC_UNPEND0_INT19 0x00080000 ///< Interrupt 19 unpend +#define NVIC_UNPEND0_INT18 0x00040000 ///< Interrupt 18 unpend +#define NVIC_UNPEND0_INT17 0x00020000 ///< Interrupt 17 unpend +#define NVIC_UNPEND0_INT16 0x00010000 ///< Interrupt 16 unpend +#define NVIC_UNPEND0_INT15 0x00008000 ///< Interrupt 15 unpend +#define NVIC_UNPEND0_INT14 0x00004000 ///< Interrupt 14 unpend +#define NVIC_UNPEND0_INT13 0x00002000 ///< Interrupt 13 unpend +#define NVIC_UNPEND0_INT12 0x00001000 ///< Interrupt 12 unpend +#define NVIC_UNPEND0_INT11 0x00000800 ///< Interrupt 11 unpend +#define NVIC_UNPEND0_INT10 0x00000400 ///< Interrupt 10 unpend +#define NVIC_UNPEND0_INT9 0x00000200 ///< Interrupt 9 unpend +#define NVIC_UNPEND0_INT8 0x00000100 ///< Interrupt 8 unpend +#define NVIC_UNPEND0_INT7 0x00000080 ///< Interrupt 7 unpend +#define NVIC_UNPEND0_INT6 0x00000040 ///< Interrupt 6 unpend +#define NVIC_UNPEND0_INT5 0x00000020 ///< Interrupt 5 unpend +#define NVIC_UNPEND0_INT4 0x00000010 ///< Interrupt 4 unpend +#define NVIC_UNPEND0_INT3 0x00000008 ///< Interrupt 3 unpend +#define NVIC_UNPEND0_INT2 0x00000004 ///< Interrupt 2 unpend +#define NVIC_UNPEND0_INT1 0x00000002 ///< Interrupt 1 unpend +#define NVIC_UNPEND0_INT0 0x00000001 ///< Interrupt 0 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND1 register. + */ +/*\{*/ +#define NVIC_UNPEND1_INT59 0x08000000 ///< Interrupt 59 unpend +#define NVIC_UNPEND1_INT58 0x04000000 ///< Interrupt 58 unpend +#define NVIC_UNPEND1_INT57 0x02000000 ///< Interrupt 57 unpend +#define NVIC_UNPEND1_INT56 0x01000000 ///< Interrupt 56 unpend +#define NVIC_UNPEND1_INT55 0x00800000 ///< Interrupt 55 unpend +#define NVIC_UNPEND1_INT54 0x00400000 ///< Interrupt 54 unpend +#define NVIC_UNPEND1_INT53 0x00200000 ///< Interrupt 53 unpend +#define NVIC_UNPEND1_INT52 0x00100000 ///< Interrupt 52 unpend +#define NVIC_UNPEND1_INT51 0x00080000 ///< Interrupt 51 unpend +#define NVIC_UNPEND1_INT50 0x00040000 ///< Interrupt 50 unpend +#define NVIC_UNPEND1_INT49 0x00020000 ///< Interrupt 49 unpend +#define NVIC_UNPEND1_INT48 0x00010000 ///< Interrupt 48 unpend +#define NVIC_UNPEND1_INT47 0x00008000 ///< Interrupt 47 unpend +#define NVIC_UNPEND1_INT46 0x00004000 ///< Interrupt 46 unpend +#define NVIC_UNPEND1_INT45 0x00002000 ///< Interrupt 45 unpend +#define NVIC_UNPEND1_INT44 0x00001000 ///< Interrupt 44 unpend +#define NVIC_UNPEND1_INT43 0x00000800 ///< Interrupt 43 unpend +#define NVIC_UNPEND1_INT42 0x00000400 ///< Interrupt 42 unpend +#define NVIC_UNPEND1_INT41 0x00000200 ///< Interrupt 41 unpend +#define NVIC_UNPEND1_INT40 0x00000100 ///< Interrupt 40 unpend +#define NVIC_UNPEND1_INT39 0x00000080 ///< Interrupt 39 unpend +#define NVIC_UNPEND1_INT38 0x00000040 ///< Interrupt 38 unpend +#define NVIC_UNPEND1_INT37 0x00000020 ///< Interrupt 37 unpend +#define NVIC_UNPEND1_INT36 0x00000010 ///< Interrupt 36 unpend +#define NVIC_UNPEND1_INT35 0x00000008 ///< Interrupt 35 unpend +#define NVIC_UNPEND1_INT34 0x00000004 ///< Interrupt 34 unpend +#define NVIC_UNPEND1_INT33 0x00000002 ///< Interrupt 33 unpend +#define NVIC_UNPEND1_INT32 0x00000001 ///< Interrupt 32 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE0 register. + */ +/*\{*/ +#define NVIC_ACTIVE0_INT31 0x80000000 ///< Interrupt 31 active +#define NVIC_ACTIVE0_INT30 0x40000000 ///< Interrupt 30 active +#define NVIC_ACTIVE0_INT29 0x20000000 ///< Interrupt 29 active +#define NVIC_ACTIVE0_INT28 0x10000000 ///< Interrupt 28 active +#define NVIC_ACTIVE0_INT27 0x08000000 ///< Interrupt 27 active +#define NVIC_ACTIVE0_INT26 0x04000000 ///< Interrupt 26 active +#define NVIC_ACTIVE0_INT25 0x02000000 ///< Interrupt 25 active +#define NVIC_ACTIVE0_INT24 0x01000000 ///< Interrupt 24 active +#define NVIC_ACTIVE0_INT23 0x00800000 ///< Interrupt 23 active +#define NVIC_ACTIVE0_INT22 0x00400000 ///< Interrupt 22 active +#define NVIC_ACTIVE0_INT21 0x00200000 ///< Interrupt 21 active +#define NVIC_ACTIVE0_INT20 0x00100000 ///< Interrupt 20 active +#define NVIC_ACTIVE0_INT19 0x00080000 ///< Interrupt 19 active +#define NVIC_ACTIVE0_INT18 0x00040000 ///< Interrupt 18 active +#define NVIC_ACTIVE0_INT17 0x00020000 ///< Interrupt 17 active +#define NVIC_ACTIVE0_INT16 0x00010000 ///< Interrupt 16 active +#define NVIC_ACTIVE0_INT15 0x00008000 ///< Interrupt 15 active +#define NVIC_ACTIVE0_INT14 0x00004000 ///< Interrupt 14 active +#define NVIC_ACTIVE0_INT13 0x00002000 ///< Interrupt 13 active +#define NVIC_ACTIVE0_INT12 0x00001000 ///< Interrupt 12 active +#define NVIC_ACTIVE0_INT11 0x00000800 ///< Interrupt 11 active +#define NVIC_ACTIVE0_INT10 0x00000400 ///< Interrupt 10 active +#define NVIC_ACTIVE0_INT9 0x00000200 ///< Interrupt 9 active +#define NVIC_ACTIVE0_INT8 0x00000100 ///< Interrupt 8 active +#define NVIC_ACTIVE0_INT7 0x00000080 ///< Interrupt 7 active +#define NVIC_ACTIVE0_INT6 0x00000040 ///< Interrupt 6 active +#define NVIC_ACTIVE0_INT5 0x00000020 ///< Interrupt 5 active +#define NVIC_ACTIVE0_INT4 0x00000010 ///< Interrupt 4 active +#define NVIC_ACTIVE0_INT3 0x00000008 ///< Interrupt 3 active +#define NVIC_ACTIVE0_INT2 0x00000004 ///< Interrupt 2 active +#define NVIC_ACTIVE0_INT1 0x00000002 ///< Interrupt 1 active +#define NVIC_ACTIVE0_INT0 0x00000001 ///< Interrupt 0 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE1 register. + */ +/*\{*/ +#define NVIC_ACTIVE1_INT59 0x08000000 ///< Interrupt 59 active +#define NVIC_ACTIVE1_INT58 0x04000000 ///< Interrupt 58 active +#define NVIC_ACTIVE1_INT57 0x02000000 ///< Interrupt 57 active +#define NVIC_ACTIVE1_INT56 0x01000000 ///< Interrupt 56 active +#define NVIC_ACTIVE1_INT55 0x00800000 ///< Interrupt 55 active +#define NVIC_ACTIVE1_INT54 0x00400000 ///< Interrupt 54 active +#define NVIC_ACTIVE1_INT53 0x00200000 ///< Interrupt 53 active +#define NVIC_ACTIVE1_INT52 0x00100000 ///< Interrupt 52 active +#define NVIC_ACTIVE1_INT51 0x00080000 ///< Interrupt 51 active +#define NVIC_ACTIVE1_INT50 0x00040000 ///< Interrupt 50 active +#define NVIC_ACTIVE1_INT49 0x00020000 ///< Interrupt 49 active +#define NVIC_ACTIVE1_INT48 0x00010000 ///< Interrupt 48 active +#define NVIC_ACTIVE1_INT47 0x00008000 ///< Interrupt 47 active +#define NVIC_ACTIVE1_INT46 0x00004000 ///< Interrupt 46 active +#define NVIC_ACTIVE1_INT45 0x00002000 ///< Interrupt 45 active +#define NVIC_ACTIVE1_INT44 0x00001000 ///< Interrupt 44 active +#define NVIC_ACTIVE1_INT43 0x00000800 ///< Interrupt 43 active +#define NVIC_ACTIVE1_INT42 0x00000400 ///< Interrupt 42 active +#define NVIC_ACTIVE1_INT41 0x00000200 ///< Interrupt 41 active +#define NVIC_ACTIVE1_INT40 0x00000100 ///< Interrupt 40 active +#define NVIC_ACTIVE1_INT39 0x00000080 ///< Interrupt 39 active +#define NVIC_ACTIVE1_INT38 0x00000040 ///< Interrupt 38 active +#define NVIC_ACTIVE1_INT37 0x00000020 ///< Interrupt 37 active +#define NVIC_ACTIVE1_INT36 0x00000010 ///< Interrupt 36 active +#define NVIC_ACTIVE1_INT35 0x00000008 ///< Interrupt 35 active +#define NVIC_ACTIVE1_INT34 0x00000004 ///< Interrupt 34 active +#define NVIC_ACTIVE1_INT33 0x00000002 ///< Interrupt 33 active +#define NVIC_ACTIVE1_INT32 0x00000001 ///< Interrupt 32 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI0 register. + */ +/*\{*/ +#define NVIC_PRI0_INT3_M 0xFF000000 ///< Interrupt 3 priority mask +#define NVIC_PRI0_INT2_M 0x00FF0000 ///< Interrupt 2 priority mask +#define NVIC_PRI0_INT1_M 0x0000FF00 ///< Interrupt 1 priority mask +#define NVIC_PRI0_INT0_M 0x000000FF ///< Interrupt 0 priority mask +#define NVIC_PRI0_INT3_S 24 +#define NVIC_PRI0_INT2_S 16 +#define NVIC_PRI0_INT1_S 8 +#define NVIC_PRI0_INT0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI1 register. + */ +/*\{*/ +#define NVIC_PRI1_INT7_M 0xFF000000 ///< Interrupt 7 priority mask +#define NVIC_PRI1_INT6_M 0x00FF0000 ///< Interrupt 6 priority mask +#define NVIC_PRI1_INT5_M 0x0000FF00 ///< Interrupt 5 priority mask +#define NVIC_PRI1_INT4_M 0x000000FF ///< Interrupt 4 priority mask +#define NVIC_PRI1_INT7_S 24 +#define NVIC_PRI1_INT6_S 16 +#define NVIC_PRI1_INT5_S 8 +#define NVIC_PRI1_INT4_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI2 register. + */ +/*\{*/ +#define NVIC_PRI2_INT11_M 0xFF000000 ///< Interrupt 11 priority mask +#define NVIC_PRI2_INT10_M 0x00FF0000 ///< Interrupt 10 priority mask +#define NVIC_PRI2_INT9_M 0x0000FF00 ///< Interrupt 9 priority mask +#define NVIC_PRI2_INT8_M 0x000000FF ///< Interrupt 8 priority mask +#define NVIC_PRI2_INT11_S 24 +#define NVIC_PRI2_INT10_S 16 +#define NVIC_PRI2_INT9_S 8 +#define NVIC_PRI2_INT8_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI3 register. + */ +/*\{*/ +#define NVIC_PRI3_INT15_M 0xFF000000 ///< Interrupt 15 priority mask +#define NVIC_PRI3_INT14_M 0x00FF0000 ///< Interrupt 14 priority mask +#define NVIC_PRI3_INT13_M 0x0000FF00 ///< Interrupt 13 priority mask +#define NVIC_PRI3_INT12_M 0x000000FF ///< Interrupt 12 priority mask +#define NVIC_PRI3_INT15_S 24 +#define NVIC_PRI3_INT14_S 16 +#define NVIC_PRI3_INT13_S 8 +#define NVIC_PRI3_INT12_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI4 register. + */ +/*\{*/ +#define NVIC_PRI4_INT19_M 0xFF000000 ///< Interrupt 19 priority mask +#define NVIC_PRI4_INT18_M 0x00FF0000 ///< Interrupt 18 priority mask +#define NVIC_PRI4_INT17_M 0x0000FF00 ///< Interrupt 17 priority mask +#define NVIC_PRI4_INT16_M 0x000000FF ///< Interrupt 16 priority mask +#define NVIC_PRI4_INT19_S 24 +#define NVIC_PRI4_INT18_S 16 +#define NVIC_PRI4_INT17_S 8 +#define NVIC_PRI4_INT16_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI5 register. + */ +/*\{*/ +#define NVIC_PRI5_INT23_M 0xFF000000 ///< Interrupt 23 priority mask +#define NVIC_PRI5_INT22_M 0x00FF0000 ///< Interrupt 22 priority mask +#define NVIC_PRI5_INT21_M 0x0000FF00 ///< Interrupt 21 priority mask +#define NVIC_PRI5_INT20_M 0x000000FF ///< Interrupt 20 priority mask +#define NVIC_PRI5_INT23_S 24 +#define NVIC_PRI5_INT22_S 16 +#define NVIC_PRI5_INT21_S 8 +#define NVIC_PRI5_INT20_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI6 register. + */ +/*\{*/ +#define NVIC_PRI6_INT27_M 0xFF000000 ///< Interrupt 27 priority mask +#define NVIC_PRI6_INT26_M 0x00FF0000 ///< Interrupt 26 priority mask +#define NVIC_PRI6_INT25_M 0x0000FF00 ///< Interrupt 25 priority mask +#define NVIC_PRI6_INT24_M 0x000000FF ///< Interrupt 24 priority mask +#define NVIC_PRI6_INT27_S 24 +#define NVIC_PRI6_INT26_S 16 +#define NVIC_PRI6_INT25_S 8 +#define NVIC_PRI6_INT24_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI7 register. + */ +/*\{*/ +#define NVIC_PRI7_INT31_M 0xFF000000 ///< Interrupt 31 priority mask +#define NVIC_PRI7_INT30_M 0x00FF0000 ///< Interrupt 30 priority mask +#define NVIC_PRI7_INT29_M 0x0000FF00 ///< Interrupt 29 priority mask +#define NVIC_PRI7_INT28_M 0x000000FF ///< Interrupt 28 priority mask +#define NVIC_PRI7_INT31_S 24 +#define NVIC_PRI7_INT30_S 16 +#define NVIC_PRI7_INT29_S 8 +#define NVIC_PRI7_INT28_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI8 register. + */ +/*\{*/ +#define NVIC_PRI8_INT35_M 0xFF000000 ///< Interrupt 35 priority mask +#define NVIC_PRI8_INT34_M 0x00FF0000 ///< Interrupt 34 priority mask +#define NVIC_PRI8_INT33_M 0x0000FF00 ///< Interrupt 33 priority mask +#define NVIC_PRI8_INT32_M 0x000000FF ///< Interrupt 32 priority mask +#define NVIC_PRI8_INT35_S 24 +#define NVIC_PRI8_INT34_S 16 +#define NVIC_PRI8_INT33_S 8 +#define NVIC_PRI8_INT32_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI9 register. + */ +/*\{*/ +#define NVIC_PRI9_INT39_M 0xFF000000 ///< Interrupt 39 priority mask +#define NVIC_PRI9_INT38_M 0x00FF0000 ///< Interrupt 38 priority mask +#define NVIC_PRI9_INT37_M 0x0000FF00 ///< Interrupt 37 priority mask +#define NVIC_PRI9_INT36_M 0x000000FF ///< Interrupt 36 priority mask +#define NVIC_PRI9_INT39_S 24 +#define NVIC_PRI9_INT38_S 16 +#define NVIC_PRI9_INT37_S 8 +#define NVIC_PRI9_INT36_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI10 register. + */ +/*\{*/ +#define NVIC_PRI10_INT43_M 0xFF000000 ///< Interrupt 43 priority mask +#define NVIC_PRI10_INT42_M 0x00FF0000 ///< Interrupt 42 priority mask +#define NVIC_PRI10_INT41_M 0x0000FF00 ///< Interrupt 41 priority mask +#define NVIC_PRI10_INT40_M 0x000000FF ///< Interrupt 40 priority mask +#define NVIC_PRI10_INT43_S 24 +#define NVIC_PRI10_INT42_S 16 +#define NVIC_PRI10_INT41_S 8 +#define NVIC_PRI10_INT40_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CPUID register. + */ +/*\{*/ +#define NVIC_CPUID_IMP_M 0xFF000000 ///< Implementer +#define NVIC_CPUID_VAR_M 0x00F00000 ///< Variant +#define NVIC_CPUID_PARTNO_M 0x0000FFF0 ///< Processor part number +#define NVIC_CPUID_REV_M 0x0000000F ///< Revision +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_CTRL register. + */ +/*\{*/ +#define NVIC_INT_CTRL_NMI_SET 0x80000000 ///< Pend a NMI +#define NVIC_INT_CTRL_PEND_SV 0x10000000 ///< Pend a PendSV +#define NVIC_INT_CTRL_UNPEND_SV 0x08000000 ///< Unpend a PendSV +#define NVIC_INT_CTRL_PENDSTSET 0x04000000 ///< Set pending SysTick interrupt +#define NVIC_INT_CTRL_PENDSTCLR 0x02000000 ///< Clear pending SysTick interrupt +#define NVIC_INT_CTRL_ISR_PRE 0x00800000 ///< Debug interrupt handling +#define NVIC_INT_CTRL_ISR_PEND 0x00400000 ///< Debug interrupt pending +#define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000 ///< Highest pending exception +#define NVIC_INT_CTRL_RET_BASE 0x00000800 ///< Return to base +#define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF ///< Current active exception +#define NVIC_INT_CTRL_VEC_PEN_S 12 +#define NVIC_INT_CTRL_VEC_ACT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_VTABLE register. + */ +/*\{*/ +#define NVIC_VTABLE_BASE 0x20000000 ///< Vector table base +#define NVIC_VTABLE_OFFSET_M 0x1FFFFF00 ///< Vector table offset +#define NVIC_VTABLE_OFFSET_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_APINT register. + */ +/*\{*/ +#define NVIC_APINT_VECTKEY_M 0xFFFF0000 ///< Vector key mask +#define NVIC_APINT_VECTKEY 0x05FA0000 ///< Vector key +#define NVIC_APINT_ENDIANESS 0x00008000 ///< Data endianess +#define NVIC_APINT_PRIGROUP_M 0x00000700 ///< Priority group +#define NVIC_APINT_PRIGROUP_0_8 0x00000700 ///< Priority group 0.8 split +#define NVIC_APINT_PRIGROUP_1_7 0x00000600 ///< Priority group 1.7 split +#define NVIC_APINT_PRIGROUP_2_6 0x00000500 ///< Priority group 2.6 split +#define NVIC_APINT_PRIGROUP_3_5 0x00000400 ///< Priority group 3.5 split +#define NVIC_APINT_PRIGROUP_4_4 0x00000300 ///< Priority group 4.4 split +#define NVIC_APINT_PRIGROUP_5_3 0x00000200 ///< Priority group 5.3 split +#define NVIC_APINT_PRIGROUP_6_2 0x00000100 ///< Priority group 6.2 split +#define NVIC_APINT_SYSRESETREQ 0x00000004 ///< System reset request +#define NVIC_APINT_VECT_CLR_ACT 0x00000002 ///< Clear active NMI/fault info +#define NVIC_APINT_VECT_RESET 0x00000001 ///< System reset +#define NVIC_APINT_PRIGROUP_7_1 0x00000000 ///< Priority group 7.1 split +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_CTRL register. + */ +/*\{*/ +#define NVIC_SYS_CTRL_SEVONPEND 0x00000010 ///< Wakeup on pend +#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004 ///< Deep sleep enable +#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002 ///< Sleep on ISR exit +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CFG_CTRL register. + */ +/*\{*/ +#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100 ///< Ignore bus fault in NMI/fault +#define NVIC_CFG_CTRL_DIV0 0x00000010 ///< Trap on divide by 0 +#define NVIC_CFG_CTRL_UNALIGNED 0x00000008 ///< Trap on unaligned access +#define NVIC_CFG_CTRL_DEEP_PEND 0x00000004 ///< Allow deep interrupt trigger +#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002 ///< Allow main interrupt trigger +#define NVIC_CFG_CTRL_BASE_THR 0x00000001 ///< Thread state control +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI1 register. + */ +/*\{*/ +#define NVIC_SYS_PRI1_RES_M 0xFF000000 ///< Priority of reserved handler +#define NVIC_SYS_PRI1_USAGE_M 0x00FF0000 ///< Priority of usage fault handler +#define NVIC_SYS_PRI1_BUS_M 0x0000FF00 ///< Priority of bus fault handler +#define NVIC_SYS_PRI1_MEM_M 0x000000FF ///< Priority of mem manage handler +#define NVIC_SYS_PRI1_USAGE_S 16 +#define NVIC_SYS_PRI1_BUS_S 8 +#define NVIC_SYS_PRI1_MEM_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI2 register. + */ +/*\{*/ +#define NVIC_SYS_PRI2_SVC_M 0xFF000000 ///< Priority of SVCall handler +#define NVIC_SYS_PRI2_RES_M 0x00FFFFFF ///< Priority of reserved handlers +#define NVIC_SYS_PRI2_SVC_S 24 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI3 register. + */ +/*\{*/ +#define NVIC_SYS_PRI3_TICK_M 0xFF000000 ///< Priority of Sys Tick handler +#define NVIC_SYS_PRI3_PENDSV_M 0x00FF0000 ///< Priority of PendSV handler +#define NVIC_SYS_PRI3_RES_M 0x0000FF00 ///< Priority of reserved handler +#define NVIC_SYS_PRI3_DEBUG_M 0x000000FF ///< Priority of debug handler +#define NVIC_SYS_PRI3_TICK_S 24 +#define NVIC_SYS_PRI3_PENDSV_S 16 +#define NVIC_SYS_PRI3_DEBUG_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_HND_CTRL +* register. + */ +/*\{*/ +#define NVIC_SYS_HND_CTRL_USAGE 0x00040000 ///< Usage fault enable +#define NVIC_SYS_HND_CTRL_BUS 0x00020000 ///< Bus fault enable +#define NVIC_SYS_HND_CTRL_MEM 0x00010000 ///< Mem manage fault enable +#define NVIC_SYS_HND_CTRL_SVC 0x00008000 ///< SVCall is pended +#define NVIC_SYS_HND_CTRL_BUSP 0x00004000 ///< Bus fault is pended +#define NVIC_SYS_HND_CTRL_TICK 0x00000800 ///< Sys tick is active +#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400 ///< PendSV is active +#define NVIC_SYS_HND_CTRL_MON 0x00000100 ///< Monitor is active +#define NVIC_SYS_HND_CTRL_SVCA 0x00000080 ///< SVCall is active +#define NVIC_SYS_HND_CTRL_USGA 0x00000008 ///< Usage fault is active +#define NVIC_SYS_HND_CTRL_BUSA 0x00000002 ///< Bus fault is active +#define NVIC_SYS_HND_CTRL_MEMA 0x00000001 ///< Mem manage is active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_STAT +* register. + */ +/*\{*/ +#define NVIC_FAULT_STAT_DIV0 0x02000000 ///< Divide by zero fault +#define NVIC_FAULT_STAT_UNALIGN 0x01000000 ///< Unaligned access fault +#define NVIC_FAULT_STAT_NOCP 0x00080000 ///< No coprocessor fault +#define NVIC_FAULT_STAT_INVPC 0x00040000 ///< Invalid PC fault +#define NVIC_FAULT_STAT_INVSTAT 0x00020000 ///< Invalid state fault +#define NVIC_FAULT_STAT_UNDEF 0x00010000 ///< Undefined instruction fault +#define NVIC_FAULT_STAT_BFARV 0x00008000 ///< BFAR is valid +#define NVIC_FAULT_STAT_BSTKE 0x00001000 ///< Stack bus fault +#define NVIC_FAULT_STAT_BUSTKE 0x00000800 ///< Unstack bus fault +#define NVIC_FAULT_STAT_IMPRE 0x00000400 ///< Imprecise data bus error +#define NVIC_FAULT_STAT_PRECISE 0x00000200 ///< Precise data bus error +#define NVIC_FAULT_STAT_IBUS 0x00000100 ///< Instruction bus fault +#define NVIC_FAULT_STAT_MMARV 0x00000080 ///< MMAR is valid +#define NVIC_FAULT_STAT_MSTKE 0x00000010 ///< Stack access violation +#define NVIC_FAULT_STAT_MUSTKE 0x00000008 ///< Unstack access violation +#define NVIC_FAULT_STAT_DERR 0x00000002 ///< Data access violation +#define NVIC_FAULT_STAT_IERR 0x00000001 ///< Instruction access violation +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_HFAULT_STAT +* register. + */ +/*\{*/ +#define NVIC_HFAULT_STAT_DBG 0x80000000 ///< Debug event +#define NVIC_HFAULT_STAT_FORCED 0x40000000 ///< Cannot execute fault handler +#define NVIC_HFAULT_STAT_VECT 0x00000002 ///< Vector table read fault +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DEBUG_STAT +* register. + */ +/*\{*/ +#define NVIC_DEBUG_STAT_EXTRNL 0x00000010 ///< EDBGRQ asserted +#define NVIC_DEBUG_STAT_VCATCH 0x00000008 ///< Vector catch +#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004 ///< DWT match +#define NVIC_DEBUG_STAT_BKPT 0x00000002 ///< Breakpoint instruction +#define NVIC_DEBUG_STAT_HALTED 0x00000001 ///< Halt request +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MM_ADDR register. + */ +/*\{*/ +#define NVIC_MM_ADDR_M 0xFFFFFFFF ///< Data fault address +#define NVIC_MM_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_ADDR +* register. + */ +/*\{*/ +#define NVIC_FAULT_ADDR_M 0xFFFFFFFF ///< Data bus fault address +#define NVIC_FAULT_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_TYPE register. + */ +/*\{*/ +#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000 ///< Number of I regions +#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00 ///< Number of D regions +#define NVIC_MPU_TYPE_SEPARATE 0x00000001 ///< Separate or unified MPU +#define NVIC_MPU_TYPE_IREGION_S 16 +#define NVIC_MPU_TYPE_DREGION_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_CTRL register. + */ +/*\{*/ +#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004 ///< MPU default region in priv mode +#define NVIC_MPU_CTRL_HFNMIENA 0x00000002 ///< MPU enabled during faults +#define NVIC_MPU_CTRL_ENABLE 0x00000001 ///< MPU enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_NUMBER +* register. + */ +/*\{*/ +#define NVIC_MPU_NUMBER_M 0x000000FF ///< MPU region to access +#define NVIC_MPU_NUMBER_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_BASE register. + */ +/*\{*/ +#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0 ///< Base address mask +#define NVIC_MPU_BASE_VALID 0x00000010 ///< Region number valid +#define NVIC_MPU_BASE_REGION_M 0x0000000F ///< Region number +#define NVIC_MPU_BASE_ADDR_S 8 +#define NVIC_MPU_BASE_REGION_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_ATTR register. + */ +/*\{*/ +#define NVIC_MPU_ATTR_M 0xFFFF0000 ///< Attributes +#define NVIC_MPU_ATTR_AP_NO_NO 0x00000000 ///< prv: no access, usr: no access +#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000 ///< Bufferable +#define NVIC_MPU_ATTR_CACHEABLE 0x00020000 ///< Cacheable +#define NVIC_MPU_ATTR_SHAREABLE 0x00040000 ///< Shareable +#define NVIC_MPU_ATTR_TEX_M 0x00380000 ///< Type extension mask +#define NVIC_MPU_ATTR_AP_RW_NO 0x01000000 ///< prv: rw, usr: none +#define NVIC_MPU_ATTR_AP_RW_RO 0x02000000 ///< prv: rw, usr: read-only +#define NVIC_MPU_ATTR_AP_RW_RW 0x03000000 ///< prv: rw, usr: rw +#define NVIC_MPU_ATTR_AP_RO_NO 0x05000000 ///< prv: ro, usr: none +#define NVIC_MPU_ATTR_AP_RO_RO 0x06000000 ///< prv: ro, usr: ro +#define NVIC_MPU_ATTR_AP_M 0x07000000 ///< Access permissions mask +#define NVIC_MPU_ATTR_XN 0x10000000 ///< Execute disable +#define NVIC_MPU_ATTR_SRD_M 0x0000FF00 ///< Sub-region disable mask +#define NVIC_MPU_ATTR_SRD_0 0x00000100 ///< Sub-region 0 disable +#define NVIC_MPU_ATTR_SRD_1 0x00000200 ///< Sub-region 1 disable +#define NVIC_MPU_ATTR_SRD_2 0x00000400 ///< Sub-region 2 disable +#define NVIC_MPU_ATTR_SRD_3 0x00000800 ///< Sub-region 3 disable +#define NVIC_MPU_ATTR_SRD_4 0x00001000 ///< Sub-region 4 disable +#define NVIC_MPU_ATTR_SRD_5 0x00002000 ///< Sub-region 5 disable +#define NVIC_MPU_ATTR_SRD_6 0x00004000 ///< Sub-region 6 disable +#define NVIC_MPU_ATTR_SRD_7 0x00008000 ///< Sub-region 7 disable +#define NVIC_MPU_ATTR_SIZE_M 0x0000003E ///< Region size mask +#define NVIC_MPU_ATTR_SIZE_32B 0x00000008 ///< Region size 32 bytes +#define NVIC_MPU_ATTR_SIZE_64B 0x0000000A ///< Region size 64 bytes +#define NVIC_MPU_ATTR_SIZE_128B 0x0000000C ///< Region size 128 bytes +#define NVIC_MPU_ATTR_SIZE_256B 0x0000000E ///< Region size 256 bytes +#define NVIC_MPU_ATTR_SIZE_512B 0x00000010 ///< Region size 512 bytes +#define NVIC_MPU_ATTR_SIZE_1K 0x00000012 ///< Region size 1 Kbytes +#define NVIC_MPU_ATTR_SIZE_2K 0x00000014 ///< Region size 2 Kbytes +#define NVIC_MPU_ATTR_SIZE_4K 0x00000016 ///< Region size 4 Kbytes +#define NVIC_MPU_ATTR_SIZE_8K 0x00000018 ///< Region size 8 Kbytes +#define NVIC_MPU_ATTR_SIZE_16K 0x0000001A ///< Region size 16 Kbytes +#define NVIC_MPU_ATTR_SIZE_32K 0x0000001C ///< Region size 32 Kbytes +#define NVIC_MPU_ATTR_SIZE_64K 0x0000001E ///< Region size 64 Kbytes +#define NVIC_MPU_ATTR_SIZE_128K 0x00000020 ///< Region size 128 Kbytes +#define NVIC_MPU_ATTR_SIZE_256K 0x00000022 ///< Region size 256 Kbytes +#define NVIC_MPU_ATTR_SIZE_512K 0x00000024 ///< Region size 512 Kbytes +#define NVIC_MPU_ATTR_SIZE_1M 0x00000026 ///< Region size 1 Mbytes +#define NVIC_MPU_ATTR_SIZE_2M 0x00000028 ///< Region size 2 Mbytes +#define NVIC_MPU_ATTR_SIZE_4M 0x0000002A ///< Region size 4 Mbytes +#define NVIC_MPU_ATTR_SIZE_8M 0x0000002C ///< Region size 8 Mbytes +#define NVIC_MPU_ATTR_SIZE_16M 0x0000002E ///< Region size 16 Mbytes +#define NVIC_MPU_ATTR_SIZE_32M 0x00000030 ///< Region size 32 Mbytes +#define NVIC_MPU_ATTR_SIZE_64M 0x00000032 ///< Region size 64 Mbytes +#define NVIC_MPU_ATTR_SIZE_128M 0x00000034 ///< Region size 128 Mbytes +#define NVIC_MPU_ATTR_SIZE_256M 0x00000036 ///< Region size 256 Mbytes +#define NVIC_MPU_ATTR_SIZE_512M 0x00000038 ///< Region size 512 Mbytes +#define NVIC_MPU_ATTR_SIZE_1G 0x0000003A ///< Region size 1 Gbytes +#define NVIC_MPU_ATTR_SIZE_2G 0x0000003C ///< Region size 2 Gbytes +#define NVIC_MPU_ATTR_SIZE_4G 0x0000003E ///< Region size 4 Gbytes +#define NVIC_MPU_ATTR_ENABLE 0x00000001 ///< Region enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_CTRL register. + */ +/*\{*/ +#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000 ///< Debug key mask +#define NVIC_DBG_CTRL_DBGKEY 0xA05F0000 ///< Debug key +#define NVIC_DBG_CTRL_S_RESET_ST \ + 0x02000000 ///< Core has reset since last read +#define NVIC_DBG_CTRL_S_RETIRE_ST \ + 0x01000000 ///< Core has executed insruction + ///< since last read +#define NVIC_DBG_CTRL_S_LOCKUP 0x00080000 ///< Core is locked up +#define NVIC_DBG_CTRL_S_SLEEP 0x00040000 ///< Core is sleeping +#define NVIC_DBG_CTRL_S_HALT 0x00020000 ///< Core status on halt +#define NVIC_DBG_CTRL_S_REGRDY 0x00010000 ///< Register read/write available +#define NVIC_DBG_CTRL_C_SNAPSTALL \ + 0x00000020 ///< Breaks a stalled load/store +#define NVIC_DBG_CTRL_C_MASKINT 0x00000008 ///< Mask interrupts when stepping +#define NVIC_DBG_CTRL_C_STEP 0x00000004 ///< Step the core +#define NVIC_DBG_CTRL_C_HALT 0x00000002 ///< Halt the core +#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001 ///< Enable debug +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_XFER register. + */ +/*\{*/ +#define NVIC_DBG_XFER_REG_WNR 0x00010000 ///< Write or not read +#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F ///< Register +#define NVIC_DBG_XFER_REG_CFBP 0x00000014 ///< Control/Fault/BasePri/PriMask +#define NVIC_DBG_XFER_REG_DSP 0x00000013 ///< Deep SP +#define NVIC_DBG_XFER_REG_PSP 0x00000012 ///< Process SP +#define NVIC_DBG_XFER_REG_MSP 0x00000011 ///< Main SP +#define NVIC_DBG_XFER_REG_FLAGS 0x00000010 ///< xPSR/Flags register +#define NVIC_DBG_XFER_REG_R15 0x0000000F ///< Register R15 +#define NVIC_DBG_XFER_REG_R14 0x0000000E ///< Register R14 +#define NVIC_DBG_XFER_REG_R13 0x0000000D ///< Register R13 +#define NVIC_DBG_XFER_REG_R12 0x0000000C ///< Register R12 +#define NVIC_DBG_XFER_REG_R11 0x0000000B ///< Register R11 +#define NVIC_DBG_XFER_REG_R10 0x0000000A ///< Register R10 +#define NVIC_DBG_XFER_REG_R9 0x00000009 ///< Register R9 +#define NVIC_DBG_XFER_REG_R8 0x00000008 ///< Register R8 +#define NVIC_DBG_XFER_REG_R7 0x00000007 ///< Register R7 +#define NVIC_DBG_XFER_REG_R6 0x00000006 ///< Register R6 +#define NVIC_DBG_XFER_REG_R5 0x00000005 ///< Register R5 +#define NVIC_DBG_XFER_REG_R4 0x00000004 ///< Register R4 +#define NVIC_DBG_XFER_REG_R3 0x00000003 ///< Register R3 +#define NVIC_DBG_XFER_REG_R2 0x00000002 ///< Register R2 +#define NVIC_DBG_XFER_REG_R1 0x00000001 ///< Register R1 +#define NVIC_DBG_XFER_REG_R0 0x00000000 ///< Register R0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_DATA register. + */ +/*\{*/ +#define NVIC_DBG_DATA_M 0xFFFFFFFF ///< Data temporary cache +#define NVIC_DBG_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_INT register. + */ +/*\{*/ +#define NVIC_DBG_INT_HARDERR 0x00000400 ///< Debug trap on hard fault +#define NVIC_DBG_INT_INTERR 0x00000200 ///< Debug trap on interrupt errors +#define NVIC_DBG_INT_BUSERR 0x00000100 ///< Debug trap on bus error +#define NVIC_DBG_INT_STATERR 0x00000080 ///< Debug trap on usage fault state +#define NVIC_DBG_INT_CHKERR 0x00000040 ///< Debug trap on usage fault check +#define NVIC_DBG_INT_NOCPERR 0x00000020 ///< Debug trap on coprocessor error +#define NVIC_DBG_INT_MMERR 0x00000010 ///< Debug trap on mem manage fault +#define NVIC_DBG_INT_RESET 0x00000008 ///< Core reset status +#define NVIC_DBG_INT_RSTPENDCLR 0x00000004 ///< Clear pending core reset +#define NVIC_DBG_INT_RSTPENDING 0x00000002 ///< Core reset is pending +#define NVIC_DBG_INT_RSTVCATCH 0x00000001 ///< Reset vector catch +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SW_TRIG register. + */ +/*\{*/ +#define NVIC_SW_TRIG_INTID_M 0x000003FF ///< Interrupt to trigger +#define NVIC_SW_TRIG_INTID_S 0 +/*\}*/ + +/** + * The following definitions are deprecated. + */ +#ifndef DEPRECATED + +/** + * Deprecated defines for the Watchdog + */ +/*\{*/ +#define WATCHDOG_LOAD_R (*((reg32_t *)0x40000000)) +#define WATCHDOG_VALUE_R (*((reg32_t *)0x40000004)) +#define WATCHDOG_CTL_R (*((reg32_t *)0x40000008)) +#define WATCHDOG_ICR_R (*((reg32_t *)0x4000000C)) +#define WATCHDOG_RIS_R (*((reg32_t *)0x40000010)) +#define WATCHDOG_MIS_R (*((reg32_t *)0x40000014)) +#define WATCHDOG_TEST_R (*((reg32_t *)0x40000418)) +#define WATCHDOG_LOCK_R (*((reg32_t *)0x40000C00)) +/*\}*/ + +/** + * Deprecated defines for the bit fields in the I2C_O_SICR register. + */ +/*\{*/ +#define I2C_SICR_IC 0x00000001 ///< Clear Interrupt +/*\}*/ + +/** + * Deprecated defines for the bit fields in the I2C_O_SMIS register. + */ +/*\{*/ +#define I2C_SMIS_MIS 0x00000001 ///< Masked Interrupt Status +/*\}*/ + +/** + * Deprecated defines for the bit fields in the I2C_O_SRIS register. + */ +/*\{*/ +#define I2C_SRIS_RIS 0x00000001 ///< Raw Interrupt Status +/*\}*/ + +/** + * Deprecated defines for the bit fields in the I2C_O_SIMR register. + */ +/*\{*/ +#define I2C_SIMR_IM 0x00000001 ///< Interrupt Mask +/*\}*/ + +/** + * Deprecated defines for the bit fields in the the interpretation of the data +* in the SSFIFOx when the ADC TMLB is enabled. register. + */ +/*\{*/ +#define ADC_TMLB_CNT_M 0x000003C0 ///< Continuous Sample Counter +#define ADC_TMLB_CONT 0x00000020 ///< Continuation Sample Indicator +#define ADC_TMLB_DIFF 0x00000010 ///< Differential Sample Indicator +#define ADC_TMLB_TS 0x00000008 ///< Temp Sensor Sample Indicator +#define ADC_TMLB_MUX_M 0x00000007 ///< Analog Input Indicator +#define ADC_TMLB_CNT_S 6 ///< Sample counter shift +#define ADC_TMLB_MUX_S 0 ///< Input channel number shift +/*\}*/ + +/** + * Deprecated defines for the ADC register offsets. + */ +/*\{*/ +#define ADC_ACTSS_R (*((reg32_t *)0x40038000)) +#define ADC_RIS_R (*((reg32_t *)0x40038004)) +#define ADC_IM_R (*((reg32_t *)0x40038008)) +#define ADC_ISC_R (*((reg32_t *)0x4003800C)) +#define ADC_OSTAT_R (*((reg32_t *)0x40038010)) +#define ADC_EMUX_R (*((reg32_t *)0x40038014)) +#define ADC_USTAT_R (*((reg32_t *)0x40038018)) +#define ADC_SSPRI_R (*((reg32_t *)0x40038020)) +#define ADC_PSSI_R (*((reg32_t *)0x40038028)) +#define ADC_SAC_R (*((reg32_t *)0x40038030)) +#define ADC_SSMUX0_R (*((reg32_t *)0x40038040)) +#define ADC_SSCTL0_R (*((reg32_t *)0x40038044)) +#define ADC_SSFIFO0_R (*((reg32_t *)0x40038048)) +#define ADC_SSFSTAT0_R (*((reg32_t *)0x4003804C)) +#define ADC_SSMUX1_R (*((reg32_t *)0x40038060)) +#define ADC_SSCTL1_R (*((reg32_t *)0x40038064)) +#define ADC_SSFIFO1_R (*((reg32_t *)0x40038068)) +#define ADC_SSFSTAT1_R (*((reg32_t *)0x4003806C)) +#define ADC_SSMUX2_R (*((reg32_t *)0x40038080)) +#define ADC_SSCTL2_R (*((reg32_t *)0x40038084)) +#define ADC_SSFIFO2_R (*((reg32_t *)0x40038088)) +#define ADC_SSFSTAT2_R (*((reg32_t *)0x4003808C)) +#define ADC_SSMUX3_R (*((reg32_t *)0x400380A0)) +#define ADC_SSCTL3_R (*((reg32_t *)0x400380A4)) +#define ADC_SSFIFO3_R (*((reg32_t *)0x400380A8)) +#define ADC_SSFSTAT3_R (*((reg32_t *)0x400380AC)) +#define ADC_TMLB_R (*((reg32_t *)0x40038100)) +/*\}*/ + +/** + * Deprecated defines for the bit fields in the FLASH_FMC register. + */ +/*\{*/ +#define FLASH_FMC_WRKEY_M 0xFFFF0000 ///< Flash Memory Write Key +#define FLASH_FMC_WRKEY_S 16 +/*\}*/ + +/** + * Deprecated defines for the bit fields in the SYSCTL_DID1 register. + */ +/*\{*/ +#define SYSCTL_DID1_PKG_28SOIC 0x00000000 ///< SOIC package +#define SYSCTL_DID1_PKG_48QFP 0x00000008 ///< QFP package +/*\}*/ + +/** + * Deprecated defines for the NVIC register addresses. + */ +/*\{*/ +#define NVIC_MPU_R (*((reg32_t *)0xE000ED9C)) +/*\}*/ + +#endif /* DEPRECATED */ + +#endif /* LM3S1968_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_gpio.h b/bertos/cpu/cortex-m3/io/lm3s_gpio.h new file mode 100644 index 0000000..8b1c0f9 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_gpio.h @@ -0,0 +1,603 @@ +/** + * \file + * + * + * \brief LM3S1968 GPIO hardware definitions. + */ + +#ifndef LM3S_GPIO_H +#define LM3S_GPIO_H + +/** + * The following are defines for the GPIO register offsets. + */ +/*\{*/ +#define GPIO_O_DATA 0x00000000 //< GPIO Data +#define GPIO_O_DIR 0x00000400 //< GPIO Direction +#define GPIO_O_IS 0x00000404 //< GPIO Interrupt Sense +#define GPIO_O_IBE 0x00000408 //< GPIO Interrupt Both Edges +#define GPIO_O_IEV 0x0000040C //< GPIO Interrupt Event +#define GPIO_O_IM 0x00000410 //< GPIO Interrupt Mask +#define GPIO_O_RIS 0x00000414 //< GPIO Raw Interrupt Status +#define GPIO_O_MIS 0x00000418 //< GPIO Masked Interrupt Status +#define GPIO_O_ICR 0x0000041C //< GPIO Interrupt Clear +#define GPIO_O_AFSEL 0x00000420 //< GPIO Alternate Function Select +#define GPIO_O_DR2R 0x00000500 //< GPIO 2-mA Drive Select +#define GPIO_O_DR4R 0x00000504 //< GPIO 4-mA Drive Select +#define GPIO_O_DR8R 0x00000508 //< GPIO 8-mA Drive Select +#define GPIO_O_ODR 0x0000050C //< GPIO Open Drain Select +#define GPIO_O_PUR 0x00000510 //< GPIO Pull-Up Select +#define GPIO_O_PDR 0x00000514 //< GPIO Pull-Down Select +#define GPIO_O_SLR 0x00000518 //< GPIO Slew Rate Control Select +#define GPIO_O_DEN 0x0000051C //< GPIO Digital Enable +#define GPIO_O_LOCK 0x00000520 //< GPIO Lock +#define GPIO_O_CR 0x00000524 //< GPIO Commit +#define GPIO_O_AMSEL 0x00000528 //< GPIO Analog Mode Select +#define GPIO_O_PCTL 0x0000052C //< GPIO Port Control +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_O_LOCK register. + */ +/*\{*/ +#define GPIO_LOCK_M 0xFFFFFFFF //< GPIO Lock +#define GPIO_LOCK_UNLOCKED 0x00000000 //< The GPIOCR register is unlocked + //< and may be modified +#define GPIO_LOCK_LOCKED 0x00000001 //< The GPIOCR register is locked + //< and may not be modified +#define GPIO_LOCK_KEY 0x1ACCE551 //< Unlocks the GPIO_CR register +#define GPIO_LOCK_KEY_DD 0x4C4F434B //< Unlocks the GPIO_CR register on + //< DustDevil-class devices and + //< later +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port A. + */ +/*\{*/ +#define GPIO_PCTL_PA0_M 0x0000000F //< PA0 mask +#define GPIO_PCTL_PA0_U0RX 0x00000001 //< U0RX on PA0 +#define GPIO_PCTL_PA0_I2C1SCL 0x00000008 //< I2C1SCL on PA0 +#define GPIO_PCTL_PA0_U1RX 0x00000009 //< U1RX on PA0 +#define GPIO_PCTL_PA1_M 0x000000F0 //< PA1 mask +#define GPIO_PCTL_PA1_U0TX 0x00000010 //< U0TX on PA1 +#define GPIO_PCTL_PA1_I2C1SDA 0x00000080 //< I2C1SDA on PA1 +#define GPIO_PCTL_PA1_U1TX 0x00000090 //< U1TX on PA1 +#define GPIO_PCTL_PA2_M 0x00000F00 //< PA2 mask +#define GPIO_PCTL_PA2_SSI0CLK 0x00000100 //< SSI0CLK on PA2 +#define GPIO_PCTL_PA2_PWM4 0x00000400 //< PWM4 on PA2 +#define GPIO_PCTL_PA2_I2S0RXSD 0x00000900 //< I2S0RXSD on PA2 +#define GPIO_PCTL_PA3_M 0x0000F000 //< PA3 mask +#define GPIO_PCTL_PA3_SSI0FSS 0x00001000 //< SSI0FSS on PA3 +#define GPIO_PCTL_PA3_PWM5 0x00004000 //< PWM5 on PA3 +#define GPIO_PCTL_PA3_I2S0RXMCLK \ + 0x00009000 //< I2S0RXMCLK on PA3 +#define GPIO_PCTL_PA4_M 0x000F0000 //< PA4 mask +#define GPIO_PCTL_PA4_SSI0RX 0x00010000 //< SSI0RX on PA4 +#define GPIO_PCTL_PA4_PWM6 0x00040000 //< PWM6 on PA4 +#define GPIO_PCTL_PA4_CAN0RX 0x00050000 //< CAN0RX on PA4 +#define GPIO_PCTL_PA4_I2S0TXSCK 0x00090000 //< I2S0TXSCK on PA4 +#define GPIO_PCTL_PA5_M 0x00F00000 //< PA5 mask +#define GPIO_PCTL_PA5_SSI0TX 0x00100000 //< SSI0TX on PA5 +#define GPIO_PCTL_PA5_PWM7 0x00400000 //< PWM7 on PA5 +#define GPIO_PCTL_PA5_CAN0TX 0x00500000 //< CAN0TX on PA5 +#define GPIO_PCTL_PA5_I2S0TXWS 0x00900000 //< I2S0TXWS on PA5 +#define GPIO_PCTL_PA6_M 0x0F000000 //< PA6 mask +#define GPIO_PCTL_PA6_I2C1SCL 0x01000000 //< I2C1SCL on PA6 +#define GPIO_PCTL_PA6_CCP1 0x02000000 //< CCP1 on PA6 +#define GPIO_PCTL_PA6_PWM0 0x04000000 //< PWM0 on PA6 +#define GPIO_PCTL_PA6_PWM4 0x05000000 //< PWM4 on PA6 +#define GPIO_PCTL_PA6_CAN0RX 0x06000000 //< CAN0RX on PA6 +#define GPIO_PCTL_PA6_USB0EPEN 0x08000000 //< USB0EPEN on PA6 +#define GPIO_PCTL_PA6_U1CTS 0x09000000 //< U1CTS on PA6 +#define GPIO_PCTL_PA7_M 0xF0000000 //< PA7 mask +#define GPIO_PCTL_PA7_I2C1SDA 0x10000000 //< I2C1SDA on PA7 +#define GPIO_PCTL_PA7_CCP4 0x20000000 //< CCP4 on PA7 +#define GPIO_PCTL_PA7_PWM1 0x40000000 //< PWM1 on PA7 +#define GPIO_PCTL_PA7_PWM5 0x50000000 //< PWM5 on PA7 +#define GPIO_PCTL_PA7_CAN0TX 0x60000000 //< CAN0TX on PA7 +#define GPIO_PCTL_PA7_CCP3 0x70000000 //< CCP3 on PA7 +#define GPIO_PCTL_PA7_USB0PFLT 0x80000000 //< USB0PFLT on PA7 +#define GPIO_PCTL_PA7_U1DCD 0x90000000 //< U1DCD on PA7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port B. + */ +/*\{*/ +#define GPIO_PCTL_PB0_M 0x0000000F //< PB0 mask +#define GPIO_PCTL_PB0_CCP0 0x00000001 //< CCP0 on PB0 +#define GPIO_PCTL_PB0_PWM2 0x00000002 //< PWM2 on PB0 +#define GPIO_PCTL_PB0_U1RX 0x00000005 //< U1RX on PB0 +#define GPIO_PCTL_PB1_M 0x000000F0 //< PB1 mask +#define GPIO_PCTL_PB1_CCP2 0x00000010 //< CCP2 on PB1 +#define GPIO_PCTL_PB1_PWM3 0x00000020 //< PWM3 on PB1 +#define GPIO_PCTL_PB1_CCP1 0x00000040 //< CCP1 on PB1 +#define GPIO_PCTL_PB1_U1TX 0x00000050 //< U1TX on PB1 +#define GPIO_PCTL_PB2_M 0x00000F00 //< PB2 mask +#define GPIO_PCTL_PB2_I2C0SCL 0x00000100 //< I2C0SCL on PB2 +#define GPIO_PCTL_PB2_IDX0 0x00000200 //< IDX0 on PB2 +#define GPIO_PCTL_PB2_CCP3 0x00000400 //< CCP3 on PB2 +#define GPIO_PCTL_PB2_CCP0 0x00000500 //< CCP0 on PB2 +#define GPIO_PCTL_PB2_USB0EPEN 0x00000800 //< USB0EPEN on PB2 +#define GPIO_PCTL_PB3_M 0x0000F000 //< PB3 mask +#define GPIO_PCTL_PB3_I2C0SDA 0x00001000 //< I2C0SDA on PB3 +#define GPIO_PCTL_PB3_FAULT0 0x00002000 //< FAULT0 on PB3 +#define GPIO_PCTL_PB3_FAULT3 0x00004000 //< FAULT3 on PB3 +#define GPIO_PCTL_PB3_USB0PFLT 0x00008000 //< USB0PFLT on PB3 +#define GPIO_PCTL_PB4_M 0x000F0000 //< PB4 mask +#define GPIO_PCTL_PB4_U2RX 0x00040000 //< U2RX on PB4 +#define GPIO_PCTL_PB4_CAN0RX 0x00050000 //< CAN0RX on PB4 +#define GPIO_PCTL_PB4_IDX0 0x00060000 //< IDX0 on PB4 +#define GPIO_PCTL_PB4_U1RX 0x00070000 //< U1RX on PB4 +#define GPIO_PCTL_PB4_EPI0S23 0x00080000 //< EPI0S23 on PB4 +#define GPIO_PCTL_PB5_M 0x00F00000 //< PB5 mask +#define GPIO_PCTL_PB5_C0O 0x00100000 //< C0O on PB5 +#define GPIO_PCTL_PB5_CCP5 0x00200000 //< CCP5 on PB5 +#define GPIO_PCTL_PB5_CCP6 0x00300000 //< CCP6 on PB5 +#define GPIO_PCTL_PB5_CCP0 0x00400000 //< CCP0 on PB5 +#define GPIO_PCTL_PB5_CAN0TX 0x00500000 //< CAN0TX on PB5 +#define GPIO_PCTL_PB5_CCP2 0x00600000 //< CCP2 on PB5 +#define GPIO_PCTL_PB5_U1TX 0x00700000 //< U1TX on PB5 +#define GPIO_PCTL_PB5_EPI0S22 0x00800000 //< EPI0S22 on PB5 +#define GPIO_PCTL_PB6_M 0x0F000000 //< PB6 mask +#define GPIO_PCTL_PB6_CCP1 0x01000000 //< CCP1 on PB6 +#define GPIO_PCTL_PB6_CCP7 0x02000000 //< CCP7 on PB6 +#define GPIO_PCTL_PB6_C0O 0x03000000 //< C0O on PB6 +#define GPIO_PCTL_PB6_FAULT1 0x04000000 //< FAULT1 on PB6 +#define GPIO_PCTL_PB6_IDX0 0x05000000 //< IDX0 on PB6 +#define GPIO_PCTL_PB6_CCP5 0x06000000 //< CCP5 on PB6 +#define GPIO_PCTL_PB6_I2S0TXSCK 0x09000000 //< I2S0TXSCK on PB6 +#define GPIO_PCTL_PB7_M 0xF0000000 //< PB7 mask +#define GPIO_PCTL_PB7_NMI 0x40000000 //< NMI on PB7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port C. + */ +/*\{*/ +#define GPIO_PCTL_PC0_M 0x0000000F //< PC0 mask +#define GPIO_PCTL_PC0_TCK 0x00000003 //< TCK on PC0 +#define GPIO_PCTL_PC1_M 0x000000F0 //< PC1 mask +#define GPIO_PCTL_PC1_TMS 0x00000030 //< TMS on PC1 +#define GPIO_PCTL_PC2_M 0x00000F00 //< PC2 mask +#define GPIO_PCTL_PC2_TDI 0x00000300 //< TDI on PC2 +#define GPIO_PCTL_PC3_M 0x0000F000 //< PC3 mask +#define GPIO_PCTL_PC3_TDO 0x00003000 //< TDO on PC3 +#define GPIO_PCTL_PC4_M 0x000F0000 //< PC4 mask +#define GPIO_PCTL_PC4_CCP5 0x00010000 //< CCP5 on PC4 +#define GPIO_PCTL_PC4_PHA0 0x00020000 //< PHA0 on PC4 +#define GPIO_PCTL_PC4_PWM6 0x00040000 //< PWM6 on PC4 +#define GPIO_PCTL_PC4_CCP2 0x00050000 //< CCP2 on PC4 +#define GPIO_PCTL_PC4_CCP4 0x00060000 //< CCP4 on PC4 +#define GPIO_PCTL_PC4_EPI0S2 0x00080000 //< EPI0S2 on PC4 +#define GPIO_PCTL_PC4_CCP1 0x00090000 //< CCP1 on PC4 +#define GPIO_PCTL_PC5_M 0x00F00000 //< PC5 mask +#define GPIO_PCTL_PC5_CCP1 0x00100000 //< CCP1 on PC5 +#define GPIO_PCTL_PC5_C1O 0x00200000 //< C1O on PC5 +#define GPIO_PCTL_PC5_C0O 0x00300000 //< C0O on PC5 +#define GPIO_PCTL_PC5_FAULT2 0x00400000 //< FAULT2 on PC5 +#define GPIO_PCTL_PC5_CCP3 0x00500000 //< CCP3 on PC5 +#define GPIO_PCTL_PC5_USB0EPEN 0x00600000 //< USB0EPEN on PC5 +#define GPIO_PCTL_PC5_EPI0S3 0x00800000 //< EPI0S3 on PC5 +#define GPIO_PCTL_PC6_M 0x0F000000 //< PC6 mask +#define GPIO_PCTL_PC6_CCP3 0x01000000 //< CCP3 on PC6 +#define GPIO_PCTL_PC6_PHB0 0x02000000 //< PHB0 on PC6 +#define GPIO_PCTL_PC6_C2O 0x03000000 //< C2O on PC6 +#define GPIO_PCTL_PC6_PWM7 0x04000000 //< PWM7 on PC6 +#define GPIO_PCTL_PC6_U1RX 0x05000000 //< U1RX on PC6 +#define GPIO_PCTL_PC6_CCP0 0x06000000 //< CCP0 on PC6 +#define GPIO_PCTL_PC6_USB0PFLT 0x07000000 //< USB0PFLT on PC6 +#define GPIO_PCTL_PC6_EPI0S4 0x08000000 //< EPI0S4 on PC6 +#define GPIO_PCTL_PC7_M 0xF0000000 //< PC7 mask +#define GPIO_PCTL_PC7_CCP4 0x10000000 //< CCP4 on PC7 +#define GPIO_PCTL_PC7_PHB0 0x20000000 //< PHB0 on PC7 +#define GPIO_PCTL_PC7_CCP0 0x40000000 //< CCP0 on PC7 +#define GPIO_PCTL_PC7_U1TX 0x50000000 //< U1TX on PC7 +#define GPIO_PCTL_PC7_USB0PFLT 0x60000000 //< USB0PFLT on PC7 +#define GPIO_PCTL_PC7_C1O 0x70000000 //< C1O on PC7 +#define GPIO_PCTL_PC7_EPI0S5 0x80000000 //< EPI0S5 on PC7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port D. + */ +/*\{*/ +#define GPIO_PCTL_PD0_M 0x0000000F //< PD0 mask +#define GPIO_PCTL_PD0_PWM0 0x00000001 //< PWM0 on PD0 +#define GPIO_PCTL_PD0_CAN0RX 0x00000002 //< CAN0RX on PD0 +#define GPIO_PCTL_PD0_IDX0 0x00000003 //< IDX0 on PD0 +#define GPIO_PCTL_PD0_U2RX 0x00000004 //< U2RX on PD0 +#define GPIO_PCTL_PD0_U1RX 0x00000005 //< U1RX on PD0 +#define GPIO_PCTL_PD0_CCP6 0x00000006 //< CCP6 on PD0 +#define GPIO_PCTL_PD0_I2S0RXSCK 0x00000008 //< I2S0RXSCK on PD0 +#define GPIO_PCTL_PD0_U1CTS 0x00000009 //< U1CTS on PD0 +#define GPIO_PCTL_PD1_M 0x000000F0 //< PD1 mask +#define GPIO_PCTL_PD1_PWM1 0x00000010 //< PWM1 on PD1 +#define GPIO_PCTL_PD1_CAN0TX 0x00000020 //< CAN0TX on PD1 +#define GPIO_PCTL_PD1_PHA0 0x00000030 //< PHA0 on PD1 +#define GPIO_PCTL_PD1_U2TX 0x00000040 //< U2TX on PD1 +#define GPIO_PCTL_PD1_U1TX 0x00000050 //< U1TX on PD1 +#define GPIO_PCTL_PD1_CCP7 0x00000060 //< CCP7 on PD1 +#define GPIO_PCTL_PD1_I2S0RXWS 0x00000080 //< I2S0RXWS on PD1 +#define GPIO_PCTL_PD1_U1DCD 0x00000090 //< U1DCD on PD1 +#define GPIO_PCTL_PD1_CCP2 0x000000A0 //< CCP2 on PD1 +#define GPIO_PCTL_PD1_PHB1 0x000000B0 //< PHB1 on PD1 +#define GPIO_PCTL_PD2_M 0x00000F00 //< PD2 mask +#define GPIO_PCTL_PD2_U1RX 0x00000100 //< U1RX on PD2 +#define GPIO_PCTL_PD2_CCP6 0x00000200 //< CCP6 on PD2 +#define GPIO_PCTL_PD2_PWM2 0x00000300 //< PWM2 on PD2 +#define GPIO_PCTL_PD2_CCP5 0x00000400 //< CCP5 on PD2 +#define GPIO_PCTL_PD2_EPI0S20 0x00000800 //< EPI0S20 on PD2 +#define GPIO_PCTL_PD3_M 0x0000F000 //< PD3 mask +#define GPIO_PCTL_PD3_U1TX 0x00001000 //< U1TX on PD3 +#define GPIO_PCTL_PD3_CCP7 0x00002000 //< CCP7 on PD3 +#define GPIO_PCTL_PD3_PWM3 0x00003000 //< PWM3 on PD3 +#define GPIO_PCTL_PD3_CCP0 0x00004000 //< CCP0 on PD3 +#define GPIO_PCTL_PD3_EPI0S21 0x00008000 //< EPI0S21 on PD3 +#define GPIO_PCTL_PD4_M 0x000F0000 //< PD4 mask +#define GPIO_PCTL_PD4_CCP0 0x00010000 //< CCP0 on PD4 +#define GPIO_PCTL_PD4_CCP3 0x00020000 //< CCP3 on PD4 +#define GPIO_PCTL_PD4_I2S0RXSD 0x00080000 //< I2S0RXSD on PD4 +#define GPIO_PCTL_PD4_U1RI 0x00090000 //< U1RI on PD4 +#define GPIO_PCTL_PD4_EPI0S19 0x000A0000 //< EPI0S19 on PD4 +#define GPIO_PCTL_PD5_M 0x00F00000 //< PD5 mask +#define GPIO_PCTL_PD5_CCP2 0x00100000 //< CCP2 on PD5 +#define GPIO_PCTL_PD5_CCP4 0x00200000 //< CCP4 on PD5 +#define GPIO_PCTL_PD5_I2S0RXMCLK \ + 0x00800000 //< I2S0RXMCLK on PD5 +#define GPIO_PCTL_PD5_U2RX 0x00900000 //< U2RX on PD5 +#define GPIO_PCTL_PD5_EPI0S28 0x00A00000 //< EPI0S28 on PD5 +#define GPIO_PCTL_PD6_M 0x0F000000 //< PD6 mask +#define GPIO_PCTL_PD6_FAULT0 0x01000000 //< FAULT0 on PD6 +#define GPIO_PCTL_PD6_I2S0TXSCK 0x08000000 //< I2S0TXSCK on PD6 +#define GPIO_PCTL_PD6_U2TX 0x09000000 //< U2TX on PD6 +#define GPIO_PCTL_PD6_EPI0S29 0x0A000000 //< EPI0S29 on PD6 +#define GPIO_PCTL_PD7_M 0xF0000000 //< PD7 mask +#define GPIO_PCTL_PD7_IDX0 0x10000000 //< IDX0 on PD7 +#define GPIO_PCTL_PD7_C0O 0x20000000 //< C0O on PD7 +#define GPIO_PCTL_PD7_CCP1 0x30000000 //< CCP1 on PD7 +#define GPIO_PCTL_PD7_I2S0TXWS 0x80000000 //< I2S0TXWS on PD7 +#define GPIO_PCTL_PD7_U1DTR 0x90000000 //< U1DTR on PD7 +#define GPIO_PCTL_PD7_EPI0S30 0xA0000000 //< EPI0S30 on PD7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port E. + */ +/*\{*/ +#define GPIO_PCTL_PE0_M 0x0000000F //< PE0 mask +#define GPIO_PCTL_PE0_PWM4 0x00000001 //< PWM4 on PE0 +#define GPIO_PCTL_PE0_SSI1CLK 0x00000002 //< SSI1CLK on PE0 +#define GPIO_PCTL_PE0_CCP3 0x00000003 //< CCP3 on PE0 +#define GPIO_PCTL_PE0_EPI0S8 0x00000008 //< EPI0S8 on PE0 +#define GPIO_PCTL_PE0_USB0PFLT 0x00000009 //< USB0PFLT on PE0 +#define GPIO_PCTL_PE1_M 0x000000F0 //< PE1 mask +#define GPIO_PCTL_PE1_PWM5 0x00000010 //< PWM5 on PE1 +#define GPIO_PCTL_PE1_SSI1FSS 0x00000020 //< SSI1FSS on PE1 +#define GPIO_PCTL_PE1_FAULT0 0x00000030 //< FAULT0 on PE1 +#define GPIO_PCTL_PE1_CCP2 0x00000040 //< CCP2 on PE1 +#define GPIO_PCTL_PE1_CCP6 0x00000050 //< CCP6 on PE1 +#define GPIO_PCTL_PE1_EPI0S9 0x00000080 //< EPI0S9 on PE1 +#define GPIO_PCTL_PE2_M 0x00000F00 //< PE2 mask +#define GPIO_PCTL_PE2_CCP4 0x00000100 //< CCP4 on PE2 +#define GPIO_PCTL_PE2_SSI1RX 0x00000200 //< SSI1RX on PE2 +#define GPIO_PCTL_PE2_PHB1 0x00000300 //< PHB1 on PE2 +#define GPIO_PCTL_PE2_PHA0 0x00000400 //< PHA0 on PE2 +#define GPIO_PCTL_PE2_CCP2 0x00000500 //< CCP2 on PE2 +#define GPIO_PCTL_PE2_EPI0S24 0x00000800 //< EPI0S24 on PE2 +#define GPIO_PCTL_PE3_M 0x0000F000 //< PE3 mask +#define GPIO_PCTL_PE3_CCP1 0x00001000 //< CCP1 on PE3 +#define GPIO_PCTL_PE3_SSI1TX 0x00002000 //< SSI1TX on PE3 +#define GPIO_PCTL_PE3_PHA1 0x00003000 //< PHA1 on PE3 +#define GPIO_PCTL_PE3_PHB0 0x00004000 //< PHB0 on PE3 +#define GPIO_PCTL_PE3_CCP7 0x00005000 //< CCP7 on PE3 +#define GPIO_PCTL_PE3_EPI0S25 0x00008000 //< EPI0S25 on PE3 +#define GPIO_PCTL_PE4_M 0x000F0000 //< PE4 mask +#define GPIO_PCTL_PE4_CCP3 0x00010000 //< CCP3 on PE4 +#define GPIO_PCTL_PE4_FAULT0 0x00040000 //< FAULT0 on PE4 +#define GPIO_PCTL_PE4_U2TX 0x00050000 //< U2TX on PE4 +#define GPIO_PCTL_PE4_CCP2 0x00060000 //< CCP2 on PE4 +#define GPIO_PCTL_PE4_I2S0TXWS 0x00090000 //< I2S0TXWS on PE4 +#define GPIO_PCTL_PE5_M 0x00F00000 //< PE5 mask +#define GPIO_PCTL_PE5_CCP5 0x00100000 //< CCP5 on PE5 +#define GPIO_PCTL_PE5_I2S0TXSD 0x00900000 //< I2S0TXSD on PE5 +#define GPIO_PCTL_PE6_M 0x0F000000 //< PE6 mask +#define GPIO_PCTL_PE6_PWM4 0x01000000 //< PWM4 on PE6 +#define GPIO_PCTL_PE6_C1O 0x02000000 //< C1O on PE6 +#define GPIO_PCTL_PE6_U1CTS 0x09000000 //< U1CTS on PE6 +#define GPIO_PCTL_PE7_M 0xF0000000 //< PE7 mask +#define GPIO_PCTL_PE7_PWM5 0x10000000 //< PWM5 on PE7 +#define GPIO_PCTL_PE7_C2O 0x20000000 //< C2O on PE7 +#define GPIO_PCTL_PE7_U1DCD 0x90000000 //< U1DCD on PE7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port F. + */ +/*\{*/ +#define GPIO_PCTL_PF0_M 0x0000000F //< PF0 mask +#define GPIO_PCTL_PF0_CAN1RX 0x00000001 //< CAN1RX on PF0 +#define GPIO_PCTL_PF0_PHB0 0x00000002 //< PHB0 on PF0 +#define GPIO_PCTL_PF0_PWM0 0x00000003 //< PWM0 on PF0 +#define GPIO_PCTL_PF0_I2S0TXSD 0x00000008 //< I2S0TXSD on PF0 +#define GPIO_PCTL_PF0_U1DSR 0x00000009 //< U1DSR on PF0 +#define GPIO_PCTL_PF1_M 0x000000F0 //< PF1 mask +#define GPIO_PCTL_PF1_CAN1TX 0x00000010 //< CAN1TX on PF1 +#define GPIO_PCTL_PF1_IDX1 0x00000020 //< IDX1 on PF1 +#define GPIO_PCTL_PF1_PWM1 0x00000030 //< PWM1 on PF1 +#define GPIO_PCTL_PF1_I2S0TXMCLK \ + 0x00000080 //< I2S0TXMCLK on PF1 +#define GPIO_PCTL_PF1_U1RTS 0x00000090 //< U1RTS on PF1 +#define GPIO_PCTL_PF1_CCP3 0x000000A0 //< CCP3 on PF1 +#define GPIO_PCTL_PF2_M 0x00000F00 //< PF2 mask +#define GPIO_PCTL_PF2_LED1 0x00000100 //< LED1 on PF2 +#define GPIO_PCTL_PF2_PWM4 0x00000200 //< PWM4 on PF2 +#define GPIO_PCTL_PF2_PWM2 0x00000400 //< PWM2 on PF2 +#define GPIO_PCTL_PF2_SSI1CLK 0x00000900 //< SSI1CLK on PF2 +#define GPIO_PCTL_PF3_M 0x0000F000 //< PF3 mask +#define GPIO_PCTL_PF3_LED0 0x00001000 //< LED0 on PF3 +#define GPIO_PCTL_PF3_PWM5 0x00002000 //< PWM5 on PF3 +#define GPIO_PCTL_PF3_PWM3 0x00004000 //< PWM3 on PF3 +#define GPIO_PCTL_PF3_SSI1FSS 0x00009000 //< SSI1FSS on PF3 +#define GPIO_PCTL_PF4_M 0x000F0000 //< PF4 mask +#define GPIO_PCTL_PF4_CCP0 0x00010000 //< CCP0 on PF4 +#define GPIO_PCTL_PF4_C0O 0x00020000 //< C0O on PF4 +#define GPIO_PCTL_PF4_FAULT0 0x00040000 //< FAULT0 on PF4 +#define GPIO_PCTL_PF4_EPI0S12 0x00080000 //< EPI0S12 on PF4 +#define GPIO_PCTL_PF4_SSI1RX 0x00090000 //< SSI1RX on PF4 +#define GPIO_PCTL_PF5_M 0x00F00000 //< PF5 mask +#define GPIO_PCTL_PF5_CCP2 0x00100000 //< CCP2 on PF5 +#define GPIO_PCTL_PF5_C1O 0x00200000 //< C1O on PF5 +#define GPIO_PCTL_PF5_EPI0S15 0x00800000 //< EPI0S15 on PF5 +#define GPIO_PCTL_PF5_SSI1TX 0x00900000 //< SSI1TX on PF5 +#define GPIO_PCTL_PF6_M 0x0F000000 //< PF6 mask +#define GPIO_PCTL_PF6_CCP1 0x01000000 //< CCP1 on PF6 +#define GPIO_PCTL_PF6_C2O 0x02000000 //< C2O on PF6 +#define GPIO_PCTL_PF6_PHA0 0x04000000 //< PHA0 on PF6 +#define GPIO_PCTL_PF6_I2S0TXMCLK \ + 0x09000000 //< I2S0TXMCLK on PF6 +#define GPIO_PCTL_PF6_U1RTS 0x0A000000 //< U1RTS on PF6 +#define GPIO_PCTL_PF7_M 0xF0000000 //< PF7 mask +#define GPIO_PCTL_PF7_CCP4 0x10000000 //< CCP4 on PF7 +#define GPIO_PCTL_PF7_PHB0 0x40000000 //< PHB0 on PF7 +#define GPIO_PCTL_PF7_EPI0S12 0x80000000 //< EPI0S12 on PF7 +#define GPIO_PCTL_PF7_FAULT1 0x90000000 //< FAULT1 on PF7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port G. + */ +/*\{*/ +#define GPIO_PCTL_PG0_M 0x0000000F //< PG0 mask +#define GPIO_PCTL_PG0_U2RX 0x00000001 //< U2RX on PG0 +#define GPIO_PCTL_PG0_PWM0 0x00000002 //< PWM0 on PG0 +#define GPIO_PCTL_PG0_I2C1SCL 0x00000003 //< I2C1SCL on PG0 +#define GPIO_PCTL_PG0_PWM4 0x00000004 //< PWM4 on PG0 +#define GPIO_PCTL_PG0_USB0EPEN 0x00000007 //< USB0EPEN on PG0 +#define GPIO_PCTL_PG0_EPI0S13 0x00000008 //< EPI0S13 on PG0 +#define GPIO_PCTL_PG1_M 0x000000F0 //< PG1 mask +#define GPIO_PCTL_PG1_U2TX 0x00000010 //< U2TX on PG1 +#define GPIO_PCTL_PG1_PWM1 0x00000020 //< PWM1 on PG1 +#define GPIO_PCTL_PG1_I2C1SDA 0x00000030 //< I2C1SDA on PG1 +#define GPIO_PCTL_PG1_PWM5 0x00000040 //< PWM5 on PG1 +#define GPIO_PCTL_PG1_EPI0S14 0x00000080 //< EPI0S14 on PG1 +#define GPIO_PCTL_PG2_M 0x00000F00 //< PG2 mask +#define GPIO_PCTL_PG2_PWM0 0x00000100 //< PWM0 on PG2 +#define GPIO_PCTL_PG2_FAULT0 0x00000400 //< FAULT0 on PG2 +#define GPIO_PCTL_PG2_IDX1 0x00000800 //< IDX1 on PG2 +#define GPIO_PCTL_PG2_I2S0RXSD 0x00000900 //< I2S0RXSD on PG2 +#define GPIO_PCTL_PG3_M 0x0000F000 //< PG3 mask +#define GPIO_PCTL_PG3_PWM1 0x00001000 //< PWM1 on PG3 +#define GPIO_PCTL_PG3_FAULT2 0x00004000 //< FAULT2 on PG3 +#define GPIO_PCTL_PG3_FAULT0 0x00008000 //< FAULT0 on PG3 +#define GPIO_PCTL_PG3_I2S0RXMCLK \ + 0x00009000 //< I2S0RXMCLK on PG3 +#define GPIO_PCTL_PG4_M 0x000F0000 //< PG4 mask +#define GPIO_PCTL_PG4_CCP3 0x00010000 //< CCP3 on PG4 +#define GPIO_PCTL_PG4_FAULT1 0x00040000 //< FAULT1 on PG4 +#define GPIO_PCTL_PG4_EPI0S15 0x00080000 //< EPI0S15 on PG4 +#define GPIO_PCTL_PG4_PWM6 0x00090000 //< PWM6 on PG4 +#define GPIO_PCTL_PG4_U1RI 0x000A0000 //< U1RI on PG4 +#define GPIO_PCTL_PG5_M 0x00F00000 //< PG5 mask +#define GPIO_PCTL_PG5_CCP5 0x00100000 //< CCP5 on PG5 +#define GPIO_PCTL_PG5_IDX0 0x00400000 //< IDX0 on PG5 +#define GPIO_PCTL_PG5_FAULT1 0x00500000 //< FAULT1 on PG5 +#define GPIO_PCTL_PG5_PWM7 0x00800000 //< PWM7 on PG5 +#define GPIO_PCTL_PG5_I2S0RXSCK 0x00900000 //< I2S0RXSCK on PG5 +#define GPIO_PCTL_PG5_U1DTR 0x00A00000 //< U1DTR on PG5 +#define GPIO_PCTL_PG6_M 0x0F000000 //< PG6 mask +#define GPIO_PCTL_PG6_PHA1 0x01000000 //< PHA1 on PG6 +#define GPIO_PCTL_PG6_PWM6 0x04000000 //< PWM6 on PG6 +#define GPIO_PCTL_PG6_FAULT1 0x08000000 //< FAULT1 on PG6 +#define GPIO_PCTL_PG6_I2S0RXWS 0x09000000 //< I2S0RXWS on PG6 +#define GPIO_PCTL_PG6_U1RI 0x0A000000 //< U1RI on PG6 +#define GPIO_PCTL_PG7_M 0xF0000000 //< PG7 mask +#define GPIO_PCTL_PG7_PHB1 0x10000000 //< PHB1 on PG7 +#define GPIO_PCTL_PG7_PWM7 0x40000000 //< PWM7 on PG7 +#define GPIO_PCTL_PG7_CCP5 0x80000000 //< CCP5 on PG7 +#define GPIO_PCTL_PG7_EPI0S31 0x90000000 //< EPI0S31 on PG7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port H. + */ +/*\{*/ +#define GPIO_PCTL_PH0_M 0x0000000F //< PH0 mask +#define GPIO_PCTL_PH0_CCP6 0x00000001 //< CCP6 on PH0 +#define GPIO_PCTL_PH0_PWM2 0x00000002 //< PWM2 on PH0 +#define GPIO_PCTL_PH0_EPI0S6 0x00000008 //< EPI0S6 on PH0 +#define GPIO_PCTL_PH0_PWM4 0x00000009 //< PWM4 on PH0 +#define GPIO_PCTL_PH1_M 0x000000F0 //< PH1 mask +#define GPIO_PCTL_PH1_CCP7 0x00000010 //< CCP7 on PH1 +#define GPIO_PCTL_PH1_PWM3 0x00000020 //< PWM3 on PH1 +#define GPIO_PCTL_PH1_EPI0S7 0x00000080 //< EPI0S7 on PH1 +#define GPIO_PCTL_PH1_PWM5 0x00000090 //< PWM5 on PH1 +#define GPIO_PCTL_PH2_M 0x00000F00 //< PH2 mask +#define GPIO_PCTL_PH2_IDX1 0x00000100 //< IDX1 on PH2 +#define GPIO_PCTL_PH2_C1O 0x00000200 //< C1O on PH2 +#define GPIO_PCTL_PH2_FAULT3 0x00000400 //< FAULT3 on PH2 +#define GPIO_PCTL_PH2_EPI0S1 0x00000800 //< EPI0S1 on PH2 +#define GPIO_PCTL_PH3_M 0x0000F000 //< PH3 mask +#define GPIO_PCTL_PH3_PHB0 0x00001000 //< PHB0 on PH3 +#define GPIO_PCTL_PH3_FAULT0 0x00002000 //< FAULT0 on PH3 +#define GPIO_PCTL_PH3_USB0EPEN 0x00004000 //< USB0EPEN on PH3 +#define GPIO_PCTL_PH3_EPI0S0 0x00008000 //< EPI0S0 on PH3 +#define GPIO_PCTL_PH4_M 0x000F0000 //< PH4 mask +#define GPIO_PCTL_PH4_USB0PFLT 0x00040000 //< USB0PFLT on PH4 +#define GPIO_PCTL_PH4_EPI0S10 0x00080000 //< EPI0S10 on PH4 +#define GPIO_PCTL_PH4_SSI1CLK 0x000B0000 //< SSI1CLK on PH4 +#define GPIO_PCTL_PH5_M 0x00F00000 //< PH5 mask +#define GPIO_PCTL_PH5_EPI0S11 0x00800000 //< EPI0S11 on PH5 +#define GPIO_PCTL_PH5_FAULT2 0x00A00000 //< FAULT2 on PH5 +#define GPIO_PCTL_PH5_SSI1FSS 0x00B00000 //< SSI1FSS on PH5 +#define GPIO_PCTL_PH6_M 0x0F000000 //< PH6 mask +#define GPIO_PCTL_PH6_EPI0S26 0x08000000 //< EPI0S26 on PH6 +#define GPIO_PCTL_PH6_PWM4 0x0A000000 //< PWM4 on PH6 +#define GPIO_PCTL_PH6_SSI1RX 0x0B000000 //< SSI1RX on PH6 +#define GPIO_PCTL_PH7_M 0xF0000000 //< PH7 mask +#define GPIO_PCTL_PH7_EPI0S27 0x80000000 //< EPI0S27 on PH7 +#define GPIO_PCTL_PH7_PWM5 0xA0000000 //< PWM5 on PH7 +#define GPIO_PCTL_PH7_SSI1TX 0xB0000000 //< SSI1TX on PH7 +/*\}*/ + +/** + * The following are defines for the bit fields in the GPIO_PCTL register for + * port J. + */ +/*\{*/ +#define GPIO_PCTL_PJ0_M 0x0000000F //< PJ0 mask +#define GPIO_PCTL_PJ0_EPI0S16 0x00000008 //< EPI0S16 on PJ0 +#define GPIO_PCTL_PJ0_PWM0 0x0000000A //< PWM0 on PJ0 +#define GPIO_PCTL_PJ0_I2C1SCL 0x0000000B //< I2C1SCL on PJ0 +#define GPIO_PCTL_PJ1_M 0x000000F0 //< PJ1 mask +#define GPIO_PCTL_PJ1_EPI0S17 0x00000080 //< EPI0S17 on PJ1 +#define GPIO_PCTL_PJ1_USB0PFLT 0x00000090 //< USB0PFLT on PJ1 +#define GPIO_PCTL_PJ1_PWM1 0x000000A0 //< PWM1 on PJ1 +#define GPIO_PCTL_PJ1_I2C1SDA 0x000000B0 //< I2C1SDA on PJ1 +#define GPIO_PCTL_PJ2_M 0x00000F00 //< PJ2 mask +#define GPIO_PCTL_PJ2_EPI0S18 0x00000800 //< EPI0S18 on PJ2 +#define GPIO_PCTL_PJ2_CCP0 0x00000900 //< CCP0 on PJ2 +#define GPIO_PCTL_PJ2_FAULT0 0x00000A00 //< FAULT0 on PJ2 +#define GPIO_PCTL_PJ3_M 0x0000F000 //< PJ3 mask +#define GPIO_PCTL_PJ3_EPI0S19 0x00008000 //< EPI0S19 on PJ3 +#define GPIO_PCTL_PJ3_U1CTS 0x00009000 //< U1CTS on PJ3 +#define GPIO_PCTL_PJ3_CCP6 0x0000A000 //< CCP6 on PJ3 +#define GPIO_PCTL_PJ4_M 0x000F0000 //< PJ4 mask +#define GPIO_PCTL_PJ4_EPI0S28 0x00080000 //< EPI0S28 on PJ4 +#define GPIO_PCTL_PJ4_U1DCD 0x00090000 //< U1DCD on PJ4 +#define GPIO_PCTL_PJ4_CCP4 0x000A0000 //< CCP4 on PJ4 +#define GPIO_PCTL_PJ5_M 0x00F00000 //< PJ5 mask +#define GPIO_PCTL_PJ5_EPI0S29 0x00800000 //< EPI0S29 on PJ5 +#define GPIO_PCTL_PJ5_U1DSR 0x00900000 //< U1DSR on PJ5 +#define GPIO_PCTL_PJ5_CCP2 0x00A00000 //< CCP2 on PJ5 +#define GPIO_PCTL_PJ6_M 0x0F000000 //< PJ6 mask +#define GPIO_PCTL_PJ6_EPI0S30 0x08000000 //< EPI0S30 on PJ6 +#define GPIO_PCTL_PJ6_U1RTS 0x09000000 //< U1RTS on PJ6 +#define GPIO_PCTL_PJ6_CCP1 0x0A000000 //< CCP1 on PJ6 +#define GPIO_PCTL_PJ7_M 0xF0000000 //< PJ7 mask +#define GPIO_PCTL_PJ7_U1DTR 0x90000000 //< U1DTR on PJ7 +#define GPIO_PCTL_PJ7_CCP0 0xA0000000 //< CCP0 on PJ7 +/*\}*/ + +/** + * The following definitions are deprecated. + */ +/*\{*/ +#ifndef DEPRECATED +/*\}*/ + +/** + * The following are deprecated defines for the GPIO register offsets. + */ +/*\{*/ +#define GPIO_O_PeriphID4 0x00000FD0 +#define GPIO_O_PeriphID5 0x00000FD4 +#define GPIO_O_PeriphID6 0x00000FD8 +#define GPIO_O_PeriphID7 0x00000FDC +#define GPIO_O_PeriphID0 0x00000FE0 +#define GPIO_O_PeriphID1 0x00000FE4 +#define GPIO_O_PeriphID2 0x00000FE8 +#define GPIO_O_PeriphID3 0x00000FEC +#define GPIO_O_PCellID0 0x00000FF0 +#define GPIO_O_PCellID1 0x00000FF4 +#define GPIO_O_PCellID2 0x00000FF8 +#define GPIO_O_PCellID3 0x00000FFC +/*\}*/ + +/** + * The following are deprecated defines for the GPIO Register reset values. + */ +/*\{*/ +#define GPIO_RV_DEN 0x000000FF //< Digital input enable reg RV +#define GPIO_RV_PUR 0x000000FF //< Pull up select reg RV +#define GPIO_RV_DR2R 0x000000FF //< 2ma drive select reg RV +#define GPIO_RV_PCellID1 0x000000F0 +#define GPIO_RV_PCellID3 0x000000B1 +#define GPIO_RV_PeriphID0 0x00000061 +#define GPIO_RV_PeriphID1 0x00000010 +#define GPIO_RV_PCellID0 0x0000000D +#define GPIO_RV_PCellID2 0x00000005 +#define GPIO_RV_PeriphID2 0x00000004 +#define GPIO_RV_LOCK 0x00000001 //< Lock register RV +#define GPIO_RV_PeriphID7 0x00000000 +#define GPIO_RV_PDR 0x00000000 //< Pull down select reg RV +#define GPIO_RV_IC 0x00000000 //< Interrupt clear reg RV +#define GPIO_RV_SLR 0x00000000 //< Slew rate control enable reg RV +#define GPIO_RV_ODR 0x00000000 //< Open drain select reg RV +#define GPIO_RV_IBE 0x00000000 //< Interrupt both edges reg RV +#define GPIO_RV_AFSEL 0x00000000 //< Mode control select reg RV +#define GPIO_RV_IS 0x00000000 //< Interrupt sense reg RV +#define GPIO_RV_IM 0x00000000 //< Interrupt mask reg RV +#define GPIO_RV_PeriphID4 0x00000000 +#define GPIO_RV_PeriphID5 0x00000000 +#define GPIO_RV_DR8R 0x00000000 //< 8ma drive select reg RV +#define GPIO_RV_RIS 0x00000000 //< Raw interrupt status reg RV +#define GPIO_RV_DR4R 0x00000000 //< 4ma drive select reg RV +#define GPIO_RV_IEV 0x00000000 //< Intterupt event reg RV +#define GPIO_RV_DIR 0x00000000 //< Data direction reg RV +#define GPIO_RV_PeriphID6 0x00000000 +#define GPIO_RV_PeriphID3 0x00000000 +#define GPIO_RV_DATA 0x00000000 //< Data register reset value +#define GPIO_RV_MIS 0x00000000 //< Masked interrupt status reg RV +/*\}*/ + +#endif /* DEPRECATED */ + +#endif /* LM3S_GPIO_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_i2c.h b/bertos/cpu/cortex-m3/io/lm3s_i2c.h new file mode 100644 index 0000000..711e996 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_i2c.h @@ -0,0 +1,255 @@ +/** + * \file + * + * + * \brief LM3S I2C definition. + */ + +#ifndef LM3S_I2C_H +#define LM3S_I2C_H + + +/* The following are defines for the I2C register offsets. */ +#define I2C_O_MSA 0x00000000 ///< I2C Master Slave Address +#define I2C_O_SOAR 0x00000000 ///< I2C Slave Own Address +#define I2C_O_SCSR 0x00000004 ///< I2C Slave Control/Status +#define I2C_O_MCS 0x00000004 ///< I2C Master Control/Status +#define I2C_O_SDR 0x00000008 ///< I2C Slave Data +#define I2C_O_MDR 0x00000008 ///< I2C Master Data +#define I2C_O_MTPR 0x0000000C ///< I2C Master Timer Period +#define I2C_O_SIMR 0x0000000C ///< I2C Slave Interrupt Mask +#define I2C_O_SRIS 0x00000010 ///< I2C Slave Raw Interrupt Status +#define I2C_O_MIMR 0x00000010 ///< I2C Master Interrupt Mask +#define I2C_O_MRIS 0x00000014 ///< I2C Master Raw Interrupt Status +#define I2C_O_SMIS 0x00000014 ///< I2C Slave Masked Interrupt + ///< Status +#define I2C_O_SICR 0x00000018 ///< I2C Slave Interrupt Clear +#define I2C_O_MMIS 0x00000018 ///< I2C Master Masked Interrupt + ///< Status +#define I2C_O_MICR 0x0000001C ///< I2C Master Interrupt Clear +#define I2C_O_MCR 0x00000020 ///< I2C Master Configuration + + +/* The following are defines for the bit fields in the I2C_O_MSA register. */ +#define I2C_MSA_SA_M 0x000000FE ///< I2C Slave Address +#define I2C_MSA_RS 0x00000001 ///< Receive not send +#define I2C_MSA_SA_S 1 +#define I2C_MSA_ADDS 0 ///< Set address write bit +#define I2C_MSA_ADDR 1 ///< Set address read bit + + +/* The following are defines for the bit fields in the I2C_O_SOAR register. */ +#define I2C_SOAR_OAR_M 0x0000007F ///< I2C Slave Own Address +#define I2C_SOAR_OAR_S 0 + + +/* The following are defines for the bit fields in the I2C_O_SCSR register. */ +#define I2C_SCSR_FBR 0x00000004 ///< First Byte Received +#define I2C_SCSR_TREQ 0x00000002 ///< Transmit Request +#define I2C_SCSR_DA 0x00000001 ///< Device Active +#define I2C_SCSR_RREQ 0x00000001 ///< Receive Request + +/* The following are defines for the bit fields in the I2C_O_MCS register. */ +#define I2C_MCS_BUSBSY 0x00000040 ///< Bus Busy +#define I2C_MCS_IDLE 0x00000020 ///< I2C Idle +#define I2C_MCS_ARBLST 0x00000010 ///< Arbitration Lost +#define I2C_MCS_ACK 0x00000008 ///< Data Acknowledge Enable +#define I2C_MCS_DATACK 0x00000008 ///< Acknowledge Data +#define I2C_MCS_ADRACK 0x00000004 ///< Acknowledge Address +#define I2C_MCS_STOP 0x00000004 ///< Generate STOP +#define I2C_MCS_START 0x00000002 ///< Generate START +#define I2C_MCS_ERROR 0x00000002 ///< Error +#define I2C_MCS_RUN 0x00000001 ///< I2C Master Enable +#define I2C_MCS_BUSY 0x00000001 ///< I2C Busy + + +/* The following are defines for the bit fields in the I2C_O_SDR register. */ +#define I2C_SDR_DATA_M 0x000000FF ///< Data for Transfer +#define I2C_SDR_DATA_S 0 + +/* The following are defines for the bit fields in the I2C_O_MDR register. */ +#define I2C_MDR_DATA_M 0x000000FF ///< Data Transferred +#define I2C_MDR_DATA_S 0 + + +/* The following are defines for the bit fields in the I2C_O_MTPR register. */ +#define I2C_MTPR_TPR_M 0x000000FF ///< SCL Clock Period +#define I2C_MTPR_TPR_S 0 + + +/* The following are defines for the bit fields in the I2C_O_SIMR register. */ +#define I2C_SIMR_STOPIM 0x00000004 ///< Stop Condition Interrupt Mask +#define I2C_SIMR_STARTIM 0x00000002 ///< Start Condition Interrupt Mask +#define I2C_SIMR_DATAIM 0x00000001 ///< Data Interrupt Mask + + +/* The following are defines for the bit fields in the I2C_O_SRIS register. */ +#define I2C_SRIS_STOPRIS 0x00000004 ///< Stop Condition Raw Interrupt + ///< Status +#define I2C_SRIS_STARTRIS 0x00000002 ///< Start Condition Raw Interrupt + ///< Status +#define I2C_SRIS_DATARIS 0x00000001 ///< Data Raw Interrupt Status + + +/* The following are defines for the bit fields in the I2C_O_MIMR register. */ +#define I2C_MIMR_IM 0x00000001 ///< Interrupt Mask + + +/* The following are defines for the bit fields in the I2C_O_MRIS register. */ +#define I2C_MRIS_RIS 0x00000001 ///< Raw Interrupt Status + +/* The following are defines for the bit fields in the I2C_O_SMIS register. */ +#define I2C_SMIS_STOPMIS 0x00000004 ///< Stop Condition Masked Interrupt + ///< Status +#define I2C_SMIS_STARTMIS 0x00000002 ///< Start Condition Masked Interrupt + ///< Status +#define I2C_SMIS_DATAMIS 0x00000001 ///< Data Masked Interrupt Status + +/* The following are defines for the bit fields in the I2C_O_SICR register. */ +#define I2C_SICR_STOPIC 0x00000004 ///< Stop Condition Interrupt Clear +#define I2C_SICR_STARTIC 0x00000002 ///< Start Condition Interrupt Clear +#define I2C_SICR_DATAIC 0x00000001 ///< Data Interrupt Clear + +/* The following are defines for the bit fields in the I2C_O_MMIS register. */ +#define I2C_MMIS_MIS 0x00000001 ///< Masked Interrupt Status + + +/* The following are defines for the bit fields in the I2C_O_MICR register. */ +#define I2C_MICR_IC 0x00000001 ///< Interrupt Clear + + +/* The following are defines for the bit fields in the I2C_O_MCR register. */ +#define I2C_MCR_SFE 0x00000020 ///< I2C Slave Function Enable +#define I2C_MCR_MFE 0x00000010 ///< I2C Master Function Enable +#define I2C_MCR_LPBK 0x00000001 ///< I2C Loopback + + + +#define I2C_MASTER_CMD_SINGLE_SEND 0x00000007 +#define I2C_MASTER_CMD_SINGLE_RECEIVE 0x00000007 + +#define I2C_MASTER_CMD_BURST_SEND_START 0x00000003 +#define I2C_MASTER_CMD_BURST_SEND_CONT 0x00000001 +#define I2C_MASTER_CMD_BURST_SEND_FINISH 0x00000005 +#define I2C_MASTER_CMD_BURST_SEND_ERROR_STOP 0x00000004 + +#define I2C_MASTER_CMD_BURST_RECEIVE_START 0x0000000b +#define I2C_MASTER_CMD_BURST_RECEIVE_CONT 0x00000009 +#define I2C_MASTER_CMD_BURST_RECEIVE_FINISH 0x00000005 +#define I2C_MASTER_CMD_BURST_RECEIVE_ERROR_STOP 0x00000004 + + +/* The following definitions are deprecated. */ + +#ifndef DEPRECATED + + #define I2C_O_SLAVE 0x00000800 ///< Offset from master to slave + + #define I2C_SIMR_IM 0x00000001 ///< Interrupt Mask + + #define I2C_SRIS_RIS 0x00000001 ///< Raw Interrupt Status + + #define I2C_SMIS_MIS 0x00000001 ///< Masked Interrupt Status + + #define I2C_SICR_IC 0x00000001 ///< Clear Interrupt + + #define I2C_MASTER_O_SA 0x00000000 ///< Slave address register + #define I2C_MASTER_O_CS 0x00000004 ///< Control and Status register + #define I2C_MASTER_O_DR 0x00000008 ///< Data register + #define I2C_MASTER_O_TPR 0x0000000C ///< Timer period register + #define I2C_MASTER_O_IMR 0x00000010 ///< Interrupt mask register + #define I2C_MASTER_O_RIS 0x00000014 ///< Raw interrupt status register + #define I2C_MASTER_O_MIS 0x00000018 ///< Masked interrupt status reg + #define I2C_MASTER_O_MICR 0x0000001C ///< Interrupt clear register + #define I2C_MASTER_O_CR 0x00000020 ///< Configuration register + + #define I2C_SLAVE_O_SICR 0x00000018 ///< Interrupt clear register + #define I2C_SLAVE_O_MIS 0x00000014 ///< Masked interrupt status reg + #define I2C_SLAVE_O_RIS 0x00000010 ///< Raw interrupt status register + #define I2C_SLAVE_O_IM 0x0000000C ///< Interrupt mask register + #define I2C_SLAVE_O_DR 0x00000008 ///< Data register + #define I2C_SLAVE_O_CSR 0x00000004 ///< Control/Status register + #define I2C_SLAVE_O_OAR 0x00000000 ///< Own address register + + #define I2C_MASTER_SA_SA_MASK 0x000000FE ///< Slave address + #define I2C_MASTER_SA_RS 0x00000001 ///< Receive/send + #define I2C_MASTER_SA_SA_SHIFT 1 + + #define I2C_MASTER_CS_BUS_BUSY 0x00000040 ///< Bus busy + #define I2C_MASTER_CS_IDLE 0x00000020 ///< Idle + #define I2C_MASTER_CS_ERR_MASK 0x0000001C + #define I2C_MASTER_CS_BUSY 0x00000001 ///< Controller is TX/RX data + #define I2C_MASTER_CS_ERROR 0x00000002 ///< Error occurred + #define I2C_MASTER_CS_ADDR_ACK 0x00000004 ///< Address byte not acknowledged + #define I2C_MASTER_CS_DATA_ACK 0x00000008 ///< Data byte not acknowledged + #define I2C_MASTER_CS_ARB_LOST 0x00000010 ///< Lost arbitration + #define I2C_MASTER_CS_ACK 0x00000008 ///< Acknowlegde + #define I2C_MASTER_CS_STOP 0x00000004 ///< Stop + #define I2C_MASTER_CS_START 0x00000002 ///< Start + #define I2C_MASTER_CS_RUN 0x00000001 ///< Run + + + #define I2C_SCL_FAST 400000 ///< SCL fast frequency + #define I2C_SCL_STANDARD 100000 ///< SCL standard frequency + #define I2C_MASTER_TPR_SCL_LP 0x00000006 ///< SCL low period + #define I2C_MASTER_TPR_SCL_HP 0x00000004 ///< SCL high period + #define I2C_MASTER_TPR_SCL (I2C_MASTER_TPR_SCL_HP + I2C_MASTER_TPR_SCL_LP) + + #define I2C_MASTER_IMR_IM 0x00000001 ///< Master interrupt mask + + #define I2C_MASTER_RIS_RIS 0x00000001 ///< Master raw interrupt status + + #define I2C_MASTER_MIS_MIS 0x00000001 ///< Master masked interrupt status + + #define I2C_MASTER_MICR_IC 0x00000001 ///< Master interrupt clear + + #define I2C_MASTER_CR_SFE 0x00000020 ///< Slave function enable + #define I2C_MASTER_CR_MFE 0x00000010 ///< Master function enable + #define I2C_MASTER_CR_LPBK 0x00000001 ///< Loopback enable + + #define I2C_SLAVE_SOAR_OAR_MASK 0x0000007F ///< Slave address + + #define I2C_SLAVE_CSR_FBR 0x00000004 ///< First byte received from master + #define I2C_SLAVE_CSR_TREQ 0x00000002 ///< Transmit request received + #define I2C_SLAVE_CSR_DA 0x00000001 ///< Enable the device + #define I2C_SLAVE_CSR_RREQ 0x00000001 ///< Receive data from I2C master + + #define I2C_SLAVE_IMR_IM 0x00000001 ///< Slave interrupt mask + + #define I2C_SLAVE_RIS_RIS 0x00000001 ///< Slave raw interrupt status + + #define I2C_SLAVE_MIS_MIS 0x00000001 ///< Slave masked interrupt status + + #define I2C_SLAVE_SICR_IC 0x00000001 ///< Slave interrupt clear + +#endif + +#endif /* LM3S_I2C_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_ints.h b/bertos/cpu/cortex-m3/io/lm3s_ints.h new file mode 100644 index 0000000..278c19d --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_ints.h @@ -0,0 +1,130 @@ +/** + * \file + * + * + * \brief LM3S1968 interrupts definition. + */ + +#ifndef LM3S_INTS_H +#define LM3S_INTS_H + +/** + * The following are defines for the fault assignments. + */ +/*\{*/ +#define FAULT_NMI 2 ///< NMI fault +#define FAULT_HARD 3 ///< Hard fault +#define FAULT_MPU 4 ///< MPU fault +#define FAULT_BUS 5 ///< Bus fault +#define FAULT_USAGE 6 ///< Usage fault +#define FAULT_SVCALL 11 ///< SVCall +#define FAULT_DEBUG 12 ///< Debug monitor +#define FAULT_PENDSV 14 ///< PendSV +#define FAULT_SYSTICK 15 ///< System Tick +/*\}*/ + +/** + * The following are defines for the interrupt assignments. + */ +/*\{*/ +#define INT_GPIOA 16 ///< GPIO Port A +#define INT_GPIOB 17 ///< GPIO Port B +#define INT_GPIOC 18 ///< GPIO Port C +#define INT_GPIOD 19 ///< GPIO Port D +#define INT_GPIOE 20 ///< GPIO Port E +#define INT_UART0 21 ///< UART0 Rx and Tx +#define INT_UART1 22 ///< UART1 Rx and Tx +#define INT_SSI0 23 ///< SSI0 Rx and Tx +#define INT_I2C0 24 ///< I2C0 Master and Slave +#define INT_PWM_FAULT 25 ///< PWM Fault +#define INT_PWM0 26 ///< PWM Generator 0 +#define INT_PWM1 27 ///< PWM Generator 1 +#define INT_PWM2 28 ///< PWM Generator 2 +#define INT_QEI0 29 ///< Quadrature Encoder 0 +#define INT_ADC0 30 ///< ADC Sequence 0 +#define INT_ADC1 31 ///< ADC Sequence 1 +#define INT_ADC2 32 ///< ADC Sequence 2 +#define INT_ADC3 33 ///< ADC Sequence 3 +#define INT_WATCHDOG 34 ///< Watchdog timer +#define INT_TIMER0A 35 ///< Timer 0 subtimer A +#define INT_TIMER0B 36 ///< Timer 0 subtimer B +#define INT_TIMER1A 37 ///< Timer 1 subtimer A +#define INT_TIMER1B 38 ///< Timer 1 subtimer B +#define INT_TIMER2A 39 ///< Timer 2 subtimer A +#define INT_TIMER2B 40 ///< Timer 2 subtimer B +#define INT_COMP0 41 ///< Analog Comparator 0 +#define INT_COMP1 42 ///< Analog Comparator 1 +#define INT_COMP2 43 ///< Analog Comparator 2 +#define INT_SYSCTL 44 ///< System Control (PLL, OSC, BO) +#define INT_FLASH 45 ///< FLASH Control +#define INT_GPIOF 46 ///< GPIO Port F +#define INT_GPIOG 47 ///< GPIO Port G +#define INT_GPIOH 48 ///< GPIO Port H +#define INT_UART2 49 ///< UART2 Rx and Tx +#define INT_SSI1 50 ///< SSI1 Rx and Tx +#define INT_TIMER3A 51 ///< Timer 3 subtimer A +#define INT_TIMER3B 52 ///< Timer 3 subtimer B +#define INT_I2C1 53 ///< I2C1 Master and Slave +#define INT_QEI1 54 ///< Quadrature Encoder 1 +#define INT_CAN0 55 ///< CAN0 +#define INT_CAN1 56 ///< CAN1 +#define INT_CAN2 57 ///< CAN2 +#define INT_ETH 58 ///< Ethernet +#define INT_HIBERNATE 59 ///< Hibernation module +#define INT_USB0 60 ///< USB 0 Controller +#define INT_PWM3 61 ///< PWM Generator 3 +#define INT_UDMA 62 ///< uDMA controller +#define INT_UDMAERR 63 ///< uDMA Error +#define INT_ADC1SS0 64 ///< ADC1 Sequence 0 +#define INT_ADC1SS1 65 ///< ADC1 Sequence 1 +#define INT_ADC1SS2 66 ///< ADC1 Sequence 2 +#define INT_ADC1SS3 67 ///< ADC1 Sequence 3 +#define INT_I2S0 68 ///< I2S0 +#define INT_EPI0 69 ///< EPI0 +#define INT_GPIOJ 70 ///< GPIO Port J +/*\}*/ + +/** + * The following are defines for the total number of interrupts. + */ +/*\{*/ +#define NUM_INTERRUPTS 71 +/*\}*/ + +/** + * The following are defines for the total number of priority levels. + */ +/*\{*/ +#define NUM_PRIORITY 8 +#define NUM_PRIORITY_BITS 3 +/*\}*/ + +#endif /* LM3S_INTS_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_memmap.h b/bertos/cpu/cortex-m3/io/lm3s_memmap.h new file mode 100644 index 0000000..33993d9 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_memmap.h @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \brief LM3S1968 memory map. + */ + +#ifndef LM3S_MEMMAP_H +#define LM3S_MEMMAP_H + +/** + * The following are defines for the base address of the memories and + * peripherals. + */ +/*\{*/ +#define FLASH_BASE 0x00000000 //< FLASH memory +#define SRAM_BASE 0x20000000 //< SRAM memory +#define WATCHDOG0_BASE 0x40000000 //< Watchdog0 +#define WATCHDOG1_BASE 0x40001000 //< Watchdog1 +#define GPIO_PORTA_BASE 0x40004000 //< GPIO Port A +#define GPIO_PORTB_BASE 0x40005000 //< GPIO Port B +#define GPIO_PORTC_BASE 0x40006000 //< GPIO Port C +#define GPIO_PORTD_BASE 0x40007000 //< GPIO Port D +#define SSI0_BASE 0x40008000 //< SSI0 +#define SSI1_BASE 0x40009000 //< SSI1 +#define UART0_BASE 0x4000C000 //< UART0 +#define UART1_BASE 0x4000D000 //< UART1 +#define UART2_BASE 0x4000E000 //< UART2 +#define I2C0_MASTER_BASE 0x40020000 //< I2C0 Master +#define I2C0_SLAVE_BASE 0x40020800 //< I2C0 Slave +#define I2C1_MASTER_BASE 0x40021000 //< I2C1 Master +#define I2C1_SLAVE_BASE 0x40021800 //< I2C1 Slave +#define GPIO_PORTE_BASE 0x40024000 //< GPIO Port E +#define GPIO_PORTF_BASE 0x40025000 //< GPIO Port F +#define GPIO_PORTG_BASE 0x40026000 //< GPIO Port G +#define GPIO_PORTH_BASE 0x40027000 //< GPIO Port H +#define PWM_BASE 0x40028000 //< PWM +#define QEI0_BASE 0x4002C000 //< QEI0 +#define QEI1_BASE 0x4002D000 //< QEI1 +#define TIMER0_BASE 0x40030000 //< Timer0 +#define TIMER1_BASE 0x40031000 //< Timer1 +#define TIMER2_BASE 0x40032000 //< Timer2 +#define TIMER3_BASE 0x40033000 //< Timer3 +#define ADC0_BASE 0x40038000 //< ADC0 +#define ADC1_BASE 0x40039000 //< ADC1 +#define COMP_BASE 0x4003C000 //< Analog comparators +#define GPIO_PORTJ_BASE 0x4003D000 //< GPIO Port J +#define CAN0_BASE 0x40040000 //< CAN0 +#define CAN1_BASE 0x40041000 //< CAN1 +#define CAN2_BASE 0x40042000 //< CAN2 +#define ETH_BASE 0x40048000 //< Ethernet +#define MAC_BASE 0x40048000 //< Ethernet +#define USB0_BASE 0x40050000 //< USB 0 Controller +#define I2S0_BASE 0x40054000 //< I2S0 +#define GPIO_PORTA_AHB_BASE 0x40058000 //< GPIO Port A (high speed) +#define GPIO_PORTB_AHB_BASE 0x40059000 //< GPIO Port B (high speed) +#define GPIO_PORTC_AHB_BASE 0x4005A000 //< GPIO Port C (high speed) +#define GPIO_PORTD_AHB_BASE 0x4005B000 //< GPIO Port D (high speed) +#define GPIO_PORTE_AHB_BASE 0x4005C000 //< GPIO Port E (high speed) +#define GPIO_PORTF_AHB_BASE 0x4005D000 //< GPIO Port F (high speed) +#define GPIO_PORTG_AHB_BASE 0x4005E000 //< GPIO Port G (high speed) +#define GPIO_PORTH_AHB_BASE 0x4005F000 //< GPIO Port H (high speed) +#define GPIO_PORTJ_AHB_BASE 0x40060000 //< GPIO Port J (high speed) +#define EPI0_BASE 0x400D0000 //< EPI0 +#define HIB_BASE 0x400FC000 //< Hibernation Module +#define FLASH_CTRL_BASE 0x400FD000 //< FLASH Controller +#define SYSCTL_BASE 0x400FE000 //< System Control +#define UDMA_BASE 0x400FF000 //< uDMA Controller +#define ITM_BASE 0xE0000000 //< Instrumentation Trace Macrocell +#define DWT_BASE 0xE0001000 //< Data Watchpoint and Trace +#define FPB_BASE 0xE0002000 //< FLASH Patch and Breakpoint +#define NVIC_BASE 0xE000E000 //< Nested Vectored Interrupt Ctrl +#define TPIU_BASE 0xE0040000 //< Trace Port Interface Unit +/*\}*/ + +/** + * The following definitions are deprecated. + */ +/*\{*/ +#ifndef DEPRECATED +/*\}*/ + +#define WATCHDOG_BASE 0x40000000 //< Watchdog +#define SSI_BASE 0x40008000 //< SSI +#define I2C_MASTER_BASE 0x40020000 //< I2C Master +#define I2C_SLAVE_BASE 0x40020800 //< I2C Slave +#define QEI_BASE 0x4002C000 //< QEI +#define ADC_BASE 0x40038000 //< ADC + +#endif /* DEPRECATED */ + +#endif /* LM3S_MEMMAP_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_nvic.h b/bertos/cpu/cortex-m3/io/lm3s_nvic.h new file mode 100644 index 0000000..08cc5ab --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_nvic.h @@ -0,0 +1,1037 @@ +/** + * \file + * + * + * \brief LM3S1968 NVIC hardware. + */ + +#ifndef LM3S_NVIC_H +#define LM3S_NVIC_H + +/** + * The following are defines for the NVIC register addresses. + */ +/*\{*/ +#define NVIC_INT_TYPE 0xE000E004 ///< Interrupt Controller Type Reg +#define NVIC_ST_CTRL 0xE000E010 ///< SysTick Control and Status Reg +#define NVIC_ST_RELOAD 0xE000E014 ///< SysTick Reload Value Register +#define NVIC_ST_CURRENT 0xE000E018 ///< SysTick Current Value Register +#define NVIC_ST_CAL 0xE000E01C ///< SysTick Calibration Value Reg +#define NVIC_EN0 0xE000E100 ///< IRQ 0 to 31 Set Enable Register +#define NVIC_EN1 0xE000E104 ///< IRQ 32 to 63 Set Enable Register +#define NVIC_DIS0 0xE000E180 ///< IRQ 0 to 31 Clear Enable Reg +#define NVIC_DIS1 0xE000E184 ///< IRQ 32 to 63 Clear Enable Reg +#define NVIC_PEND0 0xE000E200 ///< IRQ 0 to 31 Set Pending Register +#define NVIC_PEND1 0xE000E204 ///< IRQ 32 to 63 Set Pending Reg +#define NVIC_UNPEND0 0xE000E280 ///< IRQ 0 to 31 Clear Pending Reg +#define NVIC_UNPEND1 0xE000E284 ///< IRQ 32 to 63 Clear Pending Reg +#define NVIC_ACTIVE0 0xE000E300 ///< IRQ 0 to 31 Active Register +#define NVIC_ACTIVE1 0xE000E304 ///< IRQ 32 to 63 Active Register +#define NVIC_PRI0 0xE000E400 ///< IRQ 0 to 3 Priority Register +#define NVIC_PRI1 0xE000E404 ///< IRQ 4 to 7 Priority Register +#define NVIC_PRI2 0xE000E408 ///< IRQ 8 to 11 Priority Register +#define NVIC_PRI3 0xE000E40C ///< IRQ 12 to 15 Priority Register +#define NVIC_PRI4 0xE000E410 ///< IRQ 16 to 19 Priority Register +#define NVIC_PRI5 0xE000E414 ///< IRQ 20 to 23 Priority Register +#define NVIC_PRI6 0xE000E418 ///< IRQ 24 to 27 Priority Register +#define NVIC_PRI7 0xE000E41C ///< IRQ 28 to 31 Priority Register +#define NVIC_PRI8 0xE000E420 ///< IRQ 32 to 35 Priority Register +#define NVIC_PRI9 0xE000E424 ///< IRQ 36 to 39 Priority Register +#define NVIC_PRI10 0xE000E428 ///< IRQ 40 to 43 Priority Register +#define NVIC_PRI11 0xE000E42C ///< IRQ 44 to 47 Priority Register +#define NVIC_PRI12 0xE000E430 ///< IRQ 48 to 51 Priority Register +#define NVIC_PRI13 0xE000E434 ///< IRQ 52 to 55 Priority Register +#define NVIC_CPUID 0xE000ED00 ///< CPUID Base Register +#define NVIC_INT_CTRL 0xE000ED04 ///< Interrupt Control State Register +#define NVIC_VTABLE 0xE000ED08 ///< Vector Table Offset Register +#define NVIC_APINT 0xE000ED0C ///< App. Int & Reset Control Reg +#define NVIC_SYS_CTRL 0xE000ED10 ///< System Control Register +#define NVIC_CFG_CTRL 0xE000ED14 ///< Configuration Control Register +#define NVIC_SYS_PRI1 0xE000ED18 ///< Sys. Handlers 4 to 7 Priority +#define NVIC_SYS_PRI2 0xE000ED1C ///< Sys. Handlers 8 to 11 Priority +#define NVIC_SYS_PRI3 0xE000ED20 ///< Sys. Handlers 12 to 15 Priority +#define NVIC_SYS_HND_CTRL 0xE000ED24 ///< System Handler Control and State +#define NVIC_FAULT_STAT 0xE000ED28 ///< Configurable Fault Status Reg +#define NVIC_HFAULT_STAT 0xE000ED2C ///< Hard Fault Status Register +#define NVIC_DEBUG_STAT 0xE000ED30 ///< Debug Status Register +#define NVIC_MM_ADDR 0xE000ED34 ///< Mem Manage Address Register +#define NVIC_FAULT_ADDR 0xE000ED38 ///< Bus Fault Address Register +#define NVIC_MPU_TYPE 0xE000ED90 ///< MPU Type Register +#define NVIC_MPU_CTRL 0xE000ED94 ///< MPU Control Register +#define NVIC_MPU_NUMBER 0xE000ED98 ///< MPU Region Number Register +#define NVIC_MPU_BASE 0xE000ED9C ///< MPU Region Base Address Register +#define NVIC_MPU_ATTR 0xE000EDA0 ///< MPU Region Attribute & Size Reg +#define NVIC_DBG_CTRL 0xE000EDF0 ///< Debug Control and Status Reg +#define NVIC_DBG_XFER 0xE000EDF4 ///< Debug Core Reg. Transfer Select +#define NVIC_DBG_DATA 0xE000EDF8 ///< Debug Core Register Data +#define NVIC_DBG_INT 0xE000EDFC ///< Debug Reset Interrupt Control +#define NVIC_SW_TRIG 0xE000EF00 ///< Software Trigger Interrupt Reg +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_TYPE register. + */ +/*\{*/ +#define NVIC_INT_TYPE_LINES_M 0x0000001F ///< Number of interrupt lines (x32) +#define NVIC_INT_TYPE_LINES_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CTRL register. + */ +/*\{*/ +#define NVIC_ST_CTRL_COUNT 0x00010000 ///< Count flag +#define NVIC_ST_CTRL_CLK_SRC 0x00000004 ///< Clock Source +#define NVIC_ST_CTRL_INTEN 0x00000002 ///< Interrupt enable +#define NVIC_ST_CTRL_ENABLE 0x00000001 ///< Counter mode +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_RELOAD register. + */ +/*\{*/ +#define NVIC_ST_RELOAD_M 0x00FFFFFF ///< Counter load value +#define NVIC_ST_RELOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CURRENT + * register. + */ +/*\{*/ +#define NVIC_ST_CURRENT_M 0x00FFFFFF ///< Counter current value +#define NVIC_ST_CURRENT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CAL register. + */ +/*\{*/ +#define NVIC_ST_CAL_NOREF 0x80000000 ///< No reference clock +#define NVIC_ST_CAL_SKEW 0x40000000 ///< Clock skew +#define NVIC_ST_CAL_ONEMS_M 0x00FFFFFF ///< 1ms reference value +#define NVIC_ST_CAL_ONEMS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN0 register. + */ +/*\{*/ +#define NVIC_EN0_INT31 0x80000000 ///< Interrupt 31 enable +#define NVIC_EN0_INT30 0x40000000 ///< Interrupt 30 enable +#define NVIC_EN0_INT29 0x20000000 ///< Interrupt 29 enable +#define NVIC_EN0_INT28 0x10000000 ///< Interrupt 28 enable +#define NVIC_EN0_INT27 0x08000000 ///< Interrupt 27 enable +#define NVIC_EN0_INT26 0x04000000 ///< Interrupt 26 enable +#define NVIC_EN0_INT25 0x02000000 ///< Interrupt 25 enable +#define NVIC_EN0_INT24 0x01000000 ///< Interrupt 24 enable +#define NVIC_EN0_INT23 0x00800000 ///< Interrupt 23 enable +#define NVIC_EN0_INT22 0x00400000 ///< Interrupt 22 enable +#define NVIC_EN0_INT21 0x00200000 ///< Interrupt 21 enable +#define NVIC_EN0_INT20 0x00100000 ///< Interrupt 20 enable +#define NVIC_EN0_INT19 0x00080000 ///< Interrupt 19 enable +#define NVIC_EN0_INT18 0x00040000 ///< Interrupt 18 enable +#define NVIC_EN0_INT17 0x00020000 ///< Interrupt 17 enable +#define NVIC_EN0_INT16 0x00010000 ///< Interrupt 16 enable +#define NVIC_EN0_INT15 0x00008000 ///< Interrupt 15 enable +#define NVIC_EN0_INT14 0x00004000 ///< Interrupt 14 enable +#define NVIC_EN0_INT13 0x00002000 ///< Interrupt 13 enable +#define NVIC_EN0_INT12 0x00001000 ///< Interrupt 12 enable +#define NVIC_EN0_INT11 0x00000800 ///< Interrupt 11 enable +#define NVIC_EN0_INT10 0x00000400 ///< Interrupt 10 enable +#define NVIC_EN0_INT9 0x00000200 ///< Interrupt 9 enable +#define NVIC_EN0_INT8 0x00000100 ///< Interrupt 8 enable +#define NVIC_EN0_INT7 0x00000080 ///< Interrupt 7 enable +#define NVIC_EN0_INT6 0x00000040 ///< Interrupt 6 enable +#define NVIC_EN0_INT5 0x00000020 ///< Interrupt 5 enable +#define NVIC_EN0_INT4 0x00000010 ///< Interrupt 4 enable +#define NVIC_EN0_INT3 0x00000008 ///< Interrupt 3 enable +#define NVIC_EN0_INT2 0x00000004 ///< Interrupt 2 enable +#define NVIC_EN0_INT1 0x00000002 ///< Interrupt 1 enable +#define NVIC_EN0_INT0 0x00000001 ///< Interrupt 0 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN1 register. + */ +/*\{*/ +#define NVIC_EN1_INT59 0x08000000 ///< Interrupt 59 enable +#define NVIC_EN1_INT58 0x04000000 ///< Interrupt 58 enable +#define NVIC_EN1_INT57 0x02000000 ///< Interrupt 57 enable +#define NVIC_EN1_INT56 0x01000000 ///< Interrupt 56 enable +#define NVIC_EN1_INT55 0x00800000 ///< Interrupt 55 enable +#define NVIC_EN1_INT54 0x00400000 ///< Interrupt 54 enable +#define NVIC_EN1_INT53 0x00200000 ///< Interrupt 53 enable +#define NVIC_EN1_INT52 0x00100000 ///< Interrupt 52 enable +#define NVIC_EN1_INT51 0x00080000 ///< Interrupt 51 enable +#define NVIC_EN1_INT50 0x00040000 ///< Interrupt 50 enable +#define NVIC_EN1_INT49 0x00020000 ///< Interrupt 49 enable +#define NVIC_EN1_INT48 0x00010000 ///< Interrupt 48 enable +#define NVIC_EN1_INT47 0x00008000 ///< Interrupt 47 enable +#define NVIC_EN1_INT46 0x00004000 ///< Interrupt 46 enable +#define NVIC_EN1_INT45 0x00002000 ///< Interrupt 45 enable +#define NVIC_EN1_INT44 0x00001000 ///< Interrupt 44 enable +#define NVIC_EN1_INT43 0x00000800 ///< Interrupt 43 enable +#define NVIC_EN1_INT42 0x00000400 ///< Interrupt 42 enable +#define NVIC_EN1_INT41 0x00000200 ///< Interrupt 41 enable +#define NVIC_EN1_INT40 0x00000100 ///< Interrupt 40 enable +#define NVIC_EN1_INT39 0x00000080 ///< Interrupt 39 enable +#define NVIC_EN1_INT38 0x00000040 ///< Interrupt 38 enable +#define NVIC_EN1_INT37 0x00000020 ///< Interrupt 37 enable +#define NVIC_EN1_INT36 0x00000010 ///< Interrupt 36 enable +#define NVIC_EN1_INT35 0x00000008 ///< Interrupt 35 enable +#define NVIC_EN1_INT34 0x00000004 ///< Interrupt 34 enable +#define NVIC_EN1_INT33 0x00000002 ///< Interrupt 33 enable +#define NVIC_EN1_INT32 0x00000001 ///< Interrupt 32 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS0 register. + */ +/*\{*/ +#define NVIC_DIS0_INT31 0x80000000 ///< Interrupt 31 disable +#define NVIC_DIS0_INT30 0x40000000 ///< Interrupt 30 disable +#define NVIC_DIS0_INT29 0x20000000 ///< Interrupt 29 disable +#define NVIC_DIS0_INT28 0x10000000 ///< Interrupt 28 disable +#define NVIC_DIS0_INT27 0x08000000 ///< Interrupt 27 disable +#define NVIC_DIS0_INT26 0x04000000 ///< Interrupt 26 disable +#define NVIC_DIS0_INT25 0x02000000 ///< Interrupt 25 disable +#define NVIC_DIS0_INT24 0x01000000 ///< Interrupt 24 disable +#define NVIC_DIS0_INT23 0x00800000 ///< Interrupt 23 disable +#define NVIC_DIS0_INT22 0x00400000 ///< Interrupt 22 disable +#define NVIC_DIS0_INT21 0x00200000 ///< Interrupt 21 disable +#define NVIC_DIS0_INT20 0x00100000 ///< Interrupt 20 disable +#define NVIC_DIS0_INT19 0x00080000 ///< Interrupt 19 disable +#define NVIC_DIS0_INT18 0x00040000 ///< Interrupt 18 disable +#define NVIC_DIS0_INT17 0x00020000 ///< Interrupt 17 disable +#define NVIC_DIS0_INT16 0x00010000 ///< Interrupt 16 disable +#define NVIC_DIS0_INT15 0x00008000 ///< Interrupt 15 disable +#define NVIC_DIS0_INT14 0x00004000 ///< Interrupt 14 disable +#define NVIC_DIS0_INT13 0x00002000 ///< Interrupt 13 disable +#define NVIC_DIS0_INT12 0x00001000 ///< Interrupt 12 disable +#define NVIC_DIS0_INT11 0x00000800 ///< Interrupt 11 disable +#define NVIC_DIS0_INT10 0x00000400 ///< Interrupt 10 disable +#define NVIC_DIS0_INT9 0x00000200 ///< Interrupt 9 disable +#define NVIC_DIS0_INT8 0x00000100 ///< Interrupt 8 disable +#define NVIC_DIS0_INT7 0x00000080 ///< Interrupt 7 disable +#define NVIC_DIS0_INT6 0x00000040 ///< Interrupt 6 disable +#define NVIC_DIS0_INT5 0x00000020 ///< Interrupt 5 disable +#define NVIC_DIS0_INT4 0x00000010 ///< Interrupt 4 disable +#define NVIC_DIS0_INT3 0x00000008 ///< Interrupt 3 disable +#define NVIC_DIS0_INT2 0x00000004 ///< Interrupt 2 disable +#define NVIC_DIS0_INT1 0x00000002 ///< Interrupt 1 disable +#define NVIC_DIS0_INT0 0x00000001 ///< Interrupt 0 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS1 register. + */ +/*\{*/ +#define NVIC_DIS1_INT59 0x08000000 ///< Interrupt 59 disable +#define NVIC_DIS1_INT58 0x04000000 ///< Interrupt 58 disable +#define NVIC_DIS1_INT57 0x02000000 ///< Interrupt 57 disable +#define NVIC_DIS1_INT56 0x01000000 ///< Interrupt 56 disable +#define NVIC_DIS1_INT55 0x00800000 ///< Interrupt 55 disable +#define NVIC_DIS1_INT54 0x00400000 ///< Interrupt 54 disable +#define NVIC_DIS1_INT53 0x00200000 ///< Interrupt 53 disable +#define NVIC_DIS1_INT52 0x00100000 ///< Interrupt 52 disable +#define NVIC_DIS1_INT51 0x00080000 ///< Interrupt 51 disable +#define NVIC_DIS1_INT50 0x00040000 ///< Interrupt 50 disable +#define NVIC_DIS1_INT49 0x00020000 ///< Interrupt 49 disable +#define NVIC_DIS1_INT48 0x00010000 ///< Interrupt 48 disable +#define NVIC_DIS1_INT47 0x00008000 ///< Interrupt 47 disable +#define NVIC_DIS1_INT46 0x00004000 ///< Interrupt 46 disable +#define NVIC_DIS1_INT45 0x00002000 ///< Interrupt 45 disable +#define NVIC_DIS1_INT44 0x00001000 ///< Interrupt 44 disable +#define NVIC_DIS1_INT43 0x00000800 ///< Interrupt 43 disable +#define NVIC_DIS1_INT42 0x00000400 ///< Interrupt 42 disable +#define NVIC_DIS1_INT41 0x00000200 ///< Interrupt 41 disable +#define NVIC_DIS1_INT40 0x00000100 ///< Interrupt 40 disable +#define NVIC_DIS1_INT39 0x00000080 ///< Interrupt 39 disable +#define NVIC_DIS1_INT38 0x00000040 ///< Interrupt 38 disable +#define NVIC_DIS1_INT37 0x00000020 ///< Interrupt 37 disable +#define NVIC_DIS1_INT36 0x00000010 ///< Interrupt 36 disable +#define NVIC_DIS1_INT35 0x00000008 ///< Interrupt 35 disable +#define NVIC_DIS1_INT34 0x00000004 ///< Interrupt 34 disable +#define NVIC_DIS1_INT33 0x00000002 ///< Interrupt 33 disable +#define NVIC_DIS1_INT32 0x00000001 ///< Interrupt 32 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND0 register. + */ +/*\{*/ +#define NVIC_PEND0_INT31 0x80000000 ///< Interrupt 31 pend +#define NVIC_PEND0_INT30 0x40000000 ///< Interrupt 30 pend +#define NVIC_PEND0_INT29 0x20000000 ///< Interrupt 29 pend +#define NVIC_PEND0_INT28 0x10000000 ///< Interrupt 28 pend +#define NVIC_PEND0_INT27 0x08000000 ///< Interrupt 27 pend +#define NVIC_PEND0_INT26 0x04000000 ///< Interrupt 26 pend +#define NVIC_PEND0_INT25 0x02000000 ///< Interrupt 25 pend +#define NVIC_PEND0_INT24 0x01000000 ///< Interrupt 24 pend +#define NVIC_PEND0_INT23 0x00800000 ///< Interrupt 23 pend +#define NVIC_PEND0_INT22 0x00400000 ///< Interrupt 22 pend +#define NVIC_PEND0_INT21 0x00200000 ///< Interrupt 21 pend +#define NVIC_PEND0_INT20 0x00100000 ///< Interrupt 20 pend +#define NVIC_PEND0_INT19 0x00080000 ///< Interrupt 19 pend +#define NVIC_PEND0_INT18 0x00040000 ///< Interrupt 18 pend +#define NVIC_PEND0_INT17 0x00020000 ///< Interrupt 17 pend +#define NVIC_PEND0_INT16 0x00010000 ///< Interrupt 16 pend +#define NVIC_PEND0_INT15 0x00008000 ///< Interrupt 15 pend +#define NVIC_PEND0_INT14 0x00004000 ///< Interrupt 14 pend +#define NVIC_PEND0_INT13 0x00002000 ///< Interrupt 13 pend +#define NVIC_PEND0_INT12 0x00001000 ///< Interrupt 12 pend +#define NVIC_PEND0_INT11 0x00000800 ///< Interrupt 11 pend +#define NVIC_PEND0_INT10 0x00000400 ///< Interrupt 10 pend +#define NVIC_PEND0_INT9 0x00000200 ///< Interrupt 9 pend +#define NVIC_PEND0_INT8 0x00000100 ///< Interrupt 8 pend +#define NVIC_PEND0_INT7 0x00000080 ///< Interrupt 7 pend +#define NVIC_PEND0_INT6 0x00000040 ///< Interrupt 6 pend +#define NVIC_PEND0_INT5 0x00000020 ///< Interrupt 5 pend +#define NVIC_PEND0_INT4 0x00000010 ///< Interrupt 4 pend +#define NVIC_PEND0_INT3 0x00000008 ///< Interrupt 3 pend +#define NVIC_PEND0_INT2 0x00000004 ///< Interrupt 2 pend +#define NVIC_PEND0_INT1 0x00000002 ///< Interrupt 1 pend +#define NVIC_PEND0_INT0 0x00000001 ///< Interrupt 0 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND1 register. + */ +/*\{*/ +#define NVIC_PEND1_INT59 0x08000000 ///< Interrupt 59 pend +#define NVIC_PEND1_INT58 0x04000000 ///< Interrupt 58 pend +#define NVIC_PEND1_INT57 0x02000000 ///< Interrupt 57 pend +#define NVIC_PEND1_INT56 0x01000000 ///< Interrupt 56 pend +#define NVIC_PEND1_INT55 0x00800000 ///< Interrupt 55 pend +#define NVIC_PEND1_INT54 0x00400000 ///< Interrupt 54 pend +#define NVIC_PEND1_INT53 0x00200000 ///< Interrupt 53 pend +#define NVIC_PEND1_INT52 0x00100000 ///< Interrupt 52 pend +#define NVIC_PEND1_INT51 0x00080000 ///< Interrupt 51 pend +#define NVIC_PEND1_INT50 0x00040000 ///< Interrupt 50 pend +#define NVIC_PEND1_INT49 0x00020000 ///< Interrupt 49 pend +#define NVIC_PEND1_INT48 0x00010000 ///< Interrupt 48 pend +#define NVIC_PEND1_INT47 0x00008000 ///< Interrupt 47 pend +#define NVIC_PEND1_INT46 0x00004000 ///< Interrupt 46 pend +#define NVIC_PEND1_INT45 0x00002000 ///< Interrupt 45 pend +#define NVIC_PEND1_INT44 0x00001000 ///< Interrupt 44 pend +#define NVIC_PEND1_INT43 0x00000800 ///< Interrupt 43 pend +#define NVIC_PEND1_INT42 0x00000400 ///< Interrupt 42 pend +#define NVIC_PEND1_INT41 0x00000200 ///< Interrupt 41 pend +#define NVIC_PEND1_INT40 0x00000100 ///< Interrupt 40 pend +#define NVIC_PEND1_INT39 0x00000080 ///< Interrupt 39 pend +#define NVIC_PEND1_INT38 0x00000040 ///< Interrupt 38 pend +#define NVIC_PEND1_INT37 0x00000020 ///< Interrupt 37 pend +#define NVIC_PEND1_INT36 0x00000010 ///< Interrupt 36 pend +#define NVIC_PEND1_INT35 0x00000008 ///< Interrupt 35 pend +#define NVIC_PEND1_INT34 0x00000004 ///< Interrupt 34 pend +#define NVIC_PEND1_INT33 0x00000002 ///< Interrupt 33 pend +#define NVIC_PEND1_INT32 0x00000001 ///< Interrupt 32 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND0 register. + */ +/*\{*/ +#define NVIC_UNPEND0_INT31 0x80000000 ///< Interrupt 31 unpend +#define NVIC_UNPEND0_INT30 0x40000000 ///< Interrupt 30 unpend +#define NVIC_UNPEND0_INT29 0x20000000 ///< Interrupt 29 unpend +#define NVIC_UNPEND0_INT28 0x10000000 ///< Interrupt 28 unpend +#define NVIC_UNPEND0_INT27 0x08000000 ///< Interrupt 27 unpend +#define NVIC_UNPEND0_INT26 0x04000000 ///< Interrupt 26 unpend +#define NVIC_UNPEND0_INT25 0x02000000 ///< Interrupt 25 unpend +#define NVIC_UNPEND0_INT24 0x01000000 ///< Interrupt 24 unpend +#define NVIC_UNPEND0_INT23 0x00800000 ///< Interrupt 23 unpend +#define NVIC_UNPEND0_INT22 0x00400000 ///< Interrupt 22 unpend +#define NVIC_UNPEND0_INT21 0x00200000 ///< Interrupt 21 unpend +#define NVIC_UNPEND0_INT20 0x00100000 ///< Interrupt 20 unpend +#define NVIC_UNPEND0_INT19 0x00080000 ///< Interrupt 19 unpend +#define NVIC_UNPEND0_INT18 0x00040000 ///< Interrupt 18 unpend +#define NVIC_UNPEND0_INT17 0x00020000 ///< Interrupt 17 unpend +#define NVIC_UNPEND0_INT16 0x00010000 ///< Interrupt 16 unpend +#define NVIC_UNPEND0_INT15 0x00008000 ///< Interrupt 15 unpend +#define NVIC_UNPEND0_INT14 0x00004000 ///< Interrupt 14 unpend +#define NVIC_UNPEND0_INT13 0x00002000 ///< Interrupt 13 unpend +#define NVIC_UNPEND0_INT12 0x00001000 ///< Interrupt 12 unpend +#define NVIC_UNPEND0_INT11 0x00000800 ///< Interrupt 11 unpend +#define NVIC_UNPEND0_INT10 0x00000400 ///< Interrupt 10 unpend +#define NVIC_UNPEND0_INT9 0x00000200 ///< Interrupt 9 unpend +#define NVIC_UNPEND0_INT8 0x00000100 ///< Interrupt 8 unpend +#define NVIC_UNPEND0_INT7 0x00000080 ///< Interrupt 7 unpend +#define NVIC_UNPEND0_INT6 0x00000040 ///< Interrupt 6 unpend +#define NVIC_UNPEND0_INT5 0x00000020 ///< Interrupt 5 unpend +#define NVIC_UNPEND0_INT4 0x00000010 ///< Interrupt 4 unpend +#define NVIC_UNPEND0_INT3 0x00000008 ///< Interrupt 3 unpend +#define NVIC_UNPEND0_INT2 0x00000004 ///< Interrupt 2 unpend +#define NVIC_UNPEND0_INT1 0x00000002 ///< Interrupt 1 unpend +#define NVIC_UNPEND0_INT0 0x00000001 ///< Interrupt 0 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND1 register. + */ +/*\{*/ +#define NVIC_UNPEND1_INT59 0x08000000 ///< Interrupt 59 unpend +#define NVIC_UNPEND1_INT58 0x04000000 ///< Interrupt 58 unpend +#define NVIC_UNPEND1_INT57 0x02000000 ///< Interrupt 57 unpend +#define NVIC_UNPEND1_INT56 0x01000000 ///< Interrupt 56 unpend +#define NVIC_UNPEND1_INT55 0x00800000 ///< Interrupt 55 unpend +#define NVIC_UNPEND1_INT54 0x00400000 ///< Interrupt 54 unpend +#define NVIC_UNPEND1_INT53 0x00200000 ///< Interrupt 53 unpend +#define NVIC_UNPEND1_INT52 0x00100000 ///< Interrupt 52 unpend +#define NVIC_UNPEND1_INT51 0x00080000 ///< Interrupt 51 unpend +#define NVIC_UNPEND1_INT50 0x00040000 ///< Interrupt 50 unpend +#define NVIC_UNPEND1_INT49 0x00020000 ///< Interrupt 49 unpend +#define NVIC_UNPEND1_INT48 0x00010000 ///< Interrupt 48 unpend +#define NVIC_UNPEND1_INT47 0x00008000 ///< Interrupt 47 unpend +#define NVIC_UNPEND1_INT46 0x00004000 ///< Interrupt 46 unpend +#define NVIC_UNPEND1_INT45 0x00002000 ///< Interrupt 45 unpend +#define NVIC_UNPEND1_INT44 0x00001000 ///< Interrupt 44 unpend +#define NVIC_UNPEND1_INT43 0x00000800 ///< Interrupt 43 unpend +#define NVIC_UNPEND1_INT42 0x00000400 ///< Interrupt 42 unpend +#define NVIC_UNPEND1_INT41 0x00000200 ///< Interrupt 41 unpend +#define NVIC_UNPEND1_INT40 0x00000100 ///< Interrupt 40 unpend +#define NVIC_UNPEND1_INT39 0x00000080 ///< Interrupt 39 unpend +#define NVIC_UNPEND1_INT38 0x00000040 ///< Interrupt 38 unpend +#define NVIC_UNPEND1_INT37 0x00000020 ///< Interrupt 37 unpend +#define NVIC_UNPEND1_INT36 0x00000010 ///< Interrupt 36 unpend +#define NVIC_UNPEND1_INT35 0x00000008 ///< Interrupt 35 unpend +#define NVIC_UNPEND1_INT34 0x00000004 ///< Interrupt 34 unpend +#define NVIC_UNPEND1_INT33 0x00000002 ///< Interrupt 33 unpend +#define NVIC_UNPEND1_INT32 0x00000001 ///< Interrupt 32 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE0 register. + */ +/*\{*/ +#define NVIC_ACTIVE0_INT31 0x80000000 ///< Interrupt 31 active +#define NVIC_ACTIVE0_INT30 0x40000000 ///< Interrupt 30 active +#define NVIC_ACTIVE0_INT29 0x20000000 ///< Interrupt 29 active +#define NVIC_ACTIVE0_INT28 0x10000000 ///< Interrupt 28 active +#define NVIC_ACTIVE0_INT27 0x08000000 ///< Interrupt 27 active +#define NVIC_ACTIVE0_INT26 0x04000000 ///< Interrupt 26 active +#define NVIC_ACTIVE0_INT25 0x02000000 ///< Interrupt 25 active +#define NVIC_ACTIVE0_INT24 0x01000000 ///< Interrupt 24 active +#define NVIC_ACTIVE0_INT23 0x00800000 ///< Interrupt 23 active +#define NVIC_ACTIVE0_INT22 0x00400000 ///< Interrupt 22 active +#define NVIC_ACTIVE0_INT21 0x00200000 ///< Interrupt 21 active +#define NVIC_ACTIVE0_INT20 0x00100000 ///< Interrupt 20 active +#define NVIC_ACTIVE0_INT19 0x00080000 ///< Interrupt 19 active +#define NVIC_ACTIVE0_INT18 0x00040000 ///< Interrupt 18 active +#define NVIC_ACTIVE0_INT17 0x00020000 ///< Interrupt 17 active +#define NVIC_ACTIVE0_INT16 0x00010000 ///< Interrupt 16 active +#define NVIC_ACTIVE0_INT15 0x00008000 ///< Interrupt 15 active +#define NVIC_ACTIVE0_INT14 0x00004000 ///< Interrupt 14 active +#define NVIC_ACTIVE0_INT13 0x00002000 ///< Interrupt 13 active +#define NVIC_ACTIVE0_INT12 0x00001000 ///< Interrupt 12 active +#define NVIC_ACTIVE0_INT11 0x00000800 ///< Interrupt 11 active +#define NVIC_ACTIVE0_INT10 0x00000400 ///< Interrupt 10 active +#define NVIC_ACTIVE0_INT9 0x00000200 ///< Interrupt 9 active +#define NVIC_ACTIVE0_INT8 0x00000100 ///< Interrupt 8 active +#define NVIC_ACTIVE0_INT7 0x00000080 ///< Interrupt 7 active +#define NVIC_ACTIVE0_INT6 0x00000040 ///< Interrupt 6 active +#define NVIC_ACTIVE0_INT5 0x00000020 ///< Interrupt 5 active +#define NVIC_ACTIVE0_INT4 0x00000010 ///< Interrupt 4 active +#define NVIC_ACTIVE0_INT3 0x00000008 ///< Interrupt 3 active +#define NVIC_ACTIVE0_INT2 0x00000004 ///< Interrupt 2 active +#define NVIC_ACTIVE0_INT1 0x00000002 ///< Interrupt 1 active +#define NVIC_ACTIVE0_INT0 0x00000001 ///< Interrupt 0 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE1 register. + */ +/*\{*/ +#define NVIC_ACTIVE1_INT59 0x08000000 ///< Interrupt 59 active +#define NVIC_ACTIVE1_INT58 0x04000000 ///< Interrupt 58 active +#define NVIC_ACTIVE1_INT57 0x02000000 ///< Interrupt 57 active +#define NVIC_ACTIVE1_INT56 0x01000000 ///< Interrupt 56 active +#define NVIC_ACTIVE1_INT55 0x00800000 ///< Interrupt 55 active +#define NVIC_ACTIVE1_INT54 0x00400000 ///< Interrupt 54 active +#define NVIC_ACTIVE1_INT53 0x00200000 ///< Interrupt 53 active +#define NVIC_ACTIVE1_INT52 0x00100000 ///< Interrupt 52 active +#define NVIC_ACTIVE1_INT51 0x00080000 ///< Interrupt 51 active +#define NVIC_ACTIVE1_INT50 0x00040000 ///< Interrupt 50 active +#define NVIC_ACTIVE1_INT49 0x00020000 ///< Interrupt 49 active +#define NVIC_ACTIVE1_INT48 0x00010000 ///< Interrupt 48 active +#define NVIC_ACTIVE1_INT47 0x00008000 ///< Interrupt 47 active +#define NVIC_ACTIVE1_INT46 0x00004000 ///< Interrupt 46 active +#define NVIC_ACTIVE1_INT45 0x00002000 ///< Interrupt 45 active +#define NVIC_ACTIVE1_INT44 0x00001000 ///< Interrupt 44 active +#define NVIC_ACTIVE1_INT43 0x00000800 ///< Interrupt 43 active +#define NVIC_ACTIVE1_INT42 0x00000400 ///< Interrupt 42 active +#define NVIC_ACTIVE1_INT41 0x00000200 ///< Interrupt 41 active +#define NVIC_ACTIVE1_INT40 0x00000100 ///< Interrupt 40 active +#define NVIC_ACTIVE1_INT39 0x00000080 ///< Interrupt 39 active +#define NVIC_ACTIVE1_INT38 0x00000040 ///< Interrupt 38 active +#define NVIC_ACTIVE1_INT37 0x00000020 ///< Interrupt 37 active +#define NVIC_ACTIVE1_INT36 0x00000010 ///< Interrupt 36 active +#define NVIC_ACTIVE1_INT35 0x00000008 ///< Interrupt 35 active +#define NVIC_ACTIVE1_INT34 0x00000004 ///< Interrupt 34 active +#define NVIC_ACTIVE1_INT33 0x00000002 ///< Interrupt 33 active +#define NVIC_ACTIVE1_INT32 0x00000001 ///< Interrupt 32 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI0 register. + */ +/*\{*/ +#define NVIC_PRI0_INT3_M 0xFF000000 ///< Interrupt 3 priority mask +#define NVIC_PRI0_INT2_M 0x00FF0000 ///< Interrupt 2 priority mask +#define NVIC_PRI0_INT1_M 0x0000FF00 ///< Interrupt 1 priority mask +#define NVIC_PRI0_INT0_M 0x000000FF ///< Interrupt 0 priority mask +#define NVIC_PRI0_INT3_S 24 +#define NVIC_PRI0_INT2_S 16 +#define NVIC_PRI0_INT1_S 8 +#define NVIC_PRI0_INT0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI1 register. + */ +/*\{*/ +#define NVIC_PRI1_INT7_M 0xFF000000 ///< Interrupt 7 priority mask +#define NVIC_PRI1_INT6_M 0x00FF0000 ///< Interrupt 6 priority mask +#define NVIC_PRI1_INT5_M 0x0000FF00 ///< Interrupt 5 priority mask +#define NVIC_PRI1_INT4_M 0x000000FF ///< Interrupt 4 priority mask +#define NVIC_PRI1_INT7_S 24 +#define NVIC_PRI1_INT6_S 16 +#define NVIC_PRI1_INT5_S 8 +#define NVIC_PRI1_INT4_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI2 register. + */ +/*\{*/ +#define NVIC_PRI2_INT11_M 0xFF000000 ///< Interrupt 11 priority mask +#define NVIC_PRI2_INT10_M 0x00FF0000 ///< Interrupt 10 priority mask +#define NVIC_PRI2_INT9_M 0x0000FF00 ///< Interrupt 9 priority mask +#define NVIC_PRI2_INT8_M 0x000000FF ///< Interrupt 8 priority mask +#define NVIC_PRI2_INT11_S 24 +#define NVIC_PRI2_INT10_S 16 +#define NVIC_PRI2_INT9_S 8 +#define NVIC_PRI2_INT8_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI3 register. + */ +/*\{*/ +#define NVIC_PRI3_INT15_M 0xFF000000 ///< Interrupt 15 priority mask +#define NVIC_PRI3_INT14_M 0x00FF0000 ///< Interrupt 14 priority mask +#define NVIC_PRI3_INT13_M 0x0000FF00 ///< Interrupt 13 priority mask +#define NVIC_PRI3_INT12_M 0x000000FF ///< Interrupt 12 priority mask +#define NVIC_PRI3_INT15_S 24 +#define NVIC_PRI3_INT14_S 16 +#define NVIC_PRI3_INT13_S 8 +#define NVIC_PRI3_INT12_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI4 register. + */ +/*\{*/ +#define NVIC_PRI4_INT19_M 0xFF000000 ///< Interrupt 19 priority mask +#define NVIC_PRI4_INT18_M 0x00FF0000 ///< Interrupt 18 priority mask +#define NVIC_PRI4_INT17_M 0x0000FF00 ///< Interrupt 17 priority mask +#define NVIC_PRI4_INT16_M 0x000000FF ///< Interrupt 16 priority mask +#define NVIC_PRI4_INT19_S 24 +#define NVIC_PRI4_INT18_S 16 +#define NVIC_PRI4_INT17_S 8 +#define NVIC_PRI4_INT16_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI5 register. + */ +/*\{*/ +#define NVIC_PRI5_INT23_M 0xFF000000 ///< Interrupt 23 priority mask +#define NVIC_PRI5_INT22_M 0x00FF0000 ///< Interrupt 22 priority mask +#define NVIC_PRI5_INT21_M 0x0000FF00 ///< Interrupt 21 priority mask +#define NVIC_PRI5_INT20_M 0x000000FF ///< Interrupt 20 priority mask +#define NVIC_PRI5_INT23_S 24 +#define NVIC_PRI5_INT22_S 16 +#define NVIC_PRI5_INT21_S 8 +#define NVIC_PRI5_INT20_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI6 register. + */ +/*\{*/ +#define NVIC_PRI6_INT27_M 0xFF000000 ///< Interrupt 27 priority mask +#define NVIC_PRI6_INT26_M 0x00FF0000 ///< Interrupt 26 priority mask +#define NVIC_PRI6_INT25_M 0x0000FF00 ///< Interrupt 25 priority mask +#define NVIC_PRI6_INT24_M 0x000000FF ///< Interrupt 24 priority mask +#define NVIC_PRI6_INT27_S 24 +#define NVIC_PRI6_INT26_S 16 +#define NVIC_PRI6_INT25_S 8 +#define NVIC_PRI6_INT24_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI7 register. + */ +/*\{*/ +#define NVIC_PRI7_INT31_M 0xFF000000 ///< Interrupt 31 priority mask +#define NVIC_PRI7_INT30_M 0x00FF0000 ///< Interrupt 30 priority mask +#define NVIC_PRI7_INT29_M 0x0000FF00 ///< Interrupt 29 priority mask +#define NVIC_PRI7_INT28_M 0x000000FF ///< Interrupt 28 priority mask +#define NVIC_PRI7_INT31_S 24 +#define NVIC_PRI7_INT30_S 16 +#define NVIC_PRI7_INT29_S 8 +#define NVIC_PRI7_INT28_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI8 register. + */ +/*\{*/ +#define NVIC_PRI8_INT35_M 0xFF000000 ///< Interrupt 35 priority mask +#define NVIC_PRI8_INT34_M 0x00FF0000 ///< Interrupt 34 priority mask +#define NVIC_PRI8_INT33_M 0x0000FF00 ///< Interrupt 33 priority mask +#define NVIC_PRI8_INT32_M 0x000000FF ///< Interrupt 32 priority mask +#define NVIC_PRI8_INT35_S 24 +#define NVIC_PRI8_INT34_S 16 +#define NVIC_PRI8_INT33_S 8 +#define NVIC_PRI8_INT32_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI9 register. + */ +/*\{*/ +#define NVIC_PRI9_INT39_M 0xFF000000 ///< Interrupt 39 priority mask +#define NVIC_PRI9_INT38_M 0x00FF0000 ///< Interrupt 38 priority mask +#define NVIC_PRI9_INT37_M 0x0000FF00 ///< Interrupt 37 priority mask +#define NVIC_PRI9_INT36_M 0x000000FF ///< Interrupt 36 priority mask +#define NVIC_PRI9_INT39_S 24 +#define NVIC_PRI9_INT38_S 16 +#define NVIC_PRI9_INT37_S 8 +#define NVIC_PRI9_INT36_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI10 register. + */ +/*\{*/ +#define NVIC_PRI10_INT43_M 0xFF000000 ///< Interrupt 43 priority mask +#define NVIC_PRI10_INT42_M 0x00FF0000 ///< Interrupt 42 priority mask +#define NVIC_PRI10_INT41_M 0x0000FF00 ///< Interrupt 41 priority mask +#define NVIC_PRI10_INT40_M 0x000000FF ///< Interrupt 40 priority mask +#define NVIC_PRI10_INT43_S 24 +#define NVIC_PRI10_INT42_S 16 +#define NVIC_PRI10_INT41_S 8 +#define NVIC_PRI10_INT40_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CPUID register. + */ +/*\{*/ +#define NVIC_CPUID_IMP_M 0xFF000000 ///< Implementer +#define NVIC_CPUID_VAR_M 0x00F00000 ///< Variant +#define NVIC_CPUID_PARTNO_M 0x0000FFF0 ///< Processor part number +#define NVIC_CPUID_REV_M 0x0000000F ///< Revision +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_CTRL register. + */ +/*\{*/ +#define NVIC_INT_CTRL_NMI_SET 0x80000000 ///< Pend a NMI +#define NVIC_INT_CTRL_PEND_SV 0x10000000 ///< Pend a PendSV +#define NVIC_INT_CTRL_UNPEND_SV 0x08000000 ///< Unpend a PendSV +#define NVIC_INT_CTRL_PENDSTSET 0x04000000 ///< Set pending SysTick interrupt +#define NVIC_INT_CTRL_PENDSTCLR 0x02000000 ///< Clear pending SysTick interrupt +#define NVIC_INT_CTRL_ISR_PRE 0x00800000 ///< Debug interrupt handling +#define NVIC_INT_CTRL_ISR_PEND 0x00400000 ///< Debug interrupt pending +#define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000 ///< Highest pending exception +#define NVIC_INT_CTRL_RET_BASE 0x00000800 ///< Return to base +#define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF ///< Current active exception +#define NVIC_INT_CTRL_VEC_PEN_S 12 +#define NVIC_INT_CTRL_VEC_ACT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_VTABLE register. + */ +/*\{*/ +#define NVIC_VTABLE_BASE 0x20000000 ///< Vector table base +#define NVIC_VTABLE_OFFSET_M 0x1FFFFF00 ///< Vector table offset +#define NVIC_VTABLE_OFFSET_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_APINT register. + */ +/*\{*/ +#define NVIC_APINT_VECTKEY_M 0xFFFF0000 ///< Vector key mask +#define NVIC_APINT_VECTKEY 0x05FA0000 ///< Vector key +#define NVIC_APINT_ENDIANESS 0x00008000 ///< Data endianess +#define NVIC_APINT_PRIGROUP_M 0x00000700 ///< Priority group +#define NVIC_APINT_PRIGROUP_0_8 0x00000700 ///< Priority group 0.8 split +#define NVIC_APINT_PRIGROUP_1_7 0x00000600 ///< Priority group 1.7 split +#define NVIC_APINT_PRIGROUP_2_6 0x00000500 ///< Priority group 2.6 split +#define NVIC_APINT_PRIGROUP_3_5 0x00000400 ///< Priority group 3.5 split +#define NVIC_APINT_PRIGROUP_4_4 0x00000300 ///< Priority group 4.4 split +#define NVIC_APINT_PRIGROUP_5_3 0x00000200 ///< Priority group 5.3 split +#define NVIC_APINT_PRIGROUP_6_2 0x00000100 ///< Priority group 6.2 split +#define NVIC_APINT_SYSRESETREQ 0x00000004 ///< System reset request +#define NVIC_APINT_VECT_CLR_ACT 0x00000002 ///< Clear active NMI/fault info +#define NVIC_APINT_VECT_RESET 0x00000001 ///< System reset +#define NVIC_APINT_PRIGROUP_7_1 0x00000000 ///< Priority group 7.1 split +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_CTRL register. + */ +/*\{*/ +#define NVIC_SYS_CTRL_SEVONPEND 0x00000010 ///< Wakeup on pend +#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004 ///< Deep sleep enable +#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002 ///< Sleep on ISR exit +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CFG_CTRL register. + */ +/*\{*/ +#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100 ///< Ignore bus fault in NMI/fault +#define NVIC_CFG_CTRL_DIV0 0x00000010 ///< Trap on divide by 0 +#define NVIC_CFG_CTRL_UNALIGNED 0x00000008 ///< Trap on unaligned access +#define NVIC_CFG_CTRL_DEEP_PEND 0x00000004 ///< Allow deep interrupt trigger +#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002 ///< Allow main interrupt trigger +#define NVIC_CFG_CTRL_BASE_THR 0x00000001 ///< Thread state control +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI1 register. + */ +/*\{*/ +#define NVIC_SYS_PRI1_RES_M 0xFF000000 ///< Priority of reserved handler +#define NVIC_SYS_PRI1_USAGE_M 0x00FF0000 ///< Priority of usage fault handler +#define NVIC_SYS_PRI1_BUS_M 0x0000FF00 ///< Priority of bus fault handler +#define NVIC_SYS_PRI1_MEM_M 0x000000FF ///< Priority of mem manage handler +#define NVIC_SYS_PRI1_USAGE_S 16 +#define NVIC_SYS_PRI1_BUS_S 8 +#define NVIC_SYS_PRI1_MEM_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI2 register. + */ +/*\{*/ +#define NVIC_SYS_PRI2_SVC_M 0xFF000000 ///< Priority of SVCall handler +#define NVIC_SYS_PRI2_RES_M 0x00FFFFFF ///< Priority of reserved handlers +#define NVIC_SYS_PRI2_SVC_S 24 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI3 register. + */ +/*\{*/ +#define NVIC_SYS_PRI3_TICK_M 0xFF000000 ///< Priority of Sys Tick handler +#define NVIC_SYS_PRI3_PENDSV_M 0x00FF0000 ///< Priority of PendSV handler +#define NVIC_SYS_PRI3_RES_M 0x0000FF00 ///< Priority of reserved handler +#define NVIC_SYS_PRI3_DEBUG_M 0x000000FF ///< Priority of debug handler +#define NVIC_SYS_PRI3_TICK_S 24 +#define NVIC_SYS_PRI3_PENDSV_S 16 +#define NVIC_SYS_PRI3_DEBUG_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_HND_CTRL + * register. + */ +/*\{*/ +#define NVIC_SYS_HND_CTRL_USAGE 0x00040000 ///< Usage fault enable +#define NVIC_SYS_HND_CTRL_BUS 0x00020000 ///< Bus fault enable +#define NVIC_SYS_HND_CTRL_MEM 0x00010000 ///< Mem manage fault enable +#define NVIC_SYS_HND_CTRL_SVC 0x00008000 ///< SVCall is pended +#define NVIC_SYS_HND_CTRL_BUSP 0x00004000 ///< Bus fault is pended +#define NVIC_SYS_HND_CTRL_TICK 0x00000800 ///< Sys tick is active +#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400 ///< PendSV is active +#define NVIC_SYS_HND_CTRL_MON 0x00000100 ///< Monitor is active +#define NVIC_SYS_HND_CTRL_SVCA 0x00000080 ///< SVCall is active +#define NVIC_SYS_HND_CTRL_USGA 0x00000008 ///< Usage fault is active +#define NVIC_SYS_HND_CTRL_BUSA 0x00000002 ///< Bus fault is active +#define NVIC_SYS_HND_CTRL_MEMA 0x00000001 ///< Mem manage is active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_STAT + * register. + */ +/*\{*/ +#define NVIC_FAULT_STAT_DIV0 0x02000000 ///< Divide by zero fault +#define NVIC_FAULT_STAT_UNALIGN 0x01000000 ///< Unaligned access fault +#define NVIC_FAULT_STAT_NOCP 0x00080000 ///< No coprocessor fault +#define NVIC_FAULT_STAT_INVPC 0x00040000 ///< Invalid PC fault +#define NVIC_FAULT_STAT_INVSTAT 0x00020000 ///< Invalid state fault +#define NVIC_FAULT_STAT_UNDEF 0x00010000 ///< Undefined instruction fault +#define NVIC_FAULT_STAT_BFARV 0x00008000 ///< BFAR is valid +#define NVIC_FAULT_STAT_BSTKE 0x00001000 ///< Stack bus fault +#define NVIC_FAULT_STAT_BUSTKE 0x00000800 ///< Unstack bus fault +#define NVIC_FAULT_STAT_IMPRE 0x00000400 ///< Imprecise data bus error +#define NVIC_FAULT_STAT_PRECISE 0x00000200 ///< Precise data bus error +#define NVIC_FAULT_STAT_IBUS 0x00000100 ///< Instruction bus fault +#define NVIC_FAULT_STAT_MMARV 0x00000080 ///< MMAR is valid +#define NVIC_FAULT_STAT_MSTKE 0x00000010 ///< Stack access violation +#define NVIC_FAULT_STAT_MUSTKE 0x00000008 ///< Unstack access violation +#define NVIC_FAULT_STAT_DERR 0x00000002 ///< Data access violation +#define NVIC_FAULT_STAT_IERR 0x00000001 ///< Instruction access violation +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_HFAULT_STAT + * register. + */ +/*\{*/ +#define NVIC_HFAULT_STAT_DBG 0x80000000 ///< Debug event +#define NVIC_HFAULT_STAT_FORCED 0x40000000 ///< Cannot execute fault handler +#define NVIC_HFAULT_STAT_VECT 0x00000002 ///< Vector table read fault +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DEBUG_STAT + * register. + */ +/*\{*/ +#define NVIC_DEBUG_STAT_EXTRNL 0x00000010 ///< EDBGRQ asserted +#define NVIC_DEBUG_STAT_VCATCH 0x00000008 ///< Vector catch +#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004 ///< DWT match +#define NVIC_DEBUG_STAT_BKPT 0x00000002 ///< Breakpoint instruction +#define NVIC_DEBUG_STAT_HALTED 0x00000001 ///< Halt request +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MM_ADDR register. + */ +/*\{*/ +#define NVIC_MM_ADDR_M 0xFFFFFFFF ///< Data fault address +#define NVIC_MM_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_ADDR + * register. + */ +/*\{*/ +#define NVIC_FAULT_ADDR_M 0xFFFFFFFF ///< Data bus fault address +#define NVIC_FAULT_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_TYPE register. + */ +/*\{*/ +#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000 ///< Number of I regions +#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00 ///< Number of D regions +#define NVIC_MPU_TYPE_SEPARATE 0x00000001 ///< Separate or unified MPU +#define NVIC_MPU_TYPE_IREGION_S 16 +#define NVIC_MPU_TYPE_DREGION_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_CTRL register. + */ +/*\{*/ +#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004 ///< MPU default region in priv mode +#define NVIC_MPU_CTRL_HFNMIENA 0x00000002 ///< MPU enabled during faults +#define NVIC_MPU_CTRL_ENABLE 0x00000001 ///< MPU enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_NUMBER + * register. + */ +/*\{*/ +#define NVIC_MPU_NUMBER_M 0x000000FF ///< MPU region to access +#define NVIC_MPU_NUMBER_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_BASE register. + */ +/*\{*/ +#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0 ///< Base address mask +#define NVIC_MPU_BASE_VALID 0x00000010 ///< Region number valid +#define NVIC_MPU_BASE_REGION_M 0x0000000F ///< Region number +#define NVIC_MPU_BASE_ADDR_S 8 +#define NVIC_MPU_BASE_REGION_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_ATTR register. + */ +/*\{*/ +#define NVIC_MPU_ATTR_M 0xFFFF0000 ///< Attributes +#define NVIC_MPU_ATTR_AP_NO_NO 0x00000000 ///< prv: no access, usr: no access +#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000 ///< Bufferable +#define NVIC_MPU_ATTR_CACHEABLE 0x00020000 ///< Cacheable +#define NVIC_MPU_ATTR_SHAREABLE 0x00040000 ///< Shareable +#define NVIC_MPU_ATTR_TEX_M 0x00380000 ///< Type extension mask +#define NVIC_MPU_ATTR_AP_RW_NO 0x01000000 ///< prv: rw, usr: none +#define NVIC_MPU_ATTR_AP_RW_RO 0x02000000 ///< prv: rw, usr: read-only +#define NVIC_MPU_ATTR_AP_RW_RW 0x03000000 ///< prv: rw, usr: rw +#define NVIC_MPU_ATTR_AP_RO_NO 0x05000000 ///< prv: ro, usr: none +#define NVIC_MPU_ATTR_AP_RO_RO 0x06000000 ///< prv: ro, usr: ro +#define NVIC_MPU_ATTR_AP_M 0x07000000 ///< Access permissions mask +#define NVIC_MPU_ATTR_XN 0x10000000 ///< Execute disable +#define NVIC_MPU_ATTR_SRD_M 0x0000FF00 ///< Sub-region disable mask +#define NVIC_MPU_ATTR_SRD_0 0x00000100 ///< Sub-region 0 disable +#define NVIC_MPU_ATTR_SRD_1 0x00000200 ///< Sub-region 1 disable +#define NVIC_MPU_ATTR_SRD_2 0x00000400 ///< Sub-region 2 disable +#define NVIC_MPU_ATTR_SRD_3 0x00000800 ///< Sub-region 3 disable +#define NVIC_MPU_ATTR_SRD_4 0x00001000 ///< Sub-region 4 disable +#define NVIC_MPU_ATTR_SRD_5 0x00002000 ///< Sub-region 5 disable +#define NVIC_MPU_ATTR_SRD_6 0x00004000 ///< Sub-region 6 disable +#define NVIC_MPU_ATTR_SRD_7 0x00008000 ///< Sub-region 7 disable +#define NVIC_MPU_ATTR_SIZE_M 0x0000003E ///< Region size mask +#define NVIC_MPU_ATTR_SIZE_32B 0x00000008 ///< Region size 32 bytes +#define NVIC_MPU_ATTR_SIZE_64B 0x0000000A ///< Region size 64 bytes +#define NVIC_MPU_ATTR_SIZE_128B 0x0000000C ///< Region size 128 bytes +#define NVIC_MPU_ATTR_SIZE_256B 0x0000000E ///< Region size 256 bytes +#define NVIC_MPU_ATTR_SIZE_512B 0x00000010 ///< Region size 512 bytes +#define NVIC_MPU_ATTR_SIZE_1K 0x00000012 ///< Region size 1 Kbytes +#define NVIC_MPU_ATTR_SIZE_2K 0x00000014 ///< Region size 2 Kbytes +#define NVIC_MPU_ATTR_SIZE_4K 0x00000016 ///< Region size 4 Kbytes +#define NVIC_MPU_ATTR_SIZE_8K 0x00000018 ///< Region size 8 Kbytes +#define NVIC_MPU_ATTR_SIZE_16K 0x0000001A ///< Region size 16 Kbytes +#define NVIC_MPU_ATTR_SIZE_32K 0x0000001C ///< Region size 32 Kbytes +#define NVIC_MPU_ATTR_SIZE_64K 0x0000001E ///< Region size 64 Kbytes +#define NVIC_MPU_ATTR_SIZE_128K 0x00000020 ///< Region size 128 Kbytes +#define NVIC_MPU_ATTR_SIZE_256K 0x00000022 ///< Region size 256 Kbytes +#define NVIC_MPU_ATTR_SIZE_512K 0x00000024 ///< Region size 512 Kbytes +#define NVIC_MPU_ATTR_SIZE_1M 0x00000026 ///< Region size 1 Mbytes +#define NVIC_MPU_ATTR_SIZE_2M 0x00000028 ///< Region size 2 Mbytes +#define NVIC_MPU_ATTR_SIZE_4M 0x0000002A ///< Region size 4 Mbytes +#define NVIC_MPU_ATTR_SIZE_8M 0x0000002C ///< Region size 8 Mbytes +#define NVIC_MPU_ATTR_SIZE_16M 0x0000002E ///< Region size 16 Mbytes +#define NVIC_MPU_ATTR_SIZE_32M 0x00000030 ///< Region size 32 Mbytes +#define NVIC_MPU_ATTR_SIZE_64M 0x00000032 ///< Region size 64 Mbytes +#define NVIC_MPU_ATTR_SIZE_128M 0x00000034 ///< Region size 128 Mbytes +#define NVIC_MPU_ATTR_SIZE_256M 0x00000036 ///< Region size 256 Mbytes +#define NVIC_MPU_ATTR_SIZE_512M 0x00000038 ///< Region size 512 Mbytes +#define NVIC_MPU_ATTR_SIZE_1G 0x0000003A ///< Region size 1 Gbytes +#define NVIC_MPU_ATTR_SIZE_2G 0x0000003C ///< Region size 2 Gbytes +#define NVIC_MPU_ATTR_SIZE_4G 0x0000003E ///< Region size 4 Gbytes +#define NVIC_MPU_ATTR_ENABLE 0x00000001 ///< Region enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_CTRL register. + */ +/*\{*/ +#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000 ///< Debug key mask +#define NVIC_DBG_CTRL_DBGKEY 0xA05F0000 ///< Debug key +#define NVIC_DBG_CTRL_S_RESET_ST \ + 0x02000000 ///< Core has reset since last read +#define NVIC_DBG_CTRL_S_RETIRE_ST \ + 0x01000000 ///< Core has executed insruction + ///< since last read +#define NVIC_DBG_CTRL_S_LOCKUP 0x00080000 ///< Core is locked up +#define NVIC_DBG_CTRL_S_SLEEP 0x00040000 ///< Core is sleeping +#define NVIC_DBG_CTRL_S_HALT 0x00020000 ///< Core status on halt +#define NVIC_DBG_CTRL_S_REGRDY 0x00010000 ///< Register read/write available +#define NVIC_DBG_CTRL_C_SNAPSTALL \ + 0x00000020 ///< Breaks a stalled load/store +#define NVIC_DBG_CTRL_C_MASKINT 0x00000008 ///< Mask interrupts when stepping +#define NVIC_DBG_CTRL_C_STEP 0x00000004 ///< Step the core +#define NVIC_DBG_CTRL_C_HALT 0x00000002 ///< Halt the core +#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001 ///< Enable debug +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_XFER register. + */ +/*\{*/ +#define NVIC_DBG_XFER_REG_WNR 0x00010000 ///< Write or not read +#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F ///< Register +#define NVIC_DBG_XFER_REG_CFBP 0x00000014 ///< Control/Fault/BasePri/PriMask +#define NVIC_DBG_XFER_REG_DSP 0x00000013 ///< Deep SP +#define NVIC_DBG_XFER_REG_PSP 0x00000012 ///< Process SP +#define NVIC_DBG_XFER_REG_MSP 0x00000011 ///< Main SP +#define NVIC_DBG_XFER_REG_FLAGS 0x00000010 ///< xPSR/Flags register +#define NVIC_DBG_XFER_REG_R15 0x0000000F ///< Register R15 +#define NVIC_DBG_XFER_REG_R14 0x0000000E ///< Register R14 +#define NVIC_DBG_XFER_REG_R13 0x0000000D ///< Register R13 +#define NVIC_DBG_XFER_REG_R12 0x0000000C ///< Register R12 +#define NVIC_DBG_XFER_REG_R11 0x0000000B ///< Register R11 +#define NVIC_DBG_XFER_REG_R10 0x0000000A ///< Register R10 +#define NVIC_DBG_XFER_REG_R9 0x00000009 ///< Register R9 +#define NVIC_DBG_XFER_REG_R8 0x00000008 ///< Register R8 +#define NVIC_DBG_XFER_REG_R7 0x00000007 ///< Register R7 +#define NVIC_DBG_XFER_REG_R6 0x00000006 ///< Register R6 +#define NVIC_DBG_XFER_REG_R5 0x00000005 ///< Register R5 +#define NVIC_DBG_XFER_REG_R4 0x00000004 ///< Register R4 +#define NVIC_DBG_XFER_REG_R3 0x00000003 ///< Register R3 +#define NVIC_DBG_XFER_REG_R2 0x00000002 ///< Register R2 +#define NVIC_DBG_XFER_REG_R1 0x00000001 ///< Register R1 +#define NVIC_DBG_XFER_REG_R0 0x00000000 ///< Register R0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_DATA register. + */ +/*\{*/ +#define NVIC_DBG_DATA_M 0xFFFFFFFF ///< Data temporary cache +#define NVIC_DBG_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_INT register. + */ +/*\{*/ +#define NVIC_DBG_INT_HARDERR 0x00000400 ///< Debug trap on hard fault +#define NVIC_DBG_INT_INTERR 0x00000200 ///< Debug trap on interrupt errors +#define NVIC_DBG_INT_BUSERR 0x00000100 ///< Debug trap on bus error +#define NVIC_DBG_INT_STATERR 0x00000080 ///< Debug trap on usage fault state +#define NVIC_DBG_INT_CHKERR 0x00000040 ///< Debug trap on usage fault check +#define NVIC_DBG_INT_NOCPERR 0x00000020 ///< Debug trap on coprocessor error +#define NVIC_DBG_INT_MMERR 0x00000010 ///< Debug trap on mem manage fault +#define NVIC_DBG_INT_RESET 0x00000008 ///< Core reset status +#define NVIC_DBG_INT_RSTPENDCLR 0x00000004 ///< Clear pending core reset +#define NVIC_DBG_INT_RSTPENDING 0x00000002 ///< Core reset is pending +#define NVIC_DBG_INT_RSTVCATCH 0x00000001 ///< Reset vector catch +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SW_TRIG register. + */ +/*\{*/ +#define NVIC_SW_TRIG_INTID_M 0x000003FF ///< Interrupt to trigger +#define NVIC_SW_TRIG_INTID_S 0 +/*\}*/ + +#endif /* LM3S_NVIC_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_pwm.h b/bertos/cpu/cortex-m3/io/lm3s_pwm.h new file mode 100644 index 0000000..db2aaf2 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_pwm.h @@ -0,0 +1,543 @@ +/** + * \file + * + * + * \brief LM3S1968 PWM hardware definitions. + */ + +#ifndef L3MS_PWM_H +#define L3MS_PWM_H + +/** + * The following are defines for the PWM register offsets. + */ +#define PWM_O_CTL (*((reg32_t *)(PWMC_BASE + 0x00000000))) //< PWM Master Control +#define PWM_O_SYNC (*((reg32_t *)(PWMC_BASE + 0x00000004))) //< PWM Time Base Sync +#define PWM_O_ENABLE (*((reg32_t *)(PWMC_BASE + 0x00000008))) //< PWM Output Enable +#define PWM_O_INVERT (*((reg32_t *)(PWMC_BASE + 0x0000000C))) //< PWM Output Inversion +#define PWM_O_FAULT (*((reg32_t *)(PWMC_BASE + 0x00000010))) //< PWM Output Fault +#define PWM_O_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000014))) //< PWM Interrupt Enable +#define PWM_O_RIS (*((reg32_t *)(PWMC_BASE + 0x00000018))) //< PWM Raw Interrupt Status +#define PWM_O_ISC (*((reg32_t *)(PWMC_BASE + 0x0000001C))) //< PWM Interrupt Status and Clear +#define PWM_O_STATUS (*((reg32_t *)(PWMC_BASE + 0x00000020))) //< PWM Status +#define PWM_O_FAULTVAL (*((reg32_t *)(PWMC_BASE + 0x00000024))) //< PWM Fault Condition Value +#define PWM_O_ENUPD (*((reg32_t *)(PWMC_BASE + 0x00000028))) //< PWM Enable Update +#define PWM_O_0_CTL (*((reg32_t *)(PWMC_BASE + 0x00000040))) //< PWM0 Control +#define PWM_O_0_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000044))) //< PWM0 Interrupt and Trigger Enable +#define PWM_O_0_RIS (*((reg32_t *)(PWMC_BASE + 0x00000048))) //< PWM0 Raw Interrupt Status +#define PWM_O_0_ISC (*((reg32_t *)(PWMC_BASE + 0x0000004C))) //< PWM0 Interrupt Status and Clear +#define PWM_O_0_LOAD (*((reg32_t *)(PWMC_BASE + 0x00000050))) //< PWM0 Load +#define PWM_O_0_COUNT (*((reg32_t *)(PWMC_BASE + 0x00000054))) //< PWM0 Counter +#define PWM_O_0_CMPA (*((reg32_t *)(PWMC_BASE + 0x00000058))) //< PWM0 Compare A +#define PWM_O_0_CMPB (*((reg32_t *)(PWMC_BASE + 0x0000005C))) //< PWM0 Compare B +#define PWM_O_0_GENA (*((reg32_t *)(PWMC_BASE + 0x00000060))) //< PWM0 Generator A Control +#define PWM_O_0_GENB (*((reg32_t *)(PWMC_BASE + 0x00000064))) //< PWM0 Generator B Control +#define PWM_O_0_DBCTL (*((reg32_t *)(PWMC_BASE + 0x00000068))) //< PWM0 Dead-Band Control +#define PWM_O_0_DBRISE (*((reg32_t *)(PWMC_BASE + 0x0000006C))) //< PWM0 Dead-Band Rising-Edge Delay +#define PWM_O_0_DBFALL (*((reg32_t *)(PWMC_BASE + 0x00000070))) //< PWM0 Dead-Band Falling-Edge-Delay +#define PWM_O_0_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x00000074))) //< PWM0 Fault Source 0 +#define PWM_O_0_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x00000078))) //< PWM0 Fault Source 1 +#define PWM_O_0_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x0000007C))) //< PWM0 Minimum Fault Period +#define PWM_O_1_CTL (*((reg32_t *)(PWMC_BASE + 0x00000080))) //< PWM1 Control +#define PWM_O_1_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000084))) //< PWM1 Interrupt and Trigger Enable +#define PWM_O_1_RIS (*((reg32_t *)(PWMC_BASE + 0x00000088))) //< PWM1 Raw Interrupt Status +#define PWM_O_1_ISC (*((reg32_t *)(PWMC_BASE + 0x0000008C))) //< PWM1 Interrupt Status and Clear +#define PWM_O_1_LOAD (*((reg32_t *)(PWMC_BASE + 0x00000090))) //< PWM1 Load +#define PWM_O_1_COUNT (*((reg32_t *)(PWMC_BASE + 0x00000094))) //< PWM1 Counter +#define PWM_O_1_CMPA (*((reg32_t *)(PWMC_BASE + 0x00000098))) //< PWM1 Compare A +#define PWM_O_1_CMPB (*((reg32_t *)(PWMC_BASE + 0x0000009C))) //< PWM1 Compare B +#define PWM_O_1_GENA (*((reg32_t *)(PWMC_BASE + 0x000000A0))) //< PWM1 Generator A Control +#define PWM_O_1_GENB (*((reg32_t *)(PWMC_BASE + 0x000000A4))) //< PWM1 Generator B Control +#define PWM_O_1_DBCTL (*((reg32_t *)(PWMC_BASE + 0x000000A8))) //< PWM1 Dead-Band Control +#define PWM_O_1_DBRISE (*((reg32_t *)(PWMC_BASE + 0x000000AC))) //< PWM1 Dead-Band Rising-Edge Delay +#define PWM_O_1_DBFALL (*((reg32_t *)(PWMC_BASE + 0x000000B0))) //< PWM1 Dead-Band Falling-Edge-Delay +#define PWM_O_1_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x000000B4))) //< PWM1 Fault Source 0 +#define PWM_O_1_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x000000B8))) //< PWM1 Fault Source 1 +#define PWM_O_1_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x000000BC))) //< PWM1 Minimum Fault Period +#define PWM_O_2_CTL (*((reg32_t *)(PWMC_BASE + 0x000000C0))) //< PWM2 Control +#define PWM_O_2_INTEN (*((reg32_t *)(PWMC_BASE + 0x000000C4))) //< PWM2 Interrupt and Trigger Enable +#define PWM_O_2_RIS (*((reg32_t *)(PWMC_BASE + 0x000000C8))) //< PWM2 Raw Interrupt Status +#define PWM_O_2_ISC (*((reg32_t *)(PWMC_BASE + 0x000000CC))) //< PWM2 Interrupt Status and Clear +#define PWM_O_2_LOAD (*((reg32_t *)(PWMC_BASE + 0x000000D0))) //< PWM2 Load +#define PWM_O_2_COUNT (*((reg32_t *)(PWMC_BASE + 0x000000D4))) //< PWM2 Counter +#define PWM_O_2_CMPA (*((reg32_t *)(PWMC_BASE + 0x000000D8))) //< PWM2 Compare A +#define PWM_O_2_CMPB (*((reg32_t *)(PWMC_BASE + 0x000000DC))) //< PWM2 Compare B +#define PWM_O_2_GENA (*((reg32_t *)(PWMC_BASE + 0x000000E0))) //< PWM2 Generator A Control +#define PWM_O_2_GENB (*((reg32_t *)(PWMC_BASE + 0x000000E4))) //< PWM2 Generator B Control +#define PWM_O_2_DBCTL (*((reg32_t *)(PWMC_BASE + 0x000000E8))) //< PWM2 Dead-Band Control +#define PWM_O_2_DBRISE (*((reg32_t *)(PWMC_BASE + 0x000000EC))) //< PWM2 Dead-Band Rising-Edge Delay +#define PWM_O_2_DBFALL (*((reg32_t *)(PWMC_BASE + 0x000000F0))) //< PWM2 Dead-Band Falling-Edge-Delay +#define PWM_O_2_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x000000F4))) //< PWM2 Fault Source 0 +#define PWM_O_2_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x000000F8))) //< PWM2 Fault Source 1 +#define PWM_O_2_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x000000FC))) //< PWM2 Minimum Fault Period +#define PWM_O_3_CTL (*((reg32_t *)(PWMC_BASE + 0x00000100))) //< PWM3 Control +#define PWM_O_3_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000104))) //< PWM3 Interrupt and Trigger Enable +#define PWM_O_3_RIS (*((reg32_t *)(PWMC_BASE + 0x00000108))) //< PWM3 Raw Interrupt Status +#define PWM_O_3_ISC (*((reg32_t *)(PWMC_BASE + 0x0000010C))) //< PWM3 Interrupt Status and Clear +#define PWM_O_3_LOAD (*((reg32_t *)(PWMC_BASE + 0x00000110))) //< PWM3 Load +#define PWM_O_3_COUNT (*((reg32_t *)(PWMC_BASE + 0x00000114))) //< PWM3 Counter +#define PWM_O_3_CMPA (*((reg32_t *)(PWMC_BASE + 0x00000118))) //< PWM3 Compare A +#define PWM_O_3_CMPB (*((reg32_t *)(PWMC_BASE + 0x0000011C))) //< PWM3 Compare B +#define PWM_O_3_GENA (*((reg32_t *)(PWMC_BASE + 0x00000120))) //< PWM3 Generator A Control +#define PWM_O_3_GENB (*((reg32_t *)(PWMC_BASE + 0x00000124))) //< PWM3 Generator B Control +#define PWM_O_3_DBCTL (*((reg32_t *)(PWMC_BASE + 0x00000128))) //< PWM3 Dead-Band Control +#define PWM_O_3_DBRISE (*((reg32_t *)(PWMC_BASE + 0x0000012C))) //< PWM3 Dead-Band Rising-Edge Delay +#define PWM_O_3_DBFALL (*((reg32_t *)(PWMC_BASE + 0x00000130))) //< PWM3 Dead-Band Falling-Edge-Delay +#define PWM_O_3_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x00000134))) //< PWM3 Fault Source 0 +#define PWM_O_3_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x00000138))) //< PWM3 Fault Source 1 +#define PWM_O_3_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x0000013C))) //< PWM3 Minimum Fault Period +#define PWM_O_0_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000800))) //< PWM0 Fault Pin Logic Sense +#define PWM_O_0_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000804))) //< PWM0 Fault Status 0 +#define PWM_O_0_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000808))) //< PWM0 Fault Status 1 +#define PWM_O_1_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000880))) //< PWM1 Fault Pin Logic Sense +#define PWM_O_1_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000884))) //< PWM1 Fault Status 0 +#define PWM_O_1_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000888))) //< PWM1 Fault Status 1 +#define PWM_O_2_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000900))) //< PWM2 Fault Pin Logic Sense +#define PWM_O_2_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000904))) //< PWM2 Fault Status 0 +#define PWM_O_2_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000908))) //< PWM2 Fault Status 1 +#define PWM_O_3_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000980))) //< PWM3 Fault Pin Logic Sense +#define PWM_O_3_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000984))) //< PWM3 Fault Status 0 +#define PWM_O_3_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000988))) //< PWM3 Fault Status 1 + +/** + * Defines for the bit fields in the PWM_O_CTL register. + */ +#define PWM_CTL_GLOBALSYNC3 3 //< Update PWM Generator 3 +#define PWM_CTL_GLOBALSYNC2 2 //< Update PWM Generator 2 +#define PWM_CTL_GLOBALSYNC1 1 //< Update PWM Generator 1 +#define PWM_CTL_GLOBALSYNC0 0 //< Update PWM Generator 0 + +/** + * Defines for the bit fields in the PWM_O_SYNC register. + */ +#define PWM_SYNC_SYNC3 3 //< Reset Generator 3 Counter +#define PWM_SYNC_SYNC2 2 //< Reset Generator 2 Counter +#define PWM_SYNC_SYNC1 1 //< Reset Generator 1 Counter +#define PWM_SYNC_SYNC0 0 //< Reset Generator 0 Counter + +/** + * Defines for the bit fields in the PWM_O_ENABLE register. + */ +#define PWM_ENABLE_PWM7EN 7 //< PWM7 Output Enable +#define PWM_ENABLE_PWM6EN 6 //< PWM6 Output Enable +#define PWM_ENABLE_PWM5EN 5 //< PWM5 Output Enable +#define PWM_ENABLE_PWM4EN 4 //< PWM4 Output Enable +#define PWM_ENABLE_PWM3EN 3 //< PWM3 Output Enable +#define PWM_ENABLE_PWM2EN 2 //< PWM2 Output Enable +#define PWM_ENABLE_PWM1EN 1 //< PWM1 Output Enable +#define PWM_ENABLE_PWM0EN 0 //< PWM0 Output Enable + +/** + * Defines for the bit fields in the PWM_O_INVERT register. + */ +#define PWM_INVERT_PWM7INV 7 //< Invert PWM7 Signal +#define PWM_INVERT_PWM6INV 6 //< Invert PWM6 Signal +#define PWM_INVERT_PWM5INV 5 //< Invert PWM5 Signal +#define PWM_INVERT_PWM4INV 4 //< Invert PWM4 Signal +#define PWM_INVERT_PWM3INV 3 //< Invert PWM3 Signal +#define PWM_INVERT_PWM2INV 2 //< Invert PWM2 Signal +#define PWM_INVERT_PWM1INV 1 //< Invert PWM1 Signal +#define PWM_INVERT_PWM0INV 0 //< Invert PWM0 Signal + +/** + * Defines for the bit fields in the PWM_O_FAULT register. + */ +#define PWM_FAULT_FAULT7 7 //< PWM7 Fault +#define PWM_FAULT_FAULT6 6 //< PWM6 Fault +#define PWM_FAULT_FAULT5 5 //< PWM5 Fault +#define PWM_FAULT_FAULT4 4 //< PWM4 Fault +#define PWM_FAULT_FAULT3 3 //< PWM3 Fault +#define PWM_FAULT_FAULT2 2 //< PWM2 Fault +#define PWM_FAULT_FAULT1 1 //< PWM1 Fault +#define PWM_FAULT_FAULT0 0 //< PWM0 Fault + +/** + * Defines for the bit fields in the PWM_O_INTEN register. + */ +#define PWM_INTEN_INTFAULT3 19 //< Interrupt Fault 3 +#define PWM_INTEN_INTFAULT2 18 //< Interrupt Fault 2 +#define PWM_INTEN_INTFAULT1 17 //< Interrupt Fault 1 +#define PWM_INTEN_INTFAULT 16 //< Fault Interrupt Enable +#define PWM_INTEN_INTFAULT0 16 //< Interrupt Fault 0 +#define PWM_INTEN_INTPWM3 3 //< PWM3 Interrupt Enable +#define PWM_INTEN_INTPWM2 2 //< PWM2 Interrupt Enable +#define PWM_INTEN_INTPWM1 1 //< PWM1 Interrupt Enable +#define PWM_INTEN_INTPWM0 0 //< PWM0 Interrupt Enable + +/** + * Defines for the bit fields in the PWM_O_RIS register. + */ +#define PWM_RIS_INTFAULT3 19 //< Interrupt Fault PWM 3 +#define PWM_RIS_INTFAULT2 18 //< Interrupt Fault PWM 2 +#define PWM_RIS_INTFAULT1 17 //< Interrupt Fault PWM 1 +#define PWM_RIS_INTFAULT0 16 //< Interrupt Fault PWM 0 +#define PWM_RIS_INTFAULT 16 //< Fault Interrupt Asserted +#define PWM_RIS_INTPWM3 3 //< PWM3 Interrupt Asserted +#define PWM_RIS_INTPWM2 2 //< PWM2 Interrupt Asserted +#define PWM_RIS_INTPWM1 1 //< PWM1 Interrupt Asserted +#define PWM_RIS_INTPWM0 0 //< PWM0 Interrupt Asserted + +/** + * Defines for the bit fields in the PWM_O_ISC register. + */ +#define PWM_ISC_INTFAULT3 19 //< FAULT3 Interrupt Asserted +#define PWM_ISC_INTFAULT2 18 //< FAULT2 Interrupt Asserted +#define PWM_ISC_INTFAULT1 17 //< FAULT1 Interrupt Asserted +#define PWM_ISC_INTFAULT 16 //< Fault Interrupt Asserted +#define PWM_ISC_INTFAULT0 16 //< FAULT0 Interrupt Asserted +#define PWM_ISC_INTPWM3 3 //< PWM3 Interrupt Status +#define PWM_ISC_INTPWM2 2 //< PWM2 Interrupt Status +#define PWM_ISC_INTPWM1 1 //< PWM1 Interrupt Status +#define PWM_ISC_INTPWM0 0 //< PWM0 Interrupt Status + +/** + * Defines for the bit fields in the PWM_O_STATUS register. + */ +#define PWM_STATUS_FAULT3 3 //< Generator 3 Fault Status +#define PWM_STATUS_FAULT2 2 //< Generator 2 Fault Status +#define PWM_STATUS_FAULT1 1 //< Generator 1 Fault Status +#define PWM_STATUS_FAULT0 0 //< Generator 0 Fault Status + +/** + * Defines for the bit fields in the PWM_O_FAULTVAL register. + */ +#define PWM_FAULTVAL_PWM7 7 //< PWM7 Fault Value +#define PWM_FAULTVAL_PWM6 6 //< PWM6 Fault Value +#define PWM_FAULTVAL_PWM5 5 //< PWM5 Fault Value +#define PWM_FAULTVAL_PWM4 4 //< PWM4 Fault Value +#define PWM_FAULTVAL_PWM3 3 //< PWM3 Fault Value +#define PWM_FAULTVAL_PWM2 2 //< PWM2 Fault Value +#define PWM_FAULTVAL_PWM1 1 //< PWM1 Fault Value +#define PWM_FAULTVAL_PWM0 0 //< PWM0 Fault Value + +/** + * Defines for the bit fields in the PWM_O_ENUPD register. + */ +#define PWM_ENUPD_ENUPD7_M 0x0000C000 //< PWM7 Enable Update Mode +#define PWM_ENUPD_ENUPD7_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD7_LSYNC 0x00008000 //< Locally Synchronized +#define PWM_ENUPD_ENUPD7_GSYNC 0x0000C000 //< Globally Synchronized +#define PWM_ENUPD_ENUPD6_M 0x00003000 //< PWM6 Enable Update Mode +#define PWM_ENUPD_ENUPD6_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD6_LSYNC 0x00002000 //< Locally Synchronized +#define PWM_ENUPD_ENUPD6_GSYNC 0x00003000 //< Globally Synchronized +#define PWM_ENUPD_ENUPD5_M 0x00000C00 //< PWM5 Enable Update Mode +#define PWM_ENUPD_ENUPD5_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD5_LSYNC 0x00000800 //< Locally Synchronized +#define PWM_ENUPD_ENUPD5_GSYNC 0x00000C00 //< Globally Synchronized +#define PWM_ENUPD_ENUPD4_M 0x00000300 //< PWM4 Enable Update Mode +#define PWM_ENUPD_ENUPD4_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD4_LSYNC 0x00000200 //< Locally Synchronized +#define PWM_ENUPD_ENUPD4_GSYNC 0x00000300 //< Globally Synchronized +#define PWM_ENUPD_ENUPD3_M 0x000000C0 //< PWM3 Enable Update Mode +#define PWM_ENUPD_ENUPD3_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD3_LSYNC 0x00000080 //< Locally Synchronized +#define PWM_ENUPD_ENUPD3_GSYNC 0x000000C0 //< Globally Synchronized +#define PWM_ENUPD_ENUPD2_M 0x00000030 //< PWM2 Enable Update Mode +#define PWM_ENUPD_ENUPD2_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD2_LSYNC 0x00000020 //< Locally Synchronized +#define PWM_ENUPD_ENUPD2_GSYNC 0x00000030 //< Globally Synchronized +#define PWM_ENUPD_ENUPD1_M 0x0000000C //< PWM1 Enable Update Mode +#define PWM_ENUPD_ENUPD1_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD1_LSYNC 0x00000008 //< Locally Synchronized +#define PWM_ENUPD_ENUPD1_GSYNC 0x0000000C //< Globally Synchronized +#define PWM_ENUPD_ENUPD0_M 0x00000003 //< PWM0 Enable Update Mode +#define PWM_ENUPD_ENUPD0_IMM 0x00000000 //< Immediate +#define PWM_ENUPD_ENUPD0_LSYNC 0x00000002 //< Locally Synchronized +#define PWM_ENUPD_ENUPD0_GSYNC 0x00000003 //< Globally Synchronized + +/** + * Defines for the bit fields in the PWM_O_X_CTL register. + */ +#define PWM_X_CTL_LATCH 0x00040000 //< Latch Fault Input +#define PWM_X_CTL_MINFLTPER 0x00020000 //< Minimum Fault Period +#define PWM_X_CTL_FLTSRC 0x00010000 //< Fault Condition Source +#define PWM_X_CTL_DBFALLUPD_M 0x0000C000 //< PWMnDBFALL Update Mode +#define PWM_X_CTL_DBFALLUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_DBFALLUPD_LS 0x00008000 //< Locally Synchronized +#define PWM_X_CTL_DBFALLUPD_GS 0x0000C000 //< Globally Synchronized +#define PWM_X_CTL_DBRISEUPD_M 0x00003000 //< PWMnDBRISE Update Mode +#define PWM_X_CTL_DBRISEUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_DBRISEUPD_LS 0x00002000 //< Locally Synchronized +#define PWM_X_CTL_DBRISEUPD_GS 0x00003000 //< Globally Synchronized +#define PWM_X_CTL_DBCTLUPD_M 0x00000C00 //< PWMnDBCTL Update Mode +#define PWM_X_CTL_DBCTLUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_DBCTLUPD_LS 0x00000800 //< Locally Synchronized +#define PWM_X_CTL_DBCTLUPD_GS 0x00000C00 //< Globally Synchronized +#define PWM_X_CTL_GENBUPD_M 0x00000300 //< PWMnGENB Update Mode +#define PWM_X_CTL_GENBUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_GENBUPD_LS 0x00000200 //< Locally Synchronized +#define PWM_X_CTL_GENBUPD_GS 0x00000300 //< Globally Synchronized +#define PWM_X_CTL_GENAUPD_M 0x000000C0 //< PWMnGENA Update Mode +#define PWM_X_CTL_GENAUPD_I 0x00000000 //< Immediate +#define PWM_X_CTL_GENAUPD_LS 0x00000080 //< Locally Synchronized +#define PWM_X_CTL_GENAUPD_GS 0x000000C0 //< Globally Synchronized +#define PWM_X_CTL_CMPBUPD 0x00000020 //< Comparator B Update Mode +#define PWM_X_CTL_CMPAUPD 0x00000010 //< Comparator A Update Mode +#define PWM_X_CTL_LOADUPD 0x00000008 //< Load Register Update Mode +#define PWM_X_CTL_DEBUG 0x00000004 //< Debug Mode +#define PWM_X_CTL_MODE 0x00000002 //< Counter Mode +#define PWM_X_CTL_ENABLE 0x00000001 //< PWM Block Enable + +/** + * Defines for the bit fields in the PWM_O_X_INTEN register. + */ +#define PWM_X_INTEN_TRCMPBD 0x00002000 //< Trigger for Counter=PWMnCMPB Down +#define PWM_X_INTEN_TRCMPBU 0x00001000 //< Trigger for Counter=PWMnCMPB Up +#define PWM_X_INTEN_TRCMPAD 0x00000800 //< Trigger for Counter=PWMnCMPA Down +#define PWM_X_INTEN_TRCMPAU 0x00000400 //< Trigger for Counter=PWMnCMPA Up +#define PWM_X_INTEN_TRCNTLOAD 0x00000200 //< Trigger for Counter=PWMnLOAD +#define PWM_X_INTEN_TRCNTZERO 0x00000100 //< Trigger for Counter=0 +#define PWM_X_INTEN_INTCMPBD 0x00000020 //< Interrupt for Counter=PWMnCMPB Down +#define PWM_X_INTEN_INTCMPBU 0x00000010 //< Interrupt for Counter=PWMnCMPB Up +#define PWM_X_INTEN_INTCMPAD 0x00000008 //< Interrupt for Counter=PWMnCMPA Down +#define PWM_X_INTEN_INTCMPAU 0x00000004 //< Interrupt for Counter=PWMnCMPA Up +#define PWM_X_INTEN_INTCNTLOAD 0x00000002 //< Interrupt for Counter=PWMnLOAD +#define PWM_X_INTEN_INTCNTZERO 0x00000001 //< Interrupt for Counter=0 + +/** + * Defines for the bit fields in the PWM_O_X_RIS register. + */ +#define PWM_X_RIS_INTCMPBD 0x00000020 //< Comparator B Down Interrupt Status +#define PWM_X_RIS_INTCMPBU 0x00000010 //< Comparator B Up Interrupt Status +#define PWM_X_RIS_INTCMPAD 0x00000008 //< Comparator A Down Interrupt Status +#define PWM_X_RIS_INTCMPAU 0x00000004 //< Comparator A Up Interrupt Status +#define PWM_X_RIS_INTCNTLOAD 0x00000002 //< Counter=Load Interrupt Status +#define PWM_X_RIS_INTCNTZERO 0x00000001 //< Counter=0 Interrupt Status + +/** + * Defines for the bit fields in the PWM_O_X_ISC register. + */ +#define PWM_X_ISC_INTCMPBD 0x00000020 //< Comparator B Down Interrupt +#define PWM_X_ISC_INTCMPBU 0x00000010 //< Comparator B Up Interrupt +#define PWM_X_ISC_INTCMPAD 0x00000008 //< Comparator A Down Interrupt +#define PWM_X_ISC_INTCMPAU 0x00000004 //< Comparator A Up Interrupt +#define PWM_X_ISC_INTCNTLOAD 0x00000002 //< Counter=Load Interrupt +#define PWM_X_ISC_INTCNTZERO 0x00000001 //< Counter=0 Interrupt + +/** + * Defines for the bit fields in the PWM_O_X_LOAD register. + */ +#define PWM_X_LOAD_M 0x0000FFFF //< Counter Load Value +#define PWM_X_LOAD_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_COUNT register. + */ +#define PWM_X_COUNT_M 0x0000FFFF //< Counter Value +#define PWM_X_COUNT_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_CMPA register. + */ +#define PWM_X_CMPA_M 0x0000FFFF //< Comparator A Value +#define PWM_X_CMPA_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_CMPB register. + */ +#define PWM_X_CMPB_M 0x0000FFFF //< Comparator B Value +#define PWM_X_CMPB_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_GENA register. + */ +#define PWM_X_GENA_ACTCMPBD_M 0x00000C00 //< Action for Comparator B Down +#define PWM_X_GENA_ACTCMPBD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTCMPBD_INV 0x00000400 //< Invert pwmA +#define PWM_X_GENA_ACTCMPBD_ZERO 0x00000800 //< Drive pwmA Low +#define PWM_X_GENA_ACTCMPBD_ONE 0x00000C00 //< Drive pwmA High +#define PWM_X_GENA_ACTCMPBU_M 0x00000300 //< Action for Comparator B Up +#define PWM_X_GENA_ACTCMPBU_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTCMPBU_INV 0x00000100 //< Invert pwmA +#define PWM_X_GENA_ACTCMPBU_ZERO 0x00000200 //< Drive pwmA Low +#define PWM_X_GENA_ACTCMPBU_ONE 0x00000300 //< Drive pwmA High +#define PWM_X_GENA_ACTCMPAD_M 0x000000C0 //< Action for Comparator A Down +#define PWM_X_GENA_ACTCMPAD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTCMPAD_INV 0x00000040 //< Invert pwmA +#define PWM_X_GENA_ACTCMPAD_ZERO 0x00000080 //< Drive pwmA Low +#define PWM_X_GENA_ACTCMPAD_ONE 0x000000C0 //< Drive pwmA High +#define PWM_X_GENA_ACTCMPAU_M 0x00000030 //< Action for Comparator A Up +#define PWM_X_GENA_ACTCMPAU_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTCMPAU_INV 0x00000010 //< Invert pwmA +#define PWM_X_GENA_ACTCMPAU_ZERO 0x00000020 //< Drive pwmA Low +#define PWM_X_GENA_ACTCMPAU_ONE 0x00000030 //< Drive pwmA High +#define PWM_X_GENA_ACTLOAD_M 0x0000000C //< Action for Counter=LOAD +#define PWM_X_GENA_ACTLOAD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTLOAD_INV 0x00000004 //< Invert pwmA +#define PWM_X_GENA_ACTLOAD_ZERO 0x00000008 //< Drive pwmA Low +#define PWM_X_GENA_ACTLOAD_ONE 0x0000000C //< Drive pwmA High +#define PWM_X_GENA_ACTZERO_M 0x00000003 //< Action for Counter=0 +#define PWM_X_GENA_ACTZERO_NONE 0x00000000 //< Do nothing +#define PWM_X_GENA_ACTZERO_INV 0x00000001 //< Invert pwmA +#define PWM_X_GENA_ACTZERO_ZERO 0x00000002 //< Drive pwmA Low +#define PWM_X_GENA_ACTZERO_ONE 0x00000003 //< Drive pwmA High + +/** + * Defines for the bit fields in the PWM_O_X_GENB register. + */ +#define PWM_X_GENB_ACTCMPBD_M 0x00000C00 //< Action for Comparator B Down +#define PWM_X_GENB_ACTCMPBD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTCMPBD_INV 0x00000400 //< Invert pwmB +#define PWM_X_GENB_ACTCMPBD_ZERO 0x00000800 //< Drive pwmB Low +#define PWM_X_GENB_ACTCMPBD_ONE 0x00000C00 //< Drive pwmB High +#define PWM_X_GENB_ACTCMPBU_M 0x00000300 //< Action for Comparator B Up +#define PWM_X_GENB_ACTCMPBU_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTCMPBU_INV 0x00000100 //< Invert pwmB +#define PWM_X_GENB_ACTCMPBU_ZERO 0x00000200 //< Drive pwmB Low +#define PWM_X_GENB_ACTCMPBU_ONE 0x00000300 //< Drive pwmB High +#define PWM_X_GENB_ACTCMPAD_M 0x000000C0 //< Action for Comparator A Down +#define PWM_X_GENB_ACTCMPAD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTCMPAD_INV 0x00000040 //< Invert pwmB +#define PWM_X_GENB_ACTCMPAD_ZERO 0x00000080 //< Drive pwmB Low +#define PWM_X_GENB_ACTCMPAD_ONE 0x000000C0 //< Drive pwmB High +#define PWM_X_GENB_ACTCMPAU_M 0x00000030 //< Action for Comparator A Up +#define PWM_X_GENB_ACTCMPAU_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTCMPAU_INV 0x00000010 //< Invert pwmB +#define PWM_X_GENB_ACTCMPAU_ZERO 0x00000020 //< Drive pwmB Low +#define PWM_X_GENB_ACTCMPAU_ONE 0x00000030 //< Drive pwmB High +#define PWM_X_GENB_ACTLOAD_M 0x0000000C //< Action for Counter=LOAD +#define PWM_X_GENB_ACTLOAD_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTLOAD_INV 0x00000004 //< Invert pwmB +#define PWM_X_GENB_ACTLOAD_ZERO 0x00000008 //< Drive pwmB Low +#define PWM_X_GENB_ACTLOAD_ONE 0x0000000C //< Drive pwmB High +#define PWM_X_GENB_ACTZERO_M 0x00000003 //< Action for Counter=0 +#define PWM_X_GENB_ACTZERO_NONE 0x00000000 //< Do nothing +#define PWM_X_GENB_ACTZERO_INV 0x00000001 //< Invert pwmB +#define PWM_X_GENB_ACTZERO_ZERO 0x00000002 //< Drive pwmB Low +#define PWM_X_GENB_ACTZERO_ONE 0x00000003 //< Drive pwmB High + +/** + * Defines for the bit fields in the PWM_O_X_DBCTL register. + */ +#define PWM_X_DBCTL_ENABLE 0x00000001 //< Dead-Band Generator Enable +/** + * Defines for the bit fields in the PWM_O_X_DBRISE register. + */ +#define PWM_X_DBRISE_DELAY_M 0x00000FFF //< Dead-Band Rise Delay +#define PWM_X_DBRISE_DELAY_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_DBFALL register. + */ +#define PWM_X_DBFALL_DELAY_M 0x00000FFF //< Dead-Band Fall Delay +#define PWM_X_DBFALL_DELAY_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_FLTSRC0 register. + */ +#define PWM_X_FLTSRC0_FAULT3 0x00000008 //< Fault3 Input +#define PWM_X_FLTSRC0_FAULT2 0x00000004 //< Fault2 Input +#define PWM_X_FLTSRC0_FAULT1 0x00000002 //< Fault1 Input +#define PWM_X_FLTSRC0_FAULT0 0x00000001 //< Fault0 Input + +/** + * The following are defines for the bit fields in the PWM_O_X_FLTSRC1 register. + */ +#define PWM_X_FLTSRC1_DCMP7 0x00000080 //< Digital Comparator 7 +#define PWM_X_FLTSRC1_DCMP6 0x00000040 //< Digital Comparator 6 +#define PWM_X_FLTSRC1_DCMP5 0x00000020 //< Digital Comparator 5 +#define PWM_X_FLTSRC1_DCMP4 0x00000010 //< Digital Comparator 4 +#define PWM_X_FLTSRC1_DCMP3 0x00000008 //< Digital Comparator 3 +#define PWM_X_FLTSRC1_DCMP2 0x00000004 //< Digital Comparator 2 +#define PWM_X_FLTSRC1_DCMP1 0x00000002 //< Digital Comparator 1 +#define PWM_X_FLTSRC1_DCMP0 0x00000001 //< Digital Comparator 0 + +/** + * Defines for the bit fields in the PWM_O_X_MINFLTPER register. + */ +#define PWM_X_MINFLTPER_M 0x0000FFFF //< Minimum Fault Period +#define PWM_X_MINFLTPER_S 0 + +/** + * Defines for the bit fields in the PWM_O_X_FLTSEN register. + */ +#define PWM_X_FLTSEN_FAULT3 0x00000008 //< Fault3 Sense +#define PWM_X_FLTSEN_FAULT2 0x00000004 //< Fault2 Sense +#define PWM_X_FLTSEN_FAULT1 0x00000002 //< Fault1 Sense +#define PWM_X_FLTSEN_FAULT0 0x00000001 //< Fault0 Sense + +/** + * Defines for the bit fields in the PWM_O_X_FLTSTAT0 register. + */ +#define PWM_X_FLTSTAT0_FAULT3 0x00000008 //< Fault Input 3 +#define PWM_X_FLTSTAT0_FAULT2 0x00000004 //< Fault Input 2 +#define PWM_X_FLTSTAT0_FAULT1 0x00000002 //< Fault Input 1 +#define PWM_X_FLTSTAT0_FAULT0 0x00000001 //< Fault Input 0 + +/** + * Defines for the bit fields in the PWM_O_X_FLTSTAT1 register. + */ +#define PWM_X_FLTSTAT1_DCMP7 0x00000080 //< Digital Comparator 7 Trigger +#define PWM_X_FLTSTAT1_DCMP6 0x00000040 //< Digital Comparator 6 Trigger +#define PWM_X_FLTSTAT1_DCMP5 0x00000020 //< Digital Comparator 5 Trigger +#define PWM_X_FLTSTAT1_DCMP4 0x00000010 //< Digital Comparator 4 Trigger +#define PWM_X_FLTSTAT1_DCMP3 0x00000008 //< Digital Comparator 3 Trigger +#define PWM_X_FLTSTAT1_DCMP2 0x00000004 //< Digital Comparator 2 Trigger +#define PWM_X_FLTSTAT1_DCMP1 0x00000002 //< Digital Comparator 1 Trigger +#define PWM_X_FLTSTAT1_DCMP0 0x00000001 //< Digital Comparator 0 Trigger + +/** + * Defines for the PWM Generator standard offsets. + */ +#define PWM_O_X_CTL (*((reg32_t *)(PWMC_BASE + 0x00000000))) //< Gen Control Reg +#define PWM_O_X_INTEN (*((reg32_t *)(PWMC_BASE + 0x00000004))) //< Gen Int/Trig Enable Reg +#define PWM_O_X_RIS (*((reg32_t *)(PWMC_BASE + 0x00000008))) //< Gen Raw Int Status Reg +#define PWM_O_X_ISC (*((reg32_t *)(PWMC_BASE + 0x0000000C))) //< Gen Int Status Reg +#define PWM_O_X_LOAD (*((reg32_t *)(PWMC_BASE + 0x00000010))) //< Gen Load Reg +#define PWM_O_X_COUNT (*((reg32_t *)(PWMC_BASE + 0x00000014))) //< Gen Counter Reg +#define PWM_O_X_CMPA (*((reg32_t *)(PWMC_BASE + 0x00000018))) //< Gen Compare A Reg +#define PWM_O_X_CMPB (*((reg32_t *)(PWMC_BASE + 0x0000001C))) //< Gen Compare B Reg +#define PWM_O_X_GENA (*((reg32_t *)(PWMC_BASE + 0x00000020))) //< Gen Generator A Ctrl Reg +#define PWM_O_X_GENB (*((reg32_t *)(PWMC_BASE + 0x00000024))) //< Gen Generator B Ctrl Reg +#define PWM_O_X_DBCTL (*((reg32_t *)(PWMC_BASE + 0x00000028))) //< Gen Dead Band Ctrl Reg +#define PWM_O_X_DBRISE (*((reg32_t *)(PWMC_BASE + 0x0000002C))) //< Gen DB Rising Edge Delay Reg +#define PWM_O_X_DBFALL (*((reg32_t *)(PWMC_BASE + 0x00000030))) //< Gen DB Falling Edge Delay Reg +#define PWM_O_X_FLTSRC0 (*((reg32_t *)(PWMC_BASE + 0x00000034))) //< Fault pin, comparator condition +#define PWM_O_X_FLTSRC1 (*((reg32_t *)(PWMC_BASE + 0x00000038))) //< Digital comparator condition +#define PWM_O_X_MINFLTPER (*((reg32_t *)(PWMC_BASE + 0x0000003C))) //< Fault minimum period extension +#define PWM_GEN_0_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000040))) //< PWM0 base +#define PWM_GEN_1_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000080))) //< PWM1 base +#define PWM_GEN_2_OFFSET (*((reg32_t *)(PWMC_BASE + 0x000000C0))) //< PWM2 base +#define PWM_GEN_3_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000100))) //< PWM3 base + +/** + * Defines for the PWM Generator extended offsets. + */ +#define PWM_O_X_FLTSEN (*((reg32_t *)(PWMC_BASE + 0x00000000))) //< Fault logic sense +#define PWM_O_X_FLTSTAT0 (*((reg32_t *)(PWMC_BASE + 0x00000004))) //< Pin and comparator status +#define PWM_O_X_FLTSTAT1 (*((reg32_t *)(PWMC_BASE + 0x00000008))) //< Digital comparator status +#define PWM_EXT_0_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000800))) //< PWM0 extended base +#define PWM_EXT_1_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000880))) //< PWM1 extended base +#define PWM_EXT_2_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000900))) //< PWM2 extended base +#define PWM_EXT_3_OFFSET (*((reg32_t *)(PWMC_BASE + 0x00000980))) //< PWM3 extended base + +#endif /* LM3S_PWM_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_ssi.h b/bertos/cpu/cortex-m3/io/lm3s_ssi.h new file mode 100644 index 0000000..001da81 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_ssi.h @@ -0,0 +1,228 @@ +/** + * \file + * + * + * \brief LM3S1968 SSI hardware definitions. + */ + +#ifndef LM3S_SSI_H +#define LM3S_SSI_H + +/** + * The following are defines for the SSI register offsets. + */ +/*\{*/ +#define SSI_O_CR0 0x00000000 //< SSI Control 0 +#define SSI_O_CR1 0x00000004 //< SSI Control 1 +#define SSI_O_DR 0x00000008 //< SSI Data +#define SSI_O_SR 0x0000000C //< SSI Status +#define SSI_O_CPSR 0x00000010 //< SSI Clock Prescale +#define SSI_O_IM 0x00000014 //< SSI Interrupt Mask +#define SSI_O_RIS 0x00000018 //< SSI Raw Interrupt Status +#define SSI_O_MIS 0x0000001C //< SSI Masked Interrupt Status +#define SSI_O_ICR 0x00000020 //< SSI Interrupt Clear +#define SSI_O_DMACTL 0x00000024 //< SSI DMA Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CR0 register. + */ +/*\{*/ +#define SSI_CR0_SCR_M 0x0000FF00 //< SSI Serial Clock Rate +#define SSI_CR0_SPH 0x00000080 //< SSI Serial Clock Phase +#define SSI_CR0_SPO 0x00000040 //< SSI Serial Clock Polarity +#define SSI_CR0_FRF_M 0x00000030 //< SSI Frame Format Select +#define SSI_CR0_FRF_MOTO 0x00000000 //< Freescale SPI Frame Format +#define SSI_CR0_FRF_TI 0x00000010 //< Texas Instruments Synchronous + //< Serial Frame Format +#define SSI_CR0_FRF_NMW 0x00000020 //< MICROWIRE Frame Format +#define SSI_CR0_DSS_M 0x0000000F //< SSI Data Size Select +#define SSI_CR0_DSS_4 0x00000003 //< 4-bit data +#define SSI_CR0_DSS_5 0x00000004 //< 5-bit data +#define SSI_CR0_DSS_6 0x00000005 //< 6-bit data +#define SSI_CR0_DSS_7 0x00000006 //< 7-bit data +#define SSI_CR0_DSS_8 0x00000007 //< 8-bit data +#define SSI_CR0_DSS_9 0x00000008 //< 9-bit data +#define SSI_CR0_DSS_10 0x00000009 //< 10-bit data +#define SSI_CR0_DSS_11 0x0000000A //< 11-bit data +#define SSI_CR0_DSS_12 0x0000000B //< 12-bit data +#define SSI_CR0_DSS_13 0x0000000C //< 13-bit data +#define SSI_CR0_DSS_14 0x0000000D //< 14-bit data +#define SSI_CR0_DSS_15 0x0000000E //< 15-bit data +#define SSI_CR0_DSS_16 0x0000000F //< 16-bit data +#define SSI_CR0_SCR_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CR1 register. + */ +/*\{*/ +#define SSI_CR1_EOT 0x00000010 //< End of Transmission +#define SSI_CR1_SOD 0x00000008 //< SSI Slave Mode Output Disable +#define SSI_CR1_MS 0x00000004 //< SSI Master/Slave Select +#define SSI_CR1_SSE 0x00000002 //< SSI Synchronous Serial Port + //< Enable +#define SSI_CR1_LBM 0x00000001 //< SSI Loopback Mode +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_DR register. + */ +/*\{*/ +#define SSI_DR_DATA_M 0x0000FFFF //< SSI Receive/Transmit Data +#define SSI_DR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_SR register. + */ +/*\{*/ +#define SSI_SR_BSY 0x00000010 //< SSI Busy Bit +#define SSI_SR_RFF 0x00000008 //< SSI Receive FIFO Full +#define SSI_SR_RNE 0x00000004 //< SSI Receive FIFO Not Empty +#define SSI_SR_TNF 0x00000002 //< SSI Transmit FIFO Not Full +#define SSI_SR_TFE 0x00000001 //< SSI Transmit FIFO Empty +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_CPSR register. + */ +/*\{*/ +#define SSI_CPSR_CPSDVSR_M 0x000000FF //< SSI Clock Prescale Divisor +#define SSI_CPSR_CPSDVSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_IM register. + */ +/*\{*/ +#define SSI_IM_TXIM 0x00000008 //< SSI Transmit FIFO Interrupt Mask +#define SSI_IM_RXIM 0x00000004 //< SSI Receive FIFO Interrupt Mask +#define SSI_IM_RTIM 0x00000002 //< SSI Receive Time-Out Interrupt + //< Mask +#define SSI_IM_RORIM 0x00000001 //< SSI Receive Overrun Interrupt + //< Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_RIS register. + */ +/*\{*/ +#define SSI_RIS_TXRIS 0x00000008 //< SSI Transmit FIFO Raw Interrupt + //< Status +#define SSI_RIS_RXRIS 0x00000004 //< SSI Receive FIFO Raw Interrupt + //< Status +#define SSI_RIS_RTRIS 0x00000002 //< SSI Receive Time-Out Raw + //< Interrupt Status +#define SSI_RIS_RORRIS 0x00000001 //< SSI Receive Overrun Raw + //< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_MIS register. + */ +/*\{*/ +#define SSI_MIS_TXMIS 0x00000008 //< SSI Transmit FIFO Masked + //< Interrupt Status +#define SSI_MIS_RXMIS 0x00000004 //< SSI Receive FIFO Masked + //< Interrupt Status +#define SSI_MIS_RTMIS 0x00000002 //< SSI Receive Time-Out Masked + //< Interrupt Status +#define SSI_MIS_RORMIS 0x00000001 //< SSI Receive Overrun Masked + //< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_ICR register. + */ +/*\{*/ +#define SSI_ICR_RTIC 0x00000002 //< SSI Receive Time-Out Interrupt + //< Clear +#define SSI_ICR_RORIC 0x00000001 //< SSI Receive Overrun Interrupt + //< Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the SSI_O_DMACTL register. + */ +/*\{*/ +#define SSI_DMACTL_TXDMAE 0x00000002 //< Transmit DMA Enable +#define SSI_DMACTL_RXDMAE 0x00000001 //< Receive DMA Enable +/*\}*/ + +/** + * The following definitions are deprecated. + */ +/*\{*/ +#ifndef DEPRECATED +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SSI_O_CR0 + * register. + */ +/*\{*/ +#define SSI_CR0_SCR 0x0000FF00 //< Serial clock rate +#define SSI_CR0_FRF_MASK 0x00000030 //< Frame format mask +#define SSI_CR0_DSS 0x0000000F //< Data size select +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SSI_O_CPSR + * register. + */ +/*\{*/ +#define SSI_CPSR_CPSDVSR_MASK 0x000000FF //< Clock prescale +/*\}*/ + +/** + * The following are deprecated defines for the SSI controller's FIFO size. + */ +/*\{*/ +#define TX_FIFO_SIZE (8) //< Number of entries in the TX FIFO +#define RX_FIFO_SIZE (8) //< Number of entries in the RX FIFO +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the interrupt + * mask set and clear, raw interrupt, masked interrupt, and interrupt clear + * registers. + */ +/*\{*/ +#define SSI_INT_TXFF 0x00000008 //< TX FIFO interrupt +#define SSI_INT_RXFF 0x00000004 //< RX FIFO interrupt +#define SSI_INT_RXTO 0x00000002 //< RX timeout interrupt +#define SSI_INT_RXOR 0x00000001 //< RX overrun interrupt +/*\}*/ + +#endif /* DEPRECATED */ + +#endif /* LM3S_SSI_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_sysctl.h b/bertos/cpu/cortex-m3/io/lm3s_sysctl.h new file mode 100644 index 0000000..fdb3386 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_sysctl.h @@ -0,0 +1,1685 @@ +/** + * \file + * + * + * \brief LM3S1968 system control hardware. + */ + +#ifndef LM3S_SYSCTL_H +#define LM3S_SYSCTL_H + +/** + * The following are defines for the System Control register addresses. + */ +/*\{*/ +#define SYSCTL_DID0 0x400FE000 ///< Device Identification 0 +#define SYSCTL_DID1 0x400FE004 ///< Device Identification 1 +#define SYSCTL_DC0 0x400FE008 ///< Device Capabilities 0 +#define SYSCTL_DC1 0x400FE010 ///< Device Capabilities 1 +#define SYSCTL_DC2 0x400FE014 ///< Device Capabilities 2 +#define SYSCTL_DC3 0x400FE018 ///< Device Capabilities 3 +#define SYSCTL_DC4 0x400FE01C ///< Device Capabilities 4 +#define SYSCTL_DC5 0x400FE020 ///< Device Capabilities 5 +#define SYSCTL_DC6 0x400FE024 ///< Device Capabilities 6 +#define SYSCTL_DC7 0x400FE028 ///< Device Capabilities 7 +#define SYSCTL_DC8 0x400FE02C ///< Device Capabilities 8 ADC + ///< Channels +#define SYSCTL_PBORCTL 0x400FE030 ///< Brown-Out Reset Control +#define SYSCTL_LDOPCTL 0x400FE034 ///< LDO Power Control +#define SYSCTL_SRCR0 0x400FE040 ///< Software Reset Control 0 +#define SYSCTL_SRCR1 0x400FE044 ///< Software Reset Control 1 +#define SYSCTL_SRCR2 0x400FE048 ///< Software Reset Control 2 +#define SYSCTL_RIS 0x400FE050 ///< Raw Interrupt Status +#define SYSCTL_IMC 0x400FE054 ///< Interrupt Mask Control +#define SYSCTL_MISC 0x400FE058 ///< Masked Interrupt Status and + ///< Clear +#define SYSCTL_RESC 0x400FE05C ///< Reset Cause +#define SYSCTL_RCC 0x400FE060 ///< Run-Mode Clock Configuration +#define SYSCTL_PLLCFG 0x400FE064 ///< XTAL to PLL Translation +#define SYSCTL_GPIOHSCTL 0x400FE06C ///< GPIO High-Speed Control +#define SYSCTL_GPIOHBCTL 0x400FE06C ///< GPIO High-Performance Bus + ///< Control +#define SYSCTL_RCC2 0x400FE070 ///< Run-Mode Clock Configuration 2 +#define SYSCTL_MOSCCTL 0x400FE07C ///< Main Oscillator Control +#define SYSCTL_RCGC0 0x400FE100 ///< Run Mode Clock Gating Control + ///< Register 0 +#define SYSCTL_RCGC1 0x400FE104 ///< Run Mode Clock Gating Control + ///< Register 1 +#define SYSCTL_RCGC2 0x400FE108 ///< Run Mode Clock Gating Control + ///< Register 2 +#define SYSCTL_SCGC0 0x400FE110 ///< Sleep Mode Clock Gating Control + ///< Register 0 +#define SYSCTL_SCGC1 0x400FE114 ///< Sleep Mode Clock Gating Control + ///< Register 1 +#define SYSCTL_SCGC2 0x400FE118 ///< Sleep Mode Clock Gating Control + ///< Register 2 +#define SYSCTL_DCGC0 0x400FE120 ///< Deep Sleep Mode Clock Gating + ///< Control Register 0 +#define SYSCTL_DCGC1 0x400FE124 ///< Deep-Sleep Mode Clock Gating + ///< Control Register 1 +#define SYSCTL_DCGC2 0x400FE128 ///< Deep Sleep Mode Clock Gating + ///< Control Register 2 +#define SYSCTL_DSLPCLKCFG 0x400FE144 ///< Deep Sleep Clock Configuration +#define SYSCTL_CLKVCLR 0x400FE150 ///< Clock Verification Clear +#define SYSCTL_PIOSCCAL 0x400FE150 ///< Precision Internal Oscillator + ///< Calibration +#define SYSCTL_PIOSCSTAT 0x400FE154 ///< Precision Internal Oscillator + ///< Statistics +#define SYSCTL_LDOARST 0x400FE160 ///< Allow Unregulated LDO to Reset + ///< the Part +#define SYSCTL_I2SMCLKCFG 0x400FE170 ///< I2S MCLK Configuration +#define SYSCTL_DC9 0x400FE190 ///< Device Capabilities 9 ADC + ///< Digital Comparators +#define SYSCTL_NVMSTAT 0x400FE1A0 ///< Non-Volatile Memory Information +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DID0 register. + */ +/*\{*/ +#define SYSCTL_DID0_VER_M 0x70000000 ///< DID0 Version +#define SYSCTL_DID0_VER_0 0x00000000 ///< Initial DID0 register format + ///< definition for Stellaris(R) + ///< Sandstorm-class devices +#define SYSCTL_DID0_VER_1 0x10000000 ///< Second version of the DID0 + ///< register format +#define SYSCTL_DID0_CLASS_M 0x00FF0000 ///< Device Class +#define SYSCTL_DID0_CLASS_SANDSTORM \ + 0x00000000 ///< Sandstorm-class Device +#define SYSCTL_DID0_CLASS_FURY 0x00010000 ///< Stellaris(R) Fury-class devices +#define SYSCTL_DID0_CLASS_DUSTDEVIL \ + 0x00030000 ///< Stellaris(R) DustDevil-class + ///< devices +#define SYSCTL_DID0_CLASS_TEMPEST \ + 0x00040000 ///< Stellaris(R) Tempest-class + ///< microcontrollers +#define SYSCTL_DID0_MAJ_M 0x0000FF00 ///< Major Revision +#define SYSCTL_DID0_MAJ_REVA 0x00000000 ///< Revision A (initial device) +#define SYSCTL_DID0_MAJ_REVB 0x00000100 ///< Revision B (first base layer + ///< revision) +#define SYSCTL_DID0_MAJ_REVC 0x00000200 ///< Revision C (second base layer + ///< revision) +#define SYSCTL_DID0_MIN_M 0x000000FF ///< Minor Revision +#define SYSCTL_DID0_MIN_0 0x00000000 ///< Initial device, or a major + ///< revision update +#define SYSCTL_DID0_MIN_1 0x00000001 ///< First metal layer change +#define SYSCTL_DID0_MIN_2 0x00000002 ///< Second metal layer change +#define SYSCTL_DID0_MIN_3 0x00000003 ///< Minor revision 3 +#define SYSCTL_DID0_MIN_4 0x00000004 ///< Minor revision 4 +#define SYSCTL_DID0_MIN_5 0x00000005 ///< Minor revision 5 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DID1 register. + */ +/*\{*/ +#define SYSCTL_DID1_VER_M 0xF0000000 ///< DID1 Version +#define SYSCTL_DID1_VER_0 0x00000000 ///< Initial DID1 register format + ///< definition, indicating a + ///< Stellaris LM3Snnn device +#define SYSCTL_DID1_VER_1 0x10000000 ///< Second version of the DID1 + ///< register format +#define SYSCTL_DID1_FAM_M 0x0F000000 ///< Family +#define SYSCTL_DID1_FAM_STELLARIS \ + 0x00000000 ///< Stellaris family of + ///< microcontollers, that is, all + ///< devices with external part + ///< numbers starting with LM3S +#define SYSCTL_DID1_PRTNO_M 0x00FF0000 ///< Part Number +#define SYSCTL_DID1_PRTNO_101 0x00010000 ///< LM3S101 +#define SYSCTL_DID1_PRTNO_102 0x00020000 ///< LM3S102 +#define SYSCTL_DID1_PRTNO_300 0x00190000 ///< LM3S300 +#define SYSCTL_DID1_PRTNO_301 0x00110000 ///< LM3S301 +#define SYSCTL_DID1_PRTNO_308 0x001A0000 ///< LM3S308 +#define SYSCTL_DID1_PRTNO_310 0x00120000 ///< LM3S310 +#define SYSCTL_DID1_PRTNO_315 0x00130000 ///< LM3S315 +#define SYSCTL_DID1_PRTNO_316 0x00140000 ///< LM3S316 +#define SYSCTL_DID1_PRTNO_317 0x00170000 ///< LM3S317 +#define SYSCTL_DID1_PRTNO_328 0x00150000 ///< LM3S328 +#define SYSCTL_DID1_PRTNO_600 0x002A0000 ///< LM3S600 +#define SYSCTL_DID1_PRTNO_601 0x00210000 ///< LM3S601 +#define SYSCTL_DID1_PRTNO_608 0x002B0000 ///< LM3S608 +#define SYSCTL_DID1_PRTNO_610 0x00220000 ///< LM3S610 +#define SYSCTL_DID1_PRTNO_611 0x00230000 ///< LM3S611 +#define SYSCTL_DID1_PRTNO_612 0x00240000 ///< LM3S612 +#define SYSCTL_DID1_PRTNO_613 0x00250000 ///< LM3S613 +#define SYSCTL_DID1_PRTNO_615 0x00260000 ///< LM3S615 +#define SYSCTL_DID1_PRTNO_617 0x00280000 ///< LM3S617 +#define SYSCTL_DID1_PRTNO_618 0x00290000 ///< LM3S618 +#define SYSCTL_DID1_PRTNO_628 0x00270000 ///< LM3S628 +#define SYSCTL_DID1_PRTNO_800 0x00380000 ///< LM3S800 +#define SYSCTL_DID1_PRTNO_801 0x00310000 ///< LM3S801 +#define SYSCTL_DID1_PRTNO_808 0x00390000 ///< LM3S808 +#define SYSCTL_DID1_PRTNO_811 0x00320000 ///< LM3S811 +#define SYSCTL_DID1_PRTNO_812 0x00330000 ///< LM3S812 +#define SYSCTL_DID1_PRTNO_815 0x00340000 ///< LM3S815 +#define SYSCTL_DID1_PRTNO_817 0x00360000 ///< LM3S817 +#define SYSCTL_DID1_PRTNO_818 0x00370000 ///< LM3S818 +#define SYSCTL_DID1_PRTNO_828 0x00350000 ///< LM3S828 +#define SYSCTL_DID1_PRTNO_1110 0x00BF0000 ///< LM3S1110 +#define SYSCTL_DID1_PRTNO_1133 0x00C30000 ///< LM3S1133 +#define SYSCTL_DID1_PRTNO_1138 0x00C50000 ///< LM3S1138 +#define SYSCTL_DID1_PRTNO_1150 0x00C10000 ///< LM3S1150 +#define SYSCTL_DID1_PRTNO_1162 0x00C40000 ///< LM3S1162 +#define SYSCTL_DID1_PRTNO_1165 0x00C20000 ///< LM3S1165 +#define SYSCTL_DID1_PRTNO_1332 0x00C60000 ///< LM3S1332 +#define SYSCTL_DID1_PRTNO_1435 0x00BC0000 ///< LM3S1435 +#define SYSCTL_DID1_PRTNO_1439 0x00BA0000 ///< LM3S1439 +#define SYSCTL_DID1_PRTNO_1512 0x00BB0000 ///< LM3S1512 +#define SYSCTL_DID1_PRTNO_1538 0x00C70000 ///< LM3S1538 +#define SYSCTL_DID1_PRTNO_1601 0x00DB0000 ///< LM3S1601 +#define SYSCTL_DID1_PRTNO_1607 0x00060000 ///< LM3S1607 +#define SYSCTL_DID1_PRTNO_1608 0x00DA0000 ///< LM3S1608 +#define SYSCTL_DID1_PRTNO_1620 0x00C00000 ///< LM3S1620 +#define SYSCTL_DID1_PRTNO_1625 0x00030000 ///< LM3S1625 +#define SYSCTL_DID1_PRTNO_1626 0x00040000 ///< LM3S1626 +#define SYSCTL_DID1_PRTNO_1627 0x00050000 ///< LM3S1627 +#define SYSCTL_DID1_PRTNO_1635 0x00B30000 ///< LM3S1635 +#define SYSCTL_DID1_PRTNO_1637 0x00BD0000 ///< LM3S1637 +#define SYSCTL_DID1_PRTNO_1751 0x00B90000 ///< LM3S1751 +#define SYSCTL_DID1_PRTNO_1776 0x00100000 ///< LM3S1776 +#define SYSCTL_DID1_PRTNO_1811 0x00160000 ///< LM3S1811 +#define SYSCTL_DID1_PRTNO_1816 0x003D0000 ///< LM3S1816 +#define SYSCTL_DID1_PRTNO_1850 0x00B40000 ///< LM3S1850 +#define SYSCTL_DID1_PRTNO_1911 0x00DD0000 ///< LM3S1911 +#define SYSCTL_DID1_PRTNO_1918 0x00DC0000 ///< LM3S1918 +#define SYSCTL_DID1_PRTNO_1937 0x00B70000 ///< LM3S1937 +#define SYSCTL_DID1_PRTNO_1958 0x00BE0000 ///< LM3S1958 +#define SYSCTL_DID1_PRTNO_1960 0x00B50000 ///< LM3S1960 +#define SYSCTL_DID1_PRTNO_1968 0x00B80000 ///< LM3S1968 +#define SYSCTL_DID1_PRTNO_1J11 0x000F0000 ///< LM3S1J11 +#define SYSCTL_DID1_PRTNO_1J16 0x003C0000 ///< LM3S1J16 +#define SYSCTL_DID1_PRTNO_1N11 0x000E0000 ///< LM3S1N11 +#define SYSCTL_DID1_PRTNO_1N16 0x003B0000 ///< LM3S1N16 +#define SYSCTL_DID1_PRTNO_1W16 0x00300000 ///< LM3S1W16 +#define SYSCTL_DID1_PRTNO_1Z16 0x002F0000 ///< LM3S1Z16 +#define SYSCTL_DID1_PRTNO_2110 0x00510000 ///< LM3S2110 +#define SYSCTL_DID1_PRTNO_2139 0x00840000 ///< LM3S2139 +#define SYSCTL_DID1_PRTNO_2276 0x00390000 ///< LM3S2276 +#define SYSCTL_DID1_PRTNO_2410 0x00A20000 ///< LM3S2410 +#define SYSCTL_DID1_PRTNO_2412 0x00590000 ///< LM3S2412 +#define SYSCTL_DID1_PRTNO_2432 0x00560000 ///< LM3S2432 +#define SYSCTL_DID1_PRTNO_2533 0x005A0000 ///< LM3S2533 +#define SYSCTL_DID1_PRTNO_2601 0x00E10000 ///< LM3S2601 +#define SYSCTL_DID1_PRTNO_2608 0x00E00000 ///< LM3S2608 +#define SYSCTL_DID1_PRTNO_2616 0x00330000 ///< LM3S2616 +#define SYSCTL_DID1_PRTNO_2620 0x00570000 ///< LM3S2620 +#define SYSCTL_DID1_PRTNO_2637 0x00850000 ///< LM3S2637 +#define SYSCTL_DID1_PRTNO_2651 0x00530000 ///< LM3S2651 +#define SYSCTL_DID1_PRTNO_2671 0x00800000 ///< LM3S2671 +#define SYSCTL_DID1_PRTNO_2678 0x00500000 ///< LM3S2678 +#define SYSCTL_DID1_PRTNO_2730 0x00A40000 ///< LM3S2730 +#define SYSCTL_DID1_PRTNO_2739 0x00520000 ///< LM3S2739 +#define SYSCTL_DID1_PRTNO_2776 0x003A0000 ///< LM3S2776 +#define SYSCTL_DID1_PRTNO_2793 0x006D0000 ///< LM3S2793 +#define SYSCTL_DID1_PRTNO_2911 0x00E30000 ///< LM3S2911 +#define SYSCTL_DID1_PRTNO_2918 0x00E20000 ///< LM3S2918 +#define SYSCTL_DID1_PRTNO_2939 0x00540000 ///< LM3S2939 +#define SYSCTL_DID1_PRTNO_2948 0x008F0000 ///< LM3S2948 +#define SYSCTL_DID1_PRTNO_2950 0x00580000 ///< LM3S2950 +#define SYSCTL_DID1_PRTNO_2965 0x00550000 ///< LM3S2965 +#define SYSCTL_DID1_PRTNO_2B93 0x006C0000 ///< LM3S2B93 +#define SYSCTL_DID1_PRTNO_3651 0x00430000 ///< LM3S3651 +#define SYSCTL_DID1_PRTNO_3739 0x00440000 ///< LM3S3739 +#define SYSCTL_DID1_PRTNO_3748 0x00490000 ///< LM3S3748 +#define SYSCTL_DID1_PRTNO_3749 0x00450000 ///< LM3S3749 +#define SYSCTL_DID1_PRTNO_3826 0x00420000 ///< LM3S3826 +#define SYSCTL_DID1_PRTNO_3J26 0x00410000 ///< LM3S3J26 +#define SYSCTL_DID1_PRTNO_3N26 0x00400000 ///< LM3S3N26 +#define SYSCTL_DID1_PRTNO_3W26 0x003F0000 ///< LM3S3W26 +#define SYSCTL_DID1_PRTNO_3Z26 0x003E0000 ///< LM3S3Z26 +#define SYSCTL_DID1_PRTNO_5632 0x00810000 ///< LM3S5632 +#define SYSCTL_DID1_PRTNO_5651 0x000C0000 ///< LM3S5651 +#define SYSCTL_DID1_PRTNO_5652 0x008A0000 ///< LM3S5652 +#define SYSCTL_DID1_PRTNO_5656 0x004D0000 ///< LM3S5656 +#define SYSCTL_DID1_PRTNO_5662 0x00910000 ///< LM3S5662 +#define SYSCTL_DID1_PRTNO_5732 0x00960000 ///< LM3S5732 +#define SYSCTL_DID1_PRTNO_5737 0x00970000 ///< LM3S5737 +#define SYSCTL_DID1_PRTNO_5739 0x00A00000 ///< LM3S5739 +#define SYSCTL_DID1_PRTNO_5747 0x00990000 ///< LM3S5747 +#define SYSCTL_DID1_PRTNO_5749 0x00A70000 ///< LM3S5749 +#define SYSCTL_DID1_PRTNO_5752 0x009A0000 ///< LM3S5752 +#define SYSCTL_DID1_PRTNO_5762 0x009C0000 ///< LM3S5762 +#define SYSCTL_DID1_PRTNO_5791 0x00690000 ///< LM3S5791 +#define SYSCTL_DID1_PRTNO_5951 0x000B0000 ///< LM3S5951 +#define SYSCTL_DID1_PRTNO_5956 0x004E0000 ///< LM3S5956 +#define SYSCTL_DID1_PRTNO_5B91 0x00680000 ///< LM3S5B91 +#define SYSCTL_DID1_PRTNO_5K31 0x00090000 ///< LM3S5K31 +#define SYSCTL_DID1_PRTNO_5K36 0x004A0000 ///< LM3S5K36 +#define SYSCTL_DID1_PRTNO_5P31 0x000A0000 ///< LM3S5P31 +#define SYSCTL_DID1_PRTNO_5P36 0x00480000 ///< LM3S5P36 +#define SYSCTL_DID1_PRTNO_5P51 0x000D0000 ///< LM3S5P51 +#define SYSCTL_DID1_PRTNO_5P56 0x004C0000 ///< LM3S5P56 +#define SYSCTL_DID1_PRTNO_5R31 0x00070000 ///< LM3S5R31 +#define SYSCTL_DID1_PRTNO_5R36 0x004B0000 ///< LM3S5R36 +#define SYSCTL_DID1_PRTNO_5T36 0x00470000 ///< LM3S5T36 +#define SYSCTL_DID1_PRTNO_5Y36 0x00460000 ///< LM3S5Y36 +#define SYSCTL_DID1_PRTNO_6100 0x00A10000 ///< LM3S6100 +#define SYSCTL_DID1_PRTNO_6110 0x00740000 ///< LM3S6110 +#define SYSCTL_DID1_PRTNO_6420 0x00A50000 ///< LM3S6420 +#define SYSCTL_DID1_PRTNO_6422 0x00820000 ///< LM3S6422 +#define SYSCTL_DID1_PRTNO_6432 0x00750000 ///< LM3S6432 +#define SYSCTL_DID1_PRTNO_6537 0x00760000 ///< LM3S6537 +#define SYSCTL_DID1_PRTNO_6610 0x00710000 ///< LM3S6610 +#define SYSCTL_DID1_PRTNO_6611 0x00E70000 ///< LM3S6611 +#define SYSCTL_DID1_PRTNO_6618 0x00E60000 ///< LM3S6618 +#define SYSCTL_DID1_PRTNO_6633 0x00830000 ///< LM3S6633 +#define SYSCTL_DID1_PRTNO_6637 0x008B0000 ///< LM3S6637 +#define SYSCTL_DID1_PRTNO_6730 0x00A30000 ///< LM3S6730 +#define SYSCTL_DID1_PRTNO_6753 0x00770000 ///< LM3S6753 +#define SYSCTL_DID1_PRTNO_6911 0x00E90000 ///< LM3S6911 +#define SYSCTL_DID1_PRTNO_6918 0x00E80000 ///< LM3S6918 +#define SYSCTL_DID1_PRTNO_6938 0x00890000 ///< LM3S6938 +#define SYSCTL_DID1_PRTNO_6950 0x00720000 ///< LM3S6950 +#define SYSCTL_DID1_PRTNO_6952 0x00780000 ///< LM3S6952 +#define SYSCTL_DID1_PRTNO_6965 0x00730000 ///< LM3S6965 +#define SYSCTL_DID1_PRTNO_8530 0x00640000 ///< LM3S8530 +#define SYSCTL_DID1_PRTNO_8538 0x008E0000 ///< LM3S8538 +#define SYSCTL_DID1_PRTNO_8630 0x00610000 ///< LM3S8630 +#define SYSCTL_DID1_PRTNO_8730 0x00630000 ///< LM3S8730 +#define SYSCTL_DID1_PRTNO_8733 0x008D0000 ///< LM3S8733 +#define SYSCTL_DID1_PRTNO_8738 0x00860000 ///< LM3S8738 +#define SYSCTL_DID1_PRTNO_8930 0x00650000 ///< LM3S8930 +#define SYSCTL_DID1_PRTNO_8933 0x008C0000 ///< LM3S8933 +#define SYSCTL_DID1_PRTNO_8938 0x00880000 ///< LM3S8938 +#define SYSCTL_DID1_PRTNO_8962 0x00A60000 ///< LM3S8962 +#define SYSCTL_DID1_PRTNO_8970 0x00620000 ///< LM3S8970 +#define SYSCTL_DID1_PRTNO_8971 0x00D70000 ///< LM3S8971 +#define SYSCTL_DID1_PRTNO_9790 0x00670000 ///< LM3S9790 +#define SYSCTL_DID1_PRTNO_9792 0x006B0000 ///< LM3S9792 +#define SYSCTL_DID1_PRTNO_9997 0x00200000 ///< LM3S9997 +#define SYSCTL_DID1_PRTNO_9B90 0x00660000 ///< LM3S9B90 +#define SYSCTL_DID1_PRTNO_9B92 0x006A0000 ///< LM3S9B92 +#define SYSCTL_DID1_PRTNO_9B95 0x006E0000 ///< LM3S9B95 +#define SYSCTL_DID1_PRTNO_9B96 0x006F0000 ///< LM3S9B96 +#define SYSCTL_DID1_PRTNO_9L97 0x00180000 ///< LM3S9L97 +#define SYSCTL_DID1_PINCNT_M 0x0000E000 ///< Package Pin Count +#define SYSCTL_DID1_PINCNT_28 0x00000000 ///< 28 pin package +#define SYSCTL_DID1_PINCNT_48 0x00002000 ///< 48 pin package +#define SYSCTL_DID1_PINCNT_100 0x00004000 ///< 100-pin package +#define SYSCTL_DID1_PINCNT_64 0x00006000 ///< 64-pin package +#define SYSCTL_DID1_TEMP_M 0x000000E0 ///< Temperature Range +#define SYSCTL_DID1_TEMP_C 0x00000000 ///< Commercial temperature range (0C + ///< to 70C) +#define SYSCTL_DID1_TEMP_I 0x00000020 ///< Industrial temperature range + ///< (-40C to 85C) +#define SYSCTL_DID1_TEMP_E 0x00000040 ///< Extended temperature range (-40C + ///< to 105C) +#define SYSCTL_DID1_PKG_M 0x00000018 ///< Package Type +#define SYSCTL_DID1_PKG_SOIC 0x00000000 ///< SOIC package +#define SYSCTL_DID1_PKG_QFP 0x00000008 ///< LQFP package +#define SYSCTL_DID1_PKG_BGA 0x00000010 ///< BGA package +#define SYSCTL_DID1_PKG_QFN 0x00000018 ///< QFN package +#define SYSCTL_DID1_ROHS 0x00000004 ///< RoHS-Compliance +#define SYSCTL_DID1_QUAL_M 0x00000003 ///< Qualification Status +#define SYSCTL_DID1_QUAL_ES 0x00000000 ///< Engineering Sample (unqualified) +#define SYSCTL_DID1_QUAL_PP 0x00000001 ///< Pilot Production (unqualified) +#define SYSCTL_DID1_QUAL_FQ 0x00000002 ///< Fully Qualified +#define SYSCTL_DID1_PRTNO_S 16 ///< Part number shift +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC0 register. + */ +/*\{*/ +#define SYSCTL_DC0_SRAMSZ_M 0xFFFF0000 ///< SRAM Size +#define SYSCTL_DC0_SRAMSZ_2KB 0x00070000 ///< 2 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_4KB 0x000F0000 ///< 4 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_6KB 0x00170000 ///< 6 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_8KB 0x001F0000 ///< 8 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_12KB 0x002F0000 ///< 12 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_16KB 0x003F0000 ///< 16 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_20KB 0x004F0000 ///< 20 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_24KB 0x005F0000 ///< 24 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_32KB 0x007F0000 ///< 32 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_48KB 0x00BF0000 ///< 48 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_64KB 0x00FF0000 ///< 64 KB of SRAM +#define SYSCTL_DC0_SRAMSZ_96KB 0x017F0000 ///< 96 KB of SRAM +#define SYSCTL_DC0_FLASHSZ_M 0x0000FFFF ///< Flash Size +#define SYSCTL_DC0_FLASHSZ_8KB 0x00000003 ///< 8 KB of Flash +#define SYSCTL_DC0_FLASHSZ_16KB 0x00000007 ///< 16 KB of Flash +#define SYSCTL_DC0_FLASHSZ_32KB 0x0000000F ///< 32 KB of Flash +#define SYSCTL_DC0_FLASHSZ_64KB 0x0000001F ///< 64 KB of Flash +#define SYSCTL_DC0_FLASHSZ_96KB 0x0000002F ///< 96 KB of Flash +#define SYSCTL_DC0_FLASHSZ_128K 0x0000003F ///< 128 KB of Flash +#define SYSCTL_DC0_FLASHSZ_256K 0x0000007F ///< 256 KB of Flash +#define SYSCTL_DC0_SRAMSZ_S 16 ///< SRAM size shift +#define SYSCTL_DC0_FLASHSZ_S 0 ///< Flash size shift +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC1 register. + */ +/*\{*/ +#define SYSCTL_DC1_WDT1 0x10000000 ///< Watchdog Timer1 Present +#define SYSCTL_DC1_CAN2 0x04000000 ///< CAN Module 2 Present +#define SYSCTL_DC1_CAN1 0x02000000 ///< CAN Module 1 Present +#define SYSCTL_DC1_CAN0 0x01000000 ///< CAN Module 0 Present +#define SYSCTL_DC1_PWM 0x00100000 ///< PWM Module Present +#define SYSCTL_DC1_ADC1 0x00020000 ///< ADC Module 1 Present +#define SYSCTL_DC1_ADC0 0x00010000 ///< ADC Module 0 Present +#define SYSCTL_DC1_MINSYSDIV_M 0x0000F000 ///< System Clock Divider +#define SYSCTL_DC1_MINSYSDIV_100 \ + 0x00001000 ///< Divide VCO (400MHZ) by 5 minimum +#define SYSCTL_DC1_MINSYSDIV_66 0x00002000 ///< Divide VCO (400MHZ) by 2*2 + 2 = + ///< 6 minimum +#define SYSCTL_DC1_MINSYSDIV_50 0x00003000 ///< Specifies a 50-MHz CPU clock + ///< with a PLL divider of 4 +#define SYSCTL_DC1_MINSYSDIV_25 0x00007000 ///< Specifies a 25-MHz clock with a + ///< PLL divider of 8 +#define SYSCTL_DC1_MINSYSDIV_20 0x00009000 ///< Specifies a 20-MHz clock with a + ///< PLL divider of 10 +#define SYSCTL_DC1_ADCSPD_M 0x00000F00 ///< Max ADC Speed +#define SYSCTL_DC1_ADCSPD_125K 0x00000000 ///< 125Ksps ADC +#define SYSCTL_DC1_ADCSPD_250K 0x00000100 ///< 250K samples/second +#define SYSCTL_DC1_ADCSPD_500K 0x00000200 ///< 500K samples/second +#define SYSCTL_DC1_ADCSPD_1M 0x00000300 ///< 1M samples/second +#define SYSCTL_DC1_ADC1SPD_M 0x00000C00 ///< Max ADC1 Speed +#define SYSCTL_DC1_ADC1SPD_1M 0x00000C00 ///< 1M samples/second +#define SYSCTL_DC1_ADC0SPD_M 0x00000300 ///< Max ADC0 Speed +#define SYSCTL_DC1_ADC0SPD_1M 0x00000300 ///< 1M samples/second +#define SYSCTL_DC1_MPU 0x00000080 ///< MPU Present +#define SYSCTL_DC1_HIB 0x00000040 ///< Hibernation Module Present +#define SYSCTL_DC1_TEMP 0x00000020 ///< Temp Sensor Present +#define SYSCTL_DC1_PLL 0x00000010 ///< PLL Present +#define SYSCTL_DC1_WDT0 0x00000008 ///< Watchdog Timer 0 Present +#define SYSCTL_DC1_SWO 0x00000004 ///< SWO Trace Port Present +#define SYSCTL_DC1_SWD 0x00000002 ///< SWD Present +#define SYSCTL_DC1_JTAG 0x00000001 ///< JTAG Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC2 register. + */ +/*\{*/ +#define SYSCTL_DC2_EPI0 0x40000000 ///< EPI Module 0 Present +#define SYSCTL_DC2_I2S0 0x10000000 ///< I2S Module 0 Present +#define SYSCTL_DC2_COMP2 0x04000000 ///< Analog Comparator 2 Present +#define SYSCTL_DC2_COMP1 0x02000000 ///< Analog Comparator 1 Present +#define SYSCTL_DC2_COMP0 0x01000000 ///< Analog Comparator 0 Present +#define SYSCTL_DC2_TIMER3 0x00080000 ///< Timer Module 3 Present +#define SYSCTL_DC2_TIMER2 0x00040000 ///< Timer Module 2 Present +#define SYSCTL_DC2_TIMER1 0x00020000 ///< Timer Module 1 Present +#define SYSCTL_DC2_TIMER0 0x00010000 ///< Timer Module 0 Present +#define SYSCTL_DC2_I2C1 0x00004000 ///< I2C Module 1 Present +#define SYSCTL_DC2_I2C0 0x00001000 ///< I2C Module 0 Present +#define SYSCTL_DC2_QEI1 0x00000200 ///< QEI Module 1 Present +#define SYSCTL_DC2_QEI0 0x00000100 ///< QEI Module 0 Present +#define SYSCTL_DC2_SSI1 0x00000020 ///< SSI Module 1 Present +#define SYSCTL_DC2_SSI0 0x00000010 ///< SSI Module 0 Present +#define SYSCTL_DC2_UART2 0x00000004 ///< UART Module 2 Present +#define SYSCTL_DC2_UART1 0x00000002 ///< UART Module 1 Present +#define SYSCTL_DC2_UART0 0x00000001 ///< UART Module 0 Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC3 register. + */ +/*\{*/ +#define SYSCTL_DC3_32KHZ 0x80000000 ///< 32KHz Input Clock Available +#define SYSCTL_DC3_CCP5 0x20000000 ///< CCP5 Pin Present +#define SYSCTL_DC3_CCP4 0x10000000 ///< CCP4 Pin Present +#define SYSCTL_DC3_CCP3 0x08000000 ///< CCP3 Pin Present +#define SYSCTL_DC3_CCP2 0x04000000 ///< CCP2 Pin Present +#define SYSCTL_DC3_CCP1 0x02000000 ///< CCP1 Pin Present +#define SYSCTL_DC3_CCP0 0x01000000 ///< CCP0 Pin Present +#define SYSCTL_DC3_ADC0AIN7 0x00800000 ///< ADC Module 0 AIN7 Pin Present +#define SYSCTL_DC3_ADC0AIN6 0x00400000 ///< ADC Module 0 AIN6 Pin Present +#define SYSCTL_DC3_ADC0AIN5 0x00200000 ///< ADC Module 0 AIN5 Pin Present +#define SYSCTL_DC3_ADC0AIN4 0x00100000 ///< ADC Module 0 AIN4 Pin Present +#define SYSCTL_DC3_ADC0AIN3 0x00080000 ///< ADC Module 0 AIN3 Pin Present +#define SYSCTL_DC3_ADC0AIN2 0x00040000 ///< ADC Module 0 AIN2 Pin Present +#define SYSCTL_DC3_ADC0AIN1 0x00020000 ///< ADC Module 0 AIN1 Pin Present +#define SYSCTL_DC3_ADC0AIN0 0x00010000 ///< ADC Module 0 AIN0 Pin Present +#define SYSCTL_DC3_PWMFAULT 0x00008000 ///< PWM Fault Pin Present +#define SYSCTL_DC3_C2O 0x00004000 ///< C2o Pin Present +#define SYSCTL_DC3_C2PLUS 0x00002000 ///< C2+ Pin Present +#define SYSCTL_DC3_C2MINUS 0x00001000 ///< C2- Pin Present +#define SYSCTL_DC3_C1O 0x00000800 ///< C1o Pin Present +#define SYSCTL_DC3_C1PLUS 0x00000400 ///< C1+ Pin Present +#define SYSCTL_DC3_C1MINUS 0x00000200 ///< C1- Pin Present +#define SYSCTL_DC3_C0O 0x00000100 ///< C0o Pin Present +#define SYSCTL_DC3_C0PLUS 0x00000080 ///< C0+ Pin Present +#define SYSCTL_DC3_C0MINUS 0x00000040 ///< C0- Pin Present +#define SYSCTL_DC3_PWM5 0x00000020 ///< PWM5 Pin Present +#define SYSCTL_DC3_PWM4 0x00000010 ///< PWM4 Pin Present +#define SYSCTL_DC3_PWM3 0x00000008 ///< PWM3 Pin Present +#define SYSCTL_DC3_PWM2 0x00000004 ///< PWM2 Pin Present +#define SYSCTL_DC3_PWM1 0x00000002 ///< PWM1 Pin Present +#define SYSCTL_DC3_PWM0 0x00000001 ///< PWM0 Pin Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC4 register. + */ +/*\{*/ +#define SYSCTL_DC4_ETH 0x50000000 ///< Ethernet present +#define SYSCTL_DC4_EPHY0 0x40000000 ///< Ethernet PHY Layer 0 Present +#define SYSCTL_DC4_EMAC0 0x10000000 ///< Ethernet MAC Layer 0 Present +#define SYSCTL_DC4_E1588 0x01000000 ///< 1588 Capable +#define SYSCTL_DC4_PICAL 0x00040000 ///< PIOSC Calibrate +#define SYSCTL_DC4_CCP7 0x00008000 ///< CCP7 Pin Present +#define SYSCTL_DC4_CCP6 0x00004000 ///< CCP6 Pin Present +#define SYSCTL_DC4_UDMA 0x00002000 ///< Micro-DMA Module Present +#define SYSCTL_DC4_ROM 0x00001000 ///< Internal Code ROM Present +#define SYSCTL_DC4_GPIOJ 0x00000100 ///< GPIO Port J Present +#define SYSCTL_DC4_GPIOH 0x00000080 ///< GPIO Port H Present +#define SYSCTL_DC4_GPIOG 0x00000040 ///< GPIO Port G Present +#define SYSCTL_DC4_GPIOF 0x00000020 ///< GPIO Port F Present +#define SYSCTL_DC4_GPIOE 0x00000010 ///< GPIO Port E Present +#define SYSCTL_DC4_GPIOD 0x00000008 ///< GPIO Port D Present +#define SYSCTL_DC4_GPIOC 0x00000004 ///< GPIO Port C Present +#define SYSCTL_DC4_GPIOB 0x00000002 ///< GPIO Port B Present +#define SYSCTL_DC4_GPIOA 0x00000001 ///< GPIO Port A Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC5 register. + */ +/*\{*/ +#define SYSCTL_DC5_PWMFAULT3 0x08000000 ///< PWM Fault 3 Pin Present +#define SYSCTL_DC5_PWMFAULT2 0x04000000 ///< PWM Fault 2 Pin Present +#define SYSCTL_DC5_PWMFAULT1 0x02000000 ///< PWM Fault 1 Pin Present +#define SYSCTL_DC5_PWMFAULT0 0x01000000 ///< PWM Fault 0 Pin Present +#define SYSCTL_DC5_PWMEFLT 0x00200000 ///< PWM Extended Fault Active +#define SYSCTL_DC5_PWMESYNC 0x00100000 ///< PWM Extended SYNC Active +#define SYSCTL_DC5_PWM7 0x00000080 ///< PWM7 Pin Present +#define SYSCTL_DC5_PWM6 0x00000040 ///< PWM6 Pin Present +#define SYSCTL_DC5_PWM5 0x00000020 ///< PWM5 Pin Present +#define SYSCTL_DC5_PWM4 0x00000010 ///< PWM4 Pin Present +#define SYSCTL_DC5_PWM3 0x00000008 ///< PWM3 Pin Present +#define SYSCTL_DC5_PWM2 0x00000004 ///< PWM2 Pin Present +#define SYSCTL_DC5_PWM1 0x00000002 ///< PWM1 Pin Present +#define SYSCTL_DC5_PWM0 0x00000001 ///< PWM0 Pin Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC6 register. + */ +/*\{*/ +#define SYSCTL_DC6_USB0PHY 0x00000010 ///< USB Module 0 PHY Present +#define SYSCTL_DC6_USB0_M 0x00000003 ///< USB Module 0 Present +#define SYSCTL_DC6_USB0_DEV 0x00000001 ///< USB0 is Device Only +#define SYSCTL_DC6_USB0_HOSTDEV 0x00000002 ///< USB is Device or Host +#define SYSCTL_DC6_USB0_OTG 0x00000003 ///< USB0 is OTG +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC7 register. + */ +/*\{*/ +#define SYSCTL_DC7_DMACH30 0x40000000 ///< SW +#define SYSCTL_DC7_DMACH29 0x20000000 ///< I2S0_TX / CAN1_TX +#define SYSCTL_DC7_DMACH28 0x10000000 ///< I2S0_RX / CAN1_RX +#define SYSCTL_DC7_DMACH27 0x08000000 ///< CAN1_TX / ADC1_SS3 +#define SYSCTL_DC7_DMACH26 0x04000000 ///< CAN1_RX / ADC1_SS2 +#define SYSCTL_DC7_DMACH25 0x02000000 ///< SSI1_TX / ADC1_SS1 +#define SYSCTL_DC7_SSI1_TX 0x02000000 ///< SSI1 TX on uDMA Ch25 +#define SYSCTL_DC7_SSI1_RX 0x01000000 ///< SSI1 RX on uDMA Ch24 +#define SYSCTL_DC7_DMACH24 0x01000000 ///< SSI1_RX / ADC1_SS0 +#define SYSCTL_DC7_UART1_TX 0x00800000 ///< UART1 TX on uDMA Ch23 +#define SYSCTL_DC7_DMACH23 0x00800000 ///< UART1_TX / CAN2_TX +#define SYSCTL_DC7_DMACH22 0x00400000 ///< UART1_RX / CAN2_RX +#define SYSCTL_DC7_UART1_RX 0x00400000 ///< UART1 RX on uDMA Ch22 +#define SYSCTL_DC7_DMACH21 0x00200000 ///< Timer1B / EPI0_WFIFO +#define SYSCTL_DC7_DMACH20 0x00100000 ///< Timer1A / EPI0_NBRFIFO +#define SYSCTL_DC7_DMACH19 0x00080000 ///< Timer0B / Timer1B +#define SYSCTL_DC7_DMACH18 0x00040000 ///< Timer0A / Timer1A +#define SYSCTL_DC7_DMACH17 0x00020000 ///< ADC0_SS3 +#define SYSCTL_DC7_DMACH16 0x00010000 ///< ADC0_SS2 +#define SYSCTL_DC7_DMACH15 0x00008000 ///< ADC0_SS1 / Timer2B +#define SYSCTL_DC7_DMACH14 0x00004000 ///< ADC0_SS0 / Timer2A +#define SYSCTL_DC7_DMACH13 0x00002000 ///< CAN0_TX / UART2_TX +#define SYSCTL_DC7_DMACH12 0x00001000 ///< CAN0_RX / UART2_RX +#define SYSCTL_DC7_SSI0_TX 0x00000800 ///< SSI0 TX on uDMA Ch11 +#define SYSCTL_DC7_DMACH11 0x00000800 ///< SSI0_TX / SSI1_TX +#define SYSCTL_DC7_SSI0_RX 0x00000400 ///< SSI0 RX on uDMA Ch10 +#define SYSCTL_DC7_DMACH10 0x00000400 ///< SSI0_RX / SSI1_RX +#define SYSCTL_DC7_UART0_TX 0x00000200 ///< UART0 TX on uDMA Ch9 +#define SYSCTL_DC7_DMACH9 0x00000200 ///< UART0_TX / UART1_TX +#define SYSCTL_DC7_DMACH8 0x00000100 ///< UART0_RX / UART1_RX +#define SYSCTL_DC7_UART0_RX 0x00000100 ///< UART0 RX on uDMA Ch8 +#define SYSCTL_DC7_DMACH7 0x00000080 ///< ETH_TX / Timer2B +#define SYSCTL_DC7_DMACH6 0x00000040 ///< ETH_RX / Timer2A +#define SYSCTL_DC7_DMACH5 0x00000020 ///< USB_EP3_TX / Timer2B +#define SYSCTL_DC7_USB_EP3_TX 0x00000020 ///< USB EP3 TX on uDMA Ch5 +#define SYSCTL_DC7_USB_EP3_RX 0x00000010 ///< USB EP3 RX on uDMA Ch4 +#define SYSCTL_DC7_DMACH4 0x00000010 ///< USB_EP3_RX / Timer2A +#define SYSCTL_DC7_USB_EP2_TX 0x00000008 ///< USB EP2 TX on uDMA Ch3 +#define SYSCTL_DC7_DMACH3 0x00000008 ///< USB_EP2_TX / Timer3B +#define SYSCTL_DC7_USB_EP2_RX 0x00000004 ///< USB EP2 RX on uDMA Ch2 +#define SYSCTL_DC7_DMACH2 0x00000004 ///< USB_EP2_RX / Timer3A +#define SYSCTL_DC7_USB_EP1_TX 0x00000002 ///< USB EP1 TX on uDMA Ch1 +#define SYSCTL_DC7_DMACH1 0x00000002 ///< USB_EP1_TX / UART2_TX +#define SYSCTL_DC7_DMACH0 0x00000001 ///< USB_EP1_RX / UART2_RX +#define SYSCTL_DC7_USB_EP1_RX 0x00000001 ///< USB EP1 RX on uDMA Ch0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC8 register. + */ +/*\{*/ +#define SYSCTL_DC8_ADC1AIN15 0x80000000 ///< ADC Module 1 AIN15 Pin Present +#define SYSCTL_DC8_ADC1AIN14 0x40000000 ///< ADC Module 1 AIN14 Pin Present +#define SYSCTL_DC8_ADC1AIN13 0x20000000 ///< ADC Module 1 AIN13 Pin Present +#define SYSCTL_DC8_ADC1AIN12 0x10000000 ///< ADC Module 1 AIN12 Pin Present +#define SYSCTL_DC8_ADC1AIN11 0x08000000 ///< ADC Module 1 AIN11 Pin Present +#define SYSCTL_DC8_ADC1AIN10 0x04000000 ///< ADC Module 1 AIN10 Pin Present +#define SYSCTL_DC8_ADC1AIN9 0x02000000 ///< ADC Module 1 AIN9 Pin Present +#define SYSCTL_DC8_ADC1AIN8 0x01000000 ///< ADC Module 1 AIN8 Pin Present +#define SYSCTL_DC8_ADC1AIN7 0x00800000 ///< ADC Module 1 AIN7 Pin Present +#define SYSCTL_DC8_ADC1AIN6 0x00400000 ///< ADC Module 1 AIN6 Pin Present +#define SYSCTL_DC8_ADC1AIN5 0x00200000 ///< ADC Module 1 AIN5 Pin Present +#define SYSCTL_DC8_ADC1AIN4 0x00100000 ///< ADC Module 1 AIN4 Pin Present +#define SYSCTL_DC8_ADC1AIN3 0x00080000 ///< ADC Module 1 AIN3 Pin Present +#define SYSCTL_DC8_ADC1AIN2 0x00040000 ///< ADC Module 1 AIN2 Pin Present +#define SYSCTL_DC8_ADC1AIN1 0x00020000 ///< ADC Module 1 AIN1 Pin Present +#define SYSCTL_DC8_ADC1AIN0 0x00010000 ///< ADC Module 1 AIN0 Pin Present +#define SYSCTL_DC8_ADC0AIN15 0x00008000 ///< ADC Module 0 AIN15 Pin Present +#define SYSCTL_DC8_ADC0AIN14 0x00004000 ///< ADC Module 0 AIN14 Pin Present +#define SYSCTL_DC8_ADC0AIN13 0x00002000 ///< ADC Module 0 AIN13 Pin Present +#define SYSCTL_DC8_ADC0AIN12 0x00001000 ///< ADC Module 0 AIN12 Pin Present +#define SYSCTL_DC8_ADC0AIN11 0x00000800 ///< ADC Module 0 AIN11 Pin Present +#define SYSCTL_DC8_ADC0AIN10 0x00000400 ///< ADC Module 0 AIN10 Pin Present +#define SYSCTL_DC8_ADC0AIN9 0x00000200 ///< ADC Module 0 AIN9 Pin Present +#define SYSCTL_DC8_ADC0AIN8 0x00000100 ///< ADC Module 0 AIN8 Pin Present +#define SYSCTL_DC8_ADC0AIN7 0x00000080 ///< ADC Module 0 AIN7 Pin Present +#define SYSCTL_DC8_ADC0AIN6 0x00000040 ///< ADC Module 0 AIN6 Pin Present +#define SYSCTL_DC8_ADC0AIN5 0x00000020 ///< ADC Module 0 AIN5 Pin Present +#define SYSCTL_DC8_ADC0AIN4 0x00000010 ///< ADC Module 0 AIN4 Pin Present +#define SYSCTL_DC8_ADC0AIN3 0x00000008 ///< ADC Module 0 AIN3 Pin Present +#define SYSCTL_DC8_ADC0AIN2 0x00000004 ///< ADC Module 0 AIN2 Pin Present +#define SYSCTL_DC8_ADC0AIN1 0x00000002 ///< ADC Module 0 AIN1 Pin Present +#define SYSCTL_DC8_ADC0AIN0 0x00000001 ///< ADC Module 0 AIN0 Pin Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_PBORCTL register. + */ +/*\{*/ +#define SYSCTL_PBORCTL_BORTIM_M 0x0000FFFC ///< BOR Time Delay +#define SYSCTL_PBORCTL_BORIOR 0x00000002 ///< BOR Interrupt or Reset +#define SYSCTL_PBORCTL_BORWT 0x00000001 ///< BOR Wait and Check for Noise +#define SYSCTL_PBORCTL_BORTIM_S 2 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_LDOPCTL register. + */ +/*\{*/ +#define SYSCTL_LDOPCTL_M 0x0000003F ///< LDO Output Voltage +#define SYSCTL_LDOPCTL_2_50V 0x00000000 ///< 2.50 +#define SYSCTL_LDOPCTL_2_45V 0x00000001 ///< 2.45 +#define SYSCTL_LDOPCTL_2_40V 0x00000002 ///< 2.40 +#define SYSCTL_LDOPCTL_2_35V 0x00000003 ///< 2.35 +#define SYSCTL_LDOPCTL_2_30V 0x00000004 ///< 2.30 +#define SYSCTL_LDOPCTL_2_25V 0x00000005 ///< 2.25 +#define SYSCTL_LDOPCTL_2_75V 0x0000001B ///< 2.75 +#define SYSCTL_LDOPCTL_2_70V 0x0000001C ///< 2.70 +#define SYSCTL_LDOPCTL_2_65V 0x0000001D ///< 2.65 +#define SYSCTL_LDOPCTL_2_60V 0x0000001E ///< 2.60 +#define SYSCTL_LDOPCTL_2_55V 0x0000001F ///< 2.55 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SRCR0 register. + */ +/*\{*/ +#define SYSCTL_SRCR0_WDT1 0x10000000 ///< WDT1 Reset Control +#define SYSCTL_SRCR0_CAN2 0x04000000 ///< CAN2 Reset Control +#define SYSCTL_SRCR0_CAN1 0x02000000 ///< CAN1 Reset Control +#define SYSCTL_SRCR0_CAN0 0x01000000 ///< CAN0 Reset Control +#define SYSCTL_SRCR0_PWM 0x00100000 ///< PWM Reset Control +#define SYSCTL_SRCR0_ADC1 0x00020000 ///< ADC1 Reset Control +#define SYSCTL_SRCR0_ADC0 0x00010000 ///< ADC0 Reset Control +#define SYSCTL_SRCR0_HIB 0x00000040 ///< HIB Reset Control +#define SYSCTL_SRCR0_WDT0 0x00000008 ///< WDT0 Reset Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SRCR1 register. + */ +/*\{*/ +#define SYSCTL_SRCR1_EPI0 0x40000000 ///< EPI0 Reset Control +#define SYSCTL_SRCR1_I2S0 0x10000000 ///< I2S0 Reset Control +#define SYSCTL_SRCR1_COMP2 0x04000000 ///< Analog Comp 2 Reset Control +#define SYSCTL_SRCR1_COMP1 0x02000000 ///< Analog Comp 1 Reset Control +#define SYSCTL_SRCR1_COMP0 0x01000000 ///< Analog Comp 0 Reset Control +#define SYSCTL_SRCR1_TIMER3 0x00080000 ///< Timer 3 Reset Control +#define SYSCTL_SRCR1_TIMER2 0x00040000 ///< Timer 2 Reset Control +#define SYSCTL_SRCR1_TIMER1 0x00020000 ///< Timer 1 Reset Control +#define SYSCTL_SRCR1_TIMER0 0x00010000 ///< Timer 0 Reset Control +#define SYSCTL_SRCR1_I2C1 0x00004000 ///< I2C1 Reset Control +#define SYSCTL_SRCR1_I2C0 0x00001000 ///< I2C0 Reset Control +#define SYSCTL_SRCR1_QEI1 0x00000200 ///< QEI1 Reset Control +#define SYSCTL_SRCR1_QEI0 0x00000100 ///< QEI0 Reset Control +#define SYSCTL_SRCR1_SSI1 0x00000020 ///< SSI1 Reset Control +#define SYSCTL_SRCR1_SSI0 0x00000010 ///< SSI0 Reset Control +#define SYSCTL_SRCR1_UART2 0x00000004 ///< UART2 Reset Control +#define SYSCTL_SRCR1_UART1 0x00000002 ///< UART1 Reset Control +#define SYSCTL_SRCR1_UART0 0x00000001 ///< UART0 Reset Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SRCR2 register. + */ +/*\{*/ +#define SYSCTL_SRCR2_EPHY0 0x40000000 ///< PHY0 Reset Control +#define SYSCTL_SRCR2_EMAC0 0x10000000 ///< MAC0 Reset Control +#define SYSCTL_SRCR2_USB0 0x00010000 ///< USB0 Reset Control +#define SYSCTL_SRCR2_UDMA 0x00002000 ///< Micro-DMA Reset Control +#define SYSCTL_SRCR2_GPIOJ 0x00000100 ///< Port J Reset Control +#define SYSCTL_SRCR2_GPIOH 0x00000080 ///< Port H Reset Control +#define SYSCTL_SRCR2_GPIOG 0x00000040 ///< Port G Reset Control +#define SYSCTL_SRCR2_GPIOF 0x00000020 ///< Port F Reset Control +#define SYSCTL_SRCR2_GPIOE 0x00000010 ///< Port E Reset Control +#define SYSCTL_SRCR2_GPIOD 0x00000008 ///< Port D Reset Control +#define SYSCTL_SRCR2_GPIOC 0x00000004 ///< Port C Reset Control +#define SYSCTL_SRCR2_GPIOB 0x00000002 ///< Port B Reset Control +#define SYSCTL_SRCR2_GPIOA 0x00000001 ///< Port A Reset Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RIS register. + */ +/*\{*/ +#define SYSCTL_RIS_MOSCPUPRIS 0x00000100 ///< MOSC Power Up Raw Interrupt + ///< Status +#define SYSCTL_RIS_USBPLLLRIS 0x00000080 ///< USB PLL Lock Raw Interrupt + ///< Status +#define SYSCTL_RIS_PLLLRIS 0x00000040 ///< PLL Lock Raw Interrupt Status +#define SYSCTL_RIS_CLRIS 0x00000020 ///< Current Limit Raw Interrupt + ///< Status +#define SYSCTL_RIS_IOFRIS 0x00000010 ///< Internal Oscillator Fault Raw + ///< Interrupt Status +#define SYSCTL_RIS_MOFRIS 0x00000008 ///< Main Oscillator Fault Raw + ///< Interrupt Status +#define SYSCTL_RIS_LDORIS 0x00000004 ///< LDO Power Unregulated Raw + ///< Interrupt Status +#define SYSCTL_RIS_BORRIS 0x00000002 ///< Brown-Out Reset Raw Interrupt + ///< Status +#define SYSCTL_RIS_PLLFRIS 0x00000001 ///< PLL Fault Raw Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_IMC register. + */ +/*\{*/ +#define SYSCTL_IMC_MOSCPUPIM 0x00000100 ///< MOSC Power Up Interrupt Mask +#define SYSCTL_IMC_USBPLLLIM 0x00000080 ///< USB PLL Lock Interrupt Mask +#define SYSCTL_IMC_PLLLIM 0x00000040 ///< PLL Lock Interrupt Mask +#define SYSCTL_IMC_CLIM 0x00000020 ///< Current Limit Interrupt Mask +#define SYSCTL_IMC_IOFIM 0x00000010 ///< Internal Oscillator Fault + ///< Interrupt Mask +#define SYSCTL_IMC_MOFIM 0x00000008 ///< Main Oscillator Fault Interrupt + ///< Mask +#define SYSCTL_IMC_LDOIM 0x00000004 ///< LDO Power Unregulated Interrupt + ///< Mask +#define SYSCTL_IMC_BORIM 0x00000002 ///< Brown-Out Reset Interrupt Mask +#define SYSCTL_IMC_PLLFIM 0x00000001 ///< PLL Fault Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_MISC register. + */ +/*\{*/ +#define SYSCTL_MISC_MOSCPUPMIS 0x00000100 ///< MOSC Power Up Masked Interrupt + ///< Status +#define SYSCTL_MISC_USBPLLLMIS 0x00000080 ///< USB PLL Lock Masked Interrupt + ///< Status +#define SYSCTL_MISC_PLLLMIS 0x00000040 ///< PLL Lock Masked Interrupt Status +#define SYSCTL_MISC_CLMIS 0x00000020 ///< Current Limit Masked Interrupt + ///< Status +#define SYSCTL_MISC_IOFMIS 0x00000010 ///< Internal Oscillator Fault Masked + ///< Interrupt Status +#define SYSCTL_MISC_MOFMIS 0x00000008 ///< Main Oscillator Fault Masked + ///< Interrupt Status +#define SYSCTL_MISC_LDOMIS 0x00000004 ///< LDO Power Unregulated Masked + ///< Interrupt Status +#define SYSCTL_MISC_BORMIS 0x00000002 ///< BOR Masked Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RESC register. + */ +/*\{*/ +#define SYSCTL_RESC_MOSCFAIL 0x00010000 ///< MOSC Failure Reset +#define SYSCTL_RESC_LDO 0x00000020 ///< LDO Reset +#define SYSCTL_RESC_WDT1 0x00000020 ///< Watchdog Timer 1 Reset +#define SYSCTL_RESC_SW 0x00000010 ///< Software Reset +#define SYSCTL_RESC_WDT0 0x00000008 ///< Watchdog Timer 0 Reset +#define SYSCTL_RESC_BOR 0x00000004 ///< Brown-Out Reset +#define SYSCTL_RESC_POR 0x00000002 ///< Power-On Reset +#define SYSCTL_RESC_EXT 0x00000001 ///< External Reset +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCC register. + */ +/*\{*/ +#define SYSCTL_RCC_ACG 0x08000000 ///< Auto Clock Gating +#define SYSCTL_RCC_SYSDIV_M 0x07800000 ///< System Clock Divisor +#define SYSCTL_RCC_SYSDIV_2 0x00800000 ///< System clock /2 +#define SYSCTL_RCC_SYSDIV_3 0x01000000 ///< System clock /3 +#define SYSCTL_RCC_SYSDIV_4 0x01800000 ///< System clock /4 +#define SYSCTL_RCC_SYSDIV_5 0x02000000 ///< System clock /5 +#define SYSCTL_RCC_SYSDIV_6 0x02800000 ///< System clock /6 +#define SYSCTL_RCC_SYSDIV_7 0x03000000 ///< System clock /7 +#define SYSCTL_RCC_SYSDIV_8 0x03800000 ///< System clock /8 +#define SYSCTL_RCC_SYSDIV_9 0x04000000 ///< System clock /9 +#define SYSCTL_RCC_SYSDIV_10 0x04800000 ///< System clock /10 +#define SYSCTL_RCC_SYSDIV_11 0x05000000 ///< System clock /11 +#define SYSCTL_RCC_SYSDIV_12 0x05800000 ///< System clock /12 +#define SYSCTL_RCC_SYSDIV_13 0x06000000 ///< System clock /13 +#define SYSCTL_RCC_SYSDIV_14 0x06800000 ///< System clock /14 +#define SYSCTL_RCC_SYSDIV_15 0x07000000 ///< System clock /15 +#define SYSCTL_RCC_SYSDIV_16 0x07800000 ///< System clock /16 +#define SYSCTL_RCC_USESYSDIV 0x00400000 ///< Enable System Clock Divider +#define SYSCTL_RCC_USEPWMDIV 0x00100000 ///< Enable PWM Clock Divisor +#define SYSCTL_RCC_PWMDIV_M 0x000E0000 ///< PWM Unit Clock Divisor +#define SYSCTL_RCC_PWMDIV_2 0x00000000 ///< PWM clock /2 +#define SYSCTL_RCC_PWMDIV_4 0x00020000 ///< PWM clock /4 +#define SYSCTL_RCC_PWMDIV_8 0x00040000 ///< PWM clock /8 +#define SYSCTL_RCC_PWMDIV_16 0x00060000 ///< PWM clock /16 +#define SYSCTL_RCC_PWMDIV_32 0x00080000 ///< PWM clock /32 +#define SYSCTL_RCC_PWMDIV_64 0x000A0000 ///< PWM clock /64 +#define SYSCTL_RCC_PWRDN 0x00002000 ///< PLL Power Down +#define SYSCTL_RCC_OEN 0x00001000 ///< PLL Output Enable +#define SYSCTL_RCC_BYPASS 0x00000800 ///< PLL Bypass +#define SYSCTL_RCC_XTAL_M 0x000007C0 ///< Crystal Value +#define SYSCTL_RCC_XTAL_1MHZ 0x00000000 ///< 1 MHz +#define SYSCTL_RCC_XTAL_1_84MHZ 0x00000040 ///< 1.8432 MHz +#define SYSCTL_RCC_XTAL_2MHZ 0x00000080 ///< 2 MHz +#define SYSCTL_RCC_XTAL_2_45MHZ 0x000000C0 ///< 2.4576 MHz +#define SYSCTL_RCC_XTAL_3_57MHZ 0x00000100 ///< 3.579545 MHz +#define SYSCTL_RCC_XTAL_3_68MHZ 0x00000140 ///< 3.6864 MHz +#define SYSCTL_RCC_XTAL_4MHZ 0x00000180 ///< 4 MHz +#define SYSCTL_RCC_XTAL_4_09MHZ 0x000001C0 ///< 4.096 MHz +#define SYSCTL_RCC_XTAL_4_91MHZ 0x00000200 ///< 4.9152 MHz +#define SYSCTL_RCC_XTAL_5MHZ 0x00000240 ///< 5 MHz +#define SYSCTL_RCC_XTAL_5_12MHZ 0x00000280 ///< 5.12 MHz +#define SYSCTL_RCC_XTAL_6MHZ 0x000002C0 ///< 6 MHz +#define SYSCTL_RCC_XTAL_6_14MHZ 0x00000300 ///< 6.144 MHz +#define SYSCTL_RCC_XTAL_7_37MHZ 0x00000340 ///< 7.3728 MHz +#define SYSCTL_RCC_XTAL_8MHZ 0x00000380 ///< 8 MHz +#define SYSCTL_RCC_XTAL_8_19MHZ 0x000003C0 ///< 8.192 MHz +#define SYSCTL_RCC_XTAL_10MHZ 0x00000400 ///< 10 MHz +#define SYSCTL_RCC_XTAL_12MHZ 0x00000440 ///< 12 MHz +#define SYSCTL_RCC_XTAL_12_2MHZ 0x00000480 ///< 12.288 MHz +#define SYSCTL_RCC_XTAL_13_5MHZ 0x000004C0 ///< 13.56 MHz +#define SYSCTL_RCC_XTAL_14_3MHZ 0x00000500 ///< 14.31818 MHz +#define SYSCTL_RCC_XTAL_16MHZ 0x00000540 ///< 16 MHz +#define SYSCTL_RCC_XTAL_16_3MHZ 0x00000580 ///< 16.384 MHz +#define SYSCTL_RCC_PLLVER 0x00000400 ///< PLL Verification +#define SYSCTL_RCC_OSCSRC_M 0x00000030 ///< Oscillator Source +#define SYSCTL_RCC_OSCSRC_MAIN 0x00000000 ///< MOSC +#define SYSCTL_RCC_OSCSRC_INT 0x00000010 ///< IOSC +#define SYSCTL_RCC_OSCSRC_INT4 0x00000020 ///< IOSC/4 +#define SYSCTL_RCC_OSCSRC_30 0x00000030 ///< 30 kHz +#define SYSCTL_RCC_IOSCVER 0x00000008 ///< Internal Oscillator Verification + ///< Timer +#define SYSCTL_RCC_MOSCVER 0x00000004 ///< Main Oscillator Verification + ///< Timer +#define SYSCTL_RCC_IOSCDIS 0x00000002 ///< Internal Oscillator Disable +#define SYSCTL_RCC_MOSCDIS 0x00000001 ///< Main Oscillator Disable +#define SYSCTL_RCC_SYSDIV_S 23 +#define SYSCTL_RCC_PWMDIV_S 17 ///< Shift to the PWMDIV field +#define SYSCTL_RCC_XTAL_S 6 ///< Shift to the XTAL field +#define SYSCTL_RCC_OSCSRC_S 4 ///< Shift to the OSCSRC field +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_PLLCFG register. + */ +/*\{*/ +#define SYSCTL_PLLCFG_OD_M 0x0000C000 ///< PLL OD Value +#define SYSCTL_PLLCFG_OD_1 0x00000000 ///< Divide by 1 +#define SYSCTL_PLLCFG_OD_2 0x00004000 ///< Divide by 2 +#define SYSCTL_PLLCFG_OD_4 0x00008000 ///< Divide by 4 +#define SYSCTL_PLLCFG_F_M 0x00003FE0 ///< PLL F Value +#define SYSCTL_PLLCFG_R_M 0x0000001F ///< PLL R Value +#define SYSCTL_PLLCFG_F_S 5 +#define SYSCTL_PLLCFG_R_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_GPIOHSCTL + * register. + */ +/*\{*/ +#define SYSCTL_GPIOHSCTL_PORTH 0x00000080 ///< Port H High-Speed +#define SYSCTL_GPIOHSCTL_PORTG 0x00000040 ///< Port G High-Speed +#define SYSCTL_GPIOHSCTL_PORTF 0x00000020 ///< Port F High-Speed +#define SYSCTL_GPIOHSCTL_PORTE 0x00000010 ///< Port E High-Speed +#define SYSCTL_GPIOHSCTL_PORTD 0x00000008 ///< Port D High-Speed +#define SYSCTL_GPIOHSCTL_PORTC 0x00000004 ///< Port C High-Speed +#define SYSCTL_GPIOHSCTL_PORTB 0x00000002 ///< Port B High-Speed +#define SYSCTL_GPIOHSCTL_PORTA 0x00000001 ///< Port A High-Speed +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_GPIOHBCTL + * register. + */ +/*\{*/ +#define SYSCTL_GPIOHBCTL_PORTJ 0x00000100 ///< Port J Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTH 0x00000080 ///< Port H Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTG 0x00000040 ///< Port G Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTF 0x00000020 ///< Port F Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTE 0x00000010 ///< Port E Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTD 0x00000008 ///< Port D Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTC 0x00000004 ///< Port C Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTB 0x00000002 ///< Port B Advanced High-Performance + ///< Bus +#define SYSCTL_GPIOHBCTL_PORTA 0x00000001 ///< Port A Advanced High-Performance + ///< Bus +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCC2 register. + */ +/*\{*/ +#define SYSCTL_RCC2_USERCC2 0x80000000 ///< Use RCC2 +#define SYSCTL_RCC2_DIV400 0x40000000 ///< Divide PLL as 400 MHz vs. 200 + ///< MHz +#define SYSCTL_RCC2_SYSDIV2_M 0x1F800000 ///< System Clock Divisor 2 +#define SYSCTL_RCC2_SYSDIV2_2 0x00800000 ///< System clock /2 +#define SYSCTL_RCC2_SYSDIV2_3 0x01000000 ///< System clock /3 +#define SYSCTL_RCC2_SYSDIV2_4 0x01800000 ///< System clock /4 +#define SYSCTL_RCC2_SYSDIV2_5 0x02000000 ///< System clock /5 +#define SYSCTL_RCC2_SYSDIV2_6 0x02800000 ///< System clock /6 +#define SYSCTL_RCC2_SYSDIV2_7 0x03000000 ///< System clock /7 +#define SYSCTL_RCC2_SYSDIV2_8 0x03800000 ///< System clock /8 +#define SYSCTL_RCC2_SYSDIV2_9 0x04000000 ///< System clock /9 +#define SYSCTL_RCC2_SYSDIV2_10 0x04800000 ///< System clock /10 +#define SYSCTL_RCC2_SYSDIV2_11 0x05000000 ///< System clock /11 +#define SYSCTL_RCC2_SYSDIV2_12 0x05800000 ///< System clock /12 +#define SYSCTL_RCC2_SYSDIV2_13 0x06000000 ///< System clock /13 +#define SYSCTL_RCC2_SYSDIV2_14 0x06800000 ///< System clock /14 +#define SYSCTL_RCC2_SYSDIV2_15 0x07000000 ///< System clock /15 +#define SYSCTL_RCC2_SYSDIV2_16 0x07800000 ///< System clock /16 +#define SYSCTL_RCC2_SYSDIV2_17 0x08000000 ///< System clock /17 +#define SYSCTL_RCC2_SYSDIV2_18 0x08800000 ///< System clock /18 +#define SYSCTL_RCC2_SYSDIV2_19 0x09000000 ///< System clock /19 +#define SYSCTL_RCC2_SYSDIV2_20 0x09800000 ///< System clock /20 +#define SYSCTL_RCC2_SYSDIV2_21 0x0A000000 ///< System clock /21 +#define SYSCTL_RCC2_SYSDIV2_22 0x0A800000 ///< System clock /22 +#define SYSCTL_RCC2_SYSDIV2_23 0x0B000000 ///< System clock /23 +#define SYSCTL_RCC2_SYSDIV2_24 0x0B800000 ///< System clock /24 +#define SYSCTL_RCC2_SYSDIV2_25 0x0C000000 ///< System clock /25 +#define SYSCTL_RCC2_SYSDIV2_26 0x0C800000 ///< System clock /26 +#define SYSCTL_RCC2_SYSDIV2_27 0x0D000000 ///< System clock /27 +#define SYSCTL_RCC2_SYSDIV2_28 0x0D800000 ///< System clock /28 +#define SYSCTL_RCC2_SYSDIV2_29 0x0E000000 ///< System clock /29 +#define SYSCTL_RCC2_SYSDIV2_30 0x0E800000 ///< System clock /30 +#define SYSCTL_RCC2_SYSDIV2_31 0x0F000000 ///< System clock /31 +#define SYSCTL_RCC2_SYSDIV2_32 0x0F800000 ///< System clock /32 +#define SYSCTL_RCC2_SYSDIV2_33 0x10000000 ///< System clock /33 +#define SYSCTL_RCC2_SYSDIV2_34 0x10800000 ///< System clock /34 +#define SYSCTL_RCC2_SYSDIV2_35 0x11000000 ///< System clock /35 +#define SYSCTL_RCC2_SYSDIV2_36 0x11800000 ///< System clock /36 +#define SYSCTL_RCC2_SYSDIV2_37 0x12000000 ///< System clock /37 +#define SYSCTL_RCC2_SYSDIV2_38 0x12800000 ///< System clock /38 +#define SYSCTL_RCC2_SYSDIV2_39 0x13000000 ///< System clock /39 +#define SYSCTL_RCC2_SYSDIV2_40 0x13800000 ///< System clock /40 +#define SYSCTL_RCC2_SYSDIV2_41 0x14000000 ///< System clock /41 +#define SYSCTL_RCC2_SYSDIV2_42 0x14800000 ///< System clock /42 +#define SYSCTL_RCC2_SYSDIV2_43 0x15000000 ///< System clock /43 +#define SYSCTL_RCC2_SYSDIV2_44 0x15800000 ///< System clock /44 +#define SYSCTL_RCC2_SYSDIV2_45 0x16000000 ///< System clock /45 +#define SYSCTL_RCC2_SYSDIV2_46 0x16800000 ///< System clock /46 +#define SYSCTL_RCC2_SYSDIV2_47 0x17000000 ///< System clock /47 +#define SYSCTL_RCC2_SYSDIV2_48 0x17800000 ///< System clock /48 +#define SYSCTL_RCC2_SYSDIV2_49 0x18000000 ///< System clock /49 +#define SYSCTL_RCC2_SYSDIV2_50 0x18800000 ///< System clock /50 +#define SYSCTL_RCC2_SYSDIV2_51 0x19000000 ///< System clock /51 +#define SYSCTL_RCC2_SYSDIV2_52 0x19800000 ///< System clock /52 +#define SYSCTL_RCC2_SYSDIV2_53 0x1A000000 ///< System clock /53 +#define SYSCTL_RCC2_SYSDIV2_54 0x1A800000 ///< System clock /54 +#define SYSCTL_RCC2_SYSDIV2_55 0x1B000000 ///< System clock /55 +#define SYSCTL_RCC2_SYSDIV2_56 0x1B800000 ///< System clock /56 +#define SYSCTL_RCC2_SYSDIV2_57 0x1C000000 ///< System clock /57 +#define SYSCTL_RCC2_SYSDIV2_58 0x1C800000 ///< System clock /58 +#define SYSCTL_RCC2_SYSDIV2_59 0x1D000000 ///< System clock /59 +#define SYSCTL_RCC2_SYSDIV2_60 0x1D800000 ///< System clock /60 +#define SYSCTL_RCC2_SYSDIV2_61 0x1E000000 ///< System clock /61 +#define SYSCTL_RCC2_SYSDIV2_62 0x1E800000 ///< System clock /62 +#define SYSCTL_RCC2_SYSDIV2_63 0x1F000000 ///< System clock /63 +#define SYSCTL_RCC2_SYSDIV2_64 0x1F800000 ///< System clock /64 +#define SYSCTL_RCC2_SYSDIV2LSB 0x00400000 ///< Additional LSB for SYSDIV2 +#define SYSCTL_RCC2_USBPWRDN 0x00004000 ///< Power-Down USB PLL +#define SYSCTL_RCC2_PWRDN2 0x00002000 ///< Power-Down PLL 2 +#define SYSCTL_RCC2_BYPASS2 0x00000800 ///< PLL Bypass 2 +#define SYSCTL_RCC2_OSCSRC2_M 0x00000070 ///< Oscillator Source 2 +#define SYSCTL_RCC2_OSCSRC2_MO 0x00000000 ///< MOSC +#define SYSCTL_RCC2_OSCSRC2_IO 0x00000010 ///< PIOSC +#define SYSCTL_RCC2_OSCSRC2_IO4 0x00000020 ///< PIOSC/4 +#define SYSCTL_RCC2_OSCSRC2_30 0x00000030 ///< 30 kHz +#define SYSCTL_RCC2_OSCSRC2_419 0x00000060 ///< 4.194304 MHz +#define SYSCTL_RCC2_OSCSRC2_32 0x00000070 ///< 32.768 kHz +#define SYSCTL_RCC2_SYSDIV2_S 23 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_MOSCCTL register. + */ +/*\{*/ +#define SYSCTL_MOSCCTL_CVAL 0x00000001 ///< Clock Validation for MOSC +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCGC0 register. + */ +/*\{*/ +#define SYSCTL_RCGC0_WDT1 0x10000000 ///< WDT1 Clock Gating Control +#define SYSCTL_RCGC0_CAN2 0x04000000 ///< CAN2 Clock Gating Control +#define SYSCTL_RCGC0_CAN1 0x02000000 ///< CAN1 Clock Gating Control +#define SYSCTL_RCGC0_CAN0 0x01000000 ///< CAN0 Clock Gating Control +#define SYSCTL_RCGC0_PWM 0x00100000 ///< PWM Clock Gating Control +#define SYSCTL_RCGC0_ADC1 0x00020000 ///< ADC1 Clock Gating Control +#define SYSCTL_RCGC0_ADC0 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_RCGC0_ADCSPD_M 0x00000F00 ///< ADC Sample Speed +#define SYSCTL_RCGC0_ADCSPD125K 0x00000000 ///< 125K samples/second +#define SYSCTL_RCGC0_ADCSPD250K 0x00000100 ///< 250K samples/second +#define SYSCTL_RCGC0_ADCSPD500K 0x00000200 ///< 500K samples/second +#define SYSCTL_RCGC0_ADCSPD1M 0x00000300 ///< 1M samples/second +#define SYSCTL_RCGC0_ADC1SPD_M 0x00000C00 ///< ADC1 Sample Speed +#define SYSCTL_RCGC0_ADC1SPD_125K \ + 0x00000000 ///< 125K samples/second +#define SYSCTL_RCGC0_ADC1SPD_250K \ + 0x00000400 ///< 250K samples/second +#define SYSCTL_RCGC0_ADC1SPD_500K \ + 0x00000800 ///< 500K samples/second +#define SYSCTL_RCGC0_ADC1SPD_1M 0x00000C00 ///< 1M samples/second +#define SYSCTL_RCGC0_ADC0SPD_M 0x00000300 ///< ADC0 Sample Speed +#define SYSCTL_RCGC0_ADC0SPD_125K \ + 0x00000000 ///< 125K samples/second +#define SYSCTL_RCGC0_ADC0SPD_250K \ + 0x00000100 ///< 250K samples/second +#define SYSCTL_RCGC0_ADC0SPD_500K \ + 0x00000200 ///< 500K samples/second +#define SYSCTL_RCGC0_ADC0SPD_1M 0x00000300 ///< 1M samples/second +#define SYSCTL_RCGC0_HIB 0x00000040 ///< HIB Clock Gating Control +#define SYSCTL_RCGC0_WDT0 0x00000008 ///< WDT0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCGC1 register. + */ +/*\{*/ +#define SYSCTL_RCGC1_EPI0 0x40000000 ///< EPI0 Clock Gating +#define SYSCTL_RCGC1_I2S0 0x10000000 ///< I2S0 Clock Gating +#define SYSCTL_RCGC1_COMP2 0x04000000 ///< Analog Comparator 2 Clock Gating +#define SYSCTL_RCGC1_COMP1 0x02000000 ///< Analog Comparator 1 Clock Gating +#define SYSCTL_RCGC1_COMP0 0x01000000 ///< Analog Comparator 0 Clock Gating +#define SYSCTL_RCGC1_TIMER3 0x00080000 ///< Timer 3 Clock Gating Control +#define SYSCTL_RCGC1_TIMER2 0x00040000 ///< Timer 2 Clock Gating Control +#define SYSCTL_RCGC1_TIMER1 0x00020000 ///< Timer 1 Clock Gating Control +#define SYSCTL_RCGC1_TIMER0 0x00010000 ///< Timer 0 Clock Gating Control +#define SYSCTL_RCGC1_I2C1 0x00004000 ///< I2C1 Clock Gating Control +#define SYSCTL_RCGC1_I2C0 0x00001000 ///< I2C0 Clock Gating Control +#define SYSCTL_RCGC1_QEI1 0x00000200 ///< QEI1 Clock Gating Control +#define SYSCTL_RCGC1_QEI0 0x00000100 ///< QEI0 Clock Gating Control +#define SYSCTL_RCGC1_SSI1 0x00000020 ///< SSI1 Clock Gating Control +#define SYSCTL_RCGC1_SSI0 0x00000010 ///< SSI0 Clock Gating Control +#define SYSCTL_RCGC1_UART2 0x00000004 ///< UART2 Clock Gating Control +#define SYSCTL_RCGC1_UART1 0x00000002 ///< UART1 Clock Gating Control +#define SYSCTL_RCGC1_UART0 0x00000001 ///< UART0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_RCGC2 register. + */ +/*\{*/ +#define SYSCTL_RCGC2_EPHY0 0x40000000 ///< PHY0 Clock Gating Control +#define SYSCTL_RCGC2_EMAC0 0x10000000 ///< MAC0 Clock Gating Control +#define SYSCTL_RCGC2_USB0 0x00010000 ///< USB0 Clock Gating Control +#define SYSCTL_RCGC2_UDMA 0x00002000 ///< Micro-DMA Clock Gating Control +#define SYSCTL_RCGC2_GPIOJ 0x00000100 ///< Port J Clock Gating Control +#define SYSCTL_RCGC2_GPIOH 0x00000080 ///< Port H Clock Gating Control +#define SYSCTL_RCGC2_GPIOG 0x00000040 ///< Port G Clock Gating Control +#define SYSCTL_RCGC2_GPIOF 0x00000020 ///< Port F Clock Gating Control +#define SYSCTL_RCGC2_GPIOE 0x00000010 ///< Port E Clock Gating Control +#define SYSCTL_RCGC2_GPIOD 0x00000008 ///< Port D Clock Gating Control +#define SYSCTL_RCGC2_GPIOC 0x00000004 ///< Port C Clock Gating Control +#define SYSCTL_RCGC2_GPIOB 0x00000002 ///< Port B Clock Gating Control +#define SYSCTL_RCGC2_GPIOA 0x00000001 ///< Port A Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SCGC0 register. + */ +/*\{*/ +#define SYSCTL_SCGC0_WDT1 0x10000000 ///< WDT1 Clock Gating Control +#define SYSCTL_SCGC0_CAN2 0x04000000 ///< CAN2 Clock Gating Control +#define SYSCTL_SCGC0_CAN1 0x02000000 ///< CAN1 Clock Gating Control +#define SYSCTL_SCGC0_CAN0 0x01000000 ///< CAN0 Clock Gating Control +#define SYSCTL_SCGC0_PWM 0x00100000 ///< PWM Clock Gating Control +#define SYSCTL_SCGC0_ADC1 0x00020000 ///< ADC1 Clock Gating Control +#define SYSCTL_SCGC0_ADC0 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_SCGC0_ADCSPD_M 0x00000F00 ///< ADC Sample Speed +#define SYSCTL_SCGC0_ADCSPD125K 0x00000000 ///< 125K samples/second +#define SYSCTL_SCGC0_ADCSPD250K 0x00000100 ///< 250K samples/second +#define SYSCTL_SCGC0_ADCSPD500K 0x00000200 ///< 500K samples/second +#define SYSCTL_SCGC0_ADCSPD1M 0x00000300 ///< 1M samples/second +#define SYSCTL_SCGC0_ADC1SPD_M 0x00000C00 ///< ADC1 Sample Speed +#define SYSCTL_SCGC0_ADC1SPD_125K \ + 0x00000000 ///< 125K samples/second +#define SYSCTL_SCGC0_ADC1SPD_250K \ + 0x00000400 ///< 250K samples/second +#define SYSCTL_SCGC0_ADC1SPD_500K \ + 0x00000800 ///< 500K samples/second +#define SYSCTL_SCGC0_ADC1SPD_1M 0x00000C00 ///< 1M samples/second +#define SYSCTL_SCGC0_ADC0SPD_M 0x00000300 ///< ADC0 Sample Speed +#define SYSCTL_SCGC0_ADC0SPD_125K \ + 0x00000000 ///< 125K samples/second +#define SYSCTL_SCGC0_ADC0SPD_250K \ + 0x00000100 ///< 250K samples/second +#define SYSCTL_SCGC0_ADC0SPD_500K \ + 0x00000200 ///< 500K samples/second +#define SYSCTL_SCGC0_ADC0SPD_1M 0x00000300 ///< 1M samples/second +#define SYSCTL_SCGC0_HIB 0x00000040 ///< HIB Clock Gating Control +#define SYSCTL_SCGC0_WDT0 0x00000008 ///< WDT0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SCGC1 register. + */ +/*\{*/ +#define SYSCTL_SCGC1_EPI0 0x40000000 ///< EPI0 Clock Gating +#define SYSCTL_SCGC1_I2S0 0x10000000 ///< I2S0 Clock Gating +#define SYSCTL_SCGC1_COMP2 0x04000000 ///< Analog Comparator 2 Clock Gating +#define SYSCTL_SCGC1_COMP1 0x02000000 ///< Analog Comparator 1 Clock Gating +#define SYSCTL_SCGC1_COMP0 0x01000000 ///< Analog Comparator 0 Clock Gating +#define SYSCTL_SCGC1_TIMER3 0x00080000 ///< Timer 3 Clock Gating Control +#define SYSCTL_SCGC1_TIMER2 0x00040000 ///< Timer 2 Clock Gating Control +#define SYSCTL_SCGC1_TIMER1 0x00020000 ///< Timer 1 Clock Gating Control +#define SYSCTL_SCGC1_TIMER0 0x00010000 ///< Timer 0 Clock Gating Control +#define SYSCTL_SCGC1_I2C1 0x00004000 ///< I2C1 Clock Gating Control +#define SYSCTL_SCGC1_I2C0 0x00001000 ///< I2C0 Clock Gating Control +#define SYSCTL_SCGC1_QEI1 0x00000200 ///< QEI1 Clock Gating Control +#define SYSCTL_SCGC1_QEI0 0x00000100 ///< QEI0 Clock Gating Control +#define SYSCTL_SCGC1_SSI1 0x00000020 ///< SSI1 Clock Gating Control +#define SYSCTL_SCGC1_SSI0 0x00000010 ///< SSI0 Clock Gating Control +#define SYSCTL_SCGC1_UART2 0x00000004 ///< UART2 Clock Gating Control +#define SYSCTL_SCGC1_UART1 0x00000002 ///< UART1 Clock Gating Control +#define SYSCTL_SCGC1_UART0 0x00000001 ///< UART0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_SCGC2 register. + */ +/*\{*/ +#define SYSCTL_SCGC2_EPHY0 0x40000000 ///< PHY0 Clock Gating Control +#define SYSCTL_SCGC2_EMAC0 0x10000000 ///< MAC0 Clock Gating Control +#define SYSCTL_SCGC2_USB0 0x00010000 ///< USB0 Clock Gating Control +#define SYSCTL_SCGC2_UDMA 0x00002000 ///< Micro-DMA Clock Gating Control +#define SYSCTL_SCGC2_GPIOJ 0x00000100 ///< Port J Clock Gating Control +#define SYSCTL_SCGC2_GPIOH 0x00000080 ///< Port H Clock Gating Control +#define SYSCTL_SCGC2_GPIOG 0x00000040 ///< Port G Clock Gating Control +#define SYSCTL_SCGC2_GPIOF 0x00000020 ///< Port F Clock Gating Control +#define SYSCTL_SCGC2_GPIOE 0x00000010 ///< Port E Clock Gating Control +#define SYSCTL_SCGC2_GPIOD 0x00000008 ///< Port D Clock Gating Control +#define SYSCTL_SCGC2_GPIOC 0x00000004 ///< Port C Clock Gating Control +#define SYSCTL_SCGC2_GPIOB 0x00000002 ///< Port B Clock Gating Control +#define SYSCTL_SCGC2_GPIOA 0x00000001 ///< Port A Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DCGC0 register. + */ +/*\{*/ +#define SYSCTL_DCGC0_WDT1 0x10000000 ///< WDT1 Clock Gating Control +#define SYSCTL_DCGC0_CAN2 0x04000000 ///< CAN2 Clock Gating Control +#define SYSCTL_DCGC0_CAN1 0x02000000 ///< CAN1 Clock Gating Control +#define SYSCTL_DCGC0_CAN0 0x01000000 ///< CAN0 Clock Gating Control +#define SYSCTL_DCGC0_PWM 0x00100000 ///< PWM Clock Gating Control +#define SYSCTL_DCGC0_ADC1 0x00020000 ///< ADC1 Clock Gating Control +#define SYSCTL_DCGC0_ADC0 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_DCGC0_HIB 0x00000040 ///< HIB Clock Gating Control +#define SYSCTL_DCGC0_WDT0 0x00000008 ///< WDT0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DCGC1 register. + */ +/*\{*/ +#define SYSCTL_DCGC1_EPI0 0x40000000 ///< EPI0 Clock Gating +#define SYSCTL_DCGC1_I2S0 0x10000000 ///< I2S0 Clock Gating +#define SYSCTL_DCGC1_COMP2 0x04000000 ///< Analog Comparator 2 Clock Gating +#define SYSCTL_DCGC1_COMP1 0x02000000 ///< Analog Comparator 1 Clock Gating +#define SYSCTL_DCGC1_COMP0 0x01000000 ///< Analog Comparator 0 Clock Gating +#define SYSCTL_DCGC1_TIMER3 0x00080000 ///< Timer 3 Clock Gating Control +#define SYSCTL_DCGC1_TIMER2 0x00040000 ///< Timer 2 Clock Gating Control +#define SYSCTL_DCGC1_TIMER1 0x00020000 ///< Timer 1 Clock Gating Control +#define SYSCTL_DCGC1_TIMER0 0x00010000 ///< Timer 0 Clock Gating Control +#define SYSCTL_DCGC1_I2C1 0x00004000 ///< I2C1 Clock Gating Control +#define SYSCTL_DCGC1_I2C0 0x00001000 ///< I2C0 Clock Gating Control +#define SYSCTL_DCGC1_QEI1 0x00000200 ///< QEI1 Clock Gating Control +#define SYSCTL_DCGC1_QEI0 0x00000100 ///< QEI0 Clock Gating Control +#define SYSCTL_DCGC1_SSI1 0x00000020 ///< SSI1 Clock Gating Control +#define SYSCTL_DCGC1_SSI0 0x00000010 ///< SSI0 Clock Gating Control +#define SYSCTL_DCGC1_UART2 0x00000004 ///< UART2 Clock Gating Control +#define SYSCTL_DCGC1_UART1 0x00000002 ///< UART1 Clock Gating Control +#define SYSCTL_DCGC1_UART0 0x00000001 ///< UART0 Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DCGC2 register. + */ +/*\{*/ +#define SYSCTL_DCGC2_EPHY0 0x40000000 ///< PHY0 Clock Gating Control +#define SYSCTL_DCGC2_EMAC0 0x10000000 ///< MAC0 Clock Gating Control +#define SYSCTL_DCGC2_USB0 0x00010000 ///< USB0 Clock Gating Control +#define SYSCTL_DCGC2_UDMA 0x00002000 ///< Micro-DMA Clock Gating Control +#define SYSCTL_DCGC2_GPIOJ 0x00000100 ///< Port J Clock Gating Control +#define SYSCTL_DCGC2_GPIOH 0x00000080 ///< Port H Clock Gating Control +#define SYSCTL_DCGC2_GPIOG 0x00000040 ///< Port G Clock Gating Control +#define SYSCTL_DCGC2_GPIOF 0x00000020 ///< Port F Clock Gating Control +#define SYSCTL_DCGC2_GPIOE 0x00000010 ///< Port E Clock Gating Control +#define SYSCTL_DCGC2_GPIOD 0x00000008 ///< Port D Clock Gating Control +#define SYSCTL_DCGC2_GPIOC 0x00000004 ///< Port C Clock Gating Control +#define SYSCTL_DCGC2_GPIOB 0x00000002 ///< Port B Clock Gating Control +#define SYSCTL_DCGC2_GPIOA 0x00000001 ///< Port A Clock Gating Control +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DSLPCLKCFG + * register. + */ +/*\{*/ +#define SYSCTL_DSLPCLKCFG_D_M 0x1F800000 ///< Divider Field Override +#define SYSCTL_DSLPCLKCFG_D_1 0x00000000 ///< System clock /1 +#define SYSCTL_DSLPCLKCFG_D_2 0x00800000 ///< System clock /2 +#define SYSCTL_DSLPCLKCFG_D_3 0x01000000 ///< System clock /3 +#define SYSCTL_DSLPCLKCFG_D_4 0x01800000 ///< System clock /4 +#define SYSCTL_DSLPCLKCFG_D_5 0x02000000 ///< System clock /5 +#define SYSCTL_DSLPCLKCFG_D_6 0x02800000 ///< System clock /6 +#define SYSCTL_DSLPCLKCFG_D_7 0x03000000 ///< System clock /7 +#define SYSCTL_DSLPCLKCFG_D_8 0x03800000 ///< System clock /8 +#define SYSCTL_DSLPCLKCFG_D_9 0x04000000 ///< System clock /9 +#define SYSCTL_DSLPCLKCFG_D_10 0x04800000 ///< System clock /10 +#define SYSCTL_DSLPCLKCFG_D_11 0x05000000 ///< System clock /11 +#define SYSCTL_DSLPCLKCFG_D_12 0x05800000 ///< System clock /12 +#define SYSCTL_DSLPCLKCFG_D_13 0x06000000 ///< System clock /13 +#define SYSCTL_DSLPCLKCFG_D_14 0x06800000 ///< System clock /14 +#define SYSCTL_DSLPCLKCFG_D_15 0x07000000 ///< System clock /15 +#define SYSCTL_DSLPCLKCFG_D_16 0x07800000 ///< System clock /16 +#define SYSCTL_DSLPCLKCFG_D_17 0x08000000 ///< System clock /17 +#define SYSCTL_DSLPCLKCFG_D_18 0x08800000 ///< System clock /18 +#define SYSCTL_DSLPCLKCFG_D_19 0x09000000 ///< System clock /19 +#define SYSCTL_DSLPCLKCFG_D_20 0x09800000 ///< System clock /20 +#define SYSCTL_DSLPCLKCFG_D_21 0x0A000000 ///< System clock /21 +#define SYSCTL_DSLPCLKCFG_D_22 0x0A800000 ///< System clock /22 +#define SYSCTL_DSLPCLKCFG_D_23 0x0B000000 ///< System clock /23 +#define SYSCTL_DSLPCLKCFG_D_24 0x0B800000 ///< System clock /24 +#define SYSCTL_DSLPCLKCFG_D_25 0x0C000000 ///< System clock /25 +#define SYSCTL_DSLPCLKCFG_D_26 0x0C800000 ///< System clock /26 +#define SYSCTL_DSLPCLKCFG_D_27 0x0D000000 ///< System clock /27 +#define SYSCTL_DSLPCLKCFG_D_28 0x0D800000 ///< System clock /28 +#define SYSCTL_DSLPCLKCFG_D_29 0x0E000000 ///< System clock /29 +#define SYSCTL_DSLPCLKCFG_D_30 0x0E800000 ///< System clock /30 +#define SYSCTL_DSLPCLKCFG_D_31 0x0F000000 ///< System clock /31 +#define SYSCTL_DSLPCLKCFG_D_32 0x0F800000 ///< System clock /32 +#define SYSCTL_DSLPCLKCFG_D_33 0x10000000 ///< System clock /33 +#define SYSCTL_DSLPCLKCFG_D_34 0x10800000 ///< System clock /34 +#define SYSCTL_DSLPCLKCFG_D_35 0x11000000 ///< System clock /35 +#define SYSCTL_DSLPCLKCFG_D_36 0x11800000 ///< System clock /36 +#define SYSCTL_DSLPCLKCFG_D_37 0x12000000 ///< System clock /37 +#define SYSCTL_DSLPCLKCFG_D_38 0x12800000 ///< System clock /38 +#define SYSCTL_DSLPCLKCFG_D_39 0x13000000 ///< System clock /39 +#define SYSCTL_DSLPCLKCFG_D_40 0x13800000 ///< System clock /40 +#define SYSCTL_DSLPCLKCFG_D_41 0x14000000 ///< System clock /41 +#define SYSCTL_DSLPCLKCFG_D_42 0x14800000 ///< System clock /42 +#define SYSCTL_DSLPCLKCFG_D_43 0x15000000 ///< System clock /43 +#define SYSCTL_DSLPCLKCFG_D_44 0x15800000 ///< System clock /44 +#define SYSCTL_DSLPCLKCFG_D_45 0x16000000 ///< System clock /45 +#define SYSCTL_DSLPCLKCFG_D_46 0x16800000 ///< System clock /46 +#define SYSCTL_DSLPCLKCFG_D_47 0x17000000 ///< System clock /47 +#define SYSCTL_DSLPCLKCFG_D_48 0x17800000 ///< System clock /48 +#define SYSCTL_DSLPCLKCFG_D_49 0x18000000 ///< System clock /49 +#define SYSCTL_DSLPCLKCFG_D_50 0x18800000 ///< System clock /50 +#define SYSCTL_DSLPCLKCFG_D_51 0x19000000 ///< System clock /51 +#define SYSCTL_DSLPCLKCFG_D_52 0x19800000 ///< System clock /52 +#define SYSCTL_DSLPCLKCFG_D_53 0x1A000000 ///< System clock /53 +#define SYSCTL_DSLPCLKCFG_D_54 0x1A800000 ///< System clock /54 +#define SYSCTL_DSLPCLKCFG_D_55 0x1B000000 ///< System clock /55 +#define SYSCTL_DSLPCLKCFG_D_56 0x1B800000 ///< System clock /56 +#define SYSCTL_DSLPCLKCFG_D_57 0x1C000000 ///< System clock /57 +#define SYSCTL_DSLPCLKCFG_D_58 0x1C800000 ///< System clock /58 +#define SYSCTL_DSLPCLKCFG_D_59 0x1D000000 ///< System clock /59 +#define SYSCTL_DSLPCLKCFG_D_60 0x1D800000 ///< System clock /60 +#define SYSCTL_DSLPCLKCFG_D_61 0x1E000000 ///< System clock /61 +#define SYSCTL_DSLPCLKCFG_D_62 0x1E800000 ///< System clock /62 +#define SYSCTL_DSLPCLKCFG_D_63 0x1F000000 ///< System clock /63 +#define SYSCTL_DSLPCLKCFG_D_64 0x1F800000 ///< System clock /64 +#define SYSCTL_DSLPCLKCFG_O_M 0x00000070 ///< Clock Source +#define SYSCTL_DSLPCLKCFG_O_IGN 0x00000000 ///< MOSC +#define SYSCTL_DSLPCLKCFG_O_IO 0x00000010 ///< PIOSC +#define SYSCTL_DSLPCLKCFG_O_30 0x00000030 ///< 30 kHz +#define SYSCTL_DSLPCLKCFG_O_32 0x00000070 ///< 32.768 kHz +#define SYSCTL_DSLPCLKCFG_IOSC 0x00000001 ///< IOSC Clock Source +#define SYSCTL_DSLPCLKCFG_D_S 23 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_CLKVCLR register. + */ +/*\{*/ +#define SYSCTL_CLKVCLR_VERCLR 0x00000001 ///< Clock Verification Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_PIOSCCAL + * register. + */ +/*\{*/ +#define SYSCTL_PIOSCCAL_UTEN 0x80000000 ///< Use User Trim Value +#define SYSCTL_PIOSCCAL_CAL 0x00000200 ///< Start Calibration +#define SYSCTL_PIOSCCAL_UPDATE 0x00000100 ///< Update Trim +#define SYSCTL_PIOSCCAL_UT_M 0x0000007F ///< User Trim Value +#define SYSCTL_PIOSCCAL_UT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_PIOSCSTAT + * register. + */ +/*\{*/ +#define SYSCTL_PIOSCSTAT_DT_M 0x007F0000 ///< Default Trim Value +#define SYSCTL_PIOSCSTAT_CR_M 0x00000300 ///< Calibration Result +#define SYSCTL_PIOSCSTAT_CRNONE 0x00000000 ///< Calibration has not been + ///< attempted +#define SYSCTL_PIOSCSTAT_CRPASS 0x00000100 ///< The last calibration operation + ///< completed to meet 1% accuracy +#define SYSCTL_PIOSCSTAT_CRFAIL 0x00000200 ///< The last calibration operation + ///< failed to meet 1% accuracy +#define SYSCTL_PIOSCSTAT_CT_M 0x0000007F ///< Calibration Trim Value +#define SYSCTL_PIOSCSTAT_DT_S 16 +#define SYSCTL_PIOSCSTAT_CT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_LDOARST register. + */ +/*\{*/ +#define SYSCTL_LDOARST_LDOARST 0x00000001 ///< LDO Reset +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_I2SMCLKCFG + * register. + */ +/*\{*/ +#define SYSCTL_I2SMCLKCFG_RXEN 0x80000000 ///< RX Clock Enable +#define SYSCTL_I2SMCLKCFG_RXI_M 0x3FF00000 ///< RX Clock Integer Input +#define SYSCTL_I2SMCLKCFG_RXF_M 0x000F0000 ///< RX Clock Fractional Input +#define SYSCTL_I2SMCLKCFG_TXEN 0x00008000 ///< TX Clock Enable +#define SYSCTL_I2SMCLKCFG_TXI_M 0x00003FF0 ///< TX Clock Integer Input +#define SYSCTL_I2SMCLKCFG_TXF_M 0x0000000F ///< TX Clock Fractional Input +#define SYSCTL_I2SMCLKCFG_RXI_S 20 +#define SYSCTL_I2SMCLKCFG_RXF_S 16 +#define SYSCTL_I2SMCLKCFG_TXI_S 4 +#define SYSCTL_I2SMCLKCFG_TXF_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_DC9 register. + */ +/*\{*/ +#define SYSCTL_DC9_ADC1DC7 0x00800000 ///< ADC1 DC7 Present +#define SYSCTL_DC9_ADC1DC6 0x00400000 ///< ADC1 DC6 Present +#define SYSCTL_DC9_ADC1DC5 0x00200000 ///< ADC1 DC5 Present +#define SYSCTL_DC9_ADC1DC4 0x00100000 ///< ADC1 DC4 Present +#define SYSCTL_DC9_ADC1DC3 0x00080000 ///< ADC1 DC3 Present +#define SYSCTL_DC9_ADC1DC2 0x00040000 ///< ADC1 DC2 Present +#define SYSCTL_DC9_ADC1DC1 0x00020000 ///< ADC1 DC1 Present +#define SYSCTL_DC9_ADC1DC0 0x00010000 ///< ADC1 DC0 Present +#define SYSCTL_DC9_ADC0DC7 0x00000080 ///< ADC0 DC7 Present +#define SYSCTL_DC9_ADC0DC6 0x00000040 ///< ADC0 DC6 Present +#define SYSCTL_DC9_ADC0DC5 0x00000020 ///< ADC0 DC5 Present +#define SYSCTL_DC9_ADC0DC4 0x00000010 ///< ADC0 DC4 Present +#define SYSCTL_DC9_ADC0DC3 0x00000008 ///< ADC0 DC3 Present +#define SYSCTL_DC9_ADC0DC2 0x00000004 ///< ADC0 DC2 Present +#define SYSCTL_DC9_ADC0DC1 0x00000002 ///< ADC0 DC1 Present +#define SYSCTL_DC9_ADC0DC0 0x00000001 ///< ADC0 DC0 Present +/*\}*/ + +/** + * The following are defines for the bit fields in the SYSCTL_NVMSTAT register. + */ +/*\{*/ +#define SYSCTL_NVMSTAT_TPSW 0x00000010 ///< Third Party Software Present +#define SYSCTL_NVMSTAT_FWB 0x00000001 ///< 32 Word Flash Write Buffer + ///< Active +/*\}*/ + +/** + * The following are deprecated defines for the System Control register + * addresses. + */ +/*\{*/ +#define SYSCTL_USER0 0x400FE1E0 ///< NV User Register 0 +#define SYSCTL_USER1 0x400FE1E4 ///< NV User Register 1 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DID0 + * register. + */ +/*\{*/ +#define SYSCTL_DID0_VER_MASK 0x70000000 ///< DID0 version mask +#define SYSCTL_DID0_CLASS_MASK 0x00FF0000 ///< Device Class +#define SYSCTL_DID0_MAJ_MASK 0x0000FF00 ///< Major revision mask +#define SYSCTL_DID0_MAJ_A 0x00000000 ///< Major revision A +#define SYSCTL_DID0_MAJ_B 0x00000100 ///< Major revision B +#define SYSCTL_DID0_MAJ_C 0x00000200 ///< Major revision C +#define SYSCTL_DID0_MIN_MASK 0x000000FF ///< Minor revision mask +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DID1 + * register. + */ +/*\{*/ +#define SYSCTL_DID1_VER_MASK 0xF0000000 ///< Register version mask +#define SYSCTL_DID1_FAM_MASK 0x0F000000 ///< Family mask +#define SYSCTL_DID1_FAM_S 0x00000000 ///< Stellaris family +#define SYSCTL_DID1_PRTNO_MASK 0x00FF0000 ///< Part number mask +#define SYSCTL_DID1_PINCNT_MASK 0x0000E000 ///< Pin count +#define SYSCTL_DID1_TEMP_MASK 0x000000E0 ///< Temperature range mask +#define SYSCTL_DID1_PKG_MASK 0x00000018 ///< Package mask +#define SYSCTL_DID1_PKG_48QFP 0x00000008 ///< QFP package +#define SYSCTL_DID1_QUAL_MASK 0x00000003 ///< Qualification status mask +#define SYSCTL_DID1_PKG_28SOIC 0x00000000 ///< SOIC package +#define SYSCTL_DID1_PRTNO_SHIFT 16 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DC0 + * register. + */ +/*\{*/ +#define SYSCTL_DC0_SRAMSZ_MASK 0xFFFF0000 ///< SRAM size mask +#define SYSCTL_DC0_FLASHSZ_MASK 0x0000FFFF ///< Flash size mask +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DC1 + * register. + */ +/*\{*/ +#define SYSCTL_DC1_ADC 0x00010000 ///< ADC Module Present +#define SYSCTL_DC1_SYSDIV_MASK 0x0000F000 ///< Minimum system divider mask +#define SYSCTL_DC1_ADCSPD_MASK 0x00000F00 ///< ADC speed mask +#define SYSCTL_DC1_WDOG 0x00000008 ///< Watchdog present +#define SYSCTL_DC1_WDT 0x00000008 ///< Watchdog Timer Present +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DC2 + * register. + */ +/*\{*/ +#define SYSCTL_DC2_I2C 0x00001000 ///< I2C present +#define SYSCTL_DC2_QEI 0x00000100 ///< QEI present +#define SYSCTL_DC2_SSI 0x00000010 ///< SSI present +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DC3 + * register. + */ +/*\{*/ +#define SYSCTL_DC3_ADC7 0x00800000 ///< ADC7 Pin Present +#define SYSCTL_DC3_ADC6 0x00400000 ///< ADC6 Pin Present +#define SYSCTL_DC3_ADC5 0x00200000 ///< ADC5 Pin Present +#define SYSCTL_DC3_ADC4 0x00100000 ///< ADC4 Pin Present +#define SYSCTL_DC3_ADC3 0x00080000 ///< ADC3 Pin Present +#define SYSCTL_DC3_ADC2 0x00040000 ///< ADC2 Pin Present +#define SYSCTL_DC3_ADC1 0x00020000 ///< ADC1 Pin Present +#define SYSCTL_DC3_ADC0 0x00010000 ///< ADC0 Pin Present +#define SYSCTL_DC3_MC_FAULT0 0x00008000 ///< MC0 fault pin present +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_PBORCTL register. + */ +/*\{*/ +#define SYSCTL_PBORCTL_BOR_MASK 0x0000FFFC ///< BOR wait timer +#define SYSCTL_PBORCTL_BOR_SH 2 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_LDOPCTL register. + */ +/*\{*/ +#define SYSCTL_LDOPCTL_MASK 0x0000003F ///< Voltage adjust mask +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SRCR0 + * register. + */ +/*\{*/ +#define SYSCTL_SRCR0_ADC 0x00010000 ///< ADC0 Reset Control +#define SYSCTL_SRCR0_WDT 0x00000008 ///< WDT Reset Control +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RESC + * register. + */ +/*\{*/ +#define SYSCTL_RESC_WDOG 0x00000008 ///< Watchdog reset +#define SYSCTL_RESC_WDT 0x00000008 ///< Watchdog Timer Reset +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RCC + * register. + */ +/*\{*/ +#define SYSCTL_RCC_SYSDIV_MASK 0x07800000 ///< System clock divider +#define SYSCTL_RCC_USE_SYSDIV 0x00400000 ///< Use sytem clock divider +#define SYSCTL_RCC_USE_PWMDIV 0x00100000 ///< Use PWM clock divider +#define SYSCTL_RCC_PWMDIV_MASK 0x000E0000 ///< PWM clock divider +#define SYSCTL_RCC_OE 0x00001000 ///< PLL output enable +#define SYSCTL_RCC_XTAL_3_68MHz 0x00000140 ///< Using a 3.6864 MHz crystal +#define SYSCTL_RCC_XTAL_4MHz 0x00000180 ///< Using a 4 MHz crystal +#define SYSCTL_RCC_XTAL_MASK 0x000003C0 ///< Crystal attached to main osc +#define SYSCTL_RCC_OSCSRC_MASK 0x00000030 ///< Oscillator input select +#define SYSCTL_RCC_SYSDIV_SHIFT 23 ///< Shift to the SYSDIV field +#define SYSCTL_RCC_PWMDIV_SHIFT 17 ///< Shift to the PWMDIV field +#define SYSCTL_RCC_XTAL_SHIFT 6 ///< Shift to the XTAL field +#define SYSCTL_RCC_OSCSRC_SHIFT 4 ///< Shift to the OSCSRC field +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_PLLCFG + * register. + */ +/*\{*/ +#define SYSCTL_PLLCFG_OD_MASK 0x0000C000 ///< Output divider +#define SYSCTL_PLLCFG_F_MASK 0x00003FE0 ///< PLL multiplier +#define SYSCTL_PLLCFG_R_MASK 0x0000001F ///< Input predivider +#define SYSCTL_PLLCFG_F_SHIFT 5 +#define SYSCTL_PLLCFG_R_SHIFT 0 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RCC2 + * register. + */ +/*\{*/ +#define SYSCTL_RCC2_USEFRACT 0x40000000 ///< Use fractional divider +#define SYSCTL_RCC2_SYSDIV2_MSK 0x1F800000 ///< System clock divider +#define SYSCTL_RCC2_FRACT 0x00400000 ///< Fractional divide +#define SYSCTL_RCC2_OSCSRC2_MSK 0x00000070 ///< Oscillator input select +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RCGC0 + * register. + */ +/*\{*/ +#define SYSCTL_RCGC0_ADC 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_RCGC0_WDT 0x00000008 ///< WDT Clock Gating Control +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SCGC0 + * register. + */ +/*\{*/ +#define SYSCTL_SCGC0_ADC 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_SCGC0_WDT 0x00000008 ///< WDT Clock Gating Control +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_DCGC0 + * register. + */ +/*\{*/ +#define SYSCTL_DCGC0_ADC 0x00010000 ///< ADC0 Clock Gating Control +#define SYSCTL_DCGC0_WDT 0x00000008 ///< WDT Clock Gating Control +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_DSLPCLKCFG register. + */ +/*\{*/ +#define SYSCTL_DSLPCLKCFG_D_MSK 0x1F800000 ///< Deep sleep system clock override +#define SYSCTL_DSLPCLKCFG_O_MSK 0x00000070 ///< Deep sleep oscillator override +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_CLKVCLR register. + */ +/*\{*/ +#define SYSCTL_CLKVCLR_CLR 0x00000001 ///< Clear clock verification fault +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the + * SYSCTL_LDOARST register. + */ +/*\{*/ +#define SYSCTL_LDOARST_ARST 0x00000001 ///< Allow LDO to reset device +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SRCR0, + * SYSCTL_RCGC0, SYSCTL_SCGC0, and SYSCTL_DCGC0 registers. + */ +/*\{*/ +#define SYSCTL_SET0_CAN2 0x04000000 ///< CAN 2 module +#define SYSCTL_SET0_CAN1 0x02000000 ///< CAN 1 module +#define SYSCTL_SET0_CAN0 0x01000000 ///< CAN 0 module +#define SYSCTL_SET0_PWM 0x00100000 ///< PWM module +#define SYSCTL_SET0_ADC 0x00010000 ///< ADC module +#define SYSCTL_SET0_ADCSPD_MASK 0x00000F00 ///< ADC speed mask +#define SYSCTL_SET0_ADCSPD_125K 0x00000000 ///< 125Ksps ADC +#define SYSCTL_SET0_ADCSPD_250K 0x00000100 ///< 250Ksps ADC +#define SYSCTL_SET0_ADCSPD_500K 0x00000200 ///< 500Ksps ADC +#define SYSCTL_SET0_ADCSPD_1M 0x00000300 ///< 1Msps ADC +#define SYSCTL_SET0_HIB 0x00000040 ///< Hibernation module +#define SYSCTL_SET0_WDOG 0x00000008 ///< Watchdog module +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SRCR1, + * SYSCTL_RCGC1, SYSCTL_SCGC1, and SYSCTL_DCGC1 registers. + */ +/*\{*/ +#define SYSCTL_SET1_COMP2 0x04000000 ///< Analog comparator module 2 +#define SYSCTL_SET1_COMP1 0x02000000 ///< Analog comparator module 1 +#define SYSCTL_SET1_COMP0 0x01000000 ///< Analog comparator module 0 +#define SYSCTL_SET1_TIMER3 0x00080000 ///< Timer module 3 +#define SYSCTL_SET1_TIMER2 0x00040000 ///< Timer module 2 +#define SYSCTL_SET1_TIMER1 0x00020000 ///< Timer module 1 +#define SYSCTL_SET1_TIMER0 0x00010000 ///< Timer module 0 +#define SYSCTL_SET1_I2C1 0x00002000 ///< I2C module 1 +#define SYSCTL_SET1_I2C0 0x00001000 ///< I2C module 0 +#define SYSCTL_SET1_I2C 0x00001000 ///< I2C module +#define SYSCTL_SET1_QEI1 0x00000200 ///< QEI module 1 +#define SYSCTL_SET1_QEI 0x00000100 ///< QEI module +#define SYSCTL_SET1_QEI0 0x00000100 ///< QEI module 0 +#define SYSCTL_SET1_SSI1 0x00000020 ///< SSI module 1 +#define SYSCTL_SET1_SSI0 0x00000010 ///< SSI module 0 +#define SYSCTL_SET1_SSI 0x00000010 ///< SSI module +#define SYSCTL_SET1_UART2 0x00000004 ///< UART module 2 +#define SYSCTL_SET1_UART1 0x00000002 ///< UART module 1 +#define SYSCTL_SET1_UART0 0x00000001 ///< UART module 0 +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_SRCR2, + * SYSCTL_RCGC2, SYSCTL_SCGC2, and SYSCTL_DCGC2 registers. + */ +/*\{*/ +#define SYSCTL_SET2_ETH 0x50000000 ///< ETH module +#define SYSCTL_SET2_GPIOH 0x00000080 ///< GPIO H module +#define SYSCTL_SET2_GPIOG 0x00000040 ///< GPIO G module +#define SYSCTL_SET2_GPIOF 0x00000020 ///< GPIO F module +#define SYSCTL_SET2_GPIOE 0x00000010 ///< GPIO E module +#define SYSCTL_SET2_GPIOD 0x00000008 ///< GPIO D module +#define SYSCTL_SET2_GPIOC 0x00000004 ///< GPIO C module +#define SYSCTL_SET2_GPIOB 0x00000002 ///< GPIO B module +#define SYSCTL_SET2_GPIOA 0x00000001 ///< GIPO A module +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the SYSCTL_RIS, + * SYSCTL_IMC, and SYSCTL_IMS registers. + */ +/*\{*/ +#define SYSCTL_INT_PLL_LOCK 0x00000040 ///< PLL lock interrupt +#define SYSCTL_INT_CUR_LIMIT 0x00000020 ///< Current limit interrupt +#define SYSCTL_INT_IOSC_FAIL 0x00000010 ///< Internal oscillator failure int +#define SYSCTL_INT_MOSC_FAIL 0x00000008 ///< Main oscillator failure int +#define SYSCTL_INT_POR 0x00000004 ///< Power on reset interrupt +#define SYSCTL_INT_BOR 0x00000002 ///< Brown out interrupt +#define SYSCTL_INT_PLL_FAIL 0x00000001 ///< PLL failure interrupt +/*\}*/ + +#endif /* LM3S_SYSCTL_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_types.h b/bertos/cpu/cortex-m3/io/lm3s_types.h new file mode 100644 index 0000000..1b8d6f3 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_types.h @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \brief LM3S generic hardware macros. + */ + +#ifndef LM3S_TYPES_H +#define LM3S_TYPES_H + +#include +#include + +/** + * Helper Macros for determining the particular hardware revision. + */ +/*\{*/ +#ifndef CLASS_IS_SANDSTORM +#define CLASS_IS_SANDSTORM \ + (((HWREG(SYSCTL_DID0) & SYSCTL_DID0_VER_M) == SYSCTL_DID0_VER_0) || \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \ + (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_SANDSTORM))) +#endif + +#ifndef CLASS_IS_FURY +#define CLASS_IS_FURY \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \ + (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_FURY)) +#endif + +#ifndef CLASS_IS_DUSTDEVIL +#define CLASS_IS_DUSTDEVIL \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \ + (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_DUSTDEVIL)) +#endif + +#ifndef CLASS_IS_TEMPEST +#define CLASS_IS_TEMPEST \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_VER_M | SYSCTL_DID0_CLASS_M)) == \ + (SYSCTL_DID0_VER_1 | SYSCTL_DID0_CLASS_TEMPEST)) +#endif + +#ifndef REVISION_IS_A0 +#define REVISION_IS_A0 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0)) +#endif + +#ifndef REVISION_IS_A1 +#define REVISION_IS_A1 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_0)) +#endif + +#ifndef REVISION_IS_A2 +#define REVISION_IS_A2 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVA | SYSCTL_DID0_MIN_2)) +#endif + +#ifndef REVISION_IS_B0 +#define REVISION_IS_B0 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_0)) +#endif + +#ifndef REVISION_IS_B1 +#define REVISION_IS_B1 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVB | SYSCTL_DID0_MIN_1)) +#endif + +#ifndef REVISION_IS_C0 +#define REVISION_IS_C0 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_0)) +#endif + +#ifndef REVISION_IS_C1 +#define REVISION_IS_C1 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_1)) +#endif + +#ifndef REVISION_IS_C2 +#define REVISION_IS_C2 \ + ((HWREG(SYSCTL_DID0) & (SYSCTL_DID0_MAJ_M | SYSCTL_DID0_MIN_M)) == \ + (SYSCTL_DID0_MAJ_REVC | SYSCTL_DID0_MIN_2)) +#endif +/*\}*/ + +#endif /* LM3S_TYPES_H */ diff --git a/bertos/cpu/cortex-m3/io/lm3s_uart.h b/bertos/cpu/cortex-m3/io/lm3s_uart.h new file mode 100644 index 0000000..6c6acd3 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/lm3s_uart.h @@ -0,0 +1,469 @@ +/** + * \file + * + * + * \brief LM3S1968 UART hardware. + */ + +#ifndef LM3S_UART_H +#define LM3S_UART_H + +/** + * The following are defines for the UART register offsets. + */ +/*\{*/ +#define UART_O_DR 0x00000000 //< UART Data +#define UART_O_RSR 0x00000004 //< UART Receive Status/Error Clear +#define UART_O_ECR 0x00000004 //< UART Receive Status/Error Clear +#define UART_O_FR 0x00000018 //< UART Flag +#define UART_O_ILPR 0x00000020 //< UART IrDA Low-Power Register +#define UART_O_IBRD 0x00000024 //< UART Integer Baud-Rate Divisor +#define UART_O_FBRD 0x00000028 //< UART Fractional Baud-Rate + //< Divisor +#define UART_O_LCRH 0x0000002C //< UART Line Control +#define UART_O_CTL 0x00000030 //< UART Control +#define UART_O_IFLS 0x00000034 //< UART Interrupt FIFO Level Select +#define UART_O_IM 0x00000038 //< UART Interrupt Mask +#define UART_O_RIS 0x0000003C //< UART Raw Interrupt Status +#define UART_O_MIS 0x00000040 //< UART Masked Interrupt Status +#define UART_O_ICR 0x00000044 //< UART Interrupt Clear +#define UART_O_DMACTL 0x00000048 //< UART DMA Control +#define UART_O_LCTL 0x00000090 //< UART LIN Control +#define UART_O_LSS 0x00000094 //< UART LIN Snap Shot +#define UART_O_LTIM 0x00000098 //< UART LIN Timer +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_DR register. + */ +/*\{*/ +#define UART_DR_OE 0x00000800 //< UART Overrun Error +#define UART_DR_BE 0x00000400 //< UART Break Error +#define UART_DR_PE 0x00000200 //< UART Parity Error +#define UART_DR_FE 0x00000100 //< UART Framing Error +#define UART_DR_DATA_M 0x000000FF //< Data Transmitted or Received +#define UART_DR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_RSR register. + */ +/*\{*/ +#define UART_RSR_OE 0x00000008 //< UART Overrun Error +#define UART_RSR_BE 0x00000004 //< UART Break Error +#define UART_RSR_PE 0x00000002 //< UART Parity Error +#define UART_RSR_FE 0x00000001 //< UART Framing Error +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ECR register. + */ +/*\{*/ +#define UART_ECR_DATA_M 0x000000FF //< Error Clear +#define UART_ECR_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_FR register. + */ +/*\{*/ +#define UART_FR_RI 0x00000100 //< Ring Indicator +#define UART_FR_TXFE 0x00000080 //< UART Transmit FIFO Empty +#define UART_FR_RXFF 0x00000040 //< UART Receive FIFO Full +#define UART_FR_TXFF 0x00000020 //< UART Transmit FIFO Full +#define UART_FR_RXFE 0x00000010 //< UART Receive FIFO Empty +#define UART_FR_BUSY 0x00000008 //< UART Busy +#define UART_FR_DCD 0x00000004 //< Data Carrier Detect +#define UART_FR_DSR 0x00000002 //< Data Set Ready +#define UART_FR_CTS 0x00000001 //< Clear To Send +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ILPR register. + */ +/*\{*/ +#define UART_ILPR_ILPDVSR_M 0x000000FF //< IrDA Low-Power Divisor +#define UART_ILPR_ILPDVSR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IBRD register. + */ +/*\{*/ +#define UART_IBRD_DIVINT_M 0x0000FFFF //< Integer Baud-Rate Divisor +#define UART_IBRD_DIVINT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_FBRD register. + */ +/*\{*/ +#define UART_FBRD_DIVFRAC_M 0x0000003F //< Fractional Baud-Rate Divisor +#define UART_FBRD_DIVFRAC_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LCRH register. + */ +/*\{*/ +#define UART_LCRH_SPS 0x00000080 //< UART Stick Parity Select +#define UART_LCRH_WLEN_M 0x00000060 //< UART Word Length +#define UART_LCRH_WLEN_5 0x00000000 //< 5 bits (default) +#define UART_LCRH_WLEN_6 0x00000020 //< 6 bits +#define UART_LCRH_WLEN_7 0x00000040 //< 7 bits +#define UART_LCRH_WLEN_8 0x00000060 //< 8 bits +#define UART_LCRH_FEN 0x00000010 //< UART Enable FIFOs +#define UART_LCRH_STP2 0x00000008 //< UART Two Stop Bits Select +#define UART_LCRH_EPS 0x00000004 //< UART Even Parity Select +#define UART_LCRH_PEN 0x00000002 //< UART Parity Enable +#define UART_LCRH_BRK 0x00000001 //< UART Send Break +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_CTL register. + */ +/*\{*/ +#define UART_CTL_CTSEN 0x00008000 //< Enable Clear To Send +#define UART_CTL_RTSEN 0x00004000 //< Enable Request to Send +#define UART_CTL_RTS 0x00000800 //< Request to Send +#define UART_CTL_DTR 0x00000400 //< Data Terminal Ready +#define UART_CTL_RXE 0x00000200 //< UART Receive Enable +#define UART_CTL_TXE 0x00000100 //< UART Transmit Enable +#define UART_CTL_LBE 0x00000080 //< UART Loop Back Enable +#define UART_CTL_LIN 0x00000040 //< LIN Mode Enable +#define UART_CTL_HSE 0x00000020 //< High-Speed Enable +#define UART_CTL_EOT 0x00000010 //< End of Transmission +#define UART_CTL_SMART 0x00000008 //< ISO 7816 Smart Card Support +#define UART_CTL_SIRLP 0x00000004 //< UART SIR Low-Power Mode +#define UART_CTL_SIREN 0x00000002 //< UART SIR Enable +#define UART_CTL_UARTEN 0x00000001 //< UART Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IFLS register. + */ +/*\{*/ +#define UART_IFLS_RX_M 0x00000038 //< UART Receive Interrupt FIFO + //< Level Select +#define UART_IFLS_RX1_8 0x00000000 //< RX FIFO >= 1/8 full +#define UART_IFLS_RX2_8 0x00000008 //< RX FIFO >= 1/4 full +#define UART_IFLS_RX4_8 0x00000010 //< RX FIFO >= 1/2 full (default) +#define UART_IFLS_RX6_8 0x00000018 //< RX FIFO >= 3/4 full +#define UART_IFLS_RX7_8 0x00000020 //< RX FIFO >= 7/8 full +#define UART_IFLS_TX_M 0x00000007 //< UART Transmit Interrupt FIFO + //< Level Select +#define UART_IFLS_TX1_8 0x00000000 //< TX FIFO <= 1/8 full +#define UART_IFLS_TX2_8 0x00000001 //< TX FIFO <= 1/4 full +#define UART_IFLS_TX4_8 0x00000002 //< TX FIFO <= 1/2 full (default) +#define UART_IFLS_TX6_8 0x00000003 //< TX FIFO <= 3/4 full +#define UART_IFLS_TX7_8 0x00000004 //< TX FIFO <= 7/8 full +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_IM register. + */ +/*\{*/ +#define UART_IM_LME5IM 0x00008000 //< LIN Mode Edge 5 Interrupt Mask +#define UART_IM_LME1IM 0x00004000 //< LIN Mode Edge 1 Interrupt Mask +#define UART_IM_LMSBIM 0x00002000 //< LIN Mode Sync Break Interrupt + //< Mask +#define UART_IM_OEIM 0x00000400 //< UART Overrun Error Interrupt + //< Mask +#define UART_IM_BEIM 0x00000200 //< UART Break Error Interrupt Mask +#define UART_IM_PEIM 0x00000100 //< UART Parity Error Interrupt Mask +#define UART_IM_FEIM 0x00000080 //< UART Framing Error Interrupt + //< Mask +#define UART_IM_RTIM 0x00000040 //< UART Receive Time-Out Interrupt + //< Mask +#define UART_IM_TXIM 0x00000020 //< UART Transmit Interrupt Mask +#define UART_IM_RXIM 0x00000010 //< UART Receive Interrupt Mask +#define UART_IM_DSRMIM 0x00000008 //< UART Data Set Ready Modem + //< Interrupt Mask +#define UART_IM_DCDMIM 0x00000004 //< UART Data Carrier Detect Modem + //< Interrupt Mask +#define UART_IM_CTSMIM 0x00000002 //< UART Clear to Send Modem + //< Interrupt Mask +#define UART_IM_RIMIM 0x00000001 //< UART Ring Indicator Modem + //< Interrupt Mask +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_RIS register. + */ +/*\{*/ +#define UART_RIS_LME5RIS 0x00008000 //< LIN Mode Edge 5 Raw Interrupt + //< Status +#define UART_RIS_LME1RIS 0x00004000 //< LIN Mode Edge 1 Raw Interrupt + //< Status +#define UART_RIS_LMSBRIS 0x00002000 //< LIN Mode Sync Break Raw + //< Interrupt Status +#define UART_RIS_OERIS 0x00000400 //< UART Overrun Error Raw Interrupt + //< Status +#define UART_RIS_BERIS 0x00000200 //< UART Break Error Raw Interrupt + //< Status +#define UART_RIS_PERIS 0x00000100 //< UART Parity Error Raw Interrupt + //< Status +#define UART_RIS_FERIS 0x00000080 //< UART Framing Error Raw Interrupt + //< Status +#define UART_RIS_RTRIS 0x00000040 //< UART Receive Time-Out Raw + //< Interrupt Status +#define UART_RIS_TXRIS 0x00000020 //< UART Transmit Raw Interrupt + //< Status +#define UART_RIS_RXRIS 0x00000010 //< UART Receive Raw Interrupt + //< Status +#define UART_RIS_DSRRIS 0x00000008 //< UART Data Set Ready Modem Raw + //< Interrupt Status +#define UART_RIS_DCDRIS 0x00000004 //< UART Data Carrier Detect Modem + //< Raw Interrupt Status +#define UART_RIS_CTSRIS 0x00000002 //< UART Clear to Send Modem Raw + //< Interrupt Status +#define UART_RIS_RIRIS 0x00000001 //< UART Ring Indicator Modem Raw + //< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_MIS register. + */ +/*\{*/ +#define UART_MIS_LME5MIS 0x00008000 //< LIN Mode Edge 5 Masked Interrupt + //< Status +#define UART_MIS_LME1MIS 0x00004000 //< LIN Mode Edge 1 Masked Interrupt + //< Status +#define UART_MIS_LMSBMIS 0x00002000 //< LIN Mode Sync Break Masked + //< Interrupt Status +#define UART_MIS_OEMIS 0x00000400 //< UART Overrun Error Masked + //< Interrupt Status +#define UART_MIS_BEMIS 0x00000200 //< UART Break Error Masked + //< Interrupt Status +#define UART_MIS_PEMIS 0x00000100 //< UART Parity Error Masked + //< Interrupt Status +#define UART_MIS_FEMIS 0x00000080 //< UART Framing Error Masked + //< Interrupt Status +#define UART_MIS_RTMIS 0x00000040 //< UART Receive Time-Out Masked + //< Interrupt Status +#define UART_MIS_TXMIS 0x00000020 //< UART Transmit Masked Interrupt + //< Status +#define UART_MIS_RXMIS 0x00000010 //< UART Receive Masked Interrupt + //< Status +#define UART_MIS_DSRMIS 0x00000008 //< UART Data Set Ready Modem Masked + //< Interrupt Status +#define UART_MIS_DCDMIS 0x00000004 //< UART Data Carrier Detect Modem + //< Masked Interrupt Status +#define UART_MIS_CTSMIS 0x00000002 //< UART Clear to Send Modem Masked + //< Interrupt Status +#define UART_MIS_RIMIS 0x00000001 //< UART Ring Indicator Modem Masked + //< Interrupt Status +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_ICR register. + */ +/*\{*/ +#define UART_ICR_LME5MIC 0x00008000 //< LIN Mode Edge 5 Interrupt Clear +#define UART_ICR_LME1MIC 0x00004000 //< LIN Mode Edge 1 Interrupt Clear +#define UART_ICR_LMSBMIC 0x00002000 //< LIN Mode Sync Break Interrupt + //< Clear +#define UART_ICR_OEIC 0x00000400 //< Overrun Error Interrupt Clear +#define UART_ICR_BEIC 0x00000200 //< Break Error Interrupt Clear +#define UART_ICR_PEIC 0x00000100 //< Parity Error Interrupt Clear +#define UART_ICR_FEIC 0x00000080 //< Framing Error Interrupt Clear +#define UART_ICR_RTIC 0x00000040 //< Receive Time-Out Interrupt Clear +#define UART_ICR_TXIC 0x00000020 //< Transmit Interrupt Clear +#define UART_ICR_RXIC 0x00000010 //< Receive Interrupt Clear +#define UART_ICR_DSRMIC 0x00000008 //< UART Data Set Ready Modem + //< Interrupt Clear +#define UART_ICR_DCDMIC 0x00000004 //< UART Data Carrier Detect Modem + //< Interrupt Clear +#define UART_ICR_CTSMIC 0x00000002 //< UART Clear to Send Modem + //< Interrupt Clear +#define UART_ICR_RIMIC 0x00000001 //< UART Ring Indicator Modem + //< Interrupt Clear +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_DMACTL register. + */ +/*\{*/ +#define UART_DMACTL_DMAERR 0x00000004 //< DMA on Error +#define UART_DMACTL_TXDMAE 0x00000002 //< Transmit DMA Enable +#define UART_DMACTL_RXDMAE 0x00000001 //< Receive DMA Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LCTL register. + */ +/*\{*/ +#define UART_LCTL_BLEN_M 0x00000030 //< Sync Break Length +#define UART_LCTL_BLEN_13T 0x00000000 //< Sync break length is 13T bits + //< (default) +#define UART_LCTL_BLEN_14T 0x00000010 //< Sync break length is 14T bits +#define UART_LCTL_BLEN_15T 0x00000020 //< Sync break length is 15T bits +#define UART_LCTL_BLEN_16T 0x00000030 //< Sync break length is 16T bits +#define UART_LCTL_MASTER 0x00000001 //< LIN Master Enable +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LSS register. + */ +/*\{*/ +#define UART_LSS_TSS_M 0x0000FFFF //< Timer Snap Shot +#define UART_LSS_TSS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the UART_O_LTIM register. + */ +/*\{*/ +#define UART_LTIM_TIMER_M 0x0000FFFF //< Timer Value +#define UART_LTIM_TIMER_S 0 +/*\}*/ + +/** + * The following definitions are deprecated. + */ +/*\{*/ +#ifndef DEPRECATED +/*\}*/ + +/** + * The following are deprecated defines for the UART register offsets. + */ +/*\{*/ +#define UART_O_LCR_H 0x0000002C //< Line Control Register, HIGH byte +#define UART_O_PeriphID4 0x00000FD0 +#define UART_O_PeriphID5 0x00000FD4 +#define UART_O_PeriphID6 0x00000FD8 +#define UART_O_PeriphID7 0x00000FDC +#define UART_O_PeriphID0 0x00000FE0 +#define UART_O_PeriphID1 0x00000FE4 +#define UART_O_PeriphID2 0x00000FE8 +#define UART_O_PeriphID3 0x00000FEC +#define UART_O_PCellID0 0x00000FF0 +#define UART_O_PCellID1 0x00000FF4 +#define UART_O_PCellID2 0x00000FF8 +#define UART_O_PCellID3 0x00000FFC +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_DR + * register. + */ +/*\{*/ +#define UART_DR_DATA_MASK 0x000000FF //< UART data +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_IBRD + * register. + */ +/*\{*/ +#define UART_IBRD_DIVINT_MASK 0x0000FFFF //< Integer baud-rate divisor +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_FBRD + * register. + */ +/*\{*/ +#define UART_FBRD_DIVFRAC_MASK 0x0000003F //< Fractional baud-rate divisor +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_LCR_H + * register. + */ +/*\{*/ +#define UART_LCR_H_SPS 0x00000080 //< Stick Parity Select +#define UART_LCR_H_WLEN 0x00000060 //< Word length +#define UART_LCR_H_WLEN_5 0x00000000 //< 5 bit data +#define UART_LCR_H_WLEN_6 0x00000020 //< 6 bit data +#define UART_LCR_H_WLEN_7 0x00000040 //< 7 bit data +#define UART_LCR_H_WLEN_8 0x00000060 //< 8 bit data +#define UART_LCR_H_FEN 0x00000010 //< Enable FIFO +#define UART_LCR_H_STP2 0x00000008 //< Two Stop Bits Select +#define UART_LCR_H_EPS 0x00000004 //< Even Parity Select +#define UART_LCR_H_PEN 0x00000002 //< Parity Enable +#define UART_LCR_H_BRK 0x00000001 //< Send Break +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_IFLS + * register. + */ +/*\{*/ +#define UART_IFLS_RX_MASK 0x00000038 //< RX FIFO level mask +#define UART_IFLS_TX_MASK 0x00000007 //< TX FIFO level mask +/*\}*/ + +/** + * The following are deprecated defines for the bit fields in the UART_O_ICR + * register. + */ +/*\{*/ +#define UART_RSR_ANY (UART_RSR_OE | UART_RSR_BE | UART_RSR_PE | \ + UART_RSR_FE) +/*\}*/ + +/** + * The following are deprecated defines for the Reset Values for UART + * Registers. + */ +/*\{*/ +#define UART_RV_CTL 0x00000300 +#define UART_RV_PCellID1 0x000000F0 +#define UART_RV_PCellID3 0x000000B1 +#define UART_RV_FR 0x00000090 +#define UART_RV_PeriphID2 0x00000018 +#define UART_RV_IFLS 0x00000012 +#define UART_RV_PeriphID0 0x00000011 +#define UART_RV_PCellID0 0x0000000D +#define UART_RV_PCellID2 0x00000005 +#define UART_RV_PeriphID3 0x00000001 +#define UART_RV_PeriphID4 0x00000000 +#define UART_RV_LCR_H 0x00000000 +#define UART_RV_PeriphID6 0x00000000 +#define UART_RV_DR 0x00000000 +#define UART_RV_RSR 0x00000000 +#define UART_RV_ECR 0x00000000 +#define UART_RV_PeriphID5 0x00000000 +#define UART_RV_RIS 0x00000000 +#define UART_RV_FBRD 0x00000000 +#define UART_RV_IM 0x00000000 +#define UART_RV_MIS 0x00000000 +#define UART_RV_ICR 0x00000000 +#define UART_RV_PeriphID1 0x00000000 +#define UART_RV_PeriphID7 0x00000000 +#define UART_RV_IBRD 0x00000000 +/*\}*/ + +#endif /* DEPRECATED */ + +#endif /* LM3S_UART_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3.h b/bertos/cpu/cortex-m3/io/sam3.h new file mode 100644 index 0000000..8b69cb4 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3.h @@ -0,0 +1,340 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + */ + +#ifndef SAM3_H +#define SAM3_H + +#include +#include + +/* + * Peripherals IDs. + */ +/*\{*/ +#if CPU_CM3_SAM3N + #define SUPC_ID 0 ///< Supply Controller (SUPC) + #define RSTC_ID 1 ///< Reset Controller (RSTC) + #define RTC_ID 2 ///< Real Time Clock (RTC) + #define RTT_ID 3 ///< Real Time Timer (RTT) + #define WDT_ID 4 ///< Watchdog Timer (WDT) + #define PMC_ID 5 ///< Power Management Controller (PMC) + #define EEFC0_ID 6 ///< Enhanced Flash Controller + #define UART0_ID 8 ///< UART 0 (UART0) + #define UART1_ID 9 ///< UART 1 (UART1) + #define PIOA_ID 11 ///< Parallel I/O Controller A (PIOA) + #define PIOB_ID 12 ///< Parallel I/O Controller B (PIOB) + #define PIOC_ID 13 ///< Parallel I/O Controller C (PIOC) + #define US0_ID 14 ///< USART 0 (USART0) + #define US1_ID 15 ///< USART 1 (USART1) + #define TWI0_ID 19 ///< Two Wire Interface 0 (TWI0) + #define TWI1_ID 20 ///< Two Wire Interface 1 (TWI1) + #define SPI0_ID 21 ///< Serial Peripheral Interface (SPI) + #define TC0_ID 23 ///< Timer/Counter 0 (TC0) + #define TC1_ID 24 ///< Timer/Counter 1 (TC1) + #define TC2_ID 25 ///< Timer/Counter 2 (TC2) + #define TC3_ID 26 ///< Timer/Counter 3 (TC3) + #define TC4_ID 27 ///< Timer/Counter 4 (TC4) + #define TC5_ID 28 ///< Timer/Counter 5 (TC5) + #define ADC_ID 29 ///< Analog To Digital Converter (ADC) + #define DACC_ID 30 ///< Digital To Analog Converter (DACC) + #define PWM_ID 31 ///< Pulse Width Modulation (PWM) +#elif CPU_CM3_SAM3X + #define SUPC_ID 0 ///< Supply Controller (SUPC) + #define RSTC_ID 1 ///< Reset Controller (RSTC) + #define RTC_ID 2 ///< Real Time Clock (RTC) + #define RTT_ID 3 ///< Real Time Timer (RTT) + #define WDT_ID 4 ///< Watchdog Timer (WDT) + #define PMC_ID 5 ///< Power Management Controller (PMC) + #define EEFC0_ID 6 ///< Enhanced Flash Controller + #define EEFC1_ID 7 ///< Enhanced Flash Controller + #define UART0_ID 8 ///< UART 0 (UART0) + #define SMC_SDRAMC_ID 9 ///< Satic memory controller / SDRAM controller + #define SDRAMC_ID 10 ///< Satic memory controller / SDRAM controller + #define PIOA_ID 11 ///< Parallel I/O Controller A + #define PIOB_ID 12 ///< Parallel I/O Controller B + #define PIOC_ID 13 ///< Parallel I/O Controller C + #define PIOD_ID 14 ///< Parallel I/O Controller D + #define PIOE_ID 15 ///< Parallel I/O Controller E + #define PIOF_ID 16 ///< Parallel I/O Controller F + #define US0_ID 17 ///< USART 0 + #define US1_ID 18 ///< USART 1 + #define US2_ID 19 ///< USART 2 + #define US3_ID 20 ///< USART 3 + #define HSMCI_ID 21 ///< High speed multimedia card interface + #define TWI0_ID 22 ///< Two Wire Interface 0 + #define TWI1_ID 23 ///< Two Wire Interface 1 + #define SPI0_ID 24 ///< Serial Peripheral Interface + #define SPI1_ID 25 ///< Serial Peripheral Interface + #define SSC_ID 26 ///< Synchronous serial controller + #define TC0_ID 27 ///< Timer/Counter 0 + #define TC1_ID 28 ///< Timer/Counter 1 + #define TC2_ID 29 ///< Timer/Counter 2 + #define TC3_ID 30 ///< Timer/Counter 3 + #define TC4_ID 31 ///< Timer/Counter 4 + #define TC5_ID 32 ///< Timer/Counter 5 + #define TC6_ID 33 ///< Timer/Counter 6 + #define TC7_ID 34 ///< Timer/Counter 7 + #define TC8_ID 35 ///< Timer/Counter 8 + #define PWM_ID 36 ///< Pulse width modulation controller + #define ADC_ID 37 ///< ADC controller + #define DACC_ID 38 ///< DAC controller + #define DMAC_ID 39 ///< DMA controller + #define UOTGHS_ID 40 ///< USB OTG high speed + #define TRNG_ID 41 ///< True random number generator + #define EMAC_ID 42 ///< Ethernet MAC + #define CAN0_ID 43 ///< CAN controller 0 + #define CAN1_ID 44 ///< CAN controller 1 +#else + #error Peripheral IDs undefined +#endif +/*\}*/ + +/* + * Hardware features for drivers. + */ +#define USART_HAS_PDC 1 +#define SPI_HAS_PDC 1 + +#if CPU_CM3_SAM3X || CPU_CM3_SAM3U + #define USART_PORTS 1 + #define UART_PORTS 4 +#elif CPU_CM3_SAM3N || CPU_CM3_SAM3S + #define USART_PORTS 2 + #define UART_PORTS 2 +#else + #error undefined U(S)ART_PORTS for this cpu +#endif + +#include "sam3_sysctl.h" +#include "sam3_pdc.h" +#include "sam3_pmc.h" +#include "sam3_smc.h" +#include "sam3_sdramc.h" +#include "sam3_ints.h" +#include "sam3_pio.h" +#include "sam3_nvic.h" +#include "sam3_uart.h" +#include "sam3_usart.h" +#include "sam3_spi.h" +#include "sam3_flash.h" +#include "sam3_wdt.h" +#include "sam3_emac.h" +#include "sam3_rstc.h" +#include "sam3_adc.h" +#include "sam3_dacc.h" +#include "sam3_tc.h" +#include "sam3_twi.h" +#include "sam3_ssc.h" + +/** + * U(S)ART I/O pins + */ +/*\{*/ +#if CPU_CM3_SAM3U + #define UART0_PORT PIOA_BASE + #define USART0_PORT PIOA_BASE + #define USART1_PORT PIOA_BASE + #define USART2_PORT PIOA_BASE + #define USART3_PORT PIOC_BASE + + #define UART0_PERIPH PIO_PERIPH_A + #define USART0_PERIPH PIO_PERIPH_A + #define USART1_PERIPH PIO_PERIPH_A + #define USART2_PERIPH PIO_PERIPH_A + #define USART3_PERIPH PIO_PERIPH_B + + #define URXD0 11 + #define UTXD0 12 + #define RXD0 19 + #define TXD0 18 + #define RXD1 21 + #define TXD1 20 + #define RXD2 23 + #define TXD2 22 + #define RXD3 13 + #define TXD3 12 +#elif CPU_CM3_SAM3X + #define UART0_PORT PIOA_BASE + #define USART0_PORT PIOA_BASE + #define USART1_PORT PIOA_BASE + #define USART2_PORT PIOB_BASE + #define USART3_PORT PIOD_BASE + + #define UART0_PERIPH PIO_PERIPH_A + #define USART0_PERIPH PIO_PERIPH_A + #define USART1_PERIPH PIO_PERIPH_A + #define USART2_PERIPH PIO_PERIPH_A + #define USART3_PERIPH PIO_PERIPH_B + + #define URXD0 8 + #define UTXD0 9 + #define RXD0 10 + #define TXD0 11 + #define RXD1 12 + #define TXD1 13 + #define RXD2 21 + #define TXD2 20 + #define RXD3 5 + #define TXD3 4 +#elif CPU_CM3_SAM3N || CPU_CM3_SAM3S + #define UART0_PORT PIOA_BASE + #define UART1_PORT PIOB_BASE + #define USART0_PORT PIOA_BASE + #define USART1_PORT PIOA_BASE + + #define UART0_PERIPH PIO_PERIPH_A + #define UART1_PERIPH PIO_PERIPH_A + #define USART0_PERIPH PIO_PERIPH_A + #define USART1_PERIPH PIO_PERIPH_A + + #define URXD0 9 + #define UTXD0 10 + #define URXD1 2 + #define UTXD1 3 + #define RXD0 5 + #define TXD0 6 + #define RXD1 21 + #define TXD1 22 +#endif +/*\}*/ + +/** + * SPI I/O pins + */ +/*\{*/ +#if CPU_CM3_SAM3U + #define SPI0_SPCK 15 + #define SPI0_MOSI 14 + #define SPI0_MISO 13 +#elif CPU_CM3_SAM3X + #define SPI0_SPCK 27 + #define SPI0_MOSI 26 + #define SPI0_MISO 25 +#else + #define SPI0_SPCK 14 + #define SPI0_MOSI 13 + #define SPI0_MISO 12 +#endif +/*\}*/ + +/** + * TWI I/O pins + */ +/*\{*/ +#if CPU_CM3_SAM3X + #define TWI0_PORT PIOA_BASE + #define TWI1_PORT PIOA_BASE + + #define TWI0_PERIPH PIO_PERIPH_A + #define TWI1_PERIPH PIO_PERIPH_A + + #define TWI0_TWD 17 + #define TWI0_TWCK 18 + #define TWI1_TWD 12 + #define TWI1_TWCK 13 +#elif CPU_CM3_SAM3N || CPU_CM3_SAM3S + #define TWI0_PORT PIOA_BASE + #define TWI1_PORT PIOB_BASE + + #define TWI0_PERIPH PIO_PERIPH_A + #define TWI1_PERIPH PIO_PERIPH_A + + #define TWI0_TWD 3 + #define TWI0_TWCK 4 + #define TWI1_TWD 4 + #define TWI1_TWCK 5 +#elif CPU_CM3_SAM3U + #define TWI0_PORT PIOA_BASE + #define TWI1_PORT PIOA_BASE + + #define TWI0_PERIPH PIO_PERIPH_A + #define TWI1_PERIPH PIO_PERIPH_A + + #define TWI0_TWD 9 + #define TWI0_TWCK 10 + #define TWI1_TWD 24 + #define TWI1_TWCK 25 +#endif + +#if CPU_CM3_SAM3X + #define SSC_PORT PIOA_BASE + #define SSC_PIO_PDR PIOA_PDR + #define SSC_RECV_PERIPH PIO_PERIPH_A + #define SSC_TRAN_PERIPH PIO_PERIPH_B + #define SSC_RD 18 + #define SSC_RF 17 + #define SSC_RK 19 + #define SSC_TD 16 + #define SSC_TF 15 + #define SSC_TK 14 +#elif CPU_CM3_SAM3N + #define SSC_PORT /* None! */ + #define SSC_PIO_PDR /* None! */ + #define SSC_RECV_PERIPH /* None! */ + #define SSC_TRAN_PERIPH /* None! */ + #define SSC_RD /* None! */ + #define SSC_RF /* None! */ + #define SSC_RK /* None! */ + #define SSC_TD /* None! */ + #define SSC_TF /* None! */ + #define SSC_TK /* None! */ +#elif CPU_CM3_SAM3S + #define SSC_PORT PIOA_BASE + #define SSC_PIO_PDR PIOA_PDR + #define SSC_RECV_PERIPH PIO_PERIPH_A + #define SSC_TRAN_PERIPH PIO_PERIPH_A + #define SSC_RD 18 + #define SSC_RF 20 + #define SSC_RK 19 + #define SSC_TD 17 + #define SSC_TF 15 + #define SSC_TK 16 +#elif CPU_CM3_SAM3U + #define SSC_PORT PIOA_BASE + #define SSC_PIO_PDR PIOA_PDR + #define SSC_RECV_PERIPH PIO_PERIPH_A + #define SSC_TRAN_PERIPH PIO_PERIPH_A + #define SSC_RD 27 + #define SSC_RF 31 + #define SSC_RK 29 + #define SSC_TD 26 + #define SSC_TF 30 + #define SSC_TK 28 +#else + #error no ssc pins are defined for this cpu +#endif + +/*\}*/ +#endif /* SAM3_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_adc.h b/bertos/cpu/cortex-m3/io/sam3_adc.h new file mode 100644 index 0000000..30bac49 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_adc.h @@ -0,0 +1,254 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * SAM3 Analog to Digital Converter. + * + * $WIZ$ + * + */ + + +#ifndef SAM3_ADC_H +#define SAM3_ADC_H + +/** ADC registers base. */ +#define ADC_BASE 0x400C0000 + +/** + * ADC control register + * \{ + */ +#define ADC_CR_OFF 0x00000000 ///< Control register offeset. +#define ADC_CR (*((reg32_t *)(ADC_BASE + ADC_CR_OFF))) ///< Control register address. +#define ADC_SWRST 0 ///< Software reset. +#define ADC_START 1 ///< Start conversion. +/* \} */ + +/** + * ADC mode register + * \{ + */ +#define ADC_MR_OFF 0x00000004 ///< Mode register offeset. +#define ADC_MR (*((reg32_t *)(ADC_BASE + ADC_MR_OFF))) ///< Mode register address. +#define ADC_TRGEN 0 ///< Trigger enable. + +#define ADC_TRGSEL_TIOA0 0x00000000 ///< TIOA output of the timer counter channel 0. +#define ADC_TRGSEL_TIOA1 0x00000002 ///< TIOA output of the timer counter channel 1. +#define ADC_TRGSEL_TIOA2 0x00000004 ///< TIOA output of the timer counter channel 2. +#define ADC_TRGSEL_PWM0 0x0000000A ///< PWM Event Line 0. +#define ADC_TRGSEL_PWM1 0x0000000C ///< PWM Event Line 1. + +#define ADC_LOWRES 4 ///< Resolution 0: 12-bit, 1: 10-bit. +#define ADC_SLEEP 5 ///< Sleep mode. +#define ADC_FREERUN 7 ///< Freerun. + +/** + * Prescaler rate selection. + * ADCClock = MCK / ((ADC_PRESCALER_VALUE + 1) * 2) + */ +#define ADC_PRESCALER_MASK 0x0000FF00 ///< Prescaler rate selection mask. +#define ADC_PRESCALER_SHIFT 8 ///< Prescale rate selection shift. + +/** + * Start up timer. + */ +#define ADC_STARTUP_MASK 0x000F0000 ///< Start up timer mask. +#define ADC_STARTUP_SHIFT 16 ///< Start up timer shift. + +/** + * Start up timer. + * $WIZ$ sam3_adc_sut = "ADC_SUT0","ADC_SUT8","ADC_SUT16","ADC_SUT24","ADC_SUT64","DC_SUT80","ADC_SUT96","ADC_SUT112","ADC_SUT512","ADC_SUT576","ADC_SUT640","ADC_SUT704","ADC_SUT768","ADC_SUT832","ADC_SUT896","ADC_SUT960" + * \{ + */ +#define ADC_SUT0 0 ///< 0 period of ADCClock. +#define ADC_SUT8 1 ///< 8 period of ADCClock. +#define ADC_SUT16 2 ///< 16 period of ADCClock. +#define ADC_SUT24 3 ///< 24 period of ADCClock. +#define ADC_SUT64 4 ///< 64 period of ADCClock. +#define ADC_SUT80 5 ///< 80 period of ADCClock. +#define ADC_SUT96 6 ///< 96 period of ADCClock. +#define ADC_SUT112 7 ///< 112 period of ADCClock. +#define ADC_SUT512 8 ///< 512 period of ADCClock. +#define ADC_SUT576 9 ///< 576 period of ADCClock. +#define ADC_SUT640 10 ///< 640 period of ADCClock. +#define ADC_SUT704 11 ///< 704 period of ADCClock. +#define ADC_SUT768 12 ///< 768 period of ADCClock. +#define ADC_SUT832 13 ///< 832 period of ADCClock. +#define ADC_SUT896 14 ///< 896 period of ADCClock. +#define ADC_SUT960 15 ///< 896 period of ADCClock. +/** \} */ + +/** + * Analog Settling Time. + * $WIZ$ sam3_adc_stt = "ADC_AST3", "ADC_AST5", "ADC_AST9", "ADC_AST17" + */ +#define ADC_SETTLING_MASK 0x00300000 ///< Analog Settling Time mask. +#define ADC_SETTLING_SHIFT 20 ///< Analog Settling Time shift. +#define ADC_AST3 0 ///< 3 period of ADCClock +#define ADC_AST5 1 ///< 5 period of ADCClock +#define ADC_AST9 2 ///< 9 period of ADCClock +#define ADC_AST17 3 ///< 17 period of ADCClock + +/** + * Tracking Time. + * Tracking Time = (TRACKTIM + 1) * ADCClock periods. + */ +#define ADC_TRACKTIM_MASK 0x0F000000 ///< Tracking Time mask. +#define ADC_TRACKTIM_SHIFT 24 ///< Tracking Time shift. + +/** + * Transfer Period. + * Transfer Period = (TRANSFER * 2 + 3) ADCClock periods. + */ +#define ADC_TRANSFER_MASK 0x30000000 ///< Transfer Period mask. +#define ADC_TRANSFER_SHIFT 28 ///< Transfer Period shift. +/* \} */ + + +/** + * ADC channel enable register + */ +#define ADC_CHER_OFF 0x00000010 ///< Channel enable register offeset. +#define ADC_CHER (*((reg32_t *)(ADC_BASE + ADC_CHER_OFF))) ///< Channel enable register address. + +/** + * ADC channel disable register + */ +#define ADC_CHDR_OFF 0x00000014 ///< Channel disable register offeset. +#define ADC_CHDR (*((reg32_t *)(ADC_BASE + ADC_CHDR_OFF))) ///< Channel disable register address. + +/** + * ADC channel status register + */ +#define ADC_CHSR_OFF 0x00000018 ///< Channel status register offeset. +#define ADC_CHSR (*((reg32_t *)(ADC_BASE + ADC_CHSR_OFF))) ///< Channel status register address. + + +/** + * ADC status register + */ +#define ADC_SR_OFF 0x0000001C ///< Status register offeset. +#define ADC_SR (*((reg32_t *)(ADC_BASE + ADC_SR_OFF))) ///< Status register address. + + +#define ADC_CH_MASK 0x000000FF ///< Channel mask. +#define ADC_CH0 0 ///< Channel 0 +#define ADC_CH1 1 ///< Channel 1 +#define ADC_CH2 2 ///< Channel 2 +#define ADC_CH3 3 ///< Channel 3 +#define ADC_CH4 4 ///< Channel 4 +#define ADC_CH5 5 ///< Channel 5 +#define ADC_CH6 6 ///< Channel 6 +#define ADC_CH7 7 ///< Channel 7 + +/** + * ADC Interrupt enable register. + */ +#define ADC_IER_OFF 0x00000024 ///< Interrupt enable register offeset. +#define ADC_IER (*((reg32_t *)(ADC_BASE + ADC_IER_OFF))) ///< Interrupt enable register. + +/** + * ADC Interrupt disable register. + */ +#define ADC_IDR_OFF 0x00000028 ///< Interrupt disable register offeset. +#define ADC_IDR (*((reg32_t *)(ADC_BASE + ADC_IDR_OFF))) ///< Interrupt disable register. + +/** + * ADC Interrupt mask register. + */ +#define ADC_IMR_OFF 0x0000002C ///< Interrupt mask register offeset. +#define ADC_IMR (*((reg32_t *)(ADC_BASE + ADC_IMR_OFF))) ///< Interrupt mask register. + +/** + * ADC Interrupt status register. + */ +#define ADC_ISR_OFF 0x00000030 ///< Interrupt status register offeset. +#define ADC_ISR (*((reg32_t *)(ADC_BASE + ADC_ISR_OFF))) ///< Interrupt status register. + +#define ADC_EOC_MASK 0x000000FF ///< End of converison mask. +#define ADC_EOC0 0 ///< End of conversion channel 0. +#define ADC_EOC1 1 ///< End of conversion channel 1. +#define ADC_EOC2 2 ///< End of conversion channel 2. +#define ADC_EOC3 3 ///< End of conversion channel 3. +#define ADC_EOC4 4 ///< End of conversion channel 4. +#define ADC_EOC5 5 ///< End of conversion channel 5. +#define ADC_EOC6 6 ///< End of conversion channel 6. +#define ADC_EOC7 7 ///< End of conversion channel 7. + +#define ADC_OVRE0 8 ///< Overrun error channel 0. +#define ADC_OVRE1 9 ///< Overrun error channel 1. +#define ADC_OVRE2 10 ///< Overrun error channel 2. +#define ADC_OVRE3 11 ///< Overrun error channel 3. +#define ADC_OVRE4 12 ///< Overrun error channel 4. +#define ADC_OVRE5 13 ///< Overrun error channel 5. +#define ADC_OVRE6 14 ///< Overrun error channel 6. +#define ADC_OVRE7 15 ///< Overrun error channel 7. + +#define ADC_DRDY 24 ///< Data ready. +#define ADC_GOVRE 25 ///< General overrun error. +#define ADC_COMPE 26 ///< Comparition event interrupt mask. +#define ADC_ENDRX 27 ///< End of RX buffer. +#define ADC_RXBUFF 28 ///< Rx buffer full. + +/** + * ADC last convert data register. + * \{ + */ +#define ADC_LCDR_OFF 0x00000020 ///< Last converted data register offeset. +#define ADC_LCDR (*((reg32_t *)(ADC_BASE + ADC_LCDR_OFF))) ///< Last converted RAW data register. +#define ADC_LDATA (ADC_LCDR & 0xFFF) ///< Last data converted register. +#define ADC_CHNB ((ADC_LCDR & 0xF000) >> 12) ///< Channel number. +/* \} */ + + +/** + * ADC Channel data register. + * \{ + */ +#define ADC_CDR_OFF 0x00000050 ///< Channel data register offeset. +#define ADC_CDR (*((reg32_t *)(ADC_BASE + ADC_CDR_OFF))) ///< Channel data register. +/* \} */ + + +/** + * ADC Analog Control register. + * \{ + */ +#define ADC_ACR_OFF 0x00000094 ///< Analog control register offeset. +#define ADC_ACR (*((reg32_t *)(ADC_BASE + ADC_ACR_OFF))) ///< Analog control register. +#define ADC_TSON 4 ///< Temperature Sensor On. +#define ADC_TEMPERATURE_CH 15 ///< Channel where is the internal sensor temperature +/* \} */ + +#endif /* SAM3_ADC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_dacc.h b/bertos/cpu/cortex-m3/io/sam3_dacc.h new file mode 100644 index 0000000..e2071dd --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_dacc.h @@ -0,0 +1,208 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * SAM3 Digital to Analog to Converter. + * + * $WIZ$ + */ + + +#ifndef SAM3_DACC_H +#define SAM3_DACC_H + +#include + +/** DACC registers base. */ +#define DACC_BASE 0x400C8000 + +/** + * DACC control register + * \{ + */ +#define DACC_CR_OFF 0x00000000 ///< Control register offeset. +#define DACC_CR (*((reg32_t*)(DACC_BASE + DACC_CR_OFF))) ///< Control register address. +#define DACC_SWRST 0 ///< Software reset. +/* \} */ + +/** + * DACC mode register + * \{ + */ +#define DACC_MR_OFF 0x00000004 ///< Mode register offeset. +#define DACC_MR (*((reg32_t*) (DACC_BASE + DACC_MR_OFF))) ///< Mode register address. +#define DACC_TRGEN 0 ///< Trigger enable. +#define DACC_TRGSEL_MASK 0x14 ///< Trigger selection mask. +#define DACC_TRGSEL_SHIFT 1 ///< Trigger selection shift. +#define DACC_WORD 4 ///< Word transfer. +#define DACC_SLEEP 5 ///< Sleep mode.Fast Wake up Mode +#define DACC_FASTWKUP 6 ///< Fast Wake up Mode +#define DACC_REFRESH_MASK 0xFF00 ///< Refresh Period mask +#define DACC_REFRESH_SHIFT 8 ///< Refresh Period shift +#define DACC_USER_SEL_MASK 0x30000 ///< User Channel Selection mask +#define DACC_USER_SEL_SHIFT 16 ///< User Channel Selection shift +#define DACC_TAG 20 ///< Tag selection mode +#define DACC_MAXS 21 ///< Max speed mode +#define DACC_STARTUP_MASK 0x3F000000 ///< Startup time selection +#define DACC_STARTUP_SHIFT 24 ///< Startup time selsection shift + + +/** + * Trigger selection. + * $WIZ$ sam3x_dac_tc = "DACC_TRGSEL_TIO_CH0", "DACC_TRGSEL_TIO_CH1", "DACC_TRGSEL_TIO_CH2", "DACC_TRGSEL_PWM0", "DACC_TRGSEL_PWM1" + * \{ + */ + #define DACC_TRGSEL_TIO_CH0 1 + #define DACC_TRGSEL_TIO_CH1 2 + #define DACC_TRGSEL_TIO_CH2 3 + #define DACC_TRGSEL_PWM0 4 + #define DACC_TRGSEL_PWM1 5 +/* \} */ + +#define DACC_MR_STARTUP_0 0 ///< 0 periods of DACClock +#define DACC_MR_STARTUP_8 1 ///< 8 periods of DACClock +#define DACC_MR_STARTUP_16 2 ///< 16 periods of of DACClock +#define DACC_MR_STARTUP_24 3 ///< 24 periods of of DACClock +#define DACC_MR_STARTUP_64 4 ///< 64 periods of of DACClock +#define DACC_MR_STARTUP_80 5 ///< 70 periods of of DACClock +#define DACC_MR_STARTUP_96 6 ///< 96 periods of of DACClock +#define DACC_MR_STARTUP_112 7 ///< 112 periods of of DACClock +#define DACC_MR_STARTUP_512 8 ///< 512 periods of DACClock +#define DACC_MR_STARTUP_576 9 ///< 576 periods of DACClock +#define DACC_MR_STARTUP_640 10 ///< 640 periods of DACClock +#define DACC_MR_STARTUP_704 11 ///< 704 periods of DACClock +#define DACC_MR_STARTUP_768 12 ///< 768 periods of DACClock +#define DACC_MR_STARTUP_832 13 ///< 832 periods of DACClock +#define DACC_MR_STARTUP_896 14 ///< 896 periods of DACClock +#define DACC_MR_STARTUP_960 15 ///< 960 periods of DACClock +#define DACC_MR_STARTUP_1024 16 ///< 1024 periods of DACClock +#define DACC_MR_STARTUP_1088 17 ///< 1088 periods of DACClock +#define DACC_MR_STARTUP_1152 18 ///< 1152 periods of DACClock +#define DACC_MR_STARTUP_1216 19 ///< 1216 periods of DACClock +#define DACC_MR_STARTUP_1280 20 ///< 1280 periods of DACClock +#define DACC_MR_STARTUP_1344 21 ///< 1344 periods of DACClock +#define DACC_MR_STARTUP_1408 22 ///< 1408 periods of DACClock +#define DACC_MR_STARTUP_1472 23 ///< 1472 periods of DACClock +#define DACC_MR_STARTUP_1536 24 ///< 1536 periods of DACClock +#define DACC_MR_STARTUP_1600 25 ///< 1600 periods of DACClock +#define DACC_MR_STARTUP_1664 26 ///< 1664 periods of DACClock +#define DACC_MR_STARTUP_1728 27 ///< 1728 periods of DACClock +#define DACC_MR_STARTUP_1792 28 ///< 1792 periods of DACClock +#define DACC_MR_STARTUP_1856 29 ///< 1856 periods of DACClock +#define DACC_MR_STARTUP_1920 30 ///< 1920 periods of DACClock +#define DACC_MR_STARTUP_1984 31 ///< 1984 periods of DACClock +/* \} */ + +/** + * DACC channel enable register + */ +#define DACC_CHER_OFF 0x00000010 ///< Channel enable register offeset. +#define DACC_CHER (*((reg32_t*) (DACC_BASE + DACC_CHER_OFF))) ///< Channel enable register address. + +/** + * DACC channel disable register + */ +#define DACC_CHDR_OFF 0x00000014 ///< Channel disable register offeset. +#define DACC_CHDR (*((reg32_t*) (DACC_BASE + DACC_CHDR_OFF))) ///< Channel disable register address. + +/** + * DACC channel status register + */ +#define DACC_CHSR_OFF 0x00000018 ///< Channel status register offeset. +#define DACC_CHSR (*((reg32_t*) (DACC_BASE + DACC_CHSR_OFF))) ///< Channel status register address. + +#define DACC_CH0 0 ///< Channel 0. +#define DACC_CH1 1 ///< Channel 1. +/* \} */ + +/** + * DACC Conversion data register + */ +#define DACC_CDR_OFF 0x00000020 ///< Conversion data register offeset. +#define DACC_CDR (*((reg32_t*) (DACC_BASE + DACC_CDR_OFF))) ///< Conversion data register address. + + +/** + * DACC Interrupt enable register + */ +#define DACC_IER_OFF 0x00000024 ///< Interrupt enable register offeset. +#define DACC_IER (*((reg32_t*) (DACC_BASE + DACC_IER_OFF))) ///< Interrupt enable register address. + +/** + * DACC Interrupt disable register + */ +#define DACC_IDR_OFF 0x00000028 ///< Interrupt disable register offeset. +#define DACC_IDR (*((reg32_t*) (DACC_BASE + DACC_IDR_OFF))) ///< Interrupt disable register address. + +/** + * DACC Interrupt disable register + */ +#define DACC_IMR_OFF 0x0000002C ///< Interrupt mask register offeset. +#define DACC_IMR (*((reg32_t*) (DACC_BASE + DACC_IMR_OFF))) ///< Interrupt mask register address. + +/** + * DACC Interrupt status register + */ +#define DACC_ISR_OFF 0x00000030 ///< Interrupt disable status offeset. +#define DACC_ISR (*((reg32_t*) (DACC_BASE + DACC_ISR_OFF))) ///< Interrupt status register address. + +#define DACC_TXRDY 0 ///< Transmit ready interrupt +#define DACC_EOC 1 ///< End of conversion interrupt +#define DACC_ENDTX 2 ///< End of DMA Interrupt Flag +#define DACC_TXBUFE 3 ///< Transmit buffer empty interrupt + + +/** + * DMA controller for DACC + * DACC PDC register. + */ +#define DACC_RPR (*((reg32_t*) (DACC_BASE + PERIPH_RPR_OFF))) ///< Receive Pointer Register. +#define DACC_RCR (*((reg32_t*) (DACC_BASE + PERIPH_RCR_OFF))) ///< Receive Counter Register. +#define DACC_TPR (*((reg32_t*) (DACC_BASE + PERIPH_TPR_OFF))) ///< Transmit Pointer Register. +#define DACC_TCR (*((reg32_t*) (DACC_BASE + PERIPH_TCR_OFF))) ///< Transmit Counter Register. +#define DACC_RNPR (*((reg32_t*) (DACC_BASE + PERIPH_RNPR_OFF))) ///< Receive Next Pointer Register. +#define DACC_RNCR (*((reg32_t*) (DACC_BASE + PERIPH_RNCR_OFF))) ///< Receive Next Counter Register. +#define DACC_TNPR (*((reg32_t*) (DACC_BASE + PERIPH_TNPR_OFF))) ///< Transmit Next Pointer Register. +#define DACC_TNCR (*((reg32_t*) (DACC_BASE + PERIPH_TNCR_OFF))) ///< Transmit Next Counter Register. +#define DACC_PTCR (*((reg32_t*) (DACC_BASE + PERIPH_PTCR_OFF))) ///< Transfer Control Register. +#define DACC_PTSR (*((reg32_t*) (DACC_BASE + PERIPH_PTSR_OFF))) ///< Transfer Status Register. + + +#define DACC_PTCR_RXTEN 0 ///< DACC_PTCR Receiver Transfer Enable. +#define DACC_PTCR_RXTDIS 1 ///< DACC_PTCR Receiver Transfer Disable. +#define DACC_PTCR_TXTEN 8 ///< DACC_PTCR Transmitter Transfer Enable. +#define DACC_PTCR_TXTDIS 9 ///< DACC_PTCR Transmitter Transfer Disable. +#define DACC_PTSR_RXTEN 0 ///< DACC_PTSR Receiver Transfer Enable. +#define DACC_PTSR_TXTEN 8 ///< DACC_PTSR Transmitter Transfer Enable. + +#endif /* SAM3_DACC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_emac.h b/bertos/cpu/cortex-m3/io/sam3_emac.h new file mode 100644 index 0000000..7d2196a --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_emac.h @@ -0,0 +1,372 @@ +/** + * \file + * + * + * \brief SAM3 EMAC definitions. + * + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef SAM3_EMAC_H +#define SAM3_EMAC_H + +#if CPU_CM3_SAM3X + +#include + +/** EMAC registers base. */ +#define EMAC_BASE 0x400B0000 + + +/** + * + * Network Control Register + * + */ +/* \{ */ +#define EMAC_NCR_OFF 0x00000000 ///< Network control register offset. +#define EMAC_NCR (*((reg32_t *)(EMAC_BASE + EMAC_NCR_OFF))) ///< Network Control register address. +#define EMAC_LB 0 ///< PHY loopback. +#define EMAC_LLB 1 ///< EMAC loopback. +#define EMAC_RE 2 ///< Receive enable. +#define EMAC_TE 3 ///< Transmit enable. +#define EMAC_MPE 4 ///< Management port enable. +#define EMAC_CLRSTAT 5 ///< Clear statistics registers. +#define EMAC_INCSTAT 6 ///< Increment statistics registers. +#define EMAC_WESTAT 7 ///< Write enable for statistics registers. +#define EMAC_BP 8 ///< Back pressure. +#define EMAC_TSTART 9 ///< Start Transmission. +#define EMAC_THALT 10 ///< Transmission halt. +// Not in sam7x +//#define EMAC_TPFR 11 ///< Transmit pause frame. +//#define EMAC_TZQ 12 ///< Transmit zero quantum pause frame. +/* \} */ + +/** + * Network Configuration Register + * + */ +/* \{ */ +#define EMAC_NCFGR_OFF 0x00000004 ///< Network configuration register offset. +#define EMAC_NCFGR (*((reg32_t *)(EMAC_BASE + EMAC_NCFGR_OFF))) ///< Network configuration register address. +#define EMAC_SPD 0 ///< Speed, set for 100Mb. +#define EMAC_FD 1 ///< Full duplex. +#define EMAC_JFRAME 3 ///< Jumbo Frames. +#define EMAC_CAF 4 ///< Copy all frames. +#define EMAC_NBC 5 ///< No broadcast. +#define EMAC_MTI 6 ///< Multicast hash event enable. +#define EMAC_UNI 7 ///< Unicast hash enable. +#define EMAC_BIG 8 ///< Receive 1522 bytes. +// Not in sam7x +//#define EMAC_EAE 9 ///< External address match enable. +#define EMAC_CLK 0x00000C00 ///< Clock divider mask. +#define EMAC_CLK_HCLK_8 0x00000000 ///< HCLK divided by 8. +#define EMAC_CLK_HCLK_16 0x00000400 ///< HCLK divided by 16. +#define EMAC_CLK_HCLK_32 0x00000800 ///< HCLK divided by 32. +#define EMAC_CLK_HCLK_64 0x00000C00 ///< HCLK divided by 64. +#define EMAC_RTY 12 ///< Retry test. +#define EMAC_PAE 13 ///< Pause enable. +#define EMAC_RBOF 0x0000C000 ///< Receive buffer offset. +#define EMAC_RBOF_OFFSET_0 0x00000000 ///< No offset from start of receive buffer. +#define EMAC_RBOF_OFFSET_1 0x00004000 ///< One byte offset from start of receive buffer. +#define EMAC_RBOF_OFFSET_2 0x00008000 ///< Two bytes offset from start of receive buffer. +#define EMAC_RBOF_OFFSET_3 0x0000C000 ///< Three bytes offset from start of receive buffer. +#define EMAC_RLCE 16 ///< Receive length field checking enable. +#define EMAC_DRFCS 17 ///< Discard receive FCS. +#define EMAC_EFRHD 18 ///< Allow receive during transmit in half duplex. +#define EMAC_IRXFCS 19 ///< Ignore received FCS. +/* \} */ + +/** + * Network Status Register + * + */ +/* \{ */ +#define EMAC_NSR_OFF 0x00000008 ///< Network Status register offset. +#define EMAC_NSR (*((reg32_t *)(EMAC_BASE + EMAC_NSR_OFF))) ///< Network Status register address. +// Not in sam7x +//#define EMAC_LINKR 0 ///< . +#define EMAC_MDIO 1 ///< Status of MDIO input pin. +#define EMAC_IDLE 2 ///< Set when PHY is running. +/* \} */ + +/** + * Transmit Status Register + */ +/* \{ */ +#define EMAC_TSR_OFF 0x00000014 ///< Transmit Status register offset. +#define EMAC_TSR (*((reg32_t *)(EMAC_BASE + EMAC_TSR_OFF))) ///< Transmit Status register address. + +#define EMAC_UBR 0 ///< Used bit read. +#define EMAC_COL 1 ///< Collision occurred. +#define EMAC_RLES 2 ///< Retry limit exceeded. +#define EMAC_TGO 3 ///< Transmit active. +#define EMAC_BEX 4 ///< Buffers exhausted mid frame. +#define EMAC_COMP 5 ///< Transmit complete. +#define EMAC_UND 6 ///< Transmit underrun. +/* \} */ + +/** + * Buffer Queue Pointer Register + * + */ +/* \{ */ +#define EMAC_RBQP_OFF 0x00000018 ///< Receive buffer queue pointer. +#define EMAC_RBQP (*((reg32_t *)(EMAC_BASE + EMAC_RBQP_OFF))) ///< Receive buffer queue pointer. +#define EMAC_TBQP_OFF 0x0000001C ///< Transmit buffer queue pointer. +#define EMAC_TBQP (*((reg32_t *)(EMAC_BASE + EMAC_TBQP_OFF))) ///< Transmit buffer queue pointer. +/* \} */ + +/** + * Receive Status Register + */ +/* \{ */ +#define EMAC_RSR_OFF 0x00000020 ///< Receive status register offset. +#define EMAC_RSR (*((reg32_t *)(EMAC_BASE + EMAC_RSR_OFF))) ///< Receive status register address. +#define EMAC_BNA 0 ///< Buffer not available. +#define EMAC_REC 1 ///< Frame received. +#define EMAC_OVR 2 ///< Receive overrun. +/* \} */ + +/** Interrupt Registers */ +/* \{ */ +#define EMAC_ISR_OFF 0x00000024 ///< Status register offset. +#define EMAC_ISR (*((reg32_t *)(EMAC_BASE + EMAC_ISR_OFF))) ///< Status register address. +#define EMAC_IER_OFF 0x00000028 ///< Enable register offset. +#define EMAC_IER (*((reg32_t *)(EMAC_BASE + EMAC_IER_OFF))) ///< Enable register address. +#define EMAC_IDR_OFF 0x0000002C ///< Disable register offset. +#define EMAC_IDR (*((reg32_t *)(EMAC_BASE + EMAC_IDR_OFF))) ///< Disable register address. +#define EMAC_IMR_OFF 0x00000030 ///< Mask register offset. +#define EMAC_IMR (*((reg32_t *)(EMAC_BASE + EMAC_IMR_OFF))) ///< Mask register address. + +#define EMAC_MFD 0 ///< Management frame done. +#define EMAC_RCOMP 1 ///< Receive complete. +#define EMAC_RXUBR 2 ///< Receive used bit read. +#define EMAC_TXUBR 3 ///< Transmit used bit read. +#define EMAC_TUND 4 ///< Ethernet transmit buffer underrun. +#define EMAC_RLEX 5 ///< Retry limit exceeded. +#define EMAC_TXERR 6 ///< Transmit error. +#define EMAC_TCOMP 7 ///< Transmit complete. +//Not in sam7x +//#define EMAC_LINK 8 ///< . +#define EMAC_ROVR 10 ///< Receive overrun. +#define EMAC_HRESP 11 ///< DMA bus error. +#define EMAC_PFR 12 ///< Pause frame received. +#define EMAC_PTZ 13 ///< Pause time zero. +/* \} */ + +/** + * PHY Maintenance Register + * + */ +/* \{ */ +#define EMAC_MAN_OFF 0x00000034 ///< PHY maintenance register offset. +#define EMAC_MAN (*((reg32_t *)(EMAC_BASE + EMAC_MAN_OFF))) ///< PHY maintenance register address. +#define EMAC_DATA 0x0000FFFF ///< PHY data mask. +#define EMAC_CODE 0x00020000 ///< Fixed value. +#define EMAC_REGA 0x007C0000 ///< PHY register address mask. +#define EMAC_REGA_SHIFT 18 ///< PHY register address mask. +#define EMAC_PHYA 0x0F800000 ///< PHY address mask. +#define EMAC_PHYA_SHIFT 23 ///< PHY address mask. +#define EMAC_RW 0x30000000 ///< PHY read/write command mask. +#define EMAC_RW_READ 0x20000000 ///< PHY read command. +#define EMAC_RW_WRITE 0x10000000 ///< PHY write command. +#define EMAC_SOF 0x40000000 ///< Fixed value. +/* \} */ + +/** + * Pause Time Register + * + */ +/* \{ */ +#define EMAC_PTR_OFF 0x00000038 ///< Pause time register offset. +#define EMAC_PTR (*((reg32_t *)(EMAC_BASE + EMAC_PTR_OFF))) ///< Pause time register address. +#define EMAC_PTIME 0x0000FFFF ///< Pause time mask. +/* \} */ + +/** + * Statistics Registers + */ +/* \{ */ +#define EMAC_PFRR_OFF 0x0000003C ///< Pause frames received register offset. +#define EMAC_PFRR (*((reg32_t *)(EMAC_BASE + EMAC_PFRR_OFF))) ///< Pause frames received register address. +#define EMAC_FTO_OFF 0x00000040 ///< Frames transmitted OK register offset. +#define EMAC_FTO (*((reg32_t *)(EMAC_BASE + EMAC_FTO_OFF))) ///< Frames transmitted OK register address. +#define EMAC_SCF_OFF 0x00000044 ///< Single collision frame register offset. +#define EMAC_SCF (*((reg32_t *)(EMAC_BASE + EMAC_SCF_OFF))) ///< Single collision frame register address. +#define EMAC_MCF_OFF 0x00000048 ///< Multiple collision frame register offset. +#define EMAC_MCF (*((reg32_t *)(EMAC_BASE + EMAC_MCF_OFF))) ///< Multiple collision frame register address. +#define EMAC_FRO_OFF 0x0000004C ///< Frames received OK register offset. +#define EMAC_FRO (*((reg32_t *)(EMAC_BASE + EMAC_FRO_OFF))) ///< Frames received OK register address. +#define EMAC_FCSE_OFF 0x00000050 ///< Frame check sequence error register offset. +#define EMAC_FCSE (*((reg32_t *)(EMAC_BASE + EMAC_FCSE_OFF))) ///< Frame check sequence error register address. +#define EMAC_ALE_OFF 0x00000054 ///< Alignment error register offset. +#define EMAC_ALE (*((reg32_t *)(EMAC_BASE + EMAC_ALE_OFF))) ///< Alignment error register address. +#define EMAC_DTF_OFF 0x00000058 ///< Deferred transmission frame register offset. +#define EMAC_DTF (*((reg32_t *)(EMAC_BASE + EMAC_DTF_OFF))) ///< Deferred transmission frame register address. +#define EMAC_LCOL_OFF 0x0000005C ///< Late collision register offset. +#define EMAC_LCOL (*((reg32_t *)(EMAC_BASE + EMAC_LCOL_OFF))) ///< Late collision register address. +#define EMAC_ECOL_OFF 0x00000060 ///< Excessive collision register offset. +#define EMAC_ECOL (*((reg32_t *)(EMAC_BASE + EMAC_ECOL_OFF))) ///< Excessive collision register address. +#define EMAC_TUNDR_OFF 0x00000064 ///< Transmit underrun error register offset. +#define EMAC_TUNDR (*((reg32_t *)(EMAC_BASE + EMAC_TUNDR_OFF))) ///< Transmit underrun error register address. +#define EMAC_CSE_OFF 0x00000068 ///< Carrier sense error register offset. +#define EMAC_CSE (*((reg32_t *)(EMAC_BASE + EMAC_CSE_OFF))) ///< Carrier sense error register address. +#define EMAC_RRE_OFF 0x0000006C ///< Receive resource error register offset. +#define EMAC_RRE (*((reg32_t *)(EMAC_BASE + EMAC_RRE_OFF))) ///< Receive resource error register address. +#define EMAC_ROV_OFF 0x00000070 ///< Receive overrun errors register offset. +#define EMAC_ROV (*((reg32_t *)(EMAC_BASE + EMAC_ROV_OFF))) ///< Receive overrun errors register address. +#define EMAC_RSE_OFF 0x00000074 ///< Receive symbol errors register offset. +#define EMAC_RSE (*((reg32_t *)(EMAC_BASE + EMAC_RSE_OFF))) ///< Receive symbol errors register address. +#define EMAC_ELE_OFF 0x00000078 ///< Excessive length errors register offset. +#define EMAC_ELE (*((reg32_t *)(EMAC_BASE + EMAC_ELE_OFF))) ///< Excessive length errors register address. +#define EMAC_RJA_OFF 0x0000007C ///< Receive jabbers register offset. +#define EMAC_RJA (*((reg32_t *)(EMAC_BASE + EMAC_RJA_OFF))) ///< Receive jabbers register address. +#define EMAC_USF_OFF 0x00000080 ///< Undersize frames register offset. +#define EMAC_USF (*((reg32_t *)(EMAC_BASE + EMAC_USF_OFF))) ///< Undersize frames register address. +#define EMAC_STE_OFF 0x00000084 ///< SQE test error register offset. +#define EMAC_STE (*((reg32_t *)(EMAC_BASE + EMAC_STE_OFF))) ///< SQE test error register address. +#define EMAC_RLE_OFF 0x00000088 ///< Receive length field mismatch register offset. +#define EMAC_RLE (*((reg32_t *)(EMAC_BASE + EMAC_RLE_OFF))) ///< Receive length field mismatch register address. +// Not in sam7x +//#define EMAC_TPF_OFF 0x0000008C ///< Transmitted pause frames register offset. +//#define EMAC_TPF (*((reg32_t *)(EMAC_BASE + EMAC_TPF_OFF) ///< Transmitted pause frames register address. +/* \} */ + +/** + * MAC Adressing Registers + * + */ +/* \{ */ +#define EMAC_HRB_OFF 0x00000090 ///< Hash address bottom[31:0]. +#define EMAC_HRB (*((reg32_t *)(EMAC_BASE + EMAC_HRB_OFF))) ///< Hash address bottom[31:0]. +#define EMAC_HRT_OFF 0x00000094 ///< Hash address top[63:32]. +#define EMAC_HRT (*((reg32_t *)(EMAC_BASE + EMAC_HRT_OFF))) ///< Hash address top[63:32]. +#define EMAC_SA1L_OFF 0x00000098 ///< Specific address 1 bottom, first 4 bytes. +#define EMAC_SA1L (*((reg32_t *)(EMAC_BASE + EMAC_SA1L_OFF))) ///< Specific address 1 bottom, first 4 bytes. +#define EMAC_SA1H_OFF 0x0000009C ///< Specific address 1 top, last 2 bytes. +#define EMAC_SA1H (*((reg32_t *)(EMAC_BASE + EMAC_SA1H_OFF))) ///< Specific address 1 top, last 2 bytes. +#define EMAC_SA2L_OFF 0x000000A0 ///< Specific address 2 bottom, first 4 bytes. +#define EMAC_SA2L (*((reg32_t *)(EMAC_BASE + EMAC_SA2L_OFF))) ///< Specific address 2 bottom, first 4 bytes. +#define EMAC_SA2H_OFF 0x000000A4 ///< Specific address 2 top, last 2 bytes. +#define EMAC_SA2H (*((reg32_t *)(EMAC_BASE + EMAC_SA2H_OFF))) ///< Specific address 2 top, last 2 bytes. +#define EMAC_SA3L_OFF 0x000000A8 ///< Specific address 3 bottom, first 4 bytes. +#define EMAC_SA3L (*((reg32_t *)(EMAC_BASE + EMAC_SA3L_OFF))) ///< Specific address 3 bottom, first 4 bytes. +#define EMAC_SA3H_OFF 0x000000AC ///< Specific address 3 top, last 2 bytes. +#define EMAC_SA3H (*((reg32_t *)(EMAC_BASE + EMAC_SA3H_OFF))) ///< Specific address 3 top, last 2 bytes. +#define EMAC_SA4L_OFF 0x000000B0 ///< Specific address 4 bottom, first 4 bytes. +#define EMAC_SA4L (*((reg32_t *)(EMAC_BASE + EMAC_SA4L_OFF))) ///< Specific address 4 bottom, first 4 bytes. +#define EMAC_SA4H_OFF 0x000000B4 ///< Specific address 4 top, last 2 bytes. +#define EMAC_SA4H (*((reg32_t *)(EMAC_BASE + EMAC_SA4H_OFF))) ///< Specific address 4 top, last 2 bytes. +/* \} */ + +/** + * Type ID Register + * + */ +/* \{ */ +#define EMAC_TID_OFF 0x000000B8 ///< Type ID checking register offset. +#define EMAC_TID (*((reg32_t *)(EMAC_BASE + EMAC_TID_OFF))) ///< Type ID checking register address. +// Not in sam7x +//#define EMAC_TPQ_OFF 0x000000BC ///< Transmit pause quantum register offset. +//#define EMAC_TPQ (*((reg32_t *)(EMAC_BASE + EMAC_TPQ_OFF))) ///< Transmit pause quantum register address. +/* \} */ + +/** + * User Input/Output Register + * + */ +/* \{ */ +#define EMAC_USRIO_OFF 0x000000C0 ///< User input/output register offset. +#define EMAC_USRIO (*((reg32_t *)(EMAC_BASE + EMAC_USRIO_OFF))) ///< User input/output register address. + +#define EMAC_RMII 0 ///< Enable reduced MII. +#define EMAC_CLKEN 1 ///< Enable tranceiver input clock. +/* \} */ + +// Not in sam7x +/* + * Wake On LAN Register + * + * +* \{ * +#define EMAC_WOL_OFF 0x000000C4 ///< Wake On LAN register offset. +#define EMAC_WOL (*((reg32_t *)(EMAC_BASE + EMAC_WOL_OFF) ///< Wake On LAN register address. +#define EMAC_IP 0x0000FFFF ///< ARP request IP address mask. +#define EMAC_MAG 0x00010000 ///< Magic packet event enable. +#define EMAC_ARP 0x00020000 ///< ARP request event enable. +#define EMAC_SA1 0x00040000 ///< Specific address register 1 event enable. +* \} * + +** Revision Register * +* \{ * +#define EMAC_REV_OFF 0x000000FC ///< Revision register offset. +#define EMAC_REV (*((reg32_t *)(EMAC_BASE + EMAC_REV_OFF) ///< Revision register address. +#define EMAC_REVREF 0x0000FFFF ///< Revision. +#define EMAC_PARTREF 0xFFFF0000 ///< Part. +* \} * +*/ + +#endif /* CPU_CM3_SAM3X */ + +#endif /* SAM3_EMAC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_flash.h b/bertos/cpu/cortex-m3/io/sam3_flash.h new file mode 100644 index 0000000..44cae6a --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_flash.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief Atmel SAM3 enhanced embedded flash controller definitions. + */ + +#ifndef SAM3_FLASH_H +#define SAM3_FLASH_H + +/** + * EEFC base registers addresses. + */ +/*\{*/ +#define EEFC0_BASE 0x400E0A00 +#ifdef CPU_CM3_SAM3X + #define EEFC1_BASE 0x400E0C00 +#endif +/*\}*/ + + +/** + * EFC register offsets. + */ +/*\{*/ +#define EEFC_FMR_OFF 0x0 ///< Flash Mode Register +#define EEFC_FCR_OFF 0x4 ///< Flash Command Register +#define EEFC_FSR_OFF 0x8 ///< Flash Status Register +#define EEFC_FRR_OFF 0xC ///< Flash Result Register +/*\}*/ + +/** + * EEFC registers. + */ +/*\{*/ +#define EEFC0_FMR (*((reg32_t *)(EEFC0_BASE + EEFC_FMR_OFF))) ///< Flash Mode Register +#define EEFC0_FCR (*((reg32_t *)(EEFC0_BASE + EEFC_FCR_OFF))) ///< Flash Command Register +#define EEFC0_FSR (*((reg32_t *)(EEFC0_BASE + EEFC_FSR_OFF))) ///< Flash Status Register +#define EEFC0_FRR (*((reg32_t *)(EEFC0_BASE + EEFC_FRR_OFF))) ///< Flash Result Register + +#ifdef CPU_CM3_SAM3X + #define EEFC1_FMR (*((reg32_t *)(EEFC1_BASE + EEFC_FMR_OFF))) ///< Flash Mode Register + #define EEFC1_FCR (*((reg32_t *)(EEFC1_BASE + EEFC_FCR_OFF))) ///< Flash Command Register + #define EEFC1_FSR (*((reg32_t *)(EEFC1_BASE + EEFC_FSR_OFF))) ///< Flash Status Register + #define EEFC1_FRR (*((reg32_t *)(EEFC1_BASE + EEFC_FRR_OFF))) ///< Flash Result Register +#endif +/*\}*/ + + + +/** + * Defines for bit fields in EEFC_FMR register. + */ +/*\{*/ +#define EEFC_FMR_FRDY 0 ///< Ready Interrupt Enable +#define EEFC_FMR_FWS_SHIFT 8 +#define EEFC_FMR_FWS_MASK (0xf << EEFC_FMR_FWS_SHIFT) ///< Flash Wait State +#define EEFC_FMR_FWS(value) (EEFC_FMR_FWS_MASK & ((value) << EEFC_FMR_FWS_SHIFT)) +#define EEFC_FMR_FAM 24 ///< Flash Access Mode +/*\}*/ + +/** + * Defines for bit fields in EEFC_FCR register. + */ +/*\{*/ +#define EEFC_FCR_FCMD_MASK 0xff ///< Flash Command +#define EEFC_FCR_FCMD(value) (EEFC_FCR_FCMD_MASK & (value)) +#define EEFC_FCR_FARG_SHIFT 8 +#define EEFC_FCR_FARG_MASK (0xffff << EEFC_FCR_FARG_SHIFT) ///< Flash Command Argument +#define EEFC_FCR_FARG(value) (EEFC_FCR_FARG_MASK & ((value) << EEFC_FCR_FARG_SHIFT)) +#define EEFC_FCR_FKEY_SHIFT 24 +#define EEFC_FCR_FKEY_MASK (0xff << EEFC_FCR_FKEY_SHIFT) ///< Flash Writing Protection Key +#define EEFC_FCR_FKEY(value) (EEFC_FCR_FKEY_MASK & ((value) << EEFC_FCR_FKEY_SHIFT)) +/*\}*/ + +/** + * Defines for bit fields in EEFC_FSR register. + */ +/*\{*/ +#define EEFC_FSR_FRDY 0 ///< Flash Ready Status +#define EEFC_FSR_FCMDE 1 ///< Flash Command Error Status +#define EEFC_FSR_FLOCKE 2 ///< Flash Lock Error Status +/*\}*/ + +#endif /* SAM3_FLASH_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_ints.h b/bertos/cpu/cortex-m3/io/sam3_ints.h new file mode 100644 index 0000000..3c6bce8 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_ints.h @@ -0,0 +1,146 @@ +/** + * \file + * + * + * \brief SAM3 interrupt definitions. + */ + +#ifndef SAM3_INTS_H +#define SAM3_INTS_H + +/** + * Defines for the fault assignments. + */ +/*\{*/ +#define FAULT_NMI 2 ///< NMI fault +#define FAULT_HARD 3 ///< Hard fault +#define FAULT_MPU 4 ///< MPU fault +#define FAULT_BUS 5 ///< Bus fault +#define FAULT_USAGE 6 ///< Usage fault +#define FAULT_SVCALL 11 ///< SVCall +#define FAULT_DEBUG 12 ///< Debug monitor +#define FAULT_PENDSV 14 ///< PendSV +#define FAULT_SYSTICK 15 ///< System Tick +/*\}*/ + +/** + * Defines for the interrupt assignments. + */ +/*\{*/ +#define INT_PERIPH_BASE 16 + +#if CPU_CM3_SAM3N + #define INT_SUPC (INT_PERIPH_BASE + SUPC_ID) + #define INT_RSTC (INT_PERIPH_BASE + RSTC_ID) + #define INT_RTC (INT_PERIPH_BASE + RTC_ID) + #define INT_RTT (INT_PERIPH_BASE + RTT_ID) + #define INT_WDT (INT_PERIPH_BASE + WDT_ID) + #define INT_PMC (INT_PERIPH_BASE + PMC_ID) + #define INT_EFC (INT_PERIPH_BASE + EFC_ID) + #define INT_UART0 (INT_PERIPH_BASE + UART0_ID) + #define INT_UART1 (INT_PERIPH_BASE + UART1_ID) + #define INT_PIOA (INT_PERIPH_BASE + PIOA_ID) + #define INT_PIOB (INT_PERIPH_BASE + PIOB_ID) + #define INT_PIOC (INT_PERIPH_BASE + PIOC_ID) + #define INT_US0 (INT_PERIPH_BASE + US0_ID) + #define INT_US1 (INT_PERIPH_BASE + US1_ID) + #define INT_TWI0 (INT_PERIPH_BASE + TWI0_ID) + #define INT_TWI1 (INT_PERIPH_BASE + TWI1_ID) + #define INT_SPI0 (INT_PERIPH_BASE + SPI0_ID) + #define INT_TC0 (INT_PERIPH_BASE + TC0_ID) + #define INT_TC1 (INT_PERIPH_BASE + TC1_ID) + #define INT_TC2 (INT_PERIPH_BASE + TC2_ID) + #define INT_TC3 (INT_PERIPH_BASE + TC3_ID) + #define INT_TC4 (INT_PERIPH_BASE + TC4_ID) + #define INT_TC5 (INT_PERIPH_BASE + TC5_ID) + #define INT_ADC (INT_PERIPH_BASE + ADC_ID) + #define INT_DACC (INT_PERIPH_BASE + DACC_ID) + #define INT_PWM (INT_PERIPH_BASE + PWM_ID) + + // Total number of interrupts. + #define NUM_INTERRUPTS 48 + +#elif CPU_CM3_SAM3X + #define INT_SUPC (INT_PERIPH_BASE + SUPC_ID) + #define INT_RSTC (INT_PERIPH_BASE + RSTC_ID) + #define INT_RTC (INT_PERIPH_BASE + RTC_ID) + #define INT_RTT (INT_PERIPH_BASE + RTT_ID) + #define INT_WDT (INT_PERIPH_BASE + WDT_ID) + #define INT_PMC (INT_PERIPH_BASE + PMC_ID) + #define INT_EEFC0 (INT_PERIPH_BASE + EEFC0_ID) + #define INT_EEFC1 (INT_PERIPH_BASE + EEFC1_ID) + #define INT_UART0 (INT_PERIPH_BASE + UART0_ID) + #define INT_SMC_SDRAMC (INT_PERIPH_BASE + SMC_SDRAMC_ID) + #define INT_SDRAMC (INT_PERIPH_BASE + SDRAMC_ID) + #define INT_PIOA (INT_PERIPH_BASE + PIOA_ID) + #define INT_PIOB (INT_PERIPH_BASE + PIOB_ID) + #define INT_PIOC (INT_PERIPH_BASE + PIOC_ID) + #define INT_PIOD (INT_PERIPH_BASE + PIOD_ID) + #define INT_PIOE (INT_PERIPH_BASE + PIOE_ID) + #define INT_PIOF (INT_PERIPH_BASE + PIOF_ID) + #define INT_US0 (INT_PERIPH_BASE + US0_ID) + #define INT_US1 (INT_PERIPH_BASE + US1_ID) + #define INT_US2 (INT_PERIPH_BASE + US2_ID) + #define INT_US3 (INT_PERIPH_BASE + US3_ID) + #define INT_HSMCI (INT_PERIPH_BASE + HSMCI_ID) + #define INT_TWI0 (INT_PERIPH_BASE + TWI0_ID) + #define INT_TWI1 (INT_PERIPH_BASE + TWI1_ID) + #define INT_SPI0 (INT_PERIPH_BASE + SPI0_ID) + #define INT_SPI1 (INT_PERIPH_BASE + SPI1_ID) + #define INT_SSC (INT_PERIPH_BASE + SSC_ID) + #define INT_TC0 (INT_PERIPH_BASE + TC0_ID) + #define INT_TC1 (INT_PERIPH_BASE + TC1_ID) + #define INT_TC2 (INT_PERIPH_BASE + TC2_ID) + #define INT_TC3 (INT_PERIPH_BASE + TC3_ID) + #define INT_TC4 (INT_PERIPH_BASE + TC4_ID) + #define INT_TC5 (INT_PERIPH_BASE + TC5_ID) + #define INT_TC6 (INT_PERIPH_BASE + TC6_ID) + #define INT_TC7 (INT_PERIPH_BASE + TC7_ID) + #define INT_TC8 (INT_PERIPH_BASE + TC8_ID) + #define INT_PWM (INT_PERIPH_BASE + PWM_ID) + #define INT_ADC (INT_PERIPH_BASE + ADC_ID) + #define INT_DACC (INT_PERIPH_BASE + DACC_ID) + #define INT_DMAC (INT_PERIPH_BASE + DMAC_ID) + #define INT_UOTGHS (INT_PERIPH_BASE + UOTGHS_ID) + #define INT_TRNG (INT_PERIPH_BASE + TRNG_ID) + #define INT_EMAC (INT_PERIPH_BASE + EMAC_ID) + #define INT_CAN0 (INT_PERIPH_BASE + CAN0_ID) + #define INT_CAN1 (INT_PERIPH_BASE + CAN1_ID) + + // Total number of interrupts. + #define NUM_INTERRUPTS 61 + +#else + #error Peripheral IDs undefined +#endif +/*\}*/ + +#endif /* SAM3_INTS_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_nvic.h b/bertos/cpu/cortex-m3/io/sam3_nvic.h new file mode 100644 index 0000000..7b8d6ea --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_nvic.h @@ -0,0 +1,1116 @@ +/** + * \file + * + * + * \brief Atmel SAM3 NVIC hardware. + * + * This file does not follow the BeRTOS AT91 register naming convention, + * because the NVIC subsystem is in common with other Cortex-M3 ports. + * Take care when using bit definition macros, they don't define bit numbers + * but values, i.e. you must not use BV(). Moreover register names have + * the _R suffix and offsets don't have the _OFF one. + * Someday we will fix this incoherence... + */ + +#ifndef SAM3_NVIC_H +#define SAM3_NVIC_H + +/** + * The following are defines for the fault assignments. + */ +/*\{*/ +#define FAULT_NMI 2 ///< NMI fault +#define FAULT_HARD 3 ///< Hard fault +#define FAULT_MPU 4 ///< MPU fault +#define FAULT_BUS 5 ///< Bus fault +#define FAULT_USAGE 6 ///< Usage fault +#define FAULT_SVCALL 11 ///< SVCall +#define FAULT_DEBUG 12 ///< Debug monitor +#define FAULT_PENDSV 14 ///< PendSV +#define FAULT_SYSTICK 15 ///< System Tick +/*\}*/ + +/** + * NVIC registers (NVIC) + */ +/*\{*/ +#define NVIC_INT_TYPE_R (*((reg32_t *)0xE000E004)) +#define NVIC_ST_CTRL_R (*((reg32_t *)0xE000E010)) +#define NVIC_ST_RELOAD_R (*((reg32_t *)0xE000E014)) +#define NVIC_ST_CURRENT_R (*((reg32_t *)0xE000E018)) +#define NVIC_ST_CAL_R (*((reg32_t *)0xE000E01C)) +#define NVIC_EN0_R (*((reg32_t *)0xE000E100)) +#define NVIC_EN1_R (*((reg32_t *)0xE000E104)) +#define NVIC_DIS0_R (*((reg32_t *)0xE000E180)) +#define NVIC_DIS1_R (*((reg32_t *)0xE000E184)) +#define NVIC_PEND0_R (*((reg32_t *)0xE000E200)) +#define NVIC_PEND1_R (*((reg32_t *)0xE000E204)) +#define NVIC_UNPEND0_R (*((reg32_t *)0xE000E280)) +#define NVIC_UNPEND1_R (*((reg32_t *)0xE000E284)) +#define NVIC_ACTIVE0_R (*((reg32_t *)0xE000E300)) +#define NVIC_ACTIVE1_R (*((reg32_t *)0xE000E304)) +#define NVIC_PRI0_R (*((reg32_t *)0xE000E400)) +#define NVIC_PRI1_R (*((reg32_t *)0xE000E404)) +#define NVIC_PRI2_R (*((reg32_t *)0xE000E408)) +#define NVIC_PRI3_R (*((reg32_t *)0xE000E40C)) +#define NVIC_PRI4_R (*((reg32_t *)0xE000E410)) +#define NVIC_PRI5_R (*((reg32_t *)0xE000E414)) +#define NVIC_PRI6_R (*((reg32_t *)0xE000E418)) +#define NVIC_PRI7_R (*((reg32_t *)0xE000E41C)) +#define NVIC_PRI8_R (*((reg32_t *)0xE000E420)) +#define NVIC_PRI9_R (*((reg32_t *)0xE000E424)) +#define NVIC_PRI10_R (*((reg32_t *)0xE000E428)) +#define NVIC_CPUID_R (*((reg32_t *)0xE000ED00)) +#define NVIC_INT_CTRL_R (*((reg32_t *)0xE000ED04)) +#define NVIC_VTABLE_R (*((reg32_t *)0xE000ED08)) +#define NVIC_APINT_R (*((reg32_t *)0xE000ED0C)) +#define NVIC_SYS_CTRL_R (*((reg32_t *)0xE000ED10)) +#define NVIC_CFG_CTRL_R (*((reg32_t *)0xE000ED14)) +#define NVIC_SYS_PRI1_R (*((reg32_t *)0xE000ED18)) +#define NVIC_SYS_PRI2_R (*((reg32_t *)0xE000ED1C)) +#define NVIC_SYS_PRI3_R (*((reg32_t *)0xE000ED20)) +#define NVIC_SYS_HND_CTRL_R (*((reg32_t *)0xE000ED24)) +#define NVIC_FAULT_STAT_R (*((reg32_t *)0xE000ED28)) +#define NVIC_HFAULT_STAT_R (*((reg32_t *)0xE000ED2C)) +#define NVIC_DEBUG_STAT_R (*((reg32_t *)0xE000ED30)) +#define NVIC_MM_ADDR_R (*((reg32_t *)0xE000ED34)) +#define NVIC_FAULT_ADDR_R (*((reg32_t *)0xE000ED38)) +#define NVIC_MPU_TYPE_R (*((reg32_t *)0xE000ED90)) +#define NVIC_MPU_CTRL_R (*((reg32_t *)0xE000ED94)) +#define NVIC_MPU_NUMBER_R (*((reg32_t *)0xE000ED98)) +#define NVIC_MPU_BASE_R (*((reg32_t *)0xE000ED9C)) +#define NVIC_MPU_ATTR_R (*((reg32_t *)0xE000EDA0)) +#define NVIC_DBG_CTRL_R (*((reg32_t *)0xE000EDF0)) +#define NVIC_DBG_XFER_R (*((reg32_t *)0xE000EDF4)) +#define NVIC_DBG_DATA_R (*((reg32_t *)0xE000EDF8)) +#define NVIC_DBG_INT_R (*((reg32_t *)0xE000EDFC)) +#define NVIC_SW_TRIG_R (*((reg32_t *)0xE000EF00)) +/*\}*/ + +/** + * The following are defines for the NVIC register addresses. + */ +/*\{*/ +#define NVIC_INT_TYPE 0xE000E004 ///< Interrupt Controller Type Reg +#define NVIC_ST_CTRL 0xE000E010 ///< SysTick Control and Status Reg +#define NVIC_ST_RELOAD 0xE000E014 ///< SysTick Reload Value Register +#define NVIC_ST_CURRENT 0xE000E018 ///< SysTick Current Value Register +#define NVIC_ST_CAL 0xE000E01C ///< SysTick Calibration Value Reg +#define NVIC_EN0 0xE000E100 ///< IRQ 0 to 31 Set Enable Register +#define NVIC_EN1 0xE000E104 ///< IRQ 32 to 63 Set Enable Register +#define NVIC_DIS0 0xE000E180 ///< IRQ 0 to 31 Clear Enable Reg +#define NVIC_DIS1 0xE000E184 ///< IRQ 32 to 63 Clear Enable Reg +#define NVIC_PEND0 0xE000E200 ///< IRQ 0 to 31 Set Pending Register +#define NVIC_PEND1 0xE000E204 ///< IRQ 32 to 63 Set Pending Reg +#define NVIC_UNPEND0 0xE000E280 ///< IRQ 0 to 31 Clear Pending Reg +#define NVIC_UNPEND1 0xE000E284 ///< IRQ 32 to 63 Clear Pending Reg +#define NVIC_ACTIVE0 0xE000E300 ///< IRQ 0 to 31 Active Register +#define NVIC_ACTIVE1 0xE000E304 ///< IRQ 32 to 63 Active Register +#define NVIC_PRI0 0xE000E400 ///< IRQ 0 to 3 Priority Register +#define NVIC_PRI1 0xE000E404 ///< IRQ 4 to 7 Priority Register +#define NVIC_PRI2 0xE000E408 ///< IRQ 8 to 11 Priority Register +#define NVIC_PRI3 0xE000E40C ///< IRQ 12 to 15 Priority Register +#define NVIC_PRI4 0xE000E410 ///< IRQ 16 to 19 Priority Register +#define NVIC_PRI5 0xE000E414 ///< IRQ 20 to 23 Priority Register +#define NVIC_PRI6 0xE000E418 ///< IRQ 24 to 27 Priority Register +#define NVIC_PRI7 0xE000E41C ///< IRQ 28 to 31 Priority Register +#define NVIC_PRI8 0xE000E420 ///< IRQ 32 to 35 Priority Register +#define NVIC_PRI9 0xE000E424 ///< IRQ 36 to 39 Priority Register +#define NVIC_PRI10 0xE000E428 ///< IRQ 40 to 43 Priority Register +#define NVIC_PRI11 0xE000E42C ///< IRQ 44 to 47 Priority Register +#define NVIC_PRI12 0xE000E430 ///< IRQ 48 to 51 Priority Register +#define NVIC_PRI13 0xE000E434 ///< IRQ 52 to 55 Priority Register +#define NVIC_CPUID 0xE000ED00 ///< CPUID Base Register +#define NVIC_INT_CTRL 0xE000ED04 ///< Interrupt Control State Register +#define NVIC_VTABLE 0xE000ED08 ///< Vector Table Offset Register +#define NVIC_APINT 0xE000ED0C ///< App. Int & Reset Control Reg +#define NVIC_SYS_CTRL 0xE000ED10 ///< System Control Register +#define NVIC_CFG_CTRL 0xE000ED14 ///< Configuration Control Register +#define NVIC_SYS_PRI1 0xE000ED18 ///< Sys. Handlers 4 to 7 Priority +#define NVIC_SYS_PRI2 0xE000ED1C ///< Sys. Handlers 8 to 11 Priority +#define NVIC_SYS_PRI3 0xE000ED20 ///< Sys. Handlers 12 to 15 Priority +#define NVIC_SYS_HND_CTRL 0xE000ED24 ///< System Handler Control and State +#define NVIC_FAULT_STAT 0xE000ED28 ///< Configurable Fault Status Reg +#define NVIC_HFAULT_STAT 0xE000ED2C ///< Hard Fault Status Register +#define NVIC_DEBUG_STAT 0xE000ED30 ///< Debug Status Register +#define NVIC_MM_ADDR 0xE000ED34 ///< Mem Manage Address Register +#define NVIC_FAULT_ADDR 0xE000ED38 ///< Bus Fault Address Register +#define NVIC_MPU_TYPE 0xE000ED90 ///< MPU Type Register +#define NVIC_MPU_CTRL 0xE000ED94 ///< MPU Control Register +#define NVIC_MPU_NUMBER 0xE000ED98 ///< MPU Region Number Register +#define NVIC_MPU_BASE 0xE000ED9C ///< MPU Region Base Address Register +#define NVIC_MPU_ATTR 0xE000EDA0 ///< MPU Region Attribute & Size Reg +#define NVIC_DBG_CTRL 0xE000EDF0 ///< Debug Control and Status Reg +#define NVIC_DBG_XFER 0xE000EDF4 ///< Debug Core Reg. Transfer Select +#define NVIC_DBG_DATA 0xE000EDF8 ///< Debug Core Register Data +#define NVIC_DBG_INT 0xE000EDFC ///< Debug Reset Interrupt Control +#define NVIC_SW_TRIG 0xE000EF00 ///< Software Trigger Interrupt Reg +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_TYPE register. + */ +/*\{*/ +#define NVIC_INT_TYPE_LINES_M 0x0000001F ///< Number of interrupt lines (x32) +#define NVIC_INT_TYPE_LINES_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CTRL register. + */ +/*\{*/ +#define NVIC_ST_CTRL_COUNT 0x00010000 ///< Count flag +#define NVIC_ST_CTRL_CLK_SRC 0x00000004 ///< Clock Source +#define NVIC_ST_CTRL_INTEN 0x00000002 ///< Interrupt enable +#define NVIC_ST_CTRL_ENABLE 0x00000001 ///< Counter mode +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_RELOAD register. + */ +/*\{*/ +#define NVIC_ST_RELOAD_M 0x00FFFFFF ///< Counter load value +#define NVIC_ST_RELOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CURRENT + * register. + */ +/*\{*/ +#define NVIC_ST_CURRENT_M 0x00FFFFFF ///< Counter current value +#define NVIC_ST_CURRENT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CAL register. + */ +/*\{*/ +#define NVIC_ST_CAL_NOREF 0x80000000 ///< No reference clock +#define NVIC_ST_CAL_SKEW 0x40000000 ///< Clock skew +#define NVIC_ST_CAL_ONEMS_M 0x00FFFFFF ///< 1ms reference value +#define NVIC_ST_CAL_ONEMS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN0 register. + */ +/*\{*/ +#define NVIC_EN0_INT31 0x80000000 ///< Interrupt 31 enable +#define NVIC_EN0_INT30 0x40000000 ///< Interrupt 30 enable +#define NVIC_EN0_INT29 0x20000000 ///< Interrupt 29 enable +#define NVIC_EN0_INT28 0x10000000 ///< Interrupt 28 enable +#define NVIC_EN0_INT27 0x08000000 ///< Interrupt 27 enable +#define NVIC_EN0_INT26 0x04000000 ///< Interrupt 26 enable +#define NVIC_EN0_INT25 0x02000000 ///< Interrupt 25 enable +#define NVIC_EN0_INT24 0x01000000 ///< Interrupt 24 enable +#define NVIC_EN0_INT23 0x00800000 ///< Interrupt 23 enable +#define NVIC_EN0_INT22 0x00400000 ///< Interrupt 22 enable +#define NVIC_EN0_INT21 0x00200000 ///< Interrupt 21 enable +#define NVIC_EN0_INT20 0x00100000 ///< Interrupt 20 enable +#define NVIC_EN0_INT19 0x00080000 ///< Interrupt 19 enable +#define NVIC_EN0_INT18 0x00040000 ///< Interrupt 18 enable +#define NVIC_EN0_INT17 0x00020000 ///< Interrupt 17 enable +#define NVIC_EN0_INT16 0x00010000 ///< Interrupt 16 enable +#define NVIC_EN0_INT15 0x00008000 ///< Interrupt 15 enable +#define NVIC_EN0_INT14 0x00004000 ///< Interrupt 14 enable +#define NVIC_EN0_INT13 0x00002000 ///< Interrupt 13 enable +#define NVIC_EN0_INT12 0x00001000 ///< Interrupt 12 enable +#define NVIC_EN0_INT11 0x00000800 ///< Interrupt 11 enable +#define NVIC_EN0_INT10 0x00000400 ///< Interrupt 10 enable +#define NVIC_EN0_INT9 0x00000200 ///< Interrupt 9 enable +#define NVIC_EN0_INT8 0x00000100 ///< Interrupt 8 enable +#define NVIC_EN0_INT7 0x00000080 ///< Interrupt 7 enable +#define NVIC_EN0_INT6 0x00000040 ///< Interrupt 6 enable +#define NVIC_EN0_INT5 0x00000020 ///< Interrupt 5 enable +#define NVIC_EN0_INT4 0x00000010 ///< Interrupt 4 enable +#define NVIC_EN0_INT3 0x00000008 ///< Interrupt 3 enable +#define NVIC_EN0_INT2 0x00000004 ///< Interrupt 2 enable +#define NVIC_EN0_INT1 0x00000002 ///< Interrupt 1 enable +#define NVIC_EN0_INT0 0x00000001 ///< Interrupt 0 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN1 register. + */ +/*\{*/ +#define NVIC_EN1_INT59 0x08000000 ///< Interrupt 59 enable +#define NVIC_EN1_INT58 0x04000000 ///< Interrupt 58 enable +#define NVIC_EN1_INT57 0x02000000 ///< Interrupt 57 enable +#define NVIC_EN1_INT56 0x01000000 ///< Interrupt 56 enable +#define NVIC_EN1_INT55 0x00800000 ///< Interrupt 55 enable +#define NVIC_EN1_INT54 0x00400000 ///< Interrupt 54 enable +#define NVIC_EN1_INT53 0x00200000 ///< Interrupt 53 enable +#define NVIC_EN1_INT52 0x00100000 ///< Interrupt 52 enable +#define NVIC_EN1_INT51 0x00080000 ///< Interrupt 51 enable +#define NVIC_EN1_INT50 0x00040000 ///< Interrupt 50 enable +#define NVIC_EN1_INT49 0x00020000 ///< Interrupt 49 enable +#define NVIC_EN1_INT48 0x00010000 ///< Interrupt 48 enable +#define NVIC_EN1_INT47 0x00008000 ///< Interrupt 47 enable +#define NVIC_EN1_INT46 0x00004000 ///< Interrupt 46 enable +#define NVIC_EN1_INT45 0x00002000 ///< Interrupt 45 enable +#define NVIC_EN1_INT44 0x00001000 ///< Interrupt 44 enable +#define NVIC_EN1_INT43 0x00000800 ///< Interrupt 43 enable +#define NVIC_EN1_INT42 0x00000400 ///< Interrupt 42 enable +#define NVIC_EN1_INT41 0x00000200 ///< Interrupt 41 enable +#define NVIC_EN1_INT40 0x00000100 ///< Interrupt 40 enable +#define NVIC_EN1_INT39 0x00000080 ///< Interrupt 39 enable +#define NVIC_EN1_INT38 0x00000040 ///< Interrupt 38 enable +#define NVIC_EN1_INT37 0x00000020 ///< Interrupt 37 enable +#define NVIC_EN1_INT36 0x00000010 ///< Interrupt 36 enable +#define NVIC_EN1_INT35 0x00000008 ///< Interrupt 35 enable +#define NVIC_EN1_INT34 0x00000004 ///< Interrupt 34 enable +#define NVIC_EN1_INT33 0x00000002 ///< Interrupt 33 enable +#define NVIC_EN1_INT32 0x00000001 ///< Interrupt 32 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS0 register. + */ +/*\{*/ +#define NVIC_DIS0_INT31 0x80000000 ///< Interrupt 31 disable +#define NVIC_DIS0_INT30 0x40000000 ///< Interrupt 30 disable +#define NVIC_DIS0_INT29 0x20000000 ///< Interrupt 29 disable +#define NVIC_DIS0_INT28 0x10000000 ///< Interrupt 28 disable +#define NVIC_DIS0_INT27 0x08000000 ///< Interrupt 27 disable +#define NVIC_DIS0_INT26 0x04000000 ///< Interrupt 26 disable +#define NVIC_DIS0_INT25 0x02000000 ///< Interrupt 25 disable +#define NVIC_DIS0_INT24 0x01000000 ///< Interrupt 24 disable +#define NVIC_DIS0_INT23 0x00800000 ///< Interrupt 23 disable +#define NVIC_DIS0_INT22 0x00400000 ///< Interrupt 22 disable +#define NVIC_DIS0_INT21 0x00200000 ///< Interrupt 21 disable +#define NVIC_DIS0_INT20 0x00100000 ///< Interrupt 20 disable +#define NVIC_DIS0_INT19 0x00080000 ///< Interrupt 19 disable +#define NVIC_DIS0_INT18 0x00040000 ///< Interrupt 18 disable +#define NVIC_DIS0_INT17 0x00020000 ///< Interrupt 17 disable +#define NVIC_DIS0_INT16 0x00010000 ///< Interrupt 16 disable +#define NVIC_DIS0_INT15 0x00008000 ///< Interrupt 15 disable +#define NVIC_DIS0_INT14 0x00004000 ///< Interrupt 14 disable +#define NVIC_DIS0_INT13 0x00002000 ///< Interrupt 13 disable +#define NVIC_DIS0_INT12 0x00001000 ///< Interrupt 12 disable +#define NVIC_DIS0_INT11 0x00000800 ///< Interrupt 11 disable +#define NVIC_DIS0_INT10 0x00000400 ///< Interrupt 10 disable +#define NVIC_DIS0_INT9 0x00000200 ///< Interrupt 9 disable +#define NVIC_DIS0_INT8 0x00000100 ///< Interrupt 8 disable +#define NVIC_DIS0_INT7 0x00000080 ///< Interrupt 7 disable +#define NVIC_DIS0_INT6 0x00000040 ///< Interrupt 6 disable +#define NVIC_DIS0_INT5 0x00000020 ///< Interrupt 5 disable +#define NVIC_DIS0_INT4 0x00000010 ///< Interrupt 4 disable +#define NVIC_DIS0_INT3 0x00000008 ///< Interrupt 3 disable +#define NVIC_DIS0_INT2 0x00000004 ///< Interrupt 2 disable +#define NVIC_DIS0_INT1 0x00000002 ///< Interrupt 1 disable +#define NVIC_DIS0_INT0 0x00000001 ///< Interrupt 0 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS1 register. + */ +/*\{*/ +#define NVIC_DIS1_INT59 0x08000000 ///< Interrupt 59 disable +#define NVIC_DIS1_INT58 0x04000000 ///< Interrupt 58 disable +#define NVIC_DIS1_INT57 0x02000000 ///< Interrupt 57 disable +#define NVIC_DIS1_INT56 0x01000000 ///< Interrupt 56 disable +#define NVIC_DIS1_INT55 0x00800000 ///< Interrupt 55 disable +#define NVIC_DIS1_INT54 0x00400000 ///< Interrupt 54 disable +#define NVIC_DIS1_INT53 0x00200000 ///< Interrupt 53 disable +#define NVIC_DIS1_INT52 0x00100000 ///< Interrupt 52 disable +#define NVIC_DIS1_INT51 0x00080000 ///< Interrupt 51 disable +#define NVIC_DIS1_INT50 0x00040000 ///< Interrupt 50 disable +#define NVIC_DIS1_INT49 0x00020000 ///< Interrupt 49 disable +#define NVIC_DIS1_INT48 0x00010000 ///< Interrupt 48 disable +#define NVIC_DIS1_INT47 0x00008000 ///< Interrupt 47 disable +#define NVIC_DIS1_INT46 0x00004000 ///< Interrupt 46 disable +#define NVIC_DIS1_INT45 0x00002000 ///< Interrupt 45 disable +#define NVIC_DIS1_INT44 0x00001000 ///< Interrupt 44 disable +#define NVIC_DIS1_INT43 0x00000800 ///< Interrupt 43 disable +#define NVIC_DIS1_INT42 0x00000400 ///< Interrupt 42 disable +#define NVIC_DIS1_INT41 0x00000200 ///< Interrupt 41 disable +#define NVIC_DIS1_INT40 0x00000100 ///< Interrupt 40 disable +#define NVIC_DIS1_INT39 0x00000080 ///< Interrupt 39 disable +#define NVIC_DIS1_INT38 0x00000040 ///< Interrupt 38 disable +#define NVIC_DIS1_INT37 0x00000020 ///< Interrupt 37 disable +#define NVIC_DIS1_INT36 0x00000010 ///< Interrupt 36 disable +#define NVIC_DIS1_INT35 0x00000008 ///< Interrupt 35 disable +#define NVIC_DIS1_INT34 0x00000004 ///< Interrupt 34 disable +#define NVIC_DIS1_INT33 0x00000002 ///< Interrupt 33 disable +#define NVIC_DIS1_INT32 0x00000001 ///< Interrupt 32 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND0 register. + */ +/*\{*/ +#define NVIC_PEND0_INT31 0x80000000 ///< Interrupt 31 pend +#define NVIC_PEND0_INT30 0x40000000 ///< Interrupt 30 pend +#define NVIC_PEND0_INT29 0x20000000 ///< Interrupt 29 pend +#define NVIC_PEND0_INT28 0x10000000 ///< Interrupt 28 pend +#define NVIC_PEND0_INT27 0x08000000 ///< Interrupt 27 pend +#define NVIC_PEND0_INT26 0x04000000 ///< Interrupt 26 pend +#define NVIC_PEND0_INT25 0x02000000 ///< Interrupt 25 pend +#define NVIC_PEND0_INT24 0x01000000 ///< Interrupt 24 pend +#define NVIC_PEND0_INT23 0x00800000 ///< Interrupt 23 pend +#define NVIC_PEND0_INT22 0x00400000 ///< Interrupt 22 pend +#define NVIC_PEND0_INT21 0x00200000 ///< Interrupt 21 pend +#define NVIC_PEND0_INT20 0x00100000 ///< Interrupt 20 pend +#define NVIC_PEND0_INT19 0x00080000 ///< Interrupt 19 pend +#define NVIC_PEND0_INT18 0x00040000 ///< Interrupt 18 pend +#define NVIC_PEND0_INT17 0x00020000 ///< Interrupt 17 pend +#define NVIC_PEND0_INT16 0x00010000 ///< Interrupt 16 pend +#define NVIC_PEND0_INT15 0x00008000 ///< Interrupt 15 pend +#define NVIC_PEND0_INT14 0x00004000 ///< Interrupt 14 pend +#define NVIC_PEND0_INT13 0x00002000 ///< Interrupt 13 pend +#define NVIC_PEND0_INT12 0x00001000 ///< Interrupt 12 pend +#define NVIC_PEND0_INT11 0x00000800 ///< Interrupt 11 pend +#define NVIC_PEND0_INT10 0x00000400 ///< Interrupt 10 pend +#define NVIC_PEND0_INT9 0x00000200 ///< Interrupt 9 pend +#define NVIC_PEND0_INT8 0x00000100 ///< Interrupt 8 pend +#define NVIC_PEND0_INT7 0x00000080 ///< Interrupt 7 pend +#define NVIC_PEND0_INT6 0x00000040 ///< Interrupt 6 pend +#define NVIC_PEND0_INT5 0x00000020 ///< Interrupt 5 pend +#define NVIC_PEND0_INT4 0x00000010 ///< Interrupt 4 pend +#define NVIC_PEND0_INT3 0x00000008 ///< Interrupt 3 pend +#define NVIC_PEND0_INT2 0x00000004 ///< Interrupt 2 pend +#define NVIC_PEND0_INT1 0x00000002 ///< Interrupt 1 pend +#define NVIC_PEND0_INT0 0x00000001 ///< Interrupt 0 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND1 register. + */ +/*\{*/ +#define NVIC_PEND1_INT59 0x08000000 ///< Interrupt 59 pend +#define NVIC_PEND1_INT58 0x04000000 ///< Interrupt 58 pend +#define NVIC_PEND1_INT57 0x02000000 ///< Interrupt 57 pend +#define NVIC_PEND1_INT56 0x01000000 ///< Interrupt 56 pend +#define NVIC_PEND1_INT55 0x00800000 ///< Interrupt 55 pend +#define NVIC_PEND1_INT54 0x00400000 ///< Interrupt 54 pend +#define NVIC_PEND1_INT53 0x00200000 ///< Interrupt 53 pend +#define NVIC_PEND1_INT52 0x00100000 ///< Interrupt 52 pend +#define NVIC_PEND1_INT51 0x00080000 ///< Interrupt 51 pend +#define NVIC_PEND1_INT50 0x00040000 ///< Interrupt 50 pend +#define NVIC_PEND1_INT49 0x00020000 ///< Interrupt 49 pend +#define NVIC_PEND1_INT48 0x00010000 ///< Interrupt 48 pend +#define NVIC_PEND1_INT47 0x00008000 ///< Interrupt 47 pend +#define NVIC_PEND1_INT46 0x00004000 ///< Interrupt 46 pend +#define NVIC_PEND1_INT45 0x00002000 ///< Interrupt 45 pend +#define NVIC_PEND1_INT44 0x00001000 ///< Interrupt 44 pend +#define NVIC_PEND1_INT43 0x00000800 ///< Interrupt 43 pend +#define NVIC_PEND1_INT42 0x00000400 ///< Interrupt 42 pend +#define NVIC_PEND1_INT41 0x00000200 ///< Interrupt 41 pend +#define NVIC_PEND1_INT40 0x00000100 ///< Interrupt 40 pend +#define NVIC_PEND1_INT39 0x00000080 ///< Interrupt 39 pend +#define NVIC_PEND1_INT38 0x00000040 ///< Interrupt 38 pend +#define NVIC_PEND1_INT37 0x00000020 ///< Interrupt 37 pend +#define NVIC_PEND1_INT36 0x00000010 ///< Interrupt 36 pend +#define NVIC_PEND1_INT35 0x00000008 ///< Interrupt 35 pend +#define NVIC_PEND1_INT34 0x00000004 ///< Interrupt 34 pend +#define NVIC_PEND1_INT33 0x00000002 ///< Interrupt 33 pend +#define NVIC_PEND1_INT32 0x00000001 ///< Interrupt 32 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND0 register. + */ +/*\{*/ +#define NVIC_UNPEND0_INT31 0x80000000 ///< Interrupt 31 unpend +#define NVIC_UNPEND0_INT30 0x40000000 ///< Interrupt 30 unpend +#define NVIC_UNPEND0_INT29 0x20000000 ///< Interrupt 29 unpend +#define NVIC_UNPEND0_INT28 0x10000000 ///< Interrupt 28 unpend +#define NVIC_UNPEND0_INT27 0x08000000 ///< Interrupt 27 unpend +#define NVIC_UNPEND0_INT26 0x04000000 ///< Interrupt 26 unpend +#define NVIC_UNPEND0_INT25 0x02000000 ///< Interrupt 25 unpend +#define NVIC_UNPEND0_INT24 0x01000000 ///< Interrupt 24 unpend +#define NVIC_UNPEND0_INT23 0x00800000 ///< Interrupt 23 unpend +#define NVIC_UNPEND0_INT22 0x00400000 ///< Interrupt 22 unpend +#define NVIC_UNPEND0_INT21 0x00200000 ///< Interrupt 21 unpend +#define NVIC_UNPEND0_INT20 0x00100000 ///< Interrupt 20 unpend +#define NVIC_UNPEND0_INT19 0x00080000 ///< Interrupt 19 unpend +#define NVIC_UNPEND0_INT18 0x00040000 ///< Interrupt 18 unpend +#define NVIC_UNPEND0_INT17 0x00020000 ///< Interrupt 17 unpend +#define NVIC_UNPEND0_INT16 0x00010000 ///< Interrupt 16 unpend +#define NVIC_UNPEND0_INT15 0x00008000 ///< Interrupt 15 unpend +#define NVIC_UNPEND0_INT14 0x00004000 ///< Interrupt 14 unpend +#define NVIC_UNPEND0_INT13 0x00002000 ///< Interrupt 13 unpend +#define NVIC_UNPEND0_INT12 0x00001000 ///< Interrupt 12 unpend +#define NVIC_UNPEND0_INT11 0x00000800 ///< Interrupt 11 unpend +#define NVIC_UNPEND0_INT10 0x00000400 ///< Interrupt 10 unpend +#define NVIC_UNPEND0_INT9 0x00000200 ///< Interrupt 9 unpend +#define NVIC_UNPEND0_INT8 0x00000100 ///< Interrupt 8 unpend +#define NVIC_UNPEND0_INT7 0x00000080 ///< Interrupt 7 unpend +#define NVIC_UNPEND0_INT6 0x00000040 ///< Interrupt 6 unpend +#define NVIC_UNPEND0_INT5 0x00000020 ///< Interrupt 5 unpend +#define NVIC_UNPEND0_INT4 0x00000010 ///< Interrupt 4 unpend +#define NVIC_UNPEND0_INT3 0x00000008 ///< Interrupt 3 unpend +#define NVIC_UNPEND0_INT2 0x00000004 ///< Interrupt 2 unpend +#define NVIC_UNPEND0_INT1 0x00000002 ///< Interrupt 1 unpend +#define NVIC_UNPEND0_INT0 0x00000001 ///< Interrupt 0 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND1 register. + */ +/*\{*/ +#define NVIC_UNPEND1_INT59 0x08000000 ///< Interrupt 59 unpend +#define NVIC_UNPEND1_INT58 0x04000000 ///< Interrupt 58 unpend +#define NVIC_UNPEND1_INT57 0x02000000 ///< Interrupt 57 unpend +#define NVIC_UNPEND1_INT56 0x01000000 ///< Interrupt 56 unpend +#define NVIC_UNPEND1_INT55 0x00800000 ///< Interrupt 55 unpend +#define NVIC_UNPEND1_INT54 0x00400000 ///< Interrupt 54 unpend +#define NVIC_UNPEND1_INT53 0x00200000 ///< Interrupt 53 unpend +#define NVIC_UNPEND1_INT52 0x00100000 ///< Interrupt 52 unpend +#define NVIC_UNPEND1_INT51 0x00080000 ///< Interrupt 51 unpend +#define NVIC_UNPEND1_INT50 0x00040000 ///< Interrupt 50 unpend +#define NVIC_UNPEND1_INT49 0x00020000 ///< Interrupt 49 unpend +#define NVIC_UNPEND1_INT48 0x00010000 ///< Interrupt 48 unpend +#define NVIC_UNPEND1_INT47 0x00008000 ///< Interrupt 47 unpend +#define NVIC_UNPEND1_INT46 0x00004000 ///< Interrupt 46 unpend +#define NVIC_UNPEND1_INT45 0x00002000 ///< Interrupt 45 unpend +#define NVIC_UNPEND1_INT44 0x00001000 ///< Interrupt 44 unpend +#define NVIC_UNPEND1_INT43 0x00000800 ///< Interrupt 43 unpend +#define NVIC_UNPEND1_INT42 0x00000400 ///< Interrupt 42 unpend +#define NVIC_UNPEND1_INT41 0x00000200 ///< Interrupt 41 unpend +#define NVIC_UNPEND1_INT40 0x00000100 ///< Interrupt 40 unpend +#define NVIC_UNPEND1_INT39 0x00000080 ///< Interrupt 39 unpend +#define NVIC_UNPEND1_INT38 0x00000040 ///< Interrupt 38 unpend +#define NVIC_UNPEND1_INT37 0x00000020 ///< Interrupt 37 unpend +#define NVIC_UNPEND1_INT36 0x00000010 ///< Interrupt 36 unpend +#define NVIC_UNPEND1_INT35 0x00000008 ///< Interrupt 35 unpend +#define NVIC_UNPEND1_INT34 0x00000004 ///< Interrupt 34 unpend +#define NVIC_UNPEND1_INT33 0x00000002 ///< Interrupt 33 unpend +#define NVIC_UNPEND1_INT32 0x00000001 ///< Interrupt 32 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE0 register. + */ +/*\{*/ +#define NVIC_ACTIVE0_INT31 0x80000000 ///< Interrupt 31 active +#define NVIC_ACTIVE0_INT30 0x40000000 ///< Interrupt 30 active +#define NVIC_ACTIVE0_INT29 0x20000000 ///< Interrupt 29 active +#define NVIC_ACTIVE0_INT28 0x10000000 ///< Interrupt 28 active +#define NVIC_ACTIVE0_INT27 0x08000000 ///< Interrupt 27 active +#define NVIC_ACTIVE0_INT26 0x04000000 ///< Interrupt 26 active +#define NVIC_ACTIVE0_INT25 0x02000000 ///< Interrupt 25 active +#define NVIC_ACTIVE0_INT24 0x01000000 ///< Interrupt 24 active +#define NVIC_ACTIVE0_INT23 0x00800000 ///< Interrupt 23 active +#define NVIC_ACTIVE0_INT22 0x00400000 ///< Interrupt 22 active +#define NVIC_ACTIVE0_INT21 0x00200000 ///< Interrupt 21 active +#define NVIC_ACTIVE0_INT20 0x00100000 ///< Interrupt 20 active +#define NVIC_ACTIVE0_INT19 0x00080000 ///< Interrupt 19 active +#define NVIC_ACTIVE0_INT18 0x00040000 ///< Interrupt 18 active +#define NVIC_ACTIVE0_INT17 0x00020000 ///< Interrupt 17 active +#define NVIC_ACTIVE0_INT16 0x00010000 ///< Interrupt 16 active +#define NVIC_ACTIVE0_INT15 0x00008000 ///< Interrupt 15 active +#define NVIC_ACTIVE0_INT14 0x00004000 ///< Interrupt 14 active +#define NVIC_ACTIVE0_INT13 0x00002000 ///< Interrupt 13 active +#define NVIC_ACTIVE0_INT12 0x00001000 ///< Interrupt 12 active +#define NVIC_ACTIVE0_INT11 0x00000800 ///< Interrupt 11 active +#define NVIC_ACTIVE0_INT10 0x00000400 ///< Interrupt 10 active +#define NVIC_ACTIVE0_INT9 0x00000200 ///< Interrupt 9 active +#define NVIC_ACTIVE0_INT8 0x00000100 ///< Interrupt 8 active +#define NVIC_ACTIVE0_INT7 0x00000080 ///< Interrupt 7 active +#define NVIC_ACTIVE0_INT6 0x00000040 ///< Interrupt 6 active +#define NVIC_ACTIVE0_INT5 0x00000020 ///< Interrupt 5 active +#define NVIC_ACTIVE0_INT4 0x00000010 ///< Interrupt 4 active +#define NVIC_ACTIVE0_INT3 0x00000008 ///< Interrupt 3 active +#define NVIC_ACTIVE0_INT2 0x00000004 ///< Interrupt 2 active +#define NVIC_ACTIVE0_INT1 0x00000002 ///< Interrupt 1 active +#define NVIC_ACTIVE0_INT0 0x00000001 ///< Interrupt 0 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE1 register. + */ +/*\{*/ +#define NVIC_ACTIVE1_INT59 0x08000000 ///< Interrupt 59 active +#define NVIC_ACTIVE1_INT58 0x04000000 ///< Interrupt 58 active +#define NVIC_ACTIVE1_INT57 0x02000000 ///< Interrupt 57 active +#define NVIC_ACTIVE1_INT56 0x01000000 ///< Interrupt 56 active +#define NVIC_ACTIVE1_INT55 0x00800000 ///< Interrupt 55 active +#define NVIC_ACTIVE1_INT54 0x00400000 ///< Interrupt 54 active +#define NVIC_ACTIVE1_INT53 0x00200000 ///< Interrupt 53 active +#define NVIC_ACTIVE1_INT52 0x00100000 ///< Interrupt 52 active +#define NVIC_ACTIVE1_INT51 0x00080000 ///< Interrupt 51 active +#define NVIC_ACTIVE1_INT50 0x00040000 ///< Interrupt 50 active +#define NVIC_ACTIVE1_INT49 0x00020000 ///< Interrupt 49 active +#define NVIC_ACTIVE1_INT48 0x00010000 ///< Interrupt 48 active +#define NVIC_ACTIVE1_INT47 0x00008000 ///< Interrupt 47 active +#define NVIC_ACTIVE1_INT46 0x00004000 ///< Interrupt 46 active +#define NVIC_ACTIVE1_INT45 0x00002000 ///< Interrupt 45 active +#define NVIC_ACTIVE1_INT44 0x00001000 ///< Interrupt 44 active +#define NVIC_ACTIVE1_INT43 0x00000800 ///< Interrupt 43 active +#define NVIC_ACTIVE1_INT42 0x00000400 ///< Interrupt 42 active +#define NVIC_ACTIVE1_INT41 0x00000200 ///< Interrupt 41 active +#define NVIC_ACTIVE1_INT40 0x00000100 ///< Interrupt 40 active +#define NVIC_ACTIVE1_INT39 0x00000080 ///< Interrupt 39 active +#define NVIC_ACTIVE1_INT38 0x00000040 ///< Interrupt 38 active +#define NVIC_ACTIVE1_INT37 0x00000020 ///< Interrupt 37 active +#define NVIC_ACTIVE1_INT36 0x00000010 ///< Interrupt 36 active +#define NVIC_ACTIVE1_INT35 0x00000008 ///< Interrupt 35 active +#define NVIC_ACTIVE1_INT34 0x00000004 ///< Interrupt 34 active +#define NVIC_ACTIVE1_INT33 0x00000002 ///< Interrupt 33 active +#define NVIC_ACTIVE1_INT32 0x00000001 ///< Interrupt 32 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI0 register. + */ +/*\{*/ +#define NVIC_PRI0_INT3_M 0xFF000000 ///< Interrupt 3 priority mask +#define NVIC_PRI0_INT2_M 0x00FF0000 ///< Interrupt 2 priority mask +#define NVIC_PRI0_INT1_M 0x0000FF00 ///< Interrupt 1 priority mask +#define NVIC_PRI0_INT0_M 0x000000FF ///< Interrupt 0 priority mask +#define NVIC_PRI0_INT3_S 24 +#define NVIC_PRI0_INT2_S 16 +#define NVIC_PRI0_INT1_S 8 +#define NVIC_PRI0_INT0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI1 register. + */ +/*\{*/ +#define NVIC_PRI1_INT7_M 0xFF000000 ///< Interrupt 7 priority mask +#define NVIC_PRI1_INT6_M 0x00FF0000 ///< Interrupt 6 priority mask +#define NVIC_PRI1_INT5_M 0x0000FF00 ///< Interrupt 5 priority mask +#define NVIC_PRI1_INT4_M 0x000000FF ///< Interrupt 4 priority mask +#define NVIC_PRI1_INT7_S 24 +#define NVIC_PRI1_INT6_S 16 +#define NVIC_PRI1_INT5_S 8 +#define NVIC_PRI1_INT4_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI2 register. + */ +/*\{*/ +#define NVIC_PRI2_INT11_M 0xFF000000 ///< Interrupt 11 priority mask +#define NVIC_PRI2_INT10_M 0x00FF0000 ///< Interrupt 10 priority mask +#define NVIC_PRI2_INT9_M 0x0000FF00 ///< Interrupt 9 priority mask +#define NVIC_PRI2_INT8_M 0x000000FF ///< Interrupt 8 priority mask +#define NVIC_PRI2_INT11_S 24 +#define NVIC_PRI2_INT10_S 16 +#define NVIC_PRI2_INT9_S 8 +#define NVIC_PRI2_INT8_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI3 register. + */ +/*\{*/ +#define NVIC_PRI3_INT15_M 0xFF000000 ///< Interrupt 15 priority mask +#define NVIC_PRI3_INT14_M 0x00FF0000 ///< Interrupt 14 priority mask +#define NVIC_PRI3_INT13_M 0x0000FF00 ///< Interrupt 13 priority mask +#define NVIC_PRI3_INT12_M 0x000000FF ///< Interrupt 12 priority mask +#define NVIC_PRI3_INT15_S 24 +#define NVIC_PRI3_INT14_S 16 +#define NVIC_PRI3_INT13_S 8 +#define NVIC_PRI3_INT12_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI4 register. + */ +/*\{*/ +#define NVIC_PRI4_INT19_M 0xFF000000 ///< Interrupt 19 priority mask +#define NVIC_PRI4_INT18_M 0x00FF0000 ///< Interrupt 18 priority mask +#define NVIC_PRI4_INT17_M 0x0000FF00 ///< Interrupt 17 priority mask +#define NVIC_PRI4_INT16_M 0x000000FF ///< Interrupt 16 priority mask +#define NVIC_PRI4_INT19_S 24 +#define NVIC_PRI4_INT18_S 16 +#define NVIC_PRI4_INT17_S 8 +#define NVIC_PRI4_INT16_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI5 register. + */ +/*\{*/ +#define NVIC_PRI5_INT23_M 0xFF000000 ///< Interrupt 23 priority mask +#define NVIC_PRI5_INT22_M 0x00FF0000 ///< Interrupt 22 priority mask +#define NVIC_PRI5_INT21_M 0x0000FF00 ///< Interrupt 21 priority mask +#define NVIC_PRI5_INT20_M 0x000000FF ///< Interrupt 20 priority mask +#define NVIC_PRI5_INT23_S 24 +#define NVIC_PRI5_INT22_S 16 +#define NVIC_PRI5_INT21_S 8 +#define NVIC_PRI5_INT20_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI6 register. + */ +/*\{*/ +#define NVIC_PRI6_INT27_M 0xFF000000 ///< Interrupt 27 priority mask +#define NVIC_PRI6_INT26_M 0x00FF0000 ///< Interrupt 26 priority mask +#define NVIC_PRI6_INT25_M 0x0000FF00 ///< Interrupt 25 priority mask +#define NVIC_PRI6_INT24_M 0x000000FF ///< Interrupt 24 priority mask +#define NVIC_PRI6_INT27_S 24 +#define NVIC_PRI6_INT26_S 16 +#define NVIC_PRI6_INT25_S 8 +#define NVIC_PRI6_INT24_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI7 register. + */ +/*\{*/ +#define NVIC_PRI7_INT31_M 0xFF000000 ///< Interrupt 31 priority mask +#define NVIC_PRI7_INT30_M 0x00FF0000 ///< Interrupt 30 priority mask +#define NVIC_PRI7_INT29_M 0x0000FF00 ///< Interrupt 29 priority mask +#define NVIC_PRI7_INT28_M 0x000000FF ///< Interrupt 28 priority mask +#define NVIC_PRI7_INT31_S 24 +#define NVIC_PRI7_INT30_S 16 +#define NVIC_PRI7_INT29_S 8 +#define NVIC_PRI7_INT28_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI8 register. + */ +/*\{*/ +#define NVIC_PRI8_INT35_M 0xFF000000 ///< Interrupt 35 priority mask +#define NVIC_PRI8_INT34_M 0x00FF0000 ///< Interrupt 34 priority mask +#define NVIC_PRI8_INT33_M 0x0000FF00 ///< Interrupt 33 priority mask +#define NVIC_PRI8_INT32_M 0x000000FF ///< Interrupt 32 priority mask +#define NVIC_PRI8_INT35_S 24 +#define NVIC_PRI8_INT34_S 16 +#define NVIC_PRI8_INT33_S 8 +#define NVIC_PRI8_INT32_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI9 register. + */ +/*\{*/ +#define NVIC_PRI9_INT39_M 0xFF000000 ///< Interrupt 39 priority mask +#define NVIC_PRI9_INT38_M 0x00FF0000 ///< Interrupt 38 priority mask +#define NVIC_PRI9_INT37_M 0x0000FF00 ///< Interrupt 37 priority mask +#define NVIC_PRI9_INT36_M 0x000000FF ///< Interrupt 36 priority mask +#define NVIC_PRI9_INT39_S 24 +#define NVIC_PRI9_INT38_S 16 +#define NVIC_PRI9_INT37_S 8 +#define NVIC_PRI9_INT36_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI10 register. + */ +/*\{*/ +#define NVIC_PRI10_INT43_M 0xFF000000 ///< Interrupt 43 priority mask +#define NVIC_PRI10_INT42_M 0x00FF0000 ///< Interrupt 42 priority mask +#define NVIC_PRI10_INT41_M 0x0000FF00 ///< Interrupt 41 priority mask +#define NVIC_PRI10_INT40_M 0x000000FF ///< Interrupt 40 priority mask +#define NVIC_PRI10_INT43_S 24 +#define NVIC_PRI10_INT42_S 16 +#define NVIC_PRI10_INT41_S 8 +#define NVIC_PRI10_INT40_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CPUID register. + */ +/*\{*/ +#define NVIC_CPUID_IMP_M 0xFF000000 ///< Implementer +#define NVIC_CPUID_VAR_M 0x00F00000 ///< Variant +#define NVIC_CPUID_PARTNO_M 0x0000FFF0 ///< Processor part number +#define NVIC_CPUID_REV_M 0x0000000F ///< Revision +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_CTRL register. + */ +/*\{*/ +#define NVIC_INT_CTRL_NMI_SET 0x80000000 ///< Pend a NMI +#define NVIC_INT_CTRL_PEND_SV 0x10000000 ///< Pend a PendSV +#define NVIC_INT_CTRL_UNPEND_SV 0x08000000 ///< Unpend a PendSV +#define NVIC_INT_CTRL_PENDSTSET 0x04000000 ///< Set pending SysTick interrupt +#define NVIC_INT_CTRL_PENDSTCLR 0x02000000 ///< Clear pending SysTick interrupt +#define NVIC_INT_CTRL_ISR_PRE 0x00800000 ///< Debug interrupt handling +#define NVIC_INT_CTRL_ISR_PEND 0x00400000 ///< Debug interrupt pending +#define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000 ///< Highest pending exception +#define NVIC_INT_CTRL_RET_BASE 0x00000800 ///< Return to base +#define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF ///< Current active exception +#define NVIC_INT_CTRL_VEC_PEN_S 12 +#define NVIC_INT_CTRL_VEC_ACT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_VTABLE register. + */ +/*\{*/ +#define NVIC_VTABLE_BASE 0x20000000 ///< Vector table base +#define NVIC_VTABLE_OFFSET_M 0x1FFFFF00 ///< Vector table offset +#define NVIC_VTABLE_OFFSET_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_APINT register. + */ +/*\{*/ +#define NVIC_APINT_VECTKEY_M 0xFFFF0000 ///< Vector key mask +#define NVIC_APINT_VECTKEY 0x05FA0000 ///< Vector key +#define NVIC_APINT_ENDIANESS 0x00008000 ///< Data endianess +#define NVIC_APINT_PRIGROUP_M 0x00000700 ///< Priority group +#define NVIC_APINT_PRIGROUP_0_8 0x00000700 ///< Priority group 0.8 split +#define NVIC_APINT_PRIGROUP_1_7 0x00000600 ///< Priority group 1.7 split +#define NVIC_APINT_PRIGROUP_2_6 0x00000500 ///< Priority group 2.6 split +#define NVIC_APINT_PRIGROUP_3_5 0x00000400 ///< Priority group 3.5 split +#define NVIC_APINT_PRIGROUP_4_4 0x00000300 ///< Priority group 4.4 split +#define NVIC_APINT_PRIGROUP_5_3 0x00000200 ///< Priority group 5.3 split +#define NVIC_APINT_PRIGROUP_6_2 0x00000100 ///< Priority group 6.2 split +#define NVIC_APINT_SYSRESETREQ 0x00000004 ///< System reset request +#define NVIC_APINT_VECT_CLR_ACT 0x00000002 ///< Clear active NMI/fault info +#define NVIC_APINT_VECT_RESET 0x00000001 ///< System reset +#define NVIC_APINT_PRIGROUP_7_1 0x00000000 ///< Priority group 7.1 split +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_CTRL register. + */ +/*\{*/ +#define NVIC_SYS_CTRL_SEVONPEND 0x00000010 ///< Wakeup on pend +#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004 ///< Deep sleep enable +#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002 ///< Sleep on ISR exit +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CFG_CTRL register. + */ +/*\{*/ +#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100 ///< Ignore bus fault in NMI/fault +#define NVIC_CFG_CTRL_DIV0 0x00000010 ///< Trap on divide by 0 +#define NVIC_CFG_CTRL_UNALIGNED 0x00000008 ///< Trap on unaligned access +#define NVIC_CFG_CTRL_DEEP_PEND 0x00000004 ///< Allow deep interrupt trigger +#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002 ///< Allow main interrupt trigger +#define NVIC_CFG_CTRL_BASE_THR 0x00000001 ///< Thread state control +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI1 register. + */ +/*\{*/ +#define NVIC_SYS_PRI1_RES_M 0xFF000000 ///< Priority of reserved handler +#define NVIC_SYS_PRI1_USAGE_M 0x00FF0000 ///< Priority of usage fault handler +#define NVIC_SYS_PRI1_BUS_M 0x0000FF00 ///< Priority of bus fault handler +#define NVIC_SYS_PRI1_MEM_M 0x000000FF ///< Priority of mem manage handler +#define NVIC_SYS_PRI1_USAGE_S 16 +#define NVIC_SYS_PRI1_BUS_S 8 +#define NVIC_SYS_PRI1_MEM_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI2 register. + */ +/*\{*/ +#define NVIC_SYS_PRI2_SVC_M 0xFF000000 ///< Priority of SVCall handler +#define NVIC_SYS_PRI2_RES_M 0x00FFFFFF ///< Priority of reserved handlers +#define NVIC_SYS_PRI2_SVC_S 24 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI3 register. + */ +/*\{*/ +#define NVIC_SYS_PRI3_TICK_M 0xFF000000 ///< Priority of Sys Tick handler +#define NVIC_SYS_PRI3_PENDSV_M 0x00FF0000 ///< Priority of PendSV handler +#define NVIC_SYS_PRI3_RES_M 0x0000FF00 ///< Priority of reserved handler +#define NVIC_SYS_PRI3_DEBUG_M 0x000000FF ///< Priority of debug handler +#define NVIC_SYS_PRI3_TICK_S 24 +#define NVIC_SYS_PRI3_PENDSV_S 16 +#define NVIC_SYS_PRI3_DEBUG_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_HND_CTRL + * register. + */ +/*\{*/ +#define NVIC_SYS_HND_CTRL_USAGE 0x00040000 ///< Usage fault enable +#define NVIC_SYS_HND_CTRL_BUS 0x00020000 ///< Bus fault enable +#define NVIC_SYS_HND_CTRL_MEM 0x00010000 ///< Mem manage fault enable +#define NVIC_SYS_HND_CTRL_SVC 0x00008000 ///< SVCall is pended +#define NVIC_SYS_HND_CTRL_BUSP 0x00004000 ///< Bus fault is pended +#define NVIC_SYS_HND_CTRL_TICK 0x00000800 ///< Sys tick is active +#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400 ///< PendSV is active +#define NVIC_SYS_HND_CTRL_MON 0x00000100 ///< Monitor is active +#define NVIC_SYS_HND_CTRL_SVCA 0x00000080 ///< SVCall is active +#define NVIC_SYS_HND_CTRL_USGA 0x00000008 ///< Usage fault is active +#define NVIC_SYS_HND_CTRL_BUSA 0x00000002 ///< Bus fault is active +#define NVIC_SYS_HND_CTRL_MEMA 0x00000001 ///< Mem manage is active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_STAT + * register. + */ +/*\{*/ +#define NVIC_FAULT_STAT_DIV0 0x02000000 ///< Divide by zero fault +#define NVIC_FAULT_STAT_UNALIGN 0x01000000 ///< Unaligned access fault +#define NVIC_FAULT_STAT_NOCP 0x00080000 ///< No coprocessor fault +#define NVIC_FAULT_STAT_INVPC 0x00040000 ///< Invalid PC fault +#define NVIC_FAULT_STAT_INVSTAT 0x00020000 ///< Invalid state fault +#define NVIC_FAULT_STAT_UNDEF 0x00010000 ///< Undefined instruction fault +#define NVIC_FAULT_STAT_BFARV 0x00008000 ///< BFAR is valid +#define NVIC_FAULT_STAT_BSTKE 0x00001000 ///< Stack bus fault +#define NVIC_FAULT_STAT_BUSTKE 0x00000800 ///< Unstack bus fault +#define NVIC_FAULT_STAT_IMPRE 0x00000400 ///< Imprecise data bus error +#define NVIC_FAULT_STAT_PRECISE 0x00000200 ///< Precise data bus error +#define NVIC_FAULT_STAT_IBUS 0x00000100 ///< Instruction bus fault +#define NVIC_FAULT_STAT_MMARV 0x00000080 ///< MMAR is valid +#define NVIC_FAULT_STAT_MSTKE 0x00000010 ///< Stack access violation +#define NVIC_FAULT_STAT_MUSTKE 0x00000008 ///< Unstack access violation +#define NVIC_FAULT_STAT_DERR 0x00000002 ///< Data access violation +#define NVIC_FAULT_STAT_IERR 0x00000001 ///< Instruction access violation +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_HFAULT_STAT + * register. + */ +/*\{*/ +#define NVIC_HFAULT_STAT_DBG 0x80000000 ///< Debug event +#define NVIC_HFAULT_STAT_FORCED 0x40000000 ///< Cannot execute fault handler +#define NVIC_HFAULT_STAT_VECT 0x00000002 ///< Vector table read fault +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DEBUG_STAT + * register. + */ +/*\{*/ +#define NVIC_DEBUG_STAT_EXTRNL 0x00000010 ///< EDBGRQ asserted +#define NVIC_DEBUG_STAT_VCATCH 0x00000008 ///< Vector catch +#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004 ///< DWT match +#define NVIC_DEBUG_STAT_BKPT 0x00000002 ///< Breakpoint instruction +#define NVIC_DEBUG_STAT_HALTED 0x00000001 ///< Halt request +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MM_ADDR register. + */ +/*\{*/ +#define NVIC_MM_ADDR_M 0xFFFFFFFF ///< Data fault address +#define NVIC_MM_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_ADDR + * register. + */ +/*\{*/ +#define NVIC_FAULT_ADDR_M 0xFFFFFFFF ///< Data bus fault address +#define NVIC_FAULT_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_TYPE register. + */ +/*\{*/ +#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000 ///< Number of I regions +#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00 ///< Number of D regions +#define NVIC_MPU_TYPE_SEPARATE 0x00000001 ///< Separate or unified MPU +#define NVIC_MPU_TYPE_IREGION_S 16 +#define NVIC_MPU_TYPE_DREGION_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_CTRL register. + */ +/*\{*/ +#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004 ///< MPU default region in priv mode +#define NVIC_MPU_CTRL_HFNMIENA 0x00000002 ///< MPU enabled during faults +#define NVIC_MPU_CTRL_ENABLE 0x00000001 ///< MPU enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_NUMBER + * register. + */ +/*\{*/ +#define NVIC_MPU_NUMBER_M 0x000000FF ///< MPU region to access +#define NVIC_MPU_NUMBER_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_BASE register. + */ +/*\{*/ +#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0 ///< Base address mask +#define NVIC_MPU_BASE_VALID 0x00000010 ///< Region number valid +#define NVIC_MPU_BASE_REGION_M 0x0000000F ///< Region number +#define NVIC_MPU_BASE_ADDR_S 8 +#define NVIC_MPU_BASE_REGION_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_ATTR register. + */ +/*\{*/ +#define NVIC_MPU_ATTR_M 0xFFFF0000 ///< Attributes +#define NVIC_MPU_ATTR_AP_NO_NO 0x00000000 ///< prv: no access, usr: no access +#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000 ///< Bufferable +#define NVIC_MPU_ATTR_CACHEABLE 0x00020000 ///< Cacheable +#define NVIC_MPU_ATTR_SHAREABLE 0x00040000 ///< Shareable +#define NVIC_MPU_ATTR_TEX_M 0x00380000 ///< Type extension mask +#define NVIC_MPU_ATTR_AP_RW_NO 0x01000000 ///< prv: rw, usr: none +#define NVIC_MPU_ATTR_AP_RW_RO 0x02000000 ///< prv: rw, usr: read-only +#define NVIC_MPU_ATTR_AP_RW_RW 0x03000000 ///< prv: rw, usr: rw +#define NVIC_MPU_ATTR_AP_RO_NO 0x05000000 ///< prv: ro, usr: none +#define NVIC_MPU_ATTR_AP_RO_RO 0x06000000 ///< prv: ro, usr: ro +#define NVIC_MPU_ATTR_AP_M 0x07000000 ///< Access permissions mask +#define NVIC_MPU_ATTR_XN 0x10000000 ///< Execute disable +#define NVIC_MPU_ATTR_SRD_M 0x0000FF00 ///< Sub-region disable mask +#define NVIC_MPU_ATTR_SRD_0 0x00000100 ///< Sub-region 0 disable +#define NVIC_MPU_ATTR_SRD_1 0x00000200 ///< Sub-region 1 disable +#define NVIC_MPU_ATTR_SRD_2 0x00000400 ///< Sub-region 2 disable +#define NVIC_MPU_ATTR_SRD_3 0x00000800 ///< Sub-region 3 disable +#define NVIC_MPU_ATTR_SRD_4 0x00001000 ///< Sub-region 4 disable +#define NVIC_MPU_ATTR_SRD_5 0x00002000 ///< Sub-region 5 disable +#define NVIC_MPU_ATTR_SRD_6 0x00004000 ///< Sub-region 6 disable +#define NVIC_MPU_ATTR_SRD_7 0x00008000 ///< Sub-region 7 disable +#define NVIC_MPU_ATTR_SIZE_M 0x0000003E ///< Region size mask +#define NVIC_MPU_ATTR_SIZE_32B 0x00000008 ///< Region size 32 bytes +#define NVIC_MPU_ATTR_SIZE_64B 0x0000000A ///< Region size 64 bytes +#define NVIC_MPU_ATTR_SIZE_128B 0x0000000C ///< Region size 128 bytes +#define NVIC_MPU_ATTR_SIZE_256B 0x0000000E ///< Region size 256 bytes +#define NVIC_MPU_ATTR_SIZE_512B 0x00000010 ///< Region size 512 bytes +#define NVIC_MPU_ATTR_SIZE_1K 0x00000012 ///< Region size 1 Kbytes +#define NVIC_MPU_ATTR_SIZE_2K 0x00000014 ///< Region size 2 Kbytes +#define NVIC_MPU_ATTR_SIZE_4K 0x00000016 ///< Region size 4 Kbytes +#define NVIC_MPU_ATTR_SIZE_8K 0x00000018 ///< Region size 8 Kbytes +#define NVIC_MPU_ATTR_SIZE_16K 0x0000001A ///< Region size 16 Kbytes +#define NVIC_MPU_ATTR_SIZE_32K 0x0000001C ///< Region size 32 Kbytes +#define NVIC_MPU_ATTR_SIZE_64K 0x0000001E ///< Region size 64 Kbytes +#define NVIC_MPU_ATTR_SIZE_128K 0x00000020 ///< Region size 128 Kbytes +#define NVIC_MPU_ATTR_SIZE_256K 0x00000022 ///< Region size 256 Kbytes +#define NVIC_MPU_ATTR_SIZE_512K 0x00000024 ///< Region size 512 Kbytes +#define NVIC_MPU_ATTR_SIZE_1M 0x00000026 ///< Region size 1 Mbytes +#define NVIC_MPU_ATTR_SIZE_2M 0x00000028 ///< Region size 2 Mbytes +#define NVIC_MPU_ATTR_SIZE_4M 0x0000002A ///< Region size 4 Mbytes +#define NVIC_MPU_ATTR_SIZE_8M 0x0000002C ///< Region size 8 Mbytes +#define NVIC_MPU_ATTR_SIZE_16M 0x0000002E ///< Region size 16 Mbytes +#define NVIC_MPU_ATTR_SIZE_32M 0x00000030 ///< Region size 32 Mbytes +#define NVIC_MPU_ATTR_SIZE_64M 0x00000032 ///< Region size 64 Mbytes +#define NVIC_MPU_ATTR_SIZE_128M 0x00000034 ///< Region size 128 Mbytes +#define NVIC_MPU_ATTR_SIZE_256M 0x00000036 ///< Region size 256 Mbytes +#define NVIC_MPU_ATTR_SIZE_512M 0x00000038 ///< Region size 512 Mbytes +#define NVIC_MPU_ATTR_SIZE_1G 0x0000003A ///< Region size 1 Gbytes +#define NVIC_MPU_ATTR_SIZE_2G 0x0000003C ///< Region size 2 Gbytes +#define NVIC_MPU_ATTR_SIZE_4G 0x0000003E ///< Region size 4 Gbytes +#define NVIC_MPU_ATTR_ENABLE 0x00000001 ///< Region enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_CTRL register. + */ +/*\{*/ +#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000 ///< Debug key mask +#define NVIC_DBG_CTRL_DBGKEY 0xA05F0000 ///< Debug key +#define NVIC_DBG_CTRL_S_RESET_ST \ + 0x02000000 ///< Core has reset since last read +#define NVIC_DBG_CTRL_S_RETIRE_ST \ + 0x01000000 ///< Core has executed insruction + ///< since last read +#define NVIC_DBG_CTRL_S_LOCKUP 0x00080000 ///< Core is locked up +#define NVIC_DBG_CTRL_S_SLEEP 0x00040000 ///< Core is sleeping +#define NVIC_DBG_CTRL_S_HALT 0x00020000 ///< Core status on halt +#define NVIC_DBG_CTRL_S_REGRDY 0x00010000 ///< Register read/write available +#define NVIC_DBG_CTRL_C_SNAPSTALL \ + 0x00000020 ///< Breaks a stalled load/store +#define NVIC_DBG_CTRL_C_MASKINT 0x00000008 ///< Mask interrupts when stepping +#define NVIC_DBG_CTRL_C_STEP 0x00000004 ///< Step the core +#define NVIC_DBG_CTRL_C_HALT 0x00000002 ///< Halt the core +#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001 ///< Enable debug +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_XFER register. + */ +/*\{*/ +#define NVIC_DBG_XFER_REG_WNR 0x00010000 ///< Write or not read +#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F ///< Register +#define NVIC_DBG_XFER_REG_CFBP 0x00000014 ///< Control/Fault/BasePri/PriMask +#define NVIC_DBG_XFER_REG_DSP 0x00000013 ///< Deep SP +#define NVIC_DBG_XFER_REG_PSP 0x00000012 ///< Process SP +#define NVIC_DBG_XFER_REG_MSP 0x00000011 ///< Main SP +#define NVIC_DBG_XFER_REG_FLAGS 0x00000010 ///< xPSR/Flags register +#define NVIC_DBG_XFER_REG_R15 0x0000000F ///< Register R15 +#define NVIC_DBG_XFER_REG_R14 0x0000000E ///< Register R14 +#define NVIC_DBG_XFER_REG_R13 0x0000000D ///< Register R13 +#define NVIC_DBG_XFER_REG_R12 0x0000000C ///< Register R12 +#define NVIC_DBG_XFER_REG_R11 0x0000000B ///< Register R11 +#define NVIC_DBG_XFER_REG_R10 0x0000000A ///< Register R10 +#define NVIC_DBG_XFER_REG_R9 0x00000009 ///< Register R9 +#define NVIC_DBG_XFER_REG_R8 0x00000008 ///< Register R8 +#define NVIC_DBG_XFER_REG_R7 0x00000007 ///< Register R7 +#define NVIC_DBG_XFER_REG_R6 0x00000006 ///< Register R6 +#define NVIC_DBG_XFER_REG_R5 0x00000005 ///< Register R5 +#define NVIC_DBG_XFER_REG_R4 0x00000004 ///< Register R4 +#define NVIC_DBG_XFER_REG_R3 0x00000003 ///< Register R3 +#define NVIC_DBG_XFER_REG_R2 0x00000002 ///< Register R2 +#define NVIC_DBG_XFER_REG_R1 0x00000001 ///< Register R1 +#define NVIC_DBG_XFER_REG_R0 0x00000000 ///< Register R0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_DATA register. + */ +/*\{*/ +#define NVIC_DBG_DATA_M 0xFFFFFFFF ///< Data temporary cache +#define NVIC_DBG_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_INT register. + */ +/*\{*/ +#define NVIC_DBG_INT_HARDERR 0x00000400 ///< Debug trap on hard fault +#define NVIC_DBG_INT_INTERR 0x00000200 ///< Debug trap on interrupt errors +#define NVIC_DBG_INT_BUSERR 0x00000100 ///< Debug trap on bus error +#define NVIC_DBG_INT_STATERR 0x00000080 ///< Debug trap on usage fault state +#define NVIC_DBG_INT_CHKERR 0x00000040 ///< Debug trap on usage fault check +#define NVIC_DBG_INT_NOCPERR 0x00000020 ///< Debug trap on coprocessor error +#define NVIC_DBG_INT_MMERR 0x00000010 ///< Debug trap on mem manage fault +#define NVIC_DBG_INT_RESET 0x00000008 ///< Core reset status +#define NVIC_DBG_INT_RSTPENDCLR 0x00000004 ///< Clear pending core reset +#define NVIC_DBG_INT_RSTPENDING 0x00000002 ///< Core reset is pending +#define NVIC_DBG_INT_RSTVCATCH 0x00000001 ///< Reset vector catch +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SW_TRIG register. + */ +/*\{*/ +#define NVIC_SW_TRIG_INTID_M 0x000003FF ///< Interrupt to trigger +#define NVIC_SW_TRIG_INTID_S 0 +/*\}*/ + +#endif /* SAM3_NVIC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_pdc.h b/bertos/cpu/cortex-m3/io/sam3_pdc.h new file mode 100644 index 0000000..cb261cf --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_pdc.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * SAM3X PDC register definitions. + */ + +#ifndef SAM3_PDC_H +#define SAM3_PDC_H + + +/** + * PDC controller offset + */ +#define PERIPH_RPR_OFF 0x100 ///< Receive Pointer Register. +#define PERIPH_RCR_OFF 0x104 ///< Receive Counter Register. +#define PERIPH_TPR_OFF 0x108 ///< Transmit Pointer Register. +#define PERIPH_TCR_OFF 0x10C ///< Transmit Counter Register. +#define PERIPH_RNPR_OFF 0x110 ///< Receive Next Pointer Register. +#define PERIPH_RNCR_OFF 0x114 ///< Receive Next Counter Register. +#define PERIPH_TNPR_OFF 0x118 ///< Transmit Next Pointer Register. +#define PERIPH_TNCR_OFF 0x11C ///< Transmit Next Counter Register. +#define PERIPH_PTCR_OFF 0x120 ///< Transfer Control Register. +#define PERIPH_PTSR_OFF 0x124 ///< Transfer Status Register. + + +#define PDC_PTCR_RXTEN 0 ///< Receiver Transfer Enable. +#define PDC_PTCR_RXTDIS 1 ///< Receiver Transfer Disable. +#define PDC_PTCR_TXTEN 8 ///< Transmitter Transfer Enable. +#define PDC_PTCR_TXTDIS 9 ///< Transmitter Transfer Disable. +#define PDC_PTSR_RXTEN 0 ///< Receiver Transfer Enable. +#define PDC_PTSR_TXTEN 8 ///< Transmitter Transfer Enable. + + +#endif /* SAM3_PDC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_pio.h b/bertos/cpu/cortex-m3/io/sam3_pio.h new file mode 100644 index 0000000..47bfd4a --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_pio.h @@ -0,0 +1,402 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * Atmel SAM3 Parallel input/output controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef SAM3_PIO_H +#define SAM3_PIO_H + +/** + * PIO registers base addresses. + */ +/*\{*/ +#define PIOA_BASE 0x400E0E00 +#define PIOB_BASE 0x400E1000 +#define PIOC_BASE 0x400E1200 + +#if CPU_CM3_SAM3X + #define PIOD_BASE 0x400E1400 + #define PIOE_BASE 0x400E1600 + #define PIOF_BASE 0x400E1800 +#endif +/*\}*/ + +/** PIO Register Offsets */ +/*\{*/ +#define PIO_PER_OFF 0x00000000 ///< PIO enable register offset. +#define PIO_PDR_OFF 0x00000004 ///< PIO disable register offset. +#define PIO_PSR_OFF 0x00000008 ///< PIO status register offset. +#define PIO_OER_OFF 0x00000010 ///< Output enable register offset. +#define PIO_ODR_OFF 0x00000014 ///< Output disable register offset. +#define PIO_OSR_OFF 0x00000018 ///< Output status register offset. +#define PIO_IFER_OFF 0x00000020 ///< Input filter enable register offset. +#define PIO_IFDR_OFF 0x00000024 ///< Input filter disable register offset. +#define PIO_IFSR_OFF 0x00000028 ///< Input filter status register offset. +#define PIO_SODR_OFF 0x00000030 ///< Set output data register offset. +#define PIO_CODR_OFF 0x00000034 ///< Clear output data register offset. +#define PIO_ODSR_OFF 0x00000038 ///< Output data status register offset. +#define PIO_PDSR_OFF 0x0000003C ///< Pin data status register offset. +#define PIO_IER_OFF 0x00000040 ///< Interrupt enable register offset. +#define PIO_IDR_OFF 0x00000044 ///< Interrupt disable register offset. +#define PIO_IMR_OFF 0x00000048 ///< Interrupt mask register offset. +#define PIO_ISR_OFF 0x0000004C ///< Interrupt status register offset. +#define PIO_MDER_OFF 0x00000050 ///< Multi-driver enable register offset. +#define PIO_MDDR_OFF 0x00000054 ///< Multi-driver disable register offset. +#define PIO_MDSR_OFF 0x00000058 ///< Multi-driver status register offset. +#define PIO_PUDR_OFF 0x00000060 ///< Pull-up disable register offset. +#define PIO_PUER_OFF 0x00000064 ///< Pull-up enable register offset. +#define PIO_PUSR_OFF 0x00000068 ///< Pull-up status register offset. +#if CPU_CM3_SAM3X || CPU_CM3_SAM3U + #define PIO_ABSR_OFF 0x00000070 ///< PIO peripheral select register offset. +#elif CPU_CM3_SAM3N || CPU_CM3_SAM3S + #define PIO_ABCDSR1_OFF 0x00000070 ///< PIO peripheral select register 1 offset. + #define PIO_ABCDSR2_OFF 0x00000074 ///< PIO peripheral select register 2 offset. +#else + #error Undefined PIO peripheral select register for selected cpu +#endif +#define PIO_OWER_OFF 0x000000A0 ///< PIO output write enable register offset. +#define PIO_OWDR_OFF 0x000000A4 ///< PIO output write disable register offset. +#define PIO_OWSR_OFF 0x000000A8 ///< PIO output write status register offset. +/*\}*/ + + +#if defined(PIOA_BASE) + /** PIO A Register Addresses */ + /*\{*/ + #define PIOA_ACCESS(offset) (*((reg32_t *)(PIOA_BASE + (offset)))) + + #define PIOA_PER PIOA_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOA_PDR PIOA_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOA_PSR PIOA_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOA_OER PIOA_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOA_ODR PIOA_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOA_OSR PIOA_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOA_IFER PIOA_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOA_IFDR PIOA_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOA_IFSR PIOA_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOA_SODR PIOA_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOA_CODR PIOA_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOA_ODSR PIOA_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOA_PDSR PIOA_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOA_IER PIOA_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOA_IDR PIOA_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOA_IMR PIOA_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOA_ISR PIOA_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #define PIOA_MDER PIOA_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOA_MDDR PIOA_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOA_MDSR PIOA_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #define PIOA_PUDR PIOA_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOA_PUER PIOA_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOA_PUSR PIOA_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. +#ifdef PIO_ABSR_OFF + #define PIOA_ABSR PIOA_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral select register address. +#else + #define PIOA_ABCDSR1 PIOA_ACCESS(PIO_ABCDSR1_OFF) ///< PIO peripheral select register 1 address. + #define PIOA_ABCDSR2 PIOA_ACCESS(PIO_ABCDSR2_OFF) ///< PIO peripheral select register 2 address. +#endif + #define PIOA_OWER PIOA_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOA_OWDR PIOA_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOA_OWSR PIOA_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + /*\}*/ +#endif /* PIOA_BASE */ + +#if defined(PIOB_BASE) + /** PIO B Register Addresses */ + /*\{*/ + #define PIOB_ACCESS(offset) (*((reg32_t *)(PIOB_BASE + (offset)))) + + #define PIOB_PER PIOB_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOB_PDR PIOB_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOB_PSR PIOB_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOB_OER PIOB_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOB_ODR PIOB_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOB_OSR PIOB_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOB_IFER PIOB_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOB_IFDR PIOB_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOB_IFSR PIOB_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOB_SODR PIOB_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOB_CODR PIOB_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOB_ODSR PIOB_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOB_PDSR PIOB_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOB_IER PIOB_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOB_IDR PIOB_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOB_IMR PIOB_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOB_ISR PIOB_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #define PIOB_MDER PIOB_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOB_MDDR PIOB_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOB_MDSR PIOB_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #define PIOB_PUDR PIOB_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOB_PUER PIOB_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOB_PUSR PIOB_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. +#ifdef PIO_ABSR_OFF + #define PIOB_ABSR PIOB_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral select register address. +#else + #define PIOB_ABCDSR1 PIOB_ACCESS(PIO_ABCDSR1_OFF) ///< PIO peripheral select register 1 address. + #define PIOB_ABCDSR2 PIOB_ACCESS(PIO_ABCDSR2_OFF) ///< PIO peripheral select register 2 address. +#endif + #define PIOB_OWER PIOB_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOB_OWDR PIOB_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOB_OWSR PIOB_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + /*\}*/ +#endif /* PIOB_BASE */ + +#if defined(PIOC_BASE) + /** PIO C Register Addresses */ + /*\{*/ + #define PIOC_ACCESS(offset) (*((reg32_t *)(PIOC_BASE + (offset)))) + + #define PIOC_PER PIOC_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOC_PDR PIOC_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOC_PSR PIOC_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOC_OER PIOC_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOC_ODR PIOC_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOC_OSR PIOC_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOC_IFER PIOC_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOC_IFDR PIOC_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOC_IFSR PIOC_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOC_SODR PIOC_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOC_CODR PIOC_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOC_ODSR PIOC_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOC_PDSR PIOC_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOC_IER PIOC_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOC_IDR PIOC_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOC_IMR PIOC_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOC_ISR PIOC_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #define PIOC_MDER PIOC_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOC_MDDR PIOC_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOC_MDSR PIOC_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #define PIOC_PUDR PIOC_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOC_PUER PIOC_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOC_PUSR PIOC_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. +#ifdef PIO_ABSR_OFF + #define PIOC_ABSR PIOC_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral select register address. +#else + #define PIOC_ABCDSR1 PIOC_ACCESS(PIO_ABCDSR1_OFF) ///< PIO peripheral select register 1 address. + #define PIOC_ABCDSR2 PIOC_ACCESS(PIO_ABCDSR2_OFF) ///< PIO peripheral select register 2 address. +#endif + #define PIOC_OWER PIOC_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOC_OWDR PIOC_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOC_OWSR PIOC_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + /*\}*/ +#endif /* PIOC_BASE */ + +#if defined(PIOD_BASE) + /** PIO C Register Addresses */ + /*\{*/ + #define PIOD_ACCESS(offset) (*((reg32_t *)(PIOD_BASE + (offset)))) + + #define PIOD_PER PIOD_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOD_PDR PIOD_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOD_PSR PIOD_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOD_OER PIOD_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOD_ODR PIOD_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOD_OSR PIOD_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOD_IFER PIOD_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOD_IFDR PIOD_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOD_IFSR PIOD_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOD_SODR PIOD_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOD_CODR PIOD_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOD_ODSR PIOD_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOD_PDSR PIOD_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOD_IER PIOD_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOD_IDR PIOD_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOD_IMR PIOD_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOD_ISR PIOD_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #define PIOD_MDER PIOD_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOD_MDDR PIOD_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOD_MDSR PIOD_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #define PIOD_PUDR PIOD_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOD_PUER PIOD_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOD_PUSR PIOD_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. +#ifdef PIO_ABSR_OFF + #define PIOD_ABSR PIOD_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral select register address. +#else + #define PIOD_ABCDSR1 PIOD_ACCESS(PIO_ABCDSR1_OFF) ///< PIO peripheral select register 1 address. + #define PIOD_ABCDSR2 PIOD_ACCESS(PIO_ABCDSR2_OFF) ///< PIO peripheral select register 2 address. +#endif + #define PIOD_OWER PIOD_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOD_OWDR PIOD_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOD_OWSR PIOD_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + /*\}*/ +#endif /* PIOD_BASE */ + +#if defined(PIOE_BASE) + /** PIO C Register Addresses */ + /*\{*/ + #define PIOE_ACCESS(offset) (*((reg32_t *)(PIOE_BASE + (offset)))) + + #define PIOE_PER PIOE_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOE_PDR PIOE_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOE_PSR PIOE_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOE_OER PIOE_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOE_ODR PIOE_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOE_OSR PIOE_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOE_IFER PIOE_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOE_IFDR PIOE_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOE_IFSR PIOE_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOE_SODR PIOE_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOE_CODR PIOE_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOE_ODSR PIOE_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOE_PDSR PIOE_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOE_IER PIOE_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOE_IDR PIOE_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOE_IMR PIOE_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOE_ISR PIOE_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #define PIOE_MDER PIOE_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOE_MDDR PIOE_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOE_MDSR PIOE_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #define PIOE_PUDR PIOE_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOE_PUER PIOE_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOE_PUSR PIOE_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. +#ifdef PIO_ABSR_OFF + #define PIOE_ABSR PIOE_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral select register address. +#else + #define PIOE_ABCDSR1 PIOE_ACCESS(PIO_ABCDSR1_OFF) ///< PIO peripheral select register 1 address. + #define PIOE_ABCDSR2 PIOE_ACCESS(PIO_ABCDSR2_OFF) ///< PIO peripheral select register 2 address. +#endif + #define PIOE_OWER PIOE_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOE_OWDR PIOE_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOE_OWSR PIOE_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + /*\}*/ +#endif /* PIOE_BASE */ + +#if defined(PIOF_BASE) + /** PIO C Register Addresses */ + /*\{*/ + #define PIOF_ACCESS(offset) (*((reg32_t *)(PIOF_BASE + (offset)))) + + #define PIOF_PER PIOF_ACCESS(PIO_PER_OFF) ///< PIO enable register address. + #define PIOF_PDR PIOF_ACCESS(PIO_PDR_OFF) ///< PIO disable register address. + #define PIOF_PSR PIOF_ACCESS(PIO_PSR_OFF) ///< PIO status register address. + #define PIOF_OER PIOF_ACCESS(PIO_OER_OFF) ///< Output enable register address. + #define PIOF_ODR PIOF_ACCESS(PIO_ODR_OFF) ///< Output disable register address. + #define PIOF_OSR PIOF_ACCESS(PIO_OSR_OFF) ///< Output status register address. + #define PIOF_IFER PIOF_ACCESS(PIO_IFER_OFF) ///< Input filter enable register address. + #define PIOF_IFDR PIOF_ACCESS(PIO_IFDR_OFF) ///< Input filter disable register address. + #define PIOF_IFSR PIOF_ACCESS(PIO_IFSR_OFF) ///< Input filter status register address. + #define PIOF_SODR PIOF_ACCESS(PIO_SODR_OFF) ///< Set output data register address. + #define PIOF_CODR PIOF_ACCESS(PIO_CODR_OFF) ///< Clear output data register address. + #define PIOF_ODSR PIOF_ACCESS(PIO_ODSR_OFF) ///< Output data status register address. + #define PIOF_PDSR PIOF_ACCESS(PIO_PDSR_OFF) ///< Pin data status register address. + #define PIOF_IER PIOF_ACCESS(PIO_IER_OFF) ///< Interrupt enable register address. + #define PIOF_IDR PIOF_ACCESS(PIO_IDR_OFF) ///< Interrupt disable register address. + #define PIOF_IMR PIOF_ACCESS(PIO_IMR_OFF) ///< Interrupt mask register address. + #define PIOF_ISR PIOF_ACCESS(PIO_ISR_OFF) ///< Interrupt status register address. + #define PIOF_MDER PIOF_ACCESS(PIO_MDER_OFF) ///< Multi-driver enable register address. + #define PIOF_MDDR PIOF_ACCESS(PIO_MDDR_OFF) ///< Multi-driver disable register address. + #define PIOF_MDSR PIOF_ACCESS(PIO_MDSR_OFF) ///< Multi-driver status register address. + #define PIOF_PUDR PIOF_ACCESS(PIO_PUDR_OFF) ///< Pull-up disable register address. + #define PIOF_PUER PIOF_ACCESS(PIO_PUER_OFF) ///< Pull-up enable register address. + #define PIOF_PUSR PIOF_ACCESS(PIO_PUSR_OFF) ///< Pull-up status register address. +#ifdef PIO_ABSR_OFF + #define PIOF_ABSR PIOF_ACCESS(PIO_ABSR_OFF) ///< PIO peripheral select register address. +#else + #define PIOF_ABCDSR1 PIOF_ACCESS(PIO_ABCDSR1_OFF) ///< PIO peripheral select register 1 address. + #define PIOF_ABCDSR2 PIOF_ACCESS(PIO_ABCDSR2_OFF) ///< PIO peripheral select register 2 address. +#endif + #define PIOF_OWER PIOF_ACCESS(PIO_OWER_OFF) ///< PIO output write enable register address. + #define PIOF_OWDR PIOF_ACCESS(PIO_OWDR_OFF) ///< PIO output write disable register address. + #define PIOF_OWSR PIOF_ACCESS(PIO_OWSR_OFF) ///< PIO output write status register address. + /*\}*/ +#endif /* PIOF_BASE */ + + +#define PIO_PERIPH_A 0 +#define PIO_PERIPH_B 1 +#ifdef PIO_ABCDSR1_OFF + #define PIO_PERIPH_C 2 + #define PIO_PERIPH_D 3 +#endif + +/** + * Set peripheral on I/O ports. + * + * \param base PIO port base + * \param mask mask of I/O pin to manipulate + * \param function function to assign to selected pins (PIO_PERIPH_A, B, ...) + */ +#ifdef PIO_ABCDSR1_OFF + #define PIO_PERIPH_SEL(base, mask, function) do { \ + HWREG((base) + PIO_ABCDSR1_OFF) &= ~(mask); \ + HWREG((base) + PIO_ABCDSR2_OFF) &= ~(mask); \ + if ((function) & 1) \ + HWREG((base) + PIO_ABCDSR1_OFF) |= (mask); \ + if ((function) & 2) \ + HWREG((base) + PIO_ABCDSR2_OFF) |= (mask); \ + } while (0) +#else + #define PIO_PERIPH_SEL(base, mask, function) do { \ + HWREG((base) + PIO_ABSR_OFF) &= ~(mask); \ + if ((function) & 1) \ + HWREG((base) + PIO_ABSR_OFF) |= (mask); \ + } while (0) +#endif + + +#endif /* SAM3_PIO_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_pmc.h b/bertos/cpu/cortex-m3/io/sam3_pmc.h new file mode 100644 index 0000000..5bac08a --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_pmc.h @@ -0,0 +1,484 @@ +/** + * \file + * + * + * \brief SAM3 PMC hardware. + */ + +#ifndef SAM3_PMC_H +#define SAM3_PMC_H + +#include +#include + + +/** PMC registers base. */ +#if CPU_CM3_SAM3X + #define PMC_BASE 0x400E0600 +#else + #define PMC_BASE 0x400E0400 +#endif + +/** + * PMC register offsets. + */ +/*\{*/ +#define PMC_SCER_OFF 0x00 ///< System Clock Enable Register +#define PMC_SCDR_OFF 0x04 ///< System Clock Disable Register +#define PMC_SCSR_OFF 0x08 ///< System Clock Status Register +#define PMC_MOR_OFF 0x20 ///< Main Oscillator Register +#define PMC_MCFR_OFF 0x24 ///< Main Clock Frequency Register +#define PMC_MCKR_OFF 0x30 ///< Master Clock Register +#define PMC_IER_OFF 0x60 ///< Interrupt Enable Register +#define PMC_IDR_OFF 0x64 ///< Interrupt Disable Register +#define PMC_SR_OFF 0x68 ///< Status Register +#define PMC_IMR_OFF 0x6C ///< Interrupt Mask Register +#define PMC_FSMR_OFF 0x70 ///< Fast Startup Mode Register +#define PMC_FSPR_OFF 0x74 ///< Fast Startup Polarity Register +#define PMC_FOCR_OFF 0x78 ///< Fault Output Clear Register +#define PMC_WPMR_OFF 0xE4 ///< Write Protect Mode Register +#define PMC_WPSR_OFF 0xE8 ///< Write Protect Status Register + +#if CPU_CM3_SAM3N + #define PMC_PCER_OFF 0x10 ///< Peripheral Clock Enable Register + #define PMC_PCDR_OFF 0x14 ///< Peripheral Clock Disable Register + #define PMC_PCSR_OFF 0x18 ///< Peripheral Clock Status Register + #define PMC_PLLR_OFF 0x28 ///< PLL Register + #define PMC_PCK_OFF 0x40 ///< Programmable Clock 0 Register + #define PMC_OCR_OFF 0x110 ///< Oscillator Calibration Register +#elif CPU_CM3_SAM3X + #define PMC_PCER0_OFF 0x10 ///< Peripheral Clock Enable Register + #define PMC_PCDR0_OFF 0x14 ///< Peripheral Clock Disable Register + #define PMC_PCSR0_OFF 0x18 ///< Peripheral Clock Status Register + #define PMC_UCKR_OFF 0x1C ///< UTMI clock register + #define PMC_PLLAR_OFF 0x28 ///< PLL Register + #define PMC_USB_OFF 0x38 ///< USB clock register + #define PMC_PCK0_OFF 0x40 ///< Programmable Clock 0 Register + #define PMC_PCK1_OFF 0x44 ///< Programmable Clock 1 Register + #define PMC_PCK2_OFF 0x48 ///< Programmable Clock 2 Register + #define PMC_PCER1_OFF 0x100 ///< Peripheral Clock Enable Register + #define PMC_PCDR1_OFF 0x104 ///< Peripheral Clock Disable Register + #define PMC_PCSR1_OFF 0x108 ///< Peripheral Clock Status Register + #define PMC_PCR_OFF 0x10C ///< Oscillator Calibration Register + + #define PMC_PLLROFF PMC_PLLAR_OFF +#else + #warning Some PMC registers undefined for the selected CPU +#endif +/*\}*/ + + +/** + * Programmable clock ids. + * \{ + */ +#define PMC_PCK0_ID 8 +#define PMC_PCK1_ID 9 +#define PMC_PCK2_ID 10 +/*\}*/ + +/** + * Programmable clock status. + * \{ + */ +#define PMC_PCKRDY0 8 ///< Programmable clock 0 ready. +#define PMC_PCKRDY1 9 ///< Programmable clock 1 ready. +#define PMC_PCKRDY2 10 ///< Programmable clock 2 ready. +/*\}*/ + +/** + * PMC registers. + */ +/*\{*/ +#define PMC_SCER (*((reg32_t *)(PMC_BASE + PMC_SCER_OFF))) ///< System Clock Enable Register +#define PMC_SCDR (*((reg32_t *)(PMC_BASE + PMC_SCDR_OFF))) ///< System Clock Disable Register +#define PMC_SCSR (*((reg32_t *)(PMC_BASE + PMC_SCSR_OFF))) ///< System Clock Status Register +#define CKGR_MOR (*((reg32_t *)(PMC_BASE + PMC_MOR_OFF ))) ///< Main Oscillator Register +#define CKGR_MCFR (*((reg32_t *)(PMC_BASE + PMC_MCFR_OFF))) ///< Main Clock Frequency Register +#define PMC_MCKR (*((reg32_t *)(PMC_BASE + PMC_MCKR_OFF))) ///< Master Clock Register +#define PMC_IER (*((reg32_t *)(PMC_BASE + PMC_IER_OFF ))) ///< Interrupt Enable Register +#define PMC_IDR (*((reg32_t *)(PMC_BASE + PMC_IDR_OFF ))) ///< Interrupt Disable Register +#define PMC_SR (*((reg32_t *)(PMC_BASE + PMC_SR_OFF ))) ///< Status Register +#define PMC_IMR (*((reg32_t *)(PMC_BASE + PMC_IMR_OFF ))) ///< Interrupt Mask Register +#define PMC_FSMR (*((reg32_t *)(PMC_BASE + PMC_FSMR_OFF))) ///< Fast Startup Mode Register +#define PMC_FSPR (*((reg32_t *)(PMC_BASE + PMC_FSPR_OFF))) ///< Fast Startup Polarity Register +#define PMC_FOCR (*((reg32_t *)(PMC_BASE + PMC_FOCR_OFF))) ///< Fault Output Clear Register +#define PMC_WPMR (*((reg32_t *)(PMC_BASE + PMC_WPMR_OFF))) ///< Write Protect Mode Register +#define PMC_WPSR (*((reg32_t *)(PMC_BASE + PMC_WPSR_OFF))) ///< Write Protect Status Register + +#if CPU_CM3_SAM3N + #define PMC_PCER (*((reg32_t *)(PMC_BASE + PMC_PCER_OFF))) ///< Peripheral Clock Enable Register + #define PMC_PCDR (*((reg32_t *)(PMC_BASE + PMC_PCDR_OFF))) ///< Peripheral Clock Disable Register + #define PMC_PCSR (*((reg32_t *)(PMC_BASE + PMC_PCSR_OFF))) ///< Peripheral Clock Status Register + #define CKGR_PLLR (*((reg32_t *)(PMC_BASE + PMC_PLLR_OFF))) ///< PLL Register + #define PMC_PCK (*((reg32_t *)(PMC_BASE + PMC_PCK_OFF ))) ///< Programmable Clock 0 Register + #define PMC_OCR (*((reg32_t *)(PMC_BASE + PMC_OCR_OFF ))) ///< Oscillator Calibration Register +#elif CPU_CM3_SAM3X + #define PMC_PCER0 (*((reg32_t *)(PMC_BASE + PMC_PCER0_OFF))) ///< Peripheral Clock Enable Register + #define PMC_PCDR0 (*((reg32_t *)(PMC_BASE + PMC_PCDR0_OFF))) ///< Peripheral Clock Disable Register + #define PMC_PCSR0 (*((reg32_t *)(PMC_BASE + PMC_PCSR0_OFF))) ///< Peripheral Clock Status Register + #define PMC_UCKR (*((reg32_t *)(PMC_BASE + PMC_UCKR_OFF))) ///< UTMI clock register + #define CKGR_PLLAR (*((reg32_t *)(PMC_BASE + PMC_PLLAR_OFF))) ///< PLL Register + #define PMC_USB_O (*((reg32_t *)(PMC_BASE + PMC_USB_O_OFF))) ///< USB clock register + #define PMC_PCK0 (*((reg32_t *)(PMC_BASE + PMC_PCK0_OFF))) ///< Programmable Clock 0 Register + #define PMC_PCK1 (*((reg32_t *)(PMC_BASE + PMC_PCK1_OFF))) ///< Programmable Clock 1 Register + #define PMC_PCK2 (*((reg32_t *)(PMC_BASE + PMC_PCK2_OFF))) ///< Programmable Clock 2 Register + #define PMC_PCER1 (*((reg32_t *)(PMC_BASE + PMC_PCER1_OFF))) ///< Peripheral Clock Enable Register + #define PMC_PCDR1 (*((reg32_t *)(PMC_BASE + PMC_PCDR1_OFF))) ///< Peripheral Clock Disable Register + #define PMC_PCSR1 (*((reg32_t *)(PMC_BASE + PMC_PCSR1_OFF))) ///< Peripheral Clock Status Register + #define PMC_PCR (*((reg32_t *)(PMC_BASE + PMC_PCR_OFF))) ///< Oscillator Calibration Register + + #define CKGR_PLLR CKGR_PLLAR +#endif +/*\}*/ + +/** + * Enable a peripheral clock. + * + * \param id peripheral id of the peripheral whose clock is enabled + */ +#ifdef PMC_PCER1 + +INLINE void pmc_periphEnable(unsigned id) +{ + ASSERT(id < 64); + if (id < 32) + PMC_PCER0 = BV(id); + else + PMC_PCER1 = BV(id - 32); +} + +#else + +INLINE void pmc_periphEnable(unsigned id) +{ + ASSERT(id < 32); + PMC_PCER = BV(id); +} + +#endif + +/** + * Disable a peripheral clock. + * + * \param id peripheral id of the peripheral whose clock is enabled + */ +#ifdef PMC_PCER1 + +INLINE void pmc_periphDisable(unsigned id) +{ + ASSERT(id < 64); + if (id < 32) + PMC_PCDR0 = BV(id); + else + PMC_PCDR1 = BV(id - 32); +} + +#else + +INLINE void pmc_periphDisable(unsigned id) +{ + ASSERT(id < 32); + PMC_PCDR = BV(id); +} + +#endif + +/** + * Defines for bit fields in PMC_SCER register. + */ +/*\{*/ +#define PMC_SCER_PCK0 8 ///< Programmable Clock 0 Output Enable +#define PMC_SCER_PCK1 9 ///< Programmable Clock 1 Output Enable +#define PMC_SCER_PCK2 10 ///< Programmable Clock 2 Output Enable +/*\}*/ + +/** + * Defines for bit fields in PMC_SCDR register. + */ +/*\{*/ +#define PMC_SCDR_PCK0 8 ///< Programmable Clock 0 Output Disable +#define PMC_SCDR_PCK1 9 ///< Programmable Clock 1 Output Disable +#define PMC_SCDR_PCK2 10 ///< Programmable Clock 2 Output Disable +/*\}*/ + +/** + * Defines for bit fields in PMC_SCSR register. + */ +/*\{*/ +#define PMC_SCSR_PCK0 8 ///< Programmable Clock 0 Output Status +#define PMC_SCSR_PCK1 9 ///< Programmable Clock 1 Output Status +#define PMC_SCSR_PCK2 10 ///< Programmable Clock 2 Output Status +/*\}*/ + +/** + * Defines for bit fields in CKGR_MOR register. + */ +/*\{*/ +#define CKGR_MOR_MOSCXTEN 0 ///< Main Crystal Oscillator Enable +#define CKGR_MOR_MOSCXTBY 1 ///< Main Crystal Oscillator Bypass +#define CKGR_MOR_WAITMODE 2 ///< Wait Mode Command +#define CKGR_MOR_MOSCRCEN 3 ///< Main On-Chip RC Oscillator Enable +#define CKGR_MOR_MOSCRCF_SHIFT 4 +#define CKGR_MOR_MOSCRCF_MASK (0x7 << CKGR_MOR_MOSCRCF_SHIFT) ///< Main On-Chip RC Oscillator Frequency Selection +#define CKGR_MOR_MOSCRCF(value) ((CKGR_MOR_MOSCRCF_MASK & ((value) << CKGR_MOR_MOSCRCF_SHIFT))) +#define CKGR_MOR_MOSCRCF_4MHZ (0x0 << CKGR_MOR_MOSCRCF_SHIFT) +#define CKGR_MOR_MOSCRCF_8MHZ (0x1 << CKGR_MOR_MOSCRCF_SHIFT) +#define CKGR_MOR_MOSCRCF_12MHZ (0x2 << CKGR_MOR_MOSCRCF_SHIFT) +#define CKGR_MOR_MOSCXTST_SHIFT 8 +#define CKGR_MOR_MOSCXTST_MASK (0xff << CKGR_MOR_MOSCXTST_SHIFT) ///< Main Crystal Oscillator Start-up Time +#define CKGR_MOR_MOSCXTST(value) ((CKGR_MOR_MOSCXTST_MASK & ((value) << CKGR_MOR_MOSCXTST_SHIFT))) +#define CKGR_MOR_KEY_SHIFT 16 +#define CKGR_MOR_KEY_MASK (0xffu << CKGR_MOR_KEY_SHIFT) ///< Password +#define CKGR_MOR_KEY(value) ((CKGR_MOR_KEY_MASK & ((value) << CKGR_MOR_KEY_SHIFT))) +#define CKGR_MOR_MOSCSEL 24 ///< Main Oscillator Selection +#define CKGR_MOR_CFDEN 25 ///< Clock Failure Detector Enable +/*\}*/ + +/** + * Defines for bit fields in CKGR_MCFR register. + */ +/*\{*/ +#define CKGR_MCFR_MAINF_MASK 0xffff ///< Main Clock Frequency mask +#define CKGR_MCFR_MAINFRDY 16 ///< Main Clock Ready +/*\}*/ + +/** + * Defines for bit fields in CKGR_PLLR register. + */ +/*\{*/ +#define CKGR_PLLR_DIV_MASK 0xff ///< Divider mask +#define CKGR_PLLR_DIV(value) (CKGR_PLLR_DIV_MASK & (value)) +#define CKGR_PLLR_PLLCOUNT_SHIFT 8 +#define CKGR_PLLR_PLLCOUNT_MASK (0x3f << CKGR_PLLR_PLLCOUNT_SHIFT) ///< PLL Counter mask +#define CKGR_PLLR_PLLCOUNT(value) (CKGR_PLLR_PLLCOUNT_MASK & ((value) << CKGR_PLLR_PLLCOUNT_SHIFT)) +#define CKGR_PLLR_MUL_SHIFT 16 +#define CKGR_PLLR_MUL_MASK (0x7ff << CKGR_PLLR_MUL_SHIFT) ///< PLL Multiplier mask +#define CKGR_PLLR_MUL(value) (CKGR_PLLR_MUL_MASK & ((value) << CKGR_PLLR_MUL_SHIFT)) +#define CKGR_PLLR_STUCKTO1 29 +/*\}*/ + +/** + * Defines for bit fields in PMC_MCKR register. + */ +/*\{*/ +#define PMC_MCKR_CSS_MASK 0x3 ///< Master Clock Source Selection mask +#define PMC_MCKR_CSS_SLOW_CLK 0x0 ///< Slow Clock is selected +#define PMC_MCKR_CSS_MAIN_CLK 0x1 ///< Main Clock is selected +#define PMC_MCKR_CSS_PLL_CLK 0x2 ///< PLL Clock is selected +#define PMC_MCKR_PRES_SHIFT 4 +#define PMC_MCKR_PRES_MASK (0x7 << PMC_MCKR_PRES_SHIFT) ///< Processor Clock Prescaler mask +#define PMC_MCKR_PRES_CLK (0x0 << PMC_MCKR_PRES_SHIFT) ///< Selected clock +#define PMC_MCKR_PRES_CLK_2 (0x1 << PMC_MCKR_PRES_SHIFT) ///< Selected clock divided by 2 +#define PMC_MCKR_PRES_CLK_4 (0x2 << PMC_MCKR_PRES_SHIFT) ///< Selected clock divided by 4 +#define PMC_MCKR_PRES_CLK_8 (0x3 << PMC_MCKR_PRES_SHIFT) ///< Selected clock divided by 8 +#define PMC_MCKR_PRES_CLK_16 (0x4 << PMC_MCKR_PRES_SHIFT) ///< Selected clock divided by 16 +#define PMC_MCKR_PRES_CLK_32 (0x5 << PMC_MCKR_PRES_SHIFT) ///< Selected clock divided by 32 +#define PMC_MCKR_PRES_CLK_64 (0x6 << PMC_MCKR_PRES_SHIFT) ///< Selected clock divided by 64 +#define PMC_MCKR_PRES_CLK_3 (0x7 << PMC_MCKR_PRES_SHIFT) ///< Selected clock divided by 3 +#define PMC_MCKR_PLLDIV2 12 ///< PLL Divisor by 2 +/*\}*/ + +/** + * Defines for bit fields in PMC_PCK[3] register. + */ +/*\{*/ +#define PMC_PCK_CSS_MASK 0x7 ///< Master Clock Source Selection mask +#define PMC_PCK_CSS_SLOW 0x0 ///< Slow Clock is selected +#define PMC_PCK_CSS_MAIN 0x1 ///< Main Clock is selected +#define PMC_PCK_CSS_PLL 0x2 ///< PLL Clock is selected +#define PMC_PCK_CSS_MCK 0x4 ///< Master Clock is selected +#define PMC_PCK_PRES_SHIFT 4 +#define PMC_PCK_PRES_MASK (0x7 << PMC_PCK_PRES_SHIFT) ///< Programmable Clock Prescaler +#define PMC_PCK_PRES_CLK (0x0 << PMC_PCK_PRES_SHIFT) ///< Selected clock +#define PMC_PCK_PRES_CLK_2 (0x1 << PMC_PCK_PRES_SHIFT) ///< Selected clock divided by 2 +#define PMC_PCK_PRES_CLK_4 (0x2 << PMC_PCK_PRES_SHIFT) ///< Selected clock divided by 4 +#define PMC_PCK_PRES_CLK_8 (0x3 << PMC_PCK_PRES_SHIFT) ///< Selected clock divided by 8 +#define PMC_PCK_PRES_CLK_16 (0x4 << PMC_PCK_PRES_SHIFT) ///< Selected clock divided by 16 +#define PMC_PCK_PRES_CLK_32 (0x5 << PMC_PCK_PRES_SHIFT) ///< Selected clock divided by 32 +#define PMC_PCK_PRES_CLK_64 (0x6 << PMC_PCK_PRES_SHIFT) ///< Selected clock divided by 64 +/*\}*/ + +/** + * Defines for bit fields in PMC_IER register. + */ +/*\{*/ +#define PMC_IER_MOSCXTS 0 ///< Main Crystal Oscillator Status Interrupt Enable +#define PMC_IER_LOCK 1 ///< PLL Lock Interrupt Enable +#define PMC_IER_MCKRDY 3 ///< Master Clock Ready Interrupt Enable +#define PMC_IER_PCKRDY0 8 ///< Programmable Clock Ready 0 Interrupt Enable +#define PMC_IER_PCKRDY1 9 ///< Programmable Clock Ready 1 Interrupt Enable +#define PMC_IER_PCKRDY2 10 ///< Programmable Clock Ready 2 Interrupt Enable +#define PMC_IER_MOSCSELS 16 ///< Main Oscillator Selection Status Interrupt Enable +#define PMC_IER_MOSCRCS 17 ///< Main On-Chip RC Status Interrupt Enable +#define PMC_IER_CFDEV 18 ///< Clock Failure Detector Event Interrupt Enable +/*\}*/ + +/** + * Defines for bit fields in PMC_IDR register. + */ +/*\{*/ +#define PMC_IDR_MOSCXTS 0 ///< Main Crystal Oscillator Status Interrupt Disable +#define PMC_IDR_LOCK 1 ///< PLL Lock Interrupt Disable +#define PMC_IDR_MCKRDY 3 ///< Master Clock Ready Interrupt Disable +#define PMC_IDR_PCKRDY0 8 ///< Programmable Clock Ready 0 Interrupt Disable +#define PMC_IDR_PCKRDY1 9 ///< Programmable Clock Ready 1 Interrupt Disable +#define PMC_IDR_PCKRDY2 10 ///< Programmable Clock Ready 2 Interrupt Disable +#define PMC_IDR_MOSCSELS 16 ///< Main Oscillator Selection Status Interrupt Disable +#define PMC_IDR_MOSCRCS 17 ///< Main On-Chip RC Status Interrupt Disable +#define PMC_IDR_CFDEV 18 ///< Clock Failure Detector Event Interrupt Disable +/*\}*/ + +/** + * Defines for bit fields in PMC_SR register. + */ +/*\{*/ +#define PMC_SR_MOSCXTS 0 ///< Main XTAL Oscillator Status +#define PMC_SR_LOCK 1 ///< PLL Lock Status +#define PMC_SR_MCKRDY 3 ///< Master Clock Status +#define PMC_SR_OSCSELS 7 ///< Slow Clock Oscillator Selection +#define PMC_SR_PCKRDY0 8 ///< Programmable Clock Ready Status +#define PMC_SR_PCKRDY1 9 ///< Programmable Clock Ready Status +#define PMC_SR_PCKRDY2 10 ///< Programmable Clock Ready Status +#define PMC_SR_MOSCSELS 16 ///< Main Oscillator Selection Status +#define PMC_SR_MOSCRCS 17 ///< Main On-Chip RC Oscillator Status +#define PMC_SR_CFDEV 18 ///< Clock Failure Detector Event +#define PMC_SR_CFDS 19 ///< Clock Failure Detector Status +#define PMC_SR_FOS 20 ///< Clock Failure Detector Fault Output Status +/*\}*/ + +/** + * Defines for bit fields in PMC_IMR register. + */ +/*\{*/ +#define PMC_IMR_MOSCXTS 0 ///< Main Crystal Oscillator Status Interrupt Mask +#define PMC_IMR_LOCK 1 ///< PLL Lock Interrupt Mask +#define PMC_IMR_MCKRDY 3 ///< Master Clock Ready Interrupt Mask +#define PMC_IMR_PCKRDY0 8 ///< Programmable Clock Ready 0 Interrupt Mask +#define PMC_IMR_PCKRDY1 9 ///< Programmable Clock Ready 1 Interrupt Mask +#define PMC_IMR_PCKRDY2 10 ///< Programmable Clock Ready 2 Interrupt Mask +#define PMC_IMR_MOSCSELS 16 ///< Main Oscillator Selection Status Interrupt Mask +#define PMC_IMR_MOSCRCS 17 ///< Main On-Chip RC Status Interrupt Mask +#define PMC_IMR_CFDEV 18 ///< Clock Failure Detector Event Interrupt Mask +/*\}*/ + +/** + * Defines for bit fields in PMC_FSMR register. + */ +/*\{*/ +#define PMC_FSMR_FSTT0 0 ///< Fast Startup Input Enable 0 +#define PMC_FSMR_FSTT1 1 ///< Fast Startup Input Enable 1 +#define PMC_FSMR_FSTT2 2 ///< Fast Startup Input Enable 2 +#define PMC_FSMR_FSTT3 3 ///< Fast Startup Input Enable 3 +#define PMC_FSMR_FSTT4 4 ///< Fast Startup Input Enable 4 +#define PMC_FSMR_FSTT5 5 ///< Fast Startup Input Enable 5 +#define PMC_FSMR_FSTT6 6 ///< Fast Startup Input Enable 6 +#define PMC_FSMR_FSTT7 7 ///< Fast Startup Input Enable 7 +#define PMC_FSMR_FSTT8 8 ///< Fast Startup Input Enable 8 +#define PMC_FSMR_FSTT9 9 ///< Fast Startup Input Enable 9 +#define PMC_FSMR_FSTT10 10 ///< Fast Startup Input Enable 10 +#define PMC_FSMR_FSTT11 11 ///< Fast Startup Input Enable 11 +#define PMC_FSMR_FSTT12 12 ///< Fast Startup Input Enable 12 +#define PMC_FSMR_FSTT13 13 ///< Fast Startup Input Enable 13 +#define PMC_FSMR_FSTT14 14 ///< Fast Startup Input Enable 14 +#define PMC_FSMR_FSTT15 15 ///< Fast Startup Input Enable 15 +#define PMC_FSMR_RTTAL 16 ///< RTT Alarm Enable +#define PMC_FSMR_RTCAL 17 ///< RTC Alarm Enable +#define PMC_FSMR_LPM 20 ///< Low Power Mode +/*\}*/ + +/** + * Defines for bit fields in PMC_FSPR register. + */ +/*\{*/ +#define PMC_FSPR_FSTP0 0 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP1 1 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP2 2 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP3 3 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP4 4 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP5 5 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP6 6 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP7 7 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP8 8 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP9 9 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP10 10 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP11 11 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP12 12 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP13 13 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP14 14 ///< Fast Startup Input Polarityx +#define PMC_FSPR_FSTP15 15 ///< Fast Startup Input Polarityx +/*\}*/ + +/** + * Defines for bit fields in PMC_FOCR register. + */ +/*\{*/ +#define PMC_FOCR_FOCLR 0 ///< Fault Output Clear +/*\}*/ + +/** + * Defines for bit fields in PMC_WPMR register. + */ +/*\{*/ +#define PMC_WPMR_WPEN 0 ///< Write Protect Enable +#define PMC_WPMR_WPKEY_SHIFT 8 +#define PMC_WPMR_WPKEY_MASK (0xffffff << PMC_WPMR_WPKEY_SHIFT) ///< Write Protect key mask +#define PMC_WPMR_WPKEY(value) ((PMC_WPMR_WPKEY_MASK & ((value) << PMC_WPMR_WPKEY_SHIFT))) +/*\}*/ + +/** + * Defines for bit fields in PMC_WPSR register. + */ +/*\{*/ +#define PMC_WPSR_WPVS 0 ///< Write Protect Violation Status +#define PMC_WPSR_WPVSRC_SHIFT 8 +#define PMC_WPSR_WPVSRC_MASK (0xffff << PMC_WPSR_WPVSRC_SHIFT) ///< Write Protect Violation Source mask +/*\}*/ + +/** + * Defines for bit fields in PMC_OCR register. + */ +/*\{*/ +#define PMC_OCR_CAL4_MASK 0x7f ///< RC Oscillator Calibration bits for 4 MHz mask +#define PMC_OCR_CAL4(value) (PMC_OCR_CAL4_MASK & (value)) +#define PMC_OCR_SEL4 7 ///< Selection of RC Oscillator Calibration bits for 4 MHz +#define PMC_OCR_CAL8_SHIFT 8 +#define PMC_OCR_CAL8_MASK (0x7f << PMC_OCR_CAL8_SHIFT) ///< RC Oscillator Calibration bits for 8 MHz mask +#define PMC_OCR_CAL8(value) ((PMC_OCR_CAL8_MASK & ((value) << PMC_OCR_CAL8_SHIFT))) +#define PMC_OCR_SEL8 15 ///< Selection of RC Oscillator Calibration bits for 8 MHz +#define PMC_OCR_CAL12_SHIFT 16 +#define PMC_OCR_CAL12_MASK (0x7f << PMC_OCR_CAL12_SHIFT) ///< RC Oscillator Calibration bits for 12 MHz mask +#define PMC_OCR_CAL12(value) ((PMC_OCR_CAL12_MASK & ((value) << PMC_OCR_CAL12_SHIFT))) +#define PMC_OCR_SEL12 23 ///< Selection of RC Oscillator Calibration bits for 12 MHz +/*\}*/ + + +#endif /* SAM3_PMC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_rstc.h b/bertos/cpu/cortex-m3/io/sam3_rstc.h new file mode 100644 index 0000000..d5ac4bc --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_rstc.h @@ -0,0 +1,113 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * SAM3 reset controller. + * This file is based on NUT/OS implementation. See license below. + */ + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef SAM3_RTSC_H +#define SAM3_RTSC_H + +#define RSTC_BASE 0x400E1A00 + +/** Reset Controller Control Register */ +/*\{*/ +#define RSTC_CR (*((reg32_t *)(RSTC_BASE + 0x00))) ///< Reset controller control register address. +#define RSTC_PROCRST 0 ///< Processor reset. +#define RSTC_PERRST 2 ///< Peripheral reset. +#define RSTC_EXTRST 3 ///< External reset. +#define RSTC_KEY 0xA5000000 ///< Password. +/*\}*/ + +/** Reset Controller Status Register */ +/*\{*/ +#define RSTC_SR (*((reg32_t *)(RSTC_BASE + 0x04))) ///< Reset controller status register address. +#define RSTC_URSTS 0 ///< User reset status. +#define RSTC_BODSTS 1 ///< Brownout detection status. +#define RSTC_RSTTYP_MASK 0x00000700 ///< Reset type. +#define RSTC_RSTTYP_POWERUP 0x00000000 ///< Power-up reset. +//#define RSTC_RSTTYP_WAKEUP 0x00000100 ///< VDDCORE rising. +#define RSTC_RSTTYP_WATCHDOG 0x00000200 ///< Watchdog reset. +#define RSTC_RSTTYP_SOFTWARE 0x00000300 ///< Software reset. +#define RSTC_RSTTYP_USER 0x00000400 ///< User reset. +#define RSTC_RSTTYP_BROWNOUT 0x00000500 ///< Brownout reset. +#define RSTC_NRSTL 16 ///< NRST pin level. +#define RSTC_SRCMP 17 ///< Software reset command in progress. +/*\}*/ + +/** Reset Controller Mode Register */ +/*\{*/ +#define RSTC_MR (*((reg32_t *)(RSTC_BASE + 0x08))) ///< Reset controller mode register address. +#define RSTC_URSTEN 0 ///< User reset enable. +#define RSTC_URSTIEN 4 ///< User reset interrupt enable. +#define RSTC_ERSTL_MASK 0x00000F00 ///< External reset length. +#define RSTC_ERSTL_SHIFT 8 ///< Least significant bit of external reset length. +#define RSTC_BODIEN 16 ///< Brown-out detection interrupt enable. +/*\}*/ + + +#endif /* SAM3_RTSC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_sdramc.h b/bertos/cpu/cortex-m3/io/sam3_sdramc.h new file mode 100644 index 0000000..81fca69 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_sdramc.h @@ -0,0 +1,160 @@ +/** + * \file + * + * + * \brief SAM3 SDRAM controller definitions. + */ + +#ifndef SAM3_SDRAMC_H +#define SAM3_SDRAMC_H + +#include + + +#if CPU_CM3_SAM3X + +/** SDRAMC registers base. */ +#define SDRAMC_BASE 0x400E0200 + + +/** + * SDRAMC register offsets. + */ +/*\{*/ +#define SDRAMC_MR_OFF 0x00 ///< Mode Register +#define SDRAMC_TR_OFF 0x04 ///< Refresh Timer Register +#define SDRAMC_CR_OFF 0x08 ///< Configuration Register +#define SDRAMC_LPR_OFF 0x10 ///< Low Power Register +#define SDRAMC_IER_OFF 0x14 ///< Interrupt Enable Register +#define SDRAMC_IDR_OFF 0x18 ///< Interrupt Disable Register +#define SDRAMC_IMR_OFF 0x1C ///< Interrupt Mask Register +#define SDRAMC_ISR_OFF 0x20 ///< Interrupt Status Register +#define SDRAMC_MDR_OFF 0x24 ///< Memory Device Register +#define SDRAMC_CR1_OFF 0x28 ///< Configuration Register 1 +#define SDRAMC_OCMS_OFF 0x2C ///< OCMS Register 1 +/*\}*/ + +/** + * SDRAMC registers. + */ +/*\{*/ +#define SDRAMC_MR (*(reg32_t *)(SDRAMC_BASE + SDRAMC_MR_OFF )) +#define SDRAMC_TR (*(reg32_t *)(SDRAMC_BASE + SDRAMC_TR_OFF )) +#define SDRAMC_CR (*(reg32_t *)(SDRAMC_BASE + SDRAMC_CR_OFF )) +#define SDRAMC_LPR (*(reg32_t *)(SDRAMC_BASE + SDRAMC_LPR_OFF )) +#define SDRAMC_IER (*(reg32_t *)(SDRAMC_BASE + SDRAMC_IER_OFF )) +#define SDRAMC_IDR (*(reg32_t *)(SDRAMC_BASE + SDRAMC_IDR_OFF )) +#define SDRAMC_IMR (*(reg32_t *)(SDRAMC_BASE + SDRAMC_IMR_OFF )) +#define SDRAMC_ISR (*(reg32_t *)(SDRAMC_BASE + SDRAMC_ISR_OFF )) +#define SDRAMC_MDR (*(reg32_t *)(SDRAMC_BASE + SDRAMC_MDR_OFF )) +#define SDRAMC_CR1 (*(reg32_t *)(SDRAMC_BASE + SDRAMC_CR1_OFF )) +#define SDRAMC_OCMS (*(reg32_t *)(SDRAMC_BASE + SDRAMC_OCMS_OFF)) +/*\}*/ + + +/** + * Defines for bit fields in SDRAMC_MR register. + */ +/*\{*/ +#define SDRAMC_MR_MODE_MASK 0x7 +#define SDRAMC_MR_MODE_NORMAL 0x0 ///< Normal mode. Any access to the SDRAM is decoded normally. To activate this mode, command must be followed by a write to the SDRAM. +#define SDRAMC_MR_MODE_NOP 0x1 ///< The SDRAM Controller issues a NOP command when the SDRAM device is accessed regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM. +#define SDRAMC_MR_MODE_ALLBANKS_PRECHARGE 0x2 ///< The SDRAM Controller issues an "All Banks Precharge" command when the SDRAM device is accessed regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM. +#define SDRAMC_MR_MODE_LOAD_MODEREG 0x3 ///< The SDRAM Controller issues a "Load Mode Register" command when the SDRAM device is accessed regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM. +#define SDRAMC_MR_MODE_AUTO_REFRESH 0x4 ///< The SDRAM Controller issues an "Auto-Refresh" Command when the SDRAM device is accessed regardless of the cycle. Previously, an "All Banks Precharge" command must be issued. To activate this mode, command must be followed by a write to the SDRAM. +#define SDRAMC_MR_MODE_EXT_LOAD_MODEREG 0x5 ///< The SDRAM Controller issues an "Extended Load Mode Register" command when the SDRAM device is accessed regardless of the cycle. To activate this mode, the "Extended Load Mode Register" command must be followed by a write to the SDRAM. The write in the SDRAM must be done in the appropriate bank; most low-power SDRAM devices use the bank 1. +#define SDRAMC_MR_MODE_DEEP_POWERDOWN 0x6 ///< Deep power-down mode. Enters deep power-down mode. +/*\}*/ + +/** + * Defines for bit fields in SDRAMC_TR register. + */ +/*\{*/ +#define SDRAMC_TR_COUNT_MASK 0xfff +#define SDRAMC_TR_COUNT(value) (SDRAMC_TR_COUNT_MASK & (value)) +/*\}*/ + +/** + * Defines for bit fields in SDRAMC_CR register. + */ +/*\{*/ +#define SDRAMC_CR_NC_SHIFT 0 +#define SDRAMC_CR_NC_MASK 0x3 ///< Number of Column Bits +#define SDRAMC_CR_NC_COL8 0x0 ///< 8 column bits +#define SDRAMC_CR_NC_COL9 0x1 ///< 9 column bits +#define SDRAMC_CR_NC_COL10 0x2 ///< 10 column bits +#define SDRAMC_CR_NC_COL11 0x3 ///< 11 column bits +#define SDRAMC_CR_NR_SHIFT 2 +#define SDRAMC_CR_NR_MASK (0x3 << 2) ///< Number of Row Bits +#define SDRAMC_CR_NR_ROW11 (0x0 << 2) ///< 11 row bits +#define SDRAMC_CR_NR_ROW12 (0x1 << 2) ///< 12 row bits +#define SDRAMC_CR_NR_ROW13 (0x2 << 2) ///< 13 row bits +#define SDRAMC_CR_NB (0x1 << 4) ///< Number of Banks +#define SDRAMC_CR_NB_BANK2 (0x0 << 4) ///< 2 banks +#define SDRAMC_CR_NB_BANK4 (0x1 << 4) ///< 4 banks +#define SDRAMC_CR_CAS_SHIFT 5 +#define SDRAMC_CR_CAS_MASK (0x3 << SDRAMC_CR_CAS_SHIFT) ///< CAS Latency +#define SDRAMC_CR_CAS_LATENCY1 (0x1 << 5) ///< 1 cycle CAS latency +#define SDRAMC_CR_CAS_LATENCY2 (0x2 << 5) ///< 2 cycle CAS latency +#define SDRAMC_CR_CAS_LATENCY3 (0x3 << 5) ///< 3 cycle CAS latency +#define SDRAMC_CR_DBW (0x1 << 7) ///< Data Bus Width +#define SDRAMC_CR_TWR_SHIFT 8 +#define SDRAMC_CR_TWR_MASK (0xf << SDRAMC_CR_TWR_SHIFT) ///< Write Recovery Delay +#define SDRAMC_CR_TWR(value) (SDRAMC_CR_TWR_MASK & ((value) << SDRAMC_CR_TWR_SHIFT)) +#define SDRAMC_CR_TRC_TRFC_SHIFT 12 +#define SDRAMC_CR_TRC_TRFC_MASK (0xf << SDRAMC_CR_TRC_TRFC_SHIFT) ///< Row Cycle Delay and Row Refresh Cycle +#define SDRAMC_CR_TRC_TRFC(value) (SDRAMC_CR_TRC_TRFC_MASK & ((value) << SDRAMC_CR_TRC_TRFC_SHIFT)) +#define SDRAMC_CR_TRP_SHIFT 16 +#define SDRAMC_CR_TRP_MASK (0xf << SDRAMC_CR_TRP_SHIFT) ///< Row Precharge Delay +#define SDRAMC_CR_TRP(value) (SDRAMC_CR_TRP_MASK & ((value) << SDRAMC_CR_TRP_SHIFT)) +#define SDRAMC_CR_TRCD_SHIFT 20 +#define SDRAMC_CR_TRCD_MASK (0xf << SDRAMC_CR_TRCD_SHIFT) ///< Row to Column Delay +#define SDRAMC_CR_TRCD(value) (SDRAMC_CR_TRCD_MASK & ((value) << SDRAMC_CR_TRCD_SHIFT)) +#define SDRAMC_CR_TRAS_SHIFT 24 +#define SDRAMC_CR_TRAS_MASK (0xf << SDRAMC_CR_TRAS_SHIFT) ///< Active to Precharge Delay +#define SDRAMC_CR_TRAS(value) (SDRAMC_CR_TRAS_MASK & ((value) << SDRAMC_CR_TRAS_SHIFT)) +#define SDRAMC_CR_TXSR_SHIFT 28 +#define SDRAMC_CR_TXSR_MASK (0xf << SDRAMC_CR_TXSR_SHIFT) ///< Exit Self Refresh to Active Delay +#define SDRAMC_CR_TXSR(value) (SDRAMC_CR_TXSR_MASK & ((value) << SDRAMC_CR_TXSR_SHIFT)) +/*\}*/ + +/** + * Defines for bit fields in SDRAMC_MDR register. + */ +/*\{*/ +#define SDRAMC_MDR_MD_MASK 0x3 +#define SDRAMC_MDR_MD_SDRAM 0x0 +#define SDRAMC_MDR_MD_LPSDRAM 0x1 +/*\}*/ + +#endif /* CPU_CM_SAM3X */ + +#endif /* SAM3_SDRAMC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_smc.h b/bertos/cpu/cortex-m3/io/sam3_smc.h new file mode 100644 index 0000000..8998d83 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_smc.h @@ -0,0 +1,411 @@ +/** + * \file + * + * + * \brief SAM3X/A/U Static Memory Controller definitions. + */ + +#ifndef SAM3_SMC_H +#define SAM3_SMC_H + +/* + * SMC registers defined only for SAM3X/A and U for now + */ +#if CPU_CM3_SAM3X || CPU_CM3_SAM3U + +/** SMC registers base. */ +#define SMC_BASE 0x400E0000 + + +/** + * SMC register offsets. + */ +/*\{*/ +#define SMC_CFG_OFF 0x000 ///< NFC Configuration +#define SMC_CTRL_OFF 0x004 ///< NFC Control +#define SMC_SR_OFF 0x008 ///< NFC Status +#define SMC_IER_OFF 0x00C ///< NFC Interrupt Enable +#define SMC_IDR_OFF 0x010 ///< NFC Interrupt Disable +#define SMC_IMR_OFF 0x014 ///< NFC Interrupt Mask +#define SMC_ADDR_OFF 0x018 ///< NFC Address Cycle Zero +#define SMC_BANK_OFF 0x01C ///< Bank Address +#define SMC_ECC_CTRL_OFF 0x020 ///< ECC Control +#define SMC_ECC_MD_OFF 0x024 ///< ECC Mode +#define SMC_ECC_SR1_OFF 0x028 ///< ECC Status 1 +#define SMC_ECC_PR0_OFF 0x02C ///< ECC Parity 0 +#define SMC_ECC_PR1_OFF 0x030 ///< ECC parity 1 +#define SMC_ECC_SR2_OFF 0x034 ///< ECC status 2 +#define SMC_ECC_PR2_OFF 0x038 ///< ECC parity 2 +#define SMC_ECC_PR3_OFF 0x03C ///< ECC parity 3 +#define SMC_ECC_PR4_OFF 0x040 ///< ECC parity 4 +#define SMC_ECC_PR5_OFF 0x044 ///< ECC parity 5 +#define SMC_ECC_PR6_OFF 0x048 ///< ECC parity 6 +#define SMC_ECC_PR7_OFF 0x04C ///< ECC parity 7 +#define SMC_ECC_PR8_OFF 0x050 ///< ECC parity 8 +#define SMC_ECC_PR9_OFF 0x054 ///< ECC parity 9 +#define SMC_ECC_PR10_OFF 0x058 ///< ECC parity 10 +#define SMC_ECC_PR11_OFF 0x05C ///< ECC parity 11 +#define SMC_ECC_PR12_OFF 0x060 ///< ECC parity 12 +#define SMC_ECC_PR13_OFF 0x064 ///< ECC parity 13 +#define SMC_ECC_PR14_OFF 0x068 ///< ECC parity 14 +#define SMC_ECC_PR15_OFF 0x06C ///< ECC parity 15 +#define SMC_SETUP0_OFF 0x070 ///< SETUP (CS_number = 0) +#define SMC_PULSE0_OFF 0x074 ///< PULSE (CS_number = 0) +#define SMC_CYCLE0_OFF 0x078 ///< CYCLE (CS_number = 0) +#define SMC_TIMINGS0_OFF 0x07C ///< TIMINGS (CS_number = 0) +#define SMC_MODE0_OFF 0x080 ///< MODE (CS_number = 0) +#define SMC_SETUP1_OFF 0x084 ///< SETUP (CS_number = 1) +#define SMC_PULSE1_OFF 0x088 ///< PULSE (CS_number = 1) +#define SMC_CYCLE1_OFF 0x08C ///< CYCLE (CS_number = 1) +#define SMC_TIMINGS1_OFF 0x090 ///< TIMINGS (CS_number = 1) +#define SMC_MODE1_OFF 0x094 ///< MODE (CS_number = 1) +#define SMC_SETUP2_OFF 0x098 ///< SETUP (CS_number = 2) +#define SMC_PULSE2_OFF 0x09C ///< PULSE (CS_number = 2) +#define SMC_CYCLE2_OFF 0x0A0 ///< CYCLE (CS_number = 2) +#define SMC_TIMINGS2_OFF 0x0A4 ///< TIMINGS (CS_number = 2) +#define SMC_MODE2_OFF 0x0A8 ///< MODE (CS_number = 2) +#define SMC_SETUP3_OFF 0x0AC ///< SETUP (CS_number = 3) +#define SMC_PULSE3_OFF 0x0B0 ///< PULSE (CS_number = 3) +#define SMC_CYCLE3_OFF 0x0B4 ///< CYCLE (CS_number = 3) +#define SMC_TIMINGS3_OFF 0x0B8 ///< TIMINGS (CS_number = 3) +#define SMC_MODE3_OFF 0x0BC ///< MODE (CS_number = 3) +#define SMC_SETUP4_OFF 0x0C0 ///< SETUP (CS_number = 4) +#define SMC_PULSE4_OFF 0x0C4 ///< PULSE (CS_number = 4) +#define SMC_CYCLE4_OFF 0x0C8 ///< CYCLE (CS_number = 4) +#define SMC_TIMINGS4_OFF 0x0CC ///< TIMINGS (CS_number = 4) +#define SMC_MODE4_OFF 0x0D0 ///< MODE (CS_number = 4) +#define SMC_SETUP5_OFF 0x0D4 ///< SETUP (CS_number = 5) +#define SMC_PULSE5_OFF 0x0D8 ///< PULSE (CS_number = 5) +#define SMC_CYCLE5_OFF 0x0DC ///< CYCLE (CS_number = 5) +#define SMC_TIMINGS5_OFF 0x0E0 ///< TIMINGS (CS_number = 5) +#define SMC_MODE5_OFF 0x0E4 ///< MODE (CS_number = 5) +#define SMC_SETUP6_OFF 0x0E8 ///< SETUP (CS_number = 6) +#define SMC_PULSE6_OFF 0x0EC ///< PULSE (CS_number = 6) +#define SMC_CYCLE6_OFF 0x0F0 ///< CYCLE (CS_number = 6) +#define SMC_TIMINGS6_OFF 0x0F4 ///< TIMINGS (CS_number = 6) +#define SMC_MODE6_OFF 0x0F8 ///< MODE (CS_number = 6) +#define SMC_SETUP7_OFF 0x0FC ///< SETUP (CS_number = 7) +#define SMC_PULSE7_OFF 0x100 ///< PULSE (CS_number = 7) +#define SMC_CYCLE7_OFF 0x104 ///< CYCLE (CS_number = 7) +#define SMC_TIMINGS7_OFF 0x108 ///< TIMINGS (CS_number = 7) +#define SMC_MODE7_OFF 0x10C ///< MODE (CS_number = 7) +#define SMC_OCMS_OFF 0x110 ///< OCMS MODE +#define SMC_KEY1_OFF 0x114 ///< KEY1 +#define SMC_KEY2_OFF 0x118 ///< KEY2 +#define SMC_WPCR_OFF 0x1E4 ///< Write Protection Control +#define SMC_WPSR_OFF 0x1E8 ///< Write Protection Status +/*\}*/ + +/** + * SMC registers. + */ +/*\{*/ +#define SMC_CFG (*((reg32_t *)(SMC_BASE + SMC_CFG_OFF))) +#define SMC_CTRL (*((reg32_t *)(SMC_BASE + SMC_CTRL_OFF))) +#define SMC_SR (*((reg32_t *)(SMC_BASE + SMC_SR_OFF))) +#define SMC_IER (*((reg32_t *)(SMC_BASE + SMC_IER_OFF))) +#define SMC_IDR (*((reg32_t *)(SMC_BASE + SMC_IDR_OFF))) +#define SMC_IMR (*((reg32_t *)(SMC_BASE + SMC_IMR_OFF))) +#define SMC_ADDR (*((reg32_t *)(SMC_BASE + SMC_ADDR_OFF))) +#define SMC_BANK (*((reg32_t *)(SMC_BASE + SMC_BANK_OFF))) +#define SMC_ECC_CTRL (*((reg32_t *)(SMC_BASE + SMC_ECC_CTRL_OFF))) +#define SMC_ECC_MD (*((reg32_t *)(SMC_BASE + SMC_ECC_MD_OFF))) +#define SMC_ECC_SR1 (*((reg32_t *)(SMC_BASE + SMC_ECC_SR1_OFF))) +#define SMC_ECC_PR0 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR0_OFF))) +#define SMC_ECC_PR1 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR1_OFF))) +#define SMC_ECC_SR2 (*((reg32_t *)(SMC_BASE + SMC_ECC_SR2_OFF))) +#define SMC_ECC_PR2 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR2_OFF))) +#define SMC_ECC_PR3 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR3_OFF))) +#define SMC_ECC_PR4 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR4_OFF))) +#define SMC_ECC_PR5 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR5_OFF))) +#define SMC_ECC_PR6 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR6_OFF))) +#define SMC_ECC_PR7 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR7_OFF))) +#define SMC_ECC_PR8 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR8_OFF))) +#define SMC_ECC_PR9 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR9_OFF))) +#define SMC_ECC_PR10 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR10_OFF))) +#define SMC_ECC_PR11 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR11_OFF))) +#define SMC_ECC_PR12 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR12_OFF))) +#define SMC_ECC_PR13 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR13_OFF))) +#define SMC_ECC_PR14 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR14_OFF))) +#define SMC_ECC_PR15 (*((reg32_t *)(SMC_BASE + SMC_ECC_PR15_OFF))) +#define SMC_SETUP0 (*((reg32_t *)(SMC_BASE + SMC_SETUP0_OFF))) +#define SMC_PULSE0 (*((reg32_t *)(SMC_BASE + SMC_PULSE0_OFF))) +#define SMC_CYCLE0 (*((reg32_t *)(SMC_BASE + SMC_CYCLE0_OFF))) +#define SMC_TIMINGS0 (*((reg32_t *)(SMC_BASE + SMC_TIMINGS0_OFF))) +#define SMC_MODE0 (*((reg32_t *)(SMC_BASE + SMC_MODE0_OFF))) +#define SMC_SETUP1 (*((reg32_t *)(SMC_BASE + SMC_SETUP1_OFF))) +#define SMC_PULSE1 (*((reg32_t *)(SMC_BASE + SMC_PULSE1_OFF))) +#define SMC_CYCLE1 (*((reg32_t *)(SMC_BASE + SMC_CYCLE1_OFF))) +#define SMC_TIMINGS1 (*((reg32_t *)(SMC_BASE + SMC_TIMINGS1_OFF))) +#define SMC_MODE1 (*((reg32_t *)(SMC_BASE + SMC_MODE1_OFF))) +#define SMC_SETUP2 (*((reg32_t *)(SMC_BASE + SMC_SETUP2_OFF))) +#define SMC_PULSE2 (*((reg32_t *)(SMC_BASE + SMC_PULSE2_OFF))) +#define SMC_CYCLE2 (*((reg32_t *)(SMC_BASE + SMC_CYCLE2_OFF))) +#define SMC_TIMINGS2 (*((reg32_t *)(SMC_BASE + SMC_TIMINGS2_OFF))) +#define SMC_MODE2 (*((reg32_t *)(SMC_BASE + SMC_MODE2_OFF))) +#define SMC_SETUP3 (*((reg32_t *)(SMC_BASE + SMC_SETUP3_OFF))) +#define SMC_PULSE3 (*((reg32_t *)(SMC_BASE + SMC_PULSE3_OFF))) +#define SMC_CYCLE3 (*((reg32_t *)(SMC_BASE + SMC_CYCLE3_OFF))) +#define SMC_TIMINGS3 (*((reg32_t *)(SMC_BASE + SMC_TIMINGS3_OFF))) +#define SMC_MODE3 (*((reg32_t *)(SMC_BASE + SMC_MODE3_OFF))) +#define SMC_SETUP4 (*((reg32_t *)(SMC_BASE + SMC_SETUP4_OFF))) +#define SMC_PULSE4 (*((reg32_t *)(SMC_BASE + SMC_PULSE4_OFF))) +#define SMC_CYCLE4 (*((reg32_t *)(SMC_BASE + SMC_CYCLE4_OFF))) +#define SMC_TIMINGS4 (*((reg32_t *)(SMC_BASE + SMC_TIMINGS4_OFF))) +#define SMC_MODE4 (*((reg32_t *)(SMC_BASE + SMC_MODE4_OFF))) +#define SMC_SETUP5 (*((reg32_t *)(SMC_BASE + SMC_SETUP5_OFF))) +#define SMC_PULSE5 (*((reg32_t *)(SMC_BASE + SMC_PULSE5_OFF))) +#define SMC_CYCLE5 (*((reg32_t *)(SMC_BASE + SMC_CYCLE5_OFF))) +#define SMC_TIMINGS5 (*((reg32_t *)(SMC_BASE + SMC_TIMINGS5_OFF))) +#define SMC_MODE5 (*((reg32_t *)(SMC_BASE + SMC_MODE5_OFF))) +#define SMC_SETUP6 (*((reg32_t *)(SMC_BASE + SMC_SETUP6_OFF))) +#define SMC_PULSE6 (*((reg32_t *)(SMC_BASE + SMC_PULSE6_OFF))) +#define SMC_CYCLE6 (*((reg32_t *)(SMC_BASE + SMC_CYCLE6_OFF))) +#define SMC_TIMINGS6 (*((reg32_t *)(SMC_BASE + SMC_TIMINGS6_OFF))) +#define SMC_MODE6 (*((reg32_t *)(SMC_BASE + SMC_MODE6_OFF))) +#define SMC_SETUP7 (*((reg32_t *)(SMC_BASE + SMC_SETUP7_OFF))) +#define SMC_PULSE7 (*((reg32_t *)(SMC_BASE + SMC_PULSE7_OFF))) +#define SMC_CYCLE7 (*((reg32_t *)(SMC_BASE + SMC_CYCLE7_OFF))) +#define SMC_TIMINGS7 (*((reg32_t *)(SMC_BASE + SMC_TIMINGS7_OFF))) +#define SMC_MODE7 (*((reg32_t *)(SMC_BASE + SMC_MODE7_OFF))) +#define SMC_OCMS (*((reg32_t *)(SMC_BASE + SMC_OCMS_OFF))) +#define SMC_KEY1 (*((reg32_t *)(SMC_BASE + SMC_KEY1_OFF))) +#define SMC_KEY2 (*((reg32_t *)(SMC_BASE + SMC_KEY2_OFF))) +#define SMC_WPCR (*((reg32_t *)(SMC_BASE + SMC_WPCR_OFF))) +#define SMC_WPSR (*((reg32_t *)(SMC_BASE + SMC_WPSR_OFF))) +/*\}*/ + +/** + * NFC control addresses. + */ +/*\{*/ +#define NFC_SRAM_BASE_ADDR 0x20100000 ///< Base address of NFC SRAM +#define NFC_CMD_BASE_ADDR 0x60000000 ///< Base address for NFC Address Command +/*\}*/ + +/** + * NFC address command values. + */ +/*\{*/ +#define NFC_CMD_CMD1 (0xFF << 2) ///< Command Register Value for Cycle 1 +#define NFC_CMD_CMD2 (0xFF << 10) ///< Command Register Value for Cycle 2 +#define NFC_CMD_VCMD2 BV(18) ///< Valid Cycle 2 Command +#define NFC_CMD_ACYCLE_SHIFT 19 +#define NFC_CMD_ACYCLE_MASK (0x7 << 19) ///< Number of Address required for the current command +#define NFC_CMD_ACYCLE_NONE (0x0 << 19) ///< No address cycle +#define NFC_CMD_ACYCLE_ONE (0x1 << 19) ///< One address cycle +#define NFC_CMD_ACYCLE_TWO (0x2 << 19) ///< Two address cycles +#define NFC_CMD_ACYCLE_THREE (0x3 << 19) ///< Three address cycles +#define NFC_CMD_ACYCLE_FOUR (0x4 << 19) ///< Four address cycles +#define NFC_CMD_ACYCLE_FIVE (0x5 << 19) ///< Five address cycles +#define NFC_CMD_CSID_SHIFT 22 ///< Chip Select shift +#define NFC_CMD_CSID_MASK (0x7 << NFC_CMD_CSID_SHIFT) ///< Chip Select mask +#define NFC_CMD_NFCEN BV(25) ///< NFC Enable +#define NFC_CMD_NFCWR BV(26) ///< NFC Write Enable +#define NFC_CMD_NFCCMD BV(27) ///< NFC Command Enable +/*\}*/ + + +/** + * Defines for bit fields in SMC_CFG register. + */ +/*\{*/ +#define SMC_CFG_PAGESIZE_SHIFT 0 +#define SMC_CFG_PAGESIZE_MASK (0x3 << SMC_CFG_PAGESIZE_SHIFT) +#define SMC_CFG_PAGESIZE_PS512_16 (0x0 << 0) +#define SMC_CFG_PAGESIZE_PS1024_32 (0x1 << 0) +#define SMC_CFG_PAGESIZE_PS2048_64 (0x2 << 0) +#define SMC_CFG_PAGESIZE_PS4096_128 (0x3 << 0) +#define SMC_CFG_WSPARE (0x1 << 8) +#define SMC_CFG_RSPARE (0x1 << 9) +#define SMC_CFG_EDGECTRL (0x1 << 12) +#define SMC_CFG_RBEDGE (0x1 << 13) +#define SMC_CFG_DTOCYC_SHIFT 16 +#define SMC_CFG_DTOCYC_MASK (0xf << SMC_CFG_DTOCYC_SHIFT) +#define SMC_CFG_DTOCYC(value) (SMC_CFG_DTOCYC_MASK & ((value) << SMC_CFG_DTOCYC_SHIFT)) +#define SMC_CFG_DTOMUL_SHIFT 20 +#define SMC_CFG_DTOMUL_MASK (0x7 << SMC_CFG_DTOMUL_SHIFT) +#define SMC_CFG_DTOMUL_X1 (0x0 << 20) +#define SMC_CFG_DTOMUL_X16 (0x1 << 20) +#define SMC_CFG_DTOMUL_X128 (0x2 << 20) +#define SMC_CFG_DTOMUL_X256 (0x3 << 20) +#define SMC_CFG_DTOMUL_X1024 (0x4 << 20) +#define SMC_CFG_DTOMUL_X4096 (0x5 << 20) +#define SMC_CFG_DTOMUL_X65536 (0x6 << 20) +#define SMC_CFG_DTOMUL_X1048576 (0x7 << 20) +/*\}*/ + +/** + * Defines for bit fields in SMC_CTRL register. + */ +/*\{*/ +#define SMC_CTRL_NFCEN BV(0) +#define SMC_CTRL_NFCDIS BV(1) +/*\}*/ + +/** + * Defines for bit fields in SMC_SR register. + */ +/*\{*/ +#define SMC_SR_SMCSTS BV(0) +#define SMC_SR_RB_RISE BV(4) +#define SMC_SR_RB_FALL BV(5) +#define SMC_SR_NFCBUSY BV(8) +#define SMC_SR_NFCWR BV(11) +#define SMC_SR_NFCSID_SHIFT 12 +#define SMC_SR_NFCSID_MASK (0x7 << SMC_SR_NFCSID_SHIFT) +#define SMC_SR_XFRDONE BV(16) +#define SMC_SR_CMDDONE BV(17) +#define SMC_SR_DTOE BV(20) +#define SMC_SR_UNDEF BV(21) +#define SMC_SR_AWB BV(22) +#define SMC_SR_NFCASE BV(23) +#define SMC_SR_RB_EDGE0 BV(24) +/*\}*/ + +/** + * Defines for bit fields in SMC_ECC_CTRL register + */ +/*\{*/ +#define SMC_ECC_CTRL_RST BV(0) +#define SMC_ECC_CTRL_SWRST BV(1) +/*\}*/ + +/** + * Defines for bit fields in SMC_ECC_MD register + */ +/*\{*/ +#define SMC_ECC_MD_ECC_PAGESIZE_SHIFT 0 +#define SMC_ECC_MD_ECC_PAGESIZE_MASK 0x3 +#define SMC_ECC_MD_ECC_PAGESIZE_PS512_16 0x0 +#define SMC_ECC_MD_ECC_PAGESIZE_PS1024_32 0x1 +#define SMC_ECC_MD_ECC_PAGESIZE_PS2048_64 0x2 +#define SMC_ECC_MD_ECC_PAGESIZE_PS4096_128 0x3 +#define SMC_ECC_MD_TYPCORREC_SHIFT 4 +#define SMC_ECC_MD_TYPCORREC_MASK (0x3 << SMC_ECC_MD_TYPCORREC_SHIFT) +#define SMC_ECC_MD_TYPCORREC_CPAGE (0x0 << SMC_ECC_MD_TYPCORREC_SHIFT) +#define SMC_ECC_MD_TYPCORREC_C256B (0x1 << SMC_ECC_MD_TYPCORREC_SHIFT) +#define SMC_ECC_MD_TYPCORREC_C512B (0x2 << SMC_ECC_MD_TYPCORREC_SHIFT) +/*\}*/ + +/** + * Defines for bit fields in SMC_SETUP registers. + */ +/*\{*/ +#define SMC_SETUP_NWE_SETUP_MASK 0x3f +#define SMC_SETUP_NWE_SETUP(x) (SMC_SETUP_NWE_SETUP_MASK & (x)) +#define SMC_SETUP_NCS_WR_SETUP_SHIFT 8 +#define SMC_SETUP_NCS_WR_SETUP_MASK (0x3f << SMC_SETUP_NCS_WR_SETUP_SHIFT) +#define SMC_SETUP_NCS_WR_SETUP(x) (SMC_SETUP_NCS_WR_SETUP_MASK & ((x) << SMC_SETUP_NCS_WR_SETUP_SHIFT)) +#define SMC_SETUP_NRD_SETUP_SHIFT 16 +#define SMC_SETUP_NRD_SETUP_MASK (0x3f << SMC_SETUP_NRD_SETUP_SHIFT) +#define SMC_SETUP_NRD_SETUP(x) (SMC_SETUP_NRD_SETUP_MASK & ((x) << SMC_SETUP_NRD_SETUP_SHIFT)) +#define SMC_SETUP_NCS_RD_SETUP_SHIFT 24 +#define SMC_SETUP_NCS_RD_SETUP_MASK (0x3f << SMC_SETUP_NCS_RD_SETUP_SHIFT) +#define SMC_SETUP_NCS_RD_SETUP(x) (SMC_SETUP_NCS_RD_SETUP_MASK & ((x) << SMC_SETUP_NCS_RD_SETUP_SHIFT)) +/*\}*/ + +/** + * Defines for bit fields in SMC_PULSE registers. + */ +/*\{*/ +#define SMC_PULSE_NWE_PULSE_MASK 0x3f +#define SMC_PULSE_NWE_PULSE(x) (SMC_PULSE_NWE_PULSE_MASK & (x)) +#define SMC_PULSE_NCS_WR_PULSE_SHIFT 8 +#define SMC_PULSE_NCS_WR_PULSE_MASK (0x3f << SMC_PULSE_NCS_WR_PULSE_SHIFT) +#define SMC_PULSE_NCS_WR_PULSE(x) (SMC_PULSE_NCS_WR_PULSE_MASK & ((x) << SMC_PULSE_NCS_WR_PULSE_SHIFT)) +#define SMC_PULSE_NRD_PULSE_SHIFT 16 +#define SMC_PULSE_NRD_PULSE_MASK (0x3f << SMC_PULSE_NRD_PULSE_SHIFT) +#define SMC_PULSE_NRD_PULSE(x) (SMC_PULSE_NRD_PULSE_MASK & ((x) << SMC_PULSE_NRD_PULSE_SHIFT)) +#define SMC_PULSE_NCS_RD_PULSE_SHIFT 24 +#define SMC_PULSE_NCS_RD_PULSE_MASK (0x3f << SMC_PULSE_NCS_RD_PULSE_SHIFT) +#define SMC_PULSE_NCS_RD_PULSE(x) (SMC_PULSE_NCS_RD_PULSE_MASK & ((x) << SMC_PULSE_NCS_RD_PULSE_SHIFT)) +/*\}*/ + +/** + * Defines for bit fields in SMC_CYCLE registers. + */ +/*\{*/ +#define SMC_CYCLE_NWE_CYCLE_MASK 0x1ff +#define SMC_CYCLE_NWE_CYCLE(x) (SMC_CYCLE_NWE_CYCLE_MASK & (x)) +#define SMC_CYCLE_NRD_CYCLE_SHIFT 16 +#define SMC_CYCLE_NRD_CYCLE_MASK (0x1ff << SMC_CYCLE_NRD_CYCLE_SHIFT) +#define SMC_CYCLE_NRD_CYCLE(x) (SMC_CYCLE_NRD_CYCLE_MASK & ((x) << SMC_CYCLE_NRD_CYCLE_SHIFT)) +/*\}*/ + +/** + * Defines for bit fields in SMC_TIMINGS registers. + */ +/*\{*/ +#define SMC_TIMINGS_TCLR_SHIFT 0 +#define SMC_TIMINGS_TCLR_MASK (0xf << SMC_TIMINGS_TCLR_SHIFT) +#define SMC_TIMINGS_TCLR(value) (SMC_TIMINGS_TCLR_MASK & ((value) << SMC_TIMINGS_TCLR_SHIFT)) +#define SMC_TIMINGS_TADL_SHIFT 4 +#define SMC_TIMINGS_TADL_MASK (0xf << SMC_TIMINGS_TADL_SHIFT) +#define SMC_TIMINGS_TADL(value) (SMC_TIMINGS_TADL_MASK & ((value) << SMC_TIMINGS_TADL_SHIFT)) +#define SMC_TIMINGS_TAR_SHIFT 8 +#define SMC_TIMINGS_TAR_MASK (0xf << SMC_TIMINGS_TAR_SHIFT) +#define SMC_TIMINGS_TAR(value) (SMC_TIMINGS_TAR_MASK & ((value) << SMC_TIMINGS_TAR_SHIFT)) +#define SMC_TIMINGS_OCMS BV(12) +#define SMC_TIMINGS_TRR_SHIFT 16 +#define SMC_TIMINGS_TRR_MASK (0xf << SMC_TIMINGS_TRR_SHIFT) +#define SMC_TIMINGS_TRR(value) (SMC_TIMINGS_TRR_MASK & ((value) << SMC_TIMINGS_TRR_SHIFT)) +#define SMC_TIMINGS_TWB_SHIFT 24 +#define SMC_TIMINGS_TWB_MASK (0xf << SMC_TIMINGS_TWB_SHIFT) +#define SMC_TIMINGS_TWB(value) (SMC_TIMINGS_TWB_MASK & ((value) << SMC_TIMINGS_TWB_SHIFT)) +#define SMC_TIMINGS_RBNSEL_SHIFT 28 +#define SMC_TIMINGS_RBNSEL_MASK (0x7 << SMC_TIMINGS_RBNSEL_SHIFT) +#define SMC_TIMINGS_RBNSEL(value) (SMC_TIMINGS_RBNSEL_MASK & ((value) << SMC_TIMINGS_RBNSEL_SHIFT)) +#define SMC_TIMINGS_NFSEL BV(31) +/*\}*/ + +/** + * Defines for bit fields in SMC_MODE registers. + */ +/*\{*/ +#define SMC_MODE_READ_MODE BV(0) +#define SMC_MODE_WRITE_MODE BV(1) +#define SMC_MODE_EXNW_MODE_SHIFT 4 +#define SMC_MODE_EXNW_MODE_MASK (0x3 << SMC_MODE_EXNW_MODE_SHIFT) +#define SMC_MODE_EXNW_MODE_DISABLED (0x0 << SNC_MODE_EXNW_MODE_SHIFT) +#define SMC_MODE_EXNW_MODE_FROZEN (0x2 << SNC_MODE_EXNW_MODE_SHIFT) +#define SMC_MODE_EXNW_MODE_READY (0x3 << SNC_MODE_EXNW_MODE_SHIFT) +#define SMC_MODE_BAT BV(8) +#define SMC_MODE_DBW BV(12) +#define SMC_MODE_TDF_CYCLES_SHIFT 16 +#define SMC_MODE_TDF_CYCLES_MASK (0xf << SMC_MODE_TDF_CYCLES_SHIFT) +#define SMC_MODE_TDF_CYCLES(x) (SMC_MODE_TDF_CYCLES_MASK & ((x) << SMC_MODE_TDF_CYCLES_SHIFT)) +#define SMC_MODE_TDF_MODE BV(20) +/*\}*/ + +#endif /* CPU_CM3_SAM3X || CPU_CM3_SAM3U */ + +#endif /* SAM3_SMC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_spi.h b/bertos/cpu/cortex-m3/io/sam3_spi.h new file mode 100644 index 0000000..794b181 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_spi.h @@ -0,0 +1,289 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * Atmel SAM3 SPI register definitions. + * This file is based on NUT/OS implementation. See license below. + + */ + +/* + * Copyright (C) 2006-2007 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + + */ + +#ifndef SAM3_SPI_H +#define SAM3_SPI_H + +/** + * SPI base addresses. + */ +#define SPI0_BASE 0x40008000 +#if CPU_CM3_SAM3X + #define SPI1_BASE 0x4000C000 +#endif + +/** + * SPI Control Register + */ +/*\{*/ +#define SPI_CR_OFF 0x00000000 ///< Control register offset. + +#define SPI_SPIEN 0 ///< SPI enable. +#define SPI_SPIDIS 1 ///< SPI disable. +#define SPI_SWRST 7 ///< Software reset. +#define SPI_LASTXFER 24 ///< Last transfer. +/*\}*/ + +/** + * SPI Mode Register + */ +/*\{*/ +#define SPI_MR_OFF 0x00000004 ///< Mode register offset. + +#define SPI_MSTR 0 ///< Master mode. +#define SPI_PS 1 ///< Peripheral select. +#define SPI_PCSDEC 2 ///< Chip select decode. +#define SPI_FDIV 3 ///< Clock selection. +#define SPI_MODFDIS 4 ///< Mode fault detection. +#define SPI_LLB 7 ///< Local loopback enable. +#define SPI_PCS 0x000F0000 ///< Peripheral chip select mask. +#define SPI_PCS_0 0x000E0000 ///< Peripheral chip select 0. +#define SPI_PCS_1 0x000D0000 ///< Peripheral chip select 1. +#define SPI_PCS_2 0x000B0000 ///< Peripheral chip select 2. +#define SPI_PCS_3 0x00070000 ///< Peripheral chip select 3. +#define SPI_PCS_SHIFT 16 ///< Least significant bit of peripheral chip select. +#define SPI_DLYBCS 0xFF000000 ///< Mask for delay between chip selects. +#define SPI_DLYBCS_SHIFT 24 ///< Least significant bit of delay between chip selects. +/*\}*/ + +/** + * SPI Receive Data Register + */ +/*\{*/ +#define SPI_RDR_OFF 0x00000008 ///< Receive data register offset. + +#define SPI_RD 0x0000FFFF ///< Receive data mask. +#define SPI_RD_SHIFT 0 ///< Least significant bit of receive data. +/*\}*/ + +/** + * SPI Transmit Data Register + */ +/*\{*/ +#define SPI_TDR_OFF 0x0000000C ///< Transmit data register offset. + +#define SPI_TD 0x0000FFFF ///< Transmit data mask. +#define SPI_TD_SHIFT 0 ///< Least significant bit of transmit data. +/*\}*/ + +/** + * SPI Status and Interrupt Register + */ +/*\{*/ +#define SPI_SR_OFF 0x00000010 ///< Status register offset. +#define SPI_IER_OFF 0x00000014 ///< Interrupt enable register offset. +#define SPI_IDR_OFF 0x00000018 ///< Interrupt disable register offset. +#define SPI_IMR_OFF 0x0000001C ///< Interrupt mask register offset. + +#define SPI_RDRF 0 ///< Receive data register full. +#define SPI_TDRE 1 ///< Transmit data register empty. +#define SPI_MODF 2 ///< Mode fault error. +#define SPI_OVRES 3 ///< Overrun error status. +#define SPI_ENDRX 4 ///< End of RX buffer. +#define SPI_ENDTX 5 ///< End of TX buffer. +#define SPI_RXBUFF 6 ///< RX buffer full. +#define SPI_TXBUFE 7 ///< TX buffer empty. +#define SPI_NSSR 8 ///< NSS rising. +#define SPI_TXEMPTY 9 ///< Transmission register empty. +#define SPI_SPIENS 16 ///< SPI enable status. +/*\}*/ + +/** + * SPI Chip Select Registers + */ +/*\{*/ +#define SPI_CSR0_OFF 0x00000030 ///< Chip select register 0 offset. +#define SPI_CSR1_OFF 0x00000034 ///< Chip select register 1 offset. +#define SPI_CSR2_OFF 0x00000038 ///< Chip select register 2 offset. +#define SPI_CSR3_OFF 0x0000003C ///< Chip select register 3 offset. + +#define SPI_CPOL 0 ///< Clock polarity. +#define SPI_NCPHA 1 ///< Clock phase. +#define SPI_CSAAT 3 ///< Chip select active after transfer. +#define SPI_BITS 0x000000F0 ///< Bits per transfer mask. +#define SPI_BITS_8 0x00000000 ///< 8 bits per transfer. +#define SPI_BITS_9 0x00000010 ///< 9 bits per transfer. +#define SPI_BITS_10 0x00000020 ///< 10 bits per transfer. +#define SPI_BITS_11 0x00000030 ///< 11 bits per transfer. +#define SPI_BITS_12 0x00000040 ///< 12 bits per transfer. +#define SPI_BITS_13 0x00000050 ///< 13 bits per transfer. +#define SPI_BITS_14 0x00000060 ///< 14 bits per transfer. +#define SPI_BITS_15 0x00000070 ///< 15 bits per transfer. +#define SPI_BITS_16 0x00000080 ///< 16 bits per transfer. +#define SPI_BITS_SHIFT 4 ///< Least significant bit of bits per transfer. +#define SPI_SCBR 0x0000FF00 ///< Serial clock baud rate mask. +#define SPI_SCBR_SHIFT 8 ///< Least significant bit of serial clock baud rate. +#define SPI_DLYBS 0x00FF0000 ///< Delay before SPCK mask. +#define SPI_DLYBS_SHIFT 16 ///< Least significant bit of delay before SPCK. +#define SPI_DLYBCT 0xFF000000 ///< Delay between consecutive transfers mask. +#define SPI_DLYBCT_SHIFT 24 ///< Least significant bit of delay between consecutive transfers. +/*\}*/ + +/** + * Single SPI Register Addresses + */ +/*\{*/ +#if defined(SPI_BASE) + #define SPI0_BASE SPI_BASE + #define SPI_CR (*((reg32_t *)(SPI0_BASE + SPI0_CR_OFF))) ///< SPI Control Register Write-only. + #define SPI_MR (*((reg32_t *)(SPI0_BASE + SPI0_MR_OFF))) ///< SPI Mode Register Read/Write Reset=0x0. + #define SPI_RDR (*((reg32_t *)(SPI0_BASE + SPI0_RDR_OFF))) ///< SPI Receive Data Register Read-only Reset=0x0. + #define SPI_TDR (*((reg32_t *)(SPI0_BASE + SPI0_TDR_OFF))) ///< SPI Transmit Data Register Write-only . + #define SPI_SR (*((reg32_t *)(SPI0_BASE + SPI0_SR_OFF))) ///< SPI Status Register Read-only Reset=0x000000F0. + #define SPI_IER (*((reg32_t *)(SPI0_BASE + SPI0_IER_OFF))) ///< SPI Interrupt Enable Register Write-only. + #define SPI_IDR (*((reg32_t *)(SPI0_BASE + SPI0_IDR_OFF))) ///< SPI Interrupt Disable Register Write-only. + #define SPI_IMR (*((reg32_t *)(SPI0_BASE + SPI0_IMR_OFF))) ///< SPI Interrupt Mask Register Read-only Reset=0x0. + #define SPI_CSR0 (*((reg32_t *)(SPI0_BASE + SPI0_CSR0_OFF))) ///< SPI Chip Select Register 0 Read/Write Reset=0x0. + #define SPI_CSR1 (*((reg32_t *)(SPI0_BASE + SPI0_CSR1_OFF))) ///< SPI Chip Select Register 1 Read/Write Reset=0x0. + #define SPI_CSR2 (*((reg32_t *)(SPI0_BASE + SPI0_CSR2_OFF))) ///< SPI Chip Select Register 2 Read/Write Reset=0x0. + #define SPI_CSR3 (*((reg32_t *)(SPI0_BASE + SPI0_CSR3_OFF))) ///< SPI Chip Select Register 3 Read/Write Reset=0x0. + #if defined(SPI_HAS_PDC) + #define SPI_RPR (*((reg32_t *)(SPI0_BASE + SPI0_RPR_OFF))) ///< PDC channel 0 receive pointer register. + #define SPI_RCR (*((reg32_t *)(SPI0_BASE + SPI0_RCR_OFF))) ///< PDC channel 0 receive counter register. + #define SPI_TPR (*((reg32_t *)(SPI0_BASE + SPI0_TPR_OFF))) ///< PDC channel 0 transmit pointer register. + #define SPI_TCR (*((reg32_t *)(SPI0_BASE + SPI0_TCR_OFF))) ///< PDC channel 0 transmit counter register. + #define SPI_RNPR (*((reg32_t *)(SPI0_BASE + SPI0_RNPR_OFF))) ///< PDC channel 0 receive next pointer register. + #define SPI_RNCR (*((reg32_t *)(SPI0_BASE + SPI0_RNCR_OFF))) ///< PDC channel 0 receive next counter register. + #define SPI_TNPR (*((reg32_t *)(SPI0_BASE + SPI0_TNPR_OFF))) ///< PDC channel 0 transmit next pointer register. + #define SPI_TNCR (*((reg32_t *)(SPI0_BASE + SPI0_TNCR_OFF))) ///< PDC channel 0 transmit next counter register. + #define SPI_PTCR (*((reg32_t *)(SPI0_BASE + SPI0_PTCR_OFF))) ///< PDC channel 0 transfer control register. + #define SPI_PTSR (*((reg32_t *)(SPI0_BASE + SPI0_PTSR_OFF))) ///< PDC channel 0 transfer status register. + #endif /* SPI_HAS_PDC */ +#endif /* SPI_BASE */ +/*\}*/ + +/** + * SPI 0 Register Addresses + */ +/*\{*/ +#if defined(SPI0_BASE) + #define SPI0_CR (*((reg32_t *)(SPI0_BASE + SPI_CR_OFF))) ///< SPI Control Register Write-only. + #define SPI0_MR (*((reg32_t *)(SPI0_BASE + SPI_MR_OFF))) ///< SPI Mode Register Read/Write Reset=0x0. + #define SPI0_RDR (*((reg32_t *)(SPI0_BASE + SPI_RDR_OFF))) ///< SPI Receive Data Register Read-only Reset=0x0. + #define SPI0_TDR (*((reg32_t *)(SPI0_BASE + SPI_TDR_OFF))) ///< SPI Transmit Data Register Write-only . + #define SPI0_SR (*((reg32_t *)(SPI0_BASE + SPI_SR_OFF))) ///< SPI Status Register Read-only Reset=0x000000F0. + #define SPI0_IER (*((reg32_t *)(SPI0_BASE + SPI_IER_OFF))) ///< SPI Interrupt Enable Register Write-only. + #define SPI0_IDR (*((reg32_t *)(SPI0_BASE + SPI_IDR_OFF))) ///< SPI Interrupt Disable Register Write-only. + #define SPI0_IMR (*((reg32_t *)(SPI0_BASE + SPI_IMR_OFF))) ///< SPI Interrupt Mask Register Read-only Reset=0x0. + #define SPI0_CSR0 (*((reg32_t *)(SPI0_BASE + SPI_CSR0_OFF))) ///< SPI Chip Select Register 0 Read/Write Reset=0x0. + #define SPI0_CSR1 (*((reg32_t *)(SPI0_BASE + SPI_CSR1_OFF))) ///< SPI Chip Select Register 1 Read/Write Reset=0x0. + #define SPI0_CSR2 (*((reg32_t *)(SPI0_BASE + SPI_CSR2_OFF))) ///< SPI Chip Select Register 2 Read/Write Reset=0x0. + #define SPI0_CSR3 (*((reg32_t *)(SPI0_BASE + SPI_CSR3_OFF))) ///< SPI Chip Select Register 3 Read/Write Reset=0x0. + #if defined(SPI_HAS_PDC) + #define SPI0_RPR (*((reg32_t *)(SPI0_BASE + PERIPH_RPR_OFF))) ///< PDC channel 0 receive pointer register. + #define SPI0_RCR (*((reg32_t *)(SPI0_BASE + PERIPH_RCR_OFF))) ///< PDC channel 0 receive counter register. + #define SPI0_TPR (*((reg32_t *)(SPI0_BASE + PERIPH_TPR_OFF))) ///< PDC channel 0 transmit pointer register. + #define SPI0_TCR (*((reg32_t *)(SPI0_BASE + PERIPH_TCR_OFF))) ///< PDC channel 0 transmit counter register. + #define SPI0_RNPR (*((reg32_t *)(SPI0_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 0 receive next pointer register. + #define SPI0_RNCR (*((reg32_t *)(SPI0_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 0 receive next counter register. + #define SPI0_TNPR (*((reg32_t *)(SPI0_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 0 transmit next pointer register. + #define SPI0_TNCR (*((reg32_t *)(SPI0_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 0 transmit next counter register. + #define SPI0_PTCR (*((reg32_t *)(SPI0_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 0 transfer control register. + #define SPI0_PTSR (*((reg32_t *)(SPI0_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 0 transfer status register. + #endif /* SPI_HAS_PDC */ +#endif /* SPI0_BASE */ +/*\}*/ + +/** + * SPI 1 Register Addresses + */ +/*\{*/ +#if defined(SPI1_BASE) + #define SPI1_CR (*((reg32_t *)(SPI1_BASE + SPI_CR_OFF))) ///< SPI Control Register Write-only. + #define SPI1_MR (*((reg32_t *)(SPI1_BASE + SPI_MR_OFF))) ///< SPI Mode Register Read/Write Reset=0x0. + #define SPI1_RDR (*((reg32_t *)(SPI1_BASE + SPI_RDR_OFF))) ///< SPI Receive Data Register Read-only Reset=0x0. + #define SPI1_TDR (*((reg32_t *)(SPI1_BASE + SPI_TDR_OFF))) ///< SPI Transmit Data Register Write-only . + #define SPI1_SR (*((reg32_t *)(SPI1_BASE + SPI_SR_OFF))) ///< SPI Status Register Read-only Reset=0x000000F0. + #define SPI1_IER (*((reg32_t *)(SPI1_BASE + SPI_IER_OFF))) ///< SPI Interrupt Enable Register Write-only. + #define SPI1_IDR (*((reg32_t *)(SPI1_BASE + SPI_IDR_OFF))) ///< SPI Interrupt Disable Register Write-only. + #define SPI1_IMR (*((reg32_t *)(SPI1_BASE + SPI_IMR_OFF))) ///< SPI Interrupt Mask Register Read-only Reset=0x0. + #define SPI1_CSR0 (*((reg32_t *)(SPI1_BASE + SPI_CSR0_OFF))) ///< SPI Chip Select Register 0 Read/Write Reset=0x0. + #define SPI1_CSR1 (*((reg32_t *)(SPI1_BASE + SPI_CSR1_OFF))) ///< SPI Chip Select Register 1 Read/Write Reset=0x0. + #define SPI1_CSR2 (*((reg32_t *)(SPI1_BASE + SPI_CSR2_OFF))) ///< SPI Chip Select Register 2 Read/Write Reset=0x0. + #define SPI1_CSR3 (*((reg32_t *)(SPI1_BASE + SPI_CSR3_OFF))) ///< SPI Chip Select Register 3 Read/Write Reset=0x0. + #if defined(SPI_HAS_PDC) + #define SPI1_RPR (*((reg32_t *)(SPI1_BASE + PERIPH_RPR_OFF))) ///< PDC channel 1 receive pointer register. + #define SPI1_RCR (*((reg32_t *)(SPI1_BASE + PERIPH_RCR_OFF))) ///< PDC channel 1 receive counter register. + #define SPI1_TPR (*((reg32_t *)(SPI1_BASE + PERIPH_TPR_OFF))) ///< PDC channel 1 transmit pointer register. + #define SPI1_TCR (*((reg32_t *)(SPI1_BASE + PERIPH_TCR_OFF))) ///< PDC channel 1 transmit counter register. + #define SPI1_RNPR (*((reg32_t *)(SPI1_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 1 receive next pointer register. + #define SPI1_RNCR (*((reg32_t *)(SPI1_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 1 receive next counter register. + #define SPI1_TNPR (*((reg32_t *)(SPI1_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 1 transmit next pointer register. + #define SPI1_TNCR (*((reg32_t *)(SPI1_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 1 transmit next counter register. + #define SPI1_PTCR (*((reg32_t *)(SPI1_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 1 transfer control register. + #define SPI1_PTSR (*((reg32_t *)(SPI1_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 1 transfer status register. + #endif /* SPI_HAS_PDC */ +#endif /* SPI1_BASE */ +/*\}*/ + +#endif /* SAM3_SPI_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_ssc.h b/bertos/cpu/cortex-m3/io/sam3_ssc.h new file mode 100644 index 0000000..6c5b8ab --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_ssc.h @@ -0,0 +1,229 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * SAM3X SSC register definitions. + */ + +#ifndef SAM3_SSC_H +#define SAM3_SSC_H + +#include + +/** SSC registers base. */ +#define SSC_BASE 0x40004000U + + +/** + * SSC Control Register + */ +/*\{*/ +#define SSC_CR_OFF 0x00000000 ///< Control register offset. + +#define SSC_RXEN 0 ///< Receive enable. +#define SSC_RXDIS 1 ///< Receive disable. +#define SSC_TXEN 8 ///< Transmit enable. +#define SSC_TXDIS 9 ///< Transmit disable. +#define SSC_SWRST 15 ///< Software reset. +/*\}*/ + +/** + * SSC Clock Mode Register + */ +/*\{*/ +#define SSC_CMR_OFF 0x00000004 ///< Clock mode register offset. + +#define SSC_DIV_MASK 0x00000FFF ///< Clock divider. +/*\}*/ + +/** + * SSC Receive/Transmit Clock Mode Register + */ +/*\{*/ +#define SSC_RCMR_OFF 0x00000010 ///< Receive clock mode register offset. +#define SSC_TCMR_OFF 0x00000018 ///< Transmit clock mode register offset. + +#define SSC_CKS_MASK 0x00000003 ///< Receive clock selection. +#define SSC_CKS_DIV 0x00000000 ///< Divided clock. +#define SSC_CKS_CLK 0x00000001 ///< RK/TK clock signal. +#define SSC_CKS_PIN 0x00000002 ///< TK/RK pin. +#define SSC_CKO_MASK 0x0000001C ///< Receive clock output mode selection. +#define SSC_CKO_NONE 0x00000000 ///< None. +#define SSC_CKO_CONT 0x00000004 ///< Continous receive clock. +#define SSC_CKO_TRAN 0x00000008 ///< Receive clock only during data transfers. +#define SSC_CKI 5 ///< Receive clock inversion. +#define SSC_CKG_MASK 0x000000C0 ///< Receive clock gating selection. +#define SSC_CKG_NONE 0x00000000 ///< None, continous clock. +#define SSC_CKG_FL 0x00000040 ///< Continous receive clock. +#define SSC_CKG_FH 0x00000080 ///< Receive clock only during data transfers. +#define SSC_START_MASK 0x00000F00 ///< Receive start selection. +#define SSC_START_CONT 0x00000000 ///< Receive start as soon as enabled. +#define SSC_START_TX 0x00000100 ///< Receive start on transmit start. +#define SSC_START_RX 0x00000100 ///< Receive start on receive start. +#define SSC_START_LOW_F 0x00000200 ///< Receive start on low level RF. +#define SSC_START_HIGH_F 0x00000300 ///< Receive start on high level RF. +#define SSC_START_FALL_F 0x00000400 ///< Receive start on falling edge RF. +#define SSC_START_RISE_F 0x00000500 ///< Receive start on rising edge RF. +#define SSC_START_LEVEL_F 0x00000600 ///< Receive start on any RF level change. +#define SSC_START_EDGE_F 0x00000700 ///< Receive start on any RF edge. +#define SSC_START_COMP0 0x00000800 ///< Receive on compare 0. +#define SSC_STOP 12 ///< Receive stop selection. +#define SSC_STTDLY_MASK 0x00FF0000 ///< Receive start delay. +#define SSC_STTDLY_SHIFT 16 ///< Least significant bit of receive start delay. +#define SSC_PERIOD_MASK 0xFF000000 ///< Receive period divider selection. +#define SSC_PERIOD_SHIFT 24 ///< Least significant bit of receive period divider selection. +/*\}*/ + +/** + * SSC Receive/Transmit Frame Mode Registers + */ +/*\{*/ +#define SSC_RFMR_OFF 0x00000014 ///< Receive frame mode register offset. +#define SSC_TFMR_OFF 0x0000001C ///< Transmit frame mode register offset. + +#define SSC_DATLEN_MASK 0x0000001F ///< Data length. +#define SSC_LOOP 5 ///< Receiver loop mode. +#define SSC_DATDEF 5 ///< Transmit default value. + +#define SSC_MSBF 7 ///< Most significant bit first. +#define SSC_DATNB_MASK 0x00000F00 ///< Data number per frame. +#define SSC_DATNB_SHIFT 8 ///< Least significant bit of data number per frame. +#define SSC_FSLEN_MASK 0x000F0000 ///< Receive frame sync. length. +#define SSC_FSLEN_SHIFT 16 ///< Least significant bit of receive frame sync. length. +#define SSC_FSOS 0x00700000 ///< Receive frame sync. output selection. +#define SSC_FSOS_NONE 0x00000000 ///< No frame sync. Line set to input. +#define SSC_FSOS_NEGATIVE 0x00100000 ///< Negative pulse. +#define SSC_FSOS_POSITIVE 0x00200000 ///< Positive pulse. +#define SSC_FSOS_LOW 0x00300000 ///< Low during transfer. +#define SSC_FSOS_HIGH 0x00400000 ///< High during transfer. +#define SSC_FSOS_TOGGLE 0x00500000 ///< Toggling at each start. +#define SSC_FSDEN 23 ///< Frame sync. data enable. +#define SSC_FSEDGE 24 ///< Frame sync. edge detection. +/*\}*/ + +/** + * SSC Receive Holding Register + */ +/*\{*/ +#define SSC_RHR_OFF 0x00000020 ///< Receive holding register offset. +/*\}*/ + +/** + * SSC Transmit Holding Register + */ +/*\{*/ +#define SSC_THR_OFF 0x00000024 ///< Transmit holding register offset. +/*\}*/ + +/** + * SSC Receive Sync. Holding Register + */ +/*\{*/ +#define SSC_RSHR_OFF 0x00000030 ///< Receive sync. holding register offset. +/*\}*/ + +/** + * SSC Transmit Sync. Holding Register + */ +/*\{*/ +#define SSC_TSHR_OFF 0x00000034 ///< Transmit sync. holding register offset. +/*\}*/ + +/** + * SSC Receive Compare 0 Register + */ +/*\{*/ +#define SSC_RC0R_OFF 0x00000038 ///< Receive compare 0 register offset. +/*\}*/ + +/** + * SSC Receive Compare 1 Register + */ +/*\{*/ +#define SSC_RC1R_OFF 0x0000003C ///< Receive compare 1 register offset. +/*\}*/ + +/** + * SSC Status and Interrupt Register + */ +/*\{*/ +#define SSC_SR_OFF 0x00000040 ///< Status register offset. +#define SSC_IER_OFF 0x00000044 ///< Interrupt enable register offset. +#define SSC_IDR_OFF 0x00000048 ///< Interrupt disable register offset. +#define SSC_IMR_OFF 0x0000004C ///< Interrupt mask register offset. + +#define SSC_TXRDY 0 ///< Transmit ready. +#define SSC_TXEMPTY 1 ///< Transmit empty. +#define SSC_ENDTX 2 ///< End of transmission. +#define SSC_TXBUFE 3 ///< Transmit buffer empty. +#define SSC_RXRDY 4 ///< Receive ready. +#define SSC_OVRUN 5 ///< Receive overrun. +#define SSC_ENDRX 6 ///< End of receiption. +#define SSC_RXBUFF 7 ///< Receive buffer full. +#define SSC_CP0 8 ///< Compare 0. +#define SSC_CP1 9 ///< Compare 1. +#define SSC_TXSYN 10 ///< Transmit sync. +#define SSC_RXSYN 11 ///< Receive sync. +#define SSC_TXENA 16 ///< Transmit enable. +#define SSC_RXENA 17 ///< Receive enable. + + +#define SSC_CR (*((reg32_t *)(SSC_BASE + SSC_CR_OFF))) ///< Control register address. +#define SSC_CMR (*((reg32_t *)(SSC_BASE + SSC_CMR_OFF))) ///< Clock mode register address. +#define SSC_RCMR (*((reg32_t *)(SSC_BASE + SSC_RCMR_OFF))) ///< Receive clock mode register address. +#define SSC_TCMR (*((reg32_t *)(SSC_BASE + SSC_TCMR_OFF))) ///< Transmit clock mode register address. +#define SSC_RFMR (*((reg32_t *)(SSC_BASE + SSC_RFMR_OFF))) ///< Receive frame mode register address. +#define SSC_TFMR (*((reg32_t *)(SSC_BASE + SSC_TFMR_OFF))) ///< Transmit frame mode register address. +#define SSC_RHR (*((reg32_t *)(SSC_BASE + SSC_RHR_OFF))) ///< Receive holding register address. +#define SSC_THR (*((reg32_t *)(SSC_BASE + SSC_THR_OFF))) ///< Transmit holding register address. +#define SSC_RSHR (*((reg32_t *)(SSC_BASE + SSC_RSHR_OFF))) ///< Receive sync. holding register address. +#define SSC_TSHR (*((reg32_t *)(SSC_BASE + SSC_TSHR_OFF))) ///< Transmit sync. holding register address. +#define SSC_RC0R (*((reg32_t *)(SSC_BASE + SSC_RC0R_OFF))) ///< Receive compare 0 register address. +#define SSC_RC1R (*((reg32_t *)(SSC_BASE + SSC_RC1R_OFF))) ///< Receive compare 1 register address. +#define SSC_SR (*((reg32_t *)(SSC_BASE + SSC_SR_OFF))) ///< Status register address. +#define SSC_IER (*((reg32_t *)(SSC_BASE + SSC_IER_OFF))) ///< Interrupt enable register address. +#define SSC_IDR (*((reg32_t *)(SSC_BASE + SSC_IDR_OFF))) ///< Interrupt disable register address. +#define SSC_IMR (*((reg32_t *)(SSC_BASE + SSC_IMR_OFF))) ///< Interrupt mask register address. + +#define SSC_RPR (*((reg32_t *)(SSC_BASE + PERIPH_RPR_OFF))) ///< Receive pointer register address. +#define SSC_RCR (*((reg32_t *)(SSC_BASE + PERIPH_RCR_OFF))) ///< Receive counter register address. +#define SSC_TPR (*((reg32_t *)(SSC_BASE + PERIPH_TPR_OFF))) ///< Transmit pointer register address. +#define SSC_TCR (*((reg32_t *)(SSC_BASE + PERIPH_TCR_OFF))) ///< Transmit counter register address. +#define SSC_RNPR (*((reg32_t *)(SSC_BASE + PERIPH_RNPR_OFF))) ///< Receive next pointer register address. +#define SSC_RNCR (*((reg32_t *)(SSC_BASE + PERIPH_RNCR_OFF))) ///< Receive next counter register address. +#define SSC_TNPR (*((reg32_t *)(SSC_BASE + PERIPH_TNPR_OFF))) ///< Transmit next pointer register address. +#define SSC_TNCR (*((reg32_t *)(SSC_BASE + PERIPH_TNCR_OFF))) ///< Transmit next counter register address. +#define SSC_PTCR (*((reg32_t *)(SSC_BASE + PERIPH_PTCR_OFF))) ///< Transfer control register address. +#define SSC_PTSR (*((reg32_t *)(SSC_BASE + PERIPH_PTSR_OFF))) ///< Transfer status register address. + +#endif /* SAM3_SSC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_sysctl.h b/bertos/cpu/cortex-m3/io/sam3_sysctl.h new file mode 100644 index 0000000..6853d06 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_sysctl.h @@ -0,0 +1,110 @@ +/** + * \file + * + * + * \brief Atmel SAM3 system controller registers. + */ + +#ifndef SAM3_SYSCTL_H +#define SAM3_SYSCTL_H + +/** Supply controller base */ +#if CPU_CM3_SAM3X + #define SUPC_BASE 0x400E1A10 +#else + #define SUPC_BASE 0x400E1410 +#endif + +/** + * Supply controller offsets. + */ +/*\{*/ +#define SUPC_CR_OFF 0x0 ///< Supply Controller Control +#define SUPC_SMMR_OFF 0x4 ///< Supply Controller Supply Monitor Mode +#define SUPC_MR_OFF 0x8 ///< Supply Controller Mode +#define SUPC_WUMR_OFF 0xC ///< Supply Controller Wake Up Mode +#define SUPC_WUIR_OFF 0x10 ///< Supply Controller Wake Up Inputs +#define SUPC_SR_OFF 0x14 ///< Supply Controller Status +/*\}*/ + +/** + * Supply controller registers. + */ +/*\{*/ +#define SUPC_CR (*((reg32_t *)(SUPC_BASE + SUPC_CR_OFF ))) ///< Supply Controller Control +#define SUPC_SMMR (*((reg32_t *)(SUPC_BASE + SUPC_SMMR_OFF))) ///< Supply Controller Supply Monitor Mode +#define SUPC_MR (*((reg32_t *)(SUPC_BASE + SUPC_MR_OFF ))) ///< Supply Controller Mode +#define SUPC_WUMR (*((reg32_t *)(SUPC_BASE + SUPC_WUMR_OFF))) ///< Supply Controller Wake Up Mode +#define SUPC_WUIR (*((reg32_t *)(SUPC_BASE + SUPC_WUIR_OFF))) ///< Supply Controller Wake Up Inputs +#define SUPC_SR (*((reg32_t *)(SUPC_BASE + SUPC_SR_OFF ))) ///< Supply Controller Status +/*\}*/ + +/** + * Defines for bit fields in SUPC_CR register. + */ +/*\{*/ +#define SUPC_CR_VROFF 2 ///< Voltage Regulator Off +#define SUPC_CR_XTALSEL 3 ///< Crystal Oscillator Select +#define SUPC_CR_KEY_P 24 +#define SUPC_CR_KEY_MASK (0xff << SUPC_CR_KEY_P) ///< SUPC_CR key +#define SUPC_CR_KEY(value) (SUPC_CR_KEY_MASK & ((value) << SUPC_CR_KEY_P)) +/*\}*/ + +/** + * Defines for bit fields in SUPC_SR register. + */ +/*\{*/ +#define SUPC_SR_WKUPS 1 ///< WKUP Wake Up Status +#define SUPC_SR_SMWS 2 ///< Supply Monitor Detection Wake Up Status +#define SUPC_SR_BODRSTS 3 ///< Brownout Detector Reset Status +#define SUPC_SR_SMRSTS 4 ///< Supply Monitor Reset Status +#define SUPC_SR_SMS 5 ///< Supply Monitor Status +#define SUPC_SR_SMOS 6 ///< Supply Monitor Output Status +#define SUPC_SR_OSCSEL 7 ///< 32-kHz Oscillator Selection Status +#define SUPC_SR_WKUPIS0 16 ///< WKUP Input Status 0 +#define SUPC_SR_WKUPIS1 17 ///< WKUP Input Status 1 +#define SUPC_SR_WKUPIS2 18 ///< WKUP Input Status 2 +#define SUPC_SR_WKUPIS3 19 ///< WKUP Input Status 3 +#define SUPC_SR_WKUPIS4 20 ///< WKUP Input Status 4 +#define SUPC_SR_WKUPIS5 21 ///< WKUP Input Status 5 +#define SUPC_SR_WKUPIS6 22 ///< WKUP Input Status 6 +#define SUPC_SR_WKUPIS7 23 ///< WKUP Input Status 7 +#define SUPC_SR_WKUPIS8 24 ///< WKUP Input Status 8 +#define SUPC_SR_WKUPIS9 25 ///< WKUP Input Status 9 +#define SUPC_SR_WKUPIS10 26 ///< WKUP Input Status 10 +#define SUPC_SR_WKUPIS11 27 ///< WKUP Input Status 11 +#define SUPC_SR_WKUPIS12 28 ///< WKUP Input Status 12 +#define SUPC_SR_WKUPIS13 29 ///< WKUP Input Status 13 +#define SUPC_SR_WKUPIS14 30 ///< WKUP Input Status 14 +#define SUPC_SR_WKUPIS15 31 ///< WKUP Input Status 15 +/*\}*/ + +#endif /* SAM3_SYSCTL_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_tc.h b/bertos/cpu/cortex-m3/io/sam3_tc.h new file mode 100644 index 0000000..dfd5a56 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_tc.h @@ -0,0 +1,193 @@ +/** + * \file + * + * + * \author Daniele Basile + * + * SAM3 Timer counter + * + * $WIZ$ + */ + + +#ifndef SAM3_TC_H +#define SAM3_TC_H + +/** Timer conter register bases. */ +#define TC0_BASE 0x40080000 ///< TC0 Base Address. +#define TC1_BASE 0x40084000 ///< TC1 Base Address. +#define TC2_BASE 0x40088000 ///< TC2 Base Address. + +/** + * Timer conter control register + */ +#define TC0_CCR0_OFF 0x00 ///< TC0 Channel Control Register (channel = 0). +#define TC0_CCR0 (*((reg32_t*)(TC0_BASE + TC0_CCR0_OFF))) ///< TC0 Channel Control Register (channel = 0). + +#define TC0_CMR0_OFF 0x04 ///< TC0 Channel Mode Register (channel = 0). +#define TC0_CMR0 (*((reg32_t*)(TC0_BASE + TC0_CMR0_OFF))) ///< TC0 Channel Mode Register (channel = 0). + +#define TC_CMR_CPCTRG 14 ///< RC Compare Trigger Enable +#define TC_CMR_WAVE 15 ///< Waveform mode is enabled + +#define TC_CMR_ACPA_SET 0x10000 ///< RA Compare Effect: set +#define TC_CMR_ACPA_CLEAR 0x20000 ///< RA Compare Effect: clear +#define TC_CMR_ACPA_TOGGLE 0x30000 ///< RA Compare Effect: toggle + +#define TC_CMR_ACPC_SET 0x40000 ///< RC Compare Effect: set +#define TC_CMR_ACPC_CLEAR 0x80000 ///< RC Compare Effect: clear +#define TC_CMR_ACPC_TOGGLE 0xC0000 ///< RC Compare Effect: toggle + +#define TC_CCR_CLKEN 0 ///< Counter Clock Enable Command +#define TC_CCR_CLKDIS 1 ///< Counter Clock Disable Command +#define TC_CCR_SWTRG 2 ///< Software Trigger Command + +#define TC_TIMER_CLOCK1 0 ///< Select timer clock TCLK1 +#define TC_TIMER_CLOCK2 1 ///< Select timer clock TCLK2 + +#define TC0_SMMR0_OFF 0x08 ///< TC0 Stepper Motor Mode Register (channel = 0). +#define TC0_SMMR0 (*((reg32_t*)(TC0_BASE + TC0_SMMR0_OFF))) ///< TC0 Stepper Motor Mode Register (channel = 0). + +#define TC0_CV0_OFF 0x10 ///< TC0 Conter Vale (channel = 0). +#define TC0_CV0 (*((reg32_t*)(TC0_BASE + TC0_CV0_OFF))) ///< TC0 Conter Vale (channel = 0). + +#define TC0_RA0_OFF 0x14 ///< TC0 Register A (channel = 0). +#define TC0_RA0 (*((reg32_t*)(TC0_BASE + TC0_RA0_OFF))) ///< TC0 Register A (channel = 0). + +#define TC0_RB0_OFF 0x18 ///< TC0 Register B (channel = 0). +#define TC0_RB0 (*((reg32_t*)(TC0_BASE + TC0_RB0_OFF))) ///< TC0 Register B (channel = 0). + +#define TC0_RC0_OFF 0x1C ///< TC0 Register C (channel = 0). +#define TC0_RC0 (*((reg32_t*)(TC0_BASE + TC0_RC0_OFF))) ///< TC0 Register C (channel = 0). + +#define TC0_SR0_OFF 0x20 ///< TC0 Stats Register (channel = 0). +#define TC0_SR0 (*((reg32_t*)(TC0_BASE + TC0_SR0_OFF))) ///< TC0 Stats Register (channel = 0). + +#define TC0_IER0_OFF 0x24 ///< TC0 Interrpt Enable Register (channel = 0). +#define TC0_IER0 (*((reg32_t*)(TC0_BASE + TC0_IER0_OFF))) ///< TC0 Interrpt Enable Register (channel = 0). + +#define TC0_IDR0_OFF 0x28 ///< TC0 Interrpt Disable Register (channel = 0). +#define TC0_IDR0 (*((reg32_t*)(TC0_BASE + TC0_IDR0_OFF))) ///< TC0 Interrpt Disable Register (channel = 0). + +#define TC0_IMR0_OFF 0x2C ///< TC0 Interrpt Mask Register (channel = 0). +#define TC0_IMR0 (*((reg32_t*)(TC0_BASE + TC0_IMR0_OFF))) ///< TC0 Interrpt Mask Register (channel = 0). + +#define TC0_CCR1_OFF 0x40 ///< TC0 Channel Control Register (channel = 1). +#define TC0_CCR1 (*((reg32_t*)(TC0_BASE + TC0_CCR1_OFF))) ///< TC0 Channel Control Register (channel = 1). + +#define TC0_CMR1_OFF 0x44 ///< TC0 Channel Mode Register (channel = 1). +#define TC0_CMR1 (*((reg32_t*)(TC0_BASE + TC0_CMR1_OFF))) ///< TC0 Channel Mode Register (channel = 1). + +#define TC0_SMMR1_OFF 0x48 ///< TC0 Stepper Motor Mode Register (channel = 1). +#define TC0_SMMR1 (*((reg32_t*)(TC0_BASE + TC0_SMMR1_OFF))) ///< TC0 Stepper Motor Mode Register (channel = 1). + +#define TC0_CV1_OFF 0x50 ///< TC0 Conter Vale (channel = 1). +#define TC0_CV1 (*((reg32_t*)(TC0_BASE + TC0_CV1_OFF))) ///< TC0 Conter Vale (channel = 1). + +#define TC0_RA1_OFF 0x54 ///< TC0 Register A (channel = 1). +#define TC0_RA1 (*((reg32_t*)(TC0_BASE + TC0_RA1_OFF))) ///< TC0 Register A (channel = 1). + +#define TC0_RB1_OFF 0x58 ///< TC0 Register B (channel = 1). +#define TC0_RB1 (*((reg32_t*)(TC0_BASE + TC0_RB1_OFF))) ///< TC0 Register B (channel = 1). + +#define TC0_RC1_OFF 0x5C ///< TC0 Register C (channel = 1). +#define TC0_RC1 (*((reg32_t*)(TC0_BASE + TC0_RC1_OFF))) ///< TC0 Register C (channel = 1). + +#define TC0_SR1_OFF 0x60 ///< TC0 Stats Register (channel = 1). +#define TC0_SR1 (*((reg32_t*)(TC0_BASE + TC0_SR1_OFF))) ///< TC0 Stats Register (channel = 1). + +#define TC0_IER1_OFF 0x64 ///< TC0 Interrpt Enable Register (channel = 1). +#define TC0_IER1 (*((reg32_t*)(TC0_BASE + TC0_IER1_OFF))) ///< TC0 Interrpt Enable Register (channel = 1). + +#define TC0_IDR1_OFF 0x68 ///< TC0 Interrpt Disable Register (channel = 1). +#define TC0_IDR1 (*((reg32_t*)(TC0_BASE + TC0_IDR1_OFF))) ///< TC0 Interrpt Disable Register (channel = 1). + +#define TC0_IMR1_OFF 0x6C ///< TC0 Interrpt Mask Register (channel = 1). +#define TC0_IMR1 (*((reg32_t*)(TC0_BASE + TC0_IMR1_OFF))) ///< TC0 Interrpt Mask Register (channel = 1). + +#define TC0_CCR2_OFF 0x80 ///< TC0 Channel Control Register (channel = 2). +#define TC0_CCR2 (*((reg32_t*)(TC0_BASE + TC0_CCR2_OFF))) ///< TC0 Channel Control Register (channel = 2). + +#define TC0_CMR2_OFF 0x84 ///< TC0 Channel Mode Register (channel = 2). +#define TC0_CMR2 (*((reg32_t*)(TC0_BASE + TC0_CMR2_OFF))) ///< TC0 Channel Mode Register (channel = 2). + +#define TC0_SMMR2_OFF 0x88 ///< TC0 Stepper Motor Mode Register (channel = 2). +#define TC0_SMMR2 (*((reg32_t*)(TC0_BASE + TC0_SMMR2_OFF))) ///< TC0 Stepper Motor Mode Register (channel = 2). + +#define TC0_CV2_OFF 0x90 ///< TC0 Conter Vale (channel = 2). +#define TC0_CV2 (*((reg32_t*)(TC0_BASE + TC0_CV2_OFF))) ///< TC0 Conter Vale (channel = 2). + +#define TC0_RA2_OFF 0x94 ///< TC0 Register A (channel = 2). +#define TC0_RA2 (*((reg32_t*)(TC0_BASE + TC0_RA2_OFF))) ///< TC0 Register A (channel = 2). + +#define TC0_RB2_OFF 0x98 ///< TC0 Register B (channel = 2). +#define TC0_RB2 (*((reg32_t*)(TC0_BASE + TC0_RB2_OFF))) ///< TC0 Register B (channel = 2). + +#define TC0_RC2_OFF 0x9C ///< TC0 Register C (channel = 2). +#define TC0_RC2 (*((reg32_t*)(TC0_BASE + TC0_RC2_OFF))) ///< TC0 Register C (channel = 2). + +#define TC0_SR2_OFF 0xA0 ///< TC0 Stats Register (channel = 2). +#define TC0_SR2 (*((reg32_t*)(TC0_BASE + TC0_SR2_OFF))) ///< TC0 Stats Register (channel = 2). + +#define TC0_IER2_OFF 0xA4 ///< TC0 Interrpt Enable Register (channel = 2). +#define TC0_IER2 (*((reg32_t*)(TC0_BASE + TC0_IER2_OFF))) ///< TC0 Interrpt Enable Register (channel = 2). + +#define TC0_IDR2_OFF 0xA8 ///< TC0 Interrpt Disable Register (channel = 2). +#define TC0_IDR2 (*((reg32_t*)(TC0_BASE + TC0_IDR2_OFF))) ///< TC0 Interrpt Disable Register (channel = 2). + +#define TC0_IMR2_OFF 0xAC ///< TC0 Interrpt Mask Register (channel = 2). +#define TC0_IMR2 (*((reg32_t*)(TC0_BASE + TC0_IMR2_OFF))) ///< TC0 Interrpt Mask Register (channel = 2). + +#define TC0_BCR_OFF 0xC0 ///< TC0 Block Control Register. +#define TC0_BCR (*((reg32_t*)(TC0_BASE + TC0_BCR_OFF))) ///< TC0 Block Control Register. + +#define TC0_BMR_OFF 0xC4 ///< TC0 Block Mode Register. +#define TC0_BMR (*((reg32_t*)(TC0_BASE + TC0_BMR_OFF))) ///< TC0 Block Mode Register. + +#define TC0_QIER_OFF 0xC8 ///< TC0 QDEC Interrpt Enable Register. +#define TC0_QIER (*((reg32_t*)(TC0_BASE + TC0_QIER_OFF))) ///< TC0 QDEC Interrpt Enable Register. + +#define TC0_QIDR_OFF 0xCC ///< TC0 QDEC Interrpt Disable Register. +#define TC0_QIDR (*((reg32_t*)(TC0_BASE + TC0_QIDR_OFF))) ///< TC0 QDEC Interrpt Disable Register. + +#define TC0_QIMR_OFF 0xD0 ///< TC0 QDEC Interrpt Mask Register. +#define TC0_QIMR (*((reg32_t*)(TC0_BASE + TC0_QIMR_OFF))) ///< TC0 QDEC Interrpt Mask Register. + +#define TC0_QISR_OFF 0xD4 ///< TC0 QDEC Interrpt Stats Register. +#define TC0_QISR (*((reg32_t*)(TC0_BASE + TC0_QISR_OFF))) ///< TC0 QDEC Interrpt Stats Register. + +#define TC0_FMR_OFF 0xD8 ///< TC0 Falt Mode Register. +#define TC0_FMR (*((reg32_t*)(TC0_BASE + TC0_FMR_OFF))) ///< TC0 Falt Mode Register. + +#define TC0_WPMR_OFF 0xE4 ///< TC0 Write Protect Mode Register. +#define TC0_WPMR (*((reg32_t*)(TC0_BASE + TC0_WPMR_OFF))) ///< TC0 Write Protect Mode Register. + +#endif /* SAM3_TC_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_twi.h b/bertos/cpu/cortex-m3/io/sam3_twi.h new file mode 100644 index 0000000..48b0eb6 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_twi.h @@ -0,0 +1,410 @@ +/** + * \file + * + * + * \brief SAM3 TWI definitions. + */ + +#ifndef SAM3_TWI_H +#define SAM3_TWI_H + +/** I2C registers base. */ +#if CPU_CM3_SAM3X + #define TWI0_BASE 0x4008C000 + #define TWI1_BASE 0x40090000 +#elif CPU_CM3_SAM3N || CPU_CM3_SAM3S + #define TWI0_BASE 0x40018000 + #define TWI1_BASE 0x4001C000 +#elif CPU_CM3_SAM3U + #define TWI0_BASE 0x40084000 + #define TWI1_BASE 0x40088000 +#else + #error TWI registers not defined for selected CPU +#endif + + +/** + * TWI register offsets. + */ +/*\{*/ +#define TWI_CR_OFF 0x000 +#define TWI_MMR_OFF 0x004 +#define TWI_SMR_OFF 0x008 +#define TWI_IADR_OFF 0x00C +#define TWI_CWGR_OFF 0x010 +#define TWI_SR_OFF 0x020 +#define TWI_IER_OFF 0x024 +#define TWI_IDR_OFF 0x028 +#define TWI_IMR_OFF 0x02C +#define TWI_RHR_OFF 0x030 +#define TWI_THR_OFF 0x034 +#define TWI_RPR_OFF 0x100 +#define TWI_RCR_OFF 0x104 +#define TWI_TPR_OFF 0x108 +#define TWI_TCR_OFF 0x10C +#define TWI_RNPR_OFF 0x110 +#define TWI_RNCR_OFF 0x114 +#define TWI_TNPR_OFF 0x118 +#define TWI_TNCR_OFF 0x11C +#define TWI_PTCR_OFF 0x120 +#define TWI_PTSR_OFF 0x124 +/*\}*/ + +/** + * TWI registers. + */ +/*\{*/ +#ifdef TWI_BASE + #define TWI_CR (HWREG(TWI_BASE + TWI_CR_OFF)) + #define TWI_MMR (HWREG(TWI_BASE + TWI_MMR_OFF)) + #define TWI_SMR (HWREG(TWI_BASE + TWI_SMR_OFF)) + #define TWI_IADR (HWREG(TWI_BASE + TWI_IADR_OFF)) + #define TWI_CWGR (HWREG(TWI_BASE + TWI_CWGR_OFF)) + #define TWI_SR (HWREG(TWI_BASE + TWI_SR_OFF)) + #define TWI_IER (HWREG(TWI_BASE + TWI_IER_OFF)) + #define TWI_IDR (HWREG(TWI_BASE + TWI_IDR_OFF)) + #define TWI_IMR (HWREG(TWI_BASE + TWI_IMR_OFF)) + #define TWI_RHR (HWREG(TWI_BASE + TWI_RHR_OFF)) + #define TWI_THR (HWREG(TWI_BASE + TWI_THR_OFF)) + #define TWI_RPR (HWREG(TWI_BASE + TWI_RPR_OFF)) + #define TWI_RCR (HWREG(TWI_BASE + TWI_RCR_OFF)) + #define TWI_TPR (HWREG(TWI_BASE + TWI_TPR_OFF)) + #define TWI_TCR (HWREG(TWI_BASE + TWI_TCR_OFF)) + #define TWI_RNPR (HWREG(TWI_BASE + TWI_RNPR_OFF)) + #define TWI_RNCR (HWREG(TWI_BASE + TWI_RNCR_OFF)) + #define TWI_TNPR (HWREG(TWI_BASE + TWI_TNPR_OFF)) + #define TWI_TNCR (HWREG(TWI_BASE + TWI_TNCR_OFF)) + #define TWI_PTCR (HWREG(TWI_BASE + TWI_PTCR_OFF)) + #define TWI_PTSR (HWREG(TWI_BASE + TWI_PTSR_OFF)) +#endif // TWI_BASE + +#ifdef TWI0_BASE + #define TWI0_CR (HWREG(TWI0_BASE + TWI_CR_OFF)) + #define TWI0_MMR (HWREG(TWI0_BASE + TWI_MMR_OFF)) + #define TWI0_SMR (HWREG(TWI0_BASE + TWI_SMR_OFF)) + #define TWI0_IADR (HWREG(TWI0_BASE + TWI_IADR_OFF)) + #define TWI0_CWGR (HWREG(TWI0_BASE + TWI_CWGR_OFF)) + #define TWI0_SR (HWREG(TWI0_BASE + TWI_SR_OFF)) + #define TWI0_IER (HWREG(TWI0_BASE + TWI_IER_OFF)) + #define TWI0_IDR (HWREG(TWI0_BASE + TWI_IDR_OFF)) + #define TWI0_IMR (HWREG(TWI0_BASE + TWI_IMR_OFF)) + #define TWI0_RHR (HWREG(TWI0_BASE + TWI_RHR_OFF)) + #define TWI0_THR (HWREG(TWI0_BASE + TWI_THR_OFF)) + #define TWI0_RPR (HWREG(TWI0_BASE + TWI_RPR_OFF)) + #define TWI0_RCR (HWREG(TWI0_BASE + TWI_RCR_OFF)) + #define TWI0_TPR (HWREG(TWI0_BASE + TWI_TPR_OFF)) + #define TWI0_TCR (HWREG(TWI0_BASE + TWI_TCR_OFF)) + #define TWI0_RNPR (HWREG(TWI0_BASE + TWI_RNPR_OFF)) + #define TWI0_RNCR (HWREG(TWI0_BASE + TWI_RNCR_OFF)) + #define TWI0_TNPR (HWREG(TWI0_BASE + TWI_TNPR_OFF)) + #define TWI0_TNCR (HWREG(TWI0_BASE + TWI_TNCR_OFF)) + #define TWI0_PTCR (HWREG(TWI0_BASE + TWI_PTCR_OFF)) + #define TWI0_PTSR (HWREG(TWI0_BASE + TWI_PTSR_OFF)) +#endif // TWI0_BASE + +#ifdef TWI1_BASE + #define TWI1_CR (HWREG(TWI1_BASE + TWI_CR_OFF)) + #define TWI1_MMR (HWREG(TWI1_BASE + TWI_MMR_OFF)) + #define TWI1_SMR (HWREG(TWI1_BASE + TWI_SMR_OFF)) + #define TWI1_IADR (HWREG(TWI1_BASE + TWI_IADR_OFF)) + #define TWI1_CWGR (HWREG(TWI1_BASE + TWI_CWGR_OFF)) + #define TWI1_SR (HWREG(TWI1_BASE + TWI_SR_OFF)) + #define TWI1_IER (HWREG(TWI1_BASE + TWI_IER_OFF)) + #define TWI1_IDR (HWREG(TWI1_BASE + TWI_IDR_OFF)) + #define TWI1_IMR (HWREG(TWI1_BASE + TWI_IMR_OFF)) + #define TWI1_RHR (HWREG(TWI1_BASE + TWI_RHR_OFF)) + #define TWI1_THR (HWREG(TWI1_BASE + TWI_THR_OFF)) + #define TWI1_RPR (HWREG(TWI1_BASE + TWI_RPR_OFF)) + #define TWI1_RCR (HWREG(TWI1_BASE + TWI_RCR_OFF)) + #define TWI1_TPR (HWREG(TWI1_BASE + TWI_TPR_OFF)) + #define TWI1_TCR (HWREG(TWI1_BASE + TWI_TCR_OFF)) + #define TWI1_RNPR (HWREG(TWI1_BASE + TWI_RNPR_OFF)) + #define TWI1_RNCR (HWREG(TWI1_BASE + TWI_RNCR_OFF)) + #define TWI1_TNPR (HWREG(TWI1_BASE + TWI_TNPR_OFF)) + #define TWI1_TNCR (HWREG(TWI1_BASE + TWI_TNCR_OFF)) + #define TWI1_PTCR (HWREG(TWI1_BASE + TWI_PTCR_OFF)) + #define TWI1_PTSR (HWREG(TWI1_BASE + TWI_PTSR_OFF)) +#endif // TWI1_BASE +/*\}*/ + + +/** + * TWI_CR: (TWI Offset: 0x00) Control Register + */ +/*\{*/ +#define TWI_CR_START BV(0) +#define TWI_CR_STOP BV(1) +#define TWI_CR_MSEN BV(2) +#define TWI_CR_MSDIS BV(3) +#define TWI_CR_SVEN BV(4) +#define TWI_CR_SVDIS BV(5) +#define TWI_CR_QUICK BV(6) +#define TWI_CR_SWRST BV(7) +/*\}*/ + +/** + * TWI_MMR: (TWI Offset: 0x04) Master Mode Register + */ +/*\{*/ +#define TWI_MMR_IADRSZ_SHIFT 8 +#define TWI_MMR_IADRSZ_MASK (0x3 << TWI_MMR_IADRSZ_SHIFT) +#define TWI_MMR_IADRSZ_NONE (0x0 << 8) +#define TWI_MMR_IADRSZ_1_BYTE BV(8) +#define TWI_MMR_IADRSZ_2_BYTE (0x2 << 8) +#define TWI_MMR_IADRSZ_3_BYTE (0x3 << 8) +#define TWI_MMR_MREAD BV(12) +#define TWI_MMR_DADR_SHIFT 16 +#define TWI_MMR_DADR_MASK (0x7f << TWI_MMR_DADR_SHIFT) +#define TWI_MMR_DADR(value) ((TWI_MMR_DADR_MASK & ((value) << TWI_MMR_DADR_SHIFT))) +/*\}*/ + +/** + * TWI_SMR: (TWI Offset: 0x08) Slave Mode Register + */ +/*\{*/ +#define TWI_SMR_SADR_SHIFT 16 +#define TWI_SMR_SADR_MASK (0x7f << TWI_SMR_SADR_SHIFT) +#define TWI_SMR_SADR(value) ((TWI_SMR_SADR_MASK & ((value) << TWI_SMR_SADR_SHIFT))) +/*\}*/ + +/** + * TWI_IADR: (TWI Offset: 0x0C) Internal Address Register + */ +/*\{*/ +#define TWI_IADR_IADR_SHIFT 0 +#define TWI_IADR_IADR_MASK (0xffffff << TWI_IADR_IADR_SHIFT) +#define TWI_IADR_IADR(value) ((TWI_IADR_IADR_MASK & ((value) << TWI_IADR_IADR_SHIFT))) +/*\}*/ + +/** + * TWI_CWGR: (TWI Offset: 0x10) Clock Waveform Generator Register + */ +/*\{*/ +#define TWI_CWGR_CLDIV_SHIFT 0 +#define TWI_CWGR_CLDIV_MASK (0xff << TWI_CWGR_CLDIV_SHIFT) +#define TWI_CWGR_CLDIV(value) ((TWI_CWGR_CLDIV_MASK & ((value) << TWI_CWGR_CLDIV_SHIFT))) +#define TWI_CWGR_CHDIV_SHIFT 8 +#define TWI_CWGR_CHDIV_MASK (0xff << TWI_CWGR_CHDIV_SHIFT) +#define TWI_CWGR_CHDIV(value) ((TWI_CWGR_CHDIV_MASK & ((value) << TWI_CWGR_CHDIV_SHIFT))) +#define TWI_CWGR_CKDIV_SHIFT 16 +#define TWI_CWGR_CKDIV_MASK (0x7 << TWI_CWGR_CKDIV_SHIFT) +#define TWI_CWGR_CKDIV(value) ((TWI_CWGR_CKDIV_MASK & ((value) << TWI_CWGR_CKDIV_SHIFT))) +/*\}*/ + +/** + * TWI_SR: (TWI Offset: 0x20) Status Register + */ +/*\{*/ +#define TWI_SR_TXCOMP BV(0) +#define TWI_SR_RXRDY BV(1) +#define TWI_SR_TXRDY BV(2) +#define TWI_SR_SVREAD BV(3) +#define TWI_SR_SVACC BV(4) +#define TWI_SR_GACC BV(5) +#define TWI_SR_OVRE BV(6) +#define TWI_SR_NACK BV(8) +#define TWI_SR_ARBLST BV(9) +#define TWI_SR_SCLWS BV(10) +#define TWI_SR_EOSACC BV(11) +#define TWI_SR_ENDRX BV(12) +#define TWI_SR_ENDTX BV(13) +#define TWI_SR_RXBUFF BV(14) +#define TWI_SR_TXBUFE BV(15) +/*\}*/ + +/** + * TWI_IER: (TWI Offset: 0x24) Interrupt Enable Register + */ +/*\{*/ +#define TWI_IER_TXCOMP BV(0) +#define TWI_IER_RXRDY BV(1) +#define TWI_IER_TXRDY BV(2) +#define TWI_IER_SVACC BV(4) +#define TWI_IER_GACC BV(5) +#define TWI_IER_OVRE BV(6) +#define TWI_IER_NACK BV(8) +#define TWI_IER_ARBLST BV(9) +#define TWI_IER_SCL_WS BV(10) +#define TWI_IER_EOSACC BV(11) +#define TWI_IER_ENDRX BV(12) +#define TWI_IER_ENDTX BV(13) +#define TWI_IER_RXBUFF BV(14) +#define TWI_IER_TXBUFE BV(15) +/*\}*/ + +/** + * TWI_IDR: (TWI Offset: 0x28) Interrupt Disable Register + */ +/*\{*/ +#define TWI_IDR_TXCOMP BV(0) +#define TWI_IDR_RXRDY BV(1) +#define TWI_IDR_TXRDY BV(2) +#define TWI_IDR_SVACC BV(4) +#define TWI_IDR_GACC BV(5) +#define TWI_IDR_OVRE BV(6) +#define TWI_IDR_NACK BV(8) +#define TWI_IDR_ARBLST BV(9) +#define TWI_IDR_SCL_WS BV(10) +#define TWI_IDR_EOSACC BV(11) +#define TWI_IDR_ENDRX BV(12) +#define TWI_IDR_ENDTX BV(13) +#define TWI_IDR_RXBUFF BV(14) +#define TWI_IDR_TXBUFE BV(15) +/*\}*/ + +/** + * TWI_IMR: (TWI Offset: 0x2C) Interrupt Mask Register + */ +/*\{*/ +#define TWI_IMR_TXCOMP BV(0) +#define TWI_IMR_RXRDY BV(1) +#define TWI_IMR_TXRDY BV(2) +#define TWI_IMR_SVACC BV(4) +#define TWI_IMR_GACC BV(5) +#define TWI_IMR_OVRE BV(6) +#define TWI_IMR_NACK BV(8) +#define TWI_IMR_ARBLST BV(9) +#define TWI_IMR_SCL_WS BV(10) +#define TWI_IMR_EOSACC BV(11) +#define TWI_IMR_ENDRX BV(12) +#define TWI_IMR_ENDTX BV(13) +#define TWI_IMR_RXBUFF BV(14) +#define TWI_IMR_TXBUFE BV(15) +/*\}*/ + +/** + * TWI_RHR: (TWI Offset: 0x30) Receive Holding Register + */ +/*\{*/ +#define TWI_RHR_RXDATA_SHIFT 0 +#define TWI_RHR_RXDATA_MASK (0xff << TWI_RHR_RXDATA_SHIFT) +/*\}*/ + +/** + * TWI_THR: (TWI Offset: 0x34) Transmit Holding Register + */ +/*\{*/ +#define TWI_THR_TXDATA_SHIFT 0 +#define TWI_THR_TXDATA_MASK (0xff << TWI_THR_TXDATA_SHIFT) +#define TWI_THR_TXDATA(value) ((TWI_THR_TXDATA_MASK & ((value) << TWI_THR_TXDATA_SHIFT))) +/*\}*/ + +/** + * TWI_RPR: (TWI Offset: 0x100) Receive Pointer Register + */ +/*\{*/ +#define TWI_RPR_RXPTR_SHIFT 0 +#define TWI_RPR_RXPTR_MASK (0xffffffff << TWI_RPR_RXPTR_SHIFT) +#define TWI_RPR_RXPTR(value) ((TWI_RPR_RXPTR_MASK & ((value) << TWI_RPR_RXPTR_SHIFT))) +/*\}*/ + +/** + * TWI_RCR: (TWI Offset: 0x104) Receive Counter Register + */ +/*\{*/ +#define TWI_RCR_RXCTR_SHIFT 0 +#define TWI_RCR_RXCTR_MASK (0xffff << TWI_RCR_RXCTR_SHIFT) +#define TWI_RCR_RXCTR(value) ((TWI_RCR_RXCTR_MASK & ((value) << TWI_RCR_RXCTR_SHIFT))) +/*\}*/ + +/** + * TWI_TPR: (TWI Offset: 0x108) Transmit Pointer Register + */ +/*\{*/ +#define TWI_TPR_TXPTR_SHIFT 0 +#define TWI_TPR_TXPTR_MASK (0xffffffff << TWI_TPR_TXPTR_SHIFT) +#define TWI_TPR_TXPTR(value) ((TWI_TPR_TXPTR_MASK & ((value) << TWI_TPR_TXPTR_SHIFT))) +/*\}*/ + +/** + * TWI_TCR: (TWI Offset: 0x10C) Transmit Counter Register + */ +/*\{*/ +#define TWI_TCR_TXCTR_SHIFT 0 +#define TWI_TCR_TXCTR_MASK (0xffff << TWI_TCR_TXCTR_SHIFT) +#define TWI_TCR_TXCTR(value) ((TWI_TCR_TXCTR_MASK & ((value) << TWI_TCR_TXCTR_SHIFT))) +/*\}*/ + +/** + * TWI_RNPR: (TWI Offset: 0x110) Receive Next Pointer Register + */ +/*\{*/ +#define TWI_RNPR_RXNPTR_SHIFT 0 +#define TWI_RNPR_RXNPTR_MASK (0xffffffff << TWI_RNPR_RXNPTR_SHIFT) +#define TWI_RNPR_RXNPTR(value) ((TWI_RNPR_RXNPTR_MASK & ((value) << TWI_RNPR_RXNPTR_SHIFT))) +/*\}*/ + +/** + * TWI_RNCR: (TWI Offset: 0x114) Receive Next Counter Register + */ +/*\{*/ +#define TWI_RNCR_RXNCTR_SHIFT 0 +#define TWI_RNCR_RXNCTR_MASK (0xffff << TWI_RNCR_RXNCTR_SHIFT) +#define TWI_RNCR_RXNCTR(value) ((TWI_RNCR_RXNCTR_MASK & ((value) << TWI_RNCR_RXNCTR_SHIFT))) +/*\}*/ + +/** + * TWI_TNPR: (TWI Offset: 0x118) Transmit Next Pointer Register + */ +/*\{*/ +#define TWI_TNPR_TXNPTR_SHIFT 0 +#define TWI_TNPR_TXNPTR_MASK (0xffffffff << TWI_TNPR_TXNPTR_SHIFT) +#define TWI_TNPR_TXNPTR(value) ((TWI_TNPR_TXNPTR_MASK & ((value) << TWI_TNPR_TXNPTR_SHIFT))) +/*\}*/ + +/** + * TWI_TNCR: (TWI Offset: 0x11C) Transmit Next Counter Register + */ +/*\{*/ +#define TWI_TNCR_TXNCTR_SHIFT 0 +#define TWI_TNCR_TXNCTR_MASK (0xffff << TWI_TNCR_TXNCTR_SHIFT) +#define TWI_TNCR_TXNCTR(value) ((TWI_TNCR_TXNCTR_MASK & ((value) << TWI_TNCR_TXNCTR_SHIFT))) +/*\}*/ + +/** + * TWI_PTCR: (TWI Offset: 0x120) Transfer Control Register + */ +/*\{*/ +#define TWI_PTCR_RXTEN BV(0) +#define TWI_PTCR_RXTDIS BV(1) +#define TWI_PTCR_TXTEN BV(8) +#define TWI_PTCR_TXTDIS BV(9) +/*\}*/ + +/** + * TWI_PTSR: (TWI Offset: 0x124) Transfer Status Register + */ +/*\{*/ +#define TWI_PTSR_RXTEN BV(0) +#define TWI_PTSR_TXTEN BV(8) +/*\}*/ + +#endif /* SAM3_TWI_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_uart.h b/bertos/cpu/cortex-m3/io/sam3_uart.h new file mode 100644 index 0000000..97ad3ff --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_uart.h @@ -0,0 +1,336 @@ +/** + * \file + * + * + * \brief SAM3 UART hardware. + */ + +#ifndef SAM3_UART_H +#define SAM3_UART_H + +/** + * UART registers base addresses. + */ +/*\{*/ +#if CPU_CM3_SAM3N + #define UART0_BASE 0x400E0600 +#elif CPU_CM3_SAM3U + #define UART0_BASE 0x400E0600 + #define UART1_BASE 0x400E0800 +#elif CPU_CM3_SAM3X + #define UART0_BASE 0x400E0800 +#endif +/*\}*/ + +/** + * UART register offsets. + */ +/*\{*/ +#define UART_CR_OFF 0x000 //< Control Register +#define UART_MR_OFF 0x004 //< Mode Register +#define UART_IER_OFF 0x008 //< Interrupt Enable Register +#define UART_IDR_OFF 0x00C //< Interrupt Disable Register +#define UART_IMR_OFF 0x010 //< Interrupt Mask Register +#define UART_SR_OFF 0x014 //< Status Register +#define UART_RHR_OFF 0x018 //< Receive Holding Register +#define UART_THR_OFF 0x01C //< Transmit Holding Register +#define UART_BRGR_OFF 0x020 //< Baud Rate Generator Register + +#define UART_RPR_OFF 0x100 //< Receive Pointer Register +#define UART_RCR_OFF 0x104 //< Receive Counter Register +#define UART_TPR_OFF 0x108 //< Transmit Pointer Register +#define UART_TCR_OFF 0x10C //< Transmit Counter Register +#define UART_RNPR_OFF 0x110 //< Receive Next Pointer Register +#define UART_RNCR_OFF 0x114 //< Receive Next Counter Register +#define UART_TNPR_OFF 0x118 //< Transmit Next Pointer Register +#define UART_TNCR_OFF 0x11C //< Transmit Next Counter Register +#define UART_PTCR_OFF 0x120 //< Transfer Control Register +#define UART_PTSR_OFF 0x124 //< Transfer Status Register +/*\}*/ + +/** + * UART register addresses. + */ +/*\{*/ +#if defined(UART0_BASE) + #define UART0_ACCESS(offset) (*((reg32_t *)(UART0_BASE + (offset)))) + + #define UART_CR UART0_ACCESS(UART_CR_OFF) //< Control Register + #define UART_MR UART0_ACCESS(UART_MR_OFF) //< Mode Register + #define UART_IER UART0_ACCESS(UART_IER_OFF) //< Interrupt Enable Register + #define UART_IDR UART0_ACCESS(UART_IDR_OFF) //< Interrupt Disable Register + #define UART_IMR UART0_ACCESS(UART_IMR_OFF) //< Interrupt Mask Register + #define UART_SR UART0_ACCESS(UART_SR_OFF) //< Status Register + #define UART_RHR UART0_ACCESS(UART_RHR_OFF) //< Receive Holding Register + #define UART_THR UART0_ACCESS(UART_THR_OFF) //< Transmit Holding Register + #define UART_BRGR UART0_ACCESS(UART_BRGR_OFF) //< Baud Rate Generator Register + + #define UART_RPR UART0_ACCESS(UART_RPR_OFF) //< Receive Pointer Register + #define UART_RCR UART0_ACCESS(UART_RCR_OFF) //< Receive Counter Register + #define UART_TPR UART0_ACCESS(UART_TPR_OFF) //< Transmit Pointer Register + #define UART_TCR UART0_ACCESS(UART_TCR_OFF) //< Transmit Counter Register + #define UART_RNPR UART0_ACCESS(UART_RNPR_OFF) //< Receive Next Pointer Register + #define UART_RNCR UART0_ACCESS(UART_RNCR_OFF) //< Receive Next Counter Register + #define UART_TNPR UART0_ACCESS(UART_TNPR_OFF) //< Transmit Next Pointer Register + #define UART_TNCR UART0_ACCESS(UART_TNCR_OFF) //< Transmit Next Counter Register + #define UART_PTCR UART0_ACCESS(UART_PTCR_OFF) //< Transfer Control Register + #define UART_PTSR UART0_ACCESS(UART_PTSR_OFF) //< Transfer Status Register +#endif /* UART0_BASE */ + +#if defined(UART1_BASE) + #define UART1_ACCESS(offset) (*((reg32_t *)(UART1_BASE + (offset)))) + + #define UART_CR UART1_ACCESS(UART_CR_OFF) //< Control Register + #define UART_MR UART1_ACCESS(UART_MR_OFF) //< Mode Register + #define UART_IER UART1_ACCESS(UART_IER_OFF) //< Interrupt Enable Register + #define UART_IDR UART1_ACCESS(UART_IDR_OFF) //< Interrupt Disable Register + #define UART_IMR UART1_ACCESS(UART_IMR_OFF) //< Interrupt Mask Register + #define UART_SR UART1_ACCESS(UART_SR_OFF) //< Status Register + #define UART_RHR UART1_ACCESS(UART_RHR_OFF) //< Receive Holding Register + #define UART_THR UART1_ACCESS(UART_THR_OFF) //< Transmit Holding Register + #define UART_BRGR UART1_ACCESS(UART_BRGR_OFF) //< Baud Rate Generator Register + + #define UART_RPR UART1_ACCESS(UART_RPR_OFF) //< Receive Pointer Register + #define UART_RCR UART1_ACCESS(UART_RCR_OFF) //< Receive Counter Register + #define UART_TPR UART1_ACCESS(UART_TPR_OFF) //< Transmit Pointer Register + #define UART_TCR UART1_ACCESS(UART_TCR_OFF) //< Transmit Counter Register + #define UART_RNPR UART1_ACCESS(UART_RNPR_OFF) //< Receive Next Pointer Register + #define UART_RNCR UART1_ACCESS(UART_RNCR_OFF) //< Receive Next Counter Register + #define UART_TNPR UART1_ACCESS(UART_TNPR_OFF) //< Transmit Next Pointer Register + #define UART_TNCR UART1_ACCESS(UART_TNCR_OFF) //< Transmit Next Counter Register + #define UART_PTCR UART1_ACCESS(UART_PTCR_OFF) //< Transfer Control Register + #define UART_PTSR UART1_ACCESS(UART_PTSR_OFF) //< Transfer Status Register +#endif /* UART0_BASE */ +/*\}*/ + +/** + * Bit fields in the UART_CR register. + */ +/*\{*/ +#define UART_CR_RSTRX 2 //< Reset Receiver +#define UART_CR_RSTTX 3 //< Reset Transmitter +#define UART_CR_RXEN 4 //< Receiver Enable +#define UART_CR_RXDIS 5 //< Receiver Disable +#define UART_CR_TXEN 6 //< Transmitter Enable +#define UART_CR_TXDIS 7 //< Transmitter Disable +#define UART_CR_RSTSTA 8 //< Reset Status Bits +/*\}*/ + +/** + * Bit fields in the UART_MR register. + */ +/*\{*/ +#define UART_MR_PAR_SHIFT 9 //< Parity Type shift +#define UART_MR_PAR_MASK (0x7 << UART_MR_PAR_SHIFT) //< Parity Type mask +#define UART_MR_PAR_EVEN (0x0 << UART_MR_PAR_SHIFT) //< Even parity +#define UART_MR_PAR_ODD (0x1 << UART_MR_PAR_SHIFT) //< Odd parity +#define UART_MR_PAR_SPACE (0x2 << UART_MR_PAR_SHIFT) //< Space: parity forced to 0 +#define UART_MR_PAR_MARK (0x3 << UART_MR_PAR_SHIFT) //< Mark: parity forced to 1 +#define UART_MR_PAR_NO (0x4 << UART_MR_PAR_SHIFT) //< No parity +#define UART_MR_CHMODE_SHIFT 14 //< Channel Mode shift +#define UART_MR_CHMODE_MASK (0x3 << UART_MR_CHMODE_SHIFT) //< Channel Mode mask +#define UART_MR_CHMODE_NORMAL (0x0 << UART_MR_CHMODE_SHIFT) //< Normal Mode +#define UART_MR_CHMODE_AUTOMATIC (0x1 << UART_MR_CHMODE_SHIFT) //< Automatic Echo +#define UART_MR_CHMODE_LOCAL_LOOPBACK (0x2 << UART_MR_CHMODE_SHIFT) //< Local Loopback +#define UART_MR_CHMODE_REMOTE_LOOPBACK (0x3 << UART_MR_CHMODE_SHIFT) //< Remote Loopback +/*\}*/ + +/** + * Bit fields in the UART_IER register. + */ +/*\{*/ +#define UART_IER_RXRDY 0 //< Enable RXRDY Interrupt +#define UART_IER_TXRDY 1 //< Enable TXRDY Interrupt +#define UART_IER_ENDRX 3 //< Enable End of Receive Transfer Interrupt +#define UART_IER_ENDTX 4 //< Enable End of Transmit Interrupt +#define UART_IER_OVRE 5 //< Enable Overrun Error Interrupt +#define UART_IER_FRAME 6 //< Enable Framing Error Interrupt +#define UART_IER_PARE 7 //< Enable Parity Error Interrupt +#define UART_IER_TXEMPTY 9 //< Enable TXEMPTY Interrupt +#define UART_IER_TXBUFE 11 //< Enable Buffer Empty Interrupt +#define UART_IER_RXBUFF 12 //< Enable Buffer Full Interrupt +/*\}*/ + +/** + * Bit fields in the UART_IDR register. + */ +/*\{*/ +#define UART_IDR_RXRDY 0 //< Disable RXRDY Interrupt +#define UART_IDR_TXRDY 1 //< Disable TXRDY Interrupt +#define UART_IDR_ENDRX 3 //< Disable End of Receive Transfer Interrupt +#define UART_IDR_ENDTX 4 //< Disable End of Transmit Interrupt +#define UART_IDR_OVRE 5 //< Disable Overrun Error Interrupt +#define UART_IDR_FRAME 6 //< Disable Framing Error Interrupt +#define UART_IDR_PARE 7 //< Disable Parity Error Interrupt +#define UART_IDR_TXEMPTY 9 //< Disable TXEMPTY Interrupt +#define UART_IDR_TXBUFE 11 //< Disable Buffer Empty Interrupt +#define UART_IDR_RXBUFF 12 //< Disable Buffer Full Interrupt +/*\}*/ + +/** + * Bit fields in the UART_IMR register. + */ +/*\{*/ +#define UART_IMR_RXRDY 0 //< Mask RXRDY Interrupt +#define UART_IMR_TXRDY 1 //< Disable TXRDY Interrupt +#define UART_IMR_ENDRX 3 //< Mask End of Receive Transfer Interrupt +#define UART_IMR_ENDTX 4 //< Mask End of Transmit Interrupt +#define UART_IMR_OVRE 5 //< Mask Overrun Error Interrupt +#define UART_IMR_FRAME 6 //< Mask Framing Error Interrupt +#define UART_IMR_PARE 7 //< Mask Parity Error Interrupt +#define UART_IMR_TXEMPTY 9 //< Mask TXEMPTY Interrupt +#define UART_IMR_TXBUFE 11 //< Mask TXBUFE Interrupt +#define UART_IMR_RXBUFF 12 //< Mask RXBUFF Interrupt +/*\}*/ + +/** + * Bit fields in the UART_SR register. + */ +/*\{*/ +#define UART_SR_RXRDY 0 //< Receiver Ready +#define UART_SR_TXRDY 1 //< Transmitter Ready +#define UART_SR_ENDRX 3 //< End of Receiver Transfer +#define UART_SR_ENDTX 4 //< End of Transmitter Transfer +#define UART_SR_OVRE 5 //< Overrun Error +#define UART_SR_FRAME 6 //< Framing Error +#define UART_SR_PARE 7 //< Parity Error +#define UART_SR_TXEMPTY 9 //< Transmitter Empty +#define UART_SR_TXBUFE 11 //< Transmission Buffer Empty +#define UART_SR_RXBUFF 12 //< Receive Buffer Full +/*\}*/ + +/** + * Bit fields in the UART_RHR register. + */ +/*\{*/ +#define UART_RHR_RXCHR_MASK 0xFF //< Received Character mask +#define UART_RHR_RXCHR_SHIFT 0 //< Received Character shift +/*\}*/ + +/** + * Bit fields in the UART_THR register. + */ +/*\{*/ +#define UART_THR_TXCHR_MASK 0xFF //< Character to be Transmitted mask +#define UART_THR_TXCHR_SHIFT 0 //< Character to be Transmitted shift +/*\}*/ + +/** + * Bit fields in the UART_BRGR register. + */ +/*\{*/ +#define UART_BRGR_CD_MASK 0xFFFF //< Clock Divisor mask +#define UART_BRGR_CD_SHIFT 0 //< Clock Divisor shift +/*\}*/ + +/** + * Bit fields in the UART_RPR register. + */ +/*\{*/ +#define UART_RPR_RXPTR_MASK 0xFFFFFFFF //< Receive Pointer Register mask +#define UART_RPR_RXPTR_SHIFT 0 //< Receive Pointer Register shift +/*\}*/ + +/** + * Bit fields in the UART_RCR register. + */ +/*\{*/ +#define UART_RCR_RXCTR_MASK 0xFFFF //< Receive Counter Register mask +#define UART_RCR_RXCTR_SHIFT 0 //< Receive Counter Register shift +/*\}*/ + +/** + * Bit fields in the UART_TPR register. + */ +/*\{*/ +#define UART_TPR_TXPTR_MASK 0xFFFFFFFF //< Transmit Counter Register mask +#define UART_TPR_TXPTR_SHIFT 0 //< Transmit Counter Register shift +/*\}*/ + +/** + * Bit fields in the UART_TCR register. + */ +/*\{*/ +#define UART_TCR_TXCTR_MASK 0xFFFF //< Transmit Counter Register mask +#define UART_TCR_TXCTR_SHIFT 0 //< Transmit Counter Register shift +/*\}*/ + +/** + * Bit fields in the UART_RNPR register. + */ +/*\{*/ +#define UART_RNPR_RXNPTR_MASK 0xFFFFFFFF //< Receive Next Pointer mask +#define UART_RNPR_RXNPTR_SHIFT 0 //< Receive Next Pointer shift +/*\}*/ + +/** + * Bit fields in the UART_RNCR register. + */ +/*\{*/ +#define UART_RNCR_RXNCTR_MASK 0xFFFF //< Receive Next Counter mask +#define UART_RNCR_RXNCTR_SHIFT 0 //< Receive Next Counter shift +/*\}*/ + +/** + * Bit fields in the UART_TNPR register. + */ +/*\{*/ +#define UART_TNPR_TXNPTR_MASK 0xFFFFFFFF //< Transmit Next Pointer mask +#define UART_TNPR_TXNPTR_SHIFT 0 //< Transmit Next Pointer shift +/*\}*/ + +/** + * Bit fields in the UART_TNCR register. + */ +/*\{*/ +#define UART_TNCR_TXNCTR_MASK 0xFFFF //< Transmit Counter Next mask +#define UART_TNCR_TXNCTR_SHIFT 0 //< Transmit Counter Next shift +/*\}*/ + +/** + * Bit fields in the UART_PTCR register. + */ +/*\{*/ +#define UART_PTCR_RXTEN 0 //< Receiver Transfer Enable +#define UART_PTCR_RXTDIS 1 //< Receiver Transfer Disable +#define UART_PTCR_TXTEN 8 //< Transmitter Transfer Enable +#define UART_PTCR_TXTDIS 9 //< Transmitter Transfer Disable +/*\}*/ + +/** + * Bit fields in the UART_PTSR register. + */ +/*\{*/ +#define UART_PTSR_RXTEN 0 //< Receiver Transfer Enable +#define UART_PTSR_TXTEN 8 //< Transmitter Transfer Enable +/*\}*/ + +#endif /* SAM3_UART_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_usart.h b/bertos/cpu/cortex-m3/io/sam3_usart.h new file mode 100644 index 0000000..dd78c51 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_usart.h @@ -0,0 +1,361 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * Atmel SAM3 USART User interface. + * This file is based on NUT/OS implementation. See license below. + */ +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef SAM3_USART_H +#define SAM3_USART_H + +/** + * USART base addresses. + */ +#if CPU_CM3_SAM3N + #define USART0_BASE 0x40024000 + #define USART1_BASE 0x40028000 +#elif CPU_CM3_SAM3U + #define USART0_BASE 0x40090000 + #define USART1_BASE 0x40094000 + #define USART2_BASE 0x40098000 + #define USART3_BASE 0x4009C000 +#elif CPU_CM3_SAM3X + #define USART0_BASE 0x40098000 + #define USART1_BASE 0x4009C000 + #define USART2_BASE 0x400A0000 + #define USART3_BASE 0x400A4000 +#endif + +/** + * USART Control Register + */ +/*\{*/ +#define US_CR_OFF 0x00000000 ///< USART control register offset. +#define US0_CR (*((reg32_t *)(USART0_BASE + US_CR_OFF))) ///< Channel 0 control register address. +#define US1_CR (*((reg32_t *)(USART1_BASE + US_CR_OFF))) ///< Channel 1 control register address. +#define US_RSTRX 2 ///< Reset receiver. +#define US_RSTTX 3 ///< Reset transmitter. +#define US_RXEN 4 ///< Receiver enable. +#define US_RXDIS 5 ///< Receiver disable. +#define US_TXEN 6 ///< Transmitter enable. +#define US_TXDIS 7 ///< Transmitter disable. +#define US_RSTSTA 8 ///< Reset status bits. +#define US_STTBRK 9 ///< Start break. +#define US_STPBRK 10 ///< Stop break. +#define US_STTTO 11 ///< Start timeout. +#define US_SENDA 12 ///< Send next byte with address bit set. +#define US_RSTIT 13 ///< Reset interations. +#define US_RSTNAK 14 ///< Reset non acknowledge. +#define US_RETTO 15 ///< Rearm time out. +#define US_DTREN 16 ///< Data terminal ready enable. +#define US_DTRDIS 17 ///< Data terminal ready disable. +#define US_RTSEN 18 ///< Request to send enable. +#define US_RTSDIS 19 ///< Request to send disable. +/*\}*/ + +/** + * Mode Register + */ +/*\{*/ +#define US_MR_OFF 0x00000004 ///< USART mode register offset. +#define US0_MR (*((reg32_t *)(USART0_BASE + US_MR_OFF))) ///< Channel 0 mode register address. +#define US1_MR (*((reg32_t *)(USART1_BASE + US_MR_OFF))) ///< Channel 1 mode register address. + +#define US_USART_MODE_MASK 0x0000000F ///< USART mode mask. +#define US_USART_MODE_NORMA 0x00000000 ///< Normal. +#define US_USART_MODE_RS485 0x00000001 ///< RS485. +#define US_USART_MODE_HW_HDSH 0x00000002 ///< Hardware handshaking. +#define US_USART_MODE_MODEM 0x00000003 ///< Modem. +#define US_USART_MODE_ISO7816T0 0x00000004 ///< ISO7816 protocol: T=0. +#define US_USART_MODE_ISO7816T1 0x00000006 ///< ISO7816 protocol: T=1. +#define US_USART_MODE_IRDA 0x00000008 ///< IrDA. + +#define US_CLKS_MASK 0x00000030 ///< Clock selection mask. +#define US_CLKS_MCK 0x00000000 ///< Master clock. +#define US_CLKS_MCK8 0x00000010 ///< Master clock divided by 8. +#define US_CLKS_SCK 0x00000020 ///< External clock. +#define US_CLKS_SLCK 0x00000030 ///< Slow clock. + +#define US_CHRL_MASK 0x000000C0 ///< Masks data length. +#define US_CHRL_5 0x00000000 ///< 5 data bits. +#define US_CHRL_6 0x00000040 ///< 6 data bits. +#define US_CHRL_7 0x00000080 ///< 7 data bits. +#define US_CHRL_8 0x000000C0 ///< 8 data bits. + +#define US_SYNC 8 ///< Synchronous mode enable. + +#define US_PAR_MASK 0x00000E00 ///< Parity mode mask. +#define US_PAR_EVEN 0x00000000 ///< Even parity. +#define US_PAR_ODD 0x00000200 ///< Odd parity. +#define US_PAR_SPACE 0x00000400 ///< Space parity. +#define US_PAR_MARK 0x00000600 ///< Marked parity. +#define US_PAR_NO 0x00000800 ///< No parity. +#define US_PAR_MULTIDROP 0x00000C00 ///< Multi-drop mode. + +#define US_NBSTOP_MASK 0x00003000 ///< Masks stop bit length. +#define US_NBSTOP_1 0x00000000 ///< 1 stop bit. +#define US_NBSTOP_1_5 0x00001000 ///< 1.5 stop bits. +#define US_NBSTOP_2 0x00002000 ///< 2 stop bits. + +#define US_CHMODE_MASK 0x0000C000 ///< Channel mode mask. +#define US_CHMODE_NORMAL 0x00000000 ///< Normal mode. +#define US_CHMODE_AUTOMATIC_ECHO 0x00004000 ///< Automatic echo. +#define US_CHMODE_LOCAL_LOOPBACK 0x00008000 ///< Local loopback. +#define US_CHMODE_REMOTE_LOOPBACK 0x0000C000 ///< Remote loopback. + +#define US_MSBF 16 ///< Bit order. +#define US_MODE9 17 ///< 9 bit mode. +#define US_CLKO 18 ///< Clock output select. +#define US_OVER 19 ///< Oversampling mode. +#define US_INACK 20 ///< Inhibit non acknowledge. +#define US_DSNACK 21 ///< Disable successive nack. + +#define US_MAX_INTERATION_MASK 0x07000000 ///< Max numer of interation in mode ISO7816 T=0. + +#define US_FILTER 28 ///< Infrared receive line filter. + +/*\}*/ + +/** + * Status and Interrupt Register + */ +/*\{*/ +#define US_IER_OFF 0x00000008 ///< USART interrupt enable register offset. +#define US0_IER (*((reg32_t *)(USART0_BASE + US_IER_OFF))) ///< Channel 0 interrupt enable register address. +#define US1_IER (*((reg32_t *)(USART1_BASE + US_IER_OFF))) ///< Channel 1 interrupt enable register address. + +#define US_IDR_OFF 0x0000000C ///< USART interrupt disable register offset. +#define US0_IDR (*((reg32_t *)(USART0_BASE + US_IDR_OFF))) ///< Channel 0 interrupt disable register address. +#define US1_IDR (*((reg32_t *)(USART1_BASE + US_IDR_OFF))) ///< Channel 1 interrupt disable register address. + +#define US_IMR_OFF 0x00000010 ///< USART interrupt mask register offset. +#define US0_IMR (*((reg32_t *)(USART0_BASE + US_IMR_OFF))) ///< Channel 0 interrupt mask register address. +#define US1_IMR (*((reg32_t *)(USART1_BASE + US_IMR_OFF))) ///< Channel 1 interrupt mask register address. + +#define US_CSR_OFF 0x00000014 ///< USART status register offset. +#define US0_CSR (*((reg32_t *)(USART0_BASE + US_CSR_OFF))) ///< Channel 0 status register address. +#define US1_CSR (*((reg32_t *)(USART1_BASE + US_CSR_OFF))) ///< Channel 1 status register address. +#define US_CSR_RI 20 ///< Image of RI input. +#define US_CSR_DSR 21 ///< Image of DSR input. +#define US_CSR_DCD 22 ///< Image of DCD input. +#define US_CSR_CTS 23 ///< Image of CTS input. + +#define US_RXRDY 0 ///< Receiver ready. +#define US_TXRDY 1 ///< Transmitter ready. +#define US_RXBRK 2 ///< Receiver break. +#define US_ENDRX 3 ///< End of receiver PDC transfer. +#define US_ENDTX 4 ///< End of transmitter PDC transfer. +#define US_OVRE 5 ///< Overrun error. +#define US_FRAME 6 ///< Framing error. +#define US_PARE 7 ///< Parity error. +#define US_TIMEOUT 8 ///< Receiver timeout. +#define US_TXEMPTY 9 ///< Transmitter empty. +#define US_ITERATION 10 ///< Iteration interrupt enable. +#define US_TXBUFE 11 ///< Buffer empty interrupt enable. +#define US_RXBUFF 12 ///< Buffer full interrupt enable. +#define US_NACK 13 ///< Non acknowledge interrupt enable. +#define US_RIIC 16 ///< Ring indicator input change enable. +#define US_DSRIC 17 ///< Data set ready input change enable. +#define US_DCDIC 18 ///< Data carrier detect input change interrupt enable. +#define US_CTSIC 19 ///< Clear to send input change interrupt enable. + +/** + * Receiver Holding Register + */ +/*\{*/ +#define US_RHR_OFF 0x00000018 ///< USART receiver holding register offset. +#define US0_RHR (*((reg32_t *)(USART0_BASE + US_RHR_OFF))) ///< Channel 0 receiver holding register address. +#define US1_RHR (*((reg32_t *)(USART1_BASE + US_RHR_OFF))) ///< Channel 1 receiver holding register address. +#define US_RHR_RXCHR_MASK 0x000001FF ///< Last char received if US_RXRDY is set. +#define US_RHR_RXSYNH 15 ///< Received sync. +/*\}*/ + +/** + * Transmitter Holding Register + */ +/*\{*/ +#define US_THR_OFF 0x0000001C ///< USART transmitter holding register offset. +#define US0_THR (*((reg32_t *)(USART0_BASE + US_THR_OFF))) ///< Channel 0 transmitter holding register address. +#define US1_THR (*((reg32_t *)(USART1_BASE + US_THR_OFF))) ///< Channel 1 transmitter holding register address. +#define US_THR_TXCHR_MASK 0x000001FF ///< Next char to be trasmitted. +#define US_THR_TXSYNH 15 ///< Sync field to be trasmitted. +/*\}*/ + +/** + * Baud Rate Generator Register + */ +/*\{*/ +#define US_BRGR_OFF 0x00000020 ///< USART baud rate register offset. +#define US0_BRGR (*((reg32_t *)(USART0_BASE + US_BRGR_OFF))) ///< Channel 0 baud rate register address. +#define US1_BRGR (*((reg32_t *)(USART1_BASE + US_BRGR_OFF))) ///< Channel 1 baud rate register address. +/*\}*/ + +/** + * Receiver Timeout Register + */ +/*\{*/ +#define US_RTOR_OFF 0x00000024 ///< USART receiver timeout register offset. +#define US0_RTOR (*((reg32_t *)(USART0_BASE + US_RTOR_OFF))) ///< Channel 0 receiver timeout register address. +#define US1_RTOR (*((reg32_t *)(USART1_BASE + US_RTOR_OFF))) ///< Channel 1 receiver timeout register address. +/*\}*/ + +/** + * Transmitter Time Guard Register + */ +/*\{*/ +#define US_TTGR_OFF 0x00000028 ///< USART transmitter time guard register offset. +#define US0_TTGR (*((reg32_t *)(USART0_BASE + US_TTGR_OFF))) ///< Channel 0 transmitter time guard register address. +#define US1_TTGR (*((reg32_t *)(USART1_BASE + US_TTGR_OFF))) ///< Channel 1 transmitter time guard register address. +/*\}*/ + +/** + * FI DI Ratio Register +*/ +/*\{*/ +#define US_FIDI_OFF 0x00000040 ///< USART FI DI ratio register offset. +#define US0_FIDI (*((reg32_t *)(USART0_BASE + US_FIDI_OFF))) ///< Channel 0 FI DI ratio register address. +#define US1_FIDI (*((reg32_t *)(USART1_BASE + US_FIDI_OFF))) ///< Channel 1 FI DI ratio register address. +/*\}*/ + +/** + * Error Counter Register + */ +/*\{*/ +#define US_NER_OFF 0x00000044 ///< USART error counter register offset. +#define US0_NER (*((reg32_t *)(USART0_BASE + US_NER_OFF))) ///< Channel 0 error counter register address. +#define US1_NER (*((reg32_t *)(USART1_BASE + US_NER_OFF))) ///< Channel 1 error counter register address. +/*\}*/ + +/** + * IrDA Filter Register + */ +/*\{*/ +#define US_IF_OFF 0x0000004C ///< USART IrDA filter register offset. +#define US0_IF (*((reg32_t *)(USART0_BASE + US_IF_OFF))) ///< Channel 0 IrDA filter register address. +#define US1_IF (*((reg32_t *)(USART1_BASE + US_IF_OFF))) ///< Channel 1 IrDA filter register address. +/*\}*/ + +#if USART_HAS_PDC + + /** + * Receive Pointer Register + */ + /*\{*/ + #define US0_RPR (*((reg32_t *)(USART0_BASE + PERIPH_RPR_OFF))) ///< Channel 0 receive pointer register address. + #define US1_RPR (*((reg32_t *)(USART1_BASE + PERIPH_RPR_OFF))) ///< Channel 1 receive pointer register address. + /*\}*/ + + /** + * Receive Counter Register + */ + /*\{*/ + #define US0_RCR (*((reg32_t *)(USART0_BASE + PERIPH_RCR_OFF))) ///< Channel 0 receive counter register address. + #define US1_RCR (*((reg32_t *)(USART1_BASE + PERIPH_RCR_OFF))) ///< Channel 1 receive counter register address. + /*\}*/ + + /** + * Transmit Pointer Register + */ + /*\{*/ + #define US0_TPR (*((reg32_t *)(USART0_BASE + PERIPH_TPR_OFF))) ///< Channel 0 transmit pointer register address. + #define US1_TPR (*((reg32_t *)(USART1_BASE + PERIPH_TPR_OFF))) ///< Channel 1 transmit pointer register address. + /*\}*/ + + /** + * Transmit Counter Register + */ + /*\{*/ + #define US0_TCR (*((reg32_t *)(USART0_BASE + PERIPH_TCR_OFF))) ///< Channel 0 transmit counter register address. + #define US1_TCR (*((reg32_t *)(USART1_BASE + PERIPH_TCR_OFF))) ///< Channel 1 transmit counter register address. + /*\}*/ + + #if defined(PERIPH_RNPR_OFF) && defined(PERIPH_RNCR_OFF) + #define US0_RNPR (*((reg32_t *)(USART0_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 0 receive next pointer register. + #define US1_RNPR (*((reg32_t *)(USART1_BASE + PERIPH_RNPR_OFF))) ///< PDC channel 1 receive next pointer register. + #define US0_RNCR (*((reg32_t *)(USART0_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 0 receive next counter register. + #define US1_RNCR (*((reg32_t *)(USART1_BASE + PERIPH_RNCR_OFF))) ///< PDC channel 1 receive next counter register. + #endif + + #if defined(PERIPH_TNPR_OFF) && defined(PERIPH_TNCR_OFF) + #define US0_TNPR (*((reg32_t *)(USART0_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 0 transmit next pointer register. + #define US1_TNPR (*((reg32_t *)(USART1_BASE + PERIPH_TNPR_OFF))) ///< PDC channel 1 transmit next pointer register. + #define US0_TNCR (*((reg32_t *)(USART0_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 0 transmit next counter register. + #define US1_TNCR (*((reg32_t *)(USART1_BASE + PERIPH_TNCR_OFF))) ///< PDC channel 1 transmit next counter register. + #endif + + #if defined(PERIPH_PTCR_OFF) + #define US0_PTCR (*((reg32_t *)(USART0_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 0 transfer control register. + #define US1_PTCR (*((reg32_t *)(USART1_BASE + PERIPH_PTCR_OFF))) ///< PDC channel 1 transfer control register. + #endif + + #if defined(PERIPH_PTSR_OFF) + #define US0_PTSR (*((reg32_t *)(USART0_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 0 transfer status register. + #define US1_PTSR (*((reg32_t *)(USART1_BASE + PERIPH_PTSR_OFF))) ///< PDC channel 1 transfer status register. + #endif + +#endif /* USART_HAS_PDC */ + +#endif /* SAM3_USART_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3_wdt.h b/bertos/cpu/cortex-m3/io/sam3_wdt.h new file mode 100644 index 0000000..b57d06e --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3_wdt.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * Atmel SAM3 Watchdog. + * This file is based on NUT/OS implementation. See license below. + */ + + +/* + * Copyright (C) 2005-2006 by egnite Software GmbH. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the copyright holders nor the names of + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY EGNITE SOFTWARE GMBH AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL EGNITE + * SOFTWARE GMBH OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF + * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * For additional information see http://www.ethernut.de/ + */ + +#ifndef SAM3_WDT_H +#define SAM3_WDT_H + +/** Watch Dog registers base address */ +#if CPU_CM3_SAM3N + #define WDT_BASE 0x400E1450 +#elif CPU_CM3_SAM3X + #define WDT_BASE 0x400E1A50 +#endif + +/** Watch Dog Control Register */ +/*\{*/ +#define WDT_CR_OFF 0x00000000 ///< Watchdog control register offset. +#define WDT_CR (*((reg32_t *)(WDT_BASE + WDT_CR_OFF))) ///< Watchdog control register address. +#define WDT_WDRSTT 0 ///< Watchdog restart. +#define WDT_KEY 0xA5000000 ///< Watchdog password. +/*\}*/ + +/** Watch Dog Mode Register */ +/*\{*/ +#define WDT_MR_OFF 0x00000004 ///< Mode register offset. +#define WDT_MR (*((reg32_t *)(WDT_BASE + WDT_MR_OFF))) ///< Mode register address. +#define WDT_WDV_MASK 0x00000FFF ///< Counter value mask. +#define WDT_WDV_SHIFT 0 ///< Counter value LSB. +#define WDT_WDFIEN 12 ///< Fault interrupt enable. +#define WDT_WDRSTEN 13 ///< Reset enable. +#define WDT_WDRPROC 14 ///< Eset processor enable. +#define WDT_WDDIS 15 ///< Watchdog disable. +#define WDT_WDD_MASK 0x0FFF0000 ///< Delta value mask. +#define WDT_WDD_SHIFT 16 ///< Delta value LSB. +#define WDT_WDDBGHLT 28 ///< Watchdog debug halt. +#define WDT_WDIDLEHLT 29 ///< Watchdog idle halt. +/*\}*/ + +/** Watch Dog Status Register */ +/*\{*/ +#define WDT_SR_OFF 0x00000008 ///< Status register offset. +#define WDT_SR (*((reg32_t *)(WDT_BASE + WDT_SR_OFF))) ///< Status register address. +#define WDT_WDUNF 0 ///< Watchdog underflow. +#define WDT_WDERR 1 ///< Watchdog error. +/*\}*/ + +#endif /* SAM3_WDT_H */ diff --git a/bertos/cpu/cortex-m3/io/sam3n.h b/bertos/cpu/cortex-m3/io/sam3n.h new file mode 100644 index 0000000..f962142 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/sam3n.h @@ -0,0 +1,4349 @@ +/** + * \file + * + * + * \brief Atmel's SAM3 registers definitions. + * + * This file derives from the one included in Atmel softpack, and defines + * registers not yet written in standard BeRTOS include file (io/sam3_*.h) with + * some minor modifications for BeRTOS compatibility. + * You should normally use standard BeRTOS include file for register definitions + * (i.e. io/sam3.h, io/sam3_pio.h, io/sam3_uart.h, etc.) but in case you need + * register definitions for SAM3 hardware not yet supported by BeRTOS you + * can include this file. + */ + +/* ---------------------------------------------------------------------------- */ +/* Atmel Microcontroller Software Support */ +/* ---------------------------------------------------------------------------- */ +/* Copyright (c) 2010, Atmel Corporation */ +/* */ +/* All rights reserved. */ +/* */ +/* Redistribution and use in source and binary forms, with or without */ +/* modification, are permitted provided that the following condition is met: */ +/* */ +/* - Redistributions of source code must retain the above copyright notice, */ +/* this list of conditions and the disclaimer below. */ +/* */ +/* Atmel's name may not be used to endorse or promote products derived from */ +/* this software without specific prior written permission. */ +/* */ +/* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR */ +/* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF */ +/* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE */ +/* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, */ +/* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT */ +/* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, */ +/* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF */ +/* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING */ +/* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, */ +/* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ +/* ---------------------------------------------------------------------------- */ +/* */ +/* File Name : SAM3N.h */ +/* Object : SAM3N definitions */ +/* Generated by : AT91 SW Application Group */ +/* Generated on : 2010-09-06 */ + +#ifndef SAM3N_H +#define SAM3N_H + +/* SAM3N_definitions SAM3N definitions + This file defines all structures and symbols for SAM3N: + - registers and bitfields + - peripheral base address + - peripheral ID + - PIO definitions +*/ + +#ifdef __cplusplus + extern "C" { +#endif + +#ifndef __ASSEMBLY__ +#include +#ifndef __cplusplus +typedef volatile const uint32_t RoReg; /* Read only 32-bit register (volatile const unsigned int) */ +#else +typedef volatile uint32_t RoReg; /* Read only 32-bit register (volatile const unsigned int) */ +#endif +typedef volatile uint32_t WoReg; /* Write only 32-bit register (volatile unsigned int) */ +typedef volatile uint32_t RwReg; /* Read-Write 32-bit register (volatile unsigned int) */ +#define CAST(type, value) ((type *) value) +#define REG_ACCESS(type, address) (*(type*)address) /* C code: Register value */ +#else +#define CAST(type, value) (value) +#define REG_ACCESS(type, address) (address) /* Assembly code: Register address */ +#endif + +/* ************************************************************************** */ +/* CMSIS DEFINITIONS FOR SAM3N */ +/* ************************************************************************** */ + +/* Interrupt Number Definition */ +typedef enum IRQn +{ +/****** Cortex-M3 Processor Exceptions Numbers ******************************/ + NonMaskableInt_IRQn = -14, /* 2 Non Maskable Interrupt */ + MemoryManagement_IRQn = -12, /* 4 Cortex-M3 Memory Management Interrupt */ + BusFault_IRQn = -11, /* 5 Cortex-M3 Bus Fault Interrupt */ + UsageFault_IRQn = -10, /* 6 Cortex-M3 Usage Fault Interrupt */ + SVCall_IRQn = -5, /* 11 Cortex-M3 SV Call Interrupt */ + DebugMonitor_IRQn = -4, /* 12 Cortex-M3 Debug Monitor Interrupt */ + PendSV_IRQn = -2, /* 14 Cortex-M3 Pend SV Interrupt */ + SysTick_IRQn = -1, /* 15 Cortex-M3 System Tick Interrupt */ +/****** SAM3N specific Interrupt Numbers *********************************/ + + SUPC_IRQn = 0, /* 0 SAM3N Supply Controller (SUPC) */ + RSTC_IRQn = 1, /* 1 SAM3N Reset Controller (RSTC) */ + RTC_IRQn = 2, /* 2 SAM3N Real Time Clock (RTC) */ + RTT_IRQn = 3, /* 3 SAM3N Real Time Timer (RTT) */ + WDT_IRQn = 4, /* 4 SAM3N Watchdog Timer (WDT) */ + PMC_IRQn = 5, /* 5 SAM3N Power Management Controller (PMC) */ + EFC_IRQn = 6, /* 6 SAM3N Enhanced Flash Controller (EFC) */ + UART0_IRQn = 8, /* 8 SAM3N UART 0 (UART0) */ + UART1_IRQn = 9, /* 9 SAM3N UART 1 (UART1) */ + PIOA_IRQn = 11, /* 11 SAM3N Parallel I/O Controller A (PIOA) */ + PIOB_IRQn = 12, /* 12 SAM3N Parallel I/O Controller B (PIOB) */ + PIOC_IRQn = 13, /* 13 SAM3N Parallel I/O Controller C (PIOC) */ + USART0_IRQn = 14, /* 14 SAM3N USART 0 (USART0) */ + USART1_IRQn = 15, /* 15 SAM3N USART 1 (USART1) */ + TWI0_IRQn = 19, /* 19 SAM3N Two Wire Interface 0 (TWI0) */ + TWI1_IRQn = 20, /* 20 SAM3N Two Wire Interface 1 (TWI1) */ + SPI_IRQn = 21, /* 21 SAM3N Serial Peripheral Interface (SPI) */ + TC0_IRQn = 23, /* 23 SAM3N Timer/Counter 0 (TC0) */ + TC1_IRQn = 24, /* 24 SAM3N Timer/Counter 1 (TC1) */ + TC2_IRQn = 25, /* 25 SAM3N Timer/Counter 2 (TC2) */ + TC3_IRQn = 26, /* 26 SAM3N Timer/Counter 3 (TC3) */ + TC4_IRQn = 27, /* 27 SAM3N Timer/Counter 4 (TC4) */ + TC5_IRQn = 28, /* 28 SAM3N Timer/Counter 5 (TC5) */ + ADC_IRQn = 29, /* 29 SAM3N Analog To Digital Converter (ADC) */ + DACC_IRQn = 30, /* 30 SAM3N Digital To Analog Converter (DACC) */ + PWM_IRQn = 31 /* 31 SAM3N Pulse Width Modulation (PWM) */ +} IRQn_Type; + +/* + * Configuration of the Cortex-M3 Processor and Core Peripherals + */ + +#define __MPU_PRESENT 0 /* $product does not provide a MPU */ +#define __NVIC_PRIO_BITS 4 /* $product uses 4 Bits for the Priority Levels */ +#define __Vendor_SysTickConfig 0 /* Set to 1 if different SysTick Config is used */ + + +/* ************************************************************************** */ +/* SOFTWARE PERIPHERAL API DEFINITION FOR SAM3N */ +/* ************************************************************************** */ +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Analog-to-digital Converter */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Adc hardware registers */ +typedef struct { + WoReg ADC_CR; /* (Adc Offset: 0x00) Control Register */ + RwReg ADC_MR; /* (Adc Offset: 0x04) Mode Register */ + RwReg ADC_SEQR1; /* (Adc Offset: 0x08) Channel Sequence Register 1 */ + RwReg ADC_SEQR2; /* (Adc Offset: 0x0C) Channel Sequence Register 2 */ + WoReg ADC_CHER; /* (Adc Offset: 0x10) Channel Enable Register */ + WoReg ADC_CHDR; /* (Adc Offset: 0x14) Channel Disable Register */ + RoReg ADC_CHSR; /* (Adc Offset: 0x18) Channel Status Register */ + RwReg Reserved1[1]; + RoReg ADC_LCDR; /* (Adc Offset: 0x20) Last Converted Data Register */ + WoReg ADC_IER; /* (Adc Offset: 0x24) Interrupt Enable Register */ + WoReg ADC_IDR; /* (Adc Offset: 0x28) Interrupt Disable Register */ + RoReg ADC_IMR; /* (Adc Offset: 0x2C) Interrupt Mask Register */ + RoReg ADC_ISR; /* (Adc Offset: 0x30) Interrupt Status Register */ + RwReg Reserved2[2]; + RoReg ADC_OVER; /* (Adc Offset: 0x3C) Overrun Status Register */ + RwReg ADC_EMR; /* (Adc Offset: 0x40) Extended Mode Register */ + RwReg ADC_CWR; /* (Adc Offset: 0x44) Compare Window Register */ + RwReg Reserved3[2]; + RoReg ADC_CDR[16]; /* (Adc Offset: 0x50) Channel Data Register */ + RwReg Reserved4[21]; + RwReg ADC_WPMR; /* (Adc Offset: 0xE4) Write Protect Mode Register */ + RoReg ADC_WPSR; /* (Adc Offset: 0xE8) Write Protect Status Register */ + RwReg Reserved5[5]; + RwReg ADC_RPR; /* (Adc Offset: 0x100) Receive Pointer Register */ + RwReg ADC_RCR; /* (Adc Offset: 0x104) Receive Counter Register */ + RwReg ADC_TPR; /* (Adc Offset: 0x108) Transmit Pointer Register */ + RwReg ADC_TCR; /* (Adc Offset: 0x10C) Transmit Counter Register */ + RwReg ADC_RNPR; /* (Adc Offset: 0x110) Receive Next Pointer Register */ + RwReg ADC_RNCR; /* (Adc Offset: 0x114) Receive Next Counter Register */ + RwReg ADC_TNPR; /* (Adc Offset: 0x118) Transmit Next Pointer Register */ + RwReg ADC_TNCR; /* (Adc Offset: 0x11C) Transmit Next Counter Register */ + WoReg ADC_PTCR; /* (Adc Offset: 0x120) Transfer Control Register */ + RoReg ADC_PTSR; /* (Adc Offset: 0x124) Transfer Status Register */ +} Adc; +#endif /* __ASSEMBLY__ */ +/* -------- ADC_CR : (ADC Offset: 0x00) Control Register -------- */ +#define ADC_CR_SWRST (0x1u << 0) /* (ADC_CR) Software Reset */ +#define ADC_CR_START (0x1u << 1) /* (ADC_CR) Start Conversion */ +/* -------- ADC_MR : (ADC Offset: 0x04) Mode Register -------- */ +#define ADC_MR_TRGEN (0x1u << 0) /* (ADC_MR) Trigger Enable */ +#define ADC_MR_TRGEN_DIS (0x0u << 0) /* (ADC_MR) Hardware triggers are disabled. Starting a conversion is only possible by software. */ +#define ADC_MR_TRGEN_EN (0x1u << 0) /* (ADC_MR) Hardware trigger selected by TRGSEL field is enabled. */ +#define ADC_MR_TRGSEL_Pos 1 +#define ADC_MR_TRGSEL_Msk (0x7u << ADC_MR_TRGSEL_Pos) /* (ADC_MR) Trigger Selection */ +#define ADC_MR_TRGSEL_ADC_TRIG0 (0x0u << 1) /* (ADC_MR) External trigger */ +#define ADC_MR_TRGSEL_ADC_TRIG1 (0x1u << 1) /* (ADC_MR) TIO Output of the Timer Counter Channel 0 */ +#define ADC_MR_TRGSEL_ADC_TRIG2 (0x2u << 1) /* (ADC_MR) TIO Output of the Timer Counter Channel 1 */ +#define ADC_MR_TRGSEL_ADC_TRIG3 (0x3u << 1) /* (ADC_MR) TIO Output of the Timer Counter Channel 2 */ +#define ADC_MR_LOWRES (0x1u << 4) /* (ADC_MR) Resolution */ +#define ADC_MR_LOWRES_BITS_10 (0x0u << 4) /* (ADC_MR) 10-bit resolution */ +#define ADC_MR_LOWRES_BITS_8 (0x1u << 4) /* (ADC_MR) 8-bit resolution */ +#define ADC_MR_SLEEP (0x1u << 5) /* (ADC_MR) Sleep Mode */ +#define ADC_MR_SLEEP_NORMAL (0x0u << 5) /* (ADC_MR) Normal Mode: The ADC Core and reference voltage circuitry are kept ON between conversions */ +#define ADC_MR_SLEEP_SLEEP (0x1u << 5) /* (ADC_MR) Sleep Mode: The ADC Core and reference voltage circuitry are OFF between conversions */ +#define ADC_MR_FWUP (0x1u << 6) /* (ADC_MR) Fast Wake Up */ +#define ADC_MR_FWUP_OFF (0x0u << 6) /* (ADC_MR) Normal Sleep Mode: The sleep mode is defined by the SLEEP bit */ +#define ADC_MR_FWUP_ON (0x1u << 6) /* (ADC_MR) Fast Wake Up Sleep Mode: The Voltage reference is ON between conversions and ADC Core is OFF */ +#define ADC_MR_FREERUN (0x1u << 7) /* (ADC_MR) Free Run Mode */ +#define ADC_MR_FREERUN_OFF (0x0u << 7) /* (ADC_MR) Normal Mode */ +#define ADC_MR_FREERUN_ON (0x1u << 7) /* (ADC_MR) Free Run Mode: Never wait for any trigger. */ +#define ADC_MR_PRESCAL_Pos 8 +#define ADC_MR_PRESCAL_Msk (0xffu << ADC_MR_PRESCAL_Pos) /* (ADC_MR) Prescaler Rate Selection */ +#define ADC_MR_PRESCAL(value) ((ADC_MR_PRESCAL_Msk & ((value) << ADC_MR_PRESCAL_Pos))) +#define ADC_MR_STARTUP_Pos 16 +#define ADC_MR_STARTUP_Msk (0xfu << ADC_MR_STARTUP_Pos) /* (ADC_MR) Start Up Time */ +#define ADC_MR_STARTUP_SUT0 (0x0u << 16) /* (ADC_MR) 0 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT8 (0x1u << 16) /* (ADC_MR) 8 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT16 (0x2u << 16) /* (ADC_MR) 16 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT24 (0x3u << 16) /* (ADC_MR) 24 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT64 (0x4u << 16) /* (ADC_MR) 64 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT80 (0x5u << 16) /* (ADC_MR) 80 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT96 (0x6u << 16) /* (ADC_MR) 96 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT112 (0x7u << 16) /* (ADC_MR) 112 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT512 (0x8u << 16) /* (ADC_MR) 512 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT576 (0x9u << 16) /* (ADC_MR) 576 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT640 (0xAu << 16) /* (ADC_MR) 640 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT704 (0xBu << 16) /* (ADC_MR) 704 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT768 (0xCu << 16) /* (ADC_MR) 768 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT832 (0xDu << 16) /* (ADC_MR) 832 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT896 (0xEu << 16) /* (ADC_MR) 896 periods of ADCClock */ +#define ADC_MR_STARTUP_SUT960 (0xFu << 16) /* (ADC_MR) 960 periods of ADCClock */ +#define ADC_MR_TRACKTIM_Pos 24 +#define ADC_MR_TRACKTIM_Msk (0xfu << ADC_MR_TRACKTIM_Pos) /* (ADC_MR) Tracking Time */ +#define ADC_MR_TRACKTIM(value) ((ADC_MR_TRACKTIM_Msk & ((value) << ADC_MR_TRACKTIM_Pos))) +#define ADC_MR_USEQ (0x1u << 31) /* (ADC_MR) Use Sequence Enable */ +#define ADC_MR_USEQ_NUM_ORDER (0x0u << 31) /* (ADC_MR) Normal Mode: The controller converts channels in a simple numeric order. */ +#define ADC_MR_USEQ_REG_ORDER (0x1u << 31) /* (ADC_MR) User Sequence Mode: The sequence respects what is defined in ADC_SEQR1 and ADC_SEQR2 registers. */ +/* -------- ADC_SEQR1 : (ADC Offset: 0x08) Channel Sequence Register 1 -------- */ +#define ADC_SEQR1_USCH1_Pos 0 +#define ADC_SEQR1_USCH1_Msk (0xfu << ADC_SEQR1_USCH1_Pos) /* (ADC_SEQR1) User Sequence Number 1 */ +#define ADC_SEQR1_USCH1(value) ((ADC_SEQR1_USCH1_Msk & ((value) << ADC_SEQR1_USCH1_Pos))) +#define ADC_SEQR1_USCH2_Pos 4 +#define ADC_SEQR1_USCH2_Msk (0xfu << ADC_SEQR1_USCH2_Pos) /* (ADC_SEQR1) User Sequence Number 2 */ +#define ADC_SEQR1_USCH2(value) ((ADC_SEQR1_USCH2_Msk & ((value) << ADC_SEQR1_USCH2_Pos))) +#define ADC_SEQR1_USCH3_Pos 8 +#define ADC_SEQR1_USCH3_Msk (0xfu << ADC_SEQR1_USCH3_Pos) /* (ADC_SEQR1) User Sequence Number 3 */ +#define ADC_SEQR1_USCH3(value) ((ADC_SEQR1_USCH3_Msk & ((value) << ADC_SEQR1_USCH3_Pos))) +#define ADC_SEQR1_USCH4_Pos 12 +#define ADC_SEQR1_USCH4_Msk (0xfu << ADC_SEQR1_USCH4_Pos) /* (ADC_SEQR1) User Sequence Number 4 */ +#define ADC_SEQR1_USCH4(value) ((ADC_SEQR1_USCH4_Msk & ((value) << ADC_SEQR1_USCH4_Pos))) +#define ADC_SEQR1_USCH5_Pos 16 +#define ADC_SEQR1_USCH5_Msk (0xfu << ADC_SEQR1_USCH5_Pos) /* (ADC_SEQR1) User Sequence Number 5 */ +#define ADC_SEQR1_USCH5(value) ((ADC_SEQR1_USCH5_Msk & ((value) << ADC_SEQR1_USCH5_Pos))) +#define ADC_SEQR1_USCH6_Pos 20 +#define ADC_SEQR1_USCH6_Msk (0xfu << ADC_SEQR1_USCH6_Pos) /* (ADC_SEQR1) User Sequence Number 6 */ +#define ADC_SEQR1_USCH6(value) ((ADC_SEQR1_USCH6_Msk & ((value) << ADC_SEQR1_USCH6_Pos))) +#define ADC_SEQR1_USCH7_Pos 24 +#define ADC_SEQR1_USCH7_Msk (0xfu << ADC_SEQR1_USCH7_Pos) /* (ADC_SEQR1) User Sequence Number 7 */ +#define ADC_SEQR1_USCH7(value) ((ADC_SEQR1_USCH7_Msk & ((value) << ADC_SEQR1_USCH7_Pos))) +#define ADC_SEQR1_USCH8_Pos 28 +#define ADC_SEQR1_USCH8_Msk (0xfu << ADC_SEQR1_USCH8_Pos) /* (ADC_SEQR1) User Sequence Number 8 */ +#define ADC_SEQR1_USCH8(value) ((ADC_SEQR1_USCH8_Msk & ((value) << ADC_SEQR1_USCH8_Pos))) +/* -------- ADC_SEQR2 : (ADC Offset: 0x0C) Channel Sequence Register 2 -------- */ +#define ADC_SEQR2_USCH9_Pos 0 +#define ADC_SEQR2_USCH9_Msk (0xfu << ADC_SEQR2_USCH9_Pos) /* (ADC_SEQR2) User Sequence Number 9 */ +#define ADC_SEQR2_USCH9(value) ((ADC_SEQR2_USCH9_Msk & ((value) << ADC_SEQR2_USCH9_Pos))) +#define ADC_SEQR2_USCH10_Pos 4 +#define ADC_SEQR2_USCH10_Msk (0xfu << ADC_SEQR2_USCH10_Pos) /* (ADC_SEQR2) User Sequence Number 10 */ +#define ADC_SEQR2_USCH10(value) ((ADC_SEQR2_USCH10_Msk & ((value) << ADC_SEQR2_USCH10_Pos))) +#define ADC_SEQR2_USCH11_Pos 8 +#define ADC_SEQR2_USCH11_Msk (0xfu << ADC_SEQR2_USCH11_Pos) /* (ADC_SEQR2) User Sequence Number 11 */ +#define ADC_SEQR2_USCH11(value) ((ADC_SEQR2_USCH11_Msk & ((value) << ADC_SEQR2_USCH11_Pos))) +#define ADC_SEQR2_USCH12_Pos 12 +#define ADC_SEQR2_USCH12_Msk (0xfu << ADC_SEQR2_USCH12_Pos) /* (ADC_SEQR2) User Sequence Number 12 */ +#define ADC_SEQR2_USCH12(value) ((ADC_SEQR2_USCH12_Msk & ((value) << ADC_SEQR2_USCH12_Pos))) +#define ADC_SEQR2_USCH13_Pos 16 +#define ADC_SEQR2_USCH13_Msk (0xfu << ADC_SEQR2_USCH13_Pos) /* (ADC_SEQR2) User Sequence Number 13 */ +#define ADC_SEQR2_USCH13(value) ((ADC_SEQR2_USCH13_Msk & ((value) << ADC_SEQR2_USCH13_Pos))) +#define ADC_SEQR2_USCH14_Pos 20 +#define ADC_SEQR2_USCH14_Msk (0xfu << ADC_SEQR2_USCH14_Pos) /* (ADC_SEQR2) User Sequence Number 14 */ +#define ADC_SEQR2_USCH14(value) ((ADC_SEQR2_USCH14_Msk & ((value) << ADC_SEQR2_USCH14_Pos))) +#define ADC_SEQR2_USCH15_Pos 24 +#define ADC_SEQR2_USCH15_Msk (0xfu << ADC_SEQR2_USCH15_Pos) /* (ADC_SEQR2) User Sequence Number 15 */ +#define ADC_SEQR2_USCH15(value) ((ADC_SEQR2_USCH15_Msk & ((value) << ADC_SEQR2_USCH15_Pos))) +#define ADC_SEQR2_USCH16_Pos 28 +#define ADC_SEQR2_USCH16_Msk (0xfu << ADC_SEQR2_USCH16_Pos) /* (ADC_SEQR2) User Sequence Number 16 */ +#define ADC_SEQR2_USCH16(value) ((ADC_SEQR2_USCH16_Msk & ((value) << ADC_SEQR2_USCH16_Pos))) +/* -------- ADC_CHER : (ADC Offset: 0x10) Channel Enable Register -------- */ +#define ADC_CHER_CH0 (0x1u << 0) /* (ADC_CHER) Channel 0 Enable */ +#define ADC_CHER_CH1 (0x1u << 1) /* (ADC_CHER) Channel 1 Enable */ +#define ADC_CHER_CH2 (0x1u << 2) /* (ADC_CHER) Channel 2 Enable */ +#define ADC_CHER_CH3 (0x1u << 3) /* (ADC_CHER) Channel 3 Enable */ +#define ADC_CHER_CH4 (0x1u << 4) /* (ADC_CHER) Channel 4 Enable */ +#define ADC_CHER_CH5 (0x1u << 5) /* (ADC_CHER) Channel 5 Enable */ +#define ADC_CHER_CH6 (0x1u << 6) /* (ADC_CHER) Channel 6 Enable */ +#define ADC_CHER_CH7 (0x1u << 7) /* (ADC_CHER) Channel 7 Enable */ +#define ADC_CHER_CH8 (0x1u << 8) /* (ADC_CHER) Channel 8 Enable */ +#define ADC_CHER_CH9 (0x1u << 9) /* (ADC_CHER) Channel 9 Enable */ +#define ADC_CHER_CH10 (0x1u << 10) /* (ADC_CHER) Channel 10 Enable */ +#define ADC_CHER_CH11 (0x1u << 11) /* (ADC_CHER) Channel 11 Enable */ +#define ADC_CHER_CH12 (0x1u << 12) /* (ADC_CHER) Channel 12 Enable */ +#define ADC_CHER_CH13 (0x1u << 13) /* (ADC_CHER) Channel 13 Enable */ +#define ADC_CHER_CH14 (0x1u << 14) /* (ADC_CHER) Channel 14 Enable */ +#define ADC_CHER_CH15 (0x1u << 15) /* (ADC_CHER) Channel 15 Enable */ +/* -------- ADC_CHDR : (ADC Offset: 0x14) Channel Disable Register -------- */ +#define ADC_CHDR_CH0 (0x1u << 0) /* (ADC_CHDR) Channel 0 Disable */ +#define ADC_CHDR_CH1 (0x1u << 1) /* (ADC_CHDR) Channel 1 Disable */ +#define ADC_CHDR_CH2 (0x1u << 2) /* (ADC_CHDR) Channel 2 Disable */ +#define ADC_CHDR_CH3 (0x1u << 3) /* (ADC_CHDR) Channel 3 Disable */ +#define ADC_CHDR_CH4 (0x1u << 4) /* (ADC_CHDR) Channel 4 Disable */ +#define ADC_CHDR_CH5 (0x1u << 5) /* (ADC_CHDR) Channel 5 Disable */ +#define ADC_CHDR_CH6 (0x1u << 6) /* (ADC_CHDR) Channel 6 Disable */ +#define ADC_CHDR_CH7 (0x1u << 7) /* (ADC_CHDR) Channel 7 Disable */ +#define ADC_CHDR_CH8 (0x1u << 8) /* (ADC_CHDR) Channel 8 Disable */ +#define ADC_CHDR_CH9 (0x1u << 9) /* (ADC_CHDR) Channel 9 Disable */ +#define ADC_CHDR_CH10 (0x1u << 10) /* (ADC_CHDR) Channel 10 Disable */ +#define ADC_CHDR_CH11 (0x1u << 11) /* (ADC_CHDR) Channel 11 Disable */ +#define ADC_CHDR_CH12 (0x1u << 12) /* (ADC_CHDR) Channel 12 Disable */ +#define ADC_CHDR_CH13 (0x1u << 13) /* (ADC_CHDR) Channel 13 Disable */ +#define ADC_CHDR_CH14 (0x1u << 14) /* (ADC_CHDR) Channel 14 Disable */ +#define ADC_CHDR_CH15 (0x1u << 15) /* (ADC_CHDR) Channel 15 Disable */ +/* -------- ADC_CHSR : (ADC Offset: 0x18) Channel Status Register -------- */ +#define ADC_CHSR_CH0 (0x1u << 0) /* (ADC_CHSR) Channel 0 Status */ +#define ADC_CHSR_CH1 (0x1u << 1) /* (ADC_CHSR) Channel 1 Status */ +#define ADC_CHSR_CH2 (0x1u << 2) /* (ADC_CHSR) Channel 2 Status */ +#define ADC_CHSR_CH3 (0x1u << 3) /* (ADC_CHSR) Channel 3 Status */ +#define ADC_CHSR_CH4 (0x1u << 4) /* (ADC_CHSR) Channel 4 Status */ +#define ADC_CHSR_CH5 (0x1u << 5) /* (ADC_CHSR) Channel 5 Status */ +#define ADC_CHSR_CH6 (0x1u << 6) /* (ADC_CHSR) Channel 6 Status */ +#define ADC_CHSR_CH7 (0x1u << 7) /* (ADC_CHSR) Channel 7 Status */ +#define ADC_CHSR_CH8 (0x1u << 8) /* (ADC_CHSR) Channel 8 Status */ +#define ADC_CHSR_CH9 (0x1u << 9) /* (ADC_CHSR) Channel 9 Status */ +#define ADC_CHSR_CH10 (0x1u << 10) /* (ADC_CHSR) Channel 10 Status */ +#define ADC_CHSR_CH11 (0x1u << 11) /* (ADC_CHSR) Channel 11 Status */ +#define ADC_CHSR_CH12 (0x1u << 12) /* (ADC_CHSR) Channel 12 Status */ +#define ADC_CHSR_CH13 (0x1u << 13) /* (ADC_CHSR) Channel 13 Status */ +#define ADC_CHSR_CH14 (0x1u << 14) /* (ADC_CHSR) Channel 14 Status */ +#define ADC_CHSR_CH15 (0x1u << 15) /* (ADC_CHSR) Channel 15 Status */ +/* -------- ADC_LCDR : (ADC Offset: 0x20) Last Converted Data Register -------- */ +#define ADC_LCDR_LDATA_Pos 0 +#define ADC_LCDR_LDATA_Msk (0xfffu << ADC_LCDR_LDATA_Pos) /* (ADC_LCDR) Last Data Converted */ +#define ADC_LCDR_CHNB_Pos 12 +#define ADC_LCDR_CHNB_Msk (0xfu << ADC_LCDR_CHNB_Pos) /* (ADC_LCDR) Channel Number */ +/* -------- ADC_IER : (ADC Offset: 0x24) Interrupt Enable Register -------- */ +#define ADC_IER_EOC0 (0x1u << 0) /* (ADC_IER) End of Conversion Interrupt Enable 0 */ +#define ADC_IER_EOC1 (0x1u << 1) /* (ADC_IER) End of Conversion Interrupt Enable 1 */ +#define ADC_IER_EOC2 (0x1u << 2) /* (ADC_IER) End of Conversion Interrupt Enable 2 */ +#define ADC_IER_EOC3 (0x1u << 3) /* (ADC_IER) End of Conversion Interrupt Enable 3 */ +#define ADC_IER_EOC4 (0x1u << 4) /* (ADC_IER) End of Conversion Interrupt Enable 4 */ +#define ADC_IER_EOC5 (0x1u << 5) /* (ADC_IER) End of Conversion Interrupt Enable 5 */ +#define ADC_IER_EOC6 (0x1u << 6) /* (ADC_IER) End of Conversion Interrupt Enable 6 */ +#define ADC_IER_EOC7 (0x1u << 7) /* (ADC_IER) End of Conversion Interrupt Enable 7 */ +#define ADC_IER_EOC8 (0x1u << 8) /* (ADC_IER) End of Conversion Interrupt Enable 8 */ +#define ADC_IER_EOC9 (0x1u << 9) /* (ADC_IER) End of Conversion Interrupt Enable 9 */ +#define ADC_IER_EOC10 (0x1u << 10) /* (ADC_IER) End of Conversion Interrupt Enable 10 */ +#define ADC_IER_EOC11 (0x1u << 11) /* (ADC_IER) End of Conversion Interrupt Enable 11 */ +#define ADC_IER_EOC12 (0x1u << 12) /* (ADC_IER) End of Conversion Interrupt Enable 12 */ +#define ADC_IER_EOC13 (0x1u << 13) /* (ADC_IER) End of Conversion Interrupt Enable 13 */ +#define ADC_IER_EOC14 (0x1u << 14) /* (ADC_IER) End of Conversion Interrupt Enable 14 */ +#define ADC_IER_EOC15 (0x1u << 15) /* (ADC_IER) End of Conversion Interrupt Enable 15 */ +#define ADC_IER_DRDY (0x1u << 24) /* (ADC_IER) Data Ready Interrupt Enable */ +#define ADC_IER_GOVRE (0x1u << 25) /* (ADC_IER) General Overrun Error Interrupt Enable */ +#define ADC_IER_COMPE (0x1u << 26) /* (ADC_IER) Comparison Event Interrupt Enable */ +#define ADC_IER_ENDRX (0x1u << 27) /* (ADC_IER) End of Receive Buffer Interrupt Enable */ +#define ADC_IER_RXBUFF (0x1u << 28) /* (ADC_IER) Receive Buffer Full Interrupt Enable */ +/* -------- ADC_IDR : (ADC Offset: 0x28) Interrupt Disable Register -------- */ +#define ADC_IDR_EOC0 (0x1u << 0) /* (ADC_IDR) End of Conversion Interrupt Disable 0 */ +#define ADC_IDR_EOC1 (0x1u << 1) /* (ADC_IDR) End of Conversion Interrupt Disable 1 */ +#define ADC_IDR_EOC2 (0x1u << 2) /* (ADC_IDR) End of Conversion Interrupt Disable 2 */ +#define ADC_IDR_EOC3 (0x1u << 3) /* (ADC_IDR) End of Conversion Interrupt Disable 3 */ +#define ADC_IDR_EOC4 (0x1u << 4) /* (ADC_IDR) End of Conversion Interrupt Disable 4 */ +#define ADC_IDR_EOC5 (0x1u << 5) /* (ADC_IDR) End of Conversion Interrupt Disable 5 */ +#define ADC_IDR_EOC6 (0x1u << 6) /* (ADC_IDR) End of Conversion Interrupt Disable 6 */ +#define ADC_IDR_EOC7 (0x1u << 7) /* (ADC_IDR) End of Conversion Interrupt Disable 7 */ +#define ADC_IDR_EOC8 (0x1u << 8) /* (ADC_IDR) End of Conversion Interrupt Disable 8 */ +#define ADC_IDR_EOC9 (0x1u << 9) /* (ADC_IDR) End of Conversion Interrupt Disable 9 */ +#define ADC_IDR_EOC10 (0x1u << 10) /* (ADC_IDR) End of Conversion Interrupt Disable 10 */ +#define ADC_IDR_EOC11 (0x1u << 11) /* (ADC_IDR) End of Conversion Interrupt Disable 11 */ +#define ADC_IDR_EOC12 (0x1u << 12) /* (ADC_IDR) End of Conversion Interrupt Disable 12 */ +#define ADC_IDR_EOC13 (0x1u << 13) /* (ADC_IDR) End of Conversion Interrupt Disable 13 */ +#define ADC_IDR_EOC14 (0x1u << 14) /* (ADC_IDR) End of Conversion Interrupt Disable 14 */ +#define ADC_IDR_EOC15 (0x1u << 15) /* (ADC_IDR) End of Conversion Interrupt Disable 15 */ +#define ADC_IDR_DRDY (0x1u << 24) /* (ADC_IDR) Data Ready Interrupt Disable */ +#define ADC_IDR_GOVRE (0x1u << 25) /* (ADC_IDR) General Overrun Error Interrupt Disable */ +#define ADC_IDR_COMPE (0x1u << 26) /* (ADC_IDR) Comparison Event Interrupt Disable */ +#define ADC_IDR_ENDRX (0x1u << 27) /* (ADC_IDR) End of Receive Buffer Interrupt Disable */ +#define ADC_IDR_RXBUFF (0x1u << 28) /* (ADC_IDR) Receive Buffer Full Interrupt Disable */ +/* -------- ADC_IMR : (ADC Offset: 0x2C) Interrupt Mask Register -------- */ +#define ADC_IMR_EOC0 (0x1u << 0) /* (ADC_IMR) End of Conversion Interrupt Mask 0 */ +#define ADC_IMR_EOC1 (0x1u << 1) /* (ADC_IMR) End of Conversion Interrupt Mask 1 */ +#define ADC_IMR_EOC2 (0x1u << 2) /* (ADC_IMR) End of Conversion Interrupt Mask 2 */ +#define ADC_IMR_EOC3 (0x1u << 3) /* (ADC_IMR) End of Conversion Interrupt Mask 3 */ +#define ADC_IMR_EOC4 (0x1u << 4) /* (ADC_IMR) End of Conversion Interrupt Mask 4 */ +#define ADC_IMR_EOC5 (0x1u << 5) /* (ADC_IMR) End of Conversion Interrupt Mask 5 */ +#define ADC_IMR_EOC6 (0x1u << 6) /* (ADC_IMR) End of Conversion Interrupt Mask 6 */ +#define ADC_IMR_EOC7 (0x1u << 7) /* (ADC_IMR) End of Conversion Interrupt Mask 7 */ +#define ADC_IMR_EOC8 (0x1u << 8) /* (ADC_IMR) End of Conversion Interrupt Mask 8 */ +#define ADC_IMR_EOC9 (0x1u << 9) /* (ADC_IMR) End of Conversion Interrupt Mask 9 */ +#define ADC_IMR_EOC10 (0x1u << 10) /* (ADC_IMR) End of Conversion Interrupt Mask 10 */ +#define ADC_IMR_EOC11 (0x1u << 11) /* (ADC_IMR) End of Conversion Interrupt Mask 11 */ +#define ADC_IMR_EOC12 (0x1u << 12) /* (ADC_IMR) End of Conversion Interrupt Mask 12 */ +#define ADC_IMR_EOC13 (0x1u << 13) /* (ADC_IMR) End of Conversion Interrupt Mask 13 */ +#define ADC_IMR_EOC14 (0x1u << 14) /* (ADC_IMR) End of Conversion Interrupt Mask 14 */ +#define ADC_IMR_EOC15 (0x1u << 15) /* (ADC_IMR) End of Conversion Interrupt Mask 15 */ +#define ADC_IMR_DRDY (0x1u << 24) /* (ADC_IMR) Data Ready Interrupt Mask */ +#define ADC_IMR_GOVRE (0x1u << 25) /* (ADC_IMR) General Overrun Error Interrupt Mask */ +#define ADC_IMR_COMPE (0x1u << 26) /* (ADC_IMR) Comparison Event Interrupt Mask */ +#define ADC_IMR_ENDRX (0x1u << 27) /* (ADC_IMR) End of Receive Buffer Interrupt Mask */ +#define ADC_IMR_RXBUFF (0x1u << 28) /* (ADC_IMR) Receive Buffer Full Interrupt Mask */ +/* -------- ADC_ISR : (ADC Offset: 0x30) Interrupt Status Register -------- */ +#define ADC_ISR_EOC0 (0x1u << 0) /* (ADC_ISR) End of Conversion 0 */ +#define ADC_ISR_EOC1 (0x1u << 1) /* (ADC_ISR) End of Conversion 1 */ +#define ADC_ISR_EOC2 (0x1u << 2) /* (ADC_ISR) End of Conversion 2 */ +#define ADC_ISR_EOC3 (0x1u << 3) /* (ADC_ISR) End of Conversion 3 */ +#define ADC_ISR_EOC4 (0x1u << 4) /* (ADC_ISR) End of Conversion 4 */ +#define ADC_ISR_EOC5 (0x1u << 5) /* (ADC_ISR) End of Conversion 5 */ +#define ADC_ISR_EOC6 (0x1u << 6) /* (ADC_ISR) End of Conversion 6 */ +#define ADC_ISR_EOC7 (0x1u << 7) /* (ADC_ISR) End of Conversion 7 */ +#define ADC_ISR_EOC8 (0x1u << 8) /* (ADC_ISR) End of Conversion 8 */ +#define ADC_ISR_EOC9 (0x1u << 9) /* (ADC_ISR) End of Conversion 9 */ +#define ADC_ISR_EOC10 (0x1u << 10) /* (ADC_ISR) End of Conversion 10 */ +#define ADC_ISR_EOC11 (0x1u << 11) /* (ADC_ISR) End of Conversion 11 */ +#define ADC_ISR_EOC12 (0x1u << 12) /* (ADC_ISR) End of Conversion 12 */ +#define ADC_ISR_EOC13 (0x1u << 13) /* (ADC_ISR) End of Conversion 13 */ +#define ADC_ISR_EOC14 (0x1u << 14) /* (ADC_ISR) End of Conversion 14 */ +#define ADC_ISR_EOC15 (0x1u << 15) /* (ADC_ISR) End of Conversion 15 */ +#define ADC_ISR_DRDY (0x1u << 24) /* (ADC_ISR) Data Ready */ +#define ADC_ISR_GOVRE (0x1u << 25) /* (ADC_ISR) General Overrun Error */ +#define ADC_ISR_COMPE (0x1u << 26) /* (ADC_ISR) Comparison Error */ +#define ADC_ISR_ENDRX (0x1u << 27) /* (ADC_ISR) End of RX Buffer */ +#define ADC_ISR_RXBUFF (0x1u << 28) /* (ADC_ISR) RX Buffer Full */ +/* -------- ADC_OVER : (ADC Offset: 0x3C) Overrun Status Register -------- */ +#define ADC_OVER_OVRE0 (0x1u << 0) /* (ADC_OVER) Overrun Error 0 */ +#define ADC_OVER_OVRE1 (0x1u << 1) /* (ADC_OVER) Overrun Error 1 */ +#define ADC_OVER_OVRE2 (0x1u << 2) /* (ADC_OVER) Overrun Error 2 */ +#define ADC_OVER_OVRE3 (0x1u << 3) /* (ADC_OVER) Overrun Error 3 */ +#define ADC_OVER_OVRE4 (0x1u << 4) /* (ADC_OVER) Overrun Error 4 */ +#define ADC_OVER_OVRE5 (0x1u << 5) /* (ADC_OVER) Overrun Error 5 */ +#define ADC_OVER_OVRE6 (0x1u << 6) /* (ADC_OVER) Overrun Error 6 */ +#define ADC_OVER_OVRE7 (0x1u << 7) /* (ADC_OVER) Overrun Error 7 */ +#define ADC_OVER_OVRE8 (0x1u << 8) /* (ADC_OVER) Overrun Error 8 */ +#define ADC_OVER_OVRE9 (0x1u << 9) /* (ADC_OVER) Overrun Error 9 */ +#define ADC_OVER_OVRE10 (0x1u << 10) /* (ADC_OVER) Overrun Error 10 */ +#define ADC_OVER_OVRE11 (0x1u << 11) /* (ADC_OVER) Overrun Error 11 */ +#define ADC_OVER_OVRE12 (0x1u << 12) /* (ADC_OVER) Overrun Error 12 */ +#define ADC_OVER_OVRE13 (0x1u << 13) /* (ADC_OVER) Overrun Error 13 */ +#define ADC_OVER_OVRE14 (0x1u << 14) /* (ADC_OVER) Overrun Error 14 */ +#define ADC_OVER_OVRE15 (0x1u << 15) /* (ADC_OVER) Overrun Error 15 */ +/* -------- ADC_EMR : (ADC Offset: 0x40) Extended Mode Register -------- */ +#define ADC_EMR_CMPMODE_Pos 0 +#define ADC_EMR_CMPMODE_Msk (0x3u << ADC_EMR_CMPMODE_Pos) /* (ADC_EMR) Comparison Mode */ +#define ADC_EMR_CMPMODE_LOW (0x0u << 0) /* (ADC_EMR) Generates an event when the converted data is lower than the low threshold of the window. */ +#define ADC_EMR_CMPMODE_HIGH (0x1u << 0) /* (ADC_EMR) Generates an event when the converted data is higher than the high threshold of the window. */ +#define ADC_EMR_CMPMODE_IN (0x2u << 0) /* (ADC_EMR) Generates an event when the converted data is in the comparison window. */ +#define ADC_EMR_CMPMODE_OUT (0x3u << 0) /* (ADC_EMR) Generates an event when the converted data is out of the comparison window. */ +#define ADC_EMR_CMPSEL_Pos 4 +#define ADC_EMR_CMPSEL_Msk (0xfu << ADC_EMR_CMPSEL_Pos) /* (ADC_EMR) Comparison Selected Channel */ +#define ADC_EMR_CMPSEL(value) ((ADC_EMR_CMPSEL_Msk & ((value) << ADC_EMR_CMPSEL_Pos))) +#define ADC_EMR_CMPALL (0x1u << 9) /* (ADC_EMR) Compare All Channels */ +#define ADC_EMR_TAG (0x1u << 24) /* (ADC_EMR) TAG of ADC_LDCR register */ +/* -------- ADC_CWR : (ADC Offset: 0x44) Compare Window Register -------- */ +#define ADC_CWR_LOWTHRES_Pos 0 +#define ADC_CWR_LOWTHRES_Msk (0xfffu << ADC_CWR_LOWTHRES_Pos) /* (ADC_CWR) Low Threshold */ +#define ADC_CWR_LOWTHRES(value) ((ADC_CWR_LOWTHRES_Msk & ((value) << ADC_CWR_LOWTHRES_Pos))) +#define ADC_CWR_HIGHTHRES_Pos 16 +#define ADC_CWR_HIGHTHRES_Msk (0xfffu << ADC_CWR_HIGHTHRES_Pos) /* (ADC_CWR) High Threshold */ +#define ADC_CWR_HIGHTHRES(value) ((ADC_CWR_HIGHTHRES_Msk & ((value) << ADC_CWR_HIGHTHRES_Pos))) +/* -------- ADC_CDR[16] : (ADC Offset: 0x50) Channel Data Register -------- */ +#define ADC_CDR_DATA_Pos 0 +#define ADC_CDR_DATA_Msk (0x3ffu << ADC_CDR_DATA_Pos) /* (ADC_CDR[16]) Converted Data */ +/* -------- ADC_WPMR : (ADC Offset: 0xE4) Write Protect Mode Register -------- */ +#define ADC_WPMR_WPEN (0x1u << 0) /* (ADC_WPMR) Write Protect Enable */ +#define ADC_WPMR_WPKEY_Pos 8 +#define ADC_WPMR_WPKEY_Msk (0xffffffu << ADC_WPMR_WPKEY_Pos) /* (ADC_WPMR) Write Protect KEY */ +#define ADC_WPMR_WPKEY(value) ((ADC_WPMR_WPKEY_Msk & ((value) << ADC_WPMR_WPKEY_Pos))) +/* -------- ADC_WPSR : (ADC Offset: 0xE8) Write Protect Status Register -------- */ +#define ADC_WPSR_WPVS (0x1u << 0) /* (ADC_WPSR) Write Protect Violation Status */ +#define ADC_WPSR_WPVSRC_Pos 8 +#define ADC_WPSR_WPVSRC_Msk (0xffffu << ADC_WPSR_WPVSRC_Pos) /* (ADC_WPSR) Write Protect Violation Source */ +/* -------- ADC_RPR : (ADC Offset: 0x100) Receive Pointer Register -------- */ +#define ADC_RPR_RXPTR_Pos 0 +#define ADC_RPR_RXPTR_Msk (0xffffffffu << ADC_RPR_RXPTR_Pos) /* (ADC_RPR) Receive Pointer Register */ +#define ADC_RPR_RXPTR(value) ((ADC_RPR_RXPTR_Msk & ((value) << ADC_RPR_RXPTR_Pos))) +/* -------- ADC_RCR : (ADC Offset: 0x104) Receive Counter Register -------- */ +#define ADC_RCR_RXCTR_Pos 0 +#define ADC_RCR_RXCTR_Msk (0xffffu << ADC_RCR_RXCTR_Pos) /* (ADC_RCR) Receive Counter Register */ +#define ADC_RCR_RXCTR(value) ((ADC_RCR_RXCTR_Msk & ((value) << ADC_RCR_RXCTR_Pos))) +/* -------- ADC_TPR : (ADC Offset: 0x108) Transmit Pointer Register -------- */ +#define ADC_TPR_TXPTR_Pos 0 +#define ADC_TPR_TXPTR_Msk (0xffffffffu << ADC_TPR_TXPTR_Pos) /* (ADC_TPR) Transmit Counter Register */ +#define ADC_TPR_TXPTR(value) ((ADC_TPR_TXPTR_Msk & ((value) << ADC_TPR_TXPTR_Pos))) +/* -------- ADC_TCR : (ADC Offset: 0x10C) Transmit Counter Register -------- */ +#define ADC_TCR_TXCTR_Pos 0 +#define ADC_TCR_TXCTR_Msk (0xffffu << ADC_TCR_TXCTR_Pos) /* (ADC_TCR) Transmit Counter Register */ +#define ADC_TCR_TXCTR(value) ((ADC_TCR_TXCTR_Msk & ((value) << ADC_TCR_TXCTR_Pos))) +/* -------- ADC_RNPR : (ADC Offset: 0x110) Receive Next Pointer Register -------- */ +#define ADC_RNPR_RXNPTR_Pos 0 +#define ADC_RNPR_RXNPTR_Msk (0xffffffffu << ADC_RNPR_RXNPTR_Pos) /* (ADC_RNPR) Receive Next Pointer */ +#define ADC_RNPR_RXNPTR(value) ((ADC_RNPR_RXNPTR_Msk & ((value) << ADC_RNPR_RXNPTR_Pos))) +/* -------- ADC_RNCR : (ADC Offset: 0x114) Receive Next Counter Register -------- */ +#define ADC_RNCR_RXNCTR_Pos 0 +#define ADC_RNCR_RXNCTR_Msk (0xffffu << ADC_RNCR_RXNCTR_Pos) /* (ADC_RNCR) Receive Next Counter */ +#define ADC_RNCR_RXNCTR(value) ((ADC_RNCR_RXNCTR_Msk & ((value) << ADC_RNCR_RXNCTR_Pos))) +/* -------- ADC_TNPR : (ADC Offset: 0x118) Transmit Next Pointer Register -------- */ +#define ADC_TNPR_TXNPTR_Pos 0 +#define ADC_TNPR_TXNPTR_Msk (0xffffffffu << ADC_TNPR_TXNPTR_Pos) /* (ADC_TNPR) Transmit Next Pointer */ +#define ADC_TNPR_TXNPTR(value) ((ADC_TNPR_TXNPTR_Msk & ((value) << ADC_TNPR_TXNPTR_Pos))) +/* -------- ADC_TNCR : (ADC Offset: 0x11C) Transmit Next Counter Register -------- */ +#define ADC_TNCR_TXNCTR_Pos 0 +#define ADC_TNCR_TXNCTR_Msk (0xffffu << ADC_TNCR_TXNCTR_Pos) /* (ADC_TNCR) Transmit Counter Next */ +#define ADC_TNCR_TXNCTR(value) ((ADC_TNCR_TXNCTR_Msk & ((value) << ADC_TNCR_TXNCTR_Pos))) +/* -------- ADC_PTCR : (ADC Offset: 0x120) Transfer Control Register -------- */ +#define ADC_PTCR_RXTEN (0x1u << 0) /* (ADC_PTCR) Receiver Transfer Enable */ +#define ADC_PTCR_RXTDIS (0x1u << 1) /* (ADC_PTCR) Receiver Transfer Disable */ +#define ADC_PTCR_TXTEN (0x1u << 8) /* (ADC_PTCR) Transmitter Transfer Enable */ +#define ADC_PTCR_TXTDIS (0x1u << 9) /* (ADC_PTCR) Transmitter Transfer Disable */ +/* -------- ADC_PTSR : (ADC Offset: 0x124) Transfer Status Register -------- */ +#define ADC_PTSR_RXTEN (0x1u << 0) /* (ADC_PTSR) Receiver Transfer Enable */ +#define ADC_PTSR_TXTEN (0x1u << 8) /* (ADC_PTSR) Transmitter Transfer Enable */ + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Chip Identifier */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Chipid hardware registers */ +typedef struct { + RoReg CHIPID_CIDR; /* (Chipid Offset: 0x0) Chip ID Register */ + RoReg CHIPID_EXID; /* (Chipid Offset: 0x4) Chip ID Extension Register */ +} Chipid; +#endif /* __ASSEMBLY__ */ +/* -------- CHIPID_CIDR : (CHIPID Offset: 0x0) Chip ID Register -------- */ +#define CHIPID_CIDR_VERSION_Pos 0 +#define CHIPID_CIDR_VERSION_Msk (0x1fu << CHIPID_CIDR_VERSION_Pos) /* (CHIPID_CIDR) Version of the Device */ +#define CHIPID_CIDR_EPROC_Pos 5 +#define CHIPID_CIDR_EPROC_Msk (0x7u << CHIPID_CIDR_EPROC_Pos) /* (CHIPID_CIDR) Embedded Processor */ +#define CHIPID_CIDR_EPROC_ARM946ES (0x1u << 5) /* (CHIPID_CIDR) ARM946ES */ +#define CHIPID_CIDR_EPROC_ARM7TDMI (0x2u << 5) /* (CHIPID_CIDR) ARM7TDMI */ +#define CHIPID_CIDR_EPROC_CM3 (0x3u << 5) /* (CHIPID_CIDR) Cortex-M3 */ +#define CHIPID_CIDR_EPROC_ARM920T (0x4u << 5) /* (CHIPID_CIDR) ARM920T */ +#define CHIPID_CIDR_EPROC_ARM926EJS (0x5u << 5) /* (CHIPID_CIDR) ARM926EJS */ +#define CHIPID_CIDR_EPROC_CA5 (0x6u << 5) /* (CHIPID_CIDR) Cortex-A5 */ +#define CHIPID_CIDR_NVPSIZ_Pos 8 +#define CHIPID_CIDR_NVPSIZ_Msk (0xfu << CHIPID_CIDR_NVPSIZ_Pos) /* (CHIPID_CIDR) Nonvolatile Program Memory Size */ +#define CHIPID_CIDR_NVPSIZ_NONE (0x0u << 8) /* (CHIPID_CIDR) None */ +#define CHIPID_CIDR_NVPSIZ_8K (0x1u << 8) /* (CHIPID_CIDR) 8K bytes */ +#define CHIPID_CIDR_NVPSIZ_16K (0x2u << 8) /* (CHIPID_CIDR) 16K bytes */ +#define CHIPID_CIDR_NVPSIZ_32K (0x3u << 8) /* (CHIPID_CIDR) 32K bytes */ +#define CHIPID_CIDR_NVPSIZ_64K (0x5u << 8) /* (CHIPID_CIDR) 64K bytes */ +#define CHIPID_CIDR_NVPSIZ_128K (0x7u << 8) /* (CHIPID_CIDR) 128K bytes */ +#define CHIPID_CIDR_NVPSIZ_256K (0x9u << 8) /* (CHIPID_CIDR) 256K bytes */ +#define CHIPID_CIDR_NVPSIZ_512K (0xAu << 8) /* (CHIPID_CIDR) 512K bytes */ +#define CHIPID_CIDR_NVPSIZ_1024K (0xCu << 8) /* (CHIPID_CIDR) 1024K bytes */ +#define CHIPID_CIDR_NVPSIZ_2048K (0xEu << 8) /* (CHIPID_CIDR) 2048K bytes */ +#define CHIPID_CIDR_NVPSIZ2_Pos 12 +#define CHIPID_CIDR_NVPSIZ2_Msk (0xfu << CHIPID_CIDR_NVPSIZ2_Pos) /* (CHIPID_CIDR) */ +#define CHIPID_CIDR_NVPSIZ2_NONE (0x0u << 12) /* (CHIPID_CIDR) None */ +#define CHIPID_CIDR_NVPSIZ2_8K (0x1u << 12) /* (CHIPID_CIDR) 8K bytes */ +#define CHIPID_CIDR_NVPSIZ2_16K (0x2u << 12) /* (CHIPID_CIDR) 16K bytes */ +#define CHIPID_CIDR_NVPSIZ2_32K (0x3u << 12) /* (CHIPID_CIDR) 32K bytes */ +#define CHIPID_CIDR_NVPSIZ2_64K (0x5u << 12) /* (CHIPID_CIDR) 64K bytes */ +#define CHIPID_CIDR_NVPSIZ2_128K (0x7u << 12) /* (CHIPID_CIDR) 128K bytes */ +#define CHIPID_CIDR_NVPSIZ2_256K (0x9u << 12) /* (CHIPID_CIDR) 256K bytes */ +#define CHIPID_CIDR_NVPSIZ2_512K (0xAu << 12) /* (CHIPID_CIDR) 512K bytes */ +#define CHIPID_CIDR_NVPSIZ2_1024K (0xCu << 12) /* (CHIPID_CIDR) 1024K bytes */ +#define CHIPID_CIDR_NVPSIZ2_2048K (0xEu << 12) /* (CHIPID_CIDR) 2048K bytes */ +#define CHIPID_CIDR_SRAMSIZ_Pos 16 +#define CHIPID_CIDR_SRAMSIZ_Msk (0xfu << CHIPID_CIDR_SRAMSIZ_Pos) /* (CHIPID_CIDR) Internal SRAM Size */ +#define CHIPID_CIDR_SRAMSIZ_48K (0x0u << 16) /* (CHIPID_CIDR) 48K bytes */ +#define CHIPID_CIDR_SRAMSIZ_1K (0x1u << 16) /* (CHIPID_CIDR) 1K bytes */ +#define CHIPID_CIDR_SRAMSIZ_2K (0x2u << 16) /* (CHIPID_CIDR) 2K bytes */ +#define CHIPID_CIDR_SRAMSIZ_6K (0x3u << 16) /* (CHIPID_CIDR) 6K bytes */ +#define CHIPID_CIDR_SRAMSIZ_112K (0x4u << 16) /* (CHIPID_CIDR) 112K bytes */ +#define CHIPID_CIDR_SRAMSIZ_4K (0x5u << 16) /* (CHIPID_CIDR) 4K bytes */ +#define CHIPID_CIDR_SRAMSIZ_80K (0x6u << 16) /* (CHIPID_CIDR) 80K bytes */ +#define CHIPID_CIDR_SRAMSIZ_160K (0x7u << 16) /* (CHIPID_CIDR) 160K bytes */ +#define CHIPID_CIDR_SRAMSIZ_8K (0x8u << 16) /* (CHIPID_CIDR) 8K bytes */ +#define CHIPID_CIDR_SRAMSIZ_16K (0x9u << 16) /* (CHIPID_CIDR) 16K bytes */ +#define CHIPID_CIDR_SRAMSIZ_32K (0xAu << 16) /* (CHIPID_CIDR) 32K bytes */ +#define CHIPID_CIDR_SRAMSIZ_64K (0xBu << 16) /* (CHIPID_CIDR) 64K bytes */ +#define CHIPID_CIDR_SRAMSIZ_128K (0xCu << 16) /* (CHIPID_CIDR) 128K bytes */ +#define CHIPID_CIDR_SRAMSIZ_256K (0xDu << 16) /* (CHIPID_CIDR) 256K bytes */ +#define CHIPID_CIDR_SRAMSIZ_96K (0xEu << 16) /* (CHIPID_CIDR) 96K bytes */ +#define CHIPID_CIDR_SRAMSIZ_512K (0xFu << 16) /* (CHIPID_CIDR) 512K bytes */ +#define CHIPID_CIDR_ARCH_Pos 20 +#define CHIPID_CIDR_ARCH_Msk (0xffu << CHIPID_CIDR_ARCH_Pos) /* (CHIPID_CIDR) Architecture Identifier */ +#define CHIPID_CIDR_ARCH_AT91SAM9xx (0x19u << 20) /* (CHIPID_CIDR) AT91SAM9xx Series */ +#define CHIPID_CIDR_ARCH_AT91SAM9XExx (0x29u << 20) /* (CHIPID_CIDR) AT91SAM9XExx Series */ +#define CHIPID_CIDR_ARCH_AT91x34 (0x34u << 20) /* (CHIPID_CIDR) AT91x34 Series */ +#define CHIPID_CIDR_ARCH_CAP7 (0x37u << 20) /* (CHIPID_CIDR) CAP7 Series */ +#define CHIPID_CIDR_ARCH_CAP9 (0x39u << 20) /* (CHIPID_CIDR) CAP9 Series */ +#define CHIPID_CIDR_ARCH_CAP11 (0x3Bu << 20) /* (CHIPID_CIDR) CAP11 Series */ +#define CHIPID_CIDR_ARCH_AT91x40 (0x40u << 20) /* (CHIPID_CIDR) AT91x40 Series */ +#define CHIPID_CIDR_ARCH_AT91x42 (0x42u << 20) /* (CHIPID_CIDR) AT91x42 Series */ +#define CHIPID_CIDR_ARCH_AT91x55 (0x55u << 20) /* (CHIPID_CIDR) AT91x55 Series */ +#define CHIPID_CIDR_ARCH_AT91SAM7Axx (0x60u << 20) /* (CHIPID_CIDR) AT91SAM7Axx Series */ +#define CHIPID_CIDR_ARCH_AT91SAM7AQxx (0x61u << 20) /* (CHIPID_CIDR) AT91SAM7AQxx Series */ +#define CHIPID_CIDR_ARCH_AT91x63 (0x63u << 20) /* (CHIPID_CIDR) AT91x63 Series */ +#define CHIPID_CIDR_ARCH_AT91SAM7Sxx (0x70u << 20) /* (CHIPID_CIDR) AT91SAM7Sxx Series */ +#define CHIPID_CIDR_ARCH_AT91SAM7XCxx (0x71u << 20) /* (CHIPID_CIDR) AT91SAM7XCxx Series */ +#define CHIPID_CIDR_ARCH_AT91SAM7SExx (0x72u << 20) /* (CHIPID_CIDR) AT91SAM7SExx Series */ +#define CHIPID_CIDR_ARCH_AT91SAM7Lxx (0x73u << 20) /* (CHIPID_CIDR) AT91SAM7Lxx Series */ +#define CHIPID_CIDR_ARCH_AT91SAM7Xxx (0x75u << 20) /* (CHIPID_CIDR) AT91SAM7Xxx Series */ +#define CHIPID_CIDR_ARCH_AT91SAM7SLxx (0x76u << 20) /* (CHIPID_CIDR) AT91SAM7SLxx Series */ +#define CHIPID_CIDR_ARCH_SAM3UxC (0x80u << 20) /* (CHIPID_CIDR) SAM3UxC Series (100-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3UxE (0x81u << 20) /* (CHIPID_CIDR) SAM3UxE Series (144-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3AxC (0x83u << 20) /* (CHIPID_CIDR) SAM3AxC Series (100-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3XxC (0x84u << 20) /* (CHIPID_CIDR) SAM3XxC Series (100-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3XxE (0x85u << 20) /* (CHIPID_CIDR) SAM3XxE Series (144-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3XxG (0x86u << 20) /* (CHIPID_CIDR) SAM3XxG Series (208/217-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3SxA (0x88u << 20) /* (CHIPID_CIDR) SAM3SxA Series (48-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3SxB (0x89u << 20) /* (CHIPID_CIDR) SAM3SxB Series (64-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3SxC (0x8Au << 20) /* (CHIPID_CIDR) SAM3SxC Series (100-pin version) */ +#define CHIPID_CIDR_ARCH_AT91x92 (0x92u << 20) /* (CHIPID_CIDR) AT91x92 Series */ +#define CHIPID_CIDR_ARCH_SAM3NxA (0x93u << 20) /* (CHIPID_CIDR) SAM3NxA Series (48-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3NxB (0x94u << 20) /* (CHIPID_CIDR) SAM3NxB Series (64-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3NxC (0x95u << 20) /* (CHIPID_CIDR) SAM3NxC Series (100-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3SDxA (0x98u << 20) /* (CHIPID_CIDR) SAM3SDxA Series (48-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3SDxB (0x99u << 20) /* (CHIPID_CIDR) SAM3SDxB Series (64-pin version) */ +#define CHIPID_CIDR_ARCH_SAM3SDxC (0x9Au << 20) /* (CHIPID_CIDR) SAM3SDxC Series (100-pin version) */ +#define CHIPID_CIDR_ARCH_SAM5A (0xA5u << 20) /* (CHIPID_CIDR) SAM5A */ +#define CHIPID_CIDR_ARCH_AT75Cxx (0xF0u << 20) /* (CHIPID_CIDR) AT75Cxx Series */ +#define CHIPID_CIDR_NVPTYP_Pos 28 +#define CHIPID_CIDR_NVPTYP_Msk (0x7u << CHIPID_CIDR_NVPTYP_Pos) /* (CHIPID_CIDR) Nonvolatile Program Memory Type */ +#define CHIPID_CIDR_NVPTYP_ROM (0x0u << 28) /* (CHIPID_CIDR) ROM */ +#define CHIPID_CIDR_NVPTYP_ROMLESS (0x1u << 28) /* (CHIPID_CIDR) ROMless or on-chip Flash */ +#define CHIPID_CIDR_NVPTYP_FLASH (0x2u << 28) /* (CHIPID_CIDR) Embedded Flash Memory */ +#define CHIPID_CIDR_NVPTYP_ROM_FLASH (0x3u << 28) /* (CHIPID_CIDR) ROM and Embedded Flash MemoryNVPSIZ is ROM size NVPSIZ2 is Flash size */ +#define CHIPID_CIDR_NVPTYP_SRAM (0x4u << 28) /* (CHIPID_CIDR) SRAM emulating ROM */ +#define CHIPID_CIDR_EXT (0x1u << 31) /* (CHIPID_CIDR) Extension Flag */ +/* -------- CHIPID_EXID : (CHIPID Offset: 0x4) Chip ID Extension Register -------- */ +#define CHIPID_EXID_EXID_Pos 0 +#define CHIPID_EXID_EXID_Msk (0xffffffffu << CHIPID_EXID_EXID_Pos) /* (CHIPID_EXID) Chip ID Extension */ + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Digital-to-Analog Converter Controller */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Dacc hardware registers */ +typedef struct { + WoReg DACC_CR; /* (Dacc Offset: 0x00) Control Register */ + RwReg DACC_MR; /* (Dacc Offset: 0x04) Mode Register */ + WoReg DACC_CDR; /* (Dacc Offset: 0x08) Conversion Data Register */ + WoReg DACC_IER; /* (Dacc Offset: 0x0C) Interrupt Enable Register */ + WoReg DACC_IDR; /* (Dacc Offset: 0x10) Interrupt Disable Register */ + RoReg DACC_IMR; /* (Dacc Offset: 0x14) Interrupt Mask Register */ + RoReg DACC_ISR; /* (Dacc Offset: 0x18) Interrupt Status Register */ + RwReg Reserved1[50]; + RwReg DACC_WPMR; /* (Dacc Offset: 0xE4) Write Protect Mode Register */ + RoReg DACC_WPSR; /* (Dacc Offset: 0xE8) Write Protect Status Register */ + RwReg Reserved2[5]; + RwReg DACC_RPR; /* (Dacc Offset: 0x100) Receive Pointer Register */ + RwReg DACC_RCR; /* (Dacc Offset: 0x104) Receive Counter Register */ + RwReg DACC_TPR; /* (Dacc Offset: 0x108) Transmit Pointer Register */ + RwReg DACC_TCR; /* (Dacc Offset: 0x10C) Transmit Counter Register */ + RwReg DACC_RNPR; /* (Dacc Offset: 0x110) Receive Next Pointer Register */ + RwReg DACC_RNCR; /* (Dacc Offset: 0x114) Receive Next Counter Register */ + RwReg DACC_TNPR; /* (Dacc Offset: 0x118) Transmit Next Pointer Register */ + RwReg DACC_TNCR; /* (Dacc Offset: 0x11C) Transmit Next Counter Register */ + WoReg DACC_PTCR; /* (Dacc Offset: 0x120) Transfer Control Register */ + RoReg DACC_PTSR; /* (Dacc Offset: 0x124) Transfer Status Register */ +} Dacc; +#endif /* __ASSEMBLY__ */ +/* -------- DACC_CR : (DACC Offset: 0x00) Control Register -------- */ +#define DACC_CR_SWRST (0x1u << 0) /* (DACC_CR) Software Reset */ +/* -------- DACC_MR : (DACC Offset: 0x04) Mode Register -------- */ +#define DACC_MR_TRGEN (0x1u << 0) /* (DACC_MR) Trigger Enable */ +#define DACC_MR_TRGEN_DIS (0x0u << 0) /* (DACC_MR) External trigger mode disabled. DACC in free running mode. */ +#define DACC_MR_TRGEN_EN (0x1u << 0) /* (DACC_MR) External trigger mode enabled. */ +#define DACC_MR_TRGSEL_Pos 1 +#define DACC_MR_TRGSEL_Msk (0x7u << DACC_MR_TRGSEL_Pos) /* (DACC_MR) Trigger Selection */ +#define DACC_MR_TRGSEL_TRGSEL0 (0x0u << 1) /* (DACC_MR) External trigger */ +#define DACC_MR_TRGSEL_TRGSEL1 (0x1u << 1) /* (DACC_MR) TIO Output of the Timer Counter Channel 0 */ +#define DACC_MR_TRGSEL_TRGSEL2 (0x2u << 1) /* (DACC_MR) TIO Output of the Timer Counter Channel 1 */ +#define DACC_MR_TRGSEL_TRGSEL3 (0x3u << 1) /* (DACC_MR) TIO Output of the Timer Counter Channel 2 */ +#define DACC_MR_DACEN (0x1u << 4) /* (DACC_MR) DAC enable */ +#define DACC_MR_WORD (0x1u << 5) /* (DACC_MR) Word Transfer */ +#define DACC_MR_WORD_HALF (0x0u << 5) /* (DACC_MR) Half-Word transfer */ +#define DACC_MR_WORD_WORD (0x1u << 5) /* (DACC_MR) Word Transfer */ +#define DACC_MR_STARTUP_Pos 8 +#define DACC_MR_STARTUP_Msk (0xffu << DACC_MR_STARTUP_Pos) /* (DACC_MR) Startup Time Selection */ +#define DACC_MR_STARTUP(value) ((DACC_MR_STARTUP_Msk & ((value) << DACC_MR_STARTUP_Pos))) +#define DACC_MR_CLKDIV_Pos 16 +#define DACC_MR_CLKDIV_Msk (0xffffu << DACC_MR_CLKDIV_Pos) /* (DACC_MR) DAC Clock Divider for Internal Trigger */ +#define DACC_MR_CLKDIV(value) ((DACC_MR_CLKDIV_Msk & ((value) << DACC_MR_CLKDIV_Pos))) +/* -------- DACC_CDR : (DACC Offset: 0x08) Conversion Data Register -------- */ +#define DACC_CDR_DATA_Pos 0 +#define DACC_CDR_DATA_Msk (0xffffffffu << DACC_CDR_DATA_Pos) /* (DACC_CDR) Data to Convert */ +#define DACC_CDR_DATA(value) ((DACC_CDR_DATA_Msk & ((value) << DACC_CDR_DATA_Pos))) +/* -------- DACC_IER : (DACC Offset: 0x0C) Interrupt Enable Register -------- */ +#define DACC_IER_TXRDY (0x1u << 0) /* (DACC_IER) Transmission Ready Interrupt Enable */ +#define DACC_IER_ENDTX (0x1u << 1) /* (DACC_IER) End of PDC Interrupt Enable */ +#define DACC_IER_TXBUFE (0x1u << 2) /* (DACC_IER) Buffer Empty Interrupt Enable */ +/* -------- DACC_IDR : (DACC Offset: 0x10) Interrupt Disable Register -------- */ +#define DACC_IDR_TXRDY (0x1u << 0) /* (DACC_IDR) Transmission Ready Interrupt Disable */ +#define DACC_IDR_ENDTX (0x1u << 1) /* (DACC_IDR) End of PDC Interrupt Disable */ +#define DACC_IDR_TXBUFE (0x1u << 2) /* (DACC_IDR) Buffer Empty Interrupt Disable */ +/* -------- DACC_IMR : (DACC Offset: 0x14) Interrupt Mask Register -------- */ +#define DACC_IMR_TXRDY (0x1u << 0) /* (DACC_IMR) Transmission Ready Interrupt Mask */ +#define DACC_IMR_ENDTX (0x1u << 1) /* (DACC_IMR) End of PDC Interrupt Mask */ +#define DACC_IMR_TXBUFE (0x1u << 2) /* (DACC_IMR) Buffer Empty Interrupt Mask */ +/* -------- DACC_ISR : (DACC Offset: 0x18) Interrupt Status Register -------- */ +#define DACC_ISR_TXRDY (0x1u << 0) /* (DACC_ISR) Transmission Ready Interrupt Flag */ +#define DACC_ISR_ENDTX (0x1u << 1) /* (DACC_ISR) End of PDC Interrupt Flag */ +#define DACC_ISR_TXBUFE (0x1u << 2) /* (DACC_ISR) Buffer Empty Interrupt Flag */ +/* -------- DACC_WPMR : (DACC Offset: 0xE4) Write Protect Mode Register -------- */ +#define DACC_WPMR_WPEN (0x1u << 0) /* (DACC_WPMR) Write Protect Enable */ +#define DACC_WPMR_WPKEY_Pos 8 +#define DACC_WPMR_WPKEY_Msk (0xffffffu << DACC_WPMR_WPKEY_Pos) /* (DACC_WPMR) Write Protect KEY */ +#define DACC_WPMR_WPKEY(value) ((DACC_WPMR_WPKEY_Msk & ((value) << DACC_WPMR_WPKEY_Pos))) +/* -------- DACC_WPSR : (DACC Offset: 0xE8) Write Protect Status Register -------- */ +#define DACC_WPSR_WPROTERR (0x1u << 0) /* (DACC_WPSR) Write protection error */ +#define DACC_WPSR_WPROTADDR_Pos 8 +#define DACC_WPSR_WPROTADDR_Msk (0xffu << DACC_WPSR_WPROTADDR_Pos) /* (DACC_WPSR) Write protection error address */ +/* -------- DACC_RPR : (DACC Offset: 0x100) Receive Pointer Register -------- */ +#define DACC_RPR_RXPTR_Pos 0 +#define DACC_RPR_RXPTR_Msk (0xffffffffu << DACC_RPR_RXPTR_Pos) /* (DACC_RPR) Receive Pointer Register */ +#define DACC_RPR_RXPTR(value) ((DACC_RPR_RXPTR_Msk & ((value) << DACC_RPR_RXPTR_Pos))) +/* -------- DACC_RCR : (DACC Offset: 0x104) Receive Counter Register -------- */ +#define DACC_RCR_RXCTR_Pos 0 +#define DACC_RCR_RXCTR_Msk (0xffffu << DACC_RCR_RXCTR_Pos) /* (DACC_RCR) Receive Counter Register */ +#define DACC_RCR_RXCTR(value) ((DACC_RCR_RXCTR_Msk & ((value) << DACC_RCR_RXCTR_Pos))) +/* -------- DACC_TPR : (DACC Offset: 0x108) Transmit Pointer Register -------- */ +#define DACC_TPR_TXPTR_Pos 0 +#define DACC_TPR_TXPTR_Msk (0xffffffffu << DACC_TPR_TXPTR_Pos) /* (DACC_TPR) Transmit Counter Register */ +#define DACC_TPR_TXPTR(value) ((DACC_TPR_TXPTR_Msk & ((value) << DACC_TPR_TXPTR_Pos))) +/* -------- DACC_TCR : (DACC Offset: 0x10C) Transmit Counter Register -------- */ +#define DACC_TCR_TXCTR_Pos 0 +#define DACC_TCR_TXCTR_Msk (0xffffu << DACC_TCR_TXCTR_Pos) /* (DACC_TCR) Transmit Counter Register */ +#define DACC_TCR_TXCTR(value) ((DACC_TCR_TXCTR_Msk & ((value) << DACC_TCR_TXCTR_Pos))) +/* -------- DACC_RNPR : (DACC Offset: 0x110) Receive Next Pointer Register -------- */ +#define DACC_RNPR_RXNPTR_Pos 0 +#define DACC_RNPR_RXNPTR_Msk (0xffffffffu << DACC_RNPR_RXNPTR_Pos) /* (DACC_RNPR) Receive Next Pointer */ +#define DACC_RNPR_RXNPTR(value) ((DACC_RNPR_RXNPTR_Msk & ((value) << DACC_RNPR_RXNPTR_Pos))) +/* -------- DACC_RNCR : (DACC Offset: 0x114) Receive Next Counter Register -------- */ +#define DACC_RNCR_RXNCTR_Pos 0 +#define DACC_RNCR_RXNCTR_Msk (0xffffu << DACC_RNCR_RXNCTR_Pos) /* (DACC_RNCR) Receive Next Counter */ +#define DACC_RNCR_RXNCTR(value) ((DACC_RNCR_RXNCTR_Msk & ((value) << DACC_RNCR_RXNCTR_Pos))) +/* -------- DACC_TNPR : (DACC Offset: 0x118) Transmit Next Pointer Register -------- */ +#define DACC_TNPR_TXNPTR_Pos 0 +#define DACC_TNPR_TXNPTR_Msk (0xffffffffu << DACC_TNPR_TXNPTR_Pos) /* (DACC_TNPR) Transmit Next Pointer */ +#define DACC_TNPR_TXNPTR(value) ((DACC_TNPR_TXNPTR_Msk & ((value) << DACC_TNPR_TXNPTR_Pos))) +/* -------- DACC_TNCR : (DACC Offset: 0x11C) Transmit Next Counter Register -------- */ +#define DACC_TNCR_TXNCTR_Pos 0 +#define DACC_TNCR_TXNCTR_Msk (0xffffu << DACC_TNCR_TXNCTR_Pos) /* (DACC_TNCR) Transmit Counter Next */ +#define DACC_TNCR_TXNCTR(value) ((DACC_TNCR_TXNCTR_Msk & ((value) << DACC_TNCR_TXNCTR_Pos))) +/* -------- DACC_PTCR : (DACC Offset: 0x120) Transfer Control Register -------- */ +#define DACC_PTCR_RXTEN (0x1u << 0) /* (DACC_PTCR) Receiver Transfer Enable */ +#define DACC_PTCR_RXTDIS (0x1u << 1) /* (DACC_PTCR) Receiver Transfer Disable */ +#define DACC_PTCR_TXTEN (0x1u << 8) /* (DACC_PTCR) Transmitter Transfer Enable */ +#define DACC_PTCR_TXTDIS (0x1u << 9) /* (DACC_PTCR) Transmitter Transfer Disable */ +/* -------- DACC_PTSR : (DACC Offset: 0x124) Transfer Status Register -------- */ +#define DACC_PTSR_RXTEN (0x1u << 0) /* (DACC_PTSR) Receiver Transfer Enable */ +#define DACC_PTSR_TXTEN (0x1u << 8) /* (DACC_PTSR) Transmitter Transfer Enable */ + + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR General Purpose Backup Register */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Gpbr hardware registers */ +typedef struct { + RwReg SYS_GPBR0; /* (Gpbr Offset: 0x0) General Purpose Backup Register 0 */ + RwReg SYS_GPBR1; /* (Gpbr Offset: 0x4) General Purpose Backup Register 1 */ + RwReg SYS_GPBR2; /* (Gpbr Offset: 0x8) General Purpose Backup Register 2 */ + RwReg SYS_GPBR3; /* (Gpbr Offset: 0xC) General Purpose Backup Register 3 */ + RwReg SYS_GPBR4; /* (Gpbr Offset: 0x10) General Purpose Backup Register 4 */ + RwReg SYS_GPBR5; /* (Gpbr Offset: 0x14) General Purpose Backup Register 5 */ + RwReg SYS_GPBR6; /* (Gpbr Offset: 0x18) General Purpose Backup Register 6 */ + RwReg SYS_GPBR7; /* (Gpbr Offset: 0x1C) General Purpose Backup Register 7 */ +} Gpbr; +#endif /* __ASSEMBLY__ */ +/* -------- SYS_GPBR0 : (GPBR Offset: 0x0) General Purpose Backup Register 0 -------- */ +#define SYS_GPBR0_GPBR_VALUE0_Pos 0 +#define SYS_GPBR0_GPBR_VALUE0_Msk (0xffffffffu << SYS_GPBR0_GPBR_VALUE0_Pos) /* (SYS_GPBR0) Value of GPBR x */ +#define SYS_GPBR0_GPBR_VALUE0(value) ((SYS_GPBR0_GPBR_VALUE0_Msk & ((value) << SYS_GPBR0_GPBR_VALUE0_Pos))) +/* -------- SYS_GPBR1 : (GPBR Offset: 0x4) General Purpose Backup Register 1 -------- */ +#define SYS_GPBR1_GPBR_VALUE1_Pos 0 +#define SYS_GPBR1_GPBR_VALUE1_Msk (0xffffffffu << SYS_GPBR1_GPBR_VALUE1_Pos) /* (SYS_GPBR1) Value of GPBR x */ +#define SYS_GPBR1_GPBR_VALUE1(value) ((SYS_GPBR1_GPBR_VALUE1_Msk & ((value) << SYS_GPBR1_GPBR_VALUE1_Pos))) +/* -------- SYS_GPBR2 : (GPBR Offset: 0x8) General Purpose Backup Register 2 -------- */ +#define SYS_GPBR2_GPBR_VALUE2_Pos 0 +#define SYS_GPBR2_GPBR_VALUE2_Msk (0xffffffffu << SYS_GPBR2_GPBR_VALUE2_Pos) /* (SYS_GPBR2) Value of GPBR x */ +#define SYS_GPBR2_GPBR_VALUE2(value) ((SYS_GPBR2_GPBR_VALUE2_Msk & ((value) << SYS_GPBR2_GPBR_VALUE2_Pos))) +/* -------- SYS_GPBR3 : (GPBR Offset: 0xC) General Purpose Backup Register 3 -------- */ +#define SYS_GPBR3_GPBR_VALUE3_Pos 0 +#define SYS_GPBR3_GPBR_VALUE3_Msk (0xffffffffu << SYS_GPBR3_GPBR_VALUE3_Pos) /* (SYS_GPBR3) Value of GPBR x */ +#define SYS_GPBR3_GPBR_VALUE3(value) ((SYS_GPBR3_GPBR_VALUE3_Msk & ((value) << SYS_GPBR3_GPBR_VALUE3_Pos))) +/* -------- SYS_GPBR4 : (GPBR Offset: 0x10) General Purpose Backup Register 4 -------- */ +#define SYS_GPBR4_GPBR_VALUE4_Pos 0 +#define SYS_GPBR4_GPBR_VALUE4_Msk (0xffffffffu << SYS_GPBR4_GPBR_VALUE4_Pos) /* (SYS_GPBR4) Value of GPBR x */ +#define SYS_GPBR4_GPBR_VALUE4(value) ((SYS_GPBR4_GPBR_VALUE4_Msk & ((value) << SYS_GPBR4_GPBR_VALUE4_Pos))) +/* -------- SYS_GPBR5 : (GPBR Offset: 0x14) General Purpose Backup Register 5 -------- */ +#define SYS_GPBR5_GPBR_VALUE5_Pos 0 +#define SYS_GPBR5_GPBR_VALUE5_Msk (0xffffffffu << SYS_GPBR5_GPBR_VALUE5_Pos) /* (SYS_GPBR5) Value of GPBR x */ +#define SYS_GPBR5_GPBR_VALUE5(value) ((SYS_GPBR5_GPBR_VALUE5_Msk & ((value) << SYS_GPBR5_GPBR_VALUE5_Pos))) +/* -------- SYS_GPBR6 : (GPBR Offset: 0x18) General Purpose Backup Register 6 -------- */ +#define SYS_GPBR6_GPBR_VALUE6_Pos 0 +#define SYS_GPBR6_GPBR_VALUE6_Msk (0xffffffffu << SYS_GPBR6_GPBR_VALUE6_Pos) /* (SYS_GPBR6) Value of GPBR x */ +#define SYS_GPBR6_GPBR_VALUE6(value) ((SYS_GPBR6_GPBR_VALUE6_Msk & ((value) << SYS_GPBR6_GPBR_VALUE6_Pos))) +/* -------- SYS_GPBR7 : (GPBR Offset: 0x1C) General Purpose Backup Register 7 -------- */ +#define SYS_GPBR7_GPBR_VALUE7_Pos 0 +#define SYS_GPBR7_GPBR_VALUE7_Msk (0xffffffffu << SYS_GPBR7_GPBR_VALUE7_Pos) /* (SYS_GPBR7) Value of GPBR x */ +#define SYS_GPBR7_GPBR_VALUE7(value) ((SYS_GPBR7_GPBR_VALUE7_Msk & ((value) << SYS_GPBR7_GPBR_VALUE7_Pos))) + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR AHB Bus Matrix */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Matrix hardware registers */ +typedef struct { + RwReg MATRIX_MCFG[3]; /* (Matrix Offset: 0x0000) Master Configuration Register */ + RwReg Reserved1[13]; + RwReg MATRIX_SCFG[4]; /* (Matrix Offset: 0x0040) Slave Configuration Register */ + RwReg Reserved2[12]; + RwReg MATRIX_PRAS0; /* (Matrix Offset: 0x0080) Priority Register A for Slave 0 */ + RwReg Reserved3[1]; + RwReg MATRIX_PRAS1; /* (Matrix Offset: 0x0088) Priority Register A for Slave 1 */ + RwReg Reserved4[1]; + RwReg MATRIX_PRAS2; /* (Matrix Offset: 0x0090) Priority Register A for Slave 2 */ + RwReg Reserved5[1]; + RwReg MATRIX_PRAS3; /* (Matrix Offset: 0x0098) Priority Register A for Slave 3 */ + RwReg Reserved6[1]; + RwReg Reserved7[29]; + RwReg CCFG_SYSIO; /* (Matrix Offset: 0x0114) System I/O Configuration register */ + RwReg Reserved8[51]; + RwReg MATRIX_WPMR; /* (Matrix Offset: 0x1E4) Write Protect Mode Register */ + RoReg MATRIX_WPSR; /* (Matrix Offset: 0x1E8) Write Protect Status Register */ +} Matrix; +#endif /* __ASSEMBLY__ */ +/* -------- MATRIX_MCFG[3] : (MATRIX Offset: 0x0000) Master Configuration Register -------- */ +#define MATRIX_MCFG_ULBT_Pos 0 +#define MATRIX_MCFG_ULBT_Msk (0x7u << MATRIX_MCFG_ULBT_Pos) /* (MATRIX_MCFG[3]) Undefined Length Burst Type */ +#define MATRIX_MCFG_ULBT(value) ((MATRIX_MCFG_ULBT_Msk & ((value) << MATRIX_MCFG_ULBT_Pos))) +/* -------- MATRIX_SCFG[4] : (MATRIX Offset: 0x0040) Slave Configuration Register -------- */ +#define MATRIX_SCFG_SLOT_CYCLE_Pos 0 +#define MATRIX_SCFG_SLOT_CYCLE_Msk (0xffu << MATRIX_SCFG_SLOT_CYCLE_Pos) /* (MATRIX_SCFG[4]) Maximum Number of Allowed Cycles for a Burst */ +#define MATRIX_SCFG_SLOT_CYCLE(value) ((MATRIX_SCFG_SLOT_CYCLE_Msk & ((value) << MATRIX_SCFG_SLOT_CYCLE_Pos))) +#define MATRIX_SCFG_DEFMSTR_TYPE_Pos 16 +#define MATRIX_SCFG_DEFMSTR_TYPE_Msk (0x3u << MATRIX_SCFG_DEFMSTR_TYPE_Pos) /* (MATRIX_SCFG[4]) Default Master Type */ +#define MATRIX_SCFG_DEFMSTR_TYPE(value) ((MATRIX_SCFG_DEFMSTR_TYPE_Msk & ((value) << MATRIX_SCFG_DEFMSTR_TYPE_Pos))) +#define MATRIX_SCFG_FIXED_DEFMSTR_Pos 18 +#define MATRIX_SCFG_FIXED_DEFMSTR_Msk (0x7u << MATRIX_SCFG_FIXED_DEFMSTR_Pos) /* (MATRIX_SCFG[4]) Fixed Default Master */ +#define MATRIX_SCFG_FIXED_DEFMSTR(value) ((MATRIX_SCFG_FIXED_DEFMSTR_Msk & ((value) << MATRIX_SCFG_FIXED_DEFMSTR_Pos))) +#define MATRIX_SCFG_ARBT_Pos 24 +#define MATRIX_SCFG_ARBT_Msk (0x3u << MATRIX_SCFG_ARBT_Pos) /* (MATRIX_SCFG[4]) Arbitration Type */ +#define MATRIX_SCFG_ARBT(value) ((MATRIX_SCFG_ARBT_Msk & ((value) << MATRIX_SCFG_ARBT_Pos))) +/* -------- MATRIX_PRAS0 : (MATRIX Offset: 0x0080) Priority Register A for Slave 0 -------- */ +#define MATRIX_PRAS0_M0PR_Pos 0 +#define MATRIX_PRAS0_M0PR_Msk (0x3u << MATRIX_PRAS0_M0PR_Pos) /* (MATRIX_PRAS0) Master 0 Priority */ +#define MATRIX_PRAS0_M0PR(value) ((MATRIX_PRAS0_M0PR_Msk & ((value) << MATRIX_PRAS0_M0PR_Pos))) +#define MATRIX_PRAS0_M1PR_Pos 4 +#define MATRIX_PRAS0_M1PR_Msk (0x3u << MATRIX_PRAS0_M1PR_Pos) /* (MATRIX_PRAS0) Master 1 Priority */ +#define MATRIX_PRAS0_M1PR(value) ((MATRIX_PRAS0_M1PR_Msk & ((value) << MATRIX_PRAS0_M1PR_Pos))) +#define MATRIX_PRAS0_M2PR_Pos 8 +#define MATRIX_PRAS0_M2PR_Msk (0x3u << MATRIX_PRAS0_M2PR_Pos) /* (MATRIX_PRAS0) Master 2 Priority */ +#define MATRIX_PRAS0_M2PR(value) ((MATRIX_PRAS0_M2PR_Msk & ((value) << MATRIX_PRAS0_M2PR_Pos))) +#define MATRIX_PRAS0_M3PR_Pos 12 +#define MATRIX_PRAS0_M3PR_Msk (0x3u << MATRIX_PRAS0_M3PR_Pos) /* (MATRIX_PRAS0) Master 3 Priority */ +#define MATRIX_PRAS0_M3PR(value) ((MATRIX_PRAS0_M3PR_Msk & ((value) << MATRIX_PRAS0_M3PR_Pos))) +/* -------- MATRIX_PRAS1 : (MATRIX Offset: 0x0088) Priority Register A for Slave 1 -------- */ +#define MATRIX_PRAS1_M0PR_Pos 0 +#define MATRIX_PRAS1_M0PR_Msk (0x3u << MATRIX_PRAS1_M0PR_Pos) /* (MATRIX_PRAS1) Master 0 Priority */ +#define MATRIX_PRAS1_M0PR(value) ((MATRIX_PRAS1_M0PR_Msk & ((value) << MATRIX_PRAS1_M0PR_Pos))) +#define MATRIX_PRAS1_M1PR_Pos 4 +#define MATRIX_PRAS1_M1PR_Msk (0x3u << MATRIX_PRAS1_M1PR_Pos) /* (MATRIX_PRAS1) Master 1 Priority */ +#define MATRIX_PRAS1_M1PR(value) ((MATRIX_PRAS1_M1PR_Msk & ((value) << MATRIX_PRAS1_M1PR_Pos))) +#define MATRIX_PRAS1_M2PR_Pos 8 +#define MATRIX_PRAS1_M2PR_Msk (0x3u << MATRIX_PRAS1_M2PR_Pos) /* (MATRIX_PRAS1) Master 2 Priority */ +#define MATRIX_PRAS1_M2PR(value) ((MATRIX_PRAS1_M2PR_Msk & ((value) << MATRIX_PRAS1_M2PR_Pos))) +#define MATRIX_PRAS1_M3PR_Pos 12 +#define MATRIX_PRAS1_M3PR_Msk (0x3u << MATRIX_PRAS1_M3PR_Pos) /* (MATRIX_PRAS1) Master 3 Priority */ +#define MATRIX_PRAS1_M3PR(value) ((MATRIX_PRAS1_M3PR_Msk & ((value) << MATRIX_PRAS1_M3PR_Pos))) +/* -------- MATRIX_PRAS2 : (MATRIX Offset: 0x0090) Priority Register A for Slave 2 -------- */ +#define MATRIX_PRAS2_M0PR_Pos 0 +#define MATRIX_PRAS2_M0PR_Msk (0x3u << MATRIX_PRAS2_M0PR_Pos) /* (MATRIX_PRAS2) Master 0 Priority */ +#define MATRIX_PRAS2_M0PR(value) ((MATRIX_PRAS2_M0PR_Msk & ((value) << MATRIX_PRAS2_M0PR_Pos))) +#define MATRIX_PRAS2_M1PR_Pos 4 +#define MATRIX_PRAS2_M1PR_Msk (0x3u << MATRIX_PRAS2_M1PR_Pos) /* (MATRIX_PRAS2) Master 1 Priority */ +#define MATRIX_PRAS2_M1PR(value) ((MATRIX_PRAS2_M1PR_Msk & ((value) << MATRIX_PRAS2_M1PR_Pos))) +#define MATRIX_PRAS2_M2PR_Pos 8 +#define MATRIX_PRAS2_M2PR_Msk (0x3u << MATRIX_PRAS2_M2PR_Pos) /* (MATRIX_PRAS2) Master 2 Priority */ +#define MATRIX_PRAS2_M2PR(value) ((MATRIX_PRAS2_M2PR_Msk & ((value) << MATRIX_PRAS2_M2PR_Pos))) +#define MATRIX_PRAS2_M3PR_Pos 12 +#define MATRIX_PRAS2_M3PR_Msk (0x3u << MATRIX_PRAS2_M3PR_Pos) /* (MATRIX_PRAS2) Master 3 Priority */ +#define MATRIX_PRAS2_M3PR(value) ((MATRIX_PRAS2_M3PR_Msk & ((value) << MATRIX_PRAS2_M3PR_Pos))) +/* -------- MATRIX_PRAS3 : (MATRIX Offset: 0x0098) Priority Register A for Slave 3 -------- */ +#define MATRIX_PRAS3_M0PR_Pos 0 +#define MATRIX_PRAS3_M0PR_Msk (0x3u << MATRIX_PRAS3_M0PR_Pos) /* (MATRIX_PRAS3) Master 0 Priority */ +#define MATRIX_PRAS3_M0PR(value) ((MATRIX_PRAS3_M0PR_Msk & ((value) << MATRIX_PRAS3_M0PR_Pos))) +#define MATRIX_PRAS3_M1PR_Pos 4 +#define MATRIX_PRAS3_M1PR_Msk (0x3u << MATRIX_PRAS3_M1PR_Pos) /* (MATRIX_PRAS3) Master 1 Priority */ +#define MATRIX_PRAS3_M1PR(value) ((MATRIX_PRAS3_M1PR_Msk & ((value) << MATRIX_PRAS3_M1PR_Pos))) +#define MATRIX_PRAS3_M2PR_Pos 8 +#define MATRIX_PRAS3_M2PR_Msk (0x3u << MATRIX_PRAS3_M2PR_Pos) /* (MATRIX_PRAS3) Master 2 Priority */ +#define MATRIX_PRAS3_M2PR(value) ((MATRIX_PRAS3_M2PR_Msk & ((value) << MATRIX_PRAS3_M2PR_Pos))) +#define MATRIX_PRAS3_M3PR_Pos 12 +#define MATRIX_PRAS3_M3PR_Msk (0x3u << MATRIX_PRAS3_M3PR_Pos) /* (MATRIX_PRAS3) Master 3 Priority */ +#define MATRIX_PRAS3_M3PR(value) ((MATRIX_PRAS3_M3PR_Msk & ((value) << MATRIX_PRAS3_M3PR_Pos))) +/* -------- CCFG_SYSIO : (MATRIX Offset: 0x0114) System I/O Configuration register -------- */ +#define CCFG_SYSIO_SYSIO4 (0x1u << 4) /* (CCFG_SYSIO) PB4 or TDI Assignment */ +#define CCFG_SYSIO_SYSIO5 (0x1u << 5) /* (CCFG_SYSIO) PB5 or TDO/TRACESWO Assignment */ +#define CCFG_SYSIO_SYSIO6 (0x1u << 6) /* (CCFG_SYSIO) PB6 or TMS/SWDIO Assignment */ +#define CCFG_SYSIO_SYSIO7 (0x1u << 7) /* (CCFG_SYSIO) PB7 or TCK/SWCLK Assignment */ +#define CCFG_SYSIO_SYSIO12 (0x1u << 12) /* (CCFG_SYSIO) PB12 or ERASE Assignment */ +/* -------- MATRIX_WPMR : (MATRIX Offset: 0x1E4) Write Protect Mode Register -------- */ +#define MATRIX_WPMR_WPEN (0x1u << 0) /* (MATRIX_WPMR) Write Protect ENable */ +#define MATRIX_WPMR_WPKEY_Pos 8 +#define MATRIX_WPMR_WPKEY_Msk (0xffffffu << MATRIX_WPMR_WPKEY_Pos) /* (MATRIX_WPMR) Write Protect KEY (Write-only) */ +#define MATRIX_WPMR_WPKEY(value) ((MATRIX_WPMR_WPKEY_Msk & ((value) << MATRIX_WPMR_WPKEY_Pos))) +/* -------- MATRIX_WPSR : (MATRIX Offset: 0x1E8) Write Protect Status Register -------- */ +#define MATRIX_WPSR_WPVS (0x1u << 0) /* (MATRIX_WPSR) Write Protect Violation Status */ +#define MATRIX_WPSR_WPVSRC_Pos 8 +#define MATRIX_WPSR_WPVSRC_Msk (0xffffu << MATRIX_WPSR_WPVSRC_Pos) /* (MATRIX_WPSR) Write Protect Violation Source */ + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Peripheral DMA Controller */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Pdc hardware registers */ +typedef struct { + RwReg Reserved1[64]; + RwReg PERIPH_RPR; /* (Pdc Offset: 0x100) Receive Pointer Register */ + RwReg PERIPH_RCR; /* (Pdc Offset: 0x104) Receive Counter Register */ + RwReg PERIPH_TPR; /* (Pdc Offset: 0x108) Transmit Pointer Register */ + RwReg PERIPH_TCR; /* (Pdc Offset: 0x10C) Transmit Counter Register */ + RwReg PERIPH_RNPR; /* (Pdc Offset: 0x110) Receive Next Pointer Register */ + RwReg PERIPH_RNCR; /* (Pdc Offset: 0x114) Receive Next Counter Register */ + RwReg PERIPH_TNPR; /* (Pdc Offset: 0x118) Transmit Next Pointer Register */ + RwReg PERIPH_TNCR; /* (Pdc Offset: 0x11C) Transmit Next Counter Register */ + WoReg PERIPH_PTCR; /* (Pdc Offset: 0x120) Transfer Control Register */ + RoReg PERIPH_PTSR; /* (Pdc Offset: 0x124) Transfer Status Register */ +} Pdc; +#endif /* __ASSEMBLY__ */ +/* -------- PERIPH_RPR : (PDC Offset: 0x100) Receive Pointer Register -------- */ +#define PERIPH_RPR_RXPTR_Pos 0 +#define PERIPH_RPR_RXPTR_Msk (0xffffffffu << PERIPH_RPR_RXPTR_Pos) /* (PERIPH_RPR) Receive Pointer Register */ +#define PERIPH_RPR_RXPTR(value) ((PERIPH_RPR_RXPTR_Msk & ((value) << PERIPH_RPR_RXPTR_Pos))) +/* -------- PERIPH_RCR : (PDC Offset: 0x104) Receive Counter Register -------- */ +#define PERIPH_RCR_RXCTR_Pos 0 +#define PERIPH_RCR_RXCTR_Msk (0xffffu << PERIPH_RCR_RXCTR_Pos) /* (PERIPH_RCR) Receive Counter Register */ +#define PERIPH_RCR_RXCTR(value) ((PERIPH_RCR_RXCTR_Msk & ((value) << PERIPH_RCR_RXCTR_Pos))) +/* -------- PERIPH_TPR : (PDC Offset: 0x108) Transmit Pointer Register -------- */ +#define PERIPH_TPR_TXPTR_Pos 0 +#define PERIPH_TPR_TXPTR_Msk (0xffffffffu << PERIPH_TPR_TXPTR_Pos) /* (PERIPH_TPR) Transmit Counter Register */ +#define PERIPH_TPR_TXPTR(value) ((PERIPH_TPR_TXPTR_Msk & ((value) << PERIPH_TPR_TXPTR_Pos))) +/* -------- PERIPH_TCR : (PDC Offset: 0x10C) Transmit Counter Register -------- */ +#define PERIPH_TCR_TXCTR_Pos 0 +#define PERIPH_TCR_TXCTR_Msk (0xffffu << PERIPH_TCR_TXCTR_Pos) /* (PERIPH_TCR) Transmit Counter Register */ +#define PERIPH_TCR_TXCTR(value) ((PERIPH_TCR_TXCTR_Msk & ((value) << PERIPH_TCR_TXCTR_Pos))) +/* -------- PERIPH_RNPR : (PDC Offset: 0x110) Receive Next Pointer Register -------- */ +#define PERIPH_RNPR_RXNPTR_Pos 0 +#define PERIPH_RNPR_RXNPTR_Msk (0xffffffffu << PERIPH_RNPR_RXNPTR_Pos) /* (PERIPH_RNPR) Receive Next Pointer */ +#define PERIPH_RNPR_RXNPTR(value) ((PERIPH_RNPR_RXNPTR_Msk & ((value) << PERIPH_RNPR_RXNPTR_Pos))) +/* -------- PERIPH_RNCR : (PDC Offset: 0x114) Receive Next Counter Register -------- */ +#define PERIPH_RNCR_RXNCTR_Pos 0 +#define PERIPH_RNCR_RXNCTR_Msk (0xffffu << PERIPH_RNCR_RXNCTR_Pos) /* (PERIPH_RNCR) Receive Next Counter */ +#define PERIPH_RNCR_RXNCTR(value) ((PERIPH_RNCR_RXNCTR_Msk & ((value) << PERIPH_RNCR_RXNCTR_Pos))) +/* -------- PERIPH_TNPR : (PDC Offset: 0x118) Transmit Next Pointer Register -------- */ +#define PERIPH_TNPR_TXNPTR_Pos 0 +#define PERIPH_TNPR_TXNPTR_Msk (0xffffffffu << PERIPH_TNPR_TXNPTR_Pos) /* (PERIPH_TNPR) Transmit Next Pointer */ +#define PERIPH_TNPR_TXNPTR(value) ((PERIPH_TNPR_TXNPTR_Msk & ((value) << PERIPH_TNPR_TXNPTR_Pos))) +/* -------- PERIPH_TNCR : (PDC Offset: 0x11C) Transmit Next Counter Register -------- */ +#define PERIPH_TNCR_TXNCTR_Pos 0 +#define PERIPH_TNCR_TXNCTR_Msk (0xffffu << PERIPH_TNCR_TXNCTR_Pos) /* (PERIPH_TNCR) Transmit Counter Next */ +#define PERIPH_TNCR_TXNCTR(value) ((PERIPH_TNCR_TXNCTR_Msk & ((value) << PERIPH_TNCR_TXNCTR_Pos))) +/* -------- PERIPH_PTCR : (PDC Offset: 0x120) Transfer Control Register -------- */ +#define PERIPH_PTCR_RXTEN (0x1u << 0) /* (PERIPH_PTCR) Receiver Transfer Enable */ +#define PERIPH_PTCR_RXTDIS (0x1u << 1) /* (PERIPH_PTCR) Receiver Transfer Disable */ +#define PERIPH_PTCR_TXTEN (0x1u << 8) /* (PERIPH_PTCR) Transmitter Transfer Enable */ +#define PERIPH_PTCR_TXTDIS (0x1u << 9) /* (PERIPH_PTCR) Transmitter Transfer Disable */ +/* -------- PERIPH_PTSR : (PDC Offset: 0x124) Transfer Status Register -------- */ +#define PERIPH_PTSR_RXTEN (0x1u << 0) /* (PERIPH_PTSR) Receiver Transfer Enable */ +#define PERIPH_PTSR_TXTEN (0x1u << 8) /* (PERIPH_PTSR) Transmitter Transfer Enable */ + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Parallel Input/Output */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Pio hardware registers */ +typedef struct { + WoReg PIO_PER; /* (Pio Offset: 0x0000) PIO Enable Register */ + WoReg PIO_PDR; /* (Pio Offset: 0x0004) PIO Disable Register */ + RoReg PIO_PSR; /* (Pio Offset: 0x0008) PIO Status Register */ + RwReg Reserved1[1]; + WoReg PIO_OER; /* (Pio Offset: 0x0010) Output Enable Register */ + WoReg PIO_ODR; /* (Pio Offset: 0x0014) Output Disable Register */ + RoReg PIO_OSR; /* (Pio Offset: 0x0018) Output Status Register */ + RwReg Reserved2[1]; + WoReg PIO_IFER; /* (Pio Offset: 0x0020) Glitch Input Filter Enable Register */ + WoReg PIO_IFDR; /* (Pio Offset: 0x0024) Glitch Input Filter Disable Register */ + RoReg PIO_IFSR; /* (Pio Offset: 0x0028) Glitch Input Filter Status Register */ + RwReg Reserved3[1]; + WoReg PIO_SODR; /* (Pio Offset: 0x0030) Set Output Data Register */ + WoReg PIO_CODR; /* (Pio Offset: 0x0034) Clear Output Data Register */ + RwReg PIO_ODSR; /* (Pio Offset: 0x0038) Output Data Status Register */ + RoReg PIO_PDSR; /* (Pio Offset: 0x003C) Pin Data Status Register */ + WoReg PIO_IER; /* (Pio Offset: 0x0040) Interrupt Enable Register */ + WoReg PIO_IDR; /* (Pio Offset: 0x0044) Interrupt Disable Register */ + RoReg PIO_IMR; /* (Pio Offset: 0x0048) Interrupt Mask Register */ + RoReg PIO_ISR; /* (Pio Offset: 0x004C) Interrupt Status Register */ + WoReg PIO_MDER; /* (Pio Offset: 0x0050) Multi-driver Enable Register */ + WoReg PIO_MDDR; /* (Pio Offset: 0x0054) Multi-driver Disable Register */ + RoReg PIO_MDSR; /* (Pio Offset: 0x0058) Multi-driver Status Register */ + RwReg Reserved4[1]; + WoReg PIO_PUDR; /* (Pio Offset: 0x0060) Pull-up Disable Register */ + WoReg PIO_PUER; /* (Pio Offset: 0x0064) Pull-up Enable Register */ + RoReg PIO_PUSR; /* (Pio Offset: 0x0068) Pad Pull-up Status Register */ + RwReg Reserved5[1]; + RwReg PIO_ABCDSR[2]; /* (Pio Offset: 0x0070) Peripheral Select Register */ + RwReg Reserved6[2]; + WoReg PIO_IFSCDR; /* (Pio Offset: 0x0080) Input Filter Slow Clock Disable Register */ + WoReg PIO_IFSCER; /* (Pio Offset: 0x0084) Input Filter Slow Clock Enable Register */ + RoReg PIO_IFSCSR; /* (Pio Offset: 0x0088) Input Filter Slow Clock Status Register */ + RwReg PIO_SCDR; /* (Pio Offset: 0x008C) Slow Clock Divider Debouncing Register */ + WoReg PIO_PPDDR; /* (Pio Offset: 0x0090) Pad Pull-down Disable Register */ + WoReg PIO_PPDER; /* (Pio Offset: 0x0094) Pad Pull-down Enable Register */ + RoReg PIO_PPDSR; /* (Pio Offset: 0x0098) Pad Pull-down Status Register */ + RwReg Reserved7[1]; + WoReg PIO_OWER; /* (Pio Offset: 0x00A0) Output Write Enable */ + WoReg PIO_OWDR; /* (Pio Offset: 0x00A4) Output Write Disable */ + RoReg PIO_OWSR; /* (Pio Offset: 0x00A8) Output Write Status Register */ + RwReg Reserved8[1]; + WoReg PIO_AIMER; /* (Pio Offset: 0x00B0) Additional Interrupt Modes Enable Register */ + WoReg PIO_AIMDR; /* (Pio Offset: 0x00B4) Additional Interrupt Modes Disables Register */ + RoReg PIO_AIMMR; /* (Pio Offset: 0x00B8) Additional Interrupt Modes Mask Register */ + RwReg Reserved9[1]; + WoReg PIO_ESR; /* (Pio Offset: 0x00C0) Edge Select Register */ + WoReg PIO_LSR; /* (Pio Offset: 0x00C4) Level Select Register */ + RoReg PIO_ELSR; /* (Pio Offset: 0x00C8) Edge/Level Status Register */ + RwReg Reserved10[1]; + WoReg PIO_FELLSR; /* (Pio Offset: 0x00D0) Falling Edge/Low Level Select Register */ + WoReg PIO_REHLSR; /* (Pio Offset: 0x00D4) Rising Edge/ High Level Select Register */ + RoReg PIO_FRLHSR; /* (Pio Offset: 0x00D8) Fall/Rise - Low/High Status Register */ + RwReg Reserved11[1]; + RoReg PIO_LOCKSR; /* (Pio Offset: 0x00E0) Lock Status */ + RwReg PIO_WPMR; /* (Pio Offset: 0x00E4) Write Protect Mode Register */ + RoReg PIO_WPSR; /* (Pio Offset: 0x00E8) Write Protect Status Register */ + RwReg Reserved12[5]; + RwReg PIO_SCHMITT; /* (Pio Offset: 0x0100) Schmitt Trigger Register */ +} Pio; +#endif /* __ASSEMBLY__ */ +/* -------- PIO_PER : (PIO Offset: 0x0000) PIO Enable Register -------- */ +#define PIO_PER_P0 (0x1u << 0) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P1 (0x1u << 1) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P2 (0x1u << 2) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P3 (0x1u << 3) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P4 (0x1u << 4) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P5 (0x1u << 5) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P6 (0x1u << 6) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P7 (0x1u << 7) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P8 (0x1u << 8) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P9 (0x1u << 9) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P10 (0x1u << 10) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P11 (0x1u << 11) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P12 (0x1u << 12) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P13 (0x1u << 13) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P14 (0x1u << 14) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P15 (0x1u << 15) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P16 (0x1u << 16) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P17 (0x1u << 17) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P18 (0x1u << 18) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P19 (0x1u << 19) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P20 (0x1u << 20) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P21 (0x1u << 21) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P22 (0x1u << 22) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P23 (0x1u << 23) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P24 (0x1u << 24) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P25 (0x1u << 25) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P26 (0x1u << 26) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P27 (0x1u << 27) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P28 (0x1u << 28) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P29 (0x1u << 29) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P30 (0x1u << 30) /* (PIO_PER) PIO Enable */ +#define PIO_PER_P31 (0x1u << 31) /* (PIO_PER) PIO Enable */ +/* -------- PIO_PDR : (PIO Offset: 0x0004) PIO Disable Register -------- */ +#define PIO_PDR_P0 (0x1u << 0) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P1 (0x1u << 1) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P2 (0x1u << 2) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P3 (0x1u << 3) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P4 (0x1u << 4) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P5 (0x1u << 5) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P6 (0x1u << 6) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P7 (0x1u << 7) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P8 (0x1u << 8) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P9 (0x1u << 9) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P10 (0x1u << 10) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P11 (0x1u << 11) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P12 (0x1u << 12) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P13 (0x1u << 13) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P14 (0x1u << 14) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P15 (0x1u << 15) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P16 (0x1u << 16) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P17 (0x1u << 17) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P18 (0x1u << 18) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P19 (0x1u << 19) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P20 (0x1u << 20) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P21 (0x1u << 21) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P22 (0x1u << 22) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P23 (0x1u << 23) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P24 (0x1u << 24) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P25 (0x1u << 25) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P26 (0x1u << 26) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P27 (0x1u << 27) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P28 (0x1u << 28) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P29 (0x1u << 29) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P30 (0x1u << 30) /* (PIO_PDR) PIO Disable */ +#define PIO_PDR_P31 (0x1u << 31) /* (PIO_PDR) PIO Disable */ +/* -------- PIO_PSR : (PIO Offset: 0x0008) PIO Status Register -------- */ +#define PIO_PSR_P0 (0x1u << 0) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P1 (0x1u << 1) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P2 (0x1u << 2) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P3 (0x1u << 3) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P4 (0x1u << 4) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P5 (0x1u << 5) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P6 (0x1u << 6) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P7 (0x1u << 7) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P8 (0x1u << 8) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P9 (0x1u << 9) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P10 (0x1u << 10) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P11 (0x1u << 11) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P12 (0x1u << 12) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P13 (0x1u << 13) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P14 (0x1u << 14) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P15 (0x1u << 15) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P16 (0x1u << 16) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P17 (0x1u << 17) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P18 (0x1u << 18) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P19 (0x1u << 19) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P20 (0x1u << 20) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P21 (0x1u << 21) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P22 (0x1u << 22) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P23 (0x1u << 23) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P24 (0x1u << 24) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P25 (0x1u << 25) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P26 (0x1u << 26) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P27 (0x1u << 27) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P28 (0x1u << 28) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P29 (0x1u << 29) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P30 (0x1u << 30) /* (PIO_PSR) PIO Status */ +#define PIO_PSR_P31 (0x1u << 31) /* (PIO_PSR) PIO Status */ +/* -------- PIO_OER : (PIO Offset: 0x0010) Output Enable Register -------- */ +#define PIO_OER_P0 (0x1u << 0) /* (PIO_OER) Output Enable */ +#define PIO_OER_P1 (0x1u << 1) /* (PIO_OER) Output Enable */ +#define PIO_OER_P2 (0x1u << 2) /* (PIO_OER) Output Enable */ +#define PIO_OER_P3 (0x1u << 3) /* (PIO_OER) Output Enable */ +#define PIO_OER_P4 (0x1u << 4) /* (PIO_OER) Output Enable */ +#define PIO_OER_P5 (0x1u << 5) /* (PIO_OER) Output Enable */ +#define PIO_OER_P6 (0x1u << 6) /* (PIO_OER) Output Enable */ +#define PIO_OER_P7 (0x1u << 7) /* (PIO_OER) Output Enable */ +#define PIO_OER_P8 (0x1u << 8) /* (PIO_OER) Output Enable */ +#define PIO_OER_P9 (0x1u << 9) /* (PIO_OER) Output Enable */ +#define PIO_OER_P10 (0x1u << 10) /* (PIO_OER) Output Enable */ +#define PIO_OER_P11 (0x1u << 11) /* (PIO_OER) Output Enable */ +#define PIO_OER_P12 (0x1u << 12) /* (PIO_OER) Output Enable */ +#define PIO_OER_P13 (0x1u << 13) /* (PIO_OER) Output Enable */ +#define PIO_OER_P14 (0x1u << 14) /* (PIO_OER) Output Enable */ +#define PIO_OER_P15 (0x1u << 15) /* (PIO_OER) Output Enable */ +#define PIO_OER_P16 (0x1u << 16) /* (PIO_OER) Output Enable */ +#define PIO_OER_P17 (0x1u << 17) /* (PIO_OER) Output Enable */ +#define PIO_OER_P18 (0x1u << 18) /* (PIO_OER) Output Enable */ +#define PIO_OER_P19 (0x1u << 19) /* (PIO_OER) Output Enable */ +#define PIO_OER_P20 (0x1u << 20) /* (PIO_OER) Output Enable */ +#define PIO_OER_P21 (0x1u << 21) /* (PIO_OER) Output Enable */ +#define PIO_OER_P22 (0x1u << 22) /* (PIO_OER) Output Enable */ +#define PIO_OER_P23 (0x1u << 23) /* (PIO_OER) Output Enable */ +#define PIO_OER_P24 (0x1u << 24) /* (PIO_OER) Output Enable */ +#define PIO_OER_P25 (0x1u << 25) /* (PIO_OER) Output Enable */ +#define PIO_OER_P26 (0x1u << 26) /* (PIO_OER) Output Enable */ +#define PIO_OER_P27 (0x1u << 27) /* (PIO_OER) Output Enable */ +#define PIO_OER_P28 (0x1u << 28) /* (PIO_OER) Output Enable */ +#define PIO_OER_P29 (0x1u << 29) /* (PIO_OER) Output Enable */ +#define PIO_OER_P30 (0x1u << 30) /* (PIO_OER) Output Enable */ +#define PIO_OER_P31 (0x1u << 31) /* (PIO_OER) Output Enable */ +/* -------- PIO_ODR : (PIO Offset: 0x0014) Output Disable Register -------- */ +#define PIO_ODR_P0 (0x1u << 0) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P1 (0x1u << 1) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P2 (0x1u << 2) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P3 (0x1u << 3) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P4 (0x1u << 4) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P5 (0x1u << 5) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P6 (0x1u << 6) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P7 (0x1u << 7) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P8 (0x1u << 8) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P9 (0x1u << 9) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P10 (0x1u << 10) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P11 (0x1u << 11) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P12 (0x1u << 12) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P13 (0x1u << 13) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P14 (0x1u << 14) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P15 (0x1u << 15) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P16 (0x1u << 16) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P17 (0x1u << 17) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P18 (0x1u << 18) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P19 (0x1u << 19) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P20 (0x1u << 20) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P21 (0x1u << 21) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P22 (0x1u << 22) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P23 (0x1u << 23) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P24 (0x1u << 24) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P25 (0x1u << 25) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P26 (0x1u << 26) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P27 (0x1u << 27) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P28 (0x1u << 28) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P29 (0x1u << 29) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P30 (0x1u << 30) /* (PIO_ODR) Output Disable */ +#define PIO_ODR_P31 (0x1u << 31) /* (PIO_ODR) Output Disable */ +/* -------- PIO_OSR : (PIO Offset: 0x0018) Output Status Register -------- */ +#define PIO_OSR_P0 (0x1u << 0) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P1 (0x1u << 1) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P2 (0x1u << 2) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P3 (0x1u << 3) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P4 (0x1u << 4) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P5 (0x1u << 5) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P6 (0x1u << 6) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P7 (0x1u << 7) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P8 (0x1u << 8) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P9 (0x1u << 9) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P10 (0x1u << 10) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P11 (0x1u << 11) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P12 (0x1u << 12) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P13 (0x1u << 13) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P14 (0x1u << 14) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P15 (0x1u << 15) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P16 (0x1u << 16) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P17 (0x1u << 17) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P18 (0x1u << 18) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P19 (0x1u << 19) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P20 (0x1u << 20) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P21 (0x1u << 21) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P22 (0x1u << 22) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P23 (0x1u << 23) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P24 (0x1u << 24) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P25 (0x1u << 25) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P26 (0x1u << 26) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P27 (0x1u << 27) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P28 (0x1u << 28) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P29 (0x1u << 29) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P30 (0x1u << 30) /* (PIO_OSR) Output Status */ +#define PIO_OSR_P31 (0x1u << 31) /* (PIO_OSR) Output Status */ +/* -------- PIO_IFER : (PIO Offset: 0x0020) Glitch Input Filter Enable Register -------- */ +#define PIO_IFER_P0 (0x1u << 0) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P1 (0x1u << 1) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P2 (0x1u << 2) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P3 (0x1u << 3) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P4 (0x1u << 4) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P5 (0x1u << 5) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P6 (0x1u << 6) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P7 (0x1u << 7) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P8 (0x1u << 8) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P9 (0x1u << 9) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P10 (0x1u << 10) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P11 (0x1u << 11) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P12 (0x1u << 12) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P13 (0x1u << 13) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P14 (0x1u << 14) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P15 (0x1u << 15) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P16 (0x1u << 16) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P17 (0x1u << 17) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P18 (0x1u << 18) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P19 (0x1u << 19) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P20 (0x1u << 20) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P21 (0x1u << 21) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P22 (0x1u << 22) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P23 (0x1u << 23) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P24 (0x1u << 24) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P25 (0x1u << 25) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P26 (0x1u << 26) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P27 (0x1u << 27) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P28 (0x1u << 28) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P29 (0x1u << 29) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P30 (0x1u << 30) /* (PIO_IFER) Input Filter Enable */ +#define PIO_IFER_P31 (0x1u << 31) /* (PIO_IFER) Input Filter Enable */ +/* -------- PIO_IFDR : (PIO Offset: 0x0024) Glitch Input Filter Disable Register -------- */ +#define PIO_IFDR_P0 (0x1u << 0) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P1 (0x1u << 1) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P2 (0x1u << 2) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P3 (0x1u << 3) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P4 (0x1u << 4) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P5 (0x1u << 5) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P6 (0x1u << 6) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P7 (0x1u << 7) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P8 (0x1u << 8) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P9 (0x1u << 9) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P10 (0x1u << 10) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P11 (0x1u << 11) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P12 (0x1u << 12) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P13 (0x1u << 13) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P14 (0x1u << 14) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P15 (0x1u << 15) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P16 (0x1u << 16) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P17 (0x1u << 17) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P18 (0x1u << 18) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P19 (0x1u << 19) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P20 (0x1u << 20) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P21 (0x1u << 21) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P22 (0x1u << 22) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P23 (0x1u << 23) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P24 (0x1u << 24) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P25 (0x1u << 25) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P26 (0x1u << 26) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P27 (0x1u << 27) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P28 (0x1u << 28) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P29 (0x1u << 29) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P30 (0x1u << 30) /* (PIO_IFDR) Input Filter Disable */ +#define PIO_IFDR_P31 (0x1u << 31) /* (PIO_IFDR) Input Filter Disable */ +/* -------- PIO_IFSR : (PIO Offset: 0x0028) Glitch Input Filter Status Register -------- */ +#define PIO_IFSR_P0 (0x1u << 0) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P1 (0x1u << 1) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P2 (0x1u << 2) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P3 (0x1u << 3) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P4 (0x1u << 4) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P5 (0x1u << 5) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P6 (0x1u << 6) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P7 (0x1u << 7) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P8 (0x1u << 8) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P9 (0x1u << 9) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P10 (0x1u << 10) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P11 (0x1u << 11) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P12 (0x1u << 12) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P13 (0x1u << 13) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P14 (0x1u << 14) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P15 (0x1u << 15) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P16 (0x1u << 16) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P17 (0x1u << 17) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P18 (0x1u << 18) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P19 (0x1u << 19) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P20 (0x1u << 20) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P21 (0x1u << 21) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P22 (0x1u << 22) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P23 (0x1u << 23) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P24 (0x1u << 24) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P25 (0x1u << 25) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P26 (0x1u << 26) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P27 (0x1u << 27) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P28 (0x1u << 28) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P29 (0x1u << 29) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P30 (0x1u << 30) /* (PIO_IFSR) Input Filer Status */ +#define PIO_IFSR_P31 (0x1u << 31) /* (PIO_IFSR) Input Filer Status */ +/* -------- PIO_SODR : (PIO Offset: 0x0030) Set Output Data Register -------- */ +#define PIO_SODR_P0 (0x1u << 0) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P1 (0x1u << 1) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P2 (0x1u << 2) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P3 (0x1u << 3) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P4 (0x1u << 4) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P5 (0x1u << 5) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P6 (0x1u << 6) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P7 (0x1u << 7) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P8 (0x1u << 8) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P9 (0x1u << 9) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P10 (0x1u << 10) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P11 (0x1u << 11) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P12 (0x1u << 12) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P13 (0x1u << 13) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P14 (0x1u << 14) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P15 (0x1u << 15) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P16 (0x1u << 16) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P17 (0x1u << 17) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P18 (0x1u << 18) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P19 (0x1u << 19) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P20 (0x1u << 20) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P21 (0x1u << 21) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P22 (0x1u << 22) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P23 (0x1u << 23) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P24 (0x1u << 24) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P25 (0x1u << 25) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P26 (0x1u << 26) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P27 (0x1u << 27) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P28 (0x1u << 28) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P29 (0x1u << 29) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P30 (0x1u << 30) /* (PIO_SODR) Set Output Data */ +#define PIO_SODR_P31 (0x1u << 31) /* (PIO_SODR) Set Output Data */ +/* -------- PIO_CODR : (PIO Offset: 0x0034) Clear Output Data Register -------- */ +#define PIO_CODR_P0 (0x1u << 0) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P1 (0x1u << 1) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P2 (0x1u << 2) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P3 (0x1u << 3) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P4 (0x1u << 4) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P5 (0x1u << 5) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P6 (0x1u << 6) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P7 (0x1u << 7) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P8 (0x1u << 8) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P9 (0x1u << 9) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P10 (0x1u << 10) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P11 (0x1u << 11) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P12 (0x1u << 12) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P13 (0x1u << 13) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P14 (0x1u << 14) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P15 (0x1u << 15) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P16 (0x1u << 16) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P17 (0x1u << 17) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P18 (0x1u << 18) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P19 (0x1u << 19) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P20 (0x1u << 20) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P21 (0x1u << 21) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P22 (0x1u << 22) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P23 (0x1u << 23) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P24 (0x1u << 24) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P25 (0x1u << 25) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P26 (0x1u << 26) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P27 (0x1u << 27) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P28 (0x1u << 28) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P29 (0x1u << 29) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P30 (0x1u << 30) /* (PIO_CODR) Clear Output Data */ +#define PIO_CODR_P31 (0x1u << 31) /* (PIO_CODR) Clear Output Data */ +/* -------- PIO_ODSR : (PIO Offset: 0x0038) Output Data Status Register -------- */ +#define PIO_ODSR_P0 (0x1u << 0) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P1 (0x1u << 1) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P2 (0x1u << 2) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P3 (0x1u << 3) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P4 (0x1u << 4) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P5 (0x1u << 5) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P6 (0x1u << 6) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P7 (0x1u << 7) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P8 (0x1u << 8) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P9 (0x1u << 9) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P10 (0x1u << 10) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P11 (0x1u << 11) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P12 (0x1u << 12) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P13 (0x1u << 13) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P14 (0x1u << 14) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P15 (0x1u << 15) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P16 (0x1u << 16) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P17 (0x1u << 17) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P18 (0x1u << 18) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P19 (0x1u << 19) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P20 (0x1u << 20) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P21 (0x1u << 21) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P22 (0x1u << 22) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P23 (0x1u << 23) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P24 (0x1u << 24) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P25 (0x1u << 25) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P26 (0x1u << 26) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P27 (0x1u << 27) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P28 (0x1u << 28) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P29 (0x1u << 29) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P30 (0x1u << 30) /* (PIO_ODSR) Output Data Status */ +#define PIO_ODSR_P31 (0x1u << 31) /* (PIO_ODSR) Output Data Status */ +/* -------- PIO_PDSR : (PIO Offset: 0x003C) Pin Data Status Register -------- */ +#define PIO_PDSR_P0 (0x1u << 0) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P1 (0x1u << 1) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P2 (0x1u << 2) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P3 (0x1u << 3) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P4 (0x1u << 4) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P5 (0x1u << 5) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P6 (0x1u << 6) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P7 (0x1u << 7) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P8 (0x1u << 8) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P9 (0x1u << 9) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P10 (0x1u << 10) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P11 (0x1u << 11) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P12 (0x1u << 12) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P13 (0x1u << 13) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P14 (0x1u << 14) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P15 (0x1u << 15) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P16 (0x1u << 16) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P17 (0x1u << 17) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P18 (0x1u << 18) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P19 (0x1u << 19) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P20 (0x1u << 20) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P21 (0x1u << 21) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P22 (0x1u << 22) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P23 (0x1u << 23) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P24 (0x1u << 24) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P25 (0x1u << 25) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P26 (0x1u << 26) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P27 (0x1u << 27) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P28 (0x1u << 28) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P29 (0x1u << 29) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P30 (0x1u << 30) /* (PIO_PDSR) Output Data Status */ +#define PIO_PDSR_P31 (0x1u << 31) /* (PIO_PDSR) Output Data Status */ +/* -------- PIO_IER : (PIO Offset: 0x0040) Interrupt Enable Register -------- */ +#define PIO_IER_P0 (0x1u << 0) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P1 (0x1u << 1) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P2 (0x1u << 2) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P3 (0x1u << 3) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P4 (0x1u << 4) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P5 (0x1u << 5) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P6 (0x1u << 6) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P7 (0x1u << 7) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P8 (0x1u << 8) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P9 (0x1u << 9) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P10 (0x1u << 10) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P11 (0x1u << 11) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P12 (0x1u << 12) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P13 (0x1u << 13) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P14 (0x1u << 14) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P15 (0x1u << 15) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P16 (0x1u << 16) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P17 (0x1u << 17) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P18 (0x1u << 18) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P19 (0x1u << 19) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P20 (0x1u << 20) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P21 (0x1u << 21) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P22 (0x1u << 22) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P23 (0x1u << 23) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P24 (0x1u << 24) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P25 (0x1u << 25) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P26 (0x1u << 26) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P27 (0x1u << 27) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P28 (0x1u << 28) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P29 (0x1u << 29) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P30 (0x1u << 30) /* (PIO_IER) Input Change Interrupt Enable */ +#define PIO_IER_P31 (0x1u << 31) /* (PIO_IER) Input Change Interrupt Enable */ +/* -------- PIO_IDR : (PIO Offset: 0x0044) Interrupt Disable Register -------- */ +#define PIO_IDR_P0 (0x1u << 0) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P1 (0x1u << 1) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P2 (0x1u << 2) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P3 (0x1u << 3) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P4 (0x1u << 4) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P5 (0x1u << 5) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P6 (0x1u << 6) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P7 (0x1u << 7) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P8 (0x1u << 8) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P9 (0x1u << 9) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P10 (0x1u << 10) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P11 (0x1u << 11) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P12 (0x1u << 12) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P13 (0x1u << 13) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P14 (0x1u << 14) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P15 (0x1u << 15) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P16 (0x1u << 16) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P17 (0x1u << 17) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P18 (0x1u << 18) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P19 (0x1u << 19) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P20 (0x1u << 20) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P21 (0x1u << 21) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P22 (0x1u << 22) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P23 (0x1u << 23) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P24 (0x1u << 24) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P25 (0x1u << 25) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P26 (0x1u << 26) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P27 (0x1u << 27) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P28 (0x1u << 28) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P29 (0x1u << 29) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P30 (0x1u << 30) /* (PIO_IDR) Input Change Interrupt Disable */ +#define PIO_IDR_P31 (0x1u << 31) /* (PIO_IDR) Input Change Interrupt Disable */ +/* -------- PIO_IMR : (PIO Offset: 0x0048) Interrupt Mask Register -------- */ +#define PIO_IMR_P0 (0x1u << 0) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P1 (0x1u << 1) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P2 (0x1u << 2) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P3 (0x1u << 3) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P4 (0x1u << 4) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P5 (0x1u << 5) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P6 (0x1u << 6) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P7 (0x1u << 7) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P8 (0x1u << 8) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P9 (0x1u << 9) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P10 (0x1u << 10) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P11 (0x1u << 11) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P12 (0x1u << 12) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P13 (0x1u << 13) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P14 (0x1u << 14) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P15 (0x1u << 15) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P16 (0x1u << 16) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P17 (0x1u << 17) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P18 (0x1u << 18) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P19 (0x1u << 19) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P20 (0x1u << 20) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P21 (0x1u << 21) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P22 (0x1u << 22) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P23 (0x1u << 23) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P24 (0x1u << 24) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P25 (0x1u << 25) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P26 (0x1u << 26) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P27 (0x1u << 27) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P28 (0x1u << 28) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P29 (0x1u << 29) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P30 (0x1u << 30) /* (PIO_IMR) Input Change Interrupt Mask */ +#define PIO_IMR_P31 (0x1u << 31) /* (PIO_IMR) Input Change Interrupt Mask */ +/* -------- PIO_ISR : (PIO Offset: 0x004C) Interrupt Status Register -------- */ +#define PIO_ISR_P0 (0x1u << 0) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P1 (0x1u << 1) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P2 (0x1u << 2) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P3 (0x1u << 3) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P4 (0x1u << 4) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P5 (0x1u << 5) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P6 (0x1u << 6) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P7 (0x1u << 7) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P8 (0x1u << 8) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P9 (0x1u << 9) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P10 (0x1u << 10) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P11 (0x1u << 11) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P12 (0x1u << 12) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P13 (0x1u << 13) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P14 (0x1u << 14) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P15 (0x1u << 15) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P16 (0x1u << 16) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P17 (0x1u << 17) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P18 (0x1u << 18) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P19 (0x1u << 19) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P20 (0x1u << 20) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P21 (0x1u << 21) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P22 (0x1u << 22) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P23 (0x1u << 23) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P24 (0x1u << 24) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P25 (0x1u << 25) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P26 (0x1u << 26) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P27 (0x1u << 27) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P28 (0x1u << 28) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P29 (0x1u << 29) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P30 (0x1u << 30) /* (PIO_ISR) Input Change Interrupt Status */ +#define PIO_ISR_P31 (0x1u << 31) /* (PIO_ISR) Input Change Interrupt Status */ +/* -------- PIO_MDER : (PIO Offset: 0x0050) Multi-driver Enable Register -------- */ +#define PIO_MDER_P0 (0x1u << 0) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P1 (0x1u << 1) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P2 (0x1u << 2) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P3 (0x1u << 3) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P4 (0x1u << 4) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P5 (0x1u << 5) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P6 (0x1u << 6) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P7 (0x1u << 7) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P8 (0x1u << 8) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P9 (0x1u << 9) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P10 (0x1u << 10) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P11 (0x1u << 11) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P12 (0x1u << 12) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P13 (0x1u << 13) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P14 (0x1u << 14) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P15 (0x1u << 15) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P16 (0x1u << 16) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P17 (0x1u << 17) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P18 (0x1u << 18) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P19 (0x1u << 19) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P20 (0x1u << 20) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P21 (0x1u << 21) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P22 (0x1u << 22) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P23 (0x1u << 23) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P24 (0x1u << 24) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P25 (0x1u << 25) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P26 (0x1u << 26) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P27 (0x1u << 27) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P28 (0x1u << 28) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P29 (0x1u << 29) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P30 (0x1u << 30) /* (PIO_MDER) Multi Drive Enable. */ +#define PIO_MDER_P31 (0x1u << 31) /* (PIO_MDER) Multi Drive Enable. */ +/* -------- PIO_MDDR : (PIO Offset: 0x0054) Multi-driver Disable Register -------- */ +#define PIO_MDDR_P0 (0x1u << 0) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P1 (0x1u << 1) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P2 (0x1u << 2) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P3 (0x1u << 3) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P4 (0x1u << 4) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P5 (0x1u << 5) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P6 (0x1u << 6) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P7 (0x1u << 7) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P8 (0x1u << 8) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P9 (0x1u << 9) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P10 (0x1u << 10) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P11 (0x1u << 11) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P12 (0x1u << 12) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P13 (0x1u << 13) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P14 (0x1u << 14) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P15 (0x1u << 15) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P16 (0x1u << 16) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P17 (0x1u << 17) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P18 (0x1u << 18) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P19 (0x1u << 19) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P20 (0x1u << 20) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P21 (0x1u << 21) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P22 (0x1u << 22) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P23 (0x1u << 23) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P24 (0x1u << 24) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P25 (0x1u << 25) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P26 (0x1u << 26) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P27 (0x1u << 27) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P28 (0x1u << 28) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P29 (0x1u << 29) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P30 (0x1u << 30) /* (PIO_MDDR) Multi Drive Disable. */ +#define PIO_MDDR_P31 (0x1u << 31) /* (PIO_MDDR) Multi Drive Disable. */ +/* -------- PIO_MDSR : (PIO Offset: 0x0058) Multi-driver Status Register -------- */ +#define PIO_MDSR_P0 (0x1u << 0) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P1 (0x1u << 1) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P2 (0x1u << 2) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P3 (0x1u << 3) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P4 (0x1u << 4) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P5 (0x1u << 5) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P6 (0x1u << 6) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P7 (0x1u << 7) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P8 (0x1u << 8) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P9 (0x1u << 9) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P10 (0x1u << 10) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P11 (0x1u << 11) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P12 (0x1u << 12) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P13 (0x1u << 13) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P14 (0x1u << 14) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P15 (0x1u << 15) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P16 (0x1u << 16) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P17 (0x1u << 17) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P18 (0x1u << 18) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P19 (0x1u << 19) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P20 (0x1u << 20) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P21 (0x1u << 21) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P22 (0x1u << 22) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P23 (0x1u << 23) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P24 (0x1u << 24) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P25 (0x1u << 25) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P26 (0x1u << 26) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P27 (0x1u << 27) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P28 (0x1u << 28) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P29 (0x1u << 29) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P30 (0x1u << 30) /* (PIO_MDSR) Multi Drive Status. */ +#define PIO_MDSR_P31 (0x1u << 31) /* (PIO_MDSR) Multi Drive Status. */ +/* -------- PIO_PUDR : (PIO Offset: 0x0060) Pull-up Disable Register -------- */ +#define PIO_PUDR_P0 (0x1u << 0) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P1 (0x1u << 1) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P2 (0x1u << 2) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P3 (0x1u << 3) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P4 (0x1u << 4) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P5 (0x1u << 5) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P6 (0x1u << 6) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P7 (0x1u << 7) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P8 (0x1u << 8) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P9 (0x1u << 9) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P10 (0x1u << 10) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P11 (0x1u << 11) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P12 (0x1u << 12) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P13 (0x1u << 13) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P14 (0x1u << 14) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P15 (0x1u << 15) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P16 (0x1u << 16) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P17 (0x1u << 17) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P18 (0x1u << 18) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P19 (0x1u << 19) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P20 (0x1u << 20) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P21 (0x1u << 21) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P22 (0x1u << 22) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P23 (0x1u << 23) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P24 (0x1u << 24) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P25 (0x1u << 25) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P26 (0x1u << 26) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P27 (0x1u << 27) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P28 (0x1u << 28) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P29 (0x1u << 29) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P30 (0x1u << 30) /* (PIO_PUDR) Pull Up Disable. */ +#define PIO_PUDR_P31 (0x1u << 31) /* (PIO_PUDR) Pull Up Disable. */ +/* -------- PIO_PUER : (PIO Offset: 0x0064) Pull-up Enable Register -------- */ +#define PIO_PUER_P0 (0x1u << 0) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P1 (0x1u << 1) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P2 (0x1u << 2) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P3 (0x1u << 3) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P4 (0x1u << 4) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P5 (0x1u << 5) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P6 (0x1u << 6) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P7 (0x1u << 7) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P8 (0x1u << 8) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P9 (0x1u << 9) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P10 (0x1u << 10) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P11 (0x1u << 11) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P12 (0x1u << 12) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P13 (0x1u << 13) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P14 (0x1u << 14) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P15 (0x1u << 15) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P16 (0x1u << 16) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P17 (0x1u << 17) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P18 (0x1u << 18) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P19 (0x1u << 19) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P20 (0x1u << 20) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P21 (0x1u << 21) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P22 (0x1u << 22) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P23 (0x1u << 23) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P24 (0x1u << 24) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P25 (0x1u << 25) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P26 (0x1u << 26) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P27 (0x1u << 27) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P28 (0x1u << 28) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P29 (0x1u << 29) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P30 (0x1u << 30) /* (PIO_PUER) Pull Up Enable. */ +#define PIO_PUER_P31 (0x1u << 31) /* (PIO_PUER) Pull Up Enable. */ +/* -------- PIO_PUSR : (PIO Offset: 0x0068) Pad Pull-up Status Register -------- */ +#define PIO_PUSR_P0 (0x1u << 0) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P1 (0x1u << 1) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P2 (0x1u << 2) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P3 (0x1u << 3) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P4 (0x1u << 4) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P5 (0x1u << 5) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P6 (0x1u << 6) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P7 (0x1u << 7) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P8 (0x1u << 8) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P9 (0x1u << 9) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P10 (0x1u << 10) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P11 (0x1u << 11) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P12 (0x1u << 12) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P13 (0x1u << 13) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P14 (0x1u << 14) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P15 (0x1u << 15) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P16 (0x1u << 16) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P17 (0x1u << 17) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P18 (0x1u << 18) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P19 (0x1u << 19) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P20 (0x1u << 20) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P21 (0x1u << 21) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P22 (0x1u << 22) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P23 (0x1u << 23) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P24 (0x1u << 24) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P25 (0x1u << 25) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P26 (0x1u << 26) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P27 (0x1u << 27) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P28 (0x1u << 28) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P29 (0x1u << 29) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P30 (0x1u << 30) /* (PIO_PUSR) Pull Up Status. */ +#define PIO_PUSR_P31 (0x1u << 31) /* (PIO_PUSR) Pull Up Status. */ +/* -------- PIO_ABCDSR[2] : (PIO Offset: 0x0070) Peripheral Select Register -------- */ +#define PIO_ABCDSR_P0 (0x1u << 0) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P1 (0x1u << 1) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P2 (0x1u << 2) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P3 (0x1u << 3) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P4 (0x1u << 4) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P5 (0x1u << 5) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P6 (0x1u << 6) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P7 (0x1u << 7) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P8 (0x1u << 8) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P9 (0x1u << 9) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P10 (0x1u << 10) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P11 (0x1u << 11) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P12 (0x1u << 12) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P13 (0x1u << 13) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P14 (0x1u << 14) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P15 (0x1u << 15) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P16 (0x1u << 16) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P17 (0x1u << 17) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P18 (0x1u << 18) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P19 (0x1u << 19) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P20 (0x1u << 20) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P21 (0x1u << 21) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P22 (0x1u << 22) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P23 (0x1u << 23) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P24 (0x1u << 24) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P25 (0x1u << 25) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P26 (0x1u << 26) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P27 (0x1u << 27) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P28 (0x1u << 28) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P29 (0x1u << 29) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P30 (0x1u << 30) /* (PIO_ABCDSR[2]) Peripheral Select. */ +#define PIO_ABCDSR_P31 (0x1u << 31) /* (PIO_ABCDSR[2]) Peripheral Select. */ +/* -------- PIO_IFSCDR : (PIO Offset: 0x0080) Input Filter Slow Clock Disable Register -------- */ +#define PIO_IFSCDR_P0 (0x1u << 0) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P1 (0x1u << 1) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P2 (0x1u << 2) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P3 (0x1u << 3) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P4 (0x1u << 4) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P5 (0x1u << 5) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P6 (0x1u << 6) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P7 (0x1u << 7) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P8 (0x1u << 8) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P9 (0x1u << 9) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P10 (0x1u << 10) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P11 (0x1u << 11) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P12 (0x1u << 12) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P13 (0x1u << 13) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P14 (0x1u << 14) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P15 (0x1u << 15) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P16 (0x1u << 16) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P17 (0x1u << 17) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P18 (0x1u << 18) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P19 (0x1u << 19) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P20 (0x1u << 20) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P21 (0x1u << 21) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P22 (0x1u << 22) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P23 (0x1u << 23) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P24 (0x1u << 24) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P25 (0x1u << 25) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P26 (0x1u << 26) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P27 (0x1u << 27) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P28 (0x1u << 28) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P29 (0x1u << 29) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P30 (0x1u << 30) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +#define PIO_IFSCDR_P31 (0x1u << 31) /* (PIO_IFSCDR) PIO Clock Glitch Filtering Select. */ +/* -------- PIO_IFSCER : (PIO Offset: 0x0084) Input Filter Slow Clock Enable Register -------- */ +#define PIO_IFSCER_P0 (0x1u << 0) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P1 (0x1u << 1) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P2 (0x1u << 2) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P3 (0x1u << 3) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P4 (0x1u << 4) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P5 (0x1u << 5) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P6 (0x1u << 6) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P7 (0x1u << 7) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P8 (0x1u << 8) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P9 (0x1u << 9) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P10 (0x1u << 10) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P11 (0x1u << 11) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P12 (0x1u << 12) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P13 (0x1u << 13) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P14 (0x1u << 14) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P15 (0x1u << 15) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P16 (0x1u << 16) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P17 (0x1u << 17) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P18 (0x1u << 18) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P19 (0x1u << 19) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P20 (0x1u << 20) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P21 (0x1u << 21) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P22 (0x1u << 22) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P23 (0x1u << 23) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P24 (0x1u << 24) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P25 (0x1u << 25) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P26 (0x1u << 26) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P27 (0x1u << 27) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P28 (0x1u << 28) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P29 (0x1u << 29) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P30 (0x1u << 30) /* (PIO_IFSCER) Debouncing Filtering Select. */ +#define PIO_IFSCER_P31 (0x1u << 31) /* (PIO_IFSCER) Debouncing Filtering Select. */ +/* -------- PIO_IFSCSR : (PIO Offset: 0x0088) Input Filter Slow Clock Status Register -------- */ +#define PIO_IFSCSR_P0 (0x1u << 0) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P1 (0x1u << 1) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P2 (0x1u << 2) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P3 (0x1u << 3) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P4 (0x1u << 4) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P5 (0x1u << 5) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P6 (0x1u << 6) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P7 (0x1u << 7) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P8 (0x1u << 8) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P9 (0x1u << 9) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P10 (0x1u << 10) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P11 (0x1u << 11) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P12 (0x1u << 12) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P13 (0x1u << 13) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P14 (0x1u << 14) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P15 (0x1u << 15) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P16 (0x1u << 16) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P17 (0x1u << 17) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P18 (0x1u << 18) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P19 (0x1u << 19) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P20 (0x1u << 20) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P21 (0x1u << 21) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P22 (0x1u << 22) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P23 (0x1u << 23) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P24 (0x1u << 24) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P25 (0x1u << 25) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P26 (0x1u << 26) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P27 (0x1u << 27) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P28 (0x1u << 28) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P29 (0x1u << 29) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P30 (0x1u << 30) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +#define PIO_IFSCSR_P31 (0x1u << 31) /* (PIO_IFSCSR) Glitch or Debouncing Filter Selection Status */ +/* -------- PIO_SCDR : (PIO Offset: 0x008C) Slow Clock Divider Debouncing Register -------- */ +#define PIO_SCDR_DIV0 (0x1u << 0) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV1 (0x1u << 1) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV2 (0x1u << 2) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV3 (0x1u << 3) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV4 (0x1u << 4) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV5 (0x1u << 5) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV6 (0x1u << 6) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV7 (0x1u << 7) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV8 (0x1u << 8) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV9 (0x1u << 9) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV10 (0x1u << 10) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV11 (0x1u << 11) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV12 (0x1u << 12) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +#define PIO_SCDR_DIV13 (0x1u << 13) /* (PIO_SCDR) Slow Clock Divider Selection for Debouncing */ +/* -------- PIO_PPDDR : (PIO Offset: 0x0090) Pad Pull-down Disable Register -------- */ +#define PIO_PPDDR_P0 (0x1u << 0) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P1 (0x1u << 1) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P2 (0x1u << 2) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P3 (0x1u << 3) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P4 (0x1u << 4) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P5 (0x1u << 5) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P6 (0x1u << 6) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P7 (0x1u << 7) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P8 (0x1u << 8) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P9 (0x1u << 9) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P10 (0x1u << 10) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P11 (0x1u << 11) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P12 (0x1u << 12) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P13 (0x1u << 13) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P14 (0x1u << 14) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P15 (0x1u << 15) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P16 (0x1u << 16) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P17 (0x1u << 17) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P18 (0x1u << 18) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P19 (0x1u << 19) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P20 (0x1u << 20) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P21 (0x1u << 21) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P22 (0x1u << 22) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P23 (0x1u << 23) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P24 (0x1u << 24) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P25 (0x1u << 25) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P26 (0x1u << 26) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P27 (0x1u << 27) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P28 (0x1u << 28) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P29 (0x1u << 29) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P30 (0x1u << 30) /* (PIO_PPDDR) Pull Down Disable. */ +#define PIO_PPDDR_P31 (0x1u << 31) /* (PIO_PPDDR) Pull Down Disable. */ +/* -------- PIO_PPDER : (PIO Offset: 0x0094) Pad Pull-down Enable Register -------- */ +#define PIO_PPDER_P0 (0x1u << 0) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P1 (0x1u << 1) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P2 (0x1u << 2) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P3 (0x1u << 3) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P4 (0x1u << 4) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P5 (0x1u << 5) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P6 (0x1u << 6) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P7 (0x1u << 7) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P8 (0x1u << 8) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P9 (0x1u << 9) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P10 (0x1u << 10) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P11 (0x1u << 11) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P12 (0x1u << 12) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P13 (0x1u << 13) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P14 (0x1u << 14) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P15 (0x1u << 15) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P16 (0x1u << 16) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P17 (0x1u << 17) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P18 (0x1u << 18) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P19 (0x1u << 19) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P20 (0x1u << 20) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P21 (0x1u << 21) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P22 (0x1u << 22) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P23 (0x1u << 23) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P24 (0x1u << 24) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P25 (0x1u << 25) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P26 (0x1u << 26) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P27 (0x1u << 27) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P28 (0x1u << 28) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P29 (0x1u << 29) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P30 (0x1u << 30) /* (PIO_PPDER) Pull Down Enable. */ +#define PIO_PPDER_P31 (0x1u << 31) /* (PIO_PPDER) Pull Down Enable. */ +/* -------- PIO_PPDSR : (PIO Offset: 0x0098) Pad Pull-down Status Register -------- */ +#define PIO_PPDSR_P0 (0x1u << 0) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P1 (0x1u << 1) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P2 (0x1u << 2) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P3 (0x1u << 3) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P4 (0x1u << 4) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P5 (0x1u << 5) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P6 (0x1u << 6) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P7 (0x1u << 7) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P8 (0x1u << 8) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P9 (0x1u << 9) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P10 (0x1u << 10) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P11 (0x1u << 11) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P12 (0x1u << 12) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P13 (0x1u << 13) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P14 (0x1u << 14) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P15 (0x1u << 15) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P16 (0x1u << 16) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P17 (0x1u << 17) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P18 (0x1u << 18) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P19 (0x1u << 19) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P20 (0x1u << 20) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P21 (0x1u << 21) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P22 (0x1u << 22) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P23 (0x1u << 23) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P24 (0x1u << 24) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P25 (0x1u << 25) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P26 (0x1u << 26) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P27 (0x1u << 27) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P28 (0x1u << 28) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P29 (0x1u << 29) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P30 (0x1u << 30) /* (PIO_PPDSR) Pull Down Status. */ +#define PIO_PPDSR_P31 (0x1u << 31) /* (PIO_PPDSR) Pull Down Status. */ +/* -------- PIO_OWER : (PIO Offset: 0x00A0) Output Write Enable -------- */ +#define PIO_OWER_P0 (0x1u << 0) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P1 (0x1u << 1) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P2 (0x1u << 2) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P3 (0x1u << 3) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P4 (0x1u << 4) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P5 (0x1u << 5) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P6 (0x1u << 6) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P7 (0x1u << 7) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P8 (0x1u << 8) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P9 (0x1u << 9) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P10 (0x1u << 10) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P11 (0x1u << 11) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P12 (0x1u << 12) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P13 (0x1u << 13) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P14 (0x1u << 14) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P15 (0x1u << 15) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P16 (0x1u << 16) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P17 (0x1u << 17) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P18 (0x1u << 18) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P19 (0x1u << 19) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P20 (0x1u << 20) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P21 (0x1u << 21) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P22 (0x1u << 22) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P23 (0x1u << 23) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P24 (0x1u << 24) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P25 (0x1u << 25) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P26 (0x1u << 26) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P27 (0x1u << 27) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P28 (0x1u << 28) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P29 (0x1u << 29) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P30 (0x1u << 30) /* (PIO_OWER) Output Write Enable. */ +#define PIO_OWER_P31 (0x1u << 31) /* (PIO_OWER) Output Write Enable. */ +/* -------- PIO_OWDR : (PIO Offset: 0x00A4) Output Write Disable -------- */ +#define PIO_OWDR_P0 (0x1u << 0) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P1 (0x1u << 1) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P2 (0x1u << 2) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P3 (0x1u << 3) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P4 (0x1u << 4) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P5 (0x1u << 5) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P6 (0x1u << 6) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P7 (0x1u << 7) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P8 (0x1u << 8) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P9 (0x1u << 9) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P10 (0x1u << 10) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P11 (0x1u << 11) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P12 (0x1u << 12) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P13 (0x1u << 13) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P14 (0x1u << 14) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P15 (0x1u << 15) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P16 (0x1u << 16) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P17 (0x1u << 17) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P18 (0x1u << 18) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P19 (0x1u << 19) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P20 (0x1u << 20) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P21 (0x1u << 21) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P22 (0x1u << 22) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P23 (0x1u << 23) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P24 (0x1u << 24) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P25 (0x1u << 25) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P26 (0x1u << 26) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P27 (0x1u << 27) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P28 (0x1u << 28) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P29 (0x1u << 29) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P30 (0x1u << 30) /* (PIO_OWDR) Output Write Disable. */ +#define PIO_OWDR_P31 (0x1u << 31) /* (PIO_OWDR) Output Write Disable. */ +/* -------- PIO_OWSR : (PIO Offset: 0x00A8) Output Write Status Register -------- */ +#define PIO_OWSR_P0 (0x1u << 0) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P1 (0x1u << 1) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P2 (0x1u << 2) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P3 (0x1u << 3) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P4 (0x1u << 4) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P5 (0x1u << 5) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P6 (0x1u << 6) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P7 (0x1u << 7) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P8 (0x1u << 8) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P9 (0x1u << 9) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P10 (0x1u << 10) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P11 (0x1u << 11) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P12 (0x1u << 12) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P13 (0x1u << 13) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P14 (0x1u << 14) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P15 (0x1u << 15) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P16 (0x1u << 16) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P17 (0x1u << 17) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P18 (0x1u << 18) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P19 (0x1u << 19) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P20 (0x1u << 20) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P21 (0x1u << 21) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P22 (0x1u << 22) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P23 (0x1u << 23) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P24 (0x1u << 24) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P25 (0x1u << 25) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P26 (0x1u << 26) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P27 (0x1u << 27) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P28 (0x1u << 28) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P29 (0x1u << 29) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P30 (0x1u << 30) /* (PIO_OWSR) Output Write Status. */ +#define PIO_OWSR_P31 (0x1u << 31) /* (PIO_OWSR) Output Write Status. */ +/* -------- PIO_AIMER : (PIO Offset: 0x00B0) Additional Interrupt Modes Enable Register -------- */ +#define PIO_AIMER_P0 (0x1u << 0) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P1 (0x1u << 1) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P2 (0x1u << 2) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P3 (0x1u << 3) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P4 (0x1u << 4) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P5 (0x1u << 5) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P6 (0x1u << 6) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P7 (0x1u << 7) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P8 (0x1u << 8) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P9 (0x1u << 9) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P10 (0x1u << 10) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P11 (0x1u << 11) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P12 (0x1u << 12) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P13 (0x1u << 13) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P14 (0x1u << 14) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P15 (0x1u << 15) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P16 (0x1u << 16) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P17 (0x1u << 17) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P18 (0x1u << 18) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P19 (0x1u << 19) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P20 (0x1u << 20) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P21 (0x1u << 21) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P22 (0x1u << 22) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P23 (0x1u << 23) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P24 (0x1u << 24) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P25 (0x1u << 25) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P26 (0x1u << 26) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P27 (0x1u << 27) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P28 (0x1u << 28) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P29 (0x1u << 29) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P30 (0x1u << 30) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +#define PIO_AIMER_P31 (0x1u << 31) /* (PIO_AIMER) Additional Interrupt Modes Enable. */ +/* -------- PIO_AIMDR : (PIO Offset: 0x00B4) Additional Interrupt Modes Disables Register -------- */ +#define PIO_AIMDR_P0 (0x1u << 0) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P1 (0x1u << 1) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P2 (0x1u << 2) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P3 (0x1u << 3) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P4 (0x1u << 4) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P5 (0x1u << 5) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P6 (0x1u << 6) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P7 (0x1u << 7) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P8 (0x1u << 8) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P9 (0x1u << 9) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P10 (0x1u << 10) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P11 (0x1u << 11) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P12 (0x1u << 12) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P13 (0x1u << 13) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P14 (0x1u << 14) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P15 (0x1u << 15) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P16 (0x1u << 16) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P17 (0x1u << 17) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P18 (0x1u << 18) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P19 (0x1u << 19) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P20 (0x1u << 20) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P21 (0x1u << 21) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P22 (0x1u << 22) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P23 (0x1u << 23) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P24 (0x1u << 24) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P25 (0x1u << 25) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P26 (0x1u << 26) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P27 (0x1u << 27) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P28 (0x1u << 28) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P29 (0x1u << 29) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P30 (0x1u << 30) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +#define PIO_AIMDR_P31 (0x1u << 31) /* (PIO_AIMDR) Additional Interrupt Modes Disable. */ +/* -------- PIO_AIMMR : (PIO Offset: 0x00B8) Additional Interrupt Modes Mask Register -------- */ +#define PIO_AIMMR_P0 (0x1u << 0) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P1 (0x1u << 1) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P2 (0x1u << 2) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P3 (0x1u << 3) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P4 (0x1u << 4) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P5 (0x1u << 5) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P6 (0x1u << 6) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P7 (0x1u << 7) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P8 (0x1u << 8) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P9 (0x1u << 9) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P10 (0x1u << 10) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P11 (0x1u << 11) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P12 (0x1u << 12) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P13 (0x1u << 13) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P14 (0x1u << 14) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P15 (0x1u << 15) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P16 (0x1u << 16) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P17 (0x1u << 17) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P18 (0x1u << 18) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P19 (0x1u << 19) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P20 (0x1u << 20) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P21 (0x1u << 21) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P22 (0x1u << 22) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P23 (0x1u << 23) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P24 (0x1u << 24) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P25 (0x1u << 25) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P26 (0x1u << 26) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P27 (0x1u << 27) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P28 (0x1u << 28) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P29 (0x1u << 29) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P30 (0x1u << 30) /* (PIO_AIMMR) Peripheral CD Status. */ +#define PIO_AIMMR_P31 (0x1u << 31) /* (PIO_AIMMR) Peripheral CD Status. */ +/* -------- PIO_ESR : (PIO Offset: 0x00C0) Edge Select Register -------- */ +#define PIO_ESR_P0 (0x1u << 0) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P1 (0x1u << 1) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P2 (0x1u << 2) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P3 (0x1u << 3) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P4 (0x1u << 4) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P5 (0x1u << 5) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P6 (0x1u << 6) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P7 (0x1u << 7) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P8 (0x1u << 8) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P9 (0x1u << 9) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P10 (0x1u << 10) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P11 (0x1u << 11) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P12 (0x1u << 12) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P13 (0x1u << 13) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P14 (0x1u << 14) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P15 (0x1u << 15) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P16 (0x1u << 16) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P17 (0x1u << 17) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P18 (0x1u << 18) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P19 (0x1u << 19) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P20 (0x1u << 20) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P21 (0x1u << 21) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P22 (0x1u << 22) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P23 (0x1u << 23) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P24 (0x1u << 24) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P25 (0x1u << 25) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P26 (0x1u << 26) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P27 (0x1u << 27) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P28 (0x1u << 28) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P29 (0x1u << 29) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P30 (0x1u << 30) /* (PIO_ESR) Edge Interrupt Selection. */ +#define PIO_ESR_P31 (0x1u << 31) /* (PIO_ESR) Edge Interrupt Selection. */ +/* -------- PIO_LSR : (PIO Offset: 0x00C4) Level Select Register -------- */ +#define PIO_LSR_P0 (0x1u << 0) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P1 (0x1u << 1) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P2 (0x1u << 2) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P3 (0x1u << 3) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P4 (0x1u << 4) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P5 (0x1u << 5) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P6 (0x1u << 6) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P7 (0x1u << 7) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P8 (0x1u << 8) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P9 (0x1u << 9) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P10 (0x1u << 10) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P11 (0x1u << 11) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P12 (0x1u << 12) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P13 (0x1u << 13) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P14 (0x1u << 14) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P15 (0x1u << 15) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P16 (0x1u << 16) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P17 (0x1u << 17) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P18 (0x1u << 18) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P19 (0x1u << 19) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P20 (0x1u << 20) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P21 (0x1u << 21) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P22 (0x1u << 22) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P23 (0x1u << 23) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P24 (0x1u << 24) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P25 (0x1u << 25) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P26 (0x1u << 26) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P27 (0x1u << 27) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P28 (0x1u << 28) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P29 (0x1u << 29) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P30 (0x1u << 30) /* (PIO_LSR) Level Interrupt Selection. */ +#define PIO_LSR_P31 (0x1u << 31) /* (PIO_LSR) Level Interrupt Selection. */ +/* -------- PIO_ELSR : (PIO Offset: 0x00C8) Edge/Level Status Register -------- */ +#define PIO_ELSR_P0 (0x1u << 0) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P1 (0x1u << 1) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P2 (0x1u << 2) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P3 (0x1u << 3) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P4 (0x1u << 4) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P5 (0x1u << 5) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P6 (0x1u << 6) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P7 (0x1u << 7) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P8 (0x1u << 8) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P9 (0x1u << 9) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P10 (0x1u << 10) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P11 (0x1u << 11) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P12 (0x1u << 12) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P13 (0x1u << 13) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P14 (0x1u << 14) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P15 (0x1u << 15) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P16 (0x1u << 16) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P17 (0x1u << 17) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P18 (0x1u << 18) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P19 (0x1u << 19) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P20 (0x1u << 20) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P21 (0x1u << 21) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P22 (0x1u << 22) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P23 (0x1u << 23) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P24 (0x1u << 24) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P25 (0x1u << 25) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P26 (0x1u << 26) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P27 (0x1u << 27) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P28 (0x1u << 28) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P29 (0x1u << 29) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P30 (0x1u << 30) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +#define PIO_ELSR_P31 (0x1u << 31) /* (PIO_ELSR) Edge/Level Interrupt source selection. */ +/* -------- PIO_FELLSR : (PIO Offset: 0x00D0) Falling Edge/Low Level Select Register -------- */ +#define PIO_FELLSR_P0 (0x1u << 0) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P1 (0x1u << 1) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P2 (0x1u << 2) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P3 (0x1u << 3) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P4 (0x1u << 4) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P5 (0x1u << 5) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P6 (0x1u << 6) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P7 (0x1u << 7) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P8 (0x1u << 8) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P9 (0x1u << 9) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P10 (0x1u << 10) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P11 (0x1u << 11) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P12 (0x1u << 12) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P13 (0x1u << 13) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P14 (0x1u << 14) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P15 (0x1u << 15) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P16 (0x1u << 16) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P17 (0x1u << 17) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P18 (0x1u << 18) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P19 (0x1u << 19) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P20 (0x1u << 20) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P21 (0x1u << 21) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P22 (0x1u << 22) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P23 (0x1u << 23) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P24 (0x1u << 24) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P25 (0x1u << 25) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P26 (0x1u << 26) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P27 (0x1u << 27) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P28 (0x1u << 28) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P29 (0x1u << 29) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P30 (0x1u << 30) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +#define PIO_FELLSR_P31 (0x1u << 31) /* (PIO_FELLSR) Falling Edge/Low Level Interrupt Selection. */ +/* -------- PIO_REHLSR : (PIO Offset: 0x00D4) Rising Edge/ High Level Select Register -------- */ +#define PIO_REHLSR_P0 (0x1u << 0) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P1 (0x1u << 1) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P2 (0x1u << 2) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P3 (0x1u << 3) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P4 (0x1u << 4) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P5 (0x1u << 5) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P6 (0x1u << 6) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P7 (0x1u << 7) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P8 (0x1u << 8) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P9 (0x1u << 9) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P10 (0x1u << 10) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P11 (0x1u << 11) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P12 (0x1u << 12) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P13 (0x1u << 13) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P14 (0x1u << 14) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P15 (0x1u << 15) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P16 (0x1u << 16) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P17 (0x1u << 17) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P18 (0x1u << 18) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P19 (0x1u << 19) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P20 (0x1u << 20) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P21 (0x1u << 21) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P22 (0x1u << 22) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P23 (0x1u << 23) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P24 (0x1u << 24) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P25 (0x1u << 25) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P26 (0x1u << 26) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P27 (0x1u << 27) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P28 (0x1u << 28) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P29 (0x1u << 29) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P30 (0x1u << 30) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +#define PIO_REHLSR_P31 (0x1u << 31) /* (PIO_REHLSR) Rising Edge /High Level Interrupt Selection. */ +/* -------- PIO_FRLHSR : (PIO Offset: 0x00D8) Fall/Rise - Low/High Status Register -------- */ +#define PIO_FRLHSR_P0 (0x1u << 0) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P1 (0x1u << 1) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P2 (0x1u << 2) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P3 (0x1u << 3) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P4 (0x1u << 4) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P5 (0x1u << 5) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P6 (0x1u << 6) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P7 (0x1u << 7) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P8 (0x1u << 8) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P9 (0x1u << 9) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P10 (0x1u << 10) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P11 (0x1u << 11) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P12 (0x1u << 12) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P13 (0x1u << 13) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P14 (0x1u << 14) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P15 (0x1u << 15) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P16 (0x1u << 16) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P17 (0x1u << 17) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P18 (0x1u << 18) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P19 (0x1u << 19) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P20 (0x1u << 20) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P21 (0x1u << 21) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P22 (0x1u << 22) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P23 (0x1u << 23) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P24 (0x1u << 24) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P25 (0x1u << 25) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P26 (0x1u << 26) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P27 (0x1u << 27) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P28 (0x1u << 28) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P29 (0x1u << 29) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P30 (0x1u << 30) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +#define PIO_FRLHSR_P31 (0x1u << 31) /* (PIO_FRLHSR) Edge /Level Interrupt Source Selection. */ +/* -------- PIO_LOCKSR : (PIO Offset: 0x00E0) Lock Status -------- */ +#define PIO_LOCKSR_P0 (0x1u << 0) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P1 (0x1u << 1) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P2 (0x1u << 2) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P3 (0x1u << 3) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P4 (0x1u << 4) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P5 (0x1u << 5) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P6 (0x1u << 6) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P7 (0x1u << 7) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P8 (0x1u << 8) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P9 (0x1u << 9) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P10 (0x1u << 10) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P11 (0x1u << 11) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P12 (0x1u << 12) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P13 (0x1u << 13) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P14 (0x1u << 14) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P15 (0x1u << 15) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P16 (0x1u << 16) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P17 (0x1u << 17) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P18 (0x1u << 18) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P19 (0x1u << 19) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P20 (0x1u << 20) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P21 (0x1u << 21) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P22 (0x1u << 22) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P23 (0x1u << 23) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P24 (0x1u << 24) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P25 (0x1u << 25) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P26 (0x1u << 26) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P27 (0x1u << 27) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P28 (0x1u << 28) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P29 (0x1u << 29) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P30 (0x1u << 30) /* (PIO_LOCKSR) Lock Status. */ +#define PIO_LOCKSR_P31 (0x1u << 31) /* (PIO_LOCKSR) Lock Status. */ +/* -------- PIO_WPMR : (PIO Offset: 0x00E4) Write Protect Mode Register -------- */ +#define PIO_WPMR_WPEN (0x1u << 0) /* (PIO_WPMR) Write Protect Enable */ +#define PIO_WPMR_WPKEY_Pos 8 +#define PIO_WPMR_WPKEY_Msk (0xffffffu << PIO_WPMR_WPKEY_Pos) /* (PIO_WPMR) Write Protect KEY */ +#define PIO_WPMR_WPKEY(value) ((PIO_WPMR_WPKEY_Msk & ((value) << PIO_WPMR_WPKEY_Pos))) +/* -------- PIO_WPSR : (PIO Offset: 0x00E8) Write Protect Status Register -------- */ +#define PIO_WPSR_WPVS (0x1u << 0) /* (PIO_WPSR) Write Protect Violation Status */ +#define PIO_WPSR_WPVSRC_Pos 8 +#define PIO_WPSR_WPVSRC_Msk (0xffffu << PIO_WPSR_WPVSRC_Pos) /* (PIO_WPSR) Write Protect Violation Source */ +/* -------- PIO_SCHMITT : (PIO Offset: 0x0100) Schmitt Trigger Register -------- */ +#define PIO_SCHMITT_SCHMITT0 (0x1u << 0) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT1 (0x1u << 1) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT2 (0x1u << 2) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT3 (0x1u << 3) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT4 (0x1u << 4) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT5 (0x1u << 5) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT6 (0x1u << 6) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT7 (0x1u << 7) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT8 (0x1u << 8) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT9 (0x1u << 9) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT10 (0x1u << 10) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT11 (0x1u << 11) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT12 (0x1u << 12) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT13 (0x1u << 13) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT14 (0x1u << 14) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT15 (0x1u << 15) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT16 (0x1u << 16) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT17 (0x1u << 17) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT18 (0x1u << 18) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT19 (0x1u << 19) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT20 (0x1u << 20) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT21 (0x1u << 21) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT22 (0x1u << 22) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT23 (0x1u << 23) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT24 (0x1u << 24) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT25 (0x1u << 25) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT26 (0x1u << 26) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT27 (0x1u << 27) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT28 (0x1u << 28) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT29 (0x1u << 29) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT30 (0x1u << 30) /* (PIO_SCHMITT) */ +#define PIO_SCHMITT_SCHMITT31 (0x1u << 31) /* (PIO_SCHMITT) */ + + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Pulse Width Modulation Controller */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* PwmCh_num hardware registers */ +typedef struct { + RwReg PWM_CMR; /* (PwmCh_num Offset: 0x0) PWM Channel Mode Register */ + RwReg PWM_CDTY; /* (PwmCh_num Offset: 0x4) PWM Channel Duty Cycle Register */ + RwReg PWM_CPRD; /* (PwmCh_num Offset: 0x8) PWM Channel Period Register */ + RwReg PWM_CCNT; /* (PwmCh_num Offset: 0xC) PWM Channel Counter Register */ + RwReg PWM_CUPD; /* (PwmCh_num Offset: 0x10) PWM Channel Update Register */ + RwReg Reserved1[3]; +} PwmCh_num; +/* Pwm hardware registers */ +typedef struct { + RwReg PWM_MR; /* (Pwm Offset: 0x00) PWM Mode Register */ + WoReg PWM_ENA; /* (Pwm Offset: 0x04) PWM Enable Register */ + WoReg PWM_DIS; /* (Pwm Offset: 0x08) PWM Disable Register */ + RoReg PWM_SR; /* (Pwm Offset: 0x0C) PWM Status Register */ + WoReg PWM_IER; /* (Pwm Offset: 0x10) PWM Interrupt Enable Register */ + WoReg PWM_IDR; /* (Pwm Offset: 0x14) PWM Interrupt Disable Register */ + RoReg PWM_IMR; /* (Pwm Offset: 0x18) PWM Interrupt Mask Register */ + RoReg PWM_ISR; /* (Pwm Offset: 0x1C) PWM Interrupt Status Register */ + RwReg Reserved1[120]; + PwmCh_num PWM_CH_NUM[4]; /* (Pwm Offset: 0x200) ch_num = 0 .. 3 */ +} Pwm; +#endif /* __ASSEMBLY__ */ +/* -------- PWM_MR : (PWM Offset: 0x00) PWM Mode Register -------- */ +#define PWM_MR_DIVA_Pos 0 +#define PWM_MR_DIVA_Msk (0xffu << PWM_MR_DIVA_Pos) /* (PWM_MR) CLKA, CLKB Divide Factor */ +#define PWM_MR_DIVA_CLK_OFF (0x0u << 0) /* (PWM_MR) CLKA, CLKB clock is turned off */ +#define PWM_MR_DIVA_CLK_DIV1 (0x1u << 0) /* (PWM_MR) CLKA, CLKB clock is clock selected by PREA, PREB */ +#define PWM_MR_PREA_Pos 8 +#define PWM_MR_PREA_Msk (0xfu << PWM_MR_PREA_Pos) /* (PWM_MR) */ +#define PWM_MR_PREA_MCK (0x0u << 8) /* (PWM_MR) Master Clock */ +#define PWM_MR_PREA_MCKDIV2 (0x1u << 8) /* (PWM_MR) Master Clock divided by 2 */ +#define PWM_MR_PREA_MCKDIV4 (0x2u << 8) /* (PWM_MR) Master Clock divided by 4 */ +#define PWM_MR_PREA_MCKDIV8 (0x3u << 8) /* (PWM_MR) Master Clock divided by 8 */ +#define PWM_MR_PREA_MCKDIV16 (0x4u << 8) /* (PWM_MR) Master Clock divided by 16 */ +#define PWM_MR_PREA_MCKDIV32 (0x5u << 8) /* (PWM_MR) Master Clock divided by 32 */ +#define PWM_MR_PREA_MCKDIV64 (0x6u << 8) /* (PWM_MR) Master Clock divided by 64 */ +#define PWM_MR_PREA_MCKDIV128 (0x7u << 8) /* (PWM_MR) Master Clock divided by 128 */ +#define PWM_MR_PREA_MCKDIV256 (0x8u << 8) /* (PWM_MR) Master Clock divided by 256 */ +#define PWM_MR_PREA_MCKDIV512 (0x9u << 8) /* (PWM_MR) Master Clock divided by 512 */ +#define PWM_MR_PREA_MCKDIV1024 (0xAu << 8) /* (PWM_MR) Master Clock divided by 1024 */ +#define PWM_MR_DIVB_Pos 16 +#define PWM_MR_DIVB_Msk (0xffu << PWM_MR_DIVB_Pos) /* (PWM_MR) CLKA, CLKB Divide Factor */ +#define PWM_MR_DIVB_CLK_OFF (0x0u << 16) /* (PWM_MR) CLKA, CLKB clock is turned off */ +#define PWM_MR_DIVB_CLK_DIV1 (0x1u << 16) /* (PWM_MR) CLKA, CLKB clock is clock selected by PREA, PREB */ +#define PWM_MR_PREB_Pos 24 +#define PWM_MR_PREB_Msk (0xfu << PWM_MR_PREB_Pos) /* (PWM_MR) */ +#define PWM_MR_PREB_MCK (0x0u << 24) /* (PWM_MR) Master Clock */ +#define PWM_MR_PREB_MCKDIV2 (0x1u << 24) /* (PWM_MR) Master Clock divided by 2 */ +#define PWM_MR_PREB_MCKDIV4 (0x2u << 24) /* (PWM_MR) Master Clock divided by 4 */ +#define PWM_MR_PREB_MCKDIV8 (0x3u << 24) /* (PWM_MR) Master Clock divided by 8 */ +#define PWM_MR_PREB_MCKDIV16 (0x4u << 24) /* (PWM_MR) Master Clock divided by 16 */ +#define PWM_MR_PREB_MCKDIV32 (0x5u << 24) /* (PWM_MR) Master Clock divided by 32 */ +#define PWM_MR_PREB_MCKDIV64 (0x6u << 24) /* (PWM_MR) Master Clock divided by 64 */ +#define PWM_MR_PREB_MCKDIV128 (0x7u << 24) /* (PWM_MR) Master Clock divided by 128 */ +#define PWM_MR_PREB_MCKDIV256 (0x8u << 24) /* (PWM_MR) Master Clock divided by 256 */ +#define PWM_MR_PREB_MCKDIV512 (0x9u << 24) /* (PWM_MR) Master Clock divided by 512 */ +#define PWM_MR_PREB_MCKDIV1024 (0xAu << 24) /* (PWM_MR) Master Clock divided by 1024 */ +/* -------- PWM_ENA : (PWM Offset: 0x04) PWM Enable Register -------- */ +#define PWM_ENA_CHID0 (0x1u << 0) /* (PWM_ENA) Channel ID */ +#define PWM_ENA_CHID1 (0x1u << 1) /* (PWM_ENA) Channel ID */ +#define PWM_ENA_CHID2 (0x1u << 2) /* (PWM_ENA) Channel ID */ +#define PWM_ENA_CHID3 (0x1u << 3) /* (PWM_ENA) Channel ID */ +/* -------- PWM_DIS : (PWM Offset: 0x08) PWM Disable Register -------- */ +#define PWM_DIS_CHID0 (0x1u << 0) /* (PWM_DIS) Channel ID */ +#define PWM_DIS_CHID1 (0x1u << 1) /* (PWM_DIS) Channel ID */ +#define PWM_DIS_CHID2 (0x1u << 2) /* (PWM_DIS) Channel ID */ +#define PWM_DIS_CHID3 (0x1u << 3) /* (PWM_DIS) Channel ID */ +/* -------- PWM_SR : (PWM Offset: 0x0C) PWM Status Register -------- */ +#define PWM_SR_CHID0 (0x1u << 0) /* (PWM_SR) Channel ID */ +#define PWM_SR_CHID1 (0x1u << 1) /* (PWM_SR) Channel ID */ +#define PWM_SR_CHID2 (0x1u << 2) /* (PWM_SR) Channel ID */ +#define PWM_SR_CHID3 (0x1u << 3) /* (PWM_SR) Channel ID */ +/* -------- PWM_IER : (PWM Offset: 0x10) PWM Interrupt Enable Register -------- */ +#define PWM_IER_CHID0 (0x1u << 0) /* (PWM_IER) Channel ID. */ +#define PWM_IER_CHID1 (0x1u << 1) /* (PWM_IER) Channel ID. */ +#define PWM_IER_CHID2 (0x1u << 2) /* (PWM_IER) Channel ID. */ +#define PWM_IER_CHID3 (0x1u << 3) /* (PWM_IER) Channel ID. */ +/* -------- PWM_IDR : (PWM Offset: 0x14) PWM Interrupt Disable Register -------- */ +#define PWM_IDR_CHID0 (0x1u << 0) /* (PWM_IDR) Channel ID. */ +#define PWM_IDR_CHID1 (0x1u << 1) /* (PWM_IDR) Channel ID. */ +#define PWM_IDR_CHID2 (0x1u << 2) /* (PWM_IDR) Channel ID. */ +#define PWM_IDR_CHID3 (0x1u << 3) /* (PWM_IDR) Channel ID. */ +/* -------- PWM_IMR : (PWM Offset: 0x18) PWM Interrupt Mask Register -------- */ +#define PWM_IMR_CHID0 (0x1u << 0) /* (PWM_IMR) Channel ID. */ +#define PWM_IMR_CHID1 (0x1u << 1) /* (PWM_IMR) Channel ID. */ +#define PWM_IMR_CHID2 (0x1u << 2) /* (PWM_IMR) Channel ID. */ +#define PWM_IMR_CHID3 (0x1u << 3) /* (PWM_IMR) Channel ID. */ +/* -------- PWM_ISR : (PWM Offset: 0x1C) PWM Interrupt Status Register -------- */ +#define PWM_ISR_CHID0 (0x1u << 0) /* (PWM_ISR) Channel ID */ +#define PWM_ISR_CHID1 (0x1u << 1) /* (PWM_ISR) Channel ID */ +#define PWM_ISR_CHID2 (0x1u << 2) /* (PWM_ISR) Channel ID */ +#define PWM_ISR_CHID3 (0x1u << 3) /* (PWM_ISR) Channel ID */ +/* -------- PWM_CMR : (PWM Offset: N/A) PWM Channel Mode Register -------- */ +#define PWM_CMR_CPRE_Pos 0 +#define PWM_CMR_CPRE_Msk (0xfu << PWM_CMR_CPRE_Pos) /* (PWM_CMR) Channel Pre-scaler */ +#define PWM_CMR_CPRE_MCK (0x0u << 0) /* (PWM_CMR) Master Clock */ +#define PWM_CMR_CPRE_MCKDIV2 (0x1u << 0) /* (PWM_CMR) Master Clock divided by 2 */ +#define PWM_CMR_CPRE_MCKDIV4 (0x2u << 0) /* (PWM_CMR) Master Clock divided by 4 */ +#define PWM_CMR_CPRE_MCKDIV8 (0x3u << 0) /* (PWM_CMR) Master Clock divided by 8 */ +#define PWM_CMR_CPRE_MCKDIV16 (0x4u << 0) /* (PWM_CMR) Master Clock divided by 16 */ +#define PWM_CMR_CPRE_MCKDIV32 (0x5u << 0) /* (PWM_CMR) Master Clock divided by 32 */ +#define PWM_CMR_CPRE_MCKDIV64 (0x6u << 0) /* (PWM_CMR) Master Clock divided by 64 */ +#define PWM_CMR_CPRE_MCKDIV128 (0x7u << 0) /* (PWM_CMR) Master Clock divided by 128 */ +#define PWM_CMR_CPRE_MCKDIV256 (0x8u << 0) /* (PWM_CMR) Master Clock divided by 256 */ +#define PWM_CMR_CPRE_MCKDIV512 (0x9u << 0) /* (PWM_CMR) Master Clock divided by 512 */ +#define PWM_CMR_CPRE_MCKDIV1024 (0xAu << 0) /* (PWM_CMR) Master Clock divided by 1024 */ +#define PWM_CMR_CPRE_CLKA (0xBu << 0) /* (PWM_CMR) Clock A */ +#define PWM_CMR_CPRE_CLKB (0xCu << 0) /* (PWM_CMR) Clock B */ +#define PWM_CMR_CALG (0x1u << 8) /* (PWM_CMR) Channel Alignment */ +#define PWM_CMR_CPOL (0x1u << 9) /* (PWM_CMR) Channel Polarity */ +#define PWM_CMR_CPD (0x1u << 10) /* (PWM_CMR) Channel Update Period */ +/* -------- PWM_CDTY : (PWM Offset: N/A) PWM Channel Duty Cycle Register -------- */ +#define PWM_CDTY_CDTY_Pos 0 +#define PWM_CDTY_CDTY_Msk (0xffffffffu << PWM_CDTY_CDTY_Pos) /* (PWM_CDTY) Channel Duty Cycle */ +#define PWM_CDTY_CDTY(value) ((PWM_CDTY_CDTY_Msk & ((value) << PWM_CDTY_CDTY_Pos))) +/* -------- PWM_CPRD : (PWM Offset: N/A) PWM Channel Period Register -------- */ +#define PWM_CPRD_CPRD_Pos 0 +#define PWM_CPRD_CPRD_Msk (0xffffffffu << PWM_CPRD_CPRD_Pos) /* (PWM_CPRD) Channel Period */ +#define PWM_CPRD_CPRD(value) ((PWM_CPRD_CPRD_Msk & ((value) << PWM_CPRD_CPRD_Pos))) +/* -------- PWM_CCNT : (PWM Offset: N/A) PWM Channel Counter Register -------- */ +#define PWM_CCNT_CNT_Pos 0 +#define PWM_CCNT_CNT_Msk (0xffffffffu << PWM_CCNT_CNT_Pos) /* (PWM_CCNT) Channel Counter Register */ +/* -------- PWM_CUPD : (PWM Offset: N/A) PWM Channel Update Register -------- */ +#define PWM_CUPD_CUPD_Pos 0 +#define PWM_CUPD_CUPD_Msk (0xffffffffu << PWM_CUPD_CUPD_Pos) /* (PWM_CUPD) */ +#define PWM_CUPD_CUPD(value) ((PWM_CUPD_CUPD_Msk & ((value) << PWM_CUPD_CUPD_Pos))) + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Reset Controller */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Rstc hardware registers */ +typedef struct { + WoReg RSTC_CR; /* (Rstc Offset: 0x00) Control Register */ + RoReg RSTC_SR; /* (Rstc Offset: 0x04) Status Register */ + RwReg RSTC_MR; /* (Rstc Offset: 0x08) Mode Register */ +} Rstc; +#endif /* __ASSEMBLY__ */ +/* -------- RSTC_CR : (RSTC Offset: 0x00) Control Register -------- */ +#define RSTC_CR_PROCRST (0x1u << 0) /* (RSTC_CR) Processor Reset */ +#define RSTC_CR_PERRST (0x1u << 2) /* (RSTC_CR) Peripheral Reset */ +#define RSTC_CR_EXTRST (0x1u << 3) /* (RSTC_CR) External Reset */ +#define RSTC_CR_KEY_Pos 24 +#define RSTC_CR_KEY_Msk (0xffu << RSTC_CR_KEY_Pos) /* (RSTC_CR) Password */ +#define RSTC_CR_KEY(value) ((RSTC_CR_KEY_Msk & ((value) << RSTC_CR_KEY_Pos))) +/* -------- RSTC_SR : (RSTC Offset: 0x04) Status Register -------- */ +#define RSTC_SR_URSTS (0x1u << 0) /* (RSTC_SR) User Reset Status */ +#define RSTC_SR_RSTTYP_Pos 8 +#define RSTC_SR_RSTTYP_Msk (0x7u << RSTC_SR_RSTTYP_Pos) /* (RSTC_SR) Reset Type */ +#define RSTC_SR_NRSTL (0x1u << 16) /* (RSTC_SR) NRST Pin Level */ +#define RSTC_SR_SRCMP (0x1u << 17) /* (RSTC_SR) Software Reset Command in Progress */ +/* -------- RSTC_MR : (RSTC Offset: 0x08) Mode Register -------- */ +#define RSTC_MR_URSTEN (0x1u << 0) /* (RSTC_MR) User Reset Enable */ +#define RSTC_MR_URSTIEN (0x1u << 4) /* (RSTC_MR) User Reset Interrupt Enable */ +#define RSTC_MR_ERSTL_Pos 8 +#define RSTC_MR_ERSTL_Msk (0xfu << RSTC_MR_ERSTL_Pos) /* (RSTC_MR) External Reset Length */ +#define RSTC_MR_ERSTL(value) ((RSTC_MR_ERSTL_Msk & ((value) << RSTC_MR_ERSTL_Pos))) +#define RSTC_MR_KEY_Pos 24 +#define RSTC_MR_KEY_Msk (0xffu << RSTC_MR_KEY_Pos) /* (RSTC_MR) Password */ +#define RSTC_MR_KEY(value) ((RSTC_MR_KEY_Msk & ((value) << RSTC_MR_KEY_Pos))) + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Real-time Clock */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Rtc hardware registers */ +typedef struct { + RwReg RTC_CR; /* (Rtc Offset: 0x00) Control Register */ + RwReg RTC_MR; /* (Rtc Offset: 0x04) Mode Register */ + RwReg RTC_TIMR; /* (Rtc Offset: 0x08) Time Register */ + RwReg RTC_CALR; /* (Rtc Offset: 0x0C) Calendar Register */ + RwReg RTC_TIMALR; /* (Rtc Offset: 0x10) Time Alarm Register */ + RwReg RTC_CALALR; /* (Rtc Offset: 0x14) Calendar Alarm Register */ + RoReg RTC_SR; /* (Rtc Offset: 0x18) Status Register */ + WoReg RTC_SCCR; /* (Rtc Offset: 0x1C) Status Clear Command Register */ + WoReg RTC_IER; /* (Rtc Offset: 0x20) Interrupt Enable Register */ + WoReg RTC_IDR; /* (Rtc Offset: 0x24) Interrupt Disable Register */ + RoReg RTC_IMR; /* (Rtc Offset: 0x28) Interrupt Mask Register */ + RoReg RTC_VER; /* (Rtc Offset: 0x2C) Valid Entry Register */ + RwReg Reserved1[45]; + RwReg RTC_WPMR; /* (Rtc Offset: 0xE4) Write Protect Mode Register */ +} Rtc; +#endif /* __ASSEMBLY__ */ +/* -------- RTC_CR : (RTC Offset: 0x00) Control Register -------- */ +#define RTC_CR_UPDTIM (0x1u << 0) /* (RTC_CR) Update Request Time Register */ +#define RTC_CR_UPDCAL (0x1u << 1) /* (RTC_CR) Update Request Calendar Register */ +#define RTC_CR_TIMEVSEL_Pos 8 +#define RTC_CR_TIMEVSEL_Msk (0x3u << RTC_CR_TIMEVSEL_Pos) /* (RTC_CR) Time Event Selection */ +#define RTC_CR_TIMEVSEL_MINUTE (0x0u << 8) /* (RTC_CR) Minute change */ +#define RTC_CR_TIMEVSEL_HOUR (0x1u << 8) /* (RTC_CR) Hour change */ +#define RTC_CR_TIMEVSEL_MIDNIGHT (0x2u << 8) /* (RTC_CR) Every day at midnight */ +#define RTC_CR_TIMEVSEL_NOON (0x3u << 8) /* (RTC_CR) Every day at noon */ +#define RTC_CR_CALEVSEL_Pos 16 +#define RTC_CR_CALEVSEL_Msk (0x3u << RTC_CR_CALEVSEL_Pos) /* (RTC_CR) Calendar Event Selection */ +#define RTC_CR_CALEVSEL_WEEK (0x0u << 16) /* (RTC_CR) Week change (every Monday at time 00:00:00) */ +#define RTC_CR_CALEVSEL_MONTH (0x1u << 16) /* (RTC_CR) Month change (every 01 of each month at time 00:00:00) */ +#define RTC_CR_CALEVSEL_YEAR (0x2u << 16) /* (RTC_CR) Year change (every January 1 at time 00:00:00) */ +/* -------- RTC_MR : (RTC Offset: 0x04) Mode Register -------- */ +#define RTC_MR_HRMOD (0x1u << 0) /* (RTC_MR) 12-/24-hour Mode */ +/* -------- RTC_TIMR : (RTC Offset: 0x08) Time Register -------- */ +#define RTC_TIMR_SEC_Pos 0 +#define RTC_TIMR_SEC_Msk (0x7fu << RTC_TIMR_SEC_Pos) /* (RTC_TIMR) Current Second */ +#define RTC_TIMR_SEC(value) ((RTC_TIMR_SEC_Msk & ((value) << RTC_TIMR_SEC_Pos))) +#define RTC_TIMR_MIN_Pos 8 +#define RTC_TIMR_MIN_Msk (0x7fu << RTC_TIMR_MIN_Pos) /* (RTC_TIMR) Current Minute */ +#define RTC_TIMR_MIN(value) ((RTC_TIMR_MIN_Msk & ((value) << RTC_TIMR_MIN_Pos))) +#define RTC_TIMR_HOUR_Pos 16 +#define RTC_TIMR_HOUR_Msk (0x3fu << RTC_TIMR_HOUR_Pos) /* (RTC_TIMR) Current Hour */ +#define RTC_TIMR_HOUR(value) ((RTC_TIMR_HOUR_Msk & ((value) << RTC_TIMR_HOUR_Pos))) +#define RTC_TIMR_AMPM (0x1u << 22) /* (RTC_TIMR) Ante Meridiem Post Meridiem Indicator */ +/* -------- RTC_CALR : (RTC Offset: 0x0C) Calendar Register -------- */ +#define RTC_CALR_CENT_Pos 0 +#define RTC_CALR_CENT_Msk (0x7fu << RTC_CALR_CENT_Pos) /* (RTC_CALR) Current Century */ +#define RTC_CALR_CENT(value) ((RTC_CALR_CENT_Msk & ((value) << RTC_CALR_CENT_Pos))) +#define RTC_CALR_YEAR_Pos 8 +#define RTC_CALR_YEAR_Msk (0xffu << RTC_CALR_YEAR_Pos) /* (RTC_CALR) Current Year */ +#define RTC_CALR_YEAR(value) ((RTC_CALR_YEAR_Msk & ((value) << RTC_CALR_YEAR_Pos))) +#define RTC_CALR_MONTH_Pos 16 +#define RTC_CALR_MONTH_Msk (0x1fu << RTC_CALR_MONTH_Pos) /* (RTC_CALR) Current Month */ +#define RTC_CALR_MONTH(value) ((RTC_CALR_MONTH_Msk & ((value) << RTC_CALR_MONTH_Pos))) +#define RTC_CALR_DAY_Pos 21 +#define RTC_CALR_DAY_Msk (0x7u << RTC_CALR_DAY_Pos) /* (RTC_CALR) Current Day in Current Week */ +#define RTC_CALR_DAY(value) ((RTC_CALR_DAY_Msk & ((value) << RTC_CALR_DAY_Pos))) +#define RTC_CALR_DATE_Pos 24 +#define RTC_CALR_DATE_Msk (0x3fu << RTC_CALR_DATE_Pos) /* (RTC_CALR) Current Day in Current Month */ +#define RTC_CALR_DATE(value) ((RTC_CALR_DATE_Msk & ((value) << RTC_CALR_DATE_Pos))) +/* -------- RTC_TIMALR : (RTC Offset: 0x10) Time Alarm Register -------- */ +#define RTC_TIMALR_SEC_Pos 0 +#define RTC_TIMALR_SEC_Msk (0x7fu << RTC_TIMALR_SEC_Pos) /* (RTC_TIMALR) Second Alarm */ +#define RTC_TIMALR_SEC(value) ((RTC_TIMALR_SEC_Msk & ((value) << RTC_TIMALR_SEC_Pos))) +#define RTC_TIMALR_SECEN (0x1u << 7) /* (RTC_TIMALR) Second Alarm Enable */ +#define RTC_TIMALR_MIN_Pos 8 +#define RTC_TIMALR_MIN_Msk (0x7fu << RTC_TIMALR_MIN_Pos) /* (RTC_TIMALR) Minute Alarm */ +#define RTC_TIMALR_MIN(value) ((RTC_TIMALR_MIN_Msk & ((value) << RTC_TIMALR_MIN_Pos))) +#define RTC_TIMALR_MINEN (0x1u << 15) /* (RTC_TIMALR) Minute Alarm Enable */ +#define RTC_TIMALR_HOUR_Pos 16 +#define RTC_TIMALR_HOUR_Msk (0x3fu << RTC_TIMALR_HOUR_Pos) /* (RTC_TIMALR) Hour Alarm */ +#define RTC_TIMALR_HOUR(value) ((RTC_TIMALR_HOUR_Msk & ((value) << RTC_TIMALR_HOUR_Pos))) +#define RTC_TIMALR_AMPM (0x1u << 22) /* (RTC_TIMALR) AM/PM Indicator */ +#define RTC_TIMALR_HOUREN (0x1u << 23) /* (RTC_TIMALR) Hour Alarm Enable */ +/* -------- RTC_CALALR : (RTC Offset: 0x14) Calendar Alarm Register -------- */ +#define RTC_CALALR_MONTH_Pos 16 +#define RTC_CALALR_MONTH_Msk (0x1fu << RTC_CALALR_MONTH_Pos) /* (RTC_CALALR) Month Alarm */ +#define RTC_CALALR_MONTH(value) ((RTC_CALALR_MONTH_Msk & ((value) << RTC_CALALR_MONTH_Pos))) +#define RTC_CALALR_MTHEN (0x1u << 23) /* (RTC_CALALR) Month Alarm Enable */ +#define RTC_CALALR_DATE_Pos 24 +#define RTC_CALALR_DATE_Msk (0x3fu << RTC_CALALR_DATE_Pos) /* (RTC_CALALR) Date Alarm */ +#define RTC_CALALR_DATE(value) ((RTC_CALALR_DATE_Msk & ((value) << RTC_CALALR_DATE_Pos))) +#define RTC_CALALR_DATEEN (0x1u << 31) /* (RTC_CALALR) Date Alarm Enable */ +/* -------- RTC_SR : (RTC Offset: 0x18) Status Register -------- */ +#define RTC_SR_ACKUPD (0x1u << 0) /* (RTC_SR) Acknowledge for Update */ +#define RTC_SR_ALARM (0x1u << 1) /* (RTC_SR) Alarm Flag */ +#define RTC_SR_SEC (0x1u << 2) /* (RTC_SR) Second Event */ +#define RTC_SR_TIMEV (0x1u << 3) /* (RTC_SR) Time Event */ +#define RTC_SR_CALEV (0x1u << 4) /* (RTC_SR) Calendar Event */ +/* -------- RTC_SCCR : (RTC Offset: 0x1C) Status Clear Command Register -------- */ +#define RTC_SCCR_ACKCLR (0x1u << 0) /* (RTC_SCCR) Acknowledge Clear */ +#define RTC_SCCR_ALRCLR (0x1u << 1) /* (RTC_SCCR) Alarm Clear */ +#define RTC_SCCR_SECCLR (0x1u << 2) /* (RTC_SCCR) Second Clear */ +#define RTC_SCCR_TIMCLR (0x1u << 3) /* (RTC_SCCR) Time Clear */ +#define RTC_SCCR_CALCLR (0x1u << 4) /* (RTC_SCCR) Calendar Clear */ +/* -------- RTC_IER : (RTC Offset: 0x20) Interrupt Enable Register -------- */ +#define RTC_IER_ACKEN (0x1u << 0) /* (RTC_IER) Acknowledge Update Interrupt Enable */ +#define RTC_IER_ALREN (0x1u << 1) /* (RTC_IER) Alarm Interrupt Enable */ +#define RTC_IER_SECEN (0x1u << 2) /* (RTC_IER) Second Event Interrupt Enable */ +#define RTC_IER_TIMEN (0x1u << 3) /* (RTC_IER) Time Event Interrupt Enable */ +#define RTC_IER_CALEN (0x1u << 4) /* (RTC_IER) Calendar Event Interrupt Enable */ +/* -------- RTC_IDR : (RTC Offset: 0x24) Interrupt Disable Register -------- */ +#define RTC_IDR_ACKDIS (0x1u << 0) /* (RTC_IDR) Acknowledge Update Interrupt Disable */ +#define RTC_IDR_ALRDIS (0x1u << 1) /* (RTC_IDR) Alarm Interrupt Disable */ +#define RTC_IDR_SECDIS (0x1u << 2) /* (RTC_IDR) Second Event Interrupt Disable */ +#define RTC_IDR_TIMDIS (0x1u << 3) /* (RTC_IDR) Time Event Interrupt Disable */ +#define RTC_IDR_CALDIS (0x1u << 4) /* (RTC_IDR) Calendar Event Interrupt Disable */ +/* -------- RTC_IMR : (RTC Offset: 0x28) Interrupt Mask Register -------- */ +#define RTC_IMR_ACK (0x1u << 0) /* (RTC_IMR) Acknowledge Update Interrupt Mask */ +#define RTC_IMR_ALR (0x1u << 1) /* (RTC_IMR) Alarm Interrupt Mask */ +#define RTC_IMR_SEC (0x1u << 2) /* (RTC_IMR) Second Event Interrupt Mask */ +#define RTC_IMR_TIM (0x1u << 3) /* (RTC_IMR) Time Event Interrupt Mask */ +#define RTC_IMR_CAL (0x1u << 4) /* (RTC_IMR) Calendar Event Interrupt Mask */ +/* -------- RTC_VER : (RTC Offset: 0x2C) Valid Entry Register -------- */ +#define RTC_VER_NVTIM (0x1u << 0) /* (RTC_VER) Non-valid Time */ +#define RTC_VER_NVCAL (0x1u << 1) /* (RTC_VER) Non-valid Calendar */ +#define RTC_VER_NVTIMALR (0x1u << 2) /* (RTC_VER) Non-valid Time Alarm */ +#define RTC_VER_NVCALALR (0x1u << 3) /* (RTC_VER) Non-valid Calendar Alarm */ +/* -------- RTC_WPMR : (RTC Offset: 0xE4) Write Protect Mode Register -------- */ +#define RTC_WPMR_WPEN (0x1u << 0) /* (RTC_WPMR) Write Protect Enable */ +#define RTC_WPMR_WPKEY_Pos 8 +#define RTC_WPMR_WPKEY_Msk (0xffffffu << RTC_WPMR_WPKEY_Pos) /* (RTC_WPMR) */ +#define RTC_WPMR_WPKEY(value) ((RTC_WPMR_WPKEY_Msk & ((value) << RTC_WPMR_WPKEY_Pos))) + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Real-time Timer */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Rtt hardware registers */ +typedef struct { + RwReg RTT_MR; /* (Rtt Offset: 0x00) Mode Register */ + RwReg RTT_AR; /* (Rtt Offset: 0x04) Alarm Register */ + RoReg RTT_VR; /* (Rtt Offset: 0x08) Value Register */ + RoReg RTT_SR; /* (Rtt Offset: 0x0C) Status Register */ +} Rtt; +#endif /* __ASSEMBLY__ */ +/* -------- RTT_MR : (RTT Offset: 0x00) Mode Register -------- */ +#define RTT_MR_RTPRES_Pos 0 +#define RTT_MR_RTPRES_Msk (0xffffu << RTT_MR_RTPRES_Pos) /* (RTT_MR) Real-time Timer Prescaler Value */ +#define RTT_MR_RTPRES(value) ((RTT_MR_RTPRES_Msk & ((value) << RTT_MR_RTPRES_Pos))) +#define RTT_MR_ALMIEN (0x1u << 16) /* (RTT_MR) Alarm Interrupt Enable */ +#define RTT_MR_RTTINCIEN (0x1u << 17) /* (RTT_MR) Real-time Timer Increment Interrupt Enable */ +#define RTT_MR_RTTRST (0x1u << 18) /* (RTT_MR) Real-time Timer Restart */ +/* -------- RTT_AR : (RTT Offset: 0x04) Alarm Register -------- */ +#define RTT_AR_ALMV_Pos 0 +#define RTT_AR_ALMV_Msk (0xffffffffu << RTT_AR_ALMV_Pos) /* (RTT_AR) Alarm Value */ +#define RTT_AR_ALMV(value) ((RTT_AR_ALMV_Msk & ((value) << RTT_AR_ALMV_Pos))) +/* -------- RTT_VR : (RTT Offset: 0x08) Value Register -------- */ +#define RTT_VR_CRTV_Pos 0 +#define RTT_VR_CRTV_Msk (0xffffffffu << RTT_VR_CRTV_Pos) /* (RTT_VR) Current Real-time Value */ +/* -------- RTT_SR : (RTT Offset: 0x0C) Status Register -------- */ +#define RTT_SR_ALMS (0x1u << 0) /* (RTT_SR) Real-time Alarm Status */ +#define RTT_SR_RTTINC (0x1u << 1) /* (RTT_SR) Real-time Timer Increment */ + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Serial Peripheral Interface */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Spi hardware registers */ +typedef struct { + WoReg SPI_CR; /* (Spi Offset: 0x00) Control Register */ + RwReg SPI_MR; /* (Spi Offset: 0x04) Mode Register */ + RoReg SPI_RDR; /* (Spi Offset: 0x08) Receive Data Register */ + WoReg SPI_TDR; /* (Spi Offset: 0x0C) Transmit Data Register */ + RoReg SPI_SR; /* (Spi Offset: 0x10) Status Register */ + WoReg SPI_IER; /* (Spi Offset: 0x14) Interrupt Enable Register */ + WoReg SPI_IDR; /* (Spi Offset: 0x18) Interrupt Disable Register */ + RoReg SPI_IMR; /* (Spi Offset: 0x1C) Interrupt Mask Register */ + RwReg Reserved1[4]; + RwReg SPI_CSR[4]; /* (Spi Offset: 0x30) Chip Select Register */ + RwReg Reserved2[41]; + RwReg SPI_WPMR; /* (Spi Offset: 0xE4) Write Protection Control Register */ + RoReg SPI_WPSR; /* (Spi Offset: 0xE8) Write Protection Status Register */ + RwReg Reserved3[5]; + RwReg SPI_RPR; /* (Spi Offset: 0x100) Receive Pointer Register */ + RwReg SPI_RCR; /* (Spi Offset: 0x104) Receive Counter Register */ + RwReg SPI_TPR; /* (Spi Offset: 0x108) Transmit Pointer Register */ + RwReg SPI_TCR; /* (Spi Offset: 0x10C) Transmit Counter Register */ + RwReg SPI_RNPR; /* (Spi Offset: 0x110) Receive Next Pointer Register */ + RwReg SPI_RNCR; /* (Spi Offset: 0x114) Receive Next Counter Register */ + RwReg SPI_TNPR; /* (Spi Offset: 0x118) Transmit Next Pointer Register */ + RwReg SPI_TNCR; /* (Spi Offset: 0x11C) Transmit Next Counter Register */ + WoReg SPI_PTCR; /* (Spi Offset: 0x120) Transfer Control Register */ + RoReg SPI_PTSR; /* (Spi Offset: 0x124) Transfer Status Register */ +} Spi; +#endif /* __ASSEMBLY__ */ +/* -------- SPI_CR : (SPI Offset: 0x00) Control Register -------- */ +#define SPI_CR_SPIEN (0x1u << 0) /* (SPI_CR) SPI Enable */ +#define SPI_CR_SPIDIS (0x1u << 1) /* (SPI_CR) SPI Disable */ +#define SPI_CR_SWRST (0x1u << 7) /* (SPI_CR) SPI Software Reset */ +#define SPI_CR_LASTXFER (0x1u << 24) /* (SPI_CR) Last Transfer */ +/* -------- SPI_MR : (SPI Offset: 0x04) Mode Register -------- */ +#define SPI_MR_MSTR (0x1u << 0) /* (SPI_MR) Master/Slave Mode */ +#define SPI_MR_PS (0x1u << 1) /* (SPI_MR) Peripheral Select */ +#define SPI_MR_PCSDEC (0x1u << 2) /* (SPI_MR) Chip Select Decode */ +#define SPI_MR_MODFDIS (0x1u << 4) /* (SPI_MR) Mode Fault Detection */ +#define SPI_MR_WDRBT (0x1u << 5) /* (SPI_MR) Wait Data Read Before Transfer */ +#define SPI_MR_LLB (0x1u << 7) /* (SPI_MR) Local Loopback Enable */ +#define SPI_MR_PCS_Pos 16 +#define SPI_MR_PCS_Msk (0xfu << SPI_MR_PCS_Pos) /* (SPI_MR) Peripheral Chip Select */ +#define SPI_MR_PCS(value) ((SPI_MR_PCS_Msk & ((value) << SPI_MR_PCS_Pos))) +#define SPI_MR_DLYBCS_Pos 24 +#define SPI_MR_DLYBCS_Msk (0xffu << SPI_MR_DLYBCS_Pos) /* (SPI_MR) Delay Between Chip Selects */ +#define SPI_MR_DLYBCS(value) ((SPI_MR_DLYBCS_Msk & ((value) << SPI_MR_DLYBCS_Pos))) +/* -------- SPI_RDR : (SPI Offset: 0x08) Receive Data Register -------- */ +#define SPI_RDR_RD_Pos 0 +#define SPI_RDR_RD_Msk (0xffffu << SPI_RDR_RD_Pos) /* (SPI_RDR) Receive Data */ +#define SPI_RDR_PCS_Pos 16 +#define SPI_RDR_PCS_Msk (0xfu << SPI_RDR_PCS_Pos) /* (SPI_RDR) Peripheral Chip Select */ +/* -------- SPI_TDR : (SPI Offset: 0x0C) Transmit Data Register -------- */ +#define SPI_TDR_TD_Pos 0 +#define SPI_TDR_TD_Msk (0xffffu << SPI_TDR_TD_Pos) /* (SPI_TDR) Transmit Data */ +#define SPI_TDR_TD(value) ((SPI_TDR_TD_Msk & ((value) << SPI_TDR_TD_Pos))) +#define SPI_TDR_PCS_Pos 16 +#define SPI_TDR_PCS_Msk (0xfu << SPI_TDR_PCS_Pos) /* (SPI_TDR) Peripheral Chip Select */ +#define SPI_TDR_PCS(value) ((SPI_TDR_PCS_Msk & ((value) << SPI_TDR_PCS_Pos))) +#define SPI_TDR_LASTXFER (0x1u << 24) /* (SPI_TDR) Last Transfer */ +/* -------- SPI_SR : (SPI Offset: 0x10) Status Register -------- */ +#define SPI_SR_RDRF (0x1u << 0) /* (SPI_SR) Receive Data Register Full */ +#define SPI_SR_TDRE (0x1u << 1) /* (SPI_SR) Transmit Data Register Empty */ +#define SPI_SR_MODF (0x1u << 2) /* (SPI_SR) Mode Fault Error */ +#define SPI_SR_OVRES (0x1u << 3) /* (SPI_SR) Overrun Error Status */ +#define SPI_SR_ENDRX (0x1u << 4) /* (SPI_SR) End of RX buffer */ +#define SPI_SR_ENDTX (0x1u << 5) /* (SPI_SR) End of TX buffer */ +#define SPI_SR_RXBUFF (0x1u << 6) /* (SPI_SR) RX Buffer Full */ +#define SPI_SR_TXBUFE (0x1u << 7) /* (SPI_SR) TX Buffer Empty */ +#define SPI_SR_NSSR (0x1u << 8) /* (SPI_SR) NSS Rising */ +#define SPI_SR_TXEMPTY (0x1u << 9) /* (SPI_SR) Transmission Registers Empty */ +#define SPI_SR_UNDES (0x1u << 10) /* (SPI_SR) Underrun Error Status (Slave Mode Only) */ +#define SPI_SR_SPIENS (0x1u << 16) /* (SPI_SR) SPI Enable Status */ +/* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */ +#define SPI_IER_RDRF (0x1u << 0) /* (SPI_IER) Receive Data Register Full Interrupt Enable */ +#define SPI_IER_TDRE (0x1u << 1) /* (SPI_IER) SPI Transmit Data Register Empty Interrupt Enable */ +#define SPI_IER_MODF (0x1u << 2) /* (SPI_IER) Mode Fault Error Interrupt Enable */ +#define SPI_IER_OVRES (0x1u << 3) /* (SPI_IER) Overrun Error Interrupt Enable */ +#define SPI_IER_ENDRX (0x1u << 4) /* (SPI_IER) End of Receive Buffer Interrupt Enable */ +#define SPI_IER_ENDTX (0x1u << 5) /* (SPI_IER) End of Transmit Buffer Interrupt Enable */ +#define SPI_IER_RXBUFF (0x1u << 6) /* (SPI_IER) Receive Buffer Full Interrupt Enable */ +#define SPI_IER_TXBUFE (0x1u << 7) /* (SPI_IER) Transmit Buffer Empty Interrupt Enable */ +#define SPI_IER_NSSR (0x1u << 8) /* (SPI_IER) NSS Rising Interrupt Enable */ +#define SPI_IER_TXEMPTY (0x1u << 9) /* (SPI_IER) Transmission Registers Empty Enable */ +#define SPI_IER_UNDES (0x1u << 10) /* (SPI_IER) Underrun Error Interrupt Enable */ +/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */ +#define SPI_IDR_RDRF (0x1u << 0) /* (SPI_IDR) Receive Data Register Full Interrupt Disable */ +#define SPI_IDR_TDRE (0x1u << 1) /* (SPI_IDR) SPI Transmit Data Register Empty Interrupt Disable */ +#define SPI_IDR_MODF (0x1u << 2) /* (SPI_IDR) Mode Fault Error Interrupt Disable */ +#define SPI_IDR_OVRES (0x1u << 3) /* (SPI_IDR) Overrun Error Interrupt Disable */ +#define SPI_IDR_ENDRX (0x1u << 4) /* (SPI_IDR) End of Receive Buffer Interrupt Disable */ +#define SPI_IDR_ENDTX (0x1u << 5) /* (SPI_IDR) End of Transmit Buffer Interrupt Disable */ +#define SPI_IDR_RXBUFF (0x1u << 6) /* (SPI_IDR) Receive Buffer Full Interrupt Disable */ +#define SPI_IDR_TXBUFE (0x1u << 7) /* (SPI_IDR) Transmit Buffer Empty Interrupt Disable */ +#define SPI_IDR_NSSR (0x1u << 8) /* (SPI_IDR) NSS Rising Interrupt Disable */ +#define SPI_IDR_TXEMPTY (0x1u << 9) /* (SPI_IDR) Transmission Registers Empty Disable */ +#define SPI_IDR_UNDES (0x1u << 10) /* (SPI_IDR) Underrun Error Interrupt Disable */ +/* -------- SPI_IMR : (SPI Offset: 0x1C) Interrupt Mask Register -------- */ +#define SPI_IMR_RDRF (0x1u << 0) /* (SPI_IMR) Receive Data Register Full Interrupt Mask */ +#define SPI_IMR_TDRE (0x1u << 1) /* (SPI_IMR) SPI Transmit Data Register Empty Interrupt Mask */ +#define SPI_IMR_MODF (0x1u << 2) /* (SPI_IMR) Mode Fault Error Interrupt Mask */ +#define SPI_IMR_OVRES (0x1u << 3) /* (SPI_IMR) Overrun Error Interrupt Mask */ +#define SPI_IMR_ENDRX (0x1u << 4) /* (SPI_IMR) End of Receive Buffer Interrupt Mask */ +#define SPI_IMR_ENDTX (0x1u << 5) /* (SPI_IMR) End of Transmit Buffer Interrupt Mask */ +#define SPI_IMR_RXBUFF (0x1u << 6) /* (SPI_IMR) Receive Buffer Full Interrupt Mask */ +#define SPI_IMR_TXBUFE (0x1u << 7) /* (SPI_IMR) Transmit Buffer Empty Interrupt Mask */ +#define SPI_IMR_NSSR (0x1u << 8) /* (SPI_IMR) NSS Rising Interrupt Mask */ +#define SPI_IMR_TXEMPTY (0x1u << 9) /* (SPI_IMR) Transmission Registers Empty Mask */ +#define SPI_IMR_UNDES (0x1u << 10) /* (SPI_IMR) Underrun Error Interrupt Mask */ +/* -------- SPI_CSR[4] : (SPI Offset: 0x30) Chip Select Register -------- */ +#define SPI_CSR_CPOL (0x1u << 0) /* (SPI_CSR[4]) Clock Polarity */ +#define SPI_CSR_NCPHA (0x1u << 1) /* (SPI_CSR[4]) Clock Phase */ +#define SPI_CSR_CSNAAT (0x1u << 2) /* (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ +#define SPI_CSR_CSAAT (0x1u << 3) /* (SPI_CSR[4]) Chip Select Not Active After Transfer (Ignored if CSAAT = 1) */ +#define SPI_CSR_BITS_Pos 4 +#define SPI_CSR_BITS_Msk (0xfu << SPI_CSR_BITS_Pos) /* (SPI_CSR[4]) Bits Per Transfer */ +#define SPI_CSR_BITS_8_BIT (0x0u << 4) /* (SPI_CSR[4]) 8_bits for transfer */ +#define SPI_CSR_BITS_9_BIT (0x1u << 4) /* (SPI_CSR[4]) 9_bits for transfer */ +#define SPI_CSR_BITS_10_BIT (0x2u << 4) /* (SPI_CSR[4]) 8_bits for transfer */ +#define SPI_CSR_BITS_11_BIT (0x3u << 4) /* (SPI_CSR[4]) 8_bits for transfer */ +#define SPI_CSR_BITS_12_BIT (0x4u << 4) /* (SPI_CSR[4]) 8_bits for transfer */ +#define SPI_CSR_BITS_13_BIT (0x5u << 4) /* (SPI_CSR[4]) 8_bits for transfer */ +#define SPI_CSR_BITS_14_BIT (0x6u << 4) /* (SPI_CSR[4]) 8_bits for transfer */ +#define SPI_CSR_BITS_15_BIT (0x7u << 4) /* (SPI_CSR[4]) 8_bits for transfer */ +#define SPI_CSR_BITS_16_BIT (0x8u << 4) /* (SPI_CSR[4]) 8_bits for transfer */ +#define SPI_CSR_SCBR_Pos 8 +#define SPI_CSR_SCBR_Msk (0xffu << SPI_CSR_SCBR_Pos) /* (SPI_CSR[4]) Serial Clock Baud Rate */ +#define SPI_CSR_SCBR(value) ((SPI_CSR_SCBR_Msk & ((value) << SPI_CSR_SCBR_Pos))) +#define SPI_CSR_DLYBS_Pos 16 +#define SPI_CSR_DLYBS_Msk (0xffu << SPI_CSR_DLYBS_Pos) /* (SPI_CSR[4]) Delay Before SPCK */ +#define SPI_CSR_DLYBS(value) ((SPI_CSR_DLYBS_Msk & ((value) << SPI_CSR_DLYBS_Pos))) +#define SPI_CSR_DLYBCT_Pos 24 +#define SPI_CSR_DLYBCT_Msk (0xffu << SPI_CSR_DLYBCT_Pos) /* (SPI_CSR[4]) Delay Between Consecutive Transfers */ +#define SPI_CSR_DLYBCT(value) ((SPI_CSR_DLYBCT_Msk & ((value) << SPI_CSR_DLYBCT_Pos))) +/* -------- SPI_WPMR : (SPI Offset: 0xE4) Write Protection Control Register -------- */ +#define SPI_WPMR_SPIWPEN (0x1u << 0) /* (SPI_WPMR) SPI Write Protection Enable */ +#define SPI_WPMR_SPIWPKEY_Pos 8 +#define SPI_WPMR_SPIWPKEY_Msk (0xffffffu << SPI_WPMR_SPIWPKEY_Pos) /* (SPI_WPMR) SPI Write Protection Key Password */ +#define SPI_WPMR_SPIWPKEY(value) ((SPI_WPMR_SPIWPKEY_Msk & ((value) << SPI_WPMR_SPIWPKEY_Pos))) +/* -------- SPI_WPSR : (SPI Offset: 0xE8) Write Protection Status Register -------- */ +#define SPI_WPSR_SPIWPVS_Pos 0 +#define SPI_WPSR_SPIWPVS_Msk (0x7u << SPI_WPSR_SPIWPVS_Pos) /* (SPI_WPSR) SPI Write Protection Violation Status */ +#define SPI_WPSR_SPIWPVSRC_Pos 8 +#define SPI_WPSR_SPIWPVSRC_Msk (0xffu << SPI_WPSR_SPIWPVSRC_Pos) /* (SPI_WPSR) SPI Write Protection Violation Source */ +/* -------- SPI_RPR : (SPI Offset: 0x100) Receive Pointer Register -------- */ +#define SPI_RPR_RXPTR_Pos 0 +#define SPI_RPR_RXPTR_Msk (0xffffffffu << SPI_RPR_RXPTR_Pos) /* (SPI_RPR) Receive Pointer Register */ +#define SPI_RPR_RXPTR(value) ((SPI_RPR_RXPTR_Msk & ((value) << SPI_RPR_RXPTR_Pos))) +/* -------- SPI_RCR : (SPI Offset: 0x104) Receive Counter Register -------- */ +#define SPI_RCR_RXCTR_Pos 0 +#define SPI_RCR_RXCTR_Msk (0xffffu << SPI_RCR_RXCTR_Pos) /* (SPI_RCR) Receive Counter Register */ +#define SPI_RCR_RXCTR(value) ((SPI_RCR_RXCTR_Msk & ((value) << SPI_RCR_RXCTR_Pos))) +/* -------- SPI_TPR : (SPI Offset: 0x108) Transmit Pointer Register -------- */ +#define SPI_TPR_TXPTR_Pos 0 +#define SPI_TPR_TXPTR_Msk (0xffffffffu << SPI_TPR_TXPTR_Pos) /* (SPI_TPR) Transmit Counter Register */ +#define SPI_TPR_TXPTR(value) ((SPI_TPR_TXPTR_Msk & ((value) << SPI_TPR_TXPTR_Pos))) +/* -------- SPI_TCR : (SPI Offset: 0x10C) Transmit Counter Register -------- */ +#define SPI_TCR_TXCTR_Pos 0 +#define SPI_TCR_TXCTR_Msk (0xffffu << SPI_TCR_TXCTR_Pos) /* (SPI_TCR) Transmit Counter Register */ +#define SPI_TCR_TXCTR(value) ((SPI_TCR_TXCTR_Msk & ((value) << SPI_TCR_TXCTR_Pos))) +/* -------- SPI_RNPR : (SPI Offset: 0x110) Receive Next Pointer Register -------- */ +#define SPI_RNPR_RXNPTR_Pos 0 +#define SPI_RNPR_RXNPTR_Msk (0xffffffffu << SPI_RNPR_RXNPTR_Pos) /* (SPI_RNPR) Receive Next Pointer */ +#define SPI_RNPR_RXNPTR(value) ((SPI_RNPR_RXNPTR_Msk & ((value) << SPI_RNPR_RXNPTR_Pos))) +/* -------- SPI_RNCR : (SPI Offset: 0x114) Receive Next Counter Register -------- */ +#define SPI_RNCR_RXNCTR_Pos 0 +#define SPI_RNCR_RXNCTR_Msk (0xffffu << SPI_RNCR_RXNCTR_Pos) /* (SPI_RNCR) Receive Next Counter */ +#define SPI_RNCR_RXNCTR(value) ((SPI_RNCR_RXNCTR_Msk & ((value) << SPI_RNCR_RXNCTR_Pos))) +/* -------- SPI_TNPR : (SPI Offset: 0x118) Transmit Next Pointer Register -------- */ +#define SPI_TNPR_TXNPTR_Pos 0 +#define SPI_TNPR_TXNPTR_Msk (0xffffffffu << SPI_TNPR_TXNPTR_Pos) /* (SPI_TNPR) Transmit Next Pointer */ +#define SPI_TNPR_TXNPTR(value) ((SPI_TNPR_TXNPTR_Msk & ((value) << SPI_TNPR_TXNPTR_Pos))) +/* -------- SPI_TNCR : (SPI Offset: 0x11C) Transmit Next Counter Register -------- */ +#define SPI_TNCR_TXNCTR_Pos 0 +#define SPI_TNCR_TXNCTR_Msk (0xffffu << SPI_TNCR_TXNCTR_Pos) /* (SPI_TNCR) Transmit Counter Next */ +#define SPI_TNCR_TXNCTR(value) ((SPI_TNCR_TXNCTR_Msk & ((value) << SPI_TNCR_TXNCTR_Pos))) +/* -------- SPI_PTCR : (SPI Offset: 0x120) Transfer Control Register -------- */ +#define SPI_PTCR_RXTEN (0x1u << 0) /* (SPI_PTCR) Receiver Transfer Enable */ +#define SPI_PTCR_RXTDIS (0x1u << 1) /* (SPI_PTCR) Receiver Transfer Disable */ +#define SPI_PTCR_TXTEN (0x1u << 8) /* (SPI_PTCR) Transmitter Transfer Enable */ +#define SPI_PTCR_TXTDIS (0x1u << 9) /* (SPI_PTCR) Transmitter Transfer Disable */ +/* -------- SPI_PTSR : (SPI Offset: 0x124) Transfer Status Register -------- */ +#define SPI_PTSR_RXTEN (0x1u << 0) /* (SPI_PTSR) Receiver Transfer Enable */ +#define SPI_PTSR_TXTEN (0x1u << 8) /* (SPI_PTSR) Transmitter Transfer Enable */ + + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Timer Counter */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* TcChannel hardware registers */ +typedef struct { + RwReg TC_CCR; /* (TcChannel Offset: 0x0) Channel Control Register */ + RwReg TC_CMR; /* (TcChannel Offset: 0x4) Channel Mode Register */ + RwReg TC_SMMR; /* (TcChannel Offset: 0x8) Stepper Motor Mode Register */ + RwReg Reserved1[1]; + RwReg TC_CV; /* (TcChannel Offset: 0x10) Counter Value */ + RwReg TC_RA; /* (TcChannel Offset: 0x14) Register A */ + RwReg TC_RB; /* (TcChannel Offset: 0x18) Register B */ + RwReg TC_RC; /* (TcChannel Offset: 0x1C) Register C */ + RwReg TC_SR; /* (TcChannel Offset: 0x20) Status Register */ + RwReg TC_IER; /* (TcChannel Offset: 0x24) Interrupt Enable Register */ + RwReg TC_IDR; /* (TcChannel Offset: 0x28) Interrupt Disable Register */ + RwReg TC_IMR; /* (TcChannel Offset: 0x2C) Interrupt Mask Register */ + RwReg Reserved2[4]; +} TcChannel; +/* Tc hardware registers */ +typedef struct { + TcChannel TC_CHANNEL[3]; /* (Tc Offset: 0x0) channel = 0 .. 2 */ + WoReg TC_BCR; /* (Tc Offset: 0xC0) Block Control Register */ + RwReg TC_BMR; /* (Tc Offset: 0xC4) Block Mode Register */ + WoReg TC_QIER; /* (Tc Offset: 0xC8) QDEC Interrupt Enable Register */ + WoReg TC_QIDR; /* (Tc Offset: 0xCC) QDEC Interrupt Disable Register */ + RoReg TC_QIMR; /* (Tc Offset: 0xD0) QDEC Interrupt Mask Register */ + RoReg TC_QISR; /* (Tc Offset: 0xD4) QDEC Interrupt Status Register */ + RwReg Reserved1[3]; + RwReg TC_WPMR; /* (Tc Offset: 0xE4) Write Protect Mode Register */ +} Tc; +#endif /* __ASSEMBLY__ */ +/* -------- TC_CCR : (TC Offset: N/A) Channel Control Register -------- */ +#define TC_CCR_CLKEN (0x1u << 0) /* (TC_CCR) Counter Clock Enable Command */ +#define TC_CCR_CLKDIS (0x1u << 1) /* (TC_CCR) Counter Clock Disable Command */ +#define TC_CCR_SWTRG (0x1u << 2) /* (TC_CCR) Software Trigger Command */ +/* -------- TC_CMR : (TC Offset: N/A) Channel Mode Register -------- */ +#define TC_CMR_TCCLKS_Pos 0 +#define TC_CMR_TCCLKS_Msk (0x7u << TC_CMR_TCCLKS_Pos) /* (TC_CMR) Clock Selection */ +#define TC_CMR_TCCLKS_TIMER_CLOCK1 (0x0u << 0) /* (TC_CMR) Clock selected: TCLK1 */ +#define TC_CMR_TCCLKS_TIMER_CLOCK2 (0x1u << 0) /* (TC_CMR) Clock selected: TCLK2 */ +#define TC_CMR_TCCLKS_TIMER_CLOCK3 (0x2u << 0) /* (TC_CMR) Clock selected: TCLK3 */ +#define TC_CMR_TCCLKS_TIMER_CLOCK4 (0x3u << 0) /* (TC_CMR) Clock selected: TCLK4 */ +#define TC_CMR_TCCLKS_TIMER_CLOCK5 (0x4u << 0) /* (TC_CMR) Clock selected: TCLK5 */ +#define TC_CMR_TCCLKS_XC0 (0x5u << 0) /* (TC_CMR) Clock selected: XC0 */ +#define TC_CMR_TCCLKS_XC1 (0x6u << 0) /* (TC_CMR) Clock selected: XC1 */ +#define TC_CMR_TCCLKS_XC2 (0x7u << 0) /* (TC_CMR) Clock selected: XC2 */ +#define TC_CMR_CLKI (0x1u << 3) /* (TC_CMR) Clock Invert */ +#define TC_CMR_BURST_Pos 4 +#define TC_CMR_BURST_Msk (0x3u << TC_CMR_BURST_Pos) /* (TC_CMR) Burst Signal Selection */ +#define TC_CMR_BURST_NONE (0x0u << 4) /* (TC_CMR) The clock is not gated by an external signal. */ +#define TC_CMR_BURST_XC0 (0x1u << 4) /* (TC_CMR) XC0 is ANDed with the selected clock. */ +#define TC_CMR_BURST_XC1 (0x2u << 4) /* (TC_CMR) XC1 is ANDed with the selected clock. */ +#define TC_CMR_BURST_XC2 (0x3u << 4) /* (TC_CMR) XC2 is ANDed with the selected clock. */ +#define TC_CMR_LDBSTOP (0x1u << 6) /* (TC_CMR) Counter Clock Stopped with RB Loading */ +#define TC_CMR_LDBDIS (0x1u << 7) /* (TC_CMR) Counter Clock Disable with RB Loading */ +#define TC_CMR_ETRGEDG_Pos 8 +#define TC_CMR_ETRGEDG_Msk (0x3u << TC_CMR_ETRGEDG_Pos) /* (TC_CMR) External Trigger Edge Selection */ +#define TC_CMR_ETRGEDG_NONE (0x0u << 8) /* (TC_CMR) The clock is not gated by an external signal. */ +#define TC_CMR_ETRGEDG_RISING (0x1u << 8) /* (TC_CMR) Rising edge */ +#define TC_CMR_ETRGEDG_FALLING (0x2u << 8) /* (TC_CMR) Falling edge */ +#define TC_CMR_ETRGEDG_EDGE (0x3u << 8) /* (TC_CMR) Each edge */ +#define TC_CMR_ABETRG (0x1u << 10) /* (TC_CMR) TIOA or TIOB External Trigger Selection */ +#define TC_CMR_CPCTRG (0x1u << 14) /* (TC_CMR) RC Compare Trigger Enable */ +#define TC_CMR_WAVE (0x1u << 15) /* (TC_CMR) */ +#define TC_CMR_LDRA_Pos 16 +#define TC_CMR_LDRA_Msk (0x3u << TC_CMR_LDRA_Pos) /* (TC_CMR) RA Loading Selection */ +#define TC_CMR_LDRA_NONE (0x0u << 16) /* (TC_CMR) None */ +#define TC_CMR_LDRA_RISING (0x1u << 16) /* (TC_CMR) Rising edge of TIOA */ +#define TC_CMR_LDRA_FALLING (0x2u << 16) /* (TC_CMR) Falling edge of TIOA */ +#define TC_CMR_LDRA_EDGE (0x3u << 16) /* (TC_CMR) Each edge of TIOA */ +#define TC_CMR_LDRB_Pos 18 +#define TC_CMR_LDRB_Msk (0x3u << TC_CMR_LDRB_Pos) /* (TC_CMR) RB Loading Selection */ +#define TC_CMR_LDRB_NONE (0x0u << 18) /* (TC_CMR) None */ +#define TC_CMR_LDRB_RISING (0x1u << 18) /* (TC_CMR) Rising edge of TIOA */ +#define TC_CMR_LDRB_FALLING (0x2u << 18) /* (TC_CMR) Falling edge of TIOA */ +#define TC_CMR_LDRB_EDGE (0x3u << 18) /* (TC_CMR) Each edge of TIOA */ +#define TC_CMR_CPCSTOP (0x1u << 6) /* (TC_CMR) Counter Clock Stopped with RC Compare */ +#define TC_CMR_CPCDIS (0x1u << 7) /* (TC_CMR) Counter Clock Disable with RC Compare */ +#define TC_CMR_EEVTEDG_Pos 8 +#define TC_CMR_EEVTEDG_Msk (0x3u << TC_CMR_EEVTEDG_Pos) /* (TC_CMR) External Event Edge Selection */ +#define TC_CMR_EEVTEDG_NONE (0x0u << 8) /* (TC_CMR) None */ +#define TC_CMR_EEVTEDG_RISING (0x1u << 8) /* (TC_CMR) Rising edge */ +#define TC_CMR_EEVTEDG_FALLING (0x2u << 8) /* (TC_CMR) Falling edge */ +#define TC_CMR_EEVTEDG_EDGE (0x3u << 8) /* (TC_CMR) Each edge */ +#define TC_CMR_EEVT_Pos 10 +#define TC_CMR_EEVT_Msk (0x3u << TC_CMR_EEVT_Pos) /* (TC_CMR) External Event Selection */ +#define TC_CMR_EEVT_TIOB (0x0u << 10) /* (TC_CMR) TIOB */ +#define TC_CMR_EEVT_XC0 (0x1u << 10) /* (TC_CMR) XC0 */ +#define TC_CMR_EEVT_XC1 (0x2u << 10) /* (TC_CMR) XC1 */ +#define TC_CMR_EEVT_XC2 (0x3u << 10) /* (TC_CMR) XC2 */ +#define TC_CMR_ENETRG (0x1u << 12) /* (TC_CMR) External Event Trigger Enable */ +#define TC_CMR_WAVSEL_Pos 13 +#define TC_CMR_WAVSEL_Msk (0x3u << TC_CMR_WAVSEL_Pos) /* (TC_CMR) Waveform Selection */ +#define TC_CMR_WAVSEL_UP (0x0u << 13) /* (TC_CMR) UP mode without automatic trigger on RC Compare */ +#define TC_CMR_WAVSEL_UPDOWN (0x1u << 13) /* (TC_CMR) UPDOWN mode without automatic trigger on RC Compare */ +#define TC_CMR_WAVSEL_UP_RC (0x2u << 13) /* (TC_CMR) UP mode with automatic trigger on RC Compare */ +#define TC_CMR_WAVSEL_UPDOWN_RC (0x3u << 13) /* (TC_CMR) UPDOWN mode with automatic trigger on RC Compare */ +#define TC_CMR_ACPA_Pos 16 +#define TC_CMR_ACPA_Msk (0x3u << TC_CMR_ACPA_Pos) /* (TC_CMR) RA Compare Effect on TIOA */ +#define TC_CMR_ACPA_NONE (0x0u << 16) /* (TC_CMR) None */ +#define TC_CMR_ACPA_SET (0x1u << 16) /* (TC_CMR) Set */ +#define TC_CMR_ACPA_CLEAR (0x2u << 16) /* (TC_CMR) Clear */ +#define TC_CMR_ACPA_TOGGLE (0x3u << 16) /* (TC_CMR) Toggle */ +#define TC_CMR_ACPC_Pos 18 +#define TC_CMR_ACPC_Msk (0x3u << TC_CMR_ACPC_Pos) /* (TC_CMR) RC Compare Effect on TIOA */ +#define TC_CMR_ACPC_NONE (0x0u << 18) /* (TC_CMR) None */ +#define TC_CMR_ACPC_SET (0x1u << 18) /* (TC_CMR) Set */ +#define TC_CMR_ACPC_CLEAR (0x2u << 18) /* (TC_CMR) Clear */ +#define TC_CMR_ACPC_TOGGLE (0x3u << 18) /* (TC_CMR) Toggle */ +#define TC_CMR_AEEVT_Pos 20 +#define TC_CMR_AEEVT_Msk (0x3u << TC_CMR_AEEVT_Pos) /* (TC_CMR) External Event Effect on TIOA */ +#define TC_CMR_AEEVT_NONE (0x0u << 20) /* (TC_CMR) None */ +#define TC_CMR_AEEVT_SET (0x1u << 20) /* (TC_CMR) Set */ +#define TC_CMR_AEEVT_CLEAR (0x2u << 20) /* (TC_CMR) Clear */ +#define TC_CMR_AEEVT_TOGGLE (0x3u << 20) /* (TC_CMR) Toggle */ +#define TC_CMR_ASWTRG_Pos 22 +#define TC_CMR_ASWTRG_Msk (0x3u << TC_CMR_ASWTRG_Pos) /* (TC_CMR) Software Trigger Effect on TIOA */ +#define TC_CMR_ASWTRG_NONE (0x0u << 22) /* (TC_CMR) None */ +#define TC_CMR_ASWTRG_SET (0x1u << 22) /* (TC_CMR) Set */ +#define TC_CMR_ASWTRG_CLEAR (0x2u << 22) /* (TC_CMR) Clear */ +#define TC_CMR_ASWTRG_TOGGLE (0x3u << 22) /* (TC_CMR) Toggle */ +#define TC_CMR_BCPB_Pos 24 +#define TC_CMR_BCPB_Msk (0x3u << TC_CMR_BCPB_Pos) /* (TC_CMR) RB Compare Effect on TIOB */ +#define TC_CMR_BCPB_NONE (0x0u << 24) /* (TC_CMR) None */ +#define TC_CMR_BCPB_SET (0x1u << 24) /* (TC_CMR) Set */ +#define TC_CMR_BCPB_CLEAR (0x2u << 24) /* (TC_CMR) Clear */ +#define TC_CMR_BCPB_TOGGLE (0x3u << 24) /* (TC_CMR) Toggle */ +#define TC_CMR_BCPC_Pos 26 +#define TC_CMR_BCPC_Msk (0x3u << TC_CMR_BCPC_Pos) /* (TC_CMR) RC Compare Effect on TIOB */ +#define TC_CMR_BCPC_NONE (0x0u << 26) /* (TC_CMR) None */ +#define TC_CMR_BCPC_SET (0x1u << 26) /* (TC_CMR) Set */ +#define TC_CMR_BCPC_CLEAR (0x2u << 26) /* (TC_CMR) Clear */ +#define TC_CMR_BCPC_TOGGLE (0x3u << 26) /* (TC_CMR) Toggle */ +#define TC_CMR_BEEVT_Pos 28 +#define TC_CMR_BEEVT_Msk (0x3u << TC_CMR_BEEVT_Pos) /* (TC_CMR) External Event Effect on TIOB */ +#define TC_CMR_BEEVT_NONE (0x0u << 28) /* (TC_CMR) None */ +#define TC_CMR_BEEVT_SET (0x1u << 28) /* (TC_CMR) Set */ +#define TC_CMR_BEEVT_CLEAR (0x2u << 28) /* (TC_CMR) Clear */ +#define TC_CMR_BEEVT_TOGGLE (0x3u << 28) /* (TC_CMR) Toggle */ +#define TC_CMR_BSWTRG_Pos 30 +#define TC_CMR_BSWTRG_Msk (0x3u << TC_CMR_BSWTRG_Pos) /* (TC_CMR) Software Trigger Effect on TIOB */ +#define TC_CMR_BSWTRG_NONE (0x0u << 30) /* (TC_CMR) None */ +#define TC_CMR_BSWTRG_SET (0x1u << 30) /* (TC_CMR) Set */ +#define TC_CMR_BSWTRG_CLEAR (0x2u << 30) /* (TC_CMR) Clear */ +#define TC_CMR_BSWTRG_TOGGLE (0x3u << 30) /* (TC_CMR) Toggle */ +/* -------- TC_SMMR : (TC Offset: N/A) Stepper Motor Mode Register -------- */ +#define TC_SMMR_GCEN (0x1u << 0) /* (TC_SMMR) Gray Count Enable */ +#define TC_SMMR_DOWN (0x1u << 1) /* (TC_SMMR) DOWN Count */ +/* -------- TC_CV : (TC Offset: N/A) Counter Value -------- */ +#define TC_CV_CV_Pos 0 +#define TC_CV_CV_Msk (0xffffffffu << TC_CV_CV_Pos) /* (TC_CV) Counter Value */ +/* -------- TC_RA : (TC Offset: N/A) Register A -------- */ +#define TC_RA_RA_Pos 0 +#define TC_RA_RA_Msk (0xffffffffu << TC_RA_RA_Pos) /* (TC_RA) Register A */ +#define TC_RA_RA(value) ((TC_RA_RA_Msk & ((value) << TC_RA_RA_Pos))) +/* -------- TC_RB : (TC Offset: N/A) Register B -------- */ +#define TC_RB_RB_Pos 0 +#define TC_RB_RB_Msk (0xffffffffu << TC_RB_RB_Pos) /* (TC_RB) Register B */ +#define TC_RB_RB(value) ((TC_RB_RB_Msk & ((value) << TC_RB_RB_Pos))) +/* -------- TC_RC : (TC Offset: N/A) Register C -------- */ +#define TC_RC_RC_Pos 0 +#define TC_RC_RC_Msk (0xffffffffu << TC_RC_RC_Pos) /* (TC_RC) Register C */ +#define TC_RC_RC(value) ((TC_RC_RC_Msk & ((value) << TC_RC_RC_Pos))) +/* -------- TC_SR : (TC Offset: N/A) Status Register -------- */ +#define TC_SR_COVFS (0x1u << 0) /* (TC_SR) Counter Overflow Status */ +#define TC_SR_LOVRS (0x1u << 1) /* (TC_SR) Load Overrun Status */ +#define TC_SR_CPAS (0x1u << 2) /* (TC_SR) RA Compare Status */ +#define TC_SR_CPBS (0x1u << 3) /* (TC_SR) RB Compare Status */ +#define TC_SR_CPCS (0x1u << 4) /* (TC_SR) RC Compare Status */ +#define TC_SR_LDRAS (0x1u << 5) /* (TC_SR) RA Loading Status */ +#define TC_SR_LDRBS (0x1u << 6) /* (TC_SR) RB Loading Status */ +#define TC_SR_ETRGS (0x1u << 7) /* (TC_SR) External Trigger Status */ +#define TC_SR_CLKSTA (0x1u << 16) /* (TC_SR) Clock Enabling Status */ +#define TC_SR_MTIOA (0x1u << 17) /* (TC_SR) TIOA Mirror */ +#define TC_SR_MTIOB (0x1u << 18) /* (TC_SR) TIOB Mirror */ +/* -------- TC_IER : (TC Offset: N/A) Interrupt Enable Register -------- */ +#define TC_IER_COVFS (0x1u << 0) /* (TC_IER) Counter Overflow */ +#define TC_IER_LOVRS (0x1u << 1) /* (TC_IER) Load Overrun */ +#define TC_IER_CPAS (0x1u << 2) /* (TC_IER) RA Compare */ +#define TC_IER_CPBS (0x1u << 3) /* (TC_IER) RB Compare */ +#define TC_IER_CPCS (0x1u << 4) /* (TC_IER) RC Compare */ +#define TC_IER_LDRAS (0x1u << 5) /* (TC_IER) RA Loading */ +#define TC_IER_LDRBS (0x1u << 6) /* (TC_IER) RB Loading */ +#define TC_IER_ETRGS (0x1u << 7) /* (TC_IER) External Trigger */ +/* -------- TC_IDR : (TC Offset: N/A) Interrupt Disable Register -------- */ +#define TC_IDR_COVFS (0x1u << 0) /* (TC_IDR) Counter Overflow */ +#define TC_IDR_LOVRS (0x1u << 1) /* (TC_IDR) Load Overrun */ +#define TC_IDR_CPAS (0x1u << 2) /* (TC_IDR) RA Compare */ +#define TC_IDR_CPBS (0x1u << 3) /* (TC_IDR) RB Compare */ +#define TC_IDR_CPCS (0x1u << 4) /* (TC_IDR) RC Compare */ +#define TC_IDR_LDRAS (0x1u << 5) /* (TC_IDR) RA Loading */ +#define TC_IDR_LDRBS (0x1u << 6) /* (TC_IDR) RB Loading */ +#define TC_IDR_ETRGS (0x1u << 7) /* (TC_IDR) External Trigger */ +/* -------- TC_IMR : (TC Offset: N/A) Interrupt Mask Register -------- */ +#define TC_IMR_COVFS (0x1u << 0) /* (TC_IMR) Counter Overflow */ +#define TC_IMR_LOVRS (0x1u << 1) /* (TC_IMR) Load Overrun */ +#define TC_IMR_CPAS (0x1u << 2) /* (TC_IMR) RA Compare */ +#define TC_IMR_CPBS (0x1u << 3) /* (TC_IMR) RB Compare */ +#define TC_IMR_CPCS (0x1u << 4) /* (TC_IMR) RC Compare */ +#define TC_IMR_LDRAS (0x1u << 5) /* (TC_IMR) RA Loading */ +#define TC_IMR_LDRBS (0x1u << 6) /* (TC_IMR) RB Loading */ +#define TC_IMR_ETRGS (0x1u << 7) /* (TC_IMR) External Trigger */ +/* -------- TC_BCR : (TC Offset: 0xC0) Block Control Register -------- */ +#define TC_BCR_SYNC (0x1u << 0) /* (TC_BCR) Synchro Command */ +/* -------- TC_BMR : (TC Offset: 0xC4) Block Mode Register -------- */ +#define TC_BMR_TC0XC0S_Pos 0 +#define TC_BMR_TC0XC0S_Msk (0x3u << TC_BMR_TC0XC0S_Pos) /* (TC_BMR) External Clock Signal 0 Selection */ +#define TC_BMR_TC0XC0S_TCLK0 (0x0u << 0) /* (TC_BMR) Signal connected to XC0: TCLK0 */ +#define TC_BMR_TC0XC0S_TIOA1 (0x2u << 0) /* (TC_BMR) Signal connected to XC0: TIOA1 */ +#define TC_BMR_TC0XC0S_TIOA2 (0x3u << 0) /* (TC_BMR) Signal connected to XC0: TIOA2 */ +#define TC_BMR_TC1XC1S_Pos 2 +#define TC_BMR_TC1XC1S_Msk (0x3u << TC_BMR_TC1XC1S_Pos) /* (TC_BMR) External Clock Signal 1 Selection */ +#define TC_BMR_TC1XC1S_TCLK1 (0x0u << 2) /* (TC_BMR) Signal connected to XC1: TCLK1 */ +#define TC_BMR_TC1XC1S_TIOA0 (0x2u << 2) /* (TC_BMR) Signal connected to XC1: TIOA0 */ +#define TC_BMR_TC1XC1S_TIOA2 (0x3u << 2) /* (TC_BMR) Signal connected to XC1: TIOA2 */ +#define TC_BMR_TC2XC2S_Pos 4 +#define TC_BMR_TC2XC2S_Msk (0x3u << TC_BMR_TC2XC2S_Pos) /* (TC_BMR) External Clock Signal 2 Selection */ +#define TC_BMR_TC2XC2S_TCLK2 (0x0u << 4) /* (TC_BMR) Signal connected to XC2: TCLK2 */ +#define TC_BMR_TC2XC2S_TIOA1 (0x2u << 4) /* (TC_BMR) Signal connected to XC2: TIOA1 */ +#define TC_BMR_TC2XC2S_TIOA2 (0x3u << 4) /* (TC_BMR) Signal connected to XC2: TIOA2 */ +#define TC_BMR_QDEN (0x1u << 8) /* (TC_BMR) Quadrature Decoder ENabled */ +#define TC_BMR_POSEN (0x1u << 9) /* (TC_BMR) POSition ENabled */ +#define TC_BMR_SPEEDEN (0x1u << 10) /* (TC_BMR) SPEED ENabled */ +#define TC_BMR_QDTRANS (0x1u << 11) /* (TC_BMR) Quadrature Decoding TRANSparent */ +#define TC_BMR_EDGPHA (0x1u << 12) /* (TC_BMR) EDGe on PHA count mode */ +#define TC_BMR_INVA (0x1u << 13) /* (TC_BMR) INVerted phA */ +#define TC_BMR_INVB (0x1u << 14) /* (TC_BMR) INVerted phB */ +#define TC_BMR_INVIDX (0x1u << 15) /* (TC_BMR) INVerted InDeX */ +#define TC_BMR_SWAP (0x1u << 16) /* (TC_BMR) SWAP PHA and PHB */ +#define TC_BMR_IDXPHB (0x1u << 17) /* (TC_BMR) InDeX pin is PHB pin */ +#define TC_BMR_FILTER (0x1u << 19) /* (TC_BMR) */ +#define TC_BMR_MAXFILT_Pos 20 +#define TC_BMR_MAXFILT_Msk (0x3fu << TC_BMR_MAXFILT_Pos) /* (TC_BMR) MAXimum FILTer */ +#define TC_BMR_MAXFILT(value) ((TC_BMR_MAXFILT_Msk & ((value) << TC_BMR_MAXFILT_Pos))) +/* -------- TC_QIER : (TC Offset: 0xC8) QDEC Interrupt Enable Register -------- */ +#define TC_QIER_IDX (0x1u << 0) /* (TC_QIER) InDeX */ +#define TC_QIER_DIRCHG (0x1u << 1) /* (TC_QIER) DIRection CHanGe */ +#define TC_QIER_QERR (0x1u << 2) /* (TC_QIER) Quadrature ERRor */ +/* -------- TC_QIDR : (TC Offset: 0xCC) QDEC Interrupt Disable Register -------- */ +#define TC_QIDR_IDX (0x1u << 0) /* (TC_QIDR) InDeX */ +#define TC_QIDR_DIRCHG (0x1u << 1) /* (TC_QIDR) DIRection CHanGe */ +#define TC_QIDR_QERR (0x1u << 2) /* (TC_QIDR) Quadrature ERRor */ +/* -------- TC_QIMR : (TC Offset: 0xD0) QDEC Interrupt Mask Register -------- */ +#define TC_QIMR_IDX (0x1u << 0) /* (TC_QIMR) InDeX */ +#define TC_QIMR_DIRCHG (0x1u << 1) /* (TC_QIMR) DIRection CHanGe */ +#define TC_QIMR_QERR (0x1u << 2) /* (TC_QIMR) Quadrature ERRor */ +/* -------- TC_QISR : (TC Offset: 0xD4) QDEC Interrupt Status Register -------- */ +#define TC_QISR_IDX (0x1u << 0) /* (TC_QISR) InDeX */ +#define TC_QISR_DIRCHG (0x1u << 1) /* (TC_QISR) DIRection CHanGe */ +#define TC_QISR_QERR (0x1u << 2) /* (TC_QISR) Quadrature ERRor */ +#define TC_QISR_DIR (0x1u << 8) /* (TC_QISR) Direction */ +/* -------- TC_WPMR : (TC Offset: 0xE4) Write Protect Mode Register -------- */ +#define TC_WPMR_WPEN (0x1u << 0) /* (TC_WPMR) Write Protect Enable */ +#define TC_WPMR_WPKEY_Pos 8 +#define TC_WPMR_WPKEY_Msk (0xffffffu << TC_WPMR_WPKEY_Pos) /* (TC_WPMR) Write Protect KEY */ +#define TC_WPMR_WPKEY(value) ((TC_WPMR_WPKEY_Msk & ((value) << TC_WPMR_WPKEY_Pos))) + + +/* ============================================================================= */ +/* SOFTWARE API DEFINITION FOR Two-wire Interface */ +/* ============================================================================= */ + +#ifndef __ASSEMBLY__ +/* Twi hardware registers */ +typedef struct { + WoReg TWI_CR; /* (Twi Offset: 0x00) Control Register */ + RwReg TWI_MMR; /* (Twi Offset: 0x04) Master Mode Register */ + RwReg TWI_SMR; /* (Twi Offset: 0x08) Slave Mode Register */ + RwReg TWI_IADR; /* (Twi Offset: 0x0C) Internal Address Register */ + RwReg TWI_CWGR; /* (Twi Offset: 0x10) Clock Waveform Generator Register */ + RwReg Reserved1[3]; + RoReg TWI_SR; /* (Twi Offset: 0x20) Status Register */ + WoReg TWI_IER; /* (Twi Offset: 0x24) Interrupt Enable Register */ + WoReg TWI_IDR; /* (Twi Offset: 0x28) Interrupt Disable Register */ + RoReg TWI_IMR; /* (Twi Offset: 0x2C) Interrupt Mask Register */ + RoReg TWI_RHR; /* (Twi Offset: 0x30) Receive Holding Register */ + WoReg TWI_THR; /* (Twi Offset: 0x34) Transmit Holding Register */ + RwReg Reserved2[50]; + RwReg TWI_RPR; /* (Twi Offset: 0x100) Receive Pointer Register */ + RwReg TWI_RCR; /* (Twi Offset: 0x104) Receive Counter Register */ + RwReg TWI_TPR; /* (Twi Offset: 0x108) Transmit Pointer Register */ + RwReg TWI_TCR; /* (Twi Offset: 0x10C) Transmit Counter Register */ + RwReg TWI_RNPR; /* (Twi Offset: 0x110) Receive Next Pointer Register */ + RwReg TWI_RNCR; /* (Twi Offset: 0x114) Receive Next Counter Register */ + RwReg TWI_TNPR; /* (Twi Offset: 0x118) Transmit Next Pointer Register */ + RwReg TWI_TNCR; /* (Twi Offset: 0x11C) Transmit Next Counter Register */ + WoReg TWI_PTCR; /* (Twi Offset: 0x120) Transfer Control Register */ + RoReg TWI_PTSR; /* (Twi Offset: 0x124) Transfer Status Register */ +} Twi; +#endif /* __ASSEMBLY__ */ +/* -------- TWI_CR : (TWI Offset: 0x00) Control Register -------- */ +#define TWI_CR_START (0x1u << 0) /* (TWI_CR) Send a START Condition */ +#define TWI_CR_STOP (0x1u << 1) /* (TWI_CR) Send a STOP Condition */ +#define TWI_CR_MSEN (0x1u << 2) /* (TWI_CR) TWI Master Mode Enabled */ +#define TWI_CR_MSDIS (0x1u << 3) /* (TWI_CR) TWI Master Mode Disabled */ +#define TWI_CR_SVEN (0x1u << 4) /* (TWI_CR) TWI Slave Mode Enabled */ +#define TWI_CR_SVDIS (0x1u << 5) /* (TWI_CR) TWI Slave Mode Disabled */ +#define TWI_CR_QUICK (0x1u << 6) /* (TWI_CR) SMBUS Quick Command */ +#define TWI_CR_SWRST (0x1u << 7) /* (TWI_CR) Software Reset */ +/* -------- TWI_MMR : (TWI Offset: 0x04) Master Mode Register -------- */ +#define TWI_MMR_IADRSZ_Pos 8 +#define TWI_MMR_IADRSZ_Msk (0x3u << TWI_MMR_IADRSZ_Pos) /* (TWI_MMR) Internal Device Address Size */ +#define TWI_MMR_IADRSZ_NONE (0x0u << 8) /* (TWI_MMR) No internal device address */ +#define TWI_MMR_IADRSZ_1_BYTE (0x1u << 8) /* (TWI_MMR) One-byte internal device address */ +#define TWI_MMR_IADRSZ_2_BYTE (0x2u << 8) /* (TWI_MMR) Two-byte internal device address */ +#define TWI_MMR_IADRSZ_3_BYTE (0x3u << 8) /* (TWI_MMR) Three-byte internal device address */ +#define TWI_MMR_MREAD (0x1u << 12) /* (TWI_MMR) Master Read Direction */ +#define TWI_MMR_DADR_Pos 16 +#define TWI_MMR_DADR_Msk (0x7fu << TWI_MMR_DADR_Pos) /* (TWI_MMR) Device Address */ +#define TWI_MMR_DADR(value) ((TWI_MMR_DADR_Msk & ((value) << TWI_MMR_DADR_Pos))) +/* -------- TWI_SMR : (TWI Offset: 0x08) Slave Mode Register -------- */ +#define TWI_SMR_SADR_Pos 16 +#define TWI_SMR_SADR_Msk (0x7fu << TWI_SMR_SADR_Pos) /* (TWI_SMR) Slave Address */ +#define TWI_SMR_SADR(value) ((TWI_SMR_SADR_Msk & ((value) << TWI_SMR_SADR_Pos))) +/* -------- TWI_IADR : (TWI Offset: 0x0C) Internal Address Register -------- */ +#define TWI_IADR_IADR_Pos 0 +#define TWI_IADR_IADR_Msk (0xffffffu << TWI_IADR_IADR_Pos) /* (TWI_IADR) Internal Address */ +#define TWI_IADR_IADR(value) ((TWI_IADR_IADR_Msk & ((value) << TWI_IADR_IADR_Pos))) +/* -------- TWI_CWGR : (TWI Offset: 0x10) Clock Waveform Generator Register -------- */ +#define TWI_CWGR_CLDIV_Pos 0 +#define TWI_CWGR_CLDIV_Msk (0xffu << TWI_CWGR_CLDIV_Pos) /* (TWI_CWGR) Clock Low Divider */ +#define TWI_CWGR_CLDIV(value) ((TWI_CWGR_CLDIV_Msk & ((value) << TWI_CWGR_CLDIV_Pos))) +#define TWI_CWGR_CHDIV_Pos 8 +#define TWI_CWGR_CHDIV_Msk (0xffu << TWI_CWGR_CHDIV_Pos) /* (TWI_CWGR) Clock High Divider */ +#define TWI_CWGR_CHDIV(value) ((TWI_CWGR_CHDIV_Msk & ((value) << TWI_CWGR_CHDIV_Pos))) +#define TWI_CWGR_CKDIV_Pos 16 +#define TWI_CWGR_CKDIV_Msk (0x7u << TWI_CWGR_CKDIV_Pos) /* (TWI_CWGR) Clock Divider */ +#define TWI_CWGR_CKDIV(value) ((TWI_CWGR_CKDIV_Msk & ((value) << TWI_CWGR_CKDIV_Pos))) +/* -------- TWI_SR : (TWI Offset: 0x20) Status Register -------- */ +#define TWI_SR_TXCOMP (0x1u << 0) /* (TWI_SR) Transmission Completed (automatically set / reset) */ +#define TWI_SR_RXRDY (0x1u << 1) /* (TWI_SR) Receive Holding Register Ready (automatically set / reset) */ +#define TWI_SR_TXRDY (0x1u << 2) /* (TWI_SR) Transmit Holding Register Ready (automatically set / reset) */ +#define TWI_SR_SVREAD (0x1u << 3) /* (TWI_SR) Slave Read (automatically set / reset) */ +#define TWI_SR_SVACC (0x1u << 4) /* (TWI_SR) Slave Access (automatically set / reset) */ +#define TWI_SR_GACC (0x1u << 5) /* (TWI_SR) General Call Access (clear on read) */ +#define TWI_SR_OVRE (0x1u << 6) /* (TWI_SR) Overrun Error (clear on read) */ +#define TWI_SR_NACK (0x1u << 8) /* (TWI_SR) Not Acknowledged (clear on read) */ +#define TWI_SR_ARBLST (0x1u << 9) /* (TWI_SR) Arbitration Lost (clear on read) */ +#define TWI_SR_SCLWS (0x1u << 10) /* (TWI_SR) Clock Wait State (automatically set / reset) */ +#define TWI_SR_EOSACC (0x1u << 11) /* (TWI_SR) End Of Slave Access (clear on read) */ +#define TWI_SR_ENDRX (0x1u << 12) /* (TWI_SR) End of RX buffer */ +#define TWI_SR_ENDTX (0x1u << 13) /* (TWI_SR) End of TX buffer */ +#define TWI_SR_RXBUFF (0x1u << 14) /* (TWI_SR) RX Buffer Full */ +#define TWI_SR_TXBUFE (0x1u << 15) /* (TWI_SR) TX Buffer Empty */ +/* -------- TWI_IER : (TWI Offset: 0x24) Interrupt Enable Register -------- */ +#define TWI_IER_TXCOMP (0x1u << 0) /* (TWI_IER) Transmission Completed Interrupt Enable */ +#define TWI_IER_RXRDY (0x1u << 1) /* (TWI_IER) Receive Holding Register Ready Interrupt Enable */ +#define TWI_IER_TXRDY (0x1u << 2) /* (TWI_IER) Transmit Holding Register Ready Interrupt Enable */ +#define TWI_IER_SVACC (0x1u << 4) /* (TWI_IER) Slave Access Interrupt Enable */ +#define TWI_IER_GACC (0x1u << 5) /* (TWI_IER) General Call Access Interrupt Enable */ +#define TWI_IER_OVRE (0x1u << 6) /* (TWI_IER) Overrun Error Interrupt Enable */ +#define TWI_IER_NACK (0x1u << 8) /* (TWI_IER) Not Acknowledge Interrupt Enable */ +#define TWI_IER_ARBLST (0x1u << 9) /* (TWI_IER) Arbitration Lost Interrupt Enable */ +#define TWI_IER_SCL_WS (0x1u << 10) /* (TWI_IER) Clock Wait State Interrupt Enable */ +#define TWI_IER_EOSACC (0x1u << 11) /* (TWI_IER) End Of Slave Access Interrupt Enable */ +#define TWI_IER_ENDRX (0x1u << 12) /* (TWI_IER) End of Receive Buffer Interrupt Enable */ +#define TWI_IER_ENDTX (0x1u << 13) /* (TWI_IER) End of Transmit Buffer Interrupt Enable */ +#define TWI_IER_RXBUFF (0x1u << 14) /* (TWI_IER) Receive Buffer Full Interrupt Enable */ +#define TWI_IER_TXBUFE (0x1u << 15) /* (TWI_IER) Transmit Buffer Empty Interrupt Enable */ +/* -------- TWI_IDR : (TWI Offset: 0x28) Interrupt Disable Register -------- */ +#define TWI_IDR_TXCOMP (0x1u << 0) /* (TWI_IDR) Transmission Completed Interrupt Disable */ +#define TWI_IDR_RXRDY (0x1u << 1) /* (TWI_IDR) Receive Holding Register Ready Interrupt Disable */ +#define TWI_IDR_TXRDY (0x1u << 2) /* (TWI_IDR) Transmit Holding Register Ready Interrupt Disable */ +#define TWI_IDR_SVACC (0x1u << 4) /* (TWI_IDR) Slave Access Interrupt Disable */ +#define TWI_IDR_GACC (0x1u << 5) /* (TWI_IDR) General Call Access Interrupt Disable */ +#define TWI_IDR_OVRE (0x1u << 6) /* (TWI_IDR) Overrun Error Interrupt Disable */ +#define TWI_IDR_NACK (0x1u << 8) /* (TWI_IDR) Not Acknowledge Interrupt Disable */ +#define TWI_IDR_ARBLST (0x1u << 9) /* (TWI_IDR) Arbitration Lost Interrupt Disable */ +#define TWI_IDR_SCL_WS (0x1u << 10) /* (TWI_IDR) Clock Wait State Interrupt Disable */ +#define TWI_IDR_EOSACC (0x1u << 11) /* (TWI_IDR) End Of Slave Access Interrupt Disable */ +#define TWI_IDR_ENDRX (0x1u << 12) /* (TWI_IDR) End of Receive Buffer Interrupt Disable */ +#define TWI_IDR_ENDTX (0x1u << 13) /* (TWI_IDR) End of Transmit Buffer Interrupt Disable */ +#define TWI_IDR_RXBUFF (0x1u << 14) /* (TWI_IDR) Receive Buffer Full Interrupt Disable */ +#define TWI_IDR_TXBUFE (0x1u << 15) /* (TWI_IDR) Transmit Buffer Empty Interrupt Disable */ +/* -------- TWI_IMR : (TWI Offset: 0x2C) Interrupt Mask Register -------- */ +#define TWI_IMR_TXCOMP (0x1u << 0) /* (TWI_IMR) Transmission Completed Interrupt Mask */ +#define TWI_IMR_RXRDY (0x1u << 1) /* (TWI_IMR) Receive Holding Register Ready Interrupt Mask */ +#define TWI_IMR_TXRDY (0x1u << 2) /* (TWI_IMR) Transmit Holding Register Ready Interrupt Mask */ +#define TWI_IMR_SVACC (0x1u << 4) /* (TWI_IMR) Slave Access Interrupt Mask */ +#define TWI_IMR_GACC (0x1u << 5) /* (TWI_IMR) General Call Access Interrupt Mask */ +#define TWI_IMR_OVRE (0x1u << 6) /* (TWI_IMR) Overrun Error Interrupt Mask */ +#define TWI_IMR_NACK (0x1u << 8) /* (TWI_IMR) Not Acknowledge Interrupt Mask */ +#define TWI_IMR_ARBLST (0x1u << 9) /* (TWI_IMR) Arbitration Lost Interrupt Mask */ +#define TWI_IMR_SCL_WS (0x1u << 10) /* (TWI_IMR) Clock Wait State Interrupt Mask */ +#define TWI_IMR_EOSACC (0x1u << 11) /* (TWI_IMR) End Of Slave Access Interrupt Mask */ +#define TWI_IMR_ENDRX (0x1u << 12) /* (TWI_IMR) End of Receive Buffer Interrupt Mask */ +#define TWI_IMR_ENDTX (0x1u << 13) /* (TWI_IMR) End of Transmit Buffer Interrupt Mask */ +#define TWI_IMR_RXBUFF (0x1u << 14) /* (TWI_IMR) Receive Buffer Full Interrupt Mask */ +#define TWI_IMR_TXBUFE (0x1u << 15) /* (TWI_IMR) Transmit Buffer Empty Interrupt Mask */ +/* -------- TWI_RHR : (TWI Offset: 0x30) Receive Holding Register -------- */ +#define TWI_RHR_RXDATA_Pos 0 +#define TWI_RHR_RXDATA_Msk (0xffu << TWI_RHR_RXDATA_Pos) /* (TWI_RHR) Master or Slave Receive Holding Data */ +/* -------- TWI_THR : (TWI Offset: 0x34) Transmit Holding Register -------- */ +#define TWI_THR_TXDATA_Pos 0 +#define TWI_THR_TXDATA_Msk (0xffu << TWI_THR_TXDATA_Pos) /* (TWI_THR) Master or Slave Transmit Holding Data */ +#define TWI_THR_TXDATA(value) ((TWI_THR_TXDATA_Msk & ((value) << TWI_THR_TXDATA_Pos))) +/* -------- TWI_RPR : (TWI Offset: 0x100) Receive Pointer Register -------- */ +#define TWI_RPR_RXPTR_Pos 0 +#define TWI_RPR_RXPTR_Msk (0xffffffffu << TWI_RPR_RXPTR_Pos) /* (TWI_RPR) Receive Pointer Register */ +#define TWI_RPR_RXPTR(value) ((TWI_RPR_RXPTR_Msk & ((value) << TWI_RPR_RXPTR_Pos))) +/* -------- TWI_RCR : (TWI Offset: 0x104) Receive Counter Register -------- */ +#define TWI_RCR_RXCTR_Pos 0 +#define TWI_RCR_RXCTR_Msk (0xffffu << TWI_RCR_RXCTR_Pos) /* (TWI_RCR) Receive Counter Register */ +#define TWI_RCR_RXCTR(value) ((TWI_RCR_RXCTR_Msk & ((value) << TWI_RCR_RXCTR_Pos))) +/* -------- TWI_TPR : (TWI Offset: 0x108) Transmit Pointer Register -------- */ +#define TWI_TPR_TXPTR_Pos 0 +#define TWI_TPR_TXPTR_Msk (0xffffffffu << TWI_TPR_TXPTR_Pos) /* (TWI_TPR) Transmit Counter Register */ +#define TWI_TPR_TXPTR(value) ((TWI_TPR_TXPTR_Msk & ((value) << TWI_TPR_TXPTR_Pos))) +/* -------- TWI_TCR : (TWI Offset: 0x10C) Transmit Counter Register -------- */ +#define TWI_TCR_TXCTR_Pos 0 +#define TWI_TCR_TXCTR_Msk (0xffffu << TWI_TCR_TXCTR_Pos) /* (TWI_TCR) Transmit Counter Register */ +#define TWI_TCR_TXCTR(value) ((TWI_TCR_TXCTR_Msk & ((value) << TWI_TCR_TXCTR_Pos))) +/* -------- TWI_RNPR : (TWI Offset: 0x110) Receive Next Pointer Register -------- */ +#define TWI_RNPR_RXNPTR_Pos 0 +#define TWI_RNPR_RXNPTR_Msk (0xffffffffu << TWI_RNPR_RXNPTR_Pos) /* (TWI_RNPR) Receive Next Pointer */ +#define TWI_RNPR_RXNPTR(value) ((TWI_RNPR_RXNPTR_Msk & ((value) << TWI_RNPR_RXNPTR_Pos))) +/* -------- TWI_RNCR : (TWI Offset: 0x114) Receive Next Counter Register -------- */ +#define TWI_RNCR_RXNCTR_Pos 0 +#define TWI_RNCR_RXNCTR_Msk (0xffffu << TWI_RNCR_RXNCTR_Pos) /* (TWI_RNCR) Receive Next Counter */ +#define TWI_RNCR_RXNCTR(value) ((TWI_RNCR_RXNCTR_Msk & ((value) << TWI_RNCR_RXNCTR_Pos))) +/* -------- TWI_TNPR : (TWI Offset: 0x118) Transmit Next Pointer Register -------- */ +#define TWI_TNPR_TXNPTR_Pos 0 +#define TWI_TNPR_TXNPTR_Msk (0xffffffffu << TWI_TNPR_TXNPTR_Pos) /* (TWI_TNPR) Transmit Next Pointer */ +#define TWI_TNPR_TXNPTR(value) ((TWI_TNPR_TXNPTR_Msk & ((value) << TWI_TNPR_TXNPTR_Pos))) +/* -------- TWI_TNCR : (TWI Offset: 0x11C) Transmit Next Counter Register -------- */ +#define TWI_TNCR_TXNCTR_Pos 0 +#define TWI_TNCR_TXNCTR_Msk (0xffffu << TWI_TNCR_TXNCTR_Pos) /* (TWI_TNCR) Transmit Counter Next */ +#define TWI_TNCR_TXNCTR(value) ((TWI_TNCR_TXNCTR_Msk & ((value) << TWI_TNCR_TXNCTR_Pos))) +/* -------- TWI_PTCR : (TWI Offset: 0x120) Transfer Control Register -------- */ +#define TWI_PTCR_RXTEN (0x1u << 0) /* (TWI_PTCR) Receiver Transfer Enable */ +#define TWI_PTCR_RXTDIS (0x1u << 1) /* (TWI_PTCR) Receiver Transfer Disable */ +#define TWI_PTCR_TXTEN (0x1u << 8) /* (TWI_PTCR) Transmitter Transfer Enable */ +#define TWI_PTCR_TXTDIS (0x1u << 9) /* (TWI_PTCR) Transmitter Transfer Disable */ +/* -------- TWI_PTSR : (TWI Offset: 0x124) Transfer Status Register -------- */ +#define TWI_PTSR_RXTEN (0x1u << 0) /* (TWI_PTSR) Receiver Transfer Enable */ +#define TWI_PTSR_TXTEN (0x1u << 8) /* (TWI_PTSR) Transmitter Transfer Enable */ + + + + +/* ************************************************************************** */ +/* REGISTER ACCESS DEFINITIONS FOR SAM3N */ +/* ************************************************************************** */ + +/* ========== Register definition for SPI peripheral ========== */ +#define REG_SPI_CR REG_ACCESS(WoReg, 0x40008000U) /* (SPI) Control Register */ +#define REG_SPI_MR REG_ACCESS(RwReg, 0x40008004U) /* (SPI) Mode Register */ +#define REG_SPI_RDR REG_ACCESS(RoReg, 0x40008008U) /* (SPI) Receive Data Register */ +#define REG_SPI_TDR REG_ACCESS(WoReg, 0x4000800CU) /* (SPI) Transmit Data Register */ +#define REG_SPI_SR REG_ACCESS(RoReg, 0x40008010U) /* (SPI) Status Register */ +#define REG_SPI_IER REG_ACCESS(WoReg, 0x40008014U) /* (SPI) Interrupt Enable Register */ +#define REG_SPI_IDR REG_ACCESS(WoReg, 0x40008018U) /* (SPI) Interrupt Disable Register */ +#define REG_SPI_IMR REG_ACCESS(RoReg, 0x4000801CU) /* (SPI) Interrupt Mask Register */ +#define REG_SPI_CSR REG_ACCESS(RwReg, 0x40008030U) /* (SPI) Chip Select Register */ +#define REG_SPI_WPMR REG_ACCESS(RwReg, 0x400080E4U) /* (SPI) Write Protection Control Register */ +#define REG_SPI_WPSR REG_ACCESS(RoReg, 0x400080E8U) /* (SPI) Write Protection Status Register */ +#define REG_SPI_RPR REG_ACCESS(RwReg, 0x40008100U) /* (SPI) Receive Pointer Register */ +#define REG_SPI_RCR REG_ACCESS(RwReg, 0x40008104U) /* (SPI) Receive Counter Register */ +#define REG_SPI_TPR REG_ACCESS(RwReg, 0x40008108U) /* (SPI) Transmit Pointer Register */ +#define REG_SPI_TCR REG_ACCESS(RwReg, 0x4000810CU) /* (SPI) Transmit Counter Register */ +#define REG_SPI_RNPR REG_ACCESS(RwReg, 0x40008110U) /* (SPI) Receive Next Pointer Register */ +#define REG_SPI_RNCR REG_ACCESS(RwReg, 0x40008114U) /* (SPI) Receive Next Counter Register */ +#define REG_SPI_TNPR REG_ACCESS(RwReg, 0x40008118U) /* (SPI) Transmit Next Pointer Register */ +#define REG_SPI_TNCR REG_ACCESS(RwReg, 0x4000811CU) /* (SPI) Transmit Next Counter Register */ +#define REG_SPI_PTCR REG_ACCESS(WoReg, 0x40008120U) /* (SPI) Transfer Control Register */ +#define REG_SPI_PTSR REG_ACCESS(RoReg, 0x40008124U) /* (SPI) Transfer Status Register */ +/* ========== Register definition for TC0 peripheral ========== */ +#define REG_TC0_CCR0 REG_ACCESS(WoReg, 0x40010000U) /* (TC0) Channel Control Register (channel = 0) */ +#define REG_TC0_CMR0 REG_ACCESS(RwReg, 0x40010004U) /* (TC0) Channel Mode Register (channel = 0) */ +#define REG_TC0_SMMR0 REG_ACCESS(RwReg, 0x40010008U) /* (TC0) Stepper Motor Mode Register (channel = 0) */ +#define REG_TC0_CV0 REG_ACCESS(RoReg, 0x40010010U) /* (TC0) Counter Value (channel = 0) */ +#define REG_TC0_RA0 REG_ACCESS(RwReg, 0x40010014U) /* (TC0) Register A (channel = 0) */ +#define REG_TC0_RB0 REG_ACCESS(RwReg, 0x40010018U) /* (TC0) Register B (channel = 0) */ +#define REG_TC0_RC0 REG_ACCESS(RwReg, 0x4001001CU) /* (TC0) Register C (channel = 0) */ +#define REG_TC0_SR0 REG_ACCESS(RoReg, 0x40010020U) /* (TC0) Status Register (channel = 0) */ +#define REG_TC0_IER0 REG_ACCESS(WoReg, 0x40010024U) /* (TC0) Interrupt Enable Register (channel = 0) */ +#define REG_TC0_IDR0 REG_ACCESS(WoReg, 0x40010028U) /* (TC0) Interrupt Disable Register (channel = 0) */ +#define REG_TC0_IMR0 REG_ACCESS(RoReg, 0x4001002CU) /* (TC0) Interrupt Mask Register (channel = 0) */ +#define REG_TC0_CCR1 REG_ACCESS(WoReg, 0x40010040U) /* (TC0) Channel Control Register (channel = 1) */ +#define REG_TC0_CMR1 REG_ACCESS(RwReg, 0x40010044U) /* (TC0) Channel Mode Register (channel = 1) */ +#define REG_TC0_SMMR1 REG_ACCESS(RwReg, 0x40010048U) /* (TC0) Stepper Motor Mode Register (channel = 1) */ +#define REG_TC0_CV1 REG_ACCESS(RoReg, 0x40010050U) /* (TC0) Counter Value (channel = 1) */ +#define REG_TC0_RA1 REG_ACCESS(RwReg, 0x40010054U) /* (TC0) Register A (channel = 1) */ +#define REG_TC0_RB1 REG_ACCESS(RwReg, 0x40010058U) /* (TC0) Register B (channel = 1) */ +#define REG_TC0_RC1 REG_ACCESS(RwReg, 0x4001005CU) /* (TC0) Register C (channel = 1) */ +#define REG_TC0_SR1 REG_ACCESS(RoReg, 0x40010060U) /* (TC0) Status Register (channel = 1) */ +#define REG_TC0_IER1 REG_ACCESS(WoReg, 0x40010064U) /* (TC0) Interrupt Enable Register (channel = 1) */ +#define REG_TC0_IDR1 REG_ACCESS(WoReg, 0x40010068U) /* (TC0) Interrupt Disable Register (channel = 1) */ +#define REG_TC0_IMR1 REG_ACCESS(RoReg, 0x4001006CU) /* (TC0) Interrupt Mask Register (channel = 1) */ +#define REG_TC0_CCR2 REG_ACCESS(WoReg, 0x40010080U) /* (TC0) Channel Control Register (channel = 2) */ +#define REG_TC0_CMR2 REG_ACCESS(RwReg, 0x40010084U) /* (TC0) Channel Mode Register (channel = 2) */ +#define REG_TC0_SMMR2 REG_ACCESS(RwReg, 0x40010088U) /* (TC0) Stepper Motor Mode Register (channel = 2) */ +#define REG_TC0_CV2 REG_ACCESS(RoReg, 0x40010090U) /* (TC0) Counter Value (channel = 2) */ +#define REG_TC0_RA2 REG_ACCESS(RwReg, 0x40010094U) /* (TC0) Register A (channel = 2) */ +#define REG_TC0_RB2 REG_ACCESS(RwReg, 0x40010098U) /* (TC0) Register B (channel = 2) */ +#define REG_TC0_RC2 REG_ACCESS(RwReg, 0x4001009CU) /* (TC0) Register C (channel = 2) */ +#define REG_TC0_SR2 REG_ACCESS(RoReg, 0x400100A0U) /* (TC0) Status Register (channel = 2) */ +#define REG_TC0_IER2 REG_ACCESS(WoReg, 0x400100A4U) /* (TC0) Interrupt Enable Register (channel = 2) */ +#define REG_TC0_IDR2 REG_ACCESS(WoReg, 0x400100A8U) /* (TC0) Interrupt Disable Register (channel = 2) */ +#define REG_TC0_IMR2 REG_ACCESS(RoReg, 0x400100ACU) /* (TC0) Interrupt Mask Register (channel = 2) */ +#define REG_TC0_BCR REG_ACCESS(WoReg, 0x400100C0U) /* (TC0) Block Control Register */ +#define REG_TC0_BMR REG_ACCESS(RwReg, 0x400100C4U) /* (TC0) Block Mode Register */ +#define REG_TC0_QIER REG_ACCESS(WoReg, 0x400100C8U) /* (TC0) QDEC Interrupt Enable Register */ +#define REG_TC0_QIDR REG_ACCESS(WoReg, 0x400100CCU) /* (TC0) QDEC Interrupt Disable Register */ +#define REG_TC0_QIMR REG_ACCESS(RoReg, 0x400100D0U) /* (TC0) QDEC Interrupt Mask Register */ +#define REG_TC0_QISR REG_ACCESS(RoReg, 0x400100D4U) /* (TC0) QDEC Interrupt Status Register */ +#define REG_TC0_WPMR REG_ACCESS(RwReg, 0x400100E4U) /* (TC0) Write Protect Mode Register */ +/* ========== Register definition for TC1 peripheral ========== */ +#define REG_TC1_CCR0 REG_ACCESS(WoReg, 0x40014000U) /* (TC1) Channel Control Register (channel = 0) */ +#define REG_TC1_CMR0 REG_ACCESS(RwReg, 0x40014004U) /* (TC1) Channel Mode Register (channel = 0) */ +#define REG_TC1_SMMR0 REG_ACCESS(RwReg, 0x40014008U) /* (TC1) Stepper Motor Mode Register (channel = 0) */ +#define REG_TC1_CV0 REG_ACCESS(RoReg, 0x40014010U) /* (TC1) Counter Value (channel = 0) */ +#define REG_TC1_RA0 REG_ACCESS(RwReg, 0x40014014U) /* (TC1) Register A (channel = 0) */ +#define REG_TC1_RB0 REG_ACCESS(RwReg, 0x40014018U) /* (TC1) Register B (channel = 0) */ +#define REG_TC1_RC0 REG_ACCESS(RwReg, 0x4001401CU) /* (TC1) Register C (channel = 0) */ +#define REG_TC1_SR0 REG_ACCESS(RoReg, 0x40014020U) /* (TC1) Status Register (channel = 0) */ +#define REG_TC1_IER0 REG_ACCESS(WoReg, 0x40014024U) /* (TC1) Interrupt Enable Register (channel = 0) */ +#define REG_TC1_IDR0 REG_ACCESS(WoReg, 0x40014028U) /* (TC1) Interrupt Disable Register (channel = 0) */ +#define REG_TC1_IMR0 REG_ACCESS(RoReg, 0x4001402CU) /* (TC1) Interrupt Mask Register (channel = 0) */ +#define REG_TC1_CCR1 REG_ACCESS(WoReg, 0x40014040U) /* (TC1) Channel Control Register (channel = 1) */ +#define REG_TC1_CMR1 REG_ACCESS(RwReg, 0x40014044U) /* (TC1) Channel Mode Register (channel = 1) */ +#define REG_TC1_SMMR1 REG_ACCESS(RwReg, 0x40014048U) /* (TC1) Stepper Motor Mode Register (channel = 1) */ +#define REG_TC1_CV1 REG_ACCESS(RoReg, 0x40014050U) /* (TC1) Counter Value (channel = 1) */ +#define REG_TC1_RA1 REG_ACCESS(RwReg, 0x40014054U) /* (TC1) Register A (channel = 1) */ +#define REG_TC1_RB1 REG_ACCESS(RwReg, 0x40014058U) /* (TC1) Register B (channel = 1) */ +#define REG_TC1_RC1 REG_ACCESS(RwReg, 0x4001405CU) /* (TC1) Register C (channel = 1) */ +#define REG_TC1_SR1 REG_ACCESS(RoReg, 0x40014060U) /* (TC1) Status Register (channel = 1) */ +#define REG_TC1_IER1 REG_ACCESS(WoReg, 0x40014064U) /* (TC1) Interrupt Enable Register (channel = 1) */ +#define REG_TC1_IDR1 REG_ACCESS(WoReg, 0x40014068U) /* (TC1) Interrupt Disable Register (channel = 1) */ +#define REG_TC1_IMR1 REG_ACCESS(RoReg, 0x4001406CU) /* (TC1) Interrupt Mask Register (channel = 1) */ +#define REG_TC1_CCR2 REG_ACCESS(WoReg, 0x40014080U) /* (TC1) Channel Control Register (channel = 2) */ +#define REG_TC1_CMR2 REG_ACCESS(RwReg, 0x40014084U) /* (TC1) Channel Mode Register (channel = 2) */ +#define REG_TC1_SMMR2 REG_ACCESS(RwReg, 0x40014088U) /* (TC1) Stepper Motor Mode Register (channel = 2) */ +#define REG_TC1_CV2 REG_ACCESS(RoReg, 0x40014090U) /* (TC1) Counter Value (channel = 2) */ +#define REG_TC1_RA2 REG_ACCESS(RwReg, 0x40014094U) /* (TC1) Register A (channel = 2) */ +#define REG_TC1_RB2 REG_ACCESS(RwReg, 0x40014098U) /* (TC1) Register B (channel = 2) */ +#define REG_TC1_RC2 REG_ACCESS(RwReg, 0x4001409CU) /* (TC1) Register C (channel = 2) */ +#define REG_TC1_SR2 REG_ACCESS(RoReg, 0x400140A0U) /* (TC1) Status Register (channel = 2) */ +#define REG_TC1_IER2 REG_ACCESS(WoReg, 0x400140A4U) /* (TC1) Interrupt Enable Register (channel = 2) */ +#define REG_TC1_IDR2 REG_ACCESS(WoReg, 0x400140A8U) /* (TC1) Interrupt Disable Register (channel = 2) */ +#define REG_TC1_IMR2 REG_ACCESS(RoReg, 0x400140ACU) /* (TC1) Interrupt Mask Register (channel = 2) */ +#define REG_TC1_BCR REG_ACCESS(WoReg, 0x400140C0U) /* (TC1) Block Control Register */ +#define REG_TC1_BMR REG_ACCESS(RwReg, 0x400140C4U) /* (TC1) Block Mode Register */ +#define REG_TC1_QIER REG_ACCESS(WoReg, 0x400140C8U) /* (TC1) QDEC Interrupt Enable Register */ +#define REG_TC1_QIDR REG_ACCESS(WoReg, 0x400140CCU) /* (TC1) QDEC Interrupt Disable Register */ +#define REG_TC1_QIMR REG_ACCESS(RoReg, 0x400140D0U) /* (TC1) QDEC Interrupt Mask Register */ +#define REG_TC1_QISR REG_ACCESS(RoReg, 0x400140D4U) /* (TC1) QDEC Interrupt Status Register */ +#define REG_TC1_WPMR REG_ACCESS(RwReg, 0x400140E4U) /* (TC1) Write Protect Mode Register */ +/* ========== Register definition for TWI0 peripheral ========== */ +#define REG_TWI0_CR REG_ACCESS(WoReg, 0x40018000U) /* (TWI0) Control Register */ +#define REG_TWI0_MMR REG_ACCESS(RwReg, 0x40018004U) /* (TWI0) Master Mode Register */ +#define REG_TWI0_SMR REG_ACCESS(RwReg, 0x40018008U) /* (TWI0) Slave Mode Register */ +#define REG_TWI0_IADR REG_ACCESS(RwReg, 0x4001800CU) /* (TWI0) Internal Address Register */ +#define REG_TWI0_CWGR REG_ACCESS(RwReg, 0x40018010U) /* (TWI0) Clock Waveform Generator Register */ +#define REG_TWI0_SR REG_ACCESS(RoReg, 0x40018020U) /* (TWI0) Status Register */ +#define REG_TWI0_IER REG_ACCESS(WoReg, 0x40018024U) /* (TWI0) Interrupt Enable Register */ +#define REG_TWI0_IDR REG_ACCESS(WoReg, 0x40018028U) /* (TWI0) Interrupt Disable Register */ +#define REG_TWI0_IMR REG_ACCESS(RoReg, 0x4001802CU) /* (TWI0) Interrupt Mask Register */ +#define REG_TWI0_RHR REG_ACCESS(RoReg, 0x40018030U) /* (TWI0) Receive Holding Register */ +#define REG_TWI0_THR REG_ACCESS(WoReg, 0x40018034U) /* (TWI0) Transmit Holding Register */ +#define REG_TWI0_RPR REG_ACCESS(RwReg, 0x40018100U) /* (TWI0) Receive Pointer Register */ +#define REG_TWI0_RCR REG_ACCESS(RwReg, 0x40018104U) /* (TWI0) Receive Counter Register */ +#define REG_TWI0_TPR REG_ACCESS(RwReg, 0x40018108U) /* (TWI0) Transmit Pointer Register */ +#define REG_TWI0_TCR REG_ACCESS(RwReg, 0x4001810CU) /* (TWI0) Transmit Counter Register */ +#define REG_TWI0_RNPR REG_ACCESS(RwReg, 0x40018110U) /* (TWI0) Receive Next Pointer Register */ +#define REG_TWI0_RNCR REG_ACCESS(RwReg, 0x40018114U) /* (TWI0) Receive Next Counter Register */ +#define REG_TWI0_TNPR REG_ACCESS(RwReg, 0x40018118U) /* (TWI0) Transmit Next Pointer Register */ +#define REG_TWI0_TNCR REG_ACCESS(RwReg, 0x4001811CU) /* (TWI0) Transmit Next Counter Register */ +#define REG_TWI0_PTCR REG_ACCESS(WoReg, 0x40018120U) /* (TWI0) Transfer Control Register */ +#define REG_TWI0_PTSR REG_ACCESS(RoReg, 0x40018124U) /* (TWI0) Transfer Status Register */ +/* ========== Register definition for TWI1 peripheral ========== */ +#define REG_TWI1_CR REG_ACCESS(WoReg, 0x4001C000U) /* (TWI1) Control Register */ +#define REG_TWI1_MMR REG_ACCESS(RwReg, 0x4001C004U) /* (TWI1) Master Mode Register */ +#define REG_TWI1_SMR REG_ACCESS(RwReg, 0x4001C008U) /* (TWI1) Slave Mode Register */ +#define REG_TWI1_IADR REG_ACCESS(RwReg, 0x4001C00CU) /* (TWI1) Internal Address Register */ +#define REG_TWI1_CWGR REG_ACCESS(RwReg, 0x4001C010U) /* (TWI1) Clock Waveform Generator Register */ +#define REG_TWI1_SR REG_ACCESS(RoReg, 0x4001C020U) /* (TWI1) Status Register */ +#define REG_TWI1_IER REG_ACCESS(WoReg, 0x4001C024U) /* (TWI1) Interrupt Enable Register */ +#define REG_TWI1_IDR REG_ACCESS(WoReg, 0x4001C028U) /* (TWI1) Interrupt Disable Register */ +#define REG_TWI1_IMR REG_ACCESS(RoReg, 0x4001C02CU) /* (TWI1) Interrupt Mask Register */ +#define REG_TWI1_RHR REG_ACCESS(RoReg, 0x4001C030U) /* (TWI1) Receive Holding Register */ +#define REG_TWI1_THR REG_ACCESS(WoReg, 0x4001C034U) /* (TWI1) Transmit Holding Register */ +/* ========== Register definition for PWM peripheral ========== */ +#define REG_PWM_MR REG_ACCESS(RwReg, 0x40020000U) /* (PWM) PWM Mode Register */ +#define REG_PWM_ENA REG_ACCESS(WoReg, 0x40020004U) /* (PWM) PWM Enable Register */ +#define REG_PWM_DIS REG_ACCESS(WoReg, 0x40020008U) /* (PWM) PWM Disable Register */ +#define REG_PWM_SR REG_ACCESS(RoReg, 0x4002000CU) /* (PWM) PWM Status Register */ +#define REG_PWM_IER REG_ACCESS(WoReg, 0x40020010U) /* (PWM) PWM Interrupt Enable Register */ +#define REG_PWM_IDR REG_ACCESS(WoReg, 0x40020014U) /* (PWM) PWM Interrupt Disable Register */ +#define REG_PWM_IMR REG_ACCESS(RoReg, 0x40020018U) /* (PWM) PWM Interrupt Mask Register */ +#define REG_PWM_ISR REG_ACCESS(RoReg, 0x4002001CU) /* (PWM) PWM Interrupt Status Register */ +#define REG_PWM_CMR0 REG_ACCESS(RwReg, 0x40020200U) /* (PWM) PWM Channel Mode Register (ch_num = 0) */ +#define REG_PWM_CDTY0 REG_ACCESS(RwReg, 0x40020204U) /* (PWM) PWM Channel Duty Cycle Register (ch_num = 0) */ +#define REG_PWM_CPRD0 REG_ACCESS(RwReg, 0x40020208U) /* (PWM) PWM Channel Period Register (ch_num = 0) */ +#define REG_PWM_CCNT0 REG_ACCESS(RoReg, 0x4002020CU) /* (PWM) PWM Channel Counter Register (ch_num = 0) */ +#define REG_PWM_CUPD0 REG_ACCESS(WoReg, 0x40020210U) /* (PWM) PWM Channel Update Register (ch_num = 0) */ +#define REG_PWM_CMR1 REG_ACCESS(RwReg, 0x40020220U) /* (PWM) PWM Channel Mode Register (ch_num = 1) */ +#define REG_PWM_CDTY1 REG_ACCESS(RwReg, 0x40020224U) /* (PWM) PWM Channel Duty Cycle Register (ch_num = 1) */ +#define REG_PWM_CPRD1 REG_ACCESS(RwReg, 0x40020228U) /* (PWM) PWM Channel Period Register (ch_num = 1) */ +#define REG_PWM_CCNT1 REG_ACCESS(RoReg, 0x4002022CU) /* (PWM) PWM Channel Counter Register (ch_num = 1) */ +#define REG_PWM_CUPD1 REG_ACCESS(WoReg, 0x40020230U) /* (PWM) PWM Channel Update Register (ch_num = 1) */ +#define REG_PWM_CMR2 REG_ACCESS(RwReg, 0x40020240U) /* (PWM) PWM Channel Mode Register (ch_num = 2) */ +#define REG_PWM_CDTY2 REG_ACCESS(RwReg, 0x40020244U) /* (PWM) PWM Channel Duty Cycle Register (ch_num = 2) */ +#define REG_PWM_CPRD2 REG_ACCESS(RwReg, 0x40020248U) /* (PWM) PWM Channel Period Register (ch_num = 2) */ +#define REG_PWM_CCNT2 REG_ACCESS(RoReg, 0x4002024CU) /* (PWM) PWM Channel Counter Register (ch_num = 2) */ +#define REG_PWM_CUPD2 REG_ACCESS(WoReg, 0x40020250U) /* (PWM) PWM Channel Update Register (ch_num = 2) */ +#define REG_PWM_CMR3 REG_ACCESS(RwReg, 0x40020260U) /* (PWM) PWM Channel Mode Register (ch_num = 3) */ +#define REG_PWM_CDTY3 REG_ACCESS(RwReg, 0x40020264U) /* (PWM) PWM Channel Duty Cycle Register (ch_num = 3) */ +#define REG_PWM_CPRD3 REG_ACCESS(RwReg, 0x40020268U) /* (PWM) PWM Channel Period Register (ch_num = 3) */ +#define REG_PWM_CCNT3 REG_ACCESS(RoReg, 0x4002026CU) /* (PWM) PWM Channel Counter Register (ch_num = 3) */ +#define REG_PWM_CUPD3 REG_ACCESS(WoReg, 0x40020270U) /* (PWM) PWM Channel Update Register (ch_num = 3) */ +/* ========== Register definition for USART0 peripheral ========== */ +#define REG_USART0_CR REG_ACCESS(WoReg, 0x40024000U) /* (USART0) Control Register */ +#define REG_USART0_MR REG_ACCESS(RwReg, 0x40024004U) /* (USART0) Mode Register */ +#define REG_USART0_IER REG_ACCESS(WoReg, 0x40024008U) /* (USART0) Interrupt Enable Register */ +#define REG_USART0_IDR REG_ACCESS(WoReg, 0x4002400CU) /* (USART0) Interrupt Disable Register */ +#define REG_USART0_IMR REG_ACCESS(RoReg, 0x40024010U) /* (USART0) Interrupt Mask Register */ +#define REG_USART0_CSR REG_ACCESS(RoReg, 0x40024014U) /* (USART0) Channel Status Register */ +#define REG_USART0_RHR REG_ACCESS(RoReg, 0x40024018U) /* (USART0) Receiver Holding Register */ +#define REG_USART0_THR REG_ACCESS(WoReg, 0x4002401CU) /* (USART0) Transmitter Holding Register */ +#define REG_USART0_BRGR REG_ACCESS(RwReg, 0x40024020U) /* (USART0) Baud Rate Generator Register */ +#define REG_USART0_RTOR REG_ACCESS(RwReg, 0x40024024U) /* (USART0) Receiver Time-out Register */ +#define REG_USART0_TTGR REG_ACCESS(RwReg, 0x40024028U) /* (USART0) Transmitter Timeguard Register */ +#define REG_USART0_FIDI REG_ACCESS(RwReg, 0x40024040U) /* (USART0) FI DI Ratio Register */ +#define REG_USART0_NER REG_ACCESS(RoReg, 0x40024044U) /* (USART0) Number of Errors Register */ +#define REG_USART0_IF REG_ACCESS(RwReg, 0x4002404CU) /* (USART0) IrDA Filter Register */ +#define REG_USART0_WPMR REG_ACCESS(RwReg, 0x400240E4U) /* (USART0) Write Protect Mode Register */ +#define REG_USART0_WPSR REG_ACCESS(RoReg, 0x400240E8U) /* (USART0) Write Protect Status Register */ +#define REG_USART0_RPR REG_ACCESS(RwReg, 0x40024100U) /* (USART0) Receive Pointer Register */ +#define REG_USART0_RCR REG_ACCESS(RwReg, 0x40024104U) /* (USART0) Receive Counter Register */ +#define REG_USART0_TPR REG_ACCESS(RwReg, 0x40024108U) /* (USART0) Transmit Pointer Register */ +#define REG_USART0_TCR REG_ACCESS(RwReg, 0x4002410CU) /* (USART0) Transmit Counter Register */ +#define REG_USART0_RNPR REG_ACCESS(RwReg, 0x40024110U) /* (USART0) Receive Next Pointer Register */ +#define REG_USART0_RNCR REG_ACCESS(RwReg, 0x40024114U) /* (USART0) Receive Next Counter Register */ +#define REG_USART0_TNPR REG_ACCESS(RwReg, 0x40024118U) /* (USART0) Transmit Next Pointer Register */ +#define REG_USART0_TNCR REG_ACCESS(RwReg, 0x4002411CU) /* (USART0) Transmit Next Counter Register */ +#define REG_USART0_PTCR REG_ACCESS(WoReg, 0x40024120U) /* (USART0) Transfer Control Register */ +#define REG_USART0_PTSR REG_ACCESS(RoReg, 0x40024124U) /* (USART0) Transfer Status Register */ +/* ========== Register definition for USART1 peripheral ========== */ +#define REG_USART1_CR REG_ACCESS(WoReg, 0x40028000U) /* (USART1) Control Register */ +#define REG_USART1_MR REG_ACCESS(RwReg, 0x40028004U) /* (USART1) Mode Register */ +#define REG_USART1_IER REG_ACCESS(WoReg, 0x40028008U) /* (USART1) Interrupt Enable Register */ +#define REG_USART1_IDR REG_ACCESS(WoReg, 0x4002800CU) /* (USART1) Interrupt Disable Register */ +#define REG_USART1_IMR REG_ACCESS(RoReg, 0x40028010U) /* (USART1) Interrupt Mask Register */ +#define REG_USART1_CSR REG_ACCESS(RoReg, 0x40028014U) /* (USART1) Channel Status Register */ +#define REG_USART1_RHR REG_ACCESS(RoReg, 0x40028018U) /* (USART1) Receiver Holding Register */ +#define REG_USART1_THR REG_ACCESS(WoReg, 0x4002801CU) /* (USART1) Transmitter Holding Register */ +#define REG_USART1_BRGR REG_ACCESS(RwReg, 0x40028020U) /* (USART1) Baud Rate Generator Register */ +#define REG_USART1_RTOR REG_ACCESS(RwReg, 0x40028024U) /* (USART1) Receiver Time-out Register */ +#define REG_USART1_TTGR REG_ACCESS(RwReg, 0x40028028U) /* (USART1) Transmitter Timeguard Register */ +#define REG_USART1_FIDI REG_ACCESS(RwReg, 0x40028040U) /* (USART1) FI DI Ratio Register */ +#define REG_USART1_NER REG_ACCESS(RoReg, 0x40028044U) /* (USART1) Number of Errors Register */ +#define REG_USART1_IF REG_ACCESS(RwReg, 0x4002804CU) /* (USART1) IrDA Filter Register */ +#define REG_USART1_WPMR REG_ACCESS(RwReg, 0x400280E4U) /* (USART1) Write Protect Mode Register */ +#define REG_USART1_WPSR REG_ACCESS(RoReg, 0x400280E8U) /* (USART1) Write Protect Status Register */ +/* ========== Register definition for ADC peripheral ========== */ +#define REG_ADC_CR REG_ACCESS(WoReg, 0x40038000U) /* (ADC) Control Register */ +#define REG_ADC_MR REG_ACCESS(RwReg, 0x40038004U) /* (ADC) Mode Register */ +#define REG_ADC_SEQR1 REG_ACCESS(RwReg, 0x40038008U) /* (ADC) Channel Sequence Register 1 */ +#define REG_ADC_SEQR2 REG_ACCESS(RwReg, 0x4003800CU) /* (ADC) Channel Sequence Register 2 */ +#define REG_ADC_CHER REG_ACCESS(WoReg, 0x40038010U) /* (ADC) Channel Enable Register */ +#define REG_ADC_CHDR REG_ACCESS(WoReg, 0x40038014U) /* (ADC) Channel Disable Register */ +#define REG_ADC_CHSR REG_ACCESS(RoReg, 0x40038018U) /* (ADC) Channel Status Register */ +#define REG_ADC_LCDR REG_ACCESS(RoReg, 0x40038020U) /* (ADC) Last Converted Data Register */ +#define REG_ADC_IER REG_ACCESS(WoReg, 0x40038024U) /* (ADC) Interrupt Enable Register */ +#define REG_ADC_IDR REG_ACCESS(WoReg, 0x40038028U) /* (ADC) Interrupt Disable Register */ +#define REG_ADC_IMR REG_ACCESS(RoReg, 0x4003802CU) /* (ADC) Interrupt Mask Register */ +#define REG_ADC_ISR REG_ACCESS(RoReg, 0x40038030U) /* (ADC) Interrupt Status Register */ +#define REG_ADC_OVER REG_ACCESS(RoReg, 0x4003803CU) /* (ADC) Overrun Status Register */ +#define REG_ADC_EMR REG_ACCESS(RwReg, 0x40038040U) /* (ADC) Extended Mode Register */ +#define REG_ADC_CWR REG_ACCESS(RwReg, 0x40038044U) /* (ADC) Compare Window Register */ +#define REG_ADC_CDR REG_ACCESS(RoReg, 0x40038050U) /* (ADC) Channel Data Register */ +#define REG_ADC_WPMR REG_ACCESS(RwReg, 0x400380E4U) /* (ADC) Write Protect Mode Register */ +#define REG_ADC_WPSR REG_ACCESS(RoReg, 0x400380E8U) /* (ADC) Write Protect Status Register */ +#define REG_ADC_RPR REG_ACCESS(RwReg, 0x40038100U) /* (ADC) Receive Pointer Register */ +#define REG_ADC_RCR REG_ACCESS(RwReg, 0x40038104U) /* (ADC) Receive Counter Register */ +#define REG_ADC_TPR REG_ACCESS(RwReg, 0x40038108U) /* (ADC) Transmit Pointer Register */ +#define REG_ADC_TCR REG_ACCESS(RwReg, 0x4003810CU) /* (ADC) Transmit Counter Register */ +#define REG_ADC_RNPR REG_ACCESS(RwReg, 0x40038110U) /* (ADC) Receive Next Pointer Register */ +#define REG_ADC_RNCR REG_ACCESS(RwReg, 0x40038114U) /* (ADC) Receive Next Counter Register */ +#define REG_ADC_TNPR REG_ACCESS(RwReg, 0x40038118U) /* (ADC) Transmit Next Pointer Register */ +#define REG_ADC_TNCR REG_ACCESS(RwReg, 0x4003811CU) /* (ADC) Transmit Next Counter Register */ +#define REG_ADC_PTCR REG_ACCESS(WoReg, 0x40038120U) /* (ADC) Transfer Control Register */ +#define REG_ADC_PTSR REG_ACCESS(RoReg, 0x40038124U) /* (ADC) Transfer Status Register */ +/* ========== Register definition for DACC peripheral ========== */ +#define REG_DACC_CR REG_ACCESS(WoReg, 0x4003C000U) /* (DACC) Control Register */ +#define REG_DACC_MR REG_ACCESS(RwReg, 0x4003C004U) /* (DACC) Mode Register */ +#define REG_DACC_CDR REG_ACCESS(WoReg, 0x4003C008U) /* (DACC) Conversion Data Register */ +#define REG_DACC_IER REG_ACCESS(WoReg, 0x4003C00CU) /* (DACC) Interrupt Enable Register */ +#define REG_DACC_IDR REG_ACCESS(WoReg, 0x4003C010U) /* (DACC) Interrupt Disable Register */ +#define REG_DACC_IMR REG_ACCESS(RoReg, 0x4003C014U) /* (DACC) Interrupt Mask Register */ +#define REG_DACC_ISR REG_ACCESS(RoReg, 0x4003C018U) /* (DACC) Interrupt Status Register */ +#define REG_DACC_WPMR REG_ACCESS(RwReg, 0x4003C0E4U) /* (DACC) Write Protect Mode Register */ +#define REG_DACC_WPSR REG_ACCESS(RoReg, 0x4003C0E8U) /* (DACC) Write Protect Status Register */ +#define REG_DACC_RPR REG_ACCESS(RwReg, 0x4003C100U) /* (DACC) Receive Pointer Register */ +#define REG_DACC_RCR REG_ACCESS(RwReg, 0x4003C104U) /* (DACC) Receive Counter Register */ +#define REG_DACC_TPR REG_ACCESS(RwReg, 0x4003C108U) /* (DACC) Transmit Pointer Register */ +#define REG_DACC_TCR REG_ACCESS(RwReg, 0x4003C10CU) /* (DACC) Transmit Counter Register */ +#define REG_DACC_RNPR REG_ACCESS(RwReg, 0x4003C110U) /* (DACC) Receive Next Pointer Register */ +#define REG_DACC_RNCR REG_ACCESS(RwReg, 0x4003C114U) /* (DACC) Receive Next Counter Register */ +#define REG_DACC_TNPR REG_ACCESS(RwReg, 0x4003C118U) /* (DACC) Transmit Next Pointer Register */ +#define REG_DACC_TNCR REG_ACCESS(RwReg, 0x4003C11CU) /* (DACC) Transmit Next Counter Register */ +#define REG_DACC_PTCR REG_ACCESS(WoReg, 0x4003C120U) /* (DACC) Transfer Control Register */ +#define REG_DACC_PTSR REG_ACCESS(RoReg, 0x4003C124U) /* (DACC) Transfer Status Register */ +/* ========== Register definition for MATRIX peripheral ========== */ +#define REG_MATRIX_MCFG REG_ACCESS(RwReg, 0x400E0200U) /* (MATRIX) Master Configuration Register */ +#define REG_MATRIX_SCFG REG_ACCESS(RwReg, 0x400E0240U) /* (MATRIX) Slave Configuration Register */ +#define REG_MATRIX_PRAS0 REG_ACCESS(RwReg, 0x400E0280U) /* (MATRIX) Priority Register A for Slave 0 */ +#define REG_MATRIX_PRAS1 REG_ACCESS(RwReg, 0x400E0288U) /* (MATRIX) Priority Register A for Slave 1 */ +#define REG_MATRIX_PRAS2 REG_ACCESS(RwReg, 0x400E0290U) /* (MATRIX) Priority Register A for Slave 2 */ +#define REG_MATRIX_PRAS3 REG_ACCESS(RwReg, 0x400E0298U) /* (MATRIX) Priority Register A for Slave 3 */ +#define REG_MATRIX_SYSIO REG_ACCESS(RwReg, 0x400E0314U) /* (MATRIX) System I/O Configuration register */ +#define REG_MATRIX_WPMR REG_ACCESS(RwReg, 0x400E03E4U) /* (MATRIX) Write Protect Mode Register */ +#define REG_MATRIX_WPSR REG_ACCESS(RoReg, 0x400E03E8U) /* (MATRIX) Write Protect Status Register */ +/* ========== Register definition for PMC peripheral ========== */ +#define REG_PMC_SCER REG_ACCESS(WoReg, 0x400E0400U) /* (PMC) System Clock Enable Register */ +#define REG_PMC_SCDR REG_ACCESS(WoReg, 0x400E0404U) /* (PMC) System Clock Disable Register */ +#define REG_PMC_SCSR REG_ACCESS(RoReg, 0x400E0408U) /* (PMC) System Clock Status Register */ +#define REG_PMC_PCER REG_ACCESS(WoReg, 0x400E0410U) /* (PMC) Peripheral Clock Enable Register */ +#define REG_PMC_PCDR REG_ACCESS(WoReg, 0x400E0414U) /* (PMC) Peripheral Clock Disable Register */ +#define REG_PMC_PCSR REG_ACCESS(RoReg, 0x400E0418U) /* (PMC) Peripheral Clock Status Register */ +#define REG_PMC_MOR REG_ACCESS(RwReg, 0x400E0420U) /* (PMC) Main Oscillator Register */ +#define REG_PMC_MCFR REG_ACCESS(RoReg, 0x400E0424U) /* (PMC) Main Clock Frequency Register */ +#define REG_PMC_PLLR REG_ACCESS(RwReg, 0x400E0428U) /* (PMC) PLL Register */ +#define REG_PMC_MCKR REG_ACCESS(RwReg, 0x400E0430U) /* (PMC) Master Clock Register */ +#define REG_PMC_PCK REG_ACCESS(RwReg, 0x400E0440U) /* (PMC) Programmable Clock 0 Register */ +#define REG_PMC_IER REG_ACCESS(WoReg, 0x400E0460U) /* (PMC) Interrupt Enable Register */ +#define REG_PMC_IDR REG_ACCESS(WoReg, 0x400E0464U) /* (PMC) Interrupt Disable Register */ +#define REG_PMC_SR REG_ACCESS(RoReg, 0x400E0468U) /* (PMC) Status Register */ +#define REG_PMC_IMR REG_ACCESS(RoReg, 0x400E046CU) /* (PMC) Interrupt Mask Register */ +#define REG_PMC_FSMR REG_ACCESS(RwReg, 0x400E0470U) /* (PMC) Fast Startup Mode Register */ +#define REG_PMC_FSPR REG_ACCESS(RwReg, 0x400E0474U) /* (PMC) Fast Startup Polarity Register */ +#define REG_PMC_FOCR REG_ACCESS(WoReg, 0x400E0478U) /* (PMC) Fault Output Clear Register */ +#define REG_PMC_WPMR REG_ACCESS(RwReg, 0x400E04E4U) /* (PMC) Write Protect Mode Register */ +#define REG_PMC_WPSR REG_ACCESS(RoReg, 0x400E04E8U) /* (PMC) Write Protect Status Register */ +#define REG_PMC_OCR REG_ACCESS(RwReg, 0x400E0510U) /* (PMC) Oscillator Calibration Register */ +/* ========== Register definition for UART0 peripheral ========== */ +#define REG_UART0_CR REG_ACCESS(WoReg, 0x400E0600U) /* (UART0) Control Register */ +#define REG_UART0_MR REG_ACCESS(RwReg, 0x400E0604U) /* (UART0) Mode Register */ +#define REG_UART0_IER REG_ACCESS(WoReg, 0x400E0608U) /* (UART0) Interrupt Enable Register */ +#define REG_UART0_IDR REG_ACCESS(WoReg, 0x400E060CU) /* (UART0) Interrupt Disable Register */ +#define REG_UART0_IMR REG_ACCESS(RoReg, 0x400E0610U) /* (UART0) Interrupt Mask Register */ +#define REG_UART0_SR REG_ACCESS(RoReg, 0x400E0614U) /* (UART0) Status Register */ +#define REG_UART0_RHR REG_ACCESS(RoReg, 0x400E0618U) /* (UART0) Receive Holding Register */ +#define REG_UART0_THR REG_ACCESS(WoReg, 0x400E061CU) /* (UART0) Transmit Holding Register */ +#define REG_UART0_BRGR REG_ACCESS(RwReg, 0x400E0620U) /* (UART0) Baud Rate Generator Register */ +#define REG_UART0_RPR REG_ACCESS(RwReg, 0x400E0700U) /* (UART0) Receive Pointer Register */ +#define REG_UART0_RCR REG_ACCESS(RwReg, 0x400E0704U) /* (UART0) Receive Counter Register */ +#define REG_UART0_TPR REG_ACCESS(RwReg, 0x400E0708U) /* (UART0) Transmit Pointer Register */ +#define REG_UART0_TCR REG_ACCESS(RwReg, 0x400E070CU) /* (UART0) Transmit Counter Register */ +#define REG_UART0_RNPR REG_ACCESS(RwReg, 0x400E0710U) /* (UART0) Receive Next Pointer Register */ +#define REG_UART0_RNCR REG_ACCESS(RwReg, 0x400E0714U) /* (UART0) Receive Next Counter Register */ +#define REG_UART0_TNPR REG_ACCESS(RwReg, 0x400E0718U) /* (UART0) Transmit Next Pointer Register */ +#define REG_UART0_TNCR REG_ACCESS(RwReg, 0x400E071CU) /* (UART0) Transmit Next Counter Register */ +#define REG_UART0_PTCR REG_ACCESS(WoReg, 0x400E0720U) /* (UART0) Transfer Control Register */ +#define REG_UART0_PTSR REG_ACCESS(RoReg, 0x400E0724U) /* (UART0) Transfer Status Register */ +/* ========== Register definition for CHIPID peripheral ========== */ +#define REG_CHIPID_CIDR REG_ACCESS(RoReg, 0x400E0740U) /* (CHIPID) Chip ID Register */ +#define REG_CHIPID_EXID REG_ACCESS(RoReg, 0x400E0744U) /* (CHIPID) Chip ID Extension Register */ +/* ========== Register definition for UART1 peripheral ========== */ +#define REG_UART1_CR REG_ACCESS(WoReg, 0x400E0800U) /* (UART1) Control Register */ +#define REG_UART1_MR REG_ACCESS(RwReg, 0x400E0804U) /* (UART1) Mode Register */ +#define REG_UART1_IER REG_ACCESS(WoReg, 0x400E0808U) /* (UART1) Interrupt Enable Register */ +#define REG_UART1_IDR REG_ACCESS(WoReg, 0x400E080CU) /* (UART1) Interrupt Disable Register */ +#define REG_UART1_IMR REG_ACCESS(RoReg, 0x400E0810U) /* (UART1) Interrupt Mask Register */ +#define REG_UART1_SR REG_ACCESS(RoReg, 0x400E0814U) /* (UART1) Status Register */ +#define REG_UART1_RHR REG_ACCESS(RoReg, 0x400E0818U) /* (UART1) Receive Holding Register */ +#define REG_UART1_THR REG_ACCESS(WoReg, 0x400E081CU) /* (UART1) Transmit Holding Register */ +#define REG_UART1_BRGR REG_ACCESS(RwReg, 0x400E0820U) /* (UART1) Baud Rate Generator Register */ +/* ========== Register definition for EFC peripheral ========== */ +#define REG_EFC_FMR REG_ACCESS(RwReg, 0x400E0A00U) /* (EFC) EEFC Flash Mode Register */ +#define REG_EFC_FCR REG_ACCESS(WoReg, 0x400E0A04U) /* (EFC) EEFC Flash Command Register */ +#define REG_EFC_FSR REG_ACCESS(RoReg, 0x400E0A08U) /* (EFC) EEFC Flash Status Register */ +#define REG_EFC_FRR REG_ACCESS(RoReg, 0x400E0A0CU) /* (EFC) EEFC Flash Result Register */ +/* ========== Register definition for PIOA peripheral ========== */ +#define REG_PIOA_PER REG_ACCESS(WoReg, 0x400E0E00U) /* (PIOA) PIO Enable Register */ +#define REG_PIOA_PDR REG_ACCESS(WoReg, 0x400E0E04U) /* (PIOA) PIO Disable Register */ +#define REG_PIOA_PSR REG_ACCESS(RoReg, 0x400E0E08U) /* (PIOA) PIO Status Register */ +#define REG_PIOA_OER REG_ACCESS(WoReg, 0x400E0E10U) /* (PIOA) Output Enable Register */ +#define REG_PIOA_ODR REG_ACCESS(WoReg, 0x400E0E14U) /* (PIOA) Output Disable Register */ +#define REG_PIOA_OSR REG_ACCESS(RoReg, 0x400E0E18U) /* (PIOA) Output Status Register */ +#define REG_PIOA_IFER REG_ACCESS(WoReg, 0x400E0E20U) /* (PIOA) Glitch Input Filter Enable Register */ +#define REG_PIOA_IFDR REG_ACCESS(WoReg, 0x400E0E24U) /* (PIOA) Glitch Input Filter Disable Register */ +#define REG_PIOA_IFSR REG_ACCESS(RoReg, 0x400E0E28U) /* (PIOA) Glitch Input Filter Status Register */ +#define REG_PIOA_SODR REG_ACCESS(WoReg, 0x400E0E30U) /* (PIOA) Set Output Data Register */ +#define REG_PIOA_CODR REG_ACCESS(WoReg, 0x400E0E34U) /* (PIOA) Clear Output Data Register */ +#define REG_PIOA_ODSR REG_ACCESS(RwReg, 0x400E0E38U) /* (PIOA) Output Data Status Register */ +#define REG_PIOA_PDSR REG_ACCESS(RoReg, 0x400E0E3CU) /* (PIOA) Pin Data Status Register */ +#define REG_PIOA_IER REG_ACCESS(WoReg, 0x400E0E40U) /* (PIOA) Interrupt Enable Register */ +#define REG_PIOA_IDR REG_ACCESS(WoReg, 0x400E0E44U) /* (PIOA) Interrupt Disable Register */ +#define REG_PIOA_IMR REG_ACCESS(RoReg, 0x400E0E48U) /* (PIOA) Interrupt Mask Register */ +#define REG_PIOA_ISR REG_ACCESS(RoReg, 0x400E0E4CU) /* (PIOA) Interrupt Status Register */ +#define REG_PIOA_MDER REG_ACCESS(WoReg, 0x400E0E50U) /* (PIOA) Multi-driver Enable Register */ +#define REG_PIOA_MDDR REG_ACCESS(WoReg, 0x400E0E54U) /* (PIOA) Multi-driver Disable Register */ +#define REG_PIOA_MDSR REG_ACCESS(RoReg, 0x400E0E58U) /* (PIOA) Multi-driver Status Register */ +#define REG_PIOA_PUDR REG_ACCESS(WoReg, 0x400E0E60U) /* (PIOA) Pull-up Disable Register */ +#define REG_PIOA_PUER REG_ACCESS(WoReg, 0x400E0E64U) /* (PIOA) Pull-up Enable Register */ +#define REG_PIOA_PUSR REG_ACCESS(RoReg, 0x400E0E68U) /* (PIOA) Pad Pull-up Status Register */ +#define REG_PIOA_ABCDSR REG_ACCESS(RwReg, 0x400E0E70U) /* (PIOA) Peripheral Select Register */ +#define REG_PIOA_IFSCDR REG_ACCESS(WoReg, 0x400E0E80U) /* (PIOA) Input Filter Slow Clock Disable Register */ +#define REG_PIOA_IFSCER REG_ACCESS(WoReg, 0x400E0E84U) /* (PIOA) Input Filter Slow Clock Enable Register */ +#define REG_PIOA_IFSCSR REG_ACCESS(RoReg, 0x400E0E88U) /* (PIOA) Input Filter Slow Clock Status Register */ +#define REG_PIOA_SCDR REG_ACCESS(RwReg, 0x400E0E8CU) /* (PIOA) Slow Clock Divider Debouncing Register */ +#define REG_PIOA_PPDDR REG_ACCESS(WoReg, 0x400E0E90U) /* (PIOA) Pad Pull-down Disable Register */ +#define REG_PIOA_PPDER REG_ACCESS(WoReg, 0x400E0E94U) /* (PIOA) Pad Pull-down Enable Register */ +#define REG_PIOA_PPDSR REG_ACCESS(RoReg, 0x400E0E98U) /* (PIOA) Pad Pull-down Status Register */ +#define REG_PIOA_OWER REG_ACCESS(WoReg, 0x400E0EA0U) /* (PIOA) Output Write Enable */ +#define REG_PIOA_OWDR REG_ACCESS(WoReg, 0x400E0EA4U) /* (PIOA) Output Write Disable */ +#define REG_PIOA_OWSR REG_ACCESS(RoReg, 0x400E0EA8U) /* (PIOA) Output Write Status Register */ +#define REG_PIOA_AIMER REG_ACCESS(WoReg, 0x400E0EB0U) /* (PIOA) Additional Interrupt Modes Enable Register */ +#define REG_PIOA_AIMDR REG_ACCESS(WoReg, 0x400E0EB4U) /* (PIOA) Additional Interrupt Modes Disables Register */ +#define REG_PIOA_AIMMR REG_ACCESS(RoReg, 0x400E0EB8U) /* (PIOA) Additional Interrupt Modes Mask Register */ +#define REG_PIOA_ESR REG_ACCESS(WoReg, 0x400E0EC0U) /* (PIOA) Edge Select Register */ +#define REG_PIOA_LSR REG_ACCESS(WoReg, 0x400E0EC4U) /* (PIOA) Level Select Register */ +#define REG_PIOA_ELSR REG_ACCESS(RoReg, 0x400E0EC8U) /* (PIOA) Edge/Level Status Register */ +#define REG_PIOA_FELLSR REG_ACCESS(WoReg, 0x400E0ED0U) /* (PIOA) Falling Edge/Low Level Select Register */ +#define REG_PIOA_REHLSR REG_ACCESS(WoReg, 0x400E0ED4U) /* (PIOA) Rising Edge/ High Level Select Register */ +#define REG_PIOA_FRLHSR REG_ACCESS(RoReg, 0x400E0ED8U) /* (PIOA) Fall/Rise - Low/High Status Register */ +#define REG_PIOA_LOCKSR REG_ACCESS(RoReg, 0x400E0EE0U) /* (PIOA) Lock Status */ +#define REG_PIOA_WPMR REG_ACCESS(RwReg, 0x400E0EE4U) /* (PIOA) Write Protect Mode Register */ +#define REG_PIOA_WPSR REG_ACCESS(RoReg, 0x400E0EE8U) /* (PIOA) Write Protect Status Register */ +#define REG_PIOA_SCHMITT REG_ACCESS(RwReg, 0x400E0F00U) /* (PIOA) Schmitt Trigger Register */ +/* ========== Register definition for PIOB peripheral ========== */ +#define REG_PIOB_PER REG_ACCESS(WoReg, 0x400E1000U) /* (PIOB) PIO Enable Register */ +#define REG_PIOB_PDR REG_ACCESS(WoReg, 0x400E1004U) /* (PIOB) PIO Disable Register */ +#define REG_PIOB_PSR REG_ACCESS(RoReg, 0x400E1008U) /* (PIOB) PIO Status Register */ +#define REG_PIOB_OER REG_ACCESS(WoReg, 0x400E1010U) /* (PIOB) Output Enable Register */ +#define REG_PIOB_ODR REG_ACCESS(WoReg, 0x400E1014U) /* (PIOB) Output Disable Register */ +#define REG_PIOB_OSR REG_ACCESS(RoReg, 0x400E1018U) /* (PIOB) Output Status Register */ +#define REG_PIOB_IFER REG_ACCESS(WoReg, 0x400E1020U) /* (PIOB) Glitch Input Filter Enable Register */ +#define REG_PIOB_IFDR REG_ACCESS(WoReg, 0x400E1024U) /* (PIOB) Glitch Input Filter Disable Register */ +#define REG_PIOB_IFSR REG_ACCESS(RoReg, 0x400E1028U) /* (PIOB) Glitch Input Filter Status Register */ +#define REG_PIOB_SODR REG_ACCESS(WoReg, 0x400E1030U) /* (PIOB) Set Output Data Register */ +#define REG_PIOB_CODR REG_ACCESS(WoReg, 0x400E1034U) /* (PIOB) Clear Output Data Register */ +#define REG_PIOB_ODSR REG_ACCESS(RwReg, 0x400E1038U) /* (PIOB) Output Data Status Register */ +#define REG_PIOB_PDSR REG_ACCESS(RoReg, 0x400E103CU) /* (PIOB) Pin Data Status Register */ +#define REG_PIOB_IER REG_ACCESS(WoReg, 0x400E1040U) /* (PIOB) Interrupt Enable Register */ +#define REG_PIOB_IDR REG_ACCESS(WoReg, 0x400E1044U) /* (PIOB) Interrupt Disable Register */ +#define REG_PIOB_IMR REG_ACCESS(RoReg, 0x400E1048U) /* (PIOB) Interrupt Mask Register */ +#define REG_PIOB_ISR REG_ACCESS(RoReg, 0x400E104CU) /* (PIOB) Interrupt Status Register */ +#define REG_PIOB_MDER REG_ACCESS(WoReg, 0x400E1050U) /* (PIOB) Multi-driver Enable Register */ +#define REG_PIOB_MDDR REG_ACCESS(WoReg, 0x400E1054U) /* (PIOB) Multi-driver Disable Register */ +#define REG_PIOB_MDSR REG_ACCESS(RoReg, 0x400E1058U) /* (PIOB) Multi-driver Status Register */ +#define REG_PIOB_PUDR REG_ACCESS(WoReg, 0x400E1060U) /* (PIOB) Pull-up Disable Register */ +#define REG_PIOB_PUER REG_ACCESS(WoReg, 0x400E1064U) /* (PIOB) Pull-up Enable Register */ +#define REG_PIOB_PUSR REG_ACCESS(RoReg, 0x400E1068U) /* (PIOB) Pad Pull-up Status Register */ +#define REG_PIOB_ABCDSR REG_ACCESS(RwReg, 0x400E1070U) /* (PIOB) Peripheral Select Register */ +#define REG_PIOB_IFSCDR REG_ACCESS(WoReg, 0x400E1080U) /* (PIOB) Input Filter Slow Clock Disable Register */ +#define REG_PIOB_IFSCER REG_ACCESS(WoReg, 0x400E1084U) /* (PIOB) Input Filter Slow Clock Enable Register */ +#define REG_PIOB_IFSCSR REG_ACCESS(RoReg, 0x400E1088U) /* (PIOB) Input Filter Slow Clock Status Register */ +#define REG_PIOB_SCDR REG_ACCESS(RwReg, 0x400E108CU) /* (PIOB) Slow Clock Divider Debouncing Register */ +#define REG_PIOB_PPDDR REG_ACCESS(WoReg, 0x400E1090U) /* (PIOB) Pad Pull-down Disable Register */ +#define REG_PIOB_PPDER REG_ACCESS(WoReg, 0x400E1094U) /* (PIOB) Pad Pull-down Enable Register */ +#define REG_PIOB_PPDSR REG_ACCESS(RoReg, 0x400E1098U) /* (PIOB) Pad Pull-down Status Register */ +#define REG_PIOB_OWER REG_ACCESS(WoReg, 0x400E10A0U) /* (PIOB) Output Write Enable */ +#define REG_PIOB_OWDR REG_ACCESS(WoReg, 0x400E10A4U) /* (PIOB) Output Write Disable */ +#define REG_PIOB_OWSR REG_ACCESS(RoReg, 0x400E10A8U) /* (PIOB) Output Write Status Register */ +#define REG_PIOB_AIMER REG_ACCESS(WoReg, 0x400E10B0U) /* (PIOB) Additional Interrupt Modes Enable Register */ +#define REG_PIOB_AIMDR REG_ACCESS(WoReg, 0x400E10B4U) /* (PIOB) Additional Interrupt Modes Disables Register */ +#define REG_PIOB_AIMMR REG_ACCESS(RoReg, 0x400E10B8U) /* (PIOB) Additional Interrupt Modes Mask Register */ +#define REG_PIOB_ESR REG_ACCESS(WoReg, 0x400E10C0U) /* (PIOB) Edge Select Register */ +#define REG_PIOB_LSR REG_ACCESS(WoReg, 0x400E10C4U) /* (PIOB) Level Select Register */ +#define REG_PIOB_ELSR REG_ACCESS(RoReg, 0x400E10C8U) /* (PIOB) Edge/Level Status Register */ +#define REG_PIOB_FELLSR REG_ACCESS(WoReg, 0x400E10D0U) /* (PIOB) Falling Edge/Low Level Select Register */ +#define REG_PIOB_REHLSR REG_ACCESS(WoReg, 0x400E10D4U) /* (PIOB) Rising Edge/ High Level Select Register */ +#define REG_PIOB_FRLHSR REG_ACCESS(RoReg, 0x400E10D8U) /* (PIOB) Fall/Rise - Low/High Status Register */ +#define REG_PIOB_LOCKSR REG_ACCESS(RoReg, 0x400E10E0U) /* (PIOB) Lock Status */ +#define REG_PIOB_WPMR REG_ACCESS(RwReg, 0x400E10E4U) /* (PIOB) Write Protect Mode Register */ +#define REG_PIOB_WPSR REG_ACCESS(RoReg, 0x400E10E8U) /* (PIOB) Write Protect Status Register */ +#define REG_PIOB_SCHMITT REG_ACCESS(RwReg, 0x400E1100U) /* (PIOB) Schmitt Trigger Register */ +/* ========== Register definition for PIOC peripheral ========== */ +#define REG_PIOC_PER REG_ACCESS(WoReg, 0x400E1200U) /* (PIOC) PIO Enable Register */ +#define REG_PIOC_PDR REG_ACCESS(WoReg, 0x400E1204U) /* (PIOC) PIO Disable Register */ +#define REG_PIOC_PSR REG_ACCESS(RoReg, 0x400E1208U) /* (PIOC) PIO Status Register */ +#define REG_PIOC_OER REG_ACCESS(WoReg, 0x400E1210U) /* (PIOC) Output Enable Register */ +#define REG_PIOC_ODR REG_ACCESS(WoReg, 0x400E1214U) /* (PIOC) Output Disable Register */ +#define REG_PIOC_OSR REG_ACCESS(RoReg, 0x400E1218U) /* (PIOC) Output Status Register */ +#define REG_PIOC_IFER REG_ACCESS(WoReg, 0x400E1220U) /* (PIOC) Glitch Input Filter Enable Register */ +#define REG_PIOC_IFDR REG_ACCESS(WoReg, 0x400E1224U) /* (PIOC) Glitch Input Filter Disable Register */ +#define REG_PIOC_IFSR REG_ACCESS(RoReg, 0x400E1228U) /* (PIOC) Glitch Input Filter Status Register */ +#define REG_PIOC_SODR REG_ACCESS(WoReg, 0x400E1230U) /* (PIOC) Set Output Data Register */ +#define REG_PIOC_CODR REG_ACCESS(WoReg, 0x400E1234U) /* (PIOC) Clear Output Data Register */ +#define REG_PIOC_ODSR REG_ACCESS(RwReg, 0x400E1238U) /* (PIOC) Output Data Status Register */ +#define REG_PIOC_PDSR REG_ACCESS(RoReg, 0x400E123CU) /* (PIOC) Pin Data Status Register */ +#define REG_PIOC_IER REG_ACCESS(WoReg, 0x400E1240U) /* (PIOC) Interrupt Enable Register */ +#define REG_PIOC_IDR REG_ACCESS(WoReg, 0x400E1244U) /* (PIOC) Interrupt Disable Register */ +#define REG_PIOC_IMR REG_ACCESS(RoReg, 0x400E1248U) /* (PIOC) Interrupt Mask Register */ +#define REG_PIOC_ISR REG_ACCESS(RoReg, 0x400E124CU) /* (PIOC) Interrupt Status Register */ +#define REG_PIOC_MDER REG_ACCESS(WoReg, 0x400E1250U) /* (PIOC) Multi-driver Enable Register */ +#define REG_PIOC_MDDR REG_ACCESS(WoReg, 0x400E1254U) /* (PIOC) Multi-driver Disable Register */ +#define REG_PIOC_MDSR REG_ACCESS(RoReg, 0x400E1258U) /* (PIOC) Multi-driver Status Register */ +#define REG_PIOC_PUDR REG_ACCESS(WoReg, 0x400E1260U) /* (PIOC) Pull-up Disable Register */ +#define REG_PIOC_PUER REG_ACCESS(WoReg, 0x400E1264U) /* (PIOC) Pull-up Enable Register */ +#define REG_PIOC_PUSR REG_ACCESS(RoReg, 0x400E1268U) /* (PIOC) Pad Pull-up Status Register */ +#define REG_PIOC_ABCDSR REG_ACCESS(RwReg, 0x400E1270U) /* (PIOC) Peripheral Select Register */ +#define REG_PIOC_IFSCDR REG_ACCESS(WoReg, 0x400E1280U) /* (PIOC) Input Filter Slow Clock Disable Register */ +#define REG_PIOC_IFSCER REG_ACCESS(WoReg, 0x400E1284U) /* (PIOC) Input Filter Slow Clock Enable Register */ +#define REG_PIOC_IFSCSR REG_ACCESS(RoReg, 0x400E1288U) /* (PIOC) Input Filter Slow Clock Status Register */ +#define REG_PIOC_SCDR REG_ACCESS(RwReg, 0x400E128CU) /* (PIOC) Slow Clock Divider Debouncing Register */ +#define REG_PIOC_PPDDR REG_ACCESS(WoReg, 0x400E1290U) /* (PIOC) Pad Pull-down Disable Register */ +#define REG_PIOC_PPDER REG_ACCESS(WoReg, 0x400E1294U) /* (PIOC) Pad Pull-down Enable Register */ +#define REG_PIOC_PPDSR REG_ACCESS(RoReg, 0x400E1298U) /* (PIOC) Pad Pull-down Status Register */ +#define REG_PIOC_OWER REG_ACCESS(WoReg, 0x400E12A0U) /* (PIOC) Output Write Enable */ +#define REG_PIOC_OWDR REG_ACCESS(WoReg, 0x400E12A4U) /* (PIOC) Output Write Disable */ +#define REG_PIOC_OWSR REG_ACCESS(RoReg, 0x400E12A8U) /* (PIOC) Output Write Status Register */ +#define REG_PIOC_AIMER REG_ACCESS(WoReg, 0x400E12B0U) /* (PIOC) Additional Interrupt Modes Enable Register */ +#define REG_PIOC_AIMDR REG_ACCESS(WoReg, 0x400E12B4U) /* (PIOC) Additional Interrupt Modes Disables Register */ +#define REG_PIOC_AIMMR REG_ACCESS(RoReg, 0x400E12B8U) /* (PIOC) Additional Interrupt Modes Mask Register */ +#define REG_PIOC_ESR REG_ACCESS(WoReg, 0x400E12C0U) /* (PIOC) Edge Select Register */ +#define REG_PIOC_LSR REG_ACCESS(WoReg, 0x400E12C4U) /* (PIOC) Level Select Register */ +#define REG_PIOC_ELSR REG_ACCESS(RoReg, 0x400E12C8U) /* (PIOC) Edge/Level Status Register */ +#define REG_PIOC_FELLSR REG_ACCESS(WoReg, 0x400E12D0U) /* (PIOC) Falling Edge/Low Level Select Register */ +#define REG_PIOC_REHLSR REG_ACCESS(WoReg, 0x400E12D4U) /* (PIOC) Rising Edge/ High Level Select Register */ +#define REG_PIOC_FRLHSR REG_ACCESS(RoReg, 0x400E12D8U) /* (PIOC) Fall/Rise - Low/High Status Register */ +#define REG_PIOC_LOCKSR REG_ACCESS(RoReg, 0x400E12E0U) /* (PIOC) Lock Status */ +#define REG_PIOC_WPMR REG_ACCESS(RwReg, 0x400E12E4U) /* (PIOC) Write Protect Mode Register */ +#define REG_PIOC_WPSR REG_ACCESS(RoReg, 0x400E12E8U) /* (PIOC) Write Protect Status Register */ +#define REG_PIOC_SCHMITT REG_ACCESS(RwReg, 0x400E1300U) /* (PIOC) Schmitt Trigger Register */ +/* ========== Register definition for RSTC peripheral ========== */ +#define REG_RSTC_CR REG_ACCESS(WoReg, 0x400E1400U) /* (RSTC) Control Register */ +#define REG_RSTC_SR REG_ACCESS(RoReg, 0x400E1404U) /* (RSTC) Status Register */ +#define REG_RSTC_MR REG_ACCESS(RwReg, 0x400E1408U) /* (RSTC) Mode Register */ +/* ========== Register definition for SUPC peripheral ========== */ +#define REG_SUPC_CR REG_ACCESS(WoReg, 0x400E1410U) /* (SUPC) Supply Controller Control Register */ +#define REG_SUPC_SMMR REG_ACCESS(RwReg, 0x400E1414U) /* (SUPC) Supply Controller Supply Monitor Mode Register */ +#define REG_SUPC_MR REG_ACCESS(RwReg, 0x400E1418U) /* (SUPC) Supply Controller Mode Register */ +#define REG_SUPC_WUMR REG_ACCESS(RwReg, 0x400E141CU) /* (SUPC) Supply Controller Wake Up Mode Register */ +#define REG_SUPC_WUIR REG_ACCESS(RwReg, 0x400E1420U) /* (SUPC) Supply Controller Wake Up Inputs Register */ +#define REG_SUPC_SR REG_ACCESS(RoReg, 0x400E1424U) /* (SUPC) Supply Controller Status Register */ +/* ========== Register definition for RTT peripheral ========== */ +#define REG_RTT_MR REG_ACCESS(RwReg, 0x400E1430U) /* (RTT) Mode Register */ +#define REG_RTT_AR REG_ACCESS(RwReg, 0x400E1434U) /* (RTT) Alarm Register */ +#define REG_RTT_VR REG_ACCESS(RoReg, 0x400E1438U) /* (RTT) Value Register */ +#define REG_RTT_SR REG_ACCESS(RoReg, 0x400E143CU) /* (RTT) Status Register */ +/* ========== Register definition for WDT peripheral ========== */ +#define REG_WDT_CR REG_ACCESS(WoReg, 0x400E1450U) /* (WDT) Control Register */ +#define REG_WDT_MR REG_ACCESS(RwReg, 0x400E1454U) /* (WDT) Mode Register */ +#define REG_WDT_SR REG_ACCESS(RoReg, 0x400E1458U) /* (WDT) Status Register */ +/* ========== Register definition for RTC peripheral ========== */ +#define REG_RTC_CR REG_ACCESS(RwReg, 0x400E1460U) /* (RTC) Control Register */ +#define REG_RTC_MR REG_ACCESS(RwReg, 0x400E1464U) /* (RTC) Mode Register */ +#define REG_RTC_TIMR REG_ACCESS(RwReg, 0x400E1468U) /* (RTC) Time Register */ +#define REG_RTC_CALR REG_ACCESS(RwReg, 0x400E146CU) /* (RTC) Calendar Register */ +#define REG_RTC_TIMALR REG_ACCESS(RwReg, 0x400E1470U) /* (RTC) Time Alarm Register */ +#define REG_RTC_CALALR REG_ACCESS(RwReg, 0x400E1474U) /* (RTC) Calendar Alarm Register */ +#define REG_RTC_SR REG_ACCESS(RoReg, 0x400E1478U) /* (RTC) Status Register */ +#define REG_RTC_SCCR REG_ACCESS(WoReg, 0x400E147CU) /* (RTC) Status Clear Command Register */ +#define REG_RTC_IER REG_ACCESS(WoReg, 0x400E1480U) /* (RTC) Interrupt Enable Register */ +#define REG_RTC_IDR REG_ACCESS(WoReg, 0x400E1484U) /* (RTC) Interrupt Disable Register */ +#define REG_RTC_IMR REG_ACCESS(RoReg, 0x400E1488U) /* (RTC) Interrupt Mask Register */ +#define REG_RTC_VER REG_ACCESS(RoReg, 0x400E148CU) /* (RTC) Valid Entry Register */ +#define REG_RTC_WPMR REG_ACCESS(RwReg, 0x400E1544U) /* (RTC) Write Protect Mode Register */ +/* ========== Register definition for GPBR peripheral ========== */ +#define REG_GPBR_GPBR0 REG_ACCESS(RwReg, 0x400E1490U) /* (GPBR) General Purpose Backup Register 0 */ +#define REG_GPBR_GPBR1 REG_ACCESS(RwReg, 0x400E1494U) /* (GPBR) General Purpose Backup Register 1 */ +#define REG_GPBR_GPBR2 REG_ACCESS(RwReg, 0x400E1498U) /* (GPBR) General Purpose Backup Register 2 */ +#define REG_GPBR_GPBR3 REG_ACCESS(RwReg, 0x400E149CU) /* (GPBR) General Purpose Backup Register 3 */ +#define REG_GPBR_GPBR4 REG_ACCESS(RwReg, 0x400E14A0U) /* (GPBR) General Purpose Backup Register 4 */ +#define REG_GPBR_GPBR5 REG_ACCESS(RwReg, 0x400E14A4U) /* (GPBR) General Purpose Backup Register 5 */ +#define REG_GPBR_GPBR6 REG_ACCESS(RwReg, 0x400E14A8U) /* (GPBR) General Purpose Backup Register 6 */ +#define REG_GPBR_GPBR7 REG_ACCESS(RwReg, 0x400E14ACU) /* (GPBR) General Purpose Backup Register 7 */ + +/* ************************************************************************** */ +/* PERIPHERAL ID DEFINITIONS FOR SAM3N */ +/* ************************************************************************** */ + +#define ID_SUPC ( 0) /* Supply Controller (SUPC) */ +#define ID_RSTC ( 1) /* Reset Controller (RSTC) */ +#define ID_RTC ( 2) /* Real Time Clock (RTC) */ +#define ID_RTT ( 3) /* Real Time Timer (RTT) */ +#define ID_WDT ( 4) /* Watchdog Timer (WDT) */ +#define ID_PMC ( 5) /* Power Management Controller (PMC) */ +#define ID_EFC ( 6) /* Enhanced Flash Controller (EFC) */ +#define ID_UART0 ( 8) /* UART 0 (UART0) */ +#define ID_UART1 ( 9) /* UART 1 (UART1) */ +#define ID_PIOA (11) /* Parallel I/O Controller A (PIOA) */ +#define ID_PIOB (12) /* Parallel I/O Controller B (PIOB) */ +#define ID_PIOC (13) /* Parallel I/O Controller C (PIOC) */ +#define ID_USART0 (14) /* USART 0 (USART0) */ +#define ID_USART1 (15) /* USART 1 (USART1) */ +#define ID_TWI0 (19) /* Two Wire Interface 0 (TWI0) */ +#define ID_TWI1 (20) /* Two Wire Interface 1 (TWI1) */ +#define ID_SPI (21) /* Serial Peripheral Interface (SPI) */ +#define ID_TC0 (23) /* Timer/Counter 0 (TC0) */ +#define ID_TC1 (24) /* Timer/Counter 1 (TC1) */ +#define ID_TC2 (25) /* Timer/Counter 2 (TC2) */ +#define ID_TC3 (26) /* Timer/Counter 3 (TC3) */ +#define ID_TC4 (27) /* Timer/Counter 4 (TC4) */ +#define ID_TC5 (28) /* Timer/Counter 5 (TC5) */ +#define ID_ADC (29) /* Analog To Digital Converter (ADC) */ +#define ID_DACC (30) /* Digital To Analog Converter (DACC) */ +#define ID_PWM (31) /* Pulse Width Modulation (PWM) */ + +/* ************************************************************************** */ +/* BASE ADDRESS DEFINITIONS FOR SAM3N */ +/* ************************************************************************** */ + +#define SPI CAST(Spi , 0x40008000U) /* (SPI ) Base Address */ +#define PDC_SPI CAST(Pdc , 0x40008100U) /* (PDC_SPI ) Base Address */ +#define TC0 CAST(Tc , 0x40010000U) /* (TC0 ) Base Address */ +#define TC1 CAST(Tc , 0x40014000U) /* (TC1 ) Base Address */ +#define TWI0 CAST(Twi , 0x40018000U) /* (TWI0 ) Base Address */ +#define PDC_TWI0 CAST(Pdc , 0x40018100U) /* (PDC_TWI0 ) Base Address */ +#define TWI1 CAST(Twi , 0x4001C000U) /* (TWI1 ) Base Address */ +#define PWM CAST(Pwm , 0x40020000U) /* (PWM ) Base Address */ +#define USART0 CAST(Usart , 0x40024000U) /* (USART0 ) Base Address */ +#define PDC_USART0 CAST(Pdc , 0x40024100U) /* (PDC_USART0) Base Address */ +#define USART1 CAST(Usart , 0x40028000U) /* (USART1 ) Base Address */ +#define ADC CAST(Adc , 0x40038000U) /* (ADC ) Base Address */ +#define PDC_ADC CAST(Pdc , 0x40038100U) /* (PDC_ADC ) Base Address */ +#define DACC CAST(Dacc , 0x4003C000U) /* (DACC ) Base Address */ +#define PDC_DACC CAST(Pdc , 0x4003C100U) /* (PDC_DACC ) Base Address */ +#define MATRIX CAST(Matrix , 0x400E0200U) /* (MATRIX ) Base Address */ +#define PMC CAST(Pmc , 0x400E0400U) /* (PMC ) Base Address */ +#define UART0 CAST(Uart , 0x400E0600U) /* (UART0 ) Base Address */ +#define PDC_UART0 CAST(Pdc , 0x400E0700U) /* (PDC_UART0 ) Base Address */ +#define CHIPID CAST(Chipid , 0x400E0740U) /* (CHIPID ) Base Address */ +#define UART1 CAST(Uart , 0x400E0800U) /* (UART1 ) Base Address */ +#define EFC CAST(Efc , 0x400E0A00U) /* (EFC ) Base Address */ +#define PIOA CAST(Pio , 0x400E0E00U) /* (PIOA ) Base Address */ +#define PIOB CAST(Pio , 0x400E1000U) /* (PIOB ) Base Address */ +#define PIOC CAST(Pio , 0x400E1200U) /* (PIOC ) Base Address */ +#define RSTC CAST(Rstc , 0x400E1400U) /* (RSTC ) Base Address */ +#define SUPC CAST(Supc , 0x400E1410U) /* (SUPC ) Base Address */ +#define RTT CAST(Rtt , 0x400E1430U) /* (RTT ) Base Address */ +#define WDT CAST(Wdt , 0x400E1450U) /* (WDT ) Base Address */ +#define RTC CAST(Rtc , 0x400E1460U) /* (RTC ) Base Address */ +#define GPBR CAST(Gpbr , 0x400E1490U) /* (GPBR ) Base Address */ + +/* ************************************************************************** */ +/* PIO DEFINITIONS FOR SAM3N */ +/* ************************************************************************** */ + +#define PIO_PA0 (1u << 0) /* Pin Controlled by PA0 */ +#define PIO_PA1 (1u << 1) /* Pin Controlled by PA1 */ +#define PIO_PA2 (1u << 2) /* Pin Controlled by PA2 */ +#define PIO_PA3 (1u << 3) /* Pin Controlled by PA3 */ +#define PIO_PA4 (1u << 4) /* Pin Controlled by PA4 */ +#define PIO_PA5 (1u << 5) /* Pin Controlled by PA5 */ +#define PIO_PA6 (1u << 6) /* Pin Controlled by PA6 */ +#define PIO_PA7 (1u << 7) /* Pin Controlled by PA7 */ +#define PIO_PA8 (1u << 8) /* Pin Controlled by PA8 */ +#define PIO_PA9 (1u << 9) /* Pin Controlled by PA9 */ +#define PIO_PA10 (1u << 10) /* Pin Controlled by PA10 */ +#define PIO_PA11 (1u << 11) /* Pin Controlled by PA11 */ +#define PIO_PA12 (1u << 12) /* Pin Controlled by PA12 */ +#define PIO_PA13 (1u << 13) /* Pin Controlled by PA13 */ +#define PIO_PA14 (1u << 14) /* Pin Controlled by PA14 */ +#define PIO_PA15 (1u << 15) /* Pin Controlled by PA15 */ +#define PIO_PA16 (1u << 16) /* Pin Controlled by PA16 */ +#define PIO_PA17 (1u << 17) /* Pin Controlled by PA17 */ +#define PIO_PA18 (1u << 18) /* Pin Controlled by PA18 */ +#define PIO_PA19 (1u << 19) /* Pin Controlled by PA19 */ +#define PIO_PA20 (1u << 20) /* Pin Controlled by PA20 */ +#define PIO_PA21 (1u << 21) /* Pin Controlled by PA21 */ +#define PIO_PA22 (1u << 22) /* Pin Controlled by PA22 */ +#define PIO_PA23 (1u << 23) /* Pin Controlled by PA23 */ +#define PIO_PA24 (1u << 24) /* Pin Controlled by PA24 */ +#define PIO_PA25 (1u << 25) /* Pin Controlled by PA25 */ +#define PIO_PA26 (1u << 26) /* Pin Controlled by PA26 */ +#define PIO_PA27 (1u << 27) /* Pin Controlled by PA27 */ +#define PIO_PA28 (1u << 28) /* Pin Controlled by PA28 */ +#define PIO_PA29 (1u << 29) /* Pin Controlled by PA29 */ +#define PIO_PA30 (1u << 30) /* Pin Controlled by PA30 */ +#define PIO_PA31 (1u << 31) /* Pin Controlled by PA31 */ +#define PIO_PB0 (1u << 0) /* Pin Controlled by PB0 */ +#define PIO_PB1 (1u << 1) /* Pin Controlled by PB1 */ +#define PIO_PB2 (1u << 2) /* Pin Controlled by PB2 */ +#define PIO_PB3 (1u << 3) /* Pin Controlled by PB3 */ +#define PIO_PB4 (1u << 4) /* Pin Controlled by PB4 */ +#define PIO_PB5 (1u << 5) /* Pin Controlled by PB5 */ +#define PIO_PB6 (1u << 6) /* Pin Controlled by PB6 */ +#define PIO_PB7 (1u << 7) /* Pin Controlled by PB7 */ +#define PIO_PB8 (1u << 8) /* Pin Controlled by PB8 */ +#define PIO_PB9 (1u << 9) /* Pin Controlled by PB9 */ +#define PIO_PB10 (1u << 10) /* Pin Controlled by PB10 */ +#define PIO_PB11 (1u << 11) /* Pin Controlled by PB11 */ +#define PIO_PB12 (1u << 12) /* Pin Controlled by PB12 */ +#define PIO_PB13 (1u << 13) /* Pin Controlled by PB13 */ +#define PIO_PB14 (1u << 14) /* Pin Controlled by PB14 */ +#define PIO_PC0 (1u << 0) /* Pin Controlled by PC0 */ +#define PIO_PC1 (1u << 1) /* Pin Controlled by PC1 */ +#define PIO_PC2 (1u << 2) /* Pin Controlled by PC2 */ +#define PIO_PC3 (1u << 3) /* Pin Controlled by PC3 */ +#define PIO_PC4 (1u << 4) /* Pin Controlled by PC4 */ +#define PIO_PC5 (1u << 5) /* Pin Controlled by PC5 */ +#define PIO_PC6 (1u << 6) /* Pin Controlled by PC6 */ +#define PIO_PC7 (1u << 7) /* Pin Controlled by PC7 */ +#define PIO_PC8 (1u << 8) /* Pin Controlled by PC8 */ +#define PIO_PC9 (1u << 9) /* Pin Controlled by PC9 */ +#define PIO_PC10 (1u << 10) /* Pin Controlled by PC10 */ +#define PIO_PC11 (1u << 11) /* Pin Controlled by PC11 */ +#define PIO_PC12 (1u << 12) /* Pin Controlled by PC12 */ +#define PIO_PC13 (1u << 13) /* Pin Controlled by PC13 */ +#define PIO_PC14 (1u << 14) /* Pin Controlled by PC14 */ +#define PIO_PC15 (1u << 15) /* Pin Controlled by PC15 */ +#define PIO_PC16 (1u << 16) /* Pin Controlled by PC16 */ +#define PIO_PC17 (1u << 17) /* Pin Controlled by PC17 */ +#define PIO_PC18 (1u << 18) /* Pin Controlled by PC18 */ +#define PIO_PC19 (1u << 19) /* Pin Controlled by PC19 */ +#define PIO_PC20 (1u << 20) /* Pin Controlled by PC20 */ +#define PIO_PC21 (1u << 21) /* Pin Controlled by PC21 */ +#define PIO_PC22 (1u << 22) /* Pin Controlled by PC22 */ +#define PIO_PC23 (1u << 23) /* Pin Controlled by PC23 */ +#define PIO_PC24 (1u << 24) /* Pin Controlled by PC24 */ +#define PIO_PC25 (1u << 25) /* Pin Controlled by PC25 */ +#define PIO_PC26 (1u << 26) /* Pin Controlled by PC26 */ +#define PIO_PC27 (1u << 27) /* Pin Controlled by PC27 */ +#define PIO_PC28 (1u << 28) /* Pin Controlled by PC28 */ +#define PIO_PC29 (1u << 29) /* Pin Controlled by PC29 */ +#define PIO_PC30 (1u << 30) /* Pin Controlled by PC30 */ +#define PIO_PC31 (1u << 31) /* Pin Controlled by PC31 */ +/* ========== Pio definition for SPI peripheral ========== */ +#define PIO_PA12A_MISO (1u << 12) /* Spi signal: MISO */ +#define PIO_PA13A_MOSI (1u << 13) /* Spi signal: MOSI */ +#define PIO_PA11A_NPCS0 (1u << 11) /* Spi signal: NPCS0 */ +#define PIO_PA9B_NPCS1 (1u << 9) /* Spi signal: NPCS1 */ +#define PIO_PA31A_NPCS1 (1u << 31) /* Spi signal: NPCS1 */ +#define PIO_PB14A_NPCS1 (1u << 14) /* Spi signal: NPCS1 */ +#define PIO_PC4B_NPCS1 (1u << 4) /* Spi signal: NPCS1 */ +#define PIO_PA10B_NPCS2 (1u << 10) /* Spi signal: NPCS2 */ +#define PIO_PA30B_NPCS2 (1u << 30) /* Spi signal: NPCS2 */ +#define PIO_PB2B_NPCS2 (1u << 2) /* Spi signal: NPCS2 */ +#define PIO_PC7B_NPCS2 (1u << 7) /* Spi signal: NPCS2 */ +#define PIO_PA3B_NPCS3 (1u << 3) /* Spi signal: NPCS3 */ +#define PIO_PA5B_NPCS3 (1u << 5) /* Spi signal: NPCS3 */ +#define PIO_PA22B_NPCS3 (1u << 22) /* Spi signal: NPCS3 */ +#define PIO_PA14A_SPCK (1u << 14) /* Spi signal: SPCK */ +/* ========== Pio definition for TC0 peripheral ========== */ +#define PIO_PA4B_TCLK0 (1u << 4) /* Tc0 signal: TCLK0 */ +#define PIO_PA28B_TCLK1 (1u << 28) /* Tc0 signal: TCLK1 */ +#define PIO_PA29B_TCLK2 (1u << 29) /* Tc0 signal: TCLK2 */ +#define PIO_PA0B_TIOA0 (1u << 0) /* Tc0 signal: TIOA0 */ +#define PIO_PA15B_TIOA1 (1u << 15) /* Tc0 signal: TIOA1 */ +#define PIO_PA26B_TIOA2 (1u << 26) /* Tc0 signal: TIOA2 */ +#define PIO_PA1B_TIOB0 (1u << 1) /* Tc0 signal: TIOB0 */ +#define PIO_PA16B_TIOB1 (1u << 16) /* Tc0 signal: TIOB1 */ +#define PIO_PA27B_TIOB2 (1u << 27) /* Tc0 signal: TIOB2 */ +/* ========== Pio definition for TC1 peripheral ========== */ +#define PIO_PC25B_TCLK3 (1u << 25) /* Tc1 signal: TCLK3 */ +#define PIO_PC28B_TCLK4 (1u << 28) /* Tc1 signal: TCLK4 */ +#define PIO_PC31B_TCLK5 (1u << 31) /* Tc1 signal: TCLK5 */ +#define PIO_PC23B_TIOA3 (1u << 23) /* Tc1 signal: TIOA3 */ +#define PIO_PC26B_TIOA4 (1u << 26) /* Tc1 signal: TIOA4 */ +#define PIO_PC29B_TIOA5 (1u << 29) /* Tc1 signal: TIOA5 */ +#define PIO_PC24B_TIOB3 (1u << 24) /* Tc1 signal: TIOB3 */ +#define PIO_PC27B_TIOB4 (1u << 27) /* Tc1 signal: TIOB4 */ +#define PIO_PC30B_TIOB5 (1u << 30) /* Tc1 signal: TIOB5 */ +/* ========== Pio definition for TWI0 peripheral ========== */ +#define PIO_PA4A_TWCK0 (1u << 4) /* Twi0 signal: TWCK0 */ +#define PIO_PA3A_TWD0 (1u << 3) /* Twi0 signal: TWD0 */ +/* ========== Pio definition for TWI1 peripheral ========== */ +#define PIO_PB5A_TWCK1 (1u << 5) /* Twi1 signal: TWCK1 */ +#define PIO_PB4A_TWD1 (1u << 4) /* Twi1 signal: TWD1 */ +/* ========== Pio definition for PWM peripheral ========== */ +#define PIO_PA0A_PWM0 (1u << 0) /* Pwm signal: PWM0 */ +#define PIO_PA11B_PWM0 (1u << 11) /* Pwm signal: PWM0 */ +#define PIO_PA23B_PWM0 (1u << 23) /* Pwm signal: PWM0 */ +#define PIO_PB0A_PWM0 (1u << 0) /* Pwm signal: PWM0 */ +#define PIO_PC8B_PWM0 (1u << 8) /* Pwm signal: PWM0 */ +#define PIO_PC18B_PWM0 (1u << 18) /* Pwm signal: PWM0 */ +#define PIO_PC22B_PWM0 (1u << 22) /* Pwm signal: PWM0 */ +#define PIO_PA1A_PWM1 (1u << 1) /* Pwm signal: PWM1 */ +#define PIO_PA12B_PWM1 (1u << 12) /* Pwm signal: PWM1 */ +#define PIO_PA24B_PWM1 (1u << 24) /* Pwm signal: PWM1 */ +#define PIO_PB1A_PWM1 (1u << 1) /* Pwm signal: PWM1 */ +#define PIO_PC9B_PWM1 (1u << 9) /* Pwm signal: PWM1 */ +#define PIO_PC19B_PWM1 (1u << 19) /* Pwm signal: PWM1 */ +#define PIO_PA2A_PWM2 (1u << 2) /* Pwm signal: PWM2 */ +#define PIO_PA13B_PWM2 (1u << 13) /* Pwm signal: PWM2 */ +#define PIO_PA25B_PWM2 (1u << 25) /* Pwm signal: PWM2 */ +#define PIO_PB4B_PWM2 (1u << 4) /* Pwm signal: PWM2 */ +#define PIO_PC10B_PWM2 (1u << 10) /* Pwm signal: PWM2 */ +#define PIO_PC20B_PWM2 (1u << 20) /* Pwm signal: PWM2 */ +#define PIO_PA7B_PWM3 (1u << 7) /* Pwm signal: PWM3 */ +#define PIO_PA14B_PWM3 (1u << 14) /* Pwm signal: PWM3 */ +#define PIO_PB14B_PWM3 (1u << 14) /* Pwm signal: PWM3 */ +#define PIO_PC11B_PWM3 (1u << 11) /* Pwm signal: PWM3 */ +#define PIO_PC21B_PWM3 (1u << 21) /* Pwm signal: PWM3 */ +/* ========== Pio definition for USART0 peripheral ========== */ +#define PIO_PA8A_CTS0 (1u << 8) /* Usart0 signal: CTS0 */ +#define PIO_PA7A_RTS0 (1u << 7) /* Usart0 signal: RTS0 */ +#define PIO_PA5A_RXD0 (1u << 5) /* Usart0 signal: RXD0 */ +#define PIO_PA2B_SCK0 (1u << 2) /* Usart0 signal: SCK0 */ +#define PIO_PA6A_TXD0 (1u << 6) /* Usart0 signal: TXD0 */ +/* ========== Pio definition for USART1 peripheral ========== */ +#define PIO_PA25A_CTS1 (1u << 25) /* Usart1 signal: CTS1 */ +#define PIO_PA24A_RTS1 (1u << 24) /* Usart1 signal: RTS1 */ +#define PIO_PA21A_RXD1 (1u << 21) /* Usart1 signal: RXD1 */ +#define PIO_PA23A_SCK1 (1u << 23) /* Usart1 signal: SCK1 */ +#define PIO_PA22A_TXD1 (1u << 22) /* Usart1 signal: TXD1 */ +/* ========== Pio definition for ADC peripheral ========== */ +#define PIO_PA17X1_AD0 (1u << 17) /* Adc signal: AD0 */ +#define PIO_PA18X1_AD1 (1u << 18) /* Adc signal: AD1 */ +#define PIO_PC13X1_AD10 (1u << 13) /* Adc signal: AD10 */ +#define PIO_PC15X1_AD11 (1u << 15) /* Adc signal: AD11 */ +#define PIO_PC12X1_AD12 (1u << 12) /* Adc signal: AD12 */ +#define PIO_PC29X1_AD13 (1u << 29) /* Adc signal: AD13 */ +#define PIO_PC30X1_AD14 (1u << 30) /* Adc signal: AD14 */ +#define PIO_PC31X1_AD15 (1u << 31) /* Adc signal: AD15 */ +#define PIO_PA19X1_AD2_WKUP9 (1u << 19) /* Adc signal: AD2/WKUP9 */ +#define PIO_PA20X1_AD3_WKUP10 (1u << 20) /* Adc signal: AD3/WKUP10 */ +#define PIO_PB0X1_AD4 (1u << 0) /* Adc signal: AD4 */ +#define PIO_PB1X1_AD5 (1u << 1) /* Adc signal: AD5 */ +#define PIO_PB2X1_AD6_WKUP12 (1u << 2) /* Adc signal: AD6/WKUP12 */ +#define PIO_PB3X1_AD7 (1u << 3) /* Adc signal: AD7 */ +#define PIO_PA21X1_AD8 (1u << 21) /* Adc signal: AD8 */ +#define PIO_PA22X1_AD9 (1u << 22) /* Adc signal: AD9 */ +#define PIO_PA8B_ADTRG (1u << 8) /* Adc signal: ADTRG */ +/* ========== Pio definition for DACC peripheral ========== */ +#define PIO_PB13X1_DAC0 (1u << 13) /* Dacc signal: DAC0 */ +/* ========== Pio definition for PMC peripheral ========== */ +#define PIO_PA6B_PCK0 (1u << 6) /* Pmc signal: PCK0 */ +#define PIO_PB13B_PCK0 (1u << 13) /* Pmc signal: PCK0 */ +#define PIO_PC16B_PCK0 (1u << 16) /* Pmc signal: PCK0 */ +#define PIO_PA17B_PCK1 (1u << 17) /* Pmc signal: PCK1 */ +#define PIO_PA21B_PCK1 (1u << 21) /* Pmc signal: PCK1 */ +#define PIO_PC17B_PCK1 (1u << 17) /* Pmc signal: PCK1 */ +#define PIO_PA18B_PCK2 (1u << 18) /* Pmc signal: PCK2 */ +#define PIO_PA31B_PCK2 (1u << 31) /* Pmc signal: PCK2 */ +#define PIO_PB3B_PCK2 (1u << 3) /* Pmc signal: PCK2 */ +#define PIO_PC14B_PCK2 (1u << 14) /* Pmc signal: PCK2 */ +/* ========== Pio definition for UART0 peripheral ========== */ +#define PIO_PA9A_URXD0 (1u << 9) /* Uart0 signal: URXD0 */ +#define PIO_PA10A_UTXD0 (1u << 10) /* Uart0 signal: UTXD0 */ +/* ========== Pio definition for UART1 peripheral ========== */ +#define PIO_PB2A_URXD1 (1u << 2) /* Uart1 signal: URXD1 */ +#define PIO_PB3A_UTXD1 (1u << 3) /* Uart1 signal: UTXD1 */ + +/* ************************************************************************** */ +/* MEMORY MAPPING DEFINITIONS FOR SAM3N */ +/* ************************************************************************** */ + +#define IFLASH_ADDR (0x00400000u) /* Internal Flash base address */ +#define IROM_ADDR (0x00800000u) /* Internal ROM base address */ +#define IRAM_ADDR (0x20000000u) /* Internal RAM base address */ + +#if CPU_CM3_SAM3N1 +#define IFLASH_SIZE 0x10000 +#define IFLASH_PAGE_SIZE (256) /* Internal FLASH 0 Page Size: 256 bytes */ +#define IFLASH_LOCK_REGION_SIZE (16384) /* Internal FLASH 0 Lock Region Size: 16 Kbytes */ +#define IFLASH_NB_OF_PAGES (256) /* Internal FLASH 0 Number of Pages: 256 */ +#define IFLASH_NB_OF_LOCK_BITS (4) /* Internal FLASH 0 Number of Lock Bits: 4 */ +#define IRAM_SIZE 0x2000 +#elif CPU_CM3_SAM3N2 +#define IFLASH_SIZE 0x20000 +#define IFLASH_PAGE_SIZE (256) /* Internal FLASH 0 Page Size: 256 bytes */ +#define IFLASH_LOCK_REGION_SIZE (16384) /* Internal FLASH 0 Lock Region Size: 16 Kbytes */ +#define IFLASH_NB_OF_PAGES (512) /* Internal FLASH 0 Number of Pages: 512 */ +#define IFLASH_NB_OF_LOCK_BITS (8) /* Internal FLASH 0 Number of Lock Bits: 8 */ +#define IRAM_SIZE 0x4000 +#elif CPU_CM3_SAM3N4 +#define IFLASH_SIZE 0x40000 +#define IFLASH_PAGE_SIZE (256) /* Internal FLASH 0 Page Size: 256 bytes */ +#define IFLASH_LOCK_REGION_SIZE (16384) /* Internal FLASH 0 Lock Region Size: 16 Kbytes */ +#define IFLASH_NB_OF_PAGES (1024) /* Internal FLASH 0 Number of Pages: 1024 */ +#define IFLASH_NB_OF_LOCK_BITS (16) /* Internal FLASH 0 Number of Lock Bits: 16 */ +#define IRAM_SIZE 0x6000 +#else + #error Library does not support the specified device. +#endif + +#ifdef __cplusplus +} +#endif + + +#endif /* SAM3N_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32.h b/bertos/cpu/cortex-m3/io/stm32.h new file mode 100644 index 0000000..38cf2d1 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32.h @@ -0,0 +1,88 @@ +/** + * \file + * + * + * \brief STM32F10XX registers definition. + */ + +#ifndef STM32_H +#define STM32_H + +#include +#include + +#include + +#include + +#include "stm32_nvic.h" +#include "stm32_ints.h" +#include "stm32_gpio.h" +#include "stm32_uart.h" +#include "stm32_adc.h" +#include "stm32_i2c.h" +#include "stm32_flash.h" + +#if CPU_CM3_STM32F101C4 + #define GPIO_USART1_TX_PIN BV(9) + #define GPIO_USART1_RX_PIN BV(10) + #define GPIO_USART2_TX_PIN BV(2) + #define GPIO_USART2_RX_PIN BV(3) +#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB + #define GPIO_USART1_TX_PIN BV(9) + #define GPIO_USART1_RX_PIN BV(10) + #define GPIO_USART2_TX_PIN BV(2) + #define GPIO_USART2_RX_PIN BV(3) + #define GPIO_USART3_TX_PIN BV(10) + #define GPIO_USART3_RX_PIN BV(11) +#else + #error No USART pins are defined for select cpu +#endif + +#if CPU_CM3_STM32F101C4 + #define GPIO_I2C1_SCL_PIN BV(6) + #define GPIO_I2C1_SDA_PIN BV(7) +#elif CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB + #define GPIO_I2C1_SCL_PIN BV(6) + #define GPIO_I2C1_SDA_PIN BV(7) + #define GPIO_I2C2_SCL_PIN BV(10) + #define GPIO_I2C2_SDA_PIN BV(11) +#else + #error No i2c pins are defined for select cpu +#endif + +#if CPU_CM3_STM32F101C4 || CPU_CM3_STM32F103RB || CPU_CM3_STM32F103RE || CPU_CM3_STM32F100RB + #define FLASH_PAGE_SIZE 1024 +#else + #error No embedded definition for select cpu +#endif + +#endif /* STM32_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32_adc.h b/bertos/cpu/cortex-m3/io/stm32_adc.h new file mode 100644 index 0000000..d81843e --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32_adc.h @@ -0,0 +1,310 @@ +/** + * \file + * + * + * \brief STM32F103xx adc definition. + */ + +#ifndef STM32_ADC_H +#define STM32_ADC_H + +#include + +/* ADC dual mode */ +#define ADC_MODE_INDEPENDENT ((uint32_t)0x00000000) +#define ADC_MODE_REGINJECSIMULT ((uint32_t)0x00010000) +#define ADC_MODE_REGSIMULT_ALTERTRIG ((uint32_t)0x00020000) +#define ADC_MODE_INJECSIMULT_FASTINTERL ((uint32_t)0x00030000) +#define ADC_MODE_INJECSIMULT_SLOWINTERL ((uint32_t)0x00040000) +#define ADC_MODE_INJECSIMULT ((uint32_t)0x00050000) +#define ADC_MODE_REGSIMULT ((uint32_t)0x00060000) +#define ADC_MODE_FASTINTERL ((uint32_t)0x00070000) +#define ADC_MODE_SLOWINTERL ((uint32_t)0x00080000) +#define ADC_MODE_ALTERTRIG ((uint32_t)0x00090000) + +/* ADC extrenal trigger sources for regular channels conversion */ +#define ADC_EXTERNALTRIGCONV_T1_CC1 ((uint32_t)0x00000000) +#define ADC_EXTERNALTRIGCONV_T1_CC2 ((uint32_t)0x00020000) +#define ADC_EXTERNALTRIGCONV_T1_CC3 ((uint32_t)0x00040000) +#define ADC_EXTERNALTRIGCONV_T2_CC2 ((uint32_t)0x00060000) +#define ADC_EXTERNALTRIGCONV_T3_TRGO ((uint32_t)0x00080000) +#define ADC_EXTERNALTRIGCONV_T4_CC4 ((uint32_t)0x000A0000) +#define ADC_EXTERNALTRIGCONV_EXT_IT11 ((uint32_t)0x000C0000) +#define ADC_EXTERNALTRIGCONV_NONE ((uint32_t)0x000E0000) + +/* ADC data align */ +#define ADC_DATAALIGN_RIGHT ((uint32_t)0x00000000) +#define ADC_DATAALIGN_LEFT ((uint32_t)0x00000800) + +/* ADC channels */ +#define ADC_CHANNEL_0 ((uint8_t)0x00) +#define ADC_CHANNEL_1 ((uint8_t)0x01) +#define ADC_CHANNEL_2 ((uint8_t)0x02) +#define ADC_CHANNEL_3 ((uint8_t)0x03) +#define ADC_CHANNEL_4 ((uint8_t)0x04) +#define ADC_CHANNEL_5 ((uint8_t)0x05) +#define ADC_CHANNEL_6 ((uint8_t)0x06) +#define ADC_CHANNEL_7 ((uint8_t)0x07) +#define ADC_CHANNEL_8 ((uint8_t)0x08) +#define ADC_CHANNEL_9 ((uint8_t)0x09) +#define ADC_CHANNEL_10 ((uint8_t)0x0A) +#define ADC_CHANNEL_11 ((uint8_t)0x0B) +#define ADC_CHANNEL_12 ((uint8_t)0x0C) +#define ADC_CHANNEL_13 ((uint8_t)0x0D) +#define ADC_CHANNEL_14 ((uint8_t)0x0E) +#define ADC_CHANNEL_15 ((uint8_t)0x0F) +#define ADC_CHANNEL_16 ((uint8_t)0x10) +#define ADC_CHANNEL_17 ((uint8_t)0x11) + +/* ADC sampling times */ +#define ADC_SAMPLETIME_1CYCLES5 ((uint8_t)0x00) +#define ADC_SAMPLETIME_7CYCLES5 ((uint8_t)0x01) +#define ADC_SAMPLETIME_13CYCLES5 ((uint8_t)0x02) +#define ADC_SAMPLETIME_28CYCLES5 ((uint8_t)0x03) +#define ADC_SAMPLETIME_41CYCLES5 ((uint8_t)0x04) +#define ADC_SAMPLETIME_55CYCLES5 ((uint8_t)0x05) +#define ADC_SAMPLETIME_71CYCLES5 ((uint8_t)0x06) +#define ADC_SAMPLETIME_239CYCLES5 ((uint8_t)0x07) + +/* ADC extrenal trigger sources for injected channels conversion */ +#define ADC_EXTERNALTRIGINJECCONV_T1_TRGO ((uint32_t)0x00000000) +#define ADC_EXTERNALTRIGINJECCONV_T1_CC4 ((uint32_t)0x00001000) +#define ADC_EXTERNALTRIGINJECCONV_T2_TRGO ((uint32_t)0x00002000) +#define ADC_EXTERNALTRIGINJECCONV_T2_CC1 ((uint32_t)0x00003000) +#define ADC_EXTERNALTRIGINJECCONV_T3_CC4 ((uint32_t)0x00004000) +#define ADC_EXTERNALTRIGINJECCONV_T4_TRGO ((uint32_t)0x00005000) +#define ADC_EXTERNALTRIGINJECCONV_EXT_IT15 ((uint32_t)0x00006000) +#define ADC_EXTERNALTRIGINJECCONV_NONE ((uint32_t)0x00007000) + +/* ADC injected channel selection */ +#define ADC_INJECTEDCHANNEL_1 ((uint8_t)0x14) +#define ADC_INJECTEDCHANNEL_2 ((uint8_t)0x18) +#define ADC_INJECTEDCHANNEL_3 ((uint8_t)0x1C) +#define ADC_INJECTEDCHANNEL_4 ((uint8_t)0x20) + +/* ADC analog watchdog selection */ +#define ADC_ANALOGWATCHDOG_SINGLEREGENABLE ((uint32_t)0x00800200) +#define ADC_ANALOGWATCHDOG_SINGLEINJECENABLE ((uint32_t)0x00400200) +#define ADC_ANALOGWATCHDOG_SINGLEREGORINJECENABLE ((uint32_t)0x00C00200) +#define ADC_ANALOGWATCHDOG_ALLREGENABLE ((uint32_t)0x00800000) +#define ADC_ANALOGWATCHDOG_ALLINJECENABLE ((uint32_t)0x00400000) +#define ADC_ANALOGWATCHDOG_ALLREGALLINJECENABLE ((uint32_t)0x00C00000) +#define ADC_ANALOGWATCHDOG_NONE ((uint32_t)0x00000000) + +/* ADC interrupts definition */ +#define ADC_IT_EOC ((uint16_t)0x0220) +#define ADC_IT_AWD ((uint16_t)0x0140) +#define ADC_IT_JEOC ((uint16_t)0x0480) + +/* ADC flags definition */ +#define ADC_FLAG_AWD ((uint8_t)0x01) +#define ADC_FLAG_EOC ((uint8_t)0x02) +#define ADC_FLAG_JEOC ((uint8_t)0x04) +#define ADC_FLAG_JSTRT ((uint8_t)0x08) +#define ADC_FLAG_STRT ((uint8_t)0X10) + + +/* ADC ADON mask */ +#define CR2_ADON_SET ((uint32_t)0x00000001) +#define CR2_ADON_RESET ((uint32_t)0xFFFFFFFE) + +/* ADC DMA mask */ +#define CR2_DMA_SET ((uint16_t)0x0100) +#define CR2_DMA_RESET ((uint16_t)0xFEFF) + +/* ADC RSTCAL mask */ +#define CR2_RSTCAL_SET ((uint16_t)0x0008) + +/* ADC CAL mask */ +#define CR2_CAL_SET ((uint16_t)0x0004) + +/* ADC SWSTRT mask */ +#define CR2_SWSTRT_SET ((uint32_t)0x00400000) + +/* ADC DISCNUM mask */ +#define CR1_DISCNUM_RESET ((uint32_t)0xFFFF1FFF) + +/* ADC DISCEN mask */ +#define CR1_DISCEN_SET ((uint32_t)0x00000800) +#define CR1_DISCEN_RESET ((uint32_t)0xFFFFF7FF) + +/* ADC EXTTRIG mask */ +#define CR2_EXTTRIG_SET ((uint32_t)0x00100000) +#define CR2_EXTTRIG_RESET ((uint32_t)0xFFEFFFFF) + +/* ADC Software start mask */ +#define CR2_EXTTRIG_SWSTRT_SET ((uint32_t)0x00500000) +#define CR2_EXTTRIG_SWSTRT_RESET ((uint32_t)0xFFAFFFFF) + +/* ADC JAUTO mask */ +#define CR1_JAUTO_SET ((uint32_t)0x00000400) +#define CR1_JAUTO_RESET ((uint32_t)0xFFFFFBFF) + +/* ADC JDISCEN mask */ +#define CR1_JDISCEN_SET ((uint32_t)0x00001000) +#define CR1_JDISCEN_RESET ((uint32_t)0xFFFFEFFF) + +/* ADC JEXTSEL mask */ +#define CR2_JEXTSEL_RESET ((uint32_t)0xFFFF8FFF) + +/* ADC JEXTTRIG mask */ +#define CR2_JEXTTRIG_SET ((uint32_t)0x00008000) +#define CR2_JEXTTRIG_RESET ((uint32_t)0xFFFF7FFF) + +/* ADC JSWSTRT mask */ +#define CR2_JSWSTRT_SET ((uint32_t)0x00200000) + +/* ADC injected software start mask */ +#define CR2_JEXTTRIG_JSWSTRT_SET ((uint32_t)0x00208000) +#define CR2_JEXTTRIG_JSWSTRT_RESET ((uint32_t)0xFFDF7FFF) + +/* ADC AWDCH mask */ +#define CR1_AWDCH_RESET ((uint32_t)0xFFFFFFE0) + +/* ADC SQx mask */ +#define SQR3_SQ_MASK ((uint8_t)0x1F) +#define SQR2_SQ_MASK ((uint8_t)0x1F) +#define SQR1_SQ_MASK ((uint8_t)0x1F) +#define SQR1_SQ_LEN_MASK 0xF +#define SQR1_SQ_LEN_SHIFT 20 + +/* ADC JSQx mask */ +#define JSQR_JSQ_SET ((uint8_t)0x1F) + +/* ADC JL mask */ +#define JSQR_JL_RESET ((uint32_t)0xFFCFFFFF) + +/* ADC SMPx mask */ +#define SMPR1_SMP_SET ((uint8_t)0x07) +#define SMPR2_SMP_SET ((uint8_t)0x07) + +/* ADC Analog watchdog enable mode mask */ +#define CR1_AWDMODE_RESET ((uint32_t)0xFF3FFDFF) + +/* ADC TSPD mask */ +#define CR2_TSVREFE_SET ((uint32_t)0x00800000) +#define CR2_TSVREFE_RESET ((uint32_t)0xFF7FFFFF) + +/* ADC JDRx registers= offset */ +#define JDR_OFFSET ((uint8_t)0x28) + +/* ADC CR1 register */ +#define CR1_EOCIE 5 +#define CR1_AWDIE 6 +#define CR1_JEOCIE 7 +#define CR1_SCAN 8 +#define CR1_AWDSGL 9 +#define CR1_JAUTO 10 +#define CR1_DISCEN 11 +#define CR1_JDISCEN 12 +#define CR1_JAWDEN 22 +#define CR1_AWDEN 23 + +/* ADC CR2 register */ +#define CR2_ADON 0 +#define CR2_CONT 1 +#define CR2_CAL 2 +#define CR2_RTSCAL 3 +#define CR2_DMA 8 +#define CR2_ALIGN 11 +#define CR2_JEXTTRIG 15 +#define CR2_EXTTRIG 20 +#define CR2_JSWSTART 21 +#define CR2_SWSTART 22 +#define CR2_TSVREFE 23 + +/* ADC status */ +#define SR_AWD 0 +#define SR_EOC 1 +#define SR_JEOC 2 +#define SR_JSTRT 3 +#define SR_STRT 4 + +/* ADC sample time */ +#define SMPR1_CH17 21 +#define SMPR1_CH16 18 +#define SMPR1_CH15 15 +#define SMPR1_CH14 12 +#define SMPR1_CH13 9 +#define SMPR1_CH12 6 +#define SMPR1_CH11 3 +#define SMPR1_CH10 0 + +#define SMPR2_CH9 27 +#define SMPR2_CH8 24 +#define SMPR2_CH7 21 +#define SMPR2_CH6 18 +#define SMPR2_CH5 15 +#define SMPR2_CH4 12 +#define SMPR2_CH3 9 +#define SMPR2_CH2 6 +#define SMPR2_CH1 3 +#define SMPR2_CH0 0 + +/* ADC registers Masks */ +#define CR1_ADC_CLEAR_MASK ((uint32_t)0xFFF0FEFF) +#define CR2_ADC_CLEAR_MASK ((uint32_t)0xFFF1F7FD) +#define SQR1_CLEAR_MASK ((uint32_t)0xFF0FFFFF) + + + +/* ADC defines for SMT32F103Bxx */ +#define ADC_TEMP_V25 4300 // uV / C +#define ADC_TEMP_SLOPE 1430 // mV +#define ADC_TEMP_CONST 25000 +#define ADC_TEMP_CH 16 +#define ADC_VREFINT_CH 17 + +struct stm32_adc +{ + reg32_t SR; + reg32_t CR1; + reg32_t CR2; + reg32_t SMPR1; + reg32_t SMPR2; + reg32_t JOFR1; + reg32_t JOFR2; + reg32_t JOFR3; + reg32_t JOFR4; + reg32_t HTR; + reg32_t LTR; + reg32_t SQR1; + reg32_t SQR2; + reg32_t SQR3; + reg32_t JSQR; + reg32_t JDR1; + reg32_t JDR2; + reg32_t JDR3; + reg32_t JDR4; + reg32_t DR; +}; + +#endif /* STM32_ADC_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32_flash.h b/bertos/cpu/cortex-m3/io/stm32_flash.h new file mode 100644 index 0000000..10c244a --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32_flash.h @@ -0,0 +1,176 @@ +/** + * \file + * + * + * \brief STM32F103xx Embedded flash definition. + */ + +#ifndef STM32_FLASH_H +#define STM32_FLASH_H + +#include + +#include + +/** Return the embedded flash size in kB */ +#define F_SIZE ((*(reg32_t *) 0x1FFFF7E0) & 0xFFFF) + + +/* Flash Access Control Register bits */ +#define ACR_LATENCY_MASK ((uint32_t)0x00000038) +#define ACR_HLFCYA_MASK ((uint32_t)0xFFFFFFF7) +#define ACR_PRFTBE_MASK ((uint32_t)0xFFFFFFEF) + +/* Flash Access Control Register bits */ +#define ACR_PRFTBS_MASK ((uint32_t)0x00000020) + +/* Flash Control Register bits */ +#define CR_PG_SET ((uint32_t)0x00000001) +#define CR_PG_RESET ((uint32_t)0x00001FFE) + +#define CR_PER_SET ((uint32_t)0x00000002) +#define CR_PER_RESET ((uint32_t)0x00001FFD) + +#define CR_MER_SET ((uint32_t)0x00000004) +#define CR_MER_RESET ((uint32_t)0x00001FFB) + +#define CR_OPTPG_SET ((uint32_t)0x00000010) +#define CR_OPTPG_RESET ((uint32_t)0x00001FEF) + +#define CR_OPTER_SET ((uint32_t)0x00000020) +#define CR_OPTER_RESET ((uint32_t)0x00001FDF) + +#define CR_STRT_SET ((uint32_t)0x00000040) + +#define CR_LOCK_SET ((uint32_t)0x00000080) + +/* FLASH Mask */ +#define RDPRT_MASK ((uint32_t)0x00000002) +#define WRP0_MASK ((uint32_t)0x000000FF) +#define WRP1_MASK ((uint32_t)0x0000FF00) +#define WRP2_MASK ((uint32_t)0x00FF0000) +#define WRP3_MASK ((uint32_t)0xFF000000) + +/* FLASH Keys */ +#define RDP_KEY ((uint16_t)0x00A5) +#define FLASH_KEY1 ((uint32_t)0x45670123) +#define FLASH_KEY2 ((uint32_t)0xCDEF89AB) + +/* Flash Latency */ +#define FLASH_LATENCY_0 ((uint32_t)0x00000000) /* FLASH Zero Latency cycle */ +#define FLASH_LATENCY_1 ((uint32_t)0x00000001) /* FLASH One Latency cycle */ +#define FLASH_LATENCY_2 ((uint32_t)0x00000002) /* FLASH Two Latency cycles */ + +/* Half Cycle Enable/Disable */ +#define FLASH_HALFCYCLEACCESS_ENABLE ((uint32_t)0x00000008) /* FLASH Half Cycle Enable */ +#define FLASH_HALFCYCLEACCESS_DISABLE ((uint32_t)0x00000000) /* FLASH Half Cycle Disable */ + +/* Prefetch Buffer Enable/Disable */ +#define FLASH_PREFETCHBUFFER_ENABLE ((uint32_t)0x00000010) /* FLASH Prefetch Buffer Enable */ +#define FLASH_PREFETCHBUFFER_DISABLE ((uint32_t)0x00000000) /* FLASH Prefetch Buffer Disable */ + +/* Option Bytes Write Protection */ +#define FLASH_WRPROT_PAGES0TO3 ((uint32_t)0x00000001) /* Write protection of page 0 to 3 */ +#define FLASH_WRPROT_PAGES4TO7 ((uint32_t)0x00000002) /* Write protection of page 4 to 7 */ +#define FLASH_WRPROT_PAGES8TO11 ((uint32_t)0x00000004) /* Write protection of page 8 to 11 */ +#define FLASH_WRPROT_PAGES12TO15 ((uint32_t)0x00000008) /* Write protection of page 12 to 15 */ +#define FLASH_WRPROT_PAGES16TO19 ((uint32_t)0x00000010) /* Write protection of page 16 to 19 */ +#define FLASH_WRPROT_PAGES20TO23 ((uint32_t)0x00000020) /* Write protection of page 20 to 23 */ +#define FLASH_WRPROT_PAGES24TO27 ((uint32_t)0x00000040) /* Write protection of page 24 to 27 */ +#define FLASH_WRPROT_PAGES28TO31 ((uint32_t)0x00000080) /* Write protection of page 28 to 31 */ +#define FLASH_WRPROT_PAGES32TO35 ((uint32_t)0x00000100) /* Write protection of page 32 to 35 */ +#define FLASH_WRPROT_PAGES36TO39 ((uint32_t)0x00000200) /* Write protection of page 36 to 39 */ +#define FLASH_WRPROT_PAGES40TO43 ((uint32_t)0x00000400) /* Write protection of page 40 to 43 */ +#define FLASH_WRPROT_PAGES44TO47 ((uint32_t)0x00000800) /* Write protection of page 44 to 47 */ +#define FLASH_WRPROT_PAGES48TO51 ((uint32_t)0x00001000) /* Write protection of page 48 to 51 */ +#define FLASH_WRPROT_PAGES52TO55 ((uint32_t)0x00002000) /* Write protection of page 52 to 55 */ +#define FLASH_WRPROT_PAGES56TO59 ((uint32_t)0x00004000) /* Write protection of page 56 to 59 */ +#define FLASH_WRPROT_PAGES60TO63 ((uint32_t)0x00008000) /* Write protection of page 60 to 63 */ +#define FLASH_WRPROT_PAGES64TO67 ((uint32_t)0x00010000) /* Write protection of page 64 to 67 */ +#define FLASH_WRPROT_PAGES68TO71 ((uint32_t)0x00020000) /* Write protection of page 68 to 71 */ +#define FLASH_WRPROT_PAGES72TO75 ((uint32_t)0x00040000) /* Write protection of page 72 to 75 */ +#define FLASH_WRPROT_PAGES76TO79 ((uint32_t)0x00080000) /* Write protection of page 76 to 79 */ +#define FLASH_WRPROT_PAGES80TO83 ((uint32_t)0x00100000) /* Write protection of page 80 to 83 */ +#define FLASH_WRPROT_PAGES84TO87 ((uint32_t)0x00200000) /* Write protection of page 84 to 87 */ +#define FLASH_WRPROT_PAGES88TO91 ((uint32_t)0x00400000) /* Write protection of page 88 to 91 */ +#define FLASH_WRPROT_PAGES92TO95 ((uint32_t)0x00800000) /* Write protection of page 92 to 95 */ +#define FLASH_WRPROT_PAGES96TO99 ((uint32_t)0x01000000) /* Write protection of page 96 to 99 */ +#define FLASH_WRPROT_PAGES100TO103 ((uint32_t)0x02000000) /* Write protection of page 100 to 103 */ +#define FLASH_WRPROT_PAGES104TO107 ((uint32_t)0x04000000) /* Write protection of page 104 to 107 */ +#define FLASH_WRPROT_PAGES108TO111 ((uint32_t)0x08000000) /* Write protection of page 108 to 111 */ +#define FLASH_WRPROT_PAGES112TO115 ((uint32_t)0x10000000) /* Write protection of page 112 to 115 */ +#define FLASH_WRPROT_PAGES116TO119 ((uint32_t)0x20000000) /* Write protection of page 115 to 119 */ +#define FLASH_WRPROT_PAGES120TO123 ((uint32_t)0x40000000) /* Write protection of page 120 to 123 */ +#define FLASH_WRPROT_PAGES124TO127 ((uint32_t)0x80000000) /* Write protection of page 124 to 127 */ +#define FLASH_WRPROT_ALLPAGES ((uint32_t)0xFFFFFFFF) /* Write protection All Pages */ + +/* Option Bytes IWatchdog */ +#define OB_IWDG_SW ((uint16_t)0x0001) /* Software IWDG selected */ +#define OB_IWDG_HW ((uint16_t)0x0000) /* Hardware IWDG selected */ + +/* Option Bytes nRST_STOP */ +#define OB_STOP_NORST ((uint16_t)0x0002) /* No reset generated when entering in STOP */ +#define OB_STOP_RST ((uint16_t)0x0000) /* Reset generated when entering in STOP */ + +/* Option Bytes nRST_STDBY */ +#define OB_STDBY_NORST ((uint16_t)0x0004) /* No reset generated when entering in STANDBY */ +#define OB_STDBY_RST ((uint16_t)0x0000) /* Reset generated when entering in STANDBY */ + +/* FLASH Interrupts */ +#define FLASH_IT_ERROR ((uint32_t)0x00000400) /* FPEC error interrupt source */ +#define FLASH_IT_EOP ((uint32_t)0x00001000) /* End of FLASH Operation Interrupt source */ + +/* FLASH Flags */ +#define FLASH_FLAG_BSY ((uint32_t)0x00000001) /* FLASH Busy flag */ +#define FLASH_FLAG_EOP ((uint32_t)0x00000020) /* FLASH End of Operation flag */ +#define FLASH_FLAG_PGERR ((uint32_t)0x00000004) /* FLASH Program error flag */ +#define FLASH_FLAG_WRPRTERR ((uint32_t)0x00000010) /* FLASH Write protected error flag */ +#define FLASH_FLAG_OPTERR ((uint32_t)0x00000001) /* FLASH Option Byte error flag */ + + + +/** + * Embbeded flash configuration registers structure + */ +struct stm32_flash +{ + reg32_t ACR; + reg32_t KEYR; + reg32_t OPTKEYR; + reg32_t SR; + reg32_t CR; + reg32_t AR; + reg32_t RESERVED; + reg32_t OBR; + reg32_t WRPR; +}; + +#endif /* STM32_FLASH_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32_gpio.h b/bertos/cpu/cortex-m3/io/stm32_gpio.h new file mode 100644 index 0000000..71a6094 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32_gpio.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief STM32F103xx GPIO definition. + */ + +#ifndef STM32_GPIO_H +#define STM32_GPIO_H + +#include + +/** + * GPIO configuration registers structure + */ +struct stm32_gpio +{ + reg32_t CRL; + reg32_t CRH; + reg32_t IDR; + reg32_t ODR; + reg32_t BSRR; + reg32_t BRR; + reg32_t LCKR; +}; + +#endif /* STM32_GPIO_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32_i2c.h b/bertos/cpu/cortex-m3/io/stm32_i2c.h new file mode 100644 index 0000000..a7e375f --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32_i2c.h @@ -0,0 +1,292 @@ +/** + * \file + * + * + * \brief STM32F103xx I2C definition. + */ + +#ifndef STM32_I2C_H +#define STM32_I2C_H + +#include + + +/* I2C_modes */ +#define I2C_MODE_I2C ((uint16_t)0x0000) +#define I2C_MODE_SMBUSDEVICE ((uint16_t)0x0002) +#define I2C_MODE_SMBUSHOST ((uint16_t)0x000A) + +/* I2C_duty_cycle_in_fast_mode */ +#define I2C_DUTYCYCLE_16_9 ((uint16_t)0x4000) +#define I2C_DUTYCYCLE_2 ((uint16_t)0xBFFF) + +/* I2C_cknowledgementy */ +#define I2C_ACK_ENABLE ((uint16_t)0x0400) +#define I2C_ACK_DISABLE ((uint16_t)0x0000) + +/* I2C_transfer_direction */ +#define I2C_DIRECTION_TRANSMITTER ((uint8_t)0x00) +#define I2C_DIRECTION_RECEIVER ((uint8_t)0x01) + +/* I2C_acknowledged_address_defines */ +#define I2C_ACKNOWLEDGEDADDRESS_7BIT ((uint16_t)0x4000) +#define I2C_ACKNOWLEDGEDADDRESS_10BIT ((uint16_t)0xC000) + +/* I2C_registers */ +#define I2C_REGISTER_CR1 ((uint8_t)0x00) +#define I2C_REGISTER_CR2 ((uint8_t)0x04) +#define I2C_REGISTER_OAR1 ((uint8_t)0x08) +#define I2C_REGISTER_OAR2 ((uint8_t)0x0C) +#define I2C_REGISTER_DR ((uint8_t)0x10) +#define I2C_REGISTER_SR1 ((uint8_t)0x14) +#define I2C_REGISTER_SR2 ((uint8_t)0x18) +#define I2C_REGISTER_CCR ((uint8_t)0x1C) +#define I2C_REGISTER_TRISE ((uint8_t)0x20) + +/* I2C_SMBus_alert_pin_level */ +#define I2C_SMBUSALERT_LOW ((uint16_t)0x2000) +#define I2C_SMBUSALERT_HIGH ((uint16_t)0xDFFF) + +/* I2C_PEC_position */ +#define I2C_PECPOSITION_NEXT ((uint16_t)0x0800) +#define I2C_PECPOSITION_CURRENT ((uint16_t)0xF7FF) + +/* I2C_interrupts_definition */ +#define I2C_IT_BUF ((uint16_t)0x0400) +#define I2C_IT_EVT ((uint16_t)0x0200) +#define I2C_IT_ERR ((uint16_t)0x0100) + +/* I2C_interrupts_definition */ +#define I2C_IT_SMBALERT ((uint32_t)0x01008000) +#define I2C_IT_TIMEOUT ((uint32_t)0x01004000) +#define I2C_IT_PECERR ((uint32_t)0x01001000) +#define I2C_IT_OVR ((uint32_t)0x01000800) +#define I2C_IT_AF ((uint32_t)0x01000400) +#define I2C_IT_ARLO ((uint32_t)0x01000200) +#define I2C_IT_BERR ((uint32_t)0x01000100) +#define I2C_IT_TXE ((uint32_t)0x06000080) +#define I2C_IT_RXNE ((uint32_t)0x06000040) +#define I2C_IT_STOPF ((uint32_t)0x02000010) +#define I2C_IT_ADD10 ((uint32_t)0x02000008) +#define I2C_IT_BTF ((uint32_t)0x02000004) +#define I2C_IT_ADDR ((uint32_t)0x02000002) +#define I2C_IT_SB ((uint32_t)0x02000001) + +/* SR2 register flags */ +#define I2C_FLAG_DUALF ((uint32_t)0x00800000) +#define I2C_FLAG_SMBHOST ((uint32_t)0x00400000) +#define I2C_FLAG_SMBDEFAULT ((uint32_t)0x00200000) +#define I2C_FLAG_GENCALL ((uint32_t)0x00100000) +#define I2C_FLAG_TRA ((uint32_t)0x00040000) +#define I2C_FLAG_BUSY ((uint32_t)0x00020000) +#define I2C_FLAG_MSL ((uint32_t)0x00010000) + +/* SR1 register flags */ +#define I2C_FLAG_SMBALERT ((uint32_t)0x10008000) +#define I2C_FLAG_TIMEOUT ((uint32_t)0x10004000) +#define I2C_FLAG_PECERR ((uint32_t)0x10001000) +#define I2C_FLAG_OVR ((uint32_t)0x10000800) +#define I2C_FLAG_AF ((uint32_t)0x10000400) +#define I2C_FLAG_ARLO ((uint32_t)0x10000200) +#define I2C_FLAG_BERR ((uint32_t)0x10000100) +#define I2C_FLAG_TXE ((uint32_t)0x10000080) +#define I2C_FLAG_RXNE ((uint32_t)0x10000040) +#define I2C_FLAG_STOPF ((uint32_t)0x10000010) +#define I2C_FLAG_ADD10 ((uint32_t)0x10000008) +#define I2C_FLAG_BTF ((uint32_t)0x10000004) +#define I2C_FLAG_ADDR ((uint32_t)0x10000002) +#define I2C_FLAG_SB ((uint32_t)0x10000001) + +/* EV1 */ +#define I2C_EVENT_SLAVE_TRANSMITTER_ADDRESS_MATCHED ((uint32_t)0x00060082) /* TRA, BUSY, TXE and ADDR flags */ +#define I2C_EVENT_SLAVE_RECEIVER_ADDRESS_MATCHED ((uint32_t)0x00020002) /* BUSY and ADDR flags */ +#define I2C_EVENT_SLAVE_TRANSMITTER_SECONDADDRESS_MATCHED ((uint32_t)0x00860080) /* DUALF, TRA, BUSY and TXE flags */ +#define I2C_EVENT_SLAVE_RECEIVER_SECONDADDRESS_MATCHED ((uint32_t)0x00820000) /* DUALF and BUSY flags */ +#define I2C_EVENT_SLAVE_GENERALCALLADDRESS_MATCHED ((uint32_t)0x00120000) /* GENCALL and BUSY flags */ + +/* EV2 */ +#define I2C_EVENT_SLAVE_BYTE_RECEIVED ((uint32_t)0x00020040) /* BUSY and RXNE flags */ + +/* EV3 */ +#define I2C_EVENT_SLAVE_BYTE_TRANSMITTED ((uint32_t)0x00060084) /* TRA, BUSY, TXE and BTF flags */ + +/* EV4 */ +#define I2C_EVENT_SLAVE_STOP_DETECTED ((uint32_t)0x00000010) /* STOPF flag */ + +/* EV5 */ +#define I2C_EVENT_MASTER_MODE_SELECT ((uint32_t)0x00030001) /* BUSY, MSL and SB flag */ + + +/* EV6 */ +#define I2C_EVENT_MASTER_TRANSMITTER_MODE_SELECTED ((uint32_t)0x00070082) /* BUSY, MSL, ADDR, TXE and TRA flags */ +#define I2C_EVENT_MASTER_RECEIVER_MODE_SELECTED ((uint32_t)0x00030002) /* BUSY, MSL and ADDR flags */ + +/* EV7 */ +#define I2C_EVENT_MASTER_BYTE_RECEIVED ((uint32_t)0x00030040) /* BUSY, MSL and RXNE flags */ + +/* EV8 */ +#define I2C_EVENT_MASTER_BYTE_TRANSMITTING ((uint32_t)0x00070080) /* TRA, BUSY, MSL, TXE flags */ + +/* EV8_2 */ +#define I2C_EVENT_MASTER_BYTE_TRANSMITTED ((uint32_t)0x00070084) /* TRA, BUSY, MSL, TXE and BTF flags */ + +/* EV9 */ +#define I2C_EVENT_MASTER_MODE_ADDRESS10 ((uint32_t)0x00030008) /* BUSY, MSL and ADD10 flags */ + +/* EV3_2 */ +#define I2C_EVENT_SLAVE_ACK_FAILURE ((uint32_t)0x00000400) /* AF flag */ + + + +/* I2C SPE mask */ +#define CR1_PE_SET ((uint16_t)0x0001) +#define CR1_PE_RESET ((uint16_t)0xFFFE) + +/* I2C START mask */ +#define CR1_START_SET ((uint16_t)0x0100) +#define CR1_START_RESET ((uint16_t)0xFEFF) + +/* I2C STOP mask */ +#define CR1_STOP_SET ((uint16_t)0x0200) +#define CR1_STOP_RESET ((uint16_t)0xFDFF) + +/* I2C ACK mask */ +#define CR1_ACK_SET ((uint16_t)0x0400) +#define CR1_ACK_RESET ((uint16_t)0xFBFF) + +/* I2C ENGC mask */ +#define CR1_ENGC_SET ((uint16_t)0x0040) +#define CR1_ENGC_RESET ((uint16_t)0xFFBF) + +/* I2C SWRST mask */ +#define CR1_SWRST_SET ((uint16_t)0x8000) +#define CR1_SWRST_RESET ((uint16_t)0x7FFF) + +/* I2C PEC mask */ +#define CR1_PEC_SET ((uint16_t)0x1000) +#define CR1_PEC_RESET ((uint16_t)0xEFFF) + +/* I2C ENPEC mask */ +#define CR1_ENPEC_SET ((uint16_t)0x0020) +#define CR1_ENPEC_RESET ((uint16_t)0xFFDF) + +/* I2C ENARP mask */ +#define CR1_ENARP_SET ((uint16_t)0x0010) +#define CR1_ENARP_RESET ((uint16_t)0xFFEF) + +/* I2C NOSTRETCH mask */ +#define CR1_NOSTRETCH_SET ((uint16_t)0x0080) +#define CR1_NOSTRETCH_RESET ((uint16_t)0xFF7F) + +/* I2C registers Masks */ +#define CR1_CLEAR_MASK ((uint16_t)0xFBF5) + +/* I2C DMAEN mask */ +#define CR2_DMAEN_SET ((uint16_t)0x0800) +#define CR2_DMAEN_RESET ((uint16_t)0xF7FF) + +/* I2C LAST mask */ +#define CR2_LAST_SET ((uint16_t)0x1000) +#define CR2_LAST_RESET ((uint16_t)0xEFFF) + +/* I2C FREQ mask */ +#define CR2_FREQ_RESET ((uint16_t)0xFFC0) + +#define CR2_FREQ_36MHZ ((uint16_t)0x100100) + +/* I2C ADD0 mask */ +#define OAR1_ADD0_SET ((uint16_t)0x0001) +#define OAR1_ADD0_RESET ((uint16_t)0xFFFE) + +/* I2C ENDUAL mask */ +#define OAR2_ENDUAL_SET ((uint16_t)0x0001) +#define OAR2_ENDUAL_RESET ((uint16_t)0xFFFE) + +/* I2C ADD2 mask */ +#define OAR2_ADD2_RESET ((uint16_t)0xFF01) + +/* I2C F/S mask */ +#define CCR_FS_SET ((uint16_t)0x8000) + +/* I2C CCR mask */ +#define CCR_CCR_SET ((uint16_t)0x0FFF) + + +/* I2C CR1 */ +#define CR1_POS_SET ((uint16_t)0x800) +#define CR1_POS_RESET (~CR1_POS_SET) + +/* I2C Status */ +#define SR1_PECERR 12 +#define SR1_OVR 11 +#define SR1_AF 10 +#define SR1_ARLO 9 +#define SR1_BERR 8 +#define SR1_TXE 7 +#define SR1_RXNE 6 +#define SR1_ADDR 1 +#define SR1_BTF 2 +#define SR1_SB 0 + +#define SR2_TRA 2 +#define SR2_BUSY 1 +#define SR2_MSL 0 + + +#define SR1_ERR_MASK (BV(SR1_PECERR) | \ + BV(SR1_OVR) | \ + BV(SR1_AF) | \ + BV(SR1_ARLO) | \ + BV(SR1_BERR)) + +struct stm32_i2c +{ + reg16_t CR1; + uint16_t RESERVED0; + reg16_t CR2; + uint16_t RESERVED1; + reg16_t OAR1; + uint16_t RESERVED2; + reg16_t OAR2; + uint16_t RESERVED3; + reg16_t DR; + uint16_t RESERVED4; + reg16_t SR1; + uint16_t RESERVED5; + reg16_t SR2; + uint16_t RESERVED6; + reg16_t CCR; + uint16_t RESERVED7; + reg16_t TRISE; + uint16_t RESERVED8; +}; + +#endif /* STM32_I2C_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32_ints.h b/bertos/cpu/cortex-m3/io/stm32_ints.h new file mode 100644 index 0000000..7fde933 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32_ints.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief STM32F10xx interrupts definition. + */ + +#ifndef STM32_INTS_H +#define STM32_INTS_H + +/** + * The following are defines for the interrupt assignments. + */ +/*\{*/ +#define WWDG_IRQHANDLER 16 /* Window WatchDog Interrupt */ +#define PVD_IRQHANDLER 17 /* PVD through EXTI Line detection Interrupt */ +#define TAMPER_IRQHANDLER 18 /* Tamper Interrupt */ +#define RTC_IRQHANDLER 19 /* RTC global Interrupt */ +#define FLASH_IRQHANDLER 20 /* FLASH global Interrupt */ +#define RCC_IRQHANDLER 21 /* RCC global Interrupt */ +#define EXTI0_IRQHANDLER 22 /* EXTI Line0 Interrupt */ +#define EXTI1_IRQHANDLER 23 /* EXTI Line1 Interrupt */ +#define EXTI2_IRQHANDLER 24 /* EXTI Line2 Interrupt */ +#define EXTI3_IRQHANDLER 25 /* EXTI Line3 Interrupt */ +#define EXTI4_IRQHANDLER 26 /* EXTI Line4 Interrupt */ +#define DMACHANNEL1_IRQHANDLER 27 /* DMA Channel 1 global Interrupt */ +#define DMACHANNEL2_IRQHANDLER 28 /* DMA Channel 2 global Interrupt */ +#define DMACHANNEL3_IRQHANDLER 29 /* DMA Channel 3 global Interrupt */ +#define DMACHANNEL4_IRQHANDLER 30 /* DMA Channel 4 global Interrupt */ +#define DMACHANNEL5_IRQHANDLER 31 /* DMA Channel 5 global Interrupt */ +#define DMACHANNEL6_IRQHANDLER 32 /* DMA Channel 6 global Interrupt */ +#define DMACHANNEL7_IRQHANDLER 33 /* DMA Channel 7 global Interrupt */ +#define ADC_IRQHANDLER 34 /* ADC global Interrupt */ +#define USB_HP_CAN_TX_IRQHANDLER 35 /* USB High Priority or CAN TX Interrupts */ +#define USB_LP_CAN_RX0_IRQHANDLER 36 /* USB Low Priority or CAN RX0 Interrupts */ +#define CAN_RX1_IRQHANDLER 37 /* CAN RX1 Interrupt */ +#define CAN_SCE_IRQHANDLER 38 /* CAN SCE Interrupt */ +#define EXTI9_5_IRQHANDLER 39 /* External Line[9:5] Interrupts */ +#define TIM1_BRK_IRQHANDLER 40 /* TIM1 Break Interrupt */ +#define TIM1_UP_IRQHANDLER 41 /* TIM1 Update Interrupt */ +#define TIM1_TRG_COM_IRQHANDLER 42 /* TIM1 Trigger and Commutation Interrupt */ +#define TIM1_CC_IRQHANDLER 43 /* TIM1 Capture Compare Interrupt */ +#define TIM2_IRQHANDLER 44 /* TIM2 global Interrupt */ +#define TIM3_IRQHANDLER 45 /* TIM3 global Interrupt */ +#define TIM4_IRQHANDLER 46 /* TIM4 global Interrupt */ +#define I2C1_EV_IRQHANDLER 47 /* I2C1 Event Interrupt */ +#define I2C1_ER_IRQHANDLER 48 /* I2C1 Error Interrupt */ +#define I2C2_EV_IRQHANDLER 49 /* I2C2 Event Interrupt */ +#define I2C2_ER_IRQHANDLER 50 /* I2C2 Error Interrupt */ +#define SPI1_IRQHANDLER 51 /* SPI1 global Interrupt */ +#define SPI2_IRQHANDLER 52 /* SPI2 global Interrupt */ +#define USART1_IRQHANDLER 53 /* USART1 global Interrupt */ +#define USART2_IRQHANDLER 54 /* USART2 global Interrupt */ +#define USART3_IRQHANDLER 55 /* USART3 global Interrupt */ +#define EXTI15_10_IRQHANDLER 56 /* External Line[15:10] Interrupts */ +#define RTCALARM_IRQHANDLER 57 /* RTC Alarm through EXTI Line Interrupt */ +#define USBWAKEUP_IRQHANDLER 58 /* USB WakeUp from suspend through EXTI Line Interrupt */ +/*\}*/ + +#define NUM_INTERRUPTS 66 + +#endif /* STM32_INTS_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32_memmap.h b/bertos/cpu/cortex-m3/io/stm32_memmap.h new file mode 100644 index 0000000..b8317ca --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32_memmap.h @@ -0,0 +1,144 @@ +/** + * \file + * + * + * \brief STM32 memory map. + */ + +#ifndef STM32_MEMMAP_H +#define STM32_MEMMAP_H + +/* Peripheral and SRAM base address in the alias region */ +#define PERIPH_BB_BASE (0x42000000) +#define SRAM_BB_BASE (0x22000000) + +/* Peripheral and SRAM base address in the bit-band region */ +#define SRAM_BASE (0x20000000) +#define PERIPH_BASE (0x40000000) + +/* Flash refisters base address */ +#define FLASH_BASE (0x40022000) +/* Flash Option Bytes base address */ +#define OB_BASE (0x1FFFF800) + +/* Peripheral memory map */ +#define APB1PERIPH_BASE (PERIPH_BASE) +#define APB2PERIPH_BASE (PERIPH_BASE + 0x10000) +#define AHBPERIPH_BASE (PERIPH_BASE + 0x20000) + +#define TIM2_BASE (APB1PERIPH_BASE + 0x0000) +#define TIM3_BASE (APB1PERIPH_BASE + 0x0400) +#define TIM4_BASE (APB1PERIPH_BASE + 0x0800) +#define TIM5_BASE (APB1PERIPH_BASE + 0x0C00) +#define TIM6_BASE (APB1PERIPH_BASE + 0x1000) +#define TIM7_BASE (APB1PERIPH_BASE + 0x1400) +#define RTC_BASE (APB1PERIPH_BASE + 0x2800) +#define WWDG_BASE (APB1PERIPH_BASE + 0x2C00) +#define IWDG_BASE (APB1PERIPH_BASE + 0x3000) +#define SPI2_BASE (APB1PERIPH_BASE + 0x3800) +#define SPI3_BASE (APB1PERIPH_BASE + 0x3C00) +#define USART2_BASE (APB1PERIPH_BASE + 0x4400) +#define USART3_BASE (APB1PERIPH_BASE + 0x4800) +#define UART4_BASE (APB1PERIPH_BASE + 0x4C00) +#define UART5_BASE (APB1PERIPH_BASE + 0x5000) +#define I2C1_BASE (APB1PERIPH_BASE + 0x5400) +#define I2C2_BASE (APB1PERIPH_BASE + 0x5800) +#define CAN1_BASE (APB1PERIPH_BASE + 0x6400) +#define CAN2_BASE (APB1PERIPH_BASE + 0x6800) +#define BKP_BASE (APB1PERIPH_BASE + 0x6C00) +#define PWR_BASE (APB1PERIPH_BASE + 0x7000) +#define DAC_BASE (APB1PERIPH_BASE + 0x7400) +#define CEC_BASE (APB1PERIPH_BASE + 0x7800) + +#define AFIO_BASE (APB2PERIPH_BASE + 0x0000) +#define EXTI_BASE (APB2PERIPH_BASE + 0x0400) +#define GPIOA_BASE (APB2PERIPH_BASE + 0x0800) +#define GPIOB_BASE (APB2PERIPH_BASE + 0x0C00) +#define GPIOC_BASE (APB2PERIPH_BASE + 0x1000) +#define GPIOD_BASE (APB2PERIPH_BASE + 0x1400) +#define GPIOE_BASE (APB2PERIPH_BASE + 0x1800) +#define GPIOF_BASE (APB2PERIPH_BASE + 0x1C00) +#define GPIOG_BASE (APB2PERIPH_BASE + 0x2000) +#define ADC1_BASE (APB2PERIPH_BASE + 0x2400) +#define ADC2_BASE (APB2PERIPH_BASE + 0x2800) +#define TIM1_BASE (APB2PERIPH_BASE + 0x2C00) +#define SPI1_BASE (APB2PERIPH_BASE + 0x3000) +#define TIM8_BASE (APB2PERIPH_BASE + 0x3400) +#define USART1_BASE (APB2PERIPH_BASE + 0x3800) +#define ADC3_BASE (APB2PERIPH_BASE + 0x3C00) +#define TIM15_BASE (APB2PERIPH_BASE + 0x4000) +#define TIM16_BASE (APB2PERIPH_BASE + 0x4400) +#define TIM17_BASE (APB2PERIPH_BASE + 0x4800) + +#define SDIO_BASE (PERIPH_BASE + 0x18000) + + +#define DMA1_BASE (AHBPERIPH_BASE + 0X0000) +#define DMA1_CHANNEL1_BASE (AHBPERIPH_BASE + 0X0008) +#define DMA1_CHANNEL2_BASE (AHBPERIPH_BASE + 0X001C) +#define DMA1_CHANNEL3_BASE (AHBPERIPH_BASE + 0X0030) +#define DMA1_CHANNEL4_BASE (AHBPERIPH_BASE + 0X0044) +#define DMA1_CHANNEL5_BASE (AHBPERIPH_BASE + 0X0058) +#define DMA1_CHANNEL6_BASE (AHBPERIPH_BASE + 0X006C) +#define DMA1_CHANNEL7_BASE (AHBPERIPH_BASE + 0X0080) +#define DMA2_BASE (AHBPERIPH_BASE + 0X0400) +#define DMA2_CHANNEL1_BASE (AHBPERIPH_BASE + 0X0408) +#define DMA2_CHANNEL2_BASE (AHBPERIPH_BASE + 0X041C) +#define DMA2_CHANNEL3_BASE (AHBPERIPH_BASE + 0X0430) +#define DMA2_CHANNEL4_BASE (AHBPERIPH_BASE + 0X0444) +#define DMA2_CHANNEL5_BASE (AHBPERIPH_BASE + 0X0458) +#define RCC_BASE (AHBPERIPH_BASE + 0X1000) +#define CRC_BASE (AHBPERIPH_BASE + 0X3000) + +#define FLASH_R_BASE (AHBPERIPH_BASE + 0x2000) ///< Flash registers base address + +#define ETH_BASE (AHBPERIPH_BASE + 0x8000) +#define ETH_MAC_BASE (ETH_BASE) +#define ETH_MMC_BASE (ETH_BASE + 0x0100) +#define ETH_PTP_BASE (ETH_BASE + 0x0700) +#define ETH_DMA_BASE (ETH_BASE + 0x1000) + +#define FSMC_BANK1_R_BASE (FSMC_R_BASE + 0x0000) ///< FSMC Bank1 registers base address +#define FSMC_BANK1E_R_BASE (FSMC_R_BASE + 0x0104) ///< FSMC Bank1E registers base address +#define FSMC_BANK2_R_BASE (FSMC_R_BASE + 0x0060) ///< FSMC Bank2 registers base address +#define FSMC_BANK3_R_BASE (FSMC_R_BASE + 0x0080) ///< FSMC Bank3 registers base address +#define FSMC_BANK4_R_BASE (FSMC_R_BASE + 0x00A0) ///< FSMC Bank4 registers base address + +#define DBGMCU_BASE ((uint32_t)0xE0042000) ///< Debug MCU registers base address + +/* System Control Space memory map */ +#define SCS_BASE (0xE000E000) + +#define SYSTICK_BASE (SCS_BASE + 0x0010) +#define NVIC_BASE (SCS_BASE + 0x0100) +#define SCB_BASE (SCS_BASE + 0x0D00) + +#endif /* STM32_MEMMAP_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32_nvic.h b/bertos/cpu/cortex-m3/io/stm32_nvic.h new file mode 100644 index 0000000..9a209f3 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32_nvic.h @@ -0,0 +1,1111 @@ +/** + * \file + * + * + * \brief NVIC STM32F10xx registers definition. + */ + +#ifndef STM32_NVIC_H +#define STM32_NVIC_H + + +/** + * The following are defines for the fault assignments. + */ +/*\{*/ +#define FAULT_NMI 2 ///< NMI fault +#define FAULT_HARD 3 ///< Hard fault +#define FAULT_MPU 4 ///< MPU fault +#define FAULT_BUS 5 ///< Bus fault +#define FAULT_USAGE 6 ///< Usage fault +#define FAULT_SVCALL 11 ///< SVCall +#define FAULT_DEBUG 12 ///< Debug monitor +#define FAULT_PENDSV 14 ///< PendSV +#define FAULT_SYSTICK 15 ///< System Tick +/*\}*/ + +/** + * NVIC registers (NVIC) + */ +/*\{*/ +#define NVIC_INT_TYPE_R (*((reg32_t *)0xE000E004)) +#define NVIC_ST_CTRL_R (*((reg32_t *)0xE000E010)) +#define NVIC_ST_RELOAD_R (*((reg32_t *)0xE000E014)) +#define NVIC_ST_CURRENT_R (*((reg32_t *)0xE000E018)) +#define NVIC_ST_CAL_R (*((reg32_t *)0xE000E01C)) +#define NVIC_EN0_R (*((reg32_t *)0xE000E100)) +#define NVIC_EN1_R (*((reg32_t *)0xE000E104)) +#define NVIC_DIS0_R (*((reg32_t *)0xE000E180)) +#define NVIC_DIS1_R (*((reg32_t *)0xE000E184)) +#define NVIC_PEND0_R (*((reg32_t *)0xE000E200)) +#define NVIC_PEND1_R (*((reg32_t *)0xE000E204)) +#define NVIC_UNPEND0_R (*((reg32_t *)0xE000E280)) +#define NVIC_UNPEND1_R (*((reg32_t *)0xE000E284)) +#define NVIC_ACTIVE0_R (*((reg32_t *)0xE000E300)) +#define NVIC_ACTIVE1_R (*((reg32_t *)0xE000E304)) +#define NVIC_PRI0_R (*((reg32_t *)0xE000E400)) +#define NVIC_PRI1_R (*((reg32_t *)0xE000E404)) +#define NVIC_PRI2_R (*((reg32_t *)0xE000E408)) +#define NVIC_PRI3_R (*((reg32_t *)0xE000E40C)) +#define NVIC_PRI4_R (*((reg32_t *)0xE000E410)) +#define NVIC_PRI5_R (*((reg32_t *)0xE000E414)) +#define NVIC_PRI6_R (*((reg32_t *)0xE000E418)) +#define NVIC_PRI7_R (*((reg32_t *)0xE000E41C)) +#define NVIC_PRI8_R (*((reg32_t *)0xE000E420)) +#define NVIC_PRI9_R (*((reg32_t *)0xE000E424)) +#define NVIC_PRI10_R (*((reg32_t *)0xE000E428)) +#define NVIC_CPUID_R (*((reg32_t *)0xE000ED00)) +#define NVIC_INT_CTRL_R (*((reg32_t *)0xE000ED04)) +#define NVIC_VTABLE_R (*((reg32_t *)0xE000ED08)) +#define NVIC_APINT_R (*((reg32_t *)0xE000ED0C)) +#define NVIC_SYS_CTRL_R (*((reg32_t *)0xE000ED10)) +#define NVIC_CFG_CTRL_R (*((reg32_t *)0xE000ED14)) +#define NVIC_SYS_PRI1_R (*((reg32_t *)0xE000ED18)) +#define NVIC_SYS_PRI2_R (*((reg32_t *)0xE000ED1C)) +#define NVIC_SYS_PRI3_R (*((reg32_t *)0xE000ED20)) +#define NVIC_SYS_HND_CTRL_R (*((reg32_t *)0xE000ED24)) +#define NVIC_FAULT_STAT_R (*((reg32_t *)0xE000ED28)) +#define NVIC_HFAULT_STAT_R (*((reg32_t *)0xE000ED2C)) +#define NVIC_DEBUG_STAT_R (*((reg32_t *)0xE000ED30)) +#define NVIC_MM_ADDR_R (*((reg32_t *)0xE000ED34)) +#define NVIC_FAULT_ADDR_R (*((reg32_t *)0xE000ED38)) +#define NVIC_MPU_TYPE_R (*((reg32_t *)0xE000ED90)) +#define NVIC_MPU_CTRL_R (*((reg32_t *)0xE000ED94)) +#define NVIC_MPU_NUMBER_R (*((reg32_t *)0xE000ED98)) +#define NVIC_MPU_BASE_R (*((reg32_t *)0xE000ED9C)) +#define NVIC_MPU_ATTR_R (*((reg32_t *)0xE000EDA0)) +#define NVIC_DBG_CTRL_R (*((reg32_t *)0xE000EDF0)) +#define NVIC_DBG_XFER_R (*((reg32_t *)0xE000EDF4)) +#define NVIC_DBG_DATA_R (*((reg32_t *)0xE000EDF8)) +#define NVIC_DBG_INT_R (*((reg32_t *)0xE000EDFC)) +#define NVIC_SW_TRIG_R (*((reg32_t *)0xE000EF00)) +/*\}*/ + +/** + * The following are defines for the NVIC register addresses. + */ +/*\{*/ +#define NVIC_INT_TYPE 0xE000E004 ///< Interrupt Controller Type Reg +#define NVIC_ST_CTRL 0xE000E010 ///< SysTick Control and Status Reg +#define NVIC_ST_RELOAD 0xE000E014 ///< SysTick Reload Value Register +#define NVIC_ST_CURRENT 0xE000E018 ///< SysTick Current Value Register +#define NVIC_ST_CAL 0xE000E01C ///< SysTick Calibration Value Reg +#define NVIC_EN0 0xE000E100 ///< IRQ 0 to 31 Set Enable Register +#define NVIC_EN1 0xE000E104 ///< IRQ 32 to 63 Set Enable Register +#define NVIC_DIS0 0xE000E180 ///< IRQ 0 to 31 Clear Enable Reg +#define NVIC_DIS1 0xE000E184 ///< IRQ 32 to 63 Clear Enable Reg +#define NVIC_PEND0 0xE000E200 ///< IRQ 0 to 31 Set Pending Register +#define NVIC_PEND1 0xE000E204 ///< IRQ 32 to 63 Set Pending Reg +#define NVIC_UNPEND0 0xE000E280 ///< IRQ 0 to 31 Clear Pending Reg +#define NVIC_UNPEND1 0xE000E284 ///< IRQ 32 to 63 Clear Pending Reg +#define NVIC_ACTIVE0 0xE000E300 ///< IRQ 0 to 31 Active Register +#define NVIC_ACTIVE1 0xE000E304 ///< IRQ 32 to 63 Active Register +#define NVIC_PRI0 0xE000E400 ///< IRQ 0 to 3 Priority Register +#define NVIC_PRI1 0xE000E404 ///< IRQ 4 to 7 Priority Register +#define NVIC_PRI2 0xE000E408 ///< IRQ 8 to 11 Priority Register +#define NVIC_PRI3 0xE000E40C ///< IRQ 12 to 15 Priority Register +#define NVIC_PRI4 0xE000E410 ///< IRQ 16 to 19 Priority Register +#define NVIC_PRI5 0xE000E414 ///< IRQ 20 to 23 Priority Register +#define NVIC_PRI6 0xE000E418 ///< IRQ 24 to 27 Priority Register +#define NVIC_PRI7 0xE000E41C ///< IRQ 28 to 31 Priority Register +#define NVIC_PRI8 0xE000E420 ///< IRQ 32 to 35 Priority Register +#define NVIC_PRI9 0xE000E424 ///< IRQ 36 to 39 Priority Register +#define NVIC_PRI10 0xE000E428 ///< IRQ 40 to 43 Priority Register +#define NVIC_PRI11 0xE000E42C ///< IRQ 44 to 47 Priority Register +#define NVIC_PRI12 0xE000E430 ///< IRQ 48 to 51 Priority Register +#define NVIC_PRI13 0xE000E434 ///< IRQ 52 to 55 Priority Register +#define NVIC_CPUID 0xE000ED00 ///< CPUID Base Register +#define NVIC_INT_CTRL 0xE000ED04 ///< Interrupt Control State Register +#define NVIC_VTABLE 0xE000ED08 ///< Vector Table Offset Register +#define NVIC_APINT 0xE000ED0C ///< App. Int & Reset Control Reg +#define NVIC_SYS_CTRL 0xE000ED10 ///< System Control Register +#define NVIC_CFG_CTRL 0xE000ED14 ///< Configuration Control Register +#define NVIC_SYS_PRI1 0xE000ED18 ///< Sys. Handlers 4 to 7 Priority +#define NVIC_SYS_PRI2 0xE000ED1C ///< Sys. Handlers 8 to 11 Priority +#define NVIC_SYS_PRI3 0xE000ED20 ///< Sys. Handlers 12 to 15 Priority +#define NVIC_SYS_HND_CTRL 0xE000ED24 ///< System Handler Control and State +#define NVIC_FAULT_STAT 0xE000ED28 ///< Configurable Fault Status Reg +#define NVIC_HFAULT_STAT 0xE000ED2C ///< Hard Fault Status Register +#define NVIC_DEBUG_STAT 0xE000ED30 ///< Debug Status Register +#define NVIC_MM_ADDR 0xE000ED34 ///< Mem Manage Address Register +#define NVIC_FAULT_ADDR 0xE000ED38 ///< Bus Fault Address Register +#define NVIC_MPU_TYPE 0xE000ED90 ///< MPU Type Register +#define NVIC_MPU_CTRL 0xE000ED94 ///< MPU Control Register +#define NVIC_MPU_NUMBER 0xE000ED98 ///< MPU Region Number Register +#define NVIC_MPU_BASE 0xE000ED9C ///< MPU Region Base Address Register +#define NVIC_MPU_ATTR 0xE000EDA0 ///< MPU Region Attribute & Size Reg +#define NVIC_DBG_CTRL 0xE000EDF0 ///< Debug Control and Status Reg +#define NVIC_DBG_XFER 0xE000EDF4 ///< Debug Core Reg. Transfer Select +#define NVIC_DBG_DATA 0xE000EDF8 ///< Debug Core Register Data +#define NVIC_DBG_INT 0xE000EDFC ///< Debug Reset Interrupt Control +#define NVIC_SW_TRIG 0xE000EF00 ///< Software Trigger Interrupt Reg +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_TYPE register. + */ +/*\{*/ +#define NVIC_INT_TYPE_LINES_M 0x0000001F ///< Number of interrupt lines (x32) +#define NVIC_INT_TYPE_LINES_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CTRL register. + */ +/*\{*/ +#define NVIC_ST_CTRL_COUNT 0x00010000 ///< Count flag +#define NVIC_ST_CTRL_CLK_SRC 0x00000004 ///< Clock Source +#define NVIC_ST_CTRL_INTEN 0x00000002 ///< Interrupt enable +#define NVIC_ST_CTRL_ENABLE 0x00000001 ///< Counter mode +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_RELOAD register. + */ +/*\{*/ +#define NVIC_ST_RELOAD_M 0x00FFFFFF ///< Counter load value +#define NVIC_ST_RELOAD_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CURRENT +* register. + */ +/*\{*/ +#define NVIC_ST_CURRENT_M 0x00FFFFFF ///< Counter current value +#define NVIC_ST_CURRENT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ST_CAL register. + */ +/*\{*/ +#define NVIC_ST_CAL_NOREF 0x80000000 ///< No reference clock +#define NVIC_ST_CAL_SKEW 0x40000000 ///< Clock skew +#define NVIC_ST_CAL_ONEMS_M 0x00FFFFFF ///< 1ms reference value +#define NVIC_ST_CAL_ONEMS_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN0 register. + */ +/*\{*/ +#define NVIC_EN0_INT31 0x80000000 ///< Interrupt 31 enable +#define NVIC_EN0_INT30 0x40000000 ///< Interrupt 30 enable +#define NVIC_EN0_INT29 0x20000000 ///< Interrupt 29 enable +#define NVIC_EN0_INT28 0x10000000 ///< Interrupt 28 enable +#define NVIC_EN0_INT27 0x08000000 ///< Interrupt 27 enable +#define NVIC_EN0_INT26 0x04000000 ///< Interrupt 26 enable +#define NVIC_EN0_INT25 0x02000000 ///< Interrupt 25 enable +#define NVIC_EN0_INT24 0x01000000 ///< Interrupt 24 enable +#define NVIC_EN0_INT23 0x00800000 ///< Interrupt 23 enable +#define NVIC_EN0_INT22 0x00400000 ///< Interrupt 22 enable +#define NVIC_EN0_INT21 0x00200000 ///< Interrupt 21 enable +#define NVIC_EN0_INT20 0x00100000 ///< Interrupt 20 enable +#define NVIC_EN0_INT19 0x00080000 ///< Interrupt 19 enable +#define NVIC_EN0_INT18 0x00040000 ///< Interrupt 18 enable +#define NVIC_EN0_INT17 0x00020000 ///< Interrupt 17 enable +#define NVIC_EN0_INT16 0x00010000 ///< Interrupt 16 enable +#define NVIC_EN0_INT15 0x00008000 ///< Interrupt 15 enable +#define NVIC_EN0_INT14 0x00004000 ///< Interrupt 14 enable +#define NVIC_EN0_INT13 0x00002000 ///< Interrupt 13 enable +#define NVIC_EN0_INT12 0x00001000 ///< Interrupt 12 enable +#define NVIC_EN0_INT11 0x00000800 ///< Interrupt 11 enable +#define NVIC_EN0_INT10 0x00000400 ///< Interrupt 10 enable +#define NVIC_EN0_INT9 0x00000200 ///< Interrupt 9 enable +#define NVIC_EN0_INT8 0x00000100 ///< Interrupt 8 enable +#define NVIC_EN0_INT7 0x00000080 ///< Interrupt 7 enable +#define NVIC_EN0_INT6 0x00000040 ///< Interrupt 6 enable +#define NVIC_EN0_INT5 0x00000020 ///< Interrupt 5 enable +#define NVIC_EN0_INT4 0x00000010 ///< Interrupt 4 enable +#define NVIC_EN0_INT3 0x00000008 ///< Interrupt 3 enable +#define NVIC_EN0_INT2 0x00000004 ///< Interrupt 2 enable +#define NVIC_EN0_INT1 0x00000002 ///< Interrupt 1 enable +#define NVIC_EN0_INT0 0x00000001 ///< Interrupt 0 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_EN1 register. + */ +/*\{*/ +#define NVIC_EN1_INT59 0x08000000 ///< Interrupt 59 enable +#define NVIC_EN1_INT58 0x04000000 ///< Interrupt 58 enable +#define NVIC_EN1_INT57 0x02000000 ///< Interrupt 57 enable +#define NVIC_EN1_INT56 0x01000000 ///< Interrupt 56 enable +#define NVIC_EN1_INT55 0x00800000 ///< Interrupt 55 enable +#define NVIC_EN1_INT54 0x00400000 ///< Interrupt 54 enable +#define NVIC_EN1_INT53 0x00200000 ///< Interrupt 53 enable +#define NVIC_EN1_INT52 0x00100000 ///< Interrupt 52 enable +#define NVIC_EN1_INT51 0x00080000 ///< Interrupt 51 enable +#define NVIC_EN1_INT50 0x00040000 ///< Interrupt 50 enable +#define NVIC_EN1_INT49 0x00020000 ///< Interrupt 49 enable +#define NVIC_EN1_INT48 0x00010000 ///< Interrupt 48 enable +#define NVIC_EN1_INT47 0x00008000 ///< Interrupt 47 enable +#define NVIC_EN1_INT46 0x00004000 ///< Interrupt 46 enable +#define NVIC_EN1_INT45 0x00002000 ///< Interrupt 45 enable +#define NVIC_EN1_INT44 0x00001000 ///< Interrupt 44 enable +#define NVIC_EN1_INT43 0x00000800 ///< Interrupt 43 enable +#define NVIC_EN1_INT42 0x00000400 ///< Interrupt 42 enable +#define NVIC_EN1_INT41 0x00000200 ///< Interrupt 41 enable +#define NVIC_EN1_INT40 0x00000100 ///< Interrupt 40 enable +#define NVIC_EN1_INT39 0x00000080 ///< Interrupt 39 enable +#define NVIC_EN1_INT38 0x00000040 ///< Interrupt 38 enable +#define NVIC_EN1_INT37 0x00000020 ///< Interrupt 37 enable +#define NVIC_EN1_INT36 0x00000010 ///< Interrupt 36 enable +#define NVIC_EN1_INT35 0x00000008 ///< Interrupt 35 enable +#define NVIC_EN1_INT34 0x00000004 ///< Interrupt 34 enable +#define NVIC_EN1_INT33 0x00000002 ///< Interrupt 33 enable +#define NVIC_EN1_INT32 0x00000001 ///< Interrupt 32 enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS0 register. + */ +/*\{*/ +#define NVIC_DIS0_INT31 0x80000000 ///< Interrupt 31 disable +#define NVIC_DIS0_INT30 0x40000000 ///< Interrupt 30 disable +#define NVIC_DIS0_INT29 0x20000000 ///< Interrupt 29 disable +#define NVIC_DIS0_INT28 0x10000000 ///< Interrupt 28 disable +#define NVIC_DIS0_INT27 0x08000000 ///< Interrupt 27 disable +#define NVIC_DIS0_INT26 0x04000000 ///< Interrupt 26 disable +#define NVIC_DIS0_INT25 0x02000000 ///< Interrupt 25 disable +#define NVIC_DIS0_INT24 0x01000000 ///< Interrupt 24 disable +#define NVIC_DIS0_INT23 0x00800000 ///< Interrupt 23 disable +#define NVIC_DIS0_INT22 0x00400000 ///< Interrupt 22 disable +#define NVIC_DIS0_INT21 0x00200000 ///< Interrupt 21 disable +#define NVIC_DIS0_INT20 0x00100000 ///< Interrupt 20 disable +#define NVIC_DIS0_INT19 0x00080000 ///< Interrupt 19 disable +#define NVIC_DIS0_INT18 0x00040000 ///< Interrupt 18 disable +#define NVIC_DIS0_INT17 0x00020000 ///< Interrupt 17 disable +#define NVIC_DIS0_INT16 0x00010000 ///< Interrupt 16 disable +#define NVIC_DIS0_INT15 0x00008000 ///< Interrupt 15 disable +#define NVIC_DIS0_INT14 0x00004000 ///< Interrupt 14 disable +#define NVIC_DIS0_INT13 0x00002000 ///< Interrupt 13 disable +#define NVIC_DIS0_INT12 0x00001000 ///< Interrupt 12 disable +#define NVIC_DIS0_INT11 0x00000800 ///< Interrupt 11 disable +#define NVIC_DIS0_INT10 0x00000400 ///< Interrupt 10 disable +#define NVIC_DIS0_INT9 0x00000200 ///< Interrupt 9 disable +#define NVIC_DIS0_INT8 0x00000100 ///< Interrupt 8 disable +#define NVIC_DIS0_INT7 0x00000080 ///< Interrupt 7 disable +#define NVIC_DIS0_INT6 0x00000040 ///< Interrupt 6 disable +#define NVIC_DIS0_INT5 0x00000020 ///< Interrupt 5 disable +#define NVIC_DIS0_INT4 0x00000010 ///< Interrupt 4 disable +#define NVIC_DIS0_INT3 0x00000008 ///< Interrupt 3 disable +#define NVIC_DIS0_INT2 0x00000004 ///< Interrupt 2 disable +#define NVIC_DIS0_INT1 0x00000002 ///< Interrupt 1 disable +#define NVIC_DIS0_INT0 0x00000001 ///< Interrupt 0 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DIS1 register. + */ +/*\{*/ +#define NVIC_DIS1_INT59 0x08000000 ///< Interrupt 59 disable +#define NVIC_DIS1_INT58 0x04000000 ///< Interrupt 58 disable +#define NVIC_DIS1_INT57 0x02000000 ///< Interrupt 57 disable +#define NVIC_DIS1_INT56 0x01000000 ///< Interrupt 56 disable +#define NVIC_DIS1_INT55 0x00800000 ///< Interrupt 55 disable +#define NVIC_DIS1_INT54 0x00400000 ///< Interrupt 54 disable +#define NVIC_DIS1_INT53 0x00200000 ///< Interrupt 53 disable +#define NVIC_DIS1_INT52 0x00100000 ///< Interrupt 52 disable +#define NVIC_DIS1_INT51 0x00080000 ///< Interrupt 51 disable +#define NVIC_DIS1_INT50 0x00040000 ///< Interrupt 50 disable +#define NVIC_DIS1_INT49 0x00020000 ///< Interrupt 49 disable +#define NVIC_DIS1_INT48 0x00010000 ///< Interrupt 48 disable +#define NVIC_DIS1_INT47 0x00008000 ///< Interrupt 47 disable +#define NVIC_DIS1_INT46 0x00004000 ///< Interrupt 46 disable +#define NVIC_DIS1_INT45 0x00002000 ///< Interrupt 45 disable +#define NVIC_DIS1_INT44 0x00001000 ///< Interrupt 44 disable +#define NVIC_DIS1_INT43 0x00000800 ///< Interrupt 43 disable +#define NVIC_DIS1_INT42 0x00000400 ///< Interrupt 42 disable +#define NVIC_DIS1_INT41 0x00000200 ///< Interrupt 41 disable +#define NVIC_DIS1_INT40 0x00000100 ///< Interrupt 40 disable +#define NVIC_DIS1_INT39 0x00000080 ///< Interrupt 39 disable +#define NVIC_DIS1_INT38 0x00000040 ///< Interrupt 38 disable +#define NVIC_DIS1_INT37 0x00000020 ///< Interrupt 37 disable +#define NVIC_DIS1_INT36 0x00000010 ///< Interrupt 36 disable +#define NVIC_DIS1_INT35 0x00000008 ///< Interrupt 35 disable +#define NVIC_DIS1_INT34 0x00000004 ///< Interrupt 34 disable +#define NVIC_DIS1_INT33 0x00000002 ///< Interrupt 33 disable +#define NVIC_DIS1_INT32 0x00000001 ///< Interrupt 32 disable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND0 register. + */ +/*\{*/ +#define NVIC_PEND0_INT31 0x80000000 ///< Interrupt 31 pend +#define NVIC_PEND0_INT30 0x40000000 ///< Interrupt 30 pend +#define NVIC_PEND0_INT29 0x20000000 ///< Interrupt 29 pend +#define NVIC_PEND0_INT28 0x10000000 ///< Interrupt 28 pend +#define NVIC_PEND0_INT27 0x08000000 ///< Interrupt 27 pend +#define NVIC_PEND0_INT26 0x04000000 ///< Interrupt 26 pend +#define NVIC_PEND0_INT25 0x02000000 ///< Interrupt 25 pend +#define NVIC_PEND0_INT24 0x01000000 ///< Interrupt 24 pend +#define NVIC_PEND0_INT23 0x00800000 ///< Interrupt 23 pend +#define NVIC_PEND0_INT22 0x00400000 ///< Interrupt 22 pend +#define NVIC_PEND0_INT21 0x00200000 ///< Interrupt 21 pend +#define NVIC_PEND0_INT20 0x00100000 ///< Interrupt 20 pend +#define NVIC_PEND0_INT19 0x00080000 ///< Interrupt 19 pend +#define NVIC_PEND0_INT18 0x00040000 ///< Interrupt 18 pend +#define NVIC_PEND0_INT17 0x00020000 ///< Interrupt 17 pend +#define NVIC_PEND0_INT16 0x00010000 ///< Interrupt 16 pend +#define NVIC_PEND0_INT15 0x00008000 ///< Interrupt 15 pend +#define NVIC_PEND0_INT14 0x00004000 ///< Interrupt 14 pend +#define NVIC_PEND0_INT13 0x00002000 ///< Interrupt 13 pend +#define NVIC_PEND0_INT12 0x00001000 ///< Interrupt 12 pend +#define NVIC_PEND0_INT11 0x00000800 ///< Interrupt 11 pend +#define NVIC_PEND0_INT10 0x00000400 ///< Interrupt 10 pend +#define NVIC_PEND0_INT9 0x00000200 ///< Interrupt 9 pend +#define NVIC_PEND0_INT8 0x00000100 ///< Interrupt 8 pend +#define NVIC_PEND0_INT7 0x00000080 ///< Interrupt 7 pend +#define NVIC_PEND0_INT6 0x00000040 ///< Interrupt 6 pend +#define NVIC_PEND0_INT5 0x00000020 ///< Interrupt 5 pend +#define NVIC_PEND0_INT4 0x00000010 ///< Interrupt 4 pend +#define NVIC_PEND0_INT3 0x00000008 ///< Interrupt 3 pend +#define NVIC_PEND0_INT2 0x00000004 ///< Interrupt 2 pend +#define NVIC_PEND0_INT1 0x00000002 ///< Interrupt 1 pend +#define NVIC_PEND0_INT0 0x00000001 ///< Interrupt 0 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PEND1 register. + */ +/*\{*/ +#define NVIC_PEND1_INT59 0x08000000 ///< Interrupt 59 pend +#define NVIC_PEND1_INT58 0x04000000 ///< Interrupt 58 pend +#define NVIC_PEND1_INT57 0x02000000 ///< Interrupt 57 pend +#define NVIC_PEND1_INT56 0x01000000 ///< Interrupt 56 pend +#define NVIC_PEND1_INT55 0x00800000 ///< Interrupt 55 pend +#define NVIC_PEND1_INT54 0x00400000 ///< Interrupt 54 pend +#define NVIC_PEND1_INT53 0x00200000 ///< Interrupt 53 pend +#define NVIC_PEND1_INT52 0x00100000 ///< Interrupt 52 pend +#define NVIC_PEND1_INT51 0x00080000 ///< Interrupt 51 pend +#define NVIC_PEND1_INT50 0x00040000 ///< Interrupt 50 pend +#define NVIC_PEND1_INT49 0x00020000 ///< Interrupt 49 pend +#define NVIC_PEND1_INT48 0x00010000 ///< Interrupt 48 pend +#define NVIC_PEND1_INT47 0x00008000 ///< Interrupt 47 pend +#define NVIC_PEND1_INT46 0x00004000 ///< Interrupt 46 pend +#define NVIC_PEND1_INT45 0x00002000 ///< Interrupt 45 pend +#define NVIC_PEND1_INT44 0x00001000 ///< Interrupt 44 pend +#define NVIC_PEND1_INT43 0x00000800 ///< Interrupt 43 pend +#define NVIC_PEND1_INT42 0x00000400 ///< Interrupt 42 pend +#define NVIC_PEND1_INT41 0x00000200 ///< Interrupt 41 pend +#define NVIC_PEND1_INT40 0x00000100 ///< Interrupt 40 pend +#define NVIC_PEND1_INT39 0x00000080 ///< Interrupt 39 pend +#define NVIC_PEND1_INT38 0x00000040 ///< Interrupt 38 pend +#define NVIC_PEND1_INT37 0x00000020 ///< Interrupt 37 pend +#define NVIC_PEND1_INT36 0x00000010 ///< Interrupt 36 pend +#define NVIC_PEND1_INT35 0x00000008 ///< Interrupt 35 pend +#define NVIC_PEND1_INT34 0x00000004 ///< Interrupt 34 pend +#define NVIC_PEND1_INT33 0x00000002 ///< Interrupt 33 pend +#define NVIC_PEND1_INT32 0x00000001 ///< Interrupt 32 pend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND0 register. + */ +/*\{*/ +#define NVIC_UNPEND0_INT31 0x80000000 ///< Interrupt 31 unpend +#define NVIC_UNPEND0_INT30 0x40000000 ///< Interrupt 30 unpend +#define NVIC_UNPEND0_INT29 0x20000000 ///< Interrupt 29 unpend +#define NVIC_UNPEND0_INT28 0x10000000 ///< Interrupt 28 unpend +#define NVIC_UNPEND0_INT27 0x08000000 ///< Interrupt 27 unpend +#define NVIC_UNPEND0_INT26 0x04000000 ///< Interrupt 26 unpend +#define NVIC_UNPEND0_INT25 0x02000000 ///< Interrupt 25 unpend +#define NVIC_UNPEND0_INT24 0x01000000 ///< Interrupt 24 unpend +#define NVIC_UNPEND0_INT23 0x00800000 ///< Interrupt 23 unpend +#define NVIC_UNPEND0_INT22 0x00400000 ///< Interrupt 22 unpend +#define NVIC_UNPEND0_INT21 0x00200000 ///< Interrupt 21 unpend +#define NVIC_UNPEND0_INT20 0x00100000 ///< Interrupt 20 unpend +#define NVIC_UNPEND0_INT19 0x00080000 ///< Interrupt 19 unpend +#define NVIC_UNPEND0_INT18 0x00040000 ///< Interrupt 18 unpend +#define NVIC_UNPEND0_INT17 0x00020000 ///< Interrupt 17 unpend +#define NVIC_UNPEND0_INT16 0x00010000 ///< Interrupt 16 unpend +#define NVIC_UNPEND0_INT15 0x00008000 ///< Interrupt 15 unpend +#define NVIC_UNPEND0_INT14 0x00004000 ///< Interrupt 14 unpend +#define NVIC_UNPEND0_INT13 0x00002000 ///< Interrupt 13 unpend +#define NVIC_UNPEND0_INT12 0x00001000 ///< Interrupt 12 unpend +#define NVIC_UNPEND0_INT11 0x00000800 ///< Interrupt 11 unpend +#define NVIC_UNPEND0_INT10 0x00000400 ///< Interrupt 10 unpend +#define NVIC_UNPEND0_INT9 0x00000200 ///< Interrupt 9 unpend +#define NVIC_UNPEND0_INT8 0x00000100 ///< Interrupt 8 unpend +#define NVIC_UNPEND0_INT7 0x00000080 ///< Interrupt 7 unpend +#define NVIC_UNPEND0_INT6 0x00000040 ///< Interrupt 6 unpend +#define NVIC_UNPEND0_INT5 0x00000020 ///< Interrupt 5 unpend +#define NVIC_UNPEND0_INT4 0x00000010 ///< Interrupt 4 unpend +#define NVIC_UNPEND0_INT3 0x00000008 ///< Interrupt 3 unpend +#define NVIC_UNPEND0_INT2 0x00000004 ///< Interrupt 2 unpend +#define NVIC_UNPEND0_INT1 0x00000002 ///< Interrupt 1 unpend +#define NVIC_UNPEND0_INT0 0x00000001 ///< Interrupt 0 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_UNPEND1 register. + */ +/*\{*/ +#define NVIC_UNPEND1_INT59 0x08000000 ///< Interrupt 59 unpend +#define NVIC_UNPEND1_INT58 0x04000000 ///< Interrupt 58 unpend +#define NVIC_UNPEND1_INT57 0x02000000 ///< Interrupt 57 unpend +#define NVIC_UNPEND1_INT56 0x01000000 ///< Interrupt 56 unpend +#define NVIC_UNPEND1_INT55 0x00800000 ///< Interrupt 55 unpend +#define NVIC_UNPEND1_INT54 0x00400000 ///< Interrupt 54 unpend +#define NVIC_UNPEND1_INT53 0x00200000 ///< Interrupt 53 unpend +#define NVIC_UNPEND1_INT52 0x00100000 ///< Interrupt 52 unpend +#define NVIC_UNPEND1_INT51 0x00080000 ///< Interrupt 51 unpend +#define NVIC_UNPEND1_INT50 0x00040000 ///< Interrupt 50 unpend +#define NVIC_UNPEND1_INT49 0x00020000 ///< Interrupt 49 unpend +#define NVIC_UNPEND1_INT48 0x00010000 ///< Interrupt 48 unpend +#define NVIC_UNPEND1_INT47 0x00008000 ///< Interrupt 47 unpend +#define NVIC_UNPEND1_INT46 0x00004000 ///< Interrupt 46 unpend +#define NVIC_UNPEND1_INT45 0x00002000 ///< Interrupt 45 unpend +#define NVIC_UNPEND1_INT44 0x00001000 ///< Interrupt 44 unpend +#define NVIC_UNPEND1_INT43 0x00000800 ///< Interrupt 43 unpend +#define NVIC_UNPEND1_INT42 0x00000400 ///< Interrupt 42 unpend +#define NVIC_UNPEND1_INT41 0x00000200 ///< Interrupt 41 unpend +#define NVIC_UNPEND1_INT40 0x00000100 ///< Interrupt 40 unpend +#define NVIC_UNPEND1_INT39 0x00000080 ///< Interrupt 39 unpend +#define NVIC_UNPEND1_INT38 0x00000040 ///< Interrupt 38 unpend +#define NVIC_UNPEND1_INT37 0x00000020 ///< Interrupt 37 unpend +#define NVIC_UNPEND1_INT36 0x00000010 ///< Interrupt 36 unpend +#define NVIC_UNPEND1_INT35 0x00000008 ///< Interrupt 35 unpend +#define NVIC_UNPEND1_INT34 0x00000004 ///< Interrupt 34 unpend +#define NVIC_UNPEND1_INT33 0x00000002 ///< Interrupt 33 unpend +#define NVIC_UNPEND1_INT32 0x00000001 ///< Interrupt 32 unpend +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE0 register. + */ +/*\{*/ +#define NVIC_ACTIVE0_INT31 0x80000000 ///< Interrupt 31 active +#define NVIC_ACTIVE0_INT30 0x40000000 ///< Interrupt 30 active +#define NVIC_ACTIVE0_INT29 0x20000000 ///< Interrupt 29 active +#define NVIC_ACTIVE0_INT28 0x10000000 ///< Interrupt 28 active +#define NVIC_ACTIVE0_INT27 0x08000000 ///< Interrupt 27 active +#define NVIC_ACTIVE0_INT26 0x04000000 ///< Interrupt 26 active +#define NVIC_ACTIVE0_INT25 0x02000000 ///< Interrupt 25 active +#define NVIC_ACTIVE0_INT24 0x01000000 ///< Interrupt 24 active +#define NVIC_ACTIVE0_INT23 0x00800000 ///< Interrupt 23 active +#define NVIC_ACTIVE0_INT22 0x00400000 ///< Interrupt 22 active +#define NVIC_ACTIVE0_INT21 0x00200000 ///< Interrupt 21 active +#define NVIC_ACTIVE0_INT20 0x00100000 ///< Interrupt 20 active +#define NVIC_ACTIVE0_INT19 0x00080000 ///< Interrupt 19 active +#define NVIC_ACTIVE0_INT18 0x00040000 ///< Interrupt 18 active +#define NVIC_ACTIVE0_INT17 0x00020000 ///< Interrupt 17 active +#define NVIC_ACTIVE0_INT16 0x00010000 ///< Interrupt 16 active +#define NVIC_ACTIVE0_INT15 0x00008000 ///< Interrupt 15 active +#define NVIC_ACTIVE0_INT14 0x00004000 ///< Interrupt 14 active +#define NVIC_ACTIVE0_INT13 0x00002000 ///< Interrupt 13 active +#define NVIC_ACTIVE0_INT12 0x00001000 ///< Interrupt 12 active +#define NVIC_ACTIVE0_INT11 0x00000800 ///< Interrupt 11 active +#define NVIC_ACTIVE0_INT10 0x00000400 ///< Interrupt 10 active +#define NVIC_ACTIVE0_INT9 0x00000200 ///< Interrupt 9 active +#define NVIC_ACTIVE0_INT8 0x00000100 ///< Interrupt 8 active +#define NVIC_ACTIVE0_INT7 0x00000080 ///< Interrupt 7 active +#define NVIC_ACTIVE0_INT6 0x00000040 ///< Interrupt 6 active +#define NVIC_ACTIVE0_INT5 0x00000020 ///< Interrupt 5 active +#define NVIC_ACTIVE0_INT4 0x00000010 ///< Interrupt 4 active +#define NVIC_ACTIVE0_INT3 0x00000008 ///< Interrupt 3 active +#define NVIC_ACTIVE0_INT2 0x00000004 ///< Interrupt 2 active +#define NVIC_ACTIVE0_INT1 0x00000002 ///< Interrupt 1 active +#define NVIC_ACTIVE0_INT0 0x00000001 ///< Interrupt 0 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_ACTIVE1 register. + */ +/*\{*/ +#define NVIC_ACTIVE1_INT59 0x08000000 ///< Interrupt 59 active +#define NVIC_ACTIVE1_INT58 0x04000000 ///< Interrupt 58 active +#define NVIC_ACTIVE1_INT57 0x02000000 ///< Interrupt 57 active +#define NVIC_ACTIVE1_INT56 0x01000000 ///< Interrupt 56 active +#define NVIC_ACTIVE1_INT55 0x00800000 ///< Interrupt 55 active +#define NVIC_ACTIVE1_INT54 0x00400000 ///< Interrupt 54 active +#define NVIC_ACTIVE1_INT53 0x00200000 ///< Interrupt 53 active +#define NVIC_ACTIVE1_INT52 0x00100000 ///< Interrupt 52 active +#define NVIC_ACTIVE1_INT51 0x00080000 ///< Interrupt 51 active +#define NVIC_ACTIVE1_INT50 0x00040000 ///< Interrupt 50 active +#define NVIC_ACTIVE1_INT49 0x00020000 ///< Interrupt 49 active +#define NVIC_ACTIVE1_INT48 0x00010000 ///< Interrupt 48 active +#define NVIC_ACTIVE1_INT47 0x00008000 ///< Interrupt 47 active +#define NVIC_ACTIVE1_INT46 0x00004000 ///< Interrupt 46 active +#define NVIC_ACTIVE1_INT45 0x00002000 ///< Interrupt 45 active +#define NVIC_ACTIVE1_INT44 0x00001000 ///< Interrupt 44 active +#define NVIC_ACTIVE1_INT43 0x00000800 ///< Interrupt 43 active +#define NVIC_ACTIVE1_INT42 0x00000400 ///< Interrupt 42 active +#define NVIC_ACTIVE1_INT41 0x00000200 ///< Interrupt 41 active +#define NVIC_ACTIVE1_INT40 0x00000100 ///< Interrupt 40 active +#define NVIC_ACTIVE1_INT39 0x00000080 ///< Interrupt 39 active +#define NVIC_ACTIVE1_INT38 0x00000040 ///< Interrupt 38 active +#define NVIC_ACTIVE1_INT37 0x00000020 ///< Interrupt 37 active +#define NVIC_ACTIVE1_INT36 0x00000010 ///< Interrupt 36 active +#define NVIC_ACTIVE1_INT35 0x00000008 ///< Interrupt 35 active +#define NVIC_ACTIVE1_INT34 0x00000004 ///< Interrupt 34 active +#define NVIC_ACTIVE1_INT33 0x00000002 ///< Interrupt 33 active +#define NVIC_ACTIVE1_INT32 0x00000001 ///< Interrupt 32 active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI0 register. + */ +/*\{*/ +#define NVIC_PRI0_INT3_M 0xFF000000 ///< Interrupt 3 priority mask +#define NVIC_PRI0_INT2_M 0x00FF0000 ///< Interrupt 2 priority mask +#define NVIC_PRI0_INT1_M 0x0000FF00 ///< Interrupt 1 priority mask +#define NVIC_PRI0_INT0_M 0x000000FF ///< Interrupt 0 priority mask +#define NVIC_PRI0_INT3_S 24 +#define NVIC_PRI0_INT2_S 16 +#define NVIC_PRI0_INT1_S 8 +#define NVIC_PRI0_INT0_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI1 register. + */ +/*\{*/ +#define NVIC_PRI1_INT7_M 0xFF000000 ///< Interrupt 7 priority mask +#define NVIC_PRI1_INT6_M 0x00FF0000 ///< Interrupt 6 priority mask +#define NVIC_PRI1_INT5_M 0x0000FF00 ///< Interrupt 5 priority mask +#define NVIC_PRI1_INT4_M 0x000000FF ///< Interrupt 4 priority mask +#define NVIC_PRI1_INT7_S 24 +#define NVIC_PRI1_INT6_S 16 +#define NVIC_PRI1_INT5_S 8 +#define NVIC_PRI1_INT4_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI2 register. + */ +/*\{*/ +#define NVIC_PRI2_INT11_M 0xFF000000 ///< Interrupt 11 priority mask +#define NVIC_PRI2_INT10_M 0x00FF0000 ///< Interrupt 10 priority mask +#define NVIC_PRI2_INT9_M 0x0000FF00 ///< Interrupt 9 priority mask +#define NVIC_PRI2_INT8_M 0x000000FF ///< Interrupt 8 priority mask +#define NVIC_PRI2_INT11_S 24 +#define NVIC_PRI2_INT10_S 16 +#define NVIC_PRI2_INT9_S 8 +#define NVIC_PRI2_INT8_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI3 register. + */ +/*\{*/ +#define NVIC_PRI3_INT15_M 0xFF000000 ///< Interrupt 15 priority mask +#define NVIC_PRI3_INT14_M 0x00FF0000 ///< Interrupt 14 priority mask +#define NVIC_PRI3_INT13_M 0x0000FF00 ///< Interrupt 13 priority mask +#define NVIC_PRI3_INT12_M 0x000000FF ///< Interrupt 12 priority mask +#define NVIC_PRI3_INT15_S 24 +#define NVIC_PRI3_INT14_S 16 +#define NVIC_PRI3_INT13_S 8 +#define NVIC_PRI3_INT12_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI4 register. + */ +/*\{*/ +#define NVIC_PRI4_INT19_M 0xFF000000 ///< Interrupt 19 priority mask +#define NVIC_PRI4_INT18_M 0x00FF0000 ///< Interrupt 18 priority mask +#define NVIC_PRI4_INT17_M 0x0000FF00 ///< Interrupt 17 priority mask +#define NVIC_PRI4_INT16_M 0x000000FF ///< Interrupt 16 priority mask +#define NVIC_PRI4_INT19_S 24 +#define NVIC_PRI4_INT18_S 16 +#define NVIC_PRI4_INT17_S 8 +#define NVIC_PRI4_INT16_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI5 register. + */ +/*\{*/ +#define NVIC_PRI5_INT23_M 0xFF000000 ///< Interrupt 23 priority mask +#define NVIC_PRI5_INT22_M 0x00FF0000 ///< Interrupt 22 priority mask +#define NVIC_PRI5_INT21_M 0x0000FF00 ///< Interrupt 21 priority mask +#define NVIC_PRI5_INT20_M 0x000000FF ///< Interrupt 20 priority mask +#define NVIC_PRI5_INT23_S 24 +#define NVIC_PRI5_INT22_S 16 +#define NVIC_PRI5_INT21_S 8 +#define NVIC_PRI5_INT20_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI6 register. + */ +/*\{*/ +#define NVIC_PRI6_INT27_M 0xFF000000 ///< Interrupt 27 priority mask +#define NVIC_PRI6_INT26_M 0x00FF0000 ///< Interrupt 26 priority mask +#define NVIC_PRI6_INT25_M 0x0000FF00 ///< Interrupt 25 priority mask +#define NVIC_PRI6_INT24_M 0x000000FF ///< Interrupt 24 priority mask +#define NVIC_PRI6_INT27_S 24 +#define NVIC_PRI6_INT26_S 16 +#define NVIC_PRI6_INT25_S 8 +#define NVIC_PRI6_INT24_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI7 register. + */ +/*\{*/ +#define NVIC_PRI7_INT31_M 0xFF000000 ///< Interrupt 31 priority mask +#define NVIC_PRI7_INT30_M 0x00FF0000 ///< Interrupt 30 priority mask +#define NVIC_PRI7_INT29_M 0x0000FF00 ///< Interrupt 29 priority mask +#define NVIC_PRI7_INT28_M 0x000000FF ///< Interrupt 28 priority mask +#define NVIC_PRI7_INT31_S 24 +#define NVIC_PRI7_INT30_S 16 +#define NVIC_PRI7_INT29_S 8 +#define NVIC_PRI7_INT28_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI8 register. + */ +/*\{*/ +#define NVIC_PRI8_INT35_M 0xFF000000 ///< Interrupt 35 priority mask +#define NVIC_PRI8_INT34_M 0x00FF0000 ///< Interrupt 34 priority mask +#define NVIC_PRI8_INT33_M 0x0000FF00 ///< Interrupt 33 priority mask +#define NVIC_PRI8_INT32_M 0x000000FF ///< Interrupt 32 priority mask +#define NVIC_PRI8_INT35_S 24 +#define NVIC_PRI8_INT34_S 16 +#define NVIC_PRI8_INT33_S 8 +#define NVIC_PRI8_INT32_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI9 register. + */ +/*\{*/ +#define NVIC_PRI9_INT39_M 0xFF000000 ///< Interrupt 39 priority mask +#define NVIC_PRI9_INT38_M 0x00FF0000 ///< Interrupt 38 priority mask +#define NVIC_PRI9_INT37_M 0x0000FF00 ///< Interrupt 37 priority mask +#define NVIC_PRI9_INT36_M 0x000000FF ///< Interrupt 36 priority mask +#define NVIC_PRI9_INT39_S 24 +#define NVIC_PRI9_INT38_S 16 +#define NVIC_PRI9_INT37_S 8 +#define NVIC_PRI9_INT36_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_PRI10 register. + */ +/*\{*/ +#define NVIC_PRI10_INT43_M 0xFF000000 ///< Interrupt 43 priority mask +#define NVIC_PRI10_INT42_M 0x00FF0000 ///< Interrupt 42 priority mask +#define NVIC_PRI10_INT41_M 0x0000FF00 ///< Interrupt 41 priority mask +#define NVIC_PRI10_INT40_M 0x000000FF ///< Interrupt 40 priority mask +#define NVIC_PRI10_INT43_S 24 +#define NVIC_PRI10_INT42_S 16 +#define NVIC_PRI10_INT41_S 8 +#define NVIC_PRI10_INT40_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CPUID register. + */ +/*\{*/ +#define NVIC_CPUID_IMP_M 0xFF000000 ///< Implementer +#define NVIC_CPUID_VAR_M 0x00F00000 ///< Variant +#define NVIC_CPUID_PARTNO_M 0x0000FFF0 ///< Processor part number +#define NVIC_CPUID_REV_M 0x0000000F ///< Revision +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_INT_CTRL register. + */ +/*\{*/ +#define NVIC_INT_CTRL_NMI_SET 0x80000000 ///< Pend a NMI +#define NVIC_INT_CTRL_PEND_SV 0x10000000 ///< Pend a PendSV +#define NVIC_INT_CTRL_UNPEND_SV 0x08000000 ///< Unpend a PendSV +#define NVIC_INT_CTRL_PENDSTSET 0x04000000 ///< Set pending SysTick interrupt +#define NVIC_INT_CTRL_PENDSTCLR 0x02000000 ///< Clear pending SysTick interrupt +#define NVIC_INT_CTRL_ISR_PRE 0x00800000 ///< Debug interrupt handling +#define NVIC_INT_CTRL_ISR_PEND 0x00400000 ///< Debug interrupt pending +#define NVIC_INT_CTRL_VEC_PEN_M 0x003FF000 ///< Highest pending exception +#define NVIC_INT_CTRL_RET_BASE 0x00000800 ///< Return to base +#define NVIC_INT_CTRL_VEC_ACT_M 0x000003FF ///< Current active exception +#define NVIC_INT_CTRL_VEC_PEN_S 12 +#define NVIC_INT_CTRL_VEC_ACT_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_VTABLE register. + */ +/*\{*/ +#define NVIC_VTABLE_BASE 0x20000000 ///< Vector table base +#define NVIC_VTABLE_OFFSET_M 0x1FFFFF00 ///< Vector table offset +#define NVIC_VTABLE_OFFSET_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_APINT register. + */ +/*\{*/ +#define NVIC_APINT_VECTKEY_M 0xFFFF0000 ///< Vector key mask +#define NVIC_APINT_VECTKEY 0x05FA0000 ///< Vector key +#define NVIC_APINT_ENDIANESS 0x00008000 ///< Data endianess +#define NVIC_APINT_PRIGROUP_M 0x00000700 ///< Priority group +#define NVIC_APINT_PRIGROUP_0_8 0x00000700 ///< Priority group 0.8 split +#define NVIC_APINT_PRIGROUP_1_7 0x00000600 ///< Priority group 1.7 split +#define NVIC_APINT_PRIGROUP_2_6 0x00000500 ///< Priority group 2.6 split +#define NVIC_APINT_PRIGROUP_3_5 0x00000400 ///< Priority group 3.5 split +#define NVIC_APINT_PRIGROUP_4_4 0x00000300 ///< Priority group 4.4 split +#define NVIC_APINT_PRIGROUP_5_3 0x00000200 ///< Priority group 5.3 split +#define NVIC_APINT_PRIGROUP_6_2 0x00000100 ///< Priority group 6.2 split +#define NVIC_APINT_SYSRESETREQ 0x00000004 ///< System reset request +#define NVIC_APINT_VECT_CLR_ACT 0x00000002 ///< Clear active NMI/fault info +#define NVIC_APINT_VECT_RESET 0x00000001 ///< System reset +#define NVIC_APINT_PRIGROUP_7_1 0x00000000 ///< Priority group 7.1 split +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_CTRL register. + */ +/*\{*/ +#define NVIC_SYS_CTRL_SEVONPEND 0x00000010 ///< Wakeup on pend +#define NVIC_SYS_CTRL_SLEEPDEEP 0x00000004 ///< Deep sleep enable +#define NVIC_SYS_CTRL_SLEEPEXIT 0x00000002 ///< Sleep on ISR exit +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_CFG_CTRL register. + */ +/*\{*/ +#define NVIC_CFG_CTRL_BFHFNMIGN 0x00000100 ///< Ignore bus fault in NMI/fault +#define NVIC_CFG_CTRL_DIV0 0x00000010 ///< Trap on divide by 0 +#define NVIC_CFG_CTRL_UNALIGNED 0x00000008 ///< Trap on unaligned access +#define NVIC_CFG_CTRL_DEEP_PEND 0x00000004 ///< Allow deep interrupt trigger +#define NVIC_CFG_CTRL_MAIN_PEND 0x00000002 ///< Allow main interrupt trigger +#define NVIC_CFG_CTRL_BASE_THR 0x00000001 ///< Thread state control +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI1 register. + */ +/*\{*/ +#define NVIC_SYS_PRI1_RES_M 0xFF000000 ///< Priority of reserved handler +#define NVIC_SYS_PRI1_USAGE_M 0x00FF0000 ///< Priority of usage fault handler +#define NVIC_SYS_PRI1_BUS_M 0x0000FF00 ///< Priority of bus fault handler +#define NVIC_SYS_PRI1_MEM_M 0x000000FF ///< Priority of mem manage handler +#define NVIC_SYS_PRI1_USAGE_S 16 +#define NVIC_SYS_PRI1_BUS_S 8 +#define NVIC_SYS_PRI1_MEM_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI2 register. + */ +/*\{*/ +#define NVIC_SYS_PRI2_SVC_M 0xFF000000 ///< Priority of SVCall handler +#define NVIC_SYS_PRI2_RES_M 0x00FFFFFF ///< Priority of reserved handlers +#define NVIC_SYS_PRI2_SVC_S 24 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_PRI3 register. + */ +/*\{*/ +#define NVIC_SYS_PRI3_TICK_M 0xFF000000 ///< Priority of Sys Tick handler +#define NVIC_SYS_PRI3_PENDSV_M 0x00FF0000 ///< Priority of PendSV handler +#define NVIC_SYS_PRI3_RES_M 0x0000FF00 ///< Priority of reserved handler +#define NVIC_SYS_PRI3_DEBUG_M 0x000000FF ///< Priority of debug handler +#define NVIC_SYS_PRI3_TICK_S 24 +#define NVIC_SYS_PRI3_PENDSV_S 16 +#define NVIC_SYS_PRI3_DEBUG_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SYS_HND_CTRL +* register. + */ +/*\{*/ +#define NVIC_SYS_HND_CTRL_USAGE 0x00040000 ///< Usage fault enable +#define NVIC_SYS_HND_CTRL_BUS 0x00020000 ///< Bus fault enable +#define NVIC_SYS_HND_CTRL_MEM 0x00010000 ///< Mem manage fault enable +#define NVIC_SYS_HND_CTRL_SVC 0x00008000 ///< SVCall is pended +#define NVIC_SYS_HND_CTRL_BUSP 0x00004000 ///< Bus fault is pended +#define NVIC_SYS_HND_CTRL_TICK 0x00000800 ///< Sys tick is active +#define NVIC_SYS_HND_CTRL_PNDSV 0x00000400 ///< PendSV is active +#define NVIC_SYS_HND_CTRL_MON 0x00000100 ///< Monitor is active +#define NVIC_SYS_HND_CTRL_SVCA 0x00000080 ///< SVCall is active +#define NVIC_SYS_HND_CTRL_USGA 0x00000008 ///< Usage fault is active +#define NVIC_SYS_HND_CTRL_BUSA 0x00000002 ///< Bus fault is active +#define NVIC_SYS_HND_CTRL_MEMA 0x00000001 ///< Mem manage is active +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_STAT +* register. + */ +/*\{*/ +#define NVIC_FAULT_STAT_DIV0 0x02000000 ///< Divide by zero fault +#define NVIC_FAULT_STAT_UNALIGN 0x01000000 ///< Unaligned access fault +#define NVIC_FAULT_STAT_NOCP 0x00080000 ///< No coprocessor fault +#define NVIC_FAULT_STAT_INVPC 0x00040000 ///< Invalid PC fault +#define NVIC_FAULT_STAT_INVSTAT 0x00020000 ///< Invalid state fault +#define NVIC_FAULT_STAT_UNDEF 0x00010000 ///< Undefined instruction fault +#define NVIC_FAULT_STAT_BFARV 0x00008000 ///< BFAR is valid +#define NVIC_FAULT_STAT_BSTKE 0x00001000 ///< Stack bus fault +#define NVIC_FAULT_STAT_BUSTKE 0x00000800 ///< Unstack bus fault +#define NVIC_FAULT_STAT_IMPRE 0x00000400 ///< Imprecise data bus error +#define NVIC_FAULT_STAT_PRECISE 0x00000200 ///< Precise data bus error +#define NVIC_FAULT_STAT_IBUS 0x00000100 ///< Instruction bus fault +#define NVIC_FAULT_STAT_MMARV 0x00000080 ///< MMAR is valid +#define NVIC_FAULT_STAT_MSTKE 0x00000010 ///< Stack access violation +#define NVIC_FAULT_STAT_MUSTKE 0x00000008 ///< Unstack access violation +#define NVIC_FAULT_STAT_DERR 0x00000002 ///< Data access violation +#define NVIC_FAULT_STAT_IERR 0x00000001 ///< Instruction access violation +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_HFAULT_STAT +* register. + */ +/*\{*/ +#define NVIC_HFAULT_STAT_DBG 0x80000000 ///< Debug event +#define NVIC_HFAULT_STAT_FORCED 0x40000000 ///< Cannot execute fault handler +#define NVIC_HFAULT_STAT_VECT 0x00000002 ///< Vector table read fault +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DEBUG_STAT +* register. + */ +/*\{*/ +#define NVIC_DEBUG_STAT_EXTRNL 0x00000010 ///< EDBGRQ asserted +#define NVIC_DEBUG_STAT_VCATCH 0x00000008 ///< Vector catch +#define NVIC_DEBUG_STAT_DWTTRAP 0x00000004 ///< DWT match +#define NVIC_DEBUG_STAT_BKPT 0x00000002 ///< Breakpoint instruction +#define NVIC_DEBUG_STAT_HALTED 0x00000001 ///< Halt request +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MM_ADDR register. + */ +/*\{*/ +#define NVIC_MM_ADDR_M 0xFFFFFFFF ///< Data fault address +#define NVIC_MM_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_FAULT_ADDR +* register. + */ +/*\{*/ +#define NVIC_FAULT_ADDR_M 0xFFFFFFFF ///< Data bus fault address +#define NVIC_FAULT_ADDR_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_TYPE register. + */ +/*\{*/ +#define NVIC_MPU_TYPE_IREGION_M 0x00FF0000 ///< Number of I regions +#define NVIC_MPU_TYPE_DREGION_M 0x0000FF00 ///< Number of D regions +#define NVIC_MPU_TYPE_SEPARATE 0x00000001 ///< Separate or unified MPU +#define NVIC_MPU_TYPE_IREGION_S 16 +#define NVIC_MPU_TYPE_DREGION_S 8 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_CTRL register. + */ +/*\{*/ +#define NVIC_MPU_CTRL_PRIVDEFEN 0x00000004 ///< MPU default region in priv mode +#define NVIC_MPU_CTRL_HFNMIENA 0x00000002 ///< MPU enabled during faults +#define NVIC_MPU_CTRL_ENABLE 0x00000001 ///< MPU enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_NUMBER +* register. + */ +/*\{*/ +#define NVIC_MPU_NUMBER_M 0x000000FF ///< MPU region to access +#define NVIC_MPU_NUMBER_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_BASE register. + */ +/*\{*/ +#define NVIC_MPU_BASE_ADDR_M 0xFFFFFFE0 ///< Base address mask +#define NVIC_MPU_BASE_VALID 0x00000010 ///< Region number valid +#define NVIC_MPU_BASE_REGION_M 0x0000000F ///< Region number +#define NVIC_MPU_BASE_ADDR_S 8 +#define NVIC_MPU_BASE_REGION_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_MPU_ATTR register. + */ +/*\{*/ +#define NVIC_MPU_ATTR_M 0xFFFF0000 ///< Attributes +#define NVIC_MPU_ATTR_AP_NO_NO 0x00000000 ///< prv: no access, usr: no access +#define NVIC_MPU_ATTR_BUFFRABLE 0x00010000 ///< Bufferable +#define NVIC_MPU_ATTR_CACHEABLE 0x00020000 ///< Cacheable +#define NVIC_MPU_ATTR_SHAREABLE 0x00040000 ///< Shareable +#define NVIC_MPU_ATTR_TEX_M 0x00380000 ///< Type extension mask +#define NVIC_MPU_ATTR_AP_RW_NO 0x01000000 ///< prv: rw, usr: none +#define NVIC_MPU_ATTR_AP_RW_RO 0x02000000 ///< prv: rw, usr: read-only +#define NVIC_MPU_ATTR_AP_RW_RW 0x03000000 ///< prv: rw, usr: rw +#define NVIC_MPU_ATTR_AP_RO_NO 0x05000000 ///< prv: ro, usr: none +#define NVIC_MPU_ATTR_AP_RO_RO 0x06000000 ///< prv: ro, usr: ro +#define NVIC_MPU_ATTR_AP_M 0x07000000 ///< Access permissions mask +#define NVIC_MPU_ATTR_XN 0x10000000 ///< Execute disable +#define NVIC_MPU_ATTR_SRD_M 0x0000FF00 ///< Sub-region disable mask +#define NVIC_MPU_ATTR_SRD_0 0x00000100 ///< Sub-region 0 disable +#define NVIC_MPU_ATTR_SRD_1 0x00000200 ///< Sub-region 1 disable +#define NVIC_MPU_ATTR_SRD_2 0x00000400 ///< Sub-region 2 disable +#define NVIC_MPU_ATTR_SRD_3 0x00000800 ///< Sub-region 3 disable +#define NVIC_MPU_ATTR_SRD_4 0x00001000 ///< Sub-region 4 disable +#define NVIC_MPU_ATTR_SRD_5 0x00002000 ///< Sub-region 5 disable +#define NVIC_MPU_ATTR_SRD_6 0x00004000 ///< Sub-region 6 disable +#define NVIC_MPU_ATTR_SRD_7 0x00008000 ///< Sub-region 7 disable +#define NVIC_MPU_ATTR_SIZE_M 0x0000003E ///< Region size mask +#define NVIC_MPU_ATTR_SIZE_32B 0x00000008 ///< Region size 32 bytes +#define NVIC_MPU_ATTR_SIZE_64B 0x0000000A ///< Region size 64 bytes +#define NVIC_MPU_ATTR_SIZE_128B 0x0000000C ///< Region size 128 bytes +#define NVIC_MPU_ATTR_SIZE_256B 0x0000000E ///< Region size 256 bytes +#define NVIC_MPU_ATTR_SIZE_512B 0x00000010 ///< Region size 512 bytes +#define NVIC_MPU_ATTR_SIZE_1K 0x00000012 ///< Region size 1 Kbytes +#define NVIC_MPU_ATTR_SIZE_2K 0x00000014 ///< Region size 2 Kbytes +#define NVIC_MPU_ATTR_SIZE_4K 0x00000016 ///< Region size 4 Kbytes +#define NVIC_MPU_ATTR_SIZE_8K 0x00000018 ///< Region size 8 Kbytes +#define NVIC_MPU_ATTR_SIZE_16K 0x0000001A ///< Region size 16 Kbytes +#define NVIC_MPU_ATTR_SIZE_32K 0x0000001C ///< Region size 32 Kbytes +#define NVIC_MPU_ATTR_SIZE_64K 0x0000001E ///< Region size 64 Kbytes +#define NVIC_MPU_ATTR_SIZE_128K 0x00000020 ///< Region size 128 Kbytes +#define NVIC_MPU_ATTR_SIZE_256K 0x00000022 ///< Region size 256 Kbytes +#define NVIC_MPU_ATTR_SIZE_512K 0x00000024 ///< Region size 512 Kbytes +#define NVIC_MPU_ATTR_SIZE_1M 0x00000026 ///< Region size 1 Mbytes +#define NVIC_MPU_ATTR_SIZE_2M 0x00000028 ///< Region size 2 Mbytes +#define NVIC_MPU_ATTR_SIZE_4M 0x0000002A ///< Region size 4 Mbytes +#define NVIC_MPU_ATTR_SIZE_8M 0x0000002C ///< Region size 8 Mbytes +#define NVIC_MPU_ATTR_SIZE_16M 0x0000002E ///< Region size 16 Mbytes +#define NVIC_MPU_ATTR_SIZE_32M 0x00000030 ///< Region size 32 Mbytes +#define NVIC_MPU_ATTR_SIZE_64M 0x00000032 ///< Region size 64 Mbytes +#define NVIC_MPU_ATTR_SIZE_128M 0x00000034 ///< Region size 128 Mbytes +#define NVIC_MPU_ATTR_SIZE_256M 0x00000036 ///< Region size 256 Mbytes +#define NVIC_MPU_ATTR_SIZE_512M 0x00000038 ///< Region size 512 Mbytes +#define NVIC_MPU_ATTR_SIZE_1G 0x0000003A ///< Region size 1 Gbytes +#define NVIC_MPU_ATTR_SIZE_2G 0x0000003C ///< Region size 2 Gbytes +#define NVIC_MPU_ATTR_SIZE_4G 0x0000003E ///< Region size 4 Gbytes +#define NVIC_MPU_ATTR_ENABLE 0x00000001 ///< Region enable +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_CTRL register. + */ +/*\{*/ +#define NVIC_DBG_CTRL_DBGKEY_M 0xFFFF0000 ///< Debug key mask +#define NVIC_DBG_CTRL_DBGKEY 0xA05F0000 ///< Debug key +#define NVIC_DBG_CTRL_S_RESET_ST \ + 0x02000000 ///< Core has reset since last read +#define NVIC_DBG_CTRL_S_RETIRE_ST \ + 0x01000000 ///< Core has executed insruction + ///< since last read +#define NVIC_DBG_CTRL_S_LOCKUP 0x00080000 ///< Core is locked up +#define NVIC_DBG_CTRL_S_SLEEP 0x00040000 ///< Core is sleeping +#define NVIC_DBG_CTRL_S_HALT 0x00020000 ///< Core status on halt +#define NVIC_DBG_CTRL_S_REGRDY 0x00010000 ///< Register read/write available +#define NVIC_DBG_CTRL_C_SNAPSTALL \ + 0x00000020 ///< Breaks a stalled load/store +#define NVIC_DBG_CTRL_C_MASKINT 0x00000008 ///< Mask interrupts when stepping +#define NVIC_DBG_CTRL_C_STEP 0x00000004 ///< Step the core +#define NVIC_DBG_CTRL_C_HALT 0x00000002 ///< Halt the core +#define NVIC_DBG_CTRL_C_DEBUGEN 0x00000001 ///< Enable debug +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_XFER register. + */ +/*\{*/ +#define NVIC_DBG_XFER_REG_WNR 0x00010000 ///< Write or not read +#define NVIC_DBG_XFER_REG_SEL_M 0x0000001F ///< Register +#define NVIC_DBG_XFER_REG_CFBP 0x00000014 ///< Control/Fault/BasePri/PriMask +#define NVIC_DBG_XFER_REG_DSP 0x00000013 ///< Deep SP +#define NVIC_DBG_XFER_REG_PSP 0x00000012 ///< Process SP +#define NVIC_DBG_XFER_REG_MSP 0x00000011 ///< Main SP +#define NVIC_DBG_XFER_REG_FLAGS 0x00000010 ///< xPSR/Flags register +#define NVIC_DBG_XFER_REG_R15 0x0000000F ///< Register R15 +#define NVIC_DBG_XFER_REG_R14 0x0000000E ///< Register R14 +#define NVIC_DBG_XFER_REG_R13 0x0000000D ///< Register R13 +#define NVIC_DBG_XFER_REG_R12 0x0000000C ///< Register R12 +#define NVIC_DBG_XFER_REG_R11 0x0000000B ///< Register R11 +#define NVIC_DBG_XFER_REG_R10 0x0000000A ///< Register R10 +#define NVIC_DBG_XFER_REG_R9 0x00000009 ///< Register R9 +#define NVIC_DBG_XFER_REG_R8 0x00000008 ///< Register R8 +#define NVIC_DBG_XFER_REG_R7 0x00000007 ///< Register R7 +#define NVIC_DBG_XFER_REG_R6 0x00000006 ///< Register R6 +#define NVIC_DBG_XFER_REG_R5 0x00000005 ///< Register R5 +#define NVIC_DBG_XFER_REG_R4 0x00000004 ///< Register R4 +#define NVIC_DBG_XFER_REG_R3 0x00000003 ///< Register R3 +#define NVIC_DBG_XFER_REG_R2 0x00000002 ///< Register R2 +#define NVIC_DBG_XFER_REG_R1 0x00000001 ///< Register R1 +#define NVIC_DBG_XFER_REG_R0 0x00000000 ///< Register R0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_DATA register. + */ +/*\{*/ +#define NVIC_DBG_DATA_M 0xFFFFFFFF ///< Data temporary cache +#define NVIC_DBG_DATA_S 0 +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_DBG_INT register. + */ +/*\{*/ +#define NVIC_DBG_INT_HARDERR 0x00000400 ///< Debug trap on hard fault +#define NVIC_DBG_INT_INTERR 0x00000200 ///< Debug trap on interrupt errors +#define NVIC_DBG_INT_BUSERR 0x00000100 ///< Debug trap on bus error +#define NVIC_DBG_INT_STATERR 0x00000080 ///< Debug trap on usage fault state +#define NVIC_DBG_INT_CHKERR 0x00000040 ///< Debug trap on usage fault check +#define NVIC_DBG_INT_NOCPERR 0x00000020 ///< Debug trap on coprocessor error +#define NVIC_DBG_INT_MMERR 0x00000010 ///< Debug trap on mem manage fault +#define NVIC_DBG_INT_RESET 0x00000008 ///< Core reset status +#define NVIC_DBG_INT_RSTPENDCLR 0x00000004 ///< Clear pending core reset +#define NVIC_DBG_INT_RSTPENDING 0x00000002 ///< Core reset is pending +#define NVIC_DBG_INT_RSTVCATCH 0x00000001 ///< Reset vector catch +/*\}*/ + +/** + * The following are defines for the bit fields in the NVIC_SW_TRIG register. + */ +/*\{*/ +#define NVIC_SW_TRIG_INTID_M 0x000003FF ///< Interrupt to trigger +#define NVIC_SW_TRIG_INTID_S 0 +/*\}*/ + + +#endif /* STM32_NVIC_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32_pwr.h b/bertos/cpu/cortex-m3/io/stm32_pwr.h new file mode 100644 index 0000000..6f17e92 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32_pwr.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief STM32 Power Control. + * + * \author Andrea Righi + */ +#ifndef STM32_PWR_H +#define STM32_PWR_H + +#include + +/* Power Control */ +struct PWR +{ + reg32_t CR; + reg32_t CSR; +}; + +#define PWR_CR_DBP 0x00000100 + +#endif /* STM32_PWR_H */ diff --git a/bertos/cpu/cortex-m3/io/stm32_uart.h b/bertos/cpu/cortex-m3/io/stm32_uart.h new file mode 100644 index 0000000..e35fc44 --- /dev/null +++ b/bertos/cpu/cortex-m3/io/stm32_uart.h @@ -0,0 +1,250 @@ +/** + * \file + * + * + * \brief UART STM32F10xx registers definition. + */ + +#ifndef STM32_UART_H +#define STM32_UART_H + +/* + * USART Word Length + */ +#define USART_WORD_LEN_8B ((uint16_t)0x0000) +#define USART_WORD_LEN_9B ((uint16_t)0x1000) + +/* + * USART Stop Bits + */ +#define USART_STOP_BIT_1 ((uint16_t)0x0000) +#define USART_STOP_BIT_0_5 ((uint16_t)0x1000) +#define USART_STOP_BIT_2 ((uint16_t)0x2000) +#define USART_STOP_BIT_1_5 ((uint16_t)0x3000) + +/* + * USART Parity + */ +#define USART_PARITY_NO ((uint16_t)0x0000) +#define USART_PARITY_EVEN ((uint16_t)0x0400) +#define USART_PARITY_ODD ((uint16_t)0x0600) + + +/* + * USART Hardware Flow Control + */ +#define USART_HW_FLOW_NONE ((uint16_t)0x0000) +#define USART_HW_FLOW_RTS ((uint16_t)0x0100) +#define USART_HW_FLOW_CTS ((uint16_t)0x0200) +#define USART_HW_FLOW_RTS_CTS ((uint16_t)0x0300) + + +/* + * USART Clock + */ +#define USART_CLK_DIS ((uint16_t)0x0000) +#define USART_CLK_EN ((uint16_t)0x0800) + +/* + * USART Clock Polarity + */ +#define USART_CPOL_LOW ((uint16_t)0x0000) +#define USART_CPOL_HIGHT ((uint16_t)0x0400) + +/* + * USART Clock Phase + */ +#define USART_CPHA_1EDGE ((uint16_t)0x0000) +#define USART_CPHA_2EDGE ((uint16_t)0x0200) + + + +/* + * USART Interrupt definition + */ +#define USART_IT_PE ((uint16_t)0x0028) +#define USART_IT_TXE ((uint16_t)0x0727) +#define USART_IT_TC ((uint16_t)0x0626) +#define USART_IT_RXNE ((uint16_t)0x0525) +#define USART_IT_IDLE ((uint16_t)0x0424) +#define USART_IT_LBD ((uint16_t)0x0846) +#define USART_IT_CTS ((uint16_t)0x096A) +#define USART_IT_ERR ((uint16_t)0x0060) +#define USART_IT_ORE ((uint16_t)0x0360) +#define USART_IT_NE ((uint16_t)0x0260) +#define USART_IT_FE ((uint16_t)0x0160) + + +#define INT_UART0_CR1 0x0C +#define INT_UART0_CR2 0x10 +#define INT_UART0_CR3 0x14 + +/* + * USART DMA Requests + */ +#define USART_DMA_REQ_TX ((uint16_t)0x0080) +#define USART_DMA_REQ_RX ((uint16_t)0x0040) + +/* + * USART WakeUp methods + */ +#define USART_WAKEUP_IDLELINE ((uint16_t)0x0000) +#define USART_WAKEUP_ADRESSMARK ((uint16_t)0x0800) + + +/* + * USART LIN Break Detection Length + */ +#define USART_LIN_BREAK_DET_LEN_10B ((uint16_t)0x0000) +#define USART_LIN_BREAK_DET_LEN_11B ((uint16_t)0x0020) + +/* + * USART IrDA Low Power + */ +#define USART_IRDA_MODE_LOWPOWER ((uint16_t)0x0004) +#define USART_IRDA_MODE_NORMAL ((uint16_t)0x0000) + + +#define CR1_RUN_SET ((uint16_t)0x2000) /* USART Enable MASK */ +#define CR1_RUN_RESET ((uint16_t)0xDFFF) /* USART Disable MASK */ +#define CR1_RWU_SET ((uint16_t)0x0002) /* USART mute mode Enable MASK */ +#define CR1_RWU_RESET ((uint16_t)0xFFFD) /* USART mute mode Enable MASK */ +#define CR1_SBK_SET ((uint16_t)0x0001) /* USART Break Character send MASK */ +#define CR1_USART_CLEAR_MASK ((uint16_t)0xE9F3) /* USART CR1 MASK */ +#define CR1_UE 13 +#define CR1_M 12 +#define CR1_WAKE 11 +#define CR1_PCE 10 +#define CR1_PS 9 +#define CR1_PEIE 8 +#define CR1_TXEIE 7 +#define CR1_TCIE 6 +#define CR1_RXNEIE 5 +#define CR1_IDLEIE 4 +#define CR1_TE 3 +#define CR1_RE 2 +#define CR1_RWU 1 +#define CR1_SBK 0 + +#define CR2_MASK ((uint16_t)0xFFF0) /* USART address MASK */ +#define CR2_LINE_SET ((uint16_t)0x4000) /* USART LIN Enable MASK */ +#define CR2_LINE_RESET ((uint16_t)0xBFFF) /* USART LIN Disable MASK */ +#define CR2_USART_CLEAR_MASK ((uint16_t)0xC0FF) /* USART CR2 MASK */ + +#define CR3_SCEN_SET ((uint16_t)0x0020) /* USART SC Enable MASK */ +#define CR3_SCEN_RESET ((uint16_t)0xFFDF) /* USART SC Disable MASK */ +#define CR3_NACK_SET ((uint16_t)0x0010) /* USART SC NACK Enable MASK */ +#define CR3_NACK_RESET ((uint16_t)0xFFEF) /* USART SC NACK Disable MASK */ +#define CR3_HDSEL_SET ((uint16_t)0x0008) /* USART Half-Duplex Enable MASK */ +#define CR3_HDSEL_RESET ((uint16_t)0xFFF7) /* USART Half-Duplex Disable MASK */ +#define CR3_IRLP_MASK ((uint16_t)0xFFFB) /* USART IrDA LowPower mode MASK */ +#define CR3_LBDL_MASK ((uint16_t)0xFFDF) /* USART LIN Break detection MASK */ +#define CR3_WAKE_MASK ((uint16_t)0xF7FF) /* USART WakeUp Method MASK */ +#define CR3_IREN_SET ((uint16_t)0x0002) /* USART IrDA Enable MASK */ +#define CR3_IREN_RESET ((uint16_t)0xFFFD) /* USART IrDA Disable MASK */ +#define CR3_CLEAR_MASK ((uint16_t)0xFCFF) /* USART CR3 MASK */ + + +/* Status */ +#define SR_CTS 9 +#define SR_LBD 8 +#define SR_TXE 7 +#define SR_TC 6 +#define SR_RXNE 5 +#define SR_IDLE 4 +#define SR_ORE 3 +#define SR_NE 2 +#define SR_FE 1 +#define SR_PE 0 + +#define GTPR_LSB_MASK ((uint16_t)0x00FF) /* Guard Time Register LSB MASK */ +#define GTPR_MSB_MASK ((uint16_t)0xFF00) /* Guard Time Register MSB MASK */ + +#define USART_IT_MASK ((uint16_t)0x001F) /* USART Interrupt MASK */ + +/* USART flags */ +#define USART_FLAG_CTS ((uint16_t)0x0200) +#define USART_FLAG_LBD ((uint16_t)0x0100) +#define USART_FLAG_TXE ((uint16_t)0x0080) +#define USART_FLAG_TC ((uint16_t)0x0040) +#define USART_FLAG_RXNE ((uint16_t)0x0020) +#define USART_FLAG_IDLE ((uint16_t)0x0010) +#define USART_FLAG_ORE ((uint16_t)0x0008) +#define USART_FLAG_NE ((uint16_t)0x0004) +#define USART_FLAG_FE ((uint16_t)0x0002) +#define USART_FLAG_PE ((uint16_t)0x0001) +#define USART_FLAG_MASK ((uint16_t)0x03FF) + + +/* USART registers */ +struct stm32_usart +{ + reg16_t SR; + uint16_t _RESERVED0; + reg16_t DR; + uint16_t _RESERVED1; + reg16_t BRR; + uint16_t _RESERVED2; + reg16_t CR1; + uint16_t _RESERVED3; + reg16_t CR2; + uint16_t _RESERVED4; + reg16_t CR3; + uint16_t _RESERVED5; + reg16_t GTPR; + uint16_t _RESERVED6; +}; + +/* USART mode */ +#define USART_MODE_RX ((uint16_t)0x0004) +#define USART_MODE_TX ((uint16_t)0x0008) + +/* USART last bit */ +#define USART_LASTBIT_DISABLE ((uint16_t)0x0000) +#define USART_LASTBIT_ENABLE ((uint16_t)0x0100) + + +INLINE uint16_t evaluate_brr(struct stm32_usart *base, unsigned long cpu_freq, unsigned long baud) +{ + uint32_t freq, reg, div, frac; + + /* NOTE: PCLK1 has been configured as CPU_FREQ / 2 */ + freq = (base == (struct stm32_usart *)USART1_BASE) ? cpu_freq : cpu_freq / 2; + div = (0x19 * freq) / (0x04 * baud); + reg = (div / 0x64) << 0x04; + frac = div - (0x64 * (reg >> 0x04)); + reg |= ((frac * 0x10 + 0x32) / 0x64) & 0x0f; + + return (uint16_t)reg; +} + +#endif /* STM32_UART_H */ + diff --git a/bertos/cpu/cortex-m3/scripts/cortex-m3_ram.ld b/bertos/cpu/cortex-m3/scripts/cortex-m3_ram.ld new file mode 100644 index 0000000..f045c1e --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/cortex-m3_ram.ld @@ -0,0 +1,106 @@ +/** + * \file + * + * + * \author Manuele Fanelli + * + * \brief Script for Cortex M3 family processors. + * + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.init)); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > ram + + __text_end = .; + PROVIDE (__text_end = .); + + .data : AT (__text_end) + { + . = ALIGN (0x400); + PROVIDE (__data_start = .); + *(vtable) + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocated stack at the end of bss section. + * Data heap is allocate at end of stack. + * STACK_SIZE variable is defined in the CPU specific linker script file. + */ + PROVIDE (__msp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__msp_end = .); + + PROVIDE (__psp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__psp_end = .); + + PROVIDE (__heap_start = .); + . = ALIGN(8); +} + diff --git a/bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld b/bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld new file mode 100644 index 0000000..94a1813 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld @@ -0,0 +1,107 @@ +/** + * \file + * + * + * \brief Script Cortex M3 family processors. + * + * \author Daniele Basile + */ + +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) + + +/* + * Allocate section memory + */ +SECTIONS +{ + .text : + { + KEEP(*(.vectors)); + . = ALIGN (4); + KEEP(*(.init)); + . = ALIGN (4); + *(.rodata .rodata.*); + . = ALIGN (4); + *(.text .text.*); + . = ALIGN (4); + *(.glue_7t); + . = ALIGN(4); + *(.glue_7); + . = ALIGN(4); + } > rom + + __text_end = .; + PROVIDE (__text_end = .); + + .data : AT (__text_end) + { + . = ALIGN (0x400); + PROVIDE (__data_start = .); + *(vtable) + . = ALIGN (4); + *(.ramfunc) + . = ALIGN (4); + *(.data .data.*) + . = ALIGN (4); + _edata = .; + PROVIDE (__data_end = .); + } > ram + + .bss : + { + PROVIDE (__bss_start = .); + *(.bss .bss.*) + . = ALIGN(4); + *(COMMON) + . = ALIGN(4); + PROVIDE (__bss_end = .); + } > ram + + /* + * Allocated stack at the end of bss section. + * Data heap is allocate at end of stack. + * STACK_SIZE variable is defined in the CPU specific linker script file. + */ + PROVIDE (__msp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__msp_end = .); + + PROVIDE (__psp_start = .); + . = ALIGN(8); + . += STACK_SIZE; + PROVIDE (__psp_end = .); + + PROVIDE (__heap_start = .); + . = ALIGN(8); +} diff --git a/bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld b/bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld new file mode 100644 index 0000000..2585d53 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/lm3s1968_ram.ld @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Manuele Fanelli + * + * \brief Script for Luminary Micro LM3S1968 Cortex M3 family processors. + * + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_ram.ld file + */ +STACK_SIZE = 0x1000; + +/* + * Define memory configuration for LM3S1968 board + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 256k + ram(rwx) : org = 0x20000000, len = 64k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_ram.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld b/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld new file mode 100644 index 0000000..eff380e --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/lm3s1968_rom.ld @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Manuele Fanelli + * + * \brief Script for Luminary Micro LM3S1968 Cortex M3 family processors. + * + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_rom.ld file + */ +STACK_SIZE = 0x1000; + +/* + * Define memory configuration for LM3S1968 board + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 256k + ram(rwx) : org = 0x20000000, len = 64k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/lm3s8962_ram.ld b/bertos/cpu/cortex-m3/scripts/lm3s8962_ram.ld new file mode 100644 index 0000000..61e673d --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/lm3s8962_ram.ld @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \brief Script for Luminary Micro LM3S8962 Cortex M3 family processors. + * + * \author Andrea Righi + */ + + +/* + * Define stack size here + * Variable used in the cortex-m3_ram.ld file + */ +STACK_SIZE = 0x1000; + +/* + * Define memory configuration for LM3S8962 board + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 256k + ram(rwx) : org = 0x20000000, len = 64k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_ram.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/lm3s8962_rom.ld b/bertos/cpu/cortex-m3/scripts/lm3s8962_rom.ld new file mode 100644 index 0000000..b79f5c0 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/lm3s8962_rom.ld @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief Script for Luminary Micro LM3S8962 Cortex M3 family processors. + * + * \author Andrea Righi + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_rom.ld file + */ +STACK_SIZE = 0x1000; + +/*/ + * Define memory configuration for LM3S8962 board + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 256k + ram(rwx) : org = 0x20000000, len = 64k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" diff --git a/bertos/cpu/cortex-m3/scripts/sam3n4_ram.ld b/bertos/cpu/cortex-m3/scripts/sam3n4_ram.ld new file mode 100644 index 0000000..9dee00d --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/sam3n4_ram.ld @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Linker script for Atmel SAM3N4 Cortex M3 processor. + * + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_ram.ld file + */ +STACK_SIZE = 0x1000; + +/* + * Memory configuration for SAM3N4. + */ +MEMORY +{ + rom(rx) : org = 0x0, len = 256k + ram(rwx) : org = 0x20000000, len = 24k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_ram.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/sam3n4_rom.ld b/bertos/cpu/cortex-m3/scripts/sam3n4_rom.ld new file mode 100644 index 0000000..5d6efa4 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/sam3n4_rom.ld @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Linker script for Atmel SAM3N4 Cortex M3 processor. + * + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_rom.ld file + */ +STACK_SIZE = 0x1000; + +/* + * Memory configuration for SAM3N4. + */ +MEMORY +{ + rom(rx) : org = 0x0, len = 256k + ram(rwx) : org = 0x20000000, len = 24k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/sam3x8_ram.icf b/bertos/cpu/cortex-m3/scripts/sam3x8_ram.icf new file mode 100644 index 0000000..aeddad6 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/sam3x8_ram.icf @@ -0,0 +1,52 @@ +/*- SRAM0 memory region -*/ +define symbol __region_RAM0_size__ = 0x10000 ; +define symbol __region_RAM0_start__ = 0x20000000 ; +define symbol __region_RAM0_end__ = __region_RAM0_start__+__region_RAM0_size__-1 ; + +export symbol __region_RAM0_size__ ; +export symbol __region_RAM0_start__ ; +export symbol __region_RAM0_end__ ; + +/*- SRAM1 memory region -*/ +define symbol __region_RAM1_size__ = 0x8000 ; +define symbol __region_RAM1_start__ = 0x20080000 ; +define symbol __region_RAM1_end__ = __region_RAM1_start__+__region_RAM1_size__-1 ; + +export symbol __region_RAM1_size__ ; +export symbol __region_RAM1_start__ ; +export symbol __region_RAM1_end__ ; + +/*- Continous SRAM region (SRAM0 is mirrored) -*/ +define symbol __region_RAM_size__ = __region_RAM0_size__+__region_RAM1_size__ ; +define symbol __region_RAM_start__ = __region_RAM1_start__-__region_RAM0_size__ ; +define symbol __region_RAM_end__ = __region_RAM1_end__ ; + +export symbol __region_RAM_size__ ; +export symbol __region_RAM_start__ ; +export symbol __region_RAM_end__ ; + +/*- NFC SRAM region -*/ +define symbol __region_NFC_RAM_start__ = 0x20100000 ; +define symbol __region_NFC_RAM_end__ = 0x20100FFF ; + +export symbol __region_NFC_RAM_start__ ; +export symbol __region_NFC_RAM_end__ ; + +/*-Vector table start*/ +define symbol __vector_start__ = __region_RAM_start__ ; + +/*-Sizes-*/ +define symbol __size_cstack__ = 0x2000 ; +define symbol __size_heap__ = 0x2000 ; + +define memory mem with size = 4G ; +define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; + +define block CSTACK with alignment = 8, size = __size_cstack__ { }; +define block HEAP with alignment = 8, size = __size_heap__ { }; + +initialize by copy with packing=none { readwrite }; +do not initialize { section .noinit }; + +place at address mem:__vector_start__ { readonly section .vectors }; +place in RAM_region { readonly, readwrite, block CSTACK, block HEAP }; diff --git a/bertos/cpu/cortex-m3/scripts/sam3x8_rom.icf b/bertos/cpu/cortex-m3/scripts/sam3x8_rom.icf new file mode 100644 index 0000000..5823a01 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/sam3x8_rom.icf @@ -0,0 +1,71 @@ +/*- SRAM0 memory region -*/ +define symbol __region_RAM0_size__ = 0x10000 ; +define symbol __region_RAM0_start__ = 0x20000000 ; +define symbol __region_RAM0_end__ = __region_RAM0_start__+__region_RAM0_size__-1 ; + +export symbol __region_RAM0_size__ ; +export symbol __region_RAM0_start__ ; +export symbol __region_RAM0_end__ ; + +/*- SRAM1 memory region -*/ +define symbol __region_RAM1_size__ = 0x8000 ; +define symbol __region_RAM1_start__ = 0x20080000 ; +define symbol __region_RAM1_end__ = __region_RAM1_start__+__region_RAM1_size__-1 ; + +export symbol __region_RAM1_size__ ; +export symbol __region_RAM1_start__ ; +export symbol __region_RAM1_end__ ; + +/*- Continous SRAM region (SRAM0 is mirrored) -*/ +define symbol __region_RAM_size__ = __region_RAM0_size__+__region_RAM1_size__ ; +define symbol __region_RAM_start__ = __region_RAM1_start__-__region_RAM0_size__ ; +define symbol __region_RAM_end__ = __region_RAM1_end__ ; + +export symbol __region_RAM_size__ ; +export symbol __region_RAM_start__ ; +export symbol __region_RAM_end__ ; + +/*- NFC SRAM region -*/ +define symbol __region_NFC_RAM_start__ = 0x20100000 ; +define symbol __region_NFC_RAM_end__ = 0x20100FFF ; + +export symbol __region_NFC_RAM_start__ ; +export symbol __region_NFC_RAM_end__ ; + +/*- Flash region -*/ +define symbol __region_ROM_size__ = 0x00080000 ; +define symbol __region_ROM_start__ = 0x00080000 ; +define symbol __region_ROM_end__ = __region_ROM_start__+__region_ROM_size__-1 ; + +export symbol __region_ROM_size__ ; +export symbol __region_ROM_start__ ; +export symbol __region_ROM_end__ ; + +/*-Sizes-*/ +define symbol __size_cstack__ = 0x1000 ; +define symbol __size_heap__ = 0x1000 ; + +/* Size of the IRQ Stack (Main Stack).*/ +define symbol __ICFEDIT_size_irqstack__ = 0x1000 ; + +define memory mem with size = 4G ; +define region RAM_region = mem:[from __region_RAM_start__ to __region_RAM_end__]; +define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__]; + +define block CSTACK with alignment = 8, size = __size_cstack__ {section CSTACK}; +define block IRQSTACK with alignment = 8, size = __ICFEDIT_size_irqstack__ {}; +define block SYSHEAP with alignment = 8 {section SYSHEAP}; +define block DATABSS with alignment = 8 {readwrite, zeroinit}; + +initialize by copy { readwrite }; +do not initialize { section .noinit }; + +keep { section .vtable }; + +place at start of ROM_region {section .vtable}; +place in ROM_region {readonly}; +place at start of RAM_region {block IRQSTACK}; +place in RAM_region {block DATABSS}; +place in RAM_region {block SYSHEAP}; +place at end of RAM_region {block CSTACK}; + diff --git a/bertos/cpu/cortex-m3/scripts/sam3x8_rom.ld b/bertos/cpu/cortex-m3/scripts/sam3x8_rom.ld new file mode 100644 index 0000000..bdf929e --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/sam3x8_rom.ld @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Linker script for Atmel SAM3N4 Cortex M3 processor. + * + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_rom.ld file + */ +STACK_SIZE = 0x1000; + +/* + * Memory configuration for SAM3X8. + */ +MEMORY +{ + rom(rx) : org = 0x0, len = 512k + ram(rwx) : org = 0x20000000, len = 64k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/stm32f100rb_rom.ld b/bertos/cpu/cortex-m3/scripts/stm32f100rb_rom.ld new file mode 100644 index 0000000..aebe329 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/stm32f100rb_rom.ld @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Andrea Scalise + * \Signed-off-by Matteo Silvestri + * + * \brief Script for STM32VLDiscovery Cortex-M3 board. + * + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_rom.ld file + */ +STACK_SIZE = 0x400; + +/* + * Define memory configuration for STM32F100RB + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 128k + ram(rwx) : org = 0x20000000, len = 8k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/stm32f101c4_ram.ld b/bertos/cpu/cortex-m3/scripts/stm32f101c4_ram.ld new file mode 100644 index 0000000..f78c529 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/stm32f101c4_ram.ld @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Script for STM32F101C4 cpu. + * + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_ram.ld file + */ +STACK_SIZE = 0x200; + +/* + * Define memory configuration for STM32F101C4 + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 16k + ram(rwx) : org = 0x20000000, len = 4k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_ram.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/stm32f101c4_rom.ld b/bertos/cpu/cortex-m3/scripts/stm32f101c4_rom.ld new file mode 100644 index 0000000..19dc642 --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/stm32f101c4_rom.ld @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Script for STM32F101C4 cpu. + * + */ + + +/* + * Define stack size here + * Variable used in the cortex-m3_rom.ld file + */ +STACK_SIZE = 0x200; + +/* + * Define memory configuration for STM32F101C4 + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 16k + ram(rwx) : org = 0x20000000, len = 4k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld b/bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld new file mode 100644 index 0000000..4d0884b --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/stm32f103rb_rom.ld @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Script for STM32-P103 Cortex-M3 board. + * + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_rom.ld file + */ +STACK_SIZE = 0x1000; + +/* + * Define memory configuration for STM32F103R8 + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 128k + ram(rwx) : org = 0x20000000, len = 20k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" + diff --git a/bertos/cpu/cortex-m3/scripts/stm32f103re_rom.ld b/bertos/cpu/cortex-m3/scripts/stm32f103re_rom.ld new file mode 100644 index 0000000..c7c4def --- /dev/null +++ b/bertos/cpu/cortex-m3/scripts/stm32f103re_rom.ld @@ -0,0 +1,55 @@ +/** + * \file + * + * + * \author Luca Ottaviano + * + * \brief Script for STM32P103RE Cortex-M3 MCU. + * + */ + +/* + * Define stack size here + * Variable used in the cortex-m3_rom.ld file + */ +STACK_SIZE = 0x1000; + +/* + * Define memory configuration for STM32F103RE + */ +MEMORY +{ + rom(rx) : org = 0x00000000, len = 512k + ram(rwx) : org = 0x20000000, len = 64k +} + +INCLUDE "bertos/cpu/cortex-m3/scripts/cortex-m3_rom.ld" + diff --git a/bertos/cpu/detect.h b/bertos/cpu/detect.h new file mode 100644 index 0000000..401a193 --- /dev/null +++ b/bertos/cpu/detect.h @@ -0,0 +1,577 @@ +/** + * \file + * + * + * \brief CPU detection through special preprocessor macros + */ +#ifndef CPU_DETECT_H +#define CPU_DETECT_H + +#if defined(__ARM_ARCH_4T__) /* GCC */ \ + || (defined(__ICCARM__) && (__CORE__== __ARM4TM__)) /* IAR: defined for all cores == 4tm */ + #define CPU_ARM 1 + #define CPU_ID arm + #define CPU_CORE_NAME "ARM7TDMI" + + // AT91SAM7S products serie + #if defined(__ARM_AT91SAM7S32__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_AT91SAM7S32 1 + #define CPU_NAME "AT91SAM7S32" + #else + #define CPU_ARM_AT91SAM7S32 0 + #endif + + #if defined(__ARM_AT91SAM7S64__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 + #define CPU_ARM_AT91SAM7S64 1 + #define CPU_NAME "AT91SAM7S64" + #else + #define CPU_ARM_AT91SAM7S64 0 + #endif + + #if defined(__ARM_AT91SAM7S128__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 + #define CPU_ARM_AT91SAM7S128 1 + #define CPU_NAME "AT91SAM7S128" + #else + #define CPU_ARM_AT91SAM7S128 0 + #endif + + #if defined(__ARM_AT91SAM7S256__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 + #define CPU_ARM_AT91SAM7S256 1 + #define CPU_NAME "AT91SAM7S256" + #else + #define CPU_ARM_AT91SAM7S256 0 + #endif + + #if defined(__ARM_AT91SAM7S512__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7S_LARGE 1 + #define CPU_ARM_AT91SAM7S512 1 + #define CPU_NAME "AT91SAM7S512" + #else + #define CPU_ARM_AT91SAM7S512 0 + #endif + + // AT91SAM7X products serie + #if defined(__ARM_AT91SAM7X128__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7X 1 + #define CPU_ARM_AT91SAM7X128 1 + #define CPU_NAME "AT91SAM7X128" + #else + #define CPU_ARM_AT91SAM7X128 0 + #endif + + #if defined(__ARM_AT91SAM7X256__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7X 1 + #define CPU_ARM_AT91SAM7X256 1 + #define CPU_NAME "AT91SAM7X256" + #else + #define CPU_ARM_AT91SAM7X256 0 + #endif + + + #if defined(__ARM_AT91SAM7X512__) + #define CPU_ARM_AT91 1 + #define CPU_ARM_SAM7X 1 + #define CPU_ARM_AT91SAM7X512 1 + #define CPU_NAME "AT91SAM7X512" + #else + #define CPU_ARM_AT91SAM7X512 0 + #endif + + #if defined(__ARM_LPC2378__) + #define CPU_ARM_LPC2 1 + #define CPU_ARM_LPC2378 1 + #define CPU_NAME "LPC2378" + #else + #define CPU_ARM_LPC2378 0 + #endif + + #if !defined(CPU_ARM_SAM7S_LARGE) + #define CPU_ARM_SAM7S_LARGE 0 + #endif + + #if !defined(CPU_ARM_SAM7X) + #define CPU_ARM_SAM7X 0 + #endif + + + #if defined(CPU_ARM_AT91) + #if CPU_ARM_AT91SAM7S32 + CPU_ARM_AT91SAM7S64 \ + + CPU_ARM_AT91SAM7S128 + CPU_ARM_AT91SAM7S256 \ + + CPU_ARM_AT91SAM7S512 \ + + CPU_ARM_AT91SAM7X128 + CPU_ARM_AT91SAM7X256 \ + + CPU_ARM_AT91SAM7X512 != 1 + #error ARM CPU configuration error + #endif + #define CPU_ARM_LPC2 0 + + #elif defined (CPU_ARM_LPC2) + + #if CPU_ARM_LPC2378 + 0 != 1 + #error NXP LPC2xxx ARM CPU configuration error + #endif + #define CPU_ARM_AT91 0 + /* #elif Add other ARM families here */ + #else + #define CPU_ARM_AT91 0 + #define CPU_ARM_LPC2 0 + #endif + + + #if CPU_ARM_AT91 + CPU_ARM_LPC2 + 0 /* Add other ARM families here */ != 1 + #error ARM CPU configuration error + #endif +#else + #define CPU_ARM 0 + + /* ARM Families */ + #define CPU_ARM_AT91 0 + #define CPU_ARM_LPC2 0 + + /* SAM7 sub-families */ + #define CPU_ARM_SAM7S_LARGE 0 + #define CPU_ARM_SAM7X 0 + + /* ARM CPUs */ + #define CPU_ARM_AT91SAM7S32 0 + #define CPU_ARM_AT91SAM7S64 0 + #define CPU_ARM_AT91SAM7S128 0 + #define CPU_ARM_AT91SAM7S256 0 + #define CPU_ARM_AT91SAM7S512 0 + #define CPU_ARM_AT91SAM7X128 0 + #define CPU_ARM_AT91SAM7X256 0 + #define CPU_ARM_AT91SAM7X512 0 + + #define CPU_ARM_LPC2378 0 +#endif + +#if defined(__ARM_ARCH_7M__) /* GCC */ \ + || (defined(__ICCARM__) && (__CORE__== __ARM7M__)) /* IAR: defined for all cores v7M */ + /* Cortex-M3 */ + #define CPU_CM3 1 + #define CPU_ID cm3 + #define CPU_CORE_NAME "Cortex-M3" + + #if defined (__ARM_LM3S1968__) + #define CPU_CM3_LM3S 1 + #define CPU_CM3_LM3S1968 1 + #define CPU_NAME "LM3S1968" + #else + #define CPU_CM3_LM3S1968 0 + #endif + + #if defined (__ARM_LM3S8962__) + #define CPU_CM3_LM3S 1 + #define CPU_CM3_LM3S8962 1 + #define CPU_NAME "LM3S8962" + #else + #define CPU_CM3_LM3S8962 0 + #endif + + #if defined (__ARM_STM32F100RB__) + #define CPU_CM3_STM32 1 + #define CPU_CM3_STM32F100RB 1 + #define CPU_NAME "STM32F100RB" + #else + #define CPU_CM3_STM32F100RB 0 + #endif + + #if defined (__ARM_STM32F101C4__) + #define CPU_CM3_STM32 1 + #define CPU_CM3_STM32F101C4 1 + #define CPU_NAME "STM32F101C4" + #else + #define CPU_CM3_STM32F101C4 0 + #endif + + #if defined (__ARM_STM32F103RB__) + #define CPU_CM3_STM32 1 + #define CPU_CM3_STM32F103RB 1 + #define CPU_NAME "STM32F103RB" + #else + #define CPU_CM3_STM32F103RB 0 + #endif + + #if defined (__ARM_STM32F103RE__) + #define CPU_CM3_STM32 1 + #define CPU_CM3_STM32F103RE 1 + #define CPU_NAME "STM32F103RE" + #else + #define CPU_CM3_STM32F103RE 0 + #endif + + // AT91SAM3N products serie + #if defined (__ARM_SAM3N4__) + #define CPU_CM3_SAM3 1 + #define CPU_CM3_SAM3N 1 + #define CPU_CM3_SAM3N4 1 + #define CPU_NAME "SAM3N4" + + #define CPU_CM3_SAM3S 0 + #define CPU_CM3_SAM3U 0 + #define CPU_CM3_SAM3N2 0 + #define CPU_CM3_SAM3N1 0 + #define CPU_CM3_SAM3X 0 + #else + #define CPU_CM3_SAM3N4 0 + #endif + + // AT91SAM3S products serie + #if defined (__ARM_SAM3S4__) + #define CPU_CM3_SAM3 1 + #define CPU_CM3_SAM3S 1 + #define CPU_CM3_SAM3S4 1 + #define CPU_NAME "SAM3S4" + + #define CPU_CM3_SAM3N 0 + #define CPU_CM3_SAM3U 0 + #define CPU_CM3_SAM3X 0 + #else + #define CPU_CM3_SAM3S4 0 + #endif + + // AT91SAM3U products serie + #if defined (__ARM_SAM3U4__) + #define CPU_CM3_SAM3 1 + #define CPU_CM3_SAM3U 1 + #define CPU_CM3_SAM3U4 1 + #define CPU_NAME "SAM3U4" + + #define CPU_CM3_SAM3N 0 + #define CPU_CM3_SAM3S 0 + #define CPU_CM3_SAM3X 0 + #else + #define CPU_CM3_SAM3U4 0 + #endif + + // AT91SAM3X products serie + #if defined (__ARM_SAM3X8__) + #define CPU_CM3_SAM3 1 + #define CPU_CM3_SAM3X 1 + #define CPU_CM3_SAM3X8 1 + #define CPU_NAME "SAM3X8" + + #define CPU_CM3_SAM3N 0 + #define CPU_CM3_SAM3S 0 + #define CPU_CM3_SAM3U 0 + #else + #define CPU_CM3_SAM3X8 0 + #endif + + #if defined (CPU_CM3_LM3S) + #if CPU_CM3_LM3S1968 + CPU_CM3_LM3S8962 + 0 != 1 + #error Luminary Cortex-M3 CPU configuration error + #endif + #define CPU_CM3_STM32 0 + #define CPU_CM3_SAM3 0 + #elif defined (CPU_CM3_STM32) + #if CPU_CM3_STM32F100RB + CPU_CM3_STM32F101C4 + CPU_CM3_STM32F103RB + CPU_CM3_STM32F103RE + 0 != 1 + #error STM32 Cortex-M3 CPU configuration error + #endif + #define CPU_CM3_LM3S 0 + #define CPU_CM3_SAM3 0 + #elif defined (CPU_CM3_SAM3) + #if CPU_CM3_SAM3N + CPU_CM3_SAM3U + CPU_CM3_SAM3S + CPU_CM3_SAM3X + 0 != 1 + #error SAM3 Cortex-M3 CPU configuration error + #endif + #if CPU_CM3_SAM3N4 + CPU_CM3_SAM3S4 + CPU_CM3_SAM3U4 + CPU_CM3_SAM3X8 + 0 != 1 + #error SAM3 Cortex-M3 CPU configuration error + #endif + #define CPU_CM3_LM3S 0 + #define CPU_CM3_STM32 0 + /* #elif Add other Cortex-M3 families here */ + #else + #define CPU_CM3_LM3S 0 + #define CPU_CM3_STM32 0 + #define CPU_CM3_SAM3 0 + #endif + + + #if CPU_CM3_LM3S + CPU_CM3_STM32 + CPU_CM3_SAM3 + 0 /* Add other Cortex-M3 families here */ != 1 + #error Cortex-M3 CPU configuration error + #endif + +#else + #define CPU_CM3 0 + #define CPU_CM3_LM3S 0 + #define CPU_CM3_LM3S1968 0 + #define CPU_CM3_LM3S8962 0 + + #define CPU_CM3_STM32 0 + #define CPU_CM3_STM32F100RB 0 + #define CPU_CM3_STM32F103RB 0 + #define CPU_CM3_STM32F101C4 0 + #define CPU_CM3_STM32F103RE 0 + + #define CPU_CM3_SAM3 0 + #define CPU_CM3_SAM3N 0 + #define CPU_CM3_SAM3N4 0 + #define CPU_CM3_SAM3X 0 + #define CPU_CM3_SAM3X8 0 +#endif + +#if (defined(__IAR_SYSTEMS_ICC__) || defined(__IAR_SYSTEMS_ICC)) \ + && !defined(__ICCARM__) /* IAR: if not ARM assume I196 */ + #warning Assuming CPU is I196 + #define CPU_I196 1 + #define CPU_ID i196 +#else + #define CPU_I196 0 +#endif + +#if defined(__i386__) /* GCC */ \ + || (defined(_M_IX86) && !defined(_WIN64)) /* MSVC */ + #define CPU_X86 1 + #define CPU_X86_32 1 + #define CPU_X86_64 0 + #define CPU_ID x86 + #define CPU_CORE_NAME "x86" + #define CPU_NAME "generic" +#elif defined(__x86_64__) /* GCC */ \ + || (defined(_M_IX86) && defined(_WIN64)) /* MSVC */ + #define CPU_X86 1 + #define CPU_X86_32 0 + #define CPU_X86_64 1 + #define CPU_ID x86 + #define CPU_CORE_NAME "x86_64" + #define CPU_NAME "generic" +#else + #define CPU_X86 0 + #define CPU_I386 0 + #define CPU_X86_64 0 +#endif + +#if defined (_ARCH_PPC) || defined(_ARCH_PPC64) + #define CPU_PPC 1 + #define CPU_ID ppc + #if defined(_ARCH_PPC) + #define CPU_PPC32 1 + #else + #define CPU_PPC32 0 + #endif + #if defined(_ARCH_PPC64) + #define CPU_PPC64 1 + #else + #define CPU_PPC64 0 + #endif +#else + #define CPU_PPC 0 + #define CPU_PPC32 0 + #define CPU_PPC64 0 +#endif + +#if defined(__m56800E__) || defined(__m56800__) + #define CPU_DSP56K 1 + #define CPU_ID dsp56k +#else + #define CPU_DSP56K 0 +#endif + +#if defined (__AVR__) + #define CPU_AVR 1 + #define CPU_ID avr + #define CPU_CORE_NAME "AVR" + + #if defined(__AVR_ATmega32__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA32 1 + #define CPU_NAME "ATmega32" + #else + #define CPU_AVR_ATMEGA32 0 + #endif + + #if defined(__AVR_ATmega64__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA64 1 + #define CPU_NAME "ATmega64" + #else + #define CPU_AVR_ATMEGA64 0 + #endif + + #if defined(__AVR_ATmega103__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA103 1 + #define CPU_NAME "ATmega103" + #else + #define CPU_AVR_ATMEGA103 0 + #endif + + #if defined(__AVR_ATmega128__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA128 1 + #define CPU_NAME "ATmega128" + #else + #define CPU_AVR_ATMEGA128 0 + #endif + + #if defined(__AVR_ATmega8__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA8 1 + #define CPU_NAME "ATmega8" + #else + #define CPU_AVR_ATMEGA8 0 + #endif + + #if defined(__AVR_ATmega168__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA168 1 + #define CPU_NAME "ATmega168" + #else + #define CPU_AVR_ATMEGA168 0 + #endif + + #if defined(__AVR_ATmega328P__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA328P 1 + #define CPU_NAME "ATmega328P" + #else + #define CPU_AVR_ATMEGA328P 0 + #endif + + #if defined(__AVR_ATmega1281__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA1281 1 + #define CPU_NAME "ATmega1281" + #else + #define CPU_AVR_ATMEGA1281 0 + #endif + + #if defined(__AVR_ATmega1280__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA1280 1 + #define CPU_NAME "ATmega1280" + #else + #define CPU_AVR_ATMEGA1280 0 + #endif + + #if defined(__AVR_ATmega2560__) + #define CPU_AVR_MEGA 1 + #define CPU_AVR_ATMEGA2560 1 + #define CPU_NAME "ATmega2560" + #else + #define CPU_AVR_ATMEGA2560 0 + #endif + + #if defined(__AVR_ATxmega32D4__) + #define CPU_AVR_XMEGA 1 + #define CPU_AVR_XMEGA_D 1 + #define CPU_AVR_ATXMEGA32D4 1 + #define CPU_NAME "ATxmega32d4" + #else + #define CPU_AVR_ATXMEGA32D4 0 + #endif + + #if CPU_AVR_ATMEGA32 + CPU_AVR_ATMEGA64 + CPU_AVR_ATMEGA103 + CPU_AVR_ATMEGA128 \ + + CPU_AVR_ATMEGA8 + CPU_AVR_ATMEGA168 + CPU_AVR_ATMEGA328P + CPU_AVR_ATMEGA1281 \ + + CPU_AVR_ATMEGA1280 + CPU_AVR_ATMEGA2560 + CPU_AVR_ATXMEGA32D4 != 1 + #error AVR CPU configuration error + #endif + + #if defined(CPU_AVR_XMEGA) && defined(CPU_AVR_MEGA) + #error CPU cannot be MEGA and XMEGA + #elif defined(CPU_AVR_MEGA) + #define CPU_AVR_XMEGA 0 + #define CPU_AVR_XMEGA_D 0 + #elif defined(CPU_AVR_XMEGA) + #define CPU_AVR_MEGA 0 + #endif + + #if CPU_AVR_MEGA + CPU_AVR_XMEGA != 1 + #error AVR CPU configuration error + #endif + +#else + #define CPU_AVR 0 + #define CPU_AVR_MEGA 0 + #define CPU_AVR_ATMEGA8 0 + #define CPU_AVR_ATMEGA168 0 + #define CPU_AVR_ATMEGA328P 0 + #define CPU_AVR_ATMEGA32 0 + #define CPU_AVR_ATMEGA64 0 + #define CPU_AVR_ATMEGA103 0 + #define CPU_AVR_ATMEGA128 0 + #define CPU_AVR_ATMEGA1281 0 + #define CPU_AVR_ATMEGA1280 0 + #define CPU_AVR_ATMEGA2560 0 + #define CPU_AVR_XMEGA 0 + #define CPU_AVR_XMEGA_D 0 +#endif + +#if defined (__MSP430__) + #define CPU_MSP430 1 + #define CPU_ID msp430 + #define CPU_CORE_NAME "MSP430" + + #if defined(__MSP430F2274__) + #define CPU_MSP430F2274 1 + #define CPU_NAME "MSP430F2274" + #else + #define CPU_MSP430F2274 0 + #endif + + #if defined(__MSP430G2231__) + #define CPU_MSP430G2231 1 + #define CPU_NAME "MSP430G2231" + #else + #define CPU_MSP430G2231 0 + #endif + + #if CPU_MSP430F2274 + CPU_MSP430G2231 != 1 + #error MSP430 CPU configuration error + #endif +#else + #define CPU_MSP430 0 + #define CPU_MSP430F2274 0 + #define CPU_MSP430G2231 0 +#endif + + +/* Self-check for the detection: only one CPU must be detected */ +#if CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 == 0 + #error Unknown CPU +#elif !defined(CPU_ID) + #error CPU_ID not defined +#elif CPU_ARM + CPU_CM3 + CPU_I196 + CPU_X86 + CPU_PPC + CPU_DSP56K + CPU_AVR + CPU_MSP430 != 1 + #error Internal CPU configuration error +#endif + + +#endif /* CPU_DETECT_H */ diff --git a/bertos/cpu/dsp56k/drv/buzzerled_dsp56k.h b/bertos/cpu/dsp56k/drv/buzzerled_dsp56k.h new file mode 100644 index 0000000..b9a1685 --- /dev/null +++ b/bertos/cpu/dsp56k/drv/buzzerled_dsp56k.h @@ -0,0 +1,177 @@ +/** + * \file + * + * + * \brief Hardware support for buzzers and leds in DSP56K-based boards + * + * + * \author Giovanni Bajo + */ + +/*#* + *#* $Log$ + *#* Revision 1.7 2006/07/19 12:56:25 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.6 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.5 2005/04/11 19:10:27 bernie + *#* Include top-level headers from cfg/ subdir. + *#* + *#* Revision 1.4 2004/11/16 21:54:43 bernie + *#* Changes for SC Monoboard support. + *#* + *#* Revision 1.3 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.2 2004/06/03 11:27:09 bernie + *#* Add dual-license information. + *#* + *#* Revision 1.1 2004/05/23 18:36:05 bernie + *#* Import buzzerled driver. + *#* + *#*/ + +#ifndef DRV_BUZZERLED_DSP56K_H +#define DRV_BUZZERLED_DSP56K_H + +#include +#include +#include "pwm.h" + +#if ARCH & ARCH_HECO + +/** + * \name Connection of the leds to the DSP: + * 
+ *   Led       Line    DSP Pin
+ *   ---------------------------
+ *   YELLOW    T2      HOME1/TB3
+ *   GREEN     T3      INDX1/TB2
+ *   RED       T4      PHB1/TB1
+ *
+ */ + +INLINE bool bld_is_inverted_intensity(enum BLD_DEVICE device) +{ + return (device == BLD_GREEN_LED + || device == BLD_YELLOW_LED + || device == BLD_RED_LED); +} + +INLINE bool bld_is_pwm(enum BLD_DEVICE device) +{ + // Only the buzzer is connected to a PWM + return (device == BLD_BUZZER || device == BLD_READY_LED); +} + +INLINE bool bld_is_timer(enum BLD_DEVICE device) +{ + // LEDs are connected to timers + return (device == BLD_GREEN_LED || device == BLD_YELLOW_LED || device == BLD_RED_LED); +} + +INLINE uint16_t bld_get_pwm(enum BLD_DEVICE device) +{ + switch (device) + { + default: ASSERT(0); + case BLD_BUZZER: return 5; // PWMA5 + case BLD_READY_LED: return 9; // PWMB3 + } +} + + +INLINE struct REG_TIMER_STRUCT* bld_get_timer(enum BLD_DEVICE device) +{ + switch (device) + { + default: ASSERT(0); + case BLD_GREEN_LED: return ®_TIMER_B[2]; + case BLD_RED_LED: return ®_TIMER_B[1]; + case BLD_YELLOW_LED: return ®_TIMER_B[3]; + } +} + +INLINE void bld_hw_init(void) +{ +} + +INLINE void bld_hw_set(enum BLD_DEVICE device, bool enable) +{ + if (bld_is_inverted_intensity(device)) + enable = !enable; + + // Handle a BLD connected to a PWM + if (bld_is_pwm(device)) + { + struct PWM* pwm = pwm_get_handle(bld_get_pwm(device)); + + pwm_set_enable(pwm, false); + pwm_set_dutycycle_percent(pwm, (enable ? 50 : 0)); + pwm_set_enable(pwm, true); + } + else if (bld_is_timer(device)) + { + struct REG_TIMER_STRUCT* timer = bld_get_timer(device); + + // Check that the timer is currently stopped, and the OFLAG is not + // controlled by another timer. Otherwise, the led is already + // controlled by the timer, and we cannot correctly set it + // on/off without reprogramming the timer. + ASSERT((timer->CTRL & REG_TIMER_CTRL_MODE_MASK) == REG_TIMER_CTRL_MODE_STOP); + ASSERT(!(timer->SCR & REG_TIMER_SCR_EEOF)); + + // Check also that polarity is correct + ASSERT(!(timer->SCR & REG_TIMER_SCR_OPS)); + + // Without programming the timer, we have a way to manually force a certain + // value on the external pin. We also need to enable the output pin. + timer->SCR &= ~REG_TIMER_SCR_VAL_1; + timer->SCR |= REG_TIMER_SCR_OEN | + REG_TIMER_SCR_FORCE | + (!enable ? REG_TIMER_SCR_VAL_0 : REG_TIMER_SCR_VAL_1); + } + else + ASSERT(0); +} + +#elif ARCH & ARCH_SC + +// We do not need inline functions here, because constant propagation is not big deal here +void bld_hw_init(void); +void bld_hw_set(enum BLD_DEVICE device, bool enable); + +#endif + +#endif /* DRV_BUZZERLED_DSP56K_H */ diff --git a/bertos/cpu/dsp56k/drv/kdebug_dsp56k.c b/bertos/cpu/dsp56k/drv/kdebug_dsp56k.c new file mode 100644 index 0000000..0419be1 --- /dev/null +++ b/bertos/cpu/dsp56k/drv/kdebug_dsp56k.c @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \brief General pourpose debug support for embedded systems (implementation). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#error Revise me! + +/* Debugging go through the JTAG interface. The MSL library already + implements the console I/O correctly. */ +#include +#define KDBG_WAIT_READY() do { } while (0) +#define KDBG_WRITE_CHAR(c) __put_char(c, stdout) +#define KDBG_MASK_IRQ(old) do { (void)(old); } while (0) +#define KDBG_RESTORE_IRQ(old) do { (void)(old); } while (0) +typedef uint8_t kdbg_irqsave_t; /* unused */ +#if CONFIG_KDEBUG_PORT == 666 + #error BITBANG debug console missing for this platform + +#define kdbg_hw_init() do {} while (0) ///< Not needed diff --git a/bertos/cpu/dsp56k/drv/ser_dsp56k.c b/bertos/cpu/dsp56k/drv/ser_dsp56k.c new file mode 100644 index 0000000..79d4833 --- /dev/null +++ b/bertos/cpu/dsp56k/drv/ser_dsp56k.c @@ -0,0 +1,366 @@ +/** + * \file + * + * + * + * \author Stefano Fedrigo + * \author Giovanni Bajo + * + * \brief DSP5680x CPU specific serial I/O driver + */ + + +#include +#include +#include +#include +#include +#include + +// GPIO E is shared with SPI (in DSP56807). Pins 0&1 are TXD0 and RXD0. To use +// the serial, we need to disable the GPIO functions on them. +#define REG_GPIO_SERIAL_0 REG_GPIO_E +#define REG_GPIO_SERIAL_MASK_0 0x03 + +#define REG_GPIO_SERIAL_1 REG_GPIO_D +#define REG_GPIO_SERIAL_MASK_1 0xC0 + + +// Check flag consistency +#if (SERRF_PARITYERROR != REG_SCI_SR_PF) || \ + (SERRF_RXSROVERRUN != REG_SCI_SR_OR) || \ + (SERRF_FRAMEERROR != REG_SCI_SR_FE) || \ + (SERRF_NOISEERROR != REG_SCI_SR_NF) + #error error flags do not match with register bits +#endif + +static unsigned char ser0_fifo_rx[CONFIG_SER0_FIFOSIZE_RX]; +static unsigned char ser0_fifo_tx[CONFIG_SER0_FIFOSIZE_TX]; +static unsigned char ser1_fifo_rx[CONFIG_SER1_FIFOSIZE_RX]; +static unsigned char ser1_fifo_tx[CONFIG_SER1_FIFOSIZE_TX]; + +#if CONFIG_SER_MULTI + #include + + #define MAX_MULTI_GROUPS 1 + + struct Semaphore multi_sems[MAX_MULTI_GROUPS]; +#endif + + +struct SCI +{ + struct SerialHardware hw; + struct Serial* serial; + volatile struct REG_SCI_STRUCT* regs; + IRQ_VECTOR irq_tx; + IRQ_VECTOR irq_rx; + int num_group; + int id; +}; + +static inline void enable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs) +{ + regs->CR |= REG_SCI_CR_TEIE | REG_SCI_CR_TIIE; +} + +static inline void enable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs) +{ + regs->CR |= REG_SCI_CR_RIE; +} + +static inline void disable_tx_irq_bare(volatile struct REG_SCI_STRUCT* regs) +{ + regs->CR &= ~(REG_SCI_CR_TEIE | REG_SCI_CR_TIIE); +} + +static inline void disable_rx_irq_bare(volatile struct REG_SCI_STRUCT* regs) +{ + regs->CR &= ~(REG_SCI_CR_RIE | REG_SCI_CR_REIE); +} + +static inline void disable_tx_irq(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + disable_tx_irq_bare(hw->regs); +} + +static inline void disable_rx_irq(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + disable_rx_irq_bare(hw->regs); +} + +static inline void enable_tx_irq(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + enable_tx_irq_bare(hw->regs); +} + +static inline void enable_rx_irq(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + enable_rx_irq_bare(hw->regs); +} + +static inline bool tx_irq_enabled(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + return (hw->regs->CR & REG_SCI_CR_TEIE); +} + +static void tx_isr(const struct SCI *hw) +{ +#pragma interrupt warn + volatile struct REG_SCI_STRUCT* regs = hw->regs; + + if (fifo_isempty(&hw->serial->txfifo)) + disable_tx_irq_bare(regs); + else + { + // Clear transmitter flags before sending data + (void)regs->SR; + regs->DR = fifo_pop(&hw->serial->txfifo); + } +} + +static void rx_isr(const struct SCI *hw) +{ +#pragma interrupt warn + volatile struct REG_SCI_STRUCT* regs = hw->regs; + + // Propagate errors + hw->serial->status |= regs->SR & (SERRF_PARITYERROR | + SERRF_RXSROVERRUN | + SERRF_FRAMEERROR | + SERRF_NOISEERROR); + + /* + * Serial IRQ can happen for two reason: data ready (RDRF) or overrun (OR) + * If the data is ready, we need to fetch it from the data register or + * the interrupt will retrigger immediatly. In case of overrun, instead, + * the value of the data register is meaningless. + */ + if (regs->SR & REG_SCI_SR_RDRF) + { + unsigned char data = regs->DR; + + if (fifo_isfull(&hw->serial->rxfifo)) + hw->serial->status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(&hw->serial->rxfifo, data); + } + + // Writing anything to the status register clear the error bits. + regs->SR = 0; +} + +static void init(struct SerialHardware* _hw, struct Serial* ser) +{ + struct SCI* hw = (struct SCI*)_hw; + volatile struct REG_SCI_STRUCT* regs = hw->regs; + + // Clear status register (IRQ/status flags) + (void)regs->SR; + regs->SR = 0; + + // Clear data register + (void)regs->DR; + + // Install the handlers and set priorities for both IRQs + irq_install(hw->irq_tx, (isr_t)tx_isr, hw); + irq_install(hw->irq_rx, (isr_t)rx_isr, hw); + irq_setpriority(hw->irq_tx, IRQ_PRIORITY_SCI_TX); + irq_setpriority(hw->irq_rx, IRQ_PRIORITY_SCI_RX); + + // Activate the RX error interrupts, and RX/TX transmissions + regs->CR = REG_SCI_CR_TE | REG_SCI_CR_RE; + enable_rx_irq_bare(regs); + + // Disable GPIO pins for TX and RX lines + // \todo this should be divided into serial 0 and 1 + REG_GPIO_SERIAL_0->PER |= REG_GPIO_SERIAL_MASK_0; + REG_GPIO_SERIAL_1->PER |= REG_GPIO_SERIAL_MASK_1; + + hw->serial = ser; +} + +static void cleanup(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + // Uninstall the ISRs + disable_rx_irq(_hw); + disable_tx_irq(_hw); + irq_uninstall(hw->irq_tx); + irq_uninstall(hw->irq_rx); +} + +static void setbaudrate(struct SerialHardware* _hw, unsigned long rate) +{ + struct SCI* hw = (struct SCI*)_hw; + + // SCI has an internal 16x divider on the input clock, which comes + // from the IPbus (see the scheme in user manual, 12.7.3). We apply + // it to calculate the period to store in the register. + hw->regs->BR = (IPBUS_FREQ + rate * 8ul) / (rate * 16ul); +} + +static void setparity(struct SerialHardware* _hw, int parity) +{ + // ??? + ASSERT(0); +} + + +#if CONFIG_SER_MULTI + +static void multi_init(void) +{ + static bool flag = false; + int i; + + if (flag) + return; + + for (i = 0; i < MAX_MULTI_GROUPS; ++i) + sem_init(&multi_sems[i]); + flag = true; +} + +static void init_lock(struct SerialHardware* _hw, struct Serial *ser) +{ + struct SCI* hw = (struct SCI*)_hw; + + // Initialize the multi engine (if needed) + multi_init(); + + // Acquire the lock of the semaphore for this group + ASSERT(hw->num_group >= 0); + ASSERT(hw->num_group < MAX_MULTI_GROUPS); + sem_obtain(&multi_sems[hw->num_group]); + + // Do a hardware switch to the given serial + ser_hw_switch(hw->num_group, hw->id); + + init(_hw, ser); +} + +static void cleanup_unlock(struct SerialHardware* _hw) +{ + struct SCI* hw = (struct SCI*)_hw; + + cleanup(_hw); + + sem_release(&multi_sems[hw->num_group]); +} + +#endif /* CONFIG_SER_MULTI */ + + +static const struct SerialHardwareVT SCI_VT = +{ + .init = init, + .cleanup = cleanup, + .setBaudrate = setbaudrate, + .setParity = setparity, + .txStart = enable_tx_irq, + .txSending = tx_irq_enabled, +}; + +#if CONFIG_SER_MULTI +static const struct SerialHardwareVT SCI_MULTI_VT = +{ + .init = init_lock, + .cleanup = cleanup_unlock, + .setBaudrate = setbaudrate, + .setParity = setparity, + .txStart = enable_tx_irq, + .txSending = tx_irq_enabled, +}; +#endif /* CONFIG_SER_MULTI */ + +#define SCI_DESC_NORMAL(hwch) \ + { \ + .hw = \ + { \ + .table = &SCI_VT, \ + .rxbuffer = ser ## hwch ## _fifo_rx, \ + .txbuffer = ser ## hwch ## _fifo_tx, \ + .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \ + .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \ + }, \ + .regs = ®_SCI[hwch], \ + .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \ + .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \ + .num_group = -1, \ + .id = -1, \ + } \ + /**/ + +#if CONFIG_SER_MULTI +#define SCI_DESC_MULTI(hwch, group_, id_) \ + { \ + .hw = \ + { \ + .table = &SCI_MULTI_VT, \ + .rxbuffer = ser ## hwch ## _fifo_rx, \ + .txbuffer = ser ## hwch ## _fifo_tx, \ + .rxbuffer_size = countof(ser ## hwch ## _fifo_rx), \ + .txbuffer_size = countof(ser ## hwch ## _fifo_tx), \ + }, \ + .regs = ®_SCI[hwch], \ + .irq_rx = IRQ_SCI ## hwch ## _RECEIVER_FULL, \ + .irq_tx = IRQ_SCI ## hwch ## _TRANSMITTER_READY, \ + .num_group = group_, \ + .id = id_, \ + } \ + /**/ +#endif /* CONFIG_SER_MULTI */ + +// \todo Move this into hw.h, with a little preprocessor magic +static struct SCI SCIDescs[] = +{ + SCI_DESC_NORMAL(0), + SCI_DESC_MULTI(1, 0, 0), + SCI_DESC_MULTI(1, 0, 1), +}; + +struct SerialHardware* ser_hw_getdesc(int unit) +{ + ASSERT(unit < countof(SCIDescs)); + return &SCIDescs[unit].hw; +} diff --git a/bertos/cpu/dsp56k/drv/ser_dsp56k.h b/bertos/cpu/dsp56k/drv/ser_dsp56k.h new file mode 100644 index 0000000..57dc456 --- /dev/null +++ b/bertos/cpu/dsp56k/drv/ser_dsp56k.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * + * \author Daniele Basile + * + * \brief Low-level serial module for ARM (interface). + */ + +#include /* BV() */ +#include /* uint32_t */ + +typedef uint16_t serstatus_t; + +/* Software errors */ +#define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ +#define SERRF_RXTIMEOUT BV(1) /**< Receive timeout */ +#define SERRF_TXTIMEOUT BV(2) /**< Transmit timeout */ + +/* + * Hardware errors. + * These flags map directly to the SCI Control Register. + */ +#define SERRF_PARITYERROR BV(8) /**< Parity error */ +#define SERRF_FRAMEERROR BV(9) /**< Stop bit missing */ +#define SERRF_NOISEERROR BV(10) /**< Noise error */ +#define SERRF_RXSROVERRUN BV(11) /**< Rx shift register overrun */ + +/** + * \name Serial hw numbers + * + * \{ + */ +enum +{ +// \todo since we now support "fake" multiplexed serials, this should be moved to hw.h +SER_UART0, +SER_PUNTALI, +SER_BARCODE, +SER_CNT /**< Number of serial ports */ +}; +/*\}*/ diff --git a/bertos/cpu/dsp56k/drv/timer_dsp56k.h b/bertos/cpu/dsp56k/drv/timer_dsp56k.h new file mode 100644 index 0000000..358f6ee --- /dev/null +++ b/bertos/cpu/dsp56k/drv/timer_dsp56k.h @@ -0,0 +1,147 @@ +#error This code must be revised for the new timer API +/** + * \file + * + * + * + * \author Giovanni Bajo + * + * \brief Driver module for DSP56K + */ + +/*#* + *#* $Log$ + *#* Revision 1.10 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.9 2006/02/21 21:28:02 bernie + *#* New time handling based on TIMER_TICKS_PER_SEC to support slow timers with ticks longer than 1ms. + *#* + *#* Revision 1.8 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.7 2005/04/11 19:10:28 bernie + *#* Include top-level headers from cfg/ subdir. + *#* + *#* Revision 1.6 2004/11/16 22:37:14 bernie + *#* Replace IPTR with iptr_t. + *#* + *#* Revision 1.5 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.4 2004/07/30 14:27:49 rasky + *#* Aggiornati alcuni file DSP56k per la nuova libreria di IRQ management + *#* + *#* Revision 1.3 2004/06/06 18:30:34 bernie + *#* Import DSP56800 changes from SC. + *#* + *#* Revision 1.2 2004/06/03 11:27:09 bernie + *#* Add dual-license information. + *#* + *#* Revision 1.1 2004/05/23 18:23:30 bernie + *#* Import drv/timer module. + *#* + *#*/ + +#ifndef DRV_TIMER_DSP56K_H +#define DRV_TIMER_DSP56K_H + +#include "timer.h" +#include +#include +#include +#include + +// Calculate register pointer and irq vector from hw.h setting +#define REG_SYSTEM_TIMER PP_CAT(REG_TIMER_, SYSTEM_TIMER) +#define SYSTEM_TIMER_IRQ_VECTOR PP_CAT(IRQ_TIMER_, SYSTEM_TIMER) + +/// Prescaler for the system timer +#define TIMER_PRESCALER 16 + +/// Frequency of the hardware high precision timer +#define TIMER_HW_HPTICKS_PER_SEC (IPBUS_FREQ / TIMER_PRESCALER) + +/// Type of time expressed in ticks of the hardware high precision timer +typedef uint16_t hptime_t; + +static void system_timer_isr(UNUSED(iptr_t, arg)); + +static void timer_hw_init(void) +{ + uint16_t compare; + + // Clear compare flag status and enable interrupt on compare + REG_SYSTEM_TIMER->SCR &= ~REG_TIMER_SCR_TCF; + REG_SYSTEM_TIMER->SCR |= REG_TIMER_SCR_TCFIE; + + // Calculate the compare value needed to generate an interrupt exactly + // TICKS_PER_SEC times each second (usually, every millisecond). Check that + // the calculation is accurate, otherwise there is a precision error + // (probably the prescaler is too big or too small). + compare = TIMER_HW_HPTICKS_PER_SEC / TICKS_PER_SEC; + ASSERT((uint32_t)compare * TICKS_PER_SEC == IPBUS_FREQ / TIMER_PRESCALER); + REG_SYSTEM_TIMER->CMP1 = compare; + + // The value for reload (at initializationa and after compare is met) is zero + REG_SYSTEM_TIMER->LOAD = 0; + + // Set the interrupt handler and priority + irq_install(SYSTEM_TIMER_IRQ_VECTOR, &system_timer_isr, NULL); + irq_setpriority(SYSTEM_TIMER_IRQ_VECTOR, IRQ_PRIORITY_SYSTEM_TIMER); + + // Small preprocessor trick to generate the REG_TIMER_CTRL_PRIMARY_IPBYNN macro + // needed to set the prescaler + #define REG_CONTROL_PRESCALER PP_CAT(REG_TIMER_CTRL_PRIMARY_IPBY, TIMER_PRESCALER) + + // Setup the counter and start counting + REG_SYSTEM_TIMER->CTRL = + REG_TIMER_CTRL_MODE_RISING | // count rising edges (normal) + REG_CONTROL_PRESCALER | // frequency (IPbus / TIMER_PRESCALER) + REG_TIMER_CTRL_LENGTH; // up to CMP1, then reload +} + +INLINE void timer_hw_irq(void) +{ + // Clear the overflow flag so that we are ready for another interrupt + REG_SYSTEM_TIMER->SCR &= ~REG_TIMER_SCR_TCF; +} + +INLINE hptime_t timer_hw_hpread(void) +{ + return REG_SYSTEM_TIMER->CNTR; +} + +#define DEFINE_TIMER_ISR \ + static void system_timer_isr(UNUSED(iptr_t, arg)) + +#endif /* DRV_TIMER_DSP56_H */ diff --git a/bertos/cpu/dsp56k/hw/switch_dsp56k.c b/bertos/cpu/dsp56k/hw/switch_dsp56k.c new file mode 100644 index 0000000..73c3b6f --- /dev/null +++ b/bertos/cpu/dsp56k/hw/switch_dsp56k.c @@ -0,0 +1,100 @@ +/** + * \file + * + * + * \author Giovanni Bajo + * + * \brief DSP5680x task switching support + */ + +void asm_switch_context(void ** new_sp /* R2 */, void ** save_sp /* R3 */); +asm void asm_switch_context(void ** new_sp, void ** save_sp) +{ + lea (SP)+ + + ; From the manual: + ; The compiler uses page 0 address locations X: 0x0030 - 0x003F as register + ; variables. Frequently accessed local variables are assigned to the page 0 + ; registers instead of to stack locations so that load and store instructions + ; are shortened. Addresses X: 0x0030 - 0x0037 (page 0 registers MR0-MR7) are + ; volatile registers and can be overwritten. The remaining registers (page 0 + ; registers MR8-MR15) are treated as non-volatile and, if used by a routine, + ; must be saved on entry and restored on exit. + ; + ; So, register 0x30-0x37 are caller-save, while 0x38-0x3F are callee-save. + move x:<$38,y1 + move y1,x:(SP)+ + move x:<$39,y1 + move y1,x:(SP)+ + move x:<$3A,y1 + move y1,x:(SP)+ + move x:<$3B,y1 + move y1,x:(SP)+ + move x:<$3C,y1 + move y1,x:(SP)+ + move x:<$3D,y1 + move y1,x:(SP)+ + move x:<$3E,y1 + move y1,x:(SP)+ + move x:<$3F,y1 + move y1,x:(SP) + + ; + ; Switch stacks + nop + move SP, x:(R3) + nop + move x:(R2), SP + nop + + ; + ; restore all saved registers + ; + pop y1 + move y1,x:<$3F + pop y1 + move y1,x:<$3E + pop y1 + move y1,x:<$3D + pop y1 + move y1,x:<$3C + pop y1 + move y1,x:<$3B + pop y1 + move y1,x:<$3A + pop y1 + move y1,x:<$39 + pop y1 + move y1,x:<$38 + + ; SR is already pushed on the stack (normal call context). Use RTI to restore + ; it, so that interrupt status is preserved across the tasks. + rti +} diff --git a/bertos/cpu/frame.h b/bertos/cpu/frame.h new file mode 100644 index 0000000..63d341c --- /dev/null +++ b/bertos/cpu/frame.h @@ -0,0 +1,279 @@ +/** + * \file + * + * + * \brief CPU-specific stack frame handling macros. + * + * These are mainly used by the portable part of the scheduler + * to work with the process stack frames. + * + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ +#ifndef CPU_FRAME_H +#define CPU_FRAME_H + +#include + +#include "cfg/cfg_arch.h" /* ARCH_EMUL */ +#include /* for uintXX_t */ + +#if CPU_X86 + #if CPU_X86_32 + #define CPU_SAVED_REGS_CNT 2 + #elif CPU_X86_64 + #define CPU_SAVED_REGS_CNT 8 + #else + #error "unknown CPU" + #endif + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 0 + +#elif CPU_ARM + + #define CPU_SAVED_REGS_CNT 8 + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 0 + +#elif CPU_CM3 + + #define CPU_SAVED_REGS_CNT 8 + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 0 + +#elif CPU_PPC + + #define CPU_SAVED_REGS_CNT 1 + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 1 + +#elif CPU_DSP56K + + #define CPU_SAVED_REGS_CNT 8 + #define CPU_STACK_GROWS_UPWARD 1 + #define CPU_SP_ON_EMPTY_SLOT 0 + +#elif CPU_AVR + + #define CPU_SAVED_REGS_CNT 18 + #define CPU_STACK_GROWS_UPWARD 0 + #define CPU_SP_ON_EMPTY_SLOT 1 + +#elif CPU_MSP430 + + #define CPU_SAVED_REGS_CNT 16 + #define CPU_STACK_GROWS_UPWARD 1 + #define CPU_SP_ON_EMPTY_SLOT 0 + +#else + #error No CPU_... defined. +#endif + +#ifndef CPU_STACK_GROWS_UPWARD + #error CPU_STACK_GROWS_UPWARD should have been defined to either 0 or 1 +#endif + +#ifndef CPU_SP_ON_EMPTY_SLOT + #error CPU_SP_ON_EMPTY_SLOT should have been defined to either 0 or 1 +#endif + +/// Default for macro not defined in the right arch section +#ifndef CPU_REG_INIT_VALUE + #define CPU_REG_INIT_VALUE(reg) (reg) +#endif + +/* + * Support stack handling peculiarities of a few CPUs. + * + * Most processors let their stack grow downward and + * keep SP pointing at the last pushed value. + */ +#if !CPU_STACK_GROWS_UPWARD + #if !CPU_SP_ON_EMPTY_SLOT + /* Most microprocessors (x86, m68k...) */ + #define CPU_PUSH_WORD(sp, data) \ + do { *--(sp) = (data); } while (0) + #define CPU_POP_WORD(sp) \ + (*(sp)++) + #else + /* AVR insanity */ + #define CPU_PUSH_WORD(sp, data) \ + do { *(sp)-- = (data); } while (0) + #define CPU_POP_WORD(sp) \ + (*++(sp)) + #endif + +#else /* CPU_STACK_GROWS_UPWARD */ + + #if !CPU_SP_ON_EMPTY_SLOT + /* DSP56K and other weirdos */ + #define CPU_PUSH_WORD(sp, data) \ + do { *++(sp) = (cpu_stack_t)(data); } while (0) + #define CPU_POP_WORD(sp) \ + (*(sp)--) + #else + #error I bet you cannot find a CPU like this + #endif +#endif + + +#if CPU_DSP56K + /* + * DSP56k pushes both PC and SR to the stack in the JSR instruction, but + * RTS discards SR while returning (it does not restore it). So we push + * 0 to fake the same context. + */ + #define CPU_PUSH_CALL_FRAME(sp, func) \ + do { \ + CPU_PUSH_WORD((sp), (func)); \ + CPU_PUSH_WORD((sp), 0x100); \ + } while (0); + +#elif CPU_CM3 + + #if CONFIG_KERN_PREEMPT + INLINE void cm3_preempt_switch_context(cpu_stack_t **new_sp, cpu_stack_t **old_sp) + { + register cpu_stack_t **__new_sp asm ("r0") = new_sp; + register cpu_stack_t **__old_sp asm ("r1") = old_sp; + + asm volatile ("svc #0" + : : "r"(__new_sp), "r"(__old_sp) : "memory", "cc"); + } + #define asm_switch_context cm3_preempt_switch_context + + #define CPU_CREATE_NEW_STACK(stack) \ + do { \ + size_t i; \ + /* Initialize process stack frame */ \ + CPU_PUSH_WORD((stack), 0x01000000); /* xPSR */ \ + CPU_PUSH_WORD((stack), (cpu_stack_t)proc_entry); /* pc */ \ + CPU_PUSH_WORD((stack), 0); /* lr */ \ + CPU_PUSH_WORD((stack), 0); /* ip */ \ + CPU_PUSH_WORD((stack), 0); /* r3 */ \ + CPU_PUSH_WORD((stack), 0); /* r2 */ \ + CPU_PUSH_WORD((stack), 0); /* r1 */ \ + CPU_PUSH_WORD((stack), 0); /* r0 */ \ + CPU_PUSH_WORD((stack), 0xfffffffd); /* lr_exc */ \ + /* Push a clean set of CPU registers for asm_switch_context() */ \ + for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \ + CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \ + CPU_PUSH_WORD(stack, IRQ_PRIO_DISABLED); \ + } while (0) + + #endif /* CONFIG_KERN_PREEMPT */ + +#elif CPU_AVR + /* + * On AVR, addresses are pushed into the stack as little-endian, while + * memory accesses are big-endian (actually, it's a 8-bit CPU, so there is + * no natural endianess). + */ + #define CPU_PUSH_CALL_FRAME(sp, func) \ + do { \ + uint16_t funcaddr = (uint16_t)(func); \ + CPU_PUSH_WORD((sp), funcaddr); \ + CPU_PUSH_WORD((sp), funcaddr>>8); \ + } while (0) + + /* + * If the kernel is in idle-spinning, the processor executes: + * + * IRQ_ENABLE; + * CPU_IDLE; + * IRQ_DISABLE; + * + * IRQ_ENABLE is translated in asm as "sei" and IRQ_DISABLE as "cli". + * We could define CPU_IDLE to expand to none, so the resulting + * asm code would be: + * + * sei; + * cli; + * + * But Atmel datasheet states: + * "When using the SEI instruction to enable interrupts, + * the instruction following SEI will be executed *before* + * any pending interrupts", so "cli" is executed before any + * pending interrupt with the result that IRQs will *NOT* + * be enabled! + * To ensure that IRQ will run a NOP is required. + */ + #define CPU_IDLE NOP + +#elif CPU_PPC + + #define CPU_PUSH_CALL_FRAME(sp, func) \ + do { \ + CPU_PUSH_WORD((sp), (cpu_stack_t)(func)); /* LR -> 8(SP) */ \ + CPU_PUSH_WORD((sp), 0); /* CR -> 4(SP) */ \ + } while (0) + +#endif + +#ifndef CPU_PUSH_CALL_FRAME + #define CPU_PUSH_CALL_FRAME(sp, func) \ + CPU_PUSH_WORD((sp), (cpu_stack_t)(func)) +#endif + +/** + * \def CPU_IDLE + * + * \brief Invoked by the scheduler to stop the CPU when idle. + * + * This hook can be redefined to put the CPU in low-power mode, or to + * profile system load with an external strobe, or to save CPU cycles + * in hosted environments such as emulators. + */ +#ifndef CPU_IDLE + #define CPU_IDLE PAUSE +#endif /* !CPU_IDLE */ + +/** + * Default macro for creating a new Process stack + */ +#ifndef CPU_CREATE_NEW_STACK + + #define CPU_CREATE_NEW_STACK(stack) \ + do { \ + size_t i; \ + /* Initialize process stack frame */ \ + CPU_PUSH_CALL_FRAME(stack, proc_entry); \ + /* Push a clean set of CPU registers for asm_switch_context() */ \ + for (i = 0; i < CPU_SAVED_REGS_CNT; i++) \ + CPU_PUSH_WORD(stack, CPU_REG_INIT_VALUE(i)); \ + } while (0) +#endif + +#endif /* CPU_ATTR_H */ diff --git a/bertos/cpu/i196/drv/kdebug_i196.c b/bertos/cpu/i196/drv/kdebug_i196.c new file mode 100644 index 0000000..73ae2c2 --- /dev/null +++ b/bertos/cpu/i196/drv/kdebug_i196.c @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief General pourpose debug support for embedded systems (implementation). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#error Revise me! + +#include +#include /* for BV() */ +#include +#include /* for CPU_FREQ */ +#include /* Required for bus macros overrides */ + + +#include "Util196.h" +#define KDBG_WAIT_READY() do {} while (!(SP_STAT & (SPSF_TX_EMPTY | SPSF_TX_INT))) +#define KDBG_WRITE_CHAR(c) do { SBUF = (c); } while(0) +#define KDBG_MASK_IRQ(old) \ + do { \ + (old) = INT_MASK1 & INT1F_TI; \ + INT_MASK1 &= ~INT1F_TI; \ + } while(0) +#define KDBG_RESTORE_IRQ(old) do { INT_MASK1 |= (old); } +typedef uint16_t kdbg_irqsave_t; /* FIXME: unconfirmed */ + +#if CONFIG_KDEBUG_PORT == 666 + #error BITBANG debug console missing for this platform +#endif + + +INLINE void kdbg_hw_init(void) +{ + /* Set serial port for 19200bps 8N1 */ + INT_MASK1 &= ~(INT1F_TI | INT1F_RI); + SP_CON = SPCF_RECEIVE_ENABLE | SPCF_MODE1; + ioc1_img |= IOC1F_TXD_SEL | IOC1F_EXTINT_SRC; + IOC1 = ioc1_img; + BAUD_RATE = 0x33; + BAUD_RATE = 0x80; +} diff --git a/bertos/cpu/i196/drv/ser_i196.c b/bertos/cpu/i196/drv/ser_i196.c new file mode 100644 index 0000000..7cfa18d --- /dev/null +++ b/bertos/cpu/i196/drv/ser_i196.c @@ -0,0 +1,133 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief CPU specific serial I/O driver + */ + +/*#* + *#* $Log$ + *#* Revision 1.7 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.6 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.5 2004/12/13 11:51:08 bernie + *#* DISABLE_INTS/ENABLE_INTS: Convert to IRQ_DISABLE/IRQ_ENABLE. + *#* + *#* Revision 1.4 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.3 2004/06/03 11:27:09 bernie + *#* Add dual-license information. + *#* + *#* Revision 1.2 2004/05/23 18:21:53 bernie + *#* Trim CVS logs and cleanup header info. + *#* + *#*/ + +#include "hw.h" +#include "serhw.h" + +#define SER_HW_ENABLE_TX \ + ATOMIC( \ + if (!ser_sending) \ + { \ + ser_sending = true; \ + (INT_PEND1 |= INT1F_TI) \ + } \ + ); + +static volatile bool ser_sending; + +// Serial TX intr +INTERRUPT(0x30) void TI_interrupt(void) +{ + if (CANT_SEND) + { + ser_sending = false; + return; + } + + /* Can we send two bytes at the same time? */ + if (SP_STAT & SPSF_TX_EMPTY) + { + SBUF = fifo_pop(&ser_txfifo); + + if (CANT_SEND) + { + ser_sending = false; + return; + } + } + + SBUF = fifo_pop(&ser_txfifo); +} + +INTERRUPT(0x32) void RI_interrupt(void) +{ + ser_status |= SP_STAT & + (SPSF_OVERRUN_ERROR | SPSF_PARITY_ERROR | SPSF_FRAMING_ERROR); + if (fifo_isfull(&ser_rxfifo)) + ser_status |= SERRF_RXFIFOOVERRUN; + else + fifo_push(&ser_rxfifo, SBUF); +} + +static void ser_setbaudrate(unsigned long rate) +{ + // Calcola il periodo per la generazione del baud rate richiesto + uint16_t baud = (uint16_t)(((CPU_FREQ / 16) / rate) - 1) | 0x8000; + BAUD_RATE = (uint8_t)baud; + BAUD_RATE = (uint8_t)(baud >> 8); +} + +static void ser_hw_init(void) +{ + // Inizializza la porta seriale + SP_CON = SPCF_RECEIVE_ENABLE | SPCF_MODE1; + ioc1_img |= IOC1F_TXD_SEL | IOC1F_EXTINT_SRC; + IOC1 = ioc1_img; + + // Svuota il buffer di ricezione + { + uint8_t dummy = SBUF; + } + + // Abilita gli interrupt + INT_MASK1 |= INT1F_TI | INT1F_RI; +} + diff --git a/bertos/cpu/i196/drv/timer_i196.h b/bertos/cpu/i196/drv/timer_i196.h new file mode 100644 index 0000000..dcd9381 --- /dev/null +++ b/bertos/cpu/i196/drv/timer_i196.h @@ -0,0 +1,88 @@ +#error This code must be revised for the new timer API +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Low-level timer module for AVR + */ + +/*#* + *#* $Log$ + *#* Revision 1.7 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.6 2006/02/21 21:28:02 bernie + *#* New time handling based on TIMER_TICKS_PER_SEC to support slow timers with ticks longer than 1ms. + *#* + *#* Revision 1.5 2005/11/04 16:20:02 bernie + *#* Fix reference to README.devlib in header. + *#* + *#* Revision 1.4 2004/12/13 11:51:08 bernie + *#* DISABLE_INTS/ENABLE_INTS: Convert to IRQ_DISABLE/IRQ_ENABLE. + *#* + *#* Revision 1.3 2004/08/25 14:12:08 rasky + *#* Aggiornato il comment block dei log RCS + *#* + *#* Revision 1.2 2004/06/03 11:27:09 bernie + *#* Add dual-license information. + *#* + *#* Revision 1.1 2004/05/23 18:23:30 bernie + *#* Import drv/timer module. + *#* + *#*/ + +#ifndef TIMER_I196_H +#define TIMER_I196_H + +/** + * Retrigger TIMER2, adjusting the time to account for + * the interrupt prologue latency. + */ +#define TIMER_RETRIGGER (TIMER2 -= TICKS_RATE) + +#define TIMER_INIT \ + TIMER2 = (65535 - TICKS_RATE); \ + INT_MASK1 |= INT1F_T2OVF; \ + ATOMIC( \ + WSR = 1; \ + IOC3 |= IOC3F_T2_ENA; \ + WSR = 0; \ + ) + +#define DEFINE_TIMER_ISR \ + INTERRUPT(0x38) void TM2_OVFL_interrupt(void); \ + INTERRUPT(0x38) void TM2_OVFL_interrupt(void) + +#endif /* DRV_TIMER_I196_H */ diff --git a/bertos/cpu/i196/hw/switch_i196.s32 b/bertos/cpu/i196/hw/switch_i196.s32 new file mode 100644 index 0000000..72e983a --- /dev/null +++ b/bertos/cpu/i196/hw/switch_i196.s32 @@ -0,0 +1,91 @@ +;* Copyright 2004 Develer S.r.l. (http://www.develer.com/) +;* Copyright 1999,2000,2001 Bernie Innocenti +;* This file is part of DevLib - See devlib/README for information. +;* +;* +;* \author Bernie Innocenti +;* + +;* $Log$ +;* Revision 1.2 2004/06/06 16:14:12 bernie +;* Add DevLib license information. +;* +;* Revision 1.1 2004/05/23 17:27:00 bernie +;* Import kern/ subdirectory. +;* +;* + +!!!!!! THIS FILE HAS NOT BEEN REVISED FOR THE NEW SCHEDULER API !!!!!! + + + + NAME AsmSwitch + RSEG CODE + + EXTERN ?LR + EXTERN ?GR + PUBLIC AsmSwitchContext + PUBLIC AsmReplaceContext + + +;* Perform low-level process context switching +;* +;* void AsmSwitchContext(cpustack_t *new_sp, cpustack_t **save_sp) +;* GR+0 SP+2 +;* +;* Replace current context with new process +;* +;* void AsmReplaceContext(cpustack_t *new_sp, cpustack_t **dummy) +;* GR+0 SP+2 +;* + +AsmSwitchContext: + +; pop 2nd parameter from the stack + ld ?GR+2,2[SP] + +; save all registers + push ?LR+0 + push ?LR+2 + push ?LR+4 + push ?LR+6 + push ?LR+8 + push ?LR+10 + push ?LR+12 + push ?LR+14 + push ?LR+16 + push ?LR+18 + push ?LR+20 + push ?LR+22 + push ?LR+24 + push ?LR+26 + push ?LR+28 + push ?LR+30 + st SP,[?GR+2] ; save old stack pointer + ; fall-thru + +AsmReplaceContext: + ld SP,?GR+0 ; load new stack pointer + +; restore all registers + pop ?LR+30 + pop ?LR+28 + pop ?LR+26 + pop ?LR+24 + pop ?LR+22 + pop ?LR+20 + pop ?LR+18 + pop ?LR+16 + pop ?LR+14 + pop ?LR+12 + pop ?LR+10 + pop ?LR+8 + pop ?LR+6 + pop ?LR+4 + pop ?LR+2 + pop ?LR+0 + +; restore execution in new context + ret + + END diff --git a/bertos/cpu/irq.h b/bertos/cpu/irq.h new file mode 100644 index 0000000..ae0b486 --- /dev/null +++ b/bertos/cpu/irq.h @@ -0,0 +1,624 @@ +/** + * \file + * + * + * \brief CPU-specific IRQ definitions. + * + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ +#ifndef CPU_IRQ_H +#define CPU_IRQ_H + +#include "detect.h" +#include "types.h" + +#include /* proc_needPreempt() / proc_preempt() */ + +#include /* for uintXX_t */ +#include "cfg/cfg_proc.h" /* CONFIG_KERN_PREEMPT */ + +#if CPU_I196 + #define IRQ_DISABLE disable_interrupt() + #define IRQ_ENABLE enable_interrupt() +#elif CPU_X86 + + /* Get IRQ_* definitions from the hosting environment. */ + #include + #if OS_EMBEDDED + #define IRQ_DISABLE FIXME + #define IRQ_ENABLE FIXME + #define IRQ_SAVE_DISABLE(x) FIXME + #define IRQ_RESTORE(x) FIXME + #endif /* OS_EMBEDDED */ + +#elif CPU_CM3 + /* Cortex-M3 */ + + /* + * Interrupt priority. + * + * NOTE: 0 means that an interrupt is not affected by the global IRQ + * priority settings. + */ + #define IRQ_PRIO 0x80 + #define IRQ_PRIO_MIN 0xf0 + #define IRQ_PRIO_MAX 0 + /* + * To disable interrupts we just raise the system base priority to a + * number lower than the default IRQ priority. In this way, all the + * "normal" interrupt can't be triggered. High-priority interrupt can + * still happen (at the moment only the soft-interrupt svcall uses a + * priority greater than the default IRQ priority). + * + * To enable interrupts we set the system base priority to 0, that + * means IRQ priority mechanism is disabled, and any interrupt can + * happen. + */ + #define IRQ_PRIO_DISABLED 0x40 + #define IRQ_PRIO_ENABLED 0 + + #ifdef __IAR_SYSTEMS_ICC__ + INLINE cpu_flags_t CPU_READ_FLAGS(void) + { + return __get_BASEPRI(); + } + + INLINE void CPU_WRITE_FLAGS(cpu_flags_t flags) + { + __set_BASEPRI(flags); + } + + extern uint32_t CPU_READ_IPSR(void); + extern bool irq_running(void); + + #define IRQ_DISABLE CPU_WRITE_FLAGS(IRQ_PRIO_DISABLED) + + #define IRQ_ENABLE CPU_WRITE_FLAGS(IRQ_PRIO_ENABLED) + + #define IRQ_SAVE_DISABLE(x) \ + do { \ + x = CPU_READ_FLAGS(); \ + IRQ_DISABLE; \ + } while (0) + + #define IRQ_RESTORE(x) \ + do { \ + CPU_WRITE_FLAGS(x); \ + } while (0) + #else /* !__IAR_SYSTEMS_ICC__ */ + #define IRQ_DISABLE \ + ({ \ + register cpu_flags_t reg = IRQ_PRIO_DISABLED; \ + asm volatile ( \ + "msr basepri, %0" \ + : : "r"(reg) : "memory", "cc"); \ + }) + + #define IRQ_ENABLE \ + ({ \ + register cpu_flags_t reg = IRQ_PRIO_ENABLED; \ + asm volatile ( \ + "msr basepri, %0" \ + : : "r"(reg) : "memory", "cc"); \ + }) + + #define CPU_READ_FLAGS() \ + ({ \ + register cpu_flags_t reg; \ + asm volatile ( \ + "mrs %0, basepri" \ + : "=r"(reg) : : "memory", "cc"); \ + reg; \ + }) + + #define IRQ_SAVE_DISABLE(x) \ + ({ \ + x = CPU_READ_FLAGS(); \ + IRQ_DISABLE; \ + }) + + #define IRQ_RESTORE(x) \ + ({ \ + asm volatile ( \ + "msr basepri, %0" \ + : : "r"(x) : "memory", "cc"); \ + }) + + INLINE bool irq_running(void) + { + register uint32_t ret; + + /* + * Check if the current stack pointer is the main stack or + * process stack: we use the main stack only in Handler mode, + * so this means we're running inside an ISR. + */ + asm volatile ( + "mrs %0, msp\n\t" + "cmp sp, %0\n\t" + "ite ne\n\t" + "movne %0, #0\n\t" + "moveq %0, #1\n\t" : "=r"(ret) : : "cc"); + return ret; + } + #endif /* __IAR_SYSTEMS_ICC__ */ + + #define IRQ_ENABLED() (CPU_READ_FLAGS() == IRQ_PRIO_ENABLED) + + #define IRQ_RUNNING() irq_running() + + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + + #define DECLARE_ISR_CONTEXT_SWITCH(func) \ + void func(void); \ + INLINE void __isr_##func(void); \ + void func(void) \ + { \ + __isr_##func(); \ + if (!proc_needPreempt()) \ + return; \ + /* + * Set a PendSV request. + * + * The preemption handler will be called immediately + * after this ISR in tail-chaining mode (without the + * overhead of hardware state saving and restoration + * between interrupts). + */ \ + HWREG(NVIC_INT_CTRL) = NVIC_INT_CTRL_PEND_SV; \ + } \ + INLINE void __isr_##func(void) + + /** + * With task priorities enabled each ISR is used a point to + * check if we need to perform a context switch. + * + * Instead, without priorities a context switch can occur only + * when the running task expires its time quantum. In this last + * case, the context switch can only occur in the timer ISR, + * that must be always declared with the + * DECLARE_ISR_CONTEXT_SWITCH() macro. + */ + #if CONFIG_KERN_PRI + #define DECLARE_ISR(func) \ + DECLARE_ISR_CONTEXT_SWITCH(func) + /** + * Interrupt service routine prototype: can be used for + * forward declarations. + */ + #define ISR_PROTO(func) \ + ISR_PROTO_CONTEXT_SWITCH(func) + #endif /* !CONFIG_KERN_PRI */ + #endif + + #ifndef ISR_PROTO + #define ISR_PROTO(func) void func(void) + #endif + #ifndef DECLARE_ISR + #define DECLARE_ISR(func) void func(void) + #endif + #ifndef DECLARE_ISR_CONTEXT_SWITCH + #define DECLARE_ISR_CONTEXT_SWITCH(func) void func(void) + #endif + #ifndef ISR_PROTO_CONTEXT_SWITCH + #define ISR_PROTO_CONTEXT_SWITCH(func) void func(void) + #endif + +#elif CPU_ARM + + #ifdef __IAR_SYSTEMS_ICC__ + + #include + + #if __CPU_MODE__ == 1 /* Thumb */ + /* Use stubs */ + extern cpu_flags_t get_CPSR(void); + extern void set_CPSR(cpu_flags_t flags); + #else + #define get_CPSR __get_CPSR + #define set_CPSR __set_CPSR + #endif + + #define IRQ_DISABLE __disable_interrupt() + #define IRQ_ENABLE __enable_interrupt() + + #define IRQ_SAVE_DISABLE(x) \ + do { \ + (x) = get_CPSR(); \ + __disable_interrupt(); \ + } while (0) + + #define IRQ_RESTORE(x) \ + do { \ + set_CPSR(x); \ + } while (0) + + #define IRQ_ENABLED() \ + ((bool)(get_CPSR() & 0xb0)) + + #else /* !__IAR_SYSTEMS_ICC__ */ + + #define IRQ_DISABLE \ + do { \ + cpu_flags_t sreg; \ + asm volatile ( \ + "mrs %0, cpsr\n\t" \ + "orr %0, %0, #0xc0\n\t" \ + "msr cpsr_c, %0\n\t" \ + : "=r" (sreg) : : "memory", "cc"); \ + } while (0) + + #define IRQ_ENABLE \ + do { \ + cpu_flags_t sreg; \ + asm volatile ( \ + "mrs %0, cpsr\n\t" \ + "bic %0, %0, #0xc0\n\t" \ + "msr cpsr_c, %0\n\t" \ + : "=r" (sreg) : : "memory", "cc"); \ + } while (0) + + #define IRQ_SAVE_DISABLE(x) \ + do { \ + register cpu_flags_t sreg; \ + asm volatile ( \ + "mrs %0, cpsr\n\t" \ + "orr %1, %0, #0xc0\n\t" \ + "msr cpsr_c, %1\n\t" \ + : "=r" (x), "=r" (sreg) \ + : : "memory", "cc"); \ + } while (0) + + #define IRQ_RESTORE(x) \ + do { \ + asm volatile ( \ + "msr cpsr_c, %0\n\t" \ + : : "r" (x) : "memory", "cc"); \ + } while (0) + + #define CPU_READ_FLAGS() \ + ({ \ + cpu_flags_t sreg; \ + asm volatile ( \ + "mrs %0, cpsr\n\t" \ + : "=r" (sreg) : : "memory", "cc"); \ + sreg; \ + }) + + #define IRQ_ENABLED() ((CPU_READ_FLAGS() & 0xc0) != 0xc0) + + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + EXTERN_C void asm_irq_switch_context(void); + + /** + * At the beginning of any ISR immediately ajust the + * return address and store all the caller-save + * registers (the ISR may change these registers that + * are shared with the user-context). + */ + #define IRQ_ENTRY() asm volatile ( \ + "sub lr, lr, #4\n\t" \ + "stmfd sp!, {r0-r3, ip, lr}\n\t") + #define IRQ_EXIT() asm volatile ( \ + "b asm_irq_switch_context\n\t") + /** + * Function attribute to declare an interrupt service + * routine. + * + * An ISR function must be declared as naked because we + * want to add our IRQ_ENTRY() prologue and IRQ_EXIT() + * epilogue code to handle the context switch and save + * all the registers (not only the callee-save). + * + */ + #define ISR_FUNC __attribute__((naked)) + + /** + * The compiler cannot establish which + * registers actually need to be saved, because + * the interrupt can happen at any time, so the + * "normal" prologue and epilogue used for a + * generic function call are not suitable for + * the ISR. + * + * Using a naked function has the drawback that + * the stack is not automatically adjusted at + * this point, like a "normal" function call. + * + * So, an ISR can _only_ contain other function + * calls and they can't use the stack in any + * other way. + * + * NOTE: we need to explicitly disable IRQs after + * IRQ_ENTRY(), because the IRQ status flag is not + * masked by the hardware and an IRQ ack inside the ISR + * may cause the triggering of another IRQ before + * exiting from the current ISR. + * + * The respective IRQ_ENABLE is not necessary, because + * IRQs will be automatically re-enabled when restoring + * the context of the user task. + */ + #define DECLARE_ISR_CONTEXT_SWITCH(func) \ + void ISR_FUNC func(void); \ + static NOINLINE void __isr_##func(void); \ + void ISR_FUNC func(void) \ + { \ + IRQ_ENTRY(); \ + IRQ_DISABLE; \ + __isr_##func(); \ + IRQ_EXIT(); \ + } \ + static NOINLINE void __isr_##func(void) + /** + * Interrupt service routine prototype: can be used for + * forward declarations. + */ + #define ISR_PROTO_CONTEXT_SWITCH(func) \ + void ISR_FUNC func(void) + /** + * With task priorities enabled each ISR is used a point to + * check if we need to perform a context switch. + * + * Instead, without priorities a context switch can occur only + * when the running task expires its time quantum. In this last + * case, the context switch can only occur in the timer + * ISR, that must be always declared with the + * DECLARE_ISR_CONTEXT_SWITCH() macro. + */ + #if CONFIG_KERN_PRI + #define DECLARE_ISR(func) \ + DECLARE_ISR_CONTEXT_SWITCH(func) + + #define ISR_PROTO(func) \ + ISR_PROTO_CONTEXT_SWITCH(func) + #endif /* !CONFIG_KERN_PRI */ + #endif /* CONFIG_KERN_PREEMPT */ + + #ifndef ISR_FUNC + #define ISR_FUNC __attribute__((naked)) + #endif + #ifndef DECLARE_ISR + #define DECLARE_ISR(func) \ + void ISR_FUNC func(void); \ + /* \ + * FIXME: avoid the inlining of this function. \ + * \ + * This is terribly inefficient, but it's a \ + * reliable workaround to avoid gcc blowing \ + * away the stack (see the bug below): \ + * \ + * http://gcc.gnu.org/bugzilla/show_bug.cgi?id=41999 \ + */ \ + static NOINLINE void __isr_##func(void); \ + void ISR_FUNC func(void) \ + { \ + asm volatile ( \ + "sub lr, lr, #4\n\t" \ + "stmfd sp!, {r0-r3, ip, lr}\n\t"); \ + __isr_##func(); \ + asm volatile ( \ + "ldmfd sp!, {r0-r3, ip, pc}^\n\t"); \ + } \ + static NOINLINE void __isr_##func(void) + #endif + #ifndef DECLARE_ISR_CONTEXT_SWITCH + #define DECLARE_ISR_CONTEXT_SWITCH(func) DECLARE_ISR(func) + #endif + #ifndef ISR_PROTO + #define ISR_PROTO(func) void ISR_FUNC func(void) + #endif + #ifndef ISR_PROTO_CONTEXT_SWITCH + #define ISR_PROTO_CONTEXT_SWITCH(func) ISR_PROTO(func) + #endif + + #endif /* !__IAR_SYSTEMS_ICC_ */ + +#elif CPU_PPC + + /* Get IRQ_* definitions from the hosting environment. */ + #include + #if OS_EMBEDDED + #define IRQ_DISABLE FIXME + #define IRQ_ENABLE FIXME + #define IRQ_SAVE_DISABLE(x) FIXME + #define IRQ_RESTORE(x) FIXME + #define IRQ_ENABLED() FIXME + #endif /* OS_EMBEDDED */ + +#elif CPU_DSP56K + + #define IRQ_DISABLE do { asm(bfset #0x0200,SR); asm(nop); } while (0) + #define IRQ_ENABLE do { asm(bfclr #0x0200,SR); asm(nop); } while (0) + + #define IRQ_SAVE_DISABLE(x) \ + do { (void)x; asm(move SR,x); asm(bfset #0x0200,SR); } while (0) + #define IRQ_RESTORE(x) \ + do { (void)x; asm(move x,SR); } while (0) + + static inline bool irq_running(void) + { + extern void *user_sp; + return !!user_sp; + } + #define IRQ_RUNNING() irq_running() + + static inline bool irq_enabled(void) + { + uint16_t x; + asm(move SR,x); + return !(x & 0x0200); + } + #define IRQ_ENABLED() irq_enabled() + +#elif CPU_AVR + + #define IRQ_DISABLE asm volatile ("cli" ::) + #define IRQ_ENABLE asm volatile ("sei" ::) + + #define IRQ_SAVE_DISABLE(x) \ + do { \ + __asm__ __volatile__( \ + "in %0,__SREG__\n\t" \ + "cli" \ + : "=r" (x) : /* no inputs */ : "cc" \ + ); \ + } while (0) + + #define IRQ_RESTORE(x) \ + do { \ + __asm__ __volatile__( \ + "out __SREG__,%0" : /* no outputs */ : "r" (x) : "cc" \ + ); \ + } while (0) + + #define IRQ_ENABLED() \ + ({ \ + uint8_t sreg; \ + __asm__ __volatile__( \ + "in %0,__SREG__\n\t" \ + : "=r" (sreg) /* no inputs & no clobbers */ \ + ); \ + (bool)(sreg & 0x80); \ + }) + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + #define DECLARE_ISR_CONTEXT_SWITCH(vect) \ + INLINE void __isr_##vect(void); \ + ISR(vect) \ + { \ + __isr_##vect(); \ + IRQ_PREEMPT_HANDLER(); \ + } \ + INLINE void __isr_##vect(void) + + /** + * With task priorities enabled each ISR is used a point to + * check if we need to perform a context switch. + * + * Instead, without priorities a context switch can occur only + * when the running task expires its time quantum. In this last + * case, the context switch can only occur in the timer ISR, + * that must be always declared with the + * DECLARE_ISR_CONTEXT_SWITCH() macro. + */ + #if CONFIG_KERN_PRI + #define DECLARE_ISR(func) \ + DECLARE_ISR_CONTEXT_SWITCH(func) + /** + * Interrupt service routine prototype: can be used for + * forward declarations. + */ + #define ISR_PROTO(func) \ + ISR_PROTO_CONTEXT_SWITCH(func) + #endif /* !CONFIG_KERN_PRI */ + #endif + + #ifndef ISR_PROTO + #define ISR_PROTO(vect) ISR(vect) + #endif + #ifndef DECLARE_ISR + #define DECLARE_ISR(vect) ISR(vect) + #endif + #ifndef DECLARE_ISR_CONTEXT_SWITCH + #define DECLARE_ISR_CONTEXT_SWITCH(vect) ISR(vect) + #endif + #ifndef ISR_PROTO_CONTEXT_SWITCH + #define ISR_PROTO_CONTEXT_SWITCH(vect) ISR(vect) + #endif + +#elif CPU_MSP430 + + /* Get the compiler defined macros */ + #include + #define IRQ_DISABLE dint() + #define IRQ_ENABLE eint() + +#else + #error No CPU_... defined. +#endif + +#ifdef IRQ_RUNNING + /// Ensure callee is running within an interrupt + #define ASSERT_IRQ_CONTEXT() ASSERT(IRQ_RUNNING()) + + /// Ensure callee is not running within an interrupt + #define ASSERT_USER_CONTEXT() ASSERT(!IRQ_RUNNING()) +#else + #define IRQ_RUNNING() false + #define ASSERT_USER_CONTEXT() do {} while(0) + #define ASSERT_IRQ_CONTEXT() do {} while(0) +#endif + +#ifdef IRQ_ENABLED + /// Ensure interrupts are enabled + #define IRQ_ASSERT_ENABLED() ASSERT(IRQ_ENABLED()) + + /// Ensure interrupts are not enabled + #define IRQ_ASSERT_DISABLED() ASSERT(!IRQ_ENABLED()) +#else + #define IRQ_ASSERT_ENABLED() do {} while(0) + #define IRQ_ASSERT_DISABLED() do {} while(0) +#endif + + +#ifndef IRQ_PREEMPT_HANDLER + #if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + /** + * Handle preemptive context switch inside timer IRQ. + */ + INLINE void IRQ_PREEMPT_HANDLER(void) + { + if (proc_needPreempt()) + proc_preempt(); + } + #else + #define IRQ_PREEMPT_HANDLER() /* Nothing */ + #endif +#endif + +/** + * Execute \a CODE atomically with respect to interrupts. + * + * \see IRQ_SAVE_DISABLE IRQ_RESTORE + */ +#define ATOMIC(CODE) \ + do { \ + cpu_flags_t __flags; \ + IRQ_SAVE_DISABLE(__flags); \ + CODE; \ + IRQ_RESTORE(__flags); \ + } while (0) + +#endif /* CPU_IRQ_H */ diff --git a/bertos/cpu/msp430/drv/kdebug_msp430.c b/bertos/cpu/msp430/drv/kdebug_msp430.c new file mode 100644 index 0000000..3407c01 --- /dev/null +++ b/bertos/cpu/msp430/drv/kdebug_msp430.c @@ -0,0 +1,134 @@ +/** + * \file + * + * + * \brief MSP430 debug support (implementation). + * + * \author Mohamed Tarek + */ + +#include "kdebug_msp430.h" /* for UART clock source definitions */ + +#include "hw/hw_ser.h" /* bus macros overrides */ +#include "cfg/cfg_debug.h" + +#include /* for DIV_ROUND */ + +#include +#include + +#include + +#if CONFIG_KDEBUG_PORT == 0 + + #ifndef KDBG_UART0_BUS_INIT + #define KDBG_UART0_BUS_INIT do {} while (0) + #endif + #ifndef KDBG_UART0_BUS_RX + #define KDBG_UART0_BUS_RX do {} while (0) + #endif + #ifndef KDBG_UART0_BUS_TX + #define KDBG_UART0_BUS_TX do {} while (0) + #endif + + /* USCI Register definitions */ + #define UCSTAT UCA0STAT + #define UCTXBUF UCA0TXBUF + #define UCRXBUF UCA0RXBUF + #define UCTXIFG UCA0TXIFG + #define UCRXIFG UCA0RXIFG + #define UCTXIE UCA0TXIE + #define UCRXIE UCA0RXIE + #define UCCTL0 UCA0CTL0 + #define UCCTL1 UCA0CTL1 + #define UCBR0 UCA0BR0 + #define UCBR1 UCA0BR1 + #define UCMCTL UCA0MCTL + #define IE IE2 + #define IFG IFG2 + + #if CPU_MSP430F2274 + #define KDBG_MSP430_UART_PINS_INIT() do{ P3SEL = 0x30; }while(0) + #endif + +#else + + #if CPU_MSP430F2274 + #error only 1 UART availbale, CONFIG_KDEBUG_PORT should be 0 + #endif + +#endif + +#define KDBG_WAIT_READY() do { while((UCSTAT & UCBUSY)); } while(0) +#define KDBG_WAIT_TXDONE() do { while(!(IFG & UCTXIFG)); } while(0) + +#define KDBG_WRITE_CHAR(c) do { UCTXBUF = (c); } while(0) + +#define KDBG_MASK_IRQ(old) do { \ + (old) = IE; \ + IE &= ~(UCTXIE|UCRXIE);\ +} while(0) + +#define KDBG_RESTORE_IRQ(old) do { \ + KDBG_WAIT_TXDONE(); \ + IE = (old); \ +} while(0) + +#if CONFIG_KDEBUG_CLOCK_FREQ + #define KDBG_MSP430_FREQ CONFIG_KDEBUG_CLOCK_FREQ +#else + #define KDBG_MSP430_FREQ CPU_FREQ +#endif + +typedef uint8_t kdbg_irqsave_t; + +INLINE void kdbg_hw_init(void) +{ + /* Compute the clock prescaler for the desired baudrate */ + uint16_t quot = DIV_ROUND(KDBG_MSP430_FREQ, CONFIG_KDEBUG_BAUDRATE); + KDBG_MSP430_UART_PINS_INIT(); // Configure USCI TX/RX pins + +#if (CONFIG_KDEBUG_CLOCK_SOURCE == KDBG_UART_SMCLK) + UCCTL1 |= UCSSEL_SMCLK; +#else + UCCTL1 |= UCSSEL_ACLK; +#endif + + UCBR0 = quot & 0xFF; // Setup clock prescaler for the UART + UCBR1 = quot >> 8; + + UCMCTL = UCBRS0; // No Modulation + UCCTL0 = 0; // Default UART settings (8N1) + UCCTL1 &= ~UCSWRST; // Initialize USCI state machine + KDBG_MASK_IRQ(IE2); // Disable USCI interrupts +} + diff --git a/bertos/cpu/msp430/drv/kdebug_msp430.h b/bertos/cpu/msp430/drv/kdebug_msp430.h new file mode 100644 index 0000000..496f3ce --- /dev/null +++ b/bertos/cpu/msp430/drv/kdebug_msp430.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief MSP430 debug support (implementation). + * + * \author Mohamed Tarek + */ + +#include "cfg/cfg_debug.h" + +/** + * UART Clock source. + * + * $WIZ$ kdbg_clk_src = "KDBG_UART_ACLK", "KDBG_UART_SMCLK" + */ +#define KDBG_UART_ACLK 0 +#define KDBG_UART_SMCLK 1 diff --git a/bertos/cpu/msp430/info/MSP430F2274.cdef b/bertos/cpu/msp430/info/MSP430F2274.cdef new file mode 100644 index 0000000..f357c3c --- /dev/null +++ b/bertos/cpu/msp430/info/MSP430F2274.cdef @@ -0,0 +1,57 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the MSP430f2274. +# +# This file contains all the info for the BeRTOS wizard. +# +# \author Mohamed Tarek +# +# + +# Import the common settings for the path. +include("msp430.common") + +# Short description of the cpu. +CPU_DESC += [ "32 Kbytes Flash", + "1 Kbyte internal SRAM", + "256 bytes Information Flash"] + +# If we use the GCC compiler we should pass some flags. +CORE_CPU = "msp430x2274" + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__MSP430F2274__" + +include("msp430_post.common") diff --git a/bertos/cpu/msp430/info/MSP430G2231.cdef b/bertos/cpu/msp430/info/MSP430G2231.cdef new file mode 100644 index 0000000..0dd7a96 --- /dev/null +++ b/bertos/cpu/msp430/info/MSP430G2231.cdef @@ -0,0 +1,57 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# Cpu info of the MSP430G2231. +# +# This file contains all the info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# Import the common settings for the path. +include("msp430.common") + +# Short description of the cpu. +CPU_DESC += [ "1 Kbytes Flash", + "128 byte internal SRAM"] + +# If we use the GCC compiler we should pass some flags. +# Probaly msp430-gcc typos.. +CORE_CPU = "msp430x2012" + +# GCC flags for this cpu. +MK_CPU_CPPFLAGS += " -D__MSP430G2231__" + +include("msp430_post.common") diff --git a/bertos/cpu/msp430/info/msp430.common b/bertos/cpu/msp430/info/msp430.common new file mode 100644 index 0000000..057b122 --- /dev/null +++ b/bertos/cpu/msp430/info/msp430.common @@ -0,0 +1,69 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# General CPU info denfinition MSP430 family. +# +# This file contains all the info for the BeRTOS wizard. +# +# \author Mohamed Tarek +# +# + +# Import the common settings for the path. +include("../../path.common") + +# Short description of the cpu. +CPU_DESC = [ "Texas Instruments MSP430 Microcontroller ", + "16-bit RISC Architecture"] + +# Type of the toolchain we should use to compile the source for this CPU. +TOOLCHAIN = "msp430" + +# Special CPU related tags. +CPU_TAGS = ["Von Neumann", TOOLCHAIN] + +# CPU default clock frequency +CPU_DEFAULT_FREQ = "1000000UL" + +# Where are locate the bertos directories +SCRIPT_DIR = CPU_DIR + "msp430/scripts/" + +MK_FLASH_SCRIPT = PRG_SCRIPTS_DIR + "msp430/flash.sh" +MK_STOPFLASH_SCRIPT = PRG_SCRIPTS_DIR + "msp430/stopflash.sh" +MK_DEBUG_SCRIPT = PRG_SCRIPTS_DIR + "nodebug.sh" +MK_STOPDEBUG_SCRIPT = PRG_SCRIPTS_DIR + "none.sh" + +# Common GCC flags. +MK_CPU_CPPFLAGS = "-Os -I" + CPU_DIR + "msp430/" + diff --git a/bertos/cpu/msp430/info/msp430_post.common b/bertos/cpu/msp430/info/msp430_post.common new file mode 100644 index 0000000..6705724 --- /dev/null +++ b/bertos/cpu/msp430/info/msp430_post.common @@ -0,0 +1,8 @@ +# CPU type used for flashing +MK_PROGRAMMER_CPU = CORE_CPU + +# Name of the flag used by the build system to pass to the compiler the CPU type. +MK_MCU = CORE_CPU + +# Add CPU core to tags +CPU_TAGS += [ CORE_CPU ] diff --git a/bertos/cpu/newcore b/bertos/cpu/newcore new file mode 100755 index 0000000..043764c --- /dev/null +++ b/bertos/cpu/newcore @@ -0,0 +1,17 @@ +#!/bin/bash + +DIRS="drv hw io scripts" +if [ $# != 1 ]; then + echo "Create a new core tree with subdirs:" + echo $DIRS + echo "usage $0 " + exit 1 +fi +CORE=$1 +mkdir $CORE +cd $CORE +for dir in $DIRS +do + mkdir $dir +done +cd .. diff --git a/bertos/cpu/path.common b/bertos/cpu/path.common new file mode 100644 index 0000000..4c1808b --- /dev/null +++ b/bertos/cpu/path.common @@ -0,0 +1,46 @@ +# +#-*- coding: utf-8 -*- +# +# \file +# +# +# BeRTOS common path info. +# +# This file contain all info for the BeRTOS wizard. +# +# \author Daniele Basile +# +# + +# BeRTOS cpu directory +CPU_DIR = "bertos/cpu/" + +PRG_SCRIPTS_DIR = "bertos/prg_scripts/" diff --git a/bertos/cpu/pgm.h b/bertos/cpu/pgm.h new file mode 100644 index 0000000..0369186 --- /dev/null +++ b/bertos/cpu/pgm.h @@ -0,0 +1,233 @@ +/** + * \file + * + * + * \brief Support for reading program memory on Harvard architectures. + * + * Support is currently provided for AVR microcontrollers only. + * + * These macros allow building code twice, with and without + * pgm support (e.g.: strcpy() and strcpy_P()). + * + * Set the _PROGMEM predefine to compile in conditional + * program-memory support. + * + * + * \note This module contains code ripped out from avr-libc, + * which is distributed under a 3-clause BSD license. + * + * \author Bernie Innocenti + */ +#ifndef MWARE_PGM_H +#define MWARE_PGM_H + +#include /* For intXX_t */ +#include +#include /* For CPU_HARVARD */ +#include /* For SIZEOF_INT */ + +#if CPU_AVR + + #ifdef __AVR_ENHANCED__ + #define pgm_read8(addr) \ + ({ \ + uint16_t __addr16 = (uint16_t)(addr); \ + uint8_t __result; \ + __asm__ \ + ( \ + "lpm %0, Z" "\n\t" \ + : "=r" (__result) \ + : "z" (__addr16) \ + ); \ + __result; \ + }) + #define pgm_read16(addr) \ + ({ \ + uint16_t __addr16 = (uint16_t)(addr); \ + uint16_t __result; \ + __asm__ \ + ( \ + "lpm %A0, Z+" "\n\t" \ + "lpm %B0, Z" "\n\t" \ + : "=r" (__result), "=z" (__addr16) \ + : "1" (__addr16) \ + ); \ + __result; \ + }) + + + #else /* !__AVR_ENHANCED__ */ + + #define pgm_read8(addr) \ + ({ \ + uint16_t __addr16 = (uint16_t)(addr); \ + uint8_t __result; \ + __asm__ \ + ( \ + "lpm" "\n\t" \ + "mov %0, r0" "\n\t" \ + : "=r" (__result) \ + : "z" (__addr16) \ + : "r0" \ + ); \ + __result; \ + }) + #define pgm_read16(addr) \ + ({ \ + uint16_t __addr16 = (uint16_t)(addr); \ + uint16_t __result; \ + __asm__ \ + ( \ + "lpm" "\n\t" \ + "mov %A0, r0" "\n\t" \ + "adiw r30, 1" "\n\t" \ + "lpm" "\n\t" \ + "mov %B0, r0" "\n\t" \ + : "=r" (__result), "=z" (__addr16) \ + : "1" (__addr16) \ + : "r0" \ + ); \ + __result; \ + }) + + #endif /* !__AVR_ENHANCED__ */ + + #define pgm_read32(addr) ((uint32_t)(pgm_read16(addr) | (((uint32_t)pgm_read16(((const uint8_t *)(addr)) + 2)) << 16))) + #ifndef PROGMEM + #define PROGMEM __attribute__((__progmem__)) + #endif + #ifndef PSTR + #define PSTR(s) ({ static const char __c[] PROGMEM = (s); &__c[0]; }) + #endif + #ifndef PFUNC + #define PFUNC(x) x ## _P + #endif + +#elif CPU_HARVARD + #error Missing CPU support +#endif + + +#if !CPU_HARVARD + #define pgm_read8(a) (*(const uint8_t *)(a)) + #define pgm_read16(a) (*(const uint16_t *)(a)) + #define pgm_read32(a) (*(const uint32_t *)(a)) +#endif + +#define pgm_read_char(a) pgm_read8(a) +#define pgm_read_uint16_t(addr) pgm_read16(addr) + + +#if SIZEOF_INT == 2 + #define pgm_read_int(addr) ((int)pgm_read16(addr)) +#elif SIZEOF_INT == 4 + #define pgm_read_int(addr) ((int)pgm_read32(addr)) +#else + #error Missing support for CPU word size! +#endif + +#ifndef PSTR +#define PSTR /* nothing */ +#endif + +#ifndef PFUNC +#define PFUNC(x) x +#endif + +#ifndef PROGMEM +#define PROGMEM /* nothing */ +#endif + +/** + * \name Types for variables stored in program memory (harvard processors). + * \{ + */ +typedef PROGMEM char pgm_char; +typedef PROGMEM int8_t pgm_int8_t; +typedef PROGMEM uint8_t pgm_uint8_t; +typedef PROGMEM int16_t pgm_int16_t; +typedef PROGMEM uint16_t pgm_uint16_t; +typedef PROGMEM int32_t pgm_int32_t; +typedef PROGMEM uint32_t pgm_uint32_t; +/*\}*/ + +/** + * \name PGM support macros. + * + * These macros enable dual compilation of code for both program + * and data memory. + * + * Such a function may be defined like this: + * + * \code + * void PGM_FUNC(lcd_puts)(PGM_ATTR const char *str) + * { + * char c; + * while ((c = PGM_READ_CHAR(str++)) + * lcd_putchar(c); + * } + * \endcode + * + * The above code can be compiled twice: once with the _PROGMEM preprocessor + * symbol defined, and once without. The two object modules can then be + * linked in the same application for use by client code: + * + * \code + * lcd_puts("Hello, world!"); + * lcd_puts_P(PSTR("Hello, world!")); + * + * // To be used when invoking inside other PGM_FUNC functions: + * PGM_FUNC(lcd_puts)(some_string); + * \endcode + * + * \{ + */ +#ifdef _PROGMEM + #define PGM_READ8(a) pgm_read8(a) + #define PGM_READ16(a) pgm_read16(a) + #define PGM_READ32(a) pgm_read32(a) + #define PGM_FUNC(x) PFUNC(x) + #define PGM_STR(x) PSTR(x) + #define PGM_ATTR PROGMEM +#else + #define PGM_READ8(a) (*(const uint8_t *)(a)) + #define PGM_READ16(a) (*(const uint16_t *)(a)) + #define PGM_READ32(a) (*(const uint32_t *)(a)) + #define PGM_FUNC(x) x + #define PGM_STR(x) x + #define PGM_ATTR /* nothing */ +#endif + +#define PGM_READ_CHAR(addr) PGM_READ8(addr) + +/* \} */ + + +#endif /* MWARE_PGM_H */ diff --git a/bertos/cpu/power.h b/bertos/cpu/power.h new file mode 100644 index 0000000..f161c69 --- /dev/null +++ b/bertos/cpu/power.h @@ -0,0 +1,119 @@ +/** + * \file + * + * + * \brief CPU power management functions + * + * \author Bernie Innocenti + */ + +#ifndef CPU_POWER_H +#define CPU_POWER_H + +#include "cfg/cfg_proc.h" +#include "cfg/cfg_wdt.h" + +#include + +#if CONFIG_KERN + #include +#endif + +#if CONFIG_WATCHDOG + #include +#endif + +/** + * Let the CPU rest in tight busy loops + * + * User code that sits in a busy loop should call cpu_relax() every + * once in a while to perform system-dependent idle processing. + * + * Depending on the system configuration, this might perform different + * actions: + * + * - yield the CPU to other processes + * - reset the watchdog timer to avoid it from triggering + * - scale the CPU speed down to save power (unimplemented) + * - let the event loop of the emulator process a few events + * + * \see proc_yield() cpu_pause() + */ +INLINE void cpu_relax(void) +{ + MEMORY_BARRIER; +#if CONFIG_KERN + if (proc_preemptAllowed()) + proc_yield(); +#endif + +#if CONFIG_WATCHDOG + wdt_reset(); +#endif +} + +/** + * Stop the processor until the next interrupt occurs. + * + * Pausing the CPU effectively reduces power usage, and should be used + * whenever the program is idle waiting for the next event to occur. + * + * To avoid deadlocking, the caller should normally check for the + * desired condition with interrupts disabled, and enter this function + * while interrupts are still disabled: + * + * \code + * IRQ_DISABLE(); + * while (!event_occurred) + * cpu_pause(); + * IRQ_ENABLE(); + * \endcode + * + * \note Some implementations of cpu_pause() may return before any interrupt + * has occurred. Calling code should take this possibility into account. + * + * \note This function is currently unimplemented + * + * \see cpu_relax() cpu_yield() + */ +INLINE void cpu_pause(void) +{ + //ASSERT_IRQ_DISABLED(); + //IRQ_ENABLE(); + cpu_relax(); + //IRQ_DISABLE(); +} + +/** + * Safely call cpu_pause() until the COND predicate becomes true. + */ +#define CPU_PAUSE_ON(COND) ATOMIC(while (!(COND)) { cpu_pause(); }) + +#endif /* CPU_POWER_H */ diff --git a/bertos/cpu/types.h b/bertos/cpu/types.h new file mode 100644 index 0000000..dcddaa5 --- /dev/null +++ b/bertos/cpu/types.h @@ -0,0 +1,255 @@ +/** + * \file + * + * + * \brief CPU-specific type definitions. + * + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + */ +#ifndef CPU_TYPES_H +#define CPU_TYPES_H + +#include "detect.h" +#include "attr.h" +#include +#include /* for uintXX_t */ + +#if CPU_I196 + + typedef uint16_t cpu_flags_t; // FIXME + typedef unsigned int cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + typedef unsigned int cpu_atomic_t; + #warning Verify following constant + #define SIZEOF_CPUSTACK_T 2 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + +#elif CPU_X86 + + /* Get cpu_flags_t definition from the hosting environment. */ + #include + #if OS_EMBEDDED + typedef uint32_t cpu_flags_t; // FIXME + #endif /* OS_EMBEDDED */ + + typedef uint32_t cpu_atomic_t; + + #if CPU_X86_64 + typedef uint64_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 8 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + #else + typedef uint32_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 4 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + #endif + +#elif CPU_ARM || CPU_CM3 + + typedef uint32_t cpu_flags_t; + typedef uint32_t cpu_atomic_t; + typedef uint32_t cpu_stack_t; + #define SIZEOF_CPUSTACK_T 4 + + typedef uint64_t cpu_aligned_stack_t; + #define SIZEOF_CPUALIGNED_T 8 + +#elif CPU_PPC + + /* Get cpu_flags_t definition from the hosting environment. */ + #include + #if OS_EMBEDDED + typedef uint32_t cpu_flags_t; + #endif + + typedef uint32_t cpu_atomic_t; + typedef uint32_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 4 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + +#elif CPU_DSP56K + + typedef uint16_t cpu_flags_t; + typedef uint16_t cpu_atomic_t; + typedef unsigned int cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #warning Verify following costant + #define SIZEOF_CPUSTACK_T 2 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + +#elif CPU_AVR + + typedef uint8_t cpu_flags_t; + typedef uint8_t cpu_atomic_t; + typedef uint8_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 1 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + +#elif CPU_MSP430 + + typedef uint16_t cpu_flags_t; + typedef uint16_t cpu_stack_t; + typedef cpu_stack_t cpu_aligned_stack_t; + #define SIZEOF_CPUSTACK_T 2 + #define SIZEOF_CPUALIGNED_T SIZEOF_CPUSTACK_T + +#else + #error No CPU_... defined. +#endif + +/** + * \name Default type sizes. + * + * These defaults are reasonable for most 16/32bit machines. + * Some of these macros may be overridden by CPU-specific code above. + * + * ANSI C requires that the following equations be true: + * \code + * sizeof(char) <= sizeof(short) <= sizeof(int) <= sizeof(long) + * sizeof(float) <= sizeof(double) + * CPU_BITS_PER_CHAR >= 8 + * CPU_BITS_PER_SHORT >= 8 + * CPU_BITS_PER_INT >= 16 + * CPU_BITS_PER_LONG >= 32 + * \endcode + * \{ + */ +#ifndef SIZEOF_CHAR +#define SIZEOF_CHAR 1 +#endif + +#ifndef SIZEOF_SHORT +#define SIZEOF_SHORT 2 +#endif + +#ifndef SIZEOF_INT +#if CPU_REG_BITS < 32 + #define SIZEOF_INT 2 +#else + #define SIZEOF_INT 4 +#endif +#endif /* !SIZEOF_INT */ + +#ifndef SIZEOF_LONG +#if CPU_REG_BITS > 32 + #define SIZEOF_LONG 8 +#else + #define SIZEOF_LONG 4 +#endif +#endif + +#ifndef SIZEOF_PTR +#if CPU_REG_BITS < 32 + #define SIZEOF_PTR 2 +#elif CPU_REG_BITS == 32 + #define SIZEOF_PTR 4 +#else /* CPU_REG_BITS > 32 */ + #define SIZEOF_PTR 8 +#endif +#endif + +#ifndef SIZEOF_SIZE_T +#if CPU_REG_BITS < 32 + #define SIZEOF_SIZE_T 2 +#elif CPU_REG_BITS == 32 + #define SIZEOF_SIZE_T 4 +#else /* CPU_REG_BITS > 32 */ + #define SIZEOF_SIZE_T 8 +#endif +#endif + +#ifndef CPU_BITS_PER_CHAR +#define CPU_BITS_PER_CHAR (SIZEOF_CHAR * 8) +#endif + +#ifndef CPU_BITS_PER_SHORT +#define CPU_BITS_PER_SHORT (SIZEOF_SHORT * CPU_BITS_PER_CHAR) +#endif + +#ifndef CPU_BITS_PER_INT +#define CPU_BITS_PER_INT (SIZEOF_INT * CPU_BITS_PER_CHAR) +#endif + +#ifndef CPU_BITS_PER_LONG +#define CPU_BITS_PER_LONG (SIZEOF_LONG * CPU_BITS_PER_CHAR) +#endif + +#ifndef CPU_BITS_PER_PTR +#define CPU_BITS_PER_PTR (SIZEOF_PTR * CPU_BITS_PER_CHAR) +#endif + + +/*\}*/ + +#ifndef INT_MAX + #define INT_MAX ((int)((unsigned int)~0 >> 1)) + #define INT_MIN (-INT_MAX - 1) +#endif + +/* Sanity checks for the above definitions */ +STATIC_ASSERT(sizeof(char) == SIZEOF_CHAR); +STATIC_ASSERT(sizeof(short) == SIZEOF_SHORT); +STATIC_ASSERT(sizeof(long) == SIZEOF_LONG); +STATIC_ASSERT(sizeof(int) == SIZEOF_INT); +STATIC_ASSERT(sizeof(void *) == SIZEOF_PTR); +STATIC_ASSERT(sizeof(int8_t) * CPU_BITS_PER_CHAR == 8); +STATIC_ASSERT(sizeof(uint8_t) * CPU_BITS_PER_CHAR == 8); +STATIC_ASSERT(sizeof(int16_t) * CPU_BITS_PER_CHAR == 16); +STATIC_ASSERT(sizeof(uint16_t) * CPU_BITS_PER_CHAR == 16); +STATIC_ASSERT(sizeof(int32_t) * CPU_BITS_PER_CHAR == 32); +STATIC_ASSERT(sizeof(uint32_t) * CPU_BITS_PER_CHAR == 32); +#ifdef __HAS_INT64_T__ +STATIC_ASSERT(sizeof(int64_t) * CPU_BITS_PER_CHAR == 64); +STATIC_ASSERT(sizeof(uint64_t) * CPU_BITS_PER_CHAR == 64); +#endif +STATIC_ASSERT(sizeof(cpu_stack_t) == SIZEOF_CPUSTACK_T); +STATIC_ASSERT(sizeof(cpu_aligned_stack_t) == SIZEOF_CPUALIGNED_T); +STATIC_ASSERT(sizeof(size_t) == SIZEOF_SIZE_T); + + +/** + * Macros for hardware access, both direct and via the bit-band region. + */ +/*\{*/ +#define HWREG(x) (*((reg32_t *)(x))) +#define HWREGH(x) (*((reg16_t *)(x))) +#define HWREGB(x) (*((reg8_t *)(x))) +/*\}*/ + +#endif /* CPU_TYPES_H */ diff --git a/bertos/drv/adc.c b/bertos/drv/adc.c new file mode 100644 index 0000000..9d47863 --- /dev/null +++ b/bertos/drv/adc.c @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief ADC driver (implementation) + * + * \author Francesco Sacchi + */ + +#include + +#ifndef WIZ_AUTOGEN + #warning Deprecated: now you should include adc_ directly in the makefile. Remove this line and the following once done. + #include CPU_CSOURCE(adc) +#else + #include CPU_HEADER(adc) +#endif + +#include // ASSERT() +#include // MIN() +#include +#include + +/** + * Read the ADC channel \a ch. + */ +adcread_t adc_read(adc_ch_t ch) +{ + ASSERT(ch <= (adc_ch_t)ADC_MUX_MAXCH); + ch = MIN(ch, (adc_ch_t)ADC_MUX_MAXCH); + + adc_hw_select_ch(ch); + + return(adc_hw_read()); +} + +MOD_DEFINE(adc); + +/** + * Initialize the ADC hardware. + */ +void adc_init(void) +{ + adc_hw_init(); + + MOD_INIT(adc); +} diff --git a/bertos/drv/adc.h b/bertos/drv/adc.h new file mode 100644 index 0000000..acc0786 --- /dev/null +++ b/bertos/drv/adc.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \defgroup adc Generic ADC driver + * \ingroup drivers + * \{ + * \brief Analog to Digital Converter driver (ADC). + * + * Configuration file: cfg_adc.h + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "adc" + * $WIZ$ module_configuration = "bertos/cfg/cfg_adc.h" + * $WIZ$ module_supports = "not atmega103" + */ + + +#ifndef DRV_ADC_H +#define DRV_ADC_H + +#include +#include +#include +#include CPU_HEADER(adc) + +/** Type for ADC return value. */ +typedef uint16_t adcread_t; + +/** Type for channel */ +typedef uint8_t adc_ch_t; + +#define adc_bits() ADC_BITS + +adcread_t adc_read(adc_ch_t ch); +void adc_init(void); + +/** + * Macro used to convert data from adc range (0...(2 ^ADC_BITS - 1)) to + * \a y1 ... \a y2 range. + * \note \a y1, \a y2 can be negative, and put in ascending or descending order as well. + * \note \a data and \a y2 are evaluated only once, \a y1 twice. + */ +#define ADC_RANGECONV(data, y1, y2) (((((int32_t)(data)) * ((y2) - (y1))) / ((1 << ADC_BITS) - 1)) + (y1)) + +/** \} */ //defgroup adc +#endif /* DRV_ADC_H */ diff --git a/bertos/drv/buzzer.c b/bertos/drv/buzzer.c new file mode 100644 index 0000000..042d06c --- /dev/null +++ b/bertos/drv/buzzer.c @@ -0,0 +1,158 @@ +/** + * \file + * + * + * \brief Buzzer driver (implementation) + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#include "buzzer.h" + +#include "hw/hw_buzzer.h" +#include + +#include + +#include +#include + + +/* Local vars */ +static Timer buz_timer; +static bool buz_timer_running; +static mtime_t buz_repeat_interval; +static mtime_t buz_repeat_duration; + + +/** + * Turn off buzzer, called by software timer + */ +static void buz_softint(void) +{ + if (IS_BUZZER_ON) + { + BUZZER_OFF; + if (buz_repeat_interval) + { + /* Wait for interval time */ + timer_setDelay(&buz_timer, ms_to_ticks(buz_repeat_interval)); + timer_add(&buz_timer); + } + else + buz_timer_running = false; + } + else if (buz_repeat_interval) + { + /* Wait for beep time */ + BUZZER_ON; + timer_setDelay(&buz_timer, ms_to_ticks(buz_repeat_duration)); + timer_add(&buz_timer); + } + else + buz_timer_running = false; +} + + +/** + * Beep for the specified ms time + */ +void buz_beep(mtime_t time) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Remove the software interrupt if it was already queued */ + if (buz_timer_running) + timer_abort(&buz_timer); + + /* Turn on buzzer */ + BUZZER_ON; + + /* Add software interrupt to turn the buzzer off later */ + buz_timer_running = true; + timer_setDelay(&buz_timer, ms_to_ticks(time)); + timer_add(&buz_timer); + + IRQ_RESTORE(flags); +} + + +/** + * Start buzzer repetition + */ +void buz_repeat_start(mtime_t duration, mtime_t interval) +{ + buz_repeat_interval = interval; + buz_repeat_duration = duration; + buz_beep(duration); +} + + +/** + * Stop buzzer repetition + */ +void buz_repeat_stop(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Remove the software interrupt if it was already queued */ + if (buz_timer_running) + { + timer_abort(&buz_timer); + buz_timer_running = false; + } + + buz_repeat_interval = 0; + BUZZER_OFF; + + IRQ_RESTORE(flags); +} + +MOD_DEFINE(buzzer) + +/** + * Initialize buzzer. + */ +void buz_init(void) +{ + MOD_CHECK(timer); + + BUZZER_HW_INIT; + + /* Init software interrupt. */ + timer_setSoftint(&buz_timer, (Hook)buz_softint, 0); + + MOD_INIT(buzzer); +} diff --git a/bertos/drv/buzzer.h b/bertos/drv/buzzer.h new file mode 100644 index 0000000..9023152 --- /dev/null +++ b/bertos/drv/buzzer.h @@ -0,0 +1,53 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief Buzzer driver. + * + * $WIZ$ module_name = "buzzer" + * $WIZ$ module_depends = "timer" + * $WIZ$ module_hw = "bertos/hw/hw_buzzer.h" + */ + +#ifndef DRV_BUZZER_H +#define DRV_BUZZER_H + +#include + +void buz_init(void); +void buz_beep(mtime_t time); +void buz_repeat_start(mtime_t duration, mtime_t interval); +void buz_repeat_stop(void); + +#endif /* DRV_BUZZER_H */ diff --git a/bertos/drv/buzzerled.c b/bertos/drv/buzzerled.c new file mode 100644 index 0000000..5135cf0 --- /dev/null +++ b/bertos/drv/buzzerled.c @@ -0,0 +1,103 @@ +/** + * \file + * + * + * \brief Generic library to handle buzzers and leds + * + * This library is divided into three different layers: + * + * - The topmost portable layer is buzzerled.[ch] which exposes a common API + * enable/disable the devices. Basically, it handles the asynchronism to + * implement bld_beep and bld_repeat. + * - The middle layer is CPU-specific and exposes a single main function which + * turns on/off each device. + * - The lower layer is board-specific and communicates with the middle layer + * with any required API. The idea is that devices can be tied to the CPU in + * many different ways (many different pins), so this part should describe + * which devices are present, and how they are connected. + * + * + * \author Giovanni Bajo + */ + +#include "buzzerled.h" + +#warning FIXME:This drive is obsolete, you must refactor it. + +#if 0 +#include "cfg/cfg_buzzerled.h" +#include + +static struct Timer timers[CONFIG_NUM_BLDS]; +static bool timer_go[CONFIG_NUM_BLDS]; + +INLINE enum BLD_DEVICE hook_parm_to_device(void* parm) +{ + struct Timer* t = (struct Timer*)parm; + int num_bld = t - &timers[0]; + + ASSERT(num_bld >= 0); + ASSERT(num_bld < NUM_BLDS); + + return (enum BLD_DEVICE)num_bld; +} + +static void hook_turn_off(void* parm) +{ + enum BLD_DEVICE num_bld = hook_parm_to_device(parm); + bld_set(num_bld, false); +} + +void bld_init(void) +{ + bld_hw_init(); +} + +void bld_beep(enum BLD_DEVICE device, uint16_t duration) +{ + // \todo This is not reentrant for the same device. FIXME! + struct Timer *t = &timers[device]; + timer_set_delay(t, duration); + timer_set_event_softint(t, hook_turn_off, t); + timer_add(t); + + bld_set(device, true); +} + +void bld_beep_and_wait(enum BLD_DEVICE device, uint16_t duration) +{ + bld_set(device, true); + timer_delay(duration); + bld_set(device, false); +} +#endif + diff --git a/bertos/drv/buzzerled.h b/bertos/drv/buzzerled.h new file mode 100644 index 0000000..8eda403 --- /dev/null +++ b/bertos/drv/buzzerled.h @@ -0,0 +1,96 @@ +/** + * \file + * + * + * \brief Generic library to handle buzzers and leds + * + * + * \author Giovanni Bajo + */ + +#ifndef DRV_BUZZERLED_H +#define DRV_BUZZERLED_H + +#include + +#if 0 +/** Include hw_buzzerled.h. We expect hw_buzzerled.h to define enum BLD_DEVICE, which must contain + * an enumarator for each device, plus a special symbol NUM_BLDS containing the + * number of devices. + */ +#include "hw/hw_buzzerled.h" + + +/* Include hw-level implementation. This allows inlining of bld_set, which in turns + * should allow fast constant propagation for the common case (where the parameter + * device is a constant). + */ +#include CPU_HEADER(buzzerled) + + +/** Initialize the buzzerled library. + * + * \note This function must be called before any other function in the library. + */ +void bld_init(void); + + +/** Set or reset a device. + * + * \param device Device to be set + * \param enable Enable/disable status + */ +#define bld_set(device, enable) bld_hw_set(device, enable) + + +/** Enable a device for a certain interval of time + * + * \param device Device to be enabled + * \param duration Number of milliseconds the device must be enabled + * + * \note This function is non-blocking, so it will return immediately. + */ +void bld_beep(enum BLD_DEVICE device, uint16_t duration); + + +/** Enable a device for a certain interval of time and wait. + * + * \param device Device to be enabled + * \param duration Number of milliseconds the device must be enabled + * + * \note This function is blocking, so it will return after the specified period of time. + */ +void bld_beep_and_wait(enum BLD_DEVICE device, uint16_t duration); + +#endif + +#endif /* DRV_BUZZERLED_H */ diff --git a/bertos/drv/dac.h b/bertos/drv/dac.h new file mode 100644 index 0000000..c720f75 --- /dev/null +++ b/bertos/drv/dac.h @@ -0,0 +1,156 @@ +/** + * \file + * + * + * \defgroup dac Generic DAC driver + * \ingroup drivers + * \{ + * \brief Digital to Analog Converter driver (DAC). + * + * Configuration file: cfg_dac.h + * + * \author Daniele Basile + * + * $WIZ$ module_name = "dac" + * $WIZ$ module_configuration = "bertos/cfg/cfg_dac.h" + * $WIZ$ module_supports = "sam3x" + */ + + +#ifndef DRV_DAC_H +#define DRV_DAC_H + +#include +#include +#include + +#include + +#include CPU_HEADER(dac) + +struct DacContext; +struct Dac; + +typedef int (*DacWriteFunc_t) (struct Dac *dac, unsigned channel, uint16_t sample); +typedef void (*SetChannelMaskFunc_t) (struct Dac *dac, uint32_t mask); +typedef void (*SetSamplingRate_t) (struct Dac *dac, uint32_t rate); +typedef void (*DmaConversionBufFunc_t) (struct Dac *dac, void *buf, size_t len); +typedef bool (*DmaConversionIsFinished_t) (struct Dac *dac); +typedef void (*DmaStartStreamingFunc_t) (struct Dac *dac, void *buf, size_t len, size_t slice_len); +typedef void (*DmaStopFunc_t) (struct Dac *dac); +typedef void (*DmaCallbackFunc_t) (struct Dac *dac, void *_buf, size_t len); + +typedef struct DacContext +{ + DacWriteFunc_t write; + SetChannelMaskFunc_t setCh; + SetSamplingRate_t setSampleRate; + DmaConversionBufFunc_t conversion; + DmaConversionIsFinished_t isFinished; + DmaStartStreamingFunc_t start; + DmaStopFunc_t stop; + DmaCallbackFunc_t callback; + size_t slice_len; + + DB(id_t _type); + +} DacContext; + +typedef struct Dac +{ + DacContext ctx; + struct DacHardware *hw; +} Dac; + +INLINE int dac_write(Dac *dac, unsigned channel, uint16_t sample) +{ + ASSERT(dac->ctx.write); + return dac->ctx.write(dac, channel, sample); +} + +INLINE void dac_setChannelMask(struct Dac *dac, uint32_t mask) +{ + ASSERT(dac->ctx.setCh); + dac->ctx.setCh(dac, mask); +} + +INLINE void dac_setSamplingRate(Dac *dac, uint32_t rate) +{ + ASSERT(dac->ctx.setSampleRate); + dac->ctx.setSampleRate(dac, rate); +} + +/* + * Convert \param len samples stored into \param buf. + */ +INLINE void dac_dmaConversionBuffer(Dac *dac, void *buf, size_t len) +{ + ASSERT(dac->ctx.conversion); + dac->ctx.conversion(dac, buf, len); +} + +/* + * Check if a dma transfer is finished. + * + * Useful for kernel-less applications. + */ +INLINE bool dac_dmaIsFinished(Dac *dac) +{ + ASSERT(dac->ctx.isFinished); + return dac->ctx.isFinished(dac); +} + +/* + * \param slicelen Must be a divisor of len, ie. len % slicelen == 0. + */ +INLINE void dac_dmaStartStreaming(Dac *dac, void *buf, size_t len, size_t slice_len, DmaCallbackFunc_t callback) +{ + ASSERT(dac->ctx.start); + ASSERT(len % slice_len == 0); + ASSERT(callback); + + dac->ctx.callback = callback; + dac->ctx.slice_len = slice_len; + dac->ctx.start(dac, buf, len, slice_len); +} + +INLINE void dac_dmaStop(Dac *dac) +{ + ASSERT(dac->ctx.stop); + dac->ctx.stop(dac); +} + +#define dac_bits() DAC_BITS + +void dac_init(Dac *dac); + +/** \} */ //defgroup dac +#endif /* DRV_DAC_H */ diff --git a/bertos/drv/dataflash.c b/bertos/drv/dataflash.c new file mode 100644 index 0000000..8c29d16 --- /dev/null +++ b/bertos/drv/dataflash.c @@ -0,0 +1,590 @@ +/** + * \file + * + * + * \brief Function library for dataflash AT45DB family (implementation). + * + * \author Daniele Basile + * \author Francesco Sacchi + */ + +#include "dataflash.h" + +#include "cfg/cfg_dataflash.h" +#include +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL DATAFLASH_LOG_LEVEL +#define LOG_FORMAT DATAFLASH_LOG_FORMAT +#include + +#include + +#include + +#include + +#include /* cpu_relax() */ + +#include + +/** + * Array used to describe dataflash memory devices currently supported. + */ +static const DataflashInfo mem_info[] = +{ + { + /* AT45DB041B */ + .density_id = 0x07, + .page_size = 264, + .page_bits = 9, + .page_cnt = 2048, + .read_cmd = DFO_READ_FLASH_MEM_BYTE_B, + }, + { + /* AT45DB081D */ + .density_id = 0x09, + .page_size = 264, + .page_bits = 9, + .page_cnt = 4096, + .read_cmd = DFO_READ_FLASH_MEM_BYTE_D, + }, + { + /* AT45DB161D */ + .density_id = 0x0B, + .page_size = 528, + .page_bits = 10, + .page_cnt = 4096, + .read_cmd = DFO_READ_FLASH_MEM_BYTE_D, + }, + { + /* AT45DB642D */ + .density_id = 0x0F, + .page_size = 1056, + .page_bits = 11, + .page_cnt = 8192, + .read_cmd = DFO_READ_FLASH_MEM_BYTE_D, + }, + /* Add other memories here */ +}; + +STATIC_ASSERT(countof(mem_info) == DFT_CNT); + +/** + * Macro that toggle CS of dataflash. + * \note This is equivalent to fd->setCS(false) immediately followed by fd->setCS(true). + */ +INLINE void CS_TOGGLE(DataFlash *fd) +{ + fd->setCS(false); + fd->setCS(true); +} + +/** + * Send a generic command to dataflash memory. + * This function send only 4 byte: opcode, page address and + * byte address. + */ +static void send_cmd(DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, DataFlashOpcode opcode) +{ + + /* + * Make sure to toggle CS signal in order, + * and reset dataflash command decoder. + */ + CS_TOGGLE(fd); + + + /* + * To send one command to data flash memory, we send 4 byte. + * First byte is opcode command, second and third byte are + * page address, in last byte we write a byte page address. + * (see datasheet for more detail). + * + * \note Generally a default memory page size is more than 256 byte. + * In this case we need for addressing a byte in one page more than + * 8 bit, so we put in fourth byte low part of address byte, and + * hight part of address byte in third byte togheter low par of page + * address. + * + */ + + /* + * Send opcode. + */ + kfile_putc(opcode, fd->channel); + + /* + * Send page address. + */ + kfile_putc((uint8_t)(page_addr >> (16 - mem_info[fd->dev].page_bits)), fd->channel); + kfile_putc((uint8_t)((page_addr << (mem_info[fd->dev].page_bits - 8)) + (byte_addr >> 8)), fd->channel); + + /* + * Send byte page address. + */ + kfile_putc((uint8_t)byte_addr, fd->channel); +} + +/** + * Reset dataflash memory function. + * + * If \a fd->setReset function is not NULL, + * this function resets data flash memory + * with one pulse reset long about 10usec. + * + */ +static void dataflash_reset(DataFlash *fd) +{ + fd->setCS(false); + + if (fd->setReset) + { + fd->setReset(true); + timer_delayHp(us_to_hptime(RESET_PULSE_WIDTH)); + fd->setReset(false); + timer_delayHp(us_to_hptime(RESET_PULSE_WIDTH)); + } +} + + +/** + * Read status register of dataflah memory. + */ +static uint8_t dataflash_stat(DataFlash *fd) +{ + /* + * Make sure to toggle CS signal + * and reset dataflash command decoder. + */ + CS_TOGGLE(fd); + kfile_putc(DFO_READ_STATUS, fd->channel); + return kfile_getc(fd->channel); +} + + +/** + * Send one command to data flash memory, and + * return status register value. + * + */ +static uint8_t dataflash_cmd(DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, DataFlashOpcode opcode) +{ + uint8_t stat; + + send_cmd(fd, page_addr, byte_addr, opcode); + + CS_TOGGLE(fd); + + /* + * We chech data flash memory state, and wait until busy-flag + * is high. + */ + while (!(dataflash_stat(fd) & BUSY_BIT)) + cpu_relax(); + + stat = dataflash_stat(fd); + + kfile_flush(fd->channel); // Flush channel + /* + * Data flash has completed a bus cycle, so disable CS. + */ + fd->setCS(false); + + return stat; +} + +/** + * Read \a len bytes from main data flash memory or buffer data + * flash memory, and put it in \a *block. + */ +static void dataflash_readBlock(DataFlash *fd, dataflash_page_t page_addr, dataflash_offset_t byte_addr, uint8_t *block, dataflash_size_t len) +{ + DataFlashOpcode opcode = mem_info[fd->dev].read_cmd; + send_cmd(fd, page_addr, byte_addr, opcode); + + if (opcode == DFO_READ_FLASH_MEM_BYTE_B) + { + /* + * Send 24 don't care bits. + */ + uint8_t dummy[] = { 0, 0, 0 }; + kfile_write(fd->channel, dummy, sizeof(dummy)); + } + + kfile_putc(0, fd->channel); //Send 8 don't care bit. + kfile_read(fd->channel, block, len); //Read len bytes ad put in block buffer. + kfile_flush(fd->channel); // Flush channel + fd->setCS(false); +} + + +/** + * Write \a len bytes in dataflash memory buffer. + * + * \note Is not possible to write directly in dataflash main memory. + * To perform a write in main memory you must first write in dataflash buffer + * memory and then send a command to write the page in main memory. + */ +static void dataflash_writeBlock(DataFlash *fd, dataflash_offset_t offset, const uint8_t *block, dataflash_size_t len) +{ + ASSERT(offset + len <= mem_info[fd->dev].page_size); + + send_cmd(fd, 0x00, offset, DFO_WRITE_BUFF1); + + kfile_write(fd->channel, block, len); //Write len bytes. + kfile_flush(fd->channel); // Flush channel + + fd->setCS(false); +} + + +/** + * Load selected page from dataflash memory to buffer. + */ +static void dataflash_loadPage(DataFlash *fd, dataflash_page_t page_addr) +{ + dataflash_cmd(fd, page_addr, 0x00, DFO_MOV_MEM_TO_BUFF1); +} + +/* Battfs disk interface section */ +#if 0 +static size_t dataflash_disk_page_read(struct BattFsSuper *d, pgcnt_t page, pgaddr_t addr, void *buf, size_t len) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_readBlock(fd, page, addr, buf, len); + return len; +} + +static bool dataflash_disk_page_load(struct BattFsSuper *d, pgcnt_t page) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_loadPage(fd, page); + return true; +} + +static size_t dataflash_disk_buffer_write(struct BattFsSuper *d, pgaddr_t addr, const void *buf, size_t len) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_writeBlock(fd, addr, buf, len); + return len; +} + +static size_t dataflash_disk_buffer_read(struct BattFsSuper *d, pgaddr_t addr, void *buf, size_t len) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + ASSERT(addr + len <= mem_info[fd->dev].page_size); + + CS_TOGGLE(fd); + + kfile_putc(DFO_READ_BUFF1, fd->channel); + + uint32_t byte_addr = addr; + + kfile_putc((byte_addr >> 16) & 0xff, fd->channel); + kfile_putc((byte_addr >> 8) & 0xff, fd->channel); + kfile_putc(byte_addr & 0xff, fd->channel); + + /* Send additional don't care byte to start read operation */ + kfile_putc(0, fd->channel); + + kfile_read(fd->channel, buf, len); //Read len bytes ad put in buffer. + kfile_flush(fd->channel); // Flush channel + fd->setCS(false); + return len; +} + +static bool dataflash_disk_page_save(struct BattFsSuper *d, pgcnt_t page) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_cmd(fd, page, 0x00, DFO_WRITE_BUFF1_TO_MEM); + return true; +} + +static bool dataflash_disk_page_erase(struct BattFsSuper *d, pgcnt_t page) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + dataflash_cmd(fd, page, 0x00, DFO_ERASE_PAGE); + return true; +} + +static int dataflash_close(struct KFile *_fd); + +static bool dataflash_disk_close(struct BattFsSuper *d) +{ + DataFlash *fd = DATAFLASH_CAST((KFile *)d->disk_ctx); + return dataflash_close(&fd->fd) == 0; +} + +bool dataflash_diskInit(struct BattFsSuper *d, DataFlash *fd, pgcnt_t *page_array) +{ + ASSERT(d); + ASSERT(fd); + d->read = dataflash_disk_page_read; + d->load = dataflash_disk_page_load; + d->bufferWrite = dataflash_disk_buffer_write; + d->bufferRead = dataflash_disk_buffer_read; + d->save = dataflash_disk_page_save; + d->erase = dataflash_disk_page_erase; + d->close = dataflash_disk_close; + d->disk_ctx = fd; + d->page_size = mem_info[fd->dev].page_size; + d->page_count = mem_info[fd->dev].page_cnt; + ASSERT(page_array); + d->page_array = page_array; + return d->page_array && fd; +} +#endif + +/* Kfile interface section */ + +/** + * Flush select page (stored in buffer) in data flash main memory page. + */ +static int dataflash_flush(KFile *_fd) +{ + DataFlash *fd = DATAFLASH_CAST(_fd); + if (fd->page_dirty) + { + dataflash_cmd(fd, fd->current_page, 0x00, DFO_WRITE_BUFF1_TO_MEM_E); + + fd->page_dirty = false; + + LOG_INFO("Flushing page {%ld}\n", fd->current_page); + } + return 0; +} + + +/** + * Close file \a fd. + */ +static int dataflash_close(struct KFile *_fd) +{ + dataflash_flush(_fd); + LOG_INFO("Close.\n"); + return 0; +} + +/** + * Reopen dataflash file \a fd. + */ +static KFile *dataflash_reopen(KFile *_fd) +{ + DataFlash *fd = DATAFLASH_CAST(_fd); + dataflash_close(_fd); + + fd->current_page = 0; + fd->fd.seek_pos = 0; + + /* Load selected page from dataflash memory */ + dataflash_loadPage(fd, fd->current_page); + + LOG_INFO("Reopen.\n"); + return &fd->fd; +} + + +/** + * Read in \a buf \a size bytes from dataflash memmory. + * + * \note For reading data flash memory, we + * check flag page_dirty, if is true (that mean + * we have written a byte in buffer memory) we + * flush current page in main memory and + * then read from memory, else we read byte + * directly from data flash main memory. + * + * \return the number of bytes read. + */ +static size_t dataflash_read(struct KFile *_fd, void *buf, size_t size) +{ + DataFlash *fd = DATAFLASH_CAST(_fd); + + dataflash_offset_t byte_addr; + dataflash_page_t page_addr; + uint8_t *data = (uint8_t *)buf; + + + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size); + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + LOG_INFO("Reading at pos[%lu]\n", fd->fd.seek_pos); + + /* + * We select page and offest from absolute address. + */ + page_addr = fd->fd.seek_pos / mem_info[fd->dev].page_size; + byte_addr = fd->fd.seek_pos % mem_info[fd->dev].page_size; + + LOG_INFO("[page-{%ld}, byte-{%ld}]\n", page_addr, byte_addr); + + /* + * Flush current page in main memory if + * we had been written a byte in memory + */ + dataflash_flush(&fd->fd); + + /* + * Read byte in main page data flash memory. + */ + dataflash_readBlock(fd, page_addr, byte_addr, data, size); + + fd->fd.seek_pos += size; + LOG_INFO("Read %ld bytes\n", (long int)size); + + return size; +} + +/** + * Write \a _buf in dataflash memory + * + * \note For writing \a _buf in dataflash memory, we must + * first write in buffer data flash memory. At the end of write, + * we can put page in dataflash main memory. + * If we write in two contiguous pages, we put in main memory current + * page and then reload the page which we want to write. + * + * \return the number of bytes write. + */ +static size_t dataflash_write(struct KFile *_fd, const void *_buf, size_t size) +{ + DataFlash *fd = DATAFLASH_CAST(_fd); + + dataflash_offset_t offset; + dataflash_page_t new_page; + size_t total_write = 0; + + const uint8_t *data = (const uint8_t *) _buf; + + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size); + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + LOG_INFO("Writing at pos[%lu]\n", fd->fd.seek_pos); + + while (size) + { + /* + * We select page and offest from absolute address. + */ + new_page = fd->fd.seek_pos / mem_info[fd->dev].page_size; + offset = fd->fd.seek_pos % mem_info[fd->dev].page_size; + + + size_t wr_len = MIN((dataflash_size_t)size, mem_info[fd->dev].page_size - offset); + + LOG_INFO("[page-{%ld}, byte-{%ld}]\n",new_page, offset); + + if (new_page != fd->current_page) + { + /* Flush current page in main memory*/ + dataflash_flush(&fd->fd); + /* Load select page memory from data flash memory*/ + dataflash_loadPage(fd, new_page); + + fd->current_page = new_page; + LOG_INFO(" >> Load page: {%ld}\n", new_page); + } + /* + * Write byte in current page, and set true + * page_dirty flag. + */ + dataflash_writeBlock(fd, offset, data, wr_len); + fd->page_dirty = true; + + data += wr_len; + fd->fd.seek_pos += wr_len; + size -= wr_len; + total_write += wr_len; + } + + LOG_INFO("written %lu bytes\n", (long unsigned)total_write); + return total_write; +} + +MOD_DEFINE(dataflash); + +/** + * Dataflash init function. + * This function initialize \a fd with SPI channel \a ch and test if data flash memory + * density is the same specified by device \a dev. + * \a setCS is a callback used to set/reset CS line. + * \a setReset is a callback used to set/reset the dataflash (can be NULL if reset is unconnected) + * \return true if ok, false if memory density read from dataflash is not compliant with the + * configured one. + */ +bool dataflash_init(DataFlash *fd, KFile *ch, DataflashType dev, dataflash_setCS_t *setCS, dataflash_setReset_t *setReset) +{ + uint8_t stat; + + MOD_CHECK(hw_dataflash); + + ASSERT(fd); + ASSERT(ch); + ASSERT(setCS); + ASSERT(dev < DFT_CNT); + + memset(fd, 0, sizeof(*fd)); + DB(fd->fd._type = KFT_DATAFLASH); + fd->dev = dev; + fd->channel = ch; + fd->setReset = setReset; + fd->setCS = setCS; + + // Setup data flash programming functions. + fd->fd.reopen = dataflash_reopen; + fd->fd.close = dataflash_close; + fd->fd.read = dataflash_read; + fd->fd.write = dataflash_write; + fd->fd.seek = kfile_genericSeek; + fd->fd.flush = dataflash_flush; + + dataflash_reset(fd); + stat = dataflash_stat(fd); + + /* + * 2,3,4,5 bits of 1 byte status register + * indicate a device density of dataflash memory + * (see datasheet for more detail.) + */ + if (GET_ID_DESITY_DEVICE(stat) != mem_info[fd->dev].density_id) + return false; + + fd->current_page = 0; + fd->fd.seek_pos = 0; + fd->fd.size = mem_info[fd->dev].page_size * mem_info[fd->dev].page_cnt; + + /* Load selected page from dataflash memory */ + dataflash_loadPage(fd, fd->current_page); + MOD_INIT(dataflash); + return true; +} diff --git a/bertos/drv/dataflash.h b/bertos/drv/dataflash.h new file mode 100644 index 0000000..90dac59 --- /dev/null +++ b/bertos/drv/dataflash.h @@ -0,0 +1,205 @@ +/** + * \file + * + * + * \brief Function library for dataflash AT45DB family. + * + * + * \author Daniele Basile + * + * $WIZ$ module_name = "dataflash" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_dataflash.h" + * $WIZ$ module_hw = "bertos/hw/hw_dataflash.h", "bertos/hw/hw_dataflash.c" + */ + + +#ifndef DRV_DATAFLASH_H +#define DRV_DATAFLASH_H + +#include + +#include +#include + +/** + * Type definitions for dflash memory. + * \{ + */ +typedef uint32_t dataflash_page_t; +typedef uint32_t dataflash_offset_t; +typedef uint32_t dataflash_size_t; +/*\}*/ + +/** + * + */ +typedef void (dataflash_setReset_t)(bool); +typedef void (dataflash_setCS_t)(bool); + +/** + * Memory definitions. + * + * List of supported memory devices by this drive. + * Every time we call dataflash_init() we check device id to + * ensure we choose the right memory configuration. + * (see dataflash.c for more details). + */ +typedef enum DataflashType +{ + DFT_AT45DB041B = 0, + DFT_AT45DB081D, + DFT_AT45DB161D, + DFT_AT45DB642D, + DFT_CNT +} DataflashType; + + +/** + * Dataflash KFile context structure. + */ +typedef struct DataFlash +{ + KFile fd; ///< File descriptor. + KFile *channel; ///< Dataflash comm channel (usually SPI). + DataflashType dev; ///< Memory device type; + dataflash_page_t current_page; ///< Current loaded dataflash page. + bool page_dirty; ///< True if current_page is dirty (needs to be flushed). + dataflash_setReset_t *setReset; ///< Callback used to set reset pin of dataflash. + dataflash_setCS_t *setCS; ///< Callback used to set CS pin of dataflash. +} DataFlash; + +/** + * ID for dataflash. + */ +#define KFT_DATAFLASH MAKE_ID('D', 'F', 'L', 'H') + +/** + * Convert + ASSERT from generic KFile to DataFlash. + */ +INLINE DataFlash * DATAFLASH_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_DATAFLASH); + return (DataFlash *)fd; +} + +#define RESET_PULSE_WIDTH 10 ///< Width of reset pulse in usec. +#define BUSY_BIT 0x80 ///< Select a busy bit in status register. +#define CMP_BIT 0x40 ///< Select a compare bit in status register. + +/** + * Select bits 2-5 of status register. These + * bits indicate device density (see datasheet for + * more details). + */ +#define GET_ID_DESITY_DEVICE(reg_stat) (((reg_stat) & 0x3C) >> 2) + +/** + * Data flash opcode commands. + */ +typedef enum DataFlashOpcode { + /** + * Dataflash read commands. + * \{ + */ + DFO_READ_FLASH_MEM_BYTE_D = 0x0B, ///< Continuos array read for D type memories. + DFO_READ_FLASH_MEM_BYTE_B = 0xE8, ///< Continuos array read for B type memories. + + DFO_READ_FLASH_MEM = 0xD2, ///< Main memory page read. + DFO_READ_BUFF1 = 0xD4, ///< SRAM buffer 1 read. + DFO_READ_BUFF2 = 0xD6, ///< SRAM buffer 2 read. + /* \}*/ + + /** + * Program and erase commands data flash. + * \{ + */ + DFO_WRITE_BUFF1 = 0x84, ///< SRAM buffer 1 write. + DFO_WRITE_BUFF2 = 0x87, ///< SRAM buffer 2 write. + DFO_WRITE_BUFF1_TO_MEM_E = 0x83, ///< Buffer 1 to main memory page program with built-in erase. + DFO_WRITE_BUFF2_TO_MEM_E = 0x86, ///< Buffer 2 to main memory page program with built-in erase. + DFO_WRITE_BUFF1_TO_MEM = 0x88, ///< Buffer 1 to main memory page program without built-in erase. + DFO_WRITE_BUFF2_TO_MEM = 0x89, ///< Buffer 2 to main memory page program without built-in erase. + DFO_ERASE_PAGE = 0x81, ///< Erase page. + DFO_ERASE_BLOCK = 0x50, ///< Erase block. + DFO_ERASE_SECTOR = 0x7C, ///< Erase sector. + DFO_WRITE_MEM_TR_BUFF1 = 0x82, ///< Write main memory page through buffer 1. + DFO_WRITE_MEM_TR_BUFF2 = 0x85, ///< Write main memory page through buffer 2. + /* \}*/ + + /** + * Additional dataflash commands. + * \{ + */ + DFO_MOV_MEM_TO_BUFF1 = 0x53, ///< Transfer main mmemory to buffer 1. + DFO_MOV_MEM_TO_BUFF2 = 0x55, ///< Transfer main mmemory to buffer 2. + DFO_CMP_MEM_TO_BUFF1 = 0x60, ///< Compare main mmemory with buffer 1. + DFO_CMP_MEM_TO_BUFF2 = 0x61, ///< Compare main mmemory with buffer 2. + DFO_ARW_MEM_TR_BUFF1 = 0x58, ///< Auto page rewrite through buffer 1. + DFO_ARW_MEM_TR_BUFF2 = 0x59, ///< Auto page rewrite through buffer 2 + DFO_PWR_DOWN = 0xB9, ///< Deep power-down. + DFO_RESUME_PWR_DOWN = 0xAB, ///< Resume from deep power-down. + DFO_READ_STATUS = 0xD7, ///< Read status register. + DFO_ID_DEV = 0x9F ///< Read manufacturer and device ID. + /* \}*/ +} DataFlashOpcode; + + +/** + * Structure used to describe a dataflash memory. + */ +typedef struct DataflashInfo +{ + uint8_t density_id; ///< Density id, used to check memory type. + dataflash_size_t page_size; ///< Page size, in bytes. + uint8_t page_bits; ///< Number of bits needed to access a page. + uint16_t page_cnt; ///< Number of pages on memory. + DataFlashOpcode read_cmd; ///< Command to be used to perform a continuous array. +} DataflashInfo; + + +bool dataflash_init(DataFlash *fd, KFile *ch, DataflashType type, dataflash_setCS_t *setCS, dataflash_setReset_t *setReset); +bool dataflash_diskInit(struct BattFsSuper *d, DataFlash *fd, pgcnt_t *page_array); + +/** + * To test data falsh drive you could use + * this functions. To use these functions make sure to include in your make file the + * drv/datafalsh_test.c source. + * + * (see drv/datafalsh_test.c for more detail) + */ +int dataflash_testSetup(void); +/* For backward compatibility */ +#define dataflash_testSetUp() dataflash_testSetup() +int dataflash_testRun(void); +int dataflash_testTearDown(void); + +#endif /* DRV_DATAFLASH_H */ diff --git a/bertos/drv/dataflash_hwtest.c b/bertos/drv/dataflash_hwtest.c new file mode 100644 index 0000000..a90814d --- /dev/null +++ b/bertos/drv/dataflash_hwtest.c @@ -0,0 +1,230 @@ +/** + * \file + * + * + * \brief DataFlash test. + * + * This module test the dataflash memory among the supported memory (see drv/dataflash.h + * for more detail). + * To test memory we fill one buffer with casual char, and write it in different + * part of memory. After every write we read the data that we have been write + * and compare this with test buffer, checking if write and read command work + * correclty. We also check if driver work properly when we make a write out the + * limit of memory size. + * + * Note: dataflash driver use a kfile interface, so for write/read test + * we use a kfile_test module that perform some generic test. + * + * + * \author Daniele Basile + */ + +#include "hw/hw_dataflash.h" +#include "cfg/cfg_dataflash.h" +#include "cfg/cfg_proc.h" + +#include +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL DATAFLASH_LOG_LEVEL +#define LOG_FORMAT DATAFLASH_LOG_FORMAT +#include // for logging system + +#include +#include +#include + +#include +#include + +#include + +/* + * Settings for dataflash test + * + * \{ + */ +// Datafalsh type memory to test (see drv/dataflash.h for supported memory types) +#define DATAFLASH_MEM_MODEL DFT_AT45DB642D + +// Function to set CS, this is typically implement in hw/hw_dataflash.{c, h} +#define DATAFLASH_FUNC_CS_SET dataflash_hw_setCS + +// Function to reset memery, this is typically implement in hw/hw_dataflash.{c, h} +#define DATAFLASH_FUNC_RESET NULL + +// Buffer len to test dataflash +#define DATAFLASH_TEST_STR_LEN 12307 + +// If you want use a rand function of standard library set to 1. +#define DATAFLASH_USE_RAND_FUNC 0 +/* \} */ + +/* + * Kfile structure to test a dataflash. + */ +static Serial spi_fd; +static DataFlash dflash_fd; + +/* + * Define tmp buffer to stora data for + * write and read flash memory test. + */ +static uint8_t test_buf[DATAFLASH_TEST_STR_LEN]; +static uint8_t save_buf[DATAFLASH_TEST_STR_LEN]; + +/** + * Setup all needed to test dataflash memory + * + */ +int dataflash_testSetup(void) +{ + kfile_testSetup(); + LOG_INFO("KFILE setup..ok\n"); + + LOG_INFO("Check if kernel is enable (if enable you should see the assert message.)\n"); + SILENT_ASSERT("bertos/drv/dataflash_test.c:119: Assertion failed: !CONFIG_KERN"); + ASSERT(!CONFIG_KERN); + + /* + * This test use a kfile_test module, + * so should include source in your makefile. + */ + MOD_CHECK(kfile_test); + + timer_init(); + LOG_INFO("Timer init..ok\n"); + + /* + * Init SPI module and dataflash driver. + */ + // Open SPI comunication channel + spimaster_init(&spi_fd, 0); + LOG_INFO("SPI0 init..ok\n"); + + ser_setbaudrate(&spi_fd, 5000000UL); + LOG_INFO("SPI0 set baudrate..ok\n"); + + //Init dataflash memory + dataflash_hw_init(); + LOG_INFO("DATAFLASH HW..ok\n"); + + if (dataflash_init(&dflash_fd, &spi_fd.fd, DATAFLASH_MEM_MODEL, DATAFLASH_FUNC_CS_SET, DATAFLASH_FUNC_RESET)) + LOG_INFO("DATAFLASH init..ok\n"); + else + LOG_ERR("DATAFLASH init..fail\n"); + + + //Fill tmp buffer with rand chars. + for (int i = 0; i < DATAFLASH_TEST_STR_LEN; i++) + { + #if DATAFLASH_USE_RAND_FUNC + #include //Rand() + + test_buf[i] = (uint8_t)rand(); + #else + test_buf[i] = (i & 0xff); + #endif + } + + LOG_INFO("Fill tmp buff..ok\n"); + + return 0; +} + + +/** + * Run dataflash test memory + * + */ +int dataflash_testRun(void) +{ + LOG_INFO("Run KFILE test.\n"); + + SILENT_ASSERT("bertos/drv/dataflash.c:405: Assertion failed: fd->fd.seek_pos + size <= fd->fd.size"); + if (kfile_testRunGeneric(&dflash_fd.fd, test_buf, save_buf, sizeof(test_buf)) != EOF) + { + LOG_INFO("KFILE test..ok\n"); + } + else + { + LOG_ERR("KFILE test..fail!\n"); + return EOF; + } + + return 0; +} + +/** + * End a dataflash Test. + * (Unused) + */ +int dataflash_testTearDown(void) +{ + /* */ + return 0; +} + +/* + * Empty main. + * + * Look it as exmple, or use it if + * you want test a data flash driver stand alone. + */ +#if 0 +int main(void) +{ + IRQ_ENABLE; + kdbg_init(); + + #if CONFIG_KERN + proc_init(); + #endif + + if (!dataflash_testSetup()) + { + LOG_INFO("DATAFLASH setup..ok\n"); + } + else + { + LOG_ERR("DATAFLASH setup..fail!\n"); + return EOF; + } + + dataflash_testRun(); + + for(;;) + { + } +} +#endif diff --git a/bertos/drv/dc_motor.c b/bertos/drv/dc_motor.c new file mode 100644 index 0000000..3609b7b --- /dev/null +++ b/bertos/drv/dc_motor.c @@ -0,0 +1,503 @@ +/** + * \file + * + * + * + * \brief DC motor driver (implementation) + * + * Thi module provide a simple api to controll a DC motor in direction and + * speed, to allow this we use a Back-EMF technique. + * This technique is based, on the capability of the DC motor to become a generator + * of voltage when we turn off its supply. This happen every time we turn off the + * DC motor supply, and it continues to rotate for a short time thanks to its mechanical + * energy. Using this idea we can turn off the motor for a very short time, and + * we read the volage value from DC motor supply pins. This voltage say to us + * the actual speed of the motor. + * + * \author Daniele Basile + */ + +#include "dc_motor.h" +#include "hw/hw_dc_motor.h" +#include "cfg/cfg_pwm.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL DC_MOTOR_LOG_LEVEL +#define LOG_FORMAT DC_MOTOR_LOG_FORMAT + +#include +#include + +#include + +#include + +#include + +#include + +#include + +#if CFG_PWM_ENABLE_OLD_API + #define PWM_ENABLE(dcm, en) pwm_enable((dcm)->cfg->pwm_dev, (en)) + #define PWM_SETDUTY(dcm, duty) pwm_setDuty((dcm)->cfg->pwm_dev, (duty)) + #define PWM_SETFREQ(dcm, freq) pwm_setFrequency((dcm)->cfg->pwm_dev, (freq)) + #define PWM_SETPOL(dcm, pol) pwm_setPolarity((dcm)->cfg->pwm_dev, (pol)) +#else + #define PWM_ENABLE(dcm, en) pwm_enable(&(dcm)->pwm, (en)) + #define PWM_SETDUTY(dcm, duty) pwm_setDuty(&(dcm)->pwm, (duty)) + #define PWM_SETFREQ(dcm, freq) pwm_setFrequency(&(dcm)->pwm, (freq)) + #define PWM_SETPOL(dcm, pol) pwm_setPolarity(&(dcm)->pwm, (pol)) +#endif + +/** + * Define status bit for DC motor device. + */ +#define DC_MOTOR_ACTIVE BV(0) ///< DC motor enable or disable flag. +#define DC_MOTOR_DIR BV(1) ///< Spin direction of DC motor. + +/* + * Some utility macro for motor directions + */ +#define POS_DIR 1 +#define NEG_DIR 0 +#define DC_MOTOR_POS_DIR(x) ((x) |= DC_MOTOR_DIR) // Set directions status positive +#define DC_MOTOR_NEG_DIR(x) ((x) &= ~DC_MOTOR_DIR) // Set directions status negative + +// Update the status with current direction +#define DC_MOTOR_SET_STATUS_DIR(status, dir) \ + (dir == POS_DIR ? DC_MOTOR_POS_DIR(status) : DC_MOTOR_NEG_DIR(status)) + +#if (CONFIG_KERN && CONFIG_KERN_PREEMPT) + #if CONFIG_DC_MOTOR_USE_SEM + #include + + Semaphore dc_motor_sem; + #define DC_MOTOR_LOCK sem_obtain(&dc_motor_sem) + #define DC_MOTOR_UNLOCK sem_release(&dc_motor_sem) + #else + #define DC_MOTOR_LOCK proc_forbid() + #define DC_MOTOR_UNLOCK proc_permit() + #endif +#else + #define DC_MOTOR_LOCK /* None */ + #define DC_MOTOR_UNLOCK /* None */ +#endif + +/** + * DC motor definition. + */ +static DCMotor dcm_all[CONFIG_NUM_DC_MOTOR]; + +/* + * Process to poll dc motor status + */ +struct Process *dc_motor; + + +// Stack process for DC motor poll. +static PROC_DEFINE_STACK(dc_motor_poll_stack, 500); + +// Only for Debug +LOG_INFOB(static int debug_msg_delay = 0;); + + +INLINE dc_speed_t dc_motor_readSpeed(int index) +{ + DCMotor *dcm = &dcm_all[index]; + return HW_DC_MOTOR_READ_VALUE(dcm->cfg->adc_ch, dcm->cfg->adc_min, dcm->cfg->adc_max); +} + +/** + * Read the target speed from select device. + */ +dc_speed_t dc_motor_readTargetSpeed(int index) +{ + DCMotor *dcm = &dcm_all[index]; + return HW_DC_MOTOR_READ_VALUE(dcm->cfg->speed_dev_id, CONFIG_DC_MOTOR_MIN_SPEED, CONFIG_DC_MOTOR_MAX_SPEED); +} + +static void dc_motor_start(int index) +{ + DCMotor *dcm = &dcm_all[index]; + + DC_MOTOR_LOCK; + /* + * Clean all PID stutus variable, becouse + * we start with new one. + */ + pid_control_reset(&dcm->pid_ctx); + dcm->status |= DC_MOTOR_ACTIVE; + DC_MOTOR_UNLOCK; +} + +/* + * There are two \a mode to stop the dc motor: + * - DC_MOTOR_DISABLE_MODE + * - DC_MOTOR_IDLE + * + * The DC_MOTOR_DISABLE_MODE shut down the DC motor and + * leave it floating to rotate. + * The DC_MOTOR_IDLE does not shut down DC motor, but put + * its supply pin in short circuite, in this way the motor result + * braked from intentional rotation. + */ +static void dc_motor_stop(int index) +{ + DCMotor *dcm = &dcm_all[index]; + + DC_MOTOR_LOCK; + + dcm->status &= ~DC_MOTOR_ACTIVE; + dcm->expire_time = DC_MOTOR_NO_EXPIRE; + PWM_ENABLE(dcm, false); + + if (dcm->cfg->braked) + { + DC_MOTOR_STOP_BRAKED(dcm->index); + } + else + { + DC_MOTOR_STOP_FLOAT(dcm->index); + } + + DC_MOTOR_UNLOCK; +} + +/* + * Sampling a signal on DC motor and compute + * a new value of speed according with PID control. + */ +static void dc_motor_do(int index) +{ + DCMotor *dcm = &dcm_all[index]; + + dc_speed_t curr_pos = 0; + pwm_duty_t new_pid = 0; + + DC_MOTOR_LOCK; + + //If select DC motor is not active we return + if (!(dcm->status & DC_MOTOR_ACTIVE)) + { + DC_MOTOR_UNLOCK; + return; + } + + /* + * To set dc motor direction we must also set the + * PWM polarity according with dc motor driver chip + */ + PWM_SETPOL(dcm, dcm->status & DC_MOTOR_DIR); + DC_MOTOR_SET_DIR(dcm->index, dcm->status & DC_MOTOR_DIR); + + //Compute next value for reaching target speed from current position + if (dcm->cfg->pid_enable) + { + /* + * Here we cannot disable the switch context because the + * driver, that read the speed could be need to use signal or + * other thing that needs the kernel switch context, for this + * reason we unlock before to read the speed. + */ + DC_MOTOR_UNLOCK; + curr_pos = dc_motor_readSpeed(index); + DC_MOTOR_LOCK; + new_pid = pid_control_update(&dcm->pid_ctx, dcm->tgt_speed, curr_pos); + } + else + { + new_pid = dcm->tgt_speed; + } + + LOG_INFOB( + if (debug_msg_delay == 20) + { + LOG_INFO("DC Motor[%d]: curr_speed[%d],curr_pos[%d],tgt[%d]\n", dcm->index, + curr_pos, new_pid, dcm->tgt_speed); + debug_msg_delay = 0; + } + debug_msg_delay++; + ); + + //Apply the compute duty value + PWM_SETDUTY(dcm, new_pid); + + //Restart dc motor + PWM_ENABLE(dcm, true); + + DC_MOTOR_ENABLE(dcm->index); + DC_MOTOR_UNLOCK; +} + + +/* + * Check if the DC motor run time is expired, if this happend + * we turn off motor and reset status. + */ +INLINE bool check_timerIsExpired(int index) +{ + + DC_MOTOR_LOCK; + bool check = ((dcm_all[index].expire_time - timer_clock()) < 0) && + (dcm_all[index].expire_time != DC_MOTOR_NO_EXPIRE); + DC_MOTOR_UNLOCK; + + return check; +} + +/** + * Process to poll DC motor status. + * To use a Back-EMF technique (see brief for more details), + * we turn off a motor for CONFIG_DC_MOTOR_SAMPLE_DELAY, that value are stored + * in each DC motor config. For this implementation we assume + * that have a common CONFIG_DC_MOTOR_SAMPLE_DELAY, choose among a max delay + * to all DC motor configuration. + * The DC motor off time is choose to allow the out signal to + * be stable, so we can read and process this value for feedback controll loop. + * The period (CONFIG_DC_MOTOR_SAMPLE_PERIOD - CONFIG_DC_MOTOR_SAMPLE_DELAY) + * that every time we turn off a DC motor is choose to have a feedback controll + * more responsive or less responsive. + */ +static void NORETURN dc_motor_poll(void) +{ + for (;;) + { + /* + * For all DC motor we read and process output singal, + * and choose the max value to off time + */ + for (int i = 0; i < CONFIG_NUM_DC_MOTOR; i++) + { + if (!dcm_all[i].cfg) + continue; + + if (check_timerIsExpired(i)) + dc_motor_stop(i); + else + dc_motor_do(i); + + /* + * If we read speed from trimmer we update the target + * speed value when motor is running so we can make + * dc motor speed regulation. + */ + if (dcm_all[i].cfg->speed_dev_id != DC_MOTOR_NO_DEV_SPEED) + dc_motor_setSpeed(i, dc_motor_readTargetSpeed(i)); + } + + //Wait for next sampling + timer_delay(CONFIG_DC_MOTOR_SAMPLE_PERIOD - CONFIG_DC_MOTOR_SAMPLE_DELAY); + + for (int i = 0; i < CONFIG_NUM_DC_MOTOR; i++) + { + if (!dcm_all[i].cfg) + continue; + + if (check_timerIsExpired(i)) + dc_motor_stop(i); + + DC_MOTOR_LOCK; + if (dcm_all[i].status & DC_MOTOR_ACTIVE) + { + DC_MOTOR_DISABLE(dcm_all[i].index); + PWM_ENABLE(&dcm_all[i], false); + } + DC_MOTOR_UNLOCK; + } + + //Wait some time to allow signal to stabilize before sampling + timer_delay(CONFIG_DC_MOTOR_SAMPLE_DELAY); + } +} + +/** + * Set spin direction of DC motor. + * + * \a index number of DC motor + * \a dir direction of DC motor + */ +void dc_motor_setDir(int index, bool dir) +{ + DCMotor *dcm = &dcm_all[index]; + DC_MOTOR_LOCK; + DC_MOTOR_SET_STATUS_DIR(dcm->status, dir); + DC_MOTOR_UNLOCK; +} + +/** + * Set DC motor speed. + */ +void dc_motor_setSpeed(int index, dc_speed_t speed) +{ + DCMotor *dcm = &dcm_all[index]; + + DC_MOTOR_LOCK; + dcm->tgt_speed = speed; + DC_MOTOR_UNLOCK; + + LOG_INFO("DC Motor[%d]: tgt_speed[%d]\n", index, dcm->tgt_speed); +} + +/** + * Set among of time that dc motor should run. + */ +void dc_motor_startTimer(int index, mtime_t on_time) +{ + DC_MOTOR_LOCK; + dcm_all[index].expire_time = DC_MOTOR_NO_EXPIRE; + if (on_time != DC_MOTOR_NO_EXPIRE) + { + dcm_all[index].expire_time = timer_clock() + ms_to_ticks(on_time); + dc_motor_start(index); + } + DC_MOTOR_UNLOCK; +} + +void dc_motor_waitStop(int index) +{ + DCMotor *dcm = &dcm_all[index]; + bool loop = true; + + while (loop) + { + DC_MOTOR_LOCK; + loop = dcm->status & DC_MOTOR_ACTIVE; + DC_MOTOR_UNLOCK; + + cpu_relax(); + } +} + +/** + * Enable or disable dc motor. + */ +void dc_motor_enable(int index, bool state) +{ + if (state) + dc_motor_start(index); + else + dc_motor_stop(index); +} + +/** + * Apply a confinguration to select DC motor. + */ +void dc_motor_setup(int index, DCMotorConfig *dcm_conf) +{ + DCMotor *dcm = &dcm_all[index]; + + DC_MOTOR_LOCK; + /* + * We are using the same sample period for each + * motor, and so we check if this value is the same + * for all. The sample period time is defined in pid + * configuration. + * + * TODO: Use a different sample period for each motor + * and refactor a module to allow to use a timer interrupt, + * in this way we can controll a DC motor also without a + * kernel, increasing a portability on other target. + */ + pid_control_setPeriod(&dcm_conf->pid_cfg, CONFIG_DC_MOTOR_SAMPLE_PERIOD); + + //Init pid control + pid_control_init(&dcm->pid_ctx, &dcm_conf->pid_cfg); + + + dcm->cfg = dcm_conf; + + /* + * Apply config value. + */ + dcm->index = index; + + /* + * By default the motor run forever.. + */ + dcm->expire_time = DC_MOTOR_NO_EXPIRE; + + /* + * By default set target speed. + */ + dcm->tgt_speed = dcm_conf->speed; + + /* + * Clear the status. + */ + dcm->status = 0; +#if !CFG_PWM_ENABLE_OLD_API + pwm_init(&dcm->pwm, dcm_conf->pwm_dev); +#endif + PWM_SETFREQ(dcm, dcm->cfg->freq); + PWM_ENABLE(dcm, false); + + //Set default direction for DC motor + DC_MOTOR_SET_DIR(dcm->index, dcm->cfg->dir); + DC_MOTOR_SET_STATUS_DIR(dcm->status, dcm->cfg->dir); + + DC_MOTOR_UNLOCK; + + LOG_INFO("DC motor[%d]:\n", dcm->index); + LOG_INFO("> PID: kp[%f],ki[%f],kd[%f]\n", dcm->cfg->pid_cfg.kp, dcm->cfg->pid_cfg.ki, dcm->cfg->pid_cfg.kd); + LOG_INFO("> PWM: pwm_dev[%d], freq[%ld], sample[%d]\n", dcm->cfg->pwm_dev, dcm->cfg->freq,CONFIG_DC_MOTOR_SAMPLE_DELAY); + LOG_INFO("> ADC: adc_ch[%d], adc_max[%d], adc_min[%d]\n", dcm->cfg->adc_ch, dcm->cfg->adc_max, dcm->cfg->adc_min); + LOG_INFO("> DC: dir[%d], speed[%d]\n", dcm->cfg->dir, dcm->cfg->speed); +} + +/** + * If we had enabled the priority scheduling, we can adjust the + * DC motor poll process priority. + */ +void dc_motor_setPriority(int priority) +{ + ASSERT(CONFIG_KERN); + ASSERT(dc_motor); + proc_setPri(dc_motor, priority); +} + +/** + * Init DC motor. + * \a priority: sets the dc motor process priority. + */ +void dc_motor_init(void) +{ + ASSERT(CONFIG_KERN); + + MOTOR_DC_INIT(); + + #if (CONFIG_KERN_PREEMPT && CONFIG_DC_MOTOR_USE_SEM) + sem_init(&dc_motor_sem); + #endif + + //Create a dc motor poll process + dc_motor = proc_new_with_name("DC_Motor", dc_motor_poll, NULL, sizeof(dc_motor_poll_stack), dc_motor_poll_stack); +} + diff --git a/bertos/drv/dc_motor.h b/bertos/drv/dc_motor.h new file mode 100644 index 0000000..f6fc6c5 --- /dev/null +++ b/bertos/drv/dc_motor.h @@ -0,0 +1,131 @@ +/** + * \file + * + * + * + * \brief DC motor driver. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "dc_motor" + * $WIZ$ module_depends = "pwm", "pid_control", "adc", "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_dc_motor.h" + * $WIZ$ module_hw = "bertos/hw/hw_dc_motor.h" + */ + +#ifndef DRV_DC_MOTOR_H +#define DRV_DC_MOTOR_H + +#include "hw/hw_dc_motor.h" + +#include "cfg/cfg_dc_motor.h" +#include "cfg/cfg_pwm.h" +#include + +#include + +#include +#include +#include + +#define DC_MOTOR_NO_EXPIRE -1 ///< The DC motor runs do not expire, so it runs forever. +#define DC_MOTOR_NO_DEV_SPEED -1 ///< Disable the speed acquire from device (like trimmer, etc.). + +/** + * Type for DC motor. + */ +typedef uint16_t dc_speed_t; + +/** + * DC motor configuration stucture + */ +typedef struct DCMotorConfig +{ + PidCfg pid_cfg; ///< Pid control. + bool pid_enable; ///< Flag to disable or enable pid control. + + unsigned pwm_dev; ///< Pwm channel. + pwm_freq_t freq; ///< Pwm waveform frequency. + + adc_ch_t adc_ch; ///< ADC channel. + adcread_t adc_max; ///< ADC max scale value. + adcread_t adc_min; ///< ADC min scale value. + + bool dir; ///< Default direction for select DC motor. + bool braked; ///< If true the motor is braked when we turn off it. + + dc_speed_t speed; ///< Default speed value for select DC motor. + + int speed_dev_id; ///< Index of the device where read speed, to disable set to DC_MOTOR_NO_DEV_SPEED. + +} DCMotorConfig; + + +/** + * Context structure for DC motor. + */ +typedef struct DCMotor +{ + const DCMotorConfig *cfg; // All configuration for select DC motor. + PidContext pid_ctx; // Pid control. + +#if !CFG_PWM_ENABLE_OLD_API + Pwm pwm; // Pwm context +#endif + + int index; // DC motor id. + uint32_t status; // Status of select DC motor + dc_speed_t tgt_speed; // Target speed for select DC motor + + ticks_t expire_time; // Amount of time that dc motor run + +} DCMotor; + +void dc_motor_setDir(int index, bool dir); +void dc_motor_enable(int index, bool state); +void dc_motor_setSpeed(int index, dc_speed_t speed); +void dc_motor_startTimer(int index, mtime_t on_time); +void dc_motor_waitStop(int index); +void dc_motor_setup(int index, DCMotorConfig *dcm_conf); +dc_speed_t dc_motor_readTargetSpeed(int index); +void dc_motor_setPriority(int priority); +void dc_motor_init(void); + + +/** + * Test function prototypes. + * + * See dc_motor_hwtest.c file. + */ +int dc_motor_testSetUp(void); +void dc_motor_testRun(void); +int dc_motor_testTearDown(void); + +#endif /* DRV_DC_MOTOR_H */ diff --git a/bertos/drv/dc_motor_hwtest.c b/bertos/drv/dc_motor_hwtest.c new file mode 100644 index 0000000..50901b2 --- /dev/null +++ b/bertos/drv/dc_motor_hwtest.c @@ -0,0 +1,180 @@ +/** + * \file + * + * + * + * \brief Test for PWM driver (implementation) + * + * This is a simple test for PWM driver. This module + * is target independent, so you can test all target that + * BeRTOS support. + * To use this test you should include a pwm_map.h header where + * are defined the PWM channels for your target. Then you should add + * or remove a test setting in pwm_test_cfg array, and edit a value for + * your specific test. + * Afther this, all is ready and you can test PWM driver. + * + * The test check first if all PWM channel starts, and then try + * to change a PWM duty cicle for all channel. + * The change of duty cycle is operate when a PWM channel is enable, + * in this way you can see if a pwm signal is clean and work properly. + * The duty value is change incrementaly, and when it arrive to 100% or 0%, + * we reset the duty value and restart the test. + * Further the duty test, we check also a PWM polarity, infact when we + * reach a reset duty value, we invert a polary of PWM wavform. + * So you can see if the hardware manage correctly this situation. + * + * Note: To be simple and target independently we not use a timer module, + * and so the delay is do with a for cycle. + * + * \author Daniele Basile + * + * \brief HW test for DC Motor. + */ + +#include + +#include +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL DC_MOTOR_LOG_LEVEL +#define LOG_VERBOSITY DC_MOTOR_LOG_FORMAT +#include + + +#include + +#include +#include +#include +#include +#include + +#include + +#include + +#include +#include + +static DCMotorConfig motor = +{ + /* PID */ + { + .kp = 1, /* Proportional coefficient */ + .ki = 4, /* Integral coefficient */ + .kd = 0.008, /* Derivate coefficient */ + .i_max = 2E33, /* Integrale max error value */ + .i_min = -2E33, /* Integrale min error value */ + .out_max = 65535, /* Max output value */ + .out_min = 0, /* Min output value */ + .sample_period = 0 /* Millisecod between 2 output singal sampling */ + }, + .pid_enable = true, /* Enable or disable pid control */ + + /* PWM */ + .pwm_dev = 2, /* PWM channel */ + .freq = 3000, /* Frquency of PWM output waveform */ + + /* ADC */ + .adc_ch = 2, /* ADC channel */ + .adc_max = 65535, /* Max range value for ADC */ + .adc_min = 0, /* Min range value for ADC */ + + /* DC Motor */ + .dir = 1, /* Default spin direction of DC motor */ + .braked = true, + + .speed = 10000, /* Fixed speed value for seldc_motor_enableect DC motor, if enable_dev_speed flag is false */ + .speed_dev_id = 7, /* Index of the device where read speed */ +}; + +int dc_motor_testSetUp(void) +{ + IRQ_ENABLE; + kdbg_init(); + timer_init(); + proc_init(); +#if !CFG_PWM_ENABLE_OLD_API + pwm_init(); +#endif + adc_init(); + + return 0; +} + +#define MOTOR 2 + +void NORETURN dc_motor_testRun(void) +{ + dc_motor_init(); + + /* + * Assign the configuration to motor. + */ + dc_motor_setup(MOTOR, &motor); + + while (1) + { + /* + * Using enable and disable + */ + dc_motor_setDir(MOTOR, 1); + dc_motor_setSpeed(MOTOR, 10000); + dc_motor_enable(MOTOR, true); + timer_delay(500); + dc_motor_enable(MOTOR, false); + + + dc_motor_setDir(MOTOR, 0); + dc_motor_setSpeed(MOTOR, 60000); + dc_motor_enable(MOTOR, true); + timer_delay(150); + dc_motor_enable(MOTOR, false); + + /* + * Using timer + */ + dc_motor_setDir(MOTOR, 1); + dc_motor_setSpeed(MOTOR, 60000); + dc_motor_startTimer(MOTOR, 150); + dc_motor_waitStop(MOTOR); + + dc_motor_setDir(MOTOR, 0); + dc_motor_setSpeed(MOTOR, 10000); + dc_motor_startTimer(MOTOR, 500); + dc_motor_waitStop(MOTOR); + } + +} + +int dc_motor_testTearDown(void) +{ + return 0; +} diff --git a/bertos/drv/eeprom.c b/bertos/drv/eeprom.c new file mode 100644 index 0000000..26bd90f --- /dev/null +++ b/bertos/drv/eeprom.c @@ -0,0 +1,352 @@ +/** + * \file + * + * + * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS (implementation) + * + * \author Stefano Fedrigo + * \author Bernie Innocenti + */ + +#include "eeprom.h" + +#include "cfg/cfg_i2c.h" +#include "cfg/cfg_eeprom.h" + +/* Define logging setting (for cfg/log.h module). */ +#define LOG_LEVEL EEPROM_LOG_LEVEL +#define LOG_FORMAT EEPROM_LOG_FORMAT +#include +#include +#include // MIN() + +#include + +#include + +#include // memset() + +/** + * EEPROM ID code + */ +#define EEPROM_ID 0xA0 + +/** + * This macros form the correct slave address for EEPROMs + */ +#define EEPROM_ADDR(x) (EEPROM_ID | (((uint8_t)((x) & 0x07)) << 1)) + + +/** + * Array used to describe EEPROM memory devices currently supported. + */ +static const EepromInfo mem_info[] = +{ + { + /* 24XX08 */ + .has_dev_addr = false, + .blk_size = 0x10, + .e2_size = 0x400, + }, + { + /* 24XX16 */ + .has_dev_addr = false, + .blk_size = 0x10, + .e2_size = 0x800, + }, + { + /* 24XX256 */ + .has_dev_addr = true, + .blk_size = 0x40, + .e2_size = 0x8000, + }, + { + /* 24XX512 */ + .has_dev_addr = true, + .blk_size = 0x80, + .e2_size = 0x10000, + }, + { + /* 24XX1024 */ + .has_dev_addr = true, + .blk_size = 0x100, + .e2_size = 0x20000, + }, + + /* Add other memories here */ +}; + +STATIC_ASSERT(countof(mem_info) == EEPROM_CNT); + +#define CHUNCK_SIZE 16 + +/** + * Erase EEPROM. + * \param eep is the Kblock context. + * \param addr eeprom address where start to erase + * \param size number of byte to erase + */ +bool eeprom_erase(Eeprom *eep, e2addr_t addr, e2_size_t size) +{ + uint8_t tmp[CHUNCK_SIZE] = { [0 ... (CHUNCK_SIZE - 1)] = 0xFF }; + + while (size) + { + block_idx_t idx = addr / eep->blk.blk_size; + size_t offset = addr % eep->blk.blk_size; + size_t count = MIN(size, (e2_size_t)CHUNCK_SIZE); + size_t ret_len = eep->blk.priv.vt->writeDirect((KBlock *)eep, idx, tmp, offset, count); + size -= ret_len; + addr += ret_len; + + if (ret_len != count) + return false; + } + return true; +} + +/** + * Verify EEPROM. + * \param eep is the Kblock context. + * \param addr eeprom address where start to verify. + * \param buf buffer of data to compare with eeprom data read. + * \param size number of byte to verify. + */ +bool eeprom_verify(Eeprom *eep, e2addr_t addr, const void *buf, size_t size) +{ + uint8_t verify_buf[CHUNCK_SIZE]; + while (size) + { + block_idx_t idx = addr / eep->blk.blk_size; + size_t offset = addr % eep->blk.blk_size; + size_t count = MIN(size, (size_t)CHUNCK_SIZE); + + size_t ret_len = eep->blk.priv.vt->readDirect((KBlock *)eep, idx, verify_buf, offset, count); + + if (ret_len != count) + { + LOG_ERR("Verify read fail.\n"); + return false; + } + + if (memcmp(buf, verify_buf, ret_len) != 0) + { + LOG_ERR("Data mismatch!\n"); + return false; + } + + size -= ret_len; + addr += ret_len; + buf = ((const char *)buf) + ret_len; + } + return true; +} + + +static size_t eeprom_write(KBlock *blk, block_idx_t idx, const void *buf, size_t offset, size_t size) +{ + Eeprom *eep = EEPROM_CAST_KBLOCK(blk); + e2dev_addr_t dev_addr; + uint8_t addr_buf[2]; + uint8_t addr_len; + uint32_t abs_addr = blk->blk_size * idx + offset; + + STATIC_ASSERT(countof(addr_buf) <= sizeof(e2addr_t)); + + /* clamp size to memory limit (otherwise may roll back) */ + ASSERT(idx < blk->priv.blk_start + blk->blk_cnt); + size = MIN(size, blk->blk_size - offset); + + if (mem_info[eep->type].has_dev_addr) + { + dev_addr = eep->addr; + addr_len = 2; + } + else + { + dev_addr = (e2dev_addr_t)((abs_addr >> 8) & 0x07); + addr_len = 1; + } + + if (mem_info[eep->type].has_dev_addr) + { + addr_buf[0] = (abs_addr >> 8) & 0xFF; + addr_buf[1] = (abs_addr & 0xFF); + } + else + { + dev_addr = (e2dev_addr_t)((abs_addr >> 8) & 0x07); + addr_buf[0] = (abs_addr & 0xFF); + } + + i2c_start_w(eep->i2c, EEPROM_ADDR(dev_addr), addr_len + size, I2C_STOP); + i2c_write(eep->i2c, addr_buf, addr_len); + i2c_write(eep->i2c, buf, size); + + if (i2c_error(eep->i2c)) + return 0; + + return size; +} + +static size_t eeprom_readDirect(struct KBlock *_blk, block_idx_t idx, void *_buf, size_t offset, size_t size) +{ + Eeprom *blk = EEPROM_CAST_KBLOCK(_blk); + uint8_t addr_buf[2]; + uint8_t addr_len; + size_t rd_len = 0; + uint8_t *buf = (uint8_t *)_buf; + uint32_t abs_addr = mem_info[blk->type].blk_size * idx + offset; + + STATIC_ASSERT(countof(addr_buf) <= sizeof(e2addr_t)); + + /* clamp size to memory limit (otherwise may roll back) */ + ASSERT(idx < blk->blk.priv.blk_start + blk->blk.blk_cnt); + size = MIN(size, blk->blk.blk_size - offset); + + e2dev_addr_t dev_addr; + if (mem_info[blk->type].has_dev_addr) + { + dev_addr = blk->addr; + addr_len = 2; + addr_buf[0] = (abs_addr >> 8) & 0xFF; + addr_buf[1] = (abs_addr & 0xFF); + } + else + { + dev_addr = (e2dev_addr_t)((abs_addr >> 8) & 0x07); + addr_len = 1; + addr_buf[0] = (abs_addr & 0xFF); + } + + + i2c_start_w(blk->i2c, EEPROM_ADDR(dev_addr), addr_len, I2C_NOSTOP); + i2c_write(blk->i2c, addr_buf, addr_len); + + i2c_start_r(blk->i2c, EEPROM_ADDR(dev_addr), size, I2C_STOP); + i2c_read(blk->i2c, buf, size); + + if (i2c_error(blk->i2c)) + return rd_len; + + rd_len += size; + + return rd_len; +} + +static size_t eeprom_writeDirect(KBlock *blk, block_idx_t idx, const void *buf, size_t offset, size_t size) +{ + Eeprom *eep = EEPROM_CAST_KBLOCK(blk); + if (!eep->verify) + return eeprom_write(blk, idx, buf, offset, size); + else + { + int retries = 5; + while (retries--) + { + uint8_t verify_buf[CHUNCK_SIZE]; + size_t wr_len = 0; + size_t len = 0; + while (size) + { + /* Split read in smaller pieces */ + size_t count = MIN(size, (size_t)CHUNCK_SIZE); + if ((wr_len = eeprom_write(blk, idx, buf, offset, count)) != 0) + { + if (eeprom_readDirect(blk, idx, verify_buf, offset, count) != wr_len) + { + LOG_ERR("Verify read fail.\n"); + return 0; + } + else if (memcmp(buf, verify_buf, wr_len) != 0) + { + LOG_ERR("Data mismatch!\n"); + continue; + } + } + else + { + LOG_ERR("Write fail.\n"); + return 0; + } + size -= wr_len; + len += wr_len; + buf = ((const char *)buf) + wr_len; + } + return len; + } + } + + return 0; +} + +static int kblockEeprom_dummy(UNUSED_ARG(struct KBlock *,b)) +{ + return 0; +} + + +static const KBlockVTable eeprom_unbuffered_vt = +{ + .readDirect = eeprom_readDirect, + .writeDirect = eeprom_writeDirect, + + .error = kblockEeprom_dummy, + .clearerr = (kblock_clearerr_t)kblockEeprom_dummy, +}; + +/** + * Initialize EEPROM module. + * \param eep is the Kblock context. + * \param type is the eeprom device we want to initialize (\see EepromType) + * \param i2c context for i2c channel + * \param addr is the i2c devide address (usually pins A0, A1, A2). + * \param verify enable the write check. + */ +void eeprom_init_5(Eeprom *eep, I2c *i2c, EepromType type, e2dev_addr_t addr, bool verify) +{ + ASSERT(type < EEPROM_CNT); + + memset(eep, 0, sizeof(*eep)); + DB(eep->blk.priv.type = KBT_EEPROM); + + eep->type = type; + eep->addr = addr; + eep->i2c = i2c; + eep->verify = verify; + + eep->blk.blk_size = mem_info[type].blk_size; + eep->blk.blk_cnt = mem_info[type].e2_size / mem_info[type].blk_size; + eep->blk.priv.flags |= KB_PARTIAL_WRITE; + eep->blk.priv.vt = &eeprom_unbuffered_vt; +} + + diff --git a/bertos/drv/eeprom.h b/bertos/drv/eeprom.h new file mode 100644 index 0000000..d53c797 --- /dev/null +++ b/bertos/drv/eeprom.h @@ -0,0 +1,177 @@ +/** + * \file + * + * + * \brief Driver for the 24xx16 and 24xx256 I2C EEPROMS. + * + * \author Stefano Fedrigo + * \author Bernie Innocenti + * + * $WIZ$ module_name = "eeprom" + * $WIZ$ module_configuration = "bertos/cfg/cfg_eeprom.h" + * $WIZ$ module_depends = "kfile", "kfile_block", "kblock", "i2c" + */ + +#ifndef DRV_EEPROM_H +#define DRV_EEPROM_H + +#include "cfg/cfg_eeprom.h" + +#include +#include + +#include + +#include +#include +#include + +#include + +#if COMPILER_C99 + #define eeprom_init(...) PP_CAT(eeprom_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) + #define eeprom_verify(...) PP_CAT(eeprom_verify ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) +#else + #define eeprom_init(args...) PP_CAT(eeprom_init ## _, COUNT_PARMS(args)) (args) + #define eeprom_verify(args...) PP_CAT(eeprom_verify ## _, COUNT_PARMS(args)) (args) +#endif + + +/** + * Values for Eeprom types. + */ +typedef enum EepromType +{ + EEPROM_24XX08, + EEPROM_24XX16, + EEPROM_24XX256, + EEPROM_24XX512, + EEPROM_24XX1024, + EEPROM_CNT, +} EepromType; + +/** + * On the same I2C bus can live more than one EEPROM + * device. Each device can be addressed by one or more + * pins. + */ +typedef uint8_t e2dev_addr_t; + +/** + * Describe an EEPROM context, used by the driver to + * access the single device. + */ +typedef struct Eeprom +{ + KBlock blk; + I2c *i2c; + EepromType type; ///< EEPROM type + e2dev_addr_t addr; ///< Device address. + bool verify; +#if !CONFIG_EEPROM_DISABLE_OLD_API + union { + KFile fd; + KFileBlock fdblk; + } DEPRECATED; +#endif /* !CONFIG_EEPROM_DISABLE_OLD_API */ +} Eeprom; + +#if !CONFIG_EEPROM_DISABLE_OLD_API + STATIC_ASSERT(offsetof(Eeprom, fd) == offsetof(Eeprom, fdblk.fd)); +#endif /* !CONFIG_EEPROM_DISABLE_OLD_API */ + +/** + * ID for eeproms. + */ +#define KBT_EEPROM MAKE_ID('E', 'E', 'P', 'R') + +/** + * Convert + ASSERT from generic KFile to Eeprom. + */ +INLINE Eeprom * EEPROM_CAST_KBLOCK(KBlock *blk) +{ + ASSERT(blk->priv.type == KBT_EEPROM); + return (Eeprom *)blk; +} + +/// Type for EEPROM addresses +typedef uint16_t e2addr_t; + +/** + * Macro for E2Layout offset calculation + * + * \note We can't just use offsetof() here because we could use + * non-constant expressions to access array elements. + * + * \note 'type' is the structure type holding eeprom layout + * and must be defined in user files. + */ +#define e2addr(type, field) ((e2addr_t)&(((type *)0)->field)) + +/** + * Type for EEPROM block size. + */ +typedef uint16_t e2blk_size_t; + +/** + * Type for accessing EEPROM whole size. + */ +typedef uint32_t e2_size_t; + +/** + * Descrive all EEPROM informations + * needed by the driver. + */ +typedef struct EepromInfo +{ + bool has_dev_addr; ///< true if memory is device addressable (its A0, A1, A2 pin are used by memory). + e2blk_size_t blk_size; ///< block size + e2_size_t e2_size; ///< eeprom size +} EepromInfo; + +bool eeprom_erase(Eeprom *eep, e2addr_t addr, e2_size_t count); +bool eeprom_verify_4(Eeprom *eep, e2addr_t addr, const void *buf, size_t count); +void eeprom_init_5(Eeprom *eep, I2c *i2c, EepromType type, e2dev_addr_t addr, bool verify); + +#if !CONFIG_EEPROM_DISABLE_OLD_API + +DEPRECATED INLINE bool eeprom_verify_3(Eeprom *eep, const void *buf, size_t count) +{ + return eeprom_verify_4(eep, (e2addr_t)eep->fdblk.fd.seek_pos, buf, count); +} +DEPRECATED INLINE void eeprom_init_4(Eeprom *eep, EepromType type, e2dev_addr_t addr, bool verify) +{ + eeprom_init_5(eep, &local_i2c_old_api, type, addr, verify); + kfileblock_init(&eep->fdblk, &eep->blk); +} +#endif /* !CONFIG_EEPROM_DISABLE_OLD_API */ + +#endif /* DRV_EEPROM_H */ diff --git a/bertos/drv/eth.h b/bertos/drv/eth.h new file mode 100644 index 0000000..786e797 --- /dev/null +++ b/bertos/drv/eth.h @@ -0,0 +1,135 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Ethernet standard descriptors + * + * $WIZ$ module_name = "eth" + * $WIZ$ module_configuration = "bertos/cfg/cfg_eth.h" + * $WIZ$ module_supports = "at91sam7x or sam3x" + * $WIZ$ module_hw = "bertos/hw/hw_eth.h", "bertos/hw/hw_eth.c" + */ + +#ifndef DRV_ETH_H +#define DRV_ETH_H + +#include "hw/hw_eth.h" +#include + +#define ETH_ADDR_LEN 6 +#define ETH_HEAD_LEN 14 +#define ETH_DATA_LEN 1500 +#define ETH_FRAME_LEN (ETH_HEAD_LEN + ETH_DATA_LEN) + +#define ETH_TYPE_IP 0x0800 + +typedef union Ethernet +{ + struct + { + uint8_t dst[ETH_ADDR_LEN]; + uint8_t src[ETH_ADDR_LEN]; + uint16_t type; + uint8_t data[0]; + }; + uint8_t raw[ETH_FRAME_LEN]; +} PACKED Ethernet; + +/** + * Determine if ethernet address \a addr is a all zero. + */ +INLINE int eth_addrIsZero(const uint8_t *addr) +{ + return !(addr[0] | addr[1] | addr[2] | + addr[3] | addr[4] | addr[5]); +} + +/** + * Determine if ethernet address \a addr is a multicast address. + */ +INLINE int eth_addrIsMcast(const uint8_t *addr) +{ + return (0x01 & addr[0]); +} + +/** + * Determine if ethernet address \a addr is locally-assigned (IEEE 802). + */ +INLINE int eth_addrIsLocal(const uint8_t *addr) +{ + return (0x02 & addr[0]); +} + +/** + * Determine if ethernet address \a addr is broadcast. + */ +INLINE bool eth_addrIsBcast(const uint8_t *addr) +{ + return (addr[0] & addr[1] & addr[2] & + addr[3] & addr[4] & addr[5]) == 0xff; +} + +/** + * Check if the ethernet address \a addr is not all zero, is not a multicast + * address, and is not broadcast. + */ +INLINE bool eth_addrIsValid(const uint8_t *addr) +{ + return !eth_addrIsMcast(addr) && !eth_addrIsZero(addr); +} + +/** + * Compare two ethernet addresses: \a addr1 and \a addr2, returns 0 if equal. + */ +INLINE bool eth_addrCmp(const uint8_t *addr1, const uint8_t *addr2) +{ + return !!((addr1[0] ^ addr2[0]) | + (addr1[1] ^ addr2[1]) | + (addr1[2] ^ addr2[2]) | + (addr1[3] ^ addr2[3]) | + (addr1[4] ^ addr2[4]) | + (addr1[5] ^ addr2[5])); +} + +ssize_t eth_putFrame(const uint8_t *buf, size_t len); +void eth_sendFrame(void); + +size_t eth_getFrameLen(void); +ssize_t eth_getFrame(uint8_t *buf, size_t len); + +ssize_t eth_send(const uint8_t *buf, size_t len); +ssize_t eth_recv(uint8_t *buf, size_t len); + +int eth_init(void); + +#endif /* DRV_ETH_H */ diff --git a/bertos/drv/flash.h b/bertos/drv/flash.h new file mode 100644 index 0000000..d9cf807 --- /dev/null +++ b/bertos/drv/flash.h @@ -0,0 +1,171 @@ +/** +* \file +* +* +* \defgroup drv_emb_flash Embedded flash driver +* \ingroup drivers +* \{ +* +* \brief Embedded flash for cpu. +* +* This module allows to access in reading and writing to the internal +* flash memory of the micro. It is a block device, so it must be +* accessed using the KBlock interface functions (see kblock.h). +* +* Once you have opened the flash for writing, you may want to use +* kblock_trim() to avoid overwriting data on other flash banks. +* +* Example usage: +* \code +* Flash fls; +* flash_init(&fls, 0); +* // enable access only on desired blocks +* // start block = 50, num blocks = 20 +* kblock_trim(&fls.blk, 50, 20); +* // ... +* // now write to the flash +* // block number is automatically converted +* kblock_write(&fls.blk, 0, buf, 0, 128); +* \endcode +* +* \author Francesco Sacchi +* \author Daniele Basile +* +* $WIZ$ module_name = "flash" +* $WIZ$ module_depends = "kfile", "kfile_block", "kblock" +* $WIZ$ module_configuration = "bertos/cfg/cfg_emb_flash.h" +*/ + +#ifndef DRV_FLASH_H +#define DRV_FLASH_H + +#include "cfg/cfg_emb_flash.h" + +#include +#include + +#include +#include +#include + +#include + +#if COMPILER_C99 + #define flash_init(...) PP_CAT(flash_init_, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) +#else + /** + * Init function for flash driver. + * + * This macro cannot fail, so no error conditions are reported. + * + * This macro expands to + * - flash_init_2(Flash *fls, flags), the new KBlock API + * - flash_init_1(Flash *fls), old API, provided for compatibility + * + * Do NOT use the above functions directly, use flash_init() instead. + * Disable old API if you are not upgrading an existing project. + */ + #define flash_init(args...) PP_CAT(flash_init_, COUNT_PARMS(args)) (args) +#endif + +/** + * \name Embedded flash error values + * \{ + */ +#define FLASH_WR_OK 0 ///< Write ok. +#define FLASH_NOT_ERASED BV(1) ///< Flash memory was not erased before to write it. +#define FLASH_WR_PROTECT BV(2) ///< Write not allowed the flash memory was protected. +#define FLASH_WR_TIMEOUT BV(3) ///< Timeout while writing +#define FLASH_WR_ERR BV(4) ///< Invalid command and/or a bad keywords +/** \} */ + +struct FlashHardware; + +/** + * EmbFlash KBlock context structure. + */ +typedef struct Flash +{ + KBlock blk; ///< KBlock context + struct FlashHardware *hw; + #if !CONFIG_FLASH_DISABLE_OLD_API + union { + KFile fd; + KFileBlock fdblk; + } DEPRECATED; + #endif /* !CONFIG_FLASH_DISABLE_OLD_API */ +} Flash; + +/* + * ID for FLASH + */ +#define KBT_FLASH MAKE_ID('F', 'L', 'A', 'S') + +/** +* Convert + ASSERT from generic KBlock to Flash. +*/ +INLINE Flash *FLASH_CAST(KBlock *fls) +{ + ASSERT(fls->priv.type == KBT_FLASH); + return (Flash *)fls; +} + +void flash_hw_init(Flash *fls, int flags); +void flash_hw_initUnbuffered(Flash *fls, int flags); + +#include CPU_HEADER(flash) + +/** + * \name Flash init flags + * \{ + */ +#define FLASH_WRITE_ONCE BV(0) ///< Allow only one write per block. +#define FLASH_UNBUFFERED BV(1) ///< Open flash memory disabling page caching, no modification and partial write are allowed. +/** \} */ + +/** + * Initialize \a fls Flash context structure. + * \param fls Flash context structure + * \param flags A combination of flash init flags + */ +#define flash_init_2(fls, flags) (flags & FLASH_UNBUFFERED) ? \ + flash_hw_initUnbuffered(fls, flags) : flash_hw_init(fls, flags) + +#if !CONFIG_FLASH_DISABLE_OLD_API +INLINE DEPRECATED void flash_init_1(Flash *fls) +{ + flash_hw_init(fls, 0); + kfileblock_init(&fls->fdblk, &fls->blk); +} +#endif /* !CONFIG_FLASH_DISABLE_OLD_API */ + +/** \} */ + +#endif /* DRV_FLASH_H */ diff --git a/bertos/drv/flash25.c b/bertos/drv/flash25.c new file mode 100644 index 0000000..f12e41e --- /dev/null +++ b/bertos/drv/flash25.c @@ -0,0 +1,396 @@ +/** + * \file + * + * + * \brief Function library for serial Flash memory. + * + * Module provide a kfile interface, that ensure an abstraction + * from comunication channel and give a standard interface. + * Typicaly this kind of memory use an SPI bus, but you should + * use another comunication channel you have defined. + * + * \author Daniele Basile + */ + +/* + * We use a spi bus, thus include hardware specific definition. + * If you use another channel you must redefine this macros. + */ +#include "hw/hw_spi.h" + +#include +#include + +#include +#include + +#include + +#include /* cpu_relax() */ + +#warning FIXME:This file was changed, but is untested! + +/** + * Wait until flash memory is ready. + */ +static void flash25_waitReady(Flash25 *fd) +{ + uint8_t stat; + + while (1) + { + CS_ENABLE(); + + kfile_putc(FLASH25_RDSR, fd->channel); + stat = kfile_getc(fd->channel); + + CS_DISABLE(); + + if (!(stat & RDY_BIT)) + break; + + cpu_relax(); + } +} + +/** + * Send a single command to serial flash memory. + */ +static void flash25_sendCmd(Flash25 *fd, Flash25Opcode cmd) +{ + CS_ENABLE(); + + kfile_putc(cmd, fd->channel); + + CS_DISABLE(); +} + +/** + * flash25 init function. + * This function init a comunication channel and + * try to read manufacturer id of serial memory, + * then check if is equal to selected type. + */ +static bool flash25_pin_init(Flash25 *fd) +{ + uint8_t device_id; + uint8_t manufacturer; + + SPI_HW_INIT(); + + CS_ENABLE(); + /* + * Send read id productor opcode on + * comunication channel + * TODO:controllare se ha senso + */ + kfile_putc(FLASH25_RDID, fd->channel); + + manufacturer = kfile_getc(fd->channel); + device_id = kfile_getc(fd->channel); + + CS_DISABLE(); + + if((FLASH25_MANUFACTURER_ID == manufacturer) && + (FLASH25_DEVICE_ID == device_id)) + return true; + else + return false; +} + +/** + * Reopen a serial memory interface. + * + * For serial memory this function reinit only + * the size and seek_pos in kfile stucture. + * Return a kfile pointer, after assert check. + */ +static KFile * flash25_reopen(struct KFile *_fd) +{ + Flash25 *fd = FLASH25_CAST(_fd); + + fd->fd.seek_pos = 0; + fd->fd.size = FLASH25_MEM_SIZE; + + kprintf("flash25 file opened\n"); + return &fd->fd; +} + +/** + * Close a serial memory interface. + * + * For serial memory this funtion do nothing, + * and return always 0. + */ +static int flash25_close(UNUSED_ARG(struct KFile *,fd)) +{ + kprintf("flash25 file closed\n"); + return 0; +} + +/** + * Read \a _buf lenght \a size byte from serial flash memmory. + * + * For read in serial flash memory we + * enble cs pin and send one byte of read opcode, + * and then 3 byte of address of memory cell we + * want to read. After the last byte of address we + * can read data from so pin. + * + * \return the number of bytes read. + */ +static size_t flash25_read(struct KFile *_fd, void *buf, size_t size) +{ + uint8_t *data = (uint8_t *)buf; + + Flash25 *fd = FLASH25_CAST(_fd); + + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size); + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + //kprintf("Reading at addr[%lu], size[%d]\n", fd->seek_pos, size); + CS_ENABLE(); + + kfile_putc(FLASH25_READ, fd->channel); + + + /* + * Address that we want to read. + */ + kfile_putc((fd->fd.seek_pos >> 16) & 0xFF, fd->channel); + kfile_putc((fd->fd.seek_pos >> 8) & 0xFF, fd->channel); + kfile_putc(fd->fd.seek_pos & 0xFF, fd->channel); + + kfile_read(fd->channel, data, size); + + CS_DISABLE(); + + fd->fd.seek_pos += size; + + return size; +} + +/** + * Write \a _buf in serial flash memory + * + * Before to write data into flash we must enable + * memory writing. To do this we send a WRE command opcode. + * After this command the flash is ready to be write, and so + * we send a PROGRAM opcode followed to 3 byte of + * address memory, at the end of last address byte + * we can send the data. + * When we finish to send all data, we disable cs + * and flash write received data bytes on its memory. + * + * \note: WARNING: you could write only on erased memory section! + * Each write time you could write max a memory page size, + * because if you write more than memory page size the + * address roll over to first byte of page. + * + * \return the number of bytes write. + */ +static size_t flash25_write(struct KFile *_fd, const void *_buf, size_t size) +{ + flash25Offset_t offset; + flash25Size_t total_write = 0; + flash25Size_t wr_len; + const uint8_t *data = (const uint8_t *) _buf; + + Flash25 *fd = FLASH25_CAST(_fd); + + ASSERT(fd->fd.seek_pos + (kfile_off_t)size <= fd->fd.size); + + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + + while (size) + { + offset = fd->fd.seek_pos % (flash25Size_t)FLASH25_PAGE_SIZE; + wr_len = MIN((flash25Size_t)size, FLASH25_PAGE_SIZE - (flash25Size_t)offset); + + kprintf("[seek_pos-<%lu>, offset-<%d>]\n", fd->fd.seek_pos, offset); + + /* + * We check serial flash memory state, and wait until ready-flag + * is high. + */ + flash25_waitReady(fd); + + /* + * Start write cycle. + * We could write only data not more long than one + * page size. + * + * To write on serial flash memory we must first + * enable write with a WREN opcode command, before + * the PROGRAM opcode. + * + * \note: the same byte cannot be reprogrammed without + * erasing the whole sector first. + */ + flash25_sendCmd(fd, FLASH25_WREN); + + CS_ENABLE(); + kfile_putc(FLASH25_PROGRAM, fd->channel); + + /* + * Address that we want to write. + */ + kfile_putc((fd->fd.seek_pos >> 16) & 0xFF, fd->channel); + kfile_putc((fd->fd.seek_pos >> 8) & 0xFF, fd->channel); + kfile_putc(fd->fd.seek_pos & 0xFF, fd->channel); + + kfile_write(fd->channel, data, wr_len); + + CS_DISABLE(); + + data += wr_len; + fd->fd.seek_pos += wr_len; + size -= wr_len; + total_write += wr_len; + } + + kprintf("written %lu bytes\n", total_write); + return total_write; +} + +/** + * Sector erase function. + * + * Erase a select \p sector of serial flash memory. + * + * \note A sector size is FLASH25_SECTOR_SIZE. + * This operation could take a while. + */ +void flash25_sectorErase(Flash25 *fd, Flash25Sector sector) +{ + + /* + * Erase a sector could take a while, + * for debug we measure that time + * see datasheet to compare this time. + */ + DB(ticks_t start_time = timer_clock()); + + CS_ENABLE(); + + /* + * To erase a sector of serial flash memory we must first + * enable write with a WREN opcode command, before + * the SECTOR_ERASE opcode. Sector is automatically + * determinate if any address within the sector + * is selected. + */ + kfile_putc(FLASH25_WREN, fd->channel); + kfile_putc(FLASH25_SECTORE_ERASE,fd-> channel); + + /* + * Address inside the sector that we want to + * erase. + */ + kfile_putc(sector, fd->channel); + + CS_DISABLE(); + + /* + * We check serial flash memory state, and wait until ready-flag + * is hight. + */ + flash25_waitReady(fd); + + DB(kprintf("Erased sector [%ld] in %ld ms\n", (unsigned long)sector, (unsigned long)ticks_to_ms(timer_clock() - start_time))); +} + +/** + * Chip erase function. + * + * Erase all sector of serial flash memory. + * + * \note This operation could take a while. + */ +void flash25_chipErase(Flash25 *fd) +{ + /* + * Erase all chip could take a while, + * for debug we measure that time + * see datasheet to compare this time. + */ + DB(ticks_t start_time = timer_clock()); + + /* + * To erase serial flash memory we must first + * enable write with a WREN opcode command, before + * the CHIP_ERASE opcode. + */ + flash25_sendCmd(fd, FLASH25_WREN); + flash25_sendCmd(fd, FLASH25_CHIP_ERASE); + + /* + * We check serial flash memory state, and wait until ready-flag + * is high. + */ + flash25_waitReady(fd); + + DB(kprintf("Erased all memory in %ld ms\n", ticks_to_ms(timer_clock() - start_time))); + +} + +/** + * Init data flash memory interface. + */ +void flash25_init(Flash25 *fd, KFile *ch) +{ + + ASSERT(fd); + ASSERT(ch); + + //Set kfile struct type as a generic kfile structure. + DB(fd->fd._type = KFT_FLASH25); + + // Set up data flash programming functions. + fd->fd.reopen = flash25_reopen; + fd->fd.close = flash25_close; + fd->fd.read = flash25_read; + fd->fd.write = flash25_write; + fd->fd.seek = kfile_genericSeek; + + /* + * Init a local channel structure and flash kfile interface. + */ + fd->channel = ch; + flash25_reopen(&fd->fd); + + /* + * Init data flash memory and micro pin. + */ + if (!flash25_pin_init(fd)) + ASSERT(0); +} + + diff --git a/bertos/drv/flash25.h b/bertos/drv/flash25.h new file mode 100644 index 0000000..921e1b5 --- /dev/null +++ b/bertos/drv/flash25.h @@ -0,0 +1,143 @@ +/** + * \file + * + * + * \brief Function library for serial Flash memory. + * + * + * \author Daniele Basile + * + * $WIZ$ module_name = "flash25" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_flash25.h" + */ + + +#ifndef DRV_FLASH25_H +#define DRV_FLASH25_H + +#include "cfg/cfg_flash25.h" +#include + +#include + +/** + * Type definition for serial flash memory. + */ +typedef uint32_t flash25Addr_t; +typedef uint32_t flash25Size_t; +typedef uint8_t flash25Offset_t; + +/** + * Flash25 KFile context structure. + */ +typedef struct Flash25 +{ + KFile fd; ///< File descriptor. + KFile *channel; ///< Dataflash comm channel (usually SPI). +} Flash25; + +/** + * ID for dataflash. + */ +#define KFT_FLASH25 MAKE_ID('F', 'L', '2', '5') + + +/** + * Convert + ASSERT from generic KFile to Flash25. + */ +INLINE Flash25 * FLASH25_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_FLASH25); + return (Flash25 *)fd; +} + +/** + * Memory definition. + * + * \note Below are defined valid serial flash memory support to + * this drive. Every time we call flash25_init() function we check + * if memory defined are right (see flash25.c form more detail). + * + * $WIZ$ flash25_list = "FLASH25_AT25F2048" + */ +#define FLASH25_AT25F2048 1 + +#if CONFIG_FLASH25 == FLASH25_AT25F2048 + #define FLASH25_MANUFACTURER_ID 0x1F // ATMEL + #define FLASH25_DEVICE_ID 0x63 // Device ID + #define FLASH25_PAGE_SIZE 256 // Page size in byte + #define FLASH25_NUM_SECTOR 4 // Number of section in serial memory + #define FLASH25_SECTOR_SIZE 65536UL // Section size in byte + #define FLASH25_MEM_SIZE FLASH25_NUM_SECTOR * FLASH25_SECTOR_SIZE + #define FLASH25_NUM_PAGE FLASH25_MEM_SIZE / FLASH25_PAGE_SIZE +#else + #error Nothing memory defined in CONFIG_FLASH25 are support. +#endif + +#define RDY_BIT 0x1 // Statuts of write cycle + +/** + * Serial flash opcode commands. + */ +typedef enum { + FLASH25_WREN = 0x6, ///< Set write enable latch + FLASH25_WRDI = 0x4, ///< Reset enable write latch + FLASH25_RDSR = 0x5, ///< Read status register + FLASH25_WRSR = 0x1, ///< Write status register + FLASH25_READ = 0x3, ///< Read data from memory array + FLASH25_PROGRAM = 0x2, ///< Program data into memory array + FLASH25_SECTORE_ERASE = 0x52, ///< Erase one sector in memory array + FLASH25_CHIP_ERASE = 0x62, ///< Erase all sector in memory array + FLASH25_RDID = 0x15 ///< Read Manufacturer and product ID +} Flash25Opcode; + +/** + * Serial flash sector memory address. + */ +#if CONFIG_FLASH25 != FLASH25_AT25F2048 + #error Nothing memory defined in CONFIG_FLASH25 are support. +#endif + +typedef enum { + FLASH25_SECT1 = 0x0, ///< Sector 1 (0x0 -0xFFFF) + FLASH25_SECT2 = 0x10000, ///< Sector 2 (0x10000 -0x1FFFF) + FLASH25_SECT3 = 0x20000, ///< Sector 3 (0x20000 -0x2FFFF) + FLASH25_SECT4 = 0x30000, ///< Sector 4 (0x30000 -0x3FFFF) +} Flash25Sector; + +void flash25_init(Flash25 *fd, KFile *ch); +void flash25_chipErase(Flash25 *fd); +void flash25_sectorErase(Flash25 *fd, Flash25Sector sector); +bool flash25_test(KFile *channel); + +#endif /* DRV_FLASH25_H */ + diff --git a/bertos/drv/flash25_hwtest.c b/bertos/drv/flash25_hwtest.c new file mode 100644 index 0000000..79a5c20 --- /dev/null +++ b/bertos/drv/flash25_hwtest.c @@ -0,0 +1,83 @@ +/** + * \file + * + * + * \brief Test function for serial Flash memory. + * + * \author Daniele Basile + */ + +/** + * Test function for flash25. + * + * \note: This implentation use a SPI channel. + */ + + +#include + +#include + +#include + +#warning FIXME:Review and refactor this test.. + +bool flash25_test(KFile *channel) +{ + Flash25 fd; + uint8_t test_buf[256]; + + /* + * Init a spi kfile interface and + * flash driver. + */ + flash25_init(&fd, channel); + + kprintf("Init serial flash\n"); + + flash25_chipErase(&fd); + + flash25_sectorErase(&fd, FLASH25_SECT1); + flash25_sectorErase(&fd, FLASH25_SECT2); + flash25_sectorErase(&fd, FLASH25_SECT3); + flash25_sectorErase(&fd, FLASH25_SECT4); + + /* + * Launche a kfile test interface. + */ + kprintf("Kfile test start..\n"); + if (!kfile_testRunGeneric(&fd.fd, test_buf, NULL, sizeof(test_buf))) + return false; + + return true; +} + + diff --git a/bertos/drv/ft245rl.c b/bertos/drv/ft245rl.c new file mode 100644 index 0000000..6ca435a --- /dev/null +++ b/bertos/drv/ft245rl.c @@ -0,0 +1,119 @@ +/** + * \file + * + * + * \brief Function library for Accessing FT245RL USB interface. + * + * This module handles USB communication with FT245RL chip. + * This chip is a parallel USB interface with data flow control. + * A kfile-like interface is supplied. + * + * \author Francesco Sacchi + */ + +#include "hw/hw_ft245rl.h" +#include "ft245rl.h" + +#include +#include +#include + +#include + +#include + +#include + + +MOD_DEFINE(ft245rl); + +/** + * Read \a size bytes in buffer \a buf, from fid \a _fd. + */ +static size_t ft245rl_read(struct KFile *_fd, void *_buf, size_t size) +{ + Ft245rl *fd = FT245RL_CAST(_fd); + (void)fd; //unused + uint8_t *buf = (uint8_t *)_buf; + size_t total_read = 0; + + while (size--) + { + while(!FT245RL_DATA_RDY()) + /* busy waiy */; + + *buf++ = FT245RL_GETDATA(); + total_read++; + } + + return total_read; +} + +/** + * Write \a size bytes from buffer \a buf, of fid \a _fd. + */ +static size_t ft245rl_write(struct KFile *_fd, const void *_buf, size_t size) +{ + Ft245rl *fd = FT245RL_CAST(_fd); + (void)fd; //unused + const uint8_t *buf = (const uint8_t *)_buf; + size_t total_write = 0; + + while (size--) + { + while(!FT245RL_TX_ALLOWED()) + /* busy waiy */; + + FT245RL_SETDATA(*buf++); + total_write++; + } + + return total_write; +} + +/** + * Ft245rl init function. + */ +void ft245rl_init(Ft245rl *fd) +{ + memset(fd, 0, sizeof(*fd)); + DB(fd->fd._type = KFT_FT245RL); + + // Setup data ft245rl communication functions. + fd->fd.read = ft245rl_read; + fd->fd.write = ft245rl_write; + + FT245RL_INIT(); + while (FT245RL_DATA_RDY()) + FT245RL_GETDATA(); + + MOD_INIT(ft245rl); +} diff --git a/bertos/drv/ft245rl.h b/bertos/drv/ft245rl.h new file mode 100644 index 0000000..0fee0f3 --- /dev/null +++ b/bertos/drv/ft245rl.h @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief Function library for Accessing FT245RL USB interface. + * + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "ft245rl" + * $WIZ$ module_depends = "kfile", "timer" + * $WIZ$ module_hw = "bertos/hw/hw_ft245rl.h" + */ + + +#ifndef DRV_FT245RL_H +#define DRV_FT245RL_H + +#include +#include + +/** + * ID for FT245RL KFiles. + */ +#define KFT_FT245RL MAKE_ID('F', '2', '4', '5') + +/** + * Ft245rl KFile context structure. + */ +typedef struct Ft245rl +{ + KFile fd; ///< File descriptor. +} Ft245rl; + + +/** + * Convert + ASSERT from generic KFile to KFileFt245rl. + */ +INLINE Ft245rl * FT245RL_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_FT245RL); + return (Ft245rl *)fd; +} + +void ft245rl_init(Ft245rl *fd); + +#endif /* DRV_FT245RL_H */ diff --git a/bertos/drv/i2c.c b/bertos/drv/i2c.c new file mode 100644 index 0000000..ae42370 --- /dev/null +++ b/bertos/drv/i2c.c @@ -0,0 +1,113 @@ +/** + * \file + * + * + * \brief I2C generic driver functions (implementation). + * + * \author Francesco Sacchi + */ + +#include "i2c.h" + +#include "cfg/cfg_i2c.h" + +#if !CONFIG_I2C_DISABLE_OLD_API + +I2c local_i2c_old_api; + +/** + * Send a sequence of bytes in master transmitter mode + * to the selected slave device through the I2C bus. + * + * \return true on success, false on error. + */ +bool i2c_send(const void *_buf, size_t count) +{ + const uint8_t *buf = (const uint8_t *)_buf; + + while (count--) + { + if (!i2c_put(*buf++)) + return false; + } + return true; +} + +/** + * Receive a sequence of one or more bytes from the + * selected slave device in master receive mode through + * the I2C bus. + * + * Received data is placed in \c buf. + * + * \note a NACK is automatically given on the last received + * byte. + * + * \return true on success, false on error + */ +bool i2c_recv(void *_buf, size_t count) +{ + uint8_t *buf = (uint8_t *)_buf; + + while (count--) + { + /* + * The last byte read does not has an ACK + * to stop communication. + */ + int c = i2c_get(count); + + if (c == EOF) + return false; + else + *buf++ = c; + } + + return true; +} +#endif /* !CONFIG_I2C_DISABLE_OLD_API */ + +void i2c_genericWrite(struct I2c *i2c, const void *_buf, size_t count) +{ + const uint8_t *buf = (const uint8_t *)_buf; + + while (count--) + i2c_putc(i2c, *buf++); +} + +void i2c_genericRead(struct I2c *i2c, void *_buf, size_t count) +{ + uint8_t *buf = (uint8_t *)_buf; + + while (count--) + *buf++ = i2c_getc(i2c); +} + diff --git a/bertos/drv/i2c.h b/bertos/drv/i2c.h new file mode 100644 index 0000000..2c40efd --- /dev/null +++ b/bertos/drv/i2c.h @@ -0,0 +1,544 @@ +/** + * \file + * + * + * \defgroup i2c_driver I2C driver + * \ingroup drivers + * \{ + * \brief I2C generic driver functions. + * + * Some hardware requires you to declare the number of transferred + * bytes and the communication direction before actually reading or writing + * to the bus. + * Furthermore, sometimes you need to specify the first transferred byte + * before any data is sent over the bus. + * + * The usage pattern for writing is the following: + * \code + * i2c_init(args...); + * ... + * i2c_start_w(args...); + * i2c_write(i2c, buf, len); + * \endcode + * The flags in i2c_start_w determine if the stop command is sent after + * the data. Notice that you don't need to explicitly call a stop function + * after the write. + * + * Reading is a bit more complicated and it largely depends on the specific + * slave hardware. + * In general, the hardware may require you to first write something, then + * read the data without closing the communication. For example, EPROMs + * require first to write the reading address and then to read the actual + * data. + * Here is an example of how you can deal with such hardware: + * + * \code + * // init a session without closing it + * i2c_start_w(i2c, dev, bytes, I2C_NOSTOP); + * // write the address to read from + * i2c_write(i2c, addr, bytes); + * if (i2c_error(i2c)) + * // check for errors during setup + * //... + * // now start the real data transfer + * i2c_start_r(i2c, dev, bytes, I2C_STOP); + * i2c_read(i2c, buf, bytes); + * // check for errors + * if (i2c_error(i2c)) + * //... + * \endcode + * + * It's not guaranteed that after a single call to i2c_putc, i2c_getc etc. + * data will pass on the bus (this is hardware dependent). + * However, it IS guaranteed after you have sent all the data. + * + * You can check error conditions by calling the function i2c_error after + * each function call. (This is similar to libc errno handling). + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "i2c" + * $WIZ$ module_configuration = "bertos/cfg/cfg_i2c.h" + * $WIZ$ module_hw = "bertos/hw/hw_i2c_bitbang.h" + * $WIZ$ module_depends = "i2c_bitbang" + * $WIZ$ module_supports = "not atmega103 and not atmega168 and not at91" + */ + +#ifndef DRV_I2C_H +#define DRV_I2C_H + +#include "cfg/cfg_i2c.h" + +#include +#include +#include + +#include + +#define I2C_READBIT BV(0) + + +/* + * The following macros are needed to maintain compatibility with older i2c API. + * They can be safely removed once the old API is removed. + */ + + /** + * \addtogroup i2c_api + * \{ + */ +#if COMPILER_C99 + #define i2c_init(...) PP_CAT(i2c_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) + #define i2c_start_w(...) PP_CAT(i2c_start_w ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) + #define i2c_start_r(...) PP_CAT(i2c_start_r ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) +#else + /** + * Initialize I2C module. + * + * To initialize the module you can write this code: + * \code + * I2c ctx; + * i2c_init(&ctx, 0, CONFIG_I2C_FREQ); + * \endcode + * This macro expands in two versions, depending on the number of + * parameters, to maintain compatibility with old API: + * \li i2c_init_3(I2c *i2c, int dev, uint32_t clock) + * \li i2c_init_0(void) + * + * Do NOT use the above functions directly, use i2c_init(). + * \note Use the version with 3 parameters, the other one is only for + * legacy code. + */ + #define i2c_init(args...) PP_CAT(i2c_init ## _, COUNT_PARMS(args)) (args) + + /** + * Start a write session. + * + * To start a write session, use the following code: + * \code + * i2c_start_w(i2c, dev, bytes, I2C_STOP); + * \endcode + * + * This macro expands in two versions, depending on the number of parameters: + * \li i2c_start_w_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags) + * \li i2c_builtin_start_w(uint8_t id): Deprecated API, don't use in new projects + * \li i2c_bitbang_start_w(uint8_t id): Deprecated API, don't use in new projects + * + * Do NOT use the above functions directly, use i2c_start_w(). + * \note Use the version with 4 parameters, the others are only for legacy code + */ + #define i2c_start_w(args...) PP_CAT(i2c_start_w ## _, COUNT_PARMS(args)) (args) + + /** + * Start a read session. + * + * To start a read session, use the following code: + * \code + * i2c_start_r(i2c, dev, bytes, I2C_STOP); + * \endcode + * + * This macro expands in two versions, depending on the number of parameters: + * \li i2c_start_r_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags) + * \li i2c_builtin_start_r(uint8_t id): Deprecated API, don't use in new projects + * \li i2c_bitbang_start_r(uint8_t id): Deprecated API, don't use in new projects + * + * Do NOT use the above functions directly, use i2c_start_r(). + * \note Use the version with 4 parameters, the others are only for legacy code + */ + #define i2c_start_r(args...) PP_CAT(i2c_start_r ## _, COUNT_PARMS(args)) (args) +#endif +/**\}*/ + + +/** + * \name I2C bitbang devices enum + */ +enum +{ + I2C_BITBANG_OLD = -1, + I2C_BITBANG0 = 1000, ///< Use bitbang on port 0 + I2C_BITBANG1, ///< Use bitbang on port 1 + I2C_BITBANG2, + I2C_BITBANG3, + I2C_BITBANG4, + I2C_BITBANG5, + I2C_BITBANG6, + I2C_BITBANG7, + I2C_BITBANG8, + I2C_BITBANG9, + + I2C_BITBANG_CNT /**< Number of i2c ports */ +}; + +/** \defgroup i2c_api I2C driver API + * \ingroup i2c_driver + * \{ + */ + +/** + * \name I2C error flags + * \ingroup i2c_api + * @{ + */ +#define I2C_OK 0 ///< I2C no errors flag +#define I2C_DATA_NACK BV(4) ///< I2C generic error +#define I2C_ERR BV(3) ///< I2C generic error +#define I2C_ARB_LOST BV(2) ///< I2C arbitration lost error +#define I2C_START_TIMEOUT BV(0) ///< I2C timeout error on start +#define I2C_NO_ACK BV(1) ///< I2C no ack for sla start +/**@}*/ + +/** + * \name I2C command flags + * \ingroup i2c_api + * @{ + */ +#define I2C_NOSTOP 0 ///< Do not program the stop for current transition +#define I2C_STOP BV(0) ///< Program the stop for current transition +/** @} */ +#define I2C_START_R BV(1) // Start read command +#define I2C_START_W 0 // Start write command + + +#define I2C_TEST_START(flag) ((flag) & I2C_START_R) +#define I2C_TEST_STOP(flag) ((flag) & I2C_STOP) + +struct I2cHardware; +struct I2c; + +typedef void (*i2c_start_t)(struct I2c *i2c, uint16_t slave_addr); +typedef uint8_t (*i2c_getc_t)(struct I2c *i2c); +typedef void (*i2c_putc_t)(struct I2c *i2c, uint8_t data); +typedef void (*i2c_write_t)(struct I2c *i2c, const void *_buf, size_t count); +typedef void (*i2c_read_t)(struct I2c *i2c, void *_buf, size_t count); + +typedef struct I2cVT +{ + i2c_start_t start; + i2c_getc_t getc; + i2c_putc_t putc; + i2c_write_t write; + i2c_read_t read; +} I2cVT; + +typedef struct I2c +{ + int errors; + int flags; + size_t xfer_size; + struct I2cHardware* hw; + const struct I2cVT *vt; +} I2c; + + +#include CPU_HEADER(i2c) + +/* + * Low level i2c init implementation prototype. + */ +void i2c_hw_init(I2c *i2c, int dev, uint32_t clock); +void i2c_hw_bitbangInit(I2c *i2c, int dev); + +void i2c_genericWrite(I2c *i2c, const void *_buf, size_t count); +void i2c_genericRead(I2c *i2c, void *_buf, size_t count); + +/* + * Start a i2c transfer. + * + * \param i2c Context structure. + * \param slave_addr Address of slave device + * \param size Size of the transfer + */ +INLINE void i2c_start(I2c *i2c, uint16_t slave_addr, size_t size) +{ + ASSERT(i2c->vt); + ASSERT(i2c->vt->start); + + if (!i2c->errors) + ASSERT(i2c->xfer_size == 0); + + i2c->errors = 0; + i2c->xfer_size = size; + + i2c->vt->start(i2c, slave_addr); +} + +/** + * \name I2C interface functions + * \ingroup i2c_api + * @{ + */ + +/** + * Start a read session. + * \param i2c I2C context + * \param slave_addr Address of the slave device + * \param size Number of bytes to be read from device + * \param flags Session flags (I2C command flags) + */ +INLINE void i2c_start_r_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags) +{ + ASSERT(i2c); + i2c->flags = flags | I2C_START_R; + i2c_start(i2c, slave_addr, size); +} + +/** + * Start a write session. + * \param i2c I2C context + * \param slave_addr Address of the slave device + * \param size Size to be transferred + * \param flags Session flags + */ +INLINE void i2c_start_w_4(I2c *i2c, uint16_t slave_addr, size_t size, int flags) +{ + ASSERT(i2c); + i2c->flags = flags & ~I2C_START_R; + i2c_start(i2c, slave_addr, size); +} + +/** + * Read a byte from I2C bus. + * \param i2c I2C context + * \return Byte read + */ +INLINE uint8_t i2c_getc(I2c *i2c) +{ + ASSERT(i2c); + ASSERT(i2c->vt); + ASSERT(i2c->vt->getc); + + ASSERT(i2c->xfer_size); + + ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_R); + + if (!i2c->errors) + { + uint8_t data = i2c->vt->getc(i2c); + i2c->xfer_size--; + return data; + } + else + return 0xFF; +} + +/** + * Write the byte \a data into I2C port \a i2c. + * \param i2c I2C context + * \param data Byte to be written + */ +INLINE void i2c_putc(I2c *i2c, uint8_t data) +{ + ASSERT(i2c); + ASSERT(i2c->vt); + ASSERT(i2c->vt->putc); + + ASSERT(i2c->xfer_size); + + ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_W); + + if (!i2c->errors) + { + i2c->vt->putc(i2c, data); + i2c->xfer_size--; + } +} + +/** + * Write \a count bytes to port \a i2c, reading from \a _buf. + * \param i2c I2C context + * \param _buf User buffer to read from + * \param count Number of bytes to write + */ +INLINE void i2c_write(I2c *i2c, const void *_buf, size_t count) +{ + ASSERT(i2c); + ASSERT(i2c->vt); + ASSERT(i2c->vt->write); + + ASSERT(_buf); + ASSERT(count); + ASSERT(count <= i2c->xfer_size); + + ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_W); + + if (!i2c->errors) + i2c->vt->write(i2c, _buf, count); +} + +/** + * Read \a count bytes into buffer \a _buf from device \a i2c. + * \param i2c Context structure + * \param _buf Buffer to fill + * \param count Number of bytes to read + */ +INLINE void i2c_read(I2c *i2c, void *_buf, size_t count) +{ + ASSERT(i2c); + ASSERT(i2c->vt); + ASSERT(i2c->vt->read); + + ASSERT(_buf); + ASSERT(count); + ASSERT(count <= i2c->xfer_size); + + ASSERT(I2C_TEST_START(i2c->flags) == I2C_START_R); + + if (!i2c->errors) + i2c->vt->read(i2c, _buf, count); +} + +/** + * Return the error condition of the bus and clear errors. + */ +INLINE int i2c_error(I2c *i2c) +{ + ASSERT(i2c); + int err = i2c->errors; + i2c->errors = 0; + + return err; +} + +/** + * Initialize I2C context structure. + * \param i2c I2C context structure + * \param dev Number of device to be initialized. You can use I2C_BITBANG0 + * and similar if you want to activate the bitbang driver. + * \param clock Peripheral clock + */ +#define i2c_init_3(i2c, dev, clock) ((((dev) >= I2C_BITBANG0) | ((dev) == I2C_BITBANG_OLD)) ? \ + i2c_hw_bitbangInit((i2c), (dev)) : i2c_hw_init((i2c), (dev), (clock))) +/**@}*/ +/**\}*/ // i2c_api + +/** + * \defgroup old_i2c_api Old I2C API + * \ingroup i2c_driver + * + * This is the old and deprecated I2C API. It is maintained for backward + * compatibility only, don't use it in new projects. + * @{ + */ +#if !CONFIG_I2C_DISABLE_OLD_API + +/** + * \ingroup old_i2c_api + * \name I2C Backends. + * Sometimes your cpu does not have a builtin + * i2c driver or you don't want, for some reason, to + * use that. + * With this you can choose, at compile time, which backend to use. + * Set the CONFIG_I2C_BACKEND configuration variable in cfg_i2c.h + * @{ + */ +#define I2C_BACKEND_BUILTIN 0 ///< Uses cpu builtin i2c driver +#define I2C_BACKEND_BITBANG 1 ///< Uses emulated bitbang driver +/**@}*/ + +/** + * \name I2c builtin prototypes. + * \ingroup old_i2c_api + * Do NOT use these function directly, instead, + * you can call the ones named without "_builtin_" + * and specify in cfg_i2c.h (CONFIG_I2C_BACKEND) + * that you want the builtin backend. + * @{ + */ +bool i2c_builtin_start_w(uint8_t id); +bool i2c_builtin_start_r(uint8_t id); +void i2c_builtin_stop(void); +bool i2c_builtin_put(uint8_t _data); +int i2c_builtin_get(bool ack); +/**@}*/ + +/** + * \name I2c bitbang prototypes. + * \ingroup old_i2c_api + * Do NOT use these function directly, instead, + * you can call the ones named without "_bitbang_" + * and specify in cfg_i2c.h (CONFIG_I2C_BACKEND) + * that you want the bitbang backend. + * @{ + */ +bool i2c_bitbang_start_w(uint8_t id); +bool i2c_bitbang_start_r(uint8_t id); +void i2c_bitbang_stop(void); +bool i2c_bitbang_put(uint8_t _data); +int i2c_bitbang_get(bool ack); +/**@}*/ + +#ifndef CONFIG_I2C_BACKEND +#define CONFIG_I2C_BACKEND I2C_BACKEND_BUILTIN +#endif + +#if CONFIG_I2C_BACKEND == I2C_BACKEND_BUILTIN + #define i2c_start_w_1 i2c_builtin_start_w + #define i2c_start_r_1 i2c_builtin_start_r + #define i2c_stop i2c_builtin_stop + #define i2c_put i2c_builtin_put + #define i2c_get i2c_builtin_get +#elif CONFIG_I2C_BACKEND == I2C_BACKEND_BITBANG + #define i2c_start_w_1 i2c_bitbang_start_w + #define i2c_start_r_1 i2c_bitbang_start_r + #define i2c_stop i2c_bitbang_stop + #define i2c_put i2c_bitbang_put + #define i2c_get i2c_bitbang_get +#else + #error Unsupported i2c backend. +#endif + + +bool i2c_send(const void *_buf, size_t count); +bool i2c_recv(void *_buf, size_t count); + +/**@}*/ + + +extern I2c local_i2c_old_api; + +/** + * Initialize I2C module (old API). + * \attention This function is deprecated. Use i2c_init(args...) in new code + */ +INLINE void i2c_init_0(void) +{ + #if CONFIG_I2C_BACKEND == I2C_BACKEND_BITBANG + i2c_init_3(&local_i2c_old_api, I2C_BITBANG_OLD, CONFIG_I2C_FREQ); + #else + i2c_init_3(&local_i2c_old_api, 0, CONFIG_I2C_FREQ); + #endif +} +#endif /* !CONFIG_I2C_DISABLE_OLD_API */ + +/** \} */ //defgroup i2c_driver + +#endif diff --git a/bertos/drv/i2c_bitbang.c b/bertos/drv/i2c_bitbang.c new file mode 100644 index 0000000..9456d36 --- /dev/null +++ b/bertos/drv/i2c_bitbang.c @@ -0,0 +1,427 @@ +/** + * \file + * + * + * \brief I2C bitbang driver (implementation) + * + * \author Francesco Sacchi + * \author Daniele Basile + */ + +#include "hw/hw_i2c_bitbang.h" + +#include "cfg/cfg_i2c.h" + +#define LOG_LEVEL I2C_LOG_LEVEL +#define LOG_FORMAT I2C_LOG_FORMAT + +#include +#include +#include + +#include +#include + +#include + +#include + +#if !CONFIG_I2C_DISABLE_OLD_API + +INLINE bool i2c_bitbang_start(void) +{ + SDA_HI; + SCL_HI; + I2C_HALFBIT_DELAY(); + SDA_LO; + I2C_HALFBIT_DELAY(); + + return !SDA_IN; +} + +void i2c_bitbang_stop(void) +{ + SDA_LO; + SCL_HI; + I2C_HALFBIT_DELAY(); + SDA_HI; +} + +bool i2c_bitbang_put(uint8_t _data) +{ + /* Add ACK bit */ + uint16_t data = (_data << 1) | 1; + + for (uint16_t i = 0x100; i != 0; i >>= 1) + { + SCL_LO; + if (data & i) + SDA_HI; + else + SDA_LO; + I2C_HALFBIT_DELAY(); + + SCL_HI; + I2C_HALFBIT_DELAY(); + } + + bool ack = !SDA_IN; + SCL_LO; + I2C_HALFBIT_DELAY(); + return ack; +} + +bool i2c_bitbang_start_w(uint8_t id) +{ + id &= ~I2C_READBIT; + /* + * Loop on the select write sequence: when the device is busy + * writing previously sent data it will reply to the SLA_W + * control byte with a NACK. In this case, we must + * keep trying until the deveice responds with an ACK. + */ + ticks_t start = timer_clock(); + while (i2c_bitbang_start()) + { + if (i2c_bitbang_put(id)) + return true; + else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("Timeout on I2C start write\n"); + break; + } + //LOG_INFO("Rep start\n"); + } + + return false; +} + +bool i2c_bitbang_start_r(uint8_t id) +{ + id |= I2C_READBIT; + if (i2c_bitbang_start()) + { + if (i2c_bitbang_put(id)) + return true; + + LOG_ERR("NACK on I2c start read\n"); + } + + return false; +} + +int i2c_bitbang_get(bool ack) +{ + uint8_t data = 0; + for (uint8_t i = 0x80; i != 0; i >>= 1) + { + SCL_LO; + I2C_HALFBIT_DELAY(); + SCL_HI; + if (SDA_IN) + data |= i; + else + data &= ~i; + + I2C_HALFBIT_DELAY(); + } + SCL_LO; + + if (ack) + SDA_LO; + else + SDA_HI; + + I2C_HALFBIT_DELAY(); + SCL_HI; + I2C_HALFBIT_DELAY(); + SCL_LO; + SDA_HI; + /* avoid sign extension */ + return (int)(uint8_t)data; +} + +#endif /* !CONFIG_I2C_DISABLE_OLD_API */ + +/* + * New I2C API + */ +static bool old_api = false; +#define I2C_DEV(i2c) ((int)((i2c)->hw)) + +static void i2c_bitbang_stop_1(struct I2c *i2c) +{ + if (old_api) + { + SDA_LO; + SCL_HI; + I2C_HALFBIT_DELAY(); + SDA_HI; + } + else + { + i2c_sdaLo(I2C_DEV(i2c)); + i2c_sclHi(I2C_DEV(i2c)); + i2c_halfbitDelay(I2C_DEV(i2c)); + i2c_sdaHi(I2C_DEV(i2c)); + } +} + +INLINE bool i2c_bitbang_start_1(struct I2c *i2c) +{ + bool ret; + /* Clear all error, we restart */ + i2c->errors &= ~(I2C_NO_ACK | I2C_ARB_LOST); + + if (old_api) + { + SDA_HI; + SCL_HI; + I2C_HALFBIT_DELAY(); + SDA_LO; + I2C_HALFBIT_DELAY(); + + ret = !SDA_IN; + } + else + { + i2c_sdaHi(I2C_DEV(i2c)); + i2c_sclHi(I2C_DEV(i2c)); + i2c_halfbitDelay(I2C_DEV(i2c)); + i2c_sdaLo(I2C_DEV(i2c)); + i2c_halfbitDelay(I2C_DEV(i2c)); + + ret = !i2c_sdaIn(I2C_DEV(i2c)); + } + + return ret; +} + + +static uint8_t i2c_bitbang_getc(struct I2c *i2c) +{ + uint8_t data = 0; + if (old_api) + { + for (uint8_t i = 0x80; i != 0; i >>= 1) + { + SCL_LO; + I2C_HALFBIT_DELAY(); + SCL_HI; + if (SDA_IN) + data |= i; + else + data &= ~i; + + I2C_HALFBIT_DELAY(); + } + SCL_LO; + + /* Generate ACK/NACK */ + if (i2c->xfer_size > 1) + SDA_LO; + else + SDA_HI; + + I2C_HALFBIT_DELAY(); + SCL_HI; + I2C_HALFBIT_DELAY(); + SCL_LO; + SDA_HI; + } + else + { + for (uint8_t i = 0x80; i != 0; i >>= 1) + { + i2c_sclLo(I2C_DEV(i2c)); + i2c_halfbitDelay(I2C_DEV(i2c)); + i2c_sclHi(I2C_DEV(i2c)); + if (i2c_sdaIn(I2C_DEV(i2c))) + data |= i; + else + data &= ~i; + + i2c_halfbitDelay(I2C_DEV(i2c)); + } + i2c_sclLo(I2C_DEV(i2c)); + + /* Generate ACK/NACK */ + if (i2c->xfer_size > 1) + i2c_sdaLo(I2C_DEV(i2c)); + else + i2c_sdaHi(I2C_DEV(i2c)); + + i2c_halfbitDelay(I2C_DEV(i2c)); + i2c_sclHi(I2C_DEV(i2c)); + i2c_halfbitDelay(I2C_DEV(i2c)); + i2c_sclLo(I2C_DEV(i2c)); + i2c_sdaHi(I2C_DEV(i2c)); + } + + /* Generate stop condition (if requested) */ + if ((i2c->xfer_size == 1) && (i2c->flags & I2C_STOP)) + i2c_bitbang_stop_1(i2c); + + return data; +} + +INLINE void i2c_bitbang_putcStop(struct I2c *i2c, uint8_t _data, bool stop) +{ + /* Add ACK bit */ + uint16_t data = (_data << 1) | 1; + bool ack; + + if (old_api) + { + for (uint16_t i = 0x100; i != 0; i >>= 1) + { + SCL_LO; + if (data & i) + SDA_HI; + else + SDA_LO; + I2C_HALFBIT_DELAY(); + + SCL_HI; + I2C_HALFBIT_DELAY(); + } + + ack = !SDA_IN; + SCL_LO; + I2C_HALFBIT_DELAY(); + } + else + { + for (uint16_t i = 0x100; i != 0; i >>= 1) + { + i2c_sclLo(I2C_DEV(i2c)); + if (data & i) + i2c_sdaHi(I2C_DEV(i2c)); + else + i2c_sdaLo(I2C_DEV(i2c)); + i2c_halfbitDelay(I2C_DEV(i2c)); + + i2c_sclHi(I2C_DEV(i2c)); + i2c_halfbitDelay(I2C_DEV(i2c)); + } + ack = !i2c_sdaIn(I2C_DEV(i2c)); + + i2c_sclLo(I2C_DEV(i2c)); + i2c_halfbitDelay(I2C_DEV(i2c)); + } + + if (!ack) + i2c->errors |= I2C_NO_ACK; + + /* Generate stop condition (if requested) */ + if (stop || i2c->errors) + i2c_bitbang_stop_1(i2c); +} + +static void i2c_bitbang_putc(struct I2c *i2c, uint8_t data) +{ + i2c_bitbang_putcStop(i2c, data, + (i2c->xfer_size == 1) && (i2c->flags & I2C_STOP)); +} + +static void i2c_bitbang_start_2(struct I2c *i2c, uint16_t slave_addr) +{ + if (i2c->flags & I2C_START_R) + slave_addr |= I2C_READBIT; + else + slave_addr &= ~I2C_READBIT; + + /* + * Loop on the select write sequence: when the device is busy + * writing previously sent data it will reply to the SLA_W + * control byte with a NACK. In this case, we must + * keep trying until the device responds with an ACK. + */ + ticks_t start = timer_clock(); + while (i2c_bitbang_start_1(i2c)) + { + i2c_bitbang_putcStop(i2c, slave_addr, false); + + if (!(i2c->errors & I2C_NO_ACK)) + return; + else if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) + { + LOG_ERR("Timeout on I2C start\n"); + i2c->errors |= I2C_START_TIMEOUT; + i2c_bitbang_stop_1(i2c); + return; + } + } + + LOG_ERR("START arbitration lost\n"); + i2c->errors |= I2C_ARB_LOST; + i2c_bitbang_stop_1(i2c); + return; +} + + +static const I2cVT i2c_bitbang_vt = +{ + .start = i2c_bitbang_start_2, + .getc = i2c_bitbang_getc, + .putc = i2c_bitbang_putc, + .write = i2c_genericWrite, + .read = i2c_genericRead, +}; + + +/** + * Initialize i2c module. + */ +void i2c_hw_bitbangInit(I2c *i2c, int dev) +{ + MOD_CHECK(timer); + if (dev == I2C_BITBANG_OLD) + old_api = true; + else + i2c->hw = (struct I2cHardware *)(dev - I2C_BITBANG0); + + i2c->vt = &i2c_bitbang_vt; + + if (old_api) + { + I2C_BITBANG_HW_INIT; + SDA_HI; + SCL_HI; + } + else + { + i2c_bitbangInit(I2C_DEV(i2c)); + i2c_sdaHi(I2C_DEV(i2c)); + i2c_sclHi(I2C_DEV(i2c)); + } +} + diff --git a/bertos/drv/kbd.c b/bertos/drv/kbd.c new file mode 100644 index 0000000..402e07d --- /dev/null +++ b/bertos/drv/kbd.c @@ -0,0 +1,496 @@ +/** + * \file + * + * + * \brief Keyboard driver (implementation) + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + * + */ + +#include "hw/hw_kbd.h" + +#include "cfg/cfg_kbd.h" +#include +#include + +#include +#include +#include + + +/* Configuration sanity checks */ +#if !defined(CONFIG_KBD_POLL) || (CONFIG_KBD_POLL != KBD_POLL_SOFTINT) + #error CONFIG_KBD_POLL must be defined to either KBD_POLL_SOFTINT +#endif +#if !defined(CONFIG_KBD_BEEP) || (CONFIG_KBD_BEEP != 0 && CONFIG_KBD_BEEP != 1) + #error CONFIG_KBD_BEEP must be defined to either 0 or 1 +#endif +#if !defined(CONFIG_KBD_OBSERVER) || (CONFIG_KBD_OBSERVER != 0 && CONFIG_KBD_OBSERVER != 1) + #error CONFIG_KBD_OBSERVER must be defined to either 0 or 1 +#endif +#if !defined(CONFIG_KBD_LONGPRESS) || (CONFIG_KBD_LONGPRESS != 0 && CONFIG_KBD_LONGPRESS != 1) + #error CONFIG_KBD_LONGPRESS must be defined to either 0 or 1 +#endif + +#if CONFIG_KBD_BEEP + #include +#endif + +#define KBD_CHECK_INTERVAL 10 /**< (ms) Timing for kbd softint */ +#define KBD_DEBOUNCE_TIME 30 /**< (ms) Debounce time */ +#define KBD_BEEP_TIME 5 /**< (ms) Duration of keybeep */ + +#define KBD_REPEAT_DELAY 400 /**< (ms) Keyboard repeat delay for first character */ +#define KBD_REPEAT_RATE 100 /**< (ms) Initial interchar delay for keyboard repeat */ +#define KBD_REPEAT_MAXRATE 20 /**< (ms) Minimum delay for keyboard repeat */ +#define KBD_REPEAT_ACCEL 5 /**< (ms) Keyboard repeat speed increase */ + +#define KBD_LNG_DELAY 1000 /**< (ms) Keyboard long pression keys delay */ + + +/** Status for keyboard repeat state machine */ +static enum { KS_IDLE, KS_REPDELAY, KS_REPEAT } kbd_rptStatus; + +/** Used to notify the occurrence of a key pressed event */ +static Event key_pressed; + +static volatile keymask_t kbd_buf; /**< Single entry keyboard buffer */ +static volatile keymask_t kbd_cnt; /**< Number of keypress events in \c kbd_buf */ +static keymask_t kbd_rpt_mask; /**< Mask of repeatable keys. */ + +#if CONFIG_KBD_POLL == KBD_POLL_SOFTINT +static Timer kbd_timer; /**< Keyboard softtimer */ +#endif + +static List kbd_rawHandlers; /**< Raw keyboard handlers */ +static List kbd_handlers; /**< Cooked keyboard handlers */ + +static KbdHandler kbd_defHandler; /**< The default keyboard handler */ +static KbdHandler kbd_debHandler; /**< The debounce keyboard handler */ +static KbdHandler kbd_rptHandler; /**< Auto-repeat keyboard handler */ + +#if CONFIG_KBD_LONGPRESS +static KbdHandler kbd_lngHandler; /**< Long pression keys handler */ +#endif + +#if CONFIG_KBD_OBSERVER + #include + Subject kbd_subject; +#endif + + +/** + * Poll keyboard and dispatch keys to handlers. + * + * Read the key states and invoke all keyboard + * handlers to process the new state. + * + * Call this function periodically using a software + * timer, an interrupt or a process. + */ +static void kbd_poll(void) +{ + /** Currently depressed key */ + static keymask_t current_key; + + struct KbdHandler *handler; + keymask_t key = kbd_readkeys(); + + /* Call raw input handlers */ + FOREACH_NODE(handler, &kbd_rawHandlers) + key = handler->hook(key); + + /* If this key was not previously pressed */ + if (key != current_key) + { + /* Remember last key */ + current_key = key; + + /* Call cooked input handlers */ + FOREACH_NODE(handler, &kbd_handlers) + key = handler->hook(key); + } +} + +#if CONFIG_KBD_POLL == KBD_POLL_SOFTINT + +/** + * Keyboard soft-irq handler. + */ +static void kbd_softint(UNUSED_ARG(iptr_t, arg)) +{ + kbd_poll(); + timer_add(&kbd_timer); +} + +#else + #error "Define keyboard poll method" + +#endif /* CONFIG_KBD_POLL */ + +/** + * \brief Read a key from the keyboard buffer. + * + * When a key is kept depressed between calls of this function a value + * is returned only after the time specified with KBD_REPAT_DELAY to + * avoid too fast keyboard repeat. + * + * \note Calls \c schedule() internally. + * + * \note This function is \b not interrupt safe! + * + * \return The mask of depressed keys or 0 if no keys are depressed. + * + */ +keymask_t kbd_peek(void) +{ + keymask_t key = 0; + +#if CONFIG_KBD_SCHED + /* Let other tasks run for a while */ + extern void schedule(void); + schedule(); +#endif + + /* Extract an event from the keyboard buffer */ + IRQ_DISABLE; + if (kbd_cnt) + { + --kbd_cnt; + key = kbd_buf; + } + IRQ_ENABLE; + + return key; +} + +/** + * Wait for a keypress and return the mask of depressed keys. + * + * \note This function is \b not interrupt safe! + */ +keymask_t kbd_get(void) +{ + keymask_t key; + + #if CONFIG_KBD_POLL == KBD_POLL_SOFTINT + event_wait(&key_pressed); + key = kbd_peek(); + #else + while (!(key = kbd_peek())) + cpu_relax(); + #endif + + return key; +} + + +/** + * Wait up to \c timeout ms for a keypress + * and return the mask of depressed keys, or K_TIMEOUT + * if the timeout was reacked. + */ +keymask_t kbd_get_timeout(mtime_t timeout) +{ + if (event_waitTimeout(&key_pressed, timeout)) + return kbd_peek(); + else + return K_TIMEOUT; +} + + +void kbd_addHandler(struct KbdHandler *handler) +{ + KbdHandler *node; + List *list; + + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* Choose between raw and coocked handlers list */ + list = (handler->flags & KHF_RAWKEYS) ? + &kbd_rawHandlers : &kbd_handlers; + + /* + * Search for the first node whose priority + * is lower than the timer we want to add. + */ + FOREACH_NODE(node,list) + if (node->pri < handler->pri) + break; + + /* Enqueue handler in the handlers chain */ + INSERT_BEFORE(&handler->link, &node->link); + + IRQ_RESTORE(flags); +} + + +void kbd_remHandler(struct KbdHandler *handler) +{ + /* Remove the handler */ + ATOMIC(REMOVE(&handler->link)); +} + + +/** + * This is the default key handler, called after + * all other handlers have had their chance to + * do their special processing. This handler + * pushes all input in the keyboard FIFO buffer. + */ +static keymask_t kbd_defHandlerFunc(keymask_t key) +{ + if (key) + { + /* Force a single event in kbd buffer */ + kbd_buf = key; + kbd_cnt = 1; + #if CONFIG_KBD_POLL == KBD_POLL_SOFTINT + event_do(&key_pressed); + #endif + + #if CONFIG_KBD_OBSERVER + observer_notify(&kbd_subject, KBD_EVENT_KEY, &key); + #endif + + #if CONFIG_KBD_BEEP + if (!(key & K_REPEAT)) + buz_beep(KBD_BEEP_TIME); + #endif + } + + /* Eat all input */ + return 0; +} + +/** + * Handle keyboard debounce + */ +static keymask_t kbd_debHandlerFunc(keymask_t key) +{ + /** Buffer for debounce */ + static keymask_t debounce_key; + + /** Timer for keyboard debounce */ + static ticks_t debounce_time; + + /** Key aquired after debounce */ + static keymask_t new_key; + + + ticks_t now = timer_clock(); + + if (key != debounce_key) + { + /* Reset debounce timer */ + debounce_key = key; + debounce_time = now; + } + else if ((new_key != debounce_key) + && (now - debounce_time > ms_to_ticks(KBD_DEBOUNCE_TIME))) + { + new_key = debounce_key; + debounce_time = now; + } + + return new_key; +} + +#if CONFIG_KBD_LONGPRESS +/** + * Handle long pression keys. + */ +static keymask_t kbd_lngHandlerFunc(keymask_t key) +{ + static ticks_t start; + ticks_t now = timer_clock(); + + if (key & K_LNG_MASK) + { + if (now - start > ms_to_ticks(KBD_LNG_DELAY)) + key |= K_LONG; + } + else + start = now; + return key; +} +#endif + +/** + * Set current mask of repeatable keys. + */ +keymask_t kbd_setRepeatMask(keymask_t mask) +{ + keymask_t oldmask = kbd_rpt_mask; + ATOMIC(kbd_rpt_mask = mask); + return oldmask; +} + +/** + * Handle keyboard repeat + */ +static keymask_t kbd_rptHandlerFunc(keymask_t key) +{ + /* Timer for keyboard repeat events. */ + static ticks_t repeat_time; + + /* Current repeat rate (for acceleration). */ + static ticks_t repeat_rate; /** Current repeat rate (for acceleration) */ + + ticks_t now = timer_clock(); + + switch (kbd_rptStatus) + { + case KS_IDLE: + if (key & kbd_rpt_mask) + { + repeat_time = now; + kbd_rptStatus = KS_REPDELAY; + } + break; + + case KS_REPDELAY: + if (key & kbd_rpt_mask) + { + if (now - repeat_time > ms_to_ticks(KBD_REPEAT_DELAY)) + { + key = (key & kbd_rpt_mask) | K_REPEAT; + repeat_time = now; + repeat_rate = ms_to_ticks(KBD_REPEAT_RATE); + kbd_rptStatus = KS_REPEAT; + } + else + key = 0; + } + else + kbd_rptStatus = KS_IDLE; + break; + + case KS_REPEAT: + if (key & kbd_rpt_mask) + { + if (now - repeat_time > repeat_rate) + { + /* Enqueue a new event in the buffer */ + key = (key & kbd_rpt_mask) | K_REPEAT; + repeat_time = now; + + /* Repeat rate acceleration */ + if (repeat_rate > ms_to_ticks(KBD_REPEAT_MAXRATE)) + repeat_rate -= ms_to_ticks(KBD_REPEAT_ACCEL); + } + else + key = 0; + } + else + kbd_rptStatus = KS_IDLE; + + break; + } + + return key; +} + + +MOD_DEFINE(kbd) + +/** + * Initialize keyboard ports and softtimer + */ +void kbd_init(void) +{ +#if CONFIG_KBD_BEEP + MOD_CHECK(buzzer); +#endif + + KBD_HW_INIT; + + /* Init handlers lists */ + LIST_INIT(&kbd_handlers); + LIST_INIT(&kbd_rawHandlers); + + /* Add debounce keyboard handler */ + kbd_debHandler.hook = kbd_debHandlerFunc; + kbd_debHandler.pri = 100; /* high priority */ + kbd_debHandler.flags = KHF_RAWKEYS; + kbd_addHandler(&kbd_debHandler); + + #if CONFIG_KBD_LONGPRESS + /* Add long pression keyboard handler */ + kbd_lngHandler.hook = kbd_lngHandlerFunc; + kbd_lngHandler.pri = 90; /* high priority */ + kbd_lngHandler.flags = KHF_RAWKEYS; + kbd_addHandler(&kbd_lngHandler); + #endif + + /* Add repeat keyboard handler */ + kbd_rptHandler.hook = kbd_rptHandlerFunc; + kbd_rptHandler.pri = 80; /* high priority */ + kbd_rptHandler.flags = KHF_RAWKEYS; + kbd_addHandler(&kbd_rptHandler); + + /* Add default keyboard handler */ + kbd_defHandler.hook = kbd_defHandlerFunc; + kbd_defHandler.pri = -128; /* lowest priority */ + kbd_addHandler(&kbd_defHandler); + +#if CONFIG_KBD_OBSERVER + observer_InitSubject(&kbd_subject); +#endif + +#if CONFIG_KBD_POLL == KBD_POLL_SOFTINT + + MOD_CHECK(timer); + #if CONFIG_KERN + MOD_CHECK(proc); + #endif + + /* Initialize the keyboard event (key pressed) */ + event_initGeneric(&key_pressed); + + /* Add kbd handler to soft timers list */ + event_initSoftint(&kbd_timer.expire, kbd_softint, NULL); + timer_setDelay(&kbd_timer, ms_to_ticks(KBD_CHECK_INTERVAL)); + timer_add(&kbd_timer); + +#else + #error "Define keyboard poll method" + +#endif + + MOD_INIT(kbd); +} diff --git a/bertos/drv/kbd.h b/bertos/drv/kbd.h new file mode 100644 index 0000000..989ebf7 --- /dev/null +++ b/bertos/drv/kbd.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \defgroup kbd Keyboard handling driver + * \ingroup drivers + * \{ + * \brief Keyboard driver. + * + * Configuration file: cfg_kbd.h + * + * HAL files: hw_kbd.h, kbd_map.h + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kbd" + * $WIZ$ module_depends = "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_kbd.h" + * $WIZ$ module_hw = "bertos/hw/hw_kbd.h", "bertos/hw/kbd_map.h" + */ + +#ifndef DRV_KBD_H +#define DRV_KBD_H + +#include "hw/kbd_map.h" + +#include "cfg/cfg_kbd.h" // CONFIG_KBD_OBSERVER +#include + +#include + +/** + * \name Keyboard polling modes. + * + * Define CONFIG_KBD_POLL to one of these. + * + * \{ + */ +#define KBD_POLL_SOFTINT 1 +/* \} */ + +/** + * Keyboard handler descriptor + */ +typedef struct KbdHandler +{ + Node link; + keymask_t (*hook)(keymask_t); /**< Hook function */ + int8_t pri; /**< Priority in input queue */ + uint8_t flags; /**< See below for definitions */ +} KbdHandler; + +#define KHF_RAWKEYS BV(0) /**< Handler gets raw key events */ + + +void kbd_init(void); +keymask_t kbd_peek(void); +keymask_t kbd_get(void); +keymask_t kbd_get_timeout(mtime_t timeout); +void kbd_addHandler(struct KbdHandler *handler); +void kbd_remHandler(struct KbdHandler *handler); +keymask_t kbd_setRepeatMask(keymask_t mask); + +#if CONFIG_KBD_OBSERVER + struct Subject; + + /** Subject structure for keyboard observers. */ + extern struct Subject kbd_subject; + + enum + { + /* Event for key presses. */ + KBD_EVENT_KEY = 0x100 + }; +#endif + +/** \} */ //defgroup kbd +#endif /* DRV_KBD_H */ diff --git a/bertos/drv/kdebug.c b/bertos/drv/kdebug.c new file mode 100644 index 0000000..2125e2a --- /dev/null +++ b/bertos/drv/kdebug.c @@ -0,0 +1,290 @@ +/** + * \file + * + * + * \brief General pourpose debug support for embedded systems (implementation). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "cfg/cfg_debug.h" +#include /* for BV() */ +#include +#include + +#include +#include + +#include /* for _formatted_write() */ +#include + +#ifdef _DEBUG + +#if CPU_HARVARD && !defined(_PROGMEM) + #error This module build correctly only in program memory! +#endif + + +#if OS_HOSTED + #include // write() + + #define KDBG_WAIT_READY() do { /*nop*/ } while(0) + #define KDBG_WRITE_CHAR(c) do { char __c = (c); write(STDERR_FILENO, &__c, sizeof(__c)); } while(0) + #define KDBG_MASK_IRQ(old) do { (void)(old); } while(0) + #define KDBG_RESTORE_IRQ(old) do { /*nop*/ } while(0) + typedef char kdbg_irqsave_t; /* unused */ + + #define kdbg_hw_init() do {} while (0) ///< Not needed + + #if CONFIG_KDEBUG_PORT == 666 + #error BITBANG debug console missing for this platform + #endif +#else + #include CPU_CSOURCE(kdebug) +#endif + + +void kdbg_init(void) +{ + /* Init debug hw */ + kdbg_hw_init(); + kputs("\n\n*** BeRTOS DBG START ***\n"); +} + + +/** + * Output one character to the debug console + */ +static void __kputchar(char c, UNUSED_ARG(void *, unused)) +{ + /* Poll while serial buffer is still busy */ + KDBG_WAIT_READY(); + + /* Send '\n' as '\r\n' for dumb terminals */ + if (c == '\n') + { + KDBG_WRITE_CHAR('\r'); + KDBG_WAIT_READY(); + } + + KDBG_WRITE_CHAR(c); +} + + +void kputchar(char c) +{ + /* Mask serial TX intr */ + kdbg_irqsave_t irqsave; + KDBG_MASK_IRQ(irqsave); + + __kputchar(c, 0); + + /* Restore serial TX intr */ + KDBG_RESTORE_IRQ(irqsave); +} + + +static void PGM_FUNC(kvprintf)(const char * PGM_ATTR fmt, va_list ap) +{ +#if CONFIG_PRINTF + /* Mask serial TX intr */ + kdbg_irqsave_t irqsave; + KDBG_MASK_IRQ(irqsave); + + PGM_FUNC(_formatted_write)(fmt, __kputchar, 0, ap); + + /* Restore serial TX intr */ + KDBG_RESTORE_IRQ(irqsave); +#else + /* A better than nothing printf() surrogate. */ + PGM_FUNC(kputs)(fmt); +#endif /* CONFIG_PRINTF */ +} + +void PGM_FUNC(kprintf)(const char * PGM_ATTR fmt, ...) +{ + va_list ap; + + va_start(ap, fmt); + PGM_FUNC(kvprintf)(fmt, ap); + va_end(ap); +} + +void PGM_FUNC(kputs)(const char * PGM_ATTR str) +{ + char c; + + /* Mask serial TX intr */ + kdbg_irqsave_t irqsave; + KDBG_MASK_IRQ(irqsave); + + while ((c = PGM_READ_CHAR(str++))) + __kputchar(c, 0); + + KDBG_RESTORE_IRQ(irqsave); +} + + +/** + * Cheap function to print small integers without using printf(). + */ +int kputnum(int num) +{ + int output_len = 0; + int divisor = 10000; + int digit; + + do + { + digit = num / divisor; + num %= divisor; + + if (digit || output_len || divisor == 1) + { + kputchar(digit + '0'); + ++output_len; + } + } + while (divisor /= 10); + + return output_len; +} + + +static void klocation(const char * PGM_ATTR file, int line) +{ + PGM_FUNC(kputs)(file); + kputchar(':'); + kputnum(line); + PGM_FUNC(kputs)(PGM_STR(": ")); +} + +int PGM_FUNC(__bassert)(const char * PGM_ATTR cond, const char * PGM_ATTR file, int line) +{ + klocation(file, line); + PGM_FUNC(kputs)(PGM_STR("Assertion failed: ")); + PGM_FUNC(kputs)(cond); + kputchar('\n'); + BREAKPOINT; + return 1; +} + +/* + * Unfortunately, there's no way to get __func__ in + * program memory, so we waste quite a lot of RAM in + * AVR and other Harvard processors. + */ +void PGM_FUNC(__trace)(const char *name) +{ + PGM_FUNC(kprintf)(PGM_STR("%s()\n"), name); +} + +void PGM_FUNC(__tracemsg)(const char *name, const char * PGM_ATTR fmt, ...) +{ + va_list ap; + + PGM_FUNC(kprintf)(PGM_STR("%s(): "), name); + va_start(ap, fmt); + PGM_FUNC(kvprintf)(fmt, ap); + va_end(ap); + kputchar('\n'); +} + +int PGM_FUNC(__invalid_ptr)(void *value, const char * PGM_ATTR name, const char * PGM_ATTR file, int line) +{ + klocation(file, line); + PGM_FUNC(kputs)(PGM_STR("Invalid ptr: ")); + PGM_FUNC(kputs)(name); + #if CONFIG_PRINTF + PGM_FUNC(kprintf)(PGM_STR(" = 0x%p\n"), value); + #else + (void)value; + kputchar('\n'); + #endif + return 1; +} + + +void __init_wall(long *wall, int size) +{ + while(size--) + *wall++ = WALL_VALUE; +} + + +int PGM_FUNC(__check_wall)(long *wall, int size, const char * PGM_ATTR name, const char * PGM_ATTR file, int line) +{ + int i, fail = 0; + + for (i = 0; i < size; i++) + { + if (wall[i] != WALL_VALUE) + { + klocation(file, line); + PGM_FUNC(kputs)(PGM_STR("Wall broken: ")); + PGM_FUNC(kputs)(name); + #if CONFIG_PRINTF + PGM_FUNC(kprintf)(PGM_STR("[%d] (0x%p) = 0x%lx\n"), i, wall + i, wall[i]); + #else + kputchar('\n'); + #endif + fail = 1; + } + } + + return fail; +} + + +#if CONFIG_PRINTF + +/** + * Dump binary data in hex + */ +void kdump(const void *_buf, size_t len) +{ + const unsigned char *buf = (const unsigned char *)_buf; + + kprintf("Dumping buffer at addr [%p], %zu bytes", buf, len); + size_t i=0; + while (len--) + { + if ((i++ % 16) == 0) + kputs("\n"); + kprintf("%02X ", *buf++); + } + kputchar('\n'); +} + +#endif /* CONFIG_PRINTF */ + +#endif /* _DEBUG */ diff --git a/bertos/drv/lcd_32122a.c b/bertos/drv/lcd_32122a.c new file mode 100644 index 0000000..b46ee0b --- /dev/null +++ b/bertos/drv/lcd_32122a.c @@ -0,0 +1,334 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + + +#include "lcd_32122a.h" + +#include "hw/hw_lcd_32122a.h" + +#include "cfg/cfg_lcd_32122a.h" + +#include /* BV() */ +#include +#include + +#include + +#include +#include + +#include +#include + + +/** Number of LCD pages */ +#define LCD_PAGES 4 + +/** Width of an LCD page */ +#define LCD_PAGESIZE (LCD_WIDTH / 2) + +/** + * \name 32122A Commands + * @{ + */ +#define LCD_CMD_DISPLAY_ON 0xAF +#define LCD_CMD_DISPLAY_OFF 0xAE +#define LCD_CMD_STARTLINE 0xC0 +#define LCD_CMD_PAGEADDR 0xB8 +#define LCD_CMD_COLADDR 0x00 +#define LCD_CMD_ADC_LEFT 0xA1 +#define LCD_CMD_ADC_RIGHT 0xA0 +#define LCD_CMD_STATIC_OFF 0xA4 +#define LCD_CMD_STATIC_ON 0xA5 +#define LCD_CMD_DUTY_32 0xA9 +#define LCD_CMD_DUTY_16 0xA8 +#define LCD_CMD_RMW_ON 0xE0 +#define LCD_CMD_RMW_OFF 0xEE +#define LCD_CMD_RESET 0xE2 +/*@}*/ + + +/* Status flags */ +#define LCDF_BUSY BV(7) + +#if CONFIG_LCD_WAIT + /** + * \code + * __ __ + * RS __\____________/__ + * ____________ + * R/W __/ \__ + * _______ + * E1 _____/ \____ + * ______ ____ + * DATA X/ \====/ + * + * \endcode + */ + #define WAIT_LCD \ + do { \ + uint8_t status; \ + LCD_DB_IN; \ + do { \ + LCD_SET_RD; \ + LCD_CLR_A0; \ + LCD_SET_E1; \ + LCD_DELAY_READ; \ + status = LCD_READ; \ + LCD_CLR_E1; \ + LCD_SET_A0; \ + LCD_CLR_RD; \ + } while (status & LCDF_BUSY); \ + LCD_DB_OUT; \ + } while (0) +#else /* CONFIG_LCD_WAIT */ + #define WAIT_LCD do {} while(0) +#endif /* CONFIG_LCD_WAIT */ + + +/** + * Raster buffer to draw into. + * + * Bits in the bitmap bytes have vertical orientation, + * as required by the LCD driver. + */ +static uint8_t lcd_raster[RAST_SIZE(LCD_WIDTH, LCD_HEIGHT)]; + +/** Default LCD bitmap */ +struct Bitmap lcd_bitmap; + + +#if CONFIG_LCD_SOFTINT_REFRESH + +/** Timer for regular LCD refresh */ +static Timer lcd_refresh_timer; + +#endif /* CONFIG_LCD_SOFTINT_REFRESH */ + + +INLINE void lcd_32122_cmd(uint8_t cmd, uint8_t chip) +{ + WAIT_LCD; + + /* __ __ + * A0 __\____________/__ + * + * R/W __________________ + * ______ + * E1 _____/ \_____ + * + * DATA --<============>-- + */ + LCD_WRITE(cmd); + //LCD_DB_OUT; + LCD_CLR_A0; + LCD_SET_E(chip); + LCD_DELAY_WRITE; + LCD_CLR_E(chip); + LCD_SET_A0; + //LCD_DB_IN; + +} + + +INLINE uint8_t lcd_32122_read(uint8_t chip) +{ + uint8_t data; + + WAIT_LCD; + + /** + * \code + * __________________ + * A0 __/ \__ + * ____________ + * R/W __/ \__ + * _______ + * E1 _____/ \____ + * + * DATA -------<=====>---- + * + * \endcode + */ + LCD_DB_IN; + //LCD_SET_A0; + LCD_SET_RD; + LCD_SET_E(chip); + LCD_DELAY_READ; + data = LCD_READ; + LCD_CLR_E(chip); + LCD_CLR_RD; + //LCD_CLR_A0; + LCD_DB_OUT; + + return data; +} + +INLINE void lcd_32122_write(uint8_t c, uint8_t chip) +{ + WAIT_LCD; + + /** + * \code + * __________________ + * A0 ___/ \___ + * + * R/W __________________ + * ______ + * E1 _____/ \_____ + * + * DATA -<==============>- + * + * \endcode + */ + LCD_WRITE(c); + //LCD_DB_OUT; + //LCD_SET_A0; + LCD_SET_E(chip); + LCD_DELAY_WRITE; + LCD_CLR_E(chip); + //LCD_CLR_A0; + //LCD_DB_IN; +} + +static void lcd_32122_clear(void) +{ + uint8_t page, j; + + for (page = 0; page < LCD_PAGES; ++page) + { + lcd_32122_cmd(LCD_CMD_COLADDR, LCDF_E1 | LCDF_E2); + lcd_32122_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2); + for (j = 0; j < LCD_PAGESIZE; j++) + lcd_32122_write(0, LCDF_E1 | LCDF_E2); + } +} + + +static void lcd_32122_writeRaster(const uint8_t *raster) +{ + uint8_t page, rows; + const uint8_t *right_raster; + + for (page = 0; page < LCD_PAGES; ++page) + { + lcd_32122_cmd(LCD_CMD_PAGEADDR | page, LCDF_E1 | LCDF_E2); + lcd_32122_cmd(LCD_CMD_COLADDR | 0, LCDF_E1 | LCDF_E2); + + /* Super optimized lamer loop */ + right_raster = raster + LCD_PAGESIZE; + rows = LCD_PAGESIZE; + do + { + lcd_32122_write(*raster++, LCDF_E1); + lcd_32122_write(*right_raster++, LCDF_E2); + } + while (--rows); + raster = right_raster; + } +} + +#if CONFIG_LCD_SOFTINT_REFRESH + +static void lcd_32122_refreshSoftint(void) +{ + lcd_32122_blitBitmap(&lcd_bitmap); + timer_setDelay(&lcd_refresh_timer, ms_to_ticks(CONFIG_LCD_REFRESH)); + timer_add(&lcd_refresh_timer); +} + +#endif /* CONFIG_LCD_SOFTINT_REFRESH */ + +/** + * Set LCD contrast PWM. + */ +void lcd_32122_setPwm(int duty) +{ + ASSERT(duty >= LCD_MIN_PWM); + ASSERT(duty <= LCD_MAX_PWM); + + pwm_setDuty(LCD_PWM_CH, duty); + pwm_enable(LCD_PWM_CH, true); +} + +/** + * Update the LCD display with data from the provided bitmap. + */ +void lcd_32122_blitBitmap(const Bitmap *bm) +{ + lcd_32122_writeRaster(bm->raster); +} + + +/** + * Initialize LCD subsystem. + * + * \note The PWM used for LCD contrast is initialized in drv/pwm.c + * because it is the same PWM used for output attenuation. + */ +void lcd_32122_init(void) +{ + MOD_CHECK(timer); + + pwm_init(); + + lcd_32122a_hw_bus_init(); + LCD_32122_RESET(); + + lcd_32122_cmd(LCD_CMD_RESET, LCDF_E1 | LCDF_E2); + lcd_32122_cmd(LCD_CMD_DISPLAY_ON, LCDF_E1 | LCDF_E2); + lcd_32122_cmd(LCD_CMD_STARTLINE | 0, LCDF_E1 | LCDF_E2); + + + lcd_32122_clear(); + lcd_32122_setPwm(LCD_DEF_PWM); + + gfx_bitmapInit(&lcd_bitmap, lcd_raster, LCD_WIDTH, LCD_HEIGHT); + gfx_bitmapClear(&lcd_bitmap); + +#if CONFIG_LCD_SOFTINT_REFRESH + /* Init IRQ driven LCD refresh */ + timer_setSoftint(&lcd_refresh_timer, (Hook)lcd_32122_refreshSoftint, 0); + timer_setDelay(&lcd_refresh_timer, ms_to_ticks(CONFIG_LCD_REFRESH)); + timer_add(&lcd_refresh_timer); +#endif /* CONFIG_LCD_SOFTINT_REFRESH */ + +} + diff --git a/bertos/drv/lcd_32122a.h b/bertos/drv/lcd_32122a.h new file mode 100644 index 0000000..ed9b1b5 --- /dev/null +++ b/bertos/drv/lcd_32122a.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Displaytech 32122A LCD driver + * + * $WIZ$ module_name = "lcd_32122a" + * $WIZ$ module_hw = "bertos/hw/hw_lcd_32122a.h" + * $WIZ$ module_configuration = "bertos/cfg/cfg_lcd_32122a.h" + * $WIZ$ module_depends = "timer", "pwm" + */ + +#ifndef DRV_LCD_32122A_H +#define DRV_LCD_32122A_H + +/* Display bitmap dims */ +#define LCD_WIDTH 122 +#define LCD_HEIGHT 32 + +#include /* Bitmap */ + +#warning __FILTER_NEXT_WARNING__ +#warning this drive is untested.. + +void lcd_32122_init(void); +void lcd_32122_setPwm(int duty); +void lcd_32122_blitBitmap(const Bitmap *bm); + +#endif /* DRV_LCD_32122A_H */ diff --git a/bertos/drv/lcd_gfx_hwtest.c b/bertos/drv/lcd_gfx_hwtest.c new file mode 100644 index 0000000..c07be27 --- /dev/null +++ b/bertos/drv/lcd_gfx_hwtest.c @@ -0,0 +1,92 @@ +/** + * \file + * + * + * \brief dot-matrix LCD test. + * + * \author Bernie Innocenti + * + */ + + +#warning FIXME: broken test! + +#if 0 + +#include +#include + +#include + +static void magic(struct Bitmap *bitmap, coord_t x, coord_t y) +{ + static const coord_t coords[] = { 120, 34, 90, 90, 30, 90, 0, 34, 60, 0, 90, 90, 0, 34, 120, 34, 30, 90, 60, 0 }; + unsigned int i; + + gfx_moveTo(bitmap, coords[countof(coords)-2]/2 + x, coords[countof(coords)-1]/3 + y); + for (i = 0; i < countof(coords); i += 2) + gfx_lineTo(bitmap, coords[i]/2 + x, coords[i+1]/3 + y); +} + +int main(int argc, char *argv[]) +{ + emul_init(&argc, argv); + lcd_init(); + + coord_t x = 0, y = LCD_WIDTH / 2; + coord_t xdir = +1, ydir = -1; + Bitmap *bm = &lcd_bitmap; + + for(;;) + { + gfx_bitmapClear(bm); + gfx_setClipRect(bm, 0, 0, bm->width, bm->height); + gfx_rectDraw(bm, 10, 10, bm->width-10, bm->height-10); + gfx_setClipRect(bm, 11, 11, bm->width-11, bm->height-11); + magic(bm, x, y); + + x += xdir; + y += ydir; + if (x >= bm->width) xdir = -1; + if (x <= -50) xdir = +1; + if (y >= bm->height) ydir = -1; + if (y <= -50) ydir = +1; + + lcd_blit_bitmap(bm); + emul_idle(); + usleep(10000); + } + + emul_cleanup(); + return 0; +} + +#endif diff --git a/bertos/drv/lcd_gfx_qt.cpp b/bertos/drv/lcd_gfx_qt.cpp new file mode 100644 index 0000000..69ff66f --- /dev/null +++ b/bertos/drv/lcd_gfx_qt.cpp @@ -0,0 +1,187 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief Custom control for graphics LCD emulation (implementation) + */ + +#include "lcd_gfx_qt.h" +#include +#include +#include // CONFIG_BITMAP_FMT + +#include +#include +#include +#include + +// Display colors +#define LCD_FG_COLOR 0x0, 0x0, 0x0 +#define LCD_BG_COLOR 0xBB, 0xCC, 0xBB + + +EmulLCD::EmulLCD(QWidget *parent) : + QFrame(parent), + fg_color(LCD_FG_COLOR), + bg_brush(QColor(LCD_BG_COLOR)) +{ + // Optimized rendering: we repaint everything anyway + setAttribute(Qt::WA_NoSystemBackground); + + // initialize bitmap + memset(raster, 0xAA, sizeof(raster)); + + // set widget frame + setFrameStyle(QFrame::Panel | QFrame::Sunken); + frame_width = frameWidth(); + + setMinimumSize(WIDTH + frame_width * 2, HEIGHT + frame_width * 2); + + #if CONFIG_EMULLCD_SCALE + QSizePolicy pol = QSizePolicy(QSizePolicy::Expanding, QSizePolicy::Preferred, QSizePolicy::Frame); + pol.setHeightForWidth(true); + #else + QSizePolicy pol = QSizePolicy(QSizePolicy::Fixed, QSizePolicy::Fixed, QSizePolicy::Frame); + #endif + setSizePolicy(pol); +} + + +EmulLCD::~EmulLCD() +{ + // nop +} + +#if CONFIG_EMULLCD_SCALE +int EmulLCD::heightForWidth(int w) const +{ + int h; + + w -= frame_width * 2; + h = (w * HEIGHT + WIDTH/2) / WIDTH; + h += frame_width * 2; + + return h; +} +#endif // CONFIG_EMULLCD_SCALE + +void EmulLCD::paintEvent(QPaintEvent * /*event*/) +{ + QPainter p(this); + QImage img(raster, WIDTH, HEIGHT, QImage::Format_Mono); + + #if CONFIG_EMULLCD_SCALE + int w = width() - frame_width * 2; + int h = height() - frame_width * 2; + if ((w != WIDTH) || (h != HEIGHT)) + { + p.scale((qreal)w / WIDTH, (qreal)h / HEIGHT); + //p.setRenderHint(QPainter::SmoothPixmapTransform); + } + #endif // CONFIG_EMULLCD_SCALE + + p.setBackgroundMode(Qt::OpaqueMode); + p.setBackground(bg_brush); + p.setPen(fg_color); + + p.drawImage(QPoint(frame_width, frame_width), img); +} + +void EmulLCD::writeRaster(uint8_t *new_raster) +{ +#if CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_H_MSB + + // Straight copy + //memcpy(raster, new_raster, sizeof(raster)); + + // Inverting copy + for (int i = 0; i < (int)sizeof(raster); ++i) + raster[i] = ~new_raster[i]; + +#elif CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_V_LSB + + // Rotation + inversion + for (int y = 0; y < HEIGHT; ++y) + { + for (int xbyte = 0; xbyte < WIDTH/8; ++xbyte) + { + uint8_t v = 0; + for (int xbit = 0; xbit < 8; ++xbit) + v |= (new_raster[(xbyte * 8 + xbit) + (y / 8) * WIDTH] & (1 << (y%8)) ) + ? (1 << (7 - xbit)) : 0; + + raster[y * ((WIDTH + 7) / 8) + xbyte] = v; + } + } +#else + #error Unsupported bitmap format +#endif + + repaint(); +} + + + +#include +#include + +DECLARE_WALL(wall_before_raster, WALL_SIZE) +/** + * Raster buffer to draw into. + * + * Bits in the bitmap bytes have vertical orientation, + * as required by the LCD driver. + */ +static uint8_t lcd_raster[RAST_SIZE(EmulLCD::WIDTH, EmulLCD::HEIGHT)]; +DECLARE_WALL(wall_after_raster, WALL_SIZE) + + + + +/*extern "C"*/ void lcd_gfx_qt_init(Bitmap *lcd_bitmap) +{ + //FIXME INIT_WALL(wall_before_raster); + //FIXME INIT_WALL(wall_after_raster); + gfx_bitmapInit(lcd_bitmap, lcd_raster, EmulLCD::WIDTH, EmulLCD::HEIGHT); + gfx_bitmapClear(lcd_bitmap); +} + +/*extern "C"*/ void lcd_gfx_qt_blitBitmap(const Bitmap *bm) +{ + //FIXME CHECK_WALL(wall_before_raster); + //FIXME CHECK_WALL(wall_after_raster); + emul->emulLCD->writeRaster(bm->raster); +} + +#include "lcd_gfx_qt_moc.cpp" + diff --git a/bertos/drv/lcd_gfx_qt.h b/bertos/drv/lcd_gfx_qt.h new file mode 100644 index 0000000..9840f24 --- /dev/null +++ b/bertos/drv/lcd_gfx_qt.h @@ -0,0 +1,98 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief Custom control for graphics LCD emulation (interface) + */ + +#ifndef DRV_LCD_GFX_QT_H +#define DRV_LCD_GFX_QT_H + +// uint8_t +#include +#include + +#include +#include + +#define LCD_WIDTH 128 + +// fwd decls +class QSizePolicy; +class QPaintEvent; +class QResizeEvent; + +#define CONFIG_EMULLCD_SCALE 1 + +class EmulLCD : public QFrame +{ + Q_OBJECT + +public: +// Attributes + enum { WIDTH = 128, HEIGHT = 64 }; + +// Construction + EmulLCD(QWidget *parent = 0); + virtual ~EmulLCD(); + +// Base class overrides +protected: + virtual void paintEvent(QPaintEvent *event); + + #if CONFIG_EMULLCD_SCALE + virtual int heightForWidth(int w) const; + #endif + +// Operations +public: + void writeRaster(uint8_t *raster); + +// Implementation +protected: + /// Frame thickness + int frame_width; + + /// Brushes for painting the LCD + QColor fg_color; + QBrush bg_brush; + + /// Pixel storage + unsigned char raster[(WIDTH + 7 / 8) * HEIGHT]; +}; + + +void lcd_gfx_qt_init(Bitmap *lcd_bitmap); +void lcd_gfx_qt_blitBitmap(const Bitmap *bm); + +#endif // DRV_LCD_GFX_QT_H diff --git a/bertos/drv/lcd_hd44.c b/bertos/drv/lcd_hd44.c new file mode 100644 index 0000000..5bce8c6 --- /dev/null +++ b/bertos/drv/lcd_hd44.c @@ -0,0 +1,429 @@ +/** + * \file + * + * + * \brief LM044L type LCD hardware module (impl.) + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "lcd_hd44.h" + +#include "hw/hw_lcd_hd44.h" + +#include "cfg/cfg_arch.h" + +#include + +#warning FIXME: Revise and refactor this code. + +#if defined(LCD_READ_H) && defined(LCD_READ_L) && defined(LCD_WRITE_H) && defined(LCD_WRITE_L) + #define CONFIG_LCD_4BIT 1 +#elif defined(LCD_READ) && defined(LCD_WRITE) + #define CONFIG_LCD_4BIT 0 +#else + #error Incomplete or missing LCD_READ/LCD_WRITE macros +#endif + +/** Flag di stato del display */ +#define LCDF_BUSY BV(7) + +#if CONFIG_LCD_ADDRESS_FAST == 1 +#define lcd_address(x) lcd_address[x] +/** + * Addresses of LCD display character positions, expanded + * for faster access (DB7 = 1). + */ +static const uint8_t lcd_address[] = +{ + /* row 0 */ + 0x80, 0x81, 0x82, 0x83, + 0x84, 0x85, 0x86, 0x87, + 0x88, 0x89, 0x8A, 0x8B, + 0x8C, 0x8D, 0x8E, 0x8F, +#if CONFIG_LCD_COLS > 16 + 0x90, 0x91, 0x92, 0x93, +#endif + + /* row 1 */ + 0xC0, 0xC1, 0xC2, 0xC3, + 0xC4, 0xC5, 0xC6, 0xC7, + 0xC8, 0xC9, 0xCA, 0xCB, + 0xCC, 0xCD, 0xCE, 0xCF, +#if CONFIG_LCD_COLS > 16 + 0xD0, 0xD1, 0xD2, 0xD3, +#endif + +#if CONFIG_LCD_ROWS > 2 + /* row 2 */ + 0x94, 0x95, 0x96, 0x97, + 0x98, 0x99, 0x9A, 0x9B, + 0x9C, 0x9D, 0x9E, 0x9F, + 0xA0, 0xA1, 0xA2, 0xA3, +#if CONFIG_LCD_COLS > 16 + 0xA4, 0xA5, 0xA6, 0xA7, +#endif + + /* row 3 */ + 0xD4, 0xD5, 0xD6, 0xD7, + 0xD8, 0xD9, 0xDA, 0xDB, + 0xDC, 0xDD, 0xDE, 0xDF, + 0xE0, 0xE1, 0xE2, 0xE3, +#if CONFIG_LCD_COLS > 16 + 0xE4, 0xE5, 0xE6, 0xE7, +#endif + +#endif /* CONFIG_LCD_ROWS > 2 */ +}; + +STATIC_ASSERT(countof(lcd_address) == CONFIG_LCD_ROWS * CONFIG_LCD_COLS); +#else /* CONFIG_LCD_ADDRESS_FAST == 0 */ + +static const uint8_t col_address[] = +{ + 0x80, + 0xC0, +#if CONFIG_LCD_ROWS > 2 + 0x94, + 0xD4 +#endif +}; +STATIC_ASSERT(countof(col_address) == CONFIG_LCD_ROWS); +/** + * Addresses of LCD display character positions, calculated runtime to save RAM + */ +static uint8_t lcd_address(uint8_t addr) +{ + return col_address[addr / CONFIG_LCD_COLS] + addr % CONFIG_LCD_COLS; +} +#endif /* CONFIG_LCD_ADDRESS_FAST */ + +/** + * Current display position. We remember this to optimize + * LCD output by avoiding to set the address every time. + */ +static lcdpos_t lcd_current_addr; + + +#if !defined(ARCH_EMUL) || !(ARCH & ARCH_EMUL) +/* __________________ + * RS + * + * R/W __________________ + * _______ + * ENA _____/ \____ + * + * DATA -<================ + */ +INLINE void lcd_dataWrite(uint8_t data) +{ +#if CONFIG_LCD_4BIT + /* Write high nibble */ + LCD_WRITE_H(data); + LCD_SET_E; + LCD_DELAY_WRITE; + LCD_CLR_E; + LCD_DELAY_WRITE; + + /* Write low nibble */ + LCD_WRITE_L(data); + LCD_SET_E; + LCD_DELAY_WRITE; + LCD_CLR_E; + LCD_DELAY_WRITE; + +#else /* !CONFIG_LCD_4BIT */ + + /* Write data */ + LCD_WRITE(data); + LCD_SET_E; + LCD_DELAY_WRITE; + LCD_CLR_E; + LCD_DELAY_WRITE; + +#endif /* !CONFIG_LCD_4BIT */ +} + +/* __________________ + * RS + * ____________ + * R/W __/ \__ + * _______ + * ENA _____/ \____ + * ______ ____ + * DATA X/ \====/ + */ +INLINE uint8_t lcd_dataRead(void) +{ + uint8_t data; + + LCD_SET_RD; + LCD_DB_IN; /* Set bus as input! */ + LCD_DELAY_READ; + +#if CONFIG_LCD_4BIT + + /* Read high nibble */ + LCD_SET_E; + LCD_DELAY_READ; + data = LCD_READ_H; + LCD_CLR_E; + LCD_DELAY_READ; + + /* Read low nibble */ + LCD_SET_E; + LCD_DELAY_READ; + data |= LCD_READ_L; + LCD_CLR_E; + LCD_DELAY_READ; + +#else /* !CONFIG_LCD_4BIT */ + + /* Read data */ + LCD_SET_E; + LCD_DELAY_READ; + data = LCD_READ; + LCD_CLR_E; + LCD_DELAY_READ; + +#endif /* !CONFIG_LCD_4BIT */ + + LCD_CLR_RD; + LCD_DB_OUT; /* Reset bus as output! */ + + return data; +} + +/* ___ __ + * RS \___________/ + * + * READ __________________ + * _______ + * ENA _____/ \____ + * + * DATA --<=============== + */ +INLINE void lcd_regWrite(uint8_t data) +{ + LCD_CLR_RS; + lcd_dataWrite(data); + LCD_SET_RS; +} + +/* __ _ + * RS \_____________/ + * ___________ + * READ ___/ \__ + * _______ + * ENA _____/ \____ + * ______ ____ + * DATA X/ \====/ + */ +INLINE uint8_t lcd_regRead(void) +{ + uint8_t data; + + LCD_CLR_RS; + data = lcd_dataRead(); + LCD_SET_RS; + return data; +} + +#if CONFIG_LCD_4BIT + +INLINE void lcd_mode4Bit(void) +{ + LCD_CLR_RS; + + LCD_WRITE_H(LCD_CMD_SETFUNC); + LCD_SET_E; + LCD_DELAY_WRITE; + LCD_CLR_E; + LCD_DELAY_WRITE; + + LCD_SET_RS; +} + +#endif /* CONFIG_LCD_4BIT */ + +#else /* ARCH_EMUL */ + +extern void Emul_LCDWriteReg(uint8_t d); +extern uint8_t Emul_LCDReadReg(void); +extern void Emul_LCDWriteData(uint8_t d); +extern uint8_t Emul_LCDReadData(void); + +#define lcd_regWrite(d) Emul_LCDWriteReg(d) +#define lcd_regRead(d) Emul_LCDReadReg() +#define lcd_dataWrite(d) Emul_LCDWriteData(d) +#define lcd_dataRead(d) Emul_LCDReadData() + +#endif /* ARCH_EMUL */ + + +/** + * Wait until the LCD busy flag clears. + */ +void lcd_waitBusy(void) +{ + for (;;) + { + uint8_t val = lcd_regRead(); + if (!(val & LCDF_BUSY)) + break; + } +} + + +/** + * Move the cursor to \a addr, only if not already there. + */ +void lcd_moveTo(uint8_t addr) +{ + if (addr != lcd_current_addr) + { + lcd_waitBusy(); + lcd_regWrite(lcd_address(addr)); + lcd_current_addr = addr; + } +} + + +/** + * Write a value in LCD data register, waiting for the busy flag. + */ +void lcd_setReg(uint8_t val) +{ + lcd_waitBusy(); + lcd_regWrite(val); +} + +#include +/** + * Write the character \a c on display address \a addr. + * + * NOTE: argh, the HD44 lcd type is a bad beast: our + * move/write -> write optimization requires this mess + * because display lines are interleaved! + */ +void lcd_putc(uint8_t addr, uint8_t c) +{ + if (addr != lcd_current_addr) + lcd_setReg(lcd_address(addr)); + + lcd_waitBusy(); + lcd_dataWrite(c); + lcd_current_addr = addr + 1; + + /* If we are at end of display wrap the address to 0 */ + if (lcd_current_addr == CONFIG_LCD_COLS * CONFIG_LCD_ROWS) + lcd_current_addr = 0; + + /* If we are at the end of a row put the cursor at the beginning of the next */ + if (!(lcd_current_addr % CONFIG_LCD_COLS)) + lcd_setReg(lcd_address(lcd_current_addr)); +} + + +/** + * Remap the glyph of a character. + * + * glyph - bitmap of 8x8 bits. + * code - must be 0-7 for the Hitachi LCD-II controller. + */ +void lcd_remapChar(const char *glyph, char code) +{ + int i; + + /* Set CG RAM address */ + lcd_setReg((uint8_t)((1<<6) | (code << 3))); + + /* Write bitmap data */ + for (i = 0; i < 8; i++) + { + lcd_waitBusy(); + lcd_dataWrite(glyph[i]); + } + + /* Move back to original address */ + lcd_setReg(lcd_address(lcd_current_addr)); +} + + +#if 0 /* unused */ +void lcd_remapfont(void) +{ + static const char lcd_glyphs[8] = + { + 0x04, 0x0E, 0x15, 0x04, 0x04, 0x04, 0x04, 0x00 /* up arrow */ + }; + int i; + + for (i = 0; i < 15; i++) + lcd_remapChar(i, bernie_char); + + + lcd_setAddr(lcd_DefLayer, 0); + for (i = 0; i < 80; i++) + lcd_putCharUnlocked(i); +} +#endif /* unused */ + +void lcd_hw_init(void) +{ + lcd_hd44_hw_bus_init(); + + timer_delay(50); + +#if CONFIG_LCD_4BIT + lcd_regWrite(LCD_CMD_SET8BIT); + lcd_mode4Bit(); + timer_delay(2); +#endif /* CONFIG_LCD_4BIT */ + + lcd_regWrite(LCD_CMD_SETFUNC); + timer_delay(2); + + lcd_regWrite(LCD_CMD_DISPLAY_ON); + timer_delay(2); + + lcd_regWrite(LCD_CMD_CLEAR); + timer_delay(2); + +#if !CONFIG_LCD_4BIT + lcd_regWrite(LCD_CMD_RESET_DDRAM); // 4 bit mode doesn't allow char reprogramming +#endif + lcd_regWrite(LCD_CMD_DISPLAYMODE); + timer_delay(2); +} + + diff --git a/bertos/drv/lcd_hd44.h b/bertos/drv/lcd_hd44.h new file mode 100644 index 0000000..b2ff8f0 --- /dev/null +++ b/bertos/drv/lcd_hd44.h @@ -0,0 +1,109 @@ +/** + * \file + * + * + * \brief Hitachi HD44780 and clones LCD module. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * $WIZ$ module_name = "lcd_hd44" + * $WIZ$ module_depends = "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_lcd_hd44.h" + * $WIZ$ module_hw = "bertos/hw/hw_lcd_hd44.h" + */ + +#ifndef DRV_LCD_HD44_H +#define DRV_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" +#include /* For stdint types */ + +/** + * \name Values for CONFIG_LCD_ROWS. + * + * Select the number of rows which are available + * on the HD44780 Display. + * $WIZ$ lcd_hd44_rows = "LCD_HD44_ROWS_2", "LCD_HD44_ROWS_4" + */ +#define LCD_HD44_ROWS_2 2 +#define LCD_HD44_ROWS_4 4 + +/** + * \name Values for CONFIG_LCD_COLS. + * + * Select the number of columns which are available + * on the HD44780 Display. + * $WIZ$ lcd_hd44_cols = "LCD_HD44_COLS_16", "LCD_HD44_COLS_20" + */ +#define LCD_HD44_COLS_16 16 +#define LCD_HD44_COLS_20 20 + +/** + * \name Hitachi HD44 commands. + * \{ + */ +#define LCD_CMD_DISPLAY_INI 0x30 + +#if CONFIG_LCD_4BIT + #define LCD_CMD_SETFUNC 0x28 /**< 4 bits, 2 lines, 5x7 dots */ +#else + #define LCD_CMD_SETFUNC 0x38 /**< 8 bits, 2 lines, 5x7 dots */ +#endif + +#define LCD_CMD_SET8BIT 0x30 +#define LCD_CMD_DISPLAY_ON 0x0F /**< Switch on display */ +#define LCD_CMD_DISPLAY_OFF 0x08 /**< Switch off display */ +#define LCD_CMD_CLEAR 0x01 /**< Clear display */ +#define LCD_CMD_CURSOR_BLOCK 0x0D /**< Show cursor (block) */ +#define LCD_CMD_CURSOR_LINE 0x0F /**< Show cursor (line) */ +#define LCD_CMD_CURSOR_OFF 0x0C /**< Hide cursor */ +#define LCD_CMD_DISPLAYMODE 0x06 +#define LCD_CMD_SET_CGRAMADDR 0x40 +#define LCD_CMD_RESET_DDRAM 0x80 +#define LCD_CMD_SET_DDRAMADDR 0x80 +#define LCD_CMD_DISPLAY_SHIFT 0x18 +#define LCD_CMD_MOVESHIFT_LEFT 0x00 +#define LCD_CMD_MOVESHIFT_RIGHT 0x04 +/*\}*/ + +/** Type for combined LCD cursor position (x,y). */ +typedef uint8_t lcdpos_t; + +void lcd_waitBusy(void); +void lcd_moveTo(uint8_t addr); +void lcd_setReg(uint8_t val); +void lcd_putc(uint8_t a, uint8_t c); +void lcd_remapChar(const char *glyph, char code); +void lcd_hw_init(void); +void lcd_hw_test(void); + +#endif /* DRV_LCD_HD44_H */ diff --git a/bertos/drv/lcd_hd44_hwtest.c b/bertos/drv/lcd_hd44_hwtest.c new file mode 100644 index 0000000..19c8d9f --- /dev/null +++ b/bertos/drv/lcd_hd44_hwtest.c @@ -0,0 +1,96 @@ +/** + * \file + * + * + * \brief LM044L type LCD hardware module (impl.) + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "lcd_hd44.h" +#include "hw/hw_lcd_hd44.h" + +#include +#include + +#warning TODO:Refactor this test to comply whit BeRTOS test policy. + +#if UNIT_TEST + +void lcd_hw_test(void) +{ + lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 3); + timer_delay(1); + kprintf("3 -> %02X\n", lcd_regRead()); + timer_delay(1); + + for (int i = 0; i < 10; i++) + { + lcd_dataWrite('c'); + timer_delay(1); + kprintf("addr = %02X\n", lcd_regRead()); + timer_delay(1); + } + + lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 0x4a); + timer_delay(1); + kprintf("4A -> %02X\n", lcd_regRead()); + timer_delay(1); + + lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 0x52); + timer_delay(1); + kprintf("52 -> %02X\n", lcd_regRead()); + timer_delay(1); + + lcd_regWrite(LCD_CMD_SET_DDRAMADDR | 0x1F); + timer_delay(1); + kprintf("1F -> %02X\n", lcd_regRead()); + timer_delay(1); +} + + + +#include +#include + +int main(void) +{ + lcd_hw_test(); + + for(;;) + { + } + + return 0; +} + +#endif diff --git a/bertos/drv/lcd_hx8347.c b/bertos/drv/lcd_hx8347.c new file mode 100644 index 0000000..b190ae9 --- /dev/null +++ b/bertos/drv/lcd_hx8347.c @@ -0,0 +1,326 @@ +/** + * \file + * + * + * \brief Himax HX8347 LCD controller driver + * + * \author Stefano Fedrigo + * + * Display initialization sequence is based on Atmel's softpack library + * implementation, see license below. + */ + +/* ---------------------------------------------------------------------------- + * ATMEL Microcontroller Software Support + * ---------------------------------------------------------------------------- + * Copyright (c) 2010, Atmel Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the disclaimer below. + * + * Atmel's name may not be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- + */ + +#include "lcd_hx8347.h" + +#include "hw/hw_hx8347.h" +#include +#include + +// Himax HX8347 chip id +#define HX8347_ID_HIMAX 0x47 + + +static uint16_t lcd_row[LCD_WIDTH]; + + +struct lcd_hx8347_reg +{ + uint8_t cmd; // Register index, if 0xFF wait for value ms + uint8_t data; // Register value +}; + +static const struct lcd_hx8347_reg init_seq[] = +{ + // Start internal OSC + { 0x19, 0x49 }, // OSCADJ=10 0000, OSD_EN=1 //60Hz + { 0x93, 0x0C }, // RADJ=1100 + + // Power on flow + { 0x44, 0x4D }, // VCM=100 1101 + { 0x45, 0x11 }, // VDV=1 0001 + { 0x20, 0x40 }, // BT=0100 + { 0x1D, 0x07 }, // VC1=111 + { 0x1E, 0x00 }, // VC3=000 + { 0x1F, 0x04 }, // VRH=0100 + + { 0x1C, 0x04 }, // AP=100 + { 0x1B, 0x10 }, // GASENB=0, PON=1, DK=0, XDK=0, DDVDH_TRI=0, STB=0 + { 0xFF, 50 }, // 50 ms delay + + { 0x43, 0x80 }, // Set VCOMG=1 + { 0xFF, 50 }, // 50 ms delay + +#if 0 + // Gamma for CMO 2.8 + { 0x46, 0x95 }, + { 0x47, 0x51 }, + { 0x48, 0x00 }, + { 0x49, 0x36 }, + { 0x4A, 0x11 }, + { 0x4B, 0x66 }, + { 0x4C, 0x14 }, + { 0x4D, 0x77 }, + { 0x4E, 0x13 }, + { 0x4F, 0x4C }, + { 0x50, 0x46 }, + { 0x51, 0x46 }, +#endif + + // 240x320 window setting + { 0x02, 0x00 }, // Column address start2 + { 0x03, 0x00 }, // Column address start1 + { 0x04, 0x00 }, // Column address end2 + { 0x05, 0xEF }, // Column address end1 + { 0x06, 0x00 }, // Row address start2 + { 0x07, 0x00 }, // Row address start1 + { 0x08, 0x01 }, // Row address end2 + { 0x09, 0x3F }, // Row address end1 + + // Display Setting + { 0x01, 0x06 }, // IDMON=0, INVON=1, NORON=1, PTLON=0 +// { 0x16, 0xC8 }, // MY=1, MX=1, MV=0, BGR=1 + { 0x16, 0x68 }, // MY=0, MX=1, MV=1, RGB XY exchange X mirror + { 0x23, 0x95 }, // N_DC=1001 0101 + { 0x24, 0x95 }, // P_DC=1001 0101 + { 0x25, 0xFF }, // I_DC=1111 1111 + { 0x27, 0x06 }, // N_BP=0000 0110 + { 0x28, 0x06 }, // N_FP=0000 0110 + { 0x29, 0x06 }, // P_BP=0000 0110 + { 0x2A, 0x06 }, // P_FP=0000 0110 + { 0x2C, 0x06 }, // I_BP=0000 0110 + { 0x2D, 0x06 }, // I_FP=0000 0110 + { 0x3A, 0x01 }, // N_RTN=0000, N_NW=001 + { 0x3B, 0x01 }, // P_RTN=0000, P_NW=001 + { 0x3C, 0xF0 }, // I_RTN=1111, I_NW=000 + { 0x3D, 0x00 }, // DIV=00 + { 0x3E, 0x38 }, // SON=38h + { 0x40, 0x0F }, // GDON=0Fh + { 0x41, 0xF0 }, // GDOF=F0h +}; + +/* + * Write to an LCD register. + */ +static void regWrite(uint8_t reg, uint16_t val) +{ + hx8347_cmd(reg); + hx8347_write(val); +} + +/* + * Read data from a LCD register. + */ +static uint16_t regRead(uint8_t reg) +{ + hx8347_cmd(reg); + return hx8347_read(); +} + +/* + * Write data in a buffer to the LCD controller. + */ +static void bufferWrite(const uint16_t *buf, uint16_t size) +{ + uint16_t i; + for (i = 0 ; i < size; ++i) + hx8347_write(buf[i]); +} + +static void lcd_setCursor(uint16_t x, uint16_t y) +{ + regWrite(0x02, x >> 8); + regWrite(0x03, x & 0xff); + regWrite(0x06, y >> 8); + regWrite(0x07, y & 0xff); +} + +static void lcd_setWindow(uint16_t x, uint16_t y, uint16_t width, uint16_t height) +{ + ASSERT(x + width <= LCD_WIDTH); + ASSERT(y + height <= LCD_HEIGHT); + ASSERT(width > 0); + ASSERT(height > 0); + + // Window right and bottom limits are inclusive + width--; + height--; + + lcd_setCursor(x, y); + + regWrite(0x04, (x + width) >> 8); + regWrite(0x05, (x + width) & 0xff); + regWrite(0x08, (y + height) >> 8); + regWrite(0x09, (y + height) & 0xff); +} + +/* + * Refresh a bitmap on screen + */ +void lcd_hx8347_blitBitmap(const Bitmap *bm) +{ + uint8_t mask; + int i, l, r; + + lcd_setWindow(0, 0, bm->width, bm->height); + hx8347_cmd(0x22); + + for (l = 0; l < bm->height / 8; l++) + { + for (mask = 1; mask; mask <<= 1) + { + for (i = 0; i < bm->width; i++) + { + if (bm->raster[l * bm->width + i] & mask) + lcd_row[i] = 0x0000; + else + lcd_row[i] = 0xFFFF; + } + bufferWrite(lcd_row, bm->width); + } + } + + for (r = 0, mask = 1; r < bm->height % 8; r++, mask <<= 1) + { + for (i = 0; i < bm->width; i++) + { + if (bm->raster[l * bm->width + i] & mask) + lcd_row[i] = 0x0000; + else + lcd_row[i] = 0xFFFF; + } + bufferWrite(lcd_row, bm->width); + } +} + +/* + * Blit a 24 bit color raw raster directly on screen + */ +void lcd_hx8347_blitBitmap24(int x, int y, int width, int height, const char *bmp) +{ + int l, r; + + lcd_setWindow(x, y, width, height); + hx8347_cmd(0x22); + + for (l = 0; l < height; l++) + { + for (r = 0; r < width; r++) + { + lcd_row[r] = + (((uint16_t)bmp[0] << 8) & 0xF800) | + (((uint16_t)bmp[1] << 3) & 0x07E0) | + (((uint16_t)bmp[2] >> 3) & 0x001F); + bmp += 3; + } + bufferWrite(lcd_row, width); + } +} + +/** + * Turn off display. + */ +void lcd_hx8347_off(void) +{ + regWrite(0x90, 0); // SAP=0000 0000 + regWrite(0x26, 0); // GON=0, DTE=0, D=00 +} + +/** + * Turn on display. + */ +void lcd_hx8347_on(void) +{ + regWrite(0x90, 0x7F); // SAP=0111 1111 + regWrite(0x26, 0x04); // GON=0, DTE=0, D=01 + timer_delay(100); + regWrite(0x26, 0x24); // GON=1, DTE=0, D=01 + regWrite(0x26, 0x2C); // GON=1, DTE=0, D=11 + timer_delay(100); + regWrite(0x26, 0x3C); // GON=1, DTE=1, D=11 +} + +/** + * Display initialization. + */ +void lcd_hx8347_init(void) +{ + unsigned i; + uint16_t chip_id; + + hx8347_busInit(); + lcd_hx8347_off(); + + // Check chip id + if ((chip_id = regRead(0x67)) != HX8347_ID_HIMAX) + { + kprintf("HX8347 chip id read error or wrong id (0x%x), skipping initialization.\n", chip_id); + return; + } + + for (i = 0; i < countof(init_seq); i++) + { + if (init_seq[i].cmd != 0xFF) + regWrite(init_seq[i].cmd, init_seq[i].data); + else + timer_delay(init_seq[i].data); + } + + lcd_hx8347_on(); +} diff --git a/bertos/drv/lcd_hx8347.h b/bertos/drv/lcd_hx8347.h new file mode 100644 index 0000000..d5851f5 --- /dev/null +++ b/bertos/drv/lcd_hx8347.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief Himax HX8347 LCD controller driver + * + * \author Stefano Fedrigo + * + * $WIZ$ module_name = "lcd_hx8347" + * $WIZ$ module_hw = "bertos/hw/hw_hx8347.h" + * $WIZ$ module_depends = "timer" + */ + +#ifndef LCD_HX8347_H +#define LCD_HX8347_H + +#include /* Bitmap */ + +#include + +#define LCD_WIDTH 320 +#define LCD_HEIGHT 240 + +void lcd_hx8347_init(void); +void lcd_hx8347_on(void); +void lcd_hx8347_off(void); +void lcd_hx8347_blitBitmap(const Bitmap *bm); +void lcd_hx8347_blitBitmap24(int x, int y, int width, int height, const char *bmp); + +#endif /* LCD_HX8347_H */ diff --git a/bertos/drv/lcd_ili9225.c b/bertos/drv/lcd_ili9225.c new file mode 100644 index 0000000..e3112df --- /dev/null +++ b/bertos/drv/lcd_ili9225.c @@ -0,0 +1,304 @@ +/** + * \file + * + * + * \brief ILI9225B 4 wire interface graphic driver + * + * \author Stefano Fedrigo + * + * Display initialization sequence is based on Atmel's softpack library + * implementation, see license below. + */ + +/* ---------------------------------------------------------------------------- + * ATMEL Microcontroller Software Support + * ---------------------------------------------------------------------------- + * Copyright (c) 2010, Atmel Corporation + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * - Redistributions of source code must retain the above copyright notice, + * this list of conditions and the disclaimer below. + * + * Atmel's name may not be used to endorse or promote products derived from + * this software without specific prior written permission. + * + * DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE + * DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, + * OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, + * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * ---------------------------------------------------------------------------- + */ + +#include "lcd_ili9225.h" + +#include "hw/hw_ili9225.h" + +#include +#include +#include + + +static struct KFile *spi; + +/* + * Display row buffer. When refreshing display one full row of + * graphics data is transferred with DMA, to speed up transfer and + * reduce CPU usage. + */ +static uint16_t lcd_row[LCD_WIDTH]; + + +struct lcd_ili9225_reg +{ + uint8_t cmd; // Register index, if 0xFF wait for value ms + uint16_t data; // Register value +}; + +static const struct lcd_ili9225_reg init_seq[] = +{ + {0x01, 0x011c}, // Set SS, SM, GS and NL bits + {0x02, 0x0100}, // Set 1 line inversion + {0x03, 0x1030}, // Entry Mode set GRAM write direction and BGR=1 + {0x08, 0x0808}, // Set BP and FP + {0x0C, 0x0001}, // RGB Input Interface Control: 16-bit RGB interface + {0x0F, 0x0A01}, // Set frame rate: 83Hz + {0x20, LCD_WIDTH}, // Set GRAM Address + {0x21, LCD_HEIGHT}, // Set GRAM Address + + /* power on sequence */ + {0x10, 0x0A00}, // Set asp DSTB,STB + {0x11, 0x1038}, // SET APON PON AON VCI1EN VC + {0xFF, 50}, // Wait 50 ms + + {0x12, 0x1121}, // Internal reference voltage = VCI + {0x13, 0x06CE}, // Set GVDD + {0x14, 0x676F}, // Set VCOMH/VCOML voltage + + // Set gram area + {0x30, 0x0000}, + {0x31, 0x00DB}, + {0x32, 0x0000}, + {0x33, 0x0000}, + {0x34, 0x00DB}, + {0x35, 0x0000}, + {0x36, LCD_WIDTH}, + {0x37, 0x0000}, + {0x38, LCD_HEIGHT}, + {0x39, 0x0000}, + + // Set gamma curve + {0x50, 0x0000}, + {0x51, 0x060A}, + {0x52, 0x0D0A}, + {0x53, 0x0303}, + {0x54, 0x0A0D}, + {0x55, 0x0A06}, + {0x56, 0x0000}, + {0x57, 0x0303}, + {0x58, 0x0000}, + {0x59, 0x0000}, +}; + +static void lcd_cmd(uint8_t cmd) +{ + LCD_CS_LOW(); + LCD_RS_LOW(); + kfile_write(spi, &cmd, sizeof(cmd)); +} + +static void lcd_data(uint16_t *data, size_t count) +{ + kfile_flush(spi); + LCD_RS_HIGH(); + kfile_write(spi, data, count*2); + kfile_flush(spi); + LCD_CS_HIGH(); +} + +static void lcd_regWrite(uint8_t reg, uint16_t data) +{ + uint16_t word = cpu_to_be16(data); + + lcd_cmd(reg); + lcd_data(&word, 1); +} + +static void lcd_startBlit(uint8_t x, uint8_t y, uint8_t width, uint8_t height) +{ + ASSERT((x + width) <= LCD_WIDTH); + ASSERT((y + height) <= LCD_HEIGHT); + + lcd_regWrite(0x36, x + width); + lcd_regWrite(0x37, x); + lcd_regWrite(0x38, y + height); + lcd_regWrite(0x39, y); + + lcd_regWrite(0x20, x); + lcd_regWrite(0x21, y); +} + +/* + * Refresh a raw image on screen + */ +void lcd_ili9225_blitRaw(UNUSED_ARG(const uint8_t *, data), + uint8_t x, uint8_t y, uint8_t width, uint8_t height) +{ + lcd_startBlit(x, y, width, height); + // TODO +} + +/* + * Refresh a bitmap on screen + */ +void lcd_ili9225_blitBitmap(const Bitmap *bm) +{ + uint8_t mask; + int i, l, r; + + lcd_startBlit(0, 0, bm->width, bm->height); + + for (l = 0; l < bm->height / 8; l++) + { + for (mask = 1; mask; mask <<= 1) + { + for (i = 0; i < bm->width; i++) + { + if (bm->raster[l * bm->width + i] & mask) + lcd_row[i] = 0x0000; + else + lcd_row[i] = 0xFFFF; + } + lcd_cmd(0x22); + lcd_data(lcd_row, bm->width); + } + } + + for (r = 0, mask = 1; r < bm->height % 8; r++, mask <<= 1) + { + for (i = 0; i < bm->width; i++) + { + if (bm->raster[l * bm->width + i] & mask) + lcd_row[i] = 0x0000; + else + lcd_row[i] = 0xFFFF; + } + lcd_cmd(0x22); + lcd_data(lcd_row, bm->width); + } +} + +/* + * Blit a 24 bit color raw raster directly on screen + */ +void lcd_ili9225_blitBitmap24(int x, int y, int width, int height, const char *bmp) +{ + int l, r; + + lcd_startBlit(x, y, width, height); + + for (l = 0; l < height; l++) + { + for (r = 0; r < width; r++) + { + lcd_row[r] = + (((uint16_t)bmp[1] << 11) & 0xE000) | + (((uint16_t)bmp[2] << 5) & 0x1F00) | + (((uint16_t)bmp[0] << 0) & 0x00F8) | + (((uint16_t)bmp[1] >> 5) & 0x0007); + bmp += 3; + } + + lcd_cmd(0x22); + lcd_data(lcd_row, width); + } +} + +/** + * Turn off display. + */ +void lcd_ili9225_off(void) +{ + lcd_regWrite(0x07, 0x0000); +} + +/** + * Turn on display. + */ +void lcd_ili9225_on(void) +{ + lcd_regWrite(0x07, 0x1017); +} + +/** + * Reset display. + */ +static void lcd_reset(void) +{ + LCD_RESET_LOW(); + timer_delay(20); + LCD_RESET_HIGH(); + timer_delay(50); +} + +/** + * Display initialization. + */ +void lcd_ili9225_init(struct KFile *_spi) +{ + unsigned i; + + ASSERT(_spi); + spi = _spi; + lcd_ili9225_hw_bus_init(); + + lcd_reset(); + lcd_ili9225_off(); + + for (i = 0; i < countof(init_seq); i++) + { + if (init_seq[i].cmd != 0xFF) + lcd_regWrite(init_seq[i].cmd, init_seq[i].data); + else + timer_delay(init_seq[i].data); + } + + lcd_ili9225_on(); +} diff --git a/bertos/drv/lcd_ili9225.h b/bertos/drv/lcd_ili9225.h new file mode 100644 index 0000000..3be2f41 --- /dev/null +++ b/bertos/drv/lcd_ili9225.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief ILI9225B 4 wire interface graphic driver + * + * $WIZ$ module_name = "lcd_ili9225" + * $WIZ$ module_hw = "bertos/hw/hw_ili9225.h" + * $WIZ$ module_depends = "timer", "kfile" + */ + +#ifndef LCD_ILI9225_H +#define LCD_ILI9225_H + +#include /* Bitmap */ + +#include + +#define LCD_WIDTH 176 +#define LCD_HEIGHT 220 + +// Fwd decl +struct KFile; + +void lcd_ili9225_init(struct KFile *spi); +void lcd_ili9225_on(void); +void lcd_ili9225_off(void); +void lcd_ili9225_blitRaw(const uint8_t *data, + uint8_t x, uint8_t y, uint8_t width, uint8_t height); +void lcd_ili9225_blitBitmap(const Bitmap *bm); +void lcd_ili9225_blitBitmap24(int x, int y, int width, int height, const char *bmp); + +#endif /* LCD_ILI9225_H */ diff --git a/bertos/drv/lcd_lm44_qt.cpp b/bertos/drv/lcd_lm44_qt.cpp new file mode 100644 index 0000000..d0ce519 --- /dev/null +++ b/bertos/drv/lcd_lm44_qt.cpp @@ -0,0 +1,361 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Custom Qt widget for emulating a graphics LCD display (implementation) + */ + +/*#* + *#* $Log$ + *#* Revision 1.1 2006/01/16 03:51:35 bernie + *#* Add LCD Qt emulator. + *#* + *#*/ + +#include +#include +#include +#include +#include "EmulLCD.h" +#include "Emul.h" + + +// Display colors +#define LCD_FG_COLOR 0x0, 0x0, 0x0 +#define LCD_BG_COLOR 0xBB, 0xCC, 0xBB + + +EmulLCD::EmulLCD(QWidget *parent, const char *name) : + QFrame(parent, name, WRepaintNoErase | WResizeNoErase), + lcd_font("courier", 18), + fg_color(LCD_FG_COLOR), + bg_color(LCD_BG_COLOR), + cr_row(0), + cr_col(0), + cgramaddr(-1), + show_cursor(true) +{ + // initialize DDRAM + memcpy(ddram, + "01234567890123456789" + "abcdefghijhlmnopqrst" + "ABCDEFGHIJKLMNOPQRST" + "!@#$%^&*()_+|{}':?><", + sizeof(ddram)); + + // setup font + lcd_font.setFixedPitch(true); + setFont(lcd_font); + + // get exact font size + QFontMetrics fm(lcd_font); + font_width = fm.width(QChar(' ')); + font_height = fm.height(); + + // set widget frame + setFrameStyle(QFrame::Panel | QFrame::Sunken); +// setLineWidth(2); + frame_width = frameWidth(); +} + + +EmulLCD::~EmulLCD() +{ + // nop +} + + +QSizePolicy EmulLCD::sizePolicy() const +{ + return QSizePolicy(QSizePolicy::Fixed, QSizePolicy::Fixed, false); +} + + +QSize EmulLCD::sizeHint() const +{ + return QSize( + font_width * COLS + frame_width * 2, + font_height * ROWS + frame_width * 2); +} + + +void EmulLCD::drawContents(QPainter *p) +{ + RedrawText(*p); +} + + +void EmulLCD::SetPainter(QPainter & p) +{ + p.setBackgroundMode(OpaqueMode); + p.setPen(fg_color); + p.setBackgroundColor(bg_color); +} + + +void EmulLCD::RedrawText(QPainter & p) +{ + int r, c; + + SetPainter(p); + + for (r = 0; r < ROWS; r++) + for (c = 0; c < COLS; c++) + PrintChar(p, r, c); +} + + +void EmulLCD::PrintChar(QPainter & p, int row, int col) +{ + // Fetch char from DD RAM + unsigned char c = ddram[row][col]; + + // Map some Hitachi characters to ISO Latin1 + switch(c) + { + case 0xDF: + c = 0xBA; // "degrees" glyph + break; + + case 0xE4: + c = 0xB5; // "micro" glyph + break; + + default: // all others + break; + } + + // Draw char on display + int x = col * font_width + frame_width; + int y = row * font_height + frame_width; + bool restore_colors = false; + + if (show_cursor && (row == cr_row) && (col == cr_col)) + { + // Exchange FG/BG colors + p.setPen(bg_color); + p.setBackgroundColor(fg_color); + restore_colors = true; + } + + p.drawText(x, y, x + font_width, y + font_height, 0 /*tf*/, + QString(QChar(c)), 1); + + if (restore_colors) + { + // Restore FG/BG colors + p.setPen(fg_color); + p.setBackgroundColor(bg_color); + } +} + + +void EmulLCD::MoveCursor(int r, int c) +{ + // Save old cursor position + int old_row = cr_row; + int old_col = cr_col; + + // Move the cursor + cgramaddr = -1; + cr_row = r; + cr_col = c; + + if (show_cursor && (old_col != cr_col || old_row != cr_row)) + { + QPainter p(this); + SetPainter(p); + + // Draw new cursor + PrintChar(p, cr_row, cr_col); + + // Erase old cursor + PrintChar(p, old_row, old_col); + } +} + + +void EmulLCD::ShowCursor(bool show) +{ + show_cursor = show; + + // Draw (or erase) cursor + QPainter p(this); + SetPainter(p); + PrintChar(p, cr_row, cr_col); +} + + +void EmulLCD::AdvanceCursor() +{ + // Move the cursor + if (cr_col == COLS - 1) + { + if (cr_row == ROWS - 1) + MoveCursor(0, 0); + else + MoveCursor(cr_row + 1, 0); + } + else + MoveCursor(cr_row, cr_col + 1); +} + + +void EmulLCD::PutChar(unsigned char c) +{ + if (cgramaddr != -1) + { + // Write data in CGRAM + cgram[cgramaddr] = c; + + // Auto increment CGRAM address + cgramaddr = (cgramaddr + 1) & 0x3F; + } + else + { + // Writing in DDRAM + ddram[cr_row][cr_col] = c; + + // Update display + { + QPainter p(this); + SetPainter(p); + PrintChar(p, cr_row, cr_col); + } + AdvanceCursor(); + } +} + + +char EmulLCD::GetChar() +{ + char c = ddram[cr_row][cr_col]; + AdvanceCursor(); + return c; +} + + +void EmulLCD::Clear() +{ + memset(ddram, ' ', sizeof(ddram)); + cr_row = cr_col = 0; + + QPainter p(this); + RedrawText(p); +} + + +void EmulLCD::SetCGRamAddr(unsigned char addr) +{ + cgramaddr = addr & (sizeof(cgram) - 1); +} + + +// Hitachi LM044L register-level emulation + +#define INI_DISPLAY 0x30 +#define INI_OP_DISP 0x38 /* 8 bits, 2 lines, 5x7 dots */ +#define ON_DISPLAY 0x0F /* Switch on display */ +#define OFF_DISPLAY 0x08 /* Switch off display */ +#define CLR_DISPLAY 0x01 /* Clear display */ +#define CURSOR_BLOCK 0x0D /* Show cursor (block) */ +#define CURSOR_LINE 0x0F /* Show cursor (line) */ +#define CURSOR_OFF 0x0C /* Hide cursor */ +#define MODE_DISPL 0x06 +#define SHIFT_DISPLAY 0x18 +#define MOVESHIFT_LEFT 0x00 +#define MOVESHIFT_RIGHT 0x04 +#define LCD_CGRAMADDR (1<<6) +#define LCD_DDRAMADDR (1<<7) + + +extern "C" void Emul_LCDWriteReg(unsigned char d) +{ + static const unsigned char lcd_rowaddress[EmulLCD::ROWS] = { 0x80, 0xC0, 0x94, 0xD4 }; + + switch(d) + { + case CLR_DISPLAY: + emul->emulLCD->Clear(); + break; + + case CURSOR_BLOCK: + case CURSOR_LINE: + emul->emulLCD->ShowCursor(true); + break; + + case CURSOR_OFF: + emul->emulLCD->ShowCursor(false); + break; + + default: + // Set DDRAM address? + if (d & LCD_DDRAMADDR) + { + for (int i = 0; i < EmulLCD::ROWS; i++) + { + if ((d >= lcd_rowaddress[i]) && (d < lcd_rowaddress[i] + EmulLCD::COLS)) + { + emul->emulLCD->MoveCursor(i, d - lcd_rowaddress[i]); + break; + } + } + } + else if (d & LCD_CGRAMADDR) + emul->emulLCD->SetCGRamAddr(d); + break; + } +} + + +extern "C" unsigned char Emul_LCDReadReg(void) +{ + return 0; /* This LCD model is never busy ;-) */ +} + + +extern "C" void Emul_LCDWriteData(unsigned char d) +{ + emul->emulLCD->PutChar(d); +} + + +extern "C" unsigned char Emul_LCDReadData(void) +{ + return emul->emulLCD->GetChar(); +} + +#include "EmulLCD.moc" + diff --git a/bertos/drv/lcd_lm44_qt.h b/bertos/drv/lcd_lm44_qt.h new file mode 100644 index 0000000..e2886b1 --- /dev/null +++ b/bertos/drv/lcd_lm44_qt.h @@ -0,0 +1,101 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Custom Qt widget for emulating a graphics LCD display (implementation) + */ + +#ifndef EMULLCD_H +#define EMULLCD_H + +#include +#include +#include + +// fwd decls +class QSizePolicy; +class QPaintEvent; +class QResizeEvent; + +/** + * Qt widget to emulate a dot-matrix LCD display. + */ +class EmulLCD : public QFrame +{ + Q_OBJECT + +public: +// Attributes + enum { COLS = 20, ROWS = 4 }; + +// Construction + EmulLCD(QWidget *parent = 0, const char *name = 0); + virtual ~EmulLCD(); + +// Base class overrides +protected: + virtual QSizePolicy sizePolicy() const; + virtual QSize sizeHint() const; + virtual void drawContents(QPainter *p); + +// Operations +public: + void MoveCursor (int col, int row); + void ShowCursor (bool show = true); + void PutChar (unsigned char c); + char GetChar (); + void Clear (); + void SetCGRamAddr (unsigned char addr); + +// Implementation +protected: + void SetPainter(QPainter & p); + void RedrawText(QPainter & p); + void PrintChar(QPainter & p, int row, int col); + void AdvanceCursor(); + + QFont lcd_font; ///< Display character font + QColor fg_color, bg_color; ///< LCD colors + int font_width, font_height; ///< Font dimensions + int frame_width; ///< Frame width (and height) + int cr_row, cr_col; ///< Cursor position + int cgramaddr; ///< CGRAM Address (-1 disabled) + unsigned char ddram[ROWS][COLS];///< Display data RAM + unsigned char cgram[8*8]; ///< CGRAM + bool show_cursor; ///< Cursor enabled? +}; + +#endif // !defined(EMULLCD_H) + diff --git a/bertos/drv/lcd_rit128x96.c b/bertos/drv/lcd_rit128x96.c new file mode 100644 index 0000000..f917cbb --- /dev/null +++ b/bertos/drv/lcd_rit128x96.c @@ -0,0 +1,211 @@ +/** + * \file + * + * + * \brief OLED-RIT-128x96 (P14201) graphic display driver + * + * \author Andrea Righi + */ + +#include "lcd_rit128x96.h" + +#include "hw/hw_rit128x96.h" + +#include +#include + + +/* + * Hard-coded command initialization sequence. + * + * NOTE: the first byte is the size of the command. + */ +static const uint8_t init_cmd[] = +{ + /* Unlock commands */ + 3, 0xfd, 0x12, 0xe3, + /* Display off */ + 2, 0xae, 0xe3, + /* Icon off */ + 3, 0x94, 0, 0xe3, + /* Multiplex ratio */ + 3, 0xa8, 95, 0xe3, + /* Contrast */ + 3, 0x81, 0xb7, 0xe3, + /* Pre-charge current */ + 3, 0x82, 0x3f, 0xe3, + /* Display Re-map */ + 3, 0xa0, 0x52, 0xe3, + /* Display Start Line */ + 3, 0xa1, 0, 0xe3, + /* Display Offset */ + 3, 0xa2, 0x00, 0xe3, + /* Display Mode Normal */ + 2, 0xa4, 0xe3, + /* Phase Length */ + 3, 0xb1, 0x11, 0xe3, + /* Frame frequency */ + 3, 0xb2, 0x23, 0xe3, + /* Front Clock Divider */ + 3, 0xb3, 0xe2, 0xe3, + /* Set gray scale table */ + 17, 0xb8, 1, 2, 3, 4, 5, 6, 8, 10, 12, 14, 16, 19, 22, 26, 30, 0xe3, + /* Second pre-charge period */ + 3, 0xbb, 0x01, 0xe3, + /* Pre-charge voltage */ + 3, 0xbc, 0x3f, 0xe3, + /* Display ON */ + 2, 0xaf, 0xe3, +}; + +/* + * Hard-coded command shutdown sequence. + */ +static const uint8_t exit_cmd[] = +{ + /* Display OFF */ + 0xae, 0xe3 +}; + +/* + * Hard-coded horizontal increment command. + */ +static const uint8_t horizontal_inc[] = +{ + 0xa0, 0x52 +}; + +/** + * Write a sequence of data bytes to the LCD controller + */ +static void lcd_dataWrite(const uint8_t *buf, size_t count) +{ + while (count--) + LCD_WRITE(*buf++); +} + +/* Turn on the OLED display */ +void rit128x96_on(void) +{ + unsigned int i; + + /* Loop through the SSD1329 controller initialization sequence */ + LCD_SET_COMMAND(); + for (i = 0; i < sizeof(init_cmd); i += init_cmd[i] + 1) + lcd_dataWrite(init_cmd + i + 1, init_cmd[i] - 1); +} + +/* Turn off the OLED display */ +void rit128x96_off(void) +{ + LCD_SET_COMMAND(); + lcd_dataWrite(exit_cmd, sizeof(exit_cmd)); +} + +static void lcd_start_blit(uint8_t x, uint8_t y, uint8_t width, uint8_t height) +{ + uint8_t buffer[3]; + + ASSERT((x + width) <= LCD_WIDTH); + ASSERT((y + height) <= LCD_HEIGHT); + + /* Enter command mode */ + LCD_SET_COMMAND(); + + buffer[0] = 0x15; + buffer[1] = x / 2; + buffer[2] = (x + width - 2) / 2; + lcd_dataWrite(buffer, 3); + + buffer[0] = 0x75; + buffer[1] = y; + buffer[2] = y + height - 1; + lcd_dataWrite(buffer, 3); + lcd_dataWrite((const uint8_t *)&horizontal_inc, sizeof(horizontal_inc)); +} + +/* Refresh a raw image on screen */ +void rit128x96_blitRaw(const uint8_t *data, + uint8_t x, uint8_t y, uint8_t width, uint8_t height) +{ + lcd_start_blit(x, y, width, height); + /* + * Enter data mode and send the encoded image data to the OLED display, + * over the SSI bus. + */ + LCD_SET_DATA(); + while (height--) + { + /* Write an entire row at once */ + lcd_dataWrite(data, width / 2); + data += width / 2; + } +} + +/* Refresh a bitmap on screen */ +void rit128x96_blitBitmap(const Bitmap *bm) +{ + uint8_t lcd_row[bm->width / 2]; + uint8_t mask; + int i, l; + + lcd_start_blit(0, 0, bm->width, bm->height); + /* + * Enter data mode and send the encoded image data to the OLED display, + * over the SSI bus. + */ + LCD_SET_DATA(); + for (l = 0; l < bm->height / 8; l++) + { + for (mask = 1; mask; mask <<= 1) + { + for (i = 0; i < bm->width; i++) + { + if (bm->raster[l * bm->width + i] & mask) + lcd_row[i / 2] |= i & 1 ? 0x0f : 0xf0; + else + lcd_row[i / 2] &= i & 1 ? 0xf0 : 0x0f; + } + /* Write an entire row at once */ + lcd_dataWrite(lcd_row, sizeof(lcd_row)); + } + } +} + +/* Initialize the OLED display */ +void rit128x96_init(void) +{ + /* Initialize the communication bus */ + lcd_rit128x96_hw_bus_init(); + + /* Turn on the OLED display */ + rit128x96_on(); +} diff --git a/bertos/drv/lcd_rit128x96.h b/bertos/drv/lcd_rit128x96.h new file mode 100644 index 0000000..04b8e38 --- /dev/null +++ b/bertos/drv/lcd_rit128x96.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief OLED-RIT-128x96 (P14201) graphic display driver + * + * $WIZ$ module_name = "lcd_rit128x96" + * $WIZ$ module_hw = "bertos/hw/hw_rit128x96.h" + */ + +#ifndef LCD_LM3S_H +#define LCD_LM3S_H + +#include /* Bitmap */ + +#include + +#define LCD_WIDTH 128 +#define LCD_HEIGHT 96 + +void rit128x96_blitRaw(const uint8_t *data, + uint8_t x, uint8_t y, uint8_t width, uint8_t height); +void rit128x96_blitBitmap(const Bitmap *bm); +void rit128x96_on(void); +void rit128x96_off(void); +void rit128x96_init(void); + +#endif /* LCD_LM3S_H */ diff --git a/bertos/drv/lcd_text.c b/bertos/drv/lcd_text.c new file mode 100644 index 0000000..ff48077 --- /dev/null +++ b/bertos/drv/lcd_text.c @@ -0,0 +1,458 @@ +/** + * \file + * + * + * \brief Generic text LCD driver (impl.). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "lcd_text.h" +#include "lcd_hd44.h" + +#include // BV() +#include + +#include // timer_delay() + +#include // _formatted_write() +#include // LIST_EMPTY() + +#include // strlen() + + +/** Maximum number of layers. */ +#define LCD_LAYERS 6 + +#if CONFIG_KERN + #include + /** Semaphore to arbitrate access to the display. */ + static struct Semaphore lcd_semaphore; + #define LOCK_LCD sem_obtain(&lcd_semaphore) + #define UNLOCK_LCD sem_release(&lcd_semaphore) +#else /* !CONFIG_KERN */ + #define LOCK_LCD do {} while (0) + #define UNLOCK_LCD do {} while (0) +#endif /* !CONFIG_KERN */ + +DECLARE_LIST_TYPE(Layer); + +Layer *lcd_DefLayer; +static Layer lcd_LayersPool[LCD_LAYERS]; +static LIST_TYPE(Layer) lcd_Layers; +static LIST_TYPE(Layer) lcd_FreeLayers; + +/** + * Current cursor status. + * + * One of LCD_CMD_CURSOR_OFF, LCD_CMD_CURSOR_BLOCK or LCD_CMD_CURSOR_LINE. + */ +static uint8_t lcd_CursorStatus; + +/** Current cursor position, encoded as a Cursor position and status. */ +static lcdpos_t lcd_CursorAddr; + + +void lcd_setAddr(Layer *layer, lcdpos_t addr) +{ + /* Sanity check: wrap around to display limits */ + while (addr >= CONFIG_LCD_ROWS * CONFIG_LCD_COLS) + addr -= CONFIG_LCD_ROWS * CONFIG_LCD_COLS; + + layer->addr = addr; +} + +#if CONFIG_KERN + +void lcd_lock(void) +{ + LOCK_LCD; +} + + +void lcd_unlock(void) +{ + UNLOCK_LCD; +} + +#endif /* CONFIG_KERN */ + + +/** + * Write one character to the display at the current + * cursor prosition, then move the cursor right. The + * cursor is wrapped to the next line when it moves + * beyond the end of the current line. + * + * \note Does _NOT_ lock the display semaphore. + */ +static void lcd_putCharUnlocked(char c, Layer *layer) +{ + Layer *l2; + lcdpos_t addr = layer->addr; + + /* Store character in layer buffer */ + layer->buf[addr] = c; + + /* Move to next character */ + if (++layer->addr >= CONFIG_LCD_COLS * CONFIG_LCD_ROWS) + layer->addr = 0; + + /* Do not write on LCD if layer is hidden. */ + if (layer->pri == LAYER_HIDDEN) + return; + + /* + * Check if this location is obscured by + * other layers above us. + */ + for (l2 = layer->pred; l2->pred; l2 = l2->pred) + { + if (l2->buf[addr]) + { + /* DB(kprintf("layer %04x obs %04x at %d\n", l2, layer, addr);) */ + return; + } + } + + /* Write character */ + if (c) + lcd_putc(addr, c); + else + /* FIXME: should look for layers beneath! */ + lcd_putc(addr, ' '); +} + + +void lcd_putChar(char c, Layer *layer) +{ + LOCK_LCD; + lcd_putCharUnlocked(c, layer); + UNLOCK_LCD; +} + +void lcd_layerSet(Layer *layer, char c) +{ + int i; + + LOCK_LCD; + lcd_setAddr(layer, 0); + for (i = 0; i < CONFIG_LCD_COLS * CONFIG_LCD_ROWS; i++) + lcd_putCharUnlocked(c, layer); + UNLOCK_LCD; +} + + +void lcd_clear(Layer *layer) +{ + lcd_layerSet(layer, 0); +} + + +void lcd_clearLine(Layer *layer, int y) +{ + int i; + + LOCK_LCD; + lcd_setAddr(layer, LCD_POS(0, y)); + for (i = 0; i < CONFIG_LCD_COLS; i++) + lcd_putCharUnlocked(0, layer); + UNLOCK_LCD; +} + + +void lcd_moveCursor(lcdpos_t addr) +{ + LOCK_LCD; + lcd_moveTo(addr); + UNLOCK_LCD; +} + + +char lcd_setCursor(char mode) +{ + static const char cursor_cmd[3] = + { + LCD_CMD_CURSOR_OFF, LCD_CMD_CURSOR_BLOCK, LCD_CMD_CURSOR_LINE + }; + char oldmode = lcd_CursorStatus; + + LOCK_LCD; + lcd_CursorStatus = mode; + lcd_setReg(cursor_cmd[(int)mode]); + if (mode) + lcd_moveCursor(lcd_CursorAddr); + UNLOCK_LCD; + + return oldmode; +} + + +int lcd_vprintf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, va_list ap) +{ + int len; + + LOCK_LCD; + + /* + * Se il cursore era acceso, spegnilo durante + * l'output per evitare che salti alla posizione + * in cui si scrive. + */ + if (lcd_CursorStatus) + lcd_setReg(LCD_CMD_CURSOR_OFF); + + /* Spostamento del cursore */ + lcd_setAddr(layer, addr); + + if (mode & LCD_CENTER) + { + int pad; + + /* + * NOTE: calculating the string lenght BEFORE it gets + * printf()-formatted. Real lenght may differ. + */ + pad = (CONFIG_LCD_COLS - strlen(format)) / 2; + while (pad--) + lcd_putCharUnlocked(' ', layer); + } + + len = _formatted_write(format, (void (*)(char, void *))lcd_putCharUnlocked, layer, ap); + + if (mode & (LCD_FILL | LCD_CENTER)) + while (layer->addr % CONFIG_LCD_COLS) + lcd_putCharUnlocked(' ', layer); + + /* + * Riaccendi il cursore e riportalo alla + * vecchia posizione + */ + if (lcd_CursorStatus) + lcd_setCursor(lcd_CursorStatus); + + UNLOCK_LCD; + + return len; +} + + +int lcd_printf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, ...) +{ + int len; + va_list ap; + + va_start(ap, format); + len = lcd_vprintf(layer, addr, mode, format, ap); + va_end(ap); + + return len; +} + + +/** + * Internal function to move a layer between two positions. + * + * \note The layer must be *already* enqueued in some list. + * \note The display must be already locked! + */ +static void lcd_enqueueLayer(Layer *layer, char pri) +{ + Layer *l2; + + /* Remove layer from whatever list it was in before */ + REMOVE(layer); + + layer->pri = pri; + + /* + * Search for the first layer whose priority + * is less or equal to the layer we are adding. + */ + FOREACH_NODE(l2, &lcd_Layers) + if (l2->pri <= pri) + break; + + /* Enqueue layer */ + INSERT_BEFORE(layer, l2); +} + +Layer *lcd_newLayer(char pri) +{ + Layer *layer; + + LOCK_LCD; + + if (LIST_EMPTY(&lcd_FreeLayers)) + { + UNLOCK_LCD; + //ASSERT(false); + return NULL; + } + + layer = (Layer *)LIST_HEAD(&lcd_FreeLayers); + layer->addr = 0; + memset(layer->buf, 0, CONFIG_LCD_ROWS * CONFIG_LCD_COLS); + + lcd_enqueueLayer(layer, pri); + + UNLOCK_LCD; + return layer; +} + +/** + * Redraw the display (internal). + * + * \note The display must be already locked. + */ +static void lcd_refresh(void) +{ + lcdpos_t addr; + Layer *l; + + for (addr = 0; addr < CONFIG_LCD_ROWS * CONFIG_LCD_COLS; ++addr) + { + FOREACH_NODE(l, &lcd_Layers) + { + //kprintf("%d %x %p\n", addr, l->buf[0], l); + if (l->pri == LAYER_HIDDEN) + break; + + if (l->buf[addr]) + { + /* Refresh location */ + lcd_putc(addr, l->buf[addr]); + goto done; + } + } + + /* Draw background */ + lcd_putc(addr, ' '); + done: + ; + } +} + +/** + * Rearrange layer depth and refresh display accordingly. + * + * \note Setting a priority of LAYER_HIDDEN makes the layer invisible. + */ +void lcd_setLayerDepth(Layer *layer, char pri) +{ + if (pri != layer->pri) + { + LOCK_LCD; + lcd_enqueueLayer(layer, pri); + /* Vile but simple */ + lcd_refresh(); + UNLOCK_LCD; + } +} + +void lcd_deleteLayer(Layer *layer) +{ + LOCK_LCD; + +/* We use lcd_refresh() instead. Much simpler than this mess, but slower. */ +#if 0 + Layer *l2; + lcdpos_t addr; + + /* Repair damage on underlaying layers */ + for (addr = 0; addr < CONFIG_LCD_ROWS * CONFIG_LCD_COLS; ++addr) + { + /* If location was covered by us */ + if (layer->buf[addr]) + { + /* ...and it wasn't covered by others above us... */ + for (l2 = layer->pred; l2->pred; l2 = l2->pred) + if (l2->buf[addr]) + /* can't just break here! */ + goto not_visible; + + /* ...scan underlaying layers to repair damage */ + for (l2 = layer->succ; l2->succ; l2 = l2->succ) + if (l2->buf[addr]) + { + /* Refresh character */ + lcd_putc(addr, l2->buf[addr]); + + /* No need to search on deeper layers */ + break; + } + + not_visible: + ; + } + } +#endif + + // Remove layer from lcd_Layers list. + REMOVE(layer); + + /* Put layer back into free list */ + ADDHEAD(&lcd_FreeLayers, layer); + + lcd_refresh(); + + UNLOCK_LCD; +} + + +static void lcd_setDefLayer(Layer *layer) +{ + lcd_DefLayer = layer; +} + +#include +void lcd_init(void) +{ + #if CONFIG_KERN + sem_init(&lcd_semaphore); + #endif + + int i; + + LIST_INIT(&lcd_Layers); + LIST_INIT(&lcd_FreeLayers); + for (i = 0; i < LCD_LAYERS; ++i) + ADDHEAD(&lcd_FreeLayers, &lcd_LayersPool[i]); + + lcd_setDefLayer(lcd_newLayer(0)); + + lcd_hw_init(); + + lcd_setCursor(0); +} + + diff --git a/bertos/drv/lcd_text.h b/bertos/drv/lcd_text.h new file mode 100644 index 0000000..09a1c70 --- /dev/null +++ b/bertos/drv/lcd_text.h @@ -0,0 +1,122 @@ +/** + * \file + * + * + * \brief Generic text LCD driver (interface). + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * $WIZ$ module_name = "lcd_text" + * $WIZ$ module_depends = "lcd_hd44", "timer", "formatwr" + */ + +#ifndef DRV_LCD_H +#define DRV_LCD_H + +#include "lcd_hd44.h" + +#include +#include +#include + +#include // vprintf() + + +/* flags for lcd_printf() */ +#define LCD_NORMAL 0 /* Scrittura normale */ +#define LCD_FILL BV(0) /* Fill rest of line with spaces */ +#define LCD_CENTER BV(1) /* Center string in line */ +#define LCD_NOCURSOR BV(2) /* Scrittura senza spostamento cursore */ + +/** Special priority value for lcd_setLayerDepth(). */ +#define LAYER_HIDDEN -127 + +/* Compute LCD address from x/y coordinates */ +#define LCD_POS(x,y) ((lcdpos_t)((uint8_t)(x) + (uint8_t)(y) * (uint8_t)CONFIG_LCD_COLS)) +#define LCD_ROW0 (CONFIG_LCD_COLS * 0) +#define LCD_ROW1 (CONFIG_LCD_COLS * 1) +#define LCD_ROW2 (CONFIG_LCD_COLS * 2) +#define LCD_ROW3 (CONFIG_LCD_COLS * 3) + +/** + * Overwrapping layer context. + */ +typedef struct _Layer +{ + /** + * Active layers are linked together in a list + * sorted in top to bottom order. + */ + DECLARE_NODE_ANON(struct _Layer) + + /** Current XY address into this layer, for write operations. */ + lcdpos_t addr; + + /** Priority of this layer (greater in front of lesser). */ + signed char pri; + + /** + * Layer backing store buffer. + * + * All writes through the layer are copied into this buffer. + * Characters cells with value 0 are transparent with respect + * to other layers in the background. + */ + char buf[CONFIG_LCD_COLS * CONFIG_LCD_ROWS]; +} Layer; + + +/* Global variables */ +extern Layer *lcd_DefLayer; + +/* Function prototypes */ +extern void lcd_init(void); +extern void lcd_test(void); + +extern void lcd_moveCursor(lcdpos_t addr); +extern char lcd_setCursor(char state); + +extern void lcd_setAddr(Layer *layer, lcdpos_t addr); +extern void lcd_putChar(char c, Layer *layer); +extern int lcd_vprintf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, va_list ap) FORMAT(printf, 4, 0); +extern int lcd_printf(Layer *layer, lcdpos_t addr, uint8_t mode, const char *format, ...) FORMAT(printf, 4, 5); +extern void lcd_clear(Layer *layer); +extern void lcd_layerSet(Layer *layer, char c); +extern void lcd_clearLine(Layer *layer, int y); + +extern void lcd_setLayerDepth(Layer *layer, char pri); +extern Layer *lcd_newLayer(char pri); +extern void lcd_deleteLayer(Layer *layer); +extern void lcd_lock(void); +extern void lcd_unlock(void); + +#endif /* DRV_LCD_H */ diff --git a/bertos/drv/lcd_text_hwtest.c b/bertos/drv/lcd_text_hwtest.c new file mode 100644 index 0000000..b3f1643 --- /dev/null +++ b/bertos/drv/lcd_text_hwtest.c @@ -0,0 +1,54 @@ +/** + * \file + * + * + * \brief Generic text LCD driver (Test). + * + * + * \author Daniele Basile + * + */ + +#warning TODO:This test is incomplete, you must review! + +#if 0 +void lcd_test(void) +{ + int i; + + for (i = 0; i < CONFIG_LCD_ROWS * CONFIG_LCD_COLS; ++i) + { + lcd_putCharUnlocked('0' + (i % 10), lcd_DefLayer); + timer_delay(100); + } +} +#endif + diff --git a/bertos/drv/led_7seg.c b/bertos/drv/led_7seg.c new file mode 100644 index 0000000..d89ef37 --- /dev/null +++ b/bertos/drv/led_7seg.c @@ -0,0 +1,527 @@ +/** + * \file led_7seg.c + * + * + * \brief 7 segments LED displays (impl) + * + * \author Fabio Bizzi + * + * \addtogroup SevenSegDisplay 7 Segments LED Displays Driver + * \{ + * + */ + +#include "drv/led_7seg.h" +#include "hw/hw_led_7seg.h" +#include "cfg/cfg_arch.h" +#include +#include + +/* + * Define the timer for the refreshing + */ +static Timer sseg_trefresh; + +/* + * FUNCTION: sseg_refresh + * + * This is the procedure that prints the seven_seg structure'string to the display. + * It prints a single digit at time and does all the checks to a proper display. + * It is called by the wrapper function fired by the timer set in the init procedure. + * + * param SS The void pointer that holds the pointer to the data structure + * + */ +static void sseg_refresh(SevenSeg *SS) +{ + /* First Check if the structure is being edited we do a silent exit*/ + if (SS->busyedit == true) + return; + + /* If we have displayed all the digits */ + if (SS->curdigit == CONFIG_LED_7SEG_DIGIT) + { + sseg_off(); + /* And if we have to display again all the digit */ + if (SS->curspeed > 0) + { + SS->curspeed--; + SS->curdigit = 0; + SS->curpos -= CONFIG_LED_7SEG_DIGIT; + } + /* Else is time to scroll the text */ + else + { + /* If we aren't at the end of the string */ + if (SS->curpos < SS->string_len) + { + SS->curpos -= CONFIG_LED_7SEG_DIGIT; + SS->curpos++; + SS->curdigit = 0; + SS->curspeed = SS->speed; + } + /* Else we are at the end of the string */ + else + { + /* Set that the string was displayed at least one time and we can accept a new text*/ + SS->firstrun = false; + /* If the string has to be displayed only one time we set an empty string + * to display till next print request*/ + if (SS->runonce == true) + sevenseg_clear(SS); + /* Else we reset the text to it's first character ad do again the display */ + else + { + SS->curdigit = 0; + SS->curpos = 0; + SS->curspeed = SS->speed; + } + } + } + } + /* Else We have to do a print*/ + else + { + /* If the text doesn't have to blink we write the character to the proper disply's digit */ + if (SS->blink == false) + sseg_on(SS->string[SS->curpos], SS->curdigit); + /* Else we do the blinking */ + else + { + /* If bdigit == 0 we have to blink all the digits */ + if (SS->bdigit == 0) + { + if (SS->curspeed >= (SS->speed/2)) + sseg_on(SS->string[SS->curpos], SS->curdigit); + else + sseg_off(); + } + /* else we have to blink only one digit (bdigit -1) */ + else + /* is this the digit to blink? */ + if (SS->curdigit == ((unsigned int)SS->bdigit-1)) + { + if (SS->curspeed >= (SS->speed/2)) + sseg_on(SS->string[SS->curpos], SS->curdigit); + else + sseg_off(); + } + /* no, so let do a normal print */ + else + sseg_on(SS->string[SS->curpos], SS->curdigit); + } + /* Ok, next time next char.... ;) */ + SS->curdigit++; + SS->curpos++; + } +} + +/* + * FUNCTION: sseg_refresh_wrapper + * + * This is a "wrapper" procedure that is called by the timer_setSoftint() + * with the unique purpose to call the real sseg_refresh procedure without + * the cast of the structure from void to SevenSeg. + * + * param VSS The void pointer that holds the pointer to the data structure + * + */ +static void sseg_refresh_wrapper(void *VSS) +{ + /* Here we cast the Structure from void to proper type */ + SevenSeg *SS; + SS = (SevenSeg *)VSS; + /* now we call the right refresh routine */ + sseg_refresh(SS); + /* ReStart the timer */ + timer_add(&sseg_trefresh); +} + +/* + * FUNCTION: sseg_tabcheck + * + * This function return the position of the ascii character in the hex + * segstable. + * + * param source The ascii char to be positioned + */ +INLINE uint8_t sseg_tabcheck(char source) +{ + uint8_t hexchar=38; + + /* Numbers */ + if ((((int)source) > 47) && (((int)source) < 58)) + hexchar = source-48; + else + /* Capital Letters */ + if ((((int)source) > 64) && (((int)source) < 91)) + hexchar = source-53; + else + /* Letters */ + if ((((int)source) > 96) && (((int)source) < 123)) + hexchar = source-85; + else + /* Minus */ + if (((int)source) == 45) + hexchar = 11; + else + /* Space */ + if (((int)source) == 32) + hexchar = 38; + else + /* Dot */ + if (((int)source) == 46) + hexchar = 10; + return hexchar; +} + +/** + * \brief Print a string on the display + * + * This is the procedure that fills the seven_seg structure with the translated + * string to display. It swaps also the structures to display the new text when + * all the data is ready to display. + * + * \param SS Pointer to the SevenSeg structure + * \param sstring String to be displayed + * + * \return 0 if all went well, -1 if the display is locked, -2 if the string too long. + */ +int sevenseg_print(SevenSeg *SS, const char *sstring) +{ + size_t string_lenght; + unsigned int x,y,dotnumber; + bool dotjump = false; + uint8_t hexchar; + + /* Check if the display is unlocked */ + if (SS->busyedit == false) + return -1; + + /* Check if the string is too big */ + if (sizeof(&sstring) > (CONFIG_LED_7SEG_STRLEN-(2*CONFIG_LED_7SEG_DIGIT))) + return -2; + + /* get the string length and set the number of dots in the string to 0 */ + string_lenght = strlen(sstring); + dotnumber = 0; + + /* check if there are some dots in the string and report the number in dotnumber */ + for (x=0;x<(unsigned int)string_lenght;x++) + { + if (((int)sstring[x]) == 46) + dotnumber++; + } + + /* If the *REAL* lenght of the string is less or equal than the number of digits */ + if (((int)string_lenght-dotnumber) <= CONFIG_LED_7SEG_DIGIT) + { + /* If the *REAL* lenght of the string is less than number of digits */ + if (((int)string_lenght-dotnumber) < CONFIG_LED_7SEG_DIGIT) + { + /* Fill the left side of the string with blanks */ + for (x=0; x<(CONFIG_LED_7SEG_DIGIT-((int)string_lenght-dotnumber)); x++) + SS->string[x] = segstable[38]; + y = x; + } + else + { + /* Else we have the exact string length of the display */ + y = 0; + } + } + else + { + /* Else we have the string length bigger than the display and we need to fill + * the entire left side of the string with blanks to begin the scroll from the + * rigthest side of the display */ + for (x=0; xstring[x] = segstable[38]; + y = CONFIG_LED_7SEG_DIGIT; + } + /* Here we start to fill the string with the Hex 7seg characters values */ + hexchar = 0; + for (x=0; x<(unsigned int)string_lenght; x++) + { + hexchar = sseg_tabcheck(sstring[x]); + /* do we have a dot? */ + if (hexchar == 10) + { + /* If we are at the first character of the string it has to be forced + * as "lonly" dot ;) */ + if (x > 0) + { +#if CONFIG_LED_7SEG_CCAT + SS->string[y-1] = SS->string[y-1] | segstable[(int)hexchar]; +#else + SS->string[y-1] = SS->string[y-1] & segstable[(int)hexchar]; +#endif + dotjump = true; + } + } + /* If the last character was a dot and we aren't at the first character of the string + * we have just inserted it */ + if (dotjump) + dotjump = false; + /* Let's put the character in the structure's string */ + else + { + SS->string[y] = segstable[(int)hexchar]; + y++; + } + } + /* If we have the string length bigger than the display we need to fill + * the entire right side of the string with blanks to end the scroll + * to the rigthest side of the display */ + if (((int)string_lenght-dotnumber) > CONFIG_LED_7SEG_DIGIT) + { + for (x=0; xstring[y] = segstable[38]; + y++; + } + } + /* Let's put the total string length to the structure */ + SS->string_len = y; + + return 0; +} + +/** + * \brief initialize the structure and the timer for the display + * + * This is the procedure that inits all the structures that rules the 7 segments + * display and set the timer for the proper print/refresh of the text. + * + * \param SS Pointer to the SevenSeg structure + */ +void sevenseg_init(SevenSeg *SS) +{ + /* + * Init the 7segments string structure + */ + SS->busyedit = true; + sevenseg_clear(SS); + SS->busyedit = false; + + /* + * Init the I/O ports and set the display OFF + */ + sseg_init(); + + /* + * Define the timer for the refresh of the display + * The timer calls the sevenseg_refresh function + * every "CONFIG_LED_7SEG_RTIME" milliseconds for + * an acceptable persistance of a single 7 segments + * display. + */ + // set the callback + timer_setSoftint(&sseg_trefresh, sseg_refresh_wrapper, (void *)SS); + // expire time: 1s + timer_setDelay(&sseg_trefresh, ms_to_ticks(CONFIG_LED_7SEG_RTIME)); + // start the timer + timer_add(&sseg_trefresh); +} + +/** + * \brief check if is possible to do a new print + * + * This is the procedure that check if the print of the current text is run + * almost one time and we're ready to print a new text. + * + * \param SS Pointer to the SevenSeg structure + * + * \return true if we can print a new text, false if we're still printing the previous text for the first time and we have to wait. + */ +bool sevenseg_isReady(SevenSeg *SS) +{ + return !SS->firstrun; +} + +/** + * \brief unlock the SevenSeg structure and stops the print + * + * This is the procedure that check if the print of the current text is run + * almost one time and then set the status of the display to "unlocked". + * + * \param SS Pointer to the SevenSeg structure + * + * \return true if the display is unlocked, false if the dispaly is still locked. + */ +bool sevenseg_unlock(SevenSeg *SS) +{ + if (SS->firstrun == false) + { + SS->busyedit = true; + SS->firstrun = true; + SS->curdigit = 0; + SS->curpos = 0; + } + else + return false; + return true; +} + +/** + * \brief lock the SeveSeg structure and starts a new print + * + * This is the procedure that lock the display and permit + * the print of the text. + * + * \param SS Pointer to the SevenSeg structure + * + * \return true if the display is now locked, false if the display was already locked. + */ +bool sevenseg_lock(SevenSeg *SS) +{ + if (SS->busyedit == true) + { + /* If the string is longer than the number of the digit of the display we + * reset the single digit blink to zero to be sure that the display of + * the text is clean from previous single digit blinking settings */ + if (SS->string_len > CONFIG_LED_7SEG_DIGIT) + SS->bdigit = 0; + SS->busyedit = false; + } + else + return false; + return true; +} + +/** + * \brief set the blinking of the digits of the display + * + * This is the procedure that set the blinking of the display. + * You can choose to blink all the display or only a single + * digit. + * + * \param SS Pointer to the SevenSeg structure + * \param blink if true the display will blink + * \param digit if 0 all the digits have to blink, else the digit that has to blink + * + * \return true if the set was succesfull, false if the set was not succesfull. + */ +bool sevenseg_setBlink(SevenSeg *SS, bool blink, uint8_t digit) +{ + if (SS->busyedit == true) + { + if (blink == true) + { + if (digit == 0) + SS->bdigit = digit; + else + if ((digit-1) <= CONFIG_LED_7SEG_DIGIT) + SS->bdigit = digit; + else + return false; + } + SS->blink = blink; + } + else + return false; + return true; +} + +/** + * \brief set if the text has to be displayed just one time + * + * This is the procedure that set if the text has to be displayed + * just one time + * + * \param SS Pointer to the SevenSeg structure + * \param runonce true if the text has to be displayed only one time, false if the text has to be displayed till next print + * + * \return true if the set was succesfull, false if the set was not succesfull. + */ +bool sevenseg_setRunonce(SevenSeg *SS, bool runonce) +{ + if (SS->busyedit == true) + SS->runonce = runonce; + else + return false; + return true; +} + +/** + * \brief set the scrolling speed of the text + * + * This is the procedure that set the scrolling speed of the text + * if the text is longer than the display digits or the + * duration of the display if the text is smaller or equal the + * length of display digits. + * + * \param SS Pointer to the SevenSeg structure + * \param r_speed the Scrolling speed or display time + * + * \return true if the set was succesfull, false if the set was not succesfull. + */ +bool sevenseg_setRunspeed(SevenSeg *SS, unsigned int r_speed) +{ + if (SS->busyedit == true) + { + SS->speed = r_speed; + SS->curspeed = r_speed; + } + else + return false; + return true; +} + +/** + * \brief clear the display + * + * This is the procedure that blanks the text to be displayed + * and so on clear the display. + * + * \param SS Pointer to the SevenSeg structure + * + * \return true if the clear was succesfull, false if the clear was not succesfull. + */ +bool sevenseg_clear(SevenSeg *SS) +{ + if (SS->busyedit == true) + { + memset(((void *)&SS->string),segstable[38],sizeof(SS->string)); + SS->string_len = CONFIG_LED_7SEG_DIGIT; + SS->blink = false; + SS->bdigit = 0; + SS->runonce = false; + SS->curdigit = 0; + SS->curpos = 0; + SS->speed = CONFIG_LED_7SEG_SSPEED; + SS->curspeed = CONFIG_LED_7SEG_SSPEED; + SS->firstrun = false; + } + else + return false; + return true; +} + /** \} */ //defgroup drivers diff --git a/bertos/drv/led_7seg.h b/bertos/drv/led_7seg.h new file mode 100644 index 0000000..ee359ec --- /dev/null +++ b/bertos/drv/led_7seg.h @@ -0,0 +1,230 @@ +/** + * \file led_7seg.h + * + * + * \author Fabio Bizzi + * + * \defgroup SevenSegDisplay 7 Segments LED Displays Driver + * \ingroup drivers + * \{ + * + * \brief 7 segments LED displays (headers) + * + * Here you find the prototypes and the data structures that + * format and holds the text that has to be displayed by the + * 7 segments display. + * + * The main function is the sevenseg_print() + * that is called by your software to display the text, also + * important is the sevenseg_init() that initialize the data + * structures and set the refresh timer, you need to call + * this procedure just one time in the init procedure of + * your software before any use of the sevenseg_print(). + * + * Usage: + * + * To use succesfully the display you have to follow these steps: + * + * \li Create the structure and init the display + * \li Check if the display is ready to accept a new print with + * the function sevenseg_isReady() + * \li Unlock the display with the function sevenseg_unlock() + * NOTE: when the display is unlocked the displaying of any + * text is stopped but the data (text and attributes like text + * position, blinking etc etc) are not erased. + * \li Set the wanted text attributes with sevenseg_set* functions + * \li Print the wanted text with sevenseg_print() + * \li Lock the display with sevenseg_lock() + * + * When the display is locked the displaying of the text starts. + * + * + * \code + * static Seven_Seg display; + * // ... + * sevenseg_init(&display); + * while (!sevenseg_isReady(&display)) + * ; + * sevenseg_unlock(&display); + * sevenseg_setBlink(&display,false,0); + * sevenseg_setRunonce(&display,false); + * sevenseg_setRunspeed(&display,10); + * if ((sevenseg_print(&display, "made with bertos.")) != 0) + * return -1; + * sevenseg_lock(&display); + * \endcode + * + * $WIZ$ module_name = "led_7seg" + * $WIZ$ module_depends = "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_led_7seg.h" + * $WIZ$ module_hw = "bertos/hw/hw_led_7seg.h" + */ + +#ifndef DRV_LED_7SEG_H +#define DRV_LED_7SEG_H + +#include "cfg/cfg_led_7seg.h" +#include +#include + +/** + * \name Numbers and Letters Table. + * \note These tables contain all the printable + * characters on a 7 segment digit encoded + * for common cathode and common anode + * display type. + * + * 0, 1, 2, 3, 4, 5, 6, 7, 8, + * 9, ., -, A, B, C, D, E, F, + * G, H, I, J, K, L, M, N, O, + * P, Q, R, S, T, U, V, W, X, + * Y, Z, SPACE + * + * \{ + */ +#if CONFIG_LED_7SEG_CCAT + static const uint8_t segstable[] = + { + 0x3f, 0x6, 0x5b, 0x4f, 0x66, 0x6d, 0x7d, 0x7, 0x7f, + 0x6f, 0x80, 0x40, 0x77, 0x7c, 0x39, 0x5e, 0x79, 0x71, + 0x3d, 0x74, 0x30, 0x1e, 0x75, 0x38, 0x15, 0x37, 0x3f, + 0x73, 0x67, 0x50, 0x6d, 0x78, 0x3e, 0x2a, 0x6a, 0x76, + 0x6e, 0x5b, 0x0 + }; +#else + static const uint8_t segstable[] = + { + 0xc0, 0xf9, 0xa4, 0xb0, 0x99, 0x92, 0x82, 0xf8, 0x80, + 0x90, 0x7f, 0xbf, 0x88, 0x83, 0xc6, 0xa1, 0x86, 0x8e, + 0xc2, 0x8b, 0xcf, 0xe1, 0x8a, 0xc7, 0xea, 0xc8, 0xc0, + 0x8c, 0x98, 0xaf, 0x92, 0x87, 0xc1, 0xd5, 0x95, 0x89, + 0x91, 0xa4, 0xff + }; +#endif +/**\} */ + +/** + * Context data for Display functions + * + */ +typedef struct SevenSeg +{ + /** The String to be displayed */ + uint8_t string[CONFIG_LED_7SEG_STRLEN]; + /** The length of the string to be displayed */ + unsigned int string_len; + /** Has to blink? */ + bool blink; + /** Has to blink only one digit? */ + uint8_t bdigit; + /** Has to be displayed only one time? */ + bool runonce; + /** Scrolling speed */ + unsigned int speed; + /** Working scrolling speed */ + unsigned int curspeed; + /** Is it printed at least one time? */ + bool firstrun; + /** Working current position */ + unsigned int curpos; + /** Working current digit */ + unsigned int curdigit; + /** Is the structure in edit? */ + bool busyedit; +} SevenSeg; + +/* Functions prototypes */ + +/* + * This is the procedure that fills the seven_seg structure with the translated + * string to display. It swaps also the structures to display the new text when + * all the data is ready to display. + */ +int sevenseg_print(SevenSeg *SS, const char *sstring); + +/* + * This is the procedure that inits all the structures that rules the 7 segments + * display and set the timer for the proper print/refresh of the text. + */ +void sevenseg_init(SevenSeg *SS); + +/* + * This is the procedure that does a short print of all segments of all + * digits of the display. + */ +void sevenseg_test(SevenSeg *SS); + +/* + * This is the procedure that check if the print of the current text is run + * almost one time and we're ready to print a new text. + */ +bool sevenseg_isReady(SevenSeg *SS); + +/* + * This is the procedure that check if the print of the current text is run + * almost one time and then set the status of the display to "unlocked". + */ +bool sevenseg_unlock(SevenSeg *SS); + +/* + * This is the procedure that lock the display and permit + * the print of the text. + */ +bool sevenseg_lock(SevenSeg *SS); + +/* + * This is the procedure that set the blinking of the display. + * You can choose to blink all the display or only a single + * digit. + */ +bool sevenseg_setBlink(SevenSeg *SS, bool blink, uint8_t digit); + +/* + * This is the procedure that set if the text has to be displayed + * just one time + */ +bool sevenseg_setRunonce(SevenSeg *SS, bool runonce); + +/* + * This is the procedure that set the scrolling speed of the text + * if the text is longer than the display digits or the + * duration of the display if the text is smaller or equal the + * length of display digits. + */ +bool sevenseg_setRunspeed(SevenSeg *SS, unsigned int r_speed); + +/* + * This is the procedure that blanks the text to be displayed + * and so on clear the display. + */ +bool sevenseg_clear(SevenSeg *SS); + +#endif /* DRV_LED_7SEG_H */ + /** \} */ //defgroup drivers diff --git a/bertos/drv/lm75.c b/bertos/drv/lm75.c new file mode 100644 index 0000000..d1d0a25 --- /dev/null +++ b/bertos/drv/lm75.c @@ -0,0 +1,94 @@ +/** + * \file + * + * + * \brief LM75 sensor temperature family. + * + * \author Daniele Basile + * + */ + +#include "lm75.h" + +#include "hw/hw_lm75.h" + +#include "cfg/cfg_lm75.h" + +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL LM75_LOG_LEVEL +#define LOG_FORMAT LM75_LOG_FORMAT + +#include + +#include +#include // Macro and data type to manage celsius degree + +#define SELECT_ADDRESS(addr) LM75_ADDRESS_BYTE | (addr << 1) +#define LM75_ADDRESS_BYTE 0x91 +#define LM75_PAD_BYTE 0x0 + + +#if !CONFIG_I2C_DISABLE_OLD_API + +deg_t lm75_read_1(uint8_t sens_addr) +{ + return lm75_read_2(&local_i2c_old_api, sens_addr); +} +#endif /* !CONFIG_I2C_DISABLE_OLD_API */ + + +/* + * New API + */ +deg_t lm75_read_2(I2c *i2c, uint8_t sens_addr) +{ + uint8_t data[2]; + int16_t degree; + int16_t deci_degree; + + i2c_start_w(i2c, SELECT_ADDRESS(sens_addr), 1, I2C_NOSTOP); + i2c_putc(i2c, LM75_PAD_BYTE); + i2c_start_r(i2c, SELECT_ADDRESS(sens_addr), sizeof(data), I2C_STOP); + i2c_read(i2c, data, sizeof(data)); + + if (i2c_error(i2c)) + return EOF; + + degree = (int16_t)data[0]; + deci_degree = (int16_t)(((data[1] >> 7) & 1 ) * 5); + + LOG_INFO("[%d.%d C]\n", degree, deci_degree); + + return degree * 10 + deci_degree; +} diff --git a/bertos/drv/lm75.h b/bertos/drv/lm75.h new file mode 100644 index 0000000..78a1c40 --- /dev/null +++ b/bertos/drv/lm75.h @@ -0,0 +1,68 @@ +/** + * \file + * + * + * \brief LM75 sensor temperature family. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "lm75" + * $WIZ$ module_depends = "timer", "i2c" + * $WIZ$ module_configuration = "bertos/cfg/cfg_lm75.h" + * $WIZ$ module_hw = "bertos/hw/hw_lm75.h" + */ + +#ifndef DRV_LM75_H +#define DRV_LM75_H + +#include + +#include // Macro and data type to manage celsius degree +#include + +#include + +#define I2C_READBIT BV(0) + +#if COMPILER_C99 + #define lm75_read(...) PP_CAT(lm75_read ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) +#else + #define lm75_read(args...) PP_CAT(lm75_read ## _, COUNT_PARMS(args)) (args) +#endif + +#if !CONFIG_I2C_DISABLE_OLD_API + +DEPRECATED deg_t lm75_read_1(uint8_t sens_addr); +#endif /* !CONFIG_I2C_DISABLE_OLD_API */ + +deg_t lm75_read_2(I2c *i2c, uint8_t sens_addr); + +#endif /* DRV_LM75_H */ diff --git a/bertos/drv/mcp41.c b/bertos/drv/mcp41.c new file mode 100644 index 0000000..5dbd8c1 --- /dev/null +++ b/bertos/drv/mcp41.c @@ -0,0 +1,79 @@ +/** + * \file + * + * + * + * \brief MCP41xxx digital potentiomenter driver (implementation) + * + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#include +#include +#include + +static KFile *ch; + +/** + * Set resitance for digital pot \a dev + */ +void mcp41_setResistance(Mcp41Dev dev, mcp41_res_t res) +{ + MCP41_ON(dev); + /* send command byte */ + kfile_putc(MCP41_WRITE_DATA, ch); + kfile_putc(((MCP41_HW_MAX * (uint32_t)res) + (MCP41_MAX / 2)) / MCP41_MAX, ch); + kfile_flush(ch); + + MCP41_OFF(dev); +} + + +/** + * Initialize mcp41 potentiometer driver + */ +void mcp41_init(KFile *_ch) +{ + Mcp41Dev dev; + + /* Init all potentiometer ports */ + for (dev = 0; dev < MCP41_CNT; dev++) + { + SET_MCP41_DDR(dev); + MCP41_OFF(dev); + } + + ch = _ch; +} diff --git a/bertos/drv/mcp41.h b/bertos/drv/mcp41.h new file mode 100644 index 0000000..5635574 --- /dev/null +++ b/bertos/drv/mcp41.h @@ -0,0 +1,62 @@ +/** + * \file + * + * + * + * \brief MCP41xxx digital potentiomenter driver. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "mcp41" + * $WIZ$ module_depends = "timer", "kfile" + * $WIZ$ module_hw = "bertos/hw/hw_mcp41.h", "bertos/hw/hw_mcp41.c", "bertos/hw/mcp41_map.h" + */ + +#ifndef DRV_MCP41_H +#define DRV_MCP41_H + +#include "hw/mcp41_map.h" +#include + +#include + +#define MCP41_WRITE_DATA 0x11 +#define MCP41_HW_MAX 255 +#define MCP41_MAX 999 + +/** + * Type for digital potentiometer resistance. + */ +typedef uint16_t mcp41_res_t; + +void mcp41_setResistance(Mcp41Dev dev, mcp41_res_t res); +void mcp41_init(KFile *ch); + +#endif /* DRV_MCP41_H */ diff --git a/bertos/drv/mpxx6115a.h b/bertos/drv/mpxx6115a.h new file mode 100644 index 0000000..aa5a682 --- /dev/null +++ b/bertos/drv/mpxx6115a.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief MPXX6115A Pressure Sensor convert formula. + * + * This module convert read voltage value from MPXX6115A + * pressure sensor into hPascal value unit. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "mpxx6115a" + * $WIZ$ module_depends = "adc" + * $WIZ$ module_configuration = "" + * $WIZ$ module_hw = "" + */ + +#ifndef DRV_MPXX6115A_H +#define DRV_MPXX6115A_H + +#include + +#define MPXX6115A_DIV_CONST 0.009f +#define MPXX6115A_ADD_CONST 0.095f + + +/** + * Convert read voltage from MPXX6115A Pressure Sensor in hPascal value. + * + * The conversion formula may be consulted on constructor datasheet + * (see Freescale Semiconductor MP3H6115A, MPXAZ6115A). + * + * \param vout output voltage read from pin sensor. + * \param vref reference voltage that supplies the MPXX6115A sensor. + * + * \return integer value that represent measured pressure in hPascal. + * + * \note: To compute the pressure we use the Vout/Vref ratio, so + * these two values can be expressed in any unit, even ADC levels. + * + */ +INLINE int16_t mpxx6115a_press(adcread_t vout, adcread_t vref) +{ + float tmp; + + tmp = (float)vout/(float)vref + MPXX6115A_ADD_CONST; + + // To return hpascal we should multiply by 10 because the ratio is in kpascal + return (int16_t)(tmp / MPXX6115A_DIV_CONST * 10); +} + +#endif /* DRV_MPXX6115A_H */ diff --git a/bertos/drv/nand.c b/bertos/drv/nand.c new file mode 100644 index 0000000..82f5f69 --- /dev/null +++ b/bertos/drv/nand.c @@ -0,0 +1,704 @@ +/** +* \file +* +* +* \brief ONFI 1.0 compliant NAND kblock driver +* +* Defective blocks are remapped in a reserved area of configurable size +* at the bottom of the NAND. +* At the moment there is no wear-leveling block translation: kblock's blocks +* are mapped directly on NAND erase blocks: when a (k)block is written the +* corresponding erase block is erased and all pages within are rewritten. +* Partial write is not possible: it's recommended to use buffered mode. +* +* The driver needs to format the NAND before use. If the initialization code +* detects a fresh memory it does a bad block scan and a formatting. +* Format info isn't stored in NAND in a global structure: each block has its +* info written in the spare area of its first page. These info contais a tag +* to detect formatted blocks and an index for bad block remapping (struct +* RemapInfo). +* +* The ECC for each page is written in the spare area too. +* +* Works only in 8 bit data mode and NAND parameters are not +* detected at run-time, but hand-configured in cfg_nand.h. +* +* Heap is needed to allocate the tipically large buffer necessary +* to erase and write a block. +* +* \author Stefano Fedrigo +* +* notest: avr +*/ + +#include "nand.h" +#include +#include +#include // memset + + +/* + * Remap info written in the first page of each block. + * + * This structure is used in blocks of the reserved area to store + * which block the block containing the structure is remapping. + * It's stored in all other blocks too to mark a formatted block. + * In this case the member mapped_blk has non meaning. + */ +struct RemapInfo +{ + uint32_t tag; // Magic number to detect valid info + uint16_t mapped_blk; // Bad block the block containing this info is remapping +}; + +// Where RemapInfo is stored in the spare area +#define NAND_REMAP_TAG_OFFSET (CONFIG_NAND_SPARE_SIZE - sizeof(struct RemapInfo)) + +// Fixed tag to detect RemapInfo +#define NAND_REMAP_TAG 0x3e10c8ed + +/* + * Number of ECC words computed for a page. + * + * For 2048 bytes pages and 1 ECC word each 256 bytes, + * 24 bytes of ECC data are stored. + */ +#define NAND_ECC_NWORDS (CONFIG_NAND_DATA_SIZE / 256) + +// Total page size (user data + spare) in bytes +#define NAND_PAGE_SIZE (CONFIG_NAND_DATA_SIZE + CONFIG_NAND_SPARE_SIZE) + +// Erase block size in bytes +#define NAND_BLOCK_SIZE (CONFIG_NAND_DATA_SIZE * CONFIG_NAND_PAGES_PER_BLOCK) + +// Number of usable blocks, and index of first remapping block +#define NAND_NUM_USER_BLOCKS (CONFIG_NAND_NUM_BLOCK - CONFIG_NAND_NUM_REMAP_BLOCKS) + +// ONFI NAND status codes +#define NAND_STATUS_READY BV(6) +#define NAND_STATUS_ERROR BV(0) + + +// Get block from page +#define PAGE(blk) ((blk) * CONFIG_NAND_PAGES_PER_BLOCK) + +// Page from block and page in block +#define BLOCK(page) ((uint16_t)((page) / CONFIG_NAND_PAGES_PER_BLOCK)) +#define PAGE_IN_BLOCK(page) ((uint16_t)((page) % CONFIG_NAND_PAGES_PER_BLOCK)) + + +/* + * Translate page index plus a byte offset + * in the five address cycles format needed by NAND. + * + * Cycles in x8 mode. + * CA = column addr, PA = page addr, BA = block addr + * + * Cycle I/O7 I/O6 I/O5 I/O4 I/O3 I/O2 I/O1 I/O0 + * ------------------------------------------------------- + * First CA7 CA6 CA5 CA4 CA3 CA2 CA1 CA0 + * Second LOW LOW LOW LOW CA11 CA10 CA9 CA8 + * Third BA7 BA6 PA5 PA4 PA3 PA2 PA1 PA0 + * Fourth BA15 BA14 BA13 BA12 BA11 BA10 BA9 BA8 + * Fifth LOW LOW LOW LOW LOW LOW LOW BA16 + */ +static void getAddrCycles(uint32_t page, uint16_t offset, uint32_t *cycle0, uint32_t *cycle1234) +{ + ASSERT(offset < NAND_PAGE_SIZE); + + *cycle0 = offset & 0xff; + *cycle1234 = (page << 8) | ((offset >> 8) & 0xf); +} + + +static void chipReset(Nand *chip) +{ + nand_sendCommand(chip, NAND_CMD_RESET, 0, 0, 0, 0); + nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT); +} + + +static bool isOperationComplete(Nand *chip) +{ + uint8_t status; + + nand_sendCommand(chip, NAND_CMD_STATUS, 0, 0, 0, 0); + + status = nand_getChipStatus(chip); + return (status & NAND_STATUS_READY) && !(status & NAND_STATUS_ERROR); +} + + +/** + * Erase the whole block. + */ +int nand_blockErase(Nand *chip, uint16_t block) +{ + uint32_t cycle0; + uint32_t cycle1234; + + uint16_t remapped_block = chip->block_map[block]; + if (block != remapped_block) + { + LOG_INFO("nand_blockErase: remapped block: blk %d->%d\n", block, remapped_block); + block = remapped_block; + } + + getAddrCycles(PAGE(block), 0, &cycle0, &cycle1234); + + nand_sendCommand(chip, NAND_CMD_ERASE_1, NAND_CMD_ERASE_2, 3, 0, cycle1234 >> 8); + + nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT); + + if (!isOperationComplete(chip)) + { + LOG_ERR("nand: error erasing block\n"); + chip->status |= NAND_ERR_ERASE; + return -1; + } + + return 0; +} + + +/** + * Read Device ID and configuration codes. + */ +bool nand_getDevId(Nand *chip, uint8_t dev_id[5]) +{ + nand_sendCommand(chip, NAND_CMD_READID, 0, 1, 0, 0); + + nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT); + if (!nand_waitTransferComplete(chip, CONFIG_NAND_TMOUT)) + { + LOG_ERR("nand: getDevId timeout\n"); + chip->status |= NAND_ERR_RD_TMOUT; + return false; + } + + memcpy(dev_id, nand_dataBuffer(chip), sizeof(dev_id)); + return true; +} + + +static bool nand_readPage(Nand *chip, uint32_t page, uint16_t offset) +{ + uint32_t cycle0; + uint32_t cycle1234; + + //LOG_INFO("nand_readPage: page 0x%lx off 0x%x\n", page, offset); + + getAddrCycles(page, offset, &cycle0, &cycle1234); + + nand_sendCommand(chip, NAND_CMD_READ_1, NAND_CMD_READ_2, 5, cycle0, cycle1234); + + nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT); + if (!nand_waitTransferComplete(chip, CONFIG_NAND_TMOUT)) + { + LOG_ERR("nand: read timeout\n"); + chip->status |= NAND_ERR_RD_TMOUT; + return false; + } + + return true; +} + + +/* + * Read page data and ECC, checking for errors. + * TODO: fix errors with ECC when possible. + */ +static bool nand_read(Nand *chip, uint32_t page, void *buf, uint16_t offset, uint16_t size) +{ + struct RemapInfo remap_info; + uint32_t remapped_page = PAGE(chip->block_map[BLOCK(page)]) + PAGE_IN_BLOCK(page); + + //LOG_INFO("nand_read: page=%ld, offset=%d, size=%d\n", page, offset, size); + + if (page != remapped_page) + { + LOG_INFO("nand_read: remapped block: blk %d->%d, pg %ld->%ld\n", + BLOCK(page), chip->block_map[BLOCK(page)], page, remapped_page); + page = remapped_page; + } + + if (!nand_readPage(chip, page, 0)) + return false; + + memcpy(buf, (char *)nand_dataBuffer(chip) + offset, size); + + /* + * Check for ECC hardware status only if a valid RemapInfo structure is found. + * That guarantees the page is written by us and a valid ECC is present. + */ + memcpy(&remap_info, (char *)buf + NAND_REMAP_TAG_OFFSET, sizeof(remap_info)); + if (remap_info.tag == NAND_REMAP_TAG && !nand_checkEcc(chip)) + { + chip->status |= NAND_ERR_ECC; + return false; + } + else + return true; +} + + +/* + * Write data stored in nand_dataBuffer() to a NAND page, starting at a given offset. + * Usually offset will be 0 to write data or CONFIG_NAND_DATA_SIZE to write the spare + * area. + */ +static bool nand_writePage(Nand *chip, uint32_t page, uint16_t offset) +{ + uint32_t cycle0; + uint32_t cycle1234; + + //LOG_INFO("nand_writePage: page 0x%lx off 0x%x\n", page, offset); + + getAddrCycles(page, offset, &cycle0, &cycle1234); + + nand_sendCommand(chip, NAND_CMD_WRITE_1, 0, 5, cycle0, cycle1234); + + if (!nand_waitTransferComplete(chip, CONFIG_NAND_TMOUT)) + { + LOG_ERR("nand: write timeout\n"); + chip->status |= NAND_ERR_WR_TMOUT; + return false; + } + + nand_sendCommand(chip, NAND_CMD_WRITE_2, 0, 0, 0, 0); + + nand_waitReadyBusy(chip, CONFIG_NAND_TMOUT); + + if (!isOperationComplete(chip)) + { + LOG_ERR("nand: error writing page\n"); + chip->status |= NAND_ERR_WRITE; + return false; + } + + return true; +} + + +/* + * Write data, ECC and remap block info. + * + * \param page the page to be written + * \parma original_page if different from page, it's the page that's being remapped + * + * Implementation note for SAM3 NFC controller: + * according to datasheet to get ECC computed by hardware is sufficient + * to write the main area. But it seems that in that way the last ECC_PR + * register is not generated. The workaround is to write data and dummy (ff) + * spare data in one write, at this point the last ECC_PR is correct and + * ECC data can be written in the spare area with a second program operation. + */ +static bool nand_write(Nand *chip, uint32_t page, const void *buf, size_t size) +{ + struct RemapInfo remap_info; + uint32_t *nand_buf = (uint32_t *)nand_dataBuffer(chip); + uint32_t remapped_page = PAGE(chip->block_map[BLOCK(page)]) + PAGE_IN_BLOCK(page); + + ASSERT(size <= CONFIG_NAND_DATA_SIZE); + + if (page != remapped_page) + LOG_INFO("nand_write: remapped block: blk %d->%d, pg %ld->%ld\n", + BLOCK(page), chip->block_map[BLOCK(page)], page, remapped_page); + + // Data + memset(nand_buf, 0xff, NAND_PAGE_SIZE); + memcpy(nand_buf, buf, size); + if (!nand_writePage(chip, remapped_page, 0)) + return false; + + // ECC + memset(nand_buf, 0xff, CONFIG_NAND_SPARE_SIZE); + nand_computeEcc(chip, buf, size, nand_buf, NAND_ECC_NWORDS); + + // Remap info + remap_info.tag = NAND_REMAP_TAG; + remap_info.mapped_blk = BLOCK(page); + memcpy((char *)nand_buf + NAND_REMAP_TAG_OFFSET, &remap_info, sizeof(remap_info)); + + return nand_writePage(chip, remapped_page, CONFIG_NAND_DATA_SIZE); +} + + +/* + * Check if the given block is marked bad: ONFI standard mandates + * that bad block are marked with "00" bytes on the spare area of the + * first page in block. + */ +static bool blockIsGood(Nand *chip, uint16_t blk) +{ + uint8_t *first_byte = (uint8_t *)nand_dataBuffer(chip); + bool good; + + // Check first byte in spare area of first page in block + nand_readPage(chip, PAGE(blk), CONFIG_NAND_DATA_SIZE); + good = *first_byte != 0; + + if (!good) + LOG_INFO("nand: bad block %d\n", blk); + + return good; +} + + +/* + * Return the main partition block remapped on given block in the remap + * partition (dest_blk). + */ +static int getBadBlockFromRemapBlock(Nand *chip, uint16_t dest_blk) +{ + struct RemapInfo *remap_info = (struct RemapInfo *)nand_dataBuffer(chip); + + if (!nand_readPage(chip, PAGE(dest_blk), CONFIG_NAND_DATA_SIZE + NAND_REMAP_TAG_OFFSET)) + return -1; + + if (remap_info->tag == NAND_REMAP_TAG) + return remap_info->mapped_blk; + else + return -1; +} + + +/* + * Set a block remapping: src_blk (a block in main data partition) is remapped + * on dest_blk (block in reserved remapped blocks partition). + */ +static bool setMapping(Nand *chip, uint32_t src_blk, uint32_t dest_blk) +{ + struct RemapInfo *remap_info = (struct RemapInfo *)nand_dataBuffer(chip); + + LOG_INFO("nand, setMapping(): src=%ld dst=%ld\n", src_blk, dest_blk); + + if (!nand_readPage(chip, PAGE(dest_blk), CONFIG_NAND_DATA_SIZE + NAND_REMAP_TAG_OFFSET)) + return false; + + remap_info->tag = NAND_REMAP_TAG; + remap_info->mapped_blk = src_blk; + + return nand_writePage(chip, PAGE(dest_blk), CONFIG_NAND_DATA_SIZE + NAND_REMAP_TAG_OFFSET); +} + + +/* + * Get a new block from the remap partition to use as a substitute + * for a bad block. + */ +static uint16_t getFreeRemapBlock(Nand *chip) +{ + int blk; + + for (blk = chip->remap_start; blk < CONFIG_NAND_NUM_BLOCK; blk++) + { + if (blockIsGood(chip, blk)) + { + chip->remap_start = blk + 1; + return blk; + } + } + + LOG_ERR("nand: reserved blocks for bad block remapping exhausted!\n"); + return 0; +} + + +/* + * Check if NAND is initialized. + */ +static bool chipIsMarked(Nand *chip) +{ + return getBadBlockFromRemapBlock(chip, NAND_NUM_USER_BLOCKS) != -1; +} + + +/* + * Initialize NAND (format). Scan NAND for factory marked bad blocks. + * All found bad blocks are remapped to the remap partition: each + * block in the remap partition used to remap bad blocks is marked. + */ +static void initBlockMap(Nand *chip) +{ + int b, last; + + // Default is for each block to not be remapped + for (b = 0; b < CONFIG_NAND_NUM_BLOCK; b++) + chip->block_map[b] = b; + chip->remap_start = NAND_NUM_USER_BLOCKS; + + if (chipIsMarked(chip)) + { + LOG_INFO("nand: found initialized NAND, searching for remapped blocks\n"); + + // Scan for assigned blocks in remap area + for (b = last = NAND_NUM_USER_BLOCKS; b < CONFIG_NAND_NUM_BLOCK; b++) + { + int remapped_blk = getBadBlockFromRemapBlock(chip, b); + if (remapped_blk != -1 && remapped_blk != b) + { + LOG_INFO("nand: found remapped block %d->%d\n", remapped_blk, b); + chip->block_map[remapped_blk] = b; + last = b + 1; + } + } + chip->remap_start = last; + } + else + { + bool remapped_anything = false; + + LOG_INFO("nand: found new NAND, searching for bad blocks\n"); + + for (b = 0; b < NAND_NUM_USER_BLOCKS; b++) + { + if (!blockIsGood(chip, b)) + { + chip->block_map[b] = getFreeRemapBlock(chip); + setMapping(chip, b, chip->block_map[b]); + remapped_anything = true; + LOG_WARN("nand: found new bad block %d, remapped to %d\n", b, chip->block_map[b]); + } + } + + /* + * If no bad blocks are found (we're lucky!) write anyway a dummy + * remap to mark NAND and detect we already scanned it next time. + */ + if (!remapped_anything) + { + setMapping(chip, NAND_NUM_USER_BLOCKS, NAND_NUM_USER_BLOCKS); + LOG_INFO("nand: no bad block founds, marked NAND\n"); + } + } +} + + +/** + * Reset bad blocks map and erase all blocks. + * + * \note DON'T USE on production chips: this function will try to erase + * factory marked bad blocks too. + */ +void nand_format(Nand *chip) +{ + int b; + + for (b = 0; b < CONFIG_NAND_NUM_BLOCK; b++) + { + LOG_INFO("nand: erasing block %d\n", b); + chip->block_map[b] = b; + nand_blockErase(chip, b); + } + chip->remap_start = NAND_NUM_USER_BLOCKS; +} + +#ifdef _DEBUG + +/* + * Create some bad blocks, erasing them and writing the bad block mark. + */ +void nand_ruinSomeBlocks(Nand *chip) +{ + int bads[] = { 7, 99, 555, 1003, 1004, 1432 }; + unsigned i; + + LOG_INFO("nand: erasing mark\n"); + nand_blockErase(chip, NAND_NUM_USER_BLOCKS); + + for (i = 0; i < countof(bads); i++) + { + LOG_INFO("nand: erasing block %d\n", bads[i]); + nand_blockErase(chip, bads[i]); + + LOG_INFO("nand: marking page %d as bad\n", PAGE(bads[i])); + memset(nand_dataBuffer(chip), 0, CONFIG_NAND_SPARE_SIZE); + nand_writePage(chip, PAGE(bads[i]), CONFIG_NAND_DATA_SIZE); + } +} + +#endif + +static bool commonInit(Nand *chip, struct Heap *heap, unsigned chip_select) +{ + memset(chip, 0, sizeof(Nand)); + + DB(chip->fd.priv.type = KBT_NAND); + chip->fd.blk_size = NAND_BLOCK_SIZE; + chip->fd.blk_cnt = NAND_NUM_USER_BLOCKS; + + chip->chip_select = chip_select; + chip->block_map = heap_allocmem(heap, CONFIG_NAND_NUM_BLOCK * sizeof(*chip->block_map)); + if (!chip->block_map) + { + LOG_ERR("nand: error allocating block map\n"); + return false; + } + + nand_hwInit(chip); + chipReset(chip); + initBlockMap(chip); + + return true; +} + + +/**************** Kblock interface ****************/ + + +static size_t nand_writeDirect(struct KBlock *kblk, block_idx_t idx, const void *buf, size_t offset, size_t size) +{ + ASSERT(offset <= NAND_BLOCK_SIZE); + ASSERT(offset % CONFIG_NAND_DATA_SIZE == 0); + ASSERT(size <= NAND_BLOCK_SIZE); + ASSERT(size % CONFIG_NAND_DATA_SIZE == 0); + + LOG_INFO("nand_writeDirect: idx=%ld offset=%d size=%d\n", idx, offset, size); + + nand_blockErase(NAND_CAST(kblk), idx); + + while (offset < size) + { + uint32_t page = PAGE(idx) + (offset / CONFIG_NAND_DATA_SIZE); + + if (!nand_write(NAND_CAST(kblk), page, buf, CONFIG_NAND_DATA_SIZE)) + break; + + offset += CONFIG_NAND_DATA_SIZE; + buf = (const char *)buf + CONFIG_NAND_DATA_SIZE; + } + + return offset; +} + + +static size_t nand_readDirect(struct KBlock *kblk, block_idx_t idx, void *buf, size_t offset, size_t size) +{ + uint32_t page; + size_t read_size; + size_t read_offset; + size_t nread = 0; + + ASSERT(offset < NAND_BLOCK_SIZE); + ASSERT(size <= NAND_BLOCK_SIZE); + + LOG_INFO("nand_readDirect: idx=%ld offset=%d size=%d\n", idx, offset, size); + + while (nread < size) + { + page = PAGE(idx) + (offset / CONFIG_NAND_DATA_SIZE); + read_offset = offset % CONFIG_NAND_DATA_SIZE; + read_size = MIN(size, CONFIG_NAND_DATA_SIZE - read_offset); + + if (!nand_read(NAND_CAST(kblk), page, (char *)buf + nread, read_offset, read_size)) + break; + + offset += read_size; + nread += read_size; + } + + return nread; +} + + +static int nand_error(struct KBlock *kblk) +{ + Nand *chip = NAND_CAST(kblk); + return chip->status; +} + + +static void nand_clearError(struct KBlock *kblk) +{ + Nand *chip = NAND_CAST(kblk); + chip->status = 0; +} + + +static const KBlockVTable nand_buffered_vt = +{ + .readDirect = nand_readDirect, + .writeDirect = nand_writeDirect, + + .readBuf = kblock_swReadBuf, + .writeBuf = kblock_swWriteBuf, + .load = kblock_swLoad, + .store = kblock_swStore, + + .error = nand_error, + .clearerr = nand_clearError, +}; + +static const KBlockVTable nand_unbuffered_vt = +{ + .readDirect = nand_readDirect, + .writeDirect = nand_writeDirect, + + .error = nand_error, + .clearerr = nand_clearError, +}; + + +/** + * Initialize NAND kblock driver in buffered mode. + */ +bool nand_init(Nand *chip, struct Heap *heap, unsigned chip_select) +{ + if (!commonInit(chip, heap, chip_select)) + return false; + + chip->fd.priv.vt = &nand_buffered_vt; + chip->fd.priv.flags |= KB_BUFFERED; + + chip->fd.priv.buf = heap_allocmem(heap, NAND_BLOCK_SIZE); + if (!chip->fd.priv.buf) + { + LOG_ERR("nand: error allocating block buffer\n"); + return false; + } + + // Load the first block in the cache + return nand_readDirect(&chip->fd, 0, chip->fd.priv.buf, 0, chip->fd.blk_size); +} + + +/** + * Initialize NAND kblock driver in unbuffered mode. + */ +bool nand_initUnbuffered(Nand *chip, struct Heap *heap, unsigned chip_select) +{ + if (!commonInit(chip, heap, chip_select)) + return false; + + chip->fd.priv.vt = &nand_unbuffered_vt; + return true; +} + diff --git a/bertos/drv/nand.h b/bertos/drv/nand.h new file mode 100644 index 0000000..87faf65 --- /dev/null +++ b/bertos/drv/nand.h @@ -0,0 +1,138 @@ +/** +* \file +* +* +* \brief ONFI 1.0 compliant NAND kblock driver +* +* \author Stefano Fedrigo +* +* $WIZ$ module_name = "nand" +* $WIZ$ module_depends = "timer", "kblock", "heap" +* $WIZ$ module_configuration = "bertos/cfg/cfg_nand.h" +* +*/ + +#ifndef DRV_NAND_H +#define DRV_NAND_H + +#include "cfg/cfg_nand.h" +#include + + +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_NAND_LOG_LEVEL +#define LOG_FORMAT CONFIG_NAND_LOG_FORMAT + +/** + * \name Error codes. + * \{ + */ +#define NAND_ERR_ERASE BV(1) ///< Error erasing a block +#define NAND_ERR_WRITE BV(2) ///< Error writing a page +#define NAND_ERR_RD_TMOUT BV(3) ///< Read timeout +#define NAND_ERR_WR_TMOUT BV(4) ///< Write timeout +#define NAND_ERR_ECC BV(5) ///< Unrecoverable ECC error +/** \} */ + + +// NAND commands +#define NAND_CMD_READ_1 0x00 +#define NAND_CMD_READ_2 0x30 +#define NAND_CMD_COPYBACK_READ_1 0x00 +#define NAND_CMD_COPYBACK_READ_2 0x35 +#define NAND_CMD_COPYBACK_PROGRAM_1 0x85 +#define NAND_CMD_COPYBACK_PROGRAM_2 0x10 +#define NAND_CMD_RANDOM_OUT 0x05 +#define NAND_CMD_RANDOM_OUT_2 0xE0 +#define NAND_CMD_RANDOM_IN 0x85 +#define NAND_CMD_READID 0x90 +#define NAND_CMD_WRITE_1 0x80 +#define NAND_CMD_WRITE_2 0x10 +#define NAND_CMD_ERASE_1 0x60 +#define NAND_CMD_ERASE_2 0xD0 +#define NAND_CMD_STATUS 0x70 +#define NAND_CMD_RESET 0xFF + + +/** + * NAND context. + */ +typedef struct Nand +{ + KBlock fd; // KBlock descriptor + + uint8_t chip_select; // Chip select where NAND is connected + uint8_t status; // Status bitmap + + uint16_t *block_map; // For bad blocks remapping + uint16_t remap_start; // First unused remap block +} Nand; + +/* + * Kblock id. + */ +#define KBT_NAND MAKE_ID('N', 'A', 'N', 'D') + +/** +* Convert + ASSERT from generic KBlock to NAND context. +*/ +INLINE Nand *NAND_CAST(KBlock *kb) +{ + ASSERT(kb->priv.type == KBT_NAND); + return (Nand *)kb; +} + +struct Heap; + +// Kblock interface +bool nand_init(Nand *chip, struct Heap *heap, unsigned chip_select); +bool nand_initUnbuffered(Nand *chip, struct Heap *heap, unsigned chip_select); + +// NAND specific functions +bool nand_getDevId(Nand *chip, uint8_t dev_id[5]); +int nand_blockErase(Nand *chip, uint16_t block); +void nand_format(Nand *chip); + +#ifdef _DEBUG +void nand_ruinSomeBlocks(Nand *chip); +#endif + +// Hardware specific functions, implemented by cpu specific module +bool nand_waitReadyBusy(Nand *chip, time_t timeout); +bool nand_waitTransferComplete(Nand *chip, time_t timeout); +void nand_sendCommand(Nand *chip, uint32_t cmd1, uint32_t cmd2, + int num_cycles, uint32_t cycle0, uint32_t cycle1234); +uint8_t nand_getChipStatus(Nand *chip); +void *nand_dataBuffer(Nand *chip); +bool nand_checkEcc(Nand *chip); +void nand_computeEcc(Nand *chip, const void *buf, size_t size, uint32_t *ecc, size_t ecc_size); +void nand_hwInit(Nand *chip); + +#endif /* DRV_NAND_H */ diff --git a/bertos/drv/ntc.c b/bertos/drv/ntc.c new file mode 100644 index 0000000..8f03732 --- /dev/null +++ b/bertos/drv/ntc.c @@ -0,0 +1,154 @@ +/** + * \file + * + * + * \brief Driver for NTC (reads a temperature through an ADC) + * + * \author Giovanni Bajo + * \author Francesco Sacchi + * + * + * This module handles an external NTC bound to an AD converter. As usual, + * it relies on a low-level API (ntc_hw_*) (see below): + * + */ + +#include "hw/hw_ntc.h" +#include "hw/ntc_map.h" + +#include "cfg/cfg_ntc.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL CONFIG_NTC_LOG_LEVEL +#define LOG_VERBOSITY CONFIG_NTC_LOG_FORMAT +#include +#include + +#include + +DB(bool ntc_initialized;) + +/** + * Find in a table of values \a orig_table of size \a size, the index which + * value is less or equal to \a val. + * + * \retval 0 When \a val is higher than the first table entry. + * \retval size When \a val is lower than the last table entry. + * \retval 1..size-1 When \a val is within the table. + */ +static size_t upper_bound(const res_t *orig_table, size_t size, res_t val) +{ + const res_t *table = orig_table; + + while (size) + { + size_t pos = size / 2; + if (val > table[pos]) + size = pos; + else + { + table += pos+1; + size -= pos+1; + } + } + + return table - orig_table; +} + + +/** + * Read the temperature for the NTC channel \a dev. + * First read the resistence of the NTC through ntc_hw_read(), then, + * for the conversion from resistance to temperature, since the formula + * varies from device to device, we implemented a generic system using + * a table of data which maps temperature (index) to resistance (data). + * The range of the table (min/max temperature) and the step + * (temperature difference between two consecutive elements of the table) + * is variable and can be specified. Notice that values inbetween the + * table elements are still possible as the library does a linear + * interpolation using the actual calculated resistance to find out + * the exact temperature. + * + * The low-level API provides a function to get access to a description + * of the NTC (ntc_hw_getInfo()), including the resistance table. + * + */ +deg_t ntc_read(NtcDev dev) +{ + const NtcHwInfo* hw = ntc_hw_getInfo(dev); + const res_t* r = hw->resistances; + + res_t rx; + size_t i; + deg_t degrees = 0; + + rx = ntc_hw_read(dev); + + + i = upper_bound(r, hw->num_resistances, rx); + ASSERT(i <= hw->num_resistances); + + if (i >= hw->num_resistances) + return NTC_SHORT_CIRCUIT; + else if (i == 0) + return NTC_OPEN_CIRCUIT; + + /* + * Interpolated value in 0.1 degrees multiplied by 10: + * delta t step t + * ---------- = ---------------- + * (rx - r[i]) (r[i-1] - r [i]) + */ + float tmp; + tmp = 10 * hw->degrees_step * (rx - r[i]) / (r[i - 1] - r[i]); + + /* + * degrees = integer part corresponding to the superior index + * in the table multiplied by 10 + * - decimal part interpolated (already multiplied by 10) + */ + degrees = (i * hw->degrees_step + hw->degrees_min) * 10 - (int)(tmp); + + //kprintf("dev= %d, I=%d, degrees = %d\n", dev, i , degrees); + + return degrees; +} + + +/** + * Init NTC hardware. + */ +void ntc_init(void) +{ + NTC_HW_INIT; + DB(ntc_initialized = true;) +} + diff --git a/bertos/drv/ntc.h b/bertos/drv/ntc.h new file mode 100644 index 0000000..d1ba3b2 --- /dev/null +++ b/bertos/drv/ntc.h @@ -0,0 +1,90 @@ +/** + * \file + * + * + * \brief Driver for NTC sensors (reads a temperature through an ADC). + * + * + * \author Giovanni Bajo + * \author Francesco Sacchi + * + * $WIZ$ module_name = "ntc" + * $WIZ$ module_hw = "bertos/hw/hw_ntc.h", "bertos/hw/ntc_map.h", "bertos/hw/hw_ntc.c" + */ + +#ifndef DRV_NTC_H +#define DRV_NTC_H + +#include "hw/ntc_map.h" + +#include +#include + +#define NTC_OPEN_CIRCUIT -32768 +#define NTC_SHORT_CIRCUIT 32767 + +typedef int16_t deg_t; /** type for celsius degrees deg_t = °C * 10 */ + +/** Macro for converting from deg to deg_t type */ +#define DEG_TO_DEG_T(x) ((deg_t)((x) * 10)) + +/** Macro for converting from deg_t to celsius degrees (returns only the integer part) */ +#define DEG_T_TO_INTDEG(x) ((x) / 10) + +/** Macro for converting from deg_t to celsius degrees (returns only the decimal part) */ +#define DEG_T_TO_DECIMALDEG(x) ((x) % 10) + +/** Macro for converting from deg_t to celsius degrees (returns type is float) */ +#define DEG_T_TO_FLOATDEG(x) ((x) / 10.0) + + +typedef uint32_t res_t; /** type for resistor res_t = Ohm * 100 */ +typedef float amp_t; /** type for defining amplifications amp_t = A, where A is a pure number */ + +DB(extern bool ntc_initialized;) + + +/** Describe a NTC chip */ +typedef struct NtcHwInfo +{ + const res_t *resistances; ///< resistances of the NTC (ohms * 100) + size_t num_resistances; ///< number of resistances + deg_t degrees_min; ///< degrees corresponding to the first entry in the table (celsius * 10) + deg_t degrees_step; ///< difference in degrees between two consecutive elements in the table (celsius * 10) +} NtcHwInfo; + +/** Initialize the NTC module */ +void ntc_init(void); + +/** Read a single temperature value from the NTC */ +deg_t ntc_read(NtcDev dev); + +#endif /* DRV_NTC_H */ diff --git a/bertos/drv/pcf8574.c b/bertos/drv/pcf8574.c new file mode 100644 index 0000000..7c5cf16 --- /dev/null +++ b/bertos/drv/pcf8574.c @@ -0,0 +1,96 @@ +/** + * \file + * + * + * \brief PCF8574 i2c port expander driver. + * + * This driver controls the PCF8574. + * The PCF8574 is an 8bit i2c port expander. + * You can read/write 8 pins through an i2c bus. + * The pins are quasi-bidirectionals, this mean that + * without the need of a direction register you can use + * each pin as input or output, see datasheet on how this + * is achieved. + * + * \author Francesco Sacchi + */ + +#include "pcf8574.h" + +#include "cfg/cfg_i2c.h" + +#include + +#include + +/** + * Read PCF8574 \a pcf bit status. + * \return the pins status or EOF on errors. + */ +int pcf8574_get_2(I2c *i2c, Pcf8574 *pcf) +{ + i2c_start_r(i2c, PCF8574ID | ((pcf->addr << 1) & 0xF7), 1, I2C_STOP); + + int data = i2c_getc(i2c); + + if (i2c_error(i2c)) + data = EOF; + + return data; +} + +/** + * Write to PCF8574 \a pcf port \a data. + * \return true if ok, false on errors. + */ +bool pcf8574_put_3(I2c *i2c, Pcf8574 *pcf, uint8_t data) +{ + i2c_start_w(i2c, PCF8574ID | ((pcf->addr << 1) & 0xF7), 1, I2C_STOP); + i2c_putc(i2c, data); + + if (i2c_error(i2c)) + return false; + + return true; +} + +/** + * Init a PCF8574 on the bus with addr \a addr. + * \return true if device is found, false otherwise. + */ +bool pcf8574_init_3(I2c *i2c, Pcf8574 *pcf, pcf8574_addr addr) +{ + ASSERT(i2c); + pcf->addr = addr; + + return (pcf8574_get(i2c, pcf) != EOF); +} + diff --git a/bertos/drv/pcf8574.h b/bertos/drv/pcf8574.h new file mode 100644 index 0000000..dd33ed4 --- /dev/null +++ b/bertos/drv/pcf8574.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \brief PCF8574 i2c port expander driver. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "pcf8574" + * $WIZ$ module_depends = "i2c" + */ + +#ifndef DRV_PCF8574_H +#define DRV_PCF8574_H + +#include "cfg/cfg_i2c.h" + +#include + +#include + +#if COMPILER_C99 + #define pcf8574_init(...) PP_CAT(pcf8574_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) + #define pcf8574_get(...) PP_CAT(pcf8574_get ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) + #define pcf8574_put(...) PP_CAT(pcf8574_put ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) +#else + #define pcf8574_init(args...) PP_CAT(pcf8574_init ## _, COUNT_PARMS(args)) (args) + #define pcf8574_get(args...) PP_CAT(pcf8574_get ## _, COUNT_PARMS(args)) (args) + #define pcf8574_put(args...) PP_CAT(pcf8574_put ## _, COUNT_PARMS(args)) (args) +#endif + +typedef uint8_t pcf8574_addr; + +/** + * Context for accessing a PCF8574. + */ +typedef struct Pcf8574 +{ + pcf8574_addr addr; +} Pcf8574; + +#define PCF8574ID 0x40 ///< I2C address + +/** + * Read PCF8574 \a pcf bit status. + * \return the pins status or EOF on errors. + */ +int pcf8574_get_2(I2c *i2c, Pcf8574 *pcf); + +/** + * Write to PCF8574 \a pcf port \a data. + * \return true if ok, false on errors. + */ +bool pcf8574_put_3(I2c *i2c, Pcf8574 *pcf, uint8_t data); + +/** + * Init a PCF8574 on the bus with addr \a addr. + * \return true if device is found, false otherwise. + */ +bool pcf8574_init_3(I2c *i2c, Pcf8574 *pcf, pcf8574_addr addr); + +#if !CONFIG_I2C_DISABLE_OLD_API + +DEPRECATED INLINE int pcf8574_get_1(Pcf8574 *pcf) +{ + return pcf8574_get_2(&local_i2c_old_api, pcf); +} + +DEPRECATED INLINE bool pcf8574_put_2(Pcf8574 *pcf, uint8_t data) +{ + return pcf8574_put_3(&local_i2c_old_api, pcf, data); +} + +DEPRECATED INLINE bool pcf8574_init_2(Pcf8574 *pcf, pcf8574_addr addr) +{ + return pcf8574_init_3(&local_i2c_old_api, pcf, addr); +} +#endif /* !CONFIG_I2C_DISABLE_OLD_API */ + +#endif /* DRV_PCF8574_H */ diff --git a/bertos/drv/phase.c b/bertos/drv/phase.c new file mode 100644 index 0000000..275b133 --- /dev/null +++ b/bertos/drv/phase.c @@ -0,0 +1,191 @@ +/** + * \file + * + * + * \brief Phase control driver (implementation) + * + * + * \author Francesco Sacchi + */ + + +#include "hw/hw_phase.h" + +#include +#include + +#include +#include + +#include +#include + +#include + +/** Array of triacs */ +static Triac triacs[TRIAC_CNT]; + +DB(bool phase_initialized;) + +/** + * Zerocross interrupt, call when 220V cross zero. + * + * This function turn off all triacs that have duty < 100% + * and arm the triac timers for phase control. + * This function is frequency adaptive so can work both at 50 or 60Hz. + */ +DEFINE_ZEROCROSS_ISR() +{ + ticks_t period, now; + static ticks_t prev_time; + TriacDev dev; + + now = timer_clock_unlocked(); + period = now - prev_time; + + for (dev = 0; dev < TRIAC_CNT; dev++) + { + /* Only turn off triac if duty is != 100% */ + if (triacs[dev].duty != CONFIG_TRIAC_MAX_DUTY) + TRIAC_OFF(dev); + /* Compute delay from duty */ + timer_setDelay(&triacs[dev].timer, DIV_ROUND(period * (CONFIG_TRIAC_MAX_DUTY - triacs[dev].duty), CONFIG_TRIAC_MAX_DUTY)); + + /* This check avoids inserting the same timer twice + * in case of an intempestive zerocross or spike */ + if (triacs[dev].running) + { + timer_abort(&triacs[dev].timer); + //kprintf("[%lu]\n", timer_clock()); + } + + triacs[dev].running = true; + timer_add(&triacs[dev].timer); + } + prev_time = now; +} + + + +/** + * Set duty of the triac channel \a dev (interrupt safe). + */ +void phase_setDuty(TriacDev dev, triac_duty_t duty) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + phase_setDutyUnlock(dev,duty); + + IRQ_RESTORE(flags); +} + + + +/** + * Set duty of the triac channel \a dev (NOT INTERRUPT SAFE). + */ +void phase_setDutyUnlock(TriacDev dev, triac_duty_t duty) +{ + triacs[dev].duty = MIN(duty, (triac_duty_t)CONFIG_TRIAC_MAX_DUTY); +} + + + +/** + * Set power of the triac channel \a dev (interrupt safe). + * + * This function approsimate the sine wave to a triangular wave to compute + * RMS power. + */ +void phase_setPower(TriacDev dev, triac_power_t power) +{ + bool greater_fifty = false; + triac_duty_t duty; + + power = MIN(power, (triac_power_t)CONFIG_TRIAC_MAX_POWER); + + if (power > CONFIG_TRIAC_MAX_POWER / 2) + { + greater_fifty = true; + power = CONFIG_TRIAC_MAX_POWER - power; + } + + duty = TRIAC_POWER_K * sqrt(power); + + if (greater_fifty) + duty = CONFIG_TRIAC_MAX_DUTY - duty; + phase_setDuty(dev, duty); +} + + + +/** + * Soft int for each \a _dev triac. + * + * The triacs are turned on at different time to achieve phase control. + */ +static void phase_softint(void *_dev) +{ + TriacDev dev = (TriacDev)_dev; + + /* Only turn on if duty is !=0 */ + if (triacs[dev].duty) + TRIAC_ON(dev); + triacs[dev].running = false; +} + + + +/** + * Initialize phase control driver + */ +void phase_init(void) +{ + cpu_flags_t flags; + TriacDev dev; + + /* Init timers and ensure that all triac are off */ + for (dev = 0; dev < TRIAC_CNT; dev++) + { + triacs[dev].duty = 0; + triacs[dev].running = false; + SET_TRIAC_DDR(dev); + TRIAC_OFF(dev); + timer_setSoftint(&triacs[dev].timer, (Hook)phase_softint, (void *)dev); + } + IRQ_SAVE_DISABLE(flags); + + /* Init zero cross interrupt */ + PHASE_HW_INIT; + DB(phase_initialized = true;) + IRQ_RESTORE(flags); +} + diff --git a/bertos/drv/phase.h b/bertos/drv/phase.h new file mode 100644 index 0000000..fc894be --- /dev/null +++ b/bertos/drv/phase.h @@ -0,0 +1,84 @@ +/** + * \file + * + * + * + * \brief Phase partialization driver with TRIACs. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "phase" + * $WIZ$ module_depends = "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_phase.h" + * $WIZ$ module_hw = "bertos/hw/hw_phase.h", "bertos/hw/phase_map.h", "bertos/hw/hw_phase.c" + */ + +#ifndef DRV_PHASE_H +#define DRV_PHASE_H + +#include "hw/phase_map.h" + +#include "cfg/cfg_phase.h" + +#include + +#define TRIAC_POWER_K CONFIG_TRIAC_MAX_DUTY * (1 / sqrt(2 * CONFIG_TRIAC_MAX_POWER)) + +/** + * \name Types for duty and power. + * \{ + */ +typedef uint16_t triac_duty_t; +typedef uint16_t triac_power_t; +/* \} */ + + +DB(extern bool phase_initialized;) + +/** + * \name Type for triac control. + * \{ + */ +typedef struct Triac +{ + Timer timer; /**< Timer for phase control. */ + triac_duty_t duty; /**< Duty cycle of the channel. */ + bool running; /**< True when the timer is active. */ +} Triac; +/* \} */ + +void phase_setDutyUnlock(TriacDev dev, triac_duty_t duty); +void phase_setDuty(TriacDev dev, triac_duty_t duty); +void phase_setPower(TriacDev dev, triac_power_t power); + +void phase_init(void); + + +#endif /* DRV_PHASE_H */ diff --git a/bertos/drv/pwm.c b/bertos/drv/pwm.c new file mode 100644 index 0000000..2448f56 --- /dev/null +++ b/bertos/drv/pwm.c @@ -0,0 +1,247 @@ +/** + * \file + * + * + * + * \brief PWM driver (implementation) + * + * + * \author Francesco Sacchi + * \author Daniele Basile + */ + +#include "cfg/cfg_pwm.h" + +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL PWM_LOG_LEVEL +#define LOG_VERBOSITY PWM_LOG_FORMAT + +#include +#include + +#include + +#include CPU_HEADER(pwm) + +#include +#include + +#include + +#if CFG_PWM_ENABLE_OLD_API + + /** + * Set duty of PWM channel \p dev. + * The current output frequency will be maintained. + * \param dev PWM channel. + * \param duty the new duty cycle. + */ + void pwm_setDuty(PwmDev dev, pwm_duty_t duty) + { + pwm_period_t period = 0; + pwm_duty_t real_duty = 0; + + duty = MIN(duty, PWM_MAX_DUTY); + + period = pwm_hw_getPeriod(dev); + + real_duty = (uint64_t)(duty * period) >> (uint64_t)PWM_MAX_PERIOD_LOG2; + + LOG_INFO("real_duty[%d] duty[%d], period[%d]\n", real_duty, duty, period); + pwm_hw_setDutyUnlock(dev, real_duty); + } + + /** + * Set frequency of PWM channel \p dev at \p freq. + * \param dev PWM channel. + * \param freq new frequency, in Hz. + * \warning This function has to be called with PWM disabled, otherwise + * the output value will be undefined. + * The current duty cycle value will be lost, after calling this + * function the duty cycle have to be set again. + */ + void pwm_setFrequency(PwmDev dev, pwm_freq_t freq) + { + pwm_hw_setFrequency(dev, freq); + } + + /** + * Enable/Disable PWM channel \p dev. + * \param dev PWM channel. + * \param state if true the PWM on \p dev is activated, if false is disabled. + */ + void pwm_enable(PwmDev dev, bool state) + { + if (state) + pwm_hw_enable(dev); + else + pwm_hw_disable(dev); + } + + MOD_DEFINE(pwm); + + /** + * Initialize the PWM driver. + * \warning all available PWM channels are initialized. + */ + void pwm_init(void) + { + cpu_flags_t flags; + PwmDev dev; + + IRQ_SAVE_DISABLE(flags); + + pwm_hw_init(); + + /* set all pwm to 0 */ + for (dev = 0; dev < PWM_CNT; dev++) + pwm_setDuty(dev, 0); + + IRQ_RESTORE(flags); + MOD_INIT(pwm); + } +#endif + +#if !CFG_PWM_ENABLE_OLD_API || defined(__doxygen__) + + INLINE void setRealDuty(Pwm *ctx, pwm_duty_t duty) + { + if (ctx->pol == PWM_POL_LOW_PULSE) + duty = PWM_MAX_DUTY - duty; + + pwm_hwreg_t period = pwm_hw_getPeriod(ctx); + pwm_hwreg_t hw_duty; + + switch (duty) + { + case 0: + hw_duty = 0; + break; + case PWM_MAX_DUTY: + hw_duty = period; + break; + default: + hw_duty = (uint64_t)(duty * period) >> (uint64_t)PWM_MAX_PERIOD_LOG2; + } + + pwm_hw_setDuty(ctx, hw_duty); + } + + /** + * Set the duty cycle of the PWM channel linked to \p ctx. + * The modification will be applied to the channel immediatly. + * The current frequency of the channel will be maintained. + * \param ctx PWM channel context. + * \param duty the new duty cycle value. + * \see pwm_duty_t + */ + void pwm_setDuty(Pwm *ctx, pwm_duty_t duty) + { + ctx->duty = duty; + + if (ctx->enabled) + setRealDuty(ctx, duty); + } + + /** + * Set PWM frequency of channel linked to \p ctx. + * The modification will be applied to the channel immediatly. + * The duty cycle of the channel will be maintained. + * \param ctx PWM channel context. + * \param freq the new frequency of the signal, in Hz. + * \note Depending on the hardware implementation, this function may + * generate a glitch in the output signal upon frequency changing. + */ + void pwm_setFrequency(Pwm *ctx, pwm_freq_t freq) + { + pwm_hw_setFrequency(ctx, freq); + pwm_enable(ctx, ctx->enabled); + } + + /** + * Set PWM polarity of pwm channel linked to \p ctx. + * The modification will be applied to the channel immediatly. + * \param ctx PWM channel context. + * \param pol the new polarity of the signal. + * + * \note if a channel is disabled, changing its polarity will change the + * current steady output level. + * \see pwm_enable + * \see PwmPolarity + */ + void pwm_setPolarity(Pwm *ctx, PwmPolarity pol) + { + ctx->pol = pol; + pwm_enable(ctx, ctx->enabled); + } + + /** + * Enable/Disable the pwm channel linked to \p ctx. + * The modification will be applied to the channel immediatly. + * \param ctx PWM channel context. + * \param enable if true the channel will be enabled, if false will be disabled. + * + * \note When a PWM channel is disabled, the output level will be the same + * as if the duty would be set to 0%. + * So, if current polarity is positive, a disabled channel will be + * low, if polarity is negative will be high. + * \see pwm_setPolarity + */ + void pwm_enable(Pwm *ctx, bool enable) + { + ctx->enabled = enable; + + if (enable) + setRealDuty(ctx, ctx->duty); + else + setRealDuty(ctx, 0); + } + + /** + * Initialize PWM driver. + * \param ctx pointer to a PWM context structure, used for holding PWM + * driver related information. + * \param channel the channel you want to initialize. + * \note The channel will be initialized disabled and with High polarity. + */ + void pwm_init(Pwm *ctx, unsigned channel) + { + memset(ctx, 0, sizeof(*ctx)); + ctx->ch = channel; + + pwm_hw_init(ctx, channel); + } + +#endif + + diff --git a/bertos/drv/pwm.h b/bertos/drv/pwm.h new file mode 100644 index 0000000..4ed32f8 --- /dev/null +++ b/bertos/drv/pwm.h @@ -0,0 +1,178 @@ +/** + * \file + * + * \defgroup pwm_driver PWM driver + * \ingroup drivers + * \{ + * \brief Pulse Width Modulation (PWM) driver. + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * $WIZ$ module_name = "pwm" + * $WIZ$ module_configuration = "bertos/cfg/cfg_pwm.h" + * $WIZ$ module_hw = "bertos/hw/pwm_map.h" + * $WIZ$ module_supports = "not avr and not cm3" + */ + +#ifndef DRV_PWM_H +#define DRV_PWM_H + +#include + +#include +#include "cfg/cfg_pwm.h" + +/** + * Maximum PWM duty cycle value (100%) + */ +#define PWM_MAX_DUTY ((pwm_duty_t)0xFFFF) +#define PWM_MAX_PERIOD 0xFFFF +#define PWM_MAX_PERIOD_LOG2 16 + +/** + * Type for PWM duty cycle. + * The value is represented as a 16bit unsigned integer, so it ranges from 0 (0%) + * to PWM_MAX_DUTY (0xFFFF = 100%). + */ +typedef uint16_t pwm_duty_t; + +/** + * Type for PWM frequency. + * Unit of measure is Hz. + */ +typedef uint32_t pwm_freq_t; + +#if !CFG_PWM_ENABLE_OLD_API || defined(__doxygen__) + /** + * \defgroup pwm_api PWM API + * With this driver you can control a device with multiple PWM channels. + * You can enable/disable each channel indipendently and also set frequency + * and duty cycle. + * + * API usage example: + * \code + * Pwm pwm; // declare a context structure + * pwm_init(&pwm, 0); // init pwm channel 0 + * pwm_setFrequency(&pwm, 1000); // Set frequency of channel 0 to 1000Hz + * pwm_setDuty(&pwm, 0x7FFF); // Set duty to 50% (0xFFFF/2) + * pwm_enable(&pwm, true); // Activate the output + * \endcode + * \{ + */ + + /** + * Enum describing PWM polarities. + */ + typedef enum PwmPolarity + { + /** High pulse: increasing duty increases the part of the signal at high level. */ + PWM_POL_HIGH_PULSE, + /** Positive pulse: same as High pulse. */ + PWM_POL_POSITIVE = PWM_POL_HIGH_PULSE, + /** Low pulse: increasing duty increases the part of the signal at low level. */ + PWM_POL_LOW_PULSE, + /** Negative pulse: same as Low pulse. */ + PWM_POL_NEGATIVE = PWM_POL_LOW_PULSE, + } PwmPolarity; + + struct PwmHardware; //Fwd declaration + + /** + * PWM context structure. + */ + typedef struct Pwm + { + unsigned ch; + pwm_duty_t duty; + PwmPolarity pol; + bool enabled; + struct PwmHardware *hw; + } Pwm; + + void pwm_setDuty(Pwm *ctx, pwm_duty_t duty); + void pwm_setFrequency(Pwm *ctx, pwm_freq_t freq); + void pwm_setPolarity(Pwm *ctx, PwmPolarity pol); + void pwm_enable(Pwm *ctx, bool state); + void pwm_init(Pwm *ctx, unsigned channel); + /** \} */ //defgroup pwm_api +#endif + + +#if CFG_PWM_ENABLE_OLD_API + /** + * \defgroup pwm_old_api Old PWM API + * This API has strong limititations, so it has been deprecated. + * It is active by default for backward compatibility reasons, but + * for new projects please use the new PWM API. + * In order to disable this API, check CFG_PWM_ENABLE_OLD_API. + * \see pwm_api + * \see CFG_PWM_ENABLE_OLD_API + * \{ + */ + + #include CPU_HEADER(pwm) + #include "hw/pwm_map.h" + + /** + * Set PWM polarity of pwm \p dev. + * \param dev PWM channel. + * \param pol if false positive polarity pulses are generated, + * if true negative polarity pulses are generated. + * \warning This function has to be called with PWM disabled, otherwise + * the output value will be undefined. + */ + INLINE void pwm_setPolarity(PwmDev dev, bool pol) + { + pwm_hw_setPolarity(dev, pol); + } + + void pwm_setDuty(PwmDev dev, pwm_duty_t duty); + void pwm_setFrequency(PwmDev dev, pwm_freq_t freq); + void pwm_enable(PwmDev dev, bool state); + void pwm_init(void); + /** \} */ //defgroup pwm_old_api +#endif + +/* + * Test function prototypes. + * + * See pwm_test.c for implemntation of these functions. + */ +void pwm_testRun(void); +int pwm_testSetup(void); +/* For backward compatibility */ +#define pwm_testSetUp() pwm_testSetup() +int pwm_testTearDown(void); + + +/** \} */ //defgroup pwm_driver + +#endif /* DRV_PWM_H */ diff --git a/bertos/drv/pwm_hwtest.c b/bertos/drv/pwm_hwtest.c new file mode 100644 index 0000000..13cf8f8 --- /dev/null +++ b/bertos/drv/pwm_hwtest.c @@ -0,0 +1,238 @@ +/** + * \file + * + * + * + * \brief Test for PWM driver (implementation) + * + * This is a simple test for PWM driver. This module + * is target independent, so you can test all target that + * BeRTOS support. + * To use this test you should include a pwm_map.h header where + * are defined the PWM channels for your target. Then you should add + * or remove a test setting in pwm_test_cfg array, and edit a value for + * your specific test. + * Afther this, all is ready and you can test PWM driver. + * + * The test check first if all PWM channel starts, and then try + * to change a PWM duty cicle for all channel. + * The change of duty cycle is operate when a PWM channel is enable, + * in this way you can see if a pwm signal is clean and work properly. + * The duty value is change incrementaly, and when it arrive to 100% or 0%, + * we reset the duty value and restart the test. + * Further the duty test, we check also a PWM polarity, infact when we + * reach a reset duty value, we invert a polary of PWM wavform. + * So you can see if the hardware manage correctly this situation. + * + * Note: To be simple and target independently we not use a timer module, + * and so the delay is do with a for cycle. + * + * \author Daniele Basile + */ + +#include "hw/pwm_map.h" // For PwmDev and channel avaible on thi target +#include "cfg/cfg_pwm.h" +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL PWM_LOG_LEVEL +#define LOG_FORMAT PWM_LOG_FORMAT +#include // for logging system + +#include +#include + +#include +#include CPU_HEADER(pwm) + +#define DELAY_TIME 10000 // This is a number of for cycle before to set a new value of duty +#define PWM_DUTY_INC 200 // Incremental value for duty + + +/* + * Simple struct to store + * the testing value. + */ +typedef struct PwmTest +{ + int ch; + bool pol; + pwm_freq_t freq; + pwm_duty_t duty; +} PwmTest; + +/* + * Test settings for each channel. + * + * Frequency value is in Hz. + * + * Esample of value for duty cycle" + * + * - 100% => 0xFFFFFFFF + * - 80% => 0xCCCCCCCC + * - 75% => 0xBFFFFFFF + * - 50% => 0x7FFFFFFF + * - 25% => 0x3FFFFFFF + * - 33% => 0x55555555 + * - 16% => 0x2AAAAAAA + */ +static PwmTest pwm_test_cfg[PWM_CNT] = +{ + /* Channel, polarity, frequecy, duty */ + { 0, false, 100UL, 0 }, /* 100Hz, 0% duty */ + { 1, false, 1000UL, 0x7FFF }, /* 1KHz, 50% duty */ + { 2, false, 12356UL, 0x5555 }, /* 12,356KHz, 33% duty */ + { 3, false, 100000UL, 0xCCCC } /* 100KHz, 80% duty */ +}; + +/* + * Setup all needed to test PWM on AT91 + * + */ +int pwm_testSetup(void) +{ + LOG_INFO("Init pwm.."); + pwm_init(); + LOG_INFO("done.\n"); + + return 0; +} + + +/* + * Test suit for genation of pwm waveform. + * + */ +void NORETURN pwm_testRun(void) +{ + pwm_duty_t duty = 0; + int delay = 0; + + pwm_testSetup(); + + LOG_INFO("\n\n===== BeRTOS PWM test =====\n\n"); + + for (int i = 0; i < PWM_CNT; i++) + { + LOG_INFO("PWM test ch[%d]\n", pwm_test_cfg[i].ch); + LOG_INFO("--> set pol[%d]", pwm_test_cfg[i].pol); + LOG_INFO("\n(Note: if polarity is false the output waveform start at high level,\n see low level implentation for detail)i\n"); + pwm_setPolarity(pwm_test_cfg[i].ch, pwm_test_cfg[i].pol); + LOG_INFO("..ok\n"); + + LOG_INFO("--> set freq[%ld]", pwm_test_cfg[i].freq); + pwm_setFrequency(pwm_test_cfg[i].ch, pwm_test_cfg[i].freq); + LOG_INFO("..ok\n"); + + LOG_INFO("--> set duty[%d]", pwm_test_cfg[i].duty); + pwm_setDuty(pwm_test_cfg[i].ch, pwm_test_cfg[i].duty); + LOG_INFO("..ok\n"); + + LOG_INFO("--> Enable pwm"); + pwm_enable(pwm_test_cfg[i].ch, true); + LOG_INFO("..ok\n"); + } + + LOG_INFO("\n-------------------------- Dinamic PWM test --------------------------\n"); + LOG_INFO("We test if driver change correctly the duty cycle durind it working.\n"); + LOG_INFO("On your oscilloscope you should see the pwm singal that increase until\n"); + LOG_INFO("the duty value is 100%%. After this value we invert a polarity of pwm,\n"); + LOG_INFO("and repeat the test. But now you should see that pwm duty decreasing until\n"); + LOG_INFO("0%% duty value.\nAfter that, we repeat the test from beginning.\n\n"); + + for (;;) + { + if (delay == DELAY_TIME) + { + for (int i = 0; i < PWM_CNT; i++) + { + LOG_INFO("PWM test ch[%d]\n", pwm_test_cfg[i].ch); + LOG_INFO("--> set duty[%d]", duty); + pwm_setDuty(pwm_test_cfg[i].ch, duty); + LOG_INFO("..ok\n"); + } + LOG_INFO("\n++++++++++++++++++++\n"); + duty += PWM_DUTY_INC; + delay = 0; + } + + //Reset duty cycle overflow + if (duty >= (pwm_duty_t)0xFFFF) + { + duty = 0; + for (int i = 0; i < PWM_CNT; i++) + { + LOG_INFO("Duty reset, swap polarity:\n"); + LOG_INFO("--> pol from [%d] to [%d]", pwm_test_cfg[i].pol, !pwm_test_cfg[i].pol); + + pwm_test_cfg[i].pol = !pwm_test_cfg[i].pol; + pwm_setPolarity(pwm_test_cfg[i].ch, pwm_test_cfg[i].pol); + + LOG_INFO("..ok\n"); + } + LOG_INFO("\n++++++++++++++++++++\n"); + } + delay++; + } +} + +/* + * End a PWM Test. + * (Unused) + */ +int pwm_testTearDown(void) +{ + /* */ + return 0; +} + +/* + * Empty main. + * + * Look it as exmple or use it if + * you want test a PWM driver stand alone. + */ +#if 0 +int main(void) +{ + IRQ_ENABLE; + kdbg_init(); + + pwm_testRun(); + + for(;;) + { + } + +} +#endif + + diff --git a/bertos/drv/rtc.h b/bertos/drv/rtc.h new file mode 100644 index 0000000..d8c8fae --- /dev/null +++ b/bertos/drv/rtc.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Real-time clock interface + * + * Abstract real-time clock interface. + * + * \attention The API is work in progress and may change in future versions. + * + * $WIZ$ module_name = "rtc" + * $WIZ$ module_supports = "stm32" + */ + +#ifndef RTC_H +#define RTC_H + +#include + +typedef uint32_t rtc_clock_t; + +rtc_clock_t rtc_time(void); + +void rtc_setTime(rtc_clock_t date); + +int rtc_init(void); + +#endif /* RTC_H */ diff --git a/bertos/drv/sd.c b/bertos/drv/sd.c new file mode 100644 index 0000000..c12d759 --- /dev/null +++ b/bertos/drv/sd.c @@ -0,0 +1,529 @@ +/** + * \file + * + * + * \brief Function library for secure digital memory. + * + * \author Francesco Sacchi + */ + + +#include "sd.h" +#include "hw/hw_sd.h" +#include +#include +#include + +#include + +#include "cfg/cfg_sd.h" + +#define LOG_LEVEL SD_LOG_LEVEL +#define LOG_FORMAT SD_LOG_FORMAT +#include +#include + +#include /* memset */ + +/** + * Card Specific Data + * read directly from the card. + */ +typedef struct CardCSD +{ + uint16_t block_len; ///< Length of a block + uint32_t block_num; ///< Number of block on the card + uint16_t capacity; ///< Card capacity in MB +} CardCSD; + +#define SD_IN_IDLE 0x01 +#define SD_STARTTOKEN 0xFE + +#define TIMEOUT_NAC 16384 +#define SD_DEFAULT_BLOCKLEN 512 + +#define SD_BUSY_TIMEOUT ms_to_ticks(200) + +static bool sd_select(Sd *sd, bool state) +{ + KFile *fd = sd->ch; + + if (state) + { + SD_CS_ON(); + + ticks_t start = timer_clock(); + do + { + if (kfile_getc(fd) == 0xff) + return true; + + cpu_relax(); + } + while (timer_clock() - start < SD_BUSY_TIMEOUT); + + SD_CS_OFF(); + LOG_ERR("sd_select timeout\n"); + return false; + } + else + { + kfile_putc(0xff, fd); + kfile_flush(fd); + SD_CS_OFF(); + return true; + } +} + +static int16_t sd_waitR1(Sd *sd) +{ + uint8_t datain; + + for (int i = 0; i < TIMEOUT_NAC; i++) + { + datain = kfile_getc(sd->ch); + if (datain != 0xff) + return (int16_t)datain; + } + LOG_ERR("Timeout waiting R1\n"); + return EOF; +} + +static int16_t sd_sendCommand(Sd *sd, uint8_t cmd, uint32_t param, uint8_t crc) +{ + KFile *fd = sd->ch; + /* The 7th bit of command must be a 1 */ + kfile_putc(cmd | 0x40, fd); + + /* send parameter */ + kfile_putc((param >> 24) & 0xFF, fd); + kfile_putc((param >> 16) & 0xFF, fd); + kfile_putc((param >> 8) & 0xFF, fd); + kfile_putc((param) & 0xFF, fd); + + kfile_putc(crc, fd); + + return sd_waitR1(sd); +} + +static bool sd_getBlock(Sd *sd, void *buf, size_t len) +{ + uint8_t token; + uint16_t crc; + + KFile *fd = sd->ch; + + for (int i = 0; i < TIMEOUT_NAC; i++) + { + token = kfile_getc(fd); + if (token != 0xff) + { + if (token == SD_STARTTOKEN) + { + if (kfile_read(fd, buf, len) == len) + { + if (kfile_read(fd, &crc, sizeof(crc)) == sizeof(crc)) + /* check CRC here if needed */ + return true; + else + LOG_ERR("get_block error getting crc\n"); + } + else + LOG_ERR("get_block len error: %d\n", (int)len); + } + else + LOG_ERR("get_block token error: %02X\n", token); + + return false; + } + } + + LOG_ERR("get_block timeout waiting token\n"); + return false; +} + +#define SD_SELECT(sd) \ +do \ +{ \ + if (!sd_select((sd), true)) \ + { \ + LOG_ERR("%s failed, card busy\n", __func__); \ + return EOF; \ + } \ +} \ +while (0) + +#define SD_SETBLOCKLEN 0x50 + +static int16_t sd_setBlockLen(Sd *sd, uint32_t newlen) +{ + SD_SELECT(sd); + + sd->r1 = sd_sendCommand(sd, SD_SETBLOCKLEN, newlen, 0); + + sd_select(sd, false); + return sd->r1; +} + +#define SD_SEND_CSD 0x49 + +static int16_t sd_getCSD(Sd *sd, CardCSD *csd) +{ + SD_SELECT(sd); + + int16_t r1 = sd_sendCommand(sd, SD_SEND_CSD, 0, 0); + + if (r1) + { + LOG_ERR("send_csd failed: %04X\n", sd->r1); + sd_select(sd, false); + return r1; + } + + uint8_t buf[16]; + bool res = sd_getBlock(sd, buf, sizeof(buf)); + sd_select(sd, false); + + if (res) + { + #if LOG_LEVEL >= LOG_LVL_INFO + LOG_INFO("CSD: ["); + for (int i = 0; i < 16; i++) + kprintf("%02X ", buf[i]); + kprintf("]\n"); + #endif + + uint16_t mult = (1L << ((((buf[9] & 0x03) << 1) | ((buf[10] & 0x80) >> 7)) + 2)); + uint16_t c_size = (((uint16_t)(buf[6] & 0x03)) << 10) | (((uint16_t)buf[7]) << 2) | + (((uint16_t)(buf[8] & 0xC0)) >> 6); + + csd->block_len = (1L << (buf[5] & 0x0F)); + csd->block_num = (c_size + 1) * mult; + csd->capacity = (csd->block_len * csd->block_num) >> 20; // in MB + + LOG_INFO("block_len %d bytes, block_num %ld, total capacity %dMB\n", csd->block_len, csd->block_num, csd->capacity); + return 0; + } + else + return EOF; +} + + +#define SD_READ_SINGLEBLOCK 0x51 + +static size_t sd_readDirect(struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size) +{ + Sd *sd = SD_CAST(b); + LOG_INFO("reading from block %ld, offset %d, size %d\n", idx, offset, size); + + if (sd->tranfer_len != size) + { + if ((sd->r1 = sd_setBlockLen(sd, size))) + { + LOG_ERR("setBlockLen failed: %04X\n", sd->r1); + return 0; + } + sd->tranfer_len = size; + } + + SD_SELECT(sd); + + sd->r1 = sd_sendCommand(sd, SD_READ_SINGLEBLOCK, idx * SD_DEFAULT_BLOCKLEN + offset, 0); + + if (sd->r1) + { + LOG_ERR("read single block failed: %04X\n", sd->r1); + sd_select(sd, false); + return 0; + } + + bool res = sd_getBlock(sd, buf, size); + sd_select(sd, false); + if (!res) + { + LOG_ERR("read single block failed reading data\n"); + return 0; + } + else + return size; +} + +#define SD_WRITE_SINGLEBLOCK 0x58 +#define SD_DATA_ACCEPTED 0x05 + +static size_t sd_writeDirect(KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size) +{ + Sd *sd = SD_CAST(b); + KFile *fd = sd->ch; + ASSERT(offset == 0); + ASSERT(size == SD_DEFAULT_BLOCKLEN); + + LOG_INFO("writing block %ld\n", idx); + if (sd->tranfer_len != SD_DEFAULT_BLOCKLEN) + { + if ((sd->r1 = sd_setBlockLen(sd, SD_DEFAULT_BLOCKLEN))) + { + LOG_ERR("setBlockLen failed: %04X\n", sd->r1); + return 0; + } + sd->tranfer_len = SD_DEFAULT_BLOCKLEN; + } + + SD_SELECT(sd); + + sd->r1 = sd_sendCommand(sd, SD_WRITE_SINGLEBLOCK, idx * SD_DEFAULT_BLOCKLEN, 0); + + if (sd->r1) + { + LOG_ERR("write single block failed: %04X\n", sd->r1); + sd_select(sd, false); + return 0; + } + + kfile_putc(SD_STARTTOKEN, fd); + kfile_write(fd, buf, SD_DEFAULT_BLOCKLEN); + /* send fake crc */ + kfile_putc(0, fd); + kfile_putc(0, fd); + + uint8_t dataresp = kfile_getc(fd); + sd_select(sd, false); + + if ((dataresp & 0x1f) != SD_DATA_ACCEPTED) + { + LOG_ERR("write block %ld failed: %02X\n", idx, dataresp); + return EOF; + } + + return SD_DEFAULT_BLOCKLEN; +} + +void sd_writeTest(Sd *sd) +{ + uint8_t buf[SD_DEFAULT_BLOCKLEN]; + memset(buf, 0, sizeof(buf)); + + for (block_idx_t i = 0; i < sd->b.blk_cnt; i++) + { + LOG_INFO("writing block %ld: %s\n", i, (sd_writeDirect(&sd->b, i, buf, 0, SD_DEFAULT_BLOCKLEN) == SD_DEFAULT_BLOCKLEN) ? "OK" : "FAIL"); + } +} + + +bool sd_test(Sd *sd) +{ + uint8_t buf[SD_DEFAULT_BLOCKLEN]; + + if (sd_readDirect(&sd->b, 0, buf, 0, sd->b.blk_size) != sd->b.blk_size) + return false; + + kputchar('\n'); + for (int i = 0; i < SD_DEFAULT_BLOCKLEN; i++) + { + kprintf("%02X ", buf[i]); + buf[i] = i; + if (!((i+1) % 16)) + kputchar('\n'); + } + + if (sd_writeDirect(&sd->b, 0, buf, 0, SD_DEFAULT_BLOCKLEN) != SD_DEFAULT_BLOCKLEN) + return false; + + memset(buf, 0, sizeof(buf)); + if (sd_readDirect(&sd->b, 0, buf, 0, sd->b.blk_size) != sd->b.blk_size) + return false; + + kputchar('\n'); + for (block_idx_t i = 0; i < sd->b.blk_size; i++) + { + kprintf("%02X ", buf[i]); + buf[i] = i; + if (!((i+1) % 16)) + kputchar('\n'); + } + + return true; +} + +static int sd_error(KBlock *b) +{ + Sd *sd = SD_CAST(b); + return sd->r1; +} + +static void sd_clearerr(KBlock *b) +{ + Sd *sd = SD_CAST(b); + sd->r1 = 0; +} + +static const KBlockVTable sd_unbuffered_vt = +{ + .readDirect = sd_readDirect, + .writeDirect = sd_writeDirect, + + .error = sd_error, + .clearerr = sd_clearerr, +}; + +static const KBlockVTable sd_buffered_vt = +{ + .readDirect = sd_readDirect, + .writeDirect = sd_writeDirect, + + .readBuf = kblock_swReadBuf, + .writeBuf = kblock_swWriteBuf, + .load = kblock_swLoad, + .store = kblock_swStore, + + .error = sd_error, + .clearerr = sd_clearerr, +}; + +#define SD_GO_IDLE_STATE 0x40 +#define SD_GO_IDLE_STATE_CRC 0x95 +#define SD_SEND_OP_COND 0x41 +#define SD_SEND_OP_COND_CRC 0xF9 + +#define SD_START_DELAY ms_to_ticks(10) +#define SD_INIT_TIMEOUT ms_to_ticks(1000) +#define SD_IDLE_RETRIES 4 + +static bool sd_blockInit(Sd *sd, KFile *ch) +{ + ASSERT(sd); + ASSERT(ch); + memset(sd, 0, sizeof(*sd)); + DB(sd->b.priv.type = KBT_SD); + sd->ch = ch; + + SD_CS_INIT(); + SD_CS_OFF(); + + /* Wait a few moments for supply voltage to stabilize */ + timer_delay(SD_START_DELAY); + + /* Give 80 clk pulses to wake up the card */ + for (int i = 0; i < 10; i++) + kfile_putc(0xff, ch); + kfile_flush(ch); + + for (int i = 0; i < SD_IDLE_RETRIES; i++) + { + SD_SELECT(sd); + sd->r1 = sd_sendCommand(sd, SD_GO_IDLE_STATE, 0, SD_GO_IDLE_STATE_CRC); + sd_select(sd, false); + + if (sd->r1 == SD_IN_IDLE) + break; + } + + if (sd->r1 != SD_IN_IDLE) + { + LOG_ERR("go_idle_state failed: %04X\n", sd->r1); + return false; + } + + ticks_t start = timer_clock(); + + /* Wait for card to start */ + do + { + SD_SELECT(sd); + sd->r1 = sd_sendCommand(sd, SD_SEND_OP_COND, 0, SD_SEND_OP_COND_CRC); + sd_select(sd, false); + cpu_relax(); + } + while (sd->r1 != 0 && timer_clock() - start < SD_INIT_TIMEOUT); + + if (sd->r1) + { + LOG_ERR("send_op_cond failed: %04X\n", sd->r1); + return false; + } + + sd->r1 = sd_setBlockLen(sd, SD_DEFAULT_BLOCKLEN); + sd->tranfer_len = SD_DEFAULT_BLOCKLEN; + + if (sd->r1) + { + LOG_ERR("setBlockLen failed: %04X\n", sd->r1); + return false; + } + + /* Avoid warning for uninitialized csd use (gcc bug?) */ + CardCSD csd = csd; + + sd->r1 = sd_getCSD(sd, &csd); + + if (sd->r1) + { + LOG_ERR("getCSD failed: %04X\n", sd->r1); + return false; + } + + sd->b.blk_size = SD_DEFAULT_BLOCKLEN; + sd->b.blk_cnt = csd.block_num * (csd.block_len / SD_DEFAULT_BLOCKLEN); + LOG_INFO("blk_size %d, blk_cnt %ld\n", sd->b.blk_size, sd->b.blk_cnt); + +#if CONFIG_SD_AUTOASSIGN_FAT + disk_assignDrive(&sd->b, 0); +#endif + + return true; +} + +bool sd_initUnbuf(Sd *sd, KFile *ch) +{ + if (sd_blockInit(sd, ch)) + { + sd->b.priv.vt = &sd_unbuffered_vt; + return true; + } + else + return false; +} + +static uint8_t sd_buf[SD_DEFAULT_BLOCKLEN]; + +bool sd_initBuf(Sd *sd, KFile *ch) +{ + if (sd_blockInit(sd, ch)) + { + sd->b.priv.buf = sd_buf; + sd->b.priv.flags |= KB_BUFFERED | KB_PARTIAL_WRITE; + sd->b.priv.vt = &sd_buffered_vt; + sd->b.priv.vt->load(&sd->b, 0); + return true; + } + else + return false; +} + diff --git a/bertos/drv/sd.h b/bertos/drv/sd.h new file mode 100644 index 0000000..df12bb6 --- /dev/null +++ b/bertos/drv/sd.h @@ -0,0 +1,122 @@ +/** + * \file + * + * + * \brief Function library for secure digital memory. + * + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "sd" + * $WIZ$ module_depends = "kfile", "timer", "kblock" + * $WIZ$ module_hw = "bertos/hw/hw_sd.h" + * $WIZ$ module_configuration = "bertos/cfg/cfg_sd.h" + */ + + +#ifndef DRV_SD_H +#define DRV_SD_H + +#include "cfg/cfg_sd.h" + +#include +#include + +#include + + +#define SD_UNBUFFERED BV(0) ///< Open SD memory disabling page caching, no modification and partial write are allowed. + +/** + * SD Card context structure. + */ +typedef struct Sd +{ + KBlock b; ///< KBlock base class + KFile *ch; ///< SPI communication channel + uint16_t r1; ///< Last status data received from SD + uint16_t tranfer_len; ///< Lenght for the read/write commands, cached in order to increase speed. +} Sd; + +bool sd_initUnbuf(Sd *sd, KFile *ch); +bool sd_initBuf(Sd *sd, KFile *ch); + +#if CONFIG_SD_OLD_INIT + #if !(ARCH & ARCH_NIGHTTEST) + #warning "Deprecated: this API will be removed in the next major release," + #warning "please disable CONFIG_SD_OLD_INIT and pass explicitly the SD context to sd_init()." + #endif + + /** + * Initializes the SD driver. + * + * \param ch A pointer to a SPI channel where the SD will read/write to. + * + * \return true if initialization succeds, false otherwise. + * + * \note This API is deprecated, disable CONFIG_SD_OLD_INIT and + * use the new one instead. + * + * \see CONFIG_SD_OLD_INIT. + */ + #define sd_init(ch) {static struct Sd sd; sd_initUnbuf(&sd, (ch));} + +#else + + /** + * Initializes the SD driver. + * + * \param sd The SD KBlock context. + * \param ch A pointer to a SPI channel where the SD will read/write to. + * \param buffered Set to true if you want the KBlock to be buffered, + * to false otherwise. The FatFs module does not require the device + * to be buffered because it has an internal cache. This will save + * 512 bytes of RAM in this case. + * + * \return true if initialization succeds, false otherwise. + */ + #define sd_init(sd, ch, buffered) ((buffered & SD_UNBUFFERED) ? sd_initUnbuf((sd), (ch)) : sd_initBuf((sd), (ch))) + +#endif + + +#define KBT_SD MAKE_ID('S', 'D', 'B', 'K') + +bool sd_test(Sd *sd); +void sd_writeTest(Sd *sd); + +INLINE Sd *SD_CAST(KBlock *b) +{ + ASSERT(b->priv.type == KBT_SD); + return (Sd *)b; +} + + +#endif /* DRV_SD_H */ diff --git a/bertos/drv/ser.c b/bertos/drv/ser.c new file mode 100644 index 0000000..c9c3b0f --- /dev/null +++ b/bertos/drv/ser.c @@ -0,0 +1,503 @@ +/** + * \file + * + * + * \brief Buffered serial I/O driver + * + * The serial rx interrupt buffers incoming data in a software FIFO + * to decouple the higher level protocols from the line speed. + * Outgoing data is buffered as well for better performance. + * This driver is not optimized for best performance, but it + * has proved to be fast enough to handle transfer rates up to + * 38400bps on a 16MHz 80196. + * + * MODULE CONFIGURATION + * + * \li \c CONFIG_SER_HWHANDSHAKE - set to 1 to enable RTS/CTS handshake. + * Support is incomplete/untested. + * \li \c CONFIG_SER_TXTIMEOUT - Enable software serial transmission timeouts + * + * + * \author Bernie Innocenti + */ + +#include "ser.h" +#include "wdt.h" +#include "timer.h" +#include "ser_p.h" + +#include "cfg/cfg_ser.h" +#include "cfg/cfg_proc.h" +#include + +#include + +#include /* cpu_relax() */ + +#include /* memset() */ + +/* + * Sanity check for config parameters required by this module. + */ +#if !defined(CONFIG_KERN) || ((CONFIG_KERN != 0) && CONFIG_KERN != 1) + #error CONFIG_KERN must be set to either 0 or 1 in cfg_kern.h +#endif +#if !defined(CONFIG_SER_RXTIMEOUT) + #error CONFIG_SER_TXTIMEOUT missing in cfg_ser.h +#endif +#if !defined(CONFIG_SER_RXTIMEOUT) + #error CONFIG_SER_RXTIMEOUT missing in cfg_ser.h +#endif +#if !defined(CONFIG_SER_DEFBAUDRATE) + #error CONFIG_SER_DEFBAUDRATE missing in cfg_ser.h +#endif + + +struct Serial *ser_handles[SER_CNT]; + +/** + * Insert \a c in tx FIFO buffer. + * \note This function will switch out the calling process + * if the tx buffer is full. If the buffer is full + * and \a port->txtimeout is 0 return EOF immediatly. + * + * \return EOF on error or timeout, \a c otherwise. + */ +static int ser_putchar(int c, struct Serial *port) +{ + if (fifo_isfull_locked(&port->txfifo)) + { +#if CONFIG_SER_TXTIMEOUT != -1 + /* If timeout == 0 we don't want to wait */ + if (port->txtimeout == 0) + return EOF; + + ticks_t start_time = timer_clock(); +#endif + + /* Wait while buffer is full... */ + do + { + cpu_relax(); + +#if CONFIG_SER_TXTIMEOUT != -1 + if (timer_clock() - start_time >= port->txtimeout) + { + ATOMIC(port->status |= SERRF_TXTIMEOUT); + return EOF; + } +#endif /* CONFIG_SER_TXTIMEOUT */ + } + while (fifo_isfull_locked(&port->txfifo)); + } + + fifo_push_locked(&port->txfifo, (unsigned char)c); + + /* (re)trigger tx interrupt */ + port->hw->table->txStart(port->hw); + + /* Avoid returning signed extended char */ + return (int)((unsigned char)c); +} + + +/** + * Fetch a character from the rx FIFO buffer. + * \note This function will switch out the calling process + * if the rx buffer is empty. If the buffer is empty + * and \a port->rxtimeout is 0 return EOF immediatly. + * + * \return EOF on error or timeout, \a c otherwise. + */ +static int ser_getchar(struct Serial *port) +{ + if (fifo_isempty_locked(&port->rxfifo)) + { +#if CONFIG_SER_RXTIMEOUT != -1 + /* If timeout == 0 we don't want to wait for chars */ + if (port->rxtimeout == 0) + return EOF; + + ticks_t start_time = timer_clock(); +#endif + + /* Wait while buffer is empty */ + do + { + cpu_relax(); + +#if CONFIG_SER_RXTIMEOUT != -1 + if (timer_clock() - start_time >= port->rxtimeout) + { + ATOMIC(port->status |= SERRF_RXTIMEOUT); + return EOF; + } +#endif /* CONFIG_SER_RXTIMEOUT */ + } + while (fifo_isempty_locked(&port->rxfifo) && (ser_getstatus(port) & SERRF_RX) == 0); + } + + /* + * Get a byte from the FIFO (avoiding sign-extension), + * re-enable RTS, then return result. + */ + if (ser_getstatus(port) & SERRF_RX) + return EOF; + return (int)(unsigned char)fifo_pop_locked(&port->rxfifo); +} + +/** + * Fetch a character from the rx FIFO buffer. + * If the buffer is empty, ser_getchar_nowait() returns + * EOF immediatly. + * \note Deprecated, use ser_getchar with rx_timeout set to 0. + */ +int ser_getchar_nowait(struct Serial *fd) +{ + if (fifo_isempty_locked(&fd->rxfifo)) + return EOF; + + /* NOTE: the double cast prevents unwanted sign extension */ + return (int)(unsigned char)fifo_pop_locked(&fd->rxfifo); +} + + + +/** + * Read at most \a size bytes from \a port and put them in \a buf + * + * \return number of bytes actually read. + */ +static size_t ser_read(struct KFile *fd, void *_buf, size_t size) +{ + Serial *fds = SERIAL_CAST(fd); + + size_t i = 0; + char *buf = (char *)_buf; + int c; + + while (i < size) + { + if ((c = ser_getchar(fds)) == EOF) + break; + buf[i++] = c; + } + + return i; +} + +/** + * \brief Write a buffer to serial. + * + * \return 0 if OK, EOF in case of error. + * + * \todo Optimize with fifo_pushblock() + */ +static size_t ser_write(struct KFile *fd, const void *_buf, size_t size) +{ + Serial *fds = SERIAL_CAST(fd); + const char *buf = (const char *)_buf; + size_t i = 0; + + while (size--) + { + if (ser_putchar(*buf++, fds) == EOF) + break; + i++; + } + return i; +} + + +#if CONFIG_SER_RXTIMEOUT != -1 || CONFIG_SER_TXTIMEOUT != -1 +void ser_settimeouts(struct Serial *fd, mtime_t rxtimeout, mtime_t txtimeout) +{ + #if CONFIG_SER_RXTIMEOUT != -1 + fd->rxtimeout = ms_to_ticks(rxtimeout); + #else + (void)rxtimeout; + #endif + + #if CONFIG_SER_TXTIMEOUT != -1 + fd->txtimeout = ms_to_ticks(txtimeout); + #else + (void)txtimeout; + #endif +} +#endif /* CONFIG_SER_RXTIMEOUT || CONFIG_SER_TXTIMEOUT */ + + +/** + * Set the baudrate for the serial port + */ +void ser_setbaudrate(struct Serial *fd, unsigned long rate) +{ + fd->hw->table->setBaudrate(fd->hw, rate); +} + + +/** + * Set the parity for the \a fd serial port + */ +void ser_setparity(struct Serial *fd, int parity) +{ + fd->hw->table->setParity(fd->hw, parity); +} + +static int ser_error(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + return ser_getstatus(fds); +} + +static void ser_clearerr(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + ser_setstatus(fds, 0); +} + + + +/** + * Flush both the RX and TX buffers. + */ +void ser_purge(struct Serial *fd) +{ + ser_purgeRx(fd); + ser_purgeTx(fd); +} + +/** + * Flush RX buffer. + */ +void ser_purgeRx(struct Serial *fd) +{ + fifo_flush_locked(&fd->rxfifo); +} + +/** + * Flush TX buffer. + */ +void ser_purgeTx(struct Serial *fd) +{ + fifo_flush_locked(&fd->txfifo); +} + + +/** + * Wait until all pending output is completely + * transmitted to the other end. + * + * \note The current implementation only checks the + * software transmission queue. Any hardware + * FIFOs are ignored. + */ +static int ser_flush(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + + /* + * Wait until the FIFO becomes empty, and then until the byte currently in + * the hardware register gets shifted out. + */ + while (!fifo_isempty(&fds->txfifo) + || fds->hw->table->txSending(fds->hw)) + cpu_relax(); + return 0; +} + + +/** + * Initialize a serial port. + * + * \param fd KFile Serial struct interface. + * \param unit Serial unit to open. Possible values are architecture dependant. + */ +static struct Serial *ser_open(struct Serial *fd, unsigned int unit) +{ + ASSERT(unit < countof(ser_handles)); + + ser_handles[unit] = fd; + ASSERT(!fd->is_open); + DB(fd->is_open = true); + + fd->unit = unit; + + fd->hw = ser_hw_getdesc(unit); + + /* Initialize circular buffers */ + ASSERT(fd->hw->txbuffer); + ASSERT(fd->hw->rxbuffer); + fifo_init(&fd->txfifo, fd->hw->txbuffer, fd->hw->txbuffer_size); + fifo_init(&fd->rxfifo, fd->hw->rxbuffer, fd->hw->rxbuffer_size); + + fd->hw->table->init(fd->hw, fd); + + /* Set default values */ +#if CONFIG_SER_RXTIMEOUT != -1 || CONFIG_SER_TXTIMEOUT != -1 + ser_settimeouts(fd, CONFIG_SER_RXTIMEOUT, CONFIG_SER_TXTIMEOUT); +#endif +#if CONFIG_SER_DEFBAUDRATE + ser_setbaudrate(fd, CONFIG_SER_DEFBAUDRATE); +#endif + + /* Clear error flags */ + ser_setstatus(fd, 0); + + return fd; +} + + +/** + * Clean up serial port, disabling the associated hardware. + */ +static int ser_close(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + Serial *port = fds; + + ASSERT(port->is_open); + DB(port->is_open = false); + + // Wait until we finish sending everything + ser_flush(fd); + + port->hw->table->cleanup(port->hw); + DB(port->hw = NULL); + + /* + * We purge the FIFO buffer only after the low-level cleanup, so that + * we are sure that there are no more interrupts. + */ + ser_purge(fds); + return 0; +} + +/** + * Reopen serial port. + */ +static struct KFile *ser_reopen(struct KFile *fd) +{ + Serial *fds = SERIAL_CAST(fd); + + ser_close(fd); + ser_open(fds, fds->unit); + return (KFile *)fds; +} + +/** + * Init serial driver for \a unit. + * + * Use values SER_UARTn as values for \a unit. + */ +void ser_init(struct Serial *fds, unsigned int unit) +{ + memset(fds, 0, sizeof(*fds)); + + DB(fds->fd._type = KFT_SERIAL); + fds->fd.reopen = ser_reopen; + fds->fd.close = ser_close; + fds->fd.read = ser_read; + fds->fd.write = ser_write; + fds->fd.flush = ser_flush; + fds->fd.error = ser_error; + fds->fd.clearerr = ser_clearerr; + ser_open(fds, unit); +} + + +/** + * Read data from SPI bus. + * Since we are master, we have to trigger slave by sending + * fake chars on the bus. + */ +static size_t spimaster_read(struct KFile *fd, void *_buf, size_t size) +{ + Serial *fd_spi = SERIAL_CAST(fd); + + ser_flush(&fd_spi->fd); + ser_purgeRx(fd_spi); + + size_t total_rd = 0; + uint8_t *buf = (uint8_t *)_buf; + int c; + + while (size--) + { + /* + * Send and receive chars 1 by 1, otherwise the rxfifo + * will overrun. + */ + ser_putchar(0, fd_spi); + + if ((c = ser_getchar(fd_spi)) == EOF) + break; + + *buf++ = c; + total_rd++; + } + return total_rd; +} + +/** + * Write data to SPI bus. + */ +static size_t spimaster_write(struct KFile *fd, const void *buf, size_t size) +{ + Serial *fd_spi = SERIAL_CAST(fd); + + ser_purgeRx(fd_spi); + + return ser_write(&fd_spi->fd, buf, size); +} + + +/** + * Init SPI serial driver \a unit in master mode. + * + * Use SER_SPIn for \a unit parameter. + * + * This interface implements the SPI master protocol over a serial SPI + * driver. This is needed because normal serial driver send/receive data + * at the same time. SPI slaves like memories and other peripherals + * first receive and *then* send response back instead. + * To achieve this, when we are master and we are *sending*, + * we have to discard all incoming data. Then, when we want to + * receive, we must write fake data to SPI to trigger slave devices. + */ +void spimaster_init(Serial *fds, unsigned int unit) +{ + ser_init(fds, unit); + fds->fd.read = spimaster_read; + fds->fd.write = spimaster_write; +} + + diff --git a/bertos/drv/ser.h b/bertos/drv/ser.h new file mode 100644 index 0000000..861fdf1 --- /dev/null +++ b/bertos/drv/ser.h @@ -0,0 +1,217 @@ +/** + * \file + * + * + * \brief High level serial I/O API. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "ser" + * $WIZ$ module_depends = "kfile", "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_ser.h" + * $WIZ$ module_hw = "bertos/hw/hw_ser.h" + * $WIZ$ module_supports = "not atmega103 and not atmega8" + */ + +#ifndef DRV_SER_H +#define DRV_SER_H + +#include +#include +#include + +#if OS_HOSTED + #include /* BV() */ + + typedef uint16_t serstatus_t; + + /* Software errors */ + #define SERRF_RXFIFOOVERRUN BV(0) /**< Rx FIFO buffer overrun */ + #define SERRF_RXTIMEOUT BV(1) /**< Receive timeout */ + #define SERRF_TXTIMEOUT BV(2) /**< Transmit timeout */ + + /* Hardware errors */ + #define SERRF_RXSROVERRUN 0 /**< Rx shift register overrun, unsupported in emulated serial port. */ + #define SERRF_FRAMEERROR 0 /**< Stop bit missing, unsupported in emulated serial port. */ + #define SERRF_PARITYERROR 0 /**< Parity error, unsupported in emulated serial port. */ + #define SERRF_NOISEERROR 0 /**< Noise error, unsupported in emulated serial port. */ + + enum + { + SER_UART0, + SER_UART1, + + SER_CNT /**< Number of serial ports */ + }; + +#else + #include CPU_HEADER(ser) +#endif + +#include "cfg/cfg_ser.h" + + + +/** + * \name Masks to group TX/RX errors. + * \{ + */ +#define SERRF_RX \ + ( SERRF_RXFIFOOVERRUN \ + | SERRF_RXTIMEOUT \ + | SERRF_RXSROVERRUN \ + | SERRF_PARITYERROR \ + | SERRF_FRAMEERROR \ + | SERRF_NOISEERROR) /**< All possible rx errors */ +#define SERRF_TX (SERRF_TXTIMEOUT) /**< All possible tx errors */ +/*\}*/ + +/** + * \name LSB or MSB first data order for SPI driver. + * + * $WIZ$ ser_order_bit = "SER_MSB_FIRST", "SER_LSB_FIRST" + */ +#define SER_MSB_FIRST 0 +#define SER_LSB_FIRST 1 + +/** + * \name Parity settings for ser_setparity(). + * + * \note Values are AVR-specific for performance reasons. + * Other processors should either decode them or + * redefine these macros. + * \{ + */ +#define SER_PARITY_NONE 0 +#define SER_PARITY_EVEN 2 +#define SER_PARITY_ODD 3 +/*\}*/ + + +/** + * \def CONFIG_SER_STROBE + * + * This is a debug facility that can be used to + * monitor SER interrupt activity on an external pin. + * + * To use strobes, redefine the macros SER_STROBE_ON, + * SER_STROBE_OFF and SER_STROBE_INIT and set + * CONFIG_SER_STROBE to 1. + */ +#if !defined(CONFIG_SER_STROBE) || !CONFIG_SER_STROBE + #define SER_STROBE_ON do {/*nop*/} while(0) + #define SER_STROBE_OFF do {/*nop*/} while(0) + #define SER_STROBE_INIT do {/*nop*/} while(0) +#endif + +struct SerialHardware; + +/** Human-readable serial error descriptions */ +extern const char * const serial_errors[8]; + +/** Serial handle structure */ +typedef struct Serial +{ + /** Serial have a KFile struct implementation **/ + KFile fd; + + /** Physical port number */ + unsigned int unit; + +#ifdef _DEBUG + bool is_open; +#endif + + /** + * \name Transmit and receive FIFOs. + * + * Declared volatile because handled asinchronously by interrupts. + * + * \{ + */ + FIFOBuffer txfifo; + FIFOBuffer rxfifo; + /* \} */ + +#if CONFIG_SER_RXTIMEOUT != -1 + ticks_t rxtimeout; +#endif +#if CONFIG_SER_TXTIMEOUT != -1 + ticks_t txtimeout; +#endif + + /** Holds the flags defined above. Will be 0 when no errors have occurred. */ + volatile serstatus_t status; + + /** Low-level interface to hardware. */ + struct SerialHardware* hw; +} Serial; + + +/** + * ID for serial. + */ +#define KFT_SERIAL MAKE_ID('S', 'E', 'R', 'L') + + +INLINE Serial * SERIAL_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_SERIAL); + return (Serial *)fd; +} + +/* Function prototypes */ +//extern int ser_getchar_nowait(struct Serial *port); + +void ser_setbaudrate(struct Serial *fd, unsigned long rate); +void ser_setparity(struct Serial *fd, int parity); +void ser_settimeouts(struct Serial *fd, mtime_t rxtimeout, mtime_t txtimeout); +void ser_resync(struct Serial *fd, mtime_t delay); +int ser_getchar_nowait(struct Serial *fd); + +void ser_purgeRx(struct Serial *fd); +void ser_purgeTx(struct Serial *fd); +void ser_purge(struct Serial *fd); +void ser_init(struct Serial *fds, unsigned int unit); +void spimaster_init(Serial *fds, unsigned int unit); + + +/** + * \name Additional functions implemented as macros + * + * \{ + */ +#define ser_getstatus(serial) ((serial)->status) +#define ser_setstatus(serial, new_status) ((serial)->status = (new_status)) +/* \} */ + +#endif /* DRV_SER_H */ diff --git a/bertos/drv/ser_p.h b/bertos/drv/ser_p.h new file mode 100644 index 0000000..913f5e7 --- /dev/null +++ b/bertos/drv/ser_p.h @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief Hardware dependent serial driver (interface) + * + * + * \author Stefano Fedrigo + * \author Giovanni Bajo + */ + + +#ifndef DRV_SER_P_H +#define DRV_SER_P_H + +#include /* size_t */ + + + +struct SerialHardware; +struct Serial; + +struct SerialHardwareVT +{ + void (*init)(struct SerialHardware *ctx, struct Serial *ser); + void (*cleanup)(struct SerialHardware *ctx); + void (*setBaudrate)(struct SerialHardware *ctx, unsigned long rate); + void (*setParity)(struct SerialHardware *ctx, int parity); + void (*txStart)(struct SerialHardware *ctx); + bool (*txSending)(struct SerialHardware *ctx); +}; + +struct SerialHardware +{ + const struct SerialHardwareVT *table; + unsigned char *txbuffer; + unsigned char *rxbuffer; + size_t txbuffer_size; + size_t rxbuffer_size; +}; + +struct SerialHardware *ser_hw_getdesc(int unit); + + + +#endif /* DRV_SER_P_H */ diff --git a/bertos/drv/sipo.c b/bertos/drv/sipo.c new file mode 100644 index 0000000..58830bb --- /dev/null +++ b/bertos/drv/sipo.c @@ -0,0 +1,122 @@ +/** + * \file + * + * + * + * \brief SIPO Module + * + * The SIPO module transforms a serial input in a parallel output. Please check hw_sipo.h + * file to customize hardware related parameters. + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#include "sipo.h" + +#include "hw/hw_sipo.h" + +#include +#include + +#include + +#include + + +#define SIPO_DATAORDER_START(order) (order ? SIPO_DATAORDER_START_LSB : SIPO_DATAORDER_START_MSB) +#define SIPO_DATAORDER_SHIFT(shift, order) (order ? ((shift) <<= 1) : ((shift) >>= 1)) + +/** + * Write a char in sipo shift register + */ +INLINE void sipo_putchar(uint8_t c, uint8_t bit_order, uint8_t clock_pol) +{ + uint8_t shift = SIPO_DATAORDER_START(bit_order); + + for(int i = 0; i < 8; i++) + { + if((c & shift) == 0) + SIPO_SI_LOW(); + else + SIPO_SI_HIGH(); + + SIPO_SI_CLOCK(clock_pol); + + SIPO_DATAORDER_SHIFT(shift, bit_order); + } +} + +/** + * Write a buffer into the sipo register and, when finished, give a load pulse. + */ +static size_t sipo_write(struct KFile *_fd, const void *_buf, size_t size) +{ + const uint8_t *buf = (const uint8_t *)_buf; + Sipo *fd = SIPO_CAST(_fd); + size_t write_len = size; + + ASSERT(buf); + + SIPO_SET_SI_LEVEL(); + SIPO_SET_CLK_LEVEL(fd->clock_pol); + SIPO_SET_LD_LEVEL(fd->load_device, fd->load_pol); + + // Load into the shift register all the buffer bytes + while(size--) + sipo_putchar(*buf++, fd->bit_order, fd->clock_pol); + + // We finsh to load bytes, so load it. + SIPO_LOAD(fd->load_device, fd->load_pol); + + return write_len; +} + +/** + * Initialize the SIPO + */ +void sipo_init(Sipo *fd) +{ + ASSERT(fd); + + memset(fd, 0, sizeof(Sipo)); + + //Set kfile struct type as a generic kfile structure. + DB(fd->fd._type = KFT_SIPO); + + // Set up SIPO writing functions. + fd->fd.write = sipo_write; + + SIPO_INIT_PIN(); + + /* Enable sipo output */ + SIPO_ENABLE(); +} diff --git a/bertos/drv/sipo.h b/bertos/drv/sipo.h new file mode 100644 index 0000000..a527d6e --- /dev/null +++ b/bertos/drv/sipo.h @@ -0,0 +1,118 @@ +/** + * \file + * + * + * \brief Generic Serial-in, Parallel-out implementation (SIPO). + * + * + * + * \author Andrea Grandi + * \author Daniele Basile + * + * $WIZ$ module_name = "sipo" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_hw = "bertos/hw/hw_sipo.h" + */ + + + + + +#ifndef DRV_SIPO_H +#define DRV_SIPO_H + +#include "hw/hw_sipo.h" + +#include + +#define SIPO_DATAORDER_START_LSB 1 +#define SIPO_DATAORDER_START_MSB 0x80 + +/** + * Define enum to set sipo data order. + */ +typedef enum SipoBitOrder +{ + SIPO_DATAORDER_MSB = 0, + SIPO_DATAORDER_LSB = 1 +} SipoBitOrder; + +/** + * Define enum to set the start level of clock. + */ +typedef enum SipoClockPol +{ + SIPO_START_LOW = 0, + SIPO_START_HIGH = 1 + +} SipoClkPol; + +/** + * Define enum to set load signal level. + */ +typedef enum SipoLoadPol +{ + SIPO_LOW_TO_HIGH = 0, + SIPO_HIGH_TO_LOW = 1 + +} SipoLoadPol; + +/** + * Sipo KFile context structure. + */ +typedef struct Sipo +{ + KFile fd; ///< File descriptor. + SipoMap load_device; ///< Descriptor of the device that we want drive. + SipoLoadPol load_pol; ///< Set polarity of load signal. + SipoClkPol clock_pol; ///< Set polarity of data clock. + SipoBitOrder bit_order; ///< Set the order of pushed bits in sipo. + +} Sipo; + +/** + * ID for sipo. + */ +#define KFT_SIPO MAKE_ID('S', 'I', 'P', 'O') + +/** + * Convert + ASSERT from generic KFile to Sipo. + */ +INLINE Sipo * SIPO_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_SIPO); + return (Sipo *)fd; +} + +void sipo_init(Sipo *fd); + +#endif // DRV_SIPO_H + diff --git a/bertos/drv/spi_bitbang.c b/bertos/drv/spi_bitbang.c new file mode 100644 index 0000000..99d6a34 --- /dev/null +++ b/bertos/drv/spi_bitbang.c @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \brief Emulated SPI Master for DSP firmware download (impl.) + * + * + * \author Francesco Sacchi + * \author Daniele Basile + */ + + +#include "spi_bitbang.h" +#include "hw/hw_spi.h" + +#include "cfg/cfg_spi_bitbang.h" +#include + +#include + +void spi_assertSS(void) +{ + ATOMIC(SS_ACTIVE()); +} + +void spi_deassertSS(void) +{ + ATOMIC(SS_INACTIVE()); +} + +/** + * Send byte \c c over MOSI line, CONFIG_SPI_DATAORDER first. + * SS pin state is left unchanged. + */ +uint8_t spi_sendRecv(uint8_t c) +{ + uint8_t data = 0; + uint8_t shift = SPI_DATAORDER_START; + + + ATOMIC( + for (int i = 0; i < 8; i++) + { + /* Shift the i-th bit to MOSI */ + if (c & shift) + MOSI_HIGH(); + else + MOSI_LOW(); + /* Assert clock */ + SCK_ACTIVE(); + data |= IS_MISO_HIGH() ? shift : 0; + /* De-assert clock */ + SCK_INACTIVE(); + SPI_DATAORDER_SHIFT(shift); + } + ); + return data; +} + +MOD_DEFINE(spi); +void spi_init(void) +{ + ATOMIC(SPI_HW_INIT()); + MOD_INIT(spi); +} + +/** + * Read \param len from spi, and put it in \param _buff . + */ +void spi_read(void *_buff, size_t len) +{ + uint8_t *buff = (uint8_t *)_buff; + + while (len--) + /* Read byte from spi and put it in buffer. */ + *buff++ = spi_sendRecv(0); + +} + +/** + * Write \param len to spi, and take it from \param _buff . + */ +void spi_write(const void *_buff, size_t len) +{ + const uint8_t *buff = (const uint8_t *)_buff; + + while (len--) + /* Write byte pointed at by *buff to spi */ + spi_sendRecv(*buff++); + +} diff --git a/bertos/drv/spi_bitbang.h b/bertos/drv/spi_bitbang.h new file mode 100644 index 0000000..308b78b --- /dev/null +++ b/bertos/drv/spi_bitbang.h @@ -0,0 +1,76 @@ +/** + * \file + * + * + * \brief Emulated SPI driver. + * + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * $WIZ$ module_name = "spi_bitbang" + * $WIZ$ module_configuration = "bertos/cfg/cfg_spi_bitbang.h" + * $WIZ$ module_hw = "bertos/hw/hw_spi.h" + */ + + +#ifndef DRV_SPI_BITBANG_H +#define DRV_SPI_BITBANG_H + +#include "cfg/cfg_spi_bitbang.h" + +#include + +/** + * Define send and receive order bit. + * + * $WIZ$ ordet_bit_list = "SPI_LSB_FIRST", "SPI_MSB_FIRST" + */ +#define SPI_LSB_FIRST 1 +#define SPI_MSB_FIRST 2 + +#if CONFIG_SPI_DATAORDER == SPI_LSB_FIRST + #define SPI_DATAORDER_START 1 + #define SPI_DATAORDER_SHIFT(i) ((i) <<= 1) +#elif CONFIG_SPI_DATAORDER == SPI_MSB_FIRST + #define SPI_DATAORDER_START 0x80 + #define SPI_DATAORDER_SHIFT(i) ((i) >>= 1) +#endif + +void spi_write(const void *buf, size_t len); +void spi_read(void *buf, size_t len); +uint8_t spi_sendRecv(uint8_t c); +void spi_init(void); +void spi_assertSS(void); +void spi_deassertSS(void); + +#endif /* DRV_SPI_BITBANG_H */ diff --git a/bertos/drv/spi_dma.h b/bertos/drv/spi_dma.h new file mode 100644 index 0000000..db9d55f --- /dev/null +++ b/bertos/drv/spi_dma.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \brief SPI driver with DMA. + * + * \note Only one copy of SpiDma is allowed for each application. + * + * \author Francesco Sacchi + * \author Luca Ottaviano + * \author Daniele Basile + */ + +#ifndef DRV_SPI_DMA_H +#define DRV_SPI_DMA_H + +#include + +typedef struct SpiDma +{ + KFile fd; +} SpiDma; + +#define KFT_SPIDMA MAKE_ID('S', 'P', 'I', 'D') + +INLINE SpiDma * SPIDMA_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_SPIDMA); + return (SpiDma *)fd; +} + +/** + * Init DMA SPI driver. + * \param spi A pointer to a SpiDma structure. + */ +void spi_dma_init(SpiDma *spi); + +/** + * Set the clock rate for SPI bus. + * + * \param rate The rate you want to set for SPI. + */ +void spi_dma_setclock(uint32_t rate); + +#endif /* DRV_SPI_DMA_H */ diff --git a/bertos/drv/stepper.c b/bertos/drv/stepper.c new file mode 100644 index 0000000..a732079 --- /dev/null +++ b/bertos/drv/stepper.c @@ -0,0 +1,978 @@ +/** + * \file + * + * + * \brief Driver to control stepper motor + * + * \author Francesco Michelini + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Simone Zinanni + * \author Daniele Basile + */ + +#include "stepper.h" + +#include "hw/hw_stepper.h" +#include "hw/hw_sensor.h" + +#include "cfg/cfg_stepper.h" +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL STEPPER_LOG_LEVEL +#define LOG_FORMAT STEPPER_LOG_FORMAT +#include + +#include + +#include + +#include CPU_HEADER(stepper) + +#include // memset + +/** + * \name Motor timings + * \{ + */ +#define MOTOR_SWITCH_TICKS 60000 ///< Timer ticks to wait for 10ms +#define MOTOR_SWITCH_COUNT 5 ///< Number of intervals, long 10ms, to wait before/after switching current off/on +#define MOTOR_HOME_MAX_STEPS 30000 ///< Steps before giving up when trying to reach home +#define MOTOR_CURRENT_TICKS 6000 ///< Number of intervals, long 10ms, to mantain high current +// \} + +///< Stepper motors +static struct Stepper all_motors[CONFIG_NUM_STEPPER_MOTORS]; + +///< General FSM states (or NULL if state is not handled) +static fsm_state general_states[STEPPER_MAX_STATES]; + +// IRQ functions for stepper motors +static void stepper_interrupt(struct Stepper *motor); + +static void stepper_accel(struct Stepper *motor); +static void stepper_decel(struct Stepper *motor); + +static bool stepper_isState(struct Stepper *motor, enum StepperState state); +INLINE void stepper_changeState(struct Stepper *motor, enum StepperState newState); + +static void stepper_enableCheckHome(struct Stepper *motor, bool bDirPositive); + +#define MOTOR_INDEX(motor) (motor->index) + +//------------------------------------------------------------------------ + +INLINE bool setLowCurrent(struct Stepper* motor) +{ + if (motor->power == motor->cfg->powerIdle) + return false; + + motor->power = motor->cfg->powerIdle; + STEPPER_SET_POWER_CURRENT(MOTOR_INDEX(motor), motor->cfg->powerIdle); + + return true; +} + +INLINE bool setHighCurrent(struct Stepper* motor) +{ + if (motor->power == motor->cfg->powerRun) + return false; + + motor->power = motor->cfg->powerRun; + STEPPER_SET_POWER_CURRENT(MOTOR_INDEX(motor), motor->cfg->powerRun); + return true; +} + +INLINE void setCheckSensor(struct Stepper* motor, enum MotorHomeSensorCheck value) +{ + motor->enableCheckHome = value; +} + +INLINE int8_t getCheckSensor(struct Stepper* motor) +{ + return motor->enableCheckHome; +} + +INLINE void setDirection(struct Stepper* motor, enum MotorDirection dir) +{ + ASSERT(dir == DIR_POSITIVE || dir == DIR_NEGATIVE); + motor->dir = dir; + + if (!motor->cfg->flags.axisInverted) + { + STEPPER_SET_DIRECTION(MOTOR_INDEX(motor), (dir == DIR_POSITIVE)); + } + else + { + STEPPER_SET_DIRECTION(MOTOR_INDEX(motor), (dir != DIR_POSITIVE)); + } +} + +/** + * Schedule a new stepper IRQ to happen after \a delay (number of clocks), + * and optionally doing a step at the same time (if \a do_step is true). + */ +INLINE void FAST_FUNC stepper_schedule_irq(struct Stepper* motor, stepper_time_t delay, bool do_step) +{ + + if (do_step) + { + // Record the step we just did + motor->step += motor->dir; + stepper_tc_doPulse(motor->timer); + } + else + stepper_tc_skipPulse(motor->timer); + + stepper_tc_setDelay(motor->timer, delay); +} + + +static void stepper_accel(struct Stepper *motor) +{ + DB(uint16_t old_val = motor->rampValue;) + DB(uint32_t old_clock = motor->rampClock;) + + const struct Ramp *ramp = &motor->cfg->ramp; + + ASSERT(motor->rampClock != 0); + + motor->rampValue = ramp_evaluate(ramp, motor->rampClock); + motor->rampClock += motor->rampValue; + motor->rampStep++; + + DB(if (old_val && motor->rampValue > old_val) + { + LOG_ERR("Runtime ramp error: (max=%x, min=%x)\n", ramp->clocksMaxWL, ramp->clocksMinWL); + LOG_ERR(" %04x @ %lu --> %04x @ %lu\n", old_val, old_clock, motor->rampValue, motor->rampClock); + }) + +} + +static void stepper_decel(struct Stepper *motor) +{ + const struct Ramp *ramp = &motor->cfg->ramp; + DB(uint16_t old_val = motor->rampValue;) + + motor->rampClock -= motor->rampValue; + ASSERT(motor->rampClock != 0); + motor->rampValue = ramp_evaluate(ramp, motor->rampClock); + motor->rampStep--; + DB(ASSERT(!old_val || motor->rampValue >= old_val);); +} + +INLINE void stepper_enable_irq(struct Stepper* motor) +{ + stepper_tc_irq_enable(motor->timer); +} + +INLINE void stepper_disable_irq(struct Stepper* motor) +{ + stepper_tc_irq_disable(motor->timer); +} + +// the home sensor can be in the standard home list or in the digital +// sensor list +bool stepper_readHome(struct Stepper* motor) +{ + return (motor->cfg->homeSensorIndex < NUM_HOME_SENSORS) ? + hw_home_sensor_read(motor->cfg->homeSensorIndex) : + bld_hw_sensor_read(motor->cfg->homeSensorIndex - NUM_HOME_SENSORS); +} + +bool stepper_readLevel(struct Stepper* motor) +{ + return hw_level_sensor_read(motor->cfg->levelSensorIndex); +} + +/************************************************************************/ +/* Finite-state machine to drive stepper logic from IRQ */ +/************************************************************************/ + +INLINE void stepper_changeState(struct Stepper* motor, enum StepperState newState) +{ + ASSERT(newState < STEPPER_MAX_STATES); + + motor->state = motor->cfg->states[newState]; + if (!motor->state) + motor->state = general_states[newState]; + ASSERT(motor->state); +} + +static bool stepper_isState(struct Stepper* motor, enum StepperState state) +{ + return (motor->cfg->states[state] + ? motor->cfg->states[state] == motor->state + : general_states[state] == motor->state); +} + +static bool stepper_checkHomeErrors(struct Stepper* motor) +{ + bool home; + + home = stepper_readHome(motor); + + if (motor->enableCheckHome == MOTOR_HOMESENSOR_INCHECK && home + && (!motor->stepCircular || motor->step < motor->stepCircular / 2)) + /* + * if home Sensor check enabled in movement to 0 position and + * the motor is in home increase the counter + * for rotating motor we include the check that the motor is + * inside the last "lap" (FIXME: check it better) + */ + motor->stepsErrorHome++; + else if (motor->enableCheckHome == MOTOR_HOMESENSOR_OUTCHECK && !home) + /* + * if home Sensor check enabled in movement from 0 position and + * the motor is not in home increase the counter + */ + motor->stepsErrorHome++; + else + // clear error steps counter + motor->stepsErrorHome = 0; + + // if this is the last consecutive position in which the motor is in/out home ... + ASSERT(motor->stepsErrorHome <= MOTOR_CONSECUTIVE_ERROR_STEPS); + if (motor->stepsErrorHome >= MOTOR_CONSECUTIVE_ERROR_STEPS) + { + // if the position at which the motor first saw/didn't see the home + // is out of tolerance -> breakmotor -> ERROR + if (motor->step > motor->stepsTollMax || motor->step < motor->stepsTollMin ) + { + // break motor and error + motor->speed = SPEED_STOPPED; + motor->stepToReach = motor->step; + + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + return false; + } + + // the motor reached the home crossing -> disable error check + setCheckSensor(motor, MOTOR_HOMESENSOR_NOCHECK); + } + + return true; +} + +static void stepper_checkLevelSensor(struct Stepper* motor) +{ + // level sensor check + if (motor->step > motor->stepsDeaf) + { + if (stepper_readLevel(motor)) + { + // record current position, disable check and stop motor + motor->stepsDeaf = DEAFSTEPS_DEFAULT; + motor->stepsLevel = motor->step; + //motor->stepToReach = motor->step + motor->rampStep * motor->dir; + + motor->stepToReach = motor->step; + motor->rampClock = motor->cfg->ramp.clocksMaxWL; + motor->rampValue = motor->cfg->ramp.clocksMaxWL; + } + } +} + +static enum StepperState FAST_FUNC FSM_run(struct Stepper *motor) +{ + uint16_t distance; + + if (!stepper_checkHomeErrors(motor)) + return MSTS_ERROR; + + stepper_checkLevelSensor(motor); + + if ((motor->stepToReach != STEPS_INFINITE_POSITIVE) && + (motor->stepToReach != STEPS_INFINITE_NEGATIVE )) + { + // Calculate (always positive) distance between current position and destination step + distance = (uint16_t)((motor->stepToReach - motor->step) * motor->dir); + } + else + { + // We're at a very long distance ;-) + distance = 0xFFFF; + // if the motor is rotating and it has just ran a complete round + // the position is set to 0 + if(motor->step == motor->stepCircular) + motor->step = 0; + } + + if (distance == 0) + // Position reached - stop motor + //motor->speed = SPEED_STOPPED; + motor->rampStep = -1; + //motor->rampClock = motor->ramp->clocksMaxWL; + //motor->rampValue = 0; + //motor->rampClock = motor->rampValue = motor->ramp->clocksMaxWL; + + else if (distance <= (uint16_t)motor->rampStep) + stepper_decel(motor); + + // check whether the velocity must be changed + else if (motor->speed < (uint16_t)motor->rampValue) + { + stepper_accel(motor); + if (motor->speed > (uint16_t)motor->rampValue) + motor->speed = (uint16_t)motor->rampValue; + } + else if (motor->speed > (uint16_t)motor->rampValue) + stepper_decel(motor); + + // If rampStep == -1, leave output pin high and wait for low current + if (motor->rampStep < 0) + { + // Wait before switching to low current + motor->speed = SPEED_STOPPED; + + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + + /* + * If there was a home sensor check activated, and the check has not + * been done yet, it means that we reached the end position without + * finding the home (or exiting from it). This is bad! + */ + if (motor->enableCheckHome != MOTOR_HOMESENSOR_NOCHECK) + return MSTS_ERROR; + + // check if the motor has to stay in high current + if(motor->cfg->flags.highcurrentBit) + { + motor->changeCurrentIrqs = MOTOR_CURRENT_TICKS; + return MSTS_IDLE; + } + + return MSTS_PREIDLE; + } + + // Wait for high->low transition + ASSERT(motor->rampValue > motor->cfg->pulse); + stepper_schedule_irq(motor, motor->rampValue, true); + + return MSTS_RUN; +} + +static enum StepperState FSM_idle(struct Stepper* motor) +{ + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + + if (motor->speed == SPEED_STOPPED) + { + // check if it's time to switch to low current + if(motor->changeCurrentIrqs > 0) + { + if(--motor->changeCurrentIrqs == 0) + setLowCurrent(motor); + } + return MSTS_IDLE; + } + + // Switch to high current and wait for stabilization + // (if the motor is in low current) + if(motor->changeCurrentIrqs == 0) + { + setHighCurrent(motor); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + } + + return MSTS_PRERUN; +} + +static enum StepperState FSM_preidle(struct Stepper* motor) +{ + // Normal operation mode + motor->changeCurrentIrqs = 0; + setLowCurrent(motor); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_IDLE; +} + +static enum StepperState FSM_error(struct Stepper* motor) +{ + // Error condition mode + setLowCurrent(motor); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_ERROR; +} + +static enum StepperState FSM_prerun(struct Stepper* motor) +{ + enum MotorDirection dir; + + // distance != 0? + if ((motor->stepToReach != motor->step) || + (motor->stepToReach == STEPS_INFINITE_POSITIVE) || + (motor->stepToReach == STEPS_INFINITE_NEGATIVE) ) + { + // Setup for first step + motor->rampStep = 0; + + // Setup Direction + if(motor->stepToReach == STEPS_INFINITE_POSITIVE) + dir = DIR_POSITIVE; + else if(motor->stepToReach == STEPS_INFINITE_NEGATIVE) + dir = DIR_NEGATIVE; + else if(motor->stepToReach > motor->step) + dir = DIR_POSITIVE; + else + dir = DIR_NEGATIVE; + + setDirection(motor, dir); + + // Enable of the home sensor control, if necessary + // (before calling this function set the motor direction as above) + stepper_enableCheckHome(motor, (dir == DIR_POSITIVE)); + + // if the movement is infinite negative set the sw direction positive + // (not the hw: see below) to count the steps + if(motor->stepToReach == STEPS_INFINITE_NEGATIVE) motor->dir = DIR_POSITIVE; + + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_RUN; + } + else + { + /* + * If we are here we should do at least one step. + * anyway .... + */ + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + return MSTS_PREIDLE; + } +} + +static enum StepperState FSM_preinit(struct Stepper* motor) +{ + // Set current high, and wait for stabilization + if (setHighCurrent(motor)) + { + motor->skipIrqs = MOTOR_SWITCH_COUNT; + return MSTS_PREINIT; + } + + /* + * This state is used when initializing the motor, to bring back + * to the home. The idea is that we do not know where the motor + * is at this point, so there can be two possibilities: + * + * - The motor is already in home. We do not know how much into the + * home we are. So we need to get out of the home (MSTS_LEAVING) + * and then get back into it of the desired number of steps. + * + * - The motor is not in home: we need to look for it (MSTS_INIT). + * We can safely assume that we will find the home in the negative + * direction. For circular motors, any direction would do. For + * other motors, the home is set at zero, so the current position + * has to be a positive value. + * + */ + if (stepper_readHome(motor)) + { + setDirection(motor, DIR_POSITIVE); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_LEAVING; + } + + setDirection(motor, DIR_NEGATIVE); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return MSTS_INIT; +} + + +static enum StepperState FSM_init(struct Stepper* motor) +{ + // If we are not in home, keep looking + if (!stepper_readHome(motor)) + { + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_INIT; + } + + /* + * Home! We still need to enter the home of the specified number of steps. + * That will be our absolute zero. + */ + + motor->step = motor->cfg->stepsInHome - 1; // start counting down steps in home + motor->stepToReach = 0; + + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_ENTERING; +} + +static enum StepperState FSM_entering(struct Stepper* motor) +{ + // We must be in home + //ASSERT(stepper_readHome(motor)); + + // if while entering the sensor we are no more in home we reset the steps + // counter (optical sensor) + if(!stepper_readHome(motor)) + motor->step = motor->cfg->stepsInHome - 1; + + // Current Position must be non-negative + ASSERT(motor->step >= 0); + + if(motor->step == 0) + { + // reach the final target inside home sensor + motor->step = 0; + return MSTS_PREIDLE; + } + + // keep doing steps + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_ENTERING; +} + +static enum StepperState FSM_leaving(struct Stepper* motor) +{ + ASSERT(motor->dir == DIR_POSITIVE); + + motor->step = 0; + if (!stepper_readHome(motor)) + { + // we are out of home : change state and going far from sensor + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_OUTHOME; + } + else + { + // Still at home. Just wait here and keep doing steps + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_LEAVING; + } +} + +static enum StepperState FSM_outhome(struct Stepper* motor) +{ + ASSERT(motor->dir == DIR_POSITIVE); + + // We must be out of home: once we are no more in home + // we just need to move away, even if not very precide (optical sensor) + // ASSERT(!stepper_readHome(motor)); + + if(motor->step >= motor->cfg->stepsOutHome) + { + // reach the final target outside home sensor + motor->step = 0; + + // start home entering procedure (delay in executing step) + setDirection(motor, DIR_NEGATIVE); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + motor->skipIrqs = MOTOR_SWITCH_COUNT; + return MSTS_INIT; + } + + // keep doing steps + stepper_schedule_irq(motor, motor->cfg->clocksHome, true); + return MSTS_OUTHOME; +} + +static void FAST_FUNC stepper_interrupt(struct Stepper *motor) +{ + enum StepperState newState; + + // Check if we need to skip a certain number of IRQs + if (motor->skipIrqs) + { + --motor->skipIrqs; + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + return; + } + + ASSERT(motor->state); + newState = motor->state(motor); + stepper_changeState(motor, newState); +} + + + + +/************************************************************************/ +/* Public API */ +/************************************************************************/ + +/** + * Initialize the stepper module + */ +void stepper_init(void) +{ + STEPPER_INIT(); + + // before starting the power all the stepper enable must be surely low + stepper_disable(); + + // Bind functions to general states + memset(general_states, 0, sizeof(general_states)); + general_states[MSTS_IDLE] = FSM_idle; + general_states[MSTS_PREIDLE] = FSM_preidle; + general_states[MSTS_PRERUN] = FSM_prerun; + general_states[MSTS_RUN] = FSM_run; + general_states[MSTS_PREINIT] = FSM_preinit; + general_states[MSTS_INIT] = FSM_init; + general_states[MSTS_ENTERING] = FSM_entering; + general_states[MSTS_LEAVING]= FSM_leaving; + general_states[MSTS_OUTHOME]= FSM_outhome; + general_states[MSTS_ERROR]= FSM_error; +} + +void stepper_end(void) +{ + // Disable all stepper timer interrupt to stop motors + for (int i = 0; i < CONFIG_NUM_STEPPER_MOTORS; i++) + stepper_disable_irq(&all_motors[i]); +} + +/** + * Apply a setup config to motor structure context + */ +struct Stepper* stepper_setup(int index, struct StepperConfig *cfg) +{ + struct Stepper* motor; + + ASSERT(index < CONFIG_NUM_STEPPER_MOTORS); + + motor = &all_motors[index]; + motor->index = index; + motor->cfg = cfg; + + //Register timer to stepper, and enable irq + stepper_tc_setup(motor->index, &stepper_interrupt, motor); + + stepper_reset(motor); + + stepper_enable_irq(motor); + + return motor; +} + +/** + * Set the enable for all the motors to 0 before switching on the power + */ +void stepper_disable(void) +{ + STEPPER_DISABLE_ALL(); +} + +/** + * Reset the motor + */ +void stepper_reset(struct Stepper *motor) +{ + /* + * To stop motor diable stepper irq. + */ + stepper_disable_irq(motor); + + //Disable a stepper motor + STEPPER_DISABLE(MOTOR_INDEX(motor)); + + // Setup context variables + motor->power = 0; + motor->step = 0; + motor->rampStep = -1; + // We cannot set the clock at zero at start because of a limit in the fixed point ramp + motor->rampClock = motor->cfg->ramp.clocksMaxWL; + motor->rampValue = motor->cfg->ramp.clocksMaxWL; + motor->speed = SPEED_STOPPED; + motor->stepToReach = 0; + motor->skipIrqs = 0; + motor->stepCircular = 0; + setDirection(motor, DIR_POSITIVE); + setLowCurrent(motor); + + motor->changeCurrentIrqs = 0; + + // default value (disable level sensor check) + motor->stepsDeaf = DEAFSTEPS_DEFAULT; + + STEPPER_SET_HALF_STEP(MOTOR_INDEX(motor), motor->cfg->flags.halfStep); + STEPPER_SET_CONTROL_BIT(MOTOR_INDEX(motor), motor->cfg->flags.controlBit); + + if (motor->cfg->homeSensorIndex < NUM_HOME_SENSORS) + hw_home_sensor_set_inverted(motor->cfg->homeSensorIndex, motor->cfg->flags.homeInverted); + + if (motor->cfg->levelSensorIndex != MOTOR_NO_LEVEL_SENSOR) + hw_level_sensor_set_inverted(motor->cfg->levelSensorIndex, motor->cfg->flags.levelInverted); + + stepper_changeState(motor, MSTS_IDLE); + + // Reset stepper timer counter + stepper_tc_resetTimer(motor->timer); + + // reset hw to the stepper motor + STEPPER_RESET(MOTOR_INDEX(motor)); + STEPPER_ENABLE(MOTOR_INDEX(motor)); +} + + +void stepper_updateHalfStep(struct Stepper *motor) +{ + STEPPER_SET_HALF_STEP(MOTOR_INDEX(motor), motor->cfg->flags.halfStep); +} + +void stepper_updateControlBit(struct Stepper *motor) +{ + STEPPER_SET_CONTROL_BIT(MOTOR_INDEX(motor), motor->cfg->flags.controlBit); +} + +void stepper_updateControlMoveBit(struct Stepper *motor) +{ + STEPPER_SET_CONTROL_BIT(MOTOR_INDEX(motor), motor->cfg->flags.controlMoveBit); +} + +/** + * Find the home of a \a motor assuming no current knowledge about its position. + * + * This must be done when the motor is desynchronized with the firmware and + * we do not know anymore where it is. + * + * In normal operation mode, to go back to the home, it is sufficient to use + * move to step #0 with stepper_move, since the home is always at step #0. + */ +void stepper_home(struct Stepper *motor) +{ + + // Begin home procedure + stepper_disable_irq(motor); + + // disable home sensor check (default) + setCheckSensor(motor, MOTOR_HOMESENSOR_NOCHECK); + // deafult value (disable level sensor check) + motor->stepsDeaf = DEAFSTEPS_DEFAULT; + + setDirection(motor, DIR_POSITIVE); + stepper_schedule_irq(motor, MOTOR_SWITCH_TICKS, false); + stepper_changeState(motor, MSTS_PREINIT); + + stepper_enable_irq(motor); +} + + +void stepper_setStep(struct Stepper *motor, int16_t step) +{ + motor->step = step; +} + + +int16_t stepper_getStep(struct Stepper *motor) +{ + return motor->step; +} + +int16_t stepper_getLevelStep(struct Stepper *motor) +{ + return motor->stepsLevel; +} + +void stepper_set_stepCircular(struct Stepper *motor, int16_t steps) +{ + motor->stepCircular = steps; +} + +int16_t stepper_get_stepCircular(struct Stepper *motor) +{ + return motor->stepCircular; +} + +int16_t stepper_scaleSteps(struct Stepper *motor, int16_t dir) +{ + int16_t steps; + + // scale the current position inside the motor lap + if(!motor->stepCircular) return 0; + + // to be sure .... + while(motor->step > motor->stepCircular) motor->step -= motor->stepCircular; + + if(dir == DIR_NEGATIVE) + { + steps = ((motor->stepCircular - motor->step) % motor->stepCircular); + motor->step = steps; + } + /* + else + steps = (motor->step % motor->stepCircular); + motor->step = steps; + */ + return motor->step; +} + +static void stepper_enableCheckHome(struct Stepper *motor, bool bDirPositive) +{ + enum MotorHomeSensorCheck value = MOTOR_HOMESENSOR_NOCHECK; // default + + motor->stepsTollMin = 0; + + if((motor->stepToReach != STEPS_INFINITE_POSITIVE) && + (motor->stepToReach != STEPS_INFINITE_NEGATIVE) ) + { + if(bDirPositive) // else if(motor->dir == DIR_POSITIVE) + { + /* if the direction is positive (movement from 0 position), + * if the starting position is inside home and the target position + * is outside home -> the motor has to cross the home sensor -> enable the control + */ + if (motor->step < motor->cfg->stepsInHome - motor->cfg->stepsTollOutHome && + motor->stepToReach > motor->cfg->stepsInHome + motor->cfg->stepsTollOutHome) + { + value = MOTOR_HOMESENSOR_OUTCHECK; + // home sensor out max position + motor->stepsTollMax = motor->cfg->stepsInHome + motor->cfg->stepsTollOutHome + MOTOR_CONSECUTIVE_ERROR_STEPS; + // home sensor in max position + if(motor->cfg->stepsInHome + MOTOR_CONSECUTIVE_ERROR_STEPS > motor->cfg->stepsTollOutHome) + motor->stepsTollMin = motor->cfg->stepsInHome + MOTOR_CONSECUTIVE_ERROR_STEPS - motor->cfg->stepsTollOutHome; + } + } + else // if(motor->dir == DIR_NEGATIVE) + { + /* + * if the direction is negative (movement to 0 position), + * if the starting position is far from home and the target position + * is inside home -> the motor has to cross the home sensor -> enable the control + */ + if (motor->step > motor->cfg->stepsInHome + motor->cfg->stepsTollInHome && + motor->stepToReach < motor->cfg->stepsInHome - motor->cfg->stepsTollInHome) + { + value = MOTOR_HOMESENSOR_INCHECK; + // home sensor out max position + motor->stepsTollMax = motor->cfg->stepsInHome + motor->cfg->stepsTollInHome - MOTOR_CONSECUTIVE_ERROR_STEPS; + // home sensor in max position + if(motor->cfg->stepsInHome > motor->cfg->stepsTollInHome + MOTOR_CONSECUTIVE_ERROR_STEPS) + motor->stepsTollMin = motor->cfg->stepsInHome - (motor->cfg->stepsTollInHome + MOTOR_CONSECUTIVE_ERROR_STEPS); + } + } + } + setCheckSensor(motor, value); +} + +/** + * Move motor to absolute position at specified speed + * + * \arg steps position to reach in steps + * \arg speed speed in timer ticks (use TIME2CLOCKS() to convert) + */ +int16_t stepper_move(struct Stepper *motor, int16_t steps, uint16_t speed, int16_t deafstep) +{ + // if the stepper already is in the desired position -> nothing to do + if (motor->step == steps) + return 0; + + stepper_disable_irq(motor); + + // final position + motor->stepToReach = steps; + + // clear error steps + motor->stepsErrorHome = 0; + + // position to start level check + motor->stepsDeaf = deafstep; + + // clear level position + motor->stepsLevel = 0; + + if (speed < motor->cfg->ramp.clocksMinWL) + { + ASSERT2(0, "speed too fast (small number)"); + speed = motor->cfg->ramp.clocksMinWL; + } + + motor->rampClock = motor->cfg->ramp.clocksMaxWL; + motor->rampValue = motor->cfg->ramp.clocksMaxWL; + + // TODO: find the exact value for motor->speed searching in the ramp array. + motor->speed = speed; + + stepper_enable_irq(motor); + + return 0; +} + + +/** + * Stop motor gracefully + */ +void stepper_stop(struct Stepper *motor) +{ + /* + * The best way is to set the target of the movement to the minimum + * distance needed to decelerate. The logic in FSM_run will do the rest. + */ + if(stepper_idle(motor)) + return; + + stepper_disable_irq(motor); + motor->stepToReach = motor->step + motor->rampStep * motor->dir; + stepper_enable_irq(motor); +} + + +/** + * Stop motor immediately, changing the status + */ +void stepper_break(struct Stepper *motor, enum StepperState state) +{ + // The best way to abort any operation is to go back to pre-idle mode + stepper_disable_irq(motor); + + // Set of Speed disabled and Steps reached so that the function + // stepper_idle() succeeds + motor->speed = SPEED_STOPPED; + motor->stepToReach = motor->step; + stepper_changeState(motor, state); + stepper_enable_irq(motor); +} + +///< Returns true if the stepper is in idle at the final position or in error: +// this means anyway that the motor is not moving +bool stepper_idle(struct Stepper *motor) +{ + return (stepper_isState(motor, MSTS_ERROR) || + (stepper_isState(motor, MSTS_IDLE) && motor->step == motor->stepToReach) ); +} + +///< Returns true if the stepper is in error mode +bool stepper_error(struct Stepper *motor) +{ + return (stepper_isState(motor, MSTS_ERROR)); +} + +///< check the home sensor in zero position +bool stepper_inhome(struct Stepper *motor) +{ + return(stepper_getStep(motor) == 0 && + !stepper_readHome(motor) ); +} diff --git a/bertos/drv/stepper.h b/bertos/drv/stepper.h new file mode 100644 index 0000000..a4c381f --- /dev/null +++ b/bertos/drv/stepper.h @@ -0,0 +1,227 @@ +/** + * \file + * + * + * \brief Driver to control stepper motor + * + * + * \author Francesco Michelini + * \author Giovanni Bajo + * \author Bernie Innocenti + * \author Simone Zinanni + * \author Daniele Basile + * + * $WIZ$ module_name = "stepper" + * $WIZ$ module_depends = "timer", "ramp" + * $WIZ$ module_configuration = "bertos/cfg/cfg_stepper.h" + * $WIZ$ module_hw = "bertos/hw/hw_stepper.h" + * $WIZ$ module_supports = "not avr" + */ + +#ifndef DRV_STEPPER_H +#define DRV_STEPPER_H + +#include + +#include + +// Forward declaration +struct Stepper; + +///< Special value for steps to move the motor continuously +#define STEPS_INFINITE_POSITIVE ((int16_t)0xFFFF) +#define STEPS_INFINITE_NEGATIVE ((int16_t)0x8FFF) + +///< Maximum value for stepper steps +#define MAX_STEPS 0x7FFF + +///< Default value -> no level sensor associated to the motor +#define MOTOR_NO_LEVEL_SENSOR 0xFFFF + +///< Default value -> no home sensor associated to the motor +#define MOTOR_NO_HOME_SENSOR 0xFFFF + +///< Default value for deafsteps in normal movement (no level sensor) +#define DEAFSTEPS_DEFAULT MAX_STEPS + +///< Out-of-band values for speed +//\{ +#define SPEED_STOPPED 0xFFFF ///< motor is stopped +#define SPEED_HOMING 0xFFFE ///< motor is homing +//\} + +// default values for steps inside and outside home sensor +#define MOTOR_INSIDE_HOME_STEPS 10 +#define MOTOR_OUTSIDE_HOME_STEPS 40 + +// default value for home sensor tolerance +#define MOTOR_TOLERANCE_HOME_STEPS 2 + +// default value for consecutive error +#define MOTOR_CONSECUTIVE_ERROR_STEPS 3 + +// values for the home control enabling +enum MotorHomeSensorCheck +{ + MOTOR_HOMESENSOR_NOCHECK = 0, + MOTOR_HOMESENSOR_INCHECK, + MOTOR_HOMESENSOR_OUTCHECK +}; + +// default value in ms for home procedure timeout +#define MOTOR_TIMEOUT_HOME 20000 + +/** + * Motor direction + */ +enum MotorDirection +{ + DIR_POSITIVE = 1, ///< moving away from zero (which is the home) + DIR_NONE = 0, ///< no movement + DIR_NEGATIVE = -1 ///< moving towards towards zero (which is the home) +}; + +#define STEPPER_MAX_STATES 32 + + +/** + * Stepper state-machine conditions + */ +enum StepperState +{ + MSTS_UNINIT, ///< stepper_init() not yet called + MSTS_RUN, ///< running + MSTS_IDLE, ///< waiting for a command + MSTS_PREIDLE, ///< waiting before going low-current + MSTS_PRERUN, ///< waiting after high-current + +// Home procedure + MSTS_PREINIT, ///< preparing to initialize ;-) + MSTS_INIT, ///< initializing home procedure + MSTS_ENTERING, ///< entering home sensor + MSTS_LEAVING, ///< moving away from home (inside the sensor) + MSTS_OUTHOME, ///< moving away from home (outside the sensor) + + MSTS_ERROR, ///< error status + + ///< Dummy entry to guarantee the right underlying size for the enum + MSTS_DUMMY_ALIGN = STEPPER_MAX_STATES - 1 +}; + +///< Pointer to a function handling a state of the FSM driving the motor +typedef enum StepperState (*fsm_state)(struct Stepper* ); + +///< Pointer to a isr stepper function +typedef void (*stepper_isr_t)(struct Stepper* ); + +///< Time for steppers motor +typedef uint16_t stepper_time_t; + +/** + * Stepper configuration + */ +struct StepperConfig +{ + struct Ramp ramp; ///< Acceleration ramp + uint16_t pulse; ///< (clocks) Length of the clock pulse used to drive the motor + + fsm_state states[STEPPER_MAX_STATES]; ///< Custom FSM states (or NULL for default handling) + + int16_t stepsInHome; ///< Additional steps to do after home detection + int16_t stepsOutHome; ///< Additional steps to do leaving sensor in home procedure + uint16_t clocksHome; ///< Clock ticks for steps done when searching home + + int16_t stepsTollOutHome; ///< tolerance steps leaving home sensor control while moving + int16_t stepsTollInHome; ///< tolerance steps leaving home sensor control while moving + + int16_t timeoutHome; ///< timeout in ms in home procedure + + uint8_t powerRun; ///< Vref voltage when motor runs (0-255) + uint8_t powerIdle; ///< Vref voltage when motor is idle (0-255) + + uint16_t homeSensorIndex; ///< Home Sensor index in the sensor list + uint16_t levelSensorIndex; ///< Level Sensor index in the sensor list + + struct + { + bool homeInverted : 1; ///< True for inverted home sensor + bool halfStep : 1; ///< True for half-step mode + bool axisInverted : 1; ///< True if the CW/CCW are inverted from default + bool levelInverted : 1; ///< True for inverted level sensor + bool controlBit : 1; ///< Control bit status + bool controlMoveBit : 1; ///< Control bit status in movement + bool highcurrentBit : 1; ///< Mantain high current bit status + } flags; +}; + + +/** + * Motor context structure + */ +struct Stepper +{ + const struct StepperConfig *cfg; ///< Configuration of this stepper + fsm_state state; ///< Motor FSM state function + + struct TimerCounter *timer; ///< HW timer bound to this motor + uint16_t index; ///< Index of the motor + + volatile int16_t step; ///< Steps counter (used in interrupt) + volatile int16_t rampStep; ///< Current position in acceleration ramp (used in intrrupt) +#if RAMP_USE_FLOATING_POINT + float rampValue; ///< Nr of Ticks for current step in ramp + float rampClock; ///< Cumulative nr of ticks for current step in ramp +#else + uint16_t rampValue; + uint32_t rampClock; +#endif + + enum MotorDirection dir; ///< Current direction + uint8_t power; ///< Current power + + uint16_t speed; ///< Timer compare value to reach + int16_t stepToReach; ///< Final position to reach when running + + int16_t skipIrqs; ///< Counter used to skip IRQs (delay state changes) + int16_t changeCurrentIrqs; ///< Counter used to change current level (delay state changes) + + int8_t enableCheckHome; ///< enable the home sensor control during movement + int8_t stepsErrorHome; ///< number of consecutive steps in error + int16_t stepsTollMax; ///< home sensor out max position + int16_t stepsTollMin; ///< home sensor in max position + + int16_t stepsDeaf; ///< Position after which start the level check + int16_t stepsLevel; ///< Position of level contact + + int16_t stepCircular; ///< Steps corresponding to 360 degrees (rotating motor) +}; + + +void stepper_init(void); +void stepper_end(void); +struct Stepper *stepper_setup(int index, struct StepperConfig *cfg); +void stepper_disable(void); +void stepper_reset(struct Stepper *motor); +void stepper_home(struct Stepper *motor); +void stepper_setStep(struct Stepper *motor, int16_t step); +int16_t stepper_getStep(struct Stepper *motor); +int16_t stepper_move(struct Stepper *motor, int16_t step, uint16_t speed, int16_t deafstep); +void stepper_stop(struct Stepper *motor); +void stepper_break(struct Stepper *motor, enum StepperState state); +bool stepper_idle(struct Stepper *motor); +bool stepper_readHome(struct Stepper *motor); +bool stepper_readLevel(struct Stepper *motor); +void stepper_updateHalfStep(struct Stepper *motor); +void stepper_updateControlBit(struct Stepper *motor); +void stepper_updateControlMoveBit(struct Stepper *motor); +bool stepper_error(struct Stepper *motor); +bool stepper_inhome(struct Stepper *motor); +int16_t stepper_getLevelStep(struct Stepper *motor); +void stepper_set_stepCircular(struct Stepper *motor, int16_t steps); +int16_t stepper_get_stepCircular(struct Stepper *motor); +int16_t stepper_scaleSteps(struct Stepper *motor, int16_t dir); + +#endif /* DRV_STEPPER_H */ diff --git a/bertos/drv/tas5706a.c b/bertos/drv/tas5706a.c new file mode 100644 index 0000000..a1ea044 --- /dev/null +++ b/bertos/drv/tas5706a.c @@ -0,0 +1,152 @@ +/** + * \file + * + * + * \brief TAS5706A Power DAC i2c driver. + * + * + * \author Francesco Sacchi + * \author Daniele Basile + */ + +#include "tas5706a.h" + +#include "hw/hw_tas5706a.h" + +#include "cfg/cfg_tas5706a.h" +#include "cfg/cfg_i2c.h" + +#include + +#include +#include + +typedef uint8_t tas_addr_t; + +#define TAS_ADDR 0x36 + +#define TRIM_REG 0x1B +#define SYS_REG2 0x05 +#define VOLUME_REG 0x07 +#define MUTE_VOL 0xFF + +#define DB_TO_REG(db) ((24 - (db)) * 2) + +#define CH1_VOL_REG 0x08 +#define CH2_VOL_REG 0x09 +#define CH3_VOL_REG 0x0A +#define CH4_VOL_REG 0x0B + + +INLINE bool tas5706a_putc(I2c *i2c, tas_addr_t addr, uint8_t ch) +{ + i2c_start_w(i2c, TAS_ADDR, 2, I2C_STOP); + i2c_putc(i2c, addr); + i2c_putc(i2c, ch); + + if (i2c_error(i2c)) + return false; + + return true; +} + +INLINE int tas5706a_getc(I2c *i2c, tas_addr_t addr) +{ + int ch; + + i2c_start_w(i2c, TAS_ADDR, 2, I2C_NOSTOP); + i2c_putc(i2c, addr); + i2c_start_r(i2c, TAS_ADDR, 1, I2C_STOP); + ch = (int)(uint8_t)i2c_getc(i2c); + + if (i2c_error(i2c)) + return EOF; + + return ch; +} + +void tas5706a_setVolume_3(I2c *i2c, Tas5706aCh ch, tas5706a_vol_t vol) +{ + ASSERT(ch < TAS_CNT); + ASSERT(vol <= TAS_VOL_MAX); + + tas_addr_t addr1, addr2; + + switch(ch) + { + case TAS_CH1: + addr1 = CH1_VOL_REG; + addr2 = CH3_VOL_REG; + break; + case TAS_CH2: + addr1 = CH2_VOL_REG; + addr2 = CH4_VOL_REG; + break; + default: + ASSERT(0); + return; + } + + uint8_t vol_att = 0xff - ((vol * 0xff) / TAS_VOL_MAX); + + tas5706a_putc(i2c, addr1, vol_att); + tas5706a_putc(i2c, addr2, vol_att); +} + +void tas5706a_setLowPower_2(I2c *i2c, bool val) +{ + ASSERT(i2c); + + TAS5706A_SETPOWERDOWN(val); + TAS5706A_SETMUTE(val); +} + + +void tas5706a_init_1(I2c *i2c) +{ + ASSERT(i2c); + MOD_CHECK(timer); + + TAS5706A_PIN_INIT(); + timer_delay(200); + TAS5706A_SETPOWERDOWN(false); + TAS5706A_SETMUTE(false); + TAS5706A_MCLK_INIT(); + timer_delay(2); + TAS5706A_SETRESET(false); + timer_delay(20); + tas5706a_putc(i2c, TRIM_REG, 0x00); + + tas5706a_putc(i2c, VOLUME_REG, DB_TO_REG(CONFIG_TAS_MAX_VOL)); + + /* Unmute */ + tas5706a_putc(i2c, SYS_REG2, 0); +} diff --git a/bertos/drv/tas5706a.h b/bertos/drv/tas5706a.h new file mode 100644 index 0000000..3df9be4 --- /dev/null +++ b/bertos/drv/tas5706a.h @@ -0,0 +1,128 @@ +/** + * \file + * + * + * \brief TAS5706A Power DAC i2c driver. + * + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "tas5706a" + * $WIZ$ module_depends = "timer", "i2c" + * $WIZ$ module_configuration = "bertos/cfg/cfg_tas5706a.h" + * $WIZ$ module_hw = "bertos/hw/hw_tas5706a.h" + */ + +#ifndef DRV_TAS5706A_H +#define DRV_TAS5706A_H + +#include "cfg/cfg_i2c.h" + +#include + +#include + +#if COMPILER_C99 + #define tas5706a_init(...) PP_CAT(tas5706a_init ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) + #define tas5706a_setLowPower(...) PP_CAT(tas5706a_setLowPower ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) + #define tas5706a_setVolume(...) PP_CAT(tas5706a_setVolume ## _, COUNT_PARMS(__VA_ARGS__)) (__VA_ARGS__) +#else + #define tas5706a_init(args...) PP_CAT(tas5706a_init ## _, COUNT_PARMS(args)) (args) + #define tas5706a_setLowPower(args...) PP_CAT(tas5706a_setLowPower ## _, COUNT_PARMS(args)) (args) + #define tas5706a_setVolume(args...) PP_CAT(tas5706a_setVolume ## _, COUNT_PARMS(args)) (args) +#endif + +typedef enum Tas5706aCh +{ + TAS_CH1, + TAS_CH2, + TAS_CNT, +} Tas5706aCh; + +/** + * TAS minimum volume (%). + */ +#define TAS_VOL_MIN 0 + +/** + * TAS maximum volume (%). + */ +#define TAS_VOL_MAX 100 + +typedef uint8_t tas5706a_vol_t; + +/** + * Set the volume for the specified channel. + * + * The volume must be expressed in % and will be at maximum CONFIG_TAS_MAX_VOL. + * + * \param i2c The i2c context. + * \param ch The channel to be controlled. + * \param vol The volume you want to set. + */ +void tas5706a_setVolume_3(I2c *i2c, Tas5706aCh ch, tas5706a_vol_t vol); + +/** + * Set TAS chip to low power mode. + * + * When in low power mode, the TAS will not play any sound. You should put the TAS chip in low + * power whenever possible to prevent overheating and to save power. + * + * \param i2c The i2c context. + * \param val True if you want to enable low power mode, false otherwise. + */ +void tas5706a_setLowPower_2(I2c *i2c, bool val); + +/** + * Initialize the TAS chip. + * + * \param i2c The i2c context. + */ +void tas5706a_init_1(I2c *i2c); + +#if !CONFIG_I2C_DISABLE_OLD_API + +DEPRECATED INLINE void tas5706a_setVolume_2(Tas5706aCh ch, tas5706a_vol_t vol) +{ + tas5706a_setVolume_3(&local_i2c_old_api, ch, vol); +} +DEPRECATED INLINE void tas5706a_setLowPower_1(bool val) +{ + tas5706a_setLowPower_2(&local_i2c_old_api, val); +} +DEPRECATED INLINE void tas5706a_init_0(void) +{ + tas5706a_init_1(&local_i2c_old_api); +} + +#endif /* !CONFIG_I2C_DISABLE_OLD_API */ + +#endif /* DRV_TAS5706A_H */ diff --git a/bertos/drv/tc520.c b/bertos/drv/tc520.c new file mode 100644 index 0000000..2dcd493 --- /dev/null +++ b/bertos/drv/tc520.c @@ -0,0 +1,168 @@ +/** + * \file + * + * + * + * \brief TC520 ADC driver (implementation) + * + * + * \author Francesco Sacchi + * \author Marco Benelli + */ + + +#include "hw/hw_tc520.h" + +#include +#include + +#include +#include + +#warning FIXME:This implementation is obsolete. Refactor with KFile interface. + +#if 0 + +#include + +static Serial *spi_ser; + +#define TC520_CONVERSION_TIMEOUT ms_to_ticks(1000) +#define INIT_LOAD_VALUE 0x00 + +/** + * Start an AD conversion and return result. + * + * To start a conversion first we must pull down CE pin. + * The ADC starts a convertion and keeps the DV pin high until the end. + * At this point, we can read the conversion value by SPI. + * The convertion result is yield in 3 bytes. + * + * \verbatim + * + * First byte: + * bit | Value + * ----|------- + * 7 | Overrange + * 6 | Polarity + * 5:0 | data bits 15:10 + * + * Second byte: data 9:2 + * + * Third byte: + * bit | Value + * ----|------- + * 7 | data bit 1 + * 6 | data bit 0 + * 5:0 | '0' + * + * \endverbatim + * + * So, to get the result we must shift and recompose the bits. + * \note Overrange bit is handled as the 17th data bit. + */ +tc520_data_t tc520_read(void) +{ + /* Start convertion and wait */ + CE_LOW(); + ticks_t start = timer_clock(); + do + { + /* timeout check */ + if (timer_clock() - start >= TC520_CONVERSION_TIMEOUT) + { + ASSERT(0); + CE_HIGH(); + return TC520_MAX_VALUE; + } + } + while(DV_LOW()); + + start = timer_clock(); + do + { + /* timeout check */ + if (timer_clock() - start >= TC520_CONVERSION_TIMEOUT) + { + ASSERT(0); + CE_HIGH(); + return TC520_MAX_VALUE; + } + } + while(DV_HIGH()); + + /* Ok, convertion finished, read result */ + CE_HIGH(); + READ_LOW(); + + /* RX buffer could be dirty...*/ + ser_purge(spi_ser); + + /* I/O buffer */ + uint8_t buf[3] = "\x0\x0\x0"; + + /* Dummy write to activate recv */ + ser_write(spi_ser, buf, sizeof(buf)); + ser_drain(spi_ser); + READ_HIGH(); + + /* recv */ + ASSERT(ser_read(spi_ser, buf, sizeof(buf)) == sizeof(buf)); + + tc520_data_t res; + + /* Recompose data */ + res = (((tc520_data_t)(buf[0] & 0x3F)) << 10) | (((tc520_data_t)buf[1]) << 2) | (((tc520_data_t)buf[2]) >> 6); + + #define OVERRANGE_BIT BV(7) + /* Handle overrange bit as 17th bit */ + if (buf[0] & OVERRANGE_BIT) + res |= BV32(16); + + return res; +} + + +/** + * Initialize tc520 A/D converter driver + */ +void tc520_init(Serial *spi_port) +{ + spi_ser = spi_port; + /* init io ports */ + TC520_HW_INIT; + /* Send initial load value */ + LOAD_LOW(); + ser_putchar(INIT_LOAD_VALUE, spi_ser); + ser_drain(spi_ser); + LOAD_HIGH(); +} + +#endif diff --git a/bertos/drv/tc520.h b/bertos/drv/tc520.h new file mode 100644 index 0000000..ccd66ce --- /dev/null +++ b/bertos/drv/tc520.h @@ -0,0 +1,55 @@ +/** + * \file + * + * + * + * \brief TC520 ADC driver (intercace) + * + * \author Francesco Sacchi + * \author Marco Benelli + */ + +#ifndef DRV_TC520_H +#define DRV_TC520_H + +#warning FIXME: This drive is obsolete, you should refactor it. + +#include +#include + +typedef uint32_t tc520_data_t; + +/* 17 bit max value */ +#define TC520_MAX_VALUE 0x1FFFFUL + +tc520_data_t tc520_read(void); +void tc520_init(Serial *spi_port); + +#endif /* DRV_TC520_H */ diff --git a/bertos/drv/thermo.c b/bertos/drv/thermo.c new file mode 100644 index 0000000..6fa5ba2 --- /dev/null +++ b/bertos/drv/thermo.c @@ -0,0 +1,327 @@ +/** + * \file + * + * + * \brief Thermo-control driver. + * + * The Thermo controll can works both with kernel or without it. In the case + * we use kernel, the thermo controll is done by one process that poll every + * CONFIG_THERMO_INTERVAL_MS the temperature sensor and make all operation to + * follow the target temperature. While we not use the kernel the module works + * with one timer interrupt in the same way of the kenel case. + * + * \author Giovanni Bajo + * \author Francesco Sacchi + * \author Daniele Basile + * + */ + +#include "hw/thermo_map.h" +#include "hw/hw_thermo.h" + +#include "cfg/cfg_thermo.h" + +#include +#include +#include +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL CONFIG_THERMO_LOG_LEVEL +#define LOG_VERBOSITY CONFIG_THERMO_LOG_FORMAT +#include + +#include +#include +#include + +#include + +#define THERMO_OFF 0 +#define THERMO_HEATING BV(0) +#define THERMO_FREEZING BV(1) +#define THERMO_TGT_REACH BV(2) +#define THERMOERRF_NTCSHORT BV(3) +#define THERMOERRF_NTCOPEN BV(4) +#define THERMOERRF_TIMEOUT BV(5) +#define THERMO_ACTIVE BV(6) +#define THERMO_TIMER BV(7) + +#define THERMO_ERRMASK (THERMOERRF_NTCSHORT | THERMOERRF_NTCOPEN | THERMOERRF_TIMEOUT) + + +#if CONFIG_KERN + /** Stack process for Thermo process. */ + static PROC_DEFINE_STACK(thermo_poll_stack, 400); +#else + /** Timer for thermo-regulation. */ + static Timer thermo_timer; +#endif + +typedef struct ThermoControlDev +{ + deg_t hifi_samples[CONFIG_THERMO_HIFI_NUM_SAMPLES]; + deg_t cur_hifi_sample; + deg_t target; + thermostatus_t status; + ticks_t expire; + ticks_t on_time; +} ThermoControlDev; + +/** Array of thermo-devices. */ +ThermoControlDev devs[THERMO_CNT]; + +/** + * Return the status of the specific \a dev thermo-device. + */ +thermostatus_t thermo_status(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + return devs[dev].status; +} + + +/** + * Do a single thermo control for device \a dev. + */ +static void thermo_do(ThermoDev index) +{ + ThermoControlDev* dev = &devs[index]; + deg_t cur_temp; + deg_t tolerance = thermo_hw_tolerance(index); + + cur_temp = thermo_hw_read(index); + + // Store the sample into the hifi FIFO buffer for later interpolation + dev->hifi_samples[dev->cur_hifi_sample] = cur_temp; + if (++dev->cur_hifi_sample == CONFIG_THERMO_HIFI_NUM_SAMPLES) + dev->cur_hifi_sample = 0; + + cur_temp = thermo_readTemperature(index); + + if (cur_temp == NTC_SHORT_CIRCUIT || cur_temp == NTC_OPEN_CIRCUIT) + { + if (cur_temp == NTC_SHORT_CIRCUIT) + { + LOG_INFOB(if (!(dev->status & THERMOERRF_NTCSHORT)) + LOG_INFO("dev[%d], thermo_do: NTC_SHORT\n",index);); + + dev->status |= THERMOERRF_NTCSHORT; + } + else + { + + LOG_INFOB(if (!(dev->status & THERMOERRF_NTCOPEN)) + LOG_INFO("dev[%d], thermo_do: NTC_OPEN\n", index);); + + dev->status |= THERMOERRF_NTCOPEN; + } + + /* Reset timeout when there is an ntc error */ + dev->expire = thermo_hw_timeout(index) + timer_clock(); + thermo_hw_off(index); + return; + } + dev->status &= ~(THERMOERRF_NTCOPEN | THERMOERRF_NTCSHORT); + + if ((cur_temp < dev->target - tolerance) || (cur_temp > dev->target + tolerance)) + { + dev->status &= ~THERMO_TGT_REACH; + + /* Check for timeout */ + if (timer_clock() - dev->expire > 0) + { + dev->status |= THERMOERRF_TIMEOUT; + LOG_INFO("dev[%d], thermo_do: TIMEOUT\n", index); + } + } + else /* In target */ + { + /* Clear errors */ + dev->status &= ~THERMO_ERRMASK; + dev->status |= THERMO_TGT_REACH; + + /* Reset timeout in case we go out of target in the future */ + dev->expire = thermo_hw_timeout(index) + timer_clock(); + } + + if (cur_temp < dev->target) + dev->status = (dev->status | THERMO_HEATING) & ~THERMO_FREEZING; + else + dev->status = (dev->status & ~THERMO_HEATING) | THERMO_FREEZING; + + thermo_hw_set(index, dev->target, cur_temp); + +} + +static void poll(void) +{ + for (int i = 0; i < THERMO_CNT; ++i) + if (devs[i].status & THERMO_ACTIVE) + { + LOG_INFO("THERMO [%d] on_time[%ld],\n", i, ticks_to_ms(devs[i].on_time)); + if ((devs[i].status & THERMO_TIMER) && (devs[i].on_time - timer_clock() < 0)) + { + thermo_stop(i); + continue; + } + + thermo_do((ThermoDev)i); + } +} + +#if CONFIG_KERN + static void NORETURN thermo_poll(void) + { + for (;;) + { + poll(); + timer_delay(CONFIG_THERMO_INTERVAL_MS); + } + } +#else + /** + * Thermo soft interrupt. + */ + static void thermo_softint(void) + { + poll(); + timer_add(&thermo_timer); + } +#endif + +/** + * Starts a thermo-regulation for channel \a dev, and turn off timer + * when \a on_time was elapsed. + */ +void thermo_timer(ThermoDev dev, mtime_t on_time) +{ + ASSERT(dev < THERMO_CNT); + devs[dev].on_time = timer_clock() + ms_to_ticks(on_time); + devs[dev].status |= THERMO_TIMER; + thermo_start(dev); +} + + +/** + * Set the target temperature \a temperature for a specific \a dev thermo-device. + */ +void thermo_setTarget(ThermoDev dev, deg_t temperature) +{ + ASSERT(dev < THERMO_CNT); + devs[dev].target = temperature; + devs[dev].expire = timer_clock() + thermo_hw_timeout(dev); + + LOG_INFO("THERMO Set Target dev[%d], T[%d.%d]\n", dev, temperature / 10, temperature % 10); +} + +/** + * Starts a thermo-regulation for channel \a dev. + */ +void thermo_start(ThermoDev dev) +{ + int i; + deg_t temp; + + ASSERT(dev < THERMO_CNT); + + devs[dev].status |= THERMO_ACTIVE; + LOG_INFO("THERMO Start dev[%d], status[%04x]\n", dev, devs[dev].status); + + /* Initialize the hifi FIFO with a constant value (the current temperature) */ + temp = thermo_hw_read(dev); + for (i = 0; i < CONFIG_THERMO_HIFI_NUM_SAMPLES; ++i) + devs[dev].hifi_samples[i] = temp; + devs[dev].cur_hifi_sample = 0; + + /* Reset timeout */ + devs[dev].expire = timer_clock() + thermo_hw_timeout(dev); +} + +/** + * Stops a thermo-regulation for channel \a dev. + */ +void thermo_stop(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + + devs[dev].status &= ~THERMO_ACTIVE; + thermo_hw_off(dev); +} + + +/** + * Clear errors for channel \a dev. + */ +void thermo_clearErrors(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + devs[dev].status &= ~(THERMO_ERRMASK); +} + + +/** + * Read the temperature of the thermo-device \a dev using mobile mean. + */ +deg_t thermo_readTemperature(ThermoDev dev) +{ + int i; + long accum = 0; + + MOD_CHECK(thermo); + + for (i = 0; i < CONFIG_THERMO_HIFI_NUM_SAMPLES; i++) + accum += devs[dev].hifi_samples[i]; + + return (deg_t)(accum / CONFIG_THERMO_HIFI_NUM_SAMPLES); +} + +MOD_DEFINE(thermo) + +/** + * Init thermo-control and associated hw. + */ +void thermo_init(void) +{ + THERMO_HW_INIT; + + /* Set all status to off */ + for (int i = 0; i < THERMO_CNT; i++) + devs[i].status = THERMO_OFF; + + MOD_INIT(thermo); + + #if CONFIG_KERN + proc_new_with_name("Thermo", thermo_poll, NULL, sizeof(thermo_poll_stack), thermo_poll_stack); + #else + timer_setDelay(&thermo_timer, ms_to_ticks(CONFIG_THERMO_INTERVAL_MS)); + timer_setSoftint(&thermo_timer, (Hook)thermo_softint, 0); + timer_add(&thermo_timer); + #endif +} diff --git a/bertos/drv/thermo.h b/bertos/drv/thermo.h new file mode 100644 index 0000000..02b1ccb --- /dev/null +++ b/bertos/drv/thermo.h @@ -0,0 +1,105 @@ +/** + * \file + * + * + * \brief Thermo-control driver. + * + * This module implements multiple thermo controls, which is the logic needed to try + * keeping the temperature of a device constant. For this module, a "device" is a black box + * whose temperature can be measured, and which has a mean to make it hotter or colder. + * For instance, a device could be the combination of a NTC (analog temperature reader) and + * a Peltier connected to the same physic block. + * + * This module relies on a low-level driver to communicate with the device (implementation + * of the black box). This low-level driver also controls the units in which the temperature + * is expressed: thermo control treats it just as a number. + * + * + * \author Giovanni Bajo + * \author Francesco Sacchi + * \author Daniele Basile + * + * $WIZ$ module_name = "thermo" + * $WIZ$ module_depends = "timer", "ntc" + * $WIZ$ module_configuration = "bertos/cfg/cfg_thermo.h" + * $WIZ$ module_hw = "bertos/hw/hw_thermo.h", "bertos/hw/thermo_map.h" + */ + +#ifndef DRV_THERMO_H +#define DRV_THERMO_H + +#include "hw/thermo_map.h" + +#include +#include + +typedef uint8_t thermostatus_t; + + +/** + * Set the target temperature at which a given device should be kept. + * + * \param dev Device + * \param temperature Target temperature + */ +void thermo_setTarget(ThermoDev dev, deg_t temperature); + +/** + * Start thermo control for a certain device \a dev and stop it after + * \a on_time msec. + */ +void thermo_timer(ThermoDev dev, mtime_t on_time); + +/** Start thermo control for a certain device \a dev */ +void thermo_start(ThermoDev dev); + +/** Stop thermo control for a certain device \a dev */ +void thermo_stop(ThermoDev dev); + +/** Clear errors for channel \a dev */ +void thermo_clearErrors(ThermoDev dev); + +/** Return the status of the specific \a dev thermo-device. */ +thermostatus_t thermo_status(ThermoDev dev); + +/** + * Return the current temperature of a device currently under thermo + * control. + * + * \param dev Device + * \return Current temperature (Celsius degrees * 10) + */ +deg_t thermo_readTemperature(ThermoDev dev); + +void thermo_init(void); + + +#endif /* DRV_THERMO_H */ diff --git a/bertos/drv/timer.c b/bertos/drv/timer.c new file mode 100644 index 0000000..a411dc4 --- /dev/null +++ b/bertos/drv/timer.c @@ -0,0 +1,418 @@ +/** + * \file + * + * + * \brief Hardware independent timer driver (implementation) + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#include "timer.h" +#include "hw/hw_timer.h" + +#include "cfg/cfg_timer.h" +#include "cfg/cfg_wdt.h" +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" +#include +#include +#include + +#include +#include +#include +#include // cpu_relax() + +#include // proc_decQuantun() + +/* + * Include platform-specific binding code if we're hosted. + * Try the CPU specific one for bare-metal environments. + */ +#if OS_HOSTED + //#include OS_CSOURCE(timer) + #include +#else + #ifndef WIZ_AUTOGEN + #warning Deprecated: now you should include timer_ directly in the makefile. Remove this line and the following once done. + #include CPU_CSOURCE(timer) + #endif +#endif + +/* + * Sanity check for config parameters required by this module. + */ +#if !defined(CONFIG_KERN) || ((CONFIG_KERN != 0) && CONFIG_KERN != 1) + #error CONFIG_KERN must be set to either 0 or 1 in config.h +#endif +#if !defined(CONFIG_WATCHDOG) || ((CONFIG_WATCHDOG != 0) && CONFIG_WATCHDOG != 1) + #error CONFIG_WATCHDOG must be set to either 0 or 1 in config.h +#endif + +#if CONFIG_WATCHDOG + #include +#endif + +#if defined (CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS + #include /* sig_wait(), sig_check() */ + #include /* proc_current() */ + #include /* BV() */ +#endif + + +/** + * \def CONFIG_TIMER_STROBE + * + * This is a debug facility that can be used to + * monitor timer interrupt activity on an external pin. + * + * To use strobes, redefine the macros TIMER_STROBE_ON, + * TIMER_STROBE_OFF and TIMER_STROBE_INIT and set + * CONFIG_TIMER_STROBE to 1. + */ +#if !defined(CONFIG_TIMER_STROBE) || !CONFIG_TIMER_STROBE + #define TIMER_STROBE_ON do {/*nop*/} while(0) + #define TIMER_STROBE_OFF do {/*nop*/} while(0) + #define TIMER_STROBE_INIT do {/*nop*/} while(0) +#endif + + +/// Master system clock (1 tick accuracy) +volatile ticks_t _clock; + + +#if CONFIG_TIMER_EVENTS + +/** + * List of active asynchronous timers. + */ +REGISTER static List timers_queue; + +/** + * This function really does the job. It adds \a timer to \a queue. + * \see timer_add for details. + */ +INLINE void timer_addToList(Timer *timer, List *queue) +{ + /* Inserting timers twice causes mayhem. */ + ASSERT(timer->magic != TIMER_MAGIC_ACTIVE); + DB(timer->magic = TIMER_MAGIC_ACTIVE;) + + + /* Calculate expiration time for this timer */ + timer->tick = _clock + timer->_delay; + + /* + * Search for the first node whose expiration time is + * greater than the timer we want to add. + */ + Timer *node = (Timer *)LIST_HEAD(queue); + while (node->link.succ) + { + /* + * Stop just after the insertion point. + * (this fancy compare takes care of wrap-arounds). + */ + if (node->tick - timer->tick > 0) + break; + + /* Go to next node */ + node = (Timer *)node->link.succ; + } + + /* Enqueue timer request into the list */ + INSERT_BEFORE(&timer->link, &node->link); +} + +/** + * Add the specified timer to the software timer service queue. + * When the delay indicated by the timer expires, the timer + * device will execute the event associated with it. + * + * You should not call this function on an already running timer. + * + * \note Interrupt safe + */ +void timer_add(Timer *timer) +{ + ATOMIC(timer_addToList(timer, &timers_queue)); +} + +/** + * Remove a timer from the timers queue before it has expired. + * + * \note Attempting to remove a timer already expired cause + * undefined behaviour. + */ +Timer *timer_abort(Timer *timer) +{ + ATOMIC(REMOVE(&timer->link)); + DB(timer->magic = TIMER_MAGIC_INACTIVE;) + + return timer; +} + + +INLINE void timer_poll(List *queue) +{ + Timer *timer; + + /* + * Check the first timer request in the list and process + * it when it has expired. Repeat this check until the + * first node has not yet expired. Since the list is sorted + * by expiry time, all the following requests are guaranteed + * to expire later. + */ + while ((timer = (Timer *)LIST_HEAD(queue))->link.succ) + { + /* This request in list has not yet expired? */ + if (timer_clock() - timer->tick < 0) + break; + + /* Retreat the expired timer */ + REMOVE(&timer->link); + DB(timer->magic = TIMER_MAGIC_INACTIVE;) + + /* Execute the associated event */ + event_do(&timer->expire); + } +} + +/** + * Add \a timer to \a queue. + * \see synctimer_poll() for details. + */ +void synctimer_add(Timer *timer, List *queue) +{ + timer_addToList(timer, queue); +} + +/** + * Simple synchronous timer based scheduler polling routine. + * + * Sometimes you would like to have a proper scheduler, + * but you can't afford it due to memory constraints. + * + * This is a simple replacement: you can create events and call + * them periodically at specific time intervals. + * All you have to do is to set up normal timers, and call synctimer_add() + * instead of timer_add() to add the events to your specific queue. + * Then, in the main loop or wherever you want, you can call + * synctimer_poll() to process expired events. The associated callbacks will be + * executed. + * As this is done synchronously you don't have to worry about race conditions. + * You can kill an event by simply calling synctimer_abort(). + * + */ +void synctimer_poll(List *queue) +{ + timer_poll(queue); +} + +#endif /* CONFIG_TIMER_EVENTS */ + + +/** + * Wait for the specified amount of timer ticks. + * + * \note Sleeping while preemption is disabled fallbacks to a busy wait sleep. + */ +void timer_delayTicks(ticks_t delay) +{ + /* We shouldn't sleep with interrupts disabled */ + IRQ_ASSERT_ENABLED(); + +#if CONFIG_KERN_SIGNALS + Timer t; + DB(t.magic = TIMER_MAGIC_INACTIVE;) + if (proc_preemptAllowed()) + { + timer_setEvent(&t); + timer_setDelay(&t, delay); + timer_add(&t); + timer_waitEvent(&t); + } + else +#endif /* !CONFIG_KERN_SIGNALS */ + { + ticks_t start = timer_clock(); + + /* Busy wait */ + while (timer_clock() - start < delay) + cpu_relax(); + } +} + + +#if CONFIG_TIMER_UDELAY + +/** + * Busy wait until the specified amount of high-precision ticks have elapsed. + * + * \note This function is interrupt safe, the only + * requirement is a running hardware timer. + */ +void timer_busyWait(hptime_t delay) +{ + hptime_t now, prev = timer_hw_hpread(); + hptime_t delta; + + for (;;) + { + now = timer_hw_hpread(); + /* + * The timer counter may wrap here and "prev" can become + * greater than "now". So, be sure to always evaluate a + * coherent timer difference: + * + * 0 prev now TIMER_HW_CNT + * |_____|_______________|_____| + * ^^^^^^^^^^^^^^^ + * delta = now - prev + * + * 0 now prev TIMER_HW_CNT + * |_____|_______________|_____| + * ^^^^^ ^^^^^ + * delta = (TIMER_HW_CNT - prev) + now + * + * NOTE: TIMER_HW_CNT can be any value, not necessarily a power + * of 2. For this reason the "%" operator is not suitable for + * the generic case. + */ + delta = (now < prev) ? ((hptime_t)TIMER_HW_CNT - prev + now) : + (now - prev); + if (delta >= delay) + break; + delay -= delta; + prev = now; + } +} + +/** + * Wait for the specified amount of time (expressed in microseconds). + * + * \bug In AVR arch the maximum amount of time that can be used as + * delay could be very limited, depending on the hardware timer + * used. Check timer_avr.h, and what register is used as hptime_t. + */ +void timer_delayHp(hptime_t delay) +{ + if (UNLIKELY(delay > us_to_hptime(1000))) + { + timer_delayTicks(delay / (TIMER_HW_HPTICKS_PER_SEC / TIMER_TICKS_PER_SEC)); + delay %= (TIMER_HW_HPTICKS_PER_SEC / TIMER_TICKS_PER_SEC); + } + + timer_busyWait(delay); +} +#endif /* CONFIG_TIMER_UDELAY */ + +/** + * Timer interrupt handler. Find soft timers expired and + * trigger corresponding events. + */ +DEFINE_TIMER_ISR +{ + /* + * With the Metrowerks compiler, the only way to force the compiler generate + * an interrupt service routine is to put a pragma directive within the function + * body. + */ + #ifdef __MWERKS__ + #pragma interrupt saveall + #endif + + /* + * On systems sharing IRQ line and vector, this check is needed + * to ensure that IRQ is generated by timer source. + */ + if (!timer_hw_triggered()) + return; + + TIMER_STROBE_ON; + + /* Update the master ms counter */ + ++_clock; + + /* Update the current task's quantum (if enabled). */ + proc_decQuantum(); + + #if CONFIG_TIMER_EVENTS + timer_poll(&timers_queue); + #endif + + /* Perform hw IRQ handling */ + timer_hw_irq(); + + TIMER_STROBE_OFF; +} + +MOD_DEFINE(timer) + +/** + * Initialize timer + */ +void timer_init(void) +{ + #if CONFIG_KERN_IRQ + MOD_CHECK(irq); + #endif + + #if CONFIG_TIMER_EVENTS + LIST_INIT(&timers_queue); + #endif + + TIMER_STROBE_INIT; + + _clock = 0; + + timer_hw_init(); + + MOD_INIT(timer); +} + + +#if (ARCH & ARCH_EMUL) +/** + * Stop timer (only used by emulator) + */ +void timer_cleanup(void) +{ + MOD_CLEANUP(timer); + + timer_hw_cleanup(); + + // Hmmm... apparently, the demo app does not cleanup properly + //ASSERT(LIST_EMPTY(&timers_queue)); +} +#endif /* ARCH_EMUL */ diff --git a/bertos/drv/timer.h b/bertos/drv/timer.h new file mode 100644 index 0000000..b006c5f --- /dev/null +++ b/bertos/drv/timer.h @@ -0,0 +1,342 @@ +/** + * \file + * + * + * \defgroup drv_timers Timer module + * \ingroup core + * \{ + * + * \brief Hardware independent timer driver. + * + * All timer related functions are implemented in this module. You have several options to use timers: + * \li simple delay: just use timer_delay() if you want to wait for a few milliseconds; + * \li delay with callback: create a timer structure and use timer_setDelay() and timer_setSoftint() to set the callback; + * \li delay with signal: same as above but use timer_setSignal() to set specify which signal to send. + * \li simple synchronous timer based scheduler: use synctimer_add() to schedule an event in a user provided queue. + * + * Whenever a timer expires you need to explicitly arm it again with timer_add(). If you want to abort a timer, use timer_abort(). + * You can use conversion macros when using msecs to specify the delay. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_timer.h" + * $WIZ$ module_depends = "event", "sysirq" + * $WIZ$ module_supports = "not atmega103 and not atmega8" + */ + +#ifndef DRV_TIMER_H +#define DRV_TIMER_H + +#include +#include + +#include +#include + + +/* + * Include platform-specific binding header if we're hosted. + * Try the CPU specific one for bare-metal environments. + */ +#if OS_HOSTED + //#include OS_HEADER(timer) + #include +#else + #include CPU_HEADER(timer) +#endif + +STATIC_ASSERT(sizeof(hptime_t) == SIZEOF_HPTIME_T); + +#include "cfg/cfg_timer.h" +#include +#include + +#include + +/* + * Sanity check for config parameters required by this module. + */ +#if !defined(CONFIG_TIMER_EVENTS) || ((CONFIG_TIMER_EVENTS != 0) && CONFIG_TIMER_EVENTS != 1) + #error CONFIG_TIMER_EVENTS must be set to either 0 or 1 in cfg_timer.h +#endif +#if !defined(CONFIG_TIMER_UDELAY) || ((CONFIG_TIMER_UDELAY != 0) && CONFIG_TIMER_EVENTS != 1) + #error CONFIG_TIMER_UDELAY must be set to either 0 or 1 in cfg_timer.h +#endif +#if defined(CONFIG_TIMER_DISABLE_UDELAY) + #error Obosolete config option CONFIG_TIMER_DISABLE_UDELAY. Use CONFIG_TIMER_UDELAY +#endif +#if defined(CONFIG_TIMER_DISABLE_EVENTS) + #error Obosolete config option CONFIG_TIMER_DISABLE_EVENTS. Use CONFIG_TIMER_EVENTS +#endif + +extern volatile ticks_t _clock; + +#define TIMER_AFTER(x, y) ((long)(y) - (long)(x) < 0) +#define TIMER_BEFORE(x, y) TIMER_AFTER(y, x) + +/** + * \brief Return the system tick counter (expressed in ticks) + * + * The result is guaranteed to increment monotonically, + * but client code must be tolerant with respect to overflows. + * + * The following code is safe: + * + * \code + * drop_teabag(); + * ticks_t tea_start_time = timer_clock(); + * + * for (;;) + * { + * if (timer_clock() - tea_start_time > TEAPOT_DELAY) + * { + * printf("Your tea, Sir.\n"); + * break; + * } + * patience(); + * } + * \endcode + * + * \note This function must disable interrupts on 8/16bit CPUs because the + * clock variable is larger than the processor word size and can't + * be copied atomically. + * \sa timer_delay() + */ +INLINE ticks_t timer_clock(void) +{ + ticks_t result; + + ATOMIC(result = _clock); + + return result; +} + +/** + * Faster version of timer_clock(), to be called only when the timer + * interrupt is disabled (DISABLE_INTS) or overridden by a + * higher-priority or non-nesting interrupt. + * + * \sa timer_clock + */ +INLINE ticks_t timer_clock_unlocked(void) +{ + return _clock; +} + + +/** Convert \a ms [ms] to ticks. */ +INLINE ticks_t ms_to_ticks(mtime_t ms) +{ +#if TIMER_TICKS_PER_SEC < 1000 + /* Slow timer: avoid rounding down too much. */ + return (ms * TIMER_TICKS_PER_SEC) / 1000; +#else + /* Fast timer: don't overflow ticks_t. */ + return ms * DIV_ROUND(TIMER_TICKS_PER_SEC, 1000); +#endif +} + +/** Convert \a us [us] to ticks. */ +INLINE ticks_t us_to_ticks(utime_t us) +{ +#if TIMER_TICKS_PER_SEC < 1000 + /* Slow timer: avoid rounding down too much. */ + return ((us / 1000) * TIMER_TICKS_PER_SEC) / 1000; +#else + /* Fast timer: don't overflow ticks_t. */ + return (us * DIV_ROUND(TIMER_TICKS_PER_SEC, 1000)) / 1000; +#endif +} + +/** Convert \a ticks [ticks] to ms. */ +INLINE mtime_t ticks_to_ms(ticks_t ticks) +{ +#if TIMER_TICKS_PER_SEC < 1000 + /* Slow timer: avoid rounding down too much. */ + return (ticks * 1000) / TIMER_TICKS_PER_SEC; +#else + /* Fast timer: avoid overflowing ticks_t. */ + return ticks / (TIMER_TICKS_PER_SEC / 1000); +#endif +} + +/** Convert \a ticks [ticks] to us. */ +INLINE utime_t ticks_to_us(ticks_t ticks) +{ +#if TIMER_TICKS_PER_SEC < 1000 + /* Slow timer: avoid rounding down too much. */ + return ((ticks * 1000) / TIMER_TICKS_PER_SEC) * 1000; +#else + /* Fast timer: avoid overflowing ticks_t. */ + return (ticks / (TIMER_TICKS_PER_SEC / 1000)) * 1000; +#endif +} + +/** Convert \a us [us] to hpticks */ +INLINE hptime_t us_to_hptime(utime_t us) +{ +#if TIMER_HW_HPTICKS_PER_SEC > 10000000UL + return us * DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, 1000000UL); +#else + return (us * ((TIMER_HW_HPTICKS_PER_SEC + 500) / 1000UL) + 500) / 1000UL; +#endif +} + +/** Convert \a hpticks [hptime] to usec */ +INLINE utime_t hptime_to_us(hptime_t hpticks) +{ +#if TIMER_HW_HPTICKS_PER_SEC < 100000UL + return hpticks * DIV_ROUND(1000000UL, TIMER_HW_HPTICKS_PER_SEC); +#else + return (hpticks * 1000UL) / DIV_ROUND(TIMER_HW_HPTICKS_PER_SEC, 1000UL); +#endif /* TIMER_HW_HPTICKS_PER_SEC < 100000UL */ +} + +void timer_delayTicks(ticks_t delay); +/** + * Wait some time [ms]. + * + * \note CPU is released while waiting so you don't have to call cpu_relax() explicitly. + * \param delay Time to wait [ms]. + */ +INLINE void timer_delay(mtime_t delay) +{ + timer_delayTicks(ms_to_ticks(delay)); +} + +void timer_init(void); +void timer_cleanup(void); + +int timer_testSetup(void); +int timer_testRun(void); +int timer_testTearDown(void); + +#if CONFIG_TIMER_UDELAY +void timer_busyWait(hptime_t delay); +void timer_delayHp(hptime_t delay); +INLINE void timer_udelay(utime_t delay) +{ + timer_delayHp(us_to_hptime(delay)); +} +#endif + +#if CONFIG_TIMER_EVENTS + +#include + +/** + * The timer driver supports multiple synchronous timers + * that can trigger an event when they expire. + * + * \sa timer_add() + * \sa timer_abort() + */ +typedef struct Timer +{ + Node link; /**< Link into timers queue */ + ticks_t _delay; /**< [ticks] Timer delay */ + ticks_t tick; /**< [ticks] When this timer will expire */ + Event expire; /**< Event to execute when the timer expires */ + DB(uint16_t magic;) +} Timer; + +/* Timer is active when Timer.magic contains this value (for debugging purposes). */ +#define TIMER_MAGIC_ACTIVE 0xABBA +#define TIMER_MAGIC_INACTIVE 0xBAAB + +void timer_add(Timer *timer); +Timer *timer_abort(Timer *timer); + +/** + * Set the timer so that it calls an user hook when it expires + * + * Sometimes you may want to use the same callback for different events, so you must have + * different data to operate on. The user_data parameter is such data. + * + * \param timer Timer struct to set the callback to + * \param func Function that will be called when the timer expires + * \param user_data Additional data you may want to pass to the callback + */ +INLINE void timer_setSoftint(Timer *timer, Hook func, iptr_t user_data) +{ + event_initSoftint(&timer->expire, func, user_data); +} + +/** + * Set the timer delay (the time before the event will be triggered) + * + * \note It's illegal to change the delay of the timer when it's + * still running. + */ +INLINE void timer_setDelay(Timer *timer, ticks_t delay) +{ + timer->_delay = delay; +} + + +void synctimer_add(Timer *timer, List* q); + +/** \sa timer_abort */ +#define synctimer_abort(t) timer_abort(t) + +void synctimer_poll(List* q); + + +#endif /* CONFIG_TIMER_EVENTS */ + +#if defined(CONFIG_KERN_SIGNALS) && CONFIG_KERN_SIGNALS + +/** Set the timer so that it sends a event notification when it expires */ +INLINE void timer_setEvent(Timer *timer) +{ + event_initGeneric(&timer->expire); +} + +/** Wait until the timer expires */ +INLINE void timer_waitEvent(Timer *timer) +{ + event_wait(&timer->expire); +} + +/** Set the timer so that it sends a signal when it expires */ +INLINE void timer_setSignal(Timer *timer, struct Process *proc, sigmask_t sigs) +{ + event_initSignal(&timer->expire, proc, sigs); +} + +#define timer_set_event_signal timer_setSignal + +#endif /* CONFIG_KERN_SIGNALS */ + +/** \} */ //defgroup drv_timers + +#endif /* DRV_TIMER_H */ diff --git a/bertos/drv/timer_test.c b/bertos/drv/timer_test.c new file mode 100644 index 0000000..421f746 --- /dev/null +++ b/bertos/drv/timer_test.c @@ -0,0 +1,209 @@ +/** + * \file + * + * + * \brief Hardware independent timer driver (implementation) + * + * \author Bernie Innocenti + * + */ + +#include + +#include +#include + +#include + +#include + +static void timer_test_constants(void) +{ + kprintf("TIMER_HW_HPTICKS_PER_SEC=%lu\n", (unsigned long)TIMER_HW_HPTICKS_PER_SEC); + #ifdef TIMER_PRESCALER + kprintf("TIMER_PRESCALER = %lu\n", (unsigned long)TIMER_PRESCALER); + #endif + #ifdef TIMER1_OVF_COUNT + kprintf("TIMER1_OVF_COUNT = %lu\n", (unsigned long)TIMER1_OVF_COUNT); + #endif + kprintf("TIMER_TICKS_PER_SEC= %lu\n", (unsigned long)TIMER_TICKS_PER_SEC); + kprintf("\n"); + kprintf("ms_to_ticks(100) = %lu\n", (unsigned long)ms_to_ticks(100)); + kprintf("ms_to_ticks(10000) = %lu\n", (unsigned long)ms_to_ticks(10000)); + kprintf("us_to_ticks(100) = %lu\n", (unsigned long)us_to_ticks(100)); + kprintf("us_to_ticks(10000) = %lu\n", (unsigned long)us_to_ticks(10000)); + kprintf("\n"); + kprintf("ticks_to_ms(100) = %lu\n", (unsigned long)ticks_to_ms(100)); + kprintf("ticks_to_ms(10000) = %lu\n", (unsigned long)ticks_to_ms(10000)); + kprintf("ticks_to_us(100) = %lu\n", (unsigned long)ticks_to_us(100)); + kprintf("ticks_to_us(10000) = %lu\n", (unsigned long)ticks_to_us(10000)); + kprintf("\n"); + kprintf("hptime_to_us(100) = %lu\n", (unsigned long)hptime_to_us(100)); + #if (SIZEOF_HPTIME_T > 1) + kprintf("hptime_to_us(10000)= %lu\n", (unsigned long)hptime_to_us(10000)); + #endif + kprintf("us_to_hptime(100) = %lu\n", (unsigned long)us_to_hptime(100)); + kprintf("us_to_hptime(10000)= %lu\n", (unsigned long)us_to_hptime(10000)); +} + +static void timer_test_delay(void) +{ + int i; + + kputs("Delay test\n"); + for (i = 0; i < 1000; i += 100) + { + kprintf("delay %d...", i); + timer_delay(i); + kputs("done\n"); + } +} + +static void timer_test_hook(iptr_t _timer) +{ + Timer *timer = (Timer *)(void *)_timer; + + kprintf("Timer %lu expired\n", (unsigned long)ticks_to_ms(timer->_delay)); + timer_add(timer); +} + +static Timer test_timers[5]; + +List synctimer_list; +static Timer synctimer_timers[5]; + +static void synctimer_test_hook(iptr_t _timer) +{ + Timer *timer = (Timer *)(void *)_timer; + kprintf("Sync timer process %lu expired\n", (unsigned long)ticks_to_ms(timer->_delay)); + synctimer_add(timer, &synctimer_list); +} + + +static const mtime_t test_delays[5] = { 170, 50, 310, 1500, 310 }; + +static void timer_test_async(void) +{ + size_t i; + + for (i = 0; i < countof(test_timers); ++i) + { + Timer *timer = &test_timers[i]; + timer_setDelay(timer, ms_to_ticks(test_delays[i])); + timer_setSoftint(timer, timer_test_hook, (iptr_t)timer); + timer_add(timer); + } +} + +static void timer_test_poll(void) +{ + int secs = 0; + mtime_t start_time = ticks_to_ms(timer_clock()); + mtime_t now; + + while (secs <= 10) + { + now = ticks_to_ms(timer_clock()); + if (now - start_time >= 1000) + { + ++secs; + start_time += 1000; + kprintf("seconds = %d, ticks=%lu\n", secs, (unsigned long)now); + } + wdt_reset(); + } +} + +static void synctimer_test(void) +{ + size_t i; + + LIST_INIT(&synctimer_list); + for (i = 0; i < countof(synctimer_timers); ++i) + { + Timer *timer = &synctimer_timers[i]; + timer_setDelay(timer, ms_to_ticks(test_delays[i])); + timer_setSoftint(timer, synctimer_test_hook, (iptr_t)timer); + synctimer_add(timer, &synctimer_list); + } + + int secs = 0; + mtime_t start_time = ticks_to_ms(timer_clock()); + mtime_t now; + + while (secs <= 10) + { + now = ticks_to_ms(timer_clock()); + synctimer_poll(&synctimer_list); + if (now - start_time >= 1000) + { + ++secs; + start_time += 1000; + kprintf("seconds = %d, ticks=%lu\n", secs, (unsigned long)now); + } + wdt_reset(); + } + + for (i = 0; i < countof(synctimer_timers); ++i) + { + synctimer_abort(&synctimer_timers[i]); + } +} + +int timer_testSetup(void) +{ + IRQ_ENABLE; + wdt_start(7); + timer_init(); + kdbg_init(); + return 0; +} + +int timer_testRun(void) +{ + timer_test_constants(); + timer_test_delay(); + timer_test_async(); + timer_test_poll(); + synctimer_test(); + return 0; +} + +int timer_testTearDown(void) +{ + unsigned i; + for (i = 0; i < countof(test_timers); ++i) + timer_abort(&test_timers[i]); + return 0; +} + +TEST_MAIN(timer); + diff --git a/bertos/drv/tlv5618.c b/bertos/drv/tlv5618.c new file mode 100644 index 0000000..048e36b --- /dev/null +++ b/bertos/drv/tlv5618.c @@ -0,0 +1,104 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * Texas instrument TLV5618 DAC driver. + */ + +#include "tlv5618.h" +#include "hw/hw_tlv5618.h" + +#include + +#include //memset + + +static void tlv5618_write(Tlv5618 *ctx, uint16_t val) +{ + TLV5618_CSLOW(ctx->cs_pin); + kfile_putc(val >> 8, ctx->ch); + kfile_putc(val & 0xFF, ctx->ch); + kfile_flush(ctx->ch); + TLV5618_CSHIGH(ctx->cs_pin); +} + +#define POWERDOWN 0x2000 +#define OUTA 0xC000 +#define OUTB 0x4000 + +/** + * Set DAC output A to \a val. + * \a val ranges from 0 to 4095 (12 bit). + * \note : if in power down, the device will be awaken. + */ +void tlv5618_setOutA(Tlv5618 *ctx, uint16_t val) +{ + val &= 0x0FFF; + tlv5618_write(ctx, val | OUTA); +} + +/** + * Set DAC output B to \a val. + * \a val ranges from 0 to 4095 (12 bit). + * \note : if in power down, the device will be awaken. + */ +void tlv5618_setOutB(Tlv5618 *ctx, uint16_t val) +{ + val &= 0x0FFF; + tlv5618_write(ctx, val | OUTB); +} + +/** + * Set the TLV5618 in the power down state. + */ +void tlv5618_setPowerDown(Tlv5618 *ctx) +{ + tlv5618_write(ctx, POWERDOWN); +} + + +/** + * Init the TLV5618 with CS connected to \a cs_pin. + * \a ch should be the SPI channel needed to communicate with the DAC. + * This SPI should also be correctly configured (the MOSI should + * change on the rising edge of the SCK clock). + * \note the device is set in power down mode. + */ +void tlv5618_init(Tlv5618 *ctx, KFile *ch, int cs_pin) +{ + memset(ctx, 0, sizeof(*ctx)); + ctx->cs_pin = cs_pin; + ctx->ch = ch; + TLV5618_CSINIT(cs_pin); + tlv5618_setPowerDown(ctx); +} diff --git a/bertos/drv/tlv5618.h b/bertos/drv/tlv5618.h new file mode 100644 index 0000000..197229e --- /dev/null +++ b/bertos/drv/tlv5618.h @@ -0,0 +1,59 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief Texas instrument TLV5618 DAC driver. + * + * $WIZ$ module_name = "tlv5618" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_hw = "bertos/hw/hw_tlv5618.h" + */ + +#ifndef DRV_TLV5618_H +#define DRV_TLV5618_H + +#include +#include + +typedef struct Tlv5618 +{ + KFile *ch; + int cs_pin; +} Tlv5618; + +void tlv5618_setOutA(Tlv5618 *ctx, uint16_t val); +void tlv5618_setOutB(Tlv5618 *ctx, uint16_t val); +void tlv5618_setPowerDown(Tlv5618 *ctx); +void tlv5618_init(Tlv5618 *ctx, KFile *ch, int pin); + +#endif /* DRV_TLV5618_H */ diff --git a/bertos/drv/tmp123.c b/bertos/drv/tmp123.c new file mode 100644 index 0000000..7f8b4f0 --- /dev/null +++ b/bertos/drv/tmp123.c @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief TMP123 Texas Intrument sensor temperature. + * + * \author Daniele Basile + * + */ + +#include "tmp123.h" + +#include "hw/hw_tmp123.h" + +#include + +#include + +#include + +#include // Macro and data type to manage celsius degree + +/** + * Read temperature from TMP123 chip. + */ +deg_t tmp123_read(KFile *fd) +{ + int16_t tmp; + + TMP123_HW_CS_EN(); + kfile_read(fd, &tmp, sizeof(tmp)); + tmp = be16_to_cpu(tmp); + TMP123_HW_CS_DIS(); + + tmp >>= 3; + return DIV_ROUND((tmp * 10), 16); +} +/** + * Init module + */ +void tmp123_init(void) +{ + TMP123_HW_INIT(); +} + + diff --git a/bertos/drv/tmp123.h b/bertos/drv/tmp123.h new file mode 100644 index 0000000..015076b --- /dev/null +++ b/bertos/drv/tmp123.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief TMP123 Texas Intrument sensor temperature. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "tmp123" + * $WIZ$ module_depends = "timer", "kfile" + * $WIZ$ module_configuration = "" + * $WIZ$ module_hw = "bertos/hw/hw_tmp123.h" + */ + +#ifndef DRV_TMP123_H +#define DRV_TMP123_H + +#include + +#include + +#include // Macro and data type to manage celsius degree + +deg_t tmp123_read(KFile *fd); + +void tmp123_init(void); + +#endif /* DRV_TMP123_H */ diff --git a/bertos/drv/usb.h b/bertos/drv/usb.h new file mode 100644 index 0000000..eee7828 --- /dev/null +++ b/bertos/drv/usb.h @@ -0,0 +1,531 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief USB 2.0 standard descriptors + * + * This file holds USB constants and structures that are needed for USB device + * APIs, as defined in the USB 2.0 specification. + * + * \attention The API is work in progress and may change in future versions. + * + * $WIZ$ module_name = "usb" + * $WIZ$ module_configuration = "bertos/cfg/cfg_usb.h" + * $WIZ$ module_supports = "stm32" + */ + +#ifndef USB_H +#define USB_H + +#include + +#define usb_cpu_to_le16(x) cpu_to_le16(x) +#define usb_le16_to_cpu(x) le16_to_cpu(x) +#define usb_cpu_to_le32(x) cpu_to_le32(x) +#define usb_le32_to_cpu(x) le32_to_cpu(x) + +/* State of a USB device */ +enum usb_device_state { + USB_STATE_NOTATTACHED = 0, + + /* chapter 9 device states */ + USB_STATE_ATTACHED, + USB_STATE_POWERED, /* wired */ + USB_STATE_DEFAULT, /* limited function */ + USB_STATE_ADDRESS, + USB_STATE_CONFIGURED, /* most functions */ +}; + +/* + * USB directions + * + * This bit flag is used in endpoint descriptors' bEndpointAddress field. + * It's also one of three fields in control requests bRequestType. + */ +#define USB_DIR_OUT 0 /* to device */ +#define USB_DIR_IN 0x80 /* to host */ +#define USB_DIR_MASK 0x80 + +/* + * USB types, the second of three bRequestType fields + */ +#define USB_TYPE_MASK (0x03 << 5) +#define USB_TYPE_STANDARD (0x00 << 5) +#define USB_TYPE_CLASS (0x01 << 5) +#define USB_TYPE_VENDOR (0x02 << 5) +#define USB_TYPE_RESERVED (0x03 << 5) + +/* + * USB recipients, the third of three bRequestType fields + */ +#define USB_RECIP_MASK 0x1f +#define USB_RECIP_DEVICE 0x00 +#define USB_RECIP_INTERFACE 0x01 +#define USB_RECIP_ENDPOINT 0x02 +#define USB_RECIP_OTHER 0x03 + +/* + * USB standard requests, for the bRequest field of a SETUP packet. + */ +#define USB_REQ_GET_STATUS 0x00 +#define USB_REQ_CLEAR_FEATURE 0x01 +#define USB_REQ_SET_FEATURE 0x03 +#define USB_REQ_SET_ADDRESS 0x05 +#define USB_REQ_GET_DESCRIPTOR 0x06 +#define USB_REQ_SET_DESCRIPTOR 0x07 +#define USB_REQ_GET_CONFIGURATION 0x08 +#define USB_REQ_SET_CONFIGURATION 0x09 +#define USB_REQ_GET_INTERFACE 0x0A +#define USB_REQ_SET_INTERFACE 0x0B +#define USB_REQ_SYNCH_FRAME 0x0C + +/* + * Descriptor types ... USB 2.0 spec table 9.5 + */ +#define USB_DT_DEVICE 0x01 +#define USB_DT_CONFIG 0x02 +#define USB_DT_STRING 0x03 +#define USB_DT_INTERFACE 0x04 +#define USB_DT_ENDPOINT 0x05 +#define USB_DT_DEVICE_QUALIFIER 0x06 +#define USB_DT_OTHER_SPEED_CONFIG 0x07 +#define USB_DT_INTERFACE_POWER 0x08 + +/* + * Conventional codes for class-specific descriptors. The convention is + * defined in the USB "Common Class" Spec (3.11). Individual class specs + * are authoritative for their usage, not the "common class" writeup. + */ +#define USB_DT_CS_DEVICE (USB_TYPE_CLASS | USB_DT_DEVICE) +#define USB_DT_CS_CONFIG (USB_TYPE_CLASS | USB_DT_CONFIG) +#define USB_DT_CS_STRING (USB_TYPE_CLASS | USB_DT_STRING) +#define USB_DT_CS_INTERFACE (USB_TYPE_CLASS | USB_DT_INTERFACE) +#define USB_DT_CS_ENDPOINT (USB_TYPE_CLASS | USB_DT_ENDPOINT) + +/** + * + * USB Control Request descriptor + * + * This structure is used to send control requests to a USB device. + * + * It matches the different fields of the USB 2.0 specification (section 9.3, + * table 9-2). + */ +typedef struct UsbCtrlRequest +{ + uint8_t mRequestType; + uint8_t bRequest; + uint16_t wValue; + uint16_t wIndex; + uint16_t wLength; +} PACKED UsbCtrlRequest; + +/** + * USB common descriptor header. + * + * \note All the USB standard descriptors have these 2 fields at the beginning. + */ +typedef struct UsbDescHeader +{ + uint8_t bLength; + uint8_t bDescriptorType; +} PACKED UsbDescHeader; + +/** + * USB Device descriptor + * + * \note See USB 2.0 specification. + */ +typedef struct UsbDeviceDesc +{ + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t bcdUSB; + uint8_t bDeviceClass; + uint8_t bDeviceSubClass; + uint8_t bDeviceProtocol; + uint8_t bMaxPacketSize0; + uint16_t idVendor; + uint16_t idProduct; + uint16_t bcdDevice; + uint8_t iManufacturer; + uint8_t iProduct; + uint8_t iSerialNumber; + uint8_t bNumConfigurations; +} PACKED UsbDeviceDesc; + +/** + * USB string descriptor. + * + * \note See USB 2.0 specification. + */ +typedef struct UsbStringDesc +{ + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t data[0]; +} PACKED UsbStringDesc; + +#define USB_STRING_1(__a, ...) __a "\x00" +#define USB_STRING_2(__a, ...) __a "\x00" USB_STRING_1(__VA_ARGS__) +#define USB_STRING_3(__a, ...) __a "\x00" USB_STRING_2(__VA_ARGS__) +#define USB_STRING_4(__a, ...) __a "\x00" USB_STRING_3(__VA_ARGS__) +#define USB_STRING_5(__a, ...) __a "\x00" USB_STRING_4(__VA_ARGS__) +#define USB_STRING_6(__a, ...) __a "\x00" USB_STRING_5(__VA_ARGS__) +#define USB_STRING_7(__a, ...) __a "\x00" USB_STRING_6(__VA_ARGS__) +#define USB_STRING_8(__a, ...) __a "\x00" USB_STRING_7(__VA_ARGS__) +#define USB_STRING_9(__a, ...) __a "\x00" USB_STRING_8(__VA_ARGS__) +#define USB_STRING_10(__a, ...) __a "\x00" USB_STRING_9(__VA_ARGS__) +#define USB_STRING_11(__a, ...) __a "\x00" USB_STRING_10(__VA_ARGS__) +#define USB_STRING_12(__a, ...) __a "\x00" USB_STRING_11(__VA_ARGS__) +#define USB_STRING_13(__a, ...) __a "\x00" USB_STRING_12(__VA_ARGS__) +#define USB_STRING_14(__a, ...) __a "\x00" USB_STRING_13(__VA_ARGS__) +#define USB_STRING_15(__a, ...) __a "\x00" USB_STRING_14(__VA_ARGS__) +#define USB_STRING_16(__a, ...) __a "\x00" USB_STRING_15(__VA_ARGS__) + +/** + * Pack a list with a variable number of elements into a UTF-16LE USB string. + * + * \note The macro is recursively defined according the number of elements + * passed as argument. At the moment we support strings with up to 16 + * characters. + */ +#define USB_STRING(...) PP_CAT(USB_STRING_, PP_COUNT(__VA_ARGS__))(__VA_ARGS__) + +/** + * Define and initialize an USB string descriptor. + * + * This macro is reuquired to properly declare and initialize a constant USB + * string in UTF-16LE format. + * + * The structure must contain the standard common USB header (UsbDescHeader) + * and the UTF-16LE string all packed in a contiguous memory region. + */ +#define DEFINE_USB_STRING(__name, __text) \ + struct { \ + UsbDescHeader __header; \ + uint8_t __body[sizeof(__text)]; \ + } PACKED __name = { \ + .__header = { \ + .bLength = \ + cpu_to_le16((uint16_t)sizeof(__name)), \ + .bDescriptorType = USB_DT_STRING, \ + }, \ + .__body = {__text}, \ + } + +/* + * Device and/or Interface Class codes as found in bDeviceClass or + * bInterfaceClass and defined by www.usb.org documents. + */ +#define USB_CLASS_PER_INTERFACE 0 /* for DeviceClass */ +#define USB_CLASS_AUDIO 1 +#define USB_CLASS_COMM 2 +#define USB_CLASS_HID 3 +#define USB_CLASS_PHYSICAL 5 +#define USB_CLASS_STILL_IMAGE 6 +#define USB_CLASS_PRINTER 7 +#define USB_CLASS_MASS_STORAGE 8 +#define USB_CLASS_HUB 9 +#define USB_CLASS_CDC_DATA 0x0a +#define USB_CLASS_CSCID 0x0b /* chip+ smart card */ +#define USB_CLASS_CONTENT_SEC 0x0d /* content security */ +#define USB_CLASS_VIDEO 0x0e +#define USB_CLASS_WIRELESS_CONTROLLER 0xe0 +#define USB_CLASS_MISC 0xef +#define USB_CLASS_APP_SPEC 0xfe +#define USB_CLASS_VENDOR_SPEC 0xff + +/* USB Device subclasses */ +#define USB_CDC_SUBCLASS_ACM 0x02 +#define USB_CDC_SUBCLASS_ETHERNET 0x06 +#define USB_CDC_SUBCLASS_WHCM 0x08 +#define USB_CDC_SUBCLASS_DMM 0x09 +#define USB_CDC_SUBCLASS_MDLM 0x0a +#define USB_CDC_SUBCLASS_OBEX 0x0b +#define USB_CDC_SUBCLASS_EEM 0x0c +#define USB_CDC_SUBCLASS_NCM 0x0d + +/** + * Device configuration descriptor + * + * \note See USB 2.0 specification. + */ +typedef struct UsbConfigDesc +{ + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t wTotalLength; + uint8_t bNumInterfaces; + uint8_t bConfigurationValue; + uint8_t iConfiguration; + uint8_t bmAttributes; + uint8_t bMaxPower; +} PACKED UsbConfigDesc; + +/* from config descriptor bmAttributes */ +#define USB_CONFIG_ATT_ONE (1 << 7) /* must be set */ +#define USB_CONFIG_ATT_SELFPOWER (1 << 6) /* self powered */ +#define USB_CONFIG_ATT_WAKEUP (1 << 5) /* can wakeup */ +#define USB_CONFIG_ATT_BATTERY (1 << 4) /* battery powered */ + +/** + * Device interface descriptor + * + * \note See USB 2.0 specification. + */ +typedef struct UsbInterfaceDesc +{ + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bInterfaceNumber; + uint8_t bAlternateSetting; + uint8_t bNumEndpoints; + uint8_t bInterfaceClass; + uint8_t bInterfaceSubClass; + uint8_t bInterfaceProtocol; + uint8_t iInterface; +} PACKED UsbInterfaceDesc; + +/** + * Endpoint descriptor + * + * \note See USB 2.0 specification. + */ +typedef struct UsbEndpointDesc +{ + uint8_t bLength; + uint8_t bDescriptorType; + uint8_t bEndpointAddress; + uint8_t bmAttributes; + uint16_t wMaxPacketSize; + uint8_t bInterval; +} PACKED UsbEndpointDesc; + +/* + * Endpoints + */ +#define USB_ENDPOINT_NUMBER_MASK 0x0f /* in bEndpointAddress */ +#define USB_ENDPOINT_DIR_MASK USB_DIR_MASK + +#define USB_ENDPOINT_SYNCTYPE 0x0c +#define USB_ENDPOINT_SYNC_NONE (0 << 2) +#define USB_ENDPOINT_SYNC_ASYNC (1 << 2) +#define USB_ENDPOINT_SYNC_ADAPTIVE (2 << 2) +#define USB_ENDPOINT_SYNC_SYNC (3 << 2) + +#define USB_ENDPOINT_XFERTYPE_MASK 0x03 /* in bmAttributes */ +#define USB_ENDPOINT_XFER_CONTROL 0 +#define USB_ENDPOINT_XFER_ISOC 1 +#define USB_ENDPOINT_XFER_BULK 2 +#define USB_ENDPOINT_XFER_INT 3 +#define USB_ENDPOINT_MAX_ADJUSTABLE 0x80 + +/** + * USB: generic device descriptor + */ +typedef struct UsbDevice +{ + UsbDeviceDesc *device; ///< USB 2.0 device descriptor + const UsbDescHeader **config; ///< USB 2.0 configuration descriptors + const UsbStringDesc **strings; ///< USB strings + + /* Callbacks */ + void (*event_cb)(UsbCtrlRequest *); ///< Called to handle control requests. + + /* Private data */ + bool configured; ///< True when the device has been correctly initialized. +} UsbDevice; + +/** + * Get the endpoint's address number of \a epd. + */ +INLINE int usb_endpointNum(const UsbEndpointDesc *epd) +{ + return epd->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK; +} + +/** + * Get the transfer type of the endpoint \a epd. + */ +INLINE int usb_endpointType(const struct UsbEndpointDesc *epd) +{ + return epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK; +} + +/** + * Check if the endpoint \a epd has IN direction. + */ +INLINE int usb_endpointDirIn(const struct UsbEndpointDesc *epd) +{ + return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN); +} + +/** + * Check if the endpoint \a epd has OUT direction. + */ +INLINE int usb_endpointDirOut(const struct UsbEndpointDesc *epd) +{ + return ((epd->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_OUT); +} + +/** + * Check if the endpoint \a epd has bulk transfer type. + */ +INLINE int usb_endpointXferBulk(const struct UsbEndpointDesc *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_BULK); +} + +/** + * Check if the endpoint \a epd has control transfer type. + */ +INLINE int usb_endpointXferControl(const struct UsbEndpointDesc *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_CONTROL); +} + +/** + * Check if the endpoint \a epd has interrupt transfer type. + */ +INLINE int usb_endpointXferInt(const struct UsbEndpointDesc *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_INT); +} + +/** + * Check if the endpoint \a epd has isochronous transfer type. + */ +INLINE int usb_endpointXferIsoc(const struct UsbEndpointDesc *epd) +{ + return ((epd->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) == + USB_ENDPOINT_XFER_ISOC); +} + +/** + * Check if the endpoint \a epd is bulk IN. + */ +INLINE int usb_endpointIsBulkIn(const struct UsbEndpointDesc *epd) +{ + return usb_endpointXferBulk(epd) && usb_endpointDirIn(epd); +} + +/** + * Check if the endpoint \a epd is bulk OUT. + */ +INLINE int usb_endpointIsBulkOut(const struct UsbEndpointDesc *epd) +{ + return usb_endpointXferBulk(epd) && usb_endpointDirOut(epd); +} + +/** + * Check if the endpoint \a epd is interrupt IN. + */ +INLINE int usb_endpointIsIntIn(const struct UsbEndpointDesc *epd) +{ + return usb_endpointXferInt(epd) && usb_endpointDirIn(epd); +} + +/** + * Check if the endpoint \a epd is interrupt OUT. + */ +INLINE int usb_endpointIsIntOut(const struct UsbEndpointDesc *epd) +{ + return usb_endpointXferInt(epd) && usb_endpointDirOut(epd); +} + +/** + * Check if the endpoint \a epd is isochronous IN. + */ +INLINE int usb_endpointIsIsocIn(const struct UsbEndpointDesc *epd) +{ + return usb_endpointXferIsoc(epd) && usb_endpointDirIn(epd); +} + +/** + * Check if the endpoint \a epd is isochronous OUT. + */ +INLINE int usb_endpointIsIsocOut(const struct UsbEndpointDesc *epd) +{ + return usb_endpointXferIsoc(epd) && usb_endpointDirOut(epd); +} + +/** + * Read up to \a size bytes from the USB endpoint identified by the address + * \a ep and store them in \a buffer. + * + * The \a timeout is an upper bound on the amount of time (in ticks) elapsed + * before returns. If \a timeout is zero, the the function returns immediatly + * and it basically works in non-blocking fashion. A negative value for \a + * timeout means that the function can block indefinitely. + * + * \return number of bytes actually read, or a negative value in case of + * errors. + */ +ssize_t usb_endpointReadTimeout(int ep, void *buffer, ssize_t size, + ticks_t timeout); + +INLINE ssize_t usb_endpointRead(int ep, void *buffer, ssize_t size) +{ + return usb_endpointReadTimeout(ep, buffer, size, -1); +} + +/** + * Write up to \a size bytes from the buffer pointed \a buffer to the USB + * endpoint identified by the address \a ep. + * + * The \a timeout is an upper bound on the amount of time (in ticks) elapsed + * before returns. If \a timeout is zero, the the function returns immediatly + * and it basically works in non-blocking fashion. A negative value for \a + * timeout means that the function can block indefinitely. + * + * \return number of bytes actually wrote, or a negative value in case of + * errors. + */ +ssize_t usb_endpointWriteTimeout(int ep, const void *buffer, ssize_t size, + ticks_t timeout); + +INLINE ssize_t usb_endpointWrite(int ep, const void *buffer, ssize_t size) +{ + return usb_endpointWriteTimeout(ep, buffer, size, -1); +} + +/** + * Register a generic USB device driver \a dev in the USB controller. + */ +int usb_deviceRegister(UsbDevice *dev); + +#endif /* USB_H */ diff --git a/bertos/drv/usb_endpoint.h b/bertos/drv/usb_endpoint.h new file mode 100644 index 0000000..63c49bd --- /dev/null +++ b/bertos/drv/usb_endpoint.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief USB endpoint allocations + * + * This file defines how the endpoints are allocated among the supported USB + * device drivers in BeRTOs. + * + */ + +#ifndef USB_ENDPOINT_H +#define USB_ENDPOINT_H + +#include "cfg/cfg_usb.h" +#include "cfg/cfg_usbser.h" +#include "cfg/cfg_usbkbd.h" +#include "cfg/cfg_usbmouse.h" + +/* Enpoint allocation (according to the compile-time options) */ +enum { + USB_CTRL_ENDPOINT = 0, /* This must be always allocated */ +#if (defined(CONFIG_USBSER) && CONFIG_USBSER) + USB_SERIAL_EP_REPORT, + USB_SERIAL_EP_OUT, + USB_SERIAL_EP_IN, +#endif +#if (defined(CONFIG_USBKBD) && CONFIG_USBKBD) + USB_KBD_EP_REPORT, +#endif +#if (defined(CONFIG_USBMOUSE) && CONFIG_USBMOUSE) + USB_MOUSE_EP_REPORT, +#endif + /* Number of allocated endpoints */ +#if (CONFIG_USB_EP_MAX == 0) + USB_EP_MAX, +#else + USB_EP_MAX = CONFIG_USB_EP_MAX, +#endif +}; + +/* + * NOTE: a USB inteface requires at least one endpoint. Moreover, there's the + * special endpoint 0. In conclusion, the number of endpoints must be always + * greater than the number of interfaces. + */ +STATIC_ASSERT(USB_EP_MAX >= CONFIG_USB_INTERFACE_MAX); + +#endif /* USB_ENDPOINT_H */ diff --git a/bertos/drv/usb_hid.h b/bertos/drv/usb_hid.h new file mode 100644 index 0000000..32cf711 --- /dev/null +++ b/bertos/drv/usb_hid.h @@ -0,0 +1,81 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Generic USB Human Interface Device (HID) driver. + */ + +#ifndef USB_HID_H +#define USB_HID_H + +#include + +/* + * USB HID interface subclass and protocol codes + */ +#define USB_INTERFACE_SUBCLASS_BOOT 1 +#define USB_INTERFACE_PROTOCOL_KEYBOARD 1 +#define USB_INTERFACE_PROTOCOL_MOUSE 2 + +/* + * HID class requests + */ +#define HID_REQ_GET_REPORT 0x01 +#define HID_REQ_GET_IDLE 0x02 +#define HID_REQ_GET_PROTOCOL 0x03 +#define HID_REQ_SET_REPORT 0x09 +#define HID_REQ_SET_IDLE 0x0A +#define HID_REQ_SET_PROTOCOL 0x0B + +/* + * HID class descriptor types + */ +#define HID_DT_HID (USB_TYPE_CLASS | 0x01) +#define HID_DT_REPORT (USB_TYPE_CLASS | 0x02) +#define HID_DT_PHYSICAL (USB_TYPE_CLASS | 0x03) + +/* + * USB HID descriptor + */ +typedef struct usb_HidDesc +{ + uint8_t bLength; + uint8_t bDescriptorType; + uint16_t bcdHID; + uint8_t bCountryCode; + uint8_t bNumDescriptors; + uint8_t bDescriptorHidType; + uint16_t wDescriptorLength; +} PACKED usb_HidDesc; + +#endif /* USB_HID_H */ diff --git a/bertos/drv/usbkbd.c b/bertos/drv/usbkbd.c new file mode 100644 index 0000000..bdacc41 --- /dev/null +++ b/bertos/drv/usbkbd.c @@ -0,0 +1,305 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Generic USB keyboard device driver. + * + */ + +#include "usb_hid.h" +#include "usbkbd.h" + +#include "cfg/cfg_usbkbd.h" + +#define LOG_LEVEL USB_KEYBOARD_LOG_LEVEL +#define LOG_FORMAT USB_KEYBOARD_LOG_FORMAT + +#include +#include +#include +#include +#include + +#include // cpu_relax() + +#include +#include + + +/* + * HID device configuration (usb-keyboard) + */ +#define USB_HID_VENDOR_ID USB_KEYBOARD_VENDOR_ID +#define USB_HID_PRODUCT_ID USB_KEYBOARD_PRODUCT_ID + +#define USB_HID_INTERFACES 1 +#define USB_HID_ENDPOINTS 1 + +#define USB_STRING_MANUFACTURER 1 +#define USB_STRING_PRODUCT 2 + +#define USB_HID_REPORT_EP (USB_DIR_IN | USB_KBD_EP_REPORT) + +static UsbDeviceDesc usb_hid_device_descriptor = +{ + .bLength = sizeof(usb_hid_device_descriptor), + .bDescriptorType = USB_DT_DEVICE, + .bcdUSB = 0x100, + .bDeviceClass = 0, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .idVendor = USB_HID_VENDOR_ID, + .idProduct = USB_HID_PRODUCT_ID, + .bcdDevice = 0, + .iManufacturer = USB_STRING_MANUFACTURER, + .iProduct = USB_STRING_PRODUCT, + .iSerialNumber = 0, + .bNumConfigurations = 1, +}; + +static const UsbConfigDesc usb_hid_config_descriptor = +{ + .bLength = sizeof(usb_hid_config_descriptor), + .bDescriptorType = USB_DT_CONFIG, + .bNumInterfaces = USB_HID_INTERFACES, + .bConfigurationValue = 1, + .iConfiguration = 0, + .bmAttributes = USB_CONFIG_ATT_ONE, + .bMaxPower = 50, /* 100 mA */ +}; + +static const UsbInterfaceDesc usb_hid_interface_descriptor = +{ + .bLength = sizeof(usb_hid_interface_descriptor), + .bDescriptorType = USB_DT_INTERFACE, + .bInterfaceNumber = 0, + .bAlternateSetting = 0, + .bNumEndpoints = USB_HID_ENDPOINTS, + .bInterfaceClass = USB_CLASS_HID, + .bInterfaceSubClass = USB_INTERFACE_SUBCLASS_BOOT, + .bInterfaceProtocol = USB_INTERFACE_PROTOCOL_KEYBOARD, + .iInterface = 0, +}; + +/* + * Keyboard report descriptor + * + * Taken from the USB HID spec: + * - E.6 Report Descriptor (Keyboard), HID1_11.pdf, p.69 + */ +static const uint8_t hid_report_descriptor[] = +{ + 0x05, 0x01, // Usage Page (Generic Desktop) + 0x09, 0x06, // Usage (Keyboard) + 0xA1, 0x01, // Collection (Application) + 0x05, 0x07, // Usage Page (Key Codes) + 0x19, 0xE0, // Usage Minimum (224) + 0x29, 0xE7, // Usage Maximum (231) + 0x15, 0x00, // Logical Minimum (0) + 0x25, 0x01, // Logical Maximum (1) + 0x75, 0x01, // Report Size (1) + 0x95, 0x08, // Report Count (8) + 0x81, 0x02, // Input (Data, Variable, Absolute) + 0x95, 0x01, // Report Count (1) + 0x75, 0x08, // Report Size (8) + 0x81, 0x01, // Input (Constant) + 0x95, 0x05, // Report Count (5) + 0x75, 0x01, // Report Size (1) + 0x05, 0x08, // Usage Page (Page# for LEDs) + 0x19, 0x01, // Usage Minimum (1) + 0x29, 0x05, // Usage Maximum (5) + 0x91, 0x02, // Output (Data, Variable, Absolute) + 0x95, 0x01, // Report Count (1) + 0x75, 0x03, // Report Size (3) + 0x91, 0x01, // Output (Constant) + 0x95, 0x06, // Report Count (6) + 0x75, 0x08, // Report Size (8) + 0x15, 0x00, // Logical Minimum (0) + 0x25, 0x65, // Logical Maximum(101) + 0x05, 0x07, // Usage Page (Key Codes) + 0x19, 0x00, // Usage Minimum (0) + 0x29, 0x65, // Usage Maximum (101) + 0x81, 0x00, // Input (Data, Array) + 0xC0, // End Collection +}; + +static const usb_HidDesc usb_hid_descriptor = +{ + .bLength = sizeof(usb_hid_descriptor), + .bDescriptorType = HID_DT_HID, + .bcdHID = usb_cpu_to_le16((uint16_t)0x0110), + .bCountryCode = 0, + .bNumDescriptors = 1, + .bDescriptorHidType = HID_DT_REPORT, + .wDescriptorLength = + usb_cpu_to_le16((uint16_t)sizeof(hid_report_descriptor)), +}; + +static const UsbEndpointDesc usb_hid_ep_descriptor = +{ + .bLength = sizeof(usb_hid_ep_descriptor), + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = USB_HID_REPORT_EP, + .bmAttributes = USB_ENDPOINT_XFER_INT, + .wMaxPacketSize = usb_cpu_to_le16((uint16_t)4), + .bInterval = 10, /* resolution in ms */ +}; + +static const UsbDescHeader *usb_hid_config[] = +{ + (const UsbDescHeader *)&usb_hid_config_descriptor, + (const UsbDescHeader *)&usb_hid_interface_descriptor, + (const UsbDescHeader *)&usb_hid_descriptor, + (const UsbDescHeader *)&usb_hid_ep_descriptor, + NULL, +}; + +static const DEFINE_USB_STRING(language_str, "\x09\x04"); // Language ID: en_US +static const DEFINE_USB_STRING(manufacturer_str, + USB_STRING("B", "e", "R", "T", "O", "S")); +static const DEFINE_USB_STRING(product_str, + USB_STRING("U", "S", "B", " ", + "K", "e", "y", "b", "o", "a", "r", "d")); + +static const UsbStringDesc *usb_hid_strings[] = +{ + (const UsbStringDesc *)&language_str, + (const UsbStringDesc *)&manufacturer_str, + (const UsbStringDesc *)&product_str, + NULL, +}; + +static uint8_t report[8]; + +static bool hid_keyboard_configured; + +static void usb_hid_event_cb(UsbCtrlRequest *ctrl) +{ + uint16_t value = usb_le16_to_cpu(ctrl->wValue); + uint16_t index = usb_le16_to_cpu(ctrl->wIndex); + uint16_t length = usb_le16_to_cpu(ctrl->wLength); + uint8_t type = ctrl->mRequestType; + uint8_t request = ctrl->bRequest; + + LOG_INFO("%s: s 0x%02x 0x%02x 0x%04x 0x%04x 0x%04x\n", + __func__, type, request, value, index, length); + switch (ctrl->bRequest) + { + case USB_REQ_GET_DESCRIPTOR: + switch (value >> 8) + { + case HID_DT_HID: + LOG_INFO("%s: HID_DT_HID\n", __func__); + usb_endpointWrite(USB_DIR_IN | 0, + &usb_hid_descriptor, + sizeof(usb_hid_descriptor)); + break; + case HID_DT_REPORT: + LOG_INFO("%s: HID_DT_REPORT\n", __func__); + usb_endpointWrite(USB_DIR_IN | 0, + &hid_report_descriptor, + sizeof(hid_report_descriptor)); + hid_keyboard_configured = true; + break; + default: + LOG_INFO("%s: unknown HID request\n", __func__); + break; + } + break; + case HID_REQ_GET_REPORT: + LOG_INFO("%s: HID_REQ_GET_REPORT\n", __func__); + break; + case HID_REQ_SET_REPORT: + LOG_INFO("%s: HID_REQ_SET_REPORT\n", __func__); + usb_endpointWrite(USB_DIR_IN | 0, NULL, 0); + break; + case HID_REQ_GET_IDLE: + LOG_INFO("%s: HID_REQ_GET_IDLE\n", __func__); + break; + case HID_REQ_SET_IDLE: + LOG_INFO("%s: HID_REQ_SET_IDLE\n", __func__); + usb_endpointWrite(USB_DIR_IN | 0, NULL, 0); + break; + case HID_REQ_GET_PROTOCOL: + LOG_INFO("%s: HID_REQ_GET_PROTOCOL\n", __func__); + break; + case HID_REQ_SET_PROTOCOL: + LOG_INFO("%s: HID_REQ_SET_PROTOCOL\n", __func__); + break; + default: + LOG_ERR("%s: unknown request: 0x%02x\n", + __func__, ctrl->bRequest); + break; + } +} + +/* Global usb-keyboard descriptor that identifies the usb-keyboard device */ +static UsbDevice usb_keyboard = { + .device = &usb_hid_device_descriptor, + .config = usb_hid_config, + .strings = usb_hid_strings, + .event_cb = usb_hid_event_cb, +}; + +/* Low-level usb-hid device initialization */ +static int usb_keyboard_hw_init(void) +{ + if (usb_deviceRegister(&usb_keyboard) < 0) + return -1; + LOG_INFO("usb-hid: registered new USB keyboard device\n"); + return 0; +} + +/* Send a keyboard event */ +void usbkbd_sendEvent(uint8_t mod, uint8_t code) +{ + report[0] = mod; + report[2] = code; + usb_endpointWrite(USB_HID_REPORT_EP, &report, sizeof(report)); +} + +/* + * Initialize a USB HID keyboard device. + * + * TODO: support more than one device at the same time. + */ +int usbkbd_init(UNUSED_ARG(int, unit)) +{ +#if CONFIG_KERN + MOD_CHECK(proc); +#endif + usb_keyboard_hw_init(); + while (!hid_keyboard_configured) + cpu_relax(); + return 0; +} diff --git a/bertos/drv/usbkbd.h b/bertos/drv/usbkbd.h new file mode 100644 index 0000000..ad3f03d --- /dev/null +++ b/bertos/drv/usbkbd.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Generic USB keyboard device driver. + * + * This module allows to create virtual keyboards. + * + * \attention The API is work in progress and may change in future versions. + * + * $WIZ$ module_name = "usbkbd" + * $WIZ$ module_configuration = "bertos/cfg/cfg_usbkbd.h" + * $WIZ$ module_depends = "usb" + */ + +#ifndef USBKBD_H +#define USBKBD_H + +void usbkbd_sendEvent(uint8_t mod, uint8_t code); +int usbkbd_init(int unit); + +#endif /* USBKBD_H */ diff --git a/bertos/drv/usbmouse.c b/bertos/drv/usbmouse.c new file mode 100644 index 0000000..ba468ca --- /dev/null +++ b/bertos/drv/usbmouse.c @@ -0,0 +1,299 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Generic USB mouse device driver. + * + * notest: avr + * notest: arm + */ + +#include "usb_hid.h" +#include "usbmouse.h" + +#include "cfg/cfg_usbmouse.h" + +#define LOG_LEVEL USB_MOUSE_LOG_LEVEL +#define LOG_FORMAT USB_MOUSE_LOG_FORMAT + +#include +#include +#include +#include +#include + +#include // cpu_relax() + +#include +#include + + +/* + * HID device configuration (usb-mouse) + */ +#define USB_HID_VENDOR_ID USB_MOUSE_VENDOR_ID +#define USB_HID_PRODUCT_ID USB_MOUSE_PRODUCT_ID + +#define USB_HID_INTERFACES 1 +#define USB_HID_ENDPOINTS 1 + +#define USB_STRING_MANUFACTURER 1 +#define USB_STRING_PRODUCT 2 + +#define USB_HID_REPORT_EP (USB_DIR_IN | USB_MOUSE_EP_REPORT) + +static UsbDeviceDesc usb_hid_device_descriptor = +{ + .bLength = sizeof(usb_hid_device_descriptor), + .bDescriptorType = USB_DT_DEVICE, + .bcdUSB = 0x100, + .bDeviceClass = 0, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .idVendor = USB_HID_VENDOR_ID, + .idProduct = USB_HID_PRODUCT_ID, + .bcdDevice = 0, + .iManufacturer = USB_STRING_MANUFACTURER, + .iProduct = USB_STRING_PRODUCT, + .iSerialNumber = 0, + .bNumConfigurations = 1, +}; + +static const UsbConfigDesc usb_hid_config_descriptor = +{ + .bLength = sizeof(usb_hid_config_descriptor), + .bDescriptorType = USB_DT_CONFIG, + .bNumInterfaces = USB_HID_INTERFACES, + .bConfigurationValue = 1, + .iConfiguration = 0, + .bmAttributes = USB_CONFIG_ATT_ONE, + .bMaxPower = 50, /* 100 mA */ +}; + +static const UsbInterfaceDesc usb_hid_interface_descriptor = +{ + .bLength = sizeof(usb_hid_interface_descriptor), + .bDescriptorType = USB_DT_INTERFACE, + .bInterfaceNumber = 0, + .bAlternateSetting = 0, + .bNumEndpoints = USB_HID_ENDPOINTS, + .bInterfaceClass = USB_CLASS_HID, + .bInterfaceSubClass = USB_INTERFACE_SUBCLASS_BOOT, + .bInterfaceProtocol = USB_INTERFACE_PROTOCOL_MOUSE, + .iInterface = 0, +}; + +static const uint8_t hid_report_descriptor[] = +{ + 0x05, 0x01, // Usage Page (Generic Desktop) + 0x09, 0x02, // Usage (Mouse) + 0xA1, 0x01, // Collection (Application) + 0x09, 0x01, // Usage (Pointer) + 0xA1, 0x00, // Collection (Physical) + 0x05, 0x09, // Usage Page (Buttons) + 0x19, 0x01, // Usage Minimum (1) + 0x29, 0x03, // Usage Maximum (3) + 0x15, 0x00, // Logical Minimum (0) + 0x25, 0x01, // Logical Maximum (1) + 0x95, 0x03, // Report Count (3) + 0x75, 0x01, // Report Size (1) + 0x81, 0x02, // Input (Data, Variable, Absolute) + 0x95, 0x01, // Report Count (1) + 0x75, 0x05, // Report Size (5) + 0x81, 0x01, // Input (03=Logitech, 01=Hid spec:Constant) + 0x05, 0x01, // Usage Page (Generic Desktop) + 0x09, 0x30, // Usage (X) + 0x09, 0x31, // Usage (Y) + 0x09, 0x38, // Usage (Logitech:_) + 0x15, 0x81, // Logical Minimum (-127) + 0x25, 0x7F, // Logical Maximum (127) + 0x75, 0x08, // Report Size (8) + 0x95, 0x02, // Report Count (Logitech=3, Hid spec =2) + 0x81, 0x06, // Input (Data, Variable, Relative) + 0xC0, // End Collection + 0xC0 // End Collection +}; + +static const usb_HidDesc usb_hid_descriptor = +{ + .bLength = sizeof(usb_hid_descriptor), + .bDescriptorType = HID_DT_HID, + .bcdHID = usb_cpu_to_le16((uint16_t)0x0110), + .bCountryCode = 0, + .bNumDescriptors = 1, + .bDescriptorHidType = HID_DT_REPORT, + .wDescriptorLength = + usb_cpu_to_le16((uint16_t)sizeof(hid_report_descriptor)), +}; + +static const UsbEndpointDesc usb_hid_ep_descriptor = +{ + .bLength = sizeof(usb_hid_ep_descriptor), + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = USB_HID_REPORT_EP, + .bmAttributes = USB_ENDPOINT_XFER_INT, + .wMaxPacketSize = usb_cpu_to_le16((uint16_t)4), + .bInterval = 10, /* resolution in ms */ +}; + +static const UsbDescHeader *usb_hid_config[] = +{ + (const UsbDescHeader *)&usb_hid_config_descriptor, + (const UsbDescHeader *)&usb_hid_interface_descriptor, + (const UsbDescHeader *)&usb_hid_descriptor, + (const UsbDescHeader *)&usb_hid_ep_descriptor, + NULL, +}; + +static const DEFINE_USB_STRING(language_str, "\x09\x04"); // Language ID: en_US +static const DEFINE_USB_STRING(manufacturer_str, + USB_STRING("B", "e", "R", "T", "O", "S")); +static const DEFINE_USB_STRING(product_str, + USB_STRING("U", "S", "B", " ", "M", "o", "u", "s", "e")); + +static const UsbStringDesc *usb_hid_strings[] = +{ + (const UsbStringDesc *)&language_str, + (const UsbStringDesc *)&manufacturer_str, + (const UsbStringDesc *)&product_str, + NULL, +}; + +typedef struct mouse_report +{ + uint8_t buttons; + int8_t x; + int8_t y; +} PACKED mouse_report_t; + +static mouse_report_t report; + +static bool hid_mouse_configured; + +static void usb_hid_event_cb(UsbCtrlRequest *ctrl) +{ + uint16_t value = usb_le16_to_cpu(ctrl->wValue); + uint16_t index = usb_le16_to_cpu(ctrl->wIndex); + uint16_t length = usb_le16_to_cpu(ctrl->wLength); + uint8_t type = ctrl->mRequestType; + uint8_t request = ctrl->bRequest; + + LOG_INFO("%s: s 0x%02x 0x%02x 0x%04x 0x%04x 0x%04x\n", + __func__, type, request, value, index, length); + switch (ctrl->bRequest) + { + case USB_REQ_GET_DESCRIPTOR: + switch (value >> 8) + { + case HID_DT_HID: + LOG_INFO("%s: HID_DT_HID\n", __func__); + usb_endpointWrite(USB_DIR_IN | 0, + &usb_hid_descriptor, + sizeof(usb_hid_descriptor)); + break; + case HID_DT_REPORT: + LOG_INFO("%s: HID_DT_REPORT\n", __func__); + usb_endpointWrite(USB_DIR_IN | 0, + &hid_report_descriptor, + sizeof(hid_report_descriptor)); + hid_mouse_configured = true; + break; + } + break; + case HID_REQ_GET_REPORT: + LOG_INFO("%s: HID_REQ_GET_REPORT\n", __func__); + break; + case HID_REQ_SET_REPORT: + LOG_INFO("%s: HID_REQ_SET_REPORT\n", __func__); + break; + case HID_REQ_GET_IDLE: + LOG_INFO("%s: HID_REQ_GET_IDLE\n", __func__); + break; + case HID_REQ_SET_IDLE: + LOG_INFO("%s: HID_REQ_SET_IDLE\n", __func__); + usb_endpointWrite(USB_DIR_IN | 0, NULL, 0); + break; + case HID_REQ_GET_PROTOCOL: + LOG_INFO("%s: HID_REQ_GET_PROTOCOL\n", __func__); + break; + case HID_REQ_SET_PROTOCOL: + LOG_INFO("%s: HID_REQ_SET_PROTOCOL\n", __func__); + break; + default: + LOG_ERR("%s: unknown request: 0x%02x\n", + __func__, ctrl->bRequest); + break; + } +} + +/* Global usb-mouse descriptor that identifies the usb-mouse device */ +static UsbDevice usb_mouse = { + .device = &usb_hid_device_descriptor, + .config = usb_hid_config, + .strings = usb_hid_strings, + .event_cb = usb_hid_event_cb, +}; + +/* Low-level usb-hid device initialization */ +static int usb_mouse_hw_init(void) +{ + if (usb_deviceRegister(&usb_mouse) < 0) + return -1; + LOG_INFO("usb-hid: registered new USB mouse device\n"); + return 0; +} + +/* Send a mouse event */ +void usbmouse_sendEvent(int8_t x, int8_t y, int8_t buttons) +{ + report.x = x; + report.y = y; + report.buttons = buttons; + usb_endpointWrite(USB_HID_REPORT_EP, &report, sizeof(report)); +} + +/* + * Initialize a USB HID device. + * + * TODO: support more than one device at the same time. + */ +int usbmouse_init(UNUSED_ARG(int, unit)) +{ +#if CONFIG_KERN + MOD_CHECK(proc); +#endif + usb_mouse_hw_init(); + while (!hid_mouse_configured) + cpu_relax(); + return 0; +} diff --git a/bertos/drv/usbmouse.h b/bertos/drv/usbmouse.h new file mode 100644 index 0000000..49e8aa7 --- /dev/null +++ b/bertos/drv/usbmouse.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Generic USB mouse device driver. + * + * \attention The API is work in progress and may change in future versions. + * + * $WIZ$ module_name = "usbmouse" + * $WIZ$ module_configuration = "bertos/cfg/cfg_usbmouse.h" + * $WIZ$ module_depends = "usb" + */ + +#ifndef USBMOUSE_H +#define USBMOUSE_H + +void usbmouse_sendEvent(int8_t x, int8_t y, int8_t buttons); +int usbmouse_init(int unit); + +#endif /* USBMOUSE_H */ diff --git a/bertos/drv/usbser.c b/bertos/drv/usbser.c new file mode 100644 index 0000000..04eb3d8 --- /dev/null +++ b/bertos/drv/usbser.c @@ -0,0 +1,309 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Generic USB serial device driver. + * + */ + +#include "usbser.h" + +#include "cfg/cfg_usbser.h" + +#define LOG_LEVEL USB_SERIAL_LOG_LEVEL +#define LOG_FORMAT USB_SERIAL_LOG_FORMAT + +#include +#include +#include + +#include +#include + +#include /* IRQ_DISABLE / IRQ_ENABLE */ +#include /* cpu_relax() */ + +#include +#include + +#include /* memcpy() */ + + +#define USB_SERIAL_INTERFACES 1 +#define USB_SERIAL_ENDPOINTS 3 + +#define USB_STRING_MANUFACTURER 1 +#define USB_STRING_PRODUCT 2 +#define USB_STRING_SERIAL 3 + +static UsbDeviceDesc usb_serial_device_descriptor = +{ + .bLength = sizeof(usb_serial_device_descriptor), + .bDescriptorType = USB_DT_DEVICE, + .bcdUSB = 0x110, + .bDeviceClass = USB_CLASS_COMM, + .bDeviceSubClass = 0, + .bDeviceProtocol = 0, + .idVendor = USB_SERIAL_VENDOR_ID, + .idProduct = USB_SERIAL_PRODUCT_ID, + .bcdDevice = 0, + .iManufacturer = USB_STRING_MANUFACTURER, + .iProduct = USB_STRING_PRODUCT, + .iSerialNumber = USB_STRING_SERIAL, + .bNumConfigurations = 1, +}; + +static const UsbConfigDesc usb_serial_config_descriptor = +{ + .bLength = sizeof(usb_serial_config_descriptor), + .bDescriptorType = USB_DT_CONFIG, + .bNumInterfaces = USB_SERIAL_INTERFACES, + .bConfigurationValue = 1, + .iConfiguration = 0, + .bmAttributes = USB_CONFIG_ATT_ONE, + .bMaxPower = 50, /* 100 mA */ +}; + +static const UsbInterfaceDesc usb_serial_interface_descriptor = +{ + .bLength = sizeof(usb_serial_interface_descriptor), + .bDescriptorType = USB_DT_INTERFACE, + .bInterfaceNumber = 0, + .bAlternateSetting = 0, + .bNumEndpoints = USB_SERIAL_ENDPOINTS, + .bInterfaceClass = 0xff, + .bInterfaceSubClass = 0, + .bInterfaceProtocol = 0, + .iInterface = 0, +}; + +static const UsbEndpointDesc usb_serial_ep_report_descriptor = +{ + .bLength = sizeof(usb_serial_ep_report_descriptor), + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = USB_DIR_IN | USB_SERIAL_EP_REPORT, + .bmAttributes = USB_ENDPOINT_XFER_INT, + .wMaxPacketSize = usb_cpu_to_le16((uint16_t)8), + .bInterval = 1, +}; + +static const UsbEndpointDesc usb_serial_ep_in_descriptor = +{ + .bLength = sizeof(usb_serial_ep_in_descriptor), + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = USB_DIR_IN | USB_SERIAL_EP_IN, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = usb_cpu_to_le16((uint16_t)64), + .bInterval = 0, +}; + +static const UsbEndpointDesc usb_serial_ep_out_descriptor = +{ + .bLength = sizeof(usb_serial_ep_in_descriptor), + .bDescriptorType = USB_DT_ENDPOINT, + .bEndpointAddress = USB_DIR_OUT | USB_SERIAL_EP_OUT, + .bmAttributes = USB_ENDPOINT_XFER_BULK, + .wMaxPacketSize = usb_cpu_to_le16((uint16_t)64), + .bInterval = 0, +}; + +static const UsbDescHeader *usb_serial_config[] = +{ + (const UsbDescHeader *)&usb_serial_config_descriptor, + (const UsbDescHeader *)&usb_serial_interface_descriptor, + (const UsbDescHeader *)&usb_serial_ep_report_descriptor, + (const UsbDescHeader *)&usb_serial_ep_in_descriptor, + (const UsbDescHeader *)&usb_serial_ep_out_descriptor, + NULL, +}; + +static const DEFINE_USB_STRING(language_str, "\x09\x04"); // Language ID: en_US +static const DEFINE_USB_STRING(manufacturer_str, + USB_STRING("B", "e", "R", "T", "O", "S")); +static const DEFINE_USB_STRING(product_str, + USB_STRING("U", "S", "B", "-", "s", "e", "r", "i", "a", "l")); +static const DEFINE_USB_STRING(serial_str, + USB_STRING("0", "0", "1")); + +static const UsbStringDesc *usb_serial_strings[] = +{ + (const UsbStringDesc *)&language_str, + (const UsbStringDesc *)&manufacturer_str, + (const UsbStringDesc *)&product_str, + (const UsbStringDesc *)&serial_str, + NULL, +}; + +/* Global usb-serial descriptor that identifies the usb-serial device */ +static UsbDevice usb_serial = { + .device = &usb_serial_device_descriptor, + .config = usb_serial_config, + .strings = usb_serial_strings, +}; + +/* Low-level usb-serial device initialization */ +static int usb_serial_hw_init(void) +{ +#if CONFIG_KERN + MOD_CHECK(proc); +#endif + if (usb_deviceRegister(&usb_serial) < 0) + return -1; + LOG_INFO("usb-serial: registered new USB interface driver\n"); + return 0; +} + +/** + * \brief Write a buffer to a usb-serial port. + * + * \return number of bytes actually written. + */ +static size_t usb_serial_write(struct KFile *fd, + const void *buf, size_t size) +{ + DB(USBSerial *fds = USB_SERIAL_CAST(fd)); + + /* Silent compiler warnings if _DEBUG is not enabled */ + (void)fd; + ASSERT(fds->is_open); + return usb_endpointWrite(usb_serial_ep_in_descriptor.bEndpointAddress, + buf, size); +} + +/** + * Read at most \a size bytes from a usb-serial port and put them in \a buf + * + * \return number of bytes actually read. + */ +static size_t usb_serial_read(struct KFile *fd, void *buf, size_t size) +{ + DB(USBSerial *fds = USB_SERIAL_CAST(fd)); + + /* Silent compiler warnings if _DEBUG is not enabled */ + (void)fd; + ASSERT(fds->is_open); + return usb_endpointRead(usb_serial_ep_out_descriptor.bEndpointAddress, + buf, size); +} + +/** + * Return the status of a usb-serial port. + * + * \todo properly implement usb-serial error handling. + */ +static int usb_serial_error(struct KFile *fd) +{ + USBSerial *fds = USB_SERIAL_CAST(fd); + return fds->status; +} + +/** + * Clear the status of a usb-serial port. + * + * \todo properly implement usb-serial error handling. + */ +static void usb_serial_clearerr(struct KFile *fd) +{ + USBSerial *fds = USB_SERIAL_CAST(fd); + fds->status = 0; +} + +/** + * Close an USB serial port. + */ +static int usb_serial_close(struct KFile *fd) +{ + DB(USBSerial *fds = USB_SERIAL_CAST(fd)); + + /* Silent compiler warnings if _DEBUG is not enabled */ + (void)fd; + ASSERT(fds->is_open); + DB(fds->is_open = false); + return 0; +} + +/** + * Initialize an USB serial port. + * + * \param fds KFile Serial struct interface. + * \param unit Serial unit to open. + */ +static int usb_serial_open(struct USBSerial *fds, int unit) +{ + unit = unit; + ASSERT(!fds->is_open); + /* TODO: only a single usb-serial unit is supported for now */ + ASSERT(unit == 0); + + /* Initialize usb-serial driver */ + if (usb_serial_hw_init() < 0) + return -1; + /* Clear error flags */ + fds->status = 0; + DB(fds->is_open = true); + + return 0; +} + +/** + * Reopen a usb-serial port. + */ +static struct KFile *usb_serial_reopen(struct KFile *fd) +{ + USBSerial *fds = USB_SERIAL_CAST(fd); + + usb_serial_close(fd); + usb_serial_open(fds, fds->unit); + return 0; +} + +/** + * Init serial driver for a usb-serial port \a unit. + * + * \return 0 if OK, a negative value in case of error. + */ +int usbser_init(struct USBSerial *fds, int unit) +{ + memset(fds, 0, sizeof(*fds)); + + DB(fds->fd._type = KFT_USB_SERIAL); + fds->fd.reopen = usb_serial_reopen; + fds->fd.close = usb_serial_close; + fds->fd.read = usb_serial_read; + fds->fd.write = usb_serial_write; + /* TODO: properly implement error handling. */ + fds->fd.error = usb_serial_error; + fds->fd.clearerr = usb_serial_clearerr; + + return usb_serial_open(fds, unit); +} diff --git a/bertos/drv/usbser.h b/bertos/drv/usbser.h new file mode 100644 index 0000000..561f33d --- /dev/null +++ b/bertos/drv/usbser.h @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \author Andrea Righi + * + * \brief Generic USB serial device driver. + * + * This driver exports a USB-serial converter. It provides a KFile interface + * to access the data. + * \attention The API is work in progress and may change in future versions. + * + * $WIZ$ module_name = "usbser" + * $WIZ$ module_configuration = "bertos/cfg/cfg_usbser.h" + * $WIZ$ module_depends = "usb" + */ + +#ifndef USBSER_H +#define USBSER_H + +#include + +typedef uint32_t usbser_status_t; + +typedef struct USBSerial +{ + /** KFile structure implementation **/ + KFile fd; + /** Logical port number */ + unsigned int unit; +#ifdef _DEBUG + /** Used for debugging only */ + bool is_open; +#endif + /** Holds the status flags. Set to 0 when no errors have occurred. */ + usbser_status_t status; +} USBSerial; + +/** + * ID for usb-serial. + */ +#define KFT_USB_SERIAL MAKE_ID('U', 'S', 'B', 'S') + +INLINE USBSerial *USB_SERIAL_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_USB_SERIAL); + return (USBSerial *)fd; +} + +int usbser_init(struct USBSerial *fds, int unit); + +#endif /* USBSER_H */ diff --git a/bertos/drv/wdt.h b/bertos/drv/wdt.h new file mode 100644 index 0000000..faba48d --- /dev/null +++ b/bertos/drv/wdt.h @@ -0,0 +1,125 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Watchdog module, supplies a simple API to manage wdt on supported target. + * + * $WIZ$ module_name = "wdt" + * $WIZ$ module_configuration = "bertos/cfg/cfg_wdt.h" + * $WIZ$ module_supports = "avr" + */ + +#ifndef DRV_WDT_H +#define DRV_WDT_H + +#include "cfg/cfg_wdt.h" + +#include // INLINE + +/* Configury sanity check */ +#if !defined(CONFIG_WATCHDOG) || (CONFIG_WATCHDOG != 0 && CONFIG_WATCHDOG != 1) + #error CONFIG_WATCHDOG must be defined to either 0 or 1 +#endif + +#if OS_HOSTED + #include + #include + + #if OS_QT + #include + #elif OS_POSIX + #include + #else + #error unknown CPU + #endif +#elif CONFIG_WATCHDOG + #include CPU_HEADER(wdt) +#endif /* CONFIG_WATCHDOG */ + + +#if OS_HOSTED || !CONFIG_WATCHDOG + + /** + * Reset the watchdog timer. + */ + INLINE void wdt_reset(void) + { + #if CONFIG_WATCHDOG + #if OS_POSIX + static struct timeval tv = { 0, 0 }; + select(0, NULL, NULL, NULL, &tv); + #endif + #endif /* CONFIG_WATCHDOG */ + } + + /** + * Start the watchdog timer that fire at the select + * timeout. + * + * \param timeout this value is target dependant. + * See the target documentation for more details. + */ + INLINE void wdt_start(uint32_t timeout) + { + #if CONFIG_WATCHDOG + #if OS_QT + // Create a dummy QApplication object + if (!qApp) + { + int argc; + new QApplication(argc, (char **)NULL); + } + (void)timeout; + #elif OS_POSIX + (void)timeout; // NOP + #endif + #endif /* CONFIG_WATCHDOG */ + (void)timeout; // NOP + } + + INLINE void wdt_stop(void) + { + #if CONFIG_WATCHDOG + #if OS_QT + // NOP + #elif OS_POSIX + // NOP + #else + #error unknown CPU + #endif + #endif /* CONFIG_WATCHDOG */ + } +#endif /* OS_HOSTED || !CONFIG_WATCHDOG */ + +#endif /* DRV_WDT_H */ diff --git a/bertos/dt/dnotifier.c b/bertos/dt/dnotifier.c new file mode 100644 index 0000000..50782d8 --- /dev/null +++ b/bertos/dt/dnotifier.c @@ -0,0 +1,161 @@ +/** + * \file + * + * + * + * \brief Notifier obj (implementation). + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#include + +#include
+#include
+#include + +/** + * Default update used to notify target: notify all trasparently all + * targets in the list. + */ +static void notifier_update(DNotifier *n, dtag_t tag, dval_t val) +{ + dnotify_targets(n, tag, val); +} + +/** + * Init. + */ +void notifier_init(DNotifier *n) +{ + // Init instance + n->update = notifier_update; + LIST_INIT(&n->targets); +} + +/** + * Search in the map a tag and a val corresponding to the ones supplied. + * If a match is found change them to the corresponding ones in the map. + * If map is NULL the filter is trasparent and all messages sent to filter + * will be forwarded to its target. + */ +void filter_update(DFilter *f, dtag_t tag, dval_t val) +{ + + const DFilterMap *map = f->map; + + if (map) + { + while (map->src.tag != TAG_END) + { + if ((map->src.tag == tag) && (map->src.val == val)) + { + tag = map->dst.tag; + val = map->dst.val; + break; + } + /* TAG_ANY matches anything */ + if (map->src.tag == TAG_ANY) + break; + map++; + } + + if (map->src.tag != TAG_END) + dnotify(f->target, tag, val); + } + else + dnotify(f->target, tag, val); +} + + +/** + * Search in the table a tag corresponding to the one supplied and a val + * that has at least the mask map supplied bits to one. + * If a match is found change them to the corresponding ones in the map. + * If map is NULL the filter is trasparent and all messages sent to filter + * will be forwarded to its target. + */ +void filter_mask_update(DFilter *f, dtag_t tag, dval_t val) +{ + + const DFilterMap *map = f->map; + dfilter_mask_t mask; + + if (map) + { + while (map->src.tag != TAG_END) + { + mask = (dfilter_mask_t) map->src.val; + if ((map->src.tag == tag) && ((mask & (dfilter_mask_t)val) == mask)) + { + tag = map->dst.tag; + val = map->dst.val; + break; + } + /* TAG_ANY matches anything */ + if (map->src.tag == TAG_ANY) + break; + map++; + } + + + if (map->src.tag != TAG_END) + dnotify(f->target, tag, val); + } + else + dnotify(f->target, tag, val); +} + + +#define FILTER_MAGIC_ACTIVE 0xAA +/** + * Init filter. + * If \a masked is true, all the fields value in \a map must be interpreted as a mask of bits. + */ +void filter_init(DFilter *f, const DFilterMap *map, bool masked, DNotifier *source, DNotifier *target) +{ + // Init instance + if (masked) + f->update = (update_filter_ptr)filter_mask_update; + else + f->update = (update_filter_ptr)filter_update; + + /* set filter map and target */ + f->map = map; + f->target = target; + + /* these ensure that the filter is not inserted in more than one list */ + ASSERT(f->magic != FILTER_MAGIC_ACTIVE); + DB(f->magic = FILTER_MAGIC_ACTIVE;) + + /* Add the filter to source filter list */ + ADDTAIL(&source->targets, &f->link); +} diff --git a/bertos/dt/dnotifier.h b/bertos/dt/dnotifier.h new file mode 100644 index 0000000..992a4ce --- /dev/null +++ b/bertos/dt/dnotifier.h @@ -0,0 +1,150 @@ +/** + * \file + * + * + * \brief Notifier obj (interface). + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#ifndef DT_DNOTIFIER_H +#define DT_DNOTIFIER_H + +#include + +#include
+#include + +//Fwd declaretion. +struct DNotifier; +struct DFilter; + +typedef void (* update_func_ptr)(struct DNotifier *, dtag_t, dval_t); +typedef void (* update_filter_ptr)(struct DFilter *, dtag_t, dval_t); + +/** + * Base object for receive and forward messages. + * It contains an update function used to update itslef and a list to + * notify other DNotifer eventually connected. + */ +typedef struct DNotifier +{ + /// Receive new attributes from other notifiers. + update_func_ptr update; + + /// List of target notifiers to set new attributes to. + List targets; +} DNotifier; + +/** + * Map for messages. + * Used to translate src message to dst message. + */ +typedef struct DFilterMap +{ + DTagItem src; + DTagItem dst; +} DFilterMap; + + +/** + * A filter is an interface between two notifier. + * It can translate messages between them through a map (if it is not null). + */ +typedef struct DFilter +{ + /// Allow creating a list of dfilter objects. + Node link; + + /// Target of the filter + DNotifier *target; + + /// Update function called by the source dnotifier + update_filter_ptr update; + + ///Map for translating messages for target + const DFilterMap *map; + + ///Used in debug to prevent inserting this filter in more than one list + DB(uint8_t magic;) +} DFilter; + +/// Type for filter-mask checking +typedef unsigned int dfilter_mask_t; + +/// Filter init +void filter_init(DFilter *f, const DFilterMap *map, bool masked, DNotifier *source, DNotifier *target); + +/// Filter update function without masking capabilities. +void filter_update(DFilter *f, dtag_t tag, dval_t val); + +/// Filter update function with masking capabilities. +void filter_mask_update(DFilter *f, dtag_t tag, dval_t val); + +/// Notifier init +void notifier_init(DNotifier *n); + + +/** + * Macro to notify the target object. + */ +INLINE void dnotify(DNotifier *target, dtag_t tag, dval_t val) +{ + if (target) + target->update(target, tag, val); +} + +/** + * Macro to notify all the targets of \a target object. + */ +INLINE void dnotify_targets(DNotifier *target, dtag_t tag, dval_t val) +{ + DFilter *f; + if (!LIST_EMPTY(&target->targets)) + FOREACH_NODE(f, &target->targets) + f->update(f, tag, val); +} + + +/** + * Macro that connect \a src notifier to \a tgt using \a map and passing \a opt for filtering option. + * It declares a static filter to achieve connection and messages translation. + * \note Due its static filter declaration, DCONNECT MUST NOT be used inside loops or in functions called multiple times. + * Failing to do so will lead to unpredictable connections between notifiers. + */ +#define DCONNECT(src, tgt, map, opt) \ + do { \ + static DFilter _filter_; /* Declare a filter */ \ + filter_init(&(_filter_), map, opt, src, tgt); /* Init it. */ \ + } while (0) + + +#endif /* DT_DNOTIFIER_H */ diff --git a/bertos/dt/dtag.h b/bertos/dt/dtag.h new file mode 100644 index 0000000..6242742 --- /dev/null +++ b/bertos/dt/dtag.h @@ -0,0 +1,111 @@ +/** + * \file + * + * + * + * \brief Tags interface. + * This module contains the base message definitions and the list of all available tags. + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +/*#* + *#* $Log$ + *#* Revision 1.2 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.1 2005/11/04 18:26:38 bernie + *#* Import into DevLib. + *#* + *#* Revision 1.8 2005/06/07 15:22:29 batt + *#* Add const_dval_t. + *#* + *#* Revision 1.7 2005/06/06 17:42:23 batt + *#* Add error tag TAG_ERROR. + *#* + *#* Revision 1.6 2005/06/06 12:45:33 batt + *#* Add TAG_NONE tag. + *#* + *#* Revision 1.5 2005/06/06 11:04:12 batt + *#* Add some comments. + *#* + *#* Revision 1.4 2005/05/31 11:09:52 batt + *#* Add some tags. + *#* + *#* Revision 1.3 2005/05/26 14:55:12 batt + *#* Add form_processTime; change form_kbdProcess to form_processKey. + *#* + *#* Revision 1.2 2005/05/26 14:43:33 batt + *#* Add new message filter interface. + *#* + *#* Revision 1.1 2005/05/26 08:32:53 batt + *#* Add new Develer widget system :) + *#* + *#*/ + +#ifndef DT_DTAG_H +#define DT_DTAG_H + +#include + +/** Type for values associated with tags. */ +typedef iptr_t dval_t; + +/** Type for constant values associated with tags. */ +typedef const_iptr_t const_dval_t; + +/** Type for tag */ +typedef enum dtag_t +{ + TAG_END = 0, + TAG_NONE, + TAG_ANY, + TAG_SETVALUE, + TAG_UP, + TAG_DOWN, + TAG_START, + TAG_STOP, + TAG_TOGGLE, + TAG_KEY, + TAG_TIME, + TAG_ERROR, +} dtag_t; + +/** This is the basic message structure used by all dnotifiers. */ +typedef struct DTagItem +{ + dtag_t tag; + dval_t val; +} DTagItem; + +/** Marker to indicate the end of a map for message filtering/translating */ +#define TAG_END_MARKER {{TAG_END, 0}, {TAG_END, 0}} +#endif diff --git a/bertos/dt/dwidget.c b/bertos/dt/dwidget.c new file mode 100644 index 0000000..c205454 --- /dev/null +++ b/bertos/dt/dwidget.c @@ -0,0 +1,75 @@ +/** + * \file + * + * + * + * \brief Widget (implementation). + * A widget is typically a graphic object on a device. + * Its proproperties are the position, the size and a context on which the widget is drawn. + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +/*#* + *#* $Log$ + *#* Revision 1.2 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.1 2005/11/04 18:26:38 bernie + *#* Import into DevLib. + *#* + *#* Revision 1.3 2005/06/06 11:04:12 batt + *#* Add some comments. + *#* + *#* Revision 1.2 2005/05/26 14:44:10 batt + *#* Abstract widget from layer: use context. + *#* + *#* Revision 1.1 2005/05/26 08:32:53 batt + *#* Add new Develer widget system :) + *#* + *#*/ + +#include
+#include
+ +/** + * Init the widget of \a pos and \a size on the drawing \a context. + */ +void widget_init(DWidget *w, dpos_t pos, dpos_t size, dcontext_t *context) +{ + // Init superclass + notifier_init(&w->notifier); + + // Init instance + w->pos = pos; + w->size = size; + w->context = context; +} diff --git a/bertos/dt/dwidget.h b/bertos/dt/dwidget.h new file mode 100644 index 0000000..11e5380 --- /dev/null +++ b/bertos/dt/dwidget.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * + * \brief Widget (interface). + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#ifndef DT_DWIDGET_H +#define DT_DWIDGET_H + +#include
+#include + +/** Widget position. */ +typedef uint8_t dpos_t; + +/** Widget drawing context. */ +typedef iptr_t dcontext_t; + +/** Widget definition. */ +typedef struct DWidget +{ + DNotifier notifier; + + dpos_t pos; + dpos_t size; + dcontext_t *context; +} DWidget; + + +void widget_init(DWidget *w, dpos_t pos, dpos_t size, dcontext_t *context); + +#endif diff --git a/bertos/dt/editbool.c b/bertos/dt/editbool.c new file mode 100644 index 0000000..867afbe --- /dev/null +++ b/bertos/dt/editbool.c @@ -0,0 +1,98 @@ +/** + * \file + * + * + * \brief Edit bool widget (implementation). + * This widget handles boolean editing. + * The boolean value will be displayed using two strings: + * one when the bool is false and one when it's true. + * + * \author Francesco Sacchi + */ + +#include "editbool.h" +#include
+ +#include + +/** + * Init widget. + */ +void editbool_init(DEditBool *e, dpos_t pos, dpos_t size, dcontext_t *context, bool *value, const char *true_string, const char *false_string) +{ + // Initialize superclass + widget_init(&e->widget, pos, size, context); + + // Override superclass methods + e->widget.notifier.update = (update_func_ptr)editbool_update; + + // Init instance + e->value = value; + e->true_string = true_string; + e->false_string = false_string; + e->draw = editbool_draw; +} + +/** + * Handle the messages (edit the bool). + */ +void editbool_update(DEditBool *e, dtag_t tag, dval_t _val) +{ + bool changed = false; + + switch (tag) + { + case TAG_SETVALUE: + *e->value = (bool)_val; + changed = true; + break; + + case TAG_TOGGLE: + *e->value = !*e->value; + changed = true; + break; + default: + break; + } + + if (changed) + { + e->draw(e); + dnotify_targets(&e->widget.notifier, TAG_SETVALUE, (dval_t)*e->value); + } +} + +/** + * Draw the string on the context. + */ +void editbool_draw(DEditBool *e) +{ + lcd_printf((Layer *)e->widget.context, (lcdpos_t)e->widget.pos, LCD_NORMAL, "%*s", (int)e->widget.size , *e->value? e->true_string: e->false_string); +} diff --git a/bertos/dt/editbool.h b/bertos/dt/editbool.h new file mode 100644 index 0000000..eb0a72d --- /dev/null +++ b/bertos/dt/editbool.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Edit bool widget (interface). + * + * \author Francesco Sacchi + */ + +#ifndef DT_EDITBOOL_H +#define DT_EDITBOOL_H + +#include
+#include
+ +typedef struct DEditBool +{ + DWidget widget; + bool *value; + const char *true_string; + const char *false_string; + void (*draw)(struct DEditBool *); +} DEditBool; + +void editbool_init(DEditBool *e, dpos_t pos, dpos_t size, dcontext_t *context, bool *val, const char *true_str, const char *false_str); +void editbool_update(DEditBool *e, dtag_t tag, dval_t val); +void editbool_draw(DEditBool *e); + + +#endif /* DT_EDITBOOL_H */ diff --git a/bertos/dt/editint.c b/bertos/dt/editint.c new file mode 100644 index 0000000..4ce6017 --- /dev/null +++ b/bertos/dt/editint.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief Integer edit widget (implementation). + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +#include "editint.h" + +#include + +#include
+#include
+#include
+ +#include + +/** + * Init. + */ +void editint_init(DEditInt *e, dpos_t pos, dpos_t size, dcontext_t *context, int *value, int min, int max) +{ + // Initialize superclass + widget_init(&e->widget, pos, size, context); + + // Override superclass methods + e->widget.notifier.update = (update_func_ptr)editint_update; + + // Init instance + e->value = value; + e->min = min; + e->max = max; + e->style = EDIS_DEFAULT; + e->draw = editint_draw; +} + +/** + * Handle the messages (edit the int). + */ +void editint_update(DEditInt *e, dtag_t tag, dval_t _val) +{ + bool changed = false; + int val = (int)_val; + + switch (tag) + { + case TAG_SETVALUE: + *e->value = MINMAX(e->min, val, e->max); + changed = true; + break; + + /* Increments the integer by val */ + case TAG_UP: + if (e->style & EDIS_WRAP) + { + if (*e->value + val > e->max) + *e->value = (*e->value + val - e->min) % (e->max - e->min + 1) + e->min; + else + *e->value += val; + } + else + *e->value = MIN(*e->value + val, e->max); + changed = true; + break; + /* Decrements the integer by val */ + case TAG_DOWN: + if (e->style & EDIS_WRAP) + { + if (*e->value - val < e->min) + *e->value = e->max - (e->max - (*e->value - val)) % (e->max - e->min + 1); + else + *e->value -= val; + } + else + *e->value = MAX(*e->value - val, e->min); + changed = true; + break; + + default: + break; + } + + if (changed) + { + e->draw(e); + dnotify_targets(&e->widget.notifier, TAG_SETVALUE, (dval_t)*e->value); + } +} + +/** + * Draw the integer on the context. + */ +void editint_draw(DEditInt *e) +{ + lcd_printf((Layer *)e->widget.context, (lcdpos_t)e->widget.pos, LCD_NORMAL,"%*d", (int)e->widget.size, *e->value); +} diff --git a/bertos/dt/editint.h b/bertos/dt/editint.h new file mode 100644 index 0000000..94ebc15 --- /dev/null +++ b/bertos/dt/editint.h @@ -0,0 +1,92 @@ +/** + * \file + * + * + * + * \brief Integer edit (interface). + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + +/*#* + *#* $Log$ + *#* Revision 1.2 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.1 2005/11/04 18:26:38 bernie + *#* Import into DevLib. + *#* + *#* Revision 1.3 2005/06/10 15:46:09 batt + *#* Add EDIS_WRAP style that wrap around min and max. + *#* + *#* Revision 1.2 2005/05/26 14:44:10 batt + *#* Abstract widget from layer: use context. + *#* + *#* Revision 1.1 2005/05/26 08:32:53 batt + *#* Add new Develer widget system :) + *#* + *#*/ + +#ifndef DT_EDITINT_H +#define DT_EDITINT_H + +#include
+#include
+#include + +#include +#include + + +#define EDIS_DEFAULT 0 +#define EDIS_CURSORLEFT BV(0) +#define EDIS_WRAP BV(1) + +/** Type for edit style */ +typedef uint16_t dstyle_t; + +typedef struct DEditInt +{ + DWidget widget; + + int *value; + int min; + int max; + dstyle_t style; + void (*draw)(struct DEditInt *); + +} DEditInt; + +void editint_init(DEditInt *e, dpos_t pos, dpos_t size, dcontext_t *context, int *value, int min, int max); +void editint_update(DEditInt *e, dtag_t tag, dval_t val); +void editint_draw(DEditInt *e); + +#endif diff --git a/bertos/emul/diskio_emul.c b/bertos/emul/diskio_emul.c new file mode 100644 index 0000000..7bddc28 --- /dev/null +++ b/bertos/emul/diskio_emul.c @@ -0,0 +1,219 @@ +/** + * \file + * + * + * \brief Low level disk access for FatFs emulated. + * + * \author Luca Ottaviano + */ + +/*-----------------------------------------------------------------------*/ +/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2007 */ +/*-----------------------------------------------------------------------*/ + +#include +#include +#include +#include + +#define SECTOR_SIZE 512 + +static volatile DSTATUS Stat = STA_NOINIT; + +/** + * This is an example implementation, used to simulate the the calls to normal filesystem calls + * It only works for drive 0. + */ + + +/*-----------------------------------------------------------------------*/ +/* Inidialize a Drive */ + +static FILE *fake_disk = 0; + +DSTATUS disk_initialize ( + BYTE drv /* Physical drive nmuber (0..) */ +) +{ + if (drv) + return STA_NOINIT; /* Support only drive 0 */ + // XXX: pay attention here: some functions call disk_initialize *after* it has + // been initialized for the first time. + // Here we just return the status (that should always be ~STA_NOINIT after the first + // call) + if (fake_disk) + return Stat; + + const char *path = "emuldisk.dsk"; + fake_disk = fopen(path, "w+"); + int err = errno; + if (!fake_disk) + { + switch (err) + { + case EINVAL: + fprintf(stderr, "invalid mode\n"); + default: + return STA_NOINIT; + } + } + Stat &= ~STA_NOINIT; + return Stat; +} + + + +/*-----------------------------------------------------------------------*/ +/* Return Disk Status */ + +DSTATUS disk_status ( + BYTE drv /* Physical drive nmuber (0..) */ +) +{ + if (drv) + return STA_NOINIT; /* Support only drive 0 */ + return Stat; +} + + + +/*-----------------------------------------------------------------------*/ +/* Read Sector(s) */ + +DRESULT disk_read ( + BYTE drv, /* Physical drive nmuber (0..) */ + BYTE *buff, /* Data buffer to store read data */ + DWORD sector, /* Sector address (LBA) */ + BYTE count /* Number of sectors to read (1..255) */ +) +{ + if (drv || !count) return RES_PARERR; + if (Stat & STA_NOINIT) return RES_NOTRDY; + + fseek(fake_disk, sector * SECTOR_SIZE, SEEK_SET); + size_t read_items = fread(buff, SECTOR_SIZE, count, fake_disk); + if (read_items == count) + return RES_OK; + else + { + if (feof(fake_disk)) + fprintf(stderr, "end-of-file\n"); + if (ferror(fake_disk)) + fprintf(stderr, "error\n"); + return RES_ERROR; + } +} + + +/*-----------------------------------------------------------------------*/ +/* Write Sector(s) */ + +#if _READONLY == 0 +DRESULT disk_write ( + BYTE drv, /* Physical drive nmuber (0..) */ + const BYTE *buff, /* Data to be written */ + DWORD sector, /* Sector address (LBA) */ + BYTE count /* Number of sectors to write (1..255) */ +) +{ + if (drv || !count) return RES_PARERR; + if (Stat & STA_NOINIT) return RES_NOTRDY; + if (Stat & STA_PROTECT) return RES_WRPRT; + + fseek(fake_disk, sector * SECTOR_SIZE, SEEK_SET); + size_t write_items = fwrite(buff, SECTOR_SIZE, count, fake_disk); + if (write_items == count) + return RES_OK; + else + { + if (feof(fake_disk)) + fprintf(stderr, "end-of-file\n"); + if (ferror(fake_disk)) + fprintf(stderr, "error\n"); + return RES_ERROR; + } +} +#endif /* _READONLY */ + + + +/*-----------------------------------------------------------------------*/ +/* Miscellaneous Functions */ + +DRESULT disk_ioctl ( + BYTE drv, /* Physical drive nmuber (0..) */ + BYTE ctrl, /* Control code */ + void *buff /* Buffer to send/receive control data */ +) +{ + if (drv) return RES_PARERR; + if (Stat & STA_NOINIT) return RES_NOTRDY; + + switch (ctrl) + { + case GET_SECTOR_SIZE: + *(WORD*)buff = SECTOR_SIZE; + break; + case GET_SECTOR_COUNT: + *(DWORD*)buff = 65536; + break; + case GET_BLOCK_SIZE: + *(DWORD*)buff = 1; + break; + case CTRL_SYNC: + fflush(fake_disk); + break; + default: + return RES_PARERR; + } + return RES_OK; +} + +DWORD get_fattime(void) +{ + time_t tmp = time(0); + struct tm *t = localtime(&tmp); + DWORD tim = 0; + // seconds + tim |= (t->tm_sec / 2); + // min + tim |= (t->tm_min << 5); + // hour + tim |= (t->tm_hour << 11); + // month day (1..31) + tim |= (t->tm_mday << 16); + // month (1..12) + tim |= ((t->tm_mon + 1) << 21); + // year (0..127) + tim |= ((t->tm_year - 80) << 25); + return tim; +} + diff --git a/bertos/emul/emul.cpp b/bertos/emul/emul.cpp new file mode 100644 index 0000000..4e8d00f --- /dev/null +++ b/bertos/emul/emul.cpp @@ -0,0 +1,104 @@ +/** + * \file + * + * + * \brief Qt-based emulator framework for embedded applications (implementation) + * + * \author Bernie Innocenti + */ + +#include "emul.h" +#include "emulwin.h" + +#include + +#include +#include // std::exit() + + +/// The global emulator instance. +Emulator *emul; + +Emulator::Emulator(int &argc, char **argv) : + emulApp(new QApplication(argc, argv)), + emulWin(new EmulWin(this)) +{ + emulWin->show(); +} + + +Emulator::~Emulator() +{ + // we don't delete emulWin because it automatically + // deletes itself when closed + delete emulApp; +} + + +NORETURN void Emulator::quit() +{ + // WHAT A KLUDGE! + this->~Emulator(); + emul = NULL; + + // do we have a better way to shut down the emulation? + exit(0); +} + +MOD_DEFINE(emul) + +/// Main emulator entry point. +extern "C" void emul_init(int *argc, char *argv[]) +{ + // setup global emulator pointer + emul = new Emulator(*argc, argv); + + MOD_INIT(emul); +} + +extern "C" void emul_cleanup() +{ + MOD_CLEANUP(emul); + + // Timer must be made inactive before we destroy the emulator + extern bool timer_initialized; + ASSERT(!timer_initialized); + + delete emul; + emul = NULL; +} + +extern "C" void emul_idle() +{ + // We process GUI events when the application is idle. + emul->emulApp->processEvents(); +} + diff --git a/bertos/emul/emul.h b/bertos/emul/emul.h new file mode 100644 index 0000000..dee0509 --- /dev/null +++ b/bertos/emul/emul.h @@ -0,0 +1,100 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Qt-based emulator framework for embedded applications (interface) + */ + +/*#* + *#* $Log$ + *#* Revision 1.4 2006/02/15 09:11:17 bernie + *#* Add keyboard emulator. + *#* + *#* Revision 1.3 2006/01/23 23:12:08 bernie + *#* Let Doxygen see through C++ protected section. + *#* + *#* Revision 1.2 2006/01/16 03:51:51 bernie + *#* Fix boilerplate. + *#* + *#* Revision 1.1 2006/01/16 03:37:12 bernie + *#* Add emulator skeleton. + *#* + *#*/ + +#ifndef EMUL_EMUL_H +#define EMUL_EMUL_H + +#include + +#if defined(__cplusplus) || defined(__doxygen__) + +// fwd decls +class QApplication; +class EmulWin; +class EmulPRT; +class EmulLCD; +class EmulKbd; +class QCheckBox; +class QSlider; +class QLabel; + +class Emulator +{ +// data members +public: + QApplication *emulApp; ///< QT Application. + EmulWin *emulWin; ///< Main window. + + EmulLCD *emulLCD; ///< Display emulator. + EmulKbd *emulKbd; ///< Keyboard emulator. + +// construction + Emulator(int &argc, char **argv); + ~Emulator(); + +// public methods + void quit(); +}; + +extern Emulator *emul; + +#endif /* __cplusplus */ + +EXTERN_C void emul_init(int *argc, char *argv[]); +EXTERN_C void emul_cleanup(); +EXTERN_C void emul_idle(); + +#endif /* EMUL_EMUL_H */ + diff --git a/bertos/emul/emul.mk b/bertos/emul/emul.mk new file mode 100644 index 0000000..779d922 --- /dev/null +++ b/bertos/emul/emul.mk @@ -0,0 +1,22 @@ +# +# Copyright 2007 Bernie Innocenti (http://www.codewiz.org/) +# All rights reserved. +# +# Author: Bernie Innocenti +# +# Qt configuration for BeRTOS emulator. Include it from +# your app Makefile fragment + +#On Darwin architecture environment variables need a different configuration. +ifeq ($(shell uname | grep -c "Darwin"),1) + EMUL_CFLAGS = -D'ARCH=(ARCH_EMUL|ARCH_QT)' -DQT_CLEAN_NAMESPACE + EMUL_LDFLAGS = -framework QtGui -framework QtCore + QT_MOC = /usr/bin/moc +#On other platforms. +else + EMUL_CFLAGS = -D'ARCH=(ARCH_EMUL|ARCH_QT)' $(shell pkg-config QtCore QtGui --cflags) -DQT_CLEAN_NAMESPACE + EMUL_LDFLAGS = $(shell pkg-config QtCore QtGui --libs) + QT_MOC = $(shell pkg-config QtCore --variable=moc_location) + #QT_UIC = $(shell pkg-config QtCore --variable=uic_location) +endif + diff --git a/bertos/emul/emulkbd.cpp b/bertos/emul/emulkbd.cpp new file mode 100644 index 0000000..ed5fb05 --- /dev/null +++ b/bertos/emul/emulkbd.cpp @@ -0,0 +1,230 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief QT-based widget for keyboard emulation (implementation) + */ + +#include "emulkbd.h" +#include "emul.h" + +#include +#include +#include +#include +#include +#include +#include +#include + + +EmulKey::EmulKey(EmulKbd *kbd, const char *label, int _keycode, int _row, int _col) : + QPushButton(label, kbd), + row(_row), col(_col), + keycode(_keycode) +{ + // don't let the widget get focus + setFocusPolicy(Qt::NoFocus); + + // unused + connect(this, SIGNAL(pressed()), this, SLOT(keyPressed())); + connect(this, SIGNAL(released()), this, SLOT(keyReleased())); +} + + +EmulKey::~EmulKey() +{ + // nop +} + + +/** + * Override standad QButton behaviour: we must also emit the signals. + */ +// unused +void EmulKey::setDown(bool enable) +{ + // let our superclass do everything else + QPushButton::setDown(enable); + + if (enable) + emit pressed(); + else + emit released(); +} + + +// unused +void EmulKey::keyPressed(void) +{ + static_cast(parent())->setKey(row, col, true); +} + + +// unused +void EmulKey::keyReleased(void) +{ + static_cast(parent())->setKey(row, col, false); +} + + +EmulKbd::EmulKbd(QWidget *parent, Qt::WFlags f) : + QFrame(parent, f), + layout(new QGridLayout(this)), + active_row(0) +{ + setFrameStyle(QFrame::Box | QFrame::Sunken); + setLineWidth(1); + setFocusPolicy(Qt::StrongFocus); + frame_width = frameWidth(); +} + + +EmulKbd::~EmulKbd() +{ + delete layout; +} + + +QSizePolicy EmulKbd::sizePolicy() const +{ + return QSizePolicy(QSizePolicy::Fixed, QSizePolicy::Fixed); +} + + +void EmulKbd::resizeEvent(QResizeEvent *event) +{ + // Let our superclass process the event first + QFrame::resizeEvent(event); +} + + +// handle key presses for all keys in keyboard +bool EmulKbd::event(QEvent *_e) +{ + switch (_e->type()) + { + case QEvent::KeyPress: + case QEvent::KeyRelease: + { + QKeyEvent *e = static_cast(_e); + int keycode = e->key(); + EmulKey *key; + + // ignore repeated keys + if (!e->isAutoRepeat()) + { + // scan all children + for (QObjectList::const_iterator it(children().begin()); it != children().end(); ++it) + { + // only keys, not other children! + if ((*it)->metaObject() == &EmulKey::staticMetaObject) + // if ((key = dynamic_cast(*it))) + { + key = static_cast(*it); + + // same key? + if (key->keycode == keycode) + { + // yes, tell key to go down (or up) + key->setDown(_e->type() == QEvent::KeyPress); + break; + } + } + } + } + return true; + } + + default: + // let superclass process this event + return QFrame::event(_e); + + } // end switch(_e->type()) +} + + +void EmulKbd::addKey(const char *label, int keycode, int row, int col, int matrix_row, int matrix_col) +{ + if (matrix_row == -1) + matrix_row = row; + if (matrix_col == -1) + matrix_col = col; + + layout->addWidget(new EmulKey(this, label, keycode, matrix_row, matrix_col), row, col); +} + + +// unused +void EmulKbd::setKey(int /*row*/, int /*col*/, bool /*on*/) +{ +} + + +void EmulKbd::setRow(int r) +{ + active_row = r; +} + +int EmulKbd::readCols(void) +{ + QLayoutItem *item; + EmulKey *key; + int cols = 0; + + for (int i = 0; (item = layout->itemAt(i)); ++i) + { + key = static_cast(item->widget()); + if (key->row == active_row) + { + if (key->isDown()) + cols |= (1<col); + } + } + return cols; +} + +extern "C" void emul_kbdSetRows(int r) +{ + emul->emulKbd->setRow(r); +} + + +extern "C" int emul_kbdReadCols(void) +{ + return emul->emulKbd->readCols(); +} + +#include "emulkbd_moc.cpp" diff --git a/bertos/emul/emulkbd.h b/bertos/emul/emulkbd.h new file mode 100644 index 0000000..e348c74 --- /dev/null +++ b/bertos/emul/emulkbd.h @@ -0,0 +1,118 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief QT-based widget for leyboard emulation (interface) + */ + +#if !defined(EMULKBD_H) +#define EMULKBD_H + +#if defined (_MSC_VER) && (_MSC_VER > 1000) +#pragma once +#endif // _MSC_VER > 1000 + +#include + +// fwd decl +class QGridLayout; +class EmulKey; + +class EmulKbd : public QFrame +{ + Q_OBJECT + +// Data members +protected: + QGridLayout *layout; + int frame_width; + int active_row; + +// Construction +public: + EmulKbd(QWidget *parent = 0, Qt::WFlags f = 0); + virtual ~EmulKbd(); + +// Public methods + void addKey(const char *label, int keycode, int row, int col, int matrix_row = -1, int matrix_col = -1); + void setRow(int row); + int readCols(void); + +// Protected methods +protected: + void setKey(int row, int col, bool on); + +// Base class overrides +protected: + virtual QSizePolicy sizePolicy() const; + virtual void resizeEvent(QResizeEvent *e); + virtual bool event(QEvent *e); + +// Friends + friend class EmulKey; +}; + + +// Private helper class for EmulKbd +// NOTE: with protected inheritance, dynamic_cast<> does not work (gcc 2.96) +#include +class EmulKey : public QPushButton +{ + Q_OBJECT + +// Data members +protected: + int row, col; + int keycode; + +// Construction +public: + EmulKey(EmulKbd *parent, const char *label, int keycode, int _row, int _col); + virtual ~EmulKey(); + +// superclass overrides + void setDown(bool enable); + +protected slots: + void keyPressed(void); + void keyReleased(void); + +// Friends +public: + friend class EmulKbd; +}; + +#endif // !defined(EMULKBD_H) + diff --git a/bertos/emul/emulwin.cpp b/bertos/emul/emulwin.cpp new file mode 100644 index 0000000..a49fa48 --- /dev/null +++ b/bertos/emul/emulwin.cpp @@ -0,0 +1,129 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Main Qt window for embedded applications emulator (implementation) + */ + +#include "emulwin.h" + +#include +#include +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +using namespace Qt; + +EmulWin::EmulWin(Emulator *e) +{ + setWindowTitle(tr("BeRTOS Emul Demo")); + setAttribute(Qt::WA_DeleteOnClose); + + // Create the menu bar + QMenu *file_menu = menuBar()->addMenu(tr("&File")); + file_menu->addAction(tr("&Quit"), + e->emulApp, SLOT(closeAllWindows()), CTRL+Key_Q); + + menuBar()->addSeparator(); + + QMenu *help_menu = menuBar()->addMenu(tr("&Help")); + help_menu->addAction(tr("&About"), + this, SLOT(about()), Key_F1); + + // Make a central widget to contain the other widgets + QWidget *central = new QWidget(this); + setCentralWidget(central); + + // Create a layout to position the widgets + QHBoxLayout *box_main = new QHBoxLayout(central); + + // Main layout + QVBoxLayout *box_right = new QVBoxLayout(); + box_main->addLayout(box_right); + + // LCD + QHBoxLayout *lay_lcd = new QHBoxLayout(); + box_right->addLayout(lay_lcd); + lay_lcd->addStretch(1); + lay_lcd->addWidget(e->emulLCD = new EmulLCD(central), 8); + lay_lcd->addStretch(1); + + // Keyboard + box_right->addWidget(e->emulKbd = new EmulKbd(central)); + + // Setup keyboard: Label Keycode Row Col MRow MCol + e->emulKbd->addKey("^", Key_Up, 0, 0, 0, 0); + e->emulKbd->addKey("v", Key_Down, 1, 0, 0, 1); + e->emulKbd->addKey("OK", Key_Return, 0, 1, 0, 2); + e->emulKbd->addKey("ESC", Key_Escape, 1, 1, 0, 3); +} + + +EmulWin::~EmulWin() +{ + emul->quit(); +} + + +void EmulWin::closeEvent(QCloseEvent *ce) +{ + emul->quit(); + ce->accept(); +} + + +void EmulWin::about() +{ + QMessageBox::about(this, + "BeRTOS Embedded Application Emulator", + "Version 0.1\n" + "Copyright 2006, 2008 Develer S.r.l. (http://www.develer.com/)\n" + "Copyright 2001, 2002, 2003, 2005 Bernie Innocenti \n" + "All rights reserved." + ); +} + +#include "emulwin_moc.cpp" diff --git a/bertos/emul/emulwin.h b/bertos/emul/emulwin.h new file mode 100644 index 0000000..2bfbf21 --- /dev/null +++ b/bertos/emul/emulwin.h @@ -0,0 +1,81 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Main Qt window for embedded applications emulator (interface) + */ + +/*#* + *#* $Log$ + *#* Revision 1.4 2006/05/28 12:17:56 bernie + *#* Drop almost all the Qt3 cruft. + *#* + *#* Revision 1.3 2006/02/20 02:00:39 bernie + *#* Port to Qt 4.1. + *#* + *#* Revision 1.2 2006/01/16 03:51:51 bernie + *#* Fix boilerplate. + *#* + *#* Revision 1.1 2006/01/16 03:37:12 bernie + *#* Add emulator skeleton. + *#* + *#*/ + +#ifndef EMUL_EMULWIN_H +#define EMUL_EMULWIN_H + +#include + +// fwd decls +class Emulator; + +class EmulWin : public QMainWindow +{ + Q_OBJECT + +// construction +public: + EmulWin(Emulator *emul); + ~EmulWin(); + +protected: + void closeEvent(QCloseEvent *); + +private slots: + void about(); +}; + +#endif // EMUL_EMULWIN_H + diff --git a/bertos/emul/kfile_posix.c b/bertos/emul/kfile_posix.c new file mode 100644 index 0000000..d196c6a --- /dev/null +++ b/bertos/emul/kfile_posix.c @@ -0,0 +1,112 @@ +/** + * \file + * + * + * \brief KFile interface implementation in Posix systems. + * + * \author Luca Ottaviano + */ + +#include +#include + +static size_t kfile_posix_read(struct KFile *_fd, void *buf, size_t size) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + size_t len = fread(buf, sizeof(uint8_t), size, fd->fp); + fd->fd.seek_pos += len; + return len; +} + +static size_t kfile_posix_write(struct KFile *_fd, const void *buf, size_t size) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + size_t len = fwrite(buf, sizeof(uint8_t), size, fd->fp); + fd->fd.seek_pos += len; + fd->fd.size = MAX(fd->fd.size, fd->fd.seek_pos); + return len; +} + +static kfile_off_t kfile_posix_seek(struct KFile *_fd, kfile_off_t offset, KSeekMode whence) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + int std_whence; + switch (whence) + { + case KSM_SEEK_CUR: + std_whence = SEEK_CUR; + break; + case KSM_SEEK_END: + std_whence = SEEK_END; + break; + case KSM_SEEK_SET: + std_whence = SEEK_SET; + break; + default: + ASSERT(0); + return EOF; + } + int err = fseek(fd->fp, offset, std_whence); + if (err) + return err; + + fd->fd.seek_pos = ftell(fd->fp); + return fd->fd.seek_pos; +} + +static int kfile_posix_close(struct KFile *_fd) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + return fclose(fd->fp); +} + +static int kfile_posix_flush(struct KFile *_fd) +{ + KFilePosix *fd = KFILEPOSIX_CAST(_fd); + return fflush(fd->fp); +} + +FILE *kfile_posix_init(KFilePosix *file, const char *filename, const char *mode) +{ + memset(file, 0, sizeof(*file)); + DB(file->fd._type = KFT_KFILEPOSIX); + file->fd.read = kfile_posix_read; + file->fd.write = kfile_posix_write; + file->fd.close = kfile_posix_close; + file->fd.seek = kfile_posix_seek; + file->fd.flush = kfile_posix_flush; + + file->fp = fopen(filename, mode); + fseek(file->fp, 0, SEEK_END); + file->fd.size = ftell(file->fp); + fseek(file->fp, 0, SEEK_SET); + return file->fp; +} diff --git a/bertos/emul/kfile_posix.h b/bertos/emul/kfile_posix.h new file mode 100644 index 0000000..805affb --- /dev/null +++ b/bertos/emul/kfile_posix.h @@ -0,0 +1,60 @@ +/** + * \file + * + * + * \brief KFile interface implementation in Posix systems. + * + * \author Luca Ottaviano + */ + +#ifndef KFILE_POSIX_H +#define KFILE_POSIX_H + +#include +#include + +typedef struct KFilePosix +{ + KFile fd; + FILE *fp; +} KFilePosix; + +#define KFT_KFILEPOSIX MAKE_ID('K', 'F', 'T', 'P') + +INLINE KFilePosix *KFILEPOSIX_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_KFILEPOSIX); + return (KFilePosix *)fd; +} + +FILE *kfile_posix_init(KFilePosix *file, const char *filename, const char *mode); + +#endif /* KFILE_POSIX_H */ diff --git a/bertos/emul/ser_posix.c b/bertos/emul/ser_posix.c new file mode 100644 index 0000000..50754b8 --- /dev/null +++ b/bertos/emul/ser_posix.c @@ -0,0 +1,178 @@ +/** + * \file + * + * + * \brief Serial port emulator for hosted environments. + * + * \author Bernie Innocenti + */ + +#include "cfg/cfg_ser.h" + +#include +#include + +#include +#include + +#include + +#include +#include + +#include /* open() */ +#include /* read(), write() */ + + +/* From the high-level serial driver */ +extern struct Serial ser_handles[SER_CNT]; + +/* TX and RX buffers */ +static unsigned char uart0_txbuffer[CONFIG_UART0_TXBUFSIZE]; +static unsigned char uart0_rxbuffer[CONFIG_UART0_RXBUFSIZE]; +static unsigned char uart1_txbuffer[CONFIG_UART1_TXBUFSIZE]; +static unsigned char uart1_rxbuffer[CONFIG_UART1_RXBUFSIZE]; + + +/** + * Internal state structure + */ +struct EmulSerial +{ + struct SerialHardware hw; + struct Serial *ser; + int fd; +}; + + +/* + * Callbacks + */ +static void uart_init(struct SerialHardware *_hw, struct Serial *ser) +{ + struct EmulSerial *hw = (struct EmulSerial *)_hw; + + hw->ser = ser; + hw->fd = open("/dev/ttyS0", O_RDWR); +} + +static void uart_cleanup(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + struct EmulSerial *hw = (struct EmulSerial *)_hw; + + close(hw->fd); + hw->fd = -1; +} + +static void uart_txStart(struct SerialHardware * _hw) +{ + struct EmulSerial *hw = (struct EmulSerial *)_hw; + + while(!fifo_isempty(&hw->ser->txfifo)) + { + char c = fifo_pop(&hw->ser->txfifo); + write(hw->fd, &c, 1); + } +} + +static bool uart_txSending(UNUSED_ARG(struct SerialHardware *, _hw)) +{ + return false; +} + + +static void uart_setBaudrate(UNUSED_ARG(struct SerialHardware *, _hw), unsigned long rate) +{ + TRACEMSG("rate=%lu", rate); + // TODO + +} + +static void uart_setParity(UNUSED_ARG(struct SerialHardware *, _hw), int parity) +{ + TRACEMSG("parity=%d", parity); + // TODO +} + +// FIXME: move into compiler.h? Ditch? +#if COMPILER_C99 + #define C99INIT(name,val) .name = val +#elif defined(__GNUC__) + #define C99INIT(name,val) name: val +#else + #warning No designated initializers, double check your code + #define C99INIT(name,val) (val) +#endif + +/* + * High-level interface data structures. + */ +static const struct SerialHardwareVT uart_vtable = +{ + C99INIT(init, uart_init), + C99INIT(cleanup, uart_cleanup), + C99INIT(setBaudrate, uart_setBaudrate), + C99INIT(setParity, uart_setParity), + C99INIT(txStart, uart_txStart), + C99INIT(txSending, uart_txSending), +}; + +static struct EmulSerial UARTDescs[SER_CNT] = +{ + { + C99INIT(hw, /**/) { + C99INIT(table, &uart_vtable), + C99INIT(txbuffer, uart0_txbuffer), + C99INIT(rxbuffer, uart0_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart0_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart0_rxbuffer)), + }, + C99INIT(ser, NULL), + C99INIT(fd, -1), + }, + { + C99INIT(hw, /**/) { + C99INIT(table, &uart_vtable), + C99INIT(txbuffer, uart1_txbuffer), + C99INIT(rxbuffer, uart1_rxbuffer), + C99INIT(txbuffer_size, sizeof(uart1_txbuffer)), + C99INIT(rxbuffer_size, sizeof(uart1_rxbuffer)), + }, + C99INIT(ser, NULL), + C99INIT(fd, -1), + }, +}; + +struct SerialHardware *ser_hw_getdesc(int unit) +{ + ASSERT(unit < SER_CNT); + return &UARTDescs[unit].hw; +} diff --git a/bertos/emul/switch.S b/bertos/emul/switch.S new file mode 100644 index 0000000..110d62f --- /dev/null +++ b/bertos/emul/switch.S @@ -0,0 +1,2 @@ +#warning This file is deprecated, use switch_ctx_emul.S +#include "switch_ctx_emul.S" diff --git a/bertos/emul/switch_ctx_emul.S b/bertos/emul/switch_ctx_emul.S new file mode 100644 index 0000000..50567d1 --- /dev/null +++ b/bertos/emul/switch_ctx_emul.S @@ -0,0 +1,10 @@ +#if defined(__i386__) + #include "switch_i386.S" +#elif defined(__x86_64__) + #include "switch_x86_64.s" +#elif defined(_ARCH_PPC) || defined(_ARCH_PPC64) + #include "switch_ppc.S" +#else + #error Unknown CPU +#endif + diff --git a/bertos/emul/switch_i386.S b/bertos/emul/switch_i386.S new file mode 100644 index 0000000..f00d447 --- /dev/null +++ b/bertos/emul/switch_i386.S @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief i386 context switch + * + * x86 function calling convention: + * -------------------------------- + * arguments | callee-saved | extra caller-saved | return + * [callee-clobbered] | | [callee-clobbered] | + * ------------------------------------------------------------------------- + * eax edx ecx | ebx edi esi ebp [*] | | eax, edx + * + * [*] In the frame-pointers case rbp must hold a base address for the + * current stack frame. + * + * asm_switch_context() can be considered as a normal function call, so we need + * to save all the callee-clobbered registers minus the return registers. + */ + +#ifdef __APPLE__ + // This workaround is necessary to compile under OS X assembler. + #define SWITCH_CONTEXT _asm_switch_context +#else + #define SWITCH_CONTEXT asm_switch_context +#endif + +/* void asm_switch_context(void ** new_sp [sp+4], void ** save_sp [sp+8]) */ +.globl SWITCH_CONTEXT +SWITCH_CONTEXT: + pushl %ebp + pushl %ecx + movl 0x10(%esp),%ebp /* ebp = save_sp */ + movl %esp,(%ebp) /* *save_sp = esp */ + movl 0x0c(%esp),%ebp /* ebp = new_sp */ + movl (%ebp),%esp /* esp = *new_sp */ + popl %ecx + popl %ebp + ret diff --git a/bertos/emul/switch_ppc.S b/bertos/emul/switch_ppc.S new file mode 100644 index 0000000..adcd3aa --- /dev/null +++ b/bertos/emul/switch_ppc.S @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief PowerPC context switch + */ + +#ifdef __APPLE__ + //This workaround is necessary to compile under OS X assembler. + #define SWITCH_CONTEXT _asm_switch_context +#else + #define SWITCH_CONTEXT asm_switch_context +#endif + +.balign 4 + +/* void asm_switch_context(void ** new_sp, void ** save_sp) */ +/* r3 r4 */ +.globl SWITCH_CONTEXT +SWITCH_CONTEXT: + mflr 0 /* r0 = lr */ + stw 0,8(1) /* store lr at *(sp+8) */ + stw 1,0(4) /* *save_sp = sp */ + lwz 1,0(3) /* sp = *new_sp */ + lwz 0,8(1) /* retrieve lr from *(sp+8) */ + mtlr 0 /* lr = r0 */ + blr /* return */ diff --git a/bertos/emul/switch_win32.s b/bertos/emul/switch_win32.s new file mode 100644 index 0000000..884fea9 --- /dev/null +++ b/bertos/emul/switch_win32.s @@ -0,0 +1,81 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief i386 context switch for WIN32 + */ + +!!!!!! THIS FILE HAS NOT BEEN REVISED FOR THE NEW SCHEDULER API !!!!!! + +__declspec(naked) void AsmSwitchContext(void * new_sp, void ** save_sp) +{ + __asm + { + push eax + push ebx + push ecx + push edx + push esi + push edi + push ebp + mov ebp,dword ptr [esp+24h] ; ebp <- save_sp + mov dword ptr [ebp],esp ; *save_sp = esp + mov esp,dword ptr [esp+20h] ; new_sp + pop ebp + pop edi + pop esi + pop edx + pop ecx + pop ebx + pop eax + ret + } +} + +__declspec(naked) void AsmReplaceContext(void * new_sp, void ** dummy) +{ + __asm + { + mov esp,dword ptr [esp + 4] ; new_sp + pop ebp + pop edi + pop esi + pop edx + pop ecx + pop ebx + pop eax + ret + } +} + diff --git a/bertos/emul/switch_x86_64.s b/bertos/emul/switch_x86_64.s new file mode 100644 index 0000000..ea76d2c --- /dev/null +++ b/bertos/emul/switch_x86_64.s @@ -0,0 +1,72 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief x86_64 context switch + * + * x86_64 function call convention: + * -------------------------------- + * arguments | callee-saved | extra caller-saved | return + * [callee-clobbered] | | [callee-clobbered] | + * ------------------------------------------------------------------------- + * rdi rsi rdx rcx r8-9 | rbx rbp [*] r12-15 | r10-11 | rax, rdx + * + * [*] In the frame-pointers case rbp must hold a base address for the + * current stack frame. + * + * asm_switch_context() can be considered as a normal function call, so we need + * to save all the callee-clobbered registers minus the return registers. + */ + +/* void asm_switch_context(void **new_sp [%rdi], void **save_sp [%rsi]) */ +.globl asm_switch_context +asm_switch_context: + pushq %rbp + pushq %rdi + pushq %rsi + pushq %rcx + pushq %r8 + pushq %r9 + pushq %r10 + pushq %r11 + movq %rsp,(%rsi) /* *save_sp = rsp */ + movq (%rdi),%rsp /* rsp = *new_sp */ + popq %r11 + popq %r10 + popq %r9 + popq %r8 + popq %rcx + popq %rsi + popq %rdi + popq %rbp + ret diff --git a/bertos/emul/timer_posix.c b/bertos/emul/timer_posix.c new file mode 100644 index 0000000..309d5c5 --- /dev/null +++ b/bertos/emul/timer_posix.c @@ -0,0 +1,92 @@ +/** + * \file + * + * + * \brief Low-level timer module for Qt emulator (implementation). + * + * \author Bernie Innocenti + */ +//#include // hptime.t +#include +#include // irq_register() + +#if !CONFIG_KERN_IRQ +#include // sigaction() +#include // memset() +#endif +#include // setitimer() + + +// Forward declaration for the user interrupt server routine. +void timer_isr(int); + +/// HW dependent timer initialization. +static void timer_hw_init(void) +{ + #if CONFIG_KERN_IRQ + irq_register(SIGALRM, (void (*)(void))timer_isr); + #else // ! CONFIG_KERN_IRQ + struct sigaction sa; + memset(&sa, 0, sizeof(sa)); + + // Setup interrupt callback + sa.sa_handler = timer_isr; + sigemptyset(&sa.sa_mask); + sigaddset(&sa.sa_mask, SIGALRM); + sa.sa_flags = SA_RESTART; + sigaction(SIGALRM, &sa, NULL); + #endif // CONFIG_KERN_IRQ + + // Setup POSIX realtime timer to interrupt every 1/TIMER_TICKS_PER_SEC. + static const struct itimerval itv = + { + { 0, 1000000 / TIMER_TICKS_PER_SEC }, /* it_interval */ + { 0, 1000000 / TIMER_TICKS_PER_SEC } /* it_value */ + }; + setitimer(ITIMER_REAL, &itv, NULL); +} + +static void timer_hw_cleanup(void) +{ + static const struct itimerval itv = + { + { 0, 0 }, /* it_interval */ + { 0, 0 } /* it_value */ + }; + setitimer(ITIMER_REAL, &itv, NULL); + signal(SIGALRM, SIG_DFL); +} + +INLINE hptime_t timer_hw_hpread(void) +{ + return hptime_get(); +} + +#define timer_hw_triggered() (true) diff --git a/bertos/emul/timer_posix.h b/bertos/emul/timer_posix.h new file mode 100644 index 0000000..acfdbe4 --- /dev/null +++ b/bertos/emul/timer_posix.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Low-level timer module for POSIX systems (interface). + */ +#ifndef DRV_TIMER_POSIX_H +#define DRV_TIMER_POSIX_H + +// HW dependent timer initialization + +#define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_isr) + +/** Most Linux kernels can't do better than this (CONFIG_HZ=250). */ +#define TIMER_TICKS_PER_SEC 250 + +#define TIMER_HW_CNT (1<<31) /* We assume 32bit integers here */ + +#include + +/// Frequency of the hardware high-precision timer. +#define TIMER_HW_HPTICKS_PER_SEC HPTIME_TICKS_PER_SECOND + +/// Not needed. +#define timer_hw_irq() do {} while (0) + +#endif /* DRV_TIMER_POSIX_H */ diff --git a/bertos/emul/timer_qt.c b/bertos/emul/timer_qt.c new file mode 100644 index 0000000..e0883ab --- /dev/null +++ b/bertos/emul/timer_qt.c @@ -0,0 +1,155 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Low-level timer module for Qt emulator (implementation). + */ +#include /* hptime.t */ + +// Qt headers +#include +#include + +#if CONFIG_KERN_IRQ +#include +#endif + + +// The user interrupt server routine +void timer_isr(void); + + +/** + * Singleton class for Qt-based hardware timer emulation. + */ +class EmulTimer : public QObject +{ +private: + Q_OBJECT; + + /// System timer (counts ms since application startup) + QTime system_time; + + /// The 1ms "hardware" tick counter. + QTimer timer; + + /** + * We deliberately don't use RAII because the real hardware + * we're simulating needs to be initialized manually. + */ + bool initialized; + + /// Private ctor (singleton) + EmulTimer() : initialized(false) { } + +public: + /// Return singleton instance + static EmulTimer &instance() + { + static EmulTimer et; + return et; + } + + /// Start timer emulator. + void init() + { + // Timer initialized twice? + ASSERT(!initialized); + + // Record initial time + system_time.start(); + + #if CONFIG_KERN_IRQ + irq_register(SIGALRM, timer_isr); + #endif + + // Activate timer interrupt + connect(&timer, SIGNAL(timeout()), SLOT(timerInterrupt())); + timer.start(1000 / TIMER_TICKS_PER_SEC); + + initialized = true; + } + + void cleanup() + { + // Timer cleaned twice? + ASSERT(initialized); + + timer.stop(); + timer.disconnect(); + + initialized = false; + } + + /// Return current time in high-precision format. + hptime_t hpread() + { + ASSERT(initialized); + return system_time.elapsed(); + } + +public slots: + void timerInterrupt(void) + { + // Just call user interrupt server, timer restarts automatically. + #if CONFIG_KERN_IRQ + irq_entry(SIGALRM); + #else + timer_isr(); + #endif + } + +}; + +#include "timer_qt_moc.cpp" + + +/// HW dependent timer initialization. +static void timer_hw_init(void) +{ + EmulTimer::instance().init(); +} + +static void timer_hw_cleanup(void) +{ + EmulTimer::instance().cleanup(); +} + +INLINE hptime_t timer_hw_hpread(void) +{ + return EmulTimer::instance().hpread(); +} + +/** Not needed, timer IRQ handler called only for timer source */ +#define timer_hw_triggered() (true) diff --git a/bertos/emul/timer_qt.h b/bertos/emul/timer_qt.h new file mode 100644 index 0000000..61bbbdc --- /dev/null +++ b/bertos/emul/timer_qt.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Low-level timer module for Qt emulator (interface). + */ +#ifndef DRV_TIMER_QT_H +#define DRV_TIMER_QT_H + +// HW dependent timer initialization + +#define DEFINE_TIMER_ISR DECLARE_ISR_CONTEXT_SWITCH(timer_isr) +#define TIMER_TICKS_PER_SEC 250 +#define TIMER_HW_CNT (1<<31) /* We assume 32bit integers here */ + +/// Type of time expressed in ticks of the hardware high-precision timer. +typedef unsigned int hptime_t; +#define SIZEOF_HPTIME_T 4 + +/// Frequency of the hardware high-precision timer. +#define TIMER_HW_HPTICKS_PER_SEC 1000 + +/// Not needed. +#define timer_hw_irq() do {} while (0) + +#endif /* DRV_TIMER_QT_H */ diff --git a/bertos/fonts/convbdf b/bertos/fonts/convbdf new file mode 100755 index 0000000..1e9e97e --- /dev/null +++ b/bertos/fonts/convbdf @@ -0,0 +1,209 @@ +#! /usr/bin/perl -w +# +# Convert BDF files to nano-X font files +# modified by G Haerr from bdftobogl for 16 bit MWIMAGEBITS +# modified on 2/10/00 by K Harris to accept any size input character +# modified on 3/26/00 by G Haerr added ascent field, fixed $IMAGE_BITS +# modified on 2/15/06 by for DevLib. +# originally from BOGL - Ben's Own Graphics Library . +# + +use POSIX; + +if ($#ARGV < 0) { + print "Usage: convbdf font.bdf > font.c\n"; + exit -1; +} + +$LAST_CHAR = 0xff; +$IMAGE_BITS = 8; +$IMAGE_NIBBLES = $IMAGE_BITS/4; +$IMAGE_MASK = 0xff; +$IMAGE_VERTICAL = 1; + +$file = $ARGV[0]; + +$font = $file; +$font =~ s#.*/##; # remove path name +$font =~ s/\.bdf//; +$font =~ tr/a-zA-Z0-9_/_/cs; + +print "/* Generated by convbdf on ", substr(`date`, 0, -1), ". */\n"; +print "#include \n\n"; + +open BDF, "<$file" || die; +while () { + chop; + $pixel_size = $1 if /^PIXEL_SIZE (\d+)$/; + $font_ascent = $1 if /^FONT_ASCENT (\d+)$/; + $font_descent = $1 if /^FONT_DESCENT (\d+)$/; + $font_name = $1 if /^FONT (.*)$/; + $default_char = $1 if /^DEFAULT_CHAR (\d+)$/; + + last if /^CHARS /; +} + +print "/* Font information:\n\n"; +print " name: $font_name\n"; +print " pixel size: $pixel_size\n"; +print " ascent: $font_ascent\n"; +print " descent: $font_descent\n"; +print "*/\n\n"; + +print "/* Font character bitmap data. */\n"; +print "static const PROGMEM uint8_t font_${font}_glyphs[] = {\n"; + +$ch_height = $font_ascent + $font_descent; +$ofs = 0; +$maxwidth = 0; +$proportional = 0; +$firstchar = -1; +while () { + chop; + undef $encoding, undef $width, undef $bbx, undef $bby, undef $bbw, undef $bbh if /^STARTCHAR /; + $encoding = $1 if /^ENCODING (\d+)/; + last if defined $encoding && $encoding > $LAST_CHAR; + $width = $1 if /^DWIDTH (-?\d+)/; + ($bbw, $bbh, $bbx, $bby) = ($1, $2, $3, $4) if /^BBX (-?\d+) (-?\d+) (-?\d+) (-?\d+)/; + + if (/^BITMAP$/) { + next if !defined $encoding; + $firstchar = $encoding if $firstchar < 0; + $encoding_tab[$encoding] = $ofs; + $width -= $bbx, $bbx = 0 if $bbx < 0; + $width[$encoding] = $width; + $maxwidth != 0 and $width != $maxwidth and $proportional = 1; + $maxwidth = $width if $width > $maxwidth; + $ch_words = int (($width+$IMAGE_BITS-1)/$IMAGE_BITS); + $ch_bits = $ch_words*$IMAGE_BITS; + for (my $i = 0; $i < $ch_height; $i++) { + for (my $k = 0; $k < $ch_words; $k++) { + $bm[$i][$k] = 0; + } + } + for (my $i = 0; ; $i++) { + $_ = ; + chop; + last if /^ENDCHAR$/; + + @hexnibbles = split //,$_; + for (my $k=0; $k<$ch_words; $k++) { + $ndx = $k*$IMAGE_NIBBLES; + $padnibbles = @hexnibbles - $ndx; + # if bbx pushes bits into next word + # and no more bits from bdf file + last if $padnibbles <= 0; + $padnibbles = 0 if $padnibbles >= $IMAGE_NIBBLES; + $value = hex join '',@hexnibbles[$ndx..($ndx+$IMAGE_NIBBLES-1-$padnibbles)]; + $value = $value << ($padnibbles*$IMAGE_NIBBLES); + $bm[$ch_height - $font_descent - $bby - $bbh + $i][$k] |= + $value >> ($bbx); + if ($bbx) { # handle overflow into next image_word + $bm[$ch_height - $font_descent - $bby - $bbh + $i][$k+1] = + ($value << ($IMAGE_BITS - $bbx)) & $IMAGE_MASK; + } + } + } + + # GLYPH PREVIEW +### printf "\n/* Character %c (0x%02x): ", $encoding, $encoding; + printf "\n/* Character (0x%02x): ", $encoding; + print "bbw=$bbw, bbh=$bbh, bbx=$bbx, bby=$bby, width=$width */\n"; + + # GLYPH DATA + if ($IMAGE_VERTICAL) { + my $bitstring = ""; + for (my $k = 0; $k < int(($ch_height + $IMAGE_BITS - 1) / $IMAGE_BITS); $k++) { + for (my $x = 0; $x < $width; $x++) { + my $v = 0; + for (my $y = 0; $y < $IMAGE_BITS && ($y + $k * $IMAGE_BITS < $ch_height); ++$y) { + my $bit = ($bm[$k * $IMAGE_BITS + $y][int($x / $IMAGE_BITS)] & (1 << ($IMAGE_BITS - ($x % $IMAGE_BITS) - 1))) ? 1 : 0; + $bitstring .= $bit ? '*' : ' '; + $v |= $bit << $y; + } + $ofs++; + printf "0x%02x, ", $v; + } + # Preview + printf "/* $bitstring */\n"; + } + + } + else { # IMAGE_HORIZONTAL + + # Preview + print " +", ("-" x $ch_bits), "+\n"; + for (my $i = 0; $i < $ch_height; $i++) { + print " |"; + for (my $k = 0; $k < $ch_words; $k++) { + for (my $j = $IMAGE_BITS - 1; $j >= 0; $j--) { + print $bm[$i][$k] & (1 << $j) ? "*" : " "; + } + } + print "|\n"; + } + print " +", ("-" x $ch_bits), "+ */\n"; + + for (my $i = 0; $i < $ch_height; $i++) { + for (my $k=0; $k<$ch_words; $k++) { + $ofs++; + printf "0x%02x, ", $bm[$i][$k]; + } + printf "\n"; + } + } + } +} + +print "};\n\n"; + +#print STDERR "Maximum character width=$maxwidth\n"; + +if ($proportional) { + print "/* Character->glyph data. */\n"; + print "static const PROGMEM uint16_t ${font}_offset[] = {\n"; + for (my $i = $firstchar; $i <= $LAST_CHAR; $i++) { + my $char = $i; + my $ofs = $encoding_tab[$i]; + $ofs = $encoding_tab[$default_char], $char = $default_char if !defined $ofs; + ### printf " $ofs,\t/* %c (0x%02x) */\n", $char, $i; + printf " $ofs,\t/* (0x%02x) */\n", $i; + } + print "};\n\n"; + + print "/* Character width data. */\n"; + print "static const PROGMEM uint8_t ${font}_width[] = {\n"; + for (my $i = $firstchar; $i <= $LAST_CHAR; $i++) { + my $char = $i; + my $width = $width[$i]; + $width = $width[$default_char], $char = $default_char if !defined $encoding_tab[$i]; + ### printf " $width,\t/* %c (0x%02x) */\n", $char, $i; + printf " $width,\t/* (0x%02x) */\n", $i; + } + print "};\n\n"; + + $font_offset = "${font}_offset"; + $font_width = "${font}_width"; +} else { + $font_offset = "NULL"; + $font_width = "NULL"; +} + +$lastchar = $LAST_CHAR; +#$size = $lastchar - $firstchar + 1; + +print < + * + * --> + * + * \brief Font 8x6 IBM-PC 8bit + * + * + * \author Bernie Innocenti + * + */ + +#include + +static const PROGMEM uint8_t default_font_glyphs[256 * 6] = +{ +/* 0x00 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ + 0x3E, 0x45, 0x51, 0x45, 0x3E, 0x00, /* */ + 0x3E, 0x7B, 0x6F, 0x7B, 0x3E, 0x00, /* */ + 0x1C, 0x3E, 0x7C, 0x3E, 0x1C, 0x00, /* */ + 0x08, 0x1C, 0x3E, 0x1C, 0x08, 0x00, /* */ + 0x18, 0x5A, 0x67, 0x5A, 0x18, 0x00, /* */ + 0x0C, 0x5E, 0x6F, 0x5E, 0x0C, 0x00, /* */ + 0x08, 0x1C, 0x3E, 0x1C, 0x08, 0x00, /* */ +/* 0x08 */ + 0x77, 0x63, 0x41, 0x63, 0x77, 0x00, /* */ + 0x18, 0x3C, 0x66, 0x3C, 0x18, 0x00, /* */ + 0x77, 0x63, 0x41, 0x63, 0x77, 0x00, /* */ + 0x20, 0x50, 0x5A, 0x56, 0x2E, 0x00, /* */ + 0x06, 0x29, 0x79, 0x29, 0x06, 0x00, /* */ + 0x60, 0x60, 0x7F, 0x05, 0x07, 0x00, /* */ + 0x18, 0x1F, 0x01, 0x61, 0x7F, 0x00, /* */ + 0x15, 0x0E, 0x1B, 0x0E, 0x15, 0x00, /* */ +/* 0x10 */ + 0x00, 0x08, 0x1C, 0x3E, 0x08, 0x08, /* */ + 0x7F, 0x3E, 0x1C, 0x08, 0x00, 0x00, /* */ + 0x14, 0x36, 0x7F, 0x36, 0x14, 0x00, /* */ + 0x00, 0x5F, 0x00, 0x5F, 0x00, 0x00, /* */ + 0x02, 0x05, 0x7F, 0x01, 0x7F, 0x00, /* */ + 0x20, 0x4A, 0x55, 0x29, 0x02, 0x00, /* */ + 0x60, 0x60, 0x60, 0x60, 0x60, 0x00, /* */ + 0x54, 0x76, 0x7F, 0x76, 0x54, 0x00, /* */ +/* 0x18 */ + 0x08, 0x0C, 0x7E, 0x0C, 0x08, 0x00, /* */ + 0x10, 0x30, 0x7E, 0x30, 0x10, 0x00, /* */ + 0x08, 0x08, 0x3E, 0x1C, 0x08, 0x00, /* */ + 0x08, 0x1C, 0x3E, 0x08, 0x08, 0x00, /* */ + 0x1C, 0x10, 0x10, 0x10, 0x10, 0x00, /* */ + 0x08, 0x1C, 0x08, 0x1C, 0x08, 0x00, /* */ + 0x18, 0x1C, 0x1E, 0x1C, 0x18, 0x00, /* */ + 0x0C, 0x1C, 0x3C, 0x1C, 0x0C, 0x00, /* */ +/* 0x20 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ + 0x00, 0x00, 0x4F, 0x00, 0x00, 0x00, /* ! */ + 0x00, 0x07, 0x00, 0x07, 0x00, 0x00, /* " */ + 0x14, 0x7F, 0x14, 0x7F, 0x14, 0x00, /* # */ + 0x24, 0x2A, 0x7F, 0x2A, 0x12, 0x00, /* $ */ + 0x63, 0x13, 0x08, 0x64, 0x63, 0x00, /* % */ + 0x36, 0x49, 0x55, 0x22, 0x50, 0x00, /* & */ + 0x00, 0x05, 0x03, 0x00, 0x00, 0x00, /* ' */ +/* 0x28 */ + 0x00, 0x1C, 0x22, 0x41, 0x00, 0x00, /* ( */ + 0x00, 0x00, 0x41, 0x22, 0x1C, 0x00, /* ) */ + 0x14, 0x08, 0x3E, 0x08, 0x14, 0x00, /* * */ + 0x08, 0x08, 0x3E, 0x08, 0x08, 0x00, /* + */ + 0x00, 0x50, 0x30, 0x00, 0x00, 0x00, /* , */ + 0x08, 0x08, 0x08, 0x08, 0x08, 0x00, /* - */ + 0x00, 0x60, 0x60, 0x00, 0x00, 0x00, /* . */ + 0x20, 0x10, 0x08, 0x04, 0x02, 0x00, /* / */ +/* 0x30 */ + 0x3E, 0x51, 0x49, 0x45, 0x3E, 0x00, /* 0 */ + 0x00, 0x42, 0x7F, 0x40, 0x00, 0x00, /* 1 */ + 0x62, 0x51, 0x49, 0x49, 0x46, 0x00, /* 2 */ + 0x21, 0x41, 0x45, 0x4B, 0x31, 0x00, /* 3 */ + 0x18, 0x14, 0x12, 0x7F, 0x10, 0x00, /* 4 */ + 0x27, 0x45, 0x45, 0x45, 0x39, 0x00, /* 5 */ + 0x3C, 0x4A, 0x49, 0x49, 0x30, 0x00, /* 6 */ + 0x01, 0x71, 0x09, 0x05, 0x03, 0x00, /* 7 */ +/* 0x38 */ + 0x36, 0x49, 0x49, 0x49, 0x36, 0x00, /* 8 */ + 0x06, 0x49, 0x49, 0x29, 0x1E, 0x00, /* 9 */ + 0x00, 0x36, 0x36, 0x00, 0x00, 0x00, /* : */ + 0x00, 0x56, 0x36, 0x00, 0x00, 0x00, /* ; */ + 0x08, 0x14, 0x22, 0x41, 0x00, 0x00, /* < */ + 0x14, 0x14, 0x14, 0x14, 0x14, 0x00, /* = */ + 0x00, 0x41, 0x22, 0x14, 0x08, 0x00, /* > */ + 0x02, 0x01, 0x51, 0x09, 0x06, 0x00, /* ? */ +/* 0x40 */ + 0x32, 0x49, 0x79, 0x41, 0x3E, 0x00, /* @ */ + 0x7E, 0x09, 0x09, 0x09, 0x7E, 0x00, /* A */ + 0x7F, 0x49, 0x49, 0x49, 0x36, 0x00, /* B */ + 0x3E, 0x41, 0x41, 0x41, 0x22, 0x00, /* C */ + 0x7F, 0x41, 0x41, 0x22, 0x1C, 0x00, /* D */ + 0x7F, 0x49, 0x49, 0x49, 0x41, 0x00, /* E */ + 0x7F, 0x09, 0x09, 0x09, 0x01, 0x00, /* F */ + 0x3E, 0x41, 0x49, 0x49, 0x7A, 0x00, /* G */ +/* 0x48 */ + 0x7F, 0x08, 0x08, 0x08, 0x7F, 0x00, /* H */ + 0x00, 0x41, 0x7F, 0x41, 0x00, 0x00, /* I */ + 0x20, 0x40, 0x41, 0x3F, 0x01, 0x00, /* J */ + 0x7F, 0x08, 0x14, 0x22, 0x41, 0x00, /* K */ + 0x7F, 0x40, 0x40, 0x40, 0x40, 0x00, /* L */ + 0x7F, 0x02, 0x0C, 0x02, 0x7F, 0x00, /* M */ + 0x7F, 0x04, 0x08, 0x10, 0x7F, 0x00, /* N */ + 0x3E, 0x41, 0x41, 0x41, 0x3E, 0x00, /* O */ +/* 0x50 */ + 0x7F, 0x09, 0x09, 0x09, 0x06, 0x00, /* P */ + 0x3E, 0x41, 0x51, 0x21, 0x5E, 0x00, /* Q */ + 0x7F, 0x09, 0x19, 0x29, 0x46, 0x00, /* R */ + 0x26, 0x49, 0x49, 0x49, 0x32, 0x00, /* S */ + 0x01, 0x01, 0x7F, 0x01, 0x01, 0x00, /* T */ + 0x3F, 0x40, 0x40, 0x40, 0x3F, 0x00, /* U */ + 0x1F, 0x20, 0x40, 0x20, 0x1F, 0x00, /* V */ + 0x3F, 0x40, 0x38, 0x40, 0x3F, 0x00, /* W */ +/* 0x58 */ + 0x63, 0x14, 0x08, 0x14, 0x63, 0x00, /* X */ + 0x07, 0x08, 0x70, 0x08, 0x07, 0x00, /* Y */ + 0x61, 0x51, 0x49, 0x45, 0x43, 0x00, /* Z */ + 0x00, 0x7F, 0x41, 0x41, 0x00, 0x00, /* [ */ + 0x02, 0x04, 0x08, 0x10, 0x20, 0x00, /* \ */ + 0x00, 0x41, 0x41, 0x7F, 0x00, 0x00, /* ] */ + 0x04, 0x02, 0x01, 0x02, 0x04, 0x00, /* ^ */ + 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, /* _ */ +/* 0x60 */ + 0x00, 0x01, 0x02, 0x04, 0x00, 0x00, /* ` */ + 0x00, 0x74, 0x54, 0x54, 0x78, 0x00, /* a */ + 0x7F, 0x44, 0x44, 0x44, 0x38, 0x00, /* b */ + 0x38, 0x44, 0x44, 0x44, 0x28, 0x00, /* c */ + 0x38, 0x44, 0x44, 0x44, 0x7F, 0x00, /* d */ + 0x38, 0x54, 0x54, 0x54, 0x18, 0x00, /* e */ + 0x08, 0x7E, 0x09, 0x01, 0x02, 0x00, /* f */ + 0x08, 0x54, 0x54, 0x54, 0x3C, 0x00, /* g */ +/* 0x68 */ + 0x7F, 0x04, 0x04, 0x04, 0x78, 0x00, /* h */ + 0x00, 0x44, 0x7D, 0x40, 0x00, 0x00, /* i */ + 0x20, 0x40, 0x44, 0x3D, 0x00, 0x00, /* j */ + 0x7F, 0x10, 0x28, 0x44, 0x00, 0x00, /* k */ + 0x00, 0x41, 0x7F, 0x40, 0x00, 0x00, /* l */ + 0x7C, 0x04, 0x18, 0x04, 0x78, 0x00, /* m */ + 0x7C, 0x08, 0x04, 0x04, 0x78, 0x00, /* n */ + 0x38, 0x44, 0x44, 0x44, 0x38, 0x00, /* o */ +/* 0x70 */ + 0x7C, 0x14, 0x14, 0x14, 0x08, 0x00, /* p */ + 0x08, 0x14, 0x14, 0x14, 0x7C, 0x00, /* q */ + 0x7C, 0x08, 0x04, 0x04, 0x08, 0x00, /* r */ + 0x48, 0x54, 0x54, 0x54, 0x24, 0x00, /* s */ + 0x04, 0x3F, 0x44, 0x40, 0x20, 0x00, /* t */ + 0x3C, 0x40, 0x40, 0x20, 0x7C, 0x00, /* u */ + 0x1C, 0x20, 0x40, 0x20, 0x1C, 0x00, /* v */ + 0x3C, 0x40, 0x30, 0x40, 0x3C, 0x00, /* w */ +/* 0x78 */ + 0x44, 0x28, 0x10, 0x28, 0x44, 0x00, /* x */ + 0x0C, 0x50, 0x50, 0x50, 0x3C, 0x00, /* y */ + 0x44, 0x64, 0x54, 0x4C, 0x44, 0x00, /* z */ + 0x00, 0x08, 0x36, 0x41, 0x00, 0x00, /* { */ + 0x00, 0x00, 0x77, 0x00, 0x00, 0x00, /* | */ + 0x00, 0x41, 0x36, 0x08, 0x00, 0x00, /* } */ + 0x02, 0x01, 0x02, 0x01, 0x00, 0x00, /* ~ */ + 0x70, 0x48, 0x44, 0x48, 0x70, 0x00, /*  */ +/* 0x80 */ + 0x38, 0xC4, 0xC4, 0x44, 0x28, 0x00, /* € */ + 0x3A, 0x40, 0x40, 0x20, 0x7A, 0x00, /* */ + 0x38, 0x54, 0x54, 0x55, 0x19, 0x00, /* ‚ */ + 0x22, 0x55, 0x55, 0x55, 0x78, 0x00, /* ƒ */ + 0x20, 0x55, 0x54, 0x54, 0x79, 0x00, /* „ */ + 0x21, 0x75, 0x55, 0x54, 0x78, 0x00, /* … */ + 0x20, 0x74, 0x57, 0x54, 0x78, 0x00, /* † */ + 0x08, 0x54, 0x54, 0x74, 0x14, 0x00, /* ‡ */ +/* 0x88 */ + 0x3A, 0x55, 0x55, 0x55, 0x1A, 0x00, /* ˆ */ + 0x39, 0x54, 0x54, 0x55, 0x18, 0x00, /* ‰ */ + 0x39, 0x55, 0x55, 0x54, 0x18, 0x00, /* Š */ + 0x00, 0x45, 0x7C, 0x41, 0x00, 0x00, /* ‹ */ + 0x02, 0x45, 0x7D, 0x42, 0x00, 0x00, /* Œ */ + 0x01, 0x45, 0x7D, 0x40, 0x00, 0x00, /* */ + 0x79, 0x14, 0x12, 0x14, 0x79, 0x00, /* Ž */ + 0x70, 0x2B, 0x2B, 0x2B, 0x70, 0x00, /* */ +/* 0x90 */ + 0x7C, 0x54, 0x55, 0x55, 0x45, 0x00, /* */ + 0x20, 0x54, 0x38, 0x54, 0x48, 0x00, /* ‘ */ + 0x7E, 0x09, 0x7F, 0x49, 0x49, 0x00, /* ’ */ + 0x32, 0x49, 0x49, 0x49, 0x32, 0x00, /* “ */ + 0x32, 0x48, 0x48, 0x48, 0x32, 0x00, /* ” */ + 0x32, 0x4A, 0x4A, 0x48, 0x30, 0x00, /* • */ + 0x3A, 0x41, 0x41, 0x21, 0x7A, 0x00, /* – */ + 0x3A, 0x42, 0x42, 0x20, 0x78, 0x00, /* — */ +/* 0x98 */ + 0x0D, 0x50, 0x50, 0x50, 0x3D, 0x00, /* ˜ */ + 0x19, 0x24, 0x42, 0x24, 0x19, 0x00, /* ™ */ + 0x3D, 0x40, 0x40, 0x40, 0x3D, 0x00, /* š */ + 0x18, 0x24, 0x7E, 0x24, 0x24, 0x00, /* › */ + 0x28, 0x5E, 0x29, 0x42, 0x20, 0x00, /* œ */ + 0x09, 0x2A, 0x7C, 0x2A, 0x09, 0x00, /* */ + 0x7F, 0x05, 0x15, 0x3D, 0x52, 0x00, /* ž */ + 0x20, 0x48, 0x3E, 0x09, 0x02, 0x00, /* Ÿ */ +/* 0xa0 */ + 0x20, 0x74, 0x55, 0x55, 0x79, 0x00, /*   */ + 0x01, 0x45, 0x7D, 0x40, 0x00, 0x00, /* ¡ */ + 0x30, 0x48, 0x4A, 0x4A, 0x32, 0x00, /* ¢ */ + 0x38, 0x40, 0x42, 0x22, 0x7A, 0x00, /* £ */ + 0x7A, 0x12, 0x0A, 0x0A, 0x72, 0x00, /* ¤ */ + 0x7D, 0x09, 0x11, 0x21, 0x7D, 0x00, /* ¥ */ + 0x02, 0x15, 0x15, 0x12, 0x04, 0x00, /* ¦ */ + 0x02, 0x15, 0x15, 0x15, 0x02, 0x00, /* § */ +/* 0xa8 */ + 0x30, 0x48, 0x45, 0x40, 0x20, 0x00, /* ¨ */ + 0x00, 0x38, 0x08, 0x08, 0x08, 0x00, /* © */ + 0x00, 0x08, 0x08, 0x08, 0x38, 0x00, /* ª */ + 0x0B, 0x04, 0x6A, 0x55, 0x48, 0x00, /* « */ + 0x0B, 0x24, 0x32, 0x79, 0x20, 0x00, /* ¬ */ + 0x00, 0x00, 0x79, 0x00, 0x00, 0x00, /* ­ */ + 0x08, 0x14, 0x2A, 0x14, 0x22, 0x00, /* ® */ + 0x22, 0x14, 0x2A, 0x14, 0x08, 0x00, /* ¯ */ +/* 0xb0 */ + 0x2A, 0x55, 0x00, 0x2A, 0x55, 0x00, /* ° */ + 0x2A, 0x55, 0x2A, 0x55, 0x2A, 0x55, /* ± */ + 0x55, 0x2A, 0x7F, 0x55, 0x2A, 0x7F, /* ² */ + 0x00, 0x00, 0xFF, 0x00, 0x00, 0x00, /* ³ */ + 0x08, 0x08, 0xFF, 0x00, 0x00, 0x00, /* ´ */ + 0x14, 0x14, 0xFF, 0x00, 0x00, 0x00, /* µ */ + 0x08, 0xFF, 0x00, 0xFF, 0x00, 0x00, /* ¶ */ + 0x08, 0xF8, 0x08, 0xF8, 0x00, 0x00, /* · */ +/* 0xb8 */ + 0x14, 0x14, 0xFC, 0x00, 0x00, 0x00, /* ¸ */ + 0x14, 0xF7, 0x00, 0xFF, 0x00, 0x00, /* ¹ */ + 0x00, 0xFF, 0x00, 0xFF, 0x00, 0x00, /* º */ + 0x14, 0xF4, 0x04, 0xFC, 0x00, 0x00, /* » */ + 0x14, 0x17, 0x10, 0x1F, 0x00, 0x00, /* ¼ */ + 0x08, 0x0F, 0x08, 0x0F, 0x00, 0x00, /* ½ */ + 0x14, 0x14, 0x1F, 0x00, 0x00, 0x00, /* ¾ */ + 0x08, 0x08, 0xF8, 0x00, 0x00, 0x00, /* ¿ */ +/* 0xc0 */ + 0x00, 0x00, 0x0F, 0x08, 0x08, 0x08, /* À */ + 0x08, 0x08, 0x0F, 0x08, 0x08, 0x08, /* Á */ + 0x08, 0x08, 0xF8, 0x08, 0x08, 0x08, /*  */ + 0x00, 0x00, 0xFF, 0x08, 0x08, 0x08, /* à */ + 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, /* Ä */ + 0x08, 0x08, 0xFF, 0x08, 0x08, 0x08, /* Å */ + 0x00, 0x00, 0xFF, 0x14, 0x14, 0x14, /* Æ */ + 0x00, 0xFF, 0x00, 0xFF, 0x08, 0x08, /* Ç */ +/* 0xc8 */ + 0x00, 0x1F, 0x10, 0x17, 0x14, 0x14, /* È */ + 0x00, 0xFC, 0x04, 0xF4, 0x14, 0x14, /* É */ + 0x28, 0x2F, 0x20, 0x2F, 0x28, 0x28, /* Ê */ + 0x14, 0xF4, 0x04, 0xF4, 0x14, 0x14, /* Ë */ + 0x00, 0xFF, 0x00, 0xF7, 0x14, 0x14, /* Ì */ + 0x14, 0x14, 0x14, 0x14, 0x14, 0x14, /* Í */ + 0x14, 0xF7, 0x00, 0xF7, 0x14, 0x14, /* Î */ + 0x14, 0x14, 0xF7, 0x14, 0x14, 0x14, /* Ï */ +/* 0xd0 */ + 0x08, 0x0F, 0x08, 0x0F, 0x08, 0x08, /* Ð */ + 0x14, 0x14, 0xF4, 0x14, 0x14, 0x14, /* Ñ */ + 0x08, 0x08, 0xF8, 0x08, 0x08, 0x08, /* Ò */ + 0x08, 0x0F, 0x08, 0x0F, 0x08, 0x08, /* Ó */ + 0x00, 0x00, 0x1F, 0x14, 0x14, 0x14, /* Ô */ + 0x00, 0x00, 0xFC, 0x14, 0x14, 0x14, /* Õ */ + 0x00, 0xF8, 0x08, 0xF8, 0x08, 0x08, /* Ö */ + 0x08, 0xFF, 0x08, 0xFF, 0x08, 0x08, /* × */ +/* 0xd8 */ + 0x14, 0x14, 0xFF, 0x14, 0x14, 0x14, /* Ø */ + 0x08, 0x08, 0x0F, 0x00, 0x00, 0x00, /* Ù */ + 0x00, 0x00, 0xF8, 0x08, 0x08, 0x08, /* Ú */ + 0x7F, 0x7F, 0x7F, 0x7F, 0x7F, 0x00, /* Û */ + 0x70, 0x70, 0x70, 0x70, 0x70, 0x00, /* Ü */ + 0x7F, 0x7F, 0x7F, 0x00, 0x00, 0x00, /* Ý */ + 0x00, 0x00, 0x00, 0x7F, 0x7F, 0x00, /* Þ */ + 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x00, /* ß */ +/* 0xe0 */ + 0x30, 0x48, 0x48, 0x30, 0x48, 0x00, /* à */ + 0x7E, 0x11, 0x25, 0x25, 0x1A, 0x00, /* á */ + 0x7E, 0x02, 0x02, 0x02, 0x06, 0x00, /* â */ + 0x04, 0x7C, 0x04, 0x7C, 0x04, 0x00, /* ã */ + 0x41, 0x63, 0x55, 0x49, 0x63, 0x00, /* ä */ + 0x3C, 0x42, 0x4A, 0x4A, 0x31, 0x00, /* å */ + 0x40, 0x7C, 0x20, 0x20, 0x1C, 0x00, /* æ */ + 0x08, 0x04, 0x7C, 0x08, 0x04, 0x00, /* ç */ +/* 0xe8 */ + 0x49, 0x55, 0x77, 0x55, 0x49, 0x00, /* è */ + 0x1C, 0x2A, 0x49, 0x2A, 0x1C, 0x00, /* é */ + 0x4C, 0x72, 0x02, 0x72, 0x4C, 0x00, /* ê */ + 0x30, 0x4A, 0x45, 0x49, 0x31, 0x00, /* ë */ + 0x18, 0x24, 0x18, 0x24, 0x18, 0x00, /* ì */ + 0x5C, 0x72, 0x2A, 0x27, 0x1D, 0x00, /* í */ + 0x1C, 0x2A, 0x49, 0x49, 0x00, 0x00, /* î */ + 0x7E, 0x01, 0x01, 0x01, 0x7E, 0x00, /* ï */ +/* 0xf0 */ + 0x2A, 0x2A, 0x2A, 0x2A, 0x2A, 0x00, /* ð */ + 0x24, 0x24, 0x2E, 0x24, 0x24, 0x00, /* ñ */ + 0x40, 0x51, 0x4A, 0x44, 0x00, 0x00, /* ò */ + 0x44, 0x4A, 0x51, 0x40, 0x00, 0x00, /* ó */ + 0x00, 0x00, 0xFE, 0x01, 0x02, 0x00, /* ô */ + 0x20, 0x40, 0x3F, 0x00, 0x00, 0x00, /* õ */ + 0x08, 0x08, 0x2A, 0x08, 0x08, 0x00, /* ö */ + 0x24, 0x12, 0x24, 0x12, 0x00, 0x00, /* ÷ */ +/* 0xf8 */ + 0x06, 0x09, 0x09, 0x09, 0x06, 0x00, /* ø */ + 0x00, 0x18, 0x18, 0x00, 0x00, 0x00, /* ù */ + 0x00, 0x10, 0x10, 0x00, 0x00, 0x00, /* ú */ + 0x10, 0x30, 0x7F, 0x01, 0x01, 0x00, /* û */ + 0x01, 0x0E, 0x01, 0x01, 0x0E, 0x00, /* ü */ + 0x0A, 0x09, 0x0D, 0x0A, 0x00, 0x00, /* ý */ + 0x1E, 0x1E, 0x1E, 0x1E, 0x1E, 0x00, /* þ */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* ÿ */ +}; + + +#ifndef default_font +struct Font default_font = +{ + /* .glyph = */ default_font_glyphs, + /* .width = */ 6, + /* .height = */ 8 +}; + +#endif diff --git a/bertos/fonts/fonts.mk b/bertos/fonts/fonts.mk new file mode 100644 index 0000000..5c7cae6 --- /dev/null +++ b/bertos/fonts/fonts.mk @@ -0,0 +1,12 @@ +# +# $Id: fonts.mk 1532 2008-08-04 07:21:26Z bernie $ +# Copyright 2003, 2004, 2005, 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Makefile fragment for DevLib demo application. +# +# Author: Bernie Innocenti +# + +%.c: %.bdf + bertos/fonts/convbdf $< > $@ diff --git a/bertos/fonts/gohu.bdf b/bertos/fonts/gohu.bdf new file mode 100644 index 0000000..2e75783 --- /dev/null +++ b/bertos/fonts/gohu.bdf @@ -0,0 +1,2714 @@ +STARTFONT 2.1 +COMMENT "Copyright by Hugo Chargois" +COMMENT "Licensed under the WTFPL" +FONT -Gohu-GohuFont-Medium-R-Normal--11-80-100-100-C-60-ISO8859-1 +SIZE 11 100 100 +FONTBOUNDINGBOX 6 11 0 -2 +STARTPROPERTIES 30 +FOUNDRY "Gohu" +FAMILY_NAME "GohuFont" +WEIGHT_NAME "Medium" +SLANT "R" +SETWIDTH_NAME "Normal" +ADD_STYLE_NAME "" +PIXEL_SIZE 11 +POINT_SIZE 80 +RESOLUTION_X 100 +RESOLUTION_Y 100 +SPACING "C" +AVERAGE_WIDTH 60 +CHARSET_REGISTRY "ISO8859" +CHARSET_ENCODING "1" +FONTNAME_REGISTRY "" +FONT_NAME "GohuFont" +FACE_NAME "GohuFont" +FONT_VERSION "003.000" +FONT_ASCENT 9 +FONT_DESCENT 2 +UNDERLINE_POSITION -1 +UNDERLINE_THICKNESS 1 +X_HEIGHT 4 +CAP_HEIGHT 7 +RAW_ASCENT 818 +RAW_DESCENT 182 +NORM_SPACE 6 +FIGURE_WIDTH 6 +AVG_LOWERCASE_WIDTH 60 +AVG_UPPERCASE_WIDTH "60" +ENDPROPERTIES +CHARS 191 +STARTCHAR SPACE +ENCODING 32 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 0 0 0 0 +BITMAP +ENDCHAR +STARTCHAR EXCLAMATION MARK +ENCODING 33 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 8 2 0 +BITMAP +80 +80 +80 +80 +80 +80 +00 +80 +ENDCHAR +STARTCHAR QUOTATION MARK +ENCODING 34 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 3 1 5 +BITMAP +A0 +A0 +A0 +ENDCHAR +STARTCHAR NUMBER SIGN +ENCODING 35 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 1 +BITMAP +50 +50 +F8 +50 +F8 +50 +50 +ENDCHAR +STARTCHAR DOLLAR SIGN +ENCODING 36 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +20 +70 +A8 +A0 +70 +28 +A8 +70 +20 +ENDCHAR +STARTCHAR PERCENT SIGN +ENCODING 37 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +48 +A8 +50 +20 +50 +A8 +90 +ENDCHAR +STARTCHAR AMPERSAND +ENCODING 38 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +60 +90 +A0 +40 +A8 +90 +68 +ENDCHAR +STARTCHAR APOSTROPHE +ENCODING 39 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 3 2 5 +BITMAP +80 +80 +80 +ENDCHAR +STARTCHAR LEFT PARENTHESIS +ENCODING 40 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 -1 +BITMAP +20 +40 +40 +80 +80 +80 +40 +40 +20 +ENDCHAR +STARTCHAR RIGHT PARENTHESIS +ENCODING 41 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 -1 +BITMAP +80 +40 +40 +20 +20 +20 +40 +40 +80 +ENDCHAR +STARTCHAR ASTERISK +ENCODING 42 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 1 +BITMAP +20 +A8 +70 +A8 +20 +ENDCHAR +STARTCHAR PLUS SIGN +ENCODING 43 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 1 +BITMAP +20 +20 +F8 +20 +20 +ENDCHAR +STARTCHAR COMMA +ENCODING 44 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 4 1 -2 +BITMAP +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR HYPHEN-MINUS +ENCODING 45 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 1 0 3 +BITMAP +F8 +ENDCHAR +STARTCHAR FULL STOP +ENCODING 46 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 2 1 0 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR SOLIDUS +ENCODING 47 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 10 0 -2 +BITMAP +08 +08 +10 +10 +20 +20 +40 +40 +80 +80 +ENDCHAR +STARTCHAR DIGIT ZERO +ENCODING 48 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +98 +A8 +C8 +88 +70 +ENDCHAR +STARTCHAR DIGIT ONE +ENCODING 49 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 7 0 0 +BITMAP +20 +60 +A0 +20 +20 +20 +20 +ENDCHAR +STARTCHAR DIGIT TWO +ENCODING 50 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +08 +10 +20 +40 +F8 +ENDCHAR +STARTCHAR DIGIT THREE +ENCODING 51 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +08 +30 +08 +88 +70 +ENDCHAR +STARTCHAR DIGIT FOUR +ENCODING 52 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +10 +30 +50 +90 +F8 +10 +10 +ENDCHAR +STARTCHAR DIGIT FIVE +ENCODING 53 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +F8 +80 +F0 +08 +08 +88 +70 +ENDCHAR +STARTCHAR DIGIT SIX +ENCODING 54 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +80 +F0 +88 +88 +88 +70 +ENDCHAR +STARTCHAR DIGIT SEVEN +ENCODING 55 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +F8 +08 +10 +10 +20 +20 +20 +ENDCHAR +STARTCHAR DIGIT EIGHT +ENCODING 56 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +88 +70 +88 +88 +70 +ENDCHAR +STARTCHAR DIGIT NINE +ENCODING 57 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +88 +78 +08 +08 +70 +ENDCHAR +STARTCHAR COLON +ENCODING 58 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 5 2 0 +BITMAP +C0 +C0 +00 +C0 +C0 +ENDCHAR +STARTCHAR SEMICOLON +ENCODING 59 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 7 1 -2 +BITMAP +C0 +C0 +00 +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR LESS-THAN SIGN +ENCODING 60 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 7 1 0 +BITMAP +10 +20 +40 +80 +40 +20 +10 +ENDCHAR +STARTCHAR EQUALS SIGN +ENCODING 61 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 3 0 2 +BITMAP +F8 +00 +F8 +ENDCHAR +STARTCHAR GREATER-THAN SIGN +ENCODING 62 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 7 1 0 +BITMAP +80 +40 +20 +10 +20 +40 +80 +ENDCHAR +STARTCHAR QUESTION MARK +ENCODING 63 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +08 +10 +20 +00 +20 +ENDCHAR +STARTCHAR COMMERCIAL AT +ENCODING 64 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +B8 +A8 +B8 +80 +78 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A +ENCODING 65 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +88 +F8 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER B +ENCODING 66 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F0 +88 +88 +F0 +88 +88 +88 +F0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER C +ENCODING 67 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +80 +80 +80 +80 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER D +ENCODING 68 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F0 +88 +88 +88 +88 +88 +88 +F0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E +ENCODING 69 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +80 +80 +F0 +80 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER F +ENCODING 70 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +80 +80 +F0 +80 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER G +ENCODING 71 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +80 +B8 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER H +ENCODING 72 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +88 +F8 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I +ENCODING 73 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 8 1 0 +BITMAP +E0 +40 +40 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER J +ENCODING 74 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +08 +08 +08 +08 +08 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER K +ENCODING 75 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +90 +A0 +C0 +A0 +90 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER L +ENCODING 76 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +80 +80 +80 +80 +80 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER M +ENCODING 77 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +D8 +A8 +A8 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER N +ENCODING 78 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +C8 +C8 +A8 +A8 +98 +98 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O +ENCODING 79 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER P +ENCODING 80 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F0 +88 +88 +F0 +80 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER Q +ENCODING 81 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +70 +88 +88 +88 +88 +A8 +90 +68 +08 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER R +ENCODING 82 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F0 +88 +88 +F0 +90 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER S +ENCODING 83 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +88 +80 +70 +08 +08 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER T +ENCODING 84 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +20 +20 +20 +20 +20 +20 +20 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U +ENCODING 85 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER V +ENCODING 86 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +88 +88 +50 +50 +20 +20 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER W +ENCODING 87 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +88 +A8 +A8 +A8 +50 +50 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER X +ENCODING 88 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +50 +20 +50 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER Y +ENCODING 89 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +88 +88 +50 +20 +20 +20 +20 +20 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER Z +ENCODING 90 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +08 +10 +20 +40 +80 +80 +F8 +ENDCHAR +STARTCHAR LEFT SQUARE BRACKET +ENCODING 91 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 2 -1 +BITMAP +E0 +80 +80 +80 +80 +80 +80 +80 +E0 +ENDCHAR +STARTCHAR REVERSE SOLIDUS +ENCODING 92 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 10 1 -2 +BITMAP +80 +80 +40 +40 +20 +20 +10 +10 +08 +08 +ENDCHAR +STARTCHAR RIGHT SQUARE BRACKET +ENCODING 93 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 0 -1 +BITMAP +E0 +20 +20 +20 +20 +20 +20 +20 +E0 +ENDCHAR +STARTCHAR CIRCUMFLEX ACCENT +ENCODING 94 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 3 0 4 +BITMAP +20 +50 +88 +ENDCHAR +STARTCHAR LOW LINE +ENCODING 95 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 1 0 -1 +BITMAP +FC +ENDCHAR +STARTCHAR GRAVE ACCENT +ENCODING 96 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 3 1 5 +BITMAP +80 +40 +20 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A +ENCODING 97 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER B +ENCODING 98 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +80 +80 +80 +B0 +C8 +88 +88 +F0 +ENDCHAR +STARTCHAR LATIN SMALL LETTER C +ENCODING 99 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +78 +80 +80 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER D +ENCODING 100 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +08 +08 +08 +78 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E +ENCODING 101 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER F +ENCODING 102 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 8 1 0 +BITMAP +60 +80 +80 +E0 +80 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER G +ENCODING 103 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +78 +88 +88 +98 +68 +08 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER H +ENCODING 104 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +80 +80 +80 +B0 +C8 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I +ENCODING 105 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 7 1 0 +BITMAP +40 +00 +C0 +40 +40 +40 +60 +ENDCHAR +STARTCHAR LATIN SMALL LETTER J +ENCODING 106 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 0 -2 +BITMAP +20 +00 +60 +20 +20 +20 +20 +20 +C0 +ENDCHAR +STARTCHAR LATIN SMALL LETTER K +ENCODING 107 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +80 +80 +80 +90 +A0 +E0 +90 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER L +ENCODING 108 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 8 1 0 +BITMAP +C0 +40 +40 +40 +40 +40 +40 +30 +ENDCHAR +STARTCHAR LATIN SMALL LETTER M +ENCODING 109 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +F0 +A8 +A8 +A8 +A8 +ENDCHAR +STARTCHAR LATIN SMALL LETTER N +ENCODING 110 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +F0 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O +ENCODING 111 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER P +ENCODING 112 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +B0 +C8 +88 +88 +F0 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Q +ENCODING 113 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +78 +88 +88 +98 +68 +08 +08 +ENDCHAR +STARTCHAR LATIN SMALL LETTER R +ENCODING 114 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +B0 +C8 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER S +ENCODING 115 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +80 +70 +08 +F0 +ENDCHAR +STARTCHAR LATIN SMALL LETTER T +ENCODING 116 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 8 0 0 +BITMAP +40 +40 +40 +F0 +40 +40 +40 +30 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U +ENCODING 117 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER V +ENCODING 118 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +88 +50 +50 +20 +ENDCHAR +STARTCHAR LATIN SMALL LETTER W +ENCODING 119 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +A8 +A8 +A8 +50 +ENDCHAR +STARTCHAR LATIN SMALL LETTER X +ENCODING 120 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +50 +20 +50 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Y +ENCODING 121 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +88 +88 +88 +98 +68 +08 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Z +ENCODING 122 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +F8 +10 +20 +40 +F8 +ENDCHAR +STARTCHAR LEFT CURLY BRACKET +ENCODING 123 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 11 0 -2 +BITMAP +18 +20 +20 +20 +20 +C0 +20 +20 +20 +20 +18 +ENDCHAR +STARTCHAR VERTICAL LINE +ENCODING 124 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 9 2 -1 +BITMAP +80 +80 +80 +80 +80 +80 +80 +80 +80 +ENDCHAR +STARTCHAR RIGHT CURLY BRACKET +ENCODING 125 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 11 0 -2 +BITMAP +C0 +20 +20 +20 +20 +18 +20 +20 +20 +20 +C0 +ENDCHAR +STARTCHAR TILDE +ENCODING 126 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 3 0 2 +BITMAP +40 +A8 +10 +ENDCHAR +STARTCHAR NO-BREAK SPACE +ENCODING 160 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 0 0 0 0 +BITMAP +ENDCHAR +STARTCHAR INVERTED EXCLAMATION MARK +ENCODING 161 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 8 2 0 +BITMAP +80 +00 +80 +80 +80 +80 +80 +80 +ENDCHAR +STARTCHAR CENT SIGN +ENCODING 162 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -1 +BITMAP +20 +78 +A0 +A0 +A0 +78 +20 +ENDCHAR +STARTCHAR POUND SIGN +ENCODING 163 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +30 +48 +40 +40 +E0 +40 +48 +B0 +ENDCHAR +STARTCHAR CURRENCY SIGN +ENCODING 164 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +88 +70 +50 +70 +88 +ENDCHAR +STARTCHAR YEN SIGN +ENCODING 165 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +88 +88 +50 +20 +F8 +20 +F8 +20 +20 +ENDCHAR +STARTCHAR BROKEN BAR +ENCODING 166 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 9 2 -1 +BITMAP +80 +80 +80 +80 +00 +80 +80 +80 +80 +ENDCHAR +STARTCHAR SECTION SIGN +ENCODING 167 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 9 1 -1 +BITMAP +70 +80 +80 +E0 +90 +70 +10 +10 +E0 +ENDCHAR +STARTCHAR DIAERESIS +ENCODING 168 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 1 1 7 +BITMAP +A0 +ENDCHAR +STARTCHAR COPYRIGHT SIGN +ENCODING 169 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +A8 +C8 +A8 +88 +70 +ENDCHAR +STARTCHAR FEMININE ORDINAL INDICATOR +ENCODING 170 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 6 1 1 +BITMAP +70 +90 +B0 +50 +00 +F0 +ENDCHAR +STARTCHAR LEFT-POINTING DOUBLE ANGLE QUOTATION MARK +ENCODING 171 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 5 0 1 +BITMAP +24 +48 +90 +48 +24 +ENDCHAR +STARTCHAR NOT SIGN +ENCODING 172 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 2 1 2 +BITMAP +F0 +10 +ENDCHAR +STARTCHAR SOFT HYPHEN +ENCODING 173 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 1 1 3 +BITMAP +F0 +ENDCHAR +STARTCHAR REGISTERED SIGN +ENCODING 174 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +88 +E8 +C8 +C8 +88 +70 +ENDCHAR +STARTCHAR MACRON +ENCODING 175 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 1 0 7 +BITMAP +F8 +ENDCHAR +STARTCHAR DEGREE SIGN +ENCODING 176 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 3 1 4 +BITMAP +40 +A0 +40 +ENDCHAR +STARTCHAR PLUS-MINUS SIGN +ENCODING 177 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 6 0 0 +BITMAP +20 +20 +F8 +20 +20 +F8 +ENDCHAR +STARTCHAR SUPERSCRIPT TWO +ENCODING 178 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 5 1 3 +BITMAP +60 +90 +20 +40 +F0 +ENDCHAR +STARTCHAR SUPERSCRIPT THREE +ENCODING 179 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 5 1 3 +BITMAP +E0 +10 +60 +10 +E0 +ENDCHAR +STARTCHAR ACUTE ACCENT +ENCODING 180 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 2 2 6 +BITMAP +40 +80 +ENDCHAR +STARTCHAR MICRO SIGN +ENCODING 181 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 6 0 -1 +BITMAP +88 +88 +88 +C8 +B0 +80 +ENDCHAR +STARTCHAR PILCROW SIGN +ENCODING 182 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +78 +E8 +E8 +68 +28 +28 +28 +ENDCHAR +STARTCHAR MIDDLE DOT +ENCODING 183 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 1 1 2 3 +BITMAP +80 +ENDCHAR +STARTCHAR CEDILLA +ENCODING 184 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 2 2 -2 +BITMAP +40 +80 +ENDCHAR +STARTCHAR SUPERSCRIPT ONE +ENCODING 185 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 5 1 3 +BITMAP +40 +C0 +40 +40 +E0 +ENDCHAR +STARTCHAR MASCULINE ORDINAL INDICATOR +ENCODING 186 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 4 6 1 1 +BITMAP +60 +90 +90 +60 +00 +F0 +ENDCHAR +STARTCHAR RIGHT-POINTING DOUBLE ANGLE QUOTATION MARK +ENCODING 187 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 5 0 1 +BITMAP +90 +48 +24 +48 +90 +ENDCHAR +STARTCHAR VULGAR FRACTION ONE QUARTER +ENCODING 188 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 9 0 -1 +BITMAP +40 +C0 +40 +40 +E4 +0C +14 +3C +04 +ENDCHAR +STARTCHAR VULGAR FRACTION ONE HALF +ENCODING 189 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 9 0 -1 +BITMAP +40 +C0 +40 +40 +E8 +14 +04 +08 +1C +ENDCHAR +STARTCHAR VULGAR FRACTION THREE QUARTERS +ENCODING 190 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +C0 +20 +40 +20 +C8 +18 +28 +78 +08 +ENDCHAR +STARTCHAR INVERTED QUESTION MARK +ENCODING 191 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +20 +00 +20 +40 +80 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH GRAVE +ENCODING 192 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +70 +88 +88 +F8 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH ACUTE +ENCODING 193 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +70 +88 +88 +F8 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH CIRCUMFLEX +ENCODING 194 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +00 +70 +88 +88 +F8 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH TILDE +ENCODING 195 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +68 +B0 +00 +70 +88 +88 +F8 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH DIAERESIS +ENCODING 196 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +00 +70 +88 +88 +F8 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER A WITH RING ABOVE +ENCODING 197 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +20 +70 +88 +88 +F8 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER AE +ENCODING 198 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +78 +A0 +A0 +F0 +A0 +A0 +B8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER C WITH CEDILLA +ENCODING 199 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -2 +BITMAP +70 +88 +80 +80 +80 +88 +70 +20 +40 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E WITH GRAVE +ENCODING 200 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +F8 +80 +80 +F0 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E WITH ACUTE +ENCODING 201 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +F8 +80 +80 +F0 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E WITH CIRCUMFLEX +ENCODING 202 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +F8 +80 +80 +F0 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER E WITH DIAERESIS +ENCODING 203 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +00 +F8 +80 +80 +F0 +80 +80 +F8 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I WITH GRAVE +ENCODING 204 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 0 +BITMAP +40 +20 +00 +E0 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I WITH ACUTE +ENCODING 205 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 0 +BITMAP +40 +80 +00 +E0 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I WITH CIRCUMFLEX +ENCODING 206 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 0 +BITMAP +40 +A0 +00 +E0 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER I WITH DIAERESIS +ENCODING 207 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 9 1 0 +BITMAP +A0 +00 +E0 +40 +40 +40 +40 +40 +E0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER ETH +ENCODING 208 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +70 +48 +48 +E8 +48 +48 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER N WITH TILDE +ENCODING 209 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +68 +B0 +88 +C8 +A8 +98 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH GRAVE +ENCODING 210 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +70 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH ACUTE +ENCODING 211 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +70 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH CIRCUMFLEX +ENCODING 212 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +00 +70 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH TILDE +ENCODING 213 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +68 +B0 +70 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH DIAERESIS +ENCODING 214 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +00 +70 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR MULTIPLICATION SIGN +ENCODING 215 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 1 +BITMAP +88 +50 +20 +50 +88 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER O WITH STROKE +ENCODING 216 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 6 6 0 1 +BITMAP +74 +88 +98 +A8 +C8 +F0 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U WITH GRAVE +ENCODING 217 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U WITH ACUTE +ENCODING 218 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U WITH CIRCUMFLEX +ENCODING 219 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER U WITH DIAERESIS +ENCODING 220 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +00 +88 +88 +88 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER Y WITH ACUTE +ENCODING 221 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +88 +88 +88 +50 +20 +20 +20 +ENDCHAR +STARTCHAR LATIN CAPITAL LETTER THORN +ENCODING 222 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +80 +F0 +88 +88 +F0 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER SHARP S +ENCODING 223 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +30 +48 +88 +90 +90 +88 +88 +B0 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH GRAVE +ENCODING 224 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +10 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH ACUTE +ENCODING 225 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +10 +20 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH CIRCUMFLEX +ENCODING 226 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH TILDE +ENCODING 227 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +68 +B0 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH DIAERESIS +ENCODING 228 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +50 +00 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER A WITH RING ABOVE +ENCODING 229 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +20 +70 +08 +78 +88 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER AE +ENCODING 230 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +A8 +B8 +A0 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER C WITH CEDILLA +ENCODING 231 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 -2 +BITMAP +78 +80 +80 +80 +78 +20 +40 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E WITH GRAVE +ENCODING 232 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +40 +20 +00 +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E WITH ACUTE +ENCODING 233 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +10 +20 +00 +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E WITH CIRCUMFLEX +ENCODING 234 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +00 +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER E WITH DIAERESIS +ENCODING 235 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +50 +00 +70 +88 +F8 +80 +78 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I WITH GRAVE +ENCODING 236 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 8 2 0 +BITMAP +80 +40 +00 +80 +80 +80 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I WITH ACUTE +ENCODING 237 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 2 8 1 0 +BITMAP +40 +80 +00 +40 +40 +40 +40 +40 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I WITH CIRCUMFLEX +ENCODING 238 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 8 1 0 +BITMAP +40 +A0 +00 +40 +40 +40 +40 +40 +ENDCHAR +STARTCHAR LATIN SMALL LETTER I WITH DIAERESIS +ENCODING 239 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 3 7 1 0 +BITMAP +A0 +00 +40 +40 +40 +40 +40 +ENDCHAR +STARTCHAR LATIN SMALL LETTER ETH +ENCODING 240 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +60 +60 +10 +78 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER N WITH TILDE +ENCODING 241 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +50 +A0 +00 +F0 +88 +88 +88 +88 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH GRAVE +ENCODING 242 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +40 +20 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH ACUTE +ENCODING 243 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +10 +20 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH CIRCUMFLEX +ENCODING 244 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH TILDE +ENCODING 245 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +50 +A0 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH DIAERESIS +ENCODING 246 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +50 +00 +70 +88 +88 +88 +70 +ENDCHAR +STARTCHAR DIVISION SIGN +ENCODING 247 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 1 +BITMAP +20 +00 +F8 +00 +20 +ENDCHAR +STARTCHAR LATIN SMALL LETTER O WITH STROKE +ENCODING 248 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 5 0 0 +BITMAP +70 +98 +A8 +C8 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U WITH GRAVE +ENCODING 249 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +40 +20 +00 +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U WITH ACUTE +ENCODING 250 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +10 +20 +00 +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U WITH CIRCUMFLEX +ENCODING 251 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +20 +50 +00 +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER U WITH DIAERESIS +ENCODING 252 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 7 0 0 +BITMAP +50 +00 +88 +88 +88 +98 +68 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Y WITH ACUTE +ENCODING 253 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 10 0 -2 +BITMAP +10 +20 +00 +88 +88 +88 +98 +68 +08 +70 +ENDCHAR +STARTCHAR LATIN SMALL LETTER THORN +ENCODING 254 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -2 +BITMAP +80 +80 +F0 +88 +88 +88 +F0 +80 +80 +ENDCHAR +STARTCHAR LATIN SMALL LETTER Y WITH DIAERESIS +ENCODING 255 +SWIDTH 392 0 +DWIDTH 6 0 +BBX 5 9 0 -2 +BITMAP +50 +00 +88 +88 +88 +98 +68 +08 +70 +ENDCHAR +ENDFONT diff --git a/bertos/fonts/gohu.c b/bertos/fonts/gohu.c new file mode 100644 index 0000000..523cf21 --- /dev/null +++ b/bertos/fonts/gohu.c @@ -0,0 +1,792 @@ +/* Generated by convbdf on Wed Apr 28 11:17:58 CEST 2010. */ +#include + +/* Font information: + + name: -Gohu-GohuFont-Medium-R-Normal--11-80-100-100-C-60-ISO8859-1 + pixel size: 11 + ascent: 9 + descent: 2 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_gohu_glyphs[] = { + +/* Character (0x20): bbw=0, bbh=0, bbx=0, bby=0, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0x21): bbw=1, bbh=8, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0x7e, 0x00, 0x00, 0x00, /* ****** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* ****** * */ + +/* Character (0x22): bbw=3, bbh=3, bbx=1, bby=5, width=6 */ +0x00, 0x0e, 0x00, 0x0e, 0x00, 0x00, /* *** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** */ + +/* Character (0x23): bbw=5, bbh=7, bbx=0, bby=1, width=6 */ +0x28, 0xfe, 0x28, 0xfe, 0x28, 0x00, /* * * ******* * * ******* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ******* * * ******* * * */ + +/* Character (0x24): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0x98, 0x24, 0xfe, 0x24, 0xc8, 0x00, /* ** * * * ******* * * * ** */ +0x00, 0x01, 0x03, 0x01, 0x00, 0x00, /* ** * * * ******* * * * ** * ** * */ + +/* Character (0x25): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x88, 0x54, 0xa8, 0x50, 0x8c, 0x00, /* * * * * * * * * * * ** * */ +0x01, 0x00, 0x00, 0x01, 0x00, 0x00, /* * * * * * * * * * * ** * * * */ + +/* Character (0x26): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xd8, 0x24, 0x54, 0x88, 0x40, 0x00, /* ** ** * * * * * * * * */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* ** ** * * * * * * * * * * * */ + +/* Character (0x27): bbw=1, bbh=3, bbx=2, bby=5, width=6 */ +0x00, 0x00, 0x0e, 0x00, 0x00, 0x00, /* *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** */ + +/* Character (0x28): bbw=3, bbh=9, bbx=1, bby=-1, width=6 */ +0x00, 0x70, 0x8c, 0x02, 0x00, 0x00, /* *** ** * * */ +0x00, 0x00, 0x01, 0x02, 0x00, 0x00, /* *** ** * * * * */ + +/* Character (0x29): bbw=3, bbh=9, bbx=1, bby=-1, width=6 */ +0x00, 0x02, 0x8c, 0x70, 0x00, 0x00, /* * ** * *** */ +0x00, 0x02, 0x01, 0x00, 0x00, 0x00, /* * ** * *** * * */ + +/* Character (0x2a): bbw=5, bbh=5, bbx=0, bby=1, width=6 */ +0x50, 0x20, 0xf8, 0x20, 0x50, 0x00, /* * * * ***** * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ***** * * * */ + +/* Character (0x2b): bbw=5, bbh=5, bbx=0, bby=1, width=6 */ +0x20, 0x20, 0xf8, 0x20, 0x20, 0x00, /* * * ***** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ***** * * */ + +/* Character (0x2c): bbw=2, bbh=4, bbx=1, bby=-2, width=6 */ +0x00, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * */ +0x00, 0x05, 0x03, 0x00, 0x00, 0x00, /* * * * *** */ + +/* Character (0x2d): bbw=5, bbh=1, bbx=0, bby=3, width=6 */ +0x20, 0x20, 0x20, 0x20, 0x20, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0x2e): bbw=2, bbh=2, bbx=1, bby=0, width=6 */ +0x00, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * */ +0x00, 0x01, 0x01, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0x2f): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */ +0x00, 0x80, 0x60, 0x18, 0x06, 0x00, /* * ** ** ** */ +0x06, 0x01, 0x00, 0x00, 0x00, 0x00, /* * ** ** ** *** */ + +/* Character (0x30): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x44, 0x24, 0x14, 0xf8, 0x00, /* ***** * * * * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * * * * * * ***** * * * */ + +/* Character (0x31): bbw=3, bbh=7, bbx=0, bby=0, width=6 */ +0x10, 0x08, 0xfc, 0x00, 0x00, 0x00, /* * * ****** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * ****** * */ + +/* Character (0x32): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x08, 0x84, 0x44, 0x24, 0x18, 0x00, /* * * * * * * * ** */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * ** * * * * * */ + +/* Character (0x33): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x88, 0x04, 0x24, 0x24, 0xd8, 0x00, /* * * * * * * * ** ** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * * * * * ** ** * * * */ + +/* Character (0x34): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x60, 0x50, 0x48, 0xfc, 0x40, 0x00, /* ** * * * * ****** * */ +0x00, 0x00, 0x00, 0x01, 0x00, 0x00, /* ** * * * * ****** * * */ + +/* Character (0x35): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x9c, 0x14, 0x14, 0x14, 0xe4, 0x00, /* *** * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * * * * *** * * * */ + +/* Character (0x36): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x14, 0x14, 0x14, 0xe0, 0x00, /* ***** * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * * * * * * *** * * * */ + +/* Character (0x37): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x04, 0x04, 0xc4, 0x34, 0x0c, 0x00, /* * * * ** * ** ** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * * ** * ** ** * */ + +/* Character (0x38): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xd8, 0x24, 0x24, 0x24, 0xd8, 0x00, /* ** ** * * * * * * ** ** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** ** * * * * * * ** ** * * * */ + +/* Character (0x39): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x18, 0x24, 0x24, 0x24, 0xf8, 0x00, /* ** * * * * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** * * * * * * ***** * * * */ + +/* Character (0x3a): bbw=2, bbh=5, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0xb0, 0xb0, 0x00, 0x00, /* ** * ** * */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* ** * ** * * * */ + +/* Character (0x3b): bbw=2, bbh=7, bbx=1, bby=-2, width=6 */ +0x00, 0xb0, 0xb0, 0x00, 0x00, 0x00, /* ** * ** * */ +0x00, 0x05, 0x03, 0x00, 0x00, 0x00, /* ** * ** * * *** */ + +/* Character (0x3c): bbw=4, bbh=7, bbx=1, bby=0, width=6 */ +0x00, 0x20, 0x50, 0x88, 0x04, 0x00, /* * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x01, 0x00, /* * * * * * * * */ + +/* Character (0x3d): bbw=5, bbh=3, bbx=0, bby=2, width=6 */ +0x50, 0x50, 0x50, 0x50, 0x50, 0x00, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0x3e): bbw=4, bbh=7, bbx=1, bby=0, width=6 */ +0x00, 0x04, 0x88, 0x50, 0x20, 0x00, /* * * * * * * */ +0x00, 0x01, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * */ + +/* Character (0x3f): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x08, 0x04, 0x44, 0x24, 0x18, 0x00, /* * * * * * * ** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * * * * * ** * */ + +/* Character (0x40): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x04, 0x74, 0x54, 0x78, 0x00, /* ***** * * *** * * * **** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* ***** * * *** * * * **** * * * * */ + +/* Character (0x41): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0x12, 0x12, 0x12, 0xfc, 0x00, /* ****** * * * * * * ****** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ****** * * * * * * ****** * * */ + +/* Character (0x42): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x12, 0xec, 0x00, /* ******* * * * * * * ** *** */ +0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * * * * * * ** *** * * * * */ + +/* Character (0x43): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0x02, 0x02, 0x02, 0x84, 0x00, /* ****** * * * * * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * * * * * * */ + +/* Character (0x44): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x02, 0x02, 0x02, 0xfc, 0x00, /* ******* * * * ****** */ +0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * * * ****** * * * * */ + +/* Character (0x45): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x12, 0x02, 0x00, /* ******* * * * * * * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ******* * * * * * * * * * * * * */ + +/* Character (0x46): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x12, 0x02, 0x00, /* ******* * * * * * * * */ +0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* ******* * * * * * * * * */ + +/* Character (0x47): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0x02, 0x12, 0x12, 0xf4, 0x00, /* ****** * * * * * * **** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * * * * **** * * * */ + +/* Character (0x48): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x10, 0x10, 0x10, 0xfe, 0x00, /* ******* * * * ******* */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * * * ******* * * */ + +/* Character (0x49): bbw=3, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0x02, 0xfe, 0x02, 0x00, 0x00, /* * ******* * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * ******* * * * * */ + +/* Character (0x4a): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xc0, 0x00, 0x00, 0x00, 0xfe, 0x00, /* ** ******* */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** ******* * * * */ + +/* Character (0x4b): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x10, 0x28, 0x44, 0x82, 0x00, /* ******* * * * * * * * */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * * * * * * * * * */ + +/* Character (0x4c): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x00, 0x00, 0x00, 0x00, 0x00, /* ******* */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ******* * * * * * */ + +/* Character (0x4d): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x04, 0x18, 0x04, 0xfe, 0x00, /* ******* * ** * ******* */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * ** * ******* * * */ + +/* Character (0x4e): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x0c, 0x30, 0xc0, 0xfe, 0x00, /* ******* ** ** ** ******* */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* ** ** ** ******* * * */ + +/* Character (0x4f): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0x02, 0x02, 0x02, 0xfc, 0x00, /* ****** * * * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * ****** * * * */ + +/* Character (0x50): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x12, 0x0c, 0x00, /* ******* * * * * * * ** */ +0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* ******* * * * * * * ** * */ + +/* Character (0x51): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0xfc, 0x02, 0x42, 0x82, 0x7c, 0x00, /* ****** * * * * * ***** */ +0x00, 0x01, 0x01, 0x00, 0x03, 0x00, /* ****** * * * * * ***** * * ** */ + +/* Character (0x52): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x12, 0x12, 0x32, 0xcc, 0x00, /* ******* * * * * * ** ** ** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * * * * * ** ** ** * * */ + +/* Character (0x53): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x8c, 0x12, 0x12, 0x12, 0xe4, 0x00, /* ** * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** * * * * * * * * *** * * * */ + +/* Character (0x54): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x02, 0x02, 0xfe, 0x02, 0x02, 0x00, /* * * ******* * * */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * ******* * * * */ + +/* Character (0x55): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x00, 0x00, 0x00, 0xfe, 0x00, /* ******* ******* */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* ******* * * * */ + +/* Character (0x56): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x1e, 0x60, 0x80, 0x60, 0x1e, 0x00, /* **** ** * ** **** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* **** ** * ** **** * */ + +/* Character (0x57): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x7e, 0x80, 0x70, 0x80, 0x7e, 0x00, /* ****** * *** * ****** */ +0x00, 0x01, 0x00, 0x01, 0x00, 0x00, /* ****** * *** * ****** * * */ + +/* Character (0x58): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xc6, 0x28, 0x10, 0x28, 0xc6, 0x00, /* ** ** * * * * * ** ** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ** ** * * * * * ** ** * * */ + +/* Character (0x59): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x06, 0x08, 0xf0, 0x08, 0x06, 0x00, /* ** * **** * ** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* ** * **** * ** * */ + +/* Character (0x5a): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xc2, 0x22, 0x12, 0x0a, 0x06, 0x00, /* * ** * * * * * * ** */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * ** * * * * * * ** * * * * * */ + +/* Character (0x5b): bbw=3, bbh=9, bbx=2, bby=-1, width=6 */ +0x00, 0x00, 0xfe, 0x02, 0x02, 0x00, /* ******* * * */ +0x00, 0x00, 0x03, 0x02, 0x02, 0x00, /* ******* * * ** * * */ + +/* Character (0x5c): bbw=5, bbh=10, bbx=1, bby=-2, width=6 */ +0x00, 0x06, 0x18, 0x60, 0x80, 0x00, /* ** ** ** * */ +0x00, 0x00, 0x00, 0x00, 0x01, 0x06, /* ** ** ** * * ** */ + +/* Character (0x5d): bbw=3, bbh=9, bbx=0, bby=-1, width=6 */ +0x02, 0x02, 0xfe, 0x00, 0x00, 0x00, /* * * ******* */ +0x02, 0x02, 0x03, 0x00, 0x00, 0x00, /* * * ******* * * ** */ + +/* Character (0x5e): bbw=5, bbh=3, bbx=0, bby=4, width=6 */ +0x10, 0x08, 0x04, 0x08, 0x10, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0x5f): bbw=6, bbh=1, bbx=0, bby=-1, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x02, /* * * * * * * */ + +/* Character (0x60): bbw=3, bbh=3, bbx=1, bby=5, width=6 */ +0x00, 0x02, 0x04, 0x08, 0x00, 0x00, /* * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * */ + +/* Character (0x61): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x80, 0x50, 0x50, 0x50, 0xe0, 0x00, /* * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * *** * * * * */ + +/* Character (0x62): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x20, 0x10, 0x10, 0xe0, 0x00, /* ******* * * * *** */ +0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * * * *** * * * * */ + +/* Character (0x63): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0x10, 0x10, 0x10, 0x00, /* *** * * * * */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * */ + +/* Character (0x64): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0x10, 0x90, 0xfe, 0x00, /* *** * * * * ******* */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* *** * * * * ******* * * * */ + +/* Character (0x65): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x50, 0x50, 0x50, 0x60, 0x00, /* *** * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * ** * * * * */ + +/* Character (0x66): bbw=3, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0xfc, 0x12, 0x12, 0x00, 0x00, /* ****** * * * * */ +0x00, 0x01, 0x00, 0x00, 0x00, 0x00, /* ****** * * * * * */ + +/* Character (0x67): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xe0, 0x10, 0x10, 0x90, 0xf0, 0x00, /* *** * * * * **** */ +0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /* *** * * * * **** * ** * *** */ + +/* Character (0x68): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x20, 0x10, 0x10, 0xe0, 0x00, /* ******* * * * *** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * * * *** * * */ + +/* Character (0x69): bbw=3, bbh=7, bbx=1, bby=0, width=6 */ +0x00, 0x10, 0xf4, 0x00, 0x00, 0x00, /* * * **** */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * * **** * * */ + +/* Character (0x6a): bbw=3, bbh=9, bbx=0, bby=-2, width=6 */ +0x00, 0x10, 0xf4, 0x00, 0x00, 0x00, /* * * **** */ +0x04, 0x04, 0x03, 0x00, 0x00, 0x00, /* * * **** * *** */ + +/* Character (0x6b): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfe, 0x40, 0x60, 0x90, 0x00, 0x00, /* ******* * ** * * */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******* * ** * * * * */ + +/* Character (0x6c): bbw=4, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0x02, 0xfe, 0x00, 0x00, 0x00, /* * ******* */ +0x00, 0x00, 0x00, 0x01, 0x01, 0x00, /* * ******* * * */ + +/* Character (0x6d): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x10, 0xf0, 0x10, 0xe0, 0x00, /* **** * **** * *** */ +0x01, 0x00, 0x01, 0x00, 0x01, 0x00, /* **** * **** * *** * * * */ + +/* Character (0x6e): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x10, 0x10, 0x10, 0xe0, 0x00, /* **** * * * *** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* **** * * * *** * * */ + +/* Character (0x6f): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0x10, 0x10, 0xe0, 0x00, /* *** * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * *** * * * */ + +/* Character (0x70): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xf0, 0x20, 0x10, 0x10, 0xe0, 0x00, /* **** * * * *** */ +0x07, 0x01, 0x01, 0x01, 0x00, 0x00, /* **** * * * *** **** * * */ + +/* Character (0x71): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xe0, 0x10, 0x10, 0x90, 0xf0, 0x00, /* *** * * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x07, 0x00, /* *** * * * * **** * * *** */ + +/* Character (0x72): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x20, 0x10, 0x10, 0x20, 0x00, /* **** * * * * */ +0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** * * * * * */ + +/* Character (0x73): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x20, 0x50, 0x50, 0x50, 0x80, 0x00, /* * * * * * * * * */ +0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * * * * * * * * * * */ + +/* Character (0x74): bbw=4, bbh=8, bbx=0, bby=0, width=6 */ +0x10, 0xfe, 0x10, 0x10, 0x00, 0x00, /* * ******* * * */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * ******* * * * * */ + +/* Character (0x75): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x00, 0x00, 0x80, 0xf0, 0x00, /* **** * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * **** * * * */ + +/* Character (0x76): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x30, 0xc0, 0x00, 0xc0, 0x30, 0x00, /* ** ** ** ** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* ** ** ** ** * */ + +/* Character (0x77): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xf0, 0x00, 0xe0, 0x00, 0xf0, 0x00, /* **** *** **** */ +0x00, 0x01, 0x00, 0x01, 0x00, 0x00, /* **** *** **** * * */ + +/* Character (0x78): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x10, 0xa0, 0x40, 0xa0, 0x10, 0x00, /* * * * * * * * */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* * * * * * * * * * */ + +/* Character (0x79): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xf0, 0x00, 0x00, 0x80, 0xf0, 0x00, /* **** * **** */ +0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /* **** * **** * ** * *** */ + +/* Character (0x7a): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x10, 0x90, 0x50, 0x30, 0x10, 0x00, /* * * * * * ** * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * ** * * * * * * */ + +/* Character (0x7b): bbw=6, bbh=11, bbx=0, bby=-2, width=6 */ +0x20, 0x20, 0xde, 0x01, 0x01, 0x00, /* * * **** *** * */ +0x00, 0x00, 0x03, 0x04, 0x04, 0x00, /* * * **** *** * ** * * */ + +/* Character (0x7c): bbw=1, bbh=9, bbx=2, bby=-1, width=6 */ +0x00, 0x00, 0xfe, 0x00, 0x00, 0x00, /* ******* */ +0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ******* ** */ + +/* Character (0x7d): bbw=6, bbh=11, bbx=0, bby=-2, width=6 */ +0x01, 0x01, 0xde, 0x20, 0x20, 0x00, /* * * **** ** * * */ +0x04, 0x04, 0x03, 0x00, 0x00, 0x00, /* * * **** ** * * * *** */ + +/* Character (0x7e): bbw=5, bbh=3, bbx=0, bby=2, width=6 */ +0x20, 0x10, 0x20, 0x40, 0x20, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0xa0): bbw=0, bbh=0, bbx=0, bby=0, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0xa1): bbw=1, bbh=8, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0xfa, 0x00, 0x00, 0x00, /* * ***** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * ***** * */ + +/* Character (0xa2): bbw=5, bbh=7, bbx=0, bby=-1, width=6 */ +0xe0, 0x10, 0xf8, 0x10, 0x10, 0x00, /* *** * ***** * * */ +0x00, 0x01, 0x03, 0x01, 0x01, 0x00, /* *** * ***** * * * ** * * */ + +/* Character (0xa3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x20, 0xfc, 0x22, 0x02, 0x84, 0x00, /* * ****** * * * * * */ +0x01, 0x00, 0x01, 0x01, 0x00, 0x00, /* * ****** * * * * * * * * */ + +/* Character (0xa4): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0x10, 0xe0, 0xa0, 0xe0, 0x10, 0x00, /* * *** * * *** * */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* * *** * * *** * * * */ + +/* Character (0xa5): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0xa6, 0xa8, 0xf0, 0xa8, 0xa6, 0x00, /* ** * * * * * **** * * * ** * * */ +0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* ** * * * * * **** * * * ** * * ** */ + +/* Character (0xa6): bbw=1, bbh=9, bbx=2, bby=-1, width=6 */ +0x00, 0x00, 0xde, 0x00, 0x00, 0x00, /* **** ** */ +0x00, 0x00, 0x03, 0x00, 0x00, 0x00, /* **** ** ** */ + +/* Character (0xa7): bbw=4, bbh=9, bbx=1, bby=-1, width=6 */ +0x00, 0x3c, 0x52, 0x52, 0xe2, 0x00, /* **** * * * * * * * *** */ +0x00, 0x02, 0x02, 0x02, 0x01, 0x00, /* **** * * * * * * * *** * * * * */ + +/* Character (0xa8): bbw=3, bbh=1, bbx=1, bby=7, width=6 */ +0x00, 0x02, 0x00, 0x02, 0x00, 0x00, /* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * */ + +/* Character (0xa9): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x24, 0x54, 0x04, 0xf8, 0x00, /* ***** * * * * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * * * * * * ***** * * * */ + +/* Character (0xaa): bbw=4, bbh=6, bbx=1, bby=1, width=6 */ +0x00, 0x98, 0xa4, 0x94, 0xbc, 0x00, /* ** * * * * * * * **** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * * * * * * * **** * */ + +/* Character (0xab): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x20, 0x50, 0x88, 0x20, 0x50, 0x88, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0xac): bbw=4, bbh=2, bbx=1, bby=2, width=6 */ +0x00, 0x20, 0x20, 0x20, 0x60, 0x00, /* * * * ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** */ + +/* Character (0xad): bbw=4, bbh=1, bbx=1, bby=3, width=6 */ +0x00, 0x20, 0x20, 0x20, 0x20, 0x00, /* * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0xae): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x74, 0x14, 0x04, 0xf8, 0x00, /* ***** * *** * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * *** * * * ***** * * * */ + +/* Character (0xaf): bbw=5, bbh=1, bbx=0, bby=7, width=6 */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0xb0): bbw=3, bbh=3, bbx=1, bby=4, width=6 */ +0x00, 0x08, 0x14, 0x08, 0x00, 0x00, /* * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0xb1): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0x20, 0x20, 0xf8, 0x20, 0x20, 0x00, /* * * ***** * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * ***** * * * * * * * */ + +/* Character (0xb2): bbw=4, bbh=5, bbx=1, bby=3, width=6 */ +0x00, 0x24, 0x32, 0x2a, 0x24, 0x00, /* * * * ** * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * * * * * */ + +/* Character (0xb3): bbw=4, bbh=5, bbx=1, bby=3, width=6 */ +0x00, 0x22, 0x2a, 0x2a, 0x14, 0x00, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0xb4): bbw=2, bbh=2, bbx=2, bby=6, width=6 */ +0x00, 0x00, 0x04, 0x02, 0x00, 0x00, /* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * */ + +/* Character (0xb5): bbw=5, bbh=6, bbx=0, bby=-1, width=6 */ +0xf0, 0x80, 0x00, 0x00, 0xf0, 0x00, /* **** * **** */ +0x03, 0x00, 0x01, 0x01, 0x00, 0x00, /* **** * **** ** * * */ + +/* Character (0xb6): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x18, 0x3c, 0xfc, 0x04, 0xfc, 0x00, /* ** **** ****** * ****** */ +0x00, 0x00, 0x01, 0x00, 0x01, 0x00, /* ** **** ****** * ****** * * */ + +/* Character (0xb7): bbw=1, bbh=1, bbx=2, bby=3, width=6 */ +0x00, 0x00, 0x20, 0x00, 0x00, 0x00, /* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * */ + +/* Character (0xb8): bbw=2, bbh=2, bbx=2, bby=-2, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x04, 0x02, 0x00, 0x00, /* * * */ + +/* Character (0xb9): bbw=3, bbh=5, bbx=1, bby=3, width=6 */ +0x00, 0x24, 0x3e, 0x20, 0x00, 0x00, /* * * ***** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ***** * */ + +/* Character (0xba): bbw=4, bbh=6, bbx=1, bby=1, width=6 */ +0x00, 0x98, 0xa4, 0xa4, 0x98, 0x00, /* ** * * * * * * * ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * * * * * * * ** * */ + +/* Character (0xbb): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x88, 0x50, 0x20, 0x88, 0x50, 0x20, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0xbc): bbw=6, bbh=9, bbx=0, bby=-1, width=6 */ +0x24, 0x3e, 0x20, 0x80, 0x40, 0xe0, /* * * ***** * * * *** */ +0x00, 0x00, 0x01, 0x01, 0x01, 0x03, /* * * ***** * * * *** * * * ** */ + +/* Character (0xbd): bbw=6, bbh=9, bbx=0, bby=-1, width=6 */ +0x24, 0x3e, 0x20, 0x40, 0x20, 0xc0, /* * * ***** * * * ** */ +0x00, 0x00, 0x00, 0x02, 0x03, 0x02, /* * * ***** * * * ** * ** * */ + +/* Character (0xbe): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0x22, 0x2a, 0x94, 0x40, 0xe0, 0x00, /* * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x03, 0x00, /* * * * * * * * * * *** * * * ** */ + +/* Character (0xbf): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xc0, 0x20, 0x14, 0x00, 0x80, 0x00, /* ** * * * * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** * * * * * * * */ + +/* Character (0xc0): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x25, 0x26, 0x24, 0xf8, 0x00, /* ****** * * ** * * * ***** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ****** * * ** * * * ***** * * */ + +/* Character (0xc1): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x24, 0x26, 0x25, 0xf8, 0x00, /* ***** * * ** * * * * ***** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ***** * * ** * * * * ***** * * */ + +/* Character (0xc2): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0x4a, 0x49, 0x4a, 0xf0, 0x00, /* **** * * * * * * * * * **** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* **** * * * * * * * * * **** * * */ + +/* Character (0xc3): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf2, 0x49, 0x4b, 0x4a, 0xf1, 0x00, /* * ***** * * ** * * * * * * **** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* * ***** * * ** * * * * * * **** * * */ + +/* Character (0xc4): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x25, 0x24, 0x25, 0xf8, 0x00, /* ****** * * * * * * * ***** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ****** * * * * * * * ***** * * */ + +/* Character (0xc5): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0x4a, 0x4d, 0x4a, 0xf0, 0x00, /* **** * * * * ** * * * * **** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* **** * * * * ** * * * * **** * * */ + +/* Character (0xc6): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf8, 0x24, 0xfc, 0x24, 0x04, 0x00, /* ***** * * ****** * * * */ +0x01, 0x00, 0x01, 0x01, 0x01, 0x00, /* ***** * * ****** * * * * * * * */ + +/* Character (0xc7): bbw=5, bbh=9, bbx=0, bby=-2, width=6 */ +0xf8, 0x04, 0x04, 0x04, 0x88, 0x00, /* ***** * * * * * */ +0x00, 0x05, 0x03, 0x01, 0x00, 0x00, /* ***** * * * * * * *** * */ + +/* Character (0xc8): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x25, 0x26, 0x24, 0x04, 0x00, /* ******* * * ** * * * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ******* * * ** * * * * * * * * * */ + +/* Character (0xc9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x24, 0x26, 0x25, 0x04, 0x00, /* ****** * * ** * * * * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ****** * * ** * * * * * * * * * * */ + +/* Character (0xca): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x26, 0x25, 0x26, 0x04, 0x00, /* ****** ** * * * * ** * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ****** ** * * * * ** * * * * * * * */ + +/* Character (0xcb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x25, 0x24, 0x25, 0x04, 0x00, /* ******* * * * * * * * * */ +0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* ******* * * * * * * * * * * * * * */ + +/* Character (0xcc): bbw=3, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x08, 0xf9, 0x0a, 0x00, 0x00, /* * * ***** * * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * ***** * * * * * */ + +/* Character (0xcd): bbw=3, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x0a, 0xf9, 0x08, 0x00, 0x00, /* * * * ***** * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * ***** * * * * */ + +/* Character (0xce): bbw=3, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x0a, 0xf9, 0x0a, 0x00, 0x00, /* * * * ***** * * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * ***** * * * * * */ + +/* Character (0xcf): bbw=3, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x05, 0xfc, 0x05, 0x00, 0x00, /* * * ******* * */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * ******* * * * * */ + +/* Character (0xd0): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x20, 0xfc, 0x24, 0x04, 0xf8, 0x00, /* * ****** * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * ****** * * * ***** * * * */ + +/* Character (0xd1): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfe, 0x09, 0x13, 0x22, 0xfd, 0x00, /* ******** * ** * * * * ****** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* ******** * ** * * * * ****** * * */ + +/* Character (0xd2): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x05, 0x06, 0x04, 0xf8, 0x00, /* ****** * ** * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * ** * ***** * * * */ + +/* Character (0xd3): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x04, 0x06, 0x05, 0xf8, 0x00, /* ***** * ** * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** * ** * * ***** * * * */ + +/* Character (0xd4): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0x0a, 0x09, 0x0a, 0xf0, 0x00, /* **** * * * * * * **** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* **** * * * * * * **** * * * */ + +/* Character (0xd5): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfa, 0x05, 0x07, 0x06, 0xf9, 0x00, /* * ****** * *** ** * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * ****** * *** ** * ***** * * * */ + +/* Character (0xd6): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf8, 0x05, 0x04, 0x05, 0xf8, 0x00, /* ****** * * * * ***** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * * ***** * * * */ + +/* Character (0xd7): bbw=5, bbh=5, bbx=0, bby=1, width=6 */ +0x88, 0x50, 0x20, 0x50, 0x88, 0x00, /* * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * */ + +/* Character (0xd8): bbw=6, bbh=6, bbx=0, bby=1, width=6 */ +0xf8, 0xc4, 0xa4, 0x94, 0x78, 0x04, /* ***** * ** * * * * * * **** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** * ** * * * * * * **** * */ + +/* Character (0xd9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x01, 0x02, 0x00, 0xfc, 0x00, /* ******* * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * ****** * * * */ + +/* Character (0xda): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x00, 0x02, 0x01, 0xfc, 0x00, /* ****** * * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * ****** * * * */ + +/* Character (0xdb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x00, 0x02, 0x01, 0xfc, 0x00, /* ****** * * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * ****** * * * */ + +/* Character (0xdc): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xfc, 0x01, 0x00, 0x01, 0xfc, 0x00, /* ******* * ****** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* ******* * ****** * * * */ + +/* Character (0xdd): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0x1c, 0x20, 0xc2, 0x21, 0x1c, 0x00, /* *** * * *** * *** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* *** * * *** * *** * */ + +/* Character (0xde): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xfc, 0x48, 0x48, 0x48, 0x30, 0x00, /* ****** * * * * * * ** */ +0x01, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** * * * * * * ** * */ + +/* Character (0xdf): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0xf8, 0x04, 0x02, 0x32, 0xcc, 0x00, /* ***** * * * ** ** ** */ +0x03, 0x00, 0x01, 0x01, 0x00, 0x00, /* ***** * * * ** ** ** ** * * */ + +/* Character (0xe0): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x80, 0x50, 0x52, 0x54, 0xe0, 0x00, /* * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * * * *** * * * * */ + +/* Character (0xe1): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x80, 0x50, 0x54, 0x52, 0xe0, 0x00, /* * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * * * *** * * * * */ + +/* Character (0xe2): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x80, 0x54, 0x52, 0x54, 0xe0, 0x00, /* * * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * * * * *** * * * * */ + +/* Character (0xe3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x84, 0x52, 0x56, 0x54, 0xe2, 0x00, /* * * * * * ** * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * ** * * * * * * *** * * * * */ + +/* Character (0xe4): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0x80, 0x54, 0x50, 0x54, 0xe0, 0x00, /* * * * * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * * * * * *** * * * * */ + +/* Character (0xe5): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x80, 0x54, 0x5a, 0x54, 0xe0, 0x00, /* * * * * * ** * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * * * ** * * * * *** * * * * */ + +/* Character (0xe6): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0xf0, 0x50, 0x60, 0x00, /* *** * **** * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * **** * * ** * * * * */ + +/* Character (0xe7): bbw=5, bbh=7, bbx=0, bby=-2, width=6 */ +0xe0, 0x10, 0x10, 0x10, 0x10, 0x00, /* *** * * * * */ +0x00, 0x05, 0x03, 0x01, 0x01, 0x00, /* *** * * * * * *** * * */ + +/* Character (0xe8): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x52, 0x54, 0x50, 0x60, 0x00, /* *** * * * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * ** * * * * */ + +/* Character (0xe9): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x50, 0x54, 0x52, 0x60, 0x00, /* *** * * * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * ** * * * * */ + +/* Character (0xea): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x54, 0x52, 0x54, 0x60, 0x00, /* *** * * * * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * * ** * * * * */ + +/* Character (0xeb): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xe0, 0x54, 0x50, 0x54, 0x60, 0x00, /* *** * * * * * * * * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, /* *** * * * * * * * * ** * * * * */ + +/* Character (0xec): bbw=2, bbh=8, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0xf2, 0x04, 0x00, 0x00, /* * **** * */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * **** * * */ + +/* Character (0xed): bbw=2, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0x04, 0xf2, 0x00, 0x00, 0x00, /* * * **** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * **** * */ + +/* Character (0xee): bbw=3, bbh=8, bbx=1, bby=0, width=6 */ +0x00, 0x04, 0xf2, 0x04, 0x00, 0x00, /* * * **** * */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * * **** * * */ + +/* Character (0xef): bbw=3, bbh=7, bbx=1, bby=0, width=6 */ +0x00, 0x04, 0xf0, 0x04, 0x00, 0x00, /* * **** * */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, /* * **** * * */ + +/* Character (0xf0): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x16, 0x16, 0x18, 0xf0, 0x00, /* *** ** * ** * ** **** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** ** * ** * ** **** * * * */ + +/* Character (0xf1): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf4, 0x12, 0x14, 0x12, 0xe0, 0x00, /* * **** * * * * * * *** */ +0x01, 0x00, 0x00, 0x00, 0x01, 0x00, /* * **** * * * * * * *** * * */ + +/* Character (0xf2): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x12, 0x14, 0x10, 0xe0, 0x00, /* *** * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * *** * * * */ + +/* Character (0xf3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x10, 0x14, 0x12, 0xe0, 0x00, /* *** * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * *** * * * */ + +/* Character (0xf4): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x14, 0x12, 0x14, 0xe0, 0x00, /* *** * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * * *** * * * */ + +/* Character (0xf5): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe4, 0x12, 0x14, 0x12, 0xe0, 0x00, /* * *** * * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* * *** * * * * * * *** * * * */ + +/* Character (0xf6): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xe0, 0x14, 0x10, 0x14, 0xe0, 0x00, /* *** * * * * * *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * * *** * * * */ + +/* Character (0xf7): bbw=5, bbh=5, bbx=0, bby=1, width=6 */ +0x20, 0x20, 0xa8, 0x20, 0x20, 0x00, /* * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * */ + +/* Character (0xf8): bbw=5, bbh=5, bbx=0, bby=0, width=6 */ +0xe0, 0x90, 0x50, 0x30, 0xe0, 0x00, /* *** * * * * ** *** */ +0x00, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * * ** *** * * * */ + +/* Character (0xf9): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf0, 0x02, 0x04, 0x80, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * * * **** * * * */ + +/* Character (0xfa): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf0, 0x00, 0x04, 0x82, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * * * **** * * * */ + +/* Character (0xfb): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf0, 0x04, 0x02, 0x84, 0xf0, 0x00, /* **** * * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * * * * **** * * * */ + +/* Character (0xfc): bbw=5, bbh=7, bbx=0, bby=0, width=6 */ +0xf0, 0x04, 0x00, 0x84, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x00, /* **** * * * **** * * * */ + +/* Character (0xfd): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */ +0xf0, 0x00, 0x04, 0x82, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /* **** * * * **** * ** * *** */ + +/* Character (0xfe): bbw=5, bbh=9, bbx=0, bby=-2, width=6 */ +0xfc, 0x10, 0x10, 0x10, 0xe0, 0x00, /* ****** * * * *** */ +0x07, 0x01, 0x01, 0x01, 0x00, 0x00, /* ****** * * * *** **** * * */ + +/* Character (0xff): bbw=5, bbh=9, bbx=0, bby=-2, width=6 */ +0xf0, 0x04, 0x00, 0x84, 0xf0, 0x00, /* **** * * * **** */ +0x00, 0x05, 0x05, 0x04, 0x03, 0x00, /* **** * * * **** * ** * *** */ +}; + +/* Font structure definition. */ +EXTERN_CONST Font font_gohu = +{ + /* .glyph = */ font_gohu_glyphs, + /* .name = "gohu", */ + /* .width = */ 6, + /* .height = */ 11, + /* .ascent = 9, */ + /* .first = */ 32, + /* .last = */ 255, + /* .offset = */ NULL, + /* .width = */ NULL, +}; diff --git a/bertos/fonts/helvB10.bdf b/bertos/fonts/helvB10.bdf new file mode 100644 index 0000000..fe548f5 --- /dev/null +++ b/bertos/fonts/helvB10.bdf @@ -0,0 +1,3305 @@ +STARTFONT 2.1 +FONT -Adobe-Helvetica-Bold-R-Normal--10-100-75-75-P-60-ISO8859-1 +SIZE 10 75 75 +FONTBOUNDINGBOX 11 13 -1 -2 +COMMENT $XConsortium: helvB10.bdf,v 1.13 95/01/26 18:01:30 gildea Exp $ +COMMENT +COMMENT + +COMMENT Copyright 1984-1989, 1994 Adobe Systems Incorporated. +COMMENT Copyright 1988, 1994 Digital Equipment Corporation. +COMMENT +COMMENT Adobe is a trademark of Adobe Systems Incorporated which may be +COMMENT registered in certain jurisdictions. +COMMENT Permission to use these trademarks is hereby granted only in +COMMENT association with the images described in this file. +COMMENT +COMMENT Permission to use, copy, modify, distribute and sell this software +COMMENT and its documentation for any purpose and without fee is hereby +COMMENT granted, provided that the above copyright notices appear in all +COMMENT copies and that both those copyright notices and this permission +COMMENT notice appear in supporting documentation, and that the names of +COMMENT Adobe Systems and Digital Equipment Corporation not be used in +COMMENT advertising or publicity pertaining to distribution of the software +COMMENT without specific, written prior permission. Adobe Systems and +COMMENT Digital Equipment Corporation make no representations about the +COMMENT suitability of this software for any purpose. It is provided "as +COMMENT is" without express or implied warranty. +COMMENT - +STARTPROPERTIES 28 +FOUNDRY "Adobe" +FAMILY_NAME "Helvetica" +WEIGHT_NAME "Bold" +SLANT "R" +SETWIDTH_NAME "Normal" +ADD_STYLE_NAME "" +PIXEL_SIZE 10 +POINT_SIZE 100 +RESOLUTION_X 75 +RESOLUTION_Y 75 +SPACING "P" +AVERAGE_WIDTH 60 +CHARSET_REGISTRY "ISO8859" +CHARSET_ENCODING "1" +CAP_HEIGHT 8 +X_HEIGHT 6 +FONT_ASCENT 10 +FONT_DESCENT 2 +FACE_NAME "Helvetica Bold" +COPYRIGHT "Copyright (c) 1984, 1987 Adobe Systems Incorporated. All Rights Reserved. Copyright (c) 1988, 1991 Digital Equipment Corporation. All Rights Reserved." +NOTICE "Helvetica is a trademark of Linotype-Hell AG and/or its subsidiaries. " +_DEC_DEVICE_FONTNAMES "PS=Helvetica-Bold" +_DEC_PRODUCTINFO "DECwindows Fonts V2.2, 07-Nov-1991" +DEFAULT_CHAR 32 +RELATIVE_SETWIDTH 50 +RELATIVE_WEIGHT 70 +CHARSET_COLLECTIONS "ASCII ISO8859-1 ADOBE-STANDARD" +FULL_NAME "Helvetica Bold" +ENDPROPERTIES +CHARS 229 +STARTCHAR space +ENCODING 32 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR exclam +ENCODING 33 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 2 8 1 0 +BITMAP +C0 +C0 +C0 +C0 +80 +80 +00 +C0 +ENDCHAR +STARTCHAR quotedbl +ENCODING 34 +SWIDTH 474 0 +DWIDTH 5 0 +BBX 3 3 1 5 +BITMAP +A0 +A0 +A0 +ENDCHAR +STARTCHAR numbersign +ENCODING 35 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 7 0 0 +BITMAP +50 +50 +FC +50 +F8 +A0 +A0 +ENDCHAR +STARTCHAR dollar +ENCODING 36 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 -1 +BITMAP +20 +70 +A8 +E0 +70 +38 +A8 +70 +20 +ENDCHAR +STARTCHAR percent +ENCODING 37 +SWIDTH 889 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +62 +B4 +68 +10 +10 +2C +56 +8C +ENDCHAR +STARTCHAR ampersand +ENCODING 38 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +70 +D8 +D8 +70 +DE +CC +DC +76 +ENDCHAR +STARTCHAR quoteright +ENCODING 39 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 3 0 5 +BITMAP +C0 +40 +80 +ENDCHAR +STARTCHAR parenleft +ENCODING 40 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 10 0 -2 +BITMAP +20 +60 +40 +C0 +C0 +C0 +C0 +40 +60 +20 +ENDCHAR +STARTCHAR parenright +ENCODING 41 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 10 0 -2 +BITMAP +80 +C0 +40 +60 +60 +60 +60 +40 +C0 +80 +ENDCHAR +STARTCHAR asterisk +ENCODING 42 +SWIDTH 389 0 +DWIDTH 4 0 +BBX 3 3 0 5 +BITMAP +A0 +40 +A0 +ENDCHAR +STARTCHAR plus +ENCODING 43 +SWIDTH 584 0 +DWIDTH 6 0 +BBX 6 5 0 1 +BITMAP +30 +30 +FC +30 +30 +ENDCHAR +STARTCHAR comma +ENCODING 44 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 4 0 -2 +BITMAP +40 +40 +40 +80 +ENDCHAR +STARTCHAR minus +ENCODING 45 +SWIDTH 584 0 +DWIDTH 7 0 +BBX 5 1 1 3 +BITMAP +F8 +ENDCHAR +STARTCHAR period +ENCODING 46 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 1 2 1 0 +BITMAP +80 +80 +ENDCHAR +STARTCHAR slash +ENCODING 47 +SWIDTH 278 0 +DWIDTH 4 0 +BBX 4 8 0 0 +BITMAP +10 +10 +20 +20 +40 +40 +80 +80 +ENDCHAR +STARTCHAR zero +ENCODING 48 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +D8 +D8 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR one +ENCODING 49 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 4 8 0 0 +BITMAP +30 +F0 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR two +ENCODING 50 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +D8 +18 +18 +30 +60 +C0 +F8 +ENDCHAR +STARTCHAR three +ENCODING 51 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +D8 +18 +30 +18 +18 +D8 +70 +ENDCHAR +STARTCHAR four +ENCODING 52 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 8 0 0 +BITMAP +18 +38 +58 +58 +98 +FC +18 +18 +ENDCHAR +STARTCHAR five +ENCODING 53 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +C0 +C0 +F0 +18 +98 +D8 +70 +ENDCHAR +STARTCHAR six +ENCODING 54 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +D8 +C0 +F0 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR seven +ENCODING 55 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +18 +18 +30 +30 +30 +60 +60 +ENDCHAR +STARTCHAR eight +ENCODING 56 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +D8 +D8 +70 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR nine +ENCODING 57 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +D8 +D8 +D8 +78 +18 +D8 +70 +ENDCHAR +STARTCHAR colon +ENCODING 58 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 1 6 1 0 +BITMAP +80 +80 +00 +00 +80 +80 +ENDCHAR +STARTCHAR semicolon +ENCODING 59 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 2 8 0 -2 +BITMAP +40 +40 +00 +00 +40 +40 +40 +80 +ENDCHAR +STARTCHAR less +ENCODING 60 +SWIDTH 584 0 +DWIDTH 5 0 +BBX 4 5 0 1 +BITMAP +30 +60 +C0 +60 +30 +ENDCHAR +STARTCHAR equal +ENCODING 61 +SWIDTH 584 0 +DWIDTH 6 0 +BBX 5 3 0 2 +BITMAP +F8 +00 +F8 +ENDCHAR +STARTCHAR greater +ENCODING 62 +SWIDTH 584 0 +DWIDTH 5 0 +BBX 4 5 0 1 +BITMAP +C0 +60 +30 +60 +C0 +ENDCHAR +STARTCHAR question +ENCODING 63 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +D8 +18 +30 +60 +60 +00 +60 +ENDCHAR +STARTCHAR at +ENCODING 64 +SWIDTH 975 0 +DWIDTH 11 0 +BBX 10 9 0 -2 +BITMAP +1F00 +6080 +4D40 +9240 +A240 +A480 +9B00 +4000 +3E00 +ENDCHAR +STARTCHAR A +ENCODING 65 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +38 +38 +6C +6C +6C +FE +C6 +C6 +ENDCHAR +STARTCHAR B +ENCODING 66 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +F8 +CC +CC +F8 +CC +CC +CC +F8 +ENDCHAR +STARTCHAR C +ENCODING 67 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +3C +66 +C2 +C0 +C0 +C2 +66 +3C +ENDCHAR +STARTCHAR D +ENCODING 68 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +F0 +D8 +CC +CC +CC +CC +D8 +F0 +ENDCHAR +STARTCHAR E +ENCODING 69 +SWIDTH 667 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +C0 +C0 +F8 +C0 +C0 +C0 +F8 +ENDCHAR +STARTCHAR F +ENCODING 70 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +F8 +C0 +C0 +F0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR G +ENCODING 71 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +3C +66 +C2 +C0 +CE +C6 +66 +3A +ENDCHAR +STARTCHAR H +ENCODING 72 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +CC +CC +CC +FC +CC +CC +CC +CC +ENDCHAR +STARTCHAR I +ENCODING 73 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 8 0 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR J +ENCODING 74 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +18 +18 +18 +18 +18 +18 +D8 +70 +ENDCHAR +STARTCHAR K +ENCODING 75 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 7 8 0 0 +BITMAP +CC +D8 +F0 +E0 +F0 +D8 +CC +C6 +ENDCHAR +STARTCHAR L +ENCODING 76 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +F8 +ENDCHAR +STARTCHAR M +ENCODING 77 +SWIDTH 833 0 +DWIDTH 10 0 +BBX 9 8 0 0 +BITMAP +C180 +E380 +E380 +F780 +D580 +DD80 +C980 +C980 +ENDCHAR +STARTCHAR N +ENCODING 78 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +C6 +E6 +E6 +D6 +D6 +CE +CE +C6 +ENDCHAR +STARTCHAR O +ENCODING 79 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +38 +6C +C6 +C6 +C6 +C6 +6C +38 +ENDCHAR +STARTCHAR P +ENCODING 80 +SWIDTH 667 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +F8 +CC +CC +CC +F8 +C0 +C0 +C0 +ENDCHAR +STARTCHAR Q +ENCODING 81 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 9 0 -1 +BITMAP +38 +6C +C6 +C6 +C6 +D6 +6C +3C +02 +ENDCHAR +STARTCHAR R +ENCODING 82 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +F8 +CC +CC +CC +F8 +CC +CC +CC +ENDCHAR +STARTCHAR S +ENCODING 83 +SWIDTH 667 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +78 +CC +E0 +78 +1C +8C +CC +78 +ENDCHAR +STARTCHAR T +ENCODING 84 +SWIDTH 611 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +FC +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR U +ENCODING 85 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +CC +CC +CC +CC +CC +CC +CC +78 +ENDCHAR +STARTCHAR V +ENCODING 86 +SWIDTH 667 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +C6 +C6 +6C +6C +6C +38 +38 +10 +ENDCHAR +STARTCHAR W +ENCODING 87 +SWIDTH 944 0 +DWIDTH 11 0 +BBX 10 8 0 0 +BITMAP +CCC0 +CCC0 +CCC0 +6D80 +6D80 +7F80 +3300 +2100 +ENDCHAR +STARTCHAR X +ENCODING 88 +SWIDTH 667 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +C6 +C6 +6C +38 +38 +6C +C6 +C6 +ENDCHAR +STARTCHAR Y +ENCODING 89 +SWIDTH 667 0 +DWIDTH 9 0 +BBX 8 8 0 0 +BITMAP +C3 +C3 +66 +66 +3C +18 +18 +18 +ENDCHAR +STARTCHAR Z +ENCODING 90 +SWIDTH 611 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +FC +0C +18 +30 +70 +60 +C0 +FC +ENDCHAR +STARTCHAR bracketleft +ENCODING 91 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 10 0 -2 +BITMAP +E0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +E0 +ENDCHAR +STARTCHAR backslash +ENCODING 92 +SWIDTH 278 0 +DWIDTH 4 0 +BBX 4 8 0 0 +BITMAP +80 +80 +40 +40 +20 +20 +10 +10 +ENDCHAR +STARTCHAR bracketright +ENCODING 93 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 10 0 -2 +BITMAP +E0 +60 +60 +60 +60 +60 +60 +60 +60 +E0 +ENDCHAR +STARTCHAR asciicircum +ENCODING 94 +SWIDTH 584 0 +DWIDTH 5 0 +BBX 5 4 0 4 +BITMAP +20 +70 +D8 +88 +ENDCHAR +STARTCHAR underscore +ENCODING 95 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 1 0 -2 +BITMAP +FC +ENDCHAR +STARTCHAR quoteleft +ENCODING 96 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 3 0 5 +BITMAP +40 +80 +C0 +ENDCHAR +STARTCHAR a +ENCODING 97 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 6 0 0 +BITMAP +70 +98 +78 +D8 +D8 +6C +ENDCHAR +STARTCHAR b +ENCODING 98 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +C0 +C0 +F0 +D8 +C8 +C8 +D8 +F0 +ENDCHAR +STARTCHAR c +ENCODING 99 +SWIDTH 556 0 +DWIDTH 5 0 +BBX 4 6 0 0 +BITMAP +70 +D0 +C0 +C0 +D0 +70 +ENDCHAR +STARTCHAR d +ENCODING 100 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +18 +18 +78 +D8 +98 +98 +D8 +78 +ENDCHAR +STARTCHAR e +ENCODING 101 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 6 0 0 +BITMAP +70 +D8 +F8 +C0 +D8 +70 +ENDCHAR +STARTCHAR f +ENCODING 102 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 4 8 0 0 +BITMAP +70 +C0 +E0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR g +ENCODING 103 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 -2 +BITMAP +68 +D8 +98 +98 +D8 +78 +18 +70 +ENDCHAR +STARTCHAR h +ENCODING 104 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +C0 +C0 +F0 +D8 +D8 +D8 +D8 +D8 +ENDCHAR +STARTCHAR i +ENCODING 105 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 8 0 0 +BITMAP +C0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR j +ENCODING 106 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 10 0 -2 +BITMAP +C0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +80 +ENDCHAR +STARTCHAR k +ENCODING 107 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 8 0 0 +BITMAP +C0 +C0 +D8 +F0 +E0 +F0 +D8 +CC +ENDCHAR +STARTCHAR l +ENCODING 108 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 8 0 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR m +ENCODING 109 +SWIDTH 889 0 +DWIDTH 9 0 +BBX 8 6 0 0 +BITMAP +B6 +DB +DB +DB +DB +DB +ENDCHAR +STARTCHAR n +ENCODING 110 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 6 0 0 +BITMAP +B0 +D8 +D8 +D8 +D8 +D8 +ENDCHAR +STARTCHAR o +ENCODING 111 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 6 0 0 +BITMAP +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR p +ENCODING 112 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 -2 +BITMAP +B0 +D8 +C8 +C8 +D8 +F0 +C0 +C0 +ENDCHAR +STARTCHAR q +ENCODING 113 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 -2 +BITMAP +68 +D8 +98 +98 +D8 +78 +18 +18 +ENDCHAR +STARTCHAR r +ENCODING 114 +SWIDTH 389 0 +DWIDTH 4 0 +BBX 4 6 0 0 +BITMAP +B0 +E0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR s +ENCODING 115 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 6 0 0 +BITMAP +70 +D8 +70 +18 +D8 +70 +ENDCHAR +STARTCHAR t +ENCODING 116 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 8 0 0 +BITMAP +C0 +C0 +E0 +C0 +C0 +C0 +C0 +60 +ENDCHAR +STARTCHAR u +ENCODING 117 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 6 0 0 +BITMAP +D8 +D8 +D8 +D8 +D8 +68 +ENDCHAR +STARTCHAR v +ENCODING 118 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 6 0 0 +BITMAP +D8 +D8 +D8 +50 +70 +20 +ENDCHAR +STARTCHAR w +ENCODING 119 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 6 0 0 +BITMAP +D6 +D6 +D6 +6C +6C +6C +ENDCHAR +STARTCHAR x +ENCODING 120 +SWIDTH 556 0 +DWIDTH 7 0 +BBX 6 6 0 0 +BITMAP +CC +78 +30 +78 +CC +CC +ENDCHAR +STARTCHAR y +ENCODING 121 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 -2 +BITMAP +D8 +D8 +D8 +D8 +78 +30 +30 +60 +ENDCHAR +STARTCHAR z +ENCODING 122 +SWIDTH 500 0 +DWIDTH 6 0 +BBX 5 6 0 0 +BITMAP +F8 +18 +30 +60 +C0 +F8 +ENDCHAR +STARTCHAR braceleft +ENCODING 123 +SWIDTH 389 0 +DWIDTH 5 0 +BBX 4 10 0 -2 +BITMAP +30 +60 +60 +60 +C0 +60 +60 +60 +60 +30 +ENDCHAR +STARTCHAR bar +ENCODING 124 +SWIDTH 280 0 +DWIDTH 3 0 +BBX 1 10 1 -2 +BITMAP +80 +80 +80 +80 +80 +80 +80 +80 +80 +80 +ENDCHAR +STARTCHAR braceright +ENCODING 125 +SWIDTH 389 0 +DWIDTH 5 0 +BBX 4 10 0 -2 +BITMAP +C0 +60 +60 +60 +30 +60 +60 +60 +60 +C0 +ENDCHAR +STARTCHAR asciitilde +ENCODING 126 +SWIDTH 584 0 +DWIDTH 6 0 +BBX 6 2 0 2 +BITMAP +6C +D8 +ENDCHAR +STARTCHAR space +ENCODING 160 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR exclamdown +ENCODING 161 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 2 8 1 -2 +BITMAP +C0 +00 +40 +40 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR cent +ENCODING 162 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 -1 +BITMAP +10 +70 +D8 +A0 +A0 +D8 +70 +40 +ENDCHAR +STARTCHAR sterling +ENCODING 163 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +38 +68 +60 +F0 +60 +60 +68 +D8 +ENDCHAR +STARTCHAR currency +ENCODING 164 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 6 0 1 +BITMAP +D8 +70 +D8 +D8 +70 +D8 +ENDCHAR +STARTCHAR yen +ENCODING 165 +SWIDTH 556 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +84 +CC +48 +78 +FC +30 +FC +30 +ENDCHAR +STARTCHAR brokenbar +ENCODING 166 +SWIDTH 280 0 +DWIDTH 3 0 +BBX 1 10 1 -2 +BITMAP +80 +80 +80 +80 +00 +00 +80 +80 +80 +80 +ENDCHAR +STARTCHAR section +ENCODING 167 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 10 0 -2 +BITMAP +70 +C8 +E0 +70 +98 +C8 +70 +38 +98 +70 +ENDCHAR +STARTCHAR dieresis +ENCODING 168 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 3 1 0 7 +BITMAP +A0 +ENDCHAR +STARTCHAR copyright +ENCODING 169 +SWIDTH 737 0 +DWIDTH 10 0 +BBX 8 8 1 0 +BITMAP +3C +42 +99 +A5 +A1 +9D +42 +3C +ENDCHAR +STARTCHAR ordfeminine +ENCODING 170 +SWIDTH 370 0 +DWIDTH 5 0 +BBX 3 5 1 3 +BITMAP +E0 +20 +A0 +00 +E0 +ENDCHAR +STARTCHAR guillemotleft +ENCODING 171 +SWIDTH 556 0 +DWIDTH 7 0 +BBX 6 3 0 1 +BITMAP +6C +D8 +6C +ENDCHAR +STARTCHAR logicalnot +ENCODING 172 +SWIDTH 584 0 +DWIDTH 7 0 +BBX 5 3 1 2 +BITMAP +F8 +08 +08 +ENDCHAR +STARTCHAR hyphen +ENCODING 173 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 4 1 0 3 +BITMAP +F0 +ENDCHAR +STARTCHAR registered +ENCODING 174 +SWIDTH 737 0 +DWIDTH 10 0 +BBX 8 8 1 0 +BITMAP +3C +42 +BD +A5 +B9 +A5 +42 +3C +ENDCHAR +STARTCHAR macron +ENCODING 175 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 3 1 0 7 +BITMAP +E0 +ENDCHAR +STARTCHAR degree +ENCODING 176 +SWIDTH 400 0 +DWIDTH 4 0 +BBX 3 3 1 4 +BITMAP +60 +A0 +C0 +ENDCHAR +STARTCHAR plusminus +ENCODING 177 +SWIDTH 584 0 +DWIDTH 6 0 +BBX 6 7 0 0 +BITMAP +30 +30 +FC +30 +30 +00 +FC +ENDCHAR +STARTCHAR twosuperior +ENCODING 178 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 3 4 0 3 +BITMAP +60 +A0 +40 +E0 +ENDCHAR +STARTCHAR threesuperior +ENCODING 179 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 3 4 0 3 +BITMAP +E0 +40 +20 +C0 +ENDCHAR +STARTCHAR acute +ENCODING 180 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 2 2 0 7 +BITMAP +40 +80 +ENDCHAR +STARTCHAR mu +ENCODING 181 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 -2 +BITMAP +D8 +D8 +D8 +D8 +D8 +E8 +C0 +C0 +ENDCHAR +STARTCHAR paragraph +ENCODING 182 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 10 0 -2 +BITMAP +7C +E8 +E8 +E8 +68 +28 +28 +28 +28 +28 +ENDCHAR +STARTCHAR periodcentered +ENCODING 183 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 1 0 3 +BITMAP +C0 +ENDCHAR +STARTCHAR cedilla +ENCODING 184 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 2 2 0 -2 +BITMAP +40 +C0 +ENDCHAR +STARTCHAR onesuperior +ENCODING 185 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 2 4 0 3 +BITMAP +40 +C0 +40 +40 +ENDCHAR +STARTCHAR ordmasculine +ENCODING 186 +SWIDTH 365 0 +DWIDTH 5 0 +BBX 3 5 1 3 +BITMAP +E0 +A0 +E0 +00 +E0 +ENDCHAR +STARTCHAR guillemotright +ENCODING 187 +SWIDTH 556 0 +DWIDTH 7 0 +BBX 6 3 0 1 +BITMAP +D8 +6C +D8 +ENDCHAR +STARTCHAR onequarter +ENCODING 188 +SWIDTH 834 0 +DWIDTH 9 0 +BBX 8 8 0 0 +BITMAP +42 +C4 +48 +48 +12 +26 +2F +42 +ENDCHAR +STARTCHAR onehalf +ENCODING 189 +SWIDTH 834 0 +DWIDTH 9 0 +BBX 7 8 0 0 +BITMAP +42 +C4 +48 +48 +16 +2A +24 +4E +ENDCHAR +STARTCHAR threequarters +ENCODING 190 +SWIDTH 834 0 +DWIDTH 9 0 +BBX 8 8 0 0 +BITMAP +E2 +44 +28 +C8 +12 +26 +2F +42 +ENDCHAR +STARTCHAR questiondown +ENCODING 191 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 -2 +BITMAP +30 +00 +30 +30 +60 +C0 +D8 +70 +ENDCHAR +STARTCHAR Agrave +ENCODING 192 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +20 +10 +00 +38 +38 +6C +6C +6C +FE +C6 +C6 +ENDCHAR +STARTCHAR Aacute +ENCODING 193 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +08 +10 +00 +38 +38 +6C +6C +6C +FE +C6 +C6 +ENDCHAR +STARTCHAR Acircumflex +ENCODING 194 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +10 +28 +00 +38 +38 +6C +6C +6C +FE +C6 +C6 +ENDCHAR +STARTCHAR Atilde +ENCODING 195 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +14 +28 +00 +38 +38 +6C +6C +6C +FE +C6 +C6 +ENDCHAR +STARTCHAR Adieresis +ENCODING 196 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 10 0 0 +BITMAP +28 +00 +38 +38 +6C +6C +6C +FE +C6 +C6 +ENDCHAR +STARTCHAR Aring +ENCODING 197 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +10 +28 +10 +38 +38 +6C +6C +6C +FE +C6 +C6 +ENDCHAR +STARTCHAR AE +ENCODING 198 +SWIDTH 1000 0 +DWIDTH 10 0 +BBX 9 8 0 0 +BITMAP +3F80 +3C00 +6C00 +6F80 +6C00 +FC00 +CC00 +CF80 +ENDCHAR +STARTCHAR Ccedilla +ENCODING 199 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 10 0 -2 +BITMAP +3C +66 +C2 +C0 +C0 +C2 +66 +3C +10 +30 +ENDCHAR +STARTCHAR Egrave +ENCODING 200 +SWIDTH 667 0 +DWIDTH 6 0 +BBX 5 11 0 0 +BITMAP +40 +20 +00 +F8 +C0 +C0 +F8 +C0 +C0 +C0 +F8 +ENDCHAR +STARTCHAR Eacute +ENCODING 201 +SWIDTH 667 0 +DWIDTH 6 0 +BBX 5 11 0 0 +BITMAP +10 +20 +00 +F8 +C0 +C0 +F8 +C0 +C0 +C0 +F8 +ENDCHAR +STARTCHAR Ecircumflex +ENCODING 202 +SWIDTH 667 0 +DWIDTH 6 0 +BBX 5 11 0 0 +BITMAP +20 +50 +00 +F8 +C0 +C0 +F8 +C0 +C0 +C0 +F8 +ENDCHAR +STARTCHAR Edieresis +ENCODING 203 +SWIDTH 667 0 +DWIDTH 6 0 +BBX 5 10 0 0 +BITMAP +50 +00 +F8 +C0 +C0 +F8 +C0 +C0 +C0 +F8 +ENDCHAR +STARTCHAR Igrave +ENCODING 204 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 11 0 0 +BITMAP +80 +40 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR Iacute +ENCODING 205 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 11 0 0 +BITMAP +40 +80 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR Icircumflex +ENCODING 206 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 3 11 0 0 +BITMAP +40 +A0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR Idieresis +ENCODING 207 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 3 10 0 0 +BITMAP +A0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR Eth +ENCODING 208 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +F0 +D8 +CC +EC +CC +CC +D8 +F0 +ENDCHAR +STARTCHAR Ntilde +ENCODING 209 +SWIDTH 722 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +14 +28 +00 +C6 +C6 +E6 +D6 +D6 +CE +CE +C6 +ENDCHAR +STARTCHAR Ograve +ENCODING 210 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +20 +10 +00 +38 +6C +C6 +C6 +C6 +C6 +6C +38 +ENDCHAR +STARTCHAR Oacute +ENCODING 211 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +04 +08 +00 +38 +6C +C6 +C6 +C6 +C6 +6C +38 +ENDCHAR +STARTCHAR Ocircumflex +ENCODING 212 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +10 +28 +00 +38 +6C +C6 +C6 +C6 +C6 +6C +38 +ENDCHAR +STARTCHAR Otilde +ENCODING 213 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 11 0 0 +BITMAP +14 +28 +00 +38 +6C +C6 +C6 +C6 +C6 +6C +38 +ENDCHAR +STARTCHAR Odieresis +ENCODING 214 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 10 0 0 +BITMAP +28 +00 +38 +6C +C6 +C6 +C6 +C6 +6C +38 +ENDCHAR +STARTCHAR multiply +ENCODING 215 +SWIDTH 584 0 +DWIDTH 6 0 +BBX 6 5 0 1 +BITMAP +CC +78 +30 +78 +CC +ENDCHAR +STARTCHAR Oslash +ENCODING 216 +SWIDTH 778 0 +DWIDTH 8 0 +BBX 7 8 0 0 +BITMAP +3A +6C +CE +D6 +D6 +E6 +6C +B8 +ENDCHAR +STARTCHAR Ugrave +ENCODING 217 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 11 0 0 +BITMAP +20 +10 +00 +CC +CC +CC +CC +CC +CC +CC +78 +ENDCHAR +STARTCHAR Uacute +ENCODING 218 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 11 0 0 +BITMAP +08 +10 +00 +CC +CC +CC +CC +CC +CC +CC +78 +ENDCHAR +STARTCHAR Ucircumflex +ENCODING 219 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 11 0 0 +BITMAP +10 +28 +00 +CC +CC +CC +CC +CC +CC +CC +78 +ENDCHAR +STARTCHAR Udieresis +ENCODING 220 +SWIDTH 722 0 +DWIDTH 7 0 +BBX 6 10 0 0 +BITMAP +28 +00 +CC +CC +CC +CC +CC +CC +CC +78 +ENDCHAR +STARTCHAR Yacute +ENCODING 221 +SWIDTH 667 0 +DWIDTH 9 0 +BBX 8 11 0 0 +BITMAP +04 +08 +00 +C3 +C3 +66 +66 +3C +18 +18 +18 +ENDCHAR +STARTCHAR Thorn +ENCODING 222 +SWIDTH 667 0 +DWIDTH 7 0 +BBX 6 8 0 0 +BITMAP +C0 +F8 +CC +CC +CC +F8 +C0 +C0 +ENDCHAR +STARTCHAR germandbls +ENCODING 223 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 8 0 0 +BITMAP +70 +C8 +C8 +D0 +C8 +C8 +C8 +D0 +ENDCHAR +STARTCHAR agrave +ENCODING 224 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 9 0 0 +BITMAP +40 +20 +00 +70 +98 +78 +D8 +D8 +6C +ENDCHAR +STARTCHAR aacute +ENCODING 225 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 9 0 0 +BITMAP +08 +10 +00 +70 +98 +78 +D8 +D8 +6C +ENDCHAR +STARTCHAR acircumflex +ENCODING 226 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 9 0 0 +BITMAP +30 +68 +00 +70 +98 +78 +D8 +D8 +6C +ENDCHAR +STARTCHAR atilde +ENCODING 227 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 9 0 0 +BITMAP +28 +50 +00 +70 +98 +78 +D8 +D8 +6C +ENDCHAR +STARTCHAR adieresis +ENCODING 228 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 9 0 0 +BITMAP +50 +50 +00 +70 +98 +78 +D8 +D8 +6C +ENDCHAR +STARTCHAR aring +ENCODING 229 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 9 0 0 +BITMAP +20 +50 +20 +70 +98 +78 +D8 +D8 +6C +ENDCHAR +STARTCHAR ae +ENCODING 230 +SWIDTH 889 0 +DWIDTH 9 0 +BBX 8 6 0 0 +BITMAP +7E +9B +7F +D8 +DB +6E +ENDCHAR +STARTCHAR ccedilla +ENCODING 231 +SWIDTH 556 0 +DWIDTH 5 0 +BBX 4 8 0 -2 +BITMAP +70 +D0 +C0 +C0 +D0 +70 +20 +60 +ENDCHAR +STARTCHAR egrave +ENCODING 232 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +00 +70 +D8 +F8 +C0 +D8 +70 +ENDCHAR +STARTCHAR eacute +ENCODING 233 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +00 +70 +D8 +F8 +C0 +D8 +70 +ENDCHAR +STARTCHAR ecircumflex +ENCODING 234 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +00 +70 +D8 +F8 +C0 +D8 +70 +ENDCHAR +STARTCHAR edieresis +ENCODING 235 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +50 +00 +70 +D8 +F8 +C0 +D8 +70 +ENDCHAR +STARTCHAR igrave +ENCODING 236 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 9 0 0 +BITMAP +80 +40 +00 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR iacute +ENCODING 237 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 3 9 0 0 +BITMAP +20 +40 +00 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR icircumflex +ENCODING 238 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 3 9 -1 0 +BITMAP +40 +A0 +00 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR idieresis +ENCODING 239 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 3 9 0 0 +BITMAP +A0 +A0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR eth +ENCODING 240 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +60 +A0 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR ntilde +ENCODING 241 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +28 +50 +00 +B0 +D8 +D8 +D8 +D8 +D8 +ENDCHAR +STARTCHAR ograve +ENCODING 242 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR oacute +ENCODING 243 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR ocircumflex +ENCODING 244 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR otilde +ENCODING 245 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +A0 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR odieresis +ENCODING 246 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +50 +00 +70 +D8 +D8 +D8 +D8 +70 +ENDCHAR +STARTCHAR divide +ENCODING 247 +SWIDTH 584 0 +DWIDTH 6 0 +BBX 6 5 0 1 +BITMAP +30 +00 +FC +00 +30 +ENDCHAR +STARTCHAR oslash +ENCODING 248 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 6 6 0 0 +BITMAP +74 +D8 +F8 +D8 +D8 +70 +ENDCHAR +STARTCHAR ugrave +ENCODING 249 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +40 +20 +00 +D8 +D8 +D8 +D8 +D8 +68 +ENDCHAR +STARTCHAR uacute +ENCODING 250 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +10 +20 +00 +D8 +D8 +D8 +D8 +D8 +68 +ENDCHAR +STARTCHAR ucircumflex +ENCODING 251 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +20 +50 +00 +D8 +D8 +D8 +D8 +D8 +68 +ENDCHAR +STARTCHAR udieresis +ENCODING 252 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +50 +00 +D8 +D8 +D8 +D8 +D8 +68 +ENDCHAR +STARTCHAR yacute +ENCODING 253 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 11 0 -2 +BITMAP +10 +20 +00 +D8 +D8 +D8 +D8 +78 +30 +30 +60 +ENDCHAR +STARTCHAR thorn +ENCODING 254 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 5 10 0 -2 +BITMAP +C0 +C0 +F0 +D8 +C8 +C8 +D8 +F0 +C0 +C0 +ENDCHAR +STARTCHAR ydieresis +ENCODING 255 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 11 0 -2 +BITMAP +50 +50 +00 +D8 +D8 +D8 +D8 +78 +30 +30 +60 +ENDCHAR +STARTCHAR Lslash +ENCODING -1 +SWIDTH 611 0 +DWIDTH 6 0 +BBX 6 8 -1 0 +BITMAP +60 +60 +60 +70 +E0 +60 +60 +7C +ENDCHAR +STARTCHAR OE +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 10 0 +BBX 9 8 0 0 +BITMAP +3F80 +6C00 +CC00 +CF80 +CC00 +CC00 +6C00 +3F80 +ENDCHAR +STARTCHAR Scaron +ENCODING -1 +SWIDTH 667 0 +DWIDTH 7 0 +BBX 6 9 0 0 +BITMAP +28 +10 +00 +78 +CC +70 +3C +CC +78 +ENDCHAR +STARTCHAR Ydieresis +ENCODING -1 +SWIDTH 667 0 +DWIDTH 8 0 +BBX 8 8 0 0 +BITMAP +14 +00 +C3 +66 +3C +18 +18 +18 +ENDCHAR +STARTCHAR Zcaron +ENCODING -1 +SWIDTH 611 0 +DWIDTH 7 0 +BBX 6 9 0 0 +BITMAP +28 +10 +00 +FC +18 +30 +60 +C0 +FC +ENDCHAR +STARTCHAR breve +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 4 2 0 6 +BITMAP +90 +60 +ENDCHAR +STARTCHAR bullet +ENCODING -1 +SWIDTH 350 0 +DWIDTH 4 0 +BBX 2 2 1 2 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR caron +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 2 0 6 +BITMAP +A0 +40 +ENDCHAR +STARTCHAR circumflex +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 2 0 6 +BITMAP +40 +A0 +ENDCHAR +STARTCHAR dagger +ENCODING -1 +SWIDTH 556 0 +DWIDTH 7 0 +BBX 6 10 0 -2 +BITMAP +30 +30 +FC +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR daggerdbl +ENCODING -1 +SWIDTH 556 0 +DWIDTH 7 0 +BBX 6 10 0 -2 +BITMAP +30 +30 +FC +30 +30 +30 +FC +30 +30 +30 +ENDCHAR +STARTCHAR dotaccent +ENCODING -1 +SWIDTH 333 0 +DWIDTH 2 0 +BBX 1 1 0 7 +BITMAP +80 +ENDCHAR +STARTCHAR dotlessi +ENCODING -1 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 6 0 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR ellipsis +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 10 0 +BBX 8 1 1 0 +BITMAP +DB +ENDCHAR +STARTCHAR emdash +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 10 0 +BBX 10 1 0 3 +BITMAP +FFC0 +ENDCHAR +STARTCHAR endash +ENCODING -1 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 6 1 0 3 +BITMAP +FC +ENDCHAR +STARTCHAR fi +ENCODING -1 +SWIDTH 611 0 +DWIDTH 7 0 +BBX 7 8 -1 0 +BITMAP +36 +60 +F6 +66 +66 +66 +66 +66 +ENDCHAR +STARTCHAR fl +ENCODING -1 +SWIDTH 611 0 +DWIDTH 7 0 +BBX 7 8 -1 0 +BITMAP +36 +66 +F6 +66 +66 +66 +66 +66 +ENDCHAR +STARTCHAR florin +ENCODING -1 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 -2 +BITMAP +38 +60 +F8 +60 +60 +60 +60 +60 +C0 +ENDCHAR +STARTCHAR fraction +ENCODING -1 +SWIDTH 167 0 +DWIDTH 4 0 +BBX 5 7 -1 0 +BITMAP +08 +10 +10 +20 +40 +40 +80 +ENDCHAR +STARTCHAR grave +ENCODING -1 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 2 2 0 6 +BITMAP +80 +40 +ENDCHAR +STARTCHAR guilsinglleft +ENCODING -1 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 3 3 1 1 +BITMAP +60 +C0 +60 +ENDCHAR +STARTCHAR guilsinglright +ENCODING -1 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 3 3 1 1 +BITMAP +C0 +60 +C0 +ENDCHAR +STARTCHAR hungarumlaut +ENCODING -1 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 4 2 0 6 +BITMAP +50 +A0 +ENDCHAR +STARTCHAR lslash +ENCODING -1 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 4 8 -1 0 +BITMAP +60 +60 +60 +70 +E0 +60 +60 +60 +ENDCHAR +STARTCHAR oe +ENCODING -1 +SWIDTH 944 0 +DWIDTH 10 0 +BBX 9 6 0 0 +BITMAP +7700 +CD80 +CF80 +CC00 +CD80 +7700 +ENDCHAR +STARTCHAR ogonek +ENCODING -1 +SWIDTH 333 0 +DWIDTH 3 0 +BBX 2 2 0 -2 +BITMAP +80 +C0 +ENDCHAR +STARTCHAR perthousand +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 11 0 +BBX 10 7 0 0 +BITMAP +6200 +B400 +6800 +1000 +2D80 +56C0 +8D80 +ENDCHAR +STARTCHAR quotedblbase +ENCODING -1 +SWIDTH 500 0 +DWIDTH 6 0 +BBX 5 3 0 -2 +BITMAP +D8 +48 +90 +ENDCHAR +STARTCHAR quotedblleft +ENCODING -1 +SWIDTH 500 0 +DWIDTH 6 0 +BBX 5 3 0 5 +BITMAP +48 +90 +D8 +ENDCHAR +STARTCHAR quotedblright +ENCODING -1 +SWIDTH 500 0 +DWIDTH 6 0 +BBX 5 3 0 5 +BITMAP +D8 +48 +90 +ENDCHAR +STARTCHAR quotesinglbase +ENCODING -1 +SWIDTH 278 0 +DWIDTH 3 0 +BBX 2 3 0 -2 +BITMAP +C0 +40 +80 +ENDCHAR +STARTCHAR quotesingle +ENCODING -1 +SWIDTH 238 0 +DWIDTH 3 0 +BBX 1 3 1 5 +BITMAP +80 +80 +80 +ENDCHAR +STARTCHAR ring +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 3 3 0 5 +BITMAP +40 +A0 +40 +ENDCHAR +STARTCHAR scaron +ENCODING -1 +SWIDTH 556 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +50 +20 +00 +70 +D8 +70 +18 +D8 +70 +ENDCHAR +STARTCHAR tilde +ENCODING -1 +SWIDTH 333 0 +DWIDTH 4 0 +BBX 4 2 0 6 +BITMAP +50 +A0 +ENDCHAR +STARTCHAR trademark +ENCODING -1 +SWIDTH 1000 0 +DWIDTH 11 0 +BBX 9 4 1 3 +BITMAP +E880 +4D80 +4A80 +4A80 +ENDCHAR +STARTCHAR zcaron +ENCODING -1 +SWIDTH 500 0 +DWIDTH 5 0 +BBX 5 9 0 0 +BITMAP +50 +20 +00 +F8 +18 +30 +60 +C0 +F8 +ENDCHAR +ENDFONT diff --git a/bertos/fonts/helvB10.c b/bertos/fonts/helvB10.c new file mode 100644 index 0000000..b3282ce --- /dev/null +++ b/bertos/fonts/helvB10.c @@ -0,0 +1,1248 @@ +/* Generated by convbdf on Wed Apr 28 00:42:58 CEST 2010. */ +#include + +/* Font information: + + name: -Adobe-Helvetica-Bold-R-Normal--10-100-75-75-P-60-ISO8859-1 + pixel size: 10 + ascent: 10 + descent: 2 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_helvB10_glyphs[] = { + +/* Character (0x20): bbw=1, bbh=1, bbx=0, bby=0, width=3 */ +0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, /* */ + +/* Character (0x21): bbw=2, bbh=8, bbx=1, bby=0, width=4 */ +0x00, 0xfc, 0x3c, 0x00, /* ****** **** */ +0x00, 0x02, 0x02, 0x00, /* ****** **** * * */ + +/* Character (0x22): bbw=3, bbh=3, bbx=1, bby=5, width=5 */ +0x00, 0x1c, 0x00, 0x1c, 0x00, /* *** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** */ + +/* Character (0x23): bbw=6, bbh=7, bbx=0, bby=0, width=6 */ +0xa0, 0xf8, 0xa0, 0xf8, 0xa0, 0x20, /* * * ***** * * ***** * * * */ +0x03, 0x00, 0x03, 0x00, 0x00, 0x00, /* * * ***** * * ***** * * * ** ** */ + +/* Character (0x24): bbw=5, bbh=9, bbx=0, bby=-1, width=6 */ +0x30, 0x68, 0xfc, 0xc8, 0x90, 0x00, /* ** * ** ****** * ** * * */ +0x01, 0x02, 0x07, 0x02, 0x01, 0x00, /* ** * ** ****** * ** * * * * *** * * */ + +/* Character (0x25): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0x08, 0x14, 0x9c, 0x68, 0x90, 0x88, 0x04, 0x00, /* * * * *** * * ** * * * * * */ +0x02, 0x01, 0x00, 0x01, 0x02, 0x03, 0x01, 0x00, /* * * * *** * * ** * * * * * * * * * ** * */ + +/* Character (0x26): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xd8, 0xfc, 0x24, 0x7c, 0xd8, 0xc0, 0x40, 0x00, /* ** ** ****** * * ***** ** ** ** * */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x03, 0x02, 0x00, /* ** ** ****** * * ***** ** ** ** * * ** * ** * ** * */ + +/* Character (0x27): bbw=2, bbh=3, bbx=0, bby=5, width=3 */ +0x14, 0x0c, 0x00, /* * * ** */ +0x00, 0x00, 0x00, /* * * ** */ + +/* Character (0x28): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */ +0xe0, 0xf8, 0x0c, 0x00, /* *** ***** ** */ +0x01, 0x07, 0x0c, 0x00, /* *** ***** ** * *** ** */ + +/* Character (0x29): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */ +0x0c, 0xf8, 0xe0, 0x00, /* ** ***** *** */ +0x0c, 0x07, 0x01, 0x00, /* ** ***** *** ***** * */ + +/* Character (0x2a): bbw=3, bbh=3, bbx=0, bby=5, width=4 */ +0x14, 0x08, 0x14, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0x2b): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x40, 0x40, 0xf0, 0xf0, 0x40, 0x40, /* * * **** **** * * */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * * **** **** * * * * */ + +/* Character (0x2c): bbw=2, bbh=4, bbx=0, bby=-2, width=3 */ +0x00, 0x00, 0x00, /* */ +0x08, 0x07, 0x00, /* **** */ + +/* Character (0x2d): bbw=5, bbh=1, bbx=1, bby=3, width=7 */ +0x00, 0x40, 0x40, 0x40, 0x40, 0x40, 0x00, /* * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ + +/* Character (0x2e): bbw=1, bbh=2, bbx=1, bby=0, width=3 */ +0x00, 0x00, 0x00, /* */ +0x00, 0x03, 0x00, /* ** */ + +/* Character (0x2f): bbw=4, bbh=8, bbx=0, bby=0, width=4 */ +0x00, 0xc0, 0x30, 0x0c, /* ** ** ** */ +0x03, 0x00, 0x00, 0x00, /* ** ** ** ** */ + +/* Character (0x30): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf8, 0xfc, 0x04, 0xfc, 0xf8, 0x00, /* ***** ****** * ****** ***** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* ***** ****** * ****** ***** * ** * ** * */ + +/* Character (0x31): bbw=4, bbh=8, bbx=0, bby=0, width=6 */ +0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, /* * * ****** ****** */ +0x00, 0x00, 0x03, 0x03, 0x00, 0x00, /* * * ****** ****** ** ** */ + +/* Character (0x32): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x08, 0x8c, 0xc4, 0x7c, 0x38, 0x00, /* * ** * * ** ***** *** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* * ** * * ** ***** *** ** ** * * * */ + +/* Character (0x33): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x08, 0x0c, 0x24, 0xfc, 0xd8, 0x00, /* * ** * * ****** ** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * ** * * ****** ** ** * ** * ** * */ + +/* Character (0x34): bbw=6, bbh=8, bbx=0, bby=0, width=6 */ +0xc0, 0xb0, 0x88, 0xfc, 0xfc, 0x80, /* ** ** * * * ****** ****** * */ +0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* ** ** * * * ****** ****** * ** ** */ + +/* Character (0x35): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xbc, 0x3c, 0x24, 0xe4, 0xc4, 0x00, /* **** * **** * * * *** * ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* **** * **** * * * *** * ** * ** * ** * */ + +/* Character (0x36): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf8, 0xfc, 0x24, 0xec, 0xc8, 0x00, /* ***** ****** * * ** *** * ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* ***** ****** * * ** *** * ** * ** * ** * */ + +/* Character (0x37): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x04, 0x04, 0xe4, 0xfc, 0x1c, 0x00, /* * * * *** ****** *** */ +0x00, 0x03, 0x03, 0x00, 0x00, 0x00, /* * * * *** ****** *** ** ** */ + +/* Character (0x38): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xd8, 0xfc, 0x24, 0xfc, 0xd8, 0x00, /* ** ** ****** * * ****** ** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* ** ** ****** * * ****** ** ** * ** * ** * */ + +/* Character (0x39): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x38, 0x7c, 0x44, 0xfc, 0xf8, 0x00, /* *** ***** * * ****** ***** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** ***** * * ****** ***** * ** * ** * */ + +/* Character (0x3a): bbw=1, bbh=6, bbx=1, bby=0, width=3 */ +0x00, 0x30, 0x00, /* ** */ +0x00, 0x03, 0x00, /* ** ** */ + +/* Character (0x3b): bbw=2, bbh=8, bbx=0, bby=-2, width=3 */ +0x00, 0x30, 0x00, /* ** */ +0x08, 0x07, 0x00, /* ** **** */ + +/* Character (0x3c): bbw=4, bbh=5, bbx=0, bby=1, width=5 */ +0x40, 0xe0, 0xb0, 0x10, 0x00, /* * *** ** * * */ +0x00, 0x00, 0x01, 0x01, 0x00, /* * *** ** * * * * */ + +/* Character (0x3d): bbw=5, bbh=3, bbx=0, bby=2, width=6 */ +0xa0, 0xa0, 0xa0, 0xa0, 0xa0, 0x00, /* * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0x3e): bbw=4, bbh=5, bbx=0, bby=1, width=5 */ +0x10, 0xb0, 0xe0, 0x40, 0x00, /* * ** * *** * */ +0x01, 0x01, 0x00, 0x00, 0x00, /* * ** * *** * * * */ + +/* Character (0x3f): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x08, 0xcc, 0xe4, 0x3c, 0x18, 0x00, /* * ** ** * *** **** ** */ +0x00, 0x02, 0x02, 0x00, 0x00, 0x00, /* * ** ** * *** **** ** * * */ + +/* Character (0x40): bbw=10, bbh=9, bbx=0, bby=-2, width=11 */ +0xc0, 0x30, 0x90, 0x48, 0x28, 0x28, 0xc8, 0x28, 0x10, 0xe0, 0x00, /* ** ** * * * * * * * * * ** * * * *** */ +0x03, 0x04, 0x09, 0x0a, 0x0a, 0x09, 0x0a, 0x02, 0x01, 0x00, 0x00, /* ** ** * * * * * * * * * ** * * * *** ** * * * * * * ** * * * * * */ + +/* Character (0x41): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfc, 0x8c, 0xfc, 0xf0, 0x80, 0x00, /* * **** ****** ** * ****** **** * */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* * **** ****** ** * ****** **** * ** ** ** ** */ + +/* Character (0x42): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x24, 0x24, 0xfc, 0xd8, 0x00, /* ****** ****** * * * * ****** ** ** */ +0x03, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * * * * ****** ** ** ** ** * * ** * */ + +/* Character (0x43): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x04, 0x0c, 0x98, 0x00, /* **** ***** ** * * ** ** * */ +0x00, 0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* **** ***** ** * * ** ** * * ** * * ** * */ + +/* Character (0x44): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x04, 0x0c, 0xf8, 0xf0, 0x00, /* ****** ****** * ** ***** **** */ +0x03, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* ****** ****** * ** ***** **** ** ** * ** * */ + +/* Character (0x45): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x24, 0x24, 0x24, 0x00, /* ****** ****** * * * * * * */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* ****** ****** * * * * * * ** ** * * * */ + +/* Character (0x46): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x24, 0x24, 0x04, 0x00, /* ****** ****** * * * * * */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x00, /* ****** ****** * * * * * ** ** */ + +/* Character (0x47): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x44, 0xcc, 0xd8, 0x00, /* **** ***** ** * * * ** ** ** ** */ +0x00, 0x01, 0x03, 0x02, 0x02, 0x01, 0x03, 0x00, /* **** ***** ** * * * ** ** ** ** * ** * * * ** */ + +/* Character (0x48): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x20, 0x20, 0xfc, 0xfc, 0x00, /* ****** ****** * * ****** ****** */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /* ****** ****** * * ****** ****** ** ** ** ** */ + +/* Character (0x49): bbw=2, bbh=8, bbx=0, bby=0, width=3 */ +0xfc, 0xfc, 0x00, /* ****** ****** */ +0x03, 0x03, 0x00, /* ****** ****** ** ** */ + +/* Character (0x4a): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, /* ****** ****** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * ** * ** * */ + +/* Character (0x4b): bbw=7, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x70, 0xd8, 0x8c, 0x04, 0x00, /* ****** ****** *** ** ** ** * * */ +0x03, 0x03, 0x00, 0x00, 0x01, 0x03, 0x02, /* ****** ****** *** ** ** ** * * ** ** * ** * */ + +/* Character (0x4c): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, /* ****** ****** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* ****** ****** ** ** * * * */ + +/* Character (0x4d): bbw=9, bbh=8, bbx=0, bby=0, width=10 */ +0xfc, 0xfc, 0x38, 0xe0, 0x80, 0xe0, 0x38, 0xfc, 0xfc, 0x00, /* ****** ****** *** *** * *** *** ****** ****** */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /* ****** ****** *** *** * *** *** ****** ****** ** ** ** ** ** */ + +/* Character (0x4e): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xfc, 0xfc, 0x18, 0x60, 0x80, 0xfc, 0xfc, 0x00, /* ****** ****** ** ** * ****** ****** */ +0x03, 0x03, 0x00, 0x00, 0x01, 0x03, 0x03, 0x00, /* ****** ****** ** ** * ****** ****** ** ** * ** ** */ + +/* Character (0x4f): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x0c, 0xf8, 0xf0, 0x00, /* **** ***** ** * ** ***** **** */ +0x00, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* **** ***** ** * ** ***** **** * ** * ** * */ + +/* Character (0x50): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x44, 0x44, 0x7c, 0x38, 0x00, /* ****** ****** * * * * ***** *** */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** * * * * ***** *** ** ** */ + +/* Character (0x51): bbw=7, bbh=9, bbx=0, bby=-1, width=8 */ +0xf0, 0xf8, 0x0c, 0x84, 0x0c, 0xf8, 0xf0, 0x00, /* **** ***** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x02, 0x03, 0x03, 0x04, 0x00, /* **** ***** ** * * ** ***** **** * ** * ** ** * */ + +/* Character (0x52): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x44, 0x44, 0xfc, 0xb8, 0x00, /* ****** ****** * * * * ****** *** * */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /* ****** ****** * * * * ****** *** * ** ** ** ** */ + +/* Character (0x53): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0x98, 0x3c, 0x34, 0x64, 0xec, 0xc8, 0x00, /* ** * **** * ** * ** ** *** * ** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* ** * **** * ** * ** ** *** * ** * ** * * ** * */ + +/* Character (0x54): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0x04, 0x04, 0xfc, 0xfc, 0x04, 0x04, 0x00, /* * * ****** ****** * * */ +0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, /* * * ****** ****** * * ** ** */ + +/* Character (0x55): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x00, 0x00, 0xfc, 0xfc, 0x00, /* ****** ****** ****** ****** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* ****** ****** ****** ****** * ** * * ** * */ + +/* Character (0x56): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0x0c, 0x7c, 0xf0, 0x80, 0xf0, 0x7c, 0x0c, 0x00, /* ** ***** **** * **** ***** ** */ +0x00, 0x00, 0x01, 0x03, 0x01, 0x00, 0x00, 0x00, /* ** ***** **** * **** ***** ** * ** * */ + +/* Character (0x57): bbw=10, bbh=8, bbx=0, bby=0, width=11 */ +0x1c, 0xfc, 0xe0, 0x80, 0xfc, 0xfc, 0x80, 0xe0, 0xfc, 0x1c, 0x00, /* *** ****** *** * ****** ****** * *** ****** *** */ +0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x01, 0x03, 0x00, 0x00, 0x00, /* *** ****** *** * ****** ****** * *** ****** *** ** * * ** */ + +/* Character (0x58): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0x0c, 0x9c, 0xf0, 0x60, 0xf0, 0x9c, 0x0c, 0x00, /* ** *** * **** ** **** *** * ** */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* ** *** * **** ** **** *** * ** ** ** ** ** */ + +/* Character (0x59): bbw=8, bbh=8, bbx=0, bby=0, width=9 */ +0x0c, 0x3c, 0x70, 0xc0, 0xc0, 0x70, 0x3c, 0x0c, 0x00, /* ** **** *** ** ** *** **** ** */ +0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, /* ** **** *** ** ** *** **** ** ** ** */ + +/* Character (0x5a): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0x04, 0xc4, 0xe4, 0x74, 0x1c, 0x0c, 0x00, /* * * ** * *** * *** *** ** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x02, 0x00, /* * * ** * *** * *** *** ** ** ** * * * * */ + +/* Character (0x5b): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */ +0xfc, 0xfc, 0x04, 0x00, /* ****** ****** * */ +0x0f, 0x0f, 0x08, 0x00, /* ****** ****** * ******** * */ + +/* Character (0x5c): bbw=4, bbh=8, bbx=0, bby=0, width=4 */ +0x0c, 0x30, 0xc0, 0x00, /* ** ** ** */ +0x00, 0x00, 0x00, 0x03, /* ** ** ** ** */ + +/* Character (0x5d): bbw=3, bbh=10, bbx=0, bby=-2, width=4 */ +0x04, 0xfc, 0xfc, 0x00, /* * ****** ****** */ +0x08, 0x0f, 0x0f, 0x00, /* * ****** ****** ********* */ + +/* Character (0x5e): bbw=5, bbh=4, bbx=0, bby=4, width=5 */ +0x30, 0x18, 0x0c, 0x18, 0x30, /* ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** */ + +/* Character (0x5f): bbw=6, bbh=1, bbx=0, bby=-2, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x08, 0x08, 0x08, 0x08, 0x08, 0x08, /* * * * * * * */ + +/* Character (0x60): bbw=2, bbh=3, bbx=0, bby=5, width=3 */ +0x18, 0x14, 0x00, /* ** * * */ +0x00, 0x00, 0x00, /* ** * * */ + +/* Character (0x61): bbw=6, bbh=6, bbx=0, bby=0, width=6 */ +0xa0, 0xd0, 0x50, 0xf0, 0xe0, 0x00, /* * * * ** * * **** *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * ** * * **** *** * ** * * ** * */ + +/* Character (0x62): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x10, 0x30, 0xe0, 0x00, /* ****** ****** * ** *** */ +0x03, 0x03, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * ** *** ** ** * ** * */ + +/* Character (0x63): bbw=4, bbh=6, bbx=0, bby=0, width=5 */ +0xe0, 0xf0, 0x10, 0x30, 0x00, /* *** **** * ** */ +0x01, 0x03, 0x02, 0x03, 0x00, /* *** **** * ** * ** * ** */ + +/* Character (0x64): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xe0, 0x30, 0x10, 0xfc, 0xfc, 0x00, /* *** ** * ****** ****** */ +0x01, 0x03, 0x02, 0x03, 0x03, 0x00, /* *** ** * ****** ****** * ** * ** ** */ + +/* Character (0x65): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x50, 0x70, 0x60, 0x00, /* *** **** * * *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * * *** ** * ** * ** * */ + +/* Character (0x66): bbw=4, bbh=8, bbx=0, bby=0, width=4 */ +0xf8, 0xfc, 0x14, 0x04, /* ***** ****** * * * */ +0x03, 0x03, 0x00, 0x00, /* ***** ****** * * * ** ** */ + +/* Character (0x67): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xe0, 0x30, 0x10, 0xe0, 0xf0, 0x00, /* *** ** * *** **** */ +0x01, 0x0b, 0x0a, 0x0f, 0x07, 0x00, /* *** ** * *** **** * ** * * ******** */ + +/* Character (0x68): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x10, 0xf0, 0xe0, 0x00, /* ****** ****** * **** *** */ +0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /* ****** ****** * **** *** ** ** ** ** */ + +/* Character (0x69): bbw=2, bbh=8, bbx=0, bby=0, width=3 */ +0xf4, 0xf4, 0x00, /* * **** * **** */ +0x03, 0x03, 0x00, /* * **** * **** ** ** */ + +/* Character (0x6a): bbw=2, bbh=10, bbx=0, bby=-2, width=3 */ +0xf4, 0xf4, 0x00, /* * **** * **** */ +0x0f, 0x07, 0x00, /* * **** * **** ******* */ + +/* Character (0x6b): bbw=6, bbh=8, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0xe0, 0xb0, 0x10, 0x00, /* ****** ****** *** ** * * */ +0x03, 0x03, 0x00, 0x01, 0x03, 0x02, /* ****** ****** *** ** * * ** ** * ** * */ + +/* Character (0x6c): bbw=2, bbh=8, bbx=0, bby=0, width=3 */ +0xfc, 0xfc, 0x00, /* ****** ****** */ +0x03, 0x03, 0x00, /* ****** ****** ** ** */ + +/* Character (0x6d): bbw=8, bbh=6, bbx=0, bby=0, width=9 */ +0xf0, 0xe0, 0x10, 0xf0, 0xe0, 0x10, 0xf0, 0xe0, 0x00, /* **** *** * **** *** * **** *** */ +0x03, 0x03, 0x00, 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /* **** *** * **** *** * **** *** ** ** ** ** ** ** */ + +/* Character (0x6e): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0xf0, 0xe0, 0x10, 0xf0, 0xe0, 0x00, /* **** *** * **** *** */ +0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /* **** *** * **** *** ** ** ** ** */ + +/* Character (0x6f): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x10, 0xf0, 0xe0, 0x00, /* *** **** * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * **** *** * ** * ** * */ + +/* Character (0x70): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xf0, 0xe0, 0x10, 0x30, 0xe0, 0x00, /* **** *** * ** *** */ +0x0f, 0x0f, 0x02, 0x03, 0x01, 0x00, /* **** *** * ** *** ******** * ** * */ + +/* Character (0x71): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xe0, 0x30, 0x10, 0xe0, 0xf0, 0x00, /* *** ** * *** **** */ +0x01, 0x03, 0x02, 0x0f, 0x0f, 0x00, /* *** ** * *** **** * ** * ******** */ + +/* Character (0x72): bbw=4, bbh=6, bbx=0, bby=0, width=4 */ +0xf0, 0xe0, 0x30, 0x10, /* **** *** ** * */ +0x03, 0x03, 0x00, 0x00, /* **** *** ** * ** ** */ + +/* Character (0x73): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0x20, 0x70, 0x50, 0xf0, 0xa0, 0x00, /* * *** * * **** * * */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * *** * * **** * * * ** * ** * */ + +/* Character (0x74): bbw=3, bbh=8, bbx=0, bby=0, width=4 */ +0xfc, 0xfc, 0x10, 0x00, /* ****** ****** * */ +0x01, 0x03, 0x02, 0x00, /* ****** ****** * * ** * */ + +/* Character (0x75): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0xf0, 0xf0, 0x00, 0xf0, 0xf0, 0x00, /* **** **** **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** **** **** **** * ** * * ** */ + +/* Character (0x76): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0x70, 0xf0, 0x00, 0xf0, 0x70, 0x00, /* *** **** **** *** */ +0x00, 0x01, 0x03, 0x01, 0x00, 0x00, /* *** **** **** *** * ** * */ + +/* Character (0x77): bbw=7, bbh=6, bbx=0, bby=0, width=8 */ +0x70, 0xf0, 0x80, 0x70, 0x80, 0xf0, 0x70, 0x00, /* *** **** * *** * **** *** */ +0x00, 0x03, 0x03, 0x00, 0x03, 0x03, 0x00, 0x00, /* *** **** * *** * **** *** ** ** ** ** */ + +/* Character (0x78): bbw=6, bbh=6, bbx=0, bby=0, width=7 */ +0x10, 0xb0, 0xe0, 0xe0, 0xb0, 0x10, 0x00, /* * ** * *** *** ** * * */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x00, /* * ** * *** *** ** * * ** ** ** ** */ + +/* Character (0x79): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xf0, 0xf0, 0x00, 0xf0, 0xf0, 0x00, /* **** **** **** **** */ +0x00, 0x09, 0x0f, 0x07, 0x01, 0x00, /* **** **** **** **** * ******** * */ + +/* Character (0x7a): bbw=5, bbh=6, bbx=0, bby=0, width=6 */ +0x10, 0x90, 0xd0, 0x70, 0x30, 0x00, /* * * * * ** *** ** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* * * * * ** *** ** ** ** * * * */ + +/* Character (0x7b): bbw=4, bbh=10, bbx=0, bby=-2, width=5 */ +0x40, 0xf8, 0xbc, 0x04, 0x00, /* * ***** **** * * */ +0x00, 0x07, 0x0f, 0x08, 0x00, /* * ***** **** * * *** **** * */ + +/* Character (0x7c): bbw=1, bbh=10, bbx=1, bby=-2, width=3 */ +0x00, 0xfc, 0x00, /* ****** */ +0x00, 0x0f, 0x00, /* ****** **** */ + +/* Character (0x7d): bbw=4, bbh=10, bbx=0, bby=-2, width=5 */ +0x04, 0xbc, 0xf8, 0x40, 0x00, /* * **** * ***** * */ +0x08, 0x0f, 0x07, 0x00, 0x00, /* * **** * ***** * ******** */ + +/* Character (0x7e): bbw=6, bbh=2, bbx=0, bby=2, width=6 */ +0x80, 0xc0, 0x40, 0x80, 0xc0, 0x40, /* * ** * * ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * * ** * */ + +/* Character (0xa0): bbw=1, bbh=1, bbx=0, bby=0, width=3 */ +0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, /* */ + +/* Character (0xa1): bbw=2, bbh=8, bbx=1, bby=-2, width=4 */ +0x00, 0x10, 0xd0, 0x00, /* * * ** */ +0x00, 0x0f, 0x0f, 0x00, /* * * ** ******** */ + +/* Character (0xa2): bbw=5, bbh=8, bbx=0, bby=-1, width=6 */ +0xe0, 0x30, 0xd0, 0x38, 0x20, 0x00, /* *** ** * ** *** * */ +0x01, 0x07, 0x02, 0x03, 0x01, 0x00, /* *** ** * ** *** * * *** * ** * */ + +/* Character (0xa3): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0x20, 0xf8, 0xfc, 0x24, 0x0c, 0x00, /* * ***** ****** * * ** */ +0x02, 0x03, 0x01, 0x02, 0x03, 0x00, /* * ***** ****** * * ** * ** * * ** */ + +/* Character (0xa4): bbw=5, bbh=6, bbx=0, bby=1, width=6 */ +0x68, 0xf8, 0x90, 0xf8, 0x68, 0x00, /* * ** ***** * * ***** * ** */ +0x01, 0x01, 0x00, 0x01, 0x01, 0x00, /* * ** ***** * * ***** * ** * * * * */ + +/* Character (0xa5): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0x4c, 0x78, 0xe0, 0xe0, 0x78, 0x4c, 0x00, /* ** * **** *** *** **** ** * */ +0x01, 0x01, 0x03, 0x03, 0x01, 0x01, 0x00, /* ** * **** *** *** **** ** * * * ** ** * * */ + +/* Character (0xa6): bbw=1, bbh=10, bbx=1, bby=-2, width=3 */ +0x00, 0x3c, 0x00, /* **** */ +0x00, 0x0f, 0x00, /* **** **** */ + +/* Character (0xa7): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */ +0xd8, 0xbc, 0x34, 0x64, 0xc8, 0x00, /* ** ** **** * * ** * ** * ** */ +0x04, 0x09, 0x0b, 0x0f, 0x06, 0x00, /* ** ** **** * * ** * ** * ** * * *** ***** ** */ + +/* Character (0xa8): bbw=3, bbh=1, bbx=0, bby=7, width=3 */ +0x04, 0x00, 0x04, /* * * */ +0x00, 0x00, 0x00, /* * * */ + +/* Character (0xa9): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0xf0, 0x08, 0x64, 0x94, 0x94, 0xa4, 0x08, 0xf0, 0x00, /* **** * * ** * * * * * * * * * * **** */ +0x00, 0x00, 0x01, 0x02, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, /* **** * * ** * * * * * * * * * * **** * * * * * * */ + +/* Character (0xaa): bbw=3, bbh=5, bbx=1, bby=3, width=5 */ +0x00, 0x54, 0x44, 0x5c, 0x00, /* * * * * * *** * */ +0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * *** * */ + +/* Character (0xab): bbw=6, bbh=3, bbx=0, bby=1, width=7 */ +0x80, 0xc0, 0x40, 0x80, 0xc0, 0x40, 0x00, /* * ** * * ** * */ +0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, /* * ** * * ** * * * * * */ + +/* Character (0xac): bbw=5, bbh=3, bbx=1, bby=2, width=7 */ +0x00, 0x20, 0x20, 0x20, 0x20, 0xe0, 0x00, /* * * * * *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * *** */ + +/* Character (0xad): bbw=4, bbh=1, bbx=0, bby=3, width=5 */ +0x40, 0x40, 0x40, 0x40, 0x00, /* * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0xae): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0xf0, 0x08, 0xf4, 0x54, 0x54, 0xb4, 0x08, 0xf0, 0x00, /* **** * * **** * * * * * * * ** * * **** */ +0x00, 0x00, 0x01, 0x02, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, /* **** * * **** * * * * * * * ** * * **** * * * * * * */ + +/* Character (0xaf): bbw=3, bbh=1, bbx=0, bby=7, width=3 */ +0x04, 0x04, 0x04, /* * * * */ +0x00, 0x00, 0x00, /* * * * */ + +/* Character (0xb0): bbw=3, bbh=3, bbx=1, bby=4, width=4 */ +0x00, 0x30, 0x28, 0x18, /* ** * * ** */ +0x00, 0x00, 0x00, 0x00, /* ** * * ** */ + +/* Character (0xb1): bbw=6, bbh=7, bbx=0, bby=0, width=6 */ +0x20, 0x20, 0xf8, 0xf8, 0x20, 0x20, /* * * ***** ***** * * */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x02, /* * * ***** ***** * * * * * * * * */ + +/* Character (0xb2): bbw=3, bbh=4, bbx=0, bby=3, width=3 */ +0x50, 0x68, 0x58, /* * * * ** ** * */ +0x00, 0x00, 0x00, /* * * * ** ** * */ + +/* Character (0xb3): bbw=3, bbh=4, bbx=0, bby=3, width=3 */ +0x48, 0x58, 0x28, /* * * ** * * * */ +0x00, 0x00, 0x00, /* * * ** * * * */ + +/* Character (0xb4): bbw=2, bbh=2, bbx=0, bby=7, width=3 */ +0x04, 0x02, 0x00, /* * * */ +0x00, 0x00, 0x00, /* * * */ + +/* Character (0xb5): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0xf0, 0xf0, 0x00, 0xf0, 0xf0, 0x00, /* **** **** **** **** */ +0x0f, 0x0f, 0x02, 0x01, 0x03, 0x00, /* **** **** **** **** ******** * * ** */ + +/* Character (0xb6): bbw=6, bbh=10, bbx=0, bby=-2, width=6 */ +0x38, 0x7c, 0xfc, 0x04, 0xfc, 0x04, /* *** ***** ****** * ****** * */ +0x00, 0x00, 0x0f, 0x00, 0x0f, 0x00, /* *** ***** ****** * ****** * **** **** */ + +/* Character (0xb7): bbw=2, bbh=1, bbx=0, bby=3, width=3 */ +0x40, 0x40, 0x00, /* * * */ +0x00, 0x00, 0x00, /* * * */ + +/* Character (0xb8): bbw=2, bbh=2, bbx=0, bby=-2, width=3 */ +0x00, 0x00, 0x00, /* */ +0x08, 0x0c, 0x00, /* * ** */ + +/* Character (0xb9): bbw=2, bbh=4, bbx=0, bby=3, width=3 */ +0x10, 0x78, 0x00, /* * **** */ +0x00, 0x00, 0x00, /* * **** */ + +/* Character (0xba): bbw=3, bbh=5, bbx=1, bby=3, width=5 */ +0x00, 0x5c, 0x54, 0x5c, 0x00, /* *** * * * * *** * */ +0x00, 0x00, 0x00, 0x00, 0x00, /* *** * * * * *** * */ + +/* Character (0xbb): bbw=6, bbh=3, bbx=0, bby=1, width=7 */ +0x40, 0xc0, 0x80, 0x40, 0xc0, 0x80, 0x00, /* * ** * * ** * */ +0x01, 0x01, 0x00, 0x01, 0x01, 0x00, 0x00, /* * ** * * ** * * * * * */ + +/* Character (0xbc): bbw=8, bbh=8, bbx=0, bby=0, width=9 */ +0x08, 0x3c, 0x80, 0x40, 0x30, 0x88, 0xc4, 0x00, 0x00, /* * **** * * ** * * * ** */ +0x00, 0x02, 0x01, 0x00, 0x01, 0x01, 0x03, 0x01, 0x00, /* * **** * * ** * * * ** * * * * ** * */ + +/* Character (0xbd): bbw=7, bbh=8, bbx=0, bby=0, width=9 */ +0x08, 0x3c, 0x80, 0x40, 0xb0, 0x48, 0xc4, 0x00, 0x00, /* * **** * * ** * * * * ** */ +0x00, 0x02, 0x01, 0x00, 0x02, 0x03, 0x02, 0x00, 0x00, /* * **** * * ** * * * * ** * * * ** * */ + +/* Character (0xbe): bbw=8, bbh=8, bbx=0, bby=0, width=9 */ +0x24, 0x2c, 0x94, 0x40, 0x30, 0x88, 0xc4, 0x00, 0x00, /* * * ** * * * * * ** * * * ** */ +0x00, 0x02, 0x01, 0x00, 0x01, 0x01, 0x03, 0x01, 0x00, /* * * ** * * * * * ** * * * ** * * * * ** * */ + +/* Character (0xbf): bbw=5, bbh=8, bbx=0, bby=-2, width=6 */ +0x00, 0x00, 0xd0, 0xd0, 0x00, 0x00, /* * ** * ** */ +0x06, 0x0f, 0x09, 0x0c, 0x04, 0x00, /* * ** * ** ** ***** * ** * */ + +/* Character (0xc0): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfc, 0x8d, 0xfc, 0xf0, 0x80, 0x00, /* * **** ******* ** * ****** **** * */ +0x03, 0x03, 0x08, 0x00, 0x00, 0x03, 0x03, 0x00, /* * **** ******* ** * ****** **** * ** ** * ** ** */ + +/* Character (0xc1): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfc, 0x8d, 0xfc, 0xf0, 0x80, 0x00, /* * **** ******* ** * ****** **** * */ +0x03, 0x03, 0x00, 0x00, 0x08, 0x03, 0x03, 0x00, /* * **** ******* ** * ****** **** * ** ** *** ** */ + +/* Character (0xc2): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfd, 0x8c, 0xfd, 0xf0, 0x80, 0x00, /* * ***** ****** ** ** ****** **** * */ +0x03, 0x03, 0x00, 0x08, 0x00, 0x03, 0x03, 0x00, /* * ***** ****** ** ** ****** **** * ** ** * ** ** */ + +/* Character (0xc3): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfd, 0x8c, 0xfd, 0xf0, 0x80, 0x00, /* * ***** ****** ** ** ****** **** * */ +0x03, 0x03, 0x00, 0x08, 0x00, 0x0b, 0x03, 0x00, /* * ***** ****** ** ** ****** **** * ** ** * ** *** */ + +/* Character (0xc4): bbw=7, bbh=10, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfd, 0x8c, 0xfd, 0xf0, 0x80, 0x00, /* * ***** ****** ** ** ****** **** * */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* * ***** ****** ** ** ****** **** * ** ** ** ** */ + +/* Character (0xc5): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0x80, 0xf0, 0xfd, 0x8e, 0xfd, 0xf0, 0x80, 0x00, /* * ***** ****** *** ** ****** **** * */ +0x03, 0x03, 0x00, 0x08, 0x00, 0x03, 0x03, 0x00, /* * ***** ****** *** ** ****** **** * ** ** * ** ** */ + +/* Character (0xc6): bbw=9, bbh=8, bbx=0, bby=0, width=10 */ +0x80, 0xf0, 0xfc, 0x8c, 0xfc, 0xfc, 0x24, 0x24, 0x24, 0x00, /* * **** ****** ** * ****** ****** * * * * * * */ +0x03, 0x03, 0x00, 0x00, 0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* * **** ****** ** * ****** ****** * * * * * * ** ** ** ** * * * */ + +/* Character (0xc7): bbw=7, bbh=10, bbx=0, bby=-2, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x04, 0x0c, 0x98, 0x00, /* **** ***** ** * * ** ** * */ +0x00, 0x01, 0x0b, 0x0e, 0x02, 0x03, 0x01, 0x00, /* **** ***** ** * * ** ** * * ** * *** * ** * */ + +/* Character (0xc8): bbw=5, bbh=11, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x25, 0x24, 0x24, 0x00, /* ****** ******* * * * * * * */ +0x03, 0x0b, 0x02, 0x02, 0x02, 0x00, /* ****** ******* * * * * * * ** ** * * * * */ + +/* Character (0xc9): bbw=5, bbh=11, bbx=0, bby=0, width=6 */ +0xfc, 0xfc, 0x25, 0x24, 0x24, 0x00, /* ****** ******* * * * * * * */ +0x03, 0x03, 0x02, 0x0a, 0x02, 0x00, /* ****** ******* * * * * * * ** ** * * * * */ + +/* Character (0xca): bbw=5, bbh=11, bbx=0, bby=0, width=6 */ +0xfc, 0xfd, 0x24, 0x25, 0x24, 0x00, /* ******* ****** * * * * * * * */ +0x03, 0x03, 0x0a, 0x02, 0x02, 0x00, /* ******* ****** * * * * * * * ** ** * * * * */ + +/* Character (0xcb): bbw=5, bbh=10, bbx=0, bby=0, width=6 */ +0xfc, 0xfd, 0x24, 0x25, 0x24, 0x00, /* ******* ****** * * * * * * * */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x00, /* ******* ****** * * * * * * * ** ** * * * */ + +/* Character (0xcc): bbw=2, bbh=11, bbx=0, bby=0, width=3 */ +0xfc, 0xfd, 0x00, /* ******* ****** */ +0x0b, 0x03, 0x00, /* ******* ****** ** *** */ + +/* Character (0xcd): bbw=2, bbh=11, bbx=0, bby=0, width=3 */ +0xfd, 0xfc, 0x00, /* * ****** ****** */ +0x03, 0x0b, 0x00, /* * ****** ****** ** ** * */ + +/* Character (0xce): bbw=3, bbh=11, bbx=0, bby=0, width=3 */ +0xfd, 0xfc, 0x01, /* * ****** ******* */ +0x03, 0x0b, 0x00, /* * ****** ******* ** ** * */ + +/* Character (0xcf): bbw=3, bbh=10, bbx=0, bby=0, width=3 */ +0xfd, 0xfc, 0x01, /* * ****** ******* */ +0x03, 0x03, 0x00, /* * ****** ******* ** ** */ + +/* Character (0xd0): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x24, 0x0c, 0xf8, 0xf0, 0x00, /* ****** ****** * * ** ***** **** */ +0x03, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* ****** ****** * * ** ***** **** ** ** * ** * */ + +/* Character (0xd1): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xfc, 0xfc, 0x11, 0x60, 0x81, 0xfc, 0xfc, 0x00, /* ****** ******* * ** * * ****** ****** */ +0x03, 0x03, 0x00, 0x08, 0x01, 0x0b, 0x03, 0x00, /* ****** ******* * ** * * ****** ****** ** ** ** ** *** */ + +/* Character (0xd2): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x05, 0x0c, 0xf8, 0xf0, 0x00, /* **** ***** ** * * ** ***** **** */ +0x00, 0x01, 0x0b, 0x02, 0x03, 0x01, 0x00, 0x00, /* **** ***** ** * * ** ***** **** * ** * * ** * */ + +/* Character (0xd3): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0c, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /* **** ***** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x02, 0x03, 0x09, 0x00, 0x00, /* **** ***** ** * * ** ***** **** * ** * ** * * */ + +/* Character (0xd4): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0d, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /* **** ****** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x0a, 0x03, 0x01, 0x00, 0x00, /* **** ****** ** * * ** ***** **** * ** * *** * */ + +/* Character (0xd5): bbw=7, bbh=11, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0d, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /* **** ****** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x0a, 0x03, 0x09, 0x00, 0x00, /* **** ****** ** * * ** ***** **** * ** * *** * * */ + +/* Character (0xd6): bbw=7, bbh=10, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x0d, 0x04, 0x0d, 0xf8, 0xf0, 0x00, /* **** ****** ** * * ** ***** **** */ +0x00, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* **** ****** ** * * ** ***** **** * ** * ** * */ + +/* Character (0xd7): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x10, 0xb0, 0xe0, 0xe0, 0xb0, 0x10, /* * ** * *** *** ** * * */ +0x01, 0x01, 0x00, 0x00, 0x01, 0x01, /* * ** * *** *** ** * * * * * * */ + +/* Character (0xd8): bbw=7, bbh=8, bbx=0, bby=0, width=8 */ +0xf0, 0xf8, 0x8c, 0x64, 0x1c, 0xf8, 0xf4, 0x00, /* **** ***** ** * * ** *** ***** * **** */ +0x02, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, 0x00, /* **** ***** ** * * ** *** ***** * **** * * ** * ** * */ + +/* Character (0xd9): bbw=6, bbh=11, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x00, 0x01, 0xfc, 0xfc, 0x00, /* ****** ****** * ****** ****** */ +0x01, 0x03, 0x0a, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * ****** ****** * ** * * * ** * */ + +/* Character (0xda): bbw=6, bbh=11, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x00, 0x01, 0xfc, 0xfc, 0x00, /* ****** ****** * ****** ****** */ +0x01, 0x03, 0x02, 0x02, 0x0b, 0x01, 0x00, /* ****** ****** * ****** ****** * ** * * ** ** */ + +/* Character (0xdb): bbw=6, bbh=11, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x01, 0x00, 0xfd, 0xfc, 0x00, /* ****** ******* * ****** ****** */ +0x01, 0x03, 0x02, 0x0a, 0x03, 0x01, 0x00, /* ****** ******* * ****** ****** * ** * * *** * */ + +/* Character (0xdc): bbw=6, bbh=10, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x01, 0x00, 0xfd, 0xfc, 0x00, /* ****** ******* * ****** ****** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, /* ****** ******* * ****** ****** * ** * * ** * */ + +/* Character (0xdd): bbw=8, bbh=11, bbx=0, bby=0, width=9 */ +0x0c, 0x3c, 0x70, 0xc0, 0xc1, 0x70, 0x3c, 0x0c, 0x00, /* ** **** *** *** ** *** **** ** */ +0x00, 0x00, 0x00, 0x03, 0x03, 0x08, 0x00, 0x00, 0x00, /* ** **** *** *** ** *** **** ** ** ** * */ + +/* Character (0xde): bbw=6, bbh=8, bbx=0, bby=0, width=7 */ +0xfc, 0xfc, 0x88, 0x88, 0xf8, 0x70, 0x00, /* ****** ****** * * * * ***** *** */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** * * * * ***** *** ** ** */ + +/* Character (0xdf): bbw=5, bbh=8, bbx=0, bby=0, width=6 */ +0xf8, 0xfc, 0x04, 0x24, 0xd8, 0x00, /* ***** ****** * * * ** ** */ +0x03, 0x03, 0x00, 0x02, 0x01, 0x00, /* ***** ****** * * * ** ** ** ** * * */ + +/* Character (0xe0): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd2, 0x54, 0xf0, 0xe0, 0x00, /* * * * * ** * * * **** *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * * ** * * * **** *** * ** * * ** * */ + +/* Character (0xe1): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd0, 0x50, 0xf4, 0xe2, 0x00, /* * * * ** * * * **** * *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * ** * * * **** * *** * ** * * ** * */ + +/* Character (0xe2): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd4, 0x56, 0xf2, 0xe4, 0x00, /* * * * * ** ** * * * **** * *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * * ** ** * * * **** * *** * ** * * ** * */ + +/* Character (0xe3): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd4, 0x52, 0xf4, 0xe2, 0x00, /* * * * * ** * * * * **** * *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * * ** * * * * **** * *** * ** * * ** * */ + +/* Character (0xe4): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd6, 0x50, 0xf6, 0xe0, 0x00, /* * * ** * ** * * ** **** *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * ** * ** * * ** **** *** * ** * * ** * */ + +/* Character (0xe5): bbw=6, bbh=9, bbx=0, bby=0, width=6 */ +0xa0, 0xd4, 0x5a, 0xf4, 0xe0, 0x00, /* * * * * ** * ** * * **** *** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, /* * * * * ** * ** * * **** *** * ** * * ** * */ + +/* Character (0xe6): bbw=8, bbh=6, bbx=0, bby=0, width=9 */ +0xa0, 0xd0, 0x50, 0xf0, 0xf0, 0x50, 0x70, 0x60, 0x00, /* * * * ** * * **** **** * * *** ** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * * * ** * * **** **** * * *** ** * ** * * ** * ** * */ + +/* Character (0xe7): bbw=4, bbh=8, bbx=0, bby=-2, width=5 */ +0xe0, 0xf0, 0x10, 0x30, 0x00, /* *** **** * ** */ +0x01, 0x0b, 0x0e, 0x03, 0x00, /* *** **** * ** * ** * ***** */ + +/* Character (0xe8): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf2, 0x54, 0x70, 0x60, 0x00, /* *** * **** * * * *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** * **** * * * *** ** * ** * ** * */ + +/* Character (0xe9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x54, 0x72, 0x60, 0x00, /* *** **** * * * * *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * * * * *** ** * ** * ** * */ + +/* Character (0xea): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf4, 0x52, 0x74, 0x60, 0x00, /* *** * **** * * * * *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** * **** * * * * *** ** * ** * ** * */ + +/* Character (0xeb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf6, 0x50, 0x76, 0x60, 0x00, /* *** ** **** * * ** *** ** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** ** **** * * ** *** ** * ** * ** * */ + +/* Character (0xec): bbw=2, bbh=9, bbx=0, bby=0, width=3 */ +0xf2, 0xf4, 0x00, /* * **** * **** */ +0x03, 0x03, 0x00, /* * **** * **** ** ** */ + +/* Character (0xed): bbw=3, bbh=9, bbx=0, bby=0, width=3 */ +0xf0, 0xf4, 0x02, /* **** * **** * */ +0x03, 0x03, 0x00, /* **** * **** * ** ** */ + +/* Character (0xee): bbw=3, bbh=9, bbx=0, bby=0, width=4 */ +0x04, 0xf2, 0xf4, 0x00, /* * * **** * **** */ +0x00, 0x03, 0x03, 0x00, /* * * **** * **** ** ** */ + +/* Character (0xef): bbw=3, bbh=9, bbx=0, bby=0, width=3 */ +0xf6, 0xf0, 0x06, /* ** **** **** ** */ +0x03, 0x03, 0x00, /* ** **** **** ** ** ** */ + +/* Character (0xf0): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe8, 0xf6, 0x1c, 0xf2, 0xe0, 0x00, /* * *** ** **** *** * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * *** ** **** *** * **** *** * ** * ** * */ + +/* Character (0xf1): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xe4, 0x12, 0xf4, 0xe2, 0x00, /* **** * *** * * * **** * *** */ +0x03, 0x03, 0x00, 0x03, 0x03, 0x00, /* **** * *** * * * **** * *** ** ** ** ** */ + +/* Character (0xf2): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf2, 0x14, 0xf0, 0xe0, 0x00, /* *** * **** * * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** * **** * * **** *** * ** * ** * */ + +/* Character (0xf3): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x14, 0xf2, 0xe0, 0x00, /* *** **** * * * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * * * **** *** * ** * ** * */ + +/* Character (0xf4): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf4, 0x12, 0xf4, 0xe0, 0x00, /* *** * **** * * * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** * **** * * * **** *** * ** * ** * */ + +/* Character (0xf5): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe4, 0xf2, 0x14, 0xf2, 0xe0, 0x00, /* * *** * **** * * * **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* * *** * **** * * * **** *** * ** * ** * */ + +/* Character (0xf6): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xe0, 0xf6, 0x10, 0xf6, 0xe0, 0x00, /* *** ** **** * ** **** *** */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** ** **** * ** **** *** * ** * ** * */ + +/* Character (0xf7): bbw=6, bbh=5, bbx=0, bby=1, width=6 */ +0x40, 0x40, 0x50, 0x50, 0x40, 0x40, /* * * * * * * * * */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * * * * * * * * * * */ + +/* Character (0xf8): bbw=6, bbh=6, bbx=0, bby=0, width=6 */ +0xe0, 0xf0, 0x50, 0xf0, 0xe0, 0x10, /* *** **** * * **** *** * */ +0x01, 0x03, 0x02, 0x03, 0x01, 0x00, /* *** **** * * **** *** * * ** * ** * */ + +/* Character (0xf9): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xf2, 0x04, 0xf0, 0xf0, 0x00, /* **** * **** * **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** * **** * **** **** * ** * * ** */ + +/* Character (0xfa): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xf0, 0x04, 0xf2, 0xf0, 0x00, /* **** **** * * **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** **** * * **** **** * ** * * ** */ + +/* Character (0xfb): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xf4, 0x02, 0xf4, 0xf0, 0x00, /* **** * **** * * **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** * **** * * **** **** * ** * * ** */ + +/* Character (0xfc): bbw=5, bbh=9, bbx=0, bby=0, width=6 */ +0xf0, 0xf6, 0x00, 0xf6, 0xf0, 0x00, /* **** ** **** ** **** **** */ +0x01, 0x03, 0x02, 0x01, 0x03, 0x00, /* **** ** **** ** **** **** * ** * * ** */ + +/* Character (0xfd): bbw=5, bbh=11, bbx=0, bby=-2, width=6 */ +0xf0, 0xf0, 0x04, 0xf2, 0xf0, 0x00, /* **** **** * * **** **** */ +0x00, 0x09, 0x0f, 0x07, 0x01, 0x00, /* **** **** * * **** **** * ******** * */ + +/* Character (0xfe): bbw=5, bbh=10, bbx=0, bby=-2, width=6 */ +0xfc, 0xfc, 0x10, 0x30, 0xe0, 0x00, /* ****** ****** * ** *** */ +0x0f, 0x0f, 0x02, 0x03, 0x01, 0x00, /* ****** ****** * ** *** ******** * ** * */ + +/* Character (0xff): bbw=5, bbh=11, bbx=0, bby=-2, width=6 */ +0xf0, 0xf6, 0x00, 0xf6, 0xf0, 0x00, /* **** ** **** ** **** **** */ +0x00, 0x09, 0x0f, 0x07, 0x01, 0x00, /* **** ** **** ** **** **** * ******** * */ +}; + +/* Character->glyph data. */ +static const PROGMEM uint16_t helvB10_offset[] = { + 0, /* (0x20) */ + 6, /* (0x21) */ + 14, /* (0x22) */ + 24, /* (0x23) */ + 36, /* (0x24) */ + 48, /* (0x25) */ + 64, /* (0x26) */ + 80, /* (0x27) */ + 86, /* (0x28) */ + 94, /* (0x29) */ + 102, /* (0x2a) */ + 110, /* (0x2b) */ + 122, /* (0x2c) */ + 128, /* (0x2d) */ + 142, /* (0x2e) */ + 148, /* (0x2f) */ + 156, /* (0x30) */ + 168, /* (0x31) */ + 180, /* (0x32) */ + 192, /* (0x33) */ + 204, /* (0x34) */ + 216, /* (0x35) */ + 228, /* (0x36) */ + 240, /* (0x37) */ + 252, /* (0x38) */ + 264, /* (0x39) */ + 276, /* (0x3a) */ + 282, /* (0x3b) */ + 288, /* (0x3c) */ + 298, /* (0x3d) */ + 310, /* (0x3e) */ + 320, /* (0x3f) */ + 332, /* (0x40) */ + 354, /* (0x41) */ + 370, /* (0x42) */ + 384, /* (0x43) */ + 400, /* (0x44) */ + 414, /* (0x45) */ + 426, /* (0x46) */ + 438, /* (0x47) */ + 454, /* (0x48) */ + 468, /* (0x49) */ + 474, /* (0x4a) */ + 486, /* (0x4b) */ + 500, /* (0x4c) */ + 512, /* (0x4d) */ + 532, /* (0x4e) */ + 548, /* (0x4f) */ + 564, /* (0x50) */ + 578, /* (0x51) */ + 594, /* (0x52) */ + 608, /* (0x53) */ + 622, /* (0x54) */ + 636, /* (0x55) */ + 650, /* (0x56) */ + 666, /* (0x57) */ + 688, /* (0x58) */ + 704, /* (0x59) */ + 722, /* (0x5a) */ + 736, /* (0x5b) */ + 744, /* (0x5c) */ + 752, /* (0x5d) */ + 760, /* (0x5e) */ + 770, /* (0x5f) */ + 782, /* (0x60) */ + 788, /* (0x61) */ + 800, /* (0x62) */ + 812, /* (0x63) */ + 822, /* (0x64) */ + 834, /* (0x65) */ + 846, /* (0x66) */ + 854, /* (0x67) */ + 866, /* (0x68) */ + 878, /* (0x69) */ + 884, /* (0x6a) */ + 890, /* (0x6b) */ + 902, /* (0x6c) */ + 908, /* (0x6d) */ + 926, /* (0x6e) */ + 938, /* (0x6f) */ + 950, /* (0x70) */ + 962, /* (0x71) */ + 974, /* (0x72) */ + 982, /* (0x73) */ + 994, /* (0x74) */ + 1002, /* (0x75) */ + 1014, /* (0x76) */ + 1026, /* (0x77) */ + 1042, /* (0x78) */ + 1056, /* (0x79) */ + 1068, /* (0x7a) */ + 1080, /* (0x7b) */ + 1090, /* (0x7c) */ + 1096, /* (0x7d) */ + 1106, /* (0x7e) */ + 0, /* (0x7f) */ + 0, /* (0x80) */ + 0, /* (0x81) */ + 0, /* (0x82) */ + 0, /* (0x83) */ + 0, /* (0x84) */ + 0, /* (0x85) */ + 0, /* (0x86) */ + 0, /* (0x87) */ + 0, /* (0x88) */ + 0, /* (0x89) */ + 0, /* (0x8a) */ + 0, /* (0x8b) */ + 0, /* (0x8c) */ + 0, /* (0x8d) */ + 0, /* (0x8e) */ + 0, /* (0x8f) */ + 0, /* (0x90) */ + 0, /* (0x91) */ + 0, /* (0x92) */ + 0, /* (0x93) */ + 0, /* (0x94) */ + 0, /* (0x95) */ + 0, /* (0x96) */ + 0, /* (0x97) */ + 0, /* (0x98) */ + 0, /* (0x99) */ + 0, /* (0x9a) */ + 0, /* (0x9b) */ + 0, /* (0x9c) */ + 0, /* (0x9d) */ + 0, /* (0x9e) */ + 0, /* (0x9f) */ + 1118, /* (0xa0) */ + 1124, /* (0xa1) */ + 1132, /* (0xa2) */ + 1144, /* (0xa3) */ + 1156, /* (0xa4) */ + 1168, /* (0xa5) */ + 1182, /* (0xa6) */ + 1188, /* (0xa7) */ + 1200, /* (0xa8) */ + 1206, /* (0xa9) */ + 1226, /* (0xaa) */ + 1236, /* (0xab) */ + 1250, /* (0xac) */ + 1264, /* (0xad) */ + 1274, /* (0xae) */ + 1294, /* (0xaf) */ + 1300, /* (0xb0) */ + 1308, /* (0xb1) */ + 1320, /* (0xb2) */ + 1326, /* (0xb3) */ + 1332, /* (0xb4) */ + 1338, /* (0xb5) */ + 1350, /* (0xb6) */ + 1362, /* (0xb7) */ + 1368, /* (0xb8) */ + 1374, /* (0xb9) */ + 1380, /* (0xba) */ + 1390, /* (0xbb) */ + 1404, /* (0xbc) */ + 1422, /* (0xbd) */ + 1440, /* (0xbe) */ + 1458, /* (0xbf) */ + 1470, /* (0xc0) */ + 1486, /* (0xc1) */ + 1502, /* (0xc2) */ + 1518, /* (0xc3) */ + 1534, /* (0xc4) */ + 1550, /* (0xc5) */ + 1566, /* (0xc6) */ + 1586, /* (0xc7) */ + 1602, /* (0xc8) */ + 1614, /* (0xc9) */ + 1626, /* (0xca) */ + 1638, /* (0xcb) */ + 1650, /* (0xcc) */ + 1656, /* (0xcd) */ + 1662, /* (0xce) */ + 1668, /* (0xcf) */ + 1674, /* (0xd0) */ + 1688, /* (0xd1) */ + 1704, /* (0xd2) */ + 1720, /* (0xd3) */ + 1736, /* (0xd4) */ + 1752, /* (0xd5) */ + 1768, /* (0xd6) */ + 1784, /* (0xd7) */ + 1796, /* (0xd8) */ + 1812, /* (0xd9) */ + 1826, /* (0xda) */ + 1840, /* (0xdb) */ + 1854, /* (0xdc) */ + 1868, /* (0xdd) */ + 1886, /* (0xde) */ + 1900, /* (0xdf) */ + 1912, /* (0xe0) */ + 1924, /* (0xe1) */ + 1936, /* (0xe2) */ + 1948, /* (0xe3) */ + 1960, /* (0xe4) */ + 1972, /* (0xe5) */ + 1984, /* (0xe6) */ + 2002, /* (0xe7) */ + 2012, /* (0xe8) */ + 2024, /* (0xe9) */ + 2036, /* (0xea) */ + 2048, /* (0xeb) */ + 2060, /* (0xec) */ + 2066, /* (0xed) */ + 2072, /* (0xee) */ + 2080, /* (0xef) */ + 2086, /* (0xf0) */ + 2098, /* (0xf1) */ + 2110, /* (0xf2) */ + 2122, /* (0xf3) */ + 2134, /* (0xf4) */ + 2146, /* (0xf5) */ + 2158, /* (0xf6) */ + 2170, /* (0xf7) */ + 2182, /* (0xf8) */ + 2194, /* (0xf9) */ + 2206, /* (0xfa) */ + 2218, /* (0xfb) */ + 2230, /* (0xfc) */ + 2242, /* (0xfd) */ + 2254, /* (0xfe) */ + 2266, /* (0xff) */ +}; + +/* Character width data. */ +static const PROGMEM uint8_t helvB10_width[] = { + 3, /* (0x20) */ + 4, /* (0x21) */ + 5, /* (0x22) */ + 6, /* (0x23) */ + 6, /* (0x24) */ + 8, /* (0x25) */ + 8, /* (0x26) */ + 3, /* (0x27) */ + 4, /* (0x28) */ + 4, /* (0x29) */ + 4, /* (0x2a) */ + 6, /* (0x2b) */ + 3, /* (0x2c) */ + 7, /* (0x2d) */ + 3, /* (0x2e) */ + 4, /* (0x2f) */ + 6, /* (0x30) */ + 6, /* (0x31) */ + 6, /* (0x32) */ + 6, /* (0x33) */ + 6, /* (0x34) */ + 6, /* (0x35) */ + 6, /* (0x36) */ + 6, /* (0x37) */ + 6, /* (0x38) */ + 6, /* (0x39) */ + 3, /* (0x3a) */ + 3, /* (0x3b) */ + 5, /* (0x3c) */ + 6, /* (0x3d) */ + 5, /* (0x3e) */ + 6, /* (0x3f) */ + 11, /* (0x40) */ + 8, /* (0x41) */ + 7, /* (0x42) */ + 8, /* (0x43) */ + 7, /* (0x44) */ + 6, /* (0x45) */ + 6, /* (0x46) */ + 8, /* (0x47) */ + 7, /* (0x48) */ + 3, /* (0x49) */ + 6, /* (0x4a) */ + 7, /* (0x4b) */ + 6, /* (0x4c) */ + 10, /* (0x4d) */ + 8, /* (0x4e) */ + 8, /* (0x4f) */ + 7, /* (0x50) */ + 8, /* (0x51) */ + 7, /* (0x52) */ + 7, /* (0x53) */ + 7, /* (0x54) */ + 7, /* (0x55) */ + 8, /* (0x56) */ + 11, /* (0x57) */ + 8, /* (0x58) */ + 9, /* (0x59) */ + 7, /* (0x5a) */ + 4, /* (0x5b) */ + 4, /* (0x5c) */ + 4, /* (0x5d) */ + 5, /* (0x5e) */ + 6, /* (0x5f) */ + 3, /* (0x60) */ + 6, /* (0x61) */ + 6, /* (0x62) */ + 5, /* (0x63) */ + 6, /* (0x64) */ + 6, /* (0x65) */ + 4, /* (0x66) */ + 6, /* (0x67) */ + 6, /* (0x68) */ + 3, /* (0x69) */ + 3, /* (0x6a) */ + 6, /* (0x6b) */ + 3, /* (0x6c) */ + 9, /* (0x6d) */ + 6, /* (0x6e) */ + 6, /* (0x6f) */ + 6, /* (0x70) */ + 6, /* (0x71) */ + 4, /* (0x72) */ + 6, /* (0x73) */ + 4, /* (0x74) */ + 6, /* (0x75) */ + 6, /* (0x76) */ + 8, /* (0x77) */ + 7, /* (0x78) */ + 6, /* (0x79) */ + 6, /* (0x7a) */ + 5, /* (0x7b) */ + 3, /* (0x7c) */ + 5, /* (0x7d) */ + 6, /* (0x7e) */ + 3, /* (0x7f) */ + 3, /* (0x80) */ + 3, /* (0x81) */ + 3, /* (0x82) */ + 3, /* (0x83) */ + 3, /* (0x84) */ + 3, /* (0x85) */ + 3, /* (0x86) */ + 3, /* (0x87) */ + 3, /* (0x88) */ + 3, /* (0x89) */ + 3, /* (0x8a) */ + 3, /* (0x8b) */ + 3, /* (0x8c) */ + 3, /* (0x8d) */ + 3, /* (0x8e) */ + 3, /* (0x8f) */ + 3, /* (0x90) */ + 3, /* (0x91) */ + 3, /* (0x92) */ + 3, /* (0x93) */ + 3, /* (0x94) */ + 3, /* (0x95) */ + 3, /* (0x96) */ + 3, /* (0x97) */ + 3, /* (0x98) */ + 3, /* (0x99) */ + 3, /* (0x9a) */ + 3, /* (0x9b) */ + 3, /* (0x9c) */ + 3, /* (0x9d) */ + 3, /* (0x9e) */ + 3, /* (0x9f) */ + 3, /* (0xa0) */ + 4, /* (0xa1) */ + 6, /* (0xa2) */ + 6, /* (0xa3) */ + 6, /* (0xa4) */ + 7, /* (0xa5) */ + 3, /* (0xa6) */ + 6, /* (0xa7) */ + 3, /* (0xa8) */ + 10, /* (0xa9) */ + 5, /* (0xaa) */ + 7, /* (0xab) */ + 7, /* (0xac) */ + 5, /* (0xad) */ + 10, /* (0xae) */ + 3, /* (0xaf) */ + 4, /* (0xb0) */ + 6, /* (0xb1) */ + 3, /* (0xb2) */ + 3, /* (0xb3) */ + 3, /* (0xb4) */ + 6, /* (0xb5) */ + 6, /* (0xb6) */ + 3, /* (0xb7) */ + 3, /* (0xb8) */ + 3, /* (0xb9) */ + 5, /* (0xba) */ + 7, /* (0xbb) */ + 9, /* (0xbc) */ + 9, /* (0xbd) */ + 9, /* (0xbe) */ + 6, /* (0xbf) */ + 8, /* (0xc0) */ + 8, /* (0xc1) */ + 8, /* (0xc2) */ + 8, /* (0xc3) */ + 8, /* (0xc4) */ + 8, /* (0xc5) */ + 10, /* (0xc6) */ + 8, /* (0xc7) */ + 6, /* (0xc8) */ + 6, /* (0xc9) */ + 6, /* (0xca) */ + 6, /* (0xcb) */ + 3, /* (0xcc) */ + 3, /* (0xcd) */ + 3, /* (0xce) */ + 3, /* (0xcf) */ + 7, /* (0xd0) */ + 8, /* (0xd1) */ + 8, /* (0xd2) */ + 8, /* (0xd3) */ + 8, /* (0xd4) */ + 8, /* (0xd5) */ + 8, /* (0xd6) */ + 6, /* (0xd7) */ + 8, /* (0xd8) */ + 7, /* (0xd9) */ + 7, /* (0xda) */ + 7, /* (0xdb) */ + 7, /* (0xdc) */ + 9, /* (0xdd) */ + 7, /* (0xde) */ + 6, /* (0xdf) */ + 6, /* (0xe0) */ + 6, /* (0xe1) */ + 6, /* (0xe2) */ + 6, /* (0xe3) */ + 6, /* (0xe4) */ + 6, /* (0xe5) */ + 9, /* (0xe6) */ + 5, /* (0xe7) */ + 6, /* (0xe8) */ + 6, /* (0xe9) */ + 6, /* (0xea) */ + 6, /* (0xeb) */ + 3, /* (0xec) */ + 3, /* (0xed) */ + 4, /* (0xee) */ + 3, /* (0xef) */ + 6, /* (0xf0) */ + 6, /* (0xf1) */ + 6, /* (0xf2) */ + 6, /* (0xf3) */ + 6, /* (0xf4) */ + 6, /* (0xf5) */ + 6, /* (0xf6) */ + 6, /* (0xf7) */ + 6, /* (0xf8) */ + 6, /* (0xf9) */ + 6, /* (0xfa) */ + 6, /* (0xfb) */ + 6, /* (0xfc) */ + 6, /* (0xfd) */ + 6, /* (0xfe) */ + 6, /* (0xff) */ +}; + +/* Font structure definition. */ +EXTERN_CONST Font font_helvB10 = +{ + /* .glyph = */ font_helvB10_glyphs, + /* .name = "helvB10", */ + /* .width = */ 11, + /* .height = */ 12, + /* .ascent = 10, */ + /* .first = */ 32, + /* .last = */ 255, + /* .offset = */ helvB10_offset, + /* .width = */ helvB10_width, +}; diff --git a/bertos/fonts/luBS14.bdf b/bertos/fonts/luBS14.bdf new file mode 100644 index 0000000..90c37be --- /dev/null +++ b/bertos/fonts/luBS14.bdf @@ -0,0 +1,13542 @@ +STARTFONT 2.1 +COMMENT $Xorg: $ +COMMENT ISO10646-1 extension by Markus Kuhn , 2001-03-20 +COMMENT (c) Copyright Bigelow & Holmes 1986, 1985. Lucida is a registered +COMMENT trademark of Bigelow & Holmes. See LEGAL NOTICE file for terms +COMMENT of the license. +COMMENT GRID 0014 0014 0200 0200 +FONT -B&H-Lucida-Bold-R-Normal-Sans-14-140-75-75-P-92-ISO10646-1 +SIZE 14 72 72 +FONTBOUNDINGBOX 18 21 -1 -5 +STARTPROPERTIES 22 +COMMENT Begin LogicalFontDescription +FONTNAME_REGISTRY "" +FOUNDRY "B&H" +FAMILY_NAME "Lucida" +WEIGHT_NAME "Bold" +SLANT "R" +SETWIDTH_NAME "Normal" +ADD_STYLE_NAME "Sans" +PIXEL_SIZE 14 +POINT_SIZE 140 +RESOLUTION_X 75 +RESOLUTION_Y 75 +SPACING "P" +AVERAGE_WIDTH 92 +CHARSET_REGISTRY "ISO10646" +CHARSET_ENCODING "1" +COMMENT END LogicalFontDescription +FONT_ASCENT 13 +FONT_DESCENT 2 +DEFAULT_CHAR 0 +COPYRIGHT "Copyright Bigelow & Holmes 1986, 1985." +FACE_NAME "Lucida Sans Bold" +X_HEIGHT 8 +CAP_HEIGHT 10 +ENDPROPERTIES +CHARS 756 +STARTCHAR char0 +ENCODING 0 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 7 9 2 0 +BITMAP +AA +00 +82 +00 +82 +00 +82 +00 +AA +ENDCHAR +STARTCHAR space +ENCODING 32 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR exclam +ENCODING 33 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 10 1 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +80 +80 +00 +C0 +C0 +ENDCHAR +STARTCHAR quotedbl +ENCODING 34 +SWIDTH 530 0 +DWIDTH 7 0 +BBX 5 4 1 7 +BITMAP +D8 +D8 +90 +90 +ENDCHAR +STARTCHAR numbersign +ENCODING 35 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 9 10 0 0 +BITMAP +1B00 +1B00 +1B00 +7F80 +3600 +3600 +FF80 +6C00 +6C00 +6C00 +ENDCHAR +STARTCHAR dollar +ENCODING 36 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 12 1 -1 +BITMAP +10 +7C +D6 +D0 +F0 +70 +1C +1E +16 +D6 +7C +10 +ENDCHAR +STARTCHAR percent +ENCODING 37 +SWIDTH 898 0 +DWIDTH 12 0 +BBX 10 10 1 0 +BITMAP +7000 +D980 +DB00 +7200 +0400 +0800 +1380 +36C0 +66C0 +0380 +ENDCHAR +STARTCHAR ampersand +ENCODING 38 +SWIDTH 792 0 +DWIDTH 11 0 +BBX 9 10 1 0 +BITMAP +3C00 +6600 +6600 +6400 +3980 +5980 +CD00 +C600 +E700 +7980 +ENDCHAR +STARTCHAR quotesingle +ENCODING 39 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 4 1 7 +BITMAP +C0 +C0 +80 +80 +ENDCHAR +STARTCHAR parenleft +ENCODING 40 +SWIDTH 386 0 +DWIDTH 6 0 +BBX 4 12 1 -1 +BITMAP +30 +60 +60 +C0 +C0 +C0 +C0 +C0 +C0 +60 +60 +30 +ENDCHAR +STARTCHAR parenright +ENCODING 41 +SWIDTH 386 0 +DWIDTH 6 0 +BBX 4 12 1 -1 +BITMAP +C0 +60 +60 +30 +30 +30 +30 +30 +30 +60 +60 +C0 +ENDCHAR +STARTCHAR asterisk +ENCODING 42 +SWIDTH 464 0 +DWIDTH 7 0 +BBX 5 5 1 5 +BITMAP +20 +A8 +70 +A8 +20 +ENDCHAR +STARTCHAR plus +ENCODING 43 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 7 1 1 +BITMAP +10 +10 +10 +FE +10 +10 +10 +ENDCHAR +STARTCHAR comma +ENCODING 44 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 2 4 1 -2 +BITMAP +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR hyphen +ENCODING 45 +SWIDTH 289 0 +DWIDTH 5 0 +BBX 3 1 1 4 +BITMAP +E0 +ENDCHAR +STARTCHAR period +ENCODING 46 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 2 2 1 0 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR slash +ENCODING 47 +SWIDTH 596 0 +DWIDTH 8 0 +BBX 8 12 0 -1 +BITMAP +03 +06 +06 +0C +0C +18 +18 +30 +30 +60 +60 +C0 +ENDCHAR +STARTCHAR zero +ENCODING 48 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +3C +66 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR one +ENCODING 49 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 5 10 2 0 +BITMAP +18 +F8 +18 +18 +18 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR two +ENCODING 50 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +7E +C7 +03 +03 +06 +0C +18 +60 +FF +FF +ENDCHAR +STARTCHAR three +ENCODING 51 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +7E +C7 +03 +06 +3C +06 +03 +03 +C7 +7E +ENDCHAR +STARTCHAR four +ENCODING 52 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +0C +1C +2C +4C +8C +FF +FF +0C +0C +0C +ENDCHAR +STARTCHAR five +ENCODING 53 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 10 2 0 +BITMAP +FC +FC +80 +80 +FC +0E +06 +06 +CC +78 +ENDCHAR +STARTCHAR six +ENCODING 54 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +3E +63 +C0 +DC +E6 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR seven +ENCODING 55 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +FF +FF +06 +0C +18 +30 +30 +60 +60 +60 +ENDCHAR +STARTCHAR eight +ENCODING 56 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +7E +C7 +C3 +72 +3C +4E +C7 +C3 +E3 +7E +ENDCHAR +STARTCHAR nine +ENCODING 57 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +3C +66 +C3 +C3 +C3 +67 +1B +03 +C6 +7C +ENDCHAR +STARTCHAR colon +ENCODING 58 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 2 7 1 0 +BITMAP +C0 +C0 +00 +00 +00 +C0 +C0 +ENDCHAR +STARTCHAR semicolon +ENCODING 59 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 2 9 1 -2 +BITMAP +C0 +C0 +00 +00 +00 +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR less +ENCODING 60 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 6 7 2 1 +BITMAP +0C +38 +60 +C0 +60 +38 +0C +ENDCHAR +STARTCHAR equal +ENCODING 61 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 3 1 3 +BITMAP +FE +00 +FE +ENDCHAR +STARTCHAR greater +ENCODING 62 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 6 7 2 1 +BITMAP +C0 +70 +18 +0C +18 +70 +C0 +ENDCHAR +STARTCHAR question +ENCODING 63 +SWIDTH 572 0 +DWIDTH 8 0 +BBX 6 10 1 0 +BITMAP +78 +CC +0C +0C +18 +30 +30 +00 +30 +30 +ENDCHAR +STARTCHAR at +ENCODING 64 +SWIDTH 833 0 +DWIDTH 12 0 +BBX 10 10 1 0 +BITMAP +1E00 +6100 +4180 +8F80 +9980 +9980 +9980 +4EC0 +6000 +1F00 +ENDCHAR +STARTCHAR A +ENCODING 65 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 10 1 0 +BITMAP +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR B +ENCODING 66 +SWIDTH 669 0 +DWIDTH 10 0 +BBX 7 10 2 0 +BITMAP +FC +C6 +C6 +CC +F0 +CC +C6 +C6 +C6 +FC +ENDCHAR +STARTCHAR C +ENCODING 67 +SWIDTH 726 0 +DWIDTH 11 0 +BBX 8 10 2 0 +BITMAP +3E +63 +C0 +C0 +C0 +C0 +C0 +C0 +63 +3E +ENDCHAR +STARTCHAR D +ENCODING 68 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 9 10 2 0 +BITMAP +FE00 +C300 +C180 +C180 +C180 +C180 +C180 +C180 +C300 +FE00 +ENDCHAR +STARTCHAR E +ENCODING 69 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 10 2 0 +BITMAP +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR F +ENCODING 70 +SWIDTH 602 0 +DWIDTH 9 0 +BBX 6 10 2 0 +BITMAP +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR G +ENCODING 71 +SWIDTH 759 0 +DWIDTH 11 0 +BBX 8 10 2 0 +BITMAP +3E +63 +C0 +C0 +C0 +C3 +C3 +C3 +63 +3F +ENDCHAR +STARTCHAR H +ENCODING 72 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 8 10 2 0 +BITMAP +C3 +C3 +C3 +C3 +FF +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR I +ENCODING 73 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 2 10 2 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR J +ENCODING 74 +SWIDTH 501 0 +DWIDTH 6 0 +BBX 4 12 0 -2 +BITMAP +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +E0 +ENDCHAR +STARTCHAR K +ENCODING 75 +SWIDTH 753 0 +DWIDTH 11 0 +BBX 8 10 2 0 +BITMAP +C3 +C6 +CC +D8 +F0 +D8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR L +ENCODING 76 +SWIDTH 620 0 +DWIDTH 9 0 +BBX 6 10 2 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR M +ENCODING 77 +SWIDTH 940 0 +DWIDTH 15 0 +BBX 11 10 2 0 +BITMAP +E0E0 +E0E0 +B160 +B160 +B160 +9A60 +9A60 +8C60 +8C60 +8060 +ENDCHAR +STARTCHAR N +ENCODING 78 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 10 2 0 +BITMAP +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +ENDCHAR +STARTCHAR O +ENCODING 79 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 10 1 0 +BITMAP +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR P +ENCODING 80 +SWIDTH 657 0 +DWIDTH 9 0 +BBX 6 10 2 0 +BITMAP +F8 +CC +CC +CC +CC +F8 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR Q +ENCODING 81 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 12 1 -2 +BITMAP +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +0300 +0180 +ENDCHAR +STARTCHAR R +ENCODING 82 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 10 2 0 +BITMAP +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR S +ENCODING 83 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 10 1 0 +BITMAP +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +ENDCHAR +STARTCHAR T +ENCODING 84 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +FF +18 +18 +18 +18 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR U +ENCODING 85 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 10 2 0 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR V +ENCODING 86 +SWIDTH 735 0 +DWIDTH 11 0 +BBX 9 10 1 0 +BITMAP +C180 +C180 +C180 +6100 +6300 +6300 +3200 +3600 +1C00 +1C00 +ENDCHAR +STARTCHAR W +ENCODING 87 +SWIDTH 940 0 +DWIDTH 13 0 +BBX 11 10 1 0 +BITMAP +C060 +C060 +C660 +C660 +6640 +6B40 +6B40 +7BC0 +3180 +3180 +ENDCHAR +STARTCHAR X +ENCODING 88 +SWIDTH 699 0 +DWIDTH 9 0 +BBX 7 10 1 0 +BITMAP +C6 +C6 +6C +6C +38 +38 +6C +6C +C6 +C6 +ENDCHAR +STARTCHAR Y +ENCODING 89 +SWIDTH 738 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +C3 +C3 +62 +66 +34 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR Z +ENCODING 90 +SWIDTH 675 0 +DWIDTH 9 0 +BBX 7 10 1 0 +BITMAP +FE +06 +0C +1C +18 +30 +70 +60 +C0 +FE +ENDCHAR +STARTCHAR bracketleft +ENCODING 91 +SWIDTH 386 0 +DWIDTH 6 0 +BBX 4 12 1 -1 +BITMAP +F0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +F0 +ENDCHAR +STARTCHAR backslash +ENCODING 92 +SWIDTH 596 0 +DWIDTH 8 0 +BBX 8 12 0 -1 +BITMAP +C0 +60 +60 +30 +30 +18 +18 +0C +0C +06 +06 +03 +ENDCHAR +STARTCHAR bracketright +ENCODING 93 +SWIDTH 386 0 +DWIDTH 6 0 +BBX 4 12 1 -1 +BITMAP +F0 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +F0 +ENDCHAR +STARTCHAR asciicircum +ENCODING 94 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 6 7 2 3 +BITMAP +30 +30 +78 +48 +CC +84 +84 +ENDCHAR +STARTCHAR underscore +ENCODING 95 +SWIDTH 500 0 +DWIDTH 11 0 +BBX 9 1 1 -1 +BITMAP +FF80 +ENDCHAR +STARTCHAR grave +ENCODING 96 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 2 2 9 +BITMAP +E0 +38 +ENDCHAR +STARTCHAR a +ENCODING 97 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 8 1 0 +BITMAP +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR b +ENCODING 98 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +C0 +C0 +C0 +DC +E6 +C3 +C3 +C3 +C3 +C6 +FC +ENDCHAR +STARTCHAR c +ENCODING 99 +SWIDTH 545 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +3C +66 +C0 +C0 +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR d +ENCODING 100 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +03 +03 +03 +3F +63 +C3 +C3 +C3 +C3 +67 +3B +ENDCHAR +STARTCHAR e +ENCODING 101 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR f +ENCODING 102 +SWIDTH 461 0 +DWIDTH 7 0 +BBX 7 11 0 0 +BITMAP +1E +30 +30 +FE +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR g +ENCODING 103 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +3F +63 +C3 +C3 +C3 +67 +3B +03 +C6 +7C +ENDCHAR +STARTCHAR h +ENCODING 104 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +C0 +C0 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR i +ENCODING 105 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 2 11 1 0 +BITMAP +C0 +C0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR j +ENCODING 106 +SWIDTH 361 0 +DWIDTH 5 0 +BBX 4 13 0 -2 +BITMAP +30 +30 +00 +30 +30 +30 +30 +30 +30 +30 +30 +30 +E0 +ENDCHAR +STARTCHAR k +ENCODING 107 +SWIDTH 681 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +C0 +C0 +C0 +C6 +CC +D8 +F0 +D8 +CC +C6 +C7 +ENDCHAR +STARTCHAR l +ENCODING 108 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 2 11 1 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR m +ENCODING 109 +SWIDTH 1006 0 +DWIDTH 14 0 +BBX 12 8 1 0 +BITMAP +DDE0 +EF70 +C630 +C630 +C630 +C630 +C630 +C630 +ENDCHAR +STARTCHAR n +ENCODING 110 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 8 1 0 +BITMAP +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR o +ENCODING 111 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 8 1 0 +BITMAP +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR p +ENCODING 112 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +DC +E6 +C3 +C3 +C3 +C3 +C6 +FC +C0 +C0 +ENDCHAR +STARTCHAR q +ENCODING 113 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +3F +63 +C3 +C3 +C3 +C3 +67 +3B +03 +03 +ENDCHAR +STARTCHAR r +ENCODING 114 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 5 8 2 0 +BITMAP +D8 +D8 +E0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR s +ENCODING 115 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 8 1 0 +BITMAP +7C +C0 +C0 +F0 +3C +0C +0C +F8 +ENDCHAR +STARTCHAR t +ENCODING 116 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 10 1 0 +BITMAP +60 +60 +F8 +60 +60 +60 +60 +60 +60 +38 +ENDCHAR +STARTCHAR u +ENCODING 117 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 8 1 0 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR v +ENCODING 118 +SWIDTH 663 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +C6 +C6 +C6 +C6 +64 +68 +38 +38 +ENDCHAR +STARTCHAR w +ENCODING 119 +SWIDTH 885 0 +DWIDTH 13 0 +BBX 11 8 1 0 +BITMAP +C060 +C460 +C460 +6EC0 +6AC0 +7B80 +3180 +3180 +ENDCHAR +STARTCHAR x +ENCODING 120 +SWIDTH 568 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +C6 +C6 +64 +38 +38 +4C +C6 +C6 +ENDCHAR +STARTCHAR y +ENCODING 121 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 10 1 -2 +BITMAP +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +ENDCHAR +STARTCHAR z +ENCODING 122 +SWIDTH 608 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +FE +06 +0C +18 +30 +60 +C0 +FE +ENDCHAR +STARTCHAR braceleft +ENCODING 123 +SWIDTH 386 0 +DWIDTH 6 0 +BBX 4 12 1 -1 +BITMAP +70 +C0 +C0 +60 +20 +C0 +20 +60 +C0 +C0 +C0 +70 +ENDCHAR +STARTCHAR bar +ENCODING 124 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 12 1 -1 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR braceright +ENCODING 125 +SWIDTH 386 0 +DWIDTH 6 0 +BBX 4 12 1 -1 +BITMAP +E0 +30 +30 +60 +40 +30 +40 +60 +30 +30 +30 +E0 +ENDCHAR +STARTCHAR asciitilde +ENCODING 126 +SWIDTH 687 0 +DWIDTH 9 0 +BBX 7 3 1 3 +BITMAP +72 +BA +9C +ENDCHAR +STARTCHAR space +ENCODING 160 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR exclamdown +ENCODING 161 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 10 1 -2 +BITMAP +C0 +C0 +00 +40 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR cent +ENCODING 162 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 12 1 -1 +BITMAP +08 +08 +3E +6A +C8 +C8 +C8 +C8 +68 +3E +08 +08 +ENDCHAR +STARTCHAR sterling +ENCODING 163 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 10 1 0 +BITMAP +1C +32 +30 +30 +FC +30 +30 +30 +60 +FE +ENDCHAR +STARTCHAR currency +ENCODING 164 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 9 10 0 0 +BITMAP +8080 +4100 +3E00 +6300 +6300 +6300 +6300 +3E00 +4100 +8080 +ENDCHAR +STARTCHAR yen +ENCODING 165 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +C3 +C3 +62 +66 +34 +7E +18 +7E +18 +18 +ENDCHAR +STARTCHAR brokenbar +ENCODING 166 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 12 1 -1 +BITMAP +C0 +C0 +C0 +C0 +C0 +00 +00 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR section +ENCODING 167 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 6 11 2 -1 +BITMAP +78 +CC +C0 +70 +D8 +CC +6C +38 +0C +CC +78 +ENDCHAR +STARTCHAR dieresis +ENCODING 168 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 4 2 3 9 +BITMAP +90 +90 +ENDCHAR +STARTCHAR copyright +ENCODING 169 +SWIDTH 825 0 +DWIDTH 12 0 +BBX 10 10 1 0 +BITMAP +1E00 +6180 +4080 +8E40 +9840 +9840 +8E40 +4080 +6180 +1E00 +ENDCHAR +STARTCHAR ordfeminine +ENCODING 170 +SWIDTH 536 0 +DWIDTH 8 0 +BBX 6 6 1 4 +BITMAP +70 +18 +78 +D8 +D8 +6C +ENDCHAR +STARTCHAR guillemotleft +ENCODING 171 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 8 5 0 2 +BITMAP +33 +66 +CC +66 +33 +ENDCHAR +STARTCHAR logicalnot +ENCODING 172 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 4 1 1 +BITMAP +FE +02 +02 +02 +ENDCHAR +STARTCHAR hyphen +ENCODING 173 +SWIDTH 289 0 +DWIDTH 5 0 +BBX 3 1 1 4 +BITMAP +E0 +ENDCHAR +STARTCHAR registered +ENCODING 174 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 7 1 3 +BITMAP +38 +44 +BA +B2 +AA +44 +38 +ENDCHAR +STARTCHAR macron +ENCODING 175 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 4 1 3 9 +BITMAP +F0 +ENDCHAR +STARTCHAR degree +ENCODING 176 +SWIDTH 241 0 +DWIDTH 4 0 +BBX 4 3 0 7 +BITMAP +60 +90 +60 +ENDCHAR +STARTCHAR plusminus +ENCODING 177 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 7 1 1 +BITMAP +10 +10 +FE +10 +10 +00 +FE +ENDCHAR +STARTCHAR twosuperior +ENCODING 178 +SWIDTH 536 0 +DWIDTH 7 0 +BBX 5 6 1 4 +BITMAP +F0 +18 +18 +60 +C0 +F8 +ENDCHAR +STARTCHAR threesuperior +ENCODING 179 +SWIDTH 536 0 +DWIDTH 7 0 +BBX 5 6 1 4 +BITMAP +F0 +18 +70 +18 +18 +F0 +ENDCHAR +STARTCHAR acute +ENCODING 180 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 2 3 9 +BITMAP +38 +E0 +ENDCHAR +STARTCHAR mu +ENCODING 181 +SWIDTH 699 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +E7 +FB +C0 +C0 +ENDCHAR +STARTCHAR paragraph +ENCODING 182 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 6 11 2 -1 +BITMAP +7C +F4 +F4 +F4 +F4 +74 +14 +14 +14 +14 +14 +ENDCHAR +STARTCHAR periodcentered +ENCODING 183 +SWIDTH 343 0 +DWIDTH 10 0 +BBX 2 2 4 3 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR cedilla +ENCODING 184 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 3 2 3 -2 +BITMAP +20 +C0 +ENDCHAR +STARTCHAR onesuperior +ENCODING 185 +SWIDTH 536 0 +DWIDTH 7 0 +BBX 4 6 1 4 +BITMAP +30 +F0 +30 +30 +30 +30 +ENDCHAR +STARTCHAR ordmasculine +ENCODING 186 +SWIDTH 536 0 +DWIDTH 8 0 +BBX 6 6 1 4 +BITMAP +78 +CC +CC +CC +CC +78 +ENDCHAR +STARTCHAR guillemotright +ENCODING 187 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 8 5 1 2 +BITMAP +CC +66 +33 +66 +CC +ENDCHAR +STARTCHAR onequarter +ENCODING 188 +SWIDTH 1066 0 +DWIDTH 14 0 +BBX 12 10 1 0 +BITMAP +6100 +E100 +6200 +6200 +64E0 +6560 +0A60 +0BF0 +1060 +1060 +ENDCHAR +STARTCHAR onehalf +ENCODING 189 +SWIDTH 1066 0 +DWIDTH 14 0 +BBX 12 10 1 0 +BITMAP +6100 +E100 +6200 +6200 +64E0 +6530 +0870 +08E0 +1180 +11F0 +ENDCHAR +STARTCHAR threequarters +ENCODING 190 +SWIDTH 1120 0 +DWIDTH 15 0 +BBX 13 10 1 0 +BITMAP +7080 +9880 +3100 +1A00 +9A70 +74B0 +0530 +09F8 +1030 +1030 +ENDCHAR +STARTCHAR questiondown +ENCODING 191 +SWIDTH 572 0 +DWIDTH 8 0 +BBX 6 10 1 -2 +BITMAP +30 +30 +00 +30 +30 +60 +C0 +C0 +CC +78 +ENDCHAR +STARTCHAR Agrave +ENCODING 192 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +7000 +1C00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR Aacute +ENCODING 193 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +0700 +1C00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR Acircumflex +ENCODING 194 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +1C00 +2600 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR Atilde +ENCODING 195 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +1A00 +2C00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR Adieresis +ENCODING 196 +SWIDTH 773 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +24 +24 +00 +18 +18 +2C +2C +66 +46 +FE +C3 +C3 +C3 +ENDCHAR +STARTCHAR Aring +ENCODING 197 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +1C00 +2600 +1C00 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR AE +ENCODING 198 +SWIDTH 997 0 +DWIDTH 13 0 +BBX 11 10 1 0 +BITMAP +1FE0 +1600 +2600 +2600 +67C0 +4600 +7E00 +C600 +C600 +C7E0 +ENDCHAR +STARTCHAR Ccedilla +ENCODING 199 +SWIDTH 726 0 +DWIDTH 11 0 +BBX 8 12 2 -2 +BITMAP +3E +63 +C0 +C0 +C0 +C0 +C0 +C0 +63 +3E +08 +30 +ENDCHAR +STARTCHAR Egrave +ENCODING 200 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +70 +1C +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR Eacute +ENCODING 201 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +1C +70 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR Ecircumflex +ENCODING 202 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +30 +58 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR Edieresis +ENCODING 203 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +48 +48 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR Igrave +ENCODING 204 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 4 13 1 0 +BITMAP +E0 +30 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR Iacute +ENCODING 205 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 4 13 1 0 +BITMAP +70 +C0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR Icircumflex +ENCODING 206 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 4 13 1 0 +BITMAP +60 +B0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR Idieresis +ENCODING 207 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 4 13 1 0 +BITMAP +90 +90 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR Eth +ENCODING 208 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 11 10 0 0 +BITMAP +3F80 +30C0 +3060 +3060 +FC60 +3060 +3060 +3060 +30C0 +3F80 +ENDCHAR +STARTCHAR Ntilde +ENCODING 209 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +1A +2C +00 +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +ENDCHAR +STARTCHAR Ograve +ENCODING 210 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +3800 +0E00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR Oacute +ENCODING 211 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +0700 +1C00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR Ocircumflex +ENCODING 212 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +0C00 +1600 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR Otilde +ENCODING 213 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +0D00 +1600 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR Odieresis +ENCODING 214 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +2100 +2100 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR multiply +ENCODING 215 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 5 5 2 2 +BITMAP +C8 +70 +20 +70 +98 +ENDCHAR +STARTCHAR Oslash +ENCODING 216 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 12 1 -1 +BITMAP +0040 +3F40 +6180 +C2C0 +C2C0 +C4C0 +C8C0 +D0C0 +D0C0 +6180 +BF00 +8000 +ENDCHAR +STARTCHAR Ugrave +ENCODING 217 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +70 +1C +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR Uacute +ENCODING 218 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +0E +38 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR Ucircumflex +ENCODING 219 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +18 +2C +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR Udieresis +ENCODING 220 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +64 +3C +ENDCHAR +STARTCHAR Yacute +ENCODING 221 +SWIDTH 738 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +0E +38 +00 +C3 +C3 +62 +66 +34 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR Thorn +ENCODING 222 +SWIDTH 657 0 +DWIDTH 9 0 +BBX 6 10 2 0 +BITMAP +C0 +C0 +F8 +CC +CC +CC +CC +F8 +C0 +C0 +ENDCHAR +STARTCHAR germandbls +ENCODING 223 +SWIDTH 724 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +7C +C6 +C6 +C4 +CC +C6 +C3 +C3 +C3 +C3 +CE +ENDCHAR +STARTCHAR agrave +ENCODING 224 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +70 +1C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR aacute +ENCODING 225 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +0E +38 +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR acircumflex +ENCODING 226 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +18 +2C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR atilde +ENCODING 227 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +34 +58 +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR adieresis +ENCODING 228 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +24 +24 +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR aring +ENCODING 229 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +18 +2C +18 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR ae +ENCODING 230 +SWIDTH 913 0 +DWIDTH 14 0 +BBX 12 8 1 0 +BITMAP +7DE0 +0730 +0630 +7FF0 +C600 +C600 +C710 +79E0 +ENDCHAR +STARTCHAR ccedilla +ENCODING 231 +SWIDTH 545 0 +DWIDTH 9 0 +BBX 7 10 1 -2 +BITMAP +3C +66 +C0 +C0 +C0 +C0 +62 +3C +10 +60 +ENDCHAR +STARTCHAR egrave +ENCODING 232 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +70 +1C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR eacute +ENCODING 233 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +0E +38 +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR ecircumflex +ENCODING 234 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +18 +2C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR edieresis +ENCODING 235 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +44 +44 +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR igrave +ENCODING 236 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 4 11 0 0 +BITMAP +E0 +30 +00 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR iacute +ENCODING 237 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 4 11 0 0 +BITMAP +70 +C0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR icircumflex +ENCODING 238 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 4 11 0 0 +BITMAP +60 +B0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR idieresis +ENCODING 239 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 4 11 0 0 +BITMAP +90 +90 +00 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR eth +ENCODING 240 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +10 +3E +0C +3E +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR ntilde +ENCODING 241 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +1A +2C +00 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR ograve +ENCODING 242 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +70 +1C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR oacute +ENCODING 243 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +0E +38 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR ocircumflex +ENCODING 244 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +18 +2C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR otilde +ENCODING 245 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +34 +58 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR odieresis +ENCODING 246 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +24 +24 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR divide +ENCODING 247 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 7 1 1 +BITMAP +10 +10 +00 +FE +00 +10 +10 +ENDCHAR +STARTCHAR oslash +ENCODING 248 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 10 1 -1 +BITMAP +01 +3D +66 +CB +CB +D3 +D3 +66 +BC +80 +ENDCHAR +STARTCHAR ugrave +ENCODING 249 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +70 +1C +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uacute +ENCODING 250 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +1C +70 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR ucircumflex +ENCODING 251 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +18 +2C +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR udieresis +ENCODING 252 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR yacute +ENCODING 253 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 13 1 -2 +BITMAP +1C +70 +00 +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +ENDCHAR +STARTCHAR thorn +ENCODING 254 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +C0 +C0 +DC +E6 +C3 +C3 +C3 +C3 +C6 +FC +C0 +C0 +ENDCHAR +STARTCHAR ydieresis +ENCODING 255 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 13 1 -2 +BITMAP +44 +44 +00 +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +ENDCHAR +STARTCHAR Amacron +ENCODING 256 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 12 1 0 +BITMAP +1E00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR amacron +ENCODING 257 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 10 1 0 +BITMAP +3C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR Abreve +ENCODING 258 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +2100 +1E00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR abreve +ENCODING 259 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +42 +3C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR Aogonek +ENCODING 260 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 12 1 -2 +BITMAP +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +0800 +0600 +ENDCHAR +STARTCHAR aogonek +ENCODING 261 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 10 1 -2 +BITMAP +7C +06 +06 +7E +C6 +C6 +CE +77 +10 +0C +ENDCHAR +STARTCHAR Cacute +ENCODING 262 +SWIDTH 726 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +0E +38 +00 +3E +63 +C0 +C0 +C0 +C0 +C0 +C0 +63 +3E +ENDCHAR +STARTCHAR cacute +ENCODING 263 +SWIDTH 545 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +0E +38 +00 +3C +66 +C0 +C0 +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR Ccircumflex +ENCODING 264 +SWIDTH 726 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +18 +2C +00 +3E +63 +C0 +C0 +C0 +C0 +C0 +C0 +63 +3E +ENDCHAR +STARTCHAR ccircumflex +ENCODING 265 +SWIDTH 545 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +30 +58 +00 +3C +66 +C0 +C0 +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR Cdotaccent +ENCODING 266 +SWIDTH 726 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +18 +18 +00 +3E +63 +C0 +C0 +C0 +C0 +C0 +C0 +63 +3E +ENDCHAR +STARTCHAR cdotaccent +ENCODING 267 +SWIDTH 545 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +30 +30 +00 +3C +66 +C0 +C0 +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR Ccaron +ENCODING 268 +SWIDTH 726 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +2C +18 +00 +3E +63 +C0 +C0 +C0 +C0 +C0 +C0 +63 +3E +ENDCHAR +STARTCHAR ccaron +ENCODING 269 +SWIDTH 545 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +58 +30 +00 +3C +66 +C0 +C0 +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR Dcaron +ENCODING 270 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 9 13 2 0 +BITMAP +2C00 +1800 +0000 +FE00 +C300 +C180 +C180 +C180 +C180 +C180 +C180 +C300 +FE00 +ENDCHAR +STARTCHAR dcaron +ENCODING 271 +SWIDTH 926 0 +DWIDTH 14 0 +BBX 12 11 1 0 +BITMAP +0330 +0330 +0310 +3F20 +6300 +C300 +C300 +C300 +C300 +6700 +3B00 +ENDCHAR +STARTCHAR Dcroat +ENCODING 272 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 11 10 0 0 +BITMAP +3F80 +30C0 +3060 +3060 +FC60 +3060 +3060 +3060 +30C0 +3F80 +ENDCHAR +STARTCHAR dcroat +ENCODING 273 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +03 +1F +03 +3F +63 +C3 +C3 +C3 +C3 +67 +3B +ENDCHAR +STARTCHAR Emacron +ENCODING 274 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 12 2 0 +BITMAP +F0 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR emacron +ENCODING 275 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 10 1 0 +BITMAP +3C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR Ebreve +ENCODING 276 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +84 +78 +00 +7E +60 +60 +60 +7C +60 +60 +60 +60 +7E +ENDCHAR +STARTCHAR ebreve +ENCODING 277 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +42 +3C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR Edotaccent +ENCODING 278 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +60 +60 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR edotaccent +ENCODING 279 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +18 +18 +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR Eogonek +ENCODING 280 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 12 2 -2 +BITMAP +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +20 +18 +ENDCHAR +STARTCHAR eogonek +ENCODING 281 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 10 1 -2 +BITMAP +3C +66 +C6 +FE +C0 +C0 +62 +3C +20 +18 +ENDCHAR +STARTCHAR Ecaron +ENCODING 282 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +B0 +60 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR ecaron +ENCODING 283 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +2C +18 +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR Gcircumflex +ENCODING 284 +SWIDTH 759 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +18 +2C +00 +3E +63 +C0 +C0 +C0 +C3 +C3 +C3 +63 +3F +ENDCHAR +STARTCHAR gcircumflex +ENCODING 285 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +18 +2C +00 +3F +63 +C3 +C3 +C3 +67 +3B +03 +C6 +7C +ENDCHAR +STARTCHAR Gbreve +ENCODING 286 +SWIDTH 759 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +42 +3C +00 +3E +63 +C0 +C0 +C0 +C3 +C3 +C3 +63 +3F +ENDCHAR +STARTCHAR gbreve +ENCODING 287 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +42 +3C +00 +3F +63 +C3 +C3 +C3 +67 +3B +03 +C6 +7C +ENDCHAR +STARTCHAR Gdotaccent +ENCODING 288 +SWIDTH 759 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +18 +18 +00 +3E +63 +C0 +C0 +C0 +C3 +C3 +C3 +63 +3F +ENDCHAR +STARTCHAR gdotaccent +ENCODING 289 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +18 +18 +00 +3F +63 +C3 +C3 +C3 +67 +3B +03 +C6 +7C +ENDCHAR +STARTCHAR Gcommaaccent +ENCODING 290 +SWIDTH 759 0 +DWIDTH 11 0 +BBX 8 15 2 -5 +BITMAP +3E +63 +C0 +C0 +C0 +C3 +C3 +C3 +63 +3F +00 +18 +18 +08 +10 +ENDCHAR +STARTCHAR gcommaaccent +ENCODING 291 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 15 1 -2 +BITMAP +08 +10 +18 +18 +00 +3F +63 +C3 +C3 +C3 +67 +3B +03 +C6 +7C +ENDCHAR +STARTCHAR Hcircumflex +ENCODING 292 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +18 +2C +00 +C3 +C3 +C3 +C3 +FF +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR hcircumflex +ENCODING 293 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +60 +B0 +00 +C0 +C0 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR Hbar +ENCODING 294 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 8 10 2 0 +BITMAP +C3 +FF +C3 +C3 +FF +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR hbar +ENCODING 295 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +C0 +F8 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR Itilde +ENCODING 296 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 5 13 1 0 +BITMAP +68 +B0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR itilde +ENCODING 297 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 5 11 0 0 +BITMAP +68 +B0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR Imacron +ENCODING 298 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 4 12 1 0 +BITMAP +F0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR imacron +ENCODING 299 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 4 10 0 0 +BITMAP +F0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR Ibreve +ENCODING 300 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 6 13 0 0 +BITMAP +84 +78 +00 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR ibreve +ENCODING 301 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 6 11 -1 0 +BITMAP +84 +78 +00 +30 +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR Iogonek +ENCODING 302 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 3 12 2 -2 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +80 +60 +ENDCHAR +STARTCHAR iogonek +ENCODING 303 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 3 13 1 -2 +BITMAP +C0 +C0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +80 +60 +ENDCHAR +STARTCHAR Idotaccent +ENCODING 304 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 2 13 2 0 +BITMAP +C0 +C0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR dotlessi +ENCODING 305 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 2 8 1 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR IJ +ENCODING 306 +SWIDTH 844 0 +DWIDTH 12 0 +BBX 8 12 2 -2 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +03 +0E +ENDCHAR +STARTCHAR ij +ENCODING 307 +SWIDTH 704 0 +DWIDTH 9 0 +BBX 7 13 1 -2 +BITMAP +C6 +C6 +00 +C6 +C6 +C6 +C6 +C6 +C6 +C6 +C6 +06 +1C +ENDCHAR +STARTCHAR Jcircumflex +ENCODING 308 +SWIDTH 501 0 +DWIDTH 6 0 +BBX 5 15 0 -2 +BITMAP +30 +58 +00 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +E0 +ENDCHAR +STARTCHAR jcircumflex +ENCODING 309 +SWIDTH 361 0 +DWIDTH 5 0 +BBX 5 13 0 -2 +BITMAP +30 +58 +00 +30 +30 +30 +30 +30 +30 +30 +30 +30 +E0 +ENDCHAR +STARTCHAR Kcommaaccent +ENCODING 310 +SWIDTH 753 0 +DWIDTH 11 0 +BBX 8 15 2 -5 +BITMAP +C3 +C6 +CC +D8 +F0 +D8 +CC +C6 +C3 +C3 +00 +18 +18 +08 +10 +ENDCHAR +STARTCHAR kcommaaccent +ENCODING 311 +SWIDTH 681 0 +DWIDTH 9 0 +BBX 8 16 1 -5 +BITMAP +C0 +C0 +C0 +C6 +CC +D8 +F0 +D8 +CC +C6 +C7 +00 +18 +18 +08 +10 +ENDCHAR +STARTCHAR kgreenlandic +ENCODING 312 +SWIDTH 681 0 +DWIDTH 9 0 +BBX 8 8 1 0 +BITMAP +C6 +CC +D8 +F0 +D8 +CC +C6 +C7 +ENDCHAR +STARTCHAR Lacute +ENCODING 313 +SWIDTH 620 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +38 +E0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR lacute +ENCODING 314 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 5 14 0 0 +BITMAP +38 +E0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR Lcommaaccent +ENCODING 315 +SWIDTH 620 0 +DWIDTH 9 0 +BBX 6 15 2 -5 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +FC +00 +60 +60 +20 +40 +ENDCHAR +STARTCHAR lcommaaccent +ENCODING 316 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 2 16 1 -5 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +00 +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR Lcaron +ENCODING 317 +SWIDTH 854 0 +DWIDTH 13 0 +BBX 10 11 2 0 +BITMAP +00C0 +C0C0 +C040 +C080 +C000 +C000 +C000 +C000 +C000 +C000 +FC00 +ENDCHAR +STARTCHAR lcaron +ENCODING 318 +SWIDTH 608 0 +DWIDTH 8 0 +BBX 6 11 1 0 +BITMAP +CC +CC +C4 +C8 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR Ldot +ENCODING 319 +SWIDTH 932 0 +DWIDTH 19 0 +BBX 13 10 2 0 +BITMAP +C000 +C000 +C000 +C000 +C000 +C018 +C018 +C000 +C000 +FC00 +ENDCHAR +STARTCHAR ldot +ENCODING 320 +SWIDTH 686 0 +DWIDTH 14 0 +BBX 9 11 1 0 +BITMAP +C000 +C000 +C000 +C000 +C000 +C000 +C180 +C180 +C000 +C000 +C000 +ENDCHAR +STARTCHAR Lslash +ENCODING 321 +SWIDTH 620 0 +DWIDTH 9 0 +BBX 8 10 0 0 +BITMAP +30 +30 +30 +30 +3C +F0 +30 +30 +30 +3F +ENDCHAR +STARTCHAR lslash +ENCODING 322 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 6 11 0 0 +BITMAP +30 +30 +30 +30 +3C +F0 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR Nacute +ENCODING 323 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +0E +38 +00 +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +ENDCHAR +STARTCHAR nacute +ENCODING 324 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +0E +38 +00 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR Ncommaaccent +ENCODING 325 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 15 2 -5 +BITMAP +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +00 +0C +0C +04 +08 +ENDCHAR +STARTCHAR ncommaaccent +ENCODING 326 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 13 1 -5 +BITMAP +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +00 +18 +18 +08 +10 +ENDCHAR +STARTCHAR Ncaron +ENCODING 327 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +58 +30 +00 +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +ENDCHAR +STARTCHAR ncaron +ENCODING 328 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +2C +18 +00 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR napostrophe +ENCODING 329 +SWIDTH 945 0 +DWIDTH 14 0 +BBX 12 11 1 0 +BITMAP +C000 +C000 +4000 +8DE0 +0E70 +0C30 +0C30 +0C30 +0C30 +0C30 +0C30 +ENDCHAR +STARTCHAR Eng +ENCODING 330 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 12 2 -2 +BITMAP +E1 +E1 +B1 +B1 +99 +99 +8F +8F +87 +87 +03 +0E +ENDCHAR +STARTCHAR eng +ENCODING 331 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +03 +0E +ENDCHAR +STARTCHAR Omacron +ENCODING 332 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 12 1 0 +BITMAP +1E00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR omacron +ENCODING 333 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +3C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR Obreve +ENCODING 334 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +2100 +1E00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR obreve +ENCODING 335 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +42 +3C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR Ohungarumlaut +ENCODING 336 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +1B00 +1200 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR ohungarumlaut +ENCODING 337 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +36 +24 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR OE +ENCODING 338 +SWIDTH 1102 0 +DWIDTH 15 0 +BBX 13 10 1 0 +BITMAP +3DF8 +6380 +C180 +C180 +C1F0 +C180 +C180 +C180 +6380 +3DF8 +ENDCHAR +STARTCHAR oe +ENCODING 339 +SWIDTH 990 0 +DWIDTH 15 0 +BBX 13 8 1 0 +BITMAP +3CF0 +6398 +C318 +C3F8 +C300 +C300 +6388 +3CF0 +ENDCHAR +STARTCHAR Racute +ENCODING 340 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +0E +38 +00 +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR racute +ENCODING 341 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 5 11 2 0 +BITMAP +38 +E0 +00 +D8 +D8 +E0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR Rcommaaccent +ENCODING 342 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 15 2 -5 +BITMAP +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +00 +18 +18 +08 +10 +ENDCHAR +STARTCHAR rcommaaccent +ENCODING 343 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 5 13 2 -5 +BITMAP +D8 +D8 +E0 +C0 +C0 +C0 +C0 +C0 +00 +60 +60 +20 +40 +ENDCHAR +STARTCHAR Rcaron +ENCODING 344 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +2C +18 +00 +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR rcaron +ENCODING 345 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 5 11 2 0 +BITMAP +B0 +60 +00 +D8 +D8 +E0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR Sacute +ENCODING 346 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +1C +70 +00 +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +ENDCHAR +STARTCHAR sacute +ENCODING 347 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 11 1 0 +BITMAP +1C +70 +00 +7C +C0 +C0 +F0 +3C +0C +0C +F8 +ENDCHAR +STARTCHAR Scircumflex +ENCODING 348 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +30 +58 +00 +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +ENDCHAR +STARTCHAR scircumflex +ENCODING 349 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 11 1 0 +BITMAP +60 +B0 +00 +7C +C0 +C0 +F0 +3C +0C +0C +F8 +ENDCHAR +STARTCHAR Scedilla +ENCODING 350 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 12 1 -2 +BITMAP +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +08 +30 +ENDCHAR +STARTCHAR scedilla +ENCODING 351 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 10 1 -2 +BITMAP +7C +C0 +C0 +F0 +3C +0C +0C +F8 +10 +60 +ENDCHAR +STARTCHAR Scaron +ENCODING 352 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +2C +18 +00 +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +ENDCHAR +STARTCHAR scaron +ENCODING 353 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 11 1 0 +BITMAP +58 +30 +00 +7C +C0 +C0 +F0 +3C +0C +0C +F8 +ENDCHAR +STARTCHAR Tcommaaccent +ENCODING 354 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +FF +18 +18 +18 +18 +18 +18 +18 +18 +18 +08 +30 +ENDCHAR +STARTCHAR tcommaaccent +ENCODING 355 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 12 1 -2 +BITMAP +60 +60 +F8 +60 +60 +60 +60 +60 +60 +38 +20 +C0 +ENDCHAR +STARTCHAR Tcaron +ENCODING 356 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +2C +18 +00 +FF +18 +18 +18 +18 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR tcaron +ENCODING 357 +SWIDTH 679 0 +DWIDTH 11 0 +BBX 9 11 1 0 +BITMAP +0180 +6180 +6080 +F900 +6000 +6000 +6000 +6000 +6000 +6000 +3800 +ENDCHAR +STARTCHAR Tbar +ENCODING 358 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +FF +18 +18 +18 +3E +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR tbar +ENCODING 359 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 10 1 0 +BITMAP +60 +60 +F8 +60 +60 +F8 +60 +60 +60 +38 +ENDCHAR +STARTCHAR Utilde +ENCODING 360 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +1A +2C +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR utilde +ENCODING 361 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +1A +2C +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR Umacron +ENCODING 362 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 12 2 0 +BITMAP +3C +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR umacron +ENCODING 363 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +3C +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR Ubreve +ENCODING 364 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +42 +3C +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR ubreve +ENCODING 365 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +42 +3C +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR Uring +ENCODING 366 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 14 2 0 +BITMAP +18 +2C +18 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uring +ENCODING 367 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 12 1 0 +BITMAP +18 +2C +18 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR Uhungarumlaut +ENCODING 368 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +36 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uhungarumlaut +ENCODING 369 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +36 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR Uogonek +ENCODING 370 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 12 2 -2 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +10 +0C +ENDCHAR +STARTCHAR uogonek +ENCODING 371 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +10 +0C +ENDCHAR +STARTCHAR Wcircumflex +ENCODING 372 +SWIDTH 940 0 +DWIDTH 13 0 +BBX 11 13 1 0 +BITMAP +0C00 +1600 +0000 +C060 +C060 +C660 +C660 +6640 +6B40 +6B40 +7BC0 +3180 +3180 +ENDCHAR +STARTCHAR wcircumflex +ENCODING 373 +SWIDTH 885 0 +DWIDTH 13 0 +BBX 11 11 1 0 +BITMAP +0C00 +1600 +0000 +C060 +C460 +C460 +6EC0 +6AC0 +7B80 +3180 +3180 +ENDCHAR +STARTCHAR Ycircumflex +ENCODING 374 +SWIDTH 738 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +18 +2C +00 +C3 +C3 +62 +66 +34 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR ycircumflex +ENCODING 375 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 13 1 -2 +BITMAP +30 +58 +00 +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +ENDCHAR +STARTCHAR Ydieresis +ENCODING 376 +SWIDTH 738 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +24 +24 +00 +C3 +C3 +62 +66 +34 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR Zacute +ENCODING 377 +SWIDTH 675 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +0E +38 +00 +FE +06 +0C +1C +18 +30 +70 +60 +C0 +FE +ENDCHAR +STARTCHAR zacute +ENCODING 378 +SWIDTH 608 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +0E +38 +00 +FE +06 +0C +18 +30 +60 +C0 +FE +ENDCHAR +STARTCHAR Zdotaccent +ENCODING 379 +SWIDTH 675 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +18 +18 +00 +FE +06 +0C +1C +18 +30 +70 +60 +C0 +FE +ENDCHAR +STARTCHAR zdotaccent +ENCODING 380 +SWIDTH 608 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +18 +18 +00 +FE +06 +0C +18 +30 +60 +C0 +FE +ENDCHAR +STARTCHAR Zcaron +ENCODING 381 +SWIDTH 675 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +2C +18 +00 +FE +06 +0C +1C +18 +30 +70 +60 +C0 +FE +ENDCHAR +STARTCHAR zcaron +ENCODING 382 +SWIDTH 608 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +2C +18 +00 +FE +06 +0C +18 +30 +60 +C0 +FE +ENDCHAR +STARTCHAR uni0186 +ENCODING 390 +SWIDTH 726 0 +DWIDTH 11 0 +BBX 8 10 2 0 +BITMAP +7C +C6 +03 +03 +03 +03 +03 +03 +C6 +7C +ENDCHAR +STARTCHAR uni0189 +ENCODING 393 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 11 10 0 0 +BITMAP +3F80 +30C0 +3060 +3060 +FC60 +3060 +3060 +3060 +30C0 +3F80 +ENDCHAR +STARTCHAR uni018E +ENCODING 398 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 10 2 0 +BITMAP +FC +0C +0C +0C +0C +7C +0C +0C +0C +FC +ENDCHAR +STARTCHAR florin +ENCODING 402 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 11 2 -1 +BITMAP +1C +32 +30 +30 +FC +60 +60 +60 +C0 +C0 +C0 +ENDCHAR +STARTCHAR uni0197 +ENCODING 407 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 5 10 1 0 +BITMAP +60 +60 +60 +60 +F8 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR uni019A +ENCODING 410 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 5 11 0 0 +BITMAP +60 +60 +60 +60 +60 +F8 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR uni019D +ENCODING 413 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 10 12 0 -2 +BITMAP +3840 +3840 +2C40 +2C40 +2640 +2640 +3340 +3140 +31C0 +31C0 +3000 +E000 +ENDCHAR +STARTCHAR uni019F +ENCODING 415 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 10 1 0 +BITMAP +3F00 +6180 +C0C0 +C0C0 +FFC0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR Ohorn +ENCODING 416 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 11 10 1 0 +BITMAP +3F60 +61E0 +C0E0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR ohorn +ENCODING 417 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 10 8 1 0 +BITMAP +3CC0 +66C0 +C340 +C380 +C300 +C300 +6600 +3C00 +ENDCHAR +STARTCHAR uni01A7 +ENCODING 423 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 10 1 0 +BITMAP +7C +C6 +06 +0E +3C +78 +E0 +C0 +C6 +7C +ENDCHAR +STARTCHAR uni01A8 +ENCODING 424 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 8 1 0 +BITMAP +F8 +0C +0C +3C +F0 +C0 +C0 +7C +ENDCHAR +STARTCHAR uni01AE +ENCODING 430 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +FF +18 +18 +18 +18 +18 +18 +18 +18 +18 +18 +0E +ENDCHAR +STARTCHAR Uhorn +ENCODING 431 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 10 10 2 0 +BITMAP +C3C0 +C3C0 +C340 +C380 +C300 +C300 +C300 +C300 +6600 +3C00 +ENDCHAR +STARTCHAR uhorn +ENCODING 432 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 10 8 1 0 +BITMAP +C3C0 +C3C0 +C340 +C380 +C300 +C300 +E700 +7B00 +ENDCHAR +STARTCHAR uni01B5 +ENCODING 437 +SWIDTH 675 0 +DWIDTH 9 0 +BBX 7 10 1 0 +BITMAP +FE +06 +0C +1C +7C +30 +70 +60 +C0 +FE +ENDCHAR +STARTCHAR uni01B6 +ENCODING 438 +SWIDTH 608 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +FE +06 +0C +7C +30 +60 +C0 +FE +ENDCHAR +STARTCHAR uni01BB +ENCODING 443 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 10 1 0 +BITMAP +7E +C7 +03 +03 +FF +0C +18 +60 +FF +FF +ENDCHAR +STARTCHAR uni01BC +ENCODING 444 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 10 2 0 +BITMAP +FC +FC +80 +80 +FC +0E +06 +06 +CC +78 +ENDCHAR +STARTCHAR uni01C0 +ENCODING 448 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 12 1 -1 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR uni01C2 +ENCODING 450 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 12 1 -1 +BITMAP +18 +18 +18 +18 +18 +FE +18 +FE +18 +18 +18 +18 +ENDCHAR +STARTCHAR uni01C3 +ENCODING 451 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 10 1 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +80 +80 +00 +C0 +C0 +ENDCHAR +STARTCHAR uni01CD +ENCODING 461 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +1600 +0C00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni01CE +ENCODING 462 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +2C +18 +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni01CF +ENCODING 463 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 4 13 1 0 +BITMAP +B0 +60 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR uni01D0 +ENCODING 464 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 4 11 0 0 +BITMAP +B0 +60 +00 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR uni01D1 +ENCODING 465 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +1600 +0C00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni01D2 +ENCODING 466 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +2C +18 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni01D3 +ENCODING 467 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +2C +18 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni01D4 +ENCODING 468 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +2C +18 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uni01D5 +ENCODING 469 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 15 2 0 +BITMAP +3C +00 +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +64 +3C +ENDCHAR +STARTCHAR uni01D6 +ENCODING 470 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +3C +00 +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uni01D7 +ENCODING 471 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 16 2 0 +BITMAP +0E +38 +00 +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +64 +3C +ENDCHAR +STARTCHAR uni01D8 +ENCODING 472 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +0E +38 +00 +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uni01D9 +ENCODING 473 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 16 2 0 +BITMAP +2C +18 +00 +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +64 +3C +ENDCHAR +STARTCHAR uni01DA +ENCODING 474 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +2C +18 +00 +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uni01DB +ENCODING 475 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 16 2 0 +BITMAP +70 +1C +00 +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +64 +3C +ENDCHAR +STARTCHAR uni01DC +ENCODING 476 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +70 +1C +00 +24 +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uni01DD +ENCODING 477 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +78 +8C +06 +06 +FE +C6 +CC +78 +ENDCHAR +STARTCHAR uni01DE +ENCODING 478 +SWIDTH 773 0 +DWIDTH 10 0 +BBX 8 15 1 0 +BITMAP +3C +00 +24 +24 +00 +18 +18 +2C +2C +66 +46 +FE +C3 +C3 +C3 +ENDCHAR +STARTCHAR uni01DF +ENCODING 479 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 13 1 0 +BITMAP +3C +00 +24 +24 +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni01E0 +ENCODING 480 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 15 1 0 +BITMAP +1E00 +0000 +0C00 +0C00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni01E1 +ENCODING 481 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 13 1 0 +BITMAP +3C +00 +18 +18 +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni01E2 +ENCODING 482 +SWIDTH 997 0 +DWIDTH 13 0 +BBX 11 12 1 0 +BITMAP +0F00 +0000 +1FE0 +1600 +2600 +2600 +67C0 +4600 +7E00 +C600 +C600 +C7E0 +ENDCHAR +STARTCHAR uni01E3 +ENCODING 483 +SWIDTH 913 0 +DWIDTH 14 0 +BBX 12 10 1 0 +BITMAP +0780 +0000 +7DE0 +0730 +0630 +7FF0 +C600 +C600 +C710 +79E0 +ENDCHAR +STARTCHAR uni01E4 +ENCODING 484 +SWIDTH 759 0 +DWIDTH 11 0 +BBX 9 10 2 0 +BITMAP +3E00 +6300 +C000 +C000 +C000 +C300 +CF80 +C300 +6300 +3F00 +ENDCHAR +STARTCHAR uni01E5 +ENCODING 485 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +3F +63 +C3 +C3 +C3 +67 +3B +FF +C6 +7C +ENDCHAR +STARTCHAR Gcaron +ENCODING 486 +SWIDTH 759 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +2C +18 +00 +3E +63 +C0 +C0 +C0 +C3 +C3 +C3 +63 +3F +ENDCHAR +STARTCHAR gcaron +ENCODING 487 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +2C +18 +00 +3F +63 +C3 +C3 +C3 +67 +3B +03 +C6 +7C +ENDCHAR +STARTCHAR uni01E8 +ENCODING 488 +SWIDTH 753 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +2C +18 +00 +C3 +C6 +CC +D8 +F0 +D8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR uni01E9 +ENCODING 489 +SWIDTH 681 0 +DWIDTH 9 0 +BBX 8 14 1 0 +BITMAP +B0 +60 +00 +C0 +C0 +C0 +C6 +CC +D8 +F0 +D8 +CC +C6 +C7 +ENDCHAR +STARTCHAR uni01EA +ENCODING 490 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 12 1 -2 +BITMAP +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +0800 +0600 +ENDCHAR +STARTCHAR uni01EB +ENCODING 491 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +3C +66 +C3 +C3 +C3 +C3 +66 +3C +10 +0C +ENDCHAR +STARTCHAR uni01EC +ENCODING 492 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 14 1 -2 +BITMAP +1E00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +0800 +0600 +ENDCHAR +STARTCHAR uni01ED +ENCODING 493 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +3C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +10 +0C +ENDCHAR +STARTCHAR uni01F0 +ENCODING 496 +SWIDTH 361 0 +DWIDTH 5 0 +BBX 5 13 0 -2 +BITMAP +58 +30 +00 +30 +30 +30 +30 +30 +30 +30 +30 +30 +E0 +ENDCHAR +STARTCHAR uni01F4 +ENCODING 500 +SWIDTH 759 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +0E +38 +00 +3E +63 +C0 +C0 +C0 +C3 +C3 +C3 +63 +3F +ENDCHAR +STARTCHAR uni01F5 +ENCODING 501 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +07 +1C +00 +3F +63 +C3 +C3 +C3 +67 +3B +03 +C6 +7C +ENDCHAR +STARTCHAR uni01F8 +ENCODING 504 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +E0 +38 +00 +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +ENDCHAR +STARTCHAR uni01F9 +ENCODING 505 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +70 +1C +00 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR Aringacute +ENCODING 506 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 16 1 0 +BITMAP +0700 +1C00 +0000 +1C00 +2600 +1C00 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR aringacute +ENCODING 507 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 14 1 0 +BITMAP +0E +38 +00 +18 +2C +18 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR AEacute +ENCODING 508 +SWIDTH 997 0 +DWIDTH 13 0 +BBX 11 13 1 0 +BITMAP +0380 +0E00 +0000 +1FE0 +1600 +2600 +2600 +67C0 +4600 +7E00 +C600 +C600 +C7E0 +ENDCHAR +STARTCHAR aeacute +ENCODING 509 +SWIDTH 913 0 +DWIDTH 14 0 +BBX 12 11 1 0 +BITMAP +01C0 +0700 +0000 +7DE0 +0730 +0630 +7FF0 +C600 +C600 +C710 +79E0 +ENDCHAR +STARTCHAR Oslashacute +ENCODING 510 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 15 1 -1 +BITMAP +0380 +0E00 +0000 +0040 +3F40 +6180 +C2C0 +C2C0 +C4C0 +C8C0 +D0C0 +D0C0 +6180 +BF00 +8000 +ENDCHAR +STARTCHAR oslashacute +ENCODING 511 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 13 1 -1 +BITMAP +07 +1C +00 +01 +3D +66 +CB +CB +D3 +D3 +66 +BC +80 +ENDCHAR +STARTCHAR uni0200 +ENCODING 512 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +3600 +1200 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni0201 +ENCODING 513 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +36 +12 +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni0202 +ENCODING 514 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +1E00 +2100 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni0203 +ENCODING 515 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +3C +42 +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni0204 +ENCODING 516 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +D8 +48 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR uni0205 +ENCODING 517 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +6C +24 +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR uni0206 +ENCODING 518 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +78 +84 +00 +7E +60 +60 +60 +7C +60 +60 +60 +60 +7E +ENDCHAR +STARTCHAR uni0207 +ENCODING 519 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +3C +42 +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR uni0208 +ENCODING 520 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 5 13 0 0 +BITMAP +D8 +48 +00 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR uni0209 +ENCODING 521 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 5 11 -1 0 +BITMAP +D8 +48 +00 +30 +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR uni020A +ENCODING 522 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 6 13 0 0 +BITMAP +78 +84 +00 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR uni020B +ENCODING 523 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 6 11 -1 0 +BITMAP +78 +84 +00 +30 +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR uni020C +ENCODING 524 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +3600 +1200 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni020D +ENCODING 525 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +6C +24 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni020E +ENCODING 526 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +1E00 +2100 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni020F +ENCODING 527 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +3C +42 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni0210 +ENCODING 528 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +6C +24 +00 +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR uni0211 +ENCODING 529 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 6 11 1 0 +BITMAP +D8 +48 +00 +6C +6C +70 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR uni0212 +ENCODING 530 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +3C +42 +00 +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR uni0213 +ENCODING 531 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 6 11 1 0 +BITMAP +78 +84 +00 +6C +6C +70 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR uni0214 +ENCODING 532 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +6C +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni0215 +ENCODING 533 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +6C +24 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uni0216 +ENCODING 534 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +3C +42 +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni0217 +ENCODING 535 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +3C +42 +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR Scommaaccent +ENCODING 536 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 15 1 -5 +BITMAP +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +00 +18 +18 +08 +10 +ENDCHAR +STARTCHAR scommaaccent +ENCODING 537 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 13 1 -5 +BITMAP +7C +C0 +C0 +F0 +3C +0C +0C +F8 +00 +30 +30 +10 +20 +ENDCHAR +STARTCHAR Tcommaaccent +ENCODING 538 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 15 1 -5 +BITMAP +FF +18 +18 +18 +18 +18 +18 +18 +18 +18 +00 +18 +18 +08 +10 +ENDCHAR +STARTCHAR tcommaaccent +ENCODING 539 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 15 1 -5 +BITMAP +60 +60 +F8 +60 +60 +60 +60 +60 +60 +38 +00 +30 +30 +10 +20 +ENDCHAR +STARTCHAR uni021E +ENCODING 542 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +2C +18 +00 +C3 +C3 +C3 +C3 +FF +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR uni021F +ENCODING 543 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +B0 +60 +00 +C0 +C0 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR uni0226 +ENCODING 550 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +0C00 +0C00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni0227 +ENCODING 551 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 0 +BITMAP +18 +18 +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni0228 +ENCODING 552 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 12 2 -2 +BITMAP +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +20 +C0 +ENDCHAR +STARTCHAR uni0229 +ENCODING 553 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 10 1 -2 +BITMAP +3C +66 +C6 +FE +C0 +C0 +62 +3C +10 +60 +ENDCHAR +STARTCHAR uni022A +ENCODING 554 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 15 1 0 +BITMAP +1E00 +0000 +2100 +2100 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni022B +ENCODING 555 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +3C +00 +24 +24 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni022C +ENCODING 556 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 15 1 0 +BITMAP +1E00 +0000 +0D00 +1600 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni022D +ENCODING 557 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +3C +00 +34 +58 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni022E +ENCODING 558 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 0 +BITMAP +0C00 +0C00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni022F +ENCODING 559 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +18 +18 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni0230 +ENCODING 560 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 15 1 0 +BITMAP +1E00 +0000 +0C00 +0C00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni0231 +ENCODING 561 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +3C +00 +18 +18 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni0232 +ENCODING 562 +SWIDTH 738 0 +DWIDTH 10 0 +BBX 8 12 1 0 +BITMAP +3C +00 +C3 +C3 +62 +66 +34 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR uni0233 +ENCODING 563 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 12 1 -2 +BITMAP +3C +00 +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +ENDCHAR +STARTCHAR uni0250 +ENCODING 592 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 8 1 0 +BITMAP +EE +73 +63 +63 +7E +60 +60 +3E +ENDCHAR +STARTCHAR uni0254 +ENCODING 596 +SWIDTH 545 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +78 +CC +06 +06 +06 +06 +8C +78 +ENDCHAR +STARTCHAR uni0258 +ENCODING 600 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +78 +CC +C6 +FE +06 +06 +8C +78 +ENDCHAR +STARTCHAR uni0259 +ENCODING 601 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +78 +8C +06 +06 +FE +C6 +CC +78 +ENDCHAR +STARTCHAR uni025F +ENCODING 607 +SWIDTH 461 0 +DWIDTH 7 0 +BBX 7 11 0 -3 +BITMAP +18 +18 +18 +18 +18 +18 +18 +FE +18 +18 +F0 +ENDCHAR +STARTCHAR uni0265 +ENCODING 613 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 -3 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +03 +03 +03 +ENDCHAR +STARTCHAR uni0275 +ENCODING 629 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 8 1 0 +BITMAP +3C +66 +C3 +FF +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni0279 +ENCODING 633 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 5 8 2 0 +BITMAP +18 +18 +18 +18 +18 +38 +D8 +D8 +ENDCHAR +STARTCHAR uni0287 +ENCODING 647 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 10 1 0 +BITMAP +E0 +30 +30 +30 +30 +30 +30 +F8 +30 +30 +ENDCHAR +STARTCHAR uni0288 +ENCODING 648 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 12 1 -2 +BITMAP +60 +60 +F8 +60 +60 +60 +60 +60 +60 +60 +60 +38 +ENDCHAR +STARTCHAR uni0289 +ENCODING 649 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 8 1 0 +BITMAP +C3 +C3 +C3 +FF +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uni028C +ENCODING 652 +SWIDTH 663 0 +DWIDTH 9 0 +BBX 7 8 1 0 +BITMAP +38 +38 +2C +4C +C6 +C6 +C6 +C6 +ENDCHAR +STARTCHAR uni028D +ENCODING 653 +SWIDTH 885 0 +DWIDTH 13 0 +BBX 11 8 1 0 +BITMAP +3180 +3180 +3BC0 +6AC0 +6EC0 +C460 +C460 +C060 +ENDCHAR +STARTCHAR uni028E +ENCODING 654 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 10 1 0 +BITMAP +0E +0C +18 +38 +2C +6C +C6 +C6 +C6 +C6 +ENDCHAR +STARTCHAR uni029E +ENCODING 670 +SWIDTH 681 0 +DWIDTH 9 0 +BBX 8 11 1 -3 +BITMAP +E3 +63 +33 +1B +0F +1B +33 +63 +03 +03 +03 +ENDCHAR +STARTCHAR uni02BB +ENCODING 699 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 4 1 7 +BITMAP +40 +80 +C0 +C0 +ENDCHAR +STARTCHAR afii57929 +ENCODING 700 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 4 1 7 +BITMAP +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR afii64937 +ENCODING 701 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 4 1 7 +BITMAP +C0 +C0 +80 +40 +ENDCHAR +STARTCHAR circumflex +ENCODING 710 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 4 2 3 9 +BITMAP +60 +B0 +ENDCHAR +STARTCHAR caron +ENCODING 711 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 4 2 3 9 +BITMAP +B0 +60 +ENDCHAR +STARTCHAR uni02C8 +ENCODING 712 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 4 1 7 +BITMAP +C0 +C0 +80 +80 +ENDCHAR +STARTCHAR macron +ENCODING 713 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 4 1 3 9 +BITMAP +F0 +ENDCHAR +STARTCHAR uni02CA +ENCODING 714 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 2 3 9 +BITMAP +38 +E0 +ENDCHAR +STARTCHAR uni02CB +ENCODING 715 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 2 2 9 +BITMAP +E0 +38 +ENDCHAR +STARTCHAR uni02CD +ENCODING 717 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 4 1 3 -2 +BITMAP +F0 +ENDCHAR +STARTCHAR uni02CE +ENCODING 718 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 2 2 -3 +BITMAP +E0 +38 +ENDCHAR +STARTCHAR uni02CF +ENCODING 719 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 2 3 -3 +BITMAP +38 +E0 +ENDCHAR +STARTCHAR breve +ENCODING 728 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 6 2 2 9 +BITMAP +84 +78 +ENDCHAR +STARTCHAR dotaccent +ENCODING 729 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 2 2 4 9 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR ring +ENCODING 730 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 4 3 3 8 +BITMAP +60 +B0 +60 +ENDCHAR +STARTCHAR ogonek +ENCODING 731 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 3 2 5 -2 +BITMAP +80 +60 +ENDCHAR +STARTCHAR tilde +ENCODING 732 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 2 3 9 +BITMAP +68 +B0 +ENDCHAR +STARTCHAR hungarumlaut +ENCODING 733 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 2 3 9 +BITMAP +D8 +90 +ENDCHAR +STARTCHAR uni02EE +ENCODING 750 +SWIDTH 530 0 +DWIDTH 7 0 +BBX 5 4 1 7 +BITMAP +D8 +D8 +48 +90 +ENDCHAR +STARTCHAR uni037E +ENCODING 894 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 2 9 1 -2 +BITMAP +C0 +C0 +00 +00 +00 +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR tonos +ENCODING 900 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 2 3 9 +BITMAP +38 +E0 +ENDCHAR +STARTCHAR dieresistonos +ENCODING 901 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 5 5 3 9 +BITMAP +38 +E0 +00 +90 +90 +ENDCHAR +STARTCHAR anoteleia +ENCODING 903 +SWIDTH 343 0 +DWIDTH 10 0 +BBX 2 2 4 3 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR mu +ENCODING 956 +SWIDTH 699 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +E7 +FB +C0 +C0 +ENDCHAR +STARTCHAR uni1E00 +ENCODING 7680 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 14 1 -4 +BITMAP +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +0000 +0C00 +1600 +0C00 +ENDCHAR +STARTCHAR uni1E01 +ENCODING 7681 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 12 1 -4 +BITMAP +7C +06 +06 +7E +C6 +C6 +CE +77 +00 +18 +2C +18 +ENDCHAR +STARTCHAR uni1E02 +ENCODING 7682 +SWIDTH 669 0 +DWIDTH 10 0 +BBX 7 13 2 0 +BITMAP +30 +30 +00 +FC +C6 +C6 +CC +F0 +CC +C6 +C6 +C6 +FC +ENDCHAR +STARTCHAR uni1E03 +ENCODING 7683 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +60 +60 +00 +C0 +C0 +C0 +DC +E6 +C3 +C3 +C3 +C3 +C6 +FC +ENDCHAR +STARTCHAR uni1E04 +ENCODING 7684 +SWIDTH 669 0 +DWIDTH 10 0 +BBX 7 13 2 -3 +BITMAP +FC +C6 +C6 +CC +F0 +CC +C6 +C6 +C6 +FC +00 +30 +30 +ENDCHAR +STARTCHAR uni1E05 +ENCODING 7685 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 14 1 -3 +BITMAP +C0 +C0 +C0 +DC +E6 +C3 +C3 +C3 +C3 +C6 +FC +00 +18 +18 +ENDCHAR +STARTCHAR uni1E06 +ENCODING 7686 +SWIDTH 669 0 +DWIDTH 10 0 +BBX 7 12 2 -2 +BITMAP +FC +C6 +C6 +CC +F0 +CC +C6 +C6 +C6 +FC +00 +78 +ENDCHAR +STARTCHAR uni1E07 +ENCODING 7687 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +C0 +C0 +C0 +DC +E6 +C3 +C3 +C3 +C3 +C6 +FC +00 +3C +ENDCHAR +STARTCHAR uni1E08 +ENCODING 7688 +SWIDTH 726 0 +DWIDTH 11 0 +BBX 8 15 2 -2 +BITMAP +0E +38 +00 +3E +63 +C0 +C0 +C0 +C0 +C0 +C0 +63 +3E +08 +30 +ENDCHAR +STARTCHAR uni1E09 +ENCODING 7689 +SWIDTH 545 0 +DWIDTH 9 0 +BBX 7 13 1 -2 +BITMAP +0E +38 +00 +3C +66 +C0 +C0 +C0 +C0 +62 +3C +10 +60 +ENDCHAR +STARTCHAR uni1E0A +ENCODING 7690 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 9 13 2 0 +BITMAP +1800 +1800 +0000 +FE00 +C300 +C180 +C180 +C180 +C180 +C180 +C180 +C300 +FE00 +ENDCHAR +STARTCHAR uni1E0B +ENCODING 7691 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +06 +06 +00 +03 +03 +03 +3F +63 +C3 +C3 +C3 +C3 +67 +3B +ENDCHAR +STARTCHAR uni1E0C +ENCODING 7692 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 9 13 2 -3 +BITMAP +FE00 +C300 +C180 +C180 +C180 +C180 +C180 +C180 +C300 +FE00 +0000 +1800 +1800 +ENDCHAR +STARTCHAR uni1E0D +ENCODING 7693 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 14 1 -3 +BITMAP +03 +03 +03 +3F +63 +C3 +C3 +C3 +C3 +67 +3B +00 +18 +18 +ENDCHAR +STARTCHAR uni1E0E +ENCODING 7694 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 9 12 2 -2 +BITMAP +FE00 +C300 +C180 +C180 +C180 +C180 +C180 +C180 +C300 +FE00 +0000 +3C00 +ENDCHAR +STARTCHAR uni1E0F +ENCODING 7695 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +03 +03 +03 +3F +63 +C3 +C3 +C3 +C3 +67 +3B +00 +3C +ENDCHAR +STARTCHAR uni1E10 +ENCODING 7696 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 9 12 2 -2 +BITMAP +FE00 +C300 +C180 +C180 +C180 +C180 +C180 +C180 +C300 +FE00 +0800 +3000 +ENDCHAR +STARTCHAR uni1E11 +ENCODING 7697 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +03 +03 +03 +3F +63 +C3 +C3 +C3 +C3 +67 +3B +08 +30 +ENDCHAR +STARTCHAR uni1E12 +ENCODING 7698 +SWIDTH 819 0 +DWIDTH 12 0 +BBX 9 13 2 -3 +BITMAP +FE00 +C300 +C180 +C180 +C180 +C180 +C180 +C180 +C300 +FE00 +0000 +1800 +2C00 +ENDCHAR +STARTCHAR uni1E13 +ENCODING 7699 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 14 1 -3 +BITMAP +03 +03 +03 +3F +63 +C3 +C3 +C3 +C3 +67 +3B +00 +18 +2C +ENDCHAR +STARTCHAR uni1E14 +ENCODING 7700 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 15 1 0 +BITMAP +E0 +38 +00 +78 +00 +7E +60 +60 +60 +7C +60 +60 +60 +60 +7E +ENDCHAR +STARTCHAR uni1E15 +ENCODING 7701 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +70 +1C +00 +3C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR uni1E16 +ENCODING 7702 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 15 2 0 +BITMAP +1C +70 +00 +F0 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR uni1E17 +ENCODING 7703 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +0E +38 +00 +3C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR uni1E18 +ENCODING 7704 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 -3 +BITMAP +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +00 +60 +B0 +ENDCHAR +STARTCHAR uni1E19 +ENCODING 7705 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 -3 +BITMAP +3C +66 +C6 +FE +C0 +C0 +62 +3C +00 +30 +58 +ENDCHAR +STARTCHAR uni1E1A +ENCODING 7706 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 -3 +BITMAP +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +00 +68 +B0 +ENDCHAR +STARTCHAR uni1E1B +ENCODING 7707 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 -3 +BITMAP +3C +66 +C6 +FE +C0 +C0 +62 +3C +00 +34 +58 +ENDCHAR +STARTCHAR uni1E1C +ENCODING 7708 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 15 1 -2 +BITMAP +84 +78 +00 +7E +60 +60 +60 +7C +60 +60 +60 +60 +7E +10 +60 +ENDCHAR +STARTCHAR uni1E1D +ENCODING 7709 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 13 1 -2 +BITMAP +42 +3C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +10 +60 +ENDCHAR +STARTCHAR uni1E1E +ENCODING 7710 +SWIDTH 602 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +60 +60 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR uni1E1F +ENCODING 7711 +SWIDTH 461 0 +DWIDTH 7 0 +BBX 7 14 0 0 +BITMAP +18 +18 +00 +1E +30 +30 +FE +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR uni1E20 +ENCODING 7712 +SWIDTH 759 0 +DWIDTH 11 0 +BBX 8 12 2 0 +BITMAP +3C +00 +3E +63 +C0 +C0 +C0 +C3 +C3 +C3 +63 +3F +ENDCHAR +STARTCHAR uni1E21 +ENCODING 7713 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +3C +00 +3F +63 +C3 +C3 +C3 +67 +3B +03 +C6 +7C +ENDCHAR +STARTCHAR uni1E22 +ENCODING 7714 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +18 +18 +00 +C3 +C3 +C3 +C3 +FF +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR uni1E23 +ENCODING 7715 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +60 +60 +00 +C0 +C0 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR uni1E24 +ENCODING 7716 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 8 13 2 -3 +BITMAP +C3 +C3 +C3 +C3 +FF +C3 +C3 +C3 +C3 +C3 +00 +18 +18 +ENDCHAR +STARTCHAR uni1E25 +ENCODING 7717 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 -3 +BITMAP +C0 +C0 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +00 +18 +18 +ENDCHAR +STARTCHAR uni1E26 +ENCODING 7718 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +24 +24 +00 +C3 +C3 +C3 +C3 +FF +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR uni1E27 +ENCODING 7719 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +90 +90 +00 +C0 +C0 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR uni1E28 +ENCODING 7720 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 8 12 2 -2 +BITMAP +C3 +C3 +C3 +C3 +FF +C3 +C3 +C3 +C3 +C3 +08 +30 +ENDCHAR +STARTCHAR uni1E29 +ENCODING 7721 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +C0 +C0 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +08 +30 +ENDCHAR +STARTCHAR uni1E2A +ENCODING 7722 +SWIDTH 813 0 +DWIDTH 12 0 +BBX 8 13 2 -3 +BITMAP +C3 +C3 +C3 +C3 +FF +C3 +C3 +C3 +C3 +C3 +00 +42 +3C +ENDCHAR +STARTCHAR uni1E2B +ENCODING 7723 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 -3 +BITMAP +C0 +C0 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +00 +42 +3C +ENDCHAR +STARTCHAR uni1E2C +ENCODING 7724 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 5 13 0 -3 +BITMAP +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +00 +68 +B0 +ENDCHAR +STARTCHAR uni1E2D +ENCODING 7725 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 5 14 -1 -3 +BITMAP +30 +30 +00 +30 +30 +30 +30 +30 +30 +30 +30 +00 +68 +B0 +ENDCHAR +STARTCHAR uni1E2E +ENCODING 7726 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 5 16 1 0 +BITMAP +38 +E0 +00 +90 +90 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR uni1E2F +ENCODING 7727 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 5 14 0 0 +BITMAP +38 +E0 +00 +90 +90 +00 +60 +60 +60 +60 +60 +60 +60 +60 +ENDCHAR +STARTCHAR uni1E30 +ENCODING 7728 +SWIDTH 753 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +0E +38 +00 +C3 +C6 +CC +D8 +F0 +D8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR uni1E31 +ENCODING 7729 +SWIDTH 681 0 +DWIDTH 9 0 +BBX 8 14 1 0 +BITMAP +38 +E0 +00 +C0 +C0 +C0 +C6 +CC +D8 +F0 +D8 +CC +C6 +C7 +ENDCHAR +STARTCHAR uni1E32 +ENCODING 7730 +SWIDTH 753 0 +DWIDTH 11 0 +BBX 8 13 2 -3 +BITMAP +C3 +C6 +CC +D8 +F0 +D8 +CC +C6 +C3 +C3 +00 +18 +18 +ENDCHAR +STARTCHAR uni1E33 +ENCODING 7731 +SWIDTH 681 0 +DWIDTH 9 0 +BBX 8 14 1 -3 +BITMAP +C0 +C0 +C0 +C6 +CC +D8 +F0 +D8 +CC +C6 +C7 +00 +18 +18 +ENDCHAR +STARTCHAR uni1E34 +ENCODING 7732 +SWIDTH 753 0 +DWIDTH 11 0 +BBX 8 12 2 -2 +BITMAP +C3 +C6 +CC +D8 +F0 +D8 +CC +C6 +C3 +C3 +00 +3C +ENDCHAR +STARTCHAR uni1E35 +ENCODING 7733 +SWIDTH 681 0 +DWIDTH 9 0 +BBX 8 13 1 -2 +BITMAP +C0 +C0 +C0 +C6 +CC +D8 +F0 +D8 +CC +C6 +C7 +00 +3C +ENDCHAR +STARTCHAR uni1E36 +ENCODING 7734 +SWIDTH 620 0 +DWIDTH 9 0 +BBX 6 13 2 -3 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +FC +00 +60 +60 +ENDCHAR +STARTCHAR uni1E37 +ENCODING 7735 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 2 14 1 -3 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +00 +C0 +C0 +ENDCHAR +STARTCHAR uni1E38 +ENCODING 7736 +SWIDTH 620 0 +DWIDTH 9 0 +BBX 6 15 2 -3 +BITMAP +F0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +FC +00 +60 +60 +ENDCHAR +STARTCHAR uni1E39 +ENCODING 7737 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 4 16 0 -3 +BITMAP +F0 +00 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +00 +60 +60 +ENDCHAR +STARTCHAR uni1E3A +ENCODING 7738 +SWIDTH 620 0 +DWIDTH 9 0 +BBX 6 12 2 -2 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +FC +00 +F0 +ENDCHAR +STARTCHAR uni1E3B +ENCODING 7739 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 4 13 0 -2 +BITMAP +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +00 +F0 +ENDCHAR +STARTCHAR uni1E3C +ENCODING 7740 +SWIDTH 620 0 +DWIDTH 9 0 +BBX 6 13 2 -3 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +FC +00 +60 +B0 +ENDCHAR +STARTCHAR uni1E3D +ENCODING 7741 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 4 14 0 -3 +BITMAP +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +60 +00 +60 +B0 +ENDCHAR +STARTCHAR uni1E3E +ENCODING 7742 +SWIDTH 940 0 +DWIDTH 15 0 +BBX 11 13 2 0 +BITMAP +0380 +0E00 +0000 +E0E0 +E0E0 +B160 +B160 +B160 +9A60 +9A60 +8C60 +8C60 +8060 +ENDCHAR +STARTCHAR uni1E3F +ENCODING 7743 +SWIDTH 1006 0 +DWIDTH 14 0 +BBX 12 11 1 0 +BITMAP +0380 +0E00 +0000 +DDE0 +EF70 +C630 +C630 +C630 +C630 +C630 +C630 +ENDCHAR +STARTCHAR uni1E40 +ENCODING 7744 +SWIDTH 940 0 +DWIDTH 15 0 +BBX 11 13 2 0 +BITMAP +0600 +0600 +0000 +E0E0 +E0E0 +B160 +B160 +B160 +9A60 +9A60 +8C60 +8C60 +8060 +ENDCHAR +STARTCHAR uni1E41 +ENCODING 7745 +SWIDTH 1006 0 +DWIDTH 14 0 +BBX 12 11 1 0 +BITMAP +0600 +0600 +0000 +DDE0 +EF70 +C630 +C630 +C630 +C630 +C630 +C630 +ENDCHAR +STARTCHAR uni1E42 +ENCODING 7746 +SWIDTH 940 0 +DWIDTH 15 0 +BBX 11 13 2 -3 +BITMAP +E0E0 +E0E0 +B160 +B160 +B160 +9A60 +9A60 +8C60 +8C60 +8060 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E43 +ENCODING 7747 +SWIDTH 1006 0 +DWIDTH 14 0 +BBX 12 11 1 -3 +BITMAP +DDE0 +EF70 +C630 +C630 +C630 +C630 +C630 +C630 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E44 +ENCODING 7748 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 0 +BITMAP +30 +30 +00 +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +ENDCHAR +STARTCHAR uni1E45 +ENCODING 7749 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 0 +BITMAP +18 +18 +00 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +ENDCHAR +STARTCHAR uni1E46 +ENCODING 7750 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 -3 +BITMAP +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +00 +0C +0C +ENDCHAR +STARTCHAR uni1E47 +ENCODING 7751 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 -3 +BITMAP +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +00 +18 +18 +ENDCHAR +STARTCHAR uni1E48 +ENCODING 7752 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 12 2 -2 +BITMAP +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +00 +1E +ENDCHAR +STARTCHAR uni1E49 +ENCODING 7753 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 10 1 -2 +BITMAP +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +00 +3C +ENDCHAR +STARTCHAR uni1E4A +ENCODING 7754 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 -3 +BITMAP +E1 +E1 +B1 +B1 +99 +99 +8D +8D +87 +87 +00 +0C +16 +ENDCHAR +STARTCHAR uni1E4B +ENCODING 7755 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 -3 +BITMAP +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +00 +18 +2C +ENDCHAR +STARTCHAR uni1E4C +ENCODING 7756 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 16 1 0 +BITMAP +0700 +1C00 +0000 +0D00 +1600 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1E4D +ENCODING 7757 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +0E +38 +00 +34 +58 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni1E4E +ENCODING 7758 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 16 1 0 +BITMAP +1200 +1200 +0000 +0D00 +1600 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1E4F +ENCODING 7759 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +24 +24 +00 +34 +58 +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni1E50 +ENCODING 7760 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 15 1 0 +BITMAP +3800 +0E00 +0000 +1E00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1E51 +ENCODING 7761 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +70 +1C +00 +3C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni1E52 +ENCODING 7762 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 15 1 0 +BITMAP +0700 +1C00 +0000 +1E00 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1E53 +ENCODING 7763 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +0E +38 +00 +3C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni1E54 +ENCODING 7764 +SWIDTH 657 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +1C +70 +00 +F8 +CC +CC +CC +CC +F8 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR uni1E55 +ENCODING 7765 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +0E +38 +00 +DC +E6 +C3 +C3 +C3 +C3 +C6 +FC +C0 +C0 +ENDCHAR +STARTCHAR uni1E56 +ENCODING 7766 +SWIDTH 657 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +30 +30 +00 +F8 +CC +CC +CC +CC +F8 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR uni1E57 +ENCODING 7767 +SWIDTH 696 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +18 +18 +00 +DC +E6 +C3 +C3 +C3 +C3 +C6 +FC +C0 +C0 +ENDCHAR +STARTCHAR uni1E58 +ENCODING 7768 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 13 2 0 +BITMAP +18 +18 +00 +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR uni1E59 +ENCODING 7769 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 5 11 2 0 +BITMAP +60 +60 +00 +D8 +D8 +E0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR uni1E5A +ENCODING 7770 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 13 2 -3 +BITMAP +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +00 +18 +18 +ENDCHAR +STARTCHAR uni1E5B +ENCODING 7771 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 5 11 2 -3 +BITMAP +D8 +D8 +E0 +C0 +C0 +C0 +C0 +C0 +00 +60 +60 +ENDCHAR +STARTCHAR uni1E5C +ENCODING 7772 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 15 2 -3 +BITMAP +78 +00 +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +00 +18 +18 +ENDCHAR +STARTCHAR uni1E5D +ENCODING 7773 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 5 13 2 -3 +BITMAP +F0 +00 +D8 +D8 +E0 +C0 +C0 +C0 +C0 +C0 +00 +60 +60 +ENDCHAR +STARTCHAR uni1E5E +ENCODING 7774 +SWIDTH 734 0 +DWIDTH 11 0 +BBX 8 12 2 -2 +BITMAP +FC +C6 +C6 +C4 +CC +F8 +CC +C6 +C3 +C3 +00 +3C +ENDCHAR +STARTCHAR uni1E5F +ENCODING 7775 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 5 10 2 -2 +BITMAP +D8 +D8 +E0 +C0 +C0 +C0 +C0 +C0 +00 +F0 +ENDCHAR +STARTCHAR uni1E60 +ENCODING 7776 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +30 +30 +00 +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +ENDCHAR +STARTCHAR uni1E61 +ENCODING 7777 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 11 1 0 +BITMAP +30 +30 +00 +7C +C0 +C0 +F0 +3C +0C +0C +F8 +ENDCHAR +STARTCHAR uni1E62 +ENCODING 7778 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 13 1 -3 +BITMAP +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +00 +18 +18 +ENDCHAR +STARTCHAR uni1E63 +ENCODING 7779 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 11 1 -3 +BITMAP +7C +C0 +C0 +F0 +3C +0C +0C +F8 +00 +30 +30 +ENDCHAR +STARTCHAR uni1E64 +ENCODING 7780 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 16 1 0 +BITMAP +18 +18 +00 +1C +70 +00 +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +ENDCHAR +STARTCHAR uni1E65 +ENCODING 7781 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 14 1 0 +BITMAP +30 +30 +00 +1C +70 +00 +7C +C0 +C0 +F0 +3C +0C +0C +F8 +ENDCHAR +STARTCHAR uni1E66 +ENCODING 7782 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 16 1 0 +BITMAP +18 +18 +00 +2C +18 +00 +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +ENDCHAR +STARTCHAR uni1E67 +ENCODING 7783 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 14 1 0 +BITMAP +30 +30 +00 +58 +30 +00 +7C +C0 +C0 +F0 +3C +0C +0C +F8 +ENDCHAR +STARTCHAR uni1E68 +ENCODING 7784 +SWIDTH 594 0 +DWIDTH 9 0 +BBX 7 16 1 -3 +BITMAP +30 +30 +00 +7C +C6 +C0 +E0 +78 +3C +0E +06 +C6 +7C +00 +18 +18 +ENDCHAR +STARTCHAR uni1E69 +ENCODING 7785 +SWIDTH 622 0 +DWIDTH 8 0 +BBX 6 14 1 -3 +BITMAP +30 +30 +00 +7C +C0 +C0 +F0 +3C +0C +0C +F8 +00 +30 +30 +ENDCHAR +STARTCHAR uni1E6A +ENCODING 7786 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +18 +18 +00 +FF +18 +18 +18 +18 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR uni1E6B +ENCODING 7787 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 13 1 0 +BITMAP +60 +60 +00 +60 +60 +F8 +60 +60 +60 +60 +60 +60 +38 +ENDCHAR +STARTCHAR uni1E6C +ENCODING 7788 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 13 1 -3 +BITMAP +FF +18 +18 +18 +18 +18 +18 +18 +18 +18 +00 +18 +18 +ENDCHAR +STARTCHAR uni1E6D +ENCODING 7789 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 13 1 -3 +BITMAP +60 +60 +F8 +60 +60 +60 +60 +60 +60 +38 +00 +30 +30 +ENDCHAR +STARTCHAR uni1E6E +ENCODING 7790 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +FF +18 +18 +18 +18 +18 +18 +18 +18 +18 +00 +3C +ENDCHAR +STARTCHAR uni1E6F +ENCODING 7791 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 12 1 -2 +BITMAP +60 +60 +F8 +60 +60 +60 +60 +60 +60 +38 +00 +78 +ENDCHAR +STARTCHAR uni1E70 +ENCODING 7792 +SWIDTH 735 0 +DWIDTH 10 0 +BBX 8 13 1 -3 +BITMAP +FF +18 +18 +18 +18 +18 +18 +18 +18 +18 +00 +18 +2C +ENDCHAR +STARTCHAR uni1E71 +ENCODING 7793 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 13 1 -3 +BITMAP +60 +60 +F8 +60 +60 +60 +60 +60 +60 +38 +00 +30 +58 +ENDCHAR +STARTCHAR uni1E72 +ENCODING 7794 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 -3 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +00 +24 +24 +ENDCHAR +STARTCHAR uni1E73 +ENCODING 7795 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 -3 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +00 +24 +24 +ENDCHAR +STARTCHAR uni1E74 +ENCODING 7796 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 -3 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +00 +34 +58 +ENDCHAR +STARTCHAR uni1E75 +ENCODING 7797 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 -3 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +00 +34 +58 +ENDCHAR +STARTCHAR uni1E76 +ENCODING 7798 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 -3 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +00 +18 +2C +ENDCHAR +STARTCHAR uni1E77 +ENCODING 7799 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 -3 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +00 +18 +2C +ENDCHAR +STARTCHAR uni1E78 +ENCODING 7800 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 16 2 0 +BITMAP +0E +38 +00 +1A +2C +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni1E79 +ENCODING 7801 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +07 +1C +00 +1A +2C +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uni1E7A +ENCODING 7802 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 15 2 0 +BITMAP +24 +24 +00 +3C +00 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni1E7B +ENCODING 7803 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +24 +24 +00 +3C +00 +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +ENDCHAR +STARTCHAR uni1E7C +ENCODING 7804 +SWIDTH 735 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +1A00 +2C00 +0000 +C180 +C180 +C180 +6100 +6300 +6300 +3200 +3600 +1C00 +1C00 +ENDCHAR +STARTCHAR uni1E7D +ENCODING 7805 +SWIDTH 663 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +34 +58 +00 +C6 +C6 +C6 +C6 +64 +68 +38 +38 +ENDCHAR +STARTCHAR uni1E7E +ENCODING 7806 +SWIDTH 735 0 +DWIDTH 11 0 +BBX 9 13 1 -3 +BITMAP +C180 +C180 +C180 +6100 +6300 +6300 +3200 +3600 +1C00 +1C00 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1E7F +ENCODING 7807 +SWIDTH 663 0 +DWIDTH 9 0 +BBX 7 11 1 -3 +BITMAP +C6 +C6 +C6 +C6 +64 +68 +38 +38 +00 +30 +30 +ENDCHAR +STARTCHAR Wgrave +ENCODING 7808 +SWIDTH 940 0 +DWIDTH 13 0 +BBX 11 13 1 0 +BITMAP +3800 +0E00 +0000 +C060 +C060 +C660 +C660 +6640 +6B40 +6B40 +7BC0 +3180 +3180 +ENDCHAR +STARTCHAR wgrave +ENCODING 7809 +SWIDTH 885 0 +DWIDTH 13 0 +BBX 11 11 1 0 +BITMAP +3800 +0E00 +0000 +C060 +C460 +C460 +6EC0 +6AC0 +7B80 +3180 +3180 +ENDCHAR +STARTCHAR Wacute +ENCODING 7810 +SWIDTH 940 0 +DWIDTH 13 0 +BBX 11 13 1 0 +BITMAP +0380 +0E00 +0000 +C060 +C060 +C660 +C660 +6640 +6B40 +6B40 +7BC0 +3180 +3180 +ENDCHAR +STARTCHAR wacute +ENCODING 7811 +SWIDTH 885 0 +DWIDTH 13 0 +BBX 11 11 1 0 +BITMAP +0380 +0E00 +0000 +C060 +C460 +C460 +6EC0 +6AC0 +7B80 +3180 +3180 +ENDCHAR +STARTCHAR Wdieresis +ENCODING 7812 +SWIDTH 940 0 +DWIDTH 13 0 +BBX 11 13 1 0 +BITMAP +0900 +0900 +0000 +C060 +C060 +C660 +C660 +6640 +6B40 +6B40 +7BC0 +3180 +3180 +ENDCHAR +STARTCHAR wdieresis +ENCODING 7813 +SWIDTH 885 0 +DWIDTH 13 0 +BBX 11 11 1 0 +BITMAP +0900 +0900 +0000 +C060 +C460 +C460 +6EC0 +6AC0 +7B80 +3180 +3180 +ENDCHAR +STARTCHAR uni1E86 +ENCODING 7814 +SWIDTH 940 0 +DWIDTH 13 0 +BBX 11 13 1 0 +BITMAP +0600 +0600 +0000 +C060 +C060 +C660 +C660 +6640 +6B40 +6B40 +7BC0 +3180 +3180 +ENDCHAR +STARTCHAR uni1E87 +ENCODING 7815 +SWIDTH 885 0 +DWIDTH 13 0 +BBX 11 11 1 0 +BITMAP +0600 +0600 +0000 +C060 +C460 +C460 +6EC0 +6AC0 +7B80 +3180 +3180 +ENDCHAR +STARTCHAR uni1E88 +ENCODING 7816 +SWIDTH 940 0 +DWIDTH 13 0 +BBX 11 13 1 -3 +BITMAP +C060 +C060 +C660 +C660 +6640 +6B40 +6B40 +7BC0 +3180 +3180 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E89 +ENCODING 7817 +SWIDTH 885 0 +DWIDTH 13 0 +BBX 11 11 1 -3 +BITMAP +C060 +C460 +C460 +6EC0 +6AC0 +7B80 +3180 +3180 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1E8A +ENCODING 7818 +SWIDTH 699 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +18 +18 +00 +C6 +C6 +6C +6C +38 +38 +6C +6C +C6 +C6 +ENDCHAR +STARTCHAR uni1E8B +ENCODING 7819 +SWIDTH 568 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +30 +30 +00 +C6 +C6 +64 +38 +38 +4C +C6 +C6 +ENDCHAR +STARTCHAR uni1E8C +ENCODING 7820 +SWIDTH 699 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +24 +24 +00 +C6 +C6 +6C +6C +38 +38 +6C +6C +C6 +C6 +ENDCHAR +STARTCHAR uni1E8D +ENCODING 7821 +SWIDTH 568 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +48 +48 +00 +C6 +C6 +64 +38 +38 +4C +C6 +C6 +ENDCHAR +STARTCHAR uni1E8E +ENCODING 7822 +SWIDTH 738 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +18 +18 +00 +C3 +C3 +62 +66 +34 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR uni1E8F +ENCODING 7823 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 13 1 -2 +BITMAP +18 +18 +00 +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +ENDCHAR +STARTCHAR uni1E90 +ENCODING 7824 +SWIDTH 675 0 +DWIDTH 9 0 +BBX 7 13 1 0 +BITMAP +18 +2C +00 +FE +06 +0C +1C +18 +30 +70 +60 +C0 +FE +ENDCHAR +STARTCHAR uni1E91 +ENCODING 7825 +SWIDTH 608 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +18 +2C +00 +FE +06 +0C +18 +30 +60 +C0 +FE +ENDCHAR +STARTCHAR uni1E92 +ENCODING 7826 +SWIDTH 675 0 +DWIDTH 9 0 +BBX 7 13 1 -3 +BITMAP +FE +06 +0C +1C +18 +30 +70 +60 +C0 +FE +00 +30 +30 +ENDCHAR +STARTCHAR uni1E93 +ENCODING 7827 +SWIDTH 608 0 +DWIDTH 9 0 +BBX 7 11 1 -3 +BITMAP +FE +06 +0C +18 +30 +60 +C0 +FE +00 +30 +30 +ENDCHAR +STARTCHAR uni1E94 +ENCODING 7828 +SWIDTH 675 0 +DWIDTH 9 0 +BBX 7 12 1 -2 +BITMAP +FE +06 +0C +1C +18 +30 +70 +60 +C0 +FE +00 +78 +ENDCHAR +STARTCHAR uni1E95 +ENCODING 7829 +SWIDTH 608 0 +DWIDTH 9 0 +BBX 7 10 1 -2 +BITMAP +FE +06 +0C +18 +30 +60 +C0 +FE +00 +78 +ENDCHAR +STARTCHAR uni1E96 +ENCODING 7830 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 13 1 -2 +BITMAP +C0 +C0 +C0 +DE +E7 +C3 +C3 +C3 +C3 +C3 +C3 +00 +3C +ENDCHAR +STARTCHAR uni1E97 +ENCODING 7831 +SWIDTH 436 0 +DWIDTH 7 0 +BBX 5 13 1 0 +BITMAP +90 +90 +00 +60 +60 +F8 +60 +60 +60 +60 +60 +60 +38 +ENDCHAR +STARTCHAR uni1E98 +ENCODING 7832 +SWIDTH 885 0 +DWIDTH 13 0 +BBX 11 12 1 0 +BITMAP +0600 +0B00 +0600 +0000 +C060 +C460 +C460 +6EC0 +6AC0 +7B80 +3180 +3180 +ENDCHAR +STARTCHAR uni1E99 +ENCODING 7833 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 14 1 -2 +BITMAP +18 +2C +18 +00 +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +ENDCHAR +STARTCHAR uni1EA0 +ENCODING 7840 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 -3 +BITMAP +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EA1 +ENCODING 7841 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 11 1 -3 +BITMAP +7C +06 +06 +7E +C6 +C6 +CE +77 +00 +18 +18 +ENDCHAR +STARTCHAR uni1EA4 +ENCODING 7844 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 16 1 0 +BITMAP +0700 +1C00 +0000 +1C00 +2600 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni1EA5 +ENCODING 7845 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 14 1 0 +BITMAP +0E +38 +00 +18 +2C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni1EA6 +ENCODING 7846 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 16 1 0 +BITMAP +7000 +1C00 +0000 +1C00 +2600 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni1EA7 +ENCODING 7847 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 14 1 0 +BITMAP +70 +1C +00 +18 +2C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni1EAA +ENCODING 7850 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 16 1 0 +BITMAP +1A00 +2C00 +0000 +1C00 +2600 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni1EAB +ENCODING 7851 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 14 1 0 +BITMAP +1A +2C +00 +18 +2C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni1EAC +ENCODING 7852 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 16 1 -3 +BITMAP +0C00 +1600 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EAD +ENCODING 7853 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 14 1 -3 +BITMAP +18 +2C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +00 +18 +18 +ENDCHAR +STARTCHAR uni1EAE +ENCODING 7854 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 16 1 0 +BITMAP +0700 +1C00 +0000 +2100 +1E00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni1EAF +ENCODING 7855 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 14 1 0 +BITMAP +0E +38 +00 +42 +3C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni1EB0 +ENCODING 7856 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 16 1 0 +BITMAP +3800 +0E00 +0000 +2100 +1E00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni1EB1 +ENCODING 7857 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 14 1 0 +BITMAP +70 +1C +00 +42 +3C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni1EB4 +ENCODING 7860 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 16 1 0 +BITMAP +1A00 +2C00 +0000 +2100 +1E00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni1EB5 +ENCODING 7861 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 14 1 0 +BITMAP +1A +2C +00 +42 +3C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +ENDCHAR +STARTCHAR uni1EB6 +ENCODING 7862 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 16 1 -3 +BITMAP +2100 +1E00 +0000 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EB7 +ENCODING 7863 +SWIDTH 623 0 +DWIDTH 9 0 +BBX 8 14 1 -3 +BITMAP +42 +3C +00 +7C +06 +06 +7E +C6 +C6 +CE +77 +00 +18 +18 +ENDCHAR +STARTCHAR uni1EB8 +ENCODING 7864 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 -3 +BITMAP +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +00 +60 +60 +ENDCHAR +STARTCHAR uni1EB9 +ENCODING 7865 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 -3 +BITMAP +3C +66 +C6 +FE +C0 +C0 +62 +3C +00 +30 +30 +ENDCHAR +STARTCHAR uni1EBC +ENCODING 7868 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 13 2 0 +BITMAP +68 +B0 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR uni1EBD +ENCODING 7869 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 11 1 0 +BITMAP +34 +58 +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR uni1EBE +ENCODING 7870 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 16 2 0 +BITMAP +1C +70 +00 +30 +58 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR uni1EBF +ENCODING 7871 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 14 1 0 +BITMAP +0E +38 +00 +18 +2C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR uni1EC0 +ENCODING 7872 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 16 2 0 +BITMAP +E0 +38 +00 +30 +58 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR uni1EC1 +ENCODING 7873 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 14 1 0 +BITMAP +70 +1C +00 +18 +2C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR uni1EC4 +ENCODING 7876 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 16 2 0 +BITMAP +34 +58 +00 +30 +58 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +ENDCHAR +STARTCHAR uni1EC5 +ENCODING 7877 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 14 1 0 +BITMAP +1A +2C +00 +18 +2C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +ENDCHAR +STARTCHAR uni1EC6 +ENCODING 7878 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 16 2 -3 +BITMAP +60 +B0 +00 +FC +C0 +C0 +C0 +F8 +C0 +C0 +C0 +C0 +FC +00 +60 +60 +ENDCHAR +STARTCHAR uni1EC7 +ENCODING 7879 +SWIDTH 614 0 +DWIDTH 9 0 +BBX 7 14 1 -3 +BITMAP +18 +2C +00 +3C +66 +C6 +FE +C0 +C0 +62 +3C +00 +30 +30 +ENDCHAR +STARTCHAR uni1ECA +ENCODING 7882 +SWIDTH 361 0 +DWIDTH 6 0 +BBX 2 13 2 -3 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +00 +C0 +C0 +ENDCHAR +STARTCHAR uni1ECB +ENCODING 7883 +SWIDTH 361 0 +DWIDTH 4 0 +BBX 2 14 1 -3 +BITMAP +C0 +C0 +00 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +00 +C0 +C0 +ENDCHAR +STARTCHAR uni1ECC +ENCODING 7884 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 13 1 -3 +BITMAP +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1ECD +ENCODING 7885 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 11 1 -3 +BITMAP +3C +66 +C3 +C3 +C3 +C3 +66 +3C +00 +18 +18 +ENDCHAR +STARTCHAR uni1ED0 +ENCODING 7888 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 16 1 0 +BITMAP +0700 +1C00 +0000 +0C00 +1600 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1ED1 +ENCODING 7889 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +0E +38 +00 +18 +2C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni1ED2 +ENCODING 7890 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 16 1 0 +BITMAP +3800 +0E00 +0000 +0C00 +1600 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1ED3 +ENCODING 7891 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +70 +1C +00 +18 +2C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni1ED6 +ENCODING 7894 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 16 1 0 +BITMAP +0D00 +1600 +0000 +0C00 +1600 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1ED7 +ENCODING 7895 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 14 1 0 +BITMAP +1A +2C +00 +18 +2C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +ENDCHAR +STARTCHAR uni1ED8 +ENCODING 7896 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 10 16 1 -3 +BITMAP +0C00 +1600 +0000 +3F00 +6180 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1ED9 +ENCODING 7897 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 8 14 1 -3 +BITMAP +18 +2C +00 +3C +66 +C3 +C3 +C3 +C3 +66 +3C +00 +18 +18 +ENDCHAR +STARTCHAR uni1EDA +ENCODING 7898 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 11 13 1 0 +BITMAP +0380 +0E00 +0000 +3F60 +61E0 +C0E0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1EDB +ENCODING 7899 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 10 11 1 0 +BITMAP +0380 +0E00 +0000 +3CC0 +66C0 +C340 +C380 +C300 +C300 +6600 +3C00 +ENDCHAR +STARTCHAR uni1EDC +ENCODING 7900 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 11 13 1 0 +BITMAP +1C00 +0700 +0000 +3F60 +61E0 +C0E0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1EDD +ENCODING 7901 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 10 11 1 0 +BITMAP +3800 +0E00 +0000 +3CC0 +66C0 +C340 +C380 +C300 +C300 +6600 +3C00 +ENDCHAR +STARTCHAR uni1EE0 +ENCODING 7904 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 11 13 1 0 +BITMAP +0680 +0B00 +0000 +3F60 +61E0 +C0E0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +ENDCHAR +STARTCHAR uni1EE1 +ENCODING 7905 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 10 11 1 0 +BITMAP +0D00 +1600 +0000 +3CC0 +66C0 +C340 +C380 +C300 +C300 +6600 +3C00 +ENDCHAR +STARTCHAR uni1EE2 +ENCODING 7906 +SWIDTH 855 0 +DWIDTH 12 0 +BBX 11 13 1 -3 +BITMAP +3F60 +61E0 +C0E0 +C0C0 +C0C0 +C0C0 +C0C0 +C0C0 +6180 +3F00 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EE3 +ENCODING 7907 +SWIDTH 675 0 +DWIDTH 10 0 +BBX 10 11 1 -3 +BITMAP +3CC0 +66C0 +C340 +C380 +C300 +C300 +6600 +3C00 +0000 +1800 +1800 +ENDCHAR +STARTCHAR uni1EE4 +ENCODING 7908 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 13 2 -3 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +C3 +C3 +66 +3C +00 +18 +18 +ENDCHAR +STARTCHAR uni1EE5 +ENCODING 7909 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 8 11 1 -3 +BITMAP +C3 +C3 +C3 +C3 +C3 +C3 +E7 +7B +00 +18 +18 +ENDCHAR +STARTCHAR uni1EE8 +ENCODING 7912 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 10 13 2 0 +BITMAP +0380 +0E00 +0000 +C3C0 +C3C0 +C340 +C380 +C300 +C300 +C300 +C300 +6600 +3C00 +ENDCHAR +STARTCHAR uni1EE9 +ENCODING 7913 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 10 11 1 0 +BITMAP +0380 +0E00 +0000 +C3C0 +C3C0 +C340 +C380 +C300 +C300 +E700 +7B00 +ENDCHAR +STARTCHAR uni1EEA +ENCODING 7914 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 10 13 2 0 +BITMAP +3800 +0E00 +0000 +C3C0 +C3C0 +C340 +C380 +C300 +C300 +C300 +C300 +6600 +3C00 +ENDCHAR +STARTCHAR uni1EEB +ENCODING 7915 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 10 11 1 0 +BITMAP +3800 +0E00 +0000 +C3C0 +C3C0 +C340 +C380 +C300 +C300 +E700 +7B00 +ENDCHAR +STARTCHAR uni1EEE +ENCODING 7918 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 10 13 2 0 +BITMAP +0D00 +1600 +0000 +C3C0 +C3C0 +C340 +C380 +C300 +C300 +C300 +C300 +6600 +3C00 +ENDCHAR +STARTCHAR uni1EEF +ENCODING 7919 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 10 11 1 0 +BITMAP +0D00 +1600 +0000 +C3C0 +C3C0 +C340 +C380 +C300 +C300 +E700 +7B00 +ENDCHAR +STARTCHAR uni1EF0 +ENCODING 7920 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 10 13 2 -3 +BITMAP +C3C0 +C3C0 +C340 +C380 +C300 +C300 +C300 +C300 +6600 +3C00 +0000 +1800 +1800 +ENDCHAR +STARTCHAR uni1EF1 +ENCODING 7921 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 10 11 1 -3 +BITMAP +C3C0 +C3C0 +C340 +C380 +C300 +C300 +E700 +7B00 +0000 +1800 +1800 +ENDCHAR +STARTCHAR Ygrave +ENCODING 7922 +SWIDTH 738 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +70 +1C +00 +C3 +C3 +62 +66 +34 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR ygrave +ENCODING 7923 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 13 1 -2 +BITMAP +E0 +38 +00 +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +ENDCHAR +STARTCHAR uni1EF4 +ENCODING 7924 +SWIDTH 738 0 +DWIDTH 10 0 +BBX 8 13 1 -3 +BITMAP +C3 +C3 +62 +66 +34 +18 +18 +18 +18 +18 +00 +18 +18 +ENDCHAR +STARTCHAR uni1EF5 +ENCODING 7925 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 13 1 -5 +BITMAP +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +00 +30 +30 +ENDCHAR +STARTCHAR uni1EF8 +ENCODING 7928 +SWIDTH 738 0 +DWIDTH 10 0 +BBX 8 13 1 0 +BITMAP +1A +2C +00 +C3 +C3 +62 +66 +34 +18 +18 +18 +18 +18 +ENDCHAR +STARTCHAR uni1EF9 +ENCODING 7929 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 7 13 1 -2 +BITMAP +34 +58 +00 +C6 +C6 +C6 +C6 +6C +68 +38 +30 +60 +E0 +ENDCHAR +STARTCHAR uni2000 +ENCODING 8192 +SWIDTH 500 0 +DWIDTH 7 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2001 +ENCODING 8193 +SWIDTH 1000 0 +DWIDTH 15 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2002 +ENCODING 8194 +SWIDTH 500 0 +DWIDTH 7 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2003 +ENCODING 8195 +SWIDTH 1000 0 +DWIDTH 15 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2004 +ENCODING 8196 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2005 +ENCODING 8197 +SWIDTH 250 0 +DWIDTH 4 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2006 +ENCODING 8198 +SWIDTH 167 0 +DWIDTH 2 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2007 +ENCODING 8199 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2008 +ENCODING 8200 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2009 +ENCODING 8201 +SWIDTH 200 0 +DWIDTH 3 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni200A +ENCODING 8202 +SWIDTH 100 0 +DWIDTH 1 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni200B +ENCODING 8203 +SWIDTH 0 0 +DWIDTH 0 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2010 +ENCODING 8208 +SWIDTH 289 0 +DWIDTH 5 0 +BBX 3 1 1 4 +BITMAP +E0 +ENDCHAR +STARTCHAR uni2011 +ENCODING 8209 +SWIDTH 289 0 +DWIDTH 5 0 +BBX 3 1 1 4 +BITMAP +E0 +ENDCHAR +STARTCHAR figuredash +ENCODING 8210 +SWIDTH 500 0 +DWIDTH 7 0 +BBX 5 1 1 4 +BITMAP +F8 +ENDCHAR +STARTCHAR endash +ENCODING 8211 +SWIDTH 500 0 +DWIDTH 7 0 +BBX 5 1 1 4 +BITMAP +F8 +ENDCHAR +STARTCHAR emdash +ENCODING 8212 +SWIDTH 1000 0 +DWIDTH 15 0 +BBX 13 1 1 4 +BITMAP +FFF8 +ENDCHAR +STARTCHAR afii00208 +ENCODING 8213 +SWIDTH 1000 0 +DWIDTH 15 0 +BBX 13 1 1 4 +BITMAP +FFF8 +ENDCHAR +STARTCHAR quoteleft +ENCODING 8216 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 4 1 7 +BITMAP +40 +80 +C0 +C0 +ENDCHAR +STARTCHAR quoteright +ENCODING 8217 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 4 1 7 +BITMAP +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR quotesinglbase +ENCODING 8218 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 4 1 -2 +BITMAP +C0 +C0 +40 +80 +ENDCHAR +STARTCHAR quotereversed +ENCODING 8219 +SWIDTH 265 0 +DWIDTH 4 0 +BBX 2 4 1 7 +BITMAP +C0 +C0 +80 +40 +ENDCHAR +STARTCHAR quotedblleft +ENCODING 8220 +SWIDTH 530 0 +DWIDTH 7 0 +BBX 5 4 1 7 +BITMAP +48 +90 +D8 +D8 +ENDCHAR +STARTCHAR quotedblright +ENCODING 8221 +SWIDTH 530 0 +DWIDTH 7 0 +BBX 5 4 1 7 +BITMAP +D8 +D8 +48 +90 +ENDCHAR +STARTCHAR quotedblbase +ENCODING 8222 +SWIDTH 530 0 +DWIDTH 7 0 +BBX 5 4 1 -2 +BITMAP +D8 +D8 +48 +90 +ENDCHAR +STARTCHAR uni201F +ENCODING 8223 +SWIDTH 530 0 +DWIDTH 7 0 +BBX 5 4 1 7 +BITMAP +D8 +D8 +90 +48 +ENDCHAR +STARTCHAR dagger +ENCODING 8224 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 6 11 2 -1 +BITMAP +30 +30 +30 +FC +30 +30 +30 +30 +30 +30 +30 +ENDCHAR +STARTCHAR daggerdbl +ENCODING 8225 +SWIDTH 693 0 +DWIDTH 10 0 +BBX 6 11 2 -1 +BITMAP +30 +30 +30 +FC +30 +30 +30 +FC +30 +30 +30 +ENDCHAR +STARTCHAR bullet +ENCODING 8226 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 4 4 3 2 +BITMAP +F0 +F0 +F0 +F0 +ENDCHAR +STARTCHAR ellipsis +ENCODING 8230 +SWIDTH 1000 0 +DWIDTH 10 0 +BBX 6 2 2 0 +BITMAP +CC +CC +ENDCHAR +STARTCHAR perthousand +ENCODING 8240 +SWIDTH 1313 0 +DWIDTH 18 0 +BBX 16 10 1 0 +BITMAP +7000 +D980 +DB00 +7200 +0400 +0800 +138E +36DB +66DB +038E +ENDCHAR +STARTCHAR guilsinglleft +ENCODING 8249 +SWIDTH 361 0 +DWIDTH 5 0 +BBX 4 5 0 2 +BITMAP +30 +60 +C0 +60 +30 +ENDCHAR +STARTCHAR guilsinglright +ENCODING 8250 +SWIDTH 361 0 +DWIDTH 5 0 +BBX 4 5 1 2 +BITMAP +C0 +60 +30 +60 +C0 +ENDCHAR +STARTCHAR fraction +ENCODING 8260 +SWIDTH 93 0 +DWIDTH 4 0 +BBX 6 10 -1 0 +BITMAP +0C +0C +18 +18 +30 +30 +60 +60 +C0 +C0 +ENDCHAR +STARTCHAR oneinferior +ENCODING 8321 +SWIDTH 536 0 +DWIDTH 7 0 +BBX 4 6 1 -2 +BITMAP +30 +F0 +30 +30 +30 +30 +ENDCHAR +STARTCHAR twoinferior +ENCODING 8322 +SWIDTH 536 0 +DWIDTH 7 0 +BBX 5 6 1 -2 +BITMAP +F0 +18 +18 +60 +C0 +F8 +ENDCHAR +STARTCHAR threeinferior +ENCODING 8323 +SWIDTH 536 0 +DWIDTH 7 0 +BBX 5 6 1 -2 +BITMAP +F0 +18 +70 +18 +18 +F0 +ENDCHAR +STARTCHAR uni20A5 +ENCODING 8357 +SWIDTH 1006 0 +DWIDTH 14 0 +BBX 12 12 1 -2 +BITMAP +00C0 +0180 +DDE0 +EF70 +C730 +C630 +C630 +CE30 +CE30 +DE30 +1800 +3000 +ENDCHAR +STARTCHAR uni20A6 +ENCODING 8358 +SWIDTH 783 0 +DWIDTH 12 0 +BBX 8 10 2 0 +BITMAP +E1 +E1 +B1 +FF +99 +FF +8D +8D +87 +87 +ENDCHAR +STARTCHAR uni20A9 +ENCODING 8361 +SWIDTH 940 0 +DWIDTH 13 0 +BBX 11 10 1 0 +BITMAP +C060 +C060 +C660 +FFE0 +6640 +7FC0 +6B40 +7BC0 +3180 +3180 +ENDCHAR +STARTCHAR Euro +ENCODING 8364 +SWIDTH 726 0 +DWIDTH 11 0 +BBX 9 10 1 0 +BITMAP +1F00 +3180 +6000 +FE00 +6000 +FE00 +6000 +6000 +3180 +1F00 +ENDCHAR +STARTCHAR uni20AD +ENCODING 8365 +SWIDTH 753 0 +DWIDTH 11 0 +BBX 8 10 2 0 +BITMAP +C3 +C6 +CC +D8 +FF +D8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR uni2103 +ENCODING 8451 +SWIDTH 955 0 +DWIDTH 15 0 +BBX 14 10 0 0 +BITMAP +60F8 +918C +6300 +0300 +0300 +0300 +0300 +0300 +018C +00F8 +ENDCHAR +STARTCHAR uni2109 +ENCODING 8457 +SWIDTH 831 0 +DWIDTH 13 0 +BBX 12 10 0 0 +BITMAP +63F0 +9300 +6300 +0300 +03E0 +0300 +0300 +0300 +0300 +0300 +ENDCHAR +STARTCHAR trademark +ENCODING 8482 +SWIDTH 901 0 +DWIDTH 13 0 +BBX 10 5 1 5 +BITMAP +FEC0 +2540 +2540 +2540 +2440 +ENDCHAR +STARTCHAR uni212A +ENCODING 8490 +SWIDTH 753 0 +DWIDTH 11 0 +BBX 8 10 2 0 +BITMAP +C3 +C6 +CC +D8 +F0 +D8 +CC +C6 +C3 +C3 +ENDCHAR +STARTCHAR uni212B +ENCODING 8491 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 13 1 0 +BITMAP +1C00 +2600 +1C00 +1C00 +1C00 +2600 +2600 +6300 +4300 +FF00 +C180 +C180 +C180 +ENDCHAR +STARTCHAR uni2132 +ENCODING 8498 +SWIDTH 602 0 +DWIDTH 9 0 +BBX 6 10 2 0 +BITMAP +0C +0C +0C +0C +0C +7C +0C +0C +0C +FC +ENDCHAR +STARTCHAR universal +ENCODING 8704 +SWIDTH 773 0 +DWIDTH 11 0 +BBX 9 10 1 0 +BITMAP +C180 +C180 +C180 +FF00 +4300 +6300 +2600 +2600 +1C00 +1C00 +ENDCHAR +STARTCHAR existential +ENCODING 8707 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 6 10 2 0 +BITMAP +FC +0C +0C +0C +7C +0C +0C +0C +0C +FC +ENDCHAR +STARTCHAR uni2204 +ENCODING 8708 +SWIDTH 645 0 +DWIDTH 9 0 +BBX 8 12 1 -1 +BITMAP +03 +7E +06 +0E +0E +3E +1E +36 +36 +66 +7E +C0 +ENDCHAR +STARTCHAR minus +ENCODING 8722 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 1 1 4 +BITMAP +FE +ENDCHAR +STARTCHAR fraction +ENCODING 8725 +SWIDTH 93 0 +DWIDTH 4 0 +BBX 6 10 -1 0 +BITMAP +0C +0C +18 +18 +30 +30 +60 +60 +C0 +C0 +ENDCHAR +STARTCHAR periodcentered +ENCODING 8729 +SWIDTH 343 0 +DWIDTH 10 0 +BBX 2 2 4 3 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR uni2236 +ENCODING 8758 +SWIDTH 343 0 +DWIDTH 4 0 +BBX 2 7 1 0 +BITMAP +C0 +C0 +00 +00 +00 +C0 +C0 +ENDCHAR +STARTCHAR uni2259 +ENCODING 8793 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 6 1 3 +BITMAP +18 +2C +00 +FE +00 +FE +ENDCHAR +STARTCHAR uni225A +ENCODING 8794 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 6 1 3 +BITMAP +2C +18 +00 +FE +00 +FE +ENDCHAR +STARTCHAR notequal +ENCODING 8800 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 1 -1 +BITMAP +03 +06 +06 +0C +0C +FE +18 +FE +30 +60 +60 +C0 +ENDCHAR +STARTCHAR equivalence +ENCODING 8801 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 7 5 0 2 +BITMAP +FE +00 +FE +00 +FE +ENDCHAR +STARTCHAR uni2262 +ENCODING 8802 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 0 -1 +BITMAP +03 +06 +06 +0C +FE +18 +FE +30 +FE +60 +60 +C0 +ENDCHAR +STARTCHAR lessequal +ENCODING 8804 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 6 9 2 -1 +BITMAP +0C +38 +60 +C0 +60 +38 +0C +00 +FC +ENDCHAR +STARTCHAR greaterequal +ENCODING 8805 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 6 9 2 -1 +BITMAP +C0 +70 +18 +0C +18 +70 +C0 +00 +FC +ENDCHAR +STARTCHAR uni226E +ENCODING 8814 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 1 -1 +BITMAP +03 +06 +06 +0E +1C +38 +78 +30 +3C +66 +60 +C0 +ENDCHAR +STARTCHAR uni226F +ENCODING 8815 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 1 -1 +BITMAP +03 +06 +06 +6C +3C +1C +1E +3C +38 +60 +60 +C0 +ENDCHAR +STARTCHAR uni2270 +ENCODING 8816 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +03 +06 +06 +1C +3C +78 +38 +3C +36 +60 +7E +C0 +ENDCHAR +STARTCHAR uni2271 +ENCODING 8817 +SWIDTH 687 0 +DWIDTH 10 0 +BBX 8 12 1 -2 +BITMAP +03 +06 +66 +3C +0C +1E +1C +38 +70 +60 +7E +C0 +ENDCHAR +STARTCHAR fi +ENCODING -1 +SWIDTH 711 0 +DWIDTH 11 0 +BBX 9 11 0 0 +BITMAP +1D80 +3180 +3000 +FF80 +3180 +3180 +3180 +3180 +3180 +3180 +3180 +ENDCHAR +STARTCHAR fl +ENCODING -1 +SWIDTH 711 0 +DWIDTH 10 0 +BBX 9 11 0 0 +BITMAP +1F80 +3180 +3180 +FD80 +3180 +3180 +3180 +3180 +3180 +3180 +3180 +ENDCHAR +ENDFONT diff --git a/bertos/fonts/luBS14.c b/bertos/fonts/luBS14.c new file mode 100644 index 0000000..ee717de --- /dev/null +++ b/bertos/fonts/luBS14.c @@ -0,0 +1,1316 @@ +/* Generated by convbdf on Thu Apr 8 16:34:22 CEST 2010. */ +#include + +/* Font information: + + name: -B&H-Lucida-Bold-R-Normal-Sans-14-140-75-75-P-92-ISO10646-1 + pixel size: 14 + ascent: 13 + descent: 2 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_luBS14_glyphs[] = { + +/* Character (0x00): bbw=7, bbh=9, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0x50, 0x00, 0x10, 0x00, 0x10, 0x00, 0x50, 0x00, 0x00, 0x00, /* * * * * * * */ +0x00, 0x00, 0x15, 0x00, 0x10, 0x00, 0x10, 0x00, 0x15, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * * */ + +/* Character (0x20): bbw=1, bbh=1, bbx=0, bby=0, width=4 */ +0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0x21): bbw=2, bbh=10, bbx=1, bby=0, width=4 */ +0x00, 0xf8, 0xf8, 0x00, /* ***** ***** */ +0x00, 0x1b, 0x18, 0x00, /* ***** ***** ** ** ** */ + +/* Character (0x22): bbw=5, bbh=4, bbx=1, bby=7, width=7 */ +0x00, 0x3c, 0x0c, 0x00, 0x3c, 0x0c, 0x00, /* **** ** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ** **** ** */ + +/* Character (0x23): bbw=9, bbh=10, bbx=0, bby=0, width=10 */ +0x00, 0x40, 0xc0, 0xf8, 0x78, 0xc0, 0xf8, 0x78, 0x40, 0x00, /* * ** ***** **** ** ***** **** * */ +0x02, 0x1e, 0x1f, 0x03, 0x1e, 0x1f, 0x03, 0x02, 0x02, 0x00, /* * ** ***** **** ** ***** **** * * **** ***** ** **** ***** ** * * */ + +/* Character (0x24): bbw=7, bbh=12, bbx=1, bby=-1, width=10 */ +0x00, 0x70, 0xf8, 0xc8, 0xfc, 0x08, 0x18, 0x10, 0x00, 0x00, /* *** ***** * ** ****** * ** * */ +0x00, 0x08, 0x18, 0x10, 0x3f, 0x13, 0x1f, 0x0e, 0x00, 0x00, /* *** ***** * ** ****** * ** * * ** * ****** ** * ***** *** */ + +/* Character (0x25): bbw=10, bbh=10, bbx=1, bby=0, width=12 */ +0x00, 0x30, 0x78, 0x48, 0x78, 0x30, 0x80, 0x60, 0x30, 0x10, 0x00, 0x00, /* ** **** * * **** ** * ** ** * */ +0x00, 0x00, 0x08, 0x0c, 0x06, 0x01, 0x0c, 0x1e, 0x12, 0x1e, 0x0c, 0x00, /* ** **** * * **** ** * ** ** * * ** ** * ** **** * * **** ** */ + +/* Character (0x26): bbw=9, bbh=10, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x70, 0xf8, 0x88, 0x88, 0x78, 0x30, 0x80, 0x80, 0x00, /* *** ***** * * * * **** ** * * */ +0x00, 0x0e, 0x1f, 0x18, 0x11, 0x13, 0x0e, 0x0c, 0x1b, 0x11, 0x00, /* *** ***** * * * * **** ** * * *** ***** ** * * ** * *** ** ** ** * * */ + +/* Character (0x27): bbw=2, bbh=4, bbx=1, bby=7, width=4 */ +0x00, 0x3c, 0x0c, 0x00, /* **** ** */ +0x00, 0x00, 0x00, 0x00, /* **** ** */ + +/* Character (0x28): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0xe0, 0xf8, 0x1c, 0x04, 0x00, /* *** ***** *** * */ +0x00, 0x07, 0x1f, 0x38, 0x20, 0x00, /* *** ***** *** * *** ***** *** * */ + +/* Character (0x29): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0x04, 0x1c, 0xf8, 0xe0, 0x00, /* * *** ***** *** */ +0x00, 0x20, 0x38, 0x1f, 0x07, 0x00, /* * *** ***** *** * *** ***** *** */ + +/* Character (0x2a): bbw=5, bbh=5, bbx=1, bby=5, width=7 */ +0x00, 0x50, 0x20, 0xf8, 0x20, 0x50, 0x00, /* * * * ***** * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ***** * * * */ + +/* Character (0x2b): bbw=7, bbh=7, bbx=1, bby=1, width=10 */ +0x00, 0x00, 0x00, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** */ +0x00, 0x01, 0x01, 0x01, 0x0f, 0x01, 0x01, 0x01, 0x00, 0x00, /* *** * * * **** * * * */ + +/* Character (0x2c): bbw=2, bbh=4, bbx=1, bby=-2, width=4 */ +0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x58, 0x38, 0x00, /* ** * *** */ + +/* Character (0x2d): bbw=3, bbh=1, bbx=1, bby=4, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x01, 0x01, 0x01, 0x00, /* * * * */ + +/* Character (0x2e): bbw=2, bbh=2, bbx=1, bby=0, width=4 */ +0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x18, 0x18, 0x00, /* ** ** */ + +/* Character (0x2f): bbw=8, bbh=12, bbx=0, bby=-1, width=8 */ +0x00, 0x00, 0x00, 0x80, 0xe0, 0x78, 0x1c, 0x04, /* * *** **** *** * */ +0x20, 0x38, 0x1e, 0x07, 0x01, 0x00, 0x00, 0x00, /* * *** **** *** * * *** **** *** * */ + +/* Character (0x30): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * ** **** *** *** **** ** * * ** **** *** */ + +/* Character (0x31): bbw=5, bbh=10, bbx=2, bby=0, width=10 */ +0x00, 0x00, 0x10, 0x10, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x00, /* * * * ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, /* * * * ***** ***** ***** ***** */ + +/* Character (0x32): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x10, 0x18, 0x08, 0x08, 0x08, 0x98, 0xf8, 0x70, 0x00, /* * ** * * * ** * ***** *** */ +0x00, 0x18, 0x1c, 0x1c, 0x1a, 0x1b, 0x19, 0x18, 0x18, 0x00, /* * ** * * * ** * ***** *** ** *** *** * ** ** ** * ** ** ** */ + +/* Character (0x33): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x10, 0x18, 0x88, 0x88, 0x88, 0xd8, 0x78, 0x30, 0x00, /* * ** * * * * * * ** ** **** ** */ +0x00, 0x08, 0x18, 0x10, 0x10, 0x10, 0x19, 0x1f, 0x0e, 0x00, /* * ** * * * * * * ** ** **** ** * ** * * * * ** ***** *** */ + +/* Character (0x34): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0x40, 0x20, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x00, /* * * * * ***** ***** */ +0x00, 0x03, 0x03, 0x03, 0x03, 0x1f, 0x1f, 0x03, 0x03, 0x00, /* * * * * ***** ***** ** ** ** ** ***** ***** ** ** */ + +/* Character (0x35): bbw=7, bbh=10, bbx=2, bby=0, width=10 */ +0x00, 0x00, 0xf8, 0x98, 0x98, 0x98, 0x98, 0x98, 0x00, 0x00, /* ***** ** * ** * ** * ** * ** * */ +0x00, 0x00, 0x08, 0x18, 0x10, 0x10, 0x19, 0x0f, 0x07, 0x00, /* ***** ** * ** * ** * ** * ** * * ** * * * ** **** *** */ + +/* Character (0x36): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xf0, 0x98, 0x48, 0x48, 0xc8, 0x98, 0x10, 0x00, /* *** **** ** * * * * * * ** ** * * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * * * ** ** * * *** **** ** * * ** **** *** */ + +/* Character (0x37): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x18, 0x18, 0x18, 0x98, 0xd8, 0x78, 0x38, 0x18, 0x00, /* ** ** ** ** * ** ** **** *** ** */ +0x00, 0x00, 0x1c, 0x1f, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** * ** ** **** *** ** *** ***** ** */ + +/* Character (0x38): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x30, 0x78, 0xc8, 0xc8, 0x88, 0x98, 0x78, 0x30, 0x00, /* ** **** * ** * ** * * ** * **** ** */ +0x00, 0x0e, 0x1f, 0x18, 0x10, 0x11, 0x13, 0x1f, 0x0e, 0x00, /* ** **** * ** * ** * * ** * **** ** *** ***** ** * * * ** * ***** *** */ + +/* Character (0x39): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * ** **** *** */ +0x00, 0x08, 0x19, 0x11, 0x12, 0x12, 0x19, 0x0f, 0x07, 0x00, /* *** **** ** * * ** **** *** * * ** * * * * * * * ** **** *** */ + +/* Character (0x3a): bbw=2, bbh=7, bbx=1, bby=0, width=4 */ +0x00, 0xc0, 0xc0, 0x00, /* ** ** */ +0x00, 0x18, 0x18, 0x00, /* ** ** ** ** */ + +/* Character (0x3b): bbw=2, bbh=9, bbx=1, bby=-2, width=4 */ +0x00, 0xc0, 0xc0, 0x00, /* ** ** */ +0x00, 0x58, 0x38, 0x00, /* ** ** ** * *** */ + +/* Character (0x3c): bbw=6, bbh=7, bbx=2, bby=1, width=10 */ +0x00, 0x00, 0x00, 0x80, 0xc0, 0x40, 0x60, 0x20, 0x00, 0x00, /* * ** * ** * */ +0x00, 0x00, 0x01, 0x03, 0x06, 0x04, 0x0c, 0x08, 0x00, 0x00, /* * ** * ** * * ** ** * ** * */ + +/* Character (0x3d): bbw=7, bbh=3, bbx=1, bby=3, width=10 */ +0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * * * */ +0x00, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, 0x00, /* * * * * * * * * * * * * * * */ + +/* Character (0x3e): bbw=6, bbh=7, bbx=2, bby=1, width=10 */ +0x00, 0x00, 0x20, 0x60, 0x40, 0xc0, 0x80, 0x00, 0x00, 0x00, /* * ** * ** * */ +0x00, 0x00, 0x08, 0x0c, 0x04, 0x06, 0x03, 0x01, 0x00, 0x00, /* * ** * ** * * ** * ** ** * */ + +/* Character (0x3f): bbw=6, bbh=10, bbx=1, bby=0, width=8 */ +0x00, 0x10, 0x18, 0x08, 0x88, 0xf8, 0x70, 0x00, /* * ** * * * ***** *** */ +0x00, 0x00, 0x00, 0x1b, 0x1b, 0x00, 0x00, 0x00, /* * ** * * * ***** *** ** ** ** ** */ + +/* Character (0x40): bbw=10, bbh=10, bbx=1, bby=0, width=12 */ +0x00, 0xc0, 0x30, 0x10, 0x88, 0xc8, 0x48, 0x48, 0xf0, 0xe0, 0x00, 0x00, /* ** ** * * * * ** * * * * **** *** */ +0x00, 0x03, 0x0c, 0x08, 0x13, 0x17, 0x14, 0x14, 0x13, 0x07, 0x04, 0x00, /* ** ** * * * * ** * * * * **** *** ** ** * ** * *** * * * * * ** * *** * */ + +/* Character (0x41): bbw=9, bbh=10, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe0, 0x18, 0x18, 0x78, 0xe0, 0x80, 0x00, 0x00, /* * *** ** ** **** *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * *** ** ** **** *** * **** ***** * * * * ** ***** *** */ + +/* Character (0x42): bbw=7, bbh=10, bbx=2, bby=0, width=10 */ +0x00, 0x00, 0xf8, 0xf8, 0x88, 0x88, 0x48, 0x78, 0x30, 0x00, /* ***** ***** * * * * * * **** ** */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x11, 0x1f, 0x0e, 0x00, /* ***** ***** * * * * * * **** ** ***** ***** * * * * ***** *** */ + +/* Character (0x43): bbw=8, bbh=10, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x18, 0x10, 0x00, /* *** **** ** * * * ** * */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x18, 0x08, 0x00, /* *** **** ** * * * ** * *** **** ** * * * ** * */ + +/* Character (0x44): bbw=9, bbh=10, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x08, 0x08, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* ***** ***** * * * * ** **** *** */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* ***** ***** * * * * ** **** *** ***** ***** * * * * ** **** *** */ + +/* Character (0x45): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x88, 0x88, 0x88, 0x08, 0x00, /* ***** ***** * * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ***** ***** * * * * * * * ***** ***** * * * * */ + +/* Character (0x46): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x88, 0x88, 0x88, 0x08, 0x00, /* ***** ***** * * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** * * * * * * * ***** ***** */ + +/* Character (0x47): bbw=8, bbh=10, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x18, 0x10, 0x00, /* *** **** ** * * * ** * */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x1f, 0x1f, 0x00, /* *** **** ** * * * ** * *** **** ** * * * ***** ***** */ + +/* Character (0x48): bbw=8, bbh=10, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x80, 0x80, 0x80, 0x80, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** * * * * ***** ***** */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* ***** ***** * * * * ***** ***** ***** ***** ***** ***** */ + +/* Character (0x49): bbw=2, bbh=10, bbx=2, bby=0, width=6 */ +0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* ***** ***** ***** ***** */ + +/* Character (0x4a): bbw=4, bbh=12, bbx=0, bby=-2, width=6 */ +0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** */ +0x40, 0x40, 0x7f, 0x3f, 0x00, 0x00, /* ***** ***** * ************** */ + +/* Character (0x4b): bbw=8, bbh=10, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0xf8, 0xf8, 0x80, 0xc0, 0x60, 0x30, 0x18, 0x08, 0x00, /* ***** ***** * ** ** ** ** * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x01, 0x03, 0x06, 0x1c, 0x18, 0x00, /* ***** ***** * ** ** ** ** * ***** ***** * ** ** *** ** */ + +/* Character (0x4c): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ***** ***** ***** ***** * * * * */ + +/* Character (0x4d): bbw=11, bbh=10, bbx=2, bby=0, width=15 */ +0x00, 0x00, 0xf8, 0x18, 0xf8, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0x18, 0xf8, 0xf8, 0x00, 0x00, /* ***** ** ***** *** *** ** ***** ***** */ +0x00, 0x00, 0x1f, 0x00, 0x00, 0x03, 0x0f, 0x0c, 0x03, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* ***** ** ***** *** *** ** ***** ***** ***** ** **** ** ** ***** ***** */ + +/* Character (0x4e): bbw=8, bbh=10, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0x18, 0x78, 0xe0, 0x80, 0x00, 0x00, 0xf8, 0x00, 0x00, /* ***** ** **** *** * ***** */ +0x00, 0x00, 0x1f, 0x00, 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1f, 0x00, 0x00, /* ***** ** **** *** * ***** ***** * *** **** ** ***** */ + +/* Character (0x4f): bbw=10, bbh=10, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0x50): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x08, 0x08, 0xf8, 0xf0, 0x00, /* ***** ***** * * ***** **** */ +0x00, 0x00, 0x1f, 0x1f, 0x01, 0x01, 0x01, 0x00, 0x00, /* ***** ***** * * ***** **** ***** ***** * * * */ + +/* Character (0x51): bbw=10, bbh=12, bbx=1, bby=-2, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x30, 0x78, 0x4f, 0x07, 0x00, /* *** **** ** * * * * ** **** *** *** **** ** * * * ** ******** **** */ + +/* Character (0x52): bbw=8, bbh=10, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0xf8, 0xf8, 0x08, 0x08, 0x88, 0xf8, 0x30, 0x00, 0x00, /* ***** ***** * * * * ***** ** */ +0x00, 0x00, 0x1f, 0x1f, 0x01, 0x01, 0x03, 0x06, 0x1c, 0x18, 0x00, /* ***** ***** * * * * ***** ** ***** ***** * * ** ** *** ** */ + +/* Character (0x53): bbw=7, bbh=10, bbx=1, bby=0, width=9 */ +0x00, 0x70, 0xf8, 0xc8, 0x88, 0x88, 0x18, 0x10, 0x00, /* *** ***** * ** * * * * ** * */ +0x00, 0x08, 0x18, 0x11, 0x11, 0x13, 0x1f, 0x0e, 0x00, /* *** ***** * ** * * * * ** * * ** * * * * ** * ***** *** */ + +/* Character (0x54): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x08, 0x08, 0x08, 0xf8, 0xf8, 0x08, 0x08, 0x08, 0x00, /* * * * ***** ***** * * * */ +0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /* * * * ***** ***** * * * ***** ***** */ + +/* Character (0x55): bbw=8, bbh=10, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /* ***** ***** ***** ***** *** **** ** * * ** **** *** */ + +/* Character (0x56): bbw=9, bbh=10, bbx=1, bby=0, width=11 */ +0x00, 0x38, 0xf8, 0xc0, 0x00, 0x00, 0x00, 0x80, 0xf8, 0x38, 0x00, /* *** ***** ** * ***** *** */ +0x00, 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1c, 0x07, 0x01, 0x00, 0x00, /* *** ***** ** * ***** *** * *** **** ** *** *** * */ + +/* Character (0x57): bbw=11, bbh=10, bbx=1, bby=0, width=13 */ +0x00, 0x78, 0xf8, 0x80, 0x00, 0x00, 0xe0, 0xe0, 0x00, 0x00, 0xf8, 0x78, 0x00, /* **** ***** * *** *** ***** **** */ +0x00, 0x00, 0x07, 0x1f, 0x1c, 0x07, 0x00, 0x07, 0x1f, 0x1c, 0x07, 0x00, 0x00, /* **** ***** * *** *** ***** **** *** ***** *** *** *** ***** *** *** */ + +/* Character (0x58): bbw=7, bbh=10, bbx=1, bby=0, width=9 */ +0x00, 0x18, 0x78, 0xe0, 0x80, 0xe0, 0x78, 0x18, 0x00, /* ** **** *** * *** **** ** */ +0x00, 0x18, 0x1e, 0x07, 0x01, 0x07, 0x1e, 0x18, 0x00, /* ** **** *** * *** **** ** ** **** *** * *** **** ** */ + +/* Character (0x59): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x18, 0x78, 0xe0, 0x80, 0x00, 0xc0, 0x78, 0x18, 0x00, /* ** **** *** * ** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /* ** **** *** * ** **** ** ***** ***** */ + +/* Character (0x5a): bbw=7, bbh=10, bbx=1, bby=0, width=9 */ +0x00, 0x08, 0x08, 0x08, 0xc8, 0xe8, 0x78, 0x18, 0x00, /* * * * * ** * *** **** ** */ +0x00, 0x18, 0x1e, 0x17, 0x13, 0x10, 0x10, 0x10, 0x00, /* * * * * ** * *** **** ** ** **** *** * ** * * * * */ + +/* Character (0x5b): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0xfc, 0xfc, 0x04, 0x04, 0x00, /* ****** ****** * * */ +0x00, 0x3f, 0x3f, 0x20, 0x20, 0x00, /* ****** ****** * * ****** ****** * * */ + +/* Character (0x5c): bbw=8, bbh=12, bbx=0, bby=-1, width=8 */ +0x04, 0x1c, 0x78, 0xe0, 0x80, 0x00, 0x00, 0x00, /* * *** **** *** * */ +0x00, 0x00, 0x00, 0x01, 0x07, 0x1e, 0x38, 0x20, /* * *** **** *** * * *** **** *** * */ + +/* Character (0x5d): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0x04, 0x04, 0xfc, 0xfc, 0x00, /* * * ****** ****** */ +0x00, 0x20, 0x20, 0x3f, 0x3f, 0x00, /* * * ****** ****** * * ****** ****** */ + +/* Character (0x5e): bbw=6, bbh=7, bbx=2, bby=3, width=10 */ +0x00, 0x00, 0x80, 0xe0, 0x38, 0x38, 0xe0, 0x80, 0x00, 0x00, /* * *** *** *** *** * */ +0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, /* * *** *** *** *** * ** ** */ + +/* Character (0x5f): bbw=9, bbh=1, bbx=1, bby=-1, width=11 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x00, /* * * * * * * * * * */ + +/* Character (0x60): bbw=5, bbh=2, bbx=2, bby=9, width=10 */ +0x00, 0x00, 0x04, 0x04, 0x0c, 0x08, 0x08, 0x00, 0x00, 0x00, /* * * ** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * */ + +/* Character (0x61): bbw=8, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x20, 0x20, 0x20, 0xe0, 0xc0, 0x00, /* * * * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0x62): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xfc, 0xfc, 0x40, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /* ****** ****** * * * ** ** * */ +0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* ****** ****** * * * ** ** * ***** ***** * * * ** **** *** */ + +/* Character (0x63): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x60, 0x40, 0x00, /* * ** ** * * ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x08, 0x00, /* * ** ** * * ** * *** **** ** * * * * */ + +/* Character (0x64): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x20, 0xfc, 0xfc, 0x00, /* * ** ** * * * ****** ****** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* * ** ** * * * ****** ****** *** **** ** * * * ***** ***** */ + +/* Character (0x65): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0xe0, 0xc0, 0x00, /* * ** ** * * *** ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * ** ** * * *** ** *** **** * ** * * * * * * * * */ + +/* Character (0x66): bbw=7, bbh=11, bbx=0, bby=0, width=7 */ +0x20, 0x20, 0xf8, 0xfc, 0x24, 0x24, 0x24, /* * * ***** ****** * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, /* * * ***** ****** * * * * * * ***** ***** */ + +/* Character (0x67): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x20, 0xe0, 0xe0, 0x00, /* * ** ** * * * *** *** */ +0x00, 0x23, 0x67, 0x4c, 0x48, 0x48, 0x64, 0x3f, 0x1f, 0x00, /* * ** ** * * * *** *** ** * *** ** ** * * * * * * ******** ***** */ + +/* Character (0x68): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xfc, 0xfc, 0x40, 0x20, 0x20, 0x60, 0xe0, 0xc0, 0x00, /* ****** ****** * * * ** *** ** */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /* ****** ****** * * * ** *** ** ***** ***** ***** ***** */ + +/* Character (0x69): bbw=2, bbh=11, bbx=1, bby=0, width=4 */ +0x00, 0xec, 0xec, 0x00, /* ** *** ** *** */ +0x00, 0x1f, 0x1f, 0x00, /* ** *** ** *** ***** ***** */ + +/* Character (0x6a): bbw=4, bbh=13, bbx=0, bby=-2, width=5 */ +0x00, 0x00, 0xec, 0xec, 0x00, /* ** *** ** *** */ +0x40, 0x40, 0x7f, 0x3f, 0x00, /* ** *** ** *** * ************** */ + +/* Character (0x6b): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0xfc, 0xfc, 0x00, 0x80, 0xc0, 0x60, 0x20, 0x00, /* ****** ****** * ** ** * */ +0x00, 0x1f, 0x1f, 0x01, 0x03, 0x06, 0x1c, 0x18, 0x10, /* ****** ****** * ** ** * ***** ***** * ** ** *** ** * */ + +/* Character (0x6c): bbw=2, bbh=11, bbx=1, bby=0, width=4 */ +0x00, 0xfc, 0xfc, 0x00, /* ****** ****** */ +0x00, 0x1f, 0x1f, 0x00, /* ****** ****** ***** ***** */ + +/* Character (0x6d): bbw=12, bbh=8, bbx=1, bby=0, width=14 */ +0x00, 0xe0, 0xe0, 0x40, 0x20, 0x60, 0xe0, 0xc0, 0x60, 0x20, 0x60, 0xe0, 0xc0, 0x00, /* *** *** * * ** *** ** ** * ** *** ** */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /* *** *** * * ** *** ** ** * ** *** ** ***** ***** ***** ***** ***** ***** */ + +/* Character (0x6e): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x40, 0x20, 0x20, 0x60, 0xe0, 0xc0, 0x00, /* *** *** * * * ** *** ** */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /* *** *** * * * ** *** ** ***** ***** ***** ***** */ + +/* Character (0x6f): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /* * ** ** * * ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** ** * * ** ** * *** **** ** * * ** **** *** */ + +/* Character (0x70): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */ +0x00, 0xe0, 0xe0, 0x40, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /* *** *** * * * ** ** * */ +0x00, 0x7f, 0x7f, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** *** * * * ** ** * ************** * * * ** **** *** */ + +/* Character (0x71): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x20, 0xe0, 0xe0, 0x00, /* * ** ** * * * *** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x08, 0x7f, 0x7f, 0x00, /* * ** ** * * * *** *** *** **** ** * * * ************** */ + +/* Character (0x72): bbw=5, bbh=8, bbx=2, bby=0, width=8 */ +0x00, 0x00, 0xe0, 0xe0, 0x80, 0x60, 0x60, 0x00, /* *** *** * ** ** */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /* *** *** * ** ** ***** ***** */ + +/* Character (0x73): bbw=6, bbh=8, bbx=1, bby=0, width=8 */ +0x00, 0xc0, 0xe0, 0x20, 0x20, 0x20, 0x20, 0x00, /* ** *** * * * * */ +0x00, 0x11, 0x11, 0x13, 0x13, 0x1e, 0x0e, 0x00, /* ** *** * * * * * * * * ** * ** * **** *** */ + +/* Character (0x74): bbw=5, bbh=10, bbx=1, bby=0, width=7 */ +0x00, 0x20, 0xf8, 0xf8, 0x20, 0x20, 0x00, /* * ***** ***** * * */ +0x00, 0x00, 0x0f, 0x1f, 0x10, 0x10, 0x00, /* * ***** ***** * * **** ***** * * */ + +/* Character (0x75): bbw=8, bbh=8, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** *** *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0x76): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** *** *** */ +0x00, 0x01, 0x07, 0x1e, 0x18, 0x1c, 0x03, 0x01, 0x00, /* *** *** *** *** * *** **** ** *** ** * */ + +/* Character (0x77): bbw=11, bbh=8, bbx=1, bby=0, width=13 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** ** *** *** */ +0x00, 0x00, 0x07, 0x1f, 0x1c, 0x07, 0x01, 0x07, 0x1c, 0x1f, 0x03, 0x00, 0x00, /* *** *** ** *** *** *** ***** *** *** * *** *** ***** ** */ + +/* Character (0x78): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x60, 0xe0, 0x80, 0x00, 0x00, 0xe0, 0x60, 0x00, /* ** *** * *** ** */ +0x00, 0x18, 0x1c, 0x03, 0x03, 0x07, 0x1c, 0x18, 0x00, /* ** *** * *** ** ** *** ** ** *** *** ** */ + +/* Character (0x79): bbw=7, bbh=10, bbx=1, bby=-2, width=9 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** *** *** */ +0x00, 0x41, 0x67, 0x7e, 0x18, 0x0e, 0x03, 0x01, 0x00, /* *** *** *** *** * **** ** ****** ** *** ** * */ + +/* Character (0x7a): bbw=7, bbh=8, bbx=1, bby=0, width=9 */ +0x00, 0x20, 0x20, 0x20, 0x20, 0xa0, 0xe0, 0x60, 0x00, /* * * * * * * *** ** */ +0x00, 0x18, 0x1c, 0x16, 0x13, 0x11, 0x10, 0x10, 0x00, /* * * * * * * *** ** ** *** ** * ** * * * * * */ + +/* Character (0x7b): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0x98, 0xbc, 0x64, 0x04, 0x00, /* ** * **** * * ** * */ +0x00, 0x1c, 0x3e, 0x23, 0x20, 0x00, /* ** * **** * * ** * *** ***** ** * * */ + +/* Character (0x7c): bbw=2, bbh=12, bbx=1, bby=-1, width=4 */ +0x00, 0xfc, 0xfc, 0x00, /* ****** ****** */ +0x00, 0x3f, 0x3f, 0x00, /* ****** ****** ****** ****** */ + +/* Character (0x7d): bbw=4, bbh=12, bbx=1, bby=-1, width=6 */ +0x00, 0x04, 0x64, 0xbc, 0x98, 0x00, /* * * ** **** * ** * */ +0x00, 0x20, 0x23, 0x3e, 0x1c, 0x00, /* * * ** **** * ** * * ** * ***** *** */ + +/* Character (0x7e): bbw=7, bbh=3, bbx=1, bby=3, width=9 */ +0x00, 0x00, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x00, /* * * * * */ +0x00, 0x03, 0x00, 0x01, 0x03, 0x03, 0x02, 0x01, 0x00, /* * * * * ** * ** ** * * */ + +/* Character (0xa0): bbw=1, bbh=1, bbx=0, bby=0, width=4 */ +0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0xa1): bbw=2, bbh=10, bbx=1, bby=-2, width=4 */ +0x00, 0x60, 0x60, 0x00, /* ** ** */ +0x00, 0x7e, 0x7f, 0x00, /* ** ** ************* */ + +/* Character (0xa2): bbw=7, bbh=12, bbx=1, bby=-1, width=10 */ +0x00, 0xc0, 0xe0, 0x30, 0x10, 0xfc, 0x10, 0x30, 0x00, 0x00, /* ** *** ** * ****** * ** */ +0x00, 0x03, 0x07, 0x0c, 0x08, 0x3f, 0x08, 0x08, 0x00, 0x00, /* ** *** ** * ****** * ** ** *** ** * ****** * * */ + +/* Character (0xa3): bbw=7, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0x80, 0xf0, 0xf8, 0x88, 0x88, 0x10, 0x00, 0x00, /* * * **** ***** * * * * * */ +0x00, 0x10, 0x18, 0x1f, 0x17, 0x10, 0x10, 0x10, 0x00, 0x00, /* * * **** ***** * * * * * * ** ***** *** * * * * */ + +/* Character (0xa4): bbw=9, bbh=10, bbx=0, bby=0, width=10 */ +0x08, 0xd0, 0xe0, 0x20, 0x20, 0x20, 0xe0, 0xd0, 0x08, 0x00, /* * * ** *** * * * *** * ** * */ +0x10, 0x0b, 0x07, 0x04, 0x04, 0x04, 0x07, 0x0b, 0x10, 0x00, /* * * ** *** * * * *** * ** * * ** * *** * * * *** ** * * */ + +/* Character (0xa5): bbw=8, bbh=10, bbx=1, bby=0, width=10 */ +0x00, 0x18, 0x78, 0xe0, 0x80, 0x00, 0xc0, 0x78, 0x18, 0x00, /* ** **** *** * ** **** ** */ +0x00, 0x00, 0x05, 0x05, 0x1f, 0x1f, 0x05, 0x05, 0x00, 0x00, /* ** **** *** * ** **** ** * * * * ***** ***** * * * * */ + +/* Character (0xa6): bbw=2, bbh=12, bbx=1, bby=-1, width=4 */ +0x00, 0x7c, 0x7c, 0x00, /* ***** ***** */ +0x00, 0x3e, 0x3e, 0x00, /* ***** ***** ***** ***** */ + +/* Character (0xa7): bbw=6, bbh=11, bbx=2, bby=-1, width=10 */ +0x00, 0x00, 0xb0, 0xf8, 0x48, 0xc8, 0x98, 0x10, 0x00, 0x00, /* ** * ***** * * * ** ** * * */ +0x00, 0x00, 0x11, 0x33, 0x26, 0x24, 0x3f, 0x1b, 0x00, 0x00, /* ** * ***** * * * ** ** * * * * ** ** ** * * * ****** ** ** */ + +/* Character (0xa8): bbw=4, bbh=2, bbx=3, bby=9, width=10 */ +0x00, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x00, /* ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** */ + +/* Character (0xa9): bbw=10, bbh=10, bbx=1, bby=0, width=12 */ +0x00, 0xc0, 0x30, 0x10, 0x88, 0xc8, 0x48, 0x48, 0x10, 0x30, 0xc0, 0x00, /* ** ** * * * * ** * * * * * ** ** */ +0x00, 0x03, 0x0c, 0x08, 0x11, 0x13, 0x12, 0x12, 0x08, 0x0c, 0x03, 0x00, /* ** ** * * * * ** * * * * * ** ** ** ** * * * ** * * * * * * ** ** */ + +/* Character (0xaa): bbw=6, bbh=6, bbx=1, bby=4, width=8 */ +0x00, 0xc0, 0xe8, 0x28, 0xf8, 0xf0, 0x00, 0x00, /* ** * *** * * ***** **** */ +0x00, 0x00, 0x01, 0x01, 0x00, 0x01, 0x01, 0x00, /* ** * *** * * ***** **** * * * * */ + +/* Character (0xab): bbw=8, bbh=5, bbx=0, bby=2, width=9 */ +0x00, 0x80, 0xc0, 0x40, 0x00, 0x80, 0xc0, 0x40, 0x00, /* * ** * * ** * */ +0x01, 0x03, 0x06, 0x04, 0x01, 0x03, 0x06, 0x04, 0x00, /* * ** * * ** * * ** ** * * ** ** * */ + +/* Character (0xac): bbw=7, bbh=4, bbx=1, bby=1, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x0f, 0x00, 0x00, /* * * * * * * **** */ + +/* Character (0xad): bbw=3, bbh=1, bbx=1, bby=4, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x01, 0x01, 0x01, 0x00, /* * * * */ + +/* Character (0xae): bbw=7, bbh=7, bbx=1, bby=3, width=10 */ +0x00, 0xe0, 0x10, 0xe8, 0x68, 0xa8, 0x10, 0xe0, 0x00, 0x00, /* *** * * *** * ** * * * * *** */ +0x00, 0x00, 0x01, 0x02, 0x02, 0x02, 0x01, 0x00, 0x00, 0x00, /* *** * * *** * ** * * * * *** * * * * * */ + +/* Character (0xaf): bbw=4, bbh=1, bbx=3, bby=9, width=10 */ +0x00, 0x00, 0x00, 0x08, 0x08, 0x08, 0x08, 0x00, 0x00, 0x00, /* * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * */ + +/* Character (0xb0): bbw=4, bbh=3, bbx=0, bby=7, width=4 */ +0x10, 0x28, 0x28, 0x10, /* * * * * * * */ +0x00, 0x00, 0x00, 0x00, /* * * * * * * */ + +/* Character (0xb1): bbw=7, bbh=7, bbx=1, bby=1, width=10 */ +0x00, 0x80, 0x80, 0x80, 0xe0, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * *** * * * */ +0x00, 0x08, 0x08, 0x08, 0x0b, 0x08, 0x08, 0x08, 0x00, 0x00, /* * * * *** * * * * * * ** * * * * */ + +/* Character (0xb2): bbw=5, bbh=6, bbx=1, bby=4, width=7 */ +0x00, 0x88, 0xc8, 0x48, 0x38, 0x30, 0x00, /* * * * ** * * *** ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x00, /* * * * ** * * *** ** * * * * * */ + +/* Character (0xb3): bbw=5, bbh=6, bbx=1, bby=4, width=7 */ +0x00, 0x08, 0x28, 0x28, 0xf8, 0xd0, 0x00, /* * * * * * ***** * ** */ +0x00, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* * * * * * ***** * ** * * * * */ + +/* Character (0xb4): bbw=5, bbh=2, bbx=3, bby=9, width=10 */ +0x00, 0x00, 0x00, 0x08, 0x08, 0x0c, 0x04, 0x04, 0x00, 0x00, /* * * ** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * */ + +/* Character (0xb5): bbw=8, bbh=10, bbx=1, bby=-2, width=10 */ +0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, /* *** *** *** *** */ +0x00, 0x7f, 0x7f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** *** *** *** ************** ** * * * ***** ***** */ + +/* Character (0xb6): bbw=6, bbh=11, bbx=2, bby=-1, width=10 */ +0x00, 0x00, 0xf0, 0xf8, 0xf8, 0xf8, 0x08, 0xf8, 0x00, 0x00, /* **** ***** ***** ***** * ***** */ +0x00, 0x00, 0x00, 0x01, 0x01, 0x3f, 0x00, 0x3f, 0x00, 0x00, /* **** ***** ***** ***** * ***** * * ****** ****** */ + +/* Character (0xb7): bbw=2, bbh=2, bbx=4, bby=3, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, 0x00, 0x00, 0x00, /* ** ** */ + +/* Character (0xb8): bbw=3, bbh=2, bbx=3, bby=-2, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x40, 0x40, 0x20, 0x00, 0x00, 0x00, 0x00, /* * * * */ + +/* Character (0xb9): bbw=4, bbh=6, bbx=1, bby=4, width=7 */ +0x00, 0x10, 0x10, 0xf8, 0xf8, 0x00, 0x00, /* * * ***** ***** */ +0x00, 0x00, 0x00, 0x01, 0x01, 0x00, 0x00, /* * * ***** ***** * * */ + +/* Character (0xba): bbw=6, bbh=6, bbx=1, bby=4, width=8 */ +0x00, 0xf0, 0xf8, 0x08, 0x08, 0xf8, 0xf0, 0x00, /* **** ***** * * ***** **** */ +0x00, 0x00, 0x01, 0x01, 0x01, 0x01, 0x00, 0x00, /* **** ***** * * ***** **** * * * * */ + +/* Character (0xbb): bbw=8, bbh=5, bbx=1, bby=2, width=9 */ +0x00, 0x40, 0xc0, 0x80, 0x00, 0x40, 0xc0, 0x80, 0x00, /* * ** * * ** * */ +0x00, 0x04, 0x06, 0x03, 0x01, 0x04, 0x06, 0x03, 0x01, /* * ** * * ** * * ** ** * * ** ** * */ + +/* Character (0xbc): bbw=12, bbh=10, bbx=1, bby=0, width=14 */ +0x00, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x80, 0x60, 0x18, 0x80, 0x80, 0x80, 0x00, 0x00, /* * ***** ***** * ** ** * * * */ +0x00, 0x00, 0x01, 0x01, 0x18, 0x06, 0x01, 0x06, 0x05, 0x04, 0x1f, 0x1f, 0x04, 0x00, /* * ***** ***** * ** ** * * * * * ** ** * ** * * * ***** ***** * */ + +/* Character (0xbd): bbw=12, bbh=10, bbx=1, bby=0, width=14 */ +0x00, 0x10, 0xf8, 0xf8, 0x00, 0x00, 0x80, 0x60, 0x18, 0x80, 0x80, 0x80, 0x00, 0x00, /* * ***** ***** * ** ** * * * */ +0x00, 0x00, 0x01, 0x01, 0x18, 0x06, 0x01, 0x00, 0x19, 0x1c, 0x16, 0x17, 0x13, 0x00, /* * ***** ***** * ** ** * * * * * ** ** * * ** *** ** * *** * ** * */ + +/* Character (0xbe): bbw=13, bbh=10, bbx=1, bby=0, width=15 */ +0x00, 0x90, 0x08, 0x28, 0xf8, 0xd0, 0x00, 0xc0, 0x20, 0x18, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * ***** * ** ** * ** * * * */ +0x00, 0x00, 0x01, 0x01, 0x19, 0x04, 0x03, 0x00, 0x06, 0x05, 0x04, 0x1f, 0x1f, 0x04, 0x00, /* * * * * * ***** * ** ** * ** * * * * * * ** * ** ** * * * ***** ***** * */ + +/* Character (0xbf): bbw=6, bbh=10, bbx=1, bby=-2, width=8 */ +0x00, 0x00, 0x00, 0x60, 0x60, 0x00, 0x00, 0x00, /* ** ** */ +0x00, 0x38, 0x7c, 0x47, 0x43, 0x60, 0x20, 0x00, /* ** ** *** ******** *** * ** * */ + +/* Character (0xc0): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x81, 0xe1, 0x1b, 0x1a, 0x7a, 0xe0, 0x80, 0x00, 0x00, /* * ** ***** ** * ** * **** *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * ** ***** ** * ** * **** *** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc1): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe0, 0x1a, 0x1a, 0x7b, 0xe1, 0x81, 0x00, 0x00, /* * *** * ** * ** ** **** * **** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * *** * ** * ** ** **** * **** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc2): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe2, 0x19, 0x19, 0x7b, 0xe2, 0x80, 0x00, 0x00, /* * * **** ** * ** ** **** * *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * * **** ** * ** ** **** * *** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc3): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe2, 0x19, 0x1b, 0x7a, 0xe1, 0x80, 0x00, 0x00, /* * * **** ** ** ** * **** * *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * * **** ** ** ** * **** * *** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc4): bbw=8, bbh=13, bbx=1, bby=0, width=10 */ +0x00, 0x00, 0x80, 0xe3, 0x18, 0x78, 0xe3, 0x80, 0x00, 0x00, /* *** *** ** **** ** *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* *** *** ** **** ** *** * **** ***** * * * ** ***** *** */ + +/* Character (0xc5): bbw=9, bbh=13, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x80, 0xe2, 0x1d, 0x1d, 0x7f, 0xe2, 0x80, 0x00, 0x00, /* * * **** *** * *** ******* * *** * */ +0x00, 0x1e, 0x1f, 0x02, 0x02, 0x02, 0x02, 0x03, 0x1f, 0x1c, 0x00, /* * * **** *** * *** ******* * *** * **** ***** * * * * ** ***** *** */ + +/* Character (0xc6): bbw=11, bbh=10, bbx=1, bby=0, width=13 */ +0x00, 0x00, 0x80, 0xe0, 0x18, 0x08, 0xf8, 0xf8, 0x88, 0x88, 0x88, 0x08, 0x00, /* * *** ** * ***** ***** * * * * * * * */ +0x00, 0x1c, 0x1f, 0x02, 0x02, 0x02, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* * *** ** * ***** ***** * * * * * * * *** ***** * * * ***** ***** * * * * */ + +/* Character (0xc7): bbw=8, bbh=12, bbx=2, bby=-2, width=11 */ +0x00, 0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x08, 0x18, 0x10, 0x00, /* *** **** ** * * * ** * */ +0x00, 0x00, 0x07, 0x0f, 0x58, 0x50, 0x30, 0x10, 0x18, 0x08, 0x00, /* *** **** ** * * * ** * *** **** ** * * * ** * ** * */ + +/* Character (0xc8): bbw=6, bbh=13, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf9, 0x89, 0x8b, 0x8a, 0x0a, 0x00, /* ****** ****** * *** * * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ****** ****** * *** * * * * * * * ***** ***** * * * * */ + +/* Character (0xc9): bbw=6, bbh=13, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xfa, 0x8a, 0x8b, 0x89, 0x09, 0x00, /* ***** * ***** * * *** * ** * ** * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ***** * ***** * * *** * ** * ** * ***** ***** * * * * */ + +/* Character (0xca): bbw=6, bbh=13, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xfa, 0x89, 0x8b, 0x8a, 0x08, 0x00, /* ***** * ****** * *** * * * * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ***** * ****** * *** * * * * * * ***** ***** * * * * */ + +/* Character (0xcb): bbw=6, bbh=13, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xfb, 0x88, 0x88, 0x8b, 0x08, 0x00, /* ******* ***** * * * *** * * * */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x00, /* ******* ***** * * * *** * * * ***** ***** * * * * */ + +/* Character (0xcc): bbw=4, bbh=13, bbx=1, bby=0, width=6 */ +0x00, 0x01, 0xf9, 0xfb, 0x02, 0x00, /* * * ******* ***** * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* * * ******* ***** * ***** ***** */ + +/* Character (0xcd): bbw=4, bbh=13, bbx=1, bby=0, width=6 */ +0x00, 0x02, 0xfb, 0xf9, 0x01, 0x00, /* * ** ****** ****** */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* * ** ****** ****** ***** ***** */ + +/* Character (0xce): bbw=4, bbh=13, bbx=1, bby=0, width=6 */ +0x00, 0x02, 0xf9, 0xfb, 0x02, 0x00, /* * * ******* ***** * */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* * * ******* ***** * ***** ***** */ + +/* Character (0xcf): bbw=4, bbh=13, bbx=1, bby=0, width=6 */ +0x00, 0x03, 0xf8, 0xf8, 0x03, 0x00, /* ** ***** ******* */ +0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, /* ** ***** ******* ***** ***** */ + +/* Character (0xd0): bbw=11, bbh=10, bbx=0, bby=0, width=12 */ +0x80, 0x80, 0xf8, 0xf8, 0x88, 0x88, 0x08, 0x08, 0x18, 0xf0, 0xe0, 0x00, /* * * ***** ***** * * * * * * ** **** *** */ +0x00, 0x00, 0x1f, 0x1f, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * * ***** ***** * * * * * * ** **** *** ***** ***** * * * * ** **** *** */ + +/* Character (0xd1): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0x18, 0x7a, 0xe1, 0x83, 0x02, 0x01, 0xf8, 0x00, 0x00, /* ***** ** * **** * ***** * * * ***** */ +0x00, 0x00, 0x1f, 0x00, 0x00, 0x01, 0x07, 0x1e, 0x18, 0x1f, 0x00, 0x00, /* ***** ** * **** * ***** * * * ***** ***** * *** **** ** ***** */ + +/* Character (0xd2): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x19, 0x09, 0x0b, 0x0a, 0x0a, 0x18, 0xf0, 0xe0, 0x00, /* *** ***** ** * * ** * * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** ***** ** * * ** * * * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd3): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x0a, 0x0a, 0x0b, 0x09, 0x19, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * ** * * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd4): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x0a, 0x09, 0x0b, 0x0a, 0x18, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * ** * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd5): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x0a, 0x09, 0x0b, 0x0a, 0x19, 0xf0, 0xe0, 0x00, /* *** **** ** * * * * ** * * * * ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * ** * * * * ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd6): bbw=10, bbh=13, bbx=1, bby=0, width=12 */ +0x00, 0xe0, 0xf0, 0x1b, 0x08, 0x08, 0x08, 0x08, 0x1b, 0xf0, 0xe0, 0x00, /* *** ****** ** * * * * ** ** **** *** */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** ****** ** * * * * ** ** **** *** *** **** ** * * * * ** **** *** */ + +/* Character (0xd7): bbw=5, bbh=5, bbx=2, bby=2, width=10 */ +0x00, 0x00, 0x40, 0xc0, 0x80, 0x80, 0x40, 0x00, 0x00, 0x00, /* * ** * * * */ +0x00, 0x00, 0x04, 0x02, 0x03, 0x06, 0x04, 0x00, 0x00, 0x00, /* * ** * * * * * ** ** * */ + +/* Character (0xd8): bbw=10, bbh=12, bbx=1, bby=-1, width=12 */ +0x00, 0xe0, 0xf0, 0x18, 0x08, 0x08, 0x88, 0x68, 0x18, 0xf0, 0xec, 0x00, /* *** **** ** * * * * * ** ** **** ** *** */ +0x00, 0x37, 0x0f, 0x18, 0x16, 0x11, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* *** **** ** * * * * * ** ** **** ** *** *** ** **** ** ** * * * * * ** **** *** */ + +/* Character (0xd9): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf9, 0x01, 0x03, 0x02, 0x02, 0xf8, 0xf8, 0x00, 0x00, /* ****** ****** ** * * ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /* ****** ****** ** * * ***** ***** *** **** ** * * ** **** *** */ + +/* Character (0xda): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x02, 0x02, 0x03, 0x01, 0xf9, 0xf8, 0x00, 0x00, /* ***** ***** * * ** * * ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /* ***** ***** * * ** * * ***** ***** *** **** ** * * ** **** *** */ + +/* Character (0xdb): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x02, 0x01, 0x03, 0x02, 0xf8, 0xf8, 0x00, 0x00, /* ***** ***** * * ** * ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, 0x00, /* ***** ***** * * ** * ***** ***** *** **** ** * * ** **** *** */ + +/* Character (0xdc): bbw=8, bbh=13, bbx=2, bby=0, width=12 */ +0x00, 0x00, 0xf8, 0xf8, 0x03, 0x00, 0x00, 0x03, 0xf8, 0xf8, 0x00, 0x00, /* ***** ******* ** ***** ***** */ +0x00, 0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x07, 0x07, 0x00, 0x00, /* ***** ******* ** ***** ***** *** **** ** * * ** *** *** */ + +/* Character (0xdd): bbw=8, bbh=13, bbx=1, bby=0, width=10 */ +0x00, 0x18, 0x78, 0xe2, 0x82, 0x03, 0xc1, 0x79, 0x18, 0x00, /* ** **** * *** * *** * *** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, /* ** **** * *** * *** * *** **** ** ***** ***** */ + +/* Character (0xde): bbw=6, bbh=10, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0xf8, 0xf8, 0x20, 0x20, 0xe0, 0xc0, 0x00, /* ***** ***** * * *** ** */ +0x00, 0x00, 0x1f, 0x1f, 0x04, 0x04, 0x07, 0x03, 0x00, /* ***** ***** * * *** ** ***** ***** * * *** ** */ + +/* Character (0xdf): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xf8, 0xfc, 0x04, 0x04, 0x44, 0xfc, 0x98, 0x00, 0x00, /* ***** ****** * * * * ****** ** * */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x10, 0x10, 0x1f, 0x0f, 0x00, /* ***** ****** * * * * ****** ** * ***** ***** * * ***** **** */ + +/* Character (0xe0): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x24, 0x24, 0x2c, 0x28, 0xe8, 0xc0, 0x00, /* * * * * ** * * * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * ** * * * * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe1): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x28, 0x28, 0x2c, 0xe4, 0xc4, 0x00, /* * * * * * ** * * *** * ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * * ** * * *** * ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe2): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x28, 0x24, 0x2c, 0xe8, 0xc0, 0x00, /* * * * * * ** * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * * ** * * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe3): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x28, 0x24, 0x2c, 0x28, 0xe4, 0xc0, 0x00, /* * * * * ** * * * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * ** * * * * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe4): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x2c, 0x20, 0x20, 0xec, 0xc0, 0x00, /* * ** * * * ** *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * ** * * * ** *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe5): bbw=8, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x00, 0x20, 0x28, 0x34, 0x3c, 0xe8, 0xc0, 0x00, /* * * * * ** **** * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x09, 0x1f, 0x1f, 0x10, /* * * * * ** **** * *** ** *** ***** * * * * * * ***** ***** * */ + +/* Character (0xe6): bbw=12, bbh=8, bbx=1, bby=0, width=14 */ +0x00, 0x00, 0x20, 0x20, 0x20, 0x20, 0xe0, 0xc0, 0x60, 0x20, 0x20, 0xe0, 0xc0, 0x00, /* * * * * *** ** ** * * *** ** */ +0x00, 0x0e, 0x1f, 0x11, 0x11, 0x11, 0x0f, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * * * * *** ** ** * * *** ** *** ***** * * * * * * **** **** * ** * * * * * * * * */ + +/* Character (0xe7): bbw=7, bbh=10, bbx=1, bby=-2, width=9 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0x20, 0x60, 0x40, 0x00, /* * ** ** * * ** * */ +0x00, 0x07, 0x4f, 0x58, 0x30, 0x10, 0x10, 0x08, 0x00, /* * ** ** * * ** * *** **** * ** * ** * * * */ + +/* Character (0xe8): bbw=7, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc4, 0x64, 0x2c, 0x28, 0xe8, 0xc0, 0x00, /* * * ** * ** ** * * * * *** ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * * ** * ** ** * * * * *** ** *** **** * ** * * * * * * * * */ + +/* Character (0xe9): bbw=7, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc0, 0x68, 0x28, 0x2c, 0xe4, 0xc4, 0x00, /* * ** * ** * * ** * * *** * ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * ** * ** * * ** * * *** * ** *** **** * ** * * * * * * * * */ + +/* Character (0xea): bbw=7, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xc0, 0x68, 0x24, 0x2c, 0xe8, 0xc0, 0x00, /* * ** * ** * * ** * * *** ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * ** * ** * * ** * * *** ** *** **** * ** * * * * * * * * */ + +/* Character (0xeb): bbw=7, bbh=11, bbx=1, bby=0, width=9 */ +0x00, 0x80, 0xcc, 0x60, 0x20, 0x20, 0xec, 0xc0, 0x00, /* * ** ** ** * * ** *** ** */ +0x00, 0x07, 0x0f, 0x19, 0x11, 0x11, 0x11, 0x09, 0x00, /* * ** ** ** * * ** *** ** *** **** * ** * * * * * * * * */ + +/* Character (0xec): bbw=4, bbh=11, bbx=0, bby=0, width=4 */ +0x04, 0xe4, 0xec, 0x08, /* * * *** ** *** * */ +0x00, 0x1f, 0x1f, 0x00, /* * * *** ** *** * ***** ***** */ + +/* Character (0xed): bbw=4, bbh=11, bbx=0, bby=0, width=4 */ +0x08, 0xec, 0xe4, 0x04, /* * ** *** * *** * */ +0x00, 0x1f, 0x1f, 0x00, /* * ** *** * *** * ***** ***** */ + +/* Character (0xee): bbw=4, bbh=11, bbx=0, bby=0, width=4 */ +0x08, 0xe4, 0xec, 0x08, /* * * *** ** *** * */ +0x00, 0x1f, 0x1f, 0x00, /* * * *** ** *** * ***** ***** */ + +/* Character (0xef): bbw=4, bbh=11, bbx=0, bby=0, width=4 */ +0x0c, 0xe0, 0xe0, 0x0c, /* ** *** *** ** */ +0x00, 0x1f, 0x1f, 0x00, /* ** *** *** ** ***** ***** */ + +/* Character (0xf0): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x68, 0x2c, 0x38, 0x78, 0xe8, 0x80, 0x00, /* * ** * ** ** * *** **** * *** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** * ** ** * *** **** * *** * *** **** ** * * ** **** *** */ + +/* Character (0xf1): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x48, 0x24, 0x2c, 0x68, 0xe4, 0xc0, 0x00, /* *** *** * * * * ** * * ** * *** ** */ +0x00, 0x1f, 0x1f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x1f, 0x00, /* *** *** * * * * ** * * ** * *** ** ***** ***** ***** ***** */ + +/* Character (0xf2): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc4, 0x64, 0x2c, 0x28, 0x68, 0xc0, 0x80, 0x00, /* * * ** * ** ** * * * * ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * * ** * ** ** * * * * ** ** * *** **** ** * * ** **** *** */ + +/* Character (0xf3): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x68, 0x28, 0x2c, 0x64, 0xc4, 0x80, 0x00, /* * ** * ** * * ** * * ** * ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** * ** * * ** * * ** * ** * *** **** ** * * ** **** *** */ + +/* Character (0xf4): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x68, 0x24, 0x2c, 0x68, 0xc0, 0x80, 0x00, /* * ** * ** * * ** * * ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** * ** * * ** * * ** ** * *** **** ** * * ** **** *** */ + +/* Character (0xf5): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc8, 0x64, 0x2c, 0x28, 0x64, 0xc0, 0x80, 0x00, /* * * ** * ** ** * * * * ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * * ** * ** ** * * * * ** ** * *** **** ** * * ** **** *** */ + +/* Character (0xf6): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0x80, 0xc0, 0x6c, 0x20, 0x20, 0x6c, 0xc0, 0x80, 0x00, /* * ** ** ** * * ** ** ** * */ +0x00, 0x07, 0x0f, 0x18, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* * ** ** ** * * ** ** ** * *** **** ** * * ** **** *** */ + +/* Character (0xf7): bbw=7, bbh=7, bbx=1, bby=1, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** */ +0x00, 0x01, 0x01, 0x01, 0x0d, 0x01, 0x01, 0x01, 0x00, 0x00, /* ** * * * * ** * * * */ + +/* Character (0xf8): bbw=8, bbh=10, bbx=1, bby=-1, width=10 */ +0x00, 0x80, 0xc0, 0x60, 0x20, 0xa0, 0x60, 0xc0, 0xb0, 0x00, /* * ** ** * * * ** ** ** * */ +0x00, 0x37, 0x0f, 0x18, 0x16, 0x11, 0x18, 0x0f, 0x07, 0x00, /* * ** ** * * * ** ** ** * *** ** **** ** ** * * * ** **** *** */ + +/* Character (0xf9): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe4, 0x04, 0x0c, 0x08, 0x08, 0xe0, 0xe0, 0x00, /* *** * *** * ** * * *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** * *** * ** * * *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0xfa): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe8, 0x08, 0x0c, 0x04, 0x04, 0xe0, 0xe0, 0x00, /* *** * *** * ** * * *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** * *** * ** * * *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0xfb): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x08, 0x04, 0x0c, 0x08, 0xe0, 0xe0, 0x00, /* *** *** * * ** * *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** *** * * ** * *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0xfc): bbw=8, bbh=11, bbx=1, bby=0, width=10 */ +0x00, 0xe0, 0xe0, 0x0c, 0x00, 0x00, 0x0c, 0xe0, 0xe0, 0x00, /* *** *** ** ** *** *** */ +0x00, 0x0f, 0x1f, 0x18, 0x10, 0x10, 0x08, 0x1f, 0x1f, 0x00, /* *** *** ** ** *** *** **** ***** ** * * * ***** ***** */ + +/* Character (0xfd): bbw=7, bbh=13, bbx=1, bby=-2, width=9 */ +0x00, 0xe0, 0xe8, 0x08, 0x0c, 0x04, 0xe4, 0xe0, 0x00, /* *** * *** * ** * * *** *** */ +0x00, 0x41, 0x67, 0x7e, 0x18, 0x0e, 0x03, 0x01, 0x00, /* *** * *** * ** * * *** *** * **** ** ****** ** *** ** * */ + +/* Character (0xfe): bbw=8, bbh=12, bbx=1, bby=-2, width=10 */ +0x00, 0xf8, 0xf8, 0x40, 0x20, 0x20, 0x60, 0xc0, 0x80, 0x00, /* ***** ***** * * * ** ** * */ +0x00, 0x7f, 0x7f, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x07, 0x00, /* ***** ***** * * * ** ** * ************** * * * ** **** *** */ + +/* Character (0xff): bbw=7, bbh=13, bbx=1, bby=-2, width=9 */ +0x00, 0xe0, 0xec, 0x00, 0x00, 0x00, 0xec, 0xe0, 0x00, /* *** ** *** ** *** *** */ +0x00, 0x41, 0x67, 0x7e, 0x18, 0x0e, 0x03, 0x01, 0x00, /* *** ** *** ** *** *** * **** ** ****** ** *** ** * */ +}; + +/* Character->glyph data. */ +static const PROGMEM uint16_t luBS14_offset[] = { + 0, /* (0x00) */ + 0, /* (0x01) */ + 0, /* (0x02) */ + 0, /* (0x03) */ + 0, /* (0x04) */ + 0, /* (0x05) */ + 0, /* (0x06) */ + 0, /* (0x07) */ + 0, /* (0x08) */ + 0, /* (0x09) */ + 0, /* (0x0a) */ + 0, /* (0x0b) */ + 0, /* (0x0c) */ + 0, /* (0x0d) */ + 0, /* (0x0e) */ + 0, /* (0x0f) */ + 0, /* (0x10) */ + 0, /* (0x11) */ + 0, /* (0x12) */ + 0, /* (0x13) */ + 0, /* (0x14) */ + 0, /* (0x15) */ + 0, /* (0x16) */ + 0, /* (0x17) */ + 0, /* (0x18) */ + 0, /* (0x19) */ + 0, /* (0x1a) */ + 0, /* (0x1b) */ + 0, /* (0x1c) */ + 0, /* (0x1d) */ + 0, /* (0x1e) */ + 0, /* (0x1f) */ + 24, /* (0x20) */ + 32, /* (0x21) */ + 40, /* (0x22) */ + 54, /* (0x23) */ + 74, /* (0x24) */ + 94, /* (0x25) */ + 118, /* (0x26) */ + 140, /* (0x27) */ + 148, /* (0x28) */ + 160, /* (0x29) */ + 172, /* (0x2a) */ + 186, /* (0x2b) */ + 206, /* (0x2c) */ + 214, /* (0x2d) */ + 224, /* (0x2e) */ + 232, /* (0x2f) */ + 248, /* (0x30) */ + 268, /* (0x31) */ + 288, /* (0x32) */ + 308, /* (0x33) */ + 328, /* (0x34) */ + 348, /* (0x35) */ + 368, /* (0x36) */ + 388, /* (0x37) */ + 408, /* (0x38) */ + 428, /* (0x39) */ + 448, /* (0x3a) */ + 456, /* (0x3b) */ + 464, /* (0x3c) */ + 484, /* (0x3d) */ + 504, /* (0x3e) */ + 524, /* (0x3f) */ + 540, /* (0x40) */ + 564, /* (0x41) */ + 586, /* (0x42) */ + 606, /* (0x43) */ + 628, /* (0x44) */ + 652, /* (0x45) */ + 670, /* (0x46) */ + 688, /* (0x47) */ + 710, /* (0x48) */ + 734, /* (0x49) */ + 746, /* (0x4a) */ + 758, /* (0x4b) */ + 780, /* (0x4c) */ + 798, /* (0x4d) */ + 828, /* (0x4e) */ + 852, /* (0x4f) */ + 876, /* (0x50) */ + 894, /* (0x51) */ + 918, /* (0x52) */ + 940, /* (0x53) */ + 958, /* (0x54) */ + 978, /* (0x55) */ + 1002, /* (0x56) */ + 1024, /* (0x57) */ + 1050, /* (0x58) */ + 1068, /* (0x59) */ + 1088, /* (0x5a) */ + 1106, /* (0x5b) */ + 1118, /* (0x5c) */ + 1134, /* (0x5d) */ + 1146, /* (0x5e) */ + 1166, /* (0x5f) */ + 1188, /* (0x60) */ + 1208, /* (0x61) */ + 1226, /* (0x62) */ + 1246, /* (0x63) */ + 1264, /* (0x64) */ + 1284, /* (0x65) */ + 1302, /* (0x66) */ + 1316, /* (0x67) */ + 1336, /* (0x68) */ + 1356, /* (0x69) */ + 1364, /* (0x6a) */ + 1374, /* (0x6b) */ + 1392, /* (0x6c) */ + 1400, /* (0x6d) */ + 1428, /* (0x6e) */ + 1448, /* (0x6f) */ + 1468, /* (0x70) */ + 1488, /* (0x71) */ + 1508, /* (0x72) */ + 1524, /* (0x73) */ + 1540, /* (0x74) */ + 1554, /* (0x75) */ + 1574, /* (0x76) */ + 1592, /* (0x77) */ + 1618, /* (0x78) */ + 1636, /* (0x79) */ + 1654, /* (0x7a) */ + 1672, /* (0x7b) */ + 1684, /* (0x7c) */ + 1692, /* (0x7d) */ + 1704, /* (0x7e) */ + 0, /* (0x7f) */ + 0, /* (0x80) */ + 0, /* (0x81) */ + 0, /* (0x82) */ + 0, /* (0x83) */ + 0, /* (0x84) */ + 0, /* (0x85) */ + 0, /* (0x86) */ + 0, /* (0x87) */ + 0, /* (0x88) */ + 0, /* (0x89) */ + 0, /* (0x8a) */ + 0, /* (0x8b) */ + 0, /* (0x8c) */ + 0, /* (0x8d) */ + 0, /* (0x8e) */ + 0, /* (0x8f) */ + 0, /* (0x90) */ + 0, /* (0x91) */ + 0, /* (0x92) */ + 0, /* (0x93) */ + 0, /* (0x94) */ + 0, /* (0x95) */ + 0, /* (0x96) */ + 0, /* (0x97) */ + 0, /* (0x98) */ + 0, /* (0x99) */ + 0, /* (0x9a) */ + 0, /* (0x9b) */ + 0, /* (0x9c) */ + 0, /* (0x9d) */ + 0, /* (0x9e) */ + 0, /* (0x9f) */ + 1722, /* (0xa0) */ + 1730, /* (0xa1) */ + 1738, /* (0xa2) */ + 1758, /* (0xa3) */ + 1778, /* (0xa4) */ + 1798, /* (0xa5) */ + 1818, /* (0xa6) */ + 1826, /* (0xa7) */ + 1846, /* (0xa8) */ + 1866, /* (0xa9) */ + 1890, /* (0xaa) */ + 1906, /* (0xab) */ + 1924, /* (0xac) */ + 1944, /* (0xad) */ + 1954, /* (0xae) */ + 1974, /* (0xaf) */ + 1994, /* (0xb0) */ + 2002, /* (0xb1) */ + 2022, /* (0xb2) */ + 2036, /* (0xb3) */ + 2050, /* (0xb4) */ + 2070, /* (0xb5) */ + 2090, /* (0xb6) */ + 2110, /* (0xb7) */ + 2130, /* (0xb8) */ + 2150, /* (0xb9) */ + 2164, /* (0xba) */ + 2180, /* (0xbb) */ + 2198, /* (0xbc) */ + 2226, /* (0xbd) */ + 2254, /* (0xbe) */ + 2284, /* (0xbf) */ + 2300, /* (0xc0) */ + 2322, /* (0xc1) */ + 2344, /* (0xc2) */ + 2366, /* (0xc3) */ + 2388, /* (0xc4) */ + 2408, /* (0xc5) */ + 2430, /* (0xc6) */ + 2456, /* (0xc7) */ + 2478, /* (0xc8) */ + 2496, /* (0xc9) */ + 2514, /* (0xca) */ + 2532, /* (0xcb) */ + 2550, /* (0xcc) */ + 2562, /* (0xcd) */ + 2574, /* (0xce) */ + 2586, /* (0xcf) */ + 2598, /* (0xd0) */ + 2622, /* (0xd1) */ + 2646, /* (0xd2) */ + 2670, /* (0xd3) */ + 2694, /* (0xd4) */ + 2718, /* (0xd5) */ + 2742, /* (0xd6) */ + 2766, /* (0xd7) */ + 2786, /* (0xd8) */ + 2810, /* (0xd9) */ + 2834, /* (0xda) */ + 2858, /* (0xdb) */ + 2882, /* (0xdc) */ + 2906, /* (0xdd) */ + 2926, /* (0xde) */ + 2944, /* (0xdf) */ + 2964, /* (0xe0) */ + 2982, /* (0xe1) */ + 3000, /* (0xe2) */ + 3018, /* (0xe3) */ + 3036, /* (0xe4) */ + 3054, /* (0xe5) */ + 3072, /* (0xe6) */ + 3100, /* (0xe7) */ + 3118, /* (0xe8) */ + 3136, /* (0xe9) */ + 3154, /* (0xea) */ + 3172, /* (0xeb) */ + 3190, /* (0xec) */ + 3198, /* (0xed) */ + 3206, /* (0xee) */ + 3214, /* (0xef) */ + 3222, /* (0xf0) */ + 3242, /* (0xf1) */ + 3262, /* (0xf2) */ + 3282, /* (0xf3) */ + 3302, /* (0xf4) */ + 3322, /* (0xf5) */ + 3342, /* (0xf6) */ + 3362, /* (0xf7) */ + 3382, /* (0xf8) */ + 3402, /* (0xf9) */ + 3422, /* (0xfa) */ + 3442, /* (0xfb) */ + 3462, /* (0xfc) */ + 3482, /* (0xfd) */ + 3500, /* (0xfe) */ + 3520, /* (0xff) */ +}; + +/* Character width data. */ +static const PROGMEM uint8_t luBS14_width[] = { + 12, /* (0x00) */ + 12, /* (0x01) */ + 12, /* (0x02) */ + 12, /* (0x03) */ + 12, /* (0x04) */ + 12, /* (0x05) */ + 12, /* (0x06) */ + 12, /* (0x07) */ + 12, /* (0x08) */ + 12, /* (0x09) */ + 12, /* (0x0a) */ + 12, /* (0x0b) */ + 12, /* (0x0c) */ + 12, /* (0x0d) */ + 12, /* (0x0e) */ + 12, /* (0x0f) */ + 12, /* (0x10) */ + 12, /* (0x11) */ + 12, /* (0x12) */ + 12, /* (0x13) */ + 12, /* (0x14) */ + 12, /* (0x15) */ + 12, /* (0x16) */ + 12, /* (0x17) */ + 12, /* (0x18) */ + 12, /* (0x19) */ + 12, /* (0x1a) */ + 12, /* (0x1b) */ + 12, /* (0x1c) */ + 12, /* (0x1d) */ + 12, /* (0x1e) */ + 12, /* (0x1f) */ + 4, /* (0x20) */ + 4, /* (0x21) */ + 7, /* (0x22) */ + 10, /* (0x23) */ + 10, /* (0x24) */ + 12, /* (0x25) */ + 11, /* (0x26) */ + 4, /* (0x27) */ + 6, /* (0x28) */ + 6, /* (0x29) */ + 7, /* (0x2a) */ + 10, /* (0x2b) */ + 4, /* (0x2c) */ + 5, /* (0x2d) */ + 4, /* (0x2e) */ + 8, /* (0x2f) */ + 10, /* (0x30) */ + 10, /* (0x31) */ + 10, /* (0x32) */ + 10, /* (0x33) */ + 10, /* (0x34) */ + 10, /* (0x35) */ + 10, /* (0x36) */ + 10, /* (0x37) */ + 10, /* (0x38) */ + 10, /* (0x39) */ + 4, /* (0x3a) */ + 4, /* (0x3b) */ + 10, /* (0x3c) */ + 10, /* (0x3d) */ + 10, /* (0x3e) */ + 8, /* (0x3f) */ + 12, /* (0x40) */ + 11, /* (0x41) */ + 10, /* (0x42) */ + 11, /* (0x43) */ + 12, /* (0x44) */ + 9, /* (0x45) */ + 9, /* (0x46) */ + 11, /* (0x47) */ + 12, /* (0x48) */ + 6, /* (0x49) */ + 6, /* (0x4a) */ + 11, /* (0x4b) */ + 9, /* (0x4c) */ + 15, /* (0x4d) */ + 12, /* (0x4e) */ + 12, /* (0x4f) */ + 9, /* (0x50) */ + 12, /* (0x51) */ + 11, /* (0x52) */ + 9, /* (0x53) */ + 10, /* (0x54) */ + 12, /* (0x55) */ + 11, /* (0x56) */ + 13, /* (0x57) */ + 9, /* (0x58) */ + 10, /* (0x59) */ + 9, /* (0x5a) */ + 6, /* (0x5b) */ + 8, /* (0x5c) */ + 6, /* (0x5d) */ + 10, /* (0x5e) */ + 11, /* (0x5f) */ + 10, /* (0x60) */ + 9, /* (0x61) */ + 10, /* (0x62) */ + 9, /* (0x63) */ + 10, /* (0x64) */ + 9, /* (0x65) */ + 7, /* (0x66) */ + 10, /* (0x67) */ + 10, /* (0x68) */ + 4, /* (0x69) */ + 5, /* (0x6a) */ + 9, /* (0x6b) */ + 4, /* (0x6c) */ + 14, /* (0x6d) */ + 10, /* (0x6e) */ + 10, /* (0x6f) */ + 10, /* (0x70) */ + 10, /* (0x71) */ + 8, /* (0x72) */ + 8, /* (0x73) */ + 7, /* (0x74) */ + 10, /* (0x75) */ + 9, /* (0x76) */ + 13, /* (0x77) */ + 9, /* (0x78) */ + 9, /* (0x79) */ + 9, /* (0x7a) */ + 6, /* (0x7b) */ + 4, /* (0x7c) */ + 6, /* (0x7d) */ + 9, /* (0x7e) */ + 12, /* (0x7f) */ + 12, /* (0x80) */ + 12, /* (0x81) */ + 12, /* (0x82) */ + 12, /* (0x83) */ + 12, /* (0x84) */ + 12, /* (0x85) */ + 12, /* (0x86) */ + 12, /* (0x87) */ + 12, /* (0x88) */ + 12, /* (0x89) */ + 12, /* (0x8a) */ + 12, /* (0x8b) */ + 12, /* (0x8c) */ + 12, /* (0x8d) */ + 12, /* (0x8e) */ + 12, /* (0x8f) */ + 12, /* (0x90) */ + 12, /* (0x91) */ + 12, /* (0x92) */ + 12, /* (0x93) */ + 12, /* (0x94) */ + 12, /* (0x95) */ + 12, /* (0x96) */ + 12, /* (0x97) */ + 12, /* (0x98) */ + 12, /* (0x99) */ + 12, /* (0x9a) */ + 12, /* (0x9b) */ + 12, /* (0x9c) */ + 12, /* (0x9d) */ + 12, /* (0x9e) */ + 12, /* (0x9f) */ + 4, /* (0xa0) */ + 4, /* (0xa1) */ + 10, /* (0xa2) */ + 10, /* (0xa3) */ + 10, /* (0xa4) */ + 10, /* (0xa5) */ + 4, /* (0xa6) */ + 10, /* (0xa7) */ + 10, /* (0xa8) */ + 12, /* (0xa9) */ + 8, /* (0xaa) */ + 9, /* (0xab) */ + 10, /* (0xac) */ + 5, /* (0xad) */ + 10, /* (0xae) */ + 10, /* (0xaf) */ + 4, /* (0xb0) */ + 10, /* (0xb1) */ + 7, /* (0xb2) */ + 7, /* (0xb3) */ + 10, /* (0xb4) */ + 10, /* (0xb5) */ + 10, /* (0xb6) */ + 10, /* (0xb7) */ + 10, /* (0xb8) */ + 7, /* (0xb9) */ + 8, /* (0xba) */ + 9, /* (0xbb) */ + 14, /* (0xbc) */ + 14, /* (0xbd) */ + 15, /* (0xbe) */ + 8, /* (0xbf) */ + 11, /* (0xc0) */ + 11, /* (0xc1) */ + 11, /* (0xc2) */ + 11, /* (0xc3) */ + 10, /* (0xc4) */ + 11, /* (0xc5) */ + 13, /* (0xc6) */ + 11, /* (0xc7) */ + 9, /* (0xc8) */ + 9, /* (0xc9) */ + 9, /* (0xca) */ + 9, /* (0xcb) */ + 6, /* (0xcc) */ + 6, /* (0xcd) */ + 6, /* (0xce) */ + 6, /* (0xcf) */ + 12, /* (0xd0) */ + 12, /* (0xd1) */ + 12, /* (0xd2) */ + 12, /* (0xd3) */ + 12, /* (0xd4) */ + 12, /* (0xd5) */ + 12, /* (0xd6) */ + 10, /* (0xd7) */ + 12, /* (0xd8) */ + 12, /* (0xd9) */ + 12, /* (0xda) */ + 12, /* (0xdb) */ + 12, /* (0xdc) */ + 10, /* (0xdd) */ + 9, /* (0xde) */ + 10, /* (0xdf) */ + 9, /* (0xe0) */ + 9, /* (0xe1) */ + 9, /* (0xe2) */ + 9, /* (0xe3) */ + 9, /* (0xe4) */ + 9, /* (0xe5) */ + 14, /* (0xe6) */ + 9, /* (0xe7) */ + 9, /* (0xe8) */ + 9, /* (0xe9) */ + 9, /* (0xea) */ + 9, /* (0xeb) */ + 4, /* (0xec) */ + 4, /* (0xed) */ + 4, /* (0xee) */ + 4, /* (0xef) */ + 10, /* (0xf0) */ + 10, /* (0xf1) */ + 10, /* (0xf2) */ + 10, /* (0xf3) */ + 10, /* (0xf4) */ + 10, /* (0xf5) */ + 10, /* (0xf6) */ + 10, /* (0xf7) */ + 10, /* (0xf8) */ + 10, /* (0xf9) */ + 10, /* (0xfa) */ + 10, /* (0xfb) */ + 10, /* (0xfc) */ + 9, /* (0xfd) */ + 10, /* (0xfe) */ + 9, /* (0xff) */ +}; + +/* Font structure definition. */ +EXTERN_CONST Font font_luBS14 = +{ + /* .glyph = */ font_luBS14_glyphs, + /* .name = "luBS14", */ + /* .width = */ 15, + /* .height = */ 15, + /* .ascent = 13, */ + /* .first = */ 0, + /* .last = */ 255, + /* .offset = */ luBS14_offset, + /* .width = */ luBS14_width, +}; diff --git a/bertos/fonts/ncenB18.bdf b/bertos/fonts/ncenB18.bdf new file mode 100644 index 0000000..d8eae06 --- /dev/null +++ b/bertos/fonts/ncenB18.bdf @@ -0,0 +1,16273 @@ +STARTFONT 2.1 +FONT -Adobe-New Century Schoolbook-Bold-R-Normal--18-180-75-75-P-113-ISO10646-1 +SIZE 18 75 75 +FONTBOUNDINGBOX 24 31 -3 -8 +COMMENT $Xorg: $ +COMMENT ISO10646-1 extension by Markus Kuhn , 2001-03-20 +COMMENT +COMMENT + +COMMENT Copyright 1984-1989, 1994 Adobe Systems Incorporated. +COMMENT Copyright 1988, 1994 Digital Equipment Corporation. +COMMENT +COMMENT Adobe is a trademark of Adobe Systems Incorporated which may be +COMMENT registered in certain jurisdictions. +COMMENT Permission to use these trademarks is hereby granted only in +COMMENT association with the images described in this file. +COMMENT +COMMENT Permission to use, copy, modify, distribute and sell this software +COMMENT and its documentation for any purpose and without fee is hereby +COMMENT granted, provided that the above copyright notices appear in all +COMMENT copies and that both those copyright notices and this permission +COMMENT notice appear in supporting documentation, and that the names of +COMMENT Adobe Systems and Digital Equipment Corporation not be used in +COMMENT advertising or publicity pertaining to distribution of the software +COMMENT without specific, written prior permission. Adobe Systems and +COMMENT Digital Equipment Corporation make no representations about the +COMMENT suitability of this software for any purpose. It is provided "as +COMMENT is" without express or implied warranty. +COMMENT - +STARTPROPERTIES 26 +FOUNDRY "Adobe" +FAMILY_NAME "New Century Schoolbook" +WEIGHT_NAME "Bold" +SLANT "R" +SETWIDTH_NAME "Normal" +ADD_STYLE_NAME "" +PIXEL_SIZE 18 +POINT_SIZE 180 +RESOLUTION_X 75 +RESOLUTION_Y 75 +SPACING "P" +AVERAGE_WIDTH 113 +CHARSET_REGISTRY "ISO10646" +CHARSET_ENCODING "1" +CAP_HEIGHT 14 +X_HEIGHT 9 +FONT_ASCENT 16 +FONT_DESCENT 4 +FACE_NAME "New Century Schoolbook Bold" +COPYRIGHT "Copyright (c) 1984, 1987 Adobe Systems Incorporated. All Rights Reserved. Copyright (c) 1988, 1991 Digital Equipment Corporation. All Rights Reserved." +NOTICE "New Century Schoolbook is a trademark of Linotype-Hell AG and/or its subsidiaries." +_DEC_DEVICE_FONTNAMES "PS=NewCenturySchlbk-Bold" +DEFAULT_CHAR 0 +RELATIVE_SETWIDTH 50 +RELATIVE_WEIGHT 70 +FULL_NAME "New Century Schoolbook Bold" +ENDPROPERTIES +CHARS 756 +STARTCHAR char0 +ENCODING 0 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 13 13 1 0 +BITMAP +AAA8 +0000 +8008 +0000 +8008 +0000 +8008 +0000 +8008 +0000 +8008 +0000 +AAA8 +ENDCHAR +STARTCHAR space +ENCODING 32 +SWIDTH 287 0 +DWIDTH 5 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR exclam +ENCODING 33 +SWIDTH 296 0 +DWIDTH 6 0 +BBX 4 14 1 0 +BITMAP +60 +F0 +F0 +F0 +F0 +F0 +60 +60 +60 +00 +60 +F0 +F0 +60 +ENDCHAR +STARTCHAR quotedbl +ENCODING 34 +SWIDTH 333 0 +DWIDTH 8 0 +BBX 5 5 1 9 +BITMAP +D8 +D8 +D8 +D8 +D8 +ENDCHAR +STARTCHAR numbersign +ENCODING 35 +SWIDTH 574 0 +DWIDTH 12 0 +BBX 11 13 0 0 +BITMAP +0D80 +0D80 +0D80 +7FE0 +7FE0 +1B00 +1B00 +FFC0 +FFC0 +3600 +3600 +3600 +3600 +ENDCHAR +STARTCHAR dollar +ENCODING 36 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 18 1 -2 +BITMAP +0800 +0800 +3E00 +6B80 +C980 +C980 +E800 +F800 +7E00 +3F00 +0F80 +0B80 +C980 +C980 +EB80 +7F00 +0800 +0800 +ENDCHAR +STARTCHAR percent +ENCODING 37 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 14 14 0 0 +BITMAP +38C0 +6740 +C4C0 +C480 +C580 +C900 +7300 +0238 +0664 +04C4 +0CC4 +08C4 +18C8 +1070 +ENDCHAR +STARTCHAR ampersand +ENCODING 38 +SWIDTH 852 0 +DWIDTH 17 0 +BBX 16 14 0 0 +BITMAP +0780 +0CC0 +1840 +18C0 +1D80 +1F00 +0E3E +3F18 +7790 +E3E0 +E1E0 +E0F1 +F1FE +3F1C +ENDCHAR +STARTCHAR quotesingle +ENCODING 39 +SWIDTH 241 0 +DWIDTH 5 0 +BBX 2 5 1 9 +BITMAP +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR parenleft +ENCODING 40 +SWIDTH 389 0 +DWIDTH 6 0 +BBX 5 16 1 -2 +BITMAP +18 +30 +60 +60 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +60 +60 +30 +18 +ENDCHAR +STARTCHAR parenright +ENCODING 41 +SWIDTH 389 0 +DWIDTH 6 0 +BBX 5 16 0 -2 +BITMAP +C0 +60 +30 +30 +18 +18 +18 +18 +18 +18 +18 +18 +30 +30 +60 +C0 +ENDCHAR +STARTCHAR asterisk +ENCODING 42 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 7 7 0 7 +BITMAP +38 +92 +D6 +38 +D6 +92 +38 +ENDCHAR +STARTCHAR plus +ENCODING 43 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 10 0 0 +BITMAP +0C00 +0C00 +0C00 +0C00 +FFC0 +FFC0 +0C00 +0C00 +0C00 +0C00 +ENDCHAR +STARTCHAR comma +ENCODING 44 +SWIDTH 278 0 +DWIDTH 5 0 +BBX 4 7 0 -3 +BITMAP +60 +F0 +F0 +70 +20 +40 +80 +ENDCHAR +STARTCHAR hyphen +ENCODING 45 +SWIDTH 333 0 +DWIDTH 6 0 +BBX 5 2 0 4 +BITMAP +F8 +F8 +ENDCHAR +STARTCHAR period +ENCODING 46 +SWIDTH 278 0 +DWIDTH 5 0 +BBX 4 4 0 0 +BITMAP +60 +F0 +F0 +60 +ENDCHAR +STARTCHAR slash +ENCODING 47 +SWIDTH 278 0 +DWIDTH 7 0 +BBX 6 14 0 0 +BITMAP +0C +0C +0C +18 +18 +18 +30 +30 +30 +60 +60 +60 +C0 +C0 +ENDCHAR +STARTCHAR zero +ENCODING 48 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +1C00 +7700 +6300 +E380 +E380 +E380 +E380 +E380 +E380 +E380 +E380 +6300 +7700 +1C00 +ENDCHAR +STARTCHAR one +ENCODING 49 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 7 14 2 0 +BITMAP +18 +38 +F8 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +FE +ENDCHAR +STARTCHAR two +ENCODING 50 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +1E00 +6700 +E380 +E380 +6380 +0380 +0700 +0700 +0E00 +1800 +3000 +6080 +FF80 +FF80 +ENDCHAR +STARTCHAR three +ENCODING 51 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +1E00 +6700 +E380 +E380 +6380 +0300 +1C00 +0300 +0380 +6380 +E380 +E380 +6700 +3E00 +ENDCHAR +STARTCHAR four +ENCODING 52 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +0700 +0F00 +0F00 +1700 +1700 +2700 +2700 +4700 +4700 +8700 +FF80 +0700 +0700 +0F80 +ENDCHAR +STARTCHAR five +ENCODING 53 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +7F80 +7F00 +4000 +4000 +4000 +7E00 +4700 +0380 +0380 +6380 +E380 +E380 +6700 +3E00 +ENDCHAR +STARTCHAR six +ENCODING 54 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +1F00 +7380 +6380 +E300 +E000 +EE00 +F700 +E380 +E380 +E380 +E380 +6380 +7300 +1C00 +ENDCHAR +STARTCHAR seven +ENCODING 55 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +FF80 +FF80 +FF80 +8300 +0600 +0600 +0C00 +0C00 +1C00 +1C00 +3800 +3800 +3800 +3800 +ENDCHAR +STARTCHAR eight +ENCODING 56 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +1C00 +6300 +C180 +C180 +E180 +FB00 +7E00 +3F00 +4F80 +C380 +C180 +C180 +E300 +3C00 +ENDCHAR +STARTCHAR nine +ENCODING 57 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +1C00 +6700 +E300 +E380 +E380 +E380 +E380 +7780 +3B80 +0380 +6380 +E300 +E700 +7C00 +ENDCHAR +STARTCHAR colon +ENCODING 58 +SWIDTH 278 0 +DWIDTH 6 0 +BBX 4 9 1 0 +BITMAP +60 +F0 +F0 +60 +00 +60 +F0 +F0 +60 +ENDCHAR +STARTCHAR semicolon +ENCODING 59 +SWIDTH 278 0 +DWIDTH 6 0 +BBX 4 12 1 -3 +BITMAP +60 +F0 +F0 +60 +00 +60 +F0 +F0 +70 +20 +40 +80 +ENDCHAR +STARTCHAR less +ENCODING 60 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 10 0 0 +BITMAP +00C0 +03C0 +0F00 +3C00 +F000 +F000 +3C00 +0F00 +03C0 +00C0 +ENDCHAR +STARTCHAR equal +ENCODING 61 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 9 6 1 2 +BITMAP +FF80 +FF80 +0000 +0000 +FF80 +FF80 +ENDCHAR +STARTCHAR greater +ENCODING 62 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 10 0 0 +BITMAP +C000 +F000 +3C00 +0F00 +03C0 +03C0 +0F00 +3C00 +F000 +C000 +ENDCHAR +STARTCHAR question +ENCODING 63 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 14 0 0 +BITMAP +1F00 +6780 +E380 +E380 +6380 +0300 +0600 +0C00 +1800 +0000 +1800 +3C00 +3C00 +1800 +ENDCHAR +STARTCHAR at +ENCODING 64 +SWIDTH 747 0 +DWIDTH 16 0 +BBX 15 14 0 0 +BITMAP +07F0 +1C1C +300C +63E6 +6666 +CC66 +CC66 +D8CC +D8CC +D9D8 +CEF0 +6008 +7870 +1FC0 +ENDCHAR +STARTCHAR A +ENCODING 65 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 14 0 0 +BITMAP +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR B +ENCODING 66 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 14 1 0 +BITMAP +FFC0 +71E0 +70E0 +70E0 +70E0 +71C0 +7F80 +70E0 +70F0 +7070 +7070 +7070 +70E0 +FF80 +ENDCHAR +STARTCHAR C +ENCODING 67 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 14 1 0 +BITMAP +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E000 +F010 +7010 +7820 +3C60 +0F80 +ENDCHAR +STARTCHAR D +ENCODING 68 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 14 1 0 +BITMAP +FFC0 +70F0 +7078 +7038 +703C +701C +701C +701C +701C +703C +7038 +7078 +70F0 +FFC0 +ENDCHAR +STARTCHAR E +ENCODING 69 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR F +ENCODING 70 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +FFE0 +70E0 +7060 +7120 +7120 +7320 +7F00 +7300 +7100 +7100 +7000 +7000 +7000 +F800 +ENDCHAR +STARTCHAR G +ENCODING 71 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 13 14 1 0 +BITMAP +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E0F8 +F070 +7070 +7870 +3CF0 +0F90 +ENDCHAR +STARTCHAR H +ENCODING 72 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 14 14 1 0 +BITMAP +FCFC +7038 +7038 +7038 +7038 +7038 +7FF8 +7038 +7038 +7038 +7038 +7038 +7038 +FCFC +ENDCHAR +STARTCHAR I +ENCODING 73 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 5 14 2 0 +BITMAP +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR J +ENCODING 74 +SWIDTH 648 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +07E0 +01C0 +01C0 +01C0 +01C0 +01C0 +01C0 +01C0 +61C0 +F1C0 +F1C0 +C3C0 +4780 +3E00 +ENDCHAR +STARTCHAR K +ENCODING 75 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 15 14 1 0 +BITMAP +FC7C +7030 +7060 +70C0 +7180 +7300 +7780 +7FC0 +7BC0 +71E0 +70F0 +70F8 +707C +FCFE +ENDCHAR +STARTCHAR L +ENCODING 76 +SWIDTH 722 0 +DWIDTH 12 0 +BBX 11 14 1 0 +BITMAP +FC00 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7020 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR M +ENCODING 77 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 17 14 1 0 +BITMAP +7C0780 +3C0F00 +3E0F00 +2E1F00 +2F1700 +2F1700 +273700 +27A700 +23E700 +23C700 +23C700 +21C700 +718700 +F88F80 +ENDCHAR +STARTCHAR N +ENCODING 78 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 14 1 0 +BITMAP +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +ENDCHAR +STARTCHAR O +ENCODING 79 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 14 0 0 +BITMAP +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR P +ENCODING 80 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 12 14 1 0 +BITMAP +FFE0 +70F0 +7070 +7070 +7070 +70F0 +71E0 +7F80 +7000 +7000 +7000 +7000 +7000 +FC00 +ENDCHAR +STARTCHAR Q +ENCODING 81 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 18 0 -4 +BITMAP +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F79E +79DC +70FC +3CF8 +0FE0 +0060 +0074 +007C +0038 +ENDCHAR +STARTCHAR R +ENCODING 82 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 14 1 0 +BITMAP +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +ENDCHAR +STARTCHAR S +ENCODING 83 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +3F40 +61C0 +C0C0 +C040 +E000 +FE00 +7FC0 +7FE0 +0FE0 +80E0 +8060 +C060 +E0C0 +BF80 +ENDCHAR +STARTCHAR T +ENCODING 84 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +1F00 +ENDCHAR +STARTCHAR U +ENCODING 85 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 14 1 0 +BITMAP +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR V +ENCODING 86 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 14 0 0 +BITMAP +F87C +7038 +7830 +3820 +3820 +3C60 +1C40 +1E40 +0EC0 +0E80 +0780 +0780 +0300 +0300 +ENDCHAR +STARTCHAR W +ENCODING 87 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 19 14 0 0 +BITMAP +FBF3E0 +71E1C0 +70E180 +78E100 +38F100 +39F300 +3D7200 +1D3A00 +1F3E00 +1E3C00 +0E1C00 +0E1C00 +0C1800 +040800 +ENDCHAR +STARTCHAR X +ENCODING 88 +SWIDTH 722 0 +DWIDTH 17 0 +BBX 16 14 0 0 +BITMAP +7E3F +3C1C +1E18 +0E30 +0F60 +07C0 +03C0 +03E0 +06F0 +0C70 +1878 +303C +703E +F87F +ENDCHAR +STARTCHAR Y +ENCODING 89 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 14 1 0 +BITMAP +F878 +7030 +7820 +3860 +3C40 +1CC0 +1F80 +0F80 +0F00 +0700 +0700 +0700 +0700 +0F80 +ENDCHAR +STARTCHAR Z +ENCODING 90 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +FFE0 +E1E0 +C1C0 +83C0 +8780 +0700 +0F00 +1E00 +1C00 +3C20 +7820 +7060 +F0E0 +FFE0 +ENDCHAR +STARTCHAR bracketleft +ENCODING 91 +SWIDTH 389 0 +DWIDTH 5 0 +BBX 4 16 1 -2 +BITMAP +F0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +F0 +ENDCHAR +STARTCHAR backslash +ENCODING 92 +SWIDTH 606 0 +DWIDTH 9 0 +BBX 8 14 0 0 +BITMAP +C0 +C0 +60 +60 +30 +30 +18 +18 +0C +0C +06 +06 +03 +03 +ENDCHAR +STARTCHAR bracketright +ENCODING 93 +SWIDTH 389 0 +DWIDTH 5 0 +BBX 4 16 0 -2 +BITMAP +F0 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +30 +F0 +ENDCHAR +STARTCHAR asciicircum +ENCODING 94 +SWIDTH 606 0 +DWIDTH 9 0 +BBX 8 8 0 6 +BITMAP +18 +18 +3C +3C +66 +66 +C3 +C3 +ENDCHAR +STARTCHAR underscore +ENCODING 95 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 10 2 0 -3 +BITMAP +FFC0 +FFC0 +ENDCHAR +STARTCHAR grave +ENCODING 96 +SWIDTH 333 0 +DWIDTH 7 0 +BBX 5 4 1 10 +BITMAP +C0 +E0 +70 +18 +ENDCHAR +STARTCHAR a +ENCODING 97 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 9 0 0 +BITMAP +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR b +ENCODING 98 +SWIDTH 648 0 +DWIDTH 12 0 +BBX 12 14 -1 0 +BITMAP +F000 +7000 +7000 +7000 +7000 +7780 +78E0 +7070 +7070 +7070 +7070 +7070 +78E0 +6F80 +ENDCHAR +STARTCHAR c +ENCODING 99 +SWIDTH 556 0 +DWIDTH 10 0 +BBX 9 9 0 0 +BITMAP +1F00 +7380 +E180 +E000 +E000 +E000 +E080 +7180 +1E00 +ENDCHAR +STARTCHAR d +ENCODING 100 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +01E0 +00E0 +00E0 +00E0 +00E0 +1EE0 +71E0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71E0 +1EF0 +ENDCHAR +STARTCHAR e +ENCODING 101 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 9 0 0 +BITMAP +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR f +ENCODING 102 +SWIDTH 389 0 +DWIDTH 7 0 +BBX 8 14 0 0 +BITMAP +1E +37 +77 +70 +70 +FC +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR g +ENCODING 103 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 11 15 0 -4 +BITMAP +0060 +00E0 +3F00 +7380 +6180 +6180 +7380 +3F00 +6000 +7F80 +3FC0 +C1C0 +C0C0 +E180 +7F00 +ENDCHAR +STARTCHAR h +ENCODING 104 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +F000 +7000 +7000 +7000 +7000 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR i +ENCODING 105 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 5 14 0 0 +BITMAP +70 +70 +70 +00 +00 +F0 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR j +ENCODING 106 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 7 18 -3 -4 +BITMAP +0E +0E +0E +00 +00 +1E +0E +0E +0E +0E +0E +0E +0E +0E +0E +EE +EC +78 +ENDCHAR +STARTCHAR k +ENCODING 107 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +F000 +7000 +7000 +7000 +7000 +73E0 +7180 +7200 +7600 +7F00 +7780 +73C0 +71E0 +FBF0 +ENDCHAR +STARTCHAR l +ENCODING 108 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 5 14 0 0 +BITMAP +F0 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR m +ENCODING 109 +SWIDTH 963 0 +DWIDTH 20 0 +BBX 19 9 0 0 +BITMAP +F7DF80 +79F3C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +F9F3E0 +ENDCHAR +STARTCHAR n +ENCODING 110 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 9 0 0 +BITMAP +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR o +ENCODING 111 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 9 0 0 +BITMAP +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR p +ENCODING 112 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 12 13 -1 -4 +BITMAP +E780 +78E0 +7070 +7070 +7070 +7070 +7070 +78E0 +7780 +7000 +7000 +7000 +F800 +ENDCHAR +STARTCHAR q +ENCODING 113 +SWIDTH 648 0 +DWIDTH 12 0 +BBX 12 13 0 -4 +BITMAP +1E60 +71E0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71E0 +1EE0 +00E0 +00E0 +00E0 +01F0 +ENDCHAR +STARTCHAR r +ENCODING 114 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 9 0 0 +BITMAP +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR s +ENCODING 115 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 9 0 0 +BITMAP +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +ENDCHAR +STARTCHAR t +ENCODING 116 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 13 0 0 +BITMAP +10 +30 +30 +70 +FC +70 +70 +70 +70 +70 +72 +72 +3C +ENDCHAR +STARTCHAR u +ENCODING 117 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 9 0 0 +BITMAP +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR v +ENCODING 118 +SWIDTH 611 0 +DWIDTH 9 0 +BBX 10 9 -1 0 +BITMAP +F9C0 +7080 +7080 +3900 +3900 +1E00 +1E00 +0C00 +0C00 +ENDCHAR +STARTCHAR w +ENCODING 119 +SWIDTH 889 0 +DWIDTH 15 0 +BBX 16 9 -1 0 +BITMAP +FBE7 +71C2 +71C2 +39E4 +39E4 +1E78 +1E78 +0C30 +0C30 +ENDCHAR +STARTCHAR x +ENCODING 120 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 9 0 0 +BITMAP +FCE0 +78C0 +3D00 +1E00 +0E00 +0F00 +1780 +63C0 +E7E0 +ENDCHAR +STARTCHAR y +ENCODING 121 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 13 0 -4 +BITMAP +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +ENDCHAR +STARTCHAR z +ENCODING 122 +SWIDTH 537 0 +DWIDTH 10 0 +BBX 8 9 0 0 +BITMAP +FF +CF +8E +1C +38 +39 +71 +F3 +FF +ENDCHAR +STARTCHAR braceleft +ENCODING 123 +SWIDTH 389 0 +DWIDTH 6 0 +BBX 5 16 0 -2 +BITMAP +18 +20 +60 +60 +60 +60 +60 +C0 +60 +60 +60 +60 +60 +60 +20 +18 +ENDCHAR +STARTCHAR bar +ENCODING 124 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 2 14 4 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR braceright +ENCODING 125 +SWIDTH 389 0 +DWIDTH 6 0 +BBX 5 16 0 -2 +BITMAP +C0 +20 +30 +30 +30 +30 +30 +18 +30 +30 +30 +30 +30 +30 +20 +C0 +ENDCHAR +STARTCHAR asciitilde +ENCODING 126 +SWIDTH 606 0 +DWIDTH 12 0 +BBX 10 3 1 4 +BITMAP +39C0 +7F80 +E700 +ENDCHAR +STARTCHAR space +ENCODING 160 +SWIDTH 287 0 +DWIDTH 5 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR exclamdown +ENCODING 161 +SWIDTH 296 0 +DWIDTH 7 0 +BBX 4 14 1 -4 +BITMAP +60 +F0 +F0 +60 +00 +60 +60 +60 +F0 +F0 +F0 +F0 +F0 +60 +ENDCHAR +STARTCHAR cent +ENCODING 162 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 13 1 -2 +BITMAP +0080 +0080 +1F00 +7380 +E380 +E400 +E400 +E800 +E880 +7180 +1E00 +2000 +2000 +ENDCHAR +STARTCHAR sterling +ENCODING 163 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +1F00 +3180 +7380 +7380 +7000 +7000 +3800 +FF80 +1C00 +1C00 +1840 +70C0 +9FC0 +EF80 +ENDCHAR +STARTCHAR currency +ENCODING 164 +SWIDTH 606 0 +DWIDTH 10 0 +BBX 9 9 0 2 +BITMAP +DD80 +FF80 +6300 +C180 +C180 +C180 +6300 +FF80 +DD80 +ENDCHAR +STARTCHAR yen +ENCODING 165 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 14 1 0 +BITMAP +F878 +7030 +7820 +3860 +1C40 +1CC0 +0F80 +1FC0 +0700 +1FC0 +0700 +0700 +0700 +0F80 +ENDCHAR +STARTCHAR brokenbar +ENCODING 166 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 2 14 4 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +00 +00 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR section +ENCODING 167 +SWIDTH 500 0 +DWIDTH 8 0 +BBX 7 16 0 -2 +BITMAP +78 +CC +8C +C0 +70 +7C +9E +86 +C2 +F2 +7C +1C +04 +C4 +CC +78 +ENDCHAR +STARTCHAR dieresis +ENCODING 168 +SWIDTH 333 0 +DWIDTH 10 0 +BBX 6 2 2 10 +BITMAP +CC +CC +ENDCHAR +STARTCHAR copyright +ENCODING 169 +SWIDTH 747 0 +DWIDTH 15 0 +BBX 14 14 0 0 +BITMAP +0780 +1860 +2010 +47C8 +4CC8 +9844 +9804 +9804 +9804 +4C48 +4788 +2010 +1860 +0780 +ENDCHAR +STARTCHAR ordfeminine +ENCODING 170 +SWIDTH 367 0 +DWIDTH 8 0 +BBX 7 8 0 6 +BITMAP +78 +CC +3C +CC +DC +6E +00 +FE +ENDCHAR +STARTCHAR guillemotleft +ENCODING 171 +SWIDTH 500 0 +DWIDTH 9 0 +BBX 8 5 0 3 +BITMAP +11 +66 +CC +66 +11 +ENDCHAR +STARTCHAR logicalnot +ENCODING 172 +SWIDTH 606 0 +DWIDTH 10 0 +BBX 9 6 0 2 +BITMAP +FF80 +FF80 +0180 +0180 +0180 +0180 +ENDCHAR +STARTCHAR hyphen +ENCODING 173 +SWIDTH 333 0 +DWIDTH 6 0 +BBX 5 2 0 4 +BITMAP +F8 +F8 +ENDCHAR +STARTCHAR registered +ENCODING 174 +SWIDTH 747 0 +DWIDTH 15 0 +BBX 14 14 0 0 +BITMAP +0780 +1860 +2010 +5F88 +4CC8 +8CC4 +8F84 +8D84 +8CC4 +5EE8 +4008 +2010 +1860 +0780 +ENDCHAR +STARTCHAR macron +ENCODING 175 +SWIDTH 333 0 +DWIDTH 8 0 +BBX 6 2 1 10 +BITMAP +FC +FC +ENDCHAR +STARTCHAR degree +ENCODING 176 +SWIDTH 400 0 +DWIDTH 7 0 +BBX 6 6 0 8 +BITMAP +78 +CC +84 +84 +CC +78 +ENDCHAR +STARTCHAR plusminus +ENCODING 177 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 11 0 0 +BITMAP +0C00 +0C00 +0C00 +FFC0 +FFC0 +0C00 +0C00 +0C00 +0000 +FFC0 +FFC0 +ENDCHAR +STARTCHAR twosuperior +ENCODING 178 +SWIDTH 344 0 +DWIDTH 6 0 +BBX 6 8 0 6 +BITMAP +78 +CC +CC +18 +30 +60 +C4 +FC +ENDCHAR +STARTCHAR threesuperior +ENCODING 179 +SWIDTH 344 0 +DWIDTH 6 0 +BBX 6 8 0 6 +BITMAP +78 +CC +0C +38 +0C +CC +CC +78 +ENDCHAR +STARTCHAR acute +ENCODING 180 +SWIDTH 333 0 +DWIDTH 7 0 +BBX 5 4 1 10 +BITMAP +18 +38 +70 +C0 +ENDCHAR +STARTCHAR mu +ENCODING 181 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 13 0 -4 +BITMAP +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +7EF0 +6000 +7000 +7000 +2000 +ENDCHAR +STARTCHAR paragraph +ENCODING 182 +SWIDTH 747 0 +DWIDTH 14 0 +BBX 13 14 0 0 +BITMAP +3FF8 +7E70 +FE70 +FE70 +FE70 +FE70 +7E70 +3E70 +0E70 +0E70 +0E70 +0E70 +0E70 +1FF8 +ENDCHAR +STARTCHAR periodcentered +ENCODING 183 +SWIDTH 278 0 +DWIDTH 5 0 +BBX 4 4 0 3 +BITMAP +60 +F0 +F0 +60 +ENDCHAR +STARTCHAR cedilla +ENCODING 184 +SWIDTH 333 0 +DWIDTH 6 0 +BBX 4 4 1 -4 +BITMAP +40 +70 +30 +E0 +ENDCHAR +STARTCHAR onesuperior +ENCODING 185 +SWIDTH 344 0 +DWIDTH 6 0 +BBX 6 8 0 6 +BITMAP +30 +F0 +30 +30 +30 +30 +30 +FC +ENDCHAR +STARTCHAR ordmasculine +ENCODING 186 +SWIDTH 367 0 +DWIDTH 7 0 +BBX 6 8 0 6 +BITMAP +78 +CC +CC +CC +CC +78 +00 +FC +ENDCHAR +STARTCHAR guillemotright +ENCODING 187 +SWIDTH 500 0 +DWIDTH 9 0 +BBX 8 5 0 3 +BITMAP +88 +66 +33 +66 +88 +ENDCHAR +STARTCHAR onequarter +ENCODING 188 +SWIDTH 861 0 +DWIDTH 15 0 +BBX 14 14 0 0 +BITMAP +3060 +F060 +30C0 +30C0 +3180 +3180 +3318 +FF38 +0678 +06D8 +0D98 +0DFC +1818 +183C +ENDCHAR +STARTCHAR onehalf +ENCODING 189 +SWIDTH 861 0 +DWIDTH 15 0 +BBX 14 14 0 0 +BITMAP +3060 +F060 +30C0 +30C0 +3180 +3180 +3378 +FFCC +06CC +0618 +0C30 +0C60 +18C4 +18FC +ENDCHAR +STARTCHAR threequarters +ENCODING 190 +SWIDTH 861 0 +DWIDTH 15 0 +BBX 14 14 0 0 +BITMAP +7860 +CC60 +0CC0 +38C0 +0D80 +CD80 +CF18 +7B38 +0678 +06D8 +0D98 +0DFC +1818 +183C +ENDCHAR +STARTCHAR questiondown +ENCODING 191 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 14 0 -4 +BITMAP +0C00 +1E00 +1E00 +0C00 +0000 +0C00 +1800 +3000 +6000 +E300 +E380 +E380 +F300 +7C00 +ENDCHAR +STARTCHAR Agrave +ENCODING 192 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 19 0 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR Aacute +ENCODING 193 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 19 0 0 +BITMAP +0060 +00E0 +01C0 +0300 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR Acircumflex +ENCODING 194 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 18 0 0 +BITMAP +0380 +07C0 +0C60 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR Atilde +ENCODING 195 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 18 0 0 +BITMAP +0620 +0FC0 +1180 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR Adieresis +ENCODING 196 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 17 0 0 +BITMAP +0CC0 +0CC0 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR Aring +ENCODING 197 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 18 0 0 +BITMAP +0300 +0480 +0480 +0300 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR AE +ENCODING 198 +SWIDTH 981 0 +DWIDTH 21 0 +BBX 20 14 0 0 +BITMAP +03FFF0 +00B870 +01B830 +013890 +033890 +063980 +043F80 +0C3980 +1FF880 +103890 +203810 +203830 +603870 +F1FFF0 +ENDCHAR +STARTCHAR Ccedilla +ENCODING 199 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 18 1 -4 +BITMAP +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E000 +F010 +7010 +7820 +3C60 +0F80 +0400 +0700 +0300 +0E00 +ENDCHAR +STARTCHAR Egrave +ENCODING 200 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 19 1 0 +BITMAP +3000 +3800 +1C00 +0600 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR Eacute +ENCODING 201 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 19 1 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR Ecircumflex +ENCODING 202 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 18 1 0 +BITMAP +0E00 +1F00 +3180 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR Edieresis +ENCODING 203 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 17 1 0 +BITMAP +1980 +1980 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR Igrave +ENCODING 204 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 5 19 2 0 +BITMAP +C0 +E0 +70 +18 +00 +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR Iacute +ENCODING 205 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 6 19 2 0 +BITMAP +0C +1C +38 +60 +00 +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR Icircumflex +ENCODING 206 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 7 18 1 0 +BITMAP +38 +7C +C6 +00 +7C +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR Idieresis +ENCODING 207 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 6 17 2 0 +BITMAP +CC +CC +00 +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR Eth +ENCODING 208 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 14 0 0 +BITMAP +7FE0 +3878 +383C +381C +381E +380E +FE0E +380E +380E +381E +381C +383C +3878 +7FE0 +ENDCHAR +STARTCHAR Ntilde +ENCODING 209 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 18 1 0 +BITMAP +0310 +07E0 +08C0 +0000 +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +ENDCHAR +STARTCHAR Ograve +ENCODING 210 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 19 0 0 +BITMAP +0C00 +0E00 +0700 +0180 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR Oacute +ENCODING 211 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 19 0 0 +BITMAP +0060 +00E0 +01C0 +0300 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR Ocircumflex +ENCODING 212 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 18 0 0 +BITMAP +0380 +07C0 +0C60 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR Otilde +ENCODING 213 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 18 0 0 +BITMAP +0310 +07E0 +08C0 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR Odieresis +ENCODING 214 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 17 0 0 +BITMAP +0660 +0660 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR multiply +ENCODING 215 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 10 0 0 +BITMAP +C0C0 +E1C0 +7380 +3F00 +1E00 +1E00 +3F00 +7380 +E1C0 +C0C0 +ENDCHAR +STARTCHAR Oslash +ENCODING 216 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 14 1 0 +BITMAP +0FC8 +38F0 +7078 +7078 +E0BC +E11C +E21C +E21C +E41C +E83C +7038 +7078 +78F0 +8FC0 +ENDCHAR +STARTCHAR Ugrave +ENCODING 217 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +0C00 +0E00 +0700 +0180 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR Uacute +ENCODING 218 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR Ucircumflex +ENCODING 219 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 18 1 0 +BITMAP +0380 +07C0 +0C60 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR Udieresis +ENCODING 220 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 17 1 0 +BITMAP +0CC0 +0CC0 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR Yacute +ENCODING 221 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 19 1 0 +BITMAP +0060 +00E0 +01C0 +0300 +0000 +F878 +7030 +7820 +3860 +3C40 +1CC0 +1F80 +0F80 +0F00 +0700 +0700 +0700 +0700 +0F80 +ENDCHAR +STARTCHAR Thorn +ENCODING 222 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 12 14 1 0 +BITMAP +F800 +7000 +7000 +7FC0 +70F0 +7070 +7070 +7070 +7070 +70E0 +7F80 +7000 +7000 +F800 +ENDCHAR +STARTCHAR germandbls +ENCODING 223 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +1E00 +3380 +71C0 +71C0 +71C0 +7180 +7700 +71C0 +70E0 +70E0 +70E0 +70E0 +71C0 +F700 +ENDCHAR +STARTCHAR agrave +ENCODING 224 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +3000 +3800 +1C00 +0600 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR aacute +ENCODING 225 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +0600 +0E00 +1C00 +3000 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR acircumflex +ENCODING 226 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 13 0 0 +BITMAP +1C00 +3E00 +6300 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR atilde +ENCODING 227 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 13 0 0 +BITMAP +1880 +3F00 +4600 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR adieresis +ENCODING 228 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 12 0 0 +BITMAP +3300 +3300 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR aring +ENCODING 229 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +0C00 +1200 +1200 +0C00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR ae +ENCODING 230 +SWIDTH 870 0 +DWIDTH 17 0 +BBX 16 9 0 0 +BITMAP +3F78 +63CE +E387 +0787 +3BFF +E380 +E381 +E7C3 +78FC +ENDCHAR +STARTCHAR ccedilla +ENCODING 231 +SWIDTH 556 0 +DWIDTH 10 0 +BBX 9 13 0 -4 +BITMAP +1F00 +7380 +E180 +E000 +E000 +E000 +E080 +7180 +1E00 +1000 +1C00 +0C00 +3800 +ENDCHAR +STARTCHAR egrave +ENCODING 232 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +3000 +3800 +1C00 +0600 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR eacute +ENCODING 233 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +0600 +0E00 +1C00 +3000 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR ecircumflex +ENCODING 234 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 13 0 0 +BITMAP +0E00 +1F00 +3180 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR edieresis +ENCODING 235 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 12 0 0 +BITMAP +3300 +3300 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR igrave +ENCODING 236 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 5 14 0 0 +BITMAP +C0 +E0 +70 +18 +00 +F0 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR iacute +ENCODING 237 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 5 14 0 0 +BITMAP +18 +38 +70 +C0 +00 +F0 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR icircumflex +ENCODING 238 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 7 13 -1 0 +BITMAP +38 +7C +C6 +00 +78 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR idieresis +ENCODING 239 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 6 12 0 0 +BITMAP +CC +CC +00 +F0 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR eth +ENCODING 240 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +6000 +1B00 +1C00 +6600 +0300 +1F80 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR ntilde +ENCODING 241 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 13 0 0 +BITMAP +0C40 +1F80 +2300 +0000 +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR ograve +ENCODING 242 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR oacute +ENCODING 243 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR ocircumflex +ENCODING 244 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 13 0 0 +BITMAP +0E00 +1F00 +3180 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR otilde +ENCODING 245 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 13 0 0 +BITMAP +1880 +3F00 +4600 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR odieresis +ENCODING 246 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 12 0 0 +BITMAP +1980 +1980 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR divide +ENCODING 247 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 10 0 0 +BITMAP +0C00 +0C00 +0000 +0000 +FFC0 +FFC0 +0000 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR oslash +ENCODING 248 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 11 0 -1 +BITMAP +0100 +1F00 +7380 +E3C0 +E5C0 +E5C0 +E9C0 +E9C0 +7380 +3E00 +2000 +ENDCHAR +STARTCHAR ugrave +ENCODING 249 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uacute +ENCODING 250 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR ucircumflex +ENCODING 251 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 13 0 0 +BITMAP +0700 +0F80 +18C0 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR udieresis +ENCODING 252 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 12 0 0 +BITMAP +1980 +1980 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR yacute +ENCODING 253 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 18 0 -4 +BITMAP +0180 +0380 +0700 +0C00 +0000 +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +ENDCHAR +STARTCHAR thorn +ENCODING 254 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 12 18 -1 -4 +BITMAP +F000 +7000 +7000 +7000 +7000 +7780 +78E0 +7070 +7070 +7070 +7070 +7070 +78E0 +7780 +7000 +7000 +7000 +F800 +ENDCHAR +STARTCHAR ydieresis +ENCODING 255 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 16 0 -4 +BITMAP +1980 +1980 +0000 +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +ENDCHAR +STARTCHAR Amacron +ENCODING 256 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 17 0 0 +BITMAP +0FC0 +0FC0 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR amacron +ENCODING 257 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 12 0 0 +BITMAP +3F00 +3F00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR Abreve +ENCODING 258 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 18 0 0 +BITMAP +0840 +0CC0 +0780 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR abreve +ENCODING 259 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 13 0 0 +BITMAP +2100 +3300 +1E00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR Aogonek +ENCODING 260 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 18 0 -4 +BITMAP +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +0180 +0300 +0340 +0180 +ENDCHAR +STARTCHAR aogonek +ENCODING 261 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 13 0 -4 +BITMAP +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +0C00 +1800 +1A00 +0C00 +ENDCHAR +STARTCHAR Cacute +ENCODING 262 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 19 1 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E000 +F010 +7010 +7820 +3C60 +0F80 +ENDCHAR +STARTCHAR cacute +ENCODING 263 +SWIDTH 556 0 +DWIDTH 10 0 +BBX 9 14 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +1F00 +7380 +E180 +E000 +E000 +E000 +E080 +7180 +1E00 +ENDCHAR +STARTCHAR Ccircumflex +ENCODING 264 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 19 1 0 +BITMAP +0200 +0700 +0F80 +18C0 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E000 +F010 +7010 +7820 +3C60 +0F80 +ENDCHAR +STARTCHAR ccircumflex +ENCODING 265 +SWIDTH 556 0 +DWIDTH 10 0 +BBX 9 14 0 0 +BITMAP +0800 +1C00 +3E00 +6300 +0000 +1F00 +7380 +E180 +E000 +E000 +E000 +E080 +7180 +1E00 +ENDCHAR +STARTCHAR Cdotaccent +ENCODING 266 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 17 1 0 +BITMAP +0600 +0600 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E000 +F010 +7010 +7820 +3C60 +0F80 +ENDCHAR +STARTCHAR cdotaccent +ENCODING 267 +SWIDTH 556 0 +DWIDTH 10 0 +BBX 9 12 0 0 +BITMAP +0C00 +0C00 +0000 +1F00 +7380 +E180 +E000 +E000 +E000 +E080 +7180 +1E00 +ENDCHAR +STARTCHAR Ccaron +ENCODING 268 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 19 1 0 +BITMAP +18C0 +0F80 +0700 +0200 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E000 +F010 +7010 +7820 +3C60 +0F80 +ENDCHAR +STARTCHAR ccaron +ENCODING 269 +SWIDTH 556 0 +DWIDTH 10 0 +BBX 9 14 0 0 +BITMAP +6300 +3E00 +1C00 +0800 +0000 +1F00 +7380 +E180 +E000 +E000 +E000 +E080 +7180 +1E00 +ENDCHAR +STARTCHAR Dcaron +ENCODING 270 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +18C0 +0F80 +0700 +0200 +0000 +FFC0 +70F0 +7078 +7038 +703C +701C +701C +701C +701C +703C +7038 +7078 +70F0 +FFC0 +ENDCHAR +STARTCHAR dcaron +ENCODING 271 +SWIDTH 875 0 +DWIDTH 17 0 +BBX 16 14 0 0 +BITMAP +01E6 +00EF +00EF +00E7 +00E2 +1EE4 +71E8 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71E0 +1EF0 +ENDCHAR +STARTCHAR Dcroat +ENCODING 272 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 14 0 0 +BITMAP +7FE0 +3878 +383C +381C +381E +380E +FE0E +380E +380E +381E +381C +383C +3878 +7FE0 +ENDCHAR +STARTCHAR dcroat +ENCODING 273 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +01E0 +00E0 +00E0 +01F0 +01F0 +1EE0 +71E0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71E0 +1EF0 +ENDCHAR +STARTCHAR Emacron +ENCODING 274 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 17 1 0 +BITMAP +1F80 +1F80 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR emacron +ENCODING 275 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 12 0 0 +BITMAP +3F00 +3F00 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR Ebreve +ENCODING 276 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 18 1 0 +BITMAP +1080 +1980 +0F00 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR ebreve +ENCODING 277 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 13 0 0 +BITMAP +2100 +3300 +1E00 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR Edotaccent +ENCODING 278 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 17 1 0 +BITMAP +0600 +0600 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR edotaccent +ENCODING 279 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 12 0 0 +BITMAP +0C00 +0C00 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR Eogonek +ENCODING 280 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 18 1 -4 +BITMAP +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +0600 +0C00 +0D00 +0600 +ENDCHAR +STARTCHAR eogonek +ENCODING 281 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 13 0 -4 +BITMAP +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +0C00 +1800 +1A00 +0C00 +ENDCHAR +STARTCHAR Ecaron +ENCODING 282 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 19 1 0 +BITMAP +3180 +1F00 +0E00 +0400 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR ecaron +ENCODING 283 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +3180 +1F00 +0E00 +0400 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR Gcircumflex +ENCODING 284 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 13 19 1 0 +BITMAP +0200 +0700 +0F80 +18C0 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E0F8 +F070 +7070 +7870 +3CF0 +0F90 +ENDCHAR +STARTCHAR gcircumflex +ENCODING 285 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 11 20 0 -4 +BITMAP +0200 +0700 +0F80 +18C0 +0000 +0060 +00E0 +3F00 +7380 +6180 +6180 +7380 +3F00 +6000 +7F80 +3FC0 +C1C0 +C0C0 +E180 +7F00 +ENDCHAR +STARTCHAR Gbreve +ENCODING 286 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 13 18 1 0 +BITMAP +1080 +1980 +0F00 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E0F8 +F070 +7070 +7870 +3CF0 +0F90 +ENDCHAR +STARTCHAR gbreve +ENCODING 287 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 11 19 0 -4 +BITMAP +1080 +1980 +0F00 +0000 +0060 +00E0 +3F00 +7380 +6180 +6180 +7380 +3F00 +6000 +7F80 +3FC0 +C1C0 +C0C0 +E180 +7F00 +ENDCHAR +STARTCHAR Gdotaccent +ENCODING 288 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 13 17 1 0 +BITMAP +0600 +0600 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E0F8 +F070 +7070 +7870 +3CF0 +0F90 +ENDCHAR +STARTCHAR gdotaccent +ENCODING 289 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 11 18 0 -4 +BITMAP +0600 +0600 +0000 +0060 +00E0 +3F00 +7380 +6180 +6180 +7380 +3F00 +6000 +7F80 +3FC0 +C1C0 +C0C0 +E180 +7F00 +ENDCHAR +STARTCHAR Gcommaaccent +ENCODING 290 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 13 22 1 -8 +BITMAP +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E0F8 +F070 +7070 +7870 +3CF0 +0F90 +0000 +0300 +0780 +0780 +0380 +0100 +0200 +0400 +ENDCHAR +STARTCHAR gcommaaccent +ENCODING 291 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 11 23 0 -4 +BITMAP +0100 +0200 +0400 +0E00 +0F00 +0F00 +0600 +0000 +0060 +00E0 +3F00 +7380 +6180 +6180 +7380 +3F00 +6000 +7F80 +3FC0 +C1C0 +C0C0 +E180 +7F00 +ENDCHAR +STARTCHAR Hcircumflex +ENCODING 292 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +0100 +0380 +07C0 +0C60 +0000 +FCFC +7038 +7038 +7038 +7038 +7038 +7FF8 +7038 +7038 +7038 +7038 +7038 +7038 +FCFC +ENDCHAR +STARTCHAR hcircumflex +ENCODING 293 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 19 0 0 +BITMAP +1000 +3800 +7C00 +C600 +0000 +F000 +7000 +7000 +7000 +7000 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR Hbar +ENCODING 294 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 14 14 1 0 +BITMAP +FCFC +7038 +7038 +7038 +FFFC +FFFC +7FF8 +7038 +7038 +7038 +7038 +7038 +7038 +FCFC +ENDCHAR +STARTCHAR hbar +ENCODING 295 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +F000 +7000 +7000 +7C00 +7C00 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR Itilde +ENCODING 296 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 8 18 1 0 +BITMAP +31 +7E +8C +00 +7C +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR itilde +ENCODING 297 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 8 13 -1 0 +BITMAP +31 +7E +8C +00 +78 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR Imacron +ENCODING 298 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 6 17 2 0 +BITMAP +FC +FC +00 +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR imacron +ENCODING 299 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 6 12 -1 0 +BITMAP +FC +FC +00 +78 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR Ibreve +ENCODING 300 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 6 18 2 0 +BITMAP +84 +CC +78 +00 +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR ibreve +ENCODING 301 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 6 13 -1 0 +BITMAP +84 +CC +78 +00 +78 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR Iogonek +ENCODING 302 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 5 18 2 -4 +BITMAP +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +30 +60 +68 +30 +ENDCHAR +STARTCHAR iogonek +ENCODING 303 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 5 18 0 -4 +BITMAP +70 +70 +70 +00 +00 +F0 +70 +70 +70 +70 +70 +70 +70 +F8 +30 +60 +68 +30 +ENDCHAR +STARTCHAR Idotaccent +ENCODING 304 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 5 17 2 0 +BITMAP +30 +30 +00 +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR dotlessi +ENCODING 305 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 5 9 0 0 +BITMAP +F0 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR IJ +ENCODING 306 +SWIDTH 1070 0 +DWIDTH 21 0 +BBX 18 14 2 0 +BITMAP +F80FC0 +700380 +700380 +700380 +700380 +700380 +700380 +700380 +70C380 +71E380 +71E380 +718780 +708F00 +F87C00 +ENDCHAR +STARTCHAR ij +ENCODING 307 +SWIDTH 704 0 +DWIDTH 12 0 +BBX 10 18 0 -4 +BITMAP +71C0 +71C0 +71C0 +0000 +0000 +F3C0 +71C0 +71C0 +71C0 +71C0 +71C0 +71C0 +71C0 +F9C0 +01C0 +1DC0 +1D80 +0F00 +ENDCHAR +STARTCHAR Jcircumflex +ENCODING 308 +SWIDTH 648 0 +DWIDTH 12 0 +BBX 11 19 0 0 +BITMAP +0100 +0380 +07C0 +0C60 +0000 +07E0 +01C0 +01C0 +01C0 +01C0 +01C0 +01C0 +01C0 +61C0 +F1C0 +F1C0 +C3C0 +4780 +3E00 +ENDCHAR +STARTCHAR jcircumflex +ENCODING 309 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 8 18 -3 -4 +BITMAP +08 +1C +3E +63 +00 +1E +0E +0E +0E +0E +0E +0E +0E +0E +0E +EE +EC +78 +ENDCHAR +STARTCHAR Kcommaaccent +ENCODING 310 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 15 22 1 -8 +BITMAP +FC7C +7030 +7060 +70C0 +7180 +7300 +7780 +7FC0 +7BC0 +71E0 +70F0 +70F8 +707C +FCFE +0000 +0180 +03C0 +03C0 +01C0 +0080 +0100 +0200 +ENDCHAR +STARTCHAR kcommaaccent +ENCODING 311 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 22 0 -8 +BITMAP +F000 +7000 +7000 +7000 +7000 +73E0 +7180 +7200 +7600 +7F00 +7780 +73C0 +71E0 +FBF0 +0000 +0600 +0F00 +0F00 +0700 +0200 +0400 +0800 +ENDCHAR +STARTCHAR kgreenlandic +ENCODING 312 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 9 0 0 +BITMAP +73E0 +7180 +7200 +7600 +7F00 +7780 +73C0 +71E0 +FBF0 +ENDCHAR +STARTCHAR Lacute +ENCODING 313 +SWIDTH 722 0 +DWIDTH 12 0 +BBX 11 19 1 0 +BITMAP +0600 +0E00 +1C00 +3000 +0000 +FC00 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7020 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR lacute +ENCODING 314 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 5 19 0 0 +BITMAP +18 +38 +70 +C0 +00 +F0 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR Lcommaaccent +ENCODING 315 +SWIDTH 722 0 +DWIDTH 12 0 +BBX 11 22 1 -8 +BITMAP +FC00 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7020 +7020 +7060 +70E0 +FFE0 +0000 +0C00 +1E00 +1E00 +0E00 +0400 +0800 +1000 +ENDCHAR +STARTCHAR lcommaaccent +ENCODING 316 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 5 22 0 -8 +BITMAP +F0 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +00 +30 +78 +78 +38 +10 +20 +40 +ENDCHAR +STARTCHAR Lcaron +ENCODING 317 +SWIDTH 927 0 +DWIDTH 16 0 +BBX 14 14 1 0 +BITMAP +FC18 +703C +703C +701C +7008 +7010 +7020 +7000 +7000 +7020 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR lcaron +ENCODING 318 +SWIDTH 575 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +F180 +73C0 +73C0 +71C0 +7080 +7100 +7200 +7000 +7000 +7000 +7000 +7000 +7000 +F800 +ENDCHAR +STARTCHAR Ldot +ENCODING 319 +SWIDTH 964 0 +DWIDTH 16 0 +BBX 14 14 1 0 +BITMAP +FC00 +7000 +7000 +7000 +7000 +7000 +7000 +7018 +703C +703C +7038 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR ldot +ENCODING 320 +SWIDTH 612 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +F000 +7000 +7000 +7000 +7000 +7000 +7000 +7180 +73C0 +73C0 +7180 +7000 +7000 +F800 +ENDCHAR +STARTCHAR Lslash +ENCODING 321 +SWIDTH 722 0 +DWIDTH 12 0 +BBX 12 14 -1 0 +BITMAP +7E00 +3C00 +3C00 +3C00 +3D00 +3E00 +3C00 +3C00 +7C00 +BC10 +3C10 +3C30 +3C70 +7FF0 +ENDCHAR +STARTCHAR lslash +ENCODING 322 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 6 14 0 0 +BITMAP +F0 +70 +70 +70 +74 +78 +70 +F0 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR Nacute +ENCODING 323 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 19 1 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +ENDCHAR +STARTCHAR nacute +ENCODING 324 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR Ncommaaccent +ENCODING 325 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 22 1 -8 +BITMAP +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +0000 +0300 +0780 +0780 +0380 +0100 +0200 +0400 +ENDCHAR +STARTCHAR ncommaaccent +ENCODING 326 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 17 0 -8 +BITMAP +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +0000 +0600 +0F00 +0F00 +0700 +0200 +0400 +0800 +ENDCHAR +STARTCHAR Ncaron +ENCODING 327 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 19 1 0 +BITMAP +18C0 +0F80 +0700 +0200 +0000 +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +ENDCHAR +STARTCHAR ncaron +ENCODING 328 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +3180 +1F00 +0E00 +0400 +0000 +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR napostrophe +ENCODING 329 +SWIDTH 914 0 +DWIDTH 18 0 +BBX 17 14 0 0 +BITMAP +600000 +F00000 +F00000 +700000 +200000 +47BE00 +83CF00 +038700 +038700 +038700 +038700 +038700 +038700 +07CF80 +ENDCHAR +STARTCHAR Eng +ENCODING 330 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 18 1 -4 +BITMAP +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F838 +0038 +03B8 +03B0 +01E0 +ENDCHAR +STARTCHAR eng +ENCODING 331 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 11 13 0 -4 +BITMAP +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F8E0 +00E0 +0EE0 +0EC0 +0780 +ENDCHAR +STARTCHAR Omacron +ENCODING 332 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 17 0 0 +BITMAP +07E0 +07E0 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR omacron +ENCODING 333 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 12 0 0 +BITMAP +1F80 +1F80 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR Obreve +ENCODING 334 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 18 0 0 +BITMAP +0420 +0660 +03C0 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR obreve +ENCODING 335 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 13 0 0 +BITMAP +1080 +1980 +0F00 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR Ohungarumlaut +ENCODING 336 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 19 0 0 +BITMAP +0660 +0660 +0CC0 +0880 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR ohungarumlaut +ENCODING 337 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +1980 +1980 +3300 +2200 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR OE +ENCODING 338 +SWIDTH 1000 0 +DWIDTH 22 0 +BBX 21 14 0 0 +BITMAP +0FFFF8 +3C7C38 +783C18 +783C48 +F03C48 +F03CC0 +F03FC0 +F03CC0 +F03C40 +F03C48 +783C08 +783C18 +3C7C38 +0FFFF8 +ENDCHAR +STARTCHAR oe +ENCODING 339 +SWIDTH 907 0 +DWIDTH 19 0 +BBX 18 9 0 0 +BITMAP +1F1E00 +71F380 +E0E1C0 +E0E1C0 +E0FFC0 +E0E000 +E0E040 +71F0C0 +1F1F00 +ENDCHAR +STARTCHAR Racute +ENCODING 340 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +ENDCHAR +STARTCHAR racute +ENCODING 341 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 14 0 0 +BITMAP +06 +0E +1C +30 +00 +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR Rcommaaccent +ENCODING 342 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 22 1 -8 +BITMAP +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +0000 +0300 +0780 +0780 +0380 +0100 +0200 +0400 +ENDCHAR +STARTCHAR rcommaaccent +ENCODING 343 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 17 0 -8 +BITMAP +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +00 +30 +78 +78 +38 +10 +20 +40 +ENDCHAR +STARTCHAR Rcaron +ENCODING 344 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +18C0 +0F80 +0700 +0200 +0000 +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +ENDCHAR +STARTCHAR rcaron +ENCODING 345 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 14 0 0 +BITMAP +63 +3E +1C +08 +00 +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR Sacute +ENCODING 346 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 19 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +3F40 +61C0 +C0C0 +C040 +E000 +FE00 +7FC0 +7FE0 +0FE0 +80E0 +8060 +C060 +E0C0 +BF80 +ENDCHAR +STARTCHAR sacute +ENCODING 347 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 14 0 0 +BITMAP +0600 +0E00 +1C00 +3000 +0000 +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +ENDCHAR +STARTCHAR Scircumflex +ENCODING 348 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 19 0 0 +BITMAP +0400 +0E00 +1F00 +3180 +0000 +3F40 +61C0 +C0C0 +C040 +E000 +FE00 +7FC0 +7FE0 +0FE0 +80E0 +8060 +C060 +E0C0 +BF80 +ENDCHAR +STARTCHAR scircumflex +ENCODING 349 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 14 0 0 +BITMAP +0800 +1C00 +3E00 +6300 +0000 +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +ENDCHAR +STARTCHAR Scedilla +ENCODING 350 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 18 0 -4 +BITMAP +3F40 +61C0 +C0C0 +C040 +E000 +FE00 +7FC0 +7FE0 +0FE0 +80E0 +8060 +C060 +E0C0 +BF80 +0800 +0E00 +0600 +1C00 +ENDCHAR +STARTCHAR scedilla +ENCODING 351 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 13 0 -4 +BITMAP +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +1000 +1C00 +0C00 +3800 +ENDCHAR +STARTCHAR Scaron +ENCODING 352 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 10 14 0 0 +BITMAP +6180 +3300 +1E00 +0C00 +0000 +3F80 +7180 +7880 +7E00 +3F00 +0F80 +83C0 +C780 +BF00 +ENDCHAR +STARTCHAR scaron +ENCODING 353 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 14 0 0 +BITMAP +C300 +6600 +3C00 +1800 +0000 +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +ENDCHAR +STARTCHAR Tcommaaccent +ENCODING 354 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 18 1 -4 +BITMAP +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +1F00 +0800 +0E00 +0600 +1C00 +ENDCHAR +STARTCHAR tcommaaccent +ENCODING 355 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 17 0 -4 +BITMAP +10 +30 +30 +70 +FC +70 +70 +70 +70 +70 +72 +72 +3C +20 +38 +18 +70 +ENDCHAR +STARTCHAR Tcaron +ENCODING 356 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 19 1 0 +BITMAP +3180 +1F00 +0E00 +0400 +0000 +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +1F00 +ENDCHAR +STARTCHAR tcaron +ENCODING 357 +SWIDTH 646 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +0060 +10F0 +30F0 +3070 +7020 +FC40 +7080 +7000 +7000 +7000 +7000 +7200 +7200 +3C00 +ENDCHAR +STARTCHAR Tbar +ENCODING 358 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +1F00 +1F00 +0E00 +0E00 +0E00 +0E00 +0E00 +1F00 +ENDCHAR +STARTCHAR tbar +ENCODING 359 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 13 0 0 +BITMAP +10 +30 +30 +70 +FC +70 +70 +70 +7C +7C +72 +72 +3C +ENDCHAR +STARTCHAR Utilde +ENCODING 360 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 18 1 0 +BITMAP +0620 +0FC0 +1180 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR utilde +ENCODING 361 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 13 0 0 +BITMAP +0C40 +1F80 +2300 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR Umacron +ENCODING 362 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 17 1 0 +BITMAP +0FC0 +0FC0 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR umacron +ENCODING 363 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 12 0 0 +BITMAP +1F80 +1F80 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR Ubreve +ENCODING 364 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 18 1 0 +BITMAP +0840 +0CC0 +0780 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR ubreve +ENCODING 365 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 13 0 0 +BITMAP +1080 +1980 +0F00 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR Uring +ENCODING 366 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +0300 +0480 +0480 +0300 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uring +ENCODING 367 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +0600 +0900 +0900 +0600 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR Uhungarumlaut +ENCODING 368 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +0CC0 +0CC0 +1980 +1100 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uhungarumlaut +ENCODING 369 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +0CC0 +0CC0 +1980 +1100 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR Uogonek +ENCODING 370 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 18 1 -4 +BITMAP +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +0600 +0C00 +0D00 +0600 +ENDCHAR +STARTCHAR uogonek +ENCODING 371 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 13 0 -4 +BITMAP +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +0300 +0600 +0680 +0300 +ENDCHAR +STARTCHAR Wcircumflex +ENCODING 372 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 19 19 0 0 +BITMAP +008000 +01C000 +03E000 +063000 +000000 +FBF3E0 +71E1C0 +70E180 +78E100 +38F100 +39F300 +3D7200 +1D3A00 +1F3E00 +1E3C00 +0E1C00 +0E1C00 +0C1800 +040800 +ENDCHAR +STARTCHAR wcircumflex +ENCODING 373 +SWIDTH 889 0 +DWIDTH 15 0 +BBX 16 14 -1 0 +BITMAP +0100 +0380 +07C0 +0C60 +0000 +FBE7 +71C2 +71C2 +39E4 +39E4 +1E78 +1E78 +0C30 +0C30 +ENDCHAR +STARTCHAR Ycircumflex +ENCODING 374 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 19 1 0 +BITMAP +0200 +0700 +0F80 +18C0 +0000 +F878 +7030 +7820 +3860 +3C40 +1CC0 +1F80 +0F80 +0F00 +0700 +0700 +0700 +0700 +0F80 +ENDCHAR +STARTCHAR ycircumflex +ENCODING 375 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 18 0 -4 +BITMAP +0800 +1C00 +3E00 +6300 +0000 +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +ENDCHAR +STARTCHAR Ydieresis +ENCODING 376 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 14 0 0 +BITMAP +0CC0 +0CC0 +0000 +0000 +0000 +FCF8 +7870 +3CE0 +1FC0 +0F80 +0780 +0780 +0780 +0FC0 +ENDCHAR +STARTCHAR Zacute +ENCODING 377 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 11 19 1 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +FFE0 +E1E0 +C1C0 +83C0 +8780 +0700 +0F00 +1E00 +1C00 +3C20 +7820 +7060 +F0E0 +FFE0 +ENDCHAR +STARTCHAR zacute +ENCODING 378 +SWIDTH 537 0 +DWIDTH 10 0 +BBX 8 14 0 0 +BITMAP +06 +0E +1C +30 +00 +FF +CF +8E +1C +38 +39 +71 +F3 +FF +ENDCHAR +STARTCHAR Zdotaccent +ENCODING 379 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 11 17 1 0 +BITMAP +0600 +0600 +0000 +FFE0 +E1E0 +C1C0 +83C0 +8780 +0700 +0F00 +1E00 +1C00 +3C20 +7820 +7060 +F0E0 +FFE0 +ENDCHAR +STARTCHAR zdotaccent +ENCODING 380 +SWIDTH 537 0 +DWIDTH 10 0 +BBX 8 12 0 0 +BITMAP +18 +18 +00 +FF +CF +8E +1C +38 +39 +71 +F3 +FF +ENDCHAR +STARTCHAR Zcaron +ENCODING 381 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +30C0 +1980 +0F00 +0600 +0000 +FFF0 +C1E0 +83C0 +0780 +0F10 +1E10 +3C30 +7870 +FFF0 +ENDCHAR +STARTCHAR zcaron +ENCODING 382 +SWIDTH 537 0 +DWIDTH 10 0 +BBX 8 14 0 0 +BITMAP +C3 +66 +3C +18 +00 +FF +C7 +8F +1E +3C +79 +F1 +E3 +FF +ENDCHAR +STARTCHAR uni0186 +ENCODING 390 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 14 1 0 +BITMAP +1F00 +63C0 +41E0 +80E0 +80F0 +0070 +0070 +0070 +8070 +80F0 +C0E0 +C1E0 +E3C0 +9F00 +ENDCHAR +STARTCHAR uni0189 +ENCODING 393 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 14 0 0 +BITMAP +7FE0 +3878 +383C +381C +381E +380E +FE0E +380E +380E +381E +381C +383C +3878 +7FE0 +ENDCHAR +STARTCHAR uni018E +ENCODING 398 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +FFE0 +E1C0 +C1C0 +81C0 +91C0 +11C0 +19C0 +1FC0 +19C0 +91C0 +91C0 +C1C0 +E1C0 +FFE0 +ENDCHAR +STARTCHAR florin +ENCODING 402 +SWIDTH 574 0 +DWIDTH 12 0 +BBX 11 18 0 -4 +BITMAP +01C0 +0360 +0760 +0700 +0700 +1FC0 +0E00 +0E00 +0E00 +0E00 +0E00 +1C00 +1C00 +1C00 +1C00 +DC00 +D800 +7000 +ENDCHAR +STARTCHAR uni0197 +ENCODING 407 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 5 14 2 0 +BITMAP +F8 +70 +70 +70 +70 +70 +F8 +F8 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR uni019A +ENCODING 410 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 5 14 0 0 +BITMAP +F0 +70 +70 +70 +70 +70 +F8 +F8 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR uni019D +ENCODING 413 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 17 18 -1 -4 +BITMAP +3E0F80 +1F0700 +0F0200 +0F8200 +0BC200 +09E200 +08E200 +087200 +087A00 +083A00 +0E1E00 +0E1E00 +0E0E00 +0E0600 +0E0000 +EE0000 +EC0000 +780000 +ENDCHAR +STARTCHAR uni019F +ENCODING 415 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 14 0 0 +BITMAP +0FE0 +3C78 +783C +701C +F01E +E00E +FFFE +FFFE +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR Ohorn +ENCODING 416 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 18 14 0 0 +BITMAP +0FE180 +3C7BC0 +783FC0 +701DC0 +F01E80 +E00F00 +E00E00 +E00E00 +E00E00 +F01E00 +701C00 +783C00 +3C7800 +0FE000 +ENDCHAR +STARTCHAR ohorn +ENCODING 417 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 14 9 0 0 +BITMAP +1F18 +71FC +E0FC +E0FC +E0E8 +E0F0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni01A7 +ENCODING 423 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +5F80 +70C0 +6060 +4060 +00E0 +0FE0 +7FC0 +FFC0 +FE00 +E020 +C020 +C060 +60E0 +3FA0 +ENDCHAR +STARTCHAR uni01A8 +ENCODING 424 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 9 0 0 +BITMAP +5E00 +6300 +4380 +1F80 +7F00 +F800 +E080 +6180 +3E80 +ENDCHAR +STARTCHAR uni01AE +ENCODING 430 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 18 1 -4 +BITMAP +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0EE0 +06E0 +03C0 +ENDCHAR +STARTCHAR Uhorn +ENCODING 431 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 17 14 1 0 +BITMAP +F87F00 +703F80 +701780 +701380 +701100 +701200 +701400 +701000 +701000 +701000 +701000 +701000 +382000 +1FC000 +ENDCHAR +STARTCHAR uhorn +ENCODING 432 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 15 9 0 0 +BITMAP +F1EC +70FE +70FE +70EE +70E4 +70E8 +70F0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni01B5 +ENCODING 437 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +FFE0 +E1E0 +C1C0 +83C0 +8780 +0700 +1F00 +1F00 +1C00 +3C20 +7820 +7060 +F0E0 +FFE0 +ENDCHAR +STARTCHAR uni01B6 +ENCODING 438 +SWIDTH 537 0 +DWIDTH 10 0 +BBX 8 9 0 0 +BITMAP +FF +CF +8E +3E +3E +39 +71 +F3 +FF +ENDCHAR +STARTCHAR uni01BB +ENCODING 443 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +1E00 +6700 +E380 +E380 +6380 +0380 +FF80 +FF80 +0E00 +1800 +3000 +6080 +FF80 +FF80 +ENDCHAR +STARTCHAR uni01BC +ENCODING 444 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 9 14 1 0 +BITMAP +7F80 +7F00 +4000 +4000 +4000 +7E00 +4700 +0380 +0380 +6380 +E380 +E380 +6700 +3E00 +ENDCHAR +STARTCHAR uni01C0 +ENCODING 448 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 2 14 4 0 +BITMAP +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR uni01C2 +ENCODING 450 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 9 14 1 -2 +BITMAP +0C00 +0C00 +0C00 +0C00 +FF80 +FF80 +0C00 +0C00 +FF80 +FF80 +0C00 +0C00 +0C00 +0C00 +ENDCHAR +STARTCHAR uni01C3 +ENCODING 451 +SWIDTH 296 0 +DWIDTH 6 0 +BBX 4 14 1 0 +BITMAP +60 +F0 +F0 +F0 +F0 +F0 +60 +60 +60 +00 +60 +F0 +F0 +60 +ENDCHAR +STARTCHAR uni01CD +ENCODING 461 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 19 0 0 +BITMAP +0C60 +07C0 +0380 +0100 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni01CE +ENCODING 462 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +6300 +3E00 +1C00 +0800 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni01CF +ENCODING 463 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 7 19 1 0 +BITMAP +C6 +7C +38 +10 +00 +7C +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR uni01D0 +ENCODING 464 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 7 14 -1 0 +BITMAP +C6 +7C +38 +10 +00 +78 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR uni01D1 +ENCODING 465 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 19 0 0 +BITMAP +0C60 +07C0 +0380 +0100 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni01D2 +ENCODING 466 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +3180 +1F00 +0E00 +0400 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni01D3 +ENCODING 467 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +18C0 +0F80 +0700 +0200 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uni01D4 +ENCODING 468 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +3180 +1F00 +0E00 +0400 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni01D5 +ENCODING 469 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 20 1 0 +BITMAP +0FC0 +0FC0 +0000 +0CC0 +0CC0 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uni01D6 +ENCODING 470 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 15 0 0 +BITMAP +1F80 +1F80 +0000 +1980 +1980 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni01D7 +ENCODING 471 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 22 1 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +0CC0 +0CC0 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uni01D8 +ENCODING 472 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 17 0 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +1980 +1980 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni01D9 +ENCODING 473 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 22 1 0 +BITMAP +0C60 +07C0 +0380 +0100 +0000 +0CC0 +0CC0 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uni01DA +ENCODING 474 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 17 0 0 +BITMAP +3180 +1F00 +0E00 +0400 +0000 +1980 +1980 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni01DB +ENCODING 475 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 22 1 0 +BITMAP +0C00 +0E00 +0700 +0180 +0000 +0CC0 +0CC0 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uni01DC +ENCODING 476 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 17 0 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +1980 +1980 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni01DD +ENCODING 477 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 9 0 0 +BITMAP +3E00 +C380 +81C0 +01C0 +FFC0 +E1C0 +E1C0 +7380 +1E00 +ENDCHAR +STARTCHAR uni01DE +ENCODING 478 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 20 0 0 +BITMAP +0FC0 +0FC0 +0000 +0CC0 +0CC0 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni01DF +ENCODING 479 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 15 0 0 +BITMAP +3F00 +3F00 +0000 +3300 +3300 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni01E0 +ENCODING 480 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 20 0 0 +BITMAP +0FC0 +0FC0 +0000 +0300 +0300 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni01E1 +ENCODING 481 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 15 0 0 +BITMAP +3F00 +3F00 +0000 +0C00 +0C00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni01E2 +ENCODING 482 +SWIDTH 981 0 +DWIDTH 21 0 +BBX 20 17 0 0 +BITMAP +007E00 +007E00 +000000 +03FFF0 +00B870 +01B830 +013890 +033890 +063980 +043F80 +0C3980 +1FF880 +103890 +203810 +203830 +603870 +F1FFF0 +ENDCHAR +STARTCHAR uni01E3 +ENCODING 483 +SWIDTH 870 0 +DWIDTH 17 0 +BBX 16 12 0 0 +BITMAP +07E0 +07E0 +0000 +3F78 +63CE +E387 +0787 +3BFF +E380 +E381 +E7C3 +78FC +ENDCHAR +STARTCHAR uni01E4 +ENCODING 484 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 14 14 1 0 +BITMAP +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E0F8 +F070 +7070 +787C +3CFC +0F90 +ENDCHAR +STARTCHAR uni01E5 +ENCODING 485 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 11 15 0 -4 +BITMAP +0060 +00E0 +3F00 +7380 +6180 +6180 +7380 +3F00 +6000 +7F80 +FFE0 +FFE0 +C0C0 +E180 +7F00 +ENDCHAR +STARTCHAR Gcaron +ENCODING 486 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 13 19 1 0 +BITMAP +18C0 +0F80 +0700 +0200 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E0F8 +F070 +7070 +7870 +3CF0 +0F90 +ENDCHAR +STARTCHAR gcaron +ENCODING 487 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 11 20 0 -4 +BITMAP +18C0 +0F80 +0700 +0200 +0000 +0060 +00E0 +3F00 +7380 +6180 +6180 +7380 +3F00 +6000 +7F80 +3FC0 +C1C0 +C0C0 +E180 +7F00 +ENDCHAR +STARTCHAR uni01E8 +ENCODING 488 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 15 19 1 0 +BITMAP +18C0 +0F80 +0700 +0200 +0000 +FC7C +7030 +7060 +70C0 +7180 +7300 +7780 +7FC0 +7BC0 +71E0 +70F0 +70F8 +707C +FCFE +ENDCHAR +STARTCHAR uni01E9 +ENCODING 489 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 19 0 0 +BITMAP +C600 +7C00 +3800 +1000 +0000 +F000 +7000 +7000 +7000 +7000 +73E0 +7180 +7200 +7600 +7F00 +7780 +73C0 +71E0 +FBF0 +ENDCHAR +STARTCHAR uni01EA +ENCODING 490 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 18 0 -4 +BITMAP +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +0180 +0300 +0340 +0180 +ENDCHAR +STARTCHAR uni01EB +ENCODING 491 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 13 0 -4 +BITMAP +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +0600 +0C00 +0D00 +0600 +ENDCHAR +STARTCHAR uni01EC +ENCODING 492 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 21 0 -4 +BITMAP +07E0 +07E0 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +0180 +0300 +0340 +0180 +ENDCHAR +STARTCHAR uni01ED +ENCODING 493 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 16 0 -4 +BITMAP +1F80 +1F80 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +0600 +0C00 +0D00 +0600 +ENDCHAR +STARTCHAR uni01F0 +ENCODING 496 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 8 18 -3 -4 +BITMAP +63 +3E +1C +08 +00 +1E +0E +0E +0E +0E +0E +0E +0E +0E +0E +EE +EC +78 +ENDCHAR +STARTCHAR uni01F4 +ENCODING 500 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 13 19 1 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E0F8 +F070 +7070 +7870 +3CF0 +0F90 +ENDCHAR +STARTCHAR uni01F5 +ENCODING 501 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 11 20 0 -4 +BITMAP +0180 +0380 +0700 +0C00 +0000 +0060 +00E0 +3F00 +7380 +6180 +6180 +7380 +3F00 +6000 +7F80 +3FC0 +C1C0 +C0C0 +E180 +7F00 +ENDCHAR +STARTCHAR uni01F8 +ENCODING 504 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 19 1 0 +BITMAP +0C00 +0E00 +0700 +0180 +0000 +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +ENDCHAR +STARTCHAR uni01F9 +ENCODING 505 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR Aringacute +ENCODING 506 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 23 0 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +0300 +0480 +0480 +0300 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR aringacute +ENCODING 507 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 19 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +0C00 +1200 +1200 +0C00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR AEacute +ENCODING 508 +SWIDTH 981 0 +DWIDTH 21 0 +BBX 20 19 0 0 +BITMAP +000600 +000E00 +001C00 +003000 +000000 +03FFF0 +00B870 +01B830 +013890 +033890 +063980 +043F80 +0C3980 +1FF880 +103890 +203810 +203830 +603870 +F1FFF0 +ENDCHAR +STARTCHAR aeacute +ENCODING 509 +SWIDTH 870 0 +DWIDTH 17 0 +BBX 16 14 0 0 +BITMAP +0060 +00E0 +01C0 +0300 +0000 +3F78 +63CE +E387 +0787 +3BFF +E380 +E381 +E7C3 +78FC +ENDCHAR +STARTCHAR Oslashacute +ENCODING 510 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +0FC8 +38F0 +7078 +7078 +E0BC +E11C +E21C +E21C +E41C +E83C +7038 +7078 +78F0 +8FC0 +ENDCHAR +STARTCHAR oslashacute +ENCODING 511 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 16 0 -1 +BITMAP +0300 +0700 +0E00 +1800 +0000 +0100 +1F00 +7380 +E3C0 +E5C0 +E5C0 +E9C0 +E9C0 +7380 +3E00 +2000 +ENDCHAR +STARTCHAR uni0200 +ENCODING 512 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 19 0 0 +BITMAP +1980 +1980 +0CC0 +0440 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni0201 +ENCODING 513 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +6600 +6600 +3300 +1100 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni0202 +ENCODING 514 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 18 0 0 +BITMAP +0780 +0CC0 +0840 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni0203 +ENCODING 515 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 13 0 0 +BITMAP +1E00 +3300 +2100 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni0204 +ENCODING 516 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 19 1 0 +BITMAP +3300 +3300 +1980 +0880 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR uni0205 +ENCODING 517 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 14 0 0 +BITMAP +6600 +6600 +3300 +1100 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR uni0206 +ENCODING 518 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 18 1 0 +BITMAP +0F00 +1980 +1080 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR uni0207 +ENCODING 519 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 13 0 0 +BITMAP +1E00 +3300 +2100 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR uni0208 +ENCODING 520 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 7 19 1 0 +BITMAP +CC +CC +66 +22 +00 +7C +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR uni0209 +ENCODING 521 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 7 14 -2 0 +BITMAP +CC +CC +66 +22 +00 +3C +1C +1C +1C +1C +1C +1C +1C +3E +ENDCHAR +STARTCHAR uni020A +ENCODING 522 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 6 18 2 0 +BITMAP +78 +CC +84 +00 +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR uni020B +ENCODING 523 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 6 13 -1 0 +BITMAP +78 +CC +84 +00 +78 +38 +38 +38 +38 +38 +38 +38 +7C +ENDCHAR +STARTCHAR uni020C +ENCODING 524 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 19 0 0 +BITMAP +0CC0 +0CC0 +0660 +0220 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni020D +ENCODING 525 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +3300 +3300 +1980 +0880 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni020E +ENCODING 526 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 18 0 0 +BITMAP +03C0 +0660 +0420 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni020F +ENCODING 527 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 13 0 0 +BITMAP +0F00 +1980 +1080 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni0210 +ENCODING 528 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +1980 +1980 +0CC0 +0440 +0000 +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +ENDCHAR +STARTCHAR uni0211 +ENCODING 529 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 14 0 0 +BITMAP +CC +CC +66 +22 +00 +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR uni0212 +ENCODING 530 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 18 1 0 +BITMAP +0F00 +1980 +1080 +0000 +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +ENDCHAR +STARTCHAR uni0213 +ENCODING 531 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 13 0 0 +BITMAP +3C +66 +42 +00 +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR uni0214 +ENCODING 532 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +1980 +1980 +0CC0 +0440 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uni0215 +ENCODING 533 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 0 +BITMAP +3300 +3300 +1980 +0880 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni0216 +ENCODING 534 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 18 1 0 +BITMAP +0780 +0CC0 +0840 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uni0217 +ENCODING 535 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 13 0 0 +BITMAP +0F00 +1980 +1080 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR Scommaaccent +ENCODING 536 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 22 0 -8 +BITMAP +3F40 +61C0 +C0C0 +C040 +E000 +FE00 +7FC0 +7FE0 +0FE0 +80E0 +8060 +C060 +E0C0 +BF80 +0000 +0C00 +1E00 +1E00 +0E00 +0400 +0800 +1000 +ENDCHAR +STARTCHAR scommaaccent +ENCODING 537 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 17 0 -8 +BITMAP +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +0000 +1800 +3C00 +3C00 +1C00 +0800 +1000 +2000 +ENDCHAR +STARTCHAR Tcommaaccent +ENCODING 538 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 22 1 -8 +BITMAP +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +1F00 +0000 +0600 +0F00 +0F00 +0700 +0200 +0400 +0800 +ENDCHAR +STARTCHAR tcommaaccent +ENCODING 539 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 21 0 -8 +BITMAP +10 +30 +30 +70 +FC +70 +70 +70 +70 +70 +72 +72 +3C +00 +30 +78 +78 +38 +10 +20 +40 +ENDCHAR +STARTCHAR uni021E +ENCODING 542 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 14 19 1 0 +BITMAP +0C60 +07C0 +0380 +0100 +0000 +FCFC +7038 +7038 +7038 +7038 +7038 +7FF8 +7038 +7038 +7038 +7038 +7038 +7038 +FCFC +ENDCHAR +STARTCHAR uni021F +ENCODING 543 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 19 0 0 +BITMAP +C600 +7C00 +3800 +1000 +0000 +F000 +7000 +7000 +7000 +7000 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR uni0226 +ENCODING 550 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 17 0 0 +BITMAP +0300 +0300 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni0227 +ENCODING 551 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 12 0 0 +BITMAP +0C00 +0C00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni0228 +ENCODING 552 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 18 1 -4 +BITMAP +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +0800 +0E00 +0600 +1C00 +ENDCHAR +STARTCHAR uni0229 +ENCODING 553 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 13 0 -4 +BITMAP +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +0800 +0E00 +0600 +1C00 +ENDCHAR +STARTCHAR uni022A +ENCODING 554 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 20 0 0 +BITMAP +07E0 +07E0 +0000 +0660 +0660 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni022B +ENCODING 555 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 15 0 0 +BITMAP +1F80 +1F80 +0000 +1980 +1980 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni022C +ENCODING 556 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 21 0 0 +BITMAP +07E0 +07E0 +0000 +0310 +07E0 +08C0 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni022D +ENCODING 557 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 16 0 0 +BITMAP +3F00 +3F00 +0000 +1880 +3F00 +4600 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni022E +ENCODING 558 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 17 0 0 +BITMAP +0180 +0180 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni022F +ENCODING 559 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 12 0 0 +BITMAP +0600 +0600 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni0230 +ENCODING 560 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 20 0 0 +BITMAP +07E0 +07E0 +0000 +0180 +0180 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni0231 +ENCODING 561 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 15 0 0 +BITMAP +1F80 +1F80 +0000 +0600 +0600 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni0232 +ENCODING 562 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 17 1 0 +BITMAP +1F80 +1F80 +0000 +F878 +7030 +7820 +3860 +3C40 +1CC0 +1F80 +0F80 +0F00 +0700 +0700 +0700 +0700 +0F80 +ENDCHAR +STARTCHAR uni0233 +ENCODING 563 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 16 0 -4 +BITMAP +3F00 +3F00 +0000 +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +ENDCHAR +STARTCHAR uni0250 +ENCODING 592 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 9 0 0 +BITMAP +F780 +79C0 +71C0 +71C0 +7700 +7800 +70C0 +71C0 +3F80 +ENDCHAR +STARTCHAR uni0254 +ENCODING 596 +SWIDTH 556 0 +DWIDTH 10 0 +BBX 9 9 0 0 +BITMAP +7C00 +E700 +C380 +0380 +0380 +0380 +8380 +C700 +3C00 +ENDCHAR +STARTCHAR uni0258 +ENCODING 600 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 9 0 0 +BITMAP +1E00 +7380 +E1C0 +E1C0 +FFC0 +01C0 +81C0 +C380 +3E00 +ENDCHAR +STARTCHAR uni0259 +ENCODING 601 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 9 0 0 +BITMAP +3E00 +C380 +81C0 +01C0 +FFC0 +E1C0 +E1C0 +7380 +1E00 +ENDCHAR +STARTCHAR uni025F +ENCODING 607 +SWIDTH 389 0 +DWIDTH 7 0 +BBX 8 14 0 -5 +BITMAP +1F +0E +0E +0E +0E +0E +0E +0E +3F +0E +0E +EE +EC +78 +ENDCHAR +STARTCHAR uni0265 +ENCODING 613 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 -5 +BITMAP +F9F0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EE0 +00E0 +00E0 +00E0 +00E0 +00F0 +ENDCHAR +STARTCHAR uni0275 +ENCODING 629 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 9 0 0 +BITMAP +1F00 +71C0 +E0E0 +FFE0 +FFE0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni0279 +ENCODING 633 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 9 0 0 +BITMAP +1F +0E +0E +0E +0E +0E +CE +DE +EF +ENDCHAR +STARTCHAR uni0287 +ENCODING 647 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 13 0 0 +BITMAP +78 +9C +9C +1C +1C +1C +1C +1C +7E +1C +18 +18 +10 +ENDCHAR +STARTCHAR uni0288 +ENCODING 648 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 8 17 0 -4 +BITMAP +10 +30 +30 +70 +FC +70 +70 +70 +70 +70 +70 +70 +70 +70 +77 +37 +1E +ENDCHAR +STARTCHAR uni0289 +ENCODING 649 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 9 0 0 +BITMAP +F1E0 +70E0 +70E0 +FFF0 +FFF0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni028C +ENCODING 652 +SWIDTH 611 0 +DWIDTH 9 0 +BBX 10 9 -1 0 +BITMAP +0C00 +0C00 +1E00 +1E00 +2700 +2700 +4380 +4380 +E7C0 +ENDCHAR +STARTCHAR uni028D +ENCODING 653 +SWIDTH 889 0 +DWIDTH 15 0 +BBX 16 9 -1 0 +BITMAP +0C30 +0C30 +1E78 +1E78 +279C +279C +438E +438E +E7DF +ENDCHAR +STARTCHAR uni028E +ENCODING 654 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 13 0 0 +BITMAP +01C0 +02E0 +0460 +0400 +0E00 +0E00 +1700 +1700 +2380 +2380 +41C0 +41C0 +E3E0 +ENDCHAR +STARTCHAR uni029E +ENCODING 670 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 14 0 -5 +BITMAP +FDF0 +78E0 +3CE0 +1EE0 +0FE0 +06E0 +04E0 +18E0 +7CE0 +00E0 +00E0 +00E0 +00E0 +00F0 +ENDCHAR +STARTCHAR uni02BB +ENCODING 699 +SWIDTH 241 0 +DWIDTH 5 0 +BBX 4 7 0 7 +BITMAP +10 +20 +40 +E0 +F0 +F0 +60 +ENDCHAR +STARTCHAR afii57929 +ENCODING 700 +SWIDTH 241 0 +DWIDTH 5 0 +BBX 4 7 0 7 +BITMAP +60 +F0 +F0 +70 +20 +40 +80 +ENDCHAR +STARTCHAR afii64937 +ENCODING 701 +SWIDTH 241 0 +DWIDTH 5 0 +BBX 4 7 0 7 +BITMAP +60 +F0 +F0 +E0 +40 +20 +10 +ENDCHAR +STARTCHAR circumflex +ENCODING 710 +SWIDTH 333 0 +DWIDTH 8 0 +BBX 7 4 0 10 +BITMAP +10 +38 +7C +C6 +ENDCHAR +STARTCHAR caron +ENCODING 711 +SWIDTH 333 0 +DWIDTH 10 0 +BBX 7 4 1 10 +BITMAP +C6 +7C +38 +10 +ENDCHAR +STARTCHAR uni02C8 +ENCODING 712 +SWIDTH 241 0 +DWIDTH 5 0 +BBX 2 5 1 9 +BITMAP +C0 +C0 +C0 +C0 +C0 +ENDCHAR +STARTCHAR macron +ENCODING 713 +SWIDTH 333 0 +DWIDTH 8 0 +BBX 6 2 1 10 +BITMAP +FC +FC +ENDCHAR +STARTCHAR uni02CA +ENCODING 714 +SWIDTH 333 0 +DWIDTH 7 0 +BBX 5 4 1 10 +BITMAP +18 +38 +70 +C0 +ENDCHAR +STARTCHAR uni02CB +ENCODING 715 +SWIDTH 333 0 +DWIDTH 7 0 +BBX 5 4 1 10 +BITMAP +C0 +E0 +70 +18 +ENDCHAR +STARTCHAR uni02CD +ENCODING 717 +SWIDTH 333 0 +DWIDTH 8 0 +BBX 6 2 1 -3 +BITMAP +FC +FC +ENDCHAR +STARTCHAR uni02CE +ENCODING 718 +SWIDTH 333 0 +DWIDTH 7 0 +BBX 5 4 1 -5 +BITMAP +C0 +E0 +70 +18 +ENDCHAR +STARTCHAR uni02CF +ENCODING 719 +SWIDTH 333 0 +DWIDTH 7 0 +BBX 5 4 1 -5 +BITMAP +18 +38 +70 +C0 +ENDCHAR +STARTCHAR breve +ENCODING 728 +SWIDTH 333 0 +DWIDTH 8 0 +BBX 6 3 1 10 +BITMAP +84 +CC +78 +ENDCHAR +STARTCHAR dotaccent +ENCODING 729 +SWIDTH 333 0 +DWIDTH 6 0 +BBX 2 2 2 10 +BITMAP +C0 +C0 +ENDCHAR +STARTCHAR ring +ENCODING 730 +SWIDTH 333 0 +DWIDTH 6 0 +BBX 4 4 1 10 +BITMAP +60 +90 +90 +60 +ENDCHAR +STARTCHAR ogonek +ENCODING 731 +SWIDTH 333 0 +DWIDTH 6 0 +BBX 4 4 1 -4 +BITMAP +60 +C0 +D0 +60 +ENDCHAR +STARTCHAR tilde +ENCODING 732 +SWIDTH 333 0 +DWIDTH 10 0 +BBX 8 3 1 10 +BITMAP +31 +7E +8C +ENDCHAR +STARTCHAR hungarumlaut +ENCODING 733 +SWIDTH 333 0 +DWIDTH 9 0 +BBX 7 4 1 10 +BITMAP +66 +66 +CC +88 +ENDCHAR +STARTCHAR uni02EE +ENCODING 750 +SWIDTH 481 0 +DWIDTH 10 0 +BBX 9 7 0 7 +BITMAP +6300 +F780 +F780 +7380 +2100 +4200 +8400 +ENDCHAR +STARTCHAR uni037E +ENCODING 894 +SWIDTH 278 0 +DWIDTH 6 0 +BBX 4 12 1 -3 +BITMAP +60 +F0 +F0 +60 +00 +60 +F0 +F0 +70 +20 +40 +80 +ENDCHAR +STARTCHAR tonos +ENCODING 900 +SWIDTH 333 0 +DWIDTH 7 0 +BBX 5 4 1 10 +BITMAP +18 +38 +70 +C0 +ENDCHAR +STARTCHAR dieresistonos +ENCODING 901 +SWIDTH 333 0 +DWIDTH 10 0 +BBX 6 7 2 10 +BITMAP +0C +1C +38 +60 +00 +CC +CC +ENDCHAR +STARTCHAR anoteleia +ENCODING 903 +SWIDTH 278 0 +DWIDTH 5 0 +BBX 4 4 0 3 +BITMAP +60 +F0 +F0 +60 +ENDCHAR +STARTCHAR mu +ENCODING 956 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 13 0 -4 +BITMAP +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +7EF0 +6000 +7000 +7000 +2000 +ENDCHAR +STARTCHAR uni1E00 +ENCODING 7680 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 19 0 -5 +BITMAP +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +0000 +0180 +0240 +0240 +0180 +ENDCHAR +STARTCHAR uni1E01 +ENCODING 7681 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 14 0 -5 +BITMAP +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +0000 +0C00 +1200 +1200 +0C00 +ENDCHAR +STARTCHAR uni1E02 +ENCODING 7682 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 17 1 0 +BITMAP +0600 +0600 +0000 +FFC0 +71E0 +70E0 +70E0 +70E0 +71C0 +7F80 +70E0 +70F0 +7070 +7070 +7070 +70E0 +FF80 +ENDCHAR +STARTCHAR uni1E03 +ENCODING 7683 +SWIDTH 648 0 +DWIDTH 12 0 +BBX 12 17 -1 0 +BITMAP +1800 +1800 +0000 +F000 +7000 +7000 +7000 +7000 +7780 +78E0 +7070 +7070 +7070 +7070 +7070 +78E0 +6F80 +ENDCHAR +STARTCHAR uni1E04 +ENCODING 7684 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 17 1 -3 +BITMAP +FFC0 +71E0 +70E0 +70E0 +70E0 +71C0 +7F80 +70E0 +70F0 +7070 +7070 +7070 +70E0 +FF80 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E05 +ENCODING 7685 +SWIDTH 648 0 +DWIDTH 12 0 +BBX 12 17 -1 -3 +BITMAP +F000 +7000 +7000 +7000 +7000 +7780 +78E0 +7070 +7070 +7070 +7070 +7070 +78E0 +6F80 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E06 +ENCODING 7686 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 17 1 -3 +BITMAP +FFC0 +71E0 +70E0 +70E0 +70E0 +71C0 +7F80 +70E0 +70F0 +7070 +7070 +7070 +70E0 +FF80 +0000 +1F80 +1F80 +ENDCHAR +STARTCHAR uni1E07 +ENCODING 7687 +SWIDTH 648 0 +DWIDTH 12 0 +BBX 12 17 -1 -3 +BITMAP +F000 +7000 +7000 +7000 +7000 +7780 +78E0 +7070 +7070 +7070 +7070 +7070 +78E0 +6F80 +0000 +1F80 +1F80 +ENDCHAR +STARTCHAR uni1E08 +ENCODING 7688 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 12 23 1 -4 +BITMAP +0180 +0380 +0700 +0C00 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E000 +F010 +7010 +7820 +3C60 +0F80 +0400 +0700 +0300 +0E00 +ENDCHAR +STARTCHAR uni1E09 +ENCODING 7689 +SWIDTH 556 0 +DWIDTH 10 0 +BBX 9 18 0 -4 +BITMAP +0600 +0E00 +1C00 +3000 +0000 +1F00 +7380 +E180 +E000 +E000 +E000 +E080 +7180 +1E00 +1000 +1C00 +0C00 +3800 +ENDCHAR +STARTCHAR uni1E0A +ENCODING 7690 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 17 1 0 +BITMAP +0300 +0300 +0000 +FFC0 +70F0 +7078 +7038 +703C +701C +701C +701C +701C +703C +7038 +7078 +70F0 +FFC0 +ENDCHAR +STARTCHAR uni1E0B +ENCODING 7691 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 17 0 0 +BITMAP +0180 +0180 +0000 +01E0 +00E0 +00E0 +00E0 +00E0 +1EE0 +71E0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71E0 +1EF0 +ENDCHAR +STARTCHAR uni1E0C +ENCODING 7692 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 17 1 -3 +BITMAP +FFC0 +70F0 +7078 +7038 +703C +701C +701C +701C +701C +703C +7038 +7078 +70F0 +FFC0 +0000 +0300 +0300 +ENDCHAR +STARTCHAR uni1E0D +ENCODING 7693 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 17 0 -3 +BITMAP +01E0 +00E0 +00E0 +00E0 +00E0 +1EE0 +71E0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71E0 +1EF0 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E0E +ENCODING 7694 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 17 1 -3 +BITMAP +FFC0 +70F0 +7078 +7038 +703C +701C +701C +701C +701C +703C +7038 +7078 +70F0 +FFC0 +0000 +0FC0 +0FC0 +ENDCHAR +STARTCHAR uni1E0F +ENCODING 7695 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 17 0 -3 +BITMAP +01E0 +00E0 +00E0 +00E0 +00E0 +1EE0 +71E0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71E0 +1EF0 +0000 +1F80 +1F80 +ENDCHAR +STARTCHAR uni1E10 +ENCODING 7696 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 18 1 -4 +BITMAP +FFC0 +70F0 +7078 +7038 +703C +701C +701C +701C +701C +703C +7038 +7078 +70F0 +FFC0 +0400 +0700 +0300 +0E00 +ENDCHAR +STARTCHAR uni1E11 +ENCODING 7697 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 18 0 -4 +BITMAP +01E0 +00E0 +00E0 +00E0 +00E0 +1EE0 +71E0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71E0 +1EF0 +0400 +0700 +0300 +0E00 +ENDCHAR +STARTCHAR uni1E12 +ENCODING 7698 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 -5 +BITMAP +FFC0 +70F0 +7078 +7038 +703C +701C +701C +701C +701C +703C +7038 +7078 +70F0 +FFC0 +0000 +0200 +0700 +0F80 +18C0 +ENDCHAR +STARTCHAR uni1E13 +ENCODING 7699 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 19 0 -5 +BITMAP +01E0 +00E0 +00E0 +00E0 +00E0 +1EE0 +71E0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71E0 +1EF0 +0000 +0200 +0700 +0F80 +18C0 +ENDCHAR +STARTCHAR uni1E14 +ENCODING 7700 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 22 1 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +1F80 +1F80 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR uni1E15 +ENCODING 7701 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 17 0 0 +BITMAP +3000 +3800 +1C00 +0600 +0000 +3F00 +3F00 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR uni1E16 +ENCODING 7702 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 22 1 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +1F80 +1F80 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR uni1E17 +ENCODING 7703 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 17 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +3F00 +3F00 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR uni1E18 +ENCODING 7704 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 19 1 -5 +BITMAP +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +0000 +0400 +0E00 +1F00 +3180 +ENDCHAR +STARTCHAR uni1E19 +ENCODING 7705 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 14 0 -5 +BITMAP +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +0000 +0800 +1C00 +3E00 +6300 +ENDCHAR +STARTCHAR uni1E1A +ENCODING 7706 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 18 1 -4 +BITMAP +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +0000 +1880 +3F00 +4600 +ENDCHAR +STARTCHAR uni1E1B +ENCODING 7707 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 13 0 -4 +BITMAP +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +0000 +1880 +3F00 +4600 +ENDCHAR +STARTCHAR uni1E1C +ENCODING 7708 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 22 1 -4 +BITMAP +2100 +3300 +1E00 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +0800 +0E00 +0600 +1C00 +ENDCHAR +STARTCHAR uni1E1D +ENCODING 7709 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 17 0 -4 +BITMAP +2100 +3300 +1E00 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +0800 +0E00 +0600 +1C00 +ENDCHAR +STARTCHAR uni1E1E +ENCODING 7710 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 17 1 0 +BITMAP +0600 +0600 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7320 +7F00 +7300 +7100 +7100 +7000 +7000 +7000 +F800 +ENDCHAR +STARTCHAR uni1E1F +ENCODING 7711 +SWIDTH 389 0 +DWIDTH 7 0 +BBX 8 17 0 0 +BITMAP +18 +18 +00 +1E +37 +77 +70 +70 +FC +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR uni1E20 +ENCODING 7712 +SWIDTH 833 0 +DWIDTH 15 0 +BBX 13 17 1 0 +BITMAP +1F80 +1F80 +0000 +0F90 +3C70 +7830 +7030 +F010 +E010 +E000 +E000 +E0F8 +F070 +7070 +7870 +3CF0 +0F90 +ENDCHAR +STARTCHAR uni1E21 +ENCODING 7713 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 11 18 0 -4 +BITMAP +1F80 +1F80 +0000 +0060 +00E0 +3F00 +7380 +6180 +6180 +7380 +3F00 +6000 +7F80 +3FC0 +C1C0 +C0C0 +E180 +7F00 +ENDCHAR +STARTCHAR uni1E22 +ENCODING 7714 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 14 17 1 0 +BITMAP +0300 +0300 +0000 +FCFC +7038 +7038 +7038 +7038 +7038 +7FF8 +7038 +7038 +7038 +7038 +7038 +7038 +FCFC +ENDCHAR +STARTCHAR uni1E23 +ENCODING 7715 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 17 0 0 +BITMAP +1800 +1800 +0000 +F000 +7000 +7000 +7000 +7000 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR uni1E24 +ENCODING 7716 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 14 17 1 -3 +BITMAP +FCFC +7038 +7038 +7038 +7038 +7038 +7FF8 +7038 +7038 +7038 +7038 +7038 +7038 +FCFC +0000 +0300 +0300 +ENDCHAR +STARTCHAR uni1E25 +ENCODING 7717 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 17 0 -3 +BITMAP +F000 +7000 +7000 +7000 +7000 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E26 +ENCODING 7718 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 14 17 1 0 +BITMAP +0CC0 +0CC0 +0000 +FCFC +7038 +7038 +7038 +7038 +7038 +7FF8 +7038 +7038 +7038 +7038 +7038 +7038 +FCFC +ENDCHAR +STARTCHAR uni1E27 +ENCODING 7719 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 17 0 0 +BITMAP +6600 +6600 +0000 +F000 +7000 +7000 +7000 +7000 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR uni1E28 +ENCODING 7720 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 14 18 1 -4 +BITMAP +FCFC +7038 +7038 +7038 +7038 +7038 +7FF8 +7038 +7038 +7038 +7038 +7038 +7038 +FCFC +0200 +0380 +0180 +0700 +ENDCHAR +STARTCHAR uni1E29 +ENCODING 7721 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 18 0 -4 +BITMAP +F000 +7000 +7000 +7000 +7000 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +0400 +0700 +0300 +0E00 +ENDCHAR +STARTCHAR uni1E2A +ENCODING 7722 +SWIDTH 870 0 +DWIDTH 16 0 +BBX 14 18 1 -4 +BITMAP +FCFC +7038 +7038 +7038 +7038 +7038 +7FF8 +7038 +7038 +7038 +7038 +7038 +7038 +FCFC +0000 +0840 +0CC0 +0780 +ENDCHAR +STARTCHAR uni1E2B +ENCODING 7723 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 18 0 -4 +BITMAP +F000 +7000 +7000 +7000 +7000 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +0000 +1080 +1980 +0F00 +ENDCHAR +STARTCHAR uni1E2C +ENCODING 7724 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 8 18 0 -4 +BITMAP +3E +1C +1C +1C +1C +1C +1C +1C +1C +1C +1C +1C +1C +3E +00 +31 +7E +8C +ENDCHAR +STARTCHAR uni1E2D +ENCODING 7725 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 8 18 -2 -4 +BITMAP +1C +1C +1C +00 +00 +3C +1C +1C +1C +1C +1C +1C +1C +3E +00 +31 +7E +8C +ENDCHAR +STARTCHAR uni1E2E +ENCODING 7726 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 6 22 2 0 +BITMAP +0C +1C +38 +60 +00 +CC +CC +00 +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR uni1E2F +ENCODING 7727 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 6 17 0 0 +BITMAP +0C +1C +38 +60 +00 +CC +CC +00 +F0 +70 +70 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR uni1E30 +ENCODING 7728 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 15 19 1 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +FC7C +7030 +7060 +70C0 +7180 +7300 +7780 +7FC0 +7BC0 +71E0 +70F0 +70F8 +707C +FCFE +ENDCHAR +STARTCHAR uni1E31 +ENCODING 7729 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 19 0 0 +BITMAP +0C00 +1C00 +3800 +6000 +0000 +F000 +7000 +7000 +7000 +7000 +73E0 +7180 +7200 +7600 +7F00 +7780 +73C0 +71E0 +FBF0 +ENDCHAR +STARTCHAR uni1E32 +ENCODING 7730 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 15 17 1 -3 +BITMAP +FC7C +7030 +7060 +70C0 +7180 +7300 +7780 +7FC0 +7BC0 +71E0 +70F0 +70F8 +707C +FCFE +0000 +0180 +0180 +ENDCHAR +STARTCHAR uni1E33 +ENCODING 7731 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 17 0 -3 +BITMAP +F000 +7000 +7000 +7000 +7000 +73E0 +7180 +7200 +7600 +7F00 +7780 +73C0 +71E0 +FBF0 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E34 +ENCODING 7732 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 15 17 1 -3 +BITMAP +FC7C +7030 +7060 +70C0 +7180 +7300 +7780 +7FC0 +7BC0 +71E0 +70F0 +70F8 +707C +FCFE +0000 +07E0 +07E0 +ENDCHAR +STARTCHAR uni1E35 +ENCODING 7733 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 12 17 0 -3 +BITMAP +F000 +7000 +7000 +7000 +7000 +73E0 +7180 +7200 +7600 +7F00 +7780 +73C0 +71E0 +FBF0 +0000 +1F80 +1F80 +ENDCHAR +STARTCHAR uni1E36 +ENCODING 7734 +SWIDTH 722 0 +DWIDTH 12 0 +BBX 11 17 1 -3 +BITMAP +FC00 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7020 +7020 +7060 +70E0 +FFE0 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1E37 +ENCODING 7735 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 5 17 0 -3 +BITMAP +F0 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +00 +30 +30 +ENDCHAR +STARTCHAR uni1E38 +ENCODING 7736 +SWIDTH 722 0 +DWIDTH 12 0 +BBX 11 20 1 -3 +BITMAP +7E00 +7E00 +0000 +FC00 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7020 +7020 +7060 +70E0 +FFE0 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1E39 +ENCODING 7737 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 6 20 -1 -3 +BITMAP +FC +FC +00 +78 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +7C +00 +18 +18 +ENDCHAR +STARTCHAR uni1E3A +ENCODING 7738 +SWIDTH 722 0 +DWIDTH 12 0 +BBX 11 17 1 -3 +BITMAP +FC00 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7020 +7020 +7060 +70E0 +FFE0 +0000 +3F00 +3F00 +ENDCHAR +STARTCHAR uni1E3B +ENCODING 7739 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 6 17 0 -3 +BITMAP +F0 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +00 +FC +FC +ENDCHAR +STARTCHAR uni1E3C +ENCODING 7740 +SWIDTH 722 0 +DWIDTH 12 0 +BBX 11 19 1 -5 +BITMAP +FC00 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7000 +7020 +7020 +7060 +70E0 +FFE0 +0000 +0400 +0E00 +1F00 +3180 +ENDCHAR +STARTCHAR uni1E3D +ENCODING 7741 +SWIDTH 352 0 +DWIDTH 6 0 +BBX 7 19 -1 -5 +BITMAP +78 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +38 +7C +00 +10 +38 +7C +C6 +ENDCHAR +STARTCHAR uni1E3E +ENCODING 7742 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 17 19 1 0 +BITMAP +003000 +007000 +00E000 +018000 +000000 +7C0780 +3C0F00 +3E0F00 +2E1F00 +2F1700 +2F1700 +273700 +27A700 +23E700 +23C700 +23C700 +21C700 +718700 +F88F80 +ENDCHAR +STARTCHAR uni1E3F +ENCODING 7743 +SWIDTH 963 0 +DWIDTH 20 0 +BBX 19 14 0 0 +BITMAP +003000 +007000 +00E000 +018000 +000000 +F7DF80 +79F3C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +F9F3E0 +ENDCHAR +STARTCHAR uni1E40 +ENCODING 7744 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 17 17 1 0 +BITMAP +00C000 +00C000 +000000 +7C0780 +3C0F00 +3E0F00 +2E1F00 +2F1700 +2F1700 +273700 +27A700 +23E700 +23C700 +23C700 +21C700 +718700 +F88F80 +ENDCHAR +STARTCHAR uni1E41 +ENCODING 7745 +SWIDTH 963 0 +DWIDTH 20 0 +BBX 19 12 0 0 +BITMAP +00C000 +00C000 +000000 +F7DF80 +79F3C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +F9F3E0 +ENDCHAR +STARTCHAR uni1E42 +ENCODING 7746 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 17 17 1 -3 +BITMAP +7C0780 +3C0F00 +3E0F00 +2E1F00 +2F1700 +2F1700 +273700 +27A700 +23E700 +23C700 +23C700 +21C700 +718700 +F88F80 +000000 +00C000 +00C000 +ENDCHAR +STARTCHAR uni1E43 +ENCODING 7747 +SWIDTH 963 0 +DWIDTH 20 0 +BBX 19 12 0 -3 +BITMAP +F7DF80 +79F3C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +F9F3E0 +000000 +006000 +006000 +ENDCHAR +STARTCHAR uni1E44 +ENCODING 7748 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 17 1 0 +BITMAP +0300 +0300 +0000 +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +ENDCHAR +STARTCHAR uni1E45 +ENCODING 7749 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 12 0 0 +BITMAP +0600 +0600 +0000 +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +ENDCHAR +STARTCHAR uni1E46 +ENCODING 7750 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 17 1 -3 +BITMAP +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +0000 +0300 +0300 +ENDCHAR +STARTCHAR uni1E47 +ENCODING 7751 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 12 0 -3 +BITMAP +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E48 +ENCODING 7752 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 17 1 -3 +BITMAP +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +0000 +0FC0 +0FC0 +ENDCHAR +STARTCHAR uni1E49 +ENCODING 7753 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 12 0 -3 +BITMAP +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +0000 +1F80 +1F80 +ENDCHAR +STARTCHAR uni1E4A +ENCODING 7754 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 19 1 -5 +BITMAP +F83E +7C1C +3C08 +3E08 +2F08 +2788 +2388 +21C8 +21E8 +20E8 +2078 +2078 +7038 +F818 +0000 +0100 +0380 +07C0 +0C60 +ENDCHAR +STARTCHAR uni1E4B +ENCODING 7755 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 -5 +BITMAP +F7C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +0000 +0200 +0700 +0F80 +18C0 +ENDCHAR +STARTCHAR uni1E4C +ENCODING 7756 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 23 0 0 +BITMAP +0060 +00E0 +01C0 +0300 +0000 +0310 +07E0 +08C0 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni1E4D +ENCODING 7757 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 18 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +1880 +3F00 +4600 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1E4E +ENCODING 7758 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 21 0 0 +BITMAP +0660 +0660 +0000 +0310 +07E0 +08C0 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni1E4F +ENCODING 7759 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 16 0 0 +BITMAP +3300 +3300 +0000 +1880 +3F00 +4600 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1E50 +ENCODING 7760 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 22 0 0 +BITMAP +0600 +0700 +0380 +00C0 +0000 +07E0 +07E0 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni1E51 +ENCODING 7761 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 17 0 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +1F80 +1F80 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1E52 +ENCODING 7762 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 22 0 0 +BITMAP +0060 +00E0 +01C0 +0300 +0000 +07E0 +07E0 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni1E53 +ENCODING 7763 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 17 0 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +1F80 +1F80 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1E54 +ENCODING 7764 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 12 19 1 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +FFE0 +70F0 +7070 +7070 +7070 +70F0 +71E0 +7F80 +7000 +7000 +7000 +7000 +7000 +FC00 +ENDCHAR +STARTCHAR uni1E55 +ENCODING 7765 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 12 18 -1 -4 +BITMAP +0180 +0380 +0700 +0C00 +0000 +E780 +78E0 +7070 +7070 +7070 +7070 +7070 +78E0 +7780 +7000 +7000 +7000 +F800 +ENDCHAR +STARTCHAR uni1E56 +ENCODING 7766 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 12 17 1 0 +BITMAP +0600 +0600 +0000 +FFE0 +70F0 +7070 +7070 +7070 +70F0 +71E0 +7F80 +7000 +7000 +7000 +7000 +7000 +FC00 +ENDCHAR +STARTCHAR uni1E57 +ENCODING 7767 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 12 16 -1 -4 +BITMAP +0600 +0600 +0000 +E780 +78E0 +7070 +7070 +7070 +7070 +7070 +78E0 +7780 +7000 +7000 +7000 +F800 +ENDCHAR +STARTCHAR uni1E58 +ENCODING 7768 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 17 1 0 +BITMAP +0600 +0600 +0000 +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +ENDCHAR +STARTCHAR uni1E59 +ENCODING 7769 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 12 0 0 +BITMAP +18 +18 +00 +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +ENDCHAR +STARTCHAR uni1E5A +ENCODING 7770 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 17 1 -3 +BITMAP +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +0000 +0300 +0300 +ENDCHAR +STARTCHAR uni1E5B +ENCODING 7771 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 12 0 -3 +BITMAP +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +00 +30 +30 +ENDCHAR +STARTCHAR uni1E5C +ENCODING 7772 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 20 1 -3 +BITMAP +0FC0 +0FC0 +0000 +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +0000 +0300 +0300 +ENDCHAR +STARTCHAR uni1E5D +ENCODING 7773 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 15 0 -3 +BITMAP +7E +7E +00 +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +00 +30 +30 +ENDCHAR +STARTCHAR uni1E5E +ENCODING 7774 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 14 17 1 -3 +BITMAP +FFE0 +70F0 +7070 +7070 +70F0 +71E0 +7F80 +71C0 +71E0 +70E0 +70E0 +70F0 +7074 +F878 +0000 +0FC0 +0FC0 +ENDCHAR +STARTCHAR uni1E5F +ENCODING 7775 +SWIDTH 519 0 +DWIDTH 9 0 +BBX 8 12 0 -3 +BITMAP +F7 +7B +73 +70 +70 +70 +70 +70 +F8 +00 +FC +FC +ENDCHAR +STARTCHAR uni1E60 +ENCODING 7776 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 17 0 0 +BITMAP +0C00 +0C00 +0000 +3F40 +61C0 +C0C0 +C040 +E000 +FE00 +7FC0 +7FE0 +0FE0 +80E0 +8060 +C060 +E0C0 +BF80 +ENDCHAR +STARTCHAR uni1E61 +ENCODING 7777 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 12 0 0 +BITMAP +1800 +1800 +0000 +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +ENDCHAR +STARTCHAR uni1E62 +ENCODING 7778 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 17 0 -3 +BITMAP +3F40 +61C0 +C0C0 +C040 +E000 +FE00 +7FC0 +7FE0 +0FE0 +80E0 +8060 +C060 +E0C0 +BF80 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1E63 +ENCODING 7779 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 12 0 -3 +BITMAP +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +0000 +1800 +1800 +ENDCHAR +STARTCHAR uni1E64 +ENCODING 7780 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 22 0 0 +BITMAP +0600 +0600 +0000 +0300 +0700 +0E00 +1800 +0000 +3F40 +61C0 +C0C0 +C040 +E000 +FE00 +7FC0 +7FE0 +0FE0 +80E0 +8060 +C060 +E0C0 +BF80 +ENDCHAR +STARTCHAR uni1E65 +ENCODING 7781 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 17 0 0 +BITMAP +0C00 +0C00 +0000 +0600 +0E00 +1C00 +3000 +0000 +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +ENDCHAR +STARTCHAR uni1E66 +ENCODING 7782 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 10 17 0 0 +BITMAP +0C00 +0C00 +0000 +6180 +3300 +1E00 +0C00 +0000 +3F80 +7180 +7880 +7E00 +3F00 +0F80 +83C0 +C780 +BF00 +ENDCHAR +STARTCHAR uni1E67 +ENCODING 7783 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 17 0 0 +BITMAP +1800 +1800 +0000 +C300 +6600 +3C00 +1800 +0000 +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +ENDCHAR +STARTCHAR uni1E68 +ENCODING 7784 +SWIDTH 667 0 +DWIDTH 12 0 +BBX 11 20 0 -3 +BITMAP +0C00 +0C00 +0000 +3F40 +61C0 +C0C0 +C040 +E000 +FE00 +7FC0 +7FE0 +0FE0 +80E0 +8060 +C060 +E0C0 +BF80 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1E69 +ENCODING 7785 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 15 0 -3 +BITMAP +1800 +1800 +0000 +3D00 +6300 +E100 +FC00 +7F00 +0F80 +8380 +C300 +BE00 +0000 +1800 +1800 +ENDCHAR +STARTCHAR uni1E6A +ENCODING 7786 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 17 1 0 +BITMAP +0600 +0600 +0000 +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +1F00 +ENDCHAR +STARTCHAR uni1E6B +ENCODING 7787 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 16 0 0 +BITMAP +30 +30 +00 +10 +30 +30 +70 +FC +70 +70 +70 +70 +70 +72 +72 +3C +ENDCHAR +STARTCHAR uni1E6C +ENCODING 7788 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 17 1 -3 +BITMAP +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +1F00 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1E6D +ENCODING 7789 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 16 0 -3 +BITMAP +10 +30 +30 +70 +FC +70 +70 +70 +70 +70 +72 +72 +3C +00 +30 +30 +ENDCHAR +STARTCHAR uni1E6E +ENCODING 7790 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 17 1 -3 +BITMAP +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +1F00 +0000 +1F80 +1F80 +ENDCHAR +STARTCHAR uni1E6F +ENCODING 7791 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 16 0 -3 +BITMAP +10 +30 +30 +70 +FC +70 +70 +70 +70 +70 +72 +72 +3C +00 +FC +FC +ENDCHAR +STARTCHAR uni1E70 +ENCODING 7792 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 19 1 -5 +BITMAP +FFE0 +CE60 +CE60 +8E20 +8E20 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +0E00 +1F00 +0000 +0400 +0E00 +1F00 +3180 +ENDCHAR +STARTCHAR uni1E71 +ENCODING 7793 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 18 0 -5 +BITMAP +10 +30 +30 +70 +FC +70 +70 +70 +70 +70 +72 +72 +3C +00 +10 +38 +7C +C6 +ENDCHAR +STARTCHAR uni1E72 +ENCODING 7794 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 17 1 -3 +BITMAP +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +0000 +1980 +1980 +ENDCHAR +STARTCHAR uni1E73 +ENCODING 7795 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 12 0 -3 +BITMAP +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +0000 +1980 +1980 +ENDCHAR +STARTCHAR uni1E74 +ENCODING 7796 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 18 1 -4 +BITMAP +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +0000 +0C40 +1F80 +2300 +ENDCHAR +STARTCHAR uni1E75 +ENCODING 7797 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 13 0 -4 +BITMAP +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +0000 +0C40 +1F80 +2300 +ENDCHAR +STARTCHAR uni1E76 +ENCODING 7798 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 19 1 -5 +BITMAP +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +0000 +0200 +0700 +0F80 +18C0 +ENDCHAR +STARTCHAR uni1E77 +ENCODING 7799 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 14 0 -5 +BITMAP +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +0000 +0200 +0700 +0F80 +18C0 +ENDCHAR +STARTCHAR uni1E78 +ENCODING 7800 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 23 1 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +0620 +0FC0 +1180 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uni1E79 +ENCODING 7801 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 18 0 0 +BITMAP +0180 +0380 +0700 +0C00 +0000 +0C40 +1F80 +2300 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni1E7A +ENCODING 7802 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 20 1 0 +BITMAP +0CC0 +0CC0 +0000 +0FC0 +0FC0 +0000 +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +ENDCHAR +STARTCHAR uni1E7B +ENCODING 7803 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 15 0 0 +BITMAP +1980 +1980 +0000 +1F80 +1F80 +0000 +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni1E7C +ENCODING 7804 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 18 0 0 +BITMAP +0620 +0FC0 +1180 +0000 +F87C +7038 +7830 +3820 +3820 +3C60 +1C40 +1E40 +0EC0 +0E80 +0780 +0780 +0300 +0300 +ENDCHAR +STARTCHAR uni1E7D +ENCODING 7805 +SWIDTH 611 0 +DWIDTH 9 0 +BBX 10 13 -1 0 +BITMAP +1880 +3F00 +4600 +0000 +F9C0 +7080 +7080 +3900 +3900 +1E00 +1E00 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1E7E +ENCODING 7806 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 17 0 -3 +BITMAP +F87C +7038 +7830 +3820 +3820 +3C60 +1C40 +1E40 +0EC0 +0E80 +0780 +0780 +0300 +0300 +0000 +0300 +0300 +ENDCHAR +STARTCHAR uni1E7F +ENCODING 7807 +SWIDTH 611 0 +DWIDTH 9 0 +BBX 10 12 -1 -3 +BITMAP +F9C0 +7080 +7080 +3900 +3900 +1E00 +1E00 +0C00 +0C00 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR Wgrave +ENCODING 7808 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 19 19 0 0 +BITMAP +030000 +038000 +01C000 +006000 +000000 +FBF3E0 +71E1C0 +70E180 +78E100 +38F100 +39F300 +3D7200 +1D3A00 +1F3E00 +1E3C00 +0E1C00 +0E1C00 +0C1800 +040800 +ENDCHAR +STARTCHAR wgrave +ENCODING 7809 +SWIDTH 889 0 +DWIDTH 15 0 +BBX 16 14 -1 0 +BITMAP +0600 +0700 +0380 +00C0 +0000 +FBE7 +71C2 +71C2 +39E4 +39E4 +1E78 +1E78 +0C30 +0C30 +ENDCHAR +STARTCHAR Wacute +ENCODING 7810 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 19 19 0 0 +BITMAP +003000 +007000 +00E000 +018000 +000000 +FBF3E0 +71E1C0 +70E180 +78E100 +38F100 +39F300 +3D7200 +1D3A00 +1F3E00 +1E3C00 +0E1C00 +0E1C00 +0C1800 +040800 +ENDCHAR +STARTCHAR wacute +ENCODING 7811 +SWIDTH 889 0 +DWIDTH 15 0 +BBX 16 14 -1 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +FBE7 +71C2 +71C2 +39E4 +39E4 +1E78 +1E78 +0C30 +0C30 +ENDCHAR +STARTCHAR Wdieresis +ENCODING 7812 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 19 17 0 0 +BITMAP +033000 +033000 +000000 +FBF3E0 +71E1C0 +70E180 +78E100 +38F100 +39F300 +3D7200 +1D3A00 +1F3E00 +1E3C00 +0E1C00 +0E1C00 +0C1800 +040800 +ENDCHAR +STARTCHAR wdieresis +ENCODING 7813 +SWIDTH 889 0 +DWIDTH 15 0 +BBX 16 12 -1 0 +BITMAP +0CC0 +0CC0 +0000 +FBE7 +71C2 +71C2 +39E4 +39E4 +1E78 +1E78 +0C30 +0C30 +ENDCHAR +STARTCHAR uni1E86 +ENCODING 7814 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 19 17 0 0 +BITMAP +00C000 +00C000 +000000 +FBF3E0 +71E1C0 +70E180 +78E100 +38F100 +39F300 +3D7200 +1D3A00 +1F3E00 +1E3C00 +0E1C00 +0E1C00 +0C1800 +040800 +ENDCHAR +STARTCHAR uni1E87 +ENCODING 7815 +SWIDTH 889 0 +DWIDTH 15 0 +BBX 16 12 -1 0 +BITMAP +0300 +0300 +0000 +FBE7 +71C2 +71C2 +39E4 +39E4 +1E78 +1E78 +0C30 +0C30 +ENDCHAR +STARTCHAR uni1E88 +ENCODING 7816 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 19 17 0 -3 +BITMAP +FBF3E0 +71E1C0 +70E180 +78E100 +38F100 +39F300 +3D7200 +1D3A00 +1F3E00 +1E3C00 +0E1C00 +0E1C00 +0C1800 +040800 +000000 +00C000 +00C000 +ENDCHAR +STARTCHAR uni1E89 +ENCODING 7817 +SWIDTH 889 0 +DWIDTH 15 0 +BBX 16 12 -1 -3 +BITMAP +FBE7 +71C2 +71C2 +39E4 +39E4 +1E78 +1E78 +0C30 +0C30 +0000 +0180 +0180 +ENDCHAR +STARTCHAR uni1E8A +ENCODING 7818 +SWIDTH 722 0 +DWIDTH 17 0 +BBX 16 17 0 0 +BITMAP +0180 +0180 +0000 +7E3F +3C1C +1E18 +0E30 +0F60 +07C0 +03C0 +03E0 +06F0 +0C70 +1878 +303C +703E +F87F +ENDCHAR +STARTCHAR uni1E8B +ENCODING 7819 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 12 0 0 +BITMAP +0C00 +0C00 +0000 +FCE0 +78C0 +3D00 +1E00 +0E00 +0F00 +1780 +63C0 +E7E0 +ENDCHAR +STARTCHAR uni1E8C +ENCODING 7820 +SWIDTH 722 0 +DWIDTH 17 0 +BBX 16 17 0 0 +BITMAP +0660 +0660 +0000 +7E3F +3C1C +1E18 +0E30 +0F60 +07C0 +03C0 +03E0 +06F0 +0C70 +1878 +303C +703E +F87F +ENDCHAR +STARTCHAR uni1E8D +ENCODING 7821 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 12 0 0 +BITMAP +3300 +3300 +0000 +FCE0 +78C0 +3D00 +1E00 +0E00 +0F00 +1780 +63C0 +E7E0 +ENDCHAR +STARTCHAR uni1E8E +ENCODING 7822 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 17 1 0 +BITMAP +0600 +0600 +0000 +F878 +7030 +7820 +3860 +3C40 +1CC0 +1F80 +0F80 +0F00 +0700 +0700 +0700 +0700 +0F80 +ENDCHAR +STARTCHAR uni1E8F +ENCODING 7823 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 16 0 -4 +BITMAP +0C00 +0C00 +0000 +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +ENDCHAR +STARTCHAR uni1E90 +ENCODING 7824 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 11 19 1 0 +BITMAP +0400 +0E00 +1F00 +3180 +0000 +FFE0 +E1E0 +C1C0 +83C0 +8780 +0700 +0F00 +1E00 +1C00 +3C20 +7820 +7060 +F0E0 +FFE0 +ENDCHAR +STARTCHAR uni1E91 +ENCODING 7825 +SWIDTH 537 0 +DWIDTH 10 0 +BBX 8 14 0 0 +BITMAP +08 +1C +3E +63 +00 +FF +CF +8E +1C +38 +39 +71 +F3 +FF +ENDCHAR +STARTCHAR uni1E92 +ENCODING 7826 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 11 17 1 -3 +BITMAP +FFE0 +E1E0 +C1C0 +83C0 +8780 +0700 +0F00 +1E00 +1C00 +3C20 +7820 +7060 +F0E0 +FFE0 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1E93 +ENCODING 7827 +SWIDTH 537 0 +DWIDTH 10 0 +BBX 8 12 0 -3 +BITMAP +FF +CF +8E +1C +38 +39 +71 +F3 +FF +00 +18 +18 +ENDCHAR +STARTCHAR uni1E94 +ENCODING 7828 +SWIDTH 667 0 +DWIDTH 13 0 +BBX 11 17 1 -3 +BITMAP +FFE0 +E1E0 +C1C0 +83C0 +8780 +0700 +0F00 +1E00 +1C00 +3C20 +7820 +7060 +F0E0 +FFE0 +0000 +3F00 +3F00 +ENDCHAR +STARTCHAR uni1E95 +ENCODING 7829 +SWIDTH 537 0 +DWIDTH 10 0 +BBX 8 12 0 -3 +BITMAP +FF +CF +8E +1C +38 +39 +71 +F3 +FF +00 +7E +7E +ENDCHAR +STARTCHAR uni1E96 +ENCODING 7830 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 17 0 -3 +BITMAP +F000 +7000 +7000 +7000 +7000 +77C0 +79E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +F9F0 +0000 +1F80 +1F80 +ENDCHAR +STARTCHAR uni1E97 +ENCODING 7831 +SWIDTH 426 0 +DWIDTH 8 0 +BBX 7 16 0 0 +BITMAP +CC +CC +00 +10 +30 +30 +70 +FC +70 +70 +70 +70 +70 +72 +72 +3C +ENDCHAR +STARTCHAR uni1E98 +ENCODING 7832 +SWIDTH 889 0 +DWIDTH 15 0 +BBX 16 14 -1 0 +BITMAP +0300 +0480 +0480 +0300 +0000 +FBE7 +71C2 +71C2 +39E4 +39E4 +1E78 +1E78 +0C30 +0C30 +ENDCHAR +STARTCHAR uni1E99 +ENCODING 7833 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 18 0 -4 +BITMAP +0C00 +1200 +1200 +0C00 +0000 +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +ENDCHAR +STARTCHAR uni1EA0 +ENCODING 7840 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 17 0 -3 +BITMAP +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +0000 +0180 +0180 +ENDCHAR +STARTCHAR uni1EA1 +ENCODING 7841 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 12 0 -3 +BITMAP +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EA4 +ENCODING 7844 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 23 0 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +0380 +07C0 +0C60 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni1EA5 +ENCODING 7845 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 18 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +1C00 +3E00 +6300 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni1EA6 +ENCODING 7846 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 23 0 0 +BITMAP +0C00 +0E00 +0700 +0180 +0000 +0380 +07C0 +0C60 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni1EA7 +ENCODING 7847 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 18 0 0 +BITMAP +3000 +3800 +1C00 +0600 +0000 +1C00 +3E00 +6300 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni1EAA +ENCODING 7850 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 22 0 0 +BITMAP +0310 +07E0 +08C0 +0000 +0380 +07C0 +0C60 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni1EAB +ENCODING 7851 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 17 0 0 +BITMAP +1880 +3F00 +4600 +0000 +1C00 +3E00 +6300 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni1EAC +ENCODING 7852 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 22 0 -3 +BITMAP +0200 +0700 +0F80 +18C0 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +0000 +0180 +0180 +ENDCHAR +STARTCHAR uni1EAD +ENCODING 7853 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 17 0 -3 +BITMAP +0400 +0E00 +1F00 +3180 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EAE +ENCODING 7854 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 23 0 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +0840 +0CC0 +0780 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni1EAF +ENCODING 7855 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 18 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +2100 +3300 +1E00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni1EB0 +ENCODING 7856 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 23 0 0 +BITMAP +0C00 +0E00 +0700 +0180 +0000 +0840 +0CC0 +0780 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni1EB1 +ENCODING 7857 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 18 0 0 +BITMAP +3000 +3800 +1C00 +0600 +0000 +2100 +3300 +1E00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni1EB4 +ENCODING 7860 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 22 0 0 +BITMAP +0620 +0FC0 +1180 +0000 +0840 +0CC0 +0780 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni1EB5 +ENCODING 7861 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 17 0 0 +BITMAP +1880 +3F00 +4600 +0000 +2100 +3300 +1E00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +ENDCHAR +STARTCHAR uni1EB6 +ENCODING 7862 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 21 0 -3 +BITMAP +0840 +0CC0 +0780 +0000 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +0000 +0180 +0180 +ENDCHAR +STARTCHAR uni1EB7 +ENCODING 7863 +SWIDTH 611 0 +DWIDTH 11 0 +BBX 10 16 0 -3 +BITMAP +2100 +3300 +1E00 +0000 +7F00 +E380 +C380 +0780 +3B80 +E380 +E380 +E780 +7BC0 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EB8 +ENCODING 7864 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 17 1 -3 +BITMAP +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EB9 +ENCODING 7865 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 12 0 -3 +BITMAP +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EBC +ENCODING 7868 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 18 1 0 +BITMAP +0C40 +1F80 +2300 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR uni1EBD +ENCODING 7869 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 13 0 0 +BITMAP +1880 +3F00 +4600 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR uni1EBE +ENCODING 7870 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 23 1 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +0E00 +1F00 +3180 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR uni1EBF +ENCODING 7871 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 18 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +0E00 +1F00 +3180 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR uni1EC0 +ENCODING 7872 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 23 1 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +0E00 +1F00 +3180 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR uni1EC1 +ENCODING 7873 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 18 0 0 +BITMAP +3000 +3800 +1C00 +0600 +0000 +0E00 +1F00 +3180 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR uni1EC4 +ENCODING 7876 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 22 1 0 +BITMAP +0C40 +1F80 +2300 +0000 +0E00 +1F00 +3180 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +ENDCHAR +STARTCHAR uni1EC5 +ENCODING 7877 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 17 0 0 +BITMAP +0C40 +1F80 +2300 +0000 +0E00 +1F00 +3180 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +ENDCHAR +STARTCHAR uni1EC6 +ENCODING 7878 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 22 1 -3 +BITMAP +0400 +0E00 +1F00 +3180 +0000 +FFE0 +70E0 +7060 +7120 +7120 +7300 +7F00 +7300 +7100 +7120 +7020 +7060 +70E0 +FFE0 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1EC7 +ENCODING 7879 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 10 17 0 -3 +BITMAP +0400 +0E00 +1F00 +3180 +0000 +1E00 +7380 +E1C0 +E1C0 +FFC0 +E000 +E040 +70C0 +1F00 +0000 +0C00 +0C00 +ENDCHAR +STARTCHAR uni1ECA +ENCODING 7882 +SWIDTH 444 0 +DWIDTH 9 0 +BBX 5 17 2 -3 +BITMAP +F8 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +70 +F8 +00 +30 +30 +ENDCHAR +STARTCHAR uni1ECB +ENCODING 7883 +SWIDTH 370 0 +DWIDTH 6 0 +BBX 5 17 0 -3 +BITMAP +70 +70 +70 +00 +00 +F0 +70 +70 +70 +70 +70 +70 +70 +F8 +00 +30 +30 +ENDCHAR +STARTCHAR uni1ECC +ENCODING 7884 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 17 0 -3 +BITMAP +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +0000 +0180 +0180 +ENDCHAR +STARTCHAR uni1ECD +ENCODING 7885 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 12 0 -3 +BITMAP +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1ED0 +ENCODING 7888 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 23 0 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +0380 +07C0 +0C60 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni1ED1 +ENCODING 7889 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 18 0 0 +BITMAP +0300 +0700 +0E00 +1800 +0000 +0E00 +1F00 +3180 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1ED2 +ENCODING 7890 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 23 0 0 +BITMAP +0600 +0700 +0380 +00C0 +0000 +0380 +07C0 +0C60 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni1ED3 +ENCODING 7891 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 18 0 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +0E00 +1F00 +3180 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1ED6 +ENCODING 7894 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 22 0 0 +BITMAP +0310 +07E0 +08C0 +0000 +0380 +07C0 +0C60 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +ENDCHAR +STARTCHAR uni1ED7 +ENCODING 7895 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 17 0 0 +BITMAP +0C40 +1F80 +2300 +0000 +0E00 +1F00 +3180 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1ED8 +ENCODING 7896 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 22 0 -3 +BITMAP +0100 +0380 +07C0 +0C60 +0000 +0FE0 +3C78 +783C +701C +F01E +E00E +E00E +E00E +E00E +F01E +701C +783C +3C78 +0FE0 +0000 +0180 +0180 +ENDCHAR +STARTCHAR uni1ED9 +ENCODING 7897 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 17 0 -3 +BITMAP +0400 +0E00 +1F00 +3180 +0000 +1F00 +71C0 +E0E0 +E0E0 +E0E0 +E0E0 +E0E0 +71C0 +1F00 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1EDA +ENCODING 7898 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 18 19 0 0 +BITMAP +001800 +003800 +007000 +00C000 +000000 +0FE180 +3C7BC0 +783FC0 +701DC0 +F01E80 +E00F00 +E00E00 +E00E00 +E00E00 +F01E00 +701C00 +783C00 +3C7800 +0FE000 +ENDCHAR +STARTCHAR uni1EDB +ENCODING 7899 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 14 14 0 0 +BITMAP +00C0 +01C0 +0380 +0600 +0000 +1F18 +71FC +E0FC +E0FC +E0E8 +E0F0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1EDC +ENCODING 7900 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 18 19 0 0 +BITMAP +018000 +01C000 +00E000 +003000 +000000 +0FE180 +3C7BC0 +783FC0 +701DC0 +F01E80 +E00F00 +E00E00 +E00E00 +E00E00 +F01E00 +701C00 +783C00 +3C7800 +0FE000 +ENDCHAR +STARTCHAR uni1EDD +ENCODING 7901 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 14 14 0 0 +BITMAP +0600 +0700 +0380 +00C0 +0000 +1F18 +71FC +E0FC +E0FC +E0E8 +E0F0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1EE0 +ENCODING 7904 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 18 18 0 0 +BITMAP +00C400 +01F800 +023000 +000000 +0FE180 +3C7BC0 +783FC0 +701DC0 +F01E80 +E00F00 +E00E00 +E00E00 +E00E00 +F01E00 +701C00 +783C00 +3C7800 +0FE000 +ENDCHAR +STARTCHAR uni1EE1 +ENCODING 7905 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 14 13 0 0 +BITMAP +0310 +07E0 +08C0 +0000 +1F18 +71FC +E0FC +E0FC +E0E8 +E0F0 +E0E0 +71C0 +1F00 +ENDCHAR +STARTCHAR uni1EE2 +ENCODING 7906 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 18 17 0 -3 +BITMAP +0FE180 +3C7BC0 +783FC0 +701DC0 +F01E80 +E00F00 +E00E00 +E00E00 +E00E00 +F01E00 +701C00 +783C00 +3C7800 +0FE000 +000000 +018000 +018000 +ENDCHAR +STARTCHAR uni1EE3 +ENCODING 7907 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 14 12 0 -3 +BITMAP +1F18 +71FC +E0FC +E0FC +E0E8 +E0F0 +E0E0 +71C0 +1F00 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1EE4 +ENCODING 7908 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 14 17 1 -3 +BITMAP +F87C +7038 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +7010 +3820 +1FC0 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1EE5 +ENCODING 7909 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 12 12 0 -3 +BITMAP +F1E0 +70E0 +70E0 +70E0 +70E0 +70E0 +70E0 +79E0 +3EF0 +0000 +0600 +0600 +ENDCHAR +STARTCHAR uni1EE8 +ENCODING 7912 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 17 19 1 0 +BITMAP +003000 +007000 +00E000 +018000 +000000 +F87F00 +703F80 +701780 +701380 +701100 +701200 +701400 +701000 +701000 +701000 +701000 +701000 +382000 +1FC000 +ENDCHAR +STARTCHAR uni1EE9 +ENCODING 7913 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 15 14 0 0 +BITMAP +0060 +00E0 +01C0 +0300 +0000 +F1EC +70FE +70FE +70EE +70E4 +70E8 +70F0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni1EEA +ENCODING 7914 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 17 19 1 0 +BITMAP +030000 +038000 +01C000 +006000 +000000 +F87F00 +703F80 +701780 +701380 +701100 +701200 +701400 +701000 +701000 +701000 +701000 +701000 +382000 +1FC000 +ENDCHAR +STARTCHAR uni1EEB +ENCODING 7915 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 15 14 0 0 +BITMAP +0600 +0700 +0380 +00C0 +0000 +F1EC +70FE +70FE +70EE +70E4 +70E8 +70F0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni1EEE +ENCODING 7918 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 17 18 1 0 +BITMAP +018800 +03F000 +046000 +000000 +F87F00 +703F80 +701780 +701380 +701100 +701200 +701400 +701000 +701000 +701000 +701000 +701000 +382000 +1FC000 +ENDCHAR +STARTCHAR uni1EEF +ENCODING 7919 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 15 13 0 0 +BITMAP +0310 +07E0 +08C0 +0000 +F1EC +70FE +70FE +70EE +70E4 +70E8 +70F0 +79E0 +3EF0 +ENDCHAR +STARTCHAR uni1EF0 +ENCODING 7920 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 17 17 1 -3 +BITMAP +F87F00 +703F80 +701780 +701380 +701100 +701200 +701400 +701000 +701000 +701000 +701000 +701000 +382000 +1FC000 +000000 +030000 +030000 +ENDCHAR +STARTCHAR uni1EF1 +ENCODING 7921 +SWIDTH 685 0 +DWIDTH 13 0 +BBX 15 12 0 -3 +BITMAP +F1EC +70FE +70FE +70EE +70E4 +70E8 +70F0 +79E0 +3EF0 +0000 +0300 +0300 +ENDCHAR +STARTCHAR Ygrave +ENCODING 7922 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 19 1 0 +BITMAP +1800 +1C00 +0E00 +0300 +0000 +F878 +7030 +7820 +3860 +3C40 +1CC0 +1F80 +0F80 +0F00 +0700 +0700 +0700 +0700 +0F80 +ENDCHAR +STARTCHAR ygrave +ENCODING 7923 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 18 0 -4 +BITMAP +3000 +3800 +1C00 +0600 +0000 +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +ENDCHAR +STARTCHAR uni1EF4 +ENCODING 7924 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 17 1 -3 +BITMAP +F878 +7030 +7820 +3860 +3C40 +1CC0 +1F80 +0F80 +0F00 +0700 +0700 +0700 +0700 +0F80 +0000 +0300 +0300 +ENDCHAR +STARTCHAR uni1EF5 +ENCODING 7925 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 16 0 -7 +BITMAP +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +0000 +1800 +1800 +ENDCHAR +STARTCHAR uni1EF8 +ENCODING 7928 +SWIDTH 722 0 +DWIDTH 15 0 +BBX 13 18 1 0 +BITMAP +0C40 +1F80 +2300 +0000 +F878 +7030 +7820 +3860 +3C40 +1CC0 +1F80 +0F80 +0F00 +0700 +0700 +0700 +0700 +0F80 +ENDCHAR +STARTCHAR uni1EF9 +ENCODING 7929 +SWIDTH 611 0 +DWIDTH 12 0 +BBX 11 17 0 -4 +BITMAP +1880 +3F00 +4600 +0000 +F8E0 +7040 +7040 +3880 +3880 +1D00 +1D00 +0E00 +0E00 +0400 +C400 +E800 +7000 +ENDCHAR +STARTCHAR uni2000 +ENCODING 8192 +SWIDTH 500 0 +DWIDTH 9 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2001 +ENCODING 8193 +SWIDTH 1000 0 +DWIDTH 19 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2002 +ENCODING 8194 +SWIDTH 500 0 +DWIDTH 9 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2003 +ENCODING 8195 +SWIDTH 1000 0 +DWIDTH 19 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2004 +ENCODING 8196 +SWIDTH 333 0 +DWIDTH 6 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2005 +ENCODING 8197 +SWIDTH 250 0 +DWIDTH 5 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2006 +ENCODING 8198 +SWIDTH 167 0 +DWIDTH 3 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2007 +ENCODING 8199 +SWIDTH 574 0 +DWIDTH 11 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2008 +ENCODING 8200 +SWIDTH 278 0 +DWIDTH 5 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2009 +ENCODING 8201 +SWIDTH 200 0 +DWIDTH 4 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni200A +ENCODING 8202 +SWIDTH 100 0 +DWIDTH 2 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni200B +ENCODING 8203 +SWIDTH 0 0 +DWIDTH 0 0 +BBX 1 1 0 0 +BITMAP +00 +ENDCHAR +STARTCHAR uni2010 +ENCODING 8208 +SWIDTH 333 0 +DWIDTH 6 0 +BBX 5 2 0 4 +BITMAP +F8 +F8 +ENDCHAR +STARTCHAR uni2011 +ENCODING 8209 +SWIDTH 333 0 +DWIDTH 6 0 +BBX 5 2 0 4 +BITMAP +F8 +F8 +ENDCHAR +STARTCHAR figuredash +ENCODING 8210 +SWIDTH 500 0 +DWIDTH 9 0 +BBX 9 2 0 4 +BITMAP +FF80 +FF80 +ENDCHAR +STARTCHAR endash +ENCODING 8211 +SWIDTH 500 0 +DWIDTH 9 0 +BBX 9 2 0 4 +BITMAP +FF80 +FF80 +ENDCHAR +STARTCHAR emdash +ENCODING 8212 +SWIDTH 1000 0 +DWIDTH 18 0 +BBX 18 2 0 4 +BITMAP +FFFFC0 +FFFFC0 +ENDCHAR +STARTCHAR afii00208 +ENCODING 8213 +SWIDTH 1000 0 +DWIDTH 18 0 +BBX 18 2 0 4 +BITMAP +FFFFC0 +FFFFC0 +ENDCHAR +STARTCHAR quoteleft +ENCODING 8216 +SWIDTH 241 0 +DWIDTH 5 0 +BBX 4 7 0 7 +BITMAP +10 +20 +40 +E0 +F0 +F0 +60 +ENDCHAR +STARTCHAR quoteright +ENCODING 8217 +SWIDTH 241 0 +DWIDTH 5 0 +BBX 4 7 0 7 +BITMAP +60 +F0 +F0 +70 +20 +40 +80 +ENDCHAR +STARTCHAR quotesinglbase +ENCODING 8218 +SWIDTH 241 0 +DWIDTH 6 0 +BBX 4 7 1 -3 +BITMAP +60 +F0 +F0 +70 +20 +40 +80 +ENDCHAR +STARTCHAR quotereversed +ENCODING 8219 +SWIDTH 241 0 +DWIDTH 5 0 +BBX 4 7 0 7 +BITMAP +60 +F0 +F0 +E0 +40 +20 +10 +ENDCHAR +STARTCHAR quotedblleft +ENCODING 8220 +SWIDTH 481 0 +DWIDTH 10 0 +BBX 9 7 0 7 +BITMAP +1080 +2100 +4200 +E700 +F780 +F780 +6300 +ENDCHAR +STARTCHAR quotedblright +ENCODING 8221 +SWIDTH 481 0 +DWIDTH 10 0 +BBX 9 7 0 7 +BITMAP +6300 +F780 +F780 +7380 +2100 +4200 +8400 +ENDCHAR +STARTCHAR quotedblbase +ENCODING 8222 +SWIDTH 481 0 +DWIDTH 11 0 +BBX 9 7 1 -3 +BITMAP +6300 +F780 +F780 +7380 +2100 +4200 +8400 +ENDCHAR +STARTCHAR uni201F +ENCODING 8223 +SWIDTH 481 0 +DWIDTH 10 0 +BBX 9 7 0 7 +BITMAP +6300 +F780 +F780 +E700 +4200 +2100 +1080 +ENDCHAR +STARTCHAR dagger +ENCODING 8224 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 16 0 -2 +BITMAP +1C00 +1C00 +0800 +C980 +FF80 +C980 +0800 +1C00 +1C00 +0800 +0800 +0800 +0800 +0800 +0800 +0800 +ENDCHAR +STARTCHAR daggerdbl +ENCODING 8225 +SWIDTH 500 0 +DWIDTH 10 0 +BBX 9 16 0 -2 +BITMAP +1C00 +1C00 +0800 +C980 +FF80 +C980 +0800 +1C00 +1C00 +0800 +C980 +FF80 +C980 +0800 +1C00 +1C00 +ENDCHAR +STARTCHAR bullet +ENCODING 8226 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 6 6 2 4 +BITMAP +78 +FC +FC +FC +FC +78 +ENDCHAR +STARTCHAR ellipsis +ENCODING 8230 +SWIDTH 1000 0 +DWIDTH 18 0 +BBX 16 4 1 0 +BITMAP +6186 +F3CF +F3CF +6186 +ENDCHAR +STARTCHAR perthousand +ENCODING 8240 +SWIDTH 1000 0 +DWIDTH 22 0 +BBX 21 15 0 -1 +BITMAP +38C000 +674000 +C4C000 +C48000 +C58000 +C90000 +730000 +023870 +0664C8 +04C588 +0CC588 +08C588 +18C990 +1070E0 +100000 +ENDCHAR +STARTCHAR guilsinglleft +ENCODING 8249 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 4 5 0 3 +BITMAP +30 +60 +C0 +60 +30 +ENDCHAR +STARTCHAR guilsinglright +ENCODING 8250 +SWIDTH 333 0 +DWIDTH 5 0 +BBX 4 5 0 3 +BITMAP +C0 +60 +30 +60 +C0 +ENDCHAR +STARTCHAR fraction +ENCODING 8260 +SWIDTH 167 0 +DWIDTH 3 0 +BBX 8 14 -3 0 +BITMAP +03 +03 +06 +06 +0C +0C +18 +18 +30 +30 +60 +60 +C0 +C0 +ENDCHAR +STARTCHAR oneinferior +ENCODING 8321 +SWIDTH 344 0 +DWIDTH 6 0 +BBX 6 8 0 -4 +BITMAP +30 +F0 +30 +30 +30 +30 +30 +FC +ENDCHAR +STARTCHAR twoinferior +ENCODING 8322 +SWIDTH 344 0 +DWIDTH 6 0 +BBX 6 8 0 -4 +BITMAP +78 +CC +CC +18 +30 +60 +C4 +FC +ENDCHAR +STARTCHAR threeinferior +ENCODING 8323 +SWIDTH 344 0 +DWIDTH 6 0 +BBX 6 8 0 -4 +BITMAP +78 +CC +0C +38 +0C +CC +CC +78 +ENDCHAR +STARTCHAR uni20A5 +ENCODING 8357 +SWIDTH 963 0 +DWIDTH 20 0 +BBX 19 14 0 -2 +BITMAP +001800 +001800 +001800 +F7FF80 +79F3C0 +70F1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +70E1C0 +F9F3E0 +018000 +018000 +ENDCHAR +STARTCHAR uni20A6 +ENCODING 8358 +SWIDTH 833 0 +DWIDTH 16 0 +BBX 15 14 1 0 +BITMAP +F83E +7C1C +3C08 +3E08 +3FF8 +3FF8 +2388 +21C8 +3FF8 +3FF8 +2078 +2078 +7038 +F818 +ENDCHAR +STARTCHAR uni20A9 +ENCODING 8361 +SWIDTH 981 0 +DWIDTH 19 0 +BBX 19 14 0 0 +BITMAP +FBF3E0 +71E1C0 +70E180 +78E100 +3FFD00 +3FFF00 +3D7200 +1D3A00 +1FFE00 +1FFC00 +0E1C00 +0E1C00 +0C1800 +040800 +ENDCHAR +STARTCHAR Euro +ENCODING 8364 +SWIDTH 778 0 +DWIDTH 14 0 +BBX 14 14 -1 0 +BITMAP +03E4 +0F1C +1E0C +1C0C +FF84 +FF84 +3800 +3800 +FF80 +FF84 +1C04 +1E08 +0F18 +03E0 +ENDCHAR +STARTCHAR uni20AD +ENCODING 8365 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 15 14 1 0 +BITMAP +FC7C +7030 +7060 +70C0 +7180 +7300 +FFFE +FFFE +7BC0 +71E0 +70F0 +70F8 +707C +FCFE +ENDCHAR +STARTCHAR uni2103 +ENCODING 8451 +SWIDTH 1158 0 +DWIDTH 21 0 +BBX 20 14 0 0 +BITMAP +780F90 +CC3C70 +847830 +847030 +CCF010 +78E010 +00E000 +00E000 +00E000 +00F010 +007010 +007820 +003C60 +000F80 +ENDCHAR +STARTCHAR uni2109 +ENCODING 8457 +SWIDTH 1102 0 +DWIDTH 20 0 +BBX 19 14 0 0 +BITMAP +78FFE0 +CC70E0 +847060 +847120 +CC7120 +787320 +007F00 +007300 +007100 +007100 +007000 +007000 +007000 +00F800 +ENDCHAR +STARTCHAR trademark +ENCODING 8482 +SWIDTH 1000 0 +DWIDTH 20 0 +BBX 19 8 0 6 +BITMAP +FFF1E0 +9971C0 +185AC0 +185AC0 +185AC0 +184CC0 +184CC0 +3CEDE0 +ENDCHAR +STARTCHAR uni212A +ENCODING 8490 +SWIDTH 815 0 +DWIDTH 16 0 +BBX 15 14 1 0 +BITMAP +FC7C +7030 +7060 +70C0 +7180 +7300 +7780 +7FC0 +7BC0 +71E0 +70F0 +70F8 +707C +FCFE +ENDCHAR +STARTCHAR uni212B +ENCODING 8491 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 18 0 0 +BITMAP +0300 +0480 +0480 +0300 +0300 +0300 +0780 +0780 +0F80 +09C0 +09C0 +19E0 +10E0 +3FE0 +20F0 +6070 +4078 +E0FC +ENDCHAR +STARTCHAR uni2132 +ENCODING 8498 +SWIDTH 722 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +03E0 +01C0 +01C0 +01C0 +11C0 +11C0 +19C0 +1FC0 +99C0 +91C0 +91C0 +C1C0 +E1C0 +FFE0 +ENDCHAR +STARTCHAR universal +ENCODING 8704 +SWIDTH 759 0 +DWIDTH 14 0 +BBX 14 14 0 0 +BITMAP +E0FC +4078 +6070 +20F0 +3FE0 +10E0 +19E0 +09C0 +09C0 +0F80 +0780 +0780 +0300 +0300 +ENDCHAR +STARTCHAR existential +ENCODING 8707 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +FFE0 +E1C0 +C1C0 +91C0 +91C0 +19C0 +1FC0 +19C0 +11C0 +91C0 +81C0 +C1C0 +E1C0 +FFE0 +ENDCHAR +STARTCHAR uni2204 +ENCODING 8708 +SWIDTH 759 0 +DWIDTH 13 0 +BBX 11 14 1 0 +BITMAP +FFE0 +E1C0 +C1C0 +93C0 +93C0 +1BC0 +1FC0 +1FC0 +17C0 +9DC0 +8DC0 +CDC0 +F9C0 +FFE0 +ENDCHAR +STARTCHAR minus +ENCODING 8722 +SWIDTH 606 0 +DWIDTH 10 0 +BBX 9 2 0 4 +BITMAP +FF80 +FF80 +ENDCHAR +STARTCHAR fraction +ENCODING 8725 +SWIDTH 167 0 +DWIDTH 3 0 +BBX 8 14 -3 0 +BITMAP +03 +03 +06 +06 +0C +0C +18 +18 +30 +30 +60 +60 +C0 +C0 +ENDCHAR +STARTCHAR periodcentered +ENCODING 8729 +SWIDTH 278 0 +DWIDTH 5 0 +BBX 4 4 0 3 +BITMAP +60 +F0 +F0 +60 +ENDCHAR +STARTCHAR uni2236 +ENCODING 8758 +SWIDTH 278 0 +DWIDTH 6 0 +BBX 4 9 1 0 +BITMAP +60 +F0 +F0 +60 +00 +60 +F0 +F0 +60 +ENDCHAR +STARTCHAR uni2259 +ENCODING 8793 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 9 11 1 2 +BITMAP +0800 +1C00 +3E00 +6300 +0000 +FF80 +FF80 +0000 +0000 +FF80 +FF80 +ENDCHAR +STARTCHAR uni225A +ENCODING 8794 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 9 11 1 2 +BITMAP +6300 +3E00 +1C00 +0800 +0000 +FF80 +FF80 +0000 +0000 +FF80 +FF80 +ENDCHAR +STARTCHAR notequal +ENCODING 8800 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 9 14 1 -2 +BITMAP +0300 +0300 +0300 +0600 +FF80 +FF80 +0C00 +0C00 +FF80 +FF80 +1800 +1800 +3000 +3000 +ENDCHAR +STARTCHAR equivalence +ENCODING 8801 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 9 8 0 1 +BITMAP +FF80 +FF80 +0000 +FF80 +FF80 +0000 +FF80 +FF80 +ENDCHAR +STARTCHAR uni2262 +ENCODING 8802 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 9 14 0 -2 +BITMAP +0300 +0300 +0300 +FF80 +FF80 +0600 +FF80 +FF80 +0C00 +FF80 +FF80 +1800 +3000 +3000 +ENDCHAR +STARTCHAR lessequal +ENCODING 8804 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 13 0 -3 +BITMAP +00C0 +03C0 +0F00 +3C00 +F000 +F000 +3C00 +0F00 +03C0 +00C0 +0000 +FFC0 +FFC0 +ENDCHAR +STARTCHAR greaterequal +ENCODING 8805 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 13 0 -3 +BITMAP +C000 +F000 +3C00 +0F00 +03C0 +03C0 +0F00 +3C00 +F000 +C000 +0000 +FFC0 +FFC0 +ENDCHAR +STARTCHAR uni226E +ENCODING 8814 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 14 0 -2 +BITMAP +0300 +0300 +03C0 +07C0 +0F00 +3E00 +FC00 +FC00 +3C00 +1F00 +1BC0 +18C0 +3000 +3000 +ENDCHAR +STARTCHAR uni226F +ENCODING 8815 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 14 0 -2 +BITMAP +0300 +0300 +C300 +F600 +3E00 +0F00 +0FC0 +0FC0 +0F00 +3C00 +F800 +D800 +3000 +3000 +ENDCHAR +STARTCHAR uni2270 +ENCODING 8816 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 14 0 -3 +BITMAP +0300 +03C0 +03C0 +0F00 +3E00 +F600 +FC00 +3C00 +0F00 +1BC0 +18C0 +1800 +FFC0 +FFC0 +ENDCHAR +STARTCHAR uni2271 +ENCODING 8817 +SWIDTH 606 0 +DWIDTH 11 0 +BBX 10 14 0 -3 +BITMAP +0300 +C300 +F300 +3E00 +0F00 +07C0 +0FC0 +0F00 +3C00 +F800 +D800 +1800 +FFC0 +FFC0 +ENDCHAR +STARTCHAR fi +ENCODING -1 +SWIDTH 685 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +0F80 +39C0 +31C0 +7000 +7000 +FFC0 +71C0 +71C0 +71C0 +71C0 +71C0 +71C0 +71C0 +FBE0 +ENDCHAR +STARTCHAR fl +ENCODING -1 +SWIDTH 685 0 +DWIDTH 12 0 +BBX 11 14 0 0 +BITMAP +1EC0 +33C0 +71C0 +71C0 +71C0 +FFC0 +71C0 +71C0 +71C0 +71C0 +71C0 +71C0 +71C0 +FBE0 +ENDCHAR +ENDFONT diff --git a/bertos/fonts/ncenB18.c b/bertos/fonts/ncenB18.c new file mode 100644 index 0000000..3a1f815 --- /dev/null +++ b/bertos/fonts/ncenB18.c @@ -0,0 +1,1508 @@ +/* Generated by convbdf on Thu Apr 8 18:53:54 CEST 2010. */ +#include + +/* Font information: + + name: -Adobe-New Century Schoolbook-Bold-R-Normal--18-180-75-75-P-113-ISO10646-1 + pixel size: 18 + ascent: 16 + descent: 4 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_ncenB18_glyphs[] = { + +/* Character (0x00): bbw=13, bbh=13, bbx=1, bby=0, width=16 */ +0x00, 0xa8, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0x08, 0x00, 0xa8, 0x00, 0x00, /* * * * * * * * * * * * */ +0x00, 0xaa, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0x80, 0x00, 0xaa, 0x00, 0x00, /* * * * * * * * * * * * * * * * * * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * * * * * * * * * * * * */ + +/* Character (0x20): bbw=1, bbh=1, bbx=0, bby=0, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0x21): bbw=4, bbh=14, bbx=1, bby=0, width=6 */ +0x00, 0xf8, 0xfc, 0xfc, 0xf8, 0x00, /* ***** ****** ****** ***** */ +0x00, 0x60, 0xf7, 0xf7, 0x60, 0x00, /* ***** ****** ****** ***** ** *** ******* **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ****** ****** ***** ** *** ******* **** ** */ + +/* Character (0x22): bbw=5, bbh=5, bbx=1, bby=9, width=8 */ +0x00, 0x7c, 0x7c, 0x00, 0x7c, 0x7c, 0x00, 0x00, /* ***** ***** ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** ***** ***** */ + +/* Character (0x23): bbw=11, bbh=13, bbx=0, bby=0, width=12 */ +0x00, 0xc0, 0xc0, 0xc0, 0xf8, 0xf8, 0xc0, 0xf8, 0xf8, 0xc0, 0xc0, 0x00, /* ** ** ** ***** ***** ** ***** ***** ** ** */ +0x0c, 0x0c, 0xfc, 0xff, 0x0f, 0xfc, 0xff, 0x0f, 0x0c, 0x0c, 0x00, 0x00, /* ** ** ** ***** ***** ** ***** ***** ** ** ** ** ****************** ****************** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ***** ***** ** ***** ***** ** ** ** ** ****************** ****************** ** ** */ + +/* Character (0x24): bbw=9, bbh=18, bbx=1, bby=-2, width=11 */ +0x00, 0xf0, 0xf8, 0xcc, 0x84, 0xff, 0x04, 0x0c, 0x38, 0x38, 0x00, /* **** ***** ** ** * ********* * ** *** *** */ +0x00, 0x70, 0xf1, 0xc3, 0x83, 0xff, 0x87, 0xcf, 0xfe, 0x7c, 0x00, /* **** ***** ** ** * ********* * ** *** *** *** * ****** **** ************ ***** ** ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** ** * ********* * ** *** *** *** * ****** **** ************ ***** ** ******* ***** ** */ + +/* Character (0x25): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0xf0, 0xf8, 0x0c, 0x04, 0x84, 0x78, 0x08, 0xc8, 0x74, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** * * * **** * * ** * *** *** */ +0x00, 0x01, 0x01, 0xc1, 0x70, 0x1c, 0x07, 0x01, 0x78, 0xfc, 0x86, 0x82, 0x42, 0x3c, 0x00, /* **** ***** ** * * * **** * * ** * *** *** * * * ** *** *** *** * **** ****** ** * * * * * **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** * * * **** * * ** * *** *** * * * ** *** *** *** * **** ****** ** * * * * * **** */ + +/* Character (0x26): bbw=16, bbh=14, bbx=0, bby=0, width=17 */ +0x00, 0x00, 0x00, 0xf0, 0xf8, 0xcc, 0x84, 0xc4, 0x6c, 0x38, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** ** * * * ** ** ** *** */ +0x78, 0x7c, 0xfe, 0xc6, 0x83, 0x87, 0x8f, 0xde, 0x7c, 0x78, 0x79, 0xe7, 0xc3, 0xc1, 0x41, 0x20, 0x00, /* **** ***** ** ** * * * ** ** ** *** **** ***** ******* ** **** **** ***** * **** ** ***** **** * **** *** ***** *** *** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** ** * * * ** ** ** *** **** ***** ******* ** **** **** ***** * **** ** ***** **** * **** *** ***** *** *** * * */ + +/* Character (0x27): bbw=2, bbh=5, bbx=1, bby=9, width=5 */ +0x00, 0x7c, 0x7c, 0x00, 0x00, /* ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ***** ***** */ + +/* Character (0x28): bbw=5, bbh=16, bbx=1, bby=-2, width=6 */ +0x00, 0xc0, 0xf0, 0x38, 0x0c, 0x04, /* ** **** *** ** * */ +0x00, 0x3f, 0xff, 0xc0, 0x00, 0x00, /* ** **** *** ** * ****** ******** ** */ +0x00, 0x00, 0x00, 0x01, 0x03, 0x02, /* ** **** *** ** * ****** ******** ** * ** * */ + +/* Character (0x29): bbw=5, bbh=16, bbx=0, bby=-2, width=6 */ +0x04, 0x0c, 0x38, 0xf0, 0xc0, 0x00, /* * ** *** **** ** */ +0x00, 0x00, 0xc0, 0xff, 0x3f, 0x00, /* * ** *** **** ** **************** */ +0x02, 0x03, 0x01, 0x00, 0x00, 0x00, /* * ** *** **** ** **************** * ** * */ + +/* Character (0x2a): bbw=7, bbh=7, bbx=0, bby=7, width=8 */ +0xd8, 0x50, 0x24, 0xfc, 0x24, 0x50, 0xd8, 0x00, /* ** ** * * * * ****** * * * * ** ** */ +0x00, 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, /* ** ** * * * * ****** * * * * ** ** * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * * * ****** * * * * ** ** * * * */ + +/* Character (0x2b): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** */ +0x0c, 0x0c, 0x0c, 0x0c, 0xff, 0xff, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /* ** ** ** ** ** ** **************** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** **************** ** ** ** ** */ + +/* Character (0x2c): bbw=4, bbh=7, bbx=0, bby=-3, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x60, 0xf0, 0xf0, 0xe0, 0x00, /* ** **** **** *** */ +0x04, 0x02, 0x01, 0x00, 0x00, /* ** **** **** *** * * * */ + +/* Character (0x2d): bbw=5, bbh=2, bbx=0, bby=4, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /* ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** */ + +/* Character (0x2e): bbw=4, bbh=4, bbx=0, bby=0, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x60, 0xf0, 0xf0, 0x60, 0x00, /* ** **** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** ** */ + +/* Character (0x2f): bbw=6, bbh=14, bbx=0, bby=0, width=7 */ +0x00, 0x00, 0x00, 0xe0, 0xfc, 0x1c, 0x00, /* *** ****** *** */ +0xc0, 0xf8, 0x3f, 0x07, 0x00, 0x00, 0x00, /* *** ****** *** ** *********** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** ****** *** ** *********** *** */ + +/* Character (0x30): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0xe0, 0xf8, 0xf8, 0x0c, 0x04, 0x0c, 0xf8, 0xf8, 0xe0, 0x00, /* *** ***** ***** ** * ** ***** ***** *** */ +0x00, 0x1f, 0x7f, 0x7f, 0xc0, 0x80, 0xc0, 0x7f, 0x7f, 0x1f, 0x00, /* *** ***** ***** ** * ** ***** ***** *** ***** ******* ******* ** * ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** ***** ***** ** * ** ***** ***** *** ***** ******* ******* ** * ********* ******* ***** */ + +/* Character (0x31): bbw=7, bbh=14, bbx=2, bby=0, width=11 */ +0x00, 0x00, 0x10, 0x10, 0xf8, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, /* * * ***** ****** ****** */ +0x00, 0x00, 0x80, 0x80, 0xff, 0xff, 0xff, 0x80, 0x80, 0x00, 0x00, /* * * ***** ****** ****** * ************************* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ***** ****** ****** * ************************* * * */ + +/* Character (0x32): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x30, 0x78, 0x78, 0x04, 0x04, 0x0c, 0xfc, 0xf8, 0xf0, 0x00, /* ** **** **** * * ** ****** ***** **** */ +0x00, 0xc0, 0xe0, 0xf0, 0xd8, 0xcc, 0xc7, 0xc7, 0xc3, 0xe0, 0x00, /* ** **** **** * * ** ****** ***** **** ** *** **** ** ** ** ***** ***** **** ** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** * * ** ****** ***** **** ** *** **** ** ** ** ***** ***** **** ** *** */ + +/* Character (0x33): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x30, 0x78, 0x78, 0x04, 0x04, 0x0c, 0xfc, 0xf8, 0x70, 0x00, /* ** **** **** * * ** ****** ***** *** */ +0x00, 0x30, 0x78, 0xf8, 0x81, 0x81, 0xc1, 0xfe, 0x7e, 0x3c, 0x00, /* ** **** **** * * ** ****** ***** *** ** **** ****** ** ** ** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** * * ** ****** ***** *** ** **** ****** ** ** ** ******* ****** **** */ + +/* Character (0x34): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x80, 0x60, 0x18, 0xfc, 0xfc, 0xfc, 0x00, 0x00, /* * ** ** ****** ****** ****** */ +0x00, 0x18, 0x16, 0x11, 0x10, 0x90, 0xff, 0xff, 0xff, 0x90, 0x00, /* * ** ** ****** ****** ****** ** ** * * * * * ************************* * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ** ****** ****** ****** ** ** * * * * * ************************* * * */ + +/* Character (0x35): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x00, 0xfc, 0x8c, 0x8c, 0x8c, 0x8c, 0x8c, 0x0c, 0x04, 0x00, /* ****** ** * ** * ** * ** * ** * ** * */ +0x00, 0x30, 0x79, 0xf8, 0x80, 0x80, 0xc1, 0xff, 0x7f, 0x3e, 0x00, /* ****** ** * ** * ** * ** * ** * ** * ** * **** ***** * ** ***************** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ** * ** * ** * ** * ** * ** * ** * **** ***** * ** ***************** ***** */ + +/* Character (0x36): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0xe0, 0xf8, 0xf8, 0x0c, 0x84, 0x84, 0xbc, 0x3c, 0x18, 0x00, /* *** ***** ***** ** * * * * **** * **** ** */ +0x00, 0x1f, 0x7f, 0x7f, 0xc1, 0x80, 0x81, 0x7f, 0x7f, 0x3e, 0x00, /* *** ***** ***** ** * * * * **** * **** ** ***** ******* ******* * ** ** ******** ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** ***** ***** ** * * * * **** * **** ** ***** ******* ******* * ** ** ******** ******* ***** */ + +/* Character (0x37): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0x3c, 0x1c, 0x1c, 0x1c, 0x1c, 0xdc, 0xfc, 0x3c, 0x1c, 0x00, /* **** *** *** *** *** *** ** ****** **** *** */ +0x00, 0x00, 0x00, 0xf0, 0xfc, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, /* **** *** *** *** *** *** ** ****** **** *** **** ****************** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** *** *** *** *** *** ** ****** **** *** **** ****************** */ + +/* Character (0x38): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0xf0, 0xf8, 0xc8, 0x84, 0x84, 0x04, 0x88, 0xf8, 0x70, 0x00, /* **** ***** * ** * * * * * * * ***** *** */ +0x00, 0x78, 0x7d, 0xc3, 0x83, 0x87, 0x87, 0x4f, 0x7e, 0x3c, 0x00, /* **** ***** * ** * * * * * * * ***** *** **** * ***** ** **** **** **** ***** * ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** * ** * * * * * * * ***** *** **** * ***** ** **** **** **** ***** * ****** **** */ + +/* Character (0x39): bbw=9, bbh=14, bbx=1, bby=0, width=11 */ +0x00, 0xf0, 0xf8, 0xf8, 0x04, 0x04, 0x0c, 0xf8, 0xf8, 0xe0, 0x00, /* **** ***** ***** * * ** ***** ***** *** */ +0x00, 0x61, 0xf3, 0xf7, 0x86, 0x84, 0xc2, 0x7f, 0x7f, 0x1f, 0x00, /* **** ***** ***** * * ** ***** ***** *** * ** ** ******* **** ** * * * * ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ***** * * ** ***** ***** *** * ** ** ******* **** ** * * * * ********* ******* ***** */ + +/* Character (0x3a): bbw=4, bbh=9, bbx=1, bby=0, width=6 */ +0x00, 0x00, 0x80, 0x80, 0x00, 0x00, /* * * */ +0x00, 0x63, 0xf7, 0xf7, 0x63, 0x00, /* * * ** ** *** ******* ****** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** ** *** ******* ****** ** */ + +/* Character (0x3b): bbw=4, bbh=12, bbx=1, bby=-3, width=6 */ +0x00, 0x00, 0x80, 0x80, 0x00, 0x00, /* * * */ +0x00, 0x63, 0xf7, 0xf7, 0xe3, 0x00, /* * * ** ** *** ******* ****** *** */ +0x00, 0x04, 0x02, 0x01, 0x00, 0x00, /* * * ** ** *** ******* ****** *** * * * */ + +/* Character (0x3c): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0xc0, 0xc0, 0x00, /* * * ** ** */ +0x0c, 0x0c, 0x1e, 0x1e, 0x33, 0x33, 0x61, 0x61, 0xc0, 0xc0, 0x00, /* * * ** ** ** ** **** **** ** ** ** ** * ** * ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** ** ** ** **** **** ** ** ** ** * ** * ** ** ** */ + +/* Character (0x3d): bbw=9, bbh=6, bbx=1, bby=2, width=11 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x33, 0x00, /* ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** ** */ + +/* Character (0x3e): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0xc0, 0xc0, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * */ +0xc0, 0xc0, 0x61, 0x61, 0x33, 0x33, 0x1e, 0x1e, 0x0c, 0x0c, 0x00, /* ** ** * * ** *** ** * ** ** ** ** ** **** **** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * ** *** ** * ** ** ** ** ** **** **** ** ** */ + +/* Character (0x3f): bbw=9, bbh=14, bbx=0, bby=0, width=10 */ +0x30, 0x78, 0x78, 0x04, 0x04, 0x0c, 0xfc, 0xfc, 0x78, 0x00, /* ** **** **** * * ** ****** ****** **** */ +0x00, 0x00, 0x60, 0xf4, 0xf6, 0x63, 0x01, 0x00, 0x00, 0x00, /* ** **** **** * * ** ****** ****** **** ** * **** ** ****** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** * * ** ****** ****** **** ** * **** ** ****** ** * */ + +/* Character (0x40): bbw=15, bbh=14, bbx=0, bby=0, width=16 */ +0x80, 0xe0, 0x70, 0x18, 0x88, 0xcc, 0x64, 0x24, 0x24, 0xe4, 0xe4, 0x0c, 0x18, 0xf8, 0xe0, 0x00, /* * *** *** ** * * ** ** * ** * * * * * *** * *** ** ** ***** *** */ +0x1f, 0x7f, 0x60, 0xce, 0xdf, 0x91, 0x90, 0x88, 0x9e, 0xdf, 0x51, 0x58, 0x2e, 0x07, 0x01, 0x00, /* * *** *** ** * * ** ** * ** * * * * * *** * *** ** ** ***** *** ***** ******* ** *** ******* *** * * * * * * **** ****** *** * * ** * *** * *** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** *** ** * * ** ** * ** * * * * * *** * *** ** ** ***** *** ***** ******* ** *** ******* *** * * * * * * **** ****** *** * * ** * *** * *** * */ + +/* Character (0x41): bbw=14, bbh=14, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0x70, 0x7c, 0xfc, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, /* ** *** ***** ****** **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* ** *** ***** ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** ***** ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ + +/* Character (0x42): bbw=12, bbh=14, bbx=1, bby=0, width=14 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x8c, 0xfc, 0xfc, 0x78, 0x00, 0x00, /* * ****** ****** ****** * * * ** * ****** ****** **** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x81, 0x81, 0xc7, 0x7e, 0x7e, 0x3c, 0x00, /* * ****** ****** ****** * * * ** * ****** ****** **** ************************** ** ** ** **** ** ****** ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * ** * ****** ****** **** ************************** ** ** ** **** ** ****** ****** **** */ + +/* Character (0x43): bbw=12, bbh=14, bbx=1, bby=0, width=14 */ +0x00, 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x08, 0x38, 0xfc, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** */ +0x00, 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0x40, 0x60, 0x18, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * * ** ** */ + +/* Character (0x44): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** ************************* * * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** ************************* * * * * ** *** **** ******* ****** **** */ + +/* Character (0x45): bbw=11, bbh=14, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x84, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** */ + +/* Character (0x46): bbw=11, bbh=14, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x84, 0xe4, 0x0c, 0x1c, 0xfc, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ****** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x01, 0x03, 0x0f, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ****** ************************** ** ** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * *** ** *** ****** ************************** ** ** **** */ + +/* Character (0x47): bbw=13, bbh=14, bbx=1, bby=0, width=15 */ +0x00, 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x08, 0x38, 0xfc, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** */ +0x00, 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0xc4, 0x7c, 0x7c, 0xfc, 0x04, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * ** ***** ***** ****** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * ** ***** ***** ****** * */ + +/* Character (0x48): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x00, 0x00, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /* * ****** ****** ****** * * * * ****** ****** ****** * */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x01, 0x01, 0x81, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ****** ****** ****** * * * * ****** ****** ****** * ************************** ** ** * * ** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ****** ****** ****** * ************************** ** ** * * ** ************************* * */ + +/* Character (0x49): bbw=5, bbh=14, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, 0x00, /* * ****** ****** ****** * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * ****** ****** ****** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * ************************* * */ + +/* Character (0x4a): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /* * * ****** ****** ****** * */ +0x38, 0x7c, 0x9c, 0x98, 0x80, 0xc0, 0xe0, 0x7f, 0x7f, 0x3f, 0x00, 0x00, /* * * ****** ****** ****** * *** ***** *** * ** * * ** ********** ******* ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ****** * *** ***** *** * ** * * ** ********** ******* ****** */ + +/* Character (0x4b): bbw=15, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x80, 0xc0, 0x60, 0x34, 0x1c, 0x0c, 0x04, 0x04, 0x00, /* * ****** ****** ****** * * * ** ** * ** *** ** * * */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x86, 0x83, 0x07, 0x0f, 0xbf, 0xfe, 0xf8, 0xf0, 0xe0, 0xc0, 0x80, /* * ****** ****** ****** * * * ** ** * ** *** ** * * ************************* ** *** **** **** ****** * ******* ***** **** *** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * ** ** * ** *** ** * * ************************* ** *** **** **** ****** * ******* ***** **** *** ** * */ + +/* Character (0x4c): bbw=11, bbh=14, bbx=1, bby=0, width=12 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0xf8, /* * ****** ****** ****** * * ************************* * * * * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * ************************* * * * * ** *** ***** */ + +/* Character (0x4d): bbw=17, bbh=14, bbx=1, bby=0, width=19 */ +0x00, 0x00, 0x04, 0xfc, 0x1c, 0xfc, 0xfc, 0xf0, 0xc0, 0x00, 0x00, 0x00, 0xe0, 0x38, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /* * ****** *** ****** ****** **** ** *** *** ****** ****** ****** * */ +0x00, 0x80, 0xc0, 0xff, 0xc0, 0x80, 0x03, 0x1f, 0x7f, 0xfe, 0x3c, 0x07, 0x01, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ****** *** ****** ****** **** ** *** *** ****** ****** ****** * * ********** ** *** ***** ******* ******* **** *** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** *** ****** ****** **** ** *** *** ****** ****** ****** * * ********** ** *** ***** ******* ******* **** *** * ************************* * */ + +/* Character (0x4e): bbw=15, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0x0c, 0xfc, 0x3c, 0x7c, 0xf8, 0xe0, 0xc0, 0x80, 0x00, 0x04, 0x0c, 0xfc, 0x0c, 0x04, /* * ** ****** **** ***** ***** *** ** * * ** ****** ** * */ +0x00, 0x80, 0xc0, 0xff, 0xc0, 0x80, 0x00, 0x01, 0x07, 0x0f, 0x3e, 0x7c, 0xf0, 0xff, 0x00, 0x00, /* * ** ****** **** ***** ***** *** ** * * ** ****** ** * * ********** ** * * *** **** ***** ***** ************ */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ****** **** ***** ***** *** ** * * ** ****** ** * * ********** ** * * *** **** ***** ***** ************ */ + +/* Character (0x4f): bbw=15, bbh=14, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ + +/* Character (0x50): bbw=12, bbh=14, bbx=1, bby=0, width=14 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x04, 0x8c, 0xfc, 0xfc, 0xf8, 0x00, /* * ****** ****** ****** * * * * ** * ****** ****** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x82, 0x82, 0x02, 0x03, 0x03, 0x01, 0x01, 0x00, 0x00, /* * ****** ****** ****** * * * * ** * ****** ****** ***** ************************* * * * * * ** ** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** * ****** ****** ***** ************************* * * * * * ** ** * * */ + +/* Character (0x51): bbw=15, bbh=18, bbx=0, bby=-4, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xd0, 0xc8, 0x88, 0x98, 0xf8, 0xf0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** **** ****** ******* **** * ** * ** * * ** * ***** **** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0x0f, 0x0e, 0x0c, 0x06, 0x00, 0x00, /* ** **** ***** **** *** ** * * * ** *** **** ***** **** ** **** ****** ******* **** * ** * ** * * ** * ***** **** *** **** ******* ****** **** *** **** *** ** ** */ + +/* Character (0x52): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x84, 0xcc, 0xfc, 0xfc, 0x78, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ** ** ****** ****** **** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x01, 0x01, 0x07, 0x3f, 0xfe, 0xfc, 0xe0, 0x80, 0x40, 0x00, /* * ****** ****** ****** * * * * * ** ** ****** ****** **** ************************** ** * *** ****** ******* ****** *** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ** ** ****** ****** **** ************************** ** * *** ****** ******* ****** *** * * */ + +/* Character (0x53): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0xf0, 0xf8, 0xcc, 0x84, 0x84, 0x84, 0x84, 0x0c, 0x18, 0x3c, 0x00, 0x00, /* **** ***** ** ** * * * * * * * * ** ** **** */ +0xf8, 0x63, 0xc3, 0x83, 0x87, 0x87, 0x87, 0x87, 0xcf, 0x7f, 0x3e, 0x00, /* **** ***** ** ** * * * * * * * * ** ** **** ******* ** ** **** **** **** **** **** ***** ********* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ** ** * * * * * * * * ** ** **** ******* ** ** **** **** **** **** **** ***** ********* ***** */ + +/* Character (0x54): bbw=11, bbh=14, bbx=1, bby=0, width=13 */ +0x00, 0x7c, 0x1c, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x1c, 0x7c, 0x00, /* ***** *** * * ****** ****** ****** * * *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, 0x00, 0x00, /* ***** *** * * ****** ****** ****** * * *** ***** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** *** * * ****** ****** ****** * * *** ***** ************************* * */ + +/* Character (0x55): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, 0x00, 0x00, 0x00, 0x04, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ****** * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ + +/* Character (0x56): bbw=14, bbh=14, bbx=0, bby=0, width=14 */ +0x04, 0x1c, 0xfc, 0xfc, 0xf4, 0x80, 0x00, 0x00, 0x00, 0x84, 0xfc, 0x1c, 0x0c, 0x04, /* * *** ****** ****** * **** * * * ****** *** ** * */ +0x00, 0x00, 0x00, 0x03, 0x0f, 0x3f, 0xfe, 0xf0, 0x3c, 0x07, 0x00, 0x00, 0x00, 0x00, /* * *** ****** ****** * **** * * * ****** *** ** * ** **** ****** ******* **** **** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** ****** ****** * **** * * * ****** *** ** * ** **** ****** ******* **** **** *** */ + +/* Character (0x57): bbw=19, bbh=14, bbx=0, bby=0, width=19 */ +0x04, 0x3c, 0xfc, 0xfc, 0xe4, 0x00, 0x04, 0x8c, 0xfc, 0xfc, 0xfc, 0xc4, 0x00, 0x00, 0x84, 0xfc, 0x1c, 0x0c, 0x04, /* * **** ****** ****** * *** * ** * ****** ****** ****** * ** * * ****** *** ** * */ +0x00, 0x00, 0x01, 0x0f, 0x7f, 0xff, 0x3c, 0x07, 0x00, 0x01, 0x0f, 0x7f, 0xfe, 0x3c, 0x07, 0x00, 0x00, 0x00, 0x00, /* * **** ****** ****** * *** * ** * ****** ****** ****** * ** * * ****** *** ** * * **** ******* ******** **** *** * **** ******* ******* **** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * **** ****** ****** * *** * ** * ****** ****** ****** * ** * * ****** *** ** * * **** ******* ******** **** *** * **** ******* ******* **** *** */ + +/* Character (0x58): bbw=16, bbh=14, bbx=0, bby=0, width=17 */ +0x00, 0x04, 0x0c, 0x1c, 0x7c, 0xfc, 0xf4, 0xc0, 0x80, 0xc0, 0x64, 0x3c, 0x1c, 0x0c, 0x04, 0x04, 0x00, /* * ** *** ***** ****** * **** ** * ** * ** **** *** ** * * */ +0x80, 0xc0, 0xe0, 0xf0, 0x98, 0x0c, 0x07, 0x03, 0x07, 0x9f, 0xfe, 0xfc, 0xf0, 0xe0, 0xc0, 0x80, 0x00, /* * ** *** ***** ****** * **** ** * ** * ** **** *** ** * * * ** *** **** ** * ** *** ** *** ***** * ******* ****** **** *** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** *** ***** ****** * **** ** * ** * ** **** *** ** * * * ** *** **** ** * ** *** ** *** ***** * ******* ****** **** *** ** * */ + +/* Character (0x59): bbw=13, bbh=14, bbx=1, bby=0, width=15 */ +0x00, 0x04, 0x1c, 0x7c, 0xfc, 0xf4, 0xc0, 0x00, 0x00, 0x80, 0xe4, 0x3c, 0x0c, 0x04, 0x00, /* * *** ***** ****** * **** ** * * *** **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x01, 0x87, 0xff, 0xff, 0xff, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** ***** ****** * **** ** * * *** **** ** * * *** *************************** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** ***** ****** * **** ** * * *** **** ** * * *** *************************** * */ + +/* Character (0x5a): bbw=11, bbh=14, bbx=1, bby=0, width=13 */ +0x00, 0x7c, 0x1c, 0x0c, 0x04, 0x04, 0xc4, 0xe4, 0xfc, 0x7c, 0x3c, 0x0c, 0x00, /* ***** *** ** * * * ** * *** ****** ***** **** ** */ +0x00, 0xc0, 0xf0, 0xf8, 0xfe, 0x9f, 0x8f, 0x83, 0x81, 0xc0, 0xe0, 0xf8, 0x00, /* ***** *** ** * * * ** * *** ****** ***** **** ** ** **** ***** ************ ***** *** ** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ***** *** ** * * * ** * *** ****** ***** **** ** ** **** ***** ************ ***** *** ** * ** *** ***** */ + +/* Character (0x5b): bbw=4, bbh=16, bbx=1, bby=-2, width=5 */ +0x00, 0xfc, 0xfc, 0x04, 0x04, /* ****** ****** * * */ +0x00, 0xff, 0xff, 0x00, 0x00, /* ****** ****** * * **************** */ +0x00, 0x03, 0x03, 0x02, 0x02, /* ****** ****** * * **************** ** ** * * */ + +/* Character (0x5c): bbw=8, bbh=14, bbx=0, bby=0, width=9 */ +0x0c, 0x3c, 0xf0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** ** */ +0x00, 0x00, 0x00, 0x03, 0x0f, 0x3c, 0xf0, 0xc0, 0x00, /* ** **** **** ** ** **** **** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** ** ** **** **** **** ** */ + +/* Character (0x5d): bbw=4, bbh=16, bbx=0, bby=-2, width=5 */ +0x04, 0x04, 0xfc, 0xfc, 0x00, /* * * ****** ****** */ +0x00, 0x00, 0xff, 0xff, 0x00, /* * * ****** ****** **************** */ +0x02, 0x02, 0x03, 0x03, 0x00, /* * * ****** ****** **************** * * ** ** */ + +/* Character (0x5e): bbw=8, bbh=8, bbx=0, bby=6, width=9 */ +0x00, 0xc0, 0xf0, 0x3c, 0x3c, 0xf0, 0xc0, 0x00, 0x00, /* ** **** **** **** **** ** */ +0x03, 0x03, 0x00, 0x00, 0x00, 0x00, 0x03, 0x03, 0x00, /* ** **** **** **** **** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** **** **** ** ** ** ** ** */ + +/* Character (0x5f): bbw=10, bbh=2, bbx=0, bby=-3, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, 0x06, /* ** ** ** ** ** ** ** ** ** ** */ + +/* Character (0x60): bbw=5, bbh=4, bbx=1, bby=10, width=7 */ +0x00, 0x0c, 0x1c, 0x18, 0x30, 0x20, 0x00, /* ** *** ** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** ** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** ** ** * */ + +/* Character (0x61): bbw=10, bbh=9, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * * * * * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0x62): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * */ +0x00, 0xff, 0xff, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * ****** ****** ****** * * * * *********************** * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * *********************** * ** * * ** ********* ******* ***** */ + +/* Character (0x63): bbw=9, bbh=9, bbx=0, bby=0, width=10 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x81, 0x43, 0x63, 0x00, /* * * * * * ***** ******* ******* * ** * ** *** * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ***** ******* ******* * ** * ** *** * ** ** */ + +/* Character (0x64): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x00, /* * * * * * ****** ****** ****** */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0x41, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * ****** ****** ****** ***** ******* ******* * ** * * ** * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ****** ****** ****** ***** ******* ******* * ** * * ** * ************************ * */ + +/* Character (0x65): bbw=10, bbh=9, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * * * * */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* * * * * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0x66): bbw=8, bbh=14, bbx=0, bby=0, width=7 */ +0x80, 0xf0, 0xf8, 0xfc, 0x84, 0x9c, 0x1c, /* * **** ***** ****** * * *** * *** */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * **** ***** ****** * * *** * *** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * **** ***** ****** * * *** * *** ************************* * */ + +/* Character (0x67): bbw=11, bbh=15, bbx=0, bby=-4, width=11 */ +0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x60, 0x60, /* * * * * * * * ** ** */ +0x00, 0x6f, 0xff, 0xd9, 0xd0, 0xd0, 0xd9, 0xdf, 0xcf, 0x80, 0x00, /* * * * * * * * ** ** **** ** ********* ** ** * ** * *** ** ******* ****** ** * */ +0x07, 0x0f, 0x0c, 0x08, 0x08, 0x08, 0x08, 0x0d, 0x07, 0x03, 0x00, /* * * * * * * * ** ** **** ** ********* ** ** * ** * *** ** ******* ****** ** * *** **** ** * * * ** ***** ** */ + +/* Character (0x68): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ****** ****** ****** * * * * * ************************** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ************************** * * ************************* * */ + +/* Character (0x69): bbw=5, bbh=14, bbx=0, bby=0, width=6 */ +0x80, 0x9c, 0x9c, 0x9c, 0x00, 0x00, /* * *** * *** * *** * */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * *** * *** * *** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** * *** * *** * ************************* * */ + +/* Character (0x6a): bbw=7, bbh=18, bbx=0, bby=-4, width=9 */ +0x00, 0x00, 0x00, 0x80, 0x9c, 0x9c, 0x9c, 0x00, 0x00, /* * *** * *** * *** * */ +0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00, /* * *** * *** * *** * ************************ */ +0x06, 0x0e, 0x0e, 0x08, 0x0f, 0x07, 0x03, 0x00, 0x00, /* * *** * *** * *** * ************************ ** *** *** ******** ** */ + +/* Character (0x6b): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * ****** ****** ****** * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x88, 0x1c, 0xbe, 0xf9, 0xf1, 0xe0, 0xc0, 0x80, 0x00, /* * ****** ****** ****** * * * * * ************************* * * *** ***** ** ****** **** *** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ************************* * * *** ***** ** ****** **** *** ** * */ + +/* Character (0x6c): bbw=5, bbh=14, bbx=0, bby=0, width=6 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x00, /* * ****** ****** ****** */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ****** ****** ****** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** ************************* * */ + +/* Character (0x6d): bbw=19, bbh=9, bbx=0, bby=0, width=20 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * * * * * * * * * ************************** * * ************************** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * * * ************************** * * ************************** * * ************************* * */ + +/* Character (0x6e): bbw=12, bbh=9, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* * * * * * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * * * ************************** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * ************************** * * ************************* * */ + +/* Character (0x6f): bbw=11, bbh=9, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0x70): bbw=12, bbh=13, bbx=0, bby=-4, width=13 */ +0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * */ +0x00, 0xff, 0xff, 0xff, 0x41, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * * * * * * ************************* * * * ** ********* ******* ***** */ +0x08, 0x0f, 0x0f, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * ************************* * * * ** ********* ******* ***** ************* * */ + +/* Character (0x71): bbw=12, bbh=13, bbx=0, bby=-4, width=12 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x00, /* * * * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0x41, 0xff, 0xff, 0xff, 0x00, /* * * * * * * ***** ******* ******* * ** * * ** * ************************ */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0f, 0x0f, 0x0f, 0x08, /* * * * * * * ***** ******* ******* * ** * * ** * ************************ ************* * */ + +/* Character (0x72): bbw=8, bbh=9, bbx=0, bby=0, width=9 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x00, /* * * * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x03, 0x03, 0x00, /* * * * * * * * ************************** * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * ************************** * ** ** */ + +/* Character (0x73): bbw=9, bbh=9, bbx=0, bby=0, width=10 */ +0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x00, 0x00, /* * * * * * */ +0xe6, 0x4f, 0x8f, 0x8c, 0x9c, 0x9c, 0xf9, 0x7b, 0x30, 0x00, /* * * * * * ** ******* * **** * ** * *** * *** ** ******* **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ** ******* * **** * ** * *** * *** ** ******* **** ** */ + +/* Character (0x74): bbw=7, bbh=13, bbx=0, bby=0, width=8 */ +0x80, 0xc0, 0xf0, 0xf8, 0x80, 0x80, 0x00, 0x00, /* * ** **** ***** * * */ +0x00, 0x7f, 0xff, 0xff, 0x80, 0x80, 0x60, 0x00, /* * ** **** ***** * * ******* **************** * * ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** **** ***** * * ******* **************** * * ** */ + +/* Character (0x75): bbw=12, bbh=9, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ******* **************** ** * * * ************************ * */ + +/* Character (0x76): bbw=10, bbh=9, bbx=0, bby=0, width=10 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, /* * * * * * * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0x30, 0x0c, 0x03, 0x00, /* * * * * * * * * ** **** ****** ****** **** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ** **** ****** ****** **** ** ** ** */ + +/* Character (0x77): bbw=16, bbh=9, bbx=0, bby=0, width=16 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, /* * * * * * * * * * * * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0x30, 0x0f, 0x0f, 0x3f, 0xfc, 0xf0, 0x30, 0x0c, 0x03, 0x00, /* * * * * * * * * * * * * * ** **** ****** ****** **** ** **** **** ****** ****** **** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * * * * ** **** ****** ****** **** ** **** **** ****** ****** **** ** ** ** */ + +/* Character (0x78): bbw=11, bbh=9, bbx=0, bby=0, width=12 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x80, 0x80, 0x80, 0x00, /* * * * * * * * * * */ +0x80, 0xc1, 0xc3, 0x27, 0x1f, 0xbe, 0xfc, 0xf2, 0xe1, 0xc1, 0x80, 0x00, /* * * * * * * * * * ** **** ***** * ***** ***** * ****** * ***** **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * ** **** ***** * ***** ***** * ****** * ***** **** ** * */ + +/* Character (0x79): bbw=11, bbh=13, bbx=0, bby=-4, width=12 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x00, /* * * * * * * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0xc0, 0x30, 0x0c, 0x03, 0x00, 0x00, /* * * * * * * * * ** **** ****** ****** **** ** ** ** ** */ +0x06, 0x0e, 0x0c, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ** **** ****** ****** **** ** ** ** ** ** *** ** * * ** */ + +/* Character (0x7a): bbw=8, bbh=9, bbx=0, bby=0, width=10 */ +0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * * * * */ +0xc3, 0xe1, 0xf8, 0xfc, 0x9f, 0x87, 0xc3, 0xf1, 0x00, 0x00, /* * * * * * * * * ** *** *** ***** *********** **** *** *** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ** *** *** ***** *********** **** *** *** **** */ + +/* Character (0x7b): bbw=5, bbh=16, bbx=0, bby=-2, width=6 */ +0x00, 0xf0, 0xf8, 0x04, 0x04, 0x00, /* **** ***** * * */ +0x02, 0xff, 0xfd, 0x00, 0x00, 0x00, /* **** ***** * * * ********* ****** */ +0x00, 0x00, 0x01, 0x02, 0x02, 0x00, /* **** ***** * * * ********* ****** * * * */ + +/* Character (0x7c): bbw=2, bbh=14, bbx=4, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** */ +0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** **************** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** **************** */ + +/* Character (0x7d): bbw=5, bbh=16, bbx=0, bby=-2, width=6 */ +0x04, 0x04, 0xf8, 0xf0, 0x00, 0x00, /* * * ***** **** */ +0x00, 0x00, 0xfd, 0xff, 0x02, 0x00, /* * * ***** **** * ************** * */ +0x02, 0x02, 0x01, 0x00, 0x00, 0x00, /* * * ***** **** * ************** * * * * */ + +/* Character (0x7e): bbw=10, bbh=3, bbx=1, bby=4, width=12 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x08, 0x0c, 0x0e, 0x06, 0x06, 0x0c, 0x0c, 0x0e, 0x06, 0x02, 0x00, /* * ** *** ** ** ** ** *** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** *** ** ** ** ** *** ** * */ + +/* Character (0xa0): bbw=1, bbh=1, bbx=0, bby=0, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ + +/* Character (0xa1): bbw=4, bbh=14, bbx=1, bby=-4, width=7 */ +0x00, 0x80, 0xc0, 0xc0, 0x80, 0x00, 0x00, /* * ** ** * */ +0x00, 0xc1, 0xfb, 0xfb, 0xc1, 0x00, 0x00, /* * ** ** * * **** ******* ****** ** */ +0x00, 0x07, 0x0f, 0x0f, 0x07, 0x00, 0x00, /* * ** ** * * **** ******* ****** ** *** *********** */ + +/* Character (0xa2): bbw=9, bbh=13, bbx=1, bby=-2, width=11 */ +0x00, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x60, 0x00, /* * * * * * ** */ +0x00, 0x3e, 0x7f, 0x7f, 0xc1, 0xb0, 0x8c, 0x83, 0x43, 0x63, 0x00, /* * * * * * ** ***** ******* ******* * ** ** * ** *** *** * ** ** */ +0x00, 0x00, 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ** ***** ******* ******* * ** ** * ** *** *** * ** ** ** */ + +/* Character (0xa3): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0xf0, 0xf8, 0xfc, 0x04, 0x04, 0x34, 0x3c, 0x38, 0x00, 0x00, /* **** ***** ****** * * * ** **** *** */ +0xc2, 0xa2, 0xa3, 0x7f, 0xdf, 0xce, 0xc2, 0xc2, 0xe2, 0x70, 0x00, /* **** ***** ****** * * * ** **** *** * ** * * *** * ******** ***** ** *** ** * ** * ** * *** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ****** * * * ** **** *** * ** * * *** * ******** ***** ** *** ** * ** * ** * *** *** */ + +/* Character (0xa4): bbw=9, bbh=9, bbx=0, bby=2, width=10 */ +0x60, 0xe0, 0xc0, 0x60, 0x60, 0x60, 0xc0, 0xe0, 0x60, 0x00, /* ** *** ** ** ** ** ** *** ** */ +0x37, 0x3f, 0x18, 0x30, 0x30, 0x30, 0x18, 0x3f, 0x37, 0x00, /* ** *** ** ** ** ** ** *** ** *** ** ****** ** ** ** ** ** ****** *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** ** ** ** ** ** *** ** *** ** ****** ** ** ** ** ** ****** *** ** */ + +/* Character (0xa5): bbw=13, bbh=14, bbx=1, bby=0, width=15 */ +0x00, 0x04, 0x1c, 0x3c, 0xfc, 0xf4, 0xc0, 0x00, 0x00, 0x80, 0xe4, 0x3c, 0x0c, 0x04, 0x00, /* * *** **** ****** * **** ** * * *** **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x0a, 0x8b, 0xff, 0xff, 0xff, 0x8b, 0x0a, 0x00, 0x00, 0x00, 0x00, /* * *** **** ****** * **** ** * * *** **** ** * * * ** * *************************** * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** **** ****** * **** ** * * *** **** ** * * * ** * *************************** * * * * */ + +/* Character (0xa6): bbw=2, bbh=14, bbx=4, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** */ +0x00, 0x00, 0x00, 0x00, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** ****** ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ****** ****** ****** ****** */ + +/* Character (0xa7): bbw=7, bbh=16, bbx=0, bby=-2, width=8 */ +0x38, 0xec, 0xc4, 0xc4, 0x9c, 0x98, 0x00, 0x00, /* *** ** *** * ** * ** *** * ** * */ +0x8f, 0x9c, 0x18, 0x39, 0x31, 0xf3, 0x0f, 0x00, /* *** ** *** * ** * ** *** * ** * **** * *** * ** * *** * ** ** ******** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, 0x00, 0x00, /* *** ** *** * ** * ** *** * ** * **** * *** * ** * *** * ** ** ******** * ** * * ** * */ + +/* Character (0xa8): bbw=6, bbh=2, bbx=2, bby=10, width=10 */ +0x00, 0x00, 0x30, 0x30, 0x00, 0x00, 0x30, 0x30, 0x00, 0x00, /* ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** */ + +/* Character (0xa9): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x80, 0x60, 0x10, 0x88, 0xc8, 0x64, 0x24, 0x24, 0x64, 0xe8, 0x08, 0x10, 0x60, 0x80, 0x00, /* * ** * * * * ** * ** * * * * * ** * *** * * ** * */ +0x07, 0x18, 0x20, 0x47, 0x4f, 0x98, 0x90, 0x90, 0x90, 0x48, 0x40, 0x20, 0x18, 0x07, 0x00, /* * ** * * * * ** * ** * * * * * ** * *** * * ** * *** ** * *** * **** * ** * * * * * * * * * * * ** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * * * * ** * ** * * * * * ** * *** * * ** * *** ** * *** * **** * ** * * * * * * * * * * * ** *** */ + +/* Character (0xaa): bbw=7, bbh=8, bbx=0, bby=6, width=8 */ +0x68, 0xec, 0x94, 0x54, 0xfc, 0xf8, 0x80, 0x00, /* * ** ** *** * * * * * * ****** ***** * */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /* * ** ** *** * * * * * * ****** ***** * * * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ** *** * * * * * * ****** ***** * * * * * * * * */ + +/* Character (0xab): bbw=8, bbh=5, bbx=0, bby=3, width=9 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x04, 0x0e, 0x0a, 0x11, 0x04, 0x0e, 0x0a, 0x11, 0x00, /* * *** * * * * * *** * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** * * * * * *** * * * * */ + +/* Character (0xac): bbw=9, bbh=6, bbx=0, bby=2, width=10 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x3f, 0x3f, 0x00, /* ** ** ** ** ** ** ** ****** ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** ** ****** ****** */ + +/* Character (0xad): bbw=5, bbh=2, bbx=0, bby=4, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /* ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** */ + +/* Character (0xae): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x80, 0x60, 0x10, 0x28, 0xe8, 0xe4, 0x24, 0x24, 0xe4, 0xc8, 0x08, 0x10, 0x60, 0x80, 0x00, /* * ** * * * * *** * *** * * * * * *** * ** * * ** * */ +0x07, 0x18, 0x20, 0x48, 0x4f, 0x8f, 0x89, 0x83, 0x8f, 0x4c, 0x48, 0x20, 0x18, 0x07, 0x00, /* * ** * * * * *** * *** * * * * * *** * ** * * ** * *** ** * * * **** * **** ** * *** ***** * ** * * * * ** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * * * * *** * *** * * * * * *** * ** * * ** * *** ** * * * **** * **** ** * *** ***** * ** * * * * ** *** */ + +/* Character (0xaf): bbw=6, bbh=2, bbx=1, bby=10, width=8 */ +0x00, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x00, /* ** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** */ + +/* Character (0xb0): bbw=6, bbh=6, bbx=0, bby=8, width=7 */ +0x78, 0xcc, 0x84, 0x84, 0xcc, 0x78, 0x00, /* **** ** ** * * * * ** ** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ** ** * * * * ** ** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ** ** * * * * ** ** **** */ + +/* Character (0xb1): bbw=10, bbh=11, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xe0, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** */ +0xc3, 0xc3, 0xc3, 0xc3, 0xdf, 0xdf, 0xc3, 0xc3, 0xc3, 0xc3, 0x00, /* *** *** ** **** **** **** ******* ******* **** **** **** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** ** **** **** **** ******* ******* **** **** **** **** ** */ + +/* Character (0xb2): bbw=6, bbh=8, bbx=0, bby=6, width=6 */ +0x18, 0x9c, 0xc4, 0x64, 0x3c, 0x18, /* ** *** * * ** * ** **** ** */ +0x03, 0x03, 0x02, 0x02, 0x02, 0x03, /* ** *** * * ** * ** **** ** ** ** * * * ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** * * ** * ** **** ** ** ** * * * ** */ + +/* Character (0xb3): bbw=6, bbh=8, bbx=0, bby=6, width=6 */ +0x88, 0x8c, 0x24, 0x24, 0xfc, 0xd8, /* * * ** * * * * * ****** ** ** */ +0x01, 0x03, 0x02, 0x02, 0x03, 0x01, /* * * ** * * * * * ****** ** *** ** * * ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * * * * ****** ** *** ** * * ** * */ + +/* Character (0xb4): bbw=5, bbh=4, bbx=1, bby=10, width=7 */ +0x00, 0x20, 0x30, 0x18, 0x1c, 0x0c, 0x00, /* * ** ** *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ** *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** ** *** ** */ + +/* Character (0xb5): bbw=12, bbh=13, bbx=0, bby=-4, width=13 */ +0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * * * * */ +0x00, 0xff, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * * * ************************ ** * * * ************************ * */ +0x00, 0x07, 0x0f, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * ************************ ** * * * ************************ * *** **** ** */ + +/* Character (0xb6): bbw=13, bbh=14, bbx=0, bby=0, width=14 */ +0xf0, 0xf8, 0xfc, 0xfc, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, /* **** ***** ****** ****** ****** ****** ****** * * ****** ****** ****** * */ +0x00, 0x01, 0x03, 0x83, 0xff, 0xff, 0xff, 0x80, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* **** ***** ****** ****** ****** ****** ****** * * ****** ****** ****** * * ** ** ************************* * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ****** ****** ****** ****** ****** * * ****** ****** ****** * * ** ** ************************* * ************************* * */ + +/* Character (0xb7): bbw=4, bbh=4, bbx=0, bby=3, width=5 */ +0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x0c, 0x1e, 0x1e, 0x0c, 0x00, /* ** **** **** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** **** ** */ + +/* Character (0xb8): bbw=4, bbh=4, bbx=1, bby=-4, width=6 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x00, 0x08, 0x0b, 0x0e, 0x06, 0x00, /* *** * *** ** */ + +/* Character (0xb9): bbw=6, bbh=8, bbx=0, bby=6, width=6 */ +0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, /* * * ****** ****** */ +0x02, 0x02, 0x03, 0x03, 0x02, 0x02, /* * * ****** ****** * * ** ** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** * * ** ** * * */ + +/* Character (0xba): bbw=6, bbh=8, bbx=0, bby=6, width=7 */ +0x78, 0xfc, 0x84, 0x84, 0xfc, 0x78, 0x00, /* **** ****** * * * * ****** **** */ +0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x00, /* **** ****** * * * * ****** **** * * * * * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ****** * * * * ****** **** * * * * * * */ + +/* Character (0xbb): bbw=8, bbh=5, bbx=0, bby=3, width=9 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* */ +0x11, 0x0a, 0x0e, 0x04, 0x11, 0x0a, 0x0e, 0x04, 0x00, /* * * * * *** * * * * * *** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * *** * * * * * *** * */ + +/* Character (0xbc): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0xc0, 0xf0, 0x3c, 0x0c, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ** **** **** ** */ +0x02, 0x02, 0x03, 0xc3, 0xf2, 0x3e, 0x0f, 0x33, 0x38, 0x2c, 0xa6, 0xff, 0xff, 0xa0, 0x00, /* * * ****** ****** ** **** **** ** * * ** ** ** * **** ***** **** ** ** *** ** * ** * ***************** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ** **** **** ** * * ** ** ** * **** ***** **** ** ** *** ** * ** * ***************** * * */ + +/* Character (0xbd): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x08, 0x08, 0xfc, 0xfc, 0x00, 0x00, 0x00, 0xc0, 0xf0, 0x3c, 0x0c, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ** **** **** ** */ +0x02, 0x02, 0x03, 0xc3, 0xf2, 0x3e, 0x0f, 0x03, 0xc6, 0xe7, 0xb1, 0x99, 0x8f, 0xc6, 0x00, /* * * ****** ****** ** **** **** ** * * ** ** ** * **** ***** **** ** ** ***** **** ** ** ** ***** * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ****** ****** ** **** **** ** * * ** ** ** * **** ***** **** ** ** ***** **** ** ** ** ***** * ** ** */ + +/* Character (0xbe): bbw=14, bbh=14, bbx=0, bby=0, width=15 */ +0x88, 0x8c, 0x24, 0x24, 0xfc, 0xd8, 0x00, 0xc0, 0xf0, 0x3c, 0x0c, 0x00, 0x00, 0x00, 0x00, /* * * ** * * * * * ****** ** ** ** **** **** ** */ +0x01, 0x03, 0x02, 0xc2, 0xf3, 0x3d, 0x0f, 0x33, 0x38, 0x2c, 0xa6, 0xff, 0xff, 0xa0, 0x00, /* * * ** * * * * * ****** ** ** ** **** **** ** * ** * * **** ***** **** **** ** ** *** ** * ** * ***************** * * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * * * * ****** ** ** ** **** **** ** * ** * * **** ***** **** **** ** ** *** ** * ** * ***************** * * */ + +/* Character (0xbf): bbw=9, bbh=14, bbx=0, bby=-4, width=10 */ +0x00, 0x00, 0x00, 0x80, 0xc0, 0xc0, 0x80, 0x00, 0x00, 0x00, /* * ** ** * */ +0x80, 0xc0, 0xe0, 0x31, 0x1b, 0x0b, 0x81, 0x80, 0x00, 0x00, /* * ** ** * * ** **** ** ** ** ** * * * * */ +0x07, 0x0f, 0x0f, 0x0c, 0x08, 0x08, 0x07, 0x07, 0x03, 0x00, /* * ** ** * * ** **** ** ** ** ** * * * * *** ******** ** * **** *** ** */ + +/* Character (0xc0): bbw=14, bbh=19, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0x70, 0x7d, 0xfd, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, /* ** *** * ***** * ****** **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* ** *** * ***** * ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** * ***** * ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * ** *** ** * */ + +/* Character (0xc1): bbw=14, bbh=19, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0x70, 0x7d, 0xfd, 0xf0, 0x80, 0x00, 0x00, 0x00, 0x00, /* ** *** * ***** * ****** **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* ** *** * ***** * ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, /* ** *** * ***** * ****** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * ** *** ** */ + +/* Character (0xc2): bbw=14, bbh=18, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc1, 0x71, 0x7c, 0xfc, 0xf0, 0x81, 0x01, 0x00, 0x00, 0x00, /* * *** *** ***** ****** ***** ** */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* * *** *** ***** ****** ***** ** * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, /* * *** *** ***** ****** ***** ** * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * ** ** ** * */ + +/* Character (0xc3): bbw=14, bbh=18, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x01, 0xc0, 0x70, 0x7c, 0xfd, 0xf1, 0x80, 0x00, 0x00, 0x00, 0x00, /* * ** *** ***** * ******* **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* * ** *** ***** * ******* **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, /* * ** *** ***** * ******* **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * ** ** * * * * */ + +/* Character (0xc4): bbw=14, bbh=17, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc1, 0x71, 0x7c, 0xfc, 0xf1, 0x81, 0x00, 0x00, 0x00, 0x00, /* * *** *** ***** ******* ***** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* * *** *** ***** ******* ***** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, /* * *** *** ***** ******* ***** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * * * * */ + +/* Character (0xc5): bbw=14, bbh=18, bbx=0, bby=0, width=14 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0x71, 0x7e, 0xfe, 0xf1, 0x80, 0x00, 0x00, 0x00, 0x00, /* *** *** ****** ******** **** * */ +0x80, 0xe0, 0xb8, 0x0e, 0x0b, 0x08, 0x08, 0x0b, 0x9f, 0xff, 0xfe, 0xf0, 0xc0, 0x80, /* *** *** ****** ******** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x04, 0x04, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /* *** *** ****** ******** **** * * *** *** * *** ** * * * ** * ***** ********* ******* **** ** * * * * * */ + +/* Character (0xc6): bbw=20, bbh=14, bbx=0, bby=0, width=21 */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc4, 0x74, 0x1c, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x84, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /* * * ** * *** *** * ****** ****** ****** * * * * * *** ** *** ***** */ +0x80, 0xc0, 0xf0, 0x8c, 0x06, 0x07, 0x04, 0x84, 0x84, 0x84, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * * ** * *** *** * ****** ****** ****** * * * * * *** ** *** ***** * ** **** ** * ** *** * * * * * * ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * *** *** * ****** ****** ****** * * * * * *** ** *** ***** * ** **** ** * ** *** * * * * * * ************************** ** *** ***** * ** *** ***** */ + +/* Character (0xc7): bbw=12, bbh=18, bbx=1, bby=-4, width=14 */ +0x00, 0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x04, 0x04, 0x08, 0x38, 0xfc, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** */ +0x00, 0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0x40, 0x60, 0x18, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * * ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0b, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * *** ****** **** ****** ******* **** *** ** * * * * ** ** *** * *** ** */ + +/* Character (0xc8): bbw=11, bbh=19, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x05, 0x85, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /* * ****** ****** ****** * * * * * * * *** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ****** ****** ****** * * * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** ** *** ** * */ + +/* Character (0xc9): bbw=11, bbh=19, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x05, 0x05, 0x84, 0xe4, 0x0c, 0x1c, 0x7c, 0x00, /* * ****** ****** ******* * * * * * * *** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ****** ****** ******* * * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * * *** ** *** ***** ************************** ** *** ***** * ** *** ***** * ** *** ** */ + +/* Character (0xca): bbw=11, bbh=18, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfd, 0xfd, 0x04, 0x04, 0x84, 0xe5, 0x0d, 0x1c, 0x7c, 0x00, /* * ******* ******* ****** * * * ** * **** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ******* ******* ****** * * * ** * **** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, /* * ******* ******* ****** * * * ** * **** ** *** ***** ************************** ** *** ***** * ** *** ***** * ** ** ** * */ + +/* Character (0xcb): bbw=11, bbh=17, bbx=1, bby=0, width=13 */ +0x00, 0x04, 0xfc, 0xfc, 0xfd, 0x05, 0x04, 0x84, 0xe5, 0x0d, 0x1c, 0x7c, 0x00, /* * ****** ******* ******* * * * ** * **** ** *** ***** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x81, 0x81, 0x83, 0x8f, 0xc0, 0xe0, 0xf8, 0x00, /* * ****** ******* ******* * * * ** * **** ** *** ***** ************************** ** *** ***** * ** *** ***** */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, /* * ****** ******* ******* * * * ** * **** ** *** ***** ************************** ** *** ***** * ** *** ***** * * * * */ + +/* Character (0xcc): bbw=5, bbh=19, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0x04, 0xfc, 0xfc, 0xfd, 0x05, 0x00, 0x00, /* * ****** ******* ******* * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * ****** ******* ******* * ************************* * */ +0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, /* * ****** ******* ******* * ************************* * ** *** ** * */ + +/* Character (0xcd): bbw=6, bbh=19, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0x04, 0xfd, 0xfd, 0xfc, 0x04, 0x00, 0x00, /* * * ******* ****** ****** * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * * ******* ****** ****** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, /* * * ******* ****** ****** * ************************* * * ** *** ** */ + +/* Character (0xce): bbw=7, bbh=18, bbx=1, bby=0, width=9 */ +0x00, 0x01, 0x05, 0xfc, 0xfc, 0xfc, 0x05, 0x01, 0x00, /* * * * ****** ****** ******* * * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * * * ****** ****** ******* * * ************************* * */ +0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, /* * * * ****** ****** ******* * * ************************* * * ** ** ** * */ + +/* Character (0xcf): bbw=6, bbh=17, bbx=2, bby=0, width=9 */ +0x00, 0x00, 0x05, 0xfd, 0xfc, 0xfc, 0x05, 0x01, 0x00, /* * * * ****** ****** ******* * * */ +0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, 0x00, /* * * * ****** ****** ******* * * ************************* * */ +0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, /* * * * ****** ****** ******* * * ************************* * * * * * */ + +/* Character (0xd0): bbw=15, bbh=14, bbx=0, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x04, 0x04, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** */ +0x01, 0x81, 0xff, 0xff, 0xff, 0x81, 0x81, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** * * ************************** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** *** **** ***** **** ** * * ************************** ** * * * ** *** **** ******* ****** **** */ + +/* Character (0xd1): bbw=15, bbh=18, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0x0c, 0xfc, 0x3c, 0x7d, 0xf8, 0xe0, 0xc0, 0x81, 0x01, 0x04, 0x0c, 0xfc, 0x0c, 0x04, /* * ** ****** **** * ***** ***** *** *** ** * ** ****** ** * */ +0x00, 0x80, 0xc0, 0xff, 0xc0, 0x80, 0x00, 0x01, 0x07, 0x0f, 0x3e, 0x7c, 0xf0, 0xff, 0x00, 0x00, /* * ** ****** **** * ***** ***** *** *** ** * ** ****** ** * * ********** ** * * *** **** ***** ***** ************ */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, /* * ** ****** **** * ***** ***** *** *** ** * ** ****** ** * * ********** ** * * *** **** ***** ***** ************ * ** ** * * * * */ + +/* Character (0xd2): bbw=15, bbh=19, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x04, 0x05, 0x05, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** ** *** ** * */ + +/* Character (0xd3): bbw=15, bbh=19, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0c, 0x05, 0x05, 0x04, 0x0c, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** * ** *** ** */ + +/* Character (0xd4): bbw=15, bbh=18, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1d, 0x0d, 0x04, 0x04, 0x04, 0x0d, 0x1d, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** * *** * ** * * * * ** * *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** * *** * ** * * * * ** * *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** * *** * ** * * * * ** * *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** * ** ** ** * */ + +/* Character (0xd5): bbw=15, bbh=18, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1d, 0x0c, 0x04, 0x04, 0x05, 0x0d, 0x1c, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** * *** ** * * * * * ** *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** * *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x08, 0x08, 0x08, 0x04, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** * *** ** * * * * * ** *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** * ** ** * * * * */ + +/* Character (0xd6): bbw=15, bbh=17, bbx=0, bby=0, width=16 */ +0xc0, 0xf0, 0xf8, 0x78, 0x1c, 0x0d, 0x05, 0x04, 0x04, 0x0d, 0x1d, 0x78, 0xf8, 0xf0, 0xc0, 0x00, /* ** **** ***** **** *** * ** * * * * * ** * *** **** ***** **** ** */ +0x0f, 0x3f, 0x7f, 0x78, 0xe0, 0xc0, 0x80, 0x80, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** **** *** * ** * * * * * ** * *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** **** *** * ** * * * * * ** * *** **** ***** **** ** **** ****** ******* **** *** ** * * * ** *** **** ******* ****** **** * * * * */ + +/* Character (0xd7): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0xc0, 0xc0, 0x80, 0x00, 0x00, 0x00, 0x00, 0x80, 0xc0, 0xc0, 0x00, /* ** ** * * ** ** */ +0xc0, 0xe1, 0x73, 0x3f, 0x1e, 0x1e, 0x3f, 0x73, 0xe1, 0xc0, 0x00, /* ** ** * * ** ** *** ***** *** ****** **** **** ****** ** *** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * ** ** *** ***** *** ****** **** **** ****** ** *** * *** ** */ + +/* Character (0xd8): bbw=14, bbh=14, bbx=1, bby=0, width=16 */ +0x00, 0xc0, 0xf0, 0xf8, 0x38, 0x0c, 0x04, 0x04, 0x84, 0x4c, 0x3c, 0x78, 0xf8, 0xf4, 0xc0, 0x00, /* ** **** ***** *** ** * * * * ** * **** **** ***** * **** ** */ +0x00, 0x8f, 0x7f, 0x7f, 0x70, 0xc8, 0x84, 0x83, 0x80, 0xc0, 0xe0, 0x78, 0x7f, 0x3f, 0x0f, 0x00, /* ** **** ***** *** ** * * * * ** * **** **** ***** * **** ** **** ******** ******* *** * ** * *** * * ** *** **** ******* ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** **** ***** *** ** * * * * ** * **** **** ***** * **** ** **** ******** ******* *** * ** * *** * * ** *** **** ******* ****** **** */ + +/* Character (0xd9): bbw=14, bbh=19, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x00, 0x00, 0x01, 0x01, 0x04, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x0e, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** ** *** ** * */ + +/* Character (0xda): bbw=14, bbh=19, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x04, 0x01, 0x01, 0x00, 0x00, 0x04, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** * ** *** ** */ + +/* Character (0xdb): bbw=14, bbh=18, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x05, 0x01, 0x00, 0x00, 0x00, 0x05, 0x0d, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0c, 0x0c, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** * ** ** ** * */ + +/* Character (0xdc): bbw=14, bbh=17, bbx=1, bby=0, width=16 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x05, 0x01, 0x00, 0x00, 0x01, 0x05, 0x0c, 0xfc, 0x0c, 0x04, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * */ +0x00, 0x00, 0x3f, 0x7f, 0xff, 0xc0, 0x80, 0x80, 0x80, 0x80, 0x80, 0x40, 0x3f, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x08, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ******* * * * * * ** ****** ** * ****** ******* ******** ** * * * * * * ****** * * * * */ + +/* Character (0xdd): bbw=13, bbh=19, bbx=1, bby=0, width=15 */ +0x00, 0x04, 0x1c, 0x7c, 0xfc, 0xf4, 0xc0, 0x01, 0x01, 0x80, 0xe4, 0x3c, 0x0c, 0x04, 0x00, /* * *** ***** ****** * **** *** * * * *** **** ** * */ +0x00, 0x00, 0x00, 0x00, 0x01, 0x87, 0xff, 0xff, 0xff, 0x83, 0x00, 0x00, 0x00, 0x00, 0x00, /* * *** ***** ****** * **** *** * * * *** **** ** * * *** *************************** * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x0c, 0x0e, 0x06, 0x00, 0x00, 0x00, /* * *** ***** ****** * **** *** * * * *** **** ** * * *** *************************** * * ** *** ** */ + +/* Character (0xde): bbw=12, bbh=14, bbx=1, bby=0, width=14 */ +0x00, 0x04, 0xfc, 0xfc, 0xfc, 0x24, 0x20, 0x20, 0x20, 0x60, 0xe0, 0xc0, 0xc0, 0x00, /* * ****** ****** ****** * * * * * ** *** ** ** */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x90, 0x10, 0x10, 0x10, 0x18, 0x0f, 0x0f, 0x07, 0x00, /* * ****** ****** ****** * * * * * ** *** ** ** ************************* * * * * * ** **** **** *** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * * ** *** ** ** ************************* * * * * * ** **** **** *** */ + +/* Character (0xdf): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0xf0, 0xf8, 0xfc, 0x04, 0x04, 0x0c, 0xf8, 0xf8, 0x70, 0x00, 0x00, /* **** ***** ****** * * ** ***** ***** *** */ +0x80, 0xff, 0xff, 0xff, 0x00, 0x81, 0x81, 0xc3, 0x7e, 0x7e, 0x3c, 0x00, /* **** ***** ****** * * ** ***** ***** *** ************************* * ** *** ** ****** ****** **** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* **** ***** ****** * * ** ***** ***** *** ************************* * ** *** ** ****** ****** **** */ + +/* Character (0xe0): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0x8c, 0x9c, 0x98, 0xb0, 0xa0, 0x80, 0x00, 0x00, 0x00, /* * ** * *** * ** * ** * * * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ** * *** * ** * ** * * * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * *** * ** * ** * * * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe1): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0xa0, 0xb0, 0x98, 0x9c, 0x8c, 0x80, 0x00, 0x00, 0x00, /* * * * ** * ** * *** * ** * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * ** * ** * *** * ** * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * ** * *** * ** * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe2): bbw=10, bbh=13, bbx=0, bby=0, width=11 */ +0x00, 0xa0, 0xb0, 0x98, 0x98, 0x98, 0xb0, 0xa0, 0x00, 0x00, 0x00, /* * * ** * ** * ** * ** * ** * * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * ** * ** * ** * ** * ** * * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * ** * ** * ** * * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe3): bbw=10, bbh=13, bbx=0, bby=0, width=11 */ +0x00, 0xa0, 0x90, 0x98, 0x98, 0xb0, 0xb0, 0x90, 0x08, 0x00, 0x00, /* * * * * ** * ** * ** * ** * * * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * ** * ** * ** * ** * * * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * ** * ** * ** * ** * * * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe4): bbw=10, bbh=12, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0xb0, 0xb0, 0x80, 0x80, 0xb0, 0xb0, 0x00, 0x00, 0x00, /* * ** * ** * * * ** * ** * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ** * ** * * * ** * ** * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * * * ** * ** * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe5): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x80, 0x80, 0x98, 0xa4, 0xa4, 0x98, 0x80, 0x00, 0x00, 0x00, /* * * ** * * * * * * * ** * * */ +0x73, 0xf3, 0xf9, 0x88, 0x88, 0x44, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * ** * * * * * * * ** * * ** *** ** ***** ***** * * * * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * * * * * * * ** * * ** *** ** ***** ***** * * * * * * ************************ * */ + +/* Character (0xe6): bbw=16, bbh=9, bbx=0, bby=0, width=17 */ +0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * */ +0x72, 0xf3, 0xfb, 0x88, 0x88, 0x44, 0x7f, 0x7f, 0xff, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* * * * * * * * * * * * *** ** ****** ***** * * * * * * ******* ******* ********* * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * * * * * * *** ** ****** ***** * * * * * * ******* ******* ********* * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xe7): bbw=9, bbh=13, bbx=0, bby=-4, width=10 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x81, 0x43, 0x63, 0x00, /* * * * * * ***** ******* ******* * ** * ** *** * ** ** */ +0x00, 0x00, 0x08, 0x0b, 0x0e, 0x06, 0x00, 0x00, 0x00, 0x00, /* * * * * * ***** ******* ******* * ** * ** *** * ** ** *** * *** ** */ + +/* Character (0xe8): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x0c, 0x9c, 0x98, 0xb0, 0xa0, 0x00, 0x00, 0x00, 0x00, /* ** *** * ** * ** * * * */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* ** *** * ** * ** * * * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** *** * ** * ** * * * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xe9): bbw=10, bbh=14, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x20, 0xb0, 0x98, 0x9c, 0x8c, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * *** * ** * */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* * ** * ** * *** * ** * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * *** * ** * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xea): bbw=10, bbh=13, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x20, 0xb0, 0x98, 0x98, 0x98, 0x30, 0x20, 0x00, 0x00, /* * ** * ** * ** * ** * ** * */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* * ** * ** * ** * ** * ** * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * ** * ** * ** * ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xeb): bbw=10, bbh=12, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x30, 0xb0, 0x80, 0x80, 0xb0, 0x30, 0x00, 0x00, 0x00, /* ** ** * * * ** * ** */ +0x3e, 0x7f, 0x7f, 0xc9, 0x88, 0x88, 0x89, 0x8f, 0x4f, 0x6e, 0x00, /* ** ** * * * ** * ** ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** * * * ** * ** ***** ******* ******* * * ** * * * ** * ***** ***** * *** ** */ + +/* Character (0xec): bbw=5, bbh=14, bbx=0, bby=0, width=6 */ +0x8c, 0x9c, 0x98, 0xb0, 0x20, 0x00, /* ** * *** * ** * ** * * */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* ** * *** * ** * ** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * *** * ** * ** * * ************************* * */ + +/* Character (0xed): bbw=5, bbh=14, bbx=0, bby=0, width=6 */ +0xa0, 0xb0, 0x98, 0x9c, 0x0c, 0x00, /* * * ** * ** * *** * ** */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * ** * ** * *** * ** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * *** * ** ************************* * */ + +/* Character (0xee): bbw=7, bbh=13, bbx=0, bby=0, width=7 */ +0x20, 0xb0, 0x98, 0x98, 0x98, 0x30, 0x20, /* * ** * ** * ** * ** * ** * */ +0x00, 0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* * ** * ** * ** * ** * ** * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * ** * ** * ** * ************************* * */ + +/* Character (0xef): bbw=6, bbh=12, bbx=0, bby=0, width=6 */ +0xb0, 0xb0, 0x80, 0x80, 0x30, 0x30, /* ** * ** * * * ** ** */ +0x80, 0xff, 0xff, 0xff, 0x80, 0x00, /* ** * ** * * * ** ** ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * ** * * * ** ** ************************* * */ + +/* Character (0xf0): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0x24, 0x24, 0x98, 0x98, 0xb0, 0xe8, 0xc8, 0x80, 0x00, 0x00, 0x00, /* * * * * ** * ** * ** * * *** * ** * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * * * ** * ** * ** * * *** * ** * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * ** * ** * ** * * *** * ** * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf1): bbw=12, bbh=13, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0xa0, 0x90, 0x18, 0x98, 0xb0, 0xb0, 0x90, 0x88, 0x00, 0x00, 0x00, /* * * * * * * ** ** * ** * ** * * * * * */ +0x80, 0xff, 0xff, 0xff, 0x81, 0x00, 0x00, 0x81, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * * ** ** * ** * ** * * * * * ************************** * * ************************* * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * ** ** * ** * ** * * * * * ************************** * * ************************* * */ + +/* Character (0xf2): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0x8c, 0x9c, 0x98, 0xb0, 0xa0, 0x00, 0x00, 0x00, 0x00, /* ** * *** * ** * ** * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* ** * *** * ** * ** * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * *** * ** * ** * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf3): bbw=11, bbh=14, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0xa0, 0xb0, 0x98, 0x9c, 0x8c, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * *** * ** * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * ** * ** * *** * ** * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * *** * ** * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf4): bbw=11, bbh=13, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x20, 0xb0, 0x98, 0x98, 0x98, 0xb0, 0x20, 0x00, 0x00, 0x00, /* * ** * ** * ** * ** * ** * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * ** * ** * ** * ** * ** * * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ** * ** * ** * ** * ** * * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf5): bbw=11, bbh=13, bbx=0, bby=0, width=12 */ +0x00, 0x20, 0x10, 0x98, 0x98, 0xb0, 0xb0, 0x90, 0x08, 0x00, 0x00, 0x00, /* * * ** * ** * ** * ** * * * * */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * * ** * ** * ** * ** * * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * ** * ** * ** * ** * * * * ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf6): bbw=11, bbh=12, bbx=0, bby=0, width=12 */ +0x00, 0x00, 0x00, 0xb0, 0xb0, 0x80, 0x80, 0xb0, 0x30, 0x00, 0x00, 0x00, /* ** * ** * * * ** * ** */ +0x3e, 0x7f, 0x7f, 0xc1, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* ** * ** * * * ** * ** ***** ******* ******* * ** * * ** ********* ******* ***** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** * ** * * * ** * ** ***** ******* ******* * ** * * ** ********* ******* ***** */ + +/* Character (0xf7): bbw=10, bbh=10, bbx=0, bby=0, width=11 */ +0x00, 0x00, 0x00, 0x00, 0xc0, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** */ +0x0c, 0x0c, 0x0c, 0x0c, 0xcc, 0xcc, 0x0c, 0x0c, 0x0c, 0x0c, 0x00, /* ** ** ** ** ** ** ** ** ** ** ** ** ** ** */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* ** ** ** ** ** ** ** ** ** ** ** ** ** ** */ + +/* Character (0xf8): bbw=10, bbh=11, bbx=0, bby=-1, width=11 */ +0x00, 0x00, 0x00, 0x80, 0x80, 0x80, 0x80, 0xc0, 0x00, 0x00, 0x00, /* * * * * ** */ +0x3e, 0x7f, 0xff, 0xc1, 0xb0, 0x8c, 0xc3, 0x7f, 0x7f, 0x3e, 0x00, /* * * * * ** ***** ******* ********* ** ** * ** *** ********* ******* ***** */ +0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * ** ***** ******* ********* ** ** * ** *** ********* ******* ***** * */ + +/* Character (0xf9): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0x8c, 0x1c, 0x18, 0x30, 0xa0, 0x80, 0x80, 0x80, 0x00, 0x00, /* * * * ** * *** ** ** * * * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * ** * *** ** ** * * * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * *** ** ** * * * * * ******* **************** ** * * * ************************ * */ + +/* Character (0xfa): bbw=12, bbh=14, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0x80, 0x20, 0x30, 0x18, 0x9c, 0x8c, 0x80, 0x80, 0x00, 0x00, /* * * * * * ** ** *** * ** * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * ** ** *** * ** * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ** ** *** * ** * * * ******* **************** ** * * * ************************ * */ + +/* Character (0xfb): bbw=12, bbh=13, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0xa0, 0x30, 0x18, 0x18, 0x98, 0xb0, 0xa0, 0x80, 0x00, 0x00, /* * * * * * ** ** ** ** * ** * * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * * * ** ** ** ** * ** * * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * ** ** ** ** * ** * * * * ******* **************** ** * * * ************************ * */ + +/* Character (0xfc): bbw=12, bbh=12, bbx=0, bby=0, width=13 */ +0x80, 0x80, 0x80, 0xb0, 0x30, 0x00, 0x00, 0xb0, 0xb0, 0x80, 0x80, 0x00, 0x00, /* * * * ** * ** ** * ** * * * */ +0x00, 0x7f, 0xff, 0xff, 0xc0, 0x80, 0x80, 0x40, 0xff, 0xff, 0xff, 0x80, 0x00, /* * * * ** * ** ** * ** * * * ******* **************** ** * * * ************************ * */ +0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * ** ** * ** * * * ******* **************** ** * * * ************************ * */ + +/* Character (0xfd): bbw=11, bbh=18, bbx=0, bby=-4, width=12 */ +0x80, 0x80, 0x80, 0x80, 0xa0, 0x30, 0x18, 0x1c, 0x8c, 0x80, 0x80, 0x00, /* * * * * * * ** ** *** ** * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0xc0, 0x30, 0x0c, 0x03, 0x00, 0x00, /* * * * * * * ** ** *** ** * * * ** **** ****** ****** **** ** ** ** ** */ +0x06, 0x0e, 0x0c, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * * * * ** ** *** ** * * * ** **** ****** ****** **** ** ** ** ** ** *** ** * * ** */ + +/* Character (0xfe): bbw=12, bbh=18, bbx=0, bby=-4, width=13 */ +0x04, 0xfc, 0xfc, 0xfc, 0x00, 0x80, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * */ +0x00, 0xff, 0xff, 0xff, 0x41, 0x80, 0x80, 0x80, 0xc1, 0x7f, 0x7f, 0x3e, 0x00, /* * ****** ****** ****** * * * * ************************* * * * ** ********* ******* ***** */ +0x08, 0x0f, 0x0f, 0x0f, 0x08, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * ****** ****** ****** * * * * ************************* * * * ** ********* ******* ***** ************* * */ + +/* Character (0xff): bbw=11, bbh=16, bbx=0, bby=-4, width=12 */ +0x80, 0x80, 0x80, 0xb0, 0xb0, 0x00, 0x00, 0x30, 0xb0, 0x80, 0x80, 0x00, /* * * * ** * ** * ** ** * * * */ +0x00, 0x03, 0x0f, 0x3f, 0xfc, 0xf0, 0xc0, 0x30, 0x0c, 0x03, 0x00, 0x00, /* * * * ** * ** * ** ** * * * ** **** ****** ****** **** ** ** ** ** */ +0x06, 0x0e, 0x0c, 0x08, 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* * * * ** * ** * ** ** * * * ** **** ****** ****** **** ** ** ** ** ** *** ** * * ** */ +}; + +/* Character->glyph data. */ +static const PROGMEM uint16_t ncenB18_offset[] = { + 0, /* (0x00) */ + 0, /* (0x01) */ + 0, /* (0x02) */ + 0, /* (0x03) */ + 0, /* (0x04) */ + 0, /* (0x05) */ + 0, /* (0x06) */ + 0, /* (0x07) */ + 0, /* (0x08) */ + 0, /* (0x09) */ + 0, /* (0x0a) */ + 0, /* (0x0b) */ + 0, /* (0x0c) */ + 0, /* (0x0d) */ + 0, /* (0x0e) */ + 0, /* (0x0f) */ + 0, /* (0x10) */ + 0, /* (0x11) */ + 0, /* (0x12) */ + 0, /* (0x13) */ + 0, /* (0x14) */ + 0, /* (0x15) */ + 0, /* (0x16) */ + 0, /* (0x17) */ + 0, /* (0x18) */ + 0, /* (0x19) */ + 0, /* (0x1a) */ + 0, /* (0x1b) */ + 0, /* (0x1c) */ + 0, /* (0x1d) */ + 0, /* (0x1e) */ + 0, /* (0x1f) */ + 48, /* (0x20) */ + 63, /* (0x21) */ + 81, /* (0x22) */ + 105, /* (0x23) */ + 141, /* (0x24) */ + 174, /* (0x25) */ + 219, /* (0x26) */ + 270, /* (0x27) */ + 285, /* (0x28) */ + 303, /* (0x29) */ + 321, /* (0x2a) */ + 345, /* (0x2b) */ + 378, /* (0x2c) */ + 393, /* (0x2d) */ + 411, /* (0x2e) */ + 426, /* (0x2f) */ + 447, /* (0x30) */ + 480, /* (0x31) */ + 513, /* (0x32) */ + 546, /* (0x33) */ + 579, /* (0x34) */ + 612, /* (0x35) */ + 645, /* (0x36) */ + 678, /* (0x37) */ + 711, /* (0x38) */ + 744, /* (0x39) */ + 777, /* (0x3a) */ + 795, /* (0x3b) */ + 813, /* (0x3c) */ + 846, /* (0x3d) */ + 879, /* (0x3e) */ + 912, /* (0x3f) */ + 942, /* (0x40) */ + 990, /* (0x41) */ + 1032, /* (0x42) */ + 1074, /* (0x43) */ + 1116, /* (0x44) */ + 1164, /* (0x45) */ + 1203, /* (0x46) */ + 1242, /* (0x47) */ + 1287, /* (0x48) */ + 1335, /* (0x49) */ + 1362, /* (0x4a) */ + 1398, /* (0x4b) */ + 1446, /* (0x4c) */ + 1482, /* (0x4d) */ + 1539, /* (0x4e) */ + 1587, /* (0x4f) */ + 1635, /* (0x50) */ + 1677, /* (0x51) */ + 1725, /* (0x52) */ + 1773, /* (0x53) */ + 1809, /* (0x54) */ + 1848, /* (0x55) */ + 1896, /* (0x56) */ + 1938, /* (0x57) */ + 1995, /* (0x58) */ + 2046, /* (0x59) */ + 2091, /* (0x5a) */ + 2130, /* (0x5b) */ + 2145, /* (0x5c) */ + 2172, /* (0x5d) */ + 2187, /* (0x5e) */ + 2214, /* (0x5f) */ + 2244, /* (0x60) */ + 2265, /* (0x61) */ + 2298, /* (0x62) */ + 2337, /* (0x63) */ + 2367, /* (0x64) */ + 2406, /* (0x65) */ + 2439, /* (0x66) */ + 2460, /* (0x67) */ + 2493, /* (0x68) */ + 2532, /* (0x69) */ + 2550, /* (0x6a) */ + 2577, /* (0x6b) */ + 2616, /* (0x6c) */ + 2634, /* (0x6d) */ + 2694, /* (0x6e) */ + 2733, /* (0x6f) */ + 2769, /* (0x70) */ + 2808, /* (0x71) */ + 2844, /* (0x72) */ + 2871, /* (0x73) */ + 2901, /* (0x74) */ + 2925, /* (0x75) */ + 2964, /* (0x76) */ + 2994, /* (0x77) */ + 3042, /* (0x78) */ + 3078, /* (0x79) */ + 3114, /* (0x7a) */ + 3144, /* (0x7b) */ + 3162, /* (0x7c) */ + 3195, /* (0x7d) */ + 3213, /* (0x7e) */ + 0, /* (0x7f) */ + 0, /* (0x80) */ + 0, /* (0x81) */ + 0, /* (0x82) */ + 0, /* (0x83) */ + 0, /* (0x84) */ + 0, /* (0x85) */ + 0, /* (0x86) */ + 0, /* (0x87) */ + 0, /* (0x88) */ + 0, /* (0x89) */ + 0, /* (0x8a) */ + 0, /* (0x8b) */ + 0, /* (0x8c) */ + 0, /* (0x8d) */ + 0, /* (0x8e) */ + 0, /* (0x8f) */ + 0, /* (0x90) */ + 0, /* (0x91) */ + 0, /* (0x92) */ + 0, /* (0x93) */ + 0, /* (0x94) */ + 0, /* (0x95) */ + 0, /* (0x96) */ + 0, /* (0x97) */ + 0, /* (0x98) */ + 0, /* (0x99) */ + 0, /* (0x9a) */ + 0, /* (0x9b) */ + 0, /* (0x9c) */ + 0, /* (0x9d) */ + 0, /* (0x9e) */ + 0, /* (0x9f) */ + 3249, /* (0xa0) */ + 3264, /* (0xa1) */ + 3285, /* (0xa2) */ + 3318, /* (0xa3) */ + 3351, /* (0xa4) */ + 3381, /* (0xa5) */ + 3426, /* (0xa6) */ + 3459, /* (0xa7) */ + 3483, /* (0xa8) */ + 3513, /* (0xa9) */ + 3558, /* (0xaa) */ + 3582, /* (0xab) */ + 3609, /* (0xac) */ + 3639, /* (0xad) */ + 3657, /* (0xae) */ + 3702, /* (0xaf) */ + 3726, /* (0xb0) */ + 3747, /* (0xb1) */ + 3780, /* (0xb2) */ + 3798, /* (0xb3) */ + 3816, /* (0xb4) */ + 3837, /* (0xb5) */ + 3876, /* (0xb6) */ + 3918, /* (0xb7) */ + 3933, /* (0xb8) */ + 3951, /* (0xb9) */ + 3969, /* (0xba) */ + 3990, /* (0xbb) */ + 4017, /* (0xbc) */ + 4062, /* (0xbd) */ + 4107, /* (0xbe) */ + 4152, /* (0xbf) */ + 4182, /* (0xc0) */ + 4224, /* (0xc1) */ + 4266, /* (0xc2) */ + 4308, /* (0xc3) */ + 4350, /* (0xc4) */ + 4392, /* (0xc5) */ + 4434, /* (0xc6) */ + 4497, /* (0xc7) */ + 4539, /* (0xc8) */ + 4578, /* (0xc9) */ + 4617, /* (0xca) */ + 4656, /* (0xcb) */ + 4695, /* (0xcc) */ + 4722, /* (0xcd) */ + 4749, /* (0xce) */ + 4776, /* (0xcf) */ + 4803, /* (0xd0) */ + 4851, /* (0xd1) */ + 4899, /* (0xd2) */ + 4947, /* (0xd3) */ + 4995, /* (0xd4) */ + 5043, /* (0xd5) */ + 5091, /* (0xd6) */ + 5139, /* (0xd7) */ + 5172, /* (0xd8) */ + 5220, /* (0xd9) */ + 5268, /* (0xda) */ + 5316, /* (0xdb) */ + 5364, /* (0xdc) */ + 5412, /* (0xdd) */ + 5457, /* (0xde) */ + 5499, /* (0xdf) */ + 5535, /* (0xe0) */ + 5568, /* (0xe1) */ + 5601, /* (0xe2) */ + 5634, /* (0xe3) */ + 5667, /* (0xe4) */ + 5700, /* (0xe5) */ + 5733, /* (0xe6) */ + 5784, /* (0xe7) */ + 5814, /* (0xe8) */ + 5847, /* (0xe9) */ + 5880, /* (0xea) */ + 5913, /* (0xeb) */ + 5946, /* (0xec) */ + 5964, /* (0xed) */ + 5982, /* (0xee) */ + 6003, /* (0xef) */ + 6021, /* (0xf0) */ + 6057, /* (0xf1) */ + 6096, /* (0xf2) */ + 6132, /* (0xf3) */ + 6168, /* (0xf4) */ + 6204, /* (0xf5) */ + 6240, /* (0xf6) */ + 6276, /* (0xf7) */ + 6309, /* (0xf8) */ + 6342, /* (0xf9) */ + 6381, /* (0xfa) */ + 6420, /* (0xfb) */ + 6459, /* (0xfc) */ + 6498, /* (0xfd) */ + 6534, /* (0xfe) */ + 6573, /* (0xff) */ +}; + +/* Character width data. */ +static const PROGMEM uint8_t ncenB18_width[] = { + 16, /* (0x00) */ + 16, /* (0x01) */ + 16, /* (0x02) */ + 16, /* (0x03) */ + 16, /* (0x04) */ + 16, /* (0x05) */ + 16, /* (0x06) */ + 16, /* (0x07) */ + 16, /* (0x08) */ + 16, /* (0x09) */ + 16, /* (0x0a) */ + 16, /* (0x0b) */ + 16, /* (0x0c) */ + 16, /* (0x0d) */ + 16, /* (0x0e) */ + 16, /* (0x0f) */ + 16, /* (0x10) */ + 16, /* (0x11) */ + 16, /* (0x12) */ + 16, /* (0x13) */ + 16, /* (0x14) */ + 16, /* (0x15) */ + 16, /* (0x16) */ + 16, /* (0x17) */ + 16, /* (0x18) */ + 16, /* (0x19) */ + 16, /* (0x1a) */ + 16, /* (0x1b) */ + 16, /* (0x1c) */ + 16, /* (0x1d) */ + 16, /* (0x1e) */ + 16, /* (0x1f) */ + 5, /* (0x20) */ + 6, /* (0x21) */ + 8, /* (0x22) */ + 12, /* (0x23) */ + 11, /* (0x24) */ + 15, /* (0x25) */ + 17, /* (0x26) */ + 5, /* (0x27) */ + 6, /* (0x28) */ + 6, /* (0x29) */ + 8, /* (0x2a) */ + 11, /* (0x2b) */ + 5, /* (0x2c) */ + 6, /* (0x2d) */ + 5, /* (0x2e) */ + 7, /* (0x2f) */ + 11, /* (0x30) */ + 11, /* (0x31) */ + 11, /* (0x32) */ + 11, /* (0x33) */ + 11, /* (0x34) */ + 11, /* (0x35) */ + 11, /* (0x36) */ + 11, /* (0x37) */ + 11, /* (0x38) */ + 11, /* (0x39) */ + 6, /* (0x3a) */ + 6, /* (0x3b) */ + 11, /* (0x3c) */ + 11, /* (0x3d) */ + 11, /* (0x3e) */ + 10, /* (0x3f) */ + 16, /* (0x40) */ + 14, /* (0x41) */ + 14, /* (0x42) */ + 14, /* (0x43) */ + 16, /* (0x44) */ + 13, /* (0x45) */ + 13, /* (0x46) */ + 15, /* (0x47) */ + 16, /* (0x48) */ + 9, /* (0x49) */ + 12, /* (0x4a) */ + 16, /* (0x4b) */ + 12, /* (0x4c) */ + 19, /* (0x4d) */ + 16, /* (0x4e) */ + 16, /* (0x4f) */ + 14, /* (0x50) */ + 16, /* (0x51) */ + 16, /* (0x52) */ + 12, /* (0x53) */ + 13, /* (0x54) */ + 16, /* (0x55) */ + 14, /* (0x56) */ + 19, /* (0x57) */ + 17, /* (0x58) */ + 15, /* (0x59) */ + 13, /* (0x5a) */ + 5, /* (0x5b) */ + 9, /* (0x5c) */ + 5, /* (0x5d) */ + 9, /* (0x5e) */ + 10, /* (0x5f) */ + 7, /* (0x60) */ + 11, /* (0x61) */ + 13, /* (0x62) */ + 10, /* (0x63) */ + 13, /* (0x64) */ + 11, /* (0x65) */ + 7, /* (0x66) */ + 11, /* (0x67) */ + 13, /* (0x68) */ + 6, /* (0x69) */ + 9, /* (0x6a) */ + 13, /* (0x6b) */ + 6, /* (0x6c) */ + 20, /* (0x6d) */ + 13, /* (0x6e) */ + 12, /* (0x6f) */ + 13, /* (0x70) */ + 12, /* (0x71) */ + 9, /* (0x72) */ + 10, /* (0x73) */ + 8, /* (0x74) */ + 13, /* (0x75) */ + 10, /* (0x76) */ + 16, /* (0x77) */ + 12, /* (0x78) */ + 12, /* (0x79) */ + 10, /* (0x7a) */ + 6, /* (0x7b) */ + 11, /* (0x7c) */ + 6, /* (0x7d) */ + 12, /* (0x7e) */ + 16, /* (0x7f) */ + 16, /* (0x80) */ + 16, /* (0x81) */ + 16, /* (0x82) */ + 16, /* (0x83) */ + 16, /* (0x84) */ + 16, /* (0x85) */ + 16, /* (0x86) */ + 16, /* (0x87) */ + 16, /* (0x88) */ + 16, /* (0x89) */ + 16, /* (0x8a) */ + 16, /* (0x8b) */ + 16, /* (0x8c) */ + 16, /* (0x8d) */ + 16, /* (0x8e) */ + 16, /* (0x8f) */ + 16, /* (0x90) */ + 16, /* (0x91) */ + 16, /* (0x92) */ + 16, /* (0x93) */ + 16, /* (0x94) */ + 16, /* (0x95) */ + 16, /* (0x96) */ + 16, /* (0x97) */ + 16, /* (0x98) */ + 16, /* (0x99) */ + 16, /* (0x9a) */ + 16, /* (0x9b) */ + 16, /* (0x9c) */ + 16, /* (0x9d) */ + 16, /* (0x9e) */ + 16, /* (0x9f) */ + 5, /* (0xa0) */ + 7, /* (0xa1) */ + 11, /* (0xa2) */ + 11, /* (0xa3) */ + 10, /* (0xa4) */ + 15, /* (0xa5) */ + 11, /* (0xa6) */ + 8, /* (0xa7) */ + 10, /* (0xa8) */ + 15, /* (0xa9) */ + 8, /* (0xaa) */ + 9, /* (0xab) */ + 10, /* (0xac) */ + 6, /* (0xad) */ + 15, /* (0xae) */ + 8, /* (0xaf) */ + 7, /* (0xb0) */ + 11, /* (0xb1) */ + 6, /* (0xb2) */ + 6, /* (0xb3) */ + 7, /* (0xb4) */ + 13, /* (0xb5) */ + 14, /* (0xb6) */ + 5, /* (0xb7) */ + 6, /* (0xb8) */ + 6, /* (0xb9) */ + 7, /* (0xba) */ + 9, /* (0xbb) */ + 15, /* (0xbc) */ + 15, /* (0xbd) */ + 15, /* (0xbe) */ + 10, /* (0xbf) */ + 14, /* (0xc0) */ + 14, /* (0xc1) */ + 14, /* (0xc2) */ + 14, /* (0xc3) */ + 14, /* (0xc4) */ + 14, /* (0xc5) */ + 21, /* (0xc6) */ + 14, /* (0xc7) */ + 13, /* (0xc8) */ + 13, /* (0xc9) */ + 13, /* (0xca) */ + 13, /* (0xcb) */ + 9, /* (0xcc) */ + 9, /* (0xcd) */ + 9, /* (0xce) */ + 9, /* (0xcf) */ + 16, /* (0xd0) */ + 16, /* (0xd1) */ + 16, /* (0xd2) */ + 16, /* (0xd3) */ + 16, /* (0xd4) */ + 16, /* (0xd5) */ + 16, /* (0xd6) */ + 11, /* (0xd7) */ + 16, /* (0xd8) */ + 16, /* (0xd9) */ + 16, /* (0xda) */ + 16, /* (0xdb) */ + 16, /* (0xdc) */ + 15, /* (0xdd) */ + 14, /* (0xde) */ + 12, /* (0xdf) */ + 11, /* (0xe0) */ + 11, /* (0xe1) */ + 11, /* (0xe2) */ + 11, /* (0xe3) */ + 11, /* (0xe4) */ + 11, /* (0xe5) */ + 17, /* (0xe6) */ + 10, /* (0xe7) */ + 11, /* (0xe8) */ + 11, /* (0xe9) */ + 11, /* (0xea) */ + 11, /* (0xeb) */ + 6, /* (0xec) */ + 6, /* (0xed) */ + 7, /* (0xee) */ + 6, /* (0xef) */ + 12, /* (0xf0) */ + 13, /* (0xf1) */ + 12, /* (0xf2) */ + 12, /* (0xf3) */ + 12, /* (0xf4) */ + 12, /* (0xf5) */ + 12, /* (0xf6) */ + 11, /* (0xf7) */ + 11, /* (0xf8) */ + 13, /* (0xf9) */ + 13, /* (0xfa) */ + 13, /* (0xfb) */ + 13, /* (0xfc) */ + 12, /* (0xfd) */ + 13, /* (0xfe) */ + 12, /* (0xff) */ +}; + +/* Font structure definition. */ +EXTERN_CONST Font font_ncenB18 = +{ + /* .glyph = */ font_ncenB18_glyphs, + /* .name = "ncenB18", */ + /* .width = */ 21, + /* .height = */ 20, + /* .ascent = 16, */ + /* .first = */ 0, + /* .last = */ 255, + /* .offset = */ ncenB18_offset, + /* .width = */ ncenB18_width, +}; diff --git a/bertos/fs/battfs.c b/bertos/fs/battfs.c new file mode 100644 index 0000000..f40d310 --- /dev/null +++ b/bertos/fs/battfs.c @@ -0,0 +1,1033 @@ +/** + * \file + * + * + * \brief BattFS: a filesystem for embedded platforms (implementation). + * + * + * \author Francesco Sacchi + * + */ + +#include "battfs.h" +#include "cfg/cfg_battfs.h" +#include +#include /* MIN, MAX */ +#include +#include /* cpu_to_xx */ + +#define LOG_LEVEL BATTFS_LOG_LEVEL +#define LOG_FORMAT BATTFS_LOG_FORMAT +#include + +#include /* memset, memmove */ + +#if LOG_LEVEL >= LOG_LVL_INFO +static void dumpPageArray(struct BattFsSuper *disk) +{ + kprintf("Page array dump, free_page_start %d:", disk->free_page_start); + for (pgcnt_t i = 0; i < disk->dev->blk_cnt; i++) + { + if (!(i % 16)) + kputchar('\n'); + kprintf("%04d ", disk->page_array[i]); + } + kputchar('\n'); +} +#endif + +/** + * Convert from memory representation to disk structure. + * \note filesystem is in little-endian format. + */ +INLINE void battfs_to_disk(struct BattFsPageHeader *hdr, uint8_t *buf) +{ + STATIC_ASSERT(BATTFS_HEADER_LEN == 12); + buf[0] = hdr->inode; + + buf[1] = hdr->fill; + buf[2] = hdr->fill >> 8; + + buf[3] = hdr->pgoff; + buf[4] = hdr->pgoff >> 8; + + /* + * Sequence number is 40 bits long. + * No need to take care of wraparonds: the memory will die first! + */ + buf[5] = hdr->seq; + buf[6] = hdr->seq >> 8; + buf[7] = hdr->seq >> 16; + buf[8] = hdr->seq >> 24; + buf[9] = hdr->seq >> 32; + + /* + * This field must be the last one! + * This is needed because if the page is only partially + * written, we can use this to detect it. + */ + buf[10] = hdr->fcs; + buf[11] = hdr->fcs >> 8; +} + +/** + * Convert from disk structure to memory representation. + * \note filesystem is in little-endian format. + */ +INLINE void disk_to_battfs(uint8_t *buf, struct BattFsPageHeader *hdr) +{ + STATIC_ASSERT(BATTFS_HEADER_LEN == 12); + hdr->inode = buf[0]; + hdr->fill = buf[2] << 8 | buf[1]; + hdr->pgoff = buf[4] << 8 | buf[3]; + hdr->seq = (seq_t)buf[9] << 32 | (seq_t)buf[8] << 24 | (seq_t)buf[7] << 16 | buf[6] << 8 | buf[5]; + hdr->fcs = buf[11] << 8 | buf[10]; +} + +/** + * Compute the fcs of the header. + */ +static fcs_t computeFcs(struct BattFsPageHeader *hdr) +{ + uint8_t buf[BATTFS_HEADER_LEN]; + fcs_t cks; + + battfs_to_disk(hdr, buf); + rotating_init(&cks); + /* fcs is at the end of whole header */ + rotating_update(buf, BATTFS_HEADER_LEN - sizeof(fcs_t), &cks); + return cks; +} + +/** + * Read header of \a page in \a hdr. + * \return true on success, false otherwise. + */ +static bool readHdr(struct BattFsSuper *disk, pgcnt_t page, struct BattFsPageHeader *hdr) +{ + uint8_t buf[BATTFS_HEADER_LEN]; + + /* + * Read header from disk. + * Header is actually a footer, and so + * resides at page end. + */ + if (kblock_read(disk->dev, page, buf, disk->data_size, BATTFS_HEADER_LEN) + != BATTFS_HEADER_LEN) + { + LOG_ERR("page[%d]\n", page); + return false; + } + + /* Fill header */ + disk_to_battfs(buf, hdr); + + return true; +} + +static bool writeHdr(struct BattFsSuper *disk, pgcnt_t page, struct BattFsPageHeader *hdr) +{ + uint8_t buf[BATTFS_HEADER_LEN]; + + #warning FIXME:refactor computeFcs to save time and stack + hdr->fcs = computeFcs(hdr); + /* Fill buffer */ + battfs_to_disk(hdr, buf); + + /* + * write header to disk. + * Header is actually a footer, and so + * resides at page end. + */ + if (kblock_write(disk->dev, page, buf, disk->data_size, BATTFS_HEADER_LEN) + != BATTFS_HEADER_LEN) + { + LOG_ERR("writing to buffer\n"); + return false; + } + return true; +} + + +/** + * Count the number of pages from + * inode 0 to \a inode in \a filelen_table. + */ +static pgcnt_t countPages(pgoff_t *filelen_table, inode_t inode) +{ + pgcnt_t cnt = 0; + + for (inode_t i = 0; i < inode; i++) + cnt += filelen_table[i]; + + return cnt; +} + +/** + * Move all pages in page allocation array from \a src to \a src + \a offset. + * The number of pages moved is page_count - MAX(dst, src). + */ +static void movePages(struct BattFsSuper *disk, pgcnt_t src, int offset) +{ + pgcnt_t dst = src + offset; + LOG_INFO("src %d, offset %d, size %d\n", src, offset, (unsigned int)((disk->dev->blk_cnt - MAX(dst, src)) * sizeof(pgcnt_t))); + memmove(&disk->page_array[dst], &disk->page_array[src], (disk->dev->blk_cnt - MAX(dst, src)) * sizeof(pgcnt_t)); + + if (offset < 0) + { + /* Fill empty space in array with sentinel */ + for (pgcnt_t page = disk->dev->blk_cnt + offset; page < disk->dev->blk_cnt; page++) + disk->page_array[page] = PAGE_UNSET_SENTINEL; + } +} + +/** + * Count number of pages per file on \a disk. + * This information is registered in \a filelen_table. + * Array index represent file inode, while value contained + * is the number of pages used by that file. + * + * \return true if ok, false on disk read errors. + * \note The whole disk is scanned once. + */ +static bool countDiskFilePages(struct BattFsSuper *disk, pgoff_t *filelen_table) +{ + BattFsPageHeader hdr; + disk->free_page_start = 0; + + /* Count the number of disk page per file */ + for (pgcnt_t page = 0; page < disk->dev->blk_cnt; page++) + { + if (!readHdr(disk, page, &hdr)) + return false; + + /* Increase free space */ + disk->free_bytes += disk->data_size; + + /* Check header FCS */ + if (hdr.fcs == computeFcs(&hdr)) + { + ASSERT(hdr.fill <= disk->data_size); + + /* Page is valid and is owned by a file */ + filelen_table[hdr.inode]++; + + /* Keep trace of free space */ + disk->free_bytes -= hdr.fill; + disk->free_page_start++; + } + } + LOG_INFO("free_bytes:%ld, free_page_start:%d\n", (long)disk->free_bytes, disk->free_page_start); + + return true; +} + +/** + * Fill page allocation array of \a disk + * using file lenghts in \a filelen_table. + * + * The page allocation array is an array containings all file infos. + * Is ordered by file, and within each file is ordered by page offset + * inside file. + * e.g. : at page array[0] you will find page address of the first page + * of the first file (if present). + * Free blocks are allocated after the last file. + * + * \return true if ok, false on disk read errors. + * \note The whole disk is scanned at max twice. + */ +static bool fillPageArray(struct BattFsSuper *disk, pgoff_t *filelen_table) +{ + BattFsPageHeader hdr; + pgcnt_t curr_free_page = disk->free_page_start; + /* Fill page allocation array */ + for (pgcnt_t page = 0; page < disk->dev->blk_cnt; page++) + { + if (!readHdr(disk, page, &hdr)) + return false; + + /* Check header FCS */ + if (hdr.fcs == computeFcs(&hdr)) + { + /* Compute array position */ + pgcnt_t array_pos = countPages(filelen_table, hdr.inode); + array_pos += hdr.pgoff; + + + /* Check if position is already used by another page of the same file */ + if (disk->page_array[array_pos] == PAGE_UNSET_SENTINEL) + disk->page_array[array_pos] = page; + else + { + BattFsPageHeader hdr_prv; + + if (!readHdr(disk, disk->page_array[array_pos], &hdr_prv)) + return false; + + /* Check header FCS */ + ASSERT(hdr_prv.fcs == computeFcs(&hdr_prv)); + + /* Only the very same page with a different seq number can be here */ + ASSERT(hdr.inode == hdr_prv.inode); + ASSERT(hdr.pgoff == hdr_prv.pgoff); + ASSERT(hdr.seq != hdr_prv.seq); + + pgcnt_t new_page, old_page; + fill_t old_fill; + + /* + * Sequence number comparison: since + * seq is 40 bits wide, it wraps once + * every 1.1E12 times. + * The memory will not live enough to + * see a wraparound, so we can use a simple + * compare here. + */ + if (hdr.seq > hdr_prv.seq) + { + /* Current header is newer than the previuos one */ + old_page = disk->page_array[array_pos]; + new_page = page; + old_fill = hdr_prv.fill; + } + else + { + /* Previous header is newer than the current one */ + old_page = page; + new_page = disk->page_array[array_pos]; + old_fill = hdr.fill; + } + + /* Set new page */ + disk->page_array[array_pos] = new_page; + /* Add free space */ + disk->free_bytes += old_fill; + /* Shift all array one position to the left, overwriting duplicate page */ + array_pos -= hdr.pgoff; + array_pos += filelen_table[hdr.inode]; + movePages(disk, array_pos, -1); + /* Move back all indexes */ + filelen_table[hdr.inode]--; + disk->free_page_start--; + curr_free_page--; + /* Set old page as free */ + ASSERT(disk->page_array[curr_free_page] == PAGE_UNSET_SENTINEL); + disk->page_array[curr_free_page++] = old_page; + + } + } + else + { + /* Invalid page, keep as free */ + ASSERT(disk->page_array[curr_free_page] == PAGE_UNSET_SENTINEL); + //LOG_INFO("Page %d invalid, keeping as free\n", page); + disk->page_array[curr_free_page++] = page; + } + } + return true; +} + + +/** + * Initialize and mount disk described by + * \a disk. + * \return false on errors, true otherwise. + */ +bool battfs_mount(struct BattFsSuper *disk, struct KBlock *dev, pgcnt_t *page_array, size_t array_size) +{ + pgoff_t filelen_table[BATTFS_MAX_FILES]; + + ASSERT(dev); + ASSERT(kblock_partialWrite(dev)); + disk->dev = dev; + + ASSERT(disk->dev->blk_size > BATTFS_HEADER_LEN); + /* Fill page_size with the usable space */ + disk->data_size = disk->dev->blk_size - BATTFS_HEADER_LEN; + ASSERT(disk->dev->blk_cnt); + ASSERT(disk->dev->blk_cnt < PAGE_UNSET_SENTINEL - 1); + ASSERT(page_array); + disk->page_array = page_array; + ASSERT(array_size >= disk->dev->blk_cnt * sizeof(pgcnt_t)); + + memset(filelen_table, 0, BATTFS_MAX_FILES * sizeof(pgoff_t)); + + disk->free_bytes = 0; + disk->disk_size = (disk_size_t)disk->data_size * disk->dev->blk_cnt; + + /* Count pages per file */ + if (!countDiskFilePages(disk, filelen_table)) + { + LOG_ERR("counting file pages\n"); + return false; + } + + /* Once here, we have filelen_table filled with file lengths */ + + /* Fill page array with sentinel */ + for (pgcnt_t page = 0; page < disk->dev->blk_cnt; page++) + disk->page_array[page] = PAGE_UNSET_SENTINEL; + + /* Fill page allocation array using filelen_table */ + if (!fillPageArray(disk, filelen_table)) + { + LOG_ERR("filling page array\n"); + return false; + } + #if LOG_LEVEL >= LOG_LVL_INFO + dumpPageArray(disk); + #endif + #if CONFIG_BATTFS_SHUFFLE_FREE_PAGES + SHUFFLE(&disk->page_array[disk->free_page_start], disk->dev->blk_cnt - disk->free_page_start); + + LOG_INFO("Page array after shuffle:\n"); + #if LOG_LEVEL >= LOG_LVL_INFO + dumpPageArray(disk); + #endif + #endif + /* Init list for opened files. */ + LIST_INIT(&disk->file_opened_list); + return true; +} + +/** + * Check the filesystem. + * \return true if ok, false on errors. + */ +bool battfs_fsck(struct BattFsSuper *disk) +{ + #define FSCHECK(cond) do { if(!(cond)) { LOG_ERR("\"" #cond "\"\n"); return false; } } while (0) + + FSCHECK(disk->free_page_start <= disk->dev->blk_cnt); + FSCHECK(disk->data_size < disk->dev->blk_size); + FSCHECK(disk->free_bytes <= disk->disk_size); + + disk_size_t free_bytes = 0; + BattFsPageHeader hdr, prev_hdr; + inode_t files = 0; + pgcnt_t page_used = 0; + + bool start = true; + + /* Uneeded, the first time will be overwritten but useful to silence + * the warning for uninitialized value */ + FSCHECK(readHdr(disk, 0, &prev_hdr)); + for (pgcnt_t page = 0; page < disk->dev->blk_cnt; page++) + { + FSCHECK(readHdr(disk, disk->page_array[page], &hdr)); + free_bytes += disk->data_size; + + if (page < disk->free_page_start) + { + FSCHECK(computeFcs(&hdr) == hdr.fcs); + page_used++; + free_bytes -= hdr.fill; + if (hdr.inode != prev_hdr.inode || start) + { + if (LIKELY(!start)) + FSCHECK(hdr.inode > prev_hdr.inode); + else + start = false; + + FSCHECK(hdr.pgoff == 0); + files++; + } + else + { + FSCHECK(hdr.fill != 0); + FSCHECK(prev_hdr.fill == disk->data_size); + FSCHECK(hdr.pgoff == prev_hdr.pgoff + 1); + } + prev_hdr = hdr; + } + } + + FSCHECK(page_used == disk->free_page_start); + FSCHECK(free_bytes == disk->free_bytes); + + return true; +} + +/** + * Flush file \a fd. + * \return 0 if ok, EOF on errors. + */ +static int battfs_flush(struct KFile *fd) +{ + BattFs *fdb = BATTFS_CAST(fd); + + if (kblock_flush(fdb->disk->dev) == 0) + return 0; + else + { + fdb->errors |= BATTFS_DISK_FLUSHBUF_ERR; + return EOF; + } +} + +/** + * Close file \a fd. + * \return 0 if ok, EOF on errors. + */ +static int battfs_fileclose(struct KFile *fd) +{ + BattFs *fdb = BATTFS_CAST(fd); + + if (battfs_flush(fd) == 0) + { + REMOVE(&fdb->link); + return 0; + } + else + return EOF; +} + +#define NO_SPACE PAGE_UNSET_SENTINEL + +static pgcnt_t allocateNewPage(struct BattFsSuper *disk, pgcnt_t new_pos, inode_t inode) +{ + if (SPACE_OVER(disk)) + { + LOG_ERR("No disk space available!\n"); + return NO_SPACE; + } + + LOG_INFO("Getting new page %d, pos %d\n", disk->page_array[disk->free_page_start], new_pos); + pgcnt_t new_page = disk->page_array[disk->free_page_start++]; + memmove(&disk->page_array[new_pos + 1], &disk->page_array[new_pos], (disk->free_page_start - new_pos - 1) * sizeof(pgcnt_t)); + + Node *n; + /* Move following file start point one position ahead. */ + FOREACH_NODE(n, &disk->file_opened_list) + { + BattFs *file = containerof(n, BattFs, link); + if (file->inode > inode) + { + LOG_INFO("Move file %d start pos\n", file->inode); + file->start++; + } + } + + disk->page_array[new_pos] = new_page; + return new_page; +} + +static pgcnt_t renewPage(struct BattFsSuper *disk, pgcnt_t old_pos) +{ + if (SPACE_OVER(disk)) + { + LOG_ERR("No disk space available!\n"); + return NO_SPACE; + } + + /* Get a free page */ + pgcnt_t new_page = disk->page_array[disk->free_page_start]; + movePages(disk, disk->free_page_start + 1, -1); + + /* Insert previous page in free blocks list */ + LOG_INFO("Setting page %d as free\n", old_pos); + disk->page_array[disk->dev->blk_cnt - 1] = old_pos; + return new_page; +} + +/** + * Write to file \a fd \a size bytes from \a buf. + * \return The number of bytes written. + */ +static size_t battfs_write(struct KFile *fd, const void *_buf, size_t size) +{ + BattFs *fdb = BATTFS_CAST(fd); + BattFsSuper *disk = fdb->disk; + const uint8_t *buf = (const uint8_t *)_buf; + + size_t total_write = 0; + pgoff_t pg_offset; + pgaddr_t addr_offset; + pgaddr_t wr_len; + BattFsPageHeader curr_hdr; + pgcnt_t new_page; + + if (fd->seek_pos < 0) + { + fdb->errors |= BATTFS_NEGATIVE_SEEK_ERR; + return total_write; + } + + if (fd->seek_pos > fd->size) + { + if (!readHdr(disk, fdb->start[fdb->max_off], &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_READ_ERR; + return total_write; + } + + /* + * Renew page only if is not in cache. + * This avoids rewriting the same page continuously + * if the user code keeps writing in the same portion + * of the file. + */ + if (kblock_buffered(disk->dev) + && ((fdb->start[fdb->max_off] != kblock_cachedBlock(disk->dev)) || !kblock_cacheDirty(disk->dev))) + { + new_page = renewPage(disk, fdb->start[fdb->max_off]); + if (new_page == NO_SPACE) + { + fdb->errors |= BATTFS_DISK_SPACEOVER_ERR; + return total_write; + } + + kblock_copy(disk->dev, fdb->start[fdb->max_off], new_page); + fdb->start[fdb->max_off] = new_page; + } + else + new_page = fdb->start[fdb->max_off]; + + /* Fill unused space of first page with 0s */ + uint8_t dummy = 0; + // TODO: write in blocks to speed up things + pgaddr_t zero_bytes = MIN(fd->seek_pos - fd->size, (kfile_off_t)(disk->data_size - curr_hdr.fill)); + while (zero_bytes--) + { + if (kblock_write(disk->dev, new_page, &dummy, curr_hdr.fill, 1) != 1) + { + fdb->errors |= BATTFS_DISK_WRITE_ERR; + return total_write; + } + curr_hdr.fill++; + fd->size++; + disk->free_bytes--; + } + curr_hdr.seq++; + if (!writeHdr(disk, new_page, &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_WRITE_ERR; + return total_write; + } + + /* Allocate the missing pages first. */ + pgoff_t missing_pages = fd->seek_pos / disk->data_size - fdb->max_off; + + LOG_INFO("missing pages: %d\n", missing_pages); + + while (missing_pages--) + { + zero_bytes = MIN((kfile_off_t)disk->data_size, fd->seek_pos - fd->size); + + new_page = allocateNewPage(disk, (fdb->start - disk->page_array) + fdb->max_off + 1, fdb->inode); + if (new_page == NO_SPACE) + { + fdb->errors |= BATTFS_DISK_SPACEOVER_ERR; + return total_write; + } + + + // TODO: write in blocks to speed up things + /* Fill page buffer with 0 to avoid filling unused pages with garbage */ + for (pgaddr_t off = 0; off < disk->data_size; off++) + { + if (kblock_write(disk->dev, new_page, &dummy, off, 1) != 1) + { + fdb->errors |= BATTFS_DISK_WRITE_ERR; + return total_write; + } + } + curr_hdr.inode = fdb->inode; + curr_hdr.pgoff = ++fdb->max_off; + curr_hdr.fill = zero_bytes; + curr_hdr.seq = 0; + + if (!writeHdr(disk, new_page, &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_WRITE_ERR; + return total_write; + } + + /* Update size and free space left */ + fd->size += zero_bytes; + disk->free_bytes -= zero_bytes; + } + } + + while (size) + { + pg_offset = fd->seek_pos / disk->data_size; + addr_offset = fd->seek_pos % disk->data_size; + wr_len = MIN(size, (size_t)(disk->data_size - addr_offset)); + + /* Handle write outside EOF */ + if (pg_offset > fdb->max_off) + { + LOG_INFO("New page needed, pg_offset %d, pos %d\n", pg_offset, (int)((fdb->start - disk->page_array) + pg_offset)); + + new_page = allocateNewPage(disk, (fdb->start - disk->page_array) + pg_offset, fdb->inode); + if (new_page == NO_SPACE) + { + fdb->errors |= BATTFS_DISK_SPACEOVER_ERR; + return total_write; + } + + curr_hdr.inode = fdb->inode; + curr_hdr.pgoff = pg_offset; + curr_hdr.fill = 0; + curr_hdr.seq = 0; + fdb->max_off = pg_offset; + } + else + { + if (!readHdr(disk, fdb->start[pg_offset], &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_READ_ERR; + return total_write; + } + + /* Renew page only if is not in cache. */ + if (kblock_buffered(disk->dev) + && ((fdb->start[fdb->max_off] != kblock_cachedBlock(disk->dev)) || !kblock_cacheDirty(disk->dev))) + { + new_page = renewPage(disk, fdb->start[pg_offset]); + if (new_page == NO_SPACE) + { + fdb->errors |= BATTFS_DISK_SPACEOVER_ERR; + return total_write; + } + + LOG_INFO("Re-writing page %d to %d\n", fdb->start[pg_offset], new_page); + if (kblock_copy(disk->dev, fdb->start[pg_offset], new_page) != 0) + { + fdb->errors |= BATTFS_DISK_WRITE_ERR; + return total_write; + } + fdb->start[pg_offset] = new_page; + } + else + { + LOG_INFO("Using cached block %d\n", fdb->start[pg_offset]); + new_page = fdb->start[pg_offset]; + } + + curr_hdr.seq++; + } + //LOG_INFO("writing to buffer for page %d, offset %d, size %d\n", disk->curr_page, addr_offset, wr_len); + if (kblock_write(disk->dev, new_page, buf, addr_offset, wr_len) != wr_len) + { + fdb->errors |= BATTFS_DISK_WRITE_ERR; + return total_write; + } + + size -= wr_len; + fd->seek_pos += wr_len; + total_write += wr_len; + buf += wr_len; + fill_t fill_delta = MAX((int32_t)(addr_offset + wr_len) - curr_hdr.fill, (int32_t)0); + disk->free_bytes -= fill_delta; + fd->size += fill_delta; + curr_hdr.fill += fill_delta; + + if (!writeHdr(disk, new_page, &curr_hdr)) + { + fdb->errors |= BATTFS_DISK_WRITE_ERR; + return total_write; + } + + //LOG_INFO("free_bytes %d, seek_pos %d, size %d, curr_hdr.fill %d\n", disk->free_bytes, fd->seek_pos, fd->size, curr_hdr.fill); + } + return total_write; +} + + +/** + * Read from file \a fd \a size bytes in \a buf. + * \return The number of bytes read. + */ +static size_t battfs_read(struct KFile *fd, void *_buf, size_t size) +{ + BattFs *fdb = BATTFS_CAST(fd); + BattFsSuper *disk = fdb->disk; + uint8_t *buf = (uint8_t *)_buf; + + size_t total_read = 0; + pgoff_t pg_offset; + pgaddr_t addr_offset; + pgaddr_t read_len; + + if (fd->seek_pos < 0) + { + fdb->errors |= BATTFS_NEGATIVE_SEEK_ERR; + return total_read; + } + + size = MIN((kfile_off_t)size, MAX(fd->size - fd->seek_pos, (kfile_off_t)0)); + + while (size) + { + pg_offset = fd->seek_pos / disk->data_size; + addr_offset = fd->seek_pos % disk->data_size; + read_len = MIN(size, (size_t)(disk->data_size - addr_offset)); + + //LOG_INFO("reading from page %d, offset %d, size %d\n", fdb->start[pg_offset], addr_offset, read_len); + /* Read from disk */ + if (kblock_read(disk->dev, fdb->start[pg_offset], buf, addr_offset, read_len) != read_len) + { + fdb->errors |= BATTFS_DISK_READ_ERR; + return total_read; + } + + #ifdef _DEBUG + BattFsPageHeader hdr; + readHdr(disk, fdb->start[pg_offset], &hdr); + ASSERT(hdr.inode == fdb->inode); + #endif + + size -= read_len; + fd->seek_pos += read_len; + total_read += read_len; + buf += read_len; + } + return total_read; +} + + +/** + * Search file \a inode in \a disk using a binary search. + * \a last is filled with array offset of file start + * in disk->page_array if file is found, otherwise + * \a last is filled with the correct insert position + * for creating a file with the given \a inode. + * \return true if file is found, false otherwisr. + */ +static bool findFile(BattFsSuper *disk, inode_t inode, pgcnt_t *last) +{ + BattFsPageHeader hdr; + pgcnt_t first = 0, page; + *last = disk->free_page_start; + fcs_t fcs; + + while (first < *last) + { + page = (first + *last) / 2; + LOG_INFO("first %d, last %d, page %d\n", first, *last, page); + if (!readHdr(disk, disk->page_array[page], &hdr)) + return false; + LOG_INFO("inode read: %d\n", hdr.inode); + fcs = computeFcs(&hdr); + if (hdr.fcs == fcs && hdr.inode == inode) + { + *last = page - hdr.pgoff; + LOG_INFO("Found: %d\n", *last); + return true; + } + else if (hdr.fcs == fcs && hdr.inode < inode) + first = page + 1; + else + *last = page; + } + LOG_INFO("Not found: last %d\n", *last); + return false; +} + +/** + * \return true if file \a inode exists on \a disk, false otherwise. + */ +bool battfs_fileExists(BattFsSuper *disk, inode_t inode) +{ + pgcnt_t dummy; + return findFile(disk, inode, &dummy); +} + +/** + * Count size of file \a inode on \a disk, starting at pointer \a start + * in disk->page_array. Size is written in \a size. + * \return true if all s ok, false on disk read errors. + */ +static file_size_t countFileSize(BattFsSuper *disk, pgcnt_t *start, inode_t inode) +{ + file_size_t size = 0; + BattFsPageHeader hdr; + + while (start < &disk->page_array[disk->free_page_start]) + { + if (!readHdr(disk, *start++, &hdr)) + return EOF; + if (hdr.fcs == computeFcs(&hdr) && hdr.inode == inode) + size += hdr.fill; + else + break; + } + return size; +} + +static int battfs_error(struct KFile *fd) +{ + BattFs *fdb = BATTFS_CAST(fd); + return fdb->errors; +} + + +static void battfs_clearerr(struct KFile *fd) +{ + BattFs *fdb = BATTFS_CAST(fd); + fdb->errors = 0; +} + +/** + * Open file \a inode from \a disk in \a mode. + * File context is stored in \a fd. + * \return true if ok, false otherwise. + */ +bool battfs_fileopen(BattFsSuper *disk, BattFs *fd, inode_t inode, filemode_t mode) +{ + Node *n; + + memset(fd, 0, sizeof(*fd)); + + /* Search file start point in disk page array */ + pgcnt_t start_pos; + if (!findFile(disk, inode, &start_pos)) + { + LOG_INFO("file %d not found\n", inode); + if (!(mode & BATTFS_CREATE)) + { + fd->errors |= BATTFS_FILE_NOT_FOUND_ERR; + return false; + } + /* Create the file */ + BattFsPageHeader hdr; + + if (allocateNewPage(disk, start_pos, inode) == NO_SPACE) + { + fd->errors |= BATTFS_DISK_SPACEOVER_ERR; + return false; + } + + hdr.inode = inode; + hdr.pgoff = 0; + hdr.fill = 0; + hdr.seq = 0; + if (!writeHdr(disk, disk->page_array[start_pos], &hdr)) + { + fd->errors |= BATTFS_DISK_WRITE_ERR; + return false; + } + } + fd->start = &disk->page_array[start_pos]; + LOG_INFO("Start pos %d\n", start_pos); + + /* Fill file size */ + if ((fd->fd.size = countFileSize(disk, fd->start, inode)) == EOF) + { + fd->errors |= BATTFS_DISK_READ_ERR; + return false; + } + fd->max_off = fd->fd.size / disk->data_size; + + /* Reset seek position */ + fd->fd.seek_pos = 0; + + /* Insert file handle in list, ordered by inode, ascending. */ + FOREACH_NODE(n, &disk->file_opened_list) + { + BattFs *file = containerof(n, BattFs, link); + if (file->inode >= inode) + break; + } + INSERT_BEFORE(&fd->link, n); + + /* Fill in data */ + fd->inode = inode; + fd->mode = mode; + fd->disk = disk; + + fd->fd.close = battfs_fileclose; + fd->fd.flush = battfs_flush; + fd->fd.read = battfs_read; + fd->fd.reopen = kfile_genericReopen; + fd->fd.seek = kfile_genericSeek; + fd->fd.write = battfs_write; + + fd->fd.error = battfs_error; + fd->fd.clearerr = battfs_clearerr; + + DB(fd->fd._type = KFT_BATTFS); + + return true; +} + + +/** + * Umount \a disk. + */ +bool battfs_umount(struct BattFsSuper *disk) +{ + Node *n; + int res = 0; + + /* Close all open files */ + FOREACH_NODE(n, &disk->file_opened_list) + { + BattFs *file = containerof(n, BattFs, link); + res += battfs_fileclose(&file->fd); + } + + /* Close disk */ + return (kblock_flush(disk->dev) == 0) && (kblock_close(disk->dev) == 0) && (res == 0); +} + +#if UNIT_TEST + +void battfs_writeTestBlock(KBlock *dev, pgcnt_t page, inode_t inode, seq_t seq, fill_t fill, pgoff_t pgoff) +{ + uint8_t buf[BATTFS_HEADER_LEN]; + battfs_eraseBlock(dev, page); + + BattFsPageHeader hdr; + hdr.inode = inode; + hdr.fill = fill; + hdr.pgoff = pgoff; + hdr.seq = seq; + hdr.fcs = computeFcs(&hdr); + + battfs_to_disk(&hdr, buf); + + ASSERT(kblock_write(dev, page, buf, dev->blk_size - BATTFS_HEADER_LEN, BATTFS_HEADER_LEN) == BATTFS_HEADER_LEN); + ASSERT(kblock_flush(dev) == 0); +} + +void battfs_eraseBlock(KBlock *dev, pgcnt_t page) +{ + /* Reset page to all 0xff */ + uint8_t buf[dev->blk_size]; + memset(buf, 0xFF, dev->blk_size); + ASSERT(kblock_write(dev, page, buf, 0, dev->blk_size) == dev->blk_size); + ASSERT(kblock_flush(dev) == 0); +} + +#endif diff --git a/bertos/fs/battfs.h b/bertos/fs/battfs.h new file mode 100644 index 0000000..7f9993e --- /dev/null +++ b/bertos/fs/battfs.h @@ -0,0 +1,217 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief BattFS: a filesystem for embedded platforms (interface). + * TODO: Add detailed filesystem description. + * + * $WIZ$ module_name = "battfs" + * $WIZ$ module_depends = "rotating_hash", "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_battfs.h" + */ + +#ifndef FS_BATTFS_H +#define FS_BATTFS_H + +#include // uintXX_t; STATIC_ASSERT +#include // CPU_BITS_PER_CHAR +#include +#include +#include +#include + +typedef uint16_t fill_t; ///< Type for keeping trace of space filled inside a page +typedef fill_t pgaddr_t; ///< Type for addressing space inside a page +typedef uint16_t pgcnt_t; ///< Type for counting pages on disk +typedef pgcnt_t pgoff_t; ///< Type for counting pages inside a file +typedef uint8_t inode_t; ///< Type for file inodes +typedef uint64_t seq_t; ///< Type for page seq number, at least 40bits wide. +typedef rotating_t fcs_t; ///< Type for header FCS. + + +/** + * BattFS page header, used to represent a page + * header in memory. + * To see how this is stored on disk: + * \see battfs_to_disk + * \see disk_to_battfs + */ +typedef struct BattFsPageHeader +{ + inode_t inode; ///< File inode (file identifier). + fill_t fill; ///< Filled bytes in page. + pgoff_t pgoff; ///< Page offset inside file. + + /** + * Page sequence number. + * Every time a page is rewritten the seq number is + * increased by 1. seq_t is wide enough to not to perform + * a wrap around before the memory death. + * So it can be kept as it would be + * monotonically increasing for our needs. + */ + seq_t seq; + + /** + * FCS (Frame Check Sequence) of the page header. + */ + fcs_t fcs; +} BattFsPageHeader; + +/** + * Size of the header once saved on disk. + * \see battfs_to_disk + * \see disk_to_battfs + */ +#define BATTFS_HEADER_LEN 12 + +/** + * Maximum page address. + */ +#define MAX_PAGE_ADDR ((1 << (CPU_BITS_PER_CHAR * sizeof(pgcnt_t))) - 1) + +/** + * Max number of files. + */ +#define BATTFS_MAX_FILES (1 << (CPU_BITS_PER_CHAR * sizeof(inode_t))) + +/** + * Sentinel used to keep trace of unset pages in disk->page_array. + */ +#define PAGE_UNSET_SENTINEL ((pgcnt_t)((1L << (CPU_BITS_PER_CHAR * sizeof(pgcnt_t))) - 1)) + +typedef uint32_t disk_size_t; ///< Type for disk sizes. + +/** + * Context used to describe a disk. + * This context structure will be used to access disk. + * Must be initialized by hw memory driver. + */ +typedef struct BattFsSuper +{ + KBlock *dev; ///< Block device context (physical disk). + + pgaddr_t data_size; ///< Size of space usable for data in a disk page, in bytes. The rest is used by the page header. + /** + * Page allocation array. + * This array must be allocated somewhere and + * must have enough space for page_count elements. + * Is used by the filesystem to represent + * the entire disk in memory. + */ + pgcnt_t *page_array; + + /** + * Lowest address, in page array, for free pages. + * Pages above this element are free for use. + */ + pgcnt_t free_page_start; + + disk_size_t disk_size; ///< Size of the disk, in bytes (page_count * page_size). + disk_size_t free_bytes; ///< Free space on the disk. + + List file_opened_list; ///< List used to keep trace of open files. + /* TODO add other fields. */ +} BattFsSuper; + +/** + * True if space on \a disk is over. + */ +#define SPACE_OVER(disk) ((disk)->free_page_start >= (disk)->dev->blk_cnt) + +typedef uint8_t filemode_t; ///< Type for file open modes. +typedef int32_t file_size_t; ///< Type for file sizes. + +/** + * Modes for battfs_fileopen. + * \{ + */ +#define BATTFS_CREATE BV(0) ///< Create file if does not exist +#define BATTFS_RD BV(1) ///< Open file for reading +#define BATTFS_WR BV(2) ///< Open file fir writing +/*/}*/ + + +/** + * File errors. + * \{ + */ +#define BATTFS_NEGATIVE_SEEK_ERR BV(0) ///< Trying to read/write before file start. +#define BATTFS_DISK_READ_ERR BV(1) ///< Error reading from disk device. +#define BATTFS_DISK_WRITE_ERR BV(2) ///< Error writing in the disk device. +#define BATTFS_DISK_SPACEOVER_ERR BV(3) ///< No more disk space available. +#define BATTFS_DISK_FLUSHBUF_ERR BV(4) ///< Error flushing (writing) the current page to disk. +#define BATTFS_FILE_NOT_FOUND_ERR BV(5) ///< File not found on disk. +/*/}*/ + +/** + * Describe a BattFs file usign a KFile. + */ +typedef struct BattFs +{ + KFile fd; ///< KFile context + Node link; ///< Link for inserting in opened file list + inode_t inode; ///< inode of the opened file + BattFsSuper *disk; ///< Disk context + filemode_t mode; ///< File open mode + pgcnt_t *start; ///< Pointer to page_array file start position. + pgcnt_t max_off; ///< Max page offset allocated for the file. + int errors; ///< File status/errors +} BattFs; + +/** + * Id for battfs file descriptors. + */ +#define KFT_BATTFS MAKE_ID('B', 'T', 'F', 'S') + +/** + * Macro used to cast a KFile to a BattFS. + * Also perform dynamic type check. + */ +INLINE BattFs * BATTFS_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_BATTFS); + return (BattFs *)fd; +} + +bool battfs_mount(struct BattFsSuper *disk, struct KBlock *dev, pgcnt_t *page_array, size_t array_size); +bool battfs_fsck(struct BattFsSuper *disk); +bool battfs_umount(struct BattFsSuper *disk); + +bool battfs_fileExists(BattFsSuper *disk, inode_t inode); +bool battfs_fileopen(BattFsSuper *disk, BattFs *fd, inode_t inode, filemode_t mode); + +void battfs_writeTestBlock(KBlock *dev, pgcnt_t page, inode_t inode, seq_t seq, fill_t fill, pgoff_t pgoff); +void battfs_eraseBlock(KBlock *dev, pgcnt_t page); +#endif /* FS_BATTFS_H */ diff --git a/bertos/fs/battfs_test.c b/bertos/fs/battfs_test.c new file mode 100644 index 0000000..559bb19 --- /dev/null +++ b/bertos/fs/battfs_test.c @@ -0,0 +1,1116 @@ +/** + * \file + * + * + * \brief BattFS Test. + * + * \author Francesco Sacchi + */ + +#include +#include + +#include +#include + +#include +#include +#include + +#define FILE_SIZE 32768 +#define PAGE_SIZE 128 + +#define DATA_SIZE (PAGE_SIZE - BATTFS_HEADER_LEN) +#define PAGE_COUNT (FILE_SIZE / PAGE_SIZE) + +#define HW_PAGEBUF true +#if UNIT_TEST + +const char test_filename[]="battfs_disk.bin"; + +static uint8_t page_buffer[PAGE_SIZE]; +static pgcnt_t page_array[PAGE_COUNT]; + +static void testCheck(BattFsSuper *disk, pgcnt_t *reference) +{ + ASSERT(battfs_fsck(disk)); + + for (unsigned i = 0; i < disk->dev->blk_cnt; i++) + { + if (disk->page_array[i] != reference[i]) + { + kprintf("Error at addr %d: page_array read", i); + for (pgcnt_t i = 0; i < disk->dev->blk_cnt; i++) + { + if (!(i % 16)) + kputchar('\n'); + kprintf("%04d ", disk->page_array[i]); + } + kputchar('\n'); + kprintf("Expected:"); + for (pgcnt_t i = 0; i < disk->dev->blk_cnt; i++) + { + if (!(i % 16)) + kputchar('\n'); + kprintf("%04d ", reference[i]); + } + kputchar('\n'); + battfs_umount(disk); + exit(2); + } + } + + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); +} + +static void diskNew(BattFsSuper *disk) +{ + pgcnt_t ref[PAGE_COUNT]; + + TRACEMSG("1: disk new\n"); + + FILE *fpt = fopen(test_filename, "w+"); + + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + + for (int i = 0; i < PAGE_COUNT; i++) + ref[i] = i; + + KBlockPosix f; + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + battfs_mount(disk, &f.b, page_array, sizeof(page_array)); + + testCheck(disk, ref); + TRACEMSG("1: passed\n"); +} + +static void disk1File(BattFsSuper *disk) +{ + pgcnt_t ref[PAGE_COUNT]; + TRACEMSG("2: disk full with 1 contiguos file\n"); + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fp); + + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + for (int i = 0; i < PAGE_COUNT; i++) + { + battfs_writeTestBlock(&f.b, i, 0, 0, DATA_SIZE, i); + ref[i] = i; + } + + battfs_mount(disk, &f.b, page_array, sizeof(page_array)); + + testCheck(disk, ref); + TRACEMSG("2: passed\n"); +} + + +static void diskHalfFile(BattFsSuper *disk) +{ + pgcnt_t ref[PAGE_COUNT]; + TRACEMSG("3: disk half full with 1 contiguos file, rest unformatted\n"); + + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fp); + + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + for (int i = 0; i < PAGE_COUNT / 2; i++) + { + battfs_writeTestBlock(&f.b, i, 0, 0, DATA_SIZE, i); + ref[i] = i; + } + fseek(fp, FILE_SIZE / 2, SEEK_SET); + for (int i = FILE_SIZE / 2; i < FILE_SIZE; i++) + fputc(0xff, fp); + + for (int i = PAGE_COUNT / 2; i < PAGE_COUNT; i++) + { + ref[i] = i; + } + + battfs_mount(disk, &f.b, page_array, sizeof(page_array)); + + testCheck(disk, ref); + TRACEMSG("3: passed\n"); +} + + +static void oldSeq1(BattFsSuper *disk) +{ + pgcnt_t ref[4]; + TRACEMSG("6: 1 file with 1 old seq num, 1 free block\n"); + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 4; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 4); + + // page, inode, seq, fill, pgoff + battfs_writeTestBlock(&f.b, 0, 0, 0, DATA_SIZE, 0); + battfs_writeTestBlock(&f.b, 1, 0, 0, DATA_SIZE, 1); + battfs_writeTestBlock(&f.b, 2, 0, 1, DATA_SIZE, 1); + battfs_eraseBlock(&f.b, 3); + + ref[0] = 0; + ref[1] = 2; + ref[2] = 1; + ref[3] = 3; + + battfs_mount(disk, &f.b, page_array, sizeof(page_array)); + + testCheck(disk, ref); + TRACEMSG("6: passed\n"); +} + +static void oldSeq2(BattFsSuper *disk) +{ + pgcnt_t ref[4]; + TRACEMSG("7: 1 file with 1 old seq num, 1 free block\n"); + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 4; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 4); + + // page, inode, seq, fill, pgoff + battfs_writeTestBlock(&f.b, 0, 0, 0, DATA_SIZE, 0); + battfs_writeTestBlock(&f.b, 1, 0, 1, DATA_SIZE, 1); + battfs_writeTestBlock(&f.b, 2, 0, 0, DATA_SIZE, 1); + battfs_eraseBlock(&f.b, 3); + + ref[0] = 0; + ref[1] = 1; + ref[2] = 2; + ref[3] = 3; + + battfs_mount(disk, &f.b, page_array, sizeof(page_array)); + testCheck(disk, ref); + TRACEMSG("7: passed\n"); +} + +static void oldSeq3(BattFsSuper *disk) +{ + pgcnt_t ref[4]; + TRACEMSG("8: 1 file with 1 old seq num, 1 free block\n"); + + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 4; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 4); + + // page, inode, seq, fill, pgoff + battfs_eraseBlock(&f.b, 0); + battfs_writeTestBlock(&f.b, 1, 0, 0, DATA_SIZE, 0); + battfs_writeTestBlock(&f.b, 2, 0, 1, DATA_SIZE, 1); + battfs_writeTestBlock(&f.b, 3, 0, 0, DATA_SIZE, 1); + + ref[0] = 1; + ref[1] = 2; + ref[2] = 0; + ref[3] = 3; + + battfs_mount(disk, &f.b, page_array, sizeof(page_array)); + testCheck(disk, ref); + TRACEMSG("8: passed\n"); +} + +static void oldSeq2File(BattFsSuper *disk) +{ + pgcnt_t ref[8]; + TRACEMSG("9: 2 file with old seq num, 2 free block\n"); + + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 8; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 8); + + // page, inode, seq, fill, pgoff + battfs_eraseBlock(&f.b, 0); + battfs_writeTestBlock(&f.b, 1, 0, 0, DATA_SIZE, 0); + battfs_writeTestBlock(&f.b, 2, 0, 3, DATA_SIZE, 1); + battfs_writeTestBlock(&f.b, 3, 0, 0, DATA_SIZE, 1); + battfs_eraseBlock(&f.b, 4); + battfs_writeTestBlock(&f.b, 5, 4, 0, DATA_SIZE, 0); + battfs_writeTestBlock(&f.b, 6, 4, 1, DATA_SIZE, 1); + battfs_writeTestBlock(&f.b, 7, 4, 0, DATA_SIZE, 1); + + + ref[0] = 1; + ref[1] = 2; + ref[2] = 5; + ref[3] = 6; + ref[4] = 0; + ref[5] = 3; + ref[6] = 4; + ref[7] = 7; + + battfs_mount(disk, &f.b, page_array, sizeof(page_array)); + testCheck(disk, ref); + TRACEMSG("9: passed\n"); +} + +static void openFile(BattFsSuper *disk) +{ + BattFs fd1; + BattFs fd2; + TRACEMSG("10: open file test, inode 0 and inode 4\n"); + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 8; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 8); + + + int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + inode_t INODE2 = 4; + inode_t INEXISTENT_INODE = 123; + unsigned int MODE = 0; + + // page, inode, seq, fill, pgoff + battfs_eraseBlock(&f.b, 0); + battfs_writeTestBlock(&f.b, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 3, INODE, 0, PAGE_FILL, 1); + battfs_eraseBlock(&f.b, 4); + battfs_writeTestBlock(&f.b, 5, INODE2, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 6, INODE2, 1, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 7, INODE2, 0, PAGE_FILL, 1); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(!battfs_fileExists(disk, INEXISTENT_INODE)); + + ASSERT(battfs_fileExists(disk, INODE)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(fd1.fd.size == PAGE_FILL * 2); + ASSERT(fd1.fd.seek_pos == 0); + ASSERT(fd1.mode == MODE); + ASSERT(fd1.inode == INODE); + ASSERT(fd1.start == &disk->page_array[0]); + ASSERT(fd1.disk == disk); + ASSERT(LIST_HEAD(&disk->file_opened_list) == &fd1.link); + + ASSERT(kfile_reopen(&fd1.fd) == &fd1.fd); + ASSERT(fd1.fd.size == PAGE_FILL * 2); + ASSERT(fd1.fd.seek_pos == 0); + ASSERT(fd1.mode == MODE); + ASSERT(fd1.inode == INODE); + ASSERT(fd1.start == &disk->page_array[0]); + ASSERT(fd1.disk == disk); + ASSERT(LIST_HEAD(&disk->file_opened_list) == &fd1.link); + + ASSERT(battfs_fileExists(disk, INODE2)); + ASSERT(battfs_fileopen(disk, &fd2, INODE2, MODE)); + ASSERT(fd2.fd.size == PAGE_FILL * 2); + ASSERT(fd2.fd.seek_pos == 0); + ASSERT(fd2.mode == MODE); + ASSERT(fd2.inode == INODE2); + ASSERT(fd2.start == &disk->page_array[2]); + ASSERT(fd2.disk == disk); + ASSERT(LIST_HEAD(&disk->file_opened_list)->succ == &fd2.link); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(kfile_close(&fd2.fd) == 0); + ASSERT(kfile_error(&fd2.fd) == 0); + ASSERT(LIST_EMPTY(&disk->file_opened_list)); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("10: passed\n"); +} + +static void readFile(BattFsSuper *disk) +{ + BattFs fd1; + uint8_t buf[16]; + + TRACEMSG("11: read file test\n"); + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 8; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 8); + + + unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + inode_t INODE2 = 4; + unsigned int MODE = 0; + + battfs_eraseBlock(&f.b, 0); + battfs_writeTestBlock(&f.b, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 3, INODE, 0, PAGE_FILL, 1); + battfs_eraseBlock(&f.b, 4); + battfs_writeTestBlock(&f.b, 5, INODE2, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 6, INODE2, 1, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 7, INODE2, 0, PAGE_FILL, 1); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("11: passed\n"); +} + +static void readAcross(BattFsSuper *disk) +{ + BattFs fd1; + + TRACEMSG("12: read file test across page boundary and seek test\n"); + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 8; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 8); + + const unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + unsigned int MODE = 0; + uint8_t buf[PAGE_FILL + BATTFS_HEADER_LEN / 2]; + + battfs_eraseBlock(&f.b, 0); + battfs_writeTestBlock(&f.b, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 3, INODE, 0, PAGE_FILL, 1); + battfs_eraseBlock(&f.b, 4); + battfs_writeTestBlock(&f.b, 5, INODE, 0, PAGE_FILL, 2); + battfs_writeTestBlock(&f.b, 6, INODE, 1, PAGE_FILL, 3); + battfs_writeTestBlock(&f.b, 7, INODE, 0, PAGE_FILL, 3); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 2); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 3); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == PAGE_FILL * 4 - sizeof(buf) * 3); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)fd1.fd.size); + for (size_t i = 0; i < PAGE_FILL * 4 - sizeof(buf) * 3; i++) + ASSERT(buf[i] == 0xff); + + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + ASSERT(fd1.fd.seek_pos == 0); + + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_END) == (kfile_off_t)fd1.fd.size); + ASSERT(fd1.fd.seek_pos = (kfile_off_t)fd1.fd.size); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("12: passed\n"); +} + + +static void writeFile(BattFsSuper *disk) +{ + BattFs fd1; + uint8_t buf[PAGE_SIZE - BATTFS_HEADER_LEN]; + + TRACEMSG("13: write file test\n"); + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 8; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 8); + + + unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + inode_t INODE2 = 4; + unsigned int MODE = 0; + + battfs_eraseBlock(&f.b, 0); + battfs_writeTestBlock(&f.b, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 3, INODE, 0, PAGE_FILL, 1); + battfs_eraseBlock(&f.b, 4); + battfs_writeTestBlock(&f.b, 5, INODE2, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 6, INODE2, 1, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 7, INODE2, 0, PAGE_FILL, 1); + + for (size_t i = 0; i < sizeof(buf); i++) + buf[i] = i; + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf)); + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + ASSERT(fd1.fd.seek_pos == 0); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == i); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("13: passed\n"); +} + +static void writeAcross(BattFsSuper *disk) +{ + BattFs fd1; + + TRACEMSG("14: write file test across page boundary and seek test\n"); + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 8; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 8); + + const unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + unsigned int MODE = 0; + uint8_t buf[PAGE_FILL + BATTFS_HEADER_LEN / 2]; + + battfs_eraseBlock(&f.b, 0); + battfs_writeTestBlock(&f.b, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 3, INODE, 0, PAGE_FILL, 1); + battfs_eraseBlock(&f.b, 4); + battfs_writeTestBlock(&f.b, 5, INODE, 0, PAGE_FILL, 2); + battfs_writeTestBlock(&f.b, 6, INODE, 1, PAGE_FILL, 3); + battfs_writeTestBlock(&f.b, 7, INODE, 0, PAGE_FILL, 3); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + + uint8_t val = 0; + for (size_t i = 0; i < sizeof(buf); i++) + buf[i] = val++; + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf)); + + for (size_t i = 0; i < sizeof(buf); i++) + buf[i] = val++; + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 2); + + for (size_t i = 0; i < sizeof(buf); i++) + buf[i] = val++; + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 3); + + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + ASSERT(fd1.fd.seek_pos == 0); + val = 0; + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == val++); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == val++); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (size_t i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == val++); + + ASSERT(fd1.fd.seek_pos == (kfile_off_t)sizeof(buf) * 3); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("14: passed\n"); +} + +static void createFile(BattFsSuper *disk) +{ + TRACEMSG("15: file creation on new disk\n"); + + FILE *fpt = fopen(test_filename, "w+"); + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + KBlockPosix f; + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + BattFs fd1; + inode_t INODE = 0; + unsigned int MODE = BATTFS_CREATE; + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + for (int i = 0; i < FILE_SIZE / 2; i++) + ASSERT(kfile_putc(i, &fd1.fd) != EOF); + + ASSERT(fd1.fd.seek_pos == FILE_SIZE / 2); + ASSERT(fd1.fd.size == FILE_SIZE / 2); + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + fpt = fopen(test_filename, "r+"); + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, 0)); + ASSERT(fd1.fd.size == FILE_SIZE / 2); + ASSERT(fd1.fd.seek_pos == 0); + + uint8_t buf[FILE_SIZE / 2]; + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, FILE_SIZE / 2) == FILE_SIZE / 2); + + for (int i = 0; i < FILE_SIZE / 2; i++) + ASSERT(buf[i] == (i & 0xff)); + + ASSERT(fd1.fd.seek_pos == FILE_SIZE / 2); + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + + TRACEMSG("15: passed\n"); +} + +static void multipleWrite(BattFsSuper *disk) +{ + TRACEMSG("16: multiple write on file\n"); + + FILE *fpt = fopen(test_filename, "w+"); + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + KBlockPosix f; + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + + BattFs fd1; + inode_t INODE = 0; + unsigned int MODE = BATTFS_CREATE; + uint8_t buf[1000]; + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + + int j; + for (j = 1; j < 1013; j++) + { + for (unsigned i = 0; i < sizeof(buf); i++) + buf[i] = j+i; + + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf)); + ASSERT(fd1.fd.size == sizeof(buf)); + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf)); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == ((j+i) & 0xff)); + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + ASSERT(disk->free_bytes == disk->disk_size - sizeof(buf)); + } + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + fpt = fopen(test_filename, "r+"); + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(disk->free_bytes == disk->disk_size - sizeof(buf)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, 0)); + ASSERT(fd1.fd.size == sizeof(buf)); + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == ((j-1+i) & 0xff)); + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + + TRACEMSG("16: passed\n"); +} + +static void increaseFile(BattFsSuper *disk) +{ + TRACEMSG("17: increasing dimension of a file with multiple open files.\n"); + + FILE *fpt = fopen(test_filename, "w+"); + for (int i = 0; i < FILE_SIZE / 10; i++) + fputc(0xff, fpt); + + KBlockPosix f; + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT / 10); + + + BattFs fd1,fd2; + inode_t INODE1 = 1, INODE2 = 2; + unsigned int MODE = BATTFS_CREATE; + uint8_t buf[1000]; + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE1, MODE)); + ASSERT(battfs_fileopen(disk, &fd2, INODE2, MODE)); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(kfile_putc(i, &fd2.fd) != EOF); + ASSERT(kfile_seek(&fd2.fd, 0, KSM_SEEK_SET) == 0); + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd2.fd, buf, sizeof(buf)) == sizeof(buf)); + + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == (i & 0xff)); + ASSERT(kfile_seek(&fd2.fd, 0, KSM_SEEK_SET) == 0); + + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(kfile_putc(i, &fd1.fd) != EOF); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd2.fd, buf, sizeof(buf)) == sizeof(buf)); + + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == (i & 0xff)); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(kfile_close(&fd2.fd) == 0); + ASSERT(kfile_error(&fd2.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("17: passed\n"); +} + +static void readEOF(BattFsSuper *disk) +{ + BattFs fd1; + uint8_t buf[16]; + + TRACEMSG("18: reading over EOF test\n"); + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 8; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 8); + + + unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + inode_t INODE2 = 4; + unsigned int MODE = 0; + + battfs_eraseBlock(&f.b, 0); + battfs_writeTestBlock(&f.b, 1, INODE, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 2, INODE, 3, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 3, INODE, 0, PAGE_FILL, 1); + battfs_eraseBlock(&f.b, 4); + battfs_writeTestBlock(&f.b, 5, INODE2, 0, PAGE_FILL, 0); + battfs_writeTestBlock(&f.b, 6, INODE2, 1, PAGE_FILL, 1); + battfs_writeTestBlock(&f.b, 7, INODE2, 0, PAGE_FILL, 1); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(kfile_seek(&fd1.fd, fd1.fd.size + 10, SEEK_SET) == fd1.fd.size + 10); + ASSERT(fd1.fd.seek_pos == fd1.fd.size + 10); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == 0); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("18: passed\n"); +} + +static void writeEOF(BattFsSuper *disk) +{ + TRACEMSG("19: writing over EOF test\n"); + + FILE *fpt = fopen(test_filename, "w+"); + for (int i = 0; i < FILE_SIZE / 5; i++) + fputc(0xff, fpt); + KBlockPosix f; + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT / 5); + + BattFs fd1; + inode_t INODE = 0; + unsigned int MODE = BATTFS_CREATE; + uint8_t buf[FILE_SIZE / 13]; + + for (int i = 0; i < 2; i++) + buf[i] = i; + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + disk_size_t prev_free = disk->free_bytes; + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(fd1.fd.size == 0); + + ASSERT(kfile_seek(&fd1.fd, 2, KSM_SEEK_END) == 2); + ASSERT(kfile_write(&fd1.fd, buf, 2)); + ASSERT(fd1.fd.seek_pos == 4); + ASSERT(fd1.fd.size == 4); + ASSERT(disk->free_bytes == prev_free - 4); + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + memset(buf, 0, 2); + ASSERT(kfile_read(&fd1.fd, buf, 2) == 2); + for (int i = 0; i < 2; i++) + ASSERT(buf[i] == 0); + + memset(buf, 0, 2); + ASSERT(kfile_read(&fd1.fd, buf, 2) == 2); + for (int i = 0; i < 2; i++) + ASSERT(buf[i] == (i & 0xff)); + + ASSERT(kfile_seek(&fd1.fd, sizeof(buf), KSM_SEEK_END) == sizeof(buf) + 4); + for (unsigned i = 0; i < sizeof(buf); i++) + buf[i] = i; + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf))); + ASSERT(fd1.fd.seek_pos == sizeof(buf) * 2 + 4); + ASSERT(fd1.fd.size == sizeof(buf) * 2 + 4); + ASSERT(disk->free_bytes == prev_free - sizeof(buf) * 2 - 4); + + ASSERT(kfile_seek(&fd1.fd, 0, KSM_SEEK_SET) == 0); + + memset(buf, 0, 2); + ASSERT(kfile_read(&fd1.fd, buf, 2) == 2); + ASSERT(fd1.fd.seek_pos == 2); + for (int i = 0; i < 2; i++) + ASSERT(buf[i] == 0); + + memset(buf, 0, 2); + ASSERT(kfile_read(&fd1.fd, buf, 2) == 2); + ASSERT(fd1.fd.seek_pos == 4); + for (int i = 0; i < 2; i++) + ASSERT(buf[i] == (i & 0xff)); + + memset(buf, 0, 4); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd1.fd.seek_pos == sizeof(buf) + 4); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == 0); + + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd1.fd, buf, sizeof(buf)) == sizeof(buf)); + for (unsigned i = 0; i < sizeof(buf); i++) + ASSERT(buf[i] == (i & 0xff)); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == 0); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("19: passed\n"); + +} + +static void endOfSpace(BattFsSuper *disk) +{ + TRACEMSG("20: what happens when disk space is over?\n"); + BattFs fd1; + uint8_t buf[(PAGE_SIZE - BATTFS_HEADER_LEN) * 5]; + + FILE *fp = fopen(test_filename, "w+"); + for (int i = 0; i < PAGE_SIZE * 4; i++) + fputc(0xff, fp); + KBlockPosix f; + kblockposix_init(&f, fp, HW_PAGEBUF, page_buffer, PAGE_SIZE, 4); + + unsigned int PAGE_FILL = PAGE_SIZE - BATTFS_HEADER_LEN; + inode_t INODE = 0; + unsigned int MODE = BATTFS_CREATE; + + battfs_eraseBlock(&f.b, 0); + battfs_eraseBlock(&f.b, 1); + battfs_eraseBlock(&f.b, 2); + battfs_eraseBlock(&f.b, 3); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_fileopen(disk, &fd1, INODE, MODE)); + ASSERT(kfile_write(&fd1.fd, buf, sizeof(buf)) == PAGE_FILL * 4); + ASSERT(fd1.fd.size == (kfile_off_t)(PAGE_FILL * 4)); + ASSERT(fd1.fd.seek_pos == (kfile_off_t)(PAGE_FILL * 4)); + ASSERT(disk->free_bytes == 0); + + ASSERT(kfile_close(&fd1.fd) == 0); + ASSERT(kfile_error(&fd1.fd) == BATTFS_DISK_SPACEOVER_ERR); + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + TRACEMSG("20: passed\n"); +} + + +static void multipleFilesRW(BattFsSuper *disk) +{ + TRACEMSG("21: multiple files read/write test\n"); + + FILE *fpt = fopen(test_filename, "w+"); + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + KBlockPosix f; + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + #define N_FILES 10 + BattFs fd[N_FILES]; + unsigned int MODE = BATTFS_CREATE; + uint32_t buf[FILE_SIZE / (4 * N_FILES * sizeof(uint32_t))]; + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + for (inode_t i = 0; i < N_FILES; i++) + ASSERT(battfs_fileopen(disk, &fd[i], i, MODE)); + + for (int i = N_FILES - 1; i >= 0; i--) + { + for (uint32_t j = 0; j < countof(buf); j++) + buf[j] = j+i; + + ASSERT(kfile_write(&fd[i].fd, buf, sizeof(buf)) == sizeof(buf)); + ASSERT(fd[i].fd.size == sizeof(buf)); + ASSERT(fd[i].fd.seek_pos == sizeof(buf)); + ASSERT(kfile_seek(&fd[i].fd, 0, SEEK_SET) == 0); + } + + for (inode_t i = 0; i < N_FILES; i++) + { + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd[i].fd, buf, sizeof(buf)) == sizeof(buf)); + + for (uint32_t j = 0; j < countof(buf); j++) + ASSERT(buf[j] == j+i); + + ASSERT(fd[i].fd.size == sizeof(buf)); + ASSERT(fd[i].fd.seek_pos == sizeof(buf)); + ASSERT(kfile_seek(&fd[i].fd, 0, SEEK_SET) == 0); + } + + for (inode_t i = 0; i < N_FILES; i++) + { + ASSERT(kfile_close(&fd[i].fd) == 0); + ASSERT(kfile_error(&fd[i].fd) == 0); + } + + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + fpt = fopen(test_filename, "r+"); + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + + for (inode_t i = 0; i < N_FILES; i++) + ASSERT(battfs_fileopen(disk, &fd[i], i, 0)); + + for (inode_t i = 0; i < N_FILES; i++) + { + memset(buf, 0, sizeof(buf)); + ASSERT(kfile_read(&fd[i].fd, buf, sizeof(buf)) == sizeof(buf)); + + for (uint32_t j = 0; j < countof(buf); j++) + ASSERT(buf[j] == j+i); + + ASSERT(fd[i].fd.size == sizeof(buf)); + ASSERT(fd[i].fd.seek_pos == sizeof(buf)); + ASSERT(kfile_seek(&fd[i].fd, 0, SEEK_SET) == 0); + } + + for (inode_t i = 0; i < N_FILES; i++) + { + ASSERT(kfile_close(&fd[i].fd) == 0); + ASSERT(kfile_error(&fd[i].fd) == 0); + } + + ASSERT(battfs_umount(disk)); + TRACEMSG("21: passed\n"); +} + + +static void openAllFiles(BattFsSuper *disk) +{ + TRACEMSG("22: try to open a lot of files\n"); + + FILE *fpt = fopen(test_filename, "w+"); + for (int i = 0; i < FILE_SIZE; i++) + fputc(0xff, fpt); + KBlockPosix f; + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + BattFs fd[BATTFS_MAX_FILES]; + unsigned int MODE = BATTFS_CREATE; + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + for (unsigned i = 0; i < countof(fd); i++) + ASSERT(battfs_fileopen(disk, &fd[i], i, MODE)); + + ASSERT(battfs_fsck(disk)); + + for (unsigned i = 0; i < countof(fd); i++) + { + ASSERT(kfile_close(&fd[i].fd) == 0); + ASSERT(kfile_error(&fd[i].fd) == 0); + } + + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + + + fpt = fopen(test_filename, "r+"); + kblockposix_init(&f, fpt, HW_PAGEBUF, page_buffer, PAGE_SIZE, PAGE_COUNT); + + ASSERT(battfs_mount(disk, &f.b, page_array, sizeof(page_array))); + ASSERT(battfs_fsck(disk)); + + + for (unsigned i = 0; i < countof(fd); i++) + ASSERT(battfs_fileopen(disk, &fd[i], i, MODE)); + + ASSERT(battfs_fsck(disk)); + + for (unsigned i = 0; i < countof(fd); i++) + { + ASSERT(kfile_close(&fd[i].fd) == 0); + ASSERT(kfile_error(&fd[i].fd) == 0); + } + + ASSERT(battfs_fsck(disk)); + ASSERT(battfs_umount(disk)); + TRACEMSG("22: passed\n"); +} + + +int battfs_testRun(void) +{ + BattFsSuper disk; + + diskNew(&disk); + disk1File(&disk); + diskHalfFile(&disk); + oldSeq1(&disk); + oldSeq2(&disk); + oldSeq3(&disk); + oldSeq2File(&disk); + openFile(&disk); + readFile(&disk); + readAcross(&disk); + writeFile(&disk); + writeAcross(&disk); + createFile(&disk); + multipleWrite(&disk); + increaseFile(&disk); + readEOF(&disk); + writeEOF(&disk); + endOfSpace(&disk); + multipleFilesRW(&disk); + openAllFiles(&disk); + + kprintf("All tests passed!\n"); + + return 0; +} + +int battfs_testSetup(void) +{ + return 0; +} + +int battfs_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(battfs); + +#endif // _TEST diff --git a/bertos/fs/fat.c b/bertos/fs/fat.c new file mode 100644 index 0000000..c611886 --- /dev/null +++ b/bertos/fs/fat.c @@ -0,0 +1,143 @@ +/** + * \file + * + * + * \brief FatFS: kfile interface for FatFS module by ChaN. + * + * + * \author Luca Ottaviano + * + */ + +#include "fat.h" + +static size_t fatfile_read(struct KFile *_fd, void *buf, size_t size) +{ + FatFile *fd = FATFILE_CAST(_fd); + UINT count; + fd->error_code = f_read(&fd->fat_file, buf, size, &count); + return count; +} + +static size_t fatfile_write(struct KFile *_fd, const void *buf, size_t size) +{ + FatFile *fd = FATFILE_CAST(_fd); + UINT count; + fd->error_code = f_write(&fd->fat_file, buf, size, &count); + return count; +} + +static int fatfile_close(struct KFile *_fd) +{ + FatFile *fd = FATFILE_CAST(_fd); + fd->error_code = f_close(&fd->fat_file); + if (fd->error_code) + return EOF; + else + return 0; +} + +static kfile_off_t fatfile_seek(struct KFile *_fd, kfile_off_t offset, KSeekMode whence) +{ + /* clip at start-of-file + * don't clip at end-of-file when in write mode + */ + FatFile *fd = FATFILE_CAST(_fd); + DWORD lseek_offset = 0; + switch (whence) + { + case KSM_SEEK_SET: + if (offset > 0) + lseek_offset = (DWORD) offset; + break; + case KSM_SEEK_CUR: + if (offset > 0) + lseek_offset = fd->fat_file.fptr + (DWORD) offset; + else + { + if (fd->fat_file.fptr > (DWORD) (-offset)) + lseek_offset = fd->fat_file.fptr - (DWORD)(-offset); + } + break; + case KSM_SEEK_END: + if (offset > 0) + lseek_offset = fd->fat_file.fsize + (DWORD) offset; + else + { + if (fd->fat_file.fsize > (DWORD) (-offset)) + lseek_offset = fd->fat_file.fsize + (DWORD) offset; + } + break; + } + fd->error_code = f_lseek(&fd->fat_file, lseek_offset); + if ((fd->error_code) || (fd->fat_file.fptr != lseek_offset)) + return EOF; + else + /* TODO: this conversion may overflow */ + return (kfile_off_t)fd->fat_file.fptr; +} + +static int fatfile_flush(struct KFile *_fd) +{ + FatFile *fd = FATFILE_CAST(_fd); + fd->error_code = f_sync(&fd->fat_file); + if (fd->error_code) + return EOF; + else + return 0; +} + +static int fatfile_error(struct KFile *_fd) +{ + FatFile *fd = FATFILE_CAST(_fd); + return (int)fd->error_code; +} + +static void fatfile_clearerr(struct KFile *_fd) +{ + FatFile *fd = FATFILE_CAST(_fd); + fd->error_code = FR_OK; +} + +FRESULT fatfile_open(FatFile *file, const char *file_path, BYTE mode) +{ + DB(file->fd._type = KFT_FATFILE); + file->fd.read = fatfile_read; + file->fd.write = fatfile_write; + file->fd.reopen = 0; + file->fd.close = fatfile_close; + file->fd.seek = fatfile_seek; + file->fd.flush = fatfile_flush; + file->fd.error = fatfile_error; + file->fd.clearerr = fatfile_clearerr; + return f_open(&file->fat_file, file_path, mode); +} + diff --git a/bertos/fs/fat.h b/bertos/fs/fat.h new file mode 100644 index 0000000..df748d5 --- /dev/null +++ b/bertos/fs/fat.h @@ -0,0 +1,84 @@ +/** + * \file + * + * + * \brief FatFS: kfile interface for FatFS module by ChaN. + * + * This driver needs some low level hardware access functions. An example implementation + * is provided in sd.h. + * + * + * \author Luca Ottaviano + * + * $WIZ$ module_name = "fat" + * $WIZ$ module_configuration = "bertos/cfg/cfg_fat.h" + * $WIZ$ module_depends = "kfile", "ff", "diskio" + * + */ + +#ifndef FS_FAT_H +#define FS_FAT_H + +#include +#include "fatfs/ff.h" + +typedef struct FatFile +{ + KFile fd; + FIL fat_file; + FRESULT error_code; ///< error code for calls like kfile_read +} FatFile; + +#define KFT_FATFILE MAKE_ID('F', 'A', 'T', 'F') + +INLINE FatFile * FATFILE_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_FATFILE); + return (FatFile *)fd; +} + +/** + * Initialize \a file and open \a file_path for reading. + * + * \a mode is a OR combination of various flags, you can use \a FA_READ for + * read access or \a FA_WRITE for write access. + * The function returns \a FR_OK if success, other values (defined in ff.h) in case + * of failure. + * + * \param file A pointer to a FatFile structure. + * \param file_path The file path on the filesystem. + * \param mode Open mode for the file, which can be OR'ed together + * \sa ff.h for return code meaning and \a mode flags. + */ +FRESULT fatfile_open(FatFile *file, const char *file_path, BYTE mode); + +#endif /* FS_FAT_H */ + diff --git a/bertos/fs/fat_test.c b/bertos/fs/fat_test.c new file mode 100644 index 0000000..f356c64 --- /dev/null +++ b/bertos/fs/fat_test.c @@ -0,0 +1,128 @@ +/** + * \file + * + * + * \brief FatFs test. + * + * \author Luca Ottaviano + * + * $test$: cp bertos/cfg/cfg_fat.h $cfgdir/ + * $test$: echo "#undef CONFIG_FAT_USE_MKFS" >> $cfgdir/cfg_fat.h + * $test$: echo "#define CONFIG_FAT_USE_MKFS 1" >> $cfgdir/cfg_fat.h + * + */ + +#include "fat.h" + +#include "fatfs/ff.h" +#include "fatfs/diskio.h" + +#include + +/* avoid compiler warnings... */ +int fatfile_testSetup(void); +int fatfile_testTearDown(void); +int fatfile_testRun(void); + +static FATFS file_system; + +int fatfile_testSetup(void) +{ + FRESULT err; + err = f_mount(0, &file_system); + ASSERT(err == FR_OK); + + err = f_mkfs(0, 0, 512); + ASSERT(err == FR_OK); + return 0; +} + +int fatfile_testTearDown(void) +{ + FRESULT err; + err = f_mount(0, 0); + ASSERT(err == FR_OK); + return 0; +} + +int fatfile_testRun(void) +{ + FRESULT fat_err; + FatFile file_handler; + const int SIZE = 10; + int write[SIZE], read[SIZE]; + + fat_err = fatfile_open(&file_handler, "foo.txt", FA_WRITE | FA_CREATE_ALWAYS); + ASSERT(fat_err == FR_OK); + + for (int i = 0; i < SIZE; ++i) + { + write[i] = i; + size_t count = kfile_write(&file_handler.fd, &i, sizeof(int)); + ASSERT(count == sizeof(int)); + } + /* test error function */ + int tmp; + if (kfile_read(&file_handler.fd, &tmp, sizeof(int)) < sizeof(int)) + ASSERT(kfile_error(&file_handler.fd) == FR_DENIED); + kfile_clearerr(&file_handler.fd); + ASSERT(file_handler.error_code == FR_OK); + + + int err = 0; + err = kfile_close(&file_handler.fd); + ASSERT(err == 0); + + fat_err = fatfile_open(&file_handler, "foo.txt", FA_READ); + ASSERT(fat_err == FR_OK); + + for (int i = 0; i < SIZE; ++ i) + { + size_t count = kfile_read(&file_handler.fd, &read[i], sizeof(int)); + ASSERT(count == sizeof(int)); + /* check for correctness */ + ASSERT(read[i] == write[i]); + } + /* test kfile_seek() */ + ASSERT(kfile_seek(&file_handler.fd, -(sizeof(int) * SIZE * 2), KSM_SEEK_CUR) == 0); + ASSERT(kfile_seek(&file_handler.fd, sizeof(int), KSM_SEEK_END) == EOF); + + ASSERT(kfile_close(&file_handler.fd) == 0); + + fatfile_open(&file_handler, "foo.txt", FA_READ | FA_WRITE); + ASSERT((size_t)kfile_seek(&file_handler.fd, sizeof(int), KSM_SEEK_END) == sizeof(int) * (SIZE + 1)); + ASSERT(kfile_seek(&file_handler.fd, -SIZE, KSM_SEEK_SET) == 0); + + return 0; +} + + +TEST_MAIN(fatfile); diff --git a/bertos/fs/fatfs/00readme.txt b/bertos/fs/fatfs/00readme.txt new file mode 100644 index 0000000..0e06c20 --- /dev/null +++ b/bertos/fs/fatfs/00readme.txt @@ -0,0 +1,96 @@ +FatFs/Tiny-FatFs Module Source Files R0.07a (C)ChaN, 2009 + + +FILES + + ff.h Common include file for FatFs and application module. + ff.c FatFs module. + diskio.h Common include file for FatFs and disk I/O module. + diskio.c Skeleton of low level disk I/O module. + integer.h Alternative type definitions for integer variables. + option Optional external functions. + + Low level disk I/O module is not included in this archive because the FatFs + module is only a generic file system layer and not depend on any specific + storage device. You have to provide a low level disk I/O module that written + to control your storage device. + + + +AGREEMENTS + + FatFs module is an open source software to implement FAT file system to + small embedded systems. This is a free software and is opened for education, + research and commercial developments under license policy of following trems. + + Copyright (C) 2009, ChaN, all right reserved. + + * The FatFs module is a free software and there is NO WARRANTY. + * No restriction on use. You can use, modify and redistribute it for + personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY. + * Redistributions of source code must retain the above copyright notice. + + + +REVISION HISTORY + + Feb 26, 2006 R0.00 Prototype + + Apr 29, 2006 R0.01 First release. + + Jun 01, 2006 R0.02 Added FAT12. + Removed unbuffered mode. + Fixed a problem on small (<32M) patition. + + Jun 10, 2006 R0.02a Added a configuration option _FS_MINIMUM. + + Sep 22, 2006 R0.03 Added f_rename. + Changed option _FS_MINIMUM to _FS_MINIMIZE. + + Dec 11, 2006 R0.03a Improved cluster scan algolithm to write files fast. + Fixed f_mkdir creates incorrect directory on FAT32. + + Feb 04, 2007 R0.04 Supported multiple drive system. (FatFs) + Changed some APIs for multiple drive system. + Added f_mkfs. (FatFs) + Added _USE_FAT32 option. (Tiny-FatFs) + + Apr 01, 2007 R0.04a Supported multiple partitions on a plysical drive. (FatFs) + Fixed an endian sensitive code in f_mkfs. (FatFs) + Added a capability of extending the file size to f_lseek. + Added minimization level 3. + Fixed a problem that can collapse a sector when recreate an + existing file in any sub-directory at non FAT32 cfg. (Tiny-FatFs) + + May 05, 2007 R0.04b Added _USE_NTFLAG option. + Added FSInfo support. + Fixed some problems corresponds to FAT32. (Tiny-FatFs) + Fixed DBCS name can result FR_INVALID_NAME. + Fixed short seek (0 < ofs <= csize) collapses the file object. + + Aug 25, 2007 R0.05 Changed arguments of f_read, f_write. + Changed arguments of f_mkfs. (FatFs) + Fixed f_mkfs on FAT32 creates incorrect FSInfo. (FatFs) + Fixed f_mkdir on FAT32 creates incorrect directory. (FatFs) + + Feb 03, 2008 R0.05a Added f_truncate(). + Added f_utime(). + Fixed off by one error at FAT sub-type determination. + Fixed btr in f_read() can be mistruncated. + Fixed cached sector is not flushed when create and close without write. + + Apr 01, 2008 R0.06 Added f_forward(). (Tiny-FatFs) + Added string functions: fputc(), fputs(), fprintf() and fgets(). + Improved performance of f_lseek() on move to the same or following cluster. + + Apr 01, 2009, R0.07 Merged Tiny-FatFs as a buffer configuration option. + Added long file name support. + Added multiple code page support. + Added re-entrancy for multitask operation. + Added auto cluster size selection to f_mkfs(). + Added rewind option to f_readdir(). + Changed result code of critical errors. + Renamed string functions to avoid name collision. + + Apr 14, 2009, R0.07a Separated out OS dependent code on reentrant cfg. + Added multiple sector size support. diff --git a/bertos/fs/fatfs/diskio.c b/bertos/fs/fatfs/diskio.c new file mode 100644 index 0000000..2fd9a6c --- /dev/null +++ b/bertos/fs/fatfs/diskio.c @@ -0,0 +1,153 @@ +/*-----------------------------------------------------------------------*/ +/* Low level disk I/O module skeleton for FatFs (C)ChaN, 2007 */ +/*-----------------------------------------------------------------------*/ +/* This is a stub disk I/O module that acts as front end of the existing */ +/* disk I/O modules and attach it to FatFs module with common interface. */ +/*-----------------------------------------------------------------------*/ + +#include "diskio.h" +#include "ff.h" + +#include + +#include "cfg/cfg_fat.h" +#define LOG_LEVEL FAT_LOG_LEVEL +#define LOG_FORMAT FAT_LOG_FORMAT +#include + +static KBlock *devs[_DRIVES]; + +void disk_assignDrive(KBlock *dev, int dev_num) +{ + ASSERT(dev_num < _DRIVES); + devs[dev_num] = dev; +} + + +/*-----------------------------------------------------------------------*/ +/* Inidialize a Drive */ + +DSTATUS disk_initialize ( + BYTE drv /* Physical drive nmuber (0..) */ +) +{ + return disk_status(drv); +} + + + +/*-----------------------------------------------------------------------*/ +/* Return Disk Status */ + +DSTATUS disk_status ( + BYTE drv /* Physical drive nmuber (0..) */ +) +{ + KBlock *dev = devs[drv]; + ASSERT(dev); + + if (kblock_error(dev) != 0) + return STA_NOINIT; + else + return RES_OK; +} + + + +/*-----------------------------------------------------------------------*/ +/* Read Sector(s) */ + +DRESULT disk_read ( + BYTE drv, /* Physical drive nmuber (0..) */ + BYTE *buff, /* Data buffer to store read data */ + DWORD sector, /* Sector address (LBA) */ + BYTE count /* Number of sectors to read (1..255) */ +) +{ + KBlock *dev = devs[drv]; + ASSERT(dev); + + + while (count--) + { + if (kblock_read(dev, sector++, buff, 0, dev->blk_size) != dev->blk_size) + return RES_ERROR; + buff += dev->blk_size; + } + return RES_OK; +} + + + +/*-----------------------------------------------------------------------*/ +/* Write Sector(s) */ + +#if _READONLY == 0 +DRESULT disk_write ( + BYTE drv, /* Physical drive nmuber (0..) */ + const BYTE *buff, /* Data to be written */ + DWORD sector, /* Sector address (LBA) */ + BYTE count /* Number of sectors to write (1..255) */ +) +{ + KBlock *dev = devs[drv]; + ASSERT(dev); + + while (count--) + { + if (kblock_write(dev, sector++, buff, 0, dev->blk_size) != dev->blk_size) + return RES_ERROR; + buff += dev->blk_size; + } + return RES_OK; +} +#endif /* _READONLY */ + + + +/*-----------------------------------------------------------------------*/ +/* Miscellaneous Functions */ + +DRESULT disk_ioctl ( + BYTE drv, /* Physical drive nmuber (0..) */ + BYTE ctrl, /* Control code */ + void *buff /* Buffer to send/receive control data */ +) +{ + KBlock *dev = devs[drv]; + ASSERT(dev); + + + switch (ctrl) + { + case CTRL_SYNC: + if (kblock_flush(dev) == 0) + return RES_OK; + else + return RES_ERROR; + + case GET_SECTOR_SIZE: + *(WORD *)buff = dev->blk_size; + return RES_OK; + + case GET_SECTOR_COUNT: + *(DWORD *)buff = dev->blk_cnt; + return RES_OK; + + case GET_BLOCK_SIZE: + *(DWORD *)buff = 1; + return RES_OK; + + default: + LOG_ERR("unknown command: [%d]\n", ctrl); + return RES_PARERR; + } +} + + +DWORD get_fattime(void) +{ + return 0; +} + + diff --git a/bertos/fs/fatfs/diskio.h b/bertos/fs/fatfs/diskio.h new file mode 100644 index 0000000..ea2ca94 --- /dev/null +++ b/bertos/fs/fatfs/diskio.h @@ -0,0 +1,72 @@ +/*----------------------------------------------------------------------- +/ Low level disk interface modlue include file R0.07 (C)ChaN, 2009 +/-----------------------------------------------------------------------*/ + +#ifndef _DISKIO + +#define _READONLY 0 /* 1: Read-only mode */ +#define _USE_IOCTL 1 + +#include "integer.h" +#include + + +/* Status of Disk Functions */ +typedef BYTE DSTATUS; + +/* Results of Disk Functions */ +typedef enum { + RES_OK = 0, /* 0: Successful */ + RES_ERROR, /* 1: R/W Error */ + RES_WRPRT, /* 2: Write Protected */ + RES_NOTRDY, /* 3: Not Ready */ + RES_PARERR /* 4: Invalid Parameter */ +} DRESULT; + + +/*---------------------------------------*/ +/* Prototypes for disk control functions */ +void disk_assignDrive(KBlock *dev, int dev_num); +BOOL assign_drives (int argc, char *argv[]); +DSTATUS disk_initialize (BYTE); +DSTATUS disk_status (BYTE); +DRESULT disk_read (BYTE, BYTE*, DWORD, BYTE); +#if _READONLY == 0 +DRESULT disk_write (BYTE, const BYTE*, DWORD, BYTE); +#endif +DRESULT disk_ioctl (BYTE, BYTE, void*); + + + + +/* Disk Status Bits (DSTATUS) */ + +#define STA_NOINIT 0x01 /* Drive not initialized */ +#define STA_NODISK 0x02 /* No medium in the drive */ +#define STA_PROTECT 0x04 /* Write protected */ + + +/* Command code for disk_ioctrl() */ + +/* Generic command */ +#define CTRL_SYNC 0 /* Mandatory for write functions */ +#define GET_SECTOR_COUNT 1 /* Mandatory for only f_mkfs() */ +#define GET_SECTOR_SIZE 2 +#define GET_BLOCK_SIZE 3 /* Mandatory for only f_mkfs() */ +#define CTRL_POWER 4 +#define CTRL_LOCK 5 +#define CTRL_EJECT 6 +/* MMC/SDC command */ +#define MMC_GET_TYPE 10 +#define MMC_GET_CSD 11 +#define MMC_GET_CID 12 +#define MMC_GET_OCR 13 +#define MMC_GET_SDSTAT 14 +/* ATA/CF command */ +#define ATA_GET_REV 20 +#define ATA_GET_MODEL 21 +#define ATA_GET_SN 22 + + +#define _DISKIO +#endif diff --git a/bertos/fs/fatfs/ff.c b/bertos/fs/fatfs/ff.c new file mode 100644 index 0000000..ed16bc0 --- /dev/null +++ b/bertos/fs/fatfs/ff.c @@ -0,0 +1,2947 @@ +/*----------------------------------------------------------------------------/ +/ FatFs - FAT file system module R0.07a (C)ChaN, 2009 +/-----------------------------------------------------------------------------/ +/ FatFs module is an open source software to implement FAT file system to +/ small embedded systems. This is a free software and is opened for education, +/ research and commercial developments under license policy of following trems. +/ +/ Copyright (C) 2009, ChaN, all right reserved. +/ +/ * The FatFs module is a free software and there is NO WARRANTY. +/ * No restriction on use. You can use, modify and redistribute it for +/ personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY. +/ * Redistributions of source code must retain the above copyright notice. +//-----------------------------------------------------------------------------/ +/ Feb 26,'06 R0.00 Prototype. +/ +/ Apr 29,'06 R0.01 First stable version. +/ +/ Jun 01,'06 R0.02 Added FAT12 support. +/ Removed unbuffered mode. +/ Fixed a problem on small (<32M) patition. +/ Jun 10,'06 R0.02a Added a configuration option (_FS_MINIMUM). +/ +/ Sep 22,'06 R0.03 Added f_rename(). +/ Changed option _FS_MINIMUM to _FS_MINIMIZE. +/ Dec 11,'06 R0.03a Improved cluster scan algolithm to write files fast. +/ Fixed f_mkdir() creates incorrect directory on FAT32. +/ +/ Feb 04,'07 R0.04 Supported multiple drive system. +/ Changed some interfaces for multiple drive system. +/ Changed f_mountdrv() to f_mount(). +/ Added f_mkfs(). +/ Apr 01,'07 R0.04a Supported multiple partitions on a plysical drive. +/ Added a capability of extending file size to f_lseek(). +/ Added minimization level 3. +/ Fixed an endian sensitive code in f_mkfs(). +/ May 05,'07 R0.04b Added a configuration option _USE_NTFLAG. +/ Added FSInfo support. +/ Fixed DBCS name can result FR_INVALID_NAME. +/ Fixed short seek (<= csize) collapses the file object. +/ +/ Aug 25,'07 R0.05 Changed arguments of f_read(), f_write() and f_mkfs(). +/ Fixed f_mkfs() on FAT32 creates incorrect FSInfo. +/ Fixed f_mkdir() on FAT32 creates incorrect directory. +/ Feb 03,'08 R0.05a Added f_truncate() and f_utime(). +/ Fixed off by one error at FAT sub-type determination. +/ Fixed btr in f_read() can be mistruncated. +/ Fixed cached sector is not flushed when create and close +/ without write. +/ +/ Apr 01,'08 R0.06 Added fputc(), fputs(), fprintf() and fgets(). +/ Improved performance of f_lseek() on moving to the same +/ or following cluster. +/ +/ Apr 01,'09 R0.07 Merged Tiny-FatFs as a buffer configuration option. +/ Added long file name support. +/ Added multiple code page support. +/ Added re-entrancy for multitask operation. +/ Added auto cluster size selection to f_mkfs(). +/ Added rewind option to f_readdir(). +/ Changed result code of critical errors. +/ Renamed string functions to avoid name collision. +/ Apr 14,'09 R0.07a Separated out OS dependent code on reentrant cfg. +/ Added multiple sector size support. +/---------------------------------------------------------------------------*/ + +#include "ff.h" /* FatFs configurations and declarations */ +#include "diskio.h" /* Declarations of low level disk I/O functions */ + + +/*-------------------------------------------------------------------------- + + Module Private Definitions + +---------------------------------------------------------------------------*/ + +#if _FS_REENTRANT +#if _USE_LFN == 1 +#error Static LFN work area must not be used in re-entrant configuration. +#endif +#define ENTER_FF(fs) { if (!lock_fs(fs)) return FR_TIMEOUT; } +#define LEAVE_FF(fs, res) { unlock_fs(fs, res); return res; } + +#else +#define ENTER_FF(fs) +#define LEAVE_FF(fs, res) return res + +#endif + +#define ABORT(fs, res) { fp->flag |= FA__ERROR; LEAVE_FF(fs, res); } + +#ifndef NULL +#define NULL 0 +#endif + + +/*-------------------------------------------------------------------------- + + Private Work Area + +---------------------------------------------------------------------------*/ + +static +FATFS *FatFs[_DRIVES]; /* Pointer to the file system objects (logical drives) */ +static +WORD Fsid; /* File system mount ID */ + + +#if _USE_LFN == 1 /* LFN with static LFN working buffer */ +static +WORD LfnBuf[_MAX_LFN + 1]; +#define NAMEBUF(sp,lp) BYTE sp[12]; WCHAR *lp = LfnBuf +#define INITBUF(dj,sp,lp) dj.fn = sp; dj.lfn = lp + +#elif _USE_LFN > 1 /* LFN with dynamic LFN working buffer */ +#define NAMEBUF(sp,lp) BYTE sp[12]; WCHAR lbuf[_MAX_LFN + 1], *lp = lbuf +#define INITBUF(dj,sp,lp) dj.fn = sp; dj.lfn = lp + +#else /* No LFN */ +#define NAMEBUF(sp,lp) BYTE sp[12] +#define INITBUF(dj,sp,lp) dj.fn = sp + +#endif + + + + +/*-------------------------------------------------------------------------- + + Private Functions + +---------------------------------------------------------------------------*/ + + +/*-----------------------------------------------------------------------*/ +/* String functions */ +/*-----------------------------------------------------------------------*/ + +/* Copy memory to memory */ +static +void mem_cpy (void* dst, const void* src, int cnt) { + char *d = (char*)dst; + const char *s = (const char *)src; + while (cnt--) *d++ = *s++; +} + +/* Fill memory */ +static +void mem_set (void* dst, int val, int cnt) { + char *d = (char*)dst; + while (cnt--) *d++ = (char)val; +} + +/* Compare memory to memory */ +static +int mem_cmp (const void* dst, const void* src, int cnt) { + const char *d = (const char *)dst, *s = (const char *)src; + int r = 0; + while (cnt-- && (r = *d++ - *s++) == 0) ; + return r; +} + +/* Check if chr is contained in the string */ +static +int chk_chr (const char* str, int chr) { + while (*str && *str != chr) str++; + return *str; +} + + + +/*-----------------------------------------------------------------------*/ +/* Request/Release grant to access the volume */ +/*-----------------------------------------------------------------------*/ +#if _FS_REENTRANT + +static +BOOL lock_fs ( + FATFS *fs /* File system object */ +) +{ + return ff_req_grant(fs->sobj); +} + + +static +void unlock_fs ( + FATFS *fs, /* File system object */ + FRESULT res /* Result code to be returned */ +) +{ + if (res != FR_NOT_ENABLED && + res != FR_INVALID_DRIVE && + res != FR_INVALID_OBJECT && + res != FR_TIMEOUT) { + ff_rel_grant(fs->sobj); + } +} +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Change window offset */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT move_window ( + FATFS *fs, /* File system object */ + DWORD sector /* Sector number to make apperance in the fs->win[] */ +) /* Move to zero only writes back dirty window */ +{ + DWORD wsect; + + + wsect = fs->winsect; + if (wsect != sector) { /* Changed current window */ +#if !_FS_READONLY + if (fs->wflag) { /* Write back dirty window if needed */ + if (disk_write(fs->drive, fs->win, wsect, 1) != RES_OK) + return FR_DISK_ERR; + fs->wflag = 0; + if (wsect < (fs->fatbase + fs->sects_fat)) { /* In FAT area */ + BYTE nf; + for (nf = fs->n_fats; nf >= 2; nf--) { /* Refrect the change to FAT copy */ + wsect += fs->sects_fat; + disk_write(fs->drive, fs->win, wsect, 1); + } + } + } +#endif + if (sector) { + if (disk_read(fs->drive, fs->win, sector, 1) != RES_OK) + return FR_DISK_ERR; + fs->winsect = sector; + } + } + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Clean-up cached data */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT sync ( /* FR_OK: successful, FR_DISK_ERR: failed */ + FATFS *fs /* File system object */ +) +{ + FRESULT res; + + + res = move_window(fs, 0); + if (res == FR_OK) { + /* Update FSInfo sector if needed */ + if (fs->fs_type == FS_FAT32 && fs->fsi_flag) { + fs->winsect = 0; + mem_set(fs->win, 0, 512); + ST_WORD(fs->win+BS_55AA, 0xAA55); + ST_DWORD(fs->win+FSI_LeadSig, 0x41615252); + ST_DWORD(fs->win+FSI_StrucSig, 0x61417272); + ST_DWORD(fs->win+FSI_Free_Count, fs->free_clust); + ST_DWORD(fs->win+FSI_Nxt_Free, fs->last_clust); + disk_write(fs->drive, fs->win, fs->fsi_sector, 1); + fs->fsi_flag = 0; + } + /* Make sure that no pending write process in the physical drive */ + if (disk_ioctl(fs->drive, CTRL_SYNC, (void*)NULL) != RES_OK) + res = FR_DISK_ERR; + } + + return res; +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Get a cluster status */ +/*-----------------------------------------------------------------------*/ + +static +DWORD get_cluster ( /* 0xFFFFFFFF:Disk error, 1:Interal error, Else:Cluster status */ + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to get the link information */ +) +{ + WORD wc, bc; + DWORD fsect; + + + if (clst < 2 || clst >= fs->max_clust) /* Check cluster address range */ + return 1; + + fsect = fs->fatbase; + switch (fs->fs_type) { + case FS_FAT12 : + bc = (WORD)clst * 3 / 2; + if (move_window(fs, fsect + (bc / SS(fs)))) break; + wc = fs->win[bc & (SS(fs) - 1)]; bc++; + if (move_window(fs, fsect + (bc / SS(fs)))) break; + wc |= (WORD)fs->win[bc & (SS(fs) - 1)] << 8; + return (clst & 1) ? (wc >> 4) : (wc & 0xFFF); + + case FS_FAT16 : + if (move_window(fs, fsect + (clst / (SS(fs) / 2)))) break; + return LD_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)]); + + case FS_FAT32 : + if (move_window(fs, fsect + (clst / (SS(fs) / 4)))) break; + return LD_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)]) & 0x0FFFFFFF; + } + + return 0xFFFFFFFF; /* An error occured at the disk I/O layer */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change a cluster status */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT put_cluster ( + FATFS *fs, /* File system object */ + DWORD clst, /* Cluster# to be changed (must be 2 to fs->max_clust-1) */ + DWORD val /* New value to mark the cluster */ +) +{ + WORD bc; + BYTE *p; + DWORD fsect; + FRESULT res; + + + if (clst < 2 || clst >= fs->max_clust) { /* Check cluster address range */ + res = FR_INT_ERR; + + } else { + fsect = fs->fatbase; + switch (fs->fs_type) { + case FS_FAT12 : + bc = (WORD)clst * 3 / 2; + res = move_window(fs, fsect + (bc / SS(fs))); + if (res != FR_OK) break; + p = &fs->win[bc & (SS(fs) - 1)]; + *p = (clst & 1) ? ((*p & 0x0F) | ((BYTE)val << 4)) : (BYTE)val; + bc++; + fs->wflag = 1; + res = move_window(fs, fsect + (bc / SS(fs))); + if (res != FR_OK) break; + p = &fs->win[bc & (SS(fs) - 1)]; + *p = (clst & 1) ? (BYTE)(val >> 4) : ((*p & 0xF0) | ((BYTE)(val >> 8) & 0x0F)); + break; + + case FS_FAT16 : + res = move_window(fs, fsect + (clst / (SS(fs) / 2))); + if (res != FR_OK) break; + ST_WORD(&fs->win[((WORD)clst * 2) & (SS(fs) - 1)], (WORD)val); + break; + + case FS_FAT32 : + res = move_window(fs, fsect + (clst / (SS(fs) / 4))); + if (res != FR_OK) break; + ST_DWORD(&fs->win[((WORD)clst * 4) & (SS(fs) - 1)], val); + break; + + default : + res = FR_INT_ERR; + } + fs->wflag = 1; + } + + return res; +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Remove a cluster chain */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT remove_chain ( + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to remove chain from */ +) +{ + FRESULT res; + DWORD nxt; + + + if (clst < 2 || clst >= fs->max_clust) { /* Check cluster address range */ + res = FR_INT_ERR; + + } else { + res = FR_OK; + while (clst < fs->max_clust) { /* Not a last link? */ + nxt = get_cluster(fs, clst); /* Get cluster status */ + if (nxt == 0) break; /* Empty cluster? */ + if (nxt == 1) { res = FR_INT_ERR; break; } /* Internal error? */ + if (nxt == 0xFFFFFFFF) { res = FR_DISK_ERR; break; } /* Disk error? */ + res = put_cluster(fs, clst, 0); /* Mark the cluster "empty" */ + if (res != FR_OK) break; + if (fs->free_clust != 0xFFFFFFFF) { /* Update FSInfo */ + fs->free_clust++; + fs->fsi_flag = 1; + } + clst = nxt; /* Next cluster */ + } + } + + return res; +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Stretch or create a cluster chain */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +DWORD create_chain ( /* 0:No free cluster, 1:Internal error, 0xFFFFFFFF:Disk error, >=2:New cluster# */ + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to stretch. 0 means create a new chain. */ +) +{ + DWORD cs, ncl, scl, mcl; + + + mcl = fs->max_clust; + if (clst == 0) { /* Create new chain */ + scl = fs->last_clust; /* Get suggested start point */ + if (scl == 0 || scl >= mcl) scl = 1; + } + else { /* Stretch existing chain */ + cs = get_cluster(fs, clst); /* Check the cluster status */ + if (cs < 2) return 1; /* It is an invalid cluster */ + if (cs < mcl) return cs; /* It is already followed by next cluster */ + scl = clst; + } + + ncl = scl; /* Start cluster */ + for (;;) { + ncl++; /* Next cluster */ + if (ncl >= mcl) { /* Wrap around */ + ncl = 2; + if (ncl > scl) return 0; /* No free custer */ + } + cs = get_cluster(fs, ncl); /* Get the cluster status */ + if (cs == 0) break; /* Found a free cluster */ + if (cs == 0xFFFFFFFF || cs == 1)/* An error occured */ + return cs; + if (ncl == scl) return 0; /* No free custer */ + } + + if (put_cluster(fs, ncl, 0x0FFFFFFF)) /* Mark the new cluster "in use" */ + return 0xFFFFFFFF; + if (clst != 0) { /* Link it to previous one if needed */ + if (put_cluster(fs, clst, ncl)) + return 0xFFFFFFFF; + } + + fs->last_clust = ncl; /* Update FSINFO */ + if (fs->free_clust != 0xFFFFFFFF) { + fs->free_clust--; + fs->fsi_flag = 1; + } + + return ncl; /* Return new cluster number */ +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Get sector# from cluster# */ +/*-----------------------------------------------------------------------*/ + +static +DWORD clust2sect ( /* !=0: sector number, 0: failed - invalid cluster# */ + FATFS *fs, /* File system object */ + DWORD clst /* Cluster# to be converted */ +) +{ + clst -= 2; + if (clst >= (fs->max_clust - 2)) return 0; /* Invalid cluster# */ + return clst * fs->csize + fs->database; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Seek directory index */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT dir_seek ( + DIR *dj, /* Pointer to directory object */ + WORD idx /* Directory index number */ +) +{ + DWORD clst; + WORD ic; + + + dj->index = idx; + clst = dj->sclust; + if (clst == 1 || clst >= dj->fs->max_clust) /* Check start cluster range */ + return FR_INT_ERR; + + if (clst == 0) { /* Static table */ + if (idx >= dj->fs->n_rootdir) /* Index is out of range */ + return FR_INT_ERR; + dj->sect = dj->fs->dirbase + idx / (SS(dj->fs) / 32); + } + else { /* Dynamic table */ + ic = SS(dj->fs) / 32 * dj->fs->csize; /* Indexes per cluster */ + while (idx >= ic) { /* Follow cluster chain */ + clst = get_cluster(dj->fs, clst); /* Get next cluster */ + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; /* Disk error */ + if (clst < 2 || clst >= dj->fs->max_clust) /* Reached to end of table or int error */ + return FR_INT_ERR; + idx -= ic; + } + dj->clust = clst; + dj->sect = clust2sect(dj->fs, clst) + idx / (SS(dj->fs) / 32); + } + dj->dir = dj->fs->win + (idx % (SS(dj->fs) / 32)) * 32; + + return FR_OK; /* Seek succeeded */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* Move directory index next */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT dir_next ( /* FR_OK:Succeeded, FR_NO_FILE:End of table, FR_DENIED:EOT and could not streach */ + DIR *dj, /* Pointer to directory object */ + BOOL streach /* FALSE: Do not streach table, TRUE: Streach table if needed */ +) +{ + DWORD clst; + WORD i; + + + i = dj->index + 1; + if (!i || !dj->sect) /* Report EOT when index has reached 65535 */ + return FR_NO_FILE; + + if (!(i % (SS(dj->fs) / 32))) { /* Sector changed? */ + dj->sect++; /* Next sector */ + + if (dj->sclust == 0) { /* Static table */ + if (i >= dj->fs->n_rootdir) /* Report EOT when end of table */ + return FR_NO_FILE; + } + else { /* Dynamic table */ + if (((i / (SS(dj->fs) / 32)) & (dj->fs->csize - 1)) == 0) { /* Cluster changed? */ + clst = get_cluster(dj->fs, dj->clust); /* Get next cluster */ + if (clst <= 1) return FR_INT_ERR; + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; + if (clst >= dj->fs->max_clust) { /* When it reached end of dinamic table */ +#if !_FS_READONLY + BYTE c; + if (!streach) return FR_NO_FILE; /* When do not streach, report EOT */ + clst = create_chain(dj->fs, dj->clust); /* Streach cluster chain */ + if (clst == 0) return FR_DENIED; /* No free cluster */ + if (clst == 1) return FR_INT_ERR; + if (clst == 0xFFFFFFFF) return FR_DISK_ERR; + /* Clean-up streached table */ + if (move_window(dj->fs, 0)) return FR_DISK_ERR; /* Flush active window */ + mem_set(dj->fs->win, 0, SS(dj->fs)); /* Clear window buffer */ + dj->fs->winsect = clust2sect(dj->fs, clst); /* Cluster start sector */ + for (c = 0; c < dj->fs->csize; c++) { /* Fill the new cluster with 0 */ + dj->fs->wflag = 1; + if (move_window(dj->fs, 0)) return FR_DISK_ERR; + dj->fs->winsect++; + } + dj->fs->winsect -= c; /* Rewind window address */ +#else + return FR_NO_FILE; /* Report EOT */ +#endif + } + dj->clust = clst; /* Initialize data for new cluster */ + dj->sect = clust2sect(dj->fs, clst); + } + } + } + + dj->index = i; + dj->dir = dj->fs->win + (i % (SS(dj->fs) / 32)) * 32; + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Test/Pick/Fit an LFN segment from/to directory entry */ +/*-----------------------------------------------------------------------*/ +#if _USE_LFN +static +const BYTE LfnOfs[] = {1,3,5,7,9,14,16,18,20,22,24,28,30}; /* Offset of LFN chars in the directory entry */ + + +static +BOOL test_lfn ( /* TRUE:Matched, FALSE:Not matched */ + WCHAR *lfnbuf, /* Pointer to the LFN to be compared */ + BYTE *dir /* Pointer to the directory entry containing a part of LFN */ +) +{ + int i, s; + WCHAR wc1, wc2; + + + i = ((dir[LDIR_Ord] & 0xBF) - 1) * 13; /* Offset in the LFN buffer */ + s = 0; + do { + if (i >= _MAX_LFN) return FALSE; /* Out of buffer range? */ + wc1 = LD_WORD(dir+LfnOfs[s]); /* Get both characters to compare */ + wc2 = lfnbuf[i++]; + if (IsLower(wc1)) wc1 -= 0x20; /* Compare it (ignore case) */ + if (IsLower(wc2)) wc2 -= 0x20; + if (wc1 != wc2) return FALSE; + } while (++s < 13 && wc1); /* Repeat until last char or a NUL char is processed */ + + return TRUE; /* The LFN entry matched */ +} + + + +static +BOOL pick_lfn ( /* TRUE:Succeeded, FALSE:Buffer overflow */ + WCHAR *lfnbuf, /* Pointer to the Unicode-LFN buffer */ + BYTE *dir /* Pointer to the directory entry */ +) +{ + int i, s; + WCHAR wchr; + + + i = ((dir[LDIR_Ord] & 0xBF) - 1) * 13; /* Offset in the LFN buffer */ + s = 0; + do { + wchr = LD_WORD(dir+LfnOfs[s]); /* Get an LFN char */ + if (!wchr) break; /* End of LFN? */ + if (i >= _MAX_LFN) return FALSE; /* Buffer overflow */ + lfnbuf[i++] = wchr; /* Store it */ + } while (++s < 13); /* Repeat until last char is copied */ + if (dir[LDIR_Ord] & 0x40) lfnbuf[i] = 0; /* Put terminator if last LFN entry */ + + return TRUE; +} + + +#if !_FS_READONLY +static +void fit_lfn ( + const WCHAR *lfnbuf, /* Pointer to the LFN buffer */ + BYTE *dir, /* Pointer to the directory entry */ + BYTE ord, /* LFN order (1-20) */ + BYTE sum /* SFN sum */ +) +{ + int i, s; + WCHAR wchr; + + + dir[LDIR_Chksum] = sum; /* Set check sum */ + dir[LDIR_Attr] = AM_LFN; /* Set attribute. LFN entry */ + dir[LDIR_Type] = 0; + ST_WORD(dir+LDIR_FstClusLO, 0); + + i = (ord - 1) * 13; /* Offset in the LFN buffer */ + s = wchr = 0; + do { + if (wchr != 0xFFFF) wchr = lfnbuf[i++]; /* Get an effective char */ + ST_WORD(dir+LfnOfs[s], wchr); /* Put it */ + if (!wchr) wchr = 0xFFFF; /* Padding chars following last char */ + } while (++s < 13); + if (wchr == 0xFFFF || !lfnbuf[i]) ord |= 0x40;/* Bottom LFN part is the start of LFN sequence */ + dir[LDIR_Ord] = ord; /* Set the LFN order */ +} + +#endif +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Create numbered name */ +/*-----------------------------------------------------------------------*/ +#if _USE_LFN +void gen_numname ( + BYTE *dst, /* Pointer to genartated SFN */ + const BYTE *src, /* Pointer to source SFN to be modified */ + const WCHAR *lfn, /* Pointer to LFN */ + WORD num /* Sequense number */ +) +{ + char ns[8]; + int i, j; + + + mem_cpy(dst, src, 11); + + if (num > 5) { /* On many collisions, generate a hash number instead of sequencial number */ + do num = (num >> 1) + (num << 15) + (WORD)*lfn++; while (*lfn); + } + + /* itoa */ + i = 7; + do { + ns[i--] = (num % 10) + '0'; + num /= 10; + } while (num); + ns[i] = '~'; + + /* Append the number */ + for (j = 0; j < i && dst[j] != ' '; j++) { + if (IsDBCS1(dst[j])) { + if (j == i - 1) break; + j++; + } + } + do { + dst[j++] = (i < 8) ? ns[i++] : ' '; + } while (j < 8); +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Calculate sum of an SFN */ +/*-----------------------------------------------------------------------*/ +#if _USE_LFN +static +BYTE sum_sfn ( + const BYTE *dir /* Ptr to directory entry */ +) +{ + BYTE sum = 0; + int n = 11; + + do sum = (sum >> 1) + (sum << 7) + *dir++; while (--n); + return sum; +} +#endif + + + + +/*-----------------------------------------------------------------------*/ +/* Find an object in the directory */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT dir_find ( + DIR *dj /* Pointer to the directory object linked to the file name */ +) +{ + FRESULT res; + BYTE a, c, lfen, ord, sum, *dir; + + + res = dir_seek(dj, 0); /* Rewind directory object */ + if (res != FR_OK) return res; + + ord = sum = 0xFF; lfen = *(dj->fn+11) & 1; + do { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + dir = dj->dir; /* Ptr to the directory entry of current index */ + c = dir[DIR_Name]; + if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ + a = dir[DIR_Attr] & AM_MASK; +#if _USE_LFN /* LFN configuration */ + if (c == 0xE5 || c == '.' || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ + ord = 0xFF; + } else { + if (a == AM_LFN) { /* An LFN entry is found */ + if (dj->lfn) { + if (c & 0x40) { /* Is it start of LFN sequence? */ + sum = dir[LDIR_Chksum]; + c &= 0xBF; ord = c; /* LFN start order */ + dj->lfn_idx = dj->index; + } + /* Check LFN validity. Compare LFN if it is out of 8.3 format */ + ord = (c == ord && sum == dir[LDIR_Chksum] && (!lfen || test_lfn(dj->lfn, dir))) ? ord - 1 : 0xFF; + } + } else { /* An SFN entry is found */ + if (ord || sum != sum_sfn(dir)) { /* Did not LFN match? */ + dj->lfn_idx = 0xFFFF; + ord = 0xFF; + } + if (lfen) { /* Match LFN if it is out of 8.3 format */ + if (ord == 0) break; + } else { /* Match SFN if LFN is in 8.3 format */ + if (!mem_cmp(dir, dj->fn, 11)) break; + } + } + } +#else /* Non LFN configuration */ + if (c != 0xE5 && c != '.' && !(a & AM_VOL) && !mem_cmp(dir, dj->fn, 11)) /* Is it a valid entry? */ + break; +#endif + res = dir_next(dj, FALSE); /* Next entry */ + } while (res == FR_OK); + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read an object from the directory */ +/*-----------------------------------------------------------------------*/ +#if _FS_MINIMIZE <= 2 +static +FRESULT dir_read ( + DIR *dj /* Pointer to the directory object to store read object name */ +) +{ + FRESULT res; + BYTE a, c, ord, sum, *dir; + + + ord = sum = 0xFF; + res = FR_NO_FILE; + while (dj->sect) { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + dir = dj->dir; /* Ptr to the directory entry of current index */ + c = dir[DIR_Name]; + if (c == 0) { res = FR_NO_FILE; break; } /* Reached to end of table */ + a = dir[DIR_Attr] & AM_MASK; +#if _USE_LFN /* LFN configuration */ + if (c == 0xE5 || c == '.' || ((a & AM_VOL) && a != AM_LFN)) { /* An entry without valid data */ + ord = 0xFF; + } else { + if (a == AM_LFN) { /* An LFN entry is found */ + if (c & 0x40) { /* Is it start of LFN sequence? */ + sum = dir[LDIR_Chksum]; + c &= 0xBF; ord = c; + dj->lfn_idx = dj->index; + } + /* Check LFN validity and capture it */ + ord = (c == ord && sum == dir[LDIR_Chksum] && pick_lfn(dj->lfn, dir)) ? ord - 1 : 0xFF; + } else { /* An SFN entry is found */ + if (ord || sum != sum_sfn(dir)) /* Is there a valid LFN entry? */ + dj->lfn_idx = 0xFFFF; /* No LFN. */ + break; + } + } +#else /* Non LFN configuration */ + if (c != 0xE5 && c != '.' && !(a & AM_VOL)) /* Is it a valid entry? */ + break; +#endif + res = dir_next(dj, FALSE); /* Next entry */ + if (res != FR_OK) break; + } + + if (res != FR_OK) dj->sect = 0; + + return res; +} +#endif + + + +/*-----------------------------------------------------------------------*/ +/* Register an object to the directory */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY +static +FRESULT dir_register ( /* FR_OK:Successful, FR_DENIED:No free entry or too many SFN collision, FR_DISK_ERR:Disk error */ + DIR *dj /* Target directory with object name to be created */ +) +{ + FRESULT res; + BYTE c, *dir; + +#if _USE_LFN /* LFN configuration */ + WORD n, ne, is; + BYTE sn[12], *fn, sum; + WCHAR *lfn; + + fn = dj->fn; lfn = dj->lfn; + mem_cpy(sn, fn, 12); + if (sn[11] & 1) { /* When LFN is out of 8.3 format, generate a numbered name */ + fn[11] = 0; dj->lfn = NULL; /* Find only SFN */ + for (n = 1; n < 100; n++) { + gen_numname(fn, sn, lfn, n); /* Generate a numbered name */ + res = dir_find(dj); /* Check if the name collides with existing SFN */ + if (res != FR_OK) break; + } + if (n == 100) return FR_DENIED; /* Abort if too many collisions */ + if (res != FR_NO_FILE) return res; /* Abort if the result is other than 'not collided' */ + fn[11] = sn[11]; dj->lfn = lfn; + } + if (sn[11] & 2) { /* When eliminate LFN, reserve only an SFN entry. */ + ne = 1; + } else { /* Otherwise reserve an SFN + LFN entries. */ + for (ne = 0; lfn[ne]; ne++) ; + ne = (ne + 25) / 13; + } + + /* Reserve contiguous entries */ + res = dir_seek(dj, 0); + if (res != FR_OK) return res; + n = is = 0; + do { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + c = *dj->dir; /* Check the entry status */ + if (c == 0xE5 || c == 0) { /* Is it a blank entry? */ + if (n == 0) is = dj->index; /* First index of the contigulus entry */ + if (++n == ne) break; /* A contiguous entry that requiered count is found */ + } else { + n = 0; /* Not a blank entry. Restart to search */ + } + res = dir_next(dj, TRUE); /* Next entry with table streach */ + } while (res == FR_OK); + + if (res == FR_OK && ne > 1) { /* Initialize LFN entry if needed */ + res = dir_seek(dj, is); + if (res == FR_OK) { + sum = sum_sfn(dj->fn); /* Sum of the SFN tied to the LFN */ + ne--; + do { /* Store LFN entries in bottom first */ + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + fit_lfn(dj->lfn, dj->dir, (BYTE)ne, sum); + dj->fs->wflag = 1; + res = dir_next(dj, FALSE); /* Next entry */ + } while (res == FR_OK && --ne); + } + } + +#else /* Non LFN configuration */ + res = dir_seek(dj, 0); + if (res == FR_OK) { + do { /* Find a blank entry for the SFN */ + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + c = *dj->dir; + if (c == 0xE5 || c == 0) break; /* Is it a blank entry? */ + res = dir_next(dj, TRUE); /* Next entry with table streach */ + } while (res == FR_OK); + } +#endif + + if (res == FR_OK) { /* Initialize the SFN entry */ + res = move_window(dj->fs, dj->sect); + if (res == FR_OK) { + dir = dj->dir; + mem_set(dir, 0, 32); /* Clean the entry */ + mem_cpy(dir, dj->fn, 11); /* Put SFN */ + dir[DIR_NTres] = *(dj->fn+11) & 0x18; /* Put NT flag */ + dj->fs->wflag = 1; + } + } + + return res; +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Remove an object from the directory */ +/*-----------------------------------------------------------------------*/ +#if !_FS_READONLY && !_FS_MINIMIZE +static +FRESULT dir_remove ( /* FR_OK: Successful, FR_DISK_ERR: A disk error */ + DIR *dj /* Directory object pointing the entry to be removed */ +) +{ + FRESULT res; + +#if _USE_LFN /* LFN configuration */ + WORD i; + + i = dj->index; /* SFN index */ + res = dir_seek(dj, (WORD)((dj->lfn_idx == 0xFFFF) ? i : dj->lfn_idx)); /* Goto the SFN or top of the LFN entries */ + if (res == FR_OK) { + do { + res = move_window(dj->fs, dj->sect); + if (res != FR_OK) break; + *dj->dir = 0xE5; /* Mark the entry "deleted" */ + dj->fs->wflag = 1; + if (dj->index >= i) break; /* When SFN is deleted, all entries of the object is deleted. */ + res = dir_next(dj, FALSE); /* Next entry */ + } while (res == FR_OK); + if (res == FR_NO_FILE) res = FR_INT_ERR; + } + +#else /* Non LFN configuration */ + res = dir_seek(dj, dj->index); + if (res == FR_OK) { + res = move_window(dj->fs, dj->sect); + if (res == FR_OK) { + *dj->dir = 0xE5; /* Mark the entry "deleted" */ + dj->fs->wflag = 1; + } + } +#endif + + return res; +} +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Pick a segment and create the object name in directory form */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT create_name ( + DIR *dj, /* Pointer to the directory object */ + const char **path /* Pointer to pointer to the segment in the path string */ +) +{ +#if _USE_LFN + BYTE c, b, cf, *sfn; + WCHAR w, *lfn; + int i, ni, si, di; + const char *p; + + /* Create LFN in Unicode */ + si = di = 0; + p = *path; + lfn = dj->lfn; + for (;;) { + w = (BYTE)p[si++]; /* Get a character */ + if (w < ' ' || w == '/' || w == '\\') break; /* Break on end of segment */ + if (IsDBCS1(w)) { /* If it is DBC 1st byte */ + c = p[si++]; /* Get 2nd byte */ + if (!IsDBCS2(c)) /* Reject invalid DBC */ + return FR_INVALID_NAME; + w = (w << 8) + c; + } else { + if (chk_chr("\"*:<>\?|\x7F", w)) /* Reject unallowable chars for LFN */ + return FR_INVALID_NAME; + } + w = ff_convert(w, 1); /* Convert OEM to Unicode, store it */ + if (!w || di >= _MAX_LFN) /* Reject invalid code or too long name */ + return FR_INVALID_NAME; + lfn[di++] = w; + } + *path = &p[si]; /* Rerurn pointer to the next segment */ + cf = (w < ' ') ? 4 : 0; /* Set last segment flag if end of path */ + + while (di) { /* Strip trailing spaces and dots */ + w = lfn[di - 1]; + if (w != ' ' && w != '.') break; + di--; + } + if (!di) return FR_INVALID_NAME; /* Reject null string */ + + lfn[di] = 0; /* LFN is created */ + + /* Create SFN in directory form */ + sfn = dj->fn; + mem_set(sfn, ' ', 11); + for (si = 0; lfn[si] == ' ' || lfn[si] == '.'; si++) ; /* Strip leading spaces and dots */ + if (si) cf |= 1; + while (di && lfn[di - 1] != '.') di--; /* Find extension (di<=si: no extension) */ + + b = i = 0; ni = 8; + for (;;) { + w = lfn[si++]; /* Get an LFN char */ + if (w == 0) break; /* Break when enf of the LFN */ + if (w == ' ' || (w == '.' && si != di)) { /* Remove spaces and dots */ + cf |= 1; continue; + } + if (i >= ni || si == di) { /* Here is extension or end of SFN */ + if (ni == 11) { /* Extension is longer than 3 bytes */ + cf |= 1; break; + } + if (si != di) cf |= 1; /* File name is longer than 8 bytes */ + if (si > di) break; /* No extension */ + si = di; i = 8; ni = 11; /* Enter extension section */ + b <<= 2; continue; + } + w = ff_convert(w, 0); /* Unicode -> OEM code */ + if (w >= 0x80) cf |= 0x20; /* If there is any extended char, force create an LFN */ + if (w >= 0x100) { /* Double byte char */ + if (i >= ni - 1) { + cf |= 1; i = ni; continue; + } + sfn[i++] = (BYTE)(w >> 8); + } else { /* Single byte char */ + if (chk_chr("+,;[=]", w)) { /* Replace unallowable chars for SFN */ + w = '_'; cf |= 1; + } else { + if (IsUpper(w)) { /* Large capital */ + b |= 2; + } else { + if (IsLower(w)) { /* Small capital */ + b |= 1; w -= 0x20; + } + } + } + } + sfn[i++] = (BYTE)w; + } + if (sfn[0] == 0xE5) sfn[0] = 0x05; /* When first char collides with 0xE5, replace it with 0x05 */ + + if (ni == 8) b <<= 2; + if ((cf & 0x21) == 0) { /* When LFN is in 8.3 format without extended char, NT flags are created */ + if ((b & 0x03) == 0x01) cf |= 0x10; /* NT flag (Extension has only small capital) */ + if ((b & 0x0C) == 0x04) cf |= 0x08; /* NT flag (Filename has only small capital) */ + if ((b & 0x0C) != 0x0C && (b & 0x03) != 0x03) cf |= 2; /* Eliminate LFN when non composite capitals */ + } + + sfn[11] = cf; /* SFN is created */ + +#else + BYTE c, d, b, *sfn; + int ni, si, i; + const char *p; + + /* Create file name in directory form */ + sfn = dj->fn; + mem_set(sfn, ' ', 11); + si = i = b = 0; ni = 8; + p = *path; + for (;;) { + c = p[si++]; + if (c < ' ' || c == '/' || c == '\\') break; /* Break on end of segment */ + if (c == '.' || i >= ni) { + if (ni != 8 || c != '.') return FR_INVALID_NAME; + i = 8; ni = 11; + b <<= 2; continue; + } + if (c >= 0x80) b |= 3; /* If there is any extended char, eliminate NT flag */ + if (IsDBCS1(c)) { /* If it is DBC 1st byte */ + d = p[si++]; /* Get 2nd byte */ + if (!IsDBCS2(d) || i >= ni - 1) /* Reject invalid DBC */ + return FR_INVALID_NAME; + sfn[i++] = c; + sfn[i++] = d; + } else { + if (chk_chr(" +,;[=]\"*:<>\?|\x7F", c)) /* Reject unallowable chrs for SFN */ + return FR_INVALID_NAME; + if (IsUpper(c)) { + b |= 2; + } else { + if (IsLower(c)) { + b |= 1; c -= 0x20; + } + } + sfn[i++] = c; + } + } + *path = &p[si]; /* Rerurn pointer to the next segment */ + c = (c < ' ') ? 4 : 0; /* Set last segment flag if end of path */ + + if (!i) return FR_INVALID_NAME; /* Reject null string */ + if (sfn[0] == 0xE5) sfn[0] = 0x05; /* When first char collides with 0xE5, replace it with 0x05 */ + + if (ni == 8) b <<= 2; + if ((b & 0x03) == 0x01) c |= 0x10; /* NT flag (Extension has only small capital) */ + if ((b & 0x0C) == 0x04) c |= 0x08; /* NT flag (Filename has only small capital) */ + + sfn[11] = c; /* Store NT flag, File name is created */ +#endif + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Get file information from directory entry */ +/*-----------------------------------------------------------------------*/ +#if _FS_MINIMIZE <= 1 +static +void get_fileinfo ( /* No return code */ + DIR *dj, /* Pointer to the directory object */ + FILINFO *fno /* Pointer to store the file information */ +) +{ + int i; + BYTE c, nt, *dir; + char *p; + + + p = fno->fname; + if (dj->sect) { + dir = dj->dir; + nt = dir[DIR_NTres]; /* NT flag */ + for (i = 0; i < 8; i++) { /* Copy file name body */ + c = dir[i]; + if (c == ' ') break; + if (c == 0x05) c = 0xE5; + if ((nt & 0x08) && IsUpper(c)) c += 0x20; + *p++ = c; + } + if (dir[8] != ' ') { /* Copy file name extension */ + *p++ = '.'; + for (i = 8; i < 11; i++) { + c = dir[i]; + if (c == ' ') break; + if ((nt & 0x10) && IsUpper(c)) c += 0x20; + *p++ = c; + } + } + fno->fattrib = dir[DIR_Attr]; /* Attribute */ + fno->fsize = LD_DWORD(dir+DIR_FileSize); /* Size */ + fno->fdate = LD_WORD(dir+DIR_WrtDate); /* Date */ + fno->ftime = LD_WORD(dir+DIR_WrtTime); /* Time */ + } + *p = 0; + +#if _USE_LFN + p = fno->lfname; + if (p) { + WCHAR wchr, *lfn; + + i = 0; + if (dj->sect && dj->lfn_idx != 0xFFFF) {/* Get LFN if available */ + lfn = dj->lfn; + while ((wchr = *lfn++) != 0) { /* Get an LFN char */ + wchr = ff_convert(wchr, 0); /* Unicode -> OEM code */ + if (!wchr) { i = 0; break; } /* Conversion error, no LFN */ + if (_DF1S && wchr >= 0x100) /* Put 1st byte if it is a DBC */ + p[i++] = (char)(wchr >> 8); + p[i++] = (char)wchr; + if (i >= fno->lfsize) { i = 0; break; } /* Buffer overrun, no LFN */ + } + } + p[i] = 0; /* Terminator */ + } +#endif +} +#endif /* _FS_MINIMIZE <= 1 */ + + + + +/*-----------------------------------------------------------------------*/ +/* Follow a file path */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT follow_path ( /* FR_OK(0): successful, !=0: error code */ + DIR *dj, /* Directory object to return last directory and found object */ + const char *path /* Full-path string to find a file or directory */ +) +{ + FRESULT res; + BYTE *dir, last; + + + if (*path == '/' || *path == '\\' ) path++; /* Strip heading separator */ + + dj->sclust = /* Set start directory (root dir) */ + (dj->fs->fs_type == FS_FAT32) ? dj->fs->dirbase : 0; + + if ((BYTE)*path < ' ') { /* Null path means the root directory */ + res = dir_seek(dj, 0); + dj->dir = NULL; + + } else { /* Follow path */ + for (;;) { + res = create_name(dj, &path); /* Get a segment */ + if (res != FR_OK) break; + res = dir_find(dj); /* Find it */ + last = *(dj->fn+11) & 4; + if (res != FR_OK) { /* Could not find the object */ + if (res == FR_NO_FILE && !last) + res = FR_NO_PATH; + break; + } + if (last) break; /* Last segment match. Function completed. */ + dir = dj->dir; /* There is next segment. Follow the sub directory */ + if (!(dir[DIR_Attr] & AM_DIR)) { /* Cannot follow because it is a file */ + res = FR_NO_PATH; break; + } + dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + } + } + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Load boot record and check if it is an FAT boot record */ +/*-----------------------------------------------------------------------*/ + +static +BYTE check_fs ( /* 0:The FAT boot record, 1:Valid boot record but not an FAT, 2:Not a boot record, 3:Error */ + FATFS *fs, /* File system object */ + DWORD sect /* Sector# (lba) to check if it is an FAT boot record or not */ +) +{ + if (disk_read(fs->drive, fs->win, sect, 1) != RES_OK) /* Load boot record */ + return 3; + if (LD_WORD(&fs->win[BS_55AA]) != 0xAA55) /* Check record signature (always placed at offset 510 even if the sector size is >512) */ + return 2; + + if (!mem_cmp(&fs->win[BS_FilSysType], "FAT", 3)) /* Check FAT signature */ + return 0; + if (!mem_cmp(&fs->win[BS_FilSysType32], "FAT32", 5) && !(fs->win[BPB_ExtFlags] & 0x80)) + return 0; + + return 1; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Make sure that the file system is valid */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT auto_mount ( /* FR_OK(0): successful, !=0: any error occured */ + const char **path, /* Pointer to pointer to the path name (drive number) */ + FATFS **rfs, /* Pointer to pointer to the found file system object */ + BYTE chk_wp /* !=0: Check media write protection for write access */ +) +{ + FRESULT res; + BYTE vol, fmt, *tbl; + DSTATUS stat; + DWORD bsect, fsize, tsect, mclst; + const char *p = *path; + FATFS *fs; + + + /* Get logical drive number from the path name */ + vol = p[0] - '0'; /* Is there a drive number? */ + if (vol <= 9 && p[1] == ':') { + p += 2; /* Found a drive number, get and strip it */ + *path = p; /* Return pointer to the path name */ + } else { + vol = 0; /* No drive number is given, use drive number 0 as default */ + } + + /* Check if the logical drive number is valid or not */ + if (vol >= _DRIVES) return FR_INVALID_DRIVE; /* Is the drive number valid? */ + *rfs = fs = FatFs[vol]; /* Returen pointer to the corresponding file system object */ + if (!fs) return FR_NOT_ENABLED; /* Is the file system object registered? */ + + ENTER_FF(fs); /* Lock file system */ + + if (fs->fs_type) { /* If the logical drive has been mounted */ + stat = disk_status(fs->drive); + if (!(stat & STA_NOINIT)) { /* and physical drive is kept initialized (has not been changed), */ +#if !_FS_READONLY + if (chk_wp && (stat & STA_PROTECT)) /* Check write protection if needed */ + return FR_WRITE_PROTECTED; +#endif + return FR_OK; /* The file system object is valid */ + } + } + + /* The logical drive must be re-mounted. Following code attempts to mount the volume */ + + fs->fs_type = 0; /* Clear the file system object */ + fs->drive = LD2PD(vol); /* Bind the logical drive and a physical drive */ + stat = disk_initialize(fs->drive); /* Initialize low level disk I/O layer */ + if (stat & STA_NOINIT) /* Check if the drive is ready */ + return FR_NOT_READY; +#if _MAX_SS != 512 /* Get disk sector size if needed */ + if (disk_ioctl(fs->drive, GET_SECTOR_SIZE, &SS(fs)) != RES_OK || SS(fs) > _MAX_SS) + return FR_NO_FILESYSTEM; +#endif +#if !_FS_READONLY + if (chk_wp && (stat & STA_PROTECT)) /* Check write protection if needed */ + return FR_WRITE_PROTECTED; +#endif + /* Search FAT partition on the drive */ + fmt = check_fs(fs, bsect = 0); /* Check sector 0 as an SFD format */ + if (fmt == 1) { /* Not an FAT boot record, it may be patitioned */ + /* Check a partition listed in top of the partition table */ + tbl = &fs->win[MBR_Table + LD2PT(vol) * 16]; /* Partition table */ + if (tbl[4]) { /* Is the partition existing? */ + bsect = LD_DWORD(&tbl[8]); /* Partition offset in LBA */ + fmt = check_fs(fs, bsect); /* Check the partition */ + } + } + if (fmt == 3) return FR_DISK_ERR; + if (fmt || LD_WORD(fs->win+BPB_BytsPerSec) != SS(fs)) /* No valid FAT patition is found */ + return FR_NO_FILESYSTEM; + + /* Initialize the file system object */ + fsize = LD_WORD(fs->win+BPB_FATSz16); /* Number of sectors per FAT */ + if (!fsize) fsize = LD_DWORD(fs->win+BPB_FATSz32); + fs->sects_fat = fsize; + fs->n_fats = fs->win[BPB_NumFATs]; /* Number of FAT copies */ + fsize *= fs->n_fats; /* (Number of sectors in FAT area) */ + fs->fatbase = bsect + LD_WORD(fs->win+BPB_RsvdSecCnt); /* FAT start sector (lba) */ + fs->csize = fs->win[BPB_SecPerClus]; /* Number of sectors per cluster */ + fs->n_rootdir = LD_WORD(fs->win+BPB_RootEntCnt); /* Nmuber of root directory entries */ + tsect = LD_WORD(fs->win+BPB_TotSec16); /* Number of sectors on the file system */ + if (!tsect) tsect = LD_DWORD(fs->win+BPB_TotSec32); + fs->max_clust = mclst = (tsect /* Last cluster# + 1 */ + - LD_WORD(fs->win+BPB_RsvdSecCnt) - fsize - fs->n_rootdir / (SS(fs)/32) + ) / fs->csize + 2; + + fmt = FS_FAT12; /* Determine the FAT sub type */ + if (mclst >= 0xFF7) fmt = FS_FAT16; /* Number of clusters >= 0xFF5 */ + if (mclst >= 0xFFF7) fmt = FS_FAT32; /* Number of clusters >= 0xFFF5 */ + + if (fmt == FS_FAT32) + fs->dirbase = LD_DWORD(fs->win+BPB_RootClus); /* Root directory start cluster */ + else + fs->dirbase = fs->fatbase + fsize; /* Root directory start sector (lba) */ + fs->database = fs->fatbase + fsize + fs->n_rootdir / (SS(fs)/32); /* Data start sector (lba) */ + +#if !_FS_READONLY + /* Initialize allocation information */ + fs->free_clust = 0xFFFFFFFF; + fs->wflag = 0; + /* Get fsinfo if needed */ + if (fmt == FS_FAT32) { + fs->fsi_sector = bsect + LD_WORD(fs->win+BPB_FSInfo); + fs->fsi_flag = 0; + if (disk_read(fs->drive, fs->win, fs->fsi_sector, 1) == RES_OK && + LD_WORD(fs->win+BS_55AA) == 0xAA55 && + LD_DWORD(fs->win+FSI_LeadSig) == 0x41615252 && + LD_DWORD(fs->win+FSI_StrucSig) == 0x61417272) { + fs->last_clust = LD_DWORD(fs->win+FSI_Nxt_Free); + fs->free_clust = LD_DWORD(fs->win+FSI_Free_Count); + } + } +#endif + fs->winsect = 0; + fs->fs_type = fmt; /* FAT syb-type */ + fs->id = ++Fsid; /* File system mount ID */ + res = FR_OK; + + return res; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Check if the file/dir object is valid or not */ +/*-----------------------------------------------------------------------*/ + +static +FRESULT validate ( /* FR_OK(0): The object is valid, !=0: Invalid */ + FATFS *fs, /* Pointer to the file system object */ + WORD id /* Member id of the target object to be checked */ +) +{ + if (!fs || !fs->fs_type || fs->id != id) + return FR_INVALID_OBJECT; + + ENTER_FF(fs); /* Lock file system */ + + if (disk_status(fs->drive) & STA_NOINIT) + return FR_NOT_READY; + + return FR_OK; +} + + + + +/*-------------------------------------------------------------------------- + + Public Functions + +--------------------------------------------------------------------------*/ + + + +/*-----------------------------------------------------------------------*/ +/* Mount/Unmount a Locical Drive */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_mount ( + BYTE vol, /* Logical drive number to be mounted/unmounted */ + FATFS *fs /* Pointer to new file system object (NULL for unmount)*/ +) +{ + FATFS *rfs; + + + if (vol >= _DRIVES) /* Check if the drive number is valid */ + return FR_INVALID_DRIVE; + rfs = FatFs[vol]; /* Get current state */ + + if (rfs) { +#if _FS_REENTRANT /* Discard sync object of the current volume */ + if (!ff_del_syncobj(fs->sobj)) return FR_INT_ERR; +#endif + rfs->fs_type = 0; /* Clear old fs object */ + } + + if (fs) { + fs->fs_type = 0; /* Clear new fs object */ +#if _FS_REENTRANT /* Create sync object for the new volume */ + if (!ff_cre_syncobj(vol, &fs->sobj)) return FR_INT_ERR; +#endif + } + FatFs[vol] = fs; /* Register new fs object */ + + return FR_OK; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Open or Create a File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_open ( + FIL *fp, /* Pointer to the blank file object */ + const char *path, /* Pointer to the file name */ + BYTE mode /* Access mode and file open mode flags */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + fp->fs = NULL; /* Clear file object */ +#if !_FS_READONLY + mode &= (FA_READ | FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW); + res = auto_mount(&path, &dj.fs, (BYTE)(mode & (FA_WRITE | FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW))); +#else + mode &= FA_READ; + res = auto_mount(&path, &dj.fs, 0); +#endif + if (res != FR_OK) LEAVE_FF(dj.fs, res); + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + +#if !_FS_READONLY + /* Create or Open a file */ + if (mode & (FA_CREATE_ALWAYS | FA_OPEN_ALWAYS | FA_CREATE_NEW)) { + DWORD ps, cl; + + if (res != FR_OK) { /* No file, create new */ + if (res == FR_NO_FILE) + res = dir_register(&dj); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + mode |= FA_CREATE_ALWAYS; + dir = dj.dir; + } + else { /* Any object is already existing */ + if (mode & FA_CREATE_NEW) /* Cannot create new */ + LEAVE_FF(dj.fs, FR_EXIST); + dir = dj.dir; + if (!dir || (dir[DIR_Attr] & (AM_RDO | AM_DIR))) /* Cannot overwrite it (R/O or DIR) */ + LEAVE_FF(dj.fs, FR_DENIED); + if (mode & FA_CREATE_ALWAYS) { /* Resize it to zero if needed */ + cl = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); /* Get start cluster */ + ST_WORD(dir+DIR_FstClusHI, 0); /* cluster = 0 */ + ST_WORD(dir+DIR_FstClusLO, 0); + ST_DWORD(dir+DIR_FileSize, 0); /* size = 0 */ + dj.fs->wflag = 1; + ps = dj.fs->winsect; /* Remove the cluster chain */ + if (cl) { + res = remove_chain(dj.fs, cl); + if (res) LEAVE_FF(dj.fs, res); + dj.fs->last_clust = cl - 1; /* Reuse the cluster hole */ + } + res = move_window(dj.fs, ps); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + } + } + if (mode & FA_CREATE_ALWAYS) { + dir[DIR_Attr] = 0; /* Reset attribute */ + ps = get_fattime(); + ST_DWORD(dir+DIR_CrtTime, ps); /* Created time */ + dj.fs->wflag = 1; + mode |= FA__WRITTEN; /* Set file changed flag */ + } + } + /* Open an existing file */ + else { +#endif /* !_FS_READONLY */ + if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */ + dir = dj.dir; + if (!dir || (dir[DIR_Attr] & AM_DIR)) /* It is a directory */ + LEAVE_FF(dj.fs, FR_NO_FILE); +#if !_FS_READONLY + if ((mode & FA_WRITE) && (dir[DIR_Attr] & AM_RDO)) /* R/O violation */ + LEAVE_FF(dj.fs, FR_DENIED); + } + fp->dir_sect = dj.fs->winsect; /* Pointer to the directory entry */ + fp->dir_ptr = dj.dir; +#endif + fp->flag = mode; /* File access mode */ + fp->org_clust = /* File start cluster */ + ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + fp->fsize = LD_DWORD(dir+DIR_FileSize); /* File size */ + fp->fptr = 0; fp->csect = 255; /* File pointer */ + fp->dsect = 0; + fp->fs = dj.fs; fp->id = dj.fs->id; /* Owner file system object of the file */ + + LEAVE_FF(dj.fs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_read ( + FIL *fp, /* Pointer to the file object */ + void *buff, /* Pointer to data buffer */ + UINT btr, /* Number of bytes to read */ + UINT *br /* Pointer to number of bytes read */ +) +{ + FRESULT res; + DWORD clst, sect, remain; + UINT rcnt, cc; + BYTE *rbuff = buff; + + + *br = 0; + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_READ)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + remain = fp->fsize - fp->fptr; + if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */ + + for ( ; btr; /* Repeat until all data transferred */ + rbuff += rcnt, fp->fptr += rcnt, *br += rcnt, btr -= rcnt) { + if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ + if (fp->csect >= fp->fs->csize) { /* On the cluster boundary? */ + clst = (fp->fptr == 0) ? /* On the top of the file? */ + fp->org_clust : get_cluster(fp->fs, fp->curr_clust); + if (clst <= 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->curr_clust = clst; /* Update current cluster */ + fp->csect = 0; /* Reset sector offset in the cluster */ + } + sect = clust2sect(fp->fs, fp->curr_clust); /* Get current sector */ + if (!sect) ABORT(fp->fs, FR_INT_ERR); + sect += fp->csect; + cc = btr / SS(fp->fs); /* When remaining bytes >= sector size, */ + if (cc) { /* Read maximum contiguous sectors directly */ + if (fp->csect + cc > fp->fs->csize) /* Clip at cluster boundary */ + cc = fp->fs->csize - fp->csect; + if (disk_read(fp->fs->drive, rbuff, sect, (BYTE)cc) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->csect += (BYTE)cc; /* Next sector address in the cluster */ + rcnt = SS(fp->fs) * cc; /* Number of bytes transferred */ + continue; + } +#if !_FS_TINY +#if !_FS_READONLY + if (fp->flag & FA__DIRTY) { /* Write sector I/O buffer if needed */ + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA__DIRTY; + } +#endif + if (fp->dsect != sect) { /* Fill sector buffer with file data */ + if (disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + } +#endif + fp->dsect = sect; + fp->csect++; /* Next sector address in the cluster */ + } + rcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs)); /* Get partial sector data from sector buffer */ + if (rcnt > btr) rcnt = btr; +#if _FS_TINY + if (move_window(fp->fs, fp->dsect)) /* Move sector window */ + ABORT(fp->fs, FR_DISK_ERR); + mem_cpy(rbuff, &fp->fs->win[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */ +#else + mem_cpy(rbuff, &fp->buf[fp->fptr % SS(fp->fs)], rcnt); /* Pick partial sector */ +#endif + } + + + LEAVE_FF(fp->fs, FR_OK); +} + + + + +#if !_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Write File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_write ( + FIL *fp, /* Pointer to the file object */ + const void *buff, /* Pointer to the data to be written */ + UINT btw, /* Number of bytes to write */ + UINT *bw /* Pointer to number of bytes written */ +) +{ + FRESULT res; + DWORD clst, sect; + UINT wcnt, cc; + const BYTE *wbuff = buff; + + + *bw = 0; + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_WRITE)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + if (fp->fsize + btw < fp->fsize) btw = 0; /* File size cannot reach 4GB */ + + for ( ; btw; /* Repeat until all data transferred */ + wbuff += wcnt, fp->fptr += wcnt, *bw += wcnt, btw -= wcnt) { + if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ + if (fp->csect >= fp->fs->csize) { /* On the cluster boundary? */ + if (fp->fptr == 0) { /* On the top of the file? */ + clst = fp->org_clust; /* Follow from the origin */ + if (clst == 0) /* When there is no cluster chain, */ + fp->org_clust = clst = create_chain(fp->fs, 0); /* Create a new cluster chain */ + } else { /* Middle or end of the file */ + clst = create_chain(fp->fs, fp->curr_clust); /* Follow or streach cluster chain */ + } + if (clst == 0) break; /* Could not allocate a new cluster (disk full) */ + if (clst == 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->curr_clust = clst; /* Update current cluster */ + fp->csect = 0; /* Reset sector address in the cluster */ + } +#if _FS_TINY + if (fp->fs->winsect == fp->dsect && move_window(fp->fs, 0)) /* Write back data buffer prior to following direct transfer */ + ABORT(fp->fs, FR_DISK_ERR); +#else + if (fp->flag & FA__DIRTY) { /* Write back data buffer prior to following direct transfer */ + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA__DIRTY; + } +#endif + sect = clust2sect(fp->fs, fp->curr_clust); /* Get current sector */ + if (!sect) ABORT(fp->fs, FR_INT_ERR); + sect += fp->csect; + cc = btw / SS(fp->fs); /* When remaining bytes >= sector size, */ + if (cc) { /* Write maximum contiguous sectors directly */ + if (fp->csect + cc > fp->fs->csize) /* Clip at cluster boundary */ + cc = fp->fs->csize - fp->csect; + if (disk_write(fp->fs->drive, wbuff, sect, (BYTE)cc) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); +#if _FS_TINY + if (fp->fs->winsect - sect < cc) { /* Refill sector cache if it gets dirty by the direct write */ + mem_cpy(fp->fs->win, wbuff + ((fp->fs->winsect - sect) * SS(fp->fs)), SS(fp->fs)); + fp->fs->wflag = 0; + } +#else + if (fp->dsect - sect < cc) { /* Refill sector cache if it gets dirty by the direct write */ + mem_cpy(fp->buf, wbuff + ((fp->dsect - sect) * SS(fp->fs)), SS(fp->fs)); + fp->flag &= ~FA__DIRTY; + } +#endif + fp->csect += (BYTE)cc; /* Next sector address in the cluster */ + wcnt = SS(fp->fs) * cc; /* Number of bytes transferred */ + continue; + } +#if _FS_TINY + if (fp->fptr >= fp->fsize) { /* Avoid silly buffer filling at growing edge */ + if (move_window(fp->fs, 0)) ABORT(fp->fs, FR_DISK_ERR); + fp->fs->winsect = sect; + } +#else + if (fp->dsect != sect) { /* Fill sector buffer with file data */ + if (fp->fptr < fp->fsize && + disk_read(fp->fs->drive, fp->buf, sect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + } +#endif + fp->dsect = sect; + fp->csect++; /* Next sector address in the cluster */ + } + wcnt = SS(fp->fs) - (fp->fptr % SS(fp->fs)); /* Put partial sector into file I/O buffer */ + if (wcnt > btw) wcnt = btw; +#if _FS_TINY + if (move_window(fp->fs, fp->dsect)) /* Move sector window */ + ABORT(fp->fs, FR_DISK_ERR); + mem_cpy(&fp->fs->win[fp->fptr % SS(fp->fs)], wbuff, wcnt); /* Fit partial sector */ + fp->fs->wflag = 1; +#else + mem_cpy(&fp->buf[fp->fptr % SS(fp->fs)], wbuff, wcnt); /* Fit partial sector */ + fp->flag |= FA__DIRTY; +#endif + } + + if (fp->fptr > fp->fsize) fp->fsize = fp->fptr; /* Update file size if needed */ + fp->flag |= FA__WRITTEN; /* Set file changed flag */ + + LEAVE_FF(fp->fs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Synchronize the File Object */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_sync ( + FIL *fp /* Pointer to the file object */ +) +{ + FRESULT res; + DWORD tim; + BYTE *dir; + + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res == FR_OK) { + if (fp->flag & FA__WRITTEN) { /* Has the file been written? */ +#if !_FS_TINY /* Write-back dirty buffer */ + if (fp->flag & FA__DIRTY) { + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + LEAVE_FF(fp->fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA__DIRTY; + } +#endif + /* Update the directory entry */ + res = move_window(fp->fs, fp->dir_sect); + if (res == FR_OK) { + dir = fp->dir_ptr; + dir[DIR_Attr] |= AM_ARC; /* Set archive bit */ + ST_DWORD(dir+DIR_FileSize, fp->fsize); /* Update file size */ + ST_WORD(dir+DIR_FstClusLO, fp->org_clust); /* Update start cluster */ + ST_WORD(dir+DIR_FstClusHI, fp->org_clust >> 16); + tim = get_fattime(); /* Updated time */ + ST_DWORD(dir+DIR_WrtTime, tim); + fp->flag &= (BYTE)~FA__WRITTEN; + fp->fs->wflag = 1; + res = sync(fp->fs); + } + } + } + + LEAVE_FF(fp->fs, res); +} + +#endif /* !_FS_READONLY */ + + + + +/*-----------------------------------------------------------------------*/ +/* Close File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_close ( + FIL *fp /* Pointer to the file object to be closed */ +) +{ + FRESULT res; + + +#if _FS_READONLY + res = validate(fp->fs, fp->id); + if (res == FR_OK) fp->fs = NULL; + LEAVE_FF(fp->fs, res); +#else + res = f_sync(fp); + if (res == FR_OK) fp->fs = NULL; + return res; +#endif +} + + + + +#if _FS_MINIMIZE <= 2 +/*-----------------------------------------------------------------------*/ +/* Seek File R/W Pointer */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_lseek ( + FIL *fp, /* Pointer to the file object */ + DWORD ofs /* File pointer from top of file */ +) +{ + FRESULT res; + DWORD clst, bcs, nsect, ifptr; + + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (ofs > fp->fsize /* In read-only mode, clip offset with the file size */ +#if !_FS_READONLY + && !(fp->flag & FA_WRITE) +#endif + ) ofs = fp->fsize; + + ifptr = fp->fptr; + fp->fptr = 0; fp->csect = 255; + nsect = 0; + if (ofs > 0) { + bcs = (DWORD)fp->fs->csize * SS(fp->fs); /* Cluster size (byte) */ + if (ifptr > 0 && + (ofs - 1) / bcs >= (ifptr - 1) / bcs) { /* When seek to same or following cluster, */ + fp->fptr = (ifptr - 1) & ~(bcs - 1); /* start from the current cluster */ + ofs -= fp->fptr; + clst = fp->curr_clust; + } else { /* When seek to back cluster, */ + clst = fp->org_clust; /* start from the first cluster */ +#if !_FS_READONLY + if (clst == 0) { /* If no cluster chain, create a new chain */ + clst = create_chain(fp->fs, 0); + if (clst == 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->org_clust = clst; + } +#endif + fp->curr_clust = clst; + } + if (clst != 0) { + while (ofs > bcs) { /* Cluster following loop */ +#if !_FS_READONLY + if (fp->flag & FA_WRITE) { /* Check if in write mode or not */ + clst = create_chain(fp->fs, clst); /* Force streached if in write mode */ + if (clst == 0) { /* When disk gets full, clip file size */ + ofs = bcs; break; + } + } else +#endif + clst = get_cluster(fp->fs, clst); /* Follow cluster chain if not in write mode */ + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + if (clst <= 1 || clst >= fp->fs->max_clust) ABORT(fp->fs, FR_INT_ERR); + fp->curr_clust = clst; + fp->fptr += bcs; + ofs -= bcs; + } + fp->fptr += ofs; + fp->csect = (BYTE)(ofs / SS(fp->fs)); /* Sector offset in the cluster */ + if (ofs % SS(fp->fs)) { + nsect = clust2sect(fp->fs, clst); /* Current sector */ + if (!nsect) ABORT(fp->fs, FR_INT_ERR); + nsect += fp->csect; + fp->csect++; + } + } + } + if (nsect && nsect != fp->dsect && fp->fptr % SS(fp->fs)) { +#if !_FS_TINY +#if !_FS_READONLY + if (fp->flag & FA__DIRTY) { /* Write-back dirty buffer if needed */ + if (disk_write(fp->fs->drive, fp->buf, fp->dsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); + fp->flag &= (BYTE)~FA__DIRTY; + } +#endif + if (disk_read(fp->fs->drive, fp->buf, nsect, 1) != RES_OK) + ABORT(fp->fs, FR_DISK_ERR); +#endif + fp->dsect = nsect; + } +#if !_FS_READONLY + if (fp->fptr > fp->fsize) { /* Set changed flag if the file size is extended */ + fp->fsize = fp->fptr; + fp->flag |= FA__WRITTEN; + } +#endif + + LEAVE_FF(fp->fs, res); +} + + + + +#if _FS_MINIMIZE <= 1 +/*-----------------------------------------------------------------------*/ +/* Create a Directroy Object */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_opendir ( + DIR *dj, /* Pointer to directory object to create */ + const char *path /* Pointer to the directory path */ +) +{ + FRESULT res; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj->fs, 0); + if (res == FR_OK) { + INITBUF((*dj), sfn, lfn); + res = follow_path(dj, path); /* Follow the path to the directory */ + if (res == FR_OK) { /* Follow completed */ + dir = dj->dir; + if (dir) { /* It is not the root dir */ + if (dir[DIR_Attr] & AM_DIR) { /* The object is a directory */ + dj->sclust = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + } else { /* The object is not a directory */ + res = FR_NO_PATH; + } + } else { /* It is the root dir */ + dj->sclust = (dj->fs->fs_type == FS_FAT32) ? dj->fs->dirbase : 0; + } + if (res == FR_OK) res = dir_seek(dj, 0); + dj->id = dj->fs->id; + } else { + if (res == FR_NO_FILE) res = FR_NO_PATH; + } + } + + LEAVE_FF(dj->fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Read Directory Entry in Sequense */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_readdir ( + DIR *dj, /* Pointer to the open directory object */ + FILINFO *fno /* Pointer to file information to return */ +) +{ + FRESULT res; + NAMEBUF(sfn, lfn); + + + res = validate(dj->fs, dj->id); /* Check validity of the object */ + if (res == FR_OK) { + INITBUF((*dj), sfn, lfn); + if (!fno) { + res = dir_seek(dj, 0); + } else { + res = dir_read(dj); + if (res == FR_NO_FILE) { + dj->sect = 0; + res = FR_OK; + } + if (res == FR_OK) { /* A valid entry is found */ + get_fileinfo(dj, fno); /* Get the object information */ + res = dir_next(dj, FALSE); /* Increment index for next */ + if (res == FR_NO_FILE) { + dj->sect = 0; + res = FR_OK; + } + } + } + } + + LEAVE_FF(dj->fs, res); +} + + + +#if _FS_MINIMIZE == 0 +/*-----------------------------------------------------------------------*/ +/* Get File Status */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_stat ( + const char *path, /* Pointer to the file path */ + FILINFO *fno /* Pointer to file information to return */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + + + res = auto_mount(&path, &dj.fs, 0); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) { /* Follwo completed */ + if (dj.dir) /* Found an object */ + get_fileinfo(&dj, fno); + else /* It is root dir */ + res = FR_INVALID_NAME; + } + } + + LEAVE_FF(dj.fs, res); +} + + + +#if !_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Truncate File */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_truncate ( + FIL *fp /* Pointer to the file object */ +) +{ + FRESULT res; + DWORD ncl; + + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check abort flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_WRITE)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + + if (fp->fsize > fp->fptr) { + fp->fsize = fp->fptr; /* Set file size to current R/W point */ + fp->flag |= FA__WRITTEN; + if (fp->fptr == 0) { /* When set file size to zero, remove entire cluster chain */ + res = remove_chain(fp->fs, fp->org_clust); + fp->org_clust = 0; + } else { /* When truncate a part of the file, remove remaining clusters */ + ncl = get_cluster(fp->fs, fp->curr_clust); + res = FR_OK; + if (ncl == 0xFFFFFFFF) res = FR_DISK_ERR; + if (ncl == 1) res = FR_INT_ERR; + if (res == FR_OK && ncl < fp->fs->max_clust) { + res = put_cluster(fp->fs, fp->curr_clust, 0x0FFFFFFF); + if (res == FR_OK) res = remove_chain(fp->fs, ncl); + } + } + } + if (res != FR_OK) fp->flag |= FA__ERROR; + + LEAVE_FF(fp->fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Get Number of Free Clusters */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_getfree ( + const char *path, /* Pointer to the logical drive number (root dir) */ + DWORD *nclst, /* Pointer to the variable to return number of free clusters */ + FATFS **fatfs /* Pointer to pointer to corresponding file system object to return */ +) +{ + FRESULT res; + DWORD n, clst, sect; + BYTE fat, f, *p; + + + /* Get drive number */ + res = auto_mount(&path, fatfs, 0); + if (res != FR_OK) LEAVE_FF(*fatfs, res); + + /* If number of free cluster is valid, return it without cluster scan. */ + if ((*fatfs)->free_clust <= (*fatfs)->max_clust - 2) { + *nclst = (*fatfs)->free_clust; + LEAVE_FF(*fatfs, FR_OK); + } + + /* Get number of free clusters */ + fat = (*fatfs)->fs_type; + n = 0; + if (fat == FS_FAT12) { + clst = 2; + do { + if ((WORD)get_cluster(*fatfs, clst) == 0) n++; + } while (++clst < (*fatfs)->max_clust); + } else { + clst = (*fatfs)->max_clust; + sect = (*fatfs)->fatbase; + f = 0; p = 0; + do { + if (!f) { + res = move_window(*fatfs, sect++); + if (res != FR_OK) + LEAVE_FF(*fatfs, res); + p = (*fatfs)->win; + } + if (fat == FS_FAT16) { + if (LD_WORD(p) == 0) n++; + p += 2; f += 1; + } else { + if (LD_DWORD(p) == 0) n++; + p += 4; f += 2; + } + } while (--clst); + } + (*fatfs)->free_clust = n; + if (fat == FS_FAT32) (*fatfs)->fsi_flag = 1; + *nclst = n; + + LEAVE_FF(*fatfs, FR_OK); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Delete a File or Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_unlink ( + const char *path /* Pointer to the file or directory path */ +) +{ + FRESULT res; + DIR dj, sdj; + NAMEBUF(sfn, lfn); + BYTE *dir; + DWORD dclst; + + + res = auto_mount(&path, &dj.fs, 1); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res != FR_OK) LEAVE_FF(dj.fs, res); /* Follow failed */ + + dir = dj.dir; + if (!dir) /* Is it the root directory? */ + LEAVE_FF(dj.fs, FR_INVALID_NAME); + if (dir[DIR_Attr] & AM_RDO) /* Is it a R/O object? */ + LEAVE_FF(dj.fs, FR_DENIED); + dclst = ((DWORD)LD_WORD(dir+DIR_FstClusHI) << 16) | LD_WORD(dir+DIR_FstClusLO); + + if (dir[DIR_Attr] & AM_DIR) { /* It is a sub-directory */ + if (dclst < 2) LEAVE_FF(dj.fs, FR_INT_ERR); + mem_cpy(&sdj, &dj, sizeof(DIR)); /* Check if the sub-dir is empty or not */ + sdj.sclust = dclst; + res = dir_seek(&sdj, 0); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + res = dir_read(&sdj); + if (res == FR_OK) res = FR_DENIED; /* Not empty sub-dir */ + if (res != FR_NO_FILE) LEAVE_FF(dj.fs, res); + } + + res = dir_remove(&dj); /* Remove directory entry */ + if (res == FR_OK) { + if (dclst) + res = remove_chain(dj.fs, dclst); /* Remove the cluster chain */ + if (res == FR_OK) res = sync(dj.fs); + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Create a Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_mkdir ( + const char *path /* Pointer to the directory path */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir, n; + DWORD dsect, dclst, pclst, tim; + + + res = auto_mount(&path, &dj.fs, 1); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) res = FR_EXIST; /* Any file or directory is already existing */ + if (res != FR_NO_FILE) /* Any error occured */ + LEAVE_FF(dj.fs, res); + + dclst = create_chain(dj.fs, 0); /* Allocate a new cluster for new directory table */ + res = FR_OK; + if (dclst == 0) res = FR_DENIED; + if (dclst == 1) res = FR_INT_ERR; + if (dclst == 0xFFFFFFFF) res = FR_DISK_ERR; + if (res == FR_OK) + res = move_window(dj.fs, 0); + if (res != FR_OK) LEAVE_FF(dj.fs, res); + dsect = clust2sect(dj.fs, dclst); + + dir = dj.fs->win; /* Initialize the new directory table */ + mem_set(dir, 0, SS(dj.fs)); + mem_set(dir+DIR_Name, ' ', 8+3); /* Create "." entry */ + dir[DIR_Name] = '.'; + dir[DIR_Attr] = AM_DIR; + tim = get_fattime(); + ST_DWORD(dir+DIR_WrtTime, tim); + ST_WORD(dir+DIR_FstClusLO, dclst); + ST_WORD(dir+DIR_FstClusHI, dclst >> 16); + mem_cpy(dir+32, dir, 32); /* Create ".." entry */ + dir[33] = '.'; + pclst = dj.sclust; + if (dj.fs->fs_type == FS_FAT32 && pclst == dj.fs->dirbase) + pclst = 0; + ST_WORD(dir+32+DIR_FstClusLO, pclst); + ST_WORD(dir+32+DIR_FstClusHI, pclst >> 16); + for (n = 0; n < dj.fs->csize; n++) { /* Write dot entries and clear left sectors */ + dj.fs->winsect = dsect++; + dj.fs->wflag = 1; + res = move_window(dj.fs, 0); + if (res) LEAVE_FF(dj.fs, res); + mem_set(dir, 0, SS(dj.fs)); + } + + res = dir_register(&dj); + if (res != FR_OK) { + remove_chain(dj.fs, dclst); + } else { + dir = dj.dir; + dir[DIR_Attr] = AM_DIR; /* Attribute */ + ST_DWORD(dir+DIR_WrtTime, tim); /* Crated time */ + ST_WORD(dir+DIR_FstClusLO, dclst); /* Table start cluster */ + ST_WORD(dir+DIR_FstClusHI, dclst >> 16); + dj.fs->wflag = 1; + res = sync(dj.fs); + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change File Attribute */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_chmod ( + const char *path, /* Pointer to the file path */ + BYTE value, /* Attribute bits */ + BYTE mask /* Attribute mask to change */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj.fs, 1); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) { + dir = dj.dir; + if (!dir) { /* Is it a root directory? */ + res = FR_INVALID_NAME; + } else { /* File or sub directory */ + mask &= AM_RDO|AM_HID|AM_SYS|AM_ARC; /* Valid attribute mask */ + dir[DIR_Attr] = (value & mask) | (dir[DIR_Attr] & (BYTE)~mask); /* Apply attribute change */ + dj.fs->wflag = 1; + res = sync(dj.fs); + } + } + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Change Timestamp */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_utime ( + const char *path, /* Pointer to the file/directory name */ + const FILINFO *fno /* Pointer to the timestamp to be set */ +) +{ + FRESULT res; + DIR dj; + NAMEBUF(sfn, lfn); + BYTE *dir; + + + res = auto_mount(&path, &dj.fs, 1); + if (res == FR_OK) { + INITBUF(dj, sfn, lfn); + res = follow_path(&dj, path); /* Follow the file path */ + if (res == FR_OK) { + dir = dj.dir; + if (!dir) { /* Root directory */ + res = FR_INVALID_NAME; + } else { /* File or sub-directory */ + ST_WORD(dir+DIR_WrtTime, fno->ftime); + ST_WORD(dir+DIR_WrtDate, fno->fdate); + dj.fs->wflag = 1; + res = sync(dj.fs); + } + } + } + + LEAVE_FF(dj.fs, res); +} + + + + +/*-----------------------------------------------------------------------*/ +/* Rename File/Directory */ +/*-----------------------------------------------------------------------*/ + +FRESULT f_rename ( + const char *path_old, /* Pointer to the old name */ + const char *path_new /* Pointer to the new name */ +) +{ + FRESULT res; + DIR dj_old, dj_new; + NAMEBUF(sfn, lfn); + BYTE buf[21], *dir; + DWORD dw; + + + INITBUF(dj_old, sfn, lfn); + res = auto_mount(&path_old, &dj_old.fs, 1); + if (res == FR_OK) { + dj_new.fs = dj_old.fs; + res = follow_path(&dj_old, path_old); /* Check old object */ + } + if (res != FR_OK) LEAVE_FF(dj_old.fs, res); /* The old object is not found */ + + if (!dj_old.dir) LEAVE_FF(dj_old.fs, FR_NO_FILE); /* Is root dir? */ + mem_cpy(buf, dj_old.dir+DIR_Attr, 21); /* Save the object information */ + + mem_cpy(&dj_new, &dj_old, sizeof(DIR)); + res = follow_path(&dj_new, path_new); /* Check new object */ + if (res == FR_OK) res = FR_EXIST; /* The new object name is already existing */ + if (res == FR_NO_FILE) { /* Is it a valid path and no name collision? */ + res = dir_register(&dj_new); /* Register the new object */ + if (res == FR_OK) { + dir = dj_new.dir; /* Copy object information into new entry */ + mem_cpy(dir+13, buf+2, 19); + dir[DIR_Attr] = buf[0]; + dj_old.fs->wflag = 1; + if (dir[DIR_Attr] & AM_DIR) { /* Update .. entry in the directory if needed */ + dw = clust2sect(dj_new.fs, (DWORD)LD_WORD(dir+DIR_FstClusHI) | LD_WORD(dir+DIR_FstClusLO)); + if (!dw) { + res = FR_INT_ERR; + } else { + res = move_window(dj_new.fs, dw); + dir = dj_new.fs->win+32; + if (res == FR_OK && dir[1] == '.') { + dw = (dj_new.fs->fs_type == FS_FAT32 && dj_new.sclust == dj_new.fs->dirbase) ? 0 : dj_new.sclust; + ST_WORD(dir+DIR_FstClusLO, dw); + ST_WORD(dir+DIR_FstClusHI, dw >> 16); + dj_new.fs->wflag = 1; + } + } + } + if (res == FR_OK) { + res = dir_remove(&dj_old); /* Remove old entry */ + if (res == FR_OK) + res = sync(dj_old.fs); + } + } + } + + LEAVE_FF(dj_old.fs, res); +} + +#endif /* !_FS_READONLY */ +#endif /* _FS_MINIMIZE == 0 */ +#endif /* _FS_MINIMIZE <= 1 */ +#endif /* _FS_MINIMIZE <= 2 */ + + + +/*-----------------------------------------------------------------------*/ +/* Forward data to the stream directly (Available on only _FS_TINY cfg) */ +/*-----------------------------------------------------------------------*/ +#if _USE_FORWARD && _FS_TINY + +FRESULT f_forward ( + FIL *fp, /* Pointer to the file object */ + UINT (*func)(const BYTE*,UINT), /* Pointer to the streaming function */ + UINT btr, /* Number of bytes to forward */ + UINT *bf /* Pointer to number of bytes forwarded */ +) +{ + FRESULT res; + DWORD remain, clst, sect; + UINT rcnt; + + + *bf = 0; + + res = validate(fp->fs, fp->id); /* Check validity of the object */ + if (res != FR_OK) LEAVE_FF(fp->fs, res); + if (fp->flag & FA__ERROR) /* Check error flag */ + LEAVE_FF(fp->fs, FR_INT_ERR); + if (!(fp->flag & FA_READ)) /* Check access mode */ + LEAVE_FF(fp->fs, FR_DENIED); + + remain = fp->fsize - fp->fptr; + if (btr > remain) btr = (UINT)remain; /* Truncate btr by remaining bytes */ + + for ( ; btr && (*func)(NULL, 0); /* Repeat until all data transferred or stream becomes busy */ + fp->fptr += rcnt, *bf += rcnt, btr -= rcnt) { + if ((fp->fptr % SS(fp->fs)) == 0) { /* On the sector boundary? */ + if (fp->csect >= fp->fs->csize) { /* On the cluster boundary? */ + clst = (fp->fptr == 0) ? /* On the top of the file? */ + fp->org_clust : get_cluster(fp->fs, fp->curr_clust); + if (clst <= 1) ABORT(fp->fs, FR_INT_ERR); + if (clst == 0xFFFFFFFF) ABORT(fp->fs, FR_DISK_ERR); + fp->curr_clust = clst; /* Update current cluster */ + fp->csect = 0; /* Reset sector address in the cluster */ + } + fp->csect++; /* Next sector address in the cluster */ + } + sect = clust2sect(fp->fs, fp->curr_clust); /* Get current data sector */ + if (!sect) ABORT(fp->fs, FR_INT_ERR); + sect += fp->csect - 1; + if (move_window(fp->fs, sect)) /* Move sector window */ + ABORT(fp->fs, FR_DISK_ERR); + fp->dsect = sect; + rcnt = SS(fp->fs) - (WORD)(fp->fptr % SS(fp->fs)); /* Forward data from sector window */ + if (rcnt > btr) rcnt = btr; + rcnt = (*func)(&fp->fs->win[(WORD)fp->fptr % SS(fp->fs)], rcnt); + if (!rcnt) ABORT(fp->fs, FR_INT_ERR); + } + + LEAVE_FF(fp->fs, FR_OK); +} +#endif /* _USE_FORWARD */ + + + +#if _USE_MKFS && !_FS_READONLY +/*-----------------------------------------------------------------------*/ +/* Create File System on the Drive */ +/*-----------------------------------------------------------------------*/ +#define N_ROOTDIR 512 /* Multiple of 32 and <= 2048 */ +#define N_FATS 1 /* 1 or 2 */ +#define MAX_SECTOR 131072000UL /* Maximum partition size */ +#define MIN_SECTOR 2000UL /* Minimum partition size */ + + +FRESULT f_mkfs ( + BYTE drv, /* Logical drive number */ + BYTE partition, /* Partitioning rule 0:FDISK, 1:SFD */ + WORD allocsize /* Allocation unit size [bytes] */ +) +{ + static const DWORD sstbl[] = { 2048000, 1024000, 512000, 256000, 128000, 64000, 32000, 16000, 8000, 4000, 0 }; + static const WORD cstbl[] = { 32768, 16384, 8192, 4096, 2048, 16384, 8192, 4096, 2048, 1024, 512 }; + BYTE fmt, m, *tbl; + DWORD b_part, b_fat, b_dir, b_data; /* Area offset (LBA) */ + DWORD n_part, n_rsv, n_fat, n_dir; /* Area size */ + DWORD n_clst, n; + WORD as; + FATFS *fs; + DSTATUS stat; + + + /* Check validity of the parameters */ + if (drv >= _DRIVES) return FR_INVALID_DRIVE; + if (partition >= 2) return FR_MKFS_ABORTED; + + /* Check mounted drive and clear work area */ + fs = FatFs[drv]; + if (!fs) return FR_NOT_ENABLED; + fs->fs_type = 0; + drv = LD2PD(drv); + + /* Get disk statics */ + stat = disk_initialize(drv); + if (stat & STA_NOINIT) return FR_NOT_READY; + if (stat & STA_PROTECT) return FR_WRITE_PROTECTED; + if (disk_ioctl(drv, GET_SECTOR_COUNT, &n_part) != RES_OK || n_part < MIN_SECTOR) + return FR_MKFS_ABORTED; + if (n_part > MAX_SECTOR) n_part = MAX_SECTOR; + b_part = (!partition) ? 63 : 0; /* Boot sector */ + n_part -= b_part; +#if _MAX_SS == 512 + if (!allocsize) { /* Auto selection of cluster size */ + for (n = 0; n_part < sstbl[n]; n++) ; + allocsize = cstbl[n]; + } +#endif + for (as = 512; as <= 32768U && as != allocsize; as <<= 1); + if (as != allocsize) return FR_MKFS_ABORTED; +#if _MAX_SS != 512 /* Check disk sector size */ + if (disk_ioctl(drv, GET_SECTOR_SIZE, &SS(fs)) != RES_OK + || SS(fs) > _MAX_SS + || SS(fs) > allocsize) + return FR_MKFS_ABORTED; +#endif + allocsize /= SS(fs); /* Number of sectors per cluster */ + + /* Pre-compute number of clusters and FAT type */ + n_clst = n_part / allocsize; + fmt = FS_FAT12; + if (n_clst >= 0xFF5) fmt = FS_FAT16; + if (n_clst >= 0xFFF5) fmt = FS_FAT32; + + /* Determine offset and size of FAT structure */ + switch (fmt) { + case FS_FAT12: + n_fat = ((n_clst * 3 + 1) / 2 + 3 + SS(fs) - 1) / SS(fs); + n_rsv = 1 + partition; + n_dir = N_ROOTDIR * 32 / SS(fs); + break; + case FS_FAT16: + n_fat = ((n_clst * 2) + 4 + SS(fs) - 1) / SS(fs); + n_rsv = 1 + partition; + n_dir = N_ROOTDIR * 32 / SS(fs); + break; + default: + n_fat = ((n_clst * 4) + 8 + SS(fs) - 1) / SS(fs); + n_rsv = 33 - partition; + n_dir = 0; + } + b_fat = b_part + n_rsv; /* FATs start sector */ + b_dir = b_fat + n_fat * N_FATS; /* Directory start sector */ + b_data = b_dir + n_dir; /* Data start sector */ + + /* Align data start sector to erase block boundary (for flash memory media) */ + if (disk_ioctl(drv, GET_BLOCK_SIZE, &n) != RES_OK) return FR_MKFS_ABORTED; + n = (b_data + n - 1) & ~(n - 1); + n_fat += (n - b_data) / N_FATS; + /* b_dir and b_data are no longer used below */ + + /* Determine number of cluster and final check of validity of the FAT type */ + n_clst = (n_part - n_rsv - n_fat * N_FATS - n_dir) / allocsize; + if ( (fmt == FS_FAT16 && n_clst < 0xFF5) + || (fmt == FS_FAT32 && n_clst < 0xFFF5)) + return FR_MKFS_ABORTED; + + /* Create partition table if needed */ + if (!partition) { + DWORD n_disk = b_part + n_part; + + tbl = fs->win+MBR_Table; + ST_DWORD(tbl, 0x00010180); /* Partition start in CHS */ + if (n_disk < 63UL * 255 * 1024) { /* Partition end in CHS */ + n_disk = n_disk / 63 / 255; + tbl[7] = (BYTE)n_disk; + tbl[6] = (BYTE)((n_disk >> 2) | 63); + } else { + ST_WORD(&tbl[6], 0xFFFF); + } + tbl[5] = 254; + if (fmt != FS_FAT32) /* System ID */ + tbl[4] = (n_part < 0x10000) ? 0x04 : 0x06; + else + tbl[4] = 0x0c; + ST_DWORD(tbl+8, 63); /* Partition start in LBA */ + ST_DWORD(tbl+12, n_part); /* Partition size in LBA */ + ST_WORD(tbl+64, 0xAA55); /* Signature */ + if (disk_write(drv, fs->win, 0, 1) != RES_OK) + return FR_DISK_ERR; + } + + /* Create boot record */ + tbl = fs->win; /* Clear buffer */ + mem_set(tbl, 0, SS(fs)); + ST_DWORD(tbl+BS_jmpBoot, 0x90FEEB); /* Boot code (jmp $, nop) */ + ST_WORD(tbl+BPB_BytsPerSec, SS(fs)); /* Sector size */ + tbl[BPB_SecPerClus] = (BYTE)allocsize; /* Sectors per cluster */ + ST_WORD(tbl+BPB_RsvdSecCnt, n_rsv); /* Reserved sectors */ + tbl[BPB_NumFATs] = N_FATS; /* Number of FATs */ + ST_WORD(tbl+BPB_RootEntCnt, SS(fs) / 32 * n_dir); /* Number of rootdir entries */ + if (n_part < 0x10000) { /* Number of total sectors */ + ST_WORD(tbl+BPB_TotSec16, n_part); + } else { + ST_DWORD(tbl+BPB_TotSec32, n_part); + } + tbl[BPB_Media] = 0xF8; /* Media descripter */ + ST_WORD(tbl+BPB_SecPerTrk, 63); /* Number of sectors per track */ + ST_WORD(tbl+BPB_NumHeads, 255); /* Number of heads */ + ST_DWORD(tbl+BPB_HiddSec, b_part); /* Hidden sectors */ + n = get_fattime(); /* Use current time as a VSN */ + if (fmt != FS_FAT32) { + ST_DWORD(tbl+BS_VolID, n); /* Volume serial number */ + ST_WORD(tbl+BPB_FATSz16, n_fat); /* Number of secters per FAT */ + tbl[BS_DrvNum] = 0x80; /* Drive number */ + tbl[BS_BootSig] = 0x29; /* Extended boot signature */ + mem_cpy(tbl+BS_VolLab, "NO NAME FAT ", 19); /* Volume lavel, FAT signature */ + } else { + ST_DWORD(tbl+BS_VolID32, n); /* Volume serial number */ + ST_DWORD(tbl+BPB_FATSz32, n_fat); /* Number of secters per FAT */ + ST_DWORD(tbl+BPB_RootClus, 2); /* Root directory cluster (2) */ + ST_WORD(tbl+BPB_FSInfo, 1); /* FSInfo record offset (bs+1) */ + ST_WORD(tbl+BPB_BkBootSec, 6); /* Backup boot record offset (bs+6) */ + tbl[BS_DrvNum32] = 0x80; /* Drive number */ + tbl[BS_BootSig32] = 0x29; /* Extended boot signature */ + mem_cpy(tbl+BS_VolLab32, "NO NAME FAT32 ", 19); /* Volume lavel, FAT signature */ + } + ST_WORD(tbl+BS_55AA, 0xAA55); /* Signature */ + if (disk_write(drv, tbl, b_part+0, 1) != RES_OK) + return FR_DISK_ERR; + if (fmt == FS_FAT32) + disk_write(drv, tbl, b_part+6, 1); + + /* Initialize FAT area */ + for (m = 0; m < N_FATS; m++) { + mem_set(tbl, 0, SS(fs)); /* 1st sector of the FAT */ + if (fmt != FS_FAT32) { + n = (fmt == FS_FAT12) ? 0x00FFFFF8 : 0xFFFFFFF8; + ST_DWORD(tbl, n); /* Reserve cluster #0-1 (FAT12/16) */ + } else { + ST_DWORD(tbl+0, 0xFFFFFFF8); /* Reserve cluster #0-1 (FAT32) */ + ST_DWORD(tbl+4, 0xFFFFFFFF); + ST_DWORD(tbl+8, 0x0FFFFFFF); /* Reserve cluster #2 for root dir */ + } + if (disk_write(drv, tbl, b_fat++, 1) != RES_OK) + return FR_DISK_ERR; + mem_set(tbl, 0, SS(fs)); /* Following FAT entries are filled by zero */ + for (n = 1; n < n_fat; n++) { + if (disk_write(drv, tbl, b_fat++, 1) != RES_OK) + return FR_DISK_ERR; + } + } + + /* Initialize Root directory */ + m = (BYTE)((fmt == FS_FAT32) ? allocsize : n_dir); + do { + if (disk_write(drv, tbl, b_fat++, 1) != RES_OK) + return FR_DISK_ERR; + } while (--m); + + /* Create FSInfo record if needed */ + if (fmt == FS_FAT32) { + ST_WORD(tbl+BS_55AA, 0xAA55); + ST_DWORD(tbl+FSI_LeadSig, 0x41615252); + ST_DWORD(tbl+FSI_StrucSig, 0x61417272); + ST_DWORD(tbl+FSI_Free_Count, n_clst - 1); + ST_DWORD(tbl+FSI_Nxt_Free, 0xFFFFFFFF); + disk_write(drv, tbl, b_part+1, 1); + disk_write(drv, tbl, b_part+7, 1); + } + + return (disk_ioctl(drv, CTRL_SYNC, (void*)NULL) == RES_OK) ? FR_OK : FR_DISK_ERR; +} + +#endif /* _USE_MKFS && !_FS_READONLY */ + + + + +#if _USE_STRFUNC +/*-----------------------------------------------------------------------*/ +/* Get a string from the file */ +/*-----------------------------------------------------------------------*/ +char* f_gets ( + char* buff, /* Pointer to the string buffer to read */ + int len, /* Size of string buffer */ + FIL* fil /* Pointer to the file object */ +) +{ + int i = 0; + char *p = buff; + UINT rc; + + + while (i < len - 1) { /* Read bytes until buffer gets filled */ + f_read(fil, p, 1, &rc); + if (rc != 1) break; /* Break when no data to read */ +#if _USE_STRFUNC >= 2 + if (*p == '\r') continue; /* Strip '\r' */ +#endif + i++; + if (*p++ == '\n') break; /* Break when reached end of line */ + } + *p = 0; + return i ? buff : NULL; /* When no data read (eof or error), return with error. */ +} + + + +#if !_FS_READONLY +#include +/*-----------------------------------------------------------------------*/ +/* Put a character to the file */ +/*-----------------------------------------------------------------------*/ +int f_putc ( + int chr, /* A character to be output */ + FIL* fil /* Ponter to the file object */ +) +{ + UINT bw; + char c; + + +#if _USE_STRFUNC >= 2 + if (chr == '\n') f_putc ('\r', fil); /* LF -> CRLF conversion */ +#endif + if (!fil) { /* Special value may be used to switch the destination to any other device */ + /* put_console(chr); */ + return chr; + } + c = (char)chr; + f_write(fil, &c, 1, &bw); /* Write a byte to the file */ + return bw ? chr : EOF; /* Return the result */ +} + + + + +/*-----------------------------------------------------------------------*/ +/* Put a string to the file */ +/*-----------------------------------------------------------------------*/ +int f_puts ( + const char* str, /* Pointer to the string to be output */ + FIL* fil /* Pointer to the file object */ +) +{ + int n; + + + for (n = 0; *str; str++, n++) { + if (f_putc(*str, fil) == EOF) return EOF; + } + return n; +} + + + + +/*-----------------------------------------------------------------------*/ +/* Put a formatted string to the file */ +/*-----------------------------------------------------------------------*/ +int f_printf ( + FIL* fil, /* Pointer to the file object */ + const char* str, /* Pointer to the format string */ + ... /* Optional arguments... */ +) +{ + va_list arp; + UCHAR c, f, r; + ULONG val; + char s[16]; + int i, w, res, cc; + + + va_start(arp, str); + + for (cc = res = 0; cc != EOF; res += cc) { + c = *str++; + if (c == 0) break; /* End of string */ + if (c != '%') { /* Non escape cahracter */ + cc = f_putc(c, fil); + if (cc != EOF) cc = 1; + continue; + } + w = f = 0; + c = *str++; + if (c == '0') { /* Flag: '0' padding */ + f = 1; c = *str++; + } + while (c >= '0' && c <= '9') { /* Precision */ + w = w * 10 + (c - '0'); + c = *str++; + } + if (c == 'l') { /* Prefix: Size is long int */ + f |= 2; c = *str++; + } + if (c == 's') { /* Type is string */ + cc = f_puts(va_arg(arp, char*), fil); + continue; + } + if (c == 'c') { /* Type is character */ + cc = f_putc(va_arg(arp, int), fil); + if (cc != EOF) cc = 1; + continue; + } + r = 0; + if (c == 'd') r = 10; /* Type is signed decimal */ + if (c == 'u') r = 10; /* Type is unsigned decimal */ + if (c == 'X') r = 16; /* Type is unsigned hexdecimal */ + if (r == 0) break; /* Unknown type */ + if (f & 2) { /* Get the value */ + val = (ULONG)va_arg(arp, long); + } else { + val = (c == 'd') ? (ULONG)(long)va_arg(arp, int) : (ULONG)va_arg(arp, unsigned int); + } + /* Put numeral string */ + if (c == 'd') { + if (val & 0x80000000) { + val = 0 - val; + f |= 4; + } + } + i = sizeof(s) - 1; s[i] = 0; + do { + c = (UCHAR)(val % r + '0'); + if (c > '9') c += 7; + s[--i] = c; + val /= r; + } while (i && val); + if (i && (f & 4)) s[--i] = '-'; + w = sizeof(s) - 1 - w; + while (i && i > w) s[--i] = (f & 1) ? '0' : ' '; + cc = f_puts(&s[i], fil); + } + + va_end(arp); + return (cc == EOF) ? cc : res; +} + +#endif /* !_FS_READONLY */ +#endif /* _USE_STRFUNC */ diff --git a/bertos/fs/fatfs/ff.h b/bertos/fs/fatfs/ff.h new file mode 100644 index 0000000..5461efe --- /dev/null +++ b/bertos/fs/fatfs/ff.h @@ -0,0 +1,570 @@ +/*---------------------------------------------------------------------------/ +/ FatFs - FAT file system module include file R0.07a (C)ChaN, 2009 +/----------------------------------------------------------------------------/ +/ FatFs module is an open source software to implement FAT file system to +/ small embedded systems. This is a free software and is opened for education, +/ research and commercial developments under license policy of following trems. +/ +/ Copyright (C) 2009, ChaN, all right reserved. +/ +/ * The FatFs module is a free software and there is NO WARRANTY. +/ * No restriction on use. You can use, modify and redistribute it for +/ personal, non-profit or commercial use UNDER YOUR RESPONSIBILITY. +/ * Redistributions of source code must retain the above copyright notice. +/----------------------------------------------------------------------------*/ + +/*---------------------------------------------------------------------------/ +/ FatFs Configuration Options +/ +/ CAUTION! Do not forget to make clean the project after any changes to +/ the configuration options. +/ +/----------------------------------------------------------------------------*/ +#ifndef _FATFS +#define _FATFS + +#include "integer.h" +#include "cfg/cfg_fat.h" + +#ifndef _WORD_ACCESS +#define _WORD_ACCESS 0 +#endif +/* The _WORD_ACCESS option defines which access method is used to the word +/ data in the FAT structure. +/ +/ 0: Byte-by-byte access. Always compatible with all platforms. +/ 1: Word access. Do not choose this unless following condition is met. +/ +/ When the byte order on the memory is big-endian or address miss-aligned +/ word access results incorrect behavior, the _WORD_ACCESS must be set to 0. +/ If it is not the case, the value can also be set to 1 to improve the +/ performance and code efficiency. */ + +#ifndef _FS_READONLY +#define _FS_READONLY 0 +#endif +/* Setting _FS_READONLY to 1 defines read only configuration. This removes +/ writing functions, f_write, f_sync, f_unlink, f_mkdir, f_chmod, f_rename, +/ f_truncate and useless f_getfree. */ + +#ifndef _FS_MINIMIZE +#define _FS_MINIMIZE 0 +#endif +/* The _FS_MINIMIZE option defines minimization level to remove some functions. +/ +/ 0: Full function. +/ 1: f_stat, f_getfree, f_unlink, f_mkdir, f_chmod, f_truncate and f_rename +/ are removed. +/ 2: f_opendir and f_readdir are removed in addition to level 1. +/ 3: f_lseek is removed in addition to level 2. */ + +#ifndef _FS_TINY +#define _FS_TINY 0 +#endif +/* When _FS_TINY is set to 1, FatFs uses the sector buffer in the file system +/ object instead of the sector buffer in the individual file object for file +/ data transfer. This reduces memory consumption 512 bytes each file object. */ + +#ifndef _USE_STRFUNC +#define _USE_STRFUNC 0 +#endif +/* To enable string functions, set _USE_STRFUNC to 1 or 2. */ + +#ifndef _USE_MKFS +#define _USE_MKFS 0 +#endif +/* To enable f_mkfs function, set _USE_MKFS to 1 and set _FS_READONLY to 0 */ + + +#ifndef _USE_FORWARD +#define _USE_FORWARD 0 +#endif +/* To enable f_forward function, set _USE_FORWARD to 1 and set _FS_TINY to 1. */ + + +#ifndef _DRIVES +#define _DRIVES 1 +#endif +/* Number of volumes (logical drives) to be used. */ + +#ifndef _MAX_SS +#define _MAX_SS 512 +#endif +/* Maximum sector size to be handled. (512/1024/2048/4096) */ +/* 512 for memroy card and hard disk, 1024 for floppy disk, 2048 for MO disk */ + +#ifndef _MULTI_PARTITION +#define _MULTI_PARTITION 0 +#endif +/* When _MULTI_PARTITION is set to 0, each volume is bound to the same physical +/ drive number and can mount only first primaly partition. When it is set to 1, +/ each volume is tied to the partitions listed in Drives[]. */ + +#ifndef _CODE_PAGE +#define _CODE_PAGE 932 +#endif +/* The _CODE_PAGE specifies the OEM code page to be used on the target system. +/ When it is non LFN configuration, there is no difference between SBCS code +/ pages. When LFN is enabled, the code page must always be set correctly. +/ 437 - U.S. +/ 720 - Arabic +/ 737 - Greek +/ 775 - Baltic +/ 850 - Multilingual Latin 1 +/ 852 - Latin 2 +/ 855 - Cyrillic +/ 857 - Turkish +/ 858 - Multilingual Latin 1 + Euro +/ 862 - Hebrew +/ 866 - Russian +/ 874 - Thai +/ 932 - Japanese Shift-JIS (DBCS) +/ 936 - Simplified Chinese GBK (DBCS) +/ 949 - Korean (DBCS) +/ 950 - Traditional Chinese Big5 (DBCS) +/ 1258 - Vietnam +*/ + +#ifndef _USE_LFN +#define _USE_LFN 0 +#endif +#ifndef _MAX_LFN +#define _MAX_LFN 255 /* Maximum LFN length to handle (max:255) */ +#endif +/* The _USE_LFN option switches the LFN support. +/ +/ 0: Disable LFN. +/ 1: Enable LFN with static working buffer on the bss. NOT REENTRANT. +/ 2: Enable LFN with dynamic working buffer on the caller's STACK. +/ +/ The working buffer occupies (_MAX_LFN + 1) * 2 bytes. When enable LFN, +/ a Unicode - OEM code conversion function ff_convert() must be added to +/ the project. */ + +#ifndef _FS_REENTRANT +#define _FS_REENTRANT 0 +#endif +#ifndef _TIMEOUT +#define _TIMEOUT 1000 /* Timeout period in unit of time ticks */ +#endif +#ifndef _SYNC_t +#define _SYNC_t HANDLE /* Type of sync object used on the OS. */ + /* e.g. HANDLE, OS_EVENT*, ID and etc.. */ +#endif +/* To make the FatFs module re-entrant, set _FS_REENTRANT to 1 and add user +/ provided synchronization handlers, ff_req_grant, ff_rel_grant, +/ ff_del_syncobj and ff_cre_syncobj function to the project. */ + + + +/* End of configuration options. Do not change followings without care. */ +/*--------------------------------------------------------------------------*/ + + + +/* Definitions corresponds to multiple sector size */ + +#if _MAX_SS == 512 +#define SS(fs) 512 +#else +#if _MAX_SS == 1024 || _MAX_SS == 2048 || _MAX_SS == 4096 +#define SS(fs) ((fs)->s_size) +#else +#error Sector size must be 512, 1024, 2048 or 4096. +#endif +#endif + + + +/* File system object structure */ + +typedef struct _FATFS { + BYTE fs_type; /* FAT sub type */ + BYTE drive; /* Physical drive number */ + BYTE csize; /* Number of sectors per cluster */ + BYTE n_fats; /* Number of FAT copies */ + BYTE wflag; /* win[] dirty flag (1:must be written back) */ + BYTE pad1; + WORD id; /* File system mount ID */ + WORD n_rootdir; /* Number of root directory entries (0 on FAT32) */ +#if _FS_REENTRANT + _SYNC_t sobj; /* Identifier of sync object */ +#endif +#if _MAX_SS != 512U + WORD s_size; /* Sector size */ +#endif +#if !_FS_READONLY + BYTE fsi_flag; /* fsinfo dirty flag (1:must be written back) */ + BYTE pad2; + DWORD last_clust; /* Last allocated cluster */ + DWORD free_clust; /* Number of free clusters */ + DWORD fsi_sector; /* fsinfo sector */ +#endif + DWORD sects_fat; /* Sectors per fat */ + DWORD max_clust; /* Maximum cluster# + 1. Number of clusters is max_clust - 2 */ + DWORD fatbase; /* FAT start sector */ + DWORD dirbase; /* Root directory start sector (Cluster# on FAT32) */ + DWORD database; /* Data start sector */ + DWORD winsect; /* Current sector appearing in the win[] */ + BYTE win[_MAX_SS];/* Disk access window for Directory/FAT */ +} FATFS; + + + +/* Directory object structure */ + +typedef struct _DIR { + WORD id; /* Owner file system mount ID */ + WORD index; /* Current index number */ + FATFS* fs; /* Pointer to the owner file system object */ + DWORD sclust; /* Table start cluster (0:Static table) */ + DWORD clust; /* Current cluster */ + DWORD sect; /* Current sector */ + BYTE* dir; /* Pointer to the current SFN entry in the win[] */ + BYTE* fn; /* Pointer to the SFN (in/out) {file[8],ext[3],status[1]} */ +#if _USE_LFN + WCHAR* lfn; /* Pointer to the LFN working buffer */ + WORD lfn_idx; /* Last matched LFN index (0xFFFF:No LFN) */ +#endif +} DIR; + + + +/* File object structure */ + +typedef struct _FIL { + FATFS* fs; /* Pointer to the owner file system object */ + WORD id; /* Owner file system mount ID */ + BYTE flag; /* File status flags */ + BYTE csect; /* Sector address in the cluster */ + DWORD fptr; /* File R/W pointer */ + DWORD fsize; /* File size */ + DWORD org_clust; /* File start cluster */ + DWORD curr_clust; /* Current cluster */ + DWORD dsect; /* Current data sector */ +#if !_FS_READONLY + DWORD dir_sect; /* Sector containing the directory entry */ + BYTE* dir_ptr; /* Ponter to the directory entry in the window */ +#endif +#if !_FS_TINY + BYTE buf[_MAX_SS];/* File R/W buffer */ +#endif +} FIL; + + + +/* File status structure */ + +typedef struct _FILINFO { + DWORD fsize; /* File size */ + WORD fdate; /* Last modified date */ + WORD ftime; /* Last modified time */ + BYTE fattrib; /* Attribute */ + char fname[13]; /* Short file name (8.3 format) */ +#if _USE_LFN + char *lfname; /* Pointer to the LFN buffer */ + int lfsize; /* Size of LFN buffer [bytes] */ +#endif +} FILINFO; + + + +/* DBCS code ranges */ + +#if _CODE_PAGE == 932 /* CP932 (Japanese Shift-JIS) */ +#define _DF1S 0x81 /* DBC 1st byte range 1 start */ +#define _DF1E 0x9F /* DBC 1st byte range 1 end */ +#define _DF2S 0xE0 /* DBC 1st byte range 2 start */ +#define _DF2E 0xFC /* DBC 1st byte range 2 end */ +#define _DS1S 0x40 /* DBC 2nd byte range 1 start */ +#define _DS1E 0x7E /* DBC 2nd byte range 1 end */ +#define _DS2S 0x80 /* DBC 2nd byte range 2 start */ +#define _DS2E 0xFC /* DBC 2nd byte range 2 end */ + +#elif _CODE_PAGE == 936 /* CP936 (Simplified Chinese GBK) */ +#define _DF1S 0x81 +#define _DF1E 0xFE +#define _DS1S 0x40 +#define _DS1E 0x7E +#define _DS2S 0x80 +#define _DS2E 0xFE + +#elif _CODE_PAGE == 949 /* CP949 (Korean) */ +#define _DF1S 0x81 +#define _DF1E 0xFE +#define _DS1S 0x41 +#define _DS1E 0x5A +#define _DS2S 0x61 +#define _DS2E 0x7A +#define _DS3S 0x81 +#define _DS3E 0xFE + +#elif _CODE_PAGE == 950 /* CP950 (Traditional Chinese Big5) */ +#define _DF1S 0x81 +#define _DF1E 0xFE +#define _DS1S 0x40 +#define _DS1E 0x7E +#define _DS2S 0xA1 +#define _DS2E 0xFE + +#else /* SBCS code pages */ +#define _DF1S 0 + +#endif + + + +/* Character code support macros */ + +#define IsUpper(c) (((c)>='A')&&((c)<='Z')) +#define IsLower(c) (((c)>='a')&&((c)<='z')) +#define IsDigit(c) (((c)>='0')&&((c)<='9')) + +#if _DF1S /* DBCS configuration */ + +#if _DF2S /* Two 1st byte areas */ +#define IsDBCS1(c) (((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) || ((BYTE)(c) >= _DF2S && (BYTE)(c) <= _DF2E)) +#else /* One 1st byte area */ +#define IsDBCS1(c) ((BYTE)(c) >= _DF1S && (BYTE)(c) <= _DF1E) +#endif + +#if _DS3S /* Three 2nd byte areas */ +#define IsDBCS2(c) (((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E) || ((BYTE)(c) >= _DS3S && (BYTE)(c) <= _DS3E)) +#else /* Two 2nd byte areas */ +#define IsDBCS2(c) (((BYTE)(c) >= _DS1S && (BYTE)(c) <= _DS1E) || ((BYTE)(c) >= _DS2S && (BYTE)(c) <= _DS2E)) +#endif + +#else /* SBCS configuration */ + +#define IsDBCS1(c) 0 +#define IsDBCS2(c) 0 + +#endif /* _DF1S */ + + + +/* Definitions corresponds to multi partition */ + +#if _MULTI_PARTITION /* Multiple partition configuration */ + +typedef struct _PARTITION { + BYTE pd; /* Physical drive# */ + BYTE pt; /* Partition # (0-3) */ +} PARTITION; + +extern +const PARTITION Drives[]; /* Logical drive# to physical location conversion table */ +#define LD2PD(drv) (Drives[drv].pd) /* Get physical drive# */ +#define LD2PT(drv) (Drives[drv].pt) /* Get partition# */ + +#else /* Single partition configuration */ + +#define LD2PD(drv) (drv) /* Physical drive# is equal to the logical drive# */ +#define LD2PT(drv) 0 /* Always mounts the 1st partition */ + +#endif + + + +/* File function return code (FRESULT) */ + +typedef enum { + FR_OK = 0, /* 0 */ + FR_DISK_ERR, /* 1 */ + FR_INT_ERR, /* 2 */ + FR_NOT_READY, /* 3 */ + FR_NO_FILE, /* 4 */ + FR_NO_PATH, /* 5 */ + FR_INVALID_NAME, /* 6 */ + FR_DENIED, /* 7 */ + FR_EXIST, /* 8 */ + FR_INVALID_OBJECT, /* 9 */ + FR_WRITE_PROTECTED, /* 10 */ + FR_INVALID_DRIVE, /* 11 */ + FR_NOT_ENABLED, /* 12 */ + FR_NO_FILESYSTEM, /* 13 */ + FR_MKFS_ABORTED, /* 14 */ + FR_TIMEOUT /* 15 */ +} FRESULT; + + + +/*--------------------------------------------------------------*/ +/* FatFs module application interface */ + +FRESULT f_mount (BYTE, FATFS*); /* Mount/Unmount a logical drive */ +FRESULT f_open (FIL*, const char*, BYTE); /* Open or create a file */ +FRESULT f_read (FIL*, void*, UINT, UINT*); /* Read data from a file */ +FRESULT f_write (FIL*, const void*, UINT, UINT*); /* Write data to a file */ +FRESULT f_lseek (FIL*, DWORD); /* Move file pointer of a file object */ +FRESULT f_close (FIL*); /* Close an open file object */ +FRESULT f_opendir (DIR*, const char*); /* Open an existing directory */ +FRESULT f_readdir (DIR*, FILINFO*); /* Read a directory item */ +FRESULT f_stat (const char*, FILINFO*); /* Get file status */ +FRESULT f_getfree (const char*, DWORD*, FATFS**); /* Get number of free clusters on the drive */ +FRESULT f_truncate (FIL*); /* Truncate file */ +FRESULT f_sync (FIL*); /* Flush cached data of a writing file */ +FRESULT f_unlink (const char*); /* Delete an existing file or directory */ +FRESULT f_mkdir (const char*); /* Create a new directory */ +FRESULT f_chmod (const char*, BYTE, BYTE); /* Change attriburte of the file/dir */ +FRESULT f_utime (const char*, const FILINFO*); /* Change timestamp of the file/dir */ +FRESULT f_rename (const char*, const char*); /* Rename/Move a file or directory */ +FRESULT f_forward (FIL*, UINT(*)(const BYTE*,UINT), UINT, UINT*); /* Forward data to the stream */ +FRESULT f_mkfs (BYTE, BYTE, WORD); /* Create a file system on the drive */ + +#if _USE_STRFUNC +int f_putc (int, FIL*); /* Put a character to the file */ +int f_puts (const char*, FIL*); /* Put a string to the file */ +int f_printf (FIL*, const char*, ...); /* Put a formatted string to the file */ +char* f_gets (char*, int, FIL*); /* Get a string from the file */ +#define f_eof(fp) (((fp)->fptr == (fp)->fsize) ? 1 : 0) +#define f_error(fp) (((fp)->flag & FA__ERROR) ? 1 : 0) +#ifndef EOF +#define EOF -1 +#endif +#endif + + + +/*--------------------------------------------------------------*/ +/* User defined functions */ + +/* Real time clock */ +#if !_FS_READONLY +DWORD get_fattime (void); /* 31-25: Year(0-127 org.1980), 24-21: Month(1-12), 20-16: Day(1-31) */ + /* 15-11: Hour(0-23), 10-5: Minute(0-59), 4-0: Second(0-29 *2) */ +#endif + +/* Unicode - OEM code conversion */ +#if _USE_LFN +WCHAR ff_convert (WCHAR, UINT); +#endif + +/* Sync functions */ +#if _FS_REENTRANT +BOOL ff_cre_syncobj(BYTE, _SYNC_t*); +BOOL ff_del_syncobj(_SYNC_t); +BOOL ff_req_grant(_SYNC_t); +void ff_rel_grant(_SYNC_t); +#endif + + + +/*--------------------------------------------------------------*/ +/* Flags and offset address */ + + +/* File access control and file status flags (FIL.flag) */ + +#define FA_READ 0x01 +#define FA_OPEN_EXISTING 0x00 +#if _FS_READONLY == 0 +#define FA_WRITE 0x02 +#define FA_CREATE_NEW 0x04 +#define FA_CREATE_ALWAYS 0x08 +#define FA_OPEN_ALWAYS 0x10 +#define FA__WRITTEN 0x20 +#define FA__DIRTY 0x40 +#endif +#define FA__ERROR 0x80 + + +/* FAT sub type (FATFS.fs_type) */ + +#define FS_FAT12 1 +#define FS_FAT16 2 +#define FS_FAT32 3 + + +/* File attribute bits for directory entry */ + +#define AM_RDO 0x01 /* Read only */ +#define AM_HID 0x02 /* Hidden */ +#define AM_SYS 0x04 /* System */ +#define AM_VOL 0x08 /* Volume label */ +#define AM_LFN 0x0F /* LFN entry */ +#define AM_DIR 0x10 /* Directory */ +#define AM_ARC 0x20 /* Archive */ +#define AM_MASK 0x3F /* Mask of defined bits */ + + +/* FatFs refers the members in the FAT structures with byte offset instead +/ of structure member because there are incompatibility of the packing option +/ between various compilers. */ + +#define BS_jmpBoot 0 +#define BS_OEMName 3 +#define BPB_BytsPerSec 11 +#define BPB_SecPerClus 13 +#define BPB_RsvdSecCnt 14 +#define BPB_NumFATs 16 +#define BPB_RootEntCnt 17 +#define BPB_TotSec16 19 +#define BPB_Media 21 +#define BPB_FATSz16 22 +#define BPB_SecPerTrk 24 +#define BPB_NumHeads 26 +#define BPB_HiddSec 28 +#define BPB_TotSec32 32 +#define BS_55AA 510 + +#define BS_DrvNum 36 +#define BS_BootSig 38 +#define BS_VolID 39 +#define BS_VolLab 43 +#define BS_FilSysType 54 + +#define BPB_FATSz32 36 +#define BPB_ExtFlags 40 +#define BPB_FSVer 42 +#define BPB_RootClus 44 +#define BPB_FSInfo 48 +#define BPB_BkBootSec 50 +#define BS_DrvNum32 64 +#define BS_BootSig32 66 +#define BS_VolID32 67 +#define BS_VolLab32 71 +#define BS_FilSysType32 82 + +#define FSI_LeadSig 0 +#define FSI_StrucSig 484 +#define FSI_Free_Count 488 +#define FSI_Nxt_Free 492 + +#define MBR_Table 446 + +#define DIR_Name 0 +#define DIR_Attr 11 +#define DIR_NTres 12 +#define DIR_CrtTime 14 +#define DIR_CrtDate 16 +#define DIR_FstClusHI 20 +#define DIR_WrtTime 22 +#define DIR_WrtDate 24 +#define DIR_FstClusLO 26 +#define DIR_FileSize 28 +#define LDIR_Ord 0 +#define LDIR_Attr 11 +#define LDIR_Type 12 +#define LDIR_Chksum 13 +#define LDIR_FstClusLO 26 + + + +/*--------------------------------*/ +/* Multi-byte word access macros */ + +#if _WORD_ACCESS == 1 /* Enable word access to the FAT structure */ +#define LD_WORD(ptr) (WORD)(*(WORD*)(BYTE*)(ptr)) +#define LD_DWORD(ptr) (DWORD)(*(DWORD*)(BYTE*)(ptr)) +#define ST_WORD(ptr,val) *(WORD*)(BYTE*)(ptr)=(WORD)(val) +#define ST_DWORD(ptr,val) *(DWORD*)(BYTE*)(ptr)=(DWORD)(val) +#else /* Use byte-by-byte access to the FAT structure */ +#define LD_WORD(ptr) (WORD)(((WORD)*(BYTE*)((ptr)+1)<<8)|(WORD)*(BYTE*)(ptr)) +#define LD_DWORD(ptr) (DWORD)(((DWORD)*(BYTE*)((ptr)+3)<<24)|((DWORD)*(BYTE*)((ptr)+2)<<16)|((WORD)*(BYTE*)((ptr)+1)<<8)|*(BYTE*)(ptr)) +#define ST_WORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8) +#define ST_DWORD(ptr,val) *(BYTE*)(ptr)=(BYTE)(val); *(BYTE*)((ptr)+1)=(BYTE)((WORD)(val)>>8); *(BYTE*)((ptr)+2)=(BYTE)((DWORD)(val)>>16); *(BYTE*)((ptr)+3)=(BYTE)((DWORD)(val)>>24) +#endif + + +#endif /* _FATFS */ diff --git a/bertos/fs/fatfs/integer.h b/bertos/fs/fatfs/integer.h new file mode 100644 index 0000000..32ccfd4 --- /dev/null +++ b/bertos/fs/fatfs/integer.h @@ -0,0 +1,39 @@ +/*-------------------------------------------*/ +/* Integer type definitions for FatFs module */ +/*-------------------------------------------*/ + +#ifndef _INTEGER + +#include + +#if 0 +#include +#else + +/* These types must be 16-bit, 32-bit or larger integer */ +typedef int INT; +typedef unsigned UINT; + +/* These types must be 8-bit integer */ +typedef int8_t CHAR; +typedef uint8_t UCHAR; +typedef uint8_t BYTE; + +/* These types must be 16-bit integer */ +typedef int16_t SHORT; +typedef uint16_t USHORT; +typedef uint16_t WORD; +typedef uint16_t WCHAR; + +/* These types must be 32-bit integer */ +typedef int32_t LONG; +typedef uint32_t ULONG; +typedef uint32_t DWORD; + +/* Boolean type */ +typedef enum { FALSE = 0, TRUE } BOOL; + +#endif + +#define _INTEGER +#endif diff --git a/bertos/fs/fatfs/option/cc932.c b/bertos/fs/fatfs/option/cc932.c new file mode 100644 index 0000000..8f7cd89 --- /dev/null +++ b/bertos/fs/fatfs/option/cc932.c @@ -0,0 +1,3784 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP932 (Japanese Shift-JIS) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + +#define _TINY_TABLE 0 + +#if _USE_LFN && _CODE_PAGE == 932 + + +static +const WCHAR uni2sjis[] = { +/* Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, Unicode - Sjis, */ + 0x00A7, 0x8198, 0x00A8, 0x814E, 0x00B0, 0x818B, 0x00B1, 0x817D, + 0x00B4, 0x814C, 0x00B6, 0x81F7, 0x00D7, 0x817E, 0x00F7, 0x8180, + 0x0391, 0x839F, 0x0392, 0x83A0, 0x0393, 0x83A1, 0x0394, 0x83A2, + 0x0395, 0x83A3, 0x0396, 0x83A4, 0x0397, 0x83A5, 0x0398, 0x83A6, + 0x0399, 0x83A7, 0x039A, 0x83A8, 0x039B, 0x83A9, 0x039C, 0x83AA, + 0x039D, 0x83AB, 0x039E, 0x83AC, 0x039F, 0x83AD, 0x03A0, 0x83AE, + 0x03A1, 0x83AF, 0x03A3, 0x83B0, 0x03A4, 0x83B1, 0x03A5, 0x83B2, + 0x03A6, 0x83B3, 0x03A7, 0x83B4, 0x03A8, 0x83B5, 0x03A9, 0x83B6, + 0x03B1, 0x83BF, 0x03B2, 0x83C0, 0x03B3, 0x83C1, 0x03B4, 0x83C2, + 0x03B5, 0x83C3, 0x03B6, 0x83C4, 0x03B7, 0x83C5, 0x03B8, 0x83C6, + 0x03B9, 0x83C7, 0x03BA, 0x83C8, 0x03BB, 0x83C9, 0x03BC, 0x83CA, + 0x03BD, 0x83CB, 0x03BE, 0x83CC, 0x03BF, 0x83CD, 0x03C0, 0x83CE, + 0x03C1, 0x83CF, 0x03C3, 0x83D0, 0x03C4, 0x83D1, 0x03C5, 0x83D2, + 0x03C6, 0x83D3, 0x03C7, 0x83D4, 0x03C8, 0x83D5, 0x03C9, 0x83D6, + 0x0401, 0x8446, 0x0410, 0x8440, 0x0411, 0x8441, 0x0412, 0x8442, + 0x0413, 0x8443, 0x0414, 0x8444, 0x0415, 0x8445, 0x0416, 0x8447, + 0x0417, 0x8448, 0x0418, 0x8449, 0x0419, 0x844A, 0x041A, 0x844B, + 0x041B, 0x844C, 0x041C, 0x844D, 0x041D, 0x844E, 0x041E, 0x844F, + 0x041F, 0x8450, 0x0420, 0x8451, 0x0421, 0x8452, 0x0422, 0x8453, + 0x0423, 0x8454, 0x0424, 0x8455, 0x0425, 0x8456, 0x0426, 0x8457, + 0x0427, 0x8458, 0x0428, 0x8459, 0x0429, 0x845A, 0x042A, 0x845B, + 0x042B, 0x845C, 0x042C, 0x845D, 0x042D, 0x845E, 0x042E, 0x845F, + 0x042F, 0x8460, 0x0430, 0x8470, 0x0431, 0x8471, 0x0432, 0x8472, + 0x0433, 0x8473, 0x0434, 0x8474, 0x0435, 0x8475, 0x0436, 0x8477, + 0x0437, 0x8478, 0x0438, 0x8479, 0x0439, 0x847A, 0x043A, 0x847B, + 0x043B, 0x847C, 0x043C, 0x847D, 0x043D, 0x847E, 0x043E, 0x8480, + 0x043F, 0x8481, 0x0440, 0x8482, 0x0441, 0x8483, 0x0442, 0x8484, + 0x0443, 0x8485, 0x0444, 0x8486, 0x0445, 0x8487, 0x0446, 0x8488, + 0x0447, 0x8489, 0x0448, 0x848A, 0x0449, 0x848B, 0x044A, 0x848C, + 0x044B, 0x848D, 0x044C, 0x848E, 0x044D, 0x848F, 0x044E, 0x8490, + 0x044F, 0x8491, 0x0451, 0x8476, 0x2010, 0x815D, 0x2015, 0x815C, + 0x2018, 0x8165, 0x2019, 0x8166, 0x201C, 0x8167, 0x201D, 0x8168, + 0x2020, 0x81F5, 0x2021, 0x81F6, 0x2025, 0x8164, 0x2026, 0x8163, + 0x2030, 0x81F1, 0x2032, 0x818C, 0x2033, 0x818D, 0x203B, 0x81A6, + 0x2103, 0x818E, 0x2116, 0x8782, 0x2121, 0x8784, 0x212B, 0x81F0, + 0x2160, 0x8754, 0x2161, 0x8755, 0x2162, 0x8756, 0x2163, 0x8757, + 0x2164, 0x8758, 0x2165, 0x8759, 0x2166, 0x875A, 0x2167, 0x875B, + 0x2168, 0x875C, 0x2169, 0x875D, 0x2170, 0xFA40, 0x2171, 0xFA41, + 0x2172, 0xFA42, 0x2173, 0xFA43, 0x2174, 0xFA44, 0x2175, 0xFA45, + 0x2176, 0xFA46, 0x2177, 0xFA47, 0x2178, 0xFA48, 0x2179, 0xFA49, + 0x2190, 0x81A9, 0x2191, 0x81AA, 0x2192, 0x81A8, 0x2193, 0x81AB, + 0x21D2, 0x81CB, 0x21D4, 0x81CC, 0x2200, 0x81CD, 0x2202, 0x81DD, + 0x2203, 0x81CE, 0x2207, 0x81DE, 0x2208, 0x81B8, 0x220B, 0x81B9, + 0x2211, 0x8794, 0x221A, 0x81E3, 0x221D, 0x81E5, 0x221E, 0x8187, + 0x221F, 0x8798, 0x2220, 0x81DA, 0x2225, 0x8161, 0x2227, 0x81C8, + 0x2228, 0x81C9, 0x2229, 0x81BF, 0x222A, 0x81BE, 0x222B, 0x81E7, + 0x222C, 0x81E8, 0x222E, 0x8793, 0x2234, 0x8188, 0x2235, 0x81E6, + 0x223D, 0x81E4, 0x2252, 0x81E0, 0x2260, 0x8182, 0x2261, 0x81DF, + 0x2266, 0x8185, 0x2267, 0x8186, 0x226A, 0x81E1, 0x226B, 0x81E2, + 0x2282, 0x81BC, 0x2283, 0x81BD, 0x2286, 0x81BA, 0x2287, 0x81BB, + 0x22A5, 0x81DB, 0x22BF, 0x8799, 0x2312, 0x81DC, 0x2460, 0x8740, + 0x2461, 0x8741, 0x2462, 0x8742, 0x2463, 0x8743, 0x2464, 0x8744, + 0x2465, 0x8745, 0x2466, 0x8746, 0x2467, 0x8747, 0x2468, 0x8748, + 0x2469, 0x8749, 0x246A, 0x874A, 0x246B, 0x874B, 0x246C, 0x874C, + 0x246D, 0x874D, 0x246E, 0x874E, 0x246F, 0x874F, 0x2470, 0x8750, + 0x2471, 0x8751, 0x2472, 0x8752, 0x2473, 0x8753, 0x2500, 0x849F, + 0x2501, 0x84AA, 0x2502, 0x84A0, 0x2503, 0x84AB, 0x250C, 0x84A1, + 0x250F, 0x84AC, 0x2510, 0x84A2, 0x2513, 0x84AD, 0x2514, 0x84A4, + 0x2517, 0x84AF, 0x2518, 0x84A3, 0x251B, 0x84AE, 0x251C, 0x84A5, + 0x251D, 0x84BA, 0x2520, 0x84B5, 0x2523, 0x84B0, 0x2524, 0x84A7, + 0x2525, 0x84BC, 0x2528, 0x84B7, 0x252B, 0x84B2, 0x252C, 0x84A6, + 0x252F, 0x84B6, 0x2530, 0x84BB, 0x2533, 0x84B1, 0x2534, 0x84A8, + 0x2537, 0x84B8, 0x2538, 0x84BD, 0x253B, 0x84B3, 0x253C, 0x84A9, + 0x253F, 0x84B9, 0x2542, 0x84BE, 0x254B, 0x84B4, 0x25A0, 0x81A1, + 0x25A1, 0x81A0, 0x25B2, 0x81A3, 0x25B3, 0x81A2, 0x25BC, 0x81A5, + 0x25BD, 0x81A4, 0x25C6, 0x819F, 0x25C7, 0x819E, 0x25CB, 0x819B, + 0x25CE, 0x819D, 0x25CF, 0x819C, 0x25EF, 0x81FC, 0x2605, 0x819A, + 0x2606, 0x8199, 0x2640, 0x818A, 0x2642, 0x8189, 0x266A, 0x81F4, + 0x266D, 0x81F3, 0x266F, 0x81F2, 0x3000, 0x8140, 0x3001, 0x8141, + 0x3002, 0x8142, 0x3003, 0x8156, 0x3005, 0x8158, 0x3006, 0x8159, + 0x3007, 0x815A, 0x3008, 0x8171, 0x3009, 0x8172, 0x300A, 0x8173, + 0x300B, 0x8174, 0x300C, 0x8175, 0x300D, 0x8176, 0x300E, 0x8177, + 0x300F, 0x8178, 0x3010, 0x8179, 0x3011, 0x817A, 0x3012, 0x81A7, + 0x3013, 0x81AC, 0x3014, 0x816B, 0x3015, 0x816C, 0x301D, 0x8780, + 0x301F, 0x8781, 0x3041, 0x829F, 0x3042, 0x82A0, 0x3043, 0x82A1, + 0x3044, 0x82A2, 0x3045, 0x82A3, 0x3046, 0x82A4, 0x3047, 0x82A5, + 0x3048, 0x82A6, 0x3049, 0x82A7, 0x304A, 0x82A8, 0x304B, 0x82A9, + 0x304C, 0x82AA, 0x304D, 0x82AB, 0x304E, 0x82AC, 0x304F, 0x82AD, + 0x3050, 0x82AE, 0x3051, 0x82AF, 0x3052, 0x82B0, 0x3053, 0x82B1, + 0x3054, 0x82B2, 0x3055, 0x82B3, 0x3056, 0x82B4, 0x3057, 0x82B5, + 0x3058, 0x82B6, 0x3059, 0x82B7, 0x305A, 0x82B8, 0x305B, 0x82B9, + 0x305C, 0x82BA, 0x305D, 0x82BB, 0x305E, 0x82BC, 0x305F, 0x82BD, + 0x3060, 0x82BE, 0x3061, 0x82BF, 0x3062, 0x82C0, 0x3063, 0x82C1, + 0x3064, 0x82C2, 0x3065, 0x82C3, 0x3066, 0x82C4, 0x3067, 0x82C5, + 0x3068, 0x82C6, 0x3069, 0x82C7, 0x306A, 0x82C8, 0x306B, 0x82C9, + 0x306C, 0x82CA, 0x306D, 0x82CB, 0x306E, 0x82CC, 0x306F, 0x82CD, + 0x3070, 0x82CE, 0x3071, 0x82CF, 0x3072, 0x82D0, 0x3073, 0x82D1, + 0x3074, 0x82D2, 0x3075, 0x82D3, 0x3076, 0x82D4, 0x3077, 0x82D5, + 0x3078, 0x82D6, 0x3079, 0x82D7, 0x307A, 0x82D8, 0x307B, 0x82D9, + 0x307C, 0x82DA, 0x307D, 0x82DB, 0x307E, 0x82DC, 0x307F, 0x82DD, + 0x3080, 0x82DE, 0x3081, 0x82DF, 0x3082, 0x82E0, 0x3083, 0x82E1, + 0x3084, 0x82E2, 0x3085, 0x82E3, 0x3086, 0x82E4, 0x3087, 0x82E5, + 0x3088, 0x82E6, 0x3089, 0x82E7, 0x308A, 0x82E8, 0x308B, 0x82E9, + 0x308C, 0x82EA, 0x308D, 0x82EB, 0x308E, 0x82EC, 0x308F, 0x82ED, + 0x3090, 0x82EE, 0x3091, 0x82EF, 0x3092, 0x82F0, 0x3093, 0x82F1, + 0x3094, 0x8394, 0x309B, 0x814A, 0x309C, 0x814B, 0x309D, 0x8154, + 0x309E, 0x8155, 0x30A1, 0x8340, 0x30A2, 0x8341, 0x30A3, 0x8342, + 0x30A4, 0x8343, 0x30A5, 0x8344, 0x30A6, 0x8345, 0x30A7, 0x8346, + 0x30A8, 0x8347, 0x30A9, 0x8348, 0x30AA, 0x8349, 0x30AB, 0x834A, + 0x30AC, 0x834B, 0x30AD, 0x834C, 0x30AE, 0x834D, 0x30AF, 0x834E, + 0x30B0, 0x834F, 0x30B1, 0x8350, 0x30B2, 0x8351, 0x30B3, 0x8352, + 0x30B4, 0x8353, 0x30B5, 0x8354, 0x30B6, 0x8355, 0x30B7, 0x8356, + 0x30B8, 0x8357, 0x30B9, 0x8358, 0x30BA, 0x8359, 0x30BB, 0x835A, + 0x30BC, 0x835B, 0x30BD, 0x835C, 0x30BE, 0x835D, 0x30BF, 0x835E, + 0x30C0, 0x835F, 0x30C1, 0x8360, 0x30C2, 0x8361, 0x30C3, 0x8362, + 0x30C4, 0x8363, 0x30C5, 0x8364, 0x30C6, 0x8365, 0x30C7, 0x8366, + 0x30C8, 0x8367, 0x30C9, 0x8368, 0x30CA, 0x8369, 0x30CB, 0x836A, + 0x30CC, 0x836B, 0x30CD, 0x836C, 0x30CE, 0x836D, 0x30CF, 0x836E, + 0x30D0, 0x836F, 0x30D1, 0x8370, 0x30D2, 0x8371, 0x30D3, 0x8372, + 0x30D4, 0x8373, 0x30D5, 0x8374, 0x30D6, 0x8375, 0x30D7, 0x8376, + 0x30D8, 0x8377, 0x30D9, 0x8378, 0x30DA, 0x8379, 0x30DB, 0x837A, + 0x30DC, 0x837B, 0x30DD, 0x837C, 0x30DE, 0x837D, 0x30DF, 0x837E, + 0x30E0, 0x8380, 0x30E1, 0x8381, 0x30E2, 0x8382, 0x30E3, 0x8383, + 0x30E4, 0x8384, 0x30E5, 0x8385, 0x30E6, 0x8386, 0x30E7, 0x8387, + 0x30E8, 0x8388, 0x30E9, 0x8389, 0x30EA, 0x838A, 0x30EB, 0x838B, + 0x30EC, 0x838C, 0x30ED, 0x838D, 0x30EE, 0x838E, 0x30EF, 0x838F, + 0x30F0, 0x8390, 0x30F1, 0x8391, 0x30F2, 0x8392, 0x30F3, 0x8393, + 0x30F4, 0x8394, 0x30F5, 0x8395, 0x30F6, 0x8396, 0x30FB, 0x8145, + 0x30FC, 0x815B, 0x30FD, 0x8152, 0x30FE, 0x8153, 0x3231, 0x878A, + 0x3232, 0x878B, 0x3239, 0x878C, 0x32A4, 0x8785, 0x32A5, 0x8786, + 0x32A6, 0x8787, 0x32A7, 0x8788, 0x32A8, 0x8789, 0x3303, 0x8765, + 0x330D, 0x8769, 0x3314, 0x8760, 0x3318, 0x8763, 0x3322, 0x8761, + 0x3323, 0x876B, 0x3326, 0x876A, 0x3327, 0x8764, 0x332B, 0x876C, + 0x3336, 0x8766, 0x333B, 0x876E, 0x3349, 0x875F, 0x334A, 0x876D, + 0x334D, 0x8762, 0x3351, 0x8767, 0x3357, 0x8768, 0x337B, 0x877E, + 0x337C, 0x878F, 0x337D, 0x878E, 0x337E, 0x878D, 0x338E, 0x8772, + 0x338F, 0x8773, 0x339C, 0x876F, 0x339D, 0x8770, 0x339E, 0x8771, + 0x33A1, 0x8775, 0x33C4, 0x8774, 0x33CD, 0x8783, 0x4E00, 0x88EA, + 0x4E01, 0x929A, 0x4E03, 0x8EB5, 0x4E07, 0x969C, 0x4E08, 0x8FE4, + 0x4E09, 0x8E4F, 0x4E0A, 0x8FE3, 0x4E0B, 0x89BA, 0x4E0D, 0x9573, + 0x4E0E, 0x975E, 0x4E10, 0x98A0, 0x4E11, 0x894E, 0x4E14, 0x8A8E, + 0x4E15, 0x98A1, 0x4E16, 0x90A2, 0x4E17, 0x99C0, 0x4E18, 0x8B75, + 0x4E19, 0x95B8, 0x4E1E, 0x8FE5, 0x4E21, 0x97BC, 0x4E26, 0x95C0, + 0x4E28, 0xFA68, 0x4E2A, 0x98A2, 0x4E2D, 0x9286, 0x4E31, 0x98A3, + 0x4E32, 0x8BF8, 0x4E36, 0x98A4, 0x4E38, 0x8ADB, 0x4E39, 0x924F, + 0x4E3B, 0x8EE5, 0x4E3C, 0x98A5, 0x4E3F, 0x98A6, 0x4E42, 0x98A7, + 0x4E43, 0x9454, 0x4E45, 0x8B76, 0x4E4B, 0x9456, 0x4E4D, 0x93E1, + 0x4E4E, 0x8CC1, 0x4E4F, 0x9652, 0x4E55, 0xE568, 0x4E56, 0x98A8, + 0x4E57, 0x8FE6, 0x4E58, 0x98A9, 0x4E59, 0x89B3, 0x4E5D, 0x8BE3, + 0x4E5E, 0x8CEE, 0x4E5F, 0x96E7, 0x4E62, 0x9BA4, 0x4E71, 0x9790, + 0x4E73, 0x93FB, 0x4E7E, 0x8AA3, 0x4E80, 0x8B54, 0x4E82, 0x98AA, + 0x4E85, 0x98AB, 0x4E86, 0x97B9, 0x4E88, 0x975C, 0x4E89, 0x9188, + 0x4E8A, 0x98AD, 0x4E8B, 0x8E96, 0x4E8C, 0x93F1, 0x4E8E, 0x98B0, + 0x4E91, 0x895D, 0x4E92, 0x8CDD, 0x4E94, 0x8CDC, 0x4E95, 0x88E4, + 0x4E98, 0x986A, 0x4E99, 0x9869, 0x4E9B, 0x8DB1, 0x4E9C, 0x889F, + 0x4E9E, 0x98B1, 0x4E9F, 0x98B2, 0x4EA0, 0x98B3, 0x4EA1, 0x9653, + 0x4EA2, 0x98B4, 0x4EA4, 0x8CF0, 0x4EA5, 0x88E5, 0x4EA6, 0x9692, + 0x4EA8, 0x8B9C, 0x4EAB, 0x8B9D, 0x4EAC, 0x8B9E, 0x4EAD, 0x92E0, + 0x4EAE, 0x97BA, 0x4EB0, 0x98B5, 0x4EB3, 0x98B6, 0x4EB6, 0x98B7, + 0x4EBA, 0x906C, 0x4EC0, 0x8F59, 0x4EC1, 0x906D, 0x4EC2, 0x98BC, + 0x4EC4, 0x98BA, 0x4EC6, 0x98BB, 0x4EC7, 0x8B77, 0x4ECA, 0x8DA1, + 0x4ECB, 0x89EE, 0x4ECD, 0x98B9, 0x4ECE, 0x98B8, 0x4ECF, 0x95A7, + 0x4ED4, 0x8E65, 0x4ED5, 0x8E64, 0x4ED6, 0x91BC, 0x4ED7, 0x98BD, + 0x4ED8, 0x9574, 0x4ED9, 0x90E5, 0x4EDD, 0x8157, 0x4EDE, 0x98BE, + 0x4EDF, 0x98C0, 0x4EE1, 0xFA69, 0x4EE3, 0x91E3, 0x4EE4, 0x97DF, + 0x4EE5, 0x88C8, 0x4EED, 0x98BF, 0x4EEE, 0x89BC, 0x4EF0, 0x8BC2, + 0x4EF2, 0x9287, 0x4EF6, 0x8C8F, 0x4EF7, 0x98C1, 0x4EFB, 0x9443, + 0x4EFC, 0xFA6A, 0x4F00, 0xFA6B, 0x4F01, 0x8AE9, 0x4F03, 0xFA6C, + 0x4F09, 0x98C2, 0x4F0A, 0x88C9, 0x4F0D, 0x8CDE, 0x4F0E, 0x8AEA, + 0x4F0F, 0x959A, 0x4F10, 0x94B0, 0x4F11, 0x8B78, 0x4F1A, 0x89EF, + 0x4F1C, 0x98E5, 0x4F1D, 0x9360, 0x4F2F, 0x948C, 0x4F30, 0x98C4, + 0x4F34, 0x94BA, 0x4F36, 0x97E0, 0x4F38, 0x904C, 0x4F39, 0xFA6D, + 0x4F3A, 0x8E66, 0x4F3C, 0x8E97, 0x4F3D, 0x89BE, 0x4F43, 0x92CF, + 0x4F46, 0x9241, 0x4F47, 0x98C8, 0x4F4D, 0x88CA, 0x4F4E, 0x92E1, + 0x4F4F, 0x8F5A, 0x4F50, 0x8DB2, 0x4F51, 0x9743, 0x4F53, 0x91CC, + 0x4F55, 0x89BD, 0x4F56, 0xFA6E, 0x4F57, 0x98C7, 0x4F59, 0x975D, + 0x4F5A, 0x98C3, 0x4F5B, 0x98C5, 0x4F5C, 0x8DEC, 0x4F5D, 0x98C6, + 0x4F5E, 0x9B43, 0x4F69, 0x98CE, 0x4F6F, 0x98D1, 0x4F70, 0x98CF, + 0x4F73, 0x89C0, 0x4F75, 0x95B9, 0x4F76, 0x98C9, 0x4F7B, 0x98CD, + 0x4F7C, 0x8CF1, 0x4F7F, 0x8E67, 0x4F83, 0x8AA4, 0x4F86, 0x98D2, + 0x4F88, 0x98CA, 0x4F8A, 0xFA70, 0x4F8B, 0x97E1, 0x4F8D, 0x8E98, + 0x4F8F, 0x98CB, 0x4F91, 0x98D0, 0x4F92, 0xFA6F, 0x4F94, 0xFA72, + 0x4F96, 0x98D3, 0x4F98, 0x98CC, 0x4F9A, 0xFA71, 0x4F9B, 0x8B9F, + 0x4F9D, 0x88CB, 0x4FA0, 0x8BA0, 0x4FA1, 0x89BF, 0x4FAB, 0x9B44, + 0x4FAD, 0x9699, 0x4FAE, 0x958E, 0x4FAF, 0x8CF2, 0x4FB5, 0x904E, + 0x4FB6, 0x97B5, 0x4FBF, 0x95D6, 0x4FC2, 0x8C57, 0x4FC3, 0x91A3, + 0x4FC4, 0x89E2, 0x4FC9, 0xFA61, 0x4FCA, 0x8F72, 0x4FCD, 0xFA73, + 0x4FCE, 0x98D7, 0x4FD0, 0x98DC, 0x4FD1, 0x98DA, 0x4FD4, 0x98D5, + 0x4FD7, 0x91AD, 0x4FD8, 0x98D8, 0x4FDA, 0x98DB, 0x4FDB, 0x98D9, + 0x4FDD, 0x95DB, 0x4FDF, 0x98D6, 0x4FE1, 0x904D, 0x4FE3, 0x9693, + 0x4FE4, 0x98DD, 0x4FE5, 0x98DE, 0x4FEE, 0x8F43, 0x4FEF, 0x98EB, + 0x4FF3, 0x946F, 0x4FF5, 0x9555, 0x4FF6, 0x98E6, 0x4FF8, 0x95EE, + 0x4FFA, 0x89B4, 0x4FFE, 0x98EA, 0x4FFF, 0xFA76, 0x5005, 0x98E4, + 0x5006, 0x98ED, 0x5009, 0x9171, 0x500B, 0x8CC2, 0x500D, 0x947B, + 0x500F, 0xE0C5, 0x5011, 0x98EC, 0x5012, 0x937C, 0x5014, 0x98E1, + 0x5016, 0x8CF4, 0x5019, 0x8CF3, 0x501A, 0x98DF, 0x501E, 0xFA77, + 0x501F, 0x8ED8, 0x5021, 0x98E7, 0x5022, 0xFA75, 0x5023, 0x95ED, + 0x5024, 0x926C, 0x5025, 0x98E3, 0x5026, 0x8C91, 0x5028, 0x98E0, + 0x5029, 0x98E8, 0x502A, 0x98E2, 0x502B, 0x97CF, 0x502C, 0x98E9, + 0x502D, 0x9860, 0x5036, 0x8BE4, 0x5039, 0x8C90, 0x5040, 0xFA74, + 0x5042, 0xFA7A, 0x5043, 0x98EE, 0x5046, 0xFA78, 0x5047, 0x98EF, + 0x5048, 0x98F3, 0x5049, 0x88CC, 0x504F, 0x95CE, 0x5050, 0x98F2, + 0x5055, 0x98F1, 0x5056, 0x98F5, 0x505A, 0x98F4, 0x505C, 0x92E2, + 0x5065, 0x8C92, 0x506C, 0x98F6, 0x5070, 0xFA79, 0x5072, 0x8EC3, + 0x5074, 0x91A4, 0x5075, 0x92E3, 0x5076, 0x8BF4, 0x5078, 0x98F7, + 0x507D, 0x8B55, 0x5080, 0x98F8, 0x5085, 0x98FA, 0x508D, 0x9654, + 0x5091, 0x8C86, 0x5094, 0xFA7B, 0x5098, 0x8E50, 0x5099, 0x94F5, + 0x509A, 0x98F9, 0x50AC, 0x8DC3, 0x50AD, 0x9762, 0x50B2, 0x98FC, + 0x50B3, 0x9942, 0x50B4, 0x98FB, 0x50B5, 0x8DC2, 0x50B7, 0x8F9D, + 0x50BE, 0x8C58, 0x50C2, 0x9943, 0x50C5, 0x8BCD, 0x50C9, 0x9940, + 0x50CA, 0x9941, 0x50CD, 0x93AD, 0x50CF, 0x919C, 0x50D1, 0x8BA1, + 0x50D5, 0x966C, 0x50D6, 0x9944, 0x50D8, 0xFA7D, 0x50DA, 0x97BB, + 0x50DE, 0x9945, 0x50E3, 0x9948, 0x50E5, 0x9946, 0x50E7, 0x916D, + 0x50ED, 0x9947, 0x50EE, 0x9949, 0x50F4, 0xFA7C, 0x50F5, 0x994B, + 0x50F9, 0x994A, 0x50FB, 0x95C6, 0x5100, 0x8B56, 0x5101, 0x994D, + 0x5102, 0x994E, 0x5104, 0x89AD, 0x5109, 0x994C, 0x5112, 0x8EF2, + 0x5114, 0x9951, 0x5115, 0x9950, 0x5116, 0x994F, 0x5118, 0x98D4, + 0x511A, 0x9952, 0x511F, 0x8F9E, 0x5121, 0x9953, 0x512A, 0x9744, + 0x5132, 0x96D7, 0x5137, 0x9955, 0x513A, 0x9954, 0x513B, 0x9957, + 0x513C, 0x9956, 0x513F, 0x9958, 0x5140, 0x9959, 0x5141, 0x88F2, + 0x5143, 0x8CB3, 0x5144, 0x8C5A, 0x5145, 0x8F5B, 0x5146, 0x929B, + 0x5147, 0x8BA2, 0x5148, 0x90E6, 0x5149, 0x8CF5, 0x514A, 0xFA7E, + 0x514B, 0x8D8E, 0x514C, 0x995B, 0x514D, 0x96C6, 0x514E, 0x9365, + 0x5150, 0x8E99, 0x5152, 0x995A, 0x5154, 0x995C, 0x515A, 0x937D, + 0x515C, 0x8A95, 0x5162, 0x995D, 0x5164, 0xFA80, 0x5165, 0x93FC, + 0x5168, 0x9153, 0x5169, 0x995F, 0x516A, 0x9960, 0x516B, 0x94AA, + 0x516C, 0x8CF6, 0x516D, 0x985A, 0x516E, 0x9961, 0x5171, 0x8BA4, + 0x5175, 0x95BA, 0x5176, 0x91B4, 0x5177, 0x8BEF, 0x5178, 0x9354, + 0x517C, 0x8C93, 0x5180, 0x9962, 0x5182, 0x9963, 0x5185, 0x93E0, + 0x5186, 0x897E, 0x5189, 0x9966, 0x518A, 0x8DFB, 0x518C, 0x9965, + 0x518D, 0x8DC4, 0x518F, 0x9967, 0x5190, 0xE3EC, 0x5191, 0x9968, + 0x5192, 0x9660, 0x5193, 0x9969, 0x5195, 0x996A, 0x5196, 0x996B, + 0x5197, 0x8FE7, 0x5199, 0x8ECA, 0x519D, 0xFA81, 0x51A0, 0x8AA5, + 0x51A2, 0x996E, 0x51A4, 0x996C, 0x51A5, 0x96BB, 0x51A6, 0x996D, + 0x51A8, 0x9579, 0x51A9, 0x996F, 0x51AA, 0x9970, 0x51AB, 0x9971, + 0x51AC, 0x937E, 0x51B0, 0x9975, 0x51B1, 0x9973, 0x51B2, 0x9974, + 0x51B3, 0x9972, 0x51B4, 0x8DE1, 0x51B5, 0x9976, 0x51B6, 0x96E8, + 0x51B7, 0x97E2, 0x51BD, 0x9977, 0x51BE, 0xFA82, 0x51C4, 0x90A6, + 0x51C5, 0x9978, 0x51C6, 0x8F79, 0x51C9, 0x9979, 0x51CB, 0x929C, + 0x51CC, 0x97BD, 0x51CD, 0x9380, 0x51D6, 0x99C3, 0x51DB, 0x997A, + 0x51DC, 0xEAA3, 0x51DD, 0x8BC3, 0x51E0, 0x997B, 0x51E1, 0x967D, + 0x51E6, 0x8F88, 0x51E7, 0x91FA, 0x51E9, 0x997D, 0x51EA, 0x93E2, + 0x51EC, 0xFA83, 0x51ED, 0x997E, 0x51F0, 0x9980, 0x51F1, 0x8A4D, + 0x51F5, 0x9981, 0x51F6, 0x8BA5, 0x51F8, 0x93CA, 0x51F9, 0x899A, + 0x51FA, 0x8F6F, 0x51FD, 0x949F, 0x51FE, 0x9982, 0x5200, 0x9381, + 0x5203, 0x906E, 0x5204, 0x9983, 0x5206, 0x95AA, 0x5207, 0x90D8, + 0x5208, 0x8AA0, 0x520A, 0x8AA7, 0x520B, 0x9984, 0x520E, 0x9986, + 0x5211, 0x8C59, 0x5214, 0x9985, 0x5215, 0xFA84, 0x5217, 0x97F1, + 0x521D, 0x8F89, 0x5224, 0x94BB, 0x5225, 0x95CA, 0x5227, 0x9987, + 0x5229, 0x9798, 0x522A, 0x9988, 0x522E, 0x9989, 0x5230, 0x939E, + 0x5233, 0x998A, 0x5236, 0x90A7, 0x5237, 0x8DFC, 0x5238, 0x8C94, + 0x5239, 0x998B, 0x523A, 0x8E68, 0x523B, 0x8D8F, 0x5243, 0x92E4, + 0x5244, 0x998D, 0x5247, 0x91A5, 0x524A, 0x8DED, 0x524B, 0x998E, + 0x524C, 0x998F, 0x524D, 0x914F, 0x524F, 0x998C, 0x5254, 0x9991, + 0x5256, 0x9655, 0x525B, 0x8D84, 0x525E, 0x9990, 0x5263, 0x8C95, + 0x5264, 0x8DDC, 0x5265, 0x948D, 0x5269, 0x9994, 0x526A, 0x9992, + 0x526F, 0x959B, 0x5270, 0x8FE8, 0x5271, 0x999B, 0x5272, 0x8A84, + 0x5273, 0x9995, 0x5274, 0x9993, 0x5275, 0x916E, 0x527D, 0x9997, + 0x527F, 0x9996, 0x5283, 0x8A63, 0x5287, 0x8C80, 0x5288, 0x999C, + 0x5289, 0x97AB, 0x528D, 0x9998, 0x5291, 0x999D, 0x5292, 0x999A, + 0x5294, 0x9999, 0x529B, 0x97CD, 0x529C, 0xFA85, 0x529F, 0x8CF7, + 0x52A0, 0x89C1, 0x52A3, 0x97F2, 0x52A6, 0xFA86, 0x52A9, 0x8F95, + 0x52AA, 0x9377, 0x52AB, 0x8D85, 0x52AC, 0x99A0, 0x52AD, 0x99A1, + 0x52AF, 0xFB77, 0x52B1, 0x97E3, 0x52B4, 0x984A, 0x52B5, 0x99A3, + 0x52B9, 0x8CF8, 0x52BC, 0x99A2, 0x52BE, 0x8A4E, 0x52C0, 0xFA87, + 0x52C1, 0x99A4, 0x52C3, 0x9675, 0x52C5, 0x92BA, 0x52C7, 0x9745, + 0x52C9, 0x95D7, 0x52CD, 0x99A5, 0x52D2, 0xE8D3, 0x52D5, 0x93AE, + 0x52D7, 0x99A6, 0x52D8, 0x8AA8, 0x52D9, 0x96B1, 0x52DB, 0xFA88, + 0x52DD, 0x8F9F, 0x52DE, 0x99A7, 0x52DF, 0x95E5, 0x52E0, 0x99AB, + 0x52E2, 0x90A8, 0x52E3, 0x99A8, 0x52E4, 0x8BCE, 0x52E6, 0x99A9, + 0x52E7, 0x8AA9, 0x52F2, 0x8C4D, 0x52F3, 0x99AC, 0x52F5, 0x99AD, + 0x52F8, 0x99AE, 0x52F9, 0x99AF, 0x52FA, 0x8ED9, 0x52FE, 0x8CF9, + 0x52FF, 0x96DC, 0x5300, 0xFA89, 0x5301, 0x96E6, 0x5302, 0x93F5, + 0x5305, 0x95EF, 0x5306, 0x99B0, 0x5307, 0xFA8A, 0x5308, 0x99B1, + 0x530D, 0x99B3, 0x530F, 0x99B5, 0x5310, 0x99B4, 0x5315, 0x99B6, + 0x5316, 0x89BB, 0x5317, 0x966B, 0x5319, 0x8DFA, 0x531A, 0x99B7, + 0x531D, 0x9178, 0x5320, 0x8FA0, 0x5321, 0x8BA7, 0x5323, 0x99B8, + 0x5324, 0xFA8B, 0x532A, 0x94D9, 0x532F, 0x99B9, 0x5331, 0x99BA, + 0x5333, 0x99BB, 0x5338, 0x99BC, 0x5339, 0x9543, 0x533A, 0x8BE6, + 0x533B, 0x88E3, 0x533F, 0x93BD, 0x5340, 0x99BD, 0x5341, 0x8F5C, + 0x5343, 0x90E7, 0x5345, 0x99BF, 0x5346, 0x99BE, 0x5347, 0x8FA1, + 0x5348, 0x8CDF, 0x5349, 0x99C1, 0x534A, 0x94BC, 0x534D, 0x99C2, + 0x5351, 0x94DA, 0x5352, 0x91B2, 0x5353, 0x91EC, 0x5354, 0x8BA6, + 0x5357, 0x93EC, 0x5358, 0x9250, 0x535A, 0x948E, 0x535C, 0x966D, + 0x535E, 0x99C4, 0x5360, 0x90E8, 0x5366, 0x8C54, 0x5369, 0x99C5, + 0x536E, 0x99C6, 0x536F, 0x894B, 0x5370, 0x88F3, 0x5371, 0x8AEB, + 0x5372, 0xFA8C, 0x5373, 0x91A6, 0x5374, 0x8B70, 0x5375, 0x9791, + 0x5377, 0x99C9, 0x5378, 0x89B5, 0x537B, 0x99C8, 0x537F, 0x8BA8, + 0x5382, 0x99CA, 0x5384, 0x96EF, 0x5393, 0xFA8D, 0x5396, 0x99CB, + 0x5398, 0x97D0, 0x539A, 0x8CFA, 0x539F, 0x8CB4, 0x53A0, 0x99CC, + 0x53A5, 0x99CE, 0x53A6, 0x99CD, 0x53A8, 0x907E, 0x53A9, 0x8958, + 0x53AD, 0x897D, 0x53AE, 0x99CF, 0x53B0, 0x99D0, 0x53B2, 0xFA8E, + 0x53B3, 0x8CB5, 0x53B6, 0x99D1, 0x53BB, 0x8B8E, 0x53C2, 0x8E51, + 0x53C3, 0x99D2, 0x53C8, 0x9694, 0x53C9, 0x8DB3, 0x53CA, 0x8B79, + 0x53CB, 0x9746, 0x53CC, 0x916F, 0x53CD, 0x94BD, 0x53CE, 0x8EFB, + 0x53D4, 0x8F66, 0x53D6, 0x8EE6, 0x53D7, 0x8EF3, 0x53D9, 0x8F96, + 0x53DB, 0x94BE, 0x53DD, 0xFA8F, 0x53DF, 0x99D5, 0x53E1, 0x8962, + 0x53E2, 0x9170, 0x53E3, 0x8CFB, 0x53E4, 0x8CC3, 0x53E5, 0x8BE5, + 0x53E8, 0x99D9, 0x53E9, 0x9240, 0x53EA, 0x91FC, 0x53EB, 0x8BA9, + 0x53EC, 0x8FA2, 0x53ED, 0x99DA, 0x53EE, 0x99D8, 0x53EF, 0x89C2, + 0x53F0, 0x91E4, 0x53F1, 0x8EB6, 0x53F2, 0x8E6A, 0x53F3, 0x8945, + 0x53F6, 0x8A90, 0x53F7, 0x8D86, 0x53F8, 0x8E69, 0x53FA, 0x99DB, + 0x5401, 0x99DC, 0x5403, 0x8B68, 0x5404, 0x8A65, 0x5408, 0x8D87, + 0x5409, 0x8B67, 0x540A, 0x92DD, 0x540B, 0x8944, 0x540C, 0x93AF, + 0x540D, 0x96BC, 0x540E, 0x8D40, 0x540F, 0x9799, 0x5410, 0x9366, + 0x5411, 0x8CFC, 0x541B, 0x8C4E, 0x541D, 0x99E5, 0x541F, 0x8BE1, + 0x5420, 0x9669, 0x5426, 0x94DB, 0x5429, 0x99E4, 0x542B, 0x8ADC, + 0x542C, 0x99DF, 0x542D, 0x99E0, 0x542E, 0x99E2, 0x5436, 0x99E3, + 0x5438, 0x8B7A, 0x5439, 0x9081, 0x543B, 0x95AB, 0x543C, 0x99E1, + 0x543D, 0x99DD, 0x543E, 0x8CE1, 0x5440, 0x99DE, 0x5442, 0x9843, + 0x5446, 0x95F0, 0x5448, 0x92E6, 0x5449, 0x8CE0, 0x544A, 0x8D90, + 0x544E, 0x99E6, 0x5451, 0x93DB, 0x545F, 0x99EA, 0x5468, 0x8EFC, + 0x546A, 0x8EF4, 0x5470, 0x99ED, 0x5471, 0x99EB, 0x5473, 0x96A1, + 0x5475, 0x99E8, 0x5476, 0x99F1, 0x5477, 0x99EC, 0x547B, 0x99EF, + 0x547C, 0x8CC4, 0x547D, 0x96BD, 0x5480, 0x99F0, 0x5484, 0x99F2, + 0x5486, 0x99F4, 0x548A, 0xFA92, 0x548B, 0x8DEE, 0x548C, 0x9861, + 0x548E, 0x99E9, 0x548F, 0x99E7, 0x5490, 0x99F3, 0x5492, 0x99EE, + 0x549C, 0xFA91, 0x54A2, 0x99F6, 0x54A4, 0x9A42, 0x54A5, 0x99F8, + 0x54A8, 0x99FC, 0x54A9, 0xFA93, 0x54AB, 0x9A40, 0x54AC, 0x99F9, + 0x54AF, 0x9A5D, 0x54B2, 0x8DE7, 0x54B3, 0x8A50, 0x54B8, 0x99F7, + 0x54BC, 0x9A44, 0x54BD, 0x88F4, 0x54BE, 0x9A43, 0x54C0, 0x88A3, + 0x54C1, 0x9569, 0x54C2, 0x9A41, 0x54C4, 0x99FA, 0x54C7, 0x99F5, + 0x54C8, 0x99FB, 0x54C9, 0x8DC6, 0x54D8, 0x9A45, 0x54E1, 0x88F5, + 0x54E2, 0x9A4E, 0x54E5, 0x9A46, 0x54E6, 0x9A47, 0x54E8, 0x8FA3, + 0x54E9, 0x9689, 0x54ED, 0x9A4C, 0x54EE, 0x9A4B, 0x54F2, 0x934E, + 0x54FA, 0x9A4D, 0x54FD, 0x9A4A, 0x54FF, 0xFA94, 0x5504, 0x8953, + 0x5506, 0x8DB4, 0x5507, 0x904F, 0x550F, 0x9A48, 0x5510, 0x9382, + 0x5514, 0x9A49, 0x5516, 0x88A0, 0x552E, 0x9A53, 0x552F, 0x9742, + 0x5531, 0x8FA5, 0x5533, 0x9A59, 0x5538, 0x9A58, 0x5539, 0x9A4F, + 0x553E, 0x91C1, 0x5540, 0x9A50, 0x5544, 0x91ED, 0x5545, 0x9A55, + 0x5546, 0x8FA4, 0x554C, 0x9A52, 0x554F, 0x96E2, 0x5553, 0x8C5B, + 0x5556, 0x9A56, 0x5557, 0x9A57, 0x555C, 0x9A54, 0x555D, 0x9A5A, + 0x5563, 0x9A51, 0x557B, 0x9A60, 0x557C, 0x9A65, 0x557E, 0x9A61, + 0x5580, 0x9A5C, 0x5583, 0x9A66, 0x5584, 0x9150, 0x5586, 0xFA95, + 0x5587, 0x9A68, 0x5589, 0x8D41, 0x558A, 0x9A5E, 0x558B, 0x929D, + 0x5598, 0x9A62, 0x5599, 0x9A5B, 0x559A, 0x8AAB, 0x559C, 0x8AEC, + 0x559D, 0x8A85, 0x559E, 0x9A63, 0x559F, 0x9A5F, 0x55A7, 0x8C96, + 0x55A8, 0x9A69, 0x55A9, 0x9A67, 0x55AA, 0x9172, 0x55AB, 0x8B69, + 0x55AC, 0x8BAA, 0x55AE, 0x9A64, 0x55B0, 0x8BF2, 0x55B6, 0x8963, + 0x55C4, 0x9A6D, 0x55C5, 0x9A6B, 0x55C7, 0x9AA5, 0x55D4, 0x9A70, + 0x55DA, 0x9A6A, 0x55DC, 0x9A6E, 0x55DF, 0x9A6C, 0x55E3, 0x8E6B, + 0x55E4, 0x9A6F, 0x55F7, 0x9A72, 0x55F9, 0x9A77, 0x55FD, 0x9A75, + 0x55FE, 0x9A74, 0x5606, 0x9251, 0x5609, 0x89C3, 0x5614, 0x9A71, + 0x5616, 0x9A73, 0x5617, 0x8FA6, 0x5618, 0x8952, 0x561B, 0x9A76, + 0x5629, 0x89DC, 0x562F, 0x9A82, 0x5631, 0x8FFA, 0x5632, 0x9A7D, + 0x5634, 0x9A7B, 0x5636, 0x9A7C, 0x5638, 0x9A7E, 0x5642, 0x895C, + 0x564C, 0x9158, 0x564E, 0x9A78, 0x5650, 0x9A79, 0x565B, 0x8A9A, + 0x5664, 0x9A81, 0x5668, 0x8AED, 0x566A, 0x9A84, 0x566B, 0x9A80, + 0x566C, 0x9A83, 0x5674, 0x95AC, 0x5678, 0x93D3, 0x567A, 0x94B6, + 0x5680, 0x9A86, 0x5686, 0x9A85, 0x5687, 0x8A64, 0x568A, 0x9A87, + 0x568F, 0x9A8A, 0x5694, 0x9A89, 0x56A0, 0x9A88, 0x56A2, 0x9458, + 0x56A5, 0x9A8B, 0x56AE, 0x9A8C, 0x56B4, 0x9A8E, 0x56B6, 0x9A8D, + 0x56BC, 0x9A90, 0x56C0, 0x9A93, 0x56C1, 0x9A91, 0x56C2, 0x9A8F, + 0x56C3, 0x9A92, 0x56C8, 0x9A94, 0x56CE, 0x9A95, 0x56D1, 0x9A96, + 0x56D3, 0x9A97, 0x56D7, 0x9A98, 0x56D8, 0x9964, 0x56DA, 0x8EFA, + 0x56DB, 0x8E6C, 0x56DE, 0x89F1, 0x56E0, 0x88F6, 0x56E3, 0x9263, + 0x56EE, 0x9A99, 0x56F0, 0x8DA2, 0x56F2, 0x88CD, 0x56F3, 0x907D, + 0x56F9, 0x9A9A, 0x56FA, 0x8CC5, 0x56FD, 0x8D91, 0x56FF, 0x9A9C, + 0x5700, 0x9A9B, 0x5703, 0x95DE, 0x5704, 0x9A9D, 0x5708, 0x9A9F, + 0x5709, 0x9A9E, 0x570B, 0x9AA0, 0x570D, 0x9AA1, 0x570F, 0x8C97, + 0x5712, 0x8980, 0x5713, 0x9AA2, 0x5716, 0x9AA4, 0x5718, 0x9AA3, + 0x571C, 0x9AA6, 0x571F, 0x9379, 0x5726, 0x9AA7, 0x5727, 0x88B3, + 0x5728, 0x8DDD, 0x572D, 0x8C5C, 0x5730, 0x926E, 0x5737, 0x9AA8, + 0x5738, 0x9AA9, 0x573B, 0x9AAB, 0x5740, 0x9AAC, 0x5742, 0x8DE2, + 0x5747, 0x8BCF, 0x574A, 0x9656, 0x574E, 0x9AAA, 0x574F, 0x9AAD, + 0x5750, 0x8DBF, 0x5751, 0x8D42, 0x5759, 0xFA96, 0x5761, 0x9AB1, + 0x5764, 0x8DA3, 0x5765, 0xFA97, 0x5766, 0x9252, 0x5769, 0x9AAE, + 0x576A, 0x92D8, 0x577F, 0x9AB2, 0x5782, 0x9082, 0x5788, 0x9AB0, + 0x5789, 0x9AB3, 0x578B, 0x8C5E, 0x5793, 0x9AB4, 0x57A0, 0x9AB5, + 0x57A2, 0x8D43, 0x57A3, 0x8A5F, 0x57A4, 0x9AB7, 0x57AA, 0x9AB8, + 0x57AC, 0xFA98, 0x57B0, 0x9AB9, 0x57B3, 0x9AB6, 0x57C0, 0x9AAF, + 0x57C3, 0x9ABA, 0x57C6, 0x9ABB, 0x57C7, 0xFA9A, 0x57C8, 0xFA99, + 0x57CB, 0x9684, 0x57CE, 0x8FE9, 0x57D2, 0x9ABD, 0x57D3, 0x9ABE, + 0x57D4, 0x9ABC, 0x57D6, 0x9AC0, 0x57DC, 0x9457, 0x57DF, 0x88E6, + 0x57E0, 0x9575, 0x57E3, 0x9AC1, 0x57F4, 0x8FFB, 0x57F7, 0x8EB7, + 0x57F9, 0x947C, 0x57FA, 0x8AEE, 0x57FC, 0x8DE9, 0x5800, 0x9678, + 0x5802, 0x93B0, 0x5805, 0x8C98, 0x5806, 0x91CD, 0x580A, 0x9ABF, + 0x580B, 0x9AC2, 0x5815, 0x91C2, 0x5819, 0x9AC3, 0x581D, 0x9AC4, + 0x5821, 0x9AC6, 0x5824, 0x92E7, 0x582A, 0x8AAC, 0x582F, 0xEA9F, + 0x5830, 0x8981, 0x5831, 0x95F1, 0x5834, 0x8FEA, 0x5835, 0x9367, + 0x583A, 0x8DE4, 0x583D, 0x9ACC, 0x5840, 0x95BB, 0x5841, 0x97DB, + 0x584A, 0x89F2, 0x584B, 0x9AC8, 0x5851, 0x9159, 0x5852, 0x9ACB, + 0x5854, 0x9383, 0x5857, 0x9368, 0x5858, 0x9384, 0x5859, 0x94B7, + 0x585A, 0x92CB, 0x585E, 0x8DC7, 0x5862, 0x9AC7, 0x5869, 0x8996, + 0x586B, 0x9355, 0x5870, 0x9AC9, 0x5872, 0x9AC5, 0x5875, 0x906F, + 0x5879, 0x9ACD, 0x587E, 0x8F6D, 0x5883, 0x8BAB, 0x5885, 0x9ACE, + 0x5893, 0x95E6, 0x5897, 0x919D, 0x589C, 0x92C4, 0x589E, 0xFA9D, + 0x589F, 0x9AD0, 0x58A8, 0x966E, 0x58AB, 0x9AD1, 0x58AE, 0x9AD6, + 0x58B2, 0xFA9E, 0x58B3, 0x95AD, 0x58B8, 0x9AD5, 0x58B9, 0x9ACF, + 0x58BA, 0x9AD2, 0x58BB, 0x9AD4, 0x58BE, 0x8DA4, 0x58C1, 0x95C7, + 0x58C5, 0x9AD7, 0x58C7, 0x9264, 0x58CA, 0x89F3, 0x58CC, 0x8FEB, + 0x58D1, 0x9AD9, 0x58D3, 0x9AD8, 0x58D5, 0x8D88, 0x58D7, 0x9ADA, + 0x58D8, 0x9ADC, 0x58D9, 0x9ADB, 0x58DC, 0x9ADE, 0x58DE, 0x9AD3, + 0x58DF, 0x9AE0, 0x58E4, 0x9ADF, 0x58E5, 0x9ADD, 0x58EB, 0x8E6D, + 0x58EC, 0x9070, 0x58EE, 0x9173, 0x58EF, 0x9AE1, 0x58F0, 0x90BA, + 0x58F1, 0x88EB, 0x58F2, 0x9484, 0x58F7, 0x92D9, 0x58F9, 0x9AE3, + 0x58FA, 0x9AE2, 0x58FB, 0x9AE4, 0x58FC, 0x9AE5, 0x58FD, 0x9AE6, + 0x5902, 0x9AE7, 0x5909, 0x95CF, 0x590A, 0x9AE8, 0x590B, 0xFA9F, + 0x590F, 0x89C4, 0x5910, 0x9AE9, 0x5915, 0x975B, 0x5916, 0x8A4F, + 0x5918, 0x99C7, 0x5919, 0x8F67, 0x591A, 0x91BD, 0x591B, 0x9AEA, + 0x591C, 0x96E9, 0x5922, 0x96B2, 0x5925, 0x9AEC, 0x5927, 0x91E5, + 0x5929, 0x9356, 0x592A, 0x91BE, 0x592B, 0x9576, 0x592C, 0x9AED, + 0x592D, 0x9AEE, 0x592E, 0x899B, 0x5931, 0x8EB8, 0x5932, 0x9AEF, + 0x5937, 0x88CE, 0x5938, 0x9AF0, 0x593E, 0x9AF1, 0x5944, 0x8982, + 0x5947, 0x8AEF, 0x5948, 0x93DE, 0x5949, 0x95F2, 0x594E, 0x9AF5, + 0x594F, 0x9174, 0x5950, 0x9AF4, 0x5951, 0x8C5F, 0x5953, 0xFAA0, + 0x5954, 0x967A, 0x5955, 0x9AF3, 0x5957, 0x9385, 0x5958, 0x9AF7, + 0x595A, 0x9AF6, 0x595B, 0xFAA1, 0x595D, 0xFAA2, 0x5960, 0x9AF9, + 0x5962, 0x9AF8, 0x5963, 0xFAA3, 0x5965, 0x899C, 0x5967, 0x9AFA, + 0x5968, 0x8FA7, 0x5969, 0x9AFC, 0x596A, 0x9244, 0x596C, 0x9AFB, + 0x596E, 0x95B1, 0x5973, 0x8F97, 0x5974, 0x937A, 0x5978, 0x9B40, + 0x597D, 0x8D44, 0x5981, 0x9B41, 0x5982, 0x9440, 0x5983, 0x94DC, + 0x5984, 0x96CF, 0x598A, 0x9444, 0x598D, 0x9B4A, 0x5993, 0x8B57, + 0x5996, 0x9764, 0x5999, 0x96AD, 0x599B, 0x9BAA, 0x599D, 0x9B42, + 0x59A3, 0x9B45, 0x59A4, 0xFAA4, 0x59A5, 0x91C3, 0x59A8, 0x9657, + 0x59AC, 0x9369, 0x59B2, 0x9B46, 0x59B9, 0x9685, 0x59BA, 0xFAA5, + 0x59BB, 0x8DC8, 0x59BE, 0x8FA8, 0x59C6, 0x9B47, 0x59C9, 0x8E6F, + 0x59CB, 0x8E6E, 0x59D0, 0x88B7, 0x59D1, 0x8CC6, 0x59D3, 0x90A9, + 0x59D4, 0x88CF, 0x59D9, 0x9B4B, 0x59DA, 0x9B4C, 0x59DC, 0x9B49, + 0x59E5, 0x8957, 0x59E6, 0x8AAD, 0x59E8, 0x9B48, 0x59EA, 0x96C3, + 0x59EB, 0x9550, 0x59F6, 0x88A6, 0x59FB, 0x88F7, 0x59FF, 0x8E70, + 0x5A01, 0x88D0, 0x5A03, 0x88A1, 0x5A09, 0x9B51, 0x5A11, 0x9B4F, + 0x5A18, 0x96BA, 0x5A1A, 0x9B52, 0x5A1C, 0x9B50, 0x5A1F, 0x9B4E, + 0x5A20, 0x9050, 0x5A25, 0x9B4D, 0x5A29, 0x95D8, 0x5A2F, 0x8CE2, + 0x5A35, 0x9B56, 0x5A36, 0x9B57, 0x5A3C, 0x8FA9, 0x5A40, 0x9B53, + 0x5A41, 0x984B, 0x5A46, 0x946B, 0x5A49, 0x9B55, 0x5A5A, 0x8DA5, + 0x5A62, 0x9B58, 0x5A66, 0x9577, 0x5A6A, 0x9B59, 0x5A6C, 0x9B54, + 0x5A7F, 0x96B9, 0x5A92, 0x947D, 0x5A9A, 0x9B5A, 0x5A9B, 0x9551, + 0x5ABC, 0x9B5B, 0x5ABD, 0x9B5F, 0x5ABE, 0x9B5C, 0x5AC1, 0x89C5, + 0x5AC2, 0x9B5E, 0x5AC9, 0x8EB9, 0x5ACB, 0x9B5D, 0x5ACC, 0x8C99, + 0x5AD0, 0x9B6B, 0x5AD6, 0x9B64, 0x5AD7, 0x9B61, 0x5AE1, 0x9284, + 0x5AE3, 0x9B60, 0x5AE6, 0x9B62, 0x5AE9, 0x9B63, 0x5AFA, 0x9B65, + 0x5AFB, 0x9B66, 0x5B09, 0x8AF0, 0x5B0B, 0x9B68, 0x5B0C, 0x9B67, + 0x5B16, 0x9B69, 0x5B22, 0x8FEC, 0x5B2A, 0x9B6C, 0x5B2C, 0x92DA, + 0x5B30, 0x8964, 0x5B32, 0x9B6A, 0x5B36, 0x9B6D, 0x5B3E, 0x9B6E, + 0x5B40, 0x9B71, 0x5B43, 0x9B6F, 0x5B45, 0x9B70, 0x5B50, 0x8E71, + 0x5B51, 0x9B72, 0x5B54, 0x8D45, 0x5B55, 0x9B73, 0x5B56, 0xFAA6, + 0x5B57, 0x8E9A, 0x5B58, 0x91B6, 0x5B5A, 0x9B74, 0x5B5B, 0x9B75, + 0x5B5C, 0x8E79, 0x5B5D, 0x8D46, 0x5B5F, 0x96D0, 0x5B63, 0x8B47, + 0x5B64, 0x8CC7, 0x5B65, 0x9B76, 0x5B66, 0x8A77, 0x5B69, 0x9B77, + 0x5B6B, 0x91B7, 0x5B70, 0x9B78, 0x5B71, 0x9BA1, 0x5B73, 0x9B79, + 0x5B75, 0x9B7A, 0x5B78, 0x9B7B, 0x5B7A, 0x9B7D, 0x5B80, 0x9B7E, + 0x5B83, 0x9B80, 0x5B85, 0x91EE, 0x5B87, 0x8946, 0x5B88, 0x8EE7, + 0x5B89, 0x88C0, 0x5B8B, 0x9176, 0x5B8C, 0x8AAE, 0x5B8D, 0x8EB3, + 0x5B8F, 0x8D47, 0x5B95, 0x9386, 0x5B97, 0x8F40, 0x5B98, 0x8AAF, + 0x5B99, 0x9288, 0x5B9A, 0x92E8, 0x5B9B, 0x88B6, 0x5B9C, 0x8B58, + 0x5B9D, 0x95F3, 0x5B9F, 0x8EC0, 0x5BA2, 0x8B71, 0x5BA3, 0x90E9, + 0x5BA4, 0x8EBA, 0x5BA5, 0x9747, 0x5BA6, 0x9B81, 0x5BAE, 0x8B7B, + 0x5BB0, 0x8DC9, 0x5BB3, 0x8A51, 0x5BB4, 0x8983, 0x5BB5, 0x8FAA, + 0x5BB6, 0x89C6, 0x5BB8, 0x9B82, 0x5BB9, 0x9765, 0x5BBF, 0x8F68, + 0x5BC0, 0xFAA7, 0x5BC2, 0x8EE2, 0x5BC3, 0x9B83, 0x5BC4, 0x8AF1, + 0x5BC5, 0x93D0, 0x5BC6, 0x96A7, 0x5BC7, 0x9B84, 0x5BC9, 0x9B85, + 0x5BCC, 0x9578, 0x5BD0, 0x9B87, 0x5BD2, 0x8AA6, 0x5BD3, 0x8BF5, + 0x5BD4, 0x9B86, 0x5BD8, 0xFAA9, 0x5BDB, 0x8AB0, 0x5BDD, 0x9051, + 0x5BDE, 0x9B8B, 0x5BDF, 0x8E40, 0x5BE1, 0x89C7, 0x5BE2, 0x9B8A, + 0x5BE4, 0x9B88, 0x5BE5, 0x9B8C, 0x5BE6, 0x9B89, 0x5BE7, 0x944A, + 0x5BE8, 0x9ECB, 0x5BE9, 0x9052, 0x5BEB, 0x9B8D, 0x5BEC, 0xFAAA, + 0x5BEE, 0x97BE, 0x5BF0, 0x9B8E, 0x5BF3, 0x9B90, 0x5BF5, 0x929E, + 0x5BF6, 0x9B8F, 0x5BF8, 0x90A1, 0x5BFA, 0x8E9B, 0x5BFE, 0x91CE, + 0x5BFF, 0x8EF5, 0x5C01, 0x9595, 0x5C02, 0x90EA, 0x5C04, 0x8ECB, + 0x5C05, 0x9B91, 0x5C06, 0x8FAB, 0x5C07, 0x9B92, 0x5C08, 0x9B93, + 0x5C09, 0x88D1, 0x5C0A, 0x91B8, 0x5C0B, 0x9071, 0x5C0D, 0x9B94, + 0x5C0E, 0x93B1, 0x5C0F, 0x8FAC, 0x5C11, 0x8FAD, 0x5C13, 0x9B95, + 0x5C16, 0x90EB, 0x5C1A, 0x8FAE, 0x5C1E, 0xFAAB, 0x5C20, 0x9B96, + 0x5C22, 0x9B97, 0x5C24, 0x96DE, 0x5C28, 0x9B98, 0x5C2D, 0x8BC4, + 0x5C31, 0x8F41, 0x5C38, 0x9B99, 0x5C39, 0x9B9A, 0x5C3A, 0x8EDA, + 0x5C3B, 0x904B, 0x5C3C, 0x93F2, 0x5C3D, 0x9073, 0x5C3E, 0x94F6, + 0x5C3F, 0x9441, 0x5C40, 0x8BC7, 0x5C41, 0x9B9B, 0x5C45, 0x8B8F, + 0x5C46, 0x9B9C, 0x5C48, 0x8BFC, 0x5C4A, 0x93CD, 0x5C4B, 0x89AE, + 0x5C4D, 0x8E72, 0x5C4E, 0x9B9D, 0x5C4F, 0x9BA0, 0x5C50, 0x9B9F, + 0x5C51, 0x8BFB, 0x5C53, 0x9B9E, 0x5C55, 0x9357, 0x5C5E, 0x91AE, + 0x5C60, 0x936A, 0x5C61, 0x8EC6, 0x5C64, 0x9177, 0x5C65, 0x979A, + 0x5C6C, 0x9BA2, 0x5C6E, 0x9BA3, 0x5C6F, 0x93D4, 0x5C71, 0x8E52, + 0x5C76, 0x9BA5, 0x5C79, 0x9BA6, 0x5C8C, 0x9BA7, 0x5C90, 0x8AF2, + 0x5C91, 0x9BA8, 0x5C94, 0x9BA9, 0x5CA1, 0x89AA, 0x5CA6, 0xFAAC, + 0x5CA8, 0x915A, 0x5CA9, 0x8AE2, 0x5CAB, 0x9BAB, 0x5CAC, 0x96A6, + 0x5CB1, 0x91D0, 0x5CB3, 0x8A78, 0x5CB6, 0x9BAD, 0x5CB7, 0x9BAF, + 0x5CB8, 0x8ADD, 0x5CBA, 0xFAAD, 0x5CBB, 0x9BAC, 0x5CBC, 0x9BAE, + 0x5CBE, 0x9BB1, 0x5CC5, 0x9BB0, 0x5CC7, 0x9BB2, 0x5CD9, 0x9BB3, + 0x5CE0, 0x93BB, 0x5CE1, 0x8BAC, 0x5CE8, 0x89E3, 0x5CE9, 0x9BB4, + 0x5CEA, 0x9BB9, 0x5CED, 0x9BB7, 0x5CEF, 0x95F5, 0x5CF0, 0x95F4, + 0x5CF5, 0xFAAE, 0x5CF6, 0x9387, 0x5CFA, 0x9BB6, 0x5CFB, 0x8F73, + 0x5CFD, 0x9BB5, 0x5D07, 0x9092, 0x5D0B, 0x9BBA, 0x5D0E, 0x8DE8, + 0x5D11, 0x9BC0, 0x5D14, 0x9BC1, 0x5D15, 0x9BBB, 0x5D16, 0x8A52, + 0x5D17, 0x9BBC, 0x5D18, 0x9BC5, 0x5D19, 0x9BC4, 0x5D1A, 0x9BC3, + 0x5D1B, 0x9BBF, 0x5D1F, 0x9BBE, 0x5D22, 0x9BC2, 0x5D27, 0xFAAF, + 0x5D29, 0x95F6, 0x5D42, 0xFAB2, 0x5D4B, 0x9BC9, 0x5D4C, 0x9BC6, + 0x5D4E, 0x9BC8, 0x5D50, 0x9792, 0x5D52, 0x9BC7, 0x5D53, 0xFAB0, + 0x5D5C, 0x9BBD, 0x5D69, 0x9093, 0x5D6C, 0x9BCA, 0x5D6D, 0xFAB3, + 0x5D6F, 0x8DB5, 0x5D73, 0x9BCB, 0x5D76, 0x9BCC, 0x5D82, 0x9BCF, + 0x5D84, 0x9BCE, 0x5D87, 0x9BCD, 0x5D8B, 0x9388, 0x5D8C, 0x9BB8, + 0x5D90, 0x9BD5, 0x5D9D, 0x9BD1, 0x5DA2, 0x9BD0, 0x5DAC, 0x9BD2, + 0x5DAE, 0x9BD3, 0x5DB7, 0x9BD6, 0x5DB8, 0xFAB4, 0x5DB9, 0xFAB5, + 0x5DBA, 0x97E4, 0x5DBC, 0x9BD7, 0x5DBD, 0x9BD4, 0x5DC9, 0x9BD8, + 0x5DCC, 0x8ADE, 0x5DCD, 0x9BD9, 0x5DD0, 0xFAB6, 0x5DD2, 0x9BDB, + 0x5DD3, 0x9BDA, 0x5DD6, 0x9BDC, 0x5DDB, 0x9BDD, 0x5DDD, 0x90EC, + 0x5DDE, 0x8F42, 0x5DE1, 0x8F84, 0x5DE3, 0x9183, 0x5DE5, 0x8D48, + 0x5DE6, 0x8DB6, 0x5DE7, 0x8D49, 0x5DE8, 0x8B90, 0x5DEB, 0x9BDE, + 0x5DEE, 0x8DB7, 0x5DF1, 0x8CC8, 0x5DF2, 0x9BDF, 0x5DF3, 0x96A4, + 0x5DF4, 0x9462, 0x5DF5, 0x9BE0, 0x5DF7, 0x8D4A, 0x5DFB, 0x8AAA, + 0x5DFD, 0x9246, 0x5DFE, 0x8BD0, 0x5E02, 0x8E73, 0x5E03, 0x957A, + 0x5E06, 0x94BF, 0x5E0B, 0x9BE1, 0x5E0C, 0x8AF3, 0x5E11, 0x9BE4, + 0x5E16, 0x929F, 0x5E19, 0x9BE3, 0x5E1A, 0x9BE2, 0x5E1B, 0x9BE5, + 0x5E1D, 0x92E9, 0x5E25, 0x9083, 0x5E2B, 0x8E74, 0x5E2D, 0x90C8, + 0x5E2F, 0x91D1, 0x5E30, 0x8B41, 0x5E33, 0x92A0, 0x5E36, 0x9BE6, + 0x5E37, 0x9BE7, 0x5E38, 0x8FED, 0x5E3D, 0x9658, 0x5E40, 0x9BEA, + 0x5E43, 0x9BE9, 0x5E44, 0x9BE8, 0x5E45, 0x959D, 0x5E47, 0x9BF1, + 0x5E4C, 0x9679, 0x5E4E, 0x9BEB, 0x5E54, 0x9BED, 0x5E55, 0x968B, + 0x5E57, 0x9BEC, 0x5E5F, 0x9BEE, 0x5E61, 0x94A6, 0x5E62, 0x9BEF, + 0x5E63, 0x95BC, 0x5E64, 0x9BF0, 0x5E72, 0x8AB1, 0x5E73, 0x95BD, + 0x5E74, 0x944E, 0x5E75, 0x9BF2, 0x5E76, 0x9BF3, 0x5E78, 0x8D4B, + 0x5E79, 0x8AB2, 0x5E7A, 0x9BF4, 0x5E7B, 0x8CB6, 0x5E7C, 0x9763, + 0x5E7D, 0x9748, 0x5E7E, 0x8AF4, 0x5E7F, 0x9BF6, 0x5E81, 0x92A1, + 0x5E83, 0x8D4C, 0x5E84, 0x8FAF, 0x5E87, 0x94DD, 0x5E8A, 0x8FB0, + 0x5E8F, 0x8F98, 0x5E95, 0x92EA, 0x5E96, 0x95F7, 0x5E97, 0x9358, + 0x5E9A, 0x8D4D, 0x5E9C, 0x957B, 0x5EA0, 0x9BF7, 0x5EA6, 0x9378, + 0x5EA7, 0x8DC0, 0x5EAB, 0x8CC9, 0x5EAD, 0x92EB, 0x5EB5, 0x88C1, + 0x5EB6, 0x8F8E, 0x5EB7, 0x8D4E, 0x5EB8, 0x9766, 0x5EC1, 0x9BF8, + 0x5EC2, 0x9BF9, 0x5EC3, 0x9470, 0x5EC8, 0x9BFA, 0x5EC9, 0x97F5, + 0x5ECA, 0x984C, 0x5ECF, 0x9BFC, 0x5ED0, 0x9BFB, 0x5ED3, 0x8A66, + 0x5ED6, 0x9C40, 0x5EDA, 0x9C43, 0x5EDB, 0x9C44, 0x5EDD, 0x9C42, + 0x5EDF, 0x955F, 0x5EE0, 0x8FB1, 0x5EE1, 0x9C46, 0x5EE2, 0x9C45, + 0x5EE3, 0x9C41, 0x5EE8, 0x9C47, 0x5EE9, 0x9C48, 0x5EEC, 0x9C49, + 0x5EF0, 0x9C4C, 0x5EF1, 0x9C4A, 0x5EF3, 0x9C4B, 0x5EF4, 0x9C4D, + 0x5EF6, 0x8984, 0x5EF7, 0x92EC, 0x5EF8, 0x9C4E, 0x5EFA, 0x8C9A, + 0x5EFB, 0x89F4, 0x5EFC, 0x9455, 0x5EFE, 0x9C4F, 0x5EFF, 0x93F9, + 0x5F01, 0x95D9, 0x5F03, 0x9C50, 0x5F04, 0x984D, 0x5F09, 0x9C51, + 0x5F0A, 0x95BE, 0x5F0B, 0x9C54, 0x5F0C, 0x989F, 0x5F0D, 0x98AF, + 0x5F0F, 0x8EAE, 0x5F10, 0x93F3, 0x5F11, 0x9C55, 0x5F13, 0x8B7C, + 0x5F14, 0x92A2, 0x5F15, 0x88F8, 0x5F16, 0x9C56, 0x5F17, 0x95A4, + 0x5F18, 0x8D4F, 0x5F1B, 0x926F, 0x5F1F, 0x92ED, 0x5F21, 0xFAB7, + 0x5F25, 0x96ED, 0x5F26, 0x8CB7, 0x5F27, 0x8CCA, 0x5F29, 0x9C57, + 0x5F2D, 0x9C58, 0x5F2F, 0x9C5E, 0x5F31, 0x8EE3, 0x5F34, 0xFAB8, + 0x5F35, 0x92A3, 0x5F37, 0x8BAD, 0x5F38, 0x9C59, 0x5F3C, 0x954A, + 0x5F3E, 0x9265, 0x5F41, 0x9C5A, 0x5F45, 0xFA67, 0x5F48, 0x9C5B, + 0x5F4A, 0x8BAE, 0x5F4C, 0x9C5C, 0x5F4E, 0x9C5D, 0x5F51, 0x9C5F, + 0x5F53, 0x9396, 0x5F56, 0x9C60, 0x5F57, 0x9C61, 0x5F59, 0x9C62, + 0x5F5C, 0x9C53, 0x5F5D, 0x9C52, 0x5F61, 0x9C63, 0x5F62, 0x8C60, + 0x5F66, 0x9546, 0x5F67, 0xFAB9, 0x5F69, 0x8DCA, 0x5F6A, 0x9556, + 0x5F6B, 0x92A4, 0x5F6C, 0x956A, 0x5F6D, 0x9C64, 0x5F70, 0x8FB2, + 0x5F71, 0x8965, 0x5F73, 0x9C65, 0x5F77, 0x9C66, 0x5F79, 0x96F0, + 0x5F7C, 0x94DE, 0x5F7F, 0x9C69, 0x5F80, 0x899D, 0x5F81, 0x90AA, + 0x5F82, 0x9C68, 0x5F83, 0x9C67, 0x5F84, 0x8C61, 0x5F85, 0x91D2, + 0x5F87, 0x9C6D, 0x5F88, 0x9C6B, 0x5F8A, 0x9C6A, 0x5F8B, 0x97A5, + 0x5F8C, 0x8CE3, 0x5F90, 0x8F99, 0x5F91, 0x9C6C, 0x5F92, 0x936B, + 0x5F93, 0x8F5D, 0x5F97, 0x93BE, 0x5F98, 0x9C70, 0x5F99, 0x9C6F, + 0x5F9E, 0x9C6E, 0x5FA0, 0x9C71, 0x5FA1, 0x8CE4, 0x5FA8, 0x9C72, + 0x5FA9, 0x959C, 0x5FAA, 0x8F7A, 0x5FAD, 0x9C73, 0x5FAE, 0x94F7, + 0x5FB3, 0x93BF, 0x5FB4, 0x92A5, 0x5FB7, 0xFABA, 0x5FB9, 0x934F, + 0x5FBC, 0x9C74, 0x5FBD, 0x8B4A, 0x5FC3, 0x9053, 0x5FC5, 0x954B, + 0x5FCC, 0x8AF5, 0x5FCD, 0x9445, 0x5FD6, 0x9C75, 0x5FD7, 0x8E75, + 0x5FD8, 0x9659, 0x5FD9, 0x965A, 0x5FDC, 0x899E, 0x5FDD, 0x9C7A, + 0x5FDE, 0xFABB, 0x5FE0, 0x9289, 0x5FE4, 0x9C77, 0x5FEB, 0x89F5, + 0x5FF0, 0x9CAB, 0x5FF1, 0x9C79, 0x5FF5, 0x944F, 0x5FF8, 0x9C78, + 0x5FFB, 0x9C76, 0x5FFD, 0x8D9A, 0x5FFF, 0x9C7C, 0x600E, 0x9C83, + 0x600F, 0x9C89, 0x6010, 0x9C81, 0x6012, 0x937B, 0x6015, 0x9C86, + 0x6016, 0x957C, 0x6019, 0x9C80, 0x601B, 0x9C85, 0x601C, 0x97E5, + 0x601D, 0x8E76, 0x6020, 0x91D3, 0x6021, 0x9C7D, 0x6025, 0x8B7D, + 0x6026, 0x9C88, 0x6027, 0x90AB, 0x6028, 0x8985, 0x6029, 0x9C82, + 0x602A, 0x89F6, 0x602B, 0x9C87, 0x602F, 0x8BAF, 0x6031, 0x9C84, + 0x603A, 0x9C8A, 0x6041, 0x9C8C, 0x6042, 0x9C96, 0x6043, 0x9C94, + 0x6046, 0x9C91, 0x604A, 0x9C90, 0x604B, 0x97F6, 0x604D, 0x9C92, + 0x6050, 0x8BB0, 0x6052, 0x8D50, 0x6055, 0x8F9A, 0x6059, 0x9C99, + 0x605A, 0x9C8B, 0x605D, 0xFABC, 0x605F, 0x9C8F, 0x6060, 0x9C7E, + 0x6062, 0x89F8, 0x6063, 0x9C93, 0x6064, 0x9C95, 0x6065, 0x9270, + 0x6068, 0x8DA6, 0x6069, 0x89B6, 0x606A, 0x9C8D, 0x606B, 0x9C98, + 0x606C, 0x9C97, 0x606D, 0x8BB1, 0x606F, 0x91A7, 0x6070, 0x8A86, + 0x6075, 0x8C62, 0x6077, 0x9C8E, 0x6081, 0x9C9A, 0x6083, 0x9C9D, + 0x6084, 0x9C9F, 0x6085, 0xFABD, 0x6089, 0x8EBB, 0x608A, 0xFABE, + 0x608B, 0x9CA5, 0x608C, 0x92EE, 0x608D, 0x9C9B, 0x6092, 0x9CA3, + 0x6094, 0x89F7, 0x6096, 0x9CA1, 0x6097, 0x9CA2, 0x609A, 0x9C9E, + 0x609B, 0x9CA0, 0x609F, 0x8CE5, 0x60A0, 0x9749, 0x60A3, 0x8AB3, + 0x60A6, 0x8978, 0x60A7, 0x9CA4, 0x60A9, 0x9459, 0x60AA, 0x88AB, + 0x60B2, 0x94DF, 0x60B3, 0x9C7B, 0x60B4, 0x9CAA, 0x60B5, 0x9CAE, + 0x60B6, 0x96E3, 0x60B8, 0x9CA7, 0x60BC, 0x9389, 0x60BD, 0x9CAC, + 0x60C5, 0x8FEE, 0x60C6, 0x9CAD, 0x60C7, 0x93D5, 0x60D1, 0x9866, + 0x60D3, 0x9CA9, 0x60D5, 0xFAC0, 0x60D8, 0x9CAF, 0x60DA, 0x8D9B, + 0x60DC, 0x90C9, 0x60DE, 0xFABF, 0x60DF, 0x88D2, 0x60E0, 0x9CA8, + 0x60E1, 0x9CA6, 0x60E3, 0x9179, 0x60E7, 0x9C9C, 0x60E8, 0x8E53, + 0x60F0, 0x91C4, 0x60F1, 0x9CBB, 0x60F2, 0xFAC2, 0x60F3, 0x917A, + 0x60F4, 0x9CB6, 0x60F6, 0x9CB3, 0x60F7, 0x9CB4, 0x60F9, 0x8EE4, + 0x60FA, 0x9CB7, 0x60FB, 0x9CBA, 0x6100, 0x9CB5, 0x6101, 0x8F44, + 0x6103, 0x9CB8, 0x6106, 0x9CB2, 0x6108, 0x96FA, 0x6109, 0x96F9, + 0x610D, 0x9CBC, 0x610E, 0x9CBD, 0x610F, 0x88D3, 0x6111, 0xFAC3, + 0x6115, 0x9CB1, 0x611A, 0x8BF0, 0x611B, 0x88A4, 0x611F, 0x8AB4, + 0x6120, 0xFAC1, 0x6121, 0x9CB9, 0x6127, 0x9CC1, 0x6128, 0x9CC0, + 0x612C, 0x9CC5, 0x6130, 0xFAC5, 0x6134, 0x9CC6, 0x6137, 0xFAC4, + 0x613C, 0x9CC4, 0x613D, 0x9CC7, 0x613E, 0x9CBF, 0x613F, 0x9CC3, + 0x6142, 0x9CC8, 0x6144, 0x9CC9, 0x6147, 0x9CBE, 0x6148, 0x8E9C, + 0x614A, 0x9CC2, 0x614B, 0x91D4, 0x614C, 0x8D51, 0x614D, 0x9CB0, + 0x614E, 0x9054, 0x6153, 0x9CD6, 0x6155, 0x95E7, 0x6158, 0x9CCC, + 0x6159, 0x9CCD, 0x615A, 0x9CCE, 0x615D, 0x9CD5, 0x615F, 0x9CD4, + 0x6162, 0x969D, 0x6163, 0x8AB5, 0x6165, 0x9CD2, 0x6167, 0x8C64, + 0x6168, 0x8A53, 0x616B, 0x9CCF, 0x616E, 0x97B6, 0x616F, 0x9CD1, + 0x6170, 0x88D4, 0x6171, 0x9CD3, 0x6173, 0x9CCA, 0x6174, 0x9CD0, + 0x6175, 0x9CD7, 0x6176, 0x8C63, 0x6177, 0x9CCB, 0x617E, 0x977C, + 0x6182, 0x974A, 0x6187, 0x9CDA, 0x618A, 0x9CDE, 0x618E, 0x919E, + 0x6190, 0x97F7, 0x6191, 0x9CDF, 0x6194, 0x9CDC, 0x6196, 0x9CD9, + 0x6198, 0xFAC6, 0x6199, 0x9CD8, 0x619A, 0x9CDD, 0x61A4, 0x95AE, + 0x61A7, 0x93B2, 0x61A9, 0x8C65, 0x61AB, 0x9CE0, 0x61AC, 0x9CDB, + 0x61AE, 0x9CE1, 0x61B2, 0x8C9B, 0x61B6, 0x89AF, 0x61BA, 0x9CE9, + 0x61BE, 0x8AB6, 0x61C3, 0x9CE7, 0x61C6, 0x9CE8, 0x61C7, 0x8DA7, + 0x61C8, 0x9CE6, 0x61C9, 0x9CE4, 0x61CA, 0x9CE3, 0x61CB, 0x9CEA, + 0x61CC, 0x9CE2, 0x61CD, 0x9CEC, 0x61D0, 0x89F9, 0x61E3, 0x9CEE, + 0x61E6, 0x9CED, 0x61F2, 0x92A6, 0x61F4, 0x9CF1, 0x61F6, 0x9CEF, + 0x61F7, 0x9CE5, 0x61F8, 0x8C9C, 0x61FA, 0x9CF0, 0x61FC, 0x9CF4, + 0x61FD, 0x9CF3, 0x61FE, 0x9CF5, 0x61FF, 0x9CF2, 0x6200, 0x9CF6, + 0x6208, 0x9CF7, 0x6209, 0x9CF8, 0x620A, 0x95E8, 0x620C, 0x9CFA, + 0x620D, 0x9CF9, 0x620E, 0x8F5E, 0x6210, 0x90AC, 0x6211, 0x89E4, + 0x6212, 0x89FA, 0x6213, 0xFAC7, 0x6214, 0x9CFB, 0x6216, 0x88BD, + 0x621A, 0x90CA, 0x621B, 0x9CFC, 0x621D, 0xE6C1, 0x621E, 0x9D40, + 0x621F, 0x8C81, 0x6221, 0x9D41, 0x6226, 0x90ED, 0x622A, 0x9D42, + 0x622E, 0x9D43, 0x622F, 0x8B59, 0x6230, 0x9D44, 0x6232, 0x9D45, + 0x6233, 0x9D46, 0x6234, 0x91D5, 0x6238, 0x8CCB, 0x623B, 0x96DF, + 0x623F, 0x965B, 0x6240, 0x8F8A, 0x6241, 0x9D47, 0x6247, 0x90EE, + 0x6248, 0xE7BB, 0x6249, 0x94E0, 0x624B, 0x8EE8, 0x624D, 0x8DCB, + 0x624E, 0x9D48, 0x6253, 0x91C5, 0x6255, 0x95A5, 0x6258, 0x91EF, + 0x625B, 0x9D4B, 0x625E, 0x9D49, 0x6260, 0x9D4C, 0x6263, 0x9D4A, + 0x6268, 0x9D4D, 0x626E, 0x95AF, 0x6271, 0x88B5, 0x6276, 0x957D, + 0x6279, 0x94E1, 0x627C, 0x9D4E, 0x627E, 0x9D51, 0x627F, 0x8FB3, + 0x6280, 0x8B5A, 0x6282, 0x9D4F, 0x6283, 0x9D56, 0x6284, 0x8FB4, + 0x6289, 0x9D50, 0x628A, 0x9463, 0x6291, 0x977D, 0x6292, 0x9D52, + 0x6293, 0x9D53, 0x6294, 0x9D57, 0x6295, 0x938A, 0x6296, 0x9D54, + 0x6297, 0x8D52, 0x6298, 0x90DC, 0x629B, 0x9D65, 0x629C, 0x94B2, + 0x629E, 0x91F0, 0x62A6, 0xFAC8, 0x62AB, 0x94E2, 0x62AC, 0x9DAB, + 0x62B1, 0x95F8, 0x62B5, 0x92EF, 0x62B9, 0x9695, 0x62BB, 0x9D5A, + 0x62BC, 0x899F, 0x62BD, 0x928A, 0x62C2, 0x9D63, 0x62C5, 0x9253, + 0x62C6, 0x9D5D, 0x62C7, 0x9D64, 0x62C8, 0x9D5F, 0x62C9, 0x9D66, + 0x62CA, 0x9D62, 0x62CC, 0x9D61, 0x62CD, 0x948F, 0x62CF, 0x9D5B, + 0x62D0, 0x89FB, 0x62D1, 0x9D59, 0x62D2, 0x8B91, 0x62D3, 0x91F1, + 0x62D4, 0x9D55, 0x62D7, 0x9D58, 0x62D8, 0x8D53, 0x62D9, 0x90D9, + 0x62DB, 0x8FB5, 0x62DC, 0x9D60, 0x62DD, 0x9471, 0x62E0, 0x8B92, + 0x62E1, 0x8A67, 0x62EC, 0x8A87, 0x62ED, 0x9040, 0x62EE, 0x9D68, + 0x62EF, 0x9D6D, 0x62F1, 0x9D69, 0x62F3, 0x8C9D, 0x62F5, 0x9D6E, + 0x62F6, 0x8E41, 0x62F7, 0x8D89, 0x62FE, 0x8F45, 0x62FF, 0x9D5C, + 0x6301, 0x8E9D, 0x6302, 0x9D6B, 0x6307, 0x8E77, 0x6308, 0x9D6C, + 0x6309, 0x88C2, 0x630C, 0x9D67, 0x6311, 0x92A7, 0x6319, 0x8B93, + 0x631F, 0x8BB2, 0x6327, 0x9D6A, 0x6328, 0x88A5, 0x632B, 0x8DC1, + 0x632F, 0x9055, 0x633A, 0x92F0, 0x633D, 0x94D2, 0x633E, 0x9D70, + 0x633F, 0x917D, 0x6349, 0x91A8, 0x634C, 0x8E4A, 0x634D, 0x9D71, + 0x634F, 0x9D73, 0x6350, 0x9D6F, 0x6355, 0x95DF, 0x6357, 0x92BB, + 0x635C, 0x917B, 0x6367, 0x95F9, 0x6368, 0x8ECC, 0x6369, 0x9D80, + 0x636B, 0x9D7E, 0x636E, 0x9098, 0x6372, 0x8C9E, 0x6376, 0x9D78, + 0x6377, 0x8FB7, 0x637A, 0x93E6, 0x637B, 0x9450, 0x6380, 0x9D76, + 0x6383, 0x917C, 0x6388, 0x8EF6, 0x6389, 0x9D7B, 0x638C, 0x8FB6, + 0x638E, 0x9D75, 0x638F, 0x9D7A, 0x6392, 0x9472, 0x6396, 0x9D74, + 0x6398, 0x8C40, 0x639B, 0x8A7C, 0x639F, 0x9D7C, 0x63A0, 0x97A9, + 0x63A1, 0x8DCC, 0x63A2, 0x9254, 0x63A3, 0x9D79, 0x63A5, 0x90DA, + 0x63A7, 0x8D54, 0x63A8, 0x9084, 0x63A9, 0x8986, 0x63AA, 0x915B, + 0x63AB, 0x9D77, 0x63AC, 0x8B64, 0x63B2, 0x8C66, 0x63B4, 0x92CD, + 0x63B5, 0x9D7D, 0x63BB, 0x917E, 0x63BE, 0x9D81, 0x63C0, 0x9D83, + 0x63C3, 0x91B5, 0x63C4, 0x9D89, 0x63C6, 0x9D84, 0x63C9, 0x9D86, + 0x63CF, 0x9560, 0x63D0, 0x92F1, 0x63D2, 0x9D87, 0x63D6, 0x974B, + 0x63DA, 0x9767, 0x63DB, 0x8AB7, 0x63E1, 0x88AC, 0x63E3, 0x9D85, + 0x63E9, 0x9D82, 0x63EE, 0x8AF6, 0x63F4, 0x8987, 0x63F5, 0xFAC9, + 0x63F6, 0x9D88, 0x63FA, 0x9768, 0x6406, 0x9D8C, 0x640D, 0x91B9, + 0x640F, 0x9D93, 0x6413, 0x9D8D, 0x6416, 0x9D8A, 0x6417, 0x9D91, + 0x641C, 0x9D72, 0x6426, 0x9D8E, 0x6428, 0x9D92, 0x642C, 0x94C0, + 0x642D, 0x938B, 0x6434, 0x9D8B, 0x6436, 0x9D8F, 0x643A, 0x8C67, + 0x643E, 0x8DEF, 0x6442, 0x90DB, 0x644E, 0x9D97, 0x6458, 0x9345, + 0x6460, 0xFACA, 0x6467, 0x9D94, 0x6469, 0x9680, 0x646F, 0x9D95, + 0x6476, 0x9D96, 0x6478, 0x96CC, 0x647A, 0x90A0, 0x6483, 0x8C82, + 0x6488, 0x9D9D, 0x6492, 0x8E54, 0x6493, 0x9D9A, 0x6495, 0x9D99, + 0x649A, 0x9451, 0x649D, 0xFACB, 0x649E, 0x93B3, 0x64A4, 0x9350, + 0x64A5, 0x9D9B, 0x64A9, 0x9D9C, 0x64AB, 0x958F, 0x64AD, 0x9464, + 0x64AE, 0x8E42, 0x64B0, 0x90EF, 0x64B2, 0x966F, 0x64B9, 0x8A68, + 0x64BB, 0x9DA3, 0x64BC, 0x9D9E, 0x64C1, 0x9769, 0x64C2, 0x9DA5, + 0x64C5, 0x9DA1, 0x64C7, 0x9DA2, 0x64CD, 0x9180, 0x64CE, 0xFACC, + 0x64D2, 0x9DA0, 0x64D4, 0x9D5E, 0x64D8, 0x9DA4, 0x64DA, 0x9D9F, + 0x64E0, 0x9DA9, 0x64E1, 0x9DAA, 0x64E2, 0x9346, 0x64E3, 0x9DAC, + 0x64E6, 0x8E43, 0x64E7, 0x9DA7, 0x64EC, 0x8B5B, 0x64EF, 0x9DAD, + 0x64F1, 0x9DA6, 0x64F2, 0x9DB1, 0x64F4, 0x9DB0, 0x64F6, 0x9DAF, + 0x64FA, 0x9DB2, 0x64FD, 0x9DB4, 0x64FE, 0x8FEF, 0x6500, 0x9DB3, + 0x6505, 0x9DB7, 0x6518, 0x9DB5, 0x651C, 0x9DB6, 0x651D, 0x9D90, + 0x6523, 0x9DB9, 0x6524, 0x9DB8, 0x652A, 0x9D98, 0x652B, 0x9DBA, + 0x652C, 0x9DAE, 0x652F, 0x8E78, 0x6534, 0x9DBB, 0x6535, 0x9DBC, + 0x6536, 0x9DBE, 0x6537, 0x9DBD, 0x6538, 0x9DBF, 0x6539, 0x89FC, + 0x653B, 0x8D55, 0x653E, 0x95FA, 0x653F, 0x90AD, 0x6545, 0x8CCC, + 0x6548, 0x9DC1, 0x654D, 0x9DC4, 0x654E, 0xFACD, 0x654F, 0x9571, + 0x6551, 0x8B7E, 0x6555, 0x9DC3, 0x6556, 0x9DC2, 0x6557, 0x9473, + 0x6558, 0x9DC5, 0x6559, 0x8BB3, 0x655D, 0x9DC7, 0x655E, 0x9DC6, + 0x6562, 0x8AB8, 0x6563, 0x8E55, 0x6566, 0x93D6, 0x656C, 0x8C68, + 0x6570, 0x9094, 0x6572, 0x9DC8, 0x6574, 0x90AE, 0x6575, 0x9347, + 0x6577, 0x957E, 0x6578, 0x9DC9, 0x6582, 0x9DCA, 0x6583, 0x9DCB, + 0x6587, 0x95B6, 0x6588, 0x9B7C, 0x6589, 0x90C4, 0x658C, 0x956B, + 0x658E, 0x8DD6, 0x6590, 0x94E3, 0x6591, 0x94C1, 0x6597, 0x936C, + 0x6599, 0x97BF, 0x659B, 0x9DCD, 0x659C, 0x8ECE, 0x659F, 0x9DCE, + 0x65A1, 0x88B4, 0x65A4, 0x8BD2, 0x65A5, 0x90CB, 0x65A7, 0x9580, + 0x65AB, 0x9DCF, 0x65AC, 0x8E61, 0x65AD, 0x9266, 0x65AF, 0x8E7A, + 0x65B0, 0x9056, 0x65B7, 0x9DD0, 0x65B9, 0x95FB, 0x65BC, 0x8997, + 0x65BD, 0x8E7B, 0x65C1, 0x9DD3, 0x65C3, 0x9DD1, 0x65C4, 0x9DD4, + 0x65C5, 0x97B7, 0x65C6, 0x9DD2, 0x65CB, 0x90F9, 0x65CC, 0x9DD5, + 0x65CF, 0x91B0, 0x65D2, 0x9DD6, 0x65D7, 0x8AF8, 0x65D9, 0x9DD8, + 0x65DB, 0x9DD7, 0x65E0, 0x9DD9, 0x65E1, 0x9DDA, 0x65E2, 0x8AF9, + 0x65E5, 0x93FA, 0x65E6, 0x9255, 0x65E7, 0x8B8C, 0x65E8, 0x8E7C, + 0x65E9, 0x9181, 0x65EC, 0x8F7B, 0x65ED, 0x88AE, 0x65F1, 0x9DDB, + 0x65FA, 0x89A0, 0x65FB, 0x9DDF, 0x6600, 0xFACE, 0x6602, 0x8D56, + 0x6603, 0x9DDE, 0x6606, 0x8DA9, 0x6607, 0x8FB8, 0x6609, 0xFAD1, + 0x660A, 0x9DDD, 0x660C, 0x8FB9, 0x660E, 0x96BE, 0x660F, 0x8DA8, + 0x6613, 0x88D5, 0x6614, 0x90CC, 0x6615, 0xFACF, 0x661C, 0x9DE4, + 0x661E, 0xFAD3, 0x661F, 0x90AF, 0x6620, 0x8966, 0x6624, 0xFAD4, + 0x6625, 0x8F74, 0x6627, 0x9686, 0x6628, 0x8DF0, 0x662D, 0x8FBA, + 0x662E, 0xFAD2, 0x662F, 0x90A5, 0x6631, 0xFA63, 0x6634, 0x9DE3, + 0x6635, 0x9DE1, 0x6636, 0x9DE2, 0x663B, 0xFAD0, 0x663C, 0x928B, + 0x663F, 0x9E45, 0x6641, 0x9DE8, 0x6642, 0x8E9E, 0x6643, 0x8D57, + 0x6644, 0x9DE6, 0x6649, 0x9DE7, 0x664B, 0x9057, 0x664F, 0x9DE5, + 0x6652, 0x8E4E, 0x6657, 0xFAD6, 0x6659, 0xFAD7, 0x665D, 0x9DEA, + 0x665E, 0x9DE9, 0x665F, 0x9DEE, 0x6662, 0x9DEF, 0x6664, 0x9DEB, + 0x6665, 0xFAD5, 0x6666, 0x8A41, 0x6667, 0x9DEC, 0x6668, 0x9DED, + 0x6669, 0x94D3, 0x666E, 0x9581, 0x666F, 0x8C69, 0x6670, 0x9DF0, + 0x6673, 0xFAD9, 0x6674, 0x90B0, 0x6676, 0x8FBB, 0x667A, 0x9271, + 0x6681, 0x8BC5, 0x6683, 0x9DF1, 0x6684, 0x9DF5, 0x6687, 0x89C9, + 0x6688, 0x9DF2, 0x6689, 0x9DF4, 0x668E, 0x9DF3, 0x6691, 0x8F8B, + 0x6696, 0x9267, 0x6697, 0x88C3, 0x6698, 0x9DF6, 0x6699, 0xFADA, + 0x669D, 0x9DF7, 0x66A0, 0xFADB, 0x66A2, 0x92A8, 0x66A6, 0x97EF, + 0x66AB, 0x8E62, 0x66AE, 0x95E9, 0x66B2, 0xFADC, 0x66B4, 0x965C, + 0x66B8, 0x9E41, 0x66B9, 0x9DF9, 0x66BC, 0x9DFC, 0x66BE, 0x9DFB, + 0x66BF, 0xFADD, 0x66C1, 0x9DF8, 0x66C4, 0x9E40, 0x66C7, 0x93DC, + 0x66C9, 0x9DFA, 0x66D6, 0x9E42, 0x66D9, 0x8F8C, 0x66DA, 0x9E43, + 0x66DC, 0x976A, 0x66DD, 0x9498, 0x66E0, 0x9E44, 0x66E6, 0x9E46, + 0x66E9, 0x9E47, 0x66F0, 0x9E48, 0x66F2, 0x8BC8, 0x66F3, 0x8967, + 0x66F4, 0x8D58, 0x66F5, 0x9E49, 0x66F7, 0x9E4A, 0x66F8, 0x8F91, + 0x66F9, 0x9182, 0x66FA, 0xFADE, 0x66FB, 0xFA66, 0x66FC, 0x99D6, + 0x66FD, 0x915D, 0x66FE, 0x915C, 0x66FF, 0x91D6, 0x6700, 0x8DC5, + 0x6703, 0x98F0, 0x6708, 0x8C8E, 0x6709, 0x974C, 0x670B, 0x95FC, + 0x670D, 0x959E, 0x670E, 0xFADF, 0x670F, 0x9E4B, 0x6714, 0x8DF1, + 0x6715, 0x92BD, 0x6716, 0x9E4C, 0x6717, 0x984E, 0x671B, 0x965D, + 0x671D, 0x92A9, 0x671E, 0x9E4D, 0x671F, 0x8AFA, 0x6726, 0x9E4E, + 0x6727, 0x9E4F, 0x6728, 0x96D8, 0x672A, 0x96A2, 0x672B, 0x9696, + 0x672C, 0x967B, 0x672D, 0x8E44, 0x672E, 0x9E51, 0x6731, 0x8EE9, + 0x6734, 0x9670, 0x6736, 0x9E53, 0x6737, 0x9E56, 0x6738, 0x9E55, + 0x673A, 0x8AF7, 0x673D, 0x8B80, 0x673F, 0x9E52, 0x6741, 0x9E54, + 0x6746, 0x9E57, 0x6749, 0x9099, 0x674E, 0x979B, 0x674F, 0x88C7, + 0x6750, 0x8DDE, 0x6751, 0x91BA, 0x6753, 0x8EDB, 0x6756, 0x8FF1, + 0x6759, 0x9E5A, 0x675C, 0x936D, 0x675E, 0x9E58, 0x675F, 0x91A9, + 0x6760, 0x9E59, 0x6761, 0x8FF0, 0x6762, 0x96DB, 0x6763, 0x9E5B, + 0x6764, 0x9E5C, 0x6765, 0x9788, 0x6766, 0xFAE1, 0x676A, 0x9E61, + 0x676D, 0x8D59, 0x676F, 0x9474, 0x6770, 0x9E5E, 0x6771, 0x938C, + 0x6772, 0x9DDC, 0x6773, 0x9DE0, 0x6775, 0x8B6E, 0x6777, 0x9466, + 0x677C, 0x9E60, 0x677E, 0x8FBC, 0x677F, 0x94C2, 0x6785, 0x9E66, + 0x6787, 0x94F8, 0x6789, 0x9E5D, 0x678B, 0x9E63, 0x678C, 0x9E62, + 0x6790, 0x90CD, 0x6795, 0x968D, 0x6797, 0x97D1, 0x679A, 0x9687, + 0x679C, 0x89CA, 0x679D, 0x8E7D, 0x67A0, 0x9867, 0x67A1, 0x9E65, + 0x67A2, 0x9095, 0x67A6, 0x9E64, 0x67A9, 0x9E5F, 0x67AF, 0x8CCD, + 0x67B3, 0x9E6B, 0x67B4, 0x9E69, 0x67B6, 0x89CB, 0x67B7, 0x9E67, + 0x67B8, 0x9E6D, 0x67B9, 0x9E73, 0x67BB, 0xFAE2, 0x67C0, 0xFAE4, + 0x67C1, 0x91C6, 0x67C4, 0x95BF, 0x67C6, 0x9E75, 0x67CA, 0x9541, + 0x67CE, 0x9E74, 0x67CF, 0x9490, 0x67D0, 0x965E, 0x67D1, 0x8AB9, + 0x67D3, 0x90F5, 0x67D4, 0x8F5F, 0x67D8, 0x92D1, 0x67DA, 0x974D, + 0x67DD, 0x9E70, 0x67DE, 0x9E6F, 0x67E2, 0x9E71, 0x67E4, 0x9E6E, + 0x67E7, 0x9E76, 0x67E9, 0x9E6C, 0x67EC, 0x9E6A, 0x67EE, 0x9E72, + 0x67EF, 0x9E68, 0x67F1, 0x928C, 0x67F3, 0x96F6, 0x67F4, 0x8EC4, + 0x67F5, 0x8DF2, 0x67FB, 0x8DB8, 0x67FE, 0x968F, 0x67FF, 0x8A60, + 0x6801, 0xFAE5, 0x6802, 0x92CC, 0x6803, 0x93C8, 0x6804, 0x8968, + 0x6813, 0x90F0, 0x6816, 0x90B2, 0x6817, 0x8C49, 0x681E, 0x9E78, + 0x6821, 0x8D5A, 0x6822, 0x8A9C, 0x6829, 0x9E7A, 0x682A, 0x8A94, + 0x682B, 0x9E81, 0x6832, 0x9E7D, 0x6834, 0x90F1, 0x6838, 0x8A6A, + 0x6839, 0x8DAA, 0x683C, 0x8A69, 0x683D, 0x8DCD, 0x6840, 0x9E7B, + 0x6841, 0x8C85, 0x6842, 0x8C6A, 0x6843, 0x938D, 0x6844, 0xFAE6, + 0x6846, 0x9E79, 0x6848, 0x88C4, 0x684D, 0x9E7C, 0x684E, 0x9E7E, + 0x6850, 0x8BCB, 0x6851, 0x8C4B, 0x6852, 0xFAE3, 0x6853, 0x8ABA, + 0x6854, 0x8B6A, 0x6859, 0x9E82, 0x685C, 0x8DF7, 0x685D, 0x9691, + 0x685F, 0x8E56, 0x6863, 0x9E83, 0x6867, 0x954F, 0x6874, 0x9E8F, + 0x6876, 0x89B1, 0x6877, 0x9E84, 0x687E, 0x9E95, 0x687F, 0x9E85, + 0x6881, 0x97C0, 0x6883, 0x9E8C, 0x6885, 0x947E, 0x688D, 0x9E94, + 0x688F, 0x9E87, 0x6893, 0x88B2, 0x6894, 0x9E89, 0x6897, 0x8D5B, + 0x689B, 0x9E8B, 0x689D, 0x9E8A, 0x689F, 0x9E86, 0x68A0, 0x9E91, + 0x68A2, 0x8FBD, 0x68A6, 0x9AEB, 0x68A7, 0x8CE6, 0x68A8, 0x979C, + 0x68AD, 0x9E88, 0x68AF, 0x92F2, 0x68B0, 0x8A42, 0x68B1, 0x8DAB, + 0x68B3, 0x9E80, 0x68B5, 0x9E90, 0x68B6, 0x8A81, 0x68B9, 0x9E8E, + 0x68BA, 0x9E92, 0x68BC, 0x938E, 0x68C4, 0x8AFC, 0x68C6, 0x9EB0, + 0x68C8, 0xFA64, 0x68C9, 0x96C7, 0x68CA, 0x9E97, 0x68CB, 0x8AFB, + 0x68CD, 0x9E9E, 0x68CF, 0xFAE7, 0x68D2, 0x965F, 0x68D4, 0x9E9F, + 0x68D5, 0x9EA1, 0x68D7, 0x9EA5, 0x68D8, 0x9E99, 0x68DA, 0x9249, + 0x68DF, 0x938F, 0x68E0, 0x9EA9, 0x68E1, 0x9E9C, 0x68E3, 0x9EA6, + 0x68E7, 0x9EA0, 0x68EE, 0x9058, 0x68EF, 0x9EAA, 0x68F2, 0x90B1, + 0x68F9, 0x9EA8, 0x68FA, 0x8ABB, 0x6900, 0x986F, 0x6901, 0x9E96, + 0x6904, 0x9EA4, 0x6905, 0x88D6, 0x6908, 0x9E98, 0x690B, 0x96B8, + 0x690C, 0x9E9D, 0x690D, 0x9041, 0x690E, 0x92C5, 0x690F, 0x9E93, + 0x6912, 0x9EA3, 0x6919, 0x909A, 0x691A, 0x9EAD, 0x691B, 0x8A91, + 0x691C, 0x8C9F, 0x6921, 0x9EAF, 0x6922, 0x9E9A, 0x6923, 0x9EAE, + 0x6925, 0x9EA7, 0x6926, 0x9E9B, 0x6928, 0x9EAB, 0x692A, 0x9EAC, + 0x6930, 0x9EBD, 0x6934, 0x93CC, 0x6936, 0x9EA2, 0x6939, 0x9EB9, + 0x693D, 0x9EBB, 0x693F, 0x92D6, 0x694A, 0x976B, 0x6953, 0x9596, + 0x6954, 0x9EB6, 0x6955, 0x91C8, 0x6959, 0x9EBC, 0x695A, 0x915E, + 0x695C, 0x9EB3, 0x695D, 0x9EC0, 0x695E, 0x9EBF, 0x6960, 0x93ED, + 0x6961, 0x9EBE, 0x6962, 0x93E8, 0x6968, 0xFAE9, 0x696A, 0x9EC2, + 0x696B, 0x9EB5, 0x696D, 0x8BC6, 0x696E, 0x9EB8, 0x696F, 0x8F7C, + 0x6973, 0x9480, 0x6974, 0x9EBA, 0x6975, 0x8BC9, 0x6977, 0x9EB2, + 0x6978, 0x9EB4, 0x6979, 0x9EB1, 0x697C, 0x984F, 0x697D, 0x8A79, + 0x697E, 0x9EB7, 0x6981, 0x9EC1, 0x6982, 0x8A54, 0x698A, 0x8DE5, + 0x698E, 0x897C, 0x6991, 0x9ED2, 0x6994, 0x9850, 0x6995, 0x9ED5, + 0x6998, 0xFAEB, 0x699B, 0x9059, 0x699C, 0x9ED4, 0x69A0, 0x9ED3, + 0x69A7, 0x9ED0, 0x69AE, 0x9EC4, 0x69B1, 0x9EE1, 0x69B2, 0x9EC3, + 0x69B4, 0x9ED6, 0x69BB, 0x9ECE, 0x69BE, 0x9EC9, 0x69BF, 0x9EC6, + 0x69C1, 0x9EC7, 0x69C3, 0x9ECF, 0x69C7, 0xEAA0, 0x69CA, 0x9ECC, + 0x69CB, 0x8D5C, 0x69CC, 0x92C6, 0x69CD, 0x9184, 0x69CE, 0x9ECA, + 0x69D0, 0x9EC5, 0x69D3, 0x9EC8, 0x69D8, 0x976C, 0x69D9, 0x968A, + 0x69DD, 0x9ECD, 0x69DE, 0x9ED7, 0x69E2, 0xFAEC, 0x69E7, 0x9EDF, + 0x69E8, 0x9ED8, 0x69EB, 0x9EE5, 0x69ED, 0x9EE3, 0x69F2, 0x9EDE, + 0x69F9, 0x9EDD, 0x69FB, 0x92CE, 0x69FD, 0x9185, 0x69FF, 0x9EDB, + 0x6A02, 0x9ED9, 0x6A05, 0x9EE0, 0x6A0A, 0x9EE6, 0x6A0B, 0x94F3, + 0x6A0C, 0x9EEC, 0x6A12, 0x9EE7, 0x6A13, 0x9EEA, 0x6A14, 0x9EE4, + 0x6A17, 0x9294, 0x6A19, 0x9557, 0x6A1B, 0x9EDA, 0x6A1E, 0x9EE2, + 0x6A1F, 0x8FBE, 0x6A21, 0x96CD, 0x6A22, 0x9EF6, 0x6A23, 0x9EE9, + 0x6A29, 0x8CA0, 0x6A2A, 0x89A1, 0x6A2B, 0x8A7E, 0x6A2E, 0x9ED1, + 0x6A30, 0xFAED, 0x6A35, 0x8FBF, 0x6A36, 0x9EEE, 0x6A38, 0x9EF5, + 0x6A39, 0x8EF7, 0x6A3A, 0x8A92, 0x6A3D, 0x924D, 0x6A44, 0x9EEB, + 0x6A46, 0xFAEF, 0x6A47, 0x9EF0, 0x6A48, 0x9EF4, 0x6A4B, 0x8BB4, + 0x6A58, 0x8B6B, 0x6A59, 0x9EF2, 0x6A5F, 0x8B40, 0x6A61, 0x93C9, + 0x6A62, 0x9EF1, 0x6A66, 0x9EF3, 0x6A6B, 0xFAEE, 0x6A72, 0x9EED, + 0x6A73, 0xFAF0, 0x6A78, 0x9EEF, 0x6A7E, 0xFAF1, 0x6A7F, 0x8A80, + 0x6A80, 0x9268, 0x6A84, 0x9EFA, 0x6A8D, 0x9EF8, 0x6A8E, 0x8CE7, + 0x6A90, 0x9EF7, 0x6A97, 0x9F40, 0x6A9C, 0x9E77, 0x6AA0, 0x9EF9, + 0x6AA2, 0x9EFB, 0x6AA3, 0x9EFC, 0x6AAA, 0x9F4B, 0x6AAC, 0x9F47, + 0x6AAE, 0x9E8D, 0x6AB3, 0x9F46, 0x6AB8, 0x9F45, 0x6ABB, 0x9F42, + 0x6AC1, 0x9EE8, 0x6AC2, 0x9F44, 0x6AC3, 0x9F43, 0x6AD1, 0x9F49, + 0x6AD3, 0x9845, 0x6ADA, 0x9F4C, 0x6ADB, 0x8BF9, 0x6ADE, 0x9F48, + 0x6ADF, 0x9F4A, 0x6AE2, 0xFAF2, 0x6AE4, 0xFAF3, 0x6AE8, 0x94A5, + 0x6AEA, 0x9F4D, 0x6AFA, 0x9F51, 0x6AFB, 0x9F4E, 0x6B04, 0x9793, + 0x6B05, 0x9F4F, 0x6B0A, 0x9EDC, 0x6B12, 0x9F52, 0x6B16, 0x9F53, + 0x6B1D, 0x8954, 0x6B1F, 0x9F55, 0x6B20, 0x8C87, 0x6B21, 0x8E9F, + 0x6B23, 0x8BD3, 0x6B27, 0x89A2, 0x6B32, 0x977E, 0x6B37, 0x9F57, + 0x6B38, 0x9F56, 0x6B39, 0x9F59, 0x6B3A, 0x8B5C, 0x6B3D, 0x8BD4, + 0x6B3E, 0x8ABC, 0x6B43, 0x9F5C, 0x6B47, 0x9F5B, 0x6B49, 0x9F5D, + 0x6B4C, 0x89CC, 0x6B4E, 0x9256, 0x6B50, 0x9F5E, 0x6B53, 0x8ABD, + 0x6B54, 0x9F60, 0x6B59, 0x9F5F, 0x6B5B, 0x9F61, 0x6B5F, 0x9F62, + 0x6B61, 0x9F63, 0x6B62, 0x8E7E, 0x6B63, 0x90B3, 0x6B64, 0x8D9F, + 0x6B66, 0x9590, 0x6B69, 0x95E0, 0x6B6A, 0x9863, 0x6B6F, 0x8E95, + 0x6B73, 0x8DCE, 0x6B74, 0x97F0, 0x6B78, 0x9F64, 0x6B79, 0x9F65, + 0x6B7B, 0x8E80, 0x6B7F, 0x9F66, 0x6B80, 0x9F67, 0x6B83, 0x9F69, + 0x6B84, 0x9F68, 0x6B86, 0x9677, 0x6B89, 0x8F7D, 0x6B8A, 0x8EEA, + 0x6B8B, 0x8E63, 0x6B8D, 0x9F6A, 0x6B95, 0x9F6C, 0x6B96, 0x9042, + 0x6B98, 0x9F6B, 0x6B9E, 0x9F6D, 0x6BA4, 0x9F6E, 0x6BAA, 0x9F6F, + 0x6BAB, 0x9F70, 0x6BAF, 0x9F71, 0x6BB1, 0x9F73, 0x6BB2, 0x9F72, + 0x6BB3, 0x9F74, 0x6BB4, 0x89A3, 0x6BB5, 0x9269, 0x6BB7, 0x9F75, + 0x6BBA, 0x8E45, 0x6BBB, 0x8A6B, 0x6BBC, 0x9F76, 0x6BBF, 0x9361, + 0x6BC0, 0x9ACA, 0x6BC5, 0x8B42, 0x6BC6, 0x9F77, 0x6BCB, 0x9F78, + 0x6BCD, 0x95EA, 0x6BCE, 0x9688, 0x6BD2, 0x93C5, 0x6BD3, 0x9F79, + 0x6BD4, 0x94E4, 0x6BD6, 0xFAF4, 0x6BD8, 0x94F9, 0x6BDB, 0x96D1, + 0x6BDF, 0x9F7A, 0x6BEB, 0x9F7C, 0x6BEC, 0x9F7B, 0x6BEF, 0x9F7E, + 0x6BF3, 0x9F7D, 0x6C08, 0x9F81, 0x6C0F, 0x8E81, 0x6C11, 0x96AF, + 0x6C13, 0x9F82, 0x6C14, 0x9F83, 0x6C17, 0x8B43, 0x6C1B, 0x9F84, + 0x6C23, 0x9F86, 0x6C24, 0x9F85, 0x6C34, 0x9085, 0x6C37, 0x9558, + 0x6C38, 0x8969, 0x6C3E, 0x94C3, 0x6C3F, 0xFAF5, 0x6C40, 0x92F3, + 0x6C41, 0x8F60, 0x6C42, 0x8B81, 0x6C4E, 0x94C4, 0x6C50, 0x8EAC, + 0x6C55, 0x9F88, 0x6C57, 0x8ABE, 0x6C5A, 0x8998, 0x6C5C, 0xFAF6, + 0x6C5D, 0x93F0, 0x6C5E, 0x9F87, 0x6C5F, 0x8D5D, 0x6C60, 0x9272, + 0x6C62, 0x9F89, 0x6C68, 0x9F91, 0x6C6A, 0x9F8A, 0x6C6F, 0xFAF8, + 0x6C70, 0x91BF, 0x6C72, 0x8B82, 0x6C73, 0x9F92, 0x6C7A, 0x8C88, + 0x6C7D, 0x8B44, 0x6C7E, 0x9F90, 0x6C81, 0x9F8E, 0x6C82, 0x9F8B, + 0x6C83, 0x9780, 0x6C86, 0xFAF7, 0x6C88, 0x92BE, 0x6C8C, 0x93D7, + 0x6C8D, 0x9F8C, 0x6C90, 0x9F94, 0x6C92, 0x9F93, 0x6C93, 0x8C42, + 0x6C96, 0x89AB, 0x6C99, 0x8DB9, 0x6C9A, 0x9F8D, 0x6C9B, 0x9F8F, + 0x6CA1, 0x9676, 0x6CA2, 0x91F2, 0x6CAB, 0x9697, 0x6CAE, 0x9F9C, + 0x6CB1, 0x9F9D, 0x6CB3, 0x89CD, 0x6CB8, 0x95A6, 0x6CB9, 0x96FB, + 0x6CBA, 0x9F9F, 0x6CBB, 0x8EA1, 0x6CBC, 0x8FC0, 0x6CBD, 0x9F98, + 0x6CBE, 0x9F9E, 0x6CBF, 0x8988, 0x6CC1, 0x8BB5, 0x6CC4, 0x9F95, + 0x6CC5, 0x9F9A, 0x6CC9, 0x90F2, 0x6CCA, 0x9491, 0x6CCC, 0x94E5, + 0x6CD3, 0x9F97, 0x6CD5, 0x9640, 0x6CD7, 0x9F99, 0x6CD9, 0x9FA2, + 0x6CDA, 0xFAF9, 0x6CDB, 0x9FA0, 0x6CDD, 0x9F9B, 0x6CE1, 0x9641, + 0x6CE2, 0x9467, 0x6CE3, 0x8B83, 0x6CE5, 0x9344, 0x6CE8, 0x928D, + 0x6CEA, 0x9FA3, 0x6CEF, 0x9FA1, 0x6CF0, 0x91D7, 0x6CF1, 0x9F96, + 0x6CF3, 0x896A, 0x6D04, 0xFAFA, 0x6D0B, 0x976D, 0x6D0C, 0x9FAE, + 0x6D12, 0x9FAD, 0x6D17, 0x90F4, 0x6D19, 0x9FAA, 0x6D1B, 0x978C, + 0x6D1E, 0x93B4, 0x6D1F, 0x9FA4, 0x6D25, 0x92C3, 0x6D29, 0x896B, + 0x6D2A, 0x8D5E, 0x6D2B, 0x9FA7, 0x6D32, 0x8F46, 0x6D33, 0x9FAC, + 0x6D35, 0x9FAB, 0x6D36, 0x9FA6, 0x6D38, 0x9FA9, 0x6D3B, 0x8A88, + 0x6D3D, 0x9FA8, 0x6D3E, 0x9468, 0x6D41, 0x97AC, 0x6D44, 0x8FF2, + 0x6D45, 0x90F3, 0x6D59, 0x9FB4, 0x6D5A, 0x9FB2, 0x6D5C, 0x956C, + 0x6D63, 0x9FAF, 0x6D64, 0x9FB1, 0x6D66, 0x8959, 0x6D69, 0x8D5F, + 0x6D6A, 0x9851, 0x6D6C, 0x8A5C, 0x6D6E, 0x9582, 0x6D6F, 0xFAFC, + 0x6D74, 0x9781, 0x6D77, 0x8A43, 0x6D78, 0x905A, 0x6D79, 0x9FB3, + 0x6D85, 0x9FB8, 0x6D87, 0xFAFB, 0x6D88, 0x8FC1, 0x6D8C, 0x974F, + 0x6D8E, 0x9FB5, 0x6D93, 0x9FB0, 0x6D95, 0x9FB6, 0x6D96, 0xFB40, + 0x6D99, 0x97DC, 0x6D9B, 0x9393, 0x6D9C, 0x93C0, 0x6DAC, 0xFB41, + 0x6DAF, 0x8A55, 0x6DB2, 0x8974, 0x6DB5, 0x9FBC, 0x6DB8, 0x9FBF, + 0x6DBC, 0x97C1, 0x6DC0, 0x9784, 0x6DC5, 0x9FC6, 0x6DC6, 0x9FC0, + 0x6DC7, 0x9FBD, 0x6DCB, 0x97D2, 0x6DCC, 0x9FC3, 0x6DCF, 0xFB42, + 0x6DD1, 0x8F69, 0x6DD2, 0x9FC5, 0x6DD5, 0x9FCA, 0x6DD8, 0x9391, + 0x6DD9, 0x9FC8, 0x6DDE, 0x9FC2, 0x6DE1, 0x9257, 0x6DE4, 0x9FC9, + 0x6DE6, 0x9FBE, 0x6DE8, 0x9FC4, 0x6DEA, 0x9FCB, 0x6DEB, 0x88FA, + 0x6DEC, 0x9FC1, 0x6DEE, 0x9FCC, 0x6DF1, 0x905B, 0x6DF2, 0xFB44, + 0x6DF3, 0x8F7E, 0x6DF5, 0x95A3, 0x6DF7, 0x8DAC, 0x6DF8, 0xFB43, + 0x6DF9, 0x9FB9, 0x6DFA, 0x9FC7, 0x6DFB, 0x9359, 0x6DFC, 0xFB45, + 0x6E05, 0x90B4, 0x6E07, 0x8A89, 0x6E08, 0x8DCF, 0x6E09, 0x8FC2, + 0x6E0A, 0x9FBB, 0x6E0B, 0x8F61, 0x6E13, 0x8C6B, 0x6E15, 0x9FBA, + 0x6E19, 0x9FD0, 0x6E1A, 0x8F8D, 0x6E1B, 0x8CB8, 0x6E1D, 0x9FDF, + 0x6E1F, 0x9FD9, 0x6E20, 0x8B94, 0x6E21, 0x936E, 0x6E23, 0x9FD4, + 0x6E24, 0x9FDD, 0x6E25, 0x88AD, 0x6E26, 0x8951, 0x6E27, 0xFB48, + 0x6E29, 0x89B7, 0x6E2B, 0x9FD6, 0x6E2C, 0x91AA, 0x6E2D, 0x9FCD, + 0x6E2E, 0x9FCF, 0x6E2F, 0x8D60, 0x6E38, 0x9FE0, 0x6E39, 0xFB46, + 0x6E3A, 0x9FDB, 0x6E3C, 0xFB49, 0x6E3E, 0x9FD3, 0x6E43, 0x9FDA, + 0x6E4A, 0x96A9, 0x6E4D, 0x9FD8, 0x6E4E, 0x9FDC, 0x6E56, 0x8CCE, + 0x6E58, 0x8FC3, 0x6E5B, 0x9258, 0x6E5C, 0xFB47, 0x6E5F, 0x9FD2, + 0x6E67, 0x974E, 0x6E6B, 0x9FD5, 0x6E6E, 0x9FCE, 0x6E6F, 0x9392, + 0x6E72, 0x9FD1, 0x6E76, 0x9FD7, 0x6E7E, 0x9870, 0x6E7F, 0x8EBC, + 0x6E80, 0x969E, 0x6E82, 0x9FE1, 0x6E8C, 0x94AC, 0x6E8F, 0x9FED, + 0x6E90, 0x8CB9, 0x6E96, 0x8F80, 0x6E98, 0x9FE3, 0x6E9C, 0x97AD, + 0x6E9D, 0x8D61, 0x6E9F, 0x9FF0, 0x6EA2, 0x88EC, 0x6EA5, 0x9FEE, + 0x6EAA, 0x9FE2, 0x6EAF, 0x9FE8, 0x6EB2, 0x9FEA, 0x6EB6, 0x976E, + 0x6EB7, 0x9FE5, 0x6EBA, 0x934D, 0x6EBD, 0x9FE7, 0x6EBF, 0xFB4A, + 0x6EC2, 0x9FEF, 0x6EC4, 0x9FE9, 0x6EC5, 0x96C5, 0x6EC9, 0x9FE4, + 0x6ECB, 0x8EA0, 0x6ECC, 0x9FFC, 0x6ED1, 0x8A8A, 0x6ED3, 0x9FE6, + 0x6ED4, 0x9FEB, 0x6ED5, 0x9FEC, 0x6EDD, 0x91EA, 0x6EDE, 0x91D8, + 0x6EEC, 0x9FF4, 0x6EEF, 0x9FFA, 0x6EF2, 0x9FF8, 0x6EF4, 0x9348, + 0x6EF7, 0xE042, 0x6EF8, 0x9FF5, 0x6EFE, 0x9FF6, 0x6EFF, 0x9FDE, + 0x6F01, 0x8B99, 0x6F02, 0x9559, 0x6F06, 0x8EBD, 0x6F09, 0x8D97, + 0x6F0F, 0x9852, 0x6F11, 0x9FF2, 0x6F13, 0xE041, 0x6F14, 0x8989, + 0x6F15, 0x9186, 0x6F20, 0x9499, 0x6F22, 0x8ABF, 0x6F23, 0x97F8, + 0x6F2B, 0x969F, 0x6F2C, 0x92D0, 0x6F31, 0x9FF9, 0x6F32, 0x9FFB, + 0x6F38, 0x9151, 0x6F3E, 0xE040, 0x6F3F, 0x9FF7, 0x6F41, 0x9FF1, + 0x6F45, 0x8AC1, 0x6F54, 0x8C89, 0x6F58, 0xE04E, 0x6F5B, 0xE049, + 0x6F5C, 0x90F6, 0x6F5F, 0x8A83, 0x6F64, 0x8F81, 0x6F66, 0xE052, + 0x6F6D, 0xE04B, 0x6F6E, 0x92AA, 0x6F6F, 0xE048, 0x6F70, 0x92D7, + 0x6F74, 0xE06B, 0x6F78, 0xE045, 0x6F7A, 0xE044, 0x6F7C, 0xE04D, + 0x6F80, 0xE047, 0x6F81, 0xE046, 0x6F82, 0xE04C, 0x6F84, 0x909F, + 0x6F86, 0xE043, 0x6F88, 0xFB4B, 0x6F8E, 0xE04F, 0x6F91, 0xE050, + 0x6F97, 0x8AC0, 0x6FA1, 0xE055, 0x6FA3, 0xE054, 0x6FA4, 0xE056, + 0x6FAA, 0xE059, 0x6FB1, 0x9362, 0x6FB3, 0xE053, 0x6FB5, 0xFB4C, + 0x6FB9, 0xE057, 0x6FC0, 0x8C83, 0x6FC1, 0x91F7, 0x6FC2, 0xE051, + 0x6FC3, 0x945A, 0x6FC6, 0xE058, 0x6FD4, 0xE05D, 0x6FD5, 0xE05B, + 0x6FD8, 0xE05E, 0x6FDB, 0xE061, 0x6FDF, 0xE05A, 0x6FE0, 0x8D8A, + 0x6FE1, 0x9447, 0x6FE4, 0x9FB7, 0x6FEB, 0x9794, 0x6FEC, 0xE05C, + 0x6FEE, 0xE060, 0x6FEF, 0x91F3, 0x6FF1, 0xE05F, 0x6FF3, 0xE04A, + 0x6FF5, 0xFB4D, 0x6FF6, 0xE889, 0x6FFA, 0xE064, 0x6FFE, 0xE068, + 0x7001, 0xE066, 0x7005, 0xFB4E, 0x7007, 0xFB4F, 0x7009, 0xE062, + 0x700B, 0xE063, 0x700F, 0xE067, 0x7011, 0xE065, 0x7015, 0x956D, + 0x7018, 0xE06D, 0x701A, 0xE06A, 0x701B, 0xE069, 0x701D, 0xE06C, + 0x701E, 0x93D2, 0x701F, 0xE06E, 0x7026, 0x9295, 0x7027, 0x91EB, + 0x7028, 0xFB50, 0x702C, 0x90A3, 0x7030, 0xE06F, 0x7032, 0xE071, + 0x703E, 0xE070, 0x704C, 0x9FF3, 0x7051, 0xE072, 0x7058, 0x93E5, + 0x7063, 0xE073, 0x706B, 0x89CE, 0x706F, 0x9394, 0x7070, 0x8A44, + 0x7078, 0x8B84, 0x707C, 0x8EDC, 0x707D, 0x8DD0, 0x7085, 0xFB51, + 0x7089, 0x9846, 0x708A, 0x9086, 0x708E, 0x898A, 0x7092, 0xE075, + 0x7099, 0xE074, 0x70AB, 0xFB52, 0x70AC, 0xE078, 0x70AD, 0x9259, + 0x70AE, 0xE07B, 0x70AF, 0xE076, 0x70B3, 0xE07A, 0x70B8, 0xE079, + 0x70B9, 0x935F, 0x70BA, 0x88D7, 0x70BB, 0xFA62, 0x70C8, 0x97F3, + 0x70CB, 0xE07D, 0x70CF, 0x8947, 0x70D9, 0xE080, 0x70DD, 0xE07E, + 0x70DF, 0xE07C, 0x70F1, 0xE077, 0x70F9, 0x9642, 0x70FD, 0xE082, + 0x7104, 0xFB54, 0x7109, 0xE081, 0x710F, 0xFB53, 0x7114, 0x898B, + 0x7119, 0xE084, 0x711A, 0x95B0, 0x711C, 0xE083, 0x7121, 0x96B3, + 0x7126, 0x8FC5, 0x7136, 0x9152, 0x713C, 0x8FC4, 0x7146, 0xFB56, + 0x7147, 0xFB57, 0x7149, 0x97F9, 0x714C, 0xE08A, 0x714E, 0x90F7, + 0x7155, 0xE086, 0x7156, 0xE08B, 0x7159, 0x898C, 0x715C, 0xFB55, + 0x7162, 0xE089, 0x7164, 0x9481, 0x7165, 0xE085, 0x7166, 0xE088, + 0x7167, 0x8FC6, 0x7169, 0x94CF, 0x716C, 0xE08C, 0x716E, 0x8ECF, + 0x717D, 0x90F8, 0x7184, 0xE08F, 0x7188, 0xE087, 0x718A, 0x8C46, + 0x718F, 0xE08D, 0x7194, 0x976F, 0x7195, 0xE090, 0x7199, 0xEAA4, + 0x719F, 0x8F6E, 0x71A8, 0xE091, 0x71AC, 0xE092, 0x71B1, 0x944D, + 0x71B9, 0xE094, 0x71BE, 0xE095, 0x71C1, 0xFB59, 0x71C3, 0x9452, + 0x71C8, 0x9395, 0x71C9, 0xE097, 0x71CE, 0xE099, 0x71D0, 0x97D3, + 0x71D2, 0xE096, 0x71D4, 0xE098, 0x71D5, 0x898D, 0x71D7, 0xE093, + 0x71DF, 0x9A7A, 0x71E0, 0xE09A, 0x71E5, 0x9187, 0x71E6, 0x8E57, + 0x71E7, 0xE09C, 0x71EC, 0xE09B, 0x71ED, 0x9043, 0x71EE, 0x99D7, + 0x71F5, 0xE09D, 0x71F9, 0xE09F, 0x71FB, 0xE08E, 0x71FC, 0xE09E, + 0x71FE, 0xFB5A, 0x71FF, 0xE0A0, 0x7206, 0x949A, 0x720D, 0xE0A1, + 0x7210, 0xE0A2, 0x721B, 0xE0A3, 0x7228, 0xE0A4, 0x722A, 0x92DC, + 0x722C, 0xE0A6, 0x722D, 0xE0A5, 0x7230, 0xE0A7, 0x7232, 0xE0A8, + 0x7235, 0x8EDD, 0x7236, 0x9583, 0x723A, 0x96EA, 0x723B, 0xE0A9, + 0x723C, 0xE0AA, 0x723D, 0x9175, 0x723E, 0x8EA2, 0x723F, 0xE0AB, + 0x7240, 0xE0AC, 0x7246, 0xE0AD, 0x7247, 0x95D0, 0x7248, 0x94C5, + 0x724B, 0xE0AE, 0x724C, 0x9476, 0x7252, 0x92AB, 0x7258, 0xE0AF, + 0x7259, 0x89E5, 0x725B, 0x8B8D, 0x725D, 0x96C4, 0x725F, 0x96B4, + 0x7261, 0x89B2, 0x7262, 0x9853, 0x7267, 0x9671, 0x7269, 0x95A8, + 0x7272, 0x90B5, 0x7274, 0xE0B0, 0x7279, 0x93C1, 0x727D, 0x8CA1, + 0x727E, 0xE0B1, 0x7280, 0x8DD2, 0x7281, 0xE0B3, 0x7282, 0xE0B2, + 0x7287, 0xE0B4, 0x7292, 0xE0B5, 0x7296, 0xE0B6, 0x72A0, 0x8B5D, + 0x72A2, 0xE0B7, 0x72A7, 0xE0B8, 0x72AC, 0x8CA2, 0x72AF, 0x94C6, + 0x72B1, 0xFB5B, 0x72B2, 0xE0BA, 0x72B6, 0x8FF3, 0x72B9, 0xE0B9, + 0x72BE, 0xFB5C, 0x72C2, 0x8BB6, 0x72C3, 0xE0BB, 0x72C4, 0xE0BD, + 0x72C6, 0xE0BC, 0x72CE, 0xE0BE, 0x72D0, 0x8CCF, 0x72D2, 0xE0BF, + 0x72D7, 0x8BE7, 0x72D9, 0x915F, 0x72DB, 0x8D9D, 0x72E0, 0xE0C1, + 0x72E1, 0xE0C2, 0x72E2, 0xE0C0, 0x72E9, 0x8EEB, 0x72EC, 0x93C6, + 0x72ED, 0x8BB7, 0x72F7, 0xE0C4, 0x72F8, 0x924B, 0x72F9, 0xE0C3, + 0x72FC, 0x9854, 0x72FD, 0x9482, 0x730A, 0xE0C7, 0x7316, 0xE0C9, + 0x7317, 0xE0C6, 0x731B, 0x96D2, 0x731C, 0xE0C8, 0x731D, 0xE0CA, + 0x731F, 0x97C2, 0x7324, 0xFB5D, 0x7325, 0xE0CE, 0x7329, 0xE0CD, + 0x732A, 0x9296, 0x732B, 0x944C, 0x732E, 0x8CA3, 0x732F, 0xE0CC, + 0x7334, 0xE0CB, 0x7336, 0x9750, 0x7337, 0x9751, 0x733E, 0xE0CF, + 0x733F, 0x898E, 0x7344, 0x8D96, 0x7345, 0x8E82, 0x734E, 0xE0D0, + 0x734F, 0xE0D1, 0x7357, 0xE0D3, 0x7363, 0x8F62, 0x7368, 0xE0D5, + 0x736A, 0xE0D4, 0x7370, 0xE0D6, 0x7372, 0x8A6C, 0x7375, 0xE0D8, + 0x7377, 0xFB5F, 0x7378, 0xE0D7, 0x737A, 0xE0DA, 0x737B, 0xE0D9, + 0x7384, 0x8CBA, 0x7387, 0x97A6, 0x7389, 0x8BCA, 0x738B, 0x89A4, + 0x7396, 0x8BE8, 0x73A9, 0x8ADF, 0x73B2, 0x97E6, 0x73B3, 0xE0DC, + 0x73BB, 0xE0DE, 0x73BD, 0xFB60, 0x73C0, 0xE0DF, 0x73C2, 0x89CF, + 0x73C8, 0xE0DB, 0x73C9, 0xFB61, 0x73CA, 0x8E58, 0x73CD, 0x92BF, + 0x73CE, 0xE0DD, 0x73D2, 0xFB64, 0x73D6, 0xFB62, 0x73DE, 0xE0E2, + 0x73E0, 0x8EEC, 0x73E3, 0xFB63, 0x73E5, 0xE0E0, 0x73EA, 0x8C5D, + 0x73ED, 0x94C7, 0x73EE, 0xE0E1, 0x73F1, 0xE0FC, 0x73F5, 0xFB66, + 0x73F8, 0xE0E7, 0x73FE, 0x8CBB, 0x7403, 0x8B85, 0x7405, 0xE0E4, + 0x7406, 0x979D, 0x7407, 0xFB65, 0x7409, 0x97AE, 0x7422, 0x91F4, + 0x7425, 0xE0E6, 0x7426, 0xFB67, 0x7429, 0xFB69, 0x742A, 0xFB68, + 0x742E, 0xFB6A, 0x7432, 0xE0E8, 0x7433, 0x97D4, 0x7434, 0x8BD5, + 0x7435, 0x94FA, 0x7436, 0x9469, 0x743A, 0xE0E9, 0x743F, 0xE0EB, + 0x7441, 0xE0EE, 0x7455, 0xE0EA, 0x7459, 0xE0ED, 0x745A, 0x8CE8, + 0x745B, 0x896C, 0x745C, 0xE0EF, 0x745E, 0x9090, 0x745F, 0xE0EC, + 0x7460, 0x97DA, 0x7462, 0xFB6B, 0x7463, 0xE0F2, 0x7464, 0xEAA2, + 0x7469, 0xE0F0, 0x746A, 0xE0F3, 0x746F, 0xE0E5, 0x7470, 0xE0F1, + 0x7473, 0x8DBA, 0x7476, 0xE0F4, 0x747E, 0xE0F5, 0x7483, 0x979E, + 0x7489, 0xFB6C, 0x748B, 0xE0F6, 0x749E, 0xE0F7, 0x749F, 0xFB6D, + 0x74A2, 0xE0E3, 0x74A7, 0xE0F8, 0x74B0, 0x8AC2, 0x74BD, 0x8EA3, + 0x74CA, 0xE0F9, 0x74CF, 0xE0FA, 0x74D4, 0xE0FB, 0x74DC, 0x895A, + 0x74E0, 0xE140, 0x74E2, 0x955A, 0x74E3, 0xE141, 0x74E6, 0x8AA2, + 0x74E7, 0xE142, 0x74E9, 0xE143, 0x74EE, 0xE144, 0x74F0, 0xE146, + 0x74F1, 0xE147, 0x74F2, 0xE145, 0x74F6, 0x9572, 0x74F7, 0xE149, + 0x74F8, 0xE148, 0x7501, 0xFB6E, 0x7503, 0xE14B, 0x7504, 0xE14A, + 0x7505, 0xE14C, 0x750C, 0xE14D, 0x750D, 0xE14F, 0x750E, 0xE14E, + 0x7511, 0x8D99, 0x7513, 0xE151, 0x7515, 0xE150, 0x7518, 0x8AC3, + 0x751A, 0x9072, 0x751C, 0x935B, 0x751E, 0xE152, 0x751F, 0x90B6, + 0x7523, 0x8E59, 0x7525, 0x8999, 0x7526, 0xE153, 0x7528, 0x9770, + 0x752B, 0x95E1, 0x752C, 0xE154, 0x752F, 0xFAA8, 0x7530, 0x9363, + 0x7531, 0x9752, 0x7532, 0x8D62, 0x7533, 0x905C, 0x7537, 0x926A, + 0x7538, 0x99B2, 0x753A, 0x92AC, 0x753B, 0x89E6, 0x753C, 0xE155, + 0x7544, 0xE156, 0x7546, 0xE15B, 0x7549, 0xE159, 0x754A, 0xE158, + 0x754B, 0x9DC0, 0x754C, 0x8A45, 0x754D, 0xE157, 0x754F, 0x88D8, + 0x7551, 0x94A8, 0x7554, 0x94C8, 0x7559, 0x97AF, 0x755A, 0xE15C, + 0x755B, 0xE15A, 0x755C, 0x927B, 0x755D, 0x90A4, 0x7560, 0x94A9, + 0x7562, 0x954C, 0x7564, 0xE15E, 0x7565, 0x97AA, 0x7566, 0x8C6C, + 0x7567, 0xE15F, 0x7569, 0xE15D, 0x756A, 0x94D4, 0x756B, 0xE160, + 0x756D, 0xE161, 0x756F, 0xFB6F, 0x7570, 0x88D9, 0x7573, 0x8FF4, + 0x7574, 0xE166, 0x7576, 0xE163, 0x7577, 0x93EB, 0x7578, 0xE162, + 0x757F, 0x8B45, 0x7582, 0xE169, 0x7586, 0xE164, 0x7587, 0xE165, + 0x7589, 0xE168, 0x758A, 0xE167, 0x758B, 0x9544, 0x758E, 0x9161, + 0x758F, 0x9160, 0x7591, 0x8B5E, 0x7594, 0xE16A, 0x759A, 0xE16B, + 0x759D, 0xE16C, 0x75A3, 0xE16E, 0x75A5, 0xE16D, 0x75AB, 0x8975, + 0x75B1, 0xE176, 0x75B2, 0x94E6, 0x75B3, 0xE170, 0x75B5, 0xE172, + 0x75B8, 0xE174, 0x75B9, 0x905D, 0x75BC, 0xE175, 0x75BD, 0xE173, + 0x75BE, 0x8EBE, 0x75C2, 0xE16F, 0x75C3, 0xE171, 0x75C5, 0x9561, + 0x75C7, 0x8FC7, 0x75CA, 0xE178, 0x75CD, 0xE177, 0x75D2, 0xE179, + 0x75D4, 0x8EA4, 0x75D5, 0x8DAD, 0x75D8, 0x9397, 0x75D9, 0xE17A, + 0x75DB, 0x92C9, 0x75DE, 0xE17C, 0x75E2, 0x979F, 0x75E3, 0xE17B, + 0x75E9, 0x9189, 0x75F0, 0xE182, 0x75F2, 0xE184, 0x75F3, 0xE185, + 0x75F4, 0x9273, 0x75FA, 0xE183, 0x75FC, 0xE180, 0x75FE, 0xE17D, + 0x75FF, 0xE17E, 0x7601, 0xE181, 0x7609, 0xE188, 0x760B, 0xE186, + 0x760D, 0xE187, 0x761F, 0xE189, 0x7620, 0xE18B, 0x7621, 0xE18C, + 0x7622, 0xE18D, 0x7624, 0xE18E, 0x7627, 0xE18A, 0x7630, 0xE190, + 0x7634, 0xE18F, 0x763B, 0xE191, 0x7642, 0x97C3, 0x7646, 0xE194, + 0x7647, 0xE192, 0x7648, 0xE193, 0x764C, 0x8AE0, 0x7652, 0x96FC, + 0x7656, 0x95C8, 0x7658, 0xE196, 0x765C, 0xE195, 0x7661, 0xE197, + 0x7662, 0xE198, 0x7667, 0xE19C, 0x7668, 0xE199, 0x7669, 0xE19A, + 0x766A, 0xE19B, 0x766C, 0xE19D, 0x7670, 0xE19E, 0x7672, 0xE19F, + 0x7676, 0xE1A0, 0x7678, 0xE1A1, 0x767A, 0x94AD, 0x767B, 0x936F, + 0x767C, 0xE1A2, 0x767D, 0x9492, 0x767E, 0x9553, 0x7680, 0xE1A3, + 0x7682, 0xFB70, 0x7683, 0xE1A4, 0x7684, 0x9349, 0x7686, 0x8A46, + 0x7687, 0x8D63, 0x7688, 0xE1A5, 0x768B, 0xE1A6, 0x768E, 0xE1A7, + 0x7690, 0x8E48, 0x7693, 0xE1A9, 0x7696, 0xE1A8, 0x7699, 0xE1AA, + 0x769A, 0xE1AB, 0x769B, 0xFB73, 0x769C, 0xFB71, 0x769E, 0xFB72, + 0x76A6, 0xFB74, 0x76AE, 0x94E7, 0x76B0, 0xE1AC, 0x76B4, 0xE1AD, + 0x76B7, 0xEA89, 0x76B8, 0xE1AE, 0x76B9, 0xE1AF, 0x76BA, 0xE1B0, + 0x76BF, 0x8E4D, 0x76C2, 0xE1B1, 0x76C3, 0x9475, 0x76C6, 0x967E, + 0x76C8, 0x896D, 0x76CA, 0x8976, 0x76CD, 0xE1B2, 0x76D2, 0xE1B4, + 0x76D6, 0xE1B3, 0x76D7, 0x9390, 0x76DB, 0x90B7, 0x76DC, 0x9F58, + 0x76DE, 0xE1B5, 0x76DF, 0x96BF, 0x76E1, 0xE1B6, 0x76E3, 0x8AC4, + 0x76E4, 0x94D5, 0x76E5, 0xE1B7, 0x76E7, 0xE1B8, 0x76EA, 0xE1B9, + 0x76EE, 0x96DA, 0x76F2, 0x96D3, 0x76F4, 0x92BC, 0x76F8, 0x918A, + 0x76FB, 0xE1BB, 0x76FE, 0x8F82, 0x7701, 0x8FC8, 0x7704, 0xE1BE, + 0x7707, 0xE1BD, 0x7708, 0xE1BC, 0x7709, 0x94FB, 0x770B, 0x8AC5, + 0x770C, 0x8CA7, 0x771B, 0xE1C4, 0x771E, 0xE1C1, 0x771F, 0x905E, + 0x7720, 0x96B0, 0x7724, 0xE1C0, 0x7725, 0xE1C2, 0x7726, 0xE1C3, + 0x7729, 0xE1BF, 0x7737, 0xE1C5, 0x7738, 0xE1C6, 0x773A, 0x92AD, + 0x773C, 0x8AE1, 0x7740, 0x9285, 0x7746, 0xFB76, 0x7747, 0xE1C7, + 0x775A, 0xE1C8, 0x775B, 0xE1CB, 0x7761, 0x9087, 0x7763, 0x93C2, + 0x7765, 0xE1CC, 0x7766, 0x9672, 0x7768, 0xE1C9, 0x776B, 0xE1CA, + 0x7779, 0xE1CF, 0x777E, 0xE1CE, 0x777F, 0xE1CD, 0x778B, 0xE1D1, + 0x778E, 0xE1D0, 0x7791, 0xE1D2, 0x779E, 0xE1D4, 0x77A0, 0xE1D3, + 0x77A5, 0x95CB, 0x77AC, 0x8F75, 0x77AD, 0x97C4, 0x77B0, 0xE1D5, + 0x77B3, 0x93B5, 0x77B6, 0xE1D6, 0x77B9, 0xE1D7, 0x77BB, 0xE1DB, + 0x77BC, 0xE1D9, 0x77BD, 0xE1DA, 0x77BF, 0xE1D8, 0x77C7, 0xE1DC, + 0x77CD, 0xE1DD, 0x77D7, 0xE1DE, 0x77DA, 0xE1DF, 0x77DB, 0x96B5, + 0x77DC, 0xE1E0, 0x77E2, 0x96EE, 0x77E3, 0xE1E1, 0x77E5, 0x926D, + 0x77E7, 0x948A, 0x77E9, 0x8BE9, 0x77ED, 0x925A, 0x77EE, 0xE1E2, + 0x77EF, 0x8BB8, 0x77F3, 0x90CE, 0x77FC, 0xE1E3, 0x7802, 0x8DBB, + 0x780C, 0xE1E4, 0x7812, 0xE1E5, 0x7814, 0x8CA4, 0x7815, 0x8DD3, + 0x7820, 0xE1E7, 0x7821, 0xFB78, 0x7825, 0x9375, 0x7826, 0x8DD4, + 0x7827, 0x8B6D, 0x7832, 0x9643, 0x7834, 0x946A, 0x783A, 0x9376, + 0x783F, 0x8D7B, 0x7845, 0xE1E9, 0x784E, 0xFB79, 0x785D, 0x8FC9, + 0x7864, 0xFB7A, 0x786B, 0x97B0, 0x786C, 0x8D64, 0x786F, 0x8CA5, + 0x7872, 0x94A1, 0x7874, 0xE1EB, 0x787A, 0xFB7B, 0x787C, 0xE1ED, + 0x7881, 0x8CE9, 0x7886, 0xE1EC, 0x7887, 0x92F4, 0x788C, 0xE1EF, + 0x788D, 0x8A56, 0x788E, 0xE1EA, 0x7891, 0x94E8, 0x7893, 0x894F, + 0x7895, 0x8DEA, 0x7897, 0x9871, 0x789A, 0xE1EE, 0x78A3, 0xE1F0, + 0x78A7, 0x95C9, 0x78A9, 0x90D7, 0x78AA, 0xE1F2, 0x78AF, 0xE1F3, + 0x78B5, 0xE1F1, 0x78BA, 0x8A6D, 0x78BC, 0xE1F9, 0x78BE, 0xE1F8, + 0x78C1, 0x8EA5, 0x78C5, 0xE1FA, 0x78C6, 0xE1F5, 0x78CA, 0xE1FB, + 0x78CB, 0xE1F6, 0x78D0, 0x94D6, 0x78D1, 0xE1F4, 0x78D4, 0xE1F7, + 0x78DA, 0xE241, 0x78E7, 0xE240, 0x78E8, 0x9681, 0x78EC, 0xE1FC, + 0x78EF, 0x88E9, 0x78F4, 0xE243, 0x78FD, 0xE242, 0x7901, 0x8FCA, + 0x7907, 0xE244, 0x790E, 0x9162, 0x7911, 0xE246, 0x7912, 0xE245, + 0x7919, 0xE247, 0x7926, 0xE1E6, 0x792A, 0xE1E8, 0x792B, 0xE249, + 0x792C, 0xE248, 0x7930, 0xFB7C, 0x793A, 0x8EA6, 0x793C, 0x97E7, + 0x793E, 0x8ED0, 0x7940, 0xE24A, 0x7941, 0x8C56, 0x7947, 0x8B5F, + 0x7948, 0x8B46, 0x7949, 0x8E83, 0x7950, 0x9753, 0x7953, 0xE250, + 0x7955, 0xE24F, 0x7956, 0x9163, 0x7957, 0xE24C, 0x795A, 0xE24E, + 0x795D, 0x8F6A, 0x795E, 0x905F, 0x795F, 0xE24D, 0x7960, 0xE24B, + 0x7962, 0x9449, 0x7965, 0x8FCB, 0x7968, 0x955B, 0x796D, 0x8DD5, + 0x7977, 0x9398, 0x797A, 0xE251, 0x797F, 0xE252, 0x7980, 0xE268, + 0x7981, 0x8BD6, 0x7984, 0x985C, 0x7985, 0x9154, 0x798A, 0xE253, + 0x798D, 0x89D0, 0x798E, 0x92F5, 0x798F, 0x959F, 0x7994, 0xFB81, + 0x799B, 0xFB83, 0x799D, 0xE254, 0x79A6, 0x8B9A, 0x79A7, 0xE255, + 0x79AA, 0xE257, 0x79AE, 0xE258, 0x79B0, 0x9448, 0x79B3, 0xE259, + 0x79B9, 0xE25A, 0x79BA, 0xE25B, 0x79BD, 0x8BD7, 0x79BE, 0x89D1, + 0x79BF, 0x93C3, 0x79C0, 0x8F47, 0x79C1, 0x8E84, 0x79C9, 0xE25C, + 0x79CB, 0x8F48, 0x79D1, 0x89C8, 0x79D2, 0x9562, 0x79D5, 0xE25D, + 0x79D8, 0x94E9, 0x79DF, 0x9164, 0x79E1, 0xE260, 0x79E3, 0xE261, + 0x79E4, 0x9489, 0x79E6, 0x9060, 0x79E7, 0xE25E, 0x79E9, 0x9281, + 0x79EC, 0xE25F, 0x79F0, 0x8FCC, 0x79FB, 0x88DA, 0x7A00, 0x8B48, + 0x7A08, 0xE262, 0x7A0B, 0x92F6, 0x7A0D, 0xE263, 0x7A0E, 0x90C5, + 0x7A14, 0x96AB, 0x7A17, 0x9542, 0x7A18, 0xE264, 0x7A19, 0xE265, + 0x7A1A, 0x9274, 0x7A1C, 0x97C5, 0x7A1F, 0xE267, 0x7A20, 0xE266, + 0x7A2E, 0x8EED, 0x7A31, 0xE269, 0x7A32, 0x88EE, 0x7A37, 0xE26C, + 0x7A3B, 0xE26A, 0x7A3C, 0x89D2, 0x7A3D, 0x8C6D, 0x7A3E, 0xE26B, + 0x7A3F, 0x8D65, 0x7A40, 0x8D92, 0x7A42, 0x95E4, 0x7A43, 0xE26D, + 0x7A46, 0x9673, 0x7A49, 0xE26F, 0x7A4D, 0x90CF, 0x7A4E, 0x896E, + 0x7A4F, 0x89B8, 0x7A50, 0x88AA, 0x7A57, 0xE26E, 0x7A61, 0xE270, + 0x7A62, 0xE271, 0x7A63, 0x8FF5, 0x7A69, 0xE272, 0x7A6B, 0x8A6E, + 0x7A70, 0xE274, 0x7A74, 0x8C8A, 0x7A76, 0x8B86, 0x7A79, 0xE275, + 0x7A7A, 0x8BF3, 0x7A7D, 0xE276, 0x7A7F, 0x90FA, 0x7A81, 0x93CB, + 0x7A83, 0x90DE, 0x7A84, 0x8DF3, 0x7A88, 0xE277, 0x7A92, 0x9282, + 0x7A93, 0x918B, 0x7A95, 0xE279, 0x7A96, 0xE27B, 0x7A97, 0xE278, + 0x7A98, 0xE27A, 0x7A9F, 0x8C41, 0x7AA9, 0xE27C, 0x7AAA, 0x8C45, + 0x7AAE, 0x8B87, 0x7AAF, 0x9771, 0x7AB0, 0xE27E, 0x7AB6, 0xE280, + 0x7ABA, 0x894D, 0x7ABF, 0xE283, 0x7AC3, 0x8A96, 0x7AC4, 0xE282, + 0x7AC5, 0xE281, 0x7AC7, 0xE285, 0x7AC8, 0xE27D, 0x7ACA, 0xE286, + 0x7ACB, 0x97A7, 0x7ACD, 0xE287, 0x7ACF, 0xE288, 0x7AD1, 0xFB84, + 0x7AD2, 0x9AF2, 0x7AD3, 0xE28A, 0x7AD5, 0xE289, 0x7AD9, 0xE28B, + 0x7ADA, 0xE28C, 0x7ADC, 0x97B3, 0x7ADD, 0xE28D, 0x7ADF, 0xE8ED, + 0x7AE0, 0x8FCD, 0x7AE1, 0xE28E, 0x7AE2, 0xE28F, 0x7AE3, 0x8F76, + 0x7AE5, 0x93B6, 0x7AE6, 0xE290, 0x7AE7, 0xFB85, 0x7AEA, 0x9247, + 0x7AEB, 0xFB87, 0x7AED, 0xE291, 0x7AEF, 0x925B, 0x7AF0, 0xE292, + 0x7AF6, 0x8BA3, 0x7AF8, 0x995E, 0x7AF9, 0x927C, 0x7AFA, 0x8EB1, + 0x7AFF, 0x8AC6, 0x7B02, 0xE293, 0x7B04, 0xE2A0, 0x7B06, 0xE296, + 0x7B08, 0x8B88, 0x7B0A, 0xE295, 0x7B0B, 0xE2A2, 0x7B0F, 0xE294, + 0x7B11, 0x8FCE, 0x7B18, 0xE298, 0x7B19, 0xE299, 0x7B1B, 0x934A, + 0x7B1E, 0xE29A, 0x7B20, 0x8A7D, 0x7B25, 0x9079, 0x7B26, 0x9584, + 0x7B28, 0xE29C, 0x7B2C, 0x91E6, 0x7B33, 0xE297, 0x7B35, 0xE29B, + 0x7B36, 0xE29D, 0x7B39, 0x8DF9, 0x7B45, 0xE2A4, 0x7B46, 0x954D, + 0x7B48, 0x94A4, 0x7B49, 0x9399, 0x7B4B, 0x8BD8, 0x7B4C, 0xE2A3, + 0x7B4D, 0xE2A1, 0x7B4F, 0x94B3, 0x7B50, 0xE29E, 0x7B51, 0x927D, + 0x7B52, 0x939B, 0x7B54, 0x939A, 0x7B56, 0x8DF4, 0x7B5D, 0xE2B6, + 0x7B65, 0xE2A6, 0x7B67, 0xE2A8, 0x7B6C, 0xE2AB, 0x7B6E, 0xE2AC, + 0x7B70, 0xE2A9, 0x7B71, 0xE2AA, 0x7B74, 0xE2A7, 0x7B75, 0xE2A5, + 0x7B7A, 0xE29F, 0x7B86, 0x95CD, 0x7B87, 0x89D3, 0x7B8B, 0xE2B3, + 0x7B8D, 0xE2B0, 0x7B8F, 0xE2B5, 0x7B92, 0xE2B4, 0x7B94, 0x9493, + 0x7B95, 0x96A5, 0x7B97, 0x8E5A, 0x7B98, 0xE2AE, 0x7B99, 0xE2B7, + 0x7B9A, 0xE2B2, 0x7B9C, 0xE2B1, 0x7B9D, 0xE2AD, 0x7B9E, 0xFB88, + 0x7B9F, 0xE2AF, 0x7BA1, 0x8AC7, 0x7BAA, 0x925C, 0x7BAD, 0x90FB, + 0x7BB1, 0x94A0, 0x7BB4, 0xE2BC, 0x7BB8, 0x94A2, 0x7BC0, 0x90DF, + 0x7BC1, 0xE2B9, 0x7BC4, 0x94CD, 0x7BC6, 0xE2BD, 0x7BC7, 0x95D1, + 0x7BC9, 0x927A, 0x7BCB, 0xE2B8, 0x7BCC, 0xE2BA, 0x7BCF, 0xE2BB, + 0x7BDD, 0xE2BE, 0x7BE0, 0x8EC2, 0x7BE4, 0x93C4, 0x7BE5, 0xE2C3, + 0x7BE6, 0xE2C2, 0x7BE9, 0xE2BF, 0x7BED, 0x9855, 0x7BF3, 0xE2C8, + 0x7BF6, 0xE2CC, 0x7BF7, 0xE2C9, 0x7C00, 0xE2C5, 0x7C07, 0xE2C6, + 0x7C0D, 0xE2CB, 0x7C11, 0xE2C0, 0x7C12, 0x99D3, 0x7C13, 0xE2C7, + 0x7C14, 0xE2C1, 0x7C17, 0xE2CA, 0x7C1F, 0xE2D0, 0x7C21, 0x8AC8, + 0x7C23, 0xE2CD, 0x7C27, 0xE2CE, 0x7C2A, 0xE2CF, 0x7C2B, 0xE2D2, + 0x7C37, 0xE2D1, 0x7C38, 0x94F4, 0x7C3D, 0xE2D3, 0x7C3E, 0x97FA, + 0x7C3F, 0x95EB, 0x7C40, 0xE2D8, 0x7C43, 0xE2D5, 0x7C4C, 0xE2D4, + 0x7C4D, 0x90D0, 0x7C4F, 0xE2D7, 0x7C50, 0xE2D9, 0x7C54, 0xE2D6, + 0x7C56, 0xE2DD, 0x7C58, 0xE2DA, 0x7C5F, 0xE2DB, 0x7C60, 0xE2C4, + 0x7C64, 0xE2DC, 0x7C65, 0xE2DE, 0x7C6C, 0xE2DF, 0x7C73, 0x95C4, + 0x7C75, 0xE2E0, 0x7C7E, 0x96E0, 0x7C81, 0x8BCC, 0x7C82, 0x8C48, + 0x7C83, 0xE2E1, 0x7C89, 0x95B2, 0x7C8B, 0x9088, 0x7C8D, 0x96AE, + 0x7C90, 0xE2E2, 0x7C92, 0x97B1, 0x7C95, 0x9494, 0x7C97, 0x9165, + 0x7C98, 0x9453, 0x7C9B, 0x8F6C, 0x7C9F, 0x88BE, 0x7CA1, 0xE2E7, + 0x7CA2, 0xE2E5, 0x7CA4, 0xE2E3, 0x7CA5, 0x8A9F, 0x7CA7, 0x8FCF, + 0x7CA8, 0xE2E8, 0x7CAB, 0xE2E6, 0x7CAD, 0xE2E4, 0x7CAE, 0xE2EC, + 0x7CB1, 0xE2EB, 0x7CB2, 0xE2EA, 0x7CB3, 0xE2E9, 0x7CB9, 0xE2ED, + 0x7CBD, 0xE2EE, 0x7CBE, 0x90B8, 0x7CC0, 0xE2EF, 0x7CC2, 0xE2F1, + 0x7CC5, 0xE2F0, 0x7CCA, 0x8CD0, 0x7CCE, 0x9157, 0x7CD2, 0xE2F3, + 0x7CD6, 0x939C, 0x7CD8, 0xE2F2, 0x7CDC, 0xE2F4, 0x7CDE, 0x95B3, + 0x7CDF, 0x918C, 0x7CE0, 0x8D66, 0x7CE2, 0xE2F5, 0x7CE7, 0x97C6, + 0x7CEF, 0xE2F7, 0x7CF2, 0xE2F8, 0x7CF4, 0xE2F9, 0x7CF6, 0xE2FA, + 0x7CF8, 0x8E85, 0x7CFA, 0xE2FB, 0x7CFB, 0x8C6E, 0x7CFE, 0x8B8A, + 0x7D00, 0x8B49, 0x7D02, 0xE340, 0x7D04, 0x96F1, 0x7D05, 0x8D67, + 0x7D06, 0xE2FC, 0x7D0A, 0xE343, 0x7D0B, 0x96E4, 0x7D0D, 0x945B, + 0x7D10, 0x9552, 0x7D14, 0x8F83, 0x7D15, 0xE342, 0x7D17, 0x8ED1, + 0x7D18, 0x8D68, 0x7D19, 0x8E86, 0x7D1A, 0x8B89, 0x7D1B, 0x95B4, + 0x7D1C, 0xE341, 0x7D20, 0x9166, 0x7D21, 0x9661, 0x7D22, 0x8DF5, + 0x7D2B, 0x8E87, 0x7D2C, 0x92DB, 0x7D2E, 0xE346, 0x7D2F, 0x97DD, + 0x7D30, 0x8DD7, 0x7D32, 0xE347, 0x7D33, 0x9061, 0x7D35, 0xE349, + 0x7D39, 0x8FD0, 0x7D3A, 0x8DAE, 0x7D3F, 0xE348, 0x7D42, 0x8F49, + 0x7D43, 0x8CBC, 0x7D44, 0x9167, 0x7D45, 0xE344, 0x7D46, 0xE34A, + 0x7D48, 0xFB8A, 0x7D4B, 0xE345, 0x7D4C, 0x8C6F, 0x7D4E, 0xE34D, + 0x7D4F, 0xE351, 0x7D50, 0x8C8B, 0x7D56, 0xE34C, 0x7D5B, 0xE355, + 0x7D5C, 0xFB8B, 0x7D5E, 0x8D69, 0x7D61, 0x978D, 0x7D62, 0x88BA, + 0x7D63, 0xE352, 0x7D66, 0x8B8B, 0x7D68, 0xE34F, 0x7D6E, 0xE350, + 0x7D71, 0x939D, 0x7D72, 0xE34E, 0x7D73, 0xE34B, 0x7D75, 0x8A47, + 0x7D76, 0x90E2, 0x7D79, 0x8CA6, 0x7D7D, 0xE357, 0x7D89, 0xE354, + 0x7D8F, 0xE356, 0x7D93, 0xE353, 0x7D99, 0x8C70, 0x7D9A, 0x91B1, + 0x7D9B, 0xE358, 0x7D9C, 0x918E, 0x7D9F, 0xE365, 0x7DA0, 0xFB8D, + 0x7DA2, 0xE361, 0x7DA3, 0xE35B, 0x7DAB, 0xE35F, 0x7DAC, 0x8EF8, + 0x7DAD, 0x88DB, 0x7DAE, 0xE35A, 0x7DAF, 0xE362, 0x7DB0, 0xE366, + 0x7DB1, 0x8D6A, 0x7DB2, 0x96D4, 0x7DB4, 0x92D4, 0x7DB5, 0xE35C, + 0x7DB7, 0xFB8C, 0x7DB8, 0xE364, 0x7DBA, 0xE359, 0x7DBB, 0x925D, + 0x7DBD, 0xE35E, 0x7DBE, 0x88BB, 0x7DBF, 0x96C8, 0x7DC7, 0xE35D, + 0x7DCA, 0x8BD9, 0x7DCB, 0x94EA, 0x7DCF, 0x918D, 0x7DD1, 0x97CE, + 0x7DD2, 0x8F8F, 0x7DD5, 0xE38E, 0x7DD6, 0xFB8E, 0x7DD8, 0xE367, + 0x7DDA, 0x90FC, 0x7DDC, 0xE363, 0x7DDD, 0xE368, 0x7DDE, 0xE36A, + 0x7DE0, 0x92F7, 0x7DE1, 0xE36D, 0x7DE4, 0xE369, 0x7DE8, 0x95D2, + 0x7DE9, 0x8AC9, 0x7DEC, 0x96C9, 0x7DEF, 0x88DC, 0x7DF2, 0xE36C, + 0x7DF4, 0x97FB, 0x7DFB, 0xE36B, 0x7E01, 0x898F, 0x7E04, 0x93EA, + 0x7E05, 0xE36E, 0x7E09, 0xE375, 0x7E0A, 0xE36F, 0x7E0B, 0xE376, + 0x7E12, 0xE372, 0x7E1B, 0x949B, 0x7E1E, 0x8EC8, 0x7E1F, 0xE374, + 0x7E21, 0xE371, 0x7E22, 0xE377, 0x7E23, 0xE370, 0x7E26, 0x8F63, + 0x7E2B, 0x9644, 0x7E2E, 0x8F6B, 0x7E31, 0xE373, 0x7E32, 0xE380, + 0x7E35, 0xE37B, 0x7E37, 0xE37E, 0x7E39, 0xE37C, 0x7E3A, 0xE381, + 0x7E3B, 0xE37A, 0x7E3D, 0xE360, 0x7E3E, 0x90D1, 0x7E41, 0x94C9, + 0x7E43, 0xE37D, 0x7E46, 0xE378, 0x7E4A, 0x9140, 0x7E4B, 0x8C71, + 0x7E4D, 0x8F4A, 0x7E52, 0xFB8F, 0x7E54, 0x9044, 0x7E55, 0x9155, + 0x7E56, 0xE384, 0x7E59, 0xE386, 0x7E5A, 0xE387, 0x7E5D, 0xE383, + 0x7E5E, 0xE385, 0x7E66, 0xE379, 0x7E67, 0xE382, 0x7E69, 0xE38A, + 0x7E6A, 0xE389, 0x7E6D, 0x969A, 0x7E70, 0x8C4A, 0x7E79, 0xE388, + 0x7E7B, 0xE38C, 0x7E7C, 0xE38B, 0x7E7D, 0xE38F, 0x7E7F, 0xE391, + 0x7E82, 0x8E5B, 0x7E83, 0xE38D, 0x7E88, 0xE392, 0x7E89, 0xE393, + 0x7E8A, 0xFA5C, 0x7E8C, 0xE394, 0x7E8E, 0xE39A, 0x7E8F, 0x935A, + 0x7E90, 0xE396, 0x7E92, 0xE395, 0x7E93, 0xE397, 0x7E94, 0xE398, + 0x7E96, 0xE399, 0x7E9B, 0xE39B, 0x7E9C, 0xE39C, 0x7F36, 0x8ACA, + 0x7F38, 0xE39D, 0x7F3A, 0xE39E, 0x7F45, 0xE39F, 0x7F47, 0xFB90, + 0x7F4C, 0xE3A0, 0x7F4D, 0xE3A1, 0x7F4E, 0xE3A2, 0x7F50, 0xE3A3, + 0x7F51, 0xE3A4, 0x7F54, 0xE3A6, 0x7F55, 0xE3A5, 0x7F58, 0xE3A7, + 0x7F5F, 0xE3A8, 0x7F60, 0xE3A9, 0x7F67, 0xE3AC, 0x7F68, 0xE3AA, + 0x7F69, 0xE3AB, 0x7F6A, 0x8DDF, 0x7F6B, 0x8C72, 0x7F6E, 0x9275, + 0x7F70, 0x94B1, 0x7F72, 0x8F90, 0x7F75, 0x946C, 0x7F77, 0x94EB, + 0x7F78, 0xE3AD, 0x7F79, 0x9CEB, 0x7F82, 0xE3AE, 0x7F83, 0xE3B0, + 0x7F85, 0x9785, 0x7F86, 0xE3AF, 0x7F87, 0xE3B2, 0x7F88, 0xE3B1, + 0x7F8A, 0x9772, 0x7F8C, 0xE3B3, 0x7F8E, 0x94FC, 0x7F94, 0xE3B4, + 0x7F9A, 0xE3B7, 0x7F9D, 0xE3B6, 0x7F9E, 0xE3B5, 0x7FA1, 0xFB91, + 0x7FA3, 0xE3B8, 0x7FA4, 0x8C51, 0x7FA8, 0x9141, 0x7FA9, 0x8B60, + 0x7FAE, 0xE3BC, 0x7FAF, 0xE3B9, 0x7FB2, 0xE3BA, 0x7FB6, 0xE3BD, + 0x7FB8, 0xE3BE, 0x7FB9, 0xE3BB, 0x7FBD, 0x8948, 0x7FC1, 0x89A5, + 0x7FC5, 0xE3C0, 0x7FC6, 0xE3C1, 0x7FCA, 0xE3C2, 0x7FCC, 0x9782, + 0x7FD2, 0x8F4B, 0x7FD4, 0xE3C4, 0x7FD5, 0xE3C3, 0x7FE0, 0x9089, + 0x7FE1, 0xE3C5, 0x7FE6, 0xE3C6, 0x7FE9, 0xE3C7, 0x7FEB, 0x8AE3, + 0x7FF0, 0x8ACB, 0x7FF3, 0xE3C8, 0x7FF9, 0xE3C9, 0x7FFB, 0x967C, + 0x7FFC, 0x9783, 0x8000, 0x9773, 0x8001, 0x9856, 0x8003, 0x8D6C, + 0x8004, 0xE3CC, 0x8005, 0x8ED2, 0x8006, 0xE3CB, 0x800B, 0xE3CD, + 0x800C, 0x8EA7, 0x8010, 0x91CF, 0x8012, 0xE3CE, 0x8015, 0x8D6B, + 0x8017, 0x96D5, 0x8018, 0xE3CF, 0x8019, 0xE3D0, 0x801C, 0xE3D1, + 0x8021, 0xE3D2, 0x8028, 0xE3D3, 0x8033, 0x8EA8, 0x8036, 0x96EB, + 0x803B, 0xE3D5, 0x803D, 0x925E, 0x803F, 0xE3D4, 0x8046, 0xE3D7, + 0x804A, 0xE3D6, 0x8052, 0xE3D8, 0x8056, 0x90B9, 0x8058, 0xE3D9, + 0x805A, 0xE3DA, 0x805E, 0x95B7, 0x805F, 0xE3DB, 0x8061, 0x918F, + 0x8062, 0xE3DC, 0x8068, 0xE3DD, 0x806F, 0x97FC, 0x8070, 0xE3E0, + 0x8072, 0xE3DF, 0x8073, 0xE3DE, 0x8074, 0x92AE, 0x8076, 0xE3E1, + 0x8077, 0x9045, 0x8079, 0xE3E2, 0x807D, 0xE3E3, 0x807E, 0x9857, + 0x807F, 0xE3E4, 0x8084, 0xE3E5, 0x8085, 0xE3E7, 0x8086, 0xE3E6, + 0x8087, 0x94A3, 0x8089, 0x93F7, 0x808B, 0x985D, 0x808C, 0x94A7, + 0x8093, 0xE3E9, 0x8096, 0x8FD1, 0x8098, 0x9549, 0x809A, 0xE3EA, + 0x809B, 0xE3E8, 0x809D, 0x8ACC, 0x80A1, 0x8CD2, 0x80A2, 0x8E88, + 0x80A5, 0x94EC, 0x80A9, 0x8CA8, 0x80AA, 0x9662, 0x80AC, 0xE3ED, + 0x80AD, 0xE3EB, 0x80AF, 0x8D6D, 0x80B1, 0x8D6E, 0x80B2, 0x88E7, + 0x80B4, 0x8DE6, 0x80BA, 0x9478, 0x80C3, 0x88DD, 0x80C4, 0xE3F2, + 0x80C6, 0x925F, 0x80CC, 0x9477, 0x80CE, 0x91D9, 0x80D6, 0xE3F4, + 0x80D9, 0xE3F0, 0x80DA, 0xE3F3, 0x80DB, 0xE3EE, 0x80DD, 0xE3F1, + 0x80DE, 0x9645, 0x80E1, 0x8CD3, 0x80E4, 0x88FB, 0x80E5, 0xE3EF, + 0x80EF, 0xE3F6, 0x80F1, 0xE3F7, 0x80F4, 0x93B7, 0x80F8, 0x8BB9, + 0x80FC, 0xE445, 0x80FD, 0x945C, 0x8102, 0x8E89, 0x8105, 0x8BBA, + 0x8106, 0x90C6, 0x8107, 0x9865, 0x8108, 0x96AC, 0x8109, 0xE3F5, + 0x810A, 0x90D2, 0x811A, 0x8B72, 0x811B, 0xE3F8, 0x8123, 0xE3FA, + 0x8129, 0xE3F9, 0x812F, 0xE3FB, 0x8131, 0x9245, 0x8133, 0x945D, + 0x8139, 0x92AF, 0x813E, 0xE442, 0x8146, 0xE441, 0x814B, 0xE3FC, + 0x814E, 0x9074, 0x8150, 0x9585, 0x8151, 0xE444, 0x8153, 0xE443, + 0x8154, 0x8D6F, 0x8155, 0x9872, 0x815F, 0xE454, 0x8165, 0xE448, + 0x8166, 0xE449, 0x816B, 0x8EEE, 0x816E, 0xE447, 0x8170, 0x8D98, + 0x8171, 0xE446, 0x8174, 0xE44A, 0x8178, 0x92B0, 0x8179, 0x95A0, + 0x817A, 0x9142, 0x817F, 0x91DA, 0x8180, 0xE44E, 0x8182, 0xE44F, + 0x8183, 0xE44B, 0x8188, 0xE44C, 0x818A, 0xE44D, 0x818F, 0x8D70, + 0x8193, 0xE455, 0x8195, 0xE451, 0x819A, 0x9586, 0x819C, 0x968C, + 0x819D, 0x9547, 0x81A0, 0xE450, 0x81A3, 0xE453, 0x81A4, 0xE452, + 0x81A8, 0x9663, 0x81A9, 0xE456, 0x81B0, 0xE457, 0x81B3, 0x9156, + 0x81B5, 0xE458, 0x81B8, 0xE45A, 0x81BA, 0xE45E, 0x81BD, 0xE45B, + 0x81BE, 0xE459, 0x81BF, 0x945E, 0x81C0, 0xE45C, 0x81C2, 0xE45D, + 0x81C6, 0x89B0, 0x81C8, 0xE464, 0x81C9, 0xE45F, 0x81CD, 0xE460, + 0x81D1, 0xE461, 0x81D3, 0x919F, 0x81D8, 0xE463, 0x81D9, 0xE462, + 0x81DA, 0xE465, 0x81DF, 0xE466, 0x81E0, 0xE467, 0x81E3, 0x9062, + 0x81E5, 0x89E7, 0x81E7, 0xE468, 0x81E8, 0x97D5, 0x81EA, 0x8EA9, + 0x81ED, 0x8F4C, 0x81F3, 0x8E8A, 0x81F4, 0x9276, 0x81FA, 0xE469, + 0x81FB, 0xE46A, 0x81FC, 0x8950, 0x81FE, 0xE46B, 0x8201, 0xE46C, + 0x8202, 0xE46D, 0x8205, 0xE46E, 0x8207, 0xE46F, 0x8208, 0x8BBB, + 0x8209, 0x9DA8, 0x820A, 0xE470, 0x820C, 0x90E3, 0x820D, 0xE471, + 0x820E, 0x8EC9, 0x8210, 0xE472, 0x8212, 0x98AE, 0x8216, 0xE473, + 0x8217, 0x95DC, 0x8218, 0x8ADA, 0x821B, 0x9143, 0x821C, 0x8F77, + 0x821E, 0x9591, 0x821F, 0x8F4D, 0x8229, 0xE474, 0x822A, 0x8D71, + 0x822B, 0xE475, 0x822C, 0x94CA, 0x822E, 0xE484, 0x8233, 0xE477, + 0x8235, 0x91C7, 0x8236, 0x9495, 0x8237, 0x8CBD, 0x8238, 0xE476, + 0x8239, 0x9144, 0x8240, 0xE478, 0x8247, 0x92F8, 0x8258, 0xE47A, + 0x8259, 0xE479, 0x825A, 0xE47C, 0x825D, 0xE47B, 0x825F, 0xE47D, + 0x8262, 0xE480, 0x8264, 0xE47E, 0x8266, 0x8ACD, 0x8268, 0xE481, + 0x826A, 0xE482, 0x826B, 0xE483, 0x826E, 0x8DAF, 0x826F, 0x97C7, + 0x8271, 0xE485, 0x8272, 0x9046, 0x8276, 0x8990, 0x8277, 0xE486, + 0x8278, 0xE487, 0x827E, 0xE488, 0x828B, 0x88F0, 0x828D, 0xE489, + 0x8292, 0xE48A, 0x8299, 0x9587, 0x829D, 0x8EC5, 0x829F, 0xE48C, + 0x82A5, 0x8A48, 0x82A6, 0x88B0, 0x82AB, 0xE48B, 0x82AC, 0xE48E, + 0x82AD, 0x946D, 0x82AF, 0x9063, 0x82B1, 0x89D4, 0x82B3, 0x9646, + 0x82B8, 0x8C7C, 0x82B9, 0x8BDA, 0x82BB, 0xE48D, 0x82BD, 0x89E8, + 0x82C5, 0x8AA1, 0x82D1, 0x8991, 0x82D2, 0xE492, 0x82D3, 0x97E8, + 0x82D4, 0x91DB, 0x82D7, 0x9563, 0x82D9, 0xE49E, 0x82DB, 0x89D5, + 0x82DC, 0xE49C, 0x82DE, 0xE49A, 0x82DF, 0xE491, 0x82E1, 0xE48F, + 0x82E3, 0xE490, 0x82E5, 0x8EE1, 0x82E6, 0x8BEA, 0x82E7, 0x9297, + 0x82EB, 0x93CF, 0x82F1, 0x8970, 0x82F3, 0xE494, 0x82F4, 0xE493, + 0x82F9, 0xE499, 0x82FA, 0xE495, 0x82FB, 0xE498, 0x8301, 0xFB93, + 0x8302, 0x96CE, 0x8303, 0xE497, 0x8304, 0x89D6, 0x8305, 0x8A9D, + 0x8306, 0xE49B, 0x8309, 0xE49D, 0x830E, 0x8C73, 0x8316, 0xE4A1, + 0x8317, 0xE4AA, 0x8318, 0xE4AB, 0x831C, 0x88A9, 0x8323, 0xE4B2, + 0x8328, 0x88EF, 0x832B, 0xE4A9, 0x832F, 0xE4A8, 0x8331, 0xE4A3, + 0x8332, 0xE4A2, 0x8334, 0xE4A0, 0x8335, 0xE49F, 0x8336, 0x9283, + 0x8338, 0x91F9, 0x8339, 0xE4A5, 0x8340, 0xE4A4, 0x8345, 0xE4A7, + 0x8349, 0x9190, 0x834A, 0x8C74, 0x834F, 0x8960, 0x8350, 0xE4A6, + 0x8352, 0x8D72, 0x8358, 0x9191, 0x8362, 0xFB94, 0x8373, 0xE4B8, + 0x8375, 0xE4B9, 0x8377, 0x89D7, 0x837B, 0x89AC, 0x837C, 0xE4B6, + 0x837F, 0xFB95, 0x8385, 0xE4AC, 0x8387, 0xE4B4, 0x8389, 0xE4BB, + 0x838A, 0xE4B5, 0x838E, 0xE4B3, 0x8393, 0xE496, 0x8396, 0xE4B1, + 0x839A, 0xE4AD, 0x839E, 0x8ACE, 0x839F, 0xE4AF, 0x83A0, 0xE4BA, + 0x83A2, 0xE4B0, 0x83A8, 0xE4BC, 0x83AA, 0xE4AE, 0x83AB, 0x949C, + 0x83B1, 0x9789, 0x83B5, 0xE4B7, 0x83BD, 0xE4CD, 0x83C1, 0xE4C5, + 0x83C5, 0x909B, 0x83C7, 0xFB96, 0x83CA, 0x8B65, 0x83CC, 0x8BDB, + 0x83CE, 0xE4C0, 0x83D3, 0x89D9, 0x83D6, 0x8FD2, 0x83D8, 0xE4C3, + 0x83DC, 0x8DD8, 0x83DF, 0x9370, 0x83E0, 0xE4C8, 0x83E9, 0x95EC, + 0x83EB, 0xE4BF, 0x83EF, 0x89D8, 0x83F0, 0x8CD4, 0x83F1, 0x9548, + 0x83F2, 0xE4C9, 0x83F4, 0xE4BD, 0x83F6, 0xFB97, 0x83F7, 0xE4C6, + 0x83FB, 0xE4D0, 0x83FD, 0xE4C1, 0x8403, 0xE4C2, 0x8404, 0x93B8, + 0x8407, 0xE4C7, 0x840B, 0xE4C4, 0x840C, 0x9647, 0x840D, 0xE4CA, + 0x840E, 0x88DE, 0x8413, 0xE4BE, 0x8420, 0xE4CC, 0x8422, 0xE4CB, + 0x8429, 0x948B, 0x842A, 0xE4D2, 0x842C, 0xE4DD, 0x8431, 0x8A9E, + 0x8435, 0xE4E0, 0x8438, 0xE4CE, 0x843C, 0xE4D3, 0x843D, 0x978E, + 0x8446, 0xE4DC, 0x8448, 0xFB98, 0x8449, 0x9774, 0x844E, 0x97A8, + 0x8457, 0x9298, 0x845B, 0x8A8B, 0x8461, 0x9592, 0x8462, 0xE4E2, + 0x8463, 0x939F, 0x8466, 0x88AF, 0x8469, 0xE4DB, 0x846B, 0xE4D7, + 0x846C, 0x9192, 0x846D, 0xE4D1, 0x846E, 0xE4D9, 0x846F, 0xE4DE, + 0x8471, 0x944B, 0x8475, 0x88A8, 0x8477, 0xE4D6, 0x8479, 0xE4DF, + 0x847A, 0x9598, 0x8482, 0xE4DA, 0x8484, 0xE4D5, 0x848B, 0x8FD3, + 0x8490, 0x8F4E, 0x8494, 0x8EAA, 0x8499, 0x96D6, 0x849C, 0x9566, + 0x849F, 0xE4E5, 0x84A1, 0xE4EE, 0x84AD, 0xE4D8, 0x84B2, 0x8A97, + 0x84B4, 0xFB99, 0x84B8, 0x8FF6, 0x84B9, 0xE4E3, 0x84BB, 0xE4E8, + 0x84BC, 0x9193, 0x84BF, 0xE4E4, 0x84C1, 0xE4EB, 0x84C4, 0x927E, + 0x84C6, 0xE4EC, 0x84C9, 0x9775, 0x84CA, 0xE4E1, 0x84CB, 0x8A57, + 0x84CD, 0xE4E7, 0x84D0, 0xE4EA, 0x84D1, 0x96AA, 0x84D6, 0xE4ED, + 0x84D9, 0xE4E6, 0x84DA, 0xE4E9, 0x84DC, 0xFA60, 0x84EC, 0x9648, + 0x84EE, 0x9840, 0x84F4, 0xE4F1, 0x84FC, 0xE4F8, 0x84FF, 0xE4F0, + 0x8500, 0x8EC1, 0x8506, 0xE4CF, 0x8511, 0x95CC, 0x8513, 0x96A0, + 0x8514, 0xE4F7, 0x8515, 0xE4F6, 0x8517, 0xE4F2, 0x8518, 0xE4F3, + 0x851A, 0x8955, 0x851F, 0xE4F5, 0x8521, 0xE4EF, 0x8526, 0x92D3, + 0x852C, 0xE4F4, 0x852D, 0x88FC, 0x8535, 0x91A0, 0x853D, 0x95C1, + 0x8540, 0xE4F9, 0x8541, 0xE540, 0x8543, 0x94D7, 0x8548, 0xE4FC, + 0x8549, 0x8FD4, 0x854A, 0x8EC7, 0x854B, 0xE542, 0x854E, 0x8BBC, + 0x8553, 0xFB9A, 0x8555, 0xE543, 0x8557, 0x9599, 0x8558, 0xE4FB, + 0x8559, 0xFB9B, 0x855A, 0xE4D4, 0x8563, 0xE4FA, 0x8568, 0x986E, + 0x8569, 0x93A0, 0x856A, 0x9593, 0x856B, 0xFB9C, 0x856D, 0xE54A, + 0x8577, 0xE550, 0x857E, 0xE551, 0x8580, 0xE544, 0x8584, 0x9496, + 0x8587, 0xE54E, 0x8588, 0xE546, 0x858A, 0xE548, 0x8590, 0xE552, + 0x8591, 0xE547, 0x8594, 0xE54B, 0x8597, 0x8992, 0x8599, 0x93E3, + 0x859B, 0xE54C, 0x859C, 0xE54F, 0x85A4, 0xE545, 0x85A6, 0x9145, + 0x85A8, 0xE549, 0x85A9, 0x8E46, 0x85AA, 0x9064, 0x85AB, 0x8C4F, + 0x85AC, 0x96F2, 0x85AE, 0x96F7, 0x85AF, 0x8F92, 0x85B0, 0xFB9E, + 0x85B9, 0xE556, 0x85BA, 0xE554, 0x85C1, 0x986D, 0x85C9, 0xE553, + 0x85CD, 0x9795, 0x85CF, 0xE555, 0x85D0, 0xE557, 0x85D5, 0xE558, + 0x85DC, 0xE55B, 0x85DD, 0xE559, 0x85E4, 0x93A1, 0x85E5, 0xE55A, + 0x85E9, 0x94CB, 0x85EA, 0xE54D, 0x85F7, 0x8F93, 0x85F9, 0xE55C, + 0x85FA, 0xE561, 0x85FB, 0x9194, 0x85FE, 0xE560, 0x8602, 0xE541, + 0x8606, 0xE562, 0x8607, 0x9168, 0x860A, 0xE55D, 0x860B, 0xE55F, + 0x8613, 0xE55E, 0x8616, 0x9F50, 0x8617, 0x9F41, 0x861A, 0xE564, + 0x8622, 0xE563, 0x862D, 0x9796, 0x862F, 0xE1BA, 0x8630, 0xE565, + 0x863F, 0xE566, 0x864D, 0xE567, 0x864E, 0x8CD5, 0x8650, 0x8B73, + 0x8654, 0xE569, 0x8655, 0x997C, 0x865A, 0x8B95, 0x865C, 0x97B8, + 0x865E, 0x8BF1, 0x865F, 0xE56A, 0x8667, 0xE56B, 0x866B, 0x928E, + 0x8671, 0xE56C, 0x8679, 0x93F8, 0x867B, 0x88B8, 0x868A, 0x89E1, + 0x868B, 0xE571, 0x868C, 0xE572, 0x8693, 0xE56D, 0x8695, 0x8E5C, + 0x86A3, 0xE56E, 0x86A4, 0x9461, 0x86A9, 0xE56F, 0x86AA, 0xE570, + 0x86AB, 0xE57A, 0x86AF, 0xE574, 0x86B0, 0xE577, 0x86B6, 0xE573, + 0x86C4, 0xE575, 0x86C6, 0xE576, 0x86C7, 0x8ED6, 0x86C9, 0xE578, + 0x86CB, 0x9260, 0x86CD, 0x8C75, 0x86CE, 0x8A61, 0x86D4, 0xE57B, + 0x86D9, 0x8A5E, 0x86DB, 0xE581, 0x86DE, 0xE57C, 0x86DF, 0xE580, + 0x86E4, 0x94B8, 0x86E9, 0xE57D, 0x86EC, 0xE57E, 0x86ED, 0x9567, + 0x86EE, 0x94D8, 0x86EF, 0xE582, 0x86F8, 0x91FB, 0x86F9, 0xE58C, + 0x86FB, 0xE588, 0x86FE, 0x89E9, 0x8700, 0xE586, 0x8702, 0x9649, + 0x8703, 0xE587, 0x8706, 0xE584, 0x8708, 0xE585, 0x8709, 0xE58A, + 0x870A, 0xE58D, 0x870D, 0xE58B, 0x8711, 0xE589, 0x8712, 0xE583, + 0x8718, 0x9277, 0x871A, 0xE594, 0x871C, 0x96A8, 0x8725, 0xE592, + 0x8729, 0xE593, 0x8734, 0xE58E, 0x8737, 0xE590, 0x873B, 0xE591, + 0x873F, 0xE58F, 0x8749, 0x90E4, 0x874B, 0x9858, 0x874C, 0xE598, + 0x874E, 0xE599, 0x8753, 0xE59F, 0x8755, 0x9049, 0x8757, 0xE59B, + 0x8759, 0xE59E, 0x875F, 0xE596, 0x8760, 0xE595, 0x8763, 0xE5A0, + 0x8766, 0x89DA, 0x8768, 0xE59C, 0x876A, 0xE5A1, 0x876E, 0xE59D, + 0x8774, 0xE59A, 0x8776, 0x92B1, 0x8778, 0xE597, 0x877F, 0x9488, + 0x8782, 0xE5A5, 0x878D, 0x975A, 0x879F, 0xE5A4, 0x87A2, 0xE5A3, + 0x87AB, 0xE5AC, 0x87AF, 0xE5A6, 0x87B3, 0xE5AE, 0x87BA, 0x9786, + 0x87BB, 0xE5B1, 0x87BD, 0xE5A8, 0x87C0, 0xE5A9, 0x87C4, 0xE5AD, + 0x87C6, 0xE5B0, 0x87C7, 0xE5AF, 0x87CB, 0xE5A7, 0x87D0, 0xE5AA, + 0x87D2, 0xE5BB, 0x87E0, 0xE5B4, 0x87EF, 0xE5B2, 0x87F2, 0xE5B3, + 0x87F6, 0xE5B8, 0x87F7, 0xE5B9, 0x87F9, 0x8A49, 0x87FB, 0x8B61, + 0x87FE, 0xE5B7, 0x8805, 0xE5A2, 0x8807, 0xFBA1, 0x880D, 0xE5B6, + 0x880E, 0xE5BA, 0x880F, 0xE5B5, 0x8811, 0xE5BC, 0x8815, 0xE5BE, + 0x8816, 0xE5BD, 0x8821, 0xE5C0, 0x8822, 0xE5BF, 0x8823, 0xE579, + 0x8827, 0xE5C4, 0x8831, 0xE5C1, 0x8836, 0xE5C2, 0x8839, 0xE5C3, + 0x883B, 0xE5C5, 0x8840, 0x8C8C, 0x8842, 0xE5C7, 0x8844, 0xE5C6, + 0x8846, 0x8F4F, 0x884C, 0x8D73, 0x884D, 0x9FA5, 0x8852, 0xE5C8, + 0x8853, 0x8F70, 0x8857, 0x8A58, 0x8859, 0xE5C9, 0x885B, 0x8971, + 0x885D, 0x8FD5, 0x885E, 0xE5CA, 0x8861, 0x8D74, 0x8862, 0xE5CB, + 0x8863, 0x88DF, 0x8868, 0x955C, 0x886B, 0xE5CC, 0x8870, 0x908A, + 0x8872, 0xE5D3, 0x8875, 0xE5D0, 0x8877, 0x928F, 0x887D, 0xE5D1, + 0x887E, 0xE5CE, 0x887F, 0x8BDC, 0x8881, 0xE5CD, 0x8882, 0xE5D4, + 0x8888, 0x8C55, 0x888B, 0x91DC, 0x888D, 0xE5DA, 0x8892, 0xE5D6, + 0x8896, 0x91B3, 0x8897, 0xE5D5, 0x8899, 0xE5D8, 0x889E, 0xE5CF, + 0x88A2, 0xE5D9, 0x88A4, 0xE5DB, 0x88AB, 0x94ED, 0x88AE, 0xE5D7, + 0x88B0, 0xE5DC, 0x88B1, 0xE5DE, 0x88B4, 0x8CD1, 0x88B5, 0xE5D2, + 0x88B7, 0x88BF, 0x88BF, 0xE5DD, 0x88C1, 0x8DD9, 0x88C2, 0x97F4, + 0x88C3, 0xE5DF, 0x88C4, 0xE5E0, 0x88C5, 0x9195, 0x88CF, 0x97A0, + 0x88D4, 0xE5E1, 0x88D5, 0x9754, 0x88D8, 0xE5E2, 0x88D9, 0xE5E3, + 0x88DC, 0x95E2, 0x88DD, 0xE5E4, 0x88DF, 0x8DBE, 0x88E1, 0x97A1, + 0x88E8, 0xE5E9, 0x88F2, 0xE5EA, 0x88F3, 0x8FD6, 0x88F4, 0xE5E8, + 0x88F5, 0xFBA2, 0x88F8, 0x9787, 0x88F9, 0xE5E5, 0x88FC, 0xE5E7, + 0x88FD, 0x90BB, 0x88FE, 0x909E, 0x8902, 0xE5E6, 0x8904, 0xE5EB, + 0x8907, 0x95A1, 0x890A, 0xE5ED, 0x890C, 0xE5EC, 0x8910, 0x8A8C, + 0x8912, 0x964A, 0x8913, 0xE5EE, 0x891C, 0xFA5D, 0x891D, 0xE5FA, + 0x891E, 0xE5F0, 0x8925, 0xE5F1, 0x892A, 0xE5F2, 0x892B, 0xE5F3, + 0x8936, 0xE5F7, 0x8938, 0xE5F8, 0x893B, 0xE5F6, 0x8941, 0xE5F4, + 0x8943, 0xE5EF, 0x8944, 0xE5F5, 0x894C, 0xE5F9, 0x894D, 0xE8B5, + 0x8956, 0x89A6, 0x895E, 0xE5FC, 0x895F, 0x8BDD, 0x8960, 0xE5FB, + 0x8964, 0xE641, 0x8966, 0xE640, 0x896A, 0xE643, 0x896D, 0xE642, + 0x896F, 0xE644, 0x8972, 0x8F50, 0x8974, 0xE645, 0x8977, 0xE646, + 0x897E, 0xE647, 0x897F, 0x90BC, 0x8981, 0x9776, 0x8983, 0xE648, + 0x8986, 0x95A2, 0x8987, 0x9465, 0x8988, 0xE649, 0x898A, 0xE64A, + 0x898B, 0x8CA9, 0x898F, 0x8B4B, 0x8993, 0xE64B, 0x8996, 0x8E8B, + 0x8997, 0x9460, 0x8998, 0xE64C, 0x899A, 0x8A6F, 0x89A1, 0xE64D, + 0x89A6, 0xE64F, 0x89A7, 0x9797, 0x89A9, 0xE64E, 0x89AA, 0x9065, + 0x89AC, 0xE650, 0x89AF, 0xE651, 0x89B2, 0xE652, 0x89B3, 0x8ACF, + 0x89BA, 0xE653, 0x89BD, 0xE654, 0x89BF, 0xE655, 0x89C0, 0xE656, + 0x89D2, 0x8A70, 0x89DA, 0xE657, 0x89DC, 0xE658, 0x89DD, 0xE659, + 0x89E3, 0x89F0, 0x89E6, 0x9047, 0x89E7, 0xE65A, 0x89F4, 0xE65B, + 0x89F8, 0xE65C, 0x8A00, 0x8CBE, 0x8A02, 0x92F9, 0x8A03, 0xE65D, + 0x8A08, 0x8C76, 0x8A0A, 0x9075, 0x8A0C, 0xE660, 0x8A0E, 0x93A2, + 0x8A10, 0xE65F, 0x8A12, 0xFBA3, 0x8A13, 0x8C50, 0x8A16, 0xE65E, + 0x8A17, 0x91F5, 0x8A18, 0x8B4C, 0x8A1B, 0xE661, 0x8A1D, 0xE662, + 0x8A1F, 0x8FD7, 0x8A23, 0x8C8D, 0x8A25, 0xE663, 0x8A2A, 0x964B, + 0x8A2D, 0x90DD, 0x8A31, 0x8B96, 0x8A33, 0x96F3, 0x8A34, 0x9169, + 0x8A36, 0xE664, 0x8A37, 0xFBA4, 0x8A3A, 0x9066, 0x8A3B, 0x9290, + 0x8A3C, 0x8FD8, 0x8A41, 0xE665, 0x8A46, 0xE668, 0x8A48, 0xE669, + 0x8A50, 0x8DBC, 0x8A51, 0x91C0, 0x8A52, 0xE667, 0x8A54, 0x8FD9, + 0x8A55, 0x955D, 0x8A5B, 0xE666, 0x8A5E, 0x8E8C, 0x8A60, 0x8972, + 0x8A62, 0xE66D, 0x8A63, 0x8C77, 0x8A66, 0x8E8E, 0x8A69, 0x8E8D, + 0x8A6B, 0x986C, 0x8A6C, 0xE66C, 0x8A6D, 0xE66B, 0x8A6E, 0x9146, + 0x8A70, 0x8B6C, 0x8A71, 0x9862, 0x8A72, 0x8A59, 0x8A73, 0x8FDA, + 0x8A79, 0xFBA5, 0x8A7C, 0xE66A, 0x8A82, 0xE66F, 0x8A84, 0xE670, + 0x8A85, 0xE66E, 0x8A87, 0x8CD6, 0x8A89, 0x975F, 0x8A8C, 0x8E8F, + 0x8A8D, 0x9446, 0x8A91, 0xE673, 0x8A93, 0x90BE, 0x8A95, 0x9261, + 0x8A98, 0x9755, 0x8A9A, 0xE676, 0x8A9E, 0x8CEA, 0x8AA0, 0x90BD, + 0x8AA1, 0xE672, 0x8AA3, 0xE677, 0x8AA4, 0x8CEB, 0x8AA5, 0xE674, + 0x8AA6, 0xE675, 0x8AA7, 0xFBA6, 0x8AA8, 0xE671, 0x8AAC, 0x90E0, + 0x8AAD, 0x93C7, 0x8AB0, 0x924E, 0x8AB2, 0x89DB, 0x8AB9, 0x94EE, + 0x8ABC, 0x8B62, 0x8ABE, 0xFBA7, 0x8ABF, 0x92B2, 0x8AC2, 0xE67A, + 0x8AC4, 0xE678, 0x8AC7, 0x926B, 0x8ACB, 0x90BF, 0x8ACC, 0x8AD0, + 0x8ACD, 0xE679, 0x8ACF, 0x907A, 0x8AD2, 0x97C8, 0x8AD6, 0x985F, + 0x8ADA, 0xE67B, 0x8ADB, 0xE687, 0x8ADC, 0x92B3, 0x8ADE, 0xE686, + 0x8ADF, 0xFBA8, 0x8AE0, 0xE683, 0x8AE1, 0xE68B, 0x8AE2, 0xE684, + 0x8AE4, 0xE680, 0x8AE6, 0x92FA, 0x8AE7, 0xE67E, 0x8AEB, 0xE67C, + 0x8AED, 0x9740, 0x8AEE, 0x8E90, 0x8AF1, 0xE681, 0x8AF3, 0xE67D, + 0x8AF6, 0xFBAA, 0x8AF7, 0xE685, 0x8AF8, 0x8F94, 0x8AFA, 0x8CBF, + 0x8AFE, 0x91F8, 0x8B00, 0x9664, 0x8B01, 0x8979, 0x8B02, 0x88E0, + 0x8B04, 0x93A3, 0x8B07, 0xE689, 0x8B0C, 0xE688, 0x8B0E, 0x93E4, + 0x8B10, 0xE68D, 0x8B14, 0xE682, 0x8B16, 0xE68C, 0x8B17, 0xE68E, + 0x8B19, 0x8CAA, 0x8B1A, 0xE68A, 0x8B1B, 0x8D75, 0x8B1D, 0x8ED3, + 0x8B20, 0xE68F, 0x8B21, 0x9777, 0x8B26, 0xE692, 0x8B28, 0xE695, + 0x8B2B, 0xE693, 0x8B2C, 0x9554, 0x8B33, 0xE690, 0x8B39, 0x8BDE, + 0x8B3E, 0xE694, 0x8B41, 0xE696, 0x8B49, 0xE69A, 0x8B4C, 0xE697, + 0x8B4E, 0xE699, 0x8B4F, 0xE698, 0x8B53, 0xFBAB, 0x8B56, 0xE69B, + 0x8B58, 0x8EAF, 0x8B5A, 0xE69D, 0x8B5B, 0xE69C, 0x8B5C, 0x9588, + 0x8B5F, 0xE69F, 0x8B66, 0x8C78, 0x8B6B, 0xE69E, 0x8B6C, 0xE6A0, + 0x8B6F, 0xE6A1, 0x8B70, 0x8B63, 0x8B71, 0xE3BF, 0x8B72, 0x8FF7, + 0x8B74, 0xE6A2, 0x8B77, 0x8CEC, 0x8B7D, 0xE6A3, 0x8B7F, 0xFBAC, + 0x8B80, 0xE6A4, 0x8B83, 0x8E5D, 0x8B8A, 0x9DCC, 0x8B8C, 0xE6A5, + 0x8B8E, 0xE6A6, 0x8B90, 0x8F51, 0x8B92, 0xE6A7, 0x8B93, 0xE6A8, + 0x8B96, 0xE6A9, 0x8B99, 0xE6AA, 0x8B9A, 0xE6AB, 0x8C37, 0x924A, + 0x8C3A, 0xE6AC, 0x8C3F, 0xE6AE, 0x8C41, 0xE6AD, 0x8C46, 0x93A4, + 0x8C48, 0xE6AF, 0x8C4A, 0x964C, 0x8C4C, 0xE6B0, 0x8C4E, 0xE6B1, + 0x8C50, 0xE6B2, 0x8C55, 0xE6B3, 0x8C5A, 0x93D8, 0x8C61, 0x8FDB, + 0x8C62, 0xE6B4, 0x8C6A, 0x8D8B, 0x8C6B, 0x98AC, 0x8C6C, 0xE6B5, + 0x8C78, 0xE6B6, 0x8C79, 0x955E, 0x8C7A, 0xE6B7, 0x8C7C, 0xE6BF, + 0x8C82, 0xE6B8, 0x8C85, 0xE6BA, 0x8C89, 0xE6B9, 0x8C8A, 0xE6BB, + 0x8C8C, 0x9665, 0x8C8D, 0xE6BC, 0x8C8E, 0xE6BD, 0x8C94, 0xE6BE, + 0x8C98, 0xE6C0, 0x8C9D, 0x8A4C, 0x8C9E, 0x92E5, 0x8CA0, 0x9589, + 0x8CA1, 0x8DE0, 0x8CA2, 0x8D76, 0x8CA7, 0x956E, 0x8CA8, 0x89DD, + 0x8CA9, 0x94CC, 0x8CAA, 0xE6C3, 0x8CAB, 0x8AD1, 0x8CAC, 0x90D3, + 0x8CAD, 0xE6C2, 0x8CAE, 0xE6C7, 0x8CAF, 0x9299, 0x8CB0, 0x96E1, + 0x8CB2, 0xE6C5, 0x8CB3, 0xE6C6, 0x8CB4, 0x8B4D, 0x8CB6, 0xE6C8, + 0x8CB7, 0x9483, 0x8CB8, 0x91DD, 0x8CBB, 0x94EF, 0x8CBC, 0x935C, + 0x8CBD, 0xE6C4, 0x8CBF, 0x9666, 0x8CC0, 0x89EA, 0x8CC1, 0xE6CA, + 0x8CC2, 0x9847, 0x8CC3, 0x92C0, 0x8CC4, 0x9864, 0x8CC7, 0x8E91, + 0x8CC8, 0xE6C9, 0x8CCA, 0x91AF, 0x8CCD, 0xE6DA, 0x8CCE, 0x9147, + 0x8CD1, 0x93F6, 0x8CD3, 0x956F, 0x8CDA, 0xE6CD, 0x8CDB, 0x8E5E, + 0x8CDC, 0x8E92, 0x8CDE, 0x8FDC, 0x8CE0, 0x9485, 0x8CE2, 0x8CAB, + 0x8CE3, 0xE6CC, 0x8CE4, 0xE6CB, 0x8CE6, 0x958A, 0x8CEA, 0x8EBF, + 0x8CED, 0x9371, 0x8CF0, 0xFBAD, 0x8CF4, 0xFBAE, 0x8CFA, 0xE6CF, + 0x8CFB, 0xE6D0, 0x8CFC, 0x8D77, 0x8CFD, 0xE6CE, 0x8D04, 0xE6D1, + 0x8D05, 0xE6D2, 0x8D07, 0xE6D4, 0x8D08, 0x91A1, 0x8D0A, 0xE6D3, + 0x8D0B, 0x8AE4, 0x8D0D, 0xE6D6, 0x8D0F, 0xE6D5, 0x8D10, 0xE6D7, + 0x8D12, 0xFBAF, 0x8D13, 0xE6D9, 0x8D14, 0xE6DB, 0x8D16, 0xE6DC, + 0x8D64, 0x90D4, 0x8D66, 0x8ECD, 0x8D67, 0xE6DD, 0x8D6B, 0x8A71, + 0x8D6D, 0xE6DE, 0x8D70, 0x9196, 0x8D71, 0xE6DF, 0x8D73, 0xE6E0, + 0x8D74, 0x958B, 0x8D76, 0xFBB0, 0x8D77, 0x8B4E, 0x8D81, 0xE6E1, + 0x8D85, 0x92B4, 0x8D8A, 0x897A, 0x8D99, 0xE6E2, 0x8DA3, 0x8EEF, + 0x8DA8, 0x9096, 0x8DB3, 0x91AB, 0x8DBA, 0xE6E5, 0x8DBE, 0xE6E4, + 0x8DC2, 0xE6E3, 0x8DCB, 0xE6EB, 0x8DCC, 0xE6E9, 0x8DCF, 0xE6E6, + 0x8DD6, 0xE6E8, 0x8DDA, 0xE6E7, 0x8DDB, 0xE6EA, 0x8DDD, 0x8B97, + 0x8DDF, 0xE6EE, 0x8DE1, 0x90D5, 0x8DE3, 0xE6EF, 0x8DE8, 0x8CD7, + 0x8DEA, 0xE6EC, 0x8DEB, 0xE6ED, 0x8DEF, 0x9848, 0x8DF3, 0x92B5, + 0x8DF5, 0x9148, 0x8DFC, 0xE6F0, 0x8DFF, 0xE6F3, 0x8E08, 0xE6F1, + 0x8E09, 0xE6F2, 0x8E0A, 0x9778, 0x8E0F, 0x93A5, 0x8E10, 0xE6F6, + 0x8E1D, 0xE6F4, 0x8E1E, 0xE6F5, 0x8E1F, 0xE6F7, 0x8E2A, 0xE748, + 0x8E30, 0xE6FA, 0x8E34, 0xE6FB, 0x8E35, 0xE6F9, 0x8E42, 0xE6F8, + 0x8E44, 0x92FB, 0x8E47, 0xE740, 0x8E48, 0xE744, 0x8E49, 0xE741, + 0x8E4A, 0xE6FC, 0x8E4C, 0xE742, 0x8E50, 0xE743, 0x8E55, 0xE74A, + 0x8E59, 0xE745, 0x8E5F, 0x90D6, 0x8E60, 0xE747, 0x8E63, 0xE749, + 0x8E64, 0xE746, 0x8E72, 0xE74C, 0x8E74, 0x8F52, 0x8E76, 0xE74B, + 0x8E7C, 0xE74D, 0x8E81, 0xE74E, 0x8E84, 0xE751, 0x8E85, 0xE750, + 0x8E87, 0xE74F, 0x8E8A, 0xE753, 0x8E8B, 0xE752, 0x8E8D, 0x96F4, + 0x8E91, 0xE755, 0x8E93, 0xE754, 0x8E94, 0xE756, 0x8E99, 0xE757, + 0x8EA1, 0xE759, 0x8EAA, 0xE758, 0x8EAB, 0x9067, 0x8EAC, 0xE75A, + 0x8EAF, 0x8BEB, 0x8EB0, 0xE75B, 0x8EB1, 0xE75D, 0x8EBE, 0xE75E, + 0x8EC5, 0xE75F, 0x8EC6, 0xE75C, 0x8EC8, 0xE760, 0x8ECA, 0x8ED4, + 0x8ECB, 0xE761, 0x8ECC, 0x8B4F, 0x8ECD, 0x8C52, 0x8ECF, 0xFBB2, + 0x8ED2, 0x8CAC, 0x8EDB, 0xE762, 0x8EDF, 0x93EE, 0x8EE2, 0x935D, + 0x8EE3, 0xE763, 0x8EEB, 0xE766, 0x8EF8, 0x8EB2, 0x8EFB, 0xE765, + 0x8EFC, 0xE764, 0x8EFD, 0x8C79, 0x8EFE, 0xE767, 0x8F03, 0x8A72, + 0x8F05, 0xE769, 0x8F09, 0x8DDA, 0x8F0A, 0xE768, 0x8F0C, 0xE771, + 0x8F12, 0xE76B, 0x8F13, 0xE76D, 0x8F14, 0x95E3, 0x8F15, 0xE76A, + 0x8F19, 0xE76C, 0x8F1B, 0xE770, 0x8F1C, 0xE76E, 0x8F1D, 0x8B50, + 0x8F1F, 0xE76F, 0x8F26, 0xE772, 0x8F29, 0x9479, 0x8F2A, 0x97D6, + 0x8F2F, 0x8F53, 0x8F33, 0xE773, 0x8F38, 0x9741, 0x8F39, 0xE775, + 0x8F3B, 0xE774, 0x8F3E, 0xE778, 0x8F3F, 0x9760, 0x8F42, 0xE777, + 0x8F44, 0x8A8D, 0x8F45, 0xE776, 0x8F46, 0xE77B, 0x8F49, 0xE77A, + 0x8F4C, 0xE779, 0x8F4D, 0x9351, 0x8F4E, 0xE77C, 0x8F57, 0xE77D, + 0x8F5C, 0xE77E, 0x8F5F, 0x8D8C, 0x8F61, 0x8C44, 0x8F62, 0xE780, + 0x8F63, 0xE781, 0x8F64, 0xE782, 0x8F9B, 0x9068, 0x8F9C, 0xE783, + 0x8F9E, 0x8EAB, 0x8F9F, 0xE784, 0x8FA3, 0xE785, 0x8FA7, 0x999F, + 0x8FA8, 0x999E, 0x8FAD, 0xE786, 0x8FAE, 0xE390, 0x8FAF, 0xE787, + 0x8FB0, 0x9243, 0x8FB1, 0x904A, 0x8FB2, 0x945F, 0x8FB7, 0xE788, + 0x8FBA, 0x95D3, 0x8FBB, 0x92D2, 0x8FBC, 0x8D9E, 0x8FBF, 0x9248, + 0x8FC2, 0x8949, 0x8FC4, 0x9698, 0x8FC5, 0x9076, 0x8FCE, 0x8C7D, + 0x8FD1, 0x8BDF, 0x8FD4, 0x95D4, 0x8FDA, 0xE789, 0x8FE2, 0xE78B, + 0x8FE5, 0xE78A, 0x8FE6, 0x89DE, 0x8FE9, 0x93F4, 0x8FEA, 0xE78C, + 0x8FEB, 0x9497, 0x8FED, 0x9352, 0x8FEF, 0xE78D, 0x8FF0, 0x8F71, + 0x8FF4, 0xE78F, 0x8FF7, 0x96C0, 0x8FF8, 0xE79E, 0x8FF9, 0xE791, + 0x8FFA, 0xE792, 0x8FFD, 0x92C7, 0x9000, 0x91DE, 0x9001, 0x9197, + 0x9003, 0x93A6, 0x9005, 0xE790, 0x9006, 0x8B74, 0x900B, 0xE799, + 0x900D, 0xE796, 0x900E, 0xE7A3, 0x900F, 0x93A7, 0x9010, 0x9280, + 0x9011, 0xE793, 0x9013, 0x92FC, 0x9014, 0x9372, 0x9015, 0xE794, + 0x9016, 0xE798, 0x9017, 0x9080, 0x9019, 0x9487, 0x901A, 0x92CA, + 0x901D, 0x90C0, 0x901E, 0xE797, 0x901F, 0x91AC, 0x9020, 0x91A2, + 0x9021, 0xE795, 0x9022, 0x88A7, 0x9023, 0x9841, 0x9027, 0xE79A, + 0x902E, 0x91DF, 0x9031, 0x8F54, 0x9032, 0x9069, 0x9035, 0xE79C, + 0x9036, 0xE79B, 0x9038, 0x88ED, 0x9039, 0xE79D, 0x903C, 0x954E, + 0x903E, 0xE7A5, 0x9041, 0x93D9, 0x9042, 0x908B, 0x9045, 0x9278, + 0x9047, 0x8BF6, 0x9049, 0xE7A4, 0x904A, 0x9756, 0x904B, 0x895E, + 0x904D, 0x95D5, 0x904E, 0x89DF, 0x904F, 0xE79F, 0x9050, 0xE7A0, + 0x9051, 0xE7A1, 0x9052, 0xE7A2, 0x9053, 0x93B9, 0x9054, 0x9242, + 0x9055, 0x88E1, 0x9056, 0xE7A6, 0x9058, 0xE7A7, 0x9059, 0xEAA1, + 0x905C, 0x91BB, 0x905E, 0xE7A8, 0x9060, 0x8993, 0x9061, 0x916B, + 0x9063, 0x8CAD, 0x9065, 0x9779, 0x9067, 0xFBB5, 0x9068, 0xE7A9, + 0x9069, 0x934B, 0x906D, 0x9198, 0x906E, 0x8ED5, 0x906F, 0xE7AA, + 0x9072, 0xE7AD, 0x9075, 0x8F85, 0x9076, 0xE7AB, 0x9077, 0x914A, + 0x9078, 0x9149, 0x907A, 0x88E2, 0x907C, 0x97C9, 0x907D, 0xE7AF, + 0x907F, 0x94F0, 0x9080, 0xE7B1, 0x9081, 0xE7B0, 0x9082, 0xE7AE, + 0x9083, 0xE284, 0x9084, 0x8AD2, 0x9087, 0xE78E, 0x9089, 0xE7B3, + 0x908A, 0xE7B2, 0x908F, 0xE7B4, 0x9091, 0x9757, 0x90A3, 0x93DF, + 0x90A6, 0x964D, 0x90A8, 0xE7B5, 0x90AA, 0x8ED7, 0x90AF, 0xE7B6, + 0x90B1, 0xE7B7, 0x90B5, 0xE7B8, 0x90B8, 0x9340, 0x90C1, 0x88E8, + 0x90CA, 0x8D78, 0x90CE, 0x9859, 0x90DB, 0xE7BC, 0x90DE, 0xFBB6, + 0x90E1, 0x8C53, 0x90E2, 0xE7B9, 0x90E4, 0xE7BA, 0x90E8, 0x9594, + 0x90ED, 0x8A73, 0x90F5, 0x9758, 0x90F7, 0x8BBD, 0x90FD, 0x9373, + 0x9102, 0xE7BD, 0x9112, 0xE7BE, 0x9115, 0xFBB8, 0x9119, 0xE7BF, + 0x9127, 0xFBB9, 0x912D, 0x9341, 0x9130, 0xE7C1, 0x9132, 0xE7C0, + 0x9149, 0x93D1, 0x914A, 0xE7C2, 0x914B, 0x8F55, 0x914C, 0x8EDE, + 0x914D, 0x947A, 0x914E, 0x9291, 0x9152, 0x8EF0, 0x9154, 0x908C, + 0x9156, 0xE7C3, 0x9158, 0xE7C4, 0x9162, 0x907C, 0x9163, 0xE7C5, + 0x9165, 0xE7C6, 0x9169, 0xE7C7, 0x916A, 0x978F, 0x916C, 0x8F56, + 0x9172, 0xE7C9, 0x9173, 0xE7C8, 0x9175, 0x8D79, 0x9177, 0x8D93, + 0x9178, 0x8E5F, 0x9182, 0xE7CC, 0x9187, 0x8F86, 0x9189, 0xE7CB, + 0x918B, 0xE7CA, 0x918D, 0x91E7, 0x9190, 0x8CED, 0x9192, 0x90C1, + 0x9197, 0x94AE, 0x919C, 0x8F58, 0x91A2, 0xE7CD, 0x91A4, 0x8FDD, + 0x91AA, 0xE7D0, 0x91AB, 0xE7CE, 0x91AF, 0xE7CF, 0x91B4, 0xE7D2, + 0x91B5, 0xE7D1, 0x91B8, 0x8FF8, 0x91BA, 0xE7D3, 0x91C0, 0xE7D4, + 0x91C1, 0xE7D5, 0x91C6, 0x94CE, 0x91C7, 0x8DD1, 0x91C8, 0x8EDF, + 0x91C9, 0xE7D6, 0x91CB, 0xE7D7, 0x91CC, 0x97A2, 0x91CD, 0x8F64, + 0x91CE, 0x96EC, 0x91CF, 0x97CA, 0x91D0, 0xE7D8, 0x91D1, 0x8BE0, + 0x91D6, 0xE7D9, 0x91D7, 0xFBBB, 0x91D8, 0x9342, 0x91DA, 0xFBBA, + 0x91DB, 0xE7DC, 0x91DC, 0x8A98, 0x91DD, 0x906A, 0x91DE, 0xFBBC, + 0x91DF, 0xE7DA, 0x91E1, 0xE7DB, 0x91E3, 0x92DE, 0x91E4, 0xFBBF, + 0x91E5, 0xFBC0, 0x91E6, 0x9674, 0x91E7, 0x8BFA, 0x91ED, 0xFBBD, + 0x91EE, 0xFBBE, 0x91F5, 0xE7DE, 0x91F6, 0xE7DF, 0x91FC, 0xE7DD, + 0x91FF, 0xE7E1, 0x9206, 0xFBC1, 0x920A, 0xFBC3, 0x920D, 0x93DD, + 0x920E, 0x8A62, 0x9210, 0xFBC2, 0x9211, 0xE7E5, 0x9214, 0xE7E2, + 0x9215, 0xE7E4, 0x921E, 0xE7E0, 0x9229, 0xE86E, 0x922C, 0xE7E3, + 0x9234, 0x97E9, 0x9237, 0x8CD8, 0x9239, 0xFBCA, 0x923A, 0xFBC4, + 0x923C, 0xFBC6, 0x923F, 0xE7ED, 0x9240, 0xFBC5, 0x9244, 0x9353, + 0x9245, 0xE7E8, 0x9248, 0xE7EB, 0x9249, 0xE7E9, 0x924B, 0xE7EE, + 0x924E, 0xFBC7, 0x9250, 0xE7EF, 0x9251, 0xFBC9, 0x9257, 0xE7E7, + 0x9259, 0xFBC8, 0x925A, 0xE7F4, 0x925B, 0x8994, 0x925E, 0xE7E6, + 0x9262, 0x94AB, 0x9264, 0xE7EA, 0x9266, 0x8FDE, 0x9267, 0xFBCB, + 0x9271, 0x8D7A, 0x9277, 0xFBCD, 0x9278, 0xFBCE, 0x927E, 0x9667, + 0x9280, 0x8BE2, 0x9283, 0x8F65, 0x9285, 0x93BA, 0x9288, 0xFA5F, + 0x9291, 0x914C, 0x9293, 0xE7F2, 0x9295, 0xE7EC, 0x9296, 0xE7F1, + 0x9298, 0x96C1, 0x929A, 0x92B6, 0x929B, 0xE7F3, 0x929C, 0xE7F0, + 0x92A7, 0xFBCC, 0x92AD, 0x914B, 0x92B7, 0xE7F7, 0x92B9, 0xE7F6, + 0x92CF, 0xE7F5, 0x92D0, 0xFBD2, 0x92D2, 0x964E, 0x92D3, 0xFBD6, + 0x92D5, 0xFBD4, 0x92D7, 0xFBD0, 0x92D9, 0xFBD1, 0x92E0, 0xFBD5, + 0x92E4, 0x8F9B, 0x92E7, 0xFBCF, 0x92E9, 0xE7F8, 0x92EA, 0x95DD, + 0x92ED, 0x8973, 0x92F2, 0x9565, 0x92F3, 0x9292, 0x92F8, 0x8B98, + 0x92F9, 0xFA65, 0x92FA, 0xE7FA, 0x92FB, 0xFBD9, 0x92FC, 0x8D7C, + 0x92FF, 0xFBDC, 0x9302, 0xFBDE, 0x9306, 0x8E4B, 0x930F, 0xE7F9, + 0x9310, 0x908D, 0x9318, 0x908E, 0x9319, 0xE840, 0x931A, 0xE842, + 0x931D, 0xFBDD, 0x931E, 0xFBDB, 0x9320, 0x8FF9, 0x9321, 0xFBD8, + 0x9322, 0xE841, 0x9323, 0xE843, 0x9325, 0xFBD7, 0x9326, 0x8BD1, + 0x9328, 0x9564, 0x932B, 0x8EE0, 0x932C, 0x9842, 0x932E, 0xE7FC, + 0x932F, 0x8DF6, 0x9332, 0x985E, 0x9335, 0xE845, 0x933A, 0xE844, + 0x933B, 0xE846, 0x9344, 0xE7FB, 0x9348, 0xFA5E, 0x934B, 0x93E7, + 0x934D, 0x9374, 0x9354, 0x92D5, 0x9356, 0xE84B, 0x9357, 0xFBE0, + 0x935B, 0x9262, 0x935C, 0xE847, 0x9360, 0xE848, 0x936C, 0x8C4C, + 0x936E, 0xE84A, 0x9370, 0xFBDF, 0x9375, 0x8CAE, 0x937C, 0xE849, + 0x937E, 0x8FDF, 0x938C, 0x8A99, 0x9394, 0xE84F, 0x9396, 0x8DBD, + 0x9397, 0x9199, 0x939A, 0x92C8, 0x93A4, 0xFBE1, 0x93A7, 0x8A5A, + 0x93AC, 0xE84D, 0x93AD, 0xE84E, 0x93AE, 0x92C1, 0x93B0, 0xE84C, + 0x93B9, 0xE850, 0x93C3, 0xE856, 0x93C6, 0xFBE2, 0x93C8, 0xE859, + 0x93D0, 0xE858, 0x93D1, 0x934C, 0x93D6, 0xE851, 0x93D7, 0xE852, + 0x93D8, 0xE855, 0x93DD, 0xE857, 0x93DE, 0xFBE3, 0x93E1, 0x8BBE, + 0x93E4, 0xE85A, 0x93E5, 0xE854, 0x93E8, 0xE853, 0x93F8, 0xFBE4, + 0x9403, 0xE85E, 0x9407, 0xE85F, 0x9410, 0xE860, 0x9413, 0xE85D, + 0x9414, 0xE85C, 0x9418, 0x8FE0, 0x9419, 0x93A8, 0x941A, 0xE85B, + 0x9421, 0xE864, 0x942B, 0xE862, 0x9431, 0xFBE5, 0x9435, 0xE863, + 0x9436, 0xE861, 0x9438, 0x91F6, 0x943A, 0xE865, 0x9441, 0xE866, + 0x9444, 0xE868, 0x9445, 0xFBE6, 0x9448, 0xFBE7, 0x9451, 0x8AD3, + 0x9452, 0xE867, 0x9453, 0x96F8, 0x945A, 0xE873, 0x945B, 0xE869, + 0x945E, 0xE86C, 0x9460, 0xE86A, 0x9462, 0xE86B, 0x946A, 0xE86D, + 0x9470, 0xE86F, 0x9475, 0xE870, 0x9477, 0xE871, 0x947C, 0xE874, + 0x947D, 0xE872, 0x947E, 0xE875, 0x947F, 0xE877, 0x9481, 0xE876, + 0x9577, 0x92B7, 0x9580, 0x96E5, 0x9582, 0xE878, 0x9583, 0x914D, + 0x9587, 0xE879, 0x9589, 0x95C2, 0x958A, 0xE87A, 0x958B, 0x8A4A, + 0x958F, 0x895B, 0x9591, 0x8AD5, 0x9592, 0xFBE8, 0x9593, 0x8AD4, + 0x9594, 0xE87B, 0x9596, 0xE87C, 0x9598, 0xE87D, 0x9599, 0xE87E, + 0x95A0, 0xE880, 0x95A2, 0x8AD6, 0x95A3, 0x8A74, 0x95A4, 0x8D7D, + 0x95A5, 0x94B4, 0x95A7, 0xE882, 0x95A8, 0xE881, 0x95AD, 0xE883, + 0x95B2, 0x897B, 0x95B9, 0xE886, 0x95BB, 0xE885, 0x95BC, 0xE884, + 0x95BE, 0xE887, 0x95C3, 0xE88A, 0x95C7, 0x88C5, 0x95CA, 0xE888, + 0x95CC, 0xE88C, 0x95CD, 0xE88B, 0x95D4, 0xE88E, 0x95D5, 0xE88D, + 0x95D6, 0xE88F, 0x95D8, 0x93AC, 0x95DC, 0xE890, 0x95E1, 0xE891, + 0x95E2, 0xE893, 0x95E5, 0xE892, 0x961C, 0x958C, 0x9621, 0xE894, + 0x9628, 0xE895, 0x962A, 0x8DE3, 0x962E, 0xE896, 0x962F, 0xE897, + 0x9632, 0x9668, 0x963B, 0x916A, 0x963F, 0x88A2, 0x9640, 0x91C9, + 0x9642, 0xE898, 0x9644, 0x958D, 0x964B, 0xE89B, 0x964C, 0xE899, + 0x964D, 0x8D7E, 0x964F, 0xE89A, 0x9650, 0x8CC0, 0x965B, 0x95C3, + 0x965C, 0xE89D, 0x965D, 0xE89F, 0x965E, 0xE89E, 0x965F, 0xE8A0, + 0x9662, 0x8940, 0x9663, 0x9077, 0x9664, 0x8F9C, 0x9665, 0x8AD7, + 0x9666, 0xE8A1, 0x966A, 0x9486, 0x966C, 0xE8A3, 0x9670, 0x8941, + 0x9672, 0xE8A2, 0x9673, 0x92C2, 0x9675, 0x97CB, 0x9676, 0x93A9, + 0x9677, 0xE89C, 0x9678, 0x97A4, 0x967A, 0x8CAF, 0x967D, 0x977A, + 0x9685, 0x8BF7, 0x9686, 0x97B2, 0x9688, 0x8C47, 0x968A, 0x91E0, + 0x968B, 0xE440, 0x968D, 0xE8A4, 0x968E, 0x8A4B, 0x968F, 0x908F, + 0x9694, 0x8A75, 0x9695, 0xE8A6, 0x9697, 0xE8A7, 0x9698, 0xE8A5, + 0x9699, 0x8C84, 0x969B, 0x8DDB, 0x969C, 0x8FE1, 0x969D, 0xFBEB, + 0x96A0, 0x8942, 0x96A3, 0x97D7, 0x96A7, 0xE8A9, 0x96A8, 0xE7AC, + 0x96AA, 0xE8A8, 0x96AF, 0xFBEC, 0x96B0, 0xE8AC, 0x96B1, 0xE8AA, + 0x96B2, 0xE8AB, 0x96B4, 0xE8AD, 0x96B6, 0xE8AE, 0x96B7, 0x97EA, + 0x96B8, 0xE8AF, 0x96B9, 0xE8B0, 0x96BB, 0x90C7, 0x96BC, 0x94B9, + 0x96C0, 0x909D, 0x96C1, 0x8AE5, 0x96C4, 0x9759, 0x96C5, 0x89EB, + 0x96C6, 0x8F57, 0x96C7, 0x8CD9, 0x96C9, 0xE8B3, 0x96CB, 0xE8B2, + 0x96CC, 0x8E93, 0x96CD, 0xE8B4, 0x96CE, 0xE8B1, 0x96D1, 0x8E47, + 0x96D5, 0xE8B8, 0x96D6, 0xE5AB, 0x96D9, 0x99D4, 0x96DB, 0x9097, + 0x96DC, 0xE8B6, 0x96E2, 0x97A3, 0x96E3, 0x93EF, 0x96E8, 0x894A, + 0x96EA, 0x90E1, 0x96EB, 0x8EB4, 0x96F0, 0x95B5, 0x96F2, 0x895F, + 0x96F6, 0x97EB, 0x96F7, 0x978B, 0x96F9, 0xE8B9, 0x96FB, 0x9364, + 0x9700, 0x8EF9, 0x9704, 0xE8BA, 0x9706, 0xE8BB, 0x9707, 0x906B, + 0x9708, 0xE8BC, 0x970A, 0x97EC, 0x970D, 0xE8B7, 0x970E, 0xE8BE, + 0x970F, 0xE8C0, 0x9711, 0xE8BF, 0x9713, 0xE8BD, 0x9716, 0xE8C1, + 0x9719, 0xE8C2, 0x971C, 0x919A, 0x971E, 0x89E0, 0x9724, 0xE8C3, + 0x9727, 0x96B6, 0x972A, 0xE8C4, 0x9730, 0xE8C5, 0x9732, 0x9849, + 0x9733, 0xFBED, 0x9738, 0x9E50, 0x9739, 0xE8C6, 0x973B, 0xFBEE, + 0x973D, 0xE8C7, 0x973E, 0xE8C8, 0x9742, 0xE8CC, 0x9743, 0xFBEF, + 0x9744, 0xE8C9, 0x9746, 0xE8CA, 0x9748, 0xE8CB, 0x9749, 0xE8CD, + 0x974D, 0xFBF0, 0x974F, 0xFBF1, 0x9751, 0xFBF2, 0x9752, 0x90C2, + 0x9755, 0xFBF3, 0x9756, 0x96F5, 0x9759, 0x90C3, 0x975C, 0xE8CE, + 0x975E, 0x94F1, 0x9760, 0xE8CF, 0x9761, 0xEA72, 0x9762, 0x96CA, + 0x9764, 0xE8D0, 0x9766, 0xE8D1, 0x9768, 0xE8D2, 0x9769, 0x8A76, + 0x976B, 0xE8D4, 0x976D, 0x9078, 0x9771, 0xE8D5, 0x9774, 0x8C43, + 0x9779, 0xE8D6, 0x977A, 0xE8DA, 0x977C, 0xE8D8, 0x9781, 0xE8D9, + 0x9784, 0x8A93, 0x9785, 0xE8D7, 0x9786, 0xE8DB, 0x978B, 0xE8DC, + 0x978D, 0x88C6, 0x978F, 0xE8DD, 0x9790, 0xE8DE, 0x9798, 0x8FE2, + 0x979C, 0xE8DF, 0x97A0, 0x8B66, 0x97A3, 0xE8E2, 0x97A6, 0xE8E1, + 0x97A8, 0xE8E0, 0x97AB, 0xE691, 0x97AD, 0x95DA, 0x97B3, 0xE8E3, + 0x97B4, 0xE8E4, 0x97C3, 0xE8E5, 0x97C6, 0xE8E6, 0x97C8, 0xE8E7, + 0x97CB, 0xE8E8, 0x97D3, 0x8AD8, 0x97DC, 0xE8E9, 0x97ED, 0xE8EA, + 0x97EE, 0x9442, 0x97F2, 0xE8EC, 0x97F3, 0x89B9, 0x97F5, 0xE8EF, + 0x97F6, 0xE8EE, 0x97FB, 0x8943, 0x97FF, 0x8BBF, 0x9801, 0x95C5, + 0x9802, 0x92B8, 0x9803, 0x8DA0, 0x9805, 0x8D80, 0x9806, 0x8F87, + 0x9808, 0x907B, 0x980C, 0xE8F1, 0x980F, 0xE8F0, 0x9810, 0x9761, + 0x9811, 0x8AE6, 0x9812, 0x94D0, 0x9813, 0x93DA, 0x9817, 0x909C, + 0x9818, 0x97CC, 0x981A, 0x8C7A, 0x9821, 0xE8F4, 0x9824, 0xE8F3, + 0x982C, 0x966A, 0x982D, 0x93AA, 0x9834, 0x896F, 0x9837, 0xE8F5, + 0x9838, 0xE8F2, 0x983B, 0x9570, 0x983C, 0x978A, 0x983D, 0xE8F6, + 0x9846, 0xE8F7, 0x984B, 0xE8F9, 0x984C, 0x91E8, 0x984D, 0x8A7A, + 0x984E, 0x8A7B, 0x984F, 0xE8F8, 0x9854, 0x8AE7, 0x9855, 0x8CB0, + 0x9857, 0xFBF4, 0x9858, 0x8AE8, 0x985B, 0x935E, 0x985E, 0x97DE, + 0x9865, 0xFBF5, 0x9867, 0x8CDA, 0x986B, 0xE8FA, 0x986F, 0xE8FB, + 0x9870, 0xE8FC, 0x9871, 0xE940, 0x9873, 0xE942, 0x9874, 0xE941, + 0x98A8, 0x9597, 0x98AA, 0xE943, 0x98AF, 0xE944, 0x98B1, 0xE945, + 0x98B6, 0xE946, 0x98C3, 0xE948, 0x98C4, 0xE947, 0x98C6, 0xE949, + 0x98DB, 0x94F2, 0x98DC, 0xE3CA, 0x98DF, 0x9048, 0x98E2, 0x8B51, + 0x98E9, 0xE94A, 0x98EB, 0xE94B, 0x98ED, 0x99AA, 0x98EE, 0x9F5A, + 0x98EF, 0x94D1, 0x98F2, 0x88F9, 0x98F4, 0x88B9, 0x98FC, 0x8E94, + 0x98FD, 0x964F, 0x98FE, 0x8FFC, 0x9903, 0xE94C, 0x9905, 0x96DD, + 0x9909, 0xE94D, 0x990A, 0x977B, 0x990C, 0x8961, 0x9910, 0x8E60, + 0x9912, 0xE94E, 0x9913, 0x89EC, 0x9914, 0xE94F, 0x9918, 0xE950, + 0x991D, 0xE952, 0x991E, 0xE953, 0x9920, 0xE955, 0x9921, 0xE951, + 0x9924, 0xE954, 0x9927, 0xFBF8, 0x9928, 0x8AD9, 0x992C, 0xE956, + 0x992E, 0xE957, 0x993D, 0xE958, 0x993E, 0xE959, 0x9942, 0xE95A, + 0x9945, 0xE95C, 0x9949, 0xE95B, 0x994B, 0xE95E, 0x994C, 0xE961, + 0x9950, 0xE95D, 0x9951, 0xE95F, 0x9952, 0xE960, 0x9955, 0xE962, + 0x9957, 0x8BC0, 0x9996, 0x8EF1, 0x9997, 0xE963, 0x9998, 0xE964, + 0x9999, 0x8D81, 0x999E, 0xFBFA, 0x99A5, 0xE965, 0x99A8, 0x8A5D, + 0x99AC, 0x946E, 0x99AD, 0xE966, 0x99AE, 0xE967, 0x99B3, 0x9279, + 0x99B4, 0x93E9, 0x99BC, 0xE968, 0x99C1, 0x949D, 0x99C4, 0x91CA, + 0x99C5, 0x8977, 0x99C6, 0x8BEC, 0x99C8, 0x8BED, 0x99D0, 0x9293, + 0x99D1, 0xE96D, 0x99D2, 0x8BEE, 0x99D5, 0x89ED, 0x99D8, 0xE96C, + 0x99DB, 0xE96A, 0x99DD, 0xE96B, 0x99DF, 0xE969, 0x99E2, 0xE977, + 0x99ED, 0xE96E, 0x99EE, 0xE96F, 0x99F1, 0xE970, 0x99F2, 0xE971, + 0x99F8, 0xE973, 0x99FB, 0xE972, 0x99FF, 0x8F78, 0x9A01, 0xE974, + 0x9A05, 0xE976, 0x9A0E, 0x8B52, 0x9A0F, 0xE975, 0x9A12, 0x919B, + 0x9A13, 0x8CB1, 0x9A19, 0xE978, 0x9A28, 0x91CB, 0x9A2B, 0xE979, + 0x9A30, 0x93AB, 0x9A37, 0xE97A, 0x9A3E, 0xE980, 0x9A40, 0xE97D, + 0x9A42, 0xE97C, 0x9A43, 0xE97E, 0x9A45, 0xE97B, 0x9A4D, 0xE982, + 0x9A4E, 0xFBFB, 0x9A55, 0xE981, 0x9A57, 0xE984, 0x9A5A, 0x8BC1, + 0x9A5B, 0xE983, 0x9A5F, 0xE985, 0x9A62, 0xE986, 0x9A64, 0xE988, + 0x9A65, 0xE987, 0x9A69, 0xE989, 0x9A6A, 0xE98B, 0x9A6B, 0xE98A, + 0x9AA8, 0x8D9C, 0x9AAD, 0xE98C, 0x9AB0, 0xE98D, 0x9AB8, 0x8A5B, + 0x9ABC, 0xE98E, 0x9AC0, 0xE98F, 0x9AC4, 0x9091, 0x9ACF, 0xE990, + 0x9AD1, 0xE991, 0x9AD3, 0xE992, 0x9AD4, 0xE993, 0x9AD8, 0x8D82, + 0x9AD9, 0xFBFC, 0x9ADC, 0xFC40, 0x9ADE, 0xE994, 0x9ADF, 0xE995, + 0x9AE2, 0xE996, 0x9AE3, 0xE997, 0x9AE6, 0xE998, 0x9AEA, 0x94AF, + 0x9AEB, 0xE99A, 0x9AED, 0x9545, 0x9AEE, 0xE99B, 0x9AEF, 0xE999, + 0x9AF1, 0xE99D, 0x9AF4, 0xE99C, 0x9AF7, 0xE99E, 0x9AFB, 0xE99F, + 0x9B06, 0xE9A0, 0x9B18, 0xE9A1, 0x9B1A, 0xE9A2, 0x9B1F, 0xE9A3, + 0x9B22, 0xE9A4, 0x9B23, 0xE9A5, 0x9B25, 0xE9A6, 0x9B27, 0xE9A7, + 0x9B28, 0xE9A8, 0x9B29, 0xE9A9, 0x9B2A, 0xE9AA, 0x9B2E, 0xE9AB, + 0x9B2F, 0xE9AC, 0x9B31, 0x9F54, 0x9B32, 0xE9AD, 0x9B3B, 0xE2F6, + 0x9B3C, 0x8B53, 0x9B41, 0x8A40, 0x9B42, 0x8DB0, 0x9B43, 0xE9AF, + 0x9B44, 0xE9AE, 0x9B45, 0x96A3, 0x9B4D, 0xE9B1, 0x9B4E, 0xE9B2, + 0x9B4F, 0xE9B0, 0x9B51, 0xE9B3, 0x9B54, 0x9682, 0x9B58, 0xE9B4, + 0x9B5A, 0x8B9B, 0x9B6F, 0x9844, 0x9B72, 0xFC42, 0x9B74, 0xE9B5, + 0x9B75, 0xFC41, 0x9B83, 0xE9B7, 0x9B8E, 0x88BC, 0x9B8F, 0xFC43, + 0x9B91, 0xE9B8, 0x9B92, 0x95A9, 0x9B93, 0xE9B6, 0x9B96, 0xE9B9, + 0x9B97, 0xE9BA, 0x9B9F, 0xE9BB, 0x9BA0, 0xE9BC, 0x9BA8, 0xE9BD, + 0x9BAA, 0x968E, 0x9BAB, 0x8E4C, 0x9BAD, 0x8DF8, 0x9BAE, 0x914E, + 0x9BB1, 0xFC44, 0x9BB4, 0xE9BE, 0x9BB9, 0xE9C1, 0x9BBB, 0xFC45, + 0x9BC0, 0xE9BF, 0x9BC6, 0xE9C2, 0x9BC9, 0x8CEF, 0x9BCA, 0xE9C0, + 0x9BCF, 0xE9C3, 0x9BD1, 0xE9C4, 0x9BD2, 0xE9C5, 0x9BD4, 0xE9C9, + 0x9BD6, 0x8E49, 0x9BDB, 0x91E2, 0x9BE1, 0xE9CA, 0x9BE2, 0xE9C7, + 0x9BE3, 0xE9C6, 0x9BE4, 0xE9C8, 0x9BE8, 0x8C7E, 0x9BF0, 0xE9CE, + 0x9BF1, 0xE9CD, 0x9BF2, 0xE9CC, 0x9BF5, 0x88B1, 0x9C00, 0xFC46, + 0x9C04, 0xE9D8, 0x9C06, 0xE9D4, 0x9C08, 0xE9D5, 0x9C09, 0xE9D1, + 0x9C0A, 0xE9D7, 0x9C0C, 0xE9D3, 0x9C0D, 0x8A82, 0x9C10, 0x986B, + 0x9C12, 0xE9D6, 0x9C13, 0xE9D2, 0x9C14, 0xE9D0, 0x9C15, 0xE9CF, + 0x9C1B, 0xE9DA, 0x9C21, 0xE9DD, 0x9C24, 0xE9DC, 0x9C25, 0xE9DB, + 0x9C2D, 0x9568, 0x9C2E, 0xE9D9, 0x9C2F, 0x88F1, 0x9C30, 0xE9DE, + 0x9C32, 0xE9E0, 0x9C39, 0x8A8F, 0x9C3A, 0xE9CB, 0x9C3B, 0x8956, + 0x9C3E, 0xE9E2, 0x9C46, 0xE9E1, 0x9C47, 0xE9DF, 0x9C48, 0x924C, + 0x9C52, 0x9690, 0x9C57, 0x97D8, 0x9C5A, 0xE9E3, 0x9C60, 0xE9E4, + 0x9C67, 0xE9E5, 0x9C76, 0xE9E6, 0x9C78, 0xE9E7, 0x9CE5, 0x92B9, + 0x9CE7, 0xE9E8, 0x9CE9, 0x94B5, 0x9CEB, 0xE9ED, 0x9CEC, 0xE9E9, + 0x9CF0, 0xE9EA, 0x9CF3, 0x9650, 0x9CF4, 0x96C2, 0x9CF6, 0x93CE, + 0x9D03, 0xE9EE, 0x9D06, 0xE9EF, 0x9D07, 0x93BC, 0x9D08, 0xE9EC, + 0x9D09, 0xE9EB, 0x9D0E, 0x89A8, 0x9D12, 0xE9F7, 0x9D15, 0xE9F6, + 0x9D1B, 0x8995, 0x9D1F, 0xE9F4, 0x9D23, 0xE9F3, 0x9D26, 0xE9F1, + 0x9D28, 0x8A9B, 0x9D2A, 0xE9F0, 0x9D2B, 0x8EB0, 0x9D2C, 0x89A7, + 0x9D3B, 0x8D83, 0x9D3E, 0xE9FA, 0x9D3F, 0xE9F9, 0x9D41, 0xE9F8, + 0x9D44, 0xE9F5, 0x9D46, 0xE9FB, 0x9D48, 0xE9FC, 0x9D50, 0xEA44, + 0x9D51, 0xEA43, 0x9D59, 0xEA45, 0x9D5C, 0x894C, 0x9D5D, 0xEA40, + 0x9D5E, 0xEA41, 0x9D60, 0x8D94, 0x9D61, 0x96B7, 0x9D64, 0xEA42, + 0x9D6B, 0xFC48, 0x9D6C, 0x9651, 0x9D6F, 0xEA4A, 0x9D70, 0xFC47, + 0x9D72, 0xEA46, 0x9D7A, 0xEA4B, 0x9D87, 0xEA48, 0x9D89, 0xEA47, + 0x9D8F, 0x8C7B, 0x9D9A, 0xEA4C, 0x9DA4, 0xEA4D, 0x9DA9, 0xEA4E, + 0x9DAB, 0xEA49, 0x9DAF, 0xE9F2, 0x9DB2, 0xEA4F, 0x9DB4, 0x92DF, + 0x9DB8, 0xEA53, 0x9DBA, 0xEA54, 0x9DBB, 0xEA52, 0x9DC1, 0xEA51, + 0x9DC2, 0xEA57, 0x9DC4, 0xEA50, 0x9DC6, 0xEA55, 0x9DCF, 0xEA56, + 0x9DD3, 0xEA59, 0x9DD9, 0xEA58, 0x9DE6, 0xEA5B, 0x9DED, 0xEA5C, + 0x9DEF, 0xEA5D, 0x9DF2, 0x9868, 0x9DF8, 0xEA5A, 0x9DF9, 0x91E9, + 0x9DFA, 0x8DEB, 0x9DFD, 0xEA5E, 0x9E19, 0xFC4A, 0x9E1A, 0xEA5F, + 0x9E1B, 0xEA60, 0x9E1E, 0xEA61, 0x9E75, 0xEA62, 0x9E78, 0x8CB2, + 0x9E79, 0xEA63, 0x9E7D, 0xEA64, 0x9E7F, 0x8EAD, 0x9E81, 0xEA65, + 0x9E88, 0xEA66, 0x9E8B, 0xEA67, 0x9E8C, 0xEA68, 0x9E91, 0xEA6B, + 0x9E92, 0xEA69, 0x9E93, 0x985B, 0x9E95, 0xEA6A, 0x9E97, 0x97ED, + 0x9E9D, 0xEA6C, 0x9E9F, 0x97D9, 0x9EA5, 0xEA6D, 0x9EA6, 0x949E, + 0x9EA9, 0xEA6E, 0x9EAA, 0xEA70, 0x9EAD, 0xEA71, 0x9EB8, 0xEA6F, + 0x9EB9, 0x8D8D, 0x9EBA, 0x96CB, 0x9EBB, 0x9683, 0x9EBC, 0x9BF5, + 0x9EBE, 0x9F80, 0x9EBF, 0x969B, 0x9EC4, 0x89A9, 0x9ECC, 0xEA73, + 0x9ECD, 0x8B6F, 0x9ECE, 0xEA74, 0x9ECF, 0xEA75, 0x9ED0, 0xEA76, + 0x9ED1, 0xFC4B, 0x9ED2, 0x8D95, 0x9ED4, 0xEA77, 0x9ED8, 0xE0D2, + 0x9ED9, 0x96D9, 0x9EDB, 0x91E1, 0x9EDC, 0xEA78, 0x9EDD, 0xEA7A, + 0x9EDE, 0xEA79, 0x9EE0, 0xEA7B, 0x9EE5, 0xEA7C, 0x9EE8, 0xEA7D, + 0x9EEF, 0xEA7E, 0x9EF4, 0xEA80, 0x9EF6, 0xEA81, 0x9EF7, 0xEA82, + 0x9EF9, 0xEA83, 0x9EFB, 0xEA84, 0x9EFC, 0xEA85, 0x9EFD, 0xEA86, + 0x9F07, 0xEA87, 0x9F08, 0xEA88, 0x9F0E, 0x9343, 0x9F13, 0x8CDB, + 0x9F15, 0xEA8A, 0x9F20, 0x916C, 0x9F21, 0xEA8B, 0x9F2C, 0xEA8C, + 0x9F3B, 0x9540, 0x9F3E, 0xEA8D, 0x9F4A, 0xEA8E, 0x9F4B, 0xE256, + 0x9F4E, 0xE6D8, 0x9F4F, 0xE8EB, 0x9F52, 0xEA8F, 0x9F54, 0xEA90, + 0x9F5F, 0xEA92, 0x9F60, 0xEA93, 0x9F61, 0xEA94, 0x9F62, 0x97EE, + 0x9F63, 0xEA91, 0x9F66, 0xEA95, 0x9F67, 0xEA96, 0x9F6A, 0xEA98, + 0x9F6C, 0xEA97, 0x9F72, 0xEA9A, 0x9F76, 0xEA9B, 0x9F77, 0xEA99, + 0x9F8D, 0x97B4, 0x9F95, 0xEA9C, 0x9F9C, 0xEA9D, 0x9F9D, 0xE273, + 0x9FA0, 0xEA9E, 0xF929, 0xFAE0, 0xF9DC, 0xFBE9, 0xFA0E, 0xFA90, + 0xFA0F, 0xFA9B, 0xFA10, 0xFA9C, 0xFA11, 0xFAB1, 0xFA12, 0xFAD8, + 0xFA13, 0xFAE8, 0xFA14, 0xFAEA, 0xFA15, 0xFB58, 0xFA16, 0xFB5E, + 0xFA17, 0xFB75, 0xFA18, 0xFB7D, 0xFA19, 0xFB7E, 0xFA1A, 0xFB80, + 0xFA1B, 0xFB82, 0xFA1C, 0xFB86, 0xFA1D, 0xFB89, 0xFA1E, 0xFB92, + 0xFA1F, 0xFB9D, 0xFA20, 0xFB9F, 0xFA21, 0xFBA0, 0xFA22, 0xFBA9, + 0xFA23, 0xFBB1, 0xFA24, 0xFBB3, 0xFA25, 0xFBB4, 0xFA26, 0xFBB7, + 0xFA27, 0xFBD3, 0xFA28, 0xFBDA, 0xFA29, 0xFBEA, 0xFA2A, 0xFBF6, + 0xFA2B, 0xFBF7, 0xFA2C, 0xFBF9, 0xFA2D, 0xFC49, 0xFF01, 0x8149, + 0xFF02, 0xFA57, 0xFF03, 0x8194, 0xFF04, 0x8190, 0xFF05, 0x8193, + 0xFF06, 0x8195, 0xFF07, 0xFA56, 0xFF08, 0x8169, 0xFF09, 0x816A, + 0xFF0A, 0x8196, 0xFF0B, 0x817B, 0xFF0C, 0x8143, 0xFF0D, 0x817C, + 0xFF0E, 0x8144, 0xFF0F, 0x815E, 0xFF10, 0x824F, 0xFF11, 0x8250, + 0xFF12, 0x8251, 0xFF13, 0x8252, 0xFF14, 0x8253, 0xFF15, 0x8254, + 0xFF16, 0x8255, 0xFF17, 0x8256, 0xFF18, 0x8257, 0xFF19, 0x8258, + 0xFF1A, 0x8146, 0xFF1B, 0x8147, 0xFF1C, 0x8183, 0xFF1D, 0x8181, + 0xFF1E, 0x8184, 0xFF1F, 0x8148, 0xFF20, 0x8197, 0xFF21, 0x8260, + 0xFF22, 0x8261, 0xFF23, 0x8262, 0xFF24, 0x8263, 0xFF25, 0x8264, + 0xFF26, 0x8265, 0xFF27, 0x8266, 0xFF28, 0x8267, 0xFF29, 0x8268, + 0xFF2A, 0x8269, 0xFF2B, 0x826A, 0xFF2C, 0x826B, 0xFF2D, 0x826C, + 0xFF2E, 0x826D, 0xFF2F, 0x826E, 0xFF30, 0x826F, 0xFF31, 0x8270, + 0xFF32, 0x8271, 0xFF33, 0x8272, 0xFF34, 0x8273, 0xFF35, 0x8274, + 0xFF36, 0x8275, 0xFF37, 0x8276, 0xFF38, 0x8277, 0xFF39, 0x8278, + 0xFF3A, 0x8279, 0xFF3B, 0x816D, 0xFF3C, 0x815F, 0xFF3D, 0x816E, + 0xFF3E, 0x814F, 0xFF3F, 0x8151, 0xFF40, 0x814D, 0xFF41, 0x8281, + 0xFF42, 0x8282, 0xFF43, 0x8283, 0xFF44, 0x8284, 0xFF45, 0x8285, + 0xFF46, 0x8286, 0xFF47, 0x8287, 0xFF48, 0x8288, 0xFF49, 0x8289, + 0xFF4A, 0x828A, 0xFF4B, 0x828B, 0xFF4C, 0x828C, 0xFF4D, 0x828D, + 0xFF4E, 0x828E, 0xFF4F, 0x828F, 0xFF50, 0x8290, 0xFF51, 0x8291, + 0xFF52, 0x8292, 0xFF53, 0x8293, 0xFF54, 0x8294, 0xFF55, 0x8295, + 0xFF56, 0x8296, 0xFF57, 0x8297, 0xFF58, 0x8298, 0xFF59, 0x8299, + 0xFF5A, 0x829A, 0xFF5B, 0x816F, 0xFF5C, 0x8162, 0xFF5D, 0x8170, + 0xFF5E, 0x8160, 0xFF61, 0x00A1, 0xFF62, 0x00A2, 0xFF63, 0x00A3, + 0xFF64, 0x00A4, 0xFF65, 0x00A5, 0xFF66, 0x00A6, 0xFF67, 0x00A7, + 0xFF68, 0x00A8, 0xFF69, 0x00A9, 0xFF6A, 0x00AA, 0xFF6B, 0x00AB, + 0xFF6C, 0x00AC, 0xFF6D, 0x00AD, 0xFF6E, 0x00AE, 0xFF6F, 0x00AF, + 0xFF70, 0x00B0, 0xFF71, 0x00B1, 0xFF72, 0x00B2, 0xFF73, 0x00B3, + 0xFF74, 0x00B4, 0xFF75, 0x00B5, 0xFF76, 0x00B6, 0xFF77, 0x00B7, + 0xFF78, 0x00B8, 0xFF79, 0x00B9, 0xFF7A, 0x00BA, 0xFF7B, 0x00BB, + 0xFF7C, 0x00BC, 0xFF7D, 0x00BD, 0xFF7E, 0x00BE, 0xFF7F, 0x00BF, + 0xFF80, 0x00C0, 0xFF81, 0x00C1, 0xFF82, 0x00C2, 0xFF83, 0x00C3, + 0xFF84, 0x00C4, 0xFF85, 0x00C5, 0xFF86, 0x00C6, 0xFF87, 0x00C7, + 0xFF88, 0x00C8, 0xFF89, 0x00C9, 0xFF8A, 0x00CA, 0xFF8B, 0x00CB, + 0xFF8C, 0x00CC, 0xFF8D, 0x00CD, 0xFF8E, 0x00CE, 0xFF8F, 0x00CF, + 0xFF90, 0x00D0, 0xFF91, 0x00D1, 0xFF92, 0x00D2, 0xFF93, 0x00D3, + 0xFF94, 0x00D4, 0xFF95, 0x00D5, 0xFF96, 0x00D6, 0xFF97, 0x00D7, + 0xFF98, 0x00D8, 0xFF99, 0x00D9, 0xFF9A, 0x00DA, 0xFF9B, 0x00DB, + 0xFF9C, 0x00DC, 0xFF9D, 0x00DD, 0xFF9E, 0x00DE, 0xFF9F, 0x00DF, + 0xFFE0, 0x8191, 0xFFE1, 0x8192, 0xFFE2, 0x81CA, 0xFFE3, 0x8150, + 0xFFE4, 0xFA55, 0xFFE5, 0x818F, 0, 0 +}; + +#if !_TINY_TABLE +static +const WCHAR sjis2uni[] = { +/* SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, SJIS - Unicode, */ + 0x00A1, 0xFF61, 0x00A2, 0xFF62, 0x00A3, 0xFF63, 0x00A4, 0xFF64, + 0x00A5, 0xFF65, 0x00A6, 0xFF66, 0x00A7, 0xFF67, 0x00A8, 0xFF68, + 0x00A9, 0xFF69, 0x00AA, 0xFF6A, 0x00AB, 0xFF6B, 0x00AC, 0xFF6C, + 0x00AD, 0xFF6D, 0x00AE, 0xFF6E, 0x00AF, 0xFF6F, 0x00B0, 0xFF70, + 0x00B1, 0xFF71, 0x00B2, 0xFF72, 0x00B3, 0xFF73, 0x00B4, 0xFF74, + 0x00B5, 0xFF75, 0x00B6, 0xFF76, 0x00B7, 0xFF77, 0x00B8, 0xFF78, + 0x00B9, 0xFF79, 0x00BA, 0xFF7A, 0x00BB, 0xFF7B, 0x00BC, 0xFF7C, + 0x00BD, 0xFF7D, 0x00BE, 0xFF7E, 0x00BF, 0xFF7F, 0x00C0, 0xFF80, + 0x00C1, 0xFF81, 0x00C2, 0xFF82, 0x00C3, 0xFF83, 0x00C4, 0xFF84, + 0x00C5, 0xFF85, 0x00C6, 0xFF86, 0x00C7, 0xFF87, 0x00C8, 0xFF88, + 0x00C9, 0xFF89, 0x00CA, 0xFF8A, 0x00CB, 0xFF8B, 0x00CC, 0xFF8C, + 0x00CD, 0xFF8D, 0x00CE, 0xFF8E, 0x00CF, 0xFF8F, 0x00D0, 0xFF90, + 0x00D1, 0xFF91, 0x00D2, 0xFF92, 0x00D3, 0xFF93, 0x00D4, 0xFF94, + 0x00D5, 0xFF95, 0x00D6, 0xFF96, 0x00D7, 0xFF97, 0x00D8, 0xFF98, + 0x00D9, 0xFF99, 0x00DA, 0xFF9A, 0x00DB, 0xFF9B, 0x00DC, 0xFF9C, + 0x00DD, 0xFF9D, 0x00DE, 0xFF9E, 0x00DF, 0xFF9F, 0x8140, 0x3000, + 0x8141, 0x3001, 0x8142, 0x3002, 0x8143, 0xFF0C, 0x8144, 0xFF0E, + 0x8145, 0x30FB, 0x8146, 0xFF1A, 0x8147, 0xFF1B, 0x8148, 0xFF1F, + 0x8149, 0xFF01, 0x814A, 0x309B, 0x814B, 0x309C, 0x814C, 0x00B4, + 0x814D, 0xFF40, 0x814E, 0x00A8, 0x814F, 0xFF3E, 0x8150, 0xFFE3, + 0x8151, 0xFF3F, 0x8152, 0x30FD, 0x8153, 0x30FE, 0x8154, 0x309D, + 0x8155, 0x309E, 0x8156, 0x3003, 0x8157, 0x4EDD, 0x8158, 0x3005, + 0x8159, 0x3006, 0x815A, 0x3007, 0x815B, 0x30FC, 0x815C, 0x2015, + 0x815D, 0x2010, 0x815E, 0xFF0F, 0x815F, 0xFF3C, 0x8160, 0xFF5E, + 0x8161, 0x2225, 0x8162, 0xFF5C, 0x8163, 0x2026, 0x8164, 0x2025, + 0x8165, 0x2018, 0x8166, 0x2019, 0x8167, 0x201C, 0x8168, 0x201D, + 0x8169, 0xFF08, 0x816A, 0xFF09, 0x816B, 0x3014, 0x816C, 0x3015, + 0x816D, 0xFF3B, 0x816E, 0xFF3D, 0x816F, 0xFF5B, 0x8170, 0xFF5D, + 0x8171, 0x3008, 0x8172, 0x3009, 0x8173, 0x300A, 0x8174, 0x300B, + 0x8175, 0x300C, 0x8176, 0x300D, 0x8177, 0x300E, 0x8178, 0x300F, + 0x8179, 0x3010, 0x817A, 0x3011, 0x817B, 0xFF0B, 0x817C, 0xFF0D, + 0x817D, 0x00B1, 0x817E, 0x00D7, 0x8180, 0x00F7, 0x8181, 0xFF1D, + 0x8182, 0x2260, 0x8183, 0xFF1C, 0x8184, 0xFF1E, 0x8185, 0x2266, + 0x8186, 0x2267, 0x8187, 0x221E, 0x8188, 0x2234, 0x8189, 0x2642, + 0x818A, 0x2640, 0x818B, 0x00B0, 0x818C, 0x2032, 0x818D, 0x2033, + 0x818E, 0x2103, 0x818F, 0xFFE5, 0x8190, 0xFF04, 0x8191, 0xFFE0, + 0x8192, 0xFFE1, 0x8193, 0xFF05, 0x8194, 0xFF03, 0x8195, 0xFF06, + 0x8196, 0xFF0A, 0x8197, 0xFF20, 0x8198, 0x00A7, 0x8199, 0x2606, + 0x819A, 0x2605, 0x819B, 0x25CB, 0x819C, 0x25CF, 0x819D, 0x25CE, + 0x819E, 0x25C7, 0x819F, 0x25C6, 0x81A0, 0x25A1, 0x81A1, 0x25A0, + 0x81A2, 0x25B3, 0x81A3, 0x25B2, 0x81A4, 0x25BD, 0x81A5, 0x25BC, + 0x81A6, 0x203B, 0x81A7, 0x3012, 0x81A8, 0x2192, 0x81A9, 0x2190, + 0x81AA, 0x2191, 0x81AB, 0x2193, 0x81AC, 0x3013, 0x81B8, 0x2208, + 0x81B9, 0x220B, 0x81BA, 0x2286, 0x81BB, 0x2287, 0x81BC, 0x2282, + 0x81BD, 0x2283, 0x81BE, 0x222A, 0x81BF, 0x2229, 0x81C8, 0x2227, + 0x81C9, 0x2228, 0x81CA, 0xFFE2, 0x81CB, 0x21D2, 0x81CC, 0x21D4, + 0x81CD, 0x2200, 0x81CE, 0x2203, 0x81DA, 0x2220, 0x81DB, 0x22A5, + 0x81DC, 0x2312, 0x81DD, 0x2202, 0x81DE, 0x2207, 0x81DF, 0x2261, + 0x81E0, 0x2252, 0x81E1, 0x226A, 0x81E2, 0x226B, 0x81E3, 0x221A, + 0x81E4, 0x223D, 0x81E5, 0x221D, 0x81E6, 0x2235, 0x81E7, 0x222B, + 0x81E8, 0x222C, 0x81F0, 0x212B, 0x81F1, 0x2030, 0x81F2, 0x266F, + 0x81F3, 0x266D, 0x81F4, 0x266A, 0x81F5, 0x2020, 0x81F6, 0x2021, + 0x81F7, 0x00B6, 0x81FC, 0x25EF, 0x824F, 0xFF10, 0x8250, 0xFF11, + 0x8251, 0xFF12, 0x8252, 0xFF13, 0x8253, 0xFF14, 0x8254, 0xFF15, + 0x8255, 0xFF16, 0x8256, 0xFF17, 0x8257, 0xFF18, 0x8258, 0xFF19, + 0x8260, 0xFF21, 0x8261, 0xFF22, 0x8262, 0xFF23, 0x8263, 0xFF24, + 0x8264, 0xFF25, 0x8265, 0xFF26, 0x8266, 0xFF27, 0x8267, 0xFF28, + 0x8268, 0xFF29, 0x8269, 0xFF2A, 0x826A, 0xFF2B, 0x826B, 0xFF2C, + 0x826C, 0xFF2D, 0x826D, 0xFF2E, 0x826E, 0xFF2F, 0x826F, 0xFF30, + 0x8270, 0xFF31, 0x8271, 0xFF32, 0x8272, 0xFF33, 0x8273, 0xFF34, + 0x8274, 0xFF35, 0x8275, 0xFF36, 0x8276, 0xFF37, 0x8277, 0xFF38, + 0x8278, 0xFF39, 0x8279, 0xFF3A, 0x8281, 0xFF41, 0x8282, 0xFF42, + 0x8283, 0xFF43, 0x8284, 0xFF44, 0x8285, 0xFF45, 0x8286, 0xFF46, + 0x8287, 0xFF47, 0x8288, 0xFF48, 0x8289, 0xFF49, 0x828A, 0xFF4A, + 0x828B, 0xFF4B, 0x828C, 0xFF4C, 0x828D, 0xFF4D, 0x828E, 0xFF4E, + 0x828F, 0xFF4F, 0x8290, 0xFF50, 0x8291, 0xFF51, 0x8292, 0xFF52, + 0x8293, 0xFF53, 0x8294, 0xFF54, 0x8295, 0xFF55, 0x8296, 0xFF56, + 0x8297, 0xFF57, 0x8298, 0xFF58, 0x8299, 0xFF59, 0x829A, 0xFF5A, + 0x829F, 0x3041, 0x82A0, 0x3042, 0x82A1, 0x3043, 0x82A2, 0x3044, + 0x82A3, 0x3045, 0x82A4, 0x3046, 0x82A5, 0x3047, 0x82A6, 0x3048, + 0x82A7, 0x3049, 0x82A8, 0x304A, 0x82A9, 0x304B, 0x82AA, 0x304C, + 0x82AB, 0x304D, 0x82AC, 0x304E, 0x82AD, 0x304F, 0x82AE, 0x3050, + 0x82AF, 0x3051, 0x82B0, 0x3052, 0x82B1, 0x3053, 0x82B2, 0x3054, + 0x82B3, 0x3055, 0x82B4, 0x3056, 0x82B5, 0x3057, 0x82B6, 0x3058, + 0x82B7, 0x3059, 0x82B8, 0x305A, 0x82B9, 0x305B, 0x82BA, 0x305C, + 0x82BB, 0x305D, 0x82BC, 0x305E, 0x82BD, 0x305F, 0x82BE, 0x3060, + 0x82BF, 0x3061, 0x82C0, 0x3062, 0x82C1, 0x3063, 0x82C2, 0x3064, + 0x82C3, 0x3065, 0x82C4, 0x3066, 0x82C5, 0x3067, 0x82C6, 0x3068, + 0x82C7, 0x3069, 0x82C8, 0x306A, 0x82C9, 0x306B, 0x82CA, 0x306C, + 0x82CB, 0x306D, 0x82CC, 0x306E, 0x82CD, 0x306F, 0x82CE, 0x3070, + 0x82CF, 0x3071, 0x82D0, 0x3072, 0x82D1, 0x3073, 0x82D2, 0x3074, + 0x82D3, 0x3075, 0x82D4, 0x3076, 0x82D5, 0x3077, 0x82D6, 0x3078, + 0x82D7, 0x3079, 0x82D8, 0x307A, 0x82D9, 0x307B, 0x82DA, 0x307C, + 0x82DB, 0x307D, 0x82DC, 0x307E, 0x82DD, 0x307F, 0x82DE, 0x3080, + 0x82DF, 0x3081, 0x82E0, 0x3082, 0x82E1, 0x3083, 0x82E2, 0x3084, + 0x82E3, 0x3085, 0x82E4, 0x3086, 0x82E5, 0x3087, 0x82E6, 0x3088, + 0x82E7, 0x3089, 0x82E8, 0x308A, 0x82E9, 0x308B, 0x82EA, 0x308C, + 0x82EB, 0x308D, 0x82EC, 0x308E, 0x82ED, 0x308F, 0x82EE, 0x3090, + 0x82EF, 0x3091, 0x82F0, 0x3092, 0x82F1, 0x3093, 0x8340, 0x30A1, + 0x8341, 0x30A2, 0x8342, 0x30A3, 0x8343, 0x30A4, 0x8344, 0x30A5, + 0x8345, 0x30A6, 0x8346, 0x30A7, 0x8347, 0x30A8, 0x8348, 0x30A9, + 0x8349, 0x30AA, 0x834A, 0x30AB, 0x834B, 0x30AC, 0x834C, 0x30AD, + 0x834D, 0x30AE, 0x834E, 0x30AF, 0x834F, 0x30B0, 0x8350, 0x30B1, + 0x8351, 0x30B2, 0x8352, 0x30B3, 0x8353, 0x30B4, 0x8354, 0x30B5, + 0x8355, 0x30B6, 0x8356, 0x30B7, 0x8357, 0x30B8, 0x8358, 0x30B9, + 0x8359, 0x30BA, 0x835A, 0x30BB, 0x835B, 0x30BC, 0x835C, 0x30BD, + 0x835D, 0x30BE, 0x835E, 0x30BF, 0x835F, 0x30C0, 0x8360, 0x30C1, + 0x8361, 0x30C2, 0x8362, 0x30C3, 0x8363, 0x30C4, 0x8364, 0x30C5, + 0x8365, 0x30C6, 0x8366, 0x30C7, 0x8367, 0x30C8, 0x8368, 0x30C9, + 0x8369, 0x30CA, 0x836A, 0x30CB, 0x836B, 0x30CC, 0x836C, 0x30CD, + 0x836D, 0x30CE, 0x836E, 0x30CF, 0x836F, 0x30D0, 0x8370, 0x30D1, + 0x8371, 0x30D2, 0x8372, 0x30D3, 0x8373, 0x30D4, 0x8374, 0x30D5, + 0x8375, 0x30D6, 0x8376, 0x30D7, 0x8377, 0x30D8, 0x8378, 0x30D9, + 0x8379, 0x30DA, 0x837A, 0x30DB, 0x837B, 0x30DC, 0x837C, 0x30DD, + 0x837D, 0x30DE, 0x837E, 0x30DF, 0x8380, 0x30E0, 0x8381, 0x30E1, + 0x8382, 0x30E2, 0x8383, 0x30E3, 0x8384, 0x30E4, 0x8385, 0x30E5, + 0x8386, 0x30E6, 0x8387, 0x30E7, 0x8388, 0x30E8, 0x8389, 0x30E9, + 0x838A, 0x30EA, 0x838B, 0x30EB, 0x838C, 0x30EC, 0x838D, 0x30ED, + 0x838E, 0x30EE, 0x838F, 0x30EF, 0x8390, 0x30F0, 0x8391, 0x30F1, + 0x8392, 0x30F2, 0x8393, 0x30F3, 0x8394, 0x3094, 0x8394, 0x30F4, + 0x8395, 0x30F5, 0x8396, 0x30F6, 0x839F, 0x0391, 0x83A0, 0x0392, + 0x83A1, 0x0393, 0x83A2, 0x0394, 0x83A3, 0x0395, 0x83A4, 0x0396, + 0x83A5, 0x0397, 0x83A6, 0x0398, 0x83A7, 0x0399, 0x83A8, 0x039A, + 0x83A9, 0x039B, 0x83AA, 0x039C, 0x83AB, 0x039D, 0x83AC, 0x039E, + 0x83AD, 0x039F, 0x83AE, 0x03A0, 0x83AF, 0x03A1, 0x83B0, 0x03A3, + 0x83B1, 0x03A4, 0x83B2, 0x03A5, 0x83B3, 0x03A6, 0x83B4, 0x03A7, + 0x83B5, 0x03A8, 0x83B6, 0x03A9, 0x83BF, 0x03B1, 0x83C0, 0x03B2, + 0x83C1, 0x03B3, 0x83C2, 0x03B4, 0x83C3, 0x03B5, 0x83C4, 0x03B6, + 0x83C5, 0x03B7, 0x83C6, 0x03B8, 0x83C7, 0x03B9, 0x83C8, 0x03BA, + 0x83C9, 0x03BB, 0x83CA, 0x03BC, 0x83CB, 0x03BD, 0x83CC, 0x03BE, + 0x83CD, 0x03BF, 0x83CE, 0x03C0, 0x83CF, 0x03C1, 0x83D0, 0x03C3, + 0x83D1, 0x03C4, 0x83D2, 0x03C5, 0x83D3, 0x03C6, 0x83D4, 0x03C7, + 0x83D5, 0x03C8, 0x83D6, 0x03C9, 0x8440, 0x0410, 0x8441, 0x0411, + 0x8442, 0x0412, 0x8443, 0x0413, 0x8444, 0x0414, 0x8445, 0x0415, + 0x8446, 0x0401, 0x8447, 0x0416, 0x8448, 0x0417, 0x8449, 0x0418, + 0x844A, 0x0419, 0x844B, 0x041A, 0x844C, 0x041B, 0x844D, 0x041C, + 0x844E, 0x041D, 0x844F, 0x041E, 0x8450, 0x041F, 0x8451, 0x0420, + 0x8452, 0x0421, 0x8453, 0x0422, 0x8454, 0x0423, 0x8455, 0x0424, + 0x8456, 0x0425, 0x8457, 0x0426, 0x8458, 0x0427, 0x8459, 0x0428, + 0x845A, 0x0429, 0x845B, 0x042A, 0x845C, 0x042B, 0x845D, 0x042C, + 0x845E, 0x042D, 0x845F, 0x042E, 0x8460, 0x042F, 0x8470, 0x0430, + 0x8471, 0x0431, 0x8472, 0x0432, 0x8473, 0x0433, 0x8474, 0x0434, + 0x8475, 0x0435, 0x8476, 0x0451, 0x8477, 0x0436, 0x8478, 0x0437, + 0x8479, 0x0438, 0x847A, 0x0439, 0x847B, 0x043A, 0x847C, 0x043B, + 0x847D, 0x043C, 0x847E, 0x043D, 0x8480, 0x043E, 0x8481, 0x043F, + 0x8482, 0x0440, 0x8483, 0x0441, 0x8484, 0x0442, 0x8485, 0x0443, + 0x8486, 0x0444, 0x8487, 0x0445, 0x8488, 0x0446, 0x8489, 0x0447, + 0x848A, 0x0448, 0x848B, 0x0449, 0x848C, 0x044A, 0x848D, 0x044B, + 0x848E, 0x044C, 0x848F, 0x044D, 0x8490, 0x044E, 0x8491, 0x044F, + 0x849F, 0x2500, 0x84A0, 0x2502, 0x84A1, 0x250C, 0x84A2, 0x2510, + 0x84A3, 0x2518, 0x84A4, 0x2514, 0x84A5, 0x251C, 0x84A6, 0x252C, + 0x84A7, 0x2524, 0x84A8, 0x2534, 0x84A9, 0x253C, 0x84AA, 0x2501, + 0x84AB, 0x2503, 0x84AC, 0x250F, 0x84AD, 0x2513, 0x84AE, 0x251B, + 0x84AF, 0x2517, 0x84B0, 0x2523, 0x84B1, 0x2533, 0x84B2, 0x252B, + 0x84B3, 0x253B, 0x84B4, 0x254B, 0x84B5, 0x2520, 0x84B6, 0x252F, + 0x84B7, 0x2528, 0x84B8, 0x2537, 0x84B9, 0x253F, 0x84BA, 0x251D, + 0x84BB, 0x2530, 0x84BC, 0x2525, 0x84BD, 0x2538, 0x84BE, 0x2542, + 0x8740, 0x2460, 0x8741, 0x2461, 0x8742, 0x2462, 0x8743, 0x2463, + 0x8744, 0x2464, 0x8745, 0x2465, 0x8746, 0x2466, 0x8747, 0x2467, + 0x8748, 0x2468, 0x8749, 0x2469, 0x874A, 0x246A, 0x874B, 0x246B, + 0x874C, 0x246C, 0x874D, 0x246D, 0x874E, 0x246E, 0x874F, 0x246F, + 0x8750, 0x2470, 0x8751, 0x2471, 0x8752, 0x2472, 0x8753, 0x2473, + 0x8754, 0x2160, 0x8755, 0x2161, 0x8756, 0x2162, 0x8757, 0x2163, + 0x8758, 0x2164, 0x8759, 0x2165, 0x875A, 0x2166, 0x875B, 0x2167, + 0x875C, 0x2168, 0x875D, 0x2169, 0x875F, 0x3349, 0x8760, 0x3314, + 0x8761, 0x3322, 0x8762, 0x334D, 0x8763, 0x3318, 0x8764, 0x3327, + 0x8765, 0x3303, 0x8766, 0x3336, 0x8767, 0x3351, 0x8768, 0x3357, + 0x8769, 0x330D, 0x876A, 0x3326, 0x876B, 0x3323, 0x876C, 0x332B, + 0x876D, 0x334A, 0x876E, 0x333B, 0x876F, 0x339C, 0x8770, 0x339D, + 0x8771, 0x339E, 0x8772, 0x338E, 0x8773, 0x338F, 0x8774, 0x33C4, + 0x8775, 0x33A1, 0x877E, 0x337B, 0x8780, 0x301D, 0x8781, 0x301F, + 0x8782, 0x2116, 0x8783, 0x33CD, 0x8784, 0x2121, 0x8785, 0x32A4, + 0x8786, 0x32A5, 0x8787, 0x32A6, 0x8788, 0x32A7, 0x8789, 0x32A8, + 0x878A, 0x3231, 0x878B, 0x3232, 0x878C, 0x3239, 0x878D, 0x337E, + 0x878E, 0x337D, 0x878F, 0x337C, 0x8793, 0x222E, 0x8794, 0x2211, + 0x8798, 0x221F, 0x8799, 0x22BF, 0x889F, 0x4E9C, 0x88A0, 0x5516, + 0x88A1, 0x5A03, 0x88A2, 0x963F, 0x88A3, 0x54C0, 0x88A4, 0x611B, + 0x88A5, 0x6328, 0x88A6, 0x59F6, 0x88A7, 0x9022, 0x88A8, 0x8475, + 0x88A9, 0x831C, 0x88AA, 0x7A50, 0x88AB, 0x60AA, 0x88AC, 0x63E1, + 0x88AD, 0x6E25, 0x88AE, 0x65ED, 0x88AF, 0x8466, 0x88B0, 0x82A6, + 0x88B1, 0x9BF5, 0x88B2, 0x6893, 0x88B3, 0x5727, 0x88B4, 0x65A1, + 0x88B5, 0x6271, 0x88B6, 0x5B9B, 0x88B7, 0x59D0, 0x88B8, 0x867B, + 0x88B9, 0x98F4, 0x88BA, 0x7D62, 0x88BB, 0x7DBE, 0x88BC, 0x9B8E, + 0x88BD, 0x6216, 0x88BE, 0x7C9F, 0x88BF, 0x88B7, 0x88C0, 0x5B89, + 0x88C1, 0x5EB5, 0x88C2, 0x6309, 0x88C3, 0x6697, 0x88C4, 0x6848, + 0x88C5, 0x95C7, 0x88C6, 0x978D, 0x88C7, 0x674F, 0x88C8, 0x4EE5, + 0x88C9, 0x4F0A, 0x88CA, 0x4F4D, 0x88CB, 0x4F9D, 0x88CC, 0x5049, + 0x88CD, 0x56F2, 0x88CE, 0x5937, 0x88CF, 0x59D4, 0x88D0, 0x5A01, + 0x88D1, 0x5C09, 0x88D2, 0x60DF, 0x88D3, 0x610F, 0x88D4, 0x6170, + 0x88D5, 0x6613, 0x88D6, 0x6905, 0x88D7, 0x70BA, 0x88D8, 0x754F, + 0x88D9, 0x7570, 0x88DA, 0x79FB, 0x88DB, 0x7DAD, 0x88DC, 0x7DEF, + 0x88DD, 0x80C3, 0x88DE, 0x840E, 0x88DF, 0x8863, 0x88E0, 0x8B02, + 0x88E1, 0x9055, 0x88E2, 0x907A, 0x88E3, 0x533B, 0x88E4, 0x4E95, + 0x88E5, 0x4EA5, 0x88E6, 0x57DF, 0x88E7, 0x80B2, 0x88E8, 0x90C1, + 0x88E9, 0x78EF, 0x88EA, 0x4E00, 0x88EB, 0x58F1, 0x88EC, 0x6EA2, + 0x88ED, 0x9038, 0x88EE, 0x7A32, 0x88EF, 0x8328, 0x88F0, 0x828B, + 0x88F1, 0x9C2F, 0x88F2, 0x5141, 0x88F3, 0x5370, 0x88F4, 0x54BD, + 0x88F5, 0x54E1, 0x88F6, 0x56E0, 0x88F7, 0x59FB, 0x88F8, 0x5F15, + 0x88F9, 0x98F2, 0x88FA, 0x6DEB, 0x88FB, 0x80E4, 0x88FC, 0x852D, + 0x8940, 0x9662, 0x8941, 0x9670, 0x8942, 0x96A0, 0x8943, 0x97FB, + 0x8944, 0x540B, 0x8945, 0x53F3, 0x8946, 0x5B87, 0x8947, 0x70CF, + 0x8948, 0x7FBD, 0x8949, 0x8FC2, 0x894A, 0x96E8, 0x894B, 0x536F, + 0x894C, 0x9D5C, 0x894D, 0x7ABA, 0x894E, 0x4E11, 0x894F, 0x7893, + 0x8950, 0x81FC, 0x8951, 0x6E26, 0x8952, 0x5618, 0x8953, 0x5504, + 0x8954, 0x6B1D, 0x8955, 0x851A, 0x8956, 0x9C3B, 0x8957, 0x59E5, + 0x8958, 0x53A9, 0x8959, 0x6D66, 0x895A, 0x74DC, 0x895B, 0x958F, + 0x895C, 0x5642, 0x895D, 0x4E91, 0x895E, 0x904B, 0x895F, 0x96F2, + 0x8960, 0x834F, 0x8961, 0x990C, 0x8962, 0x53E1, 0x8963, 0x55B6, + 0x8964, 0x5B30, 0x8965, 0x5F71, 0x8966, 0x6620, 0x8967, 0x66F3, + 0x8968, 0x6804, 0x8969, 0x6C38, 0x896A, 0x6CF3, 0x896B, 0x6D29, + 0x896C, 0x745B, 0x896D, 0x76C8, 0x896E, 0x7A4E, 0x896F, 0x9834, + 0x8970, 0x82F1, 0x8971, 0x885B, 0x8972, 0x8A60, 0x8973, 0x92ED, + 0x8974, 0x6DB2, 0x8975, 0x75AB, 0x8976, 0x76CA, 0x8977, 0x99C5, + 0x8978, 0x60A6, 0x8979, 0x8B01, 0x897A, 0x8D8A, 0x897B, 0x95B2, + 0x897C, 0x698E, 0x897D, 0x53AD, 0x897E, 0x5186, 0x8980, 0x5712, + 0x8981, 0x5830, 0x8982, 0x5944, 0x8983, 0x5BB4, 0x8984, 0x5EF6, + 0x8985, 0x6028, 0x8986, 0x63A9, 0x8987, 0x63F4, 0x8988, 0x6CBF, + 0x8989, 0x6F14, 0x898A, 0x708E, 0x898B, 0x7114, 0x898C, 0x7159, + 0x898D, 0x71D5, 0x898E, 0x733F, 0x898F, 0x7E01, 0x8990, 0x8276, + 0x8991, 0x82D1, 0x8992, 0x8597, 0x8993, 0x9060, 0x8994, 0x925B, + 0x8995, 0x9D1B, 0x8996, 0x5869, 0x8997, 0x65BC, 0x8998, 0x6C5A, + 0x8999, 0x7525, 0x899A, 0x51F9, 0x899B, 0x592E, 0x899C, 0x5965, + 0x899D, 0x5F80, 0x899E, 0x5FDC, 0x899F, 0x62BC, 0x89A0, 0x65FA, + 0x89A1, 0x6A2A, 0x89A2, 0x6B27, 0x89A3, 0x6BB4, 0x89A4, 0x738B, + 0x89A5, 0x7FC1, 0x89A6, 0x8956, 0x89A7, 0x9D2C, 0x89A8, 0x9D0E, + 0x89A9, 0x9EC4, 0x89AA, 0x5CA1, 0x89AB, 0x6C96, 0x89AC, 0x837B, + 0x89AD, 0x5104, 0x89AE, 0x5C4B, 0x89AF, 0x61B6, 0x89B0, 0x81C6, + 0x89B1, 0x6876, 0x89B2, 0x7261, 0x89B3, 0x4E59, 0x89B4, 0x4FFA, + 0x89B5, 0x5378, 0x89B6, 0x6069, 0x89B7, 0x6E29, 0x89B8, 0x7A4F, + 0x89B9, 0x97F3, 0x89BA, 0x4E0B, 0x89BB, 0x5316, 0x89BC, 0x4EEE, + 0x89BD, 0x4F55, 0x89BE, 0x4F3D, 0x89BF, 0x4FA1, 0x89C0, 0x4F73, + 0x89C1, 0x52A0, 0x89C2, 0x53EF, 0x89C3, 0x5609, 0x89C4, 0x590F, + 0x89C5, 0x5AC1, 0x89C6, 0x5BB6, 0x89C7, 0x5BE1, 0x89C8, 0x79D1, + 0x89C9, 0x6687, 0x89CA, 0x679C, 0x89CB, 0x67B6, 0x89CC, 0x6B4C, + 0x89CD, 0x6CB3, 0x89CE, 0x706B, 0x89CF, 0x73C2, 0x89D0, 0x798D, + 0x89D1, 0x79BE, 0x89D2, 0x7A3C, 0x89D3, 0x7B87, 0x89D4, 0x82B1, + 0x89D5, 0x82DB, 0x89D6, 0x8304, 0x89D7, 0x8377, 0x89D8, 0x83EF, + 0x89D9, 0x83D3, 0x89DA, 0x8766, 0x89DB, 0x8AB2, 0x89DC, 0x5629, + 0x89DD, 0x8CA8, 0x89DE, 0x8FE6, 0x89DF, 0x904E, 0x89E0, 0x971E, + 0x89E1, 0x868A, 0x89E2, 0x4FC4, 0x89E3, 0x5CE8, 0x89E4, 0x6211, + 0x89E5, 0x7259, 0x89E6, 0x753B, 0x89E7, 0x81E5, 0x89E8, 0x82BD, + 0x89E9, 0x86FE, 0x89EA, 0x8CC0, 0x89EB, 0x96C5, 0x89EC, 0x9913, + 0x89ED, 0x99D5, 0x89EE, 0x4ECB, 0x89EF, 0x4F1A, 0x89F0, 0x89E3, + 0x89F1, 0x56DE, 0x89F2, 0x584A, 0x89F3, 0x58CA, 0x89F4, 0x5EFB, + 0x89F5, 0x5FEB, 0x89F6, 0x602A, 0x89F7, 0x6094, 0x89F8, 0x6062, + 0x89F9, 0x61D0, 0x89FA, 0x6212, 0x89FB, 0x62D0, 0x89FC, 0x6539, + 0x8A40, 0x9B41, 0x8A41, 0x6666, 0x8A42, 0x68B0, 0x8A43, 0x6D77, + 0x8A44, 0x7070, 0x8A45, 0x754C, 0x8A46, 0x7686, 0x8A47, 0x7D75, + 0x8A48, 0x82A5, 0x8A49, 0x87F9, 0x8A4A, 0x958B, 0x8A4B, 0x968E, + 0x8A4C, 0x8C9D, 0x8A4D, 0x51F1, 0x8A4E, 0x52BE, 0x8A4F, 0x5916, + 0x8A50, 0x54B3, 0x8A51, 0x5BB3, 0x8A52, 0x5D16, 0x8A53, 0x6168, + 0x8A54, 0x6982, 0x8A55, 0x6DAF, 0x8A56, 0x788D, 0x8A57, 0x84CB, + 0x8A58, 0x8857, 0x8A59, 0x8A72, 0x8A5A, 0x93A7, 0x8A5B, 0x9AB8, + 0x8A5C, 0x6D6C, 0x8A5D, 0x99A8, 0x8A5E, 0x86D9, 0x8A5F, 0x57A3, + 0x8A60, 0x67FF, 0x8A61, 0x86CE, 0x8A62, 0x920E, 0x8A63, 0x5283, + 0x8A64, 0x5687, 0x8A65, 0x5404, 0x8A66, 0x5ED3, 0x8A67, 0x62E1, + 0x8A68, 0x64B9, 0x8A69, 0x683C, 0x8A6A, 0x6838, 0x8A6B, 0x6BBB, + 0x8A6C, 0x7372, 0x8A6D, 0x78BA, 0x8A6E, 0x7A6B, 0x8A6F, 0x899A, + 0x8A70, 0x89D2, 0x8A71, 0x8D6B, 0x8A72, 0x8F03, 0x8A73, 0x90ED, + 0x8A74, 0x95A3, 0x8A75, 0x9694, 0x8A76, 0x9769, 0x8A77, 0x5B66, + 0x8A78, 0x5CB3, 0x8A79, 0x697D, 0x8A7A, 0x984D, 0x8A7B, 0x984E, + 0x8A7C, 0x639B, 0x8A7D, 0x7B20, 0x8A7E, 0x6A2B, 0x8A80, 0x6A7F, + 0x8A81, 0x68B6, 0x8A82, 0x9C0D, 0x8A83, 0x6F5F, 0x8A84, 0x5272, + 0x8A85, 0x559D, 0x8A86, 0x6070, 0x8A87, 0x62EC, 0x8A88, 0x6D3B, + 0x8A89, 0x6E07, 0x8A8A, 0x6ED1, 0x8A8B, 0x845B, 0x8A8C, 0x8910, + 0x8A8D, 0x8F44, 0x8A8E, 0x4E14, 0x8A8F, 0x9C39, 0x8A90, 0x53F6, + 0x8A91, 0x691B, 0x8A92, 0x6A3A, 0x8A93, 0x9784, 0x8A94, 0x682A, + 0x8A95, 0x515C, 0x8A96, 0x7AC3, 0x8A97, 0x84B2, 0x8A98, 0x91DC, + 0x8A99, 0x938C, 0x8A9A, 0x565B, 0x8A9B, 0x9D28, 0x8A9C, 0x6822, + 0x8A9D, 0x8305, 0x8A9E, 0x8431, 0x8A9F, 0x7CA5, 0x8AA0, 0x5208, + 0x8AA1, 0x82C5, 0x8AA2, 0x74E6, 0x8AA3, 0x4E7E, 0x8AA4, 0x4F83, + 0x8AA5, 0x51A0, 0x8AA6, 0x5BD2, 0x8AA7, 0x520A, 0x8AA8, 0x52D8, + 0x8AA9, 0x52E7, 0x8AAA, 0x5DFB, 0x8AAB, 0x559A, 0x8AAC, 0x582A, + 0x8AAD, 0x59E6, 0x8AAE, 0x5B8C, 0x8AAF, 0x5B98, 0x8AB0, 0x5BDB, + 0x8AB1, 0x5E72, 0x8AB2, 0x5E79, 0x8AB3, 0x60A3, 0x8AB4, 0x611F, + 0x8AB5, 0x6163, 0x8AB6, 0x61BE, 0x8AB7, 0x63DB, 0x8AB8, 0x6562, + 0x8AB9, 0x67D1, 0x8ABA, 0x6853, 0x8ABB, 0x68FA, 0x8ABC, 0x6B3E, + 0x8ABD, 0x6B53, 0x8ABE, 0x6C57, 0x8ABF, 0x6F22, 0x8AC0, 0x6F97, + 0x8AC1, 0x6F45, 0x8AC2, 0x74B0, 0x8AC3, 0x7518, 0x8AC4, 0x76E3, + 0x8AC5, 0x770B, 0x8AC6, 0x7AFF, 0x8AC7, 0x7BA1, 0x8AC8, 0x7C21, + 0x8AC9, 0x7DE9, 0x8ACA, 0x7F36, 0x8ACB, 0x7FF0, 0x8ACC, 0x809D, + 0x8ACD, 0x8266, 0x8ACE, 0x839E, 0x8ACF, 0x89B3, 0x8AD0, 0x8ACC, + 0x8AD1, 0x8CAB, 0x8AD2, 0x9084, 0x8AD3, 0x9451, 0x8AD4, 0x9593, + 0x8AD5, 0x9591, 0x8AD6, 0x95A2, 0x8AD7, 0x9665, 0x8AD8, 0x97D3, + 0x8AD9, 0x9928, 0x8ADA, 0x8218, 0x8ADB, 0x4E38, 0x8ADC, 0x542B, + 0x8ADD, 0x5CB8, 0x8ADE, 0x5DCC, 0x8ADF, 0x73A9, 0x8AE0, 0x764C, + 0x8AE1, 0x773C, 0x8AE2, 0x5CA9, 0x8AE3, 0x7FEB, 0x8AE4, 0x8D0B, + 0x8AE5, 0x96C1, 0x8AE6, 0x9811, 0x8AE7, 0x9854, 0x8AE8, 0x9858, + 0x8AE9, 0x4F01, 0x8AEA, 0x4F0E, 0x8AEB, 0x5371, 0x8AEC, 0x559C, + 0x8AED, 0x5668, 0x8AEE, 0x57FA, 0x8AEF, 0x5947, 0x8AF0, 0x5B09, + 0x8AF1, 0x5BC4, 0x8AF2, 0x5C90, 0x8AF3, 0x5E0C, 0x8AF4, 0x5E7E, + 0x8AF5, 0x5FCC, 0x8AF6, 0x63EE, 0x8AF7, 0x673A, 0x8AF8, 0x65D7, + 0x8AF9, 0x65E2, 0x8AFA, 0x671F, 0x8AFB, 0x68CB, 0x8AFC, 0x68C4, + 0x8B40, 0x6A5F, 0x8B41, 0x5E30, 0x8B42, 0x6BC5, 0x8B43, 0x6C17, + 0x8B44, 0x6C7D, 0x8B45, 0x757F, 0x8B46, 0x7948, 0x8B47, 0x5B63, + 0x8B48, 0x7A00, 0x8B49, 0x7D00, 0x8B4A, 0x5FBD, 0x8B4B, 0x898F, + 0x8B4C, 0x8A18, 0x8B4D, 0x8CB4, 0x8B4E, 0x8D77, 0x8B4F, 0x8ECC, + 0x8B50, 0x8F1D, 0x8B51, 0x98E2, 0x8B52, 0x9A0E, 0x8B53, 0x9B3C, + 0x8B54, 0x4E80, 0x8B55, 0x507D, 0x8B56, 0x5100, 0x8B57, 0x5993, + 0x8B58, 0x5B9C, 0x8B59, 0x622F, 0x8B5A, 0x6280, 0x8B5B, 0x64EC, + 0x8B5C, 0x6B3A, 0x8B5D, 0x72A0, 0x8B5E, 0x7591, 0x8B5F, 0x7947, + 0x8B60, 0x7FA9, 0x8B61, 0x87FB, 0x8B62, 0x8ABC, 0x8B63, 0x8B70, + 0x8B64, 0x63AC, 0x8B65, 0x83CA, 0x8B66, 0x97A0, 0x8B67, 0x5409, + 0x8B68, 0x5403, 0x8B69, 0x55AB, 0x8B6A, 0x6854, 0x8B6B, 0x6A58, + 0x8B6C, 0x8A70, 0x8B6D, 0x7827, 0x8B6E, 0x6775, 0x8B6F, 0x9ECD, + 0x8B70, 0x5374, 0x8B71, 0x5BA2, 0x8B72, 0x811A, 0x8B73, 0x8650, + 0x8B74, 0x9006, 0x8B75, 0x4E18, 0x8B76, 0x4E45, 0x8B77, 0x4EC7, + 0x8B78, 0x4F11, 0x8B79, 0x53CA, 0x8B7A, 0x5438, 0x8B7B, 0x5BAE, + 0x8B7C, 0x5F13, 0x8B7D, 0x6025, 0x8B7E, 0x6551, 0x8B80, 0x673D, + 0x8B81, 0x6C42, 0x8B82, 0x6C72, 0x8B83, 0x6CE3, 0x8B84, 0x7078, + 0x8B85, 0x7403, 0x8B86, 0x7A76, 0x8B87, 0x7AAE, 0x8B88, 0x7B08, + 0x8B89, 0x7D1A, 0x8B8A, 0x7CFE, 0x8B8B, 0x7D66, 0x8B8C, 0x65E7, + 0x8B8D, 0x725B, 0x8B8E, 0x53BB, 0x8B8F, 0x5C45, 0x8B90, 0x5DE8, + 0x8B91, 0x62D2, 0x8B92, 0x62E0, 0x8B93, 0x6319, 0x8B94, 0x6E20, + 0x8B95, 0x865A, 0x8B96, 0x8A31, 0x8B97, 0x8DDD, 0x8B98, 0x92F8, + 0x8B99, 0x6F01, 0x8B9A, 0x79A6, 0x8B9B, 0x9B5A, 0x8B9C, 0x4EA8, + 0x8B9D, 0x4EAB, 0x8B9E, 0x4EAC, 0x8B9F, 0x4F9B, 0x8BA0, 0x4FA0, + 0x8BA1, 0x50D1, 0x8BA2, 0x5147, 0x8BA3, 0x7AF6, 0x8BA4, 0x5171, + 0x8BA5, 0x51F6, 0x8BA6, 0x5354, 0x8BA7, 0x5321, 0x8BA8, 0x537F, + 0x8BA9, 0x53EB, 0x8BAA, 0x55AC, 0x8BAB, 0x5883, 0x8BAC, 0x5CE1, + 0x8BAD, 0x5F37, 0x8BAE, 0x5F4A, 0x8BAF, 0x602F, 0x8BB0, 0x6050, + 0x8BB1, 0x606D, 0x8BB2, 0x631F, 0x8BB3, 0x6559, 0x8BB4, 0x6A4B, + 0x8BB5, 0x6CC1, 0x8BB6, 0x72C2, 0x8BB7, 0x72ED, 0x8BB8, 0x77EF, + 0x8BB9, 0x80F8, 0x8BBA, 0x8105, 0x8BBB, 0x8208, 0x8BBC, 0x854E, + 0x8BBD, 0x90F7, 0x8BBE, 0x93E1, 0x8BBF, 0x97FF, 0x8BC0, 0x9957, + 0x8BC1, 0x9A5A, 0x8BC2, 0x4EF0, 0x8BC3, 0x51DD, 0x8BC4, 0x5C2D, + 0x8BC5, 0x6681, 0x8BC6, 0x696D, 0x8BC7, 0x5C40, 0x8BC8, 0x66F2, + 0x8BC9, 0x6975, 0x8BCA, 0x7389, 0x8BCB, 0x6850, 0x8BCC, 0x7C81, + 0x8BCD, 0x50C5, 0x8BCE, 0x52E4, 0x8BCF, 0x5747, 0x8BD0, 0x5DFE, + 0x8BD1, 0x9326, 0x8BD2, 0x65A4, 0x8BD3, 0x6B23, 0x8BD4, 0x6B3D, + 0x8BD5, 0x7434, 0x8BD6, 0x7981, 0x8BD7, 0x79BD, 0x8BD8, 0x7B4B, + 0x8BD9, 0x7DCA, 0x8BDA, 0x82B9, 0x8BDB, 0x83CC, 0x8BDC, 0x887F, + 0x8BDD, 0x895F, 0x8BDE, 0x8B39, 0x8BDF, 0x8FD1, 0x8BE0, 0x91D1, + 0x8BE1, 0x541F, 0x8BE2, 0x9280, 0x8BE3, 0x4E5D, 0x8BE4, 0x5036, + 0x8BE5, 0x53E5, 0x8BE6, 0x533A, 0x8BE7, 0x72D7, 0x8BE8, 0x7396, + 0x8BE9, 0x77E9, 0x8BEA, 0x82E6, 0x8BEB, 0x8EAF, 0x8BEC, 0x99C6, + 0x8BED, 0x99C8, 0x8BEE, 0x99D2, 0x8BEF, 0x5177, 0x8BF0, 0x611A, + 0x8BF1, 0x865E, 0x8BF2, 0x55B0, 0x8BF3, 0x7A7A, 0x8BF4, 0x5076, + 0x8BF5, 0x5BD3, 0x8BF6, 0x9047, 0x8BF7, 0x9685, 0x8BF8, 0x4E32, + 0x8BF9, 0x6ADB, 0x8BFA, 0x91E7, 0x8BFB, 0x5C51, 0x8BFC, 0x5C48, + 0x8C40, 0x6398, 0x8C41, 0x7A9F, 0x8C42, 0x6C93, 0x8C43, 0x9774, + 0x8C44, 0x8F61, 0x8C45, 0x7AAA, 0x8C46, 0x718A, 0x8C47, 0x9688, + 0x8C48, 0x7C82, 0x8C49, 0x6817, 0x8C4A, 0x7E70, 0x8C4B, 0x6851, + 0x8C4C, 0x936C, 0x8C4D, 0x52F2, 0x8C4E, 0x541B, 0x8C4F, 0x85AB, + 0x8C50, 0x8A13, 0x8C51, 0x7FA4, 0x8C52, 0x8ECD, 0x8C53, 0x90E1, + 0x8C54, 0x5366, 0x8C55, 0x8888, 0x8C56, 0x7941, 0x8C57, 0x4FC2, + 0x8C58, 0x50BE, 0x8C59, 0x5211, 0x8C5A, 0x5144, 0x8C5B, 0x5553, + 0x8C5C, 0x572D, 0x8C5D, 0x73EA, 0x8C5E, 0x578B, 0x8C5F, 0x5951, + 0x8C60, 0x5F62, 0x8C61, 0x5F84, 0x8C62, 0x6075, 0x8C63, 0x6176, + 0x8C64, 0x6167, 0x8C65, 0x61A9, 0x8C66, 0x63B2, 0x8C67, 0x643A, + 0x8C68, 0x656C, 0x8C69, 0x666F, 0x8C6A, 0x6842, 0x8C6B, 0x6E13, + 0x8C6C, 0x7566, 0x8C6D, 0x7A3D, 0x8C6E, 0x7CFB, 0x8C6F, 0x7D4C, + 0x8C70, 0x7D99, 0x8C71, 0x7E4B, 0x8C72, 0x7F6B, 0x8C73, 0x830E, + 0x8C74, 0x834A, 0x8C75, 0x86CD, 0x8C76, 0x8A08, 0x8C77, 0x8A63, + 0x8C78, 0x8B66, 0x8C79, 0x8EFD, 0x8C7A, 0x981A, 0x8C7B, 0x9D8F, + 0x8C7C, 0x82B8, 0x8C7D, 0x8FCE, 0x8C7E, 0x9BE8, 0x8C80, 0x5287, + 0x8C81, 0x621F, 0x8C82, 0x6483, 0x8C83, 0x6FC0, 0x8C84, 0x9699, + 0x8C85, 0x6841, 0x8C86, 0x5091, 0x8C87, 0x6B20, 0x8C88, 0x6C7A, + 0x8C89, 0x6F54, 0x8C8A, 0x7A74, 0x8C8B, 0x7D50, 0x8C8C, 0x8840, + 0x8C8D, 0x8A23, 0x8C8E, 0x6708, 0x8C8F, 0x4EF6, 0x8C90, 0x5039, + 0x8C91, 0x5026, 0x8C92, 0x5065, 0x8C93, 0x517C, 0x8C94, 0x5238, + 0x8C95, 0x5263, 0x8C96, 0x55A7, 0x8C97, 0x570F, 0x8C98, 0x5805, + 0x8C99, 0x5ACC, 0x8C9A, 0x5EFA, 0x8C9B, 0x61B2, 0x8C9C, 0x61F8, + 0x8C9D, 0x62F3, 0x8C9E, 0x6372, 0x8C9F, 0x691C, 0x8CA0, 0x6A29, + 0x8CA1, 0x727D, 0x8CA2, 0x72AC, 0x8CA3, 0x732E, 0x8CA4, 0x7814, + 0x8CA5, 0x786F, 0x8CA6, 0x7D79, 0x8CA7, 0x770C, 0x8CA8, 0x80A9, + 0x8CA9, 0x898B, 0x8CAA, 0x8B19, 0x8CAB, 0x8CE2, 0x8CAC, 0x8ED2, + 0x8CAD, 0x9063, 0x8CAE, 0x9375, 0x8CAF, 0x967A, 0x8CB0, 0x9855, + 0x8CB1, 0x9A13, 0x8CB2, 0x9E78, 0x8CB3, 0x5143, 0x8CB4, 0x539F, + 0x8CB5, 0x53B3, 0x8CB6, 0x5E7B, 0x8CB7, 0x5F26, 0x8CB8, 0x6E1B, + 0x8CB9, 0x6E90, 0x8CBA, 0x7384, 0x8CBB, 0x73FE, 0x8CBC, 0x7D43, + 0x8CBD, 0x8237, 0x8CBE, 0x8A00, 0x8CBF, 0x8AFA, 0x8CC0, 0x9650, + 0x8CC1, 0x4E4E, 0x8CC2, 0x500B, 0x8CC3, 0x53E4, 0x8CC4, 0x547C, + 0x8CC5, 0x56FA, 0x8CC6, 0x59D1, 0x8CC7, 0x5B64, 0x8CC8, 0x5DF1, + 0x8CC9, 0x5EAB, 0x8CCA, 0x5F27, 0x8CCB, 0x6238, 0x8CCC, 0x6545, + 0x8CCD, 0x67AF, 0x8CCE, 0x6E56, 0x8CCF, 0x72D0, 0x8CD0, 0x7CCA, + 0x8CD1, 0x88B4, 0x8CD2, 0x80A1, 0x8CD3, 0x80E1, 0x8CD4, 0x83F0, + 0x8CD5, 0x864E, 0x8CD6, 0x8A87, 0x8CD7, 0x8DE8, 0x8CD8, 0x9237, + 0x8CD9, 0x96C7, 0x8CDA, 0x9867, 0x8CDB, 0x9F13, 0x8CDC, 0x4E94, + 0x8CDD, 0x4E92, 0x8CDE, 0x4F0D, 0x8CDF, 0x5348, 0x8CE0, 0x5449, + 0x8CE1, 0x543E, 0x8CE2, 0x5A2F, 0x8CE3, 0x5F8C, 0x8CE4, 0x5FA1, + 0x8CE5, 0x609F, 0x8CE6, 0x68A7, 0x8CE7, 0x6A8E, 0x8CE8, 0x745A, + 0x8CE9, 0x7881, 0x8CEA, 0x8A9E, 0x8CEB, 0x8AA4, 0x8CEC, 0x8B77, + 0x8CED, 0x9190, 0x8CEE, 0x4E5E, 0x8CEF, 0x9BC9, 0x8CF0, 0x4EA4, + 0x8CF1, 0x4F7C, 0x8CF2, 0x4FAF, 0x8CF3, 0x5019, 0x8CF4, 0x5016, + 0x8CF5, 0x5149, 0x8CF6, 0x516C, 0x8CF7, 0x529F, 0x8CF8, 0x52B9, + 0x8CF9, 0x52FE, 0x8CFA, 0x539A, 0x8CFB, 0x53E3, 0x8CFC, 0x5411, + 0x8D40, 0x540E, 0x8D41, 0x5589, 0x8D42, 0x5751, 0x8D43, 0x57A2, + 0x8D44, 0x597D, 0x8D45, 0x5B54, 0x8D46, 0x5B5D, 0x8D47, 0x5B8F, + 0x8D48, 0x5DE5, 0x8D49, 0x5DE7, 0x8D4A, 0x5DF7, 0x8D4B, 0x5E78, + 0x8D4C, 0x5E83, 0x8D4D, 0x5E9A, 0x8D4E, 0x5EB7, 0x8D4F, 0x5F18, + 0x8D50, 0x6052, 0x8D51, 0x614C, 0x8D52, 0x6297, 0x8D53, 0x62D8, + 0x8D54, 0x63A7, 0x8D55, 0x653B, 0x8D56, 0x6602, 0x8D57, 0x6643, + 0x8D58, 0x66F4, 0x8D59, 0x676D, 0x8D5A, 0x6821, 0x8D5B, 0x6897, + 0x8D5C, 0x69CB, 0x8D5D, 0x6C5F, 0x8D5E, 0x6D2A, 0x8D5F, 0x6D69, + 0x8D60, 0x6E2F, 0x8D61, 0x6E9D, 0x8D62, 0x7532, 0x8D63, 0x7687, + 0x8D64, 0x786C, 0x8D65, 0x7A3F, 0x8D66, 0x7CE0, 0x8D67, 0x7D05, + 0x8D68, 0x7D18, 0x8D69, 0x7D5E, 0x8D6A, 0x7DB1, 0x8D6B, 0x8015, + 0x8D6C, 0x8003, 0x8D6D, 0x80AF, 0x8D6E, 0x80B1, 0x8D6F, 0x8154, + 0x8D70, 0x818F, 0x8D71, 0x822A, 0x8D72, 0x8352, 0x8D73, 0x884C, + 0x8D74, 0x8861, 0x8D75, 0x8B1B, 0x8D76, 0x8CA2, 0x8D77, 0x8CFC, + 0x8D78, 0x90CA, 0x8D79, 0x9175, 0x8D7A, 0x9271, 0x8D7B, 0x783F, + 0x8D7C, 0x92FC, 0x8D7D, 0x95A4, 0x8D7E, 0x964D, 0x8D80, 0x9805, + 0x8D81, 0x9999, 0x8D82, 0x9AD8, 0x8D83, 0x9D3B, 0x8D84, 0x525B, + 0x8D85, 0x52AB, 0x8D86, 0x53F7, 0x8D87, 0x5408, 0x8D88, 0x58D5, + 0x8D89, 0x62F7, 0x8D8A, 0x6FE0, 0x8D8B, 0x8C6A, 0x8D8C, 0x8F5F, + 0x8D8D, 0x9EB9, 0x8D8E, 0x514B, 0x8D8F, 0x523B, 0x8D90, 0x544A, + 0x8D91, 0x56FD, 0x8D92, 0x7A40, 0x8D93, 0x9177, 0x8D94, 0x9D60, + 0x8D95, 0x9ED2, 0x8D96, 0x7344, 0x8D97, 0x6F09, 0x8D98, 0x8170, + 0x8D99, 0x7511, 0x8D9A, 0x5FFD, 0x8D9B, 0x60DA, 0x8D9C, 0x9AA8, + 0x8D9D, 0x72DB, 0x8D9E, 0x8FBC, 0x8D9F, 0x6B64, 0x8DA0, 0x9803, + 0x8DA1, 0x4ECA, 0x8DA2, 0x56F0, 0x8DA3, 0x5764, 0x8DA4, 0x58BE, + 0x8DA5, 0x5A5A, 0x8DA6, 0x6068, 0x8DA7, 0x61C7, 0x8DA8, 0x660F, + 0x8DA9, 0x6606, 0x8DAA, 0x6839, 0x8DAB, 0x68B1, 0x8DAC, 0x6DF7, + 0x8DAD, 0x75D5, 0x8DAE, 0x7D3A, 0x8DAF, 0x826E, 0x8DB0, 0x9B42, + 0x8DB1, 0x4E9B, 0x8DB2, 0x4F50, 0x8DB3, 0x53C9, 0x8DB4, 0x5506, + 0x8DB5, 0x5D6F, 0x8DB6, 0x5DE6, 0x8DB7, 0x5DEE, 0x8DB8, 0x67FB, + 0x8DB9, 0x6C99, 0x8DBA, 0x7473, 0x8DBB, 0x7802, 0x8DBC, 0x8A50, + 0x8DBD, 0x9396, 0x8DBE, 0x88DF, 0x8DBF, 0x5750, 0x8DC0, 0x5EA7, + 0x8DC1, 0x632B, 0x8DC2, 0x50B5, 0x8DC3, 0x50AC, 0x8DC4, 0x518D, + 0x8DC5, 0x6700, 0x8DC6, 0x54C9, 0x8DC7, 0x585E, 0x8DC8, 0x59BB, + 0x8DC9, 0x5BB0, 0x8DCA, 0x5F69, 0x8DCB, 0x624D, 0x8DCC, 0x63A1, + 0x8DCD, 0x683D, 0x8DCE, 0x6B73, 0x8DCF, 0x6E08, 0x8DD0, 0x707D, + 0x8DD1, 0x91C7, 0x8DD2, 0x7280, 0x8DD3, 0x7815, 0x8DD4, 0x7826, + 0x8DD5, 0x796D, 0x8DD6, 0x658E, 0x8DD7, 0x7D30, 0x8DD8, 0x83DC, + 0x8DD9, 0x88C1, 0x8DDA, 0x8F09, 0x8DDB, 0x969B, 0x8DDC, 0x5264, + 0x8DDD, 0x5728, 0x8DDE, 0x6750, 0x8DDF, 0x7F6A, 0x8DE0, 0x8CA1, + 0x8DE1, 0x51B4, 0x8DE2, 0x5742, 0x8DE3, 0x962A, 0x8DE4, 0x583A, + 0x8DE5, 0x698A, 0x8DE6, 0x80B4, 0x8DE7, 0x54B2, 0x8DE8, 0x5D0E, + 0x8DE9, 0x57FC, 0x8DEA, 0x7895, 0x8DEB, 0x9DFA, 0x8DEC, 0x4F5C, + 0x8DED, 0x524A, 0x8DEE, 0x548B, 0x8DEF, 0x643E, 0x8DF0, 0x6628, + 0x8DF1, 0x6714, 0x8DF2, 0x67F5, 0x8DF3, 0x7A84, 0x8DF4, 0x7B56, + 0x8DF5, 0x7D22, 0x8DF6, 0x932F, 0x8DF7, 0x685C, 0x8DF8, 0x9BAD, + 0x8DF9, 0x7B39, 0x8DFA, 0x5319, 0x8DFB, 0x518A, 0x8DFC, 0x5237, + 0x8E40, 0x5BDF, 0x8E41, 0x62F6, 0x8E42, 0x64AE, 0x8E43, 0x64E6, + 0x8E44, 0x672D, 0x8E45, 0x6BBA, 0x8E46, 0x85A9, 0x8E47, 0x96D1, + 0x8E48, 0x7690, 0x8E49, 0x9BD6, 0x8E4A, 0x634C, 0x8E4B, 0x9306, + 0x8E4C, 0x9BAB, 0x8E4D, 0x76BF, 0x8E4E, 0x6652, 0x8E4F, 0x4E09, + 0x8E50, 0x5098, 0x8E51, 0x53C2, 0x8E52, 0x5C71, 0x8E53, 0x60E8, + 0x8E54, 0x6492, 0x8E55, 0x6563, 0x8E56, 0x685F, 0x8E57, 0x71E6, + 0x8E58, 0x73CA, 0x8E59, 0x7523, 0x8E5A, 0x7B97, 0x8E5B, 0x7E82, + 0x8E5C, 0x8695, 0x8E5D, 0x8B83, 0x8E5E, 0x8CDB, 0x8E5F, 0x9178, + 0x8E60, 0x9910, 0x8E61, 0x65AC, 0x8E62, 0x66AB, 0x8E63, 0x6B8B, + 0x8E64, 0x4ED5, 0x8E65, 0x4ED4, 0x8E66, 0x4F3A, 0x8E67, 0x4F7F, + 0x8E68, 0x523A, 0x8E69, 0x53F8, 0x8E6A, 0x53F2, 0x8E6B, 0x55E3, + 0x8E6C, 0x56DB, 0x8E6D, 0x58EB, 0x8E6E, 0x59CB, 0x8E6F, 0x59C9, + 0x8E70, 0x59FF, 0x8E71, 0x5B50, 0x8E72, 0x5C4D, 0x8E73, 0x5E02, + 0x8E74, 0x5E2B, 0x8E75, 0x5FD7, 0x8E76, 0x601D, 0x8E77, 0x6307, + 0x8E78, 0x652F, 0x8E79, 0x5B5C, 0x8E7A, 0x65AF, 0x8E7B, 0x65BD, + 0x8E7C, 0x65E8, 0x8E7D, 0x679D, 0x8E7E, 0x6B62, 0x8E80, 0x6B7B, + 0x8E81, 0x6C0F, 0x8E82, 0x7345, 0x8E83, 0x7949, 0x8E84, 0x79C1, + 0x8E85, 0x7CF8, 0x8E86, 0x7D19, 0x8E87, 0x7D2B, 0x8E88, 0x80A2, + 0x8E89, 0x8102, 0x8E8A, 0x81F3, 0x8E8B, 0x8996, 0x8E8C, 0x8A5E, + 0x8E8D, 0x8A69, 0x8E8E, 0x8A66, 0x8E8F, 0x8A8C, 0x8E90, 0x8AEE, + 0x8E91, 0x8CC7, 0x8E92, 0x8CDC, 0x8E93, 0x96CC, 0x8E94, 0x98FC, + 0x8E95, 0x6B6F, 0x8E96, 0x4E8B, 0x8E97, 0x4F3C, 0x8E98, 0x4F8D, + 0x8E99, 0x5150, 0x8E9A, 0x5B57, 0x8E9B, 0x5BFA, 0x8E9C, 0x6148, + 0x8E9D, 0x6301, 0x8E9E, 0x6642, 0x8E9F, 0x6B21, 0x8EA0, 0x6ECB, + 0x8EA1, 0x6CBB, 0x8EA2, 0x723E, 0x8EA3, 0x74BD, 0x8EA4, 0x75D4, + 0x8EA5, 0x78C1, 0x8EA6, 0x793A, 0x8EA7, 0x800C, 0x8EA8, 0x8033, + 0x8EA9, 0x81EA, 0x8EAA, 0x8494, 0x8EAB, 0x8F9E, 0x8EAC, 0x6C50, + 0x8EAD, 0x9E7F, 0x8EAE, 0x5F0F, 0x8EAF, 0x8B58, 0x8EB0, 0x9D2B, + 0x8EB1, 0x7AFA, 0x8EB2, 0x8EF8, 0x8EB3, 0x5B8D, 0x8EB4, 0x96EB, + 0x8EB5, 0x4E03, 0x8EB6, 0x53F1, 0x8EB7, 0x57F7, 0x8EB8, 0x5931, + 0x8EB9, 0x5AC9, 0x8EBA, 0x5BA4, 0x8EBB, 0x6089, 0x8EBC, 0x6E7F, + 0x8EBD, 0x6F06, 0x8EBE, 0x75BE, 0x8EBF, 0x8CEA, 0x8EC0, 0x5B9F, + 0x8EC1, 0x8500, 0x8EC2, 0x7BE0, 0x8EC3, 0x5072, 0x8EC4, 0x67F4, + 0x8EC5, 0x829D, 0x8EC6, 0x5C61, 0x8EC7, 0x854A, 0x8EC8, 0x7E1E, + 0x8EC9, 0x820E, 0x8ECA, 0x5199, 0x8ECB, 0x5C04, 0x8ECC, 0x6368, + 0x8ECD, 0x8D66, 0x8ECE, 0x659C, 0x8ECF, 0x716E, 0x8ED0, 0x793E, + 0x8ED1, 0x7D17, 0x8ED2, 0x8005, 0x8ED3, 0x8B1D, 0x8ED4, 0x8ECA, + 0x8ED5, 0x906E, 0x8ED6, 0x86C7, 0x8ED7, 0x90AA, 0x8ED8, 0x501F, + 0x8ED9, 0x52FA, 0x8EDA, 0x5C3A, 0x8EDB, 0x6753, 0x8EDC, 0x707C, + 0x8EDD, 0x7235, 0x8EDE, 0x914C, 0x8EDF, 0x91C8, 0x8EE0, 0x932B, + 0x8EE1, 0x82E5, 0x8EE2, 0x5BC2, 0x8EE3, 0x5F31, 0x8EE4, 0x60F9, + 0x8EE5, 0x4E3B, 0x8EE6, 0x53D6, 0x8EE7, 0x5B88, 0x8EE8, 0x624B, + 0x8EE9, 0x6731, 0x8EEA, 0x6B8A, 0x8EEB, 0x72E9, 0x8EEC, 0x73E0, + 0x8EED, 0x7A2E, 0x8EEE, 0x816B, 0x8EEF, 0x8DA3, 0x8EF0, 0x9152, + 0x8EF1, 0x9996, 0x8EF2, 0x5112, 0x8EF3, 0x53D7, 0x8EF4, 0x546A, + 0x8EF5, 0x5BFF, 0x8EF6, 0x6388, 0x8EF7, 0x6A39, 0x8EF8, 0x7DAC, + 0x8EF9, 0x9700, 0x8EFA, 0x56DA, 0x8EFB, 0x53CE, 0x8EFC, 0x5468, + 0x8F40, 0x5B97, 0x8F41, 0x5C31, 0x8F42, 0x5DDE, 0x8F43, 0x4FEE, + 0x8F44, 0x6101, 0x8F45, 0x62FE, 0x8F46, 0x6D32, 0x8F47, 0x79C0, + 0x8F48, 0x79CB, 0x8F49, 0x7D42, 0x8F4A, 0x7E4D, 0x8F4B, 0x7FD2, + 0x8F4C, 0x81ED, 0x8F4D, 0x821F, 0x8F4E, 0x8490, 0x8F4F, 0x8846, + 0x8F50, 0x8972, 0x8F51, 0x8B90, 0x8F52, 0x8E74, 0x8F53, 0x8F2F, + 0x8F54, 0x9031, 0x8F55, 0x914B, 0x8F56, 0x916C, 0x8F57, 0x96C6, + 0x8F58, 0x919C, 0x8F59, 0x4EC0, 0x8F5A, 0x4F4F, 0x8F5B, 0x5145, + 0x8F5C, 0x5341, 0x8F5D, 0x5F93, 0x8F5E, 0x620E, 0x8F5F, 0x67D4, + 0x8F60, 0x6C41, 0x8F61, 0x6E0B, 0x8F62, 0x7363, 0x8F63, 0x7E26, + 0x8F64, 0x91CD, 0x8F65, 0x9283, 0x8F66, 0x53D4, 0x8F67, 0x5919, + 0x8F68, 0x5BBF, 0x8F69, 0x6DD1, 0x8F6A, 0x795D, 0x8F6B, 0x7E2E, + 0x8F6C, 0x7C9B, 0x8F6D, 0x587E, 0x8F6E, 0x719F, 0x8F6F, 0x51FA, + 0x8F70, 0x8853, 0x8F71, 0x8FF0, 0x8F72, 0x4FCA, 0x8F73, 0x5CFB, + 0x8F74, 0x6625, 0x8F75, 0x77AC, 0x8F76, 0x7AE3, 0x8F77, 0x821C, + 0x8F78, 0x99FF, 0x8F79, 0x51C6, 0x8F7A, 0x5FAA, 0x8F7B, 0x65EC, + 0x8F7C, 0x696F, 0x8F7D, 0x6B89, 0x8F7E, 0x6DF3, 0x8F80, 0x6E96, + 0x8F81, 0x6F64, 0x8F82, 0x76FE, 0x8F83, 0x7D14, 0x8F84, 0x5DE1, + 0x8F85, 0x9075, 0x8F86, 0x9187, 0x8F87, 0x9806, 0x8F88, 0x51E6, + 0x8F89, 0x521D, 0x8F8A, 0x6240, 0x8F8B, 0x6691, 0x8F8C, 0x66D9, + 0x8F8D, 0x6E1A, 0x8F8E, 0x5EB6, 0x8F8F, 0x7DD2, 0x8F90, 0x7F72, + 0x8F91, 0x66F8, 0x8F92, 0x85AF, 0x8F93, 0x85F7, 0x8F94, 0x8AF8, + 0x8F95, 0x52A9, 0x8F96, 0x53D9, 0x8F97, 0x5973, 0x8F98, 0x5E8F, + 0x8F99, 0x5F90, 0x8F9A, 0x6055, 0x8F9B, 0x92E4, 0x8F9C, 0x9664, + 0x8F9D, 0x50B7, 0x8F9E, 0x511F, 0x8F9F, 0x52DD, 0x8FA0, 0x5320, + 0x8FA1, 0x5347, 0x8FA2, 0x53EC, 0x8FA3, 0x54E8, 0x8FA4, 0x5546, + 0x8FA5, 0x5531, 0x8FA6, 0x5617, 0x8FA7, 0x5968, 0x8FA8, 0x59BE, + 0x8FA9, 0x5A3C, 0x8FAA, 0x5BB5, 0x8FAB, 0x5C06, 0x8FAC, 0x5C0F, + 0x8FAD, 0x5C11, 0x8FAE, 0x5C1A, 0x8FAF, 0x5E84, 0x8FB0, 0x5E8A, + 0x8FB1, 0x5EE0, 0x8FB2, 0x5F70, 0x8FB3, 0x627F, 0x8FB4, 0x6284, + 0x8FB5, 0x62DB, 0x8FB6, 0x638C, 0x8FB7, 0x6377, 0x8FB8, 0x6607, + 0x8FB9, 0x660C, 0x8FBA, 0x662D, 0x8FBB, 0x6676, 0x8FBC, 0x677E, + 0x8FBD, 0x68A2, 0x8FBE, 0x6A1F, 0x8FBF, 0x6A35, 0x8FC0, 0x6CBC, + 0x8FC1, 0x6D88, 0x8FC2, 0x6E09, 0x8FC3, 0x6E58, 0x8FC4, 0x713C, + 0x8FC5, 0x7126, 0x8FC6, 0x7167, 0x8FC7, 0x75C7, 0x8FC8, 0x7701, + 0x8FC9, 0x785D, 0x8FCA, 0x7901, 0x8FCB, 0x7965, 0x8FCC, 0x79F0, + 0x8FCD, 0x7AE0, 0x8FCE, 0x7B11, 0x8FCF, 0x7CA7, 0x8FD0, 0x7D39, + 0x8FD1, 0x8096, 0x8FD2, 0x83D6, 0x8FD3, 0x848B, 0x8FD4, 0x8549, + 0x8FD5, 0x885D, 0x8FD6, 0x88F3, 0x8FD7, 0x8A1F, 0x8FD8, 0x8A3C, + 0x8FD9, 0x8A54, 0x8FDA, 0x8A73, 0x8FDB, 0x8C61, 0x8FDC, 0x8CDE, + 0x8FDD, 0x91A4, 0x8FDE, 0x9266, 0x8FDF, 0x937E, 0x8FE0, 0x9418, + 0x8FE1, 0x969C, 0x8FE2, 0x9798, 0x8FE3, 0x4E0A, 0x8FE4, 0x4E08, + 0x8FE5, 0x4E1E, 0x8FE6, 0x4E57, 0x8FE7, 0x5197, 0x8FE8, 0x5270, + 0x8FE9, 0x57CE, 0x8FEA, 0x5834, 0x8FEB, 0x58CC, 0x8FEC, 0x5B22, + 0x8FED, 0x5E38, 0x8FEE, 0x60C5, 0x8FEF, 0x64FE, 0x8FF0, 0x6761, + 0x8FF1, 0x6756, 0x8FF2, 0x6D44, 0x8FF3, 0x72B6, 0x8FF4, 0x7573, + 0x8FF5, 0x7A63, 0x8FF6, 0x84B8, 0x8FF7, 0x8B72, 0x8FF8, 0x91B8, + 0x8FF9, 0x9320, 0x8FFA, 0x5631, 0x8FFB, 0x57F4, 0x8FFC, 0x98FE, + 0x9040, 0x62ED, 0x9041, 0x690D, 0x9042, 0x6B96, 0x9043, 0x71ED, + 0x9044, 0x7E54, 0x9045, 0x8077, 0x9046, 0x8272, 0x9047, 0x89E6, + 0x9048, 0x98DF, 0x9049, 0x8755, 0x904A, 0x8FB1, 0x904B, 0x5C3B, + 0x904C, 0x4F38, 0x904D, 0x4FE1, 0x904E, 0x4FB5, 0x904F, 0x5507, + 0x9050, 0x5A20, 0x9051, 0x5BDD, 0x9052, 0x5BE9, 0x9053, 0x5FC3, + 0x9054, 0x614E, 0x9055, 0x632F, 0x9056, 0x65B0, 0x9057, 0x664B, + 0x9058, 0x68EE, 0x9059, 0x699B, 0x905A, 0x6D78, 0x905B, 0x6DF1, + 0x905C, 0x7533, 0x905D, 0x75B9, 0x905E, 0x771F, 0x905F, 0x795E, + 0x9060, 0x79E6, 0x9061, 0x7D33, 0x9062, 0x81E3, 0x9063, 0x82AF, + 0x9064, 0x85AA, 0x9065, 0x89AA, 0x9066, 0x8A3A, 0x9067, 0x8EAB, + 0x9068, 0x8F9B, 0x9069, 0x9032, 0x906A, 0x91DD, 0x906B, 0x9707, + 0x906C, 0x4EBA, 0x906D, 0x4EC1, 0x906E, 0x5203, 0x906F, 0x5875, + 0x9070, 0x58EC, 0x9071, 0x5C0B, 0x9072, 0x751A, 0x9073, 0x5C3D, + 0x9074, 0x814E, 0x9075, 0x8A0A, 0x9076, 0x8FC5, 0x9077, 0x9663, + 0x9078, 0x976D, 0x9079, 0x7B25, 0x907A, 0x8ACF, 0x907B, 0x9808, + 0x907C, 0x9162, 0x907D, 0x56F3, 0x907E, 0x53A8, 0x9080, 0x9017, + 0x9081, 0x5439, 0x9082, 0x5782, 0x9083, 0x5E25, 0x9084, 0x63A8, + 0x9085, 0x6C34, 0x9086, 0x708A, 0x9087, 0x7761, 0x9088, 0x7C8B, + 0x9089, 0x7FE0, 0x908A, 0x8870, 0x908B, 0x9042, 0x908C, 0x9154, + 0x908D, 0x9310, 0x908E, 0x9318, 0x908F, 0x968F, 0x9090, 0x745E, + 0x9091, 0x9AC4, 0x9092, 0x5D07, 0x9093, 0x5D69, 0x9094, 0x6570, + 0x9095, 0x67A2, 0x9096, 0x8DA8, 0x9097, 0x96DB, 0x9098, 0x636E, + 0x9099, 0x6749, 0x909A, 0x6919, 0x909B, 0x83C5, 0x909C, 0x9817, + 0x909D, 0x96C0, 0x909E, 0x88FE, 0x909F, 0x6F84, 0x90A0, 0x647A, + 0x90A1, 0x5BF8, 0x90A2, 0x4E16, 0x90A3, 0x702C, 0x90A4, 0x755D, + 0x90A5, 0x662F, 0x90A6, 0x51C4, 0x90A7, 0x5236, 0x90A8, 0x52E2, + 0x90A9, 0x59D3, 0x90AA, 0x5F81, 0x90AB, 0x6027, 0x90AC, 0x6210, + 0x90AD, 0x653F, 0x90AE, 0x6574, 0x90AF, 0x661F, 0x90B0, 0x6674, + 0x90B1, 0x68F2, 0x90B2, 0x6816, 0x90B3, 0x6B63, 0x90B4, 0x6E05, + 0x90B5, 0x7272, 0x90B6, 0x751F, 0x90B7, 0x76DB, 0x90B8, 0x7CBE, + 0x90B9, 0x8056, 0x90BA, 0x58F0, 0x90BB, 0x88FD, 0x90BC, 0x897F, + 0x90BD, 0x8AA0, 0x90BE, 0x8A93, 0x90BF, 0x8ACB, 0x90C0, 0x901D, + 0x90C1, 0x9192, 0x90C2, 0x9752, 0x90C3, 0x9759, 0x90C4, 0x6589, + 0x90C5, 0x7A0E, 0x90C6, 0x8106, 0x90C7, 0x96BB, 0x90C8, 0x5E2D, + 0x90C9, 0x60DC, 0x90CA, 0x621A, 0x90CB, 0x65A5, 0x90CC, 0x6614, + 0x90CD, 0x6790, 0x90CE, 0x77F3, 0x90CF, 0x7A4D, 0x90D0, 0x7C4D, + 0x90D1, 0x7E3E, 0x90D2, 0x810A, 0x90D3, 0x8CAC, 0x90D4, 0x8D64, + 0x90D5, 0x8DE1, 0x90D6, 0x8E5F, 0x90D7, 0x78A9, 0x90D8, 0x5207, + 0x90D9, 0x62D9, 0x90DA, 0x63A5, 0x90DB, 0x6442, 0x90DC, 0x6298, + 0x90DD, 0x8A2D, 0x90DE, 0x7A83, 0x90DF, 0x7BC0, 0x90E0, 0x8AAC, + 0x90E1, 0x96EA, 0x90E2, 0x7D76, 0x90E3, 0x820C, 0x90E4, 0x8749, + 0x90E5, 0x4ED9, 0x90E6, 0x5148, 0x90E7, 0x5343, 0x90E8, 0x5360, + 0x90E9, 0x5BA3, 0x90EA, 0x5C02, 0x90EB, 0x5C16, 0x90EC, 0x5DDD, + 0x90ED, 0x6226, 0x90EE, 0x6247, 0x90EF, 0x64B0, 0x90F0, 0x6813, + 0x90F1, 0x6834, 0x90F2, 0x6CC9, 0x90F3, 0x6D45, 0x90F4, 0x6D17, + 0x90F5, 0x67D3, 0x90F6, 0x6F5C, 0x90F7, 0x714E, 0x90F8, 0x717D, + 0x90F9, 0x65CB, 0x90FA, 0x7A7F, 0x90FB, 0x7BAD, 0x90FC, 0x7DDA, + 0x9140, 0x7E4A, 0x9141, 0x7FA8, 0x9142, 0x817A, 0x9143, 0x821B, + 0x9144, 0x8239, 0x9145, 0x85A6, 0x9146, 0x8A6E, 0x9147, 0x8CCE, + 0x9148, 0x8DF5, 0x9149, 0x9078, 0x914A, 0x9077, 0x914B, 0x92AD, + 0x914C, 0x9291, 0x914D, 0x9583, 0x914E, 0x9BAE, 0x914F, 0x524D, + 0x9150, 0x5584, 0x9151, 0x6F38, 0x9152, 0x7136, 0x9153, 0x5168, + 0x9154, 0x7985, 0x9155, 0x7E55, 0x9156, 0x81B3, 0x9157, 0x7CCE, + 0x9158, 0x564C, 0x9159, 0x5851, 0x915A, 0x5CA8, 0x915B, 0x63AA, + 0x915C, 0x66FE, 0x915D, 0x66FD, 0x915E, 0x695A, 0x915F, 0x72D9, + 0x9160, 0x758F, 0x9161, 0x758E, 0x9162, 0x790E, 0x9163, 0x7956, + 0x9164, 0x79DF, 0x9165, 0x7C97, 0x9166, 0x7D20, 0x9167, 0x7D44, + 0x9168, 0x8607, 0x9169, 0x8A34, 0x916A, 0x963B, 0x916B, 0x9061, + 0x916C, 0x9F20, 0x916D, 0x50E7, 0x916E, 0x5275, 0x916F, 0x53CC, + 0x9170, 0x53E2, 0x9171, 0x5009, 0x9172, 0x55AA, 0x9173, 0x58EE, + 0x9174, 0x594F, 0x9175, 0x723D, 0x9176, 0x5B8B, 0x9177, 0x5C64, + 0x9178, 0x531D, 0x9179, 0x60E3, 0x917A, 0x60F3, 0x917B, 0x635C, + 0x917C, 0x6383, 0x917D, 0x633F, 0x917E, 0x63BB, 0x9180, 0x64CD, + 0x9181, 0x65E9, 0x9182, 0x66F9, 0x9183, 0x5DE3, 0x9184, 0x69CD, + 0x9185, 0x69FD, 0x9186, 0x6F15, 0x9187, 0x71E5, 0x9188, 0x4E89, + 0x9189, 0x75E9, 0x918A, 0x76F8, 0x918B, 0x7A93, 0x918C, 0x7CDF, + 0x918D, 0x7DCF, 0x918E, 0x7D9C, 0x918F, 0x8061, 0x9190, 0x8349, + 0x9191, 0x8358, 0x9192, 0x846C, 0x9193, 0x84BC, 0x9194, 0x85FB, + 0x9195, 0x88C5, 0x9196, 0x8D70, 0x9197, 0x9001, 0x9198, 0x906D, + 0x9199, 0x9397, 0x919A, 0x971C, 0x919B, 0x9A12, 0x919C, 0x50CF, + 0x919D, 0x5897, 0x919E, 0x618E, 0x919F, 0x81D3, 0x91A0, 0x8535, + 0x91A1, 0x8D08, 0x91A2, 0x9020, 0x91A3, 0x4FC3, 0x91A4, 0x5074, + 0x91A5, 0x5247, 0x91A6, 0x5373, 0x91A7, 0x606F, 0x91A8, 0x6349, + 0x91A9, 0x675F, 0x91AA, 0x6E2C, 0x91AB, 0x8DB3, 0x91AC, 0x901F, + 0x91AD, 0x4FD7, 0x91AE, 0x5C5E, 0x91AF, 0x8CCA, 0x91B0, 0x65CF, + 0x91B1, 0x7D9A, 0x91B2, 0x5352, 0x91B3, 0x8896, 0x91B4, 0x5176, + 0x91B5, 0x63C3, 0x91B6, 0x5B58, 0x91B7, 0x5B6B, 0x91B8, 0x5C0A, + 0x91B9, 0x640D, 0x91BA, 0x6751, 0x91BB, 0x905C, 0x91BC, 0x4ED6, + 0x91BD, 0x591A, 0x91BE, 0x592A, 0x91BF, 0x6C70, 0x91C0, 0x8A51, + 0x91C1, 0x553E, 0x91C2, 0x5815, 0x91C3, 0x59A5, 0x91C4, 0x60F0, + 0x91C5, 0x6253, 0x91C6, 0x67C1, 0x91C7, 0x8235, 0x91C8, 0x6955, + 0x91C9, 0x9640, 0x91CA, 0x99C4, 0x91CB, 0x9A28, 0x91CC, 0x4F53, + 0x91CD, 0x5806, 0x91CE, 0x5BFE, 0x91CF, 0x8010, 0x91D0, 0x5CB1, + 0x91D1, 0x5E2F, 0x91D2, 0x5F85, 0x91D3, 0x6020, 0x91D4, 0x614B, + 0x91D5, 0x6234, 0x91D6, 0x66FF, 0x91D7, 0x6CF0, 0x91D8, 0x6EDE, + 0x91D9, 0x80CE, 0x91DA, 0x817F, 0x91DB, 0x82D4, 0x91DC, 0x888B, + 0x91DD, 0x8CB8, 0x91DE, 0x9000, 0x91DF, 0x902E, 0x91E0, 0x968A, + 0x91E1, 0x9EDB, 0x91E2, 0x9BDB, 0x91E3, 0x4EE3, 0x91E4, 0x53F0, + 0x91E5, 0x5927, 0x91E6, 0x7B2C, 0x91E7, 0x918D, 0x91E8, 0x984C, + 0x91E9, 0x9DF9, 0x91EA, 0x6EDD, 0x91EB, 0x7027, 0x91EC, 0x5353, + 0x91ED, 0x5544, 0x91EE, 0x5B85, 0x91EF, 0x6258, 0x91F0, 0x629E, + 0x91F1, 0x62D3, 0x91F2, 0x6CA2, 0x91F3, 0x6FEF, 0x91F4, 0x7422, + 0x91F5, 0x8A17, 0x91F6, 0x9438, 0x91F7, 0x6FC1, 0x91F8, 0x8AFE, + 0x91F9, 0x8338, 0x91FA, 0x51E7, 0x91FB, 0x86F8, 0x91FC, 0x53EA, + 0x9240, 0x53E9, 0x9241, 0x4F46, 0x9242, 0x9054, 0x9243, 0x8FB0, + 0x9244, 0x596A, 0x9245, 0x8131, 0x9246, 0x5DFD, 0x9247, 0x7AEA, + 0x9248, 0x8FBF, 0x9249, 0x68DA, 0x924A, 0x8C37, 0x924B, 0x72F8, + 0x924C, 0x9C48, 0x924D, 0x6A3D, 0x924E, 0x8AB0, 0x924F, 0x4E39, + 0x9250, 0x5358, 0x9251, 0x5606, 0x9252, 0x5766, 0x9253, 0x62C5, + 0x9254, 0x63A2, 0x9255, 0x65E6, 0x9256, 0x6B4E, 0x9257, 0x6DE1, + 0x9258, 0x6E5B, 0x9259, 0x70AD, 0x925A, 0x77ED, 0x925B, 0x7AEF, + 0x925C, 0x7BAA, 0x925D, 0x7DBB, 0x925E, 0x803D, 0x925F, 0x80C6, + 0x9260, 0x86CB, 0x9261, 0x8A95, 0x9262, 0x935B, 0x9263, 0x56E3, + 0x9264, 0x58C7, 0x9265, 0x5F3E, 0x9266, 0x65AD, 0x9267, 0x6696, + 0x9268, 0x6A80, 0x9269, 0x6BB5, 0x926A, 0x7537, 0x926B, 0x8AC7, + 0x926C, 0x5024, 0x926D, 0x77E5, 0x926E, 0x5730, 0x926F, 0x5F1B, + 0x9270, 0x6065, 0x9271, 0x667A, 0x9272, 0x6C60, 0x9273, 0x75F4, + 0x9274, 0x7A1A, 0x9275, 0x7F6E, 0x9276, 0x81F4, 0x9277, 0x8718, + 0x9278, 0x9045, 0x9279, 0x99B3, 0x927A, 0x7BC9, 0x927B, 0x755C, + 0x927C, 0x7AF9, 0x927D, 0x7B51, 0x927E, 0x84C4, 0x9280, 0x9010, + 0x9281, 0x79E9, 0x9282, 0x7A92, 0x9283, 0x8336, 0x9284, 0x5AE1, + 0x9285, 0x7740, 0x9286, 0x4E2D, 0x9287, 0x4EF2, 0x9288, 0x5B99, + 0x9289, 0x5FE0, 0x928A, 0x62BD, 0x928B, 0x663C, 0x928C, 0x67F1, + 0x928D, 0x6CE8, 0x928E, 0x866B, 0x928F, 0x8877, 0x9290, 0x8A3B, + 0x9291, 0x914E, 0x9292, 0x92F3, 0x9293, 0x99D0, 0x9294, 0x6A17, + 0x9295, 0x7026, 0x9296, 0x732A, 0x9297, 0x82E7, 0x9298, 0x8457, + 0x9299, 0x8CAF, 0x929A, 0x4E01, 0x929B, 0x5146, 0x929C, 0x51CB, + 0x929D, 0x558B, 0x929E, 0x5BF5, 0x929F, 0x5E16, 0x92A0, 0x5E33, + 0x92A1, 0x5E81, 0x92A2, 0x5F14, 0x92A3, 0x5F35, 0x92A4, 0x5F6B, + 0x92A5, 0x5FB4, 0x92A6, 0x61F2, 0x92A7, 0x6311, 0x92A8, 0x66A2, + 0x92A9, 0x671D, 0x92AA, 0x6F6E, 0x92AB, 0x7252, 0x92AC, 0x753A, + 0x92AD, 0x773A, 0x92AE, 0x8074, 0x92AF, 0x8139, 0x92B0, 0x8178, + 0x92B1, 0x8776, 0x92B2, 0x8ABF, 0x92B3, 0x8ADC, 0x92B4, 0x8D85, + 0x92B5, 0x8DF3, 0x92B6, 0x929A, 0x92B7, 0x9577, 0x92B8, 0x9802, + 0x92B9, 0x9CE5, 0x92BA, 0x52C5, 0x92BB, 0x6357, 0x92BC, 0x76F4, + 0x92BD, 0x6715, 0x92BE, 0x6C88, 0x92BF, 0x73CD, 0x92C0, 0x8CC3, + 0x92C1, 0x93AE, 0x92C2, 0x9673, 0x92C3, 0x6D25, 0x92C4, 0x589C, + 0x92C5, 0x690E, 0x92C6, 0x69CC, 0x92C7, 0x8FFD, 0x92C8, 0x939A, + 0x92C9, 0x75DB, 0x92CA, 0x901A, 0x92CB, 0x585A, 0x92CC, 0x6802, + 0x92CD, 0x63B4, 0x92CE, 0x69FB, 0x92CF, 0x4F43, 0x92D0, 0x6F2C, + 0x92D1, 0x67D8, 0x92D2, 0x8FBB, 0x92D3, 0x8526, 0x92D4, 0x7DB4, + 0x92D5, 0x9354, 0x92D6, 0x693F, 0x92D7, 0x6F70, 0x92D8, 0x576A, + 0x92D9, 0x58F7, 0x92DA, 0x5B2C, 0x92DB, 0x7D2C, 0x92DC, 0x722A, + 0x92DD, 0x540A, 0x92DE, 0x91E3, 0x92DF, 0x9DB4, 0x92E0, 0x4EAD, + 0x92E1, 0x4F4E, 0x92E2, 0x505C, 0x92E3, 0x5075, 0x92E4, 0x5243, + 0x92E5, 0x8C9E, 0x92E6, 0x5448, 0x92E7, 0x5824, 0x92E8, 0x5B9A, + 0x92E9, 0x5E1D, 0x92EA, 0x5E95, 0x92EB, 0x5EAD, 0x92EC, 0x5EF7, + 0x92ED, 0x5F1F, 0x92EE, 0x608C, 0x92EF, 0x62B5, 0x92F0, 0x633A, + 0x92F1, 0x63D0, 0x92F2, 0x68AF, 0x92F3, 0x6C40, 0x92F4, 0x7887, + 0x92F5, 0x798E, 0x92F6, 0x7A0B, 0x92F7, 0x7DE0, 0x92F8, 0x8247, + 0x92F9, 0x8A02, 0x92FA, 0x8AE6, 0x92FB, 0x8E44, 0x92FC, 0x9013, + 0x9340, 0x90B8, 0x9341, 0x912D, 0x9342, 0x91D8, 0x9343, 0x9F0E, + 0x9344, 0x6CE5, 0x9345, 0x6458, 0x9346, 0x64E2, 0x9347, 0x6575, + 0x9348, 0x6EF4, 0x9349, 0x7684, 0x934A, 0x7B1B, 0x934B, 0x9069, + 0x934C, 0x93D1, 0x934D, 0x6EBA, 0x934E, 0x54F2, 0x934F, 0x5FB9, + 0x9350, 0x64A4, 0x9351, 0x8F4D, 0x9352, 0x8FED, 0x9353, 0x9244, + 0x9354, 0x5178, 0x9355, 0x586B, 0x9356, 0x5929, 0x9357, 0x5C55, + 0x9358, 0x5E97, 0x9359, 0x6DFB, 0x935A, 0x7E8F, 0x935B, 0x751C, + 0x935C, 0x8CBC, 0x935D, 0x8EE2, 0x935E, 0x985B, 0x935F, 0x70B9, + 0x9360, 0x4F1D, 0x9361, 0x6BBF, 0x9362, 0x6FB1, 0x9363, 0x7530, + 0x9364, 0x96FB, 0x9365, 0x514E, 0x9366, 0x5410, 0x9367, 0x5835, + 0x9368, 0x5857, 0x9369, 0x59AC, 0x936A, 0x5C60, 0x936B, 0x5F92, + 0x936C, 0x6597, 0x936D, 0x675C, 0x936E, 0x6E21, 0x936F, 0x767B, + 0x9370, 0x83DF, 0x9371, 0x8CED, 0x9372, 0x9014, 0x9373, 0x90FD, + 0x9374, 0x934D, 0x9375, 0x7825, 0x9376, 0x783A, 0x9377, 0x52AA, + 0x9378, 0x5EA6, 0x9379, 0x571F, 0x937A, 0x5974, 0x937B, 0x6012, + 0x937C, 0x5012, 0x937D, 0x515A, 0x937E, 0x51AC, 0x9380, 0x51CD, + 0x9381, 0x5200, 0x9382, 0x5510, 0x9383, 0x5854, 0x9384, 0x5858, + 0x9385, 0x5957, 0x9386, 0x5B95, 0x9387, 0x5CF6, 0x9388, 0x5D8B, + 0x9389, 0x60BC, 0x938A, 0x6295, 0x938B, 0x642D, 0x938C, 0x6771, + 0x938D, 0x6843, 0x938E, 0x68BC, 0x938F, 0x68DF, 0x9390, 0x76D7, + 0x9391, 0x6DD8, 0x9392, 0x6E6F, 0x9393, 0x6D9B, 0x9394, 0x706F, + 0x9395, 0x71C8, 0x9396, 0x5F53, 0x9397, 0x75D8, 0x9398, 0x7977, + 0x9399, 0x7B49, 0x939A, 0x7B54, 0x939B, 0x7B52, 0x939C, 0x7CD6, + 0x939D, 0x7D71, 0x939E, 0x5230, 0x939F, 0x8463, 0x93A0, 0x8569, + 0x93A1, 0x85E4, 0x93A2, 0x8A0E, 0x93A3, 0x8B04, 0x93A4, 0x8C46, + 0x93A5, 0x8E0F, 0x93A6, 0x9003, 0x93A7, 0x900F, 0x93A8, 0x9419, + 0x93A9, 0x9676, 0x93AA, 0x982D, 0x93AB, 0x9A30, 0x93AC, 0x95D8, + 0x93AD, 0x50CD, 0x93AE, 0x52D5, 0x93AF, 0x540C, 0x93B0, 0x5802, + 0x93B1, 0x5C0E, 0x93B2, 0x61A7, 0x93B3, 0x649E, 0x93B4, 0x6D1E, + 0x93B5, 0x77B3, 0x93B6, 0x7AE5, 0x93B7, 0x80F4, 0x93B8, 0x8404, + 0x93B9, 0x9053, 0x93BA, 0x9285, 0x93BB, 0x5CE0, 0x93BC, 0x9D07, + 0x93BD, 0x533F, 0x93BE, 0x5F97, 0x93BF, 0x5FB3, 0x93C0, 0x6D9C, + 0x93C1, 0x7279, 0x93C2, 0x7763, 0x93C3, 0x79BF, 0x93C4, 0x7BE4, + 0x93C5, 0x6BD2, 0x93C6, 0x72EC, 0x93C7, 0x8AAD, 0x93C8, 0x6803, + 0x93C9, 0x6A61, 0x93CA, 0x51F8, 0x93CB, 0x7A81, 0x93CC, 0x6934, + 0x93CD, 0x5C4A, 0x93CE, 0x9CF6, 0x93CF, 0x82EB, 0x93D0, 0x5BC5, + 0x93D1, 0x9149, 0x93D2, 0x701E, 0x93D3, 0x5678, 0x93D4, 0x5C6F, + 0x93D5, 0x60C7, 0x93D6, 0x6566, 0x93D7, 0x6C8C, 0x93D8, 0x8C5A, + 0x93D9, 0x9041, 0x93DA, 0x9813, 0x93DB, 0x5451, 0x93DC, 0x66C7, + 0x93DD, 0x920D, 0x93DE, 0x5948, 0x93DF, 0x90A3, 0x93E0, 0x5185, + 0x93E1, 0x4E4D, 0x93E2, 0x51EA, 0x93E3, 0x8599, 0x93E4, 0x8B0E, + 0x93E5, 0x7058, 0x93E6, 0x637A, 0x93E7, 0x934B, 0x93E8, 0x6962, + 0x93E9, 0x99B4, 0x93EA, 0x7E04, 0x93EB, 0x7577, 0x93EC, 0x5357, + 0x93ED, 0x6960, 0x93EE, 0x8EDF, 0x93EF, 0x96E3, 0x93F0, 0x6C5D, + 0x93F1, 0x4E8C, 0x93F2, 0x5C3C, 0x93F3, 0x5F10, 0x93F4, 0x8FE9, + 0x93F5, 0x5302, 0x93F6, 0x8CD1, 0x93F7, 0x8089, 0x93F8, 0x8679, + 0x93F9, 0x5EFF, 0x93FA, 0x65E5, 0x93FB, 0x4E73, 0x93FC, 0x5165, + 0x9440, 0x5982, 0x9441, 0x5C3F, 0x9442, 0x97EE, 0x9443, 0x4EFB, + 0x9444, 0x598A, 0x9445, 0x5FCD, 0x9446, 0x8A8D, 0x9447, 0x6FE1, + 0x9448, 0x79B0, 0x9449, 0x7962, 0x944A, 0x5BE7, 0x944B, 0x8471, + 0x944C, 0x732B, 0x944D, 0x71B1, 0x944E, 0x5E74, 0x944F, 0x5FF5, + 0x9450, 0x637B, 0x9451, 0x649A, 0x9452, 0x71C3, 0x9453, 0x7C98, + 0x9454, 0x4E43, 0x9455, 0x5EFC, 0x9456, 0x4E4B, 0x9457, 0x57DC, + 0x9458, 0x56A2, 0x9459, 0x60A9, 0x945A, 0x6FC3, 0x945B, 0x7D0D, + 0x945C, 0x80FD, 0x945D, 0x8133, 0x945E, 0x81BF, 0x945F, 0x8FB2, + 0x9460, 0x8997, 0x9461, 0x86A4, 0x9462, 0x5DF4, 0x9463, 0x628A, + 0x9464, 0x64AD, 0x9465, 0x8987, 0x9466, 0x6777, 0x9467, 0x6CE2, + 0x9468, 0x6D3E, 0x9469, 0x7436, 0x946A, 0x7834, 0x946B, 0x5A46, + 0x946C, 0x7F75, 0x946D, 0x82AD, 0x946E, 0x99AC, 0x946F, 0x4FF3, + 0x9470, 0x5EC3, 0x9471, 0x62DD, 0x9472, 0x6392, 0x9473, 0x6557, + 0x9474, 0x676F, 0x9475, 0x76C3, 0x9476, 0x724C, 0x9477, 0x80CC, + 0x9478, 0x80BA, 0x9479, 0x8F29, 0x947A, 0x914D, 0x947B, 0x500D, + 0x947C, 0x57F9, 0x947D, 0x5A92, 0x947E, 0x6885, 0x9480, 0x6973, + 0x9481, 0x7164, 0x9482, 0x72FD, 0x9483, 0x8CB7, 0x9484, 0x58F2, + 0x9485, 0x8CE0, 0x9486, 0x966A, 0x9487, 0x9019, 0x9488, 0x877F, + 0x9489, 0x79E4, 0x948A, 0x77E7, 0x948B, 0x8429, 0x948C, 0x4F2F, + 0x948D, 0x5265, 0x948E, 0x535A, 0x948F, 0x62CD, 0x9490, 0x67CF, + 0x9491, 0x6CCA, 0x9492, 0x767D, 0x9493, 0x7B94, 0x9494, 0x7C95, + 0x9495, 0x8236, 0x9496, 0x8584, 0x9497, 0x8FEB, 0x9498, 0x66DD, + 0x9499, 0x6F20, 0x949A, 0x7206, 0x949B, 0x7E1B, 0x949C, 0x83AB, + 0x949D, 0x99C1, 0x949E, 0x9EA6, 0x949F, 0x51FD, 0x94A0, 0x7BB1, + 0x94A1, 0x7872, 0x94A2, 0x7BB8, 0x94A3, 0x8087, 0x94A4, 0x7B48, + 0x94A5, 0x6AE8, 0x94A6, 0x5E61, 0x94A7, 0x808C, 0x94A8, 0x7551, + 0x94A9, 0x7560, 0x94AA, 0x516B, 0x94AB, 0x9262, 0x94AC, 0x6E8C, + 0x94AD, 0x767A, 0x94AE, 0x9197, 0x94AF, 0x9AEA, 0x94B0, 0x4F10, + 0x94B1, 0x7F70, 0x94B2, 0x629C, 0x94B3, 0x7B4F, 0x94B4, 0x95A5, + 0x94B5, 0x9CE9, 0x94B6, 0x567A, 0x94B7, 0x5859, 0x94B8, 0x86E4, + 0x94B9, 0x96BC, 0x94BA, 0x4F34, 0x94BB, 0x5224, 0x94BC, 0x534A, + 0x94BD, 0x53CD, 0x94BE, 0x53DB, 0x94BF, 0x5E06, 0x94C0, 0x642C, + 0x94C1, 0x6591, 0x94C2, 0x677F, 0x94C3, 0x6C3E, 0x94C4, 0x6C4E, + 0x94C5, 0x7248, 0x94C6, 0x72AF, 0x94C7, 0x73ED, 0x94C8, 0x7554, + 0x94C9, 0x7E41, 0x94CA, 0x822C, 0x94CB, 0x85E9, 0x94CC, 0x8CA9, + 0x94CD, 0x7BC4, 0x94CE, 0x91C6, 0x94CF, 0x7169, 0x94D0, 0x9812, + 0x94D1, 0x98EF, 0x94D2, 0x633D, 0x94D3, 0x6669, 0x94D4, 0x756A, + 0x94D5, 0x76E4, 0x94D6, 0x78D0, 0x94D7, 0x8543, 0x94D8, 0x86EE, + 0x94D9, 0x532A, 0x94DA, 0x5351, 0x94DB, 0x5426, 0x94DC, 0x5983, + 0x94DD, 0x5E87, 0x94DE, 0x5F7C, 0x94DF, 0x60B2, 0x94E0, 0x6249, + 0x94E1, 0x6279, 0x94E2, 0x62AB, 0x94E3, 0x6590, 0x94E4, 0x6BD4, + 0x94E5, 0x6CCC, 0x94E6, 0x75B2, 0x94E7, 0x76AE, 0x94E8, 0x7891, + 0x94E9, 0x79D8, 0x94EA, 0x7DCB, 0x94EB, 0x7F77, 0x94EC, 0x80A5, + 0x94ED, 0x88AB, 0x94EE, 0x8AB9, 0x94EF, 0x8CBB, 0x94F0, 0x907F, + 0x94F1, 0x975E, 0x94F2, 0x98DB, 0x94F3, 0x6A0B, 0x94F4, 0x7C38, + 0x94F5, 0x5099, 0x94F6, 0x5C3E, 0x94F7, 0x5FAE, 0x94F8, 0x6787, + 0x94F9, 0x6BD8, 0x94FA, 0x7435, 0x94FB, 0x7709, 0x94FC, 0x7F8E, + 0x9540, 0x9F3B, 0x9541, 0x67CA, 0x9542, 0x7A17, 0x9543, 0x5339, + 0x9544, 0x758B, 0x9545, 0x9AED, 0x9546, 0x5F66, 0x9547, 0x819D, + 0x9548, 0x83F1, 0x9549, 0x8098, 0x954A, 0x5F3C, 0x954B, 0x5FC5, + 0x954C, 0x7562, 0x954D, 0x7B46, 0x954E, 0x903C, 0x954F, 0x6867, + 0x9550, 0x59EB, 0x9551, 0x5A9B, 0x9552, 0x7D10, 0x9553, 0x767E, + 0x9554, 0x8B2C, 0x9555, 0x4FF5, 0x9556, 0x5F6A, 0x9557, 0x6A19, + 0x9558, 0x6C37, 0x9559, 0x6F02, 0x955A, 0x74E2, 0x955B, 0x7968, + 0x955C, 0x8868, 0x955D, 0x8A55, 0x955E, 0x8C79, 0x955F, 0x5EDF, + 0x9560, 0x63CF, 0x9561, 0x75C5, 0x9562, 0x79D2, 0x9563, 0x82D7, + 0x9564, 0x9328, 0x9565, 0x92F2, 0x9566, 0x849C, 0x9567, 0x86ED, + 0x9568, 0x9C2D, 0x9569, 0x54C1, 0x956A, 0x5F6C, 0x956B, 0x658C, + 0x956C, 0x6D5C, 0x956D, 0x7015, 0x956E, 0x8CA7, 0x956F, 0x8CD3, + 0x9570, 0x983B, 0x9571, 0x654F, 0x9572, 0x74F6, 0x9573, 0x4E0D, + 0x9574, 0x4ED8, 0x9575, 0x57E0, 0x9576, 0x592B, 0x9577, 0x5A66, + 0x9578, 0x5BCC, 0x9579, 0x51A8, 0x957A, 0x5E03, 0x957B, 0x5E9C, + 0x957C, 0x6016, 0x957D, 0x6276, 0x957E, 0x6577, 0x9580, 0x65A7, + 0x9581, 0x666E, 0x9582, 0x6D6E, 0x9583, 0x7236, 0x9584, 0x7B26, + 0x9585, 0x8150, 0x9586, 0x819A, 0x9587, 0x8299, 0x9588, 0x8B5C, + 0x9589, 0x8CA0, 0x958A, 0x8CE6, 0x958B, 0x8D74, 0x958C, 0x961C, + 0x958D, 0x9644, 0x958E, 0x4FAE, 0x958F, 0x64AB, 0x9590, 0x6B66, + 0x9591, 0x821E, 0x9592, 0x8461, 0x9593, 0x856A, 0x9594, 0x90E8, + 0x9595, 0x5C01, 0x9596, 0x6953, 0x9597, 0x98A8, 0x9598, 0x847A, + 0x9599, 0x8557, 0x959A, 0x4F0F, 0x959B, 0x526F, 0x959C, 0x5FA9, + 0x959D, 0x5E45, 0x959E, 0x670D, 0x959F, 0x798F, 0x95A0, 0x8179, + 0x95A1, 0x8907, 0x95A2, 0x8986, 0x95A3, 0x6DF5, 0x95A4, 0x5F17, + 0x95A5, 0x6255, 0x95A6, 0x6CB8, 0x95A7, 0x4ECF, 0x95A8, 0x7269, + 0x95A9, 0x9B92, 0x95AA, 0x5206, 0x95AB, 0x543B, 0x95AC, 0x5674, + 0x95AD, 0x58B3, 0x95AE, 0x61A4, 0x95AF, 0x626E, 0x95B0, 0x711A, + 0x95B1, 0x596E, 0x95B2, 0x7C89, 0x95B3, 0x7CDE, 0x95B4, 0x7D1B, + 0x95B5, 0x96F0, 0x95B6, 0x6587, 0x95B7, 0x805E, 0x95B8, 0x4E19, + 0x95B9, 0x4F75, 0x95BA, 0x5175, 0x95BB, 0x5840, 0x95BC, 0x5E63, + 0x95BD, 0x5E73, 0x95BE, 0x5F0A, 0x95BF, 0x67C4, 0x95C0, 0x4E26, + 0x95C1, 0x853D, 0x95C2, 0x9589, 0x95C3, 0x965B, 0x95C4, 0x7C73, + 0x95C5, 0x9801, 0x95C6, 0x50FB, 0x95C7, 0x58C1, 0x95C8, 0x7656, + 0x95C9, 0x78A7, 0x95CA, 0x5225, 0x95CB, 0x77A5, 0x95CC, 0x8511, + 0x95CD, 0x7B86, 0x95CE, 0x504F, 0x95CF, 0x5909, 0x95D0, 0x7247, + 0x95D1, 0x7BC7, 0x95D2, 0x7DE8, 0x95D3, 0x8FBA, 0x95D4, 0x8FD4, + 0x95D5, 0x904D, 0x95D6, 0x4FBF, 0x95D7, 0x52C9, 0x95D8, 0x5A29, + 0x95D9, 0x5F01, 0x95DA, 0x97AD, 0x95DB, 0x4FDD, 0x95DC, 0x8217, + 0x95DD, 0x92EA, 0x95DE, 0x5703, 0x95DF, 0x6355, 0x95E0, 0x6B69, + 0x95E1, 0x752B, 0x95E2, 0x88DC, 0x95E3, 0x8F14, 0x95E4, 0x7A42, + 0x95E5, 0x52DF, 0x95E6, 0x5893, 0x95E7, 0x6155, 0x95E8, 0x620A, + 0x95E9, 0x66AE, 0x95EA, 0x6BCD, 0x95EB, 0x7C3F, 0x95EC, 0x83E9, + 0x95ED, 0x5023, 0x95EE, 0x4FF8, 0x95EF, 0x5305, 0x95F0, 0x5446, + 0x95F1, 0x5831, 0x95F2, 0x5949, 0x95F3, 0x5B9D, 0x95F4, 0x5CF0, + 0x95F5, 0x5CEF, 0x95F6, 0x5D29, 0x95F7, 0x5E96, 0x95F8, 0x62B1, + 0x95F9, 0x6367, 0x95FA, 0x653E, 0x95FB, 0x65B9, 0x95FC, 0x670B, + 0x9640, 0x6CD5, 0x9641, 0x6CE1, 0x9642, 0x70F9, 0x9643, 0x7832, + 0x9644, 0x7E2B, 0x9645, 0x80DE, 0x9646, 0x82B3, 0x9647, 0x840C, + 0x9648, 0x84EC, 0x9649, 0x8702, 0x964A, 0x8912, 0x964B, 0x8A2A, + 0x964C, 0x8C4A, 0x964D, 0x90A6, 0x964E, 0x92D2, 0x964F, 0x98FD, + 0x9650, 0x9CF3, 0x9651, 0x9D6C, 0x9652, 0x4E4F, 0x9653, 0x4EA1, + 0x9654, 0x508D, 0x9655, 0x5256, 0x9656, 0x574A, 0x9657, 0x59A8, + 0x9658, 0x5E3D, 0x9659, 0x5FD8, 0x965A, 0x5FD9, 0x965B, 0x623F, + 0x965C, 0x66B4, 0x965D, 0x671B, 0x965E, 0x67D0, 0x965F, 0x68D2, + 0x9660, 0x5192, 0x9661, 0x7D21, 0x9662, 0x80AA, 0x9663, 0x81A8, + 0x9664, 0x8B00, 0x9665, 0x8C8C, 0x9666, 0x8CBF, 0x9667, 0x927E, + 0x9668, 0x9632, 0x9669, 0x5420, 0x966A, 0x982C, 0x966B, 0x5317, + 0x966C, 0x50D5, 0x966D, 0x535C, 0x966E, 0x58A8, 0x966F, 0x64B2, + 0x9670, 0x6734, 0x9671, 0x7267, 0x9672, 0x7766, 0x9673, 0x7A46, + 0x9674, 0x91E6, 0x9675, 0x52C3, 0x9676, 0x6CA1, 0x9677, 0x6B86, + 0x9678, 0x5800, 0x9679, 0x5E4C, 0x967A, 0x5954, 0x967B, 0x672C, + 0x967C, 0x7FFB, 0x967D, 0x51E1, 0x967E, 0x76C6, 0x9680, 0x6469, + 0x9681, 0x78E8, 0x9682, 0x9B54, 0x9683, 0x9EBB, 0x9684, 0x57CB, + 0x9685, 0x59B9, 0x9686, 0x6627, 0x9687, 0x679A, 0x9688, 0x6BCE, + 0x9689, 0x54E9, 0x968A, 0x69D9, 0x968B, 0x5E55, 0x968C, 0x819C, + 0x968D, 0x6795, 0x968E, 0x9BAA, 0x968F, 0x67FE, 0x9690, 0x9C52, + 0x9691, 0x685D, 0x9692, 0x4EA6, 0x9693, 0x4FE3, 0x9694, 0x53C8, + 0x9695, 0x62B9, 0x9696, 0x672B, 0x9697, 0x6CAB, 0x9698, 0x8FC4, + 0x9699, 0x4FAD, 0x969A, 0x7E6D, 0x969B, 0x9EBF, 0x969C, 0x4E07, + 0x969D, 0x6162, 0x969E, 0x6E80, 0x969F, 0x6F2B, 0x96A0, 0x8513, + 0x96A1, 0x5473, 0x96A2, 0x672A, 0x96A3, 0x9B45, 0x96A4, 0x5DF3, + 0x96A5, 0x7B95, 0x96A6, 0x5CAC, 0x96A7, 0x5BC6, 0x96A8, 0x871C, + 0x96A9, 0x6E4A, 0x96AA, 0x84D1, 0x96AB, 0x7A14, 0x96AC, 0x8108, + 0x96AD, 0x5999, 0x96AE, 0x7C8D, 0x96AF, 0x6C11, 0x96B0, 0x7720, + 0x96B1, 0x52D9, 0x96B2, 0x5922, 0x96B3, 0x7121, 0x96B4, 0x725F, + 0x96B5, 0x77DB, 0x96B6, 0x9727, 0x96B7, 0x9D61, 0x96B8, 0x690B, + 0x96B9, 0x5A7F, 0x96BA, 0x5A18, 0x96BB, 0x51A5, 0x96BC, 0x540D, + 0x96BD, 0x547D, 0x96BE, 0x660E, 0x96BF, 0x76DF, 0x96C0, 0x8FF7, + 0x96C1, 0x9298, 0x96C2, 0x9CF4, 0x96C3, 0x59EA, 0x96C4, 0x725D, + 0x96C5, 0x6EC5, 0x96C6, 0x514D, 0x96C7, 0x68C9, 0x96C8, 0x7DBF, + 0x96C9, 0x7DEC, 0x96CA, 0x9762, 0x96CB, 0x9EBA, 0x96CC, 0x6478, + 0x96CD, 0x6A21, 0x96CE, 0x8302, 0x96CF, 0x5984, 0x96D0, 0x5B5F, + 0x96D1, 0x6BDB, 0x96D2, 0x731B, 0x96D3, 0x76F2, 0x96D4, 0x7DB2, + 0x96D5, 0x8017, 0x96D6, 0x8499, 0x96D7, 0x5132, 0x96D8, 0x6728, + 0x96D9, 0x9ED9, 0x96DA, 0x76EE, 0x96DB, 0x6762, 0x96DC, 0x52FF, + 0x96DD, 0x9905, 0x96DE, 0x5C24, 0x96DF, 0x623B, 0x96E0, 0x7C7E, + 0x96E1, 0x8CB0, 0x96E2, 0x554F, 0x96E3, 0x60B6, 0x96E4, 0x7D0B, + 0x96E5, 0x9580, 0x96E6, 0x5301, 0x96E7, 0x4E5F, 0x96E8, 0x51B6, + 0x96E9, 0x591C, 0x96EA, 0x723A, 0x96EB, 0x8036, 0x96EC, 0x91CE, + 0x96ED, 0x5F25, 0x96EE, 0x77E2, 0x96EF, 0x5384, 0x96F0, 0x5F79, + 0x96F1, 0x7D04, 0x96F2, 0x85AC, 0x96F3, 0x8A33, 0x96F4, 0x8E8D, + 0x96F5, 0x9756, 0x96F6, 0x67F3, 0x96F7, 0x85AE, 0x96F8, 0x9453, + 0x96F9, 0x6109, 0x96FA, 0x6108, 0x96FB, 0x6CB9, 0x96FC, 0x7652, + 0x9740, 0x8AED, 0x9741, 0x8F38, 0x9742, 0x552F, 0x9743, 0x4F51, + 0x9744, 0x512A, 0x9745, 0x52C7, 0x9746, 0x53CB, 0x9747, 0x5BA5, + 0x9748, 0x5E7D, 0x9749, 0x60A0, 0x974A, 0x6182, 0x974B, 0x63D6, + 0x974C, 0x6709, 0x974D, 0x67DA, 0x974E, 0x6E67, 0x974F, 0x6D8C, + 0x9750, 0x7336, 0x9751, 0x7337, 0x9752, 0x7531, 0x9753, 0x7950, + 0x9754, 0x88D5, 0x9755, 0x8A98, 0x9756, 0x904A, 0x9757, 0x9091, + 0x9758, 0x90F5, 0x9759, 0x96C4, 0x975A, 0x878D, 0x975B, 0x5915, + 0x975C, 0x4E88, 0x975D, 0x4F59, 0x975E, 0x4E0E, 0x975F, 0x8A89, + 0x9760, 0x8F3F, 0x9761, 0x9810, 0x9762, 0x50AD, 0x9763, 0x5E7C, + 0x9764, 0x5996, 0x9765, 0x5BB9, 0x9766, 0x5EB8, 0x9767, 0x63DA, + 0x9768, 0x63FA, 0x9769, 0x64C1, 0x976A, 0x66DC, 0x976B, 0x694A, + 0x976C, 0x69D8, 0x976D, 0x6D0B, 0x976E, 0x6EB6, 0x976F, 0x7194, + 0x9770, 0x7528, 0x9771, 0x7AAF, 0x9772, 0x7F8A, 0x9773, 0x8000, + 0x9774, 0x8449, 0x9775, 0x84C9, 0x9776, 0x8981, 0x9777, 0x8B21, + 0x9778, 0x8E0A, 0x9779, 0x9065, 0x977A, 0x967D, 0x977B, 0x990A, + 0x977C, 0x617E, 0x977D, 0x6291, 0x977E, 0x6B32, 0x9780, 0x6C83, + 0x9781, 0x6D74, 0x9782, 0x7FCC, 0x9783, 0x7FFC, 0x9784, 0x6DC0, + 0x9785, 0x7F85, 0x9786, 0x87BA, 0x9787, 0x88F8, 0x9788, 0x6765, + 0x9789, 0x83B1, 0x978A, 0x983C, 0x978B, 0x96F7, 0x978C, 0x6D1B, + 0x978D, 0x7D61, 0x978E, 0x843D, 0x978F, 0x916A, 0x9790, 0x4E71, + 0x9791, 0x5375, 0x9792, 0x5D50, 0x9793, 0x6B04, 0x9794, 0x6FEB, + 0x9795, 0x85CD, 0x9796, 0x862D, 0x9797, 0x89A7, 0x9798, 0x5229, + 0x9799, 0x540F, 0x979A, 0x5C65, 0x979B, 0x674E, 0x979C, 0x68A8, + 0x979D, 0x7406, 0x979E, 0x7483, 0x979F, 0x75E2, 0x97A0, 0x88CF, + 0x97A1, 0x88E1, 0x97A2, 0x91CC, 0x97A3, 0x96E2, 0x97A4, 0x9678, + 0x97A5, 0x5F8B, 0x97A6, 0x7387, 0x97A7, 0x7ACB, 0x97A8, 0x844E, + 0x97A9, 0x63A0, 0x97AA, 0x7565, 0x97AB, 0x5289, 0x97AC, 0x6D41, + 0x97AD, 0x6E9C, 0x97AE, 0x7409, 0x97AF, 0x7559, 0x97B0, 0x786B, + 0x97B1, 0x7C92, 0x97B2, 0x9686, 0x97B3, 0x7ADC, 0x97B4, 0x9F8D, + 0x97B5, 0x4FB6, 0x97B6, 0x616E, 0x97B7, 0x65C5, 0x97B8, 0x865C, + 0x97B9, 0x4E86, 0x97BA, 0x4EAE, 0x97BB, 0x50DA, 0x97BC, 0x4E21, + 0x97BD, 0x51CC, 0x97BE, 0x5BEE, 0x97BF, 0x6599, 0x97C0, 0x6881, + 0x97C1, 0x6DBC, 0x97C2, 0x731F, 0x97C3, 0x7642, 0x97C4, 0x77AD, + 0x97C5, 0x7A1C, 0x97C6, 0x7CE7, 0x97C7, 0x826F, 0x97C8, 0x8AD2, + 0x97C9, 0x907C, 0x97CA, 0x91CF, 0x97CB, 0x9675, 0x97CC, 0x9818, + 0x97CD, 0x529B, 0x97CE, 0x7DD1, 0x97CF, 0x502B, 0x97D0, 0x5398, + 0x97D1, 0x6797, 0x97D2, 0x6DCB, 0x97D3, 0x71D0, 0x97D4, 0x7433, + 0x97D5, 0x81E8, 0x97D6, 0x8F2A, 0x97D7, 0x96A3, 0x97D8, 0x9C57, + 0x97D9, 0x9E9F, 0x97DA, 0x7460, 0x97DB, 0x5841, 0x97DC, 0x6D99, + 0x97DD, 0x7D2F, 0x97DE, 0x985E, 0x97DF, 0x4EE4, 0x97E0, 0x4F36, + 0x97E1, 0x4F8B, 0x97E2, 0x51B7, 0x97E3, 0x52B1, 0x97E4, 0x5DBA, + 0x97E5, 0x601C, 0x97E6, 0x73B2, 0x97E7, 0x793C, 0x97E8, 0x82D3, + 0x97E9, 0x9234, 0x97EA, 0x96B7, 0x97EB, 0x96F6, 0x97EC, 0x970A, + 0x97ED, 0x9E97, 0x97EE, 0x9F62, 0x97EF, 0x66A6, 0x97F0, 0x6B74, + 0x97F1, 0x5217, 0x97F2, 0x52A3, 0x97F3, 0x70C8, 0x97F4, 0x88C2, + 0x97F5, 0x5EC9, 0x97F6, 0x604B, 0x97F7, 0x6190, 0x97F8, 0x6F23, + 0x97F9, 0x7149, 0x97FA, 0x7C3E, 0x97FB, 0x7DF4, 0x97FC, 0x806F, + 0x9840, 0x84EE, 0x9841, 0x9023, 0x9842, 0x932C, 0x9843, 0x5442, + 0x9844, 0x9B6F, 0x9845, 0x6AD3, 0x9846, 0x7089, 0x9847, 0x8CC2, + 0x9848, 0x8DEF, 0x9849, 0x9732, 0x984A, 0x52B4, 0x984B, 0x5A41, + 0x984C, 0x5ECA, 0x984D, 0x5F04, 0x984E, 0x6717, 0x984F, 0x697C, + 0x9850, 0x6994, 0x9851, 0x6D6A, 0x9852, 0x6F0F, 0x9853, 0x7262, + 0x9854, 0x72FC, 0x9855, 0x7BED, 0x9856, 0x8001, 0x9857, 0x807E, + 0x9858, 0x874B, 0x9859, 0x90CE, 0x985A, 0x516D, 0x985B, 0x9E93, + 0x985C, 0x7984, 0x985D, 0x808B, 0x985E, 0x9332, 0x985F, 0x8AD6, + 0x9860, 0x502D, 0x9861, 0x548C, 0x9862, 0x8A71, 0x9863, 0x6B6A, + 0x9864, 0x8CC4, 0x9865, 0x8107, 0x9866, 0x60D1, 0x9867, 0x67A0, + 0x9868, 0x9DF2, 0x9869, 0x4E99, 0x986A, 0x4E98, 0x986B, 0x9C10, + 0x986C, 0x8A6B, 0x986D, 0x85C1, 0x986E, 0x8568, 0x986F, 0x6900, + 0x9870, 0x6E7E, 0x9871, 0x7897, 0x9872, 0x8155, 0x989F, 0x5F0C, + 0x98A0, 0x4E10, 0x98A1, 0x4E15, 0x98A2, 0x4E2A, 0x98A3, 0x4E31, + 0x98A4, 0x4E36, 0x98A5, 0x4E3C, 0x98A6, 0x4E3F, 0x98A7, 0x4E42, + 0x98A8, 0x4E56, 0x98A9, 0x4E58, 0x98AA, 0x4E82, 0x98AB, 0x4E85, + 0x98AC, 0x8C6B, 0x98AD, 0x4E8A, 0x98AE, 0x8212, 0x98AF, 0x5F0D, + 0x98B0, 0x4E8E, 0x98B1, 0x4E9E, 0x98B2, 0x4E9F, 0x98B3, 0x4EA0, + 0x98B4, 0x4EA2, 0x98B5, 0x4EB0, 0x98B6, 0x4EB3, 0x98B7, 0x4EB6, + 0x98B8, 0x4ECE, 0x98B9, 0x4ECD, 0x98BA, 0x4EC4, 0x98BB, 0x4EC6, + 0x98BC, 0x4EC2, 0x98BD, 0x4ED7, 0x98BE, 0x4EDE, 0x98BF, 0x4EED, + 0x98C0, 0x4EDF, 0x98C1, 0x4EF7, 0x98C2, 0x4F09, 0x98C3, 0x4F5A, + 0x98C4, 0x4F30, 0x98C5, 0x4F5B, 0x98C6, 0x4F5D, 0x98C7, 0x4F57, + 0x98C8, 0x4F47, 0x98C9, 0x4F76, 0x98CA, 0x4F88, 0x98CB, 0x4F8F, + 0x98CC, 0x4F98, 0x98CD, 0x4F7B, 0x98CE, 0x4F69, 0x98CF, 0x4F70, + 0x98D0, 0x4F91, 0x98D1, 0x4F6F, 0x98D2, 0x4F86, 0x98D3, 0x4F96, + 0x98D4, 0x5118, 0x98D5, 0x4FD4, 0x98D6, 0x4FDF, 0x98D7, 0x4FCE, + 0x98D8, 0x4FD8, 0x98D9, 0x4FDB, 0x98DA, 0x4FD1, 0x98DB, 0x4FDA, + 0x98DC, 0x4FD0, 0x98DD, 0x4FE4, 0x98DE, 0x4FE5, 0x98DF, 0x501A, + 0x98E0, 0x5028, 0x98E1, 0x5014, 0x98E2, 0x502A, 0x98E3, 0x5025, + 0x98E4, 0x5005, 0x98E5, 0x4F1C, 0x98E6, 0x4FF6, 0x98E7, 0x5021, + 0x98E8, 0x5029, 0x98E9, 0x502C, 0x98EA, 0x4FFE, 0x98EB, 0x4FEF, + 0x98EC, 0x5011, 0x98ED, 0x5006, 0x98EE, 0x5043, 0x98EF, 0x5047, + 0x98F0, 0x6703, 0x98F1, 0x5055, 0x98F2, 0x5050, 0x98F3, 0x5048, + 0x98F4, 0x505A, 0x98F5, 0x5056, 0x98F6, 0x506C, 0x98F7, 0x5078, + 0x98F8, 0x5080, 0x98F9, 0x509A, 0x98FA, 0x5085, 0x98FB, 0x50B4, + 0x98FC, 0x50B2, 0x9940, 0x50C9, 0x9941, 0x50CA, 0x9942, 0x50B3, + 0x9943, 0x50C2, 0x9944, 0x50D6, 0x9945, 0x50DE, 0x9946, 0x50E5, + 0x9947, 0x50ED, 0x9948, 0x50E3, 0x9949, 0x50EE, 0x994A, 0x50F9, + 0x994B, 0x50F5, 0x994C, 0x5109, 0x994D, 0x5101, 0x994E, 0x5102, + 0x994F, 0x5116, 0x9950, 0x5115, 0x9951, 0x5114, 0x9952, 0x511A, + 0x9953, 0x5121, 0x9954, 0x513A, 0x9955, 0x5137, 0x9956, 0x513C, + 0x9957, 0x513B, 0x9958, 0x513F, 0x9959, 0x5140, 0x995A, 0x5152, + 0x995B, 0x514C, 0x995C, 0x5154, 0x995D, 0x5162, 0x995E, 0x7AF8, + 0x995F, 0x5169, 0x9960, 0x516A, 0x9961, 0x516E, 0x9962, 0x5180, + 0x9963, 0x5182, 0x9964, 0x56D8, 0x9965, 0x518C, 0x9966, 0x5189, + 0x9967, 0x518F, 0x9968, 0x5191, 0x9969, 0x5193, 0x996A, 0x5195, + 0x996B, 0x5196, 0x996C, 0x51A4, 0x996D, 0x51A6, 0x996E, 0x51A2, + 0x996F, 0x51A9, 0x9970, 0x51AA, 0x9971, 0x51AB, 0x9972, 0x51B3, + 0x9973, 0x51B1, 0x9974, 0x51B2, 0x9975, 0x51B0, 0x9976, 0x51B5, + 0x9977, 0x51BD, 0x9978, 0x51C5, 0x9979, 0x51C9, 0x997A, 0x51DB, + 0x997B, 0x51E0, 0x997C, 0x8655, 0x997D, 0x51E9, 0x997E, 0x51ED, + 0x9980, 0x51F0, 0x9981, 0x51F5, 0x9982, 0x51FE, 0x9983, 0x5204, + 0x9984, 0x520B, 0x9985, 0x5214, 0x9986, 0x520E, 0x9987, 0x5227, + 0x9988, 0x522A, 0x9989, 0x522E, 0x998A, 0x5233, 0x998B, 0x5239, + 0x998C, 0x524F, 0x998D, 0x5244, 0x998E, 0x524B, 0x998F, 0x524C, + 0x9990, 0x525E, 0x9991, 0x5254, 0x9992, 0x526A, 0x9993, 0x5274, + 0x9994, 0x5269, 0x9995, 0x5273, 0x9996, 0x527F, 0x9997, 0x527D, + 0x9998, 0x528D, 0x9999, 0x5294, 0x999A, 0x5292, 0x999B, 0x5271, + 0x999C, 0x5288, 0x999D, 0x5291, 0x999E, 0x8FA8, 0x999F, 0x8FA7, + 0x99A0, 0x52AC, 0x99A1, 0x52AD, 0x99A2, 0x52BC, 0x99A3, 0x52B5, + 0x99A4, 0x52C1, 0x99A5, 0x52CD, 0x99A6, 0x52D7, 0x99A7, 0x52DE, + 0x99A8, 0x52E3, 0x99A9, 0x52E6, 0x99AA, 0x98ED, 0x99AB, 0x52E0, + 0x99AC, 0x52F3, 0x99AD, 0x52F5, 0x99AE, 0x52F8, 0x99AF, 0x52F9, + 0x99B0, 0x5306, 0x99B1, 0x5308, 0x99B2, 0x7538, 0x99B3, 0x530D, + 0x99B4, 0x5310, 0x99B5, 0x530F, 0x99B6, 0x5315, 0x99B7, 0x531A, + 0x99B8, 0x5323, 0x99B9, 0x532F, 0x99BA, 0x5331, 0x99BB, 0x5333, + 0x99BC, 0x5338, 0x99BD, 0x5340, 0x99BE, 0x5346, 0x99BF, 0x5345, + 0x99C0, 0x4E17, 0x99C1, 0x5349, 0x99C2, 0x534D, 0x99C3, 0x51D6, + 0x99C4, 0x535E, 0x99C5, 0x5369, 0x99C6, 0x536E, 0x99C7, 0x5918, + 0x99C8, 0x537B, 0x99C9, 0x5377, 0x99CA, 0x5382, 0x99CB, 0x5396, + 0x99CC, 0x53A0, 0x99CD, 0x53A6, 0x99CE, 0x53A5, 0x99CF, 0x53AE, + 0x99D0, 0x53B0, 0x99D1, 0x53B6, 0x99D2, 0x53C3, 0x99D3, 0x7C12, + 0x99D4, 0x96D9, 0x99D5, 0x53DF, 0x99D6, 0x66FC, 0x99D7, 0x71EE, + 0x99D8, 0x53EE, 0x99D9, 0x53E8, 0x99DA, 0x53ED, 0x99DB, 0x53FA, + 0x99DC, 0x5401, 0x99DD, 0x543D, 0x99DE, 0x5440, 0x99DF, 0x542C, + 0x99E0, 0x542D, 0x99E1, 0x543C, 0x99E2, 0x542E, 0x99E3, 0x5436, + 0x99E4, 0x5429, 0x99E5, 0x541D, 0x99E6, 0x544E, 0x99E7, 0x548F, + 0x99E8, 0x5475, 0x99E9, 0x548E, 0x99EA, 0x545F, 0x99EB, 0x5471, + 0x99EC, 0x5477, 0x99ED, 0x5470, 0x99EE, 0x5492, 0x99EF, 0x547B, + 0x99F0, 0x5480, 0x99F1, 0x5476, 0x99F2, 0x5484, 0x99F3, 0x5490, + 0x99F4, 0x5486, 0x99F5, 0x54C7, 0x99F6, 0x54A2, 0x99F7, 0x54B8, + 0x99F8, 0x54A5, 0x99F9, 0x54AC, 0x99FA, 0x54C4, 0x99FB, 0x54C8, + 0x99FC, 0x54A8, 0x9A40, 0x54AB, 0x9A41, 0x54C2, 0x9A42, 0x54A4, + 0x9A43, 0x54BE, 0x9A44, 0x54BC, 0x9A45, 0x54D8, 0x9A46, 0x54E5, + 0x9A47, 0x54E6, 0x9A48, 0x550F, 0x9A49, 0x5514, 0x9A4A, 0x54FD, + 0x9A4B, 0x54EE, 0x9A4C, 0x54ED, 0x9A4D, 0x54FA, 0x9A4E, 0x54E2, + 0x9A4F, 0x5539, 0x9A50, 0x5540, 0x9A51, 0x5563, 0x9A52, 0x554C, + 0x9A53, 0x552E, 0x9A54, 0x555C, 0x9A55, 0x5545, 0x9A56, 0x5556, + 0x9A57, 0x5557, 0x9A58, 0x5538, 0x9A59, 0x5533, 0x9A5A, 0x555D, + 0x9A5B, 0x5599, 0x9A5C, 0x5580, 0x9A5D, 0x54AF, 0x9A5E, 0x558A, + 0x9A5F, 0x559F, 0x9A60, 0x557B, 0x9A61, 0x557E, 0x9A62, 0x5598, + 0x9A63, 0x559E, 0x9A64, 0x55AE, 0x9A65, 0x557C, 0x9A66, 0x5583, + 0x9A67, 0x55A9, 0x9A68, 0x5587, 0x9A69, 0x55A8, 0x9A6A, 0x55DA, + 0x9A6B, 0x55C5, 0x9A6C, 0x55DF, 0x9A6D, 0x55C4, 0x9A6E, 0x55DC, + 0x9A6F, 0x55E4, 0x9A70, 0x55D4, 0x9A71, 0x5614, 0x9A72, 0x55F7, + 0x9A73, 0x5616, 0x9A74, 0x55FE, 0x9A75, 0x55FD, 0x9A76, 0x561B, + 0x9A77, 0x55F9, 0x9A78, 0x564E, 0x9A79, 0x5650, 0x9A7A, 0x71DF, + 0x9A7B, 0x5634, 0x9A7C, 0x5636, 0x9A7D, 0x5632, 0x9A7E, 0x5638, + 0x9A80, 0x566B, 0x9A81, 0x5664, 0x9A82, 0x562F, 0x9A83, 0x566C, + 0x9A84, 0x566A, 0x9A85, 0x5686, 0x9A86, 0x5680, 0x9A87, 0x568A, + 0x9A88, 0x56A0, 0x9A89, 0x5694, 0x9A8A, 0x568F, 0x9A8B, 0x56A5, + 0x9A8C, 0x56AE, 0x9A8D, 0x56B6, 0x9A8E, 0x56B4, 0x9A8F, 0x56C2, + 0x9A90, 0x56BC, 0x9A91, 0x56C1, 0x9A92, 0x56C3, 0x9A93, 0x56C0, + 0x9A94, 0x56C8, 0x9A95, 0x56CE, 0x9A96, 0x56D1, 0x9A97, 0x56D3, + 0x9A98, 0x56D7, 0x9A99, 0x56EE, 0x9A9A, 0x56F9, 0x9A9B, 0x5700, + 0x9A9C, 0x56FF, 0x9A9D, 0x5704, 0x9A9E, 0x5709, 0x9A9F, 0x5708, + 0x9AA0, 0x570B, 0x9AA1, 0x570D, 0x9AA2, 0x5713, 0x9AA3, 0x5718, + 0x9AA4, 0x5716, 0x9AA5, 0x55C7, 0x9AA6, 0x571C, 0x9AA7, 0x5726, + 0x9AA8, 0x5737, 0x9AA9, 0x5738, 0x9AAA, 0x574E, 0x9AAB, 0x573B, + 0x9AAC, 0x5740, 0x9AAD, 0x574F, 0x9AAE, 0x5769, 0x9AAF, 0x57C0, + 0x9AB0, 0x5788, 0x9AB1, 0x5761, 0x9AB2, 0x577F, 0x9AB3, 0x5789, + 0x9AB4, 0x5793, 0x9AB5, 0x57A0, 0x9AB6, 0x57B3, 0x9AB7, 0x57A4, + 0x9AB8, 0x57AA, 0x9AB9, 0x57B0, 0x9ABA, 0x57C3, 0x9ABB, 0x57C6, + 0x9ABC, 0x57D4, 0x9ABD, 0x57D2, 0x9ABE, 0x57D3, 0x9ABF, 0x580A, + 0x9AC0, 0x57D6, 0x9AC1, 0x57E3, 0x9AC2, 0x580B, 0x9AC3, 0x5819, + 0x9AC4, 0x581D, 0x9AC5, 0x5872, 0x9AC6, 0x5821, 0x9AC7, 0x5862, + 0x9AC8, 0x584B, 0x9AC9, 0x5870, 0x9ACA, 0x6BC0, 0x9ACB, 0x5852, + 0x9ACC, 0x583D, 0x9ACD, 0x5879, 0x9ACE, 0x5885, 0x9ACF, 0x58B9, + 0x9AD0, 0x589F, 0x9AD1, 0x58AB, 0x9AD2, 0x58BA, 0x9AD3, 0x58DE, + 0x9AD4, 0x58BB, 0x9AD5, 0x58B8, 0x9AD6, 0x58AE, 0x9AD7, 0x58C5, + 0x9AD8, 0x58D3, 0x9AD9, 0x58D1, 0x9ADA, 0x58D7, 0x9ADB, 0x58D9, + 0x9ADC, 0x58D8, 0x9ADD, 0x58E5, 0x9ADE, 0x58DC, 0x9ADF, 0x58E4, + 0x9AE0, 0x58DF, 0x9AE1, 0x58EF, 0x9AE2, 0x58FA, 0x9AE3, 0x58F9, + 0x9AE4, 0x58FB, 0x9AE5, 0x58FC, 0x9AE6, 0x58FD, 0x9AE7, 0x5902, + 0x9AE8, 0x590A, 0x9AE9, 0x5910, 0x9AEA, 0x591B, 0x9AEB, 0x68A6, + 0x9AEC, 0x5925, 0x9AED, 0x592C, 0x9AEE, 0x592D, 0x9AEF, 0x5932, + 0x9AF0, 0x5938, 0x9AF1, 0x593E, 0x9AF2, 0x7AD2, 0x9AF3, 0x5955, + 0x9AF4, 0x5950, 0x9AF5, 0x594E, 0x9AF6, 0x595A, 0x9AF7, 0x5958, + 0x9AF8, 0x5962, 0x9AF9, 0x5960, 0x9AFA, 0x5967, 0x9AFB, 0x596C, + 0x9AFC, 0x5969, 0x9B40, 0x5978, 0x9B41, 0x5981, 0x9B42, 0x599D, + 0x9B43, 0x4F5E, 0x9B44, 0x4FAB, 0x9B45, 0x59A3, 0x9B46, 0x59B2, + 0x9B47, 0x59C6, 0x9B48, 0x59E8, 0x9B49, 0x59DC, 0x9B4A, 0x598D, + 0x9B4B, 0x59D9, 0x9B4C, 0x59DA, 0x9B4D, 0x5A25, 0x9B4E, 0x5A1F, + 0x9B4F, 0x5A11, 0x9B50, 0x5A1C, 0x9B51, 0x5A09, 0x9B52, 0x5A1A, + 0x9B53, 0x5A40, 0x9B54, 0x5A6C, 0x9B55, 0x5A49, 0x9B56, 0x5A35, + 0x9B57, 0x5A36, 0x9B58, 0x5A62, 0x9B59, 0x5A6A, 0x9B5A, 0x5A9A, + 0x9B5B, 0x5ABC, 0x9B5C, 0x5ABE, 0x9B5D, 0x5ACB, 0x9B5E, 0x5AC2, + 0x9B5F, 0x5ABD, 0x9B60, 0x5AE3, 0x9B61, 0x5AD7, 0x9B62, 0x5AE6, + 0x9B63, 0x5AE9, 0x9B64, 0x5AD6, 0x9B65, 0x5AFA, 0x9B66, 0x5AFB, + 0x9B67, 0x5B0C, 0x9B68, 0x5B0B, 0x9B69, 0x5B16, 0x9B6A, 0x5B32, + 0x9B6B, 0x5AD0, 0x9B6C, 0x5B2A, 0x9B6D, 0x5B36, 0x9B6E, 0x5B3E, + 0x9B6F, 0x5B43, 0x9B70, 0x5B45, 0x9B71, 0x5B40, 0x9B72, 0x5B51, + 0x9B73, 0x5B55, 0x9B74, 0x5B5A, 0x9B75, 0x5B5B, 0x9B76, 0x5B65, + 0x9B77, 0x5B69, 0x9B78, 0x5B70, 0x9B79, 0x5B73, 0x9B7A, 0x5B75, + 0x9B7B, 0x5B78, 0x9B7C, 0x6588, 0x9B7D, 0x5B7A, 0x9B7E, 0x5B80, + 0x9B80, 0x5B83, 0x9B81, 0x5BA6, 0x9B82, 0x5BB8, 0x9B83, 0x5BC3, + 0x9B84, 0x5BC7, 0x9B85, 0x5BC9, 0x9B86, 0x5BD4, 0x9B87, 0x5BD0, + 0x9B88, 0x5BE4, 0x9B89, 0x5BE6, 0x9B8A, 0x5BE2, 0x9B8B, 0x5BDE, + 0x9B8C, 0x5BE5, 0x9B8D, 0x5BEB, 0x9B8E, 0x5BF0, 0x9B8F, 0x5BF6, + 0x9B90, 0x5BF3, 0x9B91, 0x5C05, 0x9B92, 0x5C07, 0x9B93, 0x5C08, + 0x9B94, 0x5C0D, 0x9B95, 0x5C13, 0x9B96, 0x5C20, 0x9B97, 0x5C22, + 0x9B98, 0x5C28, 0x9B99, 0x5C38, 0x9B9A, 0x5C39, 0x9B9B, 0x5C41, + 0x9B9C, 0x5C46, 0x9B9D, 0x5C4E, 0x9B9E, 0x5C53, 0x9B9F, 0x5C50, + 0x9BA0, 0x5C4F, 0x9BA1, 0x5B71, 0x9BA2, 0x5C6C, 0x9BA3, 0x5C6E, + 0x9BA4, 0x4E62, 0x9BA5, 0x5C76, 0x9BA6, 0x5C79, 0x9BA7, 0x5C8C, + 0x9BA8, 0x5C91, 0x9BA9, 0x5C94, 0x9BAA, 0x599B, 0x9BAB, 0x5CAB, + 0x9BAC, 0x5CBB, 0x9BAD, 0x5CB6, 0x9BAE, 0x5CBC, 0x9BAF, 0x5CB7, + 0x9BB0, 0x5CC5, 0x9BB1, 0x5CBE, 0x9BB2, 0x5CC7, 0x9BB3, 0x5CD9, + 0x9BB4, 0x5CE9, 0x9BB5, 0x5CFD, 0x9BB6, 0x5CFA, 0x9BB7, 0x5CED, + 0x9BB8, 0x5D8C, 0x9BB9, 0x5CEA, 0x9BBA, 0x5D0B, 0x9BBB, 0x5D15, + 0x9BBC, 0x5D17, 0x9BBD, 0x5D5C, 0x9BBE, 0x5D1F, 0x9BBF, 0x5D1B, + 0x9BC0, 0x5D11, 0x9BC1, 0x5D14, 0x9BC2, 0x5D22, 0x9BC3, 0x5D1A, + 0x9BC4, 0x5D19, 0x9BC5, 0x5D18, 0x9BC6, 0x5D4C, 0x9BC7, 0x5D52, + 0x9BC8, 0x5D4E, 0x9BC9, 0x5D4B, 0x9BCA, 0x5D6C, 0x9BCB, 0x5D73, + 0x9BCC, 0x5D76, 0x9BCD, 0x5D87, 0x9BCE, 0x5D84, 0x9BCF, 0x5D82, + 0x9BD0, 0x5DA2, 0x9BD1, 0x5D9D, 0x9BD2, 0x5DAC, 0x9BD3, 0x5DAE, + 0x9BD4, 0x5DBD, 0x9BD5, 0x5D90, 0x9BD6, 0x5DB7, 0x9BD7, 0x5DBC, + 0x9BD8, 0x5DC9, 0x9BD9, 0x5DCD, 0x9BDA, 0x5DD3, 0x9BDB, 0x5DD2, + 0x9BDC, 0x5DD6, 0x9BDD, 0x5DDB, 0x9BDE, 0x5DEB, 0x9BDF, 0x5DF2, + 0x9BE0, 0x5DF5, 0x9BE1, 0x5E0B, 0x9BE2, 0x5E1A, 0x9BE3, 0x5E19, + 0x9BE4, 0x5E11, 0x9BE5, 0x5E1B, 0x9BE6, 0x5E36, 0x9BE7, 0x5E37, + 0x9BE8, 0x5E44, 0x9BE9, 0x5E43, 0x9BEA, 0x5E40, 0x9BEB, 0x5E4E, + 0x9BEC, 0x5E57, 0x9BED, 0x5E54, 0x9BEE, 0x5E5F, 0x9BEF, 0x5E62, + 0x9BF0, 0x5E64, 0x9BF1, 0x5E47, 0x9BF2, 0x5E75, 0x9BF3, 0x5E76, + 0x9BF4, 0x5E7A, 0x9BF5, 0x9EBC, 0x9BF6, 0x5E7F, 0x9BF7, 0x5EA0, + 0x9BF8, 0x5EC1, 0x9BF9, 0x5EC2, 0x9BFA, 0x5EC8, 0x9BFB, 0x5ED0, + 0x9BFC, 0x5ECF, 0x9C40, 0x5ED6, 0x9C41, 0x5EE3, 0x9C42, 0x5EDD, + 0x9C43, 0x5EDA, 0x9C44, 0x5EDB, 0x9C45, 0x5EE2, 0x9C46, 0x5EE1, + 0x9C47, 0x5EE8, 0x9C48, 0x5EE9, 0x9C49, 0x5EEC, 0x9C4A, 0x5EF1, + 0x9C4B, 0x5EF3, 0x9C4C, 0x5EF0, 0x9C4D, 0x5EF4, 0x9C4E, 0x5EF8, + 0x9C4F, 0x5EFE, 0x9C50, 0x5F03, 0x9C51, 0x5F09, 0x9C52, 0x5F5D, + 0x9C53, 0x5F5C, 0x9C54, 0x5F0B, 0x9C55, 0x5F11, 0x9C56, 0x5F16, + 0x9C57, 0x5F29, 0x9C58, 0x5F2D, 0x9C59, 0x5F38, 0x9C5A, 0x5F41, + 0x9C5B, 0x5F48, 0x9C5C, 0x5F4C, 0x9C5D, 0x5F4E, 0x9C5E, 0x5F2F, + 0x9C5F, 0x5F51, 0x9C60, 0x5F56, 0x9C61, 0x5F57, 0x9C62, 0x5F59, + 0x9C63, 0x5F61, 0x9C64, 0x5F6D, 0x9C65, 0x5F73, 0x9C66, 0x5F77, + 0x9C67, 0x5F83, 0x9C68, 0x5F82, 0x9C69, 0x5F7F, 0x9C6A, 0x5F8A, + 0x9C6B, 0x5F88, 0x9C6C, 0x5F91, 0x9C6D, 0x5F87, 0x9C6E, 0x5F9E, + 0x9C6F, 0x5F99, 0x9C70, 0x5F98, 0x9C71, 0x5FA0, 0x9C72, 0x5FA8, + 0x9C73, 0x5FAD, 0x9C74, 0x5FBC, 0x9C75, 0x5FD6, 0x9C76, 0x5FFB, + 0x9C77, 0x5FE4, 0x9C78, 0x5FF8, 0x9C79, 0x5FF1, 0x9C7A, 0x5FDD, + 0x9C7B, 0x60B3, 0x9C7C, 0x5FFF, 0x9C7D, 0x6021, 0x9C7E, 0x6060, + 0x9C80, 0x6019, 0x9C81, 0x6010, 0x9C82, 0x6029, 0x9C83, 0x600E, + 0x9C84, 0x6031, 0x9C85, 0x601B, 0x9C86, 0x6015, 0x9C87, 0x602B, + 0x9C88, 0x6026, 0x9C89, 0x600F, 0x9C8A, 0x603A, 0x9C8B, 0x605A, + 0x9C8C, 0x6041, 0x9C8D, 0x606A, 0x9C8E, 0x6077, 0x9C8F, 0x605F, + 0x9C90, 0x604A, 0x9C91, 0x6046, 0x9C92, 0x604D, 0x9C93, 0x6063, + 0x9C94, 0x6043, 0x9C95, 0x6064, 0x9C96, 0x6042, 0x9C97, 0x606C, + 0x9C98, 0x606B, 0x9C99, 0x6059, 0x9C9A, 0x6081, 0x9C9B, 0x608D, + 0x9C9C, 0x60E7, 0x9C9D, 0x6083, 0x9C9E, 0x609A, 0x9C9F, 0x6084, + 0x9CA0, 0x609B, 0x9CA1, 0x6096, 0x9CA2, 0x6097, 0x9CA3, 0x6092, + 0x9CA4, 0x60A7, 0x9CA5, 0x608B, 0x9CA6, 0x60E1, 0x9CA7, 0x60B8, + 0x9CA8, 0x60E0, 0x9CA9, 0x60D3, 0x9CAA, 0x60B4, 0x9CAB, 0x5FF0, + 0x9CAC, 0x60BD, 0x9CAD, 0x60C6, 0x9CAE, 0x60B5, 0x9CAF, 0x60D8, + 0x9CB0, 0x614D, 0x9CB1, 0x6115, 0x9CB2, 0x6106, 0x9CB3, 0x60F6, + 0x9CB4, 0x60F7, 0x9CB5, 0x6100, 0x9CB6, 0x60F4, 0x9CB7, 0x60FA, + 0x9CB8, 0x6103, 0x9CB9, 0x6121, 0x9CBA, 0x60FB, 0x9CBB, 0x60F1, + 0x9CBC, 0x610D, 0x9CBD, 0x610E, 0x9CBE, 0x6147, 0x9CBF, 0x613E, + 0x9CC0, 0x6128, 0x9CC1, 0x6127, 0x9CC2, 0x614A, 0x9CC3, 0x613F, + 0x9CC4, 0x613C, 0x9CC5, 0x612C, 0x9CC6, 0x6134, 0x9CC7, 0x613D, + 0x9CC8, 0x6142, 0x9CC9, 0x6144, 0x9CCA, 0x6173, 0x9CCB, 0x6177, + 0x9CCC, 0x6158, 0x9CCD, 0x6159, 0x9CCE, 0x615A, 0x9CCF, 0x616B, + 0x9CD0, 0x6174, 0x9CD1, 0x616F, 0x9CD2, 0x6165, 0x9CD3, 0x6171, + 0x9CD4, 0x615F, 0x9CD5, 0x615D, 0x9CD6, 0x6153, 0x9CD7, 0x6175, + 0x9CD8, 0x6199, 0x9CD9, 0x6196, 0x9CDA, 0x6187, 0x9CDB, 0x61AC, + 0x9CDC, 0x6194, 0x9CDD, 0x619A, 0x9CDE, 0x618A, 0x9CDF, 0x6191, + 0x9CE0, 0x61AB, 0x9CE1, 0x61AE, 0x9CE2, 0x61CC, 0x9CE3, 0x61CA, + 0x9CE4, 0x61C9, 0x9CE5, 0x61F7, 0x9CE6, 0x61C8, 0x9CE7, 0x61C3, + 0x9CE8, 0x61C6, 0x9CE9, 0x61BA, 0x9CEA, 0x61CB, 0x9CEB, 0x7F79, + 0x9CEC, 0x61CD, 0x9CED, 0x61E6, 0x9CEE, 0x61E3, 0x9CEF, 0x61F6, + 0x9CF0, 0x61FA, 0x9CF1, 0x61F4, 0x9CF2, 0x61FF, 0x9CF3, 0x61FD, + 0x9CF4, 0x61FC, 0x9CF5, 0x61FE, 0x9CF6, 0x6200, 0x9CF7, 0x6208, + 0x9CF8, 0x6209, 0x9CF9, 0x620D, 0x9CFA, 0x620C, 0x9CFB, 0x6214, + 0x9CFC, 0x621B, 0x9D40, 0x621E, 0x9D41, 0x6221, 0x9D42, 0x622A, + 0x9D43, 0x622E, 0x9D44, 0x6230, 0x9D45, 0x6232, 0x9D46, 0x6233, + 0x9D47, 0x6241, 0x9D48, 0x624E, 0x9D49, 0x625E, 0x9D4A, 0x6263, + 0x9D4B, 0x625B, 0x9D4C, 0x6260, 0x9D4D, 0x6268, 0x9D4E, 0x627C, + 0x9D4F, 0x6282, 0x9D50, 0x6289, 0x9D51, 0x627E, 0x9D52, 0x6292, + 0x9D53, 0x6293, 0x9D54, 0x6296, 0x9D55, 0x62D4, 0x9D56, 0x6283, + 0x9D57, 0x6294, 0x9D58, 0x62D7, 0x9D59, 0x62D1, 0x9D5A, 0x62BB, + 0x9D5B, 0x62CF, 0x9D5C, 0x62FF, 0x9D5D, 0x62C6, 0x9D5E, 0x64D4, + 0x9D5F, 0x62C8, 0x9D60, 0x62DC, 0x9D61, 0x62CC, 0x9D62, 0x62CA, + 0x9D63, 0x62C2, 0x9D64, 0x62C7, 0x9D65, 0x629B, 0x9D66, 0x62C9, + 0x9D67, 0x630C, 0x9D68, 0x62EE, 0x9D69, 0x62F1, 0x9D6A, 0x6327, + 0x9D6B, 0x6302, 0x9D6C, 0x6308, 0x9D6D, 0x62EF, 0x9D6E, 0x62F5, + 0x9D6F, 0x6350, 0x9D70, 0x633E, 0x9D71, 0x634D, 0x9D72, 0x641C, + 0x9D73, 0x634F, 0x9D74, 0x6396, 0x9D75, 0x638E, 0x9D76, 0x6380, + 0x9D77, 0x63AB, 0x9D78, 0x6376, 0x9D79, 0x63A3, 0x9D7A, 0x638F, + 0x9D7B, 0x6389, 0x9D7C, 0x639F, 0x9D7D, 0x63B5, 0x9D7E, 0x636B, + 0x9D80, 0x6369, 0x9D81, 0x63BE, 0x9D82, 0x63E9, 0x9D83, 0x63C0, + 0x9D84, 0x63C6, 0x9D85, 0x63E3, 0x9D86, 0x63C9, 0x9D87, 0x63D2, + 0x9D88, 0x63F6, 0x9D89, 0x63C4, 0x9D8A, 0x6416, 0x9D8B, 0x6434, + 0x9D8C, 0x6406, 0x9D8D, 0x6413, 0x9D8E, 0x6426, 0x9D8F, 0x6436, + 0x9D90, 0x651D, 0x9D91, 0x6417, 0x9D92, 0x6428, 0x9D93, 0x640F, + 0x9D94, 0x6467, 0x9D95, 0x646F, 0x9D96, 0x6476, 0x9D97, 0x644E, + 0x9D98, 0x652A, 0x9D99, 0x6495, 0x9D9A, 0x6493, 0x9D9B, 0x64A5, + 0x9D9C, 0x64A9, 0x9D9D, 0x6488, 0x9D9E, 0x64BC, 0x9D9F, 0x64DA, + 0x9DA0, 0x64D2, 0x9DA1, 0x64C5, 0x9DA2, 0x64C7, 0x9DA3, 0x64BB, + 0x9DA4, 0x64D8, 0x9DA5, 0x64C2, 0x9DA6, 0x64F1, 0x9DA7, 0x64E7, + 0x9DA8, 0x8209, 0x9DA9, 0x64E0, 0x9DAA, 0x64E1, 0x9DAB, 0x62AC, + 0x9DAC, 0x64E3, 0x9DAD, 0x64EF, 0x9DAE, 0x652C, 0x9DAF, 0x64F6, + 0x9DB0, 0x64F4, 0x9DB1, 0x64F2, 0x9DB2, 0x64FA, 0x9DB3, 0x6500, + 0x9DB4, 0x64FD, 0x9DB5, 0x6518, 0x9DB6, 0x651C, 0x9DB7, 0x6505, + 0x9DB8, 0x6524, 0x9DB9, 0x6523, 0x9DBA, 0x652B, 0x9DBB, 0x6534, + 0x9DBC, 0x6535, 0x9DBD, 0x6537, 0x9DBE, 0x6536, 0x9DBF, 0x6538, + 0x9DC0, 0x754B, 0x9DC1, 0x6548, 0x9DC2, 0x6556, 0x9DC3, 0x6555, + 0x9DC4, 0x654D, 0x9DC5, 0x6558, 0x9DC6, 0x655E, 0x9DC7, 0x655D, + 0x9DC8, 0x6572, 0x9DC9, 0x6578, 0x9DCA, 0x6582, 0x9DCB, 0x6583, + 0x9DCC, 0x8B8A, 0x9DCD, 0x659B, 0x9DCE, 0x659F, 0x9DCF, 0x65AB, + 0x9DD0, 0x65B7, 0x9DD1, 0x65C3, 0x9DD2, 0x65C6, 0x9DD3, 0x65C1, + 0x9DD4, 0x65C4, 0x9DD5, 0x65CC, 0x9DD6, 0x65D2, 0x9DD7, 0x65DB, + 0x9DD8, 0x65D9, 0x9DD9, 0x65E0, 0x9DDA, 0x65E1, 0x9DDB, 0x65F1, + 0x9DDC, 0x6772, 0x9DDD, 0x660A, 0x9DDE, 0x6603, 0x9DDF, 0x65FB, + 0x9DE0, 0x6773, 0x9DE1, 0x6635, 0x9DE2, 0x6636, 0x9DE3, 0x6634, + 0x9DE4, 0x661C, 0x9DE5, 0x664F, 0x9DE6, 0x6644, 0x9DE7, 0x6649, + 0x9DE8, 0x6641, 0x9DE9, 0x665E, 0x9DEA, 0x665D, 0x9DEB, 0x6664, + 0x9DEC, 0x6667, 0x9DED, 0x6668, 0x9DEE, 0x665F, 0x9DEF, 0x6662, + 0x9DF0, 0x6670, 0x9DF1, 0x6683, 0x9DF2, 0x6688, 0x9DF3, 0x668E, + 0x9DF4, 0x6689, 0x9DF5, 0x6684, 0x9DF6, 0x6698, 0x9DF7, 0x669D, + 0x9DF8, 0x66C1, 0x9DF9, 0x66B9, 0x9DFA, 0x66C9, 0x9DFB, 0x66BE, + 0x9DFC, 0x66BC, 0x9E40, 0x66C4, 0x9E41, 0x66B8, 0x9E42, 0x66D6, + 0x9E43, 0x66DA, 0x9E44, 0x66E0, 0x9E45, 0x663F, 0x9E46, 0x66E6, + 0x9E47, 0x66E9, 0x9E48, 0x66F0, 0x9E49, 0x66F5, 0x9E4A, 0x66F7, + 0x9E4B, 0x670F, 0x9E4C, 0x6716, 0x9E4D, 0x671E, 0x9E4E, 0x6726, + 0x9E4F, 0x6727, 0x9E50, 0x9738, 0x9E51, 0x672E, 0x9E52, 0x673F, + 0x9E53, 0x6736, 0x9E54, 0x6741, 0x9E55, 0x6738, 0x9E56, 0x6737, + 0x9E57, 0x6746, 0x9E58, 0x675E, 0x9E59, 0x6760, 0x9E5A, 0x6759, + 0x9E5B, 0x6763, 0x9E5C, 0x6764, 0x9E5D, 0x6789, 0x9E5E, 0x6770, + 0x9E5F, 0x67A9, 0x9E60, 0x677C, 0x9E61, 0x676A, 0x9E62, 0x678C, + 0x9E63, 0x678B, 0x9E64, 0x67A6, 0x9E65, 0x67A1, 0x9E66, 0x6785, + 0x9E67, 0x67B7, 0x9E68, 0x67EF, 0x9E69, 0x67B4, 0x9E6A, 0x67EC, + 0x9E6B, 0x67B3, 0x9E6C, 0x67E9, 0x9E6D, 0x67B8, 0x9E6E, 0x67E4, + 0x9E6F, 0x67DE, 0x9E70, 0x67DD, 0x9E71, 0x67E2, 0x9E72, 0x67EE, + 0x9E73, 0x67B9, 0x9E74, 0x67CE, 0x9E75, 0x67C6, 0x9E76, 0x67E7, + 0x9E77, 0x6A9C, 0x9E78, 0x681E, 0x9E79, 0x6846, 0x9E7A, 0x6829, + 0x9E7B, 0x6840, 0x9E7C, 0x684D, 0x9E7D, 0x6832, 0x9E7E, 0x684E, + 0x9E80, 0x68B3, 0x9E81, 0x682B, 0x9E82, 0x6859, 0x9E83, 0x6863, + 0x9E84, 0x6877, 0x9E85, 0x687F, 0x9E86, 0x689F, 0x9E87, 0x688F, + 0x9E88, 0x68AD, 0x9E89, 0x6894, 0x9E8A, 0x689D, 0x9E8B, 0x689B, + 0x9E8C, 0x6883, 0x9E8D, 0x6AAE, 0x9E8E, 0x68B9, 0x9E8F, 0x6874, + 0x9E90, 0x68B5, 0x9E91, 0x68A0, 0x9E92, 0x68BA, 0x9E93, 0x690F, + 0x9E94, 0x688D, 0x9E95, 0x687E, 0x9E96, 0x6901, 0x9E97, 0x68CA, + 0x9E98, 0x6908, 0x9E99, 0x68D8, 0x9E9A, 0x6922, 0x9E9B, 0x6926, + 0x9E9C, 0x68E1, 0x9E9D, 0x690C, 0x9E9E, 0x68CD, 0x9E9F, 0x68D4, + 0x9EA0, 0x68E7, 0x9EA1, 0x68D5, 0x9EA2, 0x6936, 0x9EA3, 0x6912, + 0x9EA4, 0x6904, 0x9EA5, 0x68D7, 0x9EA6, 0x68E3, 0x9EA7, 0x6925, + 0x9EA8, 0x68F9, 0x9EA9, 0x68E0, 0x9EAA, 0x68EF, 0x9EAB, 0x6928, + 0x9EAC, 0x692A, 0x9EAD, 0x691A, 0x9EAE, 0x6923, 0x9EAF, 0x6921, + 0x9EB0, 0x68C6, 0x9EB1, 0x6979, 0x9EB2, 0x6977, 0x9EB3, 0x695C, + 0x9EB4, 0x6978, 0x9EB5, 0x696B, 0x9EB6, 0x6954, 0x9EB7, 0x697E, + 0x9EB8, 0x696E, 0x9EB9, 0x6939, 0x9EBA, 0x6974, 0x9EBB, 0x693D, + 0x9EBC, 0x6959, 0x9EBD, 0x6930, 0x9EBE, 0x6961, 0x9EBF, 0x695E, + 0x9EC0, 0x695D, 0x9EC1, 0x6981, 0x9EC2, 0x696A, 0x9EC3, 0x69B2, + 0x9EC4, 0x69AE, 0x9EC5, 0x69D0, 0x9EC6, 0x69BF, 0x9EC7, 0x69C1, + 0x9EC8, 0x69D3, 0x9EC9, 0x69BE, 0x9ECA, 0x69CE, 0x9ECB, 0x5BE8, + 0x9ECC, 0x69CA, 0x9ECD, 0x69DD, 0x9ECE, 0x69BB, 0x9ECF, 0x69C3, + 0x9ED0, 0x69A7, 0x9ED1, 0x6A2E, 0x9ED2, 0x6991, 0x9ED3, 0x69A0, + 0x9ED4, 0x699C, 0x9ED5, 0x6995, 0x9ED6, 0x69B4, 0x9ED7, 0x69DE, + 0x9ED8, 0x69E8, 0x9ED9, 0x6A02, 0x9EDA, 0x6A1B, 0x9EDB, 0x69FF, + 0x9EDC, 0x6B0A, 0x9EDD, 0x69F9, 0x9EDE, 0x69F2, 0x9EDF, 0x69E7, + 0x9EE0, 0x6A05, 0x9EE1, 0x69B1, 0x9EE2, 0x6A1E, 0x9EE3, 0x69ED, + 0x9EE4, 0x6A14, 0x9EE5, 0x69EB, 0x9EE6, 0x6A0A, 0x9EE7, 0x6A12, + 0x9EE8, 0x6AC1, 0x9EE9, 0x6A23, 0x9EEA, 0x6A13, 0x9EEB, 0x6A44, + 0x9EEC, 0x6A0C, 0x9EED, 0x6A72, 0x9EEE, 0x6A36, 0x9EEF, 0x6A78, + 0x9EF0, 0x6A47, 0x9EF1, 0x6A62, 0x9EF2, 0x6A59, 0x9EF3, 0x6A66, + 0x9EF4, 0x6A48, 0x9EF5, 0x6A38, 0x9EF6, 0x6A22, 0x9EF7, 0x6A90, + 0x9EF8, 0x6A8D, 0x9EF9, 0x6AA0, 0x9EFA, 0x6A84, 0x9EFB, 0x6AA2, + 0x9EFC, 0x6AA3, 0x9F40, 0x6A97, 0x9F41, 0x8617, 0x9F42, 0x6ABB, + 0x9F43, 0x6AC3, 0x9F44, 0x6AC2, 0x9F45, 0x6AB8, 0x9F46, 0x6AB3, + 0x9F47, 0x6AAC, 0x9F48, 0x6ADE, 0x9F49, 0x6AD1, 0x9F4A, 0x6ADF, + 0x9F4B, 0x6AAA, 0x9F4C, 0x6ADA, 0x9F4D, 0x6AEA, 0x9F4E, 0x6AFB, + 0x9F4F, 0x6B05, 0x9F50, 0x8616, 0x9F51, 0x6AFA, 0x9F52, 0x6B12, + 0x9F53, 0x6B16, 0x9F54, 0x9B31, 0x9F55, 0x6B1F, 0x9F56, 0x6B38, + 0x9F57, 0x6B37, 0x9F58, 0x76DC, 0x9F59, 0x6B39, 0x9F5A, 0x98EE, + 0x9F5B, 0x6B47, 0x9F5C, 0x6B43, 0x9F5D, 0x6B49, 0x9F5E, 0x6B50, + 0x9F5F, 0x6B59, 0x9F60, 0x6B54, 0x9F61, 0x6B5B, 0x9F62, 0x6B5F, + 0x9F63, 0x6B61, 0x9F64, 0x6B78, 0x9F65, 0x6B79, 0x9F66, 0x6B7F, + 0x9F67, 0x6B80, 0x9F68, 0x6B84, 0x9F69, 0x6B83, 0x9F6A, 0x6B8D, + 0x9F6B, 0x6B98, 0x9F6C, 0x6B95, 0x9F6D, 0x6B9E, 0x9F6E, 0x6BA4, + 0x9F6F, 0x6BAA, 0x9F70, 0x6BAB, 0x9F71, 0x6BAF, 0x9F72, 0x6BB2, + 0x9F73, 0x6BB1, 0x9F74, 0x6BB3, 0x9F75, 0x6BB7, 0x9F76, 0x6BBC, + 0x9F77, 0x6BC6, 0x9F78, 0x6BCB, 0x9F79, 0x6BD3, 0x9F7A, 0x6BDF, + 0x9F7B, 0x6BEC, 0x9F7C, 0x6BEB, 0x9F7D, 0x6BF3, 0x9F7E, 0x6BEF, + 0x9F80, 0x9EBE, 0x9F81, 0x6C08, 0x9F82, 0x6C13, 0x9F83, 0x6C14, + 0x9F84, 0x6C1B, 0x9F85, 0x6C24, 0x9F86, 0x6C23, 0x9F87, 0x6C5E, + 0x9F88, 0x6C55, 0x9F89, 0x6C62, 0x9F8A, 0x6C6A, 0x9F8B, 0x6C82, + 0x9F8C, 0x6C8D, 0x9F8D, 0x6C9A, 0x9F8E, 0x6C81, 0x9F8F, 0x6C9B, + 0x9F90, 0x6C7E, 0x9F91, 0x6C68, 0x9F92, 0x6C73, 0x9F93, 0x6C92, + 0x9F94, 0x6C90, 0x9F95, 0x6CC4, 0x9F96, 0x6CF1, 0x9F97, 0x6CD3, + 0x9F98, 0x6CBD, 0x9F99, 0x6CD7, 0x9F9A, 0x6CC5, 0x9F9B, 0x6CDD, + 0x9F9C, 0x6CAE, 0x9F9D, 0x6CB1, 0x9F9E, 0x6CBE, 0x9F9F, 0x6CBA, + 0x9FA0, 0x6CDB, 0x9FA1, 0x6CEF, 0x9FA2, 0x6CD9, 0x9FA3, 0x6CEA, + 0x9FA4, 0x6D1F, 0x9FA5, 0x884D, 0x9FA6, 0x6D36, 0x9FA7, 0x6D2B, + 0x9FA8, 0x6D3D, 0x9FA9, 0x6D38, 0x9FAA, 0x6D19, 0x9FAB, 0x6D35, + 0x9FAC, 0x6D33, 0x9FAD, 0x6D12, 0x9FAE, 0x6D0C, 0x9FAF, 0x6D63, + 0x9FB0, 0x6D93, 0x9FB1, 0x6D64, 0x9FB2, 0x6D5A, 0x9FB3, 0x6D79, + 0x9FB4, 0x6D59, 0x9FB5, 0x6D8E, 0x9FB6, 0x6D95, 0x9FB7, 0x6FE4, + 0x9FB8, 0x6D85, 0x9FB9, 0x6DF9, 0x9FBA, 0x6E15, 0x9FBB, 0x6E0A, + 0x9FBC, 0x6DB5, 0x9FBD, 0x6DC7, 0x9FBE, 0x6DE6, 0x9FBF, 0x6DB8, + 0x9FC0, 0x6DC6, 0x9FC1, 0x6DEC, 0x9FC2, 0x6DDE, 0x9FC3, 0x6DCC, + 0x9FC4, 0x6DE8, 0x9FC5, 0x6DD2, 0x9FC6, 0x6DC5, 0x9FC7, 0x6DFA, + 0x9FC8, 0x6DD9, 0x9FC9, 0x6DE4, 0x9FCA, 0x6DD5, 0x9FCB, 0x6DEA, + 0x9FCC, 0x6DEE, 0x9FCD, 0x6E2D, 0x9FCE, 0x6E6E, 0x9FCF, 0x6E2E, + 0x9FD0, 0x6E19, 0x9FD1, 0x6E72, 0x9FD2, 0x6E5F, 0x9FD3, 0x6E3E, + 0x9FD4, 0x6E23, 0x9FD5, 0x6E6B, 0x9FD6, 0x6E2B, 0x9FD7, 0x6E76, + 0x9FD8, 0x6E4D, 0x9FD9, 0x6E1F, 0x9FDA, 0x6E43, 0x9FDB, 0x6E3A, + 0x9FDC, 0x6E4E, 0x9FDD, 0x6E24, 0x9FDE, 0x6EFF, 0x9FDF, 0x6E1D, + 0x9FE0, 0x6E38, 0x9FE1, 0x6E82, 0x9FE2, 0x6EAA, 0x9FE3, 0x6E98, + 0x9FE4, 0x6EC9, 0x9FE5, 0x6EB7, 0x9FE6, 0x6ED3, 0x9FE7, 0x6EBD, + 0x9FE8, 0x6EAF, 0x9FE9, 0x6EC4, 0x9FEA, 0x6EB2, 0x9FEB, 0x6ED4, + 0x9FEC, 0x6ED5, 0x9FED, 0x6E8F, 0x9FEE, 0x6EA5, 0x9FEF, 0x6EC2, + 0x9FF0, 0x6E9F, 0x9FF1, 0x6F41, 0x9FF2, 0x6F11, 0x9FF3, 0x704C, + 0x9FF4, 0x6EEC, 0x9FF5, 0x6EF8, 0x9FF6, 0x6EFE, 0x9FF7, 0x6F3F, + 0x9FF8, 0x6EF2, 0x9FF9, 0x6F31, 0x9FFA, 0x6EEF, 0x9FFB, 0x6F32, + 0x9FFC, 0x6ECC, 0xE040, 0x6F3E, 0xE041, 0x6F13, 0xE042, 0x6EF7, + 0xE043, 0x6F86, 0xE044, 0x6F7A, 0xE045, 0x6F78, 0xE046, 0x6F81, + 0xE047, 0x6F80, 0xE048, 0x6F6F, 0xE049, 0x6F5B, 0xE04A, 0x6FF3, + 0xE04B, 0x6F6D, 0xE04C, 0x6F82, 0xE04D, 0x6F7C, 0xE04E, 0x6F58, + 0xE04F, 0x6F8E, 0xE050, 0x6F91, 0xE051, 0x6FC2, 0xE052, 0x6F66, + 0xE053, 0x6FB3, 0xE054, 0x6FA3, 0xE055, 0x6FA1, 0xE056, 0x6FA4, + 0xE057, 0x6FB9, 0xE058, 0x6FC6, 0xE059, 0x6FAA, 0xE05A, 0x6FDF, + 0xE05B, 0x6FD5, 0xE05C, 0x6FEC, 0xE05D, 0x6FD4, 0xE05E, 0x6FD8, + 0xE05F, 0x6FF1, 0xE060, 0x6FEE, 0xE061, 0x6FDB, 0xE062, 0x7009, + 0xE063, 0x700B, 0xE064, 0x6FFA, 0xE065, 0x7011, 0xE066, 0x7001, + 0xE067, 0x700F, 0xE068, 0x6FFE, 0xE069, 0x701B, 0xE06A, 0x701A, + 0xE06B, 0x6F74, 0xE06C, 0x701D, 0xE06D, 0x7018, 0xE06E, 0x701F, + 0xE06F, 0x7030, 0xE070, 0x703E, 0xE071, 0x7032, 0xE072, 0x7051, + 0xE073, 0x7063, 0xE074, 0x7099, 0xE075, 0x7092, 0xE076, 0x70AF, + 0xE077, 0x70F1, 0xE078, 0x70AC, 0xE079, 0x70B8, 0xE07A, 0x70B3, + 0xE07B, 0x70AE, 0xE07C, 0x70DF, 0xE07D, 0x70CB, 0xE07E, 0x70DD, + 0xE080, 0x70D9, 0xE081, 0x7109, 0xE082, 0x70FD, 0xE083, 0x711C, + 0xE084, 0x7119, 0xE085, 0x7165, 0xE086, 0x7155, 0xE087, 0x7188, + 0xE088, 0x7166, 0xE089, 0x7162, 0xE08A, 0x714C, 0xE08B, 0x7156, + 0xE08C, 0x716C, 0xE08D, 0x718F, 0xE08E, 0x71FB, 0xE08F, 0x7184, + 0xE090, 0x7195, 0xE091, 0x71A8, 0xE092, 0x71AC, 0xE093, 0x71D7, + 0xE094, 0x71B9, 0xE095, 0x71BE, 0xE096, 0x71D2, 0xE097, 0x71C9, + 0xE098, 0x71D4, 0xE099, 0x71CE, 0xE09A, 0x71E0, 0xE09B, 0x71EC, + 0xE09C, 0x71E7, 0xE09D, 0x71F5, 0xE09E, 0x71FC, 0xE09F, 0x71F9, + 0xE0A0, 0x71FF, 0xE0A1, 0x720D, 0xE0A2, 0x7210, 0xE0A3, 0x721B, + 0xE0A4, 0x7228, 0xE0A5, 0x722D, 0xE0A6, 0x722C, 0xE0A7, 0x7230, + 0xE0A8, 0x7232, 0xE0A9, 0x723B, 0xE0AA, 0x723C, 0xE0AB, 0x723F, + 0xE0AC, 0x7240, 0xE0AD, 0x7246, 0xE0AE, 0x724B, 0xE0AF, 0x7258, + 0xE0B0, 0x7274, 0xE0B1, 0x727E, 0xE0B2, 0x7282, 0xE0B3, 0x7281, + 0xE0B4, 0x7287, 0xE0B5, 0x7292, 0xE0B6, 0x7296, 0xE0B7, 0x72A2, + 0xE0B8, 0x72A7, 0xE0B9, 0x72B9, 0xE0BA, 0x72B2, 0xE0BB, 0x72C3, + 0xE0BC, 0x72C6, 0xE0BD, 0x72C4, 0xE0BE, 0x72CE, 0xE0BF, 0x72D2, + 0xE0C0, 0x72E2, 0xE0C1, 0x72E0, 0xE0C2, 0x72E1, 0xE0C3, 0x72F9, + 0xE0C4, 0x72F7, 0xE0C5, 0x500F, 0xE0C6, 0x7317, 0xE0C7, 0x730A, + 0xE0C8, 0x731C, 0xE0C9, 0x7316, 0xE0CA, 0x731D, 0xE0CB, 0x7334, + 0xE0CC, 0x732F, 0xE0CD, 0x7329, 0xE0CE, 0x7325, 0xE0CF, 0x733E, + 0xE0D0, 0x734E, 0xE0D1, 0x734F, 0xE0D2, 0x9ED8, 0xE0D3, 0x7357, + 0xE0D4, 0x736A, 0xE0D5, 0x7368, 0xE0D6, 0x7370, 0xE0D7, 0x7378, + 0xE0D8, 0x7375, 0xE0D9, 0x737B, 0xE0DA, 0x737A, 0xE0DB, 0x73C8, + 0xE0DC, 0x73B3, 0xE0DD, 0x73CE, 0xE0DE, 0x73BB, 0xE0DF, 0x73C0, + 0xE0E0, 0x73E5, 0xE0E1, 0x73EE, 0xE0E2, 0x73DE, 0xE0E3, 0x74A2, + 0xE0E4, 0x7405, 0xE0E5, 0x746F, 0xE0E6, 0x7425, 0xE0E7, 0x73F8, + 0xE0E8, 0x7432, 0xE0E9, 0x743A, 0xE0EA, 0x7455, 0xE0EB, 0x743F, + 0xE0EC, 0x745F, 0xE0ED, 0x7459, 0xE0EE, 0x7441, 0xE0EF, 0x745C, + 0xE0F0, 0x7469, 0xE0F1, 0x7470, 0xE0F2, 0x7463, 0xE0F3, 0x746A, + 0xE0F4, 0x7476, 0xE0F5, 0x747E, 0xE0F6, 0x748B, 0xE0F7, 0x749E, + 0xE0F8, 0x74A7, 0xE0F9, 0x74CA, 0xE0FA, 0x74CF, 0xE0FB, 0x74D4, + 0xE0FC, 0x73F1, 0xE140, 0x74E0, 0xE141, 0x74E3, 0xE142, 0x74E7, + 0xE143, 0x74E9, 0xE144, 0x74EE, 0xE145, 0x74F2, 0xE146, 0x74F0, + 0xE147, 0x74F1, 0xE148, 0x74F8, 0xE149, 0x74F7, 0xE14A, 0x7504, + 0xE14B, 0x7503, 0xE14C, 0x7505, 0xE14D, 0x750C, 0xE14E, 0x750E, + 0xE14F, 0x750D, 0xE150, 0x7515, 0xE151, 0x7513, 0xE152, 0x751E, + 0xE153, 0x7526, 0xE154, 0x752C, 0xE155, 0x753C, 0xE156, 0x7544, + 0xE157, 0x754D, 0xE158, 0x754A, 0xE159, 0x7549, 0xE15A, 0x755B, + 0xE15B, 0x7546, 0xE15C, 0x755A, 0xE15D, 0x7569, 0xE15E, 0x7564, + 0xE15F, 0x7567, 0xE160, 0x756B, 0xE161, 0x756D, 0xE162, 0x7578, + 0xE163, 0x7576, 0xE164, 0x7586, 0xE165, 0x7587, 0xE166, 0x7574, + 0xE167, 0x758A, 0xE168, 0x7589, 0xE169, 0x7582, 0xE16A, 0x7594, + 0xE16B, 0x759A, 0xE16C, 0x759D, 0xE16D, 0x75A5, 0xE16E, 0x75A3, + 0xE16F, 0x75C2, 0xE170, 0x75B3, 0xE171, 0x75C3, 0xE172, 0x75B5, + 0xE173, 0x75BD, 0xE174, 0x75B8, 0xE175, 0x75BC, 0xE176, 0x75B1, + 0xE177, 0x75CD, 0xE178, 0x75CA, 0xE179, 0x75D2, 0xE17A, 0x75D9, + 0xE17B, 0x75E3, 0xE17C, 0x75DE, 0xE17D, 0x75FE, 0xE17E, 0x75FF, + 0xE180, 0x75FC, 0xE181, 0x7601, 0xE182, 0x75F0, 0xE183, 0x75FA, + 0xE184, 0x75F2, 0xE185, 0x75F3, 0xE186, 0x760B, 0xE187, 0x760D, + 0xE188, 0x7609, 0xE189, 0x761F, 0xE18A, 0x7627, 0xE18B, 0x7620, + 0xE18C, 0x7621, 0xE18D, 0x7622, 0xE18E, 0x7624, 0xE18F, 0x7634, + 0xE190, 0x7630, 0xE191, 0x763B, 0xE192, 0x7647, 0xE193, 0x7648, + 0xE194, 0x7646, 0xE195, 0x765C, 0xE196, 0x7658, 0xE197, 0x7661, + 0xE198, 0x7662, 0xE199, 0x7668, 0xE19A, 0x7669, 0xE19B, 0x766A, + 0xE19C, 0x7667, 0xE19D, 0x766C, 0xE19E, 0x7670, 0xE19F, 0x7672, + 0xE1A0, 0x7676, 0xE1A1, 0x7678, 0xE1A2, 0x767C, 0xE1A3, 0x7680, + 0xE1A4, 0x7683, 0xE1A5, 0x7688, 0xE1A6, 0x768B, 0xE1A7, 0x768E, + 0xE1A8, 0x7696, 0xE1A9, 0x7693, 0xE1AA, 0x7699, 0xE1AB, 0x769A, + 0xE1AC, 0x76B0, 0xE1AD, 0x76B4, 0xE1AE, 0x76B8, 0xE1AF, 0x76B9, + 0xE1B0, 0x76BA, 0xE1B1, 0x76C2, 0xE1B2, 0x76CD, 0xE1B3, 0x76D6, + 0xE1B4, 0x76D2, 0xE1B5, 0x76DE, 0xE1B6, 0x76E1, 0xE1B7, 0x76E5, + 0xE1B8, 0x76E7, 0xE1B9, 0x76EA, 0xE1BA, 0x862F, 0xE1BB, 0x76FB, + 0xE1BC, 0x7708, 0xE1BD, 0x7707, 0xE1BE, 0x7704, 0xE1BF, 0x7729, + 0xE1C0, 0x7724, 0xE1C1, 0x771E, 0xE1C2, 0x7725, 0xE1C3, 0x7726, + 0xE1C4, 0x771B, 0xE1C5, 0x7737, 0xE1C6, 0x7738, 0xE1C7, 0x7747, + 0xE1C8, 0x775A, 0xE1C9, 0x7768, 0xE1CA, 0x776B, 0xE1CB, 0x775B, + 0xE1CC, 0x7765, 0xE1CD, 0x777F, 0xE1CE, 0x777E, 0xE1CF, 0x7779, + 0xE1D0, 0x778E, 0xE1D1, 0x778B, 0xE1D2, 0x7791, 0xE1D3, 0x77A0, + 0xE1D4, 0x779E, 0xE1D5, 0x77B0, 0xE1D6, 0x77B6, 0xE1D7, 0x77B9, + 0xE1D8, 0x77BF, 0xE1D9, 0x77BC, 0xE1DA, 0x77BD, 0xE1DB, 0x77BB, + 0xE1DC, 0x77C7, 0xE1DD, 0x77CD, 0xE1DE, 0x77D7, 0xE1DF, 0x77DA, + 0xE1E0, 0x77DC, 0xE1E1, 0x77E3, 0xE1E2, 0x77EE, 0xE1E3, 0x77FC, + 0xE1E4, 0x780C, 0xE1E5, 0x7812, 0xE1E6, 0x7926, 0xE1E7, 0x7820, + 0xE1E8, 0x792A, 0xE1E9, 0x7845, 0xE1EA, 0x788E, 0xE1EB, 0x7874, + 0xE1EC, 0x7886, 0xE1ED, 0x787C, 0xE1EE, 0x789A, 0xE1EF, 0x788C, + 0xE1F0, 0x78A3, 0xE1F1, 0x78B5, 0xE1F2, 0x78AA, 0xE1F3, 0x78AF, + 0xE1F4, 0x78D1, 0xE1F5, 0x78C6, 0xE1F6, 0x78CB, 0xE1F7, 0x78D4, + 0xE1F8, 0x78BE, 0xE1F9, 0x78BC, 0xE1FA, 0x78C5, 0xE1FB, 0x78CA, + 0xE1FC, 0x78EC, 0xE240, 0x78E7, 0xE241, 0x78DA, 0xE242, 0x78FD, + 0xE243, 0x78F4, 0xE244, 0x7907, 0xE245, 0x7912, 0xE246, 0x7911, + 0xE247, 0x7919, 0xE248, 0x792C, 0xE249, 0x792B, 0xE24A, 0x7940, + 0xE24B, 0x7960, 0xE24C, 0x7957, 0xE24D, 0x795F, 0xE24E, 0x795A, + 0xE24F, 0x7955, 0xE250, 0x7953, 0xE251, 0x797A, 0xE252, 0x797F, + 0xE253, 0x798A, 0xE254, 0x799D, 0xE255, 0x79A7, 0xE256, 0x9F4B, + 0xE257, 0x79AA, 0xE258, 0x79AE, 0xE259, 0x79B3, 0xE25A, 0x79B9, + 0xE25B, 0x79BA, 0xE25C, 0x79C9, 0xE25D, 0x79D5, 0xE25E, 0x79E7, + 0xE25F, 0x79EC, 0xE260, 0x79E1, 0xE261, 0x79E3, 0xE262, 0x7A08, + 0xE263, 0x7A0D, 0xE264, 0x7A18, 0xE265, 0x7A19, 0xE266, 0x7A20, + 0xE267, 0x7A1F, 0xE268, 0x7980, 0xE269, 0x7A31, 0xE26A, 0x7A3B, + 0xE26B, 0x7A3E, 0xE26C, 0x7A37, 0xE26D, 0x7A43, 0xE26E, 0x7A57, + 0xE26F, 0x7A49, 0xE270, 0x7A61, 0xE271, 0x7A62, 0xE272, 0x7A69, + 0xE273, 0x9F9D, 0xE274, 0x7A70, 0xE275, 0x7A79, 0xE276, 0x7A7D, + 0xE277, 0x7A88, 0xE278, 0x7A97, 0xE279, 0x7A95, 0xE27A, 0x7A98, + 0xE27B, 0x7A96, 0xE27C, 0x7AA9, 0xE27D, 0x7AC8, 0xE27E, 0x7AB0, + 0xE280, 0x7AB6, 0xE281, 0x7AC5, 0xE282, 0x7AC4, 0xE283, 0x7ABF, + 0xE284, 0x9083, 0xE285, 0x7AC7, 0xE286, 0x7ACA, 0xE287, 0x7ACD, + 0xE288, 0x7ACF, 0xE289, 0x7AD5, 0xE28A, 0x7AD3, 0xE28B, 0x7AD9, + 0xE28C, 0x7ADA, 0xE28D, 0x7ADD, 0xE28E, 0x7AE1, 0xE28F, 0x7AE2, + 0xE290, 0x7AE6, 0xE291, 0x7AED, 0xE292, 0x7AF0, 0xE293, 0x7B02, + 0xE294, 0x7B0F, 0xE295, 0x7B0A, 0xE296, 0x7B06, 0xE297, 0x7B33, + 0xE298, 0x7B18, 0xE299, 0x7B19, 0xE29A, 0x7B1E, 0xE29B, 0x7B35, + 0xE29C, 0x7B28, 0xE29D, 0x7B36, 0xE29E, 0x7B50, 0xE29F, 0x7B7A, + 0xE2A0, 0x7B04, 0xE2A1, 0x7B4D, 0xE2A2, 0x7B0B, 0xE2A3, 0x7B4C, + 0xE2A4, 0x7B45, 0xE2A5, 0x7B75, 0xE2A6, 0x7B65, 0xE2A7, 0x7B74, + 0xE2A8, 0x7B67, 0xE2A9, 0x7B70, 0xE2AA, 0x7B71, 0xE2AB, 0x7B6C, + 0xE2AC, 0x7B6E, 0xE2AD, 0x7B9D, 0xE2AE, 0x7B98, 0xE2AF, 0x7B9F, + 0xE2B0, 0x7B8D, 0xE2B1, 0x7B9C, 0xE2B2, 0x7B9A, 0xE2B3, 0x7B8B, + 0xE2B4, 0x7B92, 0xE2B5, 0x7B8F, 0xE2B6, 0x7B5D, 0xE2B7, 0x7B99, + 0xE2B8, 0x7BCB, 0xE2B9, 0x7BC1, 0xE2BA, 0x7BCC, 0xE2BB, 0x7BCF, + 0xE2BC, 0x7BB4, 0xE2BD, 0x7BC6, 0xE2BE, 0x7BDD, 0xE2BF, 0x7BE9, + 0xE2C0, 0x7C11, 0xE2C1, 0x7C14, 0xE2C2, 0x7BE6, 0xE2C3, 0x7BE5, + 0xE2C4, 0x7C60, 0xE2C5, 0x7C00, 0xE2C6, 0x7C07, 0xE2C7, 0x7C13, + 0xE2C8, 0x7BF3, 0xE2C9, 0x7BF7, 0xE2CA, 0x7C17, 0xE2CB, 0x7C0D, + 0xE2CC, 0x7BF6, 0xE2CD, 0x7C23, 0xE2CE, 0x7C27, 0xE2CF, 0x7C2A, + 0xE2D0, 0x7C1F, 0xE2D1, 0x7C37, 0xE2D2, 0x7C2B, 0xE2D3, 0x7C3D, + 0xE2D4, 0x7C4C, 0xE2D5, 0x7C43, 0xE2D6, 0x7C54, 0xE2D7, 0x7C4F, + 0xE2D8, 0x7C40, 0xE2D9, 0x7C50, 0xE2DA, 0x7C58, 0xE2DB, 0x7C5F, + 0xE2DC, 0x7C64, 0xE2DD, 0x7C56, 0xE2DE, 0x7C65, 0xE2DF, 0x7C6C, + 0xE2E0, 0x7C75, 0xE2E1, 0x7C83, 0xE2E2, 0x7C90, 0xE2E3, 0x7CA4, + 0xE2E4, 0x7CAD, 0xE2E5, 0x7CA2, 0xE2E6, 0x7CAB, 0xE2E7, 0x7CA1, + 0xE2E8, 0x7CA8, 0xE2E9, 0x7CB3, 0xE2EA, 0x7CB2, 0xE2EB, 0x7CB1, + 0xE2EC, 0x7CAE, 0xE2ED, 0x7CB9, 0xE2EE, 0x7CBD, 0xE2EF, 0x7CC0, + 0xE2F0, 0x7CC5, 0xE2F1, 0x7CC2, 0xE2F2, 0x7CD8, 0xE2F3, 0x7CD2, + 0xE2F4, 0x7CDC, 0xE2F5, 0x7CE2, 0xE2F6, 0x9B3B, 0xE2F7, 0x7CEF, + 0xE2F8, 0x7CF2, 0xE2F9, 0x7CF4, 0xE2FA, 0x7CF6, 0xE2FB, 0x7CFA, + 0xE2FC, 0x7D06, 0xE340, 0x7D02, 0xE341, 0x7D1C, 0xE342, 0x7D15, + 0xE343, 0x7D0A, 0xE344, 0x7D45, 0xE345, 0x7D4B, 0xE346, 0x7D2E, + 0xE347, 0x7D32, 0xE348, 0x7D3F, 0xE349, 0x7D35, 0xE34A, 0x7D46, + 0xE34B, 0x7D73, 0xE34C, 0x7D56, 0xE34D, 0x7D4E, 0xE34E, 0x7D72, + 0xE34F, 0x7D68, 0xE350, 0x7D6E, 0xE351, 0x7D4F, 0xE352, 0x7D63, + 0xE353, 0x7D93, 0xE354, 0x7D89, 0xE355, 0x7D5B, 0xE356, 0x7D8F, + 0xE357, 0x7D7D, 0xE358, 0x7D9B, 0xE359, 0x7DBA, 0xE35A, 0x7DAE, + 0xE35B, 0x7DA3, 0xE35C, 0x7DB5, 0xE35D, 0x7DC7, 0xE35E, 0x7DBD, + 0xE35F, 0x7DAB, 0xE360, 0x7E3D, 0xE361, 0x7DA2, 0xE362, 0x7DAF, + 0xE363, 0x7DDC, 0xE364, 0x7DB8, 0xE365, 0x7D9F, 0xE366, 0x7DB0, + 0xE367, 0x7DD8, 0xE368, 0x7DDD, 0xE369, 0x7DE4, 0xE36A, 0x7DDE, + 0xE36B, 0x7DFB, 0xE36C, 0x7DF2, 0xE36D, 0x7DE1, 0xE36E, 0x7E05, + 0xE36F, 0x7E0A, 0xE370, 0x7E23, 0xE371, 0x7E21, 0xE372, 0x7E12, + 0xE373, 0x7E31, 0xE374, 0x7E1F, 0xE375, 0x7E09, 0xE376, 0x7E0B, + 0xE377, 0x7E22, 0xE378, 0x7E46, 0xE379, 0x7E66, 0xE37A, 0x7E3B, + 0xE37B, 0x7E35, 0xE37C, 0x7E39, 0xE37D, 0x7E43, 0xE37E, 0x7E37, + 0xE380, 0x7E32, 0xE381, 0x7E3A, 0xE382, 0x7E67, 0xE383, 0x7E5D, + 0xE384, 0x7E56, 0xE385, 0x7E5E, 0xE386, 0x7E59, 0xE387, 0x7E5A, + 0xE388, 0x7E79, 0xE389, 0x7E6A, 0xE38A, 0x7E69, 0xE38B, 0x7E7C, + 0xE38C, 0x7E7B, 0xE38D, 0x7E83, 0xE38E, 0x7DD5, 0xE38F, 0x7E7D, + 0xE390, 0x8FAE, 0xE391, 0x7E7F, 0xE392, 0x7E88, 0xE393, 0x7E89, + 0xE394, 0x7E8C, 0xE395, 0x7E92, 0xE396, 0x7E90, 0xE397, 0x7E93, + 0xE398, 0x7E94, 0xE399, 0x7E96, 0xE39A, 0x7E8E, 0xE39B, 0x7E9B, + 0xE39C, 0x7E9C, 0xE39D, 0x7F38, 0xE39E, 0x7F3A, 0xE39F, 0x7F45, + 0xE3A0, 0x7F4C, 0xE3A1, 0x7F4D, 0xE3A2, 0x7F4E, 0xE3A3, 0x7F50, + 0xE3A4, 0x7F51, 0xE3A5, 0x7F55, 0xE3A6, 0x7F54, 0xE3A7, 0x7F58, + 0xE3A8, 0x7F5F, 0xE3A9, 0x7F60, 0xE3AA, 0x7F68, 0xE3AB, 0x7F69, + 0xE3AC, 0x7F67, 0xE3AD, 0x7F78, 0xE3AE, 0x7F82, 0xE3AF, 0x7F86, + 0xE3B0, 0x7F83, 0xE3B1, 0x7F88, 0xE3B2, 0x7F87, 0xE3B3, 0x7F8C, + 0xE3B4, 0x7F94, 0xE3B5, 0x7F9E, 0xE3B6, 0x7F9D, 0xE3B7, 0x7F9A, + 0xE3B8, 0x7FA3, 0xE3B9, 0x7FAF, 0xE3BA, 0x7FB2, 0xE3BB, 0x7FB9, + 0xE3BC, 0x7FAE, 0xE3BD, 0x7FB6, 0xE3BE, 0x7FB8, 0xE3BF, 0x8B71, + 0xE3C0, 0x7FC5, 0xE3C1, 0x7FC6, 0xE3C2, 0x7FCA, 0xE3C3, 0x7FD5, + 0xE3C4, 0x7FD4, 0xE3C5, 0x7FE1, 0xE3C6, 0x7FE6, 0xE3C7, 0x7FE9, + 0xE3C8, 0x7FF3, 0xE3C9, 0x7FF9, 0xE3CA, 0x98DC, 0xE3CB, 0x8006, + 0xE3CC, 0x8004, 0xE3CD, 0x800B, 0xE3CE, 0x8012, 0xE3CF, 0x8018, + 0xE3D0, 0x8019, 0xE3D1, 0x801C, 0xE3D2, 0x8021, 0xE3D3, 0x8028, + 0xE3D4, 0x803F, 0xE3D5, 0x803B, 0xE3D6, 0x804A, 0xE3D7, 0x8046, + 0xE3D8, 0x8052, 0xE3D9, 0x8058, 0xE3DA, 0x805A, 0xE3DB, 0x805F, + 0xE3DC, 0x8062, 0xE3DD, 0x8068, 0xE3DE, 0x8073, 0xE3DF, 0x8072, + 0xE3E0, 0x8070, 0xE3E1, 0x8076, 0xE3E2, 0x8079, 0xE3E3, 0x807D, + 0xE3E4, 0x807F, 0xE3E5, 0x8084, 0xE3E6, 0x8086, 0xE3E7, 0x8085, + 0xE3E8, 0x809B, 0xE3E9, 0x8093, 0xE3EA, 0x809A, 0xE3EB, 0x80AD, + 0xE3EC, 0x5190, 0xE3ED, 0x80AC, 0xE3EE, 0x80DB, 0xE3EF, 0x80E5, + 0xE3F0, 0x80D9, 0xE3F1, 0x80DD, 0xE3F2, 0x80C4, 0xE3F3, 0x80DA, + 0xE3F4, 0x80D6, 0xE3F5, 0x8109, 0xE3F6, 0x80EF, 0xE3F7, 0x80F1, + 0xE3F8, 0x811B, 0xE3F9, 0x8129, 0xE3FA, 0x8123, 0xE3FB, 0x812F, + 0xE3FC, 0x814B, 0xE440, 0x968B, 0xE441, 0x8146, 0xE442, 0x813E, + 0xE443, 0x8153, 0xE444, 0x8151, 0xE445, 0x80FC, 0xE446, 0x8171, + 0xE447, 0x816E, 0xE448, 0x8165, 0xE449, 0x8166, 0xE44A, 0x8174, + 0xE44B, 0x8183, 0xE44C, 0x8188, 0xE44D, 0x818A, 0xE44E, 0x8180, + 0xE44F, 0x8182, 0xE450, 0x81A0, 0xE451, 0x8195, 0xE452, 0x81A4, + 0xE453, 0x81A3, 0xE454, 0x815F, 0xE455, 0x8193, 0xE456, 0x81A9, + 0xE457, 0x81B0, 0xE458, 0x81B5, 0xE459, 0x81BE, 0xE45A, 0x81B8, + 0xE45B, 0x81BD, 0xE45C, 0x81C0, 0xE45D, 0x81C2, 0xE45E, 0x81BA, + 0xE45F, 0x81C9, 0xE460, 0x81CD, 0xE461, 0x81D1, 0xE462, 0x81D9, + 0xE463, 0x81D8, 0xE464, 0x81C8, 0xE465, 0x81DA, 0xE466, 0x81DF, + 0xE467, 0x81E0, 0xE468, 0x81E7, 0xE469, 0x81FA, 0xE46A, 0x81FB, + 0xE46B, 0x81FE, 0xE46C, 0x8201, 0xE46D, 0x8202, 0xE46E, 0x8205, + 0xE46F, 0x8207, 0xE470, 0x820A, 0xE471, 0x820D, 0xE472, 0x8210, + 0xE473, 0x8216, 0xE474, 0x8229, 0xE475, 0x822B, 0xE476, 0x8238, + 0xE477, 0x8233, 0xE478, 0x8240, 0xE479, 0x8259, 0xE47A, 0x8258, + 0xE47B, 0x825D, 0xE47C, 0x825A, 0xE47D, 0x825F, 0xE47E, 0x8264, + 0xE480, 0x8262, 0xE481, 0x8268, 0xE482, 0x826A, 0xE483, 0x826B, + 0xE484, 0x822E, 0xE485, 0x8271, 0xE486, 0x8277, 0xE487, 0x8278, + 0xE488, 0x827E, 0xE489, 0x828D, 0xE48A, 0x8292, 0xE48B, 0x82AB, + 0xE48C, 0x829F, 0xE48D, 0x82BB, 0xE48E, 0x82AC, 0xE48F, 0x82E1, + 0xE490, 0x82E3, 0xE491, 0x82DF, 0xE492, 0x82D2, 0xE493, 0x82F4, + 0xE494, 0x82F3, 0xE495, 0x82FA, 0xE496, 0x8393, 0xE497, 0x8303, + 0xE498, 0x82FB, 0xE499, 0x82F9, 0xE49A, 0x82DE, 0xE49B, 0x8306, + 0xE49C, 0x82DC, 0xE49D, 0x8309, 0xE49E, 0x82D9, 0xE49F, 0x8335, + 0xE4A0, 0x8334, 0xE4A1, 0x8316, 0xE4A2, 0x8332, 0xE4A3, 0x8331, + 0xE4A4, 0x8340, 0xE4A5, 0x8339, 0xE4A6, 0x8350, 0xE4A7, 0x8345, + 0xE4A8, 0x832F, 0xE4A9, 0x832B, 0xE4AA, 0x8317, 0xE4AB, 0x8318, + 0xE4AC, 0x8385, 0xE4AD, 0x839A, 0xE4AE, 0x83AA, 0xE4AF, 0x839F, + 0xE4B0, 0x83A2, 0xE4B1, 0x8396, 0xE4B2, 0x8323, 0xE4B3, 0x838E, + 0xE4B4, 0x8387, 0xE4B5, 0x838A, 0xE4B6, 0x837C, 0xE4B7, 0x83B5, + 0xE4B8, 0x8373, 0xE4B9, 0x8375, 0xE4BA, 0x83A0, 0xE4BB, 0x8389, + 0xE4BC, 0x83A8, 0xE4BD, 0x83F4, 0xE4BE, 0x8413, 0xE4BF, 0x83EB, + 0xE4C0, 0x83CE, 0xE4C1, 0x83FD, 0xE4C2, 0x8403, 0xE4C3, 0x83D8, + 0xE4C4, 0x840B, 0xE4C5, 0x83C1, 0xE4C6, 0x83F7, 0xE4C7, 0x8407, + 0xE4C8, 0x83E0, 0xE4C9, 0x83F2, 0xE4CA, 0x840D, 0xE4CB, 0x8422, + 0xE4CC, 0x8420, 0xE4CD, 0x83BD, 0xE4CE, 0x8438, 0xE4CF, 0x8506, + 0xE4D0, 0x83FB, 0xE4D1, 0x846D, 0xE4D2, 0x842A, 0xE4D3, 0x843C, + 0xE4D4, 0x855A, 0xE4D5, 0x8484, 0xE4D6, 0x8477, 0xE4D7, 0x846B, + 0xE4D8, 0x84AD, 0xE4D9, 0x846E, 0xE4DA, 0x8482, 0xE4DB, 0x8469, + 0xE4DC, 0x8446, 0xE4DD, 0x842C, 0xE4DE, 0x846F, 0xE4DF, 0x8479, + 0xE4E0, 0x8435, 0xE4E1, 0x84CA, 0xE4E2, 0x8462, 0xE4E3, 0x84B9, + 0xE4E4, 0x84BF, 0xE4E5, 0x849F, 0xE4E6, 0x84D9, 0xE4E7, 0x84CD, + 0xE4E8, 0x84BB, 0xE4E9, 0x84DA, 0xE4EA, 0x84D0, 0xE4EB, 0x84C1, + 0xE4EC, 0x84C6, 0xE4ED, 0x84D6, 0xE4EE, 0x84A1, 0xE4EF, 0x8521, + 0xE4F0, 0x84FF, 0xE4F1, 0x84F4, 0xE4F2, 0x8517, 0xE4F3, 0x8518, + 0xE4F4, 0x852C, 0xE4F5, 0x851F, 0xE4F6, 0x8515, 0xE4F7, 0x8514, + 0xE4F8, 0x84FC, 0xE4F9, 0x8540, 0xE4FA, 0x8563, 0xE4FB, 0x8558, + 0xE4FC, 0x8548, 0xE540, 0x8541, 0xE541, 0x8602, 0xE542, 0x854B, + 0xE543, 0x8555, 0xE544, 0x8580, 0xE545, 0x85A4, 0xE546, 0x8588, + 0xE547, 0x8591, 0xE548, 0x858A, 0xE549, 0x85A8, 0xE54A, 0x856D, + 0xE54B, 0x8594, 0xE54C, 0x859B, 0xE54D, 0x85EA, 0xE54E, 0x8587, + 0xE54F, 0x859C, 0xE550, 0x8577, 0xE551, 0x857E, 0xE552, 0x8590, + 0xE553, 0x85C9, 0xE554, 0x85BA, 0xE555, 0x85CF, 0xE556, 0x85B9, + 0xE557, 0x85D0, 0xE558, 0x85D5, 0xE559, 0x85DD, 0xE55A, 0x85E5, + 0xE55B, 0x85DC, 0xE55C, 0x85F9, 0xE55D, 0x860A, 0xE55E, 0x8613, + 0xE55F, 0x860B, 0xE560, 0x85FE, 0xE561, 0x85FA, 0xE562, 0x8606, + 0xE563, 0x8622, 0xE564, 0x861A, 0xE565, 0x8630, 0xE566, 0x863F, + 0xE567, 0x864D, 0xE568, 0x4E55, 0xE569, 0x8654, 0xE56A, 0x865F, + 0xE56B, 0x8667, 0xE56C, 0x8671, 0xE56D, 0x8693, 0xE56E, 0x86A3, + 0xE56F, 0x86A9, 0xE570, 0x86AA, 0xE571, 0x868B, 0xE572, 0x868C, + 0xE573, 0x86B6, 0xE574, 0x86AF, 0xE575, 0x86C4, 0xE576, 0x86C6, + 0xE577, 0x86B0, 0xE578, 0x86C9, 0xE579, 0x8823, 0xE57A, 0x86AB, + 0xE57B, 0x86D4, 0xE57C, 0x86DE, 0xE57D, 0x86E9, 0xE57E, 0x86EC, + 0xE580, 0x86DF, 0xE581, 0x86DB, 0xE582, 0x86EF, 0xE583, 0x8712, + 0xE584, 0x8706, 0xE585, 0x8708, 0xE586, 0x8700, 0xE587, 0x8703, + 0xE588, 0x86FB, 0xE589, 0x8711, 0xE58A, 0x8709, 0xE58B, 0x870D, + 0xE58C, 0x86F9, 0xE58D, 0x870A, 0xE58E, 0x8734, 0xE58F, 0x873F, + 0xE590, 0x8737, 0xE591, 0x873B, 0xE592, 0x8725, 0xE593, 0x8729, + 0xE594, 0x871A, 0xE595, 0x8760, 0xE596, 0x875F, 0xE597, 0x8778, + 0xE598, 0x874C, 0xE599, 0x874E, 0xE59A, 0x8774, 0xE59B, 0x8757, + 0xE59C, 0x8768, 0xE59D, 0x876E, 0xE59E, 0x8759, 0xE59F, 0x8753, + 0xE5A0, 0x8763, 0xE5A1, 0x876A, 0xE5A2, 0x8805, 0xE5A3, 0x87A2, + 0xE5A4, 0x879F, 0xE5A5, 0x8782, 0xE5A6, 0x87AF, 0xE5A7, 0x87CB, + 0xE5A8, 0x87BD, 0xE5A9, 0x87C0, 0xE5AA, 0x87D0, 0xE5AB, 0x96D6, + 0xE5AC, 0x87AB, 0xE5AD, 0x87C4, 0xE5AE, 0x87B3, 0xE5AF, 0x87C7, + 0xE5B0, 0x87C6, 0xE5B1, 0x87BB, 0xE5B2, 0x87EF, 0xE5B3, 0x87F2, + 0xE5B4, 0x87E0, 0xE5B5, 0x880F, 0xE5B6, 0x880D, 0xE5B7, 0x87FE, + 0xE5B8, 0x87F6, 0xE5B9, 0x87F7, 0xE5BA, 0x880E, 0xE5BB, 0x87D2, + 0xE5BC, 0x8811, 0xE5BD, 0x8816, 0xE5BE, 0x8815, 0xE5BF, 0x8822, + 0xE5C0, 0x8821, 0xE5C1, 0x8831, 0xE5C2, 0x8836, 0xE5C3, 0x8839, + 0xE5C4, 0x8827, 0xE5C5, 0x883B, 0xE5C6, 0x8844, 0xE5C7, 0x8842, + 0xE5C8, 0x8852, 0xE5C9, 0x8859, 0xE5CA, 0x885E, 0xE5CB, 0x8862, + 0xE5CC, 0x886B, 0xE5CD, 0x8881, 0xE5CE, 0x887E, 0xE5CF, 0x889E, + 0xE5D0, 0x8875, 0xE5D1, 0x887D, 0xE5D2, 0x88B5, 0xE5D3, 0x8872, + 0xE5D4, 0x8882, 0xE5D5, 0x8897, 0xE5D6, 0x8892, 0xE5D7, 0x88AE, + 0xE5D8, 0x8899, 0xE5D9, 0x88A2, 0xE5DA, 0x888D, 0xE5DB, 0x88A4, + 0xE5DC, 0x88B0, 0xE5DD, 0x88BF, 0xE5DE, 0x88B1, 0xE5DF, 0x88C3, + 0xE5E0, 0x88C4, 0xE5E1, 0x88D4, 0xE5E2, 0x88D8, 0xE5E3, 0x88D9, + 0xE5E4, 0x88DD, 0xE5E5, 0x88F9, 0xE5E6, 0x8902, 0xE5E7, 0x88FC, + 0xE5E8, 0x88F4, 0xE5E9, 0x88E8, 0xE5EA, 0x88F2, 0xE5EB, 0x8904, + 0xE5EC, 0x890C, 0xE5ED, 0x890A, 0xE5EE, 0x8913, 0xE5EF, 0x8943, + 0xE5F0, 0x891E, 0xE5F1, 0x8925, 0xE5F2, 0x892A, 0xE5F3, 0x892B, + 0xE5F4, 0x8941, 0xE5F5, 0x8944, 0xE5F6, 0x893B, 0xE5F7, 0x8936, + 0xE5F8, 0x8938, 0xE5F9, 0x894C, 0xE5FA, 0x891D, 0xE5FB, 0x8960, + 0xE5FC, 0x895E, 0xE640, 0x8966, 0xE641, 0x8964, 0xE642, 0x896D, + 0xE643, 0x896A, 0xE644, 0x896F, 0xE645, 0x8974, 0xE646, 0x8977, + 0xE647, 0x897E, 0xE648, 0x8983, 0xE649, 0x8988, 0xE64A, 0x898A, + 0xE64B, 0x8993, 0xE64C, 0x8998, 0xE64D, 0x89A1, 0xE64E, 0x89A9, + 0xE64F, 0x89A6, 0xE650, 0x89AC, 0xE651, 0x89AF, 0xE652, 0x89B2, + 0xE653, 0x89BA, 0xE654, 0x89BD, 0xE655, 0x89BF, 0xE656, 0x89C0, + 0xE657, 0x89DA, 0xE658, 0x89DC, 0xE659, 0x89DD, 0xE65A, 0x89E7, + 0xE65B, 0x89F4, 0xE65C, 0x89F8, 0xE65D, 0x8A03, 0xE65E, 0x8A16, + 0xE65F, 0x8A10, 0xE660, 0x8A0C, 0xE661, 0x8A1B, 0xE662, 0x8A1D, + 0xE663, 0x8A25, 0xE664, 0x8A36, 0xE665, 0x8A41, 0xE666, 0x8A5B, + 0xE667, 0x8A52, 0xE668, 0x8A46, 0xE669, 0x8A48, 0xE66A, 0x8A7C, + 0xE66B, 0x8A6D, 0xE66C, 0x8A6C, 0xE66D, 0x8A62, 0xE66E, 0x8A85, + 0xE66F, 0x8A82, 0xE670, 0x8A84, 0xE671, 0x8AA8, 0xE672, 0x8AA1, + 0xE673, 0x8A91, 0xE674, 0x8AA5, 0xE675, 0x8AA6, 0xE676, 0x8A9A, + 0xE677, 0x8AA3, 0xE678, 0x8AC4, 0xE679, 0x8ACD, 0xE67A, 0x8AC2, + 0xE67B, 0x8ADA, 0xE67C, 0x8AEB, 0xE67D, 0x8AF3, 0xE67E, 0x8AE7, + 0xE680, 0x8AE4, 0xE681, 0x8AF1, 0xE682, 0x8B14, 0xE683, 0x8AE0, + 0xE684, 0x8AE2, 0xE685, 0x8AF7, 0xE686, 0x8ADE, 0xE687, 0x8ADB, + 0xE688, 0x8B0C, 0xE689, 0x8B07, 0xE68A, 0x8B1A, 0xE68B, 0x8AE1, + 0xE68C, 0x8B16, 0xE68D, 0x8B10, 0xE68E, 0x8B17, 0xE68F, 0x8B20, + 0xE690, 0x8B33, 0xE691, 0x97AB, 0xE692, 0x8B26, 0xE693, 0x8B2B, + 0xE694, 0x8B3E, 0xE695, 0x8B28, 0xE696, 0x8B41, 0xE697, 0x8B4C, + 0xE698, 0x8B4F, 0xE699, 0x8B4E, 0xE69A, 0x8B49, 0xE69B, 0x8B56, + 0xE69C, 0x8B5B, 0xE69D, 0x8B5A, 0xE69E, 0x8B6B, 0xE69F, 0x8B5F, + 0xE6A0, 0x8B6C, 0xE6A1, 0x8B6F, 0xE6A2, 0x8B74, 0xE6A3, 0x8B7D, + 0xE6A4, 0x8B80, 0xE6A5, 0x8B8C, 0xE6A6, 0x8B8E, 0xE6A7, 0x8B92, + 0xE6A8, 0x8B93, 0xE6A9, 0x8B96, 0xE6AA, 0x8B99, 0xE6AB, 0x8B9A, + 0xE6AC, 0x8C3A, 0xE6AD, 0x8C41, 0xE6AE, 0x8C3F, 0xE6AF, 0x8C48, + 0xE6B0, 0x8C4C, 0xE6B1, 0x8C4E, 0xE6B2, 0x8C50, 0xE6B3, 0x8C55, + 0xE6B4, 0x8C62, 0xE6B5, 0x8C6C, 0xE6B6, 0x8C78, 0xE6B7, 0x8C7A, + 0xE6B8, 0x8C82, 0xE6B9, 0x8C89, 0xE6BA, 0x8C85, 0xE6BB, 0x8C8A, + 0xE6BC, 0x8C8D, 0xE6BD, 0x8C8E, 0xE6BE, 0x8C94, 0xE6BF, 0x8C7C, + 0xE6C0, 0x8C98, 0xE6C1, 0x621D, 0xE6C2, 0x8CAD, 0xE6C3, 0x8CAA, + 0xE6C4, 0x8CBD, 0xE6C5, 0x8CB2, 0xE6C6, 0x8CB3, 0xE6C7, 0x8CAE, + 0xE6C8, 0x8CB6, 0xE6C9, 0x8CC8, 0xE6CA, 0x8CC1, 0xE6CB, 0x8CE4, + 0xE6CC, 0x8CE3, 0xE6CD, 0x8CDA, 0xE6CE, 0x8CFD, 0xE6CF, 0x8CFA, + 0xE6D0, 0x8CFB, 0xE6D1, 0x8D04, 0xE6D2, 0x8D05, 0xE6D3, 0x8D0A, + 0xE6D4, 0x8D07, 0xE6D5, 0x8D0F, 0xE6D6, 0x8D0D, 0xE6D7, 0x8D10, + 0xE6D8, 0x9F4E, 0xE6D9, 0x8D13, 0xE6DA, 0x8CCD, 0xE6DB, 0x8D14, + 0xE6DC, 0x8D16, 0xE6DD, 0x8D67, 0xE6DE, 0x8D6D, 0xE6DF, 0x8D71, + 0xE6E0, 0x8D73, 0xE6E1, 0x8D81, 0xE6E2, 0x8D99, 0xE6E3, 0x8DC2, + 0xE6E4, 0x8DBE, 0xE6E5, 0x8DBA, 0xE6E6, 0x8DCF, 0xE6E7, 0x8DDA, + 0xE6E8, 0x8DD6, 0xE6E9, 0x8DCC, 0xE6EA, 0x8DDB, 0xE6EB, 0x8DCB, + 0xE6EC, 0x8DEA, 0xE6ED, 0x8DEB, 0xE6EE, 0x8DDF, 0xE6EF, 0x8DE3, + 0xE6F0, 0x8DFC, 0xE6F1, 0x8E08, 0xE6F2, 0x8E09, 0xE6F3, 0x8DFF, + 0xE6F4, 0x8E1D, 0xE6F5, 0x8E1E, 0xE6F6, 0x8E10, 0xE6F7, 0x8E1F, + 0xE6F8, 0x8E42, 0xE6F9, 0x8E35, 0xE6FA, 0x8E30, 0xE6FB, 0x8E34, + 0xE6FC, 0x8E4A, 0xE740, 0x8E47, 0xE741, 0x8E49, 0xE742, 0x8E4C, + 0xE743, 0x8E50, 0xE744, 0x8E48, 0xE745, 0x8E59, 0xE746, 0x8E64, + 0xE747, 0x8E60, 0xE748, 0x8E2A, 0xE749, 0x8E63, 0xE74A, 0x8E55, + 0xE74B, 0x8E76, 0xE74C, 0x8E72, 0xE74D, 0x8E7C, 0xE74E, 0x8E81, + 0xE74F, 0x8E87, 0xE750, 0x8E85, 0xE751, 0x8E84, 0xE752, 0x8E8B, + 0xE753, 0x8E8A, 0xE754, 0x8E93, 0xE755, 0x8E91, 0xE756, 0x8E94, + 0xE757, 0x8E99, 0xE758, 0x8EAA, 0xE759, 0x8EA1, 0xE75A, 0x8EAC, + 0xE75B, 0x8EB0, 0xE75C, 0x8EC6, 0xE75D, 0x8EB1, 0xE75E, 0x8EBE, + 0xE75F, 0x8EC5, 0xE760, 0x8EC8, 0xE761, 0x8ECB, 0xE762, 0x8EDB, + 0xE763, 0x8EE3, 0xE764, 0x8EFC, 0xE765, 0x8EFB, 0xE766, 0x8EEB, + 0xE767, 0x8EFE, 0xE768, 0x8F0A, 0xE769, 0x8F05, 0xE76A, 0x8F15, + 0xE76B, 0x8F12, 0xE76C, 0x8F19, 0xE76D, 0x8F13, 0xE76E, 0x8F1C, + 0xE76F, 0x8F1F, 0xE770, 0x8F1B, 0xE771, 0x8F0C, 0xE772, 0x8F26, + 0xE773, 0x8F33, 0xE774, 0x8F3B, 0xE775, 0x8F39, 0xE776, 0x8F45, + 0xE777, 0x8F42, 0xE778, 0x8F3E, 0xE779, 0x8F4C, 0xE77A, 0x8F49, + 0xE77B, 0x8F46, 0xE77C, 0x8F4E, 0xE77D, 0x8F57, 0xE77E, 0x8F5C, + 0xE780, 0x8F62, 0xE781, 0x8F63, 0xE782, 0x8F64, 0xE783, 0x8F9C, + 0xE784, 0x8F9F, 0xE785, 0x8FA3, 0xE786, 0x8FAD, 0xE787, 0x8FAF, + 0xE788, 0x8FB7, 0xE789, 0x8FDA, 0xE78A, 0x8FE5, 0xE78B, 0x8FE2, + 0xE78C, 0x8FEA, 0xE78D, 0x8FEF, 0xE78E, 0x9087, 0xE78F, 0x8FF4, + 0xE790, 0x9005, 0xE791, 0x8FF9, 0xE792, 0x8FFA, 0xE793, 0x9011, + 0xE794, 0x9015, 0xE795, 0x9021, 0xE796, 0x900D, 0xE797, 0x901E, + 0xE798, 0x9016, 0xE799, 0x900B, 0xE79A, 0x9027, 0xE79B, 0x9036, + 0xE79C, 0x9035, 0xE79D, 0x9039, 0xE79E, 0x8FF8, 0xE79F, 0x904F, + 0xE7A0, 0x9050, 0xE7A1, 0x9051, 0xE7A2, 0x9052, 0xE7A3, 0x900E, + 0xE7A4, 0x9049, 0xE7A5, 0x903E, 0xE7A6, 0x9056, 0xE7A7, 0x9058, + 0xE7A8, 0x905E, 0xE7A9, 0x9068, 0xE7AA, 0x906F, 0xE7AB, 0x9076, + 0xE7AC, 0x96A8, 0xE7AD, 0x9072, 0xE7AE, 0x9082, 0xE7AF, 0x907D, + 0xE7B0, 0x9081, 0xE7B1, 0x9080, 0xE7B2, 0x908A, 0xE7B3, 0x9089, + 0xE7B4, 0x908F, 0xE7B5, 0x90A8, 0xE7B6, 0x90AF, 0xE7B7, 0x90B1, + 0xE7B8, 0x90B5, 0xE7B9, 0x90E2, 0xE7BA, 0x90E4, 0xE7BB, 0x6248, + 0xE7BC, 0x90DB, 0xE7BD, 0x9102, 0xE7BE, 0x9112, 0xE7BF, 0x9119, + 0xE7C0, 0x9132, 0xE7C1, 0x9130, 0xE7C2, 0x914A, 0xE7C3, 0x9156, + 0xE7C4, 0x9158, 0xE7C5, 0x9163, 0xE7C6, 0x9165, 0xE7C7, 0x9169, + 0xE7C8, 0x9173, 0xE7C9, 0x9172, 0xE7CA, 0x918B, 0xE7CB, 0x9189, + 0xE7CC, 0x9182, 0xE7CD, 0x91A2, 0xE7CE, 0x91AB, 0xE7CF, 0x91AF, + 0xE7D0, 0x91AA, 0xE7D1, 0x91B5, 0xE7D2, 0x91B4, 0xE7D3, 0x91BA, + 0xE7D4, 0x91C0, 0xE7D5, 0x91C1, 0xE7D6, 0x91C9, 0xE7D7, 0x91CB, + 0xE7D8, 0x91D0, 0xE7D9, 0x91D6, 0xE7DA, 0x91DF, 0xE7DB, 0x91E1, + 0xE7DC, 0x91DB, 0xE7DD, 0x91FC, 0xE7DE, 0x91F5, 0xE7DF, 0x91F6, + 0xE7E0, 0x921E, 0xE7E1, 0x91FF, 0xE7E2, 0x9214, 0xE7E3, 0x922C, + 0xE7E4, 0x9215, 0xE7E5, 0x9211, 0xE7E6, 0x925E, 0xE7E7, 0x9257, + 0xE7E8, 0x9245, 0xE7E9, 0x9249, 0xE7EA, 0x9264, 0xE7EB, 0x9248, + 0xE7EC, 0x9295, 0xE7ED, 0x923F, 0xE7EE, 0x924B, 0xE7EF, 0x9250, + 0xE7F0, 0x929C, 0xE7F1, 0x9296, 0xE7F2, 0x9293, 0xE7F3, 0x929B, + 0xE7F4, 0x925A, 0xE7F5, 0x92CF, 0xE7F6, 0x92B9, 0xE7F7, 0x92B7, + 0xE7F8, 0x92E9, 0xE7F9, 0x930F, 0xE7FA, 0x92FA, 0xE7FB, 0x9344, + 0xE7FC, 0x932E, 0xE840, 0x9319, 0xE841, 0x9322, 0xE842, 0x931A, + 0xE843, 0x9323, 0xE844, 0x933A, 0xE845, 0x9335, 0xE846, 0x933B, + 0xE847, 0x935C, 0xE848, 0x9360, 0xE849, 0x937C, 0xE84A, 0x936E, + 0xE84B, 0x9356, 0xE84C, 0x93B0, 0xE84D, 0x93AC, 0xE84E, 0x93AD, + 0xE84F, 0x9394, 0xE850, 0x93B9, 0xE851, 0x93D6, 0xE852, 0x93D7, + 0xE853, 0x93E8, 0xE854, 0x93E5, 0xE855, 0x93D8, 0xE856, 0x93C3, + 0xE857, 0x93DD, 0xE858, 0x93D0, 0xE859, 0x93C8, 0xE85A, 0x93E4, + 0xE85B, 0x941A, 0xE85C, 0x9414, 0xE85D, 0x9413, 0xE85E, 0x9403, + 0xE85F, 0x9407, 0xE860, 0x9410, 0xE861, 0x9436, 0xE862, 0x942B, + 0xE863, 0x9435, 0xE864, 0x9421, 0xE865, 0x943A, 0xE866, 0x9441, + 0xE867, 0x9452, 0xE868, 0x9444, 0xE869, 0x945B, 0xE86A, 0x9460, + 0xE86B, 0x9462, 0xE86C, 0x945E, 0xE86D, 0x946A, 0xE86E, 0x9229, + 0xE86F, 0x9470, 0xE870, 0x9475, 0xE871, 0x9477, 0xE872, 0x947D, + 0xE873, 0x945A, 0xE874, 0x947C, 0xE875, 0x947E, 0xE876, 0x9481, + 0xE877, 0x947F, 0xE878, 0x9582, 0xE879, 0x9587, 0xE87A, 0x958A, + 0xE87B, 0x9594, 0xE87C, 0x9596, 0xE87D, 0x9598, 0xE87E, 0x9599, + 0xE880, 0x95A0, 0xE881, 0x95A8, 0xE882, 0x95A7, 0xE883, 0x95AD, + 0xE884, 0x95BC, 0xE885, 0x95BB, 0xE886, 0x95B9, 0xE887, 0x95BE, + 0xE888, 0x95CA, 0xE889, 0x6FF6, 0xE88A, 0x95C3, 0xE88B, 0x95CD, + 0xE88C, 0x95CC, 0xE88D, 0x95D5, 0xE88E, 0x95D4, 0xE88F, 0x95D6, + 0xE890, 0x95DC, 0xE891, 0x95E1, 0xE892, 0x95E5, 0xE893, 0x95E2, + 0xE894, 0x9621, 0xE895, 0x9628, 0xE896, 0x962E, 0xE897, 0x962F, + 0xE898, 0x9642, 0xE899, 0x964C, 0xE89A, 0x964F, 0xE89B, 0x964B, + 0xE89C, 0x9677, 0xE89D, 0x965C, 0xE89E, 0x965E, 0xE89F, 0x965D, + 0xE8A0, 0x965F, 0xE8A1, 0x9666, 0xE8A2, 0x9672, 0xE8A3, 0x966C, + 0xE8A4, 0x968D, 0xE8A5, 0x9698, 0xE8A6, 0x9695, 0xE8A7, 0x9697, + 0xE8A8, 0x96AA, 0xE8A9, 0x96A7, 0xE8AA, 0x96B1, 0xE8AB, 0x96B2, + 0xE8AC, 0x96B0, 0xE8AD, 0x96B4, 0xE8AE, 0x96B6, 0xE8AF, 0x96B8, + 0xE8B0, 0x96B9, 0xE8B1, 0x96CE, 0xE8B2, 0x96CB, 0xE8B3, 0x96C9, + 0xE8B4, 0x96CD, 0xE8B5, 0x894D, 0xE8B6, 0x96DC, 0xE8B7, 0x970D, + 0xE8B8, 0x96D5, 0xE8B9, 0x96F9, 0xE8BA, 0x9704, 0xE8BB, 0x9706, + 0xE8BC, 0x9708, 0xE8BD, 0x9713, 0xE8BE, 0x970E, 0xE8BF, 0x9711, + 0xE8C0, 0x970F, 0xE8C1, 0x9716, 0xE8C2, 0x9719, 0xE8C3, 0x9724, + 0xE8C4, 0x972A, 0xE8C5, 0x9730, 0xE8C6, 0x9739, 0xE8C7, 0x973D, + 0xE8C8, 0x973E, 0xE8C9, 0x9744, 0xE8CA, 0x9746, 0xE8CB, 0x9748, + 0xE8CC, 0x9742, 0xE8CD, 0x9749, 0xE8CE, 0x975C, 0xE8CF, 0x9760, + 0xE8D0, 0x9764, 0xE8D1, 0x9766, 0xE8D2, 0x9768, 0xE8D3, 0x52D2, + 0xE8D4, 0x976B, 0xE8D5, 0x9771, 0xE8D6, 0x9779, 0xE8D7, 0x9785, + 0xE8D8, 0x977C, 0xE8D9, 0x9781, 0xE8DA, 0x977A, 0xE8DB, 0x9786, + 0xE8DC, 0x978B, 0xE8DD, 0x978F, 0xE8DE, 0x9790, 0xE8DF, 0x979C, + 0xE8E0, 0x97A8, 0xE8E1, 0x97A6, 0xE8E2, 0x97A3, 0xE8E3, 0x97B3, + 0xE8E4, 0x97B4, 0xE8E5, 0x97C3, 0xE8E6, 0x97C6, 0xE8E7, 0x97C8, + 0xE8E8, 0x97CB, 0xE8E9, 0x97DC, 0xE8EA, 0x97ED, 0xE8EB, 0x9F4F, + 0xE8EC, 0x97F2, 0xE8ED, 0x7ADF, 0xE8EE, 0x97F6, 0xE8EF, 0x97F5, + 0xE8F0, 0x980F, 0xE8F1, 0x980C, 0xE8F2, 0x9838, 0xE8F3, 0x9824, + 0xE8F4, 0x9821, 0xE8F5, 0x9837, 0xE8F6, 0x983D, 0xE8F7, 0x9846, + 0xE8F8, 0x984F, 0xE8F9, 0x984B, 0xE8FA, 0x986B, 0xE8FB, 0x986F, + 0xE8FC, 0x9870, 0xE940, 0x9871, 0xE941, 0x9874, 0xE942, 0x9873, + 0xE943, 0x98AA, 0xE944, 0x98AF, 0xE945, 0x98B1, 0xE946, 0x98B6, + 0xE947, 0x98C4, 0xE948, 0x98C3, 0xE949, 0x98C6, 0xE94A, 0x98E9, + 0xE94B, 0x98EB, 0xE94C, 0x9903, 0xE94D, 0x9909, 0xE94E, 0x9912, + 0xE94F, 0x9914, 0xE950, 0x9918, 0xE951, 0x9921, 0xE952, 0x991D, + 0xE953, 0x991E, 0xE954, 0x9924, 0xE955, 0x9920, 0xE956, 0x992C, + 0xE957, 0x992E, 0xE958, 0x993D, 0xE959, 0x993E, 0xE95A, 0x9942, + 0xE95B, 0x9949, 0xE95C, 0x9945, 0xE95D, 0x9950, 0xE95E, 0x994B, + 0xE95F, 0x9951, 0xE960, 0x9952, 0xE961, 0x994C, 0xE962, 0x9955, + 0xE963, 0x9997, 0xE964, 0x9998, 0xE965, 0x99A5, 0xE966, 0x99AD, + 0xE967, 0x99AE, 0xE968, 0x99BC, 0xE969, 0x99DF, 0xE96A, 0x99DB, + 0xE96B, 0x99DD, 0xE96C, 0x99D8, 0xE96D, 0x99D1, 0xE96E, 0x99ED, + 0xE96F, 0x99EE, 0xE970, 0x99F1, 0xE971, 0x99F2, 0xE972, 0x99FB, + 0xE973, 0x99F8, 0xE974, 0x9A01, 0xE975, 0x9A0F, 0xE976, 0x9A05, + 0xE977, 0x99E2, 0xE978, 0x9A19, 0xE979, 0x9A2B, 0xE97A, 0x9A37, + 0xE97B, 0x9A45, 0xE97C, 0x9A42, 0xE97D, 0x9A40, 0xE97E, 0x9A43, + 0xE980, 0x9A3E, 0xE981, 0x9A55, 0xE982, 0x9A4D, 0xE983, 0x9A5B, + 0xE984, 0x9A57, 0xE985, 0x9A5F, 0xE986, 0x9A62, 0xE987, 0x9A65, + 0xE988, 0x9A64, 0xE989, 0x9A69, 0xE98A, 0x9A6B, 0xE98B, 0x9A6A, + 0xE98C, 0x9AAD, 0xE98D, 0x9AB0, 0xE98E, 0x9ABC, 0xE98F, 0x9AC0, + 0xE990, 0x9ACF, 0xE991, 0x9AD1, 0xE992, 0x9AD3, 0xE993, 0x9AD4, + 0xE994, 0x9ADE, 0xE995, 0x9ADF, 0xE996, 0x9AE2, 0xE997, 0x9AE3, + 0xE998, 0x9AE6, 0xE999, 0x9AEF, 0xE99A, 0x9AEB, 0xE99B, 0x9AEE, + 0xE99C, 0x9AF4, 0xE99D, 0x9AF1, 0xE99E, 0x9AF7, 0xE99F, 0x9AFB, + 0xE9A0, 0x9B06, 0xE9A1, 0x9B18, 0xE9A2, 0x9B1A, 0xE9A3, 0x9B1F, + 0xE9A4, 0x9B22, 0xE9A5, 0x9B23, 0xE9A6, 0x9B25, 0xE9A7, 0x9B27, + 0xE9A8, 0x9B28, 0xE9A9, 0x9B29, 0xE9AA, 0x9B2A, 0xE9AB, 0x9B2E, + 0xE9AC, 0x9B2F, 0xE9AD, 0x9B32, 0xE9AE, 0x9B44, 0xE9AF, 0x9B43, + 0xE9B0, 0x9B4F, 0xE9B1, 0x9B4D, 0xE9B2, 0x9B4E, 0xE9B3, 0x9B51, + 0xE9B4, 0x9B58, 0xE9B5, 0x9B74, 0xE9B6, 0x9B93, 0xE9B7, 0x9B83, + 0xE9B8, 0x9B91, 0xE9B9, 0x9B96, 0xE9BA, 0x9B97, 0xE9BB, 0x9B9F, + 0xE9BC, 0x9BA0, 0xE9BD, 0x9BA8, 0xE9BE, 0x9BB4, 0xE9BF, 0x9BC0, + 0xE9C0, 0x9BCA, 0xE9C1, 0x9BB9, 0xE9C2, 0x9BC6, 0xE9C3, 0x9BCF, + 0xE9C4, 0x9BD1, 0xE9C5, 0x9BD2, 0xE9C6, 0x9BE3, 0xE9C7, 0x9BE2, + 0xE9C8, 0x9BE4, 0xE9C9, 0x9BD4, 0xE9CA, 0x9BE1, 0xE9CB, 0x9C3A, + 0xE9CC, 0x9BF2, 0xE9CD, 0x9BF1, 0xE9CE, 0x9BF0, 0xE9CF, 0x9C15, + 0xE9D0, 0x9C14, 0xE9D1, 0x9C09, 0xE9D2, 0x9C13, 0xE9D3, 0x9C0C, + 0xE9D4, 0x9C06, 0xE9D5, 0x9C08, 0xE9D6, 0x9C12, 0xE9D7, 0x9C0A, + 0xE9D8, 0x9C04, 0xE9D9, 0x9C2E, 0xE9DA, 0x9C1B, 0xE9DB, 0x9C25, + 0xE9DC, 0x9C24, 0xE9DD, 0x9C21, 0xE9DE, 0x9C30, 0xE9DF, 0x9C47, + 0xE9E0, 0x9C32, 0xE9E1, 0x9C46, 0xE9E2, 0x9C3E, 0xE9E3, 0x9C5A, + 0xE9E4, 0x9C60, 0xE9E5, 0x9C67, 0xE9E6, 0x9C76, 0xE9E7, 0x9C78, + 0xE9E8, 0x9CE7, 0xE9E9, 0x9CEC, 0xE9EA, 0x9CF0, 0xE9EB, 0x9D09, + 0xE9EC, 0x9D08, 0xE9ED, 0x9CEB, 0xE9EE, 0x9D03, 0xE9EF, 0x9D06, + 0xE9F0, 0x9D2A, 0xE9F1, 0x9D26, 0xE9F2, 0x9DAF, 0xE9F3, 0x9D23, + 0xE9F4, 0x9D1F, 0xE9F5, 0x9D44, 0xE9F6, 0x9D15, 0xE9F7, 0x9D12, + 0xE9F8, 0x9D41, 0xE9F9, 0x9D3F, 0xE9FA, 0x9D3E, 0xE9FB, 0x9D46, + 0xE9FC, 0x9D48, 0xEA40, 0x9D5D, 0xEA41, 0x9D5E, 0xEA42, 0x9D64, + 0xEA43, 0x9D51, 0xEA44, 0x9D50, 0xEA45, 0x9D59, 0xEA46, 0x9D72, + 0xEA47, 0x9D89, 0xEA48, 0x9D87, 0xEA49, 0x9DAB, 0xEA4A, 0x9D6F, + 0xEA4B, 0x9D7A, 0xEA4C, 0x9D9A, 0xEA4D, 0x9DA4, 0xEA4E, 0x9DA9, + 0xEA4F, 0x9DB2, 0xEA50, 0x9DC4, 0xEA51, 0x9DC1, 0xEA52, 0x9DBB, + 0xEA53, 0x9DB8, 0xEA54, 0x9DBA, 0xEA55, 0x9DC6, 0xEA56, 0x9DCF, + 0xEA57, 0x9DC2, 0xEA58, 0x9DD9, 0xEA59, 0x9DD3, 0xEA5A, 0x9DF8, + 0xEA5B, 0x9DE6, 0xEA5C, 0x9DED, 0xEA5D, 0x9DEF, 0xEA5E, 0x9DFD, + 0xEA5F, 0x9E1A, 0xEA60, 0x9E1B, 0xEA61, 0x9E1E, 0xEA62, 0x9E75, + 0xEA63, 0x9E79, 0xEA64, 0x9E7D, 0xEA65, 0x9E81, 0xEA66, 0x9E88, + 0xEA67, 0x9E8B, 0xEA68, 0x9E8C, 0xEA69, 0x9E92, 0xEA6A, 0x9E95, + 0xEA6B, 0x9E91, 0xEA6C, 0x9E9D, 0xEA6D, 0x9EA5, 0xEA6E, 0x9EA9, + 0xEA6F, 0x9EB8, 0xEA70, 0x9EAA, 0xEA71, 0x9EAD, 0xEA72, 0x9761, + 0xEA73, 0x9ECC, 0xEA74, 0x9ECE, 0xEA75, 0x9ECF, 0xEA76, 0x9ED0, + 0xEA77, 0x9ED4, 0xEA78, 0x9EDC, 0xEA79, 0x9EDE, 0xEA7A, 0x9EDD, + 0xEA7B, 0x9EE0, 0xEA7C, 0x9EE5, 0xEA7D, 0x9EE8, 0xEA7E, 0x9EEF, + 0xEA80, 0x9EF4, 0xEA81, 0x9EF6, 0xEA82, 0x9EF7, 0xEA83, 0x9EF9, + 0xEA84, 0x9EFB, 0xEA85, 0x9EFC, 0xEA86, 0x9EFD, 0xEA87, 0x9F07, + 0xEA88, 0x9F08, 0xEA89, 0x76B7, 0xEA8A, 0x9F15, 0xEA8B, 0x9F21, + 0xEA8C, 0x9F2C, 0xEA8D, 0x9F3E, 0xEA8E, 0x9F4A, 0xEA8F, 0x9F52, + 0xEA90, 0x9F54, 0xEA91, 0x9F63, 0xEA92, 0x9F5F, 0xEA93, 0x9F60, + 0xEA94, 0x9F61, 0xEA95, 0x9F66, 0xEA96, 0x9F67, 0xEA97, 0x9F6C, + 0xEA98, 0x9F6A, 0xEA99, 0x9F77, 0xEA9A, 0x9F72, 0xEA9B, 0x9F76, + 0xEA9C, 0x9F95, 0xEA9D, 0x9F9C, 0xEA9E, 0x9FA0, 0xEA9F, 0x582F, + 0xEAA0, 0x69C7, 0xEAA1, 0x9059, 0xEAA2, 0x7464, 0xEAA3, 0x51DC, + 0xEAA4, 0x7199, 0xFA40, 0x2170, 0xFA41, 0x2171, 0xFA42, 0x2172, + 0xFA43, 0x2173, 0xFA44, 0x2174, 0xFA45, 0x2175, 0xFA46, 0x2176, + 0xFA47, 0x2177, 0xFA48, 0x2178, 0xFA49, 0x2179, 0xFA55, 0xFFE4, + 0xFA56, 0xFF07, 0xFA57, 0xFF02, 0xFA5C, 0x7E8A, 0xFA5D, 0x891C, + 0xFA5E, 0x9348, 0xFA5F, 0x9288, 0xFA60, 0x84DC, 0xFA61, 0x4FC9, + 0xFA62, 0x70BB, 0xFA63, 0x6631, 0xFA64, 0x68C8, 0xFA65, 0x92F9, + 0xFA66, 0x66FB, 0xFA67, 0x5F45, 0xFA68, 0x4E28, 0xFA69, 0x4EE1, + 0xFA6A, 0x4EFC, 0xFA6B, 0x4F00, 0xFA6C, 0x4F03, 0xFA6D, 0x4F39, + 0xFA6E, 0x4F56, 0xFA6F, 0x4F92, 0xFA70, 0x4F8A, 0xFA71, 0x4F9A, + 0xFA72, 0x4F94, 0xFA73, 0x4FCD, 0xFA74, 0x5040, 0xFA75, 0x5022, + 0xFA76, 0x4FFF, 0xFA77, 0x501E, 0xFA78, 0x5046, 0xFA79, 0x5070, + 0xFA7A, 0x5042, 0xFA7B, 0x5094, 0xFA7C, 0x50F4, 0xFA7D, 0x50D8, + 0xFA7E, 0x514A, 0xFA80, 0x5164, 0xFA81, 0x519D, 0xFA82, 0x51BE, + 0xFA83, 0x51EC, 0xFA84, 0x5215, 0xFA85, 0x529C, 0xFA86, 0x52A6, + 0xFA87, 0x52C0, 0xFA88, 0x52DB, 0xFA89, 0x5300, 0xFA8A, 0x5307, + 0xFA8B, 0x5324, 0xFA8C, 0x5372, 0xFA8D, 0x5393, 0xFA8E, 0x53B2, + 0xFA8F, 0x53DD, 0xFA90, 0xFA0E, 0xFA91, 0x549C, 0xFA92, 0x548A, + 0xFA93, 0x54A9, 0xFA94, 0x54FF, 0xFA95, 0x5586, 0xFA96, 0x5759, + 0xFA97, 0x5765, 0xFA98, 0x57AC, 0xFA99, 0x57C8, 0xFA9A, 0x57C7, + 0xFA9B, 0xFA0F, 0xFA9C, 0xFA10, 0xFA9D, 0x589E, 0xFA9E, 0x58B2, + 0xFA9F, 0x590B, 0xFAA0, 0x5953, 0xFAA1, 0x595B, 0xFAA2, 0x595D, + 0xFAA3, 0x5963, 0xFAA4, 0x59A4, 0xFAA5, 0x59BA, 0xFAA6, 0x5B56, + 0xFAA7, 0x5BC0, 0xFAA8, 0x752F, 0xFAA9, 0x5BD8, 0xFAAA, 0x5BEC, + 0xFAAB, 0x5C1E, 0xFAAC, 0x5CA6, 0xFAAD, 0x5CBA, 0xFAAE, 0x5CF5, + 0xFAAF, 0x5D27, 0xFAB0, 0x5D53, 0xFAB1, 0xFA11, 0xFAB2, 0x5D42, + 0xFAB3, 0x5D6D, 0xFAB4, 0x5DB8, 0xFAB5, 0x5DB9, 0xFAB6, 0x5DD0, + 0xFAB7, 0x5F21, 0xFAB8, 0x5F34, 0xFAB9, 0x5F67, 0xFABA, 0x5FB7, + 0xFABB, 0x5FDE, 0xFABC, 0x605D, 0xFABD, 0x6085, 0xFABE, 0x608A, + 0xFABF, 0x60DE, 0xFAC0, 0x60D5, 0xFAC1, 0x6120, 0xFAC2, 0x60F2, + 0xFAC3, 0x6111, 0xFAC4, 0x6137, 0xFAC5, 0x6130, 0xFAC6, 0x6198, + 0xFAC7, 0x6213, 0xFAC8, 0x62A6, 0xFAC9, 0x63F5, 0xFACA, 0x6460, + 0xFACB, 0x649D, 0xFACC, 0x64CE, 0xFACD, 0x654E, 0xFACE, 0x6600, + 0xFACF, 0x6615, 0xFAD0, 0x663B, 0xFAD1, 0x6609, 0xFAD2, 0x662E, + 0xFAD3, 0x661E, 0xFAD4, 0x6624, 0xFAD5, 0x6665, 0xFAD6, 0x6657, + 0xFAD7, 0x6659, 0xFAD8, 0xFA12, 0xFAD9, 0x6673, 0xFADA, 0x6699, + 0xFADB, 0x66A0, 0xFADC, 0x66B2, 0xFADD, 0x66BF, 0xFADE, 0x66FA, + 0xFADF, 0x670E, 0xFAE0, 0xF929, 0xFAE1, 0x6766, 0xFAE2, 0x67BB, + 0xFAE3, 0x6852, 0xFAE4, 0x67C0, 0xFAE5, 0x6801, 0xFAE6, 0x6844, + 0xFAE7, 0x68CF, 0xFAE8, 0xFA13, 0xFAE9, 0x6968, 0xFAEA, 0xFA14, + 0xFAEB, 0x6998, 0xFAEC, 0x69E2, 0xFAED, 0x6A30, 0xFAEE, 0x6A6B, + 0xFAEF, 0x6A46, 0xFAF0, 0x6A73, 0xFAF1, 0x6A7E, 0xFAF2, 0x6AE2, + 0xFAF3, 0x6AE4, 0xFAF4, 0x6BD6, 0xFAF5, 0x6C3F, 0xFAF6, 0x6C5C, + 0xFAF7, 0x6C86, 0xFAF8, 0x6C6F, 0xFAF9, 0x6CDA, 0xFAFA, 0x6D04, + 0xFAFB, 0x6D87, 0xFAFC, 0x6D6F, 0xFB40, 0x6D96, 0xFB41, 0x6DAC, + 0xFB42, 0x6DCF, 0xFB43, 0x6DF8, 0xFB44, 0x6DF2, 0xFB45, 0x6DFC, + 0xFB46, 0x6E39, 0xFB47, 0x6E5C, 0xFB48, 0x6E27, 0xFB49, 0x6E3C, + 0xFB4A, 0x6EBF, 0xFB4B, 0x6F88, 0xFB4C, 0x6FB5, 0xFB4D, 0x6FF5, + 0xFB4E, 0x7005, 0xFB4F, 0x7007, 0xFB50, 0x7028, 0xFB51, 0x7085, + 0xFB52, 0x70AB, 0xFB53, 0x710F, 0xFB54, 0x7104, 0xFB55, 0x715C, + 0xFB56, 0x7146, 0xFB57, 0x7147, 0xFB58, 0xFA15, 0xFB59, 0x71C1, + 0xFB5A, 0x71FE, 0xFB5B, 0x72B1, 0xFB5C, 0x72BE, 0xFB5D, 0x7324, + 0xFB5E, 0xFA16, 0xFB5F, 0x7377, 0xFB60, 0x73BD, 0xFB61, 0x73C9, + 0xFB62, 0x73D6, 0xFB63, 0x73E3, 0xFB64, 0x73D2, 0xFB65, 0x7407, + 0xFB66, 0x73F5, 0xFB67, 0x7426, 0xFB68, 0x742A, 0xFB69, 0x7429, + 0xFB6A, 0x742E, 0xFB6B, 0x7462, 0xFB6C, 0x7489, 0xFB6D, 0x749F, + 0xFB6E, 0x7501, 0xFB6F, 0x756F, 0xFB70, 0x7682, 0xFB71, 0x769C, + 0xFB72, 0x769E, 0xFB73, 0x769B, 0xFB74, 0x76A6, 0xFB75, 0xFA17, + 0xFB76, 0x7746, 0xFB77, 0x52AF, 0xFB78, 0x7821, 0xFB79, 0x784E, + 0xFB7A, 0x7864, 0xFB7B, 0x787A, 0xFB7C, 0x7930, 0xFB7D, 0xFA18, + 0xFB7E, 0xFA19, 0xFB80, 0xFA1A, 0xFB81, 0x7994, 0xFB82, 0xFA1B, + 0xFB83, 0x799B, 0xFB84, 0x7AD1, 0xFB85, 0x7AE7, 0xFB86, 0xFA1C, + 0xFB87, 0x7AEB, 0xFB88, 0x7B9E, 0xFB89, 0xFA1D, 0xFB8A, 0x7D48, + 0xFB8B, 0x7D5C, 0xFB8C, 0x7DB7, 0xFB8D, 0x7DA0, 0xFB8E, 0x7DD6, + 0xFB8F, 0x7E52, 0xFB90, 0x7F47, 0xFB91, 0x7FA1, 0xFB92, 0xFA1E, + 0xFB93, 0x8301, 0xFB94, 0x8362, 0xFB95, 0x837F, 0xFB96, 0x83C7, + 0xFB97, 0x83F6, 0xFB98, 0x8448, 0xFB99, 0x84B4, 0xFB9A, 0x8553, + 0xFB9B, 0x8559, 0xFB9C, 0x856B, 0xFB9D, 0xFA1F, 0xFB9E, 0x85B0, + 0xFB9F, 0xFA20, 0xFBA0, 0xFA21, 0xFBA1, 0x8807, 0xFBA2, 0x88F5, + 0xFBA3, 0x8A12, 0xFBA4, 0x8A37, 0xFBA5, 0x8A79, 0xFBA6, 0x8AA7, + 0xFBA7, 0x8ABE, 0xFBA8, 0x8ADF, 0xFBA9, 0xFA22, 0xFBAA, 0x8AF6, + 0xFBAB, 0x8B53, 0xFBAC, 0x8B7F, 0xFBAD, 0x8CF0, 0xFBAE, 0x8CF4, + 0xFBAF, 0x8D12, 0xFBB0, 0x8D76, 0xFBB1, 0xFA23, 0xFBB2, 0x8ECF, + 0xFBB3, 0xFA24, 0xFBB4, 0xFA25, 0xFBB5, 0x9067, 0xFBB6, 0x90DE, + 0xFBB7, 0xFA26, 0xFBB8, 0x9115, 0xFBB9, 0x9127, 0xFBBA, 0x91DA, + 0xFBBB, 0x91D7, 0xFBBC, 0x91DE, 0xFBBD, 0x91ED, 0xFBBE, 0x91EE, + 0xFBBF, 0x91E4, 0xFBC0, 0x91E5, 0xFBC1, 0x9206, 0xFBC2, 0x9210, + 0xFBC3, 0x920A, 0xFBC4, 0x923A, 0xFBC5, 0x9240, 0xFBC6, 0x923C, + 0xFBC7, 0x924E, 0xFBC8, 0x9259, 0xFBC9, 0x9251, 0xFBCA, 0x9239, + 0xFBCB, 0x9267, 0xFBCC, 0x92A7, 0xFBCD, 0x9277, 0xFBCE, 0x9278, + 0xFBCF, 0x92E7, 0xFBD0, 0x92D7, 0xFBD1, 0x92D9, 0xFBD2, 0x92D0, + 0xFBD3, 0xFA27, 0xFBD4, 0x92D5, 0xFBD5, 0x92E0, 0xFBD6, 0x92D3, + 0xFBD7, 0x9325, 0xFBD8, 0x9321, 0xFBD9, 0x92FB, 0xFBDA, 0xFA28, + 0xFBDB, 0x931E, 0xFBDC, 0x92FF, 0xFBDD, 0x931D, 0xFBDE, 0x9302, + 0xFBDF, 0x9370, 0xFBE0, 0x9357, 0xFBE1, 0x93A4, 0xFBE2, 0x93C6, + 0xFBE3, 0x93DE, 0xFBE4, 0x93F8, 0xFBE5, 0x9431, 0xFBE6, 0x9445, + 0xFBE7, 0x9448, 0xFBE8, 0x9592, 0xFBE9, 0xF9DC, 0xFBEA, 0xFA29, + 0xFBEB, 0x969D, 0xFBEC, 0x96AF, 0xFBED, 0x9733, 0xFBEE, 0x973B, + 0xFBEF, 0x9743, 0xFBF0, 0x974D, 0xFBF1, 0x974F, 0xFBF2, 0x9751, + 0xFBF3, 0x9755, 0xFBF4, 0x9857, 0xFBF5, 0x9865, 0xFBF6, 0xFA2A, + 0xFBF7, 0xFA2B, 0xFBF8, 0x9927, 0xFBF9, 0xFA2C, 0xFBFA, 0x999E, + 0xFBFB, 0x9A4E, 0xFBFC, 0x9AD9, 0xFC40, 0x9ADC, 0xFC41, 0x9B75, + 0xFC42, 0x9B72, 0xFC43, 0x9B8F, 0xFC44, 0x9BB1, 0xFC45, 0x9BBB, + 0xFC46, 0x9C00, 0xFC47, 0x9D70, 0xFC48, 0x9D6B, 0xFC49, 0xFA2D, + 0xFC4A, 0x9E19, 0xFC4B, 0x9ED1, 0, 0 +}; +#endif + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src <= 0x80) { /* ASCII */ + c = src; + } else { +#if !_TINY_TABLE + if (dir) { /* OEMCP to unicode */ + p = sjis2uni; + hi = sizeof(sjis2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2sjis; + hi = sizeof(uni2sjis) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; +#else + if (dir) { /* OEMCP to unicode (Incremental search)*/ + p = &uni2sjis[1]; + do { + c = *p; + p += 2; + p -= 3; + c = *p; + } while (c && c != src); + } else { /* Unicode to OEMCP */ + li = 0; hi = sizeof(uni2sjis) / 4 - 1; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == uni2sjis[i * 2]) break; + if (src > uni2sjis[i * 2]) + li = i; + else + hi = i; + } + c = n ? uni2sjis[i * 2 + 1] : 0; + } +#endif + } + + return c; +} +#else +#error This file is not needed in current configuration. + +#endif diff --git a/bertos/fs/fatfs/option/cc936.c b/bertos/fs/fatfs/option/cc936.c new file mode 100644 index 0000000..4238d91 --- /dev/null +++ b/bertos/fs/fatfs/option/cc936.c @@ -0,0 +1,10960 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP936 (Simplified Chinese GBK) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + + +#if _USE_LFN && _CODE_PAGE == 936 + + +static +const WCHAR uni2oem[] = { +/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ + 0x00A4, 0xA1E8, 0x00A7, 0xA1EC, 0x00A8, 0xA1A7, 0x00B0, 0xA1E3, + 0x00B1, 0xA1C0, 0x00B7, 0xA1A4, 0x00D7, 0xA1C1, 0x00E0, 0xA8A4, + 0x00E1, 0xA8A2, 0x00E8, 0xA8A8, 0x00E9, 0xA8A6, 0x00EA, 0xA8BA, + 0x00EC, 0xA8AC, 0x00ED, 0xA8AA, 0x00F2, 0xA8B0, 0x00F3, 0xA8AE, + 0x00F7, 0xA1C2, 0x00F9, 0xA8B4, 0x00FA, 0xA8B2, 0x00FC, 0xA8B9, + 0x0101, 0xA8A1, 0x0113, 0xA8A5, 0x011B, 0xA8A7, 0x012B, 0xA8A9, + 0x0144, 0xA8BD, 0x0148, 0xA8BE, 0x014D, 0xA8AD, 0x016B, 0xA8B1, + 0x01CE, 0xA8A3, 0x01D0, 0xA8AB, 0x01D2, 0xA8AF, 0x01D4, 0xA8B3, + 0x01D6, 0xA8B5, 0x01D8, 0xA8B6, 0x01DA, 0xA8B7, 0x01DC, 0xA8B8, + 0x0251, 0xA8BB, 0x0261, 0xA8C0, 0x02C7, 0xA1A6, 0x02C9, 0xA1A5, + 0x02CA, 0xA840, 0x02CB, 0xA841, 0x02D9, 0xA842, 0x0391, 0xA6A1, + 0x0392, 0xA6A2, 0x0393, 0xA6A3, 0x0394, 0xA6A4, 0x0395, 0xA6A5, + 0x0396, 0xA6A6, 0x0397, 0xA6A7, 0x0398, 0xA6A8, 0x0399, 0xA6A9, + 0x039A, 0xA6AA, 0x039B, 0xA6AB, 0x039C, 0xA6AC, 0x039D, 0xA6AD, + 0x039E, 0xA6AE, 0x039F, 0xA6AF, 0x03A0, 0xA6B0, 0x03A1, 0xA6B1, + 0x03A3, 0xA6B2, 0x03A4, 0xA6B3, 0x03A5, 0xA6B4, 0x03A6, 0xA6B5, + 0x03A7, 0xA6B6, 0x03A8, 0xA6B7, 0x03A9, 0xA6B8, 0x03B1, 0xA6C1, + 0x03B2, 0xA6C2, 0x03B3, 0xA6C3, 0x03B4, 0xA6C4, 0x03B5, 0xA6C5, + 0x03B6, 0xA6C6, 0x03B7, 0xA6C7, 0x03B8, 0xA6C8, 0x03B9, 0xA6C9, + 0x03BA, 0xA6CA, 0x03BB, 0xA6CB, 0x03BC, 0xA6CC, 0x03BD, 0xA6CD, + 0x03BE, 0xA6CE, 0x03BF, 0xA6CF, 0x03C0, 0xA6D0, 0x03C1, 0xA6D1, + 0x03C3, 0xA6D2, 0x03C4, 0xA6D3, 0x03C5, 0xA6D4, 0x03C6, 0xA6D5, + 0x03C7, 0xA6D6, 0x03C8, 0xA6D7, 0x03C9, 0xA6D8, 0x0401, 0xA7A7, + 0x0410, 0xA7A1, 0x0411, 0xA7A2, 0x0412, 0xA7A3, 0x0413, 0xA7A4, + 0x0414, 0xA7A5, 0x0415, 0xA7A6, 0x0416, 0xA7A8, 0x0417, 0xA7A9, + 0x0418, 0xA7AA, 0x0419, 0xA7AB, 0x041A, 0xA7AC, 0x041B, 0xA7AD, + 0x041C, 0xA7AE, 0x041D, 0xA7AF, 0x041E, 0xA7B0, 0x041F, 0xA7B1, + 0x0420, 0xA7B2, 0x0421, 0xA7B3, 0x0422, 0xA7B4, 0x0423, 0xA7B5, + 0x0424, 0xA7B6, 0x0425, 0xA7B7, 0x0426, 0xA7B8, 0x0427, 0xA7B9, + 0x0428, 0xA7BA, 0x0429, 0xA7BB, 0x042A, 0xA7BC, 0x042B, 0xA7BD, + 0x042C, 0xA7BE, 0x042D, 0xA7BF, 0x042E, 0xA7C0, 0x042F, 0xA7C1, + 0x0430, 0xA7D1, 0x0431, 0xA7D2, 0x0432, 0xA7D3, 0x0433, 0xA7D4, + 0x0434, 0xA7D5, 0x0435, 0xA7D6, 0x0436, 0xA7D8, 0x0437, 0xA7D9, + 0x0438, 0xA7DA, 0x0439, 0xA7DB, 0x043A, 0xA7DC, 0x043B, 0xA7DD, + 0x043C, 0xA7DE, 0x043D, 0xA7DF, 0x043E, 0xA7E0, 0x043F, 0xA7E1, + 0x0440, 0xA7E2, 0x0441, 0xA7E3, 0x0442, 0xA7E4, 0x0443, 0xA7E5, + 0x0444, 0xA7E6, 0x0445, 0xA7E7, 0x0446, 0xA7E8, 0x0447, 0xA7E9, + 0x0448, 0xA7EA, 0x0449, 0xA7EB, 0x044A, 0xA7EC, 0x044B, 0xA7ED, + 0x044C, 0xA7EE, 0x044D, 0xA7EF, 0x044E, 0xA7F0, 0x044F, 0xA7F1, + 0x0451, 0xA7D7, 0x2010, 0xA95C, 0x2013, 0xA843, 0x2014, 0xA1AA, + 0x2015, 0xA844, 0x2016, 0xA1AC, 0x2018, 0xA1AE, 0x2019, 0xA1AF, + 0x201C, 0xA1B0, 0x201D, 0xA1B1, 0x2025, 0xA845, 0x2026, 0xA1AD, + 0x2030, 0xA1EB, 0x2032, 0xA1E4, 0x2033, 0xA1E5, 0x2035, 0xA846, + 0x203B, 0xA1F9, 0x20AC, 0x0080, 0x2103, 0xA1E6, 0x2105, 0xA847, + 0x2109, 0xA848, 0x2116, 0xA1ED, 0x2121, 0xA959, 0x2160, 0xA2F1, + 0x2161, 0xA2F2, 0x2162, 0xA2F3, 0x2163, 0xA2F4, 0x2164, 0xA2F5, + 0x2165, 0xA2F6, 0x2166, 0xA2F7, 0x2167, 0xA2F8, 0x2168, 0xA2F9, + 0x2169, 0xA2FA, 0x216A, 0xA2FB, 0x216B, 0xA2FC, 0x2170, 0xA2A1, + 0x2171, 0xA2A2, 0x2172, 0xA2A3, 0x2173, 0xA2A4, 0x2174, 0xA2A5, + 0x2175, 0xA2A6, 0x2176, 0xA2A7, 0x2177, 0xA2A8, 0x2178, 0xA2A9, + 0x2179, 0xA2AA, 0x2190, 0xA1FB, 0x2191, 0xA1FC, 0x2192, 0xA1FA, + 0x2193, 0xA1FD, 0x2196, 0xA849, 0x2197, 0xA84A, 0x2198, 0xA84B, + 0x2199, 0xA84C, 0x2208, 0xA1CA, 0x220F, 0xA1C7, 0x2211, 0xA1C6, + 0x2215, 0xA84D, 0x221A, 0xA1CC, 0x221D, 0xA1D8, 0x221E, 0xA1DE, + 0x221F, 0xA84E, 0x2220, 0xA1CF, 0x2223, 0xA84F, 0x2225, 0xA1CE, + 0x2227, 0xA1C4, 0x2228, 0xA1C5, 0x2229, 0xA1C9, 0x222A, 0xA1C8, + 0x222B, 0xA1D2, 0x222E, 0xA1D3, 0x2234, 0xA1E0, 0x2235, 0xA1DF, + 0x2236, 0xA1C3, 0x2237, 0xA1CB, 0x223D, 0xA1D7, 0x2248, 0xA1D6, + 0x224C, 0xA1D5, 0x2252, 0xA850, 0x2260, 0xA1D9, 0x2261, 0xA1D4, + 0x2264, 0xA1DC, 0x2265, 0xA1DD, 0x2266, 0xA851, 0x2267, 0xA852, + 0x226E, 0xA1DA, 0x226F, 0xA1DB, 0x2295, 0xA892, 0x2299, 0xA1D1, + 0x22A5, 0xA1CD, 0x22BF, 0xA853, 0x2312, 0xA1D0, 0x2460, 0xA2D9, + 0x2461, 0xA2DA, 0x2462, 0xA2DB, 0x2463, 0xA2DC, 0x2464, 0xA2DD, + 0x2465, 0xA2DE, 0x2466, 0xA2DF, 0x2467, 0xA2E0, 0x2468, 0xA2E1, + 0x2469, 0xA2E2, 0x2474, 0xA2C5, 0x2475, 0xA2C6, 0x2476, 0xA2C7, + 0x2477, 0xA2C8, 0x2478, 0xA2C9, 0x2479, 0xA2CA, 0x247A, 0xA2CB, + 0x247B, 0xA2CC, 0x247C, 0xA2CD, 0x247D, 0xA2CE, 0x247E, 0xA2CF, + 0x247F, 0xA2D0, 0x2480, 0xA2D1, 0x2481, 0xA2D2, 0x2482, 0xA2D3, + 0x2483, 0xA2D4, 0x2484, 0xA2D5, 0x2485, 0xA2D6, 0x2486, 0xA2D7, + 0x2487, 0xA2D8, 0x2488, 0xA2B1, 0x2489, 0xA2B2, 0x248A, 0xA2B3, + 0x248B, 0xA2B4, 0x248C, 0xA2B5, 0x248D, 0xA2B6, 0x248E, 0xA2B7, + 0x248F, 0xA2B8, 0x2490, 0xA2B9, 0x2491, 0xA2BA, 0x2492, 0xA2BB, + 0x2493, 0xA2BC, 0x2494, 0xA2BD, 0x2495, 0xA2BE, 0x2496, 0xA2BF, + 0x2497, 0xA2C0, 0x2498, 0xA2C1, 0x2499, 0xA2C2, 0x249A, 0xA2C3, + 0x249B, 0xA2C4, 0x2500, 0xA9A4, 0x2501, 0xA9A5, 0x2502, 0xA9A6, + 0x2503, 0xA9A7, 0x2504, 0xA9A8, 0x2505, 0xA9A9, 0x2506, 0xA9AA, + 0x2507, 0xA9AB, 0x2508, 0xA9AC, 0x2509, 0xA9AD, 0x250A, 0xA9AE, + 0x250B, 0xA9AF, 0x250C, 0xA9B0, 0x250D, 0xA9B1, 0x250E, 0xA9B2, + 0x250F, 0xA9B3, 0x2510, 0xA9B4, 0x2511, 0xA9B5, 0x2512, 0xA9B6, + 0x2513, 0xA9B7, 0x2514, 0xA9B8, 0x2515, 0xA9B9, 0x2516, 0xA9BA, + 0x2517, 0xA9BB, 0x2518, 0xA9BC, 0x2519, 0xA9BD, 0x251A, 0xA9BE, + 0x251B, 0xA9BF, 0x251C, 0xA9C0, 0x251D, 0xA9C1, 0x251E, 0xA9C2, + 0x251F, 0xA9C3, 0x2520, 0xA9C4, 0x2521, 0xA9C5, 0x2522, 0xA9C6, + 0x2523, 0xA9C7, 0x2524, 0xA9C8, 0x2525, 0xA9C9, 0x2526, 0xA9CA, + 0x2527, 0xA9CB, 0x2528, 0xA9CC, 0x2529, 0xA9CD, 0x252A, 0xA9CE, + 0x252B, 0xA9CF, 0x252C, 0xA9D0, 0x252D, 0xA9D1, 0x252E, 0xA9D2, + 0x252F, 0xA9D3, 0x2530, 0xA9D4, 0x2531, 0xA9D5, 0x2532, 0xA9D6, + 0x2533, 0xA9D7, 0x2534, 0xA9D8, 0x2535, 0xA9D9, 0x2536, 0xA9DA, + 0x2537, 0xA9DB, 0x2538, 0xA9DC, 0x2539, 0xA9DD, 0x253A, 0xA9DE, + 0x253B, 0xA9DF, 0x253C, 0xA9E0, 0x253D, 0xA9E1, 0x253E, 0xA9E2, + 0x253F, 0xA9E3, 0x2540, 0xA9E4, 0x2541, 0xA9E5, 0x2542, 0xA9E6, + 0x2543, 0xA9E7, 0x2544, 0xA9E8, 0x2545, 0xA9E9, 0x2546, 0xA9EA, + 0x2547, 0xA9EB, 0x2548, 0xA9EC, 0x2549, 0xA9ED, 0x254A, 0xA9EE, + 0x254B, 0xA9EF, 0x2550, 0xA854, 0x2551, 0xA855, 0x2552, 0xA856, + 0x2553, 0xA857, 0x2554, 0xA858, 0x2555, 0xA859, 0x2556, 0xA85A, + 0x2557, 0xA85B, 0x2558, 0xA85C, 0x2559, 0xA85D, 0x255A, 0xA85E, + 0x255B, 0xA85F, 0x255C, 0xA860, 0x255D, 0xA861, 0x255E, 0xA862, + 0x255F, 0xA863, 0x2560, 0xA864, 0x2561, 0xA865, 0x2562, 0xA866, + 0x2563, 0xA867, 0x2564, 0xA868, 0x2565, 0xA869, 0x2566, 0xA86A, + 0x2567, 0xA86B, 0x2568, 0xA86C, 0x2569, 0xA86D, 0x256A, 0xA86E, + 0x256B, 0xA86F, 0x256C, 0xA870, 0x256D, 0xA871, 0x256E, 0xA872, + 0x256F, 0xA873, 0x2570, 0xA874, 0x2571, 0xA875, 0x2572, 0xA876, + 0x2573, 0xA877, 0x2581, 0xA878, 0x2582, 0xA879, 0x2583, 0xA87A, + 0x2584, 0xA87B, 0x2585, 0xA87C, 0x2586, 0xA87D, 0x2587, 0xA87E, + 0x2588, 0xA880, 0x2589, 0xA881, 0x258A, 0xA882, 0x258B, 0xA883, + 0x258C, 0xA884, 0x258D, 0xA885, 0x258E, 0xA886, 0x258F, 0xA887, + 0x2593, 0xA888, 0x2594, 0xA889, 0x2595, 0xA88A, 0x25A0, 0xA1F6, + 0x25A1, 0xA1F5, 0x25B2, 0xA1F8, 0x25B3, 0xA1F7, 0x25BC, 0xA88B, + 0x25BD, 0xA88C, 0x25C6, 0xA1F4, 0x25C7, 0xA1F3, 0x25CB, 0xA1F0, + 0x25CE, 0xA1F2, 0x25CF, 0xA1F1, 0x25E2, 0xA88D, 0x25E3, 0xA88E, + 0x25E4, 0xA88F, 0x25E5, 0xA890, 0x2605, 0xA1EF, 0x2606, 0xA1EE, + 0x2609, 0xA891, 0x2640, 0xA1E2, 0x2642, 0xA1E1, 0x3000, 0xA1A1, + 0x3001, 0xA1A2, 0x3002, 0xA1A3, 0x3003, 0xA1A8, 0x3005, 0xA1A9, + 0x3006, 0xA965, 0x3007, 0xA996, 0x3008, 0xA1B4, 0x3009, 0xA1B5, + 0x300A, 0xA1B6, 0x300B, 0xA1B7, 0x300C, 0xA1B8, 0x300D, 0xA1B9, + 0x300E, 0xA1BA, 0x300F, 0xA1BB, 0x3010, 0xA1BE, 0x3011, 0xA1BF, + 0x3012, 0xA893, 0x3013, 0xA1FE, 0x3014, 0xA1B2, 0x3015, 0xA1B3, + 0x3016, 0xA1BC, 0x3017, 0xA1BD, 0x301D, 0xA894, 0x301E, 0xA895, + 0x3021, 0xA940, 0x3022, 0xA941, 0x3023, 0xA942, 0x3024, 0xA943, + 0x3025, 0xA944, 0x3026, 0xA945, 0x3027, 0xA946, 0x3028, 0xA947, + 0x3029, 0xA948, 0x3041, 0xA4A1, 0x3042, 0xA4A2, 0x3043, 0xA4A3, + 0x3044, 0xA4A4, 0x3045, 0xA4A5, 0x3046, 0xA4A6, 0x3047, 0xA4A7, + 0x3048, 0xA4A8, 0x3049, 0xA4A9, 0x304A, 0xA4AA, 0x304B, 0xA4AB, + 0x304C, 0xA4AC, 0x304D, 0xA4AD, 0x304E, 0xA4AE, 0x304F, 0xA4AF, + 0x3050, 0xA4B0, 0x3051, 0xA4B1, 0x3052, 0xA4B2, 0x3053, 0xA4B3, + 0x3054, 0xA4B4, 0x3055, 0xA4B5, 0x3056, 0xA4B6, 0x3057, 0xA4B7, + 0x3058, 0xA4B8, 0x3059, 0xA4B9, 0x305A, 0xA4BA, 0x305B, 0xA4BB, + 0x305C, 0xA4BC, 0x305D, 0xA4BD, 0x305E, 0xA4BE, 0x305F, 0xA4BF, + 0x3060, 0xA4C0, 0x3061, 0xA4C1, 0x3062, 0xA4C2, 0x3063, 0xA4C3, + 0x3064, 0xA4C4, 0x3065, 0xA4C5, 0x3066, 0xA4C6, 0x3067, 0xA4C7, + 0x3068, 0xA4C8, 0x3069, 0xA4C9, 0x306A, 0xA4CA, 0x306B, 0xA4CB, + 0x306C, 0xA4CC, 0x306D, 0xA4CD, 0x306E, 0xA4CE, 0x306F, 0xA4CF, + 0x3070, 0xA4D0, 0x3071, 0xA4D1, 0x3072, 0xA4D2, 0x3073, 0xA4D3, + 0x3074, 0xA4D4, 0x3075, 0xA4D5, 0x3076, 0xA4D6, 0x3077, 0xA4D7, + 0x3078, 0xA4D8, 0x3079, 0xA4D9, 0x307A, 0xA4DA, 0x307B, 0xA4DB, + 0x307C, 0xA4DC, 0x307D, 0xA4DD, 0x307E, 0xA4DE, 0x307F, 0xA4DF, + 0x3080, 0xA4E0, 0x3081, 0xA4E1, 0x3082, 0xA4E2, 0x3083, 0xA4E3, + 0x3084, 0xA4E4, 0x3085, 0xA4E5, 0x3086, 0xA4E6, 0x3087, 0xA4E7, + 0x3088, 0xA4E8, 0x3089, 0xA4E9, 0x308A, 0xA4EA, 0x308B, 0xA4EB, + 0x308C, 0xA4EC, 0x308D, 0xA4ED, 0x308E, 0xA4EE, 0x308F, 0xA4EF, + 0x3090, 0xA4F0, 0x3091, 0xA4F1, 0x3092, 0xA4F2, 0x3093, 0xA4F3, + 0x309B, 0xA961, 0x309C, 0xA962, 0x309D, 0xA966, 0x309E, 0xA967, + 0x30A1, 0xA5A1, 0x30A2, 0xA5A2, 0x30A3, 0xA5A3, 0x30A4, 0xA5A4, + 0x30A5, 0xA5A5, 0x30A6, 0xA5A6, 0x30A7, 0xA5A7, 0x30A8, 0xA5A8, + 0x30A9, 0xA5A9, 0x30AA, 0xA5AA, 0x30AB, 0xA5AB, 0x30AC, 0xA5AC, + 0x30AD, 0xA5AD, 0x30AE, 0xA5AE, 0x30AF, 0xA5AF, 0x30B0, 0xA5B0, + 0x30B1, 0xA5B1, 0x30B2, 0xA5B2, 0x30B3, 0xA5B3, 0x30B4, 0xA5B4, + 0x30B5, 0xA5B5, 0x30B6, 0xA5B6, 0x30B7, 0xA5B7, 0x30B8, 0xA5B8, + 0x30B9, 0xA5B9, 0x30BA, 0xA5BA, 0x30BB, 0xA5BB, 0x30BC, 0xA5BC, + 0x30BD, 0xA5BD, 0x30BE, 0xA5BE, 0x30BF, 0xA5BF, 0x30C0, 0xA5C0, + 0x30C1, 0xA5C1, 0x30C2, 0xA5C2, 0x30C3, 0xA5C3, 0x30C4, 0xA5C4, + 0x30C5, 0xA5C5, 0x30C6, 0xA5C6, 0x30C7, 0xA5C7, 0x30C8, 0xA5C8, + 0x30C9, 0xA5C9, 0x30CA, 0xA5CA, 0x30CB, 0xA5CB, 0x30CC, 0xA5CC, + 0x30CD, 0xA5CD, 0x30CE, 0xA5CE, 0x30CF, 0xA5CF, 0x30D0, 0xA5D0, + 0x30D1, 0xA5D1, 0x30D2, 0xA5D2, 0x30D3, 0xA5D3, 0x30D4, 0xA5D4, + 0x30D5, 0xA5D5, 0x30D6, 0xA5D6, 0x30D7, 0xA5D7, 0x30D8, 0xA5D8, + 0x30D9, 0xA5D9, 0x30DA, 0xA5DA, 0x30DB, 0xA5DB, 0x30DC, 0xA5DC, + 0x30DD, 0xA5DD, 0x30DE, 0xA5DE, 0x30DF, 0xA5DF, 0x30E0, 0xA5E0, + 0x30E1, 0xA5E1, 0x30E2, 0xA5E2, 0x30E3, 0xA5E3, 0x30E4, 0xA5E4, + 0x30E5, 0xA5E5, 0x30E6, 0xA5E6, 0x30E7, 0xA5E7, 0x30E8, 0xA5E8, + 0x30E9, 0xA5E9, 0x30EA, 0xA5EA, 0x30EB, 0xA5EB, 0x30EC, 0xA5EC, + 0x30ED, 0xA5ED, 0x30EE, 0xA5EE, 0x30EF, 0xA5EF, 0x30F0, 0xA5F0, + 0x30F1, 0xA5F1, 0x30F2, 0xA5F2, 0x30F3, 0xA5F3, 0x30F4, 0xA5F4, + 0x30F5, 0xA5F5, 0x30F6, 0xA5F6, 0x30FC, 0xA960, 0x30FD, 0xA963, + 0x30FE, 0xA964, 0x3105, 0xA8C5, 0x3106, 0xA8C6, 0x3107, 0xA8C7, + 0x3108, 0xA8C8, 0x3109, 0xA8C9, 0x310A, 0xA8CA, 0x310B, 0xA8CB, + 0x310C, 0xA8CC, 0x310D, 0xA8CD, 0x310E, 0xA8CE, 0x310F, 0xA8CF, + 0x3110, 0xA8D0, 0x3111, 0xA8D1, 0x3112, 0xA8D2, 0x3113, 0xA8D3, + 0x3114, 0xA8D4, 0x3115, 0xA8D5, 0x3116, 0xA8D6, 0x3117, 0xA8D7, + 0x3118, 0xA8D8, 0x3119, 0xA8D9, 0x311A, 0xA8DA, 0x311B, 0xA8DB, + 0x311C, 0xA8DC, 0x311D, 0xA8DD, 0x311E, 0xA8DE, 0x311F, 0xA8DF, + 0x3120, 0xA8E0, 0x3121, 0xA8E1, 0x3122, 0xA8E2, 0x3123, 0xA8E3, + 0x3124, 0xA8E4, 0x3125, 0xA8E5, 0x3126, 0xA8E6, 0x3127, 0xA8E7, + 0x3128, 0xA8E8, 0x3129, 0xA8E9, 0x3220, 0xA2E5, 0x3221, 0xA2E6, + 0x3222, 0xA2E7, 0x3223, 0xA2E8, 0x3224, 0xA2E9, 0x3225, 0xA2EA, + 0x3226, 0xA2EB, 0x3227, 0xA2EC, 0x3228, 0xA2ED, 0x3229, 0xA2EE, + 0x3231, 0xA95A, 0x32A3, 0xA949, 0x338E, 0xA94A, 0x338F, 0xA94B, + 0x339C, 0xA94C, 0x339D, 0xA94D, 0x339E, 0xA94E, 0x33A1, 0xA94F, + 0x33C4, 0xA950, 0x33CE, 0xA951, 0x33D1, 0xA952, 0x33D2, 0xA953, + 0x33D5, 0xA954, 0x4E00, 0xD2BB, 0x4E01, 0xB6A1, 0x4E02, 0x8140, + 0x4E03, 0xC6DF, 0x4E04, 0x8141, 0x4E05, 0x8142, 0x4E06, 0x8143, + 0x4E07, 0xCDF2, 0x4E08, 0xD5C9, 0x4E09, 0xC8FD, 0x4E0A, 0xC9CF, + 0x4E0B, 0xCFC2, 0x4E0C, 0xD8A2, 0x4E0D, 0xB2BB, 0x4E0E, 0xD3EB, + 0x4E0F, 0x8144, 0x4E10, 0xD8A4, 0x4E11, 0xB3F3, 0x4E12, 0x8145, + 0x4E13, 0xD7A8, 0x4E14, 0xC7D2, 0x4E15, 0xD8A7, 0x4E16, 0xCAC0, + 0x4E17, 0x8146, 0x4E18, 0xC7F0, 0x4E19, 0xB1FB, 0x4E1A, 0xD2B5, + 0x4E1B, 0xB4D4, 0x4E1C, 0xB6AB, 0x4E1D, 0xCBBF, 0x4E1E, 0xD8A9, + 0x4E1F, 0x8147, 0x4E20, 0x8148, 0x4E21, 0x8149, 0x4E22, 0xB6AA, + 0x4E23, 0x814A, 0x4E24, 0xC1BD, 0x4E25, 0xD1CF, 0x4E26, 0x814B, + 0x4E27, 0xC9A5, 0x4E28, 0xD8AD, 0x4E29, 0x814C, 0x4E2A, 0xB8F6, + 0x4E2B, 0xD1BE, 0x4E2C, 0xE3DC, 0x4E2D, 0xD6D0, 0x4E2E, 0x814D, + 0x4E2F, 0x814E, 0x4E30, 0xB7E1, 0x4E31, 0x814F, 0x4E32, 0xB4AE, + 0x4E33, 0x8150, 0x4E34, 0xC1D9, 0x4E35, 0x8151, 0x4E36, 0xD8BC, + 0x4E37, 0x8152, 0x4E38, 0xCDE8, 0x4E39, 0xB5A4, 0x4E3A, 0xCEAA, + 0x4E3B, 0xD6F7, 0x4E3C, 0x8153, 0x4E3D, 0xC0F6, 0x4E3E, 0xBED9, + 0x4E3F, 0xD8AF, 0x4E40, 0x8154, 0x4E41, 0x8155, 0x4E42, 0x8156, + 0x4E43, 0xC4CB, 0x4E44, 0x8157, 0x4E45, 0xBEC3, 0x4E46, 0x8158, + 0x4E47, 0xD8B1, 0x4E48, 0xC3B4, 0x4E49, 0xD2E5, 0x4E4A, 0x8159, + 0x4E4B, 0xD6AE, 0x4E4C, 0xCEDA, 0x4E4D, 0xD5A7, 0x4E4E, 0xBAF5, + 0x4E4F, 0xB7A6, 0x4E50, 0xC0D6, 0x4E51, 0x815A, 0x4E52, 0xC6B9, + 0x4E53, 0xC5D2, 0x4E54, 0xC7C7, 0x4E55, 0x815B, 0x4E56, 0xB9D4, + 0x4E57, 0x815C, 0x4E58, 0xB3CB, 0x4E59, 0xD2D2, 0x4E5A, 0x815D, + 0x4E5B, 0x815E, 0x4E5C, 0xD8BF, 0x4E5D, 0xBEC5, 0x4E5E, 0xC6F2, + 0x4E5F, 0xD2B2, 0x4E60, 0xCFB0, 0x4E61, 0xCFE7, 0x4E62, 0x815F, + 0x4E63, 0x8160, 0x4E64, 0x8161, 0x4E65, 0x8162, 0x4E66, 0xCAE9, + 0x4E67, 0x8163, 0x4E68, 0x8164, 0x4E69, 0xD8C0, 0x4E6A, 0x8165, + 0x4E6B, 0x8166, 0x4E6C, 0x8167, 0x4E6D, 0x8168, 0x4E6E, 0x8169, + 0x4E6F, 0x816A, 0x4E70, 0xC2F2, 0x4E71, 0xC2D2, 0x4E72, 0x816B, + 0x4E73, 0xC8E9, 0x4E74, 0x816C, 0x4E75, 0x816D, 0x4E76, 0x816E, + 0x4E77, 0x816F, 0x4E78, 0x8170, 0x4E79, 0x8171, 0x4E7A, 0x8172, + 0x4E7B, 0x8173, 0x4E7C, 0x8174, 0x4E7D, 0x8175, 0x4E7E, 0xC7AC, + 0x4E7F, 0x8176, 0x4E80, 0x8177, 0x4E81, 0x8178, 0x4E82, 0x8179, + 0x4E83, 0x817A, 0x4E84, 0x817B, 0x4E85, 0x817C, 0x4E86, 0xC1CB, + 0x4E87, 0x817D, 0x4E88, 0xD3E8, 0x4E89, 0xD5F9, 0x4E8A, 0x817E, + 0x4E8B, 0xCAC2, 0x4E8C, 0xB6FE, 0x4E8D, 0xD8A1, 0x4E8E, 0xD3DA, + 0x4E8F, 0xBFF7, 0x4E90, 0x8180, 0x4E91, 0xD4C6, 0x4E92, 0xBBA5, + 0x4E93, 0xD8C1, 0x4E94, 0xCEE5, 0x4E95, 0xBEAE, 0x4E96, 0x8181, + 0x4E97, 0x8182, 0x4E98, 0xD8A8, 0x4E99, 0x8183, 0x4E9A, 0xD1C7, + 0x4E9B, 0xD0A9, 0x4E9C, 0x8184, 0x4E9D, 0x8185, 0x4E9E, 0x8186, + 0x4E9F, 0xD8BD, 0x4EA0, 0xD9EF, 0x4EA1, 0xCDF6, 0x4EA2, 0xBFBA, + 0x4EA3, 0x8187, 0x4EA4, 0xBDBB, 0x4EA5, 0xBAA5, 0x4EA6, 0xD2E0, + 0x4EA7, 0xB2FA, 0x4EA8, 0xBAE0, 0x4EA9, 0xC4B6, 0x4EAA, 0x8188, + 0x4EAB, 0xCFED, 0x4EAC, 0xBEA9, 0x4EAD, 0xCDA4, 0x4EAE, 0xC1C1, + 0x4EAF, 0x8189, 0x4EB0, 0x818A, 0x4EB1, 0x818B, 0x4EB2, 0xC7D7, + 0x4EB3, 0xD9F1, 0x4EB4, 0x818C, 0x4EB5, 0xD9F4, 0x4EB6, 0x818D, + 0x4EB7, 0x818E, 0x4EB8, 0x818F, 0x4EB9, 0x8190, 0x4EBA, 0xC8CB, + 0x4EBB, 0xD8E9, 0x4EBC, 0x8191, 0x4EBD, 0x8192, 0x4EBE, 0x8193, + 0x4EBF, 0xD2DA, 0x4EC0, 0xCAB2, 0x4EC1, 0xC8CA, 0x4EC2, 0xD8EC, + 0x4EC3, 0xD8EA, 0x4EC4, 0xD8C6, 0x4EC5, 0xBDF6, 0x4EC6, 0xC6CD, + 0x4EC7, 0xB3F0, 0x4EC8, 0x8194, 0x4EC9, 0xD8EB, 0x4ECA, 0xBDF1, + 0x4ECB, 0xBDE9, 0x4ECC, 0x8195, 0x4ECD, 0xC8D4, 0x4ECE, 0xB4D3, + 0x4ECF, 0x8196, 0x4ED0, 0x8197, 0x4ED1, 0xC2D8, 0x4ED2, 0x8198, + 0x4ED3, 0xB2D6, 0x4ED4, 0xD7D0, 0x4ED5, 0xCACB, 0x4ED6, 0xCBFB, + 0x4ED7, 0xD5CC, 0x4ED8, 0xB8B6, 0x4ED9, 0xCFC9, 0x4EDA, 0x8199, + 0x4EDB, 0x819A, 0x4EDC, 0x819B, 0x4EDD, 0xD9DA, 0x4EDE, 0xD8F0, + 0x4EDF, 0xC7AA, 0x4EE0, 0x819C, 0x4EE1, 0xD8EE, 0x4EE2, 0x819D, + 0x4EE3, 0xB4FA, 0x4EE4, 0xC1EE, 0x4EE5, 0xD2D4, 0x4EE6, 0x819E, + 0x4EE7, 0x819F, 0x4EE8, 0xD8ED, 0x4EE9, 0x81A0, 0x4EEA, 0xD2C7, + 0x4EEB, 0xD8EF, 0x4EEC, 0xC3C7, 0x4EED, 0x81A1, 0x4EEE, 0x81A2, + 0x4EEF, 0x81A3, 0x4EF0, 0xD1F6, 0x4EF1, 0x81A4, 0x4EF2, 0xD6D9, + 0x4EF3, 0xD8F2, 0x4EF4, 0x81A5, 0x4EF5, 0xD8F5, 0x4EF6, 0xBCFE, + 0x4EF7, 0xBCDB, 0x4EF8, 0x81A6, 0x4EF9, 0x81A7, 0x4EFA, 0x81A8, + 0x4EFB, 0xC8CE, 0x4EFC, 0x81A9, 0x4EFD, 0xB7DD, 0x4EFE, 0x81AA, + 0x4EFF, 0xB7C2, 0x4F00, 0x81AB, 0x4F01, 0xC6F3, 0x4F02, 0x81AC, + 0x4F03, 0x81AD, 0x4F04, 0x81AE, 0x4F05, 0x81AF, 0x4F06, 0x81B0, + 0x4F07, 0x81B1, 0x4F08, 0x81B2, 0x4F09, 0xD8F8, 0x4F0A, 0xD2C1, + 0x4F0B, 0x81B3, 0x4F0C, 0x81B4, 0x4F0D, 0xCEE9, 0x4F0E, 0xBCBF, + 0x4F0F, 0xB7FC, 0x4F10, 0xB7A5, 0x4F11, 0xD0DD, 0x4F12, 0x81B5, + 0x4F13, 0x81B6, 0x4F14, 0x81B7, 0x4F15, 0x81B8, 0x4F16, 0x81B9, + 0x4F17, 0xD6DA, 0x4F18, 0xD3C5, 0x4F19, 0xBBEF, 0x4F1A, 0xBBE1, + 0x4F1B, 0xD8F1, 0x4F1C, 0x81BA, 0x4F1D, 0x81BB, 0x4F1E, 0xC9A1, + 0x4F1F, 0xCEB0, 0x4F20, 0xB4AB, 0x4F21, 0x81BC, 0x4F22, 0xD8F3, + 0x4F23, 0x81BD, 0x4F24, 0xC9CB, 0x4F25, 0xD8F6, 0x4F26, 0xC2D7, + 0x4F27, 0xD8F7, 0x4F28, 0x81BE, 0x4F29, 0x81BF, 0x4F2A, 0xCEB1, + 0x4F2B, 0xD8F9, 0x4F2C, 0x81C0, 0x4F2D, 0x81C1, 0x4F2E, 0x81C2, + 0x4F2F, 0xB2AE, 0x4F30, 0xB9C0, 0x4F31, 0x81C3, 0x4F32, 0xD9A3, + 0x4F33, 0x81C4, 0x4F34, 0xB0E9, 0x4F35, 0x81C5, 0x4F36, 0xC1E6, + 0x4F37, 0x81C6, 0x4F38, 0xC9EC, 0x4F39, 0x81C7, 0x4F3A, 0xCBC5, + 0x4F3B, 0x81C8, 0x4F3C, 0xCBC6, 0x4F3D, 0xD9A4, 0x4F3E, 0x81C9, + 0x4F3F, 0x81CA, 0x4F40, 0x81CB, 0x4F41, 0x81CC, 0x4F42, 0x81CD, + 0x4F43, 0xB5E8, 0x4F44, 0x81CE, 0x4F45, 0x81CF, 0x4F46, 0xB5AB, + 0x4F47, 0x81D0, 0x4F48, 0x81D1, 0x4F49, 0x81D2, 0x4F4A, 0x81D3, + 0x4F4B, 0x81D4, 0x4F4C, 0x81D5, 0x4F4D, 0xCEBB, 0x4F4E, 0xB5CD, + 0x4F4F, 0xD7A1, 0x4F50, 0xD7F4, 0x4F51, 0xD3D3, 0x4F52, 0x81D6, + 0x4F53, 0xCCE5, 0x4F54, 0x81D7, 0x4F55, 0xBACE, 0x4F56, 0x81D8, + 0x4F57, 0xD9A2, 0x4F58, 0xD9DC, 0x4F59, 0xD3E0, 0x4F5A, 0xD8FD, + 0x4F5B, 0xB7F0, 0x4F5C, 0xD7F7, 0x4F5D, 0xD8FE, 0x4F5E, 0xD8FA, + 0x4F5F, 0xD9A1, 0x4F60, 0xC4E3, 0x4F61, 0x81D9, 0x4F62, 0x81DA, + 0x4F63, 0xD3B6, 0x4F64, 0xD8F4, 0x4F65, 0xD9DD, 0x4F66, 0x81DB, + 0x4F67, 0xD8FB, 0x4F68, 0x81DC, 0x4F69, 0xC5E5, 0x4F6A, 0x81DD, + 0x4F6B, 0x81DE, 0x4F6C, 0xC0D0, 0x4F6D, 0x81DF, 0x4F6E, 0x81E0, + 0x4F6F, 0xD1F0, 0x4F70, 0xB0DB, 0x4F71, 0x81E1, 0x4F72, 0x81E2, + 0x4F73, 0xBCD1, 0x4F74, 0xD9A6, 0x4F75, 0x81E3, 0x4F76, 0xD9A5, + 0x4F77, 0x81E4, 0x4F78, 0x81E5, 0x4F79, 0x81E6, 0x4F7A, 0x81E7, + 0x4F7B, 0xD9AC, 0x4F7C, 0xD9AE, 0x4F7D, 0x81E8, 0x4F7E, 0xD9AB, + 0x4F7F, 0xCAB9, 0x4F80, 0x81E9, 0x4F81, 0x81EA, 0x4F82, 0x81EB, + 0x4F83, 0xD9A9, 0x4F84, 0xD6B6, 0x4F85, 0x81EC, 0x4F86, 0x81ED, + 0x4F87, 0x81EE, 0x4F88, 0xB3DE, 0x4F89, 0xD9A8, 0x4F8A, 0x81EF, + 0x4F8B, 0xC0FD, 0x4F8C, 0x81F0, 0x4F8D, 0xCACC, 0x4F8E, 0x81F1, + 0x4F8F, 0xD9AA, 0x4F90, 0x81F2, 0x4F91, 0xD9A7, 0x4F92, 0x81F3, + 0x4F93, 0x81F4, 0x4F94, 0xD9B0, 0x4F95, 0x81F5, 0x4F96, 0x81F6, + 0x4F97, 0xB6B1, 0x4F98, 0x81F7, 0x4F99, 0x81F8, 0x4F9A, 0x81F9, + 0x4F9B, 0xB9A9, 0x4F9C, 0x81FA, 0x4F9D, 0xD2C0, 0x4F9E, 0x81FB, + 0x4F9F, 0x81FC, 0x4FA0, 0xCFC0, 0x4FA1, 0x81FD, 0x4FA2, 0x81FE, + 0x4FA3, 0xC2C2, 0x4FA4, 0x8240, 0x4FA5, 0xBDC4, 0x4FA6, 0xD5EC, + 0x4FA7, 0xB2E0, 0x4FA8, 0xC7C8, 0x4FA9, 0xBFEB, 0x4FAA, 0xD9AD, + 0x4FAB, 0x8241, 0x4FAC, 0xD9AF, 0x4FAD, 0x8242, 0x4FAE, 0xCEEA, + 0x4FAF, 0xBAEE, 0x4FB0, 0x8243, 0x4FB1, 0x8244, 0x4FB2, 0x8245, + 0x4FB3, 0x8246, 0x4FB4, 0x8247, 0x4FB5, 0xC7D6, 0x4FB6, 0x8248, + 0x4FB7, 0x8249, 0x4FB8, 0x824A, 0x4FB9, 0x824B, 0x4FBA, 0x824C, + 0x4FBB, 0x824D, 0x4FBC, 0x824E, 0x4FBD, 0x824F, 0x4FBE, 0x8250, + 0x4FBF, 0xB1E3, 0x4FC0, 0x8251, 0x4FC1, 0x8252, 0x4FC2, 0x8253, + 0x4FC3, 0xB4D9, 0x4FC4, 0xB6ED, 0x4FC5, 0xD9B4, 0x4FC6, 0x8254, + 0x4FC7, 0x8255, 0x4FC8, 0x8256, 0x4FC9, 0x8257, 0x4FCA, 0xBFA1, + 0x4FCB, 0x8258, 0x4FCC, 0x8259, 0x4FCD, 0x825A, 0x4FCE, 0xD9DE, + 0x4FCF, 0xC7CE, 0x4FD0, 0xC0FE, 0x4FD1, 0xD9B8, 0x4FD2, 0x825B, + 0x4FD3, 0x825C, 0x4FD4, 0x825D, 0x4FD5, 0x825E, 0x4FD6, 0x825F, + 0x4FD7, 0xCBD7, 0x4FD8, 0xB7FD, 0x4FD9, 0x8260, 0x4FDA, 0xD9B5, + 0x4FDB, 0x8261, 0x4FDC, 0xD9B7, 0x4FDD, 0xB1A3, 0x4FDE, 0xD3E1, + 0x4FDF, 0xD9B9, 0x4FE0, 0x8262, 0x4FE1, 0xD0C5, 0x4FE2, 0x8263, + 0x4FE3, 0xD9B6, 0x4FE4, 0x8264, 0x4FE5, 0x8265, 0x4FE6, 0xD9B1, + 0x4FE7, 0x8266, 0x4FE8, 0xD9B2, 0x4FE9, 0xC1A9, 0x4FEA, 0xD9B3, + 0x4FEB, 0x8267, 0x4FEC, 0x8268, 0x4FED, 0xBCF3, 0x4FEE, 0xD0DE, + 0x4FEF, 0xB8A9, 0x4FF0, 0x8269, 0x4FF1, 0xBEE3, 0x4FF2, 0x826A, + 0x4FF3, 0xD9BD, 0x4FF4, 0x826B, 0x4FF5, 0x826C, 0x4FF6, 0x826D, + 0x4FF7, 0x826E, 0x4FF8, 0xD9BA, 0x4FF9, 0x826F, 0x4FFA, 0xB0B3, + 0x4FFB, 0x8270, 0x4FFC, 0x8271, 0x4FFD, 0x8272, 0x4FFE, 0xD9C2, + 0x4FFF, 0x8273, 0x5000, 0x8274, 0x5001, 0x8275, 0x5002, 0x8276, + 0x5003, 0x8277, 0x5004, 0x8278, 0x5005, 0x8279, 0x5006, 0x827A, + 0x5007, 0x827B, 0x5008, 0x827C, 0x5009, 0x827D, 0x500A, 0x827E, + 0x500B, 0x8280, 0x500C, 0xD9C4, 0x500D, 0xB1B6, 0x500E, 0x8281, + 0x500F, 0xD9BF, 0x5010, 0x8282, 0x5011, 0x8283, 0x5012, 0xB5B9, + 0x5013, 0x8284, 0x5014, 0xBEF3, 0x5015, 0x8285, 0x5016, 0x8286, + 0x5017, 0x8287, 0x5018, 0xCCC8, 0x5019, 0xBAF2, 0x501A, 0xD2D0, + 0x501B, 0x8288, 0x501C, 0xD9C3, 0x501D, 0x8289, 0x501E, 0x828A, + 0x501F, 0xBDE8, 0x5020, 0x828B, 0x5021, 0xB3AB, 0x5022, 0x828C, + 0x5023, 0x828D, 0x5024, 0x828E, 0x5025, 0xD9C5, 0x5026, 0xBEEB, + 0x5027, 0x828F, 0x5028, 0xD9C6, 0x5029, 0xD9BB, 0x502A, 0xC4DF, + 0x502B, 0x8290, 0x502C, 0xD9BE, 0x502D, 0xD9C1, 0x502E, 0xD9C0, + 0x502F, 0x8291, 0x5030, 0x8292, 0x5031, 0x8293, 0x5032, 0x8294, + 0x5033, 0x8295, 0x5034, 0x8296, 0x5035, 0x8297, 0x5036, 0x8298, + 0x5037, 0x8299, 0x5038, 0x829A, 0x5039, 0x829B, 0x503A, 0xD5AE, + 0x503B, 0x829C, 0x503C, 0xD6B5, 0x503D, 0x829D, 0x503E, 0xC7E3, + 0x503F, 0x829E, 0x5040, 0x829F, 0x5041, 0x82A0, 0x5042, 0x82A1, + 0x5043, 0xD9C8, 0x5044, 0x82A2, 0x5045, 0x82A3, 0x5046, 0x82A4, + 0x5047, 0xBCD9, 0x5048, 0xD9CA, 0x5049, 0x82A5, 0x504A, 0x82A6, + 0x504B, 0x82A7, 0x504C, 0xD9BC, 0x504D, 0x82A8, 0x504E, 0xD9CB, + 0x504F, 0xC6AB, 0x5050, 0x82A9, 0x5051, 0x82AA, 0x5052, 0x82AB, + 0x5053, 0x82AC, 0x5054, 0x82AD, 0x5055, 0xD9C9, 0x5056, 0x82AE, + 0x5057, 0x82AF, 0x5058, 0x82B0, 0x5059, 0x82B1, 0x505A, 0xD7F6, + 0x505B, 0x82B2, 0x505C, 0xCDA3, 0x505D, 0x82B3, 0x505E, 0x82B4, + 0x505F, 0x82B5, 0x5060, 0x82B6, 0x5061, 0x82B7, 0x5062, 0x82B8, + 0x5063, 0x82B9, 0x5064, 0x82BA, 0x5065, 0xBDA1, 0x5066, 0x82BB, + 0x5067, 0x82BC, 0x5068, 0x82BD, 0x5069, 0x82BE, 0x506A, 0x82BF, + 0x506B, 0x82C0, 0x506C, 0xD9CC, 0x506D, 0x82C1, 0x506E, 0x82C2, + 0x506F, 0x82C3, 0x5070, 0x82C4, 0x5071, 0x82C5, 0x5072, 0x82C6, + 0x5073, 0x82C7, 0x5074, 0x82C8, 0x5075, 0x82C9, 0x5076, 0xC5BC, + 0x5077, 0xCDB5, 0x5078, 0x82CA, 0x5079, 0x82CB, 0x507A, 0x82CC, + 0x507B, 0xD9CD, 0x507C, 0x82CD, 0x507D, 0x82CE, 0x507E, 0xD9C7, + 0x507F, 0xB3A5, 0x5080, 0xBFFE, 0x5081, 0x82CF, 0x5082, 0x82D0, + 0x5083, 0x82D1, 0x5084, 0x82D2, 0x5085, 0xB8B5, 0x5086, 0x82D3, + 0x5087, 0x82D4, 0x5088, 0xC0FC, 0x5089, 0x82D5, 0x508A, 0x82D6, + 0x508B, 0x82D7, 0x508C, 0x82D8, 0x508D, 0xB0F8, 0x508E, 0x82D9, + 0x508F, 0x82DA, 0x5090, 0x82DB, 0x5091, 0x82DC, 0x5092, 0x82DD, + 0x5093, 0x82DE, 0x5094, 0x82DF, 0x5095, 0x82E0, 0x5096, 0x82E1, + 0x5097, 0x82E2, 0x5098, 0x82E3, 0x5099, 0x82E4, 0x509A, 0x82E5, + 0x509B, 0x82E6, 0x509C, 0x82E7, 0x509D, 0x82E8, 0x509E, 0x82E9, + 0x509F, 0x82EA, 0x50A0, 0x82EB, 0x50A1, 0x82EC, 0x50A2, 0x82ED, + 0x50A3, 0xB4F6, 0x50A4, 0x82EE, 0x50A5, 0xD9CE, 0x50A6, 0x82EF, + 0x50A7, 0xD9CF, 0x50A8, 0xB4A2, 0x50A9, 0xD9D0, 0x50AA, 0x82F0, + 0x50AB, 0x82F1, 0x50AC, 0xB4DF, 0x50AD, 0x82F2, 0x50AE, 0x82F3, + 0x50AF, 0x82F4, 0x50B0, 0x82F5, 0x50B1, 0x82F6, 0x50B2, 0xB0C1, + 0x50B3, 0x82F7, 0x50B4, 0x82F8, 0x50B5, 0x82F9, 0x50B6, 0x82FA, + 0x50B7, 0x82FB, 0x50B8, 0x82FC, 0x50B9, 0x82FD, 0x50BA, 0xD9D1, + 0x50BB, 0xC9B5, 0x50BC, 0x82FE, 0x50BD, 0x8340, 0x50BE, 0x8341, + 0x50BF, 0x8342, 0x50C0, 0x8343, 0x50C1, 0x8344, 0x50C2, 0x8345, + 0x50C3, 0x8346, 0x50C4, 0x8347, 0x50C5, 0x8348, 0x50C6, 0x8349, + 0x50C7, 0x834A, 0x50C8, 0x834B, 0x50C9, 0x834C, 0x50CA, 0x834D, + 0x50CB, 0x834E, 0x50CC, 0x834F, 0x50CD, 0x8350, 0x50CE, 0x8351, + 0x50CF, 0xCFF1, 0x50D0, 0x8352, 0x50D1, 0x8353, 0x50D2, 0x8354, + 0x50D3, 0x8355, 0x50D4, 0x8356, 0x50D5, 0x8357, 0x50D6, 0xD9D2, + 0x50D7, 0x8358, 0x50D8, 0x8359, 0x50D9, 0x835A, 0x50DA, 0xC1C5, + 0x50DB, 0x835B, 0x50DC, 0x835C, 0x50DD, 0x835D, 0x50DE, 0x835E, + 0x50DF, 0x835F, 0x50E0, 0x8360, 0x50E1, 0x8361, 0x50E2, 0x8362, + 0x50E3, 0x8363, 0x50E4, 0x8364, 0x50E5, 0x8365, 0x50E6, 0xD9D6, + 0x50E7, 0xC9AE, 0x50E8, 0x8366, 0x50E9, 0x8367, 0x50EA, 0x8368, + 0x50EB, 0x8369, 0x50EC, 0xD9D5, 0x50ED, 0xD9D4, 0x50EE, 0xD9D7, + 0x50EF, 0x836A, 0x50F0, 0x836B, 0x50F1, 0x836C, 0x50F2, 0x836D, + 0x50F3, 0xCBDB, 0x50F4, 0x836E, 0x50F5, 0xBDA9, 0x50F6, 0x836F, + 0x50F7, 0x8370, 0x50F8, 0x8371, 0x50F9, 0x8372, 0x50FA, 0x8373, + 0x50FB, 0xC6A7, 0x50FC, 0x8374, 0x50FD, 0x8375, 0x50FE, 0x8376, + 0x50FF, 0x8377, 0x5100, 0x8378, 0x5101, 0x8379, 0x5102, 0x837A, + 0x5103, 0x837B, 0x5104, 0x837C, 0x5105, 0x837D, 0x5106, 0xD9D3, + 0x5107, 0xD9D8, 0x5108, 0x837E, 0x5109, 0x8380, 0x510A, 0x8381, + 0x510B, 0xD9D9, 0x510C, 0x8382, 0x510D, 0x8383, 0x510E, 0x8384, + 0x510F, 0x8385, 0x5110, 0x8386, 0x5111, 0x8387, 0x5112, 0xC8E5, + 0x5113, 0x8388, 0x5114, 0x8389, 0x5115, 0x838A, 0x5116, 0x838B, + 0x5117, 0x838C, 0x5118, 0x838D, 0x5119, 0x838E, 0x511A, 0x838F, + 0x511B, 0x8390, 0x511C, 0x8391, 0x511D, 0x8392, 0x511E, 0x8393, + 0x511F, 0x8394, 0x5120, 0x8395, 0x5121, 0xC0DC, 0x5122, 0x8396, + 0x5123, 0x8397, 0x5124, 0x8398, 0x5125, 0x8399, 0x5126, 0x839A, + 0x5127, 0x839B, 0x5128, 0x839C, 0x5129, 0x839D, 0x512A, 0x839E, + 0x512B, 0x839F, 0x512C, 0x83A0, 0x512D, 0x83A1, 0x512E, 0x83A2, + 0x512F, 0x83A3, 0x5130, 0x83A4, 0x5131, 0x83A5, 0x5132, 0x83A6, + 0x5133, 0x83A7, 0x5134, 0x83A8, 0x5135, 0x83A9, 0x5136, 0x83AA, + 0x5137, 0x83AB, 0x5138, 0x83AC, 0x5139, 0x83AD, 0x513A, 0x83AE, + 0x513B, 0x83AF, 0x513C, 0x83B0, 0x513D, 0x83B1, 0x513E, 0x83B2, + 0x513F, 0xB6F9, 0x5140, 0xD8A3, 0x5141, 0xD4CA, 0x5142, 0x83B3, + 0x5143, 0xD4AA, 0x5144, 0xD0D6, 0x5145, 0xB3E4, 0x5146, 0xD5D7, + 0x5147, 0x83B4, 0x5148, 0xCFC8, 0x5149, 0xB9E2, 0x514A, 0x83B5, + 0x514B, 0xBFCB, 0x514C, 0x83B6, 0x514D, 0xC3E2, 0x514E, 0x83B7, + 0x514F, 0x83B8, 0x5150, 0x83B9, 0x5151, 0xB6D2, 0x5152, 0x83BA, + 0x5153, 0x83BB, 0x5154, 0xCDC3, 0x5155, 0xD9EE, 0x5156, 0xD9F0, + 0x5157, 0x83BC, 0x5158, 0x83BD, 0x5159, 0x83BE, 0x515A, 0xB5B3, + 0x515B, 0x83BF, 0x515C, 0xB6B5, 0x515D, 0x83C0, 0x515E, 0x83C1, + 0x515F, 0x83C2, 0x5160, 0x83C3, 0x5161, 0x83C4, 0x5162, 0xBEA4, + 0x5163, 0x83C5, 0x5164, 0x83C6, 0x5165, 0xC8EB, 0x5166, 0x83C7, + 0x5167, 0x83C8, 0x5168, 0xC8AB, 0x5169, 0x83C9, 0x516A, 0x83CA, + 0x516B, 0xB0CB, 0x516C, 0xB9AB, 0x516D, 0xC1F9, 0x516E, 0xD9E2, + 0x516F, 0x83CB, 0x5170, 0xC0BC, 0x5171, 0xB9B2, 0x5172, 0x83CC, + 0x5173, 0xB9D8, 0x5174, 0xD0CB, 0x5175, 0xB1F8, 0x5176, 0xC6E4, + 0x5177, 0xBEDF, 0x5178, 0xB5E4, 0x5179, 0xD7C8, 0x517A, 0x83CD, + 0x517B, 0xD1F8, 0x517C, 0xBCE6, 0x517D, 0xCADE, 0x517E, 0x83CE, + 0x517F, 0x83CF, 0x5180, 0xBCBD, 0x5181, 0xD9E6, 0x5182, 0xD8E7, + 0x5183, 0x83D0, 0x5184, 0x83D1, 0x5185, 0xC4DA, 0x5186, 0x83D2, + 0x5187, 0x83D3, 0x5188, 0xB8D4, 0x5189, 0xC8BD, 0x518A, 0x83D4, + 0x518B, 0x83D5, 0x518C, 0xB2E1, 0x518D, 0xD4D9, 0x518E, 0x83D6, + 0x518F, 0x83D7, 0x5190, 0x83D8, 0x5191, 0x83D9, 0x5192, 0xC3B0, + 0x5193, 0x83DA, 0x5194, 0x83DB, 0x5195, 0xC3E1, 0x5196, 0xDAA2, + 0x5197, 0xC8DF, 0x5198, 0x83DC, 0x5199, 0xD0B4, 0x519A, 0x83DD, + 0x519B, 0xBEFC, 0x519C, 0xC5A9, 0x519D, 0x83DE, 0x519E, 0x83DF, + 0x519F, 0x83E0, 0x51A0, 0xB9DA, 0x51A1, 0x83E1, 0x51A2, 0xDAA3, + 0x51A3, 0x83E2, 0x51A4, 0xD4A9, 0x51A5, 0xDAA4, 0x51A6, 0x83E3, + 0x51A7, 0x83E4, 0x51A8, 0x83E5, 0x51A9, 0x83E6, 0x51AA, 0x83E7, + 0x51AB, 0xD9FB, 0x51AC, 0xB6AC, 0x51AD, 0x83E8, 0x51AE, 0x83E9, + 0x51AF, 0xB7EB, 0x51B0, 0xB1F9, 0x51B1, 0xD9FC, 0x51B2, 0xB3E5, + 0x51B3, 0xBEF6, 0x51B4, 0x83EA, 0x51B5, 0xBFF6, 0x51B6, 0xD2B1, + 0x51B7, 0xC0E4, 0x51B8, 0x83EB, 0x51B9, 0x83EC, 0x51BA, 0x83ED, + 0x51BB, 0xB6B3, 0x51BC, 0xD9FE, 0x51BD, 0xD9FD, 0x51BE, 0x83EE, + 0x51BF, 0x83EF, 0x51C0, 0xBEBB, 0x51C1, 0x83F0, 0x51C2, 0x83F1, + 0x51C3, 0x83F2, 0x51C4, 0xC6E0, 0x51C5, 0x83F3, 0x51C6, 0xD7BC, + 0x51C7, 0xDAA1, 0x51C8, 0x83F4, 0x51C9, 0xC1B9, 0x51CA, 0x83F5, + 0x51CB, 0xB5F2, 0x51CC, 0xC1E8, 0x51CD, 0x83F6, 0x51CE, 0x83F7, + 0x51CF, 0xBCF5, 0x51D0, 0x83F8, 0x51D1, 0xB4D5, 0x51D2, 0x83F9, + 0x51D3, 0x83FA, 0x51D4, 0x83FB, 0x51D5, 0x83FC, 0x51D6, 0x83FD, + 0x51D7, 0x83FE, 0x51D8, 0x8440, 0x51D9, 0x8441, 0x51DA, 0x8442, + 0x51DB, 0xC1DD, 0x51DC, 0x8443, 0x51DD, 0xC4FD, 0x51DE, 0x8444, + 0x51DF, 0x8445, 0x51E0, 0xBCB8, 0x51E1, 0xB7B2, 0x51E2, 0x8446, + 0x51E3, 0x8447, 0x51E4, 0xB7EF, 0x51E5, 0x8448, 0x51E6, 0x8449, + 0x51E7, 0x844A, 0x51E8, 0x844B, 0x51E9, 0x844C, 0x51EA, 0x844D, + 0x51EB, 0xD9EC, 0x51EC, 0x844E, 0x51ED, 0xC6BE, 0x51EE, 0x844F, + 0x51EF, 0xBFAD, 0x51F0, 0xBBCB, 0x51F1, 0x8450, 0x51F2, 0x8451, + 0x51F3, 0xB5CA, 0x51F4, 0x8452, 0x51F5, 0xDBC9, 0x51F6, 0xD0D7, + 0x51F7, 0x8453, 0x51F8, 0xCDB9, 0x51F9, 0xB0BC, 0x51FA, 0xB3F6, + 0x51FB, 0xBBF7, 0x51FC, 0xDBCA, 0x51FD, 0xBAAF, 0x51FE, 0x8454, + 0x51FF, 0xD4E4, 0x5200, 0xB5B6, 0x5201, 0xB5F3, 0x5202, 0xD8D6, + 0x5203, 0xC8D0, 0x5204, 0x8455, 0x5205, 0x8456, 0x5206, 0xB7D6, + 0x5207, 0xC7D0, 0x5208, 0xD8D7, 0x5209, 0x8457, 0x520A, 0xBFAF, + 0x520B, 0x8458, 0x520C, 0x8459, 0x520D, 0xDBBB, 0x520E, 0xD8D8, + 0x520F, 0x845A, 0x5210, 0x845B, 0x5211, 0xD0CC, 0x5212, 0xBBAE, + 0x5213, 0x845C, 0x5214, 0x845D, 0x5215, 0x845E, 0x5216, 0xEBBE, + 0x5217, 0xC1D0, 0x5218, 0xC1F5, 0x5219, 0xD4F2, 0x521A, 0xB8D5, + 0x521B, 0xB4B4, 0x521C, 0x845F, 0x521D, 0xB3F5, 0x521E, 0x8460, + 0x521F, 0x8461, 0x5220, 0xC9BE, 0x5221, 0x8462, 0x5222, 0x8463, + 0x5223, 0x8464, 0x5224, 0xC5D0, 0x5225, 0x8465, 0x5226, 0x8466, + 0x5227, 0x8467, 0x5228, 0xC5D9, 0x5229, 0xC0FB, 0x522A, 0x8468, + 0x522B, 0xB1F0, 0x522C, 0x8469, 0x522D, 0xD8D9, 0x522E, 0xB9CE, + 0x522F, 0x846A, 0x5230, 0xB5BD, 0x5231, 0x846B, 0x5232, 0x846C, + 0x5233, 0xD8DA, 0x5234, 0x846D, 0x5235, 0x846E, 0x5236, 0xD6C6, + 0x5237, 0xCBA2, 0x5238, 0xC8AF, 0x5239, 0xC9B2, 0x523A, 0xB4CC, + 0x523B, 0xBFCC, 0x523C, 0x846F, 0x523D, 0xB9F4, 0x523E, 0x8470, + 0x523F, 0xD8DB, 0x5240, 0xD8DC, 0x5241, 0xB6E7, 0x5242, 0xBCC1, + 0x5243, 0xCCEA, 0x5244, 0x8471, 0x5245, 0x8472, 0x5246, 0x8473, + 0x5247, 0x8474, 0x5248, 0x8475, 0x5249, 0x8476, 0x524A, 0xCFF7, + 0x524B, 0x8477, 0x524C, 0xD8DD, 0x524D, 0xC7B0, 0x524E, 0x8478, + 0x524F, 0x8479, 0x5250, 0xB9D0, 0x5251, 0xBDA3, 0x5252, 0x847A, + 0x5253, 0x847B, 0x5254, 0xCCDE, 0x5255, 0x847C, 0x5256, 0xC6CA, + 0x5257, 0x847D, 0x5258, 0x847E, 0x5259, 0x8480, 0x525A, 0x8481, + 0x525B, 0x8482, 0x525C, 0xD8E0, 0x525D, 0x8483, 0x525E, 0xD8DE, + 0x525F, 0x8484, 0x5260, 0x8485, 0x5261, 0xD8DF, 0x5262, 0x8486, + 0x5263, 0x8487, 0x5264, 0x8488, 0x5265, 0xB0FE, 0x5266, 0x8489, + 0x5267, 0xBEE7, 0x5268, 0x848A, 0x5269, 0xCAA3, 0x526A, 0xBCF4, + 0x526B, 0x848B, 0x526C, 0x848C, 0x526D, 0x848D, 0x526E, 0x848E, + 0x526F, 0xB8B1, 0x5270, 0x848F, 0x5271, 0x8490, 0x5272, 0xB8EE, + 0x5273, 0x8491, 0x5274, 0x8492, 0x5275, 0x8493, 0x5276, 0x8494, + 0x5277, 0x8495, 0x5278, 0x8496, 0x5279, 0x8497, 0x527A, 0x8498, + 0x527B, 0x8499, 0x527C, 0x849A, 0x527D, 0xD8E2, 0x527E, 0x849B, + 0x527F, 0xBDCB, 0x5280, 0x849C, 0x5281, 0xD8E4, 0x5282, 0xD8E3, + 0x5283, 0x849D, 0x5284, 0x849E, 0x5285, 0x849F, 0x5286, 0x84A0, + 0x5287, 0x84A1, 0x5288, 0xC5FC, 0x5289, 0x84A2, 0x528A, 0x84A3, + 0x528B, 0x84A4, 0x528C, 0x84A5, 0x528D, 0x84A6, 0x528E, 0x84A7, + 0x528F, 0x84A8, 0x5290, 0xD8E5, 0x5291, 0x84A9, 0x5292, 0x84AA, + 0x5293, 0xD8E6, 0x5294, 0x84AB, 0x5295, 0x84AC, 0x5296, 0x84AD, + 0x5297, 0x84AE, 0x5298, 0x84AF, 0x5299, 0x84B0, 0x529A, 0x84B1, + 0x529B, 0xC1A6, 0x529C, 0x84B2, 0x529D, 0xC8B0, 0x529E, 0xB0EC, + 0x529F, 0xB9A6, 0x52A0, 0xBCD3, 0x52A1, 0xCEF1, 0x52A2, 0xDBBD, + 0x52A3, 0xC1D3, 0x52A4, 0x84B3, 0x52A5, 0x84B4, 0x52A6, 0x84B5, + 0x52A7, 0x84B6, 0x52A8, 0xB6AF, 0x52A9, 0xD6FA, 0x52AA, 0xC5AC, + 0x52AB, 0xBDD9, 0x52AC, 0xDBBE, 0x52AD, 0xDBBF, 0x52AE, 0x84B7, + 0x52AF, 0x84B8, 0x52B0, 0x84B9, 0x52B1, 0xC0F8, 0x52B2, 0xBEA2, + 0x52B3, 0xC0CD, 0x52B4, 0x84BA, 0x52B5, 0x84BB, 0x52B6, 0x84BC, + 0x52B7, 0x84BD, 0x52B8, 0x84BE, 0x52B9, 0x84BF, 0x52BA, 0x84C0, + 0x52BB, 0x84C1, 0x52BC, 0x84C2, 0x52BD, 0x84C3, 0x52BE, 0xDBC0, + 0x52BF, 0xCAC6, 0x52C0, 0x84C4, 0x52C1, 0x84C5, 0x52C2, 0x84C6, + 0x52C3, 0xB2AA, 0x52C4, 0x84C7, 0x52C5, 0x84C8, 0x52C6, 0x84C9, + 0x52C7, 0xD3C2, 0x52C8, 0x84CA, 0x52C9, 0xC3E3, 0x52CA, 0x84CB, + 0x52CB, 0xD1AB, 0x52CC, 0x84CC, 0x52CD, 0x84CD, 0x52CE, 0x84CE, + 0x52CF, 0x84CF, 0x52D0, 0xDBC2, 0x52D1, 0x84D0, 0x52D2, 0xC0D5, + 0x52D3, 0x84D1, 0x52D4, 0x84D2, 0x52D5, 0x84D3, 0x52D6, 0xDBC3, + 0x52D7, 0x84D4, 0x52D8, 0xBFB1, 0x52D9, 0x84D5, 0x52DA, 0x84D6, + 0x52DB, 0x84D7, 0x52DC, 0x84D8, 0x52DD, 0x84D9, 0x52DE, 0x84DA, + 0x52DF, 0xC4BC, 0x52E0, 0x84DB, 0x52E1, 0x84DC, 0x52E2, 0x84DD, + 0x52E3, 0x84DE, 0x52E4, 0xC7DA, 0x52E5, 0x84DF, 0x52E6, 0x84E0, + 0x52E7, 0x84E1, 0x52E8, 0x84E2, 0x52E9, 0x84E3, 0x52EA, 0x84E4, + 0x52EB, 0x84E5, 0x52EC, 0x84E6, 0x52ED, 0x84E7, 0x52EE, 0x84E8, + 0x52EF, 0x84E9, 0x52F0, 0xDBC4, 0x52F1, 0x84EA, 0x52F2, 0x84EB, + 0x52F3, 0x84EC, 0x52F4, 0x84ED, 0x52F5, 0x84EE, 0x52F6, 0x84EF, + 0x52F7, 0x84F0, 0x52F8, 0x84F1, 0x52F9, 0xD9E8, 0x52FA, 0xC9D7, + 0x52FB, 0x84F2, 0x52FC, 0x84F3, 0x52FD, 0x84F4, 0x52FE, 0xB9B4, + 0x52FF, 0xCEF0, 0x5300, 0xD4C8, 0x5301, 0x84F5, 0x5302, 0x84F6, + 0x5303, 0x84F7, 0x5304, 0x84F8, 0x5305, 0xB0FC, 0x5306, 0xB4D2, + 0x5307, 0x84F9, 0x5308, 0xD0D9, 0x5309, 0x84FA, 0x530A, 0x84FB, + 0x530B, 0x84FC, 0x530C, 0x84FD, 0x530D, 0xD9E9, 0x530E, 0x84FE, + 0x530F, 0xDECB, 0x5310, 0xD9EB, 0x5311, 0x8540, 0x5312, 0x8541, + 0x5313, 0x8542, 0x5314, 0x8543, 0x5315, 0xD8B0, 0x5316, 0xBBAF, + 0x5317, 0xB1B1, 0x5318, 0x8544, 0x5319, 0xB3D7, 0x531A, 0xD8CE, + 0x531B, 0x8545, 0x531C, 0x8546, 0x531D, 0xD4D1, 0x531E, 0x8547, + 0x531F, 0x8548, 0x5320, 0xBDB3, 0x5321, 0xBFEF, 0x5322, 0x8549, + 0x5323, 0xCFBB, 0x5324, 0x854A, 0x5325, 0x854B, 0x5326, 0xD8D0, + 0x5327, 0x854C, 0x5328, 0x854D, 0x5329, 0x854E, 0x532A, 0xB7CB, + 0x532B, 0x854F, 0x532C, 0x8550, 0x532D, 0x8551, 0x532E, 0xD8D1, + 0x532F, 0x8552, 0x5330, 0x8553, 0x5331, 0x8554, 0x5332, 0x8555, + 0x5333, 0x8556, 0x5334, 0x8557, 0x5335, 0x8558, 0x5336, 0x8559, + 0x5337, 0x855A, 0x5338, 0x855B, 0x5339, 0xC6A5, 0x533A, 0xC7F8, + 0x533B, 0xD2BD, 0x533C, 0x855C, 0x533D, 0x855D, 0x533E, 0xD8D2, + 0x533F, 0xC4E4, 0x5340, 0x855E, 0x5341, 0xCAAE, 0x5342, 0x855F, + 0x5343, 0xC7A7, 0x5344, 0x8560, 0x5345, 0xD8A6, 0x5346, 0x8561, + 0x5347, 0xC9FD, 0x5348, 0xCEE7, 0x5349, 0xBBDC, 0x534A, 0xB0EB, + 0x534B, 0x8562, 0x534C, 0x8563, 0x534D, 0x8564, 0x534E, 0xBBAA, + 0x534F, 0xD0AD, 0x5350, 0x8565, 0x5351, 0xB1B0, 0x5352, 0xD7E4, + 0x5353, 0xD7BF, 0x5354, 0x8566, 0x5355, 0xB5A5, 0x5356, 0xC2F4, + 0x5357, 0xC4CF, 0x5358, 0x8567, 0x5359, 0x8568, 0x535A, 0xB2A9, + 0x535B, 0x8569, 0x535C, 0xB2B7, 0x535D, 0x856A, 0x535E, 0xB1E5, + 0x535F, 0xDFB2, 0x5360, 0xD5BC, 0x5361, 0xBFA8, 0x5362, 0xC2AC, + 0x5363, 0xD8D5, 0x5364, 0xC2B1, 0x5365, 0x856B, 0x5366, 0xD8D4, + 0x5367, 0xCED4, 0x5368, 0x856C, 0x5369, 0xDAE0, 0x536A, 0x856D, + 0x536B, 0xCEC0, 0x536C, 0x856E, 0x536D, 0x856F, 0x536E, 0xD8B4, + 0x536F, 0xC3AE, 0x5370, 0xD3A1, 0x5371, 0xCEA3, 0x5372, 0x8570, + 0x5373, 0xBCB4, 0x5374, 0xC8B4, 0x5375, 0xC2D1, 0x5376, 0x8571, + 0x5377, 0xBEED, 0x5378, 0xD0B6, 0x5379, 0x8572, 0x537A, 0xDAE1, + 0x537B, 0x8573, 0x537C, 0x8574, 0x537D, 0x8575, 0x537E, 0x8576, + 0x537F, 0xC7E4, 0x5380, 0x8577, 0x5381, 0x8578, 0x5382, 0xB3A7, + 0x5383, 0x8579, 0x5384, 0xB6F2, 0x5385, 0xCCFC, 0x5386, 0xC0FA, + 0x5387, 0x857A, 0x5388, 0x857B, 0x5389, 0xC0F7, 0x538A, 0x857C, + 0x538B, 0xD1B9, 0x538C, 0xD1E1, 0x538D, 0xD8C7, 0x538E, 0x857D, + 0x538F, 0x857E, 0x5390, 0x8580, 0x5391, 0x8581, 0x5392, 0x8582, + 0x5393, 0x8583, 0x5394, 0x8584, 0x5395, 0xB2DE, 0x5396, 0x8585, + 0x5397, 0x8586, 0x5398, 0xC0E5, 0x5399, 0x8587, 0x539A, 0xBAF1, + 0x539B, 0x8588, 0x539C, 0x8589, 0x539D, 0xD8C8, 0x539E, 0x858A, + 0x539F, 0xD4AD, 0x53A0, 0x858B, 0x53A1, 0x858C, 0x53A2, 0xCFE1, + 0x53A3, 0xD8C9, 0x53A4, 0x858D, 0x53A5, 0xD8CA, 0x53A6, 0xCFC3, + 0x53A7, 0x858E, 0x53A8, 0xB3F8, 0x53A9, 0xBEC7, 0x53AA, 0x858F, + 0x53AB, 0x8590, 0x53AC, 0x8591, 0x53AD, 0x8592, 0x53AE, 0xD8CB, + 0x53AF, 0x8593, 0x53B0, 0x8594, 0x53B1, 0x8595, 0x53B2, 0x8596, + 0x53B3, 0x8597, 0x53B4, 0x8598, 0x53B5, 0x8599, 0x53B6, 0xDBCC, + 0x53B7, 0x859A, 0x53B8, 0x859B, 0x53B9, 0x859C, 0x53BA, 0x859D, + 0x53BB, 0xC8A5, 0x53BC, 0x859E, 0x53BD, 0x859F, 0x53BE, 0x85A0, + 0x53BF, 0xCFD8, 0x53C0, 0x85A1, 0x53C1, 0xC8FE, 0x53C2, 0xB2CE, + 0x53C3, 0x85A2, 0x53C4, 0x85A3, 0x53C5, 0x85A4, 0x53C6, 0x85A5, + 0x53C7, 0x85A6, 0x53C8, 0xD3D6, 0x53C9, 0xB2E6, 0x53CA, 0xBCB0, + 0x53CB, 0xD3D1, 0x53CC, 0xCBAB, 0x53CD, 0xB7B4, 0x53CE, 0x85A7, + 0x53CF, 0x85A8, 0x53D0, 0x85A9, 0x53D1, 0xB7A2, 0x53D2, 0x85AA, + 0x53D3, 0x85AB, 0x53D4, 0xCAE5, 0x53D5, 0x85AC, 0x53D6, 0xC8A1, + 0x53D7, 0xCADC, 0x53D8, 0xB1E4, 0x53D9, 0xD0F0, 0x53DA, 0x85AD, + 0x53DB, 0xC5D1, 0x53DC, 0x85AE, 0x53DD, 0x85AF, 0x53DE, 0x85B0, + 0x53DF, 0xDBC5, 0x53E0, 0xB5FE, 0x53E1, 0x85B1, 0x53E2, 0x85B2, + 0x53E3, 0xBFDA, 0x53E4, 0xB9C5, 0x53E5, 0xBEE4, 0x53E6, 0xC1ED, + 0x53E7, 0x85B3, 0x53E8, 0xDFB6, 0x53E9, 0xDFB5, 0x53EA, 0xD6BB, + 0x53EB, 0xBDD0, 0x53EC, 0xD5D9, 0x53ED, 0xB0C8, 0x53EE, 0xB6A3, + 0x53EF, 0xBFC9, 0x53F0, 0xCCA8, 0x53F1, 0xDFB3, 0x53F2, 0xCAB7, + 0x53F3, 0xD3D2, 0x53F4, 0x85B4, 0x53F5, 0xD8CF, 0x53F6, 0xD2B6, + 0x53F7, 0xBAC5, 0x53F8, 0xCBBE, 0x53F9, 0xCCBE, 0x53FA, 0x85B5, + 0x53FB, 0xDFB7, 0x53FC, 0xB5F0, 0x53FD, 0xDFB4, 0x53FE, 0x85B6, + 0x53FF, 0x85B7, 0x5400, 0x85B8, 0x5401, 0xD3F5, 0x5402, 0x85B9, + 0x5403, 0xB3D4, 0x5404, 0xB8F7, 0x5405, 0x85BA, 0x5406, 0xDFBA, + 0x5407, 0x85BB, 0x5408, 0xBACF, 0x5409, 0xBCAA, 0x540A, 0xB5F5, + 0x540B, 0x85BC, 0x540C, 0xCDAC, 0x540D, 0xC3FB, 0x540E, 0xBAF3, + 0x540F, 0xC0F4, 0x5410, 0xCDC2, 0x5411, 0xCFF2, 0x5412, 0xDFB8, + 0x5413, 0xCFC5, 0x5414, 0x85BD, 0x5415, 0xC2C0, 0x5416, 0xDFB9, + 0x5417, 0xC2F0, 0x5418, 0x85BE, 0x5419, 0x85BF, 0x541A, 0x85C0, + 0x541B, 0xBEFD, 0x541C, 0x85C1, 0x541D, 0xC1DF, 0x541E, 0xCDCC, + 0x541F, 0xD2F7, 0x5420, 0xB7CD, 0x5421, 0xDFC1, 0x5422, 0x85C2, + 0x5423, 0xDFC4, 0x5424, 0x85C3, 0x5425, 0x85C4, 0x5426, 0xB7F1, + 0x5427, 0xB0C9, 0x5428, 0xB6D6, 0x5429, 0xB7D4, 0x542A, 0x85C5, + 0x542B, 0xBAAC, 0x542C, 0xCCFD, 0x542D, 0xBFD4, 0x542E, 0xCBB1, + 0x542F, 0xC6F4, 0x5430, 0x85C6, 0x5431, 0xD6A8, 0x5432, 0xDFC5, + 0x5433, 0x85C7, 0x5434, 0xCEE2, 0x5435, 0xB3B3, 0x5436, 0x85C8, + 0x5437, 0x85C9, 0x5438, 0xCEFC, 0x5439, 0xB4B5, 0x543A, 0x85CA, + 0x543B, 0xCEC7, 0x543C, 0xBAF0, 0x543D, 0x85CB, 0x543E, 0xCEE1, + 0x543F, 0x85CC, 0x5440, 0xD1BD, 0x5441, 0x85CD, 0x5442, 0x85CE, + 0x5443, 0xDFC0, 0x5444, 0x85CF, 0x5445, 0x85D0, 0x5446, 0xB4F4, + 0x5447, 0x85D1, 0x5448, 0xB3CA, 0x5449, 0x85D2, 0x544A, 0xB8E6, + 0x544B, 0xDFBB, 0x544C, 0x85D3, 0x544D, 0x85D4, 0x544E, 0x85D5, + 0x544F, 0x85D6, 0x5450, 0xC4C5, 0x5451, 0x85D7, 0x5452, 0xDFBC, + 0x5453, 0xDFBD, 0x5454, 0xDFBE, 0x5455, 0xC5BB, 0x5456, 0xDFBF, + 0x5457, 0xDFC2, 0x5458, 0xD4B1, 0x5459, 0xDFC3, 0x545A, 0x85D8, + 0x545B, 0xC7BA, 0x545C, 0xCED8, 0x545D, 0x85D9, 0x545E, 0x85DA, + 0x545F, 0x85DB, 0x5460, 0x85DC, 0x5461, 0x85DD, 0x5462, 0xC4D8, + 0x5463, 0x85DE, 0x5464, 0xDFCA, 0x5465, 0x85DF, 0x5466, 0xDFCF, + 0x5467, 0x85E0, 0x5468, 0xD6DC, 0x5469, 0x85E1, 0x546A, 0x85E2, + 0x546B, 0x85E3, 0x546C, 0x85E4, 0x546D, 0x85E5, 0x546E, 0x85E6, + 0x546F, 0x85E7, 0x5470, 0x85E8, 0x5471, 0xDFC9, 0x5472, 0xDFDA, + 0x5473, 0xCEB6, 0x5474, 0x85E9, 0x5475, 0xBAC7, 0x5476, 0xDFCE, + 0x5477, 0xDFC8, 0x5478, 0xC5DE, 0x5479, 0x85EA, 0x547A, 0x85EB, + 0x547B, 0xC9EB, 0x547C, 0xBAF4, 0x547D, 0xC3FC, 0x547E, 0x85EC, + 0x547F, 0x85ED, 0x5480, 0xBED7, 0x5481, 0x85EE, 0x5482, 0xDFC6, + 0x5483, 0x85EF, 0x5484, 0xDFCD, 0x5485, 0x85F0, 0x5486, 0xC5D8, + 0x5487, 0x85F1, 0x5488, 0x85F2, 0x5489, 0x85F3, 0x548A, 0x85F4, + 0x548B, 0xD5A6, 0x548C, 0xBACD, 0x548D, 0x85F5, 0x548E, 0xBECC, + 0x548F, 0xD3BD, 0x5490, 0xB8C0, 0x5491, 0x85F6, 0x5492, 0xD6E4, + 0x5493, 0x85F7, 0x5494, 0xDFC7, 0x5495, 0xB9BE, 0x5496, 0xBFA7, + 0x5497, 0x85F8, 0x5498, 0x85F9, 0x5499, 0xC1FC, 0x549A, 0xDFCB, + 0x549B, 0xDFCC, 0x549C, 0x85FA, 0x549D, 0xDFD0, 0x549E, 0x85FB, + 0x549F, 0x85FC, 0x54A0, 0x85FD, 0x54A1, 0x85FE, 0x54A2, 0x8640, + 0x54A3, 0xDFDB, 0x54A4, 0xDFE5, 0x54A5, 0x8641, 0x54A6, 0xDFD7, + 0x54A7, 0xDFD6, 0x54A8, 0xD7C9, 0x54A9, 0xDFE3, 0x54AA, 0xDFE4, + 0x54AB, 0xE5EB, 0x54AC, 0xD2A7, 0x54AD, 0xDFD2, 0x54AE, 0x8642, + 0x54AF, 0xBFA9, 0x54B0, 0x8643, 0x54B1, 0xD4DB, 0x54B2, 0x8644, + 0x54B3, 0xBFC8, 0x54B4, 0xDFD4, 0x54B5, 0x8645, 0x54B6, 0x8646, + 0x54B7, 0x8647, 0x54B8, 0xCFCC, 0x54B9, 0x8648, 0x54BA, 0x8649, + 0x54BB, 0xDFDD, 0x54BC, 0x864A, 0x54BD, 0xD1CA, 0x54BE, 0x864B, + 0x54BF, 0xDFDE, 0x54C0, 0xB0A7, 0x54C1, 0xC6B7, 0x54C2, 0xDFD3, + 0x54C3, 0x864C, 0x54C4, 0xBAE5, 0x54C5, 0x864D, 0x54C6, 0xB6DF, + 0x54C7, 0xCDDB, 0x54C8, 0xB9FE, 0x54C9, 0xD4D5, 0x54CA, 0x864E, + 0x54CB, 0x864F, 0x54CC, 0xDFDF, 0x54CD, 0xCFEC, 0x54CE, 0xB0A5, + 0x54CF, 0xDFE7, 0x54D0, 0xDFD1, 0x54D1, 0xD1C6, 0x54D2, 0xDFD5, + 0x54D3, 0xDFD8, 0x54D4, 0xDFD9, 0x54D5, 0xDFDC, 0x54D6, 0x8650, + 0x54D7, 0xBBA9, 0x54D8, 0x8651, 0x54D9, 0xDFE0, 0x54DA, 0xDFE1, + 0x54DB, 0x8652, 0x54DC, 0xDFE2, 0x54DD, 0xDFE6, 0x54DE, 0xDFE8, + 0x54DF, 0xD3B4, 0x54E0, 0x8653, 0x54E1, 0x8654, 0x54E2, 0x8655, + 0x54E3, 0x8656, 0x54E4, 0x8657, 0x54E5, 0xB8E7, 0x54E6, 0xC5B6, + 0x54E7, 0xDFEA, 0x54E8, 0xC9DA, 0x54E9, 0xC1A8, 0x54EA, 0xC4C4, + 0x54EB, 0x8658, 0x54EC, 0x8659, 0x54ED, 0xBFDE, 0x54EE, 0xCFF8, + 0x54EF, 0x865A, 0x54F0, 0x865B, 0x54F1, 0x865C, 0x54F2, 0xD5DC, + 0x54F3, 0xDFEE, 0x54F4, 0x865D, 0x54F5, 0x865E, 0x54F6, 0x865F, + 0x54F7, 0x8660, 0x54F8, 0x8661, 0x54F9, 0x8662, 0x54FA, 0xB2B8, + 0x54FB, 0x8663, 0x54FC, 0xBADF, 0x54FD, 0xDFEC, 0x54FE, 0x8664, + 0x54FF, 0xDBC1, 0x5500, 0x8665, 0x5501, 0xD1E4, 0x5502, 0x8666, + 0x5503, 0x8667, 0x5504, 0x8668, 0x5505, 0x8669, 0x5506, 0xCBF4, + 0x5507, 0xB4BD, 0x5508, 0x866A, 0x5509, 0xB0A6, 0x550A, 0x866B, + 0x550B, 0x866C, 0x550C, 0x866D, 0x550D, 0x866E, 0x550E, 0x866F, + 0x550F, 0xDFF1, 0x5510, 0xCCC6, 0x5511, 0xDFF2, 0x5512, 0x8670, + 0x5513, 0x8671, 0x5514, 0xDFED, 0x5515, 0x8672, 0x5516, 0x8673, + 0x5517, 0x8674, 0x5518, 0x8675, 0x5519, 0x8676, 0x551A, 0x8677, + 0x551B, 0xDFE9, 0x551C, 0x8678, 0x551D, 0x8679, 0x551E, 0x867A, + 0x551F, 0x867B, 0x5520, 0xDFEB, 0x5521, 0x867C, 0x5522, 0xDFEF, + 0x5523, 0xDFF0, 0x5524, 0xBBBD, 0x5525, 0x867D, 0x5526, 0x867E, + 0x5527, 0xDFF3, 0x5528, 0x8680, 0x5529, 0x8681, 0x552A, 0xDFF4, + 0x552B, 0x8682, 0x552C, 0xBBA3, 0x552D, 0x8683, 0x552E, 0xCADB, + 0x552F, 0xCEA8, 0x5530, 0xE0A7, 0x5531, 0xB3AA, 0x5532, 0x8684, + 0x5533, 0xE0A6, 0x5534, 0x8685, 0x5535, 0x8686, 0x5536, 0x8687, + 0x5537, 0xE0A1, 0x5538, 0x8688, 0x5539, 0x8689, 0x553A, 0x868A, + 0x553B, 0x868B, 0x553C, 0xDFFE, 0x553D, 0x868C, 0x553E, 0xCDD9, + 0x553F, 0xDFFC, 0x5540, 0x868D, 0x5541, 0xDFFA, 0x5542, 0x868E, + 0x5543, 0xBFD0, 0x5544, 0xD7C4, 0x5545, 0x868F, 0x5546, 0xC9CC, + 0x5547, 0x8690, 0x5548, 0x8691, 0x5549, 0xDFF8, 0x554A, 0xB0A1, + 0x554B, 0x8692, 0x554C, 0x8693, 0x554D, 0x8694, 0x554E, 0x8695, + 0x554F, 0x8696, 0x5550, 0xDFFD, 0x5551, 0x8697, 0x5552, 0x8698, + 0x5553, 0x8699, 0x5554, 0x869A, 0x5555, 0xDFFB, 0x5556, 0xE0A2, + 0x5557, 0x869B, 0x5558, 0x869C, 0x5559, 0x869D, 0x555A, 0x869E, + 0x555B, 0x869F, 0x555C, 0xE0A8, 0x555D, 0x86A0, 0x555E, 0x86A1, + 0x555F, 0x86A2, 0x5560, 0x86A3, 0x5561, 0xB7C8, 0x5562, 0x86A4, + 0x5563, 0x86A5, 0x5564, 0xC6A1, 0x5565, 0xC9B6, 0x5566, 0xC0B2, + 0x5567, 0xDFF5, 0x5568, 0x86A6, 0x5569, 0x86A7, 0x556A, 0xC5BE, + 0x556B, 0x86A8, 0x556C, 0xD8C4, 0x556D, 0xDFF9, 0x556E, 0xC4F6, + 0x556F, 0x86A9, 0x5570, 0x86AA, 0x5571, 0x86AB, 0x5572, 0x86AC, + 0x5573, 0x86AD, 0x5574, 0x86AE, 0x5575, 0xE0A3, 0x5576, 0xE0A4, + 0x5577, 0xE0A5, 0x5578, 0xD0A5, 0x5579, 0x86AF, 0x557A, 0x86B0, + 0x557B, 0xE0B4, 0x557C, 0xCCE4, 0x557D, 0x86B1, 0x557E, 0xE0B1, + 0x557F, 0x86B2, 0x5580, 0xBFA6, 0x5581, 0xE0AF, 0x5582, 0xCEB9, + 0x5583, 0xE0AB, 0x5584, 0xC9C6, 0x5585, 0x86B3, 0x5586, 0x86B4, + 0x5587, 0xC0AE, 0x5588, 0xE0AE, 0x5589, 0xBAED, 0x558A, 0xBAB0, + 0x558B, 0xE0A9, 0x558C, 0x86B5, 0x558D, 0x86B6, 0x558E, 0x86B7, + 0x558F, 0xDFF6, 0x5590, 0x86B8, 0x5591, 0xE0B3, 0x5592, 0x86B9, + 0x5593, 0x86BA, 0x5594, 0xE0B8, 0x5595, 0x86BB, 0x5596, 0x86BC, + 0x5597, 0x86BD, 0x5598, 0xB4AD, 0x5599, 0xE0B9, 0x559A, 0x86BE, + 0x559B, 0x86BF, 0x559C, 0xCFB2, 0x559D, 0xBAC8, 0x559E, 0x86C0, + 0x559F, 0xE0B0, 0x55A0, 0x86C1, 0x55A1, 0x86C2, 0x55A2, 0x86C3, + 0x55A3, 0x86C4, 0x55A4, 0x86C5, 0x55A5, 0x86C6, 0x55A6, 0x86C7, + 0x55A7, 0xD0FA, 0x55A8, 0x86C8, 0x55A9, 0x86C9, 0x55AA, 0x86CA, + 0x55AB, 0x86CB, 0x55AC, 0x86CC, 0x55AD, 0x86CD, 0x55AE, 0x86CE, + 0x55AF, 0x86CF, 0x55B0, 0x86D0, 0x55B1, 0xE0AC, 0x55B2, 0x86D1, + 0x55B3, 0xD4FB, 0x55B4, 0x86D2, 0x55B5, 0xDFF7, 0x55B6, 0x86D3, + 0x55B7, 0xC5E7, 0x55B8, 0x86D4, 0x55B9, 0xE0AD, 0x55BA, 0x86D5, + 0x55BB, 0xD3F7, 0x55BC, 0x86D6, 0x55BD, 0xE0B6, 0x55BE, 0xE0B7, + 0x55BF, 0x86D7, 0x55C0, 0x86D8, 0x55C1, 0x86D9, 0x55C2, 0x86DA, + 0x55C3, 0x86DB, 0x55C4, 0xE0C4, 0x55C5, 0xD0E1, 0x55C6, 0x86DC, + 0x55C7, 0x86DD, 0x55C8, 0x86DE, 0x55C9, 0xE0BC, 0x55CA, 0x86DF, + 0x55CB, 0x86E0, 0x55CC, 0xE0C9, 0x55CD, 0xE0CA, 0x55CE, 0x86E1, + 0x55CF, 0x86E2, 0x55D0, 0x86E3, 0x55D1, 0xE0BE, 0x55D2, 0xE0AA, + 0x55D3, 0xC9A4, 0x55D4, 0xE0C1, 0x55D5, 0x86E4, 0x55D6, 0xE0B2, + 0x55D7, 0x86E5, 0x55D8, 0x86E6, 0x55D9, 0x86E7, 0x55DA, 0x86E8, + 0x55DB, 0x86E9, 0x55DC, 0xCAC8, 0x55DD, 0xE0C3, 0x55DE, 0x86EA, + 0x55DF, 0xE0B5, 0x55E0, 0x86EB, 0x55E1, 0xCECB, 0x55E2, 0x86EC, + 0x55E3, 0xCBC3, 0x55E4, 0xE0CD, 0x55E5, 0xE0C6, 0x55E6, 0xE0C2, + 0x55E7, 0x86ED, 0x55E8, 0xE0CB, 0x55E9, 0x86EE, 0x55EA, 0xE0BA, + 0x55EB, 0xE0BF, 0x55EC, 0xE0C0, 0x55ED, 0x86EF, 0x55EE, 0x86F0, + 0x55EF, 0xE0C5, 0x55F0, 0x86F1, 0x55F1, 0x86F2, 0x55F2, 0xE0C7, + 0x55F3, 0xE0C8, 0x55F4, 0x86F3, 0x55F5, 0xE0CC, 0x55F6, 0x86F4, + 0x55F7, 0xE0BB, 0x55F8, 0x86F5, 0x55F9, 0x86F6, 0x55FA, 0x86F7, + 0x55FB, 0x86F8, 0x55FC, 0x86F9, 0x55FD, 0xCBD4, 0x55FE, 0xE0D5, + 0x55FF, 0x86FA, 0x5600, 0xE0D6, 0x5601, 0xE0D2, 0x5602, 0x86FB, + 0x5603, 0x86FC, 0x5604, 0x86FD, 0x5605, 0x86FE, 0x5606, 0x8740, + 0x5607, 0x8741, 0x5608, 0xE0D0, 0x5609, 0xBCCE, 0x560A, 0x8742, + 0x560B, 0x8743, 0x560C, 0xE0D1, 0x560D, 0x8744, 0x560E, 0xB8C2, + 0x560F, 0xD8C5, 0x5610, 0x8745, 0x5611, 0x8746, 0x5612, 0x8747, + 0x5613, 0x8748, 0x5614, 0x8749, 0x5615, 0x874A, 0x5616, 0x874B, + 0x5617, 0x874C, 0x5618, 0xD0EA, 0x5619, 0x874D, 0x561A, 0x874E, + 0x561B, 0xC2EF, 0x561C, 0x874F, 0x561D, 0x8750, 0x561E, 0xE0CF, + 0x561F, 0xE0BD, 0x5620, 0x8751, 0x5621, 0x8752, 0x5622, 0x8753, + 0x5623, 0xE0D4, 0x5624, 0xE0D3, 0x5625, 0x8754, 0x5626, 0x8755, + 0x5627, 0xE0D7, 0x5628, 0x8756, 0x5629, 0x8757, 0x562A, 0x8758, + 0x562B, 0x8759, 0x562C, 0xE0DC, 0x562D, 0xE0D8, 0x562E, 0x875A, + 0x562F, 0x875B, 0x5630, 0x875C, 0x5631, 0xD6F6, 0x5632, 0xB3B0, + 0x5633, 0x875D, 0x5634, 0xD7EC, 0x5635, 0x875E, 0x5636, 0xCBBB, + 0x5637, 0x875F, 0x5638, 0x8760, 0x5639, 0xE0DA, 0x563A, 0x8761, + 0x563B, 0xCEFB, 0x563C, 0x8762, 0x563D, 0x8763, 0x563E, 0x8764, + 0x563F, 0xBAD9, 0x5640, 0x8765, 0x5641, 0x8766, 0x5642, 0x8767, + 0x5643, 0x8768, 0x5644, 0x8769, 0x5645, 0x876A, 0x5646, 0x876B, + 0x5647, 0x876C, 0x5648, 0x876D, 0x5649, 0x876E, 0x564A, 0x876F, + 0x564B, 0x8770, 0x564C, 0xE0E1, 0x564D, 0xE0DD, 0x564E, 0xD2AD, + 0x564F, 0x8771, 0x5650, 0x8772, 0x5651, 0x8773, 0x5652, 0x8774, + 0x5653, 0x8775, 0x5654, 0xE0E2, 0x5655, 0x8776, 0x5656, 0x8777, + 0x5657, 0xE0DB, 0x5658, 0xE0D9, 0x5659, 0xE0DF, 0x565A, 0x8778, + 0x565B, 0x8779, 0x565C, 0xE0E0, 0x565D, 0x877A, 0x565E, 0x877B, + 0x565F, 0x877C, 0x5660, 0x877D, 0x5661, 0x877E, 0x5662, 0xE0DE, + 0x5663, 0x8780, 0x5664, 0xE0E4, 0x5665, 0x8781, 0x5666, 0x8782, + 0x5667, 0x8783, 0x5668, 0xC6F7, 0x5669, 0xD8AC, 0x566A, 0xD4EB, + 0x566B, 0xE0E6, 0x566C, 0xCAC9, 0x566D, 0x8784, 0x566E, 0x8785, + 0x566F, 0x8786, 0x5670, 0x8787, 0x5671, 0xE0E5, 0x5672, 0x8788, + 0x5673, 0x8789, 0x5674, 0x878A, 0x5675, 0x878B, 0x5676, 0xB8C1, + 0x5677, 0x878C, 0x5678, 0x878D, 0x5679, 0x878E, 0x567A, 0x878F, + 0x567B, 0xE0E7, 0x567C, 0xE0E8, 0x567D, 0x8790, 0x567E, 0x8791, + 0x567F, 0x8792, 0x5680, 0x8793, 0x5681, 0x8794, 0x5682, 0x8795, + 0x5683, 0x8796, 0x5684, 0x8797, 0x5685, 0xE0E9, 0x5686, 0xE0E3, + 0x5687, 0x8798, 0x5688, 0x8799, 0x5689, 0x879A, 0x568A, 0x879B, + 0x568B, 0x879C, 0x568C, 0x879D, 0x568D, 0x879E, 0x568E, 0xBABF, + 0x568F, 0xCCE7, 0x5690, 0x879F, 0x5691, 0x87A0, 0x5692, 0x87A1, + 0x5693, 0xE0EA, 0x5694, 0x87A2, 0x5695, 0x87A3, 0x5696, 0x87A4, + 0x5697, 0x87A5, 0x5698, 0x87A6, 0x5699, 0x87A7, 0x569A, 0x87A8, + 0x569B, 0x87A9, 0x569C, 0x87AA, 0x569D, 0x87AB, 0x569E, 0x87AC, + 0x569F, 0x87AD, 0x56A0, 0x87AE, 0x56A1, 0x87AF, 0x56A2, 0x87B0, + 0x56A3, 0xCFF9, 0x56A4, 0x87B1, 0x56A5, 0x87B2, 0x56A6, 0x87B3, + 0x56A7, 0x87B4, 0x56A8, 0x87B5, 0x56A9, 0x87B6, 0x56AA, 0x87B7, + 0x56AB, 0x87B8, 0x56AC, 0x87B9, 0x56AD, 0x87BA, 0x56AE, 0x87BB, + 0x56AF, 0xE0EB, 0x56B0, 0x87BC, 0x56B1, 0x87BD, 0x56B2, 0x87BE, + 0x56B3, 0x87BF, 0x56B4, 0x87C0, 0x56B5, 0x87C1, 0x56B6, 0x87C2, + 0x56B7, 0xC8C2, 0x56B8, 0x87C3, 0x56B9, 0x87C4, 0x56BA, 0x87C5, + 0x56BB, 0x87C6, 0x56BC, 0xBDC0, 0x56BD, 0x87C7, 0x56BE, 0x87C8, + 0x56BF, 0x87C9, 0x56C0, 0x87CA, 0x56C1, 0x87CB, 0x56C2, 0x87CC, + 0x56C3, 0x87CD, 0x56C4, 0x87CE, 0x56C5, 0x87CF, 0x56C6, 0x87D0, + 0x56C7, 0x87D1, 0x56C8, 0x87D2, 0x56C9, 0x87D3, 0x56CA, 0xC4D2, + 0x56CB, 0x87D4, 0x56CC, 0x87D5, 0x56CD, 0x87D6, 0x56CE, 0x87D7, + 0x56CF, 0x87D8, 0x56D0, 0x87D9, 0x56D1, 0x87DA, 0x56D2, 0x87DB, + 0x56D3, 0x87DC, 0x56D4, 0xE0EC, 0x56D5, 0x87DD, 0x56D6, 0x87DE, + 0x56D7, 0xE0ED, 0x56D8, 0x87DF, 0x56D9, 0x87E0, 0x56DA, 0xC7F4, + 0x56DB, 0xCBC4, 0x56DC, 0x87E1, 0x56DD, 0xE0EE, 0x56DE, 0xBBD8, + 0x56DF, 0xD8B6, 0x56E0, 0xD2F2, 0x56E1, 0xE0EF, 0x56E2, 0xCDC5, + 0x56E3, 0x87E2, 0x56E4, 0xB6DA, 0x56E5, 0x87E3, 0x56E6, 0x87E4, + 0x56E7, 0x87E5, 0x56E8, 0x87E6, 0x56E9, 0x87E7, 0x56EA, 0x87E8, + 0x56EB, 0xE0F1, 0x56EC, 0x87E9, 0x56ED, 0xD4B0, 0x56EE, 0x87EA, + 0x56EF, 0x87EB, 0x56F0, 0xC0A7, 0x56F1, 0xB4D1, 0x56F2, 0x87EC, + 0x56F3, 0x87ED, 0x56F4, 0xCEA7, 0x56F5, 0xE0F0, 0x56F6, 0x87EE, + 0x56F7, 0x87EF, 0x56F8, 0x87F0, 0x56F9, 0xE0F2, 0x56FA, 0xB9CC, + 0x56FB, 0x87F1, 0x56FC, 0x87F2, 0x56FD, 0xB9FA, 0x56FE, 0xCDBC, + 0x56FF, 0xE0F3, 0x5700, 0x87F3, 0x5701, 0x87F4, 0x5702, 0x87F5, + 0x5703, 0xC6D4, 0x5704, 0xE0F4, 0x5705, 0x87F6, 0x5706, 0xD4B2, + 0x5707, 0x87F7, 0x5708, 0xC8A6, 0x5709, 0xE0F6, 0x570A, 0xE0F5, + 0x570B, 0x87F8, 0x570C, 0x87F9, 0x570D, 0x87FA, 0x570E, 0x87FB, + 0x570F, 0x87FC, 0x5710, 0x87FD, 0x5711, 0x87FE, 0x5712, 0x8840, + 0x5713, 0x8841, 0x5714, 0x8842, 0x5715, 0x8843, 0x5716, 0x8844, + 0x5717, 0x8845, 0x5718, 0x8846, 0x5719, 0x8847, 0x571A, 0x8848, + 0x571B, 0x8849, 0x571C, 0xE0F7, 0x571D, 0x884A, 0x571E, 0x884B, + 0x571F, 0xCDC1, 0x5720, 0x884C, 0x5721, 0x884D, 0x5722, 0x884E, + 0x5723, 0xCAA5, 0x5724, 0x884F, 0x5725, 0x8850, 0x5726, 0x8851, + 0x5727, 0x8852, 0x5728, 0xD4DA, 0x5729, 0xDBD7, 0x572A, 0xDBD9, + 0x572B, 0x8853, 0x572C, 0xDBD8, 0x572D, 0xB9E7, 0x572E, 0xDBDC, + 0x572F, 0xDBDD, 0x5730, 0xB5D8, 0x5731, 0x8854, 0x5732, 0x8855, + 0x5733, 0xDBDA, 0x5734, 0x8856, 0x5735, 0x8857, 0x5736, 0x8858, + 0x5737, 0x8859, 0x5738, 0x885A, 0x5739, 0xDBDB, 0x573A, 0xB3A1, + 0x573B, 0xDBDF, 0x573C, 0x885B, 0x573D, 0x885C, 0x573E, 0xBBF8, + 0x573F, 0x885D, 0x5740, 0xD6B7, 0x5741, 0x885E, 0x5742, 0xDBE0, + 0x5743, 0x885F, 0x5744, 0x8860, 0x5745, 0x8861, 0x5746, 0x8862, + 0x5747, 0xBEF9, 0x5748, 0x8863, 0x5749, 0x8864, 0x574A, 0xB7BB, + 0x574B, 0x8865, 0x574C, 0xDBD0, 0x574D, 0xCCAE, 0x574E, 0xBFB2, + 0x574F, 0xBBB5, 0x5750, 0xD7F8, 0x5751, 0xBFD3, 0x5752, 0x8866, + 0x5753, 0x8867, 0x5754, 0x8868, 0x5755, 0x8869, 0x5756, 0x886A, + 0x5757, 0xBFE9, 0x5758, 0x886B, 0x5759, 0x886C, 0x575A, 0xBCE1, + 0x575B, 0xCCB3, 0x575C, 0xDBDE, 0x575D, 0xB0D3, 0x575E, 0xCEEB, + 0x575F, 0xB7D8, 0x5760, 0xD7B9, 0x5761, 0xC6C2, 0x5762, 0x886D, + 0x5763, 0x886E, 0x5764, 0xC0A4, 0x5765, 0x886F, 0x5766, 0xCCB9, + 0x5767, 0x8870, 0x5768, 0xDBE7, 0x5769, 0xDBE1, 0x576A, 0xC6BA, + 0x576B, 0xDBE3, 0x576C, 0x8871, 0x576D, 0xDBE8, 0x576E, 0x8872, + 0x576F, 0xC5F7, 0x5770, 0x8873, 0x5771, 0x8874, 0x5772, 0x8875, + 0x5773, 0xDBEA, 0x5774, 0x8876, 0x5775, 0x8877, 0x5776, 0xDBE9, + 0x5777, 0xBFC0, 0x5778, 0x8878, 0x5779, 0x8879, 0x577A, 0x887A, + 0x577B, 0xDBE6, 0x577C, 0xDBE5, 0x577D, 0x887B, 0x577E, 0x887C, + 0x577F, 0x887D, 0x5780, 0x887E, 0x5781, 0x8880, 0x5782, 0xB4B9, + 0x5783, 0xC0AC, 0x5784, 0xC2A2, 0x5785, 0xDBE2, 0x5786, 0xDBE4, + 0x5787, 0x8881, 0x5788, 0x8882, 0x5789, 0x8883, 0x578A, 0x8884, + 0x578B, 0xD0CD, 0x578C, 0xDBED, 0x578D, 0x8885, 0x578E, 0x8886, + 0x578F, 0x8887, 0x5790, 0x8888, 0x5791, 0x8889, 0x5792, 0xC0DD, + 0x5793, 0xDBF2, 0x5794, 0x888A, 0x5795, 0x888B, 0x5796, 0x888C, + 0x5797, 0x888D, 0x5798, 0x888E, 0x5799, 0x888F, 0x579A, 0x8890, + 0x579B, 0xB6E2, 0x579C, 0x8891, 0x579D, 0x8892, 0x579E, 0x8893, + 0x579F, 0x8894, 0x57A0, 0xDBF3, 0x57A1, 0xDBD2, 0x57A2, 0xB9B8, + 0x57A3, 0xD4AB, 0x57A4, 0xDBEC, 0x57A5, 0x8895, 0x57A6, 0xBFD1, + 0x57A7, 0xDBF0, 0x57A8, 0x8896, 0x57A9, 0xDBD1, 0x57AA, 0x8897, + 0x57AB, 0xB5E6, 0x57AC, 0x8898, 0x57AD, 0xDBEB, 0x57AE, 0xBFE5, + 0x57AF, 0x8899, 0x57B0, 0x889A, 0x57B1, 0x889B, 0x57B2, 0xDBEE, + 0x57B3, 0x889C, 0x57B4, 0xDBF1, 0x57B5, 0x889D, 0x57B6, 0x889E, + 0x57B7, 0x889F, 0x57B8, 0xDBF9, 0x57B9, 0x88A0, 0x57BA, 0x88A1, + 0x57BB, 0x88A2, 0x57BC, 0x88A3, 0x57BD, 0x88A4, 0x57BE, 0x88A5, + 0x57BF, 0x88A6, 0x57C0, 0x88A7, 0x57C1, 0x88A8, 0x57C2, 0xB9A1, + 0x57C3, 0xB0A3, 0x57C4, 0x88A9, 0x57C5, 0x88AA, 0x57C6, 0x88AB, + 0x57C7, 0x88AC, 0x57C8, 0x88AD, 0x57C9, 0x88AE, 0x57CA, 0x88AF, + 0x57CB, 0xC2F1, 0x57CC, 0x88B0, 0x57CD, 0x88B1, 0x57CE, 0xB3C7, + 0x57CF, 0xDBEF, 0x57D0, 0x88B2, 0x57D1, 0x88B3, 0x57D2, 0xDBF8, + 0x57D3, 0x88B4, 0x57D4, 0xC6D2, 0x57D5, 0xDBF4, 0x57D6, 0x88B5, + 0x57D7, 0x88B6, 0x57D8, 0xDBF5, 0x57D9, 0xDBF7, 0x57DA, 0xDBF6, + 0x57DB, 0x88B7, 0x57DC, 0x88B8, 0x57DD, 0xDBFE, 0x57DE, 0x88B9, + 0x57DF, 0xD3F2, 0x57E0, 0xB2BA, 0x57E1, 0x88BA, 0x57E2, 0x88BB, + 0x57E3, 0x88BC, 0x57E4, 0xDBFD, 0x57E5, 0x88BD, 0x57E6, 0x88BE, + 0x57E7, 0x88BF, 0x57E8, 0x88C0, 0x57E9, 0x88C1, 0x57EA, 0x88C2, + 0x57EB, 0x88C3, 0x57EC, 0x88C4, 0x57ED, 0xDCA4, 0x57EE, 0x88C5, + 0x57EF, 0xDBFB, 0x57F0, 0x88C6, 0x57F1, 0x88C7, 0x57F2, 0x88C8, + 0x57F3, 0x88C9, 0x57F4, 0xDBFA, 0x57F5, 0x88CA, 0x57F6, 0x88CB, + 0x57F7, 0x88CC, 0x57F8, 0xDBFC, 0x57F9, 0xC5E0, 0x57FA, 0xBBF9, + 0x57FB, 0x88CD, 0x57FC, 0x88CE, 0x57FD, 0xDCA3, 0x57FE, 0x88CF, + 0x57FF, 0x88D0, 0x5800, 0xDCA5, 0x5801, 0x88D1, 0x5802, 0xCCC3, + 0x5803, 0x88D2, 0x5804, 0x88D3, 0x5805, 0x88D4, 0x5806, 0xB6D1, + 0x5807, 0xDDC0, 0x5808, 0x88D5, 0x5809, 0x88D6, 0x580A, 0x88D7, + 0x580B, 0xDCA1, 0x580C, 0x88D8, 0x580D, 0xDCA2, 0x580E, 0x88D9, + 0x580F, 0x88DA, 0x5810, 0x88DB, 0x5811, 0xC7B5, 0x5812, 0x88DC, + 0x5813, 0x88DD, 0x5814, 0x88DE, 0x5815, 0xB6E9, 0x5816, 0x88DF, + 0x5817, 0x88E0, 0x5818, 0x88E1, 0x5819, 0xDCA7, 0x581A, 0x88E2, + 0x581B, 0x88E3, 0x581C, 0x88E4, 0x581D, 0x88E5, 0x581E, 0xDCA6, + 0x581F, 0x88E6, 0x5820, 0xDCA9, 0x5821, 0xB1A4, 0x5822, 0x88E7, + 0x5823, 0x88E8, 0x5824, 0xB5CC, 0x5825, 0x88E9, 0x5826, 0x88EA, + 0x5827, 0x88EB, 0x5828, 0x88EC, 0x5829, 0x88ED, 0x582A, 0xBFB0, + 0x582B, 0x88EE, 0x582C, 0x88EF, 0x582D, 0x88F0, 0x582E, 0x88F1, + 0x582F, 0x88F2, 0x5830, 0xD1DF, 0x5831, 0x88F3, 0x5832, 0x88F4, + 0x5833, 0x88F5, 0x5834, 0x88F6, 0x5835, 0xB6C2, 0x5836, 0x88F7, + 0x5837, 0x88F8, 0x5838, 0x88F9, 0x5839, 0x88FA, 0x583A, 0x88FB, + 0x583B, 0x88FC, 0x583C, 0x88FD, 0x583D, 0x88FE, 0x583E, 0x8940, + 0x583F, 0x8941, 0x5840, 0x8942, 0x5841, 0x8943, 0x5842, 0x8944, + 0x5843, 0x8945, 0x5844, 0xDCA8, 0x5845, 0x8946, 0x5846, 0x8947, + 0x5847, 0x8948, 0x5848, 0x8949, 0x5849, 0x894A, 0x584A, 0x894B, + 0x584B, 0x894C, 0x584C, 0xCBFA, 0x584D, 0xEBF3, 0x584E, 0x894D, + 0x584F, 0x894E, 0x5850, 0x894F, 0x5851, 0xCBDC, 0x5852, 0x8950, + 0x5853, 0x8951, 0x5854, 0xCBFE, 0x5855, 0x8952, 0x5856, 0x8953, + 0x5857, 0x8954, 0x5858, 0xCCC1, 0x5859, 0x8955, 0x585A, 0x8956, + 0x585B, 0x8957, 0x585C, 0x8958, 0x585D, 0x8959, 0x585E, 0xC8FB, + 0x585F, 0x895A, 0x5860, 0x895B, 0x5861, 0x895C, 0x5862, 0x895D, + 0x5863, 0x895E, 0x5864, 0x895F, 0x5865, 0xDCAA, 0x5866, 0x8960, + 0x5867, 0x8961, 0x5868, 0x8962, 0x5869, 0x8963, 0x586A, 0x8964, + 0x586B, 0xCCEE, 0x586C, 0xDCAB, 0x586D, 0x8965, 0x586E, 0x8966, + 0x586F, 0x8967, 0x5870, 0x8968, 0x5871, 0x8969, 0x5872, 0x896A, + 0x5873, 0x896B, 0x5874, 0x896C, 0x5875, 0x896D, 0x5876, 0x896E, + 0x5877, 0x896F, 0x5878, 0x8970, 0x5879, 0x8971, 0x587A, 0x8972, + 0x587B, 0x8973, 0x587C, 0x8974, 0x587D, 0x8975, 0x587E, 0xDBD3, + 0x587F, 0x8976, 0x5880, 0xDCAF, 0x5881, 0xDCAC, 0x5882, 0x8977, + 0x5883, 0xBEB3, 0x5884, 0x8978, 0x5885, 0xCAFB, 0x5886, 0x8979, + 0x5887, 0x897A, 0x5888, 0x897B, 0x5889, 0xDCAD, 0x588A, 0x897C, + 0x588B, 0x897D, 0x588C, 0x897E, 0x588D, 0x8980, 0x588E, 0x8981, + 0x588F, 0x8982, 0x5890, 0x8983, 0x5891, 0x8984, 0x5892, 0xC9CA, + 0x5893, 0xC4B9, 0x5894, 0x8985, 0x5895, 0x8986, 0x5896, 0x8987, + 0x5897, 0x8988, 0x5898, 0x8989, 0x5899, 0xC7BD, 0x589A, 0xDCAE, + 0x589B, 0x898A, 0x589C, 0x898B, 0x589D, 0x898C, 0x589E, 0xD4F6, + 0x589F, 0xD0E6, 0x58A0, 0x898D, 0x58A1, 0x898E, 0x58A2, 0x898F, + 0x58A3, 0x8990, 0x58A4, 0x8991, 0x58A5, 0x8992, 0x58A6, 0x8993, + 0x58A7, 0x8994, 0x58A8, 0xC4AB, 0x58A9, 0xB6D5, 0x58AA, 0x8995, + 0x58AB, 0x8996, 0x58AC, 0x8997, 0x58AD, 0x8998, 0x58AE, 0x8999, + 0x58AF, 0x899A, 0x58B0, 0x899B, 0x58B1, 0x899C, 0x58B2, 0x899D, + 0x58B3, 0x899E, 0x58B4, 0x899F, 0x58B5, 0x89A0, 0x58B6, 0x89A1, + 0x58B7, 0x89A2, 0x58B8, 0x89A3, 0x58B9, 0x89A4, 0x58BA, 0x89A5, + 0x58BB, 0x89A6, 0x58BC, 0xDBD4, 0x58BD, 0x89A7, 0x58BE, 0x89A8, + 0x58BF, 0x89A9, 0x58C0, 0x89AA, 0x58C1, 0xB1DA, 0x58C2, 0x89AB, + 0x58C3, 0x89AC, 0x58C4, 0x89AD, 0x58C5, 0xDBD5, 0x58C6, 0x89AE, + 0x58C7, 0x89AF, 0x58C8, 0x89B0, 0x58C9, 0x89B1, 0x58CA, 0x89B2, + 0x58CB, 0x89B3, 0x58CC, 0x89B4, 0x58CD, 0x89B5, 0x58CE, 0x89B6, + 0x58CF, 0x89B7, 0x58D0, 0x89B8, 0x58D1, 0xDBD6, 0x58D2, 0x89B9, + 0x58D3, 0x89BA, 0x58D4, 0x89BB, 0x58D5, 0xBABE, 0x58D6, 0x89BC, + 0x58D7, 0x89BD, 0x58D8, 0x89BE, 0x58D9, 0x89BF, 0x58DA, 0x89C0, + 0x58DB, 0x89C1, 0x58DC, 0x89C2, 0x58DD, 0x89C3, 0x58DE, 0x89C4, + 0x58DF, 0x89C5, 0x58E0, 0x89C6, 0x58E1, 0x89C7, 0x58E2, 0x89C8, + 0x58E3, 0x89C9, 0x58E4, 0xC8C0, 0x58E5, 0x89CA, 0x58E6, 0x89CB, + 0x58E7, 0x89CC, 0x58E8, 0x89CD, 0x58E9, 0x89CE, 0x58EA, 0x89CF, + 0x58EB, 0xCABF, 0x58EC, 0xC8C9, 0x58ED, 0x89D0, 0x58EE, 0xD7B3, + 0x58EF, 0x89D1, 0x58F0, 0xC9F9, 0x58F1, 0x89D2, 0x58F2, 0x89D3, + 0x58F3, 0xBFC7, 0x58F4, 0x89D4, 0x58F5, 0x89D5, 0x58F6, 0xBAF8, + 0x58F7, 0x89D6, 0x58F8, 0x89D7, 0x58F9, 0xD2BC, 0x58FA, 0x89D8, + 0x58FB, 0x89D9, 0x58FC, 0x89DA, 0x58FD, 0x89DB, 0x58FE, 0x89DC, + 0x58FF, 0x89DD, 0x5900, 0x89DE, 0x5901, 0x89DF, 0x5902, 0xE2BA, + 0x5903, 0x89E0, 0x5904, 0xB4A6, 0x5905, 0x89E1, 0x5906, 0x89E2, + 0x5907, 0xB1B8, 0x5908, 0x89E3, 0x5909, 0x89E4, 0x590A, 0x89E5, + 0x590B, 0x89E6, 0x590C, 0x89E7, 0x590D, 0xB8B4, 0x590E, 0x89E8, + 0x590F, 0xCFC4, 0x5910, 0x89E9, 0x5911, 0x89EA, 0x5912, 0x89EB, + 0x5913, 0x89EC, 0x5914, 0xD9E7, 0x5915, 0xCFA6, 0x5916, 0xCDE2, + 0x5917, 0x89ED, 0x5918, 0x89EE, 0x5919, 0xD9ED, 0x591A, 0xB6E0, + 0x591B, 0x89EF, 0x591C, 0xD2B9, 0x591D, 0x89F0, 0x591E, 0x89F1, + 0x591F, 0xB9BB, 0x5920, 0x89F2, 0x5921, 0x89F3, 0x5922, 0x89F4, + 0x5923, 0x89F5, 0x5924, 0xE2B9, 0x5925, 0xE2B7, 0x5926, 0x89F6, + 0x5927, 0xB4F3, 0x5928, 0x89F7, 0x5929, 0xCCEC, 0x592A, 0xCCAB, + 0x592B, 0xB7F2, 0x592C, 0x89F8, 0x592D, 0xD8B2, 0x592E, 0xD1EB, + 0x592F, 0xBABB, 0x5930, 0x89F9, 0x5931, 0xCAA7, 0x5932, 0x89FA, + 0x5933, 0x89FB, 0x5934, 0xCDB7, 0x5935, 0x89FC, 0x5936, 0x89FD, + 0x5937, 0xD2C4, 0x5938, 0xBFE4, 0x5939, 0xBCD0, 0x593A, 0xB6E1, + 0x593B, 0x89FE, 0x593C, 0xDEC5, 0x593D, 0x8A40, 0x593E, 0x8A41, + 0x593F, 0x8A42, 0x5940, 0x8A43, 0x5941, 0xDEC6, 0x5942, 0xDBBC, + 0x5943, 0x8A44, 0x5944, 0xD1D9, 0x5945, 0x8A45, 0x5946, 0x8A46, + 0x5947, 0xC6E6, 0x5948, 0xC4CE, 0x5949, 0xB7EE, 0x594A, 0x8A47, + 0x594B, 0xB7DC, 0x594C, 0x8A48, 0x594D, 0x8A49, 0x594E, 0xBFFC, + 0x594F, 0xD7E0, 0x5950, 0x8A4A, 0x5951, 0xC6F5, 0x5952, 0x8A4B, + 0x5953, 0x8A4C, 0x5954, 0xB1BC, 0x5955, 0xDEC8, 0x5956, 0xBDB1, + 0x5957, 0xCCD7, 0x5958, 0xDECA, 0x5959, 0x8A4D, 0x595A, 0xDEC9, + 0x595B, 0x8A4E, 0x595C, 0x8A4F, 0x595D, 0x8A50, 0x595E, 0x8A51, + 0x595F, 0x8A52, 0x5960, 0xB5EC, 0x5961, 0x8A53, 0x5962, 0xC9DD, + 0x5963, 0x8A54, 0x5964, 0x8A55, 0x5965, 0xB0C2, 0x5966, 0x8A56, + 0x5967, 0x8A57, 0x5968, 0x8A58, 0x5969, 0x8A59, 0x596A, 0x8A5A, + 0x596B, 0x8A5B, 0x596C, 0x8A5C, 0x596D, 0x8A5D, 0x596E, 0x8A5E, + 0x596F, 0x8A5F, 0x5970, 0x8A60, 0x5971, 0x8A61, 0x5972, 0x8A62, + 0x5973, 0xC5AE, 0x5974, 0xC5AB, 0x5975, 0x8A63, 0x5976, 0xC4CC, + 0x5977, 0x8A64, 0x5978, 0xBCE9, 0x5979, 0xCBFD, 0x597A, 0x8A65, + 0x597B, 0x8A66, 0x597C, 0x8A67, 0x597D, 0xBAC3, 0x597E, 0x8A68, + 0x597F, 0x8A69, 0x5980, 0x8A6A, 0x5981, 0xE5F9, 0x5982, 0xC8E7, + 0x5983, 0xE5FA, 0x5984, 0xCDFD, 0x5985, 0x8A6B, 0x5986, 0xD7B1, + 0x5987, 0xB8BE, 0x5988, 0xC2E8, 0x5989, 0x8A6C, 0x598A, 0xC8D1, + 0x598B, 0x8A6D, 0x598C, 0x8A6E, 0x598D, 0xE5FB, 0x598E, 0x8A6F, + 0x598F, 0x8A70, 0x5990, 0x8A71, 0x5991, 0x8A72, 0x5992, 0xB6CA, + 0x5993, 0xBCCB, 0x5994, 0x8A73, 0x5995, 0x8A74, 0x5996, 0xD1FD, + 0x5997, 0xE6A1, 0x5998, 0x8A75, 0x5999, 0xC3EE, 0x599A, 0x8A76, + 0x599B, 0x8A77, 0x599C, 0x8A78, 0x599D, 0x8A79, 0x599E, 0xE6A4, + 0x599F, 0x8A7A, 0x59A0, 0x8A7B, 0x59A1, 0x8A7C, 0x59A2, 0x8A7D, + 0x59A3, 0xE5FE, 0x59A4, 0xE6A5, 0x59A5, 0xCDD7, 0x59A6, 0x8A7E, + 0x59A7, 0x8A80, 0x59A8, 0xB7C1, 0x59A9, 0xE5FC, 0x59AA, 0xE5FD, + 0x59AB, 0xE6A3, 0x59AC, 0x8A81, 0x59AD, 0x8A82, 0x59AE, 0xC4DD, + 0x59AF, 0xE6A8, 0x59B0, 0x8A83, 0x59B1, 0x8A84, 0x59B2, 0xE6A7, + 0x59B3, 0x8A85, 0x59B4, 0x8A86, 0x59B5, 0x8A87, 0x59B6, 0x8A88, + 0x59B7, 0x8A89, 0x59B8, 0x8A8A, 0x59B9, 0xC3C3, 0x59BA, 0x8A8B, + 0x59BB, 0xC6DE, 0x59BC, 0x8A8C, 0x59BD, 0x8A8D, 0x59BE, 0xE6AA, + 0x59BF, 0x8A8E, 0x59C0, 0x8A8F, 0x59C1, 0x8A90, 0x59C2, 0x8A91, + 0x59C3, 0x8A92, 0x59C4, 0x8A93, 0x59C5, 0x8A94, 0x59C6, 0xC4B7, + 0x59C7, 0x8A95, 0x59C8, 0x8A96, 0x59C9, 0x8A97, 0x59CA, 0xE6A2, + 0x59CB, 0xCABC, 0x59CC, 0x8A98, 0x59CD, 0x8A99, 0x59CE, 0x8A9A, + 0x59CF, 0x8A9B, 0x59D0, 0xBDE3, 0x59D1, 0xB9C3, 0x59D2, 0xE6A6, + 0x59D3, 0xD0D5, 0x59D4, 0xCEAF, 0x59D5, 0x8A9C, 0x59D6, 0x8A9D, + 0x59D7, 0xE6A9, 0x59D8, 0xE6B0, 0x59D9, 0x8A9E, 0x59DA, 0xD2A6, + 0x59DB, 0x8A9F, 0x59DC, 0xBDAA, 0x59DD, 0xE6AD, 0x59DE, 0x8AA0, + 0x59DF, 0x8AA1, 0x59E0, 0x8AA2, 0x59E1, 0x8AA3, 0x59E2, 0x8AA4, + 0x59E3, 0xE6AF, 0x59E4, 0x8AA5, 0x59E5, 0xC0D1, 0x59E6, 0x8AA6, + 0x59E7, 0x8AA7, 0x59E8, 0xD2CC, 0x59E9, 0x8AA8, 0x59EA, 0x8AA9, + 0x59EB, 0x8AAA, 0x59EC, 0xBCA7, 0x59ED, 0x8AAB, 0x59EE, 0x8AAC, + 0x59EF, 0x8AAD, 0x59F0, 0x8AAE, 0x59F1, 0x8AAF, 0x59F2, 0x8AB0, + 0x59F3, 0x8AB1, 0x59F4, 0x8AB2, 0x59F5, 0x8AB3, 0x59F6, 0x8AB4, + 0x59F7, 0x8AB5, 0x59F8, 0x8AB6, 0x59F9, 0xE6B1, 0x59FA, 0x8AB7, + 0x59FB, 0xD2F6, 0x59FC, 0x8AB8, 0x59FD, 0x8AB9, 0x59FE, 0x8ABA, + 0x59FF, 0xD7CB, 0x5A00, 0x8ABB, 0x5A01, 0xCDFE, 0x5A02, 0x8ABC, + 0x5A03, 0xCDDE, 0x5A04, 0xC2A6, 0x5A05, 0xE6AB, 0x5A06, 0xE6AC, + 0x5A07, 0xBDBF, 0x5A08, 0xE6AE, 0x5A09, 0xE6B3, 0x5A0A, 0x8ABD, + 0x5A0B, 0x8ABE, 0x5A0C, 0xE6B2, 0x5A0D, 0x8ABF, 0x5A0E, 0x8AC0, + 0x5A0F, 0x8AC1, 0x5A10, 0x8AC2, 0x5A11, 0xE6B6, 0x5A12, 0x8AC3, + 0x5A13, 0xE6B8, 0x5A14, 0x8AC4, 0x5A15, 0x8AC5, 0x5A16, 0x8AC6, + 0x5A17, 0x8AC7, 0x5A18, 0xC4EF, 0x5A19, 0x8AC8, 0x5A1A, 0x8AC9, + 0x5A1B, 0x8ACA, 0x5A1C, 0xC4C8, 0x5A1D, 0x8ACB, 0x5A1E, 0x8ACC, + 0x5A1F, 0xBEEA, 0x5A20, 0xC9EF, 0x5A21, 0x8ACD, 0x5A22, 0x8ACE, + 0x5A23, 0xE6B7, 0x5A24, 0x8ACF, 0x5A25, 0xB6F0, 0x5A26, 0x8AD0, + 0x5A27, 0x8AD1, 0x5A28, 0x8AD2, 0x5A29, 0xC3E4, 0x5A2A, 0x8AD3, + 0x5A2B, 0x8AD4, 0x5A2C, 0x8AD5, 0x5A2D, 0x8AD6, 0x5A2E, 0x8AD7, + 0x5A2F, 0x8AD8, 0x5A30, 0x8AD9, 0x5A31, 0xD3E9, 0x5A32, 0xE6B4, + 0x5A33, 0x8ADA, 0x5A34, 0xE6B5, 0x5A35, 0x8ADB, 0x5A36, 0xC8A2, + 0x5A37, 0x8ADC, 0x5A38, 0x8ADD, 0x5A39, 0x8ADE, 0x5A3A, 0x8ADF, + 0x5A3B, 0x8AE0, 0x5A3C, 0xE6BD, 0x5A3D, 0x8AE1, 0x5A3E, 0x8AE2, + 0x5A3F, 0x8AE3, 0x5A40, 0xE6B9, 0x5A41, 0x8AE4, 0x5A42, 0x8AE5, + 0x5A43, 0x8AE6, 0x5A44, 0x8AE7, 0x5A45, 0x8AE8, 0x5A46, 0xC6C5, + 0x5A47, 0x8AE9, 0x5A48, 0x8AEA, 0x5A49, 0xCDF1, 0x5A4A, 0xE6BB, + 0x5A4B, 0x8AEB, 0x5A4C, 0x8AEC, 0x5A4D, 0x8AED, 0x5A4E, 0x8AEE, + 0x5A4F, 0x8AEF, 0x5A50, 0x8AF0, 0x5A51, 0x8AF1, 0x5A52, 0x8AF2, + 0x5A53, 0x8AF3, 0x5A54, 0x8AF4, 0x5A55, 0xE6BC, 0x5A56, 0x8AF5, + 0x5A57, 0x8AF6, 0x5A58, 0x8AF7, 0x5A59, 0x8AF8, 0x5A5A, 0xBBE9, + 0x5A5B, 0x8AF9, 0x5A5C, 0x8AFA, 0x5A5D, 0x8AFB, 0x5A5E, 0x8AFC, + 0x5A5F, 0x8AFD, 0x5A60, 0x8AFE, 0x5A61, 0x8B40, 0x5A62, 0xE6BE, + 0x5A63, 0x8B41, 0x5A64, 0x8B42, 0x5A65, 0x8B43, 0x5A66, 0x8B44, + 0x5A67, 0xE6BA, 0x5A68, 0x8B45, 0x5A69, 0x8B46, 0x5A6A, 0xC0B7, + 0x5A6B, 0x8B47, 0x5A6C, 0x8B48, 0x5A6D, 0x8B49, 0x5A6E, 0x8B4A, + 0x5A6F, 0x8B4B, 0x5A70, 0x8B4C, 0x5A71, 0x8B4D, 0x5A72, 0x8B4E, + 0x5A73, 0x8B4F, 0x5A74, 0xD3A4, 0x5A75, 0xE6BF, 0x5A76, 0xC9F4, + 0x5A77, 0xE6C3, 0x5A78, 0x8B50, 0x5A79, 0x8B51, 0x5A7A, 0xE6C4, + 0x5A7B, 0x8B52, 0x5A7C, 0x8B53, 0x5A7D, 0x8B54, 0x5A7E, 0x8B55, + 0x5A7F, 0xD0F6, 0x5A80, 0x8B56, 0x5A81, 0x8B57, 0x5A82, 0x8B58, + 0x5A83, 0x8B59, 0x5A84, 0x8B5A, 0x5A85, 0x8B5B, 0x5A86, 0x8B5C, + 0x5A87, 0x8B5D, 0x5A88, 0x8B5E, 0x5A89, 0x8B5F, 0x5A8A, 0x8B60, + 0x5A8B, 0x8B61, 0x5A8C, 0x8B62, 0x5A8D, 0x8B63, 0x5A8E, 0x8B64, + 0x5A8F, 0x8B65, 0x5A90, 0x8B66, 0x5A91, 0x8B67, 0x5A92, 0xC3BD, + 0x5A93, 0x8B68, 0x5A94, 0x8B69, 0x5A95, 0x8B6A, 0x5A96, 0x8B6B, + 0x5A97, 0x8B6C, 0x5A98, 0x8B6D, 0x5A99, 0x8B6E, 0x5A9A, 0xC3C4, + 0x5A9B, 0xE6C2, 0x5A9C, 0x8B6F, 0x5A9D, 0x8B70, 0x5A9E, 0x8B71, + 0x5A9F, 0x8B72, 0x5AA0, 0x8B73, 0x5AA1, 0x8B74, 0x5AA2, 0x8B75, + 0x5AA3, 0x8B76, 0x5AA4, 0x8B77, 0x5AA5, 0x8B78, 0x5AA6, 0x8B79, + 0x5AA7, 0x8B7A, 0x5AA8, 0x8B7B, 0x5AA9, 0x8B7C, 0x5AAA, 0xE6C1, + 0x5AAB, 0x8B7D, 0x5AAC, 0x8B7E, 0x5AAD, 0x8B80, 0x5AAE, 0x8B81, + 0x5AAF, 0x8B82, 0x5AB0, 0x8B83, 0x5AB1, 0x8B84, 0x5AB2, 0xE6C7, + 0x5AB3, 0xCFB1, 0x5AB4, 0x8B85, 0x5AB5, 0xEBF4, 0x5AB6, 0x8B86, + 0x5AB7, 0x8B87, 0x5AB8, 0xE6CA, 0x5AB9, 0x8B88, 0x5ABA, 0x8B89, + 0x5ABB, 0x8B8A, 0x5ABC, 0x8B8B, 0x5ABD, 0x8B8C, 0x5ABE, 0xE6C5, + 0x5ABF, 0x8B8D, 0x5AC0, 0x8B8E, 0x5AC1, 0xBCDE, 0x5AC2, 0xC9A9, + 0x5AC3, 0x8B8F, 0x5AC4, 0x8B90, 0x5AC5, 0x8B91, 0x5AC6, 0x8B92, + 0x5AC7, 0x8B93, 0x5AC8, 0x8B94, 0x5AC9, 0xBCB5, 0x5ACA, 0x8B95, + 0x5ACB, 0x8B96, 0x5ACC, 0xCFD3, 0x5ACD, 0x8B97, 0x5ACE, 0x8B98, + 0x5ACF, 0x8B99, 0x5AD0, 0x8B9A, 0x5AD1, 0x8B9B, 0x5AD2, 0xE6C8, + 0x5AD3, 0x8B9C, 0x5AD4, 0xE6C9, 0x5AD5, 0x8B9D, 0x5AD6, 0xE6CE, + 0x5AD7, 0x8B9E, 0x5AD8, 0xE6D0, 0x5AD9, 0x8B9F, 0x5ADA, 0x8BA0, + 0x5ADB, 0x8BA1, 0x5ADC, 0xE6D1, 0x5ADD, 0x8BA2, 0x5ADE, 0x8BA3, + 0x5ADF, 0x8BA4, 0x5AE0, 0xE6CB, 0x5AE1, 0xB5D5, 0x5AE2, 0x8BA5, + 0x5AE3, 0xE6CC, 0x5AE4, 0x8BA6, 0x5AE5, 0x8BA7, 0x5AE6, 0xE6CF, + 0x5AE7, 0x8BA8, 0x5AE8, 0x8BA9, 0x5AE9, 0xC4DB, 0x5AEA, 0x8BAA, + 0x5AEB, 0xE6C6, 0x5AEC, 0x8BAB, 0x5AED, 0x8BAC, 0x5AEE, 0x8BAD, + 0x5AEF, 0x8BAE, 0x5AF0, 0x8BAF, 0x5AF1, 0xE6CD, 0x5AF2, 0x8BB0, + 0x5AF3, 0x8BB1, 0x5AF4, 0x8BB2, 0x5AF5, 0x8BB3, 0x5AF6, 0x8BB4, + 0x5AF7, 0x8BB5, 0x5AF8, 0x8BB6, 0x5AF9, 0x8BB7, 0x5AFA, 0x8BB8, + 0x5AFB, 0x8BB9, 0x5AFC, 0x8BBA, 0x5AFD, 0x8BBB, 0x5AFE, 0x8BBC, + 0x5AFF, 0x8BBD, 0x5B00, 0x8BBE, 0x5B01, 0x8BBF, 0x5B02, 0x8BC0, + 0x5B03, 0x8BC1, 0x5B04, 0x8BC2, 0x5B05, 0x8BC3, 0x5B06, 0x8BC4, + 0x5B07, 0x8BC5, 0x5B08, 0x8BC6, 0x5B09, 0xE6D2, 0x5B0A, 0x8BC7, + 0x5B0B, 0x8BC8, 0x5B0C, 0x8BC9, 0x5B0D, 0x8BCA, 0x5B0E, 0x8BCB, + 0x5B0F, 0x8BCC, 0x5B10, 0x8BCD, 0x5B11, 0x8BCE, 0x5B12, 0x8BCF, + 0x5B13, 0x8BD0, 0x5B14, 0x8BD1, 0x5B15, 0x8BD2, 0x5B16, 0xE6D4, + 0x5B17, 0xE6D3, 0x5B18, 0x8BD3, 0x5B19, 0x8BD4, 0x5B1A, 0x8BD5, + 0x5B1B, 0x8BD6, 0x5B1C, 0x8BD7, 0x5B1D, 0x8BD8, 0x5B1E, 0x8BD9, + 0x5B1F, 0x8BDA, 0x5B20, 0x8BDB, 0x5B21, 0x8BDC, 0x5B22, 0x8BDD, + 0x5B23, 0x8BDE, 0x5B24, 0x8BDF, 0x5B25, 0x8BE0, 0x5B26, 0x8BE1, + 0x5B27, 0x8BE2, 0x5B28, 0x8BE3, 0x5B29, 0x8BE4, 0x5B2A, 0x8BE5, + 0x5B2B, 0x8BE6, 0x5B2C, 0x8BE7, 0x5B2D, 0x8BE8, 0x5B2E, 0x8BE9, + 0x5B2F, 0x8BEA, 0x5B30, 0x8BEB, 0x5B31, 0x8BEC, 0x5B32, 0xE6D5, + 0x5B33, 0x8BED, 0x5B34, 0xD9F8, 0x5B35, 0x8BEE, 0x5B36, 0x8BEF, + 0x5B37, 0xE6D6, 0x5B38, 0x8BF0, 0x5B39, 0x8BF1, 0x5B3A, 0x8BF2, + 0x5B3B, 0x8BF3, 0x5B3C, 0x8BF4, 0x5B3D, 0x8BF5, 0x5B3E, 0x8BF6, + 0x5B3F, 0x8BF7, 0x5B40, 0xE6D7, 0x5B41, 0x8BF8, 0x5B42, 0x8BF9, + 0x5B43, 0x8BFA, 0x5B44, 0x8BFB, 0x5B45, 0x8BFC, 0x5B46, 0x8BFD, + 0x5B47, 0x8BFE, 0x5B48, 0x8C40, 0x5B49, 0x8C41, 0x5B4A, 0x8C42, + 0x5B4B, 0x8C43, 0x5B4C, 0x8C44, 0x5B4D, 0x8C45, 0x5B4E, 0x8C46, + 0x5B4F, 0x8C47, 0x5B50, 0xD7D3, 0x5B51, 0xE6DD, 0x5B52, 0x8C48, + 0x5B53, 0xE6DE, 0x5B54, 0xBFD7, 0x5B55, 0xD4D0, 0x5B56, 0x8C49, + 0x5B57, 0xD7D6, 0x5B58, 0xB4E6, 0x5B59, 0xCBEF, 0x5B5A, 0xE6DA, + 0x5B5B, 0xD8C3, 0x5B5C, 0xD7CE, 0x5B5D, 0xD0A2, 0x5B5E, 0x8C4A, + 0x5B5F, 0xC3CF, 0x5B60, 0x8C4B, 0x5B61, 0x8C4C, 0x5B62, 0xE6DF, + 0x5B63, 0xBCBE, 0x5B64, 0xB9C2, 0x5B65, 0xE6DB, 0x5B66, 0xD1A7, + 0x5B67, 0x8C4D, 0x5B68, 0x8C4E, 0x5B69, 0xBAA2, 0x5B6A, 0xC2CF, + 0x5B6B, 0x8C4F, 0x5B6C, 0xD8AB, 0x5B6D, 0x8C50, 0x5B6E, 0x8C51, + 0x5B6F, 0x8C52, 0x5B70, 0xCAEB, 0x5B71, 0xE5EE, 0x5B72, 0x8C53, + 0x5B73, 0xE6DC, 0x5B74, 0x8C54, 0x5B75, 0xB7F5, 0x5B76, 0x8C55, + 0x5B77, 0x8C56, 0x5B78, 0x8C57, 0x5B79, 0x8C58, 0x5B7A, 0xC8E6, + 0x5B7B, 0x8C59, 0x5B7C, 0x8C5A, 0x5B7D, 0xC4F5, 0x5B7E, 0x8C5B, + 0x5B7F, 0x8C5C, 0x5B80, 0xE5B2, 0x5B81, 0xC4FE, 0x5B82, 0x8C5D, + 0x5B83, 0xCBFC, 0x5B84, 0xE5B3, 0x5B85, 0xD5AC, 0x5B86, 0x8C5E, + 0x5B87, 0xD3EE, 0x5B88, 0xCAD8, 0x5B89, 0xB0B2, 0x5B8A, 0x8C5F, + 0x5B8B, 0xCBCE, 0x5B8C, 0xCDEA, 0x5B8D, 0x8C60, 0x5B8E, 0x8C61, + 0x5B8F, 0xBAEA, 0x5B90, 0x8C62, 0x5B91, 0x8C63, 0x5B92, 0x8C64, + 0x5B93, 0xE5B5, 0x5B94, 0x8C65, 0x5B95, 0xE5B4, 0x5B96, 0x8C66, + 0x5B97, 0xD7DA, 0x5B98, 0xB9D9, 0x5B99, 0xD6E6, 0x5B9A, 0xB6A8, + 0x5B9B, 0xCDF0, 0x5B9C, 0xD2CB, 0x5B9D, 0xB1A6, 0x5B9E, 0xCAB5, + 0x5B9F, 0x8C67, 0x5BA0, 0xB3E8, 0x5BA1, 0xC9F3, 0x5BA2, 0xBFCD, + 0x5BA3, 0xD0FB, 0x5BA4, 0xCAD2, 0x5BA5, 0xE5B6, 0x5BA6, 0xBBC2, + 0x5BA7, 0x8C68, 0x5BA8, 0x8C69, 0x5BA9, 0x8C6A, 0x5BAA, 0xCFDC, + 0x5BAB, 0xB9AC, 0x5BAC, 0x8C6B, 0x5BAD, 0x8C6C, 0x5BAE, 0x8C6D, + 0x5BAF, 0x8C6E, 0x5BB0, 0xD4D7, 0x5BB1, 0x8C6F, 0x5BB2, 0x8C70, + 0x5BB3, 0xBAA6, 0x5BB4, 0xD1E7, 0x5BB5, 0xCFFC, 0x5BB6, 0xBCD2, + 0x5BB7, 0x8C71, 0x5BB8, 0xE5B7, 0x5BB9, 0xC8DD, 0x5BBA, 0x8C72, + 0x5BBB, 0x8C73, 0x5BBC, 0x8C74, 0x5BBD, 0xBFED, 0x5BBE, 0xB1F6, + 0x5BBF, 0xCBDE, 0x5BC0, 0x8C75, 0x5BC1, 0x8C76, 0x5BC2, 0xBCC5, + 0x5BC3, 0x8C77, 0x5BC4, 0xBCC4, 0x5BC5, 0xD2FA, 0x5BC6, 0xC3DC, + 0x5BC7, 0xBFDC, 0x5BC8, 0x8C78, 0x5BC9, 0x8C79, 0x5BCA, 0x8C7A, + 0x5BCB, 0x8C7B, 0x5BCC, 0xB8BB, 0x5BCD, 0x8C7C, 0x5BCE, 0x8C7D, + 0x5BCF, 0x8C7E, 0x5BD0, 0xC3C2, 0x5BD1, 0x8C80, 0x5BD2, 0xBAAE, + 0x5BD3, 0xD4A2, 0x5BD4, 0x8C81, 0x5BD5, 0x8C82, 0x5BD6, 0x8C83, + 0x5BD7, 0x8C84, 0x5BD8, 0x8C85, 0x5BD9, 0x8C86, 0x5BDA, 0x8C87, + 0x5BDB, 0x8C88, 0x5BDC, 0x8C89, 0x5BDD, 0xC7DE, 0x5BDE, 0xC4AF, + 0x5BDF, 0xB2EC, 0x5BE0, 0x8C8A, 0x5BE1, 0xB9D1, 0x5BE2, 0x8C8B, + 0x5BE3, 0x8C8C, 0x5BE4, 0xE5BB, 0x5BE5, 0xC1C8, 0x5BE6, 0x8C8D, + 0x5BE7, 0x8C8E, 0x5BE8, 0xD5AF, 0x5BE9, 0x8C8F, 0x5BEA, 0x8C90, + 0x5BEB, 0x8C91, 0x5BEC, 0x8C92, 0x5BED, 0x8C93, 0x5BEE, 0xE5BC, + 0x5BEF, 0x8C94, 0x5BF0, 0xE5BE, 0x5BF1, 0x8C95, 0x5BF2, 0x8C96, + 0x5BF3, 0x8C97, 0x5BF4, 0x8C98, 0x5BF5, 0x8C99, 0x5BF6, 0x8C9A, + 0x5BF7, 0x8C9B, 0x5BF8, 0xB4E7, 0x5BF9, 0xB6D4, 0x5BFA, 0xCBC2, + 0x5BFB, 0xD1B0, 0x5BFC, 0xB5BC, 0x5BFD, 0x8C9C, 0x5BFE, 0x8C9D, + 0x5BFF, 0xCAD9, 0x5C00, 0x8C9E, 0x5C01, 0xB7E2, 0x5C02, 0x8C9F, + 0x5C03, 0x8CA0, 0x5C04, 0xC9E4, 0x5C05, 0x8CA1, 0x5C06, 0xBDAB, + 0x5C07, 0x8CA2, 0x5C08, 0x8CA3, 0x5C09, 0xCEBE, 0x5C0A, 0xD7F0, + 0x5C0B, 0x8CA4, 0x5C0C, 0x8CA5, 0x5C0D, 0x8CA6, 0x5C0E, 0x8CA7, + 0x5C0F, 0xD0A1, 0x5C10, 0x8CA8, 0x5C11, 0xC9D9, 0x5C12, 0x8CA9, + 0x5C13, 0x8CAA, 0x5C14, 0xB6FB, 0x5C15, 0xE6D8, 0x5C16, 0xBCE2, + 0x5C17, 0x8CAB, 0x5C18, 0xB3BE, 0x5C19, 0x8CAC, 0x5C1A, 0xC9D0, + 0x5C1B, 0x8CAD, 0x5C1C, 0xE6D9, 0x5C1D, 0xB3A2, 0x5C1E, 0x8CAE, + 0x5C1F, 0x8CAF, 0x5C20, 0x8CB0, 0x5C21, 0x8CB1, 0x5C22, 0xDECC, + 0x5C23, 0x8CB2, 0x5C24, 0xD3C8, 0x5C25, 0xDECD, 0x5C26, 0x8CB3, + 0x5C27, 0xD2A2, 0x5C28, 0x8CB4, 0x5C29, 0x8CB5, 0x5C2A, 0x8CB6, + 0x5C2B, 0x8CB7, 0x5C2C, 0xDECE, 0x5C2D, 0x8CB8, 0x5C2E, 0x8CB9, + 0x5C2F, 0x8CBA, 0x5C30, 0x8CBB, 0x5C31, 0xBECD, 0x5C32, 0x8CBC, + 0x5C33, 0x8CBD, 0x5C34, 0xDECF, 0x5C35, 0x8CBE, 0x5C36, 0x8CBF, + 0x5C37, 0x8CC0, 0x5C38, 0xCAAC, 0x5C39, 0xD2FC, 0x5C3A, 0xB3DF, + 0x5C3B, 0xE5EA, 0x5C3C, 0xC4E1, 0x5C3D, 0xBEA1, 0x5C3E, 0xCEB2, + 0x5C3F, 0xC4F2, 0x5C40, 0xBED6, 0x5C41, 0xC6A8, 0x5C42, 0xB2E3, + 0x5C43, 0x8CC1, 0x5C44, 0x8CC2, 0x5C45, 0xBED3, 0x5C46, 0x8CC3, + 0x5C47, 0x8CC4, 0x5C48, 0xC7FC, 0x5C49, 0xCCEB, 0x5C4A, 0xBDEC, + 0x5C4B, 0xCEDD, 0x5C4C, 0x8CC5, 0x5C4D, 0x8CC6, 0x5C4E, 0xCABA, + 0x5C4F, 0xC6C1, 0x5C50, 0xE5EC, 0x5C51, 0xD0BC, 0x5C52, 0x8CC7, + 0x5C53, 0x8CC8, 0x5C54, 0x8CC9, 0x5C55, 0xD5B9, 0x5C56, 0x8CCA, + 0x5C57, 0x8CCB, 0x5C58, 0x8CCC, 0x5C59, 0xE5ED, 0x5C5A, 0x8CCD, + 0x5C5B, 0x8CCE, 0x5C5C, 0x8CCF, 0x5C5D, 0x8CD0, 0x5C5E, 0xCAF4, + 0x5C5F, 0x8CD1, 0x5C60, 0xCDC0, 0x5C61, 0xC2C5, 0x5C62, 0x8CD2, + 0x5C63, 0xE5EF, 0x5C64, 0x8CD3, 0x5C65, 0xC2C4, 0x5C66, 0xE5F0, + 0x5C67, 0x8CD4, 0x5C68, 0x8CD5, 0x5C69, 0x8CD6, 0x5C6A, 0x8CD7, + 0x5C6B, 0x8CD8, 0x5C6C, 0x8CD9, 0x5C6D, 0x8CDA, 0x5C6E, 0xE5F8, + 0x5C6F, 0xCDCD, 0x5C70, 0x8CDB, 0x5C71, 0xC9BD, 0x5C72, 0x8CDC, + 0x5C73, 0x8CDD, 0x5C74, 0x8CDE, 0x5C75, 0x8CDF, 0x5C76, 0x8CE0, + 0x5C77, 0x8CE1, 0x5C78, 0x8CE2, 0x5C79, 0xD2D9, 0x5C7A, 0xE1A8, + 0x5C7B, 0x8CE3, 0x5C7C, 0x8CE4, 0x5C7D, 0x8CE5, 0x5C7E, 0x8CE6, + 0x5C7F, 0xD3EC, 0x5C80, 0x8CE7, 0x5C81, 0xCBEA, 0x5C82, 0xC6F1, + 0x5C83, 0x8CE8, 0x5C84, 0x8CE9, 0x5C85, 0x8CEA, 0x5C86, 0x8CEB, + 0x5C87, 0x8CEC, 0x5C88, 0xE1AC, 0x5C89, 0x8CED, 0x5C8A, 0x8CEE, + 0x5C8B, 0x8CEF, 0x5C8C, 0xE1A7, 0x5C8D, 0xE1A9, 0x5C8E, 0x8CF0, + 0x5C8F, 0x8CF1, 0x5C90, 0xE1AA, 0x5C91, 0xE1AF, 0x5C92, 0x8CF2, + 0x5C93, 0x8CF3, 0x5C94, 0xB2ED, 0x5C95, 0x8CF4, 0x5C96, 0xE1AB, + 0x5C97, 0xB8DA, 0x5C98, 0xE1AD, 0x5C99, 0xE1AE, 0x5C9A, 0xE1B0, + 0x5C9B, 0xB5BA, 0x5C9C, 0xE1B1, 0x5C9D, 0x8CF5, 0x5C9E, 0x8CF6, + 0x5C9F, 0x8CF7, 0x5CA0, 0x8CF8, 0x5CA1, 0x8CF9, 0x5CA2, 0xE1B3, + 0x5CA3, 0xE1B8, 0x5CA4, 0x8CFA, 0x5CA5, 0x8CFB, 0x5CA6, 0x8CFC, + 0x5CA7, 0x8CFD, 0x5CA8, 0x8CFE, 0x5CA9, 0xD1D2, 0x5CAA, 0x8D40, + 0x5CAB, 0xE1B6, 0x5CAC, 0xE1B5, 0x5CAD, 0xC1EB, 0x5CAE, 0x8D41, + 0x5CAF, 0x8D42, 0x5CB0, 0x8D43, 0x5CB1, 0xE1B7, 0x5CB2, 0x8D44, + 0x5CB3, 0xD4C0, 0x5CB4, 0x8D45, 0x5CB5, 0xE1B2, 0x5CB6, 0x8D46, + 0x5CB7, 0xE1BA, 0x5CB8, 0xB0B6, 0x5CB9, 0x8D47, 0x5CBA, 0x8D48, + 0x5CBB, 0x8D49, 0x5CBC, 0x8D4A, 0x5CBD, 0xE1B4, 0x5CBE, 0x8D4B, + 0x5CBF, 0xBFF9, 0x5CC0, 0x8D4C, 0x5CC1, 0xE1B9, 0x5CC2, 0x8D4D, + 0x5CC3, 0x8D4E, 0x5CC4, 0xE1BB, 0x5CC5, 0x8D4F, 0x5CC6, 0x8D50, + 0x5CC7, 0x8D51, 0x5CC8, 0x8D52, 0x5CC9, 0x8D53, 0x5CCA, 0x8D54, + 0x5CCB, 0xE1BE, 0x5CCC, 0x8D55, 0x5CCD, 0x8D56, 0x5CCE, 0x8D57, + 0x5CCF, 0x8D58, 0x5CD0, 0x8D59, 0x5CD1, 0x8D5A, 0x5CD2, 0xE1BC, + 0x5CD3, 0x8D5B, 0x5CD4, 0x8D5C, 0x5CD5, 0x8D5D, 0x5CD6, 0x8D5E, + 0x5CD7, 0x8D5F, 0x5CD8, 0x8D60, 0x5CD9, 0xD6C5, 0x5CDA, 0x8D61, + 0x5CDB, 0x8D62, 0x5CDC, 0x8D63, 0x5CDD, 0x8D64, 0x5CDE, 0x8D65, + 0x5CDF, 0x8D66, 0x5CE0, 0x8D67, 0x5CE1, 0xCFBF, 0x5CE2, 0x8D68, + 0x5CE3, 0x8D69, 0x5CE4, 0xE1BD, 0x5CE5, 0xE1BF, 0x5CE6, 0xC2CD, + 0x5CE7, 0x8D6A, 0x5CE8, 0xB6EB, 0x5CE9, 0x8D6B, 0x5CEA, 0xD3F8, + 0x5CEB, 0x8D6C, 0x5CEC, 0x8D6D, 0x5CED, 0xC7CD, 0x5CEE, 0x8D6E, + 0x5CEF, 0x8D6F, 0x5CF0, 0xB7E5, 0x5CF1, 0x8D70, 0x5CF2, 0x8D71, + 0x5CF3, 0x8D72, 0x5CF4, 0x8D73, 0x5CF5, 0x8D74, 0x5CF6, 0x8D75, + 0x5CF7, 0x8D76, 0x5CF8, 0x8D77, 0x5CF9, 0x8D78, 0x5CFA, 0x8D79, + 0x5CFB, 0xBEFE, 0x5CFC, 0x8D7A, 0x5CFD, 0x8D7B, 0x5CFE, 0x8D7C, + 0x5CFF, 0x8D7D, 0x5D00, 0x8D7E, 0x5D01, 0x8D80, 0x5D02, 0xE1C0, + 0x5D03, 0xE1C1, 0x5D04, 0x8D81, 0x5D05, 0x8D82, 0x5D06, 0xE1C7, + 0x5D07, 0xB3E7, 0x5D08, 0x8D83, 0x5D09, 0x8D84, 0x5D0A, 0x8D85, + 0x5D0B, 0x8D86, 0x5D0C, 0x8D87, 0x5D0D, 0x8D88, 0x5D0E, 0xC6E9, + 0x5D0F, 0x8D89, 0x5D10, 0x8D8A, 0x5D11, 0x8D8B, 0x5D12, 0x8D8C, + 0x5D13, 0x8D8D, 0x5D14, 0xB4DE, 0x5D15, 0x8D8E, 0x5D16, 0xD1C2, + 0x5D17, 0x8D8F, 0x5D18, 0x8D90, 0x5D19, 0x8D91, 0x5D1A, 0x8D92, + 0x5D1B, 0xE1C8, 0x5D1C, 0x8D93, 0x5D1D, 0x8D94, 0x5D1E, 0xE1C6, + 0x5D1F, 0x8D95, 0x5D20, 0x8D96, 0x5D21, 0x8D97, 0x5D22, 0x8D98, + 0x5D23, 0x8D99, 0x5D24, 0xE1C5, 0x5D25, 0x8D9A, 0x5D26, 0xE1C3, + 0x5D27, 0xE1C2, 0x5D28, 0x8D9B, 0x5D29, 0xB1C0, 0x5D2A, 0x8D9C, + 0x5D2B, 0x8D9D, 0x5D2C, 0x8D9E, 0x5D2D, 0xD5B8, 0x5D2E, 0xE1C4, + 0x5D2F, 0x8D9F, 0x5D30, 0x8DA0, 0x5D31, 0x8DA1, 0x5D32, 0x8DA2, + 0x5D33, 0x8DA3, 0x5D34, 0xE1CB, 0x5D35, 0x8DA4, 0x5D36, 0x8DA5, + 0x5D37, 0x8DA6, 0x5D38, 0x8DA7, 0x5D39, 0x8DA8, 0x5D3A, 0x8DA9, + 0x5D3B, 0x8DAA, 0x5D3C, 0x8DAB, 0x5D3D, 0xE1CC, 0x5D3E, 0xE1CA, + 0x5D3F, 0x8DAC, 0x5D40, 0x8DAD, 0x5D41, 0x8DAE, 0x5D42, 0x8DAF, + 0x5D43, 0x8DB0, 0x5D44, 0x8DB1, 0x5D45, 0x8DB2, 0x5D46, 0x8DB3, + 0x5D47, 0xEFFA, 0x5D48, 0x8DB4, 0x5D49, 0x8DB5, 0x5D4A, 0xE1D3, + 0x5D4B, 0xE1D2, 0x5D4C, 0xC7B6, 0x5D4D, 0x8DB6, 0x5D4E, 0x8DB7, + 0x5D4F, 0x8DB8, 0x5D50, 0x8DB9, 0x5D51, 0x8DBA, 0x5D52, 0x8DBB, + 0x5D53, 0x8DBC, 0x5D54, 0x8DBD, 0x5D55, 0x8DBE, 0x5D56, 0x8DBF, + 0x5D57, 0x8DC0, 0x5D58, 0xE1C9, 0x5D59, 0x8DC1, 0x5D5A, 0x8DC2, + 0x5D5B, 0xE1CE, 0x5D5C, 0x8DC3, 0x5D5D, 0xE1D0, 0x5D5E, 0x8DC4, + 0x5D5F, 0x8DC5, 0x5D60, 0x8DC6, 0x5D61, 0x8DC7, 0x5D62, 0x8DC8, + 0x5D63, 0x8DC9, 0x5D64, 0x8DCA, 0x5D65, 0x8DCB, 0x5D66, 0x8DCC, + 0x5D67, 0x8DCD, 0x5D68, 0x8DCE, 0x5D69, 0xE1D4, 0x5D6A, 0x8DCF, + 0x5D6B, 0xE1D1, 0x5D6C, 0xE1CD, 0x5D6D, 0x8DD0, 0x5D6E, 0x8DD1, + 0x5D6F, 0xE1CF, 0x5D70, 0x8DD2, 0x5D71, 0x8DD3, 0x5D72, 0x8DD4, + 0x5D73, 0x8DD5, 0x5D74, 0xE1D5, 0x5D75, 0x8DD6, 0x5D76, 0x8DD7, + 0x5D77, 0x8DD8, 0x5D78, 0x8DD9, 0x5D79, 0x8DDA, 0x5D7A, 0x8DDB, + 0x5D7B, 0x8DDC, 0x5D7C, 0x8DDD, 0x5D7D, 0x8DDE, 0x5D7E, 0x8DDF, + 0x5D7F, 0x8DE0, 0x5D80, 0x8DE1, 0x5D81, 0x8DE2, 0x5D82, 0xE1D6, + 0x5D83, 0x8DE3, 0x5D84, 0x8DE4, 0x5D85, 0x8DE5, 0x5D86, 0x8DE6, + 0x5D87, 0x8DE7, 0x5D88, 0x8DE8, 0x5D89, 0x8DE9, 0x5D8A, 0x8DEA, + 0x5D8B, 0x8DEB, 0x5D8C, 0x8DEC, 0x5D8D, 0x8DED, 0x5D8E, 0x8DEE, + 0x5D8F, 0x8DEF, 0x5D90, 0x8DF0, 0x5D91, 0x8DF1, 0x5D92, 0x8DF2, + 0x5D93, 0x8DF3, 0x5D94, 0x8DF4, 0x5D95, 0x8DF5, 0x5D96, 0x8DF6, + 0x5D97, 0x8DF7, 0x5D98, 0x8DF8, 0x5D99, 0xE1D7, 0x5D9A, 0x8DF9, + 0x5D9B, 0x8DFA, 0x5D9C, 0x8DFB, 0x5D9D, 0xE1D8, 0x5D9E, 0x8DFC, + 0x5D9F, 0x8DFD, 0x5DA0, 0x8DFE, 0x5DA1, 0x8E40, 0x5DA2, 0x8E41, + 0x5DA3, 0x8E42, 0x5DA4, 0x8E43, 0x5DA5, 0x8E44, 0x5DA6, 0x8E45, + 0x5DA7, 0x8E46, 0x5DA8, 0x8E47, 0x5DA9, 0x8E48, 0x5DAA, 0x8E49, + 0x5DAB, 0x8E4A, 0x5DAC, 0x8E4B, 0x5DAD, 0x8E4C, 0x5DAE, 0x8E4D, + 0x5DAF, 0x8E4E, 0x5DB0, 0x8E4F, 0x5DB1, 0x8E50, 0x5DB2, 0x8E51, + 0x5DB3, 0x8E52, 0x5DB4, 0x8E53, 0x5DB5, 0x8E54, 0x5DB6, 0x8E55, + 0x5DB7, 0xE1DA, 0x5DB8, 0x8E56, 0x5DB9, 0x8E57, 0x5DBA, 0x8E58, + 0x5DBB, 0x8E59, 0x5DBC, 0x8E5A, 0x5DBD, 0x8E5B, 0x5DBE, 0x8E5C, + 0x5DBF, 0x8E5D, 0x5DC0, 0x8E5E, 0x5DC1, 0x8E5F, 0x5DC2, 0x8E60, + 0x5DC3, 0x8E61, 0x5DC4, 0x8E62, 0x5DC5, 0xE1DB, 0x5DC6, 0x8E63, + 0x5DC7, 0x8E64, 0x5DC8, 0x8E65, 0x5DC9, 0x8E66, 0x5DCA, 0x8E67, + 0x5DCB, 0x8E68, 0x5DCC, 0x8E69, 0x5DCD, 0xCEA1, 0x5DCE, 0x8E6A, + 0x5DCF, 0x8E6B, 0x5DD0, 0x8E6C, 0x5DD1, 0x8E6D, 0x5DD2, 0x8E6E, + 0x5DD3, 0x8E6F, 0x5DD4, 0x8E70, 0x5DD5, 0x8E71, 0x5DD6, 0x8E72, + 0x5DD7, 0x8E73, 0x5DD8, 0x8E74, 0x5DD9, 0x8E75, 0x5DDA, 0x8E76, + 0x5DDB, 0xE7DD, 0x5DDC, 0x8E77, 0x5DDD, 0xB4A8, 0x5DDE, 0xD6DD, + 0x5DDF, 0x8E78, 0x5DE0, 0x8E79, 0x5DE1, 0xD1B2, 0x5DE2, 0xB3B2, + 0x5DE3, 0x8E7A, 0x5DE4, 0x8E7B, 0x5DE5, 0xB9A4, 0x5DE6, 0xD7F3, + 0x5DE7, 0xC7C9, 0x5DE8, 0xBEDE, 0x5DE9, 0xB9AE, 0x5DEA, 0x8E7C, + 0x5DEB, 0xCED7, 0x5DEC, 0x8E7D, 0x5DED, 0x8E7E, 0x5DEE, 0xB2EE, + 0x5DEF, 0xDBCF, 0x5DF0, 0x8E80, 0x5DF1, 0xBCBA, 0x5DF2, 0xD2D1, + 0x5DF3, 0xCBC8, 0x5DF4, 0xB0CD, 0x5DF5, 0x8E81, 0x5DF6, 0x8E82, + 0x5DF7, 0xCFEF, 0x5DF8, 0x8E83, 0x5DF9, 0x8E84, 0x5DFA, 0x8E85, + 0x5DFB, 0x8E86, 0x5DFC, 0x8E87, 0x5DFD, 0xD9E3, 0x5DFE, 0xBDED, + 0x5DFF, 0x8E88, 0x5E00, 0x8E89, 0x5E01, 0xB1D2, 0x5E02, 0xCAD0, + 0x5E03, 0xB2BC, 0x5E04, 0x8E8A, 0x5E05, 0xCBA7, 0x5E06, 0xB7AB, + 0x5E07, 0x8E8B, 0x5E08, 0xCAA6, 0x5E09, 0x8E8C, 0x5E0A, 0x8E8D, + 0x5E0B, 0x8E8E, 0x5E0C, 0xCFA3, 0x5E0D, 0x8E8F, 0x5E0E, 0x8E90, + 0x5E0F, 0xE0F8, 0x5E10, 0xD5CA, 0x5E11, 0xE0FB, 0x5E12, 0x8E91, + 0x5E13, 0x8E92, 0x5E14, 0xE0FA, 0x5E15, 0xC5C1, 0x5E16, 0xCCFB, + 0x5E17, 0x8E93, 0x5E18, 0xC1B1, 0x5E19, 0xE0F9, 0x5E1A, 0xD6E3, + 0x5E1B, 0xB2AF, 0x5E1C, 0xD6C4, 0x5E1D, 0xB5DB, 0x5E1E, 0x8E94, + 0x5E1F, 0x8E95, 0x5E20, 0x8E96, 0x5E21, 0x8E97, 0x5E22, 0x8E98, + 0x5E23, 0x8E99, 0x5E24, 0x8E9A, 0x5E25, 0x8E9B, 0x5E26, 0xB4F8, + 0x5E27, 0xD6A1, 0x5E28, 0x8E9C, 0x5E29, 0x8E9D, 0x5E2A, 0x8E9E, + 0x5E2B, 0x8E9F, 0x5E2C, 0x8EA0, 0x5E2D, 0xCFAF, 0x5E2E, 0xB0EF, + 0x5E2F, 0x8EA1, 0x5E30, 0x8EA2, 0x5E31, 0xE0FC, 0x5E32, 0x8EA3, + 0x5E33, 0x8EA4, 0x5E34, 0x8EA5, 0x5E35, 0x8EA6, 0x5E36, 0x8EA7, + 0x5E37, 0xE1A1, 0x5E38, 0xB3A3, 0x5E39, 0x8EA8, 0x5E3A, 0x8EA9, + 0x5E3B, 0xE0FD, 0x5E3C, 0xE0FE, 0x5E3D, 0xC3B1, 0x5E3E, 0x8EAA, + 0x5E3F, 0x8EAB, 0x5E40, 0x8EAC, 0x5E41, 0x8EAD, 0x5E42, 0xC3DD, + 0x5E43, 0x8EAE, 0x5E44, 0xE1A2, 0x5E45, 0xB7F9, 0x5E46, 0x8EAF, + 0x5E47, 0x8EB0, 0x5E48, 0x8EB1, 0x5E49, 0x8EB2, 0x5E4A, 0x8EB3, + 0x5E4B, 0x8EB4, 0x5E4C, 0xBBCF, 0x5E4D, 0x8EB5, 0x5E4E, 0x8EB6, + 0x5E4F, 0x8EB7, 0x5E50, 0x8EB8, 0x5E51, 0x8EB9, 0x5E52, 0x8EBA, + 0x5E53, 0x8EBB, 0x5E54, 0xE1A3, 0x5E55, 0xC4BB, 0x5E56, 0x8EBC, + 0x5E57, 0x8EBD, 0x5E58, 0x8EBE, 0x5E59, 0x8EBF, 0x5E5A, 0x8EC0, + 0x5E5B, 0xE1A4, 0x5E5C, 0x8EC1, 0x5E5D, 0x8EC2, 0x5E5E, 0xE1A5, + 0x5E5F, 0x8EC3, 0x5E60, 0x8EC4, 0x5E61, 0xE1A6, 0x5E62, 0xB4B1, + 0x5E63, 0x8EC5, 0x5E64, 0x8EC6, 0x5E65, 0x8EC7, 0x5E66, 0x8EC8, + 0x5E67, 0x8EC9, 0x5E68, 0x8ECA, 0x5E69, 0x8ECB, 0x5E6A, 0x8ECC, + 0x5E6B, 0x8ECD, 0x5E6C, 0x8ECE, 0x5E6D, 0x8ECF, 0x5E6E, 0x8ED0, + 0x5E6F, 0x8ED1, 0x5E70, 0x8ED2, 0x5E71, 0x8ED3, 0x5E72, 0xB8C9, + 0x5E73, 0xC6BD, 0x5E74, 0xC4EA, 0x5E75, 0x8ED4, 0x5E76, 0xB2A2, + 0x5E77, 0x8ED5, 0x5E78, 0xD0D2, 0x5E79, 0x8ED6, 0x5E7A, 0xE7DB, + 0x5E7B, 0xBBC3, 0x5E7C, 0xD3D7, 0x5E7D, 0xD3C4, 0x5E7E, 0x8ED7, + 0x5E7F, 0xB9E3, 0x5E80, 0xE2CF, 0x5E81, 0x8ED8, 0x5E82, 0x8ED9, + 0x5E83, 0x8EDA, 0x5E84, 0xD7AF, 0x5E85, 0x8EDB, 0x5E86, 0xC7EC, + 0x5E87, 0xB1D3, 0x5E88, 0x8EDC, 0x5E89, 0x8EDD, 0x5E8A, 0xB4B2, + 0x5E8B, 0xE2D1, 0x5E8C, 0x8EDE, 0x5E8D, 0x8EDF, 0x5E8E, 0x8EE0, + 0x5E8F, 0xD0F2, 0x5E90, 0xC2AE, 0x5E91, 0xE2D0, 0x5E92, 0x8EE1, + 0x5E93, 0xBFE2, 0x5E94, 0xD3A6, 0x5E95, 0xB5D7, 0x5E96, 0xE2D2, + 0x5E97, 0xB5EA, 0x5E98, 0x8EE2, 0x5E99, 0xC3ED, 0x5E9A, 0xB8FD, + 0x5E9B, 0x8EE3, 0x5E9C, 0xB8AE, 0x5E9D, 0x8EE4, 0x5E9E, 0xC5D3, + 0x5E9F, 0xB7CF, 0x5EA0, 0xE2D4, 0x5EA1, 0x8EE5, 0x5EA2, 0x8EE6, + 0x5EA3, 0x8EE7, 0x5EA4, 0x8EE8, 0x5EA5, 0xE2D3, 0x5EA6, 0xB6C8, + 0x5EA7, 0xD7F9, 0x5EA8, 0x8EE9, 0x5EA9, 0x8EEA, 0x5EAA, 0x8EEB, + 0x5EAB, 0x8EEC, 0x5EAC, 0x8EED, 0x5EAD, 0xCDA5, 0x5EAE, 0x8EEE, + 0x5EAF, 0x8EEF, 0x5EB0, 0x8EF0, 0x5EB1, 0x8EF1, 0x5EB2, 0x8EF2, + 0x5EB3, 0xE2D8, 0x5EB4, 0x8EF3, 0x5EB5, 0xE2D6, 0x5EB6, 0xCAFC, + 0x5EB7, 0xBFB5, 0x5EB8, 0xD3B9, 0x5EB9, 0xE2D5, 0x5EBA, 0x8EF4, + 0x5EBB, 0x8EF5, 0x5EBC, 0x8EF6, 0x5EBD, 0x8EF7, 0x5EBE, 0xE2D7, + 0x5EBF, 0x8EF8, 0x5EC0, 0x8EF9, 0x5EC1, 0x8EFA, 0x5EC2, 0x8EFB, + 0x5EC3, 0x8EFC, 0x5EC4, 0x8EFD, 0x5EC5, 0x8EFE, 0x5EC6, 0x8F40, + 0x5EC7, 0x8F41, 0x5EC8, 0x8F42, 0x5EC9, 0xC1AE, 0x5ECA, 0xC0C8, + 0x5ECB, 0x8F43, 0x5ECC, 0x8F44, 0x5ECD, 0x8F45, 0x5ECE, 0x8F46, + 0x5ECF, 0x8F47, 0x5ED0, 0x8F48, 0x5ED1, 0xE2DB, 0x5ED2, 0xE2DA, + 0x5ED3, 0xC0AA, 0x5ED4, 0x8F49, 0x5ED5, 0x8F4A, 0x5ED6, 0xC1CE, + 0x5ED7, 0x8F4B, 0x5ED8, 0x8F4C, 0x5ED9, 0x8F4D, 0x5EDA, 0x8F4E, + 0x5EDB, 0xE2DC, 0x5EDC, 0x8F4F, 0x5EDD, 0x8F50, 0x5EDE, 0x8F51, + 0x5EDF, 0x8F52, 0x5EE0, 0x8F53, 0x5EE1, 0x8F54, 0x5EE2, 0x8F55, + 0x5EE3, 0x8F56, 0x5EE4, 0x8F57, 0x5EE5, 0x8F58, 0x5EE6, 0x8F59, + 0x5EE7, 0x8F5A, 0x5EE8, 0xE2DD, 0x5EE9, 0x8F5B, 0x5EEA, 0xE2DE, + 0x5EEB, 0x8F5C, 0x5EEC, 0x8F5D, 0x5EED, 0x8F5E, 0x5EEE, 0x8F5F, + 0x5EEF, 0x8F60, 0x5EF0, 0x8F61, 0x5EF1, 0x8F62, 0x5EF2, 0x8F63, + 0x5EF3, 0x8F64, 0x5EF4, 0xDBC8, 0x5EF5, 0x8F65, 0x5EF6, 0xD1D3, + 0x5EF7, 0xCDA2, 0x5EF8, 0x8F66, 0x5EF9, 0x8F67, 0x5EFA, 0xBDA8, + 0x5EFB, 0x8F68, 0x5EFC, 0x8F69, 0x5EFD, 0x8F6A, 0x5EFE, 0xDEC3, + 0x5EFF, 0xD8A5, 0x5F00, 0xBFAA, 0x5F01, 0xDBCD, 0x5F02, 0xD2EC, + 0x5F03, 0xC6FA, 0x5F04, 0xC5AA, 0x5F05, 0x8F6B, 0x5F06, 0x8F6C, + 0x5F07, 0x8F6D, 0x5F08, 0xDEC4, 0x5F09, 0x8F6E, 0x5F0A, 0xB1D7, + 0x5F0B, 0xDFAE, 0x5F0C, 0x8F6F, 0x5F0D, 0x8F70, 0x5F0E, 0x8F71, + 0x5F0F, 0xCABD, 0x5F10, 0x8F72, 0x5F11, 0xDFB1, 0x5F12, 0x8F73, + 0x5F13, 0xB9AD, 0x5F14, 0x8F74, 0x5F15, 0xD2FD, 0x5F16, 0x8F75, + 0x5F17, 0xB8A5, 0x5F18, 0xBAEB, 0x5F19, 0x8F76, 0x5F1A, 0x8F77, + 0x5F1B, 0xB3DA, 0x5F1C, 0x8F78, 0x5F1D, 0x8F79, 0x5F1E, 0x8F7A, + 0x5F1F, 0xB5DC, 0x5F20, 0xD5C5, 0x5F21, 0x8F7B, 0x5F22, 0x8F7C, + 0x5F23, 0x8F7D, 0x5F24, 0x8F7E, 0x5F25, 0xC3D6, 0x5F26, 0xCFD2, + 0x5F27, 0xBBA1, 0x5F28, 0x8F80, 0x5F29, 0xE5F3, 0x5F2A, 0xE5F2, + 0x5F2B, 0x8F81, 0x5F2C, 0x8F82, 0x5F2D, 0xE5F4, 0x5F2E, 0x8F83, + 0x5F2F, 0xCDE4, 0x5F30, 0x8F84, 0x5F31, 0xC8F5, 0x5F32, 0x8F85, + 0x5F33, 0x8F86, 0x5F34, 0x8F87, 0x5F35, 0x8F88, 0x5F36, 0x8F89, + 0x5F37, 0x8F8A, 0x5F38, 0x8F8B, 0x5F39, 0xB5AF, 0x5F3A, 0xC7BF, + 0x5F3B, 0x8F8C, 0x5F3C, 0xE5F6, 0x5F3D, 0x8F8D, 0x5F3E, 0x8F8E, + 0x5F3F, 0x8F8F, 0x5F40, 0xECB0, 0x5F41, 0x8F90, 0x5F42, 0x8F91, + 0x5F43, 0x8F92, 0x5F44, 0x8F93, 0x5F45, 0x8F94, 0x5F46, 0x8F95, + 0x5F47, 0x8F96, 0x5F48, 0x8F97, 0x5F49, 0x8F98, 0x5F4A, 0x8F99, + 0x5F4B, 0x8F9A, 0x5F4C, 0x8F9B, 0x5F4D, 0x8F9C, 0x5F4E, 0x8F9D, + 0x5F4F, 0x8F9E, 0x5F50, 0xE5E6, 0x5F51, 0x8F9F, 0x5F52, 0xB9E9, + 0x5F53, 0xB5B1, 0x5F54, 0x8FA0, 0x5F55, 0xC2BC, 0x5F56, 0xE5E8, + 0x5F57, 0xE5E7, 0x5F58, 0xE5E9, 0x5F59, 0x8FA1, 0x5F5A, 0x8FA2, + 0x5F5B, 0x8FA3, 0x5F5C, 0x8FA4, 0x5F5D, 0xD2CD, 0x5F5E, 0x8FA5, + 0x5F5F, 0x8FA6, 0x5F60, 0x8FA7, 0x5F61, 0xE1EA, 0x5F62, 0xD0CE, + 0x5F63, 0x8FA8, 0x5F64, 0xCDAE, 0x5F65, 0x8FA9, 0x5F66, 0xD1E5, + 0x5F67, 0x8FAA, 0x5F68, 0x8FAB, 0x5F69, 0xB2CA, 0x5F6A, 0xB1EB, + 0x5F6B, 0x8FAC, 0x5F6C, 0xB1F2, 0x5F6D, 0xC5ED, 0x5F6E, 0x8FAD, + 0x5F6F, 0x8FAE, 0x5F70, 0xD5C3, 0x5F71, 0xD3B0, 0x5F72, 0x8FAF, + 0x5F73, 0xE1DC, 0x5F74, 0x8FB0, 0x5F75, 0x8FB1, 0x5F76, 0x8FB2, + 0x5F77, 0xE1DD, 0x5F78, 0x8FB3, 0x5F79, 0xD2DB, 0x5F7A, 0x8FB4, + 0x5F7B, 0xB3B9, 0x5F7C, 0xB1CB, 0x5F7D, 0x8FB5, 0x5F7E, 0x8FB6, + 0x5F7F, 0x8FB7, 0x5F80, 0xCDF9, 0x5F81, 0xD5F7, 0x5F82, 0xE1DE, + 0x5F83, 0x8FB8, 0x5F84, 0xBEB6, 0x5F85, 0xB4FD, 0x5F86, 0x8FB9, + 0x5F87, 0xE1DF, 0x5F88, 0xBADC, 0x5F89, 0xE1E0, 0x5F8A, 0xBBB2, + 0x5F8B, 0xC2C9, 0x5F8C, 0xE1E1, 0x5F8D, 0x8FBA, 0x5F8E, 0x8FBB, + 0x5F8F, 0x8FBC, 0x5F90, 0xD0EC, 0x5F91, 0x8FBD, 0x5F92, 0xCDBD, + 0x5F93, 0x8FBE, 0x5F94, 0x8FBF, 0x5F95, 0xE1E2, 0x5F96, 0x8FC0, + 0x5F97, 0xB5C3, 0x5F98, 0xC5C7, 0x5F99, 0xE1E3, 0x5F9A, 0x8FC1, + 0x5F9B, 0x8FC2, 0x5F9C, 0xE1E4, 0x5F9D, 0x8FC3, 0x5F9E, 0x8FC4, + 0x5F9F, 0x8FC5, 0x5FA0, 0x8FC6, 0x5FA1, 0xD3F9, 0x5FA2, 0x8FC7, + 0x5FA3, 0x8FC8, 0x5FA4, 0x8FC9, 0x5FA5, 0x8FCA, 0x5FA6, 0x8FCB, + 0x5FA7, 0x8FCC, 0x5FA8, 0xE1E5, 0x5FA9, 0x8FCD, 0x5FAA, 0xD1AD, + 0x5FAB, 0x8FCE, 0x5FAC, 0x8FCF, 0x5FAD, 0xE1E6, 0x5FAE, 0xCEA2, + 0x5FAF, 0x8FD0, 0x5FB0, 0x8FD1, 0x5FB1, 0x8FD2, 0x5FB2, 0x8FD3, + 0x5FB3, 0x8FD4, 0x5FB4, 0x8FD5, 0x5FB5, 0xE1E7, 0x5FB6, 0x8FD6, + 0x5FB7, 0xB5C2, 0x5FB8, 0x8FD7, 0x5FB9, 0x8FD8, 0x5FBA, 0x8FD9, + 0x5FBB, 0x8FDA, 0x5FBC, 0xE1E8, 0x5FBD, 0xBBD5, 0x5FBE, 0x8FDB, + 0x5FBF, 0x8FDC, 0x5FC0, 0x8FDD, 0x5FC1, 0x8FDE, 0x5FC2, 0x8FDF, + 0x5FC3, 0xD0C4, 0x5FC4, 0xE2E0, 0x5FC5, 0xB1D8, 0x5FC6, 0xD2E4, + 0x5FC7, 0x8FE0, 0x5FC8, 0x8FE1, 0x5FC9, 0xE2E1, 0x5FCA, 0x8FE2, + 0x5FCB, 0x8FE3, 0x5FCC, 0xBCC9, 0x5FCD, 0xC8CC, 0x5FCE, 0x8FE4, + 0x5FCF, 0xE2E3, 0x5FD0, 0xECFE, 0x5FD1, 0xECFD, 0x5FD2, 0xDFAF, + 0x5FD3, 0x8FE5, 0x5FD4, 0x8FE6, 0x5FD5, 0x8FE7, 0x5FD6, 0xE2E2, + 0x5FD7, 0xD6BE, 0x5FD8, 0xCDFC, 0x5FD9, 0xC3A6, 0x5FDA, 0x8FE8, + 0x5FDB, 0x8FE9, 0x5FDC, 0x8FEA, 0x5FDD, 0xE3C3, 0x5FDE, 0x8FEB, + 0x5FDF, 0x8FEC, 0x5FE0, 0xD6D2, 0x5FE1, 0xE2E7, 0x5FE2, 0x8FED, + 0x5FE3, 0x8FEE, 0x5FE4, 0xE2E8, 0x5FE5, 0x8FEF, 0x5FE6, 0x8FF0, + 0x5FE7, 0xD3C7, 0x5FE8, 0x8FF1, 0x5FE9, 0x8FF2, 0x5FEA, 0xE2EC, + 0x5FEB, 0xBFEC, 0x5FEC, 0x8FF3, 0x5FED, 0xE2ED, 0x5FEE, 0xE2E5, + 0x5FEF, 0x8FF4, 0x5FF0, 0x8FF5, 0x5FF1, 0xB3C0, 0x5FF2, 0x8FF6, + 0x5FF3, 0x8FF7, 0x5FF4, 0x8FF8, 0x5FF5, 0xC4EE, 0x5FF6, 0x8FF9, + 0x5FF7, 0x8FFA, 0x5FF8, 0xE2EE, 0x5FF9, 0x8FFB, 0x5FFA, 0x8FFC, + 0x5FFB, 0xD0C3, 0x5FFC, 0x8FFD, 0x5FFD, 0xBAF6, 0x5FFE, 0xE2E9, + 0x5FFF, 0xB7DE, 0x6000, 0xBBB3, 0x6001, 0xCCAC, 0x6002, 0xCBCB, + 0x6003, 0xE2E4, 0x6004, 0xE2E6, 0x6005, 0xE2EA, 0x6006, 0xE2EB, + 0x6007, 0x8FFE, 0x6008, 0x9040, 0x6009, 0x9041, 0x600A, 0xE2F7, + 0x600B, 0x9042, 0x600C, 0x9043, 0x600D, 0xE2F4, 0x600E, 0xD4F5, + 0x600F, 0xE2F3, 0x6010, 0x9044, 0x6011, 0x9045, 0x6012, 0xC5AD, + 0x6013, 0x9046, 0x6014, 0xD5FA, 0x6015, 0xC5C2, 0x6016, 0xB2C0, + 0x6017, 0x9047, 0x6018, 0x9048, 0x6019, 0xE2EF, 0x601A, 0x9049, + 0x601B, 0xE2F2, 0x601C, 0xC1AF, 0x601D, 0xCBBC, 0x601E, 0x904A, + 0x601F, 0x904B, 0x6020, 0xB5A1, 0x6021, 0xE2F9, 0x6022, 0x904C, + 0x6023, 0x904D, 0x6024, 0x904E, 0x6025, 0xBCB1, 0x6026, 0xE2F1, + 0x6027, 0xD0D4, 0x6028, 0xD4B9, 0x6029, 0xE2F5, 0x602A, 0xB9D6, + 0x602B, 0xE2F6, 0x602C, 0x904F, 0x602D, 0x9050, 0x602E, 0x9051, + 0x602F, 0xC7D3, 0x6030, 0x9052, 0x6031, 0x9053, 0x6032, 0x9054, + 0x6033, 0x9055, 0x6034, 0x9056, 0x6035, 0xE2F0, 0x6036, 0x9057, + 0x6037, 0x9058, 0x6038, 0x9059, 0x6039, 0x905A, 0x603A, 0x905B, + 0x603B, 0xD7DC, 0x603C, 0xEDA1, 0x603D, 0x905C, 0x603E, 0x905D, + 0x603F, 0xE2F8, 0x6040, 0x905E, 0x6041, 0xEDA5, 0x6042, 0xE2FE, + 0x6043, 0xCAD1, 0x6044, 0x905F, 0x6045, 0x9060, 0x6046, 0x9061, + 0x6047, 0x9062, 0x6048, 0x9063, 0x6049, 0x9064, 0x604A, 0x9065, + 0x604B, 0xC1B5, 0x604C, 0x9066, 0x604D, 0xBBD0, 0x604E, 0x9067, + 0x604F, 0x9068, 0x6050, 0xBFD6, 0x6051, 0x9069, 0x6052, 0xBAE3, + 0x6053, 0x906A, 0x6054, 0x906B, 0x6055, 0xCBA1, 0x6056, 0x906C, + 0x6057, 0x906D, 0x6058, 0x906E, 0x6059, 0xEDA6, 0x605A, 0xEDA3, + 0x605B, 0x906F, 0x605C, 0x9070, 0x605D, 0xEDA2, 0x605E, 0x9071, + 0x605F, 0x9072, 0x6060, 0x9073, 0x6061, 0x9074, 0x6062, 0xBBD6, + 0x6063, 0xEDA7, 0x6064, 0xD0F4, 0x6065, 0x9075, 0x6066, 0x9076, + 0x6067, 0xEDA4, 0x6068, 0xBADE, 0x6069, 0xB6F7, 0x606A, 0xE3A1, + 0x606B, 0xB6B2, 0x606C, 0xCCF1, 0x606D, 0xB9A7, 0x606E, 0x9077, + 0x606F, 0xCFA2, 0x6070, 0xC7A1, 0x6071, 0x9078, 0x6072, 0x9079, + 0x6073, 0xBFD2, 0x6074, 0x907A, 0x6075, 0x907B, 0x6076, 0xB6F1, + 0x6077, 0x907C, 0x6078, 0xE2FA, 0x6079, 0xE2FB, 0x607A, 0xE2FD, + 0x607B, 0xE2FC, 0x607C, 0xC4D5, 0x607D, 0xE3A2, 0x607E, 0x907D, + 0x607F, 0xD3C1, 0x6080, 0x907E, 0x6081, 0x9080, 0x6082, 0x9081, + 0x6083, 0xE3A7, 0x6084, 0xC7C4, 0x6085, 0x9082, 0x6086, 0x9083, + 0x6087, 0x9084, 0x6088, 0x9085, 0x6089, 0xCFA4, 0x608A, 0x9086, + 0x608B, 0x9087, 0x608C, 0xE3A9, 0x608D, 0xBAB7, 0x608E, 0x9088, + 0x608F, 0x9089, 0x6090, 0x908A, 0x6091, 0x908B, 0x6092, 0xE3A8, + 0x6093, 0x908C, 0x6094, 0xBBDA, 0x6095, 0x908D, 0x6096, 0xE3A3, + 0x6097, 0x908E, 0x6098, 0x908F, 0x6099, 0x9090, 0x609A, 0xE3A4, + 0x609B, 0xE3AA, 0x609C, 0x9091, 0x609D, 0xE3A6, 0x609E, 0x9092, + 0x609F, 0xCEF2, 0x60A0, 0xD3C6, 0x60A1, 0x9093, 0x60A2, 0x9094, + 0x60A3, 0xBBBC, 0x60A4, 0x9095, 0x60A5, 0x9096, 0x60A6, 0xD4C3, + 0x60A7, 0x9097, 0x60A8, 0xC4FA, 0x60A9, 0x9098, 0x60AA, 0x9099, + 0x60AB, 0xEDA8, 0x60AC, 0xD0FC, 0x60AD, 0xE3A5, 0x60AE, 0x909A, + 0x60AF, 0xC3F5, 0x60B0, 0x909B, 0x60B1, 0xE3AD, 0x60B2, 0xB1AF, + 0x60B3, 0x909C, 0x60B4, 0xE3B2, 0x60B5, 0x909D, 0x60B6, 0x909E, + 0x60B7, 0x909F, 0x60B8, 0xBCC2, 0x60B9, 0x90A0, 0x60BA, 0x90A1, + 0x60BB, 0xE3AC, 0x60BC, 0xB5BF, 0x60BD, 0x90A2, 0x60BE, 0x90A3, + 0x60BF, 0x90A4, 0x60C0, 0x90A5, 0x60C1, 0x90A6, 0x60C2, 0x90A7, + 0x60C3, 0x90A8, 0x60C4, 0x90A9, 0x60C5, 0xC7E9, 0x60C6, 0xE3B0, + 0x60C7, 0x90AA, 0x60C8, 0x90AB, 0x60C9, 0x90AC, 0x60CA, 0xBEAA, + 0x60CB, 0xCDEF, 0x60CC, 0x90AD, 0x60CD, 0x90AE, 0x60CE, 0x90AF, + 0x60CF, 0x90B0, 0x60D0, 0x90B1, 0x60D1, 0xBBF3, 0x60D2, 0x90B2, + 0x60D3, 0x90B3, 0x60D4, 0x90B4, 0x60D5, 0xCCE8, 0x60D6, 0x90B5, + 0x60D7, 0x90B6, 0x60D8, 0xE3AF, 0x60D9, 0x90B7, 0x60DA, 0xE3B1, + 0x60DB, 0x90B8, 0x60DC, 0xCFA7, 0x60DD, 0xE3AE, 0x60DE, 0x90B9, + 0x60DF, 0xCEA9, 0x60E0, 0xBBDD, 0x60E1, 0x90BA, 0x60E2, 0x90BB, + 0x60E3, 0x90BC, 0x60E4, 0x90BD, 0x60E5, 0x90BE, 0x60E6, 0xB5EB, + 0x60E7, 0xBEE5, 0x60E8, 0xB2D2, 0x60E9, 0xB3CD, 0x60EA, 0x90BF, + 0x60EB, 0xB1B9, 0x60EC, 0xE3AB, 0x60ED, 0xB2D1, 0x60EE, 0xB5AC, + 0x60EF, 0xB9DF, 0x60F0, 0xB6E8, 0x60F1, 0x90C0, 0x60F2, 0x90C1, + 0x60F3, 0xCFEB, 0x60F4, 0xE3B7, 0x60F5, 0x90C2, 0x60F6, 0xBBCC, + 0x60F7, 0x90C3, 0x60F8, 0x90C4, 0x60F9, 0xC8C7, 0x60FA, 0xD0CA, + 0x60FB, 0x90C5, 0x60FC, 0x90C6, 0x60FD, 0x90C7, 0x60FE, 0x90C8, + 0x60FF, 0x90C9, 0x6100, 0xE3B8, 0x6101, 0xB3EE, 0x6102, 0x90CA, + 0x6103, 0x90CB, 0x6104, 0x90CC, 0x6105, 0x90CD, 0x6106, 0xEDA9, + 0x6107, 0x90CE, 0x6108, 0xD3FA, 0x6109, 0xD3E4, 0x610A, 0x90CF, + 0x610B, 0x90D0, 0x610C, 0x90D1, 0x610D, 0xEDAA, 0x610E, 0xE3B9, + 0x610F, 0xD2E2, 0x6110, 0x90D2, 0x6111, 0x90D3, 0x6112, 0x90D4, + 0x6113, 0x90D5, 0x6114, 0x90D6, 0x6115, 0xE3B5, 0x6116, 0x90D7, + 0x6117, 0x90D8, 0x6118, 0x90D9, 0x6119, 0x90DA, 0x611A, 0xD3DE, + 0x611B, 0x90DB, 0x611C, 0x90DC, 0x611D, 0x90DD, 0x611E, 0x90DE, + 0x611F, 0xB8D0, 0x6120, 0xE3B3, 0x6121, 0x90DF, 0x6122, 0x90E0, + 0x6123, 0xE3B6, 0x6124, 0xB7DF, 0x6125, 0x90E1, 0x6126, 0xE3B4, + 0x6127, 0xC0A2, 0x6128, 0x90E2, 0x6129, 0x90E3, 0x612A, 0x90E4, + 0x612B, 0xE3BA, 0x612C, 0x90E5, 0x612D, 0x90E6, 0x612E, 0x90E7, + 0x612F, 0x90E8, 0x6130, 0x90E9, 0x6131, 0x90EA, 0x6132, 0x90EB, + 0x6133, 0x90EC, 0x6134, 0x90ED, 0x6135, 0x90EE, 0x6136, 0x90EF, + 0x6137, 0x90F0, 0x6138, 0x90F1, 0x6139, 0x90F2, 0x613A, 0x90F3, + 0x613B, 0x90F4, 0x613C, 0x90F5, 0x613D, 0x90F6, 0x613E, 0x90F7, + 0x613F, 0xD4B8, 0x6140, 0x90F8, 0x6141, 0x90F9, 0x6142, 0x90FA, + 0x6143, 0x90FB, 0x6144, 0x90FC, 0x6145, 0x90FD, 0x6146, 0x90FE, + 0x6147, 0x9140, 0x6148, 0xB4C8, 0x6149, 0x9141, 0x614A, 0xE3BB, + 0x614B, 0x9142, 0x614C, 0xBBC5, 0x614D, 0x9143, 0x614E, 0xC9F7, + 0x614F, 0x9144, 0x6150, 0x9145, 0x6151, 0xC9E5, 0x6152, 0x9146, + 0x6153, 0x9147, 0x6154, 0x9148, 0x6155, 0xC4BD, 0x6156, 0x9149, + 0x6157, 0x914A, 0x6158, 0x914B, 0x6159, 0x914C, 0x615A, 0x914D, + 0x615B, 0x914E, 0x615C, 0x914F, 0x615D, 0xEDAB, 0x615E, 0x9150, + 0x615F, 0x9151, 0x6160, 0x9152, 0x6161, 0x9153, 0x6162, 0xC2FD, + 0x6163, 0x9154, 0x6164, 0x9155, 0x6165, 0x9156, 0x6166, 0x9157, + 0x6167, 0xBBDB, 0x6168, 0xBFAE, 0x6169, 0x9158, 0x616A, 0x9159, + 0x616B, 0x915A, 0x616C, 0x915B, 0x616D, 0x915C, 0x616E, 0x915D, + 0x616F, 0x915E, 0x6170, 0xCEBF, 0x6171, 0x915F, 0x6172, 0x9160, + 0x6173, 0x9161, 0x6174, 0x9162, 0x6175, 0xE3BC, 0x6176, 0x9163, + 0x6177, 0xBFB6, 0x6178, 0x9164, 0x6179, 0x9165, 0x617A, 0x9166, + 0x617B, 0x9167, 0x617C, 0x9168, 0x617D, 0x9169, 0x617E, 0x916A, + 0x617F, 0x916B, 0x6180, 0x916C, 0x6181, 0x916D, 0x6182, 0x916E, + 0x6183, 0x916F, 0x6184, 0x9170, 0x6185, 0x9171, 0x6186, 0x9172, + 0x6187, 0x9173, 0x6188, 0x9174, 0x6189, 0x9175, 0x618A, 0x9176, + 0x618B, 0xB1EF, 0x618C, 0x9177, 0x618D, 0x9178, 0x618E, 0xD4F7, + 0x618F, 0x9179, 0x6190, 0x917A, 0x6191, 0x917B, 0x6192, 0x917C, + 0x6193, 0x917D, 0x6194, 0xE3BE, 0x6195, 0x917E, 0x6196, 0x9180, + 0x6197, 0x9181, 0x6198, 0x9182, 0x6199, 0x9183, 0x619A, 0x9184, + 0x619B, 0x9185, 0x619C, 0x9186, 0x619D, 0xEDAD, 0x619E, 0x9187, + 0x619F, 0x9188, 0x61A0, 0x9189, 0x61A1, 0x918A, 0x61A2, 0x918B, + 0x61A3, 0x918C, 0x61A4, 0x918D, 0x61A5, 0x918E, 0x61A6, 0x918F, + 0x61A7, 0xE3BF, 0x61A8, 0xBAA9, 0x61A9, 0xEDAC, 0x61AA, 0x9190, + 0x61AB, 0x9191, 0x61AC, 0xE3BD, 0x61AD, 0x9192, 0x61AE, 0x9193, + 0x61AF, 0x9194, 0x61B0, 0x9195, 0x61B1, 0x9196, 0x61B2, 0x9197, + 0x61B3, 0x9198, 0x61B4, 0x9199, 0x61B5, 0x919A, 0x61B6, 0x919B, + 0x61B7, 0xE3C0, 0x61B8, 0x919C, 0x61B9, 0x919D, 0x61BA, 0x919E, + 0x61BB, 0x919F, 0x61BC, 0x91A0, 0x61BD, 0x91A1, 0x61BE, 0xBAB6, + 0x61BF, 0x91A2, 0x61C0, 0x91A3, 0x61C1, 0x91A4, 0x61C2, 0xB6AE, + 0x61C3, 0x91A5, 0x61C4, 0x91A6, 0x61C5, 0x91A7, 0x61C6, 0x91A8, + 0x61C7, 0x91A9, 0x61C8, 0xD0B8, 0x61C9, 0x91AA, 0x61CA, 0xB0C3, + 0x61CB, 0xEDAE, 0x61CC, 0x91AB, 0x61CD, 0x91AC, 0x61CE, 0x91AD, + 0x61CF, 0x91AE, 0x61D0, 0x91AF, 0x61D1, 0xEDAF, 0x61D2, 0xC0C1, + 0x61D3, 0x91B0, 0x61D4, 0xE3C1, 0x61D5, 0x91B1, 0x61D6, 0x91B2, + 0x61D7, 0x91B3, 0x61D8, 0x91B4, 0x61D9, 0x91B5, 0x61DA, 0x91B6, + 0x61DB, 0x91B7, 0x61DC, 0x91B8, 0x61DD, 0x91B9, 0x61DE, 0x91BA, + 0x61DF, 0x91BB, 0x61E0, 0x91BC, 0x61E1, 0x91BD, 0x61E2, 0x91BE, + 0x61E3, 0x91BF, 0x61E4, 0x91C0, 0x61E5, 0x91C1, 0x61E6, 0xC5B3, + 0x61E7, 0x91C2, 0x61E8, 0x91C3, 0x61E9, 0x91C4, 0x61EA, 0x91C5, + 0x61EB, 0x91C6, 0x61EC, 0x91C7, 0x61ED, 0x91C8, 0x61EE, 0x91C9, + 0x61EF, 0x91CA, 0x61F0, 0x91CB, 0x61F1, 0x91CC, 0x61F2, 0x91CD, + 0x61F3, 0x91CE, 0x61F4, 0x91CF, 0x61F5, 0xE3C2, 0x61F6, 0x91D0, + 0x61F7, 0x91D1, 0x61F8, 0x91D2, 0x61F9, 0x91D3, 0x61FA, 0x91D4, + 0x61FB, 0x91D5, 0x61FC, 0x91D6, 0x61FD, 0x91D7, 0x61FE, 0x91D8, + 0x61FF, 0xDCB2, 0x6200, 0x91D9, 0x6201, 0x91DA, 0x6202, 0x91DB, + 0x6203, 0x91DC, 0x6204, 0x91DD, 0x6205, 0x91DE, 0x6206, 0xEDB0, + 0x6207, 0x91DF, 0x6208, 0xB8EA, 0x6209, 0x91E0, 0x620A, 0xCEEC, + 0x620B, 0xEAA7, 0x620C, 0xD0E7, 0x620D, 0xCAF9, 0x620E, 0xC8D6, + 0x620F, 0xCFB7, 0x6210, 0xB3C9, 0x6211, 0xCED2, 0x6212, 0xBDE4, + 0x6213, 0x91E1, 0x6214, 0x91E2, 0x6215, 0xE3DE, 0x6216, 0xBBF2, + 0x6217, 0xEAA8, 0x6218, 0xD5BD, 0x6219, 0x91E3, 0x621A, 0xC6DD, + 0x621B, 0xEAA9, 0x621C, 0x91E4, 0x621D, 0x91E5, 0x621E, 0x91E6, + 0x621F, 0xEAAA, 0x6220, 0x91E7, 0x6221, 0xEAAC, 0x6222, 0xEAAB, + 0x6223, 0x91E8, 0x6224, 0xEAAE, 0x6225, 0xEAAD, 0x6226, 0x91E9, + 0x6227, 0x91EA, 0x6228, 0x91EB, 0x6229, 0x91EC, 0x622A, 0xBDD8, + 0x622B, 0x91ED, 0x622C, 0xEAAF, 0x622D, 0x91EE, 0x622E, 0xC2BE, + 0x622F, 0x91EF, 0x6230, 0x91F0, 0x6231, 0x91F1, 0x6232, 0x91F2, + 0x6233, 0xB4C1, 0x6234, 0xB4F7, 0x6235, 0x91F3, 0x6236, 0x91F4, + 0x6237, 0xBBA7, 0x6238, 0x91F5, 0x6239, 0x91F6, 0x623A, 0x91F7, + 0x623B, 0x91F8, 0x623C, 0x91F9, 0x623D, 0xECE6, 0x623E, 0xECE5, + 0x623F, 0xB7BF, 0x6240, 0xCBF9, 0x6241, 0xB1E2, 0x6242, 0x91FA, + 0x6243, 0xECE7, 0x6244, 0x91FB, 0x6245, 0x91FC, 0x6246, 0x91FD, + 0x6247, 0xC9C8, 0x6248, 0xECE8, 0x6249, 0xECE9, 0x624A, 0x91FE, + 0x624B, 0xCAD6, 0x624C, 0xDED0, 0x624D, 0xB2C5, 0x624E, 0xD4FA, + 0x624F, 0x9240, 0x6250, 0x9241, 0x6251, 0xC6CB, 0x6252, 0xB0C7, + 0x6253, 0xB4F2, 0x6254, 0xC8D3, 0x6255, 0x9242, 0x6256, 0x9243, + 0x6257, 0x9244, 0x6258, 0xCDD0, 0x6259, 0x9245, 0x625A, 0x9246, + 0x625B, 0xBFB8, 0x625C, 0x9247, 0x625D, 0x9248, 0x625E, 0x9249, + 0x625F, 0x924A, 0x6260, 0x924B, 0x6261, 0x924C, 0x6262, 0x924D, + 0x6263, 0xBFDB, 0x6264, 0x924E, 0x6265, 0x924F, 0x6266, 0xC7A4, + 0x6267, 0xD6B4, 0x6268, 0x9250, 0x6269, 0xC0A9, 0x626A, 0xDED1, + 0x626B, 0xC9A8, 0x626C, 0xD1EF, 0x626D, 0xC5A4, 0x626E, 0xB0E7, + 0x626F, 0xB3B6, 0x6270, 0xC8C5, 0x6271, 0x9251, 0x6272, 0x9252, + 0x6273, 0xB0E2, 0x6274, 0x9253, 0x6275, 0x9254, 0x6276, 0xB7F6, + 0x6277, 0x9255, 0x6278, 0x9256, 0x6279, 0xC5FA, 0x627A, 0x9257, + 0x627B, 0x9258, 0x627C, 0xB6F3, 0x627D, 0x9259, 0x627E, 0xD5D2, + 0x627F, 0xB3D0, 0x6280, 0xBCBC, 0x6281, 0x925A, 0x6282, 0x925B, + 0x6283, 0x925C, 0x6284, 0xB3AD, 0x6285, 0x925D, 0x6286, 0x925E, + 0x6287, 0x925F, 0x6288, 0x9260, 0x6289, 0xBEF1, 0x628A, 0xB0D1, + 0x628B, 0x9261, 0x628C, 0x9262, 0x628D, 0x9263, 0x628E, 0x9264, + 0x628F, 0x9265, 0x6290, 0x9266, 0x6291, 0xD2D6, 0x6292, 0xCAE3, + 0x6293, 0xD7A5, 0x6294, 0x9267, 0x6295, 0xCDB6, 0x6296, 0xB6B6, + 0x6297, 0xBFB9, 0x6298, 0xD5DB, 0x6299, 0x9268, 0x629A, 0xB8A7, + 0x629B, 0xC5D7, 0x629C, 0x9269, 0x629D, 0x926A, 0x629E, 0x926B, + 0x629F, 0xDED2, 0x62A0, 0xBFD9, 0x62A1, 0xC2D5, 0x62A2, 0xC7C0, + 0x62A3, 0x926C, 0x62A4, 0xBBA4, 0x62A5, 0xB1A8, 0x62A6, 0x926D, + 0x62A7, 0x926E, 0x62A8, 0xC5EA, 0x62A9, 0x926F, 0x62AA, 0x9270, + 0x62AB, 0xC5FB, 0x62AC, 0xCCA7, 0x62AD, 0x9271, 0x62AE, 0x9272, + 0x62AF, 0x9273, 0x62B0, 0x9274, 0x62B1, 0xB1A7, 0x62B2, 0x9275, + 0x62B3, 0x9276, 0x62B4, 0x9277, 0x62B5, 0xB5D6, 0x62B6, 0x9278, + 0x62B7, 0x9279, 0x62B8, 0x927A, 0x62B9, 0xC4A8, 0x62BA, 0x927B, + 0x62BB, 0xDED3, 0x62BC, 0xD1BA, 0x62BD, 0xB3E9, 0x62BE, 0x927C, + 0x62BF, 0xC3F2, 0x62C0, 0x927D, 0x62C1, 0x927E, 0x62C2, 0xB7F7, + 0x62C3, 0x9280, 0x62C4, 0xD6F4, 0x62C5, 0xB5A3, 0x62C6, 0xB2F0, + 0x62C7, 0xC4B4, 0x62C8, 0xC4E9, 0x62C9, 0xC0AD, 0x62CA, 0xDED4, + 0x62CB, 0x9281, 0x62CC, 0xB0E8, 0x62CD, 0xC5C4, 0x62CE, 0xC1E0, + 0x62CF, 0x9282, 0x62D0, 0xB9D5, 0x62D1, 0x9283, 0x62D2, 0xBEDC, + 0x62D3, 0xCDD8, 0x62D4, 0xB0CE, 0x62D5, 0x9284, 0x62D6, 0xCDCF, + 0x62D7, 0xDED6, 0x62D8, 0xBED0, 0x62D9, 0xD7BE, 0x62DA, 0xDED5, + 0x62DB, 0xD5D0, 0x62DC, 0xB0DD, 0x62DD, 0x9285, 0x62DE, 0x9286, + 0x62DF, 0xC4E2, 0x62E0, 0x9287, 0x62E1, 0x9288, 0x62E2, 0xC2A3, + 0x62E3, 0xBCF0, 0x62E4, 0x9289, 0x62E5, 0xD3B5, 0x62E6, 0xC0B9, + 0x62E7, 0xC5A1, 0x62E8, 0xB2A6, 0x62E9, 0xD4F1, 0x62EA, 0x928A, + 0x62EB, 0x928B, 0x62EC, 0xC0A8, 0x62ED, 0xCAC3, 0x62EE, 0xDED7, + 0x62EF, 0xD5FC, 0x62F0, 0x928C, 0x62F1, 0xB9B0, 0x62F2, 0x928D, + 0x62F3, 0xC8AD, 0x62F4, 0xCBA9, 0x62F5, 0x928E, 0x62F6, 0xDED9, + 0x62F7, 0xBFBD, 0x62F8, 0x928F, 0x62F9, 0x9290, 0x62FA, 0x9291, + 0x62FB, 0x9292, 0x62FC, 0xC6B4, 0x62FD, 0xD7A7, 0x62FE, 0xCAB0, + 0x62FF, 0xC4C3, 0x6300, 0x9293, 0x6301, 0xB3D6, 0x6302, 0xB9D2, + 0x6303, 0x9294, 0x6304, 0x9295, 0x6305, 0x9296, 0x6306, 0x9297, + 0x6307, 0xD6B8, 0x6308, 0xEAFC, 0x6309, 0xB0B4, 0x630A, 0x9298, + 0x630B, 0x9299, 0x630C, 0x929A, 0x630D, 0x929B, 0x630E, 0xBFE6, + 0x630F, 0x929C, 0x6310, 0x929D, 0x6311, 0xCCF4, 0x6312, 0x929E, + 0x6313, 0x929F, 0x6314, 0x92A0, 0x6315, 0x92A1, 0x6316, 0xCDDA, + 0x6317, 0x92A2, 0x6318, 0x92A3, 0x6319, 0x92A4, 0x631A, 0xD6BF, + 0x631B, 0xC2CE, 0x631C, 0x92A5, 0x631D, 0xCECE, 0x631E, 0xCCA2, + 0x631F, 0xD0AE, 0x6320, 0xC4D3, 0x6321, 0xB5B2, 0x6322, 0xDED8, + 0x6323, 0xD5F5, 0x6324, 0xBCB7, 0x6325, 0xBBD3, 0x6326, 0x92A6, + 0x6327, 0x92A7, 0x6328, 0xB0A4, 0x6329, 0x92A8, 0x632A, 0xC5B2, + 0x632B, 0xB4EC, 0x632C, 0x92A9, 0x632D, 0x92AA, 0x632E, 0x92AB, + 0x632F, 0xD5F1, 0x6330, 0x92AC, 0x6331, 0x92AD, 0x6332, 0xEAFD, + 0x6333, 0x92AE, 0x6334, 0x92AF, 0x6335, 0x92B0, 0x6336, 0x92B1, + 0x6337, 0x92B2, 0x6338, 0x92B3, 0x6339, 0xDEDA, 0x633A, 0xCDA6, + 0x633B, 0x92B4, 0x633C, 0x92B5, 0x633D, 0xCDEC, 0x633E, 0x92B6, + 0x633F, 0x92B7, 0x6340, 0x92B8, 0x6341, 0x92B9, 0x6342, 0xCEE6, + 0x6343, 0xDEDC, 0x6344, 0x92BA, 0x6345, 0xCDB1, 0x6346, 0xC0A6, + 0x6347, 0x92BB, 0x6348, 0x92BC, 0x6349, 0xD7BD, 0x634A, 0x92BD, + 0x634B, 0xDEDB, 0x634C, 0xB0C6, 0x634D, 0xBAB4, 0x634E, 0xC9D3, + 0x634F, 0xC4F3, 0x6350, 0xBEE8, 0x6351, 0x92BE, 0x6352, 0x92BF, + 0x6353, 0x92C0, 0x6354, 0x92C1, 0x6355, 0xB2B6, 0x6356, 0x92C2, + 0x6357, 0x92C3, 0x6358, 0x92C4, 0x6359, 0x92C5, 0x635A, 0x92C6, + 0x635B, 0x92C7, 0x635C, 0x92C8, 0x635D, 0x92C9, 0x635E, 0xC0CC, + 0x635F, 0xCBF0, 0x6360, 0x92CA, 0x6361, 0xBCF1, 0x6362, 0xBBBB, + 0x6363, 0xB5B7, 0x6364, 0x92CB, 0x6365, 0x92CC, 0x6366, 0x92CD, + 0x6367, 0xC5F5, 0x6368, 0x92CE, 0x6369, 0xDEE6, 0x636A, 0x92CF, + 0x636B, 0x92D0, 0x636C, 0x92D1, 0x636D, 0xDEE3, 0x636E, 0xBEDD, + 0x636F, 0x92D2, 0x6370, 0x92D3, 0x6371, 0xDEDF, 0x6372, 0x92D4, + 0x6373, 0x92D5, 0x6374, 0x92D6, 0x6375, 0x92D7, 0x6376, 0xB4B7, + 0x6377, 0xBDDD, 0x6378, 0x92D8, 0x6379, 0x92D9, 0x637A, 0xDEE0, + 0x637B, 0xC4ED, 0x637C, 0x92DA, 0x637D, 0x92DB, 0x637E, 0x92DC, + 0x637F, 0x92DD, 0x6380, 0xCFC6, 0x6381, 0x92DE, 0x6382, 0xB5E0, + 0x6383, 0x92DF, 0x6384, 0x92E0, 0x6385, 0x92E1, 0x6386, 0x92E2, + 0x6387, 0xB6DE, 0x6388, 0xCADA, 0x6389, 0xB5F4, 0x638A, 0xDEE5, + 0x638B, 0x92E3, 0x638C, 0xD5C6, 0x638D, 0x92E4, 0x638E, 0xDEE1, + 0x638F, 0xCCCD, 0x6390, 0xC6FE, 0x6391, 0x92E5, 0x6392, 0xC5C5, + 0x6393, 0x92E6, 0x6394, 0x92E7, 0x6395, 0x92E8, 0x6396, 0xD2B4, + 0x6397, 0x92E9, 0x6398, 0xBEF2, 0x6399, 0x92EA, 0x639A, 0x92EB, + 0x639B, 0x92EC, 0x639C, 0x92ED, 0x639D, 0x92EE, 0x639E, 0x92EF, + 0x639F, 0x92F0, 0x63A0, 0xC2D3, 0x63A1, 0x92F1, 0x63A2, 0xCCBD, + 0x63A3, 0xB3B8, 0x63A4, 0x92F2, 0x63A5, 0xBDD3, 0x63A6, 0x92F3, + 0x63A7, 0xBFD8, 0x63A8, 0xCDC6, 0x63A9, 0xD1DA, 0x63AA, 0xB4EB, + 0x63AB, 0x92F4, 0x63AC, 0xDEE4, 0x63AD, 0xDEDD, 0x63AE, 0xDEE7, + 0x63AF, 0x92F5, 0x63B0, 0xEAFE, 0x63B1, 0x92F6, 0x63B2, 0x92F7, + 0x63B3, 0xC2B0, 0x63B4, 0xDEE2, 0x63B5, 0x92F8, 0x63B6, 0x92F9, + 0x63B7, 0xD6C0, 0x63B8, 0xB5A7, 0x63B9, 0x92FA, 0x63BA, 0xB2F4, + 0x63BB, 0x92FB, 0x63BC, 0xDEE8, 0x63BD, 0x92FC, 0x63BE, 0xDEF2, + 0x63BF, 0x92FD, 0x63C0, 0x92FE, 0x63C1, 0x9340, 0x63C2, 0x9341, + 0x63C3, 0x9342, 0x63C4, 0xDEED, 0x63C5, 0x9343, 0x63C6, 0xDEF1, + 0x63C7, 0x9344, 0x63C8, 0x9345, 0x63C9, 0xC8E0, 0x63CA, 0x9346, + 0x63CB, 0x9347, 0x63CC, 0x9348, 0x63CD, 0xD7E1, 0x63CE, 0xDEEF, + 0x63CF, 0xC3E8, 0x63D0, 0xCCE1, 0x63D1, 0x9349, 0x63D2, 0xB2E5, + 0x63D3, 0x934A, 0x63D4, 0x934B, 0x63D5, 0x934C, 0x63D6, 0xD2BE, + 0x63D7, 0x934D, 0x63D8, 0x934E, 0x63D9, 0x934F, 0x63DA, 0x9350, + 0x63DB, 0x9351, 0x63DC, 0x9352, 0x63DD, 0x9353, 0x63DE, 0xDEEE, + 0x63DF, 0x9354, 0x63E0, 0xDEEB, 0x63E1, 0xCED5, 0x63E2, 0x9355, + 0x63E3, 0xB4A7, 0x63E4, 0x9356, 0x63E5, 0x9357, 0x63E6, 0x9358, + 0x63E7, 0x9359, 0x63E8, 0x935A, 0x63E9, 0xBFAB, 0x63EA, 0xBEBE, + 0x63EB, 0x935B, 0x63EC, 0x935C, 0x63ED, 0xBDD2, 0x63EE, 0x935D, + 0x63EF, 0x935E, 0x63F0, 0x935F, 0x63F1, 0x9360, 0x63F2, 0xDEE9, + 0x63F3, 0x9361, 0x63F4, 0xD4AE, 0x63F5, 0x9362, 0x63F6, 0xDEDE, + 0x63F7, 0x9363, 0x63F8, 0xDEEA, 0x63F9, 0x9364, 0x63FA, 0x9365, + 0x63FB, 0x9366, 0x63FC, 0x9367, 0x63FD, 0xC0BF, 0x63FE, 0x9368, + 0x63FF, 0xDEEC, 0x6400, 0xB2F3, 0x6401, 0xB8E9, 0x6402, 0xC2A7, + 0x6403, 0x9369, 0x6404, 0x936A, 0x6405, 0xBDC1, 0x6406, 0x936B, + 0x6407, 0x936C, 0x6408, 0x936D, 0x6409, 0x936E, 0x640A, 0x936F, + 0x640B, 0xDEF5, 0x640C, 0xDEF8, 0x640D, 0x9370, 0x640E, 0x9371, + 0x640F, 0xB2AB, 0x6410, 0xB4A4, 0x6411, 0x9372, 0x6412, 0x9373, + 0x6413, 0xB4EA, 0x6414, 0xC9A6, 0x6415, 0x9374, 0x6416, 0x9375, + 0x6417, 0x9376, 0x6418, 0x9377, 0x6419, 0x9378, 0x641A, 0x9379, + 0x641B, 0xDEF6, 0x641C, 0xCBD1, 0x641D, 0x937A, 0x641E, 0xB8E3, + 0x641F, 0x937B, 0x6420, 0xDEF7, 0x6421, 0xDEFA, 0x6422, 0x937C, + 0x6423, 0x937D, 0x6424, 0x937E, 0x6425, 0x9380, 0x6426, 0xDEF9, + 0x6427, 0x9381, 0x6428, 0x9382, 0x6429, 0x9383, 0x642A, 0xCCC2, + 0x642B, 0x9384, 0x642C, 0xB0E1, 0x642D, 0xB4EE, 0x642E, 0x9385, + 0x642F, 0x9386, 0x6430, 0x9387, 0x6431, 0x9388, 0x6432, 0x9389, + 0x6433, 0x938A, 0x6434, 0xE5BA, 0x6435, 0x938B, 0x6436, 0x938C, + 0x6437, 0x938D, 0x6438, 0x938E, 0x6439, 0x938F, 0x643A, 0xD0AF, + 0x643B, 0x9390, 0x643C, 0x9391, 0x643D, 0xB2EB, 0x643E, 0x9392, + 0x643F, 0xEBA1, 0x6440, 0x9393, 0x6441, 0xDEF4, 0x6442, 0x9394, + 0x6443, 0x9395, 0x6444, 0xC9E3, 0x6445, 0xDEF3, 0x6446, 0xB0DA, + 0x6447, 0xD2A1, 0x6448, 0xB1F7, 0x6449, 0x9396, 0x644A, 0xCCAF, + 0x644B, 0x9397, 0x644C, 0x9398, 0x644D, 0x9399, 0x644E, 0x939A, + 0x644F, 0x939B, 0x6450, 0x939C, 0x6451, 0x939D, 0x6452, 0xDEF0, + 0x6453, 0x939E, 0x6454, 0xCBA4, 0x6455, 0x939F, 0x6456, 0x93A0, + 0x6457, 0x93A1, 0x6458, 0xD5AA, 0x6459, 0x93A2, 0x645A, 0x93A3, + 0x645B, 0x93A4, 0x645C, 0x93A5, 0x645D, 0x93A6, 0x645E, 0xDEFB, + 0x645F, 0x93A7, 0x6460, 0x93A8, 0x6461, 0x93A9, 0x6462, 0x93AA, + 0x6463, 0x93AB, 0x6464, 0x93AC, 0x6465, 0x93AD, 0x6466, 0x93AE, + 0x6467, 0xB4DD, 0x6468, 0x93AF, 0x6469, 0xC4A6, 0x646A, 0x93B0, + 0x646B, 0x93B1, 0x646C, 0x93B2, 0x646D, 0xDEFD, 0x646E, 0x93B3, + 0x646F, 0x93B4, 0x6470, 0x93B5, 0x6471, 0x93B6, 0x6472, 0x93B7, + 0x6473, 0x93B8, 0x6474, 0x93B9, 0x6475, 0x93BA, 0x6476, 0x93BB, + 0x6477, 0x93BC, 0x6478, 0xC3FE, 0x6479, 0xC4A1, 0x647A, 0xDFA1, + 0x647B, 0x93BD, 0x647C, 0x93BE, 0x647D, 0x93BF, 0x647E, 0x93C0, + 0x647F, 0x93C1, 0x6480, 0x93C2, 0x6481, 0x93C3, 0x6482, 0xC1CC, + 0x6483, 0x93C4, 0x6484, 0xDEFC, 0x6485, 0xBEEF, 0x6486, 0x93C5, + 0x6487, 0xC6B2, 0x6488, 0x93C6, 0x6489, 0x93C7, 0x648A, 0x93C8, + 0x648B, 0x93C9, 0x648C, 0x93CA, 0x648D, 0x93CB, 0x648E, 0x93CC, + 0x648F, 0x93CD, 0x6490, 0x93CE, 0x6491, 0xB3C5, 0x6492, 0xC8F6, + 0x6493, 0x93CF, 0x6494, 0x93D0, 0x6495, 0xCBBA, 0x6496, 0xDEFE, + 0x6497, 0x93D1, 0x6498, 0x93D2, 0x6499, 0xDFA4, 0x649A, 0x93D3, + 0x649B, 0x93D4, 0x649C, 0x93D5, 0x649D, 0x93D6, 0x649E, 0xD7B2, + 0x649F, 0x93D7, 0x64A0, 0x93D8, 0x64A1, 0x93D9, 0x64A2, 0x93DA, + 0x64A3, 0x93DB, 0x64A4, 0xB3B7, 0x64A5, 0x93DC, 0x64A6, 0x93DD, + 0x64A7, 0x93DE, 0x64A8, 0x93DF, 0x64A9, 0xC1C3, 0x64AA, 0x93E0, + 0x64AB, 0x93E1, 0x64AC, 0xC7CB, 0x64AD, 0xB2A5, 0x64AE, 0xB4E9, + 0x64AF, 0x93E2, 0x64B0, 0xD7AB, 0x64B1, 0x93E3, 0x64B2, 0x93E4, + 0x64B3, 0x93E5, 0x64B4, 0x93E6, 0x64B5, 0xC4EC, 0x64B6, 0x93E7, + 0x64B7, 0xDFA2, 0x64B8, 0xDFA3, 0x64B9, 0x93E8, 0x64BA, 0xDFA5, + 0x64BB, 0x93E9, 0x64BC, 0xBAB3, 0x64BD, 0x93EA, 0x64BE, 0x93EB, + 0x64BF, 0x93EC, 0x64C0, 0xDFA6, 0x64C1, 0x93ED, 0x64C2, 0xC0DE, + 0x64C3, 0x93EE, 0x64C4, 0x93EF, 0x64C5, 0xC9C3, 0x64C6, 0x93F0, + 0x64C7, 0x93F1, 0x64C8, 0x93F2, 0x64C9, 0x93F3, 0x64CA, 0x93F4, + 0x64CB, 0x93F5, 0x64CC, 0x93F6, 0x64CD, 0xB2D9, 0x64CE, 0xC7E6, + 0x64CF, 0x93F7, 0x64D0, 0xDFA7, 0x64D1, 0x93F8, 0x64D2, 0xC7DC, + 0x64D3, 0x93F9, 0x64D4, 0x93FA, 0x64D5, 0x93FB, 0x64D6, 0x93FC, + 0x64D7, 0xDFA8, 0x64D8, 0xEBA2, 0x64D9, 0x93FD, 0x64DA, 0x93FE, + 0x64DB, 0x9440, 0x64DC, 0x9441, 0x64DD, 0x9442, 0x64DE, 0xCBD3, + 0x64DF, 0x9443, 0x64E0, 0x9444, 0x64E1, 0x9445, 0x64E2, 0xDFAA, + 0x64E3, 0x9446, 0x64E4, 0xDFA9, 0x64E5, 0x9447, 0x64E6, 0xB2C1, + 0x64E7, 0x9448, 0x64E8, 0x9449, 0x64E9, 0x944A, 0x64EA, 0x944B, + 0x64EB, 0x944C, 0x64EC, 0x944D, 0x64ED, 0x944E, 0x64EE, 0x944F, + 0x64EF, 0x9450, 0x64F0, 0x9451, 0x64F1, 0x9452, 0x64F2, 0x9453, + 0x64F3, 0x9454, 0x64F4, 0x9455, 0x64F5, 0x9456, 0x64F6, 0x9457, + 0x64F7, 0x9458, 0x64F8, 0x9459, 0x64F9, 0x945A, 0x64FA, 0x945B, + 0x64FB, 0x945C, 0x64FC, 0x945D, 0x64FD, 0x945E, 0x64FE, 0x945F, + 0x64FF, 0x9460, 0x6500, 0xC5CA, 0x6501, 0x9461, 0x6502, 0x9462, + 0x6503, 0x9463, 0x6504, 0x9464, 0x6505, 0x9465, 0x6506, 0x9466, + 0x6507, 0x9467, 0x6508, 0x9468, 0x6509, 0xDFAB, 0x650A, 0x9469, + 0x650B, 0x946A, 0x650C, 0x946B, 0x650D, 0x946C, 0x650E, 0x946D, + 0x650F, 0x946E, 0x6510, 0x946F, 0x6511, 0x9470, 0x6512, 0xD4DC, + 0x6513, 0x9471, 0x6514, 0x9472, 0x6515, 0x9473, 0x6516, 0x9474, + 0x6517, 0x9475, 0x6518, 0xC8C1, 0x6519, 0x9476, 0x651A, 0x9477, + 0x651B, 0x9478, 0x651C, 0x9479, 0x651D, 0x947A, 0x651E, 0x947B, + 0x651F, 0x947C, 0x6520, 0x947D, 0x6521, 0x947E, 0x6522, 0x9480, + 0x6523, 0x9481, 0x6524, 0x9482, 0x6525, 0xDFAC, 0x6526, 0x9483, + 0x6527, 0x9484, 0x6528, 0x9485, 0x6529, 0x9486, 0x652A, 0x9487, + 0x652B, 0xBEF0, 0x652C, 0x9488, 0x652D, 0x9489, 0x652E, 0xDFAD, + 0x652F, 0xD6A7, 0x6530, 0x948A, 0x6531, 0x948B, 0x6532, 0x948C, + 0x6533, 0x948D, 0x6534, 0xEAB7, 0x6535, 0xEBB6, 0x6536, 0xCAD5, + 0x6537, 0x948E, 0x6538, 0xD8FC, 0x6539, 0xB8C4, 0x653A, 0x948F, + 0x653B, 0xB9A5, 0x653C, 0x9490, 0x653D, 0x9491, 0x653E, 0xB7C5, + 0x653F, 0xD5FE, 0x6540, 0x9492, 0x6541, 0x9493, 0x6542, 0x9494, + 0x6543, 0x9495, 0x6544, 0x9496, 0x6545, 0xB9CA, 0x6546, 0x9497, + 0x6547, 0x9498, 0x6548, 0xD0A7, 0x6549, 0xF4CD, 0x654A, 0x9499, + 0x654B, 0x949A, 0x654C, 0xB5D0, 0x654D, 0x949B, 0x654E, 0x949C, + 0x654F, 0xC3F4, 0x6550, 0x949D, 0x6551, 0xBEC8, 0x6552, 0x949E, + 0x6553, 0x949F, 0x6554, 0x94A0, 0x6555, 0xEBB7, 0x6556, 0xB0BD, + 0x6557, 0x94A1, 0x6558, 0x94A2, 0x6559, 0xBDCC, 0x655A, 0x94A3, + 0x655B, 0xC1B2, 0x655C, 0x94A4, 0x655D, 0xB1D6, 0x655E, 0xB3A8, + 0x655F, 0x94A5, 0x6560, 0x94A6, 0x6561, 0x94A7, 0x6562, 0xB8D2, + 0x6563, 0xC9A2, 0x6564, 0x94A8, 0x6565, 0x94A9, 0x6566, 0xB6D8, + 0x6567, 0x94AA, 0x6568, 0x94AB, 0x6569, 0x94AC, 0x656A, 0x94AD, + 0x656B, 0xEBB8, 0x656C, 0xBEB4, 0x656D, 0x94AE, 0x656E, 0x94AF, + 0x656F, 0x94B0, 0x6570, 0xCAFD, 0x6571, 0x94B1, 0x6572, 0xC7C3, + 0x6573, 0x94B2, 0x6574, 0xD5FB, 0x6575, 0x94B3, 0x6576, 0x94B4, + 0x6577, 0xB7F3, 0x6578, 0x94B5, 0x6579, 0x94B6, 0x657A, 0x94B7, + 0x657B, 0x94B8, 0x657C, 0x94B9, 0x657D, 0x94BA, 0x657E, 0x94BB, + 0x657F, 0x94BC, 0x6580, 0x94BD, 0x6581, 0x94BE, 0x6582, 0x94BF, + 0x6583, 0x94C0, 0x6584, 0x94C1, 0x6585, 0x94C2, 0x6586, 0x94C3, + 0x6587, 0xCEC4, 0x6588, 0x94C4, 0x6589, 0x94C5, 0x658A, 0x94C6, + 0x658B, 0xD5AB, 0x658C, 0xB1F3, 0x658D, 0x94C7, 0x658E, 0x94C8, + 0x658F, 0x94C9, 0x6590, 0xECB3, 0x6591, 0xB0DF, 0x6592, 0x94CA, + 0x6593, 0xECB5, 0x6594, 0x94CB, 0x6595, 0x94CC, 0x6596, 0x94CD, + 0x6597, 0xB6B7, 0x6598, 0x94CE, 0x6599, 0xC1CF, 0x659A, 0x94CF, + 0x659B, 0xF5FA, 0x659C, 0xD0B1, 0x659D, 0x94D0, 0x659E, 0x94D1, + 0x659F, 0xD5E5, 0x65A0, 0x94D2, 0x65A1, 0xCED3, 0x65A2, 0x94D3, + 0x65A3, 0x94D4, 0x65A4, 0xBDEF, 0x65A5, 0xB3E2, 0x65A6, 0x94D5, + 0x65A7, 0xB8AB, 0x65A8, 0x94D6, 0x65A9, 0xD5B6, 0x65AA, 0x94D7, + 0x65AB, 0xEDBD, 0x65AC, 0x94D8, 0x65AD, 0xB6CF, 0x65AE, 0x94D9, + 0x65AF, 0xCBB9, 0x65B0, 0xD0C2, 0x65B1, 0x94DA, 0x65B2, 0x94DB, + 0x65B3, 0x94DC, 0x65B4, 0x94DD, 0x65B5, 0x94DE, 0x65B6, 0x94DF, + 0x65B7, 0x94E0, 0x65B8, 0x94E1, 0x65B9, 0xB7BD, 0x65BA, 0x94E2, + 0x65BB, 0x94E3, 0x65BC, 0xECB6, 0x65BD, 0xCAA9, 0x65BE, 0x94E4, + 0x65BF, 0x94E5, 0x65C0, 0x94E6, 0x65C1, 0xC5D4, 0x65C2, 0x94E7, + 0x65C3, 0xECB9, 0x65C4, 0xECB8, 0x65C5, 0xC2C3, 0x65C6, 0xECB7, + 0x65C7, 0x94E8, 0x65C8, 0x94E9, 0x65C9, 0x94EA, 0x65CA, 0x94EB, + 0x65CB, 0xD0FD, 0x65CC, 0xECBA, 0x65CD, 0x94EC, 0x65CE, 0xECBB, + 0x65CF, 0xD7E5, 0x65D0, 0x94ED, 0x65D1, 0x94EE, 0x65D2, 0xECBC, + 0x65D3, 0x94EF, 0x65D4, 0x94F0, 0x65D5, 0x94F1, 0x65D6, 0xECBD, + 0x65D7, 0xC6EC, 0x65D8, 0x94F2, 0x65D9, 0x94F3, 0x65DA, 0x94F4, + 0x65DB, 0x94F5, 0x65DC, 0x94F6, 0x65DD, 0x94F7, 0x65DE, 0x94F8, + 0x65DF, 0x94F9, 0x65E0, 0xCEDE, 0x65E1, 0x94FA, 0x65E2, 0xBCC8, + 0x65E3, 0x94FB, 0x65E4, 0x94FC, 0x65E5, 0xC8D5, 0x65E6, 0xB5A9, + 0x65E7, 0xBEC9, 0x65E8, 0xD6BC, 0x65E9, 0xD4E7, 0x65EA, 0x94FD, + 0x65EB, 0x94FE, 0x65EC, 0xD1AE, 0x65ED, 0xD0F1, 0x65EE, 0xEAB8, + 0x65EF, 0xEAB9, 0x65F0, 0xEABA, 0x65F1, 0xBAB5, 0x65F2, 0x9540, + 0x65F3, 0x9541, 0x65F4, 0x9542, 0x65F5, 0x9543, 0x65F6, 0xCAB1, + 0x65F7, 0xBFF5, 0x65F8, 0x9544, 0x65F9, 0x9545, 0x65FA, 0xCDFA, + 0x65FB, 0x9546, 0x65FC, 0x9547, 0x65FD, 0x9548, 0x65FE, 0x9549, + 0x65FF, 0x954A, 0x6600, 0xEAC0, 0x6601, 0x954B, 0x6602, 0xB0BA, + 0x6603, 0xEABE, 0x6604, 0x954C, 0x6605, 0x954D, 0x6606, 0xC0A5, + 0x6607, 0x954E, 0x6608, 0x954F, 0x6609, 0x9550, 0x660A, 0xEABB, + 0x660B, 0x9551, 0x660C, 0xB2FD, 0x660D, 0x9552, 0x660E, 0xC3F7, + 0x660F, 0xBBE8, 0x6610, 0x9553, 0x6611, 0x9554, 0x6612, 0x9555, + 0x6613, 0xD2D7, 0x6614, 0xCEF4, 0x6615, 0xEABF, 0x6616, 0x9556, + 0x6617, 0x9557, 0x6618, 0x9558, 0x6619, 0xEABC, 0x661A, 0x9559, + 0x661B, 0x955A, 0x661C, 0x955B, 0x661D, 0xEAC3, 0x661E, 0x955C, + 0x661F, 0xD0C7, 0x6620, 0xD3B3, 0x6621, 0x955D, 0x6622, 0x955E, + 0x6623, 0x955F, 0x6624, 0x9560, 0x6625, 0xB4BA, 0x6626, 0x9561, + 0x6627, 0xC3C1, 0x6628, 0xD7F2, 0x6629, 0x9562, 0x662A, 0x9563, + 0x662B, 0x9564, 0x662C, 0x9565, 0x662D, 0xD5D1, 0x662E, 0x9566, + 0x662F, 0xCAC7, 0x6630, 0x9567, 0x6631, 0xEAC5, 0x6632, 0x9568, + 0x6633, 0x9569, 0x6634, 0xEAC4, 0x6635, 0xEAC7, 0x6636, 0xEAC6, + 0x6637, 0x956A, 0x6638, 0x956B, 0x6639, 0x956C, 0x663A, 0x956D, + 0x663B, 0x956E, 0x663C, 0xD6E7, 0x663D, 0x956F, 0x663E, 0xCFD4, + 0x663F, 0x9570, 0x6640, 0x9571, 0x6641, 0xEACB, 0x6642, 0x9572, + 0x6643, 0xBBCE, 0x6644, 0x9573, 0x6645, 0x9574, 0x6646, 0x9575, + 0x6647, 0x9576, 0x6648, 0x9577, 0x6649, 0x9578, 0x664A, 0x9579, + 0x664B, 0xBDFA, 0x664C, 0xC9CE, 0x664D, 0x957A, 0x664E, 0x957B, + 0x664F, 0xEACC, 0x6650, 0x957C, 0x6651, 0x957D, 0x6652, 0xC9B9, + 0x6653, 0xCFFE, 0x6654, 0xEACA, 0x6655, 0xD4CE, 0x6656, 0xEACD, + 0x6657, 0xEACF, 0x6658, 0x957E, 0x6659, 0x9580, 0x665A, 0xCDED, + 0x665B, 0x9581, 0x665C, 0x9582, 0x665D, 0x9583, 0x665E, 0x9584, + 0x665F, 0xEAC9, 0x6660, 0x9585, 0x6661, 0xEACE, 0x6662, 0x9586, + 0x6663, 0x9587, 0x6664, 0xCEEE, 0x6665, 0x9588, 0x6666, 0xBBDE, + 0x6667, 0x9589, 0x6668, 0xB3BF, 0x6669, 0x958A, 0x666A, 0x958B, + 0x666B, 0x958C, 0x666C, 0x958D, 0x666D, 0x958E, 0x666E, 0xC6D5, + 0x666F, 0xBEB0, 0x6670, 0xCEFA, 0x6671, 0x958F, 0x6672, 0x9590, + 0x6673, 0x9591, 0x6674, 0xC7E7, 0x6675, 0x9592, 0x6676, 0xBEA7, + 0x6677, 0xEAD0, 0x6678, 0x9593, 0x6679, 0x9594, 0x667A, 0xD6C7, + 0x667B, 0x9595, 0x667C, 0x9596, 0x667D, 0x9597, 0x667E, 0xC1C0, + 0x667F, 0x9598, 0x6680, 0x9599, 0x6681, 0x959A, 0x6682, 0xD4DD, + 0x6683, 0x959B, 0x6684, 0xEAD1, 0x6685, 0x959C, 0x6686, 0x959D, + 0x6687, 0xCFBE, 0x6688, 0x959E, 0x6689, 0x959F, 0x668A, 0x95A0, + 0x668B, 0x95A1, 0x668C, 0xEAD2, 0x668D, 0x95A2, 0x668E, 0x95A3, + 0x668F, 0x95A4, 0x6690, 0x95A5, 0x6691, 0xCAEE, 0x6692, 0x95A6, + 0x6693, 0x95A7, 0x6694, 0x95A8, 0x6695, 0x95A9, 0x6696, 0xC5AF, + 0x6697, 0xB0B5, 0x6698, 0x95AA, 0x6699, 0x95AB, 0x669A, 0x95AC, + 0x669B, 0x95AD, 0x669C, 0x95AE, 0x669D, 0xEAD4, 0x669E, 0x95AF, + 0x669F, 0x95B0, 0x66A0, 0x95B1, 0x66A1, 0x95B2, 0x66A2, 0x95B3, + 0x66A3, 0x95B4, 0x66A4, 0x95B5, 0x66A5, 0x95B6, 0x66A6, 0x95B7, + 0x66A7, 0xEAD3, 0x66A8, 0xF4DF, 0x66A9, 0x95B8, 0x66AA, 0x95B9, + 0x66AB, 0x95BA, 0x66AC, 0x95BB, 0x66AD, 0x95BC, 0x66AE, 0xC4BA, + 0x66AF, 0x95BD, 0x66B0, 0x95BE, 0x66B1, 0x95BF, 0x66B2, 0x95C0, + 0x66B3, 0x95C1, 0x66B4, 0xB1A9, 0x66B5, 0x95C2, 0x66B6, 0x95C3, + 0x66B7, 0x95C4, 0x66B8, 0x95C5, 0x66B9, 0xE5DF, 0x66BA, 0x95C6, + 0x66BB, 0x95C7, 0x66BC, 0x95C8, 0x66BD, 0x95C9, 0x66BE, 0xEAD5, + 0x66BF, 0x95CA, 0x66C0, 0x95CB, 0x66C1, 0x95CC, 0x66C2, 0x95CD, + 0x66C3, 0x95CE, 0x66C4, 0x95CF, 0x66C5, 0x95D0, 0x66C6, 0x95D1, + 0x66C7, 0x95D2, 0x66C8, 0x95D3, 0x66C9, 0x95D4, 0x66CA, 0x95D5, + 0x66CB, 0x95D6, 0x66CC, 0x95D7, 0x66CD, 0x95D8, 0x66CE, 0x95D9, + 0x66CF, 0x95DA, 0x66D0, 0x95DB, 0x66D1, 0x95DC, 0x66D2, 0x95DD, + 0x66D3, 0x95DE, 0x66D4, 0x95DF, 0x66D5, 0x95E0, 0x66D6, 0x95E1, + 0x66D7, 0x95E2, 0x66D8, 0x95E3, 0x66D9, 0xCAEF, 0x66DA, 0x95E4, + 0x66DB, 0xEAD6, 0x66DC, 0xEAD7, 0x66DD, 0xC6D8, 0x66DE, 0x95E5, + 0x66DF, 0x95E6, 0x66E0, 0x95E7, 0x66E1, 0x95E8, 0x66E2, 0x95E9, + 0x66E3, 0x95EA, 0x66E4, 0x95EB, 0x66E5, 0x95EC, 0x66E6, 0xEAD8, + 0x66E7, 0x95ED, 0x66E8, 0x95EE, 0x66E9, 0xEAD9, 0x66EA, 0x95EF, + 0x66EB, 0x95F0, 0x66EC, 0x95F1, 0x66ED, 0x95F2, 0x66EE, 0x95F3, + 0x66EF, 0x95F4, 0x66F0, 0xD4BB, 0x66F1, 0x95F5, 0x66F2, 0xC7FA, + 0x66F3, 0xD2B7, 0x66F4, 0xB8FC, 0x66F5, 0x95F6, 0x66F6, 0x95F7, + 0x66F7, 0xEAC2, 0x66F8, 0x95F8, 0x66F9, 0xB2DC, 0x66FA, 0x95F9, + 0x66FB, 0x95FA, 0x66FC, 0xC2FC, 0x66FD, 0x95FB, 0x66FE, 0xD4F8, + 0x66FF, 0xCCE6, 0x6700, 0xD7EE, 0x6701, 0x95FC, 0x6702, 0x95FD, + 0x6703, 0x95FE, 0x6704, 0x9640, 0x6705, 0x9641, 0x6706, 0x9642, + 0x6707, 0x9643, 0x6708, 0xD4C2, 0x6709, 0xD3D0, 0x670A, 0xEBC3, + 0x670B, 0xC5F3, 0x670C, 0x9644, 0x670D, 0xB7FE, 0x670E, 0x9645, + 0x670F, 0x9646, 0x6710, 0xEBD4, 0x6711, 0x9647, 0x6712, 0x9648, + 0x6713, 0x9649, 0x6714, 0xCBB7, 0x6715, 0xEBDE, 0x6716, 0x964A, + 0x6717, 0xC0CA, 0x6718, 0x964B, 0x6719, 0x964C, 0x671A, 0x964D, + 0x671B, 0xCDFB, 0x671C, 0x964E, 0x671D, 0xB3AF, 0x671E, 0x964F, + 0x671F, 0xC6DA, 0x6720, 0x9650, 0x6721, 0x9651, 0x6722, 0x9652, + 0x6723, 0x9653, 0x6724, 0x9654, 0x6725, 0x9655, 0x6726, 0xEBFC, + 0x6727, 0x9656, 0x6728, 0xC4BE, 0x6729, 0x9657, 0x672A, 0xCEB4, + 0x672B, 0xC4A9, 0x672C, 0xB1BE, 0x672D, 0xD4FD, 0x672E, 0x9658, + 0x672F, 0xCAF5, 0x6730, 0x9659, 0x6731, 0xD6EC, 0x6732, 0x965A, + 0x6733, 0x965B, 0x6734, 0xC6D3, 0x6735, 0xB6E4, 0x6736, 0x965C, + 0x6737, 0x965D, 0x6738, 0x965E, 0x6739, 0x965F, 0x673A, 0xBBFA, + 0x673B, 0x9660, 0x673C, 0x9661, 0x673D, 0xD0E0, 0x673E, 0x9662, + 0x673F, 0x9663, 0x6740, 0xC9B1, 0x6741, 0x9664, 0x6742, 0xD4D3, + 0x6743, 0xC8A8, 0x6744, 0x9665, 0x6745, 0x9666, 0x6746, 0xB8CB, + 0x6747, 0x9667, 0x6748, 0xE8BE, 0x6749, 0xC9BC, 0x674A, 0x9668, + 0x674B, 0x9669, 0x674C, 0xE8BB, 0x674D, 0x966A, 0x674E, 0xC0EE, + 0x674F, 0xD0D3, 0x6750, 0xB2C4, 0x6751, 0xB4E5, 0x6752, 0x966B, + 0x6753, 0xE8BC, 0x6754, 0x966C, 0x6755, 0x966D, 0x6756, 0xD5C8, + 0x6757, 0x966E, 0x6758, 0x966F, 0x6759, 0x9670, 0x675A, 0x9671, + 0x675B, 0x9672, 0x675C, 0xB6C5, 0x675D, 0x9673, 0x675E, 0xE8BD, + 0x675F, 0xCAF8, 0x6760, 0xB8DC, 0x6761, 0xCCF5, 0x6762, 0x9674, + 0x6763, 0x9675, 0x6764, 0x9676, 0x6765, 0xC0B4, 0x6766, 0x9677, + 0x6767, 0x9678, 0x6768, 0xD1EE, 0x6769, 0xE8BF, 0x676A, 0xE8C2, + 0x676B, 0x9679, 0x676C, 0x967A, 0x676D, 0xBABC, 0x676E, 0x967B, + 0x676F, 0xB1AD, 0x6770, 0xBDDC, 0x6771, 0x967C, 0x6772, 0xEABD, + 0x6773, 0xE8C3, 0x6774, 0x967D, 0x6775, 0xE8C6, 0x6776, 0x967E, + 0x6777, 0xE8CB, 0x6778, 0x9680, 0x6779, 0x9681, 0x677A, 0x9682, + 0x677B, 0x9683, 0x677C, 0xE8CC, 0x677D, 0x9684, 0x677E, 0xCBC9, + 0x677F, 0xB0E5, 0x6780, 0x9685, 0x6781, 0xBCAB, 0x6782, 0x9686, + 0x6783, 0x9687, 0x6784, 0xB9B9, 0x6785, 0x9688, 0x6786, 0x9689, + 0x6787, 0xE8C1, 0x6788, 0x968A, 0x6789, 0xCDF7, 0x678A, 0x968B, + 0x678B, 0xE8CA, 0x678C, 0x968C, 0x678D, 0x968D, 0x678E, 0x968E, + 0x678F, 0x968F, 0x6790, 0xCEF6, 0x6791, 0x9690, 0x6792, 0x9691, + 0x6793, 0x9692, 0x6794, 0x9693, 0x6795, 0xD5ED, 0x6796, 0x9694, + 0x6797, 0xC1D6, 0x6798, 0xE8C4, 0x6799, 0x9695, 0x679A, 0xC3B6, + 0x679B, 0x9696, 0x679C, 0xB9FB, 0x679D, 0xD6A6, 0x679E, 0xE8C8, + 0x679F, 0x9697, 0x67A0, 0x9698, 0x67A1, 0x9699, 0x67A2, 0xCAE0, + 0x67A3, 0xD4E6, 0x67A4, 0x969A, 0x67A5, 0xE8C0, 0x67A6, 0x969B, + 0x67A7, 0xE8C5, 0x67A8, 0xE8C7, 0x67A9, 0x969C, 0x67AA, 0xC7B9, + 0x67AB, 0xB7E3, 0x67AC, 0x969D, 0x67AD, 0xE8C9, 0x67AE, 0x969E, + 0x67AF, 0xBFDD, 0x67B0, 0xE8D2, 0x67B1, 0x969F, 0x67B2, 0x96A0, + 0x67B3, 0xE8D7, 0x67B4, 0x96A1, 0x67B5, 0xE8D5, 0x67B6, 0xBCDC, + 0x67B7, 0xBCCF, 0x67B8, 0xE8DB, 0x67B9, 0x96A2, 0x67BA, 0x96A3, + 0x67BB, 0x96A4, 0x67BC, 0x96A5, 0x67BD, 0x96A6, 0x67BE, 0x96A7, + 0x67BF, 0x96A8, 0x67C0, 0x96A9, 0x67C1, 0xE8DE, 0x67C2, 0x96AA, + 0x67C3, 0xE8DA, 0x67C4, 0xB1FA, 0x67C5, 0x96AB, 0x67C6, 0x96AC, + 0x67C7, 0x96AD, 0x67C8, 0x96AE, 0x67C9, 0x96AF, 0x67CA, 0x96B0, + 0x67CB, 0x96B1, 0x67CC, 0x96B2, 0x67CD, 0x96B3, 0x67CE, 0x96B4, + 0x67CF, 0xB0D8, 0x67D0, 0xC4B3, 0x67D1, 0xB8CC, 0x67D2, 0xC6E2, + 0x67D3, 0xC8BE, 0x67D4, 0xC8E1, 0x67D5, 0x96B5, 0x67D6, 0x96B6, + 0x67D7, 0x96B7, 0x67D8, 0xE8CF, 0x67D9, 0xE8D4, 0x67DA, 0xE8D6, + 0x67DB, 0x96B8, 0x67DC, 0xB9F1, 0x67DD, 0xE8D8, 0x67DE, 0xD7F5, + 0x67DF, 0x96B9, 0x67E0, 0xC4FB, 0x67E1, 0x96BA, 0x67E2, 0xE8DC, + 0x67E3, 0x96BB, 0x67E4, 0x96BC, 0x67E5, 0xB2E9, 0x67E6, 0x96BD, + 0x67E7, 0x96BE, 0x67E8, 0x96BF, 0x67E9, 0xE8D1, 0x67EA, 0x96C0, + 0x67EB, 0x96C1, 0x67EC, 0xBCED, 0x67ED, 0x96C2, 0x67EE, 0x96C3, + 0x67EF, 0xBFC2, 0x67F0, 0xE8CD, 0x67F1, 0xD6F9, 0x67F2, 0x96C4, + 0x67F3, 0xC1F8, 0x67F4, 0xB2F1, 0x67F5, 0x96C5, 0x67F6, 0x96C6, + 0x67F7, 0x96C7, 0x67F8, 0x96C8, 0x67F9, 0x96C9, 0x67FA, 0x96CA, + 0x67FB, 0x96CB, 0x67FC, 0x96CC, 0x67FD, 0xE8DF, 0x67FE, 0x96CD, + 0x67FF, 0xCAC1, 0x6800, 0xE8D9, 0x6801, 0x96CE, 0x6802, 0x96CF, + 0x6803, 0x96D0, 0x6804, 0x96D1, 0x6805, 0xD5A4, 0x6806, 0x96D2, + 0x6807, 0xB1EA, 0x6808, 0xD5BB, 0x6809, 0xE8CE, 0x680A, 0xE8D0, + 0x680B, 0xB6B0, 0x680C, 0xE8D3, 0x680D, 0x96D3, 0x680E, 0xE8DD, + 0x680F, 0xC0B8, 0x6810, 0x96D4, 0x6811, 0xCAF7, 0x6812, 0x96D5, + 0x6813, 0xCBA8, 0x6814, 0x96D6, 0x6815, 0x96D7, 0x6816, 0xC6DC, + 0x6817, 0xC0F5, 0x6818, 0x96D8, 0x6819, 0x96D9, 0x681A, 0x96DA, + 0x681B, 0x96DB, 0x681C, 0x96DC, 0x681D, 0xE8E9, 0x681E, 0x96DD, + 0x681F, 0x96DE, 0x6820, 0x96DF, 0x6821, 0xD0A3, 0x6822, 0x96E0, + 0x6823, 0x96E1, 0x6824, 0x96E2, 0x6825, 0x96E3, 0x6826, 0x96E4, + 0x6827, 0x96E5, 0x6828, 0x96E6, 0x6829, 0xE8F2, 0x682A, 0xD6EA, + 0x682B, 0x96E7, 0x682C, 0x96E8, 0x682D, 0x96E9, 0x682E, 0x96EA, + 0x682F, 0x96EB, 0x6830, 0x96EC, 0x6831, 0x96ED, 0x6832, 0xE8E0, + 0x6833, 0xE8E1, 0x6834, 0x96EE, 0x6835, 0x96EF, 0x6836, 0x96F0, + 0x6837, 0xD1F9, 0x6838, 0xBACB, 0x6839, 0xB8F9, 0x683A, 0x96F1, + 0x683B, 0x96F2, 0x683C, 0xB8F1, 0x683D, 0xD4D4, 0x683E, 0xE8EF, + 0x683F, 0x96F3, 0x6840, 0xE8EE, 0x6841, 0xE8EC, 0x6842, 0xB9F0, + 0x6843, 0xCCD2, 0x6844, 0xE8E6, 0x6845, 0xCEA6, 0x6846, 0xBFF2, + 0x6847, 0x96F4, 0x6848, 0xB0B8, 0x6849, 0xE8F1, 0x684A, 0xE8F0, + 0x684B, 0x96F5, 0x684C, 0xD7C0, 0x684D, 0x96F6, 0x684E, 0xE8E4, + 0x684F, 0x96F7, 0x6850, 0xCDA9, 0x6851, 0xC9A3, 0x6852, 0x96F8, + 0x6853, 0xBBB8, 0x6854, 0xBDDB, 0x6855, 0xE8EA, 0x6856, 0x96F9, + 0x6857, 0x96FA, 0x6858, 0x96FB, 0x6859, 0x96FC, 0x685A, 0x96FD, + 0x685B, 0x96FE, 0x685C, 0x9740, 0x685D, 0x9741, 0x685E, 0x9742, + 0x685F, 0x9743, 0x6860, 0xE8E2, 0x6861, 0xE8E3, 0x6862, 0xE8E5, + 0x6863, 0xB5B5, 0x6864, 0xE8E7, 0x6865, 0xC7C5, 0x6866, 0xE8EB, + 0x6867, 0xE8ED, 0x6868, 0xBDB0, 0x6869, 0xD7AE, 0x686A, 0x9744, + 0x686B, 0xE8F8, 0x686C, 0x9745, 0x686D, 0x9746, 0x686E, 0x9747, + 0x686F, 0x9748, 0x6870, 0x9749, 0x6871, 0x974A, 0x6872, 0x974B, + 0x6873, 0x974C, 0x6874, 0xE8F5, 0x6875, 0x974D, 0x6876, 0xCDB0, + 0x6877, 0xE8F6, 0x6878, 0x974E, 0x6879, 0x974F, 0x687A, 0x9750, + 0x687B, 0x9751, 0x687C, 0x9752, 0x687D, 0x9753, 0x687E, 0x9754, + 0x687F, 0x9755, 0x6880, 0x9756, 0x6881, 0xC1BA, 0x6882, 0x9757, + 0x6883, 0xE8E8, 0x6884, 0x9758, 0x6885, 0xC3B7, 0x6886, 0xB0F0, + 0x6887, 0x9759, 0x6888, 0x975A, 0x6889, 0x975B, 0x688A, 0x975C, + 0x688B, 0x975D, 0x688C, 0x975E, 0x688D, 0x975F, 0x688E, 0x9760, + 0x688F, 0xE8F4, 0x6890, 0x9761, 0x6891, 0x9762, 0x6892, 0x9763, + 0x6893, 0xE8F7, 0x6894, 0x9764, 0x6895, 0x9765, 0x6896, 0x9766, + 0x6897, 0xB9A3, 0x6898, 0x9767, 0x6899, 0x9768, 0x689A, 0x9769, + 0x689B, 0x976A, 0x689C, 0x976B, 0x689D, 0x976C, 0x689E, 0x976D, + 0x689F, 0x976E, 0x68A0, 0x976F, 0x68A1, 0x9770, 0x68A2, 0xC9D2, + 0x68A3, 0x9771, 0x68A4, 0x9772, 0x68A5, 0x9773, 0x68A6, 0xC3CE, + 0x68A7, 0xCEE0, 0x68A8, 0xC0E6, 0x68A9, 0x9774, 0x68AA, 0x9775, + 0x68AB, 0x9776, 0x68AC, 0x9777, 0x68AD, 0xCBF3, 0x68AE, 0x9778, + 0x68AF, 0xCCDD, 0x68B0, 0xD0B5, 0x68B1, 0x9779, 0x68B2, 0x977A, + 0x68B3, 0xCAE1, 0x68B4, 0x977B, 0x68B5, 0xE8F3, 0x68B6, 0x977C, + 0x68B7, 0x977D, 0x68B8, 0x977E, 0x68B9, 0x9780, 0x68BA, 0x9781, + 0x68BB, 0x9782, 0x68BC, 0x9783, 0x68BD, 0x9784, 0x68BE, 0x9785, + 0x68BF, 0x9786, 0x68C0, 0xBCEC, 0x68C1, 0x9787, 0x68C2, 0xE8F9, + 0x68C3, 0x9788, 0x68C4, 0x9789, 0x68C5, 0x978A, 0x68C6, 0x978B, + 0x68C7, 0x978C, 0x68C8, 0x978D, 0x68C9, 0xC3DE, 0x68CA, 0x978E, + 0x68CB, 0xC6E5, 0x68CC, 0x978F, 0x68CD, 0xB9F7, 0x68CE, 0x9790, + 0x68CF, 0x9791, 0x68D0, 0x9792, 0x68D1, 0x9793, 0x68D2, 0xB0F4, + 0x68D3, 0x9794, 0x68D4, 0x9795, 0x68D5, 0xD7D8, 0x68D6, 0x9796, + 0x68D7, 0x9797, 0x68D8, 0xBCAC, 0x68D9, 0x9798, 0x68DA, 0xC5EF, + 0x68DB, 0x9799, 0x68DC, 0x979A, 0x68DD, 0x979B, 0x68DE, 0x979C, + 0x68DF, 0x979D, 0x68E0, 0xCCC4, 0x68E1, 0x979E, 0x68E2, 0x979F, + 0x68E3, 0xE9A6, 0x68E4, 0x97A0, 0x68E5, 0x97A1, 0x68E6, 0x97A2, + 0x68E7, 0x97A3, 0x68E8, 0x97A4, 0x68E9, 0x97A5, 0x68EA, 0x97A6, + 0x68EB, 0x97A7, 0x68EC, 0x97A8, 0x68ED, 0x97A9, 0x68EE, 0xC9AD, + 0x68EF, 0x97AA, 0x68F0, 0xE9A2, 0x68F1, 0xC0E2, 0x68F2, 0x97AB, + 0x68F3, 0x97AC, 0x68F4, 0x97AD, 0x68F5, 0xBFC3, 0x68F6, 0x97AE, + 0x68F7, 0x97AF, 0x68F8, 0x97B0, 0x68F9, 0xE8FE, 0x68FA, 0xB9D7, + 0x68FB, 0x97B1, 0x68FC, 0xE8FB, 0x68FD, 0x97B2, 0x68FE, 0x97B3, + 0x68FF, 0x97B4, 0x6900, 0x97B5, 0x6901, 0xE9A4, 0x6902, 0x97B6, + 0x6903, 0x97B7, 0x6904, 0x97B8, 0x6905, 0xD2CE, 0x6906, 0x97B9, + 0x6907, 0x97BA, 0x6908, 0x97BB, 0x6909, 0x97BC, 0x690A, 0x97BD, + 0x690B, 0xE9A3, 0x690C, 0x97BE, 0x690D, 0xD6B2, 0x690E, 0xD7B5, + 0x690F, 0x97BF, 0x6910, 0xE9A7, 0x6911, 0x97C0, 0x6912, 0xBDB7, + 0x6913, 0x97C1, 0x6914, 0x97C2, 0x6915, 0x97C3, 0x6916, 0x97C4, + 0x6917, 0x97C5, 0x6918, 0x97C6, 0x6919, 0x97C7, 0x691A, 0x97C8, + 0x691B, 0x97C9, 0x691C, 0x97CA, 0x691D, 0x97CB, 0x691E, 0x97CC, + 0x691F, 0xE8FC, 0x6920, 0xE8FD, 0x6921, 0x97CD, 0x6922, 0x97CE, + 0x6923, 0x97CF, 0x6924, 0xE9A1, 0x6925, 0x97D0, 0x6926, 0x97D1, + 0x6927, 0x97D2, 0x6928, 0x97D3, 0x6929, 0x97D4, 0x692A, 0x97D5, + 0x692B, 0x97D6, 0x692C, 0x97D7, 0x692D, 0xCDD6, 0x692E, 0x97D8, + 0x692F, 0x97D9, 0x6930, 0xD2AC, 0x6931, 0x97DA, 0x6932, 0x97DB, + 0x6933, 0x97DC, 0x6934, 0xE9B2, 0x6935, 0x97DD, 0x6936, 0x97DE, + 0x6937, 0x97DF, 0x6938, 0x97E0, 0x6939, 0xE9A9, 0x693A, 0x97E1, + 0x693B, 0x97E2, 0x693C, 0x97E3, 0x693D, 0xB4AA, 0x693E, 0x97E4, + 0x693F, 0xB4BB, 0x6940, 0x97E5, 0x6941, 0x97E6, 0x6942, 0xE9AB, + 0x6943, 0x97E7, 0x6944, 0x97E8, 0x6945, 0x97E9, 0x6946, 0x97EA, + 0x6947, 0x97EB, 0x6948, 0x97EC, 0x6949, 0x97ED, 0x694A, 0x97EE, + 0x694B, 0x97EF, 0x694C, 0x97F0, 0x694D, 0x97F1, 0x694E, 0x97F2, + 0x694F, 0x97F3, 0x6950, 0x97F4, 0x6951, 0x97F5, 0x6952, 0x97F6, + 0x6953, 0x97F7, 0x6954, 0xD0A8, 0x6955, 0x97F8, 0x6956, 0x97F9, + 0x6957, 0xE9A5, 0x6958, 0x97FA, 0x6959, 0x97FB, 0x695A, 0xB3FE, + 0x695B, 0x97FC, 0x695C, 0x97FD, 0x695D, 0xE9AC, 0x695E, 0xC0E3, + 0x695F, 0x97FE, 0x6960, 0xE9AA, 0x6961, 0x9840, 0x6962, 0x9841, + 0x6963, 0xE9B9, 0x6964, 0x9842, 0x6965, 0x9843, 0x6966, 0xE9B8, + 0x6967, 0x9844, 0x6968, 0x9845, 0x6969, 0x9846, 0x696A, 0x9847, + 0x696B, 0xE9AE, 0x696C, 0x9848, 0x696D, 0x9849, 0x696E, 0xE8FA, + 0x696F, 0x984A, 0x6970, 0x984B, 0x6971, 0xE9A8, 0x6972, 0x984C, + 0x6973, 0x984D, 0x6974, 0x984E, 0x6975, 0x984F, 0x6976, 0x9850, + 0x6977, 0xBFAC, 0x6978, 0xE9B1, 0x6979, 0xE9BA, 0x697A, 0x9851, + 0x697B, 0x9852, 0x697C, 0xC2A5, 0x697D, 0x9853, 0x697E, 0x9854, + 0x697F, 0x9855, 0x6980, 0xE9AF, 0x6981, 0x9856, 0x6982, 0xB8C5, + 0x6983, 0x9857, 0x6984, 0xE9AD, 0x6985, 0x9858, 0x6986, 0xD3DC, + 0x6987, 0xE9B4, 0x6988, 0xE9B5, 0x6989, 0xE9B7, 0x698A, 0x9859, + 0x698B, 0x985A, 0x698C, 0x985B, 0x698D, 0xE9C7, 0x698E, 0x985C, + 0x698F, 0x985D, 0x6990, 0x985E, 0x6991, 0x985F, 0x6992, 0x9860, + 0x6993, 0x9861, 0x6994, 0xC0C6, 0x6995, 0xE9C5, 0x6996, 0x9862, + 0x6997, 0x9863, 0x6998, 0xE9B0, 0x6999, 0x9864, 0x699A, 0x9865, + 0x699B, 0xE9BB, 0x699C, 0xB0F1, 0x699D, 0x9866, 0x699E, 0x9867, + 0x699F, 0x9868, 0x69A0, 0x9869, 0x69A1, 0x986A, 0x69A2, 0x986B, + 0x69A3, 0x986C, 0x69A4, 0x986D, 0x69A5, 0x986E, 0x69A6, 0x986F, + 0x69A7, 0xE9BC, 0x69A8, 0xD5A5, 0x69A9, 0x9870, 0x69AA, 0x9871, + 0x69AB, 0xE9BE, 0x69AC, 0x9872, 0x69AD, 0xE9BF, 0x69AE, 0x9873, + 0x69AF, 0x9874, 0x69B0, 0x9875, 0x69B1, 0xE9C1, 0x69B2, 0x9876, + 0x69B3, 0x9877, 0x69B4, 0xC1F1, 0x69B5, 0x9878, 0x69B6, 0x9879, + 0x69B7, 0xC8B6, 0x69B8, 0x987A, 0x69B9, 0x987B, 0x69BA, 0x987C, + 0x69BB, 0xE9BD, 0x69BC, 0x987D, 0x69BD, 0x987E, 0x69BE, 0x9880, + 0x69BF, 0x9881, 0x69C0, 0x9882, 0x69C1, 0xE9C2, 0x69C2, 0x9883, + 0x69C3, 0x9884, 0x69C4, 0x9885, 0x69C5, 0x9886, 0x69C6, 0x9887, + 0x69C7, 0x9888, 0x69C8, 0x9889, 0x69C9, 0x988A, 0x69CA, 0xE9C3, + 0x69CB, 0x988B, 0x69CC, 0xE9B3, 0x69CD, 0x988C, 0x69CE, 0xE9B6, + 0x69CF, 0x988D, 0x69D0, 0xBBB1, 0x69D1, 0x988E, 0x69D2, 0x988F, + 0x69D3, 0x9890, 0x69D4, 0xE9C0, 0x69D5, 0x9891, 0x69D6, 0x9892, + 0x69D7, 0x9893, 0x69D8, 0x9894, 0x69D9, 0x9895, 0x69DA, 0x9896, + 0x69DB, 0xBCF7, 0x69DC, 0x9897, 0x69DD, 0x9898, 0x69DE, 0x9899, + 0x69DF, 0xE9C4, 0x69E0, 0xE9C6, 0x69E1, 0x989A, 0x69E2, 0x989B, + 0x69E3, 0x989C, 0x69E4, 0x989D, 0x69E5, 0x989E, 0x69E6, 0x989F, + 0x69E7, 0x98A0, 0x69E8, 0x98A1, 0x69E9, 0x98A2, 0x69EA, 0x98A3, + 0x69EB, 0x98A4, 0x69EC, 0x98A5, 0x69ED, 0xE9CA, 0x69EE, 0x98A6, + 0x69EF, 0x98A7, 0x69F0, 0x98A8, 0x69F1, 0x98A9, 0x69F2, 0xE9CE, + 0x69F3, 0x98AA, 0x69F4, 0x98AB, 0x69F5, 0x98AC, 0x69F6, 0x98AD, + 0x69F7, 0x98AE, 0x69F8, 0x98AF, 0x69F9, 0x98B0, 0x69FA, 0x98B1, + 0x69FB, 0x98B2, 0x69FC, 0x98B3, 0x69FD, 0xB2DB, 0x69FE, 0x98B4, + 0x69FF, 0xE9C8, 0x6A00, 0x98B5, 0x6A01, 0x98B6, 0x6A02, 0x98B7, + 0x6A03, 0x98B8, 0x6A04, 0x98B9, 0x6A05, 0x98BA, 0x6A06, 0x98BB, + 0x6A07, 0x98BC, 0x6A08, 0x98BD, 0x6A09, 0x98BE, 0x6A0A, 0xB7AE, + 0x6A0B, 0x98BF, 0x6A0C, 0x98C0, 0x6A0D, 0x98C1, 0x6A0E, 0x98C2, + 0x6A0F, 0x98C3, 0x6A10, 0x98C4, 0x6A11, 0x98C5, 0x6A12, 0x98C6, + 0x6A13, 0x98C7, 0x6A14, 0x98C8, 0x6A15, 0x98C9, 0x6A16, 0x98CA, + 0x6A17, 0xE9CB, 0x6A18, 0xE9CC, 0x6A19, 0x98CB, 0x6A1A, 0x98CC, + 0x6A1B, 0x98CD, 0x6A1C, 0x98CE, 0x6A1D, 0x98CF, 0x6A1E, 0x98D0, + 0x6A1F, 0xD5C1, 0x6A20, 0x98D1, 0x6A21, 0xC4A3, 0x6A22, 0x98D2, + 0x6A23, 0x98D3, 0x6A24, 0x98D4, 0x6A25, 0x98D5, 0x6A26, 0x98D6, + 0x6A27, 0x98D7, 0x6A28, 0xE9D8, 0x6A29, 0x98D8, 0x6A2A, 0xBAE1, + 0x6A2B, 0x98D9, 0x6A2C, 0x98DA, 0x6A2D, 0x98DB, 0x6A2E, 0x98DC, + 0x6A2F, 0xE9C9, 0x6A30, 0x98DD, 0x6A31, 0xD3A3, 0x6A32, 0x98DE, + 0x6A33, 0x98DF, 0x6A34, 0x98E0, 0x6A35, 0xE9D4, 0x6A36, 0x98E1, + 0x6A37, 0x98E2, 0x6A38, 0x98E3, 0x6A39, 0x98E4, 0x6A3A, 0x98E5, + 0x6A3B, 0x98E6, 0x6A3C, 0x98E7, 0x6A3D, 0xE9D7, 0x6A3E, 0xE9D0, + 0x6A3F, 0x98E8, 0x6A40, 0x98E9, 0x6A41, 0x98EA, 0x6A42, 0x98EB, + 0x6A43, 0x98EC, 0x6A44, 0xE9CF, 0x6A45, 0x98ED, 0x6A46, 0x98EE, + 0x6A47, 0xC7C1, 0x6A48, 0x98EF, 0x6A49, 0x98F0, 0x6A4A, 0x98F1, + 0x6A4B, 0x98F2, 0x6A4C, 0x98F3, 0x6A4D, 0x98F4, 0x6A4E, 0x98F5, + 0x6A4F, 0x98F6, 0x6A50, 0xE9D2, 0x6A51, 0x98F7, 0x6A52, 0x98F8, + 0x6A53, 0x98F9, 0x6A54, 0x98FA, 0x6A55, 0x98FB, 0x6A56, 0x98FC, + 0x6A57, 0x98FD, 0x6A58, 0xE9D9, 0x6A59, 0xB3C8, 0x6A5A, 0x98FE, + 0x6A5B, 0xE9D3, 0x6A5C, 0x9940, 0x6A5D, 0x9941, 0x6A5E, 0x9942, + 0x6A5F, 0x9943, 0x6A60, 0x9944, 0x6A61, 0xCFF0, 0x6A62, 0x9945, + 0x6A63, 0x9946, 0x6A64, 0x9947, 0x6A65, 0xE9CD, 0x6A66, 0x9948, + 0x6A67, 0x9949, 0x6A68, 0x994A, 0x6A69, 0x994B, 0x6A6A, 0x994C, + 0x6A6B, 0x994D, 0x6A6C, 0x994E, 0x6A6D, 0x994F, 0x6A6E, 0x9950, + 0x6A6F, 0x9951, 0x6A70, 0x9952, 0x6A71, 0xB3F7, 0x6A72, 0x9953, + 0x6A73, 0x9954, 0x6A74, 0x9955, 0x6A75, 0x9956, 0x6A76, 0x9957, + 0x6A77, 0x9958, 0x6A78, 0x9959, 0x6A79, 0xE9D6, 0x6A7A, 0x995A, + 0x6A7B, 0x995B, 0x6A7C, 0xE9DA, 0x6A7D, 0x995C, 0x6A7E, 0x995D, + 0x6A7F, 0x995E, 0x6A80, 0xCCB4, 0x6A81, 0x995F, 0x6A82, 0x9960, + 0x6A83, 0x9961, 0x6A84, 0xCFAD, 0x6A85, 0x9962, 0x6A86, 0x9963, + 0x6A87, 0x9964, 0x6A88, 0x9965, 0x6A89, 0x9966, 0x6A8A, 0x9967, + 0x6A8B, 0x9968, 0x6A8C, 0x9969, 0x6A8D, 0x996A, 0x6A8E, 0xE9D5, + 0x6A8F, 0x996B, 0x6A90, 0xE9DC, 0x6A91, 0xE9DB, 0x6A92, 0x996C, + 0x6A93, 0x996D, 0x6A94, 0x996E, 0x6A95, 0x996F, 0x6A96, 0x9970, + 0x6A97, 0xE9DE, 0x6A98, 0x9971, 0x6A99, 0x9972, 0x6A9A, 0x9973, + 0x6A9B, 0x9974, 0x6A9C, 0x9975, 0x6A9D, 0x9976, 0x6A9E, 0x9977, + 0x6A9F, 0x9978, 0x6AA0, 0xE9D1, 0x6AA1, 0x9979, 0x6AA2, 0x997A, + 0x6AA3, 0x997B, 0x6AA4, 0x997C, 0x6AA5, 0x997D, 0x6AA6, 0x997E, + 0x6AA7, 0x9980, 0x6AA8, 0x9981, 0x6AA9, 0xE9DD, 0x6AAA, 0x9982, + 0x6AAB, 0xE9DF, 0x6AAC, 0xC3CA, 0x6AAD, 0x9983, 0x6AAE, 0x9984, + 0x6AAF, 0x9985, 0x6AB0, 0x9986, 0x6AB1, 0x9987, 0x6AB2, 0x9988, + 0x6AB3, 0x9989, 0x6AB4, 0x998A, 0x6AB5, 0x998B, 0x6AB6, 0x998C, + 0x6AB7, 0x998D, 0x6AB8, 0x998E, 0x6AB9, 0x998F, 0x6ABA, 0x9990, + 0x6ABB, 0x9991, 0x6ABC, 0x9992, 0x6ABD, 0x9993, 0x6ABE, 0x9994, + 0x6ABF, 0x9995, 0x6AC0, 0x9996, 0x6AC1, 0x9997, 0x6AC2, 0x9998, + 0x6AC3, 0x9999, 0x6AC4, 0x999A, 0x6AC5, 0x999B, 0x6AC6, 0x999C, + 0x6AC7, 0x999D, 0x6AC8, 0x999E, 0x6AC9, 0x999F, 0x6ACA, 0x99A0, + 0x6ACB, 0x99A1, 0x6ACC, 0x99A2, 0x6ACD, 0x99A3, 0x6ACE, 0x99A4, + 0x6ACF, 0x99A5, 0x6AD0, 0x99A6, 0x6AD1, 0x99A7, 0x6AD2, 0x99A8, + 0x6AD3, 0x99A9, 0x6AD4, 0x99AA, 0x6AD5, 0x99AB, 0x6AD6, 0x99AC, + 0x6AD7, 0x99AD, 0x6AD8, 0x99AE, 0x6AD9, 0x99AF, 0x6ADA, 0x99B0, + 0x6ADB, 0x99B1, 0x6ADC, 0x99B2, 0x6ADD, 0x99B3, 0x6ADE, 0x99B4, + 0x6ADF, 0x99B5, 0x6AE0, 0x99B6, 0x6AE1, 0x99B7, 0x6AE2, 0x99B8, + 0x6AE3, 0x99B9, 0x6AE4, 0x99BA, 0x6AE5, 0x99BB, 0x6AE6, 0x99BC, + 0x6AE7, 0x99BD, 0x6AE8, 0x99BE, 0x6AE9, 0x99BF, 0x6AEA, 0x99C0, + 0x6AEB, 0x99C1, 0x6AEC, 0x99C2, 0x6AED, 0x99C3, 0x6AEE, 0x99C4, + 0x6AEF, 0x99C5, 0x6AF0, 0x99C6, 0x6AF1, 0x99C7, 0x6AF2, 0x99C8, + 0x6AF3, 0x99C9, 0x6AF4, 0x99CA, 0x6AF5, 0x99CB, 0x6AF6, 0x99CC, + 0x6AF7, 0x99CD, 0x6AF8, 0x99CE, 0x6AF9, 0x99CF, 0x6AFA, 0x99D0, + 0x6AFB, 0x99D1, 0x6AFC, 0x99D2, 0x6AFD, 0x99D3, 0x6AFE, 0x99D4, + 0x6AFF, 0x99D5, 0x6B00, 0x99D6, 0x6B01, 0x99D7, 0x6B02, 0x99D8, + 0x6B03, 0x99D9, 0x6B04, 0x99DA, 0x6B05, 0x99DB, 0x6B06, 0x99DC, + 0x6B07, 0x99DD, 0x6B08, 0x99DE, 0x6B09, 0x99DF, 0x6B0A, 0x99E0, + 0x6B0B, 0x99E1, 0x6B0C, 0x99E2, 0x6B0D, 0x99E3, 0x6B0E, 0x99E4, + 0x6B0F, 0x99E5, 0x6B10, 0x99E6, 0x6B11, 0x99E7, 0x6B12, 0x99E8, + 0x6B13, 0x99E9, 0x6B14, 0x99EA, 0x6B15, 0x99EB, 0x6B16, 0x99EC, + 0x6B17, 0x99ED, 0x6B18, 0x99EE, 0x6B19, 0x99EF, 0x6B1A, 0x99F0, + 0x6B1B, 0x99F1, 0x6B1C, 0x99F2, 0x6B1D, 0x99F3, 0x6B1E, 0x99F4, + 0x6B1F, 0x99F5, 0x6B20, 0xC7B7, 0x6B21, 0xB4CE, 0x6B22, 0xBBB6, + 0x6B23, 0xD0C0, 0x6B24, 0xECA3, 0x6B25, 0x99F6, 0x6B26, 0x99F7, + 0x6B27, 0xC5B7, 0x6B28, 0x99F8, 0x6B29, 0x99F9, 0x6B2A, 0x99FA, + 0x6B2B, 0x99FB, 0x6B2C, 0x99FC, 0x6B2D, 0x99FD, 0x6B2E, 0x99FE, + 0x6B2F, 0x9A40, 0x6B30, 0x9A41, 0x6B31, 0x9A42, 0x6B32, 0xD3FB, + 0x6B33, 0x9A43, 0x6B34, 0x9A44, 0x6B35, 0x9A45, 0x6B36, 0x9A46, + 0x6B37, 0xECA4, 0x6B38, 0x9A47, 0x6B39, 0xECA5, 0x6B3A, 0xC6DB, + 0x6B3B, 0x9A48, 0x6B3C, 0x9A49, 0x6B3D, 0x9A4A, 0x6B3E, 0xBFEE, + 0x6B3F, 0x9A4B, 0x6B40, 0x9A4C, 0x6B41, 0x9A4D, 0x6B42, 0x9A4E, + 0x6B43, 0xECA6, 0x6B44, 0x9A4F, 0x6B45, 0x9A50, 0x6B46, 0xECA7, + 0x6B47, 0xD0AA, 0x6B48, 0x9A51, 0x6B49, 0xC7B8, 0x6B4A, 0x9A52, + 0x6B4B, 0x9A53, 0x6B4C, 0xB8E8, 0x6B4D, 0x9A54, 0x6B4E, 0x9A55, + 0x6B4F, 0x9A56, 0x6B50, 0x9A57, 0x6B51, 0x9A58, 0x6B52, 0x9A59, + 0x6B53, 0x9A5A, 0x6B54, 0x9A5B, 0x6B55, 0x9A5C, 0x6B56, 0x9A5D, + 0x6B57, 0x9A5E, 0x6B58, 0x9A5F, 0x6B59, 0xECA8, 0x6B5A, 0x9A60, + 0x6B5B, 0x9A61, 0x6B5C, 0x9A62, 0x6B5D, 0x9A63, 0x6B5E, 0x9A64, + 0x6B5F, 0x9A65, 0x6B60, 0x9A66, 0x6B61, 0x9A67, 0x6B62, 0xD6B9, + 0x6B63, 0xD5FD, 0x6B64, 0xB4CB, 0x6B65, 0xB2BD, 0x6B66, 0xCEE4, + 0x6B67, 0xC6E7, 0x6B68, 0x9A68, 0x6B69, 0x9A69, 0x6B6A, 0xCDE1, + 0x6B6B, 0x9A6A, 0x6B6C, 0x9A6B, 0x6B6D, 0x9A6C, 0x6B6E, 0x9A6D, + 0x6B6F, 0x9A6E, 0x6B70, 0x9A6F, 0x6B71, 0x9A70, 0x6B72, 0x9A71, + 0x6B73, 0x9A72, 0x6B74, 0x9A73, 0x6B75, 0x9A74, 0x6B76, 0x9A75, + 0x6B77, 0x9A76, 0x6B78, 0x9A77, 0x6B79, 0xB4F5, 0x6B7A, 0x9A78, + 0x6B7B, 0xCBC0, 0x6B7C, 0xBCDF, 0x6B7D, 0x9A79, 0x6B7E, 0x9A7A, + 0x6B7F, 0x9A7B, 0x6B80, 0x9A7C, 0x6B81, 0xE9E2, 0x6B82, 0xE9E3, + 0x6B83, 0xD1EA, 0x6B84, 0xE9E5, 0x6B85, 0x9A7D, 0x6B86, 0xB4F9, + 0x6B87, 0xE9E4, 0x6B88, 0x9A7E, 0x6B89, 0xD1B3, 0x6B8A, 0xCAE2, + 0x6B8B, 0xB2D0, 0x6B8C, 0x9A80, 0x6B8D, 0xE9E8, 0x6B8E, 0x9A81, + 0x6B8F, 0x9A82, 0x6B90, 0x9A83, 0x6B91, 0x9A84, 0x6B92, 0xE9E6, + 0x6B93, 0xE9E7, 0x6B94, 0x9A85, 0x6B95, 0x9A86, 0x6B96, 0xD6B3, + 0x6B97, 0x9A87, 0x6B98, 0x9A88, 0x6B99, 0x9A89, 0x6B9A, 0xE9E9, + 0x6B9B, 0xE9EA, 0x6B9C, 0x9A8A, 0x6B9D, 0x9A8B, 0x6B9E, 0x9A8C, + 0x6B9F, 0x9A8D, 0x6BA0, 0x9A8E, 0x6BA1, 0xE9EB, 0x6BA2, 0x9A8F, + 0x6BA3, 0x9A90, 0x6BA4, 0x9A91, 0x6BA5, 0x9A92, 0x6BA6, 0x9A93, + 0x6BA7, 0x9A94, 0x6BA8, 0x9A95, 0x6BA9, 0x9A96, 0x6BAA, 0xE9EC, + 0x6BAB, 0x9A97, 0x6BAC, 0x9A98, 0x6BAD, 0x9A99, 0x6BAE, 0x9A9A, + 0x6BAF, 0x9A9B, 0x6BB0, 0x9A9C, 0x6BB1, 0x9A9D, 0x6BB2, 0x9A9E, + 0x6BB3, 0xECAF, 0x6BB4, 0xC5B9, 0x6BB5, 0xB6CE, 0x6BB6, 0x9A9F, + 0x6BB7, 0xD2F3, 0x6BB8, 0x9AA0, 0x6BB9, 0x9AA1, 0x6BBA, 0x9AA2, + 0x6BBB, 0x9AA3, 0x6BBC, 0x9AA4, 0x6BBD, 0x9AA5, 0x6BBE, 0x9AA6, + 0x6BBF, 0xB5EE, 0x6BC0, 0x9AA7, 0x6BC1, 0xBBD9, 0x6BC2, 0xECB1, + 0x6BC3, 0x9AA8, 0x6BC4, 0x9AA9, 0x6BC5, 0xD2E3, 0x6BC6, 0x9AAA, + 0x6BC7, 0x9AAB, 0x6BC8, 0x9AAC, 0x6BC9, 0x9AAD, 0x6BCA, 0x9AAE, + 0x6BCB, 0xCEE3, 0x6BCC, 0x9AAF, 0x6BCD, 0xC4B8, 0x6BCE, 0x9AB0, + 0x6BCF, 0xC3BF, 0x6BD0, 0x9AB1, 0x6BD1, 0x9AB2, 0x6BD2, 0xB6BE, + 0x6BD3, 0xD8B9, 0x6BD4, 0xB1C8, 0x6BD5, 0xB1CF, 0x6BD6, 0xB1D1, + 0x6BD7, 0xC5FE, 0x6BD8, 0x9AB3, 0x6BD9, 0xB1D0, 0x6BDA, 0x9AB4, + 0x6BDB, 0xC3AB, 0x6BDC, 0x9AB5, 0x6BDD, 0x9AB6, 0x6BDE, 0x9AB7, + 0x6BDF, 0x9AB8, 0x6BE0, 0x9AB9, 0x6BE1, 0xD5B1, 0x6BE2, 0x9ABA, + 0x6BE3, 0x9ABB, 0x6BE4, 0x9ABC, 0x6BE5, 0x9ABD, 0x6BE6, 0x9ABE, + 0x6BE7, 0x9ABF, 0x6BE8, 0x9AC0, 0x6BE9, 0x9AC1, 0x6BEA, 0xEBA4, + 0x6BEB, 0xBAC1, 0x6BEC, 0x9AC2, 0x6BED, 0x9AC3, 0x6BEE, 0x9AC4, + 0x6BEF, 0xCCBA, 0x6BF0, 0x9AC5, 0x6BF1, 0x9AC6, 0x6BF2, 0x9AC7, + 0x6BF3, 0xEBA5, 0x6BF4, 0x9AC8, 0x6BF5, 0xEBA7, 0x6BF6, 0x9AC9, + 0x6BF7, 0x9ACA, 0x6BF8, 0x9ACB, 0x6BF9, 0xEBA8, 0x6BFA, 0x9ACC, + 0x6BFB, 0x9ACD, 0x6BFC, 0x9ACE, 0x6BFD, 0xEBA6, 0x6BFE, 0x9ACF, + 0x6BFF, 0x9AD0, 0x6C00, 0x9AD1, 0x6C01, 0x9AD2, 0x6C02, 0x9AD3, + 0x6C03, 0x9AD4, 0x6C04, 0x9AD5, 0x6C05, 0xEBA9, 0x6C06, 0xEBAB, + 0x6C07, 0xEBAA, 0x6C08, 0x9AD6, 0x6C09, 0x9AD7, 0x6C0A, 0x9AD8, + 0x6C0B, 0x9AD9, 0x6C0C, 0x9ADA, 0x6C0D, 0xEBAC, 0x6C0E, 0x9ADB, + 0x6C0F, 0xCACF, 0x6C10, 0xD8B5, 0x6C11, 0xC3F1, 0x6C12, 0x9ADC, + 0x6C13, 0xC3A5, 0x6C14, 0xC6F8, 0x6C15, 0xEBAD, 0x6C16, 0xC4CA, + 0x6C17, 0x9ADD, 0x6C18, 0xEBAE, 0x6C19, 0xEBAF, 0x6C1A, 0xEBB0, + 0x6C1B, 0xB7D5, 0x6C1C, 0x9ADE, 0x6C1D, 0x9ADF, 0x6C1E, 0x9AE0, + 0x6C1F, 0xB7FA, 0x6C20, 0x9AE1, 0x6C21, 0xEBB1, 0x6C22, 0xC7E2, + 0x6C23, 0x9AE2, 0x6C24, 0xEBB3, 0x6C25, 0x9AE3, 0x6C26, 0xBAA4, + 0x6C27, 0xD1F5, 0x6C28, 0xB0B1, 0x6C29, 0xEBB2, 0x6C2A, 0xEBB4, + 0x6C2B, 0x9AE4, 0x6C2C, 0x9AE5, 0x6C2D, 0x9AE6, 0x6C2E, 0xB5AA, + 0x6C2F, 0xC2C8, 0x6C30, 0xC7E8, 0x6C31, 0x9AE7, 0x6C32, 0xEBB5, + 0x6C33, 0x9AE8, 0x6C34, 0xCBAE, 0x6C35, 0xE3DF, 0x6C36, 0x9AE9, + 0x6C37, 0x9AEA, 0x6C38, 0xD3C0, 0x6C39, 0x9AEB, 0x6C3A, 0x9AEC, + 0x6C3B, 0x9AED, 0x6C3C, 0x9AEE, 0x6C3D, 0xD9DB, 0x6C3E, 0x9AEF, + 0x6C3F, 0x9AF0, 0x6C40, 0xCDA1, 0x6C41, 0xD6AD, 0x6C42, 0xC7F3, + 0x6C43, 0x9AF1, 0x6C44, 0x9AF2, 0x6C45, 0x9AF3, 0x6C46, 0xD9E0, + 0x6C47, 0xBBE3, 0x6C48, 0x9AF4, 0x6C49, 0xBABA, 0x6C4A, 0xE3E2, + 0x6C4B, 0x9AF5, 0x6C4C, 0x9AF6, 0x6C4D, 0x9AF7, 0x6C4E, 0x9AF8, + 0x6C4F, 0x9AF9, 0x6C50, 0xCFAB, 0x6C51, 0x9AFA, 0x6C52, 0x9AFB, + 0x6C53, 0x9AFC, 0x6C54, 0xE3E0, 0x6C55, 0xC9C7, 0x6C56, 0x9AFD, + 0x6C57, 0xBAB9, 0x6C58, 0x9AFE, 0x6C59, 0x9B40, 0x6C5A, 0x9B41, + 0x6C5B, 0xD1B4, 0x6C5C, 0xE3E1, 0x6C5D, 0xC8EA, 0x6C5E, 0xB9AF, + 0x6C5F, 0xBDAD, 0x6C60, 0xB3D8, 0x6C61, 0xCEDB, 0x6C62, 0x9B42, + 0x6C63, 0x9B43, 0x6C64, 0xCCC0, 0x6C65, 0x9B44, 0x6C66, 0x9B45, + 0x6C67, 0x9B46, 0x6C68, 0xE3E8, 0x6C69, 0xE3E9, 0x6C6A, 0xCDF4, + 0x6C6B, 0x9B47, 0x6C6C, 0x9B48, 0x6C6D, 0x9B49, 0x6C6E, 0x9B4A, + 0x6C6F, 0x9B4B, 0x6C70, 0xCCAD, 0x6C71, 0x9B4C, 0x6C72, 0xBCB3, + 0x6C73, 0x9B4D, 0x6C74, 0xE3EA, 0x6C75, 0x9B4E, 0x6C76, 0xE3EB, + 0x6C77, 0x9B4F, 0x6C78, 0x9B50, 0x6C79, 0xD0DA, 0x6C7A, 0x9B51, + 0x6C7B, 0x9B52, 0x6C7C, 0x9B53, 0x6C7D, 0xC6FB, 0x6C7E, 0xB7DA, + 0x6C7F, 0x9B54, 0x6C80, 0x9B55, 0x6C81, 0xC7DF, 0x6C82, 0xD2CA, + 0x6C83, 0xCED6, 0x6C84, 0x9B56, 0x6C85, 0xE3E4, 0x6C86, 0xE3EC, + 0x6C87, 0x9B57, 0x6C88, 0xC9F2, 0x6C89, 0xB3C1, 0x6C8A, 0x9B58, + 0x6C8B, 0x9B59, 0x6C8C, 0xE3E7, 0x6C8D, 0x9B5A, 0x6C8E, 0x9B5B, + 0x6C8F, 0xC6E3, 0x6C90, 0xE3E5, 0x6C91, 0x9B5C, 0x6C92, 0x9B5D, + 0x6C93, 0xEDB3, 0x6C94, 0xE3E6, 0x6C95, 0x9B5E, 0x6C96, 0x9B5F, + 0x6C97, 0x9B60, 0x6C98, 0x9B61, 0x6C99, 0xC9B3, 0x6C9A, 0x9B62, + 0x6C9B, 0xC5E6, 0x6C9C, 0x9B63, 0x6C9D, 0x9B64, 0x6C9E, 0x9B65, + 0x6C9F, 0xB9B5, 0x6CA0, 0x9B66, 0x6CA1, 0xC3BB, 0x6CA2, 0x9B67, + 0x6CA3, 0xE3E3, 0x6CA4, 0xC5BD, 0x6CA5, 0xC1A4, 0x6CA6, 0xC2D9, + 0x6CA7, 0xB2D7, 0x6CA8, 0x9B68, 0x6CA9, 0xE3ED, 0x6CAA, 0xBBA6, + 0x6CAB, 0xC4AD, 0x6CAC, 0x9B69, 0x6CAD, 0xE3F0, 0x6CAE, 0xBEDA, + 0x6CAF, 0x9B6A, 0x6CB0, 0x9B6B, 0x6CB1, 0xE3FB, 0x6CB2, 0xE3F5, + 0x6CB3, 0xBAD3, 0x6CB4, 0x9B6C, 0x6CB5, 0x9B6D, 0x6CB6, 0x9B6E, + 0x6CB7, 0x9B6F, 0x6CB8, 0xB7D0, 0x6CB9, 0xD3CD, 0x6CBA, 0x9B70, + 0x6CBB, 0xD6CE, 0x6CBC, 0xD5D3, 0x6CBD, 0xB9C1, 0x6CBE, 0xD5B4, + 0x6CBF, 0xD1D8, 0x6CC0, 0x9B71, 0x6CC1, 0x9B72, 0x6CC2, 0x9B73, + 0x6CC3, 0x9B74, 0x6CC4, 0xD0B9, 0x6CC5, 0xC7F6, 0x6CC6, 0x9B75, + 0x6CC7, 0x9B76, 0x6CC8, 0x9B77, 0x6CC9, 0xC8AA, 0x6CCA, 0xB2B4, + 0x6CCB, 0x9B78, 0x6CCC, 0xC3DA, 0x6CCD, 0x9B79, 0x6CCE, 0x9B7A, + 0x6CCF, 0x9B7B, 0x6CD0, 0xE3EE, 0x6CD1, 0x9B7C, 0x6CD2, 0x9B7D, + 0x6CD3, 0xE3FC, 0x6CD4, 0xE3EF, 0x6CD5, 0xB7A8, 0x6CD6, 0xE3F7, + 0x6CD7, 0xE3F4, 0x6CD8, 0x9B7E, 0x6CD9, 0x9B80, 0x6CDA, 0x9B81, + 0x6CDB, 0xB7BA, 0x6CDC, 0x9B82, 0x6CDD, 0x9B83, 0x6CDE, 0xC5A2, + 0x6CDF, 0x9B84, 0x6CE0, 0xE3F6, 0x6CE1, 0xC5DD, 0x6CE2, 0xB2A8, + 0x6CE3, 0xC6FC, 0x6CE4, 0x9B85, 0x6CE5, 0xC4E0, 0x6CE6, 0x9B86, + 0x6CE7, 0x9B87, 0x6CE8, 0xD7A2, 0x6CE9, 0x9B88, 0x6CEA, 0xC0E1, + 0x6CEB, 0xE3F9, 0x6CEC, 0x9B89, 0x6CED, 0x9B8A, 0x6CEE, 0xE3FA, + 0x6CEF, 0xE3FD, 0x6CF0, 0xCCA9, 0x6CF1, 0xE3F3, 0x6CF2, 0x9B8B, + 0x6CF3, 0xD3BE, 0x6CF4, 0x9B8C, 0x6CF5, 0xB1C3, 0x6CF6, 0xEDB4, + 0x6CF7, 0xE3F1, 0x6CF8, 0xE3F2, 0x6CF9, 0x9B8D, 0x6CFA, 0xE3F8, + 0x6CFB, 0xD0BA, 0x6CFC, 0xC6C3, 0x6CFD, 0xD4F3, 0x6CFE, 0xE3FE, + 0x6CFF, 0x9B8E, 0x6D00, 0x9B8F, 0x6D01, 0xBDE0, 0x6D02, 0x9B90, + 0x6D03, 0x9B91, 0x6D04, 0xE4A7, 0x6D05, 0x9B92, 0x6D06, 0x9B93, + 0x6D07, 0xE4A6, 0x6D08, 0x9B94, 0x6D09, 0x9B95, 0x6D0A, 0x9B96, + 0x6D0B, 0xD1F3, 0x6D0C, 0xE4A3, 0x6D0D, 0x9B97, 0x6D0E, 0xE4A9, + 0x6D0F, 0x9B98, 0x6D10, 0x9B99, 0x6D11, 0x9B9A, 0x6D12, 0xC8F7, + 0x6D13, 0x9B9B, 0x6D14, 0x9B9C, 0x6D15, 0x9B9D, 0x6D16, 0x9B9E, + 0x6D17, 0xCFB4, 0x6D18, 0x9B9F, 0x6D19, 0xE4A8, 0x6D1A, 0xE4AE, + 0x6D1B, 0xC2E5, 0x6D1C, 0x9BA0, 0x6D1D, 0x9BA1, 0x6D1E, 0xB6B4, + 0x6D1F, 0x9BA2, 0x6D20, 0x9BA3, 0x6D21, 0x9BA4, 0x6D22, 0x9BA5, + 0x6D23, 0x9BA6, 0x6D24, 0x9BA7, 0x6D25, 0xBDF2, 0x6D26, 0x9BA8, + 0x6D27, 0xE4A2, 0x6D28, 0x9BA9, 0x6D29, 0x9BAA, 0x6D2A, 0xBAE9, + 0x6D2B, 0xE4AA, 0x6D2C, 0x9BAB, 0x6D2D, 0x9BAC, 0x6D2E, 0xE4AC, + 0x6D2F, 0x9BAD, 0x6D30, 0x9BAE, 0x6D31, 0xB6FD, 0x6D32, 0xD6DE, + 0x6D33, 0xE4B2, 0x6D34, 0x9BAF, 0x6D35, 0xE4AD, 0x6D36, 0x9BB0, + 0x6D37, 0x9BB1, 0x6D38, 0x9BB2, 0x6D39, 0xE4A1, 0x6D3A, 0x9BB3, + 0x6D3B, 0xBBEE, 0x6D3C, 0xCDDD, 0x6D3D, 0xC7A2, 0x6D3E, 0xC5C9, + 0x6D3F, 0x9BB4, 0x6D40, 0x9BB5, 0x6D41, 0xC1F7, 0x6D42, 0x9BB6, + 0x6D43, 0xE4A4, 0x6D44, 0x9BB7, 0x6D45, 0xC7B3, 0x6D46, 0xBDAC, + 0x6D47, 0xBDBD, 0x6D48, 0xE4A5, 0x6D49, 0x9BB8, 0x6D4A, 0xD7C7, + 0x6D4B, 0xB2E2, 0x6D4C, 0x9BB9, 0x6D4D, 0xE4AB, 0x6D4E, 0xBCC3, + 0x6D4F, 0xE4AF, 0x6D50, 0x9BBA, 0x6D51, 0xBBEB, 0x6D52, 0xE4B0, + 0x6D53, 0xC5A8, 0x6D54, 0xE4B1, 0x6D55, 0x9BBB, 0x6D56, 0x9BBC, + 0x6D57, 0x9BBD, 0x6D58, 0x9BBE, 0x6D59, 0xD5E3, 0x6D5A, 0xBFA3, + 0x6D5B, 0x9BBF, 0x6D5C, 0xE4BA, 0x6D5D, 0x9BC0, 0x6D5E, 0xE4B7, + 0x6D5F, 0x9BC1, 0x6D60, 0xE4BB, 0x6D61, 0x9BC2, 0x6D62, 0x9BC3, + 0x6D63, 0xE4BD, 0x6D64, 0x9BC4, 0x6D65, 0x9BC5, 0x6D66, 0xC6D6, + 0x6D67, 0x9BC6, 0x6D68, 0x9BC7, 0x6D69, 0xBAC6, 0x6D6A, 0xC0CB, + 0x6D6B, 0x9BC8, 0x6D6C, 0x9BC9, 0x6D6D, 0x9BCA, 0x6D6E, 0xB8A1, + 0x6D6F, 0xE4B4, 0x6D70, 0x9BCB, 0x6D71, 0x9BCC, 0x6D72, 0x9BCD, + 0x6D73, 0x9BCE, 0x6D74, 0xD4A1, 0x6D75, 0x9BCF, 0x6D76, 0x9BD0, + 0x6D77, 0xBAA3, 0x6D78, 0xBDFE, 0x6D79, 0x9BD1, 0x6D7A, 0x9BD2, + 0x6D7B, 0x9BD3, 0x6D7C, 0xE4BC, 0x6D7D, 0x9BD4, 0x6D7E, 0x9BD5, + 0x6D7F, 0x9BD6, 0x6D80, 0x9BD7, 0x6D81, 0x9BD8, 0x6D82, 0xCDBF, + 0x6D83, 0x9BD9, 0x6D84, 0x9BDA, 0x6D85, 0xC4F9, 0x6D86, 0x9BDB, + 0x6D87, 0x9BDC, 0x6D88, 0xCFFB, 0x6D89, 0xC9E6, 0x6D8A, 0x9BDD, + 0x6D8B, 0x9BDE, 0x6D8C, 0xD3BF, 0x6D8D, 0x9BDF, 0x6D8E, 0xCFD1, + 0x6D8F, 0x9BE0, 0x6D90, 0x9BE1, 0x6D91, 0xE4B3, 0x6D92, 0x9BE2, + 0x6D93, 0xE4B8, 0x6D94, 0xE4B9, 0x6D95, 0xCCE9, 0x6D96, 0x9BE3, + 0x6D97, 0x9BE4, 0x6D98, 0x9BE5, 0x6D99, 0x9BE6, 0x6D9A, 0x9BE7, + 0x6D9B, 0xCCCE, 0x6D9C, 0x9BE8, 0x6D9D, 0xC0D4, 0x6D9E, 0xE4B5, + 0x6D9F, 0xC1B0, 0x6DA0, 0xE4B6, 0x6DA1, 0xCED0, 0x6DA2, 0x9BE9, + 0x6DA3, 0xBBC1, 0x6DA4, 0xB5D3, 0x6DA5, 0x9BEA, 0x6DA6, 0xC8F3, + 0x6DA7, 0xBDA7, 0x6DA8, 0xD5C7, 0x6DA9, 0xC9AC, 0x6DAA, 0xB8A2, + 0x6DAB, 0xE4CA, 0x6DAC, 0x9BEB, 0x6DAD, 0x9BEC, 0x6DAE, 0xE4CC, + 0x6DAF, 0xD1C4, 0x6DB0, 0x9BED, 0x6DB1, 0x9BEE, 0x6DB2, 0xD2BA, + 0x6DB3, 0x9BEF, 0x6DB4, 0x9BF0, 0x6DB5, 0xBAAD, 0x6DB6, 0x9BF1, + 0x6DB7, 0x9BF2, 0x6DB8, 0xBAD4, 0x6DB9, 0x9BF3, 0x6DBA, 0x9BF4, + 0x6DBB, 0x9BF5, 0x6DBC, 0x9BF6, 0x6DBD, 0x9BF7, 0x6DBE, 0x9BF8, + 0x6DBF, 0xE4C3, 0x6DC0, 0xB5ED, 0x6DC1, 0x9BF9, 0x6DC2, 0x9BFA, + 0x6DC3, 0x9BFB, 0x6DC4, 0xD7CD, 0x6DC5, 0xE4C0, 0x6DC6, 0xCFFD, + 0x6DC7, 0xE4BF, 0x6DC8, 0x9BFC, 0x6DC9, 0x9BFD, 0x6DCA, 0x9BFE, + 0x6DCB, 0xC1DC, 0x6DCC, 0xCCCA, 0x6DCD, 0x9C40, 0x6DCE, 0x9C41, + 0x6DCF, 0x9C42, 0x6DD0, 0x9C43, 0x6DD1, 0xCAE7, 0x6DD2, 0x9C44, + 0x6DD3, 0x9C45, 0x6DD4, 0x9C46, 0x6DD5, 0x9C47, 0x6DD6, 0xC4D7, + 0x6DD7, 0x9C48, 0x6DD8, 0xCCD4, 0x6DD9, 0xE4C8, 0x6DDA, 0x9C49, + 0x6DDB, 0x9C4A, 0x6DDC, 0x9C4B, 0x6DDD, 0xE4C7, 0x6DDE, 0xE4C1, + 0x6DDF, 0x9C4C, 0x6DE0, 0xE4C4, 0x6DE1, 0xB5AD, 0x6DE2, 0x9C4D, + 0x6DE3, 0x9C4E, 0x6DE4, 0xD3D9, 0x6DE5, 0x9C4F, 0x6DE6, 0xE4C6, + 0x6DE7, 0x9C50, 0x6DE8, 0x9C51, 0x6DE9, 0x9C52, 0x6DEA, 0x9C53, + 0x6DEB, 0xD2F9, 0x6DEC, 0xB4E3, 0x6DED, 0x9C54, 0x6DEE, 0xBBB4, + 0x6DEF, 0x9C55, 0x6DF0, 0x9C56, 0x6DF1, 0xC9EE, 0x6DF2, 0x9C57, + 0x6DF3, 0xB4BE, 0x6DF4, 0x9C58, 0x6DF5, 0x9C59, 0x6DF6, 0x9C5A, + 0x6DF7, 0xBBEC, 0x6DF8, 0x9C5B, 0x6DF9, 0xD1CD, 0x6DFA, 0x9C5C, + 0x6DFB, 0xCCED, 0x6DFC, 0xEDB5, 0x6DFD, 0x9C5D, 0x6DFE, 0x9C5E, + 0x6DFF, 0x9C5F, 0x6E00, 0x9C60, 0x6E01, 0x9C61, 0x6E02, 0x9C62, + 0x6E03, 0x9C63, 0x6E04, 0x9C64, 0x6E05, 0xC7E5, 0x6E06, 0x9C65, + 0x6E07, 0x9C66, 0x6E08, 0x9C67, 0x6E09, 0x9C68, 0x6E0A, 0xD4A8, + 0x6E0B, 0x9C69, 0x6E0C, 0xE4CB, 0x6E0D, 0xD7D5, 0x6E0E, 0xE4C2, + 0x6E0F, 0x9C6A, 0x6E10, 0xBDA5, 0x6E11, 0xE4C5, 0x6E12, 0x9C6B, + 0x6E13, 0x9C6C, 0x6E14, 0xD3E6, 0x6E15, 0x9C6D, 0x6E16, 0xE4C9, + 0x6E17, 0xC9F8, 0x6E18, 0x9C6E, 0x6E19, 0x9C6F, 0x6E1A, 0xE4BE, + 0x6E1B, 0x9C70, 0x6E1C, 0x9C71, 0x6E1D, 0xD3E5, 0x6E1E, 0x9C72, + 0x6E1F, 0x9C73, 0x6E20, 0xC7FE, 0x6E21, 0xB6C9, 0x6E22, 0x9C74, + 0x6E23, 0xD4FC, 0x6E24, 0xB2B3, 0x6E25, 0xE4D7, 0x6E26, 0x9C75, + 0x6E27, 0x9C76, 0x6E28, 0x9C77, 0x6E29, 0xCEC2, 0x6E2A, 0x9C78, + 0x6E2B, 0xE4CD, 0x6E2C, 0x9C79, 0x6E2D, 0xCEBC, 0x6E2E, 0x9C7A, + 0x6E2F, 0xB8DB, 0x6E30, 0x9C7B, 0x6E31, 0x9C7C, 0x6E32, 0xE4D6, + 0x6E33, 0x9C7D, 0x6E34, 0xBFCA, 0x6E35, 0x9C7E, 0x6E36, 0x9C80, + 0x6E37, 0x9C81, 0x6E38, 0xD3CE, 0x6E39, 0x9C82, 0x6E3A, 0xC3EC, + 0x6E3B, 0x9C83, 0x6E3C, 0x9C84, 0x6E3D, 0x9C85, 0x6E3E, 0x9C86, + 0x6E3F, 0x9C87, 0x6E40, 0x9C88, 0x6E41, 0x9C89, 0x6E42, 0x9C8A, + 0x6E43, 0xC5C8, 0x6E44, 0xE4D8, 0x6E45, 0x9C8B, 0x6E46, 0x9C8C, + 0x6E47, 0x9C8D, 0x6E48, 0x9C8E, 0x6E49, 0x9C8F, 0x6E4A, 0x9C90, + 0x6E4B, 0x9C91, 0x6E4C, 0x9C92, 0x6E4D, 0xCDC4, 0x6E4E, 0xE4CF, + 0x6E4F, 0x9C93, 0x6E50, 0x9C94, 0x6E51, 0x9C95, 0x6E52, 0x9C96, + 0x6E53, 0xE4D4, 0x6E54, 0xE4D5, 0x6E55, 0x9C97, 0x6E56, 0xBAFE, + 0x6E57, 0x9C98, 0x6E58, 0xCFE6, 0x6E59, 0x9C99, 0x6E5A, 0x9C9A, + 0x6E5B, 0xD5BF, 0x6E5C, 0x9C9B, 0x6E5D, 0x9C9C, 0x6E5E, 0x9C9D, + 0x6E5F, 0xE4D2, 0x6E60, 0x9C9E, 0x6E61, 0x9C9F, 0x6E62, 0x9CA0, + 0x6E63, 0x9CA1, 0x6E64, 0x9CA2, 0x6E65, 0x9CA3, 0x6E66, 0x9CA4, + 0x6E67, 0x9CA5, 0x6E68, 0x9CA6, 0x6E69, 0x9CA7, 0x6E6A, 0x9CA8, + 0x6E6B, 0xE4D0, 0x6E6C, 0x9CA9, 0x6E6D, 0x9CAA, 0x6E6E, 0xE4CE, + 0x6E6F, 0x9CAB, 0x6E70, 0x9CAC, 0x6E71, 0x9CAD, 0x6E72, 0x9CAE, + 0x6E73, 0x9CAF, 0x6E74, 0x9CB0, 0x6E75, 0x9CB1, 0x6E76, 0x9CB2, + 0x6E77, 0x9CB3, 0x6E78, 0x9CB4, 0x6E79, 0x9CB5, 0x6E7A, 0x9CB6, + 0x6E7B, 0x9CB7, 0x6E7C, 0x9CB8, 0x6E7D, 0x9CB9, 0x6E7E, 0xCDE5, + 0x6E7F, 0xCAAA, 0x6E80, 0x9CBA, 0x6E81, 0x9CBB, 0x6E82, 0x9CBC, + 0x6E83, 0xC0A3, 0x6E84, 0x9CBD, 0x6E85, 0xBDA6, 0x6E86, 0xE4D3, + 0x6E87, 0x9CBE, 0x6E88, 0x9CBF, 0x6E89, 0xB8C8, 0x6E8A, 0x9CC0, + 0x6E8B, 0x9CC1, 0x6E8C, 0x9CC2, 0x6E8D, 0x9CC3, 0x6E8E, 0x9CC4, + 0x6E8F, 0xE4E7, 0x6E90, 0xD4B4, 0x6E91, 0x9CC5, 0x6E92, 0x9CC6, + 0x6E93, 0x9CC7, 0x6E94, 0x9CC8, 0x6E95, 0x9CC9, 0x6E96, 0x9CCA, + 0x6E97, 0x9CCB, 0x6E98, 0xE4DB, 0x6E99, 0x9CCC, 0x6E9A, 0x9CCD, + 0x6E9B, 0x9CCE, 0x6E9C, 0xC1EF, 0x6E9D, 0x9CCF, 0x6E9E, 0x9CD0, + 0x6E9F, 0xE4E9, 0x6EA0, 0x9CD1, 0x6EA1, 0x9CD2, 0x6EA2, 0xD2E7, + 0x6EA3, 0x9CD3, 0x6EA4, 0x9CD4, 0x6EA5, 0xE4DF, 0x6EA6, 0x9CD5, + 0x6EA7, 0xE4E0, 0x6EA8, 0x9CD6, 0x6EA9, 0x9CD7, 0x6EAA, 0xCFAA, + 0x6EAB, 0x9CD8, 0x6EAC, 0x9CD9, 0x6EAD, 0x9CDA, 0x6EAE, 0x9CDB, + 0x6EAF, 0xCBDD, 0x6EB0, 0x9CDC, 0x6EB1, 0xE4DA, 0x6EB2, 0xE4D1, + 0x6EB3, 0x9CDD, 0x6EB4, 0xE4E5, 0x6EB5, 0x9CDE, 0x6EB6, 0xC8DC, + 0x6EB7, 0xE4E3, 0x6EB8, 0x9CDF, 0x6EB9, 0x9CE0, 0x6EBA, 0xC4E7, + 0x6EBB, 0xE4E2, 0x6EBC, 0x9CE1, 0x6EBD, 0xE4E1, 0x6EBE, 0x9CE2, + 0x6EBF, 0x9CE3, 0x6EC0, 0x9CE4, 0x6EC1, 0xB3FC, 0x6EC2, 0xE4E8, + 0x6EC3, 0x9CE5, 0x6EC4, 0x9CE6, 0x6EC5, 0x9CE7, 0x6EC6, 0x9CE8, + 0x6EC7, 0xB5E1, 0x6EC8, 0x9CE9, 0x6EC9, 0x9CEA, 0x6ECA, 0x9CEB, + 0x6ECB, 0xD7CC, 0x6ECC, 0x9CEC, 0x6ECD, 0x9CED, 0x6ECE, 0x9CEE, + 0x6ECF, 0xE4E6, 0x6ED0, 0x9CEF, 0x6ED1, 0xBBAC, 0x6ED2, 0x9CF0, + 0x6ED3, 0xD7D2, 0x6ED4, 0xCCCF, 0x6ED5, 0xEBF8, 0x6ED6, 0x9CF1, + 0x6ED7, 0xE4E4, 0x6ED8, 0x9CF2, 0x6ED9, 0x9CF3, 0x6EDA, 0xB9F6, + 0x6EDB, 0x9CF4, 0x6EDC, 0x9CF5, 0x6EDD, 0x9CF6, 0x6EDE, 0xD6CD, + 0x6EDF, 0xE4D9, 0x6EE0, 0xE4DC, 0x6EE1, 0xC2FA, 0x6EE2, 0xE4DE, + 0x6EE3, 0x9CF7, 0x6EE4, 0xC2CB, 0x6EE5, 0xC0C4, 0x6EE6, 0xC2D0, + 0x6EE7, 0x9CF8, 0x6EE8, 0xB1F5, 0x6EE9, 0xCCB2, 0x6EEA, 0x9CF9, + 0x6EEB, 0x9CFA, 0x6EEC, 0x9CFB, 0x6EED, 0x9CFC, 0x6EEE, 0x9CFD, + 0x6EEF, 0x9CFE, 0x6EF0, 0x9D40, 0x6EF1, 0x9D41, 0x6EF2, 0x9D42, + 0x6EF3, 0x9D43, 0x6EF4, 0xB5CE, 0x6EF5, 0x9D44, 0x6EF6, 0x9D45, + 0x6EF7, 0x9D46, 0x6EF8, 0x9D47, 0x6EF9, 0xE4EF, 0x6EFA, 0x9D48, + 0x6EFB, 0x9D49, 0x6EFC, 0x9D4A, 0x6EFD, 0x9D4B, 0x6EFE, 0x9D4C, + 0x6EFF, 0x9D4D, 0x6F00, 0x9D4E, 0x6F01, 0x9D4F, 0x6F02, 0xC6AF, + 0x6F03, 0x9D50, 0x6F04, 0x9D51, 0x6F05, 0x9D52, 0x6F06, 0xC6E1, + 0x6F07, 0x9D53, 0x6F08, 0x9D54, 0x6F09, 0xE4F5, 0x6F0A, 0x9D55, + 0x6F0B, 0x9D56, 0x6F0C, 0x9D57, 0x6F0D, 0x9D58, 0x6F0E, 0x9D59, + 0x6F0F, 0xC2A9, 0x6F10, 0x9D5A, 0x6F11, 0x9D5B, 0x6F12, 0x9D5C, + 0x6F13, 0xC0EC, 0x6F14, 0xD1DD, 0x6F15, 0xE4EE, 0x6F16, 0x9D5D, + 0x6F17, 0x9D5E, 0x6F18, 0x9D5F, 0x6F19, 0x9D60, 0x6F1A, 0x9D61, + 0x6F1B, 0x9D62, 0x6F1C, 0x9D63, 0x6F1D, 0x9D64, 0x6F1E, 0x9D65, + 0x6F1F, 0x9D66, 0x6F20, 0xC4AE, 0x6F21, 0x9D67, 0x6F22, 0x9D68, + 0x6F23, 0x9D69, 0x6F24, 0xE4ED, 0x6F25, 0x9D6A, 0x6F26, 0x9D6B, + 0x6F27, 0x9D6C, 0x6F28, 0x9D6D, 0x6F29, 0xE4F6, 0x6F2A, 0xE4F4, + 0x6F2B, 0xC2FE, 0x6F2C, 0x9D6E, 0x6F2D, 0xE4DD, 0x6F2E, 0x9D6F, + 0x6F2F, 0xE4F0, 0x6F30, 0x9D70, 0x6F31, 0xCAFE, 0x6F32, 0x9D71, + 0x6F33, 0xD5C4, 0x6F34, 0x9D72, 0x6F35, 0x9D73, 0x6F36, 0xE4F1, + 0x6F37, 0x9D74, 0x6F38, 0x9D75, 0x6F39, 0x9D76, 0x6F3A, 0x9D77, + 0x6F3B, 0x9D78, 0x6F3C, 0x9D79, 0x6F3D, 0x9D7A, 0x6F3E, 0xD1FA, + 0x6F3F, 0x9D7B, 0x6F40, 0x9D7C, 0x6F41, 0x9D7D, 0x6F42, 0x9D7E, + 0x6F43, 0x9D80, 0x6F44, 0x9D81, 0x6F45, 0x9D82, 0x6F46, 0xE4EB, + 0x6F47, 0xE4EC, 0x6F48, 0x9D83, 0x6F49, 0x9D84, 0x6F4A, 0x9D85, + 0x6F4B, 0xE4F2, 0x6F4C, 0x9D86, 0x6F4D, 0xCEAB, 0x6F4E, 0x9D87, + 0x6F4F, 0x9D88, 0x6F50, 0x9D89, 0x6F51, 0x9D8A, 0x6F52, 0x9D8B, + 0x6F53, 0x9D8C, 0x6F54, 0x9D8D, 0x6F55, 0x9D8E, 0x6F56, 0x9D8F, + 0x6F57, 0x9D90, 0x6F58, 0xC5CB, 0x6F59, 0x9D91, 0x6F5A, 0x9D92, + 0x6F5B, 0x9D93, 0x6F5C, 0xC7B1, 0x6F5D, 0x9D94, 0x6F5E, 0xC2BA, + 0x6F5F, 0x9D95, 0x6F60, 0x9D96, 0x6F61, 0x9D97, 0x6F62, 0xE4EA, + 0x6F63, 0x9D98, 0x6F64, 0x9D99, 0x6F65, 0x9D9A, 0x6F66, 0xC1CA, + 0x6F67, 0x9D9B, 0x6F68, 0x9D9C, 0x6F69, 0x9D9D, 0x6F6A, 0x9D9E, + 0x6F6B, 0x9D9F, 0x6F6C, 0x9DA0, 0x6F6D, 0xCCB6, 0x6F6E, 0xB3B1, + 0x6F6F, 0x9DA1, 0x6F70, 0x9DA2, 0x6F71, 0x9DA3, 0x6F72, 0xE4FB, + 0x6F73, 0x9DA4, 0x6F74, 0xE4F3, 0x6F75, 0x9DA5, 0x6F76, 0x9DA6, + 0x6F77, 0x9DA7, 0x6F78, 0xE4FA, 0x6F79, 0x9DA8, 0x6F7A, 0xE4FD, + 0x6F7B, 0x9DA9, 0x6F7C, 0xE4FC, 0x6F7D, 0x9DAA, 0x6F7E, 0x9DAB, + 0x6F7F, 0x9DAC, 0x6F80, 0x9DAD, 0x6F81, 0x9DAE, 0x6F82, 0x9DAF, + 0x6F83, 0x9DB0, 0x6F84, 0xB3CE, 0x6F85, 0x9DB1, 0x6F86, 0x9DB2, + 0x6F87, 0x9DB3, 0x6F88, 0xB3BA, 0x6F89, 0xE4F7, 0x6F8A, 0x9DB4, + 0x6F8B, 0x9DB5, 0x6F8C, 0xE4F9, 0x6F8D, 0xE4F8, 0x6F8E, 0xC5EC, + 0x6F8F, 0x9DB6, 0x6F90, 0x9DB7, 0x6F91, 0x9DB8, 0x6F92, 0x9DB9, + 0x6F93, 0x9DBA, 0x6F94, 0x9DBB, 0x6F95, 0x9DBC, 0x6F96, 0x9DBD, + 0x6F97, 0x9DBE, 0x6F98, 0x9DBF, 0x6F99, 0x9DC0, 0x6F9A, 0x9DC1, + 0x6F9B, 0x9DC2, 0x6F9C, 0xC0BD, 0x6F9D, 0x9DC3, 0x6F9E, 0x9DC4, + 0x6F9F, 0x9DC5, 0x6FA0, 0x9DC6, 0x6FA1, 0xD4E8, 0x6FA2, 0x9DC7, + 0x6FA3, 0x9DC8, 0x6FA4, 0x9DC9, 0x6FA5, 0x9DCA, 0x6FA6, 0x9DCB, + 0x6FA7, 0xE5A2, 0x6FA8, 0x9DCC, 0x6FA9, 0x9DCD, 0x6FAA, 0x9DCE, + 0x6FAB, 0x9DCF, 0x6FAC, 0x9DD0, 0x6FAD, 0x9DD1, 0x6FAE, 0x9DD2, + 0x6FAF, 0x9DD3, 0x6FB0, 0x9DD4, 0x6FB1, 0x9DD5, 0x6FB2, 0x9DD6, + 0x6FB3, 0xB0C4, 0x6FB4, 0x9DD7, 0x6FB5, 0x9DD8, 0x6FB6, 0xE5A4, + 0x6FB7, 0x9DD9, 0x6FB8, 0x9DDA, 0x6FB9, 0xE5A3, 0x6FBA, 0x9DDB, + 0x6FBB, 0x9DDC, 0x6FBC, 0x9DDD, 0x6FBD, 0x9DDE, 0x6FBE, 0x9DDF, + 0x6FBF, 0x9DE0, 0x6FC0, 0xBCA4, 0x6FC1, 0x9DE1, 0x6FC2, 0xE5A5, + 0x6FC3, 0x9DE2, 0x6FC4, 0x9DE3, 0x6FC5, 0x9DE4, 0x6FC6, 0x9DE5, + 0x6FC7, 0x9DE6, 0x6FC8, 0x9DE7, 0x6FC9, 0xE5A1, 0x6FCA, 0x9DE8, + 0x6FCB, 0x9DE9, 0x6FCC, 0x9DEA, 0x6FCD, 0x9DEB, 0x6FCE, 0x9DEC, + 0x6FCF, 0x9DED, 0x6FD0, 0x9DEE, 0x6FD1, 0xE4FE, 0x6FD2, 0xB1F4, + 0x6FD3, 0x9DEF, 0x6FD4, 0x9DF0, 0x6FD5, 0x9DF1, 0x6FD6, 0x9DF2, + 0x6FD7, 0x9DF3, 0x6FD8, 0x9DF4, 0x6FD9, 0x9DF5, 0x6FDA, 0x9DF6, + 0x6FDB, 0x9DF7, 0x6FDC, 0x9DF8, 0x6FDD, 0x9DF9, 0x6FDE, 0xE5A8, + 0x6FDF, 0x9DFA, 0x6FE0, 0xE5A9, 0x6FE1, 0xE5A6, 0x6FE2, 0x9DFB, + 0x6FE3, 0x9DFC, 0x6FE4, 0x9DFD, 0x6FE5, 0x9DFE, 0x6FE6, 0x9E40, + 0x6FE7, 0x9E41, 0x6FE8, 0x9E42, 0x6FE9, 0x9E43, 0x6FEA, 0x9E44, + 0x6FEB, 0x9E45, 0x6FEC, 0x9E46, 0x6FED, 0x9E47, 0x6FEE, 0xE5A7, + 0x6FEF, 0xE5AA, 0x6FF0, 0x9E48, 0x6FF1, 0x9E49, 0x6FF2, 0x9E4A, + 0x6FF3, 0x9E4B, 0x6FF4, 0x9E4C, 0x6FF5, 0x9E4D, 0x6FF6, 0x9E4E, + 0x6FF7, 0x9E4F, 0x6FF8, 0x9E50, 0x6FF9, 0x9E51, 0x6FFA, 0x9E52, + 0x6FFB, 0x9E53, 0x6FFC, 0x9E54, 0x6FFD, 0x9E55, 0x6FFE, 0x9E56, + 0x6FFF, 0x9E57, 0x7000, 0x9E58, 0x7001, 0x9E59, 0x7002, 0x9E5A, + 0x7003, 0x9E5B, 0x7004, 0x9E5C, 0x7005, 0x9E5D, 0x7006, 0x9E5E, + 0x7007, 0x9E5F, 0x7008, 0x9E60, 0x7009, 0x9E61, 0x700A, 0x9E62, + 0x700B, 0x9E63, 0x700C, 0x9E64, 0x700D, 0x9E65, 0x700E, 0x9E66, + 0x700F, 0x9E67, 0x7010, 0x9E68, 0x7011, 0xC6D9, 0x7012, 0x9E69, + 0x7013, 0x9E6A, 0x7014, 0x9E6B, 0x7015, 0x9E6C, 0x7016, 0x9E6D, + 0x7017, 0x9E6E, 0x7018, 0x9E6F, 0x7019, 0x9E70, 0x701A, 0xE5AB, + 0x701B, 0xE5AD, 0x701C, 0x9E71, 0x701D, 0x9E72, 0x701E, 0x9E73, + 0x701F, 0x9E74, 0x7020, 0x9E75, 0x7021, 0x9E76, 0x7022, 0x9E77, + 0x7023, 0xE5AC, 0x7024, 0x9E78, 0x7025, 0x9E79, 0x7026, 0x9E7A, + 0x7027, 0x9E7B, 0x7028, 0x9E7C, 0x7029, 0x9E7D, 0x702A, 0x9E7E, + 0x702B, 0x9E80, 0x702C, 0x9E81, 0x702D, 0x9E82, 0x702E, 0x9E83, + 0x702F, 0x9E84, 0x7030, 0x9E85, 0x7031, 0x9E86, 0x7032, 0x9E87, + 0x7033, 0x9E88, 0x7034, 0x9E89, 0x7035, 0xE5AF, 0x7036, 0x9E8A, + 0x7037, 0x9E8B, 0x7038, 0x9E8C, 0x7039, 0xE5AE, 0x703A, 0x9E8D, + 0x703B, 0x9E8E, 0x703C, 0x9E8F, 0x703D, 0x9E90, 0x703E, 0x9E91, + 0x703F, 0x9E92, 0x7040, 0x9E93, 0x7041, 0x9E94, 0x7042, 0x9E95, + 0x7043, 0x9E96, 0x7044, 0x9E97, 0x7045, 0x9E98, 0x7046, 0x9E99, + 0x7047, 0x9E9A, 0x7048, 0x9E9B, 0x7049, 0x9E9C, 0x704A, 0x9E9D, + 0x704B, 0x9E9E, 0x704C, 0xB9E0, 0x704D, 0x9E9F, 0x704E, 0x9EA0, + 0x704F, 0xE5B0, 0x7050, 0x9EA1, 0x7051, 0x9EA2, 0x7052, 0x9EA3, + 0x7053, 0x9EA4, 0x7054, 0x9EA5, 0x7055, 0x9EA6, 0x7056, 0x9EA7, + 0x7057, 0x9EA8, 0x7058, 0x9EA9, 0x7059, 0x9EAA, 0x705A, 0x9EAB, + 0x705B, 0x9EAC, 0x705C, 0x9EAD, 0x705D, 0x9EAE, 0x705E, 0xE5B1, + 0x705F, 0x9EAF, 0x7060, 0x9EB0, 0x7061, 0x9EB1, 0x7062, 0x9EB2, + 0x7063, 0x9EB3, 0x7064, 0x9EB4, 0x7065, 0x9EB5, 0x7066, 0x9EB6, + 0x7067, 0x9EB7, 0x7068, 0x9EB8, 0x7069, 0x9EB9, 0x706A, 0x9EBA, + 0x706B, 0xBBF0, 0x706C, 0xECE1, 0x706D, 0xC3F0, 0x706E, 0x9EBB, + 0x706F, 0xB5C6, 0x7070, 0xBBD2, 0x7071, 0x9EBC, 0x7072, 0x9EBD, + 0x7073, 0x9EBE, 0x7074, 0x9EBF, 0x7075, 0xC1E9, 0x7076, 0xD4EE, + 0x7077, 0x9EC0, 0x7078, 0xBEC4, 0x7079, 0x9EC1, 0x707A, 0x9EC2, + 0x707B, 0x9EC3, 0x707C, 0xD7C6, 0x707D, 0x9EC4, 0x707E, 0xD4D6, + 0x707F, 0xB2D3, 0x7080, 0xECBE, 0x7081, 0x9EC5, 0x7082, 0x9EC6, + 0x7083, 0x9EC7, 0x7084, 0x9EC8, 0x7085, 0xEAC1, 0x7086, 0x9EC9, + 0x7087, 0x9ECA, 0x7088, 0x9ECB, 0x7089, 0xC2AF, 0x708A, 0xB4B6, + 0x708B, 0x9ECC, 0x708C, 0x9ECD, 0x708D, 0x9ECE, 0x708E, 0xD1D7, + 0x708F, 0x9ECF, 0x7090, 0x9ED0, 0x7091, 0x9ED1, 0x7092, 0xB3B4, + 0x7093, 0x9ED2, 0x7094, 0xC8B2, 0x7095, 0xBFBB, 0x7096, 0xECC0, + 0x7097, 0x9ED3, 0x7098, 0x9ED4, 0x7099, 0xD6CB, 0x709A, 0x9ED5, + 0x709B, 0x9ED6, 0x709C, 0xECBF, 0x709D, 0xECC1, 0x709E, 0x9ED7, + 0x709F, 0x9ED8, 0x70A0, 0x9ED9, 0x70A1, 0x9EDA, 0x70A2, 0x9EDB, + 0x70A3, 0x9EDC, 0x70A4, 0x9EDD, 0x70A5, 0x9EDE, 0x70A6, 0x9EDF, + 0x70A7, 0x9EE0, 0x70A8, 0x9EE1, 0x70A9, 0x9EE2, 0x70AA, 0x9EE3, + 0x70AB, 0xECC5, 0x70AC, 0xBEE6, 0x70AD, 0xCCBF, 0x70AE, 0xC5DA, + 0x70AF, 0xBEBC, 0x70B0, 0x9EE4, 0x70B1, 0xECC6, 0x70B2, 0x9EE5, + 0x70B3, 0xB1FE, 0x70B4, 0x9EE6, 0x70B5, 0x9EE7, 0x70B6, 0x9EE8, + 0x70B7, 0xECC4, 0x70B8, 0xD5A8, 0x70B9, 0xB5E3, 0x70BA, 0x9EE9, + 0x70BB, 0xECC2, 0x70BC, 0xC1B6, 0x70BD, 0xB3E3, 0x70BE, 0x9EEA, + 0x70BF, 0x9EEB, 0x70C0, 0xECC3, 0x70C1, 0xCBB8, 0x70C2, 0xC0C3, + 0x70C3, 0xCCFE, 0x70C4, 0x9EEC, 0x70C5, 0x9EED, 0x70C6, 0x9EEE, + 0x70C7, 0x9EEF, 0x70C8, 0xC1D2, 0x70C9, 0x9EF0, 0x70CA, 0xECC8, + 0x70CB, 0x9EF1, 0x70CC, 0x9EF2, 0x70CD, 0x9EF3, 0x70CE, 0x9EF4, + 0x70CF, 0x9EF5, 0x70D0, 0x9EF6, 0x70D1, 0x9EF7, 0x70D2, 0x9EF8, + 0x70D3, 0x9EF9, 0x70D4, 0x9EFA, 0x70D5, 0x9EFB, 0x70D6, 0x9EFC, + 0x70D7, 0x9EFD, 0x70D8, 0xBAE6, 0x70D9, 0xC0D3, 0x70DA, 0x9EFE, + 0x70DB, 0xD6F2, 0x70DC, 0x9F40, 0x70DD, 0x9F41, 0x70DE, 0x9F42, + 0x70DF, 0xD1CC, 0x70E0, 0x9F43, 0x70E1, 0x9F44, 0x70E2, 0x9F45, + 0x70E3, 0x9F46, 0x70E4, 0xBFBE, 0x70E5, 0x9F47, 0x70E6, 0xB7B3, + 0x70E7, 0xC9D5, 0x70E8, 0xECC7, 0x70E9, 0xBBE2, 0x70EA, 0x9F48, + 0x70EB, 0xCCCC, 0x70EC, 0xBDFD, 0x70ED, 0xC8C8, 0x70EE, 0x9F49, + 0x70EF, 0xCFA9, 0x70F0, 0x9F4A, 0x70F1, 0x9F4B, 0x70F2, 0x9F4C, + 0x70F3, 0x9F4D, 0x70F4, 0x9F4E, 0x70F5, 0x9F4F, 0x70F6, 0x9F50, + 0x70F7, 0xCDE9, 0x70F8, 0x9F51, 0x70F9, 0xC5EB, 0x70FA, 0x9F52, + 0x70FB, 0x9F53, 0x70FC, 0x9F54, 0x70FD, 0xB7E9, 0x70FE, 0x9F55, + 0x70FF, 0x9F56, 0x7100, 0x9F57, 0x7101, 0x9F58, 0x7102, 0x9F59, + 0x7103, 0x9F5A, 0x7104, 0x9F5B, 0x7105, 0x9F5C, 0x7106, 0x9F5D, + 0x7107, 0x9F5E, 0x7108, 0x9F5F, 0x7109, 0xD1C9, 0x710A, 0xBAB8, + 0x710B, 0x9F60, 0x710C, 0x9F61, 0x710D, 0x9F62, 0x710E, 0x9F63, + 0x710F, 0x9F64, 0x7110, 0xECC9, 0x7111, 0x9F65, 0x7112, 0x9F66, + 0x7113, 0xECCA, 0x7114, 0x9F67, 0x7115, 0xBBC0, 0x7116, 0xECCB, + 0x7117, 0x9F68, 0x7118, 0xECE2, 0x7119, 0xB1BA, 0x711A, 0xB7D9, + 0x711B, 0x9F69, 0x711C, 0x9F6A, 0x711D, 0x9F6B, 0x711E, 0x9F6C, + 0x711F, 0x9F6D, 0x7120, 0x9F6E, 0x7121, 0x9F6F, 0x7122, 0x9F70, + 0x7123, 0x9F71, 0x7124, 0x9F72, 0x7125, 0x9F73, 0x7126, 0xBDB9, + 0x7127, 0x9F74, 0x7128, 0x9F75, 0x7129, 0x9F76, 0x712A, 0x9F77, + 0x712B, 0x9F78, 0x712C, 0x9F79, 0x712D, 0x9F7A, 0x712E, 0x9F7B, + 0x712F, 0xECCC, 0x7130, 0xD1E6, 0x7131, 0xECCD, 0x7132, 0x9F7C, + 0x7133, 0x9F7D, 0x7134, 0x9F7E, 0x7135, 0x9F80, 0x7136, 0xC8BB, + 0x7137, 0x9F81, 0x7138, 0x9F82, 0x7139, 0x9F83, 0x713A, 0x9F84, + 0x713B, 0x9F85, 0x713C, 0x9F86, 0x713D, 0x9F87, 0x713E, 0x9F88, + 0x713F, 0x9F89, 0x7140, 0x9F8A, 0x7141, 0x9F8B, 0x7142, 0x9F8C, + 0x7143, 0x9F8D, 0x7144, 0x9F8E, 0x7145, 0xECD1, 0x7146, 0x9F8F, + 0x7147, 0x9F90, 0x7148, 0x9F91, 0x7149, 0x9F92, 0x714A, 0xECD3, + 0x714B, 0x9F93, 0x714C, 0xBBCD, 0x714D, 0x9F94, 0x714E, 0xBCE5, + 0x714F, 0x9F95, 0x7150, 0x9F96, 0x7151, 0x9F97, 0x7152, 0x9F98, + 0x7153, 0x9F99, 0x7154, 0x9F9A, 0x7155, 0x9F9B, 0x7156, 0x9F9C, + 0x7157, 0x9F9D, 0x7158, 0x9F9E, 0x7159, 0x9F9F, 0x715A, 0x9FA0, + 0x715B, 0x9FA1, 0x715C, 0xECCF, 0x715D, 0x9FA2, 0x715E, 0xC9B7, + 0x715F, 0x9FA3, 0x7160, 0x9FA4, 0x7161, 0x9FA5, 0x7162, 0x9FA6, + 0x7163, 0x9FA7, 0x7164, 0xC3BA, 0x7165, 0x9FA8, 0x7166, 0xECE3, + 0x7167, 0xD5D5, 0x7168, 0xECD0, 0x7169, 0x9FA9, 0x716A, 0x9FAA, + 0x716B, 0x9FAB, 0x716C, 0x9FAC, 0x716D, 0x9FAD, 0x716E, 0xD6F3, + 0x716F, 0x9FAE, 0x7170, 0x9FAF, 0x7171, 0x9FB0, 0x7172, 0xECD2, + 0x7173, 0xECCE, 0x7174, 0x9FB1, 0x7175, 0x9FB2, 0x7176, 0x9FB3, + 0x7177, 0x9FB4, 0x7178, 0xECD4, 0x7179, 0x9FB5, 0x717A, 0xECD5, + 0x717B, 0x9FB6, 0x717C, 0x9FB7, 0x717D, 0xC9BF, 0x717E, 0x9FB8, + 0x717F, 0x9FB9, 0x7180, 0x9FBA, 0x7181, 0x9FBB, 0x7182, 0x9FBC, + 0x7183, 0x9FBD, 0x7184, 0xCFA8, 0x7185, 0x9FBE, 0x7186, 0x9FBF, + 0x7187, 0x9FC0, 0x7188, 0x9FC1, 0x7189, 0x9FC2, 0x718A, 0xD0DC, + 0x718B, 0x9FC3, 0x718C, 0x9FC4, 0x718D, 0x9FC5, 0x718E, 0x9FC6, + 0x718F, 0xD1AC, 0x7190, 0x9FC7, 0x7191, 0x9FC8, 0x7192, 0x9FC9, + 0x7193, 0x9FCA, 0x7194, 0xC8DB, 0x7195, 0x9FCB, 0x7196, 0x9FCC, + 0x7197, 0x9FCD, 0x7198, 0xECD6, 0x7199, 0xCEF5, 0x719A, 0x9FCE, + 0x719B, 0x9FCF, 0x719C, 0x9FD0, 0x719D, 0x9FD1, 0x719E, 0x9FD2, + 0x719F, 0xCAEC, 0x71A0, 0xECDA, 0x71A1, 0x9FD3, 0x71A2, 0x9FD4, + 0x71A3, 0x9FD5, 0x71A4, 0x9FD6, 0x71A5, 0x9FD7, 0x71A6, 0x9FD8, + 0x71A7, 0x9FD9, 0x71A8, 0xECD9, 0x71A9, 0x9FDA, 0x71AA, 0x9FDB, + 0x71AB, 0x9FDC, 0x71AC, 0xB0BE, 0x71AD, 0x9FDD, 0x71AE, 0x9FDE, + 0x71AF, 0x9FDF, 0x71B0, 0x9FE0, 0x71B1, 0x9FE1, 0x71B2, 0x9FE2, + 0x71B3, 0xECD7, 0x71B4, 0x9FE3, 0x71B5, 0xECD8, 0x71B6, 0x9FE4, + 0x71B7, 0x9FE5, 0x71B8, 0x9FE6, 0x71B9, 0xECE4, 0x71BA, 0x9FE7, + 0x71BB, 0x9FE8, 0x71BC, 0x9FE9, 0x71BD, 0x9FEA, 0x71BE, 0x9FEB, + 0x71BF, 0x9FEC, 0x71C0, 0x9FED, 0x71C1, 0x9FEE, 0x71C2, 0x9FEF, + 0x71C3, 0xC8BC, 0x71C4, 0x9FF0, 0x71C5, 0x9FF1, 0x71C6, 0x9FF2, + 0x71C7, 0x9FF3, 0x71C8, 0x9FF4, 0x71C9, 0x9FF5, 0x71CA, 0x9FF6, + 0x71CB, 0x9FF7, 0x71CC, 0x9FF8, 0x71CD, 0x9FF9, 0x71CE, 0xC1C7, + 0x71CF, 0x9FFA, 0x71D0, 0x9FFB, 0x71D1, 0x9FFC, 0x71D2, 0x9FFD, + 0x71D3, 0x9FFE, 0x71D4, 0xECDC, 0x71D5, 0xD1E0, 0x71D6, 0xA040, + 0x71D7, 0xA041, 0x71D8, 0xA042, 0x71D9, 0xA043, 0x71DA, 0xA044, + 0x71DB, 0xA045, 0x71DC, 0xA046, 0x71DD, 0xA047, 0x71DE, 0xA048, + 0x71DF, 0xA049, 0x71E0, 0xECDB, 0x71E1, 0xA04A, 0x71E2, 0xA04B, + 0x71E3, 0xA04C, 0x71E4, 0xA04D, 0x71E5, 0xD4EF, 0x71E6, 0xA04E, + 0x71E7, 0xECDD, 0x71E8, 0xA04F, 0x71E9, 0xA050, 0x71EA, 0xA051, + 0x71EB, 0xA052, 0x71EC, 0xA053, 0x71ED, 0xA054, 0x71EE, 0xDBC6, + 0x71EF, 0xA055, 0x71F0, 0xA056, 0x71F1, 0xA057, 0x71F2, 0xA058, + 0x71F3, 0xA059, 0x71F4, 0xA05A, 0x71F5, 0xA05B, 0x71F6, 0xA05C, + 0x71F7, 0xA05D, 0x71F8, 0xA05E, 0x71F9, 0xECDE, 0x71FA, 0xA05F, + 0x71FB, 0xA060, 0x71FC, 0xA061, 0x71FD, 0xA062, 0x71FE, 0xA063, + 0x71FF, 0xA064, 0x7200, 0xA065, 0x7201, 0xA066, 0x7202, 0xA067, + 0x7203, 0xA068, 0x7204, 0xA069, 0x7205, 0xA06A, 0x7206, 0xB1AC, + 0x7207, 0xA06B, 0x7208, 0xA06C, 0x7209, 0xA06D, 0x720A, 0xA06E, + 0x720B, 0xA06F, 0x720C, 0xA070, 0x720D, 0xA071, 0x720E, 0xA072, + 0x720F, 0xA073, 0x7210, 0xA074, 0x7211, 0xA075, 0x7212, 0xA076, + 0x7213, 0xA077, 0x7214, 0xA078, 0x7215, 0xA079, 0x7216, 0xA07A, + 0x7217, 0xA07B, 0x7218, 0xA07C, 0x7219, 0xA07D, 0x721A, 0xA07E, + 0x721B, 0xA080, 0x721C, 0xA081, 0x721D, 0xECDF, 0x721E, 0xA082, + 0x721F, 0xA083, 0x7220, 0xA084, 0x7221, 0xA085, 0x7222, 0xA086, + 0x7223, 0xA087, 0x7224, 0xA088, 0x7225, 0xA089, 0x7226, 0xA08A, + 0x7227, 0xA08B, 0x7228, 0xECE0, 0x7229, 0xA08C, 0x722A, 0xD7A6, + 0x722B, 0xA08D, 0x722C, 0xC5C0, 0x722D, 0xA08E, 0x722E, 0xA08F, + 0x722F, 0xA090, 0x7230, 0xEBBC, 0x7231, 0xB0AE, 0x7232, 0xA091, + 0x7233, 0xA092, 0x7234, 0xA093, 0x7235, 0xBEF4, 0x7236, 0xB8B8, + 0x7237, 0xD2AF, 0x7238, 0xB0D6, 0x7239, 0xB5F9, 0x723A, 0xA094, + 0x723B, 0xD8B3, 0x723C, 0xA095, 0x723D, 0xCBAC, 0x723E, 0xA096, + 0x723F, 0xE3DD, 0x7240, 0xA097, 0x7241, 0xA098, 0x7242, 0xA099, + 0x7243, 0xA09A, 0x7244, 0xA09B, 0x7245, 0xA09C, 0x7246, 0xA09D, + 0x7247, 0xC6AC, 0x7248, 0xB0E6, 0x7249, 0xA09E, 0x724A, 0xA09F, + 0x724B, 0xA0A0, 0x724C, 0xC5C6, 0x724D, 0xEBB9, 0x724E, 0xA0A1, + 0x724F, 0xA0A2, 0x7250, 0xA0A3, 0x7251, 0xA0A4, 0x7252, 0xEBBA, + 0x7253, 0xA0A5, 0x7254, 0xA0A6, 0x7255, 0xA0A7, 0x7256, 0xEBBB, + 0x7257, 0xA0A8, 0x7258, 0xA0A9, 0x7259, 0xD1C0, 0x725A, 0xA0AA, + 0x725B, 0xC5A3, 0x725C, 0xA0AB, 0x725D, 0xEAF2, 0x725E, 0xA0AC, + 0x725F, 0xC4B2, 0x7260, 0xA0AD, 0x7261, 0xC4B5, 0x7262, 0xC0CE, + 0x7263, 0xA0AE, 0x7264, 0xA0AF, 0x7265, 0xA0B0, 0x7266, 0xEAF3, + 0x7267, 0xC4C1, 0x7268, 0xA0B1, 0x7269, 0xCEEF, 0x726A, 0xA0B2, + 0x726B, 0xA0B3, 0x726C, 0xA0B4, 0x726D, 0xA0B5, 0x726E, 0xEAF0, + 0x726F, 0xEAF4, 0x7270, 0xA0B6, 0x7271, 0xA0B7, 0x7272, 0xC9FC, + 0x7273, 0xA0B8, 0x7274, 0xA0B9, 0x7275, 0xC7A3, 0x7276, 0xA0BA, + 0x7277, 0xA0BB, 0x7278, 0xA0BC, 0x7279, 0xCCD8, 0x727A, 0xCEFE, + 0x727B, 0xA0BD, 0x727C, 0xA0BE, 0x727D, 0xA0BF, 0x727E, 0xEAF5, + 0x727F, 0xEAF6, 0x7280, 0xCFAC, 0x7281, 0xC0E7, 0x7282, 0xA0C0, + 0x7283, 0xA0C1, 0x7284, 0xEAF7, 0x7285, 0xA0C2, 0x7286, 0xA0C3, + 0x7287, 0xA0C4, 0x7288, 0xA0C5, 0x7289, 0xA0C6, 0x728A, 0xB6BF, + 0x728B, 0xEAF8, 0x728C, 0xA0C7, 0x728D, 0xEAF9, 0x728E, 0xA0C8, + 0x728F, 0xEAFA, 0x7290, 0xA0C9, 0x7291, 0xA0CA, 0x7292, 0xEAFB, + 0x7293, 0xA0CB, 0x7294, 0xA0CC, 0x7295, 0xA0CD, 0x7296, 0xA0CE, + 0x7297, 0xA0CF, 0x7298, 0xA0D0, 0x7299, 0xA0D1, 0x729A, 0xA0D2, + 0x729B, 0xA0D3, 0x729C, 0xA0D4, 0x729D, 0xA0D5, 0x729E, 0xA0D6, + 0x729F, 0xEAF1, 0x72A0, 0xA0D7, 0x72A1, 0xA0D8, 0x72A2, 0xA0D9, + 0x72A3, 0xA0DA, 0x72A4, 0xA0DB, 0x72A5, 0xA0DC, 0x72A6, 0xA0DD, + 0x72A7, 0xA0DE, 0x72A8, 0xA0DF, 0x72A9, 0xA0E0, 0x72AA, 0xA0E1, + 0x72AB, 0xA0E2, 0x72AC, 0xC8AE, 0x72AD, 0xE1EB, 0x72AE, 0xA0E3, + 0x72AF, 0xB7B8, 0x72B0, 0xE1EC, 0x72B1, 0xA0E4, 0x72B2, 0xA0E5, + 0x72B3, 0xA0E6, 0x72B4, 0xE1ED, 0x72B5, 0xA0E7, 0x72B6, 0xD7B4, + 0x72B7, 0xE1EE, 0x72B8, 0xE1EF, 0x72B9, 0xD3CC, 0x72BA, 0xA0E8, + 0x72BB, 0xA0E9, 0x72BC, 0xA0EA, 0x72BD, 0xA0EB, 0x72BE, 0xA0EC, + 0x72BF, 0xA0ED, 0x72C0, 0xA0EE, 0x72C1, 0xE1F1, 0x72C2, 0xBFF1, + 0x72C3, 0xE1F0, 0x72C4, 0xB5D2, 0x72C5, 0xA0EF, 0x72C6, 0xA0F0, + 0x72C7, 0xA0F1, 0x72C8, 0xB1B7, 0x72C9, 0xA0F2, 0x72CA, 0xA0F3, + 0x72CB, 0xA0F4, 0x72CC, 0xA0F5, 0x72CD, 0xE1F3, 0x72CE, 0xE1F2, + 0x72CF, 0xA0F6, 0x72D0, 0xBAFC, 0x72D1, 0xA0F7, 0x72D2, 0xE1F4, + 0x72D3, 0xA0F8, 0x72D4, 0xA0F9, 0x72D5, 0xA0FA, 0x72D6, 0xA0FB, + 0x72D7, 0xB9B7, 0x72D8, 0xA0FC, 0x72D9, 0xBED1, 0x72DA, 0xA0FD, + 0x72DB, 0xA0FE, 0x72DC, 0xAA40, 0x72DD, 0xAA41, 0x72DE, 0xC4FC, + 0x72DF, 0xAA42, 0x72E0, 0xBADD, 0x72E1, 0xBDC6, 0x72E2, 0xAA43, + 0x72E3, 0xAA44, 0x72E4, 0xAA45, 0x72E5, 0xAA46, 0x72E6, 0xAA47, + 0x72E7, 0xAA48, 0x72E8, 0xE1F5, 0x72E9, 0xE1F7, 0x72EA, 0xAA49, + 0x72EB, 0xAA4A, 0x72EC, 0xB6C0, 0x72ED, 0xCFC1, 0x72EE, 0xCAA8, + 0x72EF, 0xE1F6, 0x72F0, 0xD5F8, 0x72F1, 0xD3FC, 0x72F2, 0xE1F8, + 0x72F3, 0xE1FC, 0x72F4, 0xE1F9, 0x72F5, 0xAA4B, 0x72F6, 0xAA4C, + 0x72F7, 0xE1FA, 0x72F8, 0xC0EA, 0x72F9, 0xAA4D, 0x72FA, 0xE1FE, + 0x72FB, 0xE2A1, 0x72FC, 0xC0C7, 0x72FD, 0xAA4E, 0x72FE, 0xAA4F, + 0x72FF, 0xAA50, 0x7300, 0xAA51, 0x7301, 0xE1FB, 0x7302, 0xAA52, + 0x7303, 0xE1FD, 0x7304, 0xAA53, 0x7305, 0xAA54, 0x7306, 0xAA55, + 0x7307, 0xAA56, 0x7308, 0xAA57, 0x7309, 0xAA58, 0x730A, 0xE2A5, + 0x730B, 0xAA59, 0x730C, 0xAA5A, 0x730D, 0xAA5B, 0x730E, 0xC1D4, + 0x730F, 0xAA5C, 0x7310, 0xAA5D, 0x7311, 0xAA5E, 0x7312, 0xAA5F, + 0x7313, 0xE2A3, 0x7314, 0xAA60, 0x7315, 0xE2A8, 0x7316, 0xB2FE, + 0x7317, 0xE2A2, 0x7318, 0xAA61, 0x7319, 0xAA62, 0x731A, 0xAA63, + 0x731B, 0xC3CD, 0x731C, 0xB2C2, 0x731D, 0xE2A7, 0x731E, 0xE2A6, + 0x731F, 0xAA64, 0x7320, 0xAA65, 0x7321, 0xE2A4, 0x7322, 0xE2A9, + 0x7323, 0xAA66, 0x7324, 0xAA67, 0x7325, 0xE2AB, 0x7326, 0xAA68, + 0x7327, 0xAA69, 0x7328, 0xAA6A, 0x7329, 0xD0C9, 0x732A, 0xD6ED, + 0x732B, 0xC3A8, 0x732C, 0xE2AC, 0x732D, 0xAA6B, 0x732E, 0xCFD7, + 0x732F, 0xAA6C, 0x7330, 0xAA6D, 0x7331, 0xE2AE, 0x7332, 0xAA6E, + 0x7333, 0xAA6F, 0x7334, 0xBAEF, 0x7335, 0xAA70, 0x7336, 0xAA71, + 0x7337, 0xE9E0, 0x7338, 0xE2AD, 0x7339, 0xE2AA, 0x733A, 0xAA72, + 0x733B, 0xAA73, 0x733C, 0xAA74, 0x733D, 0xAA75, 0x733E, 0xBBAB, + 0x733F, 0xD4B3, 0x7340, 0xAA76, 0x7341, 0xAA77, 0x7342, 0xAA78, + 0x7343, 0xAA79, 0x7344, 0xAA7A, 0x7345, 0xAA7B, 0x7346, 0xAA7C, + 0x7347, 0xAA7D, 0x7348, 0xAA7E, 0x7349, 0xAA80, 0x734A, 0xAA81, + 0x734B, 0xAA82, 0x734C, 0xAA83, 0x734D, 0xE2B0, 0x734E, 0xAA84, + 0x734F, 0xAA85, 0x7350, 0xE2AF, 0x7351, 0xAA86, 0x7352, 0xE9E1, + 0x7353, 0xAA87, 0x7354, 0xAA88, 0x7355, 0xAA89, 0x7356, 0xAA8A, + 0x7357, 0xE2B1, 0x7358, 0xAA8B, 0x7359, 0xAA8C, 0x735A, 0xAA8D, + 0x735B, 0xAA8E, 0x735C, 0xAA8F, 0x735D, 0xAA90, 0x735E, 0xAA91, + 0x735F, 0xAA92, 0x7360, 0xE2B2, 0x7361, 0xAA93, 0x7362, 0xAA94, + 0x7363, 0xAA95, 0x7364, 0xAA96, 0x7365, 0xAA97, 0x7366, 0xAA98, + 0x7367, 0xAA99, 0x7368, 0xAA9A, 0x7369, 0xAA9B, 0x736A, 0xAA9C, + 0x736B, 0xAA9D, 0x736C, 0xE2B3, 0x736D, 0xCCA1, 0x736E, 0xAA9E, + 0x736F, 0xE2B4, 0x7370, 0xAA9F, 0x7371, 0xAAA0, 0x7372, 0xAB40, + 0x7373, 0xAB41, 0x7374, 0xAB42, 0x7375, 0xAB43, 0x7376, 0xAB44, + 0x7377, 0xAB45, 0x7378, 0xAB46, 0x7379, 0xAB47, 0x737A, 0xAB48, + 0x737B, 0xAB49, 0x737C, 0xAB4A, 0x737D, 0xAB4B, 0x737E, 0xE2B5, + 0x737F, 0xAB4C, 0x7380, 0xAB4D, 0x7381, 0xAB4E, 0x7382, 0xAB4F, + 0x7383, 0xAB50, 0x7384, 0xD0FE, 0x7385, 0xAB51, 0x7386, 0xAB52, + 0x7387, 0xC2CA, 0x7388, 0xAB53, 0x7389, 0xD3F1, 0x738A, 0xAB54, + 0x738B, 0xCDF5, 0x738C, 0xAB55, 0x738D, 0xAB56, 0x738E, 0xE7E0, + 0x738F, 0xAB57, 0x7390, 0xAB58, 0x7391, 0xE7E1, 0x7392, 0xAB59, + 0x7393, 0xAB5A, 0x7394, 0xAB5B, 0x7395, 0xAB5C, 0x7396, 0xBEC1, + 0x7397, 0xAB5D, 0x7398, 0xAB5E, 0x7399, 0xAB5F, 0x739A, 0xAB60, + 0x739B, 0xC2EA, 0x739C, 0xAB61, 0x739D, 0xAB62, 0x739E, 0xAB63, + 0x739F, 0xE7E4, 0x73A0, 0xAB64, 0x73A1, 0xAB65, 0x73A2, 0xE7E3, + 0x73A3, 0xAB66, 0x73A4, 0xAB67, 0x73A5, 0xAB68, 0x73A6, 0xAB69, + 0x73A7, 0xAB6A, 0x73A8, 0xAB6B, 0x73A9, 0xCDE6, 0x73AA, 0xAB6C, + 0x73AB, 0xC3B5, 0x73AC, 0xAB6D, 0x73AD, 0xAB6E, 0x73AE, 0xE7E2, + 0x73AF, 0xBBB7, 0x73B0, 0xCFD6, 0x73B1, 0xAB6F, 0x73B2, 0xC1E1, + 0x73B3, 0xE7E9, 0x73B4, 0xAB70, 0x73B5, 0xAB71, 0x73B6, 0xAB72, + 0x73B7, 0xE7E8, 0x73B8, 0xAB73, 0x73B9, 0xAB74, 0x73BA, 0xE7F4, + 0x73BB, 0xB2A3, 0x73BC, 0xAB75, 0x73BD, 0xAB76, 0x73BE, 0xAB77, + 0x73BF, 0xAB78, 0x73C0, 0xE7EA, 0x73C1, 0xAB79, 0x73C2, 0xE7E6, + 0x73C3, 0xAB7A, 0x73C4, 0xAB7B, 0x73C5, 0xAB7C, 0x73C6, 0xAB7D, + 0x73C7, 0xAB7E, 0x73C8, 0xE7EC, 0x73C9, 0xE7EB, 0x73CA, 0xC9BA, + 0x73CB, 0xAB80, 0x73CC, 0xAB81, 0x73CD, 0xD5E4, 0x73CE, 0xAB82, + 0x73CF, 0xE7E5, 0x73D0, 0xB7A9, 0x73D1, 0xE7E7, 0x73D2, 0xAB83, + 0x73D3, 0xAB84, 0x73D4, 0xAB85, 0x73D5, 0xAB86, 0x73D6, 0xAB87, + 0x73D7, 0xAB88, 0x73D8, 0xAB89, 0x73D9, 0xE7EE, 0x73DA, 0xAB8A, + 0x73DB, 0xAB8B, 0x73DC, 0xAB8C, 0x73DD, 0xAB8D, 0x73DE, 0xE7F3, + 0x73DF, 0xAB8E, 0x73E0, 0xD6E9, 0x73E1, 0xAB8F, 0x73E2, 0xAB90, + 0x73E3, 0xAB91, 0x73E4, 0xAB92, 0x73E5, 0xE7ED, 0x73E6, 0xAB93, + 0x73E7, 0xE7F2, 0x73E8, 0xAB94, 0x73E9, 0xE7F1, 0x73EA, 0xAB95, + 0x73EB, 0xAB96, 0x73EC, 0xAB97, 0x73ED, 0xB0E0, 0x73EE, 0xAB98, + 0x73EF, 0xAB99, 0x73F0, 0xAB9A, 0x73F1, 0xAB9B, 0x73F2, 0xE7F5, + 0x73F3, 0xAB9C, 0x73F4, 0xAB9D, 0x73F5, 0xAB9E, 0x73F6, 0xAB9F, + 0x73F7, 0xABA0, 0x73F8, 0xAC40, 0x73F9, 0xAC41, 0x73FA, 0xAC42, + 0x73FB, 0xAC43, 0x73FC, 0xAC44, 0x73FD, 0xAC45, 0x73FE, 0xAC46, + 0x73FF, 0xAC47, 0x7400, 0xAC48, 0x7401, 0xAC49, 0x7402, 0xAC4A, + 0x7403, 0xC7F2, 0x7404, 0xAC4B, 0x7405, 0xC0C5, 0x7406, 0xC0ED, + 0x7407, 0xAC4C, 0x7408, 0xAC4D, 0x7409, 0xC1F0, 0x740A, 0xE7F0, + 0x740B, 0xAC4E, 0x740C, 0xAC4F, 0x740D, 0xAC50, 0x740E, 0xAC51, + 0x740F, 0xE7F6, 0x7410, 0xCBF6, 0x7411, 0xAC52, 0x7412, 0xAC53, + 0x7413, 0xAC54, 0x7414, 0xAC55, 0x7415, 0xAC56, 0x7416, 0xAC57, + 0x7417, 0xAC58, 0x7418, 0xAC59, 0x7419, 0xAC5A, 0x741A, 0xE8A2, + 0x741B, 0xE8A1, 0x741C, 0xAC5B, 0x741D, 0xAC5C, 0x741E, 0xAC5D, + 0x741F, 0xAC5E, 0x7420, 0xAC5F, 0x7421, 0xAC60, 0x7422, 0xD7C1, + 0x7423, 0xAC61, 0x7424, 0xAC62, 0x7425, 0xE7FA, 0x7426, 0xE7F9, + 0x7427, 0xAC63, 0x7428, 0xE7FB, 0x7429, 0xAC64, 0x742A, 0xE7F7, + 0x742B, 0xAC65, 0x742C, 0xE7FE, 0x742D, 0xAC66, 0x742E, 0xE7FD, + 0x742F, 0xAC67, 0x7430, 0xE7FC, 0x7431, 0xAC68, 0x7432, 0xAC69, + 0x7433, 0xC1D5, 0x7434, 0xC7D9, 0x7435, 0xC5FD, 0x7436, 0xC5C3, + 0x7437, 0xAC6A, 0x7438, 0xAC6B, 0x7439, 0xAC6C, 0x743A, 0xAC6D, + 0x743B, 0xAC6E, 0x743C, 0xC7ED, 0x743D, 0xAC6F, 0x743E, 0xAC70, + 0x743F, 0xAC71, 0x7440, 0xAC72, 0x7441, 0xE8A3, 0x7442, 0xAC73, + 0x7443, 0xAC74, 0x7444, 0xAC75, 0x7445, 0xAC76, 0x7446, 0xAC77, + 0x7447, 0xAC78, 0x7448, 0xAC79, 0x7449, 0xAC7A, 0x744A, 0xAC7B, + 0x744B, 0xAC7C, 0x744C, 0xAC7D, 0x744D, 0xAC7E, 0x744E, 0xAC80, + 0x744F, 0xAC81, 0x7450, 0xAC82, 0x7451, 0xAC83, 0x7452, 0xAC84, + 0x7453, 0xAC85, 0x7454, 0xAC86, 0x7455, 0xE8A6, 0x7456, 0xAC87, + 0x7457, 0xE8A5, 0x7458, 0xAC88, 0x7459, 0xE8A7, 0x745A, 0xBAF7, + 0x745B, 0xE7F8, 0x745C, 0xE8A4, 0x745D, 0xAC89, 0x745E, 0xC8F0, + 0x745F, 0xC9AA, 0x7460, 0xAC8A, 0x7461, 0xAC8B, 0x7462, 0xAC8C, + 0x7463, 0xAC8D, 0x7464, 0xAC8E, 0x7465, 0xAC8F, 0x7466, 0xAC90, + 0x7467, 0xAC91, 0x7468, 0xAC92, 0x7469, 0xAC93, 0x746A, 0xAC94, + 0x746B, 0xAC95, 0x746C, 0xAC96, 0x746D, 0xE8A9, 0x746E, 0xAC97, + 0x746F, 0xAC98, 0x7470, 0xB9E5, 0x7471, 0xAC99, 0x7472, 0xAC9A, + 0x7473, 0xAC9B, 0x7474, 0xAC9C, 0x7475, 0xAC9D, 0x7476, 0xD1FE, + 0x7477, 0xE8A8, 0x7478, 0xAC9E, 0x7479, 0xAC9F, 0x747A, 0xACA0, + 0x747B, 0xAD40, 0x747C, 0xAD41, 0x747D, 0xAD42, 0x747E, 0xE8AA, + 0x747F, 0xAD43, 0x7480, 0xE8AD, 0x7481, 0xE8AE, 0x7482, 0xAD44, + 0x7483, 0xC1A7, 0x7484, 0xAD45, 0x7485, 0xAD46, 0x7486, 0xAD47, + 0x7487, 0xE8AF, 0x7488, 0xAD48, 0x7489, 0xAD49, 0x748A, 0xAD4A, + 0x748B, 0xE8B0, 0x748C, 0xAD4B, 0x748D, 0xAD4C, 0x748E, 0xE8AC, + 0x748F, 0xAD4D, 0x7490, 0xE8B4, 0x7491, 0xAD4E, 0x7492, 0xAD4F, + 0x7493, 0xAD50, 0x7494, 0xAD51, 0x7495, 0xAD52, 0x7496, 0xAD53, + 0x7497, 0xAD54, 0x7498, 0xAD55, 0x7499, 0xAD56, 0x749A, 0xAD57, + 0x749B, 0xAD58, 0x749C, 0xE8AB, 0x749D, 0xAD59, 0x749E, 0xE8B1, + 0x749F, 0xAD5A, 0x74A0, 0xAD5B, 0x74A1, 0xAD5C, 0x74A2, 0xAD5D, + 0x74A3, 0xAD5E, 0x74A4, 0xAD5F, 0x74A5, 0xAD60, 0x74A6, 0xAD61, + 0x74A7, 0xE8B5, 0x74A8, 0xE8B2, 0x74A9, 0xE8B3, 0x74AA, 0xAD62, + 0x74AB, 0xAD63, 0x74AC, 0xAD64, 0x74AD, 0xAD65, 0x74AE, 0xAD66, + 0x74AF, 0xAD67, 0x74B0, 0xAD68, 0x74B1, 0xAD69, 0x74B2, 0xAD6A, + 0x74B3, 0xAD6B, 0x74B4, 0xAD6C, 0x74B5, 0xAD6D, 0x74B6, 0xAD6E, + 0x74B7, 0xAD6F, 0x74B8, 0xAD70, 0x74B9, 0xAD71, 0x74BA, 0xE8B7, + 0x74BB, 0xAD72, 0x74BC, 0xAD73, 0x74BD, 0xAD74, 0x74BE, 0xAD75, + 0x74BF, 0xAD76, 0x74C0, 0xAD77, 0x74C1, 0xAD78, 0x74C2, 0xAD79, + 0x74C3, 0xAD7A, 0x74C4, 0xAD7B, 0x74C5, 0xAD7C, 0x74C6, 0xAD7D, + 0x74C7, 0xAD7E, 0x74C8, 0xAD80, 0x74C9, 0xAD81, 0x74CA, 0xAD82, + 0x74CB, 0xAD83, 0x74CC, 0xAD84, 0x74CD, 0xAD85, 0x74CE, 0xAD86, + 0x74CF, 0xAD87, 0x74D0, 0xAD88, 0x74D1, 0xAD89, 0x74D2, 0xE8B6, + 0x74D3, 0xAD8A, 0x74D4, 0xAD8B, 0x74D5, 0xAD8C, 0x74D6, 0xAD8D, + 0x74D7, 0xAD8E, 0x74D8, 0xAD8F, 0x74D9, 0xAD90, 0x74DA, 0xAD91, + 0x74DB, 0xAD92, 0x74DC, 0xB9CF, 0x74DD, 0xAD93, 0x74DE, 0xF0AC, + 0x74DF, 0xAD94, 0x74E0, 0xF0AD, 0x74E1, 0xAD95, 0x74E2, 0xC6B0, + 0x74E3, 0xB0EA, 0x74E4, 0xC8BF, 0x74E5, 0xAD96, 0x74E6, 0xCDDF, + 0x74E7, 0xAD97, 0x74E8, 0xAD98, 0x74E9, 0xAD99, 0x74EA, 0xAD9A, + 0x74EB, 0xAD9B, 0x74EC, 0xAD9C, 0x74ED, 0xAD9D, 0x74EE, 0xCECD, + 0x74EF, 0xEAB1, 0x74F0, 0xAD9E, 0x74F1, 0xAD9F, 0x74F2, 0xADA0, + 0x74F3, 0xAE40, 0x74F4, 0xEAB2, 0x74F5, 0xAE41, 0x74F6, 0xC6BF, + 0x74F7, 0xB4C9, 0x74F8, 0xAE42, 0x74F9, 0xAE43, 0x74FA, 0xAE44, + 0x74FB, 0xAE45, 0x74FC, 0xAE46, 0x74FD, 0xAE47, 0x74FE, 0xAE48, + 0x74FF, 0xEAB3, 0x7500, 0xAE49, 0x7501, 0xAE4A, 0x7502, 0xAE4B, + 0x7503, 0xAE4C, 0x7504, 0xD5E7, 0x7505, 0xAE4D, 0x7506, 0xAE4E, + 0x7507, 0xAE4F, 0x7508, 0xAE50, 0x7509, 0xAE51, 0x750A, 0xAE52, + 0x750B, 0xAE53, 0x750C, 0xAE54, 0x750D, 0xDDF9, 0x750E, 0xAE55, + 0x750F, 0xEAB4, 0x7510, 0xAE56, 0x7511, 0xEAB5, 0x7512, 0xAE57, + 0x7513, 0xEAB6, 0x7514, 0xAE58, 0x7515, 0xAE59, 0x7516, 0xAE5A, + 0x7517, 0xAE5B, 0x7518, 0xB8CA, 0x7519, 0xDFB0, 0x751A, 0xC9F5, + 0x751B, 0xAE5C, 0x751C, 0xCCF0, 0x751D, 0xAE5D, 0x751E, 0xAE5E, + 0x751F, 0xC9FA, 0x7520, 0xAE5F, 0x7521, 0xAE60, 0x7522, 0xAE61, + 0x7523, 0xAE62, 0x7524, 0xAE63, 0x7525, 0xC9FB, 0x7526, 0xAE64, + 0x7527, 0xAE65, 0x7528, 0xD3C3, 0x7529, 0xCBA6, 0x752A, 0xAE66, + 0x752B, 0xB8A6, 0x752C, 0xF0AE, 0x752D, 0xB1C2, 0x752E, 0xAE67, + 0x752F, 0xE5B8, 0x7530, 0xCCEF, 0x7531, 0xD3C9, 0x7532, 0xBCD7, + 0x7533, 0xC9EA, 0x7534, 0xAE68, 0x7535, 0xB5E7, 0x7536, 0xAE69, + 0x7537, 0xC4D0, 0x7538, 0xB5E9, 0x7539, 0xAE6A, 0x753A, 0xEEAE, + 0x753B, 0xBBAD, 0x753C, 0xAE6B, 0x753D, 0xAE6C, 0x753E, 0xE7DE, + 0x753F, 0xAE6D, 0x7540, 0xEEAF, 0x7541, 0xAE6E, 0x7542, 0xAE6F, + 0x7543, 0xAE70, 0x7544, 0xAE71, 0x7545, 0xB3A9, 0x7546, 0xAE72, + 0x7547, 0xAE73, 0x7548, 0xEEB2, 0x7549, 0xAE74, 0x754A, 0xAE75, + 0x754B, 0xEEB1, 0x754C, 0xBDE7, 0x754D, 0xAE76, 0x754E, 0xEEB0, + 0x754F, 0xCEB7, 0x7550, 0xAE77, 0x7551, 0xAE78, 0x7552, 0xAE79, + 0x7553, 0xAE7A, 0x7554, 0xC5CF, 0x7555, 0xAE7B, 0x7556, 0xAE7C, + 0x7557, 0xAE7D, 0x7558, 0xAE7E, 0x7559, 0xC1F4, 0x755A, 0xDBCE, + 0x755B, 0xEEB3, 0x755C, 0xD0F3, 0x755D, 0xAE80, 0x755E, 0xAE81, + 0x755F, 0xAE82, 0x7560, 0xAE83, 0x7561, 0xAE84, 0x7562, 0xAE85, + 0x7563, 0xAE86, 0x7564, 0xAE87, 0x7565, 0xC2D4, 0x7566, 0xC6E8, + 0x7567, 0xAE88, 0x7568, 0xAE89, 0x7569, 0xAE8A, 0x756A, 0xB7AC, + 0x756B, 0xAE8B, 0x756C, 0xAE8C, 0x756D, 0xAE8D, 0x756E, 0xAE8E, + 0x756F, 0xAE8F, 0x7570, 0xAE90, 0x7571, 0xAE91, 0x7572, 0xEEB4, + 0x7573, 0xAE92, 0x7574, 0xB3EB, 0x7575, 0xAE93, 0x7576, 0xAE94, + 0x7577, 0xAE95, 0x7578, 0xBBFB, 0x7579, 0xEEB5, 0x757A, 0xAE96, + 0x757B, 0xAE97, 0x757C, 0xAE98, 0x757D, 0xAE99, 0x757E, 0xAE9A, + 0x757F, 0xE7DC, 0x7580, 0xAE9B, 0x7581, 0xAE9C, 0x7582, 0xAE9D, + 0x7583, 0xEEB6, 0x7584, 0xAE9E, 0x7585, 0xAE9F, 0x7586, 0xBDAE, + 0x7587, 0xAEA0, 0x7588, 0xAF40, 0x7589, 0xAF41, 0x758A, 0xAF42, + 0x758B, 0xF1E2, 0x758C, 0xAF43, 0x758D, 0xAF44, 0x758E, 0xAF45, + 0x758F, 0xCAE8, 0x7590, 0xAF46, 0x7591, 0xD2C9, 0x7592, 0xF0DA, + 0x7593, 0xAF47, 0x7594, 0xF0DB, 0x7595, 0xAF48, 0x7596, 0xF0DC, + 0x7597, 0xC1C6, 0x7598, 0xAF49, 0x7599, 0xB8ED, 0x759A, 0xBECE, + 0x759B, 0xAF4A, 0x759C, 0xAF4B, 0x759D, 0xF0DE, 0x759E, 0xAF4C, + 0x759F, 0xC5B1, 0x75A0, 0xF0DD, 0x75A1, 0xD1F1, 0x75A2, 0xAF4D, + 0x75A3, 0xF0E0, 0x75A4, 0xB0CC, 0x75A5, 0xBDEA, 0x75A6, 0xAF4E, + 0x75A7, 0xAF4F, 0x75A8, 0xAF50, 0x75A9, 0xAF51, 0x75AA, 0xAF52, + 0x75AB, 0xD2DF, 0x75AC, 0xF0DF, 0x75AD, 0xAF53, 0x75AE, 0xB4AF, + 0x75AF, 0xB7E8, 0x75B0, 0xF0E6, 0x75B1, 0xF0E5, 0x75B2, 0xC6A3, + 0x75B3, 0xF0E1, 0x75B4, 0xF0E2, 0x75B5, 0xB4C3, 0x75B6, 0xAF54, + 0x75B7, 0xAF55, 0x75B8, 0xF0E3, 0x75B9, 0xD5EE, 0x75BA, 0xAF56, + 0x75BB, 0xAF57, 0x75BC, 0xCCDB, 0x75BD, 0xBED2, 0x75BE, 0xBCB2, + 0x75BF, 0xAF58, 0x75C0, 0xAF59, 0x75C1, 0xAF5A, 0x75C2, 0xF0E8, + 0x75C3, 0xF0E7, 0x75C4, 0xF0E4, 0x75C5, 0xB2A1, 0x75C6, 0xAF5B, + 0x75C7, 0xD6A2, 0x75C8, 0xD3B8, 0x75C9, 0xBEB7, 0x75CA, 0xC8AC, + 0x75CB, 0xAF5C, 0x75CC, 0xAF5D, 0x75CD, 0xF0EA, 0x75CE, 0xAF5E, + 0x75CF, 0xAF5F, 0x75D0, 0xAF60, 0x75D1, 0xAF61, 0x75D2, 0xD1F7, + 0x75D3, 0xAF62, 0x75D4, 0xD6CC, 0x75D5, 0xBADB, 0x75D6, 0xF0E9, + 0x75D7, 0xAF63, 0x75D8, 0xB6BB, 0x75D9, 0xAF64, 0x75DA, 0xAF65, + 0x75DB, 0xCDB4, 0x75DC, 0xAF66, 0x75DD, 0xAF67, 0x75DE, 0xC6A6, + 0x75DF, 0xAF68, 0x75E0, 0xAF69, 0x75E1, 0xAF6A, 0x75E2, 0xC1A1, + 0x75E3, 0xF0EB, 0x75E4, 0xF0EE, 0x75E5, 0xAF6B, 0x75E6, 0xF0ED, + 0x75E7, 0xF0F0, 0x75E8, 0xF0EC, 0x75E9, 0xAF6C, 0x75EA, 0xBBBE, + 0x75EB, 0xF0EF, 0x75EC, 0xAF6D, 0x75ED, 0xAF6E, 0x75EE, 0xAF6F, + 0x75EF, 0xAF70, 0x75F0, 0xCCB5, 0x75F1, 0xF0F2, 0x75F2, 0xAF71, + 0x75F3, 0xAF72, 0x75F4, 0xB3D5, 0x75F5, 0xAF73, 0x75F6, 0xAF74, + 0x75F7, 0xAF75, 0x75F8, 0xAF76, 0x75F9, 0xB1D4, 0x75FA, 0xAF77, + 0x75FB, 0xAF78, 0x75FC, 0xF0F3, 0x75FD, 0xAF79, 0x75FE, 0xAF7A, + 0x75FF, 0xF0F4, 0x7600, 0xF0F6, 0x7601, 0xB4E1, 0x7602, 0xAF7B, + 0x7603, 0xF0F1, 0x7604, 0xAF7C, 0x7605, 0xF0F7, 0x7606, 0xAF7D, + 0x7607, 0xAF7E, 0x7608, 0xAF80, 0x7609, 0xAF81, 0x760A, 0xF0FA, + 0x760B, 0xAF82, 0x760C, 0xF0F8, 0x760D, 0xAF83, 0x760E, 0xAF84, + 0x760F, 0xAF85, 0x7610, 0xF0F5, 0x7611, 0xAF86, 0x7612, 0xAF87, + 0x7613, 0xAF88, 0x7614, 0xAF89, 0x7615, 0xF0FD, 0x7616, 0xAF8A, + 0x7617, 0xF0F9, 0x7618, 0xF0FC, 0x7619, 0xF0FE, 0x761A, 0xAF8B, + 0x761B, 0xF1A1, 0x761C, 0xAF8C, 0x761D, 0xAF8D, 0x761E, 0xAF8E, + 0x761F, 0xCEC1, 0x7620, 0xF1A4, 0x7621, 0xAF8F, 0x7622, 0xF1A3, + 0x7623, 0xAF90, 0x7624, 0xC1F6, 0x7625, 0xF0FB, 0x7626, 0xCADD, + 0x7627, 0xAF91, 0x7628, 0xAF92, 0x7629, 0xB4F1, 0x762A, 0xB1F1, + 0x762B, 0xCCB1, 0x762C, 0xAF93, 0x762D, 0xF1A6, 0x762E, 0xAF94, + 0x762F, 0xAF95, 0x7630, 0xF1A7, 0x7631, 0xAF96, 0x7632, 0xAF97, + 0x7633, 0xF1AC, 0x7634, 0xD5CE, 0x7635, 0xF1A9, 0x7636, 0xAF98, + 0x7637, 0xAF99, 0x7638, 0xC8B3, 0x7639, 0xAF9A, 0x763A, 0xAF9B, + 0x763B, 0xAF9C, 0x763C, 0xF1A2, 0x763D, 0xAF9D, 0x763E, 0xF1AB, + 0x763F, 0xF1A8, 0x7640, 0xF1A5, 0x7641, 0xAF9E, 0x7642, 0xAF9F, + 0x7643, 0xF1AA, 0x7644, 0xAFA0, 0x7645, 0xB040, 0x7646, 0xB041, + 0x7647, 0xB042, 0x7648, 0xB043, 0x7649, 0xB044, 0x764A, 0xB045, + 0x764B, 0xB046, 0x764C, 0xB0A9, 0x764D, 0xF1AD, 0x764E, 0xB047, + 0x764F, 0xB048, 0x7650, 0xB049, 0x7651, 0xB04A, 0x7652, 0xB04B, + 0x7653, 0xB04C, 0x7654, 0xF1AF, 0x7655, 0xB04D, 0x7656, 0xF1B1, + 0x7657, 0xB04E, 0x7658, 0xB04F, 0x7659, 0xB050, 0x765A, 0xB051, + 0x765B, 0xB052, 0x765C, 0xF1B0, 0x765D, 0xB053, 0x765E, 0xF1AE, + 0x765F, 0xB054, 0x7660, 0xB055, 0x7661, 0xB056, 0x7662, 0xB057, + 0x7663, 0xD1A2, 0x7664, 0xB058, 0x7665, 0xB059, 0x7666, 0xB05A, + 0x7667, 0xB05B, 0x7668, 0xB05C, 0x7669, 0xB05D, 0x766A, 0xB05E, + 0x766B, 0xF1B2, 0x766C, 0xB05F, 0x766D, 0xB060, 0x766E, 0xB061, + 0x766F, 0xF1B3, 0x7670, 0xB062, 0x7671, 0xB063, 0x7672, 0xB064, + 0x7673, 0xB065, 0x7674, 0xB066, 0x7675, 0xB067, 0x7676, 0xB068, + 0x7677, 0xB069, 0x7678, 0xB9EF, 0x7679, 0xB06A, 0x767A, 0xB06B, + 0x767B, 0xB5C7, 0x767C, 0xB06C, 0x767D, 0xB0D7, 0x767E, 0xB0D9, + 0x767F, 0xB06D, 0x7680, 0xB06E, 0x7681, 0xB06F, 0x7682, 0xD4ED, + 0x7683, 0xB070, 0x7684, 0xB5C4, 0x7685, 0xB071, 0x7686, 0xBDD4, + 0x7687, 0xBBCA, 0x7688, 0xF0A7, 0x7689, 0xB072, 0x768A, 0xB073, + 0x768B, 0xB8DE, 0x768C, 0xB074, 0x768D, 0xB075, 0x768E, 0xF0A8, + 0x768F, 0xB076, 0x7690, 0xB077, 0x7691, 0xB0A8, 0x7692, 0xB078, + 0x7693, 0xF0A9, 0x7694, 0xB079, 0x7695, 0xB07A, 0x7696, 0xCDEE, + 0x7697, 0xB07B, 0x7698, 0xB07C, 0x7699, 0xF0AA, 0x769A, 0xB07D, + 0x769B, 0xB07E, 0x769C, 0xB080, 0x769D, 0xB081, 0x769E, 0xB082, + 0x769F, 0xB083, 0x76A0, 0xB084, 0x76A1, 0xB085, 0x76A2, 0xB086, + 0x76A3, 0xB087, 0x76A4, 0xF0AB, 0x76A5, 0xB088, 0x76A6, 0xB089, + 0x76A7, 0xB08A, 0x76A8, 0xB08B, 0x76A9, 0xB08C, 0x76AA, 0xB08D, + 0x76AB, 0xB08E, 0x76AC, 0xB08F, 0x76AD, 0xB090, 0x76AE, 0xC6A4, + 0x76AF, 0xB091, 0x76B0, 0xB092, 0x76B1, 0xD6E5, 0x76B2, 0xF1E4, + 0x76B3, 0xB093, 0x76B4, 0xF1E5, 0x76B5, 0xB094, 0x76B6, 0xB095, + 0x76B7, 0xB096, 0x76B8, 0xB097, 0x76B9, 0xB098, 0x76BA, 0xB099, + 0x76BB, 0xB09A, 0x76BC, 0xB09B, 0x76BD, 0xB09C, 0x76BE, 0xB09D, + 0x76BF, 0xC3F3, 0x76C0, 0xB09E, 0x76C1, 0xB09F, 0x76C2, 0xD3DB, + 0x76C3, 0xB0A0, 0x76C4, 0xB140, 0x76C5, 0xD6D1, 0x76C6, 0xC5E8, + 0x76C7, 0xB141, 0x76C8, 0xD3AF, 0x76C9, 0xB142, 0x76CA, 0xD2E6, + 0x76CB, 0xB143, 0x76CC, 0xB144, 0x76CD, 0xEEC1, 0x76CE, 0xB0BB, + 0x76CF, 0xD5B5, 0x76D0, 0xD1CE, 0x76D1, 0xBCE0, 0x76D2, 0xBAD0, + 0x76D3, 0xB145, 0x76D4, 0xBFF8, 0x76D5, 0xB146, 0x76D6, 0xB8C7, + 0x76D7, 0xB5C1, 0x76D8, 0xC5CC, 0x76D9, 0xB147, 0x76DA, 0xB148, + 0x76DB, 0xCAA2, 0x76DC, 0xB149, 0x76DD, 0xB14A, 0x76DE, 0xB14B, + 0x76DF, 0xC3CB, 0x76E0, 0xB14C, 0x76E1, 0xB14D, 0x76E2, 0xB14E, + 0x76E3, 0xB14F, 0x76E4, 0xB150, 0x76E5, 0xEEC2, 0x76E6, 0xB151, + 0x76E7, 0xB152, 0x76E8, 0xB153, 0x76E9, 0xB154, 0x76EA, 0xB155, + 0x76EB, 0xB156, 0x76EC, 0xB157, 0x76ED, 0xB158, 0x76EE, 0xC4BF, + 0x76EF, 0xB6A2, 0x76F0, 0xB159, 0x76F1, 0xEDEC, 0x76F2, 0xC3A4, + 0x76F3, 0xB15A, 0x76F4, 0xD6B1, 0x76F5, 0xB15B, 0x76F6, 0xB15C, + 0x76F7, 0xB15D, 0x76F8, 0xCFE0, 0x76F9, 0xEDEF, 0x76FA, 0xB15E, + 0x76FB, 0xB15F, 0x76FC, 0xC5CE, 0x76FD, 0xB160, 0x76FE, 0xB6DC, + 0x76FF, 0xB161, 0x7700, 0xB162, 0x7701, 0xCAA1, 0x7702, 0xB163, + 0x7703, 0xB164, 0x7704, 0xEDED, 0x7705, 0xB165, 0x7706, 0xB166, + 0x7707, 0xEDF0, 0x7708, 0xEDF1, 0x7709, 0xC3BC, 0x770A, 0xB167, + 0x770B, 0xBFB4, 0x770C, 0xB168, 0x770D, 0xEDEE, 0x770E, 0xB169, + 0x770F, 0xB16A, 0x7710, 0xB16B, 0x7711, 0xB16C, 0x7712, 0xB16D, + 0x7713, 0xB16E, 0x7714, 0xB16F, 0x7715, 0xB170, 0x7716, 0xB171, + 0x7717, 0xB172, 0x7718, 0xB173, 0x7719, 0xEDF4, 0x771A, 0xEDF2, + 0x771B, 0xB174, 0x771C, 0xB175, 0x771D, 0xB176, 0x771E, 0xB177, + 0x771F, 0xD5E6, 0x7720, 0xC3DF, 0x7721, 0xB178, 0x7722, 0xEDF3, + 0x7723, 0xB179, 0x7724, 0xB17A, 0x7725, 0xB17B, 0x7726, 0xEDF6, + 0x7727, 0xB17C, 0x7728, 0xD5A3, 0x7729, 0xD1A3, 0x772A, 0xB17D, + 0x772B, 0xB17E, 0x772C, 0xB180, 0x772D, 0xEDF5, 0x772E, 0xB181, + 0x772F, 0xC3D0, 0x7730, 0xB182, 0x7731, 0xB183, 0x7732, 0xB184, + 0x7733, 0xB185, 0x7734, 0xB186, 0x7735, 0xEDF7, 0x7736, 0xBFF4, + 0x7737, 0xBEEC, 0x7738, 0xEDF8, 0x7739, 0xB187, 0x773A, 0xCCF7, + 0x773B, 0xB188, 0x773C, 0xD1DB, 0x773D, 0xB189, 0x773E, 0xB18A, + 0x773F, 0xB18B, 0x7740, 0xD7C5, 0x7741, 0xD5F6, 0x7742, 0xB18C, + 0x7743, 0xEDFC, 0x7744, 0xB18D, 0x7745, 0xB18E, 0x7746, 0xB18F, + 0x7747, 0xEDFB, 0x7748, 0xB190, 0x7749, 0xB191, 0x774A, 0xB192, + 0x774B, 0xB193, 0x774C, 0xB194, 0x774D, 0xB195, 0x774E, 0xB196, + 0x774F, 0xB197, 0x7750, 0xEDF9, 0x7751, 0xEDFA, 0x7752, 0xB198, + 0x7753, 0xB199, 0x7754, 0xB19A, 0x7755, 0xB19B, 0x7756, 0xB19C, + 0x7757, 0xB19D, 0x7758, 0xB19E, 0x7759, 0xB19F, 0x775A, 0xEDFD, + 0x775B, 0xBEA6, 0x775C, 0xB1A0, 0x775D, 0xB240, 0x775E, 0xB241, + 0x775F, 0xB242, 0x7760, 0xB243, 0x7761, 0xCBAF, 0x7762, 0xEEA1, + 0x7763, 0xB6BD, 0x7764, 0xB244, 0x7765, 0xEEA2, 0x7766, 0xC4C0, + 0x7767, 0xB245, 0x7768, 0xEDFE, 0x7769, 0xB246, 0x776A, 0xB247, + 0x776B, 0xBDDE, 0x776C, 0xB2C7, 0x776D, 0xB248, 0x776E, 0xB249, + 0x776F, 0xB24A, 0x7770, 0xB24B, 0x7771, 0xB24C, 0x7772, 0xB24D, + 0x7773, 0xB24E, 0x7774, 0xB24F, 0x7775, 0xB250, 0x7776, 0xB251, + 0x7777, 0xB252, 0x7778, 0xB253, 0x7779, 0xB6C3, 0x777A, 0xB254, + 0x777B, 0xB255, 0x777C, 0xB256, 0x777D, 0xEEA5, 0x777E, 0xD8BA, + 0x777F, 0xEEA3, 0x7780, 0xEEA6, 0x7781, 0xB257, 0x7782, 0xB258, + 0x7783, 0xB259, 0x7784, 0xC3E9, 0x7785, 0xB3F2, 0x7786, 0xB25A, + 0x7787, 0xB25B, 0x7788, 0xB25C, 0x7789, 0xB25D, 0x778A, 0xB25E, + 0x778B, 0xB25F, 0x778C, 0xEEA7, 0x778D, 0xEEA4, 0x778E, 0xCFB9, + 0x778F, 0xB260, 0x7790, 0xB261, 0x7791, 0xEEA8, 0x7792, 0xC2F7, + 0x7793, 0xB262, 0x7794, 0xB263, 0x7795, 0xB264, 0x7796, 0xB265, + 0x7797, 0xB266, 0x7798, 0xB267, 0x7799, 0xB268, 0x779A, 0xB269, + 0x779B, 0xB26A, 0x779C, 0xB26B, 0x779D, 0xB26C, 0x779E, 0xB26D, + 0x779F, 0xEEA9, 0x77A0, 0xEEAA, 0x77A1, 0xB26E, 0x77A2, 0xDEAB, + 0x77A3, 0xB26F, 0x77A4, 0xB270, 0x77A5, 0xC6B3, 0x77A6, 0xB271, + 0x77A7, 0xC7C6, 0x77A8, 0xB272, 0x77A9, 0xD6F5, 0x77AA, 0xB5C9, + 0x77AB, 0xB273, 0x77AC, 0xCBB2, 0x77AD, 0xB274, 0x77AE, 0xB275, + 0x77AF, 0xB276, 0x77B0, 0xEEAB, 0x77B1, 0xB277, 0x77B2, 0xB278, + 0x77B3, 0xCDAB, 0x77B4, 0xB279, 0x77B5, 0xEEAC, 0x77B6, 0xB27A, + 0x77B7, 0xB27B, 0x77B8, 0xB27C, 0x77B9, 0xB27D, 0x77BA, 0xB27E, + 0x77BB, 0xD5B0, 0x77BC, 0xB280, 0x77BD, 0xEEAD, 0x77BE, 0xB281, + 0x77BF, 0xF6C4, 0x77C0, 0xB282, 0x77C1, 0xB283, 0x77C2, 0xB284, + 0x77C3, 0xB285, 0x77C4, 0xB286, 0x77C5, 0xB287, 0x77C6, 0xB288, + 0x77C7, 0xB289, 0x77C8, 0xB28A, 0x77C9, 0xB28B, 0x77CA, 0xB28C, + 0x77CB, 0xB28D, 0x77CC, 0xB28E, 0x77CD, 0xDBC7, 0x77CE, 0xB28F, + 0x77CF, 0xB290, 0x77D0, 0xB291, 0x77D1, 0xB292, 0x77D2, 0xB293, + 0x77D3, 0xB294, 0x77D4, 0xB295, 0x77D5, 0xB296, 0x77D6, 0xB297, + 0x77D7, 0xB4A3, 0x77D8, 0xB298, 0x77D9, 0xB299, 0x77DA, 0xB29A, + 0x77DB, 0xC3AC, 0x77DC, 0xF1E6, 0x77DD, 0xB29B, 0x77DE, 0xB29C, + 0x77DF, 0xB29D, 0x77E0, 0xB29E, 0x77E1, 0xB29F, 0x77E2, 0xCAB8, + 0x77E3, 0xD2D3, 0x77E4, 0xB2A0, 0x77E5, 0xD6AA, 0x77E6, 0xB340, + 0x77E7, 0xEFF2, 0x77E8, 0xB341, 0x77E9, 0xBED8, 0x77EA, 0xB342, + 0x77EB, 0xBDC3, 0x77EC, 0xEFF3, 0x77ED, 0xB6CC, 0x77EE, 0xB0AB, + 0x77EF, 0xB343, 0x77F0, 0xB344, 0x77F1, 0xB345, 0x77F2, 0xB346, + 0x77F3, 0xCAAF, 0x77F4, 0xB347, 0x77F5, 0xB348, 0x77F6, 0xEDB6, + 0x77F7, 0xB349, 0x77F8, 0xEDB7, 0x77F9, 0xB34A, 0x77FA, 0xB34B, + 0x77FB, 0xB34C, 0x77FC, 0xB34D, 0x77FD, 0xCEF9, 0x77FE, 0xB7AF, + 0x77FF, 0xBFF3, 0x7800, 0xEDB8, 0x7801, 0xC2EB, 0x7802, 0xC9B0, + 0x7803, 0xB34E, 0x7804, 0xB34F, 0x7805, 0xB350, 0x7806, 0xB351, + 0x7807, 0xB352, 0x7808, 0xB353, 0x7809, 0xEDB9, 0x780A, 0xB354, + 0x780B, 0xB355, 0x780C, 0xC6F6, 0x780D, 0xBFB3, 0x780E, 0xB356, + 0x780F, 0xB357, 0x7810, 0xB358, 0x7811, 0xEDBC, 0x7812, 0xC5F8, + 0x7813, 0xB359, 0x7814, 0xD1D0, 0x7815, 0xB35A, 0x7816, 0xD7A9, + 0x7817, 0xEDBA, 0x7818, 0xEDBB, 0x7819, 0xB35B, 0x781A, 0xD1E2, + 0x781B, 0xB35C, 0x781C, 0xEDBF, 0x781D, 0xEDC0, 0x781E, 0xB35D, + 0x781F, 0xEDC4, 0x7820, 0xB35E, 0x7821, 0xB35F, 0x7822, 0xB360, + 0x7823, 0xEDC8, 0x7824, 0xB361, 0x7825, 0xEDC6, 0x7826, 0xEDCE, + 0x7827, 0xD5E8, 0x7828, 0xB362, 0x7829, 0xEDC9, 0x782A, 0xB363, + 0x782B, 0xB364, 0x782C, 0xEDC7, 0x782D, 0xEDBE, 0x782E, 0xB365, + 0x782F, 0xB366, 0x7830, 0xC5E9, 0x7831, 0xB367, 0x7832, 0xB368, + 0x7833, 0xB369, 0x7834, 0xC6C6, 0x7835, 0xB36A, 0x7836, 0xB36B, + 0x7837, 0xC9E9, 0x7838, 0xD4D2, 0x7839, 0xEDC1, 0x783A, 0xEDC2, + 0x783B, 0xEDC3, 0x783C, 0xEDC5, 0x783D, 0xB36C, 0x783E, 0xC0F9, + 0x783F, 0xB36D, 0x7840, 0xB4A1, 0x7841, 0xB36E, 0x7842, 0xB36F, + 0x7843, 0xB370, 0x7844, 0xB371, 0x7845, 0xB9E8, 0x7846, 0xB372, + 0x7847, 0xEDD0, 0x7848, 0xB373, 0x7849, 0xB374, 0x784A, 0xB375, + 0x784B, 0xB376, 0x784C, 0xEDD1, 0x784D, 0xB377, 0x784E, 0xEDCA, + 0x784F, 0xB378, 0x7850, 0xEDCF, 0x7851, 0xB379, 0x7852, 0xCEF8, + 0x7853, 0xB37A, 0x7854, 0xB37B, 0x7855, 0xCBB6, 0x7856, 0xEDCC, + 0x7857, 0xEDCD, 0x7858, 0xB37C, 0x7859, 0xB37D, 0x785A, 0xB37E, + 0x785B, 0xB380, 0x785C, 0xB381, 0x785D, 0xCFF5, 0x785E, 0xB382, + 0x785F, 0xB383, 0x7860, 0xB384, 0x7861, 0xB385, 0x7862, 0xB386, + 0x7863, 0xB387, 0x7864, 0xB388, 0x7865, 0xB389, 0x7866, 0xB38A, + 0x7867, 0xB38B, 0x7868, 0xB38C, 0x7869, 0xB38D, 0x786A, 0xEDD2, + 0x786B, 0xC1F2, 0x786C, 0xD3B2, 0x786D, 0xEDCB, 0x786E, 0xC8B7, + 0x786F, 0xB38E, 0x7870, 0xB38F, 0x7871, 0xB390, 0x7872, 0xB391, + 0x7873, 0xB392, 0x7874, 0xB393, 0x7875, 0xB394, 0x7876, 0xB395, + 0x7877, 0xBCEF, 0x7878, 0xB396, 0x7879, 0xB397, 0x787A, 0xB398, + 0x787B, 0xB399, 0x787C, 0xC5F0, 0x787D, 0xB39A, 0x787E, 0xB39B, + 0x787F, 0xB39C, 0x7880, 0xB39D, 0x7881, 0xB39E, 0x7882, 0xB39F, + 0x7883, 0xB3A0, 0x7884, 0xB440, 0x7885, 0xB441, 0x7886, 0xB442, + 0x7887, 0xEDD6, 0x7888, 0xB443, 0x7889, 0xB5EF, 0x788A, 0xB444, + 0x788B, 0xB445, 0x788C, 0xC2B5, 0x788D, 0xB0AD, 0x788E, 0xCBE9, + 0x788F, 0xB446, 0x7890, 0xB447, 0x7891, 0xB1AE, 0x7892, 0xB448, + 0x7893, 0xEDD4, 0x7894, 0xB449, 0x7895, 0xB44A, 0x7896, 0xB44B, + 0x7897, 0xCDEB, 0x7898, 0xB5E2, 0x7899, 0xB44C, 0x789A, 0xEDD5, + 0x789B, 0xEDD3, 0x789C, 0xEDD7, 0x789D, 0xB44D, 0x789E, 0xB44E, + 0x789F, 0xB5FA, 0x78A0, 0xB44F, 0x78A1, 0xEDD8, 0x78A2, 0xB450, + 0x78A3, 0xEDD9, 0x78A4, 0xB451, 0x78A5, 0xEDDC, 0x78A6, 0xB452, + 0x78A7, 0xB1CC, 0x78A8, 0xB453, 0x78A9, 0xB454, 0x78AA, 0xB455, + 0x78AB, 0xB456, 0x78AC, 0xB457, 0x78AD, 0xB458, 0x78AE, 0xB459, + 0x78AF, 0xB45A, 0x78B0, 0xC5F6, 0x78B1, 0xBCEE, 0x78B2, 0xEDDA, + 0x78B3, 0xCCBC, 0x78B4, 0xB2EA, 0x78B5, 0xB45B, 0x78B6, 0xB45C, + 0x78B7, 0xB45D, 0x78B8, 0xB45E, 0x78B9, 0xEDDB, 0x78BA, 0xB45F, + 0x78BB, 0xB460, 0x78BC, 0xB461, 0x78BD, 0xB462, 0x78BE, 0xC4EB, + 0x78BF, 0xB463, 0x78C0, 0xB464, 0x78C1, 0xB4C5, 0x78C2, 0xB465, + 0x78C3, 0xB466, 0x78C4, 0xB467, 0x78C5, 0xB0F5, 0x78C6, 0xB468, + 0x78C7, 0xB469, 0x78C8, 0xB46A, 0x78C9, 0xEDDF, 0x78CA, 0xC0DA, + 0x78CB, 0xB4E8, 0x78CC, 0xB46B, 0x78CD, 0xB46C, 0x78CE, 0xB46D, + 0x78CF, 0xB46E, 0x78D0, 0xC5CD, 0x78D1, 0xB46F, 0x78D2, 0xB470, + 0x78D3, 0xB471, 0x78D4, 0xEDDD, 0x78D5, 0xBFC4, 0x78D6, 0xB472, + 0x78D7, 0xB473, 0x78D8, 0xB474, 0x78D9, 0xEDDE, 0x78DA, 0xB475, + 0x78DB, 0xB476, 0x78DC, 0xB477, 0x78DD, 0xB478, 0x78DE, 0xB479, + 0x78DF, 0xB47A, 0x78E0, 0xB47B, 0x78E1, 0xB47C, 0x78E2, 0xB47D, + 0x78E3, 0xB47E, 0x78E4, 0xB480, 0x78E5, 0xB481, 0x78E6, 0xB482, + 0x78E7, 0xB483, 0x78E8, 0xC4A5, 0x78E9, 0xB484, 0x78EA, 0xB485, + 0x78EB, 0xB486, 0x78EC, 0xEDE0, 0x78ED, 0xB487, 0x78EE, 0xB488, + 0x78EF, 0xB489, 0x78F0, 0xB48A, 0x78F1, 0xB48B, 0x78F2, 0xEDE1, + 0x78F3, 0xB48C, 0x78F4, 0xEDE3, 0x78F5, 0xB48D, 0x78F6, 0xB48E, + 0x78F7, 0xC1D7, 0x78F8, 0xB48F, 0x78F9, 0xB490, 0x78FA, 0xBBC7, + 0x78FB, 0xB491, 0x78FC, 0xB492, 0x78FD, 0xB493, 0x78FE, 0xB494, + 0x78FF, 0xB495, 0x7900, 0xB496, 0x7901, 0xBDB8, 0x7902, 0xB497, + 0x7903, 0xB498, 0x7904, 0xB499, 0x7905, 0xEDE2, 0x7906, 0xB49A, + 0x7907, 0xB49B, 0x7908, 0xB49C, 0x7909, 0xB49D, 0x790A, 0xB49E, + 0x790B, 0xB49F, 0x790C, 0xB4A0, 0x790D, 0xB540, 0x790E, 0xB541, + 0x790F, 0xB542, 0x7910, 0xB543, 0x7911, 0xB544, 0x7912, 0xB545, + 0x7913, 0xEDE4, 0x7914, 0xB546, 0x7915, 0xB547, 0x7916, 0xB548, + 0x7917, 0xB549, 0x7918, 0xB54A, 0x7919, 0xB54B, 0x791A, 0xB54C, + 0x791B, 0xB54D, 0x791C, 0xB54E, 0x791D, 0xB54F, 0x791E, 0xEDE6, + 0x791F, 0xB550, 0x7920, 0xB551, 0x7921, 0xB552, 0x7922, 0xB553, + 0x7923, 0xB554, 0x7924, 0xEDE5, 0x7925, 0xB555, 0x7926, 0xB556, + 0x7927, 0xB557, 0x7928, 0xB558, 0x7929, 0xB559, 0x792A, 0xB55A, + 0x792B, 0xB55B, 0x792C, 0xB55C, 0x792D, 0xB55D, 0x792E, 0xB55E, + 0x792F, 0xB55F, 0x7930, 0xB560, 0x7931, 0xB561, 0x7932, 0xB562, + 0x7933, 0xB563, 0x7934, 0xEDE7, 0x7935, 0xB564, 0x7936, 0xB565, + 0x7937, 0xB566, 0x7938, 0xB567, 0x7939, 0xB568, 0x793A, 0xCABE, + 0x793B, 0xECEA, 0x793C, 0xC0F1, 0x793D, 0xB569, 0x793E, 0xC9E7, + 0x793F, 0xB56A, 0x7940, 0xECEB, 0x7941, 0xC6EE, 0x7942, 0xB56B, + 0x7943, 0xB56C, 0x7944, 0xB56D, 0x7945, 0xB56E, 0x7946, 0xECEC, + 0x7947, 0xB56F, 0x7948, 0xC6ED, 0x7949, 0xECED, 0x794A, 0xB570, + 0x794B, 0xB571, 0x794C, 0xB572, 0x794D, 0xB573, 0x794E, 0xB574, + 0x794F, 0xB575, 0x7950, 0xB576, 0x7951, 0xB577, 0x7952, 0xB578, + 0x7953, 0xECF0, 0x7954, 0xB579, 0x7955, 0xB57A, 0x7956, 0xD7E6, + 0x7957, 0xECF3, 0x7958, 0xB57B, 0x7959, 0xB57C, 0x795A, 0xECF1, + 0x795B, 0xECEE, 0x795C, 0xECEF, 0x795D, 0xD7A3, 0x795E, 0xC9F1, + 0x795F, 0xCBEE, 0x7960, 0xECF4, 0x7961, 0xB57D, 0x7962, 0xECF2, + 0x7963, 0xB57E, 0x7964, 0xB580, 0x7965, 0xCFE9, 0x7966, 0xB581, + 0x7967, 0xECF6, 0x7968, 0xC6B1, 0x7969, 0xB582, 0x796A, 0xB583, + 0x796B, 0xB584, 0x796C, 0xB585, 0x796D, 0xBCC0, 0x796E, 0xB586, + 0x796F, 0xECF5, 0x7970, 0xB587, 0x7971, 0xB588, 0x7972, 0xB589, + 0x7973, 0xB58A, 0x7974, 0xB58B, 0x7975, 0xB58C, 0x7976, 0xB58D, + 0x7977, 0xB5BB, 0x7978, 0xBBF6, 0x7979, 0xB58E, 0x797A, 0xECF7, + 0x797B, 0xB58F, 0x797C, 0xB590, 0x797D, 0xB591, 0x797E, 0xB592, + 0x797F, 0xB593, 0x7980, 0xD9F7, 0x7981, 0xBDFB, 0x7982, 0xB594, + 0x7983, 0xB595, 0x7984, 0xC2BB, 0x7985, 0xECF8, 0x7986, 0xB596, + 0x7987, 0xB597, 0x7988, 0xB598, 0x7989, 0xB599, 0x798A, 0xECF9, + 0x798B, 0xB59A, 0x798C, 0xB59B, 0x798D, 0xB59C, 0x798E, 0xB59D, + 0x798F, 0xB8A3, 0x7990, 0xB59E, 0x7991, 0xB59F, 0x7992, 0xB5A0, + 0x7993, 0xB640, 0x7994, 0xB641, 0x7995, 0xB642, 0x7996, 0xB643, + 0x7997, 0xB644, 0x7998, 0xB645, 0x7999, 0xB646, 0x799A, 0xECFA, + 0x799B, 0xB647, 0x799C, 0xB648, 0x799D, 0xB649, 0x799E, 0xB64A, + 0x799F, 0xB64B, 0x79A0, 0xB64C, 0x79A1, 0xB64D, 0x79A2, 0xB64E, + 0x79A3, 0xB64F, 0x79A4, 0xB650, 0x79A5, 0xB651, 0x79A6, 0xB652, + 0x79A7, 0xECFB, 0x79A8, 0xB653, 0x79A9, 0xB654, 0x79AA, 0xB655, + 0x79AB, 0xB656, 0x79AC, 0xB657, 0x79AD, 0xB658, 0x79AE, 0xB659, + 0x79AF, 0xB65A, 0x79B0, 0xB65B, 0x79B1, 0xB65C, 0x79B2, 0xB65D, + 0x79B3, 0xECFC, 0x79B4, 0xB65E, 0x79B5, 0xB65F, 0x79B6, 0xB660, + 0x79B7, 0xB661, 0x79B8, 0xB662, 0x79B9, 0xD3ED, 0x79BA, 0xD8AE, + 0x79BB, 0xC0EB, 0x79BC, 0xB663, 0x79BD, 0xC7DD, 0x79BE, 0xBACC, + 0x79BF, 0xB664, 0x79C0, 0xD0E3, 0x79C1, 0xCBBD, 0x79C2, 0xB665, + 0x79C3, 0xCDBA, 0x79C4, 0xB666, 0x79C5, 0xB667, 0x79C6, 0xB8D1, + 0x79C7, 0xB668, 0x79C8, 0xB669, 0x79C9, 0xB1FC, 0x79CA, 0xB66A, + 0x79CB, 0xC7EF, 0x79CC, 0xB66B, 0x79CD, 0xD6D6, 0x79CE, 0xB66C, + 0x79CF, 0xB66D, 0x79D0, 0xB66E, 0x79D1, 0xBFC6, 0x79D2, 0xC3EB, + 0x79D3, 0xB66F, 0x79D4, 0xB670, 0x79D5, 0xEFF5, 0x79D6, 0xB671, + 0x79D7, 0xB672, 0x79D8, 0xC3D8, 0x79D9, 0xB673, 0x79DA, 0xB674, + 0x79DB, 0xB675, 0x79DC, 0xB676, 0x79DD, 0xB677, 0x79DE, 0xB678, + 0x79DF, 0xD7E2, 0x79E0, 0xB679, 0x79E1, 0xB67A, 0x79E2, 0xB67B, + 0x79E3, 0xEFF7, 0x79E4, 0xB3D3, 0x79E5, 0xB67C, 0x79E6, 0xC7D8, + 0x79E7, 0xD1ED, 0x79E8, 0xB67D, 0x79E9, 0xD6C8, 0x79EA, 0xB67E, + 0x79EB, 0xEFF8, 0x79EC, 0xB680, 0x79ED, 0xEFF6, 0x79EE, 0xB681, + 0x79EF, 0xBBFD, 0x79F0, 0xB3C6, 0x79F1, 0xB682, 0x79F2, 0xB683, + 0x79F3, 0xB684, 0x79F4, 0xB685, 0x79F5, 0xB686, 0x79F6, 0xB687, + 0x79F7, 0xB688, 0x79F8, 0xBDD5, 0x79F9, 0xB689, 0x79FA, 0xB68A, + 0x79FB, 0xD2C6, 0x79FC, 0xB68B, 0x79FD, 0xBBE0, 0x79FE, 0xB68C, + 0x79FF, 0xB68D, 0x7A00, 0xCFA1, 0x7A01, 0xB68E, 0x7A02, 0xEFFC, + 0x7A03, 0xEFFB, 0x7A04, 0xB68F, 0x7A05, 0xB690, 0x7A06, 0xEFF9, + 0x7A07, 0xB691, 0x7A08, 0xB692, 0x7A09, 0xB693, 0x7A0A, 0xB694, + 0x7A0B, 0xB3CC, 0x7A0C, 0xB695, 0x7A0D, 0xC9D4, 0x7A0E, 0xCBB0, + 0x7A0F, 0xB696, 0x7A10, 0xB697, 0x7A11, 0xB698, 0x7A12, 0xB699, + 0x7A13, 0xB69A, 0x7A14, 0xEFFE, 0x7A15, 0xB69B, 0x7A16, 0xB69C, + 0x7A17, 0xB0DE, 0x7A18, 0xB69D, 0x7A19, 0xB69E, 0x7A1A, 0xD6C9, + 0x7A1B, 0xB69F, 0x7A1C, 0xB6A0, 0x7A1D, 0xB740, 0x7A1E, 0xEFFD, + 0x7A1F, 0xB741, 0x7A20, 0xB3ED, 0x7A21, 0xB742, 0x7A22, 0xB743, + 0x7A23, 0xF6D5, 0x7A24, 0xB744, 0x7A25, 0xB745, 0x7A26, 0xB746, + 0x7A27, 0xB747, 0x7A28, 0xB748, 0x7A29, 0xB749, 0x7A2A, 0xB74A, + 0x7A2B, 0xB74B, 0x7A2C, 0xB74C, 0x7A2D, 0xB74D, 0x7A2E, 0xB74E, + 0x7A2F, 0xB74F, 0x7A30, 0xB750, 0x7A31, 0xB751, 0x7A32, 0xB752, + 0x7A33, 0xCEC8, 0x7A34, 0xB753, 0x7A35, 0xB754, 0x7A36, 0xB755, + 0x7A37, 0xF0A2, 0x7A38, 0xB756, 0x7A39, 0xF0A1, 0x7A3A, 0xB757, + 0x7A3B, 0xB5BE, 0x7A3C, 0xBCDA, 0x7A3D, 0xBBFC, 0x7A3E, 0xB758, + 0x7A3F, 0xB8E5, 0x7A40, 0xB759, 0x7A41, 0xB75A, 0x7A42, 0xB75B, + 0x7A43, 0xB75C, 0x7A44, 0xB75D, 0x7A45, 0xB75E, 0x7A46, 0xC4C2, + 0x7A47, 0xB75F, 0x7A48, 0xB760, 0x7A49, 0xB761, 0x7A4A, 0xB762, + 0x7A4B, 0xB763, 0x7A4C, 0xB764, 0x7A4D, 0xB765, 0x7A4E, 0xB766, + 0x7A4F, 0xB767, 0x7A50, 0xB768, 0x7A51, 0xF0A3, 0x7A52, 0xB769, + 0x7A53, 0xB76A, 0x7A54, 0xB76B, 0x7A55, 0xB76C, 0x7A56, 0xB76D, + 0x7A57, 0xCBEB, 0x7A58, 0xB76E, 0x7A59, 0xB76F, 0x7A5A, 0xB770, + 0x7A5B, 0xB771, 0x7A5C, 0xB772, 0x7A5D, 0xB773, 0x7A5E, 0xB774, + 0x7A5F, 0xB775, 0x7A60, 0xB776, 0x7A61, 0xB777, 0x7A62, 0xB778, + 0x7A63, 0xB779, 0x7A64, 0xB77A, 0x7A65, 0xB77B, 0x7A66, 0xB77C, + 0x7A67, 0xB77D, 0x7A68, 0xB77E, 0x7A69, 0xB780, 0x7A6A, 0xB781, + 0x7A6B, 0xB782, 0x7A6C, 0xB783, 0x7A6D, 0xB784, 0x7A6E, 0xB785, + 0x7A6F, 0xB786, 0x7A70, 0xF0A6, 0x7A71, 0xB787, 0x7A72, 0xB788, + 0x7A73, 0xB789, 0x7A74, 0xD1A8, 0x7A75, 0xB78A, 0x7A76, 0xBEBF, + 0x7A77, 0xC7EE, 0x7A78, 0xF1B6, 0x7A79, 0xF1B7, 0x7A7A, 0xBFD5, + 0x7A7B, 0xB78B, 0x7A7C, 0xB78C, 0x7A7D, 0xB78D, 0x7A7E, 0xB78E, + 0x7A7F, 0xB4A9, 0x7A80, 0xF1B8, 0x7A81, 0xCDBB, 0x7A82, 0xB78F, + 0x7A83, 0xC7D4, 0x7A84, 0xD5AD, 0x7A85, 0xB790, 0x7A86, 0xF1B9, + 0x7A87, 0xB791, 0x7A88, 0xF1BA, 0x7A89, 0xB792, 0x7A8A, 0xB793, + 0x7A8B, 0xB794, 0x7A8C, 0xB795, 0x7A8D, 0xC7CF, 0x7A8E, 0xB796, + 0x7A8F, 0xB797, 0x7A90, 0xB798, 0x7A91, 0xD2A4, 0x7A92, 0xD6CF, + 0x7A93, 0xB799, 0x7A94, 0xB79A, 0x7A95, 0xF1BB, 0x7A96, 0xBDD1, + 0x7A97, 0xB4B0, 0x7A98, 0xBEBD, 0x7A99, 0xB79B, 0x7A9A, 0xB79C, + 0x7A9B, 0xB79D, 0x7A9C, 0xB4DC, 0x7A9D, 0xCED1, 0x7A9E, 0xB79E, + 0x7A9F, 0xBFDF, 0x7AA0, 0xF1BD, 0x7AA1, 0xB79F, 0x7AA2, 0xB7A0, + 0x7AA3, 0xB840, 0x7AA4, 0xB841, 0x7AA5, 0xBFFA, 0x7AA6, 0xF1BC, + 0x7AA7, 0xB842, 0x7AA8, 0xF1BF, 0x7AA9, 0xB843, 0x7AAA, 0xB844, + 0x7AAB, 0xB845, 0x7AAC, 0xF1BE, 0x7AAD, 0xF1C0, 0x7AAE, 0xB846, + 0x7AAF, 0xB847, 0x7AB0, 0xB848, 0x7AB1, 0xB849, 0x7AB2, 0xB84A, + 0x7AB3, 0xF1C1, 0x7AB4, 0xB84B, 0x7AB5, 0xB84C, 0x7AB6, 0xB84D, + 0x7AB7, 0xB84E, 0x7AB8, 0xB84F, 0x7AB9, 0xB850, 0x7ABA, 0xB851, + 0x7ABB, 0xB852, 0x7ABC, 0xB853, 0x7ABD, 0xB854, 0x7ABE, 0xB855, + 0x7ABF, 0xC1FE, 0x7AC0, 0xB856, 0x7AC1, 0xB857, 0x7AC2, 0xB858, + 0x7AC3, 0xB859, 0x7AC4, 0xB85A, 0x7AC5, 0xB85B, 0x7AC6, 0xB85C, + 0x7AC7, 0xB85D, 0x7AC8, 0xB85E, 0x7AC9, 0xB85F, 0x7ACA, 0xB860, + 0x7ACB, 0xC1A2, 0x7ACC, 0xB861, 0x7ACD, 0xB862, 0x7ACE, 0xB863, + 0x7ACF, 0xB864, 0x7AD0, 0xB865, 0x7AD1, 0xB866, 0x7AD2, 0xB867, + 0x7AD3, 0xB868, 0x7AD4, 0xB869, 0x7AD5, 0xB86A, 0x7AD6, 0xCAFA, + 0x7AD7, 0xB86B, 0x7AD8, 0xB86C, 0x7AD9, 0xD5BE, 0x7ADA, 0xB86D, + 0x7ADB, 0xB86E, 0x7ADC, 0xB86F, 0x7ADD, 0xB870, 0x7ADE, 0xBEBA, + 0x7ADF, 0xBEB9, 0x7AE0, 0xD5C2, 0x7AE1, 0xB871, 0x7AE2, 0xB872, + 0x7AE3, 0xBFA2, 0x7AE4, 0xB873, 0x7AE5, 0xCDAF, 0x7AE6, 0xF1B5, + 0x7AE7, 0xB874, 0x7AE8, 0xB875, 0x7AE9, 0xB876, 0x7AEA, 0xB877, + 0x7AEB, 0xB878, 0x7AEC, 0xB879, 0x7AED, 0xBDDF, 0x7AEE, 0xB87A, + 0x7AEF, 0xB6CB, 0x7AF0, 0xB87B, 0x7AF1, 0xB87C, 0x7AF2, 0xB87D, + 0x7AF3, 0xB87E, 0x7AF4, 0xB880, 0x7AF5, 0xB881, 0x7AF6, 0xB882, + 0x7AF7, 0xB883, 0x7AF8, 0xB884, 0x7AF9, 0xD6F1, 0x7AFA, 0xF3C3, + 0x7AFB, 0xB885, 0x7AFC, 0xB886, 0x7AFD, 0xF3C4, 0x7AFE, 0xB887, + 0x7AFF, 0xB8CD, 0x7B00, 0xB888, 0x7B01, 0xB889, 0x7B02, 0xB88A, + 0x7B03, 0xF3C6, 0x7B04, 0xF3C7, 0x7B05, 0xB88B, 0x7B06, 0xB0CA, + 0x7B07, 0xB88C, 0x7B08, 0xF3C5, 0x7B09, 0xB88D, 0x7B0A, 0xF3C9, + 0x7B0B, 0xCBF1, 0x7B0C, 0xB88E, 0x7B0D, 0xB88F, 0x7B0E, 0xB890, + 0x7B0F, 0xF3CB, 0x7B10, 0xB891, 0x7B11, 0xD0A6, 0x7B12, 0xB892, + 0x7B13, 0xB893, 0x7B14, 0xB1CA, 0x7B15, 0xF3C8, 0x7B16, 0xB894, + 0x7B17, 0xB895, 0x7B18, 0xB896, 0x7B19, 0xF3CF, 0x7B1A, 0xB897, + 0x7B1B, 0xB5D1, 0x7B1C, 0xB898, 0x7B1D, 0xB899, 0x7B1E, 0xF3D7, + 0x7B1F, 0xB89A, 0x7B20, 0xF3D2, 0x7B21, 0xB89B, 0x7B22, 0xB89C, + 0x7B23, 0xB89D, 0x7B24, 0xF3D4, 0x7B25, 0xF3D3, 0x7B26, 0xB7FB, + 0x7B27, 0xB89E, 0x7B28, 0xB1BF, 0x7B29, 0xB89F, 0x7B2A, 0xF3CE, + 0x7B2B, 0xF3CA, 0x7B2C, 0xB5DA, 0x7B2D, 0xB8A0, 0x7B2E, 0xF3D0, + 0x7B2F, 0xB940, 0x7B30, 0xB941, 0x7B31, 0xF3D1, 0x7B32, 0xB942, + 0x7B33, 0xF3D5, 0x7B34, 0xB943, 0x7B35, 0xB944, 0x7B36, 0xB945, + 0x7B37, 0xB946, 0x7B38, 0xF3CD, 0x7B39, 0xB947, 0x7B3A, 0xBCE3, + 0x7B3B, 0xB948, 0x7B3C, 0xC1FD, 0x7B3D, 0xB949, 0x7B3E, 0xF3D6, + 0x7B3F, 0xB94A, 0x7B40, 0xB94B, 0x7B41, 0xB94C, 0x7B42, 0xB94D, + 0x7B43, 0xB94E, 0x7B44, 0xB94F, 0x7B45, 0xF3DA, 0x7B46, 0xB950, + 0x7B47, 0xF3CC, 0x7B48, 0xB951, 0x7B49, 0xB5C8, 0x7B4A, 0xB952, + 0x7B4B, 0xBDEE, 0x7B4C, 0xF3DC, 0x7B4D, 0xB953, 0x7B4E, 0xB954, + 0x7B4F, 0xB7A4, 0x7B50, 0xBFF0, 0x7B51, 0xD6FE, 0x7B52, 0xCDB2, + 0x7B53, 0xB955, 0x7B54, 0xB4F0, 0x7B55, 0xB956, 0x7B56, 0xB2DF, + 0x7B57, 0xB957, 0x7B58, 0xF3D8, 0x7B59, 0xB958, 0x7B5A, 0xF3D9, + 0x7B5B, 0xC9B8, 0x7B5C, 0xB959, 0x7B5D, 0xF3DD, 0x7B5E, 0xB95A, + 0x7B5F, 0xB95B, 0x7B60, 0xF3DE, 0x7B61, 0xB95C, 0x7B62, 0xF3E1, + 0x7B63, 0xB95D, 0x7B64, 0xB95E, 0x7B65, 0xB95F, 0x7B66, 0xB960, + 0x7B67, 0xB961, 0x7B68, 0xB962, 0x7B69, 0xB963, 0x7B6A, 0xB964, + 0x7B6B, 0xB965, 0x7B6C, 0xB966, 0x7B6D, 0xB967, 0x7B6E, 0xF3DF, + 0x7B6F, 0xB968, 0x7B70, 0xB969, 0x7B71, 0xF3E3, 0x7B72, 0xF3E2, + 0x7B73, 0xB96A, 0x7B74, 0xB96B, 0x7B75, 0xF3DB, 0x7B76, 0xB96C, + 0x7B77, 0xBFEA, 0x7B78, 0xB96D, 0x7B79, 0xB3EF, 0x7B7A, 0xB96E, + 0x7B7B, 0xF3E0, 0x7B7C, 0xB96F, 0x7B7D, 0xB970, 0x7B7E, 0xC7A9, + 0x7B7F, 0xB971, 0x7B80, 0xBCF2, 0x7B81, 0xB972, 0x7B82, 0xB973, + 0x7B83, 0xB974, 0x7B84, 0xB975, 0x7B85, 0xF3EB, 0x7B86, 0xB976, + 0x7B87, 0xB977, 0x7B88, 0xB978, 0x7B89, 0xB979, 0x7B8A, 0xB97A, + 0x7B8B, 0xB97B, 0x7B8C, 0xB97C, 0x7B8D, 0xB9BF, 0x7B8E, 0xB97D, + 0x7B8F, 0xB97E, 0x7B90, 0xF3E4, 0x7B91, 0xB980, 0x7B92, 0xB981, + 0x7B93, 0xB982, 0x7B94, 0xB2AD, 0x7B95, 0xBBFE, 0x7B96, 0xB983, + 0x7B97, 0xCBE3, 0x7B98, 0xB984, 0x7B99, 0xB985, 0x7B9A, 0xB986, + 0x7B9B, 0xB987, 0x7B9C, 0xF3ED, 0x7B9D, 0xF3E9, 0x7B9E, 0xB988, + 0x7B9F, 0xB989, 0x7BA0, 0xB98A, 0x7BA1, 0xB9DC, 0x7BA2, 0xF3EE, + 0x7BA3, 0xB98B, 0x7BA4, 0xB98C, 0x7BA5, 0xB98D, 0x7BA6, 0xF3E5, + 0x7BA7, 0xF3E6, 0x7BA8, 0xF3EA, 0x7BA9, 0xC2E1, 0x7BAA, 0xF3EC, + 0x7BAB, 0xF3EF, 0x7BAC, 0xF3E8, 0x7BAD, 0xBCFD, 0x7BAE, 0xB98E, + 0x7BAF, 0xB98F, 0x7BB0, 0xB990, 0x7BB1, 0xCFE4, 0x7BB2, 0xB991, + 0x7BB3, 0xB992, 0x7BB4, 0xF3F0, 0x7BB5, 0xB993, 0x7BB6, 0xB994, + 0x7BB7, 0xB995, 0x7BB8, 0xF3E7, 0x7BB9, 0xB996, 0x7BBA, 0xB997, + 0x7BBB, 0xB998, 0x7BBC, 0xB999, 0x7BBD, 0xB99A, 0x7BBE, 0xB99B, + 0x7BBF, 0xB99C, 0x7BC0, 0xB99D, 0x7BC1, 0xF3F2, 0x7BC2, 0xB99E, + 0x7BC3, 0xB99F, 0x7BC4, 0xB9A0, 0x7BC5, 0xBA40, 0x7BC6, 0xD7AD, + 0x7BC7, 0xC6AA, 0x7BC8, 0xBA41, 0x7BC9, 0xBA42, 0x7BCA, 0xBA43, + 0x7BCB, 0xBA44, 0x7BCC, 0xF3F3, 0x7BCD, 0xBA45, 0x7BCE, 0xBA46, + 0x7BCF, 0xBA47, 0x7BD0, 0xBA48, 0x7BD1, 0xF3F1, 0x7BD2, 0xBA49, + 0x7BD3, 0xC2A8, 0x7BD4, 0xBA4A, 0x7BD5, 0xBA4B, 0x7BD6, 0xBA4C, + 0x7BD7, 0xBA4D, 0x7BD8, 0xBA4E, 0x7BD9, 0xB8DD, 0x7BDA, 0xF3F5, + 0x7BDB, 0xBA4F, 0x7BDC, 0xBA50, 0x7BDD, 0xF3F4, 0x7BDE, 0xBA51, + 0x7BDF, 0xBA52, 0x7BE0, 0xBA53, 0x7BE1, 0xB4DB, 0x7BE2, 0xBA54, + 0x7BE3, 0xBA55, 0x7BE4, 0xBA56, 0x7BE5, 0xF3F6, 0x7BE6, 0xF3F7, + 0x7BE7, 0xBA57, 0x7BE8, 0xBA58, 0x7BE9, 0xBA59, 0x7BEA, 0xF3F8, + 0x7BEB, 0xBA5A, 0x7BEC, 0xBA5B, 0x7BED, 0xBA5C, 0x7BEE, 0xC0BA, + 0x7BEF, 0xBA5D, 0x7BF0, 0xBA5E, 0x7BF1, 0xC0E9, 0x7BF2, 0xBA5F, + 0x7BF3, 0xBA60, 0x7BF4, 0xBA61, 0x7BF5, 0xBA62, 0x7BF6, 0xBA63, + 0x7BF7, 0xC5F1, 0x7BF8, 0xBA64, 0x7BF9, 0xBA65, 0x7BFA, 0xBA66, + 0x7BFB, 0xBA67, 0x7BFC, 0xF3FB, 0x7BFD, 0xBA68, 0x7BFE, 0xF3FA, + 0x7BFF, 0xBA69, 0x7C00, 0xBA6A, 0x7C01, 0xBA6B, 0x7C02, 0xBA6C, + 0x7C03, 0xBA6D, 0x7C04, 0xBA6E, 0x7C05, 0xBA6F, 0x7C06, 0xBA70, + 0x7C07, 0xB4D8, 0x7C08, 0xBA71, 0x7C09, 0xBA72, 0x7C0A, 0xBA73, + 0x7C0B, 0xF3FE, 0x7C0C, 0xF3F9, 0x7C0D, 0xBA74, 0x7C0E, 0xBA75, + 0x7C0F, 0xF3FC, 0x7C10, 0xBA76, 0x7C11, 0xBA77, 0x7C12, 0xBA78, + 0x7C13, 0xBA79, 0x7C14, 0xBA7A, 0x7C15, 0xBA7B, 0x7C16, 0xF3FD, + 0x7C17, 0xBA7C, 0x7C18, 0xBA7D, 0x7C19, 0xBA7E, 0x7C1A, 0xBA80, + 0x7C1B, 0xBA81, 0x7C1C, 0xBA82, 0x7C1D, 0xBA83, 0x7C1E, 0xBA84, + 0x7C1F, 0xF4A1, 0x7C20, 0xBA85, 0x7C21, 0xBA86, 0x7C22, 0xBA87, + 0x7C23, 0xBA88, 0x7C24, 0xBA89, 0x7C25, 0xBA8A, 0x7C26, 0xF4A3, + 0x7C27, 0xBBC9, 0x7C28, 0xBA8B, 0x7C29, 0xBA8C, 0x7C2A, 0xF4A2, + 0x7C2B, 0xBA8D, 0x7C2C, 0xBA8E, 0x7C2D, 0xBA8F, 0x7C2E, 0xBA90, + 0x7C2F, 0xBA91, 0x7C30, 0xBA92, 0x7C31, 0xBA93, 0x7C32, 0xBA94, + 0x7C33, 0xBA95, 0x7C34, 0xBA96, 0x7C35, 0xBA97, 0x7C36, 0xBA98, + 0x7C37, 0xBA99, 0x7C38, 0xF4A4, 0x7C39, 0xBA9A, 0x7C3A, 0xBA9B, + 0x7C3B, 0xBA9C, 0x7C3C, 0xBA9D, 0x7C3D, 0xBA9E, 0x7C3E, 0xBA9F, + 0x7C3F, 0xB2BE, 0x7C40, 0xF4A6, 0x7C41, 0xF4A5, 0x7C42, 0xBAA0, + 0x7C43, 0xBB40, 0x7C44, 0xBB41, 0x7C45, 0xBB42, 0x7C46, 0xBB43, + 0x7C47, 0xBB44, 0x7C48, 0xBB45, 0x7C49, 0xBB46, 0x7C4A, 0xBB47, + 0x7C4B, 0xBB48, 0x7C4C, 0xBB49, 0x7C4D, 0xBCAE, 0x7C4E, 0xBB4A, + 0x7C4F, 0xBB4B, 0x7C50, 0xBB4C, 0x7C51, 0xBB4D, 0x7C52, 0xBB4E, + 0x7C53, 0xBB4F, 0x7C54, 0xBB50, 0x7C55, 0xBB51, 0x7C56, 0xBB52, + 0x7C57, 0xBB53, 0x7C58, 0xBB54, 0x7C59, 0xBB55, 0x7C5A, 0xBB56, + 0x7C5B, 0xBB57, 0x7C5C, 0xBB58, 0x7C5D, 0xBB59, 0x7C5E, 0xBB5A, + 0x7C5F, 0xBB5B, 0x7C60, 0xBB5C, 0x7C61, 0xBB5D, 0x7C62, 0xBB5E, + 0x7C63, 0xBB5F, 0x7C64, 0xBB60, 0x7C65, 0xBB61, 0x7C66, 0xBB62, + 0x7C67, 0xBB63, 0x7C68, 0xBB64, 0x7C69, 0xBB65, 0x7C6A, 0xBB66, + 0x7C6B, 0xBB67, 0x7C6C, 0xBB68, 0x7C6D, 0xBB69, 0x7C6E, 0xBB6A, + 0x7C6F, 0xBB6B, 0x7C70, 0xBB6C, 0x7C71, 0xBB6D, 0x7C72, 0xBB6E, + 0x7C73, 0xC3D7, 0x7C74, 0xD9E1, 0x7C75, 0xBB6F, 0x7C76, 0xBB70, + 0x7C77, 0xBB71, 0x7C78, 0xBB72, 0x7C79, 0xBB73, 0x7C7A, 0xBB74, + 0x7C7B, 0xC0E0, 0x7C7C, 0xF4CC, 0x7C7D, 0xD7D1, 0x7C7E, 0xBB75, + 0x7C7F, 0xBB76, 0x7C80, 0xBB77, 0x7C81, 0xBB78, 0x7C82, 0xBB79, + 0x7C83, 0xBB7A, 0x7C84, 0xBB7B, 0x7C85, 0xBB7C, 0x7C86, 0xBB7D, + 0x7C87, 0xBB7E, 0x7C88, 0xBB80, 0x7C89, 0xB7DB, 0x7C8A, 0xBB81, + 0x7C8B, 0xBB82, 0x7C8C, 0xBB83, 0x7C8D, 0xBB84, 0x7C8E, 0xBB85, + 0x7C8F, 0xBB86, 0x7C90, 0xBB87, 0x7C91, 0xF4CE, 0x7C92, 0xC1A3, + 0x7C93, 0xBB88, 0x7C94, 0xBB89, 0x7C95, 0xC6C9, 0x7C96, 0xBB8A, + 0x7C97, 0xB4D6, 0x7C98, 0xD5B3, 0x7C99, 0xBB8B, 0x7C9A, 0xBB8C, + 0x7C9B, 0xBB8D, 0x7C9C, 0xF4D0, 0x7C9D, 0xF4CF, 0x7C9E, 0xF4D1, + 0x7C9F, 0xCBDA, 0x7CA0, 0xBB8E, 0x7CA1, 0xBB8F, 0x7CA2, 0xF4D2, + 0x7CA3, 0xBB90, 0x7CA4, 0xD4C1, 0x7CA5, 0xD6E0, 0x7CA6, 0xBB91, + 0x7CA7, 0xBB92, 0x7CA8, 0xBB93, 0x7CA9, 0xBB94, 0x7CAA, 0xB7E0, + 0x7CAB, 0xBB95, 0x7CAC, 0xBB96, 0x7CAD, 0xBB97, 0x7CAE, 0xC1B8, + 0x7CAF, 0xBB98, 0x7CB0, 0xBB99, 0x7CB1, 0xC1BB, 0x7CB2, 0xF4D3, + 0x7CB3, 0xBEAC, 0x7CB4, 0xBB9A, 0x7CB5, 0xBB9B, 0x7CB6, 0xBB9C, + 0x7CB7, 0xBB9D, 0x7CB8, 0xBB9E, 0x7CB9, 0xB4E2, 0x7CBA, 0xBB9F, + 0x7CBB, 0xBBA0, 0x7CBC, 0xF4D4, 0x7CBD, 0xF4D5, 0x7CBE, 0xBEAB, + 0x7CBF, 0xBC40, 0x7CC0, 0xBC41, 0x7CC1, 0xF4D6, 0x7CC2, 0xBC42, + 0x7CC3, 0xBC43, 0x7CC4, 0xBC44, 0x7CC5, 0xF4DB, 0x7CC6, 0xBC45, + 0x7CC7, 0xF4D7, 0x7CC8, 0xF4DA, 0x7CC9, 0xBC46, 0x7CCA, 0xBAFD, + 0x7CCB, 0xBC47, 0x7CCC, 0xF4D8, 0x7CCD, 0xF4D9, 0x7CCE, 0xBC48, + 0x7CCF, 0xBC49, 0x7CD0, 0xBC4A, 0x7CD1, 0xBC4B, 0x7CD2, 0xBC4C, + 0x7CD3, 0xBC4D, 0x7CD4, 0xBC4E, 0x7CD5, 0xB8E2, 0x7CD6, 0xCCC7, + 0x7CD7, 0xF4DC, 0x7CD8, 0xBC4F, 0x7CD9, 0xB2DA, 0x7CDA, 0xBC50, + 0x7CDB, 0xBC51, 0x7CDC, 0xC3D3, 0x7CDD, 0xBC52, 0x7CDE, 0xBC53, + 0x7CDF, 0xD4E3, 0x7CE0, 0xBFB7, 0x7CE1, 0xBC54, 0x7CE2, 0xBC55, + 0x7CE3, 0xBC56, 0x7CE4, 0xBC57, 0x7CE5, 0xBC58, 0x7CE6, 0xBC59, + 0x7CE7, 0xBC5A, 0x7CE8, 0xF4DD, 0x7CE9, 0xBC5B, 0x7CEA, 0xBC5C, + 0x7CEB, 0xBC5D, 0x7CEC, 0xBC5E, 0x7CED, 0xBC5F, 0x7CEE, 0xBC60, + 0x7CEF, 0xC5B4, 0x7CF0, 0xBC61, 0x7CF1, 0xBC62, 0x7CF2, 0xBC63, + 0x7CF3, 0xBC64, 0x7CF4, 0xBC65, 0x7CF5, 0xBC66, 0x7CF6, 0xBC67, + 0x7CF7, 0xBC68, 0x7CF8, 0xF4E9, 0x7CF9, 0xBC69, 0x7CFA, 0xBC6A, + 0x7CFB, 0xCFB5, 0x7CFC, 0xBC6B, 0x7CFD, 0xBC6C, 0x7CFE, 0xBC6D, + 0x7CFF, 0xBC6E, 0x7D00, 0xBC6F, 0x7D01, 0xBC70, 0x7D02, 0xBC71, + 0x7D03, 0xBC72, 0x7D04, 0xBC73, 0x7D05, 0xBC74, 0x7D06, 0xBC75, + 0x7D07, 0xBC76, 0x7D08, 0xBC77, 0x7D09, 0xBC78, 0x7D0A, 0xCEC9, + 0x7D0B, 0xBC79, 0x7D0C, 0xBC7A, 0x7D0D, 0xBC7B, 0x7D0E, 0xBC7C, + 0x7D0F, 0xBC7D, 0x7D10, 0xBC7E, 0x7D11, 0xBC80, 0x7D12, 0xBC81, + 0x7D13, 0xBC82, 0x7D14, 0xBC83, 0x7D15, 0xBC84, 0x7D16, 0xBC85, + 0x7D17, 0xBC86, 0x7D18, 0xBC87, 0x7D19, 0xBC88, 0x7D1A, 0xBC89, + 0x7D1B, 0xBC8A, 0x7D1C, 0xBC8B, 0x7D1D, 0xBC8C, 0x7D1E, 0xBC8D, + 0x7D1F, 0xBC8E, 0x7D20, 0xCBD8, 0x7D21, 0xBC8F, 0x7D22, 0xCBF7, + 0x7D23, 0xBC90, 0x7D24, 0xBC91, 0x7D25, 0xBC92, 0x7D26, 0xBC93, + 0x7D27, 0xBDF4, 0x7D28, 0xBC94, 0x7D29, 0xBC95, 0x7D2A, 0xBC96, + 0x7D2B, 0xD7CF, 0x7D2C, 0xBC97, 0x7D2D, 0xBC98, 0x7D2E, 0xBC99, + 0x7D2F, 0xC0DB, 0x7D30, 0xBC9A, 0x7D31, 0xBC9B, 0x7D32, 0xBC9C, + 0x7D33, 0xBC9D, 0x7D34, 0xBC9E, 0x7D35, 0xBC9F, 0x7D36, 0xBCA0, + 0x7D37, 0xBD40, 0x7D38, 0xBD41, 0x7D39, 0xBD42, 0x7D3A, 0xBD43, + 0x7D3B, 0xBD44, 0x7D3C, 0xBD45, 0x7D3D, 0xBD46, 0x7D3E, 0xBD47, + 0x7D3F, 0xBD48, 0x7D40, 0xBD49, 0x7D41, 0xBD4A, 0x7D42, 0xBD4B, + 0x7D43, 0xBD4C, 0x7D44, 0xBD4D, 0x7D45, 0xBD4E, 0x7D46, 0xBD4F, + 0x7D47, 0xBD50, 0x7D48, 0xBD51, 0x7D49, 0xBD52, 0x7D4A, 0xBD53, + 0x7D4B, 0xBD54, 0x7D4C, 0xBD55, 0x7D4D, 0xBD56, 0x7D4E, 0xBD57, + 0x7D4F, 0xBD58, 0x7D50, 0xBD59, 0x7D51, 0xBD5A, 0x7D52, 0xBD5B, + 0x7D53, 0xBD5C, 0x7D54, 0xBD5D, 0x7D55, 0xBD5E, 0x7D56, 0xBD5F, + 0x7D57, 0xBD60, 0x7D58, 0xBD61, 0x7D59, 0xBD62, 0x7D5A, 0xBD63, + 0x7D5B, 0xBD64, 0x7D5C, 0xBD65, 0x7D5D, 0xBD66, 0x7D5E, 0xBD67, + 0x7D5F, 0xBD68, 0x7D60, 0xBD69, 0x7D61, 0xBD6A, 0x7D62, 0xBD6B, + 0x7D63, 0xBD6C, 0x7D64, 0xBD6D, 0x7D65, 0xBD6E, 0x7D66, 0xBD6F, + 0x7D67, 0xBD70, 0x7D68, 0xBD71, 0x7D69, 0xBD72, 0x7D6A, 0xBD73, + 0x7D6B, 0xBD74, 0x7D6C, 0xBD75, 0x7D6D, 0xBD76, 0x7D6E, 0xD0F5, + 0x7D6F, 0xBD77, 0x7D70, 0xBD78, 0x7D71, 0xBD79, 0x7D72, 0xBD7A, + 0x7D73, 0xBD7B, 0x7D74, 0xBD7C, 0x7D75, 0xBD7D, 0x7D76, 0xBD7E, + 0x7D77, 0xF4EA, 0x7D78, 0xBD80, 0x7D79, 0xBD81, 0x7D7A, 0xBD82, + 0x7D7B, 0xBD83, 0x7D7C, 0xBD84, 0x7D7D, 0xBD85, 0x7D7E, 0xBD86, + 0x7D7F, 0xBD87, 0x7D80, 0xBD88, 0x7D81, 0xBD89, 0x7D82, 0xBD8A, + 0x7D83, 0xBD8B, 0x7D84, 0xBD8C, 0x7D85, 0xBD8D, 0x7D86, 0xBD8E, + 0x7D87, 0xBD8F, 0x7D88, 0xBD90, 0x7D89, 0xBD91, 0x7D8A, 0xBD92, + 0x7D8B, 0xBD93, 0x7D8C, 0xBD94, 0x7D8D, 0xBD95, 0x7D8E, 0xBD96, + 0x7D8F, 0xBD97, 0x7D90, 0xBD98, 0x7D91, 0xBD99, 0x7D92, 0xBD9A, + 0x7D93, 0xBD9B, 0x7D94, 0xBD9C, 0x7D95, 0xBD9D, 0x7D96, 0xBD9E, + 0x7D97, 0xBD9F, 0x7D98, 0xBDA0, 0x7D99, 0xBE40, 0x7D9A, 0xBE41, + 0x7D9B, 0xBE42, 0x7D9C, 0xBE43, 0x7D9D, 0xBE44, 0x7D9E, 0xBE45, + 0x7D9F, 0xBE46, 0x7DA0, 0xBE47, 0x7DA1, 0xBE48, 0x7DA2, 0xBE49, + 0x7DA3, 0xBE4A, 0x7DA4, 0xBE4B, 0x7DA5, 0xBE4C, 0x7DA6, 0xF4EB, + 0x7DA7, 0xBE4D, 0x7DA8, 0xBE4E, 0x7DA9, 0xBE4F, 0x7DAA, 0xBE50, + 0x7DAB, 0xBE51, 0x7DAC, 0xBE52, 0x7DAD, 0xBE53, 0x7DAE, 0xF4EC, + 0x7DAF, 0xBE54, 0x7DB0, 0xBE55, 0x7DB1, 0xBE56, 0x7DB2, 0xBE57, + 0x7DB3, 0xBE58, 0x7DB4, 0xBE59, 0x7DB5, 0xBE5A, 0x7DB6, 0xBE5B, + 0x7DB7, 0xBE5C, 0x7DB8, 0xBE5D, 0x7DB9, 0xBE5E, 0x7DBA, 0xBE5F, + 0x7DBB, 0xBE60, 0x7DBC, 0xBE61, 0x7DBD, 0xBE62, 0x7DBE, 0xBE63, + 0x7DBF, 0xBE64, 0x7DC0, 0xBE65, 0x7DC1, 0xBE66, 0x7DC2, 0xBE67, + 0x7DC3, 0xBE68, 0x7DC4, 0xBE69, 0x7DC5, 0xBE6A, 0x7DC6, 0xBE6B, + 0x7DC7, 0xBE6C, 0x7DC8, 0xBE6D, 0x7DC9, 0xBE6E, 0x7DCA, 0xBE6F, + 0x7DCB, 0xBE70, 0x7DCC, 0xBE71, 0x7DCD, 0xBE72, 0x7DCE, 0xBE73, + 0x7DCF, 0xBE74, 0x7DD0, 0xBE75, 0x7DD1, 0xBE76, 0x7DD2, 0xBE77, + 0x7DD3, 0xBE78, 0x7DD4, 0xBE79, 0x7DD5, 0xBE7A, 0x7DD6, 0xBE7B, + 0x7DD7, 0xBE7C, 0x7DD8, 0xBE7D, 0x7DD9, 0xBE7E, 0x7DDA, 0xBE80, + 0x7DDB, 0xBE81, 0x7DDC, 0xBE82, 0x7DDD, 0xBE83, 0x7DDE, 0xBE84, + 0x7DDF, 0xBE85, 0x7DE0, 0xBE86, 0x7DE1, 0xBE87, 0x7DE2, 0xBE88, + 0x7DE3, 0xBE89, 0x7DE4, 0xBE8A, 0x7DE5, 0xBE8B, 0x7DE6, 0xBE8C, + 0x7DE7, 0xBE8D, 0x7DE8, 0xBE8E, 0x7DE9, 0xBE8F, 0x7DEA, 0xBE90, + 0x7DEB, 0xBE91, 0x7DEC, 0xBE92, 0x7DED, 0xBE93, 0x7DEE, 0xBE94, + 0x7DEF, 0xBE95, 0x7DF0, 0xBE96, 0x7DF1, 0xBE97, 0x7DF2, 0xBE98, + 0x7DF3, 0xBE99, 0x7DF4, 0xBE9A, 0x7DF5, 0xBE9B, 0x7DF6, 0xBE9C, + 0x7DF7, 0xBE9D, 0x7DF8, 0xBE9E, 0x7DF9, 0xBE9F, 0x7DFA, 0xBEA0, + 0x7DFB, 0xBF40, 0x7DFC, 0xBF41, 0x7DFD, 0xBF42, 0x7DFE, 0xBF43, + 0x7DFF, 0xBF44, 0x7E00, 0xBF45, 0x7E01, 0xBF46, 0x7E02, 0xBF47, + 0x7E03, 0xBF48, 0x7E04, 0xBF49, 0x7E05, 0xBF4A, 0x7E06, 0xBF4B, + 0x7E07, 0xBF4C, 0x7E08, 0xBF4D, 0x7E09, 0xBF4E, 0x7E0A, 0xBF4F, + 0x7E0B, 0xBF50, 0x7E0C, 0xBF51, 0x7E0D, 0xBF52, 0x7E0E, 0xBF53, + 0x7E0F, 0xBF54, 0x7E10, 0xBF55, 0x7E11, 0xBF56, 0x7E12, 0xBF57, + 0x7E13, 0xBF58, 0x7E14, 0xBF59, 0x7E15, 0xBF5A, 0x7E16, 0xBF5B, + 0x7E17, 0xBF5C, 0x7E18, 0xBF5D, 0x7E19, 0xBF5E, 0x7E1A, 0xBF5F, + 0x7E1B, 0xBF60, 0x7E1C, 0xBF61, 0x7E1D, 0xBF62, 0x7E1E, 0xBF63, + 0x7E1F, 0xBF64, 0x7E20, 0xBF65, 0x7E21, 0xBF66, 0x7E22, 0xBF67, + 0x7E23, 0xBF68, 0x7E24, 0xBF69, 0x7E25, 0xBF6A, 0x7E26, 0xBF6B, + 0x7E27, 0xBF6C, 0x7E28, 0xBF6D, 0x7E29, 0xBF6E, 0x7E2A, 0xBF6F, + 0x7E2B, 0xBF70, 0x7E2C, 0xBF71, 0x7E2D, 0xBF72, 0x7E2E, 0xBF73, + 0x7E2F, 0xBF74, 0x7E30, 0xBF75, 0x7E31, 0xBF76, 0x7E32, 0xBF77, + 0x7E33, 0xBF78, 0x7E34, 0xBF79, 0x7E35, 0xBF7A, 0x7E36, 0xBF7B, + 0x7E37, 0xBF7C, 0x7E38, 0xBF7D, 0x7E39, 0xBF7E, 0x7E3A, 0xBF80, + 0x7E3B, 0xF7E3, 0x7E3C, 0xBF81, 0x7E3D, 0xBF82, 0x7E3E, 0xBF83, + 0x7E3F, 0xBF84, 0x7E40, 0xBF85, 0x7E41, 0xB7B1, 0x7E42, 0xBF86, + 0x7E43, 0xBF87, 0x7E44, 0xBF88, 0x7E45, 0xBF89, 0x7E46, 0xBF8A, + 0x7E47, 0xF4ED, 0x7E48, 0xBF8B, 0x7E49, 0xBF8C, 0x7E4A, 0xBF8D, + 0x7E4B, 0xBF8E, 0x7E4C, 0xBF8F, 0x7E4D, 0xBF90, 0x7E4E, 0xBF91, + 0x7E4F, 0xBF92, 0x7E50, 0xBF93, 0x7E51, 0xBF94, 0x7E52, 0xBF95, + 0x7E53, 0xBF96, 0x7E54, 0xBF97, 0x7E55, 0xBF98, 0x7E56, 0xBF99, + 0x7E57, 0xBF9A, 0x7E58, 0xBF9B, 0x7E59, 0xBF9C, 0x7E5A, 0xBF9D, + 0x7E5B, 0xBF9E, 0x7E5C, 0xBF9F, 0x7E5D, 0xBFA0, 0x7E5E, 0xC040, + 0x7E5F, 0xC041, 0x7E60, 0xC042, 0x7E61, 0xC043, 0x7E62, 0xC044, + 0x7E63, 0xC045, 0x7E64, 0xC046, 0x7E65, 0xC047, 0x7E66, 0xC048, + 0x7E67, 0xC049, 0x7E68, 0xC04A, 0x7E69, 0xC04B, 0x7E6A, 0xC04C, + 0x7E6B, 0xC04D, 0x7E6C, 0xC04E, 0x7E6D, 0xC04F, 0x7E6E, 0xC050, + 0x7E6F, 0xC051, 0x7E70, 0xC052, 0x7E71, 0xC053, 0x7E72, 0xC054, + 0x7E73, 0xC055, 0x7E74, 0xC056, 0x7E75, 0xC057, 0x7E76, 0xC058, + 0x7E77, 0xC059, 0x7E78, 0xC05A, 0x7E79, 0xC05B, 0x7E7A, 0xC05C, + 0x7E7B, 0xC05D, 0x7E7C, 0xC05E, 0x7E7D, 0xC05F, 0x7E7E, 0xC060, + 0x7E7F, 0xC061, 0x7E80, 0xC062, 0x7E81, 0xC063, 0x7E82, 0xD7EB, + 0x7E83, 0xC064, 0x7E84, 0xC065, 0x7E85, 0xC066, 0x7E86, 0xC067, + 0x7E87, 0xC068, 0x7E88, 0xC069, 0x7E89, 0xC06A, 0x7E8A, 0xC06B, + 0x7E8B, 0xC06C, 0x7E8C, 0xC06D, 0x7E8D, 0xC06E, 0x7E8E, 0xC06F, + 0x7E8F, 0xC070, 0x7E90, 0xC071, 0x7E91, 0xC072, 0x7E92, 0xC073, + 0x7E93, 0xC074, 0x7E94, 0xC075, 0x7E95, 0xC076, 0x7E96, 0xC077, + 0x7E97, 0xC078, 0x7E98, 0xC079, 0x7E99, 0xC07A, 0x7E9A, 0xC07B, + 0x7E9B, 0xF4EE, 0x7E9C, 0xC07C, 0x7E9D, 0xC07D, 0x7E9E, 0xC07E, + 0x7E9F, 0xE6F9, 0x7EA0, 0xBEC0, 0x7EA1, 0xE6FA, 0x7EA2, 0xBAEC, + 0x7EA3, 0xE6FB, 0x7EA4, 0xCFCB, 0x7EA5, 0xE6FC, 0x7EA6, 0xD4BC, + 0x7EA7, 0xBCB6, 0x7EA8, 0xE6FD, 0x7EA9, 0xE6FE, 0x7EAA, 0xBCCD, + 0x7EAB, 0xC8D2, 0x7EAC, 0xCEB3, 0x7EAD, 0xE7A1, 0x7EAE, 0xC080, + 0x7EAF, 0xB4BF, 0x7EB0, 0xE7A2, 0x7EB1, 0xC9B4, 0x7EB2, 0xB8D9, + 0x7EB3, 0xC4C9, 0x7EB4, 0xC081, 0x7EB5, 0xD7DD, 0x7EB6, 0xC2DA, + 0x7EB7, 0xB7D7, 0x7EB8, 0xD6BD, 0x7EB9, 0xCEC6, 0x7EBA, 0xB7C4, + 0x7EBB, 0xC082, 0x7EBC, 0xC083, 0x7EBD, 0xC5A6, 0x7EBE, 0xE7A3, + 0x7EBF, 0xCFDF, 0x7EC0, 0xE7A4, 0x7EC1, 0xE7A5, 0x7EC2, 0xE7A6, + 0x7EC3, 0xC1B7, 0x7EC4, 0xD7E9, 0x7EC5, 0xC9F0, 0x7EC6, 0xCFB8, + 0x7EC7, 0xD6AF, 0x7EC8, 0xD6D5, 0x7EC9, 0xE7A7, 0x7ECA, 0xB0ED, + 0x7ECB, 0xE7A8, 0x7ECC, 0xE7A9, 0x7ECD, 0xC9DC, 0x7ECE, 0xD2EF, + 0x7ECF, 0xBEAD, 0x7ED0, 0xE7AA, 0x7ED1, 0xB0F3, 0x7ED2, 0xC8DE, + 0x7ED3, 0xBDE1, 0x7ED4, 0xE7AB, 0x7ED5, 0xC8C6, 0x7ED6, 0xC084, + 0x7ED7, 0xE7AC, 0x7ED8, 0xBBE6, 0x7ED9, 0xB8F8, 0x7EDA, 0xD1A4, + 0x7EDB, 0xE7AD, 0x7EDC, 0xC2E7, 0x7EDD, 0xBEF8, 0x7EDE, 0xBDCA, + 0x7EDF, 0xCDB3, 0x7EE0, 0xE7AE, 0x7EE1, 0xE7AF, 0x7EE2, 0xBEEE, + 0x7EE3, 0xD0E5, 0x7EE4, 0xC085, 0x7EE5, 0xCBE7, 0x7EE6, 0xCCD0, + 0x7EE7, 0xBCCC, 0x7EE8, 0xE7B0, 0x7EE9, 0xBCA8, 0x7EEA, 0xD0F7, + 0x7EEB, 0xE7B1, 0x7EEC, 0xC086, 0x7EED, 0xD0F8, 0x7EEE, 0xE7B2, + 0x7EEF, 0xE7B3, 0x7EF0, 0xB4C2, 0x7EF1, 0xE7B4, 0x7EF2, 0xE7B5, + 0x7EF3, 0xC9FE, 0x7EF4, 0xCEAC, 0x7EF5, 0xC3E0, 0x7EF6, 0xE7B7, + 0x7EF7, 0xB1C1, 0x7EF8, 0xB3F1, 0x7EF9, 0xC087, 0x7EFA, 0xE7B8, + 0x7EFB, 0xE7B9, 0x7EFC, 0xD7DB, 0x7EFD, 0xD5C0, 0x7EFE, 0xE7BA, + 0x7EFF, 0xC2CC, 0x7F00, 0xD7BA, 0x7F01, 0xE7BB, 0x7F02, 0xE7BC, + 0x7F03, 0xE7BD, 0x7F04, 0xBCEA, 0x7F05, 0xC3E5, 0x7F06, 0xC0C2, + 0x7F07, 0xE7BE, 0x7F08, 0xE7BF, 0x7F09, 0xBCA9, 0x7F0A, 0xC088, + 0x7F0B, 0xE7C0, 0x7F0C, 0xE7C1, 0x7F0D, 0xE7B6, 0x7F0E, 0xB6D0, + 0x7F0F, 0xE7C2, 0x7F10, 0xC089, 0x7F11, 0xE7C3, 0x7F12, 0xE7C4, + 0x7F13, 0xBBBA, 0x7F14, 0xB5DE, 0x7F15, 0xC2C6, 0x7F16, 0xB1E0, + 0x7F17, 0xE7C5, 0x7F18, 0xD4B5, 0x7F19, 0xE7C6, 0x7F1A, 0xB8BF, + 0x7F1B, 0xE7C8, 0x7F1C, 0xE7C7, 0x7F1D, 0xB7EC, 0x7F1E, 0xC08A, + 0x7F1F, 0xE7C9, 0x7F20, 0xB2F8, 0x7F21, 0xE7CA, 0x7F22, 0xE7CB, + 0x7F23, 0xE7CC, 0x7F24, 0xE7CD, 0x7F25, 0xE7CE, 0x7F26, 0xE7CF, + 0x7F27, 0xE7D0, 0x7F28, 0xD3A7, 0x7F29, 0xCBF5, 0x7F2A, 0xE7D1, + 0x7F2B, 0xE7D2, 0x7F2C, 0xE7D3, 0x7F2D, 0xE7D4, 0x7F2E, 0xC9C9, + 0x7F2F, 0xE7D5, 0x7F30, 0xE7D6, 0x7F31, 0xE7D7, 0x7F32, 0xE7D8, + 0x7F33, 0xE7D9, 0x7F34, 0xBDC9, 0x7F35, 0xE7DA, 0x7F36, 0xF3BE, + 0x7F37, 0xC08B, 0x7F38, 0xB8D7, 0x7F39, 0xC08C, 0x7F3A, 0xC8B1, + 0x7F3B, 0xC08D, 0x7F3C, 0xC08E, 0x7F3D, 0xC08F, 0x7F3E, 0xC090, + 0x7F3F, 0xC091, 0x7F40, 0xC092, 0x7F41, 0xC093, 0x7F42, 0xF3BF, + 0x7F43, 0xC094, 0x7F44, 0xF3C0, 0x7F45, 0xF3C1, 0x7F46, 0xC095, + 0x7F47, 0xC096, 0x7F48, 0xC097, 0x7F49, 0xC098, 0x7F4A, 0xC099, + 0x7F4B, 0xC09A, 0x7F4C, 0xC09B, 0x7F4D, 0xC09C, 0x7F4E, 0xC09D, + 0x7F4F, 0xC09E, 0x7F50, 0xB9DE, 0x7F51, 0xCDF8, 0x7F52, 0xC09F, + 0x7F53, 0xC0A0, 0x7F54, 0xD8E8, 0x7F55, 0xBAB1, 0x7F56, 0xC140, + 0x7F57, 0xC2DE, 0x7F58, 0xEEB7, 0x7F59, 0xC141, 0x7F5A, 0xB7A3, + 0x7F5B, 0xC142, 0x7F5C, 0xC143, 0x7F5D, 0xC144, 0x7F5E, 0xC145, + 0x7F5F, 0xEEB9, 0x7F60, 0xC146, 0x7F61, 0xEEB8, 0x7F62, 0xB0D5, + 0x7F63, 0xC147, 0x7F64, 0xC148, 0x7F65, 0xC149, 0x7F66, 0xC14A, + 0x7F67, 0xC14B, 0x7F68, 0xEEBB, 0x7F69, 0xD5D6, 0x7F6A, 0xD7EF, + 0x7F6B, 0xC14C, 0x7F6C, 0xC14D, 0x7F6D, 0xC14E, 0x7F6E, 0xD6C3, + 0x7F6F, 0xC14F, 0x7F70, 0xC150, 0x7F71, 0xEEBD, 0x7F72, 0xCAF0, + 0x7F73, 0xC151, 0x7F74, 0xEEBC, 0x7F75, 0xC152, 0x7F76, 0xC153, + 0x7F77, 0xC154, 0x7F78, 0xC155, 0x7F79, 0xEEBE, 0x7F7A, 0xC156, + 0x7F7B, 0xC157, 0x7F7C, 0xC158, 0x7F7D, 0xC159, 0x7F7E, 0xEEC0, + 0x7F7F, 0xC15A, 0x7F80, 0xC15B, 0x7F81, 0xEEBF, 0x7F82, 0xC15C, + 0x7F83, 0xC15D, 0x7F84, 0xC15E, 0x7F85, 0xC15F, 0x7F86, 0xC160, + 0x7F87, 0xC161, 0x7F88, 0xC162, 0x7F89, 0xC163, 0x7F8A, 0xD1F2, + 0x7F8B, 0xC164, 0x7F8C, 0xC7BC, 0x7F8D, 0xC165, 0x7F8E, 0xC3C0, + 0x7F8F, 0xC166, 0x7F90, 0xC167, 0x7F91, 0xC168, 0x7F92, 0xC169, + 0x7F93, 0xC16A, 0x7F94, 0xB8E1, 0x7F95, 0xC16B, 0x7F96, 0xC16C, + 0x7F97, 0xC16D, 0x7F98, 0xC16E, 0x7F99, 0xC16F, 0x7F9A, 0xC1E7, + 0x7F9B, 0xC170, 0x7F9C, 0xC171, 0x7F9D, 0xF4C6, 0x7F9E, 0xD0DF, + 0x7F9F, 0xF4C7, 0x7FA0, 0xC172, 0x7FA1, 0xCFDB, 0x7FA2, 0xC173, + 0x7FA3, 0xC174, 0x7FA4, 0xC8BA, 0x7FA5, 0xC175, 0x7FA6, 0xC176, + 0x7FA7, 0xF4C8, 0x7FA8, 0xC177, 0x7FA9, 0xC178, 0x7FAA, 0xC179, + 0x7FAB, 0xC17A, 0x7FAC, 0xC17B, 0x7FAD, 0xC17C, 0x7FAE, 0xC17D, + 0x7FAF, 0xF4C9, 0x7FB0, 0xF4CA, 0x7FB1, 0xC17E, 0x7FB2, 0xF4CB, + 0x7FB3, 0xC180, 0x7FB4, 0xC181, 0x7FB5, 0xC182, 0x7FB6, 0xC183, + 0x7FB7, 0xC184, 0x7FB8, 0xD9FA, 0x7FB9, 0xB8FE, 0x7FBA, 0xC185, + 0x7FBB, 0xC186, 0x7FBC, 0xE5F1, 0x7FBD, 0xD3F0, 0x7FBE, 0xC187, + 0x7FBF, 0xF4E0, 0x7FC0, 0xC188, 0x7FC1, 0xCECC, 0x7FC2, 0xC189, + 0x7FC3, 0xC18A, 0x7FC4, 0xC18B, 0x7FC5, 0xB3E1, 0x7FC6, 0xC18C, + 0x7FC7, 0xC18D, 0x7FC8, 0xC18E, 0x7FC9, 0xC18F, 0x7FCA, 0xF1B4, + 0x7FCB, 0xC190, 0x7FCC, 0xD2EE, 0x7FCD, 0xC191, 0x7FCE, 0xF4E1, + 0x7FCF, 0xC192, 0x7FD0, 0xC193, 0x7FD1, 0xC194, 0x7FD2, 0xC195, + 0x7FD3, 0xC196, 0x7FD4, 0xCFE8, 0x7FD5, 0xF4E2, 0x7FD6, 0xC197, + 0x7FD7, 0xC198, 0x7FD8, 0xC7CC, 0x7FD9, 0xC199, 0x7FDA, 0xC19A, + 0x7FDB, 0xC19B, 0x7FDC, 0xC19C, 0x7FDD, 0xC19D, 0x7FDE, 0xC19E, + 0x7FDF, 0xB5D4, 0x7FE0, 0xB4E4, 0x7FE1, 0xF4E4, 0x7FE2, 0xC19F, + 0x7FE3, 0xC1A0, 0x7FE4, 0xC240, 0x7FE5, 0xF4E3, 0x7FE6, 0xF4E5, + 0x7FE7, 0xC241, 0x7FE8, 0xC242, 0x7FE9, 0xF4E6, 0x7FEA, 0xC243, + 0x7FEB, 0xC244, 0x7FEC, 0xC245, 0x7FED, 0xC246, 0x7FEE, 0xF4E7, + 0x7FEF, 0xC247, 0x7FF0, 0xBAB2, 0x7FF1, 0xB0BF, 0x7FF2, 0xC248, + 0x7FF3, 0xF4E8, 0x7FF4, 0xC249, 0x7FF5, 0xC24A, 0x7FF6, 0xC24B, + 0x7FF7, 0xC24C, 0x7FF8, 0xC24D, 0x7FF9, 0xC24E, 0x7FFA, 0xC24F, + 0x7FFB, 0xB7AD, 0x7FFC, 0xD2ED, 0x7FFD, 0xC250, 0x7FFE, 0xC251, + 0x7FFF, 0xC252, 0x8000, 0xD2AB, 0x8001, 0xC0CF, 0x8002, 0xC253, + 0x8003, 0xBFBC, 0x8004, 0xEBA3, 0x8005, 0xD5DF, 0x8006, 0xEAC8, + 0x8007, 0xC254, 0x8008, 0xC255, 0x8009, 0xC256, 0x800A, 0xC257, + 0x800B, 0xF1F3, 0x800C, 0xB6F8, 0x800D, 0xCBA3, 0x800E, 0xC258, + 0x800F, 0xC259, 0x8010, 0xC4CD, 0x8011, 0xC25A, 0x8012, 0xF1E7, + 0x8013, 0xC25B, 0x8014, 0xF1E8, 0x8015, 0xB8FB, 0x8016, 0xF1E9, + 0x8017, 0xBAC4, 0x8018, 0xD4C5, 0x8019, 0xB0D2, 0x801A, 0xC25C, + 0x801B, 0xC25D, 0x801C, 0xF1EA, 0x801D, 0xC25E, 0x801E, 0xC25F, + 0x801F, 0xC260, 0x8020, 0xF1EB, 0x8021, 0xC261, 0x8022, 0xF1EC, + 0x8023, 0xC262, 0x8024, 0xC263, 0x8025, 0xF1ED, 0x8026, 0xF1EE, + 0x8027, 0xF1EF, 0x8028, 0xF1F1, 0x8029, 0xF1F0, 0x802A, 0xC5D5, + 0x802B, 0xC264, 0x802C, 0xC265, 0x802D, 0xC266, 0x802E, 0xC267, + 0x802F, 0xC268, 0x8030, 0xC269, 0x8031, 0xF1F2, 0x8032, 0xC26A, + 0x8033, 0xB6FA, 0x8034, 0xC26B, 0x8035, 0xF1F4, 0x8036, 0xD2AE, + 0x8037, 0xDEC7, 0x8038, 0xCBCA, 0x8039, 0xC26C, 0x803A, 0xC26D, + 0x803B, 0xB3DC, 0x803C, 0xC26E, 0x803D, 0xB5A2, 0x803E, 0xC26F, + 0x803F, 0xB9A2, 0x8040, 0xC270, 0x8041, 0xC271, 0x8042, 0xC4F4, + 0x8043, 0xF1F5, 0x8044, 0xC272, 0x8045, 0xC273, 0x8046, 0xF1F6, + 0x8047, 0xC274, 0x8048, 0xC275, 0x8049, 0xC276, 0x804A, 0xC1C4, + 0x804B, 0xC1FB, 0x804C, 0xD6B0, 0x804D, 0xF1F7, 0x804E, 0xC277, + 0x804F, 0xC278, 0x8050, 0xC279, 0x8051, 0xC27A, 0x8052, 0xF1F8, + 0x8053, 0xC27B, 0x8054, 0xC1AA, 0x8055, 0xC27C, 0x8056, 0xC27D, + 0x8057, 0xC27E, 0x8058, 0xC6B8, 0x8059, 0xC280, 0x805A, 0xBEDB, + 0x805B, 0xC281, 0x805C, 0xC282, 0x805D, 0xC283, 0x805E, 0xC284, + 0x805F, 0xC285, 0x8060, 0xC286, 0x8061, 0xC287, 0x8062, 0xC288, + 0x8063, 0xC289, 0x8064, 0xC28A, 0x8065, 0xC28B, 0x8066, 0xC28C, + 0x8067, 0xC28D, 0x8068, 0xC28E, 0x8069, 0xF1F9, 0x806A, 0xB4CF, + 0x806B, 0xC28F, 0x806C, 0xC290, 0x806D, 0xC291, 0x806E, 0xC292, + 0x806F, 0xC293, 0x8070, 0xC294, 0x8071, 0xF1FA, 0x8072, 0xC295, + 0x8073, 0xC296, 0x8074, 0xC297, 0x8075, 0xC298, 0x8076, 0xC299, + 0x8077, 0xC29A, 0x8078, 0xC29B, 0x8079, 0xC29C, 0x807A, 0xC29D, + 0x807B, 0xC29E, 0x807C, 0xC29F, 0x807D, 0xC2A0, 0x807E, 0xC340, + 0x807F, 0xEDB2, 0x8080, 0xEDB1, 0x8081, 0xC341, 0x8082, 0xC342, + 0x8083, 0xCBE0, 0x8084, 0xD2DE, 0x8085, 0xC343, 0x8086, 0xCBC1, + 0x8087, 0xD5D8, 0x8088, 0xC344, 0x8089, 0xC8E2, 0x808A, 0xC345, + 0x808B, 0xC0DF, 0x808C, 0xBCA1, 0x808D, 0xC346, 0x808E, 0xC347, + 0x808F, 0xC348, 0x8090, 0xC349, 0x8091, 0xC34A, 0x8092, 0xC34B, + 0x8093, 0xEBC1, 0x8094, 0xC34C, 0x8095, 0xC34D, 0x8096, 0xD0A4, + 0x8097, 0xC34E, 0x8098, 0xD6E2, 0x8099, 0xC34F, 0x809A, 0xB6C7, + 0x809B, 0xB8D8, 0x809C, 0xEBC0, 0x809D, 0xB8CE, 0x809E, 0xC350, + 0x809F, 0xEBBF, 0x80A0, 0xB3A6, 0x80A1, 0xB9C9, 0x80A2, 0xD6AB, + 0x80A3, 0xC351, 0x80A4, 0xB7F4, 0x80A5, 0xB7CA, 0x80A6, 0xC352, + 0x80A7, 0xC353, 0x80A8, 0xC354, 0x80A9, 0xBCE7, 0x80AA, 0xB7BE, + 0x80AB, 0xEBC6, 0x80AC, 0xC355, 0x80AD, 0xEBC7, 0x80AE, 0xB0B9, + 0x80AF, 0xBFCF, 0x80B0, 0xC356, 0x80B1, 0xEBC5, 0x80B2, 0xD3FD, + 0x80B3, 0xC357, 0x80B4, 0xEBC8, 0x80B5, 0xC358, 0x80B6, 0xC359, + 0x80B7, 0xEBC9, 0x80B8, 0xC35A, 0x80B9, 0xC35B, 0x80BA, 0xB7CE, + 0x80BB, 0xC35C, 0x80BC, 0xEBC2, 0x80BD, 0xEBC4, 0x80BE, 0xC9F6, + 0x80BF, 0xD6D7, 0x80C0, 0xD5CD, 0x80C1, 0xD0B2, 0x80C2, 0xEBCF, + 0x80C3, 0xCEB8, 0x80C4, 0xEBD0, 0x80C5, 0xC35D, 0x80C6, 0xB5A8, + 0x80C7, 0xC35E, 0x80C8, 0xC35F, 0x80C9, 0xC360, 0x80CA, 0xC361, + 0x80CB, 0xC362, 0x80CC, 0xB1B3, 0x80CD, 0xEBD2, 0x80CE, 0xCCA5, + 0x80CF, 0xC363, 0x80D0, 0xC364, 0x80D1, 0xC365, 0x80D2, 0xC366, + 0x80D3, 0xC367, 0x80D4, 0xC368, 0x80D5, 0xC369, 0x80D6, 0xC5D6, + 0x80D7, 0xEBD3, 0x80D8, 0xC36A, 0x80D9, 0xEBD1, 0x80DA, 0xC5DF, + 0x80DB, 0xEBCE, 0x80DC, 0xCAA4, 0x80DD, 0xEBD5, 0x80DE, 0xB0FB, + 0x80DF, 0xC36B, 0x80E0, 0xC36C, 0x80E1, 0xBAFA, 0x80E2, 0xC36D, + 0x80E3, 0xC36E, 0x80E4, 0xD8B7, 0x80E5, 0xF1E3, 0x80E6, 0xC36F, + 0x80E7, 0xEBCA, 0x80E8, 0xEBCB, 0x80E9, 0xEBCC, 0x80EA, 0xEBCD, + 0x80EB, 0xEBD6, 0x80EC, 0xE6C0, 0x80ED, 0xEBD9, 0x80EE, 0xC370, + 0x80EF, 0xBFE8, 0x80F0, 0xD2C8, 0x80F1, 0xEBD7, 0x80F2, 0xEBDC, + 0x80F3, 0xB8EC, 0x80F4, 0xEBD8, 0x80F5, 0xC371, 0x80F6, 0xBDBA, + 0x80F7, 0xC372, 0x80F8, 0xD0D8, 0x80F9, 0xC373, 0x80FA, 0xB0B7, + 0x80FB, 0xC374, 0x80FC, 0xEBDD, 0x80FD, 0xC4DC, 0x80FE, 0xC375, + 0x80FF, 0xC376, 0x8100, 0xC377, 0x8101, 0xC378, 0x8102, 0xD6AC, + 0x8103, 0xC379, 0x8104, 0xC37A, 0x8105, 0xC37B, 0x8106, 0xB4E0, + 0x8107, 0xC37C, 0x8108, 0xC37D, 0x8109, 0xC2F6, 0x810A, 0xBCB9, + 0x810B, 0xC37E, 0x810C, 0xC380, 0x810D, 0xEBDA, 0x810E, 0xEBDB, + 0x810F, 0xD4E0, 0x8110, 0xC6EA, 0x8111, 0xC4D4, 0x8112, 0xEBDF, + 0x8113, 0xC5A7, 0x8114, 0xD9F5, 0x8115, 0xC381, 0x8116, 0xB2B1, + 0x8117, 0xC382, 0x8118, 0xEBE4, 0x8119, 0xC383, 0x811A, 0xBDC5, + 0x811B, 0xC384, 0x811C, 0xC385, 0x811D, 0xC386, 0x811E, 0xEBE2, + 0x811F, 0xC387, 0x8120, 0xC388, 0x8121, 0xC389, 0x8122, 0xC38A, + 0x8123, 0xC38B, 0x8124, 0xC38C, 0x8125, 0xC38D, 0x8126, 0xC38E, + 0x8127, 0xC38F, 0x8128, 0xC390, 0x8129, 0xC391, 0x812A, 0xC392, + 0x812B, 0xC393, 0x812C, 0xEBE3, 0x812D, 0xC394, 0x812E, 0xC395, + 0x812F, 0xB8AC, 0x8130, 0xC396, 0x8131, 0xCDD1, 0x8132, 0xEBE5, + 0x8133, 0xC397, 0x8134, 0xC398, 0x8135, 0xC399, 0x8136, 0xEBE1, + 0x8137, 0xC39A, 0x8138, 0xC1B3, 0x8139, 0xC39B, 0x813A, 0xC39C, + 0x813B, 0xC39D, 0x813C, 0xC39E, 0x813D, 0xC39F, 0x813E, 0xC6A2, + 0x813F, 0xC3A0, 0x8140, 0xC440, 0x8141, 0xC441, 0x8142, 0xC442, + 0x8143, 0xC443, 0x8144, 0xC444, 0x8145, 0xC445, 0x8146, 0xCCF3, + 0x8147, 0xC446, 0x8148, 0xEBE6, 0x8149, 0xC447, 0x814A, 0xC0B0, + 0x814B, 0xD2B8, 0x814C, 0xEBE7, 0x814D, 0xC448, 0x814E, 0xC449, + 0x814F, 0xC44A, 0x8150, 0xB8AF, 0x8151, 0xB8AD, 0x8152, 0xC44B, + 0x8153, 0xEBE8, 0x8154, 0xC7BB, 0x8155, 0xCDF3, 0x8156, 0xC44C, + 0x8157, 0xC44D, 0x8158, 0xC44E, 0x8159, 0xEBEA, 0x815A, 0xEBEB, + 0x815B, 0xC44F, 0x815C, 0xC450, 0x815D, 0xC451, 0x815E, 0xC452, + 0x815F, 0xC453, 0x8160, 0xEBED, 0x8161, 0xC454, 0x8162, 0xC455, + 0x8163, 0xC456, 0x8164, 0xC457, 0x8165, 0xD0C8, 0x8166, 0xC458, + 0x8167, 0xEBF2, 0x8168, 0xC459, 0x8169, 0xEBEE, 0x816A, 0xC45A, + 0x816B, 0xC45B, 0x816C, 0xC45C, 0x816D, 0xEBF1, 0x816E, 0xC8F9, + 0x816F, 0xC45D, 0x8170, 0xD1FC, 0x8171, 0xEBEC, 0x8172, 0xC45E, + 0x8173, 0xC45F, 0x8174, 0xEBE9, 0x8175, 0xC460, 0x8176, 0xC461, + 0x8177, 0xC462, 0x8178, 0xC463, 0x8179, 0xB8B9, 0x817A, 0xCFD9, + 0x817B, 0xC4E5, 0x817C, 0xEBEF, 0x817D, 0xEBF0, 0x817E, 0xCCDA, + 0x817F, 0xCDC8, 0x8180, 0xB0F2, 0x8181, 0xC464, 0x8182, 0xEBF6, + 0x8183, 0xC465, 0x8184, 0xC466, 0x8185, 0xC467, 0x8186, 0xC468, + 0x8187, 0xC469, 0x8188, 0xEBF5, 0x8189, 0xC46A, 0x818A, 0xB2B2, + 0x818B, 0xC46B, 0x818C, 0xC46C, 0x818D, 0xC46D, 0x818E, 0xC46E, + 0x818F, 0xB8E0, 0x8190, 0xC46F, 0x8191, 0xEBF7, 0x8192, 0xC470, + 0x8193, 0xC471, 0x8194, 0xC472, 0x8195, 0xC473, 0x8196, 0xC474, + 0x8197, 0xC475, 0x8198, 0xB1EC, 0x8199, 0xC476, 0x819A, 0xC477, + 0x819B, 0xCCC5, 0x819C, 0xC4A4, 0x819D, 0xCFA5, 0x819E, 0xC478, + 0x819F, 0xC479, 0x81A0, 0xC47A, 0x81A1, 0xC47B, 0x81A2, 0xC47C, + 0x81A3, 0xEBF9, 0x81A4, 0xC47D, 0x81A5, 0xC47E, 0x81A6, 0xECA2, + 0x81A7, 0xC480, 0x81A8, 0xC5F2, 0x81A9, 0xC481, 0x81AA, 0xEBFA, + 0x81AB, 0xC482, 0x81AC, 0xC483, 0x81AD, 0xC484, 0x81AE, 0xC485, + 0x81AF, 0xC486, 0x81B0, 0xC487, 0x81B1, 0xC488, 0x81B2, 0xC489, + 0x81B3, 0xC9C5, 0x81B4, 0xC48A, 0x81B5, 0xC48B, 0x81B6, 0xC48C, + 0x81B7, 0xC48D, 0x81B8, 0xC48E, 0x81B9, 0xC48F, 0x81BA, 0xE2DF, + 0x81BB, 0xEBFE, 0x81BC, 0xC490, 0x81BD, 0xC491, 0x81BE, 0xC492, + 0x81BF, 0xC493, 0x81C0, 0xCDCE, 0x81C1, 0xECA1, 0x81C2, 0xB1DB, + 0x81C3, 0xD3B7, 0x81C4, 0xC494, 0x81C5, 0xC495, 0x81C6, 0xD2DC, + 0x81C7, 0xC496, 0x81C8, 0xC497, 0x81C9, 0xC498, 0x81CA, 0xEBFD, + 0x81CB, 0xC499, 0x81CC, 0xEBFB, 0x81CD, 0xC49A, 0x81CE, 0xC49B, + 0x81CF, 0xC49C, 0x81D0, 0xC49D, 0x81D1, 0xC49E, 0x81D2, 0xC49F, + 0x81D3, 0xC4A0, 0x81D4, 0xC540, 0x81D5, 0xC541, 0x81D6, 0xC542, + 0x81D7, 0xC543, 0x81D8, 0xC544, 0x81D9, 0xC545, 0x81DA, 0xC546, + 0x81DB, 0xC547, 0x81DC, 0xC548, 0x81DD, 0xC549, 0x81DE, 0xC54A, + 0x81DF, 0xC54B, 0x81E0, 0xC54C, 0x81E1, 0xC54D, 0x81E2, 0xC54E, + 0x81E3, 0xB3BC, 0x81E4, 0xC54F, 0x81E5, 0xC550, 0x81E6, 0xC551, + 0x81E7, 0xEAB0, 0x81E8, 0xC552, 0x81E9, 0xC553, 0x81EA, 0xD7D4, + 0x81EB, 0xC554, 0x81EC, 0xF4AB, 0x81ED, 0xB3F4, 0x81EE, 0xC555, + 0x81EF, 0xC556, 0x81F0, 0xC557, 0x81F1, 0xC558, 0x81F2, 0xC559, + 0x81F3, 0xD6C1, 0x81F4, 0xD6C2, 0x81F5, 0xC55A, 0x81F6, 0xC55B, + 0x81F7, 0xC55C, 0x81F8, 0xC55D, 0x81F9, 0xC55E, 0x81FA, 0xC55F, + 0x81FB, 0xD5E9, 0x81FC, 0xBECA, 0x81FD, 0xC560, 0x81FE, 0xF4A7, + 0x81FF, 0xC561, 0x8200, 0xD2A8, 0x8201, 0xF4A8, 0x8202, 0xF4A9, + 0x8203, 0xC562, 0x8204, 0xF4AA, 0x8205, 0xBECB, 0x8206, 0xD3DF, + 0x8207, 0xC563, 0x8208, 0xC564, 0x8209, 0xC565, 0x820A, 0xC566, + 0x820B, 0xC567, 0x820C, 0xC9E0, 0x820D, 0xC9E1, 0x820E, 0xC568, + 0x820F, 0xC569, 0x8210, 0xF3C2, 0x8211, 0xC56A, 0x8212, 0xCAE6, + 0x8213, 0xC56B, 0x8214, 0xCCF2, 0x8215, 0xC56C, 0x8216, 0xC56D, + 0x8217, 0xC56E, 0x8218, 0xC56F, 0x8219, 0xC570, 0x821A, 0xC571, + 0x821B, 0xE2B6, 0x821C, 0xCBB4, 0x821D, 0xC572, 0x821E, 0xCEE8, + 0x821F, 0xD6DB, 0x8220, 0xC573, 0x8221, 0xF4AD, 0x8222, 0xF4AE, + 0x8223, 0xF4AF, 0x8224, 0xC574, 0x8225, 0xC575, 0x8226, 0xC576, + 0x8227, 0xC577, 0x8228, 0xF4B2, 0x8229, 0xC578, 0x822A, 0xBABD, + 0x822B, 0xF4B3, 0x822C, 0xB0E3, 0x822D, 0xF4B0, 0x822E, 0xC579, + 0x822F, 0xF4B1, 0x8230, 0xBDA2, 0x8231, 0xB2D5, 0x8232, 0xC57A, + 0x8233, 0xF4B6, 0x8234, 0xF4B7, 0x8235, 0xB6E6, 0x8236, 0xB2B0, + 0x8237, 0xCFCF, 0x8238, 0xF4B4, 0x8239, 0xB4AC, 0x823A, 0xC57B, + 0x823B, 0xF4B5, 0x823C, 0xC57C, 0x823D, 0xC57D, 0x823E, 0xF4B8, + 0x823F, 0xC57E, 0x8240, 0xC580, 0x8241, 0xC581, 0x8242, 0xC582, + 0x8243, 0xC583, 0x8244, 0xF4B9, 0x8245, 0xC584, 0x8246, 0xC585, + 0x8247, 0xCDA7, 0x8248, 0xC586, 0x8249, 0xF4BA, 0x824A, 0xC587, + 0x824B, 0xF4BB, 0x824C, 0xC588, 0x824D, 0xC589, 0x824E, 0xC58A, + 0x824F, 0xF4BC, 0x8250, 0xC58B, 0x8251, 0xC58C, 0x8252, 0xC58D, + 0x8253, 0xC58E, 0x8254, 0xC58F, 0x8255, 0xC590, 0x8256, 0xC591, + 0x8257, 0xC592, 0x8258, 0xCBD2, 0x8259, 0xC593, 0x825A, 0xF4BD, + 0x825B, 0xC594, 0x825C, 0xC595, 0x825D, 0xC596, 0x825E, 0xC597, + 0x825F, 0xF4BE, 0x8260, 0xC598, 0x8261, 0xC599, 0x8262, 0xC59A, + 0x8263, 0xC59B, 0x8264, 0xC59C, 0x8265, 0xC59D, 0x8266, 0xC59E, + 0x8267, 0xC59F, 0x8268, 0xF4BF, 0x8269, 0xC5A0, 0x826A, 0xC640, + 0x826B, 0xC641, 0x826C, 0xC642, 0x826D, 0xC643, 0x826E, 0xF4DE, + 0x826F, 0xC1BC, 0x8270, 0xBCE8, 0x8271, 0xC644, 0x8272, 0xC9AB, + 0x8273, 0xD1DE, 0x8274, 0xE5F5, 0x8275, 0xC645, 0x8276, 0xC646, + 0x8277, 0xC647, 0x8278, 0xC648, 0x8279, 0xDCB3, 0x827A, 0xD2D5, + 0x827B, 0xC649, 0x827C, 0xC64A, 0x827D, 0xDCB4, 0x827E, 0xB0AC, + 0x827F, 0xDCB5, 0x8280, 0xC64B, 0x8281, 0xC64C, 0x8282, 0xBDDA, + 0x8283, 0xC64D, 0x8284, 0xDCB9, 0x8285, 0xC64E, 0x8286, 0xC64F, + 0x8287, 0xC650, 0x8288, 0xD8C2, 0x8289, 0xC651, 0x828A, 0xDCB7, + 0x828B, 0xD3F3, 0x828C, 0xC652, 0x828D, 0xC9D6, 0x828E, 0xDCBA, + 0x828F, 0xDCB6, 0x8290, 0xC653, 0x8291, 0xDCBB, 0x8292, 0xC3A2, + 0x8293, 0xC654, 0x8294, 0xC655, 0x8295, 0xC656, 0x8296, 0xC657, + 0x8297, 0xDCBC, 0x8298, 0xDCC5, 0x8299, 0xDCBD, 0x829A, 0xC658, + 0x829B, 0xC659, 0x829C, 0xCEDF, 0x829D, 0xD6A5, 0x829E, 0xC65A, + 0x829F, 0xDCCF, 0x82A0, 0xC65B, 0x82A1, 0xDCCD, 0x82A2, 0xC65C, + 0x82A3, 0xC65D, 0x82A4, 0xDCD2, 0x82A5, 0xBDE6, 0x82A6, 0xC2AB, + 0x82A7, 0xC65E, 0x82A8, 0xDCB8, 0x82A9, 0xDCCB, 0x82AA, 0xDCCE, + 0x82AB, 0xDCBE, 0x82AC, 0xB7D2, 0x82AD, 0xB0C5, 0x82AE, 0xDCC7, + 0x82AF, 0xD0BE, 0x82B0, 0xDCC1, 0x82B1, 0xBBA8, 0x82B2, 0xC65F, + 0x82B3, 0xB7BC, 0x82B4, 0xDCCC, 0x82B5, 0xC660, 0x82B6, 0xC661, + 0x82B7, 0xDCC6, 0x82B8, 0xDCBF, 0x82B9, 0xC7DB, 0x82BA, 0xC662, + 0x82BB, 0xC663, 0x82BC, 0xC664, 0x82BD, 0xD1BF, 0x82BE, 0xDCC0, + 0x82BF, 0xC665, 0x82C0, 0xC666, 0x82C1, 0xDCCA, 0x82C2, 0xC667, + 0x82C3, 0xC668, 0x82C4, 0xDCD0, 0x82C5, 0xC669, 0x82C6, 0xC66A, + 0x82C7, 0xCEAD, 0x82C8, 0xDCC2, 0x82C9, 0xC66B, 0x82CA, 0xDCC3, + 0x82CB, 0xDCC8, 0x82CC, 0xDCC9, 0x82CD, 0xB2D4, 0x82CE, 0xDCD1, + 0x82CF, 0xCBD5, 0x82D0, 0xC66C, 0x82D1, 0xD4B7, 0x82D2, 0xDCDB, + 0x82D3, 0xDCDF, 0x82D4, 0xCCA6, 0x82D5, 0xDCE6, 0x82D6, 0xC66D, + 0x82D7, 0xC3E7, 0x82D8, 0xDCDC, 0x82D9, 0xC66E, 0x82DA, 0xC66F, + 0x82DB, 0xBFC1, 0x82DC, 0xDCD9, 0x82DD, 0xC670, 0x82DE, 0xB0FA, + 0x82DF, 0xB9B6, 0x82E0, 0xDCE5, 0x82E1, 0xDCD3, 0x82E2, 0xC671, + 0x82E3, 0xDCC4, 0x82E4, 0xDCD6, 0x82E5, 0xC8F4, 0x82E6, 0xBFE0, + 0x82E7, 0xC672, 0x82E8, 0xC673, 0x82E9, 0xC674, 0x82EA, 0xC675, + 0x82EB, 0xC9BB, 0x82EC, 0xC676, 0x82ED, 0xC677, 0x82EE, 0xC678, + 0x82EF, 0xB1BD, 0x82F0, 0xC679, 0x82F1, 0xD3A2, 0x82F2, 0xC67A, + 0x82F3, 0xC67B, 0x82F4, 0xDCDA, 0x82F5, 0xC67C, 0x82F6, 0xC67D, + 0x82F7, 0xDCD5, 0x82F8, 0xC67E, 0x82F9, 0xC6BB, 0x82FA, 0xC680, + 0x82FB, 0xDCDE, 0x82FC, 0xC681, 0x82FD, 0xC682, 0x82FE, 0xC683, + 0x82FF, 0xC684, 0x8300, 0xC685, 0x8301, 0xD7C2, 0x8302, 0xC3AF, + 0x8303, 0xB7B6, 0x8304, 0xC7D1, 0x8305, 0xC3A9, 0x8306, 0xDCE2, + 0x8307, 0xDCD8, 0x8308, 0xDCEB, 0x8309, 0xDCD4, 0x830A, 0xC686, + 0x830B, 0xC687, 0x830C, 0xDCDD, 0x830D, 0xC688, 0x830E, 0xBEA5, + 0x830F, 0xDCD7, 0x8310, 0xC689, 0x8311, 0xDCE0, 0x8312, 0xC68A, + 0x8313, 0xC68B, 0x8314, 0xDCE3, 0x8315, 0xDCE4, 0x8316, 0xC68C, + 0x8317, 0xDCF8, 0x8318, 0xC68D, 0x8319, 0xC68E, 0x831A, 0xDCE1, + 0x831B, 0xDDA2, 0x831C, 0xDCE7, 0x831D, 0xC68F, 0x831E, 0xC690, + 0x831F, 0xC691, 0x8320, 0xC692, 0x8321, 0xC693, 0x8322, 0xC694, + 0x8323, 0xC695, 0x8324, 0xC696, 0x8325, 0xC697, 0x8326, 0xC698, + 0x8327, 0xBCEB, 0x8328, 0xB4C4, 0x8329, 0xC699, 0x832A, 0xC69A, + 0x832B, 0xC3A3, 0x832C, 0xB2E7, 0x832D, 0xDCFA, 0x832E, 0xC69B, + 0x832F, 0xDCF2, 0x8330, 0xC69C, 0x8331, 0xDCEF, 0x8332, 0xC69D, + 0x8333, 0xDCFC, 0x8334, 0xDCEE, 0x8335, 0xD2F0, 0x8336, 0xB2E8, + 0x8337, 0xC69E, 0x8338, 0xC8D7, 0x8339, 0xC8E3, 0x833A, 0xDCFB, + 0x833B, 0xC69F, 0x833C, 0xDCED, 0x833D, 0xC6A0, 0x833E, 0xC740, + 0x833F, 0xC741, 0x8340, 0xDCF7, 0x8341, 0xC742, 0x8342, 0xC743, + 0x8343, 0xDCF5, 0x8344, 0xC744, 0x8345, 0xC745, 0x8346, 0xBEA3, + 0x8347, 0xDCF4, 0x8348, 0xC746, 0x8349, 0xB2DD, 0x834A, 0xC747, + 0x834B, 0xC748, 0x834C, 0xC749, 0x834D, 0xC74A, 0x834E, 0xC74B, + 0x834F, 0xDCF3, 0x8350, 0xBCF6, 0x8351, 0xDCE8, 0x8352, 0xBBC4, + 0x8353, 0xC74C, 0x8354, 0xC0F3, 0x8355, 0xC74D, 0x8356, 0xC74E, + 0x8357, 0xC74F, 0x8358, 0xC750, 0x8359, 0xC751, 0x835A, 0xBCD4, + 0x835B, 0xDCE9, 0x835C, 0xDCEA, 0x835D, 0xC752, 0x835E, 0xDCF1, + 0x835F, 0xDCF6, 0x8360, 0xDCF9, 0x8361, 0xB5B4, 0x8362, 0xC753, + 0x8363, 0xC8D9, 0x8364, 0xBBE7, 0x8365, 0xDCFE, 0x8366, 0xDCFD, + 0x8367, 0xD3AB, 0x8368, 0xDDA1, 0x8369, 0xDDA3, 0x836A, 0xDDA5, + 0x836B, 0xD2F1, 0x836C, 0xDDA4, 0x836D, 0xDDA6, 0x836E, 0xDDA7, + 0x836F, 0xD2A9, 0x8370, 0xC754, 0x8371, 0xC755, 0x8372, 0xC756, + 0x8373, 0xC757, 0x8374, 0xC758, 0x8375, 0xC759, 0x8376, 0xC75A, + 0x8377, 0xBAC9, 0x8378, 0xDDA9, 0x8379, 0xC75B, 0x837A, 0xC75C, + 0x837B, 0xDDB6, 0x837C, 0xDDB1, 0x837D, 0xDDB4, 0x837E, 0xC75D, + 0x837F, 0xC75E, 0x8380, 0xC75F, 0x8381, 0xC760, 0x8382, 0xC761, + 0x8383, 0xC762, 0x8384, 0xC763, 0x8385, 0xDDB0, 0x8386, 0xC6CE, + 0x8387, 0xC764, 0x8388, 0xC765, 0x8389, 0xC0F2, 0x838A, 0xC766, + 0x838B, 0xC767, 0x838C, 0xC768, 0x838D, 0xC769, 0x838E, 0xC9AF, + 0x838F, 0xC76A, 0x8390, 0xC76B, 0x8391, 0xC76C, 0x8392, 0xDCEC, + 0x8393, 0xDDAE, 0x8394, 0xC76D, 0x8395, 0xC76E, 0x8396, 0xC76F, + 0x8397, 0xC770, 0x8398, 0xDDB7, 0x8399, 0xC771, 0x839A, 0xC772, + 0x839B, 0xDCF0, 0x839C, 0xDDAF, 0x839D, 0xC773, 0x839E, 0xDDB8, + 0x839F, 0xC774, 0x83A0, 0xDDAC, 0x83A1, 0xC775, 0x83A2, 0xC776, + 0x83A3, 0xC777, 0x83A4, 0xC778, 0x83A5, 0xC779, 0x83A6, 0xC77A, + 0x83A7, 0xC77B, 0x83A8, 0xDDB9, 0x83A9, 0xDDB3, 0x83AA, 0xDDAD, + 0x83AB, 0xC4AA, 0x83AC, 0xC77C, 0x83AD, 0xC77D, 0x83AE, 0xC77E, + 0x83AF, 0xC780, 0x83B0, 0xDDA8, 0x83B1, 0xC0B3, 0x83B2, 0xC1AB, + 0x83B3, 0xDDAA, 0x83B4, 0xDDAB, 0x83B5, 0xC781, 0x83B6, 0xDDB2, + 0x83B7, 0xBBF1, 0x83B8, 0xDDB5, 0x83B9, 0xD3A8, 0x83BA, 0xDDBA, + 0x83BB, 0xC782, 0x83BC, 0xDDBB, 0x83BD, 0xC3A7, 0x83BE, 0xC783, + 0x83BF, 0xC784, 0x83C0, 0xDDD2, 0x83C1, 0xDDBC, 0x83C2, 0xC785, + 0x83C3, 0xC786, 0x83C4, 0xC787, 0x83C5, 0xDDD1, 0x83C6, 0xC788, + 0x83C7, 0xB9BD, 0x83C8, 0xC789, 0x83C9, 0xC78A, 0x83CA, 0xBED5, + 0x83CB, 0xC78B, 0x83CC, 0xBEFA, 0x83CD, 0xC78C, 0x83CE, 0xC78D, + 0x83CF, 0xBACA, 0x83D0, 0xC78E, 0x83D1, 0xC78F, 0x83D2, 0xC790, + 0x83D3, 0xC791, 0x83D4, 0xDDCA, 0x83D5, 0xC792, 0x83D6, 0xDDC5, + 0x83D7, 0xC793, 0x83D8, 0xDDBF, 0x83D9, 0xC794, 0x83DA, 0xC795, + 0x83DB, 0xC796, 0x83DC, 0xB2CB, 0x83DD, 0xDDC3, 0x83DE, 0xC797, + 0x83DF, 0xDDCB, 0x83E0, 0xB2A4, 0x83E1, 0xDDD5, 0x83E2, 0xC798, + 0x83E3, 0xC799, 0x83E4, 0xC79A, 0x83E5, 0xDDBE, 0x83E6, 0xC79B, + 0x83E7, 0xC79C, 0x83E8, 0xC79D, 0x83E9, 0xC6D0, 0x83EA, 0xDDD0, + 0x83EB, 0xC79E, 0x83EC, 0xC79F, 0x83ED, 0xC7A0, 0x83EE, 0xC840, + 0x83EF, 0xC841, 0x83F0, 0xDDD4, 0x83F1, 0xC1E2, 0x83F2, 0xB7C6, + 0x83F3, 0xC842, 0x83F4, 0xC843, 0x83F5, 0xC844, 0x83F6, 0xC845, + 0x83F7, 0xC846, 0x83F8, 0xDDCE, 0x83F9, 0xDDCF, 0x83FA, 0xC847, + 0x83FB, 0xC848, 0x83FC, 0xC849, 0x83FD, 0xDDC4, 0x83FE, 0xC84A, + 0x83FF, 0xC84B, 0x8400, 0xC84C, 0x8401, 0xDDBD, 0x8402, 0xC84D, + 0x8403, 0xDDCD, 0x8404, 0xCCD1, 0x8405, 0xC84E, 0x8406, 0xDDC9, + 0x8407, 0xC84F, 0x8408, 0xC850, 0x8409, 0xC851, 0x840A, 0xC852, + 0x840B, 0xDDC2, 0x840C, 0xC3C8, 0x840D, 0xC6BC, 0x840E, 0xCEAE, + 0x840F, 0xDDCC, 0x8410, 0xC853, 0x8411, 0xDDC8, 0x8412, 0xC854, + 0x8413, 0xC855, 0x8414, 0xC856, 0x8415, 0xC857, 0x8416, 0xC858, + 0x8417, 0xC859, 0x8418, 0xDDC1, 0x8419, 0xC85A, 0x841A, 0xC85B, + 0x841B, 0xC85C, 0x841C, 0xDDC6, 0x841D, 0xC2DC, 0x841E, 0xC85D, + 0x841F, 0xC85E, 0x8420, 0xC85F, 0x8421, 0xC860, 0x8422, 0xC861, + 0x8423, 0xC862, 0x8424, 0xD3A9, 0x8425, 0xD3AA, 0x8426, 0xDDD3, + 0x8427, 0xCFF4, 0x8428, 0xC8F8, 0x8429, 0xC863, 0x842A, 0xC864, + 0x842B, 0xC865, 0x842C, 0xC866, 0x842D, 0xC867, 0x842E, 0xC868, + 0x842F, 0xC869, 0x8430, 0xC86A, 0x8431, 0xDDE6, 0x8432, 0xC86B, + 0x8433, 0xC86C, 0x8434, 0xC86D, 0x8435, 0xC86E, 0x8436, 0xC86F, + 0x8437, 0xC870, 0x8438, 0xDDC7, 0x8439, 0xC871, 0x843A, 0xC872, + 0x843B, 0xC873, 0x843C, 0xDDE0, 0x843D, 0xC2E4, 0x843E, 0xC874, + 0x843F, 0xC875, 0x8440, 0xC876, 0x8441, 0xC877, 0x8442, 0xC878, + 0x8443, 0xC879, 0x8444, 0xC87A, 0x8445, 0xC87B, 0x8446, 0xDDE1, + 0x8447, 0xC87C, 0x8448, 0xC87D, 0x8449, 0xC87E, 0x844A, 0xC880, + 0x844B, 0xC881, 0x844C, 0xC882, 0x844D, 0xC883, 0x844E, 0xC884, + 0x844F, 0xC885, 0x8450, 0xC886, 0x8451, 0xDDD7, 0x8452, 0xC887, + 0x8453, 0xC888, 0x8454, 0xC889, 0x8455, 0xC88A, 0x8456, 0xC88B, + 0x8457, 0xD6F8, 0x8458, 0xC88C, 0x8459, 0xDDD9, 0x845A, 0xDDD8, + 0x845B, 0xB8F0, 0x845C, 0xDDD6, 0x845D, 0xC88D, 0x845E, 0xC88E, + 0x845F, 0xC88F, 0x8460, 0xC890, 0x8461, 0xC6CF, 0x8462, 0xC891, + 0x8463, 0xB6AD, 0x8464, 0xC892, 0x8465, 0xC893, 0x8466, 0xC894, + 0x8467, 0xC895, 0x8468, 0xC896, 0x8469, 0xDDE2, 0x846A, 0xC897, + 0x846B, 0xBAF9, 0x846C, 0xD4E1, 0x846D, 0xDDE7, 0x846E, 0xC898, + 0x846F, 0xC899, 0x8470, 0xC89A, 0x8471, 0xB4D0, 0x8472, 0xC89B, + 0x8473, 0xDDDA, 0x8474, 0xC89C, 0x8475, 0xBFFB, 0x8476, 0xDDE3, + 0x8477, 0xC89D, 0x8478, 0xDDDF, 0x8479, 0xC89E, 0x847A, 0xDDDD, + 0x847B, 0xC89F, 0x847C, 0xC8A0, 0x847D, 0xC940, 0x847E, 0xC941, + 0x847F, 0xC942, 0x8480, 0xC943, 0x8481, 0xC944, 0x8482, 0xB5D9, + 0x8483, 0xC945, 0x8484, 0xC946, 0x8485, 0xC947, 0x8486, 0xC948, + 0x8487, 0xDDDB, 0x8488, 0xDDDC, 0x8489, 0xDDDE, 0x848A, 0xC949, + 0x848B, 0xBDAF, 0x848C, 0xDDE4, 0x848D, 0xC94A, 0x848E, 0xDDE5, + 0x848F, 0xC94B, 0x8490, 0xC94C, 0x8491, 0xC94D, 0x8492, 0xC94E, + 0x8493, 0xC94F, 0x8494, 0xC950, 0x8495, 0xC951, 0x8496, 0xC952, + 0x8497, 0xDDF5, 0x8498, 0xC953, 0x8499, 0xC3C9, 0x849A, 0xC954, + 0x849B, 0xC955, 0x849C, 0xCBE2, 0x849D, 0xC956, 0x849E, 0xC957, + 0x849F, 0xC958, 0x84A0, 0xC959, 0x84A1, 0xDDF2, 0x84A2, 0xC95A, + 0x84A3, 0xC95B, 0x84A4, 0xC95C, 0x84A5, 0xC95D, 0x84A6, 0xC95E, + 0x84A7, 0xC95F, 0x84A8, 0xC960, 0x84A9, 0xC961, 0x84AA, 0xC962, + 0x84AB, 0xC963, 0x84AC, 0xC964, 0x84AD, 0xC965, 0x84AE, 0xC966, + 0x84AF, 0xD8E1, 0x84B0, 0xC967, 0x84B1, 0xC968, 0x84B2, 0xC6D1, + 0x84B3, 0xC969, 0x84B4, 0xDDF4, 0x84B5, 0xC96A, 0x84B6, 0xC96B, + 0x84B7, 0xC96C, 0x84B8, 0xD5F4, 0x84B9, 0xDDF3, 0x84BA, 0xDDF0, + 0x84BB, 0xC96D, 0x84BC, 0xC96E, 0x84BD, 0xDDEC, 0x84BE, 0xC96F, + 0x84BF, 0xDDEF, 0x84C0, 0xC970, 0x84C1, 0xDDE8, 0x84C2, 0xC971, + 0x84C3, 0xC972, 0x84C4, 0xD0EE, 0x84C5, 0xC973, 0x84C6, 0xC974, + 0x84C7, 0xC975, 0x84C8, 0xC976, 0x84C9, 0xC8D8, 0x84CA, 0xDDEE, + 0x84CB, 0xC977, 0x84CC, 0xC978, 0x84CD, 0xDDE9, 0x84CE, 0xC979, + 0x84CF, 0xC97A, 0x84D0, 0xDDEA, 0x84D1, 0xCBF2, 0x84D2, 0xC97B, + 0x84D3, 0xDDED, 0x84D4, 0xC97C, 0x84D5, 0xC97D, 0x84D6, 0xB1CD, + 0x84D7, 0xC97E, 0x84D8, 0xC980, 0x84D9, 0xC981, 0x84DA, 0xC982, + 0x84DB, 0xC983, 0x84DC, 0xC984, 0x84DD, 0xC0B6, 0x84DE, 0xC985, + 0x84DF, 0xBCBB, 0x84E0, 0xDDF1, 0x84E1, 0xC986, 0x84E2, 0xC987, + 0x84E3, 0xDDF7, 0x84E4, 0xC988, 0x84E5, 0xDDF6, 0x84E6, 0xDDEB, + 0x84E7, 0xC989, 0x84E8, 0xC98A, 0x84E9, 0xC98B, 0x84EA, 0xC98C, + 0x84EB, 0xC98D, 0x84EC, 0xC5EE, 0x84ED, 0xC98E, 0x84EE, 0xC98F, + 0x84EF, 0xC990, 0x84F0, 0xDDFB, 0x84F1, 0xC991, 0x84F2, 0xC992, + 0x84F3, 0xC993, 0x84F4, 0xC994, 0x84F5, 0xC995, 0x84F6, 0xC996, + 0x84F7, 0xC997, 0x84F8, 0xC998, 0x84F9, 0xC999, 0x84FA, 0xC99A, + 0x84FB, 0xC99B, 0x84FC, 0xDEA4, 0x84FD, 0xC99C, 0x84FE, 0xC99D, + 0x84FF, 0xDEA3, 0x8500, 0xC99E, 0x8501, 0xC99F, 0x8502, 0xC9A0, + 0x8503, 0xCA40, 0x8504, 0xCA41, 0x8505, 0xCA42, 0x8506, 0xCA43, + 0x8507, 0xCA44, 0x8508, 0xCA45, 0x8509, 0xCA46, 0x850A, 0xCA47, + 0x850B, 0xCA48, 0x850C, 0xDDF8, 0x850D, 0xCA49, 0x850E, 0xCA4A, + 0x850F, 0xCA4B, 0x8510, 0xCA4C, 0x8511, 0xC3EF, 0x8512, 0xCA4D, + 0x8513, 0xC2FB, 0x8514, 0xCA4E, 0x8515, 0xCA4F, 0x8516, 0xCA50, + 0x8517, 0xD5E1, 0x8518, 0xCA51, 0x8519, 0xCA52, 0x851A, 0xCEB5, + 0x851B, 0xCA53, 0x851C, 0xCA54, 0x851D, 0xCA55, 0x851E, 0xCA56, + 0x851F, 0xDDFD, 0x8520, 0xCA57, 0x8521, 0xB2CC, 0x8522, 0xCA58, + 0x8523, 0xCA59, 0x8524, 0xCA5A, 0x8525, 0xCA5B, 0x8526, 0xCA5C, + 0x8527, 0xCA5D, 0x8528, 0xCA5E, 0x8529, 0xCA5F, 0x852A, 0xCA60, + 0x852B, 0xC4E8, 0x852C, 0xCADF, 0x852D, 0xCA61, 0x852E, 0xCA62, + 0x852F, 0xCA63, 0x8530, 0xCA64, 0x8531, 0xCA65, 0x8532, 0xCA66, + 0x8533, 0xCA67, 0x8534, 0xCA68, 0x8535, 0xCA69, 0x8536, 0xCA6A, + 0x8537, 0xC7BE, 0x8538, 0xDDFA, 0x8539, 0xDDFC, 0x853A, 0xDDFE, + 0x853B, 0xDEA2, 0x853C, 0xB0AA, 0x853D, 0xB1CE, 0x853E, 0xCA6B, + 0x853F, 0xCA6C, 0x8540, 0xCA6D, 0x8541, 0xCA6E, 0x8542, 0xCA6F, + 0x8543, 0xDEAC, 0x8544, 0xCA70, 0x8545, 0xCA71, 0x8546, 0xCA72, + 0x8547, 0xCA73, 0x8548, 0xDEA6, 0x8549, 0xBDB6, 0x854A, 0xC8EF, + 0x854B, 0xCA74, 0x854C, 0xCA75, 0x854D, 0xCA76, 0x854E, 0xCA77, + 0x854F, 0xCA78, 0x8550, 0xCA79, 0x8551, 0xCA7A, 0x8552, 0xCA7B, + 0x8553, 0xCA7C, 0x8554, 0xCA7D, 0x8555, 0xCA7E, 0x8556, 0xDEA1, + 0x8557, 0xCA80, 0x8558, 0xCA81, 0x8559, 0xDEA5, 0x855A, 0xCA82, + 0x855B, 0xCA83, 0x855C, 0xCA84, 0x855D, 0xCA85, 0x855E, 0xDEA9, + 0x855F, 0xCA86, 0x8560, 0xCA87, 0x8561, 0xCA88, 0x8562, 0xCA89, + 0x8563, 0xCA8A, 0x8564, 0xDEA8, 0x8565, 0xCA8B, 0x8566, 0xCA8C, + 0x8567, 0xCA8D, 0x8568, 0xDEA7, 0x8569, 0xCA8E, 0x856A, 0xCA8F, + 0x856B, 0xCA90, 0x856C, 0xCA91, 0x856D, 0xCA92, 0x856E, 0xCA93, + 0x856F, 0xCA94, 0x8570, 0xCA95, 0x8571, 0xCA96, 0x8572, 0xDEAD, + 0x8573, 0xCA97, 0x8574, 0xD4CC, 0x8575, 0xCA98, 0x8576, 0xCA99, + 0x8577, 0xCA9A, 0x8578, 0xCA9B, 0x8579, 0xDEB3, 0x857A, 0xDEAA, + 0x857B, 0xDEAE, 0x857C, 0xCA9C, 0x857D, 0xCA9D, 0x857E, 0xC0D9, + 0x857F, 0xCA9E, 0x8580, 0xCA9F, 0x8581, 0xCAA0, 0x8582, 0xCB40, + 0x8583, 0xCB41, 0x8584, 0xB1A1, 0x8585, 0xDEB6, 0x8586, 0xCB42, + 0x8587, 0xDEB1, 0x8588, 0xCB43, 0x8589, 0xCB44, 0x858A, 0xCB45, + 0x858B, 0xCB46, 0x858C, 0xCB47, 0x858D, 0xCB48, 0x858E, 0xCB49, + 0x858F, 0xDEB2, 0x8590, 0xCB4A, 0x8591, 0xCB4B, 0x8592, 0xCB4C, + 0x8593, 0xCB4D, 0x8594, 0xCB4E, 0x8595, 0xCB4F, 0x8596, 0xCB50, + 0x8597, 0xCB51, 0x8598, 0xCB52, 0x8599, 0xCB53, 0x859A, 0xCB54, + 0x859B, 0xD1A6, 0x859C, 0xDEB5, 0x859D, 0xCB55, 0x859E, 0xCB56, + 0x859F, 0xCB57, 0x85A0, 0xCB58, 0x85A1, 0xCB59, 0x85A2, 0xCB5A, + 0x85A3, 0xCB5B, 0x85A4, 0xDEAF, 0x85A5, 0xCB5C, 0x85A6, 0xCB5D, + 0x85A7, 0xCB5E, 0x85A8, 0xDEB0, 0x85A9, 0xCB5F, 0x85AA, 0xD0BD, + 0x85AB, 0xCB60, 0x85AC, 0xCB61, 0x85AD, 0xCB62, 0x85AE, 0xDEB4, + 0x85AF, 0xCAED, 0x85B0, 0xDEB9, 0x85B1, 0xCB63, 0x85B2, 0xCB64, + 0x85B3, 0xCB65, 0x85B4, 0xCB66, 0x85B5, 0xCB67, 0x85B6, 0xCB68, + 0x85B7, 0xDEB8, 0x85B8, 0xCB69, 0x85B9, 0xDEB7, 0x85BA, 0xCB6A, + 0x85BB, 0xCB6B, 0x85BC, 0xCB6C, 0x85BD, 0xCB6D, 0x85BE, 0xCB6E, + 0x85BF, 0xCB6F, 0x85C0, 0xCB70, 0x85C1, 0xDEBB, 0x85C2, 0xCB71, + 0x85C3, 0xCB72, 0x85C4, 0xCB73, 0x85C5, 0xCB74, 0x85C6, 0xCB75, + 0x85C7, 0xCB76, 0x85C8, 0xCB77, 0x85C9, 0xBDE5, 0x85CA, 0xCB78, + 0x85CB, 0xCB79, 0x85CC, 0xCB7A, 0x85CD, 0xCB7B, 0x85CE, 0xCB7C, + 0x85CF, 0xB2D8, 0x85D0, 0xC3EA, 0x85D1, 0xCB7D, 0x85D2, 0xCB7E, + 0x85D3, 0xDEBA, 0x85D4, 0xCB80, 0x85D5, 0xC5BA, 0x85D6, 0xCB81, + 0x85D7, 0xCB82, 0x85D8, 0xCB83, 0x85D9, 0xCB84, 0x85DA, 0xCB85, + 0x85DB, 0xCB86, 0x85DC, 0xDEBC, 0x85DD, 0xCB87, 0x85DE, 0xCB88, + 0x85DF, 0xCB89, 0x85E0, 0xCB8A, 0x85E1, 0xCB8B, 0x85E2, 0xCB8C, + 0x85E3, 0xCB8D, 0x85E4, 0xCCD9, 0x85E5, 0xCB8E, 0x85E6, 0xCB8F, + 0x85E7, 0xCB90, 0x85E8, 0xCB91, 0x85E9, 0xB7AA, 0x85EA, 0xCB92, + 0x85EB, 0xCB93, 0x85EC, 0xCB94, 0x85ED, 0xCB95, 0x85EE, 0xCB96, + 0x85EF, 0xCB97, 0x85F0, 0xCB98, 0x85F1, 0xCB99, 0x85F2, 0xCB9A, + 0x85F3, 0xCB9B, 0x85F4, 0xCB9C, 0x85F5, 0xCB9D, 0x85F6, 0xCB9E, + 0x85F7, 0xCB9F, 0x85F8, 0xCBA0, 0x85F9, 0xCC40, 0x85FA, 0xCC41, + 0x85FB, 0xD4E5, 0x85FC, 0xCC42, 0x85FD, 0xCC43, 0x85FE, 0xCC44, + 0x85FF, 0xDEBD, 0x8600, 0xCC45, 0x8601, 0xCC46, 0x8602, 0xCC47, + 0x8603, 0xCC48, 0x8604, 0xCC49, 0x8605, 0xDEBF, 0x8606, 0xCC4A, + 0x8607, 0xCC4B, 0x8608, 0xCC4C, 0x8609, 0xCC4D, 0x860A, 0xCC4E, + 0x860B, 0xCC4F, 0x860C, 0xCC50, 0x860D, 0xCC51, 0x860E, 0xCC52, + 0x860F, 0xCC53, 0x8610, 0xCC54, 0x8611, 0xC4A2, 0x8612, 0xCC55, + 0x8613, 0xCC56, 0x8614, 0xCC57, 0x8615, 0xCC58, 0x8616, 0xDEC1, + 0x8617, 0xCC59, 0x8618, 0xCC5A, 0x8619, 0xCC5B, 0x861A, 0xCC5C, + 0x861B, 0xCC5D, 0x861C, 0xCC5E, 0x861D, 0xCC5F, 0x861E, 0xCC60, + 0x861F, 0xCC61, 0x8620, 0xCC62, 0x8621, 0xCC63, 0x8622, 0xCC64, + 0x8623, 0xCC65, 0x8624, 0xCC66, 0x8625, 0xCC67, 0x8626, 0xCC68, + 0x8627, 0xDEBE, 0x8628, 0xCC69, 0x8629, 0xDEC0, 0x862A, 0xCC6A, + 0x862B, 0xCC6B, 0x862C, 0xCC6C, 0x862D, 0xCC6D, 0x862E, 0xCC6E, + 0x862F, 0xCC6F, 0x8630, 0xCC70, 0x8631, 0xCC71, 0x8632, 0xCC72, + 0x8633, 0xCC73, 0x8634, 0xCC74, 0x8635, 0xCC75, 0x8636, 0xCC76, + 0x8637, 0xCC77, 0x8638, 0xD5BA, 0x8639, 0xCC78, 0x863A, 0xCC79, + 0x863B, 0xCC7A, 0x863C, 0xDEC2, 0x863D, 0xCC7B, 0x863E, 0xCC7C, + 0x863F, 0xCC7D, 0x8640, 0xCC7E, 0x8641, 0xCC80, 0x8642, 0xCC81, + 0x8643, 0xCC82, 0x8644, 0xCC83, 0x8645, 0xCC84, 0x8646, 0xCC85, + 0x8647, 0xCC86, 0x8648, 0xCC87, 0x8649, 0xCC88, 0x864A, 0xCC89, + 0x864B, 0xCC8A, 0x864C, 0xCC8B, 0x864D, 0xF2AE, 0x864E, 0xBBA2, + 0x864F, 0xC2B2, 0x8650, 0xC5B0, 0x8651, 0xC2C7, 0x8652, 0xCC8C, + 0x8653, 0xCC8D, 0x8654, 0xF2AF, 0x8655, 0xCC8E, 0x8656, 0xCC8F, + 0x8657, 0xCC90, 0x8658, 0xCC91, 0x8659, 0xCC92, 0x865A, 0xD0E9, + 0x865B, 0xCC93, 0x865C, 0xCC94, 0x865D, 0xCC95, 0x865E, 0xD3DD, + 0x865F, 0xCC96, 0x8660, 0xCC97, 0x8661, 0xCC98, 0x8662, 0xEBBD, + 0x8663, 0xCC99, 0x8664, 0xCC9A, 0x8665, 0xCC9B, 0x8666, 0xCC9C, + 0x8667, 0xCC9D, 0x8668, 0xCC9E, 0x8669, 0xCC9F, 0x866A, 0xCCA0, + 0x866B, 0xB3E6, 0x866C, 0xF2B0, 0x866D, 0xCD40, 0x866E, 0xF2B1, + 0x866F, 0xCD41, 0x8670, 0xCD42, 0x8671, 0xCAAD, 0x8672, 0xCD43, + 0x8673, 0xCD44, 0x8674, 0xCD45, 0x8675, 0xCD46, 0x8676, 0xCD47, + 0x8677, 0xCD48, 0x8678, 0xCD49, 0x8679, 0xBAE7, 0x867A, 0xF2B3, + 0x867B, 0xF2B5, 0x867C, 0xF2B4, 0x867D, 0xCBE4, 0x867E, 0xCFBA, + 0x867F, 0xF2B2, 0x8680, 0xCAB4, 0x8681, 0xD2CF, 0x8682, 0xC2EC, + 0x8683, 0xCD4A, 0x8684, 0xCD4B, 0x8685, 0xCD4C, 0x8686, 0xCD4D, + 0x8687, 0xCD4E, 0x8688, 0xCD4F, 0x8689, 0xCD50, 0x868A, 0xCEC3, + 0x868B, 0xF2B8, 0x868C, 0xB0F6, 0x868D, 0xF2B7, 0x868E, 0xCD51, + 0x868F, 0xCD52, 0x8690, 0xCD53, 0x8691, 0xCD54, 0x8692, 0xCD55, + 0x8693, 0xF2BE, 0x8694, 0xCD56, 0x8695, 0xB2CF, 0x8696, 0xCD57, + 0x8697, 0xCD58, 0x8698, 0xCD59, 0x8699, 0xCD5A, 0x869A, 0xCD5B, + 0x869B, 0xCD5C, 0x869C, 0xD1C1, 0x869D, 0xF2BA, 0x869E, 0xCD5D, + 0x869F, 0xCD5E, 0x86A0, 0xCD5F, 0x86A1, 0xCD60, 0x86A2, 0xCD61, + 0x86A3, 0xF2BC, 0x86A4, 0xD4E9, 0x86A5, 0xCD62, 0x86A6, 0xCD63, + 0x86A7, 0xF2BB, 0x86A8, 0xF2B6, 0x86A9, 0xF2BF, 0x86AA, 0xF2BD, + 0x86AB, 0xCD64, 0x86AC, 0xF2B9, 0x86AD, 0xCD65, 0x86AE, 0xCD66, + 0x86AF, 0xF2C7, 0x86B0, 0xF2C4, 0x86B1, 0xF2C6, 0x86B2, 0xCD67, + 0x86B3, 0xCD68, 0x86B4, 0xF2CA, 0x86B5, 0xF2C2, 0x86B6, 0xF2C0, + 0x86B7, 0xCD69, 0x86B8, 0xCD6A, 0x86B9, 0xCD6B, 0x86BA, 0xF2C5, + 0x86BB, 0xCD6C, 0x86BC, 0xCD6D, 0x86BD, 0xCD6E, 0x86BE, 0xCD6F, + 0x86BF, 0xCD70, 0x86C0, 0xD6FB, 0x86C1, 0xCD71, 0x86C2, 0xCD72, + 0x86C3, 0xCD73, 0x86C4, 0xF2C1, 0x86C5, 0xCD74, 0x86C6, 0xC7F9, + 0x86C7, 0xC9DF, 0x86C8, 0xCD75, 0x86C9, 0xF2C8, 0x86CA, 0xB9C6, + 0x86CB, 0xB5B0, 0x86CC, 0xCD76, 0x86CD, 0xCD77, 0x86CE, 0xF2C3, + 0x86CF, 0xF2C9, 0x86D0, 0xF2D0, 0x86D1, 0xF2D6, 0x86D2, 0xCD78, + 0x86D3, 0xCD79, 0x86D4, 0xBBD7, 0x86D5, 0xCD7A, 0x86D6, 0xCD7B, + 0x86D7, 0xCD7C, 0x86D8, 0xF2D5, 0x86D9, 0xCDDC, 0x86DA, 0xCD7D, + 0x86DB, 0xD6EB, 0x86DC, 0xCD7E, 0x86DD, 0xCD80, 0x86DE, 0xF2D2, + 0x86DF, 0xF2D4, 0x86E0, 0xCD81, 0x86E1, 0xCD82, 0x86E2, 0xCD83, + 0x86E3, 0xCD84, 0x86E4, 0xB8F2, 0x86E5, 0xCD85, 0x86E6, 0xCD86, + 0x86E7, 0xCD87, 0x86E8, 0xCD88, 0x86E9, 0xF2CB, 0x86EA, 0xCD89, + 0x86EB, 0xCD8A, 0x86EC, 0xCD8B, 0x86ED, 0xF2CE, 0x86EE, 0xC2F9, + 0x86EF, 0xCD8C, 0x86F0, 0xD5DD, 0x86F1, 0xF2CC, 0x86F2, 0xF2CD, + 0x86F3, 0xF2CF, 0x86F4, 0xF2D3, 0x86F5, 0xCD8D, 0x86F6, 0xCD8E, + 0x86F7, 0xCD8F, 0x86F8, 0xF2D9, 0x86F9, 0xD3BC, 0x86FA, 0xCD90, + 0x86FB, 0xCD91, 0x86FC, 0xCD92, 0x86FD, 0xCD93, 0x86FE, 0xB6EA, + 0x86FF, 0xCD94, 0x8700, 0xCAF1, 0x8701, 0xCD95, 0x8702, 0xB7E4, + 0x8703, 0xF2D7, 0x8704, 0xCD96, 0x8705, 0xCD97, 0x8706, 0xCD98, + 0x8707, 0xF2D8, 0x8708, 0xF2DA, 0x8709, 0xF2DD, 0x870A, 0xF2DB, + 0x870B, 0xCD99, 0x870C, 0xCD9A, 0x870D, 0xF2DC, 0x870E, 0xCD9B, + 0x870F, 0xCD9C, 0x8710, 0xCD9D, 0x8711, 0xCD9E, 0x8712, 0xD1D1, + 0x8713, 0xF2D1, 0x8714, 0xCD9F, 0x8715, 0xCDC9, 0x8716, 0xCDA0, + 0x8717, 0xCECF, 0x8718, 0xD6A9, 0x8719, 0xCE40, 0x871A, 0xF2E3, + 0x871B, 0xCE41, 0x871C, 0xC3DB, 0x871D, 0xCE42, 0x871E, 0xF2E0, + 0x871F, 0xCE43, 0x8720, 0xCE44, 0x8721, 0xC0AF, 0x8722, 0xF2EC, + 0x8723, 0xF2DE, 0x8724, 0xCE45, 0x8725, 0xF2E1, 0x8726, 0xCE46, + 0x8727, 0xCE47, 0x8728, 0xCE48, 0x8729, 0xF2E8, 0x872A, 0xCE49, + 0x872B, 0xCE4A, 0x872C, 0xCE4B, 0x872D, 0xCE4C, 0x872E, 0xF2E2, + 0x872F, 0xCE4D, 0x8730, 0xCE4E, 0x8731, 0xF2E7, 0x8732, 0xCE4F, + 0x8733, 0xCE50, 0x8734, 0xF2E6, 0x8735, 0xCE51, 0x8736, 0xCE52, + 0x8737, 0xF2E9, 0x8738, 0xCE53, 0x8739, 0xCE54, 0x873A, 0xCE55, + 0x873B, 0xF2DF, 0x873C, 0xCE56, 0x873D, 0xCE57, 0x873E, 0xF2E4, + 0x873F, 0xF2EA, 0x8740, 0xCE58, 0x8741, 0xCE59, 0x8742, 0xCE5A, + 0x8743, 0xCE5B, 0x8744, 0xCE5C, 0x8745, 0xCE5D, 0x8746, 0xCE5E, + 0x8747, 0xD3AC, 0x8748, 0xF2E5, 0x8749, 0xB2F5, 0x874A, 0xCE5F, + 0x874B, 0xCE60, 0x874C, 0xF2F2, 0x874D, 0xCE61, 0x874E, 0xD0AB, + 0x874F, 0xCE62, 0x8750, 0xCE63, 0x8751, 0xCE64, 0x8752, 0xCE65, + 0x8753, 0xF2F5, 0x8754, 0xCE66, 0x8755, 0xCE67, 0x8756, 0xCE68, + 0x8757, 0xBBC8, 0x8758, 0xCE69, 0x8759, 0xF2F9, 0x875A, 0xCE6A, + 0x875B, 0xCE6B, 0x875C, 0xCE6C, 0x875D, 0xCE6D, 0x875E, 0xCE6E, + 0x875F, 0xCE6F, 0x8760, 0xF2F0, 0x8761, 0xCE70, 0x8762, 0xCE71, + 0x8763, 0xF2F6, 0x8764, 0xF2F8, 0x8765, 0xF2FA, 0x8766, 0xCE72, + 0x8767, 0xCE73, 0x8768, 0xCE74, 0x8769, 0xCE75, 0x876A, 0xCE76, + 0x876B, 0xCE77, 0x876C, 0xCE78, 0x876D, 0xCE79, 0x876E, 0xF2F3, + 0x876F, 0xCE7A, 0x8770, 0xF2F1, 0x8771, 0xCE7B, 0x8772, 0xCE7C, + 0x8773, 0xCE7D, 0x8774, 0xBAFB, 0x8775, 0xCE7E, 0x8776, 0xB5FB, + 0x8777, 0xCE80, 0x8778, 0xCE81, 0x8779, 0xCE82, 0x877A, 0xCE83, + 0x877B, 0xF2EF, 0x877C, 0xF2F7, 0x877D, 0xF2ED, 0x877E, 0xF2EE, + 0x877F, 0xCE84, 0x8780, 0xCE85, 0x8781, 0xCE86, 0x8782, 0xF2EB, + 0x8783, 0xF3A6, 0x8784, 0xCE87, 0x8785, 0xF3A3, 0x8786, 0xCE88, + 0x8787, 0xCE89, 0x8788, 0xF3A2, 0x8789, 0xCE8A, 0x878A, 0xCE8B, + 0x878B, 0xF2F4, 0x878C, 0xCE8C, 0x878D, 0xC8DA, 0x878E, 0xCE8D, + 0x878F, 0xCE8E, 0x8790, 0xCE8F, 0x8791, 0xCE90, 0x8792, 0xCE91, + 0x8793, 0xF2FB, 0x8794, 0xCE92, 0x8795, 0xCE93, 0x8796, 0xCE94, + 0x8797, 0xF3A5, 0x8798, 0xCE95, 0x8799, 0xCE96, 0x879A, 0xCE97, + 0x879B, 0xCE98, 0x879C, 0xCE99, 0x879D, 0xCE9A, 0x879E, 0xCE9B, + 0x879F, 0xC3F8, 0x87A0, 0xCE9C, 0x87A1, 0xCE9D, 0x87A2, 0xCE9E, + 0x87A3, 0xCE9F, 0x87A4, 0xCEA0, 0x87A5, 0xCF40, 0x87A6, 0xCF41, + 0x87A7, 0xCF42, 0x87A8, 0xF2FD, 0x87A9, 0xCF43, 0x87AA, 0xCF44, + 0x87AB, 0xF3A7, 0x87AC, 0xF3A9, 0x87AD, 0xF3A4, 0x87AE, 0xCF45, + 0x87AF, 0xF2FC, 0x87B0, 0xCF46, 0x87B1, 0xCF47, 0x87B2, 0xCF48, + 0x87B3, 0xF3AB, 0x87B4, 0xCF49, 0x87B5, 0xF3AA, 0x87B6, 0xCF4A, + 0x87B7, 0xCF4B, 0x87B8, 0xCF4C, 0x87B9, 0xCF4D, 0x87BA, 0xC2DD, + 0x87BB, 0xCF4E, 0x87BC, 0xCF4F, 0x87BD, 0xF3AE, 0x87BE, 0xCF50, + 0x87BF, 0xCF51, 0x87C0, 0xF3B0, 0x87C1, 0xCF52, 0x87C2, 0xCF53, + 0x87C3, 0xCF54, 0x87C4, 0xCF55, 0x87C5, 0xCF56, 0x87C6, 0xF3A1, + 0x87C7, 0xCF57, 0x87C8, 0xCF58, 0x87C9, 0xCF59, 0x87CA, 0xF3B1, + 0x87CB, 0xF3AC, 0x87CC, 0xCF5A, 0x87CD, 0xCF5B, 0x87CE, 0xCF5C, + 0x87CF, 0xCF5D, 0x87D0, 0xCF5E, 0x87D1, 0xF3AF, 0x87D2, 0xF2FE, + 0x87D3, 0xF3AD, 0x87D4, 0xCF5F, 0x87D5, 0xCF60, 0x87D6, 0xCF61, + 0x87D7, 0xCF62, 0x87D8, 0xCF63, 0x87D9, 0xCF64, 0x87DA, 0xCF65, + 0x87DB, 0xF3B2, 0x87DC, 0xCF66, 0x87DD, 0xCF67, 0x87DE, 0xCF68, + 0x87DF, 0xCF69, 0x87E0, 0xF3B4, 0x87E1, 0xCF6A, 0x87E2, 0xCF6B, + 0x87E3, 0xCF6C, 0x87E4, 0xCF6D, 0x87E5, 0xF3A8, 0x87E6, 0xCF6E, + 0x87E7, 0xCF6F, 0x87E8, 0xCF70, 0x87E9, 0xCF71, 0x87EA, 0xF3B3, + 0x87EB, 0xCF72, 0x87EC, 0xCF73, 0x87ED, 0xCF74, 0x87EE, 0xF3B5, + 0x87EF, 0xCF75, 0x87F0, 0xCF76, 0x87F1, 0xCF77, 0x87F2, 0xCF78, + 0x87F3, 0xCF79, 0x87F4, 0xCF7A, 0x87F5, 0xCF7B, 0x87F6, 0xCF7C, + 0x87F7, 0xCF7D, 0x87F8, 0xCF7E, 0x87F9, 0xD0B7, 0x87FA, 0xCF80, + 0x87FB, 0xCF81, 0x87FC, 0xCF82, 0x87FD, 0xCF83, 0x87FE, 0xF3B8, + 0x87FF, 0xCF84, 0x8800, 0xCF85, 0x8801, 0xCF86, 0x8802, 0xCF87, + 0x8803, 0xD9F9, 0x8804, 0xCF88, 0x8805, 0xCF89, 0x8806, 0xCF8A, + 0x8807, 0xCF8B, 0x8808, 0xCF8C, 0x8809, 0xCF8D, 0x880A, 0xF3B9, + 0x880B, 0xCF8E, 0x880C, 0xCF8F, 0x880D, 0xCF90, 0x880E, 0xCF91, + 0x880F, 0xCF92, 0x8810, 0xCF93, 0x8811, 0xCF94, 0x8812, 0xCF95, + 0x8813, 0xF3B7, 0x8814, 0xCF96, 0x8815, 0xC8E4, 0x8816, 0xF3B6, + 0x8817, 0xCF97, 0x8818, 0xCF98, 0x8819, 0xCF99, 0x881A, 0xCF9A, + 0x881B, 0xF3BA, 0x881C, 0xCF9B, 0x881D, 0xCF9C, 0x881E, 0xCF9D, + 0x881F, 0xCF9E, 0x8820, 0xCF9F, 0x8821, 0xF3BB, 0x8822, 0xB4C0, + 0x8823, 0xCFA0, 0x8824, 0xD040, 0x8825, 0xD041, 0x8826, 0xD042, + 0x8827, 0xD043, 0x8828, 0xD044, 0x8829, 0xD045, 0x882A, 0xD046, + 0x882B, 0xD047, 0x882C, 0xD048, 0x882D, 0xD049, 0x882E, 0xD04A, + 0x882F, 0xD04B, 0x8830, 0xD04C, 0x8831, 0xD04D, 0x8832, 0xEEC3, + 0x8833, 0xD04E, 0x8834, 0xD04F, 0x8835, 0xD050, 0x8836, 0xD051, + 0x8837, 0xD052, 0x8838, 0xD053, 0x8839, 0xF3BC, 0x883A, 0xD054, + 0x883B, 0xD055, 0x883C, 0xF3BD, 0x883D, 0xD056, 0x883E, 0xD057, + 0x883F, 0xD058, 0x8840, 0xD1AA, 0x8841, 0xD059, 0x8842, 0xD05A, + 0x8843, 0xD05B, 0x8844, 0xF4AC, 0x8845, 0xD0C6, 0x8846, 0xD05C, + 0x8847, 0xD05D, 0x8848, 0xD05E, 0x8849, 0xD05F, 0x884A, 0xD060, + 0x884B, 0xD061, 0x884C, 0xD0D0, 0x884D, 0xD1DC, 0x884E, 0xD062, + 0x884F, 0xD063, 0x8850, 0xD064, 0x8851, 0xD065, 0x8852, 0xD066, + 0x8853, 0xD067, 0x8854, 0xCFCE, 0x8855, 0xD068, 0x8856, 0xD069, + 0x8857, 0xBDD6, 0x8858, 0xD06A, 0x8859, 0xD1C3, 0x885A, 0xD06B, + 0x885B, 0xD06C, 0x885C, 0xD06D, 0x885D, 0xD06E, 0x885E, 0xD06F, + 0x885F, 0xD070, 0x8860, 0xD071, 0x8861, 0xBAE2, 0x8862, 0xE1E9, + 0x8863, 0xD2C2, 0x8864, 0xF1C2, 0x8865, 0xB2B9, 0x8866, 0xD072, + 0x8867, 0xD073, 0x8868, 0xB1ED, 0x8869, 0xF1C3, 0x886A, 0xD074, + 0x886B, 0xC9C0, 0x886C, 0xB3C4, 0x886D, 0xD075, 0x886E, 0xD9F2, + 0x886F, 0xD076, 0x8870, 0xCBA5, 0x8871, 0xD077, 0x8872, 0xF1C4, + 0x8873, 0xD078, 0x8874, 0xD079, 0x8875, 0xD07A, 0x8876, 0xD07B, + 0x8877, 0xD6D4, 0x8878, 0xD07C, 0x8879, 0xD07D, 0x887A, 0xD07E, + 0x887B, 0xD080, 0x887C, 0xD081, 0x887D, 0xF1C5, 0x887E, 0xF4C0, + 0x887F, 0xF1C6, 0x8880, 0xD082, 0x8881, 0xD4AC, 0x8882, 0xF1C7, + 0x8883, 0xD083, 0x8884, 0xB0C0, 0x8885, 0xF4C1, 0x8886, 0xD084, + 0x8887, 0xD085, 0x8888, 0xF4C2, 0x8889, 0xD086, 0x888A, 0xD087, + 0x888B, 0xB4FC, 0x888C, 0xD088, 0x888D, 0xC5DB, 0x888E, 0xD089, + 0x888F, 0xD08A, 0x8890, 0xD08B, 0x8891, 0xD08C, 0x8892, 0xCCBB, + 0x8893, 0xD08D, 0x8894, 0xD08E, 0x8895, 0xD08F, 0x8896, 0xD0E4, + 0x8897, 0xD090, 0x8898, 0xD091, 0x8899, 0xD092, 0x889A, 0xD093, + 0x889B, 0xD094, 0x889C, 0xCDE0, 0x889D, 0xD095, 0x889E, 0xD096, + 0x889F, 0xD097, 0x88A0, 0xD098, 0x88A1, 0xD099, 0x88A2, 0xF1C8, + 0x88A3, 0xD09A, 0x88A4, 0xD9F3, 0x88A5, 0xD09B, 0x88A6, 0xD09C, + 0x88A7, 0xD09D, 0x88A8, 0xD09E, 0x88A9, 0xD09F, 0x88AA, 0xD0A0, + 0x88AB, 0xB1BB, 0x88AC, 0xD140, 0x88AD, 0xCFAE, 0x88AE, 0xD141, + 0x88AF, 0xD142, 0x88B0, 0xD143, 0x88B1, 0xB8A4, 0x88B2, 0xD144, + 0x88B3, 0xD145, 0x88B4, 0xD146, 0x88B5, 0xD147, 0x88B6, 0xD148, + 0x88B7, 0xF1CA, 0x88B8, 0xD149, 0x88B9, 0xD14A, 0x88BA, 0xD14B, + 0x88BB, 0xD14C, 0x88BC, 0xF1CB, 0x88BD, 0xD14D, 0x88BE, 0xD14E, + 0x88BF, 0xD14F, 0x88C0, 0xD150, 0x88C1, 0xB2C3, 0x88C2, 0xC1D1, + 0x88C3, 0xD151, 0x88C4, 0xD152, 0x88C5, 0xD7B0, 0x88C6, 0xF1C9, + 0x88C7, 0xD153, 0x88C8, 0xD154, 0x88C9, 0xF1CC, 0x88CA, 0xD155, + 0x88CB, 0xD156, 0x88CC, 0xD157, 0x88CD, 0xD158, 0x88CE, 0xF1CE, + 0x88CF, 0xD159, 0x88D0, 0xD15A, 0x88D1, 0xD15B, 0x88D2, 0xD9F6, + 0x88D3, 0xD15C, 0x88D4, 0xD2E1, 0x88D5, 0xD4A3, 0x88D6, 0xD15D, + 0x88D7, 0xD15E, 0x88D8, 0xF4C3, 0x88D9, 0xC8B9, 0x88DA, 0xD15F, + 0x88DB, 0xD160, 0x88DC, 0xD161, 0x88DD, 0xD162, 0x88DE, 0xD163, + 0x88DF, 0xF4C4, 0x88E0, 0xD164, 0x88E1, 0xD165, 0x88E2, 0xF1CD, + 0x88E3, 0xF1CF, 0x88E4, 0xBFE3, 0x88E5, 0xF1D0, 0x88E6, 0xD166, + 0x88E7, 0xD167, 0x88E8, 0xF1D4, 0x88E9, 0xD168, 0x88EA, 0xD169, + 0x88EB, 0xD16A, 0x88EC, 0xD16B, 0x88ED, 0xD16C, 0x88EE, 0xD16D, + 0x88EF, 0xD16E, 0x88F0, 0xF1D6, 0x88F1, 0xF1D1, 0x88F2, 0xD16F, + 0x88F3, 0xC9D1, 0x88F4, 0xC5E1, 0x88F5, 0xD170, 0x88F6, 0xD171, + 0x88F7, 0xD172, 0x88F8, 0xC2E3, 0x88F9, 0xB9FC, 0x88FA, 0xD173, + 0x88FB, 0xD174, 0x88FC, 0xF1D3, 0x88FD, 0xD175, 0x88FE, 0xF1D5, + 0x88FF, 0xD176, 0x8900, 0xD177, 0x8901, 0xD178, 0x8902, 0xB9D3, + 0x8903, 0xD179, 0x8904, 0xD17A, 0x8905, 0xD17B, 0x8906, 0xD17C, + 0x8907, 0xD17D, 0x8908, 0xD17E, 0x8909, 0xD180, 0x890A, 0xF1DB, + 0x890B, 0xD181, 0x890C, 0xD182, 0x890D, 0xD183, 0x890E, 0xD184, + 0x890F, 0xD185, 0x8910, 0xBAD6, 0x8911, 0xD186, 0x8912, 0xB0FD, + 0x8913, 0xF1D9, 0x8914, 0xD187, 0x8915, 0xD188, 0x8916, 0xD189, + 0x8917, 0xD18A, 0x8918, 0xD18B, 0x8919, 0xF1D8, 0x891A, 0xF1D2, + 0x891B, 0xF1DA, 0x891C, 0xD18C, 0x891D, 0xD18D, 0x891E, 0xD18E, + 0x891F, 0xD18F, 0x8920, 0xD190, 0x8921, 0xF1D7, 0x8922, 0xD191, + 0x8923, 0xD192, 0x8924, 0xD193, 0x8925, 0xC8EC, 0x8926, 0xD194, + 0x8927, 0xD195, 0x8928, 0xD196, 0x8929, 0xD197, 0x892A, 0xCDCA, + 0x892B, 0xF1DD, 0x892C, 0xD198, 0x892D, 0xD199, 0x892E, 0xD19A, + 0x892F, 0xD19B, 0x8930, 0xE5BD, 0x8931, 0xD19C, 0x8932, 0xD19D, + 0x8933, 0xD19E, 0x8934, 0xF1DC, 0x8935, 0xD19F, 0x8936, 0xF1DE, + 0x8937, 0xD1A0, 0x8938, 0xD240, 0x8939, 0xD241, 0x893A, 0xD242, + 0x893B, 0xD243, 0x893C, 0xD244, 0x893D, 0xD245, 0x893E, 0xD246, + 0x893F, 0xD247, 0x8940, 0xD248, 0x8941, 0xF1DF, 0x8942, 0xD249, + 0x8943, 0xD24A, 0x8944, 0xCFE5, 0x8945, 0xD24B, 0x8946, 0xD24C, + 0x8947, 0xD24D, 0x8948, 0xD24E, 0x8949, 0xD24F, 0x894A, 0xD250, + 0x894B, 0xD251, 0x894C, 0xD252, 0x894D, 0xD253, 0x894E, 0xD254, + 0x894F, 0xD255, 0x8950, 0xD256, 0x8951, 0xD257, 0x8952, 0xD258, + 0x8953, 0xD259, 0x8954, 0xD25A, 0x8955, 0xD25B, 0x8956, 0xD25C, + 0x8957, 0xD25D, 0x8958, 0xD25E, 0x8959, 0xD25F, 0x895A, 0xD260, + 0x895B, 0xD261, 0x895C, 0xD262, 0x895D, 0xD263, 0x895E, 0xF4C5, + 0x895F, 0xBDF3, 0x8960, 0xD264, 0x8961, 0xD265, 0x8962, 0xD266, + 0x8963, 0xD267, 0x8964, 0xD268, 0x8965, 0xD269, 0x8966, 0xF1E0, + 0x8967, 0xD26A, 0x8968, 0xD26B, 0x8969, 0xD26C, 0x896A, 0xD26D, + 0x896B, 0xD26E, 0x896C, 0xD26F, 0x896D, 0xD270, 0x896E, 0xD271, + 0x896F, 0xD272, 0x8970, 0xD273, 0x8971, 0xD274, 0x8972, 0xD275, + 0x8973, 0xD276, 0x8974, 0xD277, 0x8975, 0xD278, 0x8976, 0xD279, + 0x8977, 0xD27A, 0x8978, 0xD27B, 0x8979, 0xD27C, 0x897A, 0xD27D, + 0x897B, 0xF1E1, 0x897C, 0xD27E, 0x897D, 0xD280, 0x897E, 0xD281, + 0x897F, 0xCEF7, 0x8980, 0xD282, 0x8981, 0xD2AA, 0x8982, 0xD283, + 0x8983, 0xF1FB, 0x8984, 0xD284, 0x8985, 0xD285, 0x8986, 0xB8B2, + 0x8987, 0xD286, 0x8988, 0xD287, 0x8989, 0xD288, 0x898A, 0xD289, + 0x898B, 0xD28A, 0x898C, 0xD28B, 0x898D, 0xD28C, 0x898E, 0xD28D, + 0x898F, 0xD28E, 0x8990, 0xD28F, 0x8991, 0xD290, 0x8992, 0xD291, + 0x8993, 0xD292, 0x8994, 0xD293, 0x8995, 0xD294, 0x8996, 0xD295, + 0x8997, 0xD296, 0x8998, 0xD297, 0x8999, 0xD298, 0x899A, 0xD299, + 0x899B, 0xD29A, 0x899C, 0xD29B, 0x899D, 0xD29C, 0x899E, 0xD29D, + 0x899F, 0xD29E, 0x89A0, 0xD29F, 0x89A1, 0xD2A0, 0x89A2, 0xD340, + 0x89A3, 0xD341, 0x89A4, 0xD342, 0x89A5, 0xD343, 0x89A6, 0xD344, + 0x89A7, 0xD345, 0x89A8, 0xD346, 0x89A9, 0xD347, 0x89AA, 0xD348, + 0x89AB, 0xD349, 0x89AC, 0xD34A, 0x89AD, 0xD34B, 0x89AE, 0xD34C, + 0x89AF, 0xD34D, 0x89B0, 0xD34E, 0x89B1, 0xD34F, 0x89B2, 0xD350, + 0x89B3, 0xD351, 0x89B4, 0xD352, 0x89B5, 0xD353, 0x89B6, 0xD354, + 0x89B7, 0xD355, 0x89B8, 0xD356, 0x89B9, 0xD357, 0x89BA, 0xD358, + 0x89BB, 0xD359, 0x89BC, 0xD35A, 0x89BD, 0xD35B, 0x89BE, 0xD35C, + 0x89BF, 0xD35D, 0x89C0, 0xD35E, 0x89C1, 0xBCFB, 0x89C2, 0xB9DB, + 0x89C3, 0xD35F, 0x89C4, 0xB9E6, 0x89C5, 0xC3D9, 0x89C6, 0xCAD3, + 0x89C7, 0xEAE8, 0x89C8, 0xC0C0, 0x89C9, 0xBEF5, 0x89CA, 0xEAE9, + 0x89CB, 0xEAEA, 0x89CC, 0xEAEB, 0x89CD, 0xD360, 0x89CE, 0xEAEC, + 0x89CF, 0xEAED, 0x89D0, 0xEAEE, 0x89D1, 0xEAEF, 0x89D2, 0xBDC7, + 0x89D3, 0xD361, 0x89D4, 0xD362, 0x89D5, 0xD363, 0x89D6, 0xF5FB, + 0x89D7, 0xD364, 0x89D8, 0xD365, 0x89D9, 0xD366, 0x89DA, 0xF5FD, + 0x89DB, 0xD367, 0x89DC, 0xF5FE, 0x89DD, 0xD368, 0x89DE, 0xF5FC, + 0x89DF, 0xD369, 0x89E0, 0xD36A, 0x89E1, 0xD36B, 0x89E2, 0xD36C, + 0x89E3, 0xBDE2, 0x89E4, 0xD36D, 0x89E5, 0xF6A1, 0x89E6, 0xB4A5, + 0x89E7, 0xD36E, 0x89E8, 0xD36F, 0x89E9, 0xD370, 0x89EA, 0xD371, + 0x89EB, 0xF6A2, 0x89EC, 0xD372, 0x89ED, 0xD373, 0x89EE, 0xD374, + 0x89EF, 0xF6A3, 0x89F0, 0xD375, 0x89F1, 0xD376, 0x89F2, 0xD377, + 0x89F3, 0xECB2, 0x89F4, 0xD378, 0x89F5, 0xD379, 0x89F6, 0xD37A, + 0x89F7, 0xD37B, 0x89F8, 0xD37C, 0x89F9, 0xD37D, 0x89FA, 0xD37E, + 0x89FB, 0xD380, 0x89FC, 0xD381, 0x89FD, 0xD382, 0x89FE, 0xD383, + 0x89FF, 0xD384, 0x8A00, 0xD1D4, 0x8A01, 0xD385, 0x8A02, 0xD386, + 0x8A03, 0xD387, 0x8A04, 0xD388, 0x8A05, 0xD389, 0x8A06, 0xD38A, + 0x8A07, 0xD9EA, 0x8A08, 0xD38B, 0x8A09, 0xD38C, 0x8A0A, 0xD38D, + 0x8A0B, 0xD38E, 0x8A0C, 0xD38F, 0x8A0D, 0xD390, 0x8A0E, 0xD391, + 0x8A0F, 0xD392, 0x8A10, 0xD393, 0x8A11, 0xD394, 0x8A12, 0xD395, + 0x8A13, 0xD396, 0x8A14, 0xD397, 0x8A15, 0xD398, 0x8A16, 0xD399, + 0x8A17, 0xD39A, 0x8A18, 0xD39B, 0x8A19, 0xD39C, 0x8A1A, 0xD39D, + 0x8A1B, 0xD39E, 0x8A1C, 0xD39F, 0x8A1D, 0xD3A0, 0x8A1E, 0xD440, + 0x8A1F, 0xD441, 0x8A20, 0xD442, 0x8A21, 0xD443, 0x8A22, 0xD444, + 0x8A23, 0xD445, 0x8A24, 0xD446, 0x8A25, 0xD447, 0x8A26, 0xD448, + 0x8A27, 0xD449, 0x8A28, 0xD44A, 0x8A29, 0xD44B, 0x8A2A, 0xD44C, + 0x8A2B, 0xD44D, 0x8A2C, 0xD44E, 0x8A2D, 0xD44F, 0x8A2E, 0xD450, + 0x8A2F, 0xD451, 0x8A30, 0xD452, 0x8A31, 0xD453, 0x8A32, 0xD454, + 0x8A33, 0xD455, 0x8A34, 0xD456, 0x8A35, 0xD457, 0x8A36, 0xD458, + 0x8A37, 0xD459, 0x8A38, 0xD45A, 0x8A39, 0xD45B, 0x8A3A, 0xD45C, + 0x8A3B, 0xD45D, 0x8A3C, 0xD45E, 0x8A3D, 0xD45F, 0x8A3E, 0xF6A4, + 0x8A3F, 0xD460, 0x8A40, 0xD461, 0x8A41, 0xD462, 0x8A42, 0xD463, + 0x8A43, 0xD464, 0x8A44, 0xD465, 0x8A45, 0xD466, 0x8A46, 0xD467, + 0x8A47, 0xD468, 0x8A48, 0xEEBA, 0x8A49, 0xD469, 0x8A4A, 0xD46A, + 0x8A4B, 0xD46B, 0x8A4C, 0xD46C, 0x8A4D, 0xD46D, 0x8A4E, 0xD46E, + 0x8A4F, 0xD46F, 0x8A50, 0xD470, 0x8A51, 0xD471, 0x8A52, 0xD472, + 0x8A53, 0xD473, 0x8A54, 0xD474, 0x8A55, 0xD475, 0x8A56, 0xD476, + 0x8A57, 0xD477, 0x8A58, 0xD478, 0x8A59, 0xD479, 0x8A5A, 0xD47A, + 0x8A5B, 0xD47B, 0x8A5C, 0xD47C, 0x8A5D, 0xD47D, 0x8A5E, 0xD47E, + 0x8A5F, 0xD480, 0x8A60, 0xD481, 0x8A61, 0xD482, 0x8A62, 0xD483, + 0x8A63, 0xD484, 0x8A64, 0xD485, 0x8A65, 0xD486, 0x8A66, 0xD487, + 0x8A67, 0xD488, 0x8A68, 0xD489, 0x8A69, 0xD48A, 0x8A6A, 0xD48B, + 0x8A6B, 0xD48C, 0x8A6C, 0xD48D, 0x8A6D, 0xD48E, 0x8A6E, 0xD48F, + 0x8A6F, 0xD490, 0x8A70, 0xD491, 0x8A71, 0xD492, 0x8A72, 0xD493, + 0x8A73, 0xD494, 0x8A74, 0xD495, 0x8A75, 0xD496, 0x8A76, 0xD497, + 0x8A77, 0xD498, 0x8A78, 0xD499, 0x8A79, 0xD5B2, 0x8A7A, 0xD49A, + 0x8A7B, 0xD49B, 0x8A7C, 0xD49C, 0x8A7D, 0xD49D, 0x8A7E, 0xD49E, + 0x8A7F, 0xD49F, 0x8A80, 0xD4A0, 0x8A81, 0xD540, 0x8A82, 0xD541, + 0x8A83, 0xD542, 0x8A84, 0xD543, 0x8A85, 0xD544, 0x8A86, 0xD545, + 0x8A87, 0xD546, 0x8A88, 0xD547, 0x8A89, 0xD3FE, 0x8A8A, 0xCCDC, + 0x8A8B, 0xD548, 0x8A8C, 0xD549, 0x8A8D, 0xD54A, 0x8A8E, 0xD54B, + 0x8A8F, 0xD54C, 0x8A90, 0xD54D, 0x8A91, 0xD54E, 0x8A92, 0xD54F, + 0x8A93, 0xCAC4, 0x8A94, 0xD550, 0x8A95, 0xD551, 0x8A96, 0xD552, + 0x8A97, 0xD553, 0x8A98, 0xD554, 0x8A99, 0xD555, 0x8A9A, 0xD556, + 0x8A9B, 0xD557, 0x8A9C, 0xD558, 0x8A9D, 0xD559, 0x8A9E, 0xD55A, + 0x8A9F, 0xD55B, 0x8AA0, 0xD55C, 0x8AA1, 0xD55D, 0x8AA2, 0xD55E, + 0x8AA3, 0xD55F, 0x8AA4, 0xD560, 0x8AA5, 0xD561, 0x8AA6, 0xD562, + 0x8AA7, 0xD563, 0x8AA8, 0xD564, 0x8AA9, 0xD565, 0x8AAA, 0xD566, + 0x8AAB, 0xD567, 0x8AAC, 0xD568, 0x8AAD, 0xD569, 0x8AAE, 0xD56A, + 0x8AAF, 0xD56B, 0x8AB0, 0xD56C, 0x8AB1, 0xD56D, 0x8AB2, 0xD56E, + 0x8AB3, 0xD56F, 0x8AB4, 0xD570, 0x8AB5, 0xD571, 0x8AB6, 0xD572, + 0x8AB7, 0xD573, 0x8AB8, 0xD574, 0x8AB9, 0xD575, 0x8ABA, 0xD576, + 0x8ABB, 0xD577, 0x8ABC, 0xD578, 0x8ABD, 0xD579, 0x8ABE, 0xD57A, + 0x8ABF, 0xD57B, 0x8AC0, 0xD57C, 0x8AC1, 0xD57D, 0x8AC2, 0xD57E, + 0x8AC3, 0xD580, 0x8AC4, 0xD581, 0x8AC5, 0xD582, 0x8AC6, 0xD583, + 0x8AC7, 0xD584, 0x8AC8, 0xD585, 0x8AC9, 0xD586, 0x8ACA, 0xD587, + 0x8ACB, 0xD588, 0x8ACC, 0xD589, 0x8ACD, 0xD58A, 0x8ACE, 0xD58B, + 0x8ACF, 0xD58C, 0x8AD0, 0xD58D, 0x8AD1, 0xD58E, 0x8AD2, 0xD58F, + 0x8AD3, 0xD590, 0x8AD4, 0xD591, 0x8AD5, 0xD592, 0x8AD6, 0xD593, + 0x8AD7, 0xD594, 0x8AD8, 0xD595, 0x8AD9, 0xD596, 0x8ADA, 0xD597, + 0x8ADB, 0xD598, 0x8ADC, 0xD599, 0x8ADD, 0xD59A, 0x8ADE, 0xD59B, + 0x8ADF, 0xD59C, 0x8AE0, 0xD59D, 0x8AE1, 0xD59E, 0x8AE2, 0xD59F, + 0x8AE3, 0xD5A0, 0x8AE4, 0xD640, 0x8AE5, 0xD641, 0x8AE6, 0xD642, + 0x8AE7, 0xD643, 0x8AE8, 0xD644, 0x8AE9, 0xD645, 0x8AEA, 0xD646, + 0x8AEB, 0xD647, 0x8AEC, 0xD648, 0x8AED, 0xD649, 0x8AEE, 0xD64A, + 0x8AEF, 0xD64B, 0x8AF0, 0xD64C, 0x8AF1, 0xD64D, 0x8AF2, 0xD64E, + 0x8AF3, 0xD64F, 0x8AF4, 0xD650, 0x8AF5, 0xD651, 0x8AF6, 0xD652, + 0x8AF7, 0xD653, 0x8AF8, 0xD654, 0x8AF9, 0xD655, 0x8AFA, 0xD656, + 0x8AFB, 0xD657, 0x8AFC, 0xD658, 0x8AFD, 0xD659, 0x8AFE, 0xD65A, + 0x8AFF, 0xD65B, 0x8B00, 0xD65C, 0x8B01, 0xD65D, 0x8B02, 0xD65E, + 0x8B03, 0xD65F, 0x8B04, 0xD660, 0x8B05, 0xD661, 0x8B06, 0xD662, + 0x8B07, 0xE5C0, 0x8B08, 0xD663, 0x8B09, 0xD664, 0x8B0A, 0xD665, + 0x8B0B, 0xD666, 0x8B0C, 0xD667, 0x8B0D, 0xD668, 0x8B0E, 0xD669, + 0x8B0F, 0xD66A, 0x8B10, 0xD66B, 0x8B11, 0xD66C, 0x8B12, 0xD66D, + 0x8B13, 0xD66E, 0x8B14, 0xD66F, 0x8B15, 0xD670, 0x8B16, 0xD671, + 0x8B17, 0xD672, 0x8B18, 0xD673, 0x8B19, 0xD674, 0x8B1A, 0xD675, + 0x8B1B, 0xD676, 0x8B1C, 0xD677, 0x8B1D, 0xD678, 0x8B1E, 0xD679, + 0x8B1F, 0xD67A, 0x8B20, 0xD67B, 0x8B21, 0xD67C, 0x8B22, 0xD67D, + 0x8B23, 0xD67E, 0x8B24, 0xD680, 0x8B25, 0xD681, 0x8B26, 0xF6A5, + 0x8B27, 0xD682, 0x8B28, 0xD683, 0x8B29, 0xD684, 0x8B2A, 0xD685, + 0x8B2B, 0xD686, 0x8B2C, 0xD687, 0x8B2D, 0xD688, 0x8B2E, 0xD689, + 0x8B2F, 0xD68A, 0x8B30, 0xD68B, 0x8B31, 0xD68C, 0x8B32, 0xD68D, + 0x8B33, 0xD68E, 0x8B34, 0xD68F, 0x8B35, 0xD690, 0x8B36, 0xD691, + 0x8B37, 0xD692, 0x8B38, 0xD693, 0x8B39, 0xD694, 0x8B3A, 0xD695, + 0x8B3B, 0xD696, 0x8B3C, 0xD697, 0x8B3D, 0xD698, 0x8B3E, 0xD699, + 0x8B3F, 0xD69A, 0x8B40, 0xD69B, 0x8B41, 0xD69C, 0x8B42, 0xD69D, + 0x8B43, 0xD69E, 0x8B44, 0xD69F, 0x8B45, 0xD6A0, 0x8B46, 0xD740, + 0x8B47, 0xD741, 0x8B48, 0xD742, 0x8B49, 0xD743, 0x8B4A, 0xD744, + 0x8B4B, 0xD745, 0x8B4C, 0xD746, 0x8B4D, 0xD747, 0x8B4E, 0xD748, + 0x8B4F, 0xD749, 0x8B50, 0xD74A, 0x8B51, 0xD74B, 0x8B52, 0xD74C, + 0x8B53, 0xD74D, 0x8B54, 0xD74E, 0x8B55, 0xD74F, 0x8B56, 0xD750, + 0x8B57, 0xD751, 0x8B58, 0xD752, 0x8B59, 0xD753, 0x8B5A, 0xD754, + 0x8B5B, 0xD755, 0x8B5C, 0xD756, 0x8B5D, 0xD757, 0x8B5E, 0xD758, + 0x8B5F, 0xD759, 0x8B60, 0xD75A, 0x8B61, 0xD75B, 0x8B62, 0xD75C, + 0x8B63, 0xD75D, 0x8B64, 0xD75E, 0x8B65, 0xD75F, 0x8B66, 0xBEAF, + 0x8B67, 0xD760, 0x8B68, 0xD761, 0x8B69, 0xD762, 0x8B6A, 0xD763, + 0x8B6B, 0xD764, 0x8B6C, 0xC6A9, 0x8B6D, 0xD765, 0x8B6E, 0xD766, + 0x8B6F, 0xD767, 0x8B70, 0xD768, 0x8B71, 0xD769, 0x8B72, 0xD76A, + 0x8B73, 0xD76B, 0x8B74, 0xD76C, 0x8B75, 0xD76D, 0x8B76, 0xD76E, + 0x8B77, 0xD76F, 0x8B78, 0xD770, 0x8B79, 0xD771, 0x8B7A, 0xD772, + 0x8B7B, 0xD773, 0x8B7C, 0xD774, 0x8B7D, 0xD775, 0x8B7E, 0xD776, + 0x8B7F, 0xD777, 0x8B80, 0xD778, 0x8B81, 0xD779, 0x8B82, 0xD77A, + 0x8B83, 0xD77B, 0x8B84, 0xD77C, 0x8B85, 0xD77D, 0x8B86, 0xD77E, + 0x8B87, 0xD780, 0x8B88, 0xD781, 0x8B89, 0xD782, 0x8B8A, 0xD783, + 0x8B8B, 0xD784, 0x8B8C, 0xD785, 0x8B8D, 0xD786, 0x8B8E, 0xD787, + 0x8B8F, 0xD788, 0x8B90, 0xD789, 0x8B91, 0xD78A, 0x8B92, 0xD78B, + 0x8B93, 0xD78C, 0x8B94, 0xD78D, 0x8B95, 0xD78E, 0x8B96, 0xD78F, + 0x8B97, 0xD790, 0x8B98, 0xD791, 0x8B99, 0xD792, 0x8B9A, 0xD793, + 0x8B9B, 0xD794, 0x8B9C, 0xD795, 0x8B9D, 0xD796, 0x8B9E, 0xD797, + 0x8B9F, 0xD798, 0x8BA0, 0xDAA5, 0x8BA1, 0xBCC6, 0x8BA2, 0xB6A9, + 0x8BA3, 0xB8BC, 0x8BA4, 0xC8CF, 0x8BA5, 0xBCA5, 0x8BA6, 0xDAA6, + 0x8BA7, 0xDAA7, 0x8BA8, 0xCCD6, 0x8BA9, 0xC8C3, 0x8BAA, 0xDAA8, + 0x8BAB, 0xC6FD, 0x8BAC, 0xD799, 0x8BAD, 0xD1B5, 0x8BAE, 0xD2E9, + 0x8BAF, 0xD1B6, 0x8BB0, 0xBCC7, 0x8BB1, 0xD79A, 0x8BB2, 0xBDB2, + 0x8BB3, 0xBBE4, 0x8BB4, 0xDAA9, 0x8BB5, 0xDAAA, 0x8BB6, 0xD1C8, + 0x8BB7, 0xDAAB, 0x8BB8, 0xD0ED, 0x8BB9, 0xB6EF, 0x8BBA, 0xC2DB, + 0x8BBB, 0xD79B, 0x8BBC, 0xCBCF, 0x8BBD, 0xB7ED, 0x8BBE, 0xC9E8, + 0x8BBF, 0xB7C3, 0x8BC0, 0xBEF7, 0x8BC1, 0xD6A4, 0x8BC2, 0xDAAC, + 0x8BC3, 0xDAAD, 0x8BC4, 0xC6C0, 0x8BC5, 0xD7E7, 0x8BC6, 0xCAB6, + 0x8BC7, 0xD79C, 0x8BC8, 0xD5A9, 0x8BC9, 0xCBDF, 0x8BCA, 0xD5EF, + 0x8BCB, 0xDAAE, 0x8BCC, 0xD6DF, 0x8BCD, 0xB4CA, 0x8BCE, 0xDAB0, + 0x8BCF, 0xDAAF, 0x8BD0, 0xD79D, 0x8BD1, 0xD2EB, 0x8BD2, 0xDAB1, + 0x8BD3, 0xDAB2, 0x8BD4, 0xDAB3, 0x8BD5, 0xCAD4, 0x8BD6, 0xDAB4, + 0x8BD7, 0xCAAB, 0x8BD8, 0xDAB5, 0x8BD9, 0xDAB6, 0x8BDA, 0xB3CF, + 0x8BDB, 0xD6EF, 0x8BDC, 0xDAB7, 0x8BDD, 0xBBB0, 0x8BDE, 0xB5AE, + 0x8BDF, 0xDAB8, 0x8BE0, 0xDAB9, 0x8BE1, 0xB9EE, 0x8BE2, 0xD1AF, + 0x8BE3, 0xD2E8, 0x8BE4, 0xDABA, 0x8BE5, 0xB8C3, 0x8BE6, 0xCFEA, + 0x8BE7, 0xB2EF, 0x8BE8, 0xDABB, 0x8BE9, 0xDABC, 0x8BEA, 0xD79E, + 0x8BEB, 0xBDEB, 0x8BEC, 0xCEDC, 0x8BED, 0xD3EF, 0x8BEE, 0xDABD, + 0x8BEF, 0xCEF3, 0x8BF0, 0xDABE, 0x8BF1, 0xD3D5, 0x8BF2, 0xBBE5, + 0x8BF3, 0xDABF, 0x8BF4, 0xCBB5, 0x8BF5, 0xCBD0, 0x8BF6, 0xDAC0, + 0x8BF7, 0xC7EB, 0x8BF8, 0xD6EE, 0x8BF9, 0xDAC1, 0x8BFA, 0xC5B5, + 0x8BFB, 0xB6C1, 0x8BFC, 0xDAC2, 0x8BFD, 0xB7CC, 0x8BFE, 0xBFCE, + 0x8BFF, 0xDAC3, 0x8C00, 0xDAC4, 0x8C01, 0xCBAD, 0x8C02, 0xDAC5, + 0x8C03, 0xB5F7, 0x8C04, 0xDAC6, 0x8C05, 0xC1C2, 0x8C06, 0xD7BB, + 0x8C07, 0xDAC7, 0x8C08, 0xCCB8, 0x8C09, 0xD79F, 0x8C0A, 0xD2EA, + 0x8C0B, 0xC4B1, 0x8C0C, 0xDAC8, 0x8C0D, 0xB5FD, 0x8C0E, 0xBBD1, + 0x8C0F, 0xDAC9, 0x8C10, 0xD0B3, 0x8C11, 0xDACA, 0x8C12, 0xDACB, + 0x8C13, 0xCEBD, 0x8C14, 0xDACC, 0x8C15, 0xDACD, 0x8C16, 0xDACE, + 0x8C17, 0xB2F7, 0x8C18, 0xDAD1, 0x8C19, 0xDACF, 0x8C1A, 0xD1E8, + 0x8C1B, 0xDAD0, 0x8C1C, 0xC3D5, 0x8C1D, 0xDAD2, 0x8C1E, 0xD7A0, + 0x8C1F, 0xDAD3, 0x8C20, 0xDAD4, 0x8C21, 0xDAD5, 0x8C22, 0xD0BB, + 0x8C23, 0xD2A5, 0x8C24, 0xB0F9, 0x8C25, 0xDAD6, 0x8C26, 0xC7AB, + 0x8C27, 0xDAD7, 0x8C28, 0xBDF7, 0x8C29, 0xC3A1, 0x8C2A, 0xDAD8, + 0x8C2B, 0xDAD9, 0x8C2C, 0xC3FD, 0x8C2D, 0xCCB7, 0x8C2E, 0xDADA, + 0x8C2F, 0xDADB, 0x8C30, 0xC0BE, 0x8C31, 0xC6D7, 0x8C32, 0xDADC, + 0x8C33, 0xDADD, 0x8C34, 0xC7B4, 0x8C35, 0xDADE, 0x8C36, 0xDADF, + 0x8C37, 0xB9C8, 0x8C38, 0xD840, 0x8C39, 0xD841, 0x8C3A, 0xD842, + 0x8C3B, 0xD843, 0x8C3C, 0xD844, 0x8C3D, 0xD845, 0x8C3E, 0xD846, + 0x8C3F, 0xD847, 0x8C40, 0xD848, 0x8C41, 0xBBED, 0x8C42, 0xD849, + 0x8C43, 0xD84A, 0x8C44, 0xD84B, 0x8C45, 0xD84C, 0x8C46, 0xB6B9, + 0x8C47, 0xF4F8, 0x8C48, 0xD84D, 0x8C49, 0xF4F9, 0x8C4A, 0xD84E, + 0x8C4B, 0xD84F, 0x8C4C, 0xCDE3, 0x8C4D, 0xD850, 0x8C4E, 0xD851, + 0x8C4F, 0xD852, 0x8C50, 0xD853, 0x8C51, 0xD854, 0x8C52, 0xD855, + 0x8C53, 0xD856, 0x8C54, 0xD857, 0x8C55, 0xF5B9, 0x8C56, 0xD858, + 0x8C57, 0xD859, 0x8C58, 0xD85A, 0x8C59, 0xD85B, 0x8C5A, 0xEBE0, + 0x8C5B, 0xD85C, 0x8C5C, 0xD85D, 0x8C5D, 0xD85E, 0x8C5E, 0xD85F, + 0x8C5F, 0xD860, 0x8C60, 0xD861, 0x8C61, 0xCFF3, 0x8C62, 0xBBBF, + 0x8C63, 0xD862, 0x8C64, 0xD863, 0x8C65, 0xD864, 0x8C66, 0xD865, + 0x8C67, 0xD866, 0x8C68, 0xD867, 0x8C69, 0xD868, 0x8C6A, 0xBAC0, + 0x8C6B, 0xD4A5, 0x8C6C, 0xD869, 0x8C6D, 0xD86A, 0x8C6E, 0xD86B, + 0x8C6F, 0xD86C, 0x8C70, 0xD86D, 0x8C71, 0xD86E, 0x8C72, 0xD86F, + 0x8C73, 0xE1D9, 0x8C74, 0xD870, 0x8C75, 0xD871, 0x8C76, 0xD872, + 0x8C77, 0xD873, 0x8C78, 0xF5F4, 0x8C79, 0xB1AA, 0x8C7A, 0xB2F2, + 0x8C7B, 0xD874, 0x8C7C, 0xD875, 0x8C7D, 0xD876, 0x8C7E, 0xD877, + 0x8C7F, 0xD878, 0x8C80, 0xD879, 0x8C81, 0xD87A, 0x8C82, 0xF5F5, + 0x8C83, 0xD87B, 0x8C84, 0xD87C, 0x8C85, 0xF5F7, 0x8C86, 0xD87D, + 0x8C87, 0xD87E, 0x8C88, 0xD880, 0x8C89, 0xBAD1, 0x8C8A, 0xF5F6, + 0x8C8B, 0xD881, 0x8C8C, 0xC3B2, 0x8C8D, 0xD882, 0x8C8E, 0xD883, + 0x8C8F, 0xD884, 0x8C90, 0xD885, 0x8C91, 0xD886, 0x8C92, 0xD887, + 0x8C93, 0xD888, 0x8C94, 0xF5F9, 0x8C95, 0xD889, 0x8C96, 0xD88A, + 0x8C97, 0xD88B, 0x8C98, 0xF5F8, 0x8C99, 0xD88C, 0x8C9A, 0xD88D, + 0x8C9B, 0xD88E, 0x8C9C, 0xD88F, 0x8C9D, 0xD890, 0x8C9E, 0xD891, + 0x8C9F, 0xD892, 0x8CA0, 0xD893, 0x8CA1, 0xD894, 0x8CA2, 0xD895, + 0x8CA3, 0xD896, 0x8CA4, 0xD897, 0x8CA5, 0xD898, 0x8CA6, 0xD899, + 0x8CA7, 0xD89A, 0x8CA8, 0xD89B, 0x8CA9, 0xD89C, 0x8CAA, 0xD89D, + 0x8CAB, 0xD89E, 0x8CAC, 0xD89F, 0x8CAD, 0xD8A0, 0x8CAE, 0xD940, + 0x8CAF, 0xD941, 0x8CB0, 0xD942, 0x8CB1, 0xD943, 0x8CB2, 0xD944, + 0x8CB3, 0xD945, 0x8CB4, 0xD946, 0x8CB5, 0xD947, 0x8CB6, 0xD948, + 0x8CB7, 0xD949, 0x8CB8, 0xD94A, 0x8CB9, 0xD94B, 0x8CBA, 0xD94C, + 0x8CBB, 0xD94D, 0x8CBC, 0xD94E, 0x8CBD, 0xD94F, 0x8CBE, 0xD950, + 0x8CBF, 0xD951, 0x8CC0, 0xD952, 0x8CC1, 0xD953, 0x8CC2, 0xD954, + 0x8CC3, 0xD955, 0x8CC4, 0xD956, 0x8CC5, 0xD957, 0x8CC6, 0xD958, + 0x8CC7, 0xD959, 0x8CC8, 0xD95A, 0x8CC9, 0xD95B, 0x8CCA, 0xD95C, + 0x8CCB, 0xD95D, 0x8CCC, 0xD95E, 0x8CCD, 0xD95F, 0x8CCE, 0xD960, + 0x8CCF, 0xD961, 0x8CD0, 0xD962, 0x8CD1, 0xD963, 0x8CD2, 0xD964, + 0x8CD3, 0xD965, 0x8CD4, 0xD966, 0x8CD5, 0xD967, 0x8CD6, 0xD968, + 0x8CD7, 0xD969, 0x8CD8, 0xD96A, 0x8CD9, 0xD96B, 0x8CDA, 0xD96C, + 0x8CDB, 0xD96D, 0x8CDC, 0xD96E, 0x8CDD, 0xD96F, 0x8CDE, 0xD970, + 0x8CDF, 0xD971, 0x8CE0, 0xD972, 0x8CE1, 0xD973, 0x8CE2, 0xD974, + 0x8CE3, 0xD975, 0x8CE4, 0xD976, 0x8CE5, 0xD977, 0x8CE6, 0xD978, + 0x8CE7, 0xD979, 0x8CE8, 0xD97A, 0x8CE9, 0xD97B, 0x8CEA, 0xD97C, + 0x8CEB, 0xD97D, 0x8CEC, 0xD97E, 0x8CED, 0xD980, 0x8CEE, 0xD981, + 0x8CEF, 0xD982, 0x8CF0, 0xD983, 0x8CF1, 0xD984, 0x8CF2, 0xD985, + 0x8CF3, 0xD986, 0x8CF4, 0xD987, 0x8CF5, 0xD988, 0x8CF6, 0xD989, + 0x8CF7, 0xD98A, 0x8CF8, 0xD98B, 0x8CF9, 0xD98C, 0x8CFA, 0xD98D, + 0x8CFB, 0xD98E, 0x8CFC, 0xD98F, 0x8CFD, 0xD990, 0x8CFE, 0xD991, + 0x8CFF, 0xD992, 0x8D00, 0xD993, 0x8D01, 0xD994, 0x8D02, 0xD995, + 0x8D03, 0xD996, 0x8D04, 0xD997, 0x8D05, 0xD998, 0x8D06, 0xD999, + 0x8D07, 0xD99A, 0x8D08, 0xD99B, 0x8D09, 0xD99C, 0x8D0A, 0xD99D, + 0x8D0B, 0xD99E, 0x8D0C, 0xD99F, 0x8D0D, 0xD9A0, 0x8D0E, 0xDA40, + 0x8D0F, 0xDA41, 0x8D10, 0xDA42, 0x8D11, 0xDA43, 0x8D12, 0xDA44, + 0x8D13, 0xDA45, 0x8D14, 0xDA46, 0x8D15, 0xDA47, 0x8D16, 0xDA48, + 0x8D17, 0xDA49, 0x8D18, 0xDA4A, 0x8D19, 0xDA4B, 0x8D1A, 0xDA4C, + 0x8D1B, 0xDA4D, 0x8D1C, 0xDA4E, 0x8D1D, 0xB1B4, 0x8D1E, 0xD5EA, + 0x8D1F, 0xB8BA, 0x8D20, 0xDA4F, 0x8D21, 0xB9B1, 0x8D22, 0xB2C6, + 0x8D23, 0xD4F0, 0x8D24, 0xCFCD, 0x8D25, 0xB0DC, 0x8D26, 0xD5CB, + 0x8D27, 0xBBF5, 0x8D28, 0xD6CA, 0x8D29, 0xB7B7, 0x8D2A, 0xCCB0, + 0x8D2B, 0xC6B6, 0x8D2C, 0xB1E1, 0x8D2D, 0xB9BA, 0x8D2E, 0xD6FC, + 0x8D2F, 0xB9E1, 0x8D30, 0xB7A1, 0x8D31, 0xBCFA, 0x8D32, 0xEADA, + 0x8D33, 0xEADB, 0x8D34, 0xCCF9, 0x8D35, 0xB9F3, 0x8D36, 0xEADC, + 0x8D37, 0xB4FB, 0x8D38, 0xC3B3, 0x8D39, 0xB7D1, 0x8D3A, 0xBAD8, + 0x8D3B, 0xEADD, 0x8D3C, 0xD4F4, 0x8D3D, 0xEADE, 0x8D3E, 0xBCD6, + 0x8D3F, 0xBBDF, 0x8D40, 0xEADF, 0x8D41, 0xC1DE, 0x8D42, 0xC2B8, + 0x8D43, 0xD4DF, 0x8D44, 0xD7CA, 0x8D45, 0xEAE0, 0x8D46, 0xEAE1, + 0x8D47, 0xEAE4, 0x8D48, 0xEAE2, 0x8D49, 0xEAE3, 0x8D4A, 0xC9DE, + 0x8D4B, 0xB8B3, 0x8D4C, 0xB6C4, 0x8D4D, 0xEAE5, 0x8D4E, 0xCAEA, + 0x8D4F, 0xC9CD, 0x8D50, 0xB4CD, 0x8D51, 0xDA50, 0x8D52, 0xDA51, + 0x8D53, 0xE2D9, 0x8D54, 0xC5E2, 0x8D55, 0xEAE6, 0x8D56, 0xC0B5, + 0x8D57, 0xDA52, 0x8D58, 0xD7B8, 0x8D59, 0xEAE7, 0x8D5A, 0xD7AC, + 0x8D5B, 0xC8FC, 0x8D5C, 0xD8D3, 0x8D5D, 0xD8CD, 0x8D5E, 0xD4DE, + 0x8D5F, 0xDA53, 0x8D60, 0xD4F9, 0x8D61, 0xC9C4, 0x8D62, 0xD3AE, + 0x8D63, 0xB8D3, 0x8D64, 0xB3E0, 0x8D65, 0xDA54, 0x8D66, 0xC9E2, + 0x8D67, 0xF4F6, 0x8D68, 0xDA55, 0x8D69, 0xDA56, 0x8D6A, 0xDA57, + 0x8D6B, 0xBAD5, 0x8D6C, 0xDA58, 0x8D6D, 0xF4F7, 0x8D6E, 0xDA59, + 0x8D6F, 0xDA5A, 0x8D70, 0xD7DF, 0x8D71, 0xDA5B, 0x8D72, 0xDA5C, + 0x8D73, 0xF4F1, 0x8D74, 0xB8B0, 0x8D75, 0xD5D4, 0x8D76, 0xB8CF, + 0x8D77, 0xC6F0, 0x8D78, 0xDA5D, 0x8D79, 0xDA5E, 0x8D7A, 0xDA5F, + 0x8D7B, 0xDA60, 0x8D7C, 0xDA61, 0x8D7D, 0xDA62, 0x8D7E, 0xDA63, + 0x8D7F, 0xDA64, 0x8D80, 0xDA65, 0x8D81, 0xB3C3, 0x8D82, 0xDA66, + 0x8D83, 0xDA67, 0x8D84, 0xF4F2, 0x8D85, 0xB3AC, 0x8D86, 0xDA68, + 0x8D87, 0xDA69, 0x8D88, 0xDA6A, 0x8D89, 0xDA6B, 0x8D8A, 0xD4BD, + 0x8D8B, 0xC7F7, 0x8D8C, 0xDA6C, 0x8D8D, 0xDA6D, 0x8D8E, 0xDA6E, + 0x8D8F, 0xDA6F, 0x8D90, 0xDA70, 0x8D91, 0xF4F4, 0x8D92, 0xDA71, + 0x8D93, 0xDA72, 0x8D94, 0xF4F3, 0x8D95, 0xDA73, 0x8D96, 0xDA74, + 0x8D97, 0xDA75, 0x8D98, 0xDA76, 0x8D99, 0xDA77, 0x8D9A, 0xDA78, + 0x8D9B, 0xDA79, 0x8D9C, 0xDA7A, 0x8D9D, 0xDA7B, 0x8D9E, 0xDA7C, + 0x8D9F, 0xCCCB, 0x8DA0, 0xDA7D, 0x8DA1, 0xDA7E, 0x8DA2, 0xDA80, + 0x8DA3, 0xC8A4, 0x8DA4, 0xDA81, 0x8DA5, 0xDA82, 0x8DA6, 0xDA83, + 0x8DA7, 0xDA84, 0x8DA8, 0xDA85, 0x8DA9, 0xDA86, 0x8DAA, 0xDA87, + 0x8DAB, 0xDA88, 0x8DAC, 0xDA89, 0x8DAD, 0xDA8A, 0x8DAE, 0xDA8B, + 0x8DAF, 0xDA8C, 0x8DB0, 0xDA8D, 0x8DB1, 0xF4F5, 0x8DB2, 0xDA8E, + 0x8DB3, 0xD7E3, 0x8DB4, 0xC5BF, 0x8DB5, 0xF5C0, 0x8DB6, 0xDA8F, + 0x8DB7, 0xDA90, 0x8DB8, 0xF5BB, 0x8DB9, 0xDA91, 0x8DBA, 0xF5C3, + 0x8DBB, 0xDA92, 0x8DBC, 0xF5C2, 0x8DBD, 0xDA93, 0x8DBE, 0xD6BA, + 0x8DBF, 0xF5C1, 0x8DC0, 0xDA94, 0x8DC1, 0xDA95, 0x8DC2, 0xDA96, + 0x8DC3, 0xD4BE, 0x8DC4, 0xF5C4, 0x8DC5, 0xDA97, 0x8DC6, 0xF5CC, + 0x8DC7, 0xDA98, 0x8DC8, 0xDA99, 0x8DC9, 0xDA9A, 0x8DCA, 0xDA9B, + 0x8DCB, 0xB0CF, 0x8DCC, 0xB5F8, 0x8DCD, 0xDA9C, 0x8DCE, 0xF5C9, + 0x8DCF, 0xF5CA, 0x8DD0, 0xDA9D, 0x8DD1, 0xC5DC, 0x8DD2, 0xDA9E, + 0x8DD3, 0xDA9F, 0x8DD4, 0xDAA0, 0x8DD5, 0xDB40, 0x8DD6, 0xF5C5, + 0x8DD7, 0xF5C6, 0x8DD8, 0xDB41, 0x8DD9, 0xDB42, 0x8DDA, 0xF5C7, + 0x8DDB, 0xF5CB, 0x8DDC, 0xDB43, 0x8DDD, 0xBEE0, 0x8DDE, 0xF5C8, + 0x8DDF, 0xB8FA, 0x8DE0, 0xDB44, 0x8DE1, 0xDB45, 0x8DE2, 0xDB46, + 0x8DE3, 0xF5D0, 0x8DE4, 0xF5D3, 0x8DE5, 0xDB47, 0x8DE6, 0xDB48, + 0x8DE7, 0xDB49, 0x8DE8, 0xBFE7, 0x8DE9, 0xDB4A, 0x8DEA, 0xB9F2, + 0x8DEB, 0xF5BC, 0x8DEC, 0xF5CD, 0x8DED, 0xDB4B, 0x8DEE, 0xDB4C, + 0x8DEF, 0xC2B7, 0x8DF0, 0xDB4D, 0x8DF1, 0xDB4E, 0x8DF2, 0xDB4F, + 0x8DF3, 0xCCF8, 0x8DF4, 0xDB50, 0x8DF5, 0xBCF9, 0x8DF6, 0xDB51, + 0x8DF7, 0xF5CE, 0x8DF8, 0xF5CF, 0x8DF9, 0xF5D1, 0x8DFA, 0xB6E5, + 0x8DFB, 0xF5D2, 0x8DFC, 0xDB52, 0x8DFD, 0xF5D5, 0x8DFE, 0xDB53, + 0x8DFF, 0xDB54, 0x8E00, 0xDB55, 0x8E01, 0xDB56, 0x8E02, 0xDB57, + 0x8E03, 0xDB58, 0x8E04, 0xDB59, 0x8E05, 0xF5BD, 0x8E06, 0xDB5A, + 0x8E07, 0xDB5B, 0x8E08, 0xDB5C, 0x8E09, 0xF5D4, 0x8E0A, 0xD3BB, + 0x8E0B, 0xDB5D, 0x8E0C, 0xB3EC, 0x8E0D, 0xDB5E, 0x8E0E, 0xDB5F, + 0x8E0F, 0xCCA4, 0x8E10, 0xDB60, 0x8E11, 0xDB61, 0x8E12, 0xDB62, + 0x8E13, 0xDB63, 0x8E14, 0xF5D6, 0x8E15, 0xDB64, 0x8E16, 0xDB65, + 0x8E17, 0xDB66, 0x8E18, 0xDB67, 0x8E19, 0xDB68, 0x8E1A, 0xDB69, + 0x8E1B, 0xDB6A, 0x8E1C, 0xDB6B, 0x8E1D, 0xF5D7, 0x8E1E, 0xBEE1, + 0x8E1F, 0xF5D8, 0x8E20, 0xDB6C, 0x8E21, 0xDB6D, 0x8E22, 0xCCDF, + 0x8E23, 0xF5DB, 0x8E24, 0xDB6E, 0x8E25, 0xDB6F, 0x8E26, 0xDB70, + 0x8E27, 0xDB71, 0x8E28, 0xDB72, 0x8E29, 0xB2C8, 0x8E2A, 0xD7D9, + 0x8E2B, 0xDB73, 0x8E2C, 0xF5D9, 0x8E2D, 0xDB74, 0x8E2E, 0xF5DA, + 0x8E2F, 0xF5DC, 0x8E30, 0xDB75, 0x8E31, 0xF5E2, 0x8E32, 0xDB76, + 0x8E33, 0xDB77, 0x8E34, 0xDB78, 0x8E35, 0xF5E0, 0x8E36, 0xDB79, + 0x8E37, 0xDB7A, 0x8E38, 0xDB7B, 0x8E39, 0xF5DF, 0x8E3A, 0xF5DD, + 0x8E3B, 0xDB7C, 0x8E3C, 0xDB7D, 0x8E3D, 0xF5E1, 0x8E3E, 0xDB7E, + 0x8E3F, 0xDB80, 0x8E40, 0xF5DE, 0x8E41, 0xF5E4, 0x8E42, 0xF5E5, + 0x8E43, 0xDB81, 0x8E44, 0xCCE3, 0x8E45, 0xDB82, 0x8E46, 0xDB83, + 0x8E47, 0xE5BF, 0x8E48, 0xB5B8, 0x8E49, 0xF5E3, 0x8E4A, 0xF5E8, + 0x8E4B, 0xCCA3, 0x8E4C, 0xDB84, 0x8E4D, 0xDB85, 0x8E4E, 0xDB86, + 0x8E4F, 0xDB87, 0x8E50, 0xDB88, 0x8E51, 0xF5E6, 0x8E52, 0xF5E7, + 0x8E53, 0xDB89, 0x8E54, 0xDB8A, 0x8E55, 0xDB8B, 0x8E56, 0xDB8C, + 0x8E57, 0xDB8D, 0x8E58, 0xDB8E, 0x8E59, 0xF5BE, 0x8E5A, 0xDB8F, + 0x8E5B, 0xDB90, 0x8E5C, 0xDB91, 0x8E5D, 0xDB92, 0x8E5E, 0xDB93, + 0x8E5F, 0xDB94, 0x8E60, 0xDB95, 0x8E61, 0xDB96, 0x8E62, 0xDB97, + 0x8E63, 0xDB98, 0x8E64, 0xDB99, 0x8E65, 0xDB9A, 0x8E66, 0xB1C4, + 0x8E67, 0xDB9B, 0x8E68, 0xDB9C, 0x8E69, 0xF5BF, 0x8E6A, 0xDB9D, + 0x8E6B, 0xDB9E, 0x8E6C, 0xB5C5, 0x8E6D, 0xB2E4, 0x8E6E, 0xDB9F, + 0x8E6F, 0xF5EC, 0x8E70, 0xF5E9, 0x8E71, 0xDBA0, 0x8E72, 0xB6D7, + 0x8E73, 0xDC40, 0x8E74, 0xF5ED, 0x8E75, 0xDC41, 0x8E76, 0xF5EA, + 0x8E77, 0xDC42, 0x8E78, 0xDC43, 0x8E79, 0xDC44, 0x8E7A, 0xDC45, + 0x8E7B, 0xDC46, 0x8E7C, 0xF5EB, 0x8E7D, 0xDC47, 0x8E7E, 0xDC48, + 0x8E7F, 0xB4DA, 0x8E80, 0xDC49, 0x8E81, 0xD4EA, 0x8E82, 0xDC4A, + 0x8E83, 0xDC4B, 0x8E84, 0xDC4C, 0x8E85, 0xF5EE, 0x8E86, 0xDC4D, + 0x8E87, 0xB3F9, 0x8E88, 0xDC4E, 0x8E89, 0xDC4F, 0x8E8A, 0xDC50, + 0x8E8B, 0xDC51, 0x8E8C, 0xDC52, 0x8E8D, 0xDC53, 0x8E8E, 0xDC54, + 0x8E8F, 0xF5EF, 0x8E90, 0xF5F1, 0x8E91, 0xDC55, 0x8E92, 0xDC56, + 0x8E93, 0xDC57, 0x8E94, 0xF5F0, 0x8E95, 0xDC58, 0x8E96, 0xDC59, + 0x8E97, 0xDC5A, 0x8E98, 0xDC5B, 0x8E99, 0xDC5C, 0x8E9A, 0xDC5D, + 0x8E9B, 0xDC5E, 0x8E9C, 0xF5F2, 0x8E9D, 0xDC5F, 0x8E9E, 0xF5F3, + 0x8E9F, 0xDC60, 0x8EA0, 0xDC61, 0x8EA1, 0xDC62, 0x8EA2, 0xDC63, + 0x8EA3, 0xDC64, 0x8EA4, 0xDC65, 0x8EA5, 0xDC66, 0x8EA6, 0xDC67, + 0x8EA7, 0xDC68, 0x8EA8, 0xDC69, 0x8EA9, 0xDC6A, 0x8EAA, 0xDC6B, + 0x8EAB, 0xC9ED, 0x8EAC, 0xB9AA, 0x8EAD, 0xDC6C, 0x8EAE, 0xDC6D, + 0x8EAF, 0xC7FB, 0x8EB0, 0xDC6E, 0x8EB1, 0xDC6F, 0x8EB2, 0xB6E3, + 0x8EB3, 0xDC70, 0x8EB4, 0xDC71, 0x8EB5, 0xDC72, 0x8EB6, 0xDC73, + 0x8EB7, 0xDC74, 0x8EB8, 0xDC75, 0x8EB9, 0xDC76, 0x8EBA, 0xCCC9, + 0x8EBB, 0xDC77, 0x8EBC, 0xDC78, 0x8EBD, 0xDC79, 0x8EBE, 0xDC7A, + 0x8EBF, 0xDC7B, 0x8EC0, 0xDC7C, 0x8EC1, 0xDC7D, 0x8EC2, 0xDC7E, + 0x8EC3, 0xDC80, 0x8EC4, 0xDC81, 0x8EC5, 0xDC82, 0x8EC6, 0xDC83, + 0x8EC7, 0xDC84, 0x8EC8, 0xDC85, 0x8EC9, 0xDC86, 0x8ECA, 0xDC87, + 0x8ECB, 0xDC88, 0x8ECC, 0xDC89, 0x8ECD, 0xDC8A, 0x8ECE, 0xEAA6, + 0x8ECF, 0xDC8B, 0x8ED0, 0xDC8C, 0x8ED1, 0xDC8D, 0x8ED2, 0xDC8E, + 0x8ED3, 0xDC8F, 0x8ED4, 0xDC90, 0x8ED5, 0xDC91, 0x8ED6, 0xDC92, + 0x8ED7, 0xDC93, 0x8ED8, 0xDC94, 0x8ED9, 0xDC95, 0x8EDA, 0xDC96, + 0x8EDB, 0xDC97, 0x8EDC, 0xDC98, 0x8EDD, 0xDC99, 0x8EDE, 0xDC9A, + 0x8EDF, 0xDC9B, 0x8EE0, 0xDC9C, 0x8EE1, 0xDC9D, 0x8EE2, 0xDC9E, + 0x8EE3, 0xDC9F, 0x8EE4, 0xDCA0, 0x8EE5, 0xDD40, 0x8EE6, 0xDD41, + 0x8EE7, 0xDD42, 0x8EE8, 0xDD43, 0x8EE9, 0xDD44, 0x8EEA, 0xDD45, + 0x8EEB, 0xDD46, 0x8EEC, 0xDD47, 0x8EED, 0xDD48, 0x8EEE, 0xDD49, + 0x8EEF, 0xDD4A, 0x8EF0, 0xDD4B, 0x8EF1, 0xDD4C, 0x8EF2, 0xDD4D, + 0x8EF3, 0xDD4E, 0x8EF4, 0xDD4F, 0x8EF5, 0xDD50, 0x8EF6, 0xDD51, + 0x8EF7, 0xDD52, 0x8EF8, 0xDD53, 0x8EF9, 0xDD54, 0x8EFA, 0xDD55, + 0x8EFB, 0xDD56, 0x8EFC, 0xDD57, 0x8EFD, 0xDD58, 0x8EFE, 0xDD59, + 0x8EFF, 0xDD5A, 0x8F00, 0xDD5B, 0x8F01, 0xDD5C, 0x8F02, 0xDD5D, + 0x8F03, 0xDD5E, 0x8F04, 0xDD5F, 0x8F05, 0xDD60, 0x8F06, 0xDD61, + 0x8F07, 0xDD62, 0x8F08, 0xDD63, 0x8F09, 0xDD64, 0x8F0A, 0xDD65, + 0x8F0B, 0xDD66, 0x8F0C, 0xDD67, 0x8F0D, 0xDD68, 0x8F0E, 0xDD69, + 0x8F0F, 0xDD6A, 0x8F10, 0xDD6B, 0x8F11, 0xDD6C, 0x8F12, 0xDD6D, + 0x8F13, 0xDD6E, 0x8F14, 0xDD6F, 0x8F15, 0xDD70, 0x8F16, 0xDD71, + 0x8F17, 0xDD72, 0x8F18, 0xDD73, 0x8F19, 0xDD74, 0x8F1A, 0xDD75, + 0x8F1B, 0xDD76, 0x8F1C, 0xDD77, 0x8F1D, 0xDD78, 0x8F1E, 0xDD79, + 0x8F1F, 0xDD7A, 0x8F20, 0xDD7B, 0x8F21, 0xDD7C, 0x8F22, 0xDD7D, + 0x8F23, 0xDD7E, 0x8F24, 0xDD80, 0x8F25, 0xDD81, 0x8F26, 0xDD82, + 0x8F27, 0xDD83, 0x8F28, 0xDD84, 0x8F29, 0xDD85, 0x8F2A, 0xDD86, + 0x8F2B, 0xDD87, 0x8F2C, 0xDD88, 0x8F2D, 0xDD89, 0x8F2E, 0xDD8A, + 0x8F2F, 0xDD8B, 0x8F30, 0xDD8C, 0x8F31, 0xDD8D, 0x8F32, 0xDD8E, + 0x8F33, 0xDD8F, 0x8F34, 0xDD90, 0x8F35, 0xDD91, 0x8F36, 0xDD92, + 0x8F37, 0xDD93, 0x8F38, 0xDD94, 0x8F39, 0xDD95, 0x8F3A, 0xDD96, + 0x8F3B, 0xDD97, 0x8F3C, 0xDD98, 0x8F3D, 0xDD99, 0x8F3E, 0xDD9A, + 0x8F3F, 0xDD9B, 0x8F40, 0xDD9C, 0x8F41, 0xDD9D, 0x8F42, 0xDD9E, + 0x8F43, 0xDD9F, 0x8F44, 0xDDA0, 0x8F45, 0xDE40, 0x8F46, 0xDE41, + 0x8F47, 0xDE42, 0x8F48, 0xDE43, 0x8F49, 0xDE44, 0x8F4A, 0xDE45, + 0x8F4B, 0xDE46, 0x8F4C, 0xDE47, 0x8F4D, 0xDE48, 0x8F4E, 0xDE49, + 0x8F4F, 0xDE4A, 0x8F50, 0xDE4B, 0x8F51, 0xDE4C, 0x8F52, 0xDE4D, + 0x8F53, 0xDE4E, 0x8F54, 0xDE4F, 0x8F55, 0xDE50, 0x8F56, 0xDE51, + 0x8F57, 0xDE52, 0x8F58, 0xDE53, 0x8F59, 0xDE54, 0x8F5A, 0xDE55, + 0x8F5B, 0xDE56, 0x8F5C, 0xDE57, 0x8F5D, 0xDE58, 0x8F5E, 0xDE59, + 0x8F5F, 0xDE5A, 0x8F60, 0xDE5B, 0x8F61, 0xDE5C, 0x8F62, 0xDE5D, + 0x8F63, 0xDE5E, 0x8F64, 0xDE5F, 0x8F65, 0xDE60, 0x8F66, 0xB3B5, + 0x8F67, 0xD4FE, 0x8F68, 0xB9EC, 0x8F69, 0xD0F9, 0x8F6A, 0xDE61, + 0x8F6B, 0xE9ED, 0x8F6C, 0xD7AA, 0x8F6D, 0xE9EE, 0x8F6E, 0xC2D6, + 0x8F6F, 0xC8ED, 0x8F70, 0xBAE4, 0x8F71, 0xE9EF, 0x8F72, 0xE9F0, + 0x8F73, 0xE9F1, 0x8F74, 0xD6E1, 0x8F75, 0xE9F2, 0x8F76, 0xE9F3, + 0x8F77, 0xE9F5, 0x8F78, 0xE9F4, 0x8F79, 0xE9F6, 0x8F7A, 0xE9F7, + 0x8F7B, 0xC7E1, 0x8F7C, 0xE9F8, 0x8F7D, 0xD4D8, 0x8F7E, 0xE9F9, + 0x8F7F, 0xBDCE, 0x8F80, 0xDE62, 0x8F81, 0xE9FA, 0x8F82, 0xE9FB, + 0x8F83, 0xBDCF, 0x8F84, 0xE9FC, 0x8F85, 0xB8A8, 0x8F86, 0xC1BE, + 0x8F87, 0xE9FD, 0x8F88, 0xB1B2, 0x8F89, 0xBBD4, 0x8F8A, 0xB9F5, + 0x8F8B, 0xE9FE, 0x8F8C, 0xDE63, 0x8F8D, 0xEAA1, 0x8F8E, 0xEAA2, + 0x8F8F, 0xEAA3, 0x8F90, 0xB7F8, 0x8F91, 0xBCAD, 0x8F92, 0xDE64, + 0x8F93, 0xCAE4, 0x8F94, 0xE0CE, 0x8F95, 0xD4AF, 0x8F96, 0xCFBD, + 0x8F97, 0xD5B7, 0x8F98, 0xEAA4, 0x8F99, 0xD5DE, 0x8F9A, 0xEAA5, + 0x8F9B, 0xD0C1, 0x8F9C, 0xB9BC, 0x8F9D, 0xDE65, 0x8F9E, 0xB4C7, + 0x8F9F, 0xB1D9, 0x8FA0, 0xDE66, 0x8FA1, 0xDE67, 0x8FA2, 0xDE68, + 0x8FA3, 0xC0B1, 0x8FA4, 0xDE69, 0x8FA5, 0xDE6A, 0x8FA6, 0xDE6B, + 0x8FA7, 0xDE6C, 0x8FA8, 0xB1E6, 0x8FA9, 0xB1E7, 0x8FAA, 0xDE6D, + 0x8FAB, 0xB1E8, 0x8FAC, 0xDE6E, 0x8FAD, 0xDE6F, 0x8FAE, 0xDE70, + 0x8FAF, 0xDE71, 0x8FB0, 0xB3BD, 0x8FB1, 0xC8E8, 0x8FB2, 0xDE72, + 0x8FB3, 0xDE73, 0x8FB4, 0xDE74, 0x8FB5, 0xDE75, 0x8FB6, 0xE5C1, + 0x8FB7, 0xDE76, 0x8FB8, 0xDE77, 0x8FB9, 0xB1DF, 0x8FBA, 0xDE78, + 0x8FBB, 0xDE79, 0x8FBC, 0xDE7A, 0x8FBD, 0xC1C9, 0x8FBE, 0xB4EF, + 0x8FBF, 0xDE7B, 0x8FC0, 0xDE7C, 0x8FC1, 0xC7A8, 0x8FC2, 0xD3D8, + 0x8FC3, 0xDE7D, 0x8FC4, 0xC6F9, 0x8FC5, 0xD1B8, 0x8FC6, 0xDE7E, + 0x8FC7, 0xB9FD, 0x8FC8, 0xC2F5, 0x8FC9, 0xDE80, 0x8FCA, 0xDE81, + 0x8FCB, 0xDE82, 0x8FCC, 0xDE83, 0x8FCD, 0xDE84, 0x8FCE, 0xD3AD, + 0x8FCF, 0xDE85, 0x8FD0, 0xD4CB, 0x8FD1, 0xBDFC, 0x8FD2, 0xDE86, + 0x8FD3, 0xE5C2, 0x8FD4, 0xB7B5, 0x8FD5, 0xE5C3, 0x8FD6, 0xDE87, + 0x8FD7, 0xDE88, 0x8FD8, 0xBBB9, 0x8FD9, 0xD5E2, 0x8FDA, 0xDE89, + 0x8FDB, 0xBDF8, 0x8FDC, 0xD4B6, 0x8FDD, 0xCEA5, 0x8FDE, 0xC1AC, + 0x8FDF, 0xB3D9, 0x8FE0, 0xDE8A, 0x8FE1, 0xDE8B, 0x8FE2, 0xCCF6, + 0x8FE3, 0xDE8C, 0x8FE4, 0xE5C6, 0x8FE5, 0xE5C4, 0x8FE6, 0xE5C8, + 0x8FE7, 0xDE8D, 0x8FE8, 0xE5CA, 0x8FE9, 0xE5C7, 0x8FEA, 0xB5CF, + 0x8FEB, 0xC6C8, 0x8FEC, 0xDE8E, 0x8FED, 0xB5FC, 0x8FEE, 0xE5C5, + 0x8FEF, 0xDE8F, 0x8FF0, 0xCAF6, 0x8FF1, 0xDE90, 0x8FF2, 0xDE91, + 0x8FF3, 0xE5C9, 0x8FF4, 0xDE92, 0x8FF5, 0xDE93, 0x8FF6, 0xDE94, + 0x8FF7, 0xC3D4, 0x8FF8, 0xB1C5, 0x8FF9, 0xBCA3, 0x8FFA, 0xDE95, + 0x8FFB, 0xDE96, 0x8FFC, 0xDE97, 0x8FFD, 0xD7B7, 0x8FFE, 0xDE98, + 0x8FFF, 0xDE99, 0x9000, 0xCDCB, 0x9001, 0xCBCD, 0x9002, 0xCACA, + 0x9003, 0xCCD3, 0x9004, 0xE5CC, 0x9005, 0xE5CB, 0x9006, 0xC4E6, + 0x9007, 0xDE9A, 0x9008, 0xDE9B, 0x9009, 0xD1A1, 0x900A, 0xD1B7, + 0x900B, 0xE5CD, 0x900C, 0xDE9C, 0x900D, 0xE5D0, 0x900E, 0xDE9D, + 0x900F, 0xCDB8, 0x9010, 0xD6F0, 0x9011, 0xE5CF, 0x9012, 0xB5DD, + 0x9013, 0xDE9E, 0x9014, 0xCDBE, 0x9015, 0xDE9F, 0x9016, 0xE5D1, + 0x9017, 0xB6BA, 0x9018, 0xDEA0, 0x9019, 0xDF40, 0x901A, 0xCDA8, + 0x901B, 0xB9E4, 0x901C, 0xDF41, 0x901D, 0xCAC5, 0x901E, 0xB3D1, + 0x901F, 0xCBD9, 0x9020, 0xD4EC, 0x9021, 0xE5D2, 0x9022, 0xB7EA, + 0x9023, 0xDF42, 0x9024, 0xDF43, 0x9025, 0xDF44, 0x9026, 0xE5CE, + 0x9027, 0xDF45, 0x9028, 0xDF46, 0x9029, 0xDF47, 0x902A, 0xDF48, + 0x902B, 0xDF49, 0x902C, 0xDF4A, 0x902D, 0xE5D5, 0x902E, 0xB4FE, + 0x902F, 0xE5D6, 0x9030, 0xDF4B, 0x9031, 0xDF4C, 0x9032, 0xDF4D, + 0x9033, 0xDF4E, 0x9034, 0xDF4F, 0x9035, 0xE5D3, 0x9036, 0xE5D4, + 0x9037, 0xDF50, 0x9038, 0xD2DD, 0x9039, 0xDF51, 0x903A, 0xDF52, + 0x903B, 0xC2DF, 0x903C, 0xB1C6, 0x903D, 0xDF53, 0x903E, 0xD3E2, + 0x903F, 0xDF54, 0x9040, 0xDF55, 0x9041, 0xB6DD, 0x9042, 0xCBEC, + 0x9043, 0xDF56, 0x9044, 0xE5D7, 0x9045, 0xDF57, 0x9046, 0xDF58, + 0x9047, 0xD3F6, 0x9048, 0xDF59, 0x9049, 0xDF5A, 0x904A, 0xDF5B, + 0x904B, 0xDF5C, 0x904C, 0xDF5D, 0x904D, 0xB1E9, 0x904E, 0xDF5E, + 0x904F, 0xB6F4, 0x9050, 0xE5DA, 0x9051, 0xE5D8, 0x9052, 0xE5D9, + 0x9053, 0xB5C0, 0x9054, 0xDF5F, 0x9055, 0xDF60, 0x9056, 0xDF61, + 0x9057, 0xD2C5, 0x9058, 0xE5DC, 0x9059, 0xDF62, 0x905A, 0xDF63, + 0x905B, 0xE5DE, 0x905C, 0xDF64, 0x905D, 0xDF65, 0x905E, 0xDF66, + 0x905F, 0xDF67, 0x9060, 0xDF68, 0x9061, 0xDF69, 0x9062, 0xE5DD, + 0x9063, 0xC7B2, 0x9064, 0xDF6A, 0x9065, 0xD2A3, 0x9066, 0xDF6B, + 0x9067, 0xDF6C, 0x9068, 0xE5DB, 0x9069, 0xDF6D, 0x906A, 0xDF6E, + 0x906B, 0xDF6F, 0x906C, 0xDF70, 0x906D, 0xD4E2, 0x906E, 0xD5DA, + 0x906F, 0xDF71, 0x9070, 0xDF72, 0x9071, 0xDF73, 0x9072, 0xDF74, + 0x9073, 0xDF75, 0x9074, 0xE5E0, 0x9075, 0xD7F1, 0x9076, 0xDF76, + 0x9077, 0xDF77, 0x9078, 0xDF78, 0x9079, 0xDF79, 0x907A, 0xDF7A, + 0x907B, 0xDF7B, 0x907C, 0xDF7C, 0x907D, 0xE5E1, 0x907E, 0xDF7D, + 0x907F, 0xB1DC, 0x9080, 0xD1FB, 0x9081, 0xDF7E, 0x9082, 0xE5E2, + 0x9083, 0xE5E4, 0x9084, 0xDF80, 0x9085, 0xDF81, 0x9086, 0xDF82, + 0x9087, 0xDF83, 0x9088, 0xE5E3, 0x9089, 0xDF84, 0x908A, 0xDF85, + 0x908B, 0xE5E5, 0x908C, 0xDF86, 0x908D, 0xDF87, 0x908E, 0xDF88, + 0x908F, 0xDF89, 0x9090, 0xDF8A, 0x9091, 0xD2D8, 0x9092, 0xDF8B, + 0x9093, 0xB5CB, 0x9094, 0xDF8C, 0x9095, 0xE7DF, 0x9096, 0xDF8D, + 0x9097, 0xDAF5, 0x9098, 0xDF8E, 0x9099, 0xDAF8, 0x909A, 0xDF8F, + 0x909B, 0xDAF6, 0x909C, 0xDF90, 0x909D, 0xDAF7, 0x909E, 0xDF91, + 0x909F, 0xDF92, 0x90A0, 0xDF93, 0x90A1, 0xDAFA, 0x90A2, 0xD0CF, + 0x90A3, 0xC4C7, 0x90A4, 0xDF94, 0x90A5, 0xDF95, 0x90A6, 0xB0EE, + 0x90A7, 0xDF96, 0x90A8, 0xDF97, 0x90A9, 0xDF98, 0x90AA, 0xD0B0, + 0x90AB, 0xDF99, 0x90AC, 0xDAF9, 0x90AD, 0xDF9A, 0x90AE, 0xD3CA, + 0x90AF, 0xBAAA, 0x90B0, 0xDBA2, 0x90B1, 0xC7F1, 0x90B2, 0xDF9B, + 0x90B3, 0xDAFC, 0x90B4, 0xDAFB, 0x90B5, 0xC9DB, 0x90B6, 0xDAFD, + 0x90B7, 0xDF9C, 0x90B8, 0xDBA1, 0x90B9, 0xD7DE, 0x90BA, 0xDAFE, + 0x90BB, 0xC1DA, 0x90BC, 0xDF9D, 0x90BD, 0xDF9E, 0x90BE, 0xDBA5, + 0x90BF, 0xDF9F, 0x90C0, 0xDFA0, 0x90C1, 0xD3F4, 0x90C2, 0xE040, + 0x90C3, 0xE041, 0x90C4, 0xDBA7, 0x90C5, 0xDBA4, 0x90C6, 0xE042, + 0x90C7, 0xDBA8, 0x90C8, 0xE043, 0x90C9, 0xE044, 0x90CA, 0xBDBC, + 0x90CB, 0xE045, 0x90CC, 0xE046, 0x90CD, 0xE047, 0x90CE, 0xC0C9, + 0x90CF, 0xDBA3, 0x90D0, 0xDBA6, 0x90D1, 0xD6A3, 0x90D2, 0xE048, + 0x90D3, 0xDBA9, 0x90D4, 0xE049, 0x90D5, 0xE04A, 0x90D6, 0xE04B, + 0x90D7, 0xDBAD, 0x90D8, 0xE04C, 0x90D9, 0xE04D, 0x90DA, 0xE04E, + 0x90DB, 0xDBAE, 0x90DC, 0xDBAC, 0x90DD, 0xBAC2, 0x90DE, 0xE04F, + 0x90DF, 0xE050, 0x90E0, 0xE051, 0x90E1, 0xBFA4, 0x90E2, 0xDBAB, + 0x90E3, 0xE052, 0x90E4, 0xE053, 0x90E5, 0xE054, 0x90E6, 0xDBAA, + 0x90E7, 0xD4C7, 0x90E8, 0xB2BF, 0x90E9, 0xE055, 0x90EA, 0xE056, + 0x90EB, 0xDBAF, 0x90EC, 0xE057, 0x90ED, 0xB9F9, 0x90EE, 0xE058, + 0x90EF, 0xDBB0, 0x90F0, 0xE059, 0x90F1, 0xE05A, 0x90F2, 0xE05B, + 0x90F3, 0xE05C, 0x90F4, 0xB3BB, 0x90F5, 0xE05D, 0x90F6, 0xE05E, + 0x90F7, 0xE05F, 0x90F8, 0xB5A6, 0x90F9, 0xE060, 0x90FA, 0xE061, + 0x90FB, 0xE062, 0x90FC, 0xE063, 0x90FD, 0xB6BC, 0x90FE, 0xDBB1, + 0x90FF, 0xE064, 0x9100, 0xE065, 0x9101, 0xE066, 0x9102, 0xB6F5, + 0x9103, 0xE067, 0x9104, 0xDBB2, 0x9105, 0xE068, 0x9106, 0xE069, + 0x9107, 0xE06A, 0x9108, 0xE06B, 0x9109, 0xE06C, 0x910A, 0xE06D, + 0x910B, 0xE06E, 0x910C, 0xE06F, 0x910D, 0xE070, 0x910E, 0xE071, + 0x910F, 0xE072, 0x9110, 0xE073, 0x9111, 0xE074, 0x9112, 0xE075, + 0x9113, 0xE076, 0x9114, 0xE077, 0x9115, 0xE078, 0x9116, 0xE079, + 0x9117, 0xE07A, 0x9118, 0xE07B, 0x9119, 0xB1C9, 0x911A, 0xE07C, + 0x911B, 0xE07D, 0x911C, 0xE07E, 0x911D, 0xE080, 0x911E, 0xDBB4, + 0x911F, 0xE081, 0x9120, 0xE082, 0x9121, 0xE083, 0x9122, 0xDBB3, + 0x9123, 0xDBB5, 0x9124, 0xE084, 0x9125, 0xE085, 0x9126, 0xE086, + 0x9127, 0xE087, 0x9128, 0xE088, 0x9129, 0xE089, 0x912A, 0xE08A, + 0x912B, 0xE08B, 0x912C, 0xE08C, 0x912D, 0xE08D, 0x912E, 0xE08E, + 0x912F, 0xDBB7, 0x9130, 0xE08F, 0x9131, 0xDBB6, 0x9132, 0xE090, + 0x9133, 0xE091, 0x9134, 0xE092, 0x9135, 0xE093, 0x9136, 0xE094, + 0x9137, 0xE095, 0x9138, 0xE096, 0x9139, 0xDBB8, 0x913A, 0xE097, + 0x913B, 0xE098, 0x913C, 0xE099, 0x913D, 0xE09A, 0x913E, 0xE09B, + 0x913F, 0xE09C, 0x9140, 0xE09D, 0x9141, 0xE09E, 0x9142, 0xE09F, + 0x9143, 0xDBB9, 0x9144, 0xE0A0, 0x9145, 0xE140, 0x9146, 0xDBBA, + 0x9147, 0xE141, 0x9148, 0xE142, 0x9149, 0xD3CF, 0x914A, 0xF4FA, + 0x914B, 0xC7F5, 0x914C, 0xD7C3, 0x914D, 0xC5E4, 0x914E, 0xF4FC, + 0x914F, 0xF4FD, 0x9150, 0xF4FB, 0x9151, 0xE143, 0x9152, 0xBEC6, + 0x9153, 0xE144, 0x9154, 0xE145, 0x9155, 0xE146, 0x9156, 0xE147, + 0x9157, 0xD0EF, 0x9158, 0xE148, 0x9159, 0xE149, 0x915A, 0xB7D3, + 0x915B, 0xE14A, 0x915C, 0xE14B, 0x915D, 0xD4CD, 0x915E, 0xCCAA, + 0x915F, 0xE14C, 0x9160, 0xE14D, 0x9161, 0xF5A2, 0x9162, 0xF5A1, + 0x9163, 0xBAA8, 0x9164, 0xF4FE, 0x9165, 0xCBD6, 0x9166, 0xE14E, + 0x9167, 0xE14F, 0x9168, 0xE150, 0x9169, 0xF5A4, 0x916A, 0xC0D2, + 0x916B, 0xE151, 0x916C, 0xB3EA, 0x916D, 0xE152, 0x916E, 0xCDAA, + 0x916F, 0xF5A5, 0x9170, 0xF5A3, 0x9171, 0xBDB4, 0x9172, 0xF5A8, + 0x9173, 0xE153, 0x9174, 0xF5A9, 0x9175, 0xBDCD, 0x9176, 0xC3B8, + 0x9177, 0xBFE1, 0x9178, 0xCBE1, 0x9179, 0xF5AA, 0x917A, 0xE154, + 0x917B, 0xE155, 0x917C, 0xE156, 0x917D, 0xF5A6, 0x917E, 0xF5A7, + 0x917F, 0xC4F0, 0x9180, 0xE157, 0x9181, 0xE158, 0x9182, 0xE159, + 0x9183, 0xE15A, 0x9184, 0xE15B, 0x9185, 0xF5AC, 0x9186, 0xE15C, + 0x9187, 0xB4BC, 0x9188, 0xE15D, 0x9189, 0xD7ED, 0x918A, 0xE15E, + 0x918B, 0xB4D7, 0x918C, 0xF5AB, 0x918D, 0xF5AE, 0x918E, 0xE15F, + 0x918F, 0xE160, 0x9190, 0xF5AD, 0x9191, 0xF5AF, 0x9192, 0xD0D1, + 0x9193, 0xE161, 0x9194, 0xE162, 0x9195, 0xE163, 0x9196, 0xE164, + 0x9197, 0xE165, 0x9198, 0xE166, 0x9199, 0xE167, 0x919A, 0xC3D1, + 0x919B, 0xC8A9, 0x919C, 0xE168, 0x919D, 0xE169, 0x919E, 0xE16A, + 0x919F, 0xE16B, 0x91A0, 0xE16C, 0x91A1, 0xE16D, 0x91A2, 0xF5B0, + 0x91A3, 0xF5B1, 0x91A4, 0xE16E, 0x91A5, 0xE16F, 0x91A6, 0xE170, + 0x91A7, 0xE171, 0x91A8, 0xE172, 0x91A9, 0xE173, 0x91AA, 0xF5B2, + 0x91AB, 0xE174, 0x91AC, 0xE175, 0x91AD, 0xF5B3, 0x91AE, 0xF5B4, + 0x91AF, 0xF5B5, 0x91B0, 0xE176, 0x91B1, 0xE177, 0x91B2, 0xE178, + 0x91B3, 0xE179, 0x91B4, 0xF5B7, 0x91B5, 0xF5B6, 0x91B6, 0xE17A, + 0x91B7, 0xE17B, 0x91B8, 0xE17C, 0x91B9, 0xE17D, 0x91BA, 0xF5B8, + 0x91BB, 0xE17E, 0x91BC, 0xE180, 0x91BD, 0xE181, 0x91BE, 0xE182, + 0x91BF, 0xE183, 0x91C0, 0xE184, 0x91C1, 0xE185, 0x91C2, 0xE186, + 0x91C3, 0xE187, 0x91C4, 0xE188, 0x91C5, 0xE189, 0x91C6, 0xE18A, + 0x91C7, 0xB2C9, 0x91C8, 0xE18B, 0x91C9, 0xD3D4, 0x91CA, 0xCACD, + 0x91CB, 0xE18C, 0x91CC, 0xC0EF, 0x91CD, 0xD6D8, 0x91CE, 0xD2B0, + 0x91CF, 0xC1BF, 0x91D0, 0xE18D, 0x91D1, 0xBDF0, 0x91D2, 0xE18E, + 0x91D3, 0xE18F, 0x91D4, 0xE190, 0x91D5, 0xE191, 0x91D6, 0xE192, + 0x91D7, 0xE193, 0x91D8, 0xE194, 0x91D9, 0xE195, 0x91DA, 0xE196, + 0x91DB, 0xE197, 0x91DC, 0xB8AA, 0x91DD, 0xE198, 0x91DE, 0xE199, + 0x91DF, 0xE19A, 0x91E0, 0xE19B, 0x91E1, 0xE19C, 0x91E2, 0xE19D, + 0x91E3, 0xE19E, 0x91E4, 0xE19F, 0x91E5, 0xE1A0, 0x91E6, 0xE240, + 0x91E7, 0xE241, 0x91E8, 0xE242, 0x91E9, 0xE243, 0x91EA, 0xE244, + 0x91EB, 0xE245, 0x91EC, 0xE246, 0x91ED, 0xE247, 0x91EE, 0xE248, + 0x91EF, 0xE249, 0x91F0, 0xE24A, 0x91F1, 0xE24B, 0x91F2, 0xE24C, + 0x91F3, 0xE24D, 0x91F4, 0xE24E, 0x91F5, 0xE24F, 0x91F6, 0xE250, + 0x91F7, 0xE251, 0x91F8, 0xE252, 0x91F9, 0xE253, 0x91FA, 0xE254, + 0x91FB, 0xE255, 0x91FC, 0xE256, 0x91FD, 0xE257, 0x91FE, 0xE258, + 0x91FF, 0xE259, 0x9200, 0xE25A, 0x9201, 0xE25B, 0x9202, 0xE25C, + 0x9203, 0xE25D, 0x9204, 0xE25E, 0x9205, 0xE25F, 0x9206, 0xE260, + 0x9207, 0xE261, 0x9208, 0xE262, 0x9209, 0xE263, 0x920A, 0xE264, + 0x920B, 0xE265, 0x920C, 0xE266, 0x920D, 0xE267, 0x920E, 0xE268, + 0x920F, 0xE269, 0x9210, 0xE26A, 0x9211, 0xE26B, 0x9212, 0xE26C, + 0x9213, 0xE26D, 0x9214, 0xE26E, 0x9215, 0xE26F, 0x9216, 0xE270, + 0x9217, 0xE271, 0x9218, 0xE272, 0x9219, 0xE273, 0x921A, 0xE274, + 0x921B, 0xE275, 0x921C, 0xE276, 0x921D, 0xE277, 0x921E, 0xE278, + 0x921F, 0xE279, 0x9220, 0xE27A, 0x9221, 0xE27B, 0x9222, 0xE27C, + 0x9223, 0xE27D, 0x9224, 0xE27E, 0x9225, 0xE280, 0x9226, 0xE281, + 0x9227, 0xE282, 0x9228, 0xE283, 0x9229, 0xE284, 0x922A, 0xE285, + 0x922B, 0xE286, 0x922C, 0xE287, 0x922D, 0xE288, 0x922E, 0xE289, + 0x922F, 0xE28A, 0x9230, 0xE28B, 0x9231, 0xE28C, 0x9232, 0xE28D, + 0x9233, 0xE28E, 0x9234, 0xE28F, 0x9235, 0xE290, 0x9236, 0xE291, + 0x9237, 0xE292, 0x9238, 0xE293, 0x9239, 0xE294, 0x923A, 0xE295, + 0x923B, 0xE296, 0x923C, 0xE297, 0x923D, 0xE298, 0x923E, 0xE299, + 0x923F, 0xE29A, 0x9240, 0xE29B, 0x9241, 0xE29C, 0x9242, 0xE29D, + 0x9243, 0xE29E, 0x9244, 0xE29F, 0x9245, 0xE2A0, 0x9246, 0xE340, + 0x9247, 0xE341, 0x9248, 0xE342, 0x9249, 0xE343, 0x924A, 0xE344, + 0x924B, 0xE345, 0x924C, 0xE346, 0x924D, 0xE347, 0x924E, 0xE348, + 0x924F, 0xE349, 0x9250, 0xE34A, 0x9251, 0xE34B, 0x9252, 0xE34C, + 0x9253, 0xE34D, 0x9254, 0xE34E, 0x9255, 0xE34F, 0x9256, 0xE350, + 0x9257, 0xE351, 0x9258, 0xE352, 0x9259, 0xE353, 0x925A, 0xE354, + 0x925B, 0xE355, 0x925C, 0xE356, 0x925D, 0xE357, 0x925E, 0xE358, + 0x925F, 0xE359, 0x9260, 0xE35A, 0x9261, 0xE35B, 0x9262, 0xE35C, + 0x9263, 0xE35D, 0x9264, 0xE35E, 0x9265, 0xE35F, 0x9266, 0xE360, + 0x9267, 0xE361, 0x9268, 0xE362, 0x9269, 0xE363, 0x926A, 0xE364, + 0x926B, 0xE365, 0x926C, 0xE366, 0x926D, 0xE367, 0x926E, 0xE368, + 0x926F, 0xE369, 0x9270, 0xE36A, 0x9271, 0xE36B, 0x9272, 0xE36C, + 0x9273, 0xE36D, 0x9274, 0xBCF8, 0x9275, 0xE36E, 0x9276, 0xE36F, + 0x9277, 0xE370, 0x9278, 0xE371, 0x9279, 0xE372, 0x927A, 0xE373, + 0x927B, 0xE374, 0x927C, 0xE375, 0x927D, 0xE376, 0x927E, 0xE377, + 0x927F, 0xE378, 0x9280, 0xE379, 0x9281, 0xE37A, 0x9282, 0xE37B, + 0x9283, 0xE37C, 0x9284, 0xE37D, 0x9285, 0xE37E, 0x9286, 0xE380, + 0x9287, 0xE381, 0x9288, 0xE382, 0x9289, 0xE383, 0x928A, 0xE384, + 0x928B, 0xE385, 0x928C, 0xE386, 0x928D, 0xE387, 0x928E, 0xF6C6, + 0x928F, 0xE388, 0x9290, 0xE389, 0x9291, 0xE38A, 0x9292, 0xE38B, + 0x9293, 0xE38C, 0x9294, 0xE38D, 0x9295, 0xE38E, 0x9296, 0xE38F, + 0x9297, 0xE390, 0x9298, 0xE391, 0x9299, 0xE392, 0x929A, 0xE393, + 0x929B, 0xE394, 0x929C, 0xE395, 0x929D, 0xE396, 0x929E, 0xE397, + 0x929F, 0xE398, 0x92A0, 0xE399, 0x92A1, 0xE39A, 0x92A2, 0xE39B, + 0x92A3, 0xE39C, 0x92A4, 0xE39D, 0x92A5, 0xE39E, 0x92A6, 0xE39F, + 0x92A7, 0xE3A0, 0x92A8, 0xE440, 0x92A9, 0xE441, 0x92AA, 0xE442, + 0x92AB, 0xE443, 0x92AC, 0xE444, 0x92AD, 0xE445, 0x92AE, 0xF6C7, + 0x92AF, 0xE446, 0x92B0, 0xE447, 0x92B1, 0xE448, 0x92B2, 0xE449, + 0x92B3, 0xE44A, 0x92B4, 0xE44B, 0x92B5, 0xE44C, 0x92B6, 0xE44D, + 0x92B7, 0xE44E, 0x92B8, 0xE44F, 0x92B9, 0xE450, 0x92BA, 0xE451, + 0x92BB, 0xE452, 0x92BC, 0xE453, 0x92BD, 0xE454, 0x92BE, 0xE455, + 0x92BF, 0xE456, 0x92C0, 0xE457, 0x92C1, 0xE458, 0x92C2, 0xE459, + 0x92C3, 0xE45A, 0x92C4, 0xE45B, 0x92C5, 0xE45C, 0x92C6, 0xE45D, + 0x92C7, 0xE45E, 0x92C8, 0xF6C8, 0x92C9, 0xE45F, 0x92CA, 0xE460, + 0x92CB, 0xE461, 0x92CC, 0xE462, 0x92CD, 0xE463, 0x92CE, 0xE464, + 0x92CF, 0xE465, 0x92D0, 0xE466, 0x92D1, 0xE467, 0x92D2, 0xE468, + 0x92D3, 0xE469, 0x92D4, 0xE46A, 0x92D5, 0xE46B, 0x92D6, 0xE46C, + 0x92D7, 0xE46D, 0x92D8, 0xE46E, 0x92D9, 0xE46F, 0x92DA, 0xE470, + 0x92DB, 0xE471, 0x92DC, 0xE472, 0x92DD, 0xE473, 0x92DE, 0xE474, + 0x92DF, 0xE475, 0x92E0, 0xE476, 0x92E1, 0xE477, 0x92E2, 0xE478, + 0x92E3, 0xE479, 0x92E4, 0xE47A, 0x92E5, 0xE47B, 0x92E6, 0xE47C, + 0x92E7, 0xE47D, 0x92E8, 0xE47E, 0x92E9, 0xE480, 0x92EA, 0xE481, + 0x92EB, 0xE482, 0x92EC, 0xE483, 0x92ED, 0xE484, 0x92EE, 0xE485, + 0x92EF, 0xE486, 0x92F0, 0xE487, 0x92F1, 0xE488, 0x92F2, 0xE489, + 0x92F3, 0xE48A, 0x92F4, 0xE48B, 0x92F5, 0xE48C, 0x92F6, 0xE48D, + 0x92F7, 0xE48E, 0x92F8, 0xE48F, 0x92F9, 0xE490, 0x92FA, 0xE491, + 0x92FB, 0xE492, 0x92FC, 0xE493, 0x92FD, 0xE494, 0x92FE, 0xE495, + 0x92FF, 0xE496, 0x9300, 0xE497, 0x9301, 0xE498, 0x9302, 0xE499, + 0x9303, 0xE49A, 0x9304, 0xE49B, 0x9305, 0xE49C, 0x9306, 0xE49D, + 0x9307, 0xE49E, 0x9308, 0xE49F, 0x9309, 0xE4A0, 0x930A, 0xE540, + 0x930B, 0xE541, 0x930C, 0xE542, 0x930D, 0xE543, 0x930E, 0xE544, + 0x930F, 0xE545, 0x9310, 0xE546, 0x9311, 0xE547, 0x9312, 0xE548, + 0x9313, 0xE549, 0x9314, 0xE54A, 0x9315, 0xE54B, 0x9316, 0xE54C, + 0x9317, 0xE54D, 0x9318, 0xE54E, 0x9319, 0xE54F, 0x931A, 0xE550, + 0x931B, 0xE551, 0x931C, 0xE552, 0x931D, 0xE553, 0x931E, 0xE554, + 0x931F, 0xE555, 0x9320, 0xE556, 0x9321, 0xE557, 0x9322, 0xE558, + 0x9323, 0xE559, 0x9324, 0xE55A, 0x9325, 0xE55B, 0x9326, 0xE55C, + 0x9327, 0xE55D, 0x9328, 0xE55E, 0x9329, 0xE55F, 0x932A, 0xE560, + 0x932B, 0xE561, 0x932C, 0xE562, 0x932D, 0xE563, 0x932E, 0xE564, + 0x932F, 0xE565, 0x9330, 0xE566, 0x9331, 0xE567, 0x9332, 0xE568, + 0x9333, 0xE569, 0x9334, 0xE56A, 0x9335, 0xE56B, 0x9336, 0xE56C, + 0x9337, 0xE56D, 0x9338, 0xE56E, 0x9339, 0xE56F, 0x933A, 0xE570, + 0x933B, 0xE571, 0x933C, 0xE572, 0x933D, 0xE573, 0x933E, 0xF6C9, + 0x933F, 0xE574, 0x9340, 0xE575, 0x9341, 0xE576, 0x9342, 0xE577, + 0x9343, 0xE578, 0x9344, 0xE579, 0x9345, 0xE57A, 0x9346, 0xE57B, + 0x9347, 0xE57C, 0x9348, 0xE57D, 0x9349, 0xE57E, 0x934A, 0xE580, + 0x934B, 0xE581, 0x934C, 0xE582, 0x934D, 0xE583, 0x934E, 0xE584, + 0x934F, 0xE585, 0x9350, 0xE586, 0x9351, 0xE587, 0x9352, 0xE588, + 0x9353, 0xE589, 0x9354, 0xE58A, 0x9355, 0xE58B, 0x9356, 0xE58C, + 0x9357, 0xE58D, 0x9358, 0xE58E, 0x9359, 0xE58F, 0x935A, 0xE590, + 0x935B, 0xE591, 0x935C, 0xE592, 0x935D, 0xE593, 0x935E, 0xE594, + 0x935F, 0xE595, 0x9360, 0xE596, 0x9361, 0xE597, 0x9362, 0xE598, + 0x9363, 0xE599, 0x9364, 0xE59A, 0x9365, 0xE59B, 0x9366, 0xE59C, + 0x9367, 0xE59D, 0x9368, 0xE59E, 0x9369, 0xE59F, 0x936A, 0xF6CA, + 0x936B, 0xE5A0, 0x936C, 0xE640, 0x936D, 0xE641, 0x936E, 0xE642, + 0x936F, 0xE643, 0x9370, 0xE644, 0x9371, 0xE645, 0x9372, 0xE646, + 0x9373, 0xE647, 0x9374, 0xE648, 0x9375, 0xE649, 0x9376, 0xE64A, + 0x9377, 0xE64B, 0x9378, 0xE64C, 0x9379, 0xE64D, 0x937A, 0xE64E, + 0x937B, 0xE64F, 0x937C, 0xE650, 0x937D, 0xE651, 0x937E, 0xE652, + 0x937F, 0xE653, 0x9380, 0xE654, 0x9381, 0xE655, 0x9382, 0xE656, + 0x9383, 0xE657, 0x9384, 0xE658, 0x9385, 0xE659, 0x9386, 0xE65A, + 0x9387, 0xE65B, 0x9388, 0xE65C, 0x9389, 0xE65D, 0x938A, 0xE65E, + 0x938B, 0xE65F, 0x938C, 0xE660, 0x938D, 0xE661, 0x938E, 0xE662, + 0x938F, 0xF6CC, 0x9390, 0xE663, 0x9391, 0xE664, 0x9392, 0xE665, + 0x9393, 0xE666, 0x9394, 0xE667, 0x9395, 0xE668, 0x9396, 0xE669, + 0x9397, 0xE66A, 0x9398, 0xE66B, 0x9399, 0xE66C, 0x939A, 0xE66D, + 0x939B, 0xE66E, 0x939C, 0xE66F, 0x939D, 0xE670, 0x939E, 0xE671, + 0x939F, 0xE672, 0x93A0, 0xE673, 0x93A1, 0xE674, 0x93A2, 0xE675, + 0x93A3, 0xE676, 0x93A4, 0xE677, 0x93A5, 0xE678, 0x93A6, 0xE679, + 0x93A7, 0xE67A, 0x93A8, 0xE67B, 0x93A9, 0xE67C, 0x93AA, 0xE67D, + 0x93AB, 0xE67E, 0x93AC, 0xE680, 0x93AD, 0xE681, 0x93AE, 0xE682, + 0x93AF, 0xE683, 0x93B0, 0xE684, 0x93B1, 0xE685, 0x93B2, 0xE686, + 0x93B3, 0xE687, 0x93B4, 0xE688, 0x93B5, 0xE689, 0x93B6, 0xE68A, + 0x93B7, 0xE68B, 0x93B8, 0xE68C, 0x93B9, 0xE68D, 0x93BA, 0xE68E, + 0x93BB, 0xE68F, 0x93BC, 0xE690, 0x93BD, 0xE691, 0x93BE, 0xE692, + 0x93BF, 0xE693, 0x93C0, 0xE694, 0x93C1, 0xE695, 0x93C2, 0xE696, + 0x93C3, 0xE697, 0x93C4, 0xE698, 0x93C5, 0xE699, 0x93C6, 0xE69A, + 0x93C7, 0xE69B, 0x93C8, 0xE69C, 0x93C9, 0xE69D, 0x93CA, 0xF6CB, + 0x93CB, 0xE69E, 0x93CC, 0xE69F, 0x93CD, 0xE6A0, 0x93CE, 0xE740, + 0x93CF, 0xE741, 0x93D0, 0xE742, 0x93D1, 0xE743, 0x93D2, 0xE744, + 0x93D3, 0xE745, 0x93D4, 0xE746, 0x93D5, 0xE747, 0x93D6, 0xF7E9, + 0x93D7, 0xE748, 0x93D8, 0xE749, 0x93D9, 0xE74A, 0x93DA, 0xE74B, + 0x93DB, 0xE74C, 0x93DC, 0xE74D, 0x93DD, 0xE74E, 0x93DE, 0xE74F, + 0x93DF, 0xE750, 0x93E0, 0xE751, 0x93E1, 0xE752, 0x93E2, 0xE753, + 0x93E3, 0xE754, 0x93E4, 0xE755, 0x93E5, 0xE756, 0x93E6, 0xE757, + 0x93E7, 0xE758, 0x93E8, 0xE759, 0x93E9, 0xE75A, 0x93EA, 0xE75B, + 0x93EB, 0xE75C, 0x93EC, 0xE75D, 0x93ED, 0xE75E, 0x93EE, 0xE75F, + 0x93EF, 0xE760, 0x93F0, 0xE761, 0x93F1, 0xE762, 0x93F2, 0xE763, + 0x93F3, 0xE764, 0x93F4, 0xE765, 0x93F5, 0xE766, 0x93F6, 0xE767, + 0x93F7, 0xE768, 0x93F8, 0xE769, 0x93F9, 0xE76A, 0x93FA, 0xE76B, + 0x93FB, 0xE76C, 0x93FC, 0xE76D, 0x93FD, 0xE76E, 0x93FE, 0xE76F, + 0x93FF, 0xE770, 0x9400, 0xE771, 0x9401, 0xE772, 0x9402, 0xE773, + 0x9403, 0xE774, 0x9404, 0xE775, 0x9405, 0xE776, 0x9406, 0xE777, + 0x9407, 0xE778, 0x9408, 0xE779, 0x9409, 0xE77A, 0x940A, 0xE77B, + 0x940B, 0xE77C, 0x940C, 0xE77D, 0x940D, 0xE77E, 0x940E, 0xE780, + 0x940F, 0xE781, 0x9410, 0xE782, 0x9411, 0xE783, 0x9412, 0xE784, + 0x9413, 0xE785, 0x9414, 0xE786, 0x9415, 0xE787, 0x9416, 0xE788, + 0x9417, 0xE789, 0x9418, 0xE78A, 0x9419, 0xE78B, 0x941A, 0xE78C, + 0x941B, 0xE78D, 0x941C, 0xE78E, 0x941D, 0xE78F, 0x941E, 0xE790, + 0x941F, 0xE791, 0x9420, 0xE792, 0x9421, 0xE793, 0x9422, 0xE794, + 0x9423, 0xE795, 0x9424, 0xE796, 0x9425, 0xE797, 0x9426, 0xE798, + 0x9427, 0xE799, 0x9428, 0xE79A, 0x9429, 0xE79B, 0x942A, 0xE79C, + 0x942B, 0xE79D, 0x942C, 0xE79E, 0x942D, 0xE79F, 0x942E, 0xE7A0, + 0x942F, 0xE840, 0x9430, 0xE841, 0x9431, 0xE842, 0x9432, 0xE843, + 0x9433, 0xE844, 0x9434, 0xE845, 0x9435, 0xE846, 0x9436, 0xE847, + 0x9437, 0xE848, 0x9438, 0xE849, 0x9439, 0xE84A, 0x943A, 0xE84B, + 0x943B, 0xE84C, 0x943C, 0xE84D, 0x943D, 0xE84E, 0x943E, 0xF6CD, + 0x943F, 0xE84F, 0x9440, 0xE850, 0x9441, 0xE851, 0x9442, 0xE852, + 0x9443, 0xE853, 0x9444, 0xE854, 0x9445, 0xE855, 0x9446, 0xE856, + 0x9447, 0xE857, 0x9448, 0xE858, 0x9449, 0xE859, 0x944A, 0xE85A, + 0x944B, 0xE85B, 0x944C, 0xE85C, 0x944D, 0xE85D, 0x944E, 0xE85E, + 0x944F, 0xE85F, 0x9450, 0xE860, 0x9451, 0xE861, 0x9452, 0xE862, + 0x9453, 0xE863, 0x9454, 0xE864, 0x9455, 0xE865, 0x9456, 0xE866, + 0x9457, 0xE867, 0x9458, 0xE868, 0x9459, 0xE869, 0x945A, 0xE86A, + 0x945B, 0xE86B, 0x945C, 0xE86C, 0x945D, 0xE86D, 0x945E, 0xE86E, + 0x945F, 0xE86F, 0x9460, 0xE870, 0x9461, 0xE871, 0x9462, 0xE872, + 0x9463, 0xE873, 0x9464, 0xE874, 0x9465, 0xE875, 0x9466, 0xE876, + 0x9467, 0xE877, 0x9468, 0xE878, 0x9469, 0xE879, 0x946A, 0xE87A, + 0x946B, 0xF6CE, 0x946C, 0xE87B, 0x946D, 0xE87C, 0x946E, 0xE87D, + 0x946F, 0xE87E, 0x9470, 0xE880, 0x9471, 0xE881, 0x9472, 0xE882, + 0x9473, 0xE883, 0x9474, 0xE884, 0x9475, 0xE885, 0x9476, 0xE886, + 0x9477, 0xE887, 0x9478, 0xE888, 0x9479, 0xE889, 0x947A, 0xE88A, + 0x947B, 0xE88B, 0x947C, 0xE88C, 0x947D, 0xE88D, 0x947E, 0xE88E, + 0x947F, 0xE88F, 0x9480, 0xE890, 0x9481, 0xE891, 0x9482, 0xE892, + 0x9483, 0xE893, 0x9484, 0xE894, 0x9485, 0xEEC4, 0x9486, 0xEEC5, + 0x9487, 0xEEC6, 0x9488, 0xD5EB, 0x9489, 0xB6A4, 0x948A, 0xEEC8, + 0x948B, 0xEEC7, 0x948C, 0xEEC9, 0x948D, 0xEECA, 0x948E, 0xC7A5, + 0x948F, 0xEECB, 0x9490, 0xEECC, 0x9491, 0xE895, 0x9492, 0xB7B0, + 0x9493, 0xB5F6, 0x9494, 0xEECD, 0x9495, 0xEECF, 0x9496, 0xE896, + 0x9497, 0xEECE, 0x9498, 0xE897, 0x9499, 0xB8C6, 0x949A, 0xEED0, + 0x949B, 0xEED1, 0x949C, 0xEED2, 0x949D, 0xB6DB, 0x949E, 0xB3AE, + 0x949F, 0xD6D3, 0x94A0, 0xC4C6, 0x94A1, 0xB1B5, 0x94A2, 0xB8D6, + 0x94A3, 0xEED3, 0x94A4, 0xEED4, 0x94A5, 0xD4BF, 0x94A6, 0xC7D5, + 0x94A7, 0xBEFB, 0x94A8, 0xCED9, 0x94A9, 0xB9B3, 0x94AA, 0xEED6, + 0x94AB, 0xEED5, 0x94AC, 0xEED8, 0x94AD, 0xEED7, 0x94AE, 0xC5A5, + 0x94AF, 0xEED9, 0x94B0, 0xEEDA, 0x94B1, 0xC7AE, 0x94B2, 0xEEDB, + 0x94B3, 0xC7AF, 0x94B4, 0xEEDC, 0x94B5, 0xB2A7, 0x94B6, 0xEEDD, + 0x94B7, 0xEEDE, 0x94B8, 0xEEDF, 0x94B9, 0xEEE0, 0x94BA, 0xEEE1, + 0x94BB, 0xD7EA, 0x94BC, 0xEEE2, 0x94BD, 0xEEE3, 0x94BE, 0xBCD8, + 0x94BF, 0xEEE4, 0x94C0, 0xD3CB, 0x94C1, 0xCCFA, 0x94C2, 0xB2AC, + 0x94C3, 0xC1E5, 0x94C4, 0xEEE5, 0x94C5, 0xC7A6, 0x94C6, 0xC3AD, + 0x94C7, 0xE898, 0x94C8, 0xEEE6, 0x94C9, 0xEEE7, 0x94CA, 0xEEE8, + 0x94CB, 0xEEE9, 0x94CC, 0xEEEA, 0x94CD, 0xEEEB, 0x94CE, 0xEEEC, + 0x94CF, 0xE899, 0x94D0, 0xEEED, 0x94D1, 0xEEEE, 0x94D2, 0xEEEF, + 0x94D3, 0xE89A, 0x94D4, 0xE89B, 0x94D5, 0xEEF0, 0x94D6, 0xEEF1, + 0x94D7, 0xEEF2, 0x94D8, 0xEEF4, 0x94D9, 0xEEF3, 0x94DA, 0xE89C, + 0x94DB, 0xEEF5, 0x94DC, 0xCDAD, 0x94DD, 0xC2C1, 0x94DE, 0xEEF6, + 0x94DF, 0xEEF7, 0x94E0, 0xEEF8, 0x94E1, 0xD5A1, 0x94E2, 0xEEF9, + 0x94E3, 0xCFB3, 0x94E4, 0xEEFA, 0x94E5, 0xEEFB, 0x94E6, 0xE89D, + 0x94E7, 0xEEFC, 0x94E8, 0xEEFD, 0x94E9, 0xEFA1, 0x94EA, 0xEEFE, + 0x94EB, 0xEFA2, 0x94EC, 0xB8F5, 0x94ED, 0xC3FA, 0x94EE, 0xEFA3, + 0x94EF, 0xEFA4, 0x94F0, 0xBDC2, 0x94F1, 0xD2BF, 0x94F2, 0xB2F9, + 0x94F3, 0xEFA5, 0x94F4, 0xEFA6, 0x94F5, 0xEFA7, 0x94F6, 0xD2F8, + 0x94F7, 0xEFA8, 0x94F8, 0xD6FD, 0x94F9, 0xEFA9, 0x94FA, 0xC6CC, + 0x94FB, 0xE89E, 0x94FC, 0xEFAA, 0x94FD, 0xEFAB, 0x94FE, 0xC1B4, + 0x94FF, 0xEFAC, 0x9500, 0xCFFA, 0x9501, 0xCBF8, 0x9502, 0xEFAE, + 0x9503, 0xEFAD, 0x9504, 0xB3FA, 0x9505, 0xB9F8, 0x9506, 0xEFAF, + 0x9507, 0xEFB0, 0x9508, 0xD0E2, 0x9509, 0xEFB1, 0x950A, 0xEFB2, + 0x950B, 0xB7E6, 0x950C, 0xD0BF, 0x950D, 0xEFB3, 0x950E, 0xEFB4, + 0x950F, 0xEFB5, 0x9510, 0xC8F1, 0x9511, 0xCCE0, 0x9512, 0xEFB6, + 0x9513, 0xEFB7, 0x9514, 0xEFB8, 0x9515, 0xEFB9, 0x9516, 0xEFBA, + 0x9517, 0xD5E0, 0x9518, 0xEFBB, 0x9519, 0xB4ED, 0x951A, 0xC3AA, + 0x951B, 0xEFBC, 0x951C, 0xE89F, 0x951D, 0xEFBD, 0x951E, 0xEFBE, + 0x951F, 0xEFBF, 0x9520, 0xE8A0, 0x9521, 0xCEFD, 0x9522, 0xEFC0, + 0x9523, 0xC2E0, 0x9524, 0xB4B8, 0x9525, 0xD7B6, 0x9526, 0xBDF5, + 0x9527, 0xE940, 0x9528, 0xCFC7, 0x9529, 0xEFC3, 0x952A, 0xEFC1, + 0x952B, 0xEFC2, 0x952C, 0xEFC4, 0x952D, 0xB6A7, 0x952E, 0xBCFC, + 0x952F, 0xBEE2, 0x9530, 0xC3CC, 0x9531, 0xEFC5, 0x9532, 0xEFC6, + 0x9533, 0xE941, 0x9534, 0xEFC7, 0x9535, 0xEFCF, 0x9536, 0xEFC8, + 0x9537, 0xEFC9, 0x9538, 0xEFCA, 0x9539, 0xC7C2, 0x953A, 0xEFF1, + 0x953B, 0xB6CD, 0x953C, 0xEFCB, 0x953D, 0xE942, 0x953E, 0xEFCC, + 0x953F, 0xEFCD, 0x9540, 0xB6C6, 0x9541, 0xC3BE, 0x9542, 0xEFCE, + 0x9543, 0xE943, 0x9544, 0xEFD0, 0x9545, 0xEFD1, 0x9546, 0xEFD2, + 0x9547, 0xD5F2, 0x9548, 0xE944, 0x9549, 0xEFD3, 0x954A, 0xC4F7, + 0x954B, 0xE945, 0x954C, 0xEFD4, 0x954D, 0xC4F8, 0x954E, 0xEFD5, + 0x954F, 0xEFD6, 0x9550, 0xB8E4, 0x9551, 0xB0F7, 0x9552, 0xEFD7, + 0x9553, 0xEFD8, 0x9554, 0xEFD9, 0x9555, 0xE946, 0x9556, 0xEFDA, + 0x9557, 0xEFDB, 0x9558, 0xEFDC, 0x9559, 0xEFDD, 0x955A, 0xE947, + 0x955B, 0xEFDE, 0x955C, 0xBEB5, 0x955D, 0xEFE1, 0x955E, 0xEFDF, + 0x955F, 0xEFE0, 0x9560, 0xE948, 0x9561, 0xEFE2, 0x9562, 0xEFE3, + 0x9563, 0xC1CD, 0x9564, 0xEFE4, 0x9565, 0xEFE5, 0x9566, 0xEFE6, + 0x9567, 0xEFE7, 0x9568, 0xEFE8, 0x9569, 0xEFE9, 0x956A, 0xEFEA, + 0x956B, 0xEFEB, 0x956C, 0xEFEC, 0x956D, 0xC0D8, 0x956E, 0xE949, + 0x956F, 0xEFED, 0x9570, 0xC1AD, 0x9571, 0xEFEE, 0x9572, 0xEFEF, + 0x9573, 0xEFF0, 0x9574, 0xE94A, 0x9575, 0xE94B, 0x9576, 0xCFE2, + 0x9577, 0xE94C, 0x9578, 0xE94D, 0x9579, 0xE94E, 0x957A, 0xE94F, + 0x957B, 0xE950, 0x957C, 0xE951, 0x957D, 0xE952, 0x957E, 0xE953, + 0x957F, 0xB3A4, 0x9580, 0xE954, 0x9581, 0xE955, 0x9582, 0xE956, + 0x9583, 0xE957, 0x9584, 0xE958, 0x9585, 0xE959, 0x9586, 0xE95A, + 0x9587, 0xE95B, 0x9588, 0xE95C, 0x9589, 0xE95D, 0x958A, 0xE95E, + 0x958B, 0xE95F, 0x958C, 0xE960, 0x958D, 0xE961, 0x958E, 0xE962, + 0x958F, 0xE963, 0x9590, 0xE964, 0x9591, 0xE965, 0x9592, 0xE966, + 0x9593, 0xE967, 0x9594, 0xE968, 0x9595, 0xE969, 0x9596, 0xE96A, + 0x9597, 0xE96B, 0x9598, 0xE96C, 0x9599, 0xE96D, 0x959A, 0xE96E, + 0x959B, 0xE96F, 0x959C, 0xE970, 0x959D, 0xE971, 0x959E, 0xE972, + 0x959F, 0xE973, 0x95A0, 0xE974, 0x95A1, 0xE975, 0x95A2, 0xE976, + 0x95A3, 0xE977, 0x95A4, 0xE978, 0x95A5, 0xE979, 0x95A6, 0xE97A, + 0x95A7, 0xE97B, 0x95A8, 0xE97C, 0x95A9, 0xE97D, 0x95AA, 0xE97E, + 0x95AB, 0xE980, 0x95AC, 0xE981, 0x95AD, 0xE982, 0x95AE, 0xE983, + 0x95AF, 0xE984, 0x95B0, 0xE985, 0x95B1, 0xE986, 0x95B2, 0xE987, + 0x95B3, 0xE988, 0x95B4, 0xE989, 0x95B5, 0xE98A, 0x95B6, 0xE98B, + 0x95B7, 0xE98C, 0x95B8, 0xE98D, 0x95B9, 0xE98E, 0x95BA, 0xE98F, + 0x95BB, 0xE990, 0x95BC, 0xE991, 0x95BD, 0xE992, 0x95BE, 0xE993, + 0x95BF, 0xE994, 0x95C0, 0xE995, 0x95C1, 0xE996, 0x95C2, 0xE997, + 0x95C3, 0xE998, 0x95C4, 0xE999, 0x95C5, 0xE99A, 0x95C6, 0xE99B, + 0x95C7, 0xE99C, 0x95C8, 0xE99D, 0x95C9, 0xE99E, 0x95CA, 0xE99F, + 0x95CB, 0xE9A0, 0x95CC, 0xEA40, 0x95CD, 0xEA41, 0x95CE, 0xEA42, + 0x95CF, 0xEA43, 0x95D0, 0xEA44, 0x95D1, 0xEA45, 0x95D2, 0xEA46, + 0x95D3, 0xEA47, 0x95D4, 0xEA48, 0x95D5, 0xEA49, 0x95D6, 0xEA4A, + 0x95D7, 0xEA4B, 0x95D8, 0xEA4C, 0x95D9, 0xEA4D, 0x95DA, 0xEA4E, + 0x95DB, 0xEA4F, 0x95DC, 0xEA50, 0x95DD, 0xEA51, 0x95DE, 0xEA52, + 0x95DF, 0xEA53, 0x95E0, 0xEA54, 0x95E1, 0xEA55, 0x95E2, 0xEA56, + 0x95E3, 0xEA57, 0x95E4, 0xEA58, 0x95E5, 0xEA59, 0x95E6, 0xEA5A, + 0x95E7, 0xEA5B, 0x95E8, 0xC3C5, 0x95E9, 0xE3C5, 0x95EA, 0xC9C1, + 0x95EB, 0xE3C6, 0x95EC, 0xEA5C, 0x95ED, 0xB1D5, 0x95EE, 0xCECA, + 0x95EF, 0xB4B3, 0x95F0, 0xC8F2, 0x95F1, 0xE3C7, 0x95F2, 0xCFD0, + 0x95F3, 0xE3C8, 0x95F4, 0xBCE4, 0x95F5, 0xE3C9, 0x95F6, 0xE3CA, + 0x95F7, 0xC3C6, 0x95F8, 0xD5A2, 0x95F9, 0xC4D6, 0x95FA, 0xB9EB, + 0x95FB, 0xCEC5, 0x95FC, 0xE3CB, 0x95FD, 0xC3F6, 0x95FE, 0xE3CC, + 0x95FF, 0xEA5D, 0x9600, 0xB7A7, 0x9601, 0xB8F3, 0x9602, 0xBAD2, + 0x9603, 0xE3CD, 0x9604, 0xE3CE, 0x9605, 0xD4C4, 0x9606, 0xE3CF, + 0x9607, 0xEA5E, 0x9608, 0xE3D0, 0x9609, 0xD1CB, 0x960A, 0xE3D1, + 0x960B, 0xE3D2, 0x960C, 0xE3D3, 0x960D, 0xE3D4, 0x960E, 0xD1D6, + 0x960F, 0xE3D5, 0x9610, 0xB2FB, 0x9611, 0xC0BB, 0x9612, 0xE3D6, + 0x9613, 0xEA5F, 0x9614, 0xC0AB, 0x9615, 0xE3D7, 0x9616, 0xE3D8, + 0x9617, 0xE3D9, 0x9618, 0xEA60, 0x9619, 0xE3DA, 0x961A, 0xE3DB, + 0x961B, 0xEA61, 0x961C, 0xB8B7, 0x961D, 0xDAE2, 0x961E, 0xEA62, + 0x961F, 0xB6D3, 0x9620, 0xEA63, 0x9621, 0xDAE4, 0x9622, 0xDAE3, + 0x9623, 0xEA64, 0x9624, 0xEA65, 0x9625, 0xEA66, 0x9626, 0xEA67, + 0x9627, 0xEA68, 0x9628, 0xEA69, 0x9629, 0xEA6A, 0x962A, 0xDAE6, + 0x962B, 0xEA6B, 0x962C, 0xEA6C, 0x962D, 0xEA6D, 0x962E, 0xC8EE, + 0x962F, 0xEA6E, 0x9630, 0xEA6F, 0x9631, 0xDAE5, 0x9632, 0xB7C0, + 0x9633, 0xD1F4, 0x9634, 0xD2F5, 0x9635, 0xD5F3, 0x9636, 0xBDD7, + 0x9637, 0xEA70, 0x9638, 0xEA71, 0x9639, 0xEA72, 0x963A, 0xEA73, + 0x963B, 0xD7E8, 0x963C, 0xDAE8, 0x963D, 0xDAE7, 0x963E, 0xEA74, + 0x963F, 0xB0A2, 0x9640, 0xCDD3, 0x9641, 0xEA75, 0x9642, 0xDAE9, + 0x9643, 0xEA76, 0x9644, 0xB8BD, 0x9645, 0xBCCA, 0x9646, 0xC2BD, + 0x9647, 0xC2A4, 0x9648, 0xB3C2, 0x9649, 0xDAEA, 0x964A, 0xEA77, + 0x964B, 0xC2AA, 0x964C, 0xC4B0, 0x964D, 0xBDB5, 0x964E, 0xEA78, + 0x964F, 0xEA79, 0x9650, 0xCFDE, 0x9651, 0xEA7A, 0x9652, 0xEA7B, + 0x9653, 0xEA7C, 0x9654, 0xDAEB, 0x9655, 0xC9C2, 0x9656, 0xEA7D, + 0x9657, 0xEA7E, 0x9658, 0xEA80, 0x9659, 0xEA81, 0x965A, 0xEA82, + 0x965B, 0xB1DD, 0x965C, 0xEA83, 0x965D, 0xEA84, 0x965E, 0xEA85, + 0x965F, 0xDAEC, 0x9660, 0xEA86, 0x9661, 0xB6B8, 0x9662, 0xD4BA, + 0x9663, 0xEA87, 0x9664, 0xB3FD, 0x9665, 0xEA88, 0x9666, 0xEA89, + 0x9667, 0xDAED, 0x9668, 0xD4C9, 0x9669, 0xCFD5, 0x966A, 0xC5E3, + 0x966B, 0xEA8A, 0x966C, 0xDAEE, 0x966D, 0xEA8B, 0x966E, 0xEA8C, + 0x966F, 0xEA8D, 0x9670, 0xEA8E, 0x9671, 0xEA8F, 0x9672, 0xDAEF, + 0x9673, 0xEA90, 0x9674, 0xDAF0, 0x9675, 0xC1EA, 0x9676, 0xCCD5, + 0x9677, 0xCFDD, 0x9678, 0xEA91, 0x9679, 0xEA92, 0x967A, 0xEA93, + 0x967B, 0xEA94, 0x967C, 0xEA95, 0x967D, 0xEA96, 0x967E, 0xEA97, + 0x967F, 0xEA98, 0x9680, 0xEA99, 0x9681, 0xEA9A, 0x9682, 0xEA9B, + 0x9683, 0xEA9C, 0x9684, 0xEA9D, 0x9685, 0xD3E7, 0x9686, 0xC2A1, + 0x9687, 0xEA9E, 0x9688, 0xDAF1, 0x9689, 0xEA9F, 0x968A, 0xEAA0, + 0x968B, 0xCBE5, 0x968C, 0xEB40, 0x968D, 0xDAF2, 0x968E, 0xEB41, + 0x968F, 0xCBE6, 0x9690, 0xD2FE, 0x9691, 0xEB42, 0x9692, 0xEB43, + 0x9693, 0xEB44, 0x9694, 0xB8F4, 0x9695, 0xEB45, 0x9696, 0xEB46, + 0x9697, 0xDAF3, 0x9698, 0xB0AF, 0x9699, 0xCFB6, 0x969A, 0xEB47, + 0x969B, 0xEB48, 0x969C, 0xD5CF, 0x969D, 0xEB49, 0x969E, 0xEB4A, + 0x969F, 0xEB4B, 0x96A0, 0xEB4C, 0x96A1, 0xEB4D, 0x96A2, 0xEB4E, + 0x96A3, 0xEB4F, 0x96A4, 0xEB50, 0x96A5, 0xEB51, 0x96A6, 0xEB52, + 0x96A7, 0xCBED, 0x96A8, 0xEB53, 0x96A9, 0xEB54, 0x96AA, 0xEB55, + 0x96AB, 0xEB56, 0x96AC, 0xEB57, 0x96AD, 0xEB58, 0x96AE, 0xEB59, + 0x96AF, 0xEB5A, 0x96B0, 0xDAF4, 0x96B1, 0xEB5B, 0x96B2, 0xEB5C, + 0x96B3, 0xE3C4, 0x96B4, 0xEB5D, 0x96B5, 0xEB5E, 0x96B6, 0xC1A5, + 0x96B7, 0xEB5F, 0x96B8, 0xEB60, 0x96B9, 0xF6BF, 0x96BA, 0xEB61, + 0x96BB, 0xEB62, 0x96BC, 0xF6C0, 0x96BD, 0xF6C1, 0x96BE, 0xC4D1, + 0x96BF, 0xEB63, 0x96C0, 0xC8B8, 0x96C1, 0xD1E3, 0x96C2, 0xEB64, + 0x96C3, 0xEB65, 0x96C4, 0xD0DB, 0x96C5, 0xD1C5, 0x96C6, 0xBCAF, + 0x96C7, 0xB9CD, 0x96C8, 0xEB66, 0x96C9, 0xEFF4, 0x96CA, 0xEB67, + 0x96CB, 0xEB68, 0x96CC, 0xB4C6, 0x96CD, 0xD3BA, 0x96CE, 0xF6C2, + 0x96CF, 0xB3FB, 0x96D0, 0xEB69, 0x96D1, 0xEB6A, 0x96D2, 0xF6C3, + 0x96D3, 0xEB6B, 0x96D4, 0xEB6C, 0x96D5, 0xB5F1, 0x96D6, 0xEB6D, + 0x96D7, 0xEB6E, 0x96D8, 0xEB6F, 0x96D9, 0xEB70, 0x96DA, 0xEB71, + 0x96DB, 0xEB72, 0x96DC, 0xEB73, 0x96DD, 0xEB74, 0x96DE, 0xEB75, + 0x96DF, 0xEB76, 0x96E0, 0xF6C5, 0x96E1, 0xEB77, 0x96E2, 0xEB78, + 0x96E3, 0xEB79, 0x96E4, 0xEB7A, 0x96E5, 0xEB7B, 0x96E6, 0xEB7C, + 0x96E7, 0xEB7D, 0x96E8, 0xD3EA, 0x96E9, 0xF6A7, 0x96EA, 0xD1A9, + 0x96EB, 0xEB7E, 0x96EC, 0xEB80, 0x96ED, 0xEB81, 0x96EE, 0xEB82, + 0x96EF, 0xF6A9, 0x96F0, 0xEB83, 0x96F1, 0xEB84, 0x96F2, 0xEB85, + 0x96F3, 0xF6A8, 0x96F4, 0xEB86, 0x96F5, 0xEB87, 0x96F6, 0xC1E3, + 0x96F7, 0xC0D7, 0x96F8, 0xEB88, 0x96F9, 0xB1A2, 0x96FA, 0xEB89, + 0x96FB, 0xEB8A, 0x96FC, 0xEB8B, 0x96FD, 0xEB8C, 0x96FE, 0xCEED, + 0x96FF, 0xEB8D, 0x9700, 0xD0E8, 0x9701, 0xF6AB, 0x9702, 0xEB8E, + 0x9703, 0xEB8F, 0x9704, 0xCFF6, 0x9705, 0xEB90, 0x9706, 0xF6AA, + 0x9707, 0xD5F0, 0x9708, 0xF6AC, 0x9709, 0xC3B9, 0x970A, 0xEB91, + 0x970B, 0xEB92, 0x970C, 0xEB93, 0x970D, 0xBBF4, 0x970E, 0xF6AE, + 0x970F, 0xF6AD, 0x9710, 0xEB94, 0x9711, 0xEB95, 0x9712, 0xEB96, + 0x9713, 0xC4DE, 0x9714, 0xEB97, 0x9715, 0xEB98, 0x9716, 0xC1D8, + 0x9717, 0xEB99, 0x9718, 0xEB9A, 0x9719, 0xEB9B, 0x971A, 0xEB9C, + 0x971B, 0xEB9D, 0x971C, 0xCBAA, 0x971D, 0xEB9E, 0x971E, 0xCFBC, + 0x971F, 0xEB9F, 0x9720, 0xEBA0, 0x9721, 0xEC40, 0x9722, 0xEC41, + 0x9723, 0xEC42, 0x9724, 0xEC43, 0x9725, 0xEC44, 0x9726, 0xEC45, + 0x9727, 0xEC46, 0x9728, 0xEC47, 0x9729, 0xEC48, 0x972A, 0xF6AF, + 0x972B, 0xEC49, 0x972C, 0xEC4A, 0x972D, 0xF6B0, 0x972E, 0xEC4B, + 0x972F, 0xEC4C, 0x9730, 0xF6B1, 0x9731, 0xEC4D, 0x9732, 0xC2B6, + 0x9733, 0xEC4E, 0x9734, 0xEC4F, 0x9735, 0xEC50, 0x9736, 0xEC51, + 0x9737, 0xEC52, 0x9738, 0xB0D4, 0x9739, 0xC5F9, 0x973A, 0xEC53, + 0x973B, 0xEC54, 0x973C, 0xEC55, 0x973D, 0xEC56, 0x973E, 0xF6B2, + 0x973F, 0xEC57, 0x9740, 0xEC58, 0x9741, 0xEC59, 0x9742, 0xEC5A, + 0x9743, 0xEC5B, 0x9744, 0xEC5C, 0x9745, 0xEC5D, 0x9746, 0xEC5E, + 0x9747, 0xEC5F, 0x9748, 0xEC60, 0x9749, 0xEC61, 0x974A, 0xEC62, + 0x974B, 0xEC63, 0x974C, 0xEC64, 0x974D, 0xEC65, 0x974E, 0xEC66, + 0x974F, 0xEC67, 0x9750, 0xEC68, 0x9751, 0xEC69, 0x9752, 0xC7E0, + 0x9753, 0xF6A6, 0x9754, 0xEC6A, 0x9755, 0xEC6B, 0x9756, 0xBEB8, + 0x9757, 0xEC6C, 0x9758, 0xEC6D, 0x9759, 0xBEB2, 0x975A, 0xEC6E, + 0x975B, 0xB5E5, 0x975C, 0xEC6F, 0x975D, 0xEC70, 0x975E, 0xB7C7, + 0x975F, 0xEC71, 0x9760, 0xBFBF, 0x9761, 0xC3D2, 0x9762, 0xC3E6, + 0x9763, 0xEC72, 0x9764, 0xEC73, 0x9765, 0xD8CC, 0x9766, 0xEC74, + 0x9767, 0xEC75, 0x9768, 0xEC76, 0x9769, 0xB8EF, 0x976A, 0xEC77, + 0x976B, 0xEC78, 0x976C, 0xEC79, 0x976D, 0xEC7A, 0x976E, 0xEC7B, + 0x976F, 0xEC7C, 0x9770, 0xEC7D, 0x9771, 0xEC7E, 0x9772, 0xEC80, + 0x9773, 0xBDF9, 0x9774, 0xD1A5, 0x9775, 0xEC81, 0x9776, 0xB0D0, + 0x9777, 0xEC82, 0x9778, 0xEC83, 0x9779, 0xEC84, 0x977A, 0xEC85, + 0x977B, 0xEC86, 0x977C, 0xF7B0, 0x977D, 0xEC87, 0x977E, 0xEC88, + 0x977F, 0xEC89, 0x9780, 0xEC8A, 0x9781, 0xEC8B, 0x9782, 0xEC8C, + 0x9783, 0xEC8D, 0x9784, 0xEC8E, 0x9785, 0xF7B1, 0x9786, 0xEC8F, + 0x9787, 0xEC90, 0x9788, 0xEC91, 0x9789, 0xEC92, 0x978A, 0xEC93, + 0x978B, 0xD0AC, 0x978C, 0xEC94, 0x978D, 0xB0B0, 0x978E, 0xEC95, + 0x978F, 0xEC96, 0x9790, 0xEC97, 0x9791, 0xF7B2, 0x9792, 0xF7B3, + 0x9793, 0xEC98, 0x9794, 0xF7B4, 0x9795, 0xEC99, 0x9796, 0xEC9A, + 0x9797, 0xEC9B, 0x9798, 0xC7CA, 0x9799, 0xEC9C, 0x979A, 0xEC9D, + 0x979B, 0xEC9E, 0x979C, 0xEC9F, 0x979D, 0xECA0, 0x979E, 0xED40, + 0x979F, 0xED41, 0x97A0, 0xBECF, 0x97A1, 0xED42, 0x97A2, 0xED43, + 0x97A3, 0xF7B7, 0x97A4, 0xED44, 0x97A5, 0xED45, 0x97A6, 0xED46, + 0x97A7, 0xED47, 0x97A8, 0xED48, 0x97A9, 0xED49, 0x97AA, 0xED4A, + 0x97AB, 0xF7B6, 0x97AC, 0xED4B, 0x97AD, 0xB1DE, 0x97AE, 0xED4C, + 0x97AF, 0xF7B5, 0x97B0, 0xED4D, 0x97B1, 0xED4E, 0x97B2, 0xF7B8, + 0x97B3, 0xED4F, 0x97B4, 0xF7B9, 0x97B5, 0xED50, 0x97B6, 0xED51, + 0x97B7, 0xED52, 0x97B8, 0xED53, 0x97B9, 0xED54, 0x97BA, 0xED55, + 0x97BB, 0xED56, 0x97BC, 0xED57, 0x97BD, 0xED58, 0x97BE, 0xED59, + 0x97BF, 0xED5A, 0x97C0, 0xED5B, 0x97C1, 0xED5C, 0x97C2, 0xED5D, + 0x97C3, 0xED5E, 0x97C4, 0xED5F, 0x97C5, 0xED60, 0x97C6, 0xED61, + 0x97C7, 0xED62, 0x97C8, 0xED63, 0x97C9, 0xED64, 0x97CA, 0xED65, + 0x97CB, 0xED66, 0x97CC, 0xED67, 0x97CD, 0xED68, 0x97CE, 0xED69, + 0x97CF, 0xED6A, 0x97D0, 0xED6B, 0x97D1, 0xED6C, 0x97D2, 0xED6D, + 0x97D3, 0xED6E, 0x97D4, 0xED6F, 0x97D5, 0xED70, 0x97D6, 0xED71, + 0x97D7, 0xED72, 0x97D8, 0xED73, 0x97D9, 0xED74, 0x97DA, 0xED75, + 0x97DB, 0xED76, 0x97DC, 0xED77, 0x97DD, 0xED78, 0x97DE, 0xED79, + 0x97DF, 0xED7A, 0x97E0, 0xED7B, 0x97E1, 0xED7C, 0x97E2, 0xED7D, + 0x97E3, 0xED7E, 0x97E4, 0xED80, 0x97E5, 0xED81, 0x97E6, 0xCEA4, + 0x97E7, 0xC8CD, 0x97E8, 0xED82, 0x97E9, 0xBAAB, 0x97EA, 0xE8B8, + 0x97EB, 0xE8B9, 0x97EC, 0xE8BA, 0x97ED, 0xBEC2, 0x97EE, 0xED83, + 0x97EF, 0xED84, 0x97F0, 0xED85, 0x97F1, 0xED86, 0x97F2, 0xED87, + 0x97F3, 0xD2F4, 0x97F4, 0xED88, 0x97F5, 0xD4CF, 0x97F6, 0xC9D8, + 0x97F7, 0xED89, 0x97F8, 0xED8A, 0x97F9, 0xED8B, 0x97FA, 0xED8C, + 0x97FB, 0xED8D, 0x97FC, 0xED8E, 0x97FD, 0xED8F, 0x97FE, 0xED90, + 0x97FF, 0xED91, 0x9800, 0xED92, 0x9801, 0xED93, 0x9802, 0xED94, + 0x9803, 0xED95, 0x9804, 0xED96, 0x9805, 0xED97, 0x9806, 0xED98, + 0x9807, 0xED99, 0x9808, 0xED9A, 0x9809, 0xED9B, 0x980A, 0xED9C, + 0x980B, 0xED9D, 0x980C, 0xED9E, 0x980D, 0xED9F, 0x980E, 0xEDA0, + 0x980F, 0xEE40, 0x9810, 0xEE41, 0x9811, 0xEE42, 0x9812, 0xEE43, + 0x9813, 0xEE44, 0x9814, 0xEE45, 0x9815, 0xEE46, 0x9816, 0xEE47, + 0x9817, 0xEE48, 0x9818, 0xEE49, 0x9819, 0xEE4A, 0x981A, 0xEE4B, + 0x981B, 0xEE4C, 0x981C, 0xEE4D, 0x981D, 0xEE4E, 0x981E, 0xEE4F, + 0x981F, 0xEE50, 0x9820, 0xEE51, 0x9821, 0xEE52, 0x9822, 0xEE53, + 0x9823, 0xEE54, 0x9824, 0xEE55, 0x9825, 0xEE56, 0x9826, 0xEE57, + 0x9827, 0xEE58, 0x9828, 0xEE59, 0x9829, 0xEE5A, 0x982A, 0xEE5B, + 0x982B, 0xEE5C, 0x982C, 0xEE5D, 0x982D, 0xEE5E, 0x982E, 0xEE5F, + 0x982F, 0xEE60, 0x9830, 0xEE61, 0x9831, 0xEE62, 0x9832, 0xEE63, + 0x9833, 0xEE64, 0x9834, 0xEE65, 0x9835, 0xEE66, 0x9836, 0xEE67, + 0x9837, 0xEE68, 0x9838, 0xEE69, 0x9839, 0xEE6A, 0x983A, 0xEE6B, + 0x983B, 0xEE6C, 0x983C, 0xEE6D, 0x983D, 0xEE6E, 0x983E, 0xEE6F, + 0x983F, 0xEE70, 0x9840, 0xEE71, 0x9841, 0xEE72, 0x9842, 0xEE73, + 0x9843, 0xEE74, 0x9844, 0xEE75, 0x9845, 0xEE76, 0x9846, 0xEE77, + 0x9847, 0xEE78, 0x9848, 0xEE79, 0x9849, 0xEE7A, 0x984A, 0xEE7B, + 0x984B, 0xEE7C, 0x984C, 0xEE7D, 0x984D, 0xEE7E, 0x984E, 0xEE80, + 0x984F, 0xEE81, 0x9850, 0xEE82, 0x9851, 0xEE83, 0x9852, 0xEE84, + 0x9853, 0xEE85, 0x9854, 0xEE86, 0x9855, 0xEE87, 0x9856, 0xEE88, + 0x9857, 0xEE89, 0x9858, 0xEE8A, 0x9859, 0xEE8B, 0x985A, 0xEE8C, + 0x985B, 0xEE8D, 0x985C, 0xEE8E, 0x985D, 0xEE8F, 0x985E, 0xEE90, + 0x985F, 0xEE91, 0x9860, 0xEE92, 0x9861, 0xEE93, 0x9862, 0xEE94, + 0x9863, 0xEE95, 0x9864, 0xEE96, 0x9865, 0xEE97, 0x9866, 0xEE98, + 0x9867, 0xEE99, 0x9868, 0xEE9A, 0x9869, 0xEE9B, 0x986A, 0xEE9C, + 0x986B, 0xEE9D, 0x986C, 0xEE9E, 0x986D, 0xEE9F, 0x986E, 0xEEA0, + 0x986F, 0xEF40, 0x9870, 0xEF41, 0x9871, 0xEF42, 0x9872, 0xEF43, + 0x9873, 0xEF44, 0x9874, 0xEF45, 0x9875, 0xD2B3, 0x9876, 0xB6A5, + 0x9877, 0xC7EA, 0x9878, 0xF1FC, 0x9879, 0xCFEE, 0x987A, 0xCBB3, + 0x987B, 0xD0EB, 0x987C, 0xE7EF, 0x987D, 0xCDE7, 0x987E, 0xB9CB, + 0x987F, 0xB6D9, 0x9880, 0xF1FD, 0x9881, 0xB0E4, 0x9882, 0xCBCC, + 0x9883, 0xF1FE, 0x9884, 0xD4A4, 0x9885, 0xC2AD, 0x9886, 0xC1EC, + 0x9887, 0xC6C4, 0x9888, 0xBEB1, 0x9889, 0xF2A1, 0x988A, 0xBCD5, + 0x988B, 0xEF46, 0x988C, 0xF2A2, 0x988D, 0xF2A3, 0x988E, 0xEF47, + 0x988F, 0xF2A4, 0x9890, 0xD2C3, 0x9891, 0xC6B5, 0x9892, 0xEF48, + 0x9893, 0xCDC7, 0x9894, 0xF2A5, 0x9895, 0xEF49, 0x9896, 0xD3B1, + 0x9897, 0xBFC5, 0x9898, 0xCCE2, 0x9899, 0xEF4A, 0x989A, 0xF2A6, + 0x989B, 0xF2A7, 0x989C, 0xD1D5, 0x989D, 0xB6EE, 0x989E, 0xF2A8, + 0x989F, 0xF2A9, 0x98A0, 0xB5DF, 0x98A1, 0xF2AA, 0x98A2, 0xF2AB, + 0x98A3, 0xEF4B, 0x98A4, 0xB2FC, 0x98A5, 0xF2AC, 0x98A6, 0xF2AD, + 0x98A7, 0xC8A7, 0x98A8, 0xEF4C, 0x98A9, 0xEF4D, 0x98AA, 0xEF4E, + 0x98AB, 0xEF4F, 0x98AC, 0xEF50, 0x98AD, 0xEF51, 0x98AE, 0xEF52, + 0x98AF, 0xEF53, 0x98B0, 0xEF54, 0x98B1, 0xEF55, 0x98B2, 0xEF56, + 0x98B3, 0xEF57, 0x98B4, 0xEF58, 0x98B5, 0xEF59, 0x98B6, 0xEF5A, + 0x98B7, 0xEF5B, 0x98B8, 0xEF5C, 0x98B9, 0xEF5D, 0x98BA, 0xEF5E, + 0x98BB, 0xEF5F, 0x98BC, 0xEF60, 0x98BD, 0xEF61, 0x98BE, 0xEF62, + 0x98BF, 0xEF63, 0x98C0, 0xEF64, 0x98C1, 0xEF65, 0x98C2, 0xEF66, + 0x98C3, 0xEF67, 0x98C4, 0xEF68, 0x98C5, 0xEF69, 0x98C6, 0xEF6A, + 0x98C7, 0xEF6B, 0x98C8, 0xEF6C, 0x98C9, 0xEF6D, 0x98CA, 0xEF6E, + 0x98CB, 0xEF6F, 0x98CC, 0xEF70, 0x98CD, 0xEF71, 0x98CE, 0xB7E7, + 0x98CF, 0xEF72, 0x98D0, 0xEF73, 0x98D1, 0xECA9, 0x98D2, 0xECAA, + 0x98D3, 0xECAB, 0x98D4, 0xEF74, 0x98D5, 0xECAC, 0x98D6, 0xEF75, + 0x98D7, 0xEF76, 0x98D8, 0xC6AE, 0x98D9, 0xECAD, 0x98DA, 0xECAE, + 0x98DB, 0xEF77, 0x98DC, 0xEF78, 0x98DD, 0xEF79, 0x98DE, 0xB7C9, + 0x98DF, 0xCAB3, 0x98E0, 0xEF7A, 0x98E1, 0xEF7B, 0x98E2, 0xEF7C, + 0x98E3, 0xEF7D, 0x98E4, 0xEF7E, 0x98E5, 0xEF80, 0x98E6, 0xEF81, + 0x98E7, 0xE2B8, 0x98E8, 0xF7CF, 0x98E9, 0xEF82, 0x98EA, 0xEF83, + 0x98EB, 0xEF84, 0x98EC, 0xEF85, 0x98ED, 0xEF86, 0x98EE, 0xEF87, + 0x98EF, 0xEF88, 0x98F0, 0xEF89, 0x98F1, 0xEF8A, 0x98F2, 0xEF8B, + 0x98F3, 0xEF8C, 0x98F4, 0xEF8D, 0x98F5, 0xEF8E, 0x98F6, 0xEF8F, + 0x98F7, 0xEF90, 0x98F8, 0xEF91, 0x98F9, 0xEF92, 0x98FA, 0xEF93, + 0x98FB, 0xEF94, 0x98FC, 0xEF95, 0x98FD, 0xEF96, 0x98FE, 0xEF97, + 0x98FF, 0xEF98, 0x9900, 0xEF99, 0x9901, 0xEF9A, 0x9902, 0xEF9B, + 0x9903, 0xEF9C, 0x9904, 0xEF9D, 0x9905, 0xEF9E, 0x9906, 0xEF9F, + 0x9907, 0xEFA0, 0x9908, 0xF040, 0x9909, 0xF041, 0x990A, 0xF042, + 0x990B, 0xF043, 0x990C, 0xF044, 0x990D, 0xF7D0, 0x990E, 0xF045, + 0x990F, 0xF046, 0x9910, 0xB2CD, 0x9911, 0xF047, 0x9912, 0xF048, + 0x9913, 0xF049, 0x9914, 0xF04A, 0x9915, 0xF04B, 0x9916, 0xF04C, + 0x9917, 0xF04D, 0x9918, 0xF04E, 0x9919, 0xF04F, 0x991A, 0xF050, + 0x991B, 0xF051, 0x991C, 0xF052, 0x991D, 0xF053, 0x991E, 0xF054, + 0x991F, 0xF055, 0x9920, 0xF056, 0x9921, 0xF057, 0x9922, 0xF058, + 0x9923, 0xF059, 0x9924, 0xF05A, 0x9925, 0xF05B, 0x9926, 0xF05C, + 0x9927, 0xF05D, 0x9928, 0xF05E, 0x9929, 0xF05F, 0x992A, 0xF060, + 0x992B, 0xF061, 0x992C, 0xF062, 0x992D, 0xF063, 0x992E, 0xF7D1, + 0x992F, 0xF064, 0x9930, 0xF065, 0x9931, 0xF066, 0x9932, 0xF067, + 0x9933, 0xF068, 0x9934, 0xF069, 0x9935, 0xF06A, 0x9936, 0xF06B, + 0x9937, 0xF06C, 0x9938, 0xF06D, 0x9939, 0xF06E, 0x993A, 0xF06F, + 0x993B, 0xF070, 0x993C, 0xF071, 0x993D, 0xF072, 0x993E, 0xF073, + 0x993F, 0xF074, 0x9940, 0xF075, 0x9941, 0xF076, 0x9942, 0xF077, + 0x9943, 0xF078, 0x9944, 0xF079, 0x9945, 0xF07A, 0x9946, 0xF07B, + 0x9947, 0xF07C, 0x9948, 0xF07D, 0x9949, 0xF07E, 0x994A, 0xF080, + 0x994B, 0xF081, 0x994C, 0xF082, 0x994D, 0xF083, 0x994E, 0xF084, + 0x994F, 0xF085, 0x9950, 0xF086, 0x9951, 0xF087, 0x9952, 0xF088, + 0x9953, 0xF089, 0x9954, 0xF7D3, 0x9955, 0xF7D2, 0x9956, 0xF08A, + 0x9957, 0xF08B, 0x9958, 0xF08C, 0x9959, 0xF08D, 0x995A, 0xF08E, + 0x995B, 0xF08F, 0x995C, 0xF090, 0x995D, 0xF091, 0x995E, 0xF092, + 0x995F, 0xF093, 0x9960, 0xF094, 0x9961, 0xF095, 0x9962, 0xF096, + 0x9963, 0xE2BB, 0x9964, 0xF097, 0x9965, 0xBCA2, 0x9966, 0xF098, + 0x9967, 0xE2BC, 0x9968, 0xE2BD, 0x9969, 0xE2BE, 0x996A, 0xE2BF, + 0x996B, 0xE2C0, 0x996C, 0xE2C1, 0x996D, 0xB7B9, 0x996E, 0xD2FB, + 0x996F, 0xBDA4, 0x9970, 0xCACE, 0x9971, 0xB1A5, 0x9972, 0xCBC7, + 0x9973, 0xF099, 0x9974, 0xE2C2, 0x9975, 0xB6FC, 0x9976, 0xC8C4, + 0x9977, 0xE2C3, 0x9978, 0xF09A, 0x9979, 0xF09B, 0x997A, 0xBDC8, + 0x997B, 0xF09C, 0x997C, 0xB1FD, 0x997D, 0xE2C4, 0x997E, 0xF09D, + 0x997F, 0xB6F6, 0x9980, 0xE2C5, 0x9981, 0xC4D9, 0x9982, 0xF09E, + 0x9983, 0xF09F, 0x9984, 0xE2C6, 0x9985, 0xCFDA, 0x9986, 0xB9DD, + 0x9987, 0xE2C7, 0x9988, 0xC0A1, 0x9989, 0xF0A0, 0x998A, 0xE2C8, + 0x998B, 0xB2F6, 0x998C, 0xF140, 0x998D, 0xE2C9, 0x998E, 0xF141, + 0x998F, 0xC1F3, 0x9990, 0xE2CA, 0x9991, 0xE2CB, 0x9992, 0xC2F8, + 0x9993, 0xE2CC, 0x9994, 0xE2CD, 0x9995, 0xE2CE, 0x9996, 0xCAD7, + 0x9997, 0xD8B8, 0x9998, 0xD9E5, 0x9999, 0xCFE3, 0x999A, 0xF142, + 0x999B, 0xF143, 0x999C, 0xF144, 0x999D, 0xF145, 0x999E, 0xF146, + 0x999F, 0xF147, 0x99A0, 0xF148, 0x99A1, 0xF149, 0x99A2, 0xF14A, + 0x99A3, 0xF14B, 0x99A4, 0xF14C, 0x99A5, 0xF0A5, 0x99A6, 0xF14D, + 0x99A7, 0xF14E, 0x99A8, 0xDCB0, 0x99A9, 0xF14F, 0x99AA, 0xF150, + 0x99AB, 0xF151, 0x99AC, 0xF152, 0x99AD, 0xF153, 0x99AE, 0xF154, + 0x99AF, 0xF155, 0x99B0, 0xF156, 0x99B1, 0xF157, 0x99B2, 0xF158, + 0x99B3, 0xF159, 0x99B4, 0xF15A, 0x99B5, 0xF15B, 0x99B6, 0xF15C, + 0x99B7, 0xF15D, 0x99B8, 0xF15E, 0x99B9, 0xF15F, 0x99BA, 0xF160, + 0x99BB, 0xF161, 0x99BC, 0xF162, 0x99BD, 0xF163, 0x99BE, 0xF164, + 0x99BF, 0xF165, 0x99C0, 0xF166, 0x99C1, 0xF167, 0x99C2, 0xF168, + 0x99C3, 0xF169, 0x99C4, 0xF16A, 0x99C5, 0xF16B, 0x99C6, 0xF16C, + 0x99C7, 0xF16D, 0x99C8, 0xF16E, 0x99C9, 0xF16F, 0x99CA, 0xF170, + 0x99CB, 0xF171, 0x99CC, 0xF172, 0x99CD, 0xF173, 0x99CE, 0xF174, + 0x99CF, 0xF175, 0x99D0, 0xF176, 0x99D1, 0xF177, 0x99D2, 0xF178, + 0x99D3, 0xF179, 0x99D4, 0xF17A, 0x99D5, 0xF17B, 0x99D6, 0xF17C, + 0x99D7, 0xF17D, 0x99D8, 0xF17E, 0x99D9, 0xF180, 0x99DA, 0xF181, + 0x99DB, 0xF182, 0x99DC, 0xF183, 0x99DD, 0xF184, 0x99DE, 0xF185, + 0x99DF, 0xF186, 0x99E0, 0xF187, 0x99E1, 0xF188, 0x99E2, 0xF189, + 0x99E3, 0xF18A, 0x99E4, 0xF18B, 0x99E5, 0xF18C, 0x99E6, 0xF18D, + 0x99E7, 0xF18E, 0x99E8, 0xF18F, 0x99E9, 0xF190, 0x99EA, 0xF191, + 0x99EB, 0xF192, 0x99EC, 0xF193, 0x99ED, 0xF194, 0x99EE, 0xF195, + 0x99EF, 0xF196, 0x99F0, 0xF197, 0x99F1, 0xF198, 0x99F2, 0xF199, + 0x99F3, 0xF19A, 0x99F4, 0xF19B, 0x99F5, 0xF19C, 0x99F6, 0xF19D, + 0x99F7, 0xF19E, 0x99F8, 0xF19F, 0x99F9, 0xF1A0, 0x99FA, 0xF240, + 0x99FB, 0xF241, 0x99FC, 0xF242, 0x99FD, 0xF243, 0x99FE, 0xF244, + 0x99FF, 0xF245, 0x9A00, 0xF246, 0x9A01, 0xF247, 0x9A02, 0xF248, + 0x9A03, 0xF249, 0x9A04, 0xF24A, 0x9A05, 0xF24B, 0x9A06, 0xF24C, + 0x9A07, 0xF24D, 0x9A08, 0xF24E, 0x9A09, 0xF24F, 0x9A0A, 0xF250, + 0x9A0B, 0xF251, 0x9A0C, 0xF252, 0x9A0D, 0xF253, 0x9A0E, 0xF254, + 0x9A0F, 0xF255, 0x9A10, 0xF256, 0x9A11, 0xF257, 0x9A12, 0xF258, + 0x9A13, 0xF259, 0x9A14, 0xF25A, 0x9A15, 0xF25B, 0x9A16, 0xF25C, + 0x9A17, 0xF25D, 0x9A18, 0xF25E, 0x9A19, 0xF25F, 0x9A1A, 0xF260, + 0x9A1B, 0xF261, 0x9A1C, 0xF262, 0x9A1D, 0xF263, 0x9A1E, 0xF264, + 0x9A1F, 0xF265, 0x9A20, 0xF266, 0x9A21, 0xF267, 0x9A22, 0xF268, + 0x9A23, 0xF269, 0x9A24, 0xF26A, 0x9A25, 0xF26B, 0x9A26, 0xF26C, + 0x9A27, 0xF26D, 0x9A28, 0xF26E, 0x9A29, 0xF26F, 0x9A2A, 0xF270, + 0x9A2B, 0xF271, 0x9A2C, 0xF272, 0x9A2D, 0xF273, 0x9A2E, 0xF274, + 0x9A2F, 0xF275, 0x9A30, 0xF276, 0x9A31, 0xF277, 0x9A32, 0xF278, + 0x9A33, 0xF279, 0x9A34, 0xF27A, 0x9A35, 0xF27B, 0x9A36, 0xF27C, + 0x9A37, 0xF27D, 0x9A38, 0xF27E, 0x9A39, 0xF280, 0x9A3A, 0xF281, + 0x9A3B, 0xF282, 0x9A3C, 0xF283, 0x9A3D, 0xF284, 0x9A3E, 0xF285, + 0x9A3F, 0xF286, 0x9A40, 0xF287, 0x9A41, 0xF288, 0x9A42, 0xF289, + 0x9A43, 0xF28A, 0x9A44, 0xF28B, 0x9A45, 0xF28C, 0x9A46, 0xF28D, + 0x9A47, 0xF28E, 0x9A48, 0xF28F, 0x9A49, 0xF290, 0x9A4A, 0xF291, + 0x9A4B, 0xF292, 0x9A4C, 0xF293, 0x9A4D, 0xF294, 0x9A4E, 0xF295, + 0x9A4F, 0xF296, 0x9A50, 0xF297, 0x9A51, 0xF298, 0x9A52, 0xF299, + 0x9A53, 0xF29A, 0x9A54, 0xF29B, 0x9A55, 0xF29C, 0x9A56, 0xF29D, + 0x9A57, 0xF29E, 0x9A58, 0xF29F, 0x9A59, 0xF2A0, 0x9A5A, 0xF340, + 0x9A5B, 0xF341, 0x9A5C, 0xF342, 0x9A5D, 0xF343, 0x9A5E, 0xF344, + 0x9A5F, 0xF345, 0x9A60, 0xF346, 0x9A61, 0xF347, 0x9A62, 0xF348, + 0x9A63, 0xF349, 0x9A64, 0xF34A, 0x9A65, 0xF34B, 0x9A66, 0xF34C, + 0x9A67, 0xF34D, 0x9A68, 0xF34E, 0x9A69, 0xF34F, 0x9A6A, 0xF350, + 0x9A6B, 0xF351, 0x9A6C, 0xC2ED, 0x9A6D, 0xD4A6, 0x9A6E, 0xCDD4, + 0x9A6F, 0xD1B1, 0x9A70, 0xB3DB, 0x9A71, 0xC7FD, 0x9A72, 0xF352, + 0x9A73, 0xB2B5, 0x9A74, 0xC2BF, 0x9A75, 0xE6E0, 0x9A76, 0xCABB, + 0x9A77, 0xE6E1, 0x9A78, 0xE6E2, 0x9A79, 0xBED4, 0x9A7A, 0xE6E3, + 0x9A7B, 0xD7A4, 0x9A7C, 0xCDD5, 0x9A7D, 0xE6E5, 0x9A7E, 0xBCDD, + 0x9A7F, 0xE6E4, 0x9A80, 0xE6E6, 0x9A81, 0xE6E7, 0x9A82, 0xC2EE, + 0x9A83, 0xF353, 0x9A84, 0xBDBE, 0x9A85, 0xE6E8, 0x9A86, 0xC2E6, + 0x9A87, 0xBAA7, 0x9A88, 0xE6E9, 0x9A89, 0xF354, 0x9A8A, 0xE6EA, + 0x9A8B, 0xB3D2, 0x9A8C, 0xD1E9, 0x9A8D, 0xF355, 0x9A8E, 0xF356, + 0x9A8F, 0xBFA5, 0x9A90, 0xE6EB, 0x9A91, 0xC6EF, 0x9A92, 0xE6EC, + 0x9A93, 0xE6ED, 0x9A94, 0xF357, 0x9A95, 0xF358, 0x9A96, 0xE6EE, + 0x9A97, 0xC6AD, 0x9A98, 0xE6EF, 0x9A99, 0xF359, 0x9A9A, 0xC9A7, + 0x9A9B, 0xE6F0, 0x9A9C, 0xE6F1, 0x9A9D, 0xE6F2, 0x9A9E, 0xE5B9, + 0x9A9F, 0xE6F3, 0x9AA0, 0xE6F4, 0x9AA1, 0xC2E2, 0x9AA2, 0xE6F5, + 0x9AA3, 0xE6F6, 0x9AA4, 0xD6E8, 0x9AA5, 0xE6F7, 0x9AA6, 0xF35A, + 0x9AA7, 0xE6F8, 0x9AA8, 0xB9C7, 0x9AA9, 0xF35B, 0x9AAA, 0xF35C, + 0x9AAB, 0xF35D, 0x9AAC, 0xF35E, 0x9AAD, 0xF35F, 0x9AAE, 0xF360, + 0x9AAF, 0xF361, 0x9AB0, 0xF7BB, 0x9AB1, 0xF7BA, 0x9AB2, 0xF362, + 0x9AB3, 0xF363, 0x9AB4, 0xF364, 0x9AB5, 0xF365, 0x9AB6, 0xF7BE, + 0x9AB7, 0xF7BC, 0x9AB8, 0xBAA1, 0x9AB9, 0xF366, 0x9ABA, 0xF7BF, + 0x9ABB, 0xF367, 0x9ABC, 0xF7C0, 0x9ABD, 0xF368, 0x9ABE, 0xF369, + 0x9ABF, 0xF36A, 0x9AC0, 0xF7C2, 0x9AC1, 0xF7C1, 0x9AC2, 0xF7C4, + 0x9AC3, 0xF36B, 0x9AC4, 0xF36C, 0x9AC5, 0xF7C3, 0x9AC6, 0xF36D, + 0x9AC7, 0xF36E, 0x9AC8, 0xF36F, 0x9AC9, 0xF370, 0x9ACA, 0xF371, + 0x9ACB, 0xF7C5, 0x9ACC, 0xF7C6, 0x9ACD, 0xF372, 0x9ACE, 0xF373, + 0x9ACF, 0xF374, 0x9AD0, 0xF375, 0x9AD1, 0xF7C7, 0x9AD2, 0xF376, + 0x9AD3, 0xCBE8, 0x9AD4, 0xF377, 0x9AD5, 0xF378, 0x9AD6, 0xF379, + 0x9AD7, 0xF37A, 0x9AD8, 0xB8DF, 0x9AD9, 0xF37B, 0x9ADA, 0xF37C, + 0x9ADB, 0xF37D, 0x9ADC, 0xF37E, 0x9ADD, 0xF380, 0x9ADE, 0xF381, + 0x9ADF, 0xF7D4, 0x9AE0, 0xF382, 0x9AE1, 0xF7D5, 0x9AE2, 0xF383, + 0x9AE3, 0xF384, 0x9AE4, 0xF385, 0x9AE5, 0xF386, 0x9AE6, 0xF7D6, + 0x9AE7, 0xF387, 0x9AE8, 0xF388, 0x9AE9, 0xF389, 0x9AEA, 0xF38A, + 0x9AEB, 0xF7D8, 0x9AEC, 0xF38B, 0x9AED, 0xF7DA, 0x9AEE, 0xF38C, + 0x9AEF, 0xF7D7, 0x9AF0, 0xF38D, 0x9AF1, 0xF38E, 0x9AF2, 0xF38F, + 0x9AF3, 0xF390, 0x9AF4, 0xF391, 0x9AF5, 0xF392, 0x9AF6, 0xF393, + 0x9AF7, 0xF394, 0x9AF8, 0xF395, 0x9AF9, 0xF7DB, 0x9AFA, 0xF396, + 0x9AFB, 0xF7D9, 0x9AFC, 0xF397, 0x9AFD, 0xF398, 0x9AFE, 0xF399, + 0x9AFF, 0xF39A, 0x9B00, 0xF39B, 0x9B01, 0xF39C, 0x9B02, 0xF39D, + 0x9B03, 0xD7D7, 0x9B04, 0xF39E, 0x9B05, 0xF39F, 0x9B06, 0xF3A0, + 0x9B07, 0xF440, 0x9B08, 0xF7DC, 0x9B09, 0xF441, 0x9B0A, 0xF442, + 0x9B0B, 0xF443, 0x9B0C, 0xF444, 0x9B0D, 0xF445, 0x9B0E, 0xF446, + 0x9B0F, 0xF7DD, 0x9B10, 0xF447, 0x9B11, 0xF448, 0x9B12, 0xF449, + 0x9B13, 0xF7DE, 0x9B14, 0xF44A, 0x9B15, 0xF44B, 0x9B16, 0xF44C, + 0x9B17, 0xF44D, 0x9B18, 0xF44E, 0x9B19, 0xF44F, 0x9B1A, 0xF450, + 0x9B1B, 0xF451, 0x9B1C, 0xF452, 0x9B1D, 0xF453, 0x9B1E, 0xF454, + 0x9B1F, 0xF7DF, 0x9B20, 0xF455, 0x9B21, 0xF456, 0x9B22, 0xF457, + 0x9B23, 0xF7E0, 0x9B24, 0xF458, 0x9B25, 0xF459, 0x9B26, 0xF45A, + 0x9B27, 0xF45B, 0x9B28, 0xF45C, 0x9B29, 0xF45D, 0x9B2A, 0xF45E, + 0x9B2B, 0xF45F, 0x9B2C, 0xF460, 0x9B2D, 0xF461, 0x9B2E, 0xF462, + 0x9B2F, 0xDBCB, 0x9B30, 0xF463, 0x9B31, 0xF464, 0x9B32, 0xD8AA, + 0x9B33, 0xF465, 0x9B34, 0xF466, 0x9B35, 0xF467, 0x9B36, 0xF468, + 0x9B37, 0xF469, 0x9B38, 0xF46A, 0x9B39, 0xF46B, 0x9B3A, 0xF46C, + 0x9B3B, 0xE5F7, 0x9B3C, 0xB9ED, 0x9B3D, 0xF46D, 0x9B3E, 0xF46E, + 0x9B3F, 0xF46F, 0x9B40, 0xF470, 0x9B41, 0xBFFD, 0x9B42, 0xBBEA, + 0x9B43, 0xF7C9, 0x9B44, 0xC6C7, 0x9B45, 0xF7C8, 0x9B46, 0xF471, + 0x9B47, 0xF7CA, 0x9B48, 0xF7CC, 0x9B49, 0xF7CB, 0x9B4A, 0xF472, + 0x9B4B, 0xF473, 0x9B4C, 0xF474, 0x9B4D, 0xF7CD, 0x9B4E, 0xF475, + 0x9B4F, 0xCEBA, 0x9B50, 0xF476, 0x9B51, 0xF7CE, 0x9B52, 0xF477, + 0x9B53, 0xF478, 0x9B54, 0xC4A7, 0x9B55, 0xF479, 0x9B56, 0xF47A, + 0x9B57, 0xF47B, 0x9B58, 0xF47C, 0x9B59, 0xF47D, 0x9B5A, 0xF47E, + 0x9B5B, 0xF480, 0x9B5C, 0xF481, 0x9B5D, 0xF482, 0x9B5E, 0xF483, + 0x9B5F, 0xF484, 0x9B60, 0xF485, 0x9B61, 0xF486, 0x9B62, 0xF487, + 0x9B63, 0xF488, 0x9B64, 0xF489, 0x9B65, 0xF48A, 0x9B66, 0xF48B, + 0x9B67, 0xF48C, 0x9B68, 0xF48D, 0x9B69, 0xF48E, 0x9B6A, 0xF48F, + 0x9B6B, 0xF490, 0x9B6C, 0xF491, 0x9B6D, 0xF492, 0x9B6E, 0xF493, + 0x9B6F, 0xF494, 0x9B70, 0xF495, 0x9B71, 0xF496, 0x9B72, 0xF497, + 0x9B73, 0xF498, 0x9B74, 0xF499, 0x9B75, 0xF49A, 0x9B76, 0xF49B, + 0x9B77, 0xF49C, 0x9B78, 0xF49D, 0x9B79, 0xF49E, 0x9B7A, 0xF49F, + 0x9B7B, 0xF4A0, 0x9B7C, 0xF540, 0x9B7D, 0xF541, 0x9B7E, 0xF542, + 0x9B7F, 0xF543, 0x9B80, 0xF544, 0x9B81, 0xF545, 0x9B82, 0xF546, + 0x9B83, 0xF547, 0x9B84, 0xF548, 0x9B85, 0xF549, 0x9B86, 0xF54A, + 0x9B87, 0xF54B, 0x9B88, 0xF54C, 0x9B89, 0xF54D, 0x9B8A, 0xF54E, + 0x9B8B, 0xF54F, 0x9B8C, 0xF550, 0x9B8D, 0xF551, 0x9B8E, 0xF552, + 0x9B8F, 0xF553, 0x9B90, 0xF554, 0x9B91, 0xF555, 0x9B92, 0xF556, + 0x9B93, 0xF557, 0x9B94, 0xF558, 0x9B95, 0xF559, 0x9B96, 0xF55A, + 0x9B97, 0xF55B, 0x9B98, 0xF55C, 0x9B99, 0xF55D, 0x9B9A, 0xF55E, + 0x9B9B, 0xF55F, 0x9B9C, 0xF560, 0x9B9D, 0xF561, 0x9B9E, 0xF562, + 0x9B9F, 0xF563, 0x9BA0, 0xF564, 0x9BA1, 0xF565, 0x9BA2, 0xF566, + 0x9BA3, 0xF567, 0x9BA4, 0xF568, 0x9BA5, 0xF569, 0x9BA6, 0xF56A, + 0x9BA7, 0xF56B, 0x9BA8, 0xF56C, 0x9BA9, 0xF56D, 0x9BAA, 0xF56E, + 0x9BAB, 0xF56F, 0x9BAC, 0xF570, 0x9BAD, 0xF571, 0x9BAE, 0xF572, + 0x9BAF, 0xF573, 0x9BB0, 0xF574, 0x9BB1, 0xF575, 0x9BB2, 0xF576, + 0x9BB3, 0xF577, 0x9BB4, 0xF578, 0x9BB5, 0xF579, 0x9BB6, 0xF57A, + 0x9BB7, 0xF57B, 0x9BB8, 0xF57C, 0x9BB9, 0xF57D, 0x9BBA, 0xF57E, + 0x9BBB, 0xF580, 0x9BBC, 0xF581, 0x9BBD, 0xF582, 0x9BBE, 0xF583, + 0x9BBF, 0xF584, 0x9BC0, 0xF585, 0x9BC1, 0xF586, 0x9BC2, 0xF587, + 0x9BC3, 0xF588, 0x9BC4, 0xF589, 0x9BC5, 0xF58A, 0x9BC6, 0xF58B, + 0x9BC7, 0xF58C, 0x9BC8, 0xF58D, 0x9BC9, 0xF58E, 0x9BCA, 0xF58F, + 0x9BCB, 0xF590, 0x9BCC, 0xF591, 0x9BCD, 0xF592, 0x9BCE, 0xF593, + 0x9BCF, 0xF594, 0x9BD0, 0xF595, 0x9BD1, 0xF596, 0x9BD2, 0xF597, + 0x9BD3, 0xF598, 0x9BD4, 0xF599, 0x9BD5, 0xF59A, 0x9BD6, 0xF59B, + 0x9BD7, 0xF59C, 0x9BD8, 0xF59D, 0x9BD9, 0xF59E, 0x9BDA, 0xF59F, + 0x9BDB, 0xF5A0, 0x9BDC, 0xF640, 0x9BDD, 0xF641, 0x9BDE, 0xF642, + 0x9BDF, 0xF643, 0x9BE0, 0xF644, 0x9BE1, 0xF645, 0x9BE2, 0xF646, + 0x9BE3, 0xF647, 0x9BE4, 0xF648, 0x9BE5, 0xF649, 0x9BE6, 0xF64A, + 0x9BE7, 0xF64B, 0x9BE8, 0xF64C, 0x9BE9, 0xF64D, 0x9BEA, 0xF64E, + 0x9BEB, 0xF64F, 0x9BEC, 0xF650, 0x9BED, 0xF651, 0x9BEE, 0xF652, + 0x9BEF, 0xF653, 0x9BF0, 0xF654, 0x9BF1, 0xF655, 0x9BF2, 0xF656, + 0x9BF3, 0xF657, 0x9BF4, 0xF658, 0x9BF5, 0xF659, 0x9BF6, 0xF65A, + 0x9BF7, 0xF65B, 0x9BF8, 0xF65C, 0x9BF9, 0xF65D, 0x9BFA, 0xF65E, + 0x9BFB, 0xF65F, 0x9BFC, 0xF660, 0x9BFD, 0xF661, 0x9BFE, 0xF662, + 0x9BFF, 0xF663, 0x9C00, 0xF664, 0x9C01, 0xF665, 0x9C02, 0xF666, + 0x9C03, 0xF667, 0x9C04, 0xF668, 0x9C05, 0xF669, 0x9C06, 0xF66A, + 0x9C07, 0xF66B, 0x9C08, 0xF66C, 0x9C09, 0xF66D, 0x9C0A, 0xF66E, + 0x9C0B, 0xF66F, 0x9C0C, 0xF670, 0x9C0D, 0xF671, 0x9C0E, 0xF672, + 0x9C0F, 0xF673, 0x9C10, 0xF674, 0x9C11, 0xF675, 0x9C12, 0xF676, + 0x9C13, 0xF677, 0x9C14, 0xF678, 0x9C15, 0xF679, 0x9C16, 0xF67A, + 0x9C17, 0xF67B, 0x9C18, 0xF67C, 0x9C19, 0xF67D, 0x9C1A, 0xF67E, + 0x9C1B, 0xF680, 0x9C1C, 0xF681, 0x9C1D, 0xF682, 0x9C1E, 0xF683, + 0x9C1F, 0xF684, 0x9C20, 0xF685, 0x9C21, 0xF686, 0x9C22, 0xF687, + 0x9C23, 0xF688, 0x9C24, 0xF689, 0x9C25, 0xF68A, 0x9C26, 0xF68B, + 0x9C27, 0xF68C, 0x9C28, 0xF68D, 0x9C29, 0xF68E, 0x9C2A, 0xF68F, + 0x9C2B, 0xF690, 0x9C2C, 0xF691, 0x9C2D, 0xF692, 0x9C2E, 0xF693, + 0x9C2F, 0xF694, 0x9C30, 0xF695, 0x9C31, 0xF696, 0x9C32, 0xF697, + 0x9C33, 0xF698, 0x9C34, 0xF699, 0x9C35, 0xF69A, 0x9C36, 0xF69B, + 0x9C37, 0xF69C, 0x9C38, 0xF69D, 0x9C39, 0xF69E, 0x9C3A, 0xF69F, + 0x9C3B, 0xF6A0, 0x9C3C, 0xF740, 0x9C3D, 0xF741, 0x9C3E, 0xF742, + 0x9C3F, 0xF743, 0x9C40, 0xF744, 0x9C41, 0xF745, 0x9C42, 0xF746, + 0x9C43, 0xF747, 0x9C44, 0xF748, 0x9C45, 0xF749, 0x9C46, 0xF74A, + 0x9C47, 0xF74B, 0x9C48, 0xF74C, 0x9C49, 0xF74D, 0x9C4A, 0xF74E, + 0x9C4B, 0xF74F, 0x9C4C, 0xF750, 0x9C4D, 0xF751, 0x9C4E, 0xF752, + 0x9C4F, 0xF753, 0x9C50, 0xF754, 0x9C51, 0xF755, 0x9C52, 0xF756, + 0x9C53, 0xF757, 0x9C54, 0xF758, 0x9C55, 0xF759, 0x9C56, 0xF75A, + 0x9C57, 0xF75B, 0x9C58, 0xF75C, 0x9C59, 0xF75D, 0x9C5A, 0xF75E, + 0x9C5B, 0xF75F, 0x9C5C, 0xF760, 0x9C5D, 0xF761, 0x9C5E, 0xF762, + 0x9C5F, 0xF763, 0x9C60, 0xF764, 0x9C61, 0xF765, 0x9C62, 0xF766, + 0x9C63, 0xF767, 0x9C64, 0xF768, 0x9C65, 0xF769, 0x9C66, 0xF76A, + 0x9C67, 0xF76B, 0x9C68, 0xF76C, 0x9C69, 0xF76D, 0x9C6A, 0xF76E, + 0x9C6B, 0xF76F, 0x9C6C, 0xF770, 0x9C6D, 0xF771, 0x9C6E, 0xF772, + 0x9C6F, 0xF773, 0x9C70, 0xF774, 0x9C71, 0xF775, 0x9C72, 0xF776, + 0x9C73, 0xF777, 0x9C74, 0xF778, 0x9C75, 0xF779, 0x9C76, 0xF77A, + 0x9C77, 0xF77B, 0x9C78, 0xF77C, 0x9C79, 0xF77D, 0x9C7A, 0xF77E, + 0x9C7B, 0xF780, 0x9C7C, 0xD3E3, 0x9C7D, 0xF781, 0x9C7E, 0xF782, + 0x9C7F, 0xF6CF, 0x9C80, 0xF783, 0x9C81, 0xC2B3, 0x9C82, 0xF6D0, + 0x9C83, 0xF784, 0x9C84, 0xF785, 0x9C85, 0xF6D1, 0x9C86, 0xF6D2, + 0x9C87, 0xF6D3, 0x9C88, 0xF6D4, 0x9C89, 0xF786, 0x9C8A, 0xF787, + 0x9C8B, 0xF6D6, 0x9C8C, 0xF788, 0x9C8D, 0xB1AB, 0x9C8E, 0xF6D7, + 0x9C8F, 0xF789, 0x9C90, 0xF6D8, 0x9C91, 0xF6D9, 0x9C92, 0xF6DA, + 0x9C93, 0xF78A, 0x9C94, 0xF6DB, 0x9C95, 0xF6DC, 0x9C96, 0xF78B, + 0x9C97, 0xF78C, 0x9C98, 0xF78D, 0x9C99, 0xF78E, 0x9C9A, 0xF6DD, + 0x9C9B, 0xF6DE, 0x9C9C, 0xCFCA, 0x9C9D, 0xF78F, 0x9C9E, 0xF6DF, + 0x9C9F, 0xF6E0, 0x9CA0, 0xF6E1, 0x9CA1, 0xF6E2, 0x9CA2, 0xF6E3, + 0x9CA3, 0xF6E4, 0x9CA4, 0xC0F0, 0x9CA5, 0xF6E5, 0x9CA6, 0xF6E6, + 0x9CA7, 0xF6E7, 0x9CA8, 0xF6E8, 0x9CA9, 0xF6E9, 0x9CAA, 0xF790, + 0x9CAB, 0xF6EA, 0x9CAC, 0xF791, 0x9CAD, 0xF6EB, 0x9CAE, 0xF6EC, + 0x9CAF, 0xF792, 0x9CB0, 0xF6ED, 0x9CB1, 0xF6EE, 0x9CB2, 0xF6EF, + 0x9CB3, 0xF6F0, 0x9CB4, 0xF6F1, 0x9CB5, 0xF6F2, 0x9CB6, 0xF6F3, + 0x9CB7, 0xF6F4, 0x9CB8, 0xBEA8, 0x9CB9, 0xF793, 0x9CBA, 0xF6F5, + 0x9CBB, 0xF6F6, 0x9CBC, 0xF6F7, 0x9CBD, 0xF6F8, 0x9CBE, 0xF794, + 0x9CBF, 0xF795, 0x9CC0, 0xF796, 0x9CC1, 0xF797, 0x9CC2, 0xF798, + 0x9CC3, 0xC8FA, 0x9CC4, 0xF6F9, 0x9CC5, 0xF6FA, 0x9CC6, 0xF6FB, + 0x9CC7, 0xF6FC, 0x9CC8, 0xF799, 0x9CC9, 0xF79A, 0x9CCA, 0xF6FD, + 0x9CCB, 0xF6FE, 0x9CCC, 0xF7A1, 0x9CCD, 0xF7A2, 0x9CCE, 0xF7A3, + 0x9CCF, 0xF7A4, 0x9CD0, 0xF7A5, 0x9CD1, 0xF79B, 0x9CD2, 0xF79C, + 0x9CD3, 0xF7A6, 0x9CD4, 0xF7A7, 0x9CD5, 0xF7A8, 0x9CD6, 0xB1EE, + 0x9CD7, 0xF7A9, 0x9CD8, 0xF7AA, 0x9CD9, 0xF7AB, 0x9CDA, 0xF79D, + 0x9CDB, 0xF79E, 0x9CDC, 0xF7AC, 0x9CDD, 0xF7AD, 0x9CDE, 0xC1DB, + 0x9CDF, 0xF7AE, 0x9CE0, 0xF79F, 0x9CE1, 0xF7A0, 0x9CE2, 0xF7AF, + 0x9CE3, 0xF840, 0x9CE4, 0xF841, 0x9CE5, 0xF842, 0x9CE6, 0xF843, + 0x9CE7, 0xF844, 0x9CE8, 0xF845, 0x9CE9, 0xF846, 0x9CEA, 0xF847, + 0x9CEB, 0xF848, 0x9CEC, 0xF849, 0x9CED, 0xF84A, 0x9CEE, 0xF84B, + 0x9CEF, 0xF84C, 0x9CF0, 0xF84D, 0x9CF1, 0xF84E, 0x9CF2, 0xF84F, + 0x9CF3, 0xF850, 0x9CF4, 0xF851, 0x9CF5, 0xF852, 0x9CF6, 0xF853, + 0x9CF7, 0xF854, 0x9CF8, 0xF855, 0x9CF9, 0xF856, 0x9CFA, 0xF857, + 0x9CFB, 0xF858, 0x9CFC, 0xF859, 0x9CFD, 0xF85A, 0x9CFE, 0xF85B, + 0x9CFF, 0xF85C, 0x9D00, 0xF85D, 0x9D01, 0xF85E, 0x9D02, 0xF85F, + 0x9D03, 0xF860, 0x9D04, 0xF861, 0x9D05, 0xF862, 0x9D06, 0xF863, + 0x9D07, 0xF864, 0x9D08, 0xF865, 0x9D09, 0xF866, 0x9D0A, 0xF867, + 0x9D0B, 0xF868, 0x9D0C, 0xF869, 0x9D0D, 0xF86A, 0x9D0E, 0xF86B, + 0x9D0F, 0xF86C, 0x9D10, 0xF86D, 0x9D11, 0xF86E, 0x9D12, 0xF86F, + 0x9D13, 0xF870, 0x9D14, 0xF871, 0x9D15, 0xF872, 0x9D16, 0xF873, + 0x9D17, 0xF874, 0x9D18, 0xF875, 0x9D19, 0xF876, 0x9D1A, 0xF877, + 0x9D1B, 0xF878, 0x9D1C, 0xF879, 0x9D1D, 0xF87A, 0x9D1E, 0xF87B, + 0x9D1F, 0xF87C, 0x9D20, 0xF87D, 0x9D21, 0xF87E, 0x9D22, 0xF880, + 0x9D23, 0xF881, 0x9D24, 0xF882, 0x9D25, 0xF883, 0x9D26, 0xF884, + 0x9D27, 0xF885, 0x9D28, 0xF886, 0x9D29, 0xF887, 0x9D2A, 0xF888, + 0x9D2B, 0xF889, 0x9D2C, 0xF88A, 0x9D2D, 0xF88B, 0x9D2E, 0xF88C, + 0x9D2F, 0xF88D, 0x9D30, 0xF88E, 0x9D31, 0xF88F, 0x9D32, 0xF890, + 0x9D33, 0xF891, 0x9D34, 0xF892, 0x9D35, 0xF893, 0x9D36, 0xF894, + 0x9D37, 0xF895, 0x9D38, 0xF896, 0x9D39, 0xF897, 0x9D3A, 0xF898, + 0x9D3B, 0xF899, 0x9D3C, 0xF89A, 0x9D3D, 0xF89B, 0x9D3E, 0xF89C, + 0x9D3F, 0xF89D, 0x9D40, 0xF89E, 0x9D41, 0xF89F, 0x9D42, 0xF8A0, + 0x9D43, 0xF940, 0x9D44, 0xF941, 0x9D45, 0xF942, 0x9D46, 0xF943, + 0x9D47, 0xF944, 0x9D48, 0xF945, 0x9D49, 0xF946, 0x9D4A, 0xF947, + 0x9D4B, 0xF948, 0x9D4C, 0xF949, 0x9D4D, 0xF94A, 0x9D4E, 0xF94B, + 0x9D4F, 0xF94C, 0x9D50, 0xF94D, 0x9D51, 0xF94E, 0x9D52, 0xF94F, + 0x9D53, 0xF950, 0x9D54, 0xF951, 0x9D55, 0xF952, 0x9D56, 0xF953, + 0x9D57, 0xF954, 0x9D58, 0xF955, 0x9D59, 0xF956, 0x9D5A, 0xF957, + 0x9D5B, 0xF958, 0x9D5C, 0xF959, 0x9D5D, 0xF95A, 0x9D5E, 0xF95B, + 0x9D5F, 0xF95C, 0x9D60, 0xF95D, 0x9D61, 0xF95E, 0x9D62, 0xF95F, + 0x9D63, 0xF960, 0x9D64, 0xF961, 0x9D65, 0xF962, 0x9D66, 0xF963, + 0x9D67, 0xF964, 0x9D68, 0xF965, 0x9D69, 0xF966, 0x9D6A, 0xF967, + 0x9D6B, 0xF968, 0x9D6C, 0xF969, 0x9D6D, 0xF96A, 0x9D6E, 0xF96B, + 0x9D6F, 0xF96C, 0x9D70, 0xF96D, 0x9D71, 0xF96E, 0x9D72, 0xF96F, + 0x9D73, 0xF970, 0x9D74, 0xF971, 0x9D75, 0xF972, 0x9D76, 0xF973, + 0x9D77, 0xF974, 0x9D78, 0xF975, 0x9D79, 0xF976, 0x9D7A, 0xF977, + 0x9D7B, 0xF978, 0x9D7C, 0xF979, 0x9D7D, 0xF97A, 0x9D7E, 0xF97B, + 0x9D7F, 0xF97C, 0x9D80, 0xF97D, 0x9D81, 0xF97E, 0x9D82, 0xF980, + 0x9D83, 0xF981, 0x9D84, 0xF982, 0x9D85, 0xF983, 0x9D86, 0xF984, + 0x9D87, 0xF985, 0x9D88, 0xF986, 0x9D89, 0xF987, 0x9D8A, 0xF988, + 0x9D8B, 0xF989, 0x9D8C, 0xF98A, 0x9D8D, 0xF98B, 0x9D8E, 0xF98C, + 0x9D8F, 0xF98D, 0x9D90, 0xF98E, 0x9D91, 0xF98F, 0x9D92, 0xF990, + 0x9D93, 0xF991, 0x9D94, 0xF992, 0x9D95, 0xF993, 0x9D96, 0xF994, + 0x9D97, 0xF995, 0x9D98, 0xF996, 0x9D99, 0xF997, 0x9D9A, 0xF998, + 0x9D9B, 0xF999, 0x9D9C, 0xF99A, 0x9D9D, 0xF99B, 0x9D9E, 0xF99C, + 0x9D9F, 0xF99D, 0x9DA0, 0xF99E, 0x9DA1, 0xF99F, 0x9DA2, 0xF9A0, + 0x9DA3, 0xFA40, 0x9DA4, 0xFA41, 0x9DA5, 0xFA42, 0x9DA6, 0xFA43, + 0x9DA7, 0xFA44, 0x9DA8, 0xFA45, 0x9DA9, 0xFA46, 0x9DAA, 0xFA47, + 0x9DAB, 0xFA48, 0x9DAC, 0xFA49, 0x9DAD, 0xFA4A, 0x9DAE, 0xFA4B, + 0x9DAF, 0xFA4C, 0x9DB0, 0xFA4D, 0x9DB1, 0xFA4E, 0x9DB2, 0xFA4F, + 0x9DB3, 0xFA50, 0x9DB4, 0xFA51, 0x9DB5, 0xFA52, 0x9DB6, 0xFA53, + 0x9DB7, 0xFA54, 0x9DB8, 0xFA55, 0x9DB9, 0xFA56, 0x9DBA, 0xFA57, + 0x9DBB, 0xFA58, 0x9DBC, 0xFA59, 0x9DBD, 0xFA5A, 0x9DBE, 0xFA5B, + 0x9DBF, 0xFA5C, 0x9DC0, 0xFA5D, 0x9DC1, 0xFA5E, 0x9DC2, 0xFA5F, + 0x9DC3, 0xFA60, 0x9DC4, 0xFA61, 0x9DC5, 0xFA62, 0x9DC6, 0xFA63, + 0x9DC7, 0xFA64, 0x9DC8, 0xFA65, 0x9DC9, 0xFA66, 0x9DCA, 0xFA67, + 0x9DCB, 0xFA68, 0x9DCC, 0xFA69, 0x9DCD, 0xFA6A, 0x9DCE, 0xFA6B, + 0x9DCF, 0xFA6C, 0x9DD0, 0xFA6D, 0x9DD1, 0xFA6E, 0x9DD2, 0xFA6F, + 0x9DD3, 0xFA70, 0x9DD4, 0xFA71, 0x9DD5, 0xFA72, 0x9DD6, 0xFA73, + 0x9DD7, 0xFA74, 0x9DD8, 0xFA75, 0x9DD9, 0xFA76, 0x9DDA, 0xFA77, + 0x9DDB, 0xFA78, 0x9DDC, 0xFA79, 0x9DDD, 0xFA7A, 0x9DDE, 0xFA7B, + 0x9DDF, 0xFA7C, 0x9DE0, 0xFA7D, 0x9DE1, 0xFA7E, 0x9DE2, 0xFA80, + 0x9DE3, 0xFA81, 0x9DE4, 0xFA82, 0x9DE5, 0xFA83, 0x9DE6, 0xFA84, + 0x9DE7, 0xFA85, 0x9DE8, 0xFA86, 0x9DE9, 0xFA87, 0x9DEA, 0xFA88, + 0x9DEB, 0xFA89, 0x9DEC, 0xFA8A, 0x9DED, 0xFA8B, 0x9DEE, 0xFA8C, + 0x9DEF, 0xFA8D, 0x9DF0, 0xFA8E, 0x9DF1, 0xFA8F, 0x9DF2, 0xFA90, + 0x9DF3, 0xFA91, 0x9DF4, 0xFA92, 0x9DF5, 0xFA93, 0x9DF6, 0xFA94, + 0x9DF7, 0xFA95, 0x9DF8, 0xFA96, 0x9DF9, 0xFA97, 0x9DFA, 0xFA98, + 0x9DFB, 0xFA99, 0x9DFC, 0xFA9A, 0x9DFD, 0xFA9B, 0x9DFE, 0xFA9C, + 0x9DFF, 0xFA9D, 0x9E00, 0xFA9E, 0x9E01, 0xFA9F, 0x9E02, 0xFAA0, + 0x9E03, 0xFB40, 0x9E04, 0xFB41, 0x9E05, 0xFB42, 0x9E06, 0xFB43, + 0x9E07, 0xFB44, 0x9E08, 0xFB45, 0x9E09, 0xFB46, 0x9E0A, 0xFB47, + 0x9E0B, 0xFB48, 0x9E0C, 0xFB49, 0x9E0D, 0xFB4A, 0x9E0E, 0xFB4B, + 0x9E0F, 0xFB4C, 0x9E10, 0xFB4D, 0x9E11, 0xFB4E, 0x9E12, 0xFB4F, + 0x9E13, 0xFB50, 0x9E14, 0xFB51, 0x9E15, 0xFB52, 0x9E16, 0xFB53, + 0x9E17, 0xFB54, 0x9E18, 0xFB55, 0x9E19, 0xFB56, 0x9E1A, 0xFB57, + 0x9E1B, 0xFB58, 0x9E1C, 0xFB59, 0x9E1D, 0xFB5A, 0x9E1E, 0xFB5B, + 0x9E1F, 0xC4F1, 0x9E20, 0xF0AF, 0x9E21, 0xBCA6, 0x9E22, 0xF0B0, + 0x9E23, 0xC3F9, 0x9E24, 0xFB5C, 0x9E25, 0xC5B8, 0x9E26, 0xD1BB, + 0x9E27, 0xFB5D, 0x9E28, 0xF0B1, 0x9E29, 0xF0B2, 0x9E2A, 0xF0B3, + 0x9E2B, 0xF0B4, 0x9E2C, 0xF0B5, 0x9E2D, 0xD1BC, 0x9E2E, 0xFB5E, + 0x9E2F, 0xD1EC, 0x9E30, 0xFB5F, 0x9E31, 0xF0B7, 0x9E32, 0xF0B6, + 0x9E33, 0xD4A7, 0x9E34, 0xFB60, 0x9E35, 0xCDD2, 0x9E36, 0xF0B8, + 0x9E37, 0xF0BA, 0x9E38, 0xF0B9, 0x9E39, 0xF0BB, 0x9E3A, 0xF0BC, + 0x9E3B, 0xFB61, 0x9E3C, 0xFB62, 0x9E3D, 0xB8EB, 0x9E3E, 0xF0BD, + 0x9E3F, 0xBAE8, 0x9E40, 0xFB63, 0x9E41, 0xF0BE, 0x9E42, 0xF0BF, + 0x9E43, 0xBEE9, 0x9E44, 0xF0C0, 0x9E45, 0xB6EC, 0x9E46, 0xF0C1, + 0x9E47, 0xF0C2, 0x9E48, 0xF0C3, 0x9E49, 0xF0C4, 0x9E4A, 0xC8B5, + 0x9E4B, 0xF0C5, 0x9E4C, 0xF0C6, 0x9E4D, 0xFB64, 0x9E4E, 0xF0C7, + 0x9E4F, 0xC5F4, 0x9E50, 0xFB65, 0x9E51, 0xF0C8, 0x9E52, 0xFB66, + 0x9E53, 0xFB67, 0x9E54, 0xFB68, 0x9E55, 0xF0C9, 0x9E56, 0xFB69, + 0x9E57, 0xF0CA, 0x9E58, 0xF7BD, 0x9E59, 0xFB6A, 0x9E5A, 0xF0CB, + 0x9E5B, 0xF0CC, 0x9E5C, 0xF0CD, 0x9E5D, 0xFB6B, 0x9E5E, 0xF0CE, + 0x9E5F, 0xFB6C, 0x9E60, 0xFB6D, 0x9E61, 0xFB6E, 0x9E62, 0xFB6F, + 0x9E63, 0xF0CF, 0x9E64, 0xBAD7, 0x9E65, 0xFB70, 0x9E66, 0xF0D0, + 0x9E67, 0xF0D1, 0x9E68, 0xF0D2, 0x9E69, 0xF0D3, 0x9E6A, 0xF0D4, + 0x9E6B, 0xF0D5, 0x9E6C, 0xF0D6, 0x9E6D, 0xF0D8, 0x9E6E, 0xFB71, + 0x9E6F, 0xFB72, 0x9E70, 0xD3A5, 0x9E71, 0xF0D7, 0x9E72, 0xFB73, + 0x9E73, 0xF0D9, 0x9E74, 0xFB74, 0x9E75, 0xFB75, 0x9E76, 0xFB76, + 0x9E77, 0xFB77, 0x9E78, 0xFB78, 0x9E79, 0xFB79, 0x9E7A, 0xFB7A, + 0x9E7B, 0xFB7B, 0x9E7C, 0xFB7C, 0x9E7D, 0xFB7D, 0x9E7E, 0xF5BA, + 0x9E7F, 0xC2B9, 0x9E80, 0xFB7E, 0x9E81, 0xFB80, 0x9E82, 0xF7E4, + 0x9E83, 0xFB81, 0x9E84, 0xFB82, 0x9E85, 0xFB83, 0x9E86, 0xFB84, + 0x9E87, 0xF7E5, 0x9E88, 0xF7E6, 0x9E89, 0xFB85, 0x9E8A, 0xFB86, + 0x9E8B, 0xF7E7, 0x9E8C, 0xFB87, 0x9E8D, 0xFB88, 0x9E8E, 0xFB89, + 0x9E8F, 0xFB8A, 0x9E90, 0xFB8B, 0x9E91, 0xFB8C, 0x9E92, 0xF7E8, + 0x9E93, 0xC2B4, 0x9E94, 0xFB8D, 0x9E95, 0xFB8E, 0x9E96, 0xFB8F, + 0x9E97, 0xFB90, 0x9E98, 0xFB91, 0x9E99, 0xFB92, 0x9E9A, 0xFB93, + 0x9E9B, 0xFB94, 0x9E9C, 0xFB95, 0x9E9D, 0xF7EA, 0x9E9E, 0xFB96, + 0x9E9F, 0xF7EB, 0x9EA0, 0xFB97, 0x9EA1, 0xFB98, 0x9EA2, 0xFB99, + 0x9EA3, 0xFB9A, 0x9EA4, 0xFB9B, 0x9EA5, 0xFB9C, 0x9EA6, 0xC2F3, + 0x9EA7, 0xFB9D, 0x9EA8, 0xFB9E, 0x9EA9, 0xFB9F, 0x9EAA, 0xFBA0, + 0x9EAB, 0xFC40, 0x9EAC, 0xFC41, 0x9EAD, 0xFC42, 0x9EAE, 0xFC43, + 0x9EAF, 0xFC44, 0x9EB0, 0xFC45, 0x9EB1, 0xFC46, 0x9EB2, 0xFC47, + 0x9EB3, 0xFC48, 0x9EB4, 0xF4F0, 0x9EB5, 0xFC49, 0x9EB6, 0xFC4A, + 0x9EB7, 0xFC4B, 0x9EB8, 0xF4EF, 0x9EB9, 0xFC4C, 0x9EBA, 0xFC4D, + 0x9EBB, 0xC2E9, 0x9EBC, 0xFC4E, 0x9EBD, 0xF7E1, 0x9EBE, 0xF7E2, + 0x9EBF, 0xFC4F, 0x9EC0, 0xFC50, 0x9EC1, 0xFC51, 0x9EC2, 0xFC52, + 0x9EC3, 0xFC53, 0x9EC4, 0xBBC6, 0x9EC5, 0xFC54, 0x9EC6, 0xFC55, + 0x9EC7, 0xFC56, 0x9EC8, 0xFC57, 0x9EC9, 0xD9E4, 0x9ECA, 0xFC58, + 0x9ECB, 0xFC59, 0x9ECC, 0xFC5A, 0x9ECD, 0xCAF2, 0x9ECE, 0xC0E8, + 0x9ECF, 0xF0A4, 0x9ED0, 0xFC5B, 0x9ED1, 0xBADA, 0x9ED2, 0xFC5C, + 0x9ED3, 0xFC5D, 0x9ED4, 0xC7AD, 0x9ED5, 0xFC5E, 0x9ED6, 0xFC5F, + 0x9ED7, 0xFC60, 0x9ED8, 0xC4AC, 0x9ED9, 0xFC61, 0x9EDA, 0xFC62, + 0x9EDB, 0xF7EC, 0x9EDC, 0xF7ED, 0x9EDD, 0xF7EE, 0x9EDE, 0xFC63, + 0x9EDF, 0xF7F0, 0x9EE0, 0xF7EF, 0x9EE1, 0xFC64, 0x9EE2, 0xF7F1, + 0x9EE3, 0xFC65, 0x9EE4, 0xFC66, 0x9EE5, 0xF7F4, 0x9EE6, 0xFC67, + 0x9EE7, 0xF7F3, 0x9EE8, 0xFC68, 0x9EE9, 0xF7F2, 0x9EEA, 0xF7F5, + 0x9EEB, 0xFC69, 0x9EEC, 0xFC6A, 0x9EED, 0xFC6B, 0x9EEE, 0xFC6C, + 0x9EEF, 0xF7F6, 0x9EF0, 0xFC6D, 0x9EF1, 0xFC6E, 0x9EF2, 0xFC6F, + 0x9EF3, 0xFC70, 0x9EF4, 0xFC71, 0x9EF5, 0xFC72, 0x9EF6, 0xFC73, + 0x9EF7, 0xFC74, 0x9EF8, 0xFC75, 0x9EF9, 0xEDE9, 0x9EFA, 0xFC76, + 0x9EFB, 0xEDEA, 0x9EFC, 0xEDEB, 0x9EFD, 0xFC77, 0x9EFE, 0xF6BC, + 0x9EFF, 0xFC78, 0x9F00, 0xFC79, 0x9F01, 0xFC7A, 0x9F02, 0xFC7B, + 0x9F03, 0xFC7C, 0x9F04, 0xFC7D, 0x9F05, 0xFC7E, 0x9F06, 0xFC80, + 0x9F07, 0xFC81, 0x9F08, 0xFC82, 0x9F09, 0xFC83, 0x9F0A, 0xFC84, + 0x9F0B, 0xF6BD, 0x9F0C, 0xFC85, 0x9F0D, 0xF6BE, 0x9F0E, 0xB6A6, + 0x9F0F, 0xFC86, 0x9F10, 0xD8BE, 0x9F11, 0xFC87, 0x9F12, 0xFC88, + 0x9F13, 0xB9C4, 0x9F14, 0xFC89, 0x9F15, 0xFC8A, 0x9F16, 0xFC8B, + 0x9F17, 0xD8BB, 0x9F18, 0xFC8C, 0x9F19, 0xDCB1, 0x9F1A, 0xFC8D, + 0x9F1B, 0xFC8E, 0x9F1C, 0xFC8F, 0x9F1D, 0xFC90, 0x9F1E, 0xFC91, + 0x9F1F, 0xFC92, 0x9F20, 0xCAF3, 0x9F21, 0xFC93, 0x9F22, 0xF7F7, + 0x9F23, 0xFC94, 0x9F24, 0xFC95, 0x9F25, 0xFC96, 0x9F26, 0xFC97, + 0x9F27, 0xFC98, 0x9F28, 0xFC99, 0x9F29, 0xFC9A, 0x9F2A, 0xFC9B, + 0x9F2B, 0xFC9C, 0x9F2C, 0xF7F8, 0x9F2D, 0xFC9D, 0x9F2E, 0xFC9E, + 0x9F2F, 0xF7F9, 0x9F30, 0xFC9F, 0x9F31, 0xFCA0, 0x9F32, 0xFD40, + 0x9F33, 0xFD41, 0x9F34, 0xFD42, 0x9F35, 0xFD43, 0x9F36, 0xFD44, + 0x9F37, 0xF7FB, 0x9F38, 0xFD45, 0x9F39, 0xF7FA, 0x9F3A, 0xFD46, + 0x9F3B, 0xB1C7, 0x9F3C, 0xFD47, 0x9F3D, 0xF7FC, 0x9F3E, 0xF7FD, + 0x9F3F, 0xFD48, 0x9F40, 0xFD49, 0x9F41, 0xFD4A, 0x9F42, 0xFD4B, + 0x9F43, 0xFD4C, 0x9F44, 0xF7FE, 0x9F45, 0xFD4D, 0x9F46, 0xFD4E, + 0x9F47, 0xFD4F, 0x9F48, 0xFD50, 0x9F49, 0xFD51, 0x9F4A, 0xFD52, + 0x9F4B, 0xFD53, 0x9F4C, 0xFD54, 0x9F4D, 0xFD55, 0x9F4E, 0xFD56, + 0x9F4F, 0xFD57, 0x9F50, 0xC6EB, 0x9F51, 0xECB4, 0x9F52, 0xFD58, + 0x9F53, 0xFD59, 0x9F54, 0xFD5A, 0x9F55, 0xFD5B, 0x9F56, 0xFD5C, + 0x9F57, 0xFD5D, 0x9F58, 0xFD5E, 0x9F59, 0xFD5F, 0x9F5A, 0xFD60, + 0x9F5B, 0xFD61, 0x9F5C, 0xFD62, 0x9F5D, 0xFD63, 0x9F5E, 0xFD64, + 0x9F5F, 0xFD65, 0x9F60, 0xFD66, 0x9F61, 0xFD67, 0x9F62, 0xFD68, + 0x9F63, 0xFD69, 0x9F64, 0xFD6A, 0x9F65, 0xFD6B, 0x9F66, 0xFD6C, + 0x9F67, 0xFD6D, 0x9F68, 0xFD6E, 0x9F69, 0xFD6F, 0x9F6A, 0xFD70, + 0x9F6B, 0xFD71, 0x9F6C, 0xFD72, 0x9F6D, 0xFD73, 0x9F6E, 0xFD74, + 0x9F6F, 0xFD75, 0x9F70, 0xFD76, 0x9F71, 0xFD77, 0x9F72, 0xFD78, + 0x9F73, 0xFD79, 0x9F74, 0xFD7A, 0x9F75, 0xFD7B, 0x9F76, 0xFD7C, + 0x9F77, 0xFD7D, 0x9F78, 0xFD7E, 0x9F79, 0xFD80, 0x9F7A, 0xFD81, + 0x9F7B, 0xFD82, 0x9F7C, 0xFD83, 0x9F7D, 0xFD84, 0x9F7E, 0xFD85, + 0x9F7F, 0xB3DD, 0x9F80, 0xF6B3, 0x9F81, 0xFD86, 0x9F82, 0xFD87, + 0x9F83, 0xF6B4, 0x9F84, 0xC1E4, 0x9F85, 0xF6B5, 0x9F86, 0xF6B6, + 0x9F87, 0xF6B7, 0x9F88, 0xF6B8, 0x9F89, 0xF6B9, 0x9F8A, 0xF6BA, + 0x9F8B, 0xC8A3, 0x9F8C, 0xF6BB, 0x9F8D, 0xFD88, 0x9F8E, 0xFD89, + 0x9F8F, 0xFD8A, 0x9F90, 0xFD8B, 0x9F91, 0xFD8C, 0x9F92, 0xFD8D, + 0x9F93, 0xFD8E, 0x9F94, 0xFD8F, 0x9F95, 0xFD90, 0x9F96, 0xFD91, + 0x9F97, 0xFD92, 0x9F98, 0xFD93, 0x9F99, 0xC1FA, 0x9F9A, 0xB9A8, + 0x9F9B, 0xEDE8, 0x9F9C, 0xFD94, 0x9F9D, 0xFD95, 0x9F9E, 0xFD96, + 0x9F9F, 0xB9EA, 0x9FA0, 0xD9DF, 0x9FA1, 0xFD97, 0x9FA2, 0xFD98, + 0x9FA3, 0xFD99, 0x9FA4, 0xFD9A, 0x9FA5, 0xFD9B, 0xF92C, 0xFD9C, + 0xF979, 0xFD9D, 0xF995, 0xFD9E, 0xF9E7, 0xFD9F, 0xF9F1, 0xFDA0, + 0xFA0C, 0xFE40, 0xFA0D, 0xFE41, 0xFA0E, 0xFE42, 0xFA0F, 0xFE43, + 0xFA11, 0xFE44, 0xFA13, 0xFE45, 0xFA14, 0xFE46, 0xFA18, 0xFE47, + 0xFA1F, 0xFE48, 0xFA20, 0xFE49, 0xFA21, 0xFE4A, 0xFA23, 0xFE4B, + 0xFA24, 0xFE4C, 0xFA27, 0xFE4D, 0xFA28, 0xFE4E, 0xFA29, 0xFE4F, + 0xFE30, 0xA955, 0xFE31, 0xA6F2, 0xFE33, 0xA6F4, 0xFE34, 0xA6F5, + 0xFE35, 0xA6E0, 0xFE36, 0xA6E1, 0xFE37, 0xA6F0, 0xFE38, 0xA6F1, + 0xFE39, 0xA6E2, 0xFE3A, 0xA6E3, 0xFE3B, 0xA6EE, 0xFE3C, 0xA6EF, + 0xFE3D, 0xA6E6, 0xFE3E, 0xA6E7, 0xFE3F, 0xA6E4, 0xFE40, 0xA6E5, + 0xFE41, 0xA6E8, 0xFE42, 0xA6E9, 0xFE43, 0xA6EA, 0xFE44, 0xA6EB, + 0xFE49, 0xA968, 0xFE4A, 0xA969, 0xFE4B, 0xA96A, 0xFE4C, 0xA96B, + 0xFE4D, 0xA96C, 0xFE4E, 0xA96D, 0xFE4F, 0xA96E, 0xFE50, 0xA96F, + 0xFE51, 0xA970, 0xFE52, 0xA971, 0xFE54, 0xA972, 0xFE55, 0xA973, + 0xFE56, 0xA974, 0xFE57, 0xA975, 0xFE59, 0xA976, 0xFE5A, 0xA977, + 0xFE5B, 0xA978, 0xFE5C, 0xA979, 0xFE5D, 0xA97A, 0xFE5E, 0xA97B, + 0xFE5F, 0xA97C, 0xFE60, 0xA97D, 0xFE61, 0xA97E, 0xFE62, 0xA980, + 0xFE63, 0xA981, 0xFE64, 0xA982, 0xFE65, 0xA983, 0xFE66, 0xA984, + 0xFE68, 0xA985, 0xFE69, 0xA986, 0xFE6A, 0xA987, 0xFE6B, 0xA988, + 0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA1E7, + 0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, + 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, + 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, + 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, + 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, + 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, + 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, + 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, + 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, + 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, + 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, + 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, + 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, + 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA3DC, + 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, + 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, + 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, + 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, + 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, + 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, + 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, + 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, + 0xFF5D, 0xA3FD, 0xFF5E, 0xA1AB, 0xFFE0, 0xA1E9, 0xFFE1, 0xA1EA, + 0xFFE2, 0xA956, 0xFFE3, 0xA3FE, 0xFFE4, 0xA957, 0xFFE5, 0xA3A4, + 0, 0 +}; + +static +const WCHAR oem2uni[] = { +/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ + 0x0080, 0x20AC, 0x8140, 0x4E02, 0x8141, 0x4E04, 0x8142, 0x4E05, + 0x8143, 0x4E06, 0x8144, 0x4E0F, 0x8145, 0x4E12, 0x8146, 0x4E17, + 0x8147, 0x4E1F, 0x8148, 0x4E20, 0x8149, 0x4E21, 0x814A, 0x4E23, + 0x814B, 0x4E26, 0x814C, 0x4E29, 0x814D, 0x4E2E, 0x814E, 0x4E2F, + 0x814F, 0x4E31, 0x8150, 0x4E33, 0x8151, 0x4E35, 0x8152, 0x4E37, + 0x8153, 0x4E3C, 0x8154, 0x4E40, 0x8155, 0x4E41, 0x8156, 0x4E42, + 0x8157, 0x4E44, 0x8158, 0x4E46, 0x8159, 0x4E4A, 0x815A, 0x4E51, + 0x815B, 0x4E55, 0x815C, 0x4E57, 0x815D, 0x4E5A, 0x815E, 0x4E5B, + 0x815F, 0x4E62, 0x8160, 0x4E63, 0x8161, 0x4E64, 0x8162, 0x4E65, + 0x8163, 0x4E67, 0x8164, 0x4E68, 0x8165, 0x4E6A, 0x8166, 0x4E6B, + 0x8167, 0x4E6C, 0x8168, 0x4E6D, 0x8169, 0x4E6E, 0x816A, 0x4E6F, + 0x816B, 0x4E72, 0x816C, 0x4E74, 0x816D, 0x4E75, 0x816E, 0x4E76, + 0x816F, 0x4E77, 0x8170, 0x4E78, 0x8171, 0x4E79, 0x8172, 0x4E7A, + 0x8173, 0x4E7B, 0x8174, 0x4E7C, 0x8175, 0x4E7D, 0x8176, 0x4E7F, + 0x8177, 0x4E80, 0x8178, 0x4E81, 0x8179, 0x4E82, 0x817A, 0x4E83, + 0x817B, 0x4E84, 0x817C, 0x4E85, 0x817D, 0x4E87, 0x817E, 0x4E8A, + 0x8180, 0x4E90, 0x8181, 0x4E96, 0x8182, 0x4E97, 0x8183, 0x4E99, + 0x8184, 0x4E9C, 0x8185, 0x4E9D, 0x8186, 0x4E9E, 0x8187, 0x4EA3, + 0x8188, 0x4EAA, 0x8189, 0x4EAF, 0x818A, 0x4EB0, 0x818B, 0x4EB1, + 0x818C, 0x4EB4, 0x818D, 0x4EB6, 0x818E, 0x4EB7, 0x818F, 0x4EB8, + 0x8190, 0x4EB9, 0x8191, 0x4EBC, 0x8192, 0x4EBD, 0x8193, 0x4EBE, + 0x8194, 0x4EC8, 0x8195, 0x4ECC, 0x8196, 0x4ECF, 0x8197, 0x4ED0, + 0x8198, 0x4ED2, 0x8199, 0x4EDA, 0x819A, 0x4EDB, 0x819B, 0x4EDC, + 0x819C, 0x4EE0, 0x819D, 0x4EE2, 0x819E, 0x4EE6, 0x819F, 0x4EE7, + 0x81A0, 0x4EE9, 0x81A1, 0x4EED, 0x81A2, 0x4EEE, 0x81A3, 0x4EEF, + 0x81A4, 0x4EF1, 0x81A5, 0x4EF4, 0x81A6, 0x4EF8, 0x81A7, 0x4EF9, + 0x81A8, 0x4EFA, 0x81A9, 0x4EFC, 0x81AA, 0x4EFE, 0x81AB, 0x4F00, + 0x81AC, 0x4F02, 0x81AD, 0x4F03, 0x81AE, 0x4F04, 0x81AF, 0x4F05, + 0x81B0, 0x4F06, 0x81B1, 0x4F07, 0x81B2, 0x4F08, 0x81B3, 0x4F0B, + 0x81B4, 0x4F0C, 0x81B5, 0x4F12, 0x81B6, 0x4F13, 0x81B7, 0x4F14, + 0x81B8, 0x4F15, 0x81B9, 0x4F16, 0x81BA, 0x4F1C, 0x81BB, 0x4F1D, + 0x81BC, 0x4F21, 0x81BD, 0x4F23, 0x81BE, 0x4F28, 0x81BF, 0x4F29, + 0x81C0, 0x4F2C, 0x81C1, 0x4F2D, 0x81C2, 0x4F2E, 0x81C3, 0x4F31, + 0x81C4, 0x4F33, 0x81C5, 0x4F35, 0x81C6, 0x4F37, 0x81C7, 0x4F39, + 0x81C8, 0x4F3B, 0x81C9, 0x4F3E, 0x81CA, 0x4F3F, 0x81CB, 0x4F40, + 0x81CC, 0x4F41, 0x81CD, 0x4F42, 0x81CE, 0x4F44, 0x81CF, 0x4F45, + 0x81D0, 0x4F47, 0x81D1, 0x4F48, 0x81D2, 0x4F49, 0x81D3, 0x4F4A, + 0x81D4, 0x4F4B, 0x81D5, 0x4F4C, 0x81D6, 0x4F52, 0x81D7, 0x4F54, + 0x81D8, 0x4F56, 0x81D9, 0x4F61, 0x81DA, 0x4F62, 0x81DB, 0x4F66, + 0x81DC, 0x4F68, 0x81DD, 0x4F6A, 0x81DE, 0x4F6B, 0x81DF, 0x4F6D, + 0x81E0, 0x4F6E, 0x81E1, 0x4F71, 0x81E2, 0x4F72, 0x81E3, 0x4F75, + 0x81E4, 0x4F77, 0x81E5, 0x4F78, 0x81E6, 0x4F79, 0x81E7, 0x4F7A, + 0x81E8, 0x4F7D, 0x81E9, 0x4F80, 0x81EA, 0x4F81, 0x81EB, 0x4F82, + 0x81EC, 0x4F85, 0x81ED, 0x4F86, 0x81EE, 0x4F87, 0x81EF, 0x4F8A, + 0x81F0, 0x4F8C, 0x81F1, 0x4F8E, 0x81F2, 0x4F90, 0x81F3, 0x4F92, + 0x81F4, 0x4F93, 0x81F5, 0x4F95, 0x81F6, 0x4F96, 0x81F7, 0x4F98, + 0x81F8, 0x4F99, 0x81F9, 0x4F9A, 0x81FA, 0x4F9C, 0x81FB, 0x4F9E, + 0x81FC, 0x4F9F, 0x81FD, 0x4FA1, 0x81FE, 0x4FA2, 0x8240, 0x4FA4, + 0x8241, 0x4FAB, 0x8242, 0x4FAD, 0x8243, 0x4FB0, 0x8244, 0x4FB1, + 0x8245, 0x4FB2, 0x8246, 0x4FB3, 0x8247, 0x4FB4, 0x8248, 0x4FB6, + 0x8249, 0x4FB7, 0x824A, 0x4FB8, 0x824B, 0x4FB9, 0x824C, 0x4FBA, + 0x824D, 0x4FBB, 0x824E, 0x4FBC, 0x824F, 0x4FBD, 0x8250, 0x4FBE, + 0x8251, 0x4FC0, 0x8252, 0x4FC1, 0x8253, 0x4FC2, 0x8254, 0x4FC6, + 0x8255, 0x4FC7, 0x8256, 0x4FC8, 0x8257, 0x4FC9, 0x8258, 0x4FCB, + 0x8259, 0x4FCC, 0x825A, 0x4FCD, 0x825B, 0x4FD2, 0x825C, 0x4FD3, + 0x825D, 0x4FD4, 0x825E, 0x4FD5, 0x825F, 0x4FD6, 0x8260, 0x4FD9, + 0x8261, 0x4FDB, 0x8262, 0x4FE0, 0x8263, 0x4FE2, 0x8264, 0x4FE4, + 0x8265, 0x4FE5, 0x8266, 0x4FE7, 0x8267, 0x4FEB, 0x8268, 0x4FEC, + 0x8269, 0x4FF0, 0x826A, 0x4FF2, 0x826B, 0x4FF4, 0x826C, 0x4FF5, + 0x826D, 0x4FF6, 0x826E, 0x4FF7, 0x826F, 0x4FF9, 0x8270, 0x4FFB, + 0x8271, 0x4FFC, 0x8272, 0x4FFD, 0x8273, 0x4FFF, 0x8274, 0x5000, + 0x8275, 0x5001, 0x8276, 0x5002, 0x8277, 0x5003, 0x8278, 0x5004, + 0x8279, 0x5005, 0x827A, 0x5006, 0x827B, 0x5007, 0x827C, 0x5008, + 0x827D, 0x5009, 0x827E, 0x500A, 0x8280, 0x500B, 0x8281, 0x500E, + 0x8282, 0x5010, 0x8283, 0x5011, 0x8284, 0x5013, 0x8285, 0x5015, + 0x8286, 0x5016, 0x8287, 0x5017, 0x8288, 0x501B, 0x8289, 0x501D, + 0x828A, 0x501E, 0x828B, 0x5020, 0x828C, 0x5022, 0x828D, 0x5023, + 0x828E, 0x5024, 0x828F, 0x5027, 0x8290, 0x502B, 0x8291, 0x502F, + 0x8292, 0x5030, 0x8293, 0x5031, 0x8294, 0x5032, 0x8295, 0x5033, + 0x8296, 0x5034, 0x8297, 0x5035, 0x8298, 0x5036, 0x8299, 0x5037, + 0x829A, 0x5038, 0x829B, 0x5039, 0x829C, 0x503B, 0x829D, 0x503D, + 0x829E, 0x503F, 0x829F, 0x5040, 0x82A0, 0x5041, 0x82A1, 0x5042, + 0x82A2, 0x5044, 0x82A3, 0x5045, 0x82A4, 0x5046, 0x82A5, 0x5049, + 0x82A6, 0x504A, 0x82A7, 0x504B, 0x82A8, 0x504D, 0x82A9, 0x5050, + 0x82AA, 0x5051, 0x82AB, 0x5052, 0x82AC, 0x5053, 0x82AD, 0x5054, + 0x82AE, 0x5056, 0x82AF, 0x5057, 0x82B0, 0x5058, 0x82B1, 0x5059, + 0x82B2, 0x505B, 0x82B3, 0x505D, 0x82B4, 0x505E, 0x82B5, 0x505F, + 0x82B6, 0x5060, 0x82B7, 0x5061, 0x82B8, 0x5062, 0x82B9, 0x5063, + 0x82BA, 0x5064, 0x82BB, 0x5066, 0x82BC, 0x5067, 0x82BD, 0x5068, + 0x82BE, 0x5069, 0x82BF, 0x506A, 0x82C0, 0x506B, 0x82C1, 0x506D, + 0x82C2, 0x506E, 0x82C3, 0x506F, 0x82C4, 0x5070, 0x82C5, 0x5071, + 0x82C6, 0x5072, 0x82C7, 0x5073, 0x82C8, 0x5074, 0x82C9, 0x5075, + 0x82CA, 0x5078, 0x82CB, 0x5079, 0x82CC, 0x507A, 0x82CD, 0x507C, + 0x82CE, 0x507D, 0x82CF, 0x5081, 0x82D0, 0x5082, 0x82D1, 0x5083, + 0x82D2, 0x5084, 0x82D3, 0x5086, 0x82D4, 0x5087, 0x82D5, 0x5089, + 0x82D6, 0x508A, 0x82D7, 0x508B, 0x82D8, 0x508C, 0x82D9, 0x508E, + 0x82DA, 0x508F, 0x82DB, 0x5090, 0x82DC, 0x5091, 0x82DD, 0x5092, + 0x82DE, 0x5093, 0x82DF, 0x5094, 0x82E0, 0x5095, 0x82E1, 0x5096, + 0x82E2, 0x5097, 0x82E3, 0x5098, 0x82E4, 0x5099, 0x82E5, 0x509A, + 0x82E6, 0x509B, 0x82E7, 0x509C, 0x82E8, 0x509D, 0x82E9, 0x509E, + 0x82EA, 0x509F, 0x82EB, 0x50A0, 0x82EC, 0x50A1, 0x82ED, 0x50A2, + 0x82EE, 0x50A4, 0x82EF, 0x50A6, 0x82F0, 0x50AA, 0x82F1, 0x50AB, + 0x82F2, 0x50AD, 0x82F3, 0x50AE, 0x82F4, 0x50AF, 0x82F5, 0x50B0, + 0x82F6, 0x50B1, 0x82F7, 0x50B3, 0x82F8, 0x50B4, 0x82F9, 0x50B5, + 0x82FA, 0x50B6, 0x82FB, 0x50B7, 0x82FC, 0x50B8, 0x82FD, 0x50B9, + 0x82FE, 0x50BC, 0x8340, 0x50BD, 0x8341, 0x50BE, 0x8342, 0x50BF, + 0x8343, 0x50C0, 0x8344, 0x50C1, 0x8345, 0x50C2, 0x8346, 0x50C3, + 0x8347, 0x50C4, 0x8348, 0x50C5, 0x8349, 0x50C6, 0x834A, 0x50C7, + 0x834B, 0x50C8, 0x834C, 0x50C9, 0x834D, 0x50CA, 0x834E, 0x50CB, + 0x834F, 0x50CC, 0x8350, 0x50CD, 0x8351, 0x50CE, 0x8352, 0x50D0, + 0x8353, 0x50D1, 0x8354, 0x50D2, 0x8355, 0x50D3, 0x8356, 0x50D4, + 0x8357, 0x50D5, 0x8358, 0x50D7, 0x8359, 0x50D8, 0x835A, 0x50D9, + 0x835B, 0x50DB, 0x835C, 0x50DC, 0x835D, 0x50DD, 0x835E, 0x50DE, + 0x835F, 0x50DF, 0x8360, 0x50E0, 0x8361, 0x50E1, 0x8362, 0x50E2, + 0x8363, 0x50E3, 0x8364, 0x50E4, 0x8365, 0x50E5, 0x8366, 0x50E8, + 0x8367, 0x50E9, 0x8368, 0x50EA, 0x8369, 0x50EB, 0x836A, 0x50EF, + 0x836B, 0x50F0, 0x836C, 0x50F1, 0x836D, 0x50F2, 0x836E, 0x50F4, + 0x836F, 0x50F6, 0x8370, 0x50F7, 0x8371, 0x50F8, 0x8372, 0x50F9, + 0x8373, 0x50FA, 0x8374, 0x50FC, 0x8375, 0x50FD, 0x8376, 0x50FE, + 0x8377, 0x50FF, 0x8378, 0x5100, 0x8379, 0x5101, 0x837A, 0x5102, + 0x837B, 0x5103, 0x837C, 0x5104, 0x837D, 0x5105, 0x837E, 0x5108, + 0x8380, 0x5109, 0x8381, 0x510A, 0x8382, 0x510C, 0x8383, 0x510D, + 0x8384, 0x510E, 0x8385, 0x510F, 0x8386, 0x5110, 0x8387, 0x5111, + 0x8388, 0x5113, 0x8389, 0x5114, 0x838A, 0x5115, 0x838B, 0x5116, + 0x838C, 0x5117, 0x838D, 0x5118, 0x838E, 0x5119, 0x838F, 0x511A, + 0x8390, 0x511B, 0x8391, 0x511C, 0x8392, 0x511D, 0x8393, 0x511E, + 0x8394, 0x511F, 0x8395, 0x5120, 0x8396, 0x5122, 0x8397, 0x5123, + 0x8398, 0x5124, 0x8399, 0x5125, 0x839A, 0x5126, 0x839B, 0x5127, + 0x839C, 0x5128, 0x839D, 0x5129, 0x839E, 0x512A, 0x839F, 0x512B, + 0x83A0, 0x512C, 0x83A1, 0x512D, 0x83A2, 0x512E, 0x83A3, 0x512F, + 0x83A4, 0x5130, 0x83A5, 0x5131, 0x83A6, 0x5132, 0x83A7, 0x5133, + 0x83A8, 0x5134, 0x83A9, 0x5135, 0x83AA, 0x5136, 0x83AB, 0x5137, + 0x83AC, 0x5138, 0x83AD, 0x5139, 0x83AE, 0x513A, 0x83AF, 0x513B, + 0x83B0, 0x513C, 0x83B1, 0x513D, 0x83B2, 0x513E, 0x83B3, 0x5142, + 0x83B4, 0x5147, 0x83B5, 0x514A, 0x83B6, 0x514C, 0x83B7, 0x514E, + 0x83B8, 0x514F, 0x83B9, 0x5150, 0x83BA, 0x5152, 0x83BB, 0x5153, + 0x83BC, 0x5157, 0x83BD, 0x5158, 0x83BE, 0x5159, 0x83BF, 0x515B, + 0x83C0, 0x515D, 0x83C1, 0x515E, 0x83C2, 0x515F, 0x83C3, 0x5160, + 0x83C4, 0x5161, 0x83C5, 0x5163, 0x83C6, 0x5164, 0x83C7, 0x5166, + 0x83C8, 0x5167, 0x83C9, 0x5169, 0x83CA, 0x516A, 0x83CB, 0x516F, + 0x83CC, 0x5172, 0x83CD, 0x517A, 0x83CE, 0x517E, 0x83CF, 0x517F, + 0x83D0, 0x5183, 0x83D1, 0x5184, 0x83D2, 0x5186, 0x83D3, 0x5187, + 0x83D4, 0x518A, 0x83D5, 0x518B, 0x83D6, 0x518E, 0x83D7, 0x518F, + 0x83D8, 0x5190, 0x83D9, 0x5191, 0x83DA, 0x5193, 0x83DB, 0x5194, + 0x83DC, 0x5198, 0x83DD, 0x519A, 0x83DE, 0x519D, 0x83DF, 0x519E, + 0x83E0, 0x519F, 0x83E1, 0x51A1, 0x83E2, 0x51A3, 0x83E3, 0x51A6, + 0x83E4, 0x51A7, 0x83E5, 0x51A8, 0x83E6, 0x51A9, 0x83E7, 0x51AA, + 0x83E8, 0x51AD, 0x83E9, 0x51AE, 0x83EA, 0x51B4, 0x83EB, 0x51B8, + 0x83EC, 0x51B9, 0x83ED, 0x51BA, 0x83EE, 0x51BE, 0x83EF, 0x51BF, + 0x83F0, 0x51C1, 0x83F1, 0x51C2, 0x83F2, 0x51C3, 0x83F3, 0x51C5, + 0x83F4, 0x51C8, 0x83F5, 0x51CA, 0x83F6, 0x51CD, 0x83F7, 0x51CE, + 0x83F8, 0x51D0, 0x83F9, 0x51D2, 0x83FA, 0x51D3, 0x83FB, 0x51D4, + 0x83FC, 0x51D5, 0x83FD, 0x51D6, 0x83FE, 0x51D7, 0x8440, 0x51D8, + 0x8441, 0x51D9, 0x8442, 0x51DA, 0x8443, 0x51DC, 0x8444, 0x51DE, + 0x8445, 0x51DF, 0x8446, 0x51E2, 0x8447, 0x51E3, 0x8448, 0x51E5, + 0x8449, 0x51E6, 0x844A, 0x51E7, 0x844B, 0x51E8, 0x844C, 0x51E9, + 0x844D, 0x51EA, 0x844E, 0x51EC, 0x844F, 0x51EE, 0x8450, 0x51F1, + 0x8451, 0x51F2, 0x8452, 0x51F4, 0x8453, 0x51F7, 0x8454, 0x51FE, + 0x8455, 0x5204, 0x8456, 0x5205, 0x8457, 0x5209, 0x8458, 0x520B, + 0x8459, 0x520C, 0x845A, 0x520F, 0x845B, 0x5210, 0x845C, 0x5213, + 0x845D, 0x5214, 0x845E, 0x5215, 0x845F, 0x521C, 0x8460, 0x521E, + 0x8461, 0x521F, 0x8462, 0x5221, 0x8463, 0x5222, 0x8464, 0x5223, + 0x8465, 0x5225, 0x8466, 0x5226, 0x8467, 0x5227, 0x8468, 0x522A, + 0x8469, 0x522C, 0x846A, 0x522F, 0x846B, 0x5231, 0x846C, 0x5232, + 0x846D, 0x5234, 0x846E, 0x5235, 0x846F, 0x523C, 0x8470, 0x523E, + 0x8471, 0x5244, 0x8472, 0x5245, 0x8473, 0x5246, 0x8474, 0x5247, + 0x8475, 0x5248, 0x8476, 0x5249, 0x8477, 0x524B, 0x8478, 0x524E, + 0x8479, 0x524F, 0x847A, 0x5252, 0x847B, 0x5253, 0x847C, 0x5255, + 0x847D, 0x5257, 0x847E, 0x5258, 0x8480, 0x5259, 0x8481, 0x525A, + 0x8482, 0x525B, 0x8483, 0x525D, 0x8484, 0x525F, 0x8485, 0x5260, + 0x8486, 0x5262, 0x8487, 0x5263, 0x8488, 0x5264, 0x8489, 0x5266, + 0x848A, 0x5268, 0x848B, 0x526B, 0x848C, 0x526C, 0x848D, 0x526D, + 0x848E, 0x526E, 0x848F, 0x5270, 0x8490, 0x5271, 0x8491, 0x5273, + 0x8492, 0x5274, 0x8493, 0x5275, 0x8494, 0x5276, 0x8495, 0x5277, + 0x8496, 0x5278, 0x8497, 0x5279, 0x8498, 0x527A, 0x8499, 0x527B, + 0x849A, 0x527C, 0x849B, 0x527E, 0x849C, 0x5280, 0x849D, 0x5283, + 0x849E, 0x5284, 0x849F, 0x5285, 0x84A0, 0x5286, 0x84A1, 0x5287, + 0x84A2, 0x5289, 0x84A3, 0x528A, 0x84A4, 0x528B, 0x84A5, 0x528C, + 0x84A6, 0x528D, 0x84A7, 0x528E, 0x84A8, 0x528F, 0x84A9, 0x5291, + 0x84AA, 0x5292, 0x84AB, 0x5294, 0x84AC, 0x5295, 0x84AD, 0x5296, + 0x84AE, 0x5297, 0x84AF, 0x5298, 0x84B0, 0x5299, 0x84B1, 0x529A, + 0x84B2, 0x529C, 0x84B3, 0x52A4, 0x84B4, 0x52A5, 0x84B5, 0x52A6, + 0x84B6, 0x52A7, 0x84B7, 0x52AE, 0x84B8, 0x52AF, 0x84B9, 0x52B0, + 0x84BA, 0x52B4, 0x84BB, 0x52B5, 0x84BC, 0x52B6, 0x84BD, 0x52B7, + 0x84BE, 0x52B8, 0x84BF, 0x52B9, 0x84C0, 0x52BA, 0x84C1, 0x52BB, + 0x84C2, 0x52BC, 0x84C3, 0x52BD, 0x84C4, 0x52C0, 0x84C5, 0x52C1, + 0x84C6, 0x52C2, 0x84C7, 0x52C4, 0x84C8, 0x52C5, 0x84C9, 0x52C6, + 0x84CA, 0x52C8, 0x84CB, 0x52CA, 0x84CC, 0x52CC, 0x84CD, 0x52CD, + 0x84CE, 0x52CE, 0x84CF, 0x52CF, 0x84D0, 0x52D1, 0x84D1, 0x52D3, + 0x84D2, 0x52D4, 0x84D3, 0x52D5, 0x84D4, 0x52D7, 0x84D5, 0x52D9, + 0x84D6, 0x52DA, 0x84D7, 0x52DB, 0x84D8, 0x52DC, 0x84D9, 0x52DD, + 0x84DA, 0x52DE, 0x84DB, 0x52E0, 0x84DC, 0x52E1, 0x84DD, 0x52E2, + 0x84DE, 0x52E3, 0x84DF, 0x52E5, 0x84E0, 0x52E6, 0x84E1, 0x52E7, + 0x84E2, 0x52E8, 0x84E3, 0x52E9, 0x84E4, 0x52EA, 0x84E5, 0x52EB, + 0x84E6, 0x52EC, 0x84E7, 0x52ED, 0x84E8, 0x52EE, 0x84E9, 0x52EF, + 0x84EA, 0x52F1, 0x84EB, 0x52F2, 0x84EC, 0x52F3, 0x84ED, 0x52F4, + 0x84EE, 0x52F5, 0x84EF, 0x52F6, 0x84F0, 0x52F7, 0x84F1, 0x52F8, + 0x84F2, 0x52FB, 0x84F3, 0x52FC, 0x84F4, 0x52FD, 0x84F5, 0x5301, + 0x84F6, 0x5302, 0x84F7, 0x5303, 0x84F8, 0x5304, 0x84F9, 0x5307, + 0x84FA, 0x5309, 0x84FB, 0x530A, 0x84FC, 0x530B, 0x84FD, 0x530C, + 0x84FE, 0x530E, 0x8540, 0x5311, 0x8541, 0x5312, 0x8542, 0x5313, + 0x8543, 0x5314, 0x8544, 0x5318, 0x8545, 0x531B, 0x8546, 0x531C, + 0x8547, 0x531E, 0x8548, 0x531F, 0x8549, 0x5322, 0x854A, 0x5324, + 0x854B, 0x5325, 0x854C, 0x5327, 0x854D, 0x5328, 0x854E, 0x5329, + 0x854F, 0x532B, 0x8550, 0x532C, 0x8551, 0x532D, 0x8552, 0x532F, + 0x8553, 0x5330, 0x8554, 0x5331, 0x8555, 0x5332, 0x8556, 0x5333, + 0x8557, 0x5334, 0x8558, 0x5335, 0x8559, 0x5336, 0x855A, 0x5337, + 0x855B, 0x5338, 0x855C, 0x533C, 0x855D, 0x533D, 0x855E, 0x5340, + 0x855F, 0x5342, 0x8560, 0x5344, 0x8561, 0x5346, 0x8562, 0x534B, + 0x8563, 0x534C, 0x8564, 0x534D, 0x8565, 0x5350, 0x8566, 0x5354, + 0x8567, 0x5358, 0x8568, 0x5359, 0x8569, 0x535B, 0x856A, 0x535D, + 0x856B, 0x5365, 0x856C, 0x5368, 0x856D, 0x536A, 0x856E, 0x536C, + 0x856F, 0x536D, 0x8570, 0x5372, 0x8571, 0x5376, 0x8572, 0x5379, + 0x8573, 0x537B, 0x8574, 0x537C, 0x8575, 0x537D, 0x8576, 0x537E, + 0x8577, 0x5380, 0x8578, 0x5381, 0x8579, 0x5383, 0x857A, 0x5387, + 0x857B, 0x5388, 0x857C, 0x538A, 0x857D, 0x538E, 0x857E, 0x538F, + 0x8580, 0x5390, 0x8581, 0x5391, 0x8582, 0x5392, 0x8583, 0x5393, + 0x8584, 0x5394, 0x8585, 0x5396, 0x8586, 0x5397, 0x8587, 0x5399, + 0x8588, 0x539B, 0x8589, 0x539C, 0x858A, 0x539E, 0x858B, 0x53A0, + 0x858C, 0x53A1, 0x858D, 0x53A4, 0x858E, 0x53A7, 0x858F, 0x53AA, + 0x8590, 0x53AB, 0x8591, 0x53AC, 0x8592, 0x53AD, 0x8593, 0x53AF, + 0x8594, 0x53B0, 0x8595, 0x53B1, 0x8596, 0x53B2, 0x8597, 0x53B3, + 0x8598, 0x53B4, 0x8599, 0x53B5, 0x859A, 0x53B7, 0x859B, 0x53B8, + 0x859C, 0x53B9, 0x859D, 0x53BA, 0x859E, 0x53BC, 0x859F, 0x53BD, + 0x85A0, 0x53BE, 0x85A1, 0x53C0, 0x85A2, 0x53C3, 0x85A3, 0x53C4, + 0x85A4, 0x53C5, 0x85A5, 0x53C6, 0x85A6, 0x53C7, 0x85A7, 0x53CE, + 0x85A8, 0x53CF, 0x85A9, 0x53D0, 0x85AA, 0x53D2, 0x85AB, 0x53D3, + 0x85AC, 0x53D5, 0x85AD, 0x53DA, 0x85AE, 0x53DC, 0x85AF, 0x53DD, + 0x85B0, 0x53DE, 0x85B1, 0x53E1, 0x85B2, 0x53E2, 0x85B3, 0x53E7, + 0x85B4, 0x53F4, 0x85B5, 0x53FA, 0x85B6, 0x53FE, 0x85B7, 0x53FF, + 0x85B8, 0x5400, 0x85B9, 0x5402, 0x85BA, 0x5405, 0x85BB, 0x5407, + 0x85BC, 0x540B, 0x85BD, 0x5414, 0x85BE, 0x5418, 0x85BF, 0x5419, + 0x85C0, 0x541A, 0x85C1, 0x541C, 0x85C2, 0x5422, 0x85C3, 0x5424, + 0x85C4, 0x5425, 0x85C5, 0x542A, 0x85C6, 0x5430, 0x85C7, 0x5433, + 0x85C8, 0x5436, 0x85C9, 0x5437, 0x85CA, 0x543A, 0x85CB, 0x543D, + 0x85CC, 0x543F, 0x85CD, 0x5441, 0x85CE, 0x5442, 0x85CF, 0x5444, + 0x85D0, 0x5445, 0x85D1, 0x5447, 0x85D2, 0x5449, 0x85D3, 0x544C, + 0x85D4, 0x544D, 0x85D5, 0x544E, 0x85D6, 0x544F, 0x85D7, 0x5451, + 0x85D8, 0x545A, 0x85D9, 0x545D, 0x85DA, 0x545E, 0x85DB, 0x545F, + 0x85DC, 0x5460, 0x85DD, 0x5461, 0x85DE, 0x5463, 0x85DF, 0x5465, + 0x85E0, 0x5467, 0x85E1, 0x5469, 0x85E2, 0x546A, 0x85E3, 0x546B, + 0x85E4, 0x546C, 0x85E5, 0x546D, 0x85E6, 0x546E, 0x85E7, 0x546F, + 0x85E8, 0x5470, 0x85E9, 0x5474, 0x85EA, 0x5479, 0x85EB, 0x547A, + 0x85EC, 0x547E, 0x85ED, 0x547F, 0x85EE, 0x5481, 0x85EF, 0x5483, + 0x85F0, 0x5485, 0x85F1, 0x5487, 0x85F2, 0x5488, 0x85F3, 0x5489, + 0x85F4, 0x548A, 0x85F5, 0x548D, 0x85F6, 0x5491, 0x85F7, 0x5493, + 0x85F8, 0x5497, 0x85F9, 0x5498, 0x85FA, 0x549C, 0x85FB, 0x549E, + 0x85FC, 0x549F, 0x85FD, 0x54A0, 0x85FE, 0x54A1, 0x8640, 0x54A2, + 0x8641, 0x54A5, 0x8642, 0x54AE, 0x8643, 0x54B0, 0x8644, 0x54B2, + 0x8645, 0x54B5, 0x8646, 0x54B6, 0x8647, 0x54B7, 0x8648, 0x54B9, + 0x8649, 0x54BA, 0x864A, 0x54BC, 0x864B, 0x54BE, 0x864C, 0x54C3, + 0x864D, 0x54C5, 0x864E, 0x54CA, 0x864F, 0x54CB, 0x8650, 0x54D6, + 0x8651, 0x54D8, 0x8652, 0x54DB, 0x8653, 0x54E0, 0x8654, 0x54E1, + 0x8655, 0x54E2, 0x8656, 0x54E3, 0x8657, 0x54E4, 0x8658, 0x54EB, + 0x8659, 0x54EC, 0x865A, 0x54EF, 0x865B, 0x54F0, 0x865C, 0x54F1, + 0x865D, 0x54F4, 0x865E, 0x54F5, 0x865F, 0x54F6, 0x8660, 0x54F7, + 0x8661, 0x54F8, 0x8662, 0x54F9, 0x8663, 0x54FB, 0x8664, 0x54FE, + 0x8665, 0x5500, 0x8666, 0x5502, 0x8667, 0x5503, 0x8668, 0x5504, + 0x8669, 0x5505, 0x866A, 0x5508, 0x866B, 0x550A, 0x866C, 0x550B, + 0x866D, 0x550C, 0x866E, 0x550D, 0x866F, 0x550E, 0x8670, 0x5512, + 0x8671, 0x5513, 0x8672, 0x5515, 0x8673, 0x5516, 0x8674, 0x5517, + 0x8675, 0x5518, 0x8676, 0x5519, 0x8677, 0x551A, 0x8678, 0x551C, + 0x8679, 0x551D, 0x867A, 0x551E, 0x867B, 0x551F, 0x867C, 0x5521, + 0x867D, 0x5525, 0x867E, 0x5526, 0x8680, 0x5528, 0x8681, 0x5529, + 0x8682, 0x552B, 0x8683, 0x552D, 0x8684, 0x5532, 0x8685, 0x5534, + 0x8686, 0x5535, 0x8687, 0x5536, 0x8688, 0x5538, 0x8689, 0x5539, + 0x868A, 0x553A, 0x868B, 0x553B, 0x868C, 0x553D, 0x868D, 0x5540, + 0x868E, 0x5542, 0x868F, 0x5545, 0x8690, 0x5547, 0x8691, 0x5548, + 0x8692, 0x554B, 0x8693, 0x554C, 0x8694, 0x554D, 0x8695, 0x554E, + 0x8696, 0x554F, 0x8697, 0x5551, 0x8698, 0x5552, 0x8699, 0x5553, + 0x869A, 0x5554, 0x869B, 0x5557, 0x869C, 0x5558, 0x869D, 0x5559, + 0x869E, 0x555A, 0x869F, 0x555B, 0x86A0, 0x555D, 0x86A1, 0x555E, + 0x86A2, 0x555F, 0x86A3, 0x5560, 0x86A4, 0x5562, 0x86A5, 0x5563, + 0x86A6, 0x5568, 0x86A7, 0x5569, 0x86A8, 0x556B, 0x86A9, 0x556F, + 0x86AA, 0x5570, 0x86AB, 0x5571, 0x86AC, 0x5572, 0x86AD, 0x5573, + 0x86AE, 0x5574, 0x86AF, 0x5579, 0x86B0, 0x557A, 0x86B1, 0x557D, + 0x86B2, 0x557F, 0x86B3, 0x5585, 0x86B4, 0x5586, 0x86B5, 0x558C, + 0x86B6, 0x558D, 0x86B7, 0x558E, 0x86B8, 0x5590, 0x86B9, 0x5592, + 0x86BA, 0x5593, 0x86BB, 0x5595, 0x86BC, 0x5596, 0x86BD, 0x5597, + 0x86BE, 0x559A, 0x86BF, 0x559B, 0x86C0, 0x559E, 0x86C1, 0x55A0, + 0x86C2, 0x55A1, 0x86C3, 0x55A2, 0x86C4, 0x55A3, 0x86C5, 0x55A4, + 0x86C6, 0x55A5, 0x86C7, 0x55A6, 0x86C8, 0x55A8, 0x86C9, 0x55A9, + 0x86CA, 0x55AA, 0x86CB, 0x55AB, 0x86CC, 0x55AC, 0x86CD, 0x55AD, + 0x86CE, 0x55AE, 0x86CF, 0x55AF, 0x86D0, 0x55B0, 0x86D1, 0x55B2, + 0x86D2, 0x55B4, 0x86D3, 0x55B6, 0x86D4, 0x55B8, 0x86D5, 0x55BA, + 0x86D6, 0x55BC, 0x86D7, 0x55BF, 0x86D8, 0x55C0, 0x86D9, 0x55C1, + 0x86DA, 0x55C2, 0x86DB, 0x55C3, 0x86DC, 0x55C6, 0x86DD, 0x55C7, + 0x86DE, 0x55C8, 0x86DF, 0x55CA, 0x86E0, 0x55CB, 0x86E1, 0x55CE, + 0x86E2, 0x55CF, 0x86E3, 0x55D0, 0x86E4, 0x55D5, 0x86E5, 0x55D7, + 0x86E6, 0x55D8, 0x86E7, 0x55D9, 0x86E8, 0x55DA, 0x86E9, 0x55DB, + 0x86EA, 0x55DE, 0x86EB, 0x55E0, 0x86EC, 0x55E2, 0x86ED, 0x55E7, + 0x86EE, 0x55E9, 0x86EF, 0x55ED, 0x86F0, 0x55EE, 0x86F1, 0x55F0, + 0x86F2, 0x55F1, 0x86F3, 0x55F4, 0x86F4, 0x55F6, 0x86F5, 0x55F8, + 0x86F6, 0x55F9, 0x86F7, 0x55FA, 0x86F8, 0x55FB, 0x86F9, 0x55FC, + 0x86FA, 0x55FF, 0x86FB, 0x5602, 0x86FC, 0x5603, 0x86FD, 0x5604, + 0x86FE, 0x5605, 0x8740, 0x5606, 0x8741, 0x5607, 0x8742, 0x560A, + 0x8743, 0x560B, 0x8744, 0x560D, 0x8745, 0x5610, 0x8746, 0x5611, + 0x8747, 0x5612, 0x8748, 0x5613, 0x8749, 0x5614, 0x874A, 0x5615, + 0x874B, 0x5616, 0x874C, 0x5617, 0x874D, 0x5619, 0x874E, 0x561A, + 0x874F, 0x561C, 0x8750, 0x561D, 0x8751, 0x5620, 0x8752, 0x5621, + 0x8753, 0x5622, 0x8754, 0x5625, 0x8755, 0x5626, 0x8756, 0x5628, + 0x8757, 0x5629, 0x8758, 0x562A, 0x8759, 0x562B, 0x875A, 0x562E, + 0x875B, 0x562F, 0x875C, 0x5630, 0x875D, 0x5633, 0x875E, 0x5635, + 0x875F, 0x5637, 0x8760, 0x5638, 0x8761, 0x563A, 0x8762, 0x563C, + 0x8763, 0x563D, 0x8764, 0x563E, 0x8765, 0x5640, 0x8766, 0x5641, + 0x8767, 0x5642, 0x8768, 0x5643, 0x8769, 0x5644, 0x876A, 0x5645, + 0x876B, 0x5646, 0x876C, 0x5647, 0x876D, 0x5648, 0x876E, 0x5649, + 0x876F, 0x564A, 0x8770, 0x564B, 0x8771, 0x564F, 0x8772, 0x5650, + 0x8773, 0x5651, 0x8774, 0x5652, 0x8775, 0x5653, 0x8776, 0x5655, + 0x8777, 0x5656, 0x8778, 0x565A, 0x8779, 0x565B, 0x877A, 0x565D, + 0x877B, 0x565E, 0x877C, 0x565F, 0x877D, 0x5660, 0x877E, 0x5661, + 0x8780, 0x5663, 0x8781, 0x5665, 0x8782, 0x5666, 0x8783, 0x5667, + 0x8784, 0x566D, 0x8785, 0x566E, 0x8786, 0x566F, 0x8787, 0x5670, + 0x8788, 0x5672, 0x8789, 0x5673, 0x878A, 0x5674, 0x878B, 0x5675, + 0x878C, 0x5677, 0x878D, 0x5678, 0x878E, 0x5679, 0x878F, 0x567A, + 0x8790, 0x567D, 0x8791, 0x567E, 0x8792, 0x567F, 0x8793, 0x5680, + 0x8794, 0x5681, 0x8795, 0x5682, 0x8796, 0x5683, 0x8797, 0x5684, + 0x8798, 0x5687, 0x8799, 0x5688, 0x879A, 0x5689, 0x879B, 0x568A, + 0x879C, 0x568B, 0x879D, 0x568C, 0x879E, 0x568D, 0x879F, 0x5690, + 0x87A0, 0x5691, 0x87A1, 0x5692, 0x87A2, 0x5694, 0x87A3, 0x5695, + 0x87A4, 0x5696, 0x87A5, 0x5697, 0x87A6, 0x5698, 0x87A7, 0x5699, + 0x87A8, 0x569A, 0x87A9, 0x569B, 0x87AA, 0x569C, 0x87AB, 0x569D, + 0x87AC, 0x569E, 0x87AD, 0x569F, 0x87AE, 0x56A0, 0x87AF, 0x56A1, + 0x87B0, 0x56A2, 0x87B1, 0x56A4, 0x87B2, 0x56A5, 0x87B3, 0x56A6, + 0x87B4, 0x56A7, 0x87B5, 0x56A8, 0x87B6, 0x56A9, 0x87B7, 0x56AA, + 0x87B8, 0x56AB, 0x87B9, 0x56AC, 0x87BA, 0x56AD, 0x87BB, 0x56AE, + 0x87BC, 0x56B0, 0x87BD, 0x56B1, 0x87BE, 0x56B2, 0x87BF, 0x56B3, + 0x87C0, 0x56B4, 0x87C1, 0x56B5, 0x87C2, 0x56B6, 0x87C3, 0x56B8, + 0x87C4, 0x56B9, 0x87C5, 0x56BA, 0x87C6, 0x56BB, 0x87C7, 0x56BD, + 0x87C8, 0x56BE, 0x87C9, 0x56BF, 0x87CA, 0x56C0, 0x87CB, 0x56C1, + 0x87CC, 0x56C2, 0x87CD, 0x56C3, 0x87CE, 0x56C4, 0x87CF, 0x56C5, + 0x87D0, 0x56C6, 0x87D1, 0x56C7, 0x87D2, 0x56C8, 0x87D3, 0x56C9, + 0x87D4, 0x56CB, 0x87D5, 0x56CC, 0x87D6, 0x56CD, 0x87D7, 0x56CE, + 0x87D8, 0x56CF, 0x87D9, 0x56D0, 0x87DA, 0x56D1, 0x87DB, 0x56D2, + 0x87DC, 0x56D3, 0x87DD, 0x56D5, 0x87DE, 0x56D6, 0x87DF, 0x56D8, + 0x87E0, 0x56D9, 0x87E1, 0x56DC, 0x87E2, 0x56E3, 0x87E3, 0x56E5, + 0x87E4, 0x56E6, 0x87E5, 0x56E7, 0x87E6, 0x56E8, 0x87E7, 0x56E9, + 0x87E8, 0x56EA, 0x87E9, 0x56EC, 0x87EA, 0x56EE, 0x87EB, 0x56EF, + 0x87EC, 0x56F2, 0x87ED, 0x56F3, 0x87EE, 0x56F6, 0x87EF, 0x56F7, + 0x87F0, 0x56F8, 0x87F1, 0x56FB, 0x87F2, 0x56FC, 0x87F3, 0x5700, + 0x87F4, 0x5701, 0x87F5, 0x5702, 0x87F6, 0x5705, 0x87F7, 0x5707, + 0x87F8, 0x570B, 0x87F9, 0x570C, 0x87FA, 0x570D, 0x87FB, 0x570E, + 0x87FC, 0x570F, 0x87FD, 0x5710, 0x87FE, 0x5711, 0x8840, 0x5712, + 0x8841, 0x5713, 0x8842, 0x5714, 0x8843, 0x5715, 0x8844, 0x5716, + 0x8845, 0x5717, 0x8846, 0x5718, 0x8847, 0x5719, 0x8848, 0x571A, + 0x8849, 0x571B, 0x884A, 0x571D, 0x884B, 0x571E, 0x884C, 0x5720, + 0x884D, 0x5721, 0x884E, 0x5722, 0x884F, 0x5724, 0x8850, 0x5725, + 0x8851, 0x5726, 0x8852, 0x5727, 0x8853, 0x572B, 0x8854, 0x5731, + 0x8855, 0x5732, 0x8856, 0x5734, 0x8857, 0x5735, 0x8858, 0x5736, + 0x8859, 0x5737, 0x885A, 0x5738, 0x885B, 0x573C, 0x885C, 0x573D, + 0x885D, 0x573F, 0x885E, 0x5741, 0x885F, 0x5743, 0x8860, 0x5744, + 0x8861, 0x5745, 0x8862, 0x5746, 0x8863, 0x5748, 0x8864, 0x5749, + 0x8865, 0x574B, 0x8866, 0x5752, 0x8867, 0x5753, 0x8868, 0x5754, + 0x8869, 0x5755, 0x886A, 0x5756, 0x886B, 0x5758, 0x886C, 0x5759, + 0x886D, 0x5762, 0x886E, 0x5763, 0x886F, 0x5765, 0x8870, 0x5767, + 0x8871, 0x576C, 0x8872, 0x576E, 0x8873, 0x5770, 0x8874, 0x5771, + 0x8875, 0x5772, 0x8876, 0x5774, 0x8877, 0x5775, 0x8878, 0x5778, + 0x8879, 0x5779, 0x887A, 0x577A, 0x887B, 0x577D, 0x887C, 0x577E, + 0x887D, 0x577F, 0x887E, 0x5780, 0x8880, 0x5781, 0x8881, 0x5787, + 0x8882, 0x5788, 0x8883, 0x5789, 0x8884, 0x578A, 0x8885, 0x578D, + 0x8886, 0x578E, 0x8887, 0x578F, 0x8888, 0x5790, 0x8889, 0x5791, + 0x888A, 0x5794, 0x888B, 0x5795, 0x888C, 0x5796, 0x888D, 0x5797, + 0x888E, 0x5798, 0x888F, 0x5799, 0x8890, 0x579A, 0x8891, 0x579C, + 0x8892, 0x579D, 0x8893, 0x579E, 0x8894, 0x579F, 0x8895, 0x57A5, + 0x8896, 0x57A8, 0x8897, 0x57AA, 0x8898, 0x57AC, 0x8899, 0x57AF, + 0x889A, 0x57B0, 0x889B, 0x57B1, 0x889C, 0x57B3, 0x889D, 0x57B5, + 0x889E, 0x57B6, 0x889F, 0x57B7, 0x88A0, 0x57B9, 0x88A1, 0x57BA, + 0x88A2, 0x57BB, 0x88A3, 0x57BC, 0x88A4, 0x57BD, 0x88A5, 0x57BE, + 0x88A6, 0x57BF, 0x88A7, 0x57C0, 0x88A8, 0x57C1, 0x88A9, 0x57C4, + 0x88AA, 0x57C5, 0x88AB, 0x57C6, 0x88AC, 0x57C7, 0x88AD, 0x57C8, + 0x88AE, 0x57C9, 0x88AF, 0x57CA, 0x88B0, 0x57CC, 0x88B1, 0x57CD, + 0x88B2, 0x57D0, 0x88B3, 0x57D1, 0x88B4, 0x57D3, 0x88B5, 0x57D6, + 0x88B6, 0x57D7, 0x88B7, 0x57DB, 0x88B8, 0x57DC, 0x88B9, 0x57DE, + 0x88BA, 0x57E1, 0x88BB, 0x57E2, 0x88BC, 0x57E3, 0x88BD, 0x57E5, + 0x88BE, 0x57E6, 0x88BF, 0x57E7, 0x88C0, 0x57E8, 0x88C1, 0x57E9, + 0x88C2, 0x57EA, 0x88C3, 0x57EB, 0x88C4, 0x57EC, 0x88C5, 0x57EE, + 0x88C6, 0x57F0, 0x88C7, 0x57F1, 0x88C8, 0x57F2, 0x88C9, 0x57F3, + 0x88CA, 0x57F5, 0x88CB, 0x57F6, 0x88CC, 0x57F7, 0x88CD, 0x57FB, + 0x88CE, 0x57FC, 0x88CF, 0x57FE, 0x88D0, 0x57FF, 0x88D1, 0x5801, + 0x88D2, 0x5803, 0x88D3, 0x5804, 0x88D4, 0x5805, 0x88D5, 0x5808, + 0x88D6, 0x5809, 0x88D7, 0x580A, 0x88D8, 0x580C, 0x88D9, 0x580E, + 0x88DA, 0x580F, 0x88DB, 0x5810, 0x88DC, 0x5812, 0x88DD, 0x5813, + 0x88DE, 0x5814, 0x88DF, 0x5816, 0x88E0, 0x5817, 0x88E1, 0x5818, + 0x88E2, 0x581A, 0x88E3, 0x581B, 0x88E4, 0x581C, 0x88E5, 0x581D, + 0x88E6, 0x581F, 0x88E7, 0x5822, 0x88E8, 0x5823, 0x88E9, 0x5825, + 0x88EA, 0x5826, 0x88EB, 0x5827, 0x88EC, 0x5828, 0x88ED, 0x5829, + 0x88EE, 0x582B, 0x88EF, 0x582C, 0x88F0, 0x582D, 0x88F1, 0x582E, + 0x88F2, 0x582F, 0x88F3, 0x5831, 0x88F4, 0x5832, 0x88F5, 0x5833, + 0x88F6, 0x5834, 0x88F7, 0x5836, 0x88F8, 0x5837, 0x88F9, 0x5838, + 0x88FA, 0x5839, 0x88FB, 0x583A, 0x88FC, 0x583B, 0x88FD, 0x583C, + 0x88FE, 0x583D, 0x8940, 0x583E, 0x8941, 0x583F, 0x8942, 0x5840, + 0x8943, 0x5841, 0x8944, 0x5842, 0x8945, 0x5843, 0x8946, 0x5845, + 0x8947, 0x5846, 0x8948, 0x5847, 0x8949, 0x5848, 0x894A, 0x5849, + 0x894B, 0x584A, 0x894C, 0x584B, 0x894D, 0x584E, 0x894E, 0x584F, + 0x894F, 0x5850, 0x8950, 0x5852, 0x8951, 0x5853, 0x8952, 0x5855, + 0x8953, 0x5856, 0x8954, 0x5857, 0x8955, 0x5859, 0x8956, 0x585A, + 0x8957, 0x585B, 0x8958, 0x585C, 0x8959, 0x585D, 0x895A, 0x585F, + 0x895B, 0x5860, 0x895C, 0x5861, 0x895D, 0x5862, 0x895E, 0x5863, + 0x895F, 0x5864, 0x8960, 0x5866, 0x8961, 0x5867, 0x8962, 0x5868, + 0x8963, 0x5869, 0x8964, 0x586A, 0x8965, 0x586D, 0x8966, 0x586E, + 0x8967, 0x586F, 0x8968, 0x5870, 0x8969, 0x5871, 0x896A, 0x5872, + 0x896B, 0x5873, 0x896C, 0x5874, 0x896D, 0x5875, 0x896E, 0x5876, + 0x896F, 0x5877, 0x8970, 0x5878, 0x8971, 0x5879, 0x8972, 0x587A, + 0x8973, 0x587B, 0x8974, 0x587C, 0x8975, 0x587D, 0x8976, 0x587F, + 0x8977, 0x5882, 0x8978, 0x5884, 0x8979, 0x5886, 0x897A, 0x5887, + 0x897B, 0x5888, 0x897C, 0x588A, 0x897D, 0x588B, 0x897E, 0x588C, + 0x8980, 0x588D, 0x8981, 0x588E, 0x8982, 0x588F, 0x8983, 0x5890, + 0x8984, 0x5891, 0x8985, 0x5894, 0x8986, 0x5895, 0x8987, 0x5896, + 0x8988, 0x5897, 0x8989, 0x5898, 0x898A, 0x589B, 0x898B, 0x589C, + 0x898C, 0x589D, 0x898D, 0x58A0, 0x898E, 0x58A1, 0x898F, 0x58A2, + 0x8990, 0x58A3, 0x8991, 0x58A4, 0x8992, 0x58A5, 0x8993, 0x58A6, + 0x8994, 0x58A7, 0x8995, 0x58AA, 0x8996, 0x58AB, 0x8997, 0x58AC, + 0x8998, 0x58AD, 0x8999, 0x58AE, 0x899A, 0x58AF, 0x899B, 0x58B0, + 0x899C, 0x58B1, 0x899D, 0x58B2, 0x899E, 0x58B3, 0x899F, 0x58B4, + 0x89A0, 0x58B5, 0x89A1, 0x58B6, 0x89A2, 0x58B7, 0x89A3, 0x58B8, + 0x89A4, 0x58B9, 0x89A5, 0x58BA, 0x89A6, 0x58BB, 0x89A7, 0x58BD, + 0x89A8, 0x58BE, 0x89A9, 0x58BF, 0x89AA, 0x58C0, 0x89AB, 0x58C2, + 0x89AC, 0x58C3, 0x89AD, 0x58C4, 0x89AE, 0x58C6, 0x89AF, 0x58C7, + 0x89B0, 0x58C8, 0x89B1, 0x58C9, 0x89B2, 0x58CA, 0x89B3, 0x58CB, + 0x89B4, 0x58CC, 0x89B5, 0x58CD, 0x89B6, 0x58CE, 0x89B7, 0x58CF, + 0x89B8, 0x58D0, 0x89B9, 0x58D2, 0x89BA, 0x58D3, 0x89BB, 0x58D4, + 0x89BC, 0x58D6, 0x89BD, 0x58D7, 0x89BE, 0x58D8, 0x89BF, 0x58D9, + 0x89C0, 0x58DA, 0x89C1, 0x58DB, 0x89C2, 0x58DC, 0x89C3, 0x58DD, + 0x89C4, 0x58DE, 0x89C5, 0x58DF, 0x89C6, 0x58E0, 0x89C7, 0x58E1, + 0x89C8, 0x58E2, 0x89C9, 0x58E3, 0x89CA, 0x58E5, 0x89CB, 0x58E6, + 0x89CC, 0x58E7, 0x89CD, 0x58E8, 0x89CE, 0x58E9, 0x89CF, 0x58EA, + 0x89D0, 0x58ED, 0x89D1, 0x58EF, 0x89D2, 0x58F1, 0x89D3, 0x58F2, + 0x89D4, 0x58F4, 0x89D5, 0x58F5, 0x89D6, 0x58F7, 0x89D7, 0x58F8, + 0x89D8, 0x58FA, 0x89D9, 0x58FB, 0x89DA, 0x58FC, 0x89DB, 0x58FD, + 0x89DC, 0x58FE, 0x89DD, 0x58FF, 0x89DE, 0x5900, 0x89DF, 0x5901, + 0x89E0, 0x5903, 0x89E1, 0x5905, 0x89E2, 0x5906, 0x89E3, 0x5908, + 0x89E4, 0x5909, 0x89E5, 0x590A, 0x89E6, 0x590B, 0x89E7, 0x590C, + 0x89E8, 0x590E, 0x89E9, 0x5910, 0x89EA, 0x5911, 0x89EB, 0x5912, + 0x89EC, 0x5913, 0x89ED, 0x5917, 0x89EE, 0x5918, 0x89EF, 0x591B, + 0x89F0, 0x591D, 0x89F1, 0x591E, 0x89F2, 0x5920, 0x89F3, 0x5921, + 0x89F4, 0x5922, 0x89F5, 0x5923, 0x89F6, 0x5926, 0x89F7, 0x5928, + 0x89F8, 0x592C, 0x89F9, 0x5930, 0x89FA, 0x5932, 0x89FB, 0x5933, + 0x89FC, 0x5935, 0x89FD, 0x5936, 0x89FE, 0x593B, 0x8A40, 0x593D, + 0x8A41, 0x593E, 0x8A42, 0x593F, 0x8A43, 0x5940, 0x8A44, 0x5943, + 0x8A45, 0x5945, 0x8A46, 0x5946, 0x8A47, 0x594A, 0x8A48, 0x594C, + 0x8A49, 0x594D, 0x8A4A, 0x5950, 0x8A4B, 0x5952, 0x8A4C, 0x5953, + 0x8A4D, 0x5959, 0x8A4E, 0x595B, 0x8A4F, 0x595C, 0x8A50, 0x595D, + 0x8A51, 0x595E, 0x8A52, 0x595F, 0x8A53, 0x5961, 0x8A54, 0x5963, + 0x8A55, 0x5964, 0x8A56, 0x5966, 0x8A57, 0x5967, 0x8A58, 0x5968, + 0x8A59, 0x5969, 0x8A5A, 0x596A, 0x8A5B, 0x596B, 0x8A5C, 0x596C, + 0x8A5D, 0x596D, 0x8A5E, 0x596E, 0x8A5F, 0x596F, 0x8A60, 0x5970, + 0x8A61, 0x5971, 0x8A62, 0x5972, 0x8A63, 0x5975, 0x8A64, 0x5977, + 0x8A65, 0x597A, 0x8A66, 0x597B, 0x8A67, 0x597C, 0x8A68, 0x597E, + 0x8A69, 0x597F, 0x8A6A, 0x5980, 0x8A6B, 0x5985, 0x8A6C, 0x5989, + 0x8A6D, 0x598B, 0x8A6E, 0x598C, 0x8A6F, 0x598E, 0x8A70, 0x598F, + 0x8A71, 0x5990, 0x8A72, 0x5991, 0x8A73, 0x5994, 0x8A74, 0x5995, + 0x8A75, 0x5998, 0x8A76, 0x599A, 0x8A77, 0x599B, 0x8A78, 0x599C, + 0x8A79, 0x599D, 0x8A7A, 0x599F, 0x8A7B, 0x59A0, 0x8A7C, 0x59A1, + 0x8A7D, 0x59A2, 0x8A7E, 0x59A6, 0x8A80, 0x59A7, 0x8A81, 0x59AC, + 0x8A82, 0x59AD, 0x8A83, 0x59B0, 0x8A84, 0x59B1, 0x8A85, 0x59B3, + 0x8A86, 0x59B4, 0x8A87, 0x59B5, 0x8A88, 0x59B6, 0x8A89, 0x59B7, + 0x8A8A, 0x59B8, 0x8A8B, 0x59BA, 0x8A8C, 0x59BC, 0x8A8D, 0x59BD, + 0x8A8E, 0x59BF, 0x8A8F, 0x59C0, 0x8A90, 0x59C1, 0x8A91, 0x59C2, + 0x8A92, 0x59C3, 0x8A93, 0x59C4, 0x8A94, 0x59C5, 0x8A95, 0x59C7, + 0x8A96, 0x59C8, 0x8A97, 0x59C9, 0x8A98, 0x59CC, 0x8A99, 0x59CD, + 0x8A9A, 0x59CE, 0x8A9B, 0x59CF, 0x8A9C, 0x59D5, 0x8A9D, 0x59D6, + 0x8A9E, 0x59D9, 0x8A9F, 0x59DB, 0x8AA0, 0x59DE, 0x8AA1, 0x59DF, + 0x8AA2, 0x59E0, 0x8AA3, 0x59E1, 0x8AA4, 0x59E2, 0x8AA5, 0x59E4, + 0x8AA6, 0x59E6, 0x8AA7, 0x59E7, 0x8AA8, 0x59E9, 0x8AA9, 0x59EA, + 0x8AAA, 0x59EB, 0x8AAB, 0x59ED, 0x8AAC, 0x59EE, 0x8AAD, 0x59EF, + 0x8AAE, 0x59F0, 0x8AAF, 0x59F1, 0x8AB0, 0x59F2, 0x8AB1, 0x59F3, + 0x8AB2, 0x59F4, 0x8AB3, 0x59F5, 0x8AB4, 0x59F6, 0x8AB5, 0x59F7, + 0x8AB6, 0x59F8, 0x8AB7, 0x59FA, 0x8AB8, 0x59FC, 0x8AB9, 0x59FD, + 0x8ABA, 0x59FE, 0x8ABB, 0x5A00, 0x8ABC, 0x5A02, 0x8ABD, 0x5A0A, + 0x8ABE, 0x5A0B, 0x8ABF, 0x5A0D, 0x8AC0, 0x5A0E, 0x8AC1, 0x5A0F, + 0x8AC2, 0x5A10, 0x8AC3, 0x5A12, 0x8AC4, 0x5A14, 0x8AC5, 0x5A15, + 0x8AC6, 0x5A16, 0x8AC7, 0x5A17, 0x8AC8, 0x5A19, 0x8AC9, 0x5A1A, + 0x8ACA, 0x5A1B, 0x8ACB, 0x5A1D, 0x8ACC, 0x5A1E, 0x8ACD, 0x5A21, + 0x8ACE, 0x5A22, 0x8ACF, 0x5A24, 0x8AD0, 0x5A26, 0x8AD1, 0x5A27, + 0x8AD2, 0x5A28, 0x8AD3, 0x5A2A, 0x8AD4, 0x5A2B, 0x8AD5, 0x5A2C, + 0x8AD6, 0x5A2D, 0x8AD7, 0x5A2E, 0x8AD8, 0x5A2F, 0x8AD9, 0x5A30, + 0x8ADA, 0x5A33, 0x8ADB, 0x5A35, 0x8ADC, 0x5A37, 0x8ADD, 0x5A38, + 0x8ADE, 0x5A39, 0x8ADF, 0x5A3A, 0x8AE0, 0x5A3B, 0x8AE1, 0x5A3D, + 0x8AE2, 0x5A3E, 0x8AE3, 0x5A3F, 0x8AE4, 0x5A41, 0x8AE5, 0x5A42, + 0x8AE6, 0x5A43, 0x8AE7, 0x5A44, 0x8AE8, 0x5A45, 0x8AE9, 0x5A47, + 0x8AEA, 0x5A48, 0x8AEB, 0x5A4B, 0x8AEC, 0x5A4C, 0x8AED, 0x5A4D, + 0x8AEE, 0x5A4E, 0x8AEF, 0x5A4F, 0x8AF0, 0x5A50, 0x8AF1, 0x5A51, + 0x8AF2, 0x5A52, 0x8AF3, 0x5A53, 0x8AF4, 0x5A54, 0x8AF5, 0x5A56, + 0x8AF6, 0x5A57, 0x8AF7, 0x5A58, 0x8AF8, 0x5A59, 0x8AF9, 0x5A5B, + 0x8AFA, 0x5A5C, 0x8AFB, 0x5A5D, 0x8AFC, 0x5A5E, 0x8AFD, 0x5A5F, + 0x8AFE, 0x5A60, 0x8B40, 0x5A61, 0x8B41, 0x5A63, 0x8B42, 0x5A64, + 0x8B43, 0x5A65, 0x8B44, 0x5A66, 0x8B45, 0x5A68, 0x8B46, 0x5A69, + 0x8B47, 0x5A6B, 0x8B48, 0x5A6C, 0x8B49, 0x5A6D, 0x8B4A, 0x5A6E, + 0x8B4B, 0x5A6F, 0x8B4C, 0x5A70, 0x8B4D, 0x5A71, 0x8B4E, 0x5A72, + 0x8B4F, 0x5A73, 0x8B50, 0x5A78, 0x8B51, 0x5A79, 0x8B52, 0x5A7B, + 0x8B53, 0x5A7C, 0x8B54, 0x5A7D, 0x8B55, 0x5A7E, 0x8B56, 0x5A80, + 0x8B57, 0x5A81, 0x8B58, 0x5A82, 0x8B59, 0x5A83, 0x8B5A, 0x5A84, + 0x8B5B, 0x5A85, 0x8B5C, 0x5A86, 0x8B5D, 0x5A87, 0x8B5E, 0x5A88, + 0x8B5F, 0x5A89, 0x8B60, 0x5A8A, 0x8B61, 0x5A8B, 0x8B62, 0x5A8C, + 0x8B63, 0x5A8D, 0x8B64, 0x5A8E, 0x8B65, 0x5A8F, 0x8B66, 0x5A90, + 0x8B67, 0x5A91, 0x8B68, 0x5A93, 0x8B69, 0x5A94, 0x8B6A, 0x5A95, + 0x8B6B, 0x5A96, 0x8B6C, 0x5A97, 0x8B6D, 0x5A98, 0x8B6E, 0x5A99, + 0x8B6F, 0x5A9C, 0x8B70, 0x5A9D, 0x8B71, 0x5A9E, 0x8B72, 0x5A9F, + 0x8B73, 0x5AA0, 0x8B74, 0x5AA1, 0x8B75, 0x5AA2, 0x8B76, 0x5AA3, + 0x8B77, 0x5AA4, 0x8B78, 0x5AA5, 0x8B79, 0x5AA6, 0x8B7A, 0x5AA7, + 0x8B7B, 0x5AA8, 0x8B7C, 0x5AA9, 0x8B7D, 0x5AAB, 0x8B7E, 0x5AAC, + 0x8B80, 0x5AAD, 0x8B81, 0x5AAE, 0x8B82, 0x5AAF, 0x8B83, 0x5AB0, + 0x8B84, 0x5AB1, 0x8B85, 0x5AB4, 0x8B86, 0x5AB6, 0x8B87, 0x5AB7, + 0x8B88, 0x5AB9, 0x8B89, 0x5ABA, 0x8B8A, 0x5ABB, 0x8B8B, 0x5ABC, + 0x8B8C, 0x5ABD, 0x8B8D, 0x5ABF, 0x8B8E, 0x5AC0, 0x8B8F, 0x5AC3, + 0x8B90, 0x5AC4, 0x8B91, 0x5AC5, 0x8B92, 0x5AC6, 0x8B93, 0x5AC7, + 0x8B94, 0x5AC8, 0x8B95, 0x5ACA, 0x8B96, 0x5ACB, 0x8B97, 0x5ACD, + 0x8B98, 0x5ACE, 0x8B99, 0x5ACF, 0x8B9A, 0x5AD0, 0x8B9B, 0x5AD1, + 0x8B9C, 0x5AD3, 0x8B9D, 0x5AD5, 0x8B9E, 0x5AD7, 0x8B9F, 0x5AD9, + 0x8BA0, 0x5ADA, 0x8BA1, 0x5ADB, 0x8BA2, 0x5ADD, 0x8BA3, 0x5ADE, + 0x8BA4, 0x5ADF, 0x8BA5, 0x5AE2, 0x8BA6, 0x5AE4, 0x8BA7, 0x5AE5, + 0x8BA8, 0x5AE7, 0x8BA9, 0x5AE8, 0x8BAA, 0x5AEA, 0x8BAB, 0x5AEC, + 0x8BAC, 0x5AED, 0x8BAD, 0x5AEE, 0x8BAE, 0x5AEF, 0x8BAF, 0x5AF0, + 0x8BB0, 0x5AF2, 0x8BB1, 0x5AF3, 0x8BB2, 0x5AF4, 0x8BB3, 0x5AF5, + 0x8BB4, 0x5AF6, 0x8BB5, 0x5AF7, 0x8BB6, 0x5AF8, 0x8BB7, 0x5AF9, + 0x8BB8, 0x5AFA, 0x8BB9, 0x5AFB, 0x8BBA, 0x5AFC, 0x8BBB, 0x5AFD, + 0x8BBC, 0x5AFE, 0x8BBD, 0x5AFF, 0x8BBE, 0x5B00, 0x8BBF, 0x5B01, + 0x8BC0, 0x5B02, 0x8BC1, 0x5B03, 0x8BC2, 0x5B04, 0x8BC3, 0x5B05, + 0x8BC4, 0x5B06, 0x8BC5, 0x5B07, 0x8BC6, 0x5B08, 0x8BC7, 0x5B0A, + 0x8BC8, 0x5B0B, 0x8BC9, 0x5B0C, 0x8BCA, 0x5B0D, 0x8BCB, 0x5B0E, + 0x8BCC, 0x5B0F, 0x8BCD, 0x5B10, 0x8BCE, 0x5B11, 0x8BCF, 0x5B12, + 0x8BD0, 0x5B13, 0x8BD1, 0x5B14, 0x8BD2, 0x5B15, 0x8BD3, 0x5B18, + 0x8BD4, 0x5B19, 0x8BD5, 0x5B1A, 0x8BD6, 0x5B1B, 0x8BD7, 0x5B1C, + 0x8BD8, 0x5B1D, 0x8BD9, 0x5B1E, 0x8BDA, 0x5B1F, 0x8BDB, 0x5B20, + 0x8BDC, 0x5B21, 0x8BDD, 0x5B22, 0x8BDE, 0x5B23, 0x8BDF, 0x5B24, + 0x8BE0, 0x5B25, 0x8BE1, 0x5B26, 0x8BE2, 0x5B27, 0x8BE3, 0x5B28, + 0x8BE4, 0x5B29, 0x8BE5, 0x5B2A, 0x8BE6, 0x5B2B, 0x8BE7, 0x5B2C, + 0x8BE8, 0x5B2D, 0x8BE9, 0x5B2E, 0x8BEA, 0x5B2F, 0x8BEB, 0x5B30, + 0x8BEC, 0x5B31, 0x8BED, 0x5B33, 0x8BEE, 0x5B35, 0x8BEF, 0x5B36, + 0x8BF0, 0x5B38, 0x8BF1, 0x5B39, 0x8BF2, 0x5B3A, 0x8BF3, 0x5B3B, + 0x8BF4, 0x5B3C, 0x8BF5, 0x5B3D, 0x8BF6, 0x5B3E, 0x8BF7, 0x5B3F, + 0x8BF8, 0x5B41, 0x8BF9, 0x5B42, 0x8BFA, 0x5B43, 0x8BFB, 0x5B44, + 0x8BFC, 0x5B45, 0x8BFD, 0x5B46, 0x8BFE, 0x5B47, 0x8C40, 0x5B48, + 0x8C41, 0x5B49, 0x8C42, 0x5B4A, 0x8C43, 0x5B4B, 0x8C44, 0x5B4C, + 0x8C45, 0x5B4D, 0x8C46, 0x5B4E, 0x8C47, 0x5B4F, 0x8C48, 0x5B52, + 0x8C49, 0x5B56, 0x8C4A, 0x5B5E, 0x8C4B, 0x5B60, 0x8C4C, 0x5B61, + 0x8C4D, 0x5B67, 0x8C4E, 0x5B68, 0x8C4F, 0x5B6B, 0x8C50, 0x5B6D, + 0x8C51, 0x5B6E, 0x8C52, 0x5B6F, 0x8C53, 0x5B72, 0x8C54, 0x5B74, + 0x8C55, 0x5B76, 0x8C56, 0x5B77, 0x8C57, 0x5B78, 0x8C58, 0x5B79, + 0x8C59, 0x5B7B, 0x8C5A, 0x5B7C, 0x8C5B, 0x5B7E, 0x8C5C, 0x5B7F, + 0x8C5D, 0x5B82, 0x8C5E, 0x5B86, 0x8C5F, 0x5B8A, 0x8C60, 0x5B8D, + 0x8C61, 0x5B8E, 0x8C62, 0x5B90, 0x8C63, 0x5B91, 0x8C64, 0x5B92, + 0x8C65, 0x5B94, 0x8C66, 0x5B96, 0x8C67, 0x5B9F, 0x8C68, 0x5BA7, + 0x8C69, 0x5BA8, 0x8C6A, 0x5BA9, 0x8C6B, 0x5BAC, 0x8C6C, 0x5BAD, + 0x8C6D, 0x5BAE, 0x8C6E, 0x5BAF, 0x8C6F, 0x5BB1, 0x8C70, 0x5BB2, + 0x8C71, 0x5BB7, 0x8C72, 0x5BBA, 0x8C73, 0x5BBB, 0x8C74, 0x5BBC, + 0x8C75, 0x5BC0, 0x8C76, 0x5BC1, 0x8C77, 0x5BC3, 0x8C78, 0x5BC8, + 0x8C79, 0x5BC9, 0x8C7A, 0x5BCA, 0x8C7B, 0x5BCB, 0x8C7C, 0x5BCD, + 0x8C7D, 0x5BCE, 0x8C7E, 0x5BCF, 0x8C80, 0x5BD1, 0x8C81, 0x5BD4, + 0x8C82, 0x5BD5, 0x8C83, 0x5BD6, 0x8C84, 0x5BD7, 0x8C85, 0x5BD8, + 0x8C86, 0x5BD9, 0x8C87, 0x5BDA, 0x8C88, 0x5BDB, 0x8C89, 0x5BDC, + 0x8C8A, 0x5BE0, 0x8C8B, 0x5BE2, 0x8C8C, 0x5BE3, 0x8C8D, 0x5BE6, + 0x8C8E, 0x5BE7, 0x8C8F, 0x5BE9, 0x8C90, 0x5BEA, 0x8C91, 0x5BEB, + 0x8C92, 0x5BEC, 0x8C93, 0x5BED, 0x8C94, 0x5BEF, 0x8C95, 0x5BF1, + 0x8C96, 0x5BF2, 0x8C97, 0x5BF3, 0x8C98, 0x5BF4, 0x8C99, 0x5BF5, + 0x8C9A, 0x5BF6, 0x8C9B, 0x5BF7, 0x8C9C, 0x5BFD, 0x8C9D, 0x5BFE, + 0x8C9E, 0x5C00, 0x8C9F, 0x5C02, 0x8CA0, 0x5C03, 0x8CA1, 0x5C05, + 0x8CA2, 0x5C07, 0x8CA3, 0x5C08, 0x8CA4, 0x5C0B, 0x8CA5, 0x5C0C, + 0x8CA6, 0x5C0D, 0x8CA7, 0x5C0E, 0x8CA8, 0x5C10, 0x8CA9, 0x5C12, + 0x8CAA, 0x5C13, 0x8CAB, 0x5C17, 0x8CAC, 0x5C19, 0x8CAD, 0x5C1B, + 0x8CAE, 0x5C1E, 0x8CAF, 0x5C1F, 0x8CB0, 0x5C20, 0x8CB1, 0x5C21, + 0x8CB2, 0x5C23, 0x8CB3, 0x5C26, 0x8CB4, 0x5C28, 0x8CB5, 0x5C29, + 0x8CB6, 0x5C2A, 0x8CB7, 0x5C2B, 0x8CB8, 0x5C2D, 0x8CB9, 0x5C2E, + 0x8CBA, 0x5C2F, 0x8CBB, 0x5C30, 0x8CBC, 0x5C32, 0x8CBD, 0x5C33, + 0x8CBE, 0x5C35, 0x8CBF, 0x5C36, 0x8CC0, 0x5C37, 0x8CC1, 0x5C43, + 0x8CC2, 0x5C44, 0x8CC3, 0x5C46, 0x8CC4, 0x5C47, 0x8CC5, 0x5C4C, + 0x8CC6, 0x5C4D, 0x8CC7, 0x5C52, 0x8CC8, 0x5C53, 0x8CC9, 0x5C54, + 0x8CCA, 0x5C56, 0x8CCB, 0x5C57, 0x8CCC, 0x5C58, 0x8CCD, 0x5C5A, + 0x8CCE, 0x5C5B, 0x8CCF, 0x5C5C, 0x8CD0, 0x5C5D, 0x8CD1, 0x5C5F, + 0x8CD2, 0x5C62, 0x8CD3, 0x5C64, 0x8CD4, 0x5C67, 0x8CD5, 0x5C68, + 0x8CD6, 0x5C69, 0x8CD7, 0x5C6A, 0x8CD8, 0x5C6B, 0x8CD9, 0x5C6C, + 0x8CDA, 0x5C6D, 0x8CDB, 0x5C70, 0x8CDC, 0x5C72, 0x8CDD, 0x5C73, + 0x8CDE, 0x5C74, 0x8CDF, 0x5C75, 0x8CE0, 0x5C76, 0x8CE1, 0x5C77, + 0x8CE2, 0x5C78, 0x8CE3, 0x5C7B, 0x8CE4, 0x5C7C, 0x8CE5, 0x5C7D, + 0x8CE6, 0x5C7E, 0x8CE7, 0x5C80, 0x8CE8, 0x5C83, 0x8CE9, 0x5C84, + 0x8CEA, 0x5C85, 0x8CEB, 0x5C86, 0x8CEC, 0x5C87, 0x8CED, 0x5C89, + 0x8CEE, 0x5C8A, 0x8CEF, 0x5C8B, 0x8CF0, 0x5C8E, 0x8CF1, 0x5C8F, + 0x8CF2, 0x5C92, 0x8CF3, 0x5C93, 0x8CF4, 0x5C95, 0x8CF5, 0x5C9D, + 0x8CF6, 0x5C9E, 0x8CF7, 0x5C9F, 0x8CF8, 0x5CA0, 0x8CF9, 0x5CA1, + 0x8CFA, 0x5CA4, 0x8CFB, 0x5CA5, 0x8CFC, 0x5CA6, 0x8CFD, 0x5CA7, + 0x8CFE, 0x5CA8, 0x8D40, 0x5CAA, 0x8D41, 0x5CAE, 0x8D42, 0x5CAF, + 0x8D43, 0x5CB0, 0x8D44, 0x5CB2, 0x8D45, 0x5CB4, 0x8D46, 0x5CB6, + 0x8D47, 0x5CB9, 0x8D48, 0x5CBA, 0x8D49, 0x5CBB, 0x8D4A, 0x5CBC, + 0x8D4B, 0x5CBE, 0x8D4C, 0x5CC0, 0x8D4D, 0x5CC2, 0x8D4E, 0x5CC3, + 0x8D4F, 0x5CC5, 0x8D50, 0x5CC6, 0x8D51, 0x5CC7, 0x8D52, 0x5CC8, + 0x8D53, 0x5CC9, 0x8D54, 0x5CCA, 0x8D55, 0x5CCC, 0x8D56, 0x5CCD, + 0x8D57, 0x5CCE, 0x8D58, 0x5CCF, 0x8D59, 0x5CD0, 0x8D5A, 0x5CD1, + 0x8D5B, 0x5CD3, 0x8D5C, 0x5CD4, 0x8D5D, 0x5CD5, 0x8D5E, 0x5CD6, + 0x8D5F, 0x5CD7, 0x8D60, 0x5CD8, 0x8D61, 0x5CDA, 0x8D62, 0x5CDB, + 0x8D63, 0x5CDC, 0x8D64, 0x5CDD, 0x8D65, 0x5CDE, 0x8D66, 0x5CDF, + 0x8D67, 0x5CE0, 0x8D68, 0x5CE2, 0x8D69, 0x5CE3, 0x8D6A, 0x5CE7, + 0x8D6B, 0x5CE9, 0x8D6C, 0x5CEB, 0x8D6D, 0x5CEC, 0x8D6E, 0x5CEE, + 0x8D6F, 0x5CEF, 0x8D70, 0x5CF1, 0x8D71, 0x5CF2, 0x8D72, 0x5CF3, + 0x8D73, 0x5CF4, 0x8D74, 0x5CF5, 0x8D75, 0x5CF6, 0x8D76, 0x5CF7, + 0x8D77, 0x5CF8, 0x8D78, 0x5CF9, 0x8D79, 0x5CFA, 0x8D7A, 0x5CFC, + 0x8D7B, 0x5CFD, 0x8D7C, 0x5CFE, 0x8D7D, 0x5CFF, 0x8D7E, 0x5D00, + 0x8D80, 0x5D01, 0x8D81, 0x5D04, 0x8D82, 0x5D05, 0x8D83, 0x5D08, + 0x8D84, 0x5D09, 0x8D85, 0x5D0A, 0x8D86, 0x5D0B, 0x8D87, 0x5D0C, + 0x8D88, 0x5D0D, 0x8D89, 0x5D0F, 0x8D8A, 0x5D10, 0x8D8B, 0x5D11, + 0x8D8C, 0x5D12, 0x8D8D, 0x5D13, 0x8D8E, 0x5D15, 0x8D8F, 0x5D17, + 0x8D90, 0x5D18, 0x8D91, 0x5D19, 0x8D92, 0x5D1A, 0x8D93, 0x5D1C, + 0x8D94, 0x5D1D, 0x8D95, 0x5D1F, 0x8D96, 0x5D20, 0x8D97, 0x5D21, + 0x8D98, 0x5D22, 0x8D99, 0x5D23, 0x8D9A, 0x5D25, 0x8D9B, 0x5D28, + 0x8D9C, 0x5D2A, 0x8D9D, 0x5D2B, 0x8D9E, 0x5D2C, 0x8D9F, 0x5D2F, + 0x8DA0, 0x5D30, 0x8DA1, 0x5D31, 0x8DA2, 0x5D32, 0x8DA3, 0x5D33, + 0x8DA4, 0x5D35, 0x8DA5, 0x5D36, 0x8DA6, 0x5D37, 0x8DA7, 0x5D38, + 0x8DA8, 0x5D39, 0x8DA9, 0x5D3A, 0x8DAA, 0x5D3B, 0x8DAB, 0x5D3C, + 0x8DAC, 0x5D3F, 0x8DAD, 0x5D40, 0x8DAE, 0x5D41, 0x8DAF, 0x5D42, + 0x8DB0, 0x5D43, 0x8DB1, 0x5D44, 0x8DB2, 0x5D45, 0x8DB3, 0x5D46, + 0x8DB4, 0x5D48, 0x8DB5, 0x5D49, 0x8DB6, 0x5D4D, 0x8DB7, 0x5D4E, + 0x8DB8, 0x5D4F, 0x8DB9, 0x5D50, 0x8DBA, 0x5D51, 0x8DBB, 0x5D52, + 0x8DBC, 0x5D53, 0x8DBD, 0x5D54, 0x8DBE, 0x5D55, 0x8DBF, 0x5D56, + 0x8DC0, 0x5D57, 0x8DC1, 0x5D59, 0x8DC2, 0x5D5A, 0x8DC3, 0x5D5C, + 0x8DC4, 0x5D5E, 0x8DC5, 0x5D5F, 0x8DC6, 0x5D60, 0x8DC7, 0x5D61, + 0x8DC8, 0x5D62, 0x8DC9, 0x5D63, 0x8DCA, 0x5D64, 0x8DCB, 0x5D65, + 0x8DCC, 0x5D66, 0x8DCD, 0x5D67, 0x8DCE, 0x5D68, 0x8DCF, 0x5D6A, + 0x8DD0, 0x5D6D, 0x8DD1, 0x5D6E, 0x8DD2, 0x5D70, 0x8DD3, 0x5D71, + 0x8DD4, 0x5D72, 0x8DD5, 0x5D73, 0x8DD6, 0x5D75, 0x8DD7, 0x5D76, + 0x8DD8, 0x5D77, 0x8DD9, 0x5D78, 0x8DDA, 0x5D79, 0x8DDB, 0x5D7A, + 0x8DDC, 0x5D7B, 0x8DDD, 0x5D7C, 0x8DDE, 0x5D7D, 0x8DDF, 0x5D7E, + 0x8DE0, 0x5D7F, 0x8DE1, 0x5D80, 0x8DE2, 0x5D81, 0x8DE3, 0x5D83, + 0x8DE4, 0x5D84, 0x8DE5, 0x5D85, 0x8DE6, 0x5D86, 0x8DE7, 0x5D87, + 0x8DE8, 0x5D88, 0x8DE9, 0x5D89, 0x8DEA, 0x5D8A, 0x8DEB, 0x5D8B, + 0x8DEC, 0x5D8C, 0x8DED, 0x5D8D, 0x8DEE, 0x5D8E, 0x8DEF, 0x5D8F, + 0x8DF0, 0x5D90, 0x8DF1, 0x5D91, 0x8DF2, 0x5D92, 0x8DF3, 0x5D93, + 0x8DF4, 0x5D94, 0x8DF5, 0x5D95, 0x8DF6, 0x5D96, 0x8DF7, 0x5D97, + 0x8DF8, 0x5D98, 0x8DF9, 0x5D9A, 0x8DFA, 0x5D9B, 0x8DFB, 0x5D9C, + 0x8DFC, 0x5D9E, 0x8DFD, 0x5D9F, 0x8DFE, 0x5DA0, 0x8E40, 0x5DA1, + 0x8E41, 0x5DA2, 0x8E42, 0x5DA3, 0x8E43, 0x5DA4, 0x8E44, 0x5DA5, + 0x8E45, 0x5DA6, 0x8E46, 0x5DA7, 0x8E47, 0x5DA8, 0x8E48, 0x5DA9, + 0x8E49, 0x5DAA, 0x8E4A, 0x5DAB, 0x8E4B, 0x5DAC, 0x8E4C, 0x5DAD, + 0x8E4D, 0x5DAE, 0x8E4E, 0x5DAF, 0x8E4F, 0x5DB0, 0x8E50, 0x5DB1, + 0x8E51, 0x5DB2, 0x8E52, 0x5DB3, 0x8E53, 0x5DB4, 0x8E54, 0x5DB5, + 0x8E55, 0x5DB6, 0x8E56, 0x5DB8, 0x8E57, 0x5DB9, 0x8E58, 0x5DBA, + 0x8E59, 0x5DBB, 0x8E5A, 0x5DBC, 0x8E5B, 0x5DBD, 0x8E5C, 0x5DBE, + 0x8E5D, 0x5DBF, 0x8E5E, 0x5DC0, 0x8E5F, 0x5DC1, 0x8E60, 0x5DC2, + 0x8E61, 0x5DC3, 0x8E62, 0x5DC4, 0x8E63, 0x5DC6, 0x8E64, 0x5DC7, + 0x8E65, 0x5DC8, 0x8E66, 0x5DC9, 0x8E67, 0x5DCA, 0x8E68, 0x5DCB, + 0x8E69, 0x5DCC, 0x8E6A, 0x5DCE, 0x8E6B, 0x5DCF, 0x8E6C, 0x5DD0, + 0x8E6D, 0x5DD1, 0x8E6E, 0x5DD2, 0x8E6F, 0x5DD3, 0x8E70, 0x5DD4, + 0x8E71, 0x5DD5, 0x8E72, 0x5DD6, 0x8E73, 0x5DD7, 0x8E74, 0x5DD8, + 0x8E75, 0x5DD9, 0x8E76, 0x5DDA, 0x8E77, 0x5DDC, 0x8E78, 0x5DDF, + 0x8E79, 0x5DE0, 0x8E7A, 0x5DE3, 0x8E7B, 0x5DE4, 0x8E7C, 0x5DEA, + 0x8E7D, 0x5DEC, 0x8E7E, 0x5DED, 0x8E80, 0x5DF0, 0x8E81, 0x5DF5, + 0x8E82, 0x5DF6, 0x8E83, 0x5DF8, 0x8E84, 0x5DF9, 0x8E85, 0x5DFA, + 0x8E86, 0x5DFB, 0x8E87, 0x5DFC, 0x8E88, 0x5DFF, 0x8E89, 0x5E00, + 0x8E8A, 0x5E04, 0x8E8B, 0x5E07, 0x8E8C, 0x5E09, 0x8E8D, 0x5E0A, + 0x8E8E, 0x5E0B, 0x8E8F, 0x5E0D, 0x8E90, 0x5E0E, 0x8E91, 0x5E12, + 0x8E92, 0x5E13, 0x8E93, 0x5E17, 0x8E94, 0x5E1E, 0x8E95, 0x5E1F, + 0x8E96, 0x5E20, 0x8E97, 0x5E21, 0x8E98, 0x5E22, 0x8E99, 0x5E23, + 0x8E9A, 0x5E24, 0x8E9B, 0x5E25, 0x8E9C, 0x5E28, 0x8E9D, 0x5E29, + 0x8E9E, 0x5E2A, 0x8E9F, 0x5E2B, 0x8EA0, 0x5E2C, 0x8EA1, 0x5E2F, + 0x8EA2, 0x5E30, 0x8EA3, 0x5E32, 0x8EA4, 0x5E33, 0x8EA5, 0x5E34, + 0x8EA6, 0x5E35, 0x8EA7, 0x5E36, 0x8EA8, 0x5E39, 0x8EA9, 0x5E3A, + 0x8EAA, 0x5E3E, 0x8EAB, 0x5E3F, 0x8EAC, 0x5E40, 0x8EAD, 0x5E41, + 0x8EAE, 0x5E43, 0x8EAF, 0x5E46, 0x8EB0, 0x5E47, 0x8EB1, 0x5E48, + 0x8EB2, 0x5E49, 0x8EB3, 0x5E4A, 0x8EB4, 0x5E4B, 0x8EB5, 0x5E4D, + 0x8EB6, 0x5E4E, 0x8EB7, 0x5E4F, 0x8EB8, 0x5E50, 0x8EB9, 0x5E51, + 0x8EBA, 0x5E52, 0x8EBB, 0x5E53, 0x8EBC, 0x5E56, 0x8EBD, 0x5E57, + 0x8EBE, 0x5E58, 0x8EBF, 0x5E59, 0x8EC0, 0x5E5A, 0x8EC1, 0x5E5C, + 0x8EC2, 0x5E5D, 0x8EC3, 0x5E5F, 0x8EC4, 0x5E60, 0x8EC5, 0x5E63, + 0x8EC6, 0x5E64, 0x8EC7, 0x5E65, 0x8EC8, 0x5E66, 0x8EC9, 0x5E67, + 0x8ECA, 0x5E68, 0x8ECB, 0x5E69, 0x8ECC, 0x5E6A, 0x8ECD, 0x5E6B, + 0x8ECE, 0x5E6C, 0x8ECF, 0x5E6D, 0x8ED0, 0x5E6E, 0x8ED1, 0x5E6F, + 0x8ED2, 0x5E70, 0x8ED3, 0x5E71, 0x8ED4, 0x5E75, 0x8ED5, 0x5E77, + 0x8ED6, 0x5E79, 0x8ED7, 0x5E7E, 0x8ED8, 0x5E81, 0x8ED9, 0x5E82, + 0x8EDA, 0x5E83, 0x8EDB, 0x5E85, 0x8EDC, 0x5E88, 0x8EDD, 0x5E89, + 0x8EDE, 0x5E8C, 0x8EDF, 0x5E8D, 0x8EE0, 0x5E8E, 0x8EE1, 0x5E92, + 0x8EE2, 0x5E98, 0x8EE3, 0x5E9B, 0x8EE4, 0x5E9D, 0x8EE5, 0x5EA1, + 0x8EE6, 0x5EA2, 0x8EE7, 0x5EA3, 0x8EE8, 0x5EA4, 0x8EE9, 0x5EA8, + 0x8EEA, 0x5EA9, 0x8EEB, 0x5EAA, 0x8EEC, 0x5EAB, 0x8EED, 0x5EAC, + 0x8EEE, 0x5EAE, 0x8EEF, 0x5EAF, 0x8EF0, 0x5EB0, 0x8EF1, 0x5EB1, + 0x8EF2, 0x5EB2, 0x8EF3, 0x5EB4, 0x8EF4, 0x5EBA, 0x8EF5, 0x5EBB, + 0x8EF6, 0x5EBC, 0x8EF7, 0x5EBD, 0x8EF8, 0x5EBF, 0x8EF9, 0x5EC0, + 0x8EFA, 0x5EC1, 0x8EFB, 0x5EC2, 0x8EFC, 0x5EC3, 0x8EFD, 0x5EC4, + 0x8EFE, 0x5EC5, 0x8F40, 0x5EC6, 0x8F41, 0x5EC7, 0x8F42, 0x5EC8, + 0x8F43, 0x5ECB, 0x8F44, 0x5ECC, 0x8F45, 0x5ECD, 0x8F46, 0x5ECE, + 0x8F47, 0x5ECF, 0x8F48, 0x5ED0, 0x8F49, 0x5ED4, 0x8F4A, 0x5ED5, + 0x8F4B, 0x5ED7, 0x8F4C, 0x5ED8, 0x8F4D, 0x5ED9, 0x8F4E, 0x5EDA, + 0x8F4F, 0x5EDC, 0x8F50, 0x5EDD, 0x8F51, 0x5EDE, 0x8F52, 0x5EDF, + 0x8F53, 0x5EE0, 0x8F54, 0x5EE1, 0x8F55, 0x5EE2, 0x8F56, 0x5EE3, + 0x8F57, 0x5EE4, 0x8F58, 0x5EE5, 0x8F59, 0x5EE6, 0x8F5A, 0x5EE7, + 0x8F5B, 0x5EE9, 0x8F5C, 0x5EEB, 0x8F5D, 0x5EEC, 0x8F5E, 0x5EED, + 0x8F5F, 0x5EEE, 0x8F60, 0x5EEF, 0x8F61, 0x5EF0, 0x8F62, 0x5EF1, + 0x8F63, 0x5EF2, 0x8F64, 0x5EF3, 0x8F65, 0x5EF5, 0x8F66, 0x5EF8, + 0x8F67, 0x5EF9, 0x8F68, 0x5EFB, 0x8F69, 0x5EFC, 0x8F6A, 0x5EFD, + 0x8F6B, 0x5F05, 0x8F6C, 0x5F06, 0x8F6D, 0x5F07, 0x8F6E, 0x5F09, + 0x8F6F, 0x5F0C, 0x8F70, 0x5F0D, 0x8F71, 0x5F0E, 0x8F72, 0x5F10, + 0x8F73, 0x5F12, 0x8F74, 0x5F14, 0x8F75, 0x5F16, 0x8F76, 0x5F19, + 0x8F77, 0x5F1A, 0x8F78, 0x5F1C, 0x8F79, 0x5F1D, 0x8F7A, 0x5F1E, + 0x8F7B, 0x5F21, 0x8F7C, 0x5F22, 0x8F7D, 0x5F23, 0x8F7E, 0x5F24, + 0x8F80, 0x5F28, 0x8F81, 0x5F2B, 0x8F82, 0x5F2C, 0x8F83, 0x5F2E, + 0x8F84, 0x5F30, 0x8F85, 0x5F32, 0x8F86, 0x5F33, 0x8F87, 0x5F34, + 0x8F88, 0x5F35, 0x8F89, 0x5F36, 0x8F8A, 0x5F37, 0x8F8B, 0x5F38, + 0x8F8C, 0x5F3B, 0x8F8D, 0x5F3D, 0x8F8E, 0x5F3E, 0x8F8F, 0x5F3F, + 0x8F90, 0x5F41, 0x8F91, 0x5F42, 0x8F92, 0x5F43, 0x8F93, 0x5F44, + 0x8F94, 0x5F45, 0x8F95, 0x5F46, 0x8F96, 0x5F47, 0x8F97, 0x5F48, + 0x8F98, 0x5F49, 0x8F99, 0x5F4A, 0x8F9A, 0x5F4B, 0x8F9B, 0x5F4C, + 0x8F9C, 0x5F4D, 0x8F9D, 0x5F4E, 0x8F9E, 0x5F4F, 0x8F9F, 0x5F51, + 0x8FA0, 0x5F54, 0x8FA1, 0x5F59, 0x8FA2, 0x5F5A, 0x8FA3, 0x5F5B, + 0x8FA4, 0x5F5C, 0x8FA5, 0x5F5E, 0x8FA6, 0x5F5F, 0x8FA7, 0x5F60, + 0x8FA8, 0x5F63, 0x8FA9, 0x5F65, 0x8FAA, 0x5F67, 0x8FAB, 0x5F68, + 0x8FAC, 0x5F6B, 0x8FAD, 0x5F6E, 0x8FAE, 0x5F6F, 0x8FAF, 0x5F72, + 0x8FB0, 0x5F74, 0x8FB1, 0x5F75, 0x8FB2, 0x5F76, 0x8FB3, 0x5F78, + 0x8FB4, 0x5F7A, 0x8FB5, 0x5F7D, 0x8FB6, 0x5F7E, 0x8FB7, 0x5F7F, + 0x8FB8, 0x5F83, 0x8FB9, 0x5F86, 0x8FBA, 0x5F8D, 0x8FBB, 0x5F8E, + 0x8FBC, 0x5F8F, 0x8FBD, 0x5F91, 0x8FBE, 0x5F93, 0x8FBF, 0x5F94, + 0x8FC0, 0x5F96, 0x8FC1, 0x5F9A, 0x8FC2, 0x5F9B, 0x8FC3, 0x5F9D, + 0x8FC4, 0x5F9E, 0x8FC5, 0x5F9F, 0x8FC6, 0x5FA0, 0x8FC7, 0x5FA2, + 0x8FC8, 0x5FA3, 0x8FC9, 0x5FA4, 0x8FCA, 0x5FA5, 0x8FCB, 0x5FA6, + 0x8FCC, 0x5FA7, 0x8FCD, 0x5FA9, 0x8FCE, 0x5FAB, 0x8FCF, 0x5FAC, + 0x8FD0, 0x5FAF, 0x8FD1, 0x5FB0, 0x8FD2, 0x5FB1, 0x8FD3, 0x5FB2, + 0x8FD4, 0x5FB3, 0x8FD5, 0x5FB4, 0x8FD6, 0x5FB6, 0x8FD7, 0x5FB8, + 0x8FD8, 0x5FB9, 0x8FD9, 0x5FBA, 0x8FDA, 0x5FBB, 0x8FDB, 0x5FBE, + 0x8FDC, 0x5FBF, 0x8FDD, 0x5FC0, 0x8FDE, 0x5FC1, 0x8FDF, 0x5FC2, + 0x8FE0, 0x5FC7, 0x8FE1, 0x5FC8, 0x8FE2, 0x5FCA, 0x8FE3, 0x5FCB, + 0x8FE4, 0x5FCE, 0x8FE5, 0x5FD3, 0x8FE6, 0x5FD4, 0x8FE7, 0x5FD5, + 0x8FE8, 0x5FDA, 0x8FE9, 0x5FDB, 0x8FEA, 0x5FDC, 0x8FEB, 0x5FDE, + 0x8FEC, 0x5FDF, 0x8FED, 0x5FE2, 0x8FEE, 0x5FE3, 0x8FEF, 0x5FE5, + 0x8FF0, 0x5FE6, 0x8FF1, 0x5FE8, 0x8FF2, 0x5FE9, 0x8FF3, 0x5FEC, + 0x8FF4, 0x5FEF, 0x8FF5, 0x5FF0, 0x8FF6, 0x5FF2, 0x8FF7, 0x5FF3, + 0x8FF8, 0x5FF4, 0x8FF9, 0x5FF6, 0x8FFA, 0x5FF7, 0x8FFB, 0x5FF9, + 0x8FFC, 0x5FFA, 0x8FFD, 0x5FFC, 0x8FFE, 0x6007, 0x9040, 0x6008, + 0x9041, 0x6009, 0x9042, 0x600B, 0x9043, 0x600C, 0x9044, 0x6010, + 0x9045, 0x6011, 0x9046, 0x6013, 0x9047, 0x6017, 0x9048, 0x6018, + 0x9049, 0x601A, 0x904A, 0x601E, 0x904B, 0x601F, 0x904C, 0x6022, + 0x904D, 0x6023, 0x904E, 0x6024, 0x904F, 0x602C, 0x9050, 0x602D, + 0x9051, 0x602E, 0x9052, 0x6030, 0x9053, 0x6031, 0x9054, 0x6032, + 0x9055, 0x6033, 0x9056, 0x6034, 0x9057, 0x6036, 0x9058, 0x6037, + 0x9059, 0x6038, 0x905A, 0x6039, 0x905B, 0x603A, 0x905C, 0x603D, + 0x905D, 0x603E, 0x905E, 0x6040, 0x905F, 0x6044, 0x9060, 0x6045, + 0x9061, 0x6046, 0x9062, 0x6047, 0x9063, 0x6048, 0x9064, 0x6049, + 0x9065, 0x604A, 0x9066, 0x604C, 0x9067, 0x604E, 0x9068, 0x604F, + 0x9069, 0x6051, 0x906A, 0x6053, 0x906B, 0x6054, 0x906C, 0x6056, + 0x906D, 0x6057, 0x906E, 0x6058, 0x906F, 0x605B, 0x9070, 0x605C, + 0x9071, 0x605E, 0x9072, 0x605F, 0x9073, 0x6060, 0x9074, 0x6061, + 0x9075, 0x6065, 0x9076, 0x6066, 0x9077, 0x606E, 0x9078, 0x6071, + 0x9079, 0x6072, 0x907A, 0x6074, 0x907B, 0x6075, 0x907C, 0x6077, + 0x907D, 0x607E, 0x907E, 0x6080, 0x9080, 0x6081, 0x9081, 0x6082, + 0x9082, 0x6085, 0x9083, 0x6086, 0x9084, 0x6087, 0x9085, 0x6088, + 0x9086, 0x608A, 0x9087, 0x608B, 0x9088, 0x608E, 0x9089, 0x608F, + 0x908A, 0x6090, 0x908B, 0x6091, 0x908C, 0x6093, 0x908D, 0x6095, + 0x908E, 0x6097, 0x908F, 0x6098, 0x9090, 0x6099, 0x9091, 0x609C, + 0x9092, 0x609E, 0x9093, 0x60A1, 0x9094, 0x60A2, 0x9095, 0x60A4, + 0x9096, 0x60A5, 0x9097, 0x60A7, 0x9098, 0x60A9, 0x9099, 0x60AA, + 0x909A, 0x60AE, 0x909B, 0x60B0, 0x909C, 0x60B3, 0x909D, 0x60B5, + 0x909E, 0x60B6, 0x909F, 0x60B7, 0x90A0, 0x60B9, 0x90A1, 0x60BA, + 0x90A2, 0x60BD, 0x90A3, 0x60BE, 0x90A4, 0x60BF, 0x90A5, 0x60C0, + 0x90A6, 0x60C1, 0x90A7, 0x60C2, 0x90A8, 0x60C3, 0x90A9, 0x60C4, + 0x90AA, 0x60C7, 0x90AB, 0x60C8, 0x90AC, 0x60C9, 0x90AD, 0x60CC, + 0x90AE, 0x60CD, 0x90AF, 0x60CE, 0x90B0, 0x60CF, 0x90B1, 0x60D0, + 0x90B2, 0x60D2, 0x90B3, 0x60D3, 0x90B4, 0x60D4, 0x90B5, 0x60D6, + 0x90B6, 0x60D7, 0x90B7, 0x60D9, 0x90B8, 0x60DB, 0x90B9, 0x60DE, + 0x90BA, 0x60E1, 0x90BB, 0x60E2, 0x90BC, 0x60E3, 0x90BD, 0x60E4, + 0x90BE, 0x60E5, 0x90BF, 0x60EA, 0x90C0, 0x60F1, 0x90C1, 0x60F2, + 0x90C2, 0x60F5, 0x90C3, 0x60F7, 0x90C4, 0x60F8, 0x90C5, 0x60FB, + 0x90C6, 0x60FC, 0x90C7, 0x60FD, 0x90C8, 0x60FE, 0x90C9, 0x60FF, + 0x90CA, 0x6102, 0x90CB, 0x6103, 0x90CC, 0x6104, 0x90CD, 0x6105, + 0x90CE, 0x6107, 0x90CF, 0x610A, 0x90D0, 0x610B, 0x90D1, 0x610C, + 0x90D2, 0x6110, 0x90D3, 0x6111, 0x90D4, 0x6112, 0x90D5, 0x6113, + 0x90D6, 0x6114, 0x90D7, 0x6116, 0x90D8, 0x6117, 0x90D9, 0x6118, + 0x90DA, 0x6119, 0x90DB, 0x611B, 0x90DC, 0x611C, 0x90DD, 0x611D, + 0x90DE, 0x611E, 0x90DF, 0x6121, 0x90E0, 0x6122, 0x90E1, 0x6125, + 0x90E2, 0x6128, 0x90E3, 0x6129, 0x90E4, 0x612A, 0x90E5, 0x612C, + 0x90E6, 0x612D, 0x90E7, 0x612E, 0x90E8, 0x612F, 0x90E9, 0x6130, + 0x90EA, 0x6131, 0x90EB, 0x6132, 0x90EC, 0x6133, 0x90ED, 0x6134, + 0x90EE, 0x6135, 0x90EF, 0x6136, 0x90F0, 0x6137, 0x90F1, 0x6138, + 0x90F2, 0x6139, 0x90F3, 0x613A, 0x90F4, 0x613B, 0x90F5, 0x613C, + 0x90F6, 0x613D, 0x90F7, 0x613E, 0x90F8, 0x6140, 0x90F9, 0x6141, + 0x90FA, 0x6142, 0x90FB, 0x6143, 0x90FC, 0x6144, 0x90FD, 0x6145, + 0x90FE, 0x6146, 0x9140, 0x6147, 0x9141, 0x6149, 0x9142, 0x614B, + 0x9143, 0x614D, 0x9144, 0x614F, 0x9145, 0x6150, 0x9146, 0x6152, + 0x9147, 0x6153, 0x9148, 0x6154, 0x9149, 0x6156, 0x914A, 0x6157, + 0x914B, 0x6158, 0x914C, 0x6159, 0x914D, 0x615A, 0x914E, 0x615B, + 0x914F, 0x615C, 0x9150, 0x615E, 0x9151, 0x615F, 0x9152, 0x6160, + 0x9153, 0x6161, 0x9154, 0x6163, 0x9155, 0x6164, 0x9156, 0x6165, + 0x9157, 0x6166, 0x9158, 0x6169, 0x9159, 0x616A, 0x915A, 0x616B, + 0x915B, 0x616C, 0x915C, 0x616D, 0x915D, 0x616E, 0x915E, 0x616F, + 0x915F, 0x6171, 0x9160, 0x6172, 0x9161, 0x6173, 0x9162, 0x6174, + 0x9163, 0x6176, 0x9164, 0x6178, 0x9165, 0x6179, 0x9166, 0x617A, + 0x9167, 0x617B, 0x9168, 0x617C, 0x9169, 0x617D, 0x916A, 0x617E, + 0x916B, 0x617F, 0x916C, 0x6180, 0x916D, 0x6181, 0x916E, 0x6182, + 0x916F, 0x6183, 0x9170, 0x6184, 0x9171, 0x6185, 0x9172, 0x6186, + 0x9173, 0x6187, 0x9174, 0x6188, 0x9175, 0x6189, 0x9176, 0x618A, + 0x9177, 0x618C, 0x9178, 0x618D, 0x9179, 0x618F, 0x917A, 0x6190, + 0x917B, 0x6191, 0x917C, 0x6192, 0x917D, 0x6193, 0x917E, 0x6195, + 0x9180, 0x6196, 0x9181, 0x6197, 0x9182, 0x6198, 0x9183, 0x6199, + 0x9184, 0x619A, 0x9185, 0x619B, 0x9186, 0x619C, 0x9187, 0x619E, + 0x9188, 0x619F, 0x9189, 0x61A0, 0x918A, 0x61A1, 0x918B, 0x61A2, + 0x918C, 0x61A3, 0x918D, 0x61A4, 0x918E, 0x61A5, 0x918F, 0x61A6, + 0x9190, 0x61AA, 0x9191, 0x61AB, 0x9192, 0x61AD, 0x9193, 0x61AE, + 0x9194, 0x61AF, 0x9195, 0x61B0, 0x9196, 0x61B1, 0x9197, 0x61B2, + 0x9198, 0x61B3, 0x9199, 0x61B4, 0x919A, 0x61B5, 0x919B, 0x61B6, + 0x919C, 0x61B8, 0x919D, 0x61B9, 0x919E, 0x61BA, 0x919F, 0x61BB, + 0x91A0, 0x61BC, 0x91A1, 0x61BD, 0x91A2, 0x61BF, 0x91A3, 0x61C0, + 0x91A4, 0x61C1, 0x91A5, 0x61C3, 0x91A6, 0x61C4, 0x91A7, 0x61C5, + 0x91A8, 0x61C6, 0x91A9, 0x61C7, 0x91AA, 0x61C9, 0x91AB, 0x61CC, + 0x91AC, 0x61CD, 0x91AD, 0x61CE, 0x91AE, 0x61CF, 0x91AF, 0x61D0, + 0x91B0, 0x61D3, 0x91B1, 0x61D5, 0x91B2, 0x61D6, 0x91B3, 0x61D7, + 0x91B4, 0x61D8, 0x91B5, 0x61D9, 0x91B6, 0x61DA, 0x91B7, 0x61DB, + 0x91B8, 0x61DC, 0x91B9, 0x61DD, 0x91BA, 0x61DE, 0x91BB, 0x61DF, + 0x91BC, 0x61E0, 0x91BD, 0x61E1, 0x91BE, 0x61E2, 0x91BF, 0x61E3, + 0x91C0, 0x61E4, 0x91C1, 0x61E5, 0x91C2, 0x61E7, 0x91C3, 0x61E8, + 0x91C4, 0x61E9, 0x91C5, 0x61EA, 0x91C6, 0x61EB, 0x91C7, 0x61EC, + 0x91C8, 0x61ED, 0x91C9, 0x61EE, 0x91CA, 0x61EF, 0x91CB, 0x61F0, + 0x91CC, 0x61F1, 0x91CD, 0x61F2, 0x91CE, 0x61F3, 0x91CF, 0x61F4, + 0x91D0, 0x61F6, 0x91D1, 0x61F7, 0x91D2, 0x61F8, 0x91D3, 0x61F9, + 0x91D4, 0x61FA, 0x91D5, 0x61FB, 0x91D6, 0x61FC, 0x91D7, 0x61FD, + 0x91D8, 0x61FE, 0x91D9, 0x6200, 0x91DA, 0x6201, 0x91DB, 0x6202, + 0x91DC, 0x6203, 0x91DD, 0x6204, 0x91DE, 0x6205, 0x91DF, 0x6207, + 0x91E0, 0x6209, 0x91E1, 0x6213, 0x91E2, 0x6214, 0x91E3, 0x6219, + 0x91E4, 0x621C, 0x91E5, 0x621D, 0x91E6, 0x621E, 0x91E7, 0x6220, + 0x91E8, 0x6223, 0x91E9, 0x6226, 0x91EA, 0x6227, 0x91EB, 0x6228, + 0x91EC, 0x6229, 0x91ED, 0x622B, 0x91EE, 0x622D, 0x91EF, 0x622F, + 0x91F0, 0x6230, 0x91F1, 0x6231, 0x91F2, 0x6232, 0x91F3, 0x6235, + 0x91F4, 0x6236, 0x91F5, 0x6238, 0x91F6, 0x6239, 0x91F7, 0x623A, + 0x91F8, 0x623B, 0x91F9, 0x623C, 0x91FA, 0x6242, 0x91FB, 0x6244, + 0x91FC, 0x6245, 0x91FD, 0x6246, 0x91FE, 0x624A, 0x9240, 0x624F, + 0x9241, 0x6250, 0x9242, 0x6255, 0x9243, 0x6256, 0x9244, 0x6257, + 0x9245, 0x6259, 0x9246, 0x625A, 0x9247, 0x625C, 0x9248, 0x625D, + 0x9249, 0x625E, 0x924A, 0x625F, 0x924B, 0x6260, 0x924C, 0x6261, + 0x924D, 0x6262, 0x924E, 0x6264, 0x924F, 0x6265, 0x9250, 0x6268, + 0x9251, 0x6271, 0x9252, 0x6272, 0x9253, 0x6274, 0x9254, 0x6275, + 0x9255, 0x6277, 0x9256, 0x6278, 0x9257, 0x627A, 0x9258, 0x627B, + 0x9259, 0x627D, 0x925A, 0x6281, 0x925B, 0x6282, 0x925C, 0x6283, + 0x925D, 0x6285, 0x925E, 0x6286, 0x925F, 0x6287, 0x9260, 0x6288, + 0x9261, 0x628B, 0x9262, 0x628C, 0x9263, 0x628D, 0x9264, 0x628E, + 0x9265, 0x628F, 0x9266, 0x6290, 0x9267, 0x6294, 0x9268, 0x6299, + 0x9269, 0x629C, 0x926A, 0x629D, 0x926B, 0x629E, 0x926C, 0x62A3, + 0x926D, 0x62A6, 0x926E, 0x62A7, 0x926F, 0x62A9, 0x9270, 0x62AA, + 0x9271, 0x62AD, 0x9272, 0x62AE, 0x9273, 0x62AF, 0x9274, 0x62B0, + 0x9275, 0x62B2, 0x9276, 0x62B3, 0x9277, 0x62B4, 0x9278, 0x62B6, + 0x9279, 0x62B7, 0x927A, 0x62B8, 0x927B, 0x62BA, 0x927C, 0x62BE, + 0x927D, 0x62C0, 0x927E, 0x62C1, 0x9280, 0x62C3, 0x9281, 0x62CB, + 0x9282, 0x62CF, 0x9283, 0x62D1, 0x9284, 0x62D5, 0x9285, 0x62DD, + 0x9286, 0x62DE, 0x9287, 0x62E0, 0x9288, 0x62E1, 0x9289, 0x62E4, + 0x928A, 0x62EA, 0x928B, 0x62EB, 0x928C, 0x62F0, 0x928D, 0x62F2, + 0x928E, 0x62F5, 0x928F, 0x62F8, 0x9290, 0x62F9, 0x9291, 0x62FA, + 0x9292, 0x62FB, 0x9293, 0x6300, 0x9294, 0x6303, 0x9295, 0x6304, + 0x9296, 0x6305, 0x9297, 0x6306, 0x9298, 0x630A, 0x9299, 0x630B, + 0x929A, 0x630C, 0x929B, 0x630D, 0x929C, 0x630F, 0x929D, 0x6310, + 0x929E, 0x6312, 0x929F, 0x6313, 0x92A0, 0x6314, 0x92A1, 0x6315, + 0x92A2, 0x6317, 0x92A3, 0x6318, 0x92A4, 0x6319, 0x92A5, 0x631C, + 0x92A6, 0x6326, 0x92A7, 0x6327, 0x92A8, 0x6329, 0x92A9, 0x632C, + 0x92AA, 0x632D, 0x92AB, 0x632E, 0x92AC, 0x6330, 0x92AD, 0x6331, + 0x92AE, 0x6333, 0x92AF, 0x6334, 0x92B0, 0x6335, 0x92B1, 0x6336, + 0x92B2, 0x6337, 0x92B3, 0x6338, 0x92B4, 0x633B, 0x92B5, 0x633C, + 0x92B6, 0x633E, 0x92B7, 0x633F, 0x92B8, 0x6340, 0x92B9, 0x6341, + 0x92BA, 0x6344, 0x92BB, 0x6347, 0x92BC, 0x6348, 0x92BD, 0x634A, + 0x92BE, 0x6351, 0x92BF, 0x6352, 0x92C0, 0x6353, 0x92C1, 0x6354, + 0x92C2, 0x6356, 0x92C3, 0x6357, 0x92C4, 0x6358, 0x92C5, 0x6359, + 0x92C6, 0x635A, 0x92C7, 0x635B, 0x92C8, 0x635C, 0x92C9, 0x635D, + 0x92CA, 0x6360, 0x92CB, 0x6364, 0x92CC, 0x6365, 0x92CD, 0x6366, + 0x92CE, 0x6368, 0x92CF, 0x636A, 0x92D0, 0x636B, 0x92D1, 0x636C, + 0x92D2, 0x636F, 0x92D3, 0x6370, 0x92D4, 0x6372, 0x92D5, 0x6373, + 0x92D6, 0x6374, 0x92D7, 0x6375, 0x92D8, 0x6378, 0x92D9, 0x6379, + 0x92DA, 0x637C, 0x92DB, 0x637D, 0x92DC, 0x637E, 0x92DD, 0x637F, + 0x92DE, 0x6381, 0x92DF, 0x6383, 0x92E0, 0x6384, 0x92E1, 0x6385, + 0x92E2, 0x6386, 0x92E3, 0x638B, 0x92E4, 0x638D, 0x92E5, 0x6391, + 0x92E6, 0x6393, 0x92E7, 0x6394, 0x92E8, 0x6395, 0x92E9, 0x6397, + 0x92EA, 0x6399, 0x92EB, 0x639A, 0x92EC, 0x639B, 0x92ED, 0x639C, + 0x92EE, 0x639D, 0x92EF, 0x639E, 0x92F0, 0x639F, 0x92F1, 0x63A1, + 0x92F2, 0x63A4, 0x92F3, 0x63A6, 0x92F4, 0x63AB, 0x92F5, 0x63AF, + 0x92F6, 0x63B1, 0x92F7, 0x63B2, 0x92F8, 0x63B5, 0x92F9, 0x63B6, + 0x92FA, 0x63B9, 0x92FB, 0x63BB, 0x92FC, 0x63BD, 0x92FD, 0x63BF, + 0x92FE, 0x63C0, 0x9340, 0x63C1, 0x9341, 0x63C2, 0x9342, 0x63C3, + 0x9343, 0x63C5, 0x9344, 0x63C7, 0x9345, 0x63C8, 0x9346, 0x63CA, + 0x9347, 0x63CB, 0x9348, 0x63CC, 0x9349, 0x63D1, 0x934A, 0x63D3, + 0x934B, 0x63D4, 0x934C, 0x63D5, 0x934D, 0x63D7, 0x934E, 0x63D8, + 0x934F, 0x63D9, 0x9350, 0x63DA, 0x9351, 0x63DB, 0x9352, 0x63DC, + 0x9353, 0x63DD, 0x9354, 0x63DF, 0x9355, 0x63E2, 0x9356, 0x63E4, + 0x9357, 0x63E5, 0x9358, 0x63E6, 0x9359, 0x63E7, 0x935A, 0x63E8, + 0x935B, 0x63EB, 0x935C, 0x63EC, 0x935D, 0x63EE, 0x935E, 0x63EF, + 0x935F, 0x63F0, 0x9360, 0x63F1, 0x9361, 0x63F3, 0x9362, 0x63F5, + 0x9363, 0x63F7, 0x9364, 0x63F9, 0x9365, 0x63FA, 0x9366, 0x63FB, + 0x9367, 0x63FC, 0x9368, 0x63FE, 0x9369, 0x6403, 0x936A, 0x6404, + 0x936B, 0x6406, 0x936C, 0x6407, 0x936D, 0x6408, 0x936E, 0x6409, + 0x936F, 0x640A, 0x9370, 0x640D, 0x9371, 0x640E, 0x9372, 0x6411, + 0x9373, 0x6412, 0x9374, 0x6415, 0x9375, 0x6416, 0x9376, 0x6417, + 0x9377, 0x6418, 0x9378, 0x6419, 0x9379, 0x641A, 0x937A, 0x641D, + 0x937B, 0x641F, 0x937C, 0x6422, 0x937D, 0x6423, 0x937E, 0x6424, + 0x9380, 0x6425, 0x9381, 0x6427, 0x9382, 0x6428, 0x9383, 0x6429, + 0x9384, 0x642B, 0x9385, 0x642E, 0x9386, 0x642F, 0x9387, 0x6430, + 0x9388, 0x6431, 0x9389, 0x6432, 0x938A, 0x6433, 0x938B, 0x6435, + 0x938C, 0x6436, 0x938D, 0x6437, 0x938E, 0x6438, 0x938F, 0x6439, + 0x9390, 0x643B, 0x9391, 0x643C, 0x9392, 0x643E, 0x9393, 0x6440, + 0x9394, 0x6442, 0x9395, 0x6443, 0x9396, 0x6449, 0x9397, 0x644B, + 0x9398, 0x644C, 0x9399, 0x644D, 0x939A, 0x644E, 0x939B, 0x644F, + 0x939C, 0x6450, 0x939D, 0x6451, 0x939E, 0x6453, 0x939F, 0x6455, + 0x93A0, 0x6456, 0x93A1, 0x6457, 0x93A2, 0x6459, 0x93A3, 0x645A, + 0x93A4, 0x645B, 0x93A5, 0x645C, 0x93A6, 0x645D, 0x93A7, 0x645F, + 0x93A8, 0x6460, 0x93A9, 0x6461, 0x93AA, 0x6462, 0x93AB, 0x6463, + 0x93AC, 0x6464, 0x93AD, 0x6465, 0x93AE, 0x6466, 0x93AF, 0x6468, + 0x93B0, 0x646A, 0x93B1, 0x646B, 0x93B2, 0x646C, 0x93B3, 0x646E, + 0x93B4, 0x646F, 0x93B5, 0x6470, 0x93B6, 0x6471, 0x93B7, 0x6472, + 0x93B8, 0x6473, 0x93B9, 0x6474, 0x93BA, 0x6475, 0x93BB, 0x6476, + 0x93BC, 0x6477, 0x93BD, 0x647B, 0x93BE, 0x647C, 0x93BF, 0x647D, + 0x93C0, 0x647E, 0x93C1, 0x647F, 0x93C2, 0x6480, 0x93C3, 0x6481, + 0x93C4, 0x6483, 0x93C5, 0x6486, 0x93C6, 0x6488, 0x93C7, 0x6489, + 0x93C8, 0x648A, 0x93C9, 0x648B, 0x93CA, 0x648C, 0x93CB, 0x648D, + 0x93CC, 0x648E, 0x93CD, 0x648F, 0x93CE, 0x6490, 0x93CF, 0x6493, + 0x93D0, 0x6494, 0x93D1, 0x6497, 0x93D2, 0x6498, 0x93D3, 0x649A, + 0x93D4, 0x649B, 0x93D5, 0x649C, 0x93D6, 0x649D, 0x93D7, 0x649F, + 0x93D8, 0x64A0, 0x93D9, 0x64A1, 0x93DA, 0x64A2, 0x93DB, 0x64A3, + 0x93DC, 0x64A5, 0x93DD, 0x64A6, 0x93DE, 0x64A7, 0x93DF, 0x64A8, + 0x93E0, 0x64AA, 0x93E1, 0x64AB, 0x93E2, 0x64AF, 0x93E3, 0x64B1, + 0x93E4, 0x64B2, 0x93E5, 0x64B3, 0x93E6, 0x64B4, 0x93E7, 0x64B6, + 0x93E8, 0x64B9, 0x93E9, 0x64BB, 0x93EA, 0x64BD, 0x93EB, 0x64BE, + 0x93EC, 0x64BF, 0x93ED, 0x64C1, 0x93EE, 0x64C3, 0x93EF, 0x64C4, + 0x93F0, 0x64C6, 0x93F1, 0x64C7, 0x93F2, 0x64C8, 0x93F3, 0x64C9, + 0x93F4, 0x64CA, 0x93F5, 0x64CB, 0x93F6, 0x64CC, 0x93F7, 0x64CF, + 0x93F8, 0x64D1, 0x93F9, 0x64D3, 0x93FA, 0x64D4, 0x93FB, 0x64D5, + 0x93FC, 0x64D6, 0x93FD, 0x64D9, 0x93FE, 0x64DA, 0x9440, 0x64DB, + 0x9441, 0x64DC, 0x9442, 0x64DD, 0x9443, 0x64DF, 0x9444, 0x64E0, + 0x9445, 0x64E1, 0x9446, 0x64E3, 0x9447, 0x64E5, 0x9448, 0x64E7, + 0x9449, 0x64E8, 0x944A, 0x64E9, 0x944B, 0x64EA, 0x944C, 0x64EB, + 0x944D, 0x64EC, 0x944E, 0x64ED, 0x944F, 0x64EE, 0x9450, 0x64EF, + 0x9451, 0x64F0, 0x9452, 0x64F1, 0x9453, 0x64F2, 0x9454, 0x64F3, + 0x9455, 0x64F4, 0x9456, 0x64F5, 0x9457, 0x64F6, 0x9458, 0x64F7, + 0x9459, 0x64F8, 0x945A, 0x64F9, 0x945B, 0x64FA, 0x945C, 0x64FB, + 0x945D, 0x64FC, 0x945E, 0x64FD, 0x945F, 0x64FE, 0x9460, 0x64FF, + 0x9461, 0x6501, 0x9462, 0x6502, 0x9463, 0x6503, 0x9464, 0x6504, + 0x9465, 0x6505, 0x9466, 0x6506, 0x9467, 0x6507, 0x9468, 0x6508, + 0x9469, 0x650A, 0x946A, 0x650B, 0x946B, 0x650C, 0x946C, 0x650D, + 0x946D, 0x650E, 0x946E, 0x650F, 0x946F, 0x6510, 0x9470, 0x6511, + 0x9471, 0x6513, 0x9472, 0x6514, 0x9473, 0x6515, 0x9474, 0x6516, + 0x9475, 0x6517, 0x9476, 0x6519, 0x9477, 0x651A, 0x9478, 0x651B, + 0x9479, 0x651C, 0x947A, 0x651D, 0x947B, 0x651E, 0x947C, 0x651F, + 0x947D, 0x6520, 0x947E, 0x6521, 0x9480, 0x6522, 0x9481, 0x6523, + 0x9482, 0x6524, 0x9483, 0x6526, 0x9484, 0x6527, 0x9485, 0x6528, + 0x9486, 0x6529, 0x9487, 0x652A, 0x9488, 0x652C, 0x9489, 0x652D, + 0x948A, 0x6530, 0x948B, 0x6531, 0x948C, 0x6532, 0x948D, 0x6533, + 0x948E, 0x6537, 0x948F, 0x653A, 0x9490, 0x653C, 0x9491, 0x653D, + 0x9492, 0x6540, 0x9493, 0x6541, 0x9494, 0x6542, 0x9495, 0x6543, + 0x9496, 0x6544, 0x9497, 0x6546, 0x9498, 0x6547, 0x9499, 0x654A, + 0x949A, 0x654B, 0x949B, 0x654D, 0x949C, 0x654E, 0x949D, 0x6550, + 0x949E, 0x6552, 0x949F, 0x6553, 0x94A0, 0x6554, 0x94A1, 0x6557, + 0x94A2, 0x6558, 0x94A3, 0x655A, 0x94A4, 0x655C, 0x94A5, 0x655F, + 0x94A6, 0x6560, 0x94A7, 0x6561, 0x94A8, 0x6564, 0x94A9, 0x6565, + 0x94AA, 0x6567, 0x94AB, 0x6568, 0x94AC, 0x6569, 0x94AD, 0x656A, + 0x94AE, 0x656D, 0x94AF, 0x656E, 0x94B0, 0x656F, 0x94B1, 0x6571, + 0x94B2, 0x6573, 0x94B3, 0x6575, 0x94B4, 0x6576, 0x94B5, 0x6578, + 0x94B6, 0x6579, 0x94B7, 0x657A, 0x94B8, 0x657B, 0x94B9, 0x657C, + 0x94BA, 0x657D, 0x94BB, 0x657E, 0x94BC, 0x657F, 0x94BD, 0x6580, + 0x94BE, 0x6581, 0x94BF, 0x6582, 0x94C0, 0x6583, 0x94C1, 0x6584, + 0x94C2, 0x6585, 0x94C3, 0x6586, 0x94C4, 0x6588, 0x94C5, 0x6589, + 0x94C6, 0x658A, 0x94C7, 0x658D, 0x94C8, 0x658E, 0x94C9, 0x658F, + 0x94CA, 0x6592, 0x94CB, 0x6594, 0x94CC, 0x6595, 0x94CD, 0x6596, + 0x94CE, 0x6598, 0x94CF, 0x659A, 0x94D0, 0x659D, 0x94D1, 0x659E, + 0x94D2, 0x65A0, 0x94D3, 0x65A2, 0x94D4, 0x65A3, 0x94D5, 0x65A6, + 0x94D6, 0x65A8, 0x94D7, 0x65AA, 0x94D8, 0x65AC, 0x94D9, 0x65AE, + 0x94DA, 0x65B1, 0x94DB, 0x65B2, 0x94DC, 0x65B3, 0x94DD, 0x65B4, + 0x94DE, 0x65B5, 0x94DF, 0x65B6, 0x94E0, 0x65B7, 0x94E1, 0x65B8, + 0x94E2, 0x65BA, 0x94E3, 0x65BB, 0x94E4, 0x65BE, 0x94E5, 0x65BF, + 0x94E6, 0x65C0, 0x94E7, 0x65C2, 0x94E8, 0x65C7, 0x94E9, 0x65C8, + 0x94EA, 0x65C9, 0x94EB, 0x65CA, 0x94EC, 0x65CD, 0x94ED, 0x65D0, + 0x94EE, 0x65D1, 0x94EF, 0x65D3, 0x94F0, 0x65D4, 0x94F1, 0x65D5, + 0x94F2, 0x65D8, 0x94F3, 0x65D9, 0x94F4, 0x65DA, 0x94F5, 0x65DB, + 0x94F6, 0x65DC, 0x94F7, 0x65DD, 0x94F8, 0x65DE, 0x94F9, 0x65DF, + 0x94FA, 0x65E1, 0x94FB, 0x65E3, 0x94FC, 0x65E4, 0x94FD, 0x65EA, + 0x94FE, 0x65EB, 0x9540, 0x65F2, 0x9541, 0x65F3, 0x9542, 0x65F4, + 0x9543, 0x65F5, 0x9544, 0x65F8, 0x9545, 0x65F9, 0x9546, 0x65FB, + 0x9547, 0x65FC, 0x9548, 0x65FD, 0x9549, 0x65FE, 0x954A, 0x65FF, + 0x954B, 0x6601, 0x954C, 0x6604, 0x954D, 0x6605, 0x954E, 0x6607, + 0x954F, 0x6608, 0x9550, 0x6609, 0x9551, 0x660B, 0x9552, 0x660D, + 0x9553, 0x6610, 0x9554, 0x6611, 0x9555, 0x6612, 0x9556, 0x6616, + 0x9557, 0x6617, 0x9558, 0x6618, 0x9559, 0x661A, 0x955A, 0x661B, + 0x955B, 0x661C, 0x955C, 0x661E, 0x955D, 0x6621, 0x955E, 0x6622, + 0x955F, 0x6623, 0x9560, 0x6624, 0x9561, 0x6626, 0x9562, 0x6629, + 0x9563, 0x662A, 0x9564, 0x662B, 0x9565, 0x662C, 0x9566, 0x662E, + 0x9567, 0x6630, 0x9568, 0x6632, 0x9569, 0x6633, 0x956A, 0x6637, + 0x956B, 0x6638, 0x956C, 0x6639, 0x956D, 0x663A, 0x956E, 0x663B, + 0x956F, 0x663D, 0x9570, 0x663F, 0x9571, 0x6640, 0x9572, 0x6642, + 0x9573, 0x6644, 0x9574, 0x6645, 0x9575, 0x6646, 0x9576, 0x6647, + 0x9577, 0x6648, 0x9578, 0x6649, 0x9579, 0x664A, 0x957A, 0x664D, + 0x957B, 0x664E, 0x957C, 0x6650, 0x957D, 0x6651, 0x957E, 0x6658, + 0x9580, 0x6659, 0x9581, 0x665B, 0x9582, 0x665C, 0x9583, 0x665D, + 0x9584, 0x665E, 0x9585, 0x6660, 0x9586, 0x6662, 0x9587, 0x6663, + 0x9588, 0x6665, 0x9589, 0x6667, 0x958A, 0x6669, 0x958B, 0x666A, + 0x958C, 0x666B, 0x958D, 0x666C, 0x958E, 0x666D, 0x958F, 0x6671, + 0x9590, 0x6672, 0x9591, 0x6673, 0x9592, 0x6675, 0x9593, 0x6678, + 0x9594, 0x6679, 0x9595, 0x667B, 0x9596, 0x667C, 0x9597, 0x667D, + 0x9598, 0x667F, 0x9599, 0x6680, 0x959A, 0x6681, 0x959B, 0x6683, + 0x959C, 0x6685, 0x959D, 0x6686, 0x959E, 0x6688, 0x959F, 0x6689, + 0x95A0, 0x668A, 0x95A1, 0x668B, 0x95A2, 0x668D, 0x95A3, 0x668E, + 0x95A4, 0x668F, 0x95A5, 0x6690, 0x95A6, 0x6692, 0x95A7, 0x6693, + 0x95A8, 0x6694, 0x95A9, 0x6695, 0x95AA, 0x6698, 0x95AB, 0x6699, + 0x95AC, 0x669A, 0x95AD, 0x669B, 0x95AE, 0x669C, 0x95AF, 0x669E, + 0x95B0, 0x669F, 0x95B1, 0x66A0, 0x95B2, 0x66A1, 0x95B3, 0x66A2, + 0x95B4, 0x66A3, 0x95B5, 0x66A4, 0x95B6, 0x66A5, 0x95B7, 0x66A6, + 0x95B8, 0x66A9, 0x95B9, 0x66AA, 0x95BA, 0x66AB, 0x95BB, 0x66AC, + 0x95BC, 0x66AD, 0x95BD, 0x66AF, 0x95BE, 0x66B0, 0x95BF, 0x66B1, + 0x95C0, 0x66B2, 0x95C1, 0x66B3, 0x95C2, 0x66B5, 0x95C3, 0x66B6, + 0x95C4, 0x66B7, 0x95C5, 0x66B8, 0x95C6, 0x66BA, 0x95C7, 0x66BB, + 0x95C8, 0x66BC, 0x95C9, 0x66BD, 0x95CA, 0x66BF, 0x95CB, 0x66C0, + 0x95CC, 0x66C1, 0x95CD, 0x66C2, 0x95CE, 0x66C3, 0x95CF, 0x66C4, + 0x95D0, 0x66C5, 0x95D1, 0x66C6, 0x95D2, 0x66C7, 0x95D3, 0x66C8, + 0x95D4, 0x66C9, 0x95D5, 0x66CA, 0x95D6, 0x66CB, 0x95D7, 0x66CC, + 0x95D8, 0x66CD, 0x95D9, 0x66CE, 0x95DA, 0x66CF, 0x95DB, 0x66D0, + 0x95DC, 0x66D1, 0x95DD, 0x66D2, 0x95DE, 0x66D3, 0x95DF, 0x66D4, + 0x95E0, 0x66D5, 0x95E1, 0x66D6, 0x95E2, 0x66D7, 0x95E3, 0x66D8, + 0x95E4, 0x66DA, 0x95E5, 0x66DE, 0x95E6, 0x66DF, 0x95E7, 0x66E0, + 0x95E8, 0x66E1, 0x95E9, 0x66E2, 0x95EA, 0x66E3, 0x95EB, 0x66E4, + 0x95EC, 0x66E5, 0x95ED, 0x66E7, 0x95EE, 0x66E8, 0x95EF, 0x66EA, + 0x95F0, 0x66EB, 0x95F1, 0x66EC, 0x95F2, 0x66ED, 0x95F3, 0x66EE, + 0x95F4, 0x66EF, 0x95F5, 0x66F1, 0x95F6, 0x66F5, 0x95F7, 0x66F6, + 0x95F8, 0x66F8, 0x95F9, 0x66FA, 0x95FA, 0x66FB, 0x95FB, 0x66FD, + 0x95FC, 0x6701, 0x95FD, 0x6702, 0x95FE, 0x6703, 0x9640, 0x6704, + 0x9641, 0x6705, 0x9642, 0x6706, 0x9643, 0x6707, 0x9644, 0x670C, + 0x9645, 0x670E, 0x9646, 0x670F, 0x9647, 0x6711, 0x9648, 0x6712, + 0x9649, 0x6713, 0x964A, 0x6716, 0x964B, 0x6718, 0x964C, 0x6719, + 0x964D, 0x671A, 0x964E, 0x671C, 0x964F, 0x671E, 0x9650, 0x6720, + 0x9651, 0x6721, 0x9652, 0x6722, 0x9653, 0x6723, 0x9654, 0x6724, + 0x9655, 0x6725, 0x9656, 0x6727, 0x9657, 0x6729, 0x9658, 0x672E, + 0x9659, 0x6730, 0x965A, 0x6732, 0x965B, 0x6733, 0x965C, 0x6736, + 0x965D, 0x6737, 0x965E, 0x6738, 0x965F, 0x6739, 0x9660, 0x673B, + 0x9661, 0x673C, 0x9662, 0x673E, 0x9663, 0x673F, 0x9664, 0x6741, + 0x9665, 0x6744, 0x9666, 0x6745, 0x9667, 0x6747, 0x9668, 0x674A, + 0x9669, 0x674B, 0x966A, 0x674D, 0x966B, 0x6752, 0x966C, 0x6754, + 0x966D, 0x6755, 0x966E, 0x6757, 0x966F, 0x6758, 0x9670, 0x6759, + 0x9671, 0x675A, 0x9672, 0x675B, 0x9673, 0x675D, 0x9674, 0x6762, + 0x9675, 0x6763, 0x9676, 0x6764, 0x9677, 0x6766, 0x9678, 0x6767, + 0x9679, 0x676B, 0x967A, 0x676C, 0x967B, 0x676E, 0x967C, 0x6771, + 0x967D, 0x6774, 0x967E, 0x6776, 0x9680, 0x6778, 0x9681, 0x6779, + 0x9682, 0x677A, 0x9683, 0x677B, 0x9684, 0x677D, 0x9685, 0x6780, + 0x9686, 0x6782, 0x9687, 0x6783, 0x9688, 0x6785, 0x9689, 0x6786, + 0x968A, 0x6788, 0x968B, 0x678A, 0x968C, 0x678C, 0x968D, 0x678D, + 0x968E, 0x678E, 0x968F, 0x678F, 0x9690, 0x6791, 0x9691, 0x6792, + 0x9692, 0x6793, 0x9693, 0x6794, 0x9694, 0x6796, 0x9695, 0x6799, + 0x9696, 0x679B, 0x9697, 0x679F, 0x9698, 0x67A0, 0x9699, 0x67A1, + 0x969A, 0x67A4, 0x969B, 0x67A6, 0x969C, 0x67A9, 0x969D, 0x67AC, + 0x969E, 0x67AE, 0x969F, 0x67B1, 0x96A0, 0x67B2, 0x96A1, 0x67B4, + 0x96A2, 0x67B9, 0x96A3, 0x67BA, 0x96A4, 0x67BB, 0x96A5, 0x67BC, + 0x96A6, 0x67BD, 0x96A7, 0x67BE, 0x96A8, 0x67BF, 0x96A9, 0x67C0, + 0x96AA, 0x67C2, 0x96AB, 0x67C5, 0x96AC, 0x67C6, 0x96AD, 0x67C7, + 0x96AE, 0x67C8, 0x96AF, 0x67C9, 0x96B0, 0x67CA, 0x96B1, 0x67CB, + 0x96B2, 0x67CC, 0x96B3, 0x67CD, 0x96B4, 0x67CE, 0x96B5, 0x67D5, + 0x96B6, 0x67D6, 0x96B7, 0x67D7, 0x96B8, 0x67DB, 0x96B9, 0x67DF, + 0x96BA, 0x67E1, 0x96BB, 0x67E3, 0x96BC, 0x67E4, 0x96BD, 0x67E6, + 0x96BE, 0x67E7, 0x96BF, 0x67E8, 0x96C0, 0x67EA, 0x96C1, 0x67EB, + 0x96C2, 0x67ED, 0x96C3, 0x67EE, 0x96C4, 0x67F2, 0x96C5, 0x67F5, + 0x96C6, 0x67F6, 0x96C7, 0x67F7, 0x96C8, 0x67F8, 0x96C9, 0x67F9, + 0x96CA, 0x67FA, 0x96CB, 0x67FB, 0x96CC, 0x67FC, 0x96CD, 0x67FE, + 0x96CE, 0x6801, 0x96CF, 0x6802, 0x96D0, 0x6803, 0x96D1, 0x6804, + 0x96D2, 0x6806, 0x96D3, 0x680D, 0x96D4, 0x6810, 0x96D5, 0x6812, + 0x96D6, 0x6814, 0x96D7, 0x6815, 0x96D8, 0x6818, 0x96D9, 0x6819, + 0x96DA, 0x681A, 0x96DB, 0x681B, 0x96DC, 0x681C, 0x96DD, 0x681E, + 0x96DE, 0x681F, 0x96DF, 0x6820, 0x96E0, 0x6822, 0x96E1, 0x6823, + 0x96E2, 0x6824, 0x96E3, 0x6825, 0x96E4, 0x6826, 0x96E5, 0x6827, + 0x96E6, 0x6828, 0x96E7, 0x682B, 0x96E8, 0x682C, 0x96E9, 0x682D, + 0x96EA, 0x682E, 0x96EB, 0x682F, 0x96EC, 0x6830, 0x96ED, 0x6831, + 0x96EE, 0x6834, 0x96EF, 0x6835, 0x96F0, 0x6836, 0x96F1, 0x683A, + 0x96F2, 0x683B, 0x96F3, 0x683F, 0x96F4, 0x6847, 0x96F5, 0x684B, + 0x96F6, 0x684D, 0x96F7, 0x684F, 0x96F8, 0x6852, 0x96F9, 0x6856, + 0x96FA, 0x6857, 0x96FB, 0x6858, 0x96FC, 0x6859, 0x96FD, 0x685A, + 0x96FE, 0x685B, 0x9740, 0x685C, 0x9741, 0x685D, 0x9742, 0x685E, + 0x9743, 0x685F, 0x9744, 0x686A, 0x9745, 0x686C, 0x9746, 0x686D, + 0x9747, 0x686E, 0x9748, 0x686F, 0x9749, 0x6870, 0x974A, 0x6871, + 0x974B, 0x6872, 0x974C, 0x6873, 0x974D, 0x6875, 0x974E, 0x6878, + 0x974F, 0x6879, 0x9750, 0x687A, 0x9751, 0x687B, 0x9752, 0x687C, + 0x9753, 0x687D, 0x9754, 0x687E, 0x9755, 0x687F, 0x9756, 0x6880, + 0x9757, 0x6882, 0x9758, 0x6884, 0x9759, 0x6887, 0x975A, 0x6888, + 0x975B, 0x6889, 0x975C, 0x688A, 0x975D, 0x688B, 0x975E, 0x688C, + 0x975F, 0x688D, 0x9760, 0x688E, 0x9761, 0x6890, 0x9762, 0x6891, + 0x9763, 0x6892, 0x9764, 0x6894, 0x9765, 0x6895, 0x9766, 0x6896, + 0x9767, 0x6898, 0x9768, 0x6899, 0x9769, 0x689A, 0x976A, 0x689B, + 0x976B, 0x689C, 0x976C, 0x689D, 0x976D, 0x689E, 0x976E, 0x689F, + 0x976F, 0x68A0, 0x9770, 0x68A1, 0x9771, 0x68A3, 0x9772, 0x68A4, + 0x9773, 0x68A5, 0x9774, 0x68A9, 0x9775, 0x68AA, 0x9776, 0x68AB, + 0x9777, 0x68AC, 0x9778, 0x68AE, 0x9779, 0x68B1, 0x977A, 0x68B2, + 0x977B, 0x68B4, 0x977C, 0x68B6, 0x977D, 0x68B7, 0x977E, 0x68B8, + 0x9780, 0x68B9, 0x9781, 0x68BA, 0x9782, 0x68BB, 0x9783, 0x68BC, + 0x9784, 0x68BD, 0x9785, 0x68BE, 0x9786, 0x68BF, 0x9787, 0x68C1, + 0x9788, 0x68C3, 0x9789, 0x68C4, 0x978A, 0x68C5, 0x978B, 0x68C6, + 0x978C, 0x68C7, 0x978D, 0x68C8, 0x978E, 0x68CA, 0x978F, 0x68CC, + 0x9790, 0x68CE, 0x9791, 0x68CF, 0x9792, 0x68D0, 0x9793, 0x68D1, + 0x9794, 0x68D3, 0x9795, 0x68D4, 0x9796, 0x68D6, 0x9797, 0x68D7, + 0x9798, 0x68D9, 0x9799, 0x68DB, 0x979A, 0x68DC, 0x979B, 0x68DD, + 0x979C, 0x68DE, 0x979D, 0x68DF, 0x979E, 0x68E1, 0x979F, 0x68E2, + 0x97A0, 0x68E4, 0x97A1, 0x68E5, 0x97A2, 0x68E6, 0x97A3, 0x68E7, + 0x97A4, 0x68E8, 0x97A5, 0x68E9, 0x97A6, 0x68EA, 0x97A7, 0x68EB, + 0x97A8, 0x68EC, 0x97A9, 0x68ED, 0x97AA, 0x68EF, 0x97AB, 0x68F2, + 0x97AC, 0x68F3, 0x97AD, 0x68F4, 0x97AE, 0x68F6, 0x97AF, 0x68F7, + 0x97B0, 0x68F8, 0x97B1, 0x68FB, 0x97B2, 0x68FD, 0x97B3, 0x68FE, + 0x97B4, 0x68FF, 0x97B5, 0x6900, 0x97B6, 0x6902, 0x97B7, 0x6903, + 0x97B8, 0x6904, 0x97B9, 0x6906, 0x97BA, 0x6907, 0x97BB, 0x6908, + 0x97BC, 0x6909, 0x97BD, 0x690A, 0x97BE, 0x690C, 0x97BF, 0x690F, + 0x97C0, 0x6911, 0x97C1, 0x6913, 0x97C2, 0x6914, 0x97C3, 0x6915, + 0x97C4, 0x6916, 0x97C5, 0x6917, 0x97C6, 0x6918, 0x97C7, 0x6919, + 0x97C8, 0x691A, 0x97C9, 0x691B, 0x97CA, 0x691C, 0x97CB, 0x691D, + 0x97CC, 0x691E, 0x97CD, 0x6921, 0x97CE, 0x6922, 0x97CF, 0x6923, + 0x97D0, 0x6925, 0x97D1, 0x6926, 0x97D2, 0x6927, 0x97D3, 0x6928, + 0x97D4, 0x6929, 0x97D5, 0x692A, 0x97D6, 0x692B, 0x97D7, 0x692C, + 0x97D8, 0x692E, 0x97D9, 0x692F, 0x97DA, 0x6931, 0x97DB, 0x6932, + 0x97DC, 0x6933, 0x97DD, 0x6935, 0x97DE, 0x6936, 0x97DF, 0x6937, + 0x97E0, 0x6938, 0x97E1, 0x693A, 0x97E2, 0x693B, 0x97E3, 0x693C, + 0x97E4, 0x693E, 0x97E5, 0x6940, 0x97E6, 0x6941, 0x97E7, 0x6943, + 0x97E8, 0x6944, 0x97E9, 0x6945, 0x97EA, 0x6946, 0x97EB, 0x6947, + 0x97EC, 0x6948, 0x97ED, 0x6949, 0x97EE, 0x694A, 0x97EF, 0x694B, + 0x97F0, 0x694C, 0x97F1, 0x694D, 0x97F2, 0x694E, 0x97F3, 0x694F, + 0x97F4, 0x6950, 0x97F5, 0x6951, 0x97F6, 0x6952, 0x97F7, 0x6953, + 0x97F8, 0x6955, 0x97F9, 0x6956, 0x97FA, 0x6958, 0x97FB, 0x6959, + 0x97FC, 0x695B, 0x97FD, 0x695C, 0x97FE, 0x695F, 0x9840, 0x6961, + 0x9841, 0x6962, 0x9842, 0x6964, 0x9843, 0x6965, 0x9844, 0x6967, + 0x9845, 0x6968, 0x9846, 0x6969, 0x9847, 0x696A, 0x9848, 0x696C, + 0x9849, 0x696D, 0x984A, 0x696F, 0x984B, 0x6970, 0x984C, 0x6972, + 0x984D, 0x6973, 0x984E, 0x6974, 0x984F, 0x6975, 0x9850, 0x6976, + 0x9851, 0x697A, 0x9852, 0x697B, 0x9853, 0x697D, 0x9854, 0x697E, + 0x9855, 0x697F, 0x9856, 0x6981, 0x9857, 0x6983, 0x9858, 0x6985, + 0x9859, 0x698A, 0x985A, 0x698B, 0x985B, 0x698C, 0x985C, 0x698E, + 0x985D, 0x698F, 0x985E, 0x6990, 0x985F, 0x6991, 0x9860, 0x6992, + 0x9861, 0x6993, 0x9862, 0x6996, 0x9863, 0x6997, 0x9864, 0x6999, + 0x9865, 0x699A, 0x9866, 0x699D, 0x9867, 0x699E, 0x9868, 0x699F, + 0x9869, 0x69A0, 0x986A, 0x69A1, 0x986B, 0x69A2, 0x986C, 0x69A3, + 0x986D, 0x69A4, 0x986E, 0x69A5, 0x986F, 0x69A6, 0x9870, 0x69A9, + 0x9871, 0x69AA, 0x9872, 0x69AC, 0x9873, 0x69AE, 0x9874, 0x69AF, + 0x9875, 0x69B0, 0x9876, 0x69B2, 0x9877, 0x69B3, 0x9878, 0x69B5, + 0x9879, 0x69B6, 0x987A, 0x69B8, 0x987B, 0x69B9, 0x987C, 0x69BA, + 0x987D, 0x69BC, 0x987E, 0x69BD, 0x9880, 0x69BE, 0x9881, 0x69BF, + 0x9882, 0x69C0, 0x9883, 0x69C2, 0x9884, 0x69C3, 0x9885, 0x69C4, + 0x9886, 0x69C5, 0x9887, 0x69C6, 0x9888, 0x69C7, 0x9889, 0x69C8, + 0x988A, 0x69C9, 0x988B, 0x69CB, 0x988C, 0x69CD, 0x988D, 0x69CF, + 0x988E, 0x69D1, 0x988F, 0x69D2, 0x9890, 0x69D3, 0x9891, 0x69D5, + 0x9892, 0x69D6, 0x9893, 0x69D7, 0x9894, 0x69D8, 0x9895, 0x69D9, + 0x9896, 0x69DA, 0x9897, 0x69DC, 0x9898, 0x69DD, 0x9899, 0x69DE, + 0x989A, 0x69E1, 0x989B, 0x69E2, 0x989C, 0x69E3, 0x989D, 0x69E4, + 0x989E, 0x69E5, 0x989F, 0x69E6, 0x98A0, 0x69E7, 0x98A1, 0x69E8, + 0x98A2, 0x69E9, 0x98A3, 0x69EA, 0x98A4, 0x69EB, 0x98A5, 0x69EC, + 0x98A6, 0x69EE, 0x98A7, 0x69EF, 0x98A8, 0x69F0, 0x98A9, 0x69F1, + 0x98AA, 0x69F3, 0x98AB, 0x69F4, 0x98AC, 0x69F5, 0x98AD, 0x69F6, + 0x98AE, 0x69F7, 0x98AF, 0x69F8, 0x98B0, 0x69F9, 0x98B1, 0x69FA, + 0x98B2, 0x69FB, 0x98B3, 0x69FC, 0x98B4, 0x69FE, 0x98B5, 0x6A00, + 0x98B6, 0x6A01, 0x98B7, 0x6A02, 0x98B8, 0x6A03, 0x98B9, 0x6A04, + 0x98BA, 0x6A05, 0x98BB, 0x6A06, 0x98BC, 0x6A07, 0x98BD, 0x6A08, + 0x98BE, 0x6A09, 0x98BF, 0x6A0B, 0x98C0, 0x6A0C, 0x98C1, 0x6A0D, + 0x98C2, 0x6A0E, 0x98C3, 0x6A0F, 0x98C4, 0x6A10, 0x98C5, 0x6A11, + 0x98C6, 0x6A12, 0x98C7, 0x6A13, 0x98C8, 0x6A14, 0x98C9, 0x6A15, + 0x98CA, 0x6A16, 0x98CB, 0x6A19, 0x98CC, 0x6A1A, 0x98CD, 0x6A1B, + 0x98CE, 0x6A1C, 0x98CF, 0x6A1D, 0x98D0, 0x6A1E, 0x98D1, 0x6A20, + 0x98D2, 0x6A22, 0x98D3, 0x6A23, 0x98D4, 0x6A24, 0x98D5, 0x6A25, + 0x98D6, 0x6A26, 0x98D7, 0x6A27, 0x98D8, 0x6A29, 0x98D9, 0x6A2B, + 0x98DA, 0x6A2C, 0x98DB, 0x6A2D, 0x98DC, 0x6A2E, 0x98DD, 0x6A30, + 0x98DE, 0x6A32, 0x98DF, 0x6A33, 0x98E0, 0x6A34, 0x98E1, 0x6A36, + 0x98E2, 0x6A37, 0x98E3, 0x6A38, 0x98E4, 0x6A39, 0x98E5, 0x6A3A, + 0x98E6, 0x6A3B, 0x98E7, 0x6A3C, 0x98E8, 0x6A3F, 0x98E9, 0x6A40, + 0x98EA, 0x6A41, 0x98EB, 0x6A42, 0x98EC, 0x6A43, 0x98ED, 0x6A45, + 0x98EE, 0x6A46, 0x98EF, 0x6A48, 0x98F0, 0x6A49, 0x98F1, 0x6A4A, + 0x98F2, 0x6A4B, 0x98F3, 0x6A4C, 0x98F4, 0x6A4D, 0x98F5, 0x6A4E, + 0x98F6, 0x6A4F, 0x98F7, 0x6A51, 0x98F8, 0x6A52, 0x98F9, 0x6A53, + 0x98FA, 0x6A54, 0x98FB, 0x6A55, 0x98FC, 0x6A56, 0x98FD, 0x6A57, + 0x98FE, 0x6A5A, 0x9940, 0x6A5C, 0x9941, 0x6A5D, 0x9942, 0x6A5E, + 0x9943, 0x6A5F, 0x9944, 0x6A60, 0x9945, 0x6A62, 0x9946, 0x6A63, + 0x9947, 0x6A64, 0x9948, 0x6A66, 0x9949, 0x6A67, 0x994A, 0x6A68, + 0x994B, 0x6A69, 0x994C, 0x6A6A, 0x994D, 0x6A6B, 0x994E, 0x6A6C, + 0x994F, 0x6A6D, 0x9950, 0x6A6E, 0x9951, 0x6A6F, 0x9952, 0x6A70, + 0x9953, 0x6A72, 0x9954, 0x6A73, 0x9955, 0x6A74, 0x9956, 0x6A75, + 0x9957, 0x6A76, 0x9958, 0x6A77, 0x9959, 0x6A78, 0x995A, 0x6A7A, + 0x995B, 0x6A7B, 0x995C, 0x6A7D, 0x995D, 0x6A7E, 0x995E, 0x6A7F, + 0x995F, 0x6A81, 0x9960, 0x6A82, 0x9961, 0x6A83, 0x9962, 0x6A85, + 0x9963, 0x6A86, 0x9964, 0x6A87, 0x9965, 0x6A88, 0x9966, 0x6A89, + 0x9967, 0x6A8A, 0x9968, 0x6A8B, 0x9969, 0x6A8C, 0x996A, 0x6A8D, + 0x996B, 0x6A8F, 0x996C, 0x6A92, 0x996D, 0x6A93, 0x996E, 0x6A94, + 0x996F, 0x6A95, 0x9970, 0x6A96, 0x9971, 0x6A98, 0x9972, 0x6A99, + 0x9973, 0x6A9A, 0x9974, 0x6A9B, 0x9975, 0x6A9C, 0x9976, 0x6A9D, + 0x9977, 0x6A9E, 0x9978, 0x6A9F, 0x9979, 0x6AA1, 0x997A, 0x6AA2, + 0x997B, 0x6AA3, 0x997C, 0x6AA4, 0x997D, 0x6AA5, 0x997E, 0x6AA6, + 0x9980, 0x6AA7, 0x9981, 0x6AA8, 0x9982, 0x6AAA, 0x9983, 0x6AAD, + 0x9984, 0x6AAE, 0x9985, 0x6AAF, 0x9986, 0x6AB0, 0x9987, 0x6AB1, + 0x9988, 0x6AB2, 0x9989, 0x6AB3, 0x998A, 0x6AB4, 0x998B, 0x6AB5, + 0x998C, 0x6AB6, 0x998D, 0x6AB7, 0x998E, 0x6AB8, 0x998F, 0x6AB9, + 0x9990, 0x6ABA, 0x9991, 0x6ABB, 0x9992, 0x6ABC, 0x9993, 0x6ABD, + 0x9994, 0x6ABE, 0x9995, 0x6ABF, 0x9996, 0x6AC0, 0x9997, 0x6AC1, + 0x9998, 0x6AC2, 0x9999, 0x6AC3, 0x999A, 0x6AC4, 0x999B, 0x6AC5, + 0x999C, 0x6AC6, 0x999D, 0x6AC7, 0x999E, 0x6AC8, 0x999F, 0x6AC9, + 0x99A0, 0x6ACA, 0x99A1, 0x6ACB, 0x99A2, 0x6ACC, 0x99A3, 0x6ACD, + 0x99A4, 0x6ACE, 0x99A5, 0x6ACF, 0x99A6, 0x6AD0, 0x99A7, 0x6AD1, + 0x99A8, 0x6AD2, 0x99A9, 0x6AD3, 0x99AA, 0x6AD4, 0x99AB, 0x6AD5, + 0x99AC, 0x6AD6, 0x99AD, 0x6AD7, 0x99AE, 0x6AD8, 0x99AF, 0x6AD9, + 0x99B0, 0x6ADA, 0x99B1, 0x6ADB, 0x99B2, 0x6ADC, 0x99B3, 0x6ADD, + 0x99B4, 0x6ADE, 0x99B5, 0x6ADF, 0x99B6, 0x6AE0, 0x99B7, 0x6AE1, + 0x99B8, 0x6AE2, 0x99B9, 0x6AE3, 0x99BA, 0x6AE4, 0x99BB, 0x6AE5, + 0x99BC, 0x6AE6, 0x99BD, 0x6AE7, 0x99BE, 0x6AE8, 0x99BF, 0x6AE9, + 0x99C0, 0x6AEA, 0x99C1, 0x6AEB, 0x99C2, 0x6AEC, 0x99C3, 0x6AED, + 0x99C4, 0x6AEE, 0x99C5, 0x6AEF, 0x99C6, 0x6AF0, 0x99C7, 0x6AF1, + 0x99C8, 0x6AF2, 0x99C9, 0x6AF3, 0x99CA, 0x6AF4, 0x99CB, 0x6AF5, + 0x99CC, 0x6AF6, 0x99CD, 0x6AF7, 0x99CE, 0x6AF8, 0x99CF, 0x6AF9, + 0x99D0, 0x6AFA, 0x99D1, 0x6AFB, 0x99D2, 0x6AFC, 0x99D3, 0x6AFD, + 0x99D4, 0x6AFE, 0x99D5, 0x6AFF, 0x99D6, 0x6B00, 0x99D7, 0x6B01, + 0x99D8, 0x6B02, 0x99D9, 0x6B03, 0x99DA, 0x6B04, 0x99DB, 0x6B05, + 0x99DC, 0x6B06, 0x99DD, 0x6B07, 0x99DE, 0x6B08, 0x99DF, 0x6B09, + 0x99E0, 0x6B0A, 0x99E1, 0x6B0B, 0x99E2, 0x6B0C, 0x99E3, 0x6B0D, + 0x99E4, 0x6B0E, 0x99E5, 0x6B0F, 0x99E6, 0x6B10, 0x99E7, 0x6B11, + 0x99E8, 0x6B12, 0x99E9, 0x6B13, 0x99EA, 0x6B14, 0x99EB, 0x6B15, + 0x99EC, 0x6B16, 0x99ED, 0x6B17, 0x99EE, 0x6B18, 0x99EF, 0x6B19, + 0x99F0, 0x6B1A, 0x99F1, 0x6B1B, 0x99F2, 0x6B1C, 0x99F3, 0x6B1D, + 0x99F4, 0x6B1E, 0x99F5, 0x6B1F, 0x99F6, 0x6B25, 0x99F7, 0x6B26, + 0x99F8, 0x6B28, 0x99F9, 0x6B29, 0x99FA, 0x6B2A, 0x99FB, 0x6B2B, + 0x99FC, 0x6B2C, 0x99FD, 0x6B2D, 0x99FE, 0x6B2E, 0x9A40, 0x6B2F, + 0x9A41, 0x6B30, 0x9A42, 0x6B31, 0x9A43, 0x6B33, 0x9A44, 0x6B34, + 0x9A45, 0x6B35, 0x9A46, 0x6B36, 0x9A47, 0x6B38, 0x9A48, 0x6B3B, + 0x9A49, 0x6B3C, 0x9A4A, 0x6B3D, 0x9A4B, 0x6B3F, 0x9A4C, 0x6B40, + 0x9A4D, 0x6B41, 0x9A4E, 0x6B42, 0x9A4F, 0x6B44, 0x9A50, 0x6B45, + 0x9A51, 0x6B48, 0x9A52, 0x6B4A, 0x9A53, 0x6B4B, 0x9A54, 0x6B4D, + 0x9A55, 0x6B4E, 0x9A56, 0x6B4F, 0x9A57, 0x6B50, 0x9A58, 0x6B51, + 0x9A59, 0x6B52, 0x9A5A, 0x6B53, 0x9A5B, 0x6B54, 0x9A5C, 0x6B55, + 0x9A5D, 0x6B56, 0x9A5E, 0x6B57, 0x9A5F, 0x6B58, 0x9A60, 0x6B5A, + 0x9A61, 0x6B5B, 0x9A62, 0x6B5C, 0x9A63, 0x6B5D, 0x9A64, 0x6B5E, + 0x9A65, 0x6B5F, 0x9A66, 0x6B60, 0x9A67, 0x6B61, 0x9A68, 0x6B68, + 0x9A69, 0x6B69, 0x9A6A, 0x6B6B, 0x9A6B, 0x6B6C, 0x9A6C, 0x6B6D, + 0x9A6D, 0x6B6E, 0x9A6E, 0x6B6F, 0x9A6F, 0x6B70, 0x9A70, 0x6B71, + 0x9A71, 0x6B72, 0x9A72, 0x6B73, 0x9A73, 0x6B74, 0x9A74, 0x6B75, + 0x9A75, 0x6B76, 0x9A76, 0x6B77, 0x9A77, 0x6B78, 0x9A78, 0x6B7A, + 0x9A79, 0x6B7D, 0x9A7A, 0x6B7E, 0x9A7B, 0x6B7F, 0x9A7C, 0x6B80, + 0x9A7D, 0x6B85, 0x9A7E, 0x6B88, 0x9A80, 0x6B8C, 0x9A81, 0x6B8E, + 0x9A82, 0x6B8F, 0x9A83, 0x6B90, 0x9A84, 0x6B91, 0x9A85, 0x6B94, + 0x9A86, 0x6B95, 0x9A87, 0x6B97, 0x9A88, 0x6B98, 0x9A89, 0x6B99, + 0x9A8A, 0x6B9C, 0x9A8B, 0x6B9D, 0x9A8C, 0x6B9E, 0x9A8D, 0x6B9F, + 0x9A8E, 0x6BA0, 0x9A8F, 0x6BA2, 0x9A90, 0x6BA3, 0x9A91, 0x6BA4, + 0x9A92, 0x6BA5, 0x9A93, 0x6BA6, 0x9A94, 0x6BA7, 0x9A95, 0x6BA8, + 0x9A96, 0x6BA9, 0x9A97, 0x6BAB, 0x9A98, 0x6BAC, 0x9A99, 0x6BAD, + 0x9A9A, 0x6BAE, 0x9A9B, 0x6BAF, 0x9A9C, 0x6BB0, 0x9A9D, 0x6BB1, + 0x9A9E, 0x6BB2, 0x9A9F, 0x6BB6, 0x9AA0, 0x6BB8, 0x9AA1, 0x6BB9, + 0x9AA2, 0x6BBA, 0x9AA3, 0x6BBB, 0x9AA4, 0x6BBC, 0x9AA5, 0x6BBD, + 0x9AA6, 0x6BBE, 0x9AA7, 0x6BC0, 0x9AA8, 0x6BC3, 0x9AA9, 0x6BC4, + 0x9AAA, 0x6BC6, 0x9AAB, 0x6BC7, 0x9AAC, 0x6BC8, 0x9AAD, 0x6BC9, + 0x9AAE, 0x6BCA, 0x9AAF, 0x6BCC, 0x9AB0, 0x6BCE, 0x9AB1, 0x6BD0, + 0x9AB2, 0x6BD1, 0x9AB3, 0x6BD8, 0x9AB4, 0x6BDA, 0x9AB5, 0x6BDC, + 0x9AB6, 0x6BDD, 0x9AB7, 0x6BDE, 0x9AB8, 0x6BDF, 0x9AB9, 0x6BE0, + 0x9ABA, 0x6BE2, 0x9ABB, 0x6BE3, 0x9ABC, 0x6BE4, 0x9ABD, 0x6BE5, + 0x9ABE, 0x6BE6, 0x9ABF, 0x6BE7, 0x9AC0, 0x6BE8, 0x9AC1, 0x6BE9, + 0x9AC2, 0x6BEC, 0x9AC3, 0x6BED, 0x9AC4, 0x6BEE, 0x9AC5, 0x6BF0, + 0x9AC6, 0x6BF1, 0x9AC7, 0x6BF2, 0x9AC8, 0x6BF4, 0x9AC9, 0x6BF6, + 0x9ACA, 0x6BF7, 0x9ACB, 0x6BF8, 0x9ACC, 0x6BFA, 0x9ACD, 0x6BFB, + 0x9ACE, 0x6BFC, 0x9ACF, 0x6BFE, 0x9AD0, 0x6BFF, 0x9AD1, 0x6C00, + 0x9AD2, 0x6C01, 0x9AD3, 0x6C02, 0x9AD4, 0x6C03, 0x9AD5, 0x6C04, + 0x9AD6, 0x6C08, 0x9AD7, 0x6C09, 0x9AD8, 0x6C0A, 0x9AD9, 0x6C0B, + 0x9ADA, 0x6C0C, 0x9ADB, 0x6C0E, 0x9ADC, 0x6C12, 0x9ADD, 0x6C17, + 0x9ADE, 0x6C1C, 0x9ADF, 0x6C1D, 0x9AE0, 0x6C1E, 0x9AE1, 0x6C20, + 0x9AE2, 0x6C23, 0x9AE3, 0x6C25, 0x9AE4, 0x6C2B, 0x9AE5, 0x6C2C, + 0x9AE6, 0x6C2D, 0x9AE7, 0x6C31, 0x9AE8, 0x6C33, 0x9AE9, 0x6C36, + 0x9AEA, 0x6C37, 0x9AEB, 0x6C39, 0x9AEC, 0x6C3A, 0x9AED, 0x6C3B, + 0x9AEE, 0x6C3C, 0x9AEF, 0x6C3E, 0x9AF0, 0x6C3F, 0x9AF1, 0x6C43, + 0x9AF2, 0x6C44, 0x9AF3, 0x6C45, 0x9AF4, 0x6C48, 0x9AF5, 0x6C4B, + 0x9AF6, 0x6C4C, 0x9AF7, 0x6C4D, 0x9AF8, 0x6C4E, 0x9AF9, 0x6C4F, + 0x9AFA, 0x6C51, 0x9AFB, 0x6C52, 0x9AFC, 0x6C53, 0x9AFD, 0x6C56, + 0x9AFE, 0x6C58, 0x9B40, 0x6C59, 0x9B41, 0x6C5A, 0x9B42, 0x6C62, + 0x9B43, 0x6C63, 0x9B44, 0x6C65, 0x9B45, 0x6C66, 0x9B46, 0x6C67, + 0x9B47, 0x6C6B, 0x9B48, 0x6C6C, 0x9B49, 0x6C6D, 0x9B4A, 0x6C6E, + 0x9B4B, 0x6C6F, 0x9B4C, 0x6C71, 0x9B4D, 0x6C73, 0x9B4E, 0x6C75, + 0x9B4F, 0x6C77, 0x9B50, 0x6C78, 0x9B51, 0x6C7A, 0x9B52, 0x6C7B, + 0x9B53, 0x6C7C, 0x9B54, 0x6C7F, 0x9B55, 0x6C80, 0x9B56, 0x6C84, + 0x9B57, 0x6C87, 0x9B58, 0x6C8A, 0x9B59, 0x6C8B, 0x9B5A, 0x6C8D, + 0x9B5B, 0x6C8E, 0x9B5C, 0x6C91, 0x9B5D, 0x6C92, 0x9B5E, 0x6C95, + 0x9B5F, 0x6C96, 0x9B60, 0x6C97, 0x9B61, 0x6C98, 0x9B62, 0x6C9A, + 0x9B63, 0x6C9C, 0x9B64, 0x6C9D, 0x9B65, 0x6C9E, 0x9B66, 0x6CA0, + 0x9B67, 0x6CA2, 0x9B68, 0x6CA8, 0x9B69, 0x6CAC, 0x9B6A, 0x6CAF, + 0x9B6B, 0x6CB0, 0x9B6C, 0x6CB4, 0x9B6D, 0x6CB5, 0x9B6E, 0x6CB6, + 0x9B6F, 0x6CB7, 0x9B70, 0x6CBA, 0x9B71, 0x6CC0, 0x9B72, 0x6CC1, + 0x9B73, 0x6CC2, 0x9B74, 0x6CC3, 0x9B75, 0x6CC6, 0x9B76, 0x6CC7, + 0x9B77, 0x6CC8, 0x9B78, 0x6CCB, 0x9B79, 0x6CCD, 0x9B7A, 0x6CCE, + 0x9B7B, 0x6CCF, 0x9B7C, 0x6CD1, 0x9B7D, 0x6CD2, 0x9B7E, 0x6CD8, + 0x9B80, 0x6CD9, 0x9B81, 0x6CDA, 0x9B82, 0x6CDC, 0x9B83, 0x6CDD, + 0x9B84, 0x6CDF, 0x9B85, 0x6CE4, 0x9B86, 0x6CE6, 0x9B87, 0x6CE7, + 0x9B88, 0x6CE9, 0x9B89, 0x6CEC, 0x9B8A, 0x6CED, 0x9B8B, 0x6CF2, + 0x9B8C, 0x6CF4, 0x9B8D, 0x6CF9, 0x9B8E, 0x6CFF, 0x9B8F, 0x6D00, + 0x9B90, 0x6D02, 0x9B91, 0x6D03, 0x9B92, 0x6D05, 0x9B93, 0x6D06, + 0x9B94, 0x6D08, 0x9B95, 0x6D09, 0x9B96, 0x6D0A, 0x9B97, 0x6D0D, + 0x9B98, 0x6D0F, 0x9B99, 0x6D10, 0x9B9A, 0x6D11, 0x9B9B, 0x6D13, + 0x9B9C, 0x6D14, 0x9B9D, 0x6D15, 0x9B9E, 0x6D16, 0x9B9F, 0x6D18, + 0x9BA0, 0x6D1C, 0x9BA1, 0x6D1D, 0x9BA2, 0x6D1F, 0x9BA3, 0x6D20, + 0x9BA4, 0x6D21, 0x9BA5, 0x6D22, 0x9BA6, 0x6D23, 0x9BA7, 0x6D24, + 0x9BA8, 0x6D26, 0x9BA9, 0x6D28, 0x9BAA, 0x6D29, 0x9BAB, 0x6D2C, + 0x9BAC, 0x6D2D, 0x9BAD, 0x6D2F, 0x9BAE, 0x6D30, 0x9BAF, 0x6D34, + 0x9BB0, 0x6D36, 0x9BB1, 0x6D37, 0x9BB2, 0x6D38, 0x9BB3, 0x6D3A, + 0x9BB4, 0x6D3F, 0x9BB5, 0x6D40, 0x9BB6, 0x6D42, 0x9BB7, 0x6D44, + 0x9BB8, 0x6D49, 0x9BB9, 0x6D4C, 0x9BBA, 0x6D50, 0x9BBB, 0x6D55, + 0x9BBC, 0x6D56, 0x9BBD, 0x6D57, 0x9BBE, 0x6D58, 0x9BBF, 0x6D5B, + 0x9BC0, 0x6D5D, 0x9BC1, 0x6D5F, 0x9BC2, 0x6D61, 0x9BC3, 0x6D62, + 0x9BC4, 0x6D64, 0x9BC5, 0x6D65, 0x9BC6, 0x6D67, 0x9BC7, 0x6D68, + 0x9BC8, 0x6D6B, 0x9BC9, 0x6D6C, 0x9BCA, 0x6D6D, 0x9BCB, 0x6D70, + 0x9BCC, 0x6D71, 0x9BCD, 0x6D72, 0x9BCE, 0x6D73, 0x9BCF, 0x6D75, + 0x9BD0, 0x6D76, 0x9BD1, 0x6D79, 0x9BD2, 0x6D7A, 0x9BD3, 0x6D7B, + 0x9BD4, 0x6D7D, 0x9BD5, 0x6D7E, 0x9BD6, 0x6D7F, 0x9BD7, 0x6D80, + 0x9BD8, 0x6D81, 0x9BD9, 0x6D83, 0x9BDA, 0x6D84, 0x9BDB, 0x6D86, + 0x9BDC, 0x6D87, 0x9BDD, 0x6D8A, 0x9BDE, 0x6D8B, 0x9BDF, 0x6D8D, + 0x9BE0, 0x6D8F, 0x9BE1, 0x6D90, 0x9BE2, 0x6D92, 0x9BE3, 0x6D96, + 0x9BE4, 0x6D97, 0x9BE5, 0x6D98, 0x9BE6, 0x6D99, 0x9BE7, 0x6D9A, + 0x9BE8, 0x6D9C, 0x9BE9, 0x6DA2, 0x9BEA, 0x6DA5, 0x9BEB, 0x6DAC, + 0x9BEC, 0x6DAD, 0x9BED, 0x6DB0, 0x9BEE, 0x6DB1, 0x9BEF, 0x6DB3, + 0x9BF0, 0x6DB4, 0x9BF1, 0x6DB6, 0x9BF2, 0x6DB7, 0x9BF3, 0x6DB9, + 0x9BF4, 0x6DBA, 0x9BF5, 0x6DBB, 0x9BF6, 0x6DBC, 0x9BF7, 0x6DBD, + 0x9BF8, 0x6DBE, 0x9BF9, 0x6DC1, 0x9BFA, 0x6DC2, 0x9BFB, 0x6DC3, + 0x9BFC, 0x6DC8, 0x9BFD, 0x6DC9, 0x9BFE, 0x6DCA, 0x9C40, 0x6DCD, + 0x9C41, 0x6DCE, 0x9C42, 0x6DCF, 0x9C43, 0x6DD0, 0x9C44, 0x6DD2, + 0x9C45, 0x6DD3, 0x9C46, 0x6DD4, 0x9C47, 0x6DD5, 0x9C48, 0x6DD7, + 0x9C49, 0x6DDA, 0x9C4A, 0x6DDB, 0x9C4B, 0x6DDC, 0x9C4C, 0x6DDF, + 0x9C4D, 0x6DE2, 0x9C4E, 0x6DE3, 0x9C4F, 0x6DE5, 0x9C50, 0x6DE7, + 0x9C51, 0x6DE8, 0x9C52, 0x6DE9, 0x9C53, 0x6DEA, 0x9C54, 0x6DED, + 0x9C55, 0x6DEF, 0x9C56, 0x6DF0, 0x9C57, 0x6DF2, 0x9C58, 0x6DF4, + 0x9C59, 0x6DF5, 0x9C5A, 0x6DF6, 0x9C5B, 0x6DF8, 0x9C5C, 0x6DFA, + 0x9C5D, 0x6DFD, 0x9C5E, 0x6DFE, 0x9C5F, 0x6DFF, 0x9C60, 0x6E00, + 0x9C61, 0x6E01, 0x9C62, 0x6E02, 0x9C63, 0x6E03, 0x9C64, 0x6E04, + 0x9C65, 0x6E06, 0x9C66, 0x6E07, 0x9C67, 0x6E08, 0x9C68, 0x6E09, + 0x9C69, 0x6E0B, 0x9C6A, 0x6E0F, 0x9C6B, 0x6E12, 0x9C6C, 0x6E13, + 0x9C6D, 0x6E15, 0x9C6E, 0x6E18, 0x9C6F, 0x6E19, 0x9C70, 0x6E1B, + 0x9C71, 0x6E1C, 0x9C72, 0x6E1E, 0x9C73, 0x6E1F, 0x9C74, 0x6E22, + 0x9C75, 0x6E26, 0x9C76, 0x6E27, 0x9C77, 0x6E28, 0x9C78, 0x6E2A, + 0x9C79, 0x6E2C, 0x9C7A, 0x6E2E, 0x9C7B, 0x6E30, 0x9C7C, 0x6E31, + 0x9C7D, 0x6E33, 0x9C7E, 0x6E35, 0x9C80, 0x6E36, 0x9C81, 0x6E37, + 0x9C82, 0x6E39, 0x9C83, 0x6E3B, 0x9C84, 0x6E3C, 0x9C85, 0x6E3D, + 0x9C86, 0x6E3E, 0x9C87, 0x6E3F, 0x9C88, 0x6E40, 0x9C89, 0x6E41, + 0x9C8A, 0x6E42, 0x9C8B, 0x6E45, 0x9C8C, 0x6E46, 0x9C8D, 0x6E47, + 0x9C8E, 0x6E48, 0x9C8F, 0x6E49, 0x9C90, 0x6E4A, 0x9C91, 0x6E4B, + 0x9C92, 0x6E4C, 0x9C93, 0x6E4F, 0x9C94, 0x6E50, 0x9C95, 0x6E51, + 0x9C96, 0x6E52, 0x9C97, 0x6E55, 0x9C98, 0x6E57, 0x9C99, 0x6E59, + 0x9C9A, 0x6E5A, 0x9C9B, 0x6E5C, 0x9C9C, 0x6E5D, 0x9C9D, 0x6E5E, + 0x9C9E, 0x6E60, 0x9C9F, 0x6E61, 0x9CA0, 0x6E62, 0x9CA1, 0x6E63, + 0x9CA2, 0x6E64, 0x9CA3, 0x6E65, 0x9CA4, 0x6E66, 0x9CA5, 0x6E67, + 0x9CA6, 0x6E68, 0x9CA7, 0x6E69, 0x9CA8, 0x6E6A, 0x9CA9, 0x6E6C, + 0x9CAA, 0x6E6D, 0x9CAB, 0x6E6F, 0x9CAC, 0x6E70, 0x9CAD, 0x6E71, + 0x9CAE, 0x6E72, 0x9CAF, 0x6E73, 0x9CB0, 0x6E74, 0x9CB1, 0x6E75, + 0x9CB2, 0x6E76, 0x9CB3, 0x6E77, 0x9CB4, 0x6E78, 0x9CB5, 0x6E79, + 0x9CB6, 0x6E7A, 0x9CB7, 0x6E7B, 0x9CB8, 0x6E7C, 0x9CB9, 0x6E7D, + 0x9CBA, 0x6E80, 0x9CBB, 0x6E81, 0x9CBC, 0x6E82, 0x9CBD, 0x6E84, + 0x9CBE, 0x6E87, 0x9CBF, 0x6E88, 0x9CC0, 0x6E8A, 0x9CC1, 0x6E8B, + 0x9CC2, 0x6E8C, 0x9CC3, 0x6E8D, 0x9CC4, 0x6E8E, 0x9CC5, 0x6E91, + 0x9CC6, 0x6E92, 0x9CC7, 0x6E93, 0x9CC8, 0x6E94, 0x9CC9, 0x6E95, + 0x9CCA, 0x6E96, 0x9CCB, 0x6E97, 0x9CCC, 0x6E99, 0x9CCD, 0x6E9A, + 0x9CCE, 0x6E9B, 0x9CCF, 0x6E9D, 0x9CD0, 0x6E9E, 0x9CD1, 0x6EA0, + 0x9CD2, 0x6EA1, 0x9CD3, 0x6EA3, 0x9CD4, 0x6EA4, 0x9CD5, 0x6EA6, + 0x9CD6, 0x6EA8, 0x9CD7, 0x6EA9, 0x9CD8, 0x6EAB, 0x9CD9, 0x6EAC, + 0x9CDA, 0x6EAD, 0x9CDB, 0x6EAE, 0x9CDC, 0x6EB0, 0x9CDD, 0x6EB3, + 0x9CDE, 0x6EB5, 0x9CDF, 0x6EB8, 0x9CE0, 0x6EB9, 0x9CE1, 0x6EBC, + 0x9CE2, 0x6EBE, 0x9CE3, 0x6EBF, 0x9CE4, 0x6EC0, 0x9CE5, 0x6EC3, + 0x9CE6, 0x6EC4, 0x9CE7, 0x6EC5, 0x9CE8, 0x6EC6, 0x9CE9, 0x6EC8, + 0x9CEA, 0x6EC9, 0x9CEB, 0x6ECA, 0x9CEC, 0x6ECC, 0x9CED, 0x6ECD, + 0x9CEE, 0x6ECE, 0x9CEF, 0x6ED0, 0x9CF0, 0x6ED2, 0x9CF1, 0x6ED6, + 0x9CF2, 0x6ED8, 0x9CF3, 0x6ED9, 0x9CF4, 0x6EDB, 0x9CF5, 0x6EDC, + 0x9CF6, 0x6EDD, 0x9CF7, 0x6EE3, 0x9CF8, 0x6EE7, 0x9CF9, 0x6EEA, + 0x9CFA, 0x6EEB, 0x9CFB, 0x6EEC, 0x9CFC, 0x6EED, 0x9CFD, 0x6EEE, + 0x9CFE, 0x6EEF, 0x9D40, 0x6EF0, 0x9D41, 0x6EF1, 0x9D42, 0x6EF2, + 0x9D43, 0x6EF3, 0x9D44, 0x6EF5, 0x9D45, 0x6EF6, 0x9D46, 0x6EF7, + 0x9D47, 0x6EF8, 0x9D48, 0x6EFA, 0x9D49, 0x6EFB, 0x9D4A, 0x6EFC, + 0x9D4B, 0x6EFD, 0x9D4C, 0x6EFE, 0x9D4D, 0x6EFF, 0x9D4E, 0x6F00, + 0x9D4F, 0x6F01, 0x9D50, 0x6F03, 0x9D51, 0x6F04, 0x9D52, 0x6F05, + 0x9D53, 0x6F07, 0x9D54, 0x6F08, 0x9D55, 0x6F0A, 0x9D56, 0x6F0B, + 0x9D57, 0x6F0C, 0x9D58, 0x6F0D, 0x9D59, 0x6F0E, 0x9D5A, 0x6F10, + 0x9D5B, 0x6F11, 0x9D5C, 0x6F12, 0x9D5D, 0x6F16, 0x9D5E, 0x6F17, + 0x9D5F, 0x6F18, 0x9D60, 0x6F19, 0x9D61, 0x6F1A, 0x9D62, 0x6F1B, + 0x9D63, 0x6F1C, 0x9D64, 0x6F1D, 0x9D65, 0x6F1E, 0x9D66, 0x6F1F, + 0x9D67, 0x6F21, 0x9D68, 0x6F22, 0x9D69, 0x6F23, 0x9D6A, 0x6F25, + 0x9D6B, 0x6F26, 0x9D6C, 0x6F27, 0x9D6D, 0x6F28, 0x9D6E, 0x6F2C, + 0x9D6F, 0x6F2E, 0x9D70, 0x6F30, 0x9D71, 0x6F32, 0x9D72, 0x6F34, + 0x9D73, 0x6F35, 0x9D74, 0x6F37, 0x9D75, 0x6F38, 0x9D76, 0x6F39, + 0x9D77, 0x6F3A, 0x9D78, 0x6F3B, 0x9D79, 0x6F3C, 0x9D7A, 0x6F3D, + 0x9D7B, 0x6F3F, 0x9D7C, 0x6F40, 0x9D7D, 0x6F41, 0x9D7E, 0x6F42, + 0x9D80, 0x6F43, 0x9D81, 0x6F44, 0x9D82, 0x6F45, 0x9D83, 0x6F48, + 0x9D84, 0x6F49, 0x9D85, 0x6F4A, 0x9D86, 0x6F4C, 0x9D87, 0x6F4E, + 0x9D88, 0x6F4F, 0x9D89, 0x6F50, 0x9D8A, 0x6F51, 0x9D8B, 0x6F52, + 0x9D8C, 0x6F53, 0x9D8D, 0x6F54, 0x9D8E, 0x6F55, 0x9D8F, 0x6F56, + 0x9D90, 0x6F57, 0x9D91, 0x6F59, 0x9D92, 0x6F5A, 0x9D93, 0x6F5B, + 0x9D94, 0x6F5D, 0x9D95, 0x6F5F, 0x9D96, 0x6F60, 0x9D97, 0x6F61, + 0x9D98, 0x6F63, 0x9D99, 0x6F64, 0x9D9A, 0x6F65, 0x9D9B, 0x6F67, + 0x9D9C, 0x6F68, 0x9D9D, 0x6F69, 0x9D9E, 0x6F6A, 0x9D9F, 0x6F6B, + 0x9DA0, 0x6F6C, 0x9DA1, 0x6F6F, 0x9DA2, 0x6F70, 0x9DA3, 0x6F71, + 0x9DA4, 0x6F73, 0x9DA5, 0x6F75, 0x9DA6, 0x6F76, 0x9DA7, 0x6F77, + 0x9DA8, 0x6F79, 0x9DA9, 0x6F7B, 0x9DAA, 0x6F7D, 0x9DAB, 0x6F7E, + 0x9DAC, 0x6F7F, 0x9DAD, 0x6F80, 0x9DAE, 0x6F81, 0x9DAF, 0x6F82, + 0x9DB0, 0x6F83, 0x9DB1, 0x6F85, 0x9DB2, 0x6F86, 0x9DB3, 0x6F87, + 0x9DB4, 0x6F8A, 0x9DB5, 0x6F8B, 0x9DB6, 0x6F8F, 0x9DB7, 0x6F90, + 0x9DB8, 0x6F91, 0x9DB9, 0x6F92, 0x9DBA, 0x6F93, 0x9DBB, 0x6F94, + 0x9DBC, 0x6F95, 0x9DBD, 0x6F96, 0x9DBE, 0x6F97, 0x9DBF, 0x6F98, + 0x9DC0, 0x6F99, 0x9DC1, 0x6F9A, 0x9DC2, 0x6F9B, 0x9DC3, 0x6F9D, + 0x9DC4, 0x6F9E, 0x9DC5, 0x6F9F, 0x9DC6, 0x6FA0, 0x9DC7, 0x6FA2, + 0x9DC8, 0x6FA3, 0x9DC9, 0x6FA4, 0x9DCA, 0x6FA5, 0x9DCB, 0x6FA6, + 0x9DCC, 0x6FA8, 0x9DCD, 0x6FA9, 0x9DCE, 0x6FAA, 0x9DCF, 0x6FAB, + 0x9DD0, 0x6FAC, 0x9DD1, 0x6FAD, 0x9DD2, 0x6FAE, 0x9DD3, 0x6FAF, + 0x9DD4, 0x6FB0, 0x9DD5, 0x6FB1, 0x9DD6, 0x6FB2, 0x9DD7, 0x6FB4, + 0x9DD8, 0x6FB5, 0x9DD9, 0x6FB7, 0x9DDA, 0x6FB8, 0x9DDB, 0x6FBA, + 0x9DDC, 0x6FBB, 0x9DDD, 0x6FBC, 0x9DDE, 0x6FBD, 0x9DDF, 0x6FBE, + 0x9DE0, 0x6FBF, 0x9DE1, 0x6FC1, 0x9DE2, 0x6FC3, 0x9DE3, 0x6FC4, + 0x9DE4, 0x6FC5, 0x9DE5, 0x6FC6, 0x9DE6, 0x6FC7, 0x9DE7, 0x6FC8, + 0x9DE8, 0x6FCA, 0x9DE9, 0x6FCB, 0x9DEA, 0x6FCC, 0x9DEB, 0x6FCD, + 0x9DEC, 0x6FCE, 0x9DED, 0x6FCF, 0x9DEE, 0x6FD0, 0x9DEF, 0x6FD3, + 0x9DF0, 0x6FD4, 0x9DF1, 0x6FD5, 0x9DF2, 0x6FD6, 0x9DF3, 0x6FD7, + 0x9DF4, 0x6FD8, 0x9DF5, 0x6FD9, 0x9DF6, 0x6FDA, 0x9DF7, 0x6FDB, + 0x9DF8, 0x6FDC, 0x9DF9, 0x6FDD, 0x9DFA, 0x6FDF, 0x9DFB, 0x6FE2, + 0x9DFC, 0x6FE3, 0x9DFD, 0x6FE4, 0x9DFE, 0x6FE5, 0x9E40, 0x6FE6, + 0x9E41, 0x6FE7, 0x9E42, 0x6FE8, 0x9E43, 0x6FE9, 0x9E44, 0x6FEA, + 0x9E45, 0x6FEB, 0x9E46, 0x6FEC, 0x9E47, 0x6FED, 0x9E48, 0x6FF0, + 0x9E49, 0x6FF1, 0x9E4A, 0x6FF2, 0x9E4B, 0x6FF3, 0x9E4C, 0x6FF4, + 0x9E4D, 0x6FF5, 0x9E4E, 0x6FF6, 0x9E4F, 0x6FF7, 0x9E50, 0x6FF8, + 0x9E51, 0x6FF9, 0x9E52, 0x6FFA, 0x9E53, 0x6FFB, 0x9E54, 0x6FFC, + 0x9E55, 0x6FFD, 0x9E56, 0x6FFE, 0x9E57, 0x6FFF, 0x9E58, 0x7000, + 0x9E59, 0x7001, 0x9E5A, 0x7002, 0x9E5B, 0x7003, 0x9E5C, 0x7004, + 0x9E5D, 0x7005, 0x9E5E, 0x7006, 0x9E5F, 0x7007, 0x9E60, 0x7008, + 0x9E61, 0x7009, 0x9E62, 0x700A, 0x9E63, 0x700B, 0x9E64, 0x700C, + 0x9E65, 0x700D, 0x9E66, 0x700E, 0x9E67, 0x700F, 0x9E68, 0x7010, + 0x9E69, 0x7012, 0x9E6A, 0x7013, 0x9E6B, 0x7014, 0x9E6C, 0x7015, + 0x9E6D, 0x7016, 0x9E6E, 0x7017, 0x9E6F, 0x7018, 0x9E70, 0x7019, + 0x9E71, 0x701C, 0x9E72, 0x701D, 0x9E73, 0x701E, 0x9E74, 0x701F, + 0x9E75, 0x7020, 0x9E76, 0x7021, 0x9E77, 0x7022, 0x9E78, 0x7024, + 0x9E79, 0x7025, 0x9E7A, 0x7026, 0x9E7B, 0x7027, 0x9E7C, 0x7028, + 0x9E7D, 0x7029, 0x9E7E, 0x702A, 0x9E80, 0x702B, 0x9E81, 0x702C, + 0x9E82, 0x702D, 0x9E83, 0x702E, 0x9E84, 0x702F, 0x9E85, 0x7030, + 0x9E86, 0x7031, 0x9E87, 0x7032, 0x9E88, 0x7033, 0x9E89, 0x7034, + 0x9E8A, 0x7036, 0x9E8B, 0x7037, 0x9E8C, 0x7038, 0x9E8D, 0x703A, + 0x9E8E, 0x703B, 0x9E8F, 0x703C, 0x9E90, 0x703D, 0x9E91, 0x703E, + 0x9E92, 0x703F, 0x9E93, 0x7040, 0x9E94, 0x7041, 0x9E95, 0x7042, + 0x9E96, 0x7043, 0x9E97, 0x7044, 0x9E98, 0x7045, 0x9E99, 0x7046, + 0x9E9A, 0x7047, 0x9E9B, 0x7048, 0x9E9C, 0x7049, 0x9E9D, 0x704A, + 0x9E9E, 0x704B, 0x9E9F, 0x704D, 0x9EA0, 0x704E, 0x9EA1, 0x7050, + 0x9EA2, 0x7051, 0x9EA3, 0x7052, 0x9EA4, 0x7053, 0x9EA5, 0x7054, + 0x9EA6, 0x7055, 0x9EA7, 0x7056, 0x9EA8, 0x7057, 0x9EA9, 0x7058, + 0x9EAA, 0x7059, 0x9EAB, 0x705A, 0x9EAC, 0x705B, 0x9EAD, 0x705C, + 0x9EAE, 0x705D, 0x9EAF, 0x705F, 0x9EB0, 0x7060, 0x9EB1, 0x7061, + 0x9EB2, 0x7062, 0x9EB3, 0x7063, 0x9EB4, 0x7064, 0x9EB5, 0x7065, + 0x9EB6, 0x7066, 0x9EB7, 0x7067, 0x9EB8, 0x7068, 0x9EB9, 0x7069, + 0x9EBA, 0x706A, 0x9EBB, 0x706E, 0x9EBC, 0x7071, 0x9EBD, 0x7072, + 0x9EBE, 0x7073, 0x9EBF, 0x7074, 0x9EC0, 0x7077, 0x9EC1, 0x7079, + 0x9EC2, 0x707A, 0x9EC3, 0x707B, 0x9EC4, 0x707D, 0x9EC5, 0x7081, + 0x9EC6, 0x7082, 0x9EC7, 0x7083, 0x9EC8, 0x7084, 0x9EC9, 0x7086, + 0x9ECA, 0x7087, 0x9ECB, 0x7088, 0x9ECC, 0x708B, 0x9ECD, 0x708C, + 0x9ECE, 0x708D, 0x9ECF, 0x708F, 0x9ED0, 0x7090, 0x9ED1, 0x7091, + 0x9ED2, 0x7093, 0x9ED3, 0x7097, 0x9ED4, 0x7098, 0x9ED5, 0x709A, + 0x9ED6, 0x709B, 0x9ED7, 0x709E, 0x9ED8, 0x709F, 0x9ED9, 0x70A0, + 0x9EDA, 0x70A1, 0x9EDB, 0x70A2, 0x9EDC, 0x70A3, 0x9EDD, 0x70A4, + 0x9EDE, 0x70A5, 0x9EDF, 0x70A6, 0x9EE0, 0x70A7, 0x9EE1, 0x70A8, + 0x9EE2, 0x70A9, 0x9EE3, 0x70AA, 0x9EE4, 0x70B0, 0x9EE5, 0x70B2, + 0x9EE6, 0x70B4, 0x9EE7, 0x70B5, 0x9EE8, 0x70B6, 0x9EE9, 0x70BA, + 0x9EEA, 0x70BE, 0x9EEB, 0x70BF, 0x9EEC, 0x70C4, 0x9EED, 0x70C5, + 0x9EEE, 0x70C6, 0x9EEF, 0x70C7, 0x9EF0, 0x70C9, 0x9EF1, 0x70CB, + 0x9EF2, 0x70CC, 0x9EF3, 0x70CD, 0x9EF4, 0x70CE, 0x9EF5, 0x70CF, + 0x9EF6, 0x70D0, 0x9EF7, 0x70D1, 0x9EF8, 0x70D2, 0x9EF9, 0x70D3, + 0x9EFA, 0x70D4, 0x9EFB, 0x70D5, 0x9EFC, 0x70D6, 0x9EFD, 0x70D7, + 0x9EFE, 0x70DA, 0x9F40, 0x70DC, 0x9F41, 0x70DD, 0x9F42, 0x70DE, + 0x9F43, 0x70E0, 0x9F44, 0x70E1, 0x9F45, 0x70E2, 0x9F46, 0x70E3, + 0x9F47, 0x70E5, 0x9F48, 0x70EA, 0x9F49, 0x70EE, 0x9F4A, 0x70F0, + 0x9F4B, 0x70F1, 0x9F4C, 0x70F2, 0x9F4D, 0x70F3, 0x9F4E, 0x70F4, + 0x9F4F, 0x70F5, 0x9F50, 0x70F6, 0x9F51, 0x70F8, 0x9F52, 0x70FA, + 0x9F53, 0x70FB, 0x9F54, 0x70FC, 0x9F55, 0x70FE, 0x9F56, 0x70FF, + 0x9F57, 0x7100, 0x9F58, 0x7101, 0x9F59, 0x7102, 0x9F5A, 0x7103, + 0x9F5B, 0x7104, 0x9F5C, 0x7105, 0x9F5D, 0x7106, 0x9F5E, 0x7107, + 0x9F5F, 0x7108, 0x9F60, 0x710B, 0x9F61, 0x710C, 0x9F62, 0x710D, + 0x9F63, 0x710E, 0x9F64, 0x710F, 0x9F65, 0x7111, 0x9F66, 0x7112, + 0x9F67, 0x7114, 0x9F68, 0x7117, 0x9F69, 0x711B, 0x9F6A, 0x711C, + 0x9F6B, 0x711D, 0x9F6C, 0x711E, 0x9F6D, 0x711F, 0x9F6E, 0x7120, + 0x9F6F, 0x7121, 0x9F70, 0x7122, 0x9F71, 0x7123, 0x9F72, 0x7124, + 0x9F73, 0x7125, 0x9F74, 0x7127, 0x9F75, 0x7128, 0x9F76, 0x7129, + 0x9F77, 0x712A, 0x9F78, 0x712B, 0x9F79, 0x712C, 0x9F7A, 0x712D, + 0x9F7B, 0x712E, 0x9F7C, 0x7132, 0x9F7D, 0x7133, 0x9F7E, 0x7134, + 0x9F80, 0x7135, 0x9F81, 0x7137, 0x9F82, 0x7138, 0x9F83, 0x7139, + 0x9F84, 0x713A, 0x9F85, 0x713B, 0x9F86, 0x713C, 0x9F87, 0x713D, + 0x9F88, 0x713E, 0x9F89, 0x713F, 0x9F8A, 0x7140, 0x9F8B, 0x7141, + 0x9F8C, 0x7142, 0x9F8D, 0x7143, 0x9F8E, 0x7144, 0x9F8F, 0x7146, + 0x9F90, 0x7147, 0x9F91, 0x7148, 0x9F92, 0x7149, 0x9F93, 0x714B, + 0x9F94, 0x714D, 0x9F95, 0x714F, 0x9F96, 0x7150, 0x9F97, 0x7151, + 0x9F98, 0x7152, 0x9F99, 0x7153, 0x9F9A, 0x7154, 0x9F9B, 0x7155, + 0x9F9C, 0x7156, 0x9F9D, 0x7157, 0x9F9E, 0x7158, 0x9F9F, 0x7159, + 0x9FA0, 0x715A, 0x9FA1, 0x715B, 0x9FA2, 0x715D, 0x9FA3, 0x715F, + 0x9FA4, 0x7160, 0x9FA5, 0x7161, 0x9FA6, 0x7162, 0x9FA7, 0x7163, + 0x9FA8, 0x7165, 0x9FA9, 0x7169, 0x9FAA, 0x716A, 0x9FAB, 0x716B, + 0x9FAC, 0x716C, 0x9FAD, 0x716D, 0x9FAE, 0x716F, 0x9FAF, 0x7170, + 0x9FB0, 0x7171, 0x9FB1, 0x7174, 0x9FB2, 0x7175, 0x9FB3, 0x7176, + 0x9FB4, 0x7177, 0x9FB5, 0x7179, 0x9FB6, 0x717B, 0x9FB7, 0x717C, + 0x9FB8, 0x717E, 0x9FB9, 0x717F, 0x9FBA, 0x7180, 0x9FBB, 0x7181, + 0x9FBC, 0x7182, 0x9FBD, 0x7183, 0x9FBE, 0x7185, 0x9FBF, 0x7186, + 0x9FC0, 0x7187, 0x9FC1, 0x7188, 0x9FC2, 0x7189, 0x9FC3, 0x718B, + 0x9FC4, 0x718C, 0x9FC5, 0x718D, 0x9FC6, 0x718E, 0x9FC7, 0x7190, + 0x9FC8, 0x7191, 0x9FC9, 0x7192, 0x9FCA, 0x7193, 0x9FCB, 0x7195, + 0x9FCC, 0x7196, 0x9FCD, 0x7197, 0x9FCE, 0x719A, 0x9FCF, 0x719B, + 0x9FD0, 0x719C, 0x9FD1, 0x719D, 0x9FD2, 0x719E, 0x9FD3, 0x71A1, + 0x9FD4, 0x71A2, 0x9FD5, 0x71A3, 0x9FD6, 0x71A4, 0x9FD7, 0x71A5, + 0x9FD8, 0x71A6, 0x9FD9, 0x71A7, 0x9FDA, 0x71A9, 0x9FDB, 0x71AA, + 0x9FDC, 0x71AB, 0x9FDD, 0x71AD, 0x9FDE, 0x71AE, 0x9FDF, 0x71AF, + 0x9FE0, 0x71B0, 0x9FE1, 0x71B1, 0x9FE2, 0x71B2, 0x9FE3, 0x71B4, + 0x9FE4, 0x71B6, 0x9FE5, 0x71B7, 0x9FE6, 0x71B8, 0x9FE7, 0x71BA, + 0x9FE8, 0x71BB, 0x9FE9, 0x71BC, 0x9FEA, 0x71BD, 0x9FEB, 0x71BE, + 0x9FEC, 0x71BF, 0x9FED, 0x71C0, 0x9FEE, 0x71C1, 0x9FEF, 0x71C2, + 0x9FF0, 0x71C4, 0x9FF1, 0x71C5, 0x9FF2, 0x71C6, 0x9FF3, 0x71C7, + 0x9FF4, 0x71C8, 0x9FF5, 0x71C9, 0x9FF6, 0x71CA, 0x9FF7, 0x71CB, + 0x9FF8, 0x71CC, 0x9FF9, 0x71CD, 0x9FFA, 0x71CF, 0x9FFB, 0x71D0, + 0x9FFC, 0x71D1, 0x9FFD, 0x71D2, 0x9FFE, 0x71D3, 0xA040, 0x71D6, + 0xA041, 0x71D7, 0xA042, 0x71D8, 0xA043, 0x71D9, 0xA044, 0x71DA, + 0xA045, 0x71DB, 0xA046, 0x71DC, 0xA047, 0x71DD, 0xA048, 0x71DE, + 0xA049, 0x71DF, 0xA04A, 0x71E1, 0xA04B, 0x71E2, 0xA04C, 0x71E3, + 0xA04D, 0x71E4, 0xA04E, 0x71E6, 0xA04F, 0x71E8, 0xA050, 0x71E9, + 0xA051, 0x71EA, 0xA052, 0x71EB, 0xA053, 0x71EC, 0xA054, 0x71ED, + 0xA055, 0x71EF, 0xA056, 0x71F0, 0xA057, 0x71F1, 0xA058, 0x71F2, + 0xA059, 0x71F3, 0xA05A, 0x71F4, 0xA05B, 0x71F5, 0xA05C, 0x71F6, + 0xA05D, 0x71F7, 0xA05E, 0x71F8, 0xA05F, 0x71FA, 0xA060, 0x71FB, + 0xA061, 0x71FC, 0xA062, 0x71FD, 0xA063, 0x71FE, 0xA064, 0x71FF, + 0xA065, 0x7200, 0xA066, 0x7201, 0xA067, 0x7202, 0xA068, 0x7203, + 0xA069, 0x7204, 0xA06A, 0x7205, 0xA06B, 0x7207, 0xA06C, 0x7208, + 0xA06D, 0x7209, 0xA06E, 0x720A, 0xA06F, 0x720B, 0xA070, 0x720C, + 0xA071, 0x720D, 0xA072, 0x720E, 0xA073, 0x720F, 0xA074, 0x7210, + 0xA075, 0x7211, 0xA076, 0x7212, 0xA077, 0x7213, 0xA078, 0x7214, + 0xA079, 0x7215, 0xA07A, 0x7216, 0xA07B, 0x7217, 0xA07C, 0x7218, + 0xA07D, 0x7219, 0xA07E, 0x721A, 0xA080, 0x721B, 0xA081, 0x721C, + 0xA082, 0x721E, 0xA083, 0x721F, 0xA084, 0x7220, 0xA085, 0x7221, + 0xA086, 0x7222, 0xA087, 0x7223, 0xA088, 0x7224, 0xA089, 0x7225, + 0xA08A, 0x7226, 0xA08B, 0x7227, 0xA08C, 0x7229, 0xA08D, 0x722B, + 0xA08E, 0x722D, 0xA08F, 0x722E, 0xA090, 0x722F, 0xA091, 0x7232, + 0xA092, 0x7233, 0xA093, 0x7234, 0xA094, 0x723A, 0xA095, 0x723C, + 0xA096, 0x723E, 0xA097, 0x7240, 0xA098, 0x7241, 0xA099, 0x7242, + 0xA09A, 0x7243, 0xA09B, 0x7244, 0xA09C, 0x7245, 0xA09D, 0x7246, + 0xA09E, 0x7249, 0xA09F, 0x724A, 0xA0A0, 0x724B, 0xA0A1, 0x724E, + 0xA0A2, 0x724F, 0xA0A3, 0x7250, 0xA0A4, 0x7251, 0xA0A5, 0x7253, + 0xA0A6, 0x7254, 0xA0A7, 0x7255, 0xA0A8, 0x7257, 0xA0A9, 0x7258, + 0xA0AA, 0x725A, 0xA0AB, 0x725C, 0xA0AC, 0x725E, 0xA0AD, 0x7260, + 0xA0AE, 0x7263, 0xA0AF, 0x7264, 0xA0B0, 0x7265, 0xA0B1, 0x7268, + 0xA0B2, 0x726A, 0xA0B3, 0x726B, 0xA0B4, 0x726C, 0xA0B5, 0x726D, + 0xA0B6, 0x7270, 0xA0B7, 0x7271, 0xA0B8, 0x7273, 0xA0B9, 0x7274, + 0xA0BA, 0x7276, 0xA0BB, 0x7277, 0xA0BC, 0x7278, 0xA0BD, 0x727B, + 0xA0BE, 0x727C, 0xA0BF, 0x727D, 0xA0C0, 0x7282, 0xA0C1, 0x7283, + 0xA0C2, 0x7285, 0xA0C3, 0x7286, 0xA0C4, 0x7287, 0xA0C5, 0x7288, + 0xA0C6, 0x7289, 0xA0C7, 0x728C, 0xA0C8, 0x728E, 0xA0C9, 0x7290, + 0xA0CA, 0x7291, 0xA0CB, 0x7293, 0xA0CC, 0x7294, 0xA0CD, 0x7295, + 0xA0CE, 0x7296, 0xA0CF, 0x7297, 0xA0D0, 0x7298, 0xA0D1, 0x7299, + 0xA0D2, 0x729A, 0xA0D3, 0x729B, 0xA0D4, 0x729C, 0xA0D5, 0x729D, + 0xA0D6, 0x729E, 0xA0D7, 0x72A0, 0xA0D8, 0x72A1, 0xA0D9, 0x72A2, + 0xA0DA, 0x72A3, 0xA0DB, 0x72A4, 0xA0DC, 0x72A5, 0xA0DD, 0x72A6, + 0xA0DE, 0x72A7, 0xA0DF, 0x72A8, 0xA0E0, 0x72A9, 0xA0E1, 0x72AA, + 0xA0E2, 0x72AB, 0xA0E3, 0x72AE, 0xA0E4, 0x72B1, 0xA0E5, 0x72B2, + 0xA0E6, 0x72B3, 0xA0E7, 0x72B5, 0xA0E8, 0x72BA, 0xA0E9, 0x72BB, + 0xA0EA, 0x72BC, 0xA0EB, 0x72BD, 0xA0EC, 0x72BE, 0xA0ED, 0x72BF, + 0xA0EE, 0x72C0, 0xA0EF, 0x72C5, 0xA0F0, 0x72C6, 0xA0F1, 0x72C7, + 0xA0F2, 0x72C9, 0xA0F3, 0x72CA, 0xA0F4, 0x72CB, 0xA0F5, 0x72CC, + 0xA0F6, 0x72CF, 0xA0F7, 0x72D1, 0xA0F8, 0x72D3, 0xA0F9, 0x72D4, + 0xA0FA, 0x72D5, 0xA0FB, 0x72D6, 0xA0FC, 0x72D8, 0xA0FD, 0x72DA, + 0xA0FE, 0x72DB, 0xA1A1, 0x3000, 0xA1A2, 0x3001, 0xA1A3, 0x3002, + 0xA1A4, 0x00B7, 0xA1A5, 0x02C9, 0xA1A6, 0x02C7, 0xA1A7, 0x00A8, + 0xA1A8, 0x3003, 0xA1A9, 0x3005, 0xA1AA, 0x2014, 0xA1AB, 0xFF5E, + 0xA1AC, 0x2016, 0xA1AD, 0x2026, 0xA1AE, 0x2018, 0xA1AF, 0x2019, + 0xA1B0, 0x201C, 0xA1B1, 0x201D, 0xA1B2, 0x3014, 0xA1B3, 0x3015, + 0xA1B4, 0x3008, 0xA1B5, 0x3009, 0xA1B6, 0x300A, 0xA1B7, 0x300B, + 0xA1B8, 0x300C, 0xA1B9, 0x300D, 0xA1BA, 0x300E, 0xA1BB, 0x300F, + 0xA1BC, 0x3016, 0xA1BD, 0x3017, 0xA1BE, 0x3010, 0xA1BF, 0x3011, + 0xA1C0, 0x00B1, 0xA1C1, 0x00D7, 0xA1C2, 0x00F7, 0xA1C3, 0x2236, + 0xA1C4, 0x2227, 0xA1C5, 0x2228, 0xA1C6, 0x2211, 0xA1C7, 0x220F, + 0xA1C8, 0x222A, 0xA1C9, 0x2229, 0xA1CA, 0x2208, 0xA1CB, 0x2237, + 0xA1CC, 0x221A, 0xA1CD, 0x22A5, 0xA1CE, 0x2225, 0xA1CF, 0x2220, + 0xA1D0, 0x2312, 0xA1D1, 0x2299, 0xA1D2, 0x222B, 0xA1D3, 0x222E, + 0xA1D4, 0x2261, 0xA1D5, 0x224C, 0xA1D6, 0x2248, 0xA1D7, 0x223D, + 0xA1D8, 0x221D, 0xA1D9, 0x2260, 0xA1DA, 0x226E, 0xA1DB, 0x226F, + 0xA1DC, 0x2264, 0xA1DD, 0x2265, 0xA1DE, 0x221E, 0xA1DF, 0x2235, + 0xA1E0, 0x2234, 0xA1E1, 0x2642, 0xA1E2, 0x2640, 0xA1E3, 0x00B0, + 0xA1E4, 0x2032, 0xA1E5, 0x2033, 0xA1E6, 0x2103, 0xA1E7, 0xFF04, + 0xA1E8, 0x00A4, 0xA1E9, 0xFFE0, 0xA1EA, 0xFFE1, 0xA1EB, 0x2030, + 0xA1EC, 0x00A7, 0xA1ED, 0x2116, 0xA1EE, 0x2606, 0xA1EF, 0x2605, + 0xA1F0, 0x25CB, 0xA1F1, 0x25CF, 0xA1F2, 0x25CE, 0xA1F3, 0x25C7, + 0xA1F4, 0x25C6, 0xA1F5, 0x25A1, 0xA1F6, 0x25A0, 0xA1F7, 0x25B3, + 0xA1F8, 0x25B2, 0xA1F9, 0x203B, 0xA1FA, 0x2192, 0xA1FB, 0x2190, + 0xA1FC, 0x2191, 0xA1FD, 0x2193, 0xA1FE, 0x3013, 0xA2A1, 0x2170, + 0xA2A2, 0x2171, 0xA2A3, 0x2172, 0xA2A4, 0x2173, 0xA2A5, 0x2174, + 0xA2A6, 0x2175, 0xA2A7, 0x2176, 0xA2A8, 0x2177, 0xA2A9, 0x2178, + 0xA2AA, 0x2179, 0xA2B1, 0x2488, 0xA2B2, 0x2489, 0xA2B3, 0x248A, + 0xA2B4, 0x248B, 0xA2B5, 0x248C, 0xA2B6, 0x248D, 0xA2B7, 0x248E, + 0xA2B8, 0x248F, 0xA2B9, 0x2490, 0xA2BA, 0x2491, 0xA2BB, 0x2492, + 0xA2BC, 0x2493, 0xA2BD, 0x2494, 0xA2BE, 0x2495, 0xA2BF, 0x2496, + 0xA2C0, 0x2497, 0xA2C1, 0x2498, 0xA2C2, 0x2499, 0xA2C3, 0x249A, + 0xA2C4, 0x249B, 0xA2C5, 0x2474, 0xA2C6, 0x2475, 0xA2C7, 0x2476, + 0xA2C8, 0x2477, 0xA2C9, 0x2478, 0xA2CA, 0x2479, 0xA2CB, 0x247A, + 0xA2CC, 0x247B, 0xA2CD, 0x247C, 0xA2CE, 0x247D, 0xA2CF, 0x247E, + 0xA2D0, 0x247F, 0xA2D1, 0x2480, 0xA2D2, 0x2481, 0xA2D3, 0x2482, + 0xA2D4, 0x2483, 0xA2D5, 0x2484, 0xA2D6, 0x2485, 0xA2D7, 0x2486, + 0xA2D8, 0x2487, 0xA2D9, 0x2460, 0xA2DA, 0x2461, 0xA2DB, 0x2462, + 0xA2DC, 0x2463, 0xA2DD, 0x2464, 0xA2DE, 0x2465, 0xA2DF, 0x2466, + 0xA2E0, 0x2467, 0xA2E1, 0x2468, 0xA2E2, 0x2469, 0xA2E5, 0x3220, + 0xA2E6, 0x3221, 0xA2E7, 0x3222, 0xA2E8, 0x3223, 0xA2E9, 0x3224, + 0xA2EA, 0x3225, 0xA2EB, 0x3226, 0xA2EC, 0x3227, 0xA2ED, 0x3228, + 0xA2EE, 0x3229, 0xA2F1, 0x2160, 0xA2F2, 0x2161, 0xA2F3, 0x2162, + 0xA2F4, 0x2163, 0xA2F5, 0x2164, 0xA2F6, 0x2165, 0xA2F7, 0x2166, + 0xA2F8, 0x2167, 0xA2F9, 0x2168, 0xA2FA, 0x2169, 0xA2FB, 0x216A, + 0xA2FC, 0x216B, 0xA3A1, 0xFF01, 0xA3A2, 0xFF02, 0xA3A3, 0xFF03, + 0xA3A4, 0xFFE5, 0xA3A5, 0xFF05, 0xA3A6, 0xFF06, 0xA3A7, 0xFF07, + 0xA3A8, 0xFF08, 0xA3A9, 0xFF09, 0xA3AA, 0xFF0A, 0xA3AB, 0xFF0B, + 0xA3AC, 0xFF0C, 0xA3AD, 0xFF0D, 0xA3AE, 0xFF0E, 0xA3AF, 0xFF0F, + 0xA3B0, 0xFF10, 0xA3B1, 0xFF11, 0xA3B2, 0xFF12, 0xA3B3, 0xFF13, + 0xA3B4, 0xFF14, 0xA3B5, 0xFF15, 0xA3B6, 0xFF16, 0xA3B7, 0xFF17, + 0xA3B8, 0xFF18, 0xA3B9, 0xFF19, 0xA3BA, 0xFF1A, 0xA3BB, 0xFF1B, + 0xA3BC, 0xFF1C, 0xA3BD, 0xFF1D, 0xA3BE, 0xFF1E, 0xA3BF, 0xFF1F, + 0xA3C0, 0xFF20, 0xA3C1, 0xFF21, 0xA3C2, 0xFF22, 0xA3C3, 0xFF23, + 0xA3C4, 0xFF24, 0xA3C5, 0xFF25, 0xA3C6, 0xFF26, 0xA3C7, 0xFF27, + 0xA3C8, 0xFF28, 0xA3C9, 0xFF29, 0xA3CA, 0xFF2A, 0xA3CB, 0xFF2B, + 0xA3CC, 0xFF2C, 0xA3CD, 0xFF2D, 0xA3CE, 0xFF2E, 0xA3CF, 0xFF2F, + 0xA3D0, 0xFF30, 0xA3D1, 0xFF31, 0xA3D2, 0xFF32, 0xA3D3, 0xFF33, + 0xA3D4, 0xFF34, 0xA3D5, 0xFF35, 0xA3D6, 0xFF36, 0xA3D7, 0xFF37, + 0xA3D8, 0xFF38, 0xA3D9, 0xFF39, 0xA3DA, 0xFF3A, 0xA3DB, 0xFF3B, + 0xA3DC, 0xFF3C, 0xA3DD, 0xFF3D, 0xA3DE, 0xFF3E, 0xA3DF, 0xFF3F, + 0xA3E0, 0xFF40, 0xA3E1, 0xFF41, 0xA3E2, 0xFF42, 0xA3E3, 0xFF43, + 0xA3E4, 0xFF44, 0xA3E5, 0xFF45, 0xA3E6, 0xFF46, 0xA3E7, 0xFF47, + 0xA3E8, 0xFF48, 0xA3E9, 0xFF49, 0xA3EA, 0xFF4A, 0xA3EB, 0xFF4B, + 0xA3EC, 0xFF4C, 0xA3ED, 0xFF4D, 0xA3EE, 0xFF4E, 0xA3EF, 0xFF4F, + 0xA3F0, 0xFF50, 0xA3F1, 0xFF51, 0xA3F2, 0xFF52, 0xA3F3, 0xFF53, + 0xA3F4, 0xFF54, 0xA3F5, 0xFF55, 0xA3F6, 0xFF56, 0xA3F7, 0xFF57, + 0xA3F8, 0xFF58, 0xA3F9, 0xFF59, 0xA3FA, 0xFF5A, 0xA3FB, 0xFF5B, + 0xA3FC, 0xFF5C, 0xA3FD, 0xFF5D, 0xA3FE, 0xFFE3, 0xA4A1, 0x3041, + 0xA4A2, 0x3042, 0xA4A3, 0x3043, 0xA4A4, 0x3044, 0xA4A5, 0x3045, + 0xA4A6, 0x3046, 0xA4A7, 0x3047, 0xA4A8, 0x3048, 0xA4A9, 0x3049, + 0xA4AA, 0x304A, 0xA4AB, 0x304B, 0xA4AC, 0x304C, 0xA4AD, 0x304D, + 0xA4AE, 0x304E, 0xA4AF, 0x304F, 0xA4B0, 0x3050, 0xA4B1, 0x3051, + 0xA4B2, 0x3052, 0xA4B3, 0x3053, 0xA4B4, 0x3054, 0xA4B5, 0x3055, + 0xA4B6, 0x3056, 0xA4B7, 0x3057, 0xA4B8, 0x3058, 0xA4B9, 0x3059, + 0xA4BA, 0x305A, 0xA4BB, 0x305B, 0xA4BC, 0x305C, 0xA4BD, 0x305D, + 0xA4BE, 0x305E, 0xA4BF, 0x305F, 0xA4C0, 0x3060, 0xA4C1, 0x3061, + 0xA4C2, 0x3062, 0xA4C3, 0x3063, 0xA4C4, 0x3064, 0xA4C5, 0x3065, + 0xA4C6, 0x3066, 0xA4C7, 0x3067, 0xA4C8, 0x3068, 0xA4C9, 0x3069, + 0xA4CA, 0x306A, 0xA4CB, 0x306B, 0xA4CC, 0x306C, 0xA4CD, 0x306D, + 0xA4CE, 0x306E, 0xA4CF, 0x306F, 0xA4D0, 0x3070, 0xA4D1, 0x3071, + 0xA4D2, 0x3072, 0xA4D3, 0x3073, 0xA4D4, 0x3074, 0xA4D5, 0x3075, + 0xA4D6, 0x3076, 0xA4D7, 0x3077, 0xA4D8, 0x3078, 0xA4D9, 0x3079, + 0xA4DA, 0x307A, 0xA4DB, 0x307B, 0xA4DC, 0x307C, 0xA4DD, 0x307D, + 0xA4DE, 0x307E, 0xA4DF, 0x307F, 0xA4E0, 0x3080, 0xA4E1, 0x3081, + 0xA4E2, 0x3082, 0xA4E3, 0x3083, 0xA4E4, 0x3084, 0xA4E5, 0x3085, + 0xA4E6, 0x3086, 0xA4E7, 0x3087, 0xA4E8, 0x3088, 0xA4E9, 0x3089, + 0xA4EA, 0x308A, 0xA4EB, 0x308B, 0xA4EC, 0x308C, 0xA4ED, 0x308D, + 0xA4EE, 0x308E, 0xA4EF, 0x308F, 0xA4F0, 0x3090, 0xA4F1, 0x3091, + 0xA4F2, 0x3092, 0xA4F3, 0x3093, 0xA5A1, 0x30A1, 0xA5A2, 0x30A2, + 0xA5A3, 0x30A3, 0xA5A4, 0x30A4, 0xA5A5, 0x30A5, 0xA5A6, 0x30A6, + 0xA5A7, 0x30A7, 0xA5A8, 0x30A8, 0xA5A9, 0x30A9, 0xA5AA, 0x30AA, + 0xA5AB, 0x30AB, 0xA5AC, 0x30AC, 0xA5AD, 0x30AD, 0xA5AE, 0x30AE, + 0xA5AF, 0x30AF, 0xA5B0, 0x30B0, 0xA5B1, 0x30B1, 0xA5B2, 0x30B2, + 0xA5B3, 0x30B3, 0xA5B4, 0x30B4, 0xA5B5, 0x30B5, 0xA5B6, 0x30B6, + 0xA5B7, 0x30B7, 0xA5B8, 0x30B8, 0xA5B9, 0x30B9, 0xA5BA, 0x30BA, + 0xA5BB, 0x30BB, 0xA5BC, 0x30BC, 0xA5BD, 0x30BD, 0xA5BE, 0x30BE, + 0xA5BF, 0x30BF, 0xA5C0, 0x30C0, 0xA5C1, 0x30C1, 0xA5C2, 0x30C2, + 0xA5C3, 0x30C3, 0xA5C4, 0x30C4, 0xA5C5, 0x30C5, 0xA5C6, 0x30C6, + 0xA5C7, 0x30C7, 0xA5C8, 0x30C8, 0xA5C9, 0x30C9, 0xA5CA, 0x30CA, + 0xA5CB, 0x30CB, 0xA5CC, 0x30CC, 0xA5CD, 0x30CD, 0xA5CE, 0x30CE, + 0xA5CF, 0x30CF, 0xA5D0, 0x30D0, 0xA5D1, 0x30D1, 0xA5D2, 0x30D2, + 0xA5D3, 0x30D3, 0xA5D4, 0x30D4, 0xA5D5, 0x30D5, 0xA5D6, 0x30D6, + 0xA5D7, 0x30D7, 0xA5D8, 0x30D8, 0xA5D9, 0x30D9, 0xA5DA, 0x30DA, + 0xA5DB, 0x30DB, 0xA5DC, 0x30DC, 0xA5DD, 0x30DD, 0xA5DE, 0x30DE, + 0xA5DF, 0x30DF, 0xA5E0, 0x30E0, 0xA5E1, 0x30E1, 0xA5E2, 0x30E2, + 0xA5E3, 0x30E3, 0xA5E4, 0x30E4, 0xA5E5, 0x30E5, 0xA5E6, 0x30E6, + 0xA5E7, 0x30E7, 0xA5E8, 0x30E8, 0xA5E9, 0x30E9, 0xA5EA, 0x30EA, + 0xA5EB, 0x30EB, 0xA5EC, 0x30EC, 0xA5ED, 0x30ED, 0xA5EE, 0x30EE, + 0xA5EF, 0x30EF, 0xA5F0, 0x30F0, 0xA5F1, 0x30F1, 0xA5F2, 0x30F2, + 0xA5F3, 0x30F3, 0xA5F4, 0x30F4, 0xA5F5, 0x30F5, 0xA5F6, 0x30F6, + 0xA6A1, 0x0391, 0xA6A2, 0x0392, 0xA6A3, 0x0393, 0xA6A4, 0x0394, + 0xA6A5, 0x0395, 0xA6A6, 0x0396, 0xA6A7, 0x0397, 0xA6A8, 0x0398, + 0xA6A9, 0x0399, 0xA6AA, 0x039A, 0xA6AB, 0x039B, 0xA6AC, 0x039C, + 0xA6AD, 0x039D, 0xA6AE, 0x039E, 0xA6AF, 0x039F, 0xA6B0, 0x03A0, + 0xA6B1, 0x03A1, 0xA6B2, 0x03A3, 0xA6B3, 0x03A4, 0xA6B4, 0x03A5, + 0xA6B5, 0x03A6, 0xA6B6, 0x03A7, 0xA6B7, 0x03A8, 0xA6B8, 0x03A9, + 0xA6C1, 0x03B1, 0xA6C2, 0x03B2, 0xA6C3, 0x03B3, 0xA6C4, 0x03B4, + 0xA6C5, 0x03B5, 0xA6C6, 0x03B6, 0xA6C7, 0x03B7, 0xA6C8, 0x03B8, + 0xA6C9, 0x03B9, 0xA6CA, 0x03BA, 0xA6CB, 0x03BB, 0xA6CC, 0x03BC, + 0xA6CD, 0x03BD, 0xA6CE, 0x03BE, 0xA6CF, 0x03BF, 0xA6D0, 0x03C0, + 0xA6D1, 0x03C1, 0xA6D2, 0x03C3, 0xA6D3, 0x03C4, 0xA6D4, 0x03C5, + 0xA6D5, 0x03C6, 0xA6D6, 0x03C7, 0xA6D7, 0x03C8, 0xA6D8, 0x03C9, + 0xA6E0, 0xFE35, 0xA6E1, 0xFE36, 0xA6E2, 0xFE39, 0xA6E3, 0xFE3A, + 0xA6E4, 0xFE3F, 0xA6E5, 0xFE40, 0xA6E6, 0xFE3D, 0xA6E7, 0xFE3E, + 0xA6E8, 0xFE41, 0xA6E9, 0xFE42, 0xA6EA, 0xFE43, 0xA6EB, 0xFE44, + 0xA6EE, 0xFE3B, 0xA6EF, 0xFE3C, 0xA6F0, 0xFE37, 0xA6F1, 0xFE38, + 0xA6F2, 0xFE31, 0xA6F4, 0xFE33, 0xA6F5, 0xFE34, 0xA7A1, 0x0410, + 0xA7A2, 0x0411, 0xA7A3, 0x0412, 0xA7A4, 0x0413, 0xA7A5, 0x0414, + 0xA7A6, 0x0415, 0xA7A7, 0x0401, 0xA7A8, 0x0416, 0xA7A9, 0x0417, + 0xA7AA, 0x0418, 0xA7AB, 0x0419, 0xA7AC, 0x041A, 0xA7AD, 0x041B, + 0xA7AE, 0x041C, 0xA7AF, 0x041D, 0xA7B0, 0x041E, 0xA7B1, 0x041F, + 0xA7B2, 0x0420, 0xA7B3, 0x0421, 0xA7B4, 0x0422, 0xA7B5, 0x0423, + 0xA7B6, 0x0424, 0xA7B7, 0x0425, 0xA7B8, 0x0426, 0xA7B9, 0x0427, + 0xA7BA, 0x0428, 0xA7BB, 0x0429, 0xA7BC, 0x042A, 0xA7BD, 0x042B, + 0xA7BE, 0x042C, 0xA7BF, 0x042D, 0xA7C0, 0x042E, 0xA7C1, 0x042F, + 0xA7D1, 0x0430, 0xA7D2, 0x0431, 0xA7D3, 0x0432, 0xA7D4, 0x0433, + 0xA7D5, 0x0434, 0xA7D6, 0x0435, 0xA7D7, 0x0451, 0xA7D8, 0x0436, + 0xA7D9, 0x0437, 0xA7DA, 0x0438, 0xA7DB, 0x0439, 0xA7DC, 0x043A, + 0xA7DD, 0x043B, 0xA7DE, 0x043C, 0xA7DF, 0x043D, 0xA7E0, 0x043E, + 0xA7E1, 0x043F, 0xA7E2, 0x0440, 0xA7E3, 0x0441, 0xA7E4, 0x0442, + 0xA7E5, 0x0443, 0xA7E6, 0x0444, 0xA7E7, 0x0445, 0xA7E8, 0x0446, + 0xA7E9, 0x0447, 0xA7EA, 0x0448, 0xA7EB, 0x0449, 0xA7EC, 0x044A, + 0xA7ED, 0x044B, 0xA7EE, 0x044C, 0xA7EF, 0x044D, 0xA7F0, 0x044E, + 0xA7F1, 0x044F, 0xA840, 0x02CA, 0xA841, 0x02CB, 0xA842, 0x02D9, + 0xA843, 0x2013, 0xA844, 0x2015, 0xA845, 0x2025, 0xA846, 0x2035, + 0xA847, 0x2105, 0xA848, 0x2109, 0xA849, 0x2196, 0xA84A, 0x2197, + 0xA84B, 0x2198, 0xA84C, 0x2199, 0xA84D, 0x2215, 0xA84E, 0x221F, + 0xA84F, 0x2223, 0xA850, 0x2252, 0xA851, 0x2266, 0xA852, 0x2267, + 0xA853, 0x22BF, 0xA854, 0x2550, 0xA855, 0x2551, 0xA856, 0x2552, + 0xA857, 0x2553, 0xA858, 0x2554, 0xA859, 0x2555, 0xA85A, 0x2556, + 0xA85B, 0x2557, 0xA85C, 0x2558, 0xA85D, 0x2559, 0xA85E, 0x255A, + 0xA85F, 0x255B, 0xA860, 0x255C, 0xA861, 0x255D, 0xA862, 0x255E, + 0xA863, 0x255F, 0xA864, 0x2560, 0xA865, 0x2561, 0xA866, 0x2562, + 0xA867, 0x2563, 0xA868, 0x2564, 0xA869, 0x2565, 0xA86A, 0x2566, + 0xA86B, 0x2567, 0xA86C, 0x2568, 0xA86D, 0x2569, 0xA86E, 0x256A, + 0xA86F, 0x256B, 0xA870, 0x256C, 0xA871, 0x256D, 0xA872, 0x256E, + 0xA873, 0x256F, 0xA874, 0x2570, 0xA875, 0x2571, 0xA876, 0x2572, + 0xA877, 0x2573, 0xA878, 0x2581, 0xA879, 0x2582, 0xA87A, 0x2583, + 0xA87B, 0x2584, 0xA87C, 0x2585, 0xA87D, 0x2586, 0xA87E, 0x2587, + 0xA880, 0x2588, 0xA881, 0x2589, 0xA882, 0x258A, 0xA883, 0x258B, + 0xA884, 0x258C, 0xA885, 0x258D, 0xA886, 0x258E, 0xA887, 0x258F, + 0xA888, 0x2593, 0xA889, 0x2594, 0xA88A, 0x2595, 0xA88B, 0x25BC, + 0xA88C, 0x25BD, 0xA88D, 0x25E2, 0xA88E, 0x25E3, 0xA88F, 0x25E4, + 0xA890, 0x25E5, 0xA891, 0x2609, 0xA892, 0x2295, 0xA893, 0x3012, + 0xA894, 0x301D, 0xA895, 0x301E, 0xA8A1, 0x0101, 0xA8A2, 0x00E1, + 0xA8A3, 0x01CE, 0xA8A4, 0x00E0, 0xA8A5, 0x0113, 0xA8A6, 0x00E9, + 0xA8A7, 0x011B, 0xA8A8, 0x00E8, 0xA8A9, 0x012B, 0xA8AA, 0x00ED, + 0xA8AB, 0x01D0, 0xA8AC, 0x00EC, 0xA8AD, 0x014D, 0xA8AE, 0x00F3, + 0xA8AF, 0x01D2, 0xA8B0, 0x00F2, 0xA8B1, 0x016B, 0xA8B2, 0x00FA, + 0xA8B3, 0x01D4, 0xA8B4, 0x00F9, 0xA8B5, 0x01D6, 0xA8B6, 0x01D8, + 0xA8B7, 0x01DA, 0xA8B8, 0x01DC, 0xA8B9, 0x00FC, 0xA8BA, 0x00EA, + 0xA8BB, 0x0251, 0xA8BD, 0x0144, 0xA8BE, 0x0148, 0xA8C0, 0x0261, + 0xA8C5, 0x3105, 0xA8C6, 0x3106, 0xA8C7, 0x3107, 0xA8C8, 0x3108, + 0xA8C9, 0x3109, 0xA8CA, 0x310A, 0xA8CB, 0x310B, 0xA8CC, 0x310C, + 0xA8CD, 0x310D, 0xA8CE, 0x310E, 0xA8CF, 0x310F, 0xA8D0, 0x3110, + 0xA8D1, 0x3111, 0xA8D2, 0x3112, 0xA8D3, 0x3113, 0xA8D4, 0x3114, + 0xA8D5, 0x3115, 0xA8D6, 0x3116, 0xA8D7, 0x3117, 0xA8D8, 0x3118, + 0xA8D9, 0x3119, 0xA8DA, 0x311A, 0xA8DB, 0x311B, 0xA8DC, 0x311C, + 0xA8DD, 0x311D, 0xA8DE, 0x311E, 0xA8DF, 0x311F, 0xA8E0, 0x3120, + 0xA8E1, 0x3121, 0xA8E2, 0x3122, 0xA8E3, 0x3123, 0xA8E4, 0x3124, + 0xA8E5, 0x3125, 0xA8E6, 0x3126, 0xA8E7, 0x3127, 0xA8E8, 0x3128, + 0xA8E9, 0x3129, 0xA940, 0x3021, 0xA941, 0x3022, 0xA942, 0x3023, + 0xA943, 0x3024, 0xA944, 0x3025, 0xA945, 0x3026, 0xA946, 0x3027, + 0xA947, 0x3028, 0xA948, 0x3029, 0xA949, 0x32A3, 0xA94A, 0x338E, + 0xA94B, 0x338F, 0xA94C, 0x339C, 0xA94D, 0x339D, 0xA94E, 0x339E, + 0xA94F, 0x33A1, 0xA950, 0x33C4, 0xA951, 0x33CE, 0xA952, 0x33D1, + 0xA953, 0x33D2, 0xA954, 0x33D5, 0xA955, 0xFE30, 0xA956, 0xFFE2, + 0xA957, 0xFFE4, 0xA959, 0x2121, 0xA95A, 0x3231, 0xA95C, 0x2010, + 0xA960, 0x30FC, 0xA961, 0x309B, 0xA962, 0x309C, 0xA963, 0x30FD, + 0xA964, 0x30FE, 0xA965, 0x3006, 0xA966, 0x309D, 0xA967, 0x309E, + 0xA968, 0xFE49, 0xA969, 0xFE4A, 0xA96A, 0xFE4B, 0xA96B, 0xFE4C, + 0xA96C, 0xFE4D, 0xA96D, 0xFE4E, 0xA96E, 0xFE4F, 0xA96F, 0xFE50, + 0xA970, 0xFE51, 0xA971, 0xFE52, 0xA972, 0xFE54, 0xA973, 0xFE55, + 0xA974, 0xFE56, 0xA975, 0xFE57, 0xA976, 0xFE59, 0xA977, 0xFE5A, + 0xA978, 0xFE5B, 0xA979, 0xFE5C, 0xA97A, 0xFE5D, 0xA97B, 0xFE5E, + 0xA97C, 0xFE5F, 0xA97D, 0xFE60, 0xA97E, 0xFE61, 0xA980, 0xFE62, + 0xA981, 0xFE63, 0xA982, 0xFE64, 0xA983, 0xFE65, 0xA984, 0xFE66, + 0xA985, 0xFE68, 0xA986, 0xFE69, 0xA987, 0xFE6A, 0xA988, 0xFE6B, + 0xA996, 0x3007, 0xA9A4, 0x2500, 0xA9A5, 0x2501, 0xA9A6, 0x2502, + 0xA9A7, 0x2503, 0xA9A8, 0x2504, 0xA9A9, 0x2505, 0xA9AA, 0x2506, + 0xA9AB, 0x2507, 0xA9AC, 0x2508, 0xA9AD, 0x2509, 0xA9AE, 0x250A, + 0xA9AF, 0x250B, 0xA9B0, 0x250C, 0xA9B1, 0x250D, 0xA9B2, 0x250E, + 0xA9B3, 0x250F, 0xA9B4, 0x2510, 0xA9B5, 0x2511, 0xA9B6, 0x2512, + 0xA9B7, 0x2513, 0xA9B8, 0x2514, 0xA9B9, 0x2515, 0xA9BA, 0x2516, + 0xA9BB, 0x2517, 0xA9BC, 0x2518, 0xA9BD, 0x2519, 0xA9BE, 0x251A, + 0xA9BF, 0x251B, 0xA9C0, 0x251C, 0xA9C1, 0x251D, 0xA9C2, 0x251E, + 0xA9C3, 0x251F, 0xA9C4, 0x2520, 0xA9C5, 0x2521, 0xA9C6, 0x2522, + 0xA9C7, 0x2523, 0xA9C8, 0x2524, 0xA9C9, 0x2525, 0xA9CA, 0x2526, + 0xA9CB, 0x2527, 0xA9CC, 0x2528, 0xA9CD, 0x2529, 0xA9CE, 0x252A, + 0xA9CF, 0x252B, 0xA9D0, 0x252C, 0xA9D1, 0x252D, 0xA9D2, 0x252E, + 0xA9D3, 0x252F, 0xA9D4, 0x2530, 0xA9D5, 0x2531, 0xA9D6, 0x2532, + 0xA9D7, 0x2533, 0xA9D8, 0x2534, 0xA9D9, 0x2535, 0xA9DA, 0x2536, + 0xA9DB, 0x2537, 0xA9DC, 0x2538, 0xA9DD, 0x2539, 0xA9DE, 0x253A, + 0xA9DF, 0x253B, 0xA9E0, 0x253C, 0xA9E1, 0x253D, 0xA9E2, 0x253E, + 0xA9E3, 0x253F, 0xA9E4, 0x2540, 0xA9E5, 0x2541, 0xA9E6, 0x2542, + 0xA9E7, 0x2543, 0xA9E8, 0x2544, 0xA9E9, 0x2545, 0xA9EA, 0x2546, + 0xA9EB, 0x2547, 0xA9EC, 0x2548, 0xA9ED, 0x2549, 0xA9EE, 0x254A, + 0xA9EF, 0x254B, 0xAA40, 0x72DC, 0xAA41, 0x72DD, 0xAA42, 0x72DF, + 0xAA43, 0x72E2, 0xAA44, 0x72E3, 0xAA45, 0x72E4, 0xAA46, 0x72E5, + 0xAA47, 0x72E6, 0xAA48, 0x72E7, 0xAA49, 0x72EA, 0xAA4A, 0x72EB, + 0xAA4B, 0x72F5, 0xAA4C, 0x72F6, 0xAA4D, 0x72F9, 0xAA4E, 0x72FD, + 0xAA4F, 0x72FE, 0xAA50, 0x72FF, 0xAA51, 0x7300, 0xAA52, 0x7302, + 0xAA53, 0x7304, 0xAA54, 0x7305, 0xAA55, 0x7306, 0xAA56, 0x7307, + 0xAA57, 0x7308, 0xAA58, 0x7309, 0xAA59, 0x730B, 0xAA5A, 0x730C, + 0xAA5B, 0x730D, 0xAA5C, 0x730F, 0xAA5D, 0x7310, 0xAA5E, 0x7311, + 0xAA5F, 0x7312, 0xAA60, 0x7314, 0xAA61, 0x7318, 0xAA62, 0x7319, + 0xAA63, 0x731A, 0xAA64, 0x731F, 0xAA65, 0x7320, 0xAA66, 0x7323, + 0xAA67, 0x7324, 0xAA68, 0x7326, 0xAA69, 0x7327, 0xAA6A, 0x7328, + 0xAA6B, 0x732D, 0xAA6C, 0x732F, 0xAA6D, 0x7330, 0xAA6E, 0x7332, + 0xAA6F, 0x7333, 0xAA70, 0x7335, 0xAA71, 0x7336, 0xAA72, 0x733A, + 0xAA73, 0x733B, 0xAA74, 0x733C, 0xAA75, 0x733D, 0xAA76, 0x7340, + 0xAA77, 0x7341, 0xAA78, 0x7342, 0xAA79, 0x7343, 0xAA7A, 0x7344, + 0xAA7B, 0x7345, 0xAA7C, 0x7346, 0xAA7D, 0x7347, 0xAA7E, 0x7348, + 0xAA80, 0x7349, 0xAA81, 0x734A, 0xAA82, 0x734B, 0xAA83, 0x734C, + 0xAA84, 0x734E, 0xAA85, 0x734F, 0xAA86, 0x7351, 0xAA87, 0x7353, + 0xAA88, 0x7354, 0xAA89, 0x7355, 0xAA8A, 0x7356, 0xAA8B, 0x7358, + 0xAA8C, 0x7359, 0xAA8D, 0x735A, 0xAA8E, 0x735B, 0xAA8F, 0x735C, + 0xAA90, 0x735D, 0xAA91, 0x735E, 0xAA92, 0x735F, 0xAA93, 0x7361, + 0xAA94, 0x7362, 0xAA95, 0x7363, 0xAA96, 0x7364, 0xAA97, 0x7365, + 0xAA98, 0x7366, 0xAA99, 0x7367, 0xAA9A, 0x7368, 0xAA9B, 0x7369, + 0xAA9C, 0x736A, 0xAA9D, 0x736B, 0xAA9E, 0x736E, 0xAA9F, 0x7370, + 0xAAA0, 0x7371, 0xAB40, 0x7372, 0xAB41, 0x7373, 0xAB42, 0x7374, + 0xAB43, 0x7375, 0xAB44, 0x7376, 0xAB45, 0x7377, 0xAB46, 0x7378, + 0xAB47, 0x7379, 0xAB48, 0x737A, 0xAB49, 0x737B, 0xAB4A, 0x737C, + 0xAB4B, 0x737D, 0xAB4C, 0x737F, 0xAB4D, 0x7380, 0xAB4E, 0x7381, + 0xAB4F, 0x7382, 0xAB50, 0x7383, 0xAB51, 0x7385, 0xAB52, 0x7386, + 0xAB53, 0x7388, 0xAB54, 0x738A, 0xAB55, 0x738C, 0xAB56, 0x738D, + 0xAB57, 0x738F, 0xAB58, 0x7390, 0xAB59, 0x7392, 0xAB5A, 0x7393, + 0xAB5B, 0x7394, 0xAB5C, 0x7395, 0xAB5D, 0x7397, 0xAB5E, 0x7398, + 0xAB5F, 0x7399, 0xAB60, 0x739A, 0xAB61, 0x739C, 0xAB62, 0x739D, + 0xAB63, 0x739E, 0xAB64, 0x73A0, 0xAB65, 0x73A1, 0xAB66, 0x73A3, + 0xAB67, 0x73A4, 0xAB68, 0x73A5, 0xAB69, 0x73A6, 0xAB6A, 0x73A7, + 0xAB6B, 0x73A8, 0xAB6C, 0x73AA, 0xAB6D, 0x73AC, 0xAB6E, 0x73AD, + 0xAB6F, 0x73B1, 0xAB70, 0x73B4, 0xAB71, 0x73B5, 0xAB72, 0x73B6, + 0xAB73, 0x73B8, 0xAB74, 0x73B9, 0xAB75, 0x73BC, 0xAB76, 0x73BD, + 0xAB77, 0x73BE, 0xAB78, 0x73BF, 0xAB79, 0x73C1, 0xAB7A, 0x73C3, + 0xAB7B, 0x73C4, 0xAB7C, 0x73C5, 0xAB7D, 0x73C6, 0xAB7E, 0x73C7, + 0xAB80, 0x73CB, 0xAB81, 0x73CC, 0xAB82, 0x73CE, 0xAB83, 0x73D2, + 0xAB84, 0x73D3, 0xAB85, 0x73D4, 0xAB86, 0x73D5, 0xAB87, 0x73D6, + 0xAB88, 0x73D7, 0xAB89, 0x73D8, 0xAB8A, 0x73DA, 0xAB8B, 0x73DB, + 0xAB8C, 0x73DC, 0xAB8D, 0x73DD, 0xAB8E, 0x73DF, 0xAB8F, 0x73E1, + 0xAB90, 0x73E2, 0xAB91, 0x73E3, 0xAB92, 0x73E4, 0xAB93, 0x73E6, + 0xAB94, 0x73E8, 0xAB95, 0x73EA, 0xAB96, 0x73EB, 0xAB97, 0x73EC, + 0xAB98, 0x73EE, 0xAB99, 0x73EF, 0xAB9A, 0x73F0, 0xAB9B, 0x73F1, + 0xAB9C, 0x73F3, 0xAB9D, 0x73F4, 0xAB9E, 0x73F5, 0xAB9F, 0x73F6, + 0xABA0, 0x73F7, 0xAC40, 0x73F8, 0xAC41, 0x73F9, 0xAC42, 0x73FA, + 0xAC43, 0x73FB, 0xAC44, 0x73FC, 0xAC45, 0x73FD, 0xAC46, 0x73FE, + 0xAC47, 0x73FF, 0xAC48, 0x7400, 0xAC49, 0x7401, 0xAC4A, 0x7402, + 0xAC4B, 0x7404, 0xAC4C, 0x7407, 0xAC4D, 0x7408, 0xAC4E, 0x740B, + 0xAC4F, 0x740C, 0xAC50, 0x740D, 0xAC51, 0x740E, 0xAC52, 0x7411, + 0xAC53, 0x7412, 0xAC54, 0x7413, 0xAC55, 0x7414, 0xAC56, 0x7415, + 0xAC57, 0x7416, 0xAC58, 0x7417, 0xAC59, 0x7418, 0xAC5A, 0x7419, + 0xAC5B, 0x741C, 0xAC5C, 0x741D, 0xAC5D, 0x741E, 0xAC5E, 0x741F, + 0xAC5F, 0x7420, 0xAC60, 0x7421, 0xAC61, 0x7423, 0xAC62, 0x7424, + 0xAC63, 0x7427, 0xAC64, 0x7429, 0xAC65, 0x742B, 0xAC66, 0x742D, + 0xAC67, 0x742F, 0xAC68, 0x7431, 0xAC69, 0x7432, 0xAC6A, 0x7437, + 0xAC6B, 0x7438, 0xAC6C, 0x7439, 0xAC6D, 0x743A, 0xAC6E, 0x743B, + 0xAC6F, 0x743D, 0xAC70, 0x743E, 0xAC71, 0x743F, 0xAC72, 0x7440, + 0xAC73, 0x7442, 0xAC74, 0x7443, 0xAC75, 0x7444, 0xAC76, 0x7445, + 0xAC77, 0x7446, 0xAC78, 0x7447, 0xAC79, 0x7448, 0xAC7A, 0x7449, + 0xAC7B, 0x744A, 0xAC7C, 0x744B, 0xAC7D, 0x744C, 0xAC7E, 0x744D, + 0xAC80, 0x744E, 0xAC81, 0x744F, 0xAC82, 0x7450, 0xAC83, 0x7451, + 0xAC84, 0x7452, 0xAC85, 0x7453, 0xAC86, 0x7454, 0xAC87, 0x7456, + 0xAC88, 0x7458, 0xAC89, 0x745D, 0xAC8A, 0x7460, 0xAC8B, 0x7461, + 0xAC8C, 0x7462, 0xAC8D, 0x7463, 0xAC8E, 0x7464, 0xAC8F, 0x7465, + 0xAC90, 0x7466, 0xAC91, 0x7467, 0xAC92, 0x7468, 0xAC93, 0x7469, + 0xAC94, 0x746A, 0xAC95, 0x746B, 0xAC96, 0x746C, 0xAC97, 0x746E, + 0xAC98, 0x746F, 0xAC99, 0x7471, 0xAC9A, 0x7472, 0xAC9B, 0x7473, + 0xAC9C, 0x7474, 0xAC9D, 0x7475, 0xAC9E, 0x7478, 0xAC9F, 0x7479, + 0xACA0, 0x747A, 0xAD40, 0x747B, 0xAD41, 0x747C, 0xAD42, 0x747D, + 0xAD43, 0x747F, 0xAD44, 0x7482, 0xAD45, 0x7484, 0xAD46, 0x7485, + 0xAD47, 0x7486, 0xAD48, 0x7488, 0xAD49, 0x7489, 0xAD4A, 0x748A, + 0xAD4B, 0x748C, 0xAD4C, 0x748D, 0xAD4D, 0x748F, 0xAD4E, 0x7491, + 0xAD4F, 0x7492, 0xAD50, 0x7493, 0xAD51, 0x7494, 0xAD52, 0x7495, + 0xAD53, 0x7496, 0xAD54, 0x7497, 0xAD55, 0x7498, 0xAD56, 0x7499, + 0xAD57, 0x749A, 0xAD58, 0x749B, 0xAD59, 0x749D, 0xAD5A, 0x749F, + 0xAD5B, 0x74A0, 0xAD5C, 0x74A1, 0xAD5D, 0x74A2, 0xAD5E, 0x74A3, + 0xAD5F, 0x74A4, 0xAD60, 0x74A5, 0xAD61, 0x74A6, 0xAD62, 0x74AA, + 0xAD63, 0x74AB, 0xAD64, 0x74AC, 0xAD65, 0x74AD, 0xAD66, 0x74AE, + 0xAD67, 0x74AF, 0xAD68, 0x74B0, 0xAD69, 0x74B1, 0xAD6A, 0x74B2, + 0xAD6B, 0x74B3, 0xAD6C, 0x74B4, 0xAD6D, 0x74B5, 0xAD6E, 0x74B6, + 0xAD6F, 0x74B7, 0xAD70, 0x74B8, 0xAD71, 0x74B9, 0xAD72, 0x74BB, + 0xAD73, 0x74BC, 0xAD74, 0x74BD, 0xAD75, 0x74BE, 0xAD76, 0x74BF, + 0xAD77, 0x74C0, 0xAD78, 0x74C1, 0xAD79, 0x74C2, 0xAD7A, 0x74C3, + 0xAD7B, 0x74C4, 0xAD7C, 0x74C5, 0xAD7D, 0x74C6, 0xAD7E, 0x74C7, + 0xAD80, 0x74C8, 0xAD81, 0x74C9, 0xAD82, 0x74CA, 0xAD83, 0x74CB, + 0xAD84, 0x74CC, 0xAD85, 0x74CD, 0xAD86, 0x74CE, 0xAD87, 0x74CF, + 0xAD88, 0x74D0, 0xAD89, 0x74D1, 0xAD8A, 0x74D3, 0xAD8B, 0x74D4, + 0xAD8C, 0x74D5, 0xAD8D, 0x74D6, 0xAD8E, 0x74D7, 0xAD8F, 0x74D8, + 0xAD90, 0x74D9, 0xAD91, 0x74DA, 0xAD92, 0x74DB, 0xAD93, 0x74DD, + 0xAD94, 0x74DF, 0xAD95, 0x74E1, 0xAD96, 0x74E5, 0xAD97, 0x74E7, + 0xAD98, 0x74E8, 0xAD99, 0x74E9, 0xAD9A, 0x74EA, 0xAD9B, 0x74EB, + 0xAD9C, 0x74EC, 0xAD9D, 0x74ED, 0xAD9E, 0x74F0, 0xAD9F, 0x74F1, + 0xADA0, 0x74F2, 0xAE40, 0x74F3, 0xAE41, 0x74F5, 0xAE42, 0x74F8, + 0xAE43, 0x74F9, 0xAE44, 0x74FA, 0xAE45, 0x74FB, 0xAE46, 0x74FC, + 0xAE47, 0x74FD, 0xAE48, 0x74FE, 0xAE49, 0x7500, 0xAE4A, 0x7501, + 0xAE4B, 0x7502, 0xAE4C, 0x7503, 0xAE4D, 0x7505, 0xAE4E, 0x7506, + 0xAE4F, 0x7507, 0xAE50, 0x7508, 0xAE51, 0x7509, 0xAE52, 0x750A, + 0xAE53, 0x750B, 0xAE54, 0x750C, 0xAE55, 0x750E, 0xAE56, 0x7510, + 0xAE57, 0x7512, 0xAE58, 0x7514, 0xAE59, 0x7515, 0xAE5A, 0x7516, + 0xAE5B, 0x7517, 0xAE5C, 0x751B, 0xAE5D, 0x751D, 0xAE5E, 0x751E, + 0xAE5F, 0x7520, 0xAE60, 0x7521, 0xAE61, 0x7522, 0xAE62, 0x7523, + 0xAE63, 0x7524, 0xAE64, 0x7526, 0xAE65, 0x7527, 0xAE66, 0x752A, + 0xAE67, 0x752E, 0xAE68, 0x7534, 0xAE69, 0x7536, 0xAE6A, 0x7539, + 0xAE6B, 0x753C, 0xAE6C, 0x753D, 0xAE6D, 0x753F, 0xAE6E, 0x7541, + 0xAE6F, 0x7542, 0xAE70, 0x7543, 0xAE71, 0x7544, 0xAE72, 0x7546, + 0xAE73, 0x7547, 0xAE74, 0x7549, 0xAE75, 0x754A, 0xAE76, 0x754D, + 0xAE77, 0x7550, 0xAE78, 0x7551, 0xAE79, 0x7552, 0xAE7A, 0x7553, + 0xAE7B, 0x7555, 0xAE7C, 0x7556, 0xAE7D, 0x7557, 0xAE7E, 0x7558, + 0xAE80, 0x755D, 0xAE81, 0x755E, 0xAE82, 0x755F, 0xAE83, 0x7560, + 0xAE84, 0x7561, 0xAE85, 0x7562, 0xAE86, 0x7563, 0xAE87, 0x7564, + 0xAE88, 0x7567, 0xAE89, 0x7568, 0xAE8A, 0x7569, 0xAE8B, 0x756B, + 0xAE8C, 0x756C, 0xAE8D, 0x756D, 0xAE8E, 0x756E, 0xAE8F, 0x756F, + 0xAE90, 0x7570, 0xAE91, 0x7571, 0xAE92, 0x7573, 0xAE93, 0x7575, + 0xAE94, 0x7576, 0xAE95, 0x7577, 0xAE96, 0x757A, 0xAE97, 0x757B, + 0xAE98, 0x757C, 0xAE99, 0x757D, 0xAE9A, 0x757E, 0xAE9B, 0x7580, + 0xAE9C, 0x7581, 0xAE9D, 0x7582, 0xAE9E, 0x7584, 0xAE9F, 0x7585, + 0xAEA0, 0x7587, 0xAF40, 0x7588, 0xAF41, 0x7589, 0xAF42, 0x758A, + 0xAF43, 0x758C, 0xAF44, 0x758D, 0xAF45, 0x758E, 0xAF46, 0x7590, + 0xAF47, 0x7593, 0xAF48, 0x7595, 0xAF49, 0x7598, 0xAF4A, 0x759B, + 0xAF4B, 0x759C, 0xAF4C, 0x759E, 0xAF4D, 0x75A2, 0xAF4E, 0x75A6, + 0xAF4F, 0x75A7, 0xAF50, 0x75A8, 0xAF51, 0x75A9, 0xAF52, 0x75AA, + 0xAF53, 0x75AD, 0xAF54, 0x75B6, 0xAF55, 0x75B7, 0xAF56, 0x75BA, + 0xAF57, 0x75BB, 0xAF58, 0x75BF, 0xAF59, 0x75C0, 0xAF5A, 0x75C1, + 0xAF5B, 0x75C6, 0xAF5C, 0x75CB, 0xAF5D, 0x75CC, 0xAF5E, 0x75CE, + 0xAF5F, 0x75CF, 0xAF60, 0x75D0, 0xAF61, 0x75D1, 0xAF62, 0x75D3, + 0xAF63, 0x75D7, 0xAF64, 0x75D9, 0xAF65, 0x75DA, 0xAF66, 0x75DC, + 0xAF67, 0x75DD, 0xAF68, 0x75DF, 0xAF69, 0x75E0, 0xAF6A, 0x75E1, + 0xAF6B, 0x75E5, 0xAF6C, 0x75E9, 0xAF6D, 0x75EC, 0xAF6E, 0x75ED, + 0xAF6F, 0x75EE, 0xAF70, 0x75EF, 0xAF71, 0x75F2, 0xAF72, 0x75F3, + 0xAF73, 0x75F5, 0xAF74, 0x75F6, 0xAF75, 0x75F7, 0xAF76, 0x75F8, + 0xAF77, 0x75FA, 0xAF78, 0x75FB, 0xAF79, 0x75FD, 0xAF7A, 0x75FE, + 0xAF7B, 0x7602, 0xAF7C, 0x7604, 0xAF7D, 0x7606, 0xAF7E, 0x7607, + 0xAF80, 0x7608, 0xAF81, 0x7609, 0xAF82, 0x760B, 0xAF83, 0x760D, + 0xAF84, 0x760E, 0xAF85, 0x760F, 0xAF86, 0x7611, 0xAF87, 0x7612, + 0xAF88, 0x7613, 0xAF89, 0x7614, 0xAF8A, 0x7616, 0xAF8B, 0x761A, + 0xAF8C, 0x761C, 0xAF8D, 0x761D, 0xAF8E, 0x761E, 0xAF8F, 0x7621, + 0xAF90, 0x7623, 0xAF91, 0x7627, 0xAF92, 0x7628, 0xAF93, 0x762C, + 0xAF94, 0x762E, 0xAF95, 0x762F, 0xAF96, 0x7631, 0xAF97, 0x7632, + 0xAF98, 0x7636, 0xAF99, 0x7637, 0xAF9A, 0x7639, 0xAF9B, 0x763A, + 0xAF9C, 0x763B, 0xAF9D, 0x763D, 0xAF9E, 0x7641, 0xAF9F, 0x7642, + 0xAFA0, 0x7644, 0xB040, 0x7645, 0xB041, 0x7646, 0xB042, 0x7647, + 0xB043, 0x7648, 0xB044, 0x7649, 0xB045, 0x764A, 0xB046, 0x764B, + 0xB047, 0x764E, 0xB048, 0x764F, 0xB049, 0x7650, 0xB04A, 0x7651, + 0xB04B, 0x7652, 0xB04C, 0x7653, 0xB04D, 0x7655, 0xB04E, 0x7657, + 0xB04F, 0x7658, 0xB050, 0x7659, 0xB051, 0x765A, 0xB052, 0x765B, + 0xB053, 0x765D, 0xB054, 0x765F, 0xB055, 0x7660, 0xB056, 0x7661, + 0xB057, 0x7662, 0xB058, 0x7664, 0xB059, 0x7665, 0xB05A, 0x7666, + 0xB05B, 0x7667, 0xB05C, 0x7668, 0xB05D, 0x7669, 0xB05E, 0x766A, + 0xB05F, 0x766C, 0xB060, 0x766D, 0xB061, 0x766E, 0xB062, 0x7670, + 0xB063, 0x7671, 0xB064, 0x7672, 0xB065, 0x7673, 0xB066, 0x7674, + 0xB067, 0x7675, 0xB068, 0x7676, 0xB069, 0x7677, 0xB06A, 0x7679, + 0xB06B, 0x767A, 0xB06C, 0x767C, 0xB06D, 0x767F, 0xB06E, 0x7680, + 0xB06F, 0x7681, 0xB070, 0x7683, 0xB071, 0x7685, 0xB072, 0x7689, + 0xB073, 0x768A, 0xB074, 0x768C, 0xB075, 0x768D, 0xB076, 0x768F, + 0xB077, 0x7690, 0xB078, 0x7692, 0xB079, 0x7694, 0xB07A, 0x7695, + 0xB07B, 0x7697, 0xB07C, 0x7698, 0xB07D, 0x769A, 0xB07E, 0x769B, + 0xB080, 0x769C, 0xB081, 0x769D, 0xB082, 0x769E, 0xB083, 0x769F, + 0xB084, 0x76A0, 0xB085, 0x76A1, 0xB086, 0x76A2, 0xB087, 0x76A3, + 0xB088, 0x76A5, 0xB089, 0x76A6, 0xB08A, 0x76A7, 0xB08B, 0x76A8, + 0xB08C, 0x76A9, 0xB08D, 0x76AA, 0xB08E, 0x76AB, 0xB08F, 0x76AC, + 0xB090, 0x76AD, 0xB091, 0x76AF, 0xB092, 0x76B0, 0xB093, 0x76B3, + 0xB094, 0x76B5, 0xB095, 0x76B6, 0xB096, 0x76B7, 0xB097, 0x76B8, + 0xB098, 0x76B9, 0xB099, 0x76BA, 0xB09A, 0x76BB, 0xB09B, 0x76BC, + 0xB09C, 0x76BD, 0xB09D, 0x76BE, 0xB09E, 0x76C0, 0xB09F, 0x76C1, + 0xB0A0, 0x76C3, 0xB0A1, 0x554A, 0xB0A2, 0x963F, 0xB0A3, 0x57C3, + 0xB0A4, 0x6328, 0xB0A5, 0x54CE, 0xB0A6, 0x5509, 0xB0A7, 0x54C0, + 0xB0A8, 0x7691, 0xB0A9, 0x764C, 0xB0AA, 0x853C, 0xB0AB, 0x77EE, + 0xB0AC, 0x827E, 0xB0AD, 0x788D, 0xB0AE, 0x7231, 0xB0AF, 0x9698, + 0xB0B0, 0x978D, 0xB0B1, 0x6C28, 0xB0B2, 0x5B89, 0xB0B3, 0x4FFA, + 0xB0B4, 0x6309, 0xB0B5, 0x6697, 0xB0B6, 0x5CB8, 0xB0B7, 0x80FA, + 0xB0B8, 0x6848, 0xB0B9, 0x80AE, 0xB0BA, 0x6602, 0xB0BB, 0x76CE, + 0xB0BC, 0x51F9, 0xB0BD, 0x6556, 0xB0BE, 0x71AC, 0xB0BF, 0x7FF1, + 0xB0C0, 0x8884, 0xB0C1, 0x50B2, 0xB0C2, 0x5965, 0xB0C3, 0x61CA, + 0xB0C4, 0x6FB3, 0xB0C5, 0x82AD, 0xB0C6, 0x634C, 0xB0C7, 0x6252, + 0xB0C8, 0x53ED, 0xB0C9, 0x5427, 0xB0CA, 0x7B06, 0xB0CB, 0x516B, + 0xB0CC, 0x75A4, 0xB0CD, 0x5DF4, 0xB0CE, 0x62D4, 0xB0CF, 0x8DCB, + 0xB0D0, 0x9776, 0xB0D1, 0x628A, 0xB0D2, 0x8019, 0xB0D3, 0x575D, + 0xB0D4, 0x9738, 0xB0D5, 0x7F62, 0xB0D6, 0x7238, 0xB0D7, 0x767D, + 0xB0D8, 0x67CF, 0xB0D9, 0x767E, 0xB0DA, 0x6446, 0xB0DB, 0x4F70, + 0xB0DC, 0x8D25, 0xB0DD, 0x62DC, 0xB0DE, 0x7A17, 0xB0DF, 0x6591, + 0xB0E0, 0x73ED, 0xB0E1, 0x642C, 0xB0E2, 0x6273, 0xB0E3, 0x822C, + 0xB0E4, 0x9881, 0xB0E5, 0x677F, 0xB0E6, 0x7248, 0xB0E7, 0x626E, + 0xB0E8, 0x62CC, 0xB0E9, 0x4F34, 0xB0EA, 0x74E3, 0xB0EB, 0x534A, + 0xB0EC, 0x529E, 0xB0ED, 0x7ECA, 0xB0EE, 0x90A6, 0xB0EF, 0x5E2E, + 0xB0F0, 0x6886, 0xB0F1, 0x699C, 0xB0F2, 0x8180, 0xB0F3, 0x7ED1, + 0xB0F4, 0x68D2, 0xB0F5, 0x78C5, 0xB0F6, 0x868C, 0xB0F7, 0x9551, + 0xB0F8, 0x508D, 0xB0F9, 0x8C24, 0xB0FA, 0x82DE, 0xB0FB, 0x80DE, + 0xB0FC, 0x5305, 0xB0FD, 0x8912, 0xB0FE, 0x5265, 0xB140, 0x76C4, + 0xB141, 0x76C7, 0xB142, 0x76C9, 0xB143, 0x76CB, 0xB144, 0x76CC, + 0xB145, 0x76D3, 0xB146, 0x76D5, 0xB147, 0x76D9, 0xB148, 0x76DA, + 0xB149, 0x76DC, 0xB14A, 0x76DD, 0xB14B, 0x76DE, 0xB14C, 0x76E0, + 0xB14D, 0x76E1, 0xB14E, 0x76E2, 0xB14F, 0x76E3, 0xB150, 0x76E4, + 0xB151, 0x76E6, 0xB152, 0x76E7, 0xB153, 0x76E8, 0xB154, 0x76E9, + 0xB155, 0x76EA, 0xB156, 0x76EB, 0xB157, 0x76EC, 0xB158, 0x76ED, + 0xB159, 0x76F0, 0xB15A, 0x76F3, 0xB15B, 0x76F5, 0xB15C, 0x76F6, + 0xB15D, 0x76F7, 0xB15E, 0x76FA, 0xB15F, 0x76FB, 0xB160, 0x76FD, + 0xB161, 0x76FF, 0xB162, 0x7700, 0xB163, 0x7702, 0xB164, 0x7703, + 0xB165, 0x7705, 0xB166, 0x7706, 0xB167, 0x770A, 0xB168, 0x770C, + 0xB169, 0x770E, 0xB16A, 0x770F, 0xB16B, 0x7710, 0xB16C, 0x7711, + 0xB16D, 0x7712, 0xB16E, 0x7713, 0xB16F, 0x7714, 0xB170, 0x7715, + 0xB171, 0x7716, 0xB172, 0x7717, 0xB173, 0x7718, 0xB174, 0x771B, + 0xB175, 0x771C, 0xB176, 0x771D, 0xB177, 0x771E, 0xB178, 0x7721, + 0xB179, 0x7723, 0xB17A, 0x7724, 0xB17B, 0x7725, 0xB17C, 0x7727, + 0xB17D, 0x772A, 0xB17E, 0x772B, 0xB180, 0x772C, 0xB181, 0x772E, + 0xB182, 0x7730, 0xB183, 0x7731, 0xB184, 0x7732, 0xB185, 0x7733, + 0xB186, 0x7734, 0xB187, 0x7739, 0xB188, 0x773B, 0xB189, 0x773D, + 0xB18A, 0x773E, 0xB18B, 0x773F, 0xB18C, 0x7742, 0xB18D, 0x7744, + 0xB18E, 0x7745, 0xB18F, 0x7746, 0xB190, 0x7748, 0xB191, 0x7749, + 0xB192, 0x774A, 0xB193, 0x774B, 0xB194, 0x774C, 0xB195, 0x774D, + 0xB196, 0x774E, 0xB197, 0x774F, 0xB198, 0x7752, 0xB199, 0x7753, + 0xB19A, 0x7754, 0xB19B, 0x7755, 0xB19C, 0x7756, 0xB19D, 0x7757, + 0xB19E, 0x7758, 0xB19F, 0x7759, 0xB1A0, 0x775C, 0xB1A1, 0x8584, + 0xB1A2, 0x96F9, 0xB1A3, 0x4FDD, 0xB1A4, 0x5821, 0xB1A5, 0x9971, + 0xB1A6, 0x5B9D, 0xB1A7, 0x62B1, 0xB1A8, 0x62A5, 0xB1A9, 0x66B4, + 0xB1AA, 0x8C79, 0xB1AB, 0x9C8D, 0xB1AC, 0x7206, 0xB1AD, 0x676F, + 0xB1AE, 0x7891, 0xB1AF, 0x60B2, 0xB1B0, 0x5351, 0xB1B1, 0x5317, + 0xB1B2, 0x8F88, 0xB1B3, 0x80CC, 0xB1B4, 0x8D1D, 0xB1B5, 0x94A1, + 0xB1B6, 0x500D, 0xB1B7, 0x72C8, 0xB1B8, 0x5907, 0xB1B9, 0x60EB, + 0xB1BA, 0x7119, 0xB1BB, 0x88AB, 0xB1BC, 0x5954, 0xB1BD, 0x82EF, + 0xB1BE, 0x672C, 0xB1BF, 0x7B28, 0xB1C0, 0x5D29, 0xB1C1, 0x7EF7, + 0xB1C2, 0x752D, 0xB1C3, 0x6CF5, 0xB1C4, 0x8E66, 0xB1C5, 0x8FF8, + 0xB1C6, 0x903C, 0xB1C7, 0x9F3B, 0xB1C8, 0x6BD4, 0xB1C9, 0x9119, + 0xB1CA, 0x7B14, 0xB1CB, 0x5F7C, 0xB1CC, 0x78A7, 0xB1CD, 0x84D6, + 0xB1CE, 0x853D, 0xB1CF, 0x6BD5, 0xB1D0, 0x6BD9, 0xB1D1, 0x6BD6, + 0xB1D2, 0x5E01, 0xB1D3, 0x5E87, 0xB1D4, 0x75F9, 0xB1D5, 0x95ED, + 0xB1D6, 0x655D, 0xB1D7, 0x5F0A, 0xB1D8, 0x5FC5, 0xB1D9, 0x8F9F, + 0xB1DA, 0x58C1, 0xB1DB, 0x81C2, 0xB1DC, 0x907F, 0xB1DD, 0x965B, + 0xB1DE, 0x97AD, 0xB1DF, 0x8FB9, 0xB1E0, 0x7F16, 0xB1E1, 0x8D2C, + 0xB1E2, 0x6241, 0xB1E3, 0x4FBF, 0xB1E4, 0x53D8, 0xB1E5, 0x535E, + 0xB1E6, 0x8FA8, 0xB1E7, 0x8FA9, 0xB1E8, 0x8FAB, 0xB1E9, 0x904D, + 0xB1EA, 0x6807, 0xB1EB, 0x5F6A, 0xB1EC, 0x8198, 0xB1ED, 0x8868, + 0xB1EE, 0x9CD6, 0xB1EF, 0x618B, 0xB1F0, 0x522B, 0xB1F1, 0x762A, + 0xB1F2, 0x5F6C, 0xB1F3, 0x658C, 0xB1F4, 0x6FD2, 0xB1F5, 0x6EE8, + 0xB1F6, 0x5BBE, 0xB1F7, 0x6448, 0xB1F8, 0x5175, 0xB1F9, 0x51B0, + 0xB1FA, 0x67C4, 0xB1FB, 0x4E19, 0xB1FC, 0x79C9, 0xB1FD, 0x997C, + 0xB1FE, 0x70B3, 0xB240, 0x775D, 0xB241, 0x775E, 0xB242, 0x775F, + 0xB243, 0x7760, 0xB244, 0x7764, 0xB245, 0x7767, 0xB246, 0x7769, + 0xB247, 0x776A, 0xB248, 0x776D, 0xB249, 0x776E, 0xB24A, 0x776F, + 0xB24B, 0x7770, 0xB24C, 0x7771, 0xB24D, 0x7772, 0xB24E, 0x7773, + 0xB24F, 0x7774, 0xB250, 0x7775, 0xB251, 0x7776, 0xB252, 0x7777, + 0xB253, 0x7778, 0xB254, 0x777A, 0xB255, 0x777B, 0xB256, 0x777C, + 0xB257, 0x7781, 0xB258, 0x7782, 0xB259, 0x7783, 0xB25A, 0x7786, + 0xB25B, 0x7787, 0xB25C, 0x7788, 0xB25D, 0x7789, 0xB25E, 0x778A, + 0xB25F, 0x778B, 0xB260, 0x778F, 0xB261, 0x7790, 0xB262, 0x7793, + 0xB263, 0x7794, 0xB264, 0x7795, 0xB265, 0x7796, 0xB266, 0x7797, + 0xB267, 0x7798, 0xB268, 0x7799, 0xB269, 0x779A, 0xB26A, 0x779B, + 0xB26B, 0x779C, 0xB26C, 0x779D, 0xB26D, 0x779E, 0xB26E, 0x77A1, + 0xB26F, 0x77A3, 0xB270, 0x77A4, 0xB271, 0x77A6, 0xB272, 0x77A8, + 0xB273, 0x77AB, 0xB274, 0x77AD, 0xB275, 0x77AE, 0xB276, 0x77AF, + 0xB277, 0x77B1, 0xB278, 0x77B2, 0xB279, 0x77B4, 0xB27A, 0x77B6, + 0xB27B, 0x77B7, 0xB27C, 0x77B8, 0xB27D, 0x77B9, 0xB27E, 0x77BA, + 0xB280, 0x77BC, 0xB281, 0x77BE, 0xB282, 0x77C0, 0xB283, 0x77C1, + 0xB284, 0x77C2, 0xB285, 0x77C3, 0xB286, 0x77C4, 0xB287, 0x77C5, + 0xB288, 0x77C6, 0xB289, 0x77C7, 0xB28A, 0x77C8, 0xB28B, 0x77C9, + 0xB28C, 0x77CA, 0xB28D, 0x77CB, 0xB28E, 0x77CC, 0xB28F, 0x77CE, + 0xB290, 0x77CF, 0xB291, 0x77D0, 0xB292, 0x77D1, 0xB293, 0x77D2, + 0xB294, 0x77D3, 0xB295, 0x77D4, 0xB296, 0x77D5, 0xB297, 0x77D6, + 0xB298, 0x77D8, 0xB299, 0x77D9, 0xB29A, 0x77DA, 0xB29B, 0x77DD, + 0xB29C, 0x77DE, 0xB29D, 0x77DF, 0xB29E, 0x77E0, 0xB29F, 0x77E1, + 0xB2A0, 0x77E4, 0xB2A1, 0x75C5, 0xB2A2, 0x5E76, 0xB2A3, 0x73BB, + 0xB2A4, 0x83E0, 0xB2A5, 0x64AD, 0xB2A6, 0x62E8, 0xB2A7, 0x94B5, + 0xB2A8, 0x6CE2, 0xB2A9, 0x535A, 0xB2AA, 0x52C3, 0xB2AB, 0x640F, + 0xB2AC, 0x94C2, 0xB2AD, 0x7B94, 0xB2AE, 0x4F2F, 0xB2AF, 0x5E1B, + 0xB2B0, 0x8236, 0xB2B1, 0x8116, 0xB2B2, 0x818A, 0xB2B3, 0x6E24, + 0xB2B4, 0x6CCA, 0xB2B5, 0x9A73, 0xB2B6, 0x6355, 0xB2B7, 0x535C, + 0xB2B8, 0x54FA, 0xB2B9, 0x8865, 0xB2BA, 0x57E0, 0xB2BB, 0x4E0D, + 0xB2BC, 0x5E03, 0xB2BD, 0x6B65, 0xB2BE, 0x7C3F, 0xB2BF, 0x90E8, + 0xB2C0, 0x6016, 0xB2C1, 0x64E6, 0xB2C2, 0x731C, 0xB2C3, 0x88C1, + 0xB2C4, 0x6750, 0xB2C5, 0x624D, 0xB2C6, 0x8D22, 0xB2C7, 0x776C, + 0xB2C8, 0x8E29, 0xB2C9, 0x91C7, 0xB2CA, 0x5F69, 0xB2CB, 0x83DC, + 0xB2CC, 0x8521, 0xB2CD, 0x9910, 0xB2CE, 0x53C2, 0xB2CF, 0x8695, + 0xB2D0, 0x6B8B, 0xB2D1, 0x60ED, 0xB2D2, 0x60E8, 0xB2D3, 0x707F, + 0xB2D4, 0x82CD, 0xB2D5, 0x8231, 0xB2D6, 0x4ED3, 0xB2D7, 0x6CA7, + 0xB2D8, 0x85CF, 0xB2D9, 0x64CD, 0xB2DA, 0x7CD9, 0xB2DB, 0x69FD, + 0xB2DC, 0x66F9, 0xB2DD, 0x8349, 0xB2DE, 0x5395, 0xB2DF, 0x7B56, + 0xB2E0, 0x4FA7, 0xB2E1, 0x518C, 0xB2E2, 0x6D4B, 0xB2E3, 0x5C42, + 0xB2E4, 0x8E6D, 0xB2E5, 0x63D2, 0xB2E6, 0x53C9, 0xB2E7, 0x832C, + 0xB2E8, 0x8336, 0xB2E9, 0x67E5, 0xB2EA, 0x78B4, 0xB2EB, 0x643D, + 0xB2EC, 0x5BDF, 0xB2ED, 0x5C94, 0xB2EE, 0x5DEE, 0xB2EF, 0x8BE7, + 0xB2F0, 0x62C6, 0xB2F1, 0x67F4, 0xB2F2, 0x8C7A, 0xB2F3, 0x6400, + 0xB2F4, 0x63BA, 0xB2F5, 0x8749, 0xB2F6, 0x998B, 0xB2F7, 0x8C17, + 0xB2F8, 0x7F20, 0xB2F9, 0x94F2, 0xB2FA, 0x4EA7, 0xB2FB, 0x9610, + 0xB2FC, 0x98A4, 0xB2FD, 0x660C, 0xB2FE, 0x7316, 0xB340, 0x77E6, + 0xB341, 0x77E8, 0xB342, 0x77EA, 0xB343, 0x77EF, 0xB344, 0x77F0, + 0xB345, 0x77F1, 0xB346, 0x77F2, 0xB347, 0x77F4, 0xB348, 0x77F5, + 0xB349, 0x77F7, 0xB34A, 0x77F9, 0xB34B, 0x77FA, 0xB34C, 0x77FB, + 0xB34D, 0x77FC, 0xB34E, 0x7803, 0xB34F, 0x7804, 0xB350, 0x7805, + 0xB351, 0x7806, 0xB352, 0x7807, 0xB353, 0x7808, 0xB354, 0x780A, + 0xB355, 0x780B, 0xB356, 0x780E, 0xB357, 0x780F, 0xB358, 0x7810, + 0xB359, 0x7813, 0xB35A, 0x7815, 0xB35B, 0x7819, 0xB35C, 0x781B, + 0xB35D, 0x781E, 0xB35E, 0x7820, 0xB35F, 0x7821, 0xB360, 0x7822, + 0xB361, 0x7824, 0xB362, 0x7828, 0xB363, 0x782A, 0xB364, 0x782B, + 0xB365, 0x782E, 0xB366, 0x782F, 0xB367, 0x7831, 0xB368, 0x7832, + 0xB369, 0x7833, 0xB36A, 0x7835, 0xB36B, 0x7836, 0xB36C, 0x783D, + 0xB36D, 0x783F, 0xB36E, 0x7841, 0xB36F, 0x7842, 0xB370, 0x7843, + 0xB371, 0x7844, 0xB372, 0x7846, 0xB373, 0x7848, 0xB374, 0x7849, + 0xB375, 0x784A, 0xB376, 0x784B, 0xB377, 0x784D, 0xB378, 0x784F, + 0xB379, 0x7851, 0xB37A, 0x7853, 0xB37B, 0x7854, 0xB37C, 0x7858, + 0xB37D, 0x7859, 0xB37E, 0x785A, 0xB380, 0x785B, 0xB381, 0x785C, + 0xB382, 0x785E, 0xB383, 0x785F, 0xB384, 0x7860, 0xB385, 0x7861, + 0xB386, 0x7862, 0xB387, 0x7863, 0xB388, 0x7864, 0xB389, 0x7865, + 0xB38A, 0x7866, 0xB38B, 0x7867, 0xB38C, 0x7868, 0xB38D, 0x7869, + 0xB38E, 0x786F, 0xB38F, 0x7870, 0xB390, 0x7871, 0xB391, 0x7872, + 0xB392, 0x7873, 0xB393, 0x7874, 0xB394, 0x7875, 0xB395, 0x7876, + 0xB396, 0x7878, 0xB397, 0x7879, 0xB398, 0x787A, 0xB399, 0x787B, + 0xB39A, 0x787D, 0xB39B, 0x787E, 0xB39C, 0x787F, 0xB39D, 0x7880, + 0xB39E, 0x7881, 0xB39F, 0x7882, 0xB3A0, 0x7883, 0xB3A1, 0x573A, + 0xB3A2, 0x5C1D, 0xB3A3, 0x5E38, 0xB3A4, 0x957F, 0xB3A5, 0x507F, + 0xB3A6, 0x80A0, 0xB3A7, 0x5382, 0xB3A8, 0x655E, 0xB3A9, 0x7545, + 0xB3AA, 0x5531, 0xB3AB, 0x5021, 0xB3AC, 0x8D85, 0xB3AD, 0x6284, + 0xB3AE, 0x949E, 0xB3AF, 0x671D, 0xB3B0, 0x5632, 0xB3B1, 0x6F6E, + 0xB3B2, 0x5DE2, 0xB3B3, 0x5435, 0xB3B4, 0x7092, 0xB3B5, 0x8F66, + 0xB3B6, 0x626F, 0xB3B7, 0x64A4, 0xB3B8, 0x63A3, 0xB3B9, 0x5F7B, + 0xB3BA, 0x6F88, 0xB3BB, 0x90F4, 0xB3BC, 0x81E3, 0xB3BD, 0x8FB0, + 0xB3BE, 0x5C18, 0xB3BF, 0x6668, 0xB3C0, 0x5FF1, 0xB3C1, 0x6C89, + 0xB3C2, 0x9648, 0xB3C3, 0x8D81, 0xB3C4, 0x886C, 0xB3C5, 0x6491, + 0xB3C6, 0x79F0, 0xB3C7, 0x57CE, 0xB3C8, 0x6A59, 0xB3C9, 0x6210, + 0xB3CA, 0x5448, 0xB3CB, 0x4E58, 0xB3CC, 0x7A0B, 0xB3CD, 0x60E9, + 0xB3CE, 0x6F84, 0xB3CF, 0x8BDA, 0xB3D0, 0x627F, 0xB3D1, 0x901E, + 0xB3D2, 0x9A8B, 0xB3D3, 0x79E4, 0xB3D4, 0x5403, 0xB3D5, 0x75F4, + 0xB3D6, 0x6301, 0xB3D7, 0x5319, 0xB3D8, 0x6C60, 0xB3D9, 0x8FDF, + 0xB3DA, 0x5F1B, 0xB3DB, 0x9A70, 0xB3DC, 0x803B, 0xB3DD, 0x9F7F, + 0xB3DE, 0x4F88, 0xB3DF, 0x5C3A, 0xB3E0, 0x8D64, 0xB3E1, 0x7FC5, + 0xB3E2, 0x65A5, 0xB3E3, 0x70BD, 0xB3E4, 0x5145, 0xB3E5, 0x51B2, + 0xB3E6, 0x866B, 0xB3E7, 0x5D07, 0xB3E8, 0x5BA0, 0xB3E9, 0x62BD, + 0xB3EA, 0x916C, 0xB3EB, 0x7574, 0xB3EC, 0x8E0C, 0xB3ED, 0x7A20, + 0xB3EE, 0x6101, 0xB3EF, 0x7B79, 0xB3F0, 0x4EC7, 0xB3F1, 0x7EF8, + 0xB3F2, 0x7785, 0xB3F3, 0x4E11, 0xB3F4, 0x81ED, 0xB3F5, 0x521D, + 0xB3F6, 0x51FA, 0xB3F7, 0x6A71, 0xB3F8, 0x53A8, 0xB3F9, 0x8E87, + 0xB3FA, 0x9504, 0xB3FB, 0x96CF, 0xB3FC, 0x6EC1, 0xB3FD, 0x9664, + 0xB3FE, 0x695A, 0xB440, 0x7884, 0xB441, 0x7885, 0xB442, 0x7886, + 0xB443, 0x7888, 0xB444, 0x788A, 0xB445, 0x788B, 0xB446, 0x788F, + 0xB447, 0x7890, 0xB448, 0x7892, 0xB449, 0x7894, 0xB44A, 0x7895, + 0xB44B, 0x7896, 0xB44C, 0x7899, 0xB44D, 0x789D, 0xB44E, 0x789E, + 0xB44F, 0x78A0, 0xB450, 0x78A2, 0xB451, 0x78A4, 0xB452, 0x78A6, + 0xB453, 0x78A8, 0xB454, 0x78A9, 0xB455, 0x78AA, 0xB456, 0x78AB, + 0xB457, 0x78AC, 0xB458, 0x78AD, 0xB459, 0x78AE, 0xB45A, 0x78AF, + 0xB45B, 0x78B5, 0xB45C, 0x78B6, 0xB45D, 0x78B7, 0xB45E, 0x78B8, + 0xB45F, 0x78BA, 0xB460, 0x78BB, 0xB461, 0x78BC, 0xB462, 0x78BD, + 0xB463, 0x78BF, 0xB464, 0x78C0, 0xB465, 0x78C2, 0xB466, 0x78C3, + 0xB467, 0x78C4, 0xB468, 0x78C6, 0xB469, 0x78C7, 0xB46A, 0x78C8, + 0xB46B, 0x78CC, 0xB46C, 0x78CD, 0xB46D, 0x78CE, 0xB46E, 0x78CF, + 0xB46F, 0x78D1, 0xB470, 0x78D2, 0xB471, 0x78D3, 0xB472, 0x78D6, + 0xB473, 0x78D7, 0xB474, 0x78D8, 0xB475, 0x78DA, 0xB476, 0x78DB, + 0xB477, 0x78DC, 0xB478, 0x78DD, 0xB479, 0x78DE, 0xB47A, 0x78DF, + 0xB47B, 0x78E0, 0xB47C, 0x78E1, 0xB47D, 0x78E2, 0xB47E, 0x78E3, + 0xB480, 0x78E4, 0xB481, 0x78E5, 0xB482, 0x78E6, 0xB483, 0x78E7, + 0xB484, 0x78E9, 0xB485, 0x78EA, 0xB486, 0x78EB, 0xB487, 0x78ED, + 0xB488, 0x78EE, 0xB489, 0x78EF, 0xB48A, 0x78F0, 0xB48B, 0x78F1, + 0xB48C, 0x78F3, 0xB48D, 0x78F5, 0xB48E, 0x78F6, 0xB48F, 0x78F8, + 0xB490, 0x78F9, 0xB491, 0x78FB, 0xB492, 0x78FC, 0xB493, 0x78FD, + 0xB494, 0x78FE, 0xB495, 0x78FF, 0xB496, 0x7900, 0xB497, 0x7902, + 0xB498, 0x7903, 0xB499, 0x7904, 0xB49A, 0x7906, 0xB49B, 0x7907, + 0xB49C, 0x7908, 0xB49D, 0x7909, 0xB49E, 0x790A, 0xB49F, 0x790B, + 0xB4A0, 0x790C, 0xB4A1, 0x7840, 0xB4A2, 0x50A8, 0xB4A3, 0x77D7, + 0xB4A4, 0x6410, 0xB4A5, 0x89E6, 0xB4A6, 0x5904, 0xB4A7, 0x63E3, + 0xB4A8, 0x5DDD, 0xB4A9, 0x7A7F, 0xB4AA, 0x693D, 0xB4AB, 0x4F20, + 0xB4AC, 0x8239, 0xB4AD, 0x5598, 0xB4AE, 0x4E32, 0xB4AF, 0x75AE, + 0xB4B0, 0x7A97, 0xB4B1, 0x5E62, 0xB4B2, 0x5E8A, 0xB4B3, 0x95EF, + 0xB4B4, 0x521B, 0xB4B5, 0x5439, 0xB4B6, 0x708A, 0xB4B7, 0x6376, + 0xB4B8, 0x9524, 0xB4B9, 0x5782, 0xB4BA, 0x6625, 0xB4BB, 0x693F, + 0xB4BC, 0x9187, 0xB4BD, 0x5507, 0xB4BE, 0x6DF3, 0xB4BF, 0x7EAF, + 0xB4C0, 0x8822, 0xB4C1, 0x6233, 0xB4C2, 0x7EF0, 0xB4C3, 0x75B5, + 0xB4C4, 0x8328, 0xB4C5, 0x78C1, 0xB4C6, 0x96CC, 0xB4C7, 0x8F9E, + 0xB4C8, 0x6148, 0xB4C9, 0x74F7, 0xB4CA, 0x8BCD, 0xB4CB, 0x6B64, + 0xB4CC, 0x523A, 0xB4CD, 0x8D50, 0xB4CE, 0x6B21, 0xB4CF, 0x806A, + 0xB4D0, 0x8471, 0xB4D1, 0x56F1, 0xB4D2, 0x5306, 0xB4D3, 0x4ECE, + 0xB4D4, 0x4E1B, 0xB4D5, 0x51D1, 0xB4D6, 0x7C97, 0xB4D7, 0x918B, + 0xB4D8, 0x7C07, 0xB4D9, 0x4FC3, 0xB4DA, 0x8E7F, 0xB4DB, 0x7BE1, + 0xB4DC, 0x7A9C, 0xB4DD, 0x6467, 0xB4DE, 0x5D14, 0xB4DF, 0x50AC, + 0xB4E0, 0x8106, 0xB4E1, 0x7601, 0xB4E2, 0x7CB9, 0xB4E3, 0x6DEC, + 0xB4E4, 0x7FE0, 0xB4E5, 0x6751, 0xB4E6, 0x5B58, 0xB4E7, 0x5BF8, + 0xB4E8, 0x78CB, 0xB4E9, 0x64AE, 0xB4EA, 0x6413, 0xB4EB, 0x63AA, + 0xB4EC, 0x632B, 0xB4ED, 0x9519, 0xB4EE, 0x642D, 0xB4EF, 0x8FBE, + 0xB4F0, 0x7B54, 0xB4F1, 0x7629, 0xB4F2, 0x6253, 0xB4F3, 0x5927, + 0xB4F4, 0x5446, 0xB4F5, 0x6B79, 0xB4F6, 0x50A3, 0xB4F7, 0x6234, + 0xB4F8, 0x5E26, 0xB4F9, 0x6B86, 0xB4FA, 0x4EE3, 0xB4FB, 0x8D37, + 0xB4FC, 0x888B, 0xB4FD, 0x5F85, 0xB4FE, 0x902E, 0xB540, 0x790D, + 0xB541, 0x790E, 0xB542, 0x790F, 0xB543, 0x7910, 0xB544, 0x7911, + 0xB545, 0x7912, 0xB546, 0x7914, 0xB547, 0x7915, 0xB548, 0x7916, + 0xB549, 0x7917, 0xB54A, 0x7918, 0xB54B, 0x7919, 0xB54C, 0x791A, + 0xB54D, 0x791B, 0xB54E, 0x791C, 0xB54F, 0x791D, 0xB550, 0x791F, + 0xB551, 0x7920, 0xB552, 0x7921, 0xB553, 0x7922, 0xB554, 0x7923, + 0xB555, 0x7925, 0xB556, 0x7926, 0xB557, 0x7927, 0xB558, 0x7928, + 0xB559, 0x7929, 0xB55A, 0x792A, 0xB55B, 0x792B, 0xB55C, 0x792C, + 0xB55D, 0x792D, 0xB55E, 0x792E, 0xB55F, 0x792F, 0xB560, 0x7930, + 0xB561, 0x7931, 0xB562, 0x7932, 0xB563, 0x7933, 0xB564, 0x7935, + 0xB565, 0x7936, 0xB566, 0x7937, 0xB567, 0x7938, 0xB568, 0x7939, + 0xB569, 0x793D, 0xB56A, 0x793F, 0xB56B, 0x7942, 0xB56C, 0x7943, + 0xB56D, 0x7944, 0xB56E, 0x7945, 0xB56F, 0x7947, 0xB570, 0x794A, + 0xB571, 0x794B, 0xB572, 0x794C, 0xB573, 0x794D, 0xB574, 0x794E, + 0xB575, 0x794F, 0xB576, 0x7950, 0xB577, 0x7951, 0xB578, 0x7952, + 0xB579, 0x7954, 0xB57A, 0x7955, 0xB57B, 0x7958, 0xB57C, 0x7959, + 0xB57D, 0x7961, 0xB57E, 0x7963, 0xB580, 0x7964, 0xB581, 0x7966, + 0xB582, 0x7969, 0xB583, 0x796A, 0xB584, 0x796B, 0xB585, 0x796C, + 0xB586, 0x796E, 0xB587, 0x7970, 0xB588, 0x7971, 0xB589, 0x7972, + 0xB58A, 0x7973, 0xB58B, 0x7974, 0xB58C, 0x7975, 0xB58D, 0x7976, + 0xB58E, 0x7979, 0xB58F, 0x797B, 0xB590, 0x797C, 0xB591, 0x797D, + 0xB592, 0x797E, 0xB593, 0x797F, 0xB594, 0x7982, 0xB595, 0x7983, + 0xB596, 0x7986, 0xB597, 0x7987, 0xB598, 0x7988, 0xB599, 0x7989, + 0xB59A, 0x798B, 0xB59B, 0x798C, 0xB59C, 0x798D, 0xB59D, 0x798E, + 0xB59E, 0x7990, 0xB59F, 0x7991, 0xB5A0, 0x7992, 0xB5A1, 0x6020, + 0xB5A2, 0x803D, 0xB5A3, 0x62C5, 0xB5A4, 0x4E39, 0xB5A5, 0x5355, + 0xB5A6, 0x90F8, 0xB5A7, 0x63B8, 0xB5A8, 0x80C6, 0xB5A9, 0x65E6, + 0xB5AA, 0x6C2E, 0xB5AB, 0x4F46, 0xB5AC, 0x60EE, 0xB5AD, 0x6DE1, + 0xB5AE, 0x8BDE, 0xB5AF, 0x5F39, 0xB5B0, 0x86CB, 0xB5B1, 0x5F53, + 0xB5B2, 0x6321, 0xB5B3, 0x515A, 0xB5B4, 0x8361, 0xB5B5, 0x6863, + 0xB5B6, 0x5200, 0xB5B7, 0x6363, 0xB5B8, 0x8E48, 0xB5B9, 0x5012, + 0xB5BA, 0x5C9B, 0xB5BB, 0x7977, 0xB5BC, 0x5BFC, 0xB5BD, 0x5230, + 0xB5BE, 0x7A3B, 0xB5BF, 0x60BC, 0xB5C0, 0x9053, 0xB5C1, 0x76D7, + 0xB5C2, 0x5FB7, 0xB5C3, 0x5F97, 0xB5C4, 0x7684, 0xB5C5, 0x8E6C, + 0xB5C6, 0x706F, 0xB5C7, 0x767B, 0xB5C8, 0x7B49, 0xB5C9, 0x77AA, + 0xB5CA, 0x51F3, 0xB5CB, 0x9093, 0xB5CC, 0x5824, 0xB5CD, 0x4F4E, + 0xB5CE, 0x6EF4, 0xB5CF, 0x8FEA, 0xB5D0, 0x654C, 0xB5D1, 0x7B1B, + 0xB5D2, 0x72C4, 0xB5D3, 0x6DA4, 0xB5D4, 0x7FDF, 0xB5D5, 0x5AE1, + 0xB5D6, 0x62B5, 0xB5D7, 0x5E95, 0xB5D8, 0x5730, 0xB5D9, 0x8482, + 0xB5DA, 0x7B2C, 0xB5DB, 0x5E1D, 0xB5DC, 0x5F1F, 0xB5DD, 0x9012, + 0xB5DE, 0x7F14, 0xB5DF, 0x98A0, 0xB5E0, 0x6382, 0xB5E1, 0x6EC7, + 0xB5E2, 0x7898, 0xB5E3, 0x70B9, 0xB5E4, 0x5178, 0xB5E5, 0x975B, + 0xB5E6, 0x57AB, 0xB5E7, 0x7535, 0xB5E8, 0x4F43, 0xB5E9, 0x7538, + 0xB5EA, 0x5E97, 0xB5EB, 0x60E6, 0xB5EC, 0x5960, 0xB5ED, 0x6DC0, + 0xB5EE, 0x6BBF, 0xB5EF, 0x7889, 0xB5F0, 0x53FC, 0xB5F1, 0x96D5, + 0xB5F2, 0x51CB, 0xB5F3, 0x5201, 0xB5F4, 0x6389, 0xB5F5, 0x540A, + 0xB5F6, 0x9493, 0xB5F7, 0x8C03, 0xB5F8, 0x8DCC, 0xB5F9, 0x7239, + 0xB5FA, 0x789F, 0xB5FB, 0x8776, 0xB5FC, 0x8FED, 0xB5FD, 0x8C0D, + 0xB5FE, 0x53E0, 0xB640, 0x7993, 0xB641, 0x7994, 0xB642, 0x7995, + 0xB643, 0x7996, 0xB644, 0x7997, 0xB645, 0x7998, 0xB646, 0x7999, + 0xB647, 0x799B, 0xB648, 0x799C, 0xB649, 0x799D, 0xB64A, 0x799E, + 0xB64B, 0x799F, 0xB64C, 0x79A0, 0xB64D, 0x79A1, 0xB64E, 0x79A2, + 0xB64F, 0x79A3, 0xB650, 0x79A4, 0xB651, 0x79A5, 0xB652, 0x79A6, + 0xB653, 0x79A8, 0xB654, 0x79A9, 0xB655, 0x79AA, 0xB656, 0x79AB, + 0xB657, 0x79AC, 0xB658, 0x79AD, 0xB659, 0x79AE, 0xB65A, 0x79AF, + 0xB65B, 0x79B0, 0xB65C, 0x79B1, 0xB65D, 0x79B2, 0xB65E, 0x79B4, + 0xB65F, 0x79B5, 0xB660, 0x79B6, 0xB661, 0x79B7, 0xB662, 0x79B8, + 0xB663, 0x79BC, 0xB664, 0x79BF, 0xB665, 0x79C2, 0xB666, 0x79C4, + 0xB667, 0x79C5, 0xB668, 0x79C7, 0xB669, 0x79C8, 0xB66A, 0x79CA, + 0xB66B, 0x79CC, 0xB66C, 0x79CE, 0xB66D, 0x79CF, 0xB66E, 0x79D0, + 0xB66F, 0x79D3, 0xB670, 0x79D4, 0xB671, 0x79D6, 0xB672, 0x79D7, + 0xB673, 0x79D9, 0xB674, 0x79DA, 0xB675, 0x79DB, 0xB676, 0x79DC, + 0xB677, 0x79DD, 0xB678, 0x79DE, 0xB679, 0x79E0, 0xB67A, 0x79E1, + 0xB67B, 0x79E2, 0xB67C, 0x79E5, 0xB67D, 0x79E8, 0xB67E, 0x79EA, + 0xB680, 0x79EC, 0xB681, 0x79EE, 0xB682, 0x79F1, 0xB683, 0x79F2, + 0xB684, 0x79F3, 0xB685, 0x79F4, 0xB686, 0x79F5, 0xB687, 0x79F6, + 0xB688, 0x79F7, 0xB689, 0x79F9, 0xB68A, 0x79FA, 0xB68B, 0x79FC, + 0xB68C, 0x79FE, 0xB68D, 0x79FF, 0xB68E, 0x7A01, 0xB68F, 0x7A04, + 0xB690, 0x7A05, 0xB691, 0x7A07, 0xB692, 0x7A08, 0xB693, 0x7A09, + 0xB694, 0x7A0A, 0xB695, 0x7A0C, 0xB696, 0x7A0F, 0xB697, 0x7A10, + 0xB698, 0x7A11, 0xB699, 0x7A12, 0xB69A, 0x7A13, 0xB69B, 0x7A15, + 0xB69C, 0x7A16, 0xB69D, 0x7A18, 0xB69E, 0x7A19, 0xB69F, 0x7A1B, + 0xB6A0, 0x7A1C, 0xB6A1, 0x4E01, 0xB6A2, 0x76EF, 0xB6A3, 0x53EE, + 0xB6A4, 0x9489, 0xB6A5, 0x9876, 0xB6A6, 0x9F0E, 0xB6A7, 0x952D, + 0xB6A8, 0x5B9A, 0xB6A9, 0x8BA2, 0xB6AA, 0x4E22, 0xB6AB, 0x4E1C, + 0xB6AC, 0x51AC, 0xB6AD, 0x8463, 0xB6AE, 0x61C2, 0xB6AF, 0x52A8, + 0xB6B0, 0x680B, 0xB6B1, 0x4F97, 0xB6B2, 0x606B, 0xB6B3, 0x51BB, + 0xB6B4, 0x6D1E, 0xB6B5, 0x515C, 0xB6B6, 0x6296, 0xB6B7, 0x6597, + 0xB6B8, 0x9661, 0xB6B9, 0x8C46, 0xB6BA, 0x9017, 0xB6BB, 0x75D8, + 0xB6BC, 0x90FD, 0xB6BD, 0x7763, 0xB6BE, 0x6BD2, 0xB6BF, 0x728A, + 0xB6C0, 0x72EC, 0xB6C1, 0x8BFB, 0xB6C2, 0x5835, 0xB6C3, 0x7779, + 0xB6C4, 0x8D4C, 0xB6C5, 0x675C, 0xB6C6, 0x9540, 0xB6C7, 0x809A, + 0xB6C8, 0x5EA6, 0xB6C9, 0x6E21, 0xB6CA, 0x5992, 0xB6CB, 0x7AEF, + 0xB6CC, 0x77ED, 0xB6CD, 0x953B, 0xB6CE, 0x6BB5, 0xB6CF, 0x65AD, + 0xB6D0, 0x7F0E, 0xB6D1, 0x5806, 0xB6D2, 0x5151, 0xB6D3, 0x961F, + 0xB6D4, 0x5BF9, 0xB6D5, 0x58A9, 0xB6D6, 0x5428, 0xB6D7, 0x8E72, + 0xB6D8, 0x6566, 0xB6D9, 0x987F, 0xB6DA, 0x56E4, 0xB6DB, 0x949D, + 0xB6DC, 0x76FE, 0xB6DD, 0x9041, 0xB6DE, 0x6387, 0xB6DF, 0x54C6, + 0xB6E0, 0x591A, 0xB6E1, 0x593A, 0xB6E2, 0x579B, 0xB6E3, 0x8EB2, + 0xB6E4, 0x6735, 0xB6E5, 0x8DFA, 0xB6E6, 0x8235, 0xB6E7, 0x5241, + 0xB6E8, 0x60F0, 0xB6E9, 0x5815, 0xB6EA, 0x86FE, 0xB6EB, 0x5CE8, + 0xB6EC, 0x9E45, 0xB6ED, 0x4FC4, 0xB6EE, 0x989D, 0xB6EF, 0x8BB9, + 0xB6F0, 0x5A25, 0xB6F1, 0x6076, 0xB6F2, 0x5384, 0xB6F3, 0x627C, + 0xB6F4, 0x904F, 0xB6F5, 0x9102, 0xB6F6, 0x997F, 0xB6F7, 0x6069, + 0xB6F8, 0x800C, 0xB6F9, 0x513F, 0xB6FA, 0x8033, 0xB6FB, 0x5C14, + 0xB6FC, 0x9975, 0xB6FD, 0x6D31, 0xB6FE, 0x4E8C, 0xB740, 0x7A1D, + 0xB741, 0x7A1F, 0xB742, 0x7A21, 0xB743, 0x7A22, 0xB744, 0x7A24, + 0xB745, 0x7A25, 0xB746, 0x7A26, 0xB747, 0x7A27, 0xB748, 0x7A28, + 0xB749, 0x7A29, 0xB74A, 0x7A2A, 0xB74B, 0x7A2B, 0xB74C, 0x7A2C, + 0xB74D, 0x7A2D, 0xB74E, 0x7A2E, 0xB74F, 0x7A2F, 0xB750, 0x7A30, + 0xB751, 0x7A31, 0xB752, 0x7A32, 0xB753, 0x7A34, 0xB754, 0x7A35, + 0xB755, 0x7A36, 0xB756, 0x7A38, 0xB757, 0x7A3A, 0xB758, 0x7A3E, + 0xB759, 0x7A40, 0xB75A, 0x7A41, 0xB75B, 0x7A42, 0xB75C, 0x7A43, + 0xB75D, 0x7A44, 0xB75E, 0x7A45, 0xB75F, 0x7A47, 0xB760, 0x7A48, + 0xB761, 0x7A49, 0xB762, 0x7A4A, 0xB763, 0x7A4B, 0xB764, 0x7A4C, + 0xB765, 0x7A4D, 0xB766, 0x7A4E, 0xB767, 0x7A4F, 0xB768, 0x7A50, + 0xB769, 0x7A52, 0xB76A, 0x7A53, 0xB76B, 0x7A54, 0xB76C, 0x7A55, + 0xB76D, 0x7A56, 0xB76E, 0x7A58, 0xB76F, 0x7A59, 0xB770, 0x7A5A, + 0xB771, 0x7A5B, 0xB772, 0x7A5C, 0xB773, 0x7A5D, 0xB774, 0x7A5E, + 0xB775, 0x7A5F, 0xB776, 0x7A60, 0xB777, 0x7A61, 0xB778, 0x7A62, + 0xB779, 0x7A63, 0xB77A, 0x7A64, 0xB77B, 0x7A65, 0xB77C, 0x7A66, + 0xB77D, 0x7A67, 0xB77E, 0x7A68, 0xB780, 0x7A69, 0xB781, 0x7A6A, + 0xB782, 0x7A6B, 0xB783, 0x7A6C, 0xB784, 0x7A6D, 0xB785, 0x7A6E, + 0xB786, 0x7A6F, 0xB787, 0x7A71, 0xB788, 0x7A72, 0xB789, 0x7A73, + 0xB78A, 0x7A75, 0xB78B, 0x7A7B, 0xB78C, 0x7A7C, 0xB78D, 0x7A7D, + 0xB78E, 0x7A7E, 0xB78F, 0x7A82, 0xB790, 0x7A85, 0xB791, 0x7A87, + 0xB792, 0x7A89, 0xB793, 0x7A8A, 0xB794, 0x7A8B, 0xB795, 0x7A8C, + 0xB796, 0x7A8E, 0xB797, 0x7A8F, 0xB798, 0x7A90, 0xB799, 0x7A93, + 0xB79A, 0x7A94, 0xB79B, 0x7A99, 0xB79C, 0x7A9A, 0xB79D, 0x7A9B, + 0xB79E, 0x7A9E, 0xB79F, 0x7AA1, 0xB7A0, 0x7AA2, 0xB7A1, 0x8D30, + 0xB7A2, 0x53D1, 0xB7A3, 0x7F5A, 0xB7A4, 0x7B4F, 0xB7A5, 0x4F10, + 0xB7A6, 0x4E4F, 0xB7A7, 0x9600, 0xB7A8, 0x6CD5, 0xB7A9, 0x73D0, + 0xB7AA, 0x85E9, 0xB7AB, 0x5E06, 0xB7AC, 0x756A, 0xB7AD, 0x7FFB, + 0xB7AE, 0x6A0A, 0xB7AF, 0x77FE, 0xB7B0, 0x9492, 0xB7B1, 0x7E41, + 0xB7B2, 0x51E1, 0xB7B3, 0x70E6, 0xB7B4, 0x53CD, 0xB7B5, 0x8FD4, + 0xB7B6, 0x8303, 0xB7B7, 0x8D29, 0xB7B8, 0x72AF, 0xB7B9, 0x996D, + 0xB7BA, 0x6CDB, 0xB7BB, 0x574A, 0xB7BC, 0x82B3, 0xB7BD, 0x65B9, + 0xB7BE, 0x80AA, 0xB7BF, 0x623F, 0xB7C0, 0x9632, 0xB7C1, 0x59A8, + 0xB7C2, 0x4EFF, 0xB7C3, 0x8BBF, 0xB7C4, 0x7EBA, 0xB7C5, 0x653E, + 0xB7C6, 0x83F2, 0xB7C7, 0x975E, 0xB7C8, 0x5561, 0xB7C9, 0x98DE, + 0xB7CA, 0x80A5, 0xB7CB, 0x532A, 0xB7CC, 0x8BFD, 0xB7CD, 0x5420, + 0xB7CE, 0x80BA, 0xB7CF, 0x5E9F, 0xB7D0, 0x6CB8, 0xB7D1, 0x8D39, + 0xB7D2, 0x82AC, 0xB7D3, 0x915A, 0xB7D4, 0x5429, 0xB7D5, 0x6C1B, + 0xB7D6, 0x5206, 0xB7D7, 0x7EB7, 0xB7D8, 0x575F, 0xB7D9, 0x711A, + 0xB7DA, 0x6C7E, 0xB7DB, 0x7C89, 0xB7DC, 0x594B, 0xB7DD, 0x4EFD, + 0xB7DE, 0x5FFF, 0xB7DF, 0x6124, 0xB7E0, 0x7CAA, 0xB7E1, 0x4E30, + 0xB7E2, 0x5C01, 0xB7E3, 0x67AB, 0xB7E4, 0x8702, 0xB7E5, 0x5CF0, + 0xB7E6, 0x950B, 0xB7E7, 0x98CE, 0xB7E8, 0x75AF, 0xB7E9, 0x70FD, + 0xB7EA, 0x9022, 0xB7EB, 0x51AF, 0xB7EC, 0x7F1D, 0xB7ED, 0x8BBD, + 0xB7EE, 0x5949, 0xB7EF, 0x51E4, 0xB7F0, 0x4F5B, 0xB7F1, 0x5426, + 0xB7F2, 0x592B, 0xB7F3, 0x6577, 0xB7F4, 0x80A4, 0xB7F5, 0x5B75, + 0xB7F6, 0x6276, 0xB7F7, 0x62C2, 0xB7F8, 0x8F90, 0xB7F9, 0x5E45, + 0xB7FA, 0x6C1F, 0xB7FB, 0x7B26, 0xB7FC, 0x4F0F, 0xB7FD, 0x4FD8, + 0xB7FE, 0x670D, 0xB840, 0x7AA3, 0xB841, 0x7AA4, 0xB842, 0x7AA7, + 0xB843, 0x7AA9, 0xB844, 0x7AAA, 0xB845, 0x7AAB, 0xB846, 0x7AAE, + 0xB847, 0x7AAF, 0xB848, 0x7AB0, 0xB849, 0x7AB1, 0xB84A, 0x7AB2, + 0xB84B, 0x7AB4, 0xB84C, 0x7AB5, 0xB84D, 0x7AB6, 0xB84E, 0x7AB7, + 0xB84F, 0x7AB8, 0xB850, 0x7AB9, 0xB851, 0x7ABA, 0xB852, 0x7ABB, + 0xB853, 0x7ABC, 0xB854, 0x7ABD, 0xB855, 0x7ABE, 0xB856, 0x7AC0, + 0xB857, 0x7AC1, 0xB858, 0x7AC2, 0xB859, 0x7AC3, 0xB85A, 0x7AC4, + 0xB85B, 0x7AC5, 0xB85C, 0x7AC6, 0xB85D, 0x7AC7, 0xB85E, 0x7AC8, + 0xB85F, 0x7AC9, 0xB860, 0x7ACA, 0xB861, 0x7ACC, 0xB862, 0x7ACD, + 0xB863, 0x7ACE, 0xB864, 0x7ACF, 0xB865, 0x7AD0, 0xB866, 0x7AD1, + 0xB867, 0x7AD2, 0xB868, 0x7AD3, 0xB869, 0x7AD4, 0xB86A, 0x7AD5, + 0xB86B, 0x7AD7, 0xB86C, 0x7AD8, 0xB86D, 0x7ADA, 0xB86E, 0x7ADB, + 0xB86F, 0x7ADC, 0xB870, 0x7ADD, 0xB871, 0x7AE1, 0xB872, 0x7AE2, + 0xB873, 0x7AE4, 0xB874, 0x7AE7, 0xB875, 0x7AE8, 0xB876, 0x7AE9, + 0xB877, 0x7AEA, 0xB878, 0x7AEB, 0xB879, 0x7AEC, 0xB87A, 0x7AEE, + 0xB87B, 0x7AF0, 0xB87C, 0x7AF1, 0xB87D, 0x7AF2, 0xB87E, 0x7AF3, + 0xB880, 0x7AF4, 0xB881, 0x7AF5, 0xB882, 0x7AF6, 0xB883, 0x7AF7, + 0xB884, 0x7AF8, 0xB885, 0x7AFB, 0xB886, 0x7AFC, 0xB887, 0x7AFE, + 0xB888, 0x7B00, 0xB889, 0x7B01, 0xB88A, 0x7B02, 0xB88B, 0x7B05, + 0xB88C, 0x7B07, 0xB88D, 0x7B09, 0xB88E, 0x7B0C, 0xB88F, 0x7B0D, + 0xB890, 0x7B0E, 0xB891, 0x7B10, 0xB892, 0x7B12, 0xB893, 0x7B13, + 0xB894, 0x7B16, 0xB895, 0x7B17, 0xB896, 0x7B18, 0xB897, 0x7B1A, + 0xB898, 0x7B1C, 0xB899, 0x7B1D, 0xB89A, 0x7B1F, 0xB89B, 0x7B21, + 0xB89C, 0x7B22, 0xB89D, 0x7B23, 0xB89E, 0x7B27, 0xB89F, 0x7B29, + 0xB8A0, 0x7B2D, 0xB8A1, 0x6D6E, 0xB8A2, 0x6DAA, 0xB8A3, 0x798F, + 0xB8A4, 0x88B1, 0xB8A5, 0x5F17, 0xB8A6, 0x752B, 0xB8A7, 0x629A, + 0xB8A8, 0x8F85, 0xB8A9, 0x4FEF, 0xB8AA, 0x91DC, 0xB8AB, 0x65A7, + 0xB8AC, 0x812F, 0xB8AD, 0x8151, 0xB8AE, 0x5E9C, 0xB8AF, 0x8150, + 0xB8B0, 0x8D74, 0xB8B1, 0x526F, 0xB8B2, 0x8986, 0xB8B3, 0x8D4B, + 0xB8B4, 0x590D, 0xB8B5, 0x5085, 0xB8B6, 0x4ED8, 0xB8B7, 0x961C, + 0xB8B8, 0x7236, 0xB8B9, 0x8179, 0xB8BA, 0x8D1F, 0xB8BB, 0x5BCC, + 0xB8BC, 0x8BA3, 0xB8BD, 0x9644, 0xB8BE, 0x5987, 0xB8BF, 0x7F1A, + 0xB8C0, 0x5490, 0xB8C1, 0x5676, 0xB8C2, 0x560E, 0xB8C3, 0x8BE5, + 0xB8C4, 0x6539, 0xB8C5, 0x6982, 0xB8C6, 0x9499, 0xB8C7, 0x76D6, + 0xB8C8, 0x6E89, 0xB8C9, 0x5E72, 0xB8CA, 0x7518, 0xB8CB, 0x6746, + 0xB8CC, 0x67D1, 0xB8CD, 0x7AFF, 0xB8CE, 0x809D, 0xB8CF, 0x8D76, + 0xB8D0, 0x611F, 0xB8D1, 0x79C6, 0xB8D2, 0x6562, 0xB8D3, 0x8D63, + 0xB8D4, 0x5188, 0xB8D5, 0x521A, 0xB8D6, 0x94A2, 0xB8D7, 0x7F38, + 0xB8D8, 0x809B, 0xB8D9, 0x7EB2, 0xB8DA, 0x5C97, 0xB8DB, 0x6E2F, + 0xB8DC, 0x6760, 0xB8DD, 0x7BD9, 0xB8DE, 0x768B, 0xB8DF, 0x9AD8, + 0xB8E0, 0x818F, 0xB8E1, 0x7F94, 0xB8E2, 0x7CD5, 0xB8E3, 0x641E, + 0xB8E4, 0x9550, 0xB8E5, 0x7A3F, 0xB8E6, 0x544A, 0xB8E7, 0x54E5, + 0xB8E8, 0x6B4C, 0xB8E9, 0x6401, 0xB8EA, 0x6208, 0xB8EB, 0x9E3D, + 0xB8EC, 0x80F3, 0xB8ED, 0x7599, 0xB8EE, 0x5272, 0xB8EF, 0x9769, + 0xB8F0, 0x845B, 0xB8F1, 0x683C, 0xB8F2, 0x86E4, 0xB8F3, 0x9601, + 0xB8F4, 0x9694, 0xB8F5, 0x94EC, 0xB8F6, 0x4E2A, 0xB8F7, 0x5404, + 0xB8F8, 0x7ED9, 0xB8F9, 0x6839, 0xB8FA, 0x8DDF, 0xB8FB, 0x8015, + 0xB8FC, 0x66F4, 0xB8FD, 0x5E9A, 0xB8FE, 0x7FB9, 0xB940, 0x7B2F, + 0xB941, 0x7B30, 0xB942, 0x7B32, 0xB943, 0x7B34, 0xB944, 0x7B35, + 0xB945, 0x7B36, 0xB946, 0x7B37, 0xB947, 0x7B39, 0xB948, 0x7B3B, + 0xB949, 0x7B3D, 0xB94A, 0x7B3F, 0xB94B, 0x7B40, 0xB94C, 0x7B41, + 0xB94D, 0x7B42, 0xB94E, 0x7B43, 0xB94F, 0x7B44, 0xB950, 0x7B46, + 0xB951, 0x7B48, 0xB952, 0x7B4A, 0xB953, 0x7B4D, 0xB954, 0x7B4E, + 0xB955, 0x7B53, 0xB956, 0x7B55, 0xB957, 0x7B57, 0xB958, 0x7B59, + 0xB959, 0x7B5C, 0xB95A, 0x7B5E, 0xB95B, 0x7B5F, 0xB95C, 0x7B61, + 0xB95D, 0x7B63, 0xB95E, 0x7B64, 0xB95F, 0x7B65, 0xB960, 0x7B66, + 0xB961, 0x7B67, 0xB962, 0x7B68, 0xB963, 0x7B69, 0xB964, 0x7B6A, + 0xB965, 0x7B6B, 0xB966, 0x7B6C, 0xB967, 0x7B6D, 0xB968, 0x7B6F, + 0xB969, 0x7B70, 0xB96A, 0x7B73, 0xB96B, 0x7B74, 0xB96C, 0x7B76, + 0xB96D, 0x7B78, 0xB96E, 0x7B7A, 0xB96F, 0x7B7C, 0xB970, 0x7B7D, + 0xB971, 0x7B7F, 0xB972, 0x7B81, 0xB973, 0x7B82, 0xB974, 0x7B83, + 0xB975, 0x7B84, 0xB976, 0x7B86, 0xB977, 0x7B87, 0xB978, 0x7B88, + 0xB979, 0x7B89, 0xB97A, 0x7B8A, 0xB97B, 0x7B8B, 0xB97C, 0x7B8C, + 0xB97D, 0x7B8E, 0xB97E, 0x7B8F, 0xB980, 0x7B91, 0xB981, 0x7B92, + 0xB982, 0x7B93, 0xB983, 0x7B96, 0xB984, 0x7B98, 0xB985, 0x7B99, + 0xB986, 0x7B9A, 0xB987, 0x7B9B, 0xB988, 0x7B9E, 0xB989, 0x7B9F, + 0xB98A, 0x7BA0, 0xB98B, 0x7BA3, 0xB98C, 0x7BA4, 0xB98D, 0x7BA5, + 0xB98E, 0x7BAE, 0xB98F, 0x7BAF, 0xB990, 0x7BB0, 0xB991, 0x7BB2, + 0xB992, 0x7BB3, 0xB993, 0x7BB5, 0xB994, 0x7BB6, 0xB995, 0x7BB7, + 0xB996, 0x7BB9, 0xB997, 0x7BBA, 0xB998, 0x7BBB, 0xB999, 0x7BBC, + 0xB99A, 0x7BBD, 0xB99B, 0x7BBE, 0xB99C, 0x7BBF, 0xB99D, 0x7BC0, + 0xB99E, 0x7BC2, 0xB99F, 0x7BC3, 0xB9A0, 0x7BC4, 0xB9A1, 0x57C2, + 0xB9A2, 0x803F, 0xB9A3, 0x6897, 0xB9A4, 0x5DE5, 0xB9A5, 0x653B, + 0xB9A6, 0x529F, 0xB9A7, 0x606D, 0xB9A8, 0x9F9A, 0xB9A9, 0x4F9B, + 0xB9AA, 0x8EAC, 0xB9AB, 0x516C, 0xB9AC, 0x5BAB, 0xB9AD, 0x5F13, + 0xB9AE, 0x5DE9, 0xB9AF, 0x6C5E, 0xB9B0, 0x62F1, 0xB9B1, 0x8D21, + 0xB9B2, 0x5171, 0xB9B3, 0x94A9, 0xB9B4, 0x52FE, 0xB9B5, 0x6C9F, + 0xB9B6, 0x82DF, 0xB9B7, 0x72D7, 0xB9B8, 0x57A2, 0xB9B9, 0x6784, + 0xB9BA, 0x8D2D, 0xB9BB, 0x591F, 0xB9BC, 0x8F9C, 0xB9BD, 0x83C7, + 0xB9BE, 0x5495, 0xB9BF, 0x7B8D, 0xB9C0, 0x4F30, 0xB9C1, 0x6CBD, + 0xB9C2, 0x5B64, 0xB9C3, 0x59D1, 0xB9C4, 0x9F13, 0xB9C5, 0x53E4, + 0xB9C6, 0x86CA, 0xB9C7, 0x9AA8, 0xB9C8, 0x8C37, 0xB9C9, 0x80A1, + 0xB9CA, 0x6545, 0xB9CB, 0x987E, 0xB9CC, 0x56FA, 0xB9CD, 0x96C7, + 0xB9CE, 0x522E, 0xB9CF, 0x74DC, 0xB9D0, 0x5250, 0xB9D1, 0x5BE1, + 0xB9D2, 0x6302, 0xB9D3, 0x8902, 0xB9D4, 0x4E56, 0xB9D5, 0x62D0, + 0xB9D6, 0x602A, 0xB9D7, 0x68FA, 0xB9D8, 0x5173, 0xB9D9, 0x5B98, + 0xB9DA, 0x51A0, 0xB9DB, 0x89C2, 0xB9DC, 0x7BA1, 0xB9DD, 0x9986, + 0xB9DE, 0x7F50, 0xB9DF, 0x60EF, 0xB9E0, 0x704C, 0xB9E1, 0x8D2F, + 0xB9E2, 0x5149, 0xB9E3, 0x5E7F, 0xB9E4, 0x901B, 0xB9E5, 0x7470, + 0xB9E6, 0x89C4, 0xB9E7, 0x572D, 0xB9E8, 0x7845, 0xB9E9, 0x5F52, + 0xB9EA, 0x9F9F, 0xB9EB, 0x95FA, 0xB9EC, 0x8F68, 0xB9ED, 0x9B3C, + 0xB9EE, 0x8BE1, 0xB9EF, 0x7678, 0xB9F0, 0x6842, 0xB9F1, 0x67DC, + 0xB9F2, 0x8DEA, 0xB9F3, 0x8D35, 0xB9F4, 0x523D, 0xB9F5, 0x8F8A, + 0xB9F6, 0x6EDA, 0xB9F7, 0x68CD, 0xB9F8, 0x9505, 0xB9F9, 0x90ED, + 0xB9FA, 0x56FD, 0xB9FB, 0x679C, 0xB9FC, 0x88F9, 0xB9FD, 0x8FC7, + 0xB9FE, 0x54C8, 0xBA40, 0x7BC5, 0xBA41, 0x7BC8, 0xBA42, 0x7BC9, + 0xBA43, 0x7BCA, 0xBA44, 0x7BCB, 0xBA45, 0x7BCD, 0xBA46, 0x7BCE, + 0xBA47, 0x7BCF, 0xBA48, 0x7BD0, 0xBA49, 0x7BD2, 0xBA4A, 0x7BD4, + 0xBA4B, 0x7BD5, 0xBA4C, 0x7BD6, 0xBA4D, 0x7BD7, 0xBA4E, 0x7BD8, + 0xBA4F, 0x7BDB, 0xBA50, 0x7BDC, 0xBA51, 0x7BDE, 0xBA52, 0x7BDF, + 0xBA53, 0x7BE0, 0xBA54, 0x7BE2, 0xBA55, 0x7BE3, 0xBA56, 0x7BE4, + 0xBA57, 0x7BE7, 0xBA58, 0x7BE8, 0xBA59, 0x7BE9, 0xBA5A, 0x7BEB, + 0xBA5B, 0x7BEC, 0xBA5C, 0x7BED, 0xBA5D, 0x7BEF, 0xBA5E, 0x7BF0, + 0xBA5F, 0x7BF2, 0xBA60, 0x7BF3, 0xBA61, 0x7BF4, 0xBA62, 0x7BF5, + 0xBA63, 0x7BF6, 0xBA64, 0x7BF8, 0xBA65, 0x7BF9, 0xBA66, 0x7BFA, + 0xBA67, 0x7BFB, 0xBA68, 0x7BFD, 0xBA69, 0x7BFF, 0xBA6A, 0x7C00, + 0xBA6B, 0x7C01, 0xBA6C, 0x7C02, 0xBA6D, 0x7C03, 0xBA6E, 0x7C04, + 0xBA6F, 0x7C05, 0xBA70, 0x7C06, 0xBA71, 0x7C08, 0xBA72, 0x7C09, + 0xBA73, 0x7C0A, 0xBA74, 0x7C0D, 0xBA75, 0x7C0E, 0xBA76, 0x7C10, + 0xBA77, 0x7C11, 0xBA78, 0x7C12, 0xBA79, 0x7C13, 0xBA7A, 0x7C14, + 0xBA7B, 0x7C15, 0xBA7C, 0x7C17, 0xBA7D, 0x7C18, 0xBA7E, 0x7C19, + 0xBA80, 0x7C1A, 0xBA81, 0x7C1B, 0xBA82, 0x7C1C, 0xBA83, 0x7C1D, + 0xBA84, 0x7C1E, 0xBA85, 0x7C20, 0xBA86, 0x7C21, 0xBA87, 0x7C22, + 0xBA88, 0x7C23, 0xBA89, 0x7C24, 0xBA8A, 0x7C25, 0xBA8B, 0x7C28, + 0xBA8C, 0x7C29, 0xBA8D, 0x7C2B, 0xBA8E, 0x7C2C, 0xBA8F, 0x7C2D, + 0xBA90, 0x7C2E, 0xBA91, 0x7C2F, 0xBA92, 0x7C30, 0xBA93, 0x7C31, + 0xBA94, 0x7C32, 0xBA95, 0x7C33, 0xBA96, 0x7C34, 0xBA97, 0x7C35, + 0xBA98, 0x7C36, 0xBA99, 0x7C37, 0xBA9A, 0x7C39, 0xBA9B, 0x7C3A, + 0xBA9C, 0x7C3B, 0xBA9D, 0x7C3C, 0xBA9E, 0x7C3D, 0xBA9F, 0x7C3E, + 0xBAA0, 0x7C42, 0xBAA1, 0x9AB8, 0xBAA2, 0x5B69, 0xBAA3, 0x6D77, + 0xBAA4, 0x6C26, 0xBAA5, 0x4EA5, 0xBAA6, 0x5BB3, 0xBAA7, 0x9A87, + 0xBAA8, 0x9163, 0xBAA9, 0x61A8, 0xBAAA, 0x90AF, 0xBAAB, 0x97E9, + 0xBAAC, 0x542B, 0xBAAD, 0x6DB5, 0xBAAE, 0x5BD2, 0xBAAF, 0x51FD, + 0xBAB0, 0x558A, 0xBAB1, 0x7F55, 0xBAB2, 0x7FF0, 0xBAB3, 0x64BC, + 0xBAB4, 0x634D, 0xBAB5, 0x65F1, 0xBAB6, 0x61BE, 0xBAB7, 0x608D, + 0xBAB8, 0x710A, 0xBAB9, 0x6C57, 0xBABA, 0x6C49, 0xBABB, 0x592F, + 0xBABC, 0x676D, 0xBABD, 0x822A, 0xBABE, 0x58D5, 0xBABF, 0x568E, + 0xBAC0, 0x8C6A, 0xBAC1, 0x6BEB, 0xBAC2, 0x90DD, 0xBAC3, 0x597D, + 0xBAC4, 0x8017, 0xBAC5, 0x53F7, 0xBAC6, 0x6D69, 0xBAC7, 0x5475, + 0xBAC8, 0x559D, 0xBAC9, 0x8377, 0xBACA, 0x83CF, 0xBACB, 0x6838, + 0xBACC, 0x79BE, 0xBACD, 0x548C, 0xBACE, 0x4F55, 0xBACF, 0x5408, + 0xBAD0, 0x76D2, 0xBAD1, 0x8C89, 0xBAD2, 0x9602, 0xBAD3, 0x6CB3, + 0xBAD4, 0x6DB8, 0xBAD5, 0x8D6B, 0xBAD6, 0x8910, 0xBAD7, 0x9E64, + 0xBAD8, 0x8D3A, 0xBAD9, 0x563F, 0xBADA, 0x9ED1, 0xBADB, 0x75D5, + 0xBADC, 0x5F88, 0xBADD, 0x72E0, 0xBADE, 0x6068, 0xBADF, 0x54FC, + 0xBAE0, 0x4EA8, 0xBAE1, 0x6A2A, 0xBAE2, 0x8861, 0xBAE3, 0x6052, + 0xBAE4, 0x8F70, 0xBAE5, 0x54C4, 0xBAE6, 0x70D8, 0xBAE7, 0x8679, + 0xBAE8, 0x9E3F, 0xBAE9, 0x6D2A, 0xBAEA, 0x5B8F, 0xBAEB, 0x5F18, + 0xBAEC, 0x7EA2, 0xBAED, 0x5589, 0xBAEE, 0x4FAF, 0xBAEF, 0x7334, + 0xBAF0, 0x543C, 0xBAF1, 0x539A, 0xBAF2, 0x5019, 0xBAF3, 0x540E, + 0xBAF4, 0x547C, 0xBAF5, 0x4E4E, 0xBAF6, 0x5FFD, 0xBAF7, 0x745A, + 0xBAF8, 0x58F6, 0xBAF9, 0x846B, 0xBAFA, 0x80E1, 0xBAFB, 0x8774, + 0xBAFC, 0x72D0, 0xBAFD, 0x7CCA, 0xBAFE, 0x6E56, 0xBB40, 0x7C43, + 0xBB41, 0x7C44, 0xBB42, 0x7C45, 0xBB43, 0x7C46, 0xBB44, 0x7C47, + 0xBB45, 0x7C48, 0xBB46, 0x7C49, 0xBB47, 0x7C4A, 0xBB48, 0x7C4B, + 0xBB49, 0x7C4C, 0xBB4A, 0x7C4E, 0xBB4B, 0x7C4F, 0xBB4C, 0x7C50, + 0xBB4D, 0x7C51, 0xBB4E, 0x7C52, 0xBB4F, 0x7C53, 0xBB50, 0x7C54, + 0xBB51, 0x7C55, 0xBB52, 0x7C56, 0xBB53, 0x7C57, 0xBB54, 0x7C58, + 0xBB55, 0x7C59, 0xBB56, 0x7C5A, 0xBB57, 0x7C5B, 0xBB58, 0x7C5C, + 0xBB59, 0x7C5D, 0xBB5A, 0x7C5E, 0xBB5B, 0x7C5F, 0xBB5C, 0x7C60, + 0xBB5D, 0x7C61, 0xBB5E, 0x7C62, 0xBB5F, 0x7C63, 0xBB60, 0x7C64, + 0xBB61, 0x7C65, 0xBB62, 0x7C66, 0xBB63, 0x7C67, 0xBB64, 0x7C68, + 0xBB65, 0x7C69, 0xBB66, 0x7C6A, 0xBB67, 0x7C6B, 0xBB68, 0x7C6C, + 0xBB69, 0x7C6D, 0xBB6A, 0x7C6E, 0xBB6B, 0x7C6F, 0xBB6C, 0x7C70, + 0xBB6D, 0x7C71, 0xBB6E, 0x7C72, 0xBB6F, 0x7C75, 0xBB70, 0x7C76, + 0xBB71, 0x7C77, 0xBB72, 0x7C78, 0xBB73, 0x7C79, 0xBB74, 0x7C7A, + 0xBB75, 0x7C7E, 0xBB76, 0x7C7F, 0xBB77, 0x7C80, 0xBB78, 0x7C81, + 0xBB79, 0x7C82, 0xBB7A, 0x7C83, 0xBB7B, 0x7C84, 0xBB7C, 0x7C85, + 0xBB7D, 0x7C86, 0xBB7E, 0x7C87, 0xBB80, 0x7C88, 0xBB81, 0x7C8A, + 0xBB82, 0x7C8B, 0xBB83, 0x7C8C, 0xBB84, 0x7C8D, 0xBB85, 0x7C8E, + 0xBB86, 0x7C8F, 0xBB87, 0x7C90, 0xBB88, 0x7C93, 0xBB89, 0x7C94, + 0xBB8A, 0x7C96, 0xBB8B, 0x7C99, 0xBB8C, 0x7C9A, 0xBB8D, 0x7C9B, + 0xBB8E, 0x7CA0, 0xBB8F, 0x7CA1, 0xBB90, 0x7CA3, 0xBB91, 0x7CA6, + 0xBB92, 0x7CA7, 0xBB93, 0x7CA8, 0xBB94, 0x7CA9, 0xBB95, 0x7CAB, + 0xBB96, 0x7CAC, 0xBB97, 0x7CAD, 0xBB98, 0x7CAF, 0xBB99, 0x7CB0, + 0xBB9A, 0x7CB4, 0xBB9B, 0x7CB5, 0xBB9C, 0x7CB6, 0xBB9D, 0x7CB7, + 0xBB9E, 0x7CB8, 0xBB9F, 0x7CBA, 0xBBA0, 0x7CBB, 0xBBA1, 0x5F27, + 0xBBA2, 0x864E, 0xBBA3, 0x552C, 0xBBA4, 0x62A4, 0xBBA5, 0x4E92, + 0xBBA6, 0x6CAA, 0xBBA7, 0x6237, 0xBBA8, 0x82B1, 0xBBA9, 0x54D7, + 0xBBAA, 0x534E, 0xBBAB, 0x733E, 0xBBAC, 0x6ED1, 0xBBAD, 0x753B, + 0xBBAE, 0x5212, 0xBBAF, 0x5316, 0xBBB0, 0x8BDD, 0xBBB1, 0x69D0, + 0xBBB2, 0x5F8A, 0xBBB3, 0x6000, 0xBBB4, 0x6DEE, 0xBBB5, 0x574F, + 0xBBB6, 0x6B22, 0xBBB7, 0x73AF, 0xBBB8, 0x6853, 0xBBB9, 0x8FD8, + 0xBBBA, 0x7F13, 0xBBBB, 0x6362, 0xBBBC, 0x60A3, 0xBBBD, 0x5524, + 0xBBBE, 0x75EA, 0xBBBF, 0x8C62, 0xBBC0, 0x7115, 0xBBC1, 0x6DA3, + 0xBBC2, 0x5BA6, 0xBBC3, 0x5E7B, 0xBBC4, 0x8352, 0xBBC5, 0x614C, + 0xBBC6, 0x9EC4, 0xBBC7, 0x78FA, 0xBBC8, 0x8757, 0xBBC9, 0x7C27, + 0xBBCA, 0x7687, 0xBBCB, 0x51F0, 0xBBCC, 0x60F6, 0xBBCD, 0x714C, + 0xBBCE, 0x6643, 0xBBCF, 0x5E4C, 0xBBD0, 0x604D, 0xBBD1, 0x8C0E, + 0xBBD2, 0x7070, 0xBBD3, 0x6325, 0xBBD4, 0x8F89, 0xBBD5, 0x5FBD, + 0xBBD6, 0x6062, 0xBBD7, 0x86D4, 0xBBD8, 0x56DE, 0xBBD9, 0x6BC1, + 0xBBDA, 0x6094, 0xBBDB, 0x6167, 0xBBDC, 0x5349, 0xBBDD, 0x60E0, + 0xBBDE, 0x6666, 0xBBDF, 0x8D3F, 0xBBE0, 0x79FD, 0xBBE1, 0x4F1A, + 0xBBE2, 0x70E9, 0xBBE3, 0x6C47, 0xBBE4, 0x8BB3, 0xBBE5, 0x8BF2, + 0xBBE6, 0x7ED8, 0xBBE7, 0x8364, 0xBBE8, 0x660F, 0xBBE9, 0x5A5A, + 0xBBEA, 0x9B42, 0xBBEB, 0x6D51, 0xBBEC, 0x6DF7, 0xBBED, 0x8C41, + 0xBBEE, 0x6D3B, 0xBBEF, 0x4F19, 0xBBF0, 0x706B, 0xBBF1, 0x83B7, + 0xBBF2, 0x6216, 0xBBF3, 0x60D1, 0xBBF4, 0x970D, 0xBBF5, 0x8D27, + 0xBBF6, 0x7978, 0xBBF7, 0x51FB, 0xBBF8, 0x573E, 0xBBF9, 0x57FA, + 0xBBFA, 0x673A, 0xBBFB, 0x7578, 0xBBFC, 0x7A3D, 0xBBFD, 0x79EF, + 0xBBFE, 0x7B95, 0xBC40, 0x7CBF, 0xBC41, 0x7CC0, 0xBC42, 0x7CC2, + 0xBC43, 0x7CC3, 0xBC44, 0x7CC4, 0xBC45, 0x7CC6, 0xBC46, 0x7CC9, + 0xBC47, 0x7CCB, 0xBC48, 0x7CCE, 0xBC49, 0x7CCF, 0xBC4A, 0x7CD0, + 0xBC4B, 0x7CD1, 0xBC4C, 0x7CD2, 0xBC4D, 0x7CD3, 0xBC4E, 0x7CD4, + 0xBC4F, 0x7CD8, 0xBC50, 0x7CDA, 0xBC51, 0x7CDB, 0xBC52, 0x7CDD, + 0xBC53, 0x7CDE, 0xBC54, 0x7CE1, 0xBC55, 0x7CE2, 0xBC56, 0x7CE3, + 0xBC57, 0x7CE4, 0xBC58, 0x7CE5, 0xBC59, 0x7CE6, 0xBC5A, 0x7CE7, + 0xBC5B, 0x7CE9, 0xBC5C, 0x7CEA, 0xBC5D, 0x7CEB, 0xBC5E, 0x7CEC, + 0xBC5F, 0x7CED, 0xBC60, 0x7CEE, 0xBC61, 0x7CF0, 0xBC62, 0x7CF1, + 0xBC63, 0x7CF2, 0xBC64, 0x7CF3, 0xBC65, 0x7CF4, 0xBC66, 0x7CF5, + 0xBC67, 0x7CF6, 0xBC68, 0x7CF7, 0xBC69, 0x7CF9, 0xBC6A, 0x7CFA, + 0xBC6B, 0x7CFC, 0xBC6C, 0x7CFD, 0xBC6D, 0x7CFE, 0xBC6E, 0x7CFF, + 0xBC6F, 0x7D00, 0xBC70, 0x7D01, 0xBC71, 0x7D02, 0xBC72, 0x7D03, + 0xBC73, 0x7D04, 0xBC74, 0x7D05, 0xBC75, 0x7D06, 0xBC76, 0x7D07, + 0xBC77, 0x7D08, 0xBC78, 0x7D09, 0xBC79, 0x7D0B, 0xBC7A, 0x7D0C, + 0xBC7B, 0x7D0D, 0xBC7C, 0x7D0E, 0xBC7D, 0x7D0F, 0xBC7E, 0x7D10, + 0xBC80, 0x7D11, 0xBC81, 0x7D12, 0xBC82, 0x7D13, 0xBC83, 0x7D14, + 0xBC84, 0x7D15, 0xBC85, 0x7D16, 0xBC86, 0x7D17, 0xBC87, 0x7D18, + 0xBC88, 0x7D19, 0xBC89, 0x7D1A, 0xBC8A, 0x7D1B, 0xBC8B, 0x7D1C, + 0xBC8C, 0x7D1D, 0xBC8D, 0x7D1E, 0xBC8E, 0x7D1F, 0xBC8F, 0x7D21, + 0xBC90, 0x7D23, 0xBC91, 0x7D24, 0xBC92, 0x7D25, 0xBC93, 0x7D26, + 0xBC94, 0x7D28, 0xBC95, 0x7D29, 0xBC96, 0x7D2A, 0xBC97, 0x7D2C, + 0xBC98, 0x7D2D, 0xBC99, 0x7D2E, 0xBC9A, 0x7D30, 0xBC9B, 0x7D31, + 0xBC9C, 0x7D32, 0xBC9D, 0x7D33, 0xBC9E, 0x7D34, 0xBC9F, 0x7D35, + 0xBCA0, 0x7D36, 0xBCA1, 0x808C, 0xBCA2, 0x9965, 0xBCA3, 0x8FF9, + 0xBCA4, 0x6FC0, 0xBCA5, 0x8BA5, 0xBCA6, 0x9E21, 0xBCA7, 0x59EC, + 0xBCA8, 0x7EE9, 0xBCA9, 0x7F09, 0xBCAA, 0x5409, 0xBCAB, 0x6781, + 0xBCAC, 0x68D8, 0xBCAD, 0x8F91, 0xBCAE, 0x7C4D, 0xBCAF, 0x96C6, + 0xBCB0, 0x53CA, 0xBCB1, 0x6025, 0xBCB2, 0x75BE, 0xBCB3, 0x6C72, + 0xBCB4, 0x5373, 0xBCB5, 0x5AC9, 0xBCB6, 0x7EA7, 0xBCB7, 0x6324, + 0xBCB8, 0x51E0, 0xBCB9, 0x810A, 0xBCBA, 0x5DF1, 0xBCBB, 0x84DF, + 0xBCBC, 0x6280, 0xBCBD, 0x5180, 0xBCBE, 0x5B63, 0xBCBF, 0x4F0E, + 0xBCC0, 0x796D, 0xBCC1, 0x5242, 0xBCC2, 0x60B8, 0xBCC3, 0x6D4E, + 0xBCC4, 0x5BC4, 0xBCC5, 0x5BC2, 0xBCC6, 0x8BA1, 0xBCC7, 0x8BB0, + 0xBCC8, 0x65E2, 0xBCC9, 0x5FCC, 0xBCCA, 0x9645, 0xBCCB, 0x5993, + 0xBCCC, 0x7EE7, 0xBCCD, 0x7EAA, 0xBCCE, 0x5609, 0xBCCF, 0x67B7, + 0xBCD0, 0x5939, 0xBCD1, 0x4F73, 0xBCD2, 0x5BB6, 0xBCD3, 0x52A0, + 0xBCD4, 0x835A, 0xBCD5, 0x988A, 0xBCD6, 0x8D3E, 0xBCD7, 0x7532, + 0xBCD8, 0x94BE, 0xBCD9, 0x5047, 0xBCDA, 0x7A3C, 0xBCDB, 0x4EF7, + 0xBCDC, 0x67B6, 0xBCDD, 0x9A7E, 0xBCDE, 0x5AC1, 0xBCDF, 0x6B7C, + 0xBCE0, 0x76D1, 0xBCE1, 0x575A, 0xBCE2, 0x5C16, 0xBCE3, 0x7B3A, + 0xBCE4, 0x95F4, 0xBCE5, 0x714E, 0xBCE6, 0x517C, 0xBCE7, 0x80A9, + 0xBCE8, 0x8270, 0xBCE9, 0x5978, 0xBCEA, 0x7F04, 0xBCEB, 0x8327, + 0xBCEC, 0x68C0, 0xBCED, 0x67EC, 0xBCEE, 0x78B1, 0xBCEF, 0x7877, + 0xBCF0, 0x62E3, 0xBCF1, 0x6361, 0xBCF2, 0x7B80, 0xBCF3, 0x4FED, + 0xBCF4, 0x526A, 0xBCF5, 0x51CF, 0xBCF6, 0x8350, 0xBCF7, 0x69DB, + 0xBCF8, 0x9274, 0xBCF9, 0x8DF5, 0xBCFA, 0x8D31, 0xBCFB, 0x89C1, + 0xBCFC, 0x952E, 0xBCFD, 0x7BAD, 0xBCFE, 0x4EF6, 0xBD40, 0x7D37, + 0xBD41, 0x7D38, 0xBD42, 0x7D39, 0xBD43, 0x7D3A, 0xBD44, 0x7D3B, + 0xBD45, 0x7D3C, 0xBD46, 0x7D3D, 0xBD47, 0x7D3E, 0xBD48, 0x7D3F, + 0xBD49, 0x7D40, 0xBD4A, 0x7D41, 0xBD4B, 0x7D42, 0xBD4C, 0x7D43, + 0xBD4D, 0x7D44, 0xBD4E, 0x7D45, 0xBD4F, 0x7D46, 0xBD50, 0x7D47, + 0xBD51, 0x7D48, 0xBD52, 0x7D49, 0xBD53, 0x7D4A, 0xBD54, 0x7D4B, + 0xBD55, 0x7D4C, 0xBD56, 0x7D4D, 0xBD57, 0x7D4E, 0xBD58, 0x7D4F, + 0xBD59, 0x7D50, 0xBD5A, 0x7D51, 0xBD5B, 0x7D52, 0xBD5C, 0x7D53, + 0xBD5D, 0x7D54, 0xBD5E, 0x7D55, 0xBD5F, 0x7D56, 0xBD60, 0x7D57, + 0xBD61, 0x7D58, 0xBD62, 0x7D59, 0xBD63, 0x7D5A, 0xBD64, 0x7D5B, + 0xBD65, 0x7D5C, 0xBD66, 0x7D5D, 0xBD67, 0x7D5E, 0xBD68, 0x7D5F, + 0xBD69, 0x7D60, 0xBD6A, 0x7D61, 0xBD6B, 0x7D62, 0xBD6C, 0x7D63, + 0xBD6D, 0x7D64, 0xBD6E, 0x7D65, 0xBD6F, 0x7D66, 0xBD70, 0x7D67, + 0xBD71, 0x7D68, 0xBD72, 0x7D69, 0xBD73, 0x7D6A, 0xBD74, 0x7D6B, + 0xBD75, 0x7D6C, 0xBD76, 0x7D6D, 0xBD77, 0x7D6F, 0xBD78, 0x7D70, + 0xBD79, 0x7D71, 0xBD7A, 0x7D72, 0xBD7B, 0x7D73, 0xBD7C, 0x7D74, + 0xBD7D, 0x7D75, 0xBD7E, 0x7D76, 0xBD80, 0x7D78, 0xBD81, 0x7D79, + 0xBD82, 0x7D7A, 0xBD83, 0x7D7B, 0xBD84, 0x7D7C, 0xBD85, 0x7D7D, + 0xBD86, 0x7D7E, 0xBD87, 0x7D7F, 0xBD88, 0x7D80, 0xBD89, 0x7D81, + 0xBD8A, 0x7D82, 0xBD8B, 0x7D83, 0xBD8C, 0x7D84, 0xBD8D, 0x7D85, + 0xBD8E, 0x7D86, 0xBD8F, 0x7D87, 0xBD90, 0x7D88, 0xBD91, 0x7D89, + 0xBD92, 0x7D8A, 0xBD93, 0x7D8B, 0xBD94, 0x7D8C, 0xBD95, 0x7D8D, + 0xBD96, 0x7D8E, 0xBD97, 0x7D8F, 0xBD98, 0x7D90, 0xBD99, 0x7D91, + 0xBD9A, 0x7D92, 0xBD9B, 0x7D93, 0xBD9C, 0x7D94, 0xBD9D, 0x7D95, + 0xBD9E, 0x7D96, 0xBD9F, 0x7D97, 0xBDA0, 0x7D98, 0xBDA1, 0x5065, + 0xBDA2, 0x8230, 0xBDA3, 0x5251, 0xBDA4, 0x996F, 0xBDA5, 0x6E10, + 0xBDA6, 0x6E85, 0xBDA7, 0x6DA7, 0xBDA8, 0x5EFA, 0xBDA9, 0x50F5, + 0xBDAA, 0x59DC, 0xBDAB, 0x5C06, 0xBDAC, 0x6D46, 0xBDAD, 0x6C5F, + 0xBDAE, 0x7586, 0xBDAF, 0x848B, 0xBDB0, 0x6868, 0xBDB1, 0x5956, + 0xBDB2, 0x8BB2, 0xBDB3, 0x5320, 0xBDB4, 0x9171, 0xBDB5, 0x964D, + 0xBDB6, 0x8549, 0xBDB7, 0x6912, 0xBDB8, 0x7901, 0xBDB9, 0x7126, + 0xBDBA, 0x80F6, 0xBDBB, 0x4EA4, 0xBDBC, 0x90CA, 0xBDBD, 0x6D47, + 0xBDBE, 0x9A84, 0xBDBF, 0x5A07, 0xBDC0, 0x56BC, 0xBDC1, 0x6405, + 0xBDC2, 0x94F0, 0xBDC3, 0x77EB, 0xBDC4, 0x4FA5, 0xBDC5, 0x811A, + 0xBDC6, 0x72E1, 0xBDC7, 0x89D2, 0xBDC8, 0x997A, 0xBDC9, 0x7F34, + 0xBDCA, 0x7EDE, 0xBDCB, 0x527F, 0xBDCC, 0x6559, 0xBDCD, 0x9175, + 0xBDCE, 0x8F7F, 0xBDCF, 0x8F83, 0xBDD0, 0x53EB, 0xBDD1, 0x7A96, + 0xBDD2, 0x63ED, 0xBDD3, 0x63A5, 0xBDD4, 0x7686, 0xBDD5, 0x79F8, + 0xBDD6, 0x8857, 0xBDD7, 0x9636, 0xBDD8, 0x622A, 0xBDD9, 0x52AB, + 0xBDDA, 0x8282, 0xBDDB, 0x6854, 0xBDDC, 0x6770, 0xBDDD, 0x6377, + 0xBDDE, 0x776B, 0xBDDF, 0x7AED, 0xBDE0, 0x6D01, 0xBDE1, 0x7ED3, + 0xBDE2, 0x89E3, 0xBDE3, 0x59D0, 0xBDE4, 0x6212, 0xBDE5, 0x85C9, + 0xBDE6, 0x82A5, 0xBDE7, 0x754C, 0xBDE8, 0x501F, 0xBDE9, 0x4ECB, + 0xBDEA, 0x75A5, 0xBDEB, 0x8BEB, 0xBDEC, 0x5C4A, 0xBDED, 0x5DFE, + 0xBDEE, 0x7B4B, 0xBDEF, 0x65A4, 0xBDF0, 0x91D1, 0xBDF1, 0x4ECA, + 0xBDF2, 0x6D25, 0xBDF3, 0x895F, 0xBDF4, 0x7D27, 0xBDF5, 0x9526, + 0xBDF6, 0x4EC5, 0xBDF7, 0x8C28, 0xBDF8, 0x8FDB, 0xBDF9, 0x9773, + 0xBDFA, 0x664B, 0xBDFB, 0x7981, 0xBDFC, 0x8FD1, 0xBDFD, 0x70EC, + 0xBDFE, 0x6D78, 0xBE40, 0x7D99, 0xBE41, 0x7D9A, 0xBE42, 0x7D9B, + 0xBE43, 0x7D9C, 0xBE44, 0x7D9D, 0xBE45, 0x7D9E, 0xBE46, 0x7D9F, + 0xBE47, 0x7DA0, 0xBE48, 0x7DA1, 0xBE49, 0x7DA2, 0xBE4A, 0x7DA3, + 0xBE4B, 0x7DA4, 0xBE4C, 0x7DA5, 0xBE4D, 0x7DA7, 0xBE4E, 0x7DA8, + 0xBE4F, 0x7DA9, 0xBE50, 0x7DAA, 0xBE51, 0x7DAB, 0xBE52, 0x7DAC, + 0xBE53, 0x7DAD, 0xBE54, 0x7DAF, 0xBE55, 0x7DB0, 0xBE56, 0x7DB1, + 0xBE57, 0x7DB2, 0xBE58, 0x7DB3, 0xBE59, 0x7DB4, 0xBE5A, 0x7DB5, + 0xBE5B, 0x7DB6, 0xBE5C, 0x7DB7, 0xBE5D, 0x7DB8, 0xBE5E, 0x7DB9, + 0xBE5F, 0x7DBA, 0xBE60, 0x7DBB, 0xBE61, 0x7DBC, 0xBE62, 0x7DBD, + 0xBE63, 0x7DBE, 0xBE64, 0x7DBF, 0xBE65, 0x7DC0, 0xBE66, 0x7DC1, + 0xBE67, 0x7DC2, 0xBE68, 0x7DC3, 0xBE69, 0x7DC4, 0xBE6A, 0x7DC5, + 0xBE6B, 0x7DC6, 0xBE6C, 0x7DC7, 0xBE6D, 0x7DC8, 0xBE6E, 0x7DC9, + 0xBE6F, 0x7DCA, 0xBE70, 0x7DCB, 0xBE71, 0x7DCC, 0xBE72, 0x7DCD, + 0xBE73, 0x7DCE, 0xBE74, 0x7DCF, 0xBE75, 0x7DD0, 0xBE76, 0x7DD1, + 0xBE77, 0x7DD2, 0xBE78, 0x7DD3, 0xBE79, 0x7DD4, 0xBE7A, 0x7DD5, + 0xBE7B, 0x7DD6, 0xBE7C, 0x7DD7, 0xBE7D, 0x7DD8, 0xBE7E, 0x7DD9, + 0xBE80, 0x7DDA, 0xBE81, 0x7DDB, 0xBE82, 0x7DDC, 0xBE83, 0x7DDD, + 0xBE84, 0x7DDE, 0xBE85, 0x7DDF, 0xBE86, 0x7DE0, 0xBE87, 0x7DE1, + 0xBE88, 0x7DE2, 0xBE89, 0x7DE3, 0xBE8A, 0x7DE4, 0xBE8B, 0x7DE5, + 0xBE8C, 0x7DE6, 0xBE8D, 0x7DE7, 0xBE8E, 0x7DE8, 0xBE8F, 0x7DE9, + 0xBE90, 0x7DEA, 0xBE91, 0x7DEB, 0xBE92, 0x7DEC, 0xBE93, 0x7DED, + 0xBE94, 0x7DEE, 0xBE95, 0x7DEF, 0xBE96, 0x7DF0, 0xBE97, 0x7DF1, + 0xBE98, 0x7DF2, 0xBE99, 0x7DF3, 0xBE9A, 0x7DF4, 0xBE9B, 0x7DF5, + 0xBE9C, 0x7DF6, 0xBE9D, 0x7DF7, 0xBE9E, 0x7DF8, 0xBE9F, 0x7DF9, + 0xBEA0, 0x7DFA, 0xBEA1, 0x5C3D, 0xBEA2, 0x52B2, 0xBEA3, 0x8346, + 0xBEA4, 0x5162, 0xBEA5, 0x830E, 0xBEA6, 0x775B, 0xBEA7, 0x6676, + 0xBEA8, 0x9CB8, 0xBEA9, 0x4EAC, 0xBEAA, 0x60CA, 0xBEAB, 0x7CBE, + 0xBEAC, 0x7CB3, 0xBEAD, 0x7ECF, 0xBEAE, 0x4E95, 0xBEAF, 0x8B66, + 0xBEB0, 0x666F, 0xBEB1, 0x9888, 0xBEB2, 0x9759, 0xBEB3, 0x5883, + 0xBEB4, 0x656C, 0xBEB5, 0x955C, 0xBEB6, 0x5F84, 0xBEB7, 0x75C9, + 0xBEB8, 0x9756, 0xBEB9, 0x7ADF, 0xBEBA, 0x7ADE, 0xBEBB, 0x51C0, + 0xBEBC, 0x70AF, 0xBEBD, 0x7A98, 0xBEBE, 0x63EA, 0xBEBF, 0x7A76, + 0xBEC0, 0x7EA0, 0xBEC1, 0x7396, 0xBEC2, 0x97ED, 0xBEC3, 0x4E45, + 0xBEC4, 0x7078, 0xBEC5, 0x4E5D, 0xBEC6, 0x9152, 0xBEC7, 0x53A9, + 0xBEC8, 0x6551, 0xBEC9, 0x65E7, 0xBECA, 0x81FC, 0xBECB, 0x8205, + 0xBECC, 0x548E, 0xBECD, 0x5C31, 0xBECE, 0x759A, 0xBECF, 0x97A0, + 0xBED0, 0x62D8, 0xBED1, 0x72D9, 0xBED2, 0x75BD, 0xBED3, 0x5C45, + 0xBED4, 0x9A79, 0xBED5, 0x83CA, 0xBED6, 0x5C40, 0xBED7, 0x5480, + 0xBED8, 0x77E9, 0xBED9, 0x4E3E, 0xBEDA, 0x6CAE, 0xBEDB, 0x805A, + 0xBEDC, 0x62D2, 0xBEDD, 0x636E, 0xBEDE, 0x5DE8, 0xBEDF, 0x5177, + 0xBEE0, 0x8DDD, 0xBEE1, 0x8E1E, 0xBEE2, 0x952F, 0xBEE3, 0x4FF1, + 0xBEE4, 0x53E5, 0xBEE5, 0x60E7, 0xBEE6, 0x70AC, 0xBEE7, 0x5267, + 0xBEE8, 0x6350, 0xBEE9, 0x9E43, 0xBEEA, 0x5A1F, 0xBEEB, 0x5026, + 0xBEEC, 0x7737, 0xBEED, 0x5377, 0xBEEE, 0x7EE2, 0xBEEF, 0x6485, + 0xBEF0, 0x652B, 0xBEF1, 0x6289, 0xBEF2, 0x6398, 0xBEF3, 0x5014, + 0xBEF4, 0x7235, 0xBEF5, 0x89C9, 0xBEF6, 0x51B3, 0xBEF7, 0x8BC0, + 0xBEF8, 0x7EDD, 0xBEF9, 0x5747, 0xBEFA, 0x83CC, 0xBEFB, 0x94A7, + 0xBEFC, 0x519B, 0xBEFD, 0x541B, 0xBEFE, 0x5CFB, 0xBF40, 0x7DFB, + 0xBF41, 0x7DFC, 0xBF42, 0x7DFD, 0xBF43, 0x7DFE, 0xBF44, 0x7DFF, + 0xBF45, 0x7E00, 0xBF46, 0x7E01, 0xBF47, 0x7E02, 0xBF48, 0x7E03, + 0xBF49, 0x7E04, 0xBF4A, 0x7E05, 0xBF4B, 0x7E06, 0xBF4C, 0x7E07, + 0xBF4D, 0x7E08, 0xBF4E, 0x7E09, 0xBF4F, 0x7E0A, 0xBF50, 0x7E0B, + 0xBF51, 0x7E0C, 0xBF52, 0x7E0D, 0xBF53, 0x7E0E, 0xBF54, 0x7E0F, + 0xBF55, 0x7E10, 0xBF56, 0x7E11, 0xBF57, 0x7E12, 0xBF58, 0x7E13, + 0xBF59, 0x7E14, 0xBF5A, 0x7E15, 0xBF5B, 0x7E16, 0xBF5C, 0x7E17, + 0xBF5D, 0x7E18, 0xBF5E, 0x7E19, 0xBF5F, 0x7E1A, 0xBF60, 0x7E1B, + 0xBF61, 0x7E1C, 0xBF62, 0x7E1D, 0xBF63, 0x7E1E, 0xBF64, 0x7E1F, + 0xBF65, 0x7E20, 0xBF66, 0x7E21, 0xBF67, 0x7E22, 0xBF68, 0x7E23, + 0xBF69, 0x7E24, 0xBF6A, 0x7E25, 0xBF6B, 0x7E26, 0xBF6C, 0x7E27, + 0xBF6D, 0x7E28, 0xBF6E, 0x7E29, 0xBF6F, 0x7E2A, 0xBF70, 0x7E2B, + 0xBF71, 0x7E2C, 0xBF72, 0x7E2D, 0xBF73, 0x7E2E, 0xBF74, 0x7E2F, + 0xBF75, 0x7E30, 0xBF76, 0x7E31, 0xBF77, 0x7E32, 0xBF78, 0x7E33, + 0xBF79, 0x7E34, 0xBF7A, 0x7E35, 0xBF7B, 0x7E36, 0xBF7C, 0x7E37, + 0xBF7D, 0x7E38, 0xBF7E, 0x7E39, 0xBF80, 0x7E3A, 0xBF81, 0x7E3C, + 0xBF82, 0x7E3D, 0xBF83, 0x7E3E, 0xBF84, 0x7E3F, 0xBF85, 0x7E40, + 0xBF86, 0x7E42, 0xBF87, 0x7E43, 0xBF88, 0x7E44, 0xBF89, 0x7E45, + 0xBF8A, 0x7E46, 0xBF8B, 0x7E48, 0xBF8C, 0x7E49, 0xBF8D, 0x7E4A, + 0xBF8E, 0x7E4B, 0xBF8F, 0x7E4C, 0xBF90, 0x7E4D, 0xBF91, 0x7E4E, + 0xBF92, 0x7E4F, 0xBF93, 0x7E50, 0xBF94, 0x7E51, 0xBF95, 0x7E52, + 0xBF96, 0x7E53, 0xBF97, 0x7E54, 0xBF98, 0x7E55, 0xBF99, 0x7E56, + 0xBF9A, 0x7E57, 0xBF9B, 0x7E58, 0xBF9C, 0x7E59, 0xBF9D, 0x7E5A, + 0xBF9E, 0x7E5B, 0xBF9F, 0x7E5C, 0xBFA0, 0x7E5D, 0xBFA1, 0x4FCA, + 0xBFA2, 0x7AE3, 0xBFA3, 0x6D5A, 0xBFA4, 0x90E1, 0xBFA5, 0x9A8F, + 0xBFA6, 0x5580, 0xBFA7, 0x5496, 0xBFA8, 0x5361, 0xBFA9, 0x54AF, + 0xBFAA, 0x5F00, 0xBFAB, 0x63E9, 0xBFAC, 0x6977, 0xBFAD, 0x51EF, + 0xBFAE, 0x6168, 0xBFAF, 0x520A, 0xBFB0, 0x582A, 0xBFB1, 0x52D8, + 0xBFB2, 0x574E, 0xBFB3, 0x780D, 0xBFB4, 0x770B, 0xBFB5, 0x5EB7, + 0xBFB6, 0x6177, 0xBFB7, 0x7CE0, 0xBFB8, 0x625B, 0xBFB9, 0x6297, + 0xBFBA, 0x4EA2, 0xBFBB, 0x7095, 0xBFBC, 0x8003, 0xBFBD, 0x62F7, + 0xBFBE, 0x70E4, 0xBFBF, 0x9760, 0xBFC0, 0x5777, 0xBFC1, 0x82DB, + 0xBFC2, 0x67EF, 0xBFC3, 0x68F5, 0xBFC4, 0x78D5, 0xBFC5, 0x9897, + 0xBFC6, 0x79D1, 0xBFC7, 0x58F3, 0xBFC8, 0x54B3, 0xBFC9, 0x53EF, + 0xBFCA, 0x6E34, 0xBFCB, 0x514B, 0xBFCC, 0x523B, 0xBFCD, 0x5BA2, + 0xBFCE, 0x8BFE, 0xBFCF, 0x80AF, 0xBFD0, 0x5543, 0xBFD1, 0x57A6, + 0xBFD2, 0x6073, 0xBFD3, 0x5751, 0xBFD4, 0x542D, 0xBFD5, 0x7A7A, + 0xBFD6, 0x6050, 0xBFD7, 0x5B54, 0xBFD8, 0x63A7, 0xBFD9, 0x62A0, + 0xBFDA, 0x53E3, 0xBFDB, 0x6263, 0xBFDC, 0x5BC7, 0xBFDD, 0x67AF, + 0xBFDE, 0x54ED, 0xBFDF, 0x7A9F, 0xBFE0, 0x82E6, 0xBFE1, 0x9177, + 0xBFE2, 0x5E93, 0xBFE3, 0x88E4, 0xBFE4, 0x5938, 0xBFE5, 0x57AE, + 0xBFE6, 0x630E, 0xBFE7, 0x8DE8, 0xBFE8, 0x80EF, 0xBFE9, 0x5757, + 0xBFEA, 0x7B77, 0xBFEB, 0x4FA9, 0xBFEC, 0x5FEB, 0xBFED, 0x5BBD, + 0xBFEE, 0x6B3E, 0xBFEF, 0x5321, 0xBFF0, 0x7B50, 0xBFF1, 0x72C2, + 0xBFF2, 0x6846, 0xBFF3, 0x77FF, 0xBFF4, 0x7736, 0xBFF5, 0x65F7, + 0xBFF6, 0x51B5, 0xBFF7, 0x4E8F, 0xBFF8, 0x76D4, 0xBFF9, 0x5CBF, + 0xBFFA, 0x7AA5, 0xBFFB, 0x8475, 0xBFFC, 0x594E, 0xBFFD, 0x9B41, + 0xBFFE, 0x5080, 0xC040, 0x7E5E, 0xC041, 0x7E5F, 0xC042, 0x7E60, + 0xC043, 0x7E61, 0xC044, 0x7E62, 0xC045, 0x7E63, 0xC046, 0x7E64, + 0xC047, 0x7E65, 0xC048, 0x7E66, 0xC049, 0x7E67, 0xC04A, 0x7E68, + 0xC04B, 0x7E69, 0xC04C, 0x7E6A, 0xC04D, 0x7E6B, 0xC04E, 0x7E6C, + 0xC04F, 0x7E6D, 0xC050, 0x7E6E, 0xC051, 0x7E6F, 0xC052, 0x7E70, + 0xC053, 0x7E71, 0xC054, 0x7E72, 0xC055, 0x7E73, 0xC056, 0x7E74, + 0xC057, 0x7E75, 0xC058, 0x7E76, 0xC059, 0x7E77, 0xC05A, 0x7E78, + 0xC05B, 0x7E79, 0xC05C, 0x7E7A, 0xC05D, 0x7E7B, 0xC05E, 0x7E7C, + 0xC05F, 0x7E7D, 0xC060, 0x7E7E, 0xC061, 0x7E7F, 0xC062, 0x7E80, + 0xC063, 0x7E81, 0xC064, 0x7E83, 0xC065, 0x7E84, 0xC066, 0x7E85, + 0xC067, 0x7E86, 0xC068, 0x7E87, 0xC069, 0x7E88, 0xC06A, 0x7E89, + 0xC06B, 0x7E8A, 0xC06C, 0x7E8B, 0xC06D, 0x7E8C, 0xC06E, 0x7E8D, + 0xC06F, 0x7E8E, 0xC070, 0x7E8F, 0xC071, 0x7E90, 0xC072, 0x7E91, + 0xC073, 0x7E92, 0xC074, 0x7E93, 0xC075, 0x7E94, 0xC076, 0x7E95, + 0xC077, 0x7E96, 0xC078, 0x7E97, 0xC079, 0x7E98, 0xC07A, 0x7E99, + 0xC07B, 0x7E9A, 0xC07C, 0x7E9C, 0xC07D, 0x7E9D, 0xC07E, 0x7E9E, + 0xC080, 0x7EAE, 0xC081, 0x7EB4, 0xC082, 0x7EBB, 0xC083, 0x7EBC, + 0xC084, 0x7ED6, 0xC085, 0x7EE4, 0xC086, 0x7EEC, 0xC087, 0x7EF9, + 0xC088, 0x7F0A, 0xC089, 0x7F10, 0xC08A, 0x7F1E, 0xC08B, 0x7F37, + 0xC08C, 0x7F39, 0xC08D, 0x7F3B, 0xC08E, 0x7F3C, 0xC08F, 0x7F3D, + 0xC090, 0x7F3E, 0xC091, 0x7F3F, 0xC092, 0x7F40, 0xC093, 0x7F41, + 0xC094, 0x7F43, 0xC095, 0x7F46, 0xC096, 0x7F47, 0xC097, 0x7F48, + 0xC098, 0x7F49, 0xC099, 0x7F4A, 0xC09A, 0x7F4B, 0xC09B, 0x7F4C, + 0xC09C, 0x7F4D, 0xC09D, 0x7F4E, 0xC09E, 0x7F4F, 0xC09F, 0x7F52, + 0xC0A0, 0x7F53, 0xC0A1, 0x9988, 0xC0A2, 0x6127, 0xC0A3, 0x6E83, + 0xC0A4, 0x5764, 0xC0A5, 0x6606, 0xC0A6, 0x6346, 0xC0A7, 0x56F0, + 0xC0A8, 0x62EC, 0xC0A9, 0x6269, 0xC0AA, 0x5ED3, 0xC0AB, 0x9614, + 0xC0AC, 0x5783, 0xC0AD, 0x62C9, 0xC0AE, 0x5587, 0xC0AF, 0x8721, + 0xC0B0, 0x814A, 0xC0B1, 0x8FA3, 0xC0B2, 0x5566, 0xC0B3, 0x83B1, + 0xC0B4, 0x6765, 0xC0B5, 0x8D56, 0xC0B6, 0x84DD, 0xC0B7, 0x5A6A, + 0xC0B8, 0x680F, 0xC0B9, 0x62E6, 0xC0BA, 0x7BEE, 0xC0BB, 0x9611, + 0xC0BC, 0x5170, 0xC0BD, 0x6F9C, 0xC0BE, 0x8C30, 0xC0BF, 0x63FD, + 0xC0C0, 0x89C8, 0xC0C1, 0x61D2, 0xC0C2, 0x7F06, 0xC0C3, 0x70C2, + 0xC0C4, 0x6EE5, 0xC0C5, 0x7405, 0xC0C6, 0x6994, 0xC0C7, 0x72FC, + 0xC0C8, 0x5ECA, 0xC0C9, 0x90CE, 0xC0CA, 0x6717, 0xC0CB, 0x6D6A, + 0xC0CC, 0x635E, 0xC0CD, 0x52B3, 0xC0CE, 0x7262, 0xC0CF, 0x8001, + 0xC0D0, 0x4F6C, 0xC0D1, 0x59E5, 0xC0D2, 0x916A, 0xC0D3, 0x70D9, + 0xC0D4, 0x6D9D, 0xC0D5, 0x52D2, 0xC0D6, 0x4E50, 0xC0D7, 0x96F7, + 0xC0D8, 0x956D, 0xC0D9, 0x857E, 0xC0DA, 0x78CA, 0xC0DB, 0x7D2F, + 0xC0DC, 0x5121, 0xC0DD, 0x5792, 0xC0DE, 0x64C2, 0xC0DF, 0x808B, + 0xC0E0, 0x7C7B, 0xC0E1, 0x6CEA, 0xC0E2, 0x68F1, 0xC0E3, 0x695E, + 0xC0E4, 0x51B7, 0xC0E5, 0x5398, 0xC0E6, 0x68A8, 0xC0E7, 0x7281, + 0xC0E8, 0x9ECE, 0xC0E9, 0x7BF1, 0xC0EA, 0x72F8, 0xC0EB, 0x79BB, + 0xC0EC, 0x6F13, 0xC0ED, 0x7406, 0xC0EE, 0x674E, 0xC0EF, 0x91CC, + 0xC0F0, 0x9CA4, 0xC0F1, 0x793C, 0xC0F2, 0x8389, 0xC0F3, 0x8354, + 0xC0F4, 0x540F, 0xC0F5, 0x6817, 0xC0F6, 0x4E3D, 0xC0F7, 0x5389, + 0xC0F8, 0x52B1, 0xC0F9, 0x783E, 0xC0FA, 0x5386, 0xC0FB, 0x5229, + 0xC0FC, 0x5088, 0xC0FD, 0x4F8B, 0xC0FE, 0x4FD0, 0xC140, 0x7F56, + 0xC141, 0x7F59, 0xC142, 0x7F5B, 0xC143, 0x7F5C, 0xC144, 0x7F5D, + 0xC145, 0x7F5E, 0xC146, 0x7F60, 0xC147, 0x7F63, 0xC148, 0x7F64, + 0xC149, 0x7F65, 0xC14A, 0x7F66, 0xC14B, 0x7F67, 0xC14C, 0x7F6B, + 0xC14D, 0x7F6C, 0xC14E, 0x7F6D, 0xC14F, 0x7F6F, 0xC150, 0x7F70, + 0xC151, 0x7F73, 0xC152, 0x7F75, 0xC153, 0x7F76, 0xC154, 0x7F77, + 0xC155, 0x7F78, 0xC156, 0x7F7A, 0xC157, 0x7F7B, 0xC158, 0x7F7C, + 0xC159, 0x7F7D, 0xC15A, 0x7F7F, 0xC15B, 0x7F80, 0xC15C, 0x7F82, + 0xC15D, 0x7F83, 0xC15E, 0x7F84, 0xC15F, 0x7F85, 0xC160, 0x7F86, + 0xC161, 0x7F87, 0xC162, 0x7F88, 0xC163, 0x7F89, 0xC164, 0x7F8B, + 0xC165, 0x7F8D, 0xC166, 0x7F8F, 0xC167, 0x7F90, 0xC168, 0x7F91, + 0xC169, 0x7F92, 0xC16A, 0x7F93, 0xC16B, 0x7F95, 0xC16C, 0x7F96, + 0xC16D, 0x7F97, 0xC16E, 0x7F98, 0xC16F, 0x7F99, 0xC170, 0x7F9B, + 0xC171, 0x7F9C, 0xC172, 0x7FA0, 0xC173, 0x7FA2, 0xC174, 0x7FA3, + 0xC175, 0x7FA5, 0xC176, 0x7FA6, 0xC177, 0x7FA8, 0xC178, 0x7FA9, + 0xC179, 0x7FAA, 0xC17A, 0x7FAB, 0xC17B, 0x7FAC, 0xC17C, 0x7FAD, + 0xC17D, 0x7FAE, 0xC17E, 0x7FB1, 0xC180, 0x7FB3, 0xC181, 0x7FB4, + 0xC182, 0x7FB5, 0xC183, 0x7FB6, 0xC184, 0x7FB7, 0xC185, 0x7FBA, + 0xC186, 0x7FBB, 0xC187, 0x7FBE, 0xC188, 0x7FC0, 0xC189, 0x7FC2, + 0xC18A, 0x7FC3, 0xC18B, 0x7FC4, 0xC18C, 0x7FC6, 0xC18D, 0x7FC7, + 0xC18E, 0x7FC8, 0xC18F, 0x7FC9, 0xC190, 0x7FCB, 0xC191, 0x7FCD, + 0xC192, 0x7FCF, 0xC193, 0x7FD0, 0xC194, 0x7FD1, 0xC195, 0x7FD2, + 0xC196, 0x7FD3, 0xC197, 0x7FD6, 0xC198, 0x7FD7, 0xC199, 0x7FD9, + 0xC19A, 0x7FDA, 0xC19B, 0x7FDB, 0xC19C, 0x7FDC, 0xC19D, 0x7FDD, + 0xC19E, 0x7FDE, 0xC19F, 0x7FE2, 0xC1A0, 0x7FE3, 0xC1A1, 0x75E2, + 0xC1A2, 0x7ACB, 0xC1A3, 0x7C92, 0xC1A4, 0x6CA5, 0xC1A5, 0x96B6, + 0xC1A6, 0x529B, 0xC1A7, 0x7483, 0xC1A8, 0x54E9, 0xC1A9, 0x4FE9, + 0xC1AA, 0x8054, 0xC1AB, 0x83B2, 0xC1AC, 0x8FDE, 0xC1AD, 0x9570, + 0xC1AE, 0x5EC9, 0xC1AF, 0x601C, 0xC1B0, 0x6D9F, 0xC1B1, 0x5E18, + 0xC1B2, 0x655B, 0xC1B3, 0x8138, 0xC1B4, 0x94FE, 0xC1B5, 0x604B, + 0xC1B6, 0x70BC, 0xC1B7, 0x7EC3, 0xC1B8, 0x7CAE, 0xC1B9, 0x51C9, + 0xC1BA, 0x6881, 0xC1BB, 0x7CB1, 0xC1BC, 0x826F, 0xC1BD, 0x4E24, + 0xC1BE, 0x8F86, 0xC1BF, 0x91CF, 0xC1C0, 0x667E, 0xC1C1, 0x4EAE, + 0xC1C2, 0x8C05, 0xC1C3, 0x64A9, 0xC1C4, 0x804A, 0xC1C5, 0x50DA, + 0xC1C6, 0x7597, 0xC1C7, 0x71CE, 0xC1C8, 0x5BE5, 0xC1C9, 0x8FBD, + 0xC1CA, 0x6F66, 0xC1CB, 0x4E86, 0xC1CC, 0x6482, 0xC1CD, 0x9563, + 0xC1CE, 0x5ED6, 0xC1CF, 0x6599, 0xC1D0, 0x5217, 0xC1D1, 0x88C2, + 0xC1D2, 0x70C8, 0xC1D3, 0x52A3, 0xC1D4, 0x730E, 0xC1D5, 0x7433, + 0xC1D6, 0x6797, 0xC1D7, 0x78F7, 0xC1D8, 0x9716, 0xC1D9, 0x4E34, + 0xC1DA, 0x90BB, 0xC1DB, 0x9CDE, 0xC1DC, 0x6DCB, 0xC1DD, 0x51DB, + 0xC1DE, 0x8D41, 0xC1DF, 0x541D, 0xC1E0, 0x62CE, 0xC1E1, 0x73B2, + 0xC1E2, 0x83F1, 0xC1E3, 0x96F6, 0xC1E4, 0x9F84, 0xC1E5, 0x94C3, + 0xC1E6, 0x4F36, 0xC1E7, 0x7F9A, 0xC1E8, 0x51CC, 0xC1E9, 0x7075, + 0xC1EA, 0x9675, 0xC1EB, 0x5CAD, 0xC1EC, 0x9886, 0xC1ED, 0x53E6, + 0xC1EE, 0x4EE4, 0xC1EF, 0x6E9C, 0xC1F0, 0x7409, 0xC1F1, 0x69B4, + 0xC1F2, 0x786B, 0xC1F3, 0x998F, 0xC1F4, 0x7559, 0xC1F5, 0x5218, + 0xC1F6, 0x7624, 0xC1F7, 0x6D41, 0xC1F8, 0x67F3, 0xC1F9, 0x516D, + 0xC1FA, 0x9F99, 0xC1FB, 0x804B, 0xC1FC, 0x5499, 0xC1FD, 0x7B3C, + 0xC1FE, 0x7ABF, 0xC240, 0x7FE4, 0xC241, 0x7FE7, 0xC242, 0x7FE8, + 0xC243, 0x7FEA, 0xC244, 0x7FEB, 0xC245, 0x7FEC, 0xC246, 0x7FED, + 0xC247, 0x7FEF, 0xC248, 0x7FF2, 0xC249, 0x7FF4, 0xC24A, 0x7FF5, + 0xC24B, 0x7FF6, 0xC24C, 0x7FF7, 0xC24D, 0x7FF8, 0xC24E, 0x7FF9, + 0xC24F, 0x7FFA, 0xC250, 0x7FFD, 0xC251, 0x7FFE, 0xC252, 0x7FFF, + 0xC253, 0x8002, 0xC254, 0x8007, 0xC255, 0x8008, 0xC256, 0x8009, + 0xC257, 0x800A, 0xC258, 0x800E, 0xC259, 0x800F, 0xC25A, 0x8011, + 0xC25B, 0x8013, 0xC25C, 0x801A, 0xC25D, 0x801B, 0xC25E, 0x801D, + 0xC25F, 0x801E, 0xC260, 0x801F, 0xC261, 0x8021, 0xC262, 0x8023, + 0xC263, 0x8024, 0xC264, 0x802B, 0xC265, 0x802C, 0xC266, 0x802D, + 0xC267, 0x802E, 0xC268, 0x802F, 0xC269, 0x8030, 0xC26A, 0x8032, + 0xC26B, 0x8034, 0xC26C, 0x8039, 0xC26D, 0x803A, 0xC26E, 0x803C, + 0xC26F, 0x803E, 0xC270, 0x8040, 0xC271, 0x8041, 0xC272, 0x8044, + 0xC273, 0x8045, 0xC274, 0x8047, 0xC275, 0x8048, 0xC276, 0x8049, + 0xC277, 0x804E, 0xC278, 0x804F, 0xC279, 0x8050, 0xC27A, 0x8051, + 0xC27B, 0x8053, 0xC27C, 0x8055, 0xC27D, 0x8056, 0xC27E, 0x8057, + 0xC280, 0x8059, 0xC281, 0x805B, 0xC282, 0x805C, 0xC283, 0x805D, + 0xC284, 0x805E, 0xC285, 0x805F, 0xC286, 0x8060, 0xC287, 0x8061, + 0xC288, 0x8062, 0xC289, 0x8063, 0xC28A, 0x8064, 0xC28B, 0x8065, + 0xC28C, 0x8066, 0xC28D, 0x8067, 0xC28E, 0x8068, 0xC28F, 0x806B, + 0xC290, 0x806C, 0xC291, 0x806D, 0xC292, 0x806E, 0xC293, 0x806F, + 0xC294, 0x8070, 0xC295, 0x8072, 0xC296, 0x8073, 0xC297, 0x8074, + 0xC298, 0x8075, 0xC299, 0x8076, 0xC29A, 0x8077, 0xC29B, 0x8078, + 0xC29C, 0x8079, 0xC29D, 0x807A, 0xC29E, 0x807B, 0xC29F, 0x807C, + 0xC2A0, 0x807D, 0xC2A1, 0x9686, 0xC2A2, 0x5784, 0xC2A3, 0x62E2, + 0xC2A4, 0x9647, 0xC2A5, 0x697C, 0xC2A6, 0x5A04, 0xC2A7, 0x6402, + 0xC2A8, 0x7BD3, 0xC2A9, 0x6F0F, 0xC2AA, 0x964B, 0xC2AB, 0x82A6, + 0xC2AC, 0x5362, 0xC2AD, 0x9885, 0xC2AE, 0x5E90, 0xC2AF, 0x7089, + 0xC2B0, 0x63B3, 0xC2B1, 0x5364, 0xC2B2, 0x864F, 0xC2B3, 0x9C81, + 0xC2B4, 0x9E93, 0xC2B5, 0x788C, 0xC2B6, 0x9732, 0xC2B7, 0x8DEF, + 0xC2B8, 0x8D42, 0xC2B9, 0x9E7F, 0xC2BA, 0x6F5E, 0xC2BB, 0x7984, + 0xC2BC, 0x5F55, 0xC2BD, 0x9646, 0xC2BE, 0x622E, 0xC2BF, 0x9A74, + 0xC2C0, 0x5415, 0xC2C1, 0x94DD, 0xC2C2, 0x4FA3, 0xC2C3, 0x65C5, + 0xC2C4, 0x5C65, 0xC2C5, 0x5C61, 0xC2C6, 0x7F15, 0xC2C7, 0x8651, + 0xC2C8, 0x6C2F, 0xC2C9, 0x5F8B, 0xC2CA, 0x7387, 0xC2CB, 0x6EE4, + 0xC2CC, 0x7EFF, 0xC2CD, 0x5CE6, 0xC2CE, 0x631B, 0xC2CF, 0x5B6A, + 0xC2D0, 0x6EE6, 0xC2D1, 0x5375, 0xC2D2, 0x4E71, 0xC2D3, 0x63A0, + 0xC2D4, 0x7565, 0xC2D5, 0x62A1, 0xC2D6, 0x8F6E, 0xC2D7, 0x4F26, + 0xC2D8, 0x4ED1, 0xC2D9, 0x6CA6, 0xC2DA, 0x7EB6, 0xC2DB, 0x8BBA, + 0xC2DC, 0x841D, 0xC2DD, 0x87BA, 0xC2DE, 0x7F57, 0xC2DF, 0x903B, + 0xC2E0, 0x9523, 0xC2E1, 0x7BA9, 0xC2E2, 0x9AA1, 0xC2E3, 0x88F8, + 0xC2E4, 0x843D, 0xC2E5, 0x6D1B, 0xC2E6, 0x9A86, 0xC2E7, 0x7EDC, + 0xC2E8, 0x5988, 0xC2E9, 0x9EBB, 0xC2EA, 0x739B, 0xC2EB, 0x7801, + 0xC2EC, 0x8682, 0xC2ED, 0x9A6C, 0xC2EE, 0x9A82, 0xC2EF, 0x561B, + 0xC2F0, 0x5417, 0xC2F1, 0x57CB, 0xC2F2, 0x4E70, 0xC2F3, 0x9EA6, + 0xC2F4, 0x5356, 0xC2F5, 0x8FC8, 0xC2F6, 0x8109, 0xC2F7, 0x7792, + 0xC2F8, 0x9992, 0xC2F9, 0x86EE, 0xC2FA, 0x6EE1, 0xC2FB, 0x8513, + 0xC2FC, 0x66FC, 0xC2FD, 0x6162, 0xC2FE, 0x6F2B, 0xC340, 0x807E, + 0xC341, 0x8081, 0xC342, 0x8082, 0xC343, 0x8085, 0xC344, 0x8088, + 0xC345, 0x808A, 0xC346, 0x808D, 0xC347, 0x808E, 0xC348, 0x808F, + 0xC349, 0x8090, 0xC34A, 0x8091, 0xC34B, 0x8092, 0xC34C, 0x8094, + 0xC34D, 0x8095, 0xC34E, 0x8097, 0xC34F, 0x8099, 0xC350, 0x809E, + 0xC351, 0x80A3, 0xC352, 0x80A6, 0xC353, 0x80A7, 0xC354, 0x80A8, + 0xC355, 0x80AC, 0xC356, 0x80B0, 0xC357, 0x80B3, 0xC358, 0x80B5, + 0xC359, 0x80B6, 0xC35A, 0x80B8, 0xC35B, 0x80B9, 0xC35C, 0x80BB, + 0xC35D, 0x80C5, 0xC35E, 0x80C7, 0xC35F, 0x80C8, 0xC360, 0x80C9, + 0xC361, 0x80CA, 0xC362, 0x80CB, 0xC363, 0x80CF, 0xC364, 0x80D0, + 0xC365, 0x80D1, 0xC366, 0x80D2, 0xC367, 0x80D3, 0xC368, 0x80D4, + 0xC369, 0x80D5, 0xC36A, 0x80D8, 0xC36B, 0x80DF, 0xC36C, 0x80E0, + 0xC36D, 0x80E2, 0xC36E, 0x80E3, 0xC36F, 0x80E6, 0xC370, 0x80EE, + 0xC371, 0x80F5, 0xC372, 0x80F7, 0xC373, 0x80F9, 0xC374, 0x80FB, + 0xC375, 0x80FE, 0xC376, 0x80FF, 0xC377, 0x8100, 0xC378, 0x8101, + 0xC379, 0x8103, 0xC37A, 0x8104, 0xC37B, 0x8105, 0xC37C, 0x8107, + 0xC37D, 0x8108, 0xC37E, 0x810B, 0xC380, 0x810C, 0xC381, 0x8115, + 0xC382, 0x8117, 0xC383, 0x8119, 0xC384, 0x811B, 0xC385, 0x811C, + 0xC386, 0x811D, 0xC387, 0x811F, 0xC388, 0x8120, 0xC389, 0x8121, + 0xC38A, 0x8122, 0xC38B, 0x8123, 0xC38C, 0x8124, 0xC38D, 0x8125, + 0xC38E, 0x8126, 0xC38F, 0x8127, 0xC390, 0x8128, 0xC391, 0x8129, + 0xC392, 0x812A, 0xC393, 0x812B, 0xC394, 0x812D, 0xC395, 0x812E, + 0xC396, 0x8130, 0xC397, 0x8133, 0xC398, 0x8134, 0xC399, 0x8135, + 0xC39A, 0x8137, 0xC39B, 0x8139, 0xC39C, 0x813A, 0xC39D, 0x813B, + 0xC39E, 0x813C, 0xC39F, 0x813D, 0xC3A0, 0x813F, 0xC3A1, 0x8C29, + 0xC3A2, 0x8292, 0xC3A3, 0x832B, 0xC3A4, 0x76F2, 0xC3A5, 0x6C13, + 0xC3A6, 0x5FD9, 0xC3A7, 0x83BD, 0xC3A8, 0x732B, 0xC3A9, 0x8305, + 0xC3AA, 0x951A, 0xC3AB, 0x6BDB, 0xC3AC, 0x77DB, 0xC3AD, 0x94C6, + 0xC3AE, 0x536F, 0xC3AF, 0x8302, 0xC3B0, 0x5192, 0xC3B1, 0x5E3D, + 0xC3B2, 0x8C8C, 0xC3B3, 0x8D38, 0xC3B4, 0x4E48, 0xC3B5, 0x73AB, + 0xC3B6, 0x679A, 0xC3B7, 0x6885, 0xC3B8, 0x9176, 0xC3B9, 0x9709, + 0xC3BA, 0x7164, 0xC3BB, 0x6CA1, 0xC3BC, 0x7709, 0xC3BD, 0x5A92, + 0xC3BE, 0x9541, 0xC3BF, 0x6BCF, 0xC3C0, 0x7F8E, 0xC3C1, 0x6627, + 0xC3C2, 0x5BD0, 0xC3C3, 0x59B9, 0xC3C4, 0x5A9A, 0xC3C5, 0x95E8, + 0xC3C6, 0x95F7, 0xC3C7, 0x4EEC, 0xC3C8, 0x840C, 0xC3C9, 0x8499, + 0xC3CA, 0x6AAC, 0xC3CB, 0x76DF, 0xC3CC, 0x9530, 0xC3CD, 0x731B, + 0xC3CE, 0x68A6, 0xC3CF, 0x5B5F, 0xC3D0, 0x772F, 0xC3D1, 0x919A, + 0xC3D2, 0x9761, 0xC3D3, 0x7CDC, 0xC3D4, 0x8FF7, 0xC3D5, 0x8C1C, + 0xC3D6, 0x5F25, 0xC3D7, 0x7C73, 0xC3D8, 0x79D8, 0xC3D9, 0x89C5, + 0xC3DA, 0x6CCC, 0xC3DB, 0x871C, 0xC3DC, 0x5BC6, 0xC3DD, 0x5E42, + 0xC3DE, 0x68C9, 0xC3DF, 0x7720, 0xC3E0, 0x7EF5, 0xC3E1, 0x5195, + 0xC3E2, 0x514D, 0xC3E3, 0x52C9, 0xC3E4, 0x5A29, 0xC3E5, 0x7F05, + 0xC3E6, 0x9762, 0xC3E7, 0x82D7, 0xC3E8, 0x63CF, 0xC3E9, 0x7784, + 0xC3EA, 0x85D0, 0xC3EB, 0x79D2, 0xC3EC, 0x6E3A, 0xC3ED, 0x5E99, + 0xC3EE, 0x5999, 0xC3EF, 0x8511, 0xC3F0, 0x706D, 0xC3F1, 0x6C11, + 0xC3F2, 0x62BF, 0xC3F3, 0x76BF, 0xC3F4, 0x654F, 0xC3F5, 0x60AF, + 0xC3F6, 0x95FD, 0xC3F7, 0x660E, 0xC3F8, 0x879F, 0xC3F9, 0x9E23, + 0xC3FA, 0x94ED, 0xC3FB, 0x540D, 0xC3FC, 0x547D, 0xC3FD, 0x8C2C, + 0xC3FE, 0x6478, 0xC440, 0x8140, 0xC441, 0x8141, 0xC442, 0x8142, + 0xC443, 0x8143, 0xC444, 0x8144, 0xC445, 0x8145, 0xC446, 0x8147, + 0xC447, 0x8149, 0xC448, 0x814D, 0xC449, 0x814E, 0xC44A, 0x814F, + 0xC44B, 0x8152, 0xC44C, 0x8156, 0xC44D, 0x8157, 0xC44E, 0x8158, + 0xC44F, 0x815B, 0xC450, 0x815C, 0xC451, 0x815D, 0xC452, 0x815E, + 0xC453, 0x815F, 0xC454, 0x8161, 0xC455, 0x8162, 0xC456, 0x8163, + 0xC457, 0x8164, 0xC458, 0x8166, 0xC459, 0x8168, 0xC45A, 0x816A, + 0xC45B, 0x816B, 0xC45C, 0x816C, 0xC45D, 0x816F, 0xC45E, 0x8172, + 0xC45F, 0x8173, 0xC460, 0x8175, 0xC461, 0x8176, 0xC462, 0x8177, + 0xC463, 0x8178, 0xC464, 0x8181, 0xC465, 0x8183, 0xC466, 0x8184, + 0xC467, 0x8185, 0xC468, 0x8186, 0xC469, 0x8187, 0xC46A, 0x8189, + 0xC46B, 0x818B, 0xC46C, 0x818C, 0xC46D, 0x818D, 0xC46E, 0x818E, + 0xC46F, 0x8190, 0xC470, 0x8192, 0xC471, 0x8193, 0xC472, 0x8194, + 0xC473, 0x8195, 0xC474, 0x8196, 0xC475, 0x8197, 0xC476, 0x8199, + 0xC477, 0x819A, 0xC478, 0x819E, 0xC479, 0x819F, 0xC47A, 0x81A0, + 0xC47B, 0x81A1, 0xC47C, 0x81A2, 0xC47D, 0x81A4, 0xC47E, 0x81A5, + 0xC480, 0x81A7, 0xC481, 0x81A9, 0xC482, 0x81AB, 0xC483, 0x81AC, + 0xC484, 0x81AD, 0xC485, 0x81AE, 0xC486, 0x81AF, 0xC487, 0x81B0, + 0xC488, 0x81B1, 0xC489, 0x81B2, 0xC48A, 0x81B4, 0xC48B, 0x81B5, + 0xC48C, 0x81B6, 0xC48D, 0x81B7, 0xC48E, 0x81B8, 0xC48F, 0x81B9, + 0xC490, 0x81BC, 0xC491, 0x81BD, 0xC492, 0x81BE, 0xC493, 0x81BF, + 0xC494, 0x81C4, 0xC495, 0x81C5, 0xC496, 0x81C7, 0xC497, 0x81C8, + 0xC498, 0x81C9, 0xC499, 0x81CB, 0xC49A, 0x81CD, 0xC49B, 0x81CE, + 0xC49C, 0x81CF, 0xC49D, 0x81D0, 0xC49E, 0x81D1, 0xC49F, 0x81D2, + 0xC4A0, 0x81D3, 0xC4A1, 0x6479, 0xC4A2, 0x8611, 0xC4A3, 0x6A21, + 0xC4A4, 0x819C, 0xC4A5, 0x78E8, 0xC4A6, 0x6469, 0xC4A7, 0x9B54, + 0xC4A8, 0x62B9, 0xC4A9, 0x672B, 0xC4AA, 0x83AB, 0xC4AB, 0x58A8, + 0xC4AC, 0x9ED8, 0xC4AD, 0x6CAB, 0xC4AE, 0x6F20, 0xC4AF, 0x5BDE, + 0xC4B0, 0x964C, 0xC4B1, 0x8C0B, 0xC4B2, 0x725F, 0xC4B3, 0x67D0, + 0xC4B4, 0x62C7, 0xC4B5, 0x7261, 0xC4B6, 0x4EA9, 0xC4B7, 0x59C6, + 0xC4B8, 0x6BCD, 0xC4B9, 0x5893, 0xC4BA, 0x66AE, 0xC4BB, 0x5E55, + 0xC4BC, 0x52DF, 0xC4BD, 0x6155, 0xC4BE, 0x6728, 0xC4BF, 0x76EE, + 0xC4C0, 0x7766, 0xC4C1, 0x7267, 0xC4C2, 0x7A46, 0xC4C3, 0x62FF, + 0xC4C4, 0x54EA, 0xC4C5, 0x5450, 0xC4C6, 0x94A0, 0xC4C7, 0x90A3, + 0xC4C8, 0x5A1C, 0xC4C9, 0x7EB3, 0xC4CA, 0x6C16, 0xC4CB, 0x4E43, + 0xC4CC, 0x5976, 0xC4CD, 0x8010, 0xC4CE, 0x5948, 0xC4CF, 0x5357, + 0xC4D0, 0x7537, 0xC4D1, 0x96BE, 0xC4D2, 0x56CA, 0xC4D3, 0x6320, + 0xC4D4, 0x8111, 0xC4D5, 0x607C, 0xC4D6, 0x95F9, 0xC4D7, 0x6DD6, + 0xC4D8, 0x5462, 0xC4D9, 0x9981, 0xC4DA, 0x5185, 0xC4DB, 0x5AE9, + 0xC4DC, 0x80FD, 0xC4DD, 0x59AE, 0xC4DE, 0x9713, 0xC4DF, 0x502A, + 0xC4E0, 0x6CE5, 0xC4E1, 0x5C3C, 0xC4E2, 0x62DF, 0xC4E3, 0x4F60, + 0xC4E4, 0x533F, 0xC4E5, 0x817B, 0xC4E6, 0x9006, 0xC4E7, 0x6EBA, + 0xC4E8, 0x852B, 0xC4E9, 0x62C8, 0xC4EA, 0x5E74, 0xC4EB, 0x78BE, + 0xC4EC, 0x64B5, 0xC4ED, 0x637B, 0xC4EE, 0x5FF5, 0xC4EF, 0x5A18, + 0xC4F0, 0x917F, 0xC4F1, 0x9E1F, 0xC4F2, 0x5C3F, 0xC4F3, 0x634F, + 0xC4F4, 0x8042, 0xC4F5, 0x5B7D, 0xC4F6, 0x556E, 0xC4F7, 0x954A, + 0xC4F8, 0x954D, 0xC4F9, 0x6D85, 0xC4FA, 0x60A8, 0xC4FB, 0x67E0, + 0xC4FC, 0x72DE, 0xC4FD, 0x51DD, 0xC4FE, 0x5B81, 0xC540, 0x81D4, + 0xC541, 0x81D5, 0xC542, 0x81D6, 0xC543, 0x81D7, 0xC544, 0x81D8, + 0xC545, 0x81D9, 0xC546, 0x81DA, 0xC547, 0x81DB, 0xC548, 0x81DC, + 0xC549, 0x81DD, 0xC54A, 0x81DE, 0xC54B, 0x81DF, 0xC54C, 0x81E0, + 0xC54D, 0x81E1, 0xC54E, 0x81E2, 0xC54F, 0x81E4, 0xC550, 0x81E5, + 0xC551, 0x81E6, 0xC552, 0x81E8, 0xC553, 0x81E9, 0xC554, 0x81EB, + 0xC555, 0x81EE, 0xC556, 0x81EF, 0xC557, 0x81F0, 0xC558, 0x81F1, + 0xC559, 0x81F2, 0xC55A, 0x81F5, 0xC55B, 0x81F6, 0xC55C, 0x81F7, + 0xC55D, 0x81F8, 0xC55E, 0x81F9, 0xC55F, 0x81FA, 0xC560, 0x81FD, + 0xC561, 0x81FF, 0xC562, 0x8203, 0xC563, 0x8207, 0xC564, 0x8208, + 0xC565, 0x8209, 0xC566, 0x820A, 0xC567, 0x820B, 0xC568, 0x820E, + 0xC569, 0x820F, 0xC56A, 0x8211, 0xC56B, 0x8213, 0xC56C, 0x8215, + 0xC56D, 0x8216, 0xC56E, 0x8217, 0xC56F, 0x8218, 0xC570, 0x8219, + 0xC571, 0x821A, 0xC572, 0x821D, 0xC573, 0x8220, 0xC574, 0x8224, + 0xC575, 0x8225, 0xC576, 0x8226, 0xC577, 0x8227, 0xC578, 0x8229, + 0xC579, 0x822E, 0xC57A, 0x8232, 0xC57B, 0x823A, 0xC57C, 0x823C, + 0xC57D, 0x823D, 0xC57E, 0x823F, 0xC580, 0x8240, 0xC581, 0x8241, + 0xC582, 0x8242, 0xC583, 0x8243, 0xC584, 0x8245, 0xC585, 0x8246, + 0xC586, 0x8248, 0xC587, 0x824A, 0xC588, 0x824C, 0xC589, 0x824D, + 0xC58A, 0x824E, 0xC58B, 0x8250, 0xC58C, 0x8251, 0xC58D, 0x8252, + 0xC58E, 0x8253, 0xC58F, 0x8254, 0xC590, 0x8255, 0xC591, 0x8256, + 0xC592, 0x8257, 0xC593, 0x8259, 0xC594, 0x825B, 0xC595, 0x825C, + 0xC596, 0x825D, 0xC597, 0x825E, 0xC598, 0x8260, 0xC599, 0x8261, + 0xC59A, 0x8262, 0xC59B, 0x8263, 0xC59C, 0x8264, 0xC59D, 0x8265, + 0xC59E, 0x8266, 0xC59F, 0x8267, 0xC5A0, 0x8269, 0xC5A1, 0x62E7, + 0xC5A2, 0x6CDE, 0xC5A3, 0x725B, 0xC5A4, 0x626D, 0xC5A5, 0x94AE, + 0xC5A6, 0x7EBD, 0xC5A7, 0x8113, 0xC5A8, 0x6D53, 0xC5A9, 0x519C, + 0xC5AA, 0x5F04, 0xC5AB, 0x5974, 0xC5AC, 0x52AA, 0xC5AD, 0x6012, + 0xC5AE, 0x5973, 0xC5AF, 0x6696, 0xC5B0, 0x8650, 0xC5B1, 0x759F, + 0xC5B2, 0x632A, 0xC5B3, 0x61E6, 0xC5B4, 0x7CEF, 0xC5B5, 0x8BFA, + 0xC5B6, 0x54E6, 0xC5B7, 0x6B27, 0xC5B8, 0x9E25, 0xC5B9, 0x6BB4, + 0xC5BA, 0x85D5, 0xC5BB, 0x5455, 0xC5BC, 0x5076, 0xC5BD, 0x6CA4, + 0xC5BE, 0x556A, 0xC5BF, 0x8DB4, 0xC5C0, 0x722C, 0xC5C1, 0x5E15, + 0xC5C2, 0x6015, 0xC5C3, 0x7436, 0xC5C4, 0x62CD, 0xC5C5, 0x6392, + 0xC5C6, 0x724C, 0xC5C7, 0x5F98, 0xC5C8, 0x6E43, 0xC5C9, 0x6D3E, + 0xC5CA, 0x6500, 0xC5CB, 0x6F58, 0xC5CC, 0x76D8, 0xC5CD, 0x78D0, + 0xC5CE, 0x76FC, 0xC5CF, 0x7554, 0xC5D0, 0x5224, 0xC5D1, 0x53DB, + 0xC5D2, 0x4E53, 0xC5D3, 0x5E9E, 0xC5D4, 0x65C1, 0xC5D5, 0x802A, + 0xC5D6, 0x80D6, 0xC5D7, 0x629B, 0xC5D8, 0x5486, 0xC5D9, 0x5228, + 0xC5DA, 0x70AE, 0xC5DB, 0x888D, 0xC5DC, 0x8DD1, 0xC5DD, 0x6CE1, + 0xC5DE, 0x5478, 0xC5DF, 0x80DA, 0xC5E0, 0x57F9, 0xC5E1, 0x88F4, + 0xC5E2, 0x8D54, 0xC5E3, 0x966A, 0xC5E4, 0x914D, 0xC5E5, 0x4F69, + 0xC5E6, 0x6C9B, 0xC5E7, 0x55B7, 0xC5E8, 0x76C6, 0xC5E9, 0x7830, + 0xC5EA, 0x62A8, 0xC5EB, 0x70F9, 0xC5EC, 0x6F8E, 0xC5ED, 0x5F6D, + 0xC5EE, 0x84EC, 0xC5EF, 0x68DA, 0xC5F0, 0x787C, 0xC5F1, 0x7BF7, + 0xC5F2, 0x81A8, 0xC5F3, 0x670B, 0xC5F4, 0x9E4F, 0xC5F5, 0x6367, + 0xC5F6, 0x78B0, 0xC5F7, 0x576F, 0xC5F8, 0x7812, 0xC5F9, 0x9739, + 0xC5FA, 0x6279, 0xC5FB, 0x62AB, 0xC5FC, 0x5288, 0xC5FD, 0x7435, + 0xC5FE, 0x6BD7, 0xC640, 0x826A, 0xC641, 0x826B, 0xC642, 0x826C, + 0xC643, 0x826D, 0xC644, 0x8271, 0xC645, 0x8275, 0xC646, 0x8276, + 0xC647, 0x8277, 0xC648, 0x8278, 0xC649, 0x827B, 0xC64A, 0x827C, + 0xC64B, 0x8280, 0xC64C, 0x8281, 0xC64D, 0x8283, 0xC64E, 0x8285, + 0xC64F, 0x8286, 0xC650, 0x8287, 0xC651, 0x8289, 0xC652, 0x828C, + 0xC653, 0x8290, 0xC654, 0x8293, 0xC655, 0x8294, 0xC656, 0x8295, + 0xC657, 0x8296, 0xC658, 0x829A, 0xC659, 0x829B, 0xC65A, 0x829E, + 0xC65B, 0x82A0, 0xC65C, 0x82A2, 0xC65D, 0x82A3, 0xC65E, 0x82A7, + 0xC65F, 0x82B2, 0xC660, 0x82B5, 0xC661, 0x82B6, 0xC662, 0x82BA, + 0xC663, 0x82BB, 0xC664, 0x82BC, 0xC665, 0x82BF, 0xC666, 0x82C0, + 0xC667, 0x82C2, 0xC668, 0x82C3, 0xC669, 0x82C5, 0xC66A, 0x82C6, + 0xC66B, 0x82C9, 0xC66C, 0x82D0, 0xC66D, 0x82D6, 0xC66E, 0x82D9, + 0xC66F, 0x82DA, 0xC670, 0x82DD, 0xC671, 0x82E2, 0xC672, 0x82E7, + 0xC673, 0x82E8, 0xC674, 0x82E9, 0xC675, 0x82EA, 0xC676, 0x82EC, + 0xC677, 0x82ED, 0xC678, 0x82EE, 0xC679, 0x82F0, 0xC67A, 0x82F2, + 0xC67B, 0x82F3, 0xC67C, 0x82F5, 0xC67D, 0x82F6, 0xC67E, 0x82F8, + 0xC680, 0x82FA, 0xC681, 0x82FC, 0xC682, 0x82FD, 0xC683, 0x82FE, + 0xC684, 0x82FF, 0xC685, 0x8300, 0xC686, 0x830A, 0xC687, 0x830B, + 0xC688, 0x830D, 0xC689, 0x8310, 0xC68A, 0x8312, 0xC68B, 0x8313, + 0xC68C, 0x8316, 0xC68D, 0x8318, 0xC68E, 0x8319, 0xC68F, 0x831D, + 0xC690, 0x831E, 0xC691, 0x831F, 0xC692, 0x8320, 0xC693, 0x8321, + 0xC694, 0x8322, 0xC695, 0x8323, 0xC696, 0x8324, 0xC697, 0x8325, + 0xC698, 0x8326, 0xC699, 0x8329, 0xC69A, 0x832A, 0xC69B, 0x832E, + 0xC69C, 0x8330, 0xC69D, 0x8332, 0xC69E, 0x8337, 0xC69F, 0x833B, + 0xC6A0, 0x833D, 0xC6A1, 0x5564, 0xC6A2, 0x813E, 0xC6A3, 0x75B2, + 0xC6A4, 0x76AE, 0xC6A5, 0x5339, 0xC6A6, 0x75DE, 0xC6A7, 0x50FB, + 0xC6A8, 0x5C41, 0xC6A9, 0x8B6C, 0xC6AA, 0x7BC7, 0xC6AB, 0x504F, + 0xC6AC, 0x7247, 0xC6AD, 0x9A97, 0xC6AE, 0x98D8, 0xC6AF, 0x6F02, + 0xC6B0, 0x74E2, 0xC6B1, 0x7968, 0xC6B2, 0x6487, 0xC6B3, 0x77A5, + 0xC6B4, 0x62FC, 0xC6B5, 0x9891, 0xC6B6, 0x8D2B, 0xC6B7, 0x54C1, + 0xC6B8, 0x8058, 0xC6B9, 0x4E52, 0xC6BA, 0x576A, 0xC6BB, 0x82F9, + 0xC6BC, 0x840D, 0xC6BD, 0x5E73, 0xC6BE, 0x51ED, 0xC6BF, 0x74F6, + 0xC6C0, 0x8BC4, 0xC6C1, 0x5C4F, 0xC6C2, 0x5761, 0xC6C3, 0x6CFC, + 0xC6C4, 0x9887, 0xC6C5, 0x5A46, 0xC6C6, 0x7834, 0xC6C7, 0x9B44, + 0xC6C8, 0x8FEB, 0xC6C9, 0x7C95, 0xC6CA, 0x5256, 0xC6CB, 0x6251, + 0xC6CC, 0x94FA, 0xC6CD, 0x4EC6, 0xC6CE, 0x8386, 0xC6CF, 0x8461, + 0xC6D0, 0x83E9, 0xC6D1, 0x84B2, 0xC6D2, 0x57D4, 0xC6D3, 0x6734, + 0xC6D4, 0x5703, 0xC6D5, 0x666E, 0xC6D6, 0x6D66, 0xC6D7, 0x8C31, + 0xC6D8, 0x66DD, 0xC6D9, 0x7011, 0xC6DA, 0x671F, 0xC6DB, 0x6B3A, + 0xC6DC, 0x6816, 0xC6DD, 0x621A, 0xC6DE, 0x59BB, 0xC6DF, 0x4E03, + 0xC6E0, 0x51C4, 0xC6E1, 0x6F06, 0xC6E2, 0x67D2, 0xC6E3, 0x6C8F, + 0xC6E4, 0x5176, 0xC6E5, 0x68CB, 0xC6E6, 0x5947, 0xC6E7, 0x6B67, + 0xC6E8, 0x7566, 0xC6E9, 0x5D0E, 0xC6EA, 0x8110, 0xC6EB, 0x9F50, + 0xC6EC, 0x65D7, 0xC6ED, 0x7948, 0xC6EE, 0x7941, 0xC6EF, 0x9A91, + 0xC6F0, 0x8D77, 0xC6F1, 0x5C82, 0xC6F2, 0x4E5E, 0xC6F3, 0x4F01, + 0xC6F4, 0x542F, 0xC6F5, 0x5951, 0xC6F6, 0x780C, 0xC6F7, 0x5668, + 0xC6F8, 0x6C14, 0xC6F9, 0x8FC4, 0xC6FA, 0x5F03, 0xC6FB, 0x6C7D, + 0xC6FC, 0x6CE3, 0xC6FD, 0x8BAB, 0xC6FE, 0x6390, 0xC740, 0x833E, + 0xC741, 0x833F, 0xC742, 0x8341, 0xC743, 0x8342, 0xC744, 0x8344, + 0xC745, 0x8345, 0xC746, 0x8348, 0xC747, 0x834A, 0xC748, 0x834B, + 0xC749, 0x834C, 0xC74A, 0x834D, 0xC74B, 0x834E, 0xC74C, 0x8353, + 0xC74D, 0x8355, 0xC74E, 0x8356, 0xC74F, 0x8357, 0xC750, 0x8358, + 0xC751, 0x8359, 0xC752, 0x835D, 0xC753, 0x8362, 0xC754, 0x8370, + 0xC755, 0x8371, 0xC756, 0x8372, 0xC757, 0x8373, 0xC758, 0x8374, + 0xC759, 0x8375, 0xC75A, 0x8376, 0xC75B, 0x8379, 0xC75C, 0x837A, + 0xC75D, 0x837E, 0xC75E, 0x837F, 0xC75F, 0x8380, 0xC760, 0x8381, + 0xC761, 0x8382, 0xC762, 0x8383, 0xC763, 0x8384, 0xC764, 0x8387, + 0xC765, 0x8388, 0xC766, 0x838A, 0xC767, 0x838B, 0xC768, 0x838C, + 0xC769, 0x838D, 0xC76A, 0x838F, 0xC76B, 0x8390, 0xC76C, 0x8391, + 0xC76D, 0x8394, 0xC76E, 0x8395, 0xC76F, 0x8396, 0xC770, 0x8397, + 0xC771, 0x8399, 0xC772, 0x839A, 0xC773, 0x839D, 0xC774, 0x839F, + 0xC775, 0x83A1, 0xC776, 0x83A2, 0xC777, 0x83A3, 0xC778, 0x83A4, + 0xC779, 0x83A5, 0xC77A, 0x83A6, 0xC77B, 0x83A7, 0xC77C, 0x83AC, + 0xC77D, 0x83AD, 0xC77E, 0x83AE, 0xC780, 0x83AF, 0xC781, 0x83B5, + 0xC782, 0x83BB, 0xC783, 0x83BE, 0xC784, 0x83BF, 0xC785, 0x83C2, + 0xC786, 0x83C3, 0xC787, 0x83C4, 0xC788, 0x83C6, 0xC789, 0x83C8, + 0xC78A, 0x83C9, 0xC78B, 0x83CB, 0xC78C, 0x83CD, 0xC78D, 0x83CE, + 0xC78E, 0x83D0, 0xC78F, 0x83D1, 0xC790, 0x83D2, 0xC791, 0x83D3, + 0xC792, 0x83D5, 0xC793, 0x83D7, 0xC794, 0x83D9, 0xC795, 0x83DA, + 0xC796, 0x83DB, 0xC797, 0x83DE, 0xC798, 0x83E2, 0xC799, 0x83E3, + 0xC79A, 0x83E4, 0xC79B, 0x83E6, 0xC79C, 0x83E7, 0xC79D, 0x83E8, + 0xC79E, 0x83EB, 0xC79F, 0x83EC, 0xC7A0, 0x83ED, 0xC7A1, 0x6070, + 0xC7A2, 0x6D3D, 0xC7A3, 0x7275, 0xC7A4, 0x6266, 0xC7A5, 0x948E, + 0xC7A6, 0x94C5, 0xC7A7, 0x5343, 0xC7A8, 0x8FC1, 0xC7A9, 0x7B7E, + 0xC7AA, 0x4EDF, 0xC7AB, 0x8C26, 0xC7AC, 0x4E7E, 0xC7AD, 0x9ED4, + 0xC7AE, 0x94B1, 0xC7AF, 0x94B3, 0xC7B0, 0x524D, 0xC7B1, 0x6F5C, + 0xC7B2, 0x9063, 0xC7B3, 0x6D45, 0xC7B4, 0x8C34, 0xC7B5, 0x5811, + 0xC7B6, 0x5D4C, 0xC7B7, 0x6B20, 0xC7B8, 0x6B49, 0xC7B9, 0x67AA, + 0xC7BA, 0x545B, 0xC7BB, 0x8154, 0xC7BC, 0x7F8C, 0xC7BD, 0x5899, + 0xC7BE, 0x8537, 0xC7BF, 0x5F3A, 0xC7C0, 0x62A2, 0xC7C1, 0x6A47, + 0xC7C2, 0x9539, 0xC7C3, 0x6572, 0xC7C4, 0x6084, 0xC7C5, 0x6865, + 0xC7C6, 0x77A7, 0xC7C7, 0x4E54, 0xC7C8, 0x4FA8, 0xC7C9, 0x5DE7, + 0xC7CA, 0x9798, 0xC7CB, 0x64AC, 0xC7CC, 0x7FD8, 0xC7CD, 0x5CED, + 0xC7CE, 0x4FCF, 0xC7CF, 0x7A8D, 0xC7D0, 0x5207, 0xC7D1, 0x8304, + 0xC7D2, 0x4E14, 0xC7D3, 0x602F, 0xC7D4, 0x7A83, 0xC7D5, 0x94A6, + 0xC7D6, 0x4FB5, 0xC7D7, 0x4EB2, 0xC7D8, 0x79E6, 0xC7D9, 0x7434, + 0xC7DA, 0x52E4, 0xC7DB, 0x82B9, 0xC7DC, 0x64D2, 0xC7DD, 0x79BD, + 0xC7DE, 0x5BDD, 0xC7DF, 0x6C81, 0xC7E0, 0x9752, 0xC7E1, 0x8F7B, + 0xC7E2, 0x6C22, 0xC7E3, 0x503E, 0xC7E4, 0x537F, 0xC7E5, 0x6E05, + 0xC7E6, 0x64CE, 0xC7E7, 0x6674, 0xC7E8, 0x6C30, 0xC7E9, 0x60C5, + 0xC7EA, 0x9877, 0xC7EB, 0x8BF7, 0xC7EC, 0x5E86, 0xC7ED, 0x743C, + 0xC7EE, 0x7A77, 0xC7EF, 0x79CB, 0xC7F0, 0x4E18, 0xC7F1, 0x90B1, + 0xC7F2, 0x7403, 0xC7F3, 0x6C42, 0xC7F4, 0x56DA, 0xC7F5, 0x914B, + 0xC7F6, 0x6CC5, 0xC7F7, 0x8D8B, 0xC7F8, 0x533A, 0xC7F9, 0x86C6, + 0xC7FA, 0x66F2, 0xC7FB, 0x8EAF, 0xC7FC, 0x5C48, 0xC7FD, 0x9A71, + 0xC7FE, 0x6E20, 0xC840, 0x83EE, 0xC841, 0x83EF, 0xC842, 0x83F3, + 0xC843, 0x83F4, 0xC844, 0x83F5, 0xC845, 0x83F6, 0xC846, 0x83F7, + 0xC847, 0x83FA, 0xC848, 0x83FB, 0xC849, 0x83FC, 0xC84A, 0x83FE, + 0xC84B, 0x83FF, 0xC84C, 0x8400, 0xC84D, 0x8402, 0xC84E, 0x8405, + 0xC84F, 0x8407, 0xC850, 0x8408, 0xC851, 0x8409, 0xC852, 0x840A, + 0xC853, 0x8410, 0xC854, 0x8412, 0xC855, 0x8413, 0xC856, 0x8414, + 0xC857, 0x8415, 0xC858, 0x8416, 0xC859, 0x8417, 0xC85A, 0x8419, + 0xC85B, 0x841A, 0xC85C, 0x841B, 0xC85D, 0x841E, 0xC85E, 0x841F, + 0xC85F, 0x8420, 0xC860, 0x8421, 0xC861, 0x8422, 0xC862, 0x8423, + 0xC863, 0x8429, 0xC864, 0x842A, 0xC865, 0x842B, 0xC866, 0x842C, + 0xC867, 0x842D, 0xC868, 0x842E, 0xC869, 0x842F, 0xC86A, 0x8430, + 0xC86B, 0x8432, 0xC86C, 0x8433, 0xC86D, 0x8434, 0xC86E, 0x8435, + 0xC86F, 0x8436, 0xC870, 0x8437, 0xC871, 0x8439, 0xC872, 0x843A, + 0xC873, 0x843B, 0xC874, 0x843E, 0xC875, 0x843F, 0xC876, 0x8440, + 0xC877, 0x8441, 0xC878, 0x8442, 0xC879, 0x8443, 0xC87A, 0x8444, + 0xC87B, 0x8445, 0xC87C, 0x8447, 0xC87D, 0x8448, 0xC87E, 0x8449, + 0xC880, 0x844A, 0xC881, 0x844B, 0xC882, 0x844C, 0xC883, 0x844D, + 0xC884, 0x844E, 0xC885, 0x844F, 0xC886, 0x8450, 0xC887, 0x8452, + 0xC888, 0x8453, 0xC889, 0x8454, 0xC88A, 0x8455, 0xC88B, 0x8456, + 0xC88C, 0x8458, 0xC88D, 0x845D, 0xC88E, 0x845E, 0xC88F, 0x845F, + 0xC890, 0x8460, 0xC891, 0x8462, 0xC892, 0x8464, 0xC893, 0x8465, + 0xC894, 0x8466, 0xC895, 0x8467, 0xC896, 0x8468, 0xC897, 0x846A, + 0xC898, 0x846E, 0xC899, 0x846F, 0xC89A, 0x8470, 0xC89B, 0x8472, + 0xC89C, 0x8474, 0xC89D, 0x8477, 0xC89E, 0x8479, 0xC89F, 0x847B, + 0xC8A0, 0x847C, 0xC8A1, 0x53D6, 0xC8A2, 0x5A36, 0xC8A3, 0x9F8B, + 0xC8A4, 0x8DA3, 0xC8A5, 0x53BB, 0xC8A6, 0x5708, 0xC8A7, 0x98A7, + 0xC8A8, 0x6743, 0xC8A9, 0x919B, 0xC8AA, 0x6CC9, 0xC8AB, 0x5168, + 0xC8AC, 0x75CA, 0xC8AD, 0x62F3, 0xC8AE, 0x72AC, 0xC8AF, 0x5238, + 0xC8B0, 0x529D, 0xC8B1, 0x7F3A, 0xC8B2, 0x7094, 0xC8B3, 0x7638, + 0xC8B4, 0x5374, 0xC8B5, 0x9E4A, 0xC8B6, 0x69B7, 0xC8B7, 0x786E, + 0xC8B8, 0x96C0, 0xC8B9, 0x88D9, 0xC8BA, 0x7FA4, 0xC8BB, 0x7136, + 0xC8BC, 0x71C3, 0xC8BD, 0x5189, 0xC8BE, 0x67D3, 0xC8BF, 0x74E4, + 0xC8C0, 0x58E4, 0xC8C1, 0x6518, 0xC8C2, 0x56B7, 0xC8C3, 0x8BA9, + 0xC8C4, 0x9976, 0xC8C5, 0x6270, 0xC8C6, 0x7ED5, 0xC8C7, 0x60F9, + 0xC8C8, 0x70ED, 0xC8C9, 0x58EC, 0xC8CA, 0x4EC1, 0xC8CB, 0x4EBA, + 0xC8CC, 0x5FCD, 0xC8CD, 0x97E7, 0xC8CE, 0x4EFB, 0xC8CF, 0x8BA4, + 0xC8D0, 0x5203, 0xC8D1, 0x598A, 0xC8D2, 0x7EAB, 0xC8D3, 0x6254, + 0xC8D4, 0x4ECD, 0xC8D5, 0x65E5, 0xC8D6, 0x620E, 0xC8D7, 0x8338, + 0xC8D8, 0x84C9, 0xC8D9, 0x8363, 0xC8DA, 0x878D, 0xC8DB, 0x7194, + 0xC8DC, 0x6EB6, 0xC8DD, 0x5BB9, 0xC8DE, 0x7ED2, 0xC8DF, 0x5197, + 0xC8E0, 0x63C9, 0xC8E1, 0x67D4, 0xC8E2, 0x8089, 0xC8E3, 0x8339, + 0xC8E4, 0x8815, 0xC8E5, 0x5112, 0xC8E6, 0x5B7A, 0xC8E7, 0x5982, + 0xC8E8, 0x8FB1, 0xC8E9, 0x4E73, 0xC8EA, 0x6C5D, 0xC8EB, 0x5165, + 0xC8EC, 0x8925, 0xC8ED, 0x8F6F, 0xC8EE, 0x962E, 0xC8EF, 0x854A, + 0xC8F0, 0x745E, 0xC8F1, 0x9510, 0xC8F2, 0x95F0, 0xC8F3, 0x6DA6, + 0xC8F4, 0x82E5, 0xC8F5, 0x5F31, 0xC8F6, 0x6492, 0xC8F7, 0x6D12, + 0xC8F8, 0x8428, 0xC8F9, 0x816E, 0xC8FA, 0x9CC3, 0xC8FB, 0x585E, + 0xC8FC, 0x8D5B, 0xC8FD, 0x4E09, 0xC8FE, 0x53C1, 0xC940, 0x847D, + 0xC941, 0x847E, 0xC942, 0x847F, 0xC943, 0x8480, 0xC944, 0x8481, + 0xC945, 0x8483, 0xC946, 0x8484, 0xC947, 0x8485, 0xC948, 0x8486, + 0xC949, 0x848A, 0xC94A, 0x848D, 0xC94B, 0x848F, 0xC94C, 0x8490, + 0xC94D, 0x8491, 0xC94E, 0x8492, 0xC94F, 0x8493, 0xC950, 0x8494, + 0xC951, 0x8495, 0xC952, 0x8496, 0xC953, 0x8498, 0xC954, 0x849A, + 0xC955, 0x849B, 0xC956, 0x849D, 0xC957, 0x849E, 0xC958, 0x849F, + 0xC959, 0x84A0, 0xC95A, 0x84A2, 0xC95B, 0x84A3, 0xC95C, 0x84A4, + 0xC95D, 0x84A5, 0xC95E, 0x84A6, 0xC95F, 0x84A7, 0xC960, 0x84A8, + 0xC961, 0x84A9, 0xC962, 0x84AA, 0xC963, 0x84AB, 0xC964, 0x84AC, + 0xC965, 0x84AD, 0xC966, 0x84AE, 0xC967, 0x84B0, 0xC968, 0x84B1, + 0xC969, 0x84B3, 0xC96A, 0x84B5, 0xC96B, 0x84B6, 0xC96C, 0x84B7, + 0xC96D, 0x84BB, 0xC96E, 0x84BC, 0xC96F, 0x84BE, 0xC970, 0x84C0, + 0xC971, 0x84C2, 0xC972, 0x84C3, 0xC973, 0x84C5, 0xC974, 0x84C6, + 0xC975, 0x84C7, 0xC976, 0x84C8, 0xC977, 0x84CB, 0xC978, 0x84CC, + 0xC979, 0x84CE, 0xC97A, 0x84CF, 0xC97B, 0x84D2, 0xC97C, 0x84D4, + 0xC97D, 0x84D5, 0xC97E, 0x84D7, 0xC980, 0x84D8, 0xC981, 0x84D9, + 0xC982, 0x84DA, 0xC983, 0x84DB, 0xC984, 0x84DC, 0xC985, 0x84DE, + 0xC986, 0x84E1, 0xC987, 0x84E2, 0xC988, 0x84E4, 0xC989, 0x84E7, + 0xC98A, 0x84E8, 0xC98B, 0x84E9, 0xC98C, 0x84EA, 0xC98D, 0x84EB, + 0xC98E, 0x84ED, 0xC98F, 0x84EE, 0xC990, 0x84EF, 0xC991, 0x84F1, + 0xC992, 0x84F2, 0xC993, 0x84F3, 0xC994, 0x84F4, 0xC995, 0x84F5, + 0xC996, 0x84F6, 0xC997, 0x84F7, 0xC998, 0x84F8, 0xC999, 0x84F9, + 0xC99A, 0x84FA, 0xC99B, 0x84FB, 0xC99C, 0x84FD, 0xC99D, 0x84FE, + 0xC99E, 0x8500, 0xC99F, 0x8501, 0xC9A0, 0x8502, 0xC9A1, 0x4F1E, + 0xC9A2, 0x6563, 0xC9A3, 0x6851, 0xC9A4, 0x55D3, 0xC9A5, 0x4E27, + 0xC9A6, 0x6414, 0xC9A7, 0x9A9A, 0xC9A8, 0x626B, 0xC9A9, 0x5AC2, + 0xC9AA, 0x745F, 0xC9AB, 0x8272, 0xC9AC, 0x6DA9, 0xC9AD, 0x68EE, + 0xC9AE, 0x50E7, 0xC9AF, 0x838E, 0xC9B0, 0x7802, 0xC9B1, 0x6740, + 0xC9B2, 0x5239, 0xC9B3, 0x6C99, 0xC9B4, 0x7EB1, 0xC9B5, 0x50BB, + 0xC9B6, 0x5565, 0xC9B7, 0x715E, 0xC9B8, 0x7B5B, 0xC9B9, 0x6652, + 0xC9BA, 0x73CA, 0xC9BB, 0x82EB, 0xC9BC, 0x6749, 0xC9BD, 0x5C71, + 0xC9BE, 0x5220, 0xC9BF, 0x717D, 0xC9C0, 0x886B, 0xC9C1, 0x95EA, + 0xC9C2, 0x9655, 0xC9C3, 0x64C5, 0xC9C4, 0x8D61, 0xC9C5, 0x81B3, + 0xC9C6, 0x5584, 0xC9C7, 0x6C55, 0xC9C8, 0x6247, 0xC9C9, 0x7F2E, + 0xC9CA, 0x5892, 0xC9CB, 0x4F24, 0xC9CC, 0x5546, 0xC9CD, 0x8D4F, + 0xC9CE, 0x664C, 0xC9CF, 0x4E0A, 0xC9D0, 0x5C1A, 0xC9D1, 0x88F3, + 0xC9D2, 0x68A2, 0xC9D3, 0x634E, 0xC9D4, 0x7A0D, 0xC9D5, 0x70E7, + 0xC9D6, 0x828D, 0xC9D7, 0x52FA, 0xC9D8, 0x97F6, 0xC9D9, 0x5C11, + 0xC9DA, 0x54E8, 0xC9DB, 0x90B5, 0xC9DC, 0x7ECD, 0xC9DD, 0x5962, + 0xC9DE, 0x8D4A, 0xC9DF, 0x86C7, 0xC9E0, 0x820C, 0xC9E1, 0x820D, + 0xC9E2, 0x8D66, 0xC9E3, 0x6444, 0xC9E4, 0x5C04, 0xC9E5, 0x6151, + 0xC9E6, 0x6D89, 0xC9E7, 0x793E, 0xC9E8, 0x8BBE, 0xC9E9, 0x7837, + 0xC9EA, 0x7533, 0xC9EB, 0x547B, 0xC9EC, 0x4F38, 0xC9ED, 0x8EAB, + 0xC9EE, 0x6DF1, 0xC9EF, 0x5A20, 0xC9F0, 0x7EC5, 0xC9F1, 0x795E, + 0xC9F2, 0x6C88, 0xC9F3, 0x5BA1, 0xC9F4, 0x5A76, 0xC9F5, 0x751A, + 0xC9F6, 0x80BE, 0xC9F7, 0x614E, 0xC9F8, 0x6E17, 0xC9F9, 0x58F0, + 0xC9FA, 0x751F, 0xC9FB, 0x7525, 0xC9FC, 0x7272, 0xC9FD, 0x5347, + 0xC9FE, 0x7EF3, 0xCA40, 0x8503, 0xCA41, 0x8504, 0xCA42, 0x8505, + 0xCA43, 0x8506, 0xCA44, 0x8507, 0xCA45, 0x8508, 0xCA46, 0x8509, + 0xCA47, 0x850A, 0xCA48, 0x850B, 0xCA49, 0x850D, 0xCA4A, 0x850E, + 0xCA4B, 0x850F, 0xCA4C, 0x8510, 0xCA4D, 0x8512, 0xCA4E, 0x8514, + 0xCA4F, 0x8515, 0xCA50, 0x8516, 0xCA51, 0x8518, 0xCA52, 0x8519, + 0xCA53, 0x851B, 0xCA54, 0x851C, 0xCA55, 0x851D, 0xCA56, 0x851E, + 0xCA57, 0x8520, 0xCA58, 0x8522, 0xCA59, 0x8523, 0xCA5A, 0x8524, + 0xCA5B, 0x8525, 0xCA5C, 0x8526, 0xCA5D, 0x8527, 0xCA5E, 0x8528, + 0xCA5F, 0x8529, 0xCA60, 0x852A, 0xCA61, 0x852D, 0xCA62, 0x852E, + 0xCA63, 0x852F, 0xCA64, 0x8530, 0xCA65, 0x8531, 0xCA66, 0x8532, + 0xCA67, 0x8533, 0xCA68, 0x8534, 0xCA69, 0x8535, 0xCA6A, 0x8536, + 0xCA6B, 0x853E, 0xCA6C, 0x853F, 0xCA6D, 0x8540, 0xCA6E, 0x8541, + 0xCA6F, 0x8542, 0xCA70, 0x8544, 0xCA71, 0x8545, 0xCA72, 0x8546, + 0xCA73, 0x8547, 0xCA74, 0x854B, 0xCA75, 0x854C, 0xCA76, 0x854D, + 0xCA77, 0x854E, 0xCA78, 0x854F, 0xCA79, 0x8550, 0xCA7A, 0x8551, + 0xCA7B, 0x8552, 0xCA7C, 0x8553, 0xCA7D, 0x8554, 0xCA7E, 0x8555, + 0xCA80, 0x8557, 0xCA81, 0x8558, 0xCA82, 0x855A, 0xCA83, 0x855B, + 0xCA84, 0x855C, 0xCA85, 0x855D, 0xCA86, 0x855F, 0xCA87, 0x8560, + 0xCA88, 0x8561, 0xCA89, 0x8562, 0xCA8A, 0x8563, 0xCA8B, 0x8565, + 0xCA8C, 0x8566, 0xCA8D, 0x8567, 0xCA8E, 0x8569, 0xCA8F, 0x856A, + 0xCA90, 0x856B, 0xCA91, 0x856C, 0xCA92, 0x856D, 0xCA93, 0x856E, + 0xCA94, 0x856F, 0xCA95, 0x8570, 0xCA96, 0x8571, 0xCA97, 0x8573, + 0xCA98, 0x8575, 0xCA99, 0x8576, 0xCA9A, 0x8577, 0xCA9B, 0x8578, + 0xCA9C, 0x857C, 0xCA9D, 0x857D, 0xCA9E, 0x857F, 0xCA9F, 0x8580, + 0xCAA0, 0x8581, 0xCAA1, 0x7701, 0xCAA2, 0x76DB, 0xCAA3, 0x5269, + 0xCAA4, 0x80DC, 0xCAA5, 0x5723, 0xCAA6, 0x5E08, 0xCAA7, 0x5931, + 0xCAA8, 0x72EE, 0xCAA9, 0x65BD, 0xCAAA, 0x6E7F, 0xCAAB, 0x8BD7, + 0xCAAC, 0x5C38, 0xCAAD, 0x8671, 0xCAAE, 0x5341, 0xCAAF, 0x77F3, + 0xCAB0, 0x62FE, 0xCAB1, 0x65F6, 0xCAB2, 0x4EC0, 0xCAB3, 0x98DF, + 0xCAB4, 0x8680, 0xCAB5, 0x5B9E, 0xCAB6, 0x8BC6, 0xCAB7, 0x53F2, + 0xCAB8, 0x77E2, 0xCAB9, 0x4F7F, 0xCABA, 0x5C4E, 0xCABB, 0x9A76, + 0xCABC, 0x59CB, 0xCABD, 0x5F0F, 0xCABE, 0x793A, 0xCABF, 0x58EB, + 0xCAC0, 0x4E16, 0xCAC1, 0x67FF, 0xCAC2, 0x4E8B, 0xCAC3, 0x62ED, + 0xCAC4, 0x8A93, 0xCAC5, 0x901D, 0xCAC6, 0x52BF, 0xCAC7, 0x662F, + 0xCAC8, 0x55DC, 0xCAC9, 0x566C, 0xCACA, 0x9002, 0xCACB, 0x4ED5, + 0xCACC, 0x4F8D, 0xCACD, 0x91CA, 0xCACE, 0x9970, 0xCACF, 0x6C0F, + 0xCAD0, 0x5E02, 0xCAD1, 0x6043, 0xCAD2, 0x5BA4, 0xCAD3, 0x89C6, + 0xCAD4, 0x8BD5, 0xCAD5, 0x6536, 0xCAD6, 0x624B, 0xCAD7, 0x9996, + 0xCAD8, 0x5B88, 0xCAD9, 0x5BFF, 0xCADA, 0x6388, 0xCADB, 0x552E, + 0xCADC, 0x53D7, 0xCADD, 0x7626, 0xCADE, 0x517D, 0xCADF, 0x852C, + 0xCAE0, 0x67A2, 0xCAE1, 0x68B3, 0xCAE2, 0x6B8A, 0xCAE3, 0x6292, + 0xCAE4, 0x8F93, 0xCAE5, 0x53D4, 0xCAE6, 0x8212, 0xCAE7, 0x6DD1, + 0xCAE8, 0x758F, 0xCAE9, 0x4E66, 0xCAEA, 0x8D4E, 0xCAEB, 0x5B70, + 0xCAEC, 0x719F, 0xCAED, 0x85AF, 0xCAEE, 0x6691, 0xCAEF, 0x66D9, + 0xCAF0, 0x7F72, 0xCAF1, 0x8700, 0xCAF2, 0x9ECD, 0xCAF3, 0x9F20, + 0xCAF4, 0x5C5E, 0xCAF5, 0x672F, 0xCAF6, 0x8FF0, 0xCAF7, 0x6811, + 0xCAF8, 0x675F, 0xCAF9, 0x620D, 0xCAFA, 0x7AD6, 0xCAFB, 0x5885, + 0xCAFC, 0x5EB6, 0xCAFD, 0x6570, 0xCAFE, 0x6F31, 0xCB40, 0x8582, + 0xCB41, 0x8583, 0xCB42, 0x8586, 0xCB43, 0x8588, 0xCB44, 0x8589, + 0xCB45, 0x858A, 0xCB46, 0x858B, 0xCB47, 0x858C, 0xCB48, 0x858D, + 0xCB49, 0x858E, 0xCB4A, 0x8590, 0xCB4B, 0x8591, 0xCB4C, 0x8592, + 0xCB4D, 0x8593, 0xCB4E, 0x8594, 0xCB4F, 0x8595, 0xCB50, 0x8596, + 0xCB51, 0x8597, 0xCB52, 0x8598, 0xCB53, 0x8599, 0xCB54, 0x859A, + 0xCB55, 0x859D, 0xCB56, 0x859E, 0xCB57, 0x859F, 0xCB58, 0x85A0, + 0xCB59, 0x85A1, 0xCB5A, 0x85A2, 0xCB5B, 0x85A3, 0xCB5C, 0x85A5, + 0xCB5D, 0x85A6, 0xCB5E, 0x85A7, 0xCB5F, 0x85A9, 0xCB60, 0x85AB, + 0xCB61, 0x85AC, 0xCB62, 0x85AD, 0xCB63, 0x85B1, 0xCB64, 0x85B2, + 0xCB65, 0x85B3, 0xCB66, 0x85B4, 0xCB67, 0x85B5, 0xCB68, 0x85B6, + 0xCB69, 0x85B8, 0xCB6A, 0x85BA, 0xCB6B, 0x85BB, 0xCB6C, 0x85BC, + 0xCB6D, 0x85BD, 0xCB6E, 0x85BE, 0xCB6F, 0x85BF, 0xCB70, 0x85C0, + 0xCB71, 0x85C2, 0xCB72, 0x85C3, 0xCB73, 0x85C4, 0xCB74, 0x85C5, + 0xCB75, 0x85C6, 0xCB76, 0x85C7, 0xCB77, 0x85C8, 0xCB78, 0x85CA, + 0xCB79, 0x85CB, 0xCB7A, 0x85CC, 0xCB7B, 0x85CD, 0xCB7C, 0x85CE, + 0xCB7D, 0x85D1, 0xCB7E, 0x85D2, 0xCB80, 0x85D4, 0xCB81, 0x85D6, + 0xCB82, 0x85D7, 0xCB83, 0x85D8, 0xCB84, 0x85D9, 0xCB85, 0x85DA, + 0xCB86, 0x85DB, 0xCB87, 0x85DD, 0xCB88, 0x85DE, 0xCB89, 0x85DF, + 0xCB8A, 0x85E0, 0xCB8B, 0x85E1, 0xCB8C, 0x85E2, 0xCB8D, 0x85E3, + 0xCB8E, 0x85E5, 0xCB8F, 0x85E6, 0xCB90, 0x85E7, 0xCB91, 0x85E8, + 0xCB92, 0x85EA, 0xCB93, 0x85EB, 0xCB94, 0x85EC, 0xCB95, 0x85ED, + 0xCB96, 0x85EE, 0xCB97, 0x85EF, 0xCB98, 0x85F0, 0xCB99, 0x85F1, + 0xCB9A, 0x85F2, 0xCB9B, 0x85F3, 0xCB9C, 0x85F4, 0xCB9D, 0x85F5, + 0xCB9E, 0x85F6, 0xCB9F, 0x85F7, 0xCBA0, 0x85F8, 0xCBA1, 0x6055, + 0xCBA2, 0x5237, 0xCBA3, 0x800D, 0xCBA4, 0x6454, 0xCBA5, 0x8870, + 0xCBA6, 0x7529, 0xCBA7, 0x5E05, 0xCBA8, 0x6813, 0xCBA9, 0x62F4, + 0xCBAA, 0x971C, 0xCBAB, 0x53CC, 0xCBAC, 0x723D, 0xCBAD, 0x8C01, + 0xCBAE, 0x6C34, 0xCBAF, 0x7761, 0xCBB0, 0x7A0E, 0xCBB1, 0x542E, + 0xCBB2, 0x77AC, 0xCBB3, 0x987A, 0xCBB4, 0x821C, 0xCBB5, 0x8BF4, + 0xCBB6, 0x7855, 0xCBB7, 0x6714, 0xCBB8, 0x70C1, 0xCBB9, 0x65AF, + 0xCBBA, 0x6495, 0xCBBB, 0x5636, 0xCBBC, 0x601D, 0xCBBD, 0x79C1, + 0xCBBE, 0x53F8, 0xCBBF, 0x4E1D, 0xCBC0, 0x6B7B, 0xCBC1, 0x8086, + 0xCBC2, 0x5BFA, 0xCBC3, 0x55E3, 0xCBC4, 0x56DB, 0xCBC5, 0x4F3A, + 0xCBC6, 0x4F3C, 0xCBC7, 0x9972, 0xCBC8, 0x5DF3, 0xCBC9, 0x677E, + 0xCBCA, 0x8038, 0xCBCB, 0x6002, 0xCBCC, 0x9882, 0xCBCD, 0x9001, + 0xCBCE, 0x5B8B, 0xCBCF, 0x8BBC, 0xCBD0, 0x8BF5, 0xCBD1, 0x641C, + 0xCBD2, 0x8258, 0xCBD3, 0x64DE, 0xCBD4, 0x55FD, 0xCBD5, 0x82CF, + 0xCBD6, 0x9165, 0xCBD7, 0x4FD7, 0xCBD8, 0x7D20, 0xCBD9, 0x901F, + 0xCBDA, 0x7C9F, 0xCBDB, 0x50F3, 0xCBDC, 0x5851, 0xCBDD, 0x6EAF, + 0xCBDE, 0x5BBF, 0xCBDF, 0x8BC9, 0xCBE0, 0x8083, 0xCBE1, 0x9178, + 0xCBE2, 0x849C, 0xCBE3, 0x7B97, 0xCBE4, 0x867D, 0xCBE5, 0x968B, + 0xCBE6, 0x968F, 0xCBE7, 0x7EE5, 0xCBE8, 0x9AD3, 0xCBE9, 0x788E, + 0xCBEA, 0x5C81, 0xCBEB, 0x7A57, 0xCBEC, 0x9042, 0xCBED, 0x96A7, + 0xCBEE, 0x795F, 0xCBEF, 0x5B59, 0xCBF0, 0x635F, 0xCBF1, 0x7B0B, + 0xCBF2, 0x84D1, 0xCBF3, 0x68AD, 0xCBF4, 0x5506, 0xCBF5, 0x7F29, + 0xCBF6, 0x7410, 0xCBF7, 0x7D22, 0xCBF8, 0x9501, 0xCBF9, 0x6240, + 0xCBFA, 0x584C, 0xCBFB, 0x4ED6, 0xCBFC, 0x5B83, 0xCBFD, 0x5979, + 0xCBFE, 0x5854, 0xCC40, 0x85F9, 0xCC41, 0x85FA, 0xCC42, 0x85FC, + 0xCC43, 0x85FD, 0xCC44, 0x85FE, 0xCC45, 0x8600, 0xCC46, 0x8601, + 0xCC47, 0x8602, 0xCC48, 0x8603, 0xCC49, 0x8604, 0xCC4A, 0x8606, + 0xCC4B, 0x8607, 0xCC4C, 0x8608, 0xCC4D, 0x8609, 0xCC4E, 0x860A, + 0xCC4F, 0x860B, 0xCC50, 0x860C, 0xCC51, 0x860D, 0xCC52, 0x860E, + 0xCC53, 0x860F, 0xCC54, 0x8610, 0xCC55, 0x8612, 0xCC56, 0x8613, + 0xCC57, 0x8614, 0xCC58, 0x8615, 0xCC59, 0x8617, 0xCC5A, 0x8618, + 0xCC5B, 0x8619, 0xCC5C, 0x861A, 0xCC5D, 0x861B, 0xCC5E, 0x861C, + 0xCC5F, 0x861D, 0xCC60, 0x861E, 0xCC61, 0x861F, 0xCC62, 0x8620, + 0xCC63, 0x8621, 0xCC64, 0x8622, 0xCC65, 0x8623, 0xCC66, 0x8624, + 0xCC67, 0x8625, 0xCC68, 0x8626, 0xCC69, 0x8628, 0xCC6A, 0x862A, + 0xCC6B, 0x862B, 0xCC6C, 0x862C, 0xCC6D, 0x862D, 0xCC6E, 0x862E, + 0xCC6F, 0x862F, 0xCC70, 0x8630, 0xCC71, 0x8631, 0xCC72, 0x8632, + 0xCC73, 0x8633, 0xCC74, 0x8634, 0xCC75, 0x8635, 0xCC76, 0x8636, + 0xCC77, 0x8637, 0xCC78, 0x8639, 0xCC79, 0x863A, 0xCC7A, 0x863B, + 0xCC7B, 0x863D, 0xCC7C, 0x863E, 0xCC7D, 0x863F, 0xCC7E, 0x8640, + 0xCC80, 0x8641, 0xCC81, 0x8642, 0xCC82, 0x8643, 0xCC83, 0x8644, + 0xCC84, 0x8645, 0xCC85, 0x8646, 0xCC86, 0x8647, 0xCC87, 0x8648, + 0xCC88, 0x8649, 0xCC89, 0x864A, 0xCC8A, 0x864B, 0xCC8B, 0x864C, + 0xCC8C, 0x8652, 0xCC8D, 0x8653, 0xCC8E, 0x8655, 0xCC8F, 0x8656, + 0xCC90, 0x8657, 0xCC91, 0x8658, 0xCC92, 0x8659, 0xCC93, 0x865B, + 0xCC94, 0x865C, 0xCC95, 0x865D, 0xCC96, 0x865F, 0xCC97, 0x8660, + 0xCC98, 0x8661, 0xCC99, 0x8663, 0xCC9A, 0x8664, 0xCC9B, 0x8665, + 0xCC9C, 0x8666, 0xCC9D, 0x8667, 0xCC9E, 0x8668, 0xCC9F, 0x8669, + 0xCCA0, 0x866A, 0xCCA1, 0x736D, 0xCCA2, 0x631E, 0xCCA3, 0x8E4B, + 0xCCA4, 0x8E0F, 0xCCA5, 0x80CE, 0xCCA6, 0x82D4, 0xCCA7, 0x62AC, + 0xCCA8, 0x53F0, 0xCCA9, 0x6CF0, 0xCCAA, 0x915E, 0xCCAB, 0x592A, + 0xCCAC, 0x6001, 0xCCAD, 0x6C70, 0xCCAE, 0x574D, 0xCCAF, 0x644A, + 0xCCB0, 0x8D2A, 0xCCB1, 0x762B, 0xCCB2, 0x6EE9, 0xCCB3, 0x575B, + 0xCCB4, 0x6A80, 0xCCB5, 0x75F0, 0xCCB6, 0x6F6D, 0xCCB7, 0x8C2D, + 0xCCB8, 0x8C08, 0xCCB9, 0x5766, 0xCCBA, 0x6BEF, 0xCCBB, 0x8892, + 0xCCBC, 0x78B3, 0xCCBD, 0x63A2, 0xCCBE, 0x53F9, 0xCCBF, 0x70AD, + 0xCCC0, 0x6C64, 0xCCC1, 0x5858, 0xCCC2, 0x642A, 0xCCC3, 0x5802, + 0xCCC4, 0x68E0, 0xCCC5, 0x819B, 0xCCC6, 0x5510, 0xCCC7, 0x7CD6, + 0xCCC8, 0x5018, 0xCCC9, 0x8EBA, 0xCCCA, 0x6DCC, 0xCCCB, 0x8D9F, + 0xCCCC, 0x70EB, 0xCCCD, 0x638F, 0xCCCE, 0x6D9B, 0xCCCF, 0x6ED4, + 0xCCD0, 0x7EE6, 0xCCD1, 0x8404, 0xCCD2, 0x6843, 0xCCD3, 0x9003, + 0xCCD4, 0x6DD8, 0xCCD5, 0x9676, 0xCCD6, 0x8BA8, 0xCCD7, 0x5957, + 0xCCD8, 0x7279, 0xCCD9, 0x85E4, 0xCCDA, 0x817E, 0xCCDB, 0x75BC, + 0xCCDC, 0x8A8A, 0xCCDD, 0x68AF, 0xCCDE, 0x5254, 0xCCDF, 0x8E22, + 0xCCE0, 0x9511, 0xCCE1, 0x63D0, 0xCCE2, 0x9898, 0xCCE3, 0x8E44, + 0xCCE4, 0x557C, 0xCCE5, 0x4F53, 0xCCE6, 0x66FF, 0xCCE7, 0x568F, + 0xCCE8, 0x60D5, 0xCCE9, 0x6D95, 0xCCEA, 0x5243, 0xCCEB, 0x5C49, + 0xCCEC, 0x5929, 0xCCED, 0x6DFB, 0xCCEE, 0x586B, 0xCCEF, 0x7530, + 0xCCF0, 0x751C, 0xCCF1, 0x606C, 0xCCF2, 0x8214, 0xCCF3, 0x8146, + 0xCCF4, 0x6311, 0xCCF5, 0x6761, 0xCCF6, 0x8FE2, 0xCCF7, 0x773A, + 0xCCF8, 0x8DF3, 0xCCF9, 0x8D34, 0xCCFA, 0x94C1, 0xCCFB, 0x5E16, + 0xCCFC, 0x5385, 0xCCFD, 0x542C, 0xCCFE, 0x70C3, 0xCD40, 0x866D, + 0xCD41, 0x866F, 0xCD42, 0x8670, 0xCD43, 0x8672, 0xCD44, 0x8673, + 0xCD45, 0x8674, 0xCD46, 0x8675, 0xCD47, 0x8676, 0xCD48, 0x8677, + 0xCD49, 0x8678, 0xCD4A, 0x8683, 0xCD4B, 0x8684, 0xCD4C, 0x8685, + 0xCD4D, 0x8686, 0xCD4E, 0x8687, 0xCD4F, 0x8688, 0xCD50, 0x8689, + 0xCD51, 0x868E, 0xCD52, 0x868F, 0xCD53, 0x8690, 0xCD54, 0x8691, + 0xCD55, 0x8692, 0xCD56, 0x8694, 0xCD57, 0x8696, 0xCD58, 0x8697, + 0xCD59, 0x8698, 0xCD5A, 0x8699, 0xCD5B, 0x869A, 0xCD5C, 0x869B, + 0xCD5D, 0x869E, 0xCD5E, 0x869F, 0xCD5F, 0x86A0, 0xCD60, 0x86A1, + 0xCD61, 0x86A2, 0xCD62, 0x86A5, 0xCD63, 0x86A6, 0xCD64, 0x86AB, + 0xCD65, 0x86AD, 0xCD66, 0x86AE, 0xCD67, 0x86B2, 0xCD68, 0x86B3, + 0xCD69, 0x86B7, 0xCD6A, 0x86B8, 0xCD6B, 0x86B9, 0xCD6C, 0x86BB, + 0xCD6D, 0x86BC, 0xCD6E, 0x86BD, 0xCD6F, 0x86BE, 0xCD70, 0x86BF, + 0xCD71, 0x86C1, 0xCD72, 0x86C2, 0xCD73, 0x86C3, 0xCD74, 0x86C5, + 0xCD75, 0x86C8, 0xCD76, 0x86CC, 0xCD77, 0x86CD, 0xCD78, 0x86D2, + 0xCD79, 0x86D3, 0xCD7A, 0x86D5, 0xCD7B, 0x86D6, 0xCD7C, 0x86D7, + 0xCD7D, 0x86DA, 0xCD7E, 0x86DC, 0xCD80, 0x86DD, 0xCD81, 0x86E0, + 0xCD82, 0x86E1, 0xCD83, 0x86E2, 0xCD84, 0x86E3, 0xCD85, 0x86E5, + 0xCD86, 0x86E6, 0xCD87, 0x86E7, 0xCD88, 0x86E8, 0xCD89, 0x86EA, + 0xCD8A, 0x86EB, 0xCD8B, 0x86EC, 0xCD8C, 0x86EF, 0xCD8D, 0x86F5, + 0xCD8E, 0x86F6, 0xCD8F, 0x86F7, 0xCD90, 0x86FA, 0xCD91, 0x86FB, + 0xCD92, 0x86FC, 0xCD93, 0x86FD, 0xCD94, 0x86FF, 0xCD95, 0x8701, + 0xCD96, 0x8704, 0xCD97, 0x8705, 0xCD98, 0x8706, 0xCD99, 0x870B, + 0xCD9A, 0x870C, 0xCD9B, 0x870E, 0xCD9C, 0x870F, 0xCD9D, 0x8710, + 0xCD9E, 0x8711, 0xCD9F, 0x8714, 0xCDA0, 0x8716, 0xCDA1, 0x6C40, + 0xCDA2, 0x5EF7, 0xCDA3, 0x505C, 0xCDA4, 0x4EAD, 0xCDA5, 0x5EAD, + 0xCDA6, 0x633A, 0xCDA7, 0x8247, 0xCDA8, 0x901A, 0xCDA9, 0x6850, + 0xCDAA, 0x916E, 0xCDAB, 0x77B3, 0xCDAC, 0x540C, 0xCDAD, 0x94DC, + 0xCDAE, 0x5F64, 0xCDAF, 0x7AE5, 0xCDB0, 0x6876, 0xCDB1, 0x6345, + 0xCDB2, 0x7B52, 0xCDB3, 0x7EDF, 0xCDB4, 0x75DB, 0xCDB5, 0x5077, + 0xCDB6, 0x6295, 0xCDB7, 0x5934, 0xCDB8, 0x900F, 0xCDB9, 0x51F8, + 0xCDBA, 0x79C3, 0xCDBB, 0x7A81, 0xCDBC, 0x56FE, 0xCDBD, 0x5F92, + 0xCDBE, 0x9014, 0xCDBF, 0x6D82, 0xCDC0, 0x5C60, 0xCDC1, 0x571F, + 0xCDC2, 0x5410, 0xCDC3, 0x5154, 0xCDC4, 0x6E4D, 0xCDC5, 0x56E2, + 0xCDC6, 0x63A8, 0xCDC7, 0x9893, 0xCDC8, 0x817F, 0xCDC9, 0x8715, + 0xCDCA, 0x892A, 0xCDCB, 0x9000, 0xCDCC, 0x541E, 0xCDCD, 0x5C6F, + 0xCDCE, 0x81C0, 0xCDCF, 0x62D6, 0xCDD0, 0x6258, 0xCDD1, 0x8131, + 0xCDD2, 0x9E35, 0xCDD3, 0x9640, 0xCDD4, 0x9A6E, 0xCDD5, 0x9A7C, + 0xCDD6, 0x692D, 0xCDD7, 0x59A5, 0xCDD8, 0x62D3, 0xCDD9, 0x553E, + 0xCDDA, 0x6316, 0xCDDB, 0x54C7, 0xCDDC, 0x86D9, 0xCDDD, 0x6D3C, + 0xCDDE, 0x5A03, 0xCDDF, 0x74E6, 0xCDE0, 0x889C, 0xCDE1, 0x6B6A, + 0xCDE2, 0x5916, 0xCDE3, 0x8C4C, 0xCDE4, 0x5F2F, 0xCDE5, 0x6E7E, + 0xCDE6, 0x73A9, 0xCDE7, 0x987D, 0xCDE8, 0x4E38, 0xCDE9, 0x70F7, + 0xCDEA, 0x5B8C, 0xCDEB, 0x7897, 0xCDEC, 0x633D, 0xCDED, 0x665A, + 0xCDEE, 0x7696, 0xCDEF, 0x60CB, 0xCDF0, 0x5B9B, 0xCDF1, 0x5A49, + 0xCDF2, 0x4E07, 0xCDF3, 0x8155, 0xCDF4, 0x6C6A, 0xCDF5, 0x738B, + 0xCDF6, 0x4EA1, 0xCDF7, 0x6789, 0xCDF8, 0x7F51, 0xCDF9, 0x5F80, + 0xCDFA, 0x65FA, 0xCDFB, 0x671B, 0xCDFC, 0x5FD8, 0xCDFD, 0x5984, + 0xCDFE, 0x5A01, 0xCE40, 0x8719, 0xCE41, 0x871B, 0xCE42, 0x871D, + 0xCE43, 0x871F, 0xCE44, 0x8720, 0xCE45, 0x8724, 0xCE46, 0x8726, + 0xCE47, 0x8727, 0xCE48, 0x8728, 0xCE49, 0x872A, 0xCE4A, 0x872B, + 0xCE4B, 0x872C, 0xCE4C, 0x872D, 0xCE4D, 0x872F, 0xCE4E, 0x8730, + 0xCE4F, 0x8732, 0xCE50, 0x8733, 0xCE51, 0x8735, 0xCE52, 0x8736, + 0xCE53, 0x8738, 0xCE54, 0x8739, 0xCE55, 0x873A, 0xCE56, 0x873C, + 0xCE57, 0x873D, 0xCE58, 0x8740, 0xCE59, 0x8741, 0xCE5A, 0x8742, + 0xCE5B, 0x8743, 0xCE5C, 0x8744, 0xCE5D, 0x8745, 0xCE5E, 0x8746, + 0xCE5F, 0x874A, 0xCE60, 0x874B, 0xCE61, 0x874D, 0xCE62, 0x874F, + 0xCE63, 0x8750, 0xCE64, 0x8751, 0xCE65, 0x8752, 0xCE66, 0x8754, + 0xCE67, 0x8755, 0xCE68, 0x8756, 0xCE69, 0x8758, 0xCE6A, 0x875A, + 0xCE6B, 0x875B, 0xCE6C, 0x875C, 0xCE6D, 0x875D, 0xCE6E, 0x875E, + 0xCE6F, 0x875F, 0xCE70, 0x8761, 0xCE71, 0x8762, 0xCE72, 0x8766, + 0xCE73, 0x8767, 0xCE74, 0x8768, 0xCE75, 0x8769, 0xCE76, 0x876A, + 0xCE77, 0x876B, 0xCE78, 0x876C, 0xCE79, 0x876D, 0xCE7A, 0x876F, + 0xCE7B, 0x8771, 0xCE7C, 0x8772, 0xCE7D, 0x8773, 0xCE7E, 0x8775, + 0xCE80, 0x8777, 0xCE81, 0x8778, 0xCE82, 0x8779, 0xCE83, 0x877A, + 0xCE84, 0x877F, 0xCE85, 0x8780, 0xCE86, 0x8781, 0xCE87, 0x8784, + 0xCE88, 0x8786, 0xCE89, 0x8787, 0xCE8A, 0x8789, 0xCE8B, 0x878A, + 0xCE8C, 0x878C, 0xCE8D, 0x878E, 0xCE8E, 0x878F, 0xCE8F, 0x8790, + 0xCE90, 0x8791, 0xCE91, 0x8792, 0xCE92, 0x8794, 0xCE93, 0x8795, + 0xCE94, 0x8796, 0xCE95, 0x8798, 0xCE96, 0x8799, 0xCE97, 0x879A, + 0xCE98, 0x879B, 0xCE99, 0x879C, 0xCE9A, 0x879D, 0xCE9B, 0x879E, + 0xCE9C, 0x87A0, 0xCE9D, 0x87A1, 0xCE9E, 0x87A2, 0xCE9F, 0x87A3, + 0xCEA0, 0x87A4, 0xCEA1, 0x5DCD, 0xCEA2, 0x5FAE, 0xCEA3, 0x5371, + 0xCEA4, 0x97E6, 0xCEA5, 0x8FDD, 0xCEA6, 0x6845, 0xCEA7, 0x56F4, + 0xCEA8, 0x552F, 0xCEA9, 0x60DF, 0xCEAA, 0x4E3A, 0xCEAB, 0x6F4D, + 0xCEAC, 0x7EF4, 0xCEAD, 0x82C7, 0xCEAE, 0x840E, 0xCEAF, 0x59D4, + 0xCEB0, 0x4F1F, 0xCEB1, 0x4F2A, 0xCEB2, 0x5C3E, 0xCEB3, 0x7EAC, + 0xCEB4, 0x672A, 0xCEB5, 0x851A, 0xCEB6, 0x5473, 0xCEB7, 0x754F, + 0xCEB8, 0x80C3, 0xCEB9, 0x5582, 0xCEBA, 0x9B4F, 0xCEBB, 0x4F4D, + 0xCEBC, 0x6E2D, 0xCEBD, 0x8C13, 0xCEBE, 0x5C09, 0xCEBF, 0x6170, + 0xCEC0, 0x536B, 0xCEC1, 0x761F, 0xCEC2, 0x6E29, 0xCEC3, 0x868A, + 0xCEC4, 0x6587, 0xCEC5, 0x95FB, 0xCEC6, 0x7EB9, 0xCEC7, 0x543B, + 0xCEC8, 0x7A33, 0xCEC9, 0x7D0A, 0xCECA, 0x95EE, 0xCECB, 0x55E1, + 0xCECC, 0x7FC1, 0xCECD, 0x74EE, 0xCECE, 0x631D, 0xCECF, 0x8717, + 0xCED0, 0x6DA1, 0xCED1, 0x7A9D, 0xCED2, 0x6211, 0xCED3, 0x65A1, + 0xCED4, 0x5367, 0xCED5, 0x63E1, 0xCED6, 0x6C83, 0xCED7, 0x5DEB, + 0xCED8, 0x545C, 0xCED9, 0x94A8, 0xCEDA, 0x4E4C, 0xCEDB, 0x6C61, + 0xCEDC, 0x8BEC, 0xCEDD, 0x5C4B, 0xCEDE, 0x65E0, 0xCEDF, 0x829C, + 0xCEE0, 0x68A7, 0xCEE1, 0x543E, 0xCEE2, 0x5434, 0xCEE3, 0x6BCB, + 0xCEE4, 0x6B66, 0xCEE5, 0x4E94, 0xCEE6, 0x6342, 0xCEE7, 0x5348, + 0xCEE8, 0x821E, 0xCEE9, 0x4F0D, 0xCEEA, 0x4FAE, 0xCEEB, 0x575E, + 0xCEEC, 0x620A, 0xCEED, 0x96FE, 0xCEEE, 0x6664, 0xCEEF, 0x7269, + 0xCEF0, 0x52FF, 0xCEF1, 0x52A1, 0xCEF2, 0x609F, 0xCEF3, 0x8BEF, + 0xCEF4, 0x6614, 0xCEF5, 0x7199, 0xCEF6, 0x6790, 0xCEF7, 0x897F, + 0xCEF8, 0x7852, 0xCEF9, 0x77FD, 0xCEFA, 0x6670, 0xCEFB, 0x563B, + 0xCEFC, 0x5438, 0xCEFD, 0x9521, 0xCEFE, 0x727A, 0xCF40, 0x87A5, + 0xCF41, 0x87A6, 0xCF42, 0x87A7, 0xCF43, 0x87A9, 0xCF44, 0x87AA, + 0xCF45, 0x87AE, 0xCF46, 0x87B0, 0xCF47, 0x87B1, 0xCF48, 0x87B2, + 0xCF49, 0x87B4, 0xCF4A, 0x87B6, 0xCF4B, 0x87B7, 0xCF4C, 0x87B8, + 0xCF4D, 0x87B9, 0xCF4E, 0x87BB, 0xCF4F, 0x87BC, 0xCF50, 0x87BE, + 0xCF51, 0x87BF, 0xCF52, 0x87C1, 0xCF53, 0x87C2, 0xCF54, 0x87C3, + 0xCF55, 0x87C4, 0xCF56, 0x87C5, 0xCF57, 0x87C7, 0xCF58, 0x87C8, + 0xCF59, 0x87C9, 0xCF5A, 0x87CC, 0xCF5B, 0x87CD, 0xCF5C, 0x87CE, + 0xCF5D, 0x87CF, 0xCF5E, 0x87D0, 0xCF5F, 0x87D4, 0xCF60, 0x87D5, + 0xCF61, 0x87D6, 0xCF62, 0x87D7, 0xCF63, 0x87D8, 0xCF64, 0x87D9, + 0xCF65, 0x87DA, 0xCF66, 0x87DC, 0xCF67, 0x87DD, 0xCF68, 0x87DE, + 0xCF69, 0x87DF, 0xCF6A, 0x87E1, 0xCF6B, 0x87E2, 0xCF6C, 0x87E3, + 0xCF6D, 0x87E4, 0xCF6E, 0x87E6, 0xCF6F, 0x87E7, 0xCF70, 0x87E8, + 0xCF71, 0x87E9, 0xCF72, 0x87EB, 0xCF73, 0x87EC, 0xCF74, 0x87ED, + 0xCF75, 0x87EF, 0xCF76, 0x87F0, 0xCF77, 0x87F1, 0xCF78, 0x87F2, + 0xCF79, 0x87F3, 0xCF7A, 0x87F4, 0xCF7B, 0x87F5, 0xCF7C, 0x87F6, + 0xCF7D, 0x87F7, 0xCF7E, 0x87F8, 0xCF80, 0x87FA, 0xCF81, 0x87FB, + 0xCF82, 0x87FC, 0xCF83, 0x87FD, 0xCF84, 0x87FF, 0xCF85, 0x8800, + 0xCF86, 0x8801, 0xCF87, 0x8802, 0xCF88, 0x8804, 0xCF89, 0x8805, + 0xCF8A, 0x8806, 0xCF8B, 0x8807, 0xCF8C, 0x8808, 0xCF8D, 0x8809, + 0xCF8E, 0x880B, 0xCF8F, 0x880C, 0xCF90, 0x880D, 0xCF91, 0x880E, + 0xCF92, 0x880F, 0xCF93, 0x8810, 0xCF94, 0x8811, 0xCF95, 0x8812, + 0xCF96, 0x8814, 0xCF97, 0x8817, 0xCF98, 0x8818, 0xCF99, 0x8819, + 0xCF9A, 0x881A, 0xCF9B, 0x881C, 0xCF9C, 0x881D, 0xCF9D, 0x881E, + 0xCF9E, 0x881F, 0xCF9F, 0x8820, 0xCFA0, 0x8823, 0xCFA1, 0x7A00, + 0xCFA2, 0x606F, 0xCFA3, 0x5E0C, 0xCFA4, 0x6089, 0xCFA5, 0x819D, + 0xCFA6, 0x5915, 0xCFA7, 0x60DC, 0xCFA8, 0x7184, 0xCFA9, 0x70EF, + 0xCFAA, 0x6EAA, 0xCFAB, 0x6C50, 0xCFAC, 0x7280, 0xCFAD, 0x6A84, + 0xCFAE, 0x88AD, 0xCFAF, 0x5E2D, 0xCFB0, 0x4E60, 0xCFB1, 0x5AB3, + 0xCFB2, 0x559C, 0xCFB3, 0x94E3, 0xCFB4, 0x6D17, 0xCFB5, 0x7CFB, + 0xCFB6, 0x9699, 0xCFB7, 0x620F, 0xCFB8, 0x7EC6, 0xCFB9, 0x778E, + 0xCFBA, 0x867E, 0xCFBB, 0x5323, 0xCFBC, 0x971E, 0xCFBD, 0x8F96, + 0xCFBE, 0x6687, 0xCFBF, 0x5CE1, 0xCFC0, 0x4FA0, 0xCFC1, 0x72ED, + 0xCFC2, 0x4E0B, 0xCFC3, 0x53A6, 0xCFC4, 0x590F, 0xCFC5, 0x5413, + 0xCFC6, 0x6380, 0xCFC7, 0x9528, 0xCFC8, 0x5148, 0xCFC9, 0x4ED9, + 0xCFCA, 0x9C9C, 0xCFCB, 0x7EA4, 0xCFCC, 0x54B8, 0xCFCD, 0x8D24, + 0xCFCE, 0x8854, 0xCFCF, 0x8237, 0xCFD0, 0x95F2, 0xCFD1, 0x6D8E, + 0xCFD2, 0x5F26, 0xCFD3, 0x5ACC, 0xCFD4, 0x663E, 0xCFD5, 0x9669, + 0xCFD6, 0x73B0, 0xCFD7, 0x732E, 0xCFD8, 0x53BF, 0xCFD9, 0x817A, + 0xCFDA, 0x9985, 0xCFDB, 0x7FA1, 0xCFDC, 0x5BAA, 0xCFDD, 0x9677, + 0xCFDE, 0x9650, 0xCFDF, 0x7EBF, 0xCFE0, 0x76F8, 0xCFE1, 0x53A2, + 0xCFE2, 0x9576, 0xCFE3, 0x9999, 0xCFE4, 0x7BB1, 0xCFE5, 0x8944, + 0xCFE6, 0x6E58, 0xCFE7, 0x4E61, 0xCFE8, 0x7FD4, 0xCFE9, 0x7965, + 0xCFEA, 0x8BE6, 0xCFEB, 0x60F3, 0xCFEC, 0x54CD, 0xCFED, 0x4EAB, + 0xCFEE, 0x9879, 0xCFEF, 0x5DF7, 0xCFF0, 0x6A61, 0xCFF1, 0x50CF, + 0xCFF2, 0x5411, 0xCFF3, 0x8C61, 0xCFF4, 0x8427, 0xCFF5, 0x785D, + 0xCFF6, 0x9704, 0xCFF7, 0x524A, 0xCFF8, 0x54EE, 0xCFF9, 0x56A3, + 0xCFFA, 0x9500, 0xCFFB, 0x6D88, 0xCFFC, 0x5BB5, 0xCFFD, 0x6DC6, + 0xCFFE, 0x6653, 0xD040, 0x8824, 0xD041, 0x8825, 0xD042, 0x8826, + 0xD043, 0x8827, 0xD044, 0x8828, 0xD045, 0x8829, 0xD046, 0x882A, + 0xD047, 0x882B, 0xD048, 0x882C, 0xD049, 0x882D, 0xD04A, 0x882E, + 0xD04B, 0x882F, 0xD04C, 0x8830, 0xD04D, 0x8831, 0xD04E, 0x8833, + 0xD04F, 0x8834, 0xD050, 0x8835, 0xD051, 0x8836, 0xD052, 0x8837, + 0xD053, 0x8838, 0xD054, 0x883A, 0xD055, 0x883B, 0xD056, 0x883D, + 0xD057, 0x883E, 0xD058, 0x883F, 0xD059, 0x8841, 0xD05A, 0x8842, + 0xD05B, 0x8843, 0xD05C, 0x8846, 0xD05D, 0x8847, 0xD05E, 0x8848, + 0xD05F, 0x8849, 0xD060, 0x884A, 0xD061, 0x884B, 0xD062, 0x884E, + 0xD063, 0x884F, 0xD064, 0x8850, 0xD065, 0x8851, 0xD066, 0x8852, + 0xD067, 0x8853, 0xD068, 0x8855, 0xD069, 0x8856, 0xD06A, 0x8858, + 0xD06B, 0x885A, 0xD06C, 0x885B, 0xD06D, 0x885C, 0xD06E, 0x885D, + 0xD06F, 0x885E, 0xD070, 0x885F, 0xD071, 0x8860, 0xD072, 0x8866, + 0xD073, 0x8867, 0xD074, 0x886A, 0xD075, 0x886D, 0xD076, 0x886F, + 0xD077, 0x8871, 0xD078, 0x8873, 0xD079, 0x8874, 0xD07A, 0x8875, + 0xD07B, 0x8876, 0xD07C, 0x8878, 0xD07D, 0x8879, 0xD07E, 0x887A, + 0xD080, 0x887B, 0xD081, 0x887C, 0xD082, 0x8880, 0xD083, 0x8883, + 0xD084, 0x8886, 0xD085, 0x8887, 0xD086, 0x8889, 0xD087, 0x888A, + 0xD088, 0x888C, 0xD089, 0x888E, 0xD08A, 0x888F, 0xD08B, 0x8890, + 0xD08C, 0x8891, 0xD08D, 0x8893, 0xD08E, 0x8894, 0xD08F, 0x8895, + 0xD090, 0x8897, 0xD091, 0x8898, 0xD092, 0x8899, 0xD093, 0x889A, + 0xD094, 0x889B, 0xD095, 0x889D, 0xD096, 0x889E, 0xD097, 0x889F, + 0xD098, 0x88A0, 0xD099, 0x88A1, 0xD09A, 0x88A3, 0xD09B, 0x88A5, + 0xD09C, 0x88A6, 0xD09D, 0x88A7, 0xD09E, 0x88A8, 0xD09F, 0x88A9, + 0xD0A0, 0x88AA, 0xD0A1, 0x5C0F, 0xD0A2, 0x5B5D, 0xD0A3, 0x6821, + 0xD0A4, 0x8096, 0xD0A5, 0x5578, 0xD0A6, 0x7B11, 0xD0A7, 0x6548, + 0xD0A8, 0x6954, 0xD0A9, 0x4E9B, 0xD0AA, 0x6B47, 0xD0AB, 0x874E, + 0xD0AC, 0x978B, 0xD0AD, 0x534F, 0xD0AE, 0x631F, 0xD0AF, 0x643A, + 0xD0B0, 0x90AA, 0xD0B1, 0x659C, 0xD0B2, 0x80C1, 0xD0B3, 0x8C10, + 0xD0B4, 0x5199, 0xD0B5, 0x68B0, 0xD0B6, 0x5378, 0xD0B7, 0x87F9, + 0xD0B8, 0x61C8, 0xD0B9, 0x6CC4, 0xD0BA, 0x6CFB, 0xD0BB, 0x8C22, + 0xD0BC, 0x5C51, 0xD0BD, 0x85AA, 0xD0BE, 0x82AF, 0xD0BF, 0x950C, + 0xD0C0, 0x6B23, 0xD0C1, 0x8F9B, 0xD0C2, 0x65B0, 0xD0C3, 0x5FFB, + 0xD0C4, 0x5FC3, 0xD0C5, 0x4FE1, 0xD0C6, 0x8845, 0xD0C7, 0x661F, + 0xD0C8, 0x8165, 0xD0C9, 0x7329, 0xD0CA, 0x60FA, 0xD0CB, 0x5174, + 0xD0CC, 0x5211, 0xD0CD, 0x578B, 0xD0CE, 0x5F62, 0xD0CF, 0x90A2, + 0xD0D0, 0x884C, 0xD0D1, 0x9192, 0xD0D2, 0x5E78, 0xD0D3, 0x674F, + 0xD0D4, 0x6027, 0xD0D5, 0x59D3, 0xD0D6, 0x5144, 0xD0D7, 0x51F6, + 0xD0D8, 0x80F8, 0xD0D9, 0x5308, 0xD0DA, 0x6C79, 0xD0DB, 0x96C4, + 0xD0DC, 0x718A, 0xD0DD, 0x4F11, 0xD0DE, 0x4FEE, 0xD0DF, 0x7F9E, + 0xD0E0, 0x673D, 0xD0E1, 0x55C5, 0xD0E2, 0x9508, 0xD0E3, 0x79C0, + 0xD0E4, 0x8896, 0xD0E5, 0x7EE3, 0xD0E6, 0x589F, 0xD0E7, 0x620C, + 0xD0E8, 0x9700, 0xD0E9, 0x865A, 0xD0EA, 0x5618, 0xD0EB, 0x987B, + 0xD0EC, 0x5F90, 0xD0ED, 0x8BB8, 0xD0EE, 0x84C4, 0xD0EF, 0x9157, + 0xD0F0, 0x53D9, 0xD0F1, 0x65ED, 0xD0F2, 0x5E8F, 0xD0F3, 0x755C, + 0xD0F4, 0x6064, 0xD0F5, 0x7D6E, 0xD0F6, 0x5A7F, 0xD0F7, 0x7EEA, + 0xD0F8, 0x7EED, 0xD0F9, 0x8F69, 0xD0FA, 0x55A7, 0xD0FB, 0x5BA3, + 0xD0FC, 0x60AC, 0xD0FD, 0x65CB, 0xD0FE, 0x7384, 0xD140, 0x88AC, + 0xD141, 0x88AE, 0xD142, 0x88AF, 0xD143, 0x88B0, 0xD144, 0x88B2, + 0xD145, 0x88B3, 0xD146, 0x88B4, 0xD147, 0x88B5, 0xD148, 0x88B6, + 0xD149, 0x88B8, 0xD14A, 0x88B9, 0xD14B, 0x88BA, 0xD14C, 0x88BB, + 0xD14D, 0x88BD, 0xD14E, 0x88BE, 0xD14F, 0x88BF, 0xD150, 0x88C0, + 0xD151, 0x88C3, 0xD152, 0x88C4, 0xD153, 0x88C7, 0xD154, 0x88C8, + 0xD155, 0x88CA, 0xD156, 0x88CB, 0xD157, 0x88CC, 0xD158, 0x88CD, + 0xD159, 0x88CF, 0xD15A, 0x88D0, 0xD15B, 0x88D1, 0xD15C, 0x88D3, + 0xD15D, 0x88D6, 0xD15E, 0x88D7, 0xD15F, 0x88DA, 0xD160, 0x88DB, + 0xD161, 0x88DC, 0xD162, 0x88DD, 0xD163, 0x88DE, 0xD164, 0x88E0, + 0xD165, 0x88E1, 0xD166, 0x88E6, 0xD167, 0x88E7, 0xD168, 0x88E9, + 0xD169, 0x88EA, 0xD16A, 0x88EB, 0xD16B, 0x88EC, 0xD16C, 0x88ED, + 0xD16D, 0x88EE, 0xD16E, 0x88EF, 0xD16F, 0x88F2, 0xD170, 0x88F5, + 0xD171, 0x88F6, 0xD172, 0x88F7, 0xD173, 0x88FA, 0xD174, 0x88FB, + 0xD175, 0x88FD, 0xD176, 0x88FF, 0xD177, 0x8900, 0xD178, 0x8901, + 0xD179, 0x8903, 0xD17A, 0x8904, 0xD17B, 0x8905, 0xD17C, 0x8906, + 0xD17D, 0x8907, 0xD17E, 0x8908, 0xD180, 0x8909, 0xD181, 0x890B, + 0xD182, 0x890C, 0xD183, 0x890D, 0xD184, 0x890E, 0xD185, 0x890F, + 0xD186, 0x8911, 0xD187, 0x8914, 0xD188, 0x8915, 0xD189, 0x8916, + 0xD18A, 0x8917, 0xD18B, 0x8918, 0xD18C, 0x891C, 0xD18D, 0x891D, + 0xD18E, 0x891E, 0xD18F, 0x891F, 0xD190, 0x8920, 0xD191, 0x8922, + 0xD192, 0x8923, 0xD193, 0x8924, 0xD194, 0x8926, 0xD195, 0x8927, + 0xD196, 0x8928, 0xD197, 0x8929, 0xD198, 0x892C, 0xD199, 0x892D, + 0xD19A, 0x892E, 0xD19B, 0x892F, 0xD19C, 0x8931, 0xD19D, 0x8932, + 0xD19E, 0x8933, 0xD19F, 0x8935, 0xD1A0, 0x8937, 0xD1A1, 0x9009, + 0xD1A2, 0x7663, 0xD1A3, 0x7729, 0xD1A4, 0x7EDA, 0xD1A5, 0x9774, + 0xD1A6, 0x859B, 0xD1A7, 0x5B66, 0xD1A8, 0x7A74, 0xD1A9, 0x96EA, + 0xD1AA, 0x8840, 0xD1AB, 0x52CB, 0xD1AC, 0x718F, 0xD1AD, 0x5FAA, + 0xD1AE, 0x65EC, 0xD1AF, 0x8BE2, 0xD1B0, 0x5BFB, 0xD1B1, 0x9A6F, + 0xD1B2, 0x5DE1, 0xD1B3, 0x6B89, 0xD1B4, 0x6C5B, 0xD1B5, 0x8BAD, + 0xD1B6, 0x8BAF, 0xD1B7, 0x900A, 0xD1B8, 0x8FC5, 0xD1B9, 0x538B, + 0xD1BA, 0x62BC, 0xD1BB, 0x9E26, 0xD1BC, 0x9E2D, 0xD1BD, 0x5440, + 0xD1BE, 0x4E2B, 0xD1BF, 0x82BD, 0xD1C0, 0x7259, 0xD1C1, 0x869C, + 0xD1C2, 0x5D16, 0xD1C3, 0x8859, 0xD1C4, 0x6DAF, 0xD1C5, 0x96C5, + 0xD1C6, 0x54D1, 0xD1C7, 0x4E9A, 0xD1C8, 0x8BB6, 0xD1C9, 0x7109, + 0xD1CA, 0x54BD, 0xD1CB, 0x9609, 0xD1CC, 0x70DF, 0xD1CD, 0x6DF9, + 0xD1CE, 0x76D0, 0xD1CF, 0x4E25, 0xD1D0, 0x7814, 0xD1D1, 0x8712, + 0xD1D2, 0x5CA9, 0xD1D3, 0x5EF6, 0xD1D4, 0x8A00, 0xD1D5, 0x989C, + 0xD1D6, 0x960E, 0xD1D7, 0x708E, 0xD1D8, 0x6CBF, 0xD1D9, 0x5944, + 0xD1DA, 0x63A9, 0xD1DB, 0x773C, 0xD1DC, 0x884D, 0xD1DD, 0x6F14, + 0xD1DE, 0x8273, 0xD1DF, 0x5830, 0xD1E0, 0x71D5, 0xD1E1, 0x538C, + 0xD1E2, 0x781A, 0xD1E3, 0x96C1, 0xD1E4, 0x5501, 0xD1E5, 0x5F66, + 0xD1E6, 0x7130, 0xD1E7, 0x5BB4, 0xD1E8, 0x8C1A, 0xD1E9, 0x9A8C, + 0xD1EA, 0x6B83, 0xD1EB, 0x592E, 0xD1EC, 0x9E2F, 0xD1ED, 0x79E7, + 0xD1EE, 0x6768, 0xD1EF, 0x626C, 0xD1F0, 0x4F6F, 0xD1F1, 0x75A1, + 0xD1F2, 0x7F8A, 0xD1F3, 0x6D0B, 0xD1F4, 0x9633, 0xD1F5, 0x6C27, + 0xD1F6, 0x4EF0, 0xD1F7, 0x75D2, 0xD1F8, 0x517B, 0xD1F9, 0x6837, + 0xD1FA, 0x6F3E, 0xD1FB, 0x9080, 0xD1FC, 0x8170, 0xD1FD, 0x5996, + 0xD1FE, 0x7476, 0xD240, 0x8938, 0xD241, 0x8939, 0xD242, 0x893A, + 0xD243, 0x893B, 0xD244, 0x893C, 0xD245, 0x893D, 0xD246, 0x893E, + 0xD247, 0x893F, 0xD248, 0x8940, 0xD249, 0x8942, 0xD24A, 0x8943, + 0xD24B, 0x8945, 0xD24C, 0x8946, 0xD24D, 0x8947, 0xD24E, 0x8948, + 0xD24F, 0x8949, 0xD250, 0x894A, 0xD251, 0x894B, 0xD252, 0x894C, + 0xD253, 0x894D, 0xD254, 0x894E, 0xD255, 0x894F, 0xD256, 0x8950, + 0xD257, 0x8951, 0xD258, 0x8952, 0xD259, 0x8953, 0xD25A, 0x8954, + 0xD25B, 0x8955, 0xD25C, 0x8956, 0xD25D, 0x8957, 0xD25E, 0x8958, + 0xD25F, 0x8959, 0xD260, 0x895A, 0xD261, 0x895B, 0xD262, 0x895C, + 0xD263, 0x895D, 0xD264, 0x8960, 0xD265, 0x8961, 0xD266, 0x8962, + 0xD267, 0x8963, 0xD268, 0x8964, 0xD269, 0x8965, 0xD26A, 0x8967, + 0xD26B, 0x8968, 0xD26C, 0x8969, 0xD26D, 0x896A, 0xD26E, 0x896B, + 0xD26F, 0x896C, 0xD270, 0x896D, 0xD271, 0x896E, 0xD272, 0x896F, + 0xD273, 0x8970, 0xD274, 0x8971, 0xD275, 0x8972, 0xD276, 0x8973, + 0xD277, 0x8974, 0xD278, 0x8975, 0xD279, 0x8976, 0xD27A, 0x8977, + 0xD27B, 0x8978, 0xD27C, 0x8979, 0xD27D, 0x897A, 0xD27E, 0x897C, + 0xD280, 0x897D, 0xD281, 0x897E, 0xD282, 0x8980, 0xD283, 0x8982, + 0xD284, 0x8984, 0xD285, 0x8985, 0xD286, 0x8987, 0xD287, 0x8988, + 0xD288, 0x8989, 0xD289, 0x898A, 0xD28A, 0x898B, 0xD28B, 0x898C, + 0xD28C, 0x898D, 0xD28D, 0x898E, 0xD28E, 0x898F, 0xD28F, 0x8990, + 0xD290, 0x8991, 0xD291, 0x8992, 0xD292, 0x8993, 0xD293, 0x8994, + 0xD294, 0x8995, 0xD295, 0x8996, 0xD296, 0x8997, 0xD297, 0x8998, + 0xD298, 0x8999, 0xD299, 0x899A, 0xD29A, 0x899B, 0xD29B, 0x899C, + 0xD29C, 0x899D, 0xD29D, 0x899E, 0xD29E, 0x899F, 0xD29F, 0x89A0, + 0xD2A0, 0x89A1, 0xD2A1, 0x6447, 0xD2A2, 0x5C27, 0xD2A3, 0x9065, + 0xD2A4, 0x7A91, 0xD2A5, 0x8C23, 0xD2A6, 0x59DA, 0xD2A7, 0x54AC, + 0xD2A8, 0x8200, 0xD2A9, 0x836F, 0xD2AA, 0x8981, 0xD2AB, 0x8000, + 0xD2AC, 0x6930, 0xD2AD, 0x564E, 0xD2AE, 0x8036, 0xD2AF, 0x7237, + 0xD2B0, 0x91CE, 0xD2B1, 0x51B6, 0xD2B2, 0x4E5F, 0xD2B3, 0x9875, + 0xD2B4, 0x6396, 0xD2B5, 0x4E1A, 0xD2B6, 0x53F6, 0xD2B7, 0x66F3, + 0xD2B8, 0x814B, 0xD2B9, 0x591C, 0xD2BA, 0x6DB2, 0xD2BB, 0x4E00, + 0xD2BC, 0x58F9, 0xD2BD, 0x533B, 0xD2BE, 0x63D6, 0xD2BF, 0x94F1, + 0xD2C0, 0x4F9D, 0xD2C1, 0x4F0A, 0xD2C2, 0x8863, 0xD2C3, 0x9890, + 0xD2C4, 0x5937, 0xD2C5, 0x9057, 0xD2C6, 0x79FB, 0xD2C7, 0x4EEA, + 0xD2C8, 0x80F0, 0xD2C9, 0x7591, 0xD2CA, 0x6C82, 0xD2CB, 0x5B9C, + 0xD2CC, 0x59E8, 0xD2CD, 0x5F5D, 0xD2CE, 0x6905, 0xD2CF, 0x8681, + 0xD2D0, 0x501A, 0xD2D1, 0x5DF2, 0xD2D2, 0x4E59, 0xD2D3, 0x77E3, + 0xD2D4, 0x4EE5, 0xD2D5, 0x827A, 0xD2D6, 0x6291, 0xD2D7, 0x6613, + 0xD2D8, 0x9091, 0xD2D9, 0x5C79, 0xD2DA, 0x4EBF, 0xD2DB, 0x5F79, + 0xD2DC, 0x81C6, 0xD2DD, 0x9038, 0xD2DE, 0x8084, 0xD2DF, 0x75AB, + 0xD2E0, 0x4EA6, 0xD2E1, 0x88D4, 0xD2E2, 0x610F, 0xD2E3, 0x6BC5, + 0xD2E4, 0x5FC6, 0xD2E5, 0x4E49, 0xD2E6, 0x76CA, 0xD2E7, 0x6EA2, + 0xD2E8, 0x8BE3, 0xD2E9, 0x8BAE, 0xD2EA, 0x8C0A, 0xD2EB, 0x8BD1, + 0xD2EC, 0x5F02, 0xD2ED, 0x7FFC, 0xD2EE, 0x7FCC, 0xD2EF, 0x7ECE, + 0xD2F0, 0x8335, 0xD2F1, 0x836B, 0xD2F2, 0x56E0, 0xD2F3, 0x6BB7, + 0xD2F4, 0x97F3, 0xD2F5, 0x9634, 0xD2F6, 0x59FB, 0xD2F7, 0x541F, + 0xD2F8, 0x94F6, 0xD2F9, 0x6DEB, 0xD2FA, 0x5BC5, 0xD2FB, 0x996E, + 0xD2FC, 0x5C39, 0xD2FD, 0x5F15, 0xD2FE, 0x9690, 0xD340, 0x89A2, + 0xD341, 0x89A3, 0xD342, 0x89A4, 0xD343, 0x89A5, 0xD344, 0x89A6, + 0xD345, 0x89A7, 0xD346, 0x89A8, 0xD347, 0x89A9, 0xD348, 0x89AA, + 0xD349, 0x89AB, 0xD34A, 0x89AC, 0xD34B, 0x89AD, 0xD34C, 0x89AE, + 0xD34D, 0x89AF, 0xD34E, 0x89B0, 0xD34F, 0x89B1, 0xD350, 0x89B2, + 0xD351, 0x89B3, 0xD352, 0x89B4, 0xD353, 0x89B5, 0xD354, 0x89B6, + 0xD355, 0x89B7, 0xD356, 0x89B8, 0xD357, 0x89B9, 0xD358, 0x89BA, + 0xD359, 0x89BB, 0xD35A, 0x89BC, 0xD35B, 0x89BD, 0xD35C, 0x89BE, + 0xD35D, 0x89BF, 0xD35E, 0x89C0, 0xD35F, 0x89C3, 0xD360, 0x89CD, + 0xD361, 0x89D3, 0xD362, 0x89D4, 0xD363, 0x89D5, 0xD364, 0x89D7, + 0xD365, 0x89D8, 0xD366, 0x89D9, 0xD367, 0x89DB, 0xD368, 0x89DD, + 0xD369, 0x89DF, 0xD36A, 0x89E0, 0xD36B, 0x89E1, 0xD36C, 0x89E2, + 0xD36D, 0x89E4, 0xD36E, 0x89E7, 0xD36F, 0x89E8, 0xD370, 0x89E9, + 0xD371, 0x89EA, 0xD372, 0x89EC, 0xD373, 0x89ED, 0xD374, 0x89EE, + 0xD375, 0x89F0, 0xD376, 0x89F1, 0xD377, 0x89F2, 0xD378, 0x89F4, + 0xD379, 0x89F5, 0xD37A, 0x89F6, 0xD37B, 0x89F7, 0xD37C, 0x89F8, + 0xD37D, 0x89F9, 0xD37E, 0x89FA, 0xD380, 0x89FB, 0xD381, 0x89FC, + 0xD382, 0x89FD, 0xD383, 0x89FE, 0xD384, 0x89FF, 0xD385, 0x8A01, + 0xD386, 0x8A02, 0xD387, 0x8A03, 0xD388, 0x8A04, 0xD389, 0x8A05, + 0xD38A, 0x8A06, 0xD38B, 0x8A08, 0xD38C, 0x8A09, 0xD38D, 0x8A0A, + 0xD38E, 0x8A0B, 0xD38F, 0x8A0C, 0xD390, 0x8A0D, 0xD391, 0x8A0E, + 0xD392, 0x8A0F, 0xD393, 0x8A10, 0xD394, 0x8A11, 0xD395, 0x8A12, + 0xD396, 0x8A13, 0xD397, 0x8A14, 0xD398, 0x8A15, 0xD399, 0x8A16, + 0xD39A, 0x8A17, 0xD39B, 0x8A18, 0xD39C, 0x8A19, 0xD39D, 0x8A1A, + 0xD39E, 0x8A1B, 0xD39F, 0x8A1C, 0xD3A0, 0x8A1D, 0xD3A1, 0x5370, + 0xD3A2, 0x82F1, 0xD3A3, 0x6A31, 0xD3A4, 0x5A74, 0xD3A5, 0x9E70, + 0xD3A6, 0x5E94, 0xD3A7, 0x7F28, 0xD3A8, 0x83B9, 0xD3A9, 0x8424, + 0xD3AA, 0x8425, 0xD3AB, 0x8367, 0xD3AC, 0x8747, 0xD3AD, 0x8FCE, + 0xD3AE, 0x8D62, 0xD3AF, 0x76C8, 0xD3B0, 0x5F71, 0xD3B1, 0x9896, + 0xD3B2, 0x786C, 0xD3B3, 0x6620, 0xD3B4, 0x54DF, 0xD3B5, 0x62E5, + 0xD3B6, 0x4F63, 0xD3B7, 0x81C3, 0xD3B8, 0x75C8, 0xD3B9, 0x5EB8, + 0xD3BA, 0x96CD, 0xD3BB, 0x8E0A, 0xD3BC, 0x86F9, 0xD3BD, 0x548F, + 0xD3BE, 0x6CF3, 0xD3BF, 0x6D8C, 0xD3C0, 0x6C38, 0xD3C1, 0x607F, + 0xD3C2, 0x52C7, 0xD3C3, 0x7528, 0xD3C4, 0x5E7D, 0xD3C5, 0x4F18, + 0xD3C6, 0x60A0, 0xD3C7, 0x5FE7, 0xD3C8, 0x5C24, 0xD3C9, 0x7531, + 0xD3CA, 0x90AE, 0xD3CB, 0x94C0, 0xD3CC, 0x72B9, 0xD3CD, 0x6CB9, + 0xD3CE, 0x6E38, 0xD3CF, 0x9149, 0xD3D0, 0x6709, 0xD3D1, 0x53CB, + 0xD3D2, 0x53F3, 0xD3D3, 0x4F51, 0xD3D4, 0x91C9, 0xD3D5, 0x8BF1, + 0xD3D6, 0x53C8, 0xD3D7, 0x5E7C, 0xD3D8, 0x8FC2, 0xD3D9, 0x6DE4, + 0xD3DA, 0x4E8E, 0xD3DB, 0x76C2, 0xD3DC, 0x6986, 0xD3DD, 0x865E, + 0xD3DE, 0x611A, 0xD3DF, 0x8206, 0xD3E0, 0x4F59, 0xD3E1, 0x4FDE, + 0xD3E2, 0x903E, 0xD3E3, 0x9C7C, 0xD3E4, 0x6109, 0xD3E5, 0x6E1D, + 0xD3E6, 0x6E14, 0xD3E7, 0x9685, 0xD3E8, 0x4E88, 0xD3E9, 0x5A31, + 0xD3EA, 0x96E8, 0xD3EB, 0x4E0E, 0xD3EC, 0x5C7F, 0xD3ED, 0x79B9, + 0xD3EE, 0x5B87, 0xD3EF, 0x8BED, 0xD3F0, 0x7FBD, 0xD3F1, 0x7389, + 0xD3F2, 0x57DF, 0xD3F3, 0x828B, 0xD3F4, 0x90C1, 0xD3F5, 0x5401, + 0xD3F6, 0x9047, 0xD3F7, 0x55BB, 0xD3F8, 0x5CEA, 0xD3F9, 0x5FA1, + 0xD3FA, 0x6108, 0xD3FB, 0x6B32, 0xD3FC, 0x72F1, 0xD3FD, 0x80B2, + 0xD3FE, 0x8A89, 0xD440, 0x8A1E, 0xD441, 0x8A1F, 0xD442, 0x8A20, + 0xD443, 0x8A21, 0xD444, 0x8A22, 0xD445, 0x8A23, 0xD446, 0x8A24, + 0xD447, 0x8A25, 0xD448, 0x8A26, 0xD449, 0x8A27, 0xD44A, 0x8A28, + 0xD44B, 0x8A29, 0xD44C, 0x8A2A, 0xD44D, 0x8A2B, 0xD44E, 0x8A2C, + 0xD44F, 0x8A2D, 0xD450, 0x8A2E, 0xD451, 0x8A2F, 0xD452, 0x8A30, + 0xD453, 0x8A31, 0xD454, 0x8A32, 0xD455, 0x8A33, 0xD456, 0x8A34, + 0xD457, 0x8A35, 0xD458, 0x8A36, 0xD459, 0x8A37, 0xD45A, 0x8A38, + 0xD45B, 0x8A39, 0xD45C, 0x8A3A, 0xD45D, 0x8A3B, 0xD45E, 0x8A3C, + 0xD45F, 0x8A3D, 0xD460, 0x8A3F, 0xD461, 0x8A40, 0xD462, 0x8A41, + 0xD463, 0x8A42, 0xD464, 0x8A43, 0xD465, 0x8A44, 0xD466, 0x8A45, + 0xD467, 0x8A46, 0xD468, 0x8A47, 0xD469, 0x8A49, 0xD46A, 0x8A4A, + 0xD46B, 0x8A4B, 0xD46C, 0x8A4C, 0xD46D, 0x8A4D, 0xD46E, 0x8A4E, + 0xD46F, 0x8A4F, 0xD470, 0x8A50, 0xD471, 0x8A51, 0xD472, 0x8A52, + 0xD473, 0x8A53, 0xD474, 0x8A54, 0xD475, 0x8A55, 0xD476, 0x8A56, + 0xD477, 0x8A57, 0xD478, 0x8A58, 0xD479, 0x8A59, 0xD47A, 0x8A5A, + 0xD47B, 0x8A5B, 0xD47C, 0x8A5C, 0xD47D, 0x8A5D, 0xD47E, 0x8A5E, + 0xD480, 0x8A5F, 0xD481, 0x8A60, 0xD482, 0x8A61, 0xD483, 0x8A62, + 0xD484, 0x8A63, 0xD485, 0x8A64, 0xD486, 0x8A65, 0xD487, 0x8A66, + 0xD488, 0x8A67, 0xD489, 0x8A68, 0xD48A, 0x8A69, 0xD48B, 0x8A6A, + 0xD48C, 0x8A6B, 0xD48D, 0x8A6C, 0xD48E, 0x8A6D, 0xD48F, 0x8A6E, + 0xD490, 0x8A6F, 0xD491, 0x8A70, 0xD492, 0x8A71, 0xD493, 0x8A72, + 0xD494, 0x8A73, 0xD495, 0x8A74, 0xD496, 0x8A75, 0xD497, 0x8A76, + 0xD498, 0x8A77, 0xD499, 0x8A78, 0xD49A, 0x8A7A, 0xD49B, 0x8A7B, + 0xD49C, 0x8A7C, 0xD49D, 0x8A7D, 0xD49E, 0x8A7E, 0xD49F, 0x8A7F, + 0xD4A0, 0x8A80, 0xD4A1, 0x6D74, 0xD4A2, 0x5BD3, 0xD4A3, 0x88D5, + 0xD4A4, 0x9884, 0xD4A5, 0x8C6B, 0xD4A6, 0x9A6D, 0xD4A7, 0x9E33, + 0xD4A8, 0x6E0A, 0xD4A9, 0x51A4, 0xD4AA, 0x5143, 0xD4AB, 0x57A3, + 0xD4AC, 0x8881, 0xD4AD, 0x539F, 0xD4AE, 0x63F4, 0xD4AF, 0x8F95, + 0xD4B0, 0x56ED, 0xD4B1, 0x5458, 0xD4B2, 0x5706, 0xD4B3, 0x733F, + 0xD4B4, 0x6E90, 0xD4B5, 0x7F18, 0xD4B6, 0x8FDC, 0xD4B7, 0x82D1, + 0xD4B8, 0x613F, 0xD4B9, 0x6028, 0xD4BA, 0x9662, 0xD4BB, 0x66F0, + 0xD4BC, 0x7EA6, 0xD4BD, 0x8D8A, 0xD4BE, 0x8DC3, 0xD4BF, 0x94A5, + 0xD4C0, 0x5CB3, 0xD4C1, 0x7CA4, 0xD4C2, 0x6708, 0xD4C3, 0x60A6, + 0xD4C4, 0x9605, 0xD4C5, 0x8018, 0xD4C6, 0x4E91, 0xD4C7, 0x90E7, + 0xD4C8, 0x5300, 0xD4C9, 0x9668, 0xD4CA, 0x5141, 0xD4CB, 0x8FD0, + 0xD4CC, 0x8574, 0xD4CD, 0x915D, 0xD4CE, 0x6655, 0xD4CF, 0x97F5, + 0xD4D0, 0x5B55, 0xD4D1, 0x531D, 0xD4D2, 0x7838, 0xD4D3, 0x6742, + 0xD4D4, 0x683D, 0xD4D5, 0x54C9, 0xD4D6, 0x707E, 0xD4D7, 0x5BB0, + 0xD4D8, 0x8F7D, 0xD4D9, 0x518D, 0xD4DA, 0x5728, 0xD4DB, 0x54B1, + 0xD4DC, 0x6512, 0xD4DD, 0x6682, 0xD4DE, 0x8D5E, 0xD4DF, 0x8D43, + 0xD4E0, 0x810F, 0xD4E1, 0x846C, 0xD4E2, 0x906D, 0xD4E3, 0x7CDF, + 0xD4E4, 0x51FF, 0xD4E5, 0x85FB, 0xD4E6, 0x67A3, 0xD4E7, 0x65E9, + 0xD4E8, 0x6FA1, 0xD4E9, 0x86A4, 0xD4EA, 0x8E81, 0xD4EB, 0x566A, + 0xD4EC, 0x9020, 0xD4ED, 0x7682, 0xD4EE, 0x7076, 0xD4EF, 0x71E5, + 0xD4F0, 0x8D23, 0xD4F1, 0x62E9, 0xD4F2, 0x5219, 0xD4F3, 0x6CFD, + 0xD4F4, 0x8D3C, 0xD4F5, 0x600E, 0xD4F6, 0x589E, 0xD4F7, 0x618E, + 0xD4F8, 0x66FE, 0xD4F9, 0x8D60, 0xD4FA, 0x624E, 0xD4FB, 0x55B3, + 0xD4FC, 0x6E23, 0xD4FD, 0x672D, 0xD4FE, 0x8F67, 0xD540, 0x8A81, + 0xD541, 0x8A82, 0xD542, 0x8A83, 0xD543, 0x8A84, 0xD544, 0x8A85, + 0xD545, 0x8A86, 0xD546, 0x8A87, 0xD547, 0x8A88, 0xD548, 0x8A8B, + 0xD549, 0x8A8C, 0xD54A, 0x8A8D, 0xD54B, 0x8A8E, 0xD54C, 0x8A8F, + 0xD54D, 0x8A90, 0xD54E, 0x8A91, 0xD54F, 0x8A92, 0xD550, 0x8A94, + 0xD551, 0x8A95, 0xD552, 0x8A96, 0xD553, 0x8A97, 0xD554, 0x8A98, + 0xD555, 0x8A99, 0xD556, 0x8A9A, 0xD557, 0x8A9B, 0xD558, 0x8A9C, + 0xD559, 0x8A9D, 0xD55A, 0x8A9E, 0xD55B, 0x8A9F, 0xD55C, 0x8AA0, + 0xD55D, 0x8AA1, 0xD55E, 0x8AA2, 0xD55F, 0x8AA3, 0xD560, 0x8AA4, + 0xD561, 0x8AA5, 0xD562, 0x8AA6, 0xD563, 0x8AA7, 0xD564, 0x8AA8, + 0xD565, 0x8AA9, 0xD566, 0x8AAA, 0xD567, 0x8AAB, 0xD568, 0x8AAC, + 0xD569, 0x8AAD, 0xD56A, 0x8AAE, 0xD56B, 0x8AAF, 0xD56C, 0x8AB0, + 0xD56D, 0x8AB1, 0xD56E, 0x8AB2, 0xD56F, 0x8AB3, 0xD570, 0x8AB4, + 0xD571, 0x8AB5, 0xD572, 0x8AB6, 0xD573, 0x8AB7, 0xD574, 0x8AB8, + 0xD575, 0x8AB9, 0xD576, 0x8ABA, 0xD577, 0x8ABB, 0xD578, 0x8ABC, + 0xD579, 0x8ABD, 0xD57A, 0x8ABE, 0xD57B, 0x8ABF, 0xD57C, 0x8AC0, + 0xD57D, 0x8AC1, 0xD57E, 0x8AC2, 0xD580, 0x8AC3, 0xD581, 0x8AC4, + 0xD582, 0x8AC5, 0xD583, 0x8AC6, 0xD584, 0x8AC7, 0xD585, 0x8AC8, + 0xD586, 0x8AC9, 0xD587, 0x8ACA, 0xD588, 0x8ACB, 0xD589, 0x8ACC, + 0xD58A, 0x8ACD, 0xD58B, 0x8ACE, 0xD58C, 0x8ACF, 0xD58D, 0x8AD0, + 0xD58E, 0x8AD1, 0xD58F, 0x8AD2, 0xD590, 0x8AD3, 0xD591, 0x8AD4, + 0xD592, 0x8AD5, 0xD593, 0x8AD6, 0xD594, 0x8AD7, 0xD595, 0x8AD8, + 0xD596, 0x8AD9, 0xD597, 0x8ADA, 0xD598, 0x8ADB, 0xD599, 0x8ADC, + 0xD59A, 0x8ADD, 0xD59B, 0x8ADE, 0xD59C, 0x8ADF, 0xD59D, 0x8AE0, + 0xD59E, 0x8AE1, 0xD59F, 0x8AE2, 0xD5A0, 0x8AE3, 0xD5A1, 0x94E1, + 0xD5A2, 0x95F8, 0xD5A3, 0x7728, 0xD5A4, 0x6805, 0xD5A5, 0x69A8, + 0xD5A6, 0x548B, 0xD5A7, 0x4E4D, 0xD5A8, 0x70B8, 0xD5A9, 0x8BC8, + 0xD5AA, 0x6458, 0xD5AB, 0x658B, 0xD5AC, 0x5B85, 0xD5AD, 0x7A84, + 0xD5AE, 0x503A, 0xD5AF, 0x5BE8, 0xD5B0, 0x77BB, 0xD5B1, 0x6BE1, + 0xD5B2, 0x8A79, 0xD5B3, 0x7C98, 0xD5B4, 0x6CBE, 0xD5B5, 0x76CF, + 0xD5B6, 0x65A9, 0xD5B7, 0x8F97, 0xD5B8, 0x5D2D, 0xD5B9, 0x5C55, + 0xD5BA, 0x8638, 0xD5BB, 0x6808, 0xD5BC, 0x5360, 0xD5BD, 0x6218, + 0xD5BE, 0x7AD9, 0xD5BF, 0x6E5B, 0xD5C0, 0x7EFD, 0xD5C1, 0x6A1F, + 0xD5C2, 0x7AE0, 0xD5C3, 0x5F70, 0xD5C4, 0x6F33, 0xD5C5, 0x5F20, + 0xD5C6, 0x638C, 0xD5C7, 0x6DA8, 0xD5C8, 0x6756, 0xD5C9, 0x4E08, + 0xD5CA, 0x5E10, 0xD5CB, 0x8D26, 0xD5CC, 0x4ED7, 0xD5CD, 0x80C0, + 0xD5CE, 0x7634, 0xD5CF, 0x969C, 0xD5D0, 0x62DB, 0xD5D1, 0x662D, + 0xD5D2, 0x627E, 0xD5D3, 0x6CBC, 0xD5D4, 0x8D75, 0xD5D5, 0x7167, + 0xD5D6, 0x7F69, 0xD5D7, 0x5146, 0xD5D8, 0x8087, 0xD5D9, 0x53EC, + 0xD5DA, 0x906E, 0xD5DB, 0x6298, 0xD5DC, 0x54F2, 0xD5DD, 0x86F0, + 0xD5DE, 0x8F99, 0xD5DF, 0x8005, 0xD5E0, 0x9517, 0xD5E1, 0x8517, + 0xD5E2, 0x8FD9, 0xD5E3, 0x6D59, 0xD5E4, 0x73CD, 0xD5E5, 0x659F, + 0xD5E6, 0x771F, 0xD5E7, 0x7504, 0xD5E8, 0x7827, 0xD5E9, 0x81FB, + 0xD5EA, 0x8D1E, 0xD5EB, 0x9488, 0xD5EC, 0x4FA6, 0xD5ED, 0x6795, + 0xD5EE, 0x75B9, 0xD5EF, 0x8BCA, 0xD5F0, 0x9707, 0xD5F1, 0x632F, + 0xD5F2, 0x9547, 0xD5F3, 0x9635, 0xD5F4, 0x84B8, 0xD5F5, 0x6323, + 0xD5F6, 0x7741, 0xD5F7, 0x5F81, 0xD5F8, 0x72F0, 0xD5F9, 0x4E89, + 0xD5FA, 0x6014, 0xD5FB, 0x6574, 0xD5FC, 0x62EF, 0xD5FD, 0x6B63, + 0xD5FE, 0x653F, 0xD640, 0x8AE4, 0xD641, 0x8AE5, 0xD642, 0x8AE6, + 0xD643, 0x8AE7, 0xD644, 0x8AE8, 0xD645, 0x8AE9, 0xD646, 0x8AEA, + 0xD647, 0x8AEB, 0xD648, 0x8AEC, 0xD649, 0x8AED, 0xD64A, 0x8AEE, + 0xD64B, 0x8AEF, 0xD64C, 0x8AF0, 0xD64D, 0x8AF1, 0xD64E, 0x8AF2, + 0xD64F, 0x8AF3, 0xD650, 0x8AF4, 0xD651, 0x8AF5, 0xD652, 0x8AF6, + 0xD653, 0x8AF7, 0xD654, 0x8AF8, 0xD655, 0x8AF9, 0xD656, 0x8AFA, + 0xD657, 0x8AFB, 0xD658, 0x8AFC, 0xD659, 0x8AFD, 0xD65A, 0x8AFE, + 0xD65B, 0x8AFF, 0xD65C, 0x8B00, 0xD65D, 0x8B01, 0xD65E, 0x8B02, + 0xD65F, 0x8B03, 0xD660, 0x8B04, 0xD661, 0x8B05, 0xD662, 0x8B06, + 0xD663, 0x8B08, 0xD664, 0x8B09, 0xD665, 0x8B0A, 0xD666, 0x8B0B, + 0xD667, 0x8B0C, 0xD668, 0x8B0D, 0xD669, 0x8B0E, 0xD66A, 0x8B0F, + 0xD66B, 0x8B10, 0xD66C, 0x8B11, 0xD66D, 0x8B12, 0xD66E, 0x8B13, + 0xD66F, 0x8B14, 0xD670, 0x8B15, 0xD671, 0x8B16, 0xD672, 0x8B17, + 0xD673, 0x8B18, 0xD674, 0x8B19, 0xD675, 0x8B1A, 0xD676, 0x8B1B, + 0xD677, 0x8B1C, 0xD678, 0x8B1D, 0xD679, 0x8B1E, 0xD67A, 0x8B1F, + 0xD67B, 0x8B20, 0xD67C, 0x8B21, 0xD67D, 0x8B22, 0xD67E, 0x8B23, + 0xD680, 0x8B24, 0xD681, 0x8B25, 0xD682, 0x8B27, 0xD683, 0x8B28, + 0xD684, 0x8B29, 0xD685, 0x8B2A, 0xD686, 0x8B2B, 0xD687, 0x8B2C, + 0xD688, 0x8B2D, 0xD689, 0x8B2E, 0xD68A, 0x8B2F, 0xD68B, 0x8B30, + 0xD68C, 0x8B31, 0xD68D, 0x8B32, 0xD68E, 0x8B33, 0xD68F, 0x8B34, + 0xD690, 0x8B35, 0xD691, 0x8B36, 0xD692, 0x8B37, 0xD693, 0x8B38, + 0xD694, 0x8B39, 0xD695, 0x8B3A, 0xD696, 0x8B3B, 0xD697, 0x8B3C, + 0xD698, 0x8B3D, 0xD699, 0x8B3E, 0xD69A, 0x8B3F, 0xD69B, 0x8B40, + 0xD69C, 0x8B41, 0xD69D, 0x8B42, 0xD69E, 0x8B43, 0xD69F, 0x8B44, + 0xD6A0, 0x8B45, 0xD6A1, 0x5E27, 0xD6A2, 0x75C7, 0xD6A3, 0x90D1, + 0xD6A4, 0x8BC1, 0xD6A5, 0x829D, 0xD6A6, 0x679D, 0xD6A7, 0x652F, + 0xD6A8, 0x5431, 0xD6A9, 0x8718, 0xD6AA, 0x77E5, 0xD6AB, 0x80A2, + 0xD6AC, 0x8102, 0xD6AD, 0x6C41, 0xD6AE, 0x4E4B, 0xD6AF, 0x7EC7, + 0xD6B0, 0x804C, 0xD6B1, 0x76F4, 0xD6B2, 0x690D, 0xD6B3, 0x6B96, + 0xD6B4, 0x6267, 0xD6B5, 0x503C, 0xD6B6, 0x4F84, 0xD6B7, 0x5740, + 0xD6B8, 0x6307, 0xD6B9, 0x6B62, 0xD6BA, 0x8DBE, 0xD6BB, 0x53EA, + 0xD6BC, 0x65E8, 0xD6BD, 0x7EB8, 0xD6BE, 0x5FD7, 0xD6BF, 0x631A, + 0xD6C0, 0x63B7, 0xD6C1, 0x81F3, 0xD6C2, 0x81F4, 0xD6C3, 0x7F6E, + 0xD6C4, 0x5E1C, 0xD6C5, 0x5CD9, 0xD6C6, 0x5236, 0xD6C7, 0x667A, + 0xD6C8, 0x79E9, 0xD6C9, 0x7A1A, 0xD6CA, 0x8D28, 0xD6CB, 0x7099, + 0xD6CC, 0x75D4, 0xD6CD, 0x6EDE, 0xD6CE, 0x6CBB, 0xD6CF, 0x7A92, + 0xD6D0, 0x4E2D, 0xD6D1, 0x76C5, 0xD6D2, 0x5FE0, 0xD6D3, 0x949F, + 0xD6D4, 0x8877, 0xD6D5, 0x7EC8, 0xD6D6, 0x79CD, 0xD6D7, 0x80BF, + 0xD6D8, 0x91CD, 0xD6D9, 0x4EF2, 0xD6DA, 0x4F17, 0xD6DB, 0x821F, + 0xD6DC, 0x5468, 0xD6DD, 0x5DDE, 0xD6DE, 0x6D32, 0xD6DF, 0x8BCC, + 0xD6E0, 0x7CA5, 0xD6E1, 0x8F74, 0xD6E2, 0x8098, 0xD6E3, 0x5E1A, + 0xD6E4, 0x5492, 0xD6E5, 0x76B1, 0xD6E6, 0x5B99, 0xD6E7, 0x663C, + 0xD6E8, 0x9AA4, 0xD6E9, 0x73E0, 0xD6EA, 0x682A, 0xD6EB, 0x86DB, + 0xD6EC, 0x6731, 0xD6ED, 0x732A, 0xD6EE, 0x8BF8, 0xD6EF, 0x8BDB, + 0xD6F0, 0x9010, 0xD6F1, 0x7AF9, 0xD6F2, 0x70DB, 0xD6F3, 0x716E, + 0xD6F4, 0x62C4, 0xD6F5, 0x77A9, 0xD6F6, 0x5631, 0xD6F7, 0x4E3B, + 0xD6F8, 0x8457, 0xD6F9, 0x67F1, 0xD6FA, 0x52A9, 0xD6FB, 0x86C0, + 0xD6FC, 0x8D2E, 0xD6FD, 0x94F8, 0xD6FE, 0x7B51, 0xD740, 0x8B46, + 0xD741, 0x8B47, 0xD742, 0x8B48, 0xD743, 0x8B49, 0xD744, 0x8B4A, + 0xD745, 0x8B4B, 0xD746, 0x8B4C, 0xD747, 0x8B4D, 0xD748, 0x8B4E, + 0xD749, 0x8B4F, 0xD74A, 0x8B50, 0xD74B, 0x8B51, 0xD74C, 0x8B52, + 0xD74D, 0x8B53, 0xD74E, 0x8B54, 0xD74F, 0x8B55, 0xD750, 0x8B56, + 0xD751, 0x8B57, 0xD752, 0x8B58, 0xD753, 0x8B59, 0xD754, 0x8B5A, + 0xD755, 0x8B5B, 0xD756, 0x8B5C, 0xD757, 0x8B5D, 0xD758, 0x8B5E, + 0xD759, 0x8B5F, 0xD75A, 0x8B60, 0xD75B, 0x8B61, 0xD75C, 0x8B62, + 0xD75D, 0x8B63, 0xD75E, 0x8B64, 0xD75F, 0x8B65, 0xD760, 0x8B67, + 0xD761, 0x8B68, 0xD762, 0x8B69, 0xD763, 0x8B6A, 0xD764, 0x8B6B, + 0xD765, 0x8B6D, 0xD766, 0x8B6E, 0xD767, 0x8B6F, 0xD768, 0x8B70, + 0xD769, 0x8B71, 0xD76A, 0x8B72, 0xD76B, 0x8B73, 0xD76C, 0x8B74, + 0xD76D, 0x8B75, 0xD76E, 0x8B76, 0xD76F, 0x8B77, 0xD770, 0x8B78, + 0xD771, 0x8B79, 0xD772, 0x8B7A, 0xD773, 0x8B7B, 0xD774, 0x8B7C, + 0xD775, 0x8B7D, 0xD776, 0x8B7E, 0xD777, 0x8B7F, 0xD778, 0x8B80, + 0xD779, 0x8B81, 0xD77A, 0x8B82, 0xD77B, 0x8B83, 0xD77C, 0x8B84, + 0xD77D, 0x8B85, 0xD77E, 0x8B86, 0xD780, 0x8B87, 0xD781, 0x8B88, + 0xD782, 0x8B89, 0xD783, 0x8B8A, 0xD784, 0x8B8B, 0xD785, 0x8B8C, + 0xD786, 0x8B8D, 0xD787, 0x8B8E, 0xD788, 0x8B8F, 0xD789, 0x8B90, + 0xD78A, 0x8B91, 0xD78B, 0x8B92, 0xD78C, 0x8B93, 0xD78D, 0x8B94, + 0xD78E, 0x8B95, 0xD78F, 0x8B96, 0xD790, 0x8B97, 0xD791, 0x8B98, + 0xD792, 0x8B99, 0xD793, 0x8B9A, 0xD794, 0x8B9B, 0xD795, 0x8B9C, + 0xD796, 0x8B9D, 0xD797, 0x8B9E, 0xD798, 0x8B9F, 0xD799, 0x8BAC, + 0xD79A, 0x8BB1, 0xD79B, 0x8BBB, 0xD79C, 0x8BC7, 0xD79D, 0x8BD0, + 0xD79E, 0x8BEA, 0xD79F, 0x8C09, 0xD7A0, 0x8C1E, 0xD7A1, 0x4F4F, + 0xD7A2, 0x6CE8, 0xD7A3, 0x795D, 0xD7A4, 0x9A7B, 0xD7A5, 0x6293, + 0xD7A6, 0x722A, 0xD7A7, 0x62FD, 0xD7A8, 0x4E13, 0xD7A9, 0x7816, + 0xD7AA, 0x8F6C, 0xD7AB, 0x64B0, 0xD7AC, 0x8D5A, 0xD7AD, 0x7BC6, + 0xD7AE, 0x6869, 0xD7AF, 0x5E84, 0xD7B0, 0x88C5, 0xD7B1, 0x5986, + 0xD7B2, 0x649E, 0xD7B3, 0x58EE, 0xD7B4, 0x72B6, 0xD7B5, 0x690E, + 0xD7B6, 0x9525, 0xD7B7, 0x8FFD, 0xD7B8, 0x8D58, 0xD7B9, 0x5760, + 0xD7BA, 0x7F00, 0xD7BB, 0x8C06, 0xD7BC, 0x51C6, 0xD7BD, 0x6349, + 0xD7BE, 0x62D9, 0xD7BF, 0x5353, 0xD7C0, 0x684C, 0xD7C1, 0x7422, + 0xD7C2, 0x8301, 0xD7C3, 0x914C, 0xD7C4, 0x5544, 0xD7C5, 0x7740, + 0xD7C6, 0x707C, 0xD7C7, 0x6D4A, 0xD7C8, 0x5179, 0xD7C9, 0x54A8, + 0xD7CA, 0x8D44, 0xD7CB, 0x59FF, 0xD7CC, 0x6ECB, 0xD7CD, 0x6DC4, + 0xD7CE, 0x5B5C, 0xD7CF, 0x7D2B, 0xD7D0, 0x4ED4, 0xD7D1, 0x7C7D, + 0xD7D2, 0x6ED3, 0xD7D3, 0x5B50, 0xD7D4, 0x81EA, 0xD7D5, 0x6E0D, + 0xD7D6, 0x5B57, 0xD7D7, 0x9B03, 0xD7D8, 0x68D5, 0xD7D9, 0x8E2A, + 0xD7DA, 0x5B97, 0xD7DB, 0x7EFC, 0xD7DC, 0x603B, 0xD7DD, 0x7EB5, + 0xD7DE, 0x90B9, 0xD7DF, 0x8D70, 0xD7E0, 0x594F, 0xD7E1, 0x63CD, + 0xD7E2, 0x79DF, 0xD7E3, 0x8DB3, 0xD7E4, 0x5352, 0xD7E5, 0x65CF, + 0xD7E6, 0x7956, 0xD7E7, 0x8BC5, 0xD7E8, 0x963B, 0xD7E9, 0x7EC4, + 0xD7EA, 0x94BB, 0xD7EB, 0x7E82, 0xD7EC, 0x5634, 0xD7ED, 0x9189, + 0xD7EE, 0x6700, 0xD7EF, 0x7F6A, 0xD7F0, 0x5C0A, 0xD7F1, 0x9075, + 0xD7F2, 0x6628, 0xD7F3, 0x5DE6, 0xD7F4, 0x4F50, 0xD7F5, 0x67DE, + 0xD7F6, 0x505A, 0xD7F7, 0x4F5C, 0xD7F8, 0x5750, 0xD7F9, 0x5EA7, + 0xD840, 0x8C38, 0xD841, 0x8C39, 0xD842, 0x8C3A, 0xD843, 0x8C3B, + 0xD844, 0x8C3C, 0xD845, 0x8C3D, 0xD846, 0x8C3E, 0xD847, 0x8C3F, + 0xD848, 0x8C40, 0xD849, 0x8C42, 0xD84A, 0x8C43, 0xD84B, 0x8C44, + 0xD84C, 0x8C45, 0xD84D, 0x8C48, 0xD84E, 0x8C4A, 0xD84F, 0x8C4B, + 0xD850, 0x8C4D, 0xD851, 0x8C4E, 0xD852, 0x8C4F, 0xD853, 0x8C50, + 0xD854, 0x8C51, 0xD855, 0x8C52, 0xD856, 0x8C53, 0xD857, 0x8C54, + 0xD858, 0x8C56, 0xD859, 0x8C57, 0xD85A, 0x8C58, 0xD85B, 0x8C59, + 0xD85C, 0x8C5B, 0xD85D, 0x8C5C, 0xD85E, 0x8C5D, 0xD85F, 0x8C5E, + 0xD860, 0x8C5F, 0xD861, 0x8C60, 0xD862, 0x8C63, 0xD863, 0x8C64, + 0xD864, 0x8C65, 0xD865, 0x8C66, 0xD866, 0x8C67, 0xD867, 0x8C68, + 0xD868, 0x8C69, 0xD869, 0x8C6C, 0xD86A, 0x8C6D, 0xD86B, 0x8C6E, + 0xD86C, 0x8C6F, 0xD86D, 0x8C70, 0xD86E, 0x8C71, 0xD86F, 0x8C72, + 0xD870, 0x8C74, 0xD871, 0x8C75, 0xD872, 0x8C76, 0xD873, 0x8C77, + 0xD874, 0x8C7B, 0xD875, 0x8C7C, 0xD876, 0x8C7D, 0xD877, 0x8C7E, + 0xD878, 0x8C7F, 0xD879, 0x8C80, 0xD87A, 0x8C81, 0xD87B, 0x8C83, + 0xD87C, 0x8C84, 0xD87D, 0x8C86, 0xD87E, 0x8C87, 0xD880, 0x8C88, + 0xD881, 0x8C8B, 0xD882, 0x8C8D, 0xD883, 0x8C8E, 0xD884, 0x8C8F, + 0xD885, 0x8C90, 0xD886, 0x8C91, 0xD887, 0x8C92, 0xD888, 0x8C93, + 0xD889, 0x8C95, 0xD88A, 0x8C96, 0xD88B, 0x8C97, 0xD88C, 0x8C99, + 0xD88D, 0x8C9A, 0xD88E, 0x8C9B, 0xD88F, 0x8C9C, 0xD890, 0x8C9D, + 0xD891, 0x8C9E, 0xD892, 0x8C9F, 0xD893, 0x8CA0, 0xD894, 0x8CA1, + 0xD895, 0x8CA2, 0xD896, 0x8CA3, 0xD897, 0x8CA4, 0xD898, 0x8CA5, + 0xD899, 0x8CA6, 0xD89A, 0x8CA7, 0xD89B, 0x8CA8, 0xD89C, 0x8CA9, + 0xD89D, 0x8CAA, 0xD89E, 0x8CAB, 0xD89F, 0x8CAC, 0xD8A0, 0x8CAD, + 0xD8A1, 0x4E8D, 0xD8A2, 0x4E0C, 0xD8A3, 0x5140, 0xD8A4, 0x4E10, + 0xD8A5, 0x5EFF, 0xD8A6, 0x5345, 0xD8A7, 0x4E15, 0xD8A8, 0x4E98, + 0xD8A9, 0x4E1E, 0xD8AA, 0x9B32, 0xD8AB, 0x5B6C, 0xD8AC, 0x5669, + 0xD8AD, 0x4E28, 0xD8AE, 0x79BA, 0xD8AF, 0x4E3F, 0xD8B0, 0x5315, + 0xD8B1, 0x4E47, 0xD8B2, 0x592D, 0xD8B3, 0x723B, 0xD8B4, 0x536E, + 0xD8B5, 0x6C10, 0xD8B6, 0x56DF, 0xD8B7, 0x80E4, 0xD8B8, 0x9997, + 0xD8B9, 0x6BD3, 0xD8BA, 0x777E, 0xD8BB, 0x9F17, 0xD8BC, 0x4E36, + 0xD8BD, 0x4E9F, 0xD8BE, 0x9F10, 0xD8BF, 0x4E5C, 0xD8C0, 0x4E69, + 0xD8C1, 0x4E93, 0xD8C2, 0x8288, 0xD8C3, 0x5B5B, 0xD8C4, 0x556C, + 0xD8C5, 0x560F, 0xD8C6, 0x4EC4, 0xD8C7, 0x538D, 0xD8C8, 0x539D, + 0xD8C9, 0x53A3, 0xD8CA, 0x53A5, 0xD8CB, 0x53AE, 0xD8CC, 0x9765, + 0xD8CD, 0x8D5D, 0xD8CE, 0x531A, 0xD8CF, 0x53F5, 0xD8D0, 0x5326, + 0xD8D1, 0x532E, 0xD8D2, 0x533E, 0xD8D3, 0x8D5C, 0xD8D4, 0x5366, + 0xD8D5, 0x5363, 0xD8D6, 0x5202, 0xD8D7, 0x5208, 0xD8D8, 0x520E, + 0xD8D9, 0x522D, 0xD8DA, 0x5233, 0xD8DB, 0x523F, 0xD8DC, 0x5240, + 0xD8DD, 0x524C, 0xD8DE, 0x525E, 0xD8DF, 0x5261, 0xD8E0, 0x525C, + 0xD8E1, 0x84AF, 0xD8E2, 0x527D, 0xD8E3, 0x5282, 0xD8E4, 0x5281, + 0xD8E5, 0x5290, 0xD8E6, 0x5293, 0xD8E7, 0x5182, 0xD8E8, 0x7F54, + 0xD8E9, 0x4EBB, 0xD8EA, 0x4EC3, 0xD8EB, 0x4EC9, 0xD8EC, 0x4EC2, + 0xD8ED, 0x4EE8, 0xD8EE, 0x4EE1, 0xD8EF, 0x4EEB, 0xD8F0, 0x4EDE, + 0xD8F1, 0x4F1B, 0xD8F2, 0x4EF3, 0xD8F3, 0x4F22, 0xD8F4, 0x4F64, + 0xD8F5, 0x4EF5, 0xD8F6, 0x4F25, 0xD8F7, 0x4F27, 0xD8F8, 0x4F09, + 0xD8F9, 0x4F2B, 0xD8FA, 0x4F5E, 0xD8FB, 0x4F67, 0xD8FC, 0x6538, + 0xD8FD, 0x4F5A, 0xD8FE, 0x4F5D, 0xD940, 0x8CAE, 0xD941, 0x8CAF, + 0xD942, 0x8CB0, 0xD943, 0x8CB1, 0xD944, 0x8CB2, 0xD945, 0x8CB3, + 0xD946, 0x8CB4, 0xD947, 0x8CB5, 0xD948, 0x8CB6, 0xD949, 0x8CB7, + 0xD94A, 0x8CB8, 0xD94B, 0x8CB9, 0xD94C, 0x8CBA, 0xD94D, 0x8CBB, + 0xD94E, 0x8CBC, 0xD94F, 0x8CBD, 0xD950, 0x8CBE, 0xD951, 0x8CBF, + 0xD952, 0x8CC0, 0xD953, 0x8CC1, 0xD954, 0x8CC2, 0xD955, 0x8CC3, + 0xD956, 0x8CC4, 0xD957, 0x8CC5, 0xD958, 0x8CC6, 0xD959, 0x8CC7, + 0xD95A, 0x8CC8, 0xD95B, 0x8CC9, 0xD95C, 0x8CCA, 0xD95D, 0x8CCB, + 0xD95E, 0x8CCC, 0xD95F, 0x8CCD, 0xD960, 0x8CCE, 0xD961, 0x8CCF, + 0xD962, 0x8CD0, 0xD963, 0x8CD1, 0xD964, 0x8CD2, 0xD965, 0x8CD3, + 0xD966, 0x8CD4, 0xD967, 0x8CD5, 0xD968, 0x8CD6, 0xD969, 0x8CD7, + 0xD96A, 0x8CD8, 0xD96B, 0x8CD9, 0xD96C, 0x8CDA, 0xD96D, 0x8CDB, + 0xD96E, 0x8CDC, 0xD96F, 0x8CDD, 0xD970, 0x8CDE, 0xD971, 0x8CDF, + 0xD972, 0x8CE0, 0xD973, 0x8CE1, 0xD974, 0x8CE2, 0xD975, 0x8CE3, + 0xD976, 0x8CE4, 0xD977, 0x8CE5, 0xD978, 0x8CE6, 0xD979, 0x8CE7, + 0xD97A, 0x8CE8, 0xD97B, 0x8CE9, 0xD97C, 0x8CEA, 0xD97D, 0x8CEB, + 0xD97E, 0x8CEC, 0xD980, 0x8CED, 0xD981, 0x8CEE, 0xD982, 0x8CEF, + 0xD983, 0x8CF0, 0xD984, 0x8CF1, 0xD985, 0x8CF2, 0xD986, 0x8CF3, + 0xD987, 0x8CF4, 0xD988, 0x8CF5, 0xD989, 0x8CF6, 0xD98A, 0x8CF7, + 0xD98B, 0x8CF8, 0xD98C, 0x8CF9, 0xD98D, 0x8CFA, 0xD98E, 0x8CFB, + 0xD98F, 0x8CFC, 0xD990, 0x8CFD, 0xD991, 0x8CFE, 0xD992, 0x8CFF, + 0xD993, 0x8D00, 0xD994, 0x8D01, 0xD995, 0x8D02, 0xD996, 0x8D03, + 0xD997, 0x8D04, 0xD998, 0x8D05, 0xD999, 0x8D06, 0xD99A, 0x8D07, + 0xD99B, 0x8D08, 0xD99C, 0x8D09, 0xD99D, 0x8D0A, 0xD99E, 0x8D0B, + 0xD99F, 0x8D0C, 0xD9A0, 0x8D0D, 0xD9A1, 0x4F5F, 0xD9A2, 0x4F57, + 0xD9A3, 0x4F32, 0xD9A4, 0x4F3D, 0xD9A5, 0x4F76, 0xD9A6, 0x4F74, + 0xD9A7, 0x4F91, 0xD9A8, 0x4F89, 0xD9A9, 0x4F83, 0xD9AA, 0x4F8F, + 0xD9AB, 0x4F7E, 0xD9AC, 0x4F7B, 0xD9AD, 0x4FAA, 0xD9AE, 0x4F7C, + 0xD9AF, 0x4FAC, 0xD9B0, 0x4F94, 0xD9B1, 0x4FE6, 0xD9B2, 0x4FE8, + 0xD9B3, 0x4FEA, 0xD9B4, 0x4FC5, 0xD9B5, 0x4FDA, 0xD9B6, 0x4FE3, + 0xD9B7, 0x4FDC, 0xD9B8, 0x4FD1, 0xD9B9, 0x4FDF, 0xD9BA, 0x4FF8, + 0xD9BB, 0x5029, 0xD9BC, 0x504C, 0xD9BD, 0x4FF3, 0xD9BE, 0x502C, + 0xD9BF, 0x500F, 0xD9C0, 0x502E, 0xD9C1, 0x502D, 0xD9C2, 0x4FFE, + 0xD9C3, 0x501C, 0xD9C4, 0x500C, 0xD9C5, 0x5025, 0xD9C6, 0x5028, + 0xD9C7, 0x507E, 0xD9C8, 0x5043, 0xD9C9, 0x5055, 0xD9CA, 0x5048, + 0xD9CB, 0x504E, 0xD9CC, 0x506C, 0xD9CD, 0x507B, 0xD9CE, 0x50A5, + 0xD9CF, 0x50A7, 0xD9D0, 0x50A9, 0xD9D1, 0x50BA, 0xD9D2, 0x50D6, + 0xD9D3, 0x5106, 0xD9D4, 0x50ED, 0xD9D5, 0x50EC, 0xD9D6, 0x50E6, + 0xD9D7, 0x50EE, 0xD9D8, 0x5107, 0xD9D9, 0x510B, 0xD9DA, 0x4EDD, + 0xD9DB, 0x6C3D, 0xD9DC, 0x4F58, 0xD9DD, 0x4F65, 0xD9DE, 0x4FCE, + 0xD9DF, 0x9FA0, 0xD9E0, 0x6C46, 0xD9E1, 0x7C74, 0xD9E2, 0x516E, + 0xD9E3, 0x5DFD, 0xD9E4, 0x9EC9, 0xD9E5, 0x9998, 0xD9E6, 0x5181, + 0xD9E7, 0x5914, 0xD9E8, 0x52F9, 0xD9E9, 0x530D, 0xD9EA, 0x8A07, + 0xD9EB, 0x5310, 0xD9EC, 0x51EB, 0xD9ED, 0x5919, 0xD9EE, 0x5155, + 0xD9EF, 0x4EA0, 0xD9F0, 0x5156, 0xD9F1, 0x4EB3, 0xD9F2, 0x886E, + 0xD9F3, 0x88A4, 0xD9F4, 0x4EB5, 0xD9F5, 0x8114, 0xD9F6, 0x88D2, + 0xD9F7, 0x7980, 0xD9F8, 0x5B34, 0xD9F9, 0x8803, 0xD9FA, 0x7FB8, + 0xD9FB, 0x51AB, 0xD9FC, 0x51B1, 0xD9FD, 0x51BD, 0xD9FE, 0x51BC, + 0xDA40, 0x8D0E, 0xDA41, 0x8D0F, 0xDA42, 0x8D10, 0xDA43, 0x8D11, + 0xDA44, 0x8D12, 0xDA45, 0x8D13, 0xDA46, 0x8D14, 0xDA47, 0x8D15, + 0xDA48, 0x8D16, 0xDA49, 0x8D17, 0xDA4A, 0x8D18, 0xDA4B, 0x8D19, + 0xDA4C, 0x8D1A, 0xDA4D, 0x8D1B, 0xDA4E, 0x8D1C, 0xDA4F, 0x8D20, + 0xDA50, 0x8D51, 0xDA51, 0x8D52, 0xDA52, 0x8D57, 0xDA53, 0x8D5F, + 0xDA54, 0x8D65, 0xDA55, 0x8D68, 0xDA56, 0x8D69, 0xDA57, 0x8D6A, + 0xDA58, 0x8D6C, 0xDA59, 0x8D6E, 0xDA5A, 0x8D6F, 0xDA5B, 0x8D71, + 0xDA5C, 0x8D72, 0xDA5D, 0x8D78, 0xDA5E, 0x8D79, 0xDA5F, 0x8D7A, + 0xDA60, 0x8D7B, 0xDA61, 0x8D7C, 0xDA62, 0x8D7D, 0xDA63, 0x8D7E, + 0xDA64, 0x8D7F, 0xDA65, 0x8D80, 0xDA66, 0x8D82, 0xDA67, 0x8D83, + 0xDA68, 0x8D86, 0xDA69, 0x8D87, 0xDA6A, 0x8D88, 0xDA6B, 0x8D89, + 0xDA6C, 0x8D8C, 0xDA6D, 0x8D8D, 0xDA6E, 0x8D8E, 0xDA6F, 0x8D8F, + 0xDA70, 0x8D90, 0xDA71, 0x8D92, 0xDA72, 0x8D93, 0xDA73, 0x8D95, + 0xDA74, 0x8D96, 0xDA75, 0x8D97, 0xDA76, 0x8D98, 0xDA77, 0x8D99, + 0xDA78, 0x8D9A, 0xDA79, 0x8D9B, 0xDA7A, 0x8D9C, 0xDA7B, 0x8D9D, + 0xDA7C, 0x8D9E, 0xDA7D, 0x8DA0, 0xDA7E, 0x8DA1, 0xDA80, 0x8DA2, + 0xDA81, 0x8DA4, 0xDA82, 0x8DA5, 0xDA83, 0x8DA6, 0xDA84, 0x8DA7, + 0xDA85, 0x8DA8, 0xDA86, 0x8DA9, 0xDA87, 0x8DAA, 0xDA88, 0x8DAB, + 0xDA89, 0x8DAC, 0xDA8A, 0x8DAD, 0xDA8B, 0x8DAE, 0xDA8C, 0x8DAF, + 0xDA8D, 0x8DB0, 0xDA8E, 0x8DB2, 0xDA8F, 0x8DB6, 0xDA90, 0x8DB7, + 0xDA91, 0x8DB9, 0xDA92, 0x8DBB, 0xDA93, 0x8DBD, 0xDA94, 0x8DC0, + 0xDA95, 0x8DC1, 0xDA96, 0x8DC2, 0xDA97, 0x8DC5, 0xDA98, 0x8DC7, + 0xDA99, 0x8DC8, 0xDA9A, 0x8DC9, 0xDA9B, 0x8DCA, 0xDA9C, 0x8DCD, + 0xDA9D, 0x8DD0, 0xDA9E, 0x8DD2, 0xDA9F, 0x8DD3, 0xDAA0, 0x8DD4, + 0xDAA1, 0x51C7, 0xDAA2, 0x5196, 0xDAA3, 0x51A2, 0xDAA4, 0x51A5, + 0xDAA5, 0x8BA0, 0xDAA6, 0x8BA6, 0xDAA7, 0x8BA7, 0xDAA8, 0x8BAA, + 0xDAA9, 0x8BB4, 0xDAAA, 0x8BB5, 0xDAAB, 0x8BB7, 0xDAAC, 0x8BC2, + 0xDAAD, 0x8BC3, 0xDAAE, 0x8BCB, 0xDAAF, 0x8BCF, 0xDAB0, 0x8BCE, + 0xDAB1, 0x8BD2, 0xDAB2, 0x8BD3, 0xDAB3, 0x8BD4, 0xDAB4, 0x8BD6, + 0xDAB5, 0x8BD8, 0xDAB6, 0x8BD9, 0xDAB7, 0x8BDC, 0xDAB8, 0x8BDF, + 0xDAB9, 0x8BE0, 0xDABA, 0x8BE4, 0xDABB, 0x8BE8, 0xDABC, 0x8BE9, + 0xDABD, 0x8BEE, 0xDABE, 0x8BF0, 0xDABF, 0x8BF3, 0xDAC0, 0x8BF6, + 0xDAC1, 0x8BF9, 0xDAC2, 0x8BFC, 0xDAC3, 0x8BFF, 0xDAC4, 0x8C00, + 0xDAC5, 0x8C02, 0xDAC6, 0x8C04, 0xDAC7, 0x8C07, 0xDAC8, 0x8C0C, + 0xDAC9, 0x8C0F, 0xDACA, 0x8C11, 0xDACB, 0x8C12, 0xDACC, 0x8C14, + 0xDACD, 0x8C15, 0xDACE, 0x8C16, 0xDACF, 0x8C19, 0xDAD0, 0x8C1B, + 0xDAD1, 0x8C18, 0xDAD2, 0x8C1D, 0xDAD3, 0x8C1F, 0xDAD4, 0x8C20, + 0xDAD5, 0x8C21, 0xDAD6, 0x8C25, 0xDAD7, 0x8C27, 0xDAD8, 0x8C2A, + 0xDAD9, 0x8C2B, 0xDADA, 0x8C2E, 0xDADB, 0x8C2F, 0xDADC, 0x8C32, + 0xDADD, 0x8C33, 0xDADE, 0x8C35, 0xDADF, 0x8C36, 0xDAE0, 0x5369, + 0xDAE1, 0x537A, 0xDAE2, 0x961D, 0xDAE3, 0x9622, 0xDAE4, 0x9621, + 0xDAE5, 0x9631, 0xDAE6, 0x962A, 0xDAE7, 0x963D, 0xDAE8, 0x963C, + 0xDAE9, 0x9642, 0xDAEA, 0x9649, 0xDAEB, 0x9654, 0xDAEC, 0x965F, + 0xDAED, 0x9667, 0xDAEE, 0x966C, 0xDAEF, 0x9672, 0xDAF0, 0x9674, + 0xDAF1, 0x9688, 0xDAF2, 0x968D, 0xDAF3, 0x9697, 0xDAF4, 0x96B0, + 0xDAF5, 0x9097, 0xDAF6, 0x909B, 0xDAF7, 0x909D, 0xDAF8, 0x9099, + 0xDAF9, 0x90AC, 0xDAFA, 0x90A1, 0xDAFB, 0x90B4, 0xDAFC, 0x90B3, + 0xDAFD, 0x90B6, 0xDAFE, 0x90BA, 0xDB40, 0x8DD5, 0xDB41, 0x8DD8, + 0xDB42, 0x8DD9, 0xDB43, 0x8DDC, 0xDB44, 0x8DE0, 0xDB45, 0x8DE1, + 0xDB46, 0x8DE2, 0xDB47, 0x8DE5, 0xDB48, 0x8DE6, 0xDB49, 0x8DE7, + 0xDB4A, 0x8DE9, 0xDB4B, 0x8DED, 0xDB4C, 0x8DEE, 0xDB4D, 0x8DF0, + 0xDB4E, 0x8DF1, 0xDB4F, 0x8DF2, 0xDB50, 0x8DF4, 0xDB51, 0x8DF6, + 0xDB52, 0x8DFC, 0xDB53, 0x8DFE, 0xDB54, 0x8DFF, 0xDB55, 0x8E00, + 0xDB56, 0x8E01, 0xDB57, 0x8E02, 0xDB58, 0x8E03, 0xDB59, 0x8E04, + 0xDB5A, 0x8E06, 0xDB5B, 0x8E07, 0xDB5C, 0x8E08, 0xDB5D, 0x8E0B, + 0xDB5E, 0x8E0D, 0xDB5F, 0x8E0E, 0xDB60, 0x8E10, 0xDB61, 0x8E11, + 0xDB62, 0x8E12, 0xDB63, 0x8E13, 0xDB64, 0x8E15, 0xDB65, 0x8E16, + 0xDB66, 0x8E17, 0xDB67, 0x8E18, 0xDB68, 0x8E19, 0xDB69, 0x8E1A, + 0xDB6A, 0x8E1B, 0xDB6B, 0x8E1C, 0xDB6C, 0x8E20, 0xDB6D, 0x8E21, + 0xDB6E, 0x8E24, 0xDB6F, 0x8E25, 0xDB70, 0x8E26, 0xDB71, 0x8E27, + 0xDB72, 0x8E28, 0xDB73, 0x8E2B, 0xDB74, 0x8E2D, 0xDB75, 0x8E30, + 0xDB76, 0x8E32, 0xDB77, 0x8E33, 0xDB78, 0x8E34, 0xDB79, 0x8E36, + 0xDB7A, 0x8E37, 0xDB7B, 0x8E38, 0xDB7C, 0x8E3B, 0xDB7D, 0x8E3C, + 0xDB7E, 0x8E3E, 0xDB80, 0x8E3F, 0xDB81, 0x8E43, 0xDB82, 0x8E45, + 0xDB83, 0x8E46, 0xDB84, 0x8E4C, 0xDB85, 0x8E4D, 0xDB86, 0x8E4E, + 0xDB87, 0x8E4F, 0xDB88, 0x8E50, 0xDB89, 0x8E53, 0xDB8A, 0x8E54, + 0xDB8B, 0x8E55, 0xDB8C, 0x8E56, 0xDB8D, 0x8E57, 0xDB8E, 0x8E58, + 0xDB8F, 0x8E5A, 0xDB90, 0x8E5B, 0xDB91, 0x8E5C, 0xDB92, 0x8E5D, + 0xDB93, 0x8E5E, 0xDB94, 0x8E5F, 0xDB95, 0x8E60, 0xDB96, 0x8E61, + 0xDB97, 0x8E62, 0xDB98, 0x8E63, 0xDB99, 0x8E64, 0xDB9A, 0x8E65, + 0xDB9B, 0x8E67, 0xDB9C, 0x8E68, 0xDB9D, 0x8E6A, 0xDB9E, 0x8E6B, + 0xDB9F, 0x8E6E, 0xDBA0, 0x8E71, 0xDBA1, 0x90B8, 0xDBA2, 0x90B0, + 0xDBA3, 0x90CF, 0xDBA4, 0x90C5, 0xDBA5, 0x90BE, 0xDBA6, 0x90D0, + 0xDBA7, 0x90C4, 0xDBA8, 0x90C7, 0xDBA9, 0x90D3, 0xDBAA, 0x90E6, + 0xDBAB, 0x90E2, 0xDBAC, 0x90DC, 0xDBAD, 0x90D7, 0xDBAE, 0x90DB, + 0xDBAF, 0x90EB, 0xDBB0, 0x90EF, 0xDBB1, 0x90FE, 0xDBB2, 0x9104, + 0xDBB3, 0x9122, 0xDBB4, 0x911E, 0xDBB5, 0x9123, 0xDBB6, 0x9131, + 0xDBB7, 0x912F, 0xDBB8, 0x9139, 0xDBB9, 0x9143, 0xDBBA, 0x9146, + 0xDBBB, 0x520D, 0xDBBC, 0x5942, 0xDBBD, 0x52A2, 0xDBBE, 0x52AC, + 0xDBBF, 0x52AD, 0xDBC0, 0x52BE, 0xDBC1, 0x54FF, 0xDBC2, 0x52D0, + 0xDBC3, 0x52D6, 0xDBC4, 0x52F0, 0xDBC5, 0x53DF, 0xDBC6, 0x71EE, + 0xDBC7, 0x77CD, 0xDBC8, 0x5EF4, 0xDBC9, 0x51F5, 0xDBCA, 0x51FC, + 0xDBCB, 0x9B2F, 0xDBCC, 0x53B6, 0xDBCD, 0x5F01, 0xDBCE, 0x755A, + 0xDBCF, 0x5DEF, 0xDBD0, 0x574C, 0xDBD1, 0x57A9, 0xDBD2, 0x57A1, + 0xDBD3, 0x587E, 0xDBD4, 0x58BC, 0xDBD5, 0x58C5, 0xDBD6, 0x58D1, + 0xDBD7, 0x5729, 0xDBD8, 0x572C, 0xDBD9, 0x572A, 0xDBDA, 0x5733, + 0xDBDB, 0x5739, 0xDBDC, 0x572E, 0xDBDD, 0x572F, 0xDBDE, 0x575C, + 0xDBDF, 0x573B, 0xDBE0, 0x5742, 0xDBE1, 0x5769, 0xDBE2, 0x5785, + 0xDBE3, 0x576B, 0xDBE4, 0x5786, 0xDBE5, 0x577C, 0xDBE6, 0x577B, + 0xDBE7, 0x5768, 0xDBE8, 0x576D, 0xDBE9, 0x5776, 0xDBEA, 0x5773, + 0xDBEB, 0x57AD, 0xDBEC, 0x57A4, 0xDBED, 0x578C, 0xDBEE, 0x57B2, + 0xDBEF, 0x57CF, 0xDBF0, 0x57A7, 0xDBF1, 0x57B4, 0xDBF2, 0x5793, + 0xDBF3, 0x57A0, 0xDBF4, 0x57D5, 0xDBF5, 0x57D8, 0xDBF6, 0x57DA, + 0xDBF7, 0x57D9, 0xDBF8, 0x57D2, 0xDBF9, 0x57B8, 0xDBFA, 0x57F4, + 0xDBFB, 0x57EF, 0xDBFC, 0x57F8, 0xDBFD, 0x57E4, 0xDBFE, 0x57DD, + 0xDC40, 0x8E73, 0xDC41, 0x8E75, 0xDC42, 0x8E77, 0xDC43, 0x8E78, + 0xDC44, 0x8E79, 0xDC45, 0x8E7A, 0xDC46, 0x8E7B, 0xDC47, 0x8E7D, + 0xDC48, 0x8E7E, 0xDC49, 0x8E80, 0xDC4A, 0x8E82, 0xDC4B, 0x8E83, + 0xDC4C, 0x8E84, 0xDC4D, 0x8E86, 0xDC4E, 0x8E88, 0xDC4F, 0x8E89, + 0xDC50, 0x8E8A, 0xDC51, 0x8E8B, 0xDC52, 0x8E8C, 0xDC53, 0x8E8D, + 0xDC54, 0x8E8E, 0xDC55, 0x8E91, 0xDC56, 0x8E92, 0xDC57, 0x8E93, + 0xDC58, 0x8E95, 0xDC59, 0x8E96, 0xDC5A, 0x8E97, 0xDC5B, 0x8E98, + 0xDC5C, 0x8E99, 0xDC5D, 0x8E9A, 0xDC5E, 0x8E9B, 0xDC5F, 0x8E9D, + 0xDC60, 0x8E9F, 0xDC61, 0x8EA0, 0xDC62, 0x8EA1, 0xDC63, 0x8EA2, + 0xDC64, 0x8EA3, 0xDC65, 0x8EA4, 0xDC66, 0x8EA5, 0xDC67, 0x8EA6, + 0xDC68, 0x8EA7, 0xDC69, 0x8EA8, 0xDC6A, 0x8EA9, 0xDC6B, 0x8EAA, + 0xDC6C, 0x8EAD, 0xDC6D, 0x8EAE, 0xDC6E, 0x8EB0, 0xDC6F, 0x8EB1, + 0xDC70, 0x8EB3, 0xDC71, 0x8EB4, 0xDC72, 0x8EB5, 0xDC73, 0x8EB6, + 0xDC74, 0x8EB7, 0xDC75, 0x8EB8, 0xDC76, 0x8EB9, 0xDC77, 0x8EBB, + 0xDC78, 0x8EBC, 0xDC79, 0x8EBD, 0xDC7A, 0x8EBE, 0xDC7B, 0x8EBF, + 0xDC7C, 0x8EC0, 0xDC7D, 0x8EC1, 0xDC7E, 0x8EC2, 0xDC80, 0x8EC3, + 0xDC81, 0x8EC4, 0xDC82, 0x8EC5, 0xDC83, 0x8EC6, 0xDC84, 0x8EC7, + 0xDC85, 0x8EC8, 0xDC86, 0x8EC9, 0xDC87, 0x8ECA, 0xDC88, 0x8ECB, + 0xDC89, 0x8ECC, 0xDC8A, 0x8ECD, 0xDC8B, 0x8ECF, 0xDC8C, 0x8ED0, + 0xDC8D, 0x8ED1, 0xDC8E, 0x8ED2, 0xDC8F, 0x8ED3, 0xDC90, 0x8ED4, + 0xDC91, 0x8ED5, 0xDC92, 0x8ED6, 0xDC93, 0x8ED7, 0xDC94, 0x8ED8, + 0xDC95, 0x8ED9, 0xDC96, 0x8EDA, 0xDC97, 0x8EDB, 0xDC98, 0x8EDC, + 0xDC99, 0x8EDD, 0xDC9A, 0x8EDE, 0xDC9B, 0x8EDF, 0xDC9C, 0x8EE0, + 0xDC9D, 0x8EE1, 0xDC9E, 0x8EE2, 0xDC9F, 0x8EE3, 0xDCA0, 0x8EE4, + 0xDCA1, 0x580B, 0xDCA2, 0x580D, 0xDCA3, 0x57FD, 0xDCA4, 0x57ED, + 0xDCA5, 0x5800, 0xDCA6, 0x581E, 0xDCA7, 0x5819, 0xDCA8, 0x5844, + 0xDCA9, 0x5820, 0xDCAA, 0x5865, 0xDCAB, 0x586C, 0xDCAC, 0x5881, + 0xDCAD, 0x5889, 0xDCAE, 0x589A, 0xDCAF, 0x5880, 0xDCB0, 0x99A8, + 0xDCB1, 0x9F19, 0xDCB2, 0x61FF, 0xDCB3, 0x8279, 0xDCB4, 0x827D, + 0xDCB5, 0x827F, 0xDCB6, 0x828F, 0xDCB7, 0x828A, 0xDCB8, 0x82A8, + 0xDCB9, 0x8284, 0xDCBA, 0x828E, 0xDCBB, 0x8291, 0xDCBC, 0x8297, + 0xDCBD, 0x8299, 0xDCBE, 0x82AB, 0xDCBF, 0x82B8, 0xDCC0, 0x82BE, + 0xDCC1, 0x82B0, 0xDCC2, 0x82C8, 0xDCC3, 0x82CA, 0xDCC4, 0x82E3, + 0xDCC5, 0x8298, 0xDCC6, 0x82B7, 0xDCC7, 0x82AE, 0xDCC8, 0x82CB, + 0xDCC9, 0x82CC, 0xDCCA, 0x82C1, 0xDCCB, 0x82A9, 0xDCCC, 0x82B4, + 0xDCCD, 0x82A1, 0xDCCE, 0x82AA, 0xDCCF, 0x829F, 0xDCD0, 0x82C4, + 0xDCD1, 0x82CE, 0xDCD2, 0x82A4, 0xDCD3, 0x82E1, 0xDCD4, 0x8309, + 0xDCD5, 0x82F7, 0xDCD6, 0x82E4, 0xDCD7, 0x830F, 0xDCD8, 0x8307, + 0xDCD9, 0x82DC, 0xDCDA, 0x82F4, 0xDCDB, 0x82D2, 0xDCDC, 0x82D8, + 0xDCDD, 0x830C, 0xDCDE, 0x82FB, 0xDCDF, 0x82D3, 0xDCE0, 0x8311, + 0xDCE1, 0x831A, 0xDCE2, 0x8306, 0xDCE3, 0x8314, 0xDCE4, 0x8315, + 0xDCE5, 0x82E0, 0xDCE6, 0x82D5, 0xDCE7, 0x831C, 0xDCE8, 0x8351, + 0xDCE9, 0x835B, 0xDCEA, 0x835C, 0xDCEB, 0x8308, 0xDCEC, 0x8392, + 0xDCED, 0x833C, 0xDCEE, 0x8334, 0xDCEF, 0x8331, 0xDCF0, 0x839B, + 0xDCF1, 0x835E, 0xDCF2, 0x832F, 0xDCF3, 0x834F, 0xDCF4, 0x8347, + 0xDCF5, 0x8343, 0xDCF6, 0x835F, 0xDCF7, 0x8340, 0xDCF8, 0x8317, + 0xDCF9, 0x8360, 0xDCFA, 0x832D, 0xDCFB, 0x833A, 0xDCFC, 0x8333, + 0xDCFD, 0x8366, 0xDCFE, 0x8365, 0xDD40, 0x8EE5, 0xDD41, 0x8EE6, + 0xDD42, 0x8EE7, 0xDD43, 0x8EE8, 0xDD44, 0x8EE9, 0xDD45, 0x8EEA, + 0xDD46, 0x8EEB, 0xDD47, 0x8EEC, 0xDD48, 0x8EED, 0xDD49, 0x8EEE, + 0xDD4A, 0x8EEF, 0xDD4B, 0x8EF0, 0xDD4C, 0x8EF1, 0xDD4D, 0x8EF2, + 0xDD4E, 0x8EF3, 0xDD4F, 0x8EF4, 0xDD50, 0x8EF5, 0xDD51, 0x8EF6, + 0xDD52, 0x8EF7, 0xDD53, 0x8EF8, 0xDD54, 0x8EF9, 0xDD55, 0x8EFA, + 0xDD56, 0x8EFB, 0xDD57, 0x8EFC, 0xDD58, 0x8EFD, 0xDD59, 0x8EFE, + 0xDD5A, 0x8EFF, 0xDD5B, 0x8F00, 0xDD5C, 0x8F01, 0xDD5D, 0x8F02, + 0xDD5E, 0x8F03, 0xDD5F, 0x8F04, 0xDD60, 0x8F05, 0xDD61, 0x8F06, + 0xDD62, 0x8F07, 0xDD63, 0x8F08, 0xDD64, 0x8F09, 0xDD65, 0x8F0A, + 0xDD66, 0x8F0B, 0xDD67, 0x8F0C, 0xDD68, 0x8F0D, 0xDD69, 0x8F0E, + 0xDD6A, 0x8F0F, 0xDD6B, 0x8F10, 0xDD6C, 0x8F11, 0xDD6D, 0x8F12, + 0xDD6E, 0x8F13, 0xDD6F, 0x8F14, 0xDD70, 0x8F15, 0xDD71, 0x8F16, + 0xDD72, 0x8F17, 0xDD73, 0x8F18, 0xDD74, 0x8F19, 0xDD75, 0x8F1A, + 0xDD76, 0x8F1B, 0xDD77, 0x8F1C, 0xDD78, 0x8F1D, 0xDD79, 0x8F1E, + 0xDD7A, 0x8F1F, 0xDD7B, 0x8F20, 0xDD7C, 0x8F21, 0xDD7D, 0x8F22, + 0xDD7E, 0x8F23, 0xDD80, 0x8F24, 0xDD81, 0x8F25, 0xDD82, 0x8F26, + 0xDD83, 0x8F27, 0xDD84, 0x8F28, 0xDD85, 0x8F29, 0xDD86, 0x8F2A, + 0xDD87, 0x8F2B, 0xDD88, 0x8F2C, 0xDD89, 0x8F2D, 0xDD8A, 0x8F2E, + 0xDD8B, 0x8F2F, 0xDD8C, 0x8F30, 0xDD8D, 0x8F31, 0xDD8E, 0x8F32, + 0xDD8F, 0x8F33, 0xDD90, 0x8F34, 0xDD91, 0x8F35, 0xDD92, 0x8F36, + 0xDD93, 0x8F37, 0xDD94, 0x8F38, 0xDD95, 0x8F39, 0xDD96, 0x8F3A, + 0xDD97, 0x8F3B, 0xDD98, 0x8F3C, 0xDD99, 0x8F3D, 0xDD9A, 0x8F3E, + 0xDD9B, 0x8F3F, 0xDD9C, 0x8F40, 0xDD9D, 0x8F41, 0xDD9E, 0x8F42, + 0xDD9F, 0x8F43, 0xDDA0, 0x8F44, 0xDDA1, 0x8368, 0xDDA2, 0x831B, + 0xDDA3, 0x8369, 0xDDA4, 0x836C, 0xDDA5, 0x836A, 0xDDA6, 0x836D, + 0xDDA7, 0x836E, 0xDDA8, 0x83B0, 0xDDA9, 0x8378, 0xDDAA, 0x83B3, + 0xDDAB, 0x83B4, 0xDDAC, 0x83A0, 0xDDAD, 0x83AA, 0xDDAE, 0x8393, + 0xDDAF, 0x839C, 0xDDB0, 0x8385, 0xDDB1, 0x837C, 0xDDB2, 0x83B6, + 0xDDB3, 0x83A9, 0xDDB4, 0x837D, 0xDDB5, 0x83B8, 0xDDB6, 0x837B, + 0xDDB7, 0x8398, 0xDDB8, 0x839E, 0xDDB9, 0x83A8, 0xDDBA, 0x83BA, + 0xDDBB, 0x83BC, 0xDDBC, 0x83C1, 0xDDBD, 0x8401, 0xDDBE, 0x83E5, + 0xDDBF, 0x83D8, 0xDDC0, 0x5807, 0xDDC1, 0x8418, 0xDDC2, 0x840B, + 0xDDC3, 0x83DD, 0xDDC4, 0x83FD, 0xDDC5, 0x83D6, 0xDDC6, 0x841C, + 0xDDC7, 0x8438, 0xDDC8, 0x8411, 0xDDC9, 0x8406, 0xDDCA, 0x83D4, + 0xDDCB, 0x83DF, 0xDDCC, 0x840F, 0xDDCD, 0x8403, 0xDDCE, 0x83F8, + 0xDDCF, 0x83F9, 0xDDD0, 0x83EA, 0xDDD1, 0x83C5, 0xDDD2, 0x83C0, + 0xDDD3, 0x8426, 0xDDD4, 0x83F0, 0xDDD5, 0x83E1, 0xDDD6, 0x845C, + 0xDDD7, 0x8451, 0xDDD8, 0x845A, 0xDDD9, 0x8459, 0xDDDA, 0x8473, + 0xDDDB, 0x8487, 0xDDDC, 0x8488, 0xDDDD, 0x847A, 0xDDDE, 0x8489, + 0xDDDF, 0x8478, 0xDDE0, 0x843C, 0xDDE1, 0x8446, 0xDDE2, 0x8469, + 0xDDE3, 0x8476, 0xDDE4, 0x848C, 0xDDE5, 0x848E, 0xDDE6, 0x8431, + 0xDDE7, 0x846D, 0xDDE8, 0x84C1, 0xDDE9, 0x84CD, 0xDDEA, 0x84D0, + 0xDDEB, 0x84E6, 0xDDEC, 0x84BD, 0xDDED, 0x84D3, 0xDDEE, 0x84CA, + 0xDDEF, 0x84BF, 0xDDF0, 0x84BA, 0xDDF1, 0x84E0, 0xDDF2, 0x84A1, + 0xDDF3, 0x84B9, 0xDDF4, 0x84B4, 0xDDF5, 0x8497, 0xDDF6, 0x84E5, + 0xDDF7, 0x84E3, 0xDDF8, 0x850C, 0xDDF9, 0x750D, 0xDDFA, 0x8538, + 0xDDFB, 0x84F0, 0xDDFC, 0x8539, 0xDDFD, 0x851F, 0xDDFE, 0x853A, + 0xDE40, 0x8F45, 0xDE41, 0x8F46, 0xDE42, 0x8F47, 0xDE43, 0x8F48, + 0xDE44, 0x8F49, 0xDE45, 0x8F4A, 0xDE46, 0x8F4B, 0xDE47, 0x8F4C, + 0xDE48, 0x8F4D, 0xDE49, 0x8F4E, 0xDE4A, 0x8F4F, 0xDE4B, 0x8F50, + 0xDE4C, 0x8F51, 0xDE4D, 0x8F52, 0xDE4E, 0x8F53, 0xDE4F, 0x8F54, + 0xDE50, 0x8F55, 0xDE51, 0x8F56, 0xDE52, 0x8F57, 0xDE53, 0x8F58, + 0xDE54, 0x8F59, 0xDE55, 0x8F5A, 0xDE56, 0x8F5B, 0xDE57, 0x8F5C, + 0xDE58, 0x8F5D, 0xDE59, 0x8F5E, 0xDE5A, 0x8F5F, 0xDE5B, 0x8F60, + 0xDE5C, 0x8F61, 0xDE5D, 0x8F62, 0xDE5E, 0x8F63, 0xDE5F, 0x8F64, + 0xDE60, 0x8F65, 0xDE61, 0x8F6A, 0xDE62, 0x8F80, 0xDE63, 0x8F8C, + 0xDE64, 0x8F92, 0xDE65, 0x8F9D, 0xDE66, 0x8FA0, 0xDE67, 0x8FA1, + 0xDE68, 0x8FA2, 0xDE69, 0x8FA4, 0xDE6A, 0x8FA5, 0xDE6B, 0x8FA6, + 0xDE6C, 0x8FA7, 0xDE6D, 0x8FAA, 0xDE6E, 0x8FAC, 0xDE6F, 0x8FAD, + 0xDE70, 0x8FAE, 0xDE71, 0x8FAF, 0xDE72, 0x8FB2, 0xDE73, 0x8FB3, + 0xDE74, 0x8FB4, 0xDE75, 0x8FB5, 0xDE76, 0x8FB7, 0xDE77, 0x8FB8, + 0xDE78, 0x8FBA, 0xDE79, 0x8FBB, 0xDE7A, 0x8FBC, 0xDE7B, 0x8FBF, + 0xDE7C, 0x8FC0, 0xDE7D, 0x8FC3, 0xDE7E, 0x8FC6, 0xDE80, 0x8FC9, + 0xDE81, 0x8FCA, 0xDE82, 0x8FCB, 0xDE83, 0x8FCC, 0xDE84, 0x8FCD, + 0xDE85, 0x8FCF, 0xDE86, 0x8FD2, 0xDE87, 0x8FD6, 0xDE88, 0x8FD7, + 0xDE89, 0x8FDA, 0xDE8A, 0x8FE0, 0xDE8B, 0x8FE1, 0xDE8C, 0x8FE3, + 0xDE8D, 0x8FE7, 0xDE8E, 0x8FEC, 0xDE8F, 0x8FEF, 0xDE90, 0x8FF1, + 0xDE91, 0x8FF2, 0xDE92, 0x8FF4, 0xDE93, 0x8FF5, 0xDE94, 0x8FF6, + 0xDE95, 0x8FFA, 0xDE96, 0x8FFB, 0xDE97, 0x8FFC, 0xDE98, 0x8FFE, + 0xDE99, 0x8FFF, 0xDE9A, 0x9007, 0xDE9B, 0x9008, 0xDE9C, 0x900C, + 0xDE9D, 0x900E, 0xDE9E, 0x9013, 0xDE9F, 0x9015, 0xDEA0, 0x9018, + 0xDEA1, 0x8556, 0xDEA2, 0x853B, 0xDEA3, 0x84FF, 0xDEA4, 0x84FC, + 0xDEA5, 0x8559, 0xDEA6, 0x8548, 0xDEA7, 0x8568, 0xDEA8, 0x8564, + 0xDEA9, 0x855E, 0xDEAA, 0x857A, 0xDEAB, 0x77A2, 0xDEAC, 0x8543, + 0xDEAD, 0x8572, 0xDEAE, 0x857B, 0xDEAF, 0x85A4, 0xDEB0, 0x85A8, + 0xDEB1, 0x8587, 0xDEB2, 0x858F, 0xDEB3, 0x8579, 0xDEB4, 0x85AE, + 0xDEB5, 0x859C, 0xDEB6, 0x8585, 0xDEB7, 0x85B9, 0xDEB8, 0x85B7, + 0xDEB9, 0x85B0, 0xDEBA, 0x85D3, 0xDEBB, 0x85C1, 0xDEBC, 0x85DC, + 0xDEBD, 0x85FF, 0xDEBE, 0x8627, 0xDEBF, 0x8605, 0xDEC0, 0x8629, + 0xDEC1, 0x8616, 0xDEC2, 0x863C, 0xDEC3, 0x5EFE, 0xDEC4, 0x5F08, + 0xDEC5, 0x593C, 0xDEC6, 0x5941, 0xDEC7, 0x8037, 0xDEC8, 0x5955, + 0xDEC9, 0x595A, 0xDECA, 0x5958, 0xDECB, 0x530F, 0xDECC, 0x5C22, + 0xDECD, 0x5C25, 0xDECE, 0x5C2C, 0xDECF, 0x5C34, 0xDED0, 0x624C, + 0xDED1, 0x626A, 0xDED2, 0x629F, 0xDED3, 0x62BB, 0xDED4, 0x62CA, + 0xDED5, 0x62DA, 0xDED6, 0x62D7, 0xDED7, 0x62EE, 0xDED8, 0x6322, + 0xDED9, 0x62F6, 0xDEDA, 0x6339, 0xDEDB, 0x634B, 0xDEDC, 0x6343, + 0xDEDD, 0x63AD, 0xDEDE, 0x63F6, 0xDEDF, 0x6371, 0xDEE0, 0x637A, + 0xDEE1, 0x638E, 0xDEE2, 0x63B4, 0xDEE3, 0x636D, 0xDEE4, 0x63AC, + 0xDEE5, 0x638A, 0xDEE6, 0x6369, 0xDEE7, 0x63AE, 0xDEE8, 0x63BC, + 0xDEE9, 0x63F2, 0xDEEA, 0x63F8, 0xDEEB, 0x63E0, 0xDEEC, 0x63FF, + 0xDEED, 0x63C4, 0xDEEE, 0x63DE, 0xDEEF, 0x63CE, 0xDEF0, 0x6452, + 0xDEF1, 0x63C6, 0xDEF2, 0x63BE, 0xDEF3, 0x6445, 0xDEF4, 0x6441, + 0xDEF5, 0x640B, 0xDEF6, 0x641B, 0xDEF7, 0x6420, 0xDEF8, 0x640C, + 0xDEF9, 0x6426, 0xDEFA, 0x6421, 0xDEFB, 0x645E, 0xDEFC, 0x6484, + 0xDEFD, 0x646D, 0xDEFE, 0x6496, 0xDF40, 0x9019, 0xDF41, 0x901C, + 0xDF42, 0x9023, 0xDF43, 0x9024, 0xDF44, 0x9025, 0xDF45, 0x9027, + 0xDF46, 0x9028, 0xDF47, 0x9029, 0xDF48, 0x902A, 0xDF49, 0x902B, + 0xDF4A, 0x902C, 0xDF4B, 0x9030, 0xDF4C, 0x9031, 0xDF4D, 0x9032, + 0xDF4E, 0x9033, 0xDF4F, 0x9034, 0xDF50, 0x9037, 0xDF51, 0x9039, + 0xDF52, 0x903A, 0xDF53, 0x903D, 0xDF54, 0x903F, 0xDF55, 0x9040, + 0xDF56, 0x9043, 0xDF57, 0x9045, 0xDF58, 0x9046, 0xDF59, 0x9048, + 0xDF5A, 0x9049, 0xDF5B, 0x904A, 0xDF5C, 0x904B, 0xDF5D, 0x904C, + 0xDF5E, 0x904E, 0xDF5F, 0x9054, 0xDF60, 0x9055, 0xDF61, 0x9056, + 0xDF62, 0x9059, 0xDF63, 0x905A, 0xDF64, 0x905C, 0xDF65, 0x905D, + 0xDF66, 0x905E, 0xDF67, 0x905F, 0xDF68, 0x9060, 0xDF69, 0x9061, + 0xDF6A, 0x9064, 0xDF6B, 0x9066, 0xDF6C, 0x9067, 0xDF6D, 0x9069, + 0xDF6E, 0x906A, 0xDF6F, 0x906B, 0xDF70, 0x906C, 0xDF71, 0x906F, + 0xDF72, 0x9070, 0xDF73, 0x9071, 0xDF74, 0x9072, 0xDF75, 0x9073, + 0xDF76, 0x9076, 0xDF77, 0x9077, 0xDF78, 0x9078, 0xDF79, 0x9079, + 0xDF7A, 0x907A, 0xDF7B, 0x907B, 0xDF7C, 0x907C, 0xDF7D, 0x907E, + 0xDF7E, 0x9081, 0xDF80, 0x9084, 0xDF81, 0x9085, 0xDF82, 0x9086, + 0xDF83, 0x9087, 0xDF84, 0x9089, 0xDF85, 0x908A, 0xDF86, 0x908C, + 0xDF87, 0x908D, 0xDF88, 0x908E, 0xDF89, 0x908F, 0xDF8A, 0x9090, + 0xDF8B, 0x9092, 0xDF8C, 0x9094, 0xDF8D, 0x9096, 0xDF8E, 0x9098, + 0xDF8F, 0x909A, 0xDF90, 0x909C, 0xDF91, 0x909E, 0xDF92, 0x909F, + 0xDF93, 0x90A0, 0xDF94, 0x90A4, 0xDF95, 0x90A5, 0xDF96, 0x90A7, + 0xDF97, 0x90A8, 0xDF98, 0x90A9, 0xDF99, 0x90AB, 0xDF9A, 0x90AD, + 0xDF9B, 0x90B2, 0xDF9C, 0x90B7, 0xDF9D, 0x90BC, 0xDF9E, 0x90BD, + 0xDF9F, 0x90BF, 0xDFA0, 0x90C0, 0xDFA1, 0x647A, 0xDFA2, 0x64B7, + 0xDFA3, 0x64B8, 0xDFA4, 0x6499, 0xDFA5, 0x64BA, 0xDFA6, 0x64C0, + 0xDFA7, 0x64D0, 0xDFA8, 0x64D7, 0xDFA9, 0x64E4, 0xDFAA, 0x64E2, + 0xDFAB, 0x6509, 0xDFAC, 0x6525, 0xDFAD, 0x652E, 0xDFAE, 0x5F0B, + 0xDFAF, 0x5FD2, 0xDFB0, 0x7519, 0xDFB1, 0x5F11, 0xDFB2, 0x535F, + 0xDFB3, 0x53F1, 0xDFB4, 0x53FD, 0xDFB5, 0x53E9, 0xDFB6, 0x53E8, + 0xDFB7, 0x53FB, 0xDFB8, 0x5412, 0xDFB9, 0x5416, 0xDFBA, 0x5406, + 0xDFBB, 0x544B, 0xDFBC, 0x5452, 0xDFBD, 0x5453, 0xDFBE, 0x5454, + 0xDFBF, 0x5456, 0xDFC0, 0x5443, 0xDFC1, 0x5421, 0xDFC2, 0x5457, + 0xDFC3, 0x5459, 0xDFC4, 0x5423, 0xDFC5, 0x5432, 0xDFC6, 0x5482, + 0xDFC7, 0x5494, 0xDFC8, 0x5477, 0xDFC9, 0x5471, 0xDFCA, 0x5464, + 0xDFCB, 0x549A, 0xDFCC, 0x549B, 0xDFCD, 0x5484, 0xDFCE, 0x5476, + 0xDFCF, 0x5466, 0xDFD0, 0x549D, 0xDFD1, 0x54D0, 0xDFD2, 0x54AD, + 0xDFD3, 0x54C2, 0xDFD4, 0x54B4, 0xDFD5, 0x54D2, 0xDFD6, 0x54A7, + 0xDFD7, 0x54A6, 0xDFD8, 0x54D3, 0xDFD9, 0x54D4, 0xDFDA, 0x5472, + 0xDFDB, 0x54A3, 0xDFDC, 0x54D5, 0xDFDD, 0x54BB, 0xDFDE, 0x54BF, + 0xDFDF, 0x54CC, 0xDFE0, 0x54D9, 0xDFE1, 0x54DA, 0xDFE2, 0x54DC, + 0xDFE3, 0x54A9, 0xDFE4, 0x54AA, 0xDFE5, 0x54A4, 0xDFE6, 0x54DD, + 0xDFE7, 0x54CF, 0xDFE8, 0x54DE, 0xDFE9, 0x551B, 0xDFEA, 0x54E7, + 0xDFEB, 0x5520, 0xDFEC, 0x54FD, 0xDFED, 0x5514, 0xDFEE, 0x54F3, + 0xDFEF, 0x5522, 0xDFF0, 0x5523, 0xDFF1, 0x550F, 0xDFF2, 0x5511, + 0xDFF3, 0x5527, 0xDFF4, 0x552A, 0xDFF5, 0x5567, 0xDFF6, 0x558F, + 0xDFF7, 0x55B5, 0xDFF8, 0x5549, 0xDFF9, 0x556D, 0xDFFA, 0x5541, + 0xDFFB, 0x5555, 0xDFFC, 0x553F, 0xDFFD, 0x5550, 0xDFFE, 0x553C, + 0xE040, 0x90C2, 0xE041, 0x90C3, 0xE042, 0x90C6, 0xE043, 0x90C8, + 0xE044, 0x90C9, 0xE045, 0x90CB, 0xE046, 0x90CC, 0xE047, 0x90CD, + 0xE048, 0x90D2, 0xE049, 0x90D4, 0xE04A, 0x90D5, 0xE04B, 0x90D6, + 0xE04C, 0x90D8, 0xE04D, 0x90D9, 0xE04E, 0x90DA, 0xE04F, 0x90DE, + 0xE050, 0x90DF, 0xE051, 0x90E0, 0xE052, 0x90E3, 0xE053, 0x90E4, + 0xE054, 0x90E5, 0xE055, 0x90E9, 0xE056, 0x90EA, 0xE057, 0x90EC, + 0xE058, 0x90EE, 0xE059, 0x90F0, 0xE05A, 0x90F1, 0xE05B, 0x90F2, + 0xE05C, 0x90F3, 0xE05D, 0x90F5, 0xE05E, 0x90F6, 0xE05F, 0x90F7, + 0xE060, 0x90F9, 0xE061, 0x90FA, 0xE062, 0x90FB, 0xE063, 0x90FC, + 0xE064, 0x90FF, 0xE065, 0x9100, 0xE066, 0x9101, 0xE067, 0x9103, + 0xE068, 0x9105, 0xE069, 0x9106, 0xE06A, 0x9107, 0xE06B, 0x9108, + 0xE06C, 0x9109, 0xE06D, 0x910A, 0xE06E, 0x910B, 0xE06F, 0x910C, + 0xE070, 0x910D, 0xE071, 0x910E, 0xE072, 0x910F, 0xE073, 0x9110, + 0xE074, 0x9111, 0xE075, 0x9112, 0xE076, 0x9113, 0xE077, 0x9114, + 0xE078, 0x9115, 0xE079, 0x9116, 0xE07A, 0x9117, 0xE07B, 0x9118, + 0xE07C, 0x911A, 0xE07D, 0x911B, 0xE07E, 0x911C, 0xE080, 0x911D, + 0xE081, 0x911F, 0xE082, 0x9120, 0xE083, 0x9121, 0xE084, 0x9124, + 0xE085, 0x9125, 0xE086, 0x9126, 0xE087, 0x9127, 0xE088, 0x9128, + 0xE089, 0x9129, 0xE08A, 0x912A, 0xE08B, 0x912B, 0xE08C, 0x912C, + 0xE08D, 0x912D, 0xE08E, 0x912E, 0xE08F, 0x9130, 0xE090, 0x9132, + 0xE091, 0x9133, 0xE092, 0x9134, 0xE093, 0x9135, 0xE094, 0x9136, + 0xE095, 0x9137, 0xE096, 0x9138, 0xE097, 0x913A, 0xE098, 0x913B, + 0xE099, 0x913C, 0xE09A, 0x913D, 0xE09B, 0x913E, 0xE09C, 0x913F, + 0xE09D, 0x9140, 0xE09E, 0x9141, 0xE09F, 0x9142, 0xE0A0, 0x9144, + 0xE0A1, 0x5537, 0xE0A2, 0x5556, 0xE0A3, 0x5575, 0xE0A4, 0x5576, + 0xE0A5, 0x5577, 0xE0A6, 0x5533, 0xE0A7, 0x5530, 0xE0A8, 0x555C, + 0xE0A9, 0x558B, 0xE0AA, 0x55D2, 0xE0AB, 0x5583, 0xE0AC, 0x55B1, + 0xE0AD, 0x55B9, 0xE0AE, 0x5588, 0xE0AF, 0x5581, 0xE0B0, 0x559F, + 0xE0B1, 0x557E, 0xE0B2, 0x55D6, 0xE0B3, 0x5591, 0xE0B4, 0x557B, + 0xE0B5, 0x55DF, 0xE0B6, 0x55BD, 0xE0B7, 0x55BE, 0xE0B8, 0x5594, + 0xE0B9, 0x5599, 0xE0BA, 0x55EA, 0xE0BB, 0x55F7, 0xE0BC, 0x55C9, + 0xE0BD, 0x561F, 0xE0BE, 0x55D1, 0xE0BF, 0x55EB, 0xE0C0, 0x55EC, + 0xE0C1, 0x55D4, 0xE0C2, 0x55E6, 0xE0C3, 0x55DD, 0xE0C4, 0x55C4, + 0xE0C5, 0x55EF, 0xE0C6, 0x55E5, 0xE0C7, 0x55F2, 0xE0C8, 0x55F3, + 0xE0C9, 0x55CC, 0xE0CA, 0x55CD, 0xE0CB, 0x55E8, 0xE0CC, 0x55F5, + 0xE0CD, 0x55E4, 0xE0CE, 0x8F94, 0xE0CF, 0x561E, 0xE0D0, 0x5608, + 0xE0D1, 0x560C, 0xE0D2, 0x5601, 0xE0D3, 0x5624, 0xE0D4, 0x5623, + 0xE0D5, 0x55FE, 0xE0D6, 0x5600, 0xE0D7, 0x5627, 0xE0D8, 0x562D, + 0xE0D9, 0x5658, 0xE0DA, 0x5639, 0xE0DB, 0x5657, 0xE0DC, 0x562C, + 0xE0DD, 0x564D, 0xE0DE, 0x5662, 0xE0DF, 0x5659, 0xE0E0, 0x565C, + 0xE0E1, 0x564C, 0xE0E2, 0x5654, 0xE0E3, 0x5686, 0xE0E4, 0x5664, + 0xE0E5, 0x5671, 0xE0E6, 0x566B, 0xE0E7, 0x567B, 0xE0E8, 0x567C, + 0xE0E9, 0x5685, 0xE0EA, 0x5693, 0xE0EB, 0x56AF, 0xE0EC, 0x56D4, + 0xE0ED, 0x56D7, 0xE0EE, 0x56DD, 0xE0EF, 0x56E1, 0xE0F0, 0x56F5, + 0xE0F1, 0x56EB, 0xE0F2, 0x56F9, 0xE0F3, 0x56FF, 0xE0F4, 0x5704, + 0xE0F5, 0x570A, 0xE0F6, 0x5709, 0xE0F7, 0x571C, 0xE0F8, 0x5E0F, + 0xE0F9, 0x5E19, 0xE0FA, 0x5E14, 0xE0FB, 0x5E11, 0xE0FC, 0x5E31, + 0xE0FD, 0x5E3B, 0xE0FE, 0x5E3C, 0xE140, 0x9145, 0xE141, 0x9147, + 0xE142, 0x9148, 0xE143, 0x9151, 0xE144, 0x9153, 0xE145, 0x9154, + 0xE146, 0x9155, 0xE147, 0x9156, 0xE148, 0x9158, 0xE149, 0x9159, + 0xE14A, 0x915B, 0xE14B, 0x915C, 0xE14C, 0x915F, 0xE14D, 0x9160, + 0xE14E, 0x9166, 0xE14F, 0x9167, 0xE150, 0x9168, 0xE151, 0x916B, + 0xE152, 0x916D, 0xE153, 0x9173, 0xE154, 0x917A, 0xE155, 0x917B, + 0xE156, 0x917C, 0xE157, 0x9180, 0xE158, 0x9181, 0xE159, 0x9182, + 0xE15A, 0x9183, 0xE15B, 0x9184, 0xE15C, 0x9186, 0xE15D, 0x9188, + 0xE15E, 0x918A, 0xE15F, 0x918E, 0xE160, 0x918F, 0xE161, 0x9193, + 0xE162, 0x9194, 0xE163, 0x9195, 0xE164, 0x9196, 0xE165, 0x9197, + 0xE166, 0x9198, 0xE167, 0x9199, 0xE168, 0x919C, 0xE169, 0x919D, + 0xE16A, 0x919E, 0xE16B, 0x919F, 0xE16C, 0x91A0, 0xE16D, 0x91A1, + 0xE16E, 0x91A4, 0xE16F, 0x91A5, 0xE170, 0x91A6, 0xE171, 0x91A7, + 0xE172, 0x91A8, 0xE173, 0x91A9, 0xE174, 0x91AB, 0xE175, 0x91AC, + 0xE176, 0x91B0, 0xE177, 0x91B1, 0xE178, 0x91B2, 0xE179, 0x91B3, + 0xE17A, 0x91B6, 0xE17B, 0x91B7, 0xE17C, 0x91B8, 0xE17D, 0x91B9, + 0xE17E, 0x91BB, 0xE180, 0x91BC, 0xE181, 0x91BD, 0xE182, 0x91BE, + 0xE183, 0x91BF, 0xE184, 0x91C0, 0xE185, 0x91C1, 0xE186, 0x91C2, + 0xE187, 0x91C3, 0xE188, 0x91C4, 0xE189, 0x91C5, 0xE18A, 0x91C6, + 0xE18B, 0x91C8, 0xE18C, 0x91CB, 0xE18D, 0x91D0, 0xE18E, 0x91D2, + 0xE18F, 0x91D3, 0xE190, 0x91D4, 0xE191, 0x91D5, 0xE192, 0x91D6, + 0xE193, 0x91D7, 0xE194, 0x91D8, 0xE195, 0x91D9, 0xE196, 0x91DA, + 0xE197, 0x91DB, 0xE198, 0x91DD, 0xE199, 0x91DE, 0xE19A, 0x91DF, + 0xE19B, 0x91E0, 0xE19C, 0x91E1, 0xE19D, 0x91E2, 0xE19E, 0x91E3, + 0xE19F, 0x91E4, 0xE1A0, 0x91E5, 0xE1A1, 0x5E37, 0xE1A2, 0x5E44, + 0xE1A3, 0x5E54, 0xE1A4, 0x5E5B, 0xE1A5, 0x5E5E, 0xE1A6, 0x5E61, + 0xE1A7, 0x5C8C, 0xE1A8, 0x5C7A, 0xE1A9, 0x5C8D, 0xE1AA, 0x5C90, + 0xE1AB, 0x5C96, 0xE1AC, 0x5C88, 0xE1AD, 0x5C98, 0xE1AE, 0x5C99, + 0xE1AF, 0x5C91, 0xE1B0, 0x5C9A, 0xE1B1, 0x5C9C, 0xE1B2, 0x5CB5, + 0xE1B3, 0x5CA2, 0xE1B4, 0x5CBD, 0xE1B5, 0x5CAC, 0xE1B6, 0x5CAB, + 0xE1B7, 0x5CB1, 0xE1B8, 0x5CA3, 0xE1B9, 0x5CC1, 0xE1BA, 0x5CB7, + 0xE1BB, 0x5CC4, 0xE1BC, 0x5CD2, 0xE1BD, 0x5CE4, 0xE1BE, 0x5CCB, + 0xE1BF, 0x5CE5, 0xE1C0, 0x5D02, 0xE1C1, 0x5D03, 0xE1C2, 0x5D27, + 0xE1C3, 0x5D26, 0xE1C4, 0x5D2E, 0xE1C5, 0x5D24, 0xE1C6, 0x5D1E, + 0xE1C7, 0x5D06, 0xE1C8, 0x5D1B, 0xE1C9, 0x5D58, 0xE1CA, 0x5D3E, + 0xE1CB, 0x5D34, 0xE1CC, 0x5D3D, 0xE1CD, 0x5D6C, 0xE1CE, 0x5D5B, + 0xE1CF, 0x5D6F, 0xE1D0, 0x5D5D, 0xE1D1, 0x5D6B, 0xE1D2, 0x5D4B, + 0xE1D3, 0x5D4A, 0xE1D4, 0x5D69, 0xE1D5, 0x5D74, 0xE1D6, 0x5D82, + 0xE1D7, 0x5D99, 0xE1D8, 0x5D9D, 0xE1D9, 0x8C73, 0xE1DA, 0x5DB7, + 0xE1DB, 0x5DC5, 0xE1DC, 0x5F73, 0xE1DD, 0x5F77, 0xE1DE, 0x5F82, + 0xE1DF, 0x5F87, 0xE1E0, 0x5F89, 0xE1E1, 0x5F8C, 0xE1E2, 0x5F95, + 0xE1E3, 0x5F99, 0xE1E4, 0x5F9C, 0xE1E5, 0x5FA8, 0xE1E6, 0x5FAD, + 0xE1E7, 0x5FB5, 0xE1E8, 0x5FBC, 0xE1E9, 0x8862, 0xE1EA, 0x5F61, + 0xE1EB, 0x72AD, 0xE1EC, 0x72B0, 0xE1ED, 0x72B4, 0xE1EE, 0x72B7, + 0xE1EF, 0x72B8, 0xE1F0, 0x72C3, 0xE1F1, 0x72C1, 0xE1F2, 0x72CE, + 0xE1F3, 0x72CD, 0xE1F4, 0x72D2, 0xE1F5, 0x72E8, 0xE1F6, 0x72EF, + 0xE1F7, 0x72E9, 0xE1F8, 0x72F2, 0xE1F9, 0x72F4, 0xE1FA, 0x72F7, + 0xE1FB, 0x7301, 0xE1FC, 0x72F3, 0xE1FD, 0x7303, 0xE1FE, 0x72FA, + 0xE240, 0x91E6, 0xE241, 0x91E7, 0xE242, 0x91E8, 0xE243, 0x91E9, + 0xE244, 0x91EA, 0xE245, 0x91EB, 0xE246, 0x91EC, 0xE247, 0x91ED, + 0xE248, 0x91EE, 0xE249, 0x91EF, 0xE24A, 0x91F0, 0xE24B, 0x91F1, + 0xE24C, 0x91F2, 0xE24D, 0x91F3, 0xE24E, 0x91F4, 0xE24F, 0x91F5, + 0xE250, 0x91F6, 0xE251, 0x91F7, 0xE252, 0x91F8, 0xE253, 0x91F9, + 0xE254, 0x91FA, 0xE255, 0x91FB, 0xE256, 0x91FC, 0xE257, 0x91FD, + 0xE258, 0x91FE, 0xE259, 0x91FF, 0xE25A, 0x9200, 0xE25B, 0x9201, + 0xE25C, 0x9202, 0xE25D, 0x9203, 0xE25E, 0x9204, 0xE25F, 0x9205, + 0xE260, 0x9206, 0xE261, 0x9207, 0xE262, 0x9208, 0xE263, 0x9209, + 0xE264, 0x920A, 0xE265, 0x920B, 0xE266, 0x920C, 0xE267, 0x920D, + 0xE268, 0x920E, 0xE269, 0x920F, 0xE26A, 0x9210, 0xE26B, 0x9211, + 0xE26C, 0x9212, 0xE26D, 0x9213, 0xE26E, 0x9214, 0xE26F, 0x9215, + 0xE270, 0x9216, 0xE271, 0x9217, 0xE272, 0x9218, 0xE273, 0x9219, + 0xE274, 0x921A, 0xE275, 0x921B, 0xE276, 0x921C, 0xE277, 0x921D, + 0xE278, 0x921E, 0xE279, 0x921F, 0xE27A, 0x9220, 0xE27B, 0x9221, + 0xE27C, 0x9222, 0xE27D, 0x9223, 0xE27E, 0x9224, 0xE280, 0x9225, + 0xE281, 0x9226, 0xE282, 0x9227, 0xE283, 0x9228, 0xE284, 0x9229, + 0xE285, 0x922A, 0xE286, 0x922B, 0xE287, 0x922C, 0xE288, 0x922D, + 0xE289, 0x922E, 0xE28A, 0x922F, 0xE28B, 0x9230, 0xE28C, 0x9231, + 0xE28D, 0x9232, 0xE28E, 0x9233, 0xE28F, 0x9234, 0xE290, 0x9235, + 0xE291, 0x9236, 0xE292, 0x9237, 0xE293, 0x9238, 0xE294, 0x9239, + 0xE295, 0x923A, 0xE296, 0x923B, 0xE297, 0x923C, 0xE298, 0x923D, + 0xE299, 0x923E, 0xE29A, 0x923F, 0xE29B, 0x9240, 0xE29C, 0x9241, + 0xE29D, 0x9242, 0xE29E, 0x9243, 0xE29F, 0x9244, 0xE2A0, 0x9245, + 0xE2A1, 0x72FB, 0xE2A2, 0x7317, 0xE2A3, 0x7313, 0xE2A4, 0x7321, + 0xE2A5, 0x730A, 0xE2A6, 0x731E, 0xE2A7, 0x731D, 0xE2A8, 0x7315, + 0xE2A9, 0x7322, 0xE2AA, 0x7339, 0xE2AB, 0x7325, 0xE2AC, 0x732C, + 0xE2AD, 0x7338, 0xE2AE, 0x7331, 0xE2AF, 0x7350, 0xE2B0, 0x734D, + 0xE2B1, 0x7357, 0xE2B2, 0x7360, 0xE2B3, 0x736C, 0xE2B4, 0x736F, + 0xE2B5, 0x737E, 0xE2B6, 0x821B, 0xE2B7, 0x5925, 0xE2B8, 0x98E7, + 0xE2B9, 0x5924, 0xE2BA, 0x5902, 0xE2BB, 0x9963, 0xE2BC, 0x9967, + 0xE2BD, 0x9968, 0xE2BE, 0x9969, 0xE2BF, 0x996A, 0xE2C0, 0x996B, + 0xE2C1, 0x996C, 0xE2C2, 0x9974, 0xE2C3, 0x9977, 0xE2C4, 0x997D, + 0xE2C5, 0x9980, 0xE2C6, 0x9984, 0xE2C7, 0x9987, 0xE2C8, 0x998A, + 0xE2C9, 0x998D, 0xE2CA, 0x9990, 0xE2CB, 0x9991, 0xE2CC, 0x9993, + 0xE2CD, 0x9994, 0xE2CE, 0x9995, 0xE2CF, 0x5E80, 0xE2D0, 0x5E91, + 0xE2D1, 0x5E8B, 0xE2D2, 0x5E96, 0xE2D3, 0x5EA5, 0xE2D4, 0x5EA0, + 0xE2D5, 0x5EB9, 0xE2D6, 0x5EB5, 0xE2D7, 0x5EBE, 0xE2D8, 0x5EB3, + 0xE2D9, 0x8D53, 0xE2DA, 0x5ED2, 0xE2DB, 0x5ED1, 0xE2DC, 0x5EDB, + 0xE2DD, 0x5EE8, 0xE2DE, 0x5EEA, 0xE2DF, 0x81BA, 0xE2E0, 0x5FC4, + 0xE2E1, 0x5FC9, 0xE2E2, 0x5FD6, 0xE2E3, 0x5FCF, 0xE2E4, 0x6003, + 0xE2E5, 0x5FEE, 0xE2E6, 0x6004, 0xE2E7, 0x5FE1, 0xE2E8, 0x5FE4, + 0xE2E9, 0x5FFE, 0xE2EA, 0x6005, 0xE2EB, 0x6006, 0xE2EC, 0x5FEA, + 0xE2ED, 0x5FED, 0xE2EE, 0x5FF8, 0xE2EF, 0x6019, 0xE2F0, 0x6035, + 0xE2F1, 0x6026, 0xE2F2, 0x601B, 0xE2F3, 0x600F, 0xE2F4, 0x600D, + 0xE2F5, 0x6029, 0xE2F6, 0x602B, 0xE2F7, 0x600A, 0xE2F8, 0x603F, + 0xE2F9, 0x6021, 0xE2FA, 0x6078, 0xE2FB, 0x6079, 0xE2FC, 0x607B, + 0xE2FD, 0x607A, 0xE2FE, 0x6042, 0xE340, 0x9246, 0xE341, 0x9247, + 0xE342, 0x9248, 0xE343, 0x9249, 0xE344, 0x924A, 0xE345, 0x924B, + 0xE346, 0x924C, 0xE347, 0x924D, 0xE348, 0x924E, 0xE349, 0x924F, + 0xE34A, 0x9250, 0xE34B, 0x9251, 0xE34C, 0x9252, 0xE34D, 0x9253, + 0xE34E, 0x9254, 0xE34F, 0x9255, 0xE350, 0x9256, 0xE351, 0x9257, + 0xE352, 0x9258, 0xE353, 0x9259, 0xE354, 0x925A, 0xE355, 0x925B, + 0xE356, 0x925C, 0xE357, 0x925D, 0xE358, 0x925E, 0xE359, 0x925F, + 0xE35A, 0x9260, 0xE35B, 0x9261, 0xE35C, 0x9262, 0xE35D, 0x9263, + 0xE35E, 0x9264, 0xE35F, 0x9265, 0xE360, 0x9266, 0xE361, 0x9267, + 0xE362, 0x9268, 0xE363, 0x9269, 0xE364, 0x926A, 0xE365, 0x926B, + 0xE366, 0x926C, 0xE367, 0x926D, 0xE368, 0x926E, 0xE369, 0x926F, + 0xE36A, 0x9270, 0xE36B, 0x9271, 0xE36C, 0x9272, 0xE36D, 0x9273, + 0xE36E, 0x9275, 0xE36F, 0x9276, 0xE370, 0x9277, 0xE371, 0x9278, + 0xE372, 0x9279, 0xE373, 0x927A, 0xE374, 0x927B, 0xE375, 0x927C, + 0xE376, 0x927D, 0xE377, 0x927E, 0xE378, 0x927F, 0xE379, 0x9280, + 0xE37A, 0x9281, 0xE37B, 0x9282, 0xE37C, 0x9283, 0xE37D, 0x9284, + 0xE37E, 0x9285, 0xE380, 0x9286, 0xE381, 0x9287, 0xE382, 0x9288, + 0xE383, 0x9289, 0xE384, 0x928A, 0xE385, 0x928B, 0xE386, 0x928C, + 0xE387, 0x928D, 0xE388, 0x928F, 0xE389, 0x9290, 0xE38A, 0x9291, + 0xE38B, 0x9292, 0xE38C, 0x9293, 0xE38D, 0x9294, 0xE38E, 0x9295, + 0xE38F, 0x9296, 0xE390, 0x9297, 0xE391, 0x9298, 0xE392, 0x9299, + 0xE393, 0x929A, 0xE394, 0x929B, 0xE395, 0x929C, 0xE396, 0x929D, + 0xE397, 0x929E, 0xE398, 0x929F, 0xE399, 0x92A0, 0xE39A, 0x92A1, + 0xE39B, 0x92A2, 0xE39C, 0x92A3, 0xE39D, 0x92A4, 0xE39E, 0x92A5, + 0xE39F, 0x92A6, 0xE3A0, 0x92A7, 0xE3A1, 0x606A, 0xE3A2, 0x607D, + 0xE3A3, 0x6096, 0xE3A4, 0x609A, 0xE3A5, 0x60AD, 0xE3A6, 0x609D, + 0xE3A7, 0x6083, 0xE3A8, 0x6092, 0xE3A9, 0x608C, 0xE3AA, 0x609B, + 0xE3AB, 0x60EC, 0xE3AC, 0x60BB, 0xE3AD, 0x60B1, 0xE3AE, 0x60DD, + 0xE3AF, 0x60D8, 0xE3B0, 0x60C6, 0xE3B1, 0x60DA, 0xE3B2, 0x60B4, + 0xE3B3, 0x6120, 0xE3B4, 0x6126, 0xE3B5, 0x6115, 0xE3B6, 0x6123, + 0xE3B7, 0x60F4, 0xE3B8, 0x6100, 0xE3B9, 0x610E, 0xE3BA, 0x612B, + 0xE3BB, 0x614A, 0xE3BC, 0x6175, 0xE3BD, 0x61AC, 0xE3BE, 0x6194, + 0xE3BF, 0x61A7, 0xE3C0, 0x61B7, 0xE3C1, 0x61D4, 0xE3C2, 0x61F5, + 0xE3C3, 0x5FDD, 0xE3C4, 0x96B3, 0xE3C5, 0x95E9, 0xE3C6, 0x95EB, + 0xE3C7, 0x95F1, 0xE3C8, 0x95F3, 0xE3C9, 0x95F5, 0xE3CA, 0x95F6, + 0xE3CB, 0x95FC, 0xE3CC, 0x95FE, 0xE3CD, 0x9603, 0xE3CE, 0x9604, + 0xE3CF, 0x9606, 0xE3D0, 0x9608, 0xE3D1, 0x960A, 0xE3D2, 0x960B, + 0xE3D3, 0x960C, 0xE3D4, 0x960D, 0xE3D5, 0x960F, 0xE3D6, 0x9612, + 0xE3D7, 0x9615, 0xE3D8, 0x9616, 0xE3D9, 0x9617, 0xE3DA, 0x9619, + 0xE3DB, 0x961A, 0xE3DC, 0x4E2C, 0xE3DD, 0x723F, 0xE3DE, 0x6215, + 0xE3DF, 0x6C35, 0xE3E0, 0x6C54, 0xE3E1, 0x6C5C, 0xE3E2, 0x6C4A, + 0xE3E3, 0x6CA3, 0xE3E4, 0x6C85, 0xE3E5, 0x6C90, 0xE3E6, 0x6C94, + 0xE3E7, 0x6C8C, 0xE3E8, 0x6C68, 0xE3E9, 0x6C69, 0xE3EA, 0x6C74, + 0xE3EB, 0x6C76, 0xE3EC, 0x6C86, 0xE3ED, 0x6CA9, 0xE3EE, 0x6CD0, + 0xE3EF, 0x6CD4, 0xE3F0, 0x6CAD, 0xE3F1, 0x6CF7, 0xE3F2, 0x6CF8, + 0xE3F3, 0x6CF1, 0xE3F4, 0x6CD7, 0xE3F5, 0x6CB2, 0xE3F6, 0x6CE0, + 0xE3F7, 0x6CD6, 0xE3F8, 0x6CFA, 0xE3F9, 0x6CEB, 0xE3FA, 0x6CEE, + 0xE3FB, 0x6CB1, 0xE3FC, 0x6CD3, 0xE3FD, 0x6CEF, 0xE3FE, 0x6CFE, + 0xE440, 0x92A8, 0xE441, 0x92A9, 0xE442, 0x92AA, 0xE443, 0x92AB, + 0xE444, 0x92AC, 0xE445, 0x92AD, 0xE446, 0x92AF, 0xE447, 0x92B0, + 0xE448, 0x92B1, 0xE449, 0x92B2, 0xE44A, 0x92B3, 0xE44B, 0x92B4, + 0xE44C, 0x92B5, 0xE44D, 0x92B6, 0xE44E, 0x92B7, 0xE44F, 0x92B8, + 0xE450, 0x92B9, 0xE451, 0x92BA, 0xE452, 0x92BB, 0xE453, 0x92BC, + 0xE454, 0x92BD, 0xE455, 0x92BE, 0xE456, 0x92BF, 0xE457, 0x92C0, + 0xE458, 0x92C1, 0xE459, 0x92C2, 0xE45A, 0x92C3, 0xE45B, 0x92C4, + 0xE45C, 0x92C5, 0xE45D, 0x92C6, 0xE45E, 0x92C7, 0xE45F, 0x92C9, + 0xE460, 0x92CA, 0xE461, 0x92CB, 0xE462, 0x92CC, 0xE463, 0x92CD, + 0xE464, 0x92CE, 0xE465, 0x92CF, 0xE466, 0x92D0, 0xE467, 0x92D1, + 0xE468, 0x92D2, 0xE469, 0x92D3, 0xE46A, 0x92D4, 0xE46B, 0x92D5, + 0xE46C, 0x92D6, 0xE46D, 0x92D7, 0xE46E, 0x92D8, 0xE46F, 0x92D9, + 0xE470, 0x92DA, 0xE471, 0x92DB, 0xE472, 0x92DC, 0xE473, 0x92DD, + 0xE474, 0x92DE, 0xE475, 0x92DF, 0xE476, 0x92E0, 0xE477, 0x92E1, + 0xE478, 0x92E2, 0xE479, 0x92E3, 0xE47A, 0x92E4, 0xE47B, 0x92E5, + 0xE47C, 0x92E6, 0xE47D, 0x92E7, 0xE47E, 0x92E8, 0xE480, 0x92E9, + 0xE481, 0x92EA, 0xE482, 0x92EB, 0xE483, 0x92EC, 0xE484, 0x92ED, + 0xE485, 0x92EE, 0xE486, 0x92EF, 0xE487, 0x92F0, 0xE488, 0x92F1, + 0xE489, 0x92F2, 0xE48A, 0x92F3, 0xE48B, 0x92F4, 0xE48C, 0x92F5, + 0xE48D, 0x92F6, 0xE48E, 0x92F7, 0xE48F, 0x92F8, 0xE490, 0x92F9, + 0xE491, 0x92FA, 0xE492, 0x92FB, 0xE493, 0x92FC, 0xE494, 0x92FD, + 0xE495, 0x92FE, 0xE496, 0x92FF, 0xE497, 0x9300, 0xE498, 0x9301, + 0xE499, 0x9302, 0xE49A, 0x9303, 0xE49B, 0x9304, 0xE49C, 0x9305, + 0xE49D, 0x9306, 0xE49E, 0x9307, 0xE49F, 0x9308, 0xE4A0, 0x9309, + 0xE4A1, 0x6D39, 0xE4A2, 0x6D27, 0xE4A3, 0x6D0C, 0xE4A4, 0x6D43, + 0xE4A5, 0x6D48, 0xE4A6, 0x6D07, 0xE4A7, 0x6D04, 0xE4A8, 0x6D19, + 0xE4A9, 0x6D0E, 0xE4AA, 0x6D2B, 0xE4AB, 0x6D4D, 0xE4AC, 0x6D2E, + 0xE4AD, 0x6D35, 0xE4AE, 0x6D1A, 0xE4AF, 0x6D4F, 0xE4B0, 0x6D52, + 0xE4B1, 0x6D54, 0xE4B2, 0x6D33, 0xE4B3, 0x6D91, 0xE4B4, 0x6D6F, + 0xE4B5, 0x6D9E, 0xE4B6, 0x6DA0, 0xE4B7, 0x6D5E, 0xE4B8, 0x6D93, + 0xE4B9, 0x6D94, 0xE4BA, 0x6D5C, 0xE4BB, 0x6D60, 0xE4BC, 0x6D7C, + 0xE4BD, 0x6D63, 0xE4BE, 0x6E1A, 0xE4BF, 0x6DC7, 0xE4C0, 0x6DC5, + 0xE4C1, 0x6DDE, 0xE4C2, 0x6E0E, 0xE4C3, 0x6DBF, 0xE4C4, 0x6DE0, + 0xE4C5, 0x6E11, 0xE4C6, 0x6DE6, 0xE4C7, 0x6DDD, 0xE4C8, 0x6DD9, + 0xE4C9, 0x6E16, 0xE4CA, 0x6DAB, 0xE4CB, 0x6E0C, 0xE4CC, 0x6DAE, + 0xE4CD, 0x6E2B, 0xE4CE, 0x6E6E, 0xE4CF, 0x6E4E, 0xE4D0, 0x6E6B, + 0xE4D1, 0x6EB2, 0xE4D2, 0x6E5F, 0xE4D3, 0x6E86, 0xE4D4, 0x6E53, + 0xE4D5, 0x6E54, 0xE4D6, 0x6E32, 0xE4D7, 0x6E25, 0xE4D8, 0x6E44, + 0xE4D9, 0x6EDF, 0xE4DA, 0x6EB1, 0xE4DB, 0x6E98, 0xE4DC, 0x6EE0, + 0xE4DD, 0x6F2D, 0xE4DE, 0x6EE2, 0xE4DF, 0x6EA5, 0xE4E0, 0x6EA7, + 0xE4E1, 0x6EBD, 0xE4E2, 0x6EBB, 0xE4E3, 0x6EB7, 0xE4E4, 0x6ED7, + 0xE4E5, 0x6EB4, 0xE4E6, 0x6ECF, 0xE4E7, 0x6E8F, 0xE4E8, 0x6EC2, + 0xE4E9, 0x6E9F, 0xE4EA, 0x6F62, 0xE4EB, 0x6F46, 0xE4EC, 0x6F47, + 0xE4ED, 0x6F24, 0xE4EE, 0x6F15, 0xE4EF, 0x6EF9, 0xE4F0, 0x6F2F, + 0xE4F1, 0x6F36, 0xE4F2, 0x6F4B, 0xE4F3, 0x6F74, 0xE4F4, 0x6F2A, + 0xE4F5, 0x6F09, 0xE4F6, 0x6F29, 0xE4F7, 0x6F89, 0xE4F8, 0x6F8D, + 0xE4F9, 0x6F8C, 0xE4FA, 0x6F78, 0xE4FB, 0x6F72, 0xE4FC, 0x6F7C, + 0xE4FD, 0x6F7A, 0xE4FE, 0x6FD1, 0xE540, 0x930A, 0xE541, 0x930B, + 0xE542, 0x930C, 0xE543, 0x930D, 0xE544, 0x930E, 0xE545, 0x930F, + 0xE546, 0x9310, 0xE547, 0x9311, 0xE548, 0x9312, 0xE549, 0x9313, + 0xE54A, 0x9314, 0xE54B, 0x9315, 0xE54C, 0x9316, 0xE54D, 0x9317, + 0xE54E, 0x9318, 0xE54F, 0x9319, 0xE550, 0x931A, 0xE551, 0x931B, + 0xE552, 0x931C, 0xE553, 0x931D, 0xE554, 0x931E, 0xE555, 0x931F, + 0xE556, 0x9320, 0xE557, 0x9321, 0xE558, 0x9322, 0xE559, 0x9323, + 0xE55A, 0x9324, 0xE55B, 0x9325, 0xE55C, 0x9326, 0xE55D, 0x9327, + 0xE55E, 0x9328, 0xE55F, 0x9329, 0xE560, 0x932A, 0xE561, 0x932B, + 0xE562, 0x932C, 0xE563, 0x932D, 0xE564, 0x932E, 0xE565, 0x932F, + 0xE566, 0x9330, 0xE567, 0x9331, 0xE568, 0x9332, 0xE569, 0x9333, + 0xE56A, 0x9334, 0xE56B, 0x9335, 0xE56C, 0x9336, 0xE56D, 0x9337, + 0xE56E, 0x9338, 0xE56F, 0x9339, 0xE570, 0x933A, 0xE571, 0x933B, + 0xE572, 0x933C, 0xE573, 0x933D, 0xE574, 0x933F, 0xE575, 0x9340, + 0xE576, 0x9341, 0xE577, 0x9342, 0xE578, 0x9343, 0xE579, 0x9344, + 0xE57A, 0x9345, 0xE57B, 0x9346, 0xE57C, 0x9347, 0xE57D, 0x9348, + 0xE57E, 0x9349, 0xE580, 0x934A, 0xE581, 0x934B, 0xE582, 0x934C, + 0xE583, 0x934D, 0xE584, 0x934E, 0xE585, 0x934F, 0xE586, 0x9350, + 0xE587, 0x9351, 0xE588, 0x9352, 0xE589, 0x9353, 0xE58A, 0x9354, + 0xE58B, 0x9355, 0xE58C, 0x9356, 0xE58D, 0x9357, 0xE58E, 0x9358, + 0xE58F, 0x9359, 0xE590, 0x935A, 0xE591, 0x935B, 0xE592, 0x935C, + 0xE593, 0x935D, 0xE594, 0x935E, 0xE595, 0x935F, 0xE596, 0x9360, + 0xE597, 0x9361, 0xE598, 0x9362, 0xE599, 0x9363, 0xE59A, 0x9364, + 0xE59B, 0x9365, 0xE59C, 0x9366, 0xE59D, 0x9367, 0xE59E, 0x9368, + 0xE59F, 0x9369, 0xE5A0, 0x936B, 0xE5A1, 0x6FC9, 0xE5A2, 0x6FA7, + 0xE5A3, 0x6FB9, 0xE5A4, 0x6FB6, 0xE5A5, 0x6FC2, 0xE5A6, 0x6FE1, + 0xE5A7, 0x6FEE, 0xE5A8, 0x6FDE, 0xE5A9, 0x6FE0, 0xE5AA, 0x6FEF, + 0xE5AB, 0x701A, 0xE5AC, 0x7023, 0xE5AD, 0x701B, 0xE5AE, 0x7039, + 0xE5AF, 0x7035, 0xE5B0, 0x704F, 0xE5B1, 0x705E, 0xE5B2, 0x5B80, + 0xE5B3, 0x5B84, 0xE5B4, 0x5B95, 0xE5B5, 0x5B93, 0xE5B6, 0x5BA5, + 0xE5B7, 0x5BB8, 0xE5B8, 0x752F, 0xE5B9, 0x9A9E, 0xE5BA, 0x6434, + 0xE5BB, 0x5BE4, 0xE5BC, 0x5BEE, 0xE5BD, 0x8930, 0xE5BE, 0x5BF0, + 0xE5BF, 0x8E47, 0xE5C0, 0x8B07, 0xE5C1, 0x8FB6, 0xE5C2, 0x8FD3, + 0xE5C3, 0x8FD5, 0xE5C4, 0x8FE5, 0xE5C5, 0x8FEE, 0xE5C6, 0x8FE4, + 0xE5C7, 0x8FE9, 0xE5C8, 0x8FE6, 0xE5C9, 0x8FF3, 0xE5CA, 0x8FE8, + 0xE5CB, 0x9005, 0xE5CC, 0x9004, 0xE5CD, 0x900B, 0xE5CE, 0x9026, + 0xE5CF, 0x9011, 0xE5D0, 0x900D, 0xE5D1, 0x9016, 0xE5D2, 0x9021, + 0xE5D3, 0x9035, 0xE5D4, 0x9036, 0xE5D5, 0x902D, 0xE5D6, 0x902F, + 0xE5D7, 0x9044, 0xE5D8, 0x9051, 0xE5D9, 0x9052, 0xE5DA, 0x9050, + 0xE5DB, 0x9068, 0xE5DC, 0x9058, 0xE5DD, 0x9062, 0xE5DE, 0x905B, + 0xE5DF, 0x66B9, 0xE5E0, 0x9074, 0xE5E1, 0x907D, 0xE5E2, 0x9082, + 0xE5E3, 0x9088, 0xE5E4, 0x9083, 0xE5E5, 0x908B, 0xE5E6, 0x5F50, + 0xE5E7, 0x5F57, 0xE5E8, 0x5F56, 0xE5E9, 0x5F58, 0xE5EA, 0x5C3B, + 0xE5EB, 0x54AB, 0xE5EC, 0x5C50, 0xE5ED, 0x5C59, 0xE5EE, 0x5B71, + 0xE5EF, 0x5C63, 0xE5F0, 0x5C66, 0xE5F1, 0x7FBC, 0xE5F2, 0x5F2A, + 0xE5F3, 0x5F29, 0xE5F4, 0x5F2D, 0xE5F5, 0x8274, 0xE5F6, 0x5F3C, + 0xE5F7, 0x9B3B, 0xE5F8, 0x5C6E, 0xE5F9, 0x5981, 0xE5FA, 0x5983, + 0xE5FB, 0x598D, 0xE5FC, 0x59A9, 0xE5FD, 0x59AA, 0xE5FE, 0x59A3, + 0xE640, 0x936C, 0xE641, 0x936D, 0xE642, 0x936E, 0xE643, 0x936F, + 0xE644, 0x9370, 0xE645, 0x9371, 0xE646, 0x9372, 0xE647, 0x9373, + 0xE648, 0x9374, 0xE649, 0x9375, 0xE64A, 0x9376, 0xE64B, 0x9377, + 0xE64C, 0x9378, 0xE64D, 0x9379, 0xE64E, 0x937A, 0xE64F, 0x937B, + 0xE650, 0x937C, 0xE651, 0x937D, 0xE652, 0x937E, 0xE653, 0x937F, + 0xE654, 0x9380, 0xE655, 0x9381, 0xE656, 0x9382, 0xE657, 0x9383, + 0xE658, 0x9384, 0xE659, 0x9385, 0xE65A, 0x9386, 0xE65B, 0x9387, + 0xE65C, 0x9388, 0xE65D, 0x9389, 0xE65E, 0x938A, 0xE65F, 0x938B, + 0xE660, 0x938C, 0xE661, 0x938D, 0xE662, 0x938E, 0xE663, 0x9390, + 0xE664, 0x9391, 0xE665, 0x9392, 0xE666, 0x9393, 0xE667, 0x9394, + 0xE668, 0x9395, 0xE669, 0x9396, 0xE66A, 0x9397, 0xE66B, 0x9398, + 0xE66C, 0x9399, 0xE66D, 0x939A, 0xE66E, 0x939B, 0xE66F, 0x939C, + 0xE670, 0x939D, 0xE671, 0x939E, 0xE672, 0x939F, 0xE673, 0x93A0, + 0xE674, 0x93A1, 0xE675, 0x93A2, 0xE676, 0x93A3, 0xE677, 0x93A4, + 0xE678, 0x93A5, 0xE679, 0x93A6, 0xE67A, 0x93A7, 0xE67B, 0x93A8, + 0xE67C, 0x93A9, 0xE67D, 0x93AA, 0xE67E, 0x93AB, 0xE680, 0x93AC, + 0xE681, 0x93AD, 0xE682, 0x93AE, 0xE683, 0x93AF, 0xE684, 0x93B0, + 0xE685, 0x93B1, 0xE686, 0x93B2, 0xE687, 0x93B3, 0xE688, 0x93B4, + 0xE689, 0x93B5, 0xE68A, 0x93B6, 0xE68B, 0x93B7, 0xE68C, 0x93B8, + 0xE68D, 0x93B9, 0xE68E, 0x93BA, 0xE68F, 0x93BB, 0xE690, 0x93BC, + 0xE691, 0x93BD, 0xE692, 0x93BE, 0xE693, 0x93BF, 0xE694, 0x93C0, + 0xE695, 0x93C1, 0xE696, 0x93C2, 0xE697, 0x93C3, 0xE698, 0x93C4, + 0xE699, 0x93C5, 0xE69A, 0x93C6, 0xE69B, 0x93C7, 0xE69C, 0x93C8, + 0xE69D, 0x93C9, 0xE69E, 0x93CB, 0xE69F, 0x93CC, 0xE6A0, 0x93CD, + 0xE6A1, 0x5997, 0xE6A2, 0x59CA, 0xE6A3, 0x59AB, 0xE6A4, 0x599E, + 0xE6A5, 0x59A4, 0xE6A6, 0x59D2, 0xE6A7, 0x59B2, 0xE6A8, 0x59AF, + 0xE6A9, 0x59D7, 0xE6AA, 0x59BE, 0xE6AB, 0x5A05, 0xE6AC, 0x5A06, + 0xE6AD, 0x59DD, 0xE6AE, 0x5A08, 0xE6AF, 0x59E3, 0xE6B0, 0x59D8, + 0xE6B1, 0x59F9, 0xE6B2, 0x5A0C, 0xE6B3, 0x5A09, 0xE6B4, 0x5A32, + 0xE6B5, 0x5A34, 0xE6B6, 0x5A11, 0xE6B7, 0x5A23, 0xE6B8, 0x5A13, + 0xE6B9, 0x5A40, 0xE6BA, 0x5A67, 0xE6BB, 0x5A4A, 0xE6BC, 0x5A55, + 0xE6BD, 0x5A3C, 0xE6BE, 0x5A62, 0xE6BF, 0x5A75, 0xE6C0, 0x80EC, + 0xE6C1, 0x5AAA, 0xE6C2, 0x5A9B, 0xE6C3, 0x5A77, 0xE6C4, 0x5A7A, + 0xE6C5, 0x5ABE, 0xE6C6, 0x5AEB, 0xE6C7, 0x5AB2, 0xE6C8, 0x5AD2, + 0xE6C9, 0x5AD4, 0xE6CA, 0x5AB8, 0xE6CB, 0x5AE0, 0xE6CC, 0x5AE3, + 0xE6CD, 0x5AF1, 0xE6CE, 0x5AD6, 0xE6CF, 0x5AE6, 0xE6D0, 0x5AD8, + 0xE6D1, 0x5ADC, 0xE6D2, 0x5B09, 0xE6D3, 0x5B17, 0xE6D4, 0x5B16, + 0xE6D5, 0x5B32, 0xE6D6, 0x5B37, 0xE6D7, 0x5B40, 0xE6D8, 0x5C15, + 0xE6D9, 0x5C1C, 0xE6DA, 0x5B5A, 0xE6DB, 0x5B65, 0xE6DC, 0x5B73, + 0xE6DD, 0x5B51, 0xE6DE, 0x5B53, 0xE6DF, 0x5B62, 0xE6E0, 0x9A75, + 0xE6E1, 0x9A77, 0xE6E2, 0x9A78, 0xE6E3, 0x9A7A, 0xE6E4, 0x9A7F, + 0xE6E5, 0x9A7D, 0xE6E6, 0x9A80, 0xE6E7, 0x9A81, 0xE6E8, 0x9A85, + 0xE6E9, 0x9A88, 0xE6EA, 0x9A8A, 0xE6EB, 0x9A90, 0xE6EC, 0x9A92, + 0xE6ED, 0x9A93, 0xE6EE, 0x9A96, 0xE6EF, 0x9A98, 0xE6F0, 0x9A9B, + 0xE6F1, 0x9A9C, 0xE6F2, 0x9A9D, 0xE6F3, 0x9A9F, 0xE6F4, 0x9AA0, + 0xE6F5, 0x9AA2, 0xE6F6, 0x9AA3, 0xE6F7, 0x9AA5, 0xE6F8, 0x9AA7, + 0xE6F9, 0x7E9F, 0xE6FA, 0x7EA1, 0xE6FB, 0x7EA3, 0xE6FC, 0x7EA5, + 0xE6FD, 0x7EA8, 0xE6FE, 0x7EA9, 0xE740, 0x93CE, 0xE741, 0x93CF, + 0xE742, 0x93D0, 0xE743, 0x93D1, 0xE744, 0x93D2, 0xE745, 0x93D3, + 0xE746, 0x93D4, 0xE747, 0x93D5, 0xE748, 0x93D7, 0xE749, 0x93D8, + 0xE74A, 0x93D9, 0xE74B, 0x93DA, 0xE74C, 0x93DB, 0xE74D, 0x93DC, + 0xE74E, 0x93DD, 0xE74F, 0x93DE, 0xE750, 0x93DF, 0xE751, 0x93E0, + 0xE752, 0x93E1, 0xE753, 0x93E2, 0xE754, 0x93E3, 0xE755, 0x93E4, + 0xE756, 0x93E5, 0xE757, 0x93E6, 0xE758, 0x93E7, 0xE759, 0x93E8, + 0xE75A, 0x93E9, 0xE75B, 0x93EA, 0xE75C, 0x93EB, 0xE75D, 0x93EC, + 0xE75E, 0x93ED, 0xE75F, 0x93EE, 0xE760, 0x93EF, 0xE761, 0x93F0, + 0xE762, 0x93F1, 0xE763, 0x93F2, 0xE764, 0x93F3, 0xE765, 0x93F4, + 0xE766, 0x93F5, 0xE767, 0x93F6, 0xE768, 0x93F7, 0xE769, 0x93F8, + 0xE76A, 0x93F9, 0xE76B, 0x93FA, 0xE76C, 0x93FB, 0xE76D, 0x93FC, + 0xE76E, 0x93FD, 0xE76F, 0x93FE, 0xE770, 0x93FF, 0xE771, 0x9400, + 0xE772, 0x9401, 0xE773, 0x9402, 0xE774, 0x9403, 0xE775, 0x9404, + 0xE776, 0x9405, 0xE777, 0x9406, 0xE778, 0x9407, 0xE779, 0x9408, + 0xE77A, 0x9409, 0xE77B, 0x940A, 0xE77C, 0x940B, 0xE77D, 0x940C, + 0xE77E, 0x940D, 0xE780, 0x940E, 0xE781, 0x940F, 0xE782, 0x9410, + 0xE783, 0x9411, 0xE784, 0x9412, 0xE785, 0x9413, 0xE786, 0x9414, + 0xE787, 0x9415, 0xE788, 0x9416, 0xE789, 0x9417, 0xE78A, 0x9418, + 0xE78B, 0x9419, 0xE78C, 0x941A, 0xE78D, 0x941B, 0xE78E, 0x941C, + 0xE78F, 0x941D, 0xE790, 0x941E, 0xE791, 0x941F, 0xE792, 0x9420, + 0xE793, 0x9421, 0xE794, 0x9422, 0xE795, 0x9423, 0xE796, 0x9424, + 0xE797, 0x9425, 0xE798, 0x9426, 0xE799, 0x9427, 0xE79A, 0x9428, + 0xE79B, 0x9429, 0xE79C, 0x942A, 0xE79D, 0x942B, 0xE79E, 0x942C, + 0xE79F, 0x942D, 0xE7A0, 0x942E, 0xE7A1, 0x7EAD, 0xE7A2, 0x7EB0, + 0xE7A3, 0x7EBE, 0xE7A4, 0x7EC0, 0xE7A5, 0x7EC1, 0xE7A6, 0x7EC2, + 0xE7A7, 0x7EC9, 0xE7A8, 0x7ECB, 0xE7A9, 0x7ECC, 0xE7AA, 0x7ED0, + 0xE7AB, 0x7ED4, 0xE7AC, 0x7ED7, 0xE7AD, 0x7EDB, 0xE7AE, 0x7EE0, + 0xE7AF, 0x7EE1, 0xE7B0, 0x7EE8, 0xE7B1, 0x7EEB, 0xE7B2, 0x7EEE, + 0xE7B3, 0x7EEF, 0xE7B4, 0x7EF1, 0xE7B5, 0x7EF2, 0xE7B6, 0x7F0D, + 0xE7B7, 0x7EF6, 0xE7B8, 0x7EFA, 0xE7B9, 0x7EFB, 0xE7BA, 0x7EFE, + 0xE7BB, 0x7F01, 0xE7BC, 0x7F02, 0xE7BD, 0x7F03, 0xE7BE, 0x7F07, + 0xE7BF, 0x7F08, 0xE7C0, 0x7F0B, 0xE7C1, 0x7F0C, 0xE7C2, 0x7F0F, + 0xE7C3, 0x7F11, 0xE7C4, 0x7F12, 0xE7C5, 0x7F17, 0xE7C6, 0x7F19, + 0xE7C7, 0x7F1C, 0xE7C8, 0x7F1B, 0xE7C9, 0x7F1F, 0xE7CA, 0x7F21, + 0xE7CB, 0x7F22, 0xE7CC, 0x7F23, 0xE7CD, 0x7F24, 0xE7CE, 0x7F25, + 0xE7CF, 0x7F26, 0xE7D0, 0x7F27, 0xE7D1, 0x7F2A, 0xE7D2, 0x7F2B, + 0xE7D3, 0x7F2C, 0xE7D4, 0x7F2D, 0xE7D5, 0x7F2F, 0xE7D6, 0x7F30, + 0xE7D7, 0x7F31, 0xE7D8, 0x7F32, 0xE7D9, 0x7F33, 0xE7DA, 0x7F35, + 0xE7DB, 0x5E7A, 0xE7DC, 0x757F, 0xE7DD, 0x5DDB, 0xE7DE, 0x753E, + 0xE7DF, 0x9095, 0xE7E0, 0x738E, 0xE7E1, 0x7391, 0xE7E2, 0x73AE, + 0xE7E3, 0x73A2, 0xE7E4, 0x739F, 0xE7E5, 0x73CF, 0xE7E6, 0x73C2, + 0xE7E7, 0x73D1, 0xE7E8, 0x73B7, 0xE7E9, 0x73B3, 0xE7EA, 0x73C0, + 0xE7EB, 0x73C9, 0xE7EC, 0x73C8, 0xE7ED, 0x73E5, 0xE7EE, 0x73D9, + 0xE7EF, 0x987C, 0xE7F0, 0x740A, 0xE7F1, 0x73E9, 0xE7F2, 0x73E7, + 0xE7F3, 0x73DE, 0xE7F4, 0x73BA, 0xE7F5, 0x73F2, 0xE7F6, 0x740F, + 0xE7F7, 0x742A, 0xE7F8, 0x745B, 0xE7F9, 0x7426, 0xE7FA, 0x7425, + 0xE7FB, 0x7428, 0xE7FC, 0x7430, 0xE7FD, 0x742E, 0xE7FE, 0x742C, + 0xE840, 0x942F, 0xE841, 0x9430, 0xE842, 0x9431, 0xE843, 0x9432, + 0xE844, 0x9433, 0xE845, 0x9434, 0xE846, 0x9435, 0xE847, 0x9436, + 0xE848, 0x9437, 0xE849, 0x9438, 0xE84A, 0x9439, 0xE84B, 0x943A, + 0xE84C, 0x943B, 0xE84D, 0x943C, 0xE84E, 0x943D, 0xE84F, 0x943F, + 0xE850, 0x9440, 0xE851, 0x9441, 0xE852, 0x9442, 0xE853, 0x9443, + 0xE854, 0x9444, 0xE855, 0x9445, 0xE856, 0x9446, 0xE857, 0x9447, + 0xE858, 0x9448, 0xE859, 0x9449, 0xE85A, 0x944A, 0xE85B, 0x944B, + 0xE85C, 0x944C, 0xE85D, 0x944D, 0xE85E, 0x944E, 0xE85F, 0x944F, + 0xE860, 0x9450, 0xE861, 0x9451, 0xE862, 0x9452, 0xE863, 0x9453, + 0xE864, 0x9454, 0xE865, 0x9455, 0xE866, 0x9456, 0xE867, 0x9457, + 0xE868, 0x9458, 0xE869, 0x9459, 0xE86A, 0x945A, 0xE86B, 0x945B, + 0xE86C, 0x945C, 0xE86D, 0x945D, 0xE86E, 0x945E, 0xE86F, 0x945F, + 0xE870, 0x9460, 0xE871, 0x9461, 0xE872, 0x9462, 0xE873, 0x9463, + 0xE874, 0x9464, 0xE875, 0x9465, 0xE876, 0x9466, 0xE877, 0x9467, + 0xE878, 0x9468, 0xE879, 0x9469, 0xE87A, 0x946A, 0xE87B, 0x946C, + 0xE87C, 0x946D, 0xE87D, 0x946E, 0xE87E, 0x946F, 0xE880, 0x9470, + 0xE881, 0x9471, 0xE882, 0x9472, 0xE883, 0x9473, 0xE884, 0x9474, + 0xE885, 0x9475, 0xE886, 0x9476, 0xE887, 0x9477, 0xE888, 0x9478, + 0xE889, 0x9479, 0xE88A, 0x947A, 0xE88B, 0x947B, 0xE88C, 0x947C, + 0xE88D, 0x947D, 0xE88E, 0x947E, 0xE88F, 0x947F, 0xE890, 0x9480, + 0xE891, 0x9481, 0xE892, 0x9482, 0xE893, 0x9483, 0xE894, 0x9484, + 0xE895, 0x9491, 0xE896, 0x9496, 0xE897, 0x9498, 0xE898, 0x94C7, + 0xE899, 0x94CF, 0xE89A, 0x94D3, 0xE89B, 0x94D4, 0xE89C, 0x94DA, + 0xE89D, 0x94E6, 0xE89E, 0x94FB, 0xE89F, 0x951C, 0xE8A0, 0x9520, + 0xE8A1, 0x741B, 0xE8A2, 0x741A, 0xE8A3, 0x7441, 0xE8A4, 0x745C, + 0xE8A5, 0x7457, 0xE8A6, 0x7455, 0xE8A7, 0x7459, 0xE8A8, 0x7477, + 0xE8A9, 0x746D, 0xE8AA, 0x747E, 0xE8AB, 0x749C, 0xE8AC, 0x748E, + 0xE8AD, 0x7480, 0xE8AE, 0x7481, 0xE8AF, 0x7487, 0xE8B0, 0x748B, + 0xE8B1, 0x749E, 0xE8B2, 0x74A8, 0xE8B3, 0x74A9, 0xE8B4, 0x7490, + 0xE8B5, 0x74A7, 0xE8B6, 0x74D2, 0xE8B7, 0x74BA, 0xE8B8, 0x97EA, + 0xE8B9, 0x97EB, 0xE8BA, 0x97EC, 0xE8BB, 0x674C, 0xE8BC, 0x6753, + 0xE8BD, 0x675E, 0xE8BE, 0x6748, 0xE8BF, 0x6769, 0xE8C0, 0x67A5, + 0xE8C1, 0x6787, 0xE8C2, 0x676A, 0xE8C3, 0x6773, 0xE8C4, 0x6798, + 0xE8C5, 0x67A7, 0xE8C6, 0x6775, 0xE8C7, 0x67A8, 0xE8C8, 0x679E, + 0xE8C9, 0x67AD, 0xE8CA, 0x678B, 0xE8CB, 0x6777, 0xE8CC, 0x677C, + 0xE8CD, 0x67F0, 0xE8CE, 0x6809, 0xE8CF, 0x67D8, 0xE8D0, 0x680A, + 0xE8D1, 0x67E9, 0xE8D2, 0x67B0, 0xE8D3, 0x680C, 0xE8D4, 0x67D9, + 0xE8D5, 0x67B5, 0xE8D6, 0x67DA, 0xE8D7, 0x67B3, 0xE8D8, 0x67DD, + 0xE8D9, 0x6800, 0xE8DA, 0x67C3, 0xE8DB, 0x67B8, 0xE8DC, 0x67E2, + 0xE8DD, 0x680E, 0xE8DE, 0x67C1, 0xE8DF, 0x67FD, 0xE8E0, 0x6832, + 0xE8E1, 0x6833, 0xE8E2, 0x6860, 0xE8E3, 0x6861, 0xE8E4, 0x684E, + 0xE8E5, 0x6862, 0xE8E6, 0x6844, 0xE8E7, 0x6864, 0xE8E8, 0x6883, + 0xE8E9, 0x681D, 0xE8EA, 0x6855, 0xE8EB, 0x6866, 0xE8EC, 0x6841, + 0xE8ED, 0x6867, 0xE8EE, 0x6840, 0xE8EF, 0x683E, 0xE8F0, 0x684A, + 0xE8F1, 0x6849, 0xE8F2, 0x6829, 0xE8F3, 0x68B5, 0xE8F4, 0x688F, + 0xE8F5, 0x6874, 0xE8F6, 0x6877, 0xE8F7, 0x6893, 0xE8F8, 0x686B, + 0xE8F9, 0x68C2, 0xE8FA, 0x696E, 0xE8FB, 0x68FC, 0xE8FC, 0x691F, + 0xE8FD, 0x6920, 0xE8FE, 0x68F9, 0xE940, 0x9527, 0xE941, 0x9533, + 0xE942, 0x953D, 0xE943, 0x9543, 0xE944, 0x9548, 0xE945, 0x954B, + 0xE946, 0x9555, 0xE947, 0x955A, 0xE948, 0x9560, 0xE949, 0x956E, + 0xE94A, 0x9574, 0xE94B, 0x9575, 0xE94C, 0x9577, 0xE94D, 0x9578, + 0xE94E, 0x9579, 0xE94F, 0x957A, 0xE950, 0x957B, 0xE951, 0x957C, + 0xE952, 0x957D, 0xE953, 0x957E, 0xE954, 0x9580, 0xE955, 0x9581, + 0xE956, 0x9582, 0xE957, 0x9583, 0xE958, 0x9584, 0xE959, 0x9585, + 0xE95A, 0x9586, 0xE95B, 0x9587, 0xE95C, 0x9588, 0xE95D, 0x9589, + 0xE95E, 0x958A, 0xE95F, 0x958B, 0xE960, 0x958C, 0xE961, 0x958D, + 0xE962, 0x958E, 0xE963, 0x958F, 0xE964, 0x9590, 0xE965, 0x9591, + 0xE966, 0x9592, 0xE967, 0x9593, 0xE968, 0x9594, 0xE969, 0x9595, + 0xE96A, 0x9596, 0xE96B, 0x9597, 0xE96C, 0x9598, 0xE96D, 0x9599, + 0xE96E, 0x959A, 0xE96F, 0x959B, 0xE970, 0x959C, 0xE971, 0x959D, + 0xE972, 0x959E, 0xE973, 0x959F, 0xE974, 0x95A0, 0xE975, 0x95A1, + 0xE976, 0x95A2, 0xE977, 0x95A3, 0xE978, 0x95A4, 0xE979, 0x95A5, + 0xE97A, 0x95A6, 0xE97B, 0x95A7, 0xE97C, 0x95A8, 0xE97D, 0x95A9, + 0xE97E, 0x95AA, 0xE980, 0x95AB, 0xE981, 0x95AC, 0xE982, 0x95AD, + 0xE983, 0x95AE, 0xE984, 0x95AF, 0xE985, 0x95B0, 0xE986, 0x95B1, + 0xE987, 0x95B2, 0xE988, 0x95B3, 0xE989, 0x95B4, 0xE98A, 0x95B5, + 0xE98B, 0x95B6, 0xE98C, 0x95B7, 0xE98D, 0x95B8, 0xE98E, 0x95B9, + 0xE98F, 0x95BA, 0xE990, 0x95BB, 0xE991, 0x95BC, 0xE992, 0x95BD, + 0xE993, 0x95BE, 0xE994, 0x95BF, 0xE995, 0x95C0, 0xE996, 0x95C1, + 0xE997, 0x95C2, 0xE998, 0x95C3, 0xE999, 0x95C4, 0xE99A, 0x95C5, + 0xE99B, 0x95C6, 0xE99C, 0x95C7, 0xE99D, 0x95C8, 0xE99E, 0x95C9, + 0xE99F, 0x95CA, 0xE9A0, 0x95CB, 0xE9A1, 0x6924, 0xE9A2, 0x68F0, + 0xE9A3, 0x690B, 0xE9A4, 0x6901, 0xE9A5, 0x6957, 0xE9A6, 0x68E3, + 0xE9A7, 0x6910, 0xE9A8, 0x6971, 0xE9A9, 0x6939, 0xE9AA, 0x6960, + 0xE9AB, 0x6942, 0xE9AC, 0x695D, 0xE9AD, 0x6984, 0xE9AE, 0x696B, + 0xE9AF, 0x6980, 0xE9B0, 0x6998, 0xE9B1, 0x6978, 0xE9B2, 0x6934, + 0xE9B3, 0x69CC, 0xE9B4, 0x6987, 0xE9B5, 0x6988, 0xE9B6, 0x69CE, + 0xE9B7, 0x6989, 0xE9B8, 0x6966, 0xE9B9, 0x6963, 0xE9BA, 0x6979, + 0xE9BB, 0x699B, 0xE9BC, 0x69A7, 0xE9BD, 0x69BB, 0xE9BE, 0x69AB, + 0xE9BF, 0x69AD, 0xE9C0, 0x69D4, 0xE9C1, 0x69B1, 0xE9C2, 0x69C1, + 0xE9C3, 0x69CA, 0xE9C4, 0x69DF, 0xE9C5, 0x6995, 0xE9C6, 0x69E0, + 0xE9C7, 0x698D, 0xE9C8, 0x69FF, 0xE9C9, 0x6A2F, 0xE9CA, 0x69ED, + 0xE9CB, 0x6A17, 0xE9CC, 0x6A18, 0xE9CD, 0x6A65, 0xE9CE, 0x69F2, + 0xE9CF, 0x6A44, 0xE9D0, 0x6A3E, 0xE9D1, 0x6AA0, 0xE9D2, 0x6A50, + 0xE9D3, 0x6A5B, 0xE9D4, 0x6A35, 0xE9D5, 0x6A8E, 0xE9D6, 0x6A79, + 0xE9D7, 0x6A3D, 0xE9D8, 0x6A28, 0xE9D9, 0x6A58, 0xE9DA, 0x6A7C, + 0xE9DB, 0x6A91, 0xE9DC, 0x6A90, 0xE9DD, 0x6AA9, 0xE9DE, 0x6A97, + 0xE9DF, 0x6AAB, 0xE9E0, 0x7337, 0xE9E1, 0x7352, 0xE9E2, 0x6B81, + 0xE9E3, 0x6B82, 0xE9E4, 0x6B87, 0xE9E5, 0x6B84, 0xE9E6, 0x6B92, + 0xE9E7, 0x6B93, 0xE9E8, 0x6B8D, 0xE9E9, 0x6B9A, 0xE9EA, 0x6B9B, + 0xE9EB, 0x6BA1, 0xE9EC, 0x6BAA, 0xE9ED, 0x8F6B, 0xE9EE, 0x8F6D, + 0xE9EF, 0x8F71, 0xE9F0, 0x8F72, 0xE9F1, 0x8F73, 0xE9F2, 0x8F75, + 0xE9F3, 0x8F76, 0xE9F4, 0x8F78, 0xE9F5, 0x8F77, 0xE9F6, 0x8F79, + 0xE9F7, 0x8F7A, 0xE9F8, 0x8F7C, 0xE9F9, 0x8F7E, 0xE9FA, 0x8F81, + 0xE9FB, 0x8F82, 0xE9FC, 0x8F84, 0xE9FD, 0x8F87, 0xE9FE, 0x8F8B, + 0xEA40, 0x95CC, 0xEA41, 0x95CD, 0xEA42, 0x95CE, 0xEA43, 0x95CF, + 0xEA44, 0x95D0, 0xEA45, 0x95D1, 0xEA46, 0x95D2, 0xEA47, 0x95D3, + 0xEA48, 0x95D4, 0xEA49, 0x95D5, 0xEA4A, 0x95D6, 0xEA4B, 0x95D7, + 0xEA4C, 0x95D8, 0xEA4D, 0x95D9, 0xEA4E, 0x95DA, 0xEA4F, 0x95DB, + 0xEA50, 0x95DC, 0xEA51, 0x95DD, 0xEA52, 0x95DE, 0xEA53, 0x95DF, + 0xEA54, 0x95E0, 0xEA55, 0x95E1, 0xEA56, 0x95E2, 0xEA57, 0x95E3, + 0xEA58, 0x95E4, 0xEA59, 0x95E5, 0xEA5A, 0x95E6, 0xEA5B, 0x95E7, + 0xEA5C, 0x95EC, 0xEA5D, 0x95FF, 0xEA5E, 0x9607, 0xEA5F, 0x9613, + 0xEA60, 0x9618, 0xEA61, 0x961B, 0xEA62, 0x961E, 0xEA63, 0x9620, + 0xEA64, 0x9623, 0xEA65, 0x9624, 0xEA66, 0x9625, 0xEA67, 0x9626, + 0xEA68, 0x9627, 0xEA69, 0x9628, 0xEA6A, 0x9629, 0xEA6B, 0x962B, + 0xEA6C, 0x962C, 0xEA6D, 0x962D, 0xEA6E, 0x962F, 0xEA6F, 0x9630, + 0xEA70, 0x9637, 0xEA71, 0x9638, 0xEA72, 0x9639, 0xEA73, 0x963A, + 0xEA74, 0x963E, 0xEA75, 0x9641, 0xEA76, 0x9643, 0xEA77, 0x964A, + 0xEA78, 0x964E, 0xEA79, 0x964F, 0xEA7A, 0x9651, 0xEA7B, 0x9652, + 0xEA7C, 0x9653, 0xEA7D, 0x9656, 0xEA7E, 0x9657, 0xEA80, 0x9658, + 0xEA81, 0x9659, 0xEA82, 0x965A, 0xEA83, 0x965C, 0xEA84, 0x965D, + 0xEA85, 0x965E, 0xEA86, 0x9660, 0xEA87, 0x9663, 0xEA88, 0x9665, + 0xEA89, 0x9666, 0xEA8A, 0x966B, 0xEA8B, 0x966D, 0xEA8C, 0x966E, + 0xEA8D, 0x966F, 0xEA8E, 0x9670, 0xEA8F, 0x9671, 0xEA90, 0x9673, + 0xEA91, 0x9678, 0xEA92, 0x9679, 0xEA93, 0x967A, 0xEA94, 0x967B, + 0xEA95, 0x967C, 0xEA96, 0x967D, 0xEA97, 0x967E, 0xEA98, 0x967F, + 0xEA99, 0x9680, 0xEA9A, 0x9681, 0xEA9B, 0x9682, 0xEA9C, 0x9683, + 0xEA9D, 0x9684, 0xEA9E, 0x9687, 0xEA9F, 0x9689, 0xEAA0, 0x968A, + 0xEAA1, 0x8F8D, 0xEAA2, 0x8F8E, 0xEAA3, 0x8F8F, 0xEAA4, 0x8F98, + 0xEAA5, 0x8F9A, 0xEAA6, 0x8ECE, 0xEAA7, 0x620B, 0xEAA8, 0x6217, + 0xEAA9, 0x621B, 0xEAAA, 0x621F, 0xEAAB, 0x6222, 0xEAAC, 0x6221, + 0xEAAD, 0x6225, 0xEAAE, 0x6224, 0xEAAF, 0x622C, 0xEAB0, 0x81E7, + 0xEAB1, 0x74EF, 0xEAB2, 0x74F4, 0xEAB3, 0x74FF, 0xEAB4, 0x750F, + 0xEAB5, 0x7511, 0xEAB6, 0x7513, 0xEAB7, 0x6534, 0xEAB8, 0x65EE, + 0xEAB9, 0x65EF, 0xEABA, 0x65F0, 0xEABB, 0x660A, 0xEABC, 0x6619, + 0xEABD, 0x6772, 0xEABE, 0x6603, 0xEABF, 0x6615, 0xEAC0, 0x6600, + 0xEAC1, 0x7085, 0xEAC2, 0x66F7, 0xEAC3, 0x661D, 0xEAC4, 0x6634, + 0xEAC5, 0x6631, 0xEAC6, 0x6636, 0xEAC7, 0x6635, 0xEAC8, 0x8006, + 0xEAC9, 0x665F, 0xEACA, 0x6654, 0xEACB, 0x6641, 0xEACC, 0x664F, + 0xEACD, 0x6656, 0xEACE, 0x6661, 0xEACF, 0x6657, 0xEAD0, 0x6677, + 0xEAD1, 0x6684, 0xEAD2, 0x668C, 0xEAD3, 0x66A7, 0xEAD4, 0x669D, + 0xEAD5, 0x66BE, 0xEAD6, 0x66DB, 0xEAD7, 0x66DC, 0xEAD8, 0x66E6, + 0xEAD9, 0x66E9, 0xEADA, 0x8D32, 0xEADB, 0x8D33, 0xEADC, 0x8D36, + 0xEADD, 0x8D3B, 0xEADE, 0x8D3D, 0xEADF, 0x8D40, 0xEAE0, 0x8D45, + 0xEAE1, 0x8D46, 0xEAE2, 0x8D48, 0xEAE3, 0x8D49, 0xEAE4, 0x8D47, + 0xEAE5, 0x8D4D, 0xEAE6, 0x8D55, 0xEAE7, 0x8D59, 0xEAE8, 0x89C7, + 0xEAE9, 0x89CA, 0xEAEA, 0x89CB, 0xEAEB, 0x89CC, 0xEAEC, 0x89CE, + 0xEAED, 0x89CF, 0xEAEE, 0x89D0, 0xEAEF, 0x89D1, 0xEAF0, 0x726E, + 0xEAF1, 0x729F, 0xEAF2, 0x725D, 0xEAF3, 0x7266, 0xEAF4, 0x726F, + 0xEAF5, 0x727E, 0xEAF6, 0x727F, 0xEAF7, 0x7284, 0xEAF8, 0x728B, + 0xEAF9, 0x728D, 0xEAFA, 0x728F, 0xEAFB, 0x7292, 0xEAFC, 0x6308, + 0xEAFD, 0x6332, 0xEAFE, 0x63B0, 0xEB40, 0x968C, 0xEB41, 0x968E, + 0xEB42, 0x9691, 0xEB43, 0x9692, 0xEB44, 0x9693, 0xEB45, 0x9695, + 0xEB46, 0x9696, 0xEB47, 0x969A, 0xEB48, 0x969B, 0xEB49, 0x969D, + 0xEB4A, 0x969E, 0xEB4B, 0x969F, 0xEB4C, 0x96A0, 0xEB4D, 0x96A1, + 0xEB4E, 0x96A2, 0xEB4F, 0x96A3, 0xEB50, 0x96A4, 0xEB51, 0x96A5, + 0xEB52, 0x96A6, 0xEB53, 0x96A8, 0xEB54, 0x96A9, 0xEB55, 0x96AA, + 0xEB56, 0x96AB, 0xEB57, 0x96AC, 0xEB58, 0x96AD, 0xEB59, 0x96AE, + 0xEB5A, 0x96AF, 0xEB5B, 0x96B1, 0xEB5C, 0x96B2, 0xEB5D, 0x96B4, + 0xEB5E, 0x96B5, 0xEB5F, 0x96B7, 0xEB60, 0x96B8, 0xEB61, 0x96BA, + 0xEB62, 0x96BB, 0xEB63, 0x96BF, 0xEB64, 0x96C2, 0xEB65, 0x96C3, + 0xEB66, 0x96C8, 0xEB67, 0x96CA, 0xEB68, 0x96CB, 0xEB69, 0x96D0, + 0xEB6A, 0x96D1, 0xEB6B, 0x96D3, 0xEB6C, 0x96D4, 0xEB6D, 0x96D6, + 0xEB6E, 0x96D7, 0xEB6F, 0x96D8, 0xEB70, 0x96D9, 0xEB71, 0x96DA, + 0xEB72, 0x96DB, 0xEB73, 0x96DC, 0xEB74, 0x96DD, 0xEB75, 0x96DE, + 0xEB76, 0x96DF, 0xEB77, 0x96E1, 0xEB78, 0x96E2, 0xEB79, 0x96E3, + 0xEB7A, 0x96E4, 0xEB7B, 0x96E5, 0xEB7C, 0x96E6, 0xEB7D, 0x96E7, + 0xEB7E, 0x96EB, 0xEB80, 0x96EC, 0xEB81, 0x96ED, 0xEB82, 0x96EE, + 0xEB83, 0x96F0, 0xEB84, 0x96F1, 0xEB85, 0x96F2, 0xEB86, 0x96F4, + 0xEB87, 0x96F5, 0xEB88, 0x96F8, 0xEB89, 0x96FA, 0xEB8A, 0x96FB, + 0xEB8B, 0x96FC, 0xEB8C, 0x96FD, 0xEB8D, 0x96FF, 0xEB8E, 0x9702, + 0xEB8F, 0x9703, 0xEB90, 0x9705, 0xEB91, 0x970A, 0xEB92, 0x970B, + 0xEB93, 0x970C, 0xEB94, 0x9710, 0xEB95, 0x9711, 0xEB96, 0x9712, + 0xEB97, 0x9714, 0xEB98, 0x9715, 0xEB99, 0x9717, 0xEB9A, 0x9718, + 0xEB9B, 0x9719, 0xEB9C, 0x971A, 0xEB9D, 0x971B, 0xEB9E, 0x971D, + 0xEB9F, 0x971F, 0xEBA0, 0x9720, 0xEBA1, 0x643F, 0xEBA2, 0x64D8, + 0xEBA3, 0x8004, 0xEBA4, 0x6BEA, 0xEBA5, 0x6BF3, 0xEBA6, 0x6BFD, + 0xEBA7, 0x6BF5, 0xEBA8, 0x6BF9, 0xEBA9, 0x6C05, 0xEBAA, 0x6C07, + 0xEBAB, 0x6C06, 0xEBAC, 0x6C0D, 0xEBAD, 0x6C15, 0xEBAE, 0x6C18, + 0xEBAF, 0x6C19, 0xEBB0, 0x6C1A, 0xEBB1, 0x6C21, 0xEBB2, 0x6C29, + 0xEBB3, 0x6C24, 0xEBB4, 0x6C2A, 0xEBB5, 0x6C32, 0xEBB6, 0x6535, + 0xEBB7, 0x6555, 0xEBB8, 0x656B, 0xEBB9, 0x724D, 0xEBBA, 0x7252, + 0xEBBB, 0x7256, 0xEBBC, 0x7230, 0xEBBD, 0x8662, 0xEBBE, 0x5216, + 0xEBBF, 0x809F, 0xEBC0, 0x809C, 0xEBC1, 0x8093, 0xEBC2, 0x80BC, + 0xEBC3, 0x670A, 0xEBC4, 0x80BD, 0xEBC5, 0x80B1, 0xEBC6, 0x80AB, + 0xEBC7, 0x80AD, 0xEBC8, 0x80B4, 0xEBC9, 0x80B7, 0xEBCA, 0x80E7, + 0xEBCB, 0x80E8, 0xEBCC, 0x80E9, 0xEBCD, 0x80EA, 0xEBCE, 0x80DB, + 0xEBCF, 0x80C2, 0xEBD0, 0x80C4, 0xEBD1, 0x80D9, 0xEBD2, 0x80CD, + 0xEBD3, 0x80D7, 0xEBD4, 0x6710, 0xEBD5, 0x80DD, 0xEBD6, 0x80EB, + 0xEBD7, 0x80F1, 0xEBD8, 0x80F4, 0xEBD9, 0x80ED, 0xEBDA, 0x810D, + 0xEBDB, 0x810E, 0xEBDC, 0x80F2, 0xEBDD, 0x80FC, 0xEBDE, 0x6715, + 0xEBDF, 0x8112, 0xEBE0, 0x8C5A, 0xEBE1, 0x8136, 0xEBE2, 0x811E, + 0xEBE3, 0x812C, 0xEBE4, 0x8118, 0xEBE5, 0x8132, 0xEBE6, 0x8148, + 0xEBE7, 0x814C, 0xEBE8, 0x8153, 0xEBE9, 0x8174, 0xEBEA, 0x8159, + 0xEBEB, 0x815A, 0xEBEC, 0x8171, 0xEBED, 0x8160, 0xEBEE, 0x8169, + 0xEBEF, 0x817C, 0xEBF0, 0x817D, 0xEBF1, 0x816D, 0xEBF2, 0x8167, + 0xEBF3, 0x584D, 0xEBF4, 0x5AB5, 0xEBF5, 0x8188, 0xEBF6, 0x8182, + 0xEBF7, 0x8191, 0xEBF8, 0x6ED5, 0xEBF9, 0x81A3, 0xEBFA, 0x81AA, + 0xEBFB, 0x81CC, 0xEBFC, 0x6726, 0xEBFD, 0x81CA, 0xEBFE, 0x81BB, + 0xEC40, 0x9721, 0xEC41, 0x9722, 0xEC42, 0x9723, 0xEC43, 0x9724, + 0xEC44, 0x9725, 0xEC45, 0x9726, 0xEC46, 0x9727, 0xEC47, 0x9728, + 0xEC48, 0x9729, 0xEC49, 0x972B, 0xEC4A, 0x972C, 0xEC4B, 0x972E, + 0xEC4C, 0x972F, 0xEC4D, 0x9731, 0xEC4E, 0x9733, 0xEC4F, 0x9734, + 0xEC50, 0x9735, 0xEC51, 0x9736, 0xEC52, 0x9737, 0xEC53, 0x973A, + 0xEC54, 0x973B, 0xEC55, 0x973C, 0xEC56, 0x973D, 0xEC57, 0x973F, + 0xEC58, 0x9740, 0xEC59, 0x9741, 0xEC5A, 0x9742, 0xEC5B, 0x9743, + 0xEC5C, 0x9744, 0xEC5D, 0x9745, 0xEC5E, 0x9746, 0xEC5F, 0x9747, + 0xEC60, 0x9748, 0xEC61, 0x9749, 0xEC62, 0x974A, 0xEC63, 0x974B, + 0xEC64, 0x974C, 0xEC65, 0x974D, 0xEC66, 0x974E, 0xEC67, 0x974F, + 0xEC68, 0x9750, 0xEC69, 0x9751, 0xEC6A, 0x9754, 0xEC6B, 0x9755, + 0xEC6C, 0x9757, 0xEC6D, 0x9758, 0xEC6E, 0x975A, 0xEC6F, 0x975C, + 0xEC70, 0x975D, 0xEC71, 0x975F, 0xEC72, 0x9763, 0xEC73, 0x9764, + 0xEC74, 0x9766, 0xEC75, 0x9767, 0xEC76, 0x9768, 0xEC77, 0x976A, + 0xEC78, 0x976B, 0xEC79, 0x976C, 0xEC7A, 0x976D, 0xEC7B, 0x976E, + 0xEC7C, 0x976F, 0xEC7D, 0x9770, 0xEC7E, 0x9771, 0xEC80, 0x9772, + 0xEC81, 0x9775, 0xEC82, 0x9777, 0xEC83, 0x9778, 0xEC84, 0x9779, + 0xEC85, 0x977A, 0xEC86, 0x977B, 0xEC87, 0x977D, 0xEC88, 0x977E, + 0xEC89, 0x977F, 0xEC8A, 0x9780, 0xEC8B, 0x9781, 0xEC8C, 0x9782, + 0xEC8D, 0x9783, 0xEC8E, 0x9784, 0xEC8F, 0x9786, 0xEC90, 0x9787, + 0xEC91, 0x9788, 0xEC92, 0x9789, 0xEC93, 0x978A, 0xEC94, 0x978C, + 0xEC95, 0x978E, 0xEC96, 0x978F, 0xEC97, 0x9790, 0xEC98, 0x9793, + 0xEC99, 0x9795, 0xEC9A, 0x9796, 0xEC9B, 0x9797, 0xEC9C, 0x9799, + 0xEC9D, 0x979A, 0xEC9E, 0x979B, 0xEC9F, 0x979C, 0xECA0, 0x979D, + 0xECA1, 0x81C1, 0xECA2, 0x81A6, 0xECA3, 0x6B24, 0xECA4, 0x6B37, + 0xECA5, 0x6B39, 0xECA6, 0x6B43, 0xECA7, 0x6B46, 0xECA8, 0x6B59, + 0xECA9, 0x98D1, 0xECAA, 0x98D2, 0xECAB, 0x98D3, 0xECAC, 0x98D5, + 0xECAD, 0x98D9, 0xECAE, 0x98DA, 0xECAF, 0x6BB3, 0xECB0, 0x5F40, + 0xECB1, 0x6BC2, 0xECB2, 0x89F3, 0xECB3, 0x6590, 0xECB4, 0x9F51, + 0xECB5, 0x6593, 0xECB6, 0x65BC, 0xECB7, 0x65C6, 0xECB8, 0x65C4, + 0xECB9, 0x65C3, 0xECBA, 0x65CC, 0xECBB, 0x65CE, 0xECBC, 0x65D2, + 0xECBD, 0x65D6, 0xECBE, 0x7080, 0xECBF, 0x709C, 0xECC0, 0x7096, + 0xECC1, 0x709D, 0xECC2, 0x70BB, 0xECC3, 0x70C0, 0xECC4, 0x70B7, + 0xECC5, 0x70AB, 0xECC6, 0x70B1, 0xECC7, 0x70E8, 0xECC8, 0x70CA, + 0xECC9, 0x7110, 0xECCA, 0x7113, 0xECCB, 0x7116, 0xECCC, 0x712F, + 0xECCD, 0x7131, 0xECCE, 0x7173, 0xECCF, 0x715C, 0xECD0, 0x7168, + 0xECD1, 0x7145, 0xECD2, 0x7172, 0xECD3, 0x714A, 0xECD4, 0x7178, + 0xECD5, 0x717A, 0xECD6, 0x7198, 0xECD7, 0x71B3, 0xECD8, 0x71B5, + 0xECD9, 0x71A8, 0xECDA, 0x71A0, 0xECDB, 0x71E0, 0xECDC, 0x71D4, + 0xECDD, 0x71E7, 0xECDE, 0x71F9, 0xECDF, 0x721D, 0xECE0, 0x7228, + 0xECE1, 0x706C, 0xECE2, 0x7118, 0xECE3, 0x7166, 0xECE4, 0x71B9, + 0xECE5, 0x623E, 0xECE6, 0x623D, 0xECE7, 0x6243, 0xECE8, 0x6248, + 0xECE9, 0x6249, 0xECEA, 0x793B, 0xECEB, 0x7940, 0xECEC, 0x7946, + 0xECED, 0x7949, 0xECEE, 0x795B, 0xECEF, 0x795C, 0xECF0, 0x7953, + 0xECF1, 0x795A, 0xECF2, 0x7962, 0xECF3, 0x7957, 0xECF4, 0x7960, + 0xECF5, 0x796F, 0xECF6, 0x7967, 0xECF7, 0x797A, 0xECF8, 0x7985, + 0xECF9, 0x798A, 0xECFA, 0x799A, 0xECFB, 0x79A7, 0xECFC, 0x79B3, + 0xECFD, 0x5FD1, 0xECFE, 0x5FD0, 0xED40, 0x979E, 0xED41, 0x979F, + 0xED42, 0x97A1, 0xED43, 0x97A2, 0xED44, 0x97A4, 0xED45, 0x97A5, + 0xED46, 0x97A6, 0xED47, 0x97A7, 0xED48, 0x97A8, 0xED49, 0x97A9, + 0xED4A, 0x97AA, 0xED4B, 0x97AC, 0xED4C, 0x97AE, 0xED4D, 0x97B0, + 0xED4E, 0x97B1, 0xED4F, 0x97B3, 0xED50, 0x97B5, 0xED51, 0x97B6, + 0xED52, 0x97B7, 0xED53, 0x97B8, 0xED54, 0x97B9, 0xED55, 0x97BA, + 0xED56, 0x97BB, 0xED57, 0x97BC, 0xED58, 0x97BD, 0xED59, 0x97BE, + 0xED5A, 0x97BF, 0xED5B, 0x97C0, 0xED5C, 0x97C1, 0xED5D, 0x97C2, + 0xED5E, 0x97C3, 0xED5F, 0x97C4, 0xED60, 0x97C5, 0xED61, 0x97C6, + 0xED62, 0x97C7, 0xED63, 0x97C8, 0xED64, 0x97C9, 0xED65, 0x97CA, + 0xED66, 0x97CB, 0xED67, 0x97CC, 0xED68, 0x97CD, 0xED69, 0x97CE, + 0xED6A, 0x97CF, 0xED6B, 0x97D0, 0xED6C, 0x97D1, 0xED6D, 0x97D2, + 0xED6E, 0x97D3, 0xED6F, 0x97D4, 0xED70, 0x97D5, 0xED71, 0x97D6, + 0xED72, 0x97D7, 0xED73, 0x97D8, 0xED74, 0x97D9, 0xED75, 0x97DA, + 0xED76, 0x97DB, 0xED77, 0x97DC, 0xED78, 0x97DD, 0xED79, 0x97DE, + 0xED7A, 0x97DF, 0xED7B, 0x97E0, 0xED7C, 0x97E1, 0xED7D, 0x97E2, + 0xED7E, 0x97E3, 0xED80, 0x97E4, 0xED81, 0x97E5, 0xED82, 0x97E8, + 0xED83, 0x97EE, 0xED84, 0x97EF, 0xED85, 0x97F0, 0xED86, 0x97F1, + 0xED87, 0x97F2, 0xED88, 0x97F4, 0xED89, 0x97F7, 0xED8A, 0x97F8, + 0xED8B, 0x97F9, 0xED8C, 0x97FA, 0xED8D, 0x97FB, 0xED8E, 0x97FC, + 0xED8F, 0x97FD, 0xED90, 0x97FE, 0xED91, 0x97FF, 0xED92, 0x9800, + 0xED93, 0x9801, 0xED94, 0x9802, 0xED95, 0x9803, 0xED96, 0x9804, + 0xED97, 0x9805, 0xED98, 0x9806, 0xED99, 0x9807, 0xED9A, 0x9808, + 0xED9B, 0x9809, 0xED9C, 0x980A, 0xED9D, 0x980B, 0xED9E, 0x980C, + 0xED9F, 0x980D, 0xEDA0, 0x980E, 0xEDA1, 0x603C, 0xEDA2, 0x605D, + 0xEDA3, 0x605A, 0xEDA4, 0x6067, 0xEDA5, 0x6041, 0xEDA6, 0x6059, + 0xEDA7, 0x6063, 0xEDA8, 0x60AB, 0xEDA9, 0x6106, 0xEDAA, 0x610D, + 0xEDAB, 0x615D, 0xEDAC, 0x61A9, 0xEDAD, 0x619D, 0xEDAE, 0x61CB, + 0xEDAF, 0x61D1, 0xEDB0, 0x6206, 0xEDB1, 0x8080, 0xEDB2, 0x807F, + 0xEDB3, 0x6C93, 0xEDB4, 0x6CF6, 0xEDB5, 0x6DFC, 0xEDB6, 0x77F6, + 0xEDB7, 0x77F8, 0xEDB8, 0x7800, 0xEDB9, 0x7809, 0xEDBA, 0x7817, + 0xEDBB, 0x7818, 0xEDBC, 0x7811, 0xEDBD, 0x65AB, 0xEDBE, 0x782D, + 0xEDBF, 0x781C, 0xEDC0, 0x781D, 0xEDC1, 0x7839, 0xEDC2, 0x783A, + 0xEDC3, 0x783B, 0xEDC4, 0x781F, 0xEDC5, 0x783C, 0xEDC6, 0x7825, + 0xEDC7, 0x782C, 0xEDC8, 0x7823, 0xEDC9, 0x7829, 0xEDCA, 0x784E, + 0xEDCB, 0x786D, 0xEDCC, 0x7856, 0xEDCD, 0x7857, 0xEDCE, 0x7826, + 0xEDCF, 0x7850, 0xEDD0, 0x7847, 0xEDD1, 0x784C, 0xEDD2, 0x786A, + 0xEDD3, 0x789B, 0xEDD4, 0x7893, 0xEDD5, 0x789A, 0xEDD6, 0x7887, + 0xEDD7, 0x789C, 0xEDD8, 0x78A1, 0xEDD9, 0x78A3, 0xEDDA, 0x78B2, + 0xEDDB, 0x78B9, 0xEDDC, 0x78A5, 0xEDDD, 0x78D4, 0xEDDE, 0x78D9, + 0xEDDF, 0x78C9, 0xEDE0, 0x78EC, 0xEDE1, 0x78F2, 0xEDE2, 0x7905, + 0xEDE3, 0x78F4, 0xEDE4, 0x7913, 0xEDE5, 0x7924, 0xEDE6, 0x791E, + 0xEDE7, 0x7934, 0xEDE8, 0x9F9B, 0xEDE9, 0x9EF9, 0xEDEA, 0x9EFB, + 0xEDEB, 0x9EFC, 0xEDEC, 0x76F1, 0xEDED, 0x7704, 0xEDEE, 0x770D, + 0xEDEF, 0x76F9, 0xEDF0, 0x7707, 0xEDF1, 0x7708, 0xEDF2, 0x771A, + 0xEDF3, 0x7722, 0xEDF4, 0x7719, 0xEDF5, 0x772D, 0xEDF6, 0x7726, + 0xEDF7, 0x7735, 0xEDF8, 0x7738, 0xEDF9, 0x7750, 0xEDFA, 0x7751, + 0xEDFB, 0x7747, 0xEDFC, 0x7743, 0xEDFD, 0x775A, 0xEDFE, 0x7768, + 0xEE40, 0x980F, 0xEE41, 0x9810, 0xEE42, 0x9811, 0xEE43, 0x9812, + 0xEE44, 0x9813, 0xEE45, 0x9814, 0xEE46, 0x9815, 0xEE47, 0x9816, + 0xEE48, 0x9817, 0xEE49, 0x9818, 0xEE4A, 0x9819, 0xEE4B, 0x981A, + 0xEE4C, 0x981B, 0xEE4D, 0x981C, 0xEE4E, 0x981D, 0xEE4F, 0x981E, + 0xEE50, 0x981F, 0xEE51, 0x9820, 0xEE52, 0x9821, 0xEE53, 0x9822, + 0xEE54, 0x9823, 0xEE55, 0x9824, 0xEE56, 0x9825, 0xEE57, 0x9826, + 0xEE58, 0x9827, 0xEE59, 0x9828, 0xEE5A, 0x9829, 0xEE5B, 0x982A, + 0xEE5C, 0x982B, 0xEE5D, 0x982C, 0xEE5E, 0x982D, 0xEE5F, 0x982E, + 0xEE60, 0x982F, 0xEE61, 0x9830, 0xEE62, 0x9831, 0xEE63, 0x9832, + 0xEE64, 0x9833, 0xEE65, 0x9834, 0xEE66, 0x9835, 0xEE67, 0x9836, + 0xEE68, 0x9837, 0xEE69, 0x9838, 0xEE6A, 0x9839, 0xEE6B, 0x983A, + 0xEE6C, 0x983B, 0xEE6D, 0x983C, 0xEE6E, 0x983D, 0xEE6F, 0x983E, + 0xEE70, 0x983F, 0xEE71, 0x9840, 0xEE72, 0x9841, 0xEE73, 0x9842, + 0xEE74, 0x9843, 0xEE75, 0x9844, 0xEE76, 0x9845, 0xEE77, 0x9846, + 0xEE78, 0x9847, 0xEE79, 0x9848, 0xEE7A, 0x9849, 0xEE7B, 0x984A, + 0xEE7C, 0x984B, 0xEE7D, 0x984C, 0xEE7E, 0x984D, 0xEE80, 0x984E, + 0xEE81, 0x984F, 0xEE82, 0x9850, 0xEE83, 0x9851, 0xEE84, 0x9852, + 0xEE85, 0x9853, 0xEE86, 0x9854, 0xEE87, 0x9855, 0xEE88, 0x9856, + 0xEE89, 0x9857, 0xEE8A, 0x9858, 0xEE8B, 0x9859, 0xEE8C, 0x985A, + 0xEE8D, 0x985B, 0xEE8E, 0x985C, 0xEE8F, 0x985D, 0xEE90, 0x985E, + 0xEE91, 0x985F, 0xEE92, 0x9860, 0xEE93, 0x9861, 0xEE94, 0x9862, + 0xEE95, 0x9863, 0xEE96, 0x9864, 0xEE97, 0x9865, 0xEE98, 0x9866, + 0xEE99, 0x9867, 0xEE9A, 0x9868, 0xEE9B, 0x9869, 0xEE9C, 0x986A, + 0xEE9D, 0x986B, 0xEE9E, 0x986C, 0xEE9F, 0x986D, 0xEEA0, 0x986E, + 0xEEA1, 0x7762, 0xEEA2, 0x7765, 0xEEA3, 0x777F, 0xEEA4, 0x778D, + 0xEEA5, 0x777D, 0xEEA6, 0x7780, 0xEEA7, 0x778C, 0xEEA8, 0x7791, + 0xEEA9, 0x779F, 0xEEAA, 0x77A0, 0xEEAB, 0x77B0, 0xEEAC, 0x77B5, + 0xEEAD, 0x77BD, 0xEEAE, 0x753A, 0xEEAF, 0x7540, 0xEEB0, 0x754E, + 0xEEB1, 0x754B, 0xEEB2, 0x7548, 0xEEB3, 0x755B, 0xEEB4, 0x7572, + 0xEEB5, 0x7579, 0xEEB6, 0x7583, 0xEEB7, 0x7F58, 0xEEB8, 0x7F61, + 0xEEB9, 0x7F5F, 0xEEBA, 0x8A48, 0xEEBB, 0x7F68, 0xEEBC, 0x7F74, + 0xEEBD, 0x7F71, 0xEEBE, 0x7F79, 0xEEBF, 0x7F81, 0xEEC0, 0x7F7E, + 0xEEC1, 0x76CD, 0xEEC2, 0x76E5, 0xEEC3, 0x8832, 0xEEC4, 0x9485, + 0xEEC5, 0x9486, 0xEEC6, 0x9487, 0xEEC7, 0x948B, 0xEEC8, 0x948A, + 0xEEC9, 0x948C, 0xEECA, 0x948D, 0xEECB, 0x948F, 0xEECC, 0x9490, + 0xEECD, 0x9494, 0xEECE, 0x9497, 0xEECF, 0x9495, 0xEED0, 0x949A, + 0xEED1, 0x949B, 0xEED2, 0x949C, 0xEED3, 0x94A3, 0xEED4, 0x94A4, + 0xEED5, 0x94AB, 0xEED6, 0x94AA, 0xEED7, 0x94AD, 0xEED8, 0x94AC, + 0xEED9, 0x94AF, 0xEEDA, 0x94B0, 0xEEDB, 0x94B2, 0xEEDC, 0x94B4, + 0xEEDD, 0x94B6, 0xEEDE, 0x94B7, 0xEEDF, 0x94B8, 0xEEE0, 0x94B9, + 0xEEE1, 0x94BA, 0xEEE2, 0x94BC, 0xEEE3, 0x94BD, 0xEEE4, 0x94BF, + 0xEEE5, 0x94C4, 0xEEE6, 0x94C8, 0xEEE7, 0x94C9, 0xEEE8, 0x94CA, + 0xEEE9, 0x94CB, 0xEEEA, 0x94CC, 0xEEEB, 0x94CD, 0xEEEC, 0x94CE, + 0xEEED, 0x94D0, 0xEEEE, 0x94D1, 0xEEEF, 0x94D2, 0xEEF0, 0x94D5, + 0xEEF1, 0x94D6, 0xEEF2, 0x94D7, 0xEEF3, 0x94D9, 0xEEF4, 0x94D8, + 0xEEF5, 0x94DB, 0xEEF6, 0x94DE, 0xEEF7, 0x94DF, 0xEEF8, 0x94E0, + 0xEEF9, 0x94E2, 0xEEFA, 0x94E4, 0xEEFB, 0x94E5, 0xEEFC, 0x94E7, + 0xEEFD, 0x94E8, 0xEEFE, 0x94EA, 0xEF40, 0x986F, 0xEF41, 0x9870, + 0xEF42, 0x9871, 0xEF43, 0x9872, 0xEF44, 0x9873, 0xEF45, 0x9874, + 0xEF46, 0x988B, 0xEF47, 0x988E, 0xEF48, 0x9892, 0xEF49, 0x9895, + 0xEF4A, 0x9899, 0xEF4B, 0x98A3, 0xEF4C, 0x98A8, 0xEF4D, 0x98A9, + 0xEF4E, 0x98AA, 0xEF4F, 0x98AB, 0xEF50, 0x98AC, 0xEF51, 0x98AD, + 0xEF52, 0x98AE, 0xEF53, 0x98AF, 0xEF54, 0x98B0, 0xEF55, 0x98B1, + 0xEF56, 0x98B2, 0xEF57, 0x98B3, 0xEF58, 0x98B4, 0xEF59, 0x98B5, + 0xEF5A, 0x98B6, 0xEF5B, 0x98B7, 0xEF5C, 0x98B8, 0xEF5D, 0x98B9, + 0xEF5E, 0x98BA, 0xEF5F, 0x98BB, 0xEF60, 0x98BC, 0xEF61, 0x98BD, + 0xEF62, 0x98BE, 0xEF63, 0x98BF, 0xEF64, 0x98C0, 0xEF65, 0x98C1, + 0xEF66, 0x98C2, 0xEF67, 0x98C3, 0xEF68, 0x98C4, 0xEF69, 0x98C5, + 0xEF6A, 0x98C6, 0xEF6B, 0x98C7, 0xEF6C, 0x98C8, 0xEF6D, 0x98C9, + 0xEF6E, 0x98CA, 0xEF6F, 0x98CB, 0xEF70, 0x98CC, 0xEF71, 0x98CD, + 0xEF72, 0x98CF, 0xEF73, 0x98D0, 0xEF74, 0x98D4, 0xEF75, 0x98D6, + 0xEF76, 0x98D7, 0xEF77, 0x98DB, 0xEF78, 0x98DC, 0xEF79, 0x98DD, + 0xEF7A, 0x98E0, 0xEF7B, 0x98E1, 0xEF7C, 0x98E2, 0xEF7D, 0x98E3, + 0xEF7E, 0x98E4, 0xEF80, 0x98E5, 0xEF81, 0x98E6, 0xEF82, 0x98E9, + 0xEF83, 0x98EA, 0xEF84, 0x98EB, 0xEF85, 0x98EC, 0xEF86, 0x98ED, + 0xEF87, 0x98EE, 0xEF88, 0x98EF, 0xEF89, 0x98F0, 0xEF8A, 0x98F1, + 0xEF8B, 0x98F2, 0xEF8C, 0x98F3, 0xEF8D, 0x98F4, 0xEF8E, 0x98F5, + 0xEF8F, 0x98F6, 0xEF90, 0x98F7, 0xEF91, 0x98F8, 0xEF92, 0x98F9, + 0xEF93, 0x98FA, 0xEF94, 0x98FB, 0xEF95, 0x98FC, 0xEF96, 0x98FD, + 0xEF97, 0x98FE, 0xEF98, 0x98FF, 0xEF99, 0x9900, 0xEF9A, 0x9901, + 0xEF9B, 0x9902, 0xEF9C, 0x9903, 0xEF9D, 0x9904, 0xEF9E, 0x9905, + 0xEF9F, 0x9906, 0xEFA0, 0x9907, 0xEFA1, 0x94E9, 0xEFA2, 0x94EB, + 0xEFA3, 0x94EE, 0xEFA4, 0x94EF, 0xEFA5, 0x94F3, 0xEFA6, 0x94F4, + 0xEFA7, 0x94F5, 0xEFA8, 0x94F7, 0xEFA9, 0x94F9, 0xEFAA, 0x94FC, + 0xEFAB, 0x94FD, 0xEFAC, 0x94FF, 0xEFAD, 0x9503, 0xEFAE, 0x9502, + 0xEFAF, 0x9506, 0xEFB0, 0x9507, 0xEFB1, 0x9509, 0xEFB2, 0x950A, + 0xEFB3, 0x950D, 0xEFB4, 0x950E, 0xEFB5, 0x950F, 0xEFB6, 0x9512, + 0xEFB7, 0x9513, 0xEFB8, 0x9514, 0xEFB9, 0x9515, 0xEFBA, 0x9516, + 0xEFBB, 0x9518, 0xEFBC, 0x951B, 0xEFBD, 0x951D, 0xEFBE, 0x951E, + 0xEFBF, 0x951F, 0xEFC0, 0x9522, 0xEFC1, 0x952A, 0xEFC2, 0x952B, + 0xEFC3, 0x9529, 0xEFC4, 0x952C, 0xEFC5, 0x9531, 0xEFC6, 0x9532, + 0xEFC7, 0x9534, 0xEFC8, 0x9536, 0xEFC9, 0x9537, 0xEFCA, 0x9538, + 0xEFCB, 0x953C, 0xEFCC, 0x953E, 0xEFCD, 0x953F, 0xEFCE, 0x9542, + 0xEFCF, 0x9535, 0xEFD0, 0x9544, 0xEFD1, 0x9545, 0xEFD2, 0x9546, + 0xEFD3, 0x9549, 0xEFD4, 0x954C, 0xEFD5, 0x954E, 0xEFD6, 0x954F, + 0xEFD7, 0x9552, 0xEFD8, 0x9553, 0xEFD9, 0x9554, 0xEFDA, 0x9556, + 0xEFDB, 0x9557, 0xEFDC, 0x9558, 0xEFDD, 0x9559, 0xEFDE, 0x955B, + 0xEFDF, 0x955E, 0xEFE0, 0x955F, 0xEFE1, 0x955D, 0xEFE2, 0x9561, + 0xEFE3, 0x9562, 0xEFE4, 0x9564, 0xEFE5, 0x9565, 0xEFE6, 0x9566, + 0xEFE7, 0x9567, 0xEFE8, 0x9568, 0xEFE9, 0x9569, 0xEFEA, 0x956A, + 0xEFEB, 0x956B, 0xEFEC, 0x956C, 0xEFED, 0x956F, 0xEFEE, 0x9571, + 0xEFEF, 0x9572, 0xEFF0, 0x9573, 0xEFF1, 0x953A, 0xEFF2, 0x77E7, + 0xEFF3, 0x77EC, 0xEFF4, 0x96C9, 0xEFF5, 0x79D5, 0xEFF6, 0x79ED, + 0xEFF7, 0x79E3, 0xEFF8, 0x79EB, 0xEFF9, 0x7A06, 0xEFFA, 0x5D47, + 0xEFFB, 0x7A03, 0xEFFC, 0x7A02, 0xEFFD, 0x7A1E, 0xEFFE, 0x7A14, + 0xF040, 0x9908, 0xF041, 0x9909, 0xF042, 0x990A, 0xF043, 0x990B, + 0xF044, 0x990C, 0xF045, 0x990E, 0xF046, 0x990F, 0xF047, 0x9911, + 0xF048, 0x9912, 0xF049, 0x9913, 0xF04A, 0x9914, 0xF04B, 0x9915, + 0xF04C, 0x9916, 0xF04D, 0x9917, 0xF04E, 0x9918, 0xF04F, 0x9919, + 0xF050, 0x991A, 0xF051, 0x991B, 0xF052, 0x991C, 0xF053, 0x991D, + 0xF054, 0x991E, 0xF055, 0x991F, 0xF056, 0x9920, 0xF057, 0x9921, + 0xF058, 0x9922, 0xF059, 0x9923, 0xF05A, 0x9924, 0xF05B, 0x9925, + 0xF05C, 0x9926, 0xF05D, 0x9927, 0xF05E, 0x9928, 0xF05F, 0x9929, + 0xF060, 0x992A, 0xF061, 0x992B, 0xF062, 0x992C, 0xF063, 0x992D, + 0xF064, 0x992F, 0xF065, 0x9930, 0xF066, 0x9931, 0xF067, 0x9932, + 0xF068, 0x9933, 0xF069, 0x9934, 0xF06A, 0x9935, 0xF06B, 0x9936, + 0xF06C, 0x9937, 0xF06D, 0x9938, 0xF06E, 0x9939, 0xF06F, 0x993A, + 0xF070, 0x993B, 0xF071, 0x993C, 0xF072, 0x993D, 0xF073, 0x993E, + 0xF074, 0x993F, 0xF075, 0x9940, 0xF076, 0x9941, 0xF077, 0x9942, + 0xF078, 0x9943, 0xF079, 0x9944, 0xF07A, 0x9945, 0xF07B, 0x9946, + 0xF07C, 0x9947, 0xF07D, 0x9948, 0xF07E, 0x9949, 0xF080, 0x994A, + 0xF081, 0x994B, 0xF082, 0x994C, 0xF083, 0x994D, 0xF084, 0x994E, + 0xF085, 0x994F, 0xF086, 0x9950, 0xF087, 0x9951, 0xF088, 0x9952, + 0xF089, 0x9953, 0xF08A, 0x9956, 0xF08B, 0x9957, 0xF08C, 0x9958, + 0xF08D, 0x9959, 0xF08E, 0x995A, 0xF08F, 0x995B, 0xF090, 0x995C, + 0xF091, 0x995D, 0xF092, 0x995E, 0xF093, 0x995F, 0xF094, 0x9960, + 0xF095, 0x9961, 0xF096, 0x9962, 0xF097, 0x9964, 0xF098, 0x9966, + 0xF099, 0x9973, 0xF09A, 0x9978, 0xF09B, 0x9979, 0xF09C, 0x997B, + 0xF09D, 0x997E, 0xF09E, 0x9982, 0xF09F, 0x9983, 0xF0A0, 0x9989, + 0xF0A1, 0x7A39, 0xF0A2, 0x7A37, 0xF0A3, 0x7A51, 0xF0A4, 0x9ECF, + 0xF0A5, 0x99A5, 0xF0A6, 0x7A70, 0xF0A7, 0x7688, 0xF0A8, 0x768E, + 0xF0A9, 0x7693, 0xF0AA, 0x7699, 0xF0AB, 0x76A4, 0xF0AC, 0x74DE, + 0xF0AD, 0x74E0, 0xF0AE, 0x752C, 0xF0AF, 0x9E20, 0xF0B0, 0x9E22, + 0xF0B1, 0x9E28, 0xF0B2, 0x9E29, 0xF0B3, 0x9E2A, 0xF0B4, 0x9E2B, + 0xF0B5, 0x9E2C, 0xF0B6, 0x9E32, 0xF0B7, 0x9E31, 0xF0B8, 0x9E36, + 0xF0B9, 0x9E38, 0xF0BA, 0x9E37, 0xF0BB, 0x9E39, 0xF0BC, 0x9E3A, + 0xF0BD, 0x9E3E, 0xF0BE, 0x9E41, 0xF0BF, 0x9E42, 0xF0C0, 0x9E44, + 0xF0C1, 0x9E46, 0xF0C2, 0x9E47, 0xF0C3, 0x9E48, 0xF0C4, 0x9E49, + 0xF0C5, 0x9E4B, 0xF0C6, 0x9E4C, 0xF0C7, 0x9E4E, 0xF0C8, 0x9E51, + 0xF0C9, 0x9E55, 0xF0CA, 0x9E57, 0xF0CB, 0x9E5A, 0xF0CC, 0x9E5B, + 0xF0CD, 0x9E5C, 0xF0CE, 0x9E5E, 0xF0CF, 0x9E63, 0xF0D0, 0x9E66, + 0xF0D1, 0x9E67, 0xF0D2, 0x9E68, 0xF0D3, 0x9E69, 0xF0D4, 0x9E6A, + 0xF0D5, 0x9E6B, 0xF0D6, 0x9E6C, 0xF0D7, 0x9E71, 0xF0D8, 0x9E6D, + 0xF0D9, 0x9E73, 0xF0DA, 0x7592, 0xF0DB, 0x7594, 0xF0DC, 0x7596, + 0xF0DD, 0x75A0, 0xF0DE, 0x759D, 0xF0DF, 0x75AC, 0xF0E0, 0x75A3, + 0xF0E1, 0x75B3, 0xF0E2, 0x75B4, 0xF0E3, 0x75B8, 0xF0E4, 0x75C4, + 0xF0E5, 0x75B1, 0xF0E6, 0x75B0, 0xF0E7, 0x75C3, 0xF0E8, 0x75C2, + 0xF0E9, 0x75D6, 0xF0EA, 0x75CD, 0xF0EB, 0x75E3, 0xF0EC, 0x75E8, + 0xF0ED, 0x75E6, 0xF0EE, 0x75E4, 0xF0EF, 0x75EB, 0xF0F0, 0x75E7, + 0xF0F1, 0x7603, 0xF0F2, 0x75F1, 0xF0F3, 0x75FC, 0xF0F4, 0x75FF, + 0xF0F5, 0x7610, 0xF0F6, 0x7600, 0xF0F7, 0x7605, 0xF0F8, 0x760C, + 0xF0F9, 0x7617, 0xF0FA, 0x760A, 0xF0FB, 0x7625, 0xF0FC, 0x7618, + 0xF0FD, 0x7615, 0xF0FE, 0x7619, 0xF140, 0x998C, 0xF141, 0x998E, + 0xF142, 0x999A, 0xF143, 0x999B, 0xF144, 0x999C, 0xF145, 0x999D, + 0xF146, 0x999E, 0xF147, 0x999F, 0xF148, 0x99A0, 0xF149, 0x99A1, + 0xF14A, 0x99A2, 0xF14B, 0x99A3, 0xF14C, 0x99A4, 0xF14D, 0x99A6, + 0xF14E, 0x99A7, 0xF14F, 0x99A9, 0xF150, 0x99AA, 0xF151, 0x99AB, + 0xF152, 0x99AC, 0xF153, 0x99AD, 0xF154, 0x99AE, 0xF155, 0x99AF, + 0xF156, 0x99B0, 0xF157, 0x99B1, 0xF158, 0x99B2, 0xF159, 0x99B3, + 0xF15A, 0x99B4, 0xF15B, 0x99B5, 0xF15C, 0x99B6, 0xF15D, 0x99B7, + 0xF15E, 0x99B8, 0xF15F, 0x99B9, 0xF160, 0x99BA, 0xF161, 0x99BB, + 0xF162, 0x99BC, 0xF163, 0x99BD, 0xF164, 0x99BE, 0xF165, 0x99BF, + 0xF166, 0x99C0, 0xF167, 0x99C1, 0xF168, 0x99C2, 0xF169, 0x99C3, + 0xF16A, 0x99C4, 0xF16B, 0x99C5, 0xF16C, 0x99C6, 0xF16D, 0x99C7, + 0xF16E, 0x99C8, 0xF16F, 0x99C9, 0xF170, 0x99CA, 0xF171, 0x99CB, + 0xF172, 0x99CC, 0xF173, 0x99CD, 0xF174, 0x99CE, 0xF175, 0x99CF, + 0xF176, 0x99D0, 0xF177, 0x99D1, 0xF178, 0x99D2, 0xF179, 0x99D3, + 0xF17A, 0x99D4, 0xF17B, 0x99D5, 0xF17C, 0x99D6, 0xF17D, 0x99D7, + 0xF17E, 0x99D8, 0xF180, 0x99D9, 0xF181, 0x99DA, 0xF182, 0x99DB, + 0xF183, 0x99DC, 0xF184, 0x99DD, 0xF185, 0x99DE, 0xF186, 0x99DF, + 0xF187, 0x99E0, 0xF188, 0x99E1, 0xF189, 0x99E2, 0xF18A, 0x99E3, + 0xF18B, 0x99E4, 0xF18C, 0x99E5, 0xF18D, 0x99E6, 0xF18E, 0x99E7, + 0xF18F, 0x99E8, 0xF190, 0x99E9, 0xF191, 0x99EA, 0xF192, 0x99EB, + 0xF193, 0x99EC, 0xF194, 0x99ED, 0xF195, 0x99EE, 0xF196, 0x99EF, + 0xF197, 0x99F0, 0xF198, 0x99F1, 0xF199, 0x99F2, 0xF19A, 0x99F3, + 0xF19B, 0x99F4, 0xF19C, 0x99F5, 0xF19D, 0x99F6, 0xF19E, 0x99F7, + 0xF19F, 0x99F8, 0xF1A0, 0x99F9, 0xF1A1, 0x761B, 0xF1A2, 0x763C, + 0xF1A3, 0x7622, 0xF1A4, 0x7620, 0xF1A5, 0x7640, 0xF1A6, 0x762D, + 0xF1A7, 0x7630, 0xF1A8, 0x763F, 0xF1A9, 0x7635, 0xF1AA, 0x7643, + 0xF1AB, 0x763E, 0xF1AC, 0x7633, 0xF1AD, 0x764D, 0xF1AE, 0x765E, + 0xF1AF, 0x7654, 0xF1B0, 0x765C, 0xF1B1, 0x7656, 0xF1B2, 0x766B, + 0xF1B3, 0x766F, 0xF1B4, 0x7FCA, 0xF1B5, 0x7AE6, 0xF1B6, 0x7A78, + 0xF1B7, 0x7A79, 0xF1B8, 0x7A80, 0xF1B9, 0x7A86, 0xF1BA, 0x7A88, + 0xF1BB, 0x7A95, 0xF1BC, 0x7AA6, 0xF1BD, 0x7AA0, 0xF1BE, 0x7AAC, + 0xF1BF, 0x7AA8, 0xF1C0, 0x7AAD, 0xF1C1, 0x7AB3, 0xF1C2, 0x8864, + 0xF1C3, 0x8869, 0xF1C4, 0x8872, 0xF1C5, 0x887D, 0xF1C6, 0x887F, + 0xF1C7, 0x8882, 0xF1C8, 0x88A2, 0xF1C9, 0x88C6, 0xF1CA, 0x88B7, + 0xF1CB, 0x88BC, 0xF1CC, 0x88C9, 0xF1CD, 0x88E2, 0xF1CE, 0x88CE, + 0xF1CF, 0x88E3, 0xF1D0, 0x88E5, 0xF1D1, 0x88F1, 0xF1D2, 0x891A, + 0xF1D3, 0x88FC, 0xF1D4, 0x88E8, 0xF1D5, 0x88FE, 0xF1D6, 0x88F0, + 0xF1D7, 0x8921, 0xF1D8, 0x8919, 0xF1D9, 0x8913, 0xF1DA, 0x891B, + 0xF1DB, 0x890A, 0xF1DC, 0x8934, 0xF1DD, 0x892B, 0xF1DE, 0x8936, + 0xF1DF, 0x8941, 0xF1E0, 0x8966, 0xF1E1, 0x897B, 0xF1E2, 0x758B, + 0xF1E3, 0x80E5, 0xF1E4, 0x76B2, 0xF1E5, 0x76B4, 0xF1E6, 0x77DC, + 0xF1E7, 0x8012, 0xF1E8, 0x8014, 0xF1E9, 0x8016, 0xF1EA, 0x801C, + 0xF1EB, 0x8020, 0xF1EC, 0x8022, 0xF1ED, 0x8025, 0xF1EE, 0x8026, + 0xF1EF, 0x8027, 0xF1F0, 0x8029, 0xF1F1, 0x8028, 0xF1F2, 0x8031, + 0xF1F3, 0x800B, 0xF1F4, 0x8035, 0xF1F5, 0x8043, 0xF1F6, 0x8046, + 0xF1F7, 0x804D, 0xF1F8, 0x8052, 0xF1F9, 0x8069, 0xF1FA, 0x8071, + 0xF1FB, 0x8983, 0xF1FC, 0x9878, 0xF1FD, 0x9880, 0xF1FE, 0x9883, + 0xF240, 0x99FA, 0xF241, 0x99FB, 0xF242, 0x99FC, 0xF243, 0x99FD, + 0xF244, 0x99FE, 0xF245, 0x99FF, 0xF246, 0x9A00, 0xF247, 0x9A01, + 0xF248, 0x9A02, 0xF249, 0x9A03, 0xF24A, 0x9A04, 0xF24B, 0x9A05, + 0xF24C, 0x9A06, 0xF24D, 0x9A07, 0xF24E, 0x9A08, 0xF24F, 0x9A09, + 0xF250, 0x9A0A, 0xF251, 0x9A0B, 0xF252, 0x9A0C, 0xF253, 0x9A0D, + 0xF254, 0x9A0E, 0xF255, 0x9A0F, 0xF256, 0x9A10, 0xF257, 0x9A11, + 0xF258, 0x9A12, 0xF259, 0x9A13, 0xF25A, 0x9A14, 0xF25B, 0x9A15, + 0xF25C, 0x9A16, 0xF25D, 0x9A17, 0xF25E, 0x9A18, 0xF25F, 0x9A19, + 0xF260, 0x9A1A, 0xF261, 0x9A1B, 0xF262, 0x9A1C, 0xF263, 0x9A1D, + 0xF264, 0x9A1E, 0xF265, 0x9A1F, 0xF266, 0x9A20, 0xF267, 0x9A21, + 0xF268, 0x9A22, 0xF269, 0x9A23, 0xF26A, 0x9A24, 0xF26B, 0x9A25, + 0xF26C, 0x9A26, 0xF26D, 0x9A27, 0xF26E, 0x9A28, 0xF26F, 0x9A29, + 0xF270, 0x9A2A, 0xF271, 0x9A2B, 0xF272, 0x9A2C, 0xF273, 0x9A2D, + 0xF274, 0x9A2E, 0xF275, 0x9A2F, 0xF276, 0x9A30, 0xF277, 0x9A31, + 0xF278, 0x9A32, 0xF279, 0x9A33, 0xF27A, 0x9A34, 0xF27B, 0x9A35, + 0xF27C, 0x9A36, 0xF27D, 0x9A37, 0xF27E, 0x9A38, 0xF280, 0x9A39, + 0xF281, 0x9A3A, 0xF282, 0x9A3B, 0xF283, 0x9A3C, 0xF284, 0x9A3D, + 0xF285, 0x9A3E, 0xF286, 0x9A3F, 0xF287, 0x9A40, 0xF288, 0x9A41, + 0xF289, 0x9A42, 0xF28A, 0x9A43, 0xF28B, 0x9A44, 0xF28C, 0x9A45, + 0xF28D, 0x9A46, 0xF28E, 0x9A47, 0xF28F, 0x9A48, 0xF290, 0x9A49, + 0xF291, 0x9A4A, 0xF292, 0x9A4B, 0xF293, 0x9A4C, 0xF294, 0x9A4D, + 0xF295, 0x9A4E, 0xF296, 0x9A4F, 0xF297, 0x9A50, 0xF298, 0x9A51, + 0xF299, 0x9A52, 0xF29A, 0x9A53, 0xF29B, 0x9A54, 0xF29C, 0x9A55, + 0xF29D, 0x9A56, 0xF29E, 0x9A57, 0xF29F, 0x9A58, 0xF2A0, 0x9A59, + 0xF2A1, 0x9889, 0xF2A2, 0x988C, 0xF2A3, 0x988D, 0xF2A4, 0x988F, + 0xF2A5, 0x9894, 0xF2A6, 0x989A, 0xF2A7, 0x989B, 0xF2A8, 0x989E, + 0xF2A9, 0x989F, 0xF2AA, 0x98A1, 0xF2AB, 0x98A2, 0xF2AC, 0x98A5, + 0xF2AD, 0x98A6, 0xF2AE, 0x864D, 0xF2AF, 0x8654, 0xF2B0, 0x866C, + 0xF2B1, 0x866E, 0xF2B2, 0x867F, 0xF2B3, 0x867A, 0xF2B4, 0x867C, + 0xF2B5, 0x867B, 0xF2B6, 0x86A8, 0xF2B7, 0x868D, 0xF2B8, 0x868B, + 0xF2B9, 0x86AC, 0xF2BA, 0x869D, 0xF2BB, 0x86A7, 0xF2BC, 0x86A3, + 0xF2BD, 0x86AA, 0xF2BE, 0x8693, 0xF2BF, 0x86A9, 0xF2C0, 0x86B6, + 0xF2C1, 0x86C4, 0xF2C2, 0x86B5, 0xF2C3, 0x86CE, 0xF2C4, 0x86B0, + 0xF2C5, 0x86BA, 0xF2C6, 0x86B1, 0xF2C7, 0x86AF, 0xF2C8, 0x86C9, + 0xF2C9, 0x86CF, 0xF2CA, 0x86B4, 0xF2CB, 0x86E9, 0xF2CC, 0x86F1, + 0xF2CD, 0x86F2, 0xF2CE, 0x86ED, 0xF2CF, 0x86F3, 0xF2D0, 0x86D0, + 0xF2D1, 0x8713, 0xF2D2, 0x86DE, 0xF2D3, 0x86F4, 0xF2D4, 0x86DF, + 0xF2D5, 0x86D8, 0xF2D6, 0x86D1, 0xF2D7, 0x8703, 0xF2D8, 0x8707, + 0xF2D9, 0x86F8, 0xF2DA, 0x8708, 0xF2DB, 0x870A, 0xF2DC, 0x870D, + 0xF2DD, 0x8709, 0xF2DE, 0x8723, 0xF2DF, 0x873B, 0xF2E0, 0x871E, + 0xF2E1, 0x8725, 0xF2E2, 0x872E, 0xF2E3, 0x871A, 0xF2E4, 0x873E, + 0xF2E5, 0x8748, 0xF2E6, 0x8734, 0xF2E7, 0x8731, 0xF2E8, 0x8729, + 0xF2E9, 0x8737, 0xF2EA, 0x873F, 0xF2EB, 0x8782, 0xF2EC, 0x8722, + 0xF2ED, 0x877D, 0xF2EE, 0x877E, 0xF2EF, 0x877B, 0xF2F0, 0x8760, + 0xF2F1, 0x8770, 0xF2F2, 0x874C, 0xF2F3, 0x876E, 0xF2F4, 0x878B, + 0xF2F5, 0x8753, 0xF2F6, 0x8763, 0xF2F7, 0x877C, 0xF2F8, 0x8764, + 0xF2F9, 0x8759, 0xF2FA, 0x8765, 0xF2FB, 0x8793, 0xF2FC, 0x87AF, + 0xF2FD, 0x87A8, 0xF2FE, 0x87D2, 0xF340, 0x9A5A, 0xF341, 0x9A5B, + 0xF342, 0x9A5C, 0xF343, 0x9A5D, 0xF344, 0x9A5E, 0xF345, 0x9A5F, + 0xF346, 0x9A60, 0xF347, 0x9A61, 0xF348, 0x9A62, 0xF349, 0x9A63, + 0xF34A, 0x9A64, 0xF34B, 0x9A65, 0xF34C, 0x9A66, 0xF34D, 0x9A67, + 0xF34E, 0x9A68, 0xF34F, 0x9A69, 0xF350, 0x9A6A, 0xF351, 0x9A6B, + 0xF352, 0x9A72, 0xF353, 0x9A83, 0xF354, 0x9A89, 0xF355, 0x9A8D, + 0xF356, 0x9A8E, 0xF357, 0x9A94, 0xF358, 0x9A95, 0xF359, 0x9A99, + 0xF35A, 0x9AA6, 0xF35B, 0x9AA9, 0xF35C, 0x9AAA, 0xF35D, 0x9AAB, + 0xF35E, 0x9AAC, 0xF35F, 0x9AAD, 0xF360, 0x9AAE, 0xF361, 0x9AAF, + 0xF362, 0x9AB2, 0xF363, 0x9AB3, 0xF364, 0x9AB4, 0xF365, 0x9AB5, + 0xF366, 0x9AB9, 0xF367, 0x9ABB, 0xF368, 0x9ABD, 0xF369, 0x9ABE, + 0xF36A, 0x9ABF, 0xF36B, 0x9AC3, 0xF36C, 0x9AC4, 0xF36D, 0x9AC6, + 0xF36E, 0x9AC7, 0xF36F, 0x9AC8, 0xF370, 0x9AC9, 0xF371, 0x9ACA, + 0xF372, 0x9ACD, 0xF373, 0x9ACE, 0xF374, 0x9ACF, 0xF375, 0x9AD0, + 0xF376, 0x9AD2, 0xF377, 0x9AD4, 0xF378, 0x9AD5, 0xF379, 0x9AD6, + 0xF37A, 0x9AD7, 0xF37B, 0x9AD9, 0xF37C, 0x9ADA, 0xF37D, 0x9ADB, + 0xF37E, 0x9ADC, 0xF380, 0x9ADD, 0xF381, 0x9ADE, 0xF382, 0x9AE0, + 0xF383, 0x9AE2, 0xF384, 0x9AE3, 0xF385, 0x9AE4, 0xF386, 0x9AE5, + 0xF387, 0x9AE7, 0xF388, 0x9AE8, 0xF389, 0x9AE9, 0xF38A, 0x9AEA, + 0xF38B, 0x9AEC, 0xF38C, 0x9AEE, 0xF38D, 0x9AF0, 0xF38E, 0x9AF1, + 0xF38F, 0x9AF2, 0xF390, 0x9AF3, 0xF391, 0x9AF4, 0xF392, 0x9AF5, + 0xF393, 0x9AF6, 0xF394, 0x9AF7, 0xF395, 0x9AF8, 0xF396, 0x9AFA, + 0xF397, 0x9AFC, 0xF398, 0x9AFD, 0xF399, 0x9AFE, 0xF39A, 0x9AFF, + 0xF39B, 0x9B00, 0xF39C, 0x9B01, 0xF39D, 0x9B02, 0xF39E, 0x9B04, + 0xF39F, 0x9B05, 0xF3A0, 0x9B06, 0xF3A1, 0x87C6, 0xF3A2, 0x8788, + 0xF3A3, 0x8785, 0xF3A4, 0x87AD, 0xF3A5, 0x8797, 0xF3A6, 0x8783, + 0xF3A7, 0x87AB, 0xF3A8, 0x87E5, 0xF3A9, 0x87AC, 0xF3AA, 0x87B5, + 0xF3AB, 0x87B3, 0xF3AC, 0x87CB, 0xF3AD, 0x87D3, 0xF3AE, 0x87BD, + 0xF3AF, 0x87D1, 0xF3B0, 0x87C0, 0xF3B1, 0x87CA, 0xF3B2, 0x87DB, + 0xF3B3, 0x87EA, 0xF3B4, 0x87E0, 0xF3B5, 0x87EE, 0xF3B6, 0x8816, + 0xF3B7, 0x8813, 0xF3B8, 0x87FE, 0xF3B9, 0x880A, 0xF3BA, 0x881B, + 0xF3BB, 0x8821, 0xF3BC, 0x8839, 0xF3BD, 0x883C, 0xF3BE, 0x7F36, + 0xF3BF, 0x7F42, 0xF3C0, 0x7F44, 0xF3C1, 0x7F45, 0xF3C2, 0x8210, + 0xF3C3, 0x7AFA, 0xF3C4, 0x7AFD, 0xF3C5, 0x7B08, 0xF3C6, 0x7B03, + 0xF3C7, 0x7B04, 0xF3C8, 0x7B15, 0xF3C9, 0x7B0A, 0xF3CA, 0x7B2B, + 0xF3CB, 0x7B0F, 0xF3CC, 0x7B47, 0xF3CD, 0x7B38, 0xF3CE, 0x7B2A, + 0xF3CF, 0x7B19, 0xF3D0, 0x7B2E, 0xF3D1, 0x7B31, 0xF3D2, 0x7B20, + 0xF3D3, 0x7B25, 0xF3D4, 0x7B24, 0xF3D5, 0x7B33, 0xF3D6, 0x7B3E, + 0xF3D7, 0x7B1E, 0xF3D8, 0x7B58, 0xF3D9, 0x7B5A, 0xF3DA, 0x7B45, + 0xF3DB, 0x7B75, 0xF3DC, 0x7B4C, 0xF3DD, 0x7B5D, 0xF3DE, 0x7B60, + 0xF3DF, 0x7B6E, 0xF3E0, 0x7B7B, 0xF3E1, 0x7B62, 0xF3E2, 0x7B72, + 0xF3E3, 0x7B71, 0xF3E4, 0x7B90, 0xF3E5, 0x7BA6, 0xF3E6, 0x7BA7, + 0xF3E7, 0x7BB8, 0xF3E8, 0x7BAC, 0xF3E9, 0x7B9D, 0xF3EA, 0x7BA8, + 0xF3EB, 0x7B85, 0xF3EC, 0x7BAA, 0xF3ED, 0x7B9C, 0xF3EE, 0x7BA2, + 0xF3EF, 0x7BAB, 0xF3F0, 0x7BB4, 0xF3F1, 0x7BD1, 0xF3F2, 0x7BC1, + 0xF3F3, 0x7BCC, 0xF3F4, 0x7BDD, 0xF3F5, 0x7BDA, 0xF3F6, 0x7BE5, + 0xF3F7, 0x7BE6, 0xF3F8, 0x7BEA, 0xF3F9, 0x7C0C, 0xF3FA, 0x7BFE, + 0xF3FB, 0x7BFC, 0xF3FC, 0x7C0F, 0xF3FD, 0x7C16, 0xF3FE, 0x7C0B, + 0xF440, 0x9B07, 0xF441, 0x9B09, 0xF442, 0x9B0A, 0xF443, 0x9B0B, + 0xF444, 0x9B0C, 0xF445, 0x9B0D, 0xF446, 0x9B0E, 0xF447, 0x9B10, + 0xF448, 0x9B11, 0xF449, 0x9B12, 0xF44A, 0x9B14, 0xF44B, 0x9B15, + 0xF44C, 0x9B16, 0xF44D, 0x9B17, 0xF44E, 0x9B18, 0xF44F, 0x9B19, + 0xF450, 0x9B1A, 0xF451, 0x9B1B, 0xF452, 0x9B1C, 0xF453, 0x9B1D, + 0xF454, 0x9B1E, 0xF455, 0x9B20, 0xF456, 0x9B21, 0xF457, 0x9B22, + 0xF458, 0x9B24, 0xF459, 0x9B25, 0xF45A, 0x9B26, 0xF45B, 0x9B27, + 0xF45C, 0x9B28, 0xF45D, 0x9B29, 0xF45E, 0x9B2A, 0xF45F, 0x9B2B, + 0xF460, 0x9B2C, 0xF461, 0x9B2D, 0xF462, 0x9B2E, 0xF463, 0x9B30, + 0xF464, 0x9B31, 0xF465, 0x9B33, 0xF466, 0x9B34, 0xF467, 0x9B35, + 0xF468, 0x9B36, 0xF469, 0x9B37, 0xF46A, 0x9B38, 0xF46B, 0x9B39, + 0xF46C, 0x9B3A, 0xF46D, 0x9B3D, 0xF46E, 0x9B3E, 0xF46F, 0x9B3F, + 0xF470, 0x9B40, 0xF471, 0x9B46, 0xF472, 0x9B4A, 0xF473, 0x9B4B, + 0xF474, 0x9B4C, 0xF475, 0x9B4E, 0xF476, 0x9B50, 0xF477, 0x9B52, + 0xF478, 0x9B53, 0xF479, 0x9B55, 0xF47A, 0x9B56, 0xF47B, 0x9B57, + 0xF47C, 0x9B58, 0xF47D, 0x9B59, 0xF47E, 0x9B5A, 0xF480, 0x9B5B, + 0xF481, 0x9B5C, 0xF482, 0x9B5D, 0xF483, 0x9B5E, 0xF484, 0x9B5F, + 0xF485, 0x9B60, 0xF486, 0x9B61, 0xF487, 0x9B62, 0xF488, 0x9B63, + 0xF489, 0x9B64, 0xF48A, 0x9B65, 0xF48B, 0x9B66, 0xF48C, 0x9B67, + 0xF48D, 0x9B68, 0xF48E, 0x9B69, 0xF48F, 0x9B6A, 0xF490, 0x9B6B, + 0xF491, 0x9B6C, 0xF492, 0x9B6D, 0xF493, 0x9B6E, 0xF494, 0x9B6F, + 0xF495, 0x9B70, 0xF496, 0x9B71, 0xF497, 0x9B72, 0xF498, 0x9B73, + 0xF499, 0x9B74, 0xF49A, 0x9B75, 0xF49B, 0x9B76, 0xF49C, 0x9B77, + 0xF49D, 0x9B78, 0xF49E, 0x9B79, 0xF49F, 0x9B7A, 0xF4A0, 0x9B7B, + 0xF4A1, 0x7C1F, 0xF4A2, 0x7C2A, 0xF4A3, 0x7C26, 0xF4A4, 0x7C38, + 0xF4A5, 0x7C41, 0xF4A6, 0x7C40, 0xF4A7, 0x81FE, 0xF4A8, 0x8201, + 0xF4A9, 0x8202, 0xF4AA, 0x8204, 0xF4AB, 0x81EC, 0xF4AC, 0x8844, + 0xF4AD, 0x8221, 0xF4AE, 0x8222, 0xF4AF, 0x8223, 0xF4B0, 0x822D, + 0xF4B1, 0x822F, 0xF4B2, 0x8228, 0xF4B3, 0x822B, 0xF4B4, 0x8238, + 0xF4B5, 0x823B, 0xF4B6, 0x8233, 0xF4B7, 0x8234, 0xF4B8, 0x823E, + 0xF4B9, 0x8244, 0xF4BA, 0x8249, 0xF4BB, 0x824B, 0xF4BC, 0x824F, + 0xF4BD, 0x825A, 0xF4BE, 0x825F, 0xF4BF, 0x8268, 0xF4C0, 0x887E, + 0xF4C1, 0x8885, 0xF4C2, 0x8888, 0xF4C3, 0x88D8, 0xF4C4, 0x88DF, + 0xF4C5, 0x895E, 0xF4C6, 0x7F9D, 0xF4C7, 0x7F9F, 0xF4C8, 0x7FA7, + 0xF4C9, 0x7FAF, 0xF4CA, 0x7FB0, 0xF4CB, 0x7FB2, 0xF4CC, 0x7C7C, + 0xF4CD, 0x6549, 0xF4CE, 0x7C91, 0xF4CF, 0x7C9D, 0xF4D0, 0x7C9C, + 0xF4D1, 0x7C9E, 0xF4D2, 0x7CA2, 0xF4D3, 0x7CB2, 0xF4D4, 0x7CBC, + 0xF4D5, 0x7CBD, 0xF4D6, 0x7CC1, 0xF4D7, 0x7CC7, 0xF4D8, 0x7CCC, + 0xF4D9, 0x7CCD, 0xF4DA, 0x7CC8, 0xF4DB, 0x7CC5, 0xF4DC, 0x7CD7, + 0xF4DD, 0x7CE8, 0xF4DE, 0x826E, 0xF4DF, 0x66A8, 0xF4E0, 0x7FBF, + 0xF4E1, 0x7FCE, 0xF4E2, 0x7FD5, 0xF4E3, 0x7FE5, 0xF4E4, 0x7FE1, + 0xF4E5, 0x7FE6, 0xF4E6, 0x7FE9, 0xF4E7, 0x7FEE, 0xF4E8, 0x7FF3, + 0xF4E9, 0x7CF8, 0xF4EA, 0x7D77, 0xF4EB, 0x7DA6, 0xF4EC, 0x7DAE, + 0xF4ED, 0x7E47, 0xF4EE, 0x7E9B, 0xF4EF, 0x9EB8, 0xF4F0, 0x9EB4, + 0xF4F1, 0x8D73, 0xF4F2, 0x8D84, 0xF4F3, 0x8D94, 0xF4F4, 0x8D91, + 0xF4F5, 0x8DB1, 0xF4F6, 0x8D67, 0xF4F7, 0x8D6D, 0xF4F8, 0x8C47, + 0xF4F9, 0x8C49, 0xF4FA, 0x914A, 0xF4FB, 0x9150, 0xF4FC, 0x914E, + 0xF4FD, 0x914F, 0xF4FE, 0x9164, 0xF540, 0x9B7C, 0xF541, 0x9B7D, + 0xF542, 0x9B7E, 0xF543, 0x9B7F, 0xF544, 0x9B80, 0xF545, 0x9B81, + 0xF546, 0x9B82, 0xF547, 0x9B83, 0xF548, 0x9B84, 0xF549, 0x9B85, + 0xF54A, 0x9B86, 0xF54B, 0x9B87, 0xF54C, 0x9B88, 0xF54D, 0x9B89, + 0xF54E, 0x9B8A, 0xF54F, 0x9B8B, 0xF550, 0x9B8C, 0xF551, 0x9B8D, + 0xF552, 0x9B8E, 0xF553, 0x9B8F, 0xF554, 0x9B90, 0xF555, 0x9B91, + 0xF556, 0x9B92, 0xF557, 0x9B93, 0xF558, 0x9B94, 0xF559, 0x9B95, + 0xF55A, 0x9B96, 0xF55B, 0x9B97, 0xF55C, 0x9B98, 0xF55D, 0x9B99, + 0xF55E, 0x9B9A, 0xF55F, 0x9B9B, 0xF560, 0x9B9C, 0xF561, 0x9B9D, + 0xF562, 0x9B9E, 0xF563, 0x9B9F, 0xF564, 0x9BA0, 0xF565, 0x9BA1, + 0xF566, 0x9BA2, 0xF567, 0x9BA3, 0xF568, 0x9BA4, 0xF569, 0x9BA5, + 0xF56A, 0x9BA6, 0xF56B, 0x9BA7, 0xF56C, 0x9BA8, 0xF56D, 0x9BA9, + 0xF56E, 0x9BAA, 0xF56F, 0x9BAB, 0xF570, 0x9BAC, 0xF571, 0x9BAD, + 0xF572, 0x9BAE, 0xF573, 0x9BAF, 0xF574, 0x9BB0, 0xF575, 0x9BB1, + 0xF576, 0x9BB2, 0xF577, 0x9BB3, 0xF578, 0x9BB4, 0xF579, 0x9BB5, + 0xF57A, 0x9BB6, 0xF57B, 0x9BB7, 0xF57C, 0x9BB8, 0xF57D, 0x9BB9, + 0xF57E, 0x9BBA, 0xF580, 0x9BBB, 0xF581, 0x9BBC, 0xF582, 0x9BBD, + 0xF583, 0x9BBE, 0xF584, 0x9BBF, 0xF585, 0x9BC0, 0xF586, 0x9BC1, + 0xF587, 0x9BC2, 0xF588, 0x9BC3, 0xF589, 0x9BC4, 0xF58A, 0x9BC5, + 0xF58B, 0x9BC6, 0xF58C, 0x9BC7, 0xF58D, 0x9BC8, 0xF58E, 0x9BC9, + 0xF58F, 0x9BCA, 0xF590, 0x9BCB, 0xF591, 0x9BCC, 0xF592, 0x9BCD, + 0xF593, 0x9BCE, 0xF594, 0x9BCF, 0xF595, 0x9BD0, 0xF596, 0x9BD1, + 0xF597, 0x9BD2, 0xF598, 0x9BD3, 0xF599, 0x9BD4, 0xF59A, 0x9BD5, + 0xF59B, 0x9BD6, 0xF59C, 0x9BD7, 0xF59D, 0x9BD8, 0xF59E, 0x9BD9, + 0xF59F, 0x9BDA, 0xF5A0, 0x9BDB, 0xF5A1, 0x9162, 0xF5A2, 0x9161, + 0xF5A3, 0x9170, 0xF5A4, 0x9169, 0xF5A5, 0x916F, 0xF5A6, 0x917D, + 0xF5A7, 0x917E, 0xF5A8, 0x9172, 0xF5A9, 0x9174, 0xF5AA, 0x9179, + 0xF5AB, 0x918C, 0xF5AC, 0x9185, 0xF5AD, 0x9190, 0xF5AE, 0x918D, + 0xF5AF, 0x9191, 0xF5B0, 0x91A2, 0xF5B1, 0x91A3, 0xF5B2, 0x91AA, + 0xF5B3, 0x91AD, 0xF5B4, 0x91AE, 0xF5B5, 0x91AF, 0xF5B6, 0x91B5, + 0xF5B7, 0x91B4, 0xF5B8, 0x91BA, 0xF5B9, 0x8C55, 0xF5BA, 0x9E7E, + 0xF5BB, 0x8DB8, 0xF5BC, 0x8DEB, 0xF5BD, 0x8E05, 0xF5BE, 0x8E59, + 0xF5BF, 0x8E69, 0xF5C0, 0x8DB5, 0xF5C1, 0x8DBF, 0xF5C2, 0x8DBC, + 0xF5C3, 0x8DBA, 0xF5C4, 0x8DC4, 0xF5C5, 0x8DD6, 0xF5C6, 0x8DD7, + 0xF5C7, 0x8DDA, 0xF5C8, 0x8DDE, 0xF5C9, 0x8DCE, 0xF5CA, 0x8DCF, + 0xF5CB, 0x8DDB, 0xF5CC, 0x8DC6, 0xF5CD, 0x8DEC, 0xF5CE, 0x8DF7, + 0xF5CF, 0x8DF8, 0xF5D0, 0x8DE3, 0xF5D1, 0x8DF9, 0xF5D2, 0x8DFB, + 0xF5D3, 0x8DE4, 0xF5D4, 0x8E09, 0xF5D5, 0x8DFD, 0xF5D6, 0x8E14, + 0xF5D7, 0x8E1D, 0xF5D8, 0x8E1F, 0xF5D9, 0x8E2C, 0xF5DA, 0x8E2E, + 0xF5DB, 0x8E23, 0xF5DC, 0x8E2F, 0xF5DD, 0x8E3A, 0xF5DE, 0x8E40, + 0xF5DF, 0x8E39, 0xF5E0, 0x8E35, 0xF5E1, 0x8E3D, 0xF5E2, 0x8E31, + 0xF5E3, 0x8E49, 0xF5E4, 0x8E41, 0xF5E5, 0x8E42, 0xF5E6, 0x8E51, + 0xF5E7, 0x8E52, 0xF5E8, 0x8E4A, 0xF5E9, 0x8E70, 0xF5EA, 0x8E76, + 0xF5EB, 0x8E7C, 0xF5EC, 0x8E6F, 0xF5ED, 0x8E74, 0xF5EE, 0x8E85, + 0xF5EF, 0x8E8F, 0xF5F0, 0x8E94, 0xF5F1, 0x8E90, 0xF5F2, 0x8E9C, + 0xF5F3, 0x8E9E, 0xF5F4, 0x8C78, 0xF5F5, 0x8C82, 0xF5F6, 0x8C8A, + 0xF5F7, 0x8C85, 0xF5F8, 0x8C98, 0xF5F9, 0x8C94, 0xF5FA, 0x659B, + 0xF5FB, 0x89D6, 0xF5FC, 0x89DE, 0xF5FD, 0x89DA, 0xF5FE, 0x89DC, + 0xF640, 0x9BDC, 0xF641, 0x9BDD, 0xF642, 0x9BDE, 0xF643, 0x9BDF, + 0xF644, 0x9BE0, 0xF645, 0x9BE1, 0xF646, 0x9BE2, 0xF647, 0x9BE3, + 0xF648, 0x9BE4, 0xF649, 0x9BE5, 0xF64A, 0x9BE6, 0xF64B, 0x9BE7, + 0xF64C, 0x9BE8, 0xF64D, 0x9BE9, 0xF64E, 0x9BEA, 0xF64F, 0x9BEB, + 0xF650, 0x9BEC, 0xF651, 0x9BED, 0xF652, 0x9BEE, 0xF653, 0x9BEF, + 0xF654, 0x9BF0, 0xF655, 0x9BF1, 0xF656, 0x9BF2, 0xF657, 0x9BF3, + 0xF658, 0x9BF4, 0xF659, 0x9BF5, 0xF65A, 0x9BF6, 0xF65B, 0x9BF7, + 0xF65C, 0x9BF8, 0xF65D, 0x9BF9, 0xF65E, 0x9BFA, 0xF65F, 0x9BFB, + 0xF660, 0x9BFC, 0xF661, 0x9BFD, 0xF662, 0x9BFE, 0xF663, 0x9BFF, + 0xF664, 0x9C00, 0xF665, 0x9C01, 0xF666, 0x9C02, 0xF667, 0x9C03, + 0xF668, 0x9C04, 0xF669, 0x9C05, 0xF66A, 0x9C06, 0xF66B, 0x9C07, + 0xF66C, 0x9C08, 0xF66D, 0x9C09, 0xF66E, 0x9C0A, 0xF66F, 0x9C0B, + 0xF670, 0x9C0C, 0xF671, 0x9C0D, 0xF672, 0x9C0E, 0xF673, 0x9C0F, + 0xF674, 0x9C10, 0xF675, 0x9C11, 0xF676, 0x9C12, 0xF677, 0x9C13, + 0xF678, 0x9C14, 0xF679, 0x9C15, 0xF67A, 0x9C16, 0xF67B, 0x9C17, + 0xF67C, 0x9C18, 0xF67D, 0x9C19, 0xF67E, 0x9C1A, 0xF680, 0x9C1B, + 0xF681, 0x9C1C, 0xF682, 0x9C1D, 0xF683, 0x9C1E, 0xF684, 0x9C1F, + 0xF685, 0x9C20, 0xF686, 0x9C21, 0xF687, 0x9C22, 0xF688, 0x9C23, + 0xF689, 0x9C24, 0xF68A, 0x9C25, 0xF68B, 0x9C26, 0xF68C, 0x9C27, + 0xF68D, 0x9C28, 0xF68E, 0x9C29, 0xF68F, 0x9C2A, 0xF690, 0x9C2B, + 0xF691, 0x9C2C, 0xF692, 0x9C2D, 0xF693, 0x9C2E, 0xF694, 0x9C2F, + 0xF695, 0x9C30, 0xF696, 0x9C31, 0xF697, 0x9C32, 0xF698, 0x9C33, + 0xF699, 0x9C34, 0xF69A, 0x9C35, 0xF69B, 0x9C36, 0xF69C, 0x9C37, + 0xF69D, 0x9C38, 0xF69E, 0x9C39, 0xF69F, 0x9C3A, 0xF6A0, 0x9C3B, + 0xF6A1, 0x89E5, 0xF6A2, 0x89EB, 0xF6A3, 0x89EF, 0xF6A4, 0x8A3E, + 0xF6A5, 0x8B26, 0xF6A6, 0x9753, 0xF6A7, 0x96E9, 0xF6A8, 0x96F3, + 0xF6A9, 0x96EF, 0xF6AA, 0x9706, 0xF6AB, 0x9701, 0xF6AC, 0x9708, + 0xF6AD, 0x970F, 0xF6AE, 0x970E, 0xF6AF, 0x972A, 0xF6B0, 0x972D, + 0xF6B1, 0x9730, 0xF6B2, 0x973E, 0xF6B3, 0x9F80, 0xF6B4, 0x9F83, + 0xF6B5, 0x9F85, 0xF6B6, 0x9F86, 0xF6B7, 0x9F87, 0xF6B8, 0x9F88, + 0xF6B9, 0x9F89, 0xF6BA, 0x9F8A, 0xF6BB, 0x9F8C, 0xF6BC, 0x9EFE, + 0xF6BD, 0x9F0B, 0xF6BE, 0x9F0D, 0xF6BF, 0x96B9, 0xF6C0, 0x96BC, + 0xF6C1, 0x96BD, 0xF6C2, 0x96CE, 0xF6C3, 0x96D2, 0xF6C4, 0x77BF, + 0xF6C5, 0x96E0, 0xF6C6, 0x928E, 0xF6C7, 0x92AE, 0xF6C8, 0x92C8, + 0xF6C9, 0x933E, 0xF6CA, 0x936A, 0xF6CB, 0x93CA, 0xF6CC, 0x938F, + 0xF6CD, 0x943E, 0xF6CE, 0x946B, 0xF6CF, 0x9C7F, 0xF6D0, 0x9C82, + 0xF6D1, 0x9C85, 0xF6D2, 0x9C86, 0xF6D3, 0x9C87, 0xF6D4, 0x9C88, + 0xF6D5, 0x7A23, 0xF6D6, 0x9C8B, 0xF6D7, 0x9C8E, 0xF6D8, 0x9C90, + 0xF6D9, 0x9C91, 0xF6DA, 0x9C92, 0xF6DB, 0x9C94, 0xF6DC, 0x9C95, + 0xF6DD, 0x9C9A, 0xF6DE, 0x9C9B, 0xF6DF, 0x9C9E, 0xF6E0, 0x9C9F, + 0xF6E1, 0x9CA0, 0xF6E2, 0x9CA1, 0xF6E3, 0x9CA2, 0xF6E4, 0x9CA3, + 0xF6E5, 0x9CA5, 0xF6E6, 0x9CA6, 0xF6E7, 0x9CA7, 0xF6E8, 0x9CA8, + 0xF6E9, 0x9CA9, 0xF6EA, 0x9CAB, 0xF6EB, 0x9CAD, 0xF6EC, 0x9CAE, + 0xF6ED, 0x9CB0, 0xF6EE, 0x9CB1, 0xF6EF, 0x9CB2, 0xF6F0, 0x9CB3, + 0xF6F1, 0x9CB4, 0xF6F2, 0x9CB5, 0xF6F3, 0x9CB6, 0xF6F4, 0x9CB7, + 0xF6F5, 0x9CBA, 0xF6F6, 0x9CBB, 0xF6F7, 0x9CBC, 0xF6F8, 0x9CBD, + 0xF6F9, 0x9CC4, 0xF6FA, 0x9CC5, 0xF6FB, 0x9CC6, 0xF6FC, 0x9CC7, + 0xF6FD, 0x9CCA, 0xF6FE, 0x9CCB, 0xF740, 0x9C3C, 0xF741, 0x9C3D, + 0xF742, 0x9C3E, 0xF743, 0x9C3F, 0xF744, 0x9C40, 0xF745, 0x9C41, + 0xF746, 0x9C42, 0xF747, 0x9C43, 0xF748, 0x9C44, 0xF749, 0x9C45, + 0xF74A, 0x9C46, 0xF74B, 0x9C47, 0xF74C, 0x9C48, 0xF74D, 0x9C49, + 0xF74E, 0x9C4A, 0xF74F, 0x9C4B, 0xF750, 0x9C4C, 0xF751, 0x9C4D, + 0xF752, 0x9C4E, 0xF753, 0x9C4F, 0xF754, 0x9C50, 0xF755, 0x9C51, + 0xF756, 0x9C52, 0xF757, 0x9C53, 0xF758, 0x9C54, 0xF759, 0x9C55, + 0xF75A, 0x9C56, 0xF75B, 0x9C57, 0xF75C, 0x9C58, 0xF75D, 0x9C59, + 0xF75E, 0x9C5A, 0xF75F, 0x9C5B, 0xF760, 0x9C5C, 0xF761, 0x9C5D, + 0xF762, 0x9C5E, 0xF763, 0x9C5F, 0xF764, 0x9C60, 0xF765, 0x9C61, + 0xF766, 0x9C62, 0xF767, 0x9C63, 0xF768, 0x9C64, 0xF769, 0x9C65, + 0xF76A, 0x9C66, 0xF76B, 0x9C67, 0xF76C, 0x9C68, 0xF76D, 0x9C69, + 0xF76E, 0x9C6A, 0xF76F, 0x9C6B, 0xF770, 0x9C6C, 0xF771, 0x9C6D, + 0xF772, 0x9C6E, 0xF773, 0x9C6F, 0xF774, 0x9C70, 0xF775, 0x9C71, + 0xF776, 0x9C72, 0xF777, 0x9C73, 0xF778, 0x9C74, 0xF779, 0x9C75, + 0xF77A, 0x9C76, 0xF77B, 0x9C77, 0xF77C, 0x9C78, 0xF77D, 0x9C79, + 0xF77E, 0x9C7A, 0xF780, 0x9C7B, 0xF781, 0x9C7D, 0xF782, 0x9C7E, + 0xF783, 0x9C80, 0xF784, 0x9C83, 0xF785, 0x9C84, 0xF786, 0x9C89, + 0xF787, 0x9C8A, 0xF788, 0x9C8C, 0xF789, 0x9C8F, 0xF78A, 0x9C93, + 0xF78B, 0x9C96, 0xF78C, 0x9C97, 0xF78D, 0x9C98, 0xF78E, 0x9C99, + 0xF78F, 0x9C9D, 0xF790, 0x9CAA, 0xF791, 0x9CAC, 0xF792, 0x9CAF, + 0xF793, 0x9CB9, 0xF794, 0x9CBE, 0xF795, 0x9CBF, 0xF796, 0x9CC0, + 0xF797, 0x9CC1, 0xF798, 0x9CC2, 0xF799, 0x9CC8, 0xF79A, 0x9CC9, + 0xF79B, 0x9CD1, 0xF79C, 0x9CD2, 0xF79D, 0x9CDA, 0xF79E, 0x9CDB, + 0xF79F, 0x9CE0, 0xF7A0, 0x9CE1, 0xF7A1, 0x9CCC, 0xF7A2, 0x9CCD, + 0xF7A3, 0x9CCE, 0xF7A4, 0x9CCF, 0xF7A5, 0x9CD0, 0xF7A6, 0x9CD3, + 0xF7A7, 0x9CD4, 0xF7A8, 0x9CD5, 0xF7A9, 0x9CD7, 0xF7AA, 0x9CD8, + 0xF7AB, 0x9CD9, 0xF7AC, 0x9CDC, 0xF7AD, 0x9CDD, 0xF7AE, 0x9CDF, + 0xF7AF, 0x9CE2, 0xF7B0, 0x977C, 0xF7B1, 0x9785, 0xF7B2, 0x9791, + 0xF7B3, 0x9792, 0xF7B4, 0x9794, 0xF7B5, 0x97AF, 0xF7B6, 0x97AB, + 0xF7B7, 0x97A3, 0xF7B8, 0x97B2, 0xF7B9, 0x97B4, 0xF7BA, 0x9AB1, + 0xF7BB, 0x9AB0, 0xF7BC, 0x9AB7, 0xF7BD, 0x9E58, 0xF7BE, 0x9AB6, + 0xF7BF, 0x9ABA, 0xF7C0, 0x9ABC, 0xF7C1, 0x9AC1, 0xF7C2, 0x9AC0, + 0xF7C3, 0x9AC5, 0xF7C4, 0x9AC2, 0xF7C5, 0x9ACB, 0xF7C6, 0x9ACC, + 0xF7C7, 0x9AD1, 0xF7C8, 0x9B45, 0xF7C9, 0x9B43, 0xF7CA, 0x9B47, + 0xF7CB, 0x9B49, 0xF7CC, 0x9B48, 0xF7CD, 0x9B4D, 0xF7CE, 0x9B51, + 0xF7CF, 0x98E8, 0xF7D0, 0x990D, 0xF7D1, 0x992E, 0xF7D2, 0x9955, + 0xF7D3, 0x9954, 0xF7D4, 0x9ADF, 0xF7D5, 0x9AE1, 0xF7D6, 0x9AE6, + 0xF7D7, 0x9AEF, 0xF7D8, 0x9AEB, 0xF7D9, 0x9AFB, 0xF7DA, 0x9AED, + 0xF7DB, 0x9AF9, 0xF7DC, 0x9B08, 0xF7DD, 0x9B0F, 0xF7DE, 0x9B13, + 0xF7DF, 0x9B1F, 0xF7E0, 0x9B23, 0xF7E1, 0x9EBD, 0xF7E2, 0x9EBE, + 0xF7E3, 0x7E3B, 0xF7E4, 0x9E82, 0xF7E5, 0x9E87, 0xF7E6, 0x9E88, + 0xF7E7, 0x9E8B, 0xF7E8, 0x9E92, 0xF7E9, 0x93D6, 0xF7EA, 0x9E9D, + 0xF7EB, 0x9E9F, 0xF7EC, 0x9EDB, 0xF7ED, 0x9EDC, 0xF7EE, 0x9EDD, + 0xF7EF, 0x9EE0, 0xF7F0, 0x9EDF, 0xF7F1, 0x9EE2, 0xF7F2, 0x9EE9, + 0xF7F3, 0x9EE7, 0xF7F4, 0x9EE5, 0xF7F5, 0x9EEA, 0xF7F6, 0x9EEF, + 0xF7F7, 0x9F22, 0xF7F8, 0x9F2C, 0xF7F9, 0x9F2F, 0xF7FA, 0x9F39, + 0xF7FB, 0x9F37, 0xF7FC, 0x9F3D, 0xF7FD, 0x9F3E, 0xF7FE, 0x9F44, + 0xF840, 0x9CE3, 0xF841, 0x9CE4, 0xF842, 0x9CE5, 0xF843, 0x9CE6, + 0xF844, 0x9CE7, 0xF845, 0x9CE8, 0xF846, 0x9CE9, 0xF847, 0x9CEA, + 0xF848, 0x9CEB, 0xF849, 0x9CEC, 0xF84A, 0x9CED, 0xF84B, 0x9CEE, + 0xF84C, 0x9CEF, 0xF84D, 0x9CF0, 0xF84E, 0x9CF1, 0xF84F, 0x9CF2, + 0xF850, 0x9CF3, 0xF851, 0x9CF4, 0xF852, 0x9CF5, 0xF853, 0x9CF6, + 0xF854, 0x9CF7, 0xF855, 0x9CF8, 0xF856, 0x9CF9, 0xF857, 0x9CFA, + 0xF858, 0x9CFB, 0xF859, 0x9CFC, 0xF85A, 0x9CFD, 0xF85B, 0x9CFE, + 0xF85C, 0x9CFF, 0xF85D, 0x9D00, 0xF85E, 0x9D01, 0xF85F, 0x9D02, + 0xF860, 0x9D03, 0xF861, 0x9D04, 0xF862, 0x9D05, 0xF863, 0x9D06, + 0xF864, 0x9D07, 0xF865, 0x9D08, 0xF866, 0x9D09, 0xF867, 0x9D0A, + 0xF868, 0x9D0B, 0xF869, 0x9D0C, 0xF86A, 0x9D0D, 0xF86B, 0x9D0E, + 0xF86C, 0x9D0F, 0xF86D, 0x9D10, 0xF86E, 0x9D11, 0xF86F, 0x9D12, + 0xF870, 0x9D13, 0xF871, 0x9D14, 0xF872, 0x9D15, 0xF873, 0x9D16, + 0xF874, 0x9D17, 0xF875, 0x9D18, 0xF876, 0x9D19, 0xF877, 0x9D1A, + 0xF878, 0x9D1B, 0xF879, 0x9D1C, 0xF87A, 0x9D1D, 0xF87B, 0x9D1E, + 0xF87C, 0x9D1F, 0xF87D, 0x9D20, 0xF87E, 0x9D21, 0xF880, 0x9D22, + 0xF881, 0x9D23, 0xF882, 0x9D24, 0xF883, 0x9D25, 0xF884, 0x9D26, + 0xF885, 0x9D27, 0xF886, 0x9D28, 0xF887, 0x9D29, 0xF888, 0x9D2A, + 0xF889, 0x9D2B, 0xF88A, 0x9D2C, 0xF88B, 0x9D2D, 0xF88C, 0x9D2E, + 0xF88D, 0x9D2F, 0xF88E, 0x9D30, 0xF88F, 0x9D31, 0xF890, 0x9D32, + 0xF891, 0x9D33, 0xF892, 0x9D34, 0xF893, 0x9D35, 0xF894, 0x9D36, + 0xF895, 0x9D37, 0xF896, 0x9D38, 0xF897, 0x9D39, 0xF898, 0x9D3A, + 0xF899, 0x9D3B, 0xF89A, 0x9D3C, 0xF89B, 0x9D3D, 0xF89C, 0x9D3E, + 0xF89D, 0x9D3F, 0xF89E, 0x9D40, 0xF89F, 0x9D41, 0xF8A0, 0x9D42, + 0xF940, 0x9D43, 0xF941, 0x9D44, 0xF942, 0x9D45, 0xF943, 0x9D46, + 0xF944, 0x9D47, 0xF945, 0x9D48, 0xF946, 0x9D49, 0xF947, 0x9D4A, + 0xF948, 0x9D4B, 0xF949, 0x9D4C, 0xF94A, 0x9D4D, 0xF94B, 0x9D4E, + 0xF94C, 0x9D4F, 0xF94D, 0x9D50, 0xF94E, 0x9D51, 0xF94F, 0x9D52, + 0xF950, 0x9D53, 0xF951, 0x9D54, 0xF952, 0x9D55, 0xF953, 0x9D56, + 0xF954, 0x9D57, 0xF955, 0x9D58, 0xF956, 0x9D59, 0xF957, 0x9D5A, + 0xF958, 0x9D5B, 0xF959, 0x9D5C, 0xF95A, 0x9D5D, 0xF95B, 0x9D5E, + 0xF95C, 0x9D5F, 0xF95D, 0x9D60, 0xF95E, 0x9D61, 0xF95F, 0x9D62, + 0xF960, 0x9D63, 0xF961, 0x9D64, 0xF962, 0x9D65, 0xF963, 0x9D66, + 0xF964, 0x9D67, 0xF965, 0x9D68, 0xF966, 0x9D69, 0xF967, 0x9D6A, + 0xF968, 0x9D6B, 0xF969, 0x9D6C, 0xF96A, 0x9D6D, 0xF96B, 0x9D6E, + 0xF96C, 0x9D6F, 0xF96D, 0x9D70, 0xF96E, 0x9D71, 0xF96F, 0x9D72, + 0xF970, 0x9D73, 0xF971, 0x9D74, 0xF972, 0x9D75, 0xF973, 0x9D76, + 0xF974, 0x9D77, 0xF975, 0x9D78, 0xF976, 0x9D79, 0xF977, 0x9D7A, + 0xF978, 0x9D7B, 0xF979, 0x9D7C, 0xF97A, 0x9D7D, 0xF97B, 0x9D7E, + 0xF97C, 0x9D7F, 0xF97D, 0x9D80, 0xF97E, 0x9D81, 0xF980, 0x9D82, + 0xF981, 0x9D83, 0xF982, 0x9D84, 0xF983, 0x9D85, 0xF984, 0x9D86, + 0xF985, 0x9D87, 0xF986, 0x9D88, 0xF987, 0x9D89, 0xF988, 0x9D8A, + 0xF989, 0x9D8B, 0xF98A, 0x9D8C, 0xF98B, 0x9D8D, 0xF98C, 0x9D8E, + 0xF98D, 0x9D8F, 0xF98E, 0x9D90, 0xF98F, 0x9D91, 0xF990, 0x9D92, + 0xF991, 0x9D93, 0xF992, 0x9D94, 0xF993, 0x9D95, 0xF994, 0x9D96, + 0xF995, 0x9D97, 0xF996, 0x9D98, 0xF997, 0x9D99, 0xF998, 0x9D9A, + 0xF999, 0x9D9B, 0xF99A, 0x9D9C, 0xF99B, 0x9D9D, 0xF99C, 0x9D9E, + 0xF99D, 0x9D9F, 0xF99E, 0x9DA0, 0xF99F, 0x9DA1, 0xF9A0, 0x9DA2, + 0xFA40, 0x9DA3, 0xFA41, 0x9DA4, 0xFA42, 0x9DA5, 0xFA43, 0x9DA6, + 0xFA44, 0x9DA7, 0xFA45, 0x9DA8, 0xFA46, 0x9DA9, 0xFA47, 0x9DAA, + 0xFA48, 0x9DAB, 0xFA49, 0x9DAC, 0xFA4A, 0x9DAD, 0xFA4B, 0x9DAE, + 0xFA4C, 0x9DAF, 0xFA4D, 0x9DB0, 0xFA4E, 0x9DB1, 0xFA4F, 0x9DB2, + 0xFA50, 0x9DB3, 0xFA51, 0x9DB4, 0xFA52, 0x9DB5, 0xFA53, 0x9DB6, + 0xFA54, 0x9DB7, 0xFA55, 0x9DB8, 0xFA56, 0x9DB9, 0xFA57, 0x9DBA, + 0xFA58, 0x9DBB, 0xFA59, 0x9DBC, 0xFA5A, 0x9DBD, 0xFA5B, 0x9DBE, + 0xFA5C, 0x9DBF, 0xFA5D, 0x9DC0, 0xFA5E, 0x9DC1, 0xFA5F, 0x9DC2, + 0xFA60, 0x9DC3, 0xFA61, 0x9DC4, 0xFA62, 0x9DC5, 0xFA63, 0x9DC6, + 0xFA64, 0x9DC7, 0xFA65, 0x9DC8, 0xFA66, 0x9DC9, 0xFA67, 0x9DCA, + 0xFA68, 0x9DCB, 0xFA69, 0x9DCC, 0xFA6A, 0x9DCD, 0xFA6B, 0x9DCE, + 0xFA6C, 0x9DCF, 0xFA6D, 0x9DD0, 0xFA6E, 0x9DD1, 0xFA6F, 0x9DD2, + 0xFA70, 0x9DD3, 0xFA71, 0x9DD4, 0xFA72, 0x9DD5, 0xFA73, 0x9DD6, + 0xFA74, 0x9DD7, 0xFA75, 0x9DD8, 0xFA76, 0x9DD9, 0xFA77, 0x9DDA, + 0xFA78, 0x9DDB, 0xFA79, 0x9DDC, 0xFA7A, 0x9DDD, 0xFA7B, 0x9DDE, + 0xFA7C, 0x9DDF, 0xFA7D, 0x9DE0, 0xFA7E, 0x9DE1, 0xFA80, 0x9DE2, + 0xFA81, 0x9DE3, 0xFA82, 0x9DE4, 0xFA83, 0x9DE5, 0xFA84, 0x9DE6, + 0xFA85, 0x9DE7, 0xFA86, 0x9DE8, 0xFA87, 0x9DE9, 0xFA88, 0x9DEA, + 0xFA89, 0x9DEB, 0xFA8A, 0x9DEC, 0xFA8B, 0x9DED, 0xFA8C, 0x9DEE, + 0xFA8D, 0x9DEF, 0xFA8E, 0x9DF0, 0xFA8F, 0x9DF1, 0xFA90, 0x9DF2, + 0xFA91, 0x9DF3, 0xFA92, 0x9DF4, 0xFA93, 0x9DF5, 0xFA94, 0x9DF6, + 0xFA95, 0x9DF7, 0xFA96, 0x9DF8, 0xFA97, 0x9DF9, 0xFA98, 0x9DFA, + 0xFA99, 0x9DFB, 0xFA9A, 0x9DFC, 0xFA9B, 0x9DFD, 0xFA9C, 0x9DFE, + 0xFA9D, 0x9DFF, 0xFA9E, 0x9E00, 0xFA9F, 0x9E01, 0xFAA0, 0x9E02, + 0xFB40, 0x9E03, 0xFB41, 0x9E04, 0xFB42, 0x9E05, 0xFB43, 0x9E06, + 0xFB44, 0x9E07, 0xFB45, 0x9E08, 0xFB46, 0x9E09, 0xFB47, 0x9E0A, + 0xFB48, 0x9E0B, 0xFB49, 0x9E0C, 0xFB4A, 0x9E0D, 0xFB4B, 0x9E0E, + 0xFB4C, 0x9E0F, 0xFB4D, 0x9E10, 0xFB4E, 0x9E11, 0xFB4F, 0x9E12, + 0xFB50, 0x9E13, 0xFB51, 0x9E14, 0xFB52, 0x9E15, 0xFB53, 0x9E16, + 0xFB54, 0x9E17, 0xFB55, 0x9E18, 0xFB56, 0x9E19, 0xFB57, 0x9E1A, + 0xFB58, 0x9E1B, 0xFB59, 0x9E1C, 0xFB5A, 0x9E1D, 0xFB5B, 0x9E1E, + 0xFB5C, 0x9E24, 0xFB5D, 0x9E27, 0xFB5E, 0x9E2E, 0xFB5F, 0x9E30, + 0xFB60, 0x9E34, 0xFB61, 0x9E3B, 0xFB62, 0x9E3C, 0xFB63, 0x9E40, + 0xFB64, 0x9E4D, 0xFB65, 0x9E50, 0xFB66, 0x9E52, 0xFB67, 0x9E53, + 0xFB68, 0x9E54, 0xFB69, 0x9E56, 0xFB6A, 0x9E59, 0xFB6B, 0x9E5D, + 0xFB6C, 0x9E5F, 0xFB6D, 0x9E60, 0xFB6E, 0x9E61, 0xFB6F, 0x9E62, + 0xFB70, 0x9E65, 0xFB71, 0x9E6E, 0xFB72, 0x9E6F, 0xFB73, 0x9E72, + 0xFB74, 0x9E74, 0xFB75, 0x9E75, 0xFB76, 0x9E76, 0xFB77, 0x9E77, + 0xFB78, 0x9E78, 0xFB79, 0x9E79, 0xFB7A, 0x9E7A, 0xFB7B, 0x9E7B, + 0xFB7C, 0x9E7C, 0xFB7D, 0x9E7D, 0xFB7E, 0x9E80, 0xFB80, 0x9E81, + 0xFB81, 0x9E83, 0xFB82, 0x9E84, 0xFB83, 0x9E85, 0xFB84, 0x9E86, + 0xFB85, 0x9E89, 0xFB86, 0x9E8A, 0xFB87, 0x9E8C, 0xFB88, 0x9E8D, + 0xFB89, 0x9E8E, 0xFB8A, 0x9E8F, 0xFB8B, 0x9E90, 0xFB8C, 0x9E91, + 0xFB8D, 0x9E94, 0xFB8E, 0x9E95, 0xFB8F, 0x9E96, 0xFB90, 0x9E97, + 0xFB91, 0x9E98, 0xFB92, 0x9E99, 0xFB93, 0x9E9A, 0xFB94, 0x9E9B, + 0xFB95, 0x9E9C, 0xFB96, 0x9E9E, 0xFB97, 0x9EA0, 0xFB98, 0x9EA1, + 0xFB99, 0x9EA2, 0xFB9A, 0x9EA3, 0xFB9B, 0x9EA4, 0xFB9C, 0x9EA5, + 0xFB9D, 0x9EA7, 0xFB9E, 0x9EA8, 0xFB9F, 0x9EA9, 0xFBA0, 0x9EAA, + 0xFC40, 0x9EAB, 0xFC41, 0x9EAC, 0xFC42, 0x9EAD, 0xFC43, 0x9EAE, + 0xFC44, 0x9EAF, 0xFC45, 0x9EB0, 0xFC46, 0x9EB1, 0xFC47, 0x9EB2, + 0xFC48, 0x9EB3, 0xFC49, 0x9EB5, 0xFC4A, 0x9EB6, 0xFC4B, 0x9EB7, + 0xFC4C, 0x9EB9, 0xFC4D, 0x9EBA, 0xFC4E, 0x9EBC, 0xFC4F, 0x9EBF, + 0xFC50, 0x9EC0, 0xFC51, 0x9EC1, 0xFC52, 0x9EC2, 0xFC53, 0x9EC3, + 0xFC54, 0x9EC5, 0xFC55, 0x9EC6, 0xFC56, 0x9EC7, 0xFC57, 0x9EC8, + 0xFC58, 0x9ECA, 0xFC59, 0x9ECB, 0xFC5A, 0x9ECC, 0xFC5B, 0x9ED0, + 0xFC5C, 0x9ED2, 0xFC5D, 0x9ED3, 0xFC5E, 0x9ED5, 0xFC5F, 0x9ED6, + 0xFC60, 0x9ED7, 0xFC61, 0x9ED9, 0xFC62, 0x9EDA, 0xFC63, 0x9EDE, + 0xFC64, 0x9EE1, 0xFC65, 0x9EE3, 0xFC66, 0x9EE4, 0xFC67, 0x9EE6, + 0xFC68, 0x9EE8, 0xFC69, 0x9EEB, 0xFC6A, 0x9EEC, 0xFC6B, 0x9EED, + 0xFC6C, 0x9EEE, 0xFC6D, 0x9EF0, 0xFC6E, 0x9EF1, 0xFC6F, 0x9EF2, + 0xFC70, 0x9EF3, 0xFC71, 0x9EF4, 0xFC72, 0x9EF5, 0xFC73, 0x9EF6, + 0xFC74, 0x9EF7, 0xFC75, 0x9EF8, 0xFC76, 0x9EFA, 0xFC77, 0x9EFD, + 0xFC78, 0x9EFF, 0xFC79, 0x9F00, 0xFC7A, 0x9F01, 0xFC7B, 0x9F02, + 0xFC7C, 0x9F03, 0xFC7D, 0x9F04, 0xFC7E, 0x9F05, 0xFC80, 0x9F06, + 0xFC81, 0x9F07, 0xFC82, 0x9F08, 0xFC83, 0x9F09, 0xFC84, 0x9F0A, + 0xFC85, 0x9F0C, 0xFC86, 0x9F0F, 0xFC87, 0x9F11, 0xFC88, 0x9F12, + 0xFC89, 0x9F14, 0xFC8A, 0x9F15, 0xFC8B, 0x9F16, 0xFC8C, 0x9F18, + 0xFC8D, 0x9F1A, 0xFC8E, 0x9F1B, 0xFC8F, 0x9F1C, 0xFC90, 0x9F1D, + 0xFC91, 0x9F1E, 0xFC92, 0x9F1F, 0xFC93, 0x9F21, 0xFC94, 0x9F23, + 0xFC95, 0x9F24, 0xFC96, 0x9F25, 0xFC97, 0x9F26, 0xFC98, 0x9F27, + 0xFC99, 0x9F28, 0xFC9A, 0x9F29, 0xFC9B, 0x9F2A, 0xFC9C, 0x9F2B, + 0xFC9D, 0x9F2D, 0xFC9E, 0x9F2E, 0xFC9F, 0x9F30, 0xFCA0, 0x9F31, + 0xFD40, 0x9F32, 0xFD41, 0x9F33, 0xFD42, 0x9F34, 0xFD43, 0x9F35, + 0xFD44, 0x9F36, 0xFD45, 0x9F38, 0xFD46, 0x9F3A, 0xFD47, 0x9F3C, + 0xFD48, 0x9F3F, 0xFD49, 0x9F40, 0xFD4A, 0x9F41, 0xFD4B, 0x9F42, + 0xFD4C, 0x9F43, 0xFD4D, 0x9F45, 0xFD4E, 0x9F46, 0xFD4F, 0x9F47, + 0xFD50, 0x9F48, 0xFD51, 0x9F49, 0xFD52, 0x9F4A, 0xFD53, 0x9F4B, + 0xFD54, 0x9F4C, 0xFD55, 0x9F4D, 0xFD56, 0x9F4E, 0xFD57, 0x9F4F, + 0xFD58, 0x9F52, 0xFD59, 0x9F53, 0xFD5A, 0x9F54, 0xFD5B, 0x9F55, + 0xFD5C, 0x9F56, 0xFD5D, 0x9F57, 0xFD5E, 0x9F58, 0xFD5F, 0x9F59, + 0xFD60, 0x9F5A, 0xFD61, 0x9F5B, 0xFD62, 0x9F5C, 0xFD63, 0x9F5D, + 0xFD64, 0x9F5E, 0xFD65, 0x9F5F, 0xFD66, 0x9F60, 0xFD67, 0x9F61, + 0xFD68, 0x9F62, 0xFD69, 0x9F63, 0xFD6A, 0x9F64, 0xFD6B, 0x9F65, + 0xFD6C, 0x9F66, 0xFD6D, 0x9F67, 0xFD6E, 0x9F68, 0xFD6F, 0x9F69, + 0xFD70, 0x9F6A, 0xFD71, 0x9F6B, 0xFD72, 0x9F6C, 0xFD73, 0x9F6D, + 0xFD74, 0x9F6E, 0xFD75, 0x9F6F, 0xFD76, 0x9F70, 0xFD77, 0x9F71, + 0xFD78, 0x9F72, 0xFD79, 0x9F73, 0xFD7A, 0x9F74, 0xFD7B, 0x9F75, + 0xFD7C, 0x9F76, 0xFD7D, 0x9F77, 0xFD7E, 0x9F78, 0xFD80, 0x9F79, + 0xFD81, 0x9F7A, 0xFD82, 0x9F7B, 0xFD83, 0x9F7C, 0xFD84, 0x9F7D, + 0xFD85, 0x9F7E, 0xFD86, 0x9F81, 0xFD87, 0x9F82, 0xFD88, 0x9F8D, + 0xFD89, 0x9F8E, 0xFD8A, 0x9F8F, 0xFD8B, 0x9F90, 0xFD8C, 0x9F91, + 0xFD8D, 0x9F92, 0xFD8E, 0x9F93, 0xFD8F, 0x9F94, 0xFD90, 0x9F95, + 0xFD91, 0x9F96, 0xFD92, 0x9F97, 0xFD93, 0x9F98, 0xFD94, 0x9F9C, + 0xFD95, 0x9F9D, 0xFD96, 0x9F9E, 0xFD97, 0x9FA1, 0xFD98, 0x9FA2, + 0xFD99, 0x9FA3, 0xFD9A, 0x9FA4, 0xFD9B, 0x9FA5, 0xFD9C, 0xF92C, + 0xFD9D, 0xF979, 0xFD9E, 0xF995, 0xFD9F, 0xF9E7, 0xFDA0, 0xF9F1, + 0xFE40, 0xFA0C, 0xFE41, 0xFA0D, 0xFE42, 0xFA0E, 0xFE43, 0xFA0F, + 0xFE44, 0xFA11, 0xFE45, 0xFA13, 0xFE46, 0xFA14, 0xFE47, 0xFA18, + 0xFE48, 0xFA1F, 0xFE49, 0xFA20, 0xFE4A, 0xFA21, 0xFE4B, 0xFA23, + 0xFE4C, 0xFA24, 0xFE4D, 0xFA27, 0xFE4E, 0xFA28, 0xFE4F, 0xFA29, + 0, 0 +}; + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src < 0x80) { /* ASCII */ + c = src; + } else { + if (dir) { /* OEMCP to unicode */ + p = oem2uni; + hi = sizeof(oem2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2oem; + hi = sizeof(uni2oem) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; + } + + return c; +} +#else +#error This file is not needed in current configuration. + +#endif diff --git a/bertos/fs/fatfs/option/cc949.c b/bertos/fs/fatfs/option/cc949.c new file mode 100644 index 0000000..8967985 --- /dev/null +++ b/bertos/fs/fatfs/option/cc949.c @@ -0,0 +1,8588 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP949 (Korean) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + + +#if _USE_LFN && _CODE_PAGE == 949 + + +static +const WCHAR uni2oem[] = { +/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ + 0x00A1, 0xA2AE, 0x00A4, 0xA2B4, 0x00A7, 0xA1D7, 0x00A8, 0xA1A7, + 0x00AA, 0xA8A3, 0x00AD, 0xA1A9, 0x00AE, 0xA2E7, 0x00B0, 0xA1C6, + 0x00B1, 0xA1BE, 0x00B2, 0xA9F7, 0x00B3, 0xA9F8, 0x00B4, 0xA2A5, + 0x00B6, 0xA2D2, 0x00B7, 0xA1A4, 0x00B8, 0xA2AC, 0x00B9, 0xA9F6, + 0x00BA, 0xA8AC, 0x00BC, 0xA8F9, 0x00BD, 0xA8F6, 0x00BE, 0xA8FA, + 0x00BF, 0xA2AF, 0x00C6, 0xA8A1, 0x00D0, 0xA8A2, 0x00D7, 0xA1BF, + 0x00D8, 0xA8AA, 0x00DE, 0xA8AD, 0x00DF, 0xA9AC, 0x00E6, 0xA9A1, + 0x00F0, 0xA9A3, 0x00F7, 0xA1C0, 0x00F8, 0xA9AA, 0x00FE, 0xA9AD, + 0x0111, 0xA9A2, 0x0126, 0xA8A4, 0x0127, 0xA9A4, 0x0131, 0xA9A5, + 0x0132, 0xA8A6, 0x0133, 0xA9A6, 0x0138, 0xA9A7, 0x013F, 0xA8A8, + 0x0140, 0xA9A8, 0x0141, 0xA8A9, 0x0142, 0xA9A9, 0x0149, 0xA9B0, + 0x014A, 0xA8AF, 0x014B, 0xA9AF, 0x0152, 0xA8AB, 0x0153, 0xA9AB, + 0x0166, 0xA8AE, 0x0167, 0xA9AE, 0x02C7, 0xA2A7, 0x02D0, 0xA2B0, + 0x02D8, 0xA2A8, 0x02D9, 0xA2AB, 0x02DA, 0xA2AA, 0x02DB, 0xA2AD, + 0x02DD, 0xA2A9, 0x0391, 0xA5C1, 0x0392, 0xA5C2, 0x0393, 0xA5C3, + 0x0394, 0xA5C4, 0x0395, 0xA5C5, 0x0396, 0xA5C6, 0x0397, 0xA5C7, + 0x0398, 0xA5C8, 0x0399, 0xA5C9, 0x039A, 0xA5CA, 0x039B, 0xA5CB, + 0x039C, 0xA5CC, 0x039D, 0xA5CD, 0x039E, 0xA5CE, 0x039F, 0xA5CF, + 0x03A0, 0xA5D0, 0x03A1, 0xA5D1, 0x03A3, 0xA5D2, 0x03A4, 0xA5D3, + 0x03A5, 0xA5D4, 0x03A6, 0xA5D5, 0x03A7, 0xA5D6, 0x03A8, 0xA5D7, + 0x03A9, 0xA5D8, 0x03B1, 0xA5E1, 0x03B2, 0xA5E2, 0x03B3, 0xA5E3, + 0x03B4, 0xA5E4, 0x03B5, 0xA5E5, 0x03B6, 0xA5E6, 0x03B7, 0xA5E7, + 0x03B8, 0xA5E8, 0x03B9, 0xA5E9, 0x03BA, 0xA5EA, 0x03BB, 0xA5EB, + 0x03BC, 0xA5EC, 0x03BD, 0xA5ED, 0x03BE, 0xA5EE, 0x03BF, 0xA5EF, + 0x03C0, 0xA5F0, 0x03C1, 0xA5F1, 0x03C3, 0xA5F2, 0x03C4, 0xA5F3, + 0x03C5, 0xA5F4, 0x03C6, 0xA5F5, 0x03C7, 0xA5F6, 0x03C8, 0xA5F7, + 0x03C9, 0xA5F8, 0x0401, 0xACA7, 0x0410, 0xACA1, 0x0411, 0xACA2, + 0x0412, 0xACA3, 0x0413, 0xACA4, 0x0414, 0xACA5, 0x0415, 0xACA6, + 0x0416, 0xACA8, 0x0417, 0xACA9, 0x0418, 0xACAA, 0x0419, 0xACAB, + 0x041A, 0xACAC, 0x041B, 0xACAD, 0x041C, 0xACAE, 0x041D, 0xACAF, + 0x041E, 0xACB0, 0x041F, 0xACB1, 0x0420, 0xACB2, 0x0421, 0xACB3, + 0x0422, 0xACB4, 0x0423, 0xACB5, 0x0424, 0xACB6, 0x0425, 0xACB7, + 0x0426, 0xACB8, 0x0427, 0xACB9, 0x0428, 0xACBA, 0x0429, 0xACBB, + 0x042A, 0xACBC, 0x042B, 0xACBD, 0x042C, 0xACBE, 0x042D, 0xACBF, + 0x042E, 0xACC0, 0x042F, 0xACC1, 0x0430, 0xACD1, 0x0431, 0xACD2, + 0x0432, 0xACD3, 0x0433, 0xACD4, 0x0434, 0xACD5, 0x0435, 0xACD6, + 0x0436, 0xACD8, 0x0437, 0xACD9, 0x0438, 0xACDA, 0x0439, 0xACDB, + 0x043A, 0xACDC, 0x043B, 0xACDD, 0x043C, 0xACDE, 0x043D, 0xACDF, + 0x043E, 0xACE0, 0x043F, 0xACE1, 0x0440, 0xACE2, 0x0441, 0xACE3, + 0x0442, 0xACE4, 0x0443, 0xACE5, 0x0444, 0xACE6, 0x0445, 0xACE7, + 0x0446, 0xACE8, 0x0447, 0xACE9, 0x0448, 0xACEA, 0x0449, 0xACEB, + 0x044A, 0xACEC, 0x044B, 0xACED, 0x044C, 0xACEE, 0x044D, 0xACEF, + 0x044E, 0xACF0, 0x044F, 0xACF1, 0x0451, 0xACD7, 0x2015, 0xA1AA, + 0x2018, 0xA1AE, 0x2019, 0xA1AF, 0x201C, 0xA1B0, 0x201D, 0xA1B1, + 0x2020, 0xA2D3, 0x2021, 0xA2D4, 0x2025, 0xA1A5, 0x2026, 0xA1A6, + 0x2030, 0xA2B6, 0x2032, 0xA1C7, 0x2033, 0xA1C8, 0x203B, 0xA1D8, + 0x2074, 0xA9F9, 0x207F, 0xA9FA, 0x2081, 0xA9FB, 0x2082, 0xA9FC, + 0x2083, 0xA9FD, 0x2084, 0xA9FE, 0x20AC, 0xA2E6, 0x2103, 0xA1C9, + 0x2109, 0xA2B5, 0x2113, 0xA7A4, 0x2116, 0xA2E0, 0x2121, 0xA2E5, + 0x2122, 0xA2E2, 0x2126, 0xA7D9, 0x212B, 0xA1CA, 0x2153, 0xA8F7, + 0x2154, 0xA8F8, 0x215B, 0xA8FB, 0x215C, 0xA8FC, 0x215D, 0xA8FD, + 0x215E, 0xA8FE, 0x2160, 0xA5B0, 0x2161, 0xA5B1, 0x2162, 0xA5B2, + 0x2163, 0xA5B3, 0x2164, 0xA5B4, 0x2165, 0xA5B5, 0x2166, 0xA5B6, + 0x2167, 0xA5B7, 0x2168, 0xA5B8, 0x2169, 0xA5B9, 0x2170, 0xA5A1, + 0x2171, 0xA5A2, 0x2172, 0xA5A3, 0x2173, 0xA5A4, 0x2174, 0xA5A5, + 0x2175, 0xA5A6, 0x2176, 0xA5A7, 0x2177, 0xA5A8, 0x2178, 0xA5A9, + 0x2179, 0xA5AA, 0x2190, 0xA1E7, 0x2191, 0xA1E8, 0x2192, 0xA1E6, + 0x2193, 0xA1E9, 0x2194, 0xA1EA, 0x2195, 0xA2D5, 0x2196, 0xA2D8, + 0x2197, 0xA2D6, 0x2198, 0xA2D9, 0x2199, 0xA2D7, 0x21D2, 0xA2A1, + 0x21D4, 0xA2A2, 0x2200, 0xA2A3, 0x2202, 0xA1D3, 0x2203, 0xA2A4, + 0x2207, 0xA1D4, 0x2208, 0xA1F4, 0x220B, 0xA1F5, 0x220F, 0xA2B3, + 0x2211, 0xA2B2, 0x221A, 0xA1EE, 0x221D, 0xA1F0, 0x221E, 0xA1C4, + 0x2220, 0xA1D0, 0x2225, 0xA1AB, 0x2227, 0xA1FC, 0x2228, 0xA1FD, + 0x2229, 0xA1FB, 0x222A, 0xA1FA, 0x222B, 0xA1F2, 0x222C, 0xA1F3, + 0x222E, 0xA2B1, 0x2234, 0xA1C5, 0x2235, 0xA1F1, 0x223C, 0xA1AD, + 0x223D, 0xA1EF, 0x2252, 0xA1D6, 0x2260, 0xA1C1, 0x2261, 0xA1D5, + 0x2264, 0xA1C2, 0x2265, 0xA1C3, 0x226A, 0xA1EC, 0x226B, 0xA1ED, + 0x2282, 0xA1F8, 0x2283, 0xA1F9, 0x2286, 0xA1F6, 0x2287, 0xA1F7, + 0x2299, 0xA2C1, 0x22A5, 0xA1D1, 0x2312, 0xA1D2, 0x2460, 0xA8E7, + 0x2461, 0xA8E8, 0x2462, 0xA8E9, 0x2463, 0xA8EA, 0x2464, 0xA8EB, + 0x2465, 0xA8EC, 0x2466, 0xA8ED, 0x2467, 0xA8EE, 0x2468, 0xA8EF, + 0x2469, 0xA8F0, 0x246A, 0xA8F1, 0x246B, 0xA8F2, 0x246C, 0xA8F3, + 0x246D, 0xA8F4, 0x246E, 0xA8F5, 0x2474, 0xA9E7, 0x2475, 0xA9E8, + 0x2476, 0xA9E9, 0x2477, 0xA9EA, 0x2478, 0xA9EB, 0x2479, 0xA9EC, + 0x247A, 0xA9ED, 0x247B, 0xA9EE, 0x247C, 0xA9EF, 0x247D, 0xA9F0, + 0x247E, 0xA9F1, 0x247F, 0xA9F2, 0x2480, 0xA9F3, 0x2481, 0xA9F4, + 0x2482, 0xA9F5, 0x249C, 0xA9CD, 0x249D, 0xA9CE, 0x249E, 0xA9CF, + 0x249F, 0xA9D0, 0x24A0, 0xA9D1, 0x24A1, 0xA9D2, 0x24A2, 0xA9D3, + 0x24A3, 0xA9D4, 0x24A4, 0xA9D5, 0x24A5, 0xA9D6, 0x24A6, 0xA9D7, + 0x24A7, 0xA9D8, 0x24A8, 0xA9D9, 0x24A9, 0xA9DA, 0x24AA, 0xA9DB, + 0x24AB, 0xA9DC, 0x24AC, 0xA9DD, 0x24AD, 0xA9DE, 0x24AE, 0xA9DF, + 0x24AF, 0xA9E0, 0x24B0, 0xA9E1, 0x24B1, 0xA9E2, 0x24B2, 0xA9E3, + 0x24B3, 0xA9E4, 0x24B4, 0xA9E5, 0x24B5, 0xA9E6, 0x24D0, 0xA8CD, + 0x24D1, 0xA8CE, 0x24D2, 0xA8CF, 0x24D3, 0xA8D0, 0x24D4, 0xA8D1, + 0x24D5, 0xA8D2, 0x24D6, 0xA8D3, 0x24D7, 0xA8D4, 0x24D8, 0xA8D5, + 0x24D9, 0xA8D6, 0x24DA, 0xA8D7, 0x24DB, 0xA8D8, 0x24DC, 0xA8D9, + 0x24DD, 0xA8DA, 0x24DE, 0xA8DB, 0x24DF, 0xA8DC, 0x24E0, 0xA8DD, + 0x24E1, 0xA8DE, 0x24E2, 0xA8DF, 0x24E3, 0xA8E0, 0x24E4, 0xA8E1, + 0x24E5, 0xA8E2, 0x24E6, 0xA8E3, 0x24E7, 0xA8E4, 0x24E8, 0xA8E5, + 0x24E9, 0xA8E6, 0x2500, 0xA6A1, 0x2501, 0xA6AC, 0x2502, 0xA6A2, + 0x2503, 0xA6AD, 0x250C, 0xA6A3, 0x250D, 0xA6C8, 0x250E, 0xA6C7, + 0x250F, 0xA6AE, 0x2510, 0xA6A4, 0x2511, 0xA6C2, 0x2512, 0xA6C1, + 0x2513, 0xA6AF, 0x2514, 0xA6A6, 0x2515, 0xA6C6, 0x2516, 0xA6C5, + 0x2517, 0xA6B1, 0x2518, 0xA6A5, 0x2519, 0xA6C4, 0x251A, 0xA6C3, + 0x251B, 0xA6B0, 0x251C, 0xA6A7, 0x251D, 0xA6BC, 0x251E, 0xA6C9, + 0x251F, 0xA6CA, 0x2520, 0xA6B7, 0x2521, 0xA6CB, 0x2522, 0xA6CC, + 0x2523, 0xA6B2, 0x2524, 0xA6A9, 0x2525, 0xA6BE, 0x2526, 0xA6CD, + 0x2527, 0xA6CE, 0x2528, 0xA6B9, 0x2529, 0xA6CF, 0x252A, 0xA6D0, + 0x252B, 0xA6B4, 0x252C, 0xA6A8, 0x252D, 0xA6D1, 0x252E, 0xA6D2, + 0x252F, 0xA6B8, 0x2530, 0xA6BD, 0x2531, 0xA6D3, 0x2532, 0xA6D4, + 0x2533, 0xA6B3, 0x2534, 0xA6AA, 0x2535, 0xA6D5, 0x2536, 0xA6D6, + 0x2537, 0xA6BA, 0x2538, 0xA6BF, 0x2539, 0xA6D7, 0x253A, 0xA6D8, + 0x253B, 0xA6B5, 0x253C, 0xA6AB, 0x253D, 0xA6D9, 0x253E, 0xA6DA, + 0x253F, 0xA6BB, 0x2540, 0xA6DB, 0x2541, 0xA6DC, 0x2542, 0xA6C0, + 0x2543, 0xA6DD, 0x2544, 0xA6DE, 0x2545, 0xA6DF, 0x2546, 0xA6E0, + 0x2547, 0xA6E1, 0x2548, 0xA6E2, 0x2549, 0xA6E3, 0x254A, 0xA6E4, + 0x254B, 0xA6B6, 0x2592, 0xA2C6, 0x25A0, 0xA1E1, 0x25A1, 0xA1E0, + 0x25A3, 0xA2C3, 0x25A4, 0xA2C7, 0x25A5, 0xA2C8, 0x25A6, 0xA2CB, + 0x25A7, 0xA2CA, 0x25A8, 0xA2C9, 0x25A9, 0xA2CC, 0x25B2, 0xA1E3, + 0x25B3, 0xA1E2, 0x25B6, 0xA2BA, 0x25B7, 0xA2B9, 0x25BC, 0xA1E5, + 0x25BD, 0xA1E4, 0x25C0, 0xA2B8, 0x25C1, 0xA2B7, 0x25C6, 0xA1DF, + 0x25C7, 0xA1DE, 0x25C8, 0xA2C2, 0x25CB, 0xA1DB, 0x25CE, 0xA1DD, + 0x25CF, 0xA1DC, 0x25D0, 0xA2C4, 0x25D1, 0xA2C5, 0x2605, 0xA1DA, + 0x2606, 0xA1D9, 0x260E, 0xA2CF, 0x260F, 0xA2CE, 0x261C, 0xA2D0, + 0x261E, 0xA2D1, 0x2640, 0xA1CF, 0x2642, 0xA1CE, 0x2660, 0xA2BC, + 0x2661, 0xA2BD, 0x2663, 0xA2C0, 0x2664, 0xA2BB, 0x2665, 0xA2BE, + 0x2667, 0xA2BF, 0x2668, 0xA2CD, 0x2669, 0xA2DB, 0x266A, 0xA2DC, + 0x266C, 0xA2DD, 0x266D, 0xA2DA, 0x3000, 0xA1A1, 0x3001, 0xA1A2, + 0x3002, 0xA1A3, 0x3003, 0xA1A8, 0x3008, 0xA1B4, 0x3009, 0xA1B5, + 0x300A, 0xA1B6, 0x300B, 0xA1B7, 0x300C, 0xA1B8, 0x300D, 0xA1B9, + 0x300E, 0xA1BA, 0x300F, 0xA1BB, 0x3010, 0xA1BC, 0x3011, 0xA1BD, + 0x3013, 0xA1EB, 0x3014, 0xA1B2, 0x3015, 0xA1B3, 0x3041, 0xAAA1, + 0x3042, 0xAAA2, 0x3043, 0xAAA3, 0x3044, 0xAAA4, 0x3045, 0xAAA5, + 0x3046, 0xAAA6, 0x3047, 0xAAA7, 0x3048, 0xAAA8, 0x3049, 0xAAA9, + 0x304A, 0xAAAA, 0x304B, 0xAAAB, 0x304C, 0xAAAC, 0x304D, 0xAAAD, + 0x304E, 0xAAAE, 0x304F, 0xAAAF, 0x3050, 0xAAB0, 0x3051, 0xAAB1, + 0x3052, 0xAAB2, 0x3053, 0xAAB3, 0x3054, 0xAAB4, 0x3055, 0xAAB5, + 0x3056, 0xAAB6, 0x3057, 0xAAB7, 0x3058, 0xAAB8, 0x3059, 0xAAB9, + 0x305A, 0xAABA, 0x305B, 0xAABB, 0x305C, 0xAABC, 0x305D, 0xAABD, + 0x305E, 0xAABE, 0x305F, 0xAABF, 0x3060, 0xAAC0, 0x3061, 0xAAC1, + 0x3062, 0xAAC2, 0x3063, 0xAAC3, 0x3064, 0xAAC4, 0x3065, 0xAAC5, + 0x3066, 0xAAC6, 0x3067, 0xAAC7, 0x3068, 0xAAC8, 0x3069, 0xAAC9, + 0x306A, 0xAACA, 0x306B, 0xAACB, 0x306C, 0xAACC, 0x306D, 0xAACD, + 0x306E, 0xAACE, 0x306F, 0xAACF, 0x3070, 0xAAD0, 0x3071, 0xAAD1, + 0x3072, 0xAAD2, 0x3073, 0xAAD3, 0x3074, 0xAAD4, 0x3075, 0xAAD5, + 0x3076, 0xAAD6, 0x3077, 0xAAD7, 0x3078, 0xAAD8, 0x3079, 0xAAD9, + 0x307A, 0xAADA, 0x307B, 0xAADB, 0x307C, 0xAADC, 0x307D, 0xAADD, + 0x307E, 0xAADE, 0x307F, 0xAADF, 0x3080, 0xAAE0, 0x3081, 0xAAE1, + 0x3082, 0xAAE2, 0x3083, 0xAAE3, 0x3084, 0xAAE4, 0x3085, 0xAAE5, + 0x3086, 0xAAE6, 0x3087, 0xAAE7, 0x3088, 0xAAE8, 0x3089, 0xAAE9, + 0x308A, 0xAAEA, 0x308B, 0xAAEB, 0x308C, 0xAAEC, 0x308D, 0xAAED, + 0x308E, 0xAAEE, 0x308F, 0xAAEF, 0x3090, 0xAAF0, 0x3091, 0xAAF1, + 0x3092, 0xAAF2, 0x3093, 0xAAF3, 0x30A1, 0xABA1, 0x30A2, 0xABA2, + 0x30A3, 0xABA3, 0x30A4, 0xABA4, 0x30A5, 0xABA5, 0x30A6, 0xABA6, + 0x30A7, 0xABA7, 0x30A8, 0xABA8, 0x30A9, 0xABA9, 0x30AA, 0xABAA, + 0x30AB, 0xABAB, 0x30AC, 0xABAC, 0x30AD, 0xABAD, 0x30AE, 0xABAE, + 0x30AF, 0xABAF, 0x30B0, 0xABB0, 0x30B1, 0xABB1, 0x30B2, 0xABB2, + 0x30B3, 0xABB3, 0x30B4, 0xABB4, 0x30B5, 0xABB5, 0x30B6, 0xABB6, + 0x30B7, 0xABB7, 0x30B8, 0xABB8, 0x30B9, 0xABB9, 0x30BA, 0xABBA, + 0x30BB, 0xABBB, 0x30BC, 0xABBC, 0x30BD, 0xABBD, 0x30BE, 0xABBE, + 0x30BF, 0xABBF, 0x30C0, 0xABC0, 0x30C1, 0xABC1, 0x30C2, 0xABC2, + 0x30C3, 0xABC3, 0x30C4, 0xABC4, 0x30C5, 0xABC5, 0x30C6, 0xABC6, + 0x30C7, 0xABC7, 0x30C8, 0xABC8, 0x30C9, 0xABC9, 0x30CA, 0xABCA, + 0x30CB, 0xABCB, 0x30CC, 0xABCC, 0x30CD, 0xABCD, 0x30CE, 0xABCE, + 0x30CF, 0xABCF, 0x30D0, 0xABD0, 0x30D1, 0xABD1, 0x30D2, 0xABD2, + 0x30D3, 0xABD3, 0x30D4, 0xABD4, 0x30D5, 0xABD5, 0x30D6, 0xABD6, + 0x30D7, 0xABD7, 0x30D8, 0xABD8, 0x30D9, 0xABD9, 0x30DA, 0xABDA, + 0x30DB, 0xABDB, 0x30DC, 0xABDC, 0x30DD, 0xABDD, 0x30DE, 0xABDE, + 0x30DF, 0xABDF, 0x30E0, 0xABE0, 0x30E1, 0xABE1, 0x30E2, 0xABE2, + 0x30E3, 0xABE3, 0x30E4, 0xABE4, 0x30E5, 0xABE5, 0x30E6, 0xABE6, + 0x30E7, 0xABE7, 0x30E8, 0xABE8, 0x30E9, 0xABE9, 0x30EA, 0xABEA, + 0x30EB, 0xABEB, 0x30EC, 0xABEC, 0x30ED, 0xABED, 0x30EE, 0xABEE, + 0x30EF, 0xABEF, 0x30F0, 0xABF0, 0x30F1, 0xABF1, 0x30F2, 0xABF2, + 0x30F3, 0xABF3, 0x30F4, 0xABF4, 0x30F5, 0xABF5, 0x30F6, 0xABF6, + 0x3131, 0xA4A1, 0x3132, 0xA4A2, 0x3133, 0xA4A3, 0x3134, 0xA4A4, + 0x3135, 0xA4A5, 0x3136, 0xA4A6, 0x3137, 0xA4A7, 0x3138, 0xA4A8, + 0x3139, 0xA4A9, 0x313A, 0xA4AA, 0x313B, 0xA4AB, 0x313C, 0xA4AC, + 0x313D, 0xA4AD, 0x313E, 0xA4AE, 0x313F, 0xA4AF, 0x3140, 0xA4B0, + 0x3141, 0xA4B1, 0x3142, 0xA4B2, 0x3143, 0xA4B3, 0x3144, 0xA4B4, + 0x3145, 0xA4B5, 0x3146, 0xA4B6, 0x3147, 0xA4B7, 0x3148, 0xA4B8, + 0x3149, 0xA4B9, 0x314A, 0xA4BA, 0x314B, 0xA4BB, 0x314C, 0xA4BC, + 0x314D, 0xA4BD, 0x314E, 0xA4BE, 0x314F, 0xA4BF, 0x3150, 0xA4C0, + 0x3151, 0xA4C1, 0x3152, 0xA4C2, 0x3153, 0xA4C3, 0x3154, 0xA4C4, + 0x3155, 0xA4C5, 0x3156, 0xA4C6, 0x3157, 0xA4C7, 0x3158, 0xA4C8, + 0x3159, 0xA4C9, 0x315A, 0xA4CA, 0x315B, 0xA4CB, 0x315C, 0xA4CC, + 0x315D, 0xA4CD, 0x315E, 0xA4CE, 0x315F, 0xA4CF, 0x3160, 0xA4D0, + 0x3161, 0xA4D1, 0x3162, 0xA4D2, 0x3163, 0xA4D3, 0x3164, 0xA4D4, + 0x3165, 0xA4D5, 0x3166, 0xA4D6, 0x3167, 0xA4D7, 0x3168, 0xA4D8, + 0x3169, 0xA4D9, 0x316A, 0xA4DA, 0x316B, 0xA4DB, 0x316C, 0xA4DC, + 0x316D, 0xA4DD, 0x316E, 0xA4DE, 0x316F, 0xA4DF, 0x3170, 0xA4E0, + 0x3171, 0xA4E1, 0x3172, 0xA4E2, 0x3173, 0xA4E3, 0x3174, 0xA4E4, + 0x3175, 0xA4E5, 0x3176, 0xA4E6, 0x3177, 0xA4E7, 0x3178, 0xA4E8, + 0x3179, 0xA4E9, 0x317A, 0xA4EA, 0x317B, 0xA4EB, 0x317C, 0xA4EC, + 0x317D, 0xA4ED, 0x317E, 0xA4EE, 0x317F, 0xA4EF, 0x3180, 0xA4F0, + 0x3181, 0xA4F1, 0x3182, 0xA4F2, 0x3183, 0xA4F3, 0x3184, 0xA4F4, + 0x3185, 0xA4F5, 0x3186, 0xA4F6, 0x3187, 0xA4F7, 0x3188, 0xA4F8, + 0x3189, 0xA4F9, 0x318A, 0xA4FA, 0x318B, 0xA4FB, 0x318C, 0xA4FC, + 0x318D, 0xA4FD, 0x318E, 0xA4FE, 0x3200, 0xA9B1, 0x3201, 0xA9B2, + 0x3202, 0xA9B3, 0x3203, 0xA9B4, 0x3204, 0xA9B5, 0x3205, 0xA9B6, + 0x3206, 0xA9B7, 0x3207, 0xA9B8, 0x3208, 0xA9B9, 0x3209, 0xA9BA, + 0x320A, 0xA9BB, 0x320B, 0xA9BC, 0x320C, 0xA9BD, 0x320D, 0xA9BE, + 0x320E, 0xA9BF, 0x320F, 0xA9C0, 0x3210, 0xA9C1, 0x3211, 0xA9C2, + 0x3212, 0xA9C3, 0x3213, 0xA9C4, 0x3214, 0xA9C5, 0x3215, 0xA9C6, + 0x3216, 0xA9C7, 0x3217, 0xA9C8, 0x3218, 0xA9C9, 0x3219, 0xA9CA, + 0x321A, 0xA9CB, 0x321B, 0xA9CC, 0x321C, 0xA2DF, 0x3260, 0xA8B1, + 0x3261, 0xA8B2, 0x3262, 0xA8B3, 0x3263, 0xA8B4, 0x3264, 0xA8B5, + 0x3265, 0xA8B6, 0x3266, 0xA8B7, 0x3267, 0xA8B8, 0x3268, 0xA8B9, + 0x3269, 0xA8BA, 0x326A, 0xA8BB, 0x326B, 0xA8BC, 0x326C, 0xA8BD, + 0x326D, 0xA8BE, 0x326E, 0xA8BF, 0x326F, 0xA8C0, 0x3270, 0xA8C1, + 0x3271, 0xA8C2, 0x3272, 0xA8C3, 0x3273, 0xA8C4, 0x3274, 0xA8C5, + 0x3275, 0xA8C6, 0x3276, 0xA8C7, 0x3277, 0xA8C8, 0x3278, 0xA8C9, + 0x3279, 0xA8CA, 0x327A, 0xA8CB, 0x327B, 0xA8CC, 0x327F, 0xA2DE, + 0x3380, 0xA7C9, 0x3381, 0xA7CA, 0x3382, 0xA7CB, 0x3383, 0xA7CC, + 0x3384, 0xA7CD, 0x3388, 0xA7BA, 0x3389, 0xA7BB, 0x338A, 0xA7DC, + 0x338B, 0xA7DD, 0x338C, 0xA7DE, 0x338D, 0xA7B6, 0x338E, 0xA7B7, + 0x338F, 0xA7B8, 0x3390, 0xA7D4, 0x3391, 0xA7D5, 0x3392, 0xA7D6, + 0x3393, 0xA7D7, 0x3394, 0xA7D8, 0x3395, 0xA7A1, 0x3396, 0xA7A2, + 0x3397, 0xA7A3, 0x3398, 0xA7A5, 0x3399, 0xA7AB, 0x339A, 0xA7AC, + 0x339B, 0xA7AD, 0x339C, 0xA7AE, 0x339D, 0xA7AF, 0x339E, 0xA7B0, + 0x339F, 0xA7B1, 0x33A0, 0xA7B2, 0x33A1, 0xA7B3, 0x33A2, 0xA7B4, + 0x33A3, 0xA7A7, 0x33A4, 0xA7A8, 0x33A5, 0xA7A9, 0x33A6, 0xA7AA, + 0x33A7, 0xA7BD, 0x33A8, 0xA7BE, 0x33A9, 0xA7E5, 0x33AA, 0xA7E6, + 0x33AB, 0xA7E7, 0x33AC, 0xA7E8, 0x33AD, 0xA7E1, 0x33AE, 0xA7E2, + 0x33AF, 0xA7E3, 0x33B0, 0xA7BF, 0x33B1, 0xA7C0, 0x33B2, 0xA7C1, + 0x33B3, 0xA7C2, 0x33B4, 0xA7C3, 0x33B5, 0xA7C4, 0x33B6, 0xA7C5, + 0x33B7, 0xA7C6, 0x33B8, 0xA7C7, 0x33B9, 0xA7C8, 0x33BA, 0xA7CE, + 0x33BB, 0xA7CF, 0x33BC, 0xA7D0, 0x33BD, 0xA7D1, 0x33BE, 0xA7D2, + 0x33BF, 0xA7D3, 0x33C0, 0xA7DA, 0x33C1, 0xA7DB, 0x33C2, 0xA2E3, + 0x33C3, 0xA7EC, 0x33C4, 0xA7A6, 0x33C5, 0xA7E0, 0x33C6, 0xA7EF, + 0x33C7, 0xA2E1, 0x33C8, 0xA7BC, 0x33C9, 0xA7ED, 0x33CA, 0xA7B5, + 0x33CF, 0xA7B9, 0x33D0, 0xA7EA, 0x33D3, 0xA7EB, 0x33D6, 0xA7DF, + 0x33D8, 0xA2E4, 0x33DB, 0xA7E4, 0x33DC, 0xA7EE, 0x33DD, 0xA7E9, + 0x4E00, 0xECE9, 0x4E01, 0xEFCB, 0x4E03, 0xF6D2, 0x4E07, 0xD8B2, + 0x4E08, 0xEDDB, 0x4E09, 0xDFB2, 0x4E0A, 0xDFBE, 0x4E0B, 0xF9BB, + 0x4E0D, 0xDCF4, 0x4E11, 0xF5E4, 0x4E14, 0xF3A6, 0x4E15, 0xDDE0, + 0x4E16, 0xE1A6, 0x4E18, 0xCEF8, 0x4E19, 0xDCB0, 0x4E1E, 0xE3AA, + 0x4E2D, 0xF1E9, 0x4E32, 0xCDFA, 0x4E38, 0xFCAF, 0x4E39, 0xD3A1, + 0x4E3B, 0xF1AB, 0x4E42, 0xE7D1, 0x4E43, 0xD2AC, 0x4E45, 0xCEF9, + 0x4E4B, 0xF1FD, 0x4E4D, 0xDEBF, 0x4E4E, 0xFBBA, 0x4E4F, 0xF9B9, + 0x4E56, 0xCED2, 0x4E58, 0xE3AB, 0x4E59, 0xEBE0, 0x4E5D, 0xCEFA, + 0x4E5E, 0xCBF7, 0x4E5F, 0xE5A5, 0x4E6B, 0xCAE1, 0x4E6D, 0xD4CC, + 0x4E73, 0xEAE1, 0x4E76, 0xDCE3, 0x4E77, 0xDFAD, 0x4E7E, 0xCBEB, + 0x4E82, 0xD5AF, 0x4E86, 0xD6F5, 0x4E88, 0xE5F8, 0x4E8B, 0xDEC0, + 0x4E8C, 0xECA3, 0x4E8E, 0xE9CD, 0x4E90, 0xEAA7, 0x4E91, 0xE9F6, + 0x4E92, 0xFBBB, 0x4E94, 0xE7E9, 0x4E95, 0xEFCC, 0x4E98, 0xD0E6, + 0x4E9B, 0xDEC1, 0x4E9E, 0xE4AC, 0x4EA1, 0xD8CC, 0x4EA2, 0xF9F1, + 0x4EA4, 0xCEDF, 0x4EA5, 0xFAA4, 0x4EA6, 0xE6B2, 0x4EA8, 0xFAFB, + 0x4EAB, 0xFABD, 0x4EAC, 0xCCC8, 0x4EAD, 0xEFCD, 0x4EAE, 0xD5D5, + 0x4EB6, 0xD3A2, 0x4EBA, 0xECD1, 0x4EC0, 0xE4A7, 0x4EC1, 0xECD2, + 0x4EC4, 0xF6B1, 0x4EC7, 0xCEFB, 0x4ECA, 0xD0D1, 0x4ECB, 0xCBBF, + 0x4ECD, 0xEDA4, 0x4ED4, 0xEDA8, 0x4ED5, 0xDEC2, 0x4ED6, 0xF6E2, + 0x4ED7, 0xEDDC, 0x4ED8, 0xDCF5, 0x4ED9, 0xE0B9, 0x4EDD, 0xD4CE, + 0x4EDF, 0xF4B5, 0x4EE3, 0xD3DB, 0x4EE4, 0xD6B5, 0x4EE5, 0xECA4, + 0x4EF0, 0xE4E6, 0x4EF2, 0xF1EA, 0x4EF6, 0xCBEC, 0x4EF7, 0xCBC0, + 0x4EFB, 0xECF2, 0x4F01, 0xD0EA, 0x4F09, 0xF9F2, 0x4F0A, 0xECA5, + 0x4F0B, 0xD0DF, 0x4F0D, 0xE7EA, 0x4F0E, 0xD0EB, 0x4F0F, 0xDCD1, + 0x4F10, 0xDBE9, 0x4F11, 0xFDCC, 0x4F2F, 0xDBD7, 0x4F34, 0xDAE1, + 0x4F36, 0xD6B6, 0x4F38, 0xE3DF, 0x4F3A, 0xDEC3, 0x4F3C, 0xDEC4, + 0x4F3D, 0xCAA1, 0x4F43, 0xEEEC, 0x4F46, 0xD3A3, 0x4F47, 0xEEB7, + 0x4F48, 0xF8CF, 0x4F4D, 0xEAC8, 0x4F4E, 0xEEB8, 0x4F4F, 0xF1AC, + 0x4F50, 0xF1A5, 0x4F51, 0xE9CE, 0x4F55, 0xF9BC, 0x4F59, 0xE5F9, + 0x4F5A, 0xECEA, 0x4F5B, 0xDDD6, 0x4F5C, 0xEDC2, 0x4F69, 0xF8A5, + 0x4F6F, 0xE5BA, 0x4F70, 0xDBD8, 0x4F73, 0xCAA2, 0x4F76, 0xD1CD, + 0x4F7A, 0xEEED, 0x4F7E, 0xECEB, 0x4F7F, 0xDEC5, 0x4F81, 0xE3E0, + 0x4F83, 0xCAC9, 0x4F84, 0xF2E9, 0x4F86, 0xD5CE, 0x4F88, 0xF6B6, + 0x4F8A, 0xCEC2, 0x4F8B, 0xD6C7, 0x4F8D, 0xE3B4, 0x4F8F, 0xF1AD, + 0x4F91, 0xEAE2, 0x4F96, 0xD7C2, 0x4F98, 0xF3A7, 0x4F9B, 0xCDEA, + 0x4F9D, 0xEBEE, 0x4FAE, 0xD9B2, 0x4FAF, 0xFDA5, 0x4FB5, 0xF6D5, + 0x4FB6, 0xD5E2, 0x4FBF, 0xF8B5, 0x4FC2, 0xCCF5, 0x4FC3, 0xF5B5, + 0x4FC4, 0xE4AD, 0x4FC9, 0xE7EB, 0x4FCA, 0xF1D5, 0x4FCE, 0xF0BB, + 0x4FD1, 0xE9B5, 0x4FD3, 0xCCC9, 0x4FD4, 0xFAD5, 0x4FD7, 0xE1D4, + 0x4FDA, 0xD7D6, 0x4FDD, 0xDCC1, 0x4FDF, 0xDEC6, 0x4FE0, 0xFAEF, + 0x4FE1, 0xE3E1, 0x4FEE, 0xE1F3, 0x4FEF, 0xDCF6, 0x4FF1, 0xCEFC, + 0x4FF3, 0xDBC4, 0x4FF5, 0xF8F1, 0x4FF8, 0xDCE4, 0x4FFA, 0xE5EF, + 0x5002, 0xDCB1, 0x5006, 0xD5D6, 0x5009, 0xF3DA, 0x500B, 0xCBC1, + 0x500D, 0xDBC3, 0x5011, 0xD9FA, 0x5012, 0xD3EE, 0x5016, 0xFAB8, + 0x5019, 0xFDA6, 0x501A, 0xEBEF, 0x501C, 0xF4A6, 0x501E, 0xCCCA, + 0x501F, 0xF3A8, 0x5021, 0xF3DB, 0x5023, 0xDBA7, 0x5024, 0xF6B7, + 0x5026, 0xCFE6, 0x5027, 0xF0F2, 0x5028, 0xCBDA, 0x502A, 0xE7D2, + 0x502B, 0xD7C3, 0x502C, 0xF6F0, 0x502D, 0xE8DE, 0x503B, 0xE5A6, + 0x5043, 0xE5E7, 0x5047, 0xCAA3, 0x5048, 0xCCA7, 0x5049, 0xEAC9, + 0x504F, 0xF8B6, 0x5055, 0xFAA5, 0x505A, 0xF1AE, 0x505C, 0xEFCE, + 0x5065, 0xCBED, 0x5074, 0xF6B0, 0x5075, 0xEFCF, 0x5076, 0xE9CF, + 0x5078, 0xF7DE, 0x5080, 0xCED3, 0x5085, 0xDCF7, 0x508D, 0xDBA8, + 0x5091, 0xCBF8, 0x5098, 0xDFA1, 0x5099, 0xDDE1, 0x50AC, 0xF5CA, + 0x50AD, 0xE9B6, 0x50B2, 0xE7EC, 0x50B3, 0xEEEE, 0x50B5, 0xF3F0, + 0x50B7, 0xDFBF, 0x50BE, 0xCCCB, 0x50C5, 0xD0C1, 0x50C9, 0xF4D2, + 0x50CA, 0xE0BA, 0x50CF, 0xDFC0, 0x50D1, 0xCEE0, 0x50D5, 0xDCD2, + 0x50D6, 0xFDEA, 0x50DA, 0xD6F6, 0x50DE, 0xEACA, 0x50E5, 0xE8E9, + 0x50E7, 0xE3AC, 0x50ED, 0xF3D0, 0x50F9, 0xCAA4, 0x50FB, 0xDBF8, + 0x50FF, 0xDEC7, 0x5100, 0xEBF0, 0x5101, 0xF1D6, 0x5104, 0xE5E2, + 0x5106, 0xCCCC, 0x5109, 0xCBFB, 0x5112, 0xEAE3, 0x511F, 0xDFC1, + 0x5121, 0xD6ED, 0x512A, 0xE9D0, 0x5132, 0xEEB9, 0x5137, 0xD5E3, + 0x513A, 0xD1D3, 0x513C, 0xE5F0, 0x5140, 0xE8B4, 0x5141, 0xEBC3, + 0x5143, 0xEAAA, 0x5144, 0xFAFC, 0x5145, 0xF5F6, 0x5146, 0xF0BC, + 0x5147, 0xFDD4, 0x5148, 0xE0BB, 0x5149, 0xCEC3, 0x514B, 0xD0BA, + 0x514C, 0xF7BA, 0x514D, 0xD8F3, 0x514E, 0xF7CD, 0x5152, 0xE4AE, + 0x515C, 0xD4DF, 0x5162, 0xD0E7, 0x5165, 0xECFD, 0x5167, 0xD2AE, + 0x5168, 0xEEEF, 0x5169, 0xD5D7, 0x516A, 0xEAE4, 0x516B, 0xF8A2, + 0x516C, 0xCDEB, 0x516D, 0xD7BF, 0x516E, 0xFBB1, 0x5171, 0xCDEC, + 0x5175, 0xDCB2, 0x5176, 0xD0EC, 0x5177, 0xCEFD, 0x5178, 0xEEF0, + 0x517C, 0xCCC2, 0x5180, 0xD0ED, 0x5186, 0xE5F7, 0x518A, 0xF3FC, + 0x518D, 0xEEA2, 0x5192, 0xD9B3, 0x5195, 0xD8F4, 0x5197, 0xE9B7, + 0x51A0, 0xCEAE, 0x51A5, 0xD9A2, 0x51AA, 0xD8F1, 0x51AC, 0xD4CF, + 0x51B6, 0xE5A7, 0x51B7, 0xD5D2, 0x51BD, 0xD6A9, 0x51C4, 0xF4A2, + 0x51C6, 0xF1D7, 0x51C9, 0xD5D8, 0x51CB, 0xF0BD, 0x51CC, 0xD7D0, + 0x51CD, 0xD4D0, 0x51DC, 0xD7CF, 0x51DD, 0xEBEA, 0x51DE, 0xFDEB, + 0x51E1, 0xDBED, 0x51F0, 0xFCC5, 0x51F1, 0xCBC2, 0x51F6, 0xFDD5, + 0x51F8, 0xF4C8, 0x51F9, 0xE8EA, 0x51FA, 0xF5F3, 0x51FD, 0xF9DE, + 0x5200, 0xD3EF, 0x5203, 0xECD3, 0x5206, 0xDDC2, 0x5207, 0xEFB7, + 0x5208, 0xE7D4, 0x520A, 0xCACA, 0x520E, 0xD9FB, 0x5211, 0xFAFD, + 0x5217, 0xD6AA, 0x521D, 0xF4F8, 0x5224, 0xF7F7, 0x5225, 0xDCAC, + 0x5229, 0xD7D7, 0x522A, 0xDFA2, 0x522E, 0xCEBE, 0x5230, 0xD3F0, + 0x5236, 0xF0A4, 0x5237, 0xE1EC, 0x5238, 0xCFE7, 0x5239, 0xF3CB, + 0x523A, 0xEDA9, 0x523B, 0xCABE, 0x5243, 0xF4EF, 0x5247, 0xF6CE, + 0x524A, 0xDEFB, 0x524B, 0xD0BB, 0x524C, 0xD5B7, 0x524D, 0xEEF1, + 0x5254, 0xF4A8, 0x5256, 0xDCF8, 0x525B, 0xCBA7, 0x525D, 0xDACE, + 0x5261, 0xE0E6, 0x5269, 0xEDA5, 0x526A, 0xEEF2, 0x526F, 0xDCF9, + 0x5272, 0xF9DC, 0x5275, 0xF3DC, 0x527D, 0xF8F2, 0x527F, 0xF4F9, + 0x5283, 0xFCF1, 0x5287, 0xD0BC, 0x5288, 0xDBF9, 0x5289, 0xD7B1, + 0x528D, 0xCBFC, 0x5291, 0xF0A5, 0x5292, 0xCBFD, 0x529B, 0xD5F4, + 0x529F, 0xCDED, 0x52A0, 0xCAA5, 0x52A3, 0xD6AB, 0x52A4, 0xD0C2, + 0x52A9, 0xF0BE, 0x52AA, 0xD2BD, 0x52AB, 0xCCA4, 0x52BE, 0xFAB6, + 0x52C1, 0xCCCD, 0x52C3, 0xDAFA, 0x52C5, 0xF6CF, 0x52C7, 0xE9B8, + 0x52C9, 0xD8F5, 0x52CD, 0xCCCE, 0x52D2, 0xD7CD, 0x52D5, 0xD4D1, + 0x52D6, 0xE9ED, 0x52D8, 0xCAEB, 0x52D9, 0xD9E2, 0x52DB, 0xFDB2, + 0x52DD, 0xE3AD, 0x52DE, 0xD6CC, 0x52DF, 0xD9B4, 0x52E2, 0xE1A7, + 0x52E3, 0xEED3, 0x52E4, 0xD0C3, 0x52F3, 0xFDB3, 0x52F5, 0xD5E4, + 0x52F8, 0xCFE8, 0x52FA, 0xEDC3, 0x52FB, 0xD0B2, 0x52FE, 0xCEFE, + 0x52FF, 0xDAA8, 0x5305, 0xF8D0, 0x5308, 0xFDD6, 0x530D, 0xF8D1, + 0x530F, 0xF8D2, 0x5310, 0xDCD3, 0x5315, 0xDDE2, 0x5316, 0xFBF9, + 0x5317, 0xDDC1, 0x5319, 0xE3B5, 0x5320, 0xEDDD, 0x5321, 0xCEC4, + 0x5323, 0xCBA1, 0x532A, 0xDDE3, 0x532F, 0xFCDD, 0x5339, 0xF9AF, + 0x533F, 0xD2FB, 0x5340, 0xCFA1, 0x5341, 0xE4A8, 0x5343, 0xF4B6, + 0x5344, 0xECFE, 0x5347, 0xE3AE, 0x5348, 0xE7ED, 0x5349, 0xFDC1, + 0x534A, 0xDAE2, 0x534D, 0xD8B3, 0x5351, 0xDDE4, 0x5352, 0xF0EF, + 0x5353, 0xF6F1, 0x5354, 0xFAF0, 0x5357, 0xD1F5, 0x535A, 0xDACF, + 0x535C, 0xDCD4, 0x535E, 0xDCA6, 0x5360, 0xEFBF, 0x5366, 0xCECF, + 0x5368, 0xE0D9, 0x536F, 0xD9D6, 0x5370, 0xECD4, 0x5371, 0xEACB, + 0x5374, 0xCABF, 0x5375, 0xD5B0, 0x5377, 0xCFE9, 0x537D, 0xF1ED, + 0x537F, 0xCCCF, 0x5384, 0xE4F8, 0x5393, 0xE4ED, 0x5398, 0xD7D8, + 0x539A, 0xFDA7, 0x539F, 0xEAAB, 0x53A0, 0xF6B2, 0x53A5, 0xCFF0, + 0x53A6, 0xF9BD, 0x53AD, 0xE6F4, 0x53BB, 0xCBDB, 0x53C3, 0xF3D1, + 0x53C8, 0xE9D1, 0x53C9, 0xF3A9, 0x53CA, 0xD0E0, 0x53CB, 0xE9D2, + 0x53CD, 0xDAE3, 0x53D4, 0xE2D2, 0x53D6, 0xF6A2, 0x53D7, 0xE1F4, + 0x53DB, 0xDAE4, 0x53E1, 0xE7D5, 0x53E2, 0xF5BF, 0x53E3, 0xCFA2, + 0x53E4, 0xCDAF, 0x53E5, 0xCFA3, 0x53E9, 0xCDB0, 0x53EA, 0xF1FE, + 0x53EB, 0xD0A3, 0x53EC, 0xE1AF, 0x53ED, 0xF8A3, 0x53EF, 0xCAA6, + 0x53F0, 0xF7BB, 0x53F1, 0xF2EA, 0x53F2, 0xDEC8, 0x53F3, 0xE9D3, + 0x53F8, 0xDEC9, 0x5403, 0xFDDE, 0x5404, 0xCAC0, 0x5408, 0xF9EA, + 0x5409, 0xD1CE, 0x540A, 0xEED4, 0x540C, 0xD4D2, 0x540D, 0xD9A3, + 0x540E, 0xFDA8, 0x540F, 0xD7D9, 0x5410, 0xF7CE, 0x5411, 0xFABE, + 0x541B, 0xCFD6, 0x541D, 0xD7F0, 0x541F, 0xEBE1, 0x5420, 0xF8C5, + 0x5426, 0xDCFA, 0x5429, 0xDDC3, 0x542B, 0xF9DF, 0x5433, 0xE7EF, + 0x5438, 0xFDE5, 0x5439, 0xF6A3, 0x543B, 0xD9FC, 0x543C, 0xFDA9, + 0x543E, 0xE7EE, 0x5442, 0xD5E5, 0x5448, 0xEFD0, 0x544A, 0xCDB1, + 0x5451, 0xF7A2, 0x5468, 0xF1B2, 0x546A, 0xF1B1, 0x5471, 0xCDB2, + 0x5473, 0xDAAB, 0x5475, 0xCAA7, 0x547B, 0xE3E2, 0x547C, 0xFBBC, + 0x547D, 0xD9A4, 0x5480, 0xEEBA, 0x5486, 0xF8D3, 0x548C, 0xFBFA, + 0x548E, 0xCFA4, 0x5490, 0xDCFB, 0x54A4, 0xF6E3, 0x54A8, 0xEDAA, + 0x54AB, 0xF2A1, 0x54AC, 0xCEE1, 0x54B3, 0xFAA6, 0x54B8, 0xF9E0, + 0x54BD, 0xECD6, 0x54C0, 0xE4EE, 0x54C1, 0xF9A1, 0x54C4, 0xFBEF, + 0x54C8, 0xF9EB, 0x54C9, 0xEEA3, 0x54E1, 0xEAAC, 0x54E5, 0xCAA8, + 0x54E8, 0xF4FA, 0x54ED, 0xCDD6, 0x54EE, 0xFCF6, 0x54F2, 0xF4C9, + 0x54FA, 0xF8D4, 0x5504, 0xF8A6, 0x5506, 0xDECA, 0x5507, 0xF2C6, + 0x550E, 0xD7DA, 0x5510, 0xD3D0, 0x551C, 0xD8C5, 0x552F, 0xEAE6, + 0x5531, 0xF3DD, 0x5535, 0xE4DA, 0x553E, 0xF6E4, 0x5544, 0xF6F2, + 0x5546, 0xDFC2, 0x554F, 0xD9FD, 0x5553, 0xCCF6, 0x5556, 0xD3BA, + 0x555E, 0xE4AF, 0x5563, 0xF9E1, 0x557C, 0xF0A6, 0x5580, 0xCBD3, + 0x5584, 0xE0BC, 0x5586, 0xF4CA, 0x5587, 0xD4FA, 0x5589, 0xFDAA, + 0x558A, 0xF9E2, 0x5598, 0xF4B7, 0x5599, 0xFDC2, 0x559A, 0xFCB0, + 0x559C, 0xFDEC, 0x559D, 0xCAE2, 0x55A7, 0xFDBD, 0x55A9, 0xEAE7, + 0x55AA, 0xDFC3, 0x55AB, 0xD1D2, 0x55AC, 0xCEE2, 0x55AE, 0xD3A4, + 0x55C5, 0xFDAB, 0x55C7, 0xDFE0, 0x55D4, 0xF2C7, 0x55DA, 0xE7F0, + 0x55DC, 0xD0EE, 0x55DF, 0xF3AA, 0x55E3, 0xDECB, 0x55E4, 0xF6B8, + 0x55FD, 0xE1F5, 0x55FE, 0xF1B3, 0x5606, 0xF7A3, 0x5609, 0xCAA9, + 0x5614, 0xCFA5, 0x5617, 0xDFC4, 0x562F, 0xE1B0, 0x5632, 0xF0BF, + 0x5634, 0xF6A4, 0x5636, 0xE3B6, 0x5653, 0xFAC6, 0x5668, 0xD0EF, + 0x566B, 0xFDED, 0x5674, 0xDDC4, 0x5686, 0xFCF7, 0x56A5, 0xE6BF, + 0x56AC, 0xDEAD, 0x56AE, 0xFABF, 0x56B4, 0xE5F1, 0x56BC, 0xEDC4, + 0x56CA, 0xD2A5, 0x56CD, 0xFDEE, 0x56D1, 0xF5B6, 0x56DA, 0xE1F6, + 0x56DB, 0xDECC, 0x56DE, 0xFCDE, 0x56E0, 0xECD7, 0x56F0, 0xCDDD, + 0x56F9, 0xD6B7, 0x56FA, 0xCDB3, 0x5703, 0xF8D5, 0x5704, 0xE5D8, + 0x5708, 0xCFEA, 0x570B, 0xCFD0, 0x570D, 0xEACC, 0x5712, 0xEAAE, + 0x5713, 0xEAAD, 0x5716, 0xD3F1, 0x5718, 0xD3A5, 0x571F, 0xF7CF, + 0x5728, 0xEEA4, 0x572D, 0xD0A4, 0x5730, 0xF2A2, 0x573B, 0xD0F0, + 0x5740, 0xF2A3, 0x5742, 0xF7F8, 0x5747, 0xD0B3, 0x574A, 0xDBA9, + 0x574D, 0xD3BB, 0x574E, 0xCAEC, 0x5750, 0xF1A6, 0x5751, 0xCBD5, + 0x5761, 0xF7E7, 0x5764, 0xCDDE, 0x5766, 0xF7A4, 0x576A, 0xF8C0, + 0x576E, 0xD3DD, 0x5770, 0xCCD0, 0x5775, 0xCFA6, 0x577C, 0xF6F3, + 0x5782, 0xE1F7, 0x5788, 0xD3DC, 0x578B, 0xFAFE, 0x5793, 0xFAA7, + 0x57A0, 0xEBD9, 0x57A2, 0xCFA7, 0x57A3, 0xEAAF, 0x57C3, 0xE4EF, + 0x57C7, 0xE9B9, 0x57C8, 0xF1D8, 0x57CB, 0xD8D8, 0x57CE, 0xE0F2, + 0x57DF, 0xE6B4, 0x57E0, 0xDCFC, 0x57F0, 0xF3F1, 0x57F4, 0xE3D0, + 0x57F7, 0xF2FB, 0x57F9, 0xDBC6, 0x57FA, 0xD0F1, 0x57FC, 0xD0F2, + 0x5800, 0xCFDC, 0x5802, 0xD3D1, 0x5805, 0xCCB1, 0x5806, 0xF7D8, + 0x5808, 0xCBA8, 0x5809, 0xEBBC, 0x580A, 0xE4BE, 0x581E, 0xF4DC, + 0x5821, 0xDCC2, 0x5824, 0xF0A7, 0x5827, 0xE6C0, 0x582A, 0xCAED, + 0x582F, 0xE8EB, 0x5830, 0xE5E8, 0x5831, 0xDCC3, 0x5834, 0xEDDE, + 0x5835, 0xD3F2, 0x583A, 0xCCF7, 0x584A, 0xCED4, 0x584B, 0xE7AB, + 0x584F, 0xCBC3, 0x5851, 0xE1B1, 0x5854, 0xF7B2, 0x5857, 0xD3F3, + 0x5858, 0xD3D2, 0x585A, 0xF5C0, 0x585E, 0xDFDD, 0x5861, 0xEEF3, + 0x5862, 0xE7F1, 0x5864, 0xFDB4, 0x5875, 0xF2C8, 0x5879, 0xF3D2, + 0x587C, 0xEEF4, 0x587E, 0xE2D3, 0x5883, 0xCCD1, 0x5885, 0xDFEA, + 0x5889, 0xE9BA, 0x5893, 0xD9D7, 0x589C, 0xF5CD, 0x589E, 0xF1F2, + 0x589F, 0xFAC7, 0x58A8, 0xD9F8, 0x58A9, 0xD4C2, 0x58AE, 0xF6E5, + 0x58B3, 0xDDC5, 0x58BA, 0xE7F2, 0x58BB, 0xEDDF, 0x58BE, 0xCACB, + 0x58C1, 0xDBFA, 0x58C5, 0xE8B5, 0x58C7, 0xD3A6, 0x58CE, 0xFDB5, + 0x58D1, 0xF9C9, 0x58D3, 0xE4E2, 0x58D5, 0xFBBD, 0x58D8, 0xD7A4, + 0x58D9, 0xCEC5, 0x58DE, 0xCED5, 0x58DF, 0xD6E6, 0x58E4, 0xE5BD, + 0x58EB, 0xDECD, 0x58EC, 0xECF3, 0x58EF, 0xEDE0, 0x58F9, 0xECEC, + 0x58FA, 0xFBBE, 0x58FB, 0xDFEB, 0x58FD, 0xE1F8, 0x590F, 0xF9BE, + 0x5914, 0xD0F3, 0x5915, 0xE0AA, 0x5916, 0xE8E2, 0x5919, 0xE2D4, + 0x591A, 0xD2FD, 0x591C, 0xE5A8, 0x5922, 0xD9D3, 0x5927, 0xD3DE, + 0x5929, 0xF4B8, 0x592A, 0xF7BC, 0x592B, 0xDCFD, 0x592D, 0xE8EC, + 0x592E, 0xE4E7, 0x5931, 0xE3F7, 0x5937, 0xECA8, 0x593E, 0xFAF1, + 0x5944, 0xE5F2, 0x5947, 0xD0F4, 0x5948, 0xD2AF, 0x5949, 0xDCE5, + 0x594E, 0xD0A5, 0x594F, 0xF1B4, 0x5950, 0xFCB1, 0x5951, 0xCCF8, + 0x5954, 0xDDC6, 0x5955, 0xFAD1, 0x5957, 0xF7DF, 0x595A, 0xFAA8, + 0x5960, 0xEEF5, 0x5962, 0xDECE, 0x5967, 0xE7F3, 0x596A, 0xF7AC, + 0x596B, 0xEBC4, 0x596C, 0xEDE1, 0x596D, 0xE0AB, 0x596E, 0xDDC7, + 0x5973, 0xD2B3, 0x5974, 0xD2BF, 0x5978, 0xCACC, 0x597D, 0xFBBF, + 0x5982, 0xE5FD, 0x5983, 0xDDE5, 0x5984, 0xD8CD, 0x598A, 0xECF4, + 0x5993, 0xD0F5, 0x5996, 0xE8ED, 0x5997, 0xD0D2, 0x5999, 0xD9D8, + 0x59A5, 0xF6E6, 0x59A8, 0xDBAA, 0x59AC, 0xF7E0, 0x59B9, 0xD8D9, + 0x59BB, 0xF4A3, 0x59BE, 0xF4DD, 0x59C3, 0xEFD1, 0x59C6, 0xD9B5, + 0x59C9, 0xEDAB, 0x59CB, 0xE3B7, 0x59D0, 0xEEBB, 0x59D1, 0xCDB4, + 0x59D3, 0xE0F3, 0x59D4, 0xEACD, 0x59D9, 0xECF5, 0x59DA, 0xE8EE, + 0x59DC, 0xCBA9, 0x59DD, 0xF1AF, 0x59E6, 0xCACD, 0x59E8, 0xECA9, + 0x59EA, 0xF2EB, 0x59EC, 0xFDEF, 0x59EE, 0xF9F3, 0x59F8, 0xE6C1, + 0x59FB, 0xECD8, 0x59FF, 0xEDAC, 0x5A01, 0xEACE, 0x5A03, 0xE8DF, + 0x5A11, 0xDECF, 0x5A18, 0xD2A6, 0x5A1B, 0xE7F4, 0x5A1C, 0xD1D6, + 0x5A1F, 0xE6C2, 0x5A20, 0xE3E3, 0x5A25, 0xE4B0, 0x5A29, 0xD8B4, + 0x5A36, 0xF6A5, 0x5A3C, 0xF3DE, 0x5A41, 0xD7A5, 0x5A46, 0xF7E8, + 0x5A49, 0xE8C6, 0x5A5A, 0xFBE6, 0x5A62, 0xDDE6, 0x5A66, 0xDCFE, + 0x5A92, 0xD8DA, 0x5A9A, 0xDAAC, 0x5A9B, 0xEAB0, 0x5AA4, 0xE3B8, + 0x5AC1, 0xCAAA, 0x5AC2, 0xE1F9, 0x5AC4, 0xEAB1, 0x5AC9, 0xF2EC, + 0x5ACC, 0xFAEE, 0x5AE1, 0xEED5, 0x5AE6, 0xF9F4, 0x5AE9, 0xD2EC, + 0x5B05, 0xFBFB, 0x5B09, 0xFDF0, 0x5B0B, 0xE0BD, 0x5B0C, 0xCEE3, + 0x5B16, 0xF8C6, 0x5B2A, 0xDEAE, 0x5B40, 0xDFC5, 0x5B43, 0xE5BE, + 0x5B50, 0xEDAD, 0x5B51, 0xFAEA, 0x5B54, 0xCDEE, 0x5B55, 0xEDA6, + 0x5B57, 0xEDAE, 0x5B58, 0xF0ED, 0x5B5A, 0xDDA1, 0x5B5C, 0xEDAF, + 0x5B5D, 0xFCF8, 0x5B5F, 0xD8EB, 0x5B63, 0xCCF9, 0x5B64, 0xCDB5, + 0x5B69, 0xFAA9, 0x5B6B, 0xE1DD, 0x5B70, 0xE2D5, 0x5B71, 0xEDCF, + 0x5B75, 0xDDA2, 0x5B78, 0xF9CA, 0x5B7A, 0xEAE8, 0x5B7C, 0xE5ED, + 0x5B85, 0xD3EB, 0x5B87, 0xE9D4, 0x5B88, 0xE1FA, 0x5B89, 0xE4CC, + 0x5B8B, 0xE1E4, 0x5B8C, 0xE8C7, 0x5B8F, 0xCEDB, 0x5B93, 0xDCD5, + 0x5B95, 0xF7B5, 0x5B96, 0xFCF3, 0x5B97, 0xF0F3, 0x5B98, 0xCEAF, + 0x5B99, 0xF1B5, 0x5B9A, 0xEFD2, 0x5B9B, 0xE8C8, 0x5B9C, 0xEBF1, + 0x5BA2, 0xCBD4, 0x5BA3, 0xE0BE, 0x5BA4, 0xE3F8, 0x5BA5, 0xEAE9, + 0x5BA6, 0xFCB2, 0x5BAC, 0xE0F4, 0x5BAE, 0xCFE0, 0x5BB0, 0xEEA5, + 0x5BB3, 0xFAAA, 0x5BB4, 0xE6C3, 0x5BB5, 0xE1B2, 0x5BB6, 0xCAAB, + 0x5BB8, 0xE3E4, 0x5BB9, 0xE9BB, 0x5BBF, 0xE2D6, 0x5BC0, 0xF3F2, + 0x5BC2, 0xEED6, 0x5BC3, 0xEAB2, 0x5BC4, 0xD0F6, 0x5BC5, 0xECD9, + 0x5BC6, 0xDACB, 0x5BC7, 0xCFA8, 0x5BCC, 0xDDA3, 0x5BD0, 0xD8DB, + 0x5BD2, 0xF9CE, 0x5BD3, 0xE9D5, 0x5BD4, 0xE3D1, 0x5BD7, 0xD2BC, + 0x5BDE, 0xD8AC, 0x5BDF, 0xF3CC, 0x5BE1, 0xCDFB, 0x5BE2, 0xF6D6, + 0x5BE4, 0xE7F5, 0x5BE5, 0xE8EF, 0x5BE6, 0xE3F9, 0x5BE7, 0xD2BB, + 0x5BE8, 0xF3F3, 0x5BE9, 0xE3FB, 0x5BEB, 0xDED0, 0x5BEC, 0xCEB0, + 0x5BEE, 0xD6F7, 0x5BEF, 0xF1D9, 0x5BF5, 0xF5C1, 0x5BF6, 0xDCC4, + 0x5BF8, 0xF5BB, 0x5BFA, 0xDED1, 0x5C01, 0xDCE6, 0x5C04, 0xDED2, + 0x5C07, 0xEDE2, 0x5C08, 0xEEF6, 0x5C09, 0xEACF, 0x5C0A, 0xF0EE, + 0x5C0B, 0xE3FC, 0x5C0D, 0xD3DF, 0x5C0E, 0xD3F4, 0x5C0F, 0xE1B3, + 0x5C11, 0xE1B4, 0x5C16, 0xF4D3, 0x5C19, 0xDFC6, 0x5C24, 0xE9D6, + 0x5C28, 0xDBAB, 0x5C31, 0xF6A6, 0x5C38, 0xE3B9, 0x5C39, 0xEBC5, + 0x5C3A, 0xF4A9, 0x5C3B, 0xCDB6, 0x5C3C, 0xD2F9, 0x5C3E, 0xDAAD, + 0x5C3F, 0xD2E3, 0x5C40, 0xCFD1, 0x5C45, 0xCBDC, 0x5C46, 0xCCFA, + 0x5C48, 0xCFDD, 0x5C4B, 0xE8A9, 0x5C4D, 0xE3BB, 0x5C4E, 0xE3BA, + 0x5C51, 0xE0DA, 0x5C55, 0xEEF7, 0x5C5B, 0xDCB3, 0x5C60, 0xD3F5, + 0x5C62, 0xD7A6, 0x5C64, 0xF6B5, 0x5C65, 0xD7DB, 0x5C6C, 0xE1D5, + 0x5C6F, 0xD4EA, 0x5C71, 0xDFA3, 0x5C79, 0xFDDF, 0x5C90, 0xD0F7, + 0x5C91, 0xEDD4, 0x5CA1, 0xCBAA, 0x5CA9, 0xE4DB, 0x5CAB, 0xE1FB, + 0x5CAC, 0xCBA2, 0x5CB1, 0xD3E0, 0x5CB3, 0xE4BF, 0x5CB5, 0xFBC0, + 0x5CB7, 0xDABE, 0x5CB8, 0xE4CD, 0x5CBA, 0xD6B9, 0x5CBE, 0xEFC0, + 0x5CC0, 0xE1FC, 0x5CD9, 0xF6B9, 0x5CE0, 0xDFC7, 0x5CE8, 0xE4B1, + 0x5CEF, 0xDCE7, 0x5CF0, 0xDCE8, 0x5CF4, 0xFAD6, 0x5CF6, 0xD3F6, + 0x5CFB, 0xF1DA, 0x5CFD, 0xFAF2, 0x5D07, 0xE2FD, 0x5D0D, 0xD5CF, + 0x5D0E, 0xD0F8, 0x5D11, 0xCDDF, 0x5D14, 0xF5CB, 0x5D16, 0xE4F0, + 0x5D17, 0xCBAB, 0x5D19, 0xD7C4, 0x5D27, 0xE2FE, 0x5D29, 0xDDDA, + 0x5D4B, 0xDAAE, 0x5D4C, 0xCAEE, 0x5D50, 0xD5B9, 0x5D69, 0xE3A1, + 0x5D6C, 0xE8E3, 0x5D6F, 0xF3AB, 0x5D87, 0xCFA9, 0x5D8B, 0xD3F7, + 0x5D9D, 0xD4F1, 0x5DA0, 0xCEE4, 0x5DA2, 0xE8F2, 0x5DAA, 0xE5F5, + 0x5DB8, 0xE7AE, 0x5DBA, 0xD6BA, 0x5DBC, 0xDFEC, 0x5DBD, 0xE4C0, + 0x5DCD, 0xE8E4, 0x5DD2, 0xD8B5, 0x5DD6, 0xE4DC, 0x5DDD, 0xF4B9, + 0x5DDE, 0xF1B6, 0x5DE1, 0xE2DE, 0x5DE2, 0xE1B5, 0x5DE5, 0xCDEF, + 0x5DE6, 0xF1A7, 0x5DE7, 0xCEE5, 0x5DE8, 0xCBDD, 0x5DEB, 0xD9E3, + 0x5DEE, 0xF3AC, 0x5DF1, 0xD0F9, 0x5DF2, 0xECAB, 0x5DF3, 0xDED3, + 0x5DF4, 0xF7E9, 0x5DF7, 0xF9F5, 0x5DFD, 0xE1DE, 0x5DFE, 0xCBEE, + 0x5E02, 0xE3BC, 0x5E03, 0xF8D6, 0x5E06, 0xDBEE, 0x5E0C, 0xFDF1, + 0x5E11, 0xF7B6, 0x5E16, 0xF4DE, 0x5E19, 0xF2ED, 0x5E1B, 0xDBD9, + 0x5E1D, 0xF0A8, 0x5E25, 0xE1FD, 0x5E2B, 0xDED4, 0x5E2D, 0xE0AC, + 0x5E33, 0xEDE3, 0x5E36, 0xD3E1, 0x5E38, 0xDFC8, 0x5E3D, 0xD9B6, + 0x5E3F, 0xFDAC, 0x5E40, 0xEFD3, 0x5E44, 0xE4C1, 0x5E45, 0xF8EB, + 0x5E47, 0xDBAC, 0x5E4C, 0xFCC6, 0x5E55, 0xD8AD, 0x5E5F, 0xF6BA, + 0x5E61, 0xDBDF, 0x5E62, 0xD3D3, 0x5E63, 0xF8C7, 0x5E72, 0xCACE, + 0x5E73, 0xF8C1, 0x5E74, 0xD2B4, 0x5E77, 0xDCB4, 0x5E78, 0xFAB9, + 0x5E79, 0xCACF, 0x5E7B, 0xFCB3, 0x5E7C, 0xEAEA, 0x5E7D, 0xEAEB, + 0x5E7E, 0xD0FA, 0x5E84, 0xEDE4, 0x5E87, 0xDDE7, 0x5E8A, 0xDFC9, + 0x5E8F, 0xDFED, 0x5E95, 0xEEBC, 0x5E97, 0xEFC1, 0x5E9A, 0xCCD2, + 0x5E9C, 0xDDA4, 0x5EA0, 0xDFCA, 0x5EA6, 0xD3F8, 0x5EA7, 0xF1A8, + 0x5EAB, 0xCDB7, 0x5EAD, 0xEFD4, 0x5EB5, 0xE4DD, 0x5EB6, 0xDFEE, + 0x5EB7, 0xCBAC, 0x5EB8, 0xE9BC, 0x5EBE, 0xEAEC, 0x5EC2, 0xDFCB, + 0x5EC8, 0xF9BF, 0x5EC9, 0xD6AF, 0x5ECA, 0xD5C6, 0x5ED0, 0xCFAA, + 0x5ED3, 0xCEA9, 0x5ED6, 0xD6F8, 0x5EDA, 0xF1B7, 0x5EDB, 0xEEF8, + 0x5EDF, 0xD9D9, 0x5EE0, 0xF3DF, 0x5EE2, 0xF8C8, 0x5EE3, 0xCEC6, + 0x5EEC, 0xD5E6, 0x5EF3, 0xF4E6, 0x5EF6, 0xE6C5, 0x5EF7, 0xEFD5, + 0x5EFA, 0xCBEF, 0x5EFB, 0xFCDF, 0x5F01, 0xDCA7, 0x5F04, 0xD6E7, + 0x5F0A, 0xF8C9, 0x5F0F, 0xE3D2, 0x5F11, 0xE3BD, 0x5F13, 0xCFE1, + 0x5F14, 0xF0C0, 0x5F15, 0xECDA, 0x5F17, 0xDDD7, 0x5F18, 0xFBF0, + 0x5F1B, 0xECAC, 0x5F1F, 0xF0A9, 0x5F26, 0xFAD7, 0x5F27, 0xFBC1, + 0x5F29, 0xD2C0, 0x5F31, 0xE5B0, 0x5F35, 0xEDE5, 0x5F3A, 0xCBAD, + 0x5F3C, 0xF9B0, 0x5F48, 0xF7A5, 0x5F4A, 0xCBAE, 0x5F4C, 0xDAAF, + 0x5F4E, 0xD8B6, 0x5F56, 0xD3A7, 0x5F57, 0xFBB2, 0x5F59, 0xFDC4, + 0x5F5B, 0xECAD, 0x5F62, 0xFBA1, 0x5F66, 0xE5E9, 0x5F67, 0xE9EE, + 0x5F69, 0xF3F4, 0x5F6A, 0xF8F3, 0x5F6B, 0xF0C1, 0x5F6C, 0xDEAF, + 0x5F6D, 0xF8B0, 0x5F70, 0xF3E0, 0x5F71, 0xE7AF, 0x5F77, 0xDBAD, + 0x5F79, 0xE6B5, 0x5F7C, 0xF9A8, 0x5F7F, 0xDDD8, 0x5F80, 0xE8D9, + 0x5F81, 0xEFD6, 0x5F85, 0xD3E2, 0x5F87, 0xE2DF, 0x5F8A, 0xFCE0, + 0x5F8B, 0xD7C8, 0x5F8C, 0xFDAD, 0x5F90, 0xDFEF, 0x5F91, 0xCCD3, + 0x5F92, 0xD3F9, 0x5F97, 0xD4F0, 0x5F98, 0xDBC7, 0x5F99, 0xDED5, + 0x5F9E, 0xF0F4, 0x5FA0, 0xD5D0, 0x5FA1, 0xE5D9, 0x5FA8, 0xFCC7, + 0x5FA9, 0xDCD6, 0x5FAA, 0xE2E0, 0x5FAE, 0xDAB0, 0x5FB5, 0xF3A3, + 0x5FB7, 0xD3EC, 0x5FB9, 0xF4CB, 0x5FBD, 0xFDC5, 0x5FC3, 0xE3FD, + 0x5FC5, 0xF9B1, 0x5FCC, 0xD0FB, 0x5FCD, 0xECDB, 0x5FD6, 0xF5BC, + 0x5FD7, 0xF2A4, 0x5FD8, 0xD8CE, 0x5FD9, 0xD8CF, 0x5FE0, 0xF5F7, + 0x5FEB, 0xF6E1, 0x5FF5, 0xD2B7, 0x5FFD, 0xFBEC, 0x5FFF, 0xDDC8, + 0x600F, 0xE4E8, 0x6012, 0xD2C1, 0x6016, 0xF8D7, 0x601C, 0xD6BB, + 0x601D, 0xDED6, 0x6020, 0xF7BD, 0x6021, 0xECAE, 0x6025, 0xD0E1, + 0x6027, 0xE0F5, 0x6028, 0xEAB3, 0x602A, 0xCED6, 0x602F, 0xCCA5, + 0x6041, 0xECF6, 0x6042, 0xE2E1, 0x6043, 0xE3BE, 0x604D, 0xFCC8, + 0x6050, 0xCDF0, 0x6052, 0xF9F6, 0x6055, 0xDFF0, 0x6059, 0xE5BF, + 0x605D, 0xCEBF, 0x6062, 0xFCE1, 0x6063, 0xEDB0, 0x6064, 0xFDD1, + 0x6065, 0xF6BB, 0x6068, 0xF9CF, 0x6069, 0xEBDA, 0x606A, 0xCAC1, + 0x606C, 0xD2B8, 0x606D, 0xCDF1, 0x606F, 0xE3D3, 0x6070, 0xFDE6, + 0x6085, 0xE6ED, 0x6089, 0xE3FA, 0x608C, 0xF0AA, 0x608D, 0xF9D0, + 0x6094, 0xFCE2, 0x6096, 0xF8A7, 0x609A, 0xE1E5, 0x609B, 0xEEF9, + 0x609F, 0xE7F6, 0x60A0, 0xEAED, 0x60A3, 0xFCB4, 0x60A4, 0xF5C2, + 0x60A7, 0xD7DC, 0x60B0, 0xF0F5, 0x60B2, 0xDDE8, 0x60B3, 0xD3ED, + 0x60B4, 0xF5FC, 0x60B6, 0xDABF, 0x60B8, 0xCCFB, 0x60BC, 0xD3FA, + 0x60BD, 0xF4A4, 0x60C5, 0xEFD7, 0x60C7, 0xD4C3, 0x60D1, 0xFBE3, + 0x60DA, 0xFBED, 0x60DC, 0xE0AD, 0x60DF, 0xEAEE, 0x60E0, 0xFBB3, + 0x60E1, 0xE4C2, 0x60F0, 0xF6E7, 0x60F1, 0xD2DD, 0x60F3, 0xDFCC, + 0x60F6, 0xFCC9, 0x60F9, 0xE5A9, 0x60FA, 0xE0F6, 0x60FB, 0xF6B3, + 0x6101, 0xE1FE, 0x6106, 0xCBF0, 0x6108, 0xEAEF, 0x6109, 0xEAF0, + 0x610D, 0xDAC0, 0x610E, 0xF8B4, 0x610F, 0xEBF2, 0x6115, 0xE4C3, + 0x611A, 0xE9D7, 0x611B, 0xE4F1, 0x611F, 0xCAEF, 0x6127, 0xCED7, + 0x6130, 0xFCCA, 0x6134, 0xF3E1, 0x6137, 0xCBC4, 0x613C, 0xE3E5, + 0x613E, 0xCBC5, 0x613F, 0xEAB4, 0x6142, 0xE9BD, 0x6144, 0xD7C9, + 0x6147, 0xEBDB, 0x6148, 0xEDB1, 0x614A, 0xCCC3, 0x614B, 0xF7BE, + 0x614C, 0xFCCB, 0x6153, 0xF8F4, 0x6155, 0xD9B7, 0x6158, 0xF3D3, + 0x6159, 0xF3D4, 0x615D, 0xF7E4, 0x615F, 0xF7D1, 0x6162, 0xD8B7, + 0x6163, 0xCEB1, 0x6164, 0xCAC2, 0x6167, 0xFBB4, 0x6168, 0xCBC6, + 0x616B, 0xF0F6, 0x616E, 0xD5E7, 0x6170, 0xEAD0, 0x6176, 0xCCD4, + 0x6177, 0xCBAF, 0x617D, 0xF4AA, 0x617E, 0xE9AF, 0x6181, 0xF5C3, + 0x6182, 0xE9D8, 0x618A, 0xDDE9, 0x618E, 0xF1F3, 0x6190, 0xD5FB, + 0x6191, 0xDEBB, 0x6194, 0xF4FB, 0x6198, 0xFDF3, 0x6199, 0xFDF2, + 0x619A, 0xF7A6, 0x61A4, 0xDDC9, 0x61A7, 0xD4D3, 0x61A9, 0xCCA8, + 0x61AB, 0xDAC1, 0x61AC, 0xCCD5, 0x61AE, 0xD9E4, 0x61B2, 0xFACA, + 0x61B6, 0xE5E3, 0x61BA, 0xD3BC, 0x61BE, 0xCAF0, 0x61C3, 0xD0C4, + 0x61C7, 0xCAD0, 0x61C8, 0xFAAB, 0x61C9, 0xEBEB, 0x61CA, 0xE7F8, + 0x61CB, 0xD9E5, 0x61E6, 0xD1D7, 0x61F2, 0xF3A4, 0x61F6, 0xD4FB, + 0x61F7, 0xFCE3, 0x61F8, 0xFAD8, 0x61FA, 0xF3D5, 0x61FC, 0xCFAB, + 0x61FF, 0xEBF3, 0x6200, 0xD5FC, 0x6207, 0xD3D4, 0x6208, 0xCDFC, + 0x620A, 0xD9E6, 0x620C, 0xE2F9, 0x620D, 0xE2A1, 0x620E, 0xEBD4, + 0x6210, 0xE0F7, 0x6211, 0xE4B2, 0x6212, 0xCCFC, 0x6216, 0xFBE4, + 0x621A, 0xF4AB, 0x621F, 0xD0BD, 0x6221, 0xCAF1, 0x622A, 0xEFB8, + 0x622E, 0xD7C0, 0x6230, 0xEEFA, 0x6231, 0xFDF4, 0x6234, 0xD3E3, + 0x6236, 0xFBC2, 0x623E, 0xD5E8, 0x623F, 0xDBAE, 0x6240, 0xE1B6, + 0x6241, 0xF8B7, 0x6247, 0xE0BF, 0x6248, 0xFBC3, 0x6249, 0xDDEA, + 0x624B, 0xE2A2, 0x624D, 0xEEA6, 0x6253, 0xF6E8, 0x6258, 0xF6F5, + 0x626E, 0xDDCA, 0x6271, 0xD0E2, 0x6276, 0xDDA6, 0x6279, 0xDDEB, + 0x627C, 0xE4F9, 0x627F, 0xE3AF, 0x6280, 0xD0FC, 0x6284, 0xF4FC, + 0x6289, 0xCCBC, 0x628A, 0xF7EA, 0x6291, 0xE5E4, 0x6292, 0xDFF1, + 0x6295, 0xF7E1, 0x6297, 0xF9F7, 0x6298, 0xEFB9, 0x629B, 0xF8D8, + 0x62AB, 0xF9A9, 0x62B1, 0xF8D9, 0x62B5, 0xEEBD, 0x62B9, 0xD8C6, + 0x62BC, 0xE4E3, 0x62BD, 0xF5CE, 0x62C2, 0xDDD9, 0x62C7, 0xD9E7, + 0x62C8, 0xD2B9, 0x62C9, 0xD5C3, 0x62CC, 0xDAE5, 0x62CD, 0xDAD0, + 0x62CF, 0xD1D9, 0x62D0, 0xCED8, 0x62D2, 0xCBDE, 0x62D3, 0xF4AC, + 0x62D4, 0xDAFB, 0x62D6, 0xF6E9, 0x62D7, 0xE8F3, 0x62D8, 0xCFAC, + 0x62D9, 0xF0F0, 0x62DB, 0xF4FD, 0x62DC, 0xDBC8, 0x62EC, 0xCEC0, + 0x62ED, 0xE3D4, 0x62EE, 0xD1CF, 0x62EF, 0xF1F5, 0x62F1, 0xCDF2, + 0x62F3, 0xCFEB, 0x62F7, 0xCDB8, 0x62FE, 0xE3A6, 0x62FF, 0xD1DA, + 0x6301, 0xF2A5, 0x6307, 0xF2A6, 0x6309, 0xE4CE, 0x6311, 0xD3FB, + 0x632B, 0xF1A9, 0x632F, 0xF2C9, 0x633A, 0xEFD8, 0x633B, 0xE6C9, + 0x633D, 0xD8B8, 0x633E, 0xFAF3, 0x6349, 0xF3B5, 0x634C, 0xF8A4, + 0x634F, 0xD1F3, 0x6350, 0xE6C8, 0x6355, 0xF8DA, 0x6367, 0xDCE9, + 0x6368, 0xDED7, 0x636E, 0xCBDF, 0x6372, 0xCFEC, 0x6377, 0xF4DF, + 0x637A, 0xD1F4, 0x637B, 0xD2BA, 0x637F, 0xDFF2, 0x6383, 0xE1B7, + 0x6388, 0xE2A3, 0x6389, 0xD3FC, 0x638C, 0xEDE6, 0x6392, 0xDBC9, + 0x6396, 0xE4FA, 0x6398, 0xCFDE, 0x639B, 0xCED0, 0x63A0, 0xD5D3, + 0x63A1, 0xF3F5, 0x63A2, 0xF7AE, 0x63A5, 0xEFC8, 0x63A7, 0xCDF3, + 0x63A8, 0xF5CF, 0x63A9, 0xE5F3, 0x63AA, 0xF0C2, 0x63C0, 0xCAD1, + 0x63C4, 0xEAF1, 0x63C6, 0xD0A6, 0x63CF, 0xD9DA, 0x63D0, 0xF0AB, + 0x63D6, 0xEBE7, 0x63DA, 0xE5C0, 0x63DB, 0xFCB5, 0x63E1, 0xE4C4, + 0x63ED, 0xCCA9, 0x63EE, 0xFDC6, 0x63F4, 0xEAB5, 0x63F6, 0xE5AA, + 0x63F7, 0xDFBA, 0x640D, 0xE1DF, 0x640F, 0xDAD1, 0x6414, 0xE1B8, + 0x6416, 0xE8F4, 0x6417, 0xD3FD, 0x641C, 0xE2A4, 0x6422, 0xF2CA, + 0x642C, 0xDAE6, 0x642D, 0xF7B3, 0x643A, 0xFDCD, 0x643E, 0xF3B6, + 0x6458, 0xEED7, 0x6460, 0xF5C4, 0x6469, 0xD8A4, 0x646F, 0xF2A7, + 0x6478, 0xD9B8, 0x6479, 0xD9B9, 0x647A, 0xEFC9, 0x6488, 0xD6CE, + 0x6491, 0xF7CB, 0x6492, 0xDFAE, 0x6493, 0xE8F5, 0x649A, 0xD2B5, + 0x649E, 0xD3D5, 0x64A4, 0xF4CC, 0x64A5, 0xDAFC, 0x64AB, 0xD9E8, + 0x64AD, 0xF7EB, 0x64AE, 0xF5C9, 0x64B0, 0xF3BC, 0x64B2, 0xDAD2, + 0x64BB, 0xD3B5, 0x64C1, 0xE8B6, 0x64C4, 0xD6CF, 0x64C5, 0xF4BA, + 0x64C7, 0xF7C9, 0x64CA, 0xCCAA, 0x64CD, 0xF0C3, 0x64CE, 0xCCD6, + 0x64D2, 0xD0D3, 0x64D4, 0xD3BD, 0x64D8, 0xDBFB, 0x64DA, 0xCBE0, + 0x64E1, 0xD3E4, 0x64E2, 0xF6F7, 0x64E5, 0xD5BA, 0x64E6, 0xF3CD, + 0x64E7, 0xCBE1, 0x64EC, 0xEBF4, 0x64F2, 0xF4AD, 0x64F4, 0xFCAA, + 0x64FA, 0xF7EC, 0x64FE, 0xE8F6, 0x6500, 0xDAE7, 0x6504, 0xF7CC, + 0x6518, 0xE5C1, 0x651D, 0xE0EE, 0x6523, 0xD5FD, 0x652A, 0xCEE6, + 0x652B, 0xFCAB, 0x652C, 0xD5BB, 0x652F, 0xF2A8, 0x6536, 0xE2A5, + 0x6537, 0xCDB9, 0x6538, 0xEAF2, 0x6539, 0xCBC7, 0x653B, 0xCDF4, + 0x653E, 0xDBAF, 0x653F, 0xEFD9, 0x6545, 0xCDBA, 0x6548, 0xFCF9, + 0x654D, 0xDFF3, 0x654E, 0xCEE7, 0x654F, 0xDAC2, 0x6551, 0xCFAD, + 0x6556, 0xE7F9, 0x6557, 0xF8A8, 0x655E, 0xF3E2, 0x6562, 0xCAF2, + 0x6563, 0xDFA4, 0x6566, 0xD4C4, 0x656C, 0xCCD7, 0x656D, 0xE5C2, + 0x6572, 0xCDBB, 0x6574, 0xEFDA, 0x6575, 0xEED8, 0x6577, 0xDDA7, + 0x6578, 0xE2A6, 0x657E, 0xE0C0, 0x6582, 0xD6B0, 0x6583, 0xF8CA, + 0x6585, 0xFCFA, 0x6587, 0xD9FE, 0x658C, 0xDEB0, 0x6590, 0xDDEC, + 0x6591, 0xDAE8, 0x6597, 0xD4E0, 0x6599, 0xD6F9, 0x659B, 0xCDD7, + 0x659C, 0xDED8, 0x659F, 0xF2F8, 0x65A1, 0xE4D6, 0x65A4, 0xD0C5, + 0x65A5, 0xF4AE, 0x65A7, 0xDDA8, 0x65AB, 0xEDC5, 0x65AC, 0xF3D6, + 0x65AF, 0xDED9, 0x65B0, 0xE3E6, 0x65B7, 0xD3A8, 0x65B9, 0xDBB0, + 0x65BC, 0xE5DA, 0x65BD, 0xE3BF, 0x65C1, 0xDBB1, 0x65C5, 0xD5E9, + 0x65CB, 0xE0C1, 0x65CC, 0xEFDB, 0x65CF, 0xF0E9, 0x65D2, 0xD7B2, + 0x65D7, 0xD0FD, 0x65E0, 0xD9E9, 0x65E3, 0xD0FE, 0x65E5, 0xECED, + 0x65E6, 0xD3A9, 0x65E8, 0xF2A9, 0x65E9, 0xF0C4, 0x65EC, 0xE2E2, + 0x65ED, 0xE9EF, 0x65F1, 0xF9D1, 0x65F4, 0xE9D9, 0x65FA, 0xE8DA, + 0x65FB, 0xDAC3, 0x65FC, 0xDAC4, 0x65FD, 0xD4C5, 0x65FF, 0xE7FA, + 0x6606, 0xCDE0, 0x6607, 0xE3B0, 0x6609, 0xDBB2, 0x660A, 0xFBC4, + 0x660C, 0xF3E3, 0x660E, 0xD9A5, 0x660F, 0xFBE7, 0x6610, 0xDDCB, + 0x6611, 0xD0D4, 0x6613, 0xE6B6, 0x6614, 0xE0AE, 0x6615, 0xFDDA, + 0x661E, 0xDCB5, 0x661F, 0xE0F8, 0x6620, 0xE7B1, 0x6625, 0xF5F0, + 0x6627, 0xD8DC, 0x6628, 0xEDC6, 0x662D, 0xE1B9, 0x662F, 0xE3C0, + 0x6630, 0xF9C0, 0x6631, 0xE9F0, 0x6634, 0xD9DB, 0x6636, 0xF3E4, + 0x663A, 0xDCB6, 0x663B, 0xE4E9, 0x6641, 0xF0C5, 0x6642, 0xE3C1, + 0x6643, 0xFCCC, 0x6644, 0xFCCD, 0x6649, 0xF2CB, 0x664B, 0xF2CC, + 0x664F, 0xE4CF, 0x6659, 0xF1DB, 0x665B, 0xFAD9, 0x665D, 0xF1B8, + 0x665E, 0xFDF5, 0x665F, 0xE0F9, 0x6664, 0xE7FB, 0x6665, 0xFCB7, + 0x6666, 0xFCE4, 0x6667, 0xFBC5, 0x6668, 0xE3E7, 0x6669, 0xD8B9, + 0x666B, 0xF6F8, 0x666E, 0xDCC5, 0x666F, 0xCCD8, 0x6673, 0xE0AF, + 0x6674, 0xF4E7, 0x6676, 0xEFDC, 0x6677, 0xCFFC, 0x6678, 0xEFDD, + 0x667A, 0xF2AA, 0x6684, 0xFDBE, 0x6687, 0xCAAC, 0x6688, 0xFDBB, + 0x6689, 0xFDC7, 0x668E, 0xE7B2, 0x6690, 0xEAD1, 0x6691, 0xDFF4, + 0x6696, 0xD1EC, 0x6697, 0xE4DE, 0x6698, 0xE5C3, 0x669D, 0xD9A6, + 0x66A0, 0xCDBC, 0x66A2, 0xF3E5, 0x66AB, 0xEDD5, 0x66AE, 0xD9BA, + 0x66B2, 0xEDE7, 0x66B3, 0xFBB5, 0x66B4, 0xF8EC, 0x66B9, 0xE0E7, + 0x66BB, 0xCCD9, 0x66BE, 0xD4C6, 0x66C4, 0xE7A5, 0x66C6, 0xD5F5, + 0x66C7, 0xD3BE, 0x66C9, 0xFCFB, 0x66D6, 0xE4F2, 0x66D9, 0xDFF5, + 0x66DC, 0xE8F8, 0x66DD, 0xF8ED, 0x66E0, 0xCEC7, 0x66E6, 0xFDF6, + 0x66F0, 0xE8D8, 0x66F2, 0xCDD8, 0x66F3, 0xE7D6, 0x66F4, 0xCCDA, + 0x66F7, 0xCAE3, 0x66F8, 0xDFF6, 0x66F9, 0xF0C7, 0x66FA, 0xF0C6, + 0x66FC, 0xD8BA, 0x66FE, 0xF1F4, 0x66FF, 0xF4F0, 0x6700, 0xF5CC, + 0x6703, 0xFCE5, 0x6708, 0xEAC5, 0x6709, 0xEAF3, 0x670B, 0xDDDB, + 0x670D, 0xDCD7, 0x6714, 0xDEFD, 0x6715, 0xF2F9, 0x6717, 0xD5C7, + 0x671B, 0xD8D0, 0x671D, 0xF0C8, 0x671E, 0xD1A1, 0x671F, 0xD1A2, + 0x6726, 0xD9D4, 0x6727, 0xD6E8, 0x6728, 0xD9CA, 0x672A, 0xDAB1, + 0x672B, 0xD8C7, 0x672C, 0xDCE2, 0x672D, 0xF3CE, 0x672E, 0xF5F4, + 0x6731, 0xF1B9, 0x6734, 0xDAD3, 0x6736, 0xF6EA, 0x673A, 0xCFF5, + 0x673D, 0xFDAE, 0x6746, 0xCAD2, 0x6749, 0xDFB4, 0x674E, 0xD7DD, + 0x674F, 0xFABA, 0x6750, 0xEEA7, 0x6751, 0xF5BD, 0x6753, 0xF8F5, + 0x6756, 0xEDE8, 0x675C, 0xD4E1, 0x675E, 0xD1A3, 0x675F, 0xE1D6, + 0x676D, 0xF9F8, 0x676F, 0xDBCA, 0x6770, 0xCBF9, 0x6771, 0xD4D4, + 0x6773, 0xD9DC, 0x6775, 0xEEBE, 0x6777, 0xF7ED, 0x677B, 0xD2EE, + 0x677E, 0xE1E6, 0x677F, 0xF7F9, 0x6787, 0xDDED, 0x6789, 0xE8DB, + 0x678B, 0xDBB3, 0x678F, 0xD1F7, 0x6790, 0xE0B0, 0x6793, 0xD4E2, + 0x6795, 0xF6D7, 0x6797, 0xD7F9, 0x679A, 0xD8DD, 0x679C, 0xCDFD, + 0x679D, 0xF2AB, 0x67AF, 0xCDBD, 0x67B0, 0xF8C2, 0x67B3, 0xF2AC, + 0x67B6, 0xCAAD, 0x67B7, 0xCAAE, 0x67B8, 0xCFAE, 0x67BE, 0xE3C2, + 0x67C4, 0xDCB7, 0x67CF, 0xDBDA, 0x67D0, 0xD9BB, 0x67D1, 0xCAF3, + 0x67D2, 0xF6D3, 0x67D3, 0xE6F8, 0x67D4, 0xEAF5, 0x67DA, 0xEAF6, + 0x67DD, 0xF6F9, 0x67E9, 0xCFAF, 0x67EC, 0xCAD3, 0x67EF, 0xCAAF, + 0x67F0, 0xD2B0, 0x67F1, 0xF1BA, 0x67F3, 0xD7B3, 0x67F4, 0xE3C3, + 0x67F5, 0xF3FD, 0x67F6, 0xDEDA, 0x67FB, 0xDEDB, 0x67FE, 0xEFDE, + 0x6812, 0xE2E3, 0x6813, 0xEEFB, 0x6816, 0xDFF7, 0x6817, 0xD7CA, + 0x6821, 0xCEE8, 0x6822, 0xDBDB, 0x682A, 0xF1BB, 0x682F, 0xE9F1, + 0x6838, 0xFAB7, 0x6839, 0xD0C6, 0x683C, 0xCCAB, 0x683D, 0xEEA8, + 0x6840, 0xCBFA, 0x6841, 0xF9F9, 0x6842, 0xCCFD, 0x6843, 0xD3FE, + 0x6848, 0xE4D0, 0x684E, 0xF2EE, 0x6850, 0xD4D5, 0x6851, 0xDFCD, + 0x6853, 0xFCB8, 0x6854, 0xD1D0, 0x686D, 0xF2CD, 0x6876, 0xF7D2, + 0x687F, 0xCAD4, 0x6881, 0xD5D9, 0x6885, 0xD8DE, 0x688F, 0xCDD9, + 0x6893, 0xEEA9, 0x6894, 0xF6BC, 0x6897, 0xCCDB, 0x689D, 0xF0C9, + 0x689F, 0xFCFC, 0x68A1, 0xE8C9, 0x68A2, 0xF4FE, 0x68A7, 0xE7FC, + 0x68A8, 0xD7DE, 0x68AD, 0xDEDC, 0x68AF, 0xF0AC, 0x68B0, 0xCCFE, + 0x68B1, 0xCDE1, 0x68B3, 0xE1BA, 0x68B5, 0xDBEF, 0x68B6, 0xDAB2, + 0x68C4, 0xD1A5, 0x68C5, 0xDCB8, 0x68C9, 0xD8F6, 0x68CB, 0xD1A4, + 0x68CD, 0xCDE2, 0x68D2, 0xDCEA, 0x68D5, 0xF0F7, 0x68D7, 0xF0CA, + 0x68D8, 0xD0BE, 0x68DA, 0xDDDC, 0x68DF, 0xD4D6, 0x68E0, 0xD3D6, + 0x68E7, 0xEDD0, 0x68E8, 0xCDA1, 0x68EE, 0xDFB5, 0x68F2, 0xDFF8, + 0x68F9, 0xD4A1, 0x68FA, 0xCEB2, 0x6900, 0xE8CA, 0x6905, 0xEBF5, + 0x690D, 0xE3D5, 0x690E, 0xF5D0, 0x6912, 0xF5A1, 0x6927, 0xD9A7, + 0x6930, 0xE5AB, 0x693D, 0xE6CB, 0x693F, 0xF5F1, 0x694A, 0xE5C5, + 0x6953, 0xF9A3, 0x6954, 0xE0DB, 0x6955, 0xF6EB, 0x6957, 0xCBF1, + 0x6959, 0xD9EA, 0x695A, 0xF5A2, 0x695E, 0xD7D1, 0x6960, 0xD1F8, + 0x6961, 0xEAF8, 0x6962, 0xEAF9, 0x6963, 0xDAB3, 0x6968, 0xEFDF, + 0x696B, 0xF1EF, 0x696D, 0xE5F6, 0x696E, 0xEEBF, 0x696F, 0xE2E4, + 0x6975, 0xD0BF, 0x6977, 0xFAAC, 0x6978, 0xF5D1, 0x6979, 0xE7B3, + 0x6995, 0xE9BE, 0x699B, 0xF2CE, 0x699C, 0xDBB4, 0x69A5, 0xFCCE, + 0x69A7, 0xDDEE, 0x69AE, 0xE7B4, 0x69B4, 0xD7B4, 0x69BB, 0xF7B4, + 0x69C1, 0xCDBE, 0x69C3, 0xDAE9, 0x69CB, 0xCFB0, 0x69CC, 0xF7D9, + 0x69CD, 0xF3E6, 0x69D0, 0xCED9, 0x69E8, 0xCEAA, 0x69EA, 0xCBC8, + 0x69FB, 0xD0A7, 0x69FD, 0xF0CB, 0x69FF, 0xD0C7, 0x6A02, 0xE4C5, + 0x6A0A, 0xDBE0, 0x6A11, 0xD5DA, 0x6A13, 0xD7A7, 0x6A17, 0xEEC0, + 0x6A19, 0xF8F6, 0x6A1E, 0xF5D2, 0x6A1F, 0xEDE9, 0x6A21, 0xD9BC, + 0x6A23, 0xE5C6, 0x6A35, 0xF5A3, 0x6A38, 0xDAD4, 0x6A39, 0xE2A7, + 0x6A3A, 0xFBFC, 0x6A3D, 0xF1DC, 0x6A44, 0xCAF4, 0x6A48, 0xE8FA, + 0x6A4B, 0xCEE9, 0x6A52, 0xE9F8, 0x6A53, 0xE2E5, 0x6A58, 0xD0B9, + 0x6A59, 0xD4F2, 0x6A5F, 0xD1A6, 0x6A61, 0xDFCE, 0x6A6B, 0xFCF4, + 0x6A80, 0xD3AA, 0x6A84, 0xCCAC, 0x6A89, 0xEFE0, 0x6A8D, 0xE5E5, + 0x6A8E, 0xD0D5, 0x6A97, 0xDBFC, 0x6A9C, 0xFCE6, 0x6AA2, 0xCBFE, + 0x6AA3, 0xEDEA, 0x6AB3, 0xDEB1, 0x6ABB, 0xF9E3, 0x6AC2, 0xD4A2, + 0x6AC3, 0xCFF6, 0x6AD3, 0xD6D0, 0x6ADA, 0xD5EA, 0x6ADB, 0xF1EE, + 0x6AF6, 0xFACB, 0x6AFB, 0xE5A1, 0x6B04, 0xD5B1, 0x6B0A, 0xCFED, + 0x6B0C, 0xEDEB, 0x6B12, 0xD5B2, 0x6B16, 0xD5BC, 0x6B20, 0xFDE2, + 0x6B21, 0xF3AD, 0x6B23, 0xFDDB, 0x6B32, 0xE9B0, 0x6B3A, 0xD1A7, + 0x6B3D, 0xFDE3, 0x6B3E, 0xCEB3, 0x6B46, 0xFDE4, 0x6B47, 0xFACE, + 0x6B4C, 0xCAB0, 0x6B4E, 0xF7A7, 0x6B50, 0xCFB1, 0x6B5F, 0xE6A2, + 0x6B61, 0xFCB6, 0x6B62, 0xF2AD, 0x6B63, 0xEFE1, 0x6B64, 0xF3AE, + 0x6B65, 0xDCC6, 0x6B66, 0xD9EB, 0x6B6A, 0xE8E0, 0x6B72, 0xE1A8, + 0x6B77, 0xD5F6, 0x6B78, 0xCFFD, 0x6B7B, 0xDEDD, 0x6B7F, 0xD9D1, + 0x6B83, 0xE4EA, 0x6B84, 0xF2CF, 0x6B86, 0xF7BF, 0x6B89, 0xE2E6, + 0x6B8A, 0xE2A8, 0x6B96, 0xE3D6, 0x6B98, 0xEDD1, 0x6B9E, 0xE9F9, + 0x6BAE, 0xD6B1, 0x6BAF, 0xDEB2, 0x6BB2, 0xE0E8, 0x6BB5, 0xD3AB, + 0x6BB7, 0xEBDC, 0x6BBA, 0xDFAF, 0x6BBC, 0xCAC3, 0x6BBF, 0xEEFC, + 0x6BC1, 0xFDC3, 0x6BC5, 0xEBF6, 0x6BC6, 0xCFB2, 0x6BCB, 0xD9EC, + 0x6BCD, 0xD9BD, 0x6BCF, 0xD8DF, 0x6BD2, 0xD4B8, 0x6BD3, 0xEBBE, + 0x6BD4, 0xDDEF, 0x6BD6, 0xDDF0, 0x6BD7, 0xDDF1, 0x6BD8, 0xDDF2, + 0x6BDB, 0xD9BE, 0x6BEB, 0xFBC6, 0x6BEC, 0xCFB3, 0x6C08, 0xEEFD, + 0x6C0F, 0xE4AB, 0x6C11, 0xDAC5, 0x6C13, 0xD8EC, 0x6C23, 0xD1A8, + 0x6C34, 0xE2A9, 0x6C37, 0xDEBC, 0x6C38, 0xE7B5, 0x6C3E, 0xDBF0, + 0x6C40, 0xEFE2, 0x6C41, 0xF1F0, 0x6C42, 0xCFB4, 0x6C4E, 0xDBF1, + 0x6C50, 0xE0B1, 0x6C55, 0xDFA5, 0x6C57, 0xF9D2, 0x6C5A, 0xE7FD, + 0x6C5D, 0xE6A3, 0x6C5E, 0xFBF1, 0x6C5F, 0xCBB0, 0x6C60, 0xF2AE, + 0x6C68, 0xCDE7, 0x6C6A, 0xE8DC, 0x6C6D, 0xE7D7, 0x6C70, 0xF7C0, + 0x6C72, 0xD0E3, 0x6C76, 0xDAA1, 0x6C7A, 0xCCBD, 0x6C7D, 0xD1A9, + 0x6C7E, 0xDDCC, 0x6C81, 0xE3FE, 0x6C82, 0xD1AA, 0x6C83, 0xE8AA, + 0x6C85, 0xEAB6, 0x6C86, 0xF9FA, 0x6C87, 0xE6CC, 0x6C88, 0xF6D8, + 0x6C8C, 0xD4C7, 0x6C90, 0xD9CB, 0x6C92, 0xD9D2, 0x6C93, 0xD3CB, + 0x6C94, 0xD8F7, 0x6C95, 0xDAA9, 0x6C96, 0xF5F8, 0x6C99, 0xDEDE, + 0x6C9A, 0xF2AF, 0x6C9B, 0xF8A9, 0x6CAB, 0xD8C8, 0x6CAE, 0xEEC1, + 0x6CB3, 0xF9C1, 0x6CB8, 0xDDF3, 0x6CB9, 0xEAFA, 0x6CBB, 0xF6BD, + 0x6CBC, 0xE1BB, 0x6CBD, 0xCDBF, 0x6CBE, 0xF4D4, 0x6CBF, 0xE6CD, + 0x6CC1, 0xFCCF, 0x6CC2, 0xFBA2, 0x6CC4, 0xE0DC, 0x6CC9, 0xF4BB, + 0x6CCA, 0xDAD5, 0x6CCC, 0xF9B2, 0x6CD3, 0xFBF2, 0x6CD5, 0xDBF6, + 0x6CD7, 0xDEDF, 0x6CDB, 0xDBF2, 0x6CE1, 0xF8DC, 0x6CE2, 0xF7EE, + 0x6CE3, 0xEBE8, 0x6CE5, 0xD2FA, 0x6CE8, 0xF1BC, 0x6CEB, 0xFADA, + 0x6CEE, 0xDAEA, 0x6CEF, 0xDAC6, 0x6CF0, 0xF7C1, 0x6CF3, 0xE7B6, + 0x6D0B, 0xE5C7, 0x6D0C, 0xD6AC, 0x6D11, 0xDCC7, 0x6D17, 0xE1A9, + 0x6D19, 0xE2AA, 0x6D1B, 0xD5A6, 0x6D1E, 0xD4D7, 0x6D25, 0xF2D0, + 0x6D27, 0xEAFB, 0x6D29, 0xE0DD, 0x6D2A, 0xFBF3, 0x6D32, 0xF1BD, + 0x6D35, 0xE2E7, 0x6D36, 0xFDD7, 0x6D38, 0xCEC8, 0x6D39, 0xEAB7, + 0x6D3B, 0xFCC0, 0x6D3D, 0xFDE7, 0x6D3E, 0xF7EF, 0x6D41, 0xD7B5, + 0x6D59, 0xEFBA, 0x6D5A, 0xF1DD, 0x6D5C, 0xDEB3, 0x6D63, 0xE8CB, + 0x6D66, 0xF8DD, 0x6D69, 0xFBC7, 0x6D6A, 0xD5C8, 0x6D6C, 0xD7DF, + 0x6D6E, 0xDDA9, 0x6D74, 0xE9B1, 0x6D77, 0xFAAD, 0x6D78, 0xF6D9, + 0x6D79, 0xFAF4, 0x6D7F, 0xF8AA, 0x6D85, 0xE6EE, 0x6D87, 0xCCDC, + 0x6D88, 0xE1BC, 0x6D89, 0xE0EF, 0x6D8C, 0xE9BF, 0x6D8D, 0xFCFD, + 0x6D8E, 0xE6CE, 0x6D91, 0xE1D7, 0x6D93, 0xE6CF, 0x6D95, 0xF4F1, + 0x6DAF, 0xE4F3, 0x6DB2, 0xE4FB, 0x6DB5, 0xF9E4, 0x6DC0, 0xEFE3, + 0x6DC3, 0xCFEE, 0x6DC4, 0xF6BE, 0x6DC5, 0xE0B2, 0x6DC6, 0xFCFE, + 0x6DC7, 0xD1AB, 0x6DCB, 0xD7FA, 0x6DCF, 0xFBC8, 0x6DD1, 0xE2D7, + 0x6DD8, 0xD4A3, 0x6DD9, 0xF0F8, 0x6DDA, 0xD7A8, 0x6DDE, 0xE1E7, + 0x6DE1, 0xD3BF, 0x6DE8, 0xEFE4, 0x6DEA, 0xD7C5, 0x6DEB, 0xEBE2, + 0x6DEE, 0xFCE7, 0x6DF1, 0xE4A2, 0x6DF3, 0xE2E8, 0x6DF5, 0xE6D0, + 0x6DF7, 0xFBE8, 0x6DF8, 0xF4E8, 0x6DF9, 0xE5F4, 0x6DFA, 0xF4BC, + 0x6DFB, 0xF4D5, 0x6E17, 0xDFB6, 0x6E19, 0xFCB9, 0x6E1A, 0xEEC2, + 0x6E1B, 0xCAF5, 0x6E1F, 0xEFE5, 0x6E20, 0xCBE2, 0x6E21, 0xD4A4, + 0x6E23, 0xDEE0, 0x6E24, 0xDAFD, 0x6E25, 0xE4C6, 0x6E26, 0xE8BE, + 0x6E2B, 0xE0DE, 0x6E2C, 0xF6B4, 0x6E2D, 0xEAD2, 0x6E2F, 0xF9FB, + 0x6E32, 0xE0C2, 0x6E34, 0xCAE4, 0x6E36, 0xE7B7, 0x6E38, 0xEAFD, + 0x6E3A, 0xD9DD, 0x6E3C, 0xDAB4, 0x6E3D, 0xEEAA, 0x6E3E, 0xFBE9, + 0x6E43, 0xDBCB, 0x6E44, 0xDAB5, 0x6E4A, 0xF1BE, 0x6E4D, 0xD3AC, + 0x6E56, 0xFBC9, 0x6E58, 0xDFCF, 0x6E5B, 0xD3C0, 0x6E5C, 0xE3D7, + 0x6E5E, 0xEFE6, 0x6E5F, 0xFCD0, 0x6E67, 0xE9C0, 0x6E6B, 0xF5D3, + 0x6E6E, 0xECDC, 0x6E6F, 0xF7B7, 0x6E72, 0xEAB8, 0x6E73, 0xD1F9, + 0x6E7A, 0xDCC8, 0x6E90, 0xEAB9, 0x6E96, 0xF1DE, 0x6E9C, 0xD7B6, + 0x6E9D, 0xCFB5, 0x6E9F, 0xD9A8, 0x6EA2, 0xECEE, 0x6EA5, 0xDDAA, + 0x6EAA, 0xCDA2, 0x6EAB, 0xE8AE, 0x6EAF, 0xE1BD, 0x6EB1, 0xF2D1, + 0x6EB6, 0xE9C1, 0x6EBA, 0xD2FC, 0x6EC2, 0xDBB5, 0x6EC4, 0xF3E7, + 0x6EC5, 0xD8FE, 0x6EC9, 0xFCD1, 0x6ECB, 0xEDB2, 0x6ECC, 0xF4AF, + 0x6ECE, 0xFBA3, 0x6ED1, 0xFCC1, 0x6ED3, 0xEEAB, 0x6ED4, 0xD4A5, + 0x6EEF, 0xF4F2, 0x6EF4, 0xEED9, 0x6EF8, 0xFBCA, 0x6EFE, 0xCDE3, + 0x6EFF, 0xD8BB, 0x6F01, 0xE5DB, 0x6F02, 0xF8F7, 0x6F06, 0xF6D4, + 0x6F0F, 0xD7A9, 0x6F11, 0xCBC9, 0x6F14, 0xE6D1, 0x6F15, 0xF0CC, + 0x6F20, 0xD8AE, 0x6F22, 0xF9D3, 0x6F23, 0xD5FE, 0x6F2B, 0xD8BC, + 0x6F2C, 0xF2B0, 0x6F31, 0xE2AB, 0x6F32, 0xF3E8, 0x6F38, 0xEFC2, + 0x6F3F, 0xEDEC, 0x6F41, 0xE7B8, 0x6F51, 0xDAFE, 0x6F54, 0xCCBE, + 0x6F57, 0xF2FC, 0x6F58, 0xDAEB, 0x6F5A, 0xE2D8, 0x6F5B, 0xEDD6, + 0x6F5E, 0xD6D1, 0x6F5F, 0xE0B3, 0x6F62, 0xFCD2, 0x6F64, 0xEBC8, + 0x6F6D, 0xD3C1, 0x6F6E, 0xF0CD, 0x6F70, 0xCFF7, 0x6F7A, 0xEDD2, + 0x6F7C, 0xD4D8, 0x6F7D, 0xDCC9, 0x6F7E, 0xD7F1, 0x6F81, 0xDFBB, + 0x6F84, 0xF3A5, 0x6F88, 0xF4CD, 0x6F8D, 0xF1BF, 0x6F8E, 0xF8B1, + 0x6F90, 0xE9FA, 0x6F94, 0xFBCB, 0x6F97, 0xCAD5, 0x6FA3, 0xF9D4, + 0x6FA4, 0xF7CA, 0x6FA7, 0xD6C8, 0x6FAE, 0xFCE8, 0x6FAF, 0xF3BD, + 0x6FB1, 0xEEFE, 0x6FB3, 0xE7FE, 0x6FB9, 0xD3C2, 0x6FBE, 0xD3B6, + 0x6FC0, 0xCCAD, 0x6FC1, 0xF6FA, 0x6FC2, 0xD6B2, 0x6FC3, 0xD2D8, + 0x6FCA, 0xE7D8, 0x6FD5, 0xE3A5, 0x6FDA, 0xE7B9, 0x6FDF, 0xF0AD, + 0x6FE0, 0xFBCC, 0x6FE1, 0xEBA1, 0x6FE4, 0xD4A6, 0x6FE9, 0xFBCD, + 0x6FEB, 0xD5BD, 0x6FEC, 0xF1DF, 0x6FEF, 0xF6FB, 0x6FF1, 0xDEB4, + 0x6FFE, 0xD5EB, 0x7001, 0xE5C8, 0x7005, 0xFBA4, 0x7006, 0xD4B9, + 0x7009, 0xDEE1, 0x700B, 0xE4A3, 0x700F, 0xD7B7, 0x7011, 0xF8EE, + 0x7015, 0xDEB5, 0x7018, 0xD6D2, 0x701A, 0xF9D5, 0x701B, 0xE7BA, + 0x701C, 0xEBD5, 0x701D, 0xD5F7, 0x701E, 0xEFE7, 0x701F, 0xE1BE, + 0x7023, 0xFAAE, 0x7027, 0xD6E9, 0x7028, 0xD6EE, 0x702F, 0xE7BB, + 0x7037, 0xECCB, 0x703E, 0xD5B3, 0x704C, 0xCEB4, 0x7050, 0xFBA5, + 0x7051, 0xE1EE, 0x7058, 0xF7A8, 0x705D, 0xFBCE, 0x7063, 0xD8BD, + 0x706B, 0xFBFD, 0x7070, 0xFCE9, 0x7078, 0xCFB6, 0x707C, 0xEDC7, + 0x707D, 0xEEAC, 0x7085, 0xCCDD, 0x708A, 0xF6A7, 0x708E, 0xE6FA, + 0x7092, 0xF5A4, 0x7098, 0xFDDC, 0x7099, 0xEDB3, 0x709A, 0xCEC9, + 0x70A1, 0xEFE8, 0x70A4, 0xE1BF, 0x70AB, 0xFADB, 0x70AC, 0xCBE3, + 0x70AD, 0xF7A9, 0x70AF, 0xFBA6, 0x70B3, 0xDCB9, 0x70B7, 0xF1C0, + 0x70B8, 0xEDC8, 0x70B9, 0xEFC3, 0x70C8, 0xD6AD, 0x70CB, 0xFDCE, + 0x70CF, 0xE8A1, 0x70D8, 0xFBF4, 0x70D9, 0xD5A7, 0x70DD, 0xF1F6, + 0x70DF, 0xE6D3, 0x70F1, 0xCCDE, 0x70F9, 0xF8B2, 0x70FD, 0xDCEB, + 0x7104, 0xFDB6, 0x7109, 0xE5EA, 0x710C, 0xF1E0, 0x7119, 0xDBCC, + 0x711A, 0xDDCD, 0x711E, 0xD4C8, 0x7121, 0xD9ED, 0x7126, 0xF5A5, + 0x7130, 0xE6FB, 0x7136, 0xE6D4, 0x7147, 0xFDC8, 0x7149, 0xD6A1, + 0x714A, 0xFDBF, 0x714C, 0xFCD3, 0x714E, 0xEFA1, 0x7150, 0xE7BC, + 0x7156, 0xD1EE, 0x7159, 0xE6D5, 0x715C, 0xE9F2, 0x715E, 0xDFB0, + 0x7164, 0xD8E0, 0x7165, 0xFCBA, 0x7166, 0xFDAF, 0x7167, 0xF0CE, + 0x7169, 0xDBE1, 0x716C, 0xE5C9, 0x716E, 0xEDB4, 0x717D, 0xE0C3, + 0x7184, 0xE3D8, 0x7189, 0xE9FB, 0x718A, 0xEAA8, 0x718F, 0xFDB7, + 0x7192, 0xFBA7, 0x7194, 0xE9C2, 0x7199, 0xFDF7, 0x719F, 0xE2D9, + 0x71A2, 0xDCEC, 0x71AC, 0xE8A2, 0x71B1, 0xE6F0, 0x71B9, 0xFDF8, + 0x71BA, 0xFDF9, 0x71BE, 0xF6BF, 0x71C1, 0xE7A7, 0x71C3, 0xE6D7, + 0x71C8, 0xD4F3, 0x71C9, 0xD4C9, 0x71CE, 0xD6FA, 0x71D0, 0xD7F2, + 0x71D2, 0xE1C0, 0x71D4, 0xDBE2, 0x71D5, 0xE6D8, 0x71DF, 0xE7BD, + 0x71E5, 0xF0CF, 0x71E6, 0xF3BE, 0x71E7, 0xE2AC, 0x71ED, 0xF5B7, + 0x71EE, 0xE0F0, 0x71FB, 0xFDB8, 0x71FC, 0xE3E8, 0x71FE, 0xD4A7, + 0x71FF, 0xE8FC, 0x7200, 0xFAD2, 0x7206, 0xF8EF, 0x7210, 0xD6D3, + 0x721B, 0xD5B4, 0x722A, 0xF0D0, 0x722C, 0xF7F0, 0x722D, 0xEEB3, + 0x7230, 0xEABA, 0x7232, 0xEAD3, 0x7235, 0xEDC9, 0x7236, 0xDDAB, + 0x723A, 0xE5AC, 0x723B, 0xFDA1, 0x723D, 0xDFD0, 0x723E, 0xECB3, + 0x7240, 0xDFD1, 0x7246, 0xEDED, 0x7247, 0xF8B8, 0x7248, 0xF7FA, + 0x724C, 0xF8AB, 0x7252, 0xF4E0, 0x7258, 0xD4BA, 0x7259, 0xE4B3, + 0x725B, 0xE9DA, 0x725D, 0xDEB6, 0x725F, 0xD9BF, 0x7261, 0xD9C0, + 0x7262, 0xD6EF, 0x7267, 0xD9CC, 0x7269, 0xDAAA, 0x7272, 0xDFE5, + 0x7279, 0xF7E5, 0x727D, 0xCCB2, 0x7280, 0xDFF9, 0x7281, 0xD7E0, + 0x72A2, 0xD4BB, 0x72A7, 0xFDFA, 0x72AC, 0xCCB3, 0x72AF, 0xDBF3, + 0x72C0, 0xDFD2, 0x72C2, 0xCECA, 0x72C4, 0xEEDA, 0x72CE, 0xE4E4, + 0x72D0, 0xFBCF, 0x72D7, 0xCFB7, 0x72D9, 0xEEC3, 0x72E1, 0xCEEA, + 0x72E9, 0xE2AD, 0x72F8, 0xD7E1, 0x72F9, 0xFAF5, 0x72FC, 0xD5C9, + 0x72FD, 0xF8AC, 0x730A, 0xE7D9, 0x7316, 0xF3E9, 0x731B, 0xD8ED, + 0x731C, 0xE3C4, 0x731D, 0xF0F1, 0x7325, 0xE8E5, 0x7329, 0xE0FA, + 0x732A, 0xEEC4, 0x732B, 0xD9DE, 0x7336, 0xEBA2, 0x7337, 0xEBA3, + 0x733E, 0xFCC2, 0x733F, 0xEABB, 0x7344, 0xE8AB, 0x7345, 0xDEE2, + 0x7350, 0xEDEF, 0x7352, 0xE8A3, 0x7357, 0xCFF1, 0x7368, 0xD4BC, + 0x736A, 0xFCEA, 0x7370, 0xE7BE, 0x7372, 0xFCF2, 0x7375, 0xD6B4, + 0x7378, 0xE2AE, 0x737A, 0xD3B7, 0x737B, 0xFACC, 0x7384, 0xFADC, + 0x7386, 0xEDB5, 0x7387, 0xE1E3, 0x7389, 0xE8AC, 0x738B, 0xE8DD, + 0x738E, 0xEFE9, 0x7394, 0xF4BD, 0x7396, 0xCFB8, 0x7397, 0xE9DB, + 0x7398, 0xD1AC, 0x739F, 0xDAC7, 0x73A7, 0xEBC9, 0x73A9, 0xE8CC, + 0x73AD, 0xDEB7, 0x73B2, 0xD6BC, 0x73B3, 0xD3E5, 0x73B9, 0xFADD, + 0x73C0, 0xDAD6, 0x73C2, 0xCAB1, 0x73C9, 0xDAC8, 0x73CA, 0xDFA6, + 0x73CC, 0xF9B3, 0x73CD, 0xF2D2, 0x73CF, 0xCAC4, 0x73D6, 0xCECB, + 0x73D9, 0xCDF5, 0x73DD, 0xFDB0, 0x73DE, 0xD5A8, 0x73E0, 0xF1C1, + 0x73E3, 0xE2E9, 0x73E4, 0xDCCA, 0x73E5, 0xECB4, 0x73E6, 0xFAC0, + 0x73E9, 0xFBA8, 0x73EA, 0xD0A8, 0x73ED, 0xDAEC, 0x73F7, 0xD9EE, + 0x73F9, 0xE0FB, 0x73FD, 0xEFEA, 0x73FE, 0xFADE, 0x7401, 0xE0C4, + 0x7403, 0xCFB9, 0x7405, 0xD5CA, 0x7406, 0xD7E2, 0x7407, 0xE2AF, + 0x7409, 0xD7B8, 0x7413, 0xE8CD, 0x741B, 0xF6DA, 0x7420, 0xEFA2, + 0x7421, 0xE2DA, 0x7422, 0xF6FC, 0x7425, 0xFBD0, 0x7426, 0xD1AD, + 0x7428, 0xCDE4, 0x742A, 0xD1AE, 0x742B, 0xDCED, 0x742C, 0xE8CE, + 0x742E, 0xF0F9, 0x742F, 0xCEB5, 0x7430, 0xE6FC, 0x7433, 0xD7FB, + 0x7434, 0xD0D6, 0x7435, 0xDDF5, 0x7436, 0xF7F1, 0x7438, 0xF6FD, + 0x743A, 0xDBF7, 0x743F, 0xFBEA, 0x7440, 0xE9DC, 0x7441, 0xD9C1, + 0x7443, 0xF5F2, 0x7444, 0xE0C5, 0x744B, 0xEAD4, 0x7455, 0xF9C2, + 0x7457, 0xEABC, 0x7459, 0xD2C5, 0x745A, 0xFBD1, 0x745B, 0xE7C0, + 0x745C, 0xEBA5, 0x745E, 0xDFFA, 0x745F, 0xE3A2, 0x7460, 0xD7B9, + 0x7462, 0xE9C3, 0x7464, 0xE8FD, 0x7465, 0xE8AF, 0x7468, 0xF2D3, + 0x7469, 0xFBA9, 0x746A, 0xD8A5, 0x746F, 0xD5CB, 0x747E, 0xD0C8, + 0x7482, 0xD1AF, 0x7483, 0xD7E3, 0x7487, 0xE0C6, 0x7489, 0xD6A2, + 0x748B, 0xEDF0, 0x7498, 0xD7F3, 0x749C, 0xFCD4, 0x749E, 0xDAD7, + 0x749F, 0xCCDF, 0x74A1, 0xF2D4, 0x74A3, 0xD1B0, 0x74A5, 0xCCE0, + 0x74A7, 0xDBFD, 0x74A8, 0xF3BF, 0x74AA, 0xF0D1, 0x74B0, 0xFCBB, + 0x74B2, 0xE2B0, 0x74B5, 0xE6A5, 0x74B9, 0xE2DB, 0x74BD, 0xDFDE, + 0x74BF, 0xE0C7, 0x74C6, 0xF2EF, 0x74CA, 0xCCE1, 0x74CF, 0xD6EA, + 0x74D4, 0xE7C2, 0x74D8, 0xCEB6, 0x74DA, 0xF3C0, 0x74DC, 0xCDFE, + 0x74E0, 0xFBD2, 0x74E2, 0xF8F8, 0x74E3, 0xF7FB, 0x74E6, 0xE8BF, + 0x74EE, 0xE8B7, 0x74F7, 0xEDB6, 0x7501, 0xDCBA, 0x7504, 0xCCB4, + 0x7511, 0xF1F7, 0x7515, 0xE8B8, 0x7518, 0xCAF6, 0x751A, 0xE4A4, + 0x751B, 0xF4D6, 0x751F, 0xDFE6, 0x7523, 0xDFA7, 0x7525, 0xDFE7, + 0x7526, 0xE1C1, 0x7528, 0xE9C4, 0x752B, 0xDCCB, 0x752C, 0xE9C5, + 0x7530, 0xEFA3, 0x7531, 0xEBA6, 0x7532, 0xCBA3, 0x7533, 0xE3E9, + 0x7537, 0xD1FB, 0x7538, 0xEFA4, 0x753A, 0xEFEB, 0x7547, 0xD0B4, + 0x754C, 0xCDA3, 0x754F, 0xE8E6, 0x7551, 0xEFA5, 0x7553, 0xD3CC, + 0x7554, 0xDAED, 0x7559, 0xD7BA, 0x755B, 0xF2D5, 0x755C, 0xF5E5, + 0x755D, 0xD9EF, 0x7562, 0xF9B4, 0x7565, 0xD5D4, 0x7566, 0xFDCF, + 0x756A, 0xDBE3, 0x756F, 0xF1E1, 0x7570, 0xECB6, 0x7575, 0xFBFE, + 0x7576, 0xD3D7, 0x7578, 0xD1B1, 0x757A, 0xCBB1, 0x757F, 0xD1B2, + 0x7586, 0xCBB2, 0x7587, 0xF1C2, 0x758A, 0xF4E1, 0x758B, 0xF9B5, + 0x758E, 0xE1C3, 0x758F, 0xE1C2, 0x7591, 0xEBF7, 0x759D, 0xDFA8, + 0x75A5, 0xCBCA, 0x75AB, 0xE6B9, 0x75B1, 0xF8DE, 0x75B2, 0xF9AA, + 0x75B3, 0xCAF7, 0x75B5, 0xEDB7, 0x75B8, 0xD3B8, 0x75B9, 0xF2D6, + 0x75BC, 0xD4D9, 0x75BD, 0xEEC5, 0x75BE, 0xF2F0, 0x75C2, 0xCAB2, + 0x75C5, 0xDCBB, 0x75C7, 0xF1F8, 0x75CD, 0xECB7, 0x75D2, 0xE5CA, + 0x75D4, 0xF6C0, 0x75D5, 0xFDDD, 0x75D8, 0xD4E3, 0x75D9, 0xCCE2, + 0x75DB, 0xF7D4, 0x75E2, 0xD7E5, 0x75F0, 0xD3C3, 0x75F2, 0xD8A6, + 0x75F4, 0xF6C1, 0x75FA, 0xDDF6, 0x75FC, 0xCDC0, 0x7600, 0xE5DC, + 0x760D, 0xE5CB, 0x7619, 0xE1C4, 0x761F, 0xE8B0, 0x7620, 0xF4B0, + 0x7621, 0xF3EA, 0x7622, 0xDAEE, 0x7624, 0xD7BB, 0x7626, 0xE2B1, + 0x763B, 0xD7AA, 0x7642, 0xD6FB, 0x764C, 0xE4DF, 0x764E, 0xCAD6, + 0x7652, 0xEBA8, 0x7656, 0xDBFE, 0x7661, 0xF6C2, 0x7664, 0xEFBB, + 0x7669, 0xD4FD, 0x766C, 0xE0C8, 0x7670, 0xE8B9, 0x7672, 0xEFA6, + 0x7678, 0xCDA4, 0x767B, 0xD4F4, 0x767C, 0xDBA1, 0x767D, 0xDBDC, + 0x767E, 0xDBDD, 0x7684, 0xEEDC, 0x7686, 0xCBCB, 0x7687, 0xFCD5, + 0x768E, 0xCEEB, 0x7690, 0xCDC1, 0x7693, 0xFBD3, 0x76AE, 0xF9AB, + 0x76BA, 0xF5D4, 0x76BF, 0xD9A9, 0x76C2, 0xE9DD, 0x76C3, 0xDBCD, + 0x76C6, 0xDDCE, 0x76C8, 0xE7C3, 0x76CA, 0xECCC, 0x76D2, 0xF9EC, + 0x76D6, 0xCBCC, 0x76DB, 0xE0FC, 0x76DC, 0xD4A8, 0x76DE, 0xEDD3, + 0x76DF, 0xD8EF, 0x76E1, 0xF2D7, 0x76E3, 0xCAF8, 0x76E4, 0xDAEF, + 0x76E7, 0xD6D4, 0x76EE, 0xD9CD, 0x76F2, 0xD8EE, 0x76F4, 0xF2C1, + 0x76F8, 0xDFD3, 0x76FC, 0xDAF0, 0x76FE, 0xE2EA, 0x7701, 0xE0FD, + 0x7704, 0xD8F8, 0x7708, 0xF7AF, 0x7709, 0xDAB6, 0x770B, 0xCAD7, + 0x771E, 0xF2D8, 0x7720, 0xD8F9, 0x7729, 0xFADF, 0x7737, 0xCFEF, + 0x7738, 0xD9C2, 0x773A, 0xF0D2, 0x773C, 0xE4D1, 0x7740, 0xF3B7, + 0x774D, 0xFAE0, 0x775B, 0xEFEC, 0x7761, 0xE2B2, 0x7763, 0xD4BD, + 0x7766, 0xD9CE, 0x776B, 0xF4E2, 0x7779, 0xD4A9, 0x777E, 0xCDC2, + 0x777F, 0xE7DA, 0x778B, 0xF2D9, 0x7791, 0xD9AA, 0x779E, 0xD8BE, + 0x77A5, 0xDCAD, 0x77AC, 0xE2EB, 0x77AD, 0xD6FC, 0x77B0, 0xCAF9, + 0x77B3, 0xD4DA, 0x77BB, 0xF4D7, 0x77BC, 0xCCA1, 0x77BF, 0xCFBA, + 0x77D7, 0xF5B8, 0x77DB, 0xD9C3, 0x77DC, 0xD0E8, 0x77E2, 0xE3C5, + 0x77E3, 0xEBF8, 0x77E5, 0xF2B1, 0x77E9, 0xCFBB, 0x77ED, 0xD3AD, + 0x77EE, 0xE8E1, 0x77EF, 0xCEEC, 0x77F3, 0xE0B4, 0x7802, 0xDEE3, + 0x7812, 0xDDF7, 0x7825, 0xF2B2, 0x7826, 0xF3F6, 0x7827, 0xF6DB, + 0x782C, 0xD7FE, 0x7832, 0xF8DF, 0x7834, 0xF7F2, 0x7845, 0xD0A9, + 0x784F, 0xE6DA, 0x785D, 0xF5A6, 0x786B, 0xD7BC, 0x786C, 0xCCE3, + 0x786F, 0xE6DB, 0x787C, 0xDDDD, 0x7881, 0xD1B3, 0x7887, 0xEFED, + 0x788C, 0xD6DE, 0x788D, 0xE4F4, 0x788E, 0xE1EF, 0x7891, 0xDDF8, + 0x7897, 0xE8CF, 0x78A3, 0xCAE5, 0x78A7, 0xDCA1, 0x78A9, 0xE0B5, + 0x78BA, 0xFCAC, 0x78BB, 0xFCAD, 0x78BC, 0xD8A7, 0x78C1, 0xEDB8, + 0x78C5, 0xDBB6, 0x78CA, 0xD6F0, 0x78CB, 0xF3AF, 0x78CE, 0xCDA5, + 0x78D0, 0xDAF1, 0x78E8, 0xD8A8, 0x78EC, 0xCCE4, 0x78EF, 0xD1B4, + 0x78F5, 0xCAD8, 0x78FB, 0xDAF2, 0x7901, 0xF5A7, 0x790E, 0xF5A8, + 0x7916, 0xE6A6, 0x792A, 0xD5EC, 0x792B, 0xD5F8, 0x792C, 0xDAF3, + 0x793A, 0xE3C6, 0x793E, 0xDEE4, 0x7940, 0xDEE5, 0x7941, 0xD1B5, + 0x7947, 0xD1B6, 0x7948, 0xD1B7, 0x7949, 0xF2B3, 0x7950, 0xE9DE, + 0x7956, 0xF0D3, 0x7957, 0xF2B4, 0x795A, 0xF0D4, 0x795B, 0xCBE4, + 0x795C, 0xFBD4, 0x795D, 0xF5E6, 0x795E, 0xE3EA, 0x7960, 0xDEE6, + 0x7965, 0xDFD4, 0x7968, 0xF8F9, 0x796D, 0xF0AE, 0x797A, 0xD1B8, + 0x797F, 0xD6DF, 0x7981, 0xD0D7, 0x798D, 0xFCA1, 0x798E, 0xEFEE, + 0x798F, 0xDCD8, 0x7991, 0xE9DF, 0x79A6, 0xE5DD, 0x79A7, 0xFDFB, + 0x79AA, 0xE0C9, 0x79AE, 0xD6C9, 0x79B1, 0xD4AA, 0x79B3, 0xE5CC, + 0x79B9, 0xE9E0, 0x79BD, 0xD0D8, 0x79BE, 0xFCA2, 0x79BF, 0xD4BE, + 0x79C0, 0xE2B3, 0x79C1, 0xDEE7, 0x79C9, 0xDCBC, 0x79CA, 0xD2B6, + 0x79CB, 0xF5D5, 0x79D1, 0xCEA1, 0x79D2, 0xF5A9, 0x79D5, 0xDDF9, + 0x79D8, 0xDDFA, 0x79DF, 0xF0D5, 0x79E4, 0xF6DF, 0x79E6, 0xF2DA, + 0x79E7, 0xE4EB, 0x79E9, 0xF2F1, 0x79FB, 0xECB9, 0x7A00, 0xFDFC, + 0x7A05, 0xE1AA, 0x7A08, 0xCAD9, 0x7A0B, 0xEFEF, 0x7A0D, 0xF5AA, + 0x7A14, 0xECF9, 0x7A17, 0xF8AD, 0x7A19, 0xF2C2, 0x7A1A, 0xF6C3, + 0x7A1C, 0xD7D2, 0x7A1F, 0xF9A2, 0x7A20, 0xF0D6, 0x7A2E, 0xF0FA, + 0x7A31, 0xF6E0, 0x7A36, 0xE9F3, 0x7A37, 0xF2C3, 0x7A3B, 0xD4AB, + 0x7A3C, 0xCAB3, 0x7A3D, 0xCDA6, 0x7A3F, 0xCDC3, 0x7A40, 0xCDDA, + 0x7A46, 0xD9CF, 0x7A49, 0xF6C4, 0x7A4D, 0xEEDD, 0x7A4E, 0xE7C4, + 0x7A57, 0xE2B4, 0x7A61, 0xDFE2, 0x7A62, 0xE7DB, 0x7A69, 0xE8B1, + 0x7A6B, 0xFCAE, 0x7A70, 0xE5CD, 0x7A74, 0xFAEB, 0x7A76, 0xCFBC, + 0x7A79, 0xCFE2, 0x7A7A, 0xCDF6, 0x7A7D, 0xEFF0, 0x7A7F, 0xF4BE, + 0x7A81, 0xD4CD, 0x7A84, 0xF3B8, 0x7A88, 0xE9A1, 0x7A92, 0xF2F2, + 0x7A93, 0xF3EB, 0x7A95, 0xF0D7, 0x7A98, 0xCFD7, 0x7A9F, 0xCFDF, + 0x7AA9, 0xE8C0, 0x7AAA, 0xE8C1, 0x7AAE, 0xCFE3, 0x7AAF, 0xE9A2, + 0x7ABA, 0xD0AA, 0x7AC4, 0xF3C1, 0x7AC5, 0xD0AB, 0x7AC7, 0xD4E4, + 0x7ACA, 0xEFBC, 0x7ACB, 0xD8A1, 0x7AD7, 0xD9DF, 0x7AD9, 0xF3D7, + 0x7ADD, 0xDCBD, 0x7ADF, 0xCCE5, 0x7AE0, 0xEDF1, 0x7AE3, 0xF1E2, + 0x7AE5, 0xD4DB, 0x7AEA, 0xE2B5, 0x7AED, 0xCAE6, 0x7AEF, 0xD3AE, + 0x7AF6, 0xCCE6, 0x7AF9, 0xF1D3, 0x7AFA, 0xF5E7, 0x7AFF, 0xCADA, + 0x7B0F, 0xFBEE, 0x7B11, 0xE1C5, 0x7B19, 0xDFE9, 0x7B1B, 0xEEDE, + 0x7B1E, 0xF7C2, 0x7B20, 0xD8A2, 0x7B26, 0xDDAC, 0x7B2C, 0xF0AF, + 0x7B2D, 0xD6BD, 0x7B39, 0xE1AB, 0x7B46, 0xF9B6, 0x7B49, 0xD4F5, + 0x7B4B, 0xD0C9, 0x7B4C, 0xEFA7, 0x7B4D, 0xE2EC, 0x7B4F, 0xDBEA, + 0x7B50, 0xCECC, 0x7B51, 0xF5E8, 0x7B52, 0xF7D5, 0x7B54, 0xD3CD, + 0x7B56, 0xF3FE, 0x7B60, 0xD0B5, 0x7B6C, 0xE0FE, 0x7B6E, 0xDFFB, + 0x7B75, 0xE6DD, 0x7B7D, 0xE8A4, 0x7B87, 0xCBCD, 0x7B8B, 0xEFA8, + 0x7B8F, 0xEEB4, 0x7B94, 0xDAD8, 0x7B95, 0xD1B9, 0x7B97, 0xDFA9, + 0x7B9A, 0xF3B0, 0x7B9D, 0xCCC4, 0x7BA1, 0xCEB7, 0x7BAD, 0xEFA9, + 0x7BB1, 0xDFD5, 0x7BB4, 0xEDD7, 0x7BB8, 0xEEC6, 0x7BC0, 0xEFBD, + 0x7BC1, 0xFCD6, 0x7BC4, 0xDBF4, 0x7BC6, 0xEFAA, 0x7BC7, 0xF8B9, + 0x7BC9, 0xF5E9, 0x7BD2, 0xE3D9, 0x7BE0, 0xE1C6, 0x7BE4, 0xD4BF, + 0x7BE9, 0xDEE8, 0x7C07, 0xF0EA, 0x7C12, 0xF3C2, 0x7C1E, 0xD3AF, + 0x7C21, 0xCADB, 0x7C27, 0xFCD7, 0x7C2A, 0xEDD8, 0x7C2B, 0xE1C7, + 0x7C3D, 0xF4D8, 0x7C3E, 0xD6B3, 0x7C3F, 0xDDAD, 0x7C43, 0xD5BE, + 0x7C4C, 0xF1C3, 0x7C4D, 0xEEDF, 0x7C60, 0xD6EB, 0x7C64, 0xF4D9, + 0x7C6C, 0xD7E6, 0x7C73, 0xDAB7, 0x7C83, 0xDDFB, 0x7C89, 0xDDCF, + 0x7C92, 0xD8A3, 0x7C95, 0xDAD9, 0x7C97, 0xF0D8, 0x7C98, 0xEFC4, + 0x7C9F, 0xE1D8, 0x7CA5, 0xF1D4, 0x7CA7, 0xEDF2, 0x7CAE, 0xD5DB, + 0x7CB1, 0xD5DC, 0x7CB2, 0xF3C4, 0x7CB3, 0xCBD7, 0x7CB9, 0xE2B6, + 0x7CBE, 0xEFF1, 0x7CCA, 0xFBD5, 0x7CD6, 0xD3D8, 0x7CDE, 0xDDD0, + 0x7CDF, 0xF0D9, 0x7CE0, 0xCBB3, 0x7CE7, 0xD5DD, 0x7CFB, 0xCDA7, + 0x7CFE, 0xD0AC, 0x7D00, 0xD1BA, 0x7D02, 0xF1C4, 0x7D04, 0xE5B3, + 0x7D05, 0xFBF5, 0x7D06, 0xE9E1, 0x7D07, 0xFDE0, 0x7D08, 0xFCBC, + 0x7D0A, 0xDAA2, 0x7D0B, 0xDAA3, 0x7D0D, 0xD2A1, 0x7D10, 0xD2EF, + 0x7D14, 0xE2ED, 0x7D17, 0xDEE9, 0x7D18, 0xCEDC, 0x7D19, 0xF2B5, + 0x7D1A, 0xD0E4, 0x7D1B, 0xDDD1, 0x7D20, 0xE1C8, 0x7D21, 0xDBB7, + 0x7D22, 0xDFE3, 0x7D2B, 0xEDB9, 0x7D2C, 0xF1C5, 0x7D2E, 0xF3CF, + 0x7D2F, 0xD7AB, 0x7D30, 0xE1AC, 0x7D33, 0xE3EB, 0x7D35, 0xEEC7, + 0x7D39, 0xE1C9, 0x7D3A, 0xCAFA, 0x7D42, 0xF0FB, 0x7D43, 0xFAE1, + 0x7D44, 0xF0DA, 0x7D45, 0xCCE7, 0x7D46, 0xDAF4, 0x7D50, 0xCCBF, + 0x7D5E, 0xCEED, 0x7D61, 0xD5A9, 0x7D62, 0xFAE2, 0x7D66, 0xD0E5, + 0x7D68, 0xEBD6, 0x7D6A, 0xECDF, 0x7D6E, 0xDFFC, 0x7D71, 0xF7D6, + 0x7D72, 0xDEEA, 0x7D73, 0xCBB4, 0x7D76, 0xEFBE, 0x7D79, 0xCCB5, + 0x7D7F, 0xCFBD, 0x7D8E, 0xEFF2, 0x7D8F, 0xE2B7, 0x7D93, 0xCCE8, + 0x7D9C, 0xF0FC, 0x7DA0, 0xD6E0, 0x7DA2, 0xF1C6, 0x7DAC, 0xE2B8, + 0x7DAD, 0xEBAB, 0x7DB1, 0xCBB5, 0x7DB2, 0xD8D1, 0x7DB4, 0xF4CE, + 0x7DB5, 0xF3F7, 0x7DB8, 0xD7C6, 0x7DBA, 0xD1BB, 0x7DBB, 0xF7AA, + 0x7DBD, 0xEDCA, 0x7DBE, 0xD7D3, 0x7DBF, 0xD8FA, 0x7DC7, 0xF6C5, + 0x7DCA, 0xD1CC, 0x7DCB, 0xDDFC, 0x7DD6, 0xDFFD, 0x7DD8, 0xF9E5, + 0x7DDA, 0xE0CA, 0x7DDD, 0xF2FD, 0x7DDE, 0xD3B0, 0x7DE0, 0xF4F3, + 0x7DE1, 0xDAC9, 0x7DE3, 0xE6DE, 0x7DE8, 0xF8BA, 0x7DE9, 0xE8D0, + 0x7DEC, 0xD8FB, 0x7DEF, 0xEAD5, 0x7DF4, 0xD6A3, 0x7DFB, 0xF6C6, + 0x7E09, 0xF2DB, 0x7E0A, 0xE4FC, 0x7E15, 0xE8B2, 0x7E1B, 0xDADA, + 0x7E1D, 0xF2DC, 0x7E1E, 0xFBD6, 0x7E1F, 0xE9B2, 0x7E21, 0xEEAD, + 0x7E23, 0xFAE3, 0x7E2B, 0xDCEE, 0x7E2E, 0xF5EA, 0x7E2F, 0xE6E0, + 0x7E31, 0xF0FD, 0x7E37, 0xD7AC, 0x7E3D, 0xF5C5, 0x7E3E, 0xEEE0, + 0x7E41, 0xDBE5, 0x7E43, 0xDDDE, 0x7E46, 0xD9F0, 0x7E47, 0xE9A3, + 0x7E52, 0xF1F9, 0x7E54, 0xF2C4, 0x7E55, 0xE0CB, 0x7E5E, 0xE9A4, + 0x7E61, 0xE2B9, 0x7E69, 0xE3B1, 0x7E6A, 0xFCEB, 0x7E6B, 0xCDA8, + 0x7E6D, 0xCCB6, 0x7E70, 0xF0DB, 0x7E79, 0xE6BA, 0x7E7C, 0xCDA9, + 0x7E82, 0xF3C3, 0x7E8C, 0xE1D9, 0x7E8F, 0xEFAB, 0x7E93, 0xE7C5, + 0x7E96, 0xE0E9, 0x7E98, 0xF3C5, 0x7E9B, 0xD4C0, 0x7E9C, 0xD5BF, + 0x7F36, 0xDDAE, 0x7F38, 0xF9FC, 0x7F3A, 0xCCC0, 0x7F4C, 0xE5A2, + 0x7F50, 0xCEB8, 0x7F54, 0xD8D2, 0x7F55, 0xF9D6, 0x7F6A, 0xF1AA, + 0x7F6B, 0xCED1, 0x7F6E, 0xF6C7, 0x7F70, 0xDBEB, 0x7F72, 0xDFFE, + 0x7F75, 0xD8E1, 0x7F77, 0xF7F3, 0x7F79, 0xD7E7, 0x7F85, 0xD4FE, + 0x7F88, 0xD1BC, 0x7F8A, 0xE5CF, 0x7F8C, 0xCBB6, 0x7F8E, 0xDAB8, + 0x7F94, 0xCDC4, 0x7F9A, 0xD6BE, 0x7F9E, 0xE2BA, 0x7FA4, 0xCFD8, + 0x7FA8, 0xE0CC, 0x7FA9, 0xEBF9, 0x7FB2, 0xFDFD, 0x7FB8, 0xD7E8, + 0x7FB9, 0xCBD8, 0x7FBD, 0xE9E2, 0x7FC1, 0xE8BA, 0x7FC5, 0xE3C7, + 0x7FCA, 0xECCD, 0x7FCC, 0xECCE, 0x7FCE, 0xD6BF, 0x7FD2, 0xE3A7, + 0x7FD4, 0xDFD6, 0x7FD5, 0xFDE8, 0x7FDF, 0xEEE1, 0x7FE0, 0xF6A8, + 0x7FE1, 0xDDFD, 0x7FE9, 0xF8BB, 0x7FEB, 0xE8D1, 0x7FF0, 0xF9D7, + 0x7FF9, 0xCEEE, 0x7FFC, 0xECCF, 0x8000, 0xE9A5, 0x8001, 0xD6D5, + 0x8003, 0xCDC5, 0x8005, 0xEDBA, 0x8006, 0xD1BD, 0x8009, 0xCFBE, + 0x800C, 0xECBB, 0x8010, 0xD2B1, 0x8015, 0xCCE9, 0x8017, 0xD9C4, + 0x8018, 0xE9FC, 0x802D, 0xD1BE, 0x8033, 0xECBC, 0x8036, 0xE5AD, + 0x803D, 0xF7B0, 0x803F, 0xCCEA, 0x8043, 0xD3C4, 0x8046, 0xD6C0, + 0x804A, 0xD6FD, 0x8056, 0xE1A1, 0x8058, 0xDEBD, 0x805A, 0xF6A9, + 0x805E, 0xDAA4, 0x806F, 0xD6A4, 0x8070, 0xF5C6, 0x8072, 0xE1A2, + 0x8073, 0xE9C6, 0x8077, 0xF2C5, 0x807D, 0xF4E9, 0x807E, 0xD6EC, + 0x807F, 0xEBD3, 0x8084, 0xECBD, 0x8085, 0xE2DC, 0x8086, 0xDEEB, + 0x8087, 0xF0DC, 0x8089, 0xEBBF, 0x808B, 0xD7CE, 0x808C, 0xD1BF, + 0x8096, 0xF5AB, 0x809B, 0xF9FD, 0x809D, 0xCADC, 0x80A1, 0xCDC6, + 0x80A2, 0xF2B6, 0x80A5, 0xDDFE, 0x80A9, 0xCCB7, 0x80AA, 0xDBB8, + 0x80AF, 0xD0E9, 0x80B1, 0xCEDD, 0x80B2, 0xEBC0, 0x80B4, 0xFDA2, + 0x80BA, 0xF8CB, 0x80C3, 0xEAD6, 0x80C4, 0xF1B0, 0x80CC, 0xDBCE, + 0x80CE, 0xF7C3, 0x80DA, 0xDBCF, 0x80DB, 0xCBA4, 0x80DE, 0xF8E0, + 0x80E1, 0xFBD7, 0x80E4, 0xEBCA, 0x80E5, 0xE0A1, 0x80F1, 0xCECD, + 0x80F4, 0xD4DC, 0x80F8, 0xFDD8, 0x80FD, 0xD2F6, 0x8102, 0xF2B7, + 0x8105, 0xFAF6, 0x8106, 0xF6AA, 0x8107, 0xFAF7, 0x8108, 0xD8E6, + 0x810A, 0xF4B1, 0x8118, 0xE8D2, 0x811A, 0xCAC5, 0x811B, 0xCCEB, + 0x8123, 0xE2EE, 0x8129, 0xE2BB, 0x812B, 0xF7AD, 0x812F, 0xF8E1, + 0x8139, 0xF3EC, 0x813E, 0xDEA1, 0x814B, 0xE4FD, 0x814E, 0xE3EC, + 0x8150, 0xDDAF, 0x8151, 0xDDB0, 0x8154, 0xCBB7, 0x8155, 0xE8D3, + 0x8165, 0xE1A3, 0x8166, 0xD2E0, 0x816B, 0xF0FE, 0x8170, 0xE9A6, + 0x8171, 0xCBF2, 0x8178, 0xEDF3, 0x8179, 0xDCD9, 0x817A, 0xE0CD, + 0x817F, 0xF7DA, 0x8180, 0xDBB9, 0x8188, 0xCCAE, 0x818A, 0xDADB, + 0x818F, 0xCDC7, 0x819A, 0xDDB1, 0x819C, 0xD8AF, 0x819D, 0xE3A3, + 0x81A0, 0xCEEF, 0x81A3, 0xF2F3, 0x81A8, 0xF8B3, 0x81B3, 0xE0CE, + 0x81B5, 0xF5FD, 0x81BA, 0xEBEC, 0x81BD, 0xD3C5, 0x81BE, 0xFCEC, + 0x81BF, 0xD2DB, 0x81C0, 0xD4EB, 0x81C2, 0xDEA2, 0x81C6, 0xE5E6, + 0x81CD, 0xF0B0, 0x81D8, 0xD5C4, 0x81DF, 0xEDF4, 0x81E3, 0xE3ED, + 0x81E5, 0xE8C2, 0x81E7, 0xEDF5, 0x81E8, 0xD7FC, 0x81EA, 0xEDBB, + 0x81ED, 0xF6AB, 0x81F3, 0xF2B8, 0x81F4, 0xF6C8, 0x81FA, 0xD3E6, + 0x81FB, 0xF2DD, 0x81FC, 0xCFBF, 0x81FE, 0xEBAC, 0x8205, 0xCFC0, + 0x8207, 0xE6A8, 0x8208, 0xFDE9, 0x820A, 0xCFC1, 0x820C, 0xE0DF, + 0x820D, 0xDEEC, 0x8212, 0xE0A2, 0x821B, 0xF4BF, 0x821C, 0xE2EF, + 0x821E, 0xD9F1, 0x821F, 0xF1C7, 0x8221, 0xCBB8, 0x822A, 0xF9FE, + 0x822B, 0xDBBA, 0x822C, 0xDAF5, 0x8235, 0xF6EC, 0x8236, 0xDADC, + 0x8237, 0xFAE4, 0x8239, 0xE0CF, 0x8240, 0xDDB2, 0x8245, 0xE6A9, + 0x8247, 0xEFF3, 0x8259, 0xF3ED, 0x8264, 0xEBFA, 0x8266, 0xF9E6, + 0x826E, 0xCADD, 0x826F, 0xD5DE, 0x8271, 0xCADE, 0x8272, 0xDFE4, + 0x8276, 0xE6FD, 0x8278, 0xF5AC, 0x827E, 0xE4F5, 0x828B, 0xE9E3, + 0x828D, 0xEDCB, 0x828E, 0xCFE4, 0x8292, 0xD8D3, 0x8299, 0xDDB3, + 0x829A, 0xD4EC, 0x829D, 0xF2B9, 0x829F, 0xDFB7, 0x82A5, 0xCBCE, + 0x82A6, 0xFBD8, 0x82A9, 0xD0D9, 0x82AC, 0xDDD2, 0x82AD, 0xF7F4, + 0x82AE, 0xE7DC, 0x82AF, 0xE4A5, 0x82B1, 0xFCA3, 0x82B3, 0xDBBB, + 0x82B7, 0xF2BA, 0x82B8, 0xE9FD, 0x82B9, 0xD0CA, 0x82BB, 0xF5D6, + 0x82BC, 0xD9C5, 0x82BD, 0xE4B4, 0x82BF, 0xEDA7, 0x82D1, 0xEABD, + 0x82D2, 0xE6FE, 0x82D4, 0xF7C4, 0x82D5, 0xF5AD, 0x82D7, 0xD9E0, + 0x82DB, 0xCAB4, 0x82DE, 0xF8E2, 0x82DF, 0xCFC2, 0x82E1, 0xECBE, + 0x82E5, 0xE5B4, 0x82E6, 0xCDC8, 0x82E7, 0xEEC8, 0x82F1, 0xE7C8, + 0x82FD, 0xCDC9, 0x82FE, 0xF9B7, 0x8301, 0xF1E8, 0x8302, 0xD9F2, + 0x8303, 0xDBF5, 0x8304, 0xCAB5, 0x8305, 0xD9C6, 0x8309, 0xD8C9, + 0x8317, 0xD9AB, 0x8328, 0xEDBC, 0x832B, 0xD8D4, 0x832F, 0xDCDA, + 0x8331, 0xE2BC, 0x8334, 0xFCED, 0x8335, 0xECE0, 0x8336, 0xD2FE, + 0x8338, 0xE9C7, 0x8339, 0xE6AA, 0x8340, 0xE2F0, 0x8347, 0xFABB, + 0x8349, 0xF5AE, 0x834A, 0xFBAA, 0x834F, 0xECFB, 0x8351, 0xECBF, + 0x8352, 0xFCD8, 0x8373, 0xD4E5, 0x8377, 0xF9C3, 0x837B, 0xEEE2, + 0x8389, 0xD7E9, 0x838A, 0xEDF6, 0x838E, 0xDEED, 0x8396, 0xCCEC, + 0x8398, 0xE3EE, 0x839E, 0xE8D4, 0x83A2, 0xFAF8, 0x83A9, 0xDDB4, + 0x83AA, 0xE4B5, 0x83AB, 0xD8B0, 0x83BD, 0xD8D5, 0x83C1, 0xF4EA, + 0x83C5, 0xCEB9, 0x83C9, 0xD6E1, 0x83CA, 0xCFD2, 0x83CC, 0xD0B6, + 0x83D3, 0xCEA2, 0x83D6, 0xF3EE, 0x83DC, 0xF3F8, 0x83E9, 0xDCCC, + 0x83EB, 0xD0CB, 0x83EF, 0xFCA4, 0x83F0, 0xCDCA, 0x83F1, 0xD7D4, + 0x83F2, 0xDEA3, 0x83F4, 0xE4E0, 0x83F9, 0xEEC9, 0x83FD, 0xE2DD, + 0x8403, 0xF5FE, 0x8404, 0xD4AC, 0x840A, 0xD5D1, 0x840C, 0xD8F0, + 0x840D, 0xF8C3, 0x840E, 0xEAD7, 0x8429, 0xF5D7, 0x842C, 0xD8BF, + 0x8431, 0xFDC0, 0x8438, 0xEBAD, 0x843D, 0xD5AA, 0x8449, 0xE7A8, + 0x8457, 0xEECA, 0x845B, 0xCAE7, 0x8461, 0xF8E3, 0x8463, 0xD4DD, + 0x8466, 0xEAD8, 0x846B, 0xFBD9, 0x846C, 0xEDF7, 0x846F, 0xE5B5, + 0x8475, 0xD0AD, 0x847A, 0xF1F1, 0x8490, 0xE2BD, 0x8494, 0xE3C8, + 0x8499, 0xD9D5, 0x849C, 0xDFAA, 0x84A1, 0xDBBC, 0x84B2, 0xF8E4, + 0x84B8, 0xF1FA, 0x84BB, 0xE5B6, 0x84BC, 0xF3EF, 0x84BF, 0xFBDA, + 0x84C0, 0xE1E0, 0x84C2, 0xD9AC, 0x84C4, 0xF5EB, 0x84C6, 0xE0B6, + 0x84C9, 0xE9C8, 0x84CB, 0xCBCF, 0x84CD, 0xE3C9, 0x84D1, 0xDEEE, + 0x84DA, 0xE2BE, 0x84EC, 0xDCEF, 0x84EE, 0xD6A5, 0x84F4, 0xE2F1, + 0x84FC, 0xD6FE, 0x8511, 0xD9A1, 0x8513, 0xD8C0, 0x8514, 0xDCDB, + 0x8517, 0xEDBD, 0x8518, 0xDFB8, 0x851A, 0xEAA5, 0x851E, 0xD7AD, + 0x8521, 0xF3F9, 0x8523, 0xEDF8, 0x8525, 0xF5C7, 0x852C, 0xE1CA, + 0x852D, 0xEBE3, 0x852F, 0xF2DE, 0x853D, 0xF8CC, 0x853F, 0xEAD9, + 0x8541, 0xD3C6, 0x8543, 0xDBE6, 0x8549, 0xF5AF, 0x854E, 0xCEF0, + 0x8553, 0xE9FE, 0x8559, 0xFBB6, 0x8563, 0xE2F2, 0x8568, 0xCFF2, + 0x8569, 0xF7B9, 0x856A, 0xD9F3, 0x856D, 0xE1CB, 0x8584, 0xDADD, + 0x8587, 0xDAB9, 0x858F, 0xEBFB, 0x8591, 0xCBB9, 0x8594, 0xEDF9, + 0x859B, 0xE0E0, 0x85A6, 0xF4C0, 0x85A8, 0xFDBC, 0x85A9, 0xDFB1, + 0x85AA, 0xE3EF, 0x85AF, 0xE0A3, 0x85B0, 0xFDB9, 0x85BA, 0xF0B1, + 0x85C1, 0xCDCB, 0x85C9, 0xEDBE, 0x85CD, 0xD5C0, 0x85CE, 0xE3F0, + 0x85CF, 0xEDFA, 0x85D5, 0xE9E4, 0x85DC, 0xD5ED, 0x85DD, 0xE7DD, + 0x85E4, 0xD4F6, 0x85E5, 0xE5B7, 0x85E9, 0xDBE7, 0x85EA, 0xE2BF, + 0x85F7, 0xEECB, 0x85FA, 0xD7F4, 0x85FB, 0xF0DD, 0x85FF, 0xCEAB, + 0x8602, 0xE7DE, 0x8606, 0xD6D6, 0x8607, 0xE1CC, 0x860A, 0xE8B3, + 0x8616, 0xE5EE, 0x8617, 0xDCA2, 0x861A, 0xE0D0, 0x862D, 0xD5B5, + 0x863F, 0xD5A1, 0x864E, 0xFBDB, 0x8650, 0xF9CB, 0x8654, 0xCBF3, + 0x8655, 0xF4A5, 0x865B, 0xFAC8, 0x865C, 0xD6D7, 0x865E, 0xE9E5, + 0x865F, 0xFBDC, 0x8667, 0xFDD0, 0x8679, 0xFBF6, 0x868A, 0xDAA5, + 0x868C, 0xDBBD, 0x8693, 0xECE2, 0x86A3, 0xCDF7, 0x86A4, 0xF0DE, + 0x86A9, 0xF6C9, 0x86C7, 0xDEEF, 0x86CB, 0xD3B1, 0x86D4, 0xFCEE, + 0x86D9, 0xE8C3, 0x86DB, 0xF1C8, 0x86DF, 0xCEF1, 0x86E4, 0xF9ED, + 0x86ED, 0xF2F4, 0x86FE, 0xE4B6, 0x8700, 0xF5B9, 0x8702, 0xDCF0, + 0x8703, 0xE3F1, 0x8708, 0xE8A5, 0x8718, 0xF2BB, 0x871A, 0xDEA4, + 0x871C, 0xDACC, 0x874E, 0xCAE9, 0x8755, 0xE3DA, 0x8757, 0xFCD9, + 0x875F, 0xEADA, 0x8766, 0xF9C4, 0x8768, 0xE3A4, 0x8774, 0xFBDD, + 0x8776, 0xEFCA, 0x8778, 0xE8C4, 0x8782, 0xD5CC, 0x878D, 0xEBD7, + 0x879F, 0xD9AD, 0x87A2, 0xFBAB, 0x87B3, 0xD3D9, 0x87BA, 0xD5A2, + 0x87C4, 0xF6DE, 0x87E0, 0xDAF6, 0x87EC, 0xE0D1, 0x87EF, 0xE9A8, + 0x87F2, 0xF5F9, 0x87F9, 0xFAAF, 0x87FB, 0xEBFC, 0x87FE, 0xE0EA, + 0x8805, 0xE3B2, 0x881F, 0xD5C5, 0x8822, 0xF1E3, 0x8823, 0xD5EE, + 0x8831, 0xCDCC, 0x8836, 0xEDD9, 0x883B, 0xD8C1, 0x8840, 0xFAEC, + 0x8846, 0xF1EB, 0x884C, 0xFABC, 0x884D, 0xE6E2, 0x8852, 0xFAE5, + 0x8853, 0xE2FA, 0x8857, 0xCAB6, 0x8859, 0xE4B7, 0x885B, 0xEADB, + 0x885D, 0xF5FA, 0x8861, 0xFBAC, 0x8862, 0xCFC3, 0x8863, 0xEBFD, + 0x8868, 0xF8FA, 0x886B, 0xDFB9, 0x8870, 0xE1F1, 0x8872, 0xD2A4, + 0x8877, 0xF5FB, 0x887E, 0xD0DA, 0x887F, 0xD0DB, 0x8881, 0xEABE, + 0x8882, 0xD9B1, 0x8888, 0xCAB7, 0x888B, 0xD3E7, 0x888D, 0xF8E5, + 0x8892, 0xD3B2, 0x8896, 0xE2C0, 0x8897, 0xF2DF, 0x889E, 0xCDE5, + 0x88AB, 0xF9AC, 0x88B4, 0xCDCD, 0x88C1, 0xEEAE, 0x88C2, 0xD6AE, + 0x88CF, 0xD7EA, 0x88D4, 0xE7E0, 0x88D5, 0xEBAE, 0x88D9, 0xCFD9, + 0x88DC, 0xDCCD, 0x88DD, 0xEDFB, 0x88DF, 0xDEF0, 0x88E1, 0xD7EB, + 0x88E8, 0xDEA5, 0x88F3, 0xDFD7, 0x88F4, 0xDBD0, 0x88F5, 0xDBD1, + 0x88F8, 0xD5A3, 0x88FD, 0xF0B2, 0x8907, 0xDCDC, 0x8910, 0xCAE8, + 0x8912, 0xF8E6, 0x8913, 0xDCCE, 0x8918, 0xEADC, 0x8919, 0xDBD2, + 0x8925, 0xE9B3, 0x892A, 0xF7DB, 0x8936, 0xE3A8, 0x8938, 0xD7AE, + 0x893B, 0xE0E1, 0x8941, 0xCBBA, 0x8944, 0xE5D1, 0x895F, 0xD0DC, + 0x8964, 0xD5C1, 0x896A, 0xD8CA, 0x8972, 0xE3A9, 0x897F, 0xE0A4, + 0x8981, 0xE9A9, 0x8983, 0xD3C7, 0x8986, 0xDCDD, 0x8987, 0xF8AE, + 0x898B, 0xCCB8, 0x898F, 0xD0AE, 0x8993, 0xD8F2, 0x8996, 0xE3CA, + 0x89A1, 0xCCAF, 0x89A9, 0xD4AD, 0x89AA, 0xF6D1, 0x89B2, 0xD0CC, + 0x89BA, 0xCAC6, 0x89BD, 0xD5C2, 0x89C0, 0xCEBA, 0x89D2, 0xCAC7, + 0x89E3, 0xFAB0, 0x89F4, 0xDFD8, 0x89F8, 0xF5BA, 0x8A00, 0xE5EB, + 0x8A02, 0xEFF4, 0x8A03, 0xDDB5, 0x8A08, 0xCDAA, 0x8A0A, 0xE3F2, + 0x8A0C, 0xFBF7, 0x8A0E, 0xF7D0, 0x8A13, 0xFDBA, 0x8A16, 0xFDE1, + 0x8A17, 0xF6FE, 0x8A18, 0xD1C0, 0x8A1B, 0xE8C5, 0x8A1D, 0xE4B8, + 0x8A1F, 0xE1E8, 0x8A23, 0xCCC1, 0x8A25, 0xD2ED, 0x8A2A, 0xDBBE, + 0x8A2D, 0xE0E2, 0x8A31, 0xFAC9, 0x8A34, 0xE1CD, 0x8A36, 0xCAB8, + 0x8A3A, 0xF2E0, 0x8A3B, 0xF1C9, 0x8A50, 0xDEF1, 0x8A54, 0xF0DF, + 0x8A55, 0xF8C4, 0x8A5B, 0xEECC, 0x8A5E, 0xDEF2, 0x8A60, 0xE7C9, + 0x8A62, 0xE2F3, 0x8A63, 0xE7E1, 0x8A66, 0xE3CB, 0x8A69, 0xE3CC, + 0x8A6D, 0xCFF8, 0x8A6E, 0xEFAC, 0x8A70, 0xFDFE, 0x8A71, 0xFCA5, + 0x8A72, 0xFAB1, 0x8A73, 0xDFD9, 0x8A75, 0xE0D2, 0x8A79, 0xF4DA, + 0x8A85, 0xF1CA, 0x8A87, 0xCEA3, 0x8A8C, 0xF2BC, 0x8A8D, 0xECE3, + 0x8A93, 0xE0A5, 0x8A95, 0xF7AB, 0x8A98, 0xEBAF, 0x8A9E, 0xE5DE, + 0x8AA0, 0xE1A4, 0x8AA1, 0xCDAB, 0x8AA3, 0xD9F4, 0x8AA4, 0xE8A6, + 0x8AA5, 0xCDCE, 0x8AA6, 0xE1E9, 0x8AA8, 0xFCEF, 0x8AAA, 0xE0E3, + 0x8AB0, 0xE2C1, 0x8AB2, 0xCEA4, 0x8AB9, 0xDEA6, 0x8ABC, 0xEBFE, + 0x8ABE, 0xEBDD, 0x8ABF, 0xF0E0, 0x8AC2, 0xF4DB, 0x8AC4, 0xE2F4, + 0x8AC7, 0xD3C8, 0x8ACB, 0xF4EB, 0x8ACD, 0xEEB5, 0x8ACF, 0xF5D8, + 0x8AD2, 0xD5DF, 0x8AD6, 0xD6E5, 0x8ADB, 0xEBB0, 0x8ADC, 0xF4E3, + 0x8AE1, 0xE3CD, 0x8AE6, 0xF4F4, 0x8AE7, 0xFAB2, 0x8AEA, 0xEFF5, + 0x8AEB, 0xCADF, 0x8AED, 0xEBB1, 0x8AEE, 0xEDBF, 0x8AF1, 0xFDC9, + 0x8AF6, 0xE4A6, 0x8AF7, 0xF9A4, 0x8AF8, 0xF0B3, 0x8AFA, 0xE5EC, + 0x8AFE, 0xD1E7, 0x8B00, 0xD9C7, 0x8B01, 0xE4D7, 0x8B02, 0xEADD, + 0x8B04, 0xD4F7, 0x8B0E, 0xDABA, 0x8B10, 0xDACD, 0x8B14, 0xF9CC, + 0x8B16, 0xE1DA, 0x8B17, 0xDBBF, 0x8B19, 0xCCC5, 0x8B1A, 0xECD0, + 0x8B1B, 0xCBBB, 0x8B1D, 0xDEF3, 0x8B20, 0xE9AA, 0x8B28, 0xD9C8, + 0x8B2B, 0xEEE3, 0x8B2C, 0xD7BD, 0x8B33, 0xCFC4, 0x8B39, 0xD0CD, + 0x8B41, 0xFCA6, 0x8B49, 0xF1FB, 0x8B4E, 0xFDD2, 0x8B4F, 0xD1C1, + 0x8B58, 0xE3DB, 0x8B5A, 0xD3C9, 0x8B5C, 0xDCCF, 0x8B66, 0xCCED, + 0x8B6C, 0xDEA7, 0x8B6F, 0xE6BB, 0x8B70, 0xECA1, 0x8B74, 0xCCB9, + 0x8B77, 0xFBDE, 0x8B7D, 0xE7E2, 0x8B80, 0xD4C1, 0x8B8A, 0xDCA8, + 0x8B90, 0xE2C2, 0x8B92, 0xF3D8, 0x8B93, 0xE5D3, 0x8B96, 0xF3D9, + 0x8B9A, 0xF3C6, 0x8C37, 0xCDDB, 0x8C3F, 0xCDAC, 0x8C41, 0xFCC3, + 0x8C46, 0xD4E7, 0x8C48, 0xD1C2, 0x8C4A, 0xF9A5, 0x8C4C, 0xE8D5, + 0x8C55, 0xE3CE, 0x8C5A, 0xD4CA, 0x8C61, 0xDFDA, 0x8C6A, 0xFBDF, + 0x8C6B, 0xE7E3, 0x8C79, 0xF8FB, 0x8C7A, 0xE3CF, 0x8C82, 0xF5B0, + 0x8C8A, 0xD8E7, 0x8C8C, 0xD9C9, 0x8C9D, 0xF8AF, 0x8C9E, 0xEFF6, + 0x8CA0, 0xDDB6, 0x8CA1, 0xEEAF, 0x8CA2, 0xCDF8, 0x8CA7, 0xDEB8, + 0x8CA8, 0xFCA7, 0x8CA9, 0xF7FC, 0x8CAA, 0xF7B1, 0x8CAB, 0xCEBB, + 0x8CAC, 0xF4A1, 0x8CAF, 0xEECD, 0x8CB0, 0xE1AE, 0x8CB3, 0xECC3, + 0x8CB4, 0xCFFE, 0x8CB6, 0xF8BF, 0x8CB7, 0xD8E2, 0x8CB8, 0xD3E8, + 0x8CBB, 0xDEA8, 0x8CBC, 0xF4E4, 0x8CBD, 0xECC2, 0x8CBF, 0xD9F5, + 0x8CC0, 0xF9C5, 0x8CC1, 0xDDD3, 0x8CC2, 0xD6F1, 0x8CC3, 0xECFC, + 0x8CC4, 0xFCF0, 0x8CC7, 0xEDC0, 0x8CC8, 0xCAB9, 0x8CCA, 0xEEE4, + 0x8CD1, 0xF2E1, 0x8CD3, 0xDEB9, 0x8CDA, 0xD6F2, 0x8CDC, 0xDEF4, + 0x8CDE, 0xDFDB, 0x8CE0, 0xDBD3, 0x8CE2, 0xFAE7, 0x8CE3, 0xD8E3, + 0x8CE4, 0xF4C1, 0x8CE6, 0xDDB7, 0x8CEA, 0xF2F5, 0x8CED, 0xD4AE, + 0x8CF4, 0xD6F3, 0x8CFB, 0xDDB8, 0x8CFC, 0xCFC5, 0x8CFD, 0xDFDF, + 0x8D04, 0xF2BE, 0x8D05, 0xF6A1, 0x8D07, 0xEBCB, 0x8D08, 0xF1FC, + 0x8D0A, 0xF3C7, 0x8D0D, 0xE0EB, 0x8D13, 0xEDFC, 0x8D16, 0xE1DB, + 0x8D64, 0xEEE5, 0x8D66, 0xDEF5, 0x8D6B, 0xFAD3, 0x8D70, 0xF1CB, + 0x8D73, 0xD0AF, 0x8D74, 0xDDB9, 0x8D77, 0xD1C3, 0x8D85, 0xF5B1, + 0x8D8A, 0xEAC6, 0x8D99, 0xF0E1, 0x8DA3, 0xF6AC, 0x8DA8, 0xF5D9, + 0x8DB3, 0xF0EB, 0x8DBA, 0xDDBA, 0x8DBE, 0xF2BF, 0x8DC6, 0xF7C5, + 0x8DCB, 0xDBA2, 0x8DCC, 0xF2F6, 0x8DCF, 0xCABA, 0x8DDB, 0xF7F5, + 0x8DDD, 0xCBE5, 0x8DE1, 0xEEE6, 0x8DE3, 0xE0D3, 0x8DE8, 0xCEA5, + 0x8DEF, 0xD6D8, 0x8DF3, 0xD4AF, 0x8E0A, 0xE9C9, 0x8E0F, 0xD3CE, + 0x8E10, 0xF4C2, 0x8E1E, 0xCBE6, 0x8E2A, 0xF1A1, 0x8E30, 0xEBB2, + 0x8E35, 0xF1A2, 0x8E42, 0xEBB3, 0x8E44, 0xF0B4, 0x8E47, 0xCBF4, + 0x8E48, 0xD4B0, 0x8E49, 0xF3B2, 0x8E4A, 0xFBB7, 0x8E59, 0xF5EC, + 0x8E5F, 0xEEE7, 0x8E60, 0xF4B2, 0x8E74, 0xF5ED, 0x8E76, 0xCFF3, + 0x8E81, 0xF0E2, 0x8E87, 0xEECE, 0x8E8A, 0xF1CC, 0x8E8D, 0xE5B8, + 0x8EAA, 0xD7F5, 0x8EAB, 0xE3F3, 0x8EAC, 0xCFE5, 0x8EC0, 0xCFC6, + 0x8ECA, 0xF3B3, 0x8ECB, 0xE4D8, 0x8ECC, 0xCFF9, 0x8ECD, 0xCFDA, + 0x8ED2, 0xFACD, 0x8EDF, 0xE6E3, 0x8EEB, 0xF2E2, 0x8EF8, 0xF5EE, + 0x8EFB, 0xCABB, 0x8EFE, 0xE3DC, 0x8F03, 0xCEF2, 0x8F05, 0xD6D9, + 0x8F09, 0xEEB0, 0x8F12, 0xF4E5, 0x8F13, 0xD8C2, 0x8F14, 0xDCD0, + 0x8F15, 0xCCEE, 0x8F1B, 0xD5E0, 0x8F1C, 0xF6CA, 0x8F1D, 0xFDCA, + 0x8F1E, 0xD8D6, 0x8F1F, 0xF4CF, 0x8F26, 0xD6A6, 0x8F27, 0xDCBE, + 0x8F29, 0xDBD4, 0x8F2A, 0xD7C7, 0x8F2F, 0xF2FE, 0x8F33, 0xF1CD, + 0x8F38, 0xE2C3, 0x8F39, 0xDCDE, 0x8F3B, 0xDCDF, 0x8F3E, 0xEFAD, + 0x8F3F, 0xE6AB, 0x8F44, 0xF9DD, 0x8F45, 0xEABF, 0x8F49, 0xEFAE, + 0x8F4D, 0xF4D0, 0x8F4E, 0xCEF3, 0x8F5D, 0xE6AC, 0x8F5F, 0xCEDE, + 0x8F62, 0xD5F9, 0x8F9B, 0xE3F4, 0x8F9C, 0xCDD0, 0x8FA3, 0xD5B8, + 0x8FA6, 0xF7FD, 0x8FA8, 0xDCA9, 0x8FAD, 0xDEF6, 0x8FAF, 0xDCAA, + 0x8FB0, 0xF2E3, 0x8FB1, 0xE9B4, 0x8FB2, 0xD2DC, 0x8FC2, 0xE9E6, + 0x8FC5, 0xE3F6, 0x8FCE, 0xE7CA, 0x8FD1, 0xD0CE, 0x8FD4, 0xDAF7, + 0x8FE6, 0xCABC, 0x8FEA, 0xEEE8, 0x8FEB, 0xDADE, 0x8FED, 0xF2F7, + 0x8FF0, 0xE2FB, 0x8FF2, 0xCCA6, 0x8FF7, 0xDABB, 0x8FF9, 0xEEE9, + 0x8FFD, 0xF5DA, 0x9000, 0xF7DC, 0x9001, 0xE1EA, 0x9002, 0xCEC1, + 0x9003, 0xD4B1, 0x9005, 0xFDB1, 0x9006, 0xE6BD, 0x9008, 0xFBAD, + 0x900B, 0xF8E7, 0x900D, 0xE1CE, 0x900F, 0xF7E2, 0x9010, 0xF5EF, + 0x9011, 0xCFC7, 0x9014, 0xD4B2, 0x9015, 0xCCEF, 0x9017, 0xD4E8, + 0x9019, 0xEECF, 0x901A, 0xF7D7, 0x901D, 0xE0A6, 0x901E, 0xD6C1, + 0x901F, 0xE1DC, 0x9020, 0xF0E3, 0x9021, 0xF1E4, 0x9022, 0xDCF1, + 0x9023, 0xD6A7, 0x902E, 0xF4F5, 0x9031, 0xF1CE, 0x9032, 0xF2E4, + 0x9035, 0xD0B0, 0x9038, 0xECEF, 0x903C, 0xF9BA, 0x903E, 0xEBB5, + 0x9041, 0xD4ED, 0x9042, 0xE2C4, 0x9047, 0xE9E7, 0x904A, 0xEBB4, + 0x904B, 0xEAA1, 0x904D, 0xF8BC, 0x904E, 0xCEA6, 0x9050, 0xF9C6, + 0x9051, 0xFCDA, 0x9053, 0xD4B3, 0x9054, 0xD3B9, 0x9055, 0xEADE, + 0x9059, 0xE9AB, 0x905C, 0xE1E1, 0x905D, 0xD3CF, 0x905E, 0xF4F6, + 0x9060, 0xEAC0, 0x9061, 0xE1CF, 0x9063, 0xCCBA, 0x9069, 0xEEEA, + 0x906D, 0xF0E4, 0x906E, 0xF3B4, 0x906F, 0xD4EE, 0x9072, 0xF2C0, + 0x9075, 0xF1E5, 0x9077, 0xF4C3, 0x9078, 0xE0D4, 0x907A, 0xEBB6, + 0x907C, 0xD7A1, 0x907D, 0xCBE8, 0x907F, 0xF9AD, 0x9080, 0xE9AD, + 0x9081, 0xD8E4, 0x9082, 0xFAB3, 0x9083, 0xE2C5, 0x9084, 0xFCBD, + 0x9087, 0xECC4, 0x9088, 0xD8B1, 0x908A, 0xDCAB, 0x908F, 0xD5A4, + 0x9091, 0xEBE9, 0x9095, 0xE8BB, 0x9099, 0xD8D7, 0x90A2, 0xFBAE, + 0x90A3, 0xD1E1, 0x90A6, 0xDBC0, 0x90A8, 0xF5BE, 0x90AA, 0xDEF7, + 0x90AF, 0xCAFB, 0x90B0, 0xF7C6, 0x90B1, 0xCFC8, 0x90B5, 0xE1D0, + 0x90B8, 0xEED0, 0x90C1, 0xE9F4, 0x90CA, 0xCEF4, 0x90DE, 0xD5CD, + 0x90E1, 0xCFDB, 0x90E8, 0xDDBB, 0x90ED, 0xCEAC, 0x90F5, 0xE9E8, + 0x90FD, 0xD4B4, 0x9102, 0xE4C7, 0x9112, 0xF5DB, 0x9115, 0xFAC1, + 0x9119, 0xDEA9, 0x9127, 0xD4F8, 0x912D, 0xEFF7, 0x9132, 0xD3B3, + 0x9149, 0xEBB7, 0x914A, 0xEFF8, 0x914B, 0xF5DC, 0x914C, 0xEDCC, + 0x914D, 0xDBD5, 0x914E, 0xF1CF, 0x9152, 0xF1D0, 0x9162, 0xF5B2, + 0x9169, 0xD9AE, 0x916A, 0xD5AC, 0x916C, 0xE2C6, 0x9175, 0xFDA3, + 0x9177, 0xFBE5, 0x9178, 0xDFAB, 0x9187, 0xE2F5, 0x9189, 0xF6AD, + 0x918B, 0xF5B3, 0x918D, 0xF0B5, 0x9192, 0xE1A5, 0x919C, 0xF5DD, + 0x91AB, 0xECA2, 0x91AC, 0xEDFD, 0x91AE, 0xF5B4, 0x91AF, 0xFBB8, + 0x91B1, 0xDBA3, 0x91B4, 0xD6CA, 0x91B5, 0xCBD9, 0x91C0, 0xE5D4, + 0x91C7, 0xF3FA, 0x91C9, 0xEBB8, 0x91CB, 0xE0B7, 0x91CC, 0xD7EC, + 0x91CD, 0xF1EC, 0x91CE, 0xE5AF, 0x91CF, 0xD5E1, 0x91D0, 0xD7ED, + 0x91D1, 0xD1D1, 0x91D7, 0xE1F2, 0x91D8, 0xEFF9, 0x91DC, 0xDDBC, + 0x91DD, 0xF6DC, 0x91E3, 0xF0E5, 0x91E7, 0xF4C4, 0x91EA, 0xE9E9, + 0x91F5, 0xF3FB, 0x920D, 0xD4EF, 0x9210, 0xCCA2, 0x9211, 0xF7FE, + 0x9212, 0xDFBC, 0x9217, 0xEBCD, 0x921E, 0xD0B7, 0x9234, 0xD6C2, + 0x923A, 0xE8AD, 0x923F, 0xEFAF, 0x9240, 0xCBA5, 0x9245, 0xCBE9, + 0x9249, 0xFAE8, 0x9257, 0xCCC6, 0x925B, 0xE6E7, 0x925E, 0xEAC7, + 0x9262, 0xDBA4, 0x9264, 0xCFC9, 0x9265, 0xE2FC, 0x9266, 0xEFFA, + 0x9280, 0xEBDE, 0x9283, 0xF5C8, 0x9285, 0xD4DE, 0x9291, 0xE0D5, + 0x9293, 0xEFB0, 0x9296, 0xE2C7, 0x9298, 0xD9AF, 0x929C, 0xF9E7, + 0x92B3, 0xE7E5, 0x92B6, 0xCFCA, 0x92B7, 0xE1D1, 0x92B9, 0xE2C8, + 0x92CC, 0xEFFB, 0x92CF, 0xFAF9, 0x92D2, 0xDCF2, 0x92E4, 0xE0A7, + 0x92EA, 0xF8E8, 0x92F8, 0xCBEA, 0x92FC, 0xCBBC, 0x9304, 0xD6E2, + 0x9310, 0xF5DE, 0x9318, 0xF5DF, 0x931A, 0xEEB6, 0x931E, 0xE2F6, + 0x931F, 0xD3CA, 0x9320, 0xEFFC, 0x9321, 0xD1C4, 0x9322, 0xEFB1, + 0x9324, 0xD1C5, 0x9326, 0xD0DE, 0x9328, 0xD9E1, 0x932B, 0xE0B8, + 0x932E, 0xCDD1, 0x932F, 0xF3B9, 0x9348, 0xE7CC, 0x934A, 0xD6A8, + 0x934B, 0xCEA7, 0x934D, 0xD4B5, 0x9354, 0xE4C8, 0x935B, 0xD3B4, + 0x936E, 0xEBB9, 0x9375, 0xCBF5, 0x937C, 0xF6DD, 0x937E, 0xF1A3, + 0x938C, 0xCCC7, 0x9394, 0xE9CA, 0x9396, 0xE1F0, 0x939A, 0xF5E0, + 0x93A3, 0xFBAF, 0x93A7, 0xCBD1, 0x93AC, 0xFBE0, 0x93AD, 0xF2E5, + 0x93B0, 0xECF0, 0x93C3, 0xF0EC, 0x93D1, 0xEEEB, 0x93DE, 0xE9CB, + 0x93E1, 0xCCF0, 0x93E4, 0xD7AF, 0x93F6, 0xF3A1, 0x9404, 0xFCF5, + 0x9418, 0xF1A4, 0x9425, 0xE0D6, 0x942B, 0xEFB2, 0x9435, 0xF4D1, + 0x9438, 0xF7A1, 0x9444, 0xF1D1, 0x9451, 0xCAFC, 0x9452, 0xCAFD, + 0x945B, 0xCECE, 0x947D, 0xF3C8, 0x947F, 0xF3BA, 0x9577, 0xEDFE, + 0x9580, 0xDAA6, 0x9583, 0xE0EC, 0x9589, 0xF8CD, 0x958B, 0xCBD2, + 0x958F, 0xEBCE, 0x9591, 0xF9D8, 0x9592, 0xF9D9, 0x9593, 0xCAE0, + 0x9594, 0xDACA, 0x9598, 0xCBA6, 0x95A3, 0xCAC8, 0x95A4, 0xF9EE, + 0x95A5, 0xDBEC, 0x95A8, 0xD0B1, 0x95AD, 0xD5EF, 0x95B1, 0xE6F3, + 0x95BB, 0xE7A2, 0x95BC, 0xE4D9, 0x95C7, 0xE4E1, 0x95CA, 0xFCC4, + 0x95D4, 0xF9EF, 0x95D5, 0xCFF4, 0x95D6, 0xF7E6, 0x95DC, 0xCEBC, + 0x95E1, 0xF4C5, 0x95E2, 0xDCA3, 0x961C, 0xDDBD, 0x9621, 0xF4C6, + 0x962A, 0xF8A1, 0x962E, 0xE8D6, 0x9632, 0xDBC1, 0x963B, 0xF0E6, + 0x963F, 0xE4B9, 0x9640, 0xF6ED, 0x9642, 0xF9AE, 0x9644, 0xDDBE, + 0x964B, 0xD7B0, 0x964C, 0xD8E8, 0x964D, 0xCBBD, 0x9650, 0xF9DA, + 0x965B, 0xF8CE, 0x965C, 0xF9F0, 0x965D, 0xE0ED, 0x965E, 0xE3B3, + 0x965F, 0xF4B3, 0x9662, 0xEAC2, 0x9663, 0xF2E6, 0x9664, 0xF0B6, + 0x966A, 0xDBD6, 0x9670, 0xEBE4, 0x9673, 0xF2E7, 0x9675, 0xD7D5, + 0x9676, 0xD4B6, 0x9677, 0xF9E8, 0x9678, 0xD7C1, 0x967D, 0xE5D5, + 0x9685, 0xE9EA, 0x9686, 0xD7CC, 0x968A, 0xD3E9, 0x968B, 0xE2C9, + 0x968D, 0xFCDB, 0x968E, 0xCDAD, 0x9694, 0xCCB0, 0x9695, 0xEAA2, + 0x9698, 0xE4F6, 0x9699, 0xD0C0, 0x969B, 0xF0B7, 0x969C, 0xEEA1, + 0x96A3, 0xD7F6, 0x96A7, 0xE2CA, 0x96A8, 0xE2CB, 0x96AA, 0xFACF, + 0x96B1, 0xEBDF, 0x96B7, 0xD6CB, 0x96BB, 0xF4B4, 0x96C0, 0xEDCD, + 0x96C1, 0xE4D2, 0x96C4, 0xEAA9, 0x96C5, 0xE4BA, 0x96C6, 0xF3A2, + 0x96C7, 0xCDD2, 0x96C9, 0xF6CB, 0x96CB, 0xF1E6, 0x96CC, 0xEDC1, + 0x96CD, 0xE8BC, 0x96CE, 0xEED1, 0x96D5, 0xF0E7, 0x96D6, 0xE2CC, + 0x96D9, 0xE4AA, 0x96DB, 0xF5E1, 0x96DC, 0xEDDA, 0x96E2, 0xD7EE, + 0x96E3, 0xD1F1, 0x96E8, 0xE9EB, 0x96E9, 0xE9EC, 0x96EA, 0xE0E4, + 0x96EF, 0xDAA7, 0x96F0, 0xDDD4, 0x96F2, 0xEAA3, 0x96F6, 0xD6C3, + 0x96F7, 0xD6F4, 0x96F9, 0xDADF, 0x96FB, 0xEFB3, 0x9700, 0xE2CD, + 0x9706, 0xEFFD, 0x9707, 0xF2E8, 0x9711, 0xEFC5, 0x9713, 0xE7E7, + 0x9716, 0xD7FD, 0x9719, 0xE7CE, 0x971C, 0xDFDC, 0x971E, 0xF9C7, + 0x9727, 0xD9F6, 0x9730, 0xDFAC, 0x9732, 0xD6DA, 0x9739, 0xDCA4, + 0x973D, 0xF0B8, 0x9742, 0xD5FA, 0x9744, 0xE4F7, 0x9748, 0xD6C4, + 0x9751, 0xF4EC, 0x9756, 0xEFFE, 0x975C, 0xF0A1, 0x975E, 0xDEAA, + 0x9761, 0xDABC, 0x9762, 0xD8FC, 0x9769, 0xFAD4, 0x976D, 0xECE5, + 0x9774, 0xFCA8, 0x9777, 0xECE6, 0x977A, 0xD8CB, 0x978B, 0xFBB9, + 0x978D, 0xE4D3, 0x978F, 0xCDF9, 0x97A0, 0xCFD3, 0x97A8, 0xCAEA, + 0x97AB, 0xCFD4, 0x97AD, 0xF8BD, 0x97C6, 0xF4C7, 0x97CB, 0xEADF, + 0x97D3, 0xF9DB, 0x97DC, 0xD4B7, 0x97F3, 0xEBE5, 0x97F6, 0xE1D2, + 0x97FB, 0xEAA4, 0x97FF, 0xFAC2, 0x9800, 0xFBE1, 0x9801, 0xFAED, + 0x9802, 0xF0A2, 0x9803, 0xCCF1, 0x9805, 0xFAA3, 0x9806, 0xE2F7, + 0x9808, 0xE2CE, 0x980A, 0xE9F5, 0x980C, 0xE1EB, 0x9810, 0xE7E8, + 0x9811, 0xE8D7, 0x9812, 0xDAF8, 0x9813, 0xD4CB, 0x9817, 0xF7F6, + 0x9818, 0xD6C5, 0x982D, 0xD4E9, 0x9830, 0xFAFA, 0x9838, 0xCCF2, + 0x9839, 0xF7DD, 0x983B, 0xDEBA, 0x9846, 0xCEA8, 0x984C, 0xF0B9, + 0x984D, 0xE4FE, 0x984E, 0xE4C9, 0x9854, 0xE4D4, 0x9858, 0xEAC3, + 0x985A, 0xEFB4, 0x985E, 0xD7BE, 0x9865, 0xFBE2, 0x9867, 0xCDD3, + 0x986B, 0xEFB5, 0x986F, 0xFAE9, 0x98A8, 0xF9A6, 0x98AF, 0xDFBD, + 0x98B1, 0xF7C7, 0x98C4, 0xF8FD, 0x98C7, 0xF8FC, 0x98DB, 0xDEAB, + 0x98DC, 0xDBE8, 0x98DF, 0xE3DD, 0x98E1, 0xE1E2, 0x98E2, 0xD1C6, + 0x98ED, 0xF6D0, 0x98EE, 0xEBE6, 0x98EF, 0xDAF9, 0x98F4, 0xECC7, + 0x98FC, 0xDEF8, 0x98FD, 0xF8E9, 0x98FE, 0xE3DE, 0x9903, 0xCEF5, + 0x9909, 0xFAC3, 0x990A, 0xE5D7, 0x990C, 0xECC8, 0x9910, 0xF3C9, + 0x9913, 0xE4BB, 0x9918, 0xE6AE, 0x991E, 0xEFB6, 0x9920, 0xDCBF, + 0x9928, 0xCEBD, 0x9945, 0xD8C3, 0x9949, 0xD0CF, 0x994B, 0xCFFA, + 0x994C, 0xF3CA, 0x994D, 0xE0D7, 0x9951, 0xD1C7, 0x9952, 0xE9AE, + 0x9954, 0xE8BD, 0x9957, 0xFAC4, 0x9996, 0xE2CF, 0x9999, 0xFAC5, + 0x999D, 0xF9B8, 0x99A5, 0xDCE0, 0x99A8, 0xFBB0, 0x99AC, 0xD8A9, + 0x99AD, 0xE5DF, 0x99AE, 0xF9A7, 0x99B1, 0xF6EE, 0x99B3, 0xF6CC, + 0x99B4, 0xE2F8, 0x99B9, 0xECF1, 0x99C1, 0xDAE0, 0x99D0, 0xF1D2, + 0x99D1, 0xD2CC, 0x99D2, 0xCFCB, 0x99D5, 0xCABD, 0x99D9, 0xDDBF, + 0x99DD, 0xF6EF, 0x99DF, 0xDEF9, 0x99ED, 0xFAB4, 0x99F1, 0xD5AD, + 0x99FF, 0xF1E7, 0x9A01, 0xDEBE, 0x9A08, 0xDCC0, 0x9A0E, 0xD1C8, + 0x9A0F, 0xD1C9, 0x9A19, 0xF8BE, 0x9A2B, 0xCBF6, 0x9A30, 0xD4F9, + 0x9A36, 0xF5E2, 0x9A37, 0xE1D3, 0x9A40, 0xD8E9, 0x9A43, 0xF8FE, + 0x9A45, 0xCFCC, 0x9A4D, 0xFDA4, 0x9A55, 0xCEF6, 0x9A57, 0xFAD0, + 0x9A5A, 0xCCF3, 0x9A5B, 0xE6BE, 0x9A5F, 0xF6AE, 0x9A62, 0xD5F0, + 0x9A65, 0xD1CA, 0x9A69, 0xFCBE, 0x9A6A, 0xD5F1, 0x9AA8, 0xCDE9, + 0x9AB8, 0xFAB5, 0x9AD3, 0xE2D0, 0x9AD4, 0xF4F7, 0x9AD8, 0xCDD4, + 0x9AE5, 0xE7A3, 0x9AEE, 0xDBA5, 0x9B1A, 0xE2D1, 0x9B27, 0xD7A2, + 0x9B2A, 0xF7E3, 0x9B31, 0xEAA6, 0x9B3C, 0xD0A1, 0x9B41, 0xCEDA, + 0x9B42, 0xFBEB, 0x9B43, 0xDBA6, 0x9B44, 0xDBDE, 0x9B45, 0xD8E5, + 0x9B4F, 0xEAE0, 0x9B54, 0xD8AA, 0x9B5A, 0xE5E0, 0x9B6F, 0xD6DB, + 0x9B8E, 0xEFC6, 0x9B91, 0xF8EA, 0x9B9F, 0xE4D5, 0x9BAB, 0xCEF7, + 0x9BAE, 0xE0D8, 0x9BC9, 0xD7EF, 0x9BD6, 0xF4ED, 0x9BE4, 0xCDE6, + 0x9BE8, 0xCCF4, 0x9C0D, 0xF5E3, 0x9C10, 0xE4CA, 0x9C12, 0xDCE1, + 0x9C15, 0xF9C8, 0x9C25, 0xFCBF, 0x9C32, 0xE8A7, 0x9C3B, 0xD8C4, + 0x9C47, 0xCBBE, 0x9C49, 0xDCAE, 0x9C57, 0xD7F7, 0x9CE5, 0xF0E8, + 0x9CE7, 0xDDC0, 0x9CE9, 0xCFCD, 0x9CF3, 0xDCF3, 0x9CF4, 0xD9B0, + 0x9CF6, 0xE6E9, 0x9D09, 0xE4BC, 0x9D1B, 0xEAC4, 0x9D26, 0xE4EC, + 0x9D28, 0xE4E5, 0x9D3B, 0xFBF8, 0x9D51, 0xCCBB, 0x9D5D, 0xE4BD, + 0x9D60, 0xCDDC, 0x9D61, 0xD9F7, 0x9D6C, 0xDDDF, 0x9D72, 0xEDCE, + 0x9DA9, 0xD9D0, 0x9DAF, 0xE5A3, 0x9DB4, 0xF9CD, 0x9DC4, 0xCDAE, + 0x9DD7, 0xCFCE, 0x9DF2, 0xF6AF, 0x9DF8, 0xFDD3, 0x9DF9, 0xEBED, + 0x9DFA, 0xD6DC, 0x9E1A, 0xE5A4, 0x9E1E, 0xD5B6, 0x9E75, 0xD6DD, + 0x9E79, 0xF9E9, 0x9E7D, 0xE7A4, 0x9E7F, 0xD6E3, 0x9E92, 0xD1CB, + 0x9E93, 0xD6E4, 0x9E97, 0xD5F2, 0x9E9D, 0xDEFA, 0x9E9F, 0xD7F8, + 0x9EA5, 0xD8EA, 0x9EB4, 0xCFD5, 0x9EB5, 0xD8FD, 0x9EBB, 0xD8AB, + 0x9EBE, 0xFDCB, 0x9EC3, 0xFCDC, 0x9ECD, 0xE0A8, 0x9ECE, 0xD5F3, + 0x9ED1, 0xFDD9, 0x9ED4, 0xCCA3, 0x9ED8, 0xD9F9, 0x9EDB, 0xD3EA, + 0x9EDC, 0xF5F5, 0x9EDE, 0xEFC7, 0x9EE8, 0xD3DA, 0x9EF4, 0xDABD, + 0x9F07, 0xE8A8, 0x9F08, 0xDCAF, 0x9F0E, 0xF0A3, 0x9F13, 0xCDD5, + 0x9F20, 0xE0A9, 0x9F3B, 0xDEAC, 0x9F4A, 0xF0BA, 0x9F4B, 0xEEB1, + 0x9F4E, 0xEEB2, 0x9F52, 0xF6CD, 0x9F5F, 0xEED2, 0x9F61, 0xD6C6, + 0x9F67, 0xE0E5, 0x9F6A, 0xF3BB, 0x9F6C, 0xE5E1, 0x9F77, 0xE4CB, + 0x9F8D, 0xD7A3, 0x9F90, 0xDBC2, 0x9F95, 0xCAFE, 0x9F9C, 0xCFCF, + 0xAC00, 0xB0A1, 0xAC01, 0xB0A2, 0xAC02, 0x8141, 0xAC03, 0x8142, + 0xAC04, 0xB0A3, 0xAC05, 0x8143, 0xAC06, 0x8144, 0xAC07, 0xB0A4, + 0xAC08, 0xB0A5, 0xAC09, 0xB0A6, 0xAC0A, 0xB0A7, 0xAC0B, 0x8145, + 0xAC0C, 0x8146, 0xAC0D, 0x8147, 0xAC0E, 0x8148, 0xAC0F, 0x8149, + 0xAC10, 0xB0A8, 0xAC11, 0xB0A9, 0xAC12, 0xB0AA, 0xAC13, 0xB0AB, + 0xAC14, 0xB0AC, 0xAC15, 0xB0AD, 0xAC16, 0xB0AE, 0xAC17, 0xB0AF, + 0xAC18, 0x814A, 0xAC19, 0xB0B0, 0xAC1A, 0xB0B1, 0xAC1B, 0xB0B2, + 0xAC1C, 0xB0B3, 0xAC1D, 0xB0B4, 0xAC1E, 0x814B, 0xAC1F, 0x814C, + 0xAC20, 0xB0B5, 0xAC21, 0x814D, 0xAC22, 0x814E, 0xAC23, 0x814F, + 0xAC24, 0xB0B6, 0xAC25, 0x8150, 0xAC26, 0x8151, 0xAC27, 0x8152, + 0xAC28, 0x8153, 0xAC29, 0x8154, 0xAC2A, 0x8155, 0xAC2B, 0x8156, + 0xAC2C, 0xB0B7, 0xAC2D, 0xB0B8, 0xAC2E, 0x8157, 0xAC2F, 0xB0B9, + 0xAC30, 0xB0BA, 0xAC31, 0xB0BB, 0xAC32, 0x8158, 0xAC33, 0x8159, + 0xAC34, 0x815A, 0xAC35, 0x8161, 0xAC36, 0x8162, 0xAC37, 0x8163, + 0xAC38, 0xB0BC, 0xAC39, 0xB0BD, 0xAC3A, 0x8164, 0xAC3B, 0x8165, + 0xAC3C, 0xB0BE, 0xAC3D, 0x8166, 0xAC3E, 0x8167, 0xAC3F, 0x8168, + 0xAC40, 0xB0BF, 0xAC41, 0x8169, 0xAC42, 0x816A, 0xAC43, 0x816B, + 0xAC44, 0x816C, 0xAC45, 0x816D, 0xAC46, 0x816E, 0xAC47, 0x816F, + 0xAC48, 0x8170, 0xAC49, 0x8171, 0xAC4A, 0x8172, 0xAC4B, 0xB0C0, + 0xAC4C, 0x8173, 0xAC4D, 0xB0C1, 0xAC4E, 0x8174, 0xAC4F, 0x8175, + 0xAC50, 0x8176, 0xAC51, 0x8177, 0xAC52, 0x8178, 0xAC53, 0x8179, + 0xAC54, 0xB0C2, 0xAC55, 0x817A, 0xAC56, 0x8181, 0xAC57, 0x8182, + 0xAC58, 0xB0C3, 0xAC59, 0x8183, 0xAC5A, 0x8184, 0xAC5B, 0x8185, + 0xAC5C, 0xB0C4, 0xAC5D, 0x8186, 0xAC5E, 0x8187, 0xAC5F, 0x8188, + 0xAC60, 0x8189, 0xAC61, 0x818A, 0xAC62, 0x818B, 0xAC63, 0x818C, + 0xAC64, 0x818D, 0xAC65, 0x818E, 0xAC66, 0x818F, 0xAC67, 0x8190, + 0xAC68, 0x8191, 0xAC69, 0x8192, 0xAC6A, 0x8193, 0xAC6B, 0x8194, + 0xAC6C, 0x8195, 0xAC6D, 0x8196, 0xAC6E, 0x8197, 0xAC6F, 0x8198, + 0xAC70, 0xB0C5, 0xAC71, 0xB0C6, 0xAC72, 0x8199, 0xAC73, 0x819A, + 0xAC74, 0xB0C7, 0xAC75, 0x819B, 0xAC76, 0x819C, 0xAC77, 0xB0C8, + 0xAC78, 0xB0C9, 0xAC79, 0x819D, 0xAC7A, 0xB0CA, 0xAC7B, 0x819E, + 0xAC7C, 0x819F, 0xAC7D, 0x81A0, 0xAC7E, 0x81A1, 0xAC7F, 0x81A2, + 0xAC80, 0xB0CB, 0xAC81, 0xB0CC, 0xAC82, 0x81A3, 0xAC83, 0xB0CD, + 0xAC84, 0xB0CE, 0xAC85, 0xB0CF, 0xAC86, 0xB0D0, 0xAC87, 0x81A4, + 0xAC88, 0x81A5, 0xAC89, 0xB0D1, 0xAC8A, 0xB0D2, 0xAC8B, 0xB0D3, + 0xAC8C, 0xB0D4, 0xAC8D, 0x81A6, 0xAC8E, 0x81A7, 0xAC8F, 0x81A8, + 0xAC90, 0xB0D5, 0xAC91, 0x81A9, 0xAC92, 0x81AA, 0xAC93, 0x81AB, + 0xAC94, 0xB0D6, 0xAC95, 0x81AC, 0xAC96, 0x81AD, 0xAC97, 0x81AE, + 0xAC98, 0x81AF, 0xAC99, 0x81B0, 0xAC9A, 0x81B1, 0xAC9B, 0x81B2, + 0xAC9C, 0xB0D7, 0xAC9D, 0xB0D8, 0xAC9E, 0x81B3, 0xAC9F, 0xB0D9, + 0xACA0, 0xB0DA, 0xACA1, 0xB0DB, 0xACA2, 0x81B4, 0xACA3, 0x81B5, + 0xACA4, 0x81B6, 0xACA5, 0x81B7, 0xACA6, 0x81B8, 0xACA7, 0x81B9, + 0xACA8, 0xB0DC, 0xACA9, 0xB0DD, 0xACAA, 0xB0DE, 0xACAB, 0x81BA, + 0xACAC, 0xB0DF, 0xACAD, 0x81BB, 0xACAE, 0x81BC, 0xACAF, 0xB0E0, + 0xACB0, 0xB0E1, 0xACB1, 0x81BD, 0xACB2, 0x81BE, 0xACB3, 0x81BF, + 0xACB4, 0x81C0, 0xACB5, 0x81C1, 0xACB6, 0x81C2, 0xACB7, 0x81C3, + 0xACB8, 0xB0E2, 0xACB9, 0xB0E3, 0xACBA, 0x81C4, 0xACBB, 0xB0E4, + 0xACBC, 0xB0E5, 0xACBD, 0xB0E6, 0xACBE, 0x81C5, 0xACBF, 0x81C6, + 0xACC0, 0x81C7, 0xACC1, 0xB0E7, 0xACC2, 0x81C8, 0xACC3, 0x81C9, + 0xACC4, 0xB0E8, 0xACC5, 0x81CA, 0xACC6, 0x81CB, 0xACC7, 0x81CC, + 0xACC8, 0xB0E9, 0xACC9, 0x81CD, 0xACCA, 0x81CE, 0xACCB, 0x81CF, + 0xACCC, 0xB0EA, 0xACCD, 0x81D0, 0xACCE, 0x81D1, 0xACCF, 0x81D2, + 0xACD0, 0x81D3, 0xACD1, 0x81D4, 0xACD2, 0x81D5, 0xACD3, 0x81D6, + 0xACD4, 0x81D7, 0xACD5, 0xB0EB, 0xACD6, 0x81D8, 0xACD7, 0xB0EC, + 0xACD8, 0x81D9, 0xACD9, 0x81DA, 0xACDA, 0x81DB, 0xACDB, 0x81DC, + 0xACDC, 0x81DD, 0xACDD, 0x81DE, 0xACDE, 0x81DF, 0xACDF, 0x81E0, + 0xACE0, 0xB0ED, 0xACE1, 0xB0EE, 0xACE2, 0x81E1, 0xACE3, 0x81E2, + 0xACE4, 0xB0EF, 0xACE5, 0x81E3, 0xACE6, 0x81E4, 0xACE7, 0xB0F0, + 0xACE8, 0xB0F1, 0xACE9, 0x81E5, 0xACEA, 0xB0F2, 0xACEB, 0x81E6, + 0xACEC, 0xB0F3, 0xACED, 0x81E7, 0xACEE, 0x81E8, 0xACEF, 0xB0F4, + 0xACF0, 0xB0F5, 0xACF1, 0xB0F6, 0xACF2, 0x81E9, 0xACF3, 0xB0F7, + 0xACF4, 0x81EA, 0xACF5, 0xB0F8, 0xACF6, 0xB0F9, 0xACF7, 0x81EB, + 0xACF8, 0x81EC, 0xACF9, 0x81ED, 0xACFA, 0x81EE, 0xACFB, 0x81EF, + 0xACFC, 0xB0FA, 0xACFD, 0xB0FB, 0xACFE, 0x81F0, 0xACFF, 0x81F1, + 0xAD00, 0xB0FC, 0xAD01, 0x81F2, 0xAD02, 0x81F3, 0xAD03, 0x81F4, + 0xAD04, 0xB0FD, 0xAD05, 0x81F5, 0xAD06, 0xB0FE, 0xAD07, 0x81F6, + 0xAD08, 0x81F7, 0xAD09, 0x81F8, 0xAD0A, 0x81F9, 0xAD0B, 0x81FA, + 0xAD0C, 0xB1A1, 0xAD0D, 0xB1A2, 0xAD0E, 0x81FB, 0xAD0F, 0xB1A3, + 0xAD10, 0x81FC, 0xAD11, 0xB1A4, 0xAD12, 0x81FD, 0xAD13, 0x81FE, + 0xAD14, 0x8241, 0xAD15, 0x8242, 0xAD16, 0x8243, 0xAD17, 0x8244, + 0xAD18, 0xB1A5, 0xAD19, 0x8245, 0xAD1A, 0x8246, 0xAD1B, 0x8247, + 0xAD1C, 0xB1A6, 0xAD1D, 0x8248, 0xAD1E, 0x8249, 0xAD1F, 0x824A, + 0xAD20, 0xB1A7, 0xAD21, 0x824B, 0xAD22, 0x824C, 0xAD23, 0x824D, + 0xAD24, 0x824E, 0xAD25, 0x824F, 0xAD26, 0x8250, 0xAD27, 0x8251, + 0xAD28, 0x8252, 0xAD29, 0xB1A8, 0xAD2A, 0x8253, 0xAD2B, 0x8254, + 0xAD2C, 0xB1A9, 0xAD2D, 0xB1AA, 0xAD2E, 0x8255, 0xAD2F, 0x8256, + 0xAD30, 0x8257, 0xAD31, 0x8258, 0xAD32, 0x8259, 0xAD33, 0x825A, + 0xAD34, 0xB1AB, 0xAD35, 0xB1AC, 0xAD36, 0x8261, 0xAD37, 0x8262, + 0xAD38, 0xB1AD, 0xAD39, 0x8263, 0xAD3A, 0x8264, 0xAD3B, 0x8265, + 0xAD3C, 0xB1AE, 0xAD3D, 0x8266, 0xAD3E, 0x8267, 0xAD3F, 0x8268, + 0xAD40, 0x8269, 0xAD41, 0x826A, 0xAD42, 0x826B, 0xAD43, 0x826C, + 0xAD44, 0xB1AF, 0xAD45, 0xB1B0, 0xAD46, 0x826D, 0xAD47, 0xB1B1, + 0xAD48, 0x826E, 0xAD49, 0xB1B2, 0xAD4A, 0x826F, 0xAD4B, 0x8270, + 0xAD4C, 0x8271, 0xAD4D, 0x8272, 0xAD4E, 0x8273, 0xAD4F, 0x8274, + 0xAD50, 0xB1B3, 0xAD51, 0x8275, 0xAD52, 0x8276, 0xAD53, 0x8277, + 0xAD54, 0xB1B4, 0xAD55, 0x8278, 0xAD56, 0x8279, 0xAD57, 0x827A, + 0xAD58, 0xB1B5, 0xAD59, 0x8281, 0xAD5A, 0x8282, 0xAD5B, 0x8283, + 0xAD5C, 0x8284, 0xAD5D, 0x8285, 0xAD5E, 0x8286, 0xAD5F, 0x8287, + 0xAD60, 0x8288, 0xAD61, 0xB1B6, 0xAD62, 0x8289, 0xAD63, 0xB1B7, + 0xAD64, 0x828A, 0xAD65, 0x828B, 0xAD66, 0x828C, 0xAD67, 0x828D, + 0xAD68, 0x828E, 0xAD69, 0x828F, 0xAD6A, 0x8290, 0xAD6B, 0x8291, + 0xAD6C, 0xB1B8, 0xAD6D, 0xB1B9, 0xAD6E, 0x8292, 0xAD6F, 0x8293, + 0xAD70, 0xB1BA, 0xAD71, 0x8294, 0xAD72, 0x8295, 0xAD73, 0xB1BB, + 0xAD74, 0xB1BC, 0xAD75, 0xB1BD, 0xAD76, 0xB1BE, 0xAD77, 0x8296, + 0xAD78, 0x8297, 0xAD79, 0x8298, 0xAD7A, 0x8299, 0xAD7B, 0xB1BF, + 0xAD7C, 0xB1C0, 0xAD7D, 0xB1C1, 0xAD7E, 0x829A, 0xAD7F, 0xB1C2, + 0xAD80, 0x829B, 0xAD81, 0xB1C3, 0xAD82, 0xB1C4, 0xAD83, 0x829C, + 0xAD84, 0x829D, 0xAD85, 0x829E, 0xAD86, 0x829F, 0xAD87, 0x82A0, + 0xAD88, 0xB1C5, 0xAD89, 0xB1C6, 0xAD8A, 0x82A1, 0xAD8B, 0x82A2, + 0xAD8C, 0xB1C7, 0xAD8D, 0x82A3, 0xAD8E, 0x82A4, 0xAD8F, 0x82A5, + 0xAD90, 0xB1C8, 0xAD91, 0x82A6, 0xAD92, 0x82A7, 0xAD93, 0x82A8, + 0xAD94, 0x82A9, 0xAD95, 0x82AA, 0xAD96, 0x82AB, 0xAD97, 0x82AC, + 0xAD98, 0x82AD, 0xAD99, 0x82AE, 0xAD9A, 0x82AF, 0xAD9B, 0x82B0, + 0xAD9C, 0xB1C9, 0xAD9D, 0xB1CA, 0xAD9E, 0x82B1, 0xAD9F, 0x82B2, + 0xADA0, 0x82B3, 0xADA1, 0x82B4, 0xADA2, 0x82B5, 0xADA3, 0x82B6, + 0xADA4, 0xB1CB, 0xADA5, 0x82B7, 0xADA6, 0x82B8, 0xADA7, 0x82B9, + 0xADA8, 0x82BA, 0xADA9, 0x82BB, 0xADAA, 0x82BC, 0xADAB, 0x82BD, + 0xADAC, 0x82BE, 0xADAD, 0x82BF, 0xADAE, 0x82C0, 0xADAF, 0x82C1, + 0xADB0, 0x82C2, 0xADB1, 0x82C3, 0xADB2, 0x82C4, 0xADB3, 0x82C5, + 0xADB4, 0x82C6, 0xADB5, 0x82C7, 0xADB6, 0x82C8, 0xADB7, 0xB1CC, + 0xADB8, 0x82C9, 0xADB9, 0x82CA, 0xADBA, 0x82CB, 0xADBB, 0x82CC, + 0xADBC, 0x82CD, 0xADBD, 0x82CE, 0xADBE, 0x82CF, 0xADBF, 0x82D0, + 0xADC0, 0xB1CD, 0xADC1, 0xB1CE, 0xADC2, 0x82D1, 0xADC3, 0x82D2, + 0xADC4, 0xB1CF, 0xADC5, 0x82D3, 0xADC6, 0x82D4, 0xADC7, 0x82D5, + 0xADC8, 0xB1D0, 0xADC9, 0x82D6, 0xADCA, 0x82D7, 0xADCB, 0x82D8, + 0xADCC, 0x82D9, 0xADCD, 0x82DA, 0xADCE, 0x82DB, 0xADCF, 0x82DC, + 0xADD0, 0xB1D1, 0xADD1, 0xB1D2, 0xADD2, 0x82DD, 0xADD3, 0xB1D3, + 0xADD4, 0x82DE, 0xADD5, 0x82DF, 0xADD6, 0x82E0, 0xADD7, 0x82E1, + 0xADD8, 0x82E2, 0xADD9, 0x82E3, 0xADDA, 0x82E4, 0xADDB, 0x82E5, + 0xADDC, 0xB1D4, 0xADDD, 0x82E6, 0xADDE, 0x82E7, 0xADDF, 0x82E8, + 0xADE0, 0xB1D5, 0xADE1, 0x82E9, 0xADE2, 0x82EA, 0xADE3, 0x82EB, + 0xADE4, 0xB1D6, 0xADE5, 0x82EC, 0xADE6, 0x82ED, 0xADE7, 0x82EE, + 0xADE8, 0x82EF, 0xADE9, 0x82F0, 0xADEA, 0x82F1, 0xADEB, 0x82F2, + 0xADEC, 0x82F3, 0xADED, 0x82F4, 0xADEE, 0x82F5, 0xADEF, 0x82F6, + 0xADF0, 0x82F7, 0xADF1, 0x82F8, 0xADF2, 0x82F9, 0xADF3, 0x82FA, + 0xADF4, 0x82FB, 0xADF5, 0x82FC, 0xADF6, 0x82FD, 0xADF7, 0x82FE, + 0xADF8, 0xB1D7, 0xADF9, 0xB1D8, 0xADFA, 0x8341, 0xADFB, 0x8342, + 0xADFC, 0xB1D9, 0xADFD, 0x8343, 0xADFE, 0x8344, 0xADFF, 0xB1DA, + 0xAE00, 0xB1DB, 0xAE01, 0xB1DC, 0xAE02, 0x8345, 0xAE03, 0x8346, + 0xAE04, 0x8347, 0xAE05, 0x8348, 0xAE06, 0x8349, 0xAE07, 0x834A, + 0xAE08, 0xB1DD, 0xAE09, 0xB1DE, 0xAE0A, 0x834B, 0xAE0B, 0xB1DF, + 0xAE0C, 0x834C, 0xAE0D, 0xB1E0, 0xAE0E, 0x834D, 0xAE0F, 0x834E, + 0xAE10, 0x834F, 0xAE11, 0x8350, 0xAE12, 0x8351, 0xAE13, 0x8352, + 0xAE14, 0xB1E1, 0xAE15, 0x8353, 0xAE16, 0x8354, 0xAE17, 0x8355, + 0xAE18, 0x8356, 0xAE19, 0x8357, 0xAE1A, 0x8358, 0xAE1B, 0x8359, + 0xAE1C, 0x835A, 0xAE1D, 0x8361, 0xAE1E, 0x8362, 0xAE1F, 0x8363, + 0xAE20, 0x8364, 0xAE21, 0x8365, 0xAE22, 0x8366, 0xAE23, 0x8367, + 0xAE24, 0x8368, 0xAE25, 0x8369, 0xAE26, 0x836A, 0xAE27, 0x836B, + 0xAE28, 0x836C, 0xAE29, 0x836D, 0xAE2A, 0x836E, 0xAE2B, 0x836F, + 0xAE2C, 0x8370, 0xAE2D, 0x8371, 0xAE2E, 0x8372, 0xAE2F, 0x8373, + 0xAE30, 0xB1E2, 0xAE31, 0xB1E3, 0xAE32, 0x8374, 0xAE33, 0x8375, + 0xAE34, 0xB1E4, 0xAE35, 0x8376, 0xAE36, 0x8377, 0xAE37, 0xB1E5, + 0xAE38, 0xB1E6, 0xAE39, 0x8378, 0xAE3A, 0xB1E7, 0xAE3B, 0x8379, + 0xAE3C, 0x837A, 0xAE3D, 0x8381, 0xAE3E, 0x8382, 0xAE3F, 0x8383, + 0xAE40, 0xB1E8, 0xAE41, 0xB1E9, 0xAE42, 0x8384, 0xAE43, 0xB1EA, + 0xAE44, 0x8385, 0xAE45, 0xB1EB, 0xAE46, 0xB1EC, 0xAE47, 0x8386, + 0xAE48, 0x8387, 0xAE49, 0x8388, 0xAE4A, 0xB1ED, 0xAE4B, 0x8389, + 0xAE4C, 0xB1EE, 0xAE4D, 0xB1EF, 0xAE4E, 0xB1F0, 0xAE4F, 0x838A, + 0xAE50, 0xB1F1, 0xAE51, 0x838B, 0xAE52, 0x838C, 0xAE53, 0x838D, + 0xAE54, 0xB1F2, 0xAE55, 0x838E, 0xAE56, 0xB1F3, 0xAE57, 0x838F, + 0xAE58, 0x8390, 0xAE59, 0x8391, 0xAE5A, 0x8392, 0xAE5B, 0x8393, + 0xAE5C, 0xB1F4, 0xAE5D, 0xB1F5, 0xAE5E, 0x8394, 0xAE5F, 0xB1F6, + 0xAE60, 0xB1F7, 0xAE61, 0xB1F8, 0xAE62, 0x8395, 0xAE63, 0x8396, + 0xAE64, 0x8397, 0xAE65, 0xB1F9, 0xAE66, 0x8398, 0xAE67, 0x8399, + 0xAE68, 0xB1FA, 0xAE69, 0xB1FB, 0xAE6A, 0x839A, 0xAE6B, 0x839B, + 0xAE6C, 0xB1FC, 0xAE6D, 0x839C, 0xAE6E, 0x839D, 0xAE6F, 0x839E, + 0xAE70, 0xB1FD, 0xAE71, 0x839F, 0xAE72, 0x83A0, 0xAE73, 0x83A1, + 0xAE74, 0x83A2, 0xAE75, 0x83A3, 0xAE76, 0x83A4, 0xAE77, 0x83A5, + 0xAE78, 0xB1FE, 0xAE79, 0xB2A1, 0xAE7A, 0x83A6, 0xAE7B, 0xB2A2, + 0xAE7C, 0xB2A3, 0xAE7D, 0xB2A4, 0xAE7E, 0x83A7, 0xAE7F, 0x83A8, + 0xAE80, 0x83A9, 0xAE81, 0x83AA, 0xAE82, 0x83AB, 0xAE83, 0x83AC, + 0xAE84, 0xB2A5, 0xAE85, 0xB2A6, 0xAE86, 0x83AD, 0xAE87, 0x83AE, + 0xAE88, 0x83AF, 0xAE89, 0x83B0, 0xAE8A, 0x83B1, 0xAE8B, 0x83B2, + 0xAE8C, 0xB2A7, 0xAE8D, 0x83B3, 0xAE8E, 0x83B4, 0xAE8F, 0x83B5, + 0xAE90, 0x83B6, 0xAE91, 0x83B7, 0xAE92, 0x83B8, 0xAE93, 0x83B9, + 0xAE94, 0x83BA, 0xAE95, 0x83BB, 0xAE96, 0x83BC, 0xAE97, 0x83BD, + 0xAE98, 0x83BE, 0xAE99, 0x83BF, 0xAE9A, 0x83C0, 0xAE9B, 0x83C1, + 0xAE9C, 0x83C2, 0xAE9D, 0x83C3, 0xAE9E, 0x83C4, 0xAE9F, 0x83C5, + 0xAEA0, 0x83C6, 0xAEA1, 0x83C7, 0xAEA2, 0x83C8, 0xAEA3, 0x83C9, + 0xAEA4, 0x83CA, 0xAEA5, 0x83CB, 0xAEA6, 0x83CC, 0xAEA7, 0x83CD, + 0xAEA8, 0x83CE, 0xAEA9, 0x83CF, 0xAEAA, 0x83D0, 0xAEAB, 0x83D1, + 0xAEAC, 0x83D2, 0xAEAD, 0x83D3, 0xAEAE, 0x83D4, 0xAEAF, 0x83D5, + 0xAEB0, 0x83D6, 0xAEB1, 0x83D7, 0xAEB2, 0x83D8, 0xAEB3, 0x83D9, + 0xAEB4, 0x83DA, 0xAEB5, 0x83DB, 0xAEB6, 0x83DC, 0xAEB7, 0x83DD, + 0xAEB8, 0x83DE, 0xAEB9, 0x83DF, 0xAEBA, 0x83E0, 0xAEBB, 0x83E1, + 0xAEBC, 0xB2A8, 0xAEBD, 0xB2A9, 0xAEBE, 0xB2AA, 0xAEBF, 0x83E2, + 0xAEC0, 0xB2AB, 0xAEC1, 0x83E3, 0xAEC2, 0x83E4, 0xAEC3, 0x83E5, + 0xAEC4, 0xB2AC, 0xAEC5, 0x83E6, 0xAEC6, 0x83E7, 0xAEC7, 0x83E8, + 0xAEC8, 0x83E9, 0xAEC9, 0x83EA, 0xAECA, 0x83EB, 0xAECB, 0x83EC, + 0xAECC, 0xB2AD, 0xAECD, 0xB2AE, 0xAECE, 0x83ED, 0xAECF, 0xB2AF, + 0xAED0, 0xB2B0, 0xAED1, 0xB2B1, 0xAED2, 0x83EE, 0xAED3, 0x83EF, + 0xAED4, 0x83F0, 0xAED5, 0x83F1, 0xAED6, 0x83F2, 0xAED7, 0x83F3, + 0xAED8, 0xB2B2, 0xAED9, 0xB2B3, 0xAEDA, 0x83F4, 0xAEDB, 0x83F5, + 0xAEDC, 0xB2B4, 0xAEDD, 0x83F6, 0xAEDE, 0x83F7, 0xAEDF, 0x83F8, + 0xAEE0, 0x83F9, 0xAEE1, 0x83FA, 0xAEE2, 0x83FB, 0xAEE3, 0x83FC, + 0xAEE4, 0x83FD, 0xAEE5, 0x83FE, 0xAEE6, 0x8441, 0xAEE7, 0x8442, + 0xAEE8, 0xB2B5, 0xAEE9, 0x8443, 0xAEEA, 0x8444, 0xAEEB, 0xB2B6, + 0xAEEC, 0x8445, 0xAEED, 0xB2B7, 0xAEEE, 0x8446, 0xAEEF, 0x8447, + 0xAEF0, 0x8448, 0xAEF1, 0x8449, 0xAEF2, 0x844A, 0xAEF3, 0x844B, + 0xAEF4, 0xB2B8, 0xAEF5, 0x844C, 0xAEF6, 0x844D, 0xAEF7, 0x844E, + 0xAEF8, 0xB2B9, 0xAEF9, 0x844F, 0xAEFA, 0x8450, 0xAEFB, 0x8451, + 0xAEFC, 0xB2BA, 0xAEFD, 0x8452, 0xAEFE, 0x8453, 0xAEFF, 0x8454, + 0xAF00, 0x8455, 0xAF01, 0x8456, 0xAF02, 0x8457, 0xAF03, 0x8458, + 0xAF04, 0x8459, 0xAF05, 0x845A, 0xAF06, 0x8461, 0xAF07, 0xB2BB, + 0xAF08, 0xB2BC, 0xAF09, 0x8462, 0xAF0A, 0x8463, 0xAF0B, 0x8464, + 0xAF0C, 0x8465, 0xAF0D, 0xB2BD, 0xAF0E, 0x8466, 0xAF0F, 0x8467, + 0xAF10, 0xB2BE, 0xAF11, 0x8468, 0xAF12, 0x8469, 0xAF13, 0x846A, + 0xAF14, 0x846B, 0xAF15, 0x846C, 0xAF16, 0x846D, 0xAF17, 0x846E, + 0xAF18, 0x846F, 0xAF19, 0x8470, 0xAF1A, 0x8471, 0xAF1B, 0x8472, + 0xAF1C, 0x8473, 0xAF1D, 0x8474, 0xAF1E, 0x8475, 0xAF1F, 0x8476, + 0xAF20, 0x8477, 0xAF21, 0x8478, 0xAF22, 0x8479, 0xAF23, 0x847A, + 0xAF24, 0x8481, 0xAF25, 0x8482, 0xAF26, 0x8483, 0xAF27, 0x8484, + 0xAF28, 0x8485, 0xAF29, 0x8486, 0xAF2A, 0x8487, 0xAF2B, 0x8488, + 0xAF2C, 0xB2BF, 0xAF2D, 0xB2C0, 0xAF2E, 0x8489, 0xAF2F, 0x848A, + 0xAF30, 0xB2C1, 0xAF31, 0x848B, 0xAF32, 0xB2C2, 0xAF33, 0x848C, + 0xAF34, 0xB2C3, 0xAF35, 0x848D, 0xAF36, 0x848E, 0xAF37, 0x848F, + 0xAF38, 0x8490, 0xAF39, 0x8491, 0xAF3A, 0x8492, 0xAF3B, 0x8493, + 0xAF3C, 0xB2C4, 0xAF3D, 0xB2C5, 0xAF3E, 0x8494, 0xAF3F, 0xB2C6, + 0xAF40, 0x8495, 0xAF41, 0xB2C7, 0xAF42, 0xB2C8, 0xAF43, 0xB2C9, + 0xAF44, 0x8496, 0xAF45, 0x8497, 0xAF46, 0x8498, 0xAF47, 0x8499, + 0xAF48, 0xB2CA, 0xAF49, 0xB2CB, 0xAF4A, 0x849A, 0xAF4B, 0x849B, + 0xAF4C, 0x849C, 0xAF4D, 0x849D, 0xAF4E, 0x849E, 0xAF4F, 0x849F, + 0xAF50, 0xB2CC, 0xAF51, 0x84A0, 0xAF52, 0x84A1, 0xAF53, 0x84A2, + 0xAF54, 0x84A3, 0xAF55, 0x84A4, 0xAF56, 0x84A5, 0xAF57, 0x84A6, + 0xAF58, 0x84A7, 0xAF59, 0x84A8, 0xAF5A, 0x84A9, 0xAF5B, 0x84AA, + 0xAF5C, 0xB2CD, 0xAF5D, 0xB2CE, 0xAF5E, 0x84AB, 0xAF5F, 0x84AC, + 0xAF60, 0x84AD, 0xAF61, 0x84AE, 0xAF62, 0x84AF, 0xAF63, 0x84B0, + 0xAF64, 0xB2CF, 0xAF65, 0xB2D0, 0xAF66, 0x84B1, 0xAF67, 0x84B2, + 0xAF68, 0x84B3, 0xAF69, 0x84B4, 0xAF6A, 0x84B5, 0xAF6B, 0x84B6, + 0xAF6C, 0x84B7, 0xAF6D, 0x84B8, 0xAF6E, 0x84B9, 0xAF6F, 0x84BA, + 0xAF70, 0x84BB, 0xAF71, 0x84BC, 0xAF72, 0x84BD, 0xAF73, 0x84BE, + 0xAF74, 0x84BF, 0xAF75, 0x84C0, 0xAF76, 0x84C1, 0xAF77, 0x84C2, + 0xAF78, 0x84C3, 0xAF79, 0xB2D1, 0xAF7A, 0x84C4, 0xAF7B, 0x84C5, + 0xAF7C, 0x84C6, 0xAF7D, 0x84C7, 0xAF7E, 0x84C8, 0xAF7F, 0x84C9, + 0xAF80, 0xB2D2, 0xAF81, 0x84CA, 0xAF82, 0x84CB, 0xAF83, 0x84CC, + 0xAF84, 0xB2D3, 0xAF85, 0x84CD, 0xAF86, 0x84CE, 0xAF87, 0x84CF, + 0xAF88, 0xB2D4, 0xAF89, 0x84D0, 0xAF8A, 0x84D1, 0xAF8B, 0x84D2, + 0xAF8C, 0x84D3, 0xAF8D, 0x84D4, 0xAF8E, 0x84D5, 0xAF8F, 0x84D6, + 0xAF90, 0xB2D5, 0xAF91, 0xB2D6, 0xAF92, 0x84D7, 0xAF93, 0x84D8, + 0xAF94, 0x84D9, 0xAF95, 0xB2D7, 0xAF96, 0x84DA, 0xAF97, 0x84DB, + 0xAF98, 0x84DC, 0xAF99, 0x84DD, 0xAF9A, 0x84DE, 0xAF9B, 0x84DF, + 0xAF9C, 0xB2D8, 0xAF9D, 0x84E0, 0xAF9E, 0x84E1, 0xAF9F, 0x84E2, + 0xAFA0, 0x84E3, 0xAFA1, 0x84E4, 0xAFA2, 0x84E5, 0xAFA3, 0x84E6, + 0xAFA4, 0x84E7, 0xAFA5, 0x84E8, 0xAFA6, 0x84E9, 0xAFA7, 0x84EA, + 0xAFA8, 0x84EB, 0xAFA9, 0x84EC, 0xAFAA, 0x84ED, 0xAFAB, 0x84EE, + 0xAFAC, 0x84EF, 0xAFAD, 0x84F0, 0xAFAE, 0x84F1, 0xAFAF, 0x84F2, + 0xAFB0, 0x84F3, 0xAFB1, 0x84F4, 0xAFB2, 0x84F5, 0xAFB3, 0x84F6, + 0xAFB4, 0x84F7, 0xAFB5, 0x84F8, 0xAFB6, 0x84F9, 0xAFB7, 0x84FA, + 0xAFB8, 0xB2D9, 0xAFB9, 0xB2DA, 0xAFBA, 0x84FB, 0xAFBB, 0x84FC, + 0xAFBC, 0xB2DB, 0xAFBD, 0x84FD, 0xAFBE, 0x84FE, 0xAFBF, 0x8541, + 0xAFC0, 0xB2DC, 0xAFC1, 0x8542, 0xAFC2, 0x8543, 0xAFC3, 0x8544, + 0xAFC4, 0x8545, 0xAFC5, 0x8546, 0xAFC6, 0x8547, 0xAFC7, 0xB2DD, + 0xAFC8, 0xB2DE, 0xAFC9, 0xB2DF, 0xAFCA, 0x8548, 0xAFCB, 0xB2E0, + 0xAFCC, 0x8549, 0xAFCD, 0xB2E1, 0xAFCE, 0xB2E2, 0xAFCF, 0x854A, + 0xAFD0, 0x854B, 0xAFD1, 0x854C, 0xAFD2, 0x854D, 0xAFD3, 0x854E, + 0xAFD4, 0xB2E3, 0xAFD5, 0x854F, 0xAFD6, 0x8550, 0xAFD7, 0x8551, + 0xAFD8, 0x8552, 0xAFD9, 0x8553, 0xAFDA, 0x8554, 0xAFDB, 0x8555, + 0xAFDC, 0xB2E4, 0xAFDD, 0x8556, 0xAFDE, 0x8557, 0xAFDF, 0x8558, + 0xAFE0, 0x8559, 0xAFE1, 0x855A, 0xAFE2, 0x8561, 0xAFE3, 0x8562, + 0xAFE4, 0x8563, 0xAFE5, 0x8564, 0xAFE6, 0x8565, 0xAFE7, 0x8566, + 0xAFE8, 0xB2E5, 0xAFE9, 0xB2E6, 0xAFEA, 0x8567, 0xAFEB, 0x8568, + 0xAFEC, 0x8569, 0xAFED, 0x856A, 0xAFEE, 0x856B, 0xAFEF, 0x856C, + 0xAFF0, 0xB2E7, 0xAFF1, 0xB2E8, 0xAFF2, 0x856D, 0xAFF3, 0x856E, + 0xAFF4, 0xB2E9, 0xAFF5, 0x856F, 0xAFF6, 0x8570, 0xAFF7, 0x8571, + 0xAFF8, 0xB2EA, 0xAFF9, 0x8572, 0xAFFA, 0x8573, 0xAFFB, 0x8574, + 0xAFFC, 0x8575, 0xAFFD, 0x8576, 0xAFFE, 0x8577, 0xAFFF, 0x8578, + 0xB000, 0xB2EB, 0xB001, 0xB2EC, 0xB002, 0x8579, 0xB003, 0x857A, + 0xB004, 0xB2ED, 0xB005, 0x8581, 0xB006, 0x8582, 0xB007, 0x8583, + 0xB008, 0x8584, 0xB009, 0x8585, 0xB00A, 0x8586, 0xB00B, 0x8587, + 0xB00C, 0xB2EE, 0xB00D, 0x8588, 0xB00E, 0x8589, 0xB00F, 0x858A, + 0xB010, 0xB2EF, 0xB011, 0x858B, 0xB012, 0x858C, 0xB013, 0x858D, + 0xB014, 0xB2F0, 0xB015, 0x858E, 0xB016, 0x858F, 0xB017, 0x8590, + 0xB018, 0x8591, 0xB019, 0x8592, 0xB01A, 0x8593, 0xB01B, 0x8594, + 0xB01C, 0xB2F1, 0xB01D, 0xB2F2, 0xB01E, 0x8595, 0xB01F, 0x8596, + 0xB020, 0x8597, 0xB021, 0x8598, 0xB022, 0x8599, 0xB023, 0x859A, + 0xB024, 0x859B, 0xB025, 0x859C, 0xB026, 0x859D, 0xB027, 0x859E, + 0xB028, 0xB2F3, 0xB029, 0x859F, 0xB02A, 0x85A0, 0xB02B, 0x85A1, + 0xB02C, 0x85A2, 0xB02D, 0x85A3, 0xB02E, 0x85A4, 0xB02F, 0x85A5, + 0xB030, 0x85A6, 0xB031, 0x85A7, 0xB032, 0x85A8, 0xB033, 0x85A9, + 0xB034, 0x85AA, 0xB035, 0x85AB, 0xB036, 0x85AC, 0xB037, 0x85AD, + 0xB038, 0x85AE, 0xB039, 0x85AF, 0xB03A, 0x85B0, 0xB03B, 0x85B1, + 0xB03C, 0x85B2, 0xB03D, 0x85B3, 0xB03E, 0x85B4, 0xB03F, 0x85B5, + 0xB040, 0x85B6, 0xB041, 0x85B7, 0xB042, 0x85B8, 0xB043, 0x85B9, + 0xB044, 0xB2F4, 0xB045, 0xB2F5, 0xB046, 0x85BA, 0xB047, 0x85BB, + 0xB048, 0xB2F6, 0xB049, 0x85BC, 0xB04A, 0xB2F7, 0xB04B, 0x85BD, + 0xB04C, 0xB2F8, 0xB04D, 0x85BE, 0xB04E, 0xB2F9, 0xB04F, 0x85BF, + 0xB050, 0x85C0, 0xB051, 0x85C1, 0xB052, 0x85C2, 0xB053, 0xB2FA, + 0xB054, 0xB2FB, 0xB055, 0xB2FC, 0xB056, 0x85C3, 0xB057, 0xB2FD, + 0xB058, 0x85C4, 0xB059, 0xB2FE, 0xB05A, 0x85C5, 0xB05B, 0x85C6, + 0xB05C, 0x85C7, 0xB05D, 0xB3A1, 0xB05E, 0x85C8, 0xB05F, 0x85C9, + 0xB060, 0x85CA, 0xB061, 0x85CB, 0xB062, 0x85CC, 0xB063, 0x85CD, + 0xB064, 0x85CE, 0xB065, 0x85CF, 0xB066, 0x85D0, 0xB067, 0x85D1, + 0xB068, 0x85D2, 0xB069, 0x85D3, 0xB06A, 0x85D4, 0xB06B, 0x85D5, + 0xB06C, 0x85D6, 0xB06D, 0x85D7, 0xB06E, 0x85D8, 0xB06F, 0x85D9, + 0xB070, 0x85DA, 0xB071, 0x85DB, 0xB072, 0x85DC, 0xB073, 0x85DD, + 0xB074, 0x85DE, 0xB075, 0x85DF, 0xB076, 0x85E0, 0xB077, 0x85E1, + 0xB078, 0x85E2, 0xB079, 0x85E3, 0xB07A, 0x85E4, 0xB07B, 0x85E5, + 0xB07C, 0xB3A2, 0xB07D, 0xB3A3, 0xB07E, 0x85E6, 0xB07F, 0x85E7, + 0xB080, 0xB3A4, 0xB081, 0x85E8, 0xB082, 0x85E9, 0xB083, 0x85EA, + 0xB084, 0xB3A5, 0xB085, 0x85EB, 0xB086, 0x85EC, 0xB087, 0x85ED, + 0xB088, 0x85EE, 0xB089, 0x85EF, 0xB08A, 0x85F0, 0xB08B, 0x85F1, + 0xB08C, 0xB3A6, 0xB08D, 0xB3A7, 0xB08E, 0x85F2, 0xB08F, 0xB3A8, + 0xB090, 0x85F3, 0xB091, 0xB3A9, 0xB092, 0x85F4, 0xB093, 0x85F5, + 0xB094, 0x85F6, 0xB095, 0x85F7, 0xB096, 0x85F8, 0xB097, 0x85F9, + 0xB098, 0xB3AA, 0xB099, 0xB3AB, 0xB09A, 0xB3AC, 0xB09B, 0x85FA, + 0xB09C, 0xB3AD, 0xB09D, 0x85FB, 0xB09E, 0x85FC, 0xB09F, 0xB3AE, + 0xB0A0, 0xB3AF, 0xB0A1, 0xB3B0, 0xB0A2, 0xB3B1, 0xB0A3, 0x85FD, + 0xB0A4, 0x85FE, 0xB0A5, 0x8641, 0xB0A6, 0x8642, 0xB0A7, 0x8643, + 0xB0A8, 0xB3B2, 0xB0A9, 0xB3B3, 0xB0AA, 0x8644, 0xB0AB, 0xB3B4, + 0xB0AC, 0xB3B5, 0xB0AD, 0xB3B6, 0xB0AE, 0xB3B7, 0xB0AF, 0xB3B8, + 0xB0B0, 0x8645, 0xB0B1, 0xB3B9, 0xB0B2, 0x8646, 0xB0B3, 0xB3BA, + 0xB0B4, 0xB3BB, 0xB0B5, 0xB3BC, 0xB0B6, 0x8647, 0xB0B7, 0x8648, + 0xB0B8, 0xB3BD, 0xB0B9, 0x8649, 0xB0BA, 0x864A, 0xB0BB, 0x864B, + 0xB0BC, 0xB3BE, 0xB0BD, 0x864C, 0xB0BE, 0x864D, 0xB0BF, 0x864E, + 0xB0C0, 0x864F, 0xB0C1, 0x8650, 0xB0C2, 0x8651, 0xB0C3, 0x8652, + 0xB0C4, 0xB3BF, 0xB0C5, 0xB3C0, 0xB0C6, 0x8653, 0xB0C7, 0xB3C1, + 0xB0C8, 0xB3C2, 0xB0C9, 0xB3C3, 0xB0CA, 0x8654, 0xB0CB, 0x8655, + 0xB0CC, 0x8656, 0xB0CD, 0x8657, 0xB0CE, 0x8658, 0xB0CF, 0x8659, + 0xB0D0, 0xB3C4, 0xB0D1, 0xB3C5, 0xB0D2, 0x865A, 0xB0D3, 0x8661, + 0xB0D4, 0xB3C6, 0xB0D5, 0x8662, 0xB0D6, 0x8663, 0xB0D7, 0x8664, + 0xB0D8, 0xB3C7, 0xB0D9, 0x8665, 0xB0DA, 0x8666, 0xB0DB, 0x8667, + 0xB0DC, 0x8668, 0xB0DD, 0x8669, 0xB0DE, 0x866A, 0xB0DF, 0x866B, + 0xB0E0, 0xB3C8, 0xB0E1, 0x866C, 0xB0E2, 0x866D, 0xB0E3, 0x866E, + 0xB0E4, 0x866F, 0xB0E5, 0xB3C9, 0xB0E6, 0x8670, 0xB0E7, 0x8671, + 0xB0E8, 0x8672, 0xB0E9, 0x8673, 0xB0EA, 0x8674, 0xB0EB, 0x8675, + 0xB0EC, 0x8676, 0xB0ED, 0x8677, 0xB0EE, 0x8678, 0xB0EF, 0x8679, + 0xB0F0, 0x867A, 0xB0F1, 0x8681, 0xB0F2, 0x8682, 0xB0F3, 0x8683, + 0xB0F4, 0x8684, 0xB0F5, 0x8685, 0xB0F6, 0x8686, 0xB0F7, 0x8687, + 0xB0F8, 0x8688, 0xB0F9, 0x8689, 0xB0FA, 0x868A, 0xB0FB, 0x868B, + 0xB0FC, 0x868C, 0xB0FD, 0x868D, 0xB0FE, 0x868E, 0xB0FF, 0x868F, + 0xB100, 0x8690, 0xB101, 0x8691, 0xB102, 0x8692, 0xB103, 0x8693, + 0xB104, 0x8694, 0xB105, 0x8695, 0xB106, 0x8696, 0xB107, 0x8697, + 0xB108, 0xB3CA, 0xB109, 0xB3CB, 0xB10A, 0x8698, 0xB10B, 0xB3CC, + 0xB10C, 0xB3CD, 0xB10D, 0x8699, 0xB10E, 0x869A, 0xB10F, 0x869B, + 0xB110, 0xB3CE, 0xB111, 0x869C, 0xB112, 0xB3CF, 0xB113, 0xB3D0, + 0xB114, 0x869D, 0xB115, 0x869E, 0xB116, 0x869F, 0xB117, 0x86A0, + 0xB118, 0xB3D1, 0xB119, 0xB3D2, 0xB11A, 0x86A1, 0xB11B, 0xB3D3, + 0xB11C, 0xB3D4, 0xB11D, 0xB3D5, 0xB11E, 0x86A2, 0xB11F, 0x86A3, + 0xB120, 0x86A4, 0xB121, 0x86A5, 0xB122, 0x86A6, 0xB123, 0xB3D6, + 0xB124, 0xB3D7, 0xB125, 0xB3D8, 0xB126, 0x86A7, 0xB127, 0x86A8, + 0xB128, 0xB3D9, 0xB129, 0x86A9, 0xB12A, 0x86AA, 0xB12B, 0x86AB, + 0xB12C, 0xB3DA, 0xB12D, 0x86AC, 0xB12E, 0x86AD, 0xB12F, 0x86AE, + 0xB130, 0x86AF, 0xB131, 0x86B0, 0xB132, 0x86B1, 0xB133, 0x86B2, + 0xB134, 0xB3DB, 0xB135, 0xB3DC, 0xB136, 0x86B3, 0xB137, 0xB3DD, + 0xB138, 0xB3DE, 0xB139, 0xB3DF, 0xB13A, 0x86B4, 0xB13B, 0x86B5, + 0xB13C, 0x86B6, 0xB13D, 0x86B7, 0xB13E, 0x86B8, 0xB13F, 0x86B9, + 0xB140, 0xB3E0, 0xB141, 0xB3E1, 0xB142, 0x86BA, 0xB143, 0x86BB, + 0xB144, 0xB3E2, 0xB145, 0x86BC, 0xB146, 0x86BD, 0xB147, 0x86BE, + 0xB148, 0xB3E3, 0xB149, 0x86BF, 0xB14A, 0x86C0, 0xB14B, 0x86C1, + 0xB14C, 0x86C2, 0xB14D, 0x86C3, 0xB14E, 0x86C4, 0xB14F, 0x86C5, + 0xB150, 0xB3E4, 0xB151, 0xB3E5, 0xB152, 0x86C6, 0xB153, 0x86C7, + 0xB154, 0xB3E6, 0xB155, 0xB3E7, 0xB156, 0x86C8, 0xB157, 0x86C9, + 0xB158, 0xB3E8, 0xB159, 0x86CA, 0xB15A, 0x86CB, 0xB15B, 0x86CC, + 0xB15C, 0xB3E9, 0xB15D, 0x86CD, 0xB15E, 0x86CE, 0xB15F, 0x86CF, + 0xB160, 0xB3EA, 0xB161, 0x86D0, 0xB162, 0x86D1, 0xB163, 0x86D2, + 0xB164, 0x86D3, 0xB165, 0x86D4, 0xB166, 0x86D5, 0xB167, 0x86D6, + 0xB168, 0x86D7, 0xB169, 0x86D8, 0xB16A, 0x86D9, 0xB16B, 0x86DA, + 0xB16C, 0x86DB, 0xB16D, 0x86DC, 0xB16E, 0x86DD, 0xB16F, 0x86DE, + 0xB170, 0x86DF, 0xB171, 0x86E0, 0xB172, 0x86E1, 0xB173, 0x86E2, + 0xB174, 0x86E3, 0xB175, 0x86E4, 0xB176, 0x86E5, 0xB177, 0x86E6, + 0xB178, 0xB3EB, 0xB179, 0xB3EC, 0xB17A, 0x86E7, 0xB17B, 0x86E8, + 0xB17C, 0xB3ED, 0xB17D, 0x86E9, 0xB17E, 0x86EA, 0xB17F, 0x86EB, + 0xB180, 0xB3EE, 0xB181, 0x86EC, 0xB182, 0xB3EF, 0xB183, 0x86ED, + 0xB184, 0x86EE, 0xB185, 0x86EF, 0xB186, 0x86F0, 0xB187, 0x86F1, + 0xB188, 0xB3F0, 0xB189, 0xB3F1, 0xB18A, 0x86F2, 0xB18B, 0xB3F2, + 0xB18C, 0x86F3, 0xB18D, 0xB3F3, 0xB18E, 0x86F4, 0xB18F, 0x86F5, + 0xB190, 0x86F6, 0xB191, 0x86F7, 0xB192, 0xB3F4, 0xB193, 0xB3F5, + 0xB194, 0xB3F6, 0xB195, 0x86F8, 0xB196, 0x86F9, 0xB197, 0x86FA, + 0xB198, 0xB3F7, 0xB199, 0x86FB, 0xB19A, 0x86FC, 0xB19B, 0x86FD, + 0xB19C, 0xB3F8, 0xB19D, 0x86FE, 0xB19E, 0x8741, 0xB19F, 0x8742, + 0xB1A0, 0x8743, 0xB1A1, 0x8744, 0xB1A2, 0x8745, 0xB1A3, 0x8746, + 0xB1A4, 0x8747, 0xB1A5, 0x8748, 0xB1A6, 0x8749, 0xB1A7, 0x874A, + 0xB1A8, 0xB3F9, 0xB1A9, 0x874B, 0xB1AA, 0x874C, 0xB1AB, 0x874D, + 0xB1AC, 0x874E, 0xB1AD, 0x874F, 0xB1AE, 0x8750, 0xB1AF, 0x8751, + 0xB1B0, 0x8752, 0xB1B1, 0x8753, 0xB1B2, 0x8754, 0xB1B3, 0x8755, + 0xB1B4, 0x8756, 0xB1B5, 0x8757, 0xB1B6, 0x8758, 0xB1B7, 0x8759, + 0xB1B8, 0x875A, 0xB1B9, 0x8761, 0xB1BA, 0x8762, 0xB1BB, 0x8763, + 0xB1BC, 0x8764, 0xB1BD, 0x8765, 0xB1BE, 0x8766, 0xB1BF, 0x8767, + 0xB1C0, 0x8768, 0xB1C1, 0x8769, 0xB1C2, 0x876A, 0xB1C3, 0x876B, + 0xB1C4, 0x876C, 0xB1C5, 0x876D, 0xB1C6, 0x876E, 0xB1C7, 0x876F, + 0xB1C8, 0x8770, 0xB1C9, 0x8771, 0xB1CA, 0x8772, 0xB1CB, 0x8773, + 0xB1CC, 0xB3FA, 0xB1CD, 0x8774, 0xB1CE, 0x8775, 0xB1CF, 0x8776, + 0xB1D0, 0xB3FB, 0xB1D1, 0x8777, 0xB1D2, 0x8778, 0xB1D3, 0x8779, + 0xB1D4, 0xB3FC, 0xB1D5, 0x877A, 0xB1D6, 0x8781, 0xB1D7, 0x8782, + 0xB1D8, 0x8783, 0xB1D9, 0x8784, 0xB1DA, 0x8785, 0xB1DB, 0x8786, + 0xB1DC, 0xB3FD, 0xB1DD, 0xB3FE, 0xB1DE, 0x8787, 0xB1DF, 0xB4A1, + 0xB1E0, 0x8788, 0xB1E1, 0x8789, 0xB1E2, 0x878A, 0xB1E3, 0x878B, + 0xB1E4, 0x878C, 0xB1E5, 0x878D, 0xB1E6, 0x878E, 0xB1E7, 0x878F, + 0xB1E8, 0xB4A2, 0xB1E9, 0xB4A3, 0xB1EA, 0x8790, 0xB1EB, 0x8791, + 0xB1EC, 0xB4A4, 0xB1ED, 0x8792, 0xB1EE, 0x8793, 0xB1EF, 0x8794, + 0xB1F0, 0xB4A5, 0xB1F1, 0x8795, 0xB1F2, 0x8796, 0xB1F3, 0x8797, + 0xB1F4, 0x8798, 0xB1F5, 0x8799, 0xB1F6, 0x879A, 0xB1F7, 0x879B, + 0xB1F8, 0x879C, 0xB1F9, 0xB4A6, 0xB1FA, 0x879D, 0xB1FB, 0xB4A7, + 0xB1FC, 0x879E, 0xB1FD, 0xB4A8, 0xB1FE, 0x879F, 0xB1FF, 0x87A0, + 0xB200, 0x87A1, 0xB201, 0x87A2, 0xB202, 0x87A3, 0xB203, 0x87A4, + 0xB204, 0xB4A9, 0xB205, 0xB4AA, 0xB206, 0x87A5, 0xB207, 0x87A6, + 0xB208, 0xB4AB, 0xB209, 0x87A7, 0xB20A, 0x87A8, 0xB20B, 0xB4AC, + 0xB20C, 0xB4AD, 0xB20D, 0x87A9, 0xB20E, 0x87AA, 0xB20F, 0x87AB, + 0xB210, 0x87AC, 0xB211, 0x87AD, 0xB212, 0x87AE, 0xB213, 0x87AF, + 0xB214, 0xB4AE, 0xB215, 0xB4AF, 0xB216, 0x87B0, 0xB217, 0xB4B0, + 0xB218, 0x87B1, 0xB219, 0xB4B1, 0xB21A, 0x87B2, 0xB21B, 0x87B3, + 0xB21C, 0x87B4, 0xB21D, 0x87B5, 0xB21E, 0x87B6, 0xB21F, 0x87B7, + 0xB220, 0xB4B2, 0xB221, 0x87B8, 0xB222, 0x87B9, 0xB223, 0x87BA, + 0xB224, 0x87BB, 0xB225, 0x87BC, 0xB226, 0x87BD, 0xB227, 0x87BE, + 0xB228, 0x87BF, 0xB229, 0x87C0, 0xB22A, 0x87C1, 0xB22B, 0x87C2, + 0xB22C, 0x87C3, 0xB22D, 0x87C4, 0xB22E, 0x87C5, 0xB22F, 0x87C6, + 0xB230, 0x87C7, 0xB231, 0x87C8, 0xB232, 0x87C9, 0xB233, 0x87CA, + 0xB234, 0xB4B3, 0xB235, 0x87CB, 0xB236, 0x87CC, 0xB237, 0x87CD, + 0xB238, 0x87CE, 0xB239, 0x87CF, 0xB23A, 0x87D0, 0xB23B, 0x87D1, + 0xB23C, 0xB4B4, 0xB23D, 0x87D2, 0xB23E, 0x87D3, 0xB23F, 0x87D4, + 0xB240, 0x87D5, 0xB241, 0x87D6, 0xB242, 0x87D7, 0xB243, 0x87D8, + 0xB244, 0x87D9, 0xB245, 0x87DA, 0xB246, 0x87DB, 0xB247, 0x87DC, + 0xB248, 0x87DD, 0xB249, 0x87DE, 0xB24A, 0x87DF, 0xB24B, 0x87E0, + 0xB24C, 0x87E1, 0xB24D, 0x87E2, 0xB24E, 0x87E3, 0xB24F, 0x87E4, + 0xB250, 0x87E5, 0xB251, 0x87E6, 0xB252, 0x87E7, 0xB253, 0x87E8, + 0xB254, 0x87E9, 0xB255, 0x87EA, 0xB256, 0x87EB, 0xB257, 0x87EC, + 0xB258, 0xB4B5, 0xB259, 0x87ED, 0xB25A, 0x87EE, 0xB25B, 0x87EF, + 0xB25C, 0xB4B6, 0xB25D, 0x87F0, 0xB25E, 0x87F1, 0xB25F, 0x87F2, + 0xB260, 0xB4B7, 0xB261, 0x87F3, 0xB262, 0x87F4, 0xB263, 0x87F5, + 0xB264, 0x87F6, 0xB265, 0x87F7, 0xB266, 0x87F8, 0xB267, 0x87F9, + 0xB268, 0xB4B8, 0xB269, 0xB4B9, 0xB26A, 0x87FA, 0xB26B, 0x87FB, + 0xB26C, 0x87FC, 0xB26D, 0x87FD, 0xB26E, 0x87FE, 0xB26F, 0x8841, + 0xB270, 0x8842, 0xB271, 0x8843, 0xB272, 0x8844, 0xB273, 0x8845, + 0xB274, 0xB4BA, 0xB275, 0xB4BB, 0xB276, 0x8846, 0xB277, 0x8847, + 0xB278, 0x8848, 0xB279, 0x8849, 0xB27A, 0x884A, 0xB27B, 0x884B, + 0xB27C, 0xB4BC, 0xB27D, 0x884C, 0xB27E, 0x884D, 0xB27F, 0x884E, + 0xB280, 0x884F, 0xB281, 0x8850, 0xB282, 0x8851, 0xB283, 0x8852, + 0xB284, 0xB4BD, 0xB285, 0xB4BE, 0xB286, 0x8853, 0xB287, 0x8854, + 0xB288, 0x8855, 0xB289, 0xB4BF, 0xB28A, 0x8856, 0xB28B, 0x8857, + 0xB28C, 0x8858, 0xB28D, 0x8859, 0xB28E, 0x885A, 0xB28F, 0x8861, + 0xB290, 0xB4C0, 0xB291, 0xB4C1, 0xB292, 0x8862, 0xB293, 0x8863, + 0xB294, 0xB4C2, 0xB295, 0x8864, 0xB296, 0x8865, 0xB297, 0x8866, + 0xB298, 0xB4C3, 0xB299, 0xB4C4, 0xB29A, 0xB4C5, 0xB29B, 0x8867, + 0xB29C, 0x8868, 0xB29D, 0x8869, 0xB29E, 0x886A, 0xB29F, 0x886B, + 0xB2A0, 0xB4C6, 0xB2A1, 0xB4C7, 0xB2A2, 0x886C, 0xB2A3, 0xB4C8, + 0xB2A4, 0x886D, 0xB2A5, 0xB4C9, 0xB2A6, 0xB4CA, 0xB2A7, 0x886E, + 0xB2A8, 0x886F, 0xB2A9, 0x8870, 0xB2AA, 0xB4CB, 0xB2AB, 0x8871, + 0xB2AC, 0xB4CC, 0xB2AD, 0x8872, 0xB2AE, 0x8873, 0xB2AF, 0x8874, + 0xB2B0, 0xB4CD, 0xB2B1, 0x8875, 0xB2B2, 0x8876, 0xB2B3, 0x8877, + 0xB2B4, 0xB4CE, 0xB2B5, 0x8878, 0xB2B6, 0x8879, 0xB2B7, 0x887A, + 0xB2B8, 0x8881, 0xB2B9, 0x8882, 0xB2BA, 0x8883, 0xB2BB, 0x8884, + 0xB2BC, 0x8885, 0xB2BD, 0x8886, 0xB2BE, 0x8887, 0xB2BF, 0x8888, + 0xB2C0, 0x8889, 0xB2C1, 0x888A, 0xB2C2, 0x888B, 0xB2C3, 0x888C, + 0xB2C4, 0x888D, 0xB2C5, 0x888E, 0xB2C6, 0x888F, 0xB2C7, 0x8890, + 0xB2C8, 0xB4CF, 0xB2C9, 0xB4D0, 0xB2CA, 0x8891, 0xB2CB, 0x8892, + 0xB2CC, 0xB4D1, 0xB2CD, 0x8893, 0xB2CE, 0x8894, 0xB2CF, 0x8895, + 0xB2D0, 0xB4D2, 0xB2D1, 0x8896, 0xB2D2, 0xB4D3, 0xB2D3, 0x8897, + 0xB2D4, 0x8898, 0xB2D5, 0x8899, 0xB2D6, 0x889A, 0xB2D7, 0x889B, + 0xB2D8, 0xB4D4, 0xB2D9, 0xB4D5, 0xB2DA, 0x889C, 0xB2DB, 0xB4D6, + 0xB2DC, 0x889D, 0xB2DD, 0xB4D7, 0xB2DE, 0x889E, 0xB2DF, 0x889F, + 0xB2E0, 0x88A0, 0xB2E1, 0x88A1, 0xB2E2, 0xB4D8, 0xB2E3, 0x88A2, + 0xB2E4, 0xB4D9, 0xB2E5, 0xB4DA, 0xB2E6, 0xB4DB, 0xB2E7, 0x88A3, + 0xB2E8, 0xB4DC, 0xB2E9, 0x88A4, 0xB2EA, 0x88A5, 0xB2EB, 0xB4DD, + 0xB2EC, 0xB4DE, 0xB2ED, 0xB4DF, 0xB2EE, 0xB4E0, 0xB2EF, 0xB4E1, + 0xB2F0, 0x88A6, 0xB2F1, 0x88A7, 0xB2F2, 0x88A8, 0xB2F3, 0xB4E2, + 0xB2F4, 0xB4E3, 0xB2F5, 0xB4E4, 0xB2F6, 0x88A9, 0xB2F7, 0xB4E5, + 0xB2F8, 0xB4E6, 0xB2F9, 0xB4E7, 0xB2FA, 0xB4E8, 0xB2FB, 0xB4E9, + 0xB2FC, 0x88AA, 0xB2FD, 0x88AB, 0xB2FE, 0x88AC, 0xB2FF, 0xB4EA, + 0xB300, 0xB4EB, 0xB301, 0xB4EC, 0xB302, 0x88AD, 0xB303, 0x88AE, + 0xB304, 0xB4ED, 0xB305, 0x88AF, 0xB306, 0x88B0, 0xB307, 0x88B1, + 0xB308, 0xB4EE, 0xB309, 0x88B2, 0xB30A, 0x88B3, 0xB30B, 0x88B4, + 0xB30C, 0x88B5, 0xB30D, 0x88B6, 0xB30E, 0x88B7, 0xB30F, 0x88B8, + 0xB310, 0xB4EF, 0xB311, 0xB4F0, 0xB312, 0x88B9, 0xB313, 0xB4F1, + 0xB314, 0xB4F2, 0xB315, 0xB4F3, 0xB316, 0x88BA, 0xB317, 0x88BB, + 0xB318, 0x88BC, 0xB319, 0x88BD, 0xB31A, 0x88BE, 0xB31B, 0x88BF, + 0xB31C, 0xB4F4, 0xB31D, 0x88C0, 0xB31E, 0x88C1, 0xB31F, 0x88C2, + 0xB320, 0x88C3, 0xB321, 0x88C4, 0xB322, 0x88C5, 0xB323, 0x88C6, + 0xB324, 0x88C7, 0xB325, 0x88C8, 0xB326, 0x88C9, 0xB327, 0x88CA, + 0xB328, 0x88CB, 0xB329, 0x88CC, 0xB32A, 0x88CD, 0xB32B, 0x88CE, + 0xB32C, 0x88CF, 0xB32D, 0x88D0, 0xB32E, 0x88D1, 0xB32F, 0x88D2, + 0xB330, 0x88D3, 0xB331, 0x88D4, 0xB332, 0x88D5, 0xB333, 0x88D6, + 0xB334, 0x88D7, 0xB335, 0x88D8, 0xB336, 0x88D9, 0xB337, 0x88DA, + 0xB338, 0x88DB, 0xB339, 0x88DC, 0xB33A, 0x88DD, 0xB33B, 0x88DE, + 0xB33C, 0x88DF, 0xB33D, 0x88E0, 0xB33E, 0x88E1, 0xB33F, 0x88E2, + 0xB340, 0x88E3, 0xB341, 0x88E4, 0xB342, 0x88E5, 0xB343, 0x88E6, + 0xB344, 0x88E7, 0xB345, 0x88E8, 0xB346, 0x88E9, 0xB347, 0x88EA, + 0xB348, 0x88EB, 0xB349, 0x88EC, 0xB34A, 0x88ED, 0xB34B, 0x88EE, + 0xB34C, 0x88EF, 0xB34D, 0x88F0, 0xB34E, 0x88F1, 0xB34F, 0x88F2, + 0xB350, 0x88F3, 0xB351, 0x88F4, 0xB352, 0x88F5, 0xB353, 0x88F6, + 0xB354, 0xB4F5, 0xB355, 0xB4F6, 0xB356, 0xB4F7, 0xB357, 0x88F7, + 0xB358, 0xB4F8, 0xB359, 0x88F8, 0xB35A, 0x88F9, 0xB35B, 0xB4F9, + 0xB35C, 0xB4FA, 0xB35D, 0x88FA, 0xB35E, 0xB4FB, 0xB35F, 0xB4FC, + 0xB360, 0x88FB, 0xB361, 0x88FC, 0xB362, 0x88FD, 0xB363, 0x88FE, + 0xB364, 0xB4FD, 0xB365, 0xB4FE, 0xB366, 0x8941, 0xB367, 0xB5A1, + 0xB368, 0x8942, 0xB369, 0xB5A2, 0xB36A, 0x8943, 0xB36B, 0xB5A3, + 0xB36C, 0x8944, 0xB36D, 0x8945, 0xB36E, 0xB5A4, 0xB36F, 0x8946, + 0xB370, 0xB5A5, 0xB371, 0xB5A6, 0xB372, 0x8947, 0xB373, 0x8948, + 0xB374, 0xB5A7, 0xB375, 0x8949, 0xB376, 0x894A, 0xB377, 0x894B, + 0xB378, 0xB5A8, 0xB379, 0x894C, 0xB37A, 0x894D, 0xB37B, 0x894E, + 0xB37C, 0x894F, 0xB37D, 0x8950, 0xB37E, 0x8951, 0xB37F, 0x8952, + 0xB380, 0xB5A9, 0xB381, 0xB5AA, 0xB382, 0x8953, 0xB383, 0xB5AB, + 0xB384, 0xB5AC, 0xB385, 0xB5AD, 0xB386, 0x8954, 0xB387, 0x8955, + 0xB388, 0x8956, 0xB389, 0x8957, 0xB38A, 0x8958, 0xB38B, 0x8959, + 0xB38C, 0xB5AE, 0xB38D, 0x895A, 0xB38E, 0x8961, 0xB38F, 0x8962, + 0xB390, 0xB5AF, 0xB391, 0x8963, 0xB392, 0x8964, 0xB393, 0x8965, + 0xB394, 0xB5B0, 0xB395, 0x8966, 0xB396, 0x8967, 0xB397, 0x8968, + 0xB398, 0x8969, 0xB399, 0x896A, 0xB39A, 0x896B, 0xB39B, 0x896C, + 0xB39C, 0x896D, 0xB39D, 0x896E, 0xB39E, 0x896F, 0xB39F, 0x8970, + 0xB3A0, 0xB5B1, 0xB3A1, 0xB5B2, 0xB3A2, 0x8971, 0xB3A3, 0x8972, + 0xB3A4, 0x8973, 0xB3A5, 0x8974, 0xB3A6, 0x8975, 0xB3A7, 0x8976, + 0xB3A8, 0xB5B3, 0xB3A9, 0x8977, 0xB3AA, 0x8978, 0xB3AB, 0x8979, + 0xB3AC, 0xB5B4, 0xB3AD, 0x897A, 0xB3AE, 0x8981, 0xB3AF, 0x8982, + 0xB3B0, 0x8983, 0xB3B1, 0x8984, 0xB3B2, 0x8985, 0xB3B3, 0x8986, + 0xB3B4, 0x8987, 0xB3B5, 0x8988, 0xB3B6, 0x8989, 0xB3B7, 0x898A, + 0xB3B8, 0x898B, 0xB3B9, 0x898C, 0xB3BA, 0x898D, 0xB3BB, 0x898E, + 0xB3BC, 0x898F, 0xB3BD, 0x8990, 0xB3BE, 0x8991, 0xB3BF, 0x8992, + 0xB3C0, 0x8993, 0xB3C1, 0x8994, 0xB3C2, 0x8995, 0xB3C3, 0x8996, + 0xB3C4, 0xB5B5, 0xB3C5, 0xB5B6, 0xB3C6, 0x8997, 0xB3C7, 0x8998, + 0xB3C8, 0xB5B7, 0xB3C9, 0x8999, 0xB3CA, 0x899A, 0xB3CB, 0xB5B8, + 0xB3CC, 0xB5B9, 0xB3CD, 0x899B, 0xB3CE, 0xB5BA, 0xB3CF, 0x899C, + 0xB3D0, 0xB5BB, 0xB3D1, 0x899D, 0xB3D2, 0x899E, 0xB3D3, 0x899F, + 0xB3D4, 0xB5BC, 0xB3D5, 0xB5BD, 0xB3D6, 0x89A0, 0xB3D7, 0xB5BE, + 0xB3D8, 0x89A1, 0xB3D9, 0xB5BF, 0xB3DA, 0x89A2, 0xB3DB, 0xB5C0, + 0xB3DC, 0x89A3, 0xB3DD, 0xB5C1, 0xB3DE, 0x89A4, 0xB3DF, 0x89A5, + 0xB3E0, 0xB5C2, 0xB3E1, 0x89A6, 0xB3E2, 0x89A7, 0xB3E3, 0x89A8, + 0xB3E4, 0xB5C3, 0xB3E5, 0x89A9, 0xB3E6, 0x89AA, 0xB3E7, 0x89AB, + 0xB3E8, 0xB5C4, 0xB3E9, 0x89AC, 0xB3EA, 0x89AD, 0xB3EB, 0x89AE, + 0xB3EC, 0x89AF, 0xB3ED, 0x89B0, 0xB3EE, 0x89B1, 0xB3EF, 0x89B2, + 0xB3F0, 0x89B3, 0xB3F1, 0x89B4, 0xB3F2, 0x89B5, 0xB3F3, 0x89B6, + 0xB3F4, 0x89B7, 0xB3F5, 0x89B8, 0xB3F6, 0x89B9, 0xB3F7, 0x89BA, + 0xB3F8, 0x89BB, 0xB3F9, 0x89BC, 0xB3FA, 0x89BD, 0xB3FB, 0x89BE, + 0xB3FC, 0xB5C5, 0xB3FD, 0x89BF, 0xB3FE, 0x89C0, 0xB3FF, 0x89C1, + 0xB400, 0x89C2, 0xB401, 0x89C3, 0xB402, 0x89C4, 0xB403, 0x89C5, + 0xB404, 0x89C6, 0xB405, 0x89C7, 0xB406, 0x89C8, 0xB407, 0x89C9, + 0xB408, 0x89CA, 0xB409, 0x89CB, 0xB40A, 0x89CC, 0xB40B, 0x89CD, + 0xB40C, 0x89CE, 0xB40D, 0x89CF, 0xB40E, 0x89D0, 0xB40F, 0x89D1, + 0xB410, 0xB5C6, 0xB411, 0x89D2, 0xB412, 0x89D3, 0xB413, 0x89D4, + 0xB414, 0x89D5, 0xB415, 0x89D6, 0xB416, 0x89D7, 0xB417, 0x89D8, + 0xB418, 0xB5C7, 0xB419, 0x89D9, 0xB41A, 0x89DA, 0xB41B, 0x89DB, + 0xB41C, 0xB5C8, 0xB41D, 0x89DC, 0xB41E, 0x89DD, 0xB41F, 0x89DE, + 0xB420, 0xB5C9, 0xB421, 0x89DF, 0xB422, 0x89E0, 0xB423, 0x89E1, + 0xB424, 0x89E2, 0xB425, 0x89E3, 0xB426, 0x89E4, 0xB427, 0x89E5, + 0xB428, 0xB5CA, 0xB429, 0xB5CB, 0xB42A, 0x89E6, 0xB42B, 0xB5CC, + 0xB42C, 0x89E7, 0xB42D, 0x89E8, 0xB42E, 0x89E9, 0xB42F, 0x89EA, + 0xB430, 0x89EB, 0xB431, 0x89EC, 0xB432, 0x89ED, 0xB433, 0x89EE, + 0xB434, 0xB5CD, 0xB435, 0x89EF, 0xB436, 0x89F0, 0xB437, 0x89F1, + 0xB438, 0x89F2, 0xB439, 0x89F3, 0xB43A, 0x89F4, 0xB43B, 0x89F5, + 0xB43C, 0x89F6, 0xB43D, 0x89F7, 0xB43E, 0x89F8, 0xB43F, 0x89F9, + 0xB440, 0x89FA, 0xB441, 0x89FB, 0xB442, 0x89FC, 0xB443, 0x89FD, + 0xB444, 0x89FE, 0xB445, 0x8A41, 0xB446, 0x8A42, 0xB447, 0x8A43, + 0xB448, 0x8A44, 0xB449, 0x8A45, 0xB44A, 0x8A46, 0xB44B, 0x8A47, + 0xB44C, 0x8A48, 0xB44D, 0x8A49, 0xB44E, 0x8A4A, 0xB44F, 0x8A4B, + 0xB450, 0xB5CE, 0xB451, 0xB5CF, 0xB452, 0x8A4C, 0xB453, 0x8A4D, + 0xB454, 0xB5D0, 0xB455, 0x8A4E, 0xB456, 0x8A4F, 0xB457, 0x8A50, + 0xB458, 0xB5D1, 0xB459, 0x8A51, 0xB45A, 0x8A52, 0xB45B, 0x8A53, + 0xB45C, 0x8A54, 0xB45D, 0x8A55, 0xB45E, 0x8A56, 0xB45F, 0x8A57, + 0xB460, 0xB5D2, 0xB461, 0xB5D3, 0xB462, 0x8A58, 0xB463, 0xB5D4, + 0xB464, 0x8A59, 0xB465, 0xB5D5, 0xB466, 0x8A5A, 0xB467, 0x8A61, + 0xB468, 0x8A62, 0xB469, 0x8A63, 0xB46A, 0x8A64, 0xB46B, 0x8A65, + 0xB46C, 0xB5D6, 0xB46D, 0x8A66, 0xB46E, 0x8A67, 0xB46F, 0x8A68, + 0xB470, 0x8A69, 0xB471, 0x8A6A, 0xB472, 0x8A6B, 0xB473, 0x8A6C, + 0xB474, 0x8A6D, 0xB475, 0x8A6E, 0xB476, 0x8A6F, 0xB477, 0x8A70, + 0xB478, 0x8A71, 0xB479, 0x8A72, 0xB47A, 0x8A73, 0xB47B, 0x8A74, + 0xB47C, 0x8A75, 0xB47D, 0x8A76, 0xB47E, 0x8A77, 0xB47F, 0x8A78, + 0xB480, 0xB5D7, 0xB481, 0x8A79, 0xB482, 0x8A7A, 0xB483, 0x8A81, + 0xB484, 0x8A82, 0xB485, 0x8A83, 0xB486, 0x8A84, 0xB487, 0x8A85, + 0xB488, 0xB5D8, 0xB489, 0x8A86, 0xB48A, 0x8A87, 0xB48B, 0x8A88, + 0xB48C, 0x8A89, 0xB48D, 0x8A8A, 0xB48E, 0x8A8B, 0xB48F, 0x8A8C, + 0xB490, 0x8A8D, 0xB491, 0x8A8E, 0xB492, 0x8A8F, 0xB493, 0x8A90, + 0xB494, 0x8A91, 0xB495, 0x8A92, 0xB496, 0x8A93, 0xB497, 0x8A94, + 0xB498, 0x8A95, 0xB499, 0x8A96, 0xB49A, 0x8A97, 0xB49B, 0x8A98, + 0xB49C, 0x8A99, 0xB49D, 0xB5D9, 0xB49E, 0x8A9A, 0xB49F, 0x8A9B, + 0xB4A0, 0x8A9C, 0xB4A1, 0x8A9D, 0xB4A2, 0x8A9E, 0xB4A3, 0x8A9F, + 0xB4A4, 0xB5DA, 0xB4A5, 0x8AA0, 0xB4A6, 0x8AA1, 0xB4A7, 0x8AA2, + 0xB4A8, 0xB5DB, 0xB4A9, 0x8AA3, 0xB4AA, 0x8AA4, 0xB4AB, 0x8AA5, + 0xB4AC, 0xB5DC, 0xB4AD, 0x8AA6, 0xB4AE, 0x8AA7, 0xB4AF, 0x8AA8, + 0xB4B0, 0x8AA9, 0xB4B1, 0x8AAA, 0xB4B2, 0x8AAB, 0xB4B3, 0x8AAC, + 0xB4B4, 0x8AAD, 0xB4B5, 0xB5DD, 0xB4B6, 0x8AAE, 0xB4B7, 0xB5DE, + 0xB4B8, 0x8AAF, 0xB4B9, 0xB5DF, 0xB4BA, 0x8AB0, 0xB4BB, 0x8AB1, + 0xB4BC, 0x8AB2, 0xB4BD, 0x8AB3, 0xB4BE, 0x8AB4, 0xB4BF, 0x8AB5, + 0xB4C0, 0xB5E0, 0xB4C1, 0x8AB6, 0xB4C2, 0x8AB7, 0xB4C3, 0x8AB8, + 0xB4C4, 0xB5E1, 0xB4C5, 0x8AB9, 0xB4C6, 0x8ABA, 0xB4C7, 0x8ABB, + 0xB4C8, 0xB5E2, 0xB4C9, 0x8ABC, 0xB4CA, 0x8ABD, 0xB4CB, 0x8ABE, + 0xB4CC, 0x8ABF, 0xB4CD, 0x8AC0, 0xB4CE, 0x8AC1, 0xB4CF, 0x8AC2, + 0xB4D0, 0xB5E3, 0xB4D1, 0x8AC3, 0xB4D2, 0x8AC4, 0xB4D3, 0x8AC5, + 0xB4D4, 0x8AC6, 0xB4D5, 0xB5E4, 0xB4D6, 0x8AC7, 0xB4D7, 0x8AC8, + 0xB4D8, 0x8AC9, 0xB4D9, 0x8ACA, 0xB4DA, 0x8ACB, 0xB4DB, 0x8ACC, + 0xB4DC, 0xB5E5, 0xB4DD, 0xB5E6, 0xB4DE, 0x8ACD, 0xB4DF, 0x8ACE, + 0xB4E0, 0xB5E7, 0xB4E1, 0x8ACF, 0xB4E2, 0x8AD0, 0xB4E3, 0xB5E8, + 0xB4E4, 0xB5E9, 0xB4E5, 0x8AD1, 0xB4E6, 0xB5EA, 0xB4E7, 0x8AD2, + 0xB4E8, 0x8AD3, 0xB4E9, 0x8AD4, 0xB4EA, 0x8AD5, 0xB4EB, 0x8AD6, + 0xB4EC, 0xB5EB, 0xB4ED, 0xB5EC, 0xB4EE, 0x8AD7, 0xB4EF, 0xB5ED, + 0xB4F0, 0x8AD8, 0xB4F1, 0xB5EE, 0xB4F2, 0x8AD9, 0xB4F3, 0x8ADA, + 0xB4F4, 0x8ADB, 0xB4F5, 0x8ADC, 0xB4F6, 0x8ADD, 0xB4F7, 0x8ADE, + 0xB4F8, 0xB5EF, 0xB4F9, 0x8ADF, 0xB4FA, 0x8AE0, 0xB4FB, 0x8AE1, + 0xB4FC, 0x8AE2, 0xB4FD, 0x8AE3, 0xB4FE, 0x8AE4, 0xB4FF, 0x8AE5, + 0xB500, 0x8AE6, 0xB501, 0x8AE7, 0xB502, 0x8AE8, 0xB503, 0x8AE9, + 0xB504, 0x8AEA, 0xB505, 0x8AEB, 0xB506, 0x8AEC, 0xB507, 0x8AED, + 0xB508, 0x8AEE, 0xB509, 0x8AEF, 0xB50A, 0x8AF0, 0xB50B, 0x8AF1, + 0xB50C, 0x8AF2, 0xB50D, 0x8AF3, 0xB50E, 0x8AF4, 0xB50F, 0x8AF5, + 0xB510, 0x8AF6, 0xB511, 0x8AF7, 0xB512, 0x8AF8, 0xB513, 0x8AF9, + 0xB514, 0xB5F0, 0xB515, 0xB5F1, 0xB516, 0x8AFA, 0xB517, 0x8AFB, + 0xB518, 0xB5F2, 0xB519, 0x8AFC, 0xB51A, 0x8AFD, 0xB51B, 0xB5F3, + 0xB51C, 0xB5F4, 0xB51D, 0x8AFE, 0xB51E, 0x8B41, 0xB51F, 0x8B42, + 0xB520, 0x8B43, 0xB521, 0x8B44, 0xB522, 0x8B45, 0xB523, 0x8B46, + 0xB524, 0xB5F5, 0xB525, 0xB5F6, 0xB526, 0x8B47, 0xB527, 0xB5F7, + 0xB528, 0xB5F8, 0xB529, 0xB5F9, 0xB52A, 0xB5FA, 0xB52B, 0x8B48, + 0xB52C, 0x8B49, 0xB52D, 0x8B4A, 0xB52E, 0x8B4B, 0xB52F, 0x8B4C, + 0xB530, 0xB5FB, 0xB531, 0xB5FC, 0xB532, 0x8B4D, 0xB533, 0x8B4E, + 0xB534, 0xB5FD, 0xB535, 0x8B4F, 0xB536, 0x8B50, 0xB537, 0x8B51, + 0xB538, 0xB5FE, 0xB539, 0x8B52, 0xB53A, 0x8B53, 0xB53B, 0x8B54, + 0xB53C, 0x8B55, 0xB53D, 0x8B56, 0xB53E, 0x8B57, 0xB53F, 0x8B58, + 0xB540, 0xB6A1, 0xB541, 0xB6A2, 0xB542, 0x8B59, 0xB543, 0xB6A3, + 0xB544, 0xB6A4, 0xB545, 0xB6A5, 0xB546, 0x8B5A, 0xB547, 0x8B61, + 0xB548, 0x8B62, 0xB549, 0x8B63, 0xB54A, 0x8B64, 0xB54B, 0xB6A6, + 0xB54C, 0xB6A7, 0xB54D, 0xB6A8, 0xB54E, 0x8B65, 0xB54F, 0x8B66, + 0xB550, 0xB6A9, 0xB551, 0x8B67, 0xB552, 0x8B68, 0xB553, 0x8B69, + 0xB554, 0xB6AA, 0xB555, 0x8B6A, 0xB556, 0x8B6B, 0xB557, 0x8B6C, + 0xB558, 0x8B6D, 0xB559, 0x8B6E, 0xB55A, 0x8B6F, 0xB55B, 0x8B70, + 0xB55C, 0xB6AB, 0xB55D, 0xB6AC, 0xB55E, 0x8B71, 0xB55F, 0xB6AD, + 0xB560, 0xB6AE, 0xB561, 0xB6AF, 0xB562, 0x8B72, 0xB563, 0x8B73, + 0xB564, 0x8B74, 0xB565, 0x8B75, 0xB566, 0x8B76, 0xB567, 0x8B77, + 0xB568, 0x8B78, 0xB569, 0x8B79, 0xB56A, 0x8B7A, 0xB56B, 0x8B81, + 0xB56C, 0x8B82, 0xB56D, 0x8B83, 0xB56E, 0x8B84, 0xB56F, 0x8B85, + 0xB570, 0x8B86, 0xB571, 0x8B87, 0xB572, 0x8B88, 0xB573, 0x8B89, + 0xB574, 0x8B8A, 0xB575, 0x8B8B, 0xB576, 0x8B8C, 0xB577, 0x8B8D, + 0xB578, 0x8B8E, 0xB579, 0x8B8F, 0xB57A, 0x8B90, 0xB57B, 0x8B91, + 0xB57C, 0x8B92, 0xB57D, 0x8B93, 0xB57E, 0x8B94, 0xB57F, 0x8B95, + 0xB580, 0x8B96, 0xB581, 0x8B97, 0xB582, 0x8B98, 0xB583, 0x8B99, + 0xB584, 0x8B9A, 0xB585, 0x8B9B, 0xB586, 0x8B9C, 0xB587, 0x8B9D, + 0xB588, 0x8B9E, 0xB589, 0x8B9F, 0xB58A, 0x8BA0, 0xB58B, 0x8BA1, + 0xB58C, 0x8BA2, 0xB58D, 0x8BA3, 0xB58E, 0x8BA4, 0xB58F, 0x8BA5, + 0xB590, 0x8BA6, 0xB591, 0x8BA7, 0xB592, 0x8BA8, 0xB593, 0x8BA9, + 0xB594, 0x8BAA, 0xB595, 0x8BAB, 0xB596, 0x8BAC, 0xB597, 0x8BAD, + 0xB598, 0x8BAE, 0xB599, 0x8BAF, 0xB59A, 0x8BB0, 0xB59B, 0x8BB1, + 0xB59C, 0x8BB2, 0xB59D, 0x8BB3, 0xB59E, 0x8BB4, 0xB59F, 0x8BB5, + 0xB5A0, 0xB6B0, 0xB5A1, 0xB6B1, 0xB5A2, 0x8BB6, 0xB5A3, 0x8BB7, + 0xB5A4, 0xB6B2, 0xB5A5, 0x8BB8, 0xB5A6, 0x8BB9, 0xB5A7, 0x8BBA, + 0xB5A8, 0xB6B3, 0xB5A9, 0x8BBB, 0xB5AA, 0xB6B4, 0xB5AB, 0xB6B5, + 0xB5AC, 0x8BBC, 0xB5AD, 0x8BBD, 0xB5AE, 0x8BBE, 0xB5AF, 0x8BBF, + 0xB5B0, 0xB6B6, 0xB5B1, 0xB6B7, 0xB5B2, 0x8BC0, 0xB5B3, 0xB6B8, + 0xB5B4, 0xB6B9, 0xB5B5, 0xB6BA, 0xB5B6, 0x8BC1, 0xB5B7, 0x8BC2, + 0xB5B8, 0x8BC3, 0xB5B9, 0x8BC4, 0xB5BA, 0x8BC5, 0xB5BB, 0xB6BB, + 0xB5BC, 0xB6BC, 0xB5BD, 0xB6BD, 0xB5BE, 0x8BC6, 0xB5BF, 0x8BC7, + 0xB5C0, 0xB6BE, 0xB5C1, 0x8BC8, 0xB5C2, 0x8BC9, 0xB5C3, 0x8BCA, + 0xB5C4, 0xB6BF, 0xB5C5, 0x8BCB, 0xB5C6, 0x8BCC, 0xB5C7, 0x8BCD, + 0xB5C8, 0x8BCE, 0xB5C9, 0x8BCF, 0xB5CA, 0x8BD0, 0xB5CB, 0x8BD1, + 0xB5CC, 0xB6C0, 0xB5CD, 0xB6C1, 0xB5CE, 0x8BD2, 0xB5CF, 0xB6C2, + 0xB5D0, 0xB6C3, 0xB5D1, 0xB6C4, 0xB5D2, 0x8BD3, 0xB5D3, 0x8BD4, + 0xB5D4, 0x8BD5, 0xB5D5, 0x8BD6, 0xB5D6, 0x8BD7, 0xB5D7, 0x8BD8, + 0xB5D8, 0xB6C5, 0xB5D9, 0x8BD9, 0xB5DA, 0x8BDA, 0xB5DB, 0x8BDB, + 0xB5DC, 0x8BDC, 0xB5DD, 0x8BDD, 0xB5DE, 0x8BDE, 0xB5DF, 0x8BDF, + 0xB5E0, 0x8BE0, 0xB5E1, 0x8BE1, 0xB5E2, 0x8BE2, 0xB5E3, 0x8BE3, + 0xB5E4, 0x8BE4, 0xB5E5, 0x8BE5, 0xB5E6, 0x8BE6, 0xB5E7, 0x8BE7, + 0xB5E8, 0x8BE8, 0xB5E9, 0x8BE9, 0xB5EA, 0x8BEA, 0xB5EB, 0x8BEB, + 0xB5EC, 0xB6C6, 0xB5ED, 0x8BEC, 0xB5EE, 0x8BED, 0xB5EF, 0x8BEE, + 0xB5F0, 0x8BEF, 0xB5F1, 0x8BF0, 0xB5F2, 0x8BF1, 0xB5F3, 0x8BF2, + 0xB5F4, 0x8BF3, 0xB5F5, 0x8BF4, 0xB5F6, 0x8BF5, 0xB5F7, 0x8BF6, + 0xB5F8, 0x8BF7, 0xB5F9, 0x8BF8, 0xB5FA, 0x8BF9, 0xB5FB, 0x8BFA, + 0xB5FC, 0x8BFB, 0xB5FD, 0x8BFC, 0xB5FE, 0x8BFD, 0xB5FF, 0x8BFE, + 0xB600, 0x8C41, 0xB601, 0x8C42, 0xB602, 0x8C43, 0xB603, 0x8C44, + 0xB604, 0x8C45, 0xB605, 0x8C46, 0xB606, 0x8C47, 0xB607, 0x8C48, + 0xB608, 0x8C49, 0xB609, 0x8C4A, 0xB60A, 0x8C4B, 0xB60B, 0x8C4C, + 0xB60C, 0x8C4D, 0xB60D, 0x8C4E, 0xB60E, 0x8C4F, 0xB60F, 0x8C50, + 0xB610, 0xB6C7, 0xB611, 0xB6C8, 0xB612, 0x8C51, 0xB613, 0x8C52, + 0xB614, 0xB6C9, 0xB615, 0x8C53, 0xB616, 0x8C54, 0xB617, 0x8C55, + 0xB618, 0xB6CA, 0xB619, 0x8C56, 0xB61A, 0x8C57, 0xB61B, 0x8C58, + 0xB61C, 0x8C59, 0xB61D, 0x8C5A, 0xB61E, 0x8C61, 0xB61F, 0x8C62, + 0xB620, 0x8C63, 0xB621, 0x8C64, 0xB622, 0x8C65, 0xB623, 0x8C66, + 0xB624, 0x8C67, 0xB625, 0xB6CB, 0xB626, 0x8C68, 0xB627, 0x8C69, + 0xB628, 0x8C6A, 0xB629, 0x8C6B, 0xB62A, 0x8C6C, 0xB62B, 0x8C6D, + 0xB62C, 0xB6CC, 0xB62D, 0x8C6E, 0xB62E, 0x8C6F, 0xB62F, 0x8C70, + 0xB630, 0x8C71, 0xB631, 0x8C72, 0xB632, 0x8C73, 0xB633, 0x8C74, + 0xB634, 0xB6CD, 0xB635, 0x8C75, 0xB636, 0x8C76, 0xB637, 0x8C77, + 0xB638, 0x8C78, 0xB639, 0x8C79, 0xB63A, 0x8C7A, 0xB63B, 0x8C81, + 0xB63C, 0x8C82, 0xB63D, 0x8C83, 0xB63E, 0x8C84, 0xB63F, 0x8C85, + 0xB640, 0x8C86, 0xB641, 0x8C87, 0xB642, 0x8C88, 0xB643, 0x8C89, + 0xB644, 0x8C8A, 0xB645, 0x8C8B, 0xB646, 0x8C8C, 0xB647, 0x8C8D, + 0xB648, 0xB6CE, 0xB649, 0x8C8E, 0xB64A, 0x8C8F, 0xB64B, 0x8C90, + 0xB64C, 0x8C91, 0xB64D, 0x8C92, 0xB64E, 0x8C93, 0xB64F, 0x8C94, + 0xB650, 0x8C95, 0xB651, 0x8C96, 0xB652, 0x8C97, 0xB653, 0x8C98, + 0xB654, 0x8C99, 0xB655, 0x8C9A, 0xB656, 0x8C9B, 0xB657, 0x8C9C, + 0xB658, 0x8C9D, 0xB659, 0x8C9E, 0xB65A, 0x8C9F, 0xB65B, 0x8CA0, + 0xB65C, 0x8CA1, 0xB65D, 0x8CA2, 0xB65E, 0x8CA3, 0xB65F, 0x8CA4, + 0xB660, 0x8CA5, 0xB661, 0x8CA6, 0xB662, 0x8CA7, 0xB663, 0x8CA8, + 0xB664, 0xB6CF, 0xB665, 0x8CA9, 0xB666, 0x8CAA, 0xB667, 0x8CAB, + 0xB668, 0xB6D0, 0xB669, 0x8CAC, 0xB66A, 0x8CAD, 0xB66B, 0x8CAE, + 0xB66C, 0x8CAF, 0xB66D, 0x8CB0, 0xB66E, 0x8CB1, 0xB66F, 0x8CB2, + 0xB670, 0x8CB3, 0xB671, 0x8CB4, 0xB672, 0x8CB5, 0xB673, 0x8CB6, + 0xB674, 0x8CB7, 0xB675, 0x8CB8, 0xB676, 0x8CB9, 0xB677, 0x8CBA, + 0xB678, 0x8CBB, 0xB679, 0x8CBC, 0xB67A, 0x8CBD, 0xB67B, 0x8CBE, + 0xB67C, 0x8CBF, 0xB67D, 0x8CC0, 0xB67E, 0x8CC1, 0xB67F, 0x8CC2, + 0xB680, 0x8CC3, 0xB681, 0x8CC4, 0xB682, 0x8CC5, 0xB683, 0x8CC6, + 0xB684, 0x8CC7, 0xB685, 0x8CC8, 0xB686, 0x8CC9, 0xB687, 0x8CCA, + 0xB688, 0x8CCB, 0xB689, 0x8CCC, 0xB68A, 0x8CCD, 0xB68B, 0x8CCE, + 0xB68C, 0x8CCF, 0xB68D, 0x8CD0, 0xB68E, 0x8CD1, 0xB68F, 0x8CD2, + 0xB690, 0x8CD3, 0xB691, 0x8CD4, 0xB692, 0x8CD5, 0xB693, 0x8CD6, + 0xB694, 0x8CD7, 0xB695, 0x8CD8, 0xB696, 0x8CD9, 0xB697, 0x8CDA, + 0xB698, 0x8CDB, 0xB699, 0x8CDC, 0xB69A, 0x8CDD, 0xB69B, 0x8CDE, + 0xB69C, 0xB6D1, 0xB69D, 0xB6D2, 0xB69E, 0x8CDF, 0xB69F, 0x8CE0, + 0xB6A0, 0xB6D3, 0xB6A1, 0x8CE1, 0xB6A2, 0x8CE2, 0xB6A3, 0x8CE3, + 0xB6A4, 0xB6D4, 0xB6A5, 0x8CE4, 0xB6A6, 0x8CE5, 0xB6A7, 0x8CE6, + 0xB6A8, 0x8CE7, 0xB6A9, 0x8CE8, 0xB6AA, 0x8CE9, 0xB6AB, 0xB6D5, + 0xB6AC, 0xB6D6, 0xB6AD, 0x8CEA, 0xB6AE, 0x8CEB, 0xB6AF, 0x8CEC, + 0xB6B0, 0x8CED, 0xB6B1, 0xB6D7, 0xB6B2, 0x8CEE, 0xB6B3, 0x8CEF, + 0xB6B4, 0x8CF0, 0xB6B5, 0x8CF1, 0xB6B6, 0x8CF2, 0xB6B7, 0x8CF3, + 0xB6B8, 0x8CF4, 0xB6B9, 0x8CF5, 0xB6BA, 0x8CF6, 0xB6BB, 0x8CF7, + 0xB6BC, 0x8CF8, 0xB6BD, 0x8CF9, 0xB6BE, 0x8CFA, 0xB6BF, 0x8CFB, + 0xB6C0, 0x8CFC, 0xB6C1, 0x8CFD, 0xB6C2, 0x8CFE, 0xB6C3, 0x8D41, + 0xB6C4, 0x8D42, 0xB6C5, 0x8D43, 0xB6C6, 0x8D44, 0xB6C7, 0x8D45, + 0xB6C8, 0x8D46, 0xB6C9, 0x8D47, 0xB6CA, 0x8D48, 0xB6CB, 0x8D49, + 0xB6CC, 0x8D4A, 0xB6CD, 0x8D4B, 0xB6CE, 0x8D4C, 0xB6CF, 0x8D4D, + 0xB6D0, 0x8D4E, 0xB6D1, 0x8D4F, 0xB6D2, 0x8D50, 0xB6D3, 0x8D51, + 0xB6D4, 0xB6D8, 0xB6D5, 0x8D52, 0xB6D6, 0x8D53, 0xB6D7, 0x8D54, + 0xB6D8, 0x8D55, 0xB6D9, 0x8D56, 0xB6DA, 0x8D57, 0xB6DB, 0x8D58, + 0xB6DC, 0x8D59, 0xB6DD, 0x8D5A, 0xB6DE, 0x8D61, 0xB6DF, 0x8D62, + 0xB6E0, 0x8D63, 0xB6E1, 0x8D64, 0xB6E2, 0x8D65, 0xB6E3, 0x8D66, + 0xB6E4, 0x8D67, 0xB6E5, 0x8D68, 0xB6E6, 0x8D69, 0xB6E7, 0x8D6A, + 0xB6E8, 0x8D6B, 0xB6E9, 0x8D6C, 0xB6EA, 0x8D6D, 0xB6EB, 0x8D6E, + 0xB6EC, 0x8D6F, 0xB6ED, 0x8D70, 0xB6EE, 0x8D71, 0xB6EF, 0x8D72, + 0xB6F0, 0xB6D9, 0xB6F1, 0x8D73, 0xB6F2, 0x8D74, 0xB6F3, 0x8D75, + 0xB6F4, 0xB6DA, 0xB6F5, 0x8D76, 0xB6F6, 0x8D77, 0xB6F7, 0x8D78, + 0xB6F8, 0xB6DB, 0xB6F9, 0x8D79, 0xB6FA, 0x8D7A, 0xB6FB, 0x8D81, + 0xB6FC, 0x8D82, 0xB6FD, 0x8D83, 0xB6FE, 0x8D84, 0xB6FF, 0x8D85, + 0xB700, 0xB6DC, 0xB701, 0xB6DD, 0xB702, 0x8D86, 0xB703, 0x8D87, + 0xB704, 0x8D88, 0xB705, 0xB6DE, 0xB706, 0x8D89, 0xB707, 0x8D8A, + 0xB708, 0x8D8B, 0xB709, 0x8D8C, 0xB70A, 0x8D8D, 0xB70B, 0x8D8E, + 0xB70C, 0x8D8F, 0xB70D, 0x8D90, 0xB70E, 0x8D91, 0xB70F, 0x8D92, + 0xB710, 0x8D93, 0xB711, 0x8D94, 0xB712, 0x8D95, 0xB713, 0x8D96, + 0xB714, 0x8D97, 0xB715, 0x8D98, 0xB716, 0x8D99, 0xB717, 0x8D9A, + 0xB718, 0x8D9B, 0xB719, 0x8D9C, 0xB71A, 0x8D9D, 0xB71B, 0x8D9E, + 0xB71C, 0x8D9F, 0xB71D, 0x8DA0, 0xB71E, 0x8DA1, 0xB71F, 0x8DA2, + 0xB720, 0x8DA3, 0xB721, 0x8DA4, 0xB722, 0x8DA5, 0xB723, 0x8DA6, + 0xB724, 0x8DA7, 0xB725, 0x8DA8, 0xB726, 0x8DA9, 0xB727, 0x8DAA, + 0xB728, 0xB6DF, 0xB729, 0xB6E0, 0xB72A, 0x8DAB, 0xB72B, 0x8DAC, + 0xB72C, 0xB6E1, 0xB72D, 0x8DAD, 0xB72E, 0x8DAE, 0xB72F, 0xB6E2, + 0xB730, 0xB6E3, 0xB731, 0x8DAF, 0xB732, 0x8DB0, 0xB733, 0x8DB1, + 0xB734, 0x8DB2, 0xB735, 0x8DB3, 0xB736, 0x8DB4, 0xB737, 0x8DB5, + 0xB738, 0xB6E4, 0xB739, 0xB6E5, 0xB73A, 0x8DB6, 0xB73B, 0xB6E6, + 0xB73C, 0x8DB7, 0xB73D, 0x8DB8, 0xB73E, 0x8DB9, 0xB73F, 0x8DBA, + 0xB740, 0x8DBB, 0xB741, 0x8DBC, 0xB742, 0x8DBD, 0xB743, 0x8DBE, + 0xB744, 0xB6E7, 0xB745, 0x8DBF, 0xB746, 0x8DC0, 0xB747, 0x8DC1, + 0xB748, 0xB6E8, 0xB749, 0x8DC2, 0xB74A, 0x8DC3, 0xB74B, 0x8DC4, + 0xB74C, 0xB6E9, 0xB74D, 0x8DC5, 0xB74E, 0x8DC6, 0xB74F, 0x8DC7, + 0xB750, 0x8DC8, 0xB751, 0x8DC9, 0xB752, 0x8DCA, 0xB753, 0x8DCB, + 0xB754, 0xB6EA, 0xB755, 0xB6EB, 0xB756, 0x8DCC, 0xB757, 0x8DCD, + 0xB758, 0x8DCE, 0xB759, 0x8DCF, 0xB75A, 0x8DD0, 0xB75B, 0x8DD1, + 0xB75C, 0x8DD2, 0xB75D, 0x8DD3, 0xB75E, 0x8DD4, 0xB75F, 0x8DD5, + 0xB760, 0xB6EC, 0xB761, 0x8DD6, 0xB762, 0x8DD7, 0xB763, 0x8DD8, + 0xB764, 0xB6ED, 0xB765, 0x8DD9, 0xB766, 0x8DDA, 0xB767, 0x8DDB, + 0xB768, 0xB6EE, 0xB769, 0x8DDC, 0xB76A, 0x8DDD, 0xB76B, 0x8DDE, + 0xB76C, 0x8DDF, 0xB76D, 0x8DE0, 0xB76E, 0x8DE1, 0xB76F, 0x8DE2, + 0xB770, 0xB6EF, 0xB771, 0xB6F0, 0xB772, 0x8DE3, 0xB773, 0xB6F1, + 0xB774, 0x8DE4, 0xB775, 0xB6F2, 0xB776, 0x8DE5, 0xB777, 0x8DE6, + 0xB778, 0x8DE7, 0xB779, 0x8DE8, 0xB77A, 0x8DE9, 0xB77B, 0x8DEA, + 0xB77C, 0xB6F3, 0xB77D, 0xB6F4, 0xB77E, 0x8DEB, 0xB77F, 0x8DEC, + 0xB780, 0xB6F5, 0xB781, 0x8DED, 0xB782, 0x8DEE, 0xB783, 0x8DEF, + 0xB784, 0xB6F6, 0xB785, 0x8DF0, 0xB786, 0x8DF1, 0xB787, 0x8DF2, + 0xB788, 0x8DF3, 0xB789, 0x8DF4, 0xB78A, 0x8DF5, 0xB78B, 0x8DF6, + 0xB78C, 0xB6F7, 0xB78D, 0xB6F8, 0xB78E, 0x8DF7, 0xB78F, 0xB6F9, + 0xB790, 0xB6FA, 0xB791, 0xB6FB, 0xB792, 0xB6FC, 0xB793, 0x8DF8, + 0xB794, 0x8DF9, 0xB795, 0x8DFA, 0xB796, 0xB6FD, 0xB797, 0xB6FE, + 0xB798, 0xB7A1, 0xB799, 0xB7A2, 0xB79A, 0x8DFB, 0xB79B, 0x8DFC, + 0xB79C, 0xB7A3, 0xB79D, 0x8DFD, 0xB79E, 0x8DFE, 0xB79F, 0x8E41, + 0xB7A0, 0xB7A4, 0xB7A1, 0x8E42, 0xB7A2, 0x8E43, 0xB7A3, 0x8E44, + 0xB7A4, 0x8E45, 0xB7A5, 0x8E46, 0xB7A6, 0x8E47, 0xB7A7, 0x8E48, + 0xB7A8, 0xB7A5, 0xB7A9, 0xB7A6, 0xB7AA, 0x8E49, 0xB7AB, 0xB7A7, + 0xB7AC, 0xB7A8, 0xB7AD, 0xB7A9, 0xB7AE, 0x8E4A, 0xB7AF, 0x8E4B, + 0xB7B0, 0x8E4C, 0xB7B1, 0x8E4D, 0xB7B2, 0x8E4E, 0xB7B3, 0x8E4F, + 0xB7B4, 0xB7AA, 0xB7B5, 0xB7AB, 0xB7B6, 0x8E50, 0xB7B7, 0x8E51, + 0xB7B8, 0xB7AC, 0xB7B9, 0x8E52, 0xB7BA, 0x8E53, 0xB7BB, 0x8E54, + 0xB7BC, 0x8E55, 0xB7BD, 0x8E56, 0xB7BE, 0x8E57, 0xB7BF, 0x8E58, + 0xB7C0, 0x8E59, 0xB7C1, 0x8E5A, 0xB7C2, 0x8E61, 0xB7C3, 0x8E62, + 0xB7C4, 0x8E63, 0xB7C5, 0x8E64, 0xB7C6, 0x8E65, 0xB7C7, 0xB7AD, + 0xB7C8, 0x8E66, 0xB7C9, 0xB7AE, 0xB7CA, 0x8E67, 0xB7CB, 0x8E68, + 0xB7CC, 0x8E69, 0xB7CD, 0x8E6A, 0xB7CE, 0x8E6B, 0xB7CF, 0x8E6C, + 0xB7D0, 0x8E6D, 0xB7D1, 0x8E6E, 0xB7D2, 0x8E6F, 0xB7D3, 0x8E70, + 0xB7D4, 0x8E71, 0xB7D5, 0x8E72, 0xB7D6, 0x8E73, 0xB7D7, 0x8E74, + 0xB7D8, 0x8E75, 0xB7D9, 0x8E76, 0xB7DA, 0x8E77, 0xB7DB, 0x8E78, + 0xB7DC, 0x8E79, 0xB7DD, 0x8E7A, 0xB7DE, 0x8E81, 0xB7DF, 0x8E82, + 0xB7E0, 0x8E83, 0xB7E1, 0x8E84, 0xB7E2, 0x8E85, 0xB7E3, 0x8E86, + 0xB7E4, 0x8E87, 0xB7E5, 0x8E88, 0xB7E6, 0x8E89, 0xB7E7, 0x8E8A, + 0xB7E8, 0x8E8B, 0xB7E9, 0x8E8C, 0xB7EA, 0x8E8D, 0xB7EB, 0x8E8E, + 0xB7EC, 0xB7AF, 0xB7ED, 0xB7B0, 0xB7EE, 0x8E8F, 0xB7EF, 0x8E90, + 0xB7F0, 0xB7B1, 0xB7F1, 0x8E91, 0xB7F2, 0x8E92, 0xB7F3, 0x8E93, + 0xB7F4, 0xB7B2, 0xB7F5, 0x8E94, 0xB7F6, 0x8E95, 0xB7F7, 0x8E96, + 0xB7F8, 0x8E97, 0xB7F9, 0x8E98, 0xB7FA, 0x8E99, 0xB7FB, 0x8E9A, + 0xB7FC, 0xB7B3, 0xB7FD, 0xB7B4, 0xB7FE, 0x8E9B, 0xB7FF, 0xB7B5, + 0xB800, 0xB7B6, 0xB801, 0xB7B7, 0xB802, 0x8E9C, 0xB803, 0x8E9D, + 0xB804, 0x8E9E, 0xB805, 0x8E9F, 0xB806, 0x8EA0, 0xB807, 0xB7B8, + 0xB808, 0xB7B9, 0xB809, 0xB7BA, 0xB80A, 0x8EA1, 0xB80B, 0x8EA2, + 0xB80C, 0xB7BB, 0xB80D, 0x8EA3, 0xB80E, 0x8EA4, 0xB80F, 0x8EA5, + 0xB810, 0xB7BC, 0xB811, 0x8EA6, 0xB812, 0x8EA7, 0xB813, 0x8EA8, + 0xB814, 0x8EA9, 0xB815, 0x8EAA, 0xB816, 0x8EAB, 0xB817, 0x8EAC, + 0xB818, 0xB7BD, 0xB819, 0xB7BE, 0xB81A, 0x8EAD, 0xB81B, 0xB7BF, + 0xB81C, 0x8EAE, 0xB81D, 0xB7C0, 0xB81E, 0x8EAF, 0xB81F, 0x8EB0, + 0xB820, 0x8EB1, 0xB821, 0x8EB2, 0xB822, 0x8EB3, 0xB823, 0x8EB4, + 0xB824, 0xB7C1, 0xB825, 0xB7C2, 0xB826, 0x8EB5, 0xB827, 0x8EB6, + 0xB828, 0xB7C3, 0xB829, 0x8EB7, 0xB82A, 0x8EB8, 0xB82B, 0x8EB9, + 0xB82C, 0xB7C4, 0xB82D, 0x8EBA, 0xB82E, 0x8EBB, 0xB82F, 0x8EBC, + 0xB830, 0x8EBD, 0xB831, 0x8EBE, 0xB832, 0x8EBF, 0xB833, 0x8EC0, + 0xB834, 0xB7C5, 0xB835, 0xB7C6, 0xB836, 0x8EC1, 0xB837, 0xB7C7, + 0xB838, 0xB7C8, 0xB839, 0xB7C9, 0xB83A, 0x8EC2, 0xB83B, 0x8EC3, + 0xB83C, 0x8EC4, 0xB83D, 0x8EC5, 0xB83E, 0x8EC6, 0xB83F, 0x8EC7, + 0xB840, 0xB7CA, 0xB841, 0x8EC8, 0xB842, 0x8EC9, 0xB843, 0x8ECA, + 0xB844, 0xB7CB, 0xB845, 0x8ECB, 0xB846, 0x8ECC, 0xB847, 0x8ECD, + 0xB848, 0x8ECE, 0xB849, 0x8ECF, 0xB84A, 0x8ED0, 0xB84B, 0x8ED1, + 0xB84C, 0x8ED2, 0xB84D, 0x8ED3, 0xB84E, 0x8ED4, 0xB84F, 0x8ED5, + 0xB850, 0x8ED6, 0xB851, 0xB7CC, 0xB852, 0x8ED7, 0xB853, 0xB7CD, + 0xB854, 0x8ED8, 0xB855, 0x8ED9, 0xB856, 0x8EDA, 0xB857, 0x8EDB, + 0xB858, 0x8EDC, 0xB859, 0x8EDD, 0xB85A, 0x8EDE, 0xB85B, 0x8EDF, + 0xB85C, 0xB7CE, 0xB85D, 0xB7CF, 0xB85E, 0x8EE0, 0xB85F, 0x8EE1, + 0xB860, 0xB7D0, 0xB861, 0x8EE2, 0xB862, 0x8EE3, 0xB863, 0x8EE4, + 0xB864, 0xB7D1, 0xB865, 0x8EE5, 0xB866, 0x8EE6, 0xB867, 0x8EE7, + 0xB868, 0x8EE8, 0xB869, 0x8EE9, 0xB86A, 0x8EEA, 0xB86B, 0x8EEB, + 0xB86C, 0xB7D2, 0xB86D, 0xB7D3, 0xB86E, 0x8EEC, 0xB86F, 0xB7D4, + 0xB870, 0x8EED, 0xB871, 0xB7D5, 0xB872, 0x8EEE, 0xB873, 0x8EEF, + 0xB874, 0x8EF0, 0xB875, 0x8EF1, 0xB876, 0x8EF2, 0xB877, 0x8EF3, + 0xB878, 0xB7D6, 0xB879, 0x8EF4, 0xB87A, 0x8EF5, 0xB87B, 0x8EF6, + 0xB87C, 0xB7D7, 0xB87D, 0x8EF7, 0xB87E, 0x8EF8, 0xB87F, 0x8EF9, + 0xB880, 0x8EFA, 0xB881, 0x8EFB, 0xB882, 0x8EFC, 0xB883, 0x8EFD, + 0xB884, 0x8EFE, 0xB885, 0x8F41, 0xB886, 0x8F42, 0xB887, 0x8F43, + 0xB888, 0x8F44, 0xB889, 0x8F45, 0xB88A, 0x8F46, 0xB88B, 0x8F47, + 0xB88C, 0x8F48, 0xB88D, 0xB7D8, 0xB88E, 0x8F49, 0xB88F, 0x8F4A, + 0xB890, 0x8F4B, 0xB891, 0x8F4C, 0xB892, 0x8F4D, 0xB893, 0x8F4E, + 0xB894, 0x8F4F, 0xB895, 0x8F50, 0xB896, 0x8F51, 0xB897, 0x8F52, + 0xB898, 0x8F53, 0xB899, 0x8F54, 0xB89A, 0x8F55, 0xB89B, 0x8F56, + 0xB89C, 0x8F57, 0xB89D, 0x8F58, 0xB89E, 0x8F59, 0xB89F, 0x8F5A, + 0xB8A0, 0x8F61, 0xB8A1, 0x8F62, 0xB8A2, 0x8F63, 0xB8A3, 0x8F64, + 0xB8A4, 0x8F65, 0xB8A5, 0x8F66, 0xB8A6, 0x8F67, 0xB8A7, 0x8F68, + 0xB8A8, 0xB7D9, 0xB8A9, 0x8F69, 0xB8AA, 0x8F6A, 0xB8AB, 0x8F6B, + 0xB8AC, 0x8F6C, 0xB8AD, 0x8F6D, 0xB8AE, 0x8F6E, 0xB8AF, 0x8F6F, + 0xB8B0, 0xB7DA, 0xB8B1, 0x8F70, 0xB8B2, 0x8F71, 0xB8B3, 0x8F72, + 0xB8B4, 0xB7DB, 0xB8B5, 0x8F73, 0xB8B6, 0x8F74, 0xB8B7, 0x8F75, + 0xB8B8, 0xB7DC, 0xB8B9, 0x8F76, 0xB8BA, 0x8F77, 0xB8BB, 0x8F78, + 0xB8BC, 0x8F79, 0xB8BD, 0x8F7A, 0xB8BE, 0x8F81, 0xB8BF, 0x8F82, + 0xB8C0, 0xB7DD, 0xB8C1, 0xB7DE, 0xB8C2, 0x8F83, 0xB8C3, 0xB7DF, + 0xB8C4, 0x8F84, 0xB8C5, 0xB7E0, 0xB8C6, 0x8F85, 0xB8C7, 0x8F86, + 0xB8C8, 0x8F87, 0xB8C9, 0x8F88, 0xB8CA, 0x8F89, 0xB8CB, 0x8F8A, + 0xB8CC, 0xB7E1, 0xB8CD, 0x8F8B, 0xB8CE, 0x8F8C, 0xB8CF, 0x8F8D, + 0xB8D0, 0xB7E2, 0xB8D1, 0x8F8E, 0xB8D2, 0x8F8F, 0xB8D3, 0x8F90, + 0xB8D4, 0xB7E3, 0xB8D5, 0x8F91, 0xB8D6, 0x8F92, 0xB8D7, 0x8F93, + 0xB8D8, 0x8F94, 0xB8D9, 0x8F95, 0xB8DA, 0x8F96, 0xB8DB, 0x8F97, + 0xB8DC, 0x8F98, 0xB8DD, 0xB7E4, 0xB8DE, 0x8F99, 0xB8DF, 0xB7E5, + 0xB8E0, 0x8F9A, 0xB8E1, 0xB7E6, 0xB8E2, 0x8F9B, 0xB8E3, 0x8F9C, + 0xB8E4, 0x8F9D, 0xB8E5, 0x8F9E, 0xB8E6, 0x8F9F, 0xB8E7, 0x8FA0, + 0xB8E8, 0xB7E7, 0xB8E9, 0xB7E8, 0xB8EA, 0x8FA1, 0xB8EB, 0x8FA2, + 0xB8EC, 0xB7E9, 0xB8ED, 0x8FA3, 0xB8EE, 0x8FA4, 0xB8EF, 0x8FA5, + 0xB8F0, 0xB7EA, 0xB8F1, 0x8FA6, 0xB8F2, 0x8FA7, 0xB8F3, 0x8FA8, + 0xB8F4, 0x8FA9, 0xB8F5, 0x8FAA, 0xB8F6, 0x8FAB, 0xB8F7, 0x8FAC, + 0xB8F8, 0xB7EB, 0xB8F9, 0xB7EC, 0xB8FA, 0x8FAD, 0xB8FB, 0xB7ED, + 0xB8FC, 0x8FAE, 0xB8FD, 0xB7EE, 0xB8FE, 0x8FAF, 0xB8FF, 0x8FB0, + 0xB900, 0x8FB1, 0xB901, 0x8FB2, 0xB902, 0x8FB3, 0xB903, 0x8FB4, + 0xB904, 0xB7EF, 0xB905, 0x8FB5, 0xB906, 0x8FB6, 0xB907, 0x8FB7, + 0xB908, 0x8FB8, 0xB909, 0x8FB9, 0xB90A, 0x8FBA, 0xB90B, 0x8FBB, + 0xB90C, 0x8FBC, 0xB90D, 0x8FBD, 0xB90E, 0x8FBE, 0xB90F, 0x8FBF, + 0xB910, 0x8FC0, 0xB911, 0x8FC1, 0xB912, 0x8FC2, 0xB913, 0x8FC3, + 0xB914, 0x8FC4, 0xB915, 0x8FC5, 0xB916, 0x8FC6, 0xB917, 0x8FC7, + 0xB918, 0xB7F0, 0xB919, 0x8FC8, 0xB91A, 0x8FC9, 0xB91B, 0x8FCA, + 0xB91C, 0x8FCB, 0xB91D, 0x8FCC, 0xB91E, 0x8FCD, 0xB91F, 0x8FCE, + 0xB920, 0xB7F1, 0xB921, 0x8FCF, 0xB922, 0x8FD0, 0xB923, 0x8FD1, + 0xB924, 0x8FD2, 0xB925, 0x8FD3, 0xB926, 0x8FD4, 0xB927, 0x8FD5, + 0xB928, 0x8FD6, 0xB929, 0x8FD7, 0xB92A, 0x8FD8, 0xB92B, 0x8FD9, + 0xB92C, 0x8FDA, 0xB92D, 0x8FDB, 0xB92E, 0x8FDC, 0xB92F, 0x8FDD, + 0xB930, 0x8FDE, 0xB931, 0x8FDF, 0xB932, 0x8FE0, 0xB933, 0x8FE1, + 0xB934, 0x8FE2, 0xB935, 0x8FE3, 0xB936, 0x8FE4, 0xB937, 0x8FE5, + 0xB938, 0x8FE6, 0xB939, 0x8FE7, 0xB93A, 0x8FE8, 0xB93B, 0x8FE9, + 0xB93C, 0xB7F2, 0xB93D, 0xB7F3, 0xB93E, 0x8FEA, 0xB93F, 0x8FEB, + 0xB940, 0xB7F4, 0xB941, 0x8FEC, 0xB942, 0x8FED, 0xB943, 0x8FEE, + 0xB944, 0xB7F5, 0xB945, 0x8FEF, 0xB946, 0x8FF0, 0xB947, 0x8FF1, + 0xB948, 0x8FF2, 0xB949, 0x8FF3, 0xB94A, 0x8FF4, 0xB94B, 0x8FF5, + 0xB94C, 0xB7F6, 0xB94D, 0x8FF6, 0xB94E, 0x8FF7, 0xB94F, 0xB7F7, + 0xB950, 0x8FF8, 0xB951, 0xB7F8, 0xB952, 0x8FF9, 0xB953, 0x8FFA, + 0xB954, 0x8FFB, 0xB955, 0x8FFC, 0xB956, 0x8FFD, 0xB957, 0x8FFE, + 0xB958, 0xB7F9, 0xB959, 0xB7FA, 0xB95A, 0x9041, 0xB95B, 0x9042, + 0xB95C, 0xB7FB, 0xB95D, 0x9043, 0xB95E, 0x9044, 0xB95F, 0x9045, + 0xB960, 0xB7FC, 0xB961, 0x9046, 0xB962, 0x9047, 0xB963, 0x9048, + 0xB964, 0x9049, 0xB965, 0x904A, 0xB966, 0x904B, 0xB967, 0x904C, + 0xB968, 0xB7FD, 0xB969, 0xB7FE, 0xB96A, 0x904D, 0xB96B, 0xB8A1, + 0xB96C, 0x904E, 0xB96D, 0xB8A2, 0xB96E, 0x904F, 0xB96F, 0x9050, + 0xB970, 0x9051, 0xB971, 0x9052, 0xB972, 0x9053, 0xB973, 0x9054, + 0xB974, 0xB8A3, 0xB975, 0xB8A4, 0xB976, 0x9055, 0xB977, 0x9056, + 0xB978, 0xB8A5, 0xB979, 0x9057, 0xB97A, 0x9058, 0xB97B, 0x9059, + 0xB97C, 0xB8A6, 0xB97D, 0x905A, 0xB97E, 0x9061, 0xB97F, 0x9062, + 0xB980, 0x9063, 0xB981, 0x9064, 0xB982, 0x9065, 0xB983, 0x9066, + 0xB984, 0xB8A7, 0xB985, 0xB8A8, 0xB986, 0x9067, 0xB987, 0xB8A9, + 0xB988, 0x9068, 0xB989, 0xB8AA, 0xB98A, 0xB8AB, 0xB98B, 0x9069, + 0xB98C, 0x906A, 0xB98D, 0xB8AC, 0xB98E, 0xB8AD, 0xB98F, 0x906B, + 0xB990, 0x906C, 0xB991, 0x906D, 0xB992, 0x906E, 0xB993, 0x906F, + 0xB994, 0x9070, 0xB995, 0x9071, 0xB996, 0x9072, 0xB997, 0x9073, + 0xB998, 0x9074, 0xB999, 0x9075, 0xB99A, 0x9076, 0xB99B, 0x9077, + 0xB99C, 0x9078, 0xB99D, 0x9079, 0xB99E, 0x907A, 0xB99F, 0x9081, + 0xB9A0, 0x9082, 0xB9A1, 0x9083, 0xB9A2, 0x9084, 0xB9A3, 0x9085, + 0xB9A4, 0x9086, 0xB9A5, 0x9087, 0xB9A6, 0x9088, 0xB9A7, 0x9089, + 0xB9A8, 0x908A, 0xB9A9, 0x908B, 0xB9AA, 0x908C, 0xB9AB, 0x908D, + 0xB9AC, 0xB8AE, 0xB9AD, 0xB8AF, 0xB9AE, 0x908E, 0xB9AF, 0x908F, + 0xB9B0, 0xB8B0, 0xB9B1, 0x9090, 0xB9B2, 0x9091, 0xB9B3, 0x9092, + 0xB9B4, 0xB8B1, 0xB9B5, 0x9093, 0xB9B6, 0x9094, 0xB9B7, 0x9095, + 0xB9B8, 0x9096, 0xB9B9, 0x9097, 0xB9BA, 0x9098, 0xB9BB, 0x9099, + 0xB9BC, 0xB8B2, 0xB9BD, 0xB8B3, 0xB9BE, 0x909A, 0xB9BF, 0xB8B4, + 0xB9C0, 0x909B, 0xB9C1, 0xB8B5, 0xB9C2, 0x909C, 0xB9C3, 0x909D, + 0xB9C4, 0x909E, 0xB9C5, 0x909F, 0xB9C6, 0x90A0, 0xB9C7, 0x90A1, + 0xB9C8, 0xB8B6, 0xB9C9, 0xB8B7, 0xB9CA, 0x90A2, 0xB9CB, 0x90A3, + 0xB9CC, 0xB8B8, 0xB9CD, 0x90A4, 0xB9CE, 0xB8B9, 0xB9CF, 0xB8BA, + 0xB9D0, 0xB8BB, 0xB9D1, 0xB8BC, 0xB9D2, 0xB8BD, 0xB9D3, 0x90A5, + 0xB9D4, 0x90A6, 0xB9D5, 0x90A7, 0xB9D6, 0x90A8, 0xB9D7, 0x90A9, + 0xB9D8, 0xB8BE, 0xB9D9, 0xB8BF, 0xB9DA, 0x90AA, 0xB9DB, 0xB8C0, + 0xB9DC, 0x90AB, 0xB9DD, 0xB8C1, 0xB9DE, 0xB8C2, 0xB9DF, 0x90AC, + 0xB9E0, 0x90AD, 0xB9E1, 0xB8C3, 0xB9E2, 0x90AE, 0xB9E3, 0xB8C4, + 0xB9E4, 0xB8C5, 0xB9E5, 0xB8C6, 0xB9E6, 0x90AF, 0xB9E7, 0x90B0, + 0xB9E8, 0xB8C7, 0xB9E9, 0x90B1, 0xB9EA, 0x90B2, 0xB9EB, 0x90B3, + 0xB9EC, 0xB8C8, 0xB9ED, 0x90B4, 0xB9EE, 0x90B5, 0xB9EF, 0x90B6, + 0xB9F0, 0x90B7, 0xB9F1, 0x90B8, 0xB9F2, 0x90B9, 0xB9F3, 0x90BA, + 0xB9F4, 0xB8C9, 0xB9F5, 0xB8CA, 0xB9F6, 0x90BB, 0xB9F7, 0xB8CB, + 0xB9F8, 0xB8CC, 0xB9F9, 0xB8CD, 0xB9FA, 0xB8CE, 0xB9FB, 0x90BC, + 0xB9FC, 0x90BD, 0xB9FD, 0x90BE, 0xB9FE, 0x90BF, 0xB9FF, 0x90C0, + 0xBA00, 0xB8CF, 0xBA01, 0xB8D0, 0xBA02, 0x90C1, 0xBA03, 0x90C2, + 0xBA04, 0x90C3, 0xBA05, 0x90C4, 0xBA06, 0x90C5, 0xBA07, 0x90C6, + 0xBA08, 0xB8D1, 0xBA09, 0x90C7, 0xBA0A, 0x90C8, 0xBA0B, 0x90C9, + 0xBA0C, 0x90CA, 0xBA0D, 0x90CB, 0xBA0E, 0x90CC, 0xBA0F, 0x90CD, + 0xBA10, 0x90CE, 0xBA11, 0x90CF, 0xBA12, 0x90D0, 0xBA13, 0x90D1, + 0xBA14, 0x90D2, 0xBA15, 0xB8D2, 0xBA16, 0x90D3, 0xBA17, 0x90D4, + 0xBA18, 0x90D5, 0xBA19, 0x90D6, 0xBA1A, 0x90D7, 0xBA1B, 0x90D8, + 0xBA1C, 0x90D9, 0xBA1D, 0x90DA, 0xBA1E, 0x90DB, 0xBA1F, 0x90DC, + 0xBA20, 0x90DD, 0xBA21, 0x90DE, 0xBA22, 0x90DF, 0xBA23, 0x90E0, + 0xBA24, 0x90E1, 0xBA25, 0x90E2, 0xBA26, 0x90E3, 0xBA27, 0x90E4, + 0xBA28, 0x90E5, 0xBA29, 0x90E6, 0xBA2A, 0x90E7, 0xBA2B, 0x90E8, + 0xBA2C, 0x90E9, 0xBA2D, 0x90EA, 0xBA2E, 0x90EB, 0xBA2F, 0x90EC, + 0xBA30, 0x90ED, 0xBA31, 0x90EE, 0xBA32, 0x90EF, 0xBA33, 0x90F0, + 0xBA34, 0x90F1, 0xBA35, 0x90F2, 0xBA36, 0x90F3, 0xBA37, 0x90F4, + 0xBA38, 0xB8D3, 0xBA39, 0xB8D4, 0xBA3A, 0x90F5, 0xBA3B, 0x90F6, + 0xBA3C, 0xB8D5, 0xBA3D, 0x90F7, 0xBA3E, 0x90F8, 0xBA3F, 0x90F9, + 0xBA40, 0xB8D6, 0xBA41, 0x90FA, 0xBA42, 0xB8D7, 0xBA43, 0x90FB, + 0xBA44, 0x90FC, 0xBA45, 0x90FD, 0xBA46, 0x90FE, 0xBA47, 0x9141, + 0xBA48, 0xB8D8, 0xBA49, 0xB8D9, 0xBA4A, 0x9142, 0xBA4B, 0xB8DA, + 0xBA4C, 0x9143, 0xBA4D, 0xB8DB, 0xBA4E, 0xB8DC, 0xBA4F, 0x9144, + 0xBA50, 0x9145, 0xBA51, 0x9146, 0xBA52, 0x9147, 0xBA53, 0xB8DD, + 0xBA54, 0xB8DE, 0xBA55, 0xB8DF, 0xBA56, 0x9148, 0xBA57, 0x9149, + 0xBA58, 0xB8E0, 0xBA59, 0x914A, 0xBA5A, 0x914B, 0xBA5B, 0x914C, + 0xBA5C, 0xB8E1, 0xBA5D, 0x914D, 0xBA5E, 0x914E, 0xBA5F, 0x914F, + 0xBA60, 0x9150, 0xBA61, 0x9151, 0xBA62, 0x9152, 0xBA63, 0x9153, + 0xBA64, 0xB8E2, 0xBA65, 0xB8E3, 0xBA66, 0x9154, 0xBA67, 0xB8E4, + 0xBA68, 0xB8E5, 0xBA69, 0xB8E6, 0xBA6A, 0x9155, 0xBA6B, 0x9156, + 0xBA6C, 0x9157, 0xBA6D, 0x9158, 0xBA6E, 0x9159, 0xBA6F, 0x915A, + 0xBA70, 0xB8E7, 0xBA71, 0xB8E8, 0xBA72, 0x9161, 0xBA73, 0x9162, + 0xBA74, 0xB8E9, 0xBA75, 0x9163, 0xBA76, 0x9164, 0xBA77, 0x9165, + 0xBA78, 0xB8EA, 0xBA79, 0x9166, 0xBA7A, 0x9167, 0xBA7B, 0x9168, + 0xBA7C, 0x9169, 0xBA7D, 0x916A, 0xBA7E, 0x916B, 0xBA7F, 0x916C, + 0xBA80, 0x916D, 0xBA81, 0x916E, 0xBA82, 0x916F, 0xBA83, 0xB8EB, + 0xBA84, 0xB8EC, 0xBA85, 0xB8ED, 0xBA86, 0x9170, 0xBA87, 0xB8EE, + 0xBA88, 0x9171, 0xBA89, 0x9172, 0xBA8A, 0x9173, 0xBA8B, 0x9174, + 0xBA8C, 0xB8EF, 0xBA8D, 0x9175, 0xBA8E, 0x9176, 0xBA8F, 0x9177, + 0xBA90, 0x9178, 0xBA91, 0x9179, 0xBA92, 0x917A, 0xBA93, 0x9181, + 0xBA94, 0x9182, 0xBA95, 0x9183, 0xBA96, 0x9184, 0xBA97, 0x9185, + 0xBA98, 0x9186, 0xBA99, 0x9187, 0xBA9A, 0x9188, 0xBA9B, 0x9189, + 0xBA9C, 0x918A, 0xBA9D, 0x918B, 0xBA9E, 0x918C, 0xBA9F, 0x918D, + 0xBAA0, 0x918E, 0xBAA1, 0x918F, 0xBAA2, 0x9190, 0xBAA3, 0x9191, + 0xBAA4, 0x9192, 0xBAA5, 0x9193, 0xBAA6, 0x9194, 0xBAA7, 0x9195, + 0xBAA8, 0xB8F0, 0xBAA9, 0xB8F1, 0xBAAA, 0x9196, 0xBAAB, 0xB8F2, + 0xBAAC, 0xB8F3, 0xBAAD, 0x9197, 0xBAAE, 0x9198, 0xBAAF, 0x9199, + 0xBAB0, 0xB8F4, 0xBAB1, 0x919A, 0xBAB2, 0xB8F5, 0xBAB3, 0x919B, + 0xBAB4, 0x919C, 0xBAB5, 0x919D, 0xBAB6, 0x919E, 0xBAB7, 0x919F, + 0xBAB8, 0xB8F6, 0xBAB9, 0xB8F7, 0xBABA, 0x91A0, 0xBABB, 0xB8F8, + 0xBABC, 0x91A1, 0xBABD, 0xB8F9, 0xBABE, 0x91A2, 0xBABF, 0x91A3, + 0xBAC0, 0x91A4, 0xBAC1, 0x91A5, 0xBAC2, 0x91A6, 0xBAC3, 0x91A7, + 0xBAC4, 0xB8FA, 0xBAC5, 0x91A8, 0xBAC6, 0x91A9, 0xBAC7, 0x91AA, + 0xBAC8, 0xB8FB, 0xBAC9, 0x91AB, 0xBACA, 0x91AC, 0xBACB, 0x91AD, + 0xBACC, 0x91AE, 0xBACD, 0x91AF, 0xBACE, 0x91B0, 0xBACF, 0x91B1, + 0xBAD0, 0x91B2, 0xBAD1, 0x91B3, 0xBAD2, 0x91B4, 0xBAD3, 0x91B5, + 0xBAD4, 0x91B6, 0xBAD5, 0x91B7, 0xBAD6, 0x91B8, 0xBAD7, 0x91B9, + 0xBAD8, 0xB8FC, 0xBAD9, 0xB8FD, 0xBADA, 0x91BA, 0xBADB, 0x91BB, + 0xBADC, 0x91BC, 0xBADD, 0x91BD, 0xBADE, 0x91BE, 0xBADF, 0x91BF, + 0xBAE0, 0x91C0, 0xBAE1, 0x91C1, 0xBAE2, 0x91C2, 0xBAE3, 0x91C3, + 0xBAE4, 0x91C4, 0xBAE5, 0x91C5, 0xBAE6, 0x91C6, 0xBAE7, 0x91C7, + 0xBAE8, 0x91C8, 0xBAE9, 0x91C9, 0xBAEA, 0x91CA, 0xBAEB, 0x91CB, + 0xBAEC, 0x91CC, 0xBAED, 0x91CD, 0xBAEE, 0x91CE, 0xBAEF, 0x91CF, + 0xBAF0, 0x91D0, 0xBAF1, 0x91D1, 0xBAF2, 0x91D2, 0xBAF3, 0x91D3, + 0xBAF4, 0x91D4, 0xBAF5, 0x91D5, 0xBAF6, 0x91D6, 0xBAF7, 0x91D7, + 0xBAF8, 0x91D8, 0xBAF9, 0x91D9, 0xBAFA, 0x91DA, 0xBAFB, 0x91DB, + 0xBAFC, 0xB8FE, 0xBAFD, 0x91DC, 0xBAFE, 0x91DD, 0xBAFF, 0x91DE, + 0xBB00, 0xB9A1, 0xBB01, 0x91DF, 0xBB02, 0x91E0, 0xBB03, 0x91E1, + 0xBB04, 0xB9A2, 0xBB05, 0x91E2, 0xBB06, 0x91E3, 0xBB07, 0x91E4, + 0xBB08, 0x91E5, 0xBB09, 0x91E6, 0xBB0A, 0x91E7, 0xBB0B, 0x91E8, + 0xBB0C, 0x91E9, 0xBB0D, 0xB9A3, 0xBB0E, 0x91EA, 0xBB0F, 0xB9A4, + 0xBB10, 0x91EB, 0xBB11, 0xB9A5, 0xBB12, 0x91EC, 0xBB13, 0x91ED, + 0xBB14, 0x91EE, 0xBB15, 0x91EF, 0xBB16, 0x91F0, 0xBB17, 0x91F1, + 0xBB18, 0xB9A6, 0xBB19, 0x91F2, 0xBB1A, 0x91F3, 0xBB1B, 0x91F4, + 0xBB1C, 0xB9A7, 0xBB1D, 0x91F5, 0xBB1E, 0x91F6, 0xBB1F, 0x91F7, + 0xBB20, 0xB9A8, 0xBB21, 0x91F8, 0xBB22, 0x91F9, 0xBB23, 0x91FA, + 0xBB24, 0x91FB, 0xBB25, 0x91FC, 0xBB26, 0x91FD, 0xBB27, 0x91FE, + 0xBB28, 0x9241, 0xBB29, 0xB9A9, 0xBB2A, 0x9242, 0xBB2B, 0xB9AA, + 0xBB2C, 0x9243, 0xBB2D, 0x9244, 0xBB2E, 0x9245, 0xBB2F, 0x9246, + 0xBB30, 0x9247, 0xBB31, 0x9248, 0xBB32, 0x9249, 0xBB33, 0x924A, + 0xBB34, 0xB9AB, 0xBB35, 0xB9AC, 0xBB36, 0xB9AD, 0xBB37, 0x924B, + 0xBB38, 0xB9AE, 0xBB39, 0x924C, 0xBB3A, 0x924D, 0xBB3B, 0xB9AF, + 0xBB3C, 0xB9B0, 0xBB3D, 0xB9B1, 0xBB3E, 0xB9B2, 0xBB3F, 0x924E, + 0xBB40, 0x924F, 0xBB41, 0x9250, 0xBB42, 0x9251, 0xBB43, 0x9252, + 0xBB44, 0xB9B3, 0xBB45, 0xB9B4, 0xBB46, 0x9253, 0xBB47, 0xB9B5, + 0xBB48, 0x9254, 0xBB49, 0xB9B6, 0xBB4A, 0x9255, 0xBB4B, 0x9256, + 0xBB4C, 0x9257, 0xBB4D, 0xB9B7, 0xBB4E, 0x9258, 0xBB4F, 0xB9B8, + 0xBB50, 0xB9B9, 0xBB51, 0x9259, 0xBB52, 0x925A, 0xBB53, 0x9261, + 0xBB54, 0xB9BA, 0xBB55, 0x9262, 0xBB56, 0x9263, 0xBB57, 0x9264, + 0xBB58, 0xB9BB, 0xBB59, 0x9265, 0xBB5A, 0x9266, 0xBB5B, 0x9267, + 0xBB5C, 0x9268, 0xBB5D, 0x9269, 0xBB5E, 0x926A, 0xBB5F, 0x926B, + 0xBB60, 0x926C, 0xBB61, 0xB9BC, 0xBB62, 0x926D, 0xBB63, 0xB9BD, + 0xBB64, 0x926E, 0xBB65, 0x926F, 0xBB66, 0x9270, 0xBB67, 0x9271, + 0xBB68, 0x9272, 0xBB69, 0x9273, 0xBB6A, 0x9274, 0xBB6B, 0x9275, + 0xBB6C, 0xB9BE, 0xBB6D, 0x9276, 0xBB6E, 0x9277, 0xBB6F, 0x9278, + 0xBB70, 0x9279, 0xBB71, 0x927A, 0xBB72, 0x9281, 0xBB73, 0x9282, + 0xBB74, 0x9283, 0xBB75, 0x9284, 0xBB76, 0x9285, 0xBB77, 0x9286, + 0xBB78, 0x9287, 0xBB79, 0x9288, 0xBB7A, 0x9289, 0xBB7B, 0x928A, + 0xBB7C, 0x928B, 0xBB7D, 0x928C, 0xBB7E, 0x928D, 0xBB7F, 0x928E, + 0xBB80, 0x928F, 0xBB81, 0x9290, 0xBB82, 0x9291, 0xBB83, 0x9292, + 0xBB84, 0x9293, 0xBB85, 0x9294, 0xBB86, 0x9295, 0xBB87, 0x9296, + 0xBB88, 0xB9BF, 0xBB89, 0x9297, 0xBB8A, 0x9298, 0xBB8B, 0x9299, + 0xBB8C, 0xB9C0, 0xBB8D, 0x929A, 0xBB8E, 0x929B, 0xBB8F, 0x929C, + 0xBB90, 0xB9C1, 0xBB91, 0x929D, 0xBB92, 0x929E, 0xBB93, 0x929F, + 0xBB94, 0x92A0, 0xBB95, 0x92A1, 0xBB96, 0x92A2, 0xBB97, 0x92A3, + 0xBB98, 0x92A4, 0xBB99, 0x92A5, 0xBB9A, 0x92A6, 0xBB9B, 0x92A7, + 0xBB9C, 0x92A8, 0xBB9D, 0x92A9, 0xBB9E, 0x92AA, 0xBB9F, 0x92AB, + 0xBBA0, 0x92AC, 0xBBA1, 0x92AD, 0xBBA2, 0x92AE, 0xBBA3, 0x92AF, + 0xBBA4, 0xB9C2, 0xBBA5, 0x92B0, 0xBBA6, 0x92B1, 0xBBA7, 0x92B2, + 0xBBA8, 0xB9C3, 0xBBA9, 0x92B3, 0xBBAA, 0x92B4, 0xBBAB, 0x92B5, + 0xBBAC, 0xB9C4, 0xBBAD, 0x92B6, 0xBBAE, 0x92B7, 0xBBAF, 0x92B8, + 0xBBB0, 0x92B9, 0xBBB1, 0x92BA, 0xBBB2, 0x92BB, 0xBBB3, 0x92BC, + 0xBBB4, 0xB9C5, 0xBBB5, 0x92BD, 0xBBB6, 0x92BE, 0xBBB7, 0xB9C6, + 0xBBB8, 0x92BF, 0xBBB9, 0x92C0, 0xBBBA, 0x92C1, 0xBBBB, 0x92C2, + 0xBBBC, 0x92C3, 0xBBBD, 0x92C4, 0xBBBE, 0x92C5, 0xBBBF, 0x92C6, + 0xBBC0, 0xB9C7, 0xBBC1, 0x92C7, 0xBBC2, 0x92C8, 0xBBC3, 0x92C9, + 0xBBC4, 0xB9C8, 0xBBC5, 0x92CA, 0xBBC6, 0x92CB, 0xBBC7, 0x92CC, + 0xBBC8, 0xB9C9, 0xBBC9, 0x92CD, 0xBBCA, 0x92CE, 0xBBCB, 0x92CF, + 0xBBCC, 0x92D0, 0xBBCD, 0x92D1, 0xBBCE, 0x92D2, 0xBBCF, 0x92D3, + 0xBBD0, 0xB9CA, 0xBBD1, 0x92D4, 0xBBD2, 0x92D5, 0xBBD3, 0xB9CB, + 0xBBD4, 0x92D6, 0xBBD5, 0x92D7, 0xBBD6, 0x92D8, 0xBBD7, 0x92D9, + 0xBBD8, 0x92DA, 0xBBD9, 0x92DB, 0xBBDA, 0x92DC, 0xBBDB, 0x92DD, + 0xBBDC, 0x92DE, 0xBBDD, 0x92DF, 0xBBDE, 0x92E0, 0xBBDF, 0x92E1, + 0xBBE0, 0x92E2, 0xBBE1, 0x92E3, 0xBBE2, 0x92E4, 0xBBE3, 0x92E5, + 0xBBE4, 0x92E6, 0xBBE5, 0x92E7, 0xBBE6, 0x92E8, 0xBBE7, 0x92E9, + 0xBBE8, 0x92EA, 0xBBE9, 0x92EB, 0xBBEA, 0x92EC, 0xBBEB, 0x92ED, + 0xBBEC, 0x92EE, 0xBBED, 0x92EF, 0xBBEE, 0x92F0, 0xBBEF, 0x92F1, + 0xBBF0, 0x92F2, 0xBBF1, 0x92F3, 0xBBF2, 0x92F4, 0xBBF3, 0x92F5, + 0xBBF4, 0x92F6, 0xBBF5, 0x92F7, 0xBBF6, 0x92F8, 0xBBF7, 0x92F9, + 0xBBF8, 0xB9CC, 0xBBF9, 0xB9CD, 0xBBFA, 0x92FA, 0xBBFB, 0x92FB, + 0xBBFC, 0xB9CE, 0xBBFD, 0x92FC, 0xBBFE, 0x92FD, 0xBBFF, 0xB9CF, + 0xBC00, 0xB9D0, 0xBC01, 0x92FE, 0xBC02, 0xB9D1, 0xBC03, 0x9341, + 0xBC04, 0x9342, 0xBC05, 0x9343, 0xBC06, 0x9344, 0xBC07, 0x9345, + 0xBC08, 0xB9D2, 0xBC09, 0xB9D3, 0xBC0A, 0x9346, 0xBC0B, 0xB9D4, + 0xBC0C, 0xB9D5, 0xBC0D, 0xB9D6, 0xBC0E, 0x9347, 0xBC0F, 0xB9D7, + 0xBC10, 0x9348, 0xBC11, 0xB9D8, 0xBC12, 0x9349, 0xBC13, 0x934A, + 0xBC14, 0xB9D9, 0xBC15, 0xB9DA, 0xBC16, 0xB9DB, 0xBC17, 0xB9DC, + 0xBC18, 0xB9DD, 0xBC19, 0x934B, 0xBC1A, 0x934C, 0xBC1B, 0xB9DE, + 0xBC1C, 0xB9DF, 0xBC1D, 0xB9E0, 0xBC1E, 0xB9E1, 0xBC1F, 0xB9E2, + 0xBC20, 0x934D, 0xBC21, 0x934E, 0xBC22, 0x934F, 0xBC23, 0x9350, + 0xBC24, 0xB9E3, 0xBC25, 0xB9E4, 0xBC26, 0x9351, 0xBC27, 0xB9E5, + 0xBC28, 0x9352, 0xBC29, 0xB9E6, 0xBC2A, 0x9353, 0xBC2B, 0x9354, + 0xBC2C, 0x9355, 0xBC2D, 0xB9E7, 0xBC2E, 0x9356, 0xBC2F, 0x9357, + 0xBC30, 0xB9E8, 0xBC31, 0xB9E9, 0xBC32, 0x9358, 0xBC33, 0x9359, + 0xBC34, 0xB9EA, 0xBC35, 0x935A, 0xBC36, 0x9361, 0xBC37, 0x9362, + 0xBC38, 0xB9EB, 0xBC39, 0x9363, 0xBC3A, 0x9364, 0xBC3B, 0x9365, + 0xBC3C, 0x9366, 0xBC3D, 0x9367, 0xBC3E, 0x9368, 0xBC3F, 0x9369, + 0xBC40, 0xB9EC, 0xBC41, 0xB9ED, 0xBC42, 0x936A, 0xBC43, 0xB9EE, + 0xBC44, 0xB9EF, 0xBC45, 0xB9F0, 0xBC46, 0x936B, 0xBC47, 0x936C, + 0xBC48, 0x936D, 0xBC49, 0xB9F1, 0xBC4A, 0x936E, 0xBC4B, 0x936F, + 0xBC4C, 0xB9F2, 0xBC4D, 0xB9F3, 0xBC4E, 0x9370, 0xBC4F, 0x9371, + 0xBC50, 0xB9F4, 0xBC51, 0x9372, 0xBC52, 0x9373, 0xBC53, 0x9374, + 0xBC54, 0x9375, 0xBC55, 0x9376, 0xBC56, 0x9377, 0xBC57, 0x9378, + 0xBC58, 0x9379, 0xBC59, 0x937A, 0xBC5A, 0x9381, 0xBC5B, 0x9382, + 0xBC5C, 0x9383, 0xBC5D, 0xB9F5, 0xBC5E, 0x9384, 0xBC5F, 0x9385, + 0xBC60, 0x9386, 0xBC61, 0x9387, 0xBC62, 0x9388, 0xBC63, 0x9389, + 0xBC64, 0x938A, 0xBC65, 0x938B, 0xBC66, 0x938C, 0xBC67, 0x938D, + 0xBC68, 0x938E, 0xBC69, 0x938F, 0xBC6A, 0x9390, 0xBC6B, 0x9391, + 0xBC6C, 0x9392, 0xBC6D, 0x9393, 0xBC6E, 0x9394, 0xBC6F, 0x9395, + 0xBC70, 0x9396, 0xBC71, 0x9397, 0xBC72, 0x9398, 0xBC73, 0x9399, + 0xBC74, 0x939A, 0xBC75, 0x939B, 0xBC76, 0x939C, 0xBC77, 0x939D, + 0xBC78, 0x939E, 0xBC79, 0x939F, 0xBC7A, 0x93A0, 0xBC7B, 0x93A1, + 0xBC7C, 0x93A2, 0xBC7D, 0x93A3, 0xBC7E, 0x93A4, 0xBC7F, 0x93A5, + 0xBC80, 0x93A6, 0xBC81, 0x93A7, 0xBC82, 0x93A8, 0xBC83, 0x93A9, + 0xBC84, 0xB9F6, 0xBC85, 0xB9F7, 0xBC86, 0x93AA, 0xBC87, 0x93AB, + 0xBC88, 0xB9F8, 0xBC89, 0x93AC, 0xBC8A, 0x93AD, 0xBC8B, 0xB9F9, + 0xBC8C, 0xB9FA, 0xBC8D, 0x93AE, 0xBC8E, 0xB9FB, 0xBC8F, 0x93AF, + 0xBC90, 0x93B0, 0xBC91, 0x93B1, 0xBC92, 0x93B2, 0xBC93, 0x93B3, + 0xBC94, 0xB9FC, 0xBC95, 0xB9FD, 0xBC96, 0x93B4, 0xBC97, 0xB9FE, + 0xBC98, 0x93B5, 0xBC99, 0xBAA1, 0xBC9A, 0xBAA2, 0xBC9B, 0x93B6, + 0xBC9C, 0x93B7, 0xBC9D, 0x93B8, 0xBC9E, 0x93B9, 0xBC9F, 0x93BA, + 0xBCA0, 0xBAA3, 0xBCA1, 0xBAA4, 0xBCA2, 0x93BB, 0xBCA3, 0x93BC, + 0xBCA4, 0xBAA5, 0xBCA5, 0x93BD, 0xBCA6, 0x93BE, 0xBCA7, 0xBAA6, + 0xBCA8, 0xBAA7, 0xBCA9, 0x93BF, 0xBCAA, 0x93C0, 0xBCAB, 0x93C1, + 0xBCAC, 0x93C2, 0xBCAD, 0x93C3, 0xBCAE, 0x93C4, 0xBCAF, 0x93C5, + 0xBCB0, 0xBAA8, 0xBCB1, 0xBAA9, 0xBCB2, 0x93C6, 0xBCB3, 0xBAAA, + 0xBCB4, 0xBAAB, 0xBCB5, 0xBAAC, 0xBCB6, 0x93C7, 0xBCB7, 0x93C8, + 0xBCB8, 0x93C9, 0xBCB9, 0x93CA, 0xBCBA, 0x93CB, 0xBCBB, 0x93CC, + 0xBCBC, 0xBAAD, 0xBCBD, 0xBAAE, 0xBCBE, 0x93CD, 0xBCBF, 0x93CE, + 0xBCC0, 0xBAAF, 0xBCC1, 0x93CF, 0xBCC2, 0x93D0, 0xBCC3, 0x93D1, + 0xBCC4, 0xBAB0, 0xBCC5, 0x93D2, 0xBCC6, 0x93D3, 0xBCC7, 0x93D4, + 0xBCC8, 0x93D5, 0xBCC9, 0x93D6, 0xBCCA, 0x93D7, 0xBCCB, 0x93D8, + 0xBCCC, 0x93D9, 0xBCCD, 0xBAB1, 0xBCCE, 0x93DA, 0xBCCF, 0xBAB2, + 0xBCD0, 0xBAB3, 0xBCD1, 0xBAB4, 0xBCD2, 0x93DB, 0xBCD3, 0x93DC, + 0xBCD4, 0x93DD, 0xBCD5, 0xBAB5, 0xBCD6, 0x93DE, 0xBCD7, 0x93DF, + 0xBCD8, 0xBAB6, 0xBCD9, 0x93E0, 0xBCDA, 0x93E1, 0xBCDB, 0x93E2, + 0xBCDC, 0xBAB7, 0xBCDD, 0x93E3, 0xBCDE, 0x93E4, 0xBCDF, 0x93E5, + 0xBCE0, 0x93E6, 0xBCE1, 0x93E7, 0xBCE2, 0x93E8, 0xBCE3, 0x93E9, + 0xBCE4, 0x93EA, 0xBCE5, 0x93EB, 0xBCE6, 0x93EC, 0xBCE7, 0x93ED, + 0xBCE8, 0x93EE, 0xBCE9, 0x93EF, 0xBCEA, 0x93F0, 0xBCEB, 0x93F1, + 0xBCEC, 0x93F2, 0xBCED, 0x93F3, 0xBCEE, 0x93F4, 0xBCEF, 0x93F5, + 0xBCF0, 0x93F6, 0xBCF1, 0x93F7, 0xBCF2, 0x93F8, 0xBCF3, 0x93F9, + 0xBCF4, 0xBAB8, 0xBCF5, 0xBAB9, 0xBCF6, 0xBABA, 0xBCF7, 0x93FA, + 0xBCF8, 0xBABB, 0xBCF9, 0x93FB, 0xBCFA, 0x93FC, 0xBCFB, 0x93FD, + 0xBCFC, 0xBABC, 0xBCFD, 0x93FE, 0xBCFE, 0x9441, 0xBCFF, 0x9442, + 0xBD00, 0x9443, 0xBD01, 0x9444, 0xBD02, 0x9445, 0xBD03, 0x9446, + 0xBD04, 0xBABD, 0xBD05, 0xBABE, 0xBD06, 0x9447, 0xBD07, 0xBABF, + 0xBD08, 0x9448, 0xBD09, 0xBAC0, 0xBD0A, 0x9449, 0xBD0B, 0x944A, + 0xBD0C, 0x944B, 0xBD0D, 0x944C, 0xBD0E, 0x944D, 0xBD0F, 0x944E, + 0xBD10, 0xBAC1, 0xBD11, 0x944F, 0xBD12, 0x9450, 0xBD13, 0x9451, + 0xBD14, 0xBAC2, 0xBD15, 0x9452, 0xBD16, 0x9453, 0xBD17, 0x9454, + 0xBD18, 0x9455, 0xBD19, 0x9456, 0xBD1A, 0x9457, 0xBD1B, 0x9458, + 0xBD1C, 0x9459, 0xBD1D, 0x945A, 0xBD1E, 0x9461, 0xBD1F, 0x9462, + 0xBD20, 0x9463, 0xBD21, 0x9464, 0xBD22, 0x9465, 0xBD23, 0x9466, + 0xBD24, 0xBAC3, 0xBD25, 0x9467, 0xBD26, 0x9468, 0xBD27, 0x9469, + 0xBD28, 0x946A, 0xBD29, 0x946B, 0xBD2A, 0x946C, 0xBD2B, 0x946D, + 0xBD2C, 0xBAC4, 0xBD2D, 0x946E, 0xBD2E, 0x946F, 0xBD2F, 0x9470, + 0xBD30, 0x9471, 0xBD31, 0x9472, 0xBD32, 0x9473, 0xBD33, 0x9474, + 0xBD34, 0x9475, 0xBD35, 0x9476, 0xBD36, 0x9477, 0xBD37, 0x9478, + 0xBD38, 0x9479, 0xBD39, 0x947A, 0xBD3A, 0x9481, 0xBD3B, 0x9482, + 0xBD3C, 0x9483, 0xBD3D, 0x9484, 0xBD3E, 0x9485, 0xBD3F, 0x9486, + 0xBD40, 0xBAC5, 0xBD41, 0x9487, 0xBD42, 0x9488, 0xBD43, 0x9489, + 0xBD44, 0x948A, 0xBD45, 0x948B, 0xBD46, 0x948C, 0xBD47, 0x948D, + 0xBD48, 0xBAC6, 0xBD49, 0xBAC7, 0xBD4A, 0x948E, 0xBD4B, 0x948F, + 0xBD4C, 0xBAC8, 0xBD4D, 0x9490, 0xBD4E, 0x9491, 0xBD4F, 0x9492, + 0xBD50, 0xBAC9, 0xBD51, 0x9493, 0xBD52, 0x9494, 0xBD53, 0x9495, + 0xBD54, 0x9496, 0xBD55, 0x9497, 0xBD56, 0x9498, 0xBD57, 0x9499, + 0xBD58, 0xBACA, 0xBD59, 0xBACB, 0xBD5A, 0x949A, 0xBD5B, 0x949B, + 0xBD5C, 0x949C, 0xBD5D, 0x949D, 0xBD5E, 0x949E, 0xBD5F, 0x949F, + 0xBD60, 0x94A0, 0xBD61, 0x94A1, 0xBD62, 0x94A2, 0xBD63, 0x94A3, + 0xBD64, 0xBACC, 0xBD65, 0x94A4, 0xBD66, 0x94A5, 0xBD67, 0x94A6, + 0xBD68, 0xBACD, 0xBD69, 0x94A7, 0xBD6A, 0x94A8, 0xBD6B, 0x94A9, + 0xBD6C, 0x94AA, 0xBD6D, 0x94AB, 0xBD6E, 0x94AC, 0xBD6F, 0x94AD, + 0xBD70, 0x94AE, 0xBD71, 0x94AF, 0xBD72, 0x94B0, 0xBD73, 0x94B1, + 0xBD74, 0x94B2, 0xBD75, 0x94B3, 0xBD76, 0x94B4, 0xBD77, 0x94B5, + 0xBD78, 0x94B6, 0xBD79, 0x94B7, 0xBD7A, 0x94B8, 0xBD7B, 0x94B9, + 0xBD7C, 0x94BA, 0xBD7D, 0x94BB, 0xBD7E, 0x94BC, 0xBD7F, 0x94BD, + 0xBD80, 0xBACE, 0xBD81, 0xBACF, 0xBD82, 0x94BE, 0xBD83, 0x94BF, + 0xBD84, 0xBAD0, 0xBD85, 0x94C0, 0xBD86, 0x94C1, 0xBD87, 0xBAD1, + 0xBD88, 0xBAD2, 0xBD89, 0xBAD3, 0xBD8A, 0xBAD4, 0xBD8B, 0x94C2, + 0xBD8C, 0x94C3, 0xBD8D, 0x94C4, 0xBD8E, 0x94C5, 0xBD8F, 0x94C6, + 0xBD90, 0xBAD5, 0xBD91, 0xBAD6, 0xBD92, 0x94C7, 0xBD93, 0xBAD7, + 0xBD94, 0x94C8, 0xBD95, 0xBAD8, 0xBD96, 0x94C9, 0xBD97, 0x94CA, + 0xBD98, 0x94CB, 0xBD99, 0xBAD9, 0xBD9A, 0xBADA, 0xBD9B, 0x94CC, + 0xBD9C, 0xBADB, 0xBD9D, 0x94CD, 0xBD9E, 0x94CE, 0xBD9F, 0x94CF, + 0xBDA0, 0x94D0, 0xBDA1, 0x94D1, 0xBDA2, 0x94D2, 0xBDA3, 0x94D3, + 0xBDA4, 0xBADC, 0xBDA5, 0x94D4, 0xBDA6, 0x94D5, 0xBDA7, 0x94D6, + 0xBDA8, 0x94D7, 0xBDA9, 0x94D8, 0xBDAA, 0x94D9, 0xBDAB, 0x94DA, + 0xBDAC, 0x94DB, 0xBDAD, 0x94DC, 0xBDAE, 0x94DD, 0xBDAF, 0x94DE, + 0xBDB0, 0xBADD, 0xBDB1, 0x94DF, 0xBDB2, 0x94E0, 0xBDB3, 0x94E1, + 0xBDB4, 0x94E2, 0xBDB5, 0x94E3, 0xBDB6, 0x94E4, 0xBDB7, 0x94E5, + 0xBDB8, 0xBADE, 0xBDB9, 0x94E6, 0xBDBA, 0x94E7, 0xBDBB, 0x94E8, + 0xBDBC, 0x94E9, 0xBDBD, 0x94EA, 0xBDBE, 0x94EB, 0xBDBF, 0x94EC, + 0xBDC0, 0x94ED, 0xBDC1, 0x94EE, 0xBDC2, 0x94EF, 0xBDC3, 0x94F0, + 0xBDC4, 0x94F1, 0xBDC5, 0x94F2, 0xBDC6, 0x94F3, 0xBDC7, 0x94F4, + 0xBDC8, 0x94F5, 0xBDC9, 0x94F6, 0xBDCA, 0x94F7, 0xBDCB, 0x94F8, + 0xBDCC, 0x94F9, 0xBDCD, 0x94FA, 0xBDCE, 0x94FB, 0xBDCF, 0x94FC, + 0xBDD0, 0x94FD, 0xBDD1, 0x94FE, 0xBDD2, 0x9541, 0xBDD3, 0x9542, + 0xBDD4, 0xBADF, 0xBDD5, 0xBAE0, 0xBDD6, 0x9543, 0xBDD7, 0x9544, + 0xBDD8, 0xBAE1, 0xBDD9, 0x9545, 0xBDDA, 0x9546, 0xBDDB, 0x9547, + 0xBDDC, 0xBAE2, 0xBDDD, 0x9548, 0xBDDE, 0x9549, 0xBDDF, 0x954A, + 0xBDE0, 0x954B, 0xBDE1, 0x954C, 0xBDE2, 0x954D, 0xBDE3, 0x954E, + 0xBDE4, 0x954F, 0xBDE5, 0x9550, 0xBDE6, 0x9551, 0xBDE7, 0x9552, + 0xBDE8, 0x9553, 0xBDE9, 0xBAE3, 0xBDEA, 0x9554, 0xBDEB, 0x9555, + 0xBDEC, 0x9556, 0xBDED, 0x9557, 0xBDEE, 0x9558, 0xBDEF, 0x9559, + 0xBDF0, 0xBAE4, 0xBDF1, 0x955A, 0xBDF2, 0x9561, 0xBDF3, 0x9562, + 0xBDF4, 0xBAE5, 0xBDF5, 0x9563, 0xBDF6, 0x9564, 0xBDF7, 0x9565, + 0xBDF8, 0xBAE6, 0xBDF9, 0x9566, 0xBDFA, 0x9567, 0xBDFB, 0x9568, + 0xBDFC, 0x9569, 0xBDFD, 0x956A, 0xBDFE, 0x956B, 0xBDFF, 0x956C, + 0xBE00, 0xBAE7, 0xBE01, 0x956D, 0xBE02, 0x956E, 0xBE03, 0xBAE8, + 0xBE04, 0x956F, 0xBE05, 0xBAE9, 0xBE06, 0x9570, 0xBE07, 0x9571, + 0xBE08, 0x9572, 0xBE09, 0x9573, 0xBE0A, 0x9574, 0xBE0B, 0x9575, + 0xBE0C, 0xBAEA, 0xBE0D, 0xBAEB, 0xBE0E, 0x9576, 0xBE0F, 0x9577, + 0xBE10, 0xBAEC, 0xBE11, 0x9578, 0xBE12, 0x9579, 0xBE13, 0x957A, + 0xBE14, 0xBAED, 0xBE15, 0x9581, 0xBE16, 0x9582, 0xBE17, 0x9583, + 0xBE18, 0x9584, 0xBE19, 0x9585, 0xBE1A, 0x9586, 0xBE1B, 0x9587, + 0xBE1C, 0xBAEE, 0xBE1D, 0xBAEF, 0xBE1E, 0x9588, 0xBE1F, 0xBAF0, + 0xBE20, 0x9589, 0xBE21, 0x958A, 0xBE22, 0x958B, 0xBE23, 0x958C, + 0xBE24, 0x958D, 0xBE25, 0x958E, 0xBE26, 0x958F, 0xBE27, 0x9590, + 0xBE28, 0x9591, 0xBE29, 0x9592, 0xBE2A, 0x9593, 0xBE2B, 0x9594, + 0xBE2C, 0x9595, 0xBE2D, 0x9596, 0xBE2E, 0x9597, 0xBE2F, 0x9598, + 0xBE30, 0x9599, 0xBE31, 0x959A, 0xBE32, 0x959B, 0xBE33, 0x959C, + 0xBE34, 0x959D, 0xBE35, 0x959E, 0xBE36, 0x959F, 0xBE37, 0x95A0, + 0xBE38, 0x95A1, 0xBE39, 0x95A2, 0xBE3A, 0x95A3, 0xBE3B, 0x95A4, + 0xBE3C, 0x95A5, 0xBE3D, 0x95A6, 0xBE3E, 0x95A7, 0xBE3F, 0x95A8, + 0xBE40, 0x95A9, 0xBE41, 0x95AA, 0xBE42, 0x95AB, 0xBE43, 0x95AC, + 0xBE44, 0xBAF1, 0xBE45, 0xBAF2, 0xBE46, 0x95AD, 0xBE47, 0x95AE, + 0xBE48, 0xBAF3, 0xBE49, 0x95AF, 0xBE4A, 0x95B0, 0xBE4B, 0x95B1, + 0xBE4C, 0xBAF4, 0xBE4D, 0x95B2, 0xBE4E, 0xBAF5, 0xBE4F, 0x95B3, + 0xBE50, 0x95B4, 0xBE51, 0x95B5, 0xBE52, 0x95B6, 0xBE53, 0x95B7, + 0xBE54, 0xBAF6, 0xBE55, 0xBAF7, 0xBE56, 0x95B8, 0xBE57, 0xBAF8, + 0xBE58, 0x95B9, 0xBE59, 0xBAF9, 0xBE5A, 0xBAFA, 0xBE5B, 0xBAFB, + 0xBE5C, 0x95BA, 0xBE5D, 0x95BB, 0xBE5E, 0x95BC, 0xBE5F, 0x95BD, + 0xBE60, 0xBAFC, 0xBE61, 0xBAFD, 0xBE62, 0x95BE, 0xBE63, 0x95BF, + 0xBE64, 0xBAFE, 0xBE65, 0x95C0, 0xBE66, 0x95C1, 0xBE67, 0x95C2, + 0xBE68, 0xBBA1, 0xBE69, 0x95C3, 0xBE6A, 0xBBA2, 0xBE6B, 0x95C4, + 0xBE6C, 0x95C5, 0xBE6D, 0x95C6, 0xBE6E, 0x95C7, 0xBE6F, 0x95C8, + 0xBE70, 0xBBA3, 0xBE71, 0xBBA4, 0xBE72, 0x95C9, 0xBE73, 0xBBA5, + 0xBE74, 0xBBA6, 0xBE75, 0xBBA7, 0xBE76, 0x95CA, 0xBE77, 0x95CB, + 0xBE78, 0x95CC, 0xBE79, 0x95CD, 0xBE7A, 0x95CE, 0xBE7B, 0xBBA8, + 0xBE7C, 0xBBA9, 0xBE7D, 0xBBAA, 0xBE7E, 0x95CF, 0xBE7F, 0x95D0, + 0xBE80, 0xBBAB, 0xBE81, 0x95D1, 0xBE82, 0x95D2, 0xBE83, 0x95D3, + 0xBE84, 0xBBAC, 0xBE85, 0x95D4, 0xBE86, 0x95D5, 0xBE87, 0x95D6, + 0xBE88, 0x95D7, 0xBE89, 0x95D8, 0xBE8A, 0x95D9, 0xBE8B, 0x95DA, + 0xBE8C, 0xBBAD, 0xBE8D, 0xBBAE, 0xBE8E, 0x95DB, 0xBE8F, 0xBBAF, + 0xBE90, 0xBBB0, 0xBE91, 0xBBB1, 0xBE92, 0x95DC, 0xBE93, 0x95DD, + 0xBE94, 0x95DE, 0xBE95, 0x95DF, 0xBE96, 0x95E0, 0xBE97, 0x95E1, + 0xBE98, 0xBBB2, 0xBE99, 0xBBB3, 0xBE9A, 0x95E2, 0xBE9B, 0x95E3, + 0xBE9C, 0x95E4, 0xBE9D, 0x95E5, 0xBE9E, 0x95E6, 0xBE9F, 0x95E7, + 0xBEA0, 0x95E8, 0xBEA1, 0x95E9, 0xBEA2, 0x95EA, 0xBEA3, 0x95EB, + 0xBEA4, 0x95EC, 0xBEA5, 0x95ED, 0xBEA6, 0x95EE, 0xBEA7, 0x95EF, + 0xBEA8, 0xBBB4, 0xBEA9, 0x95F0, 0xBEAA, 0x95F1, 0xBEAB, 0x95F2, + 0xBEAC, 0x95F3, 0xBEAD, 0x95F4, 0xBEAE, 0x95F5, 0xBEAF, 0x95F6, + 0xBEB0, 0x95F7, 0xBEB1, 0x95F8, 0xBEB2, 0x95F9, 0xBEB3, 0x95FA, + 0xBEB4, 0x95FB, 0xBEB5, 0x95FC, 0xBEB6, 0x95FD, 0xBEB7, 0x95FE, + 0xBEB8, 0x9641, 0xBEB9, 0x9642, 0xBEBA, 0x9643, 0xBEBB, 0x9644, + 0xBEBC, 0x9645, 0xBEBD, 0x9646, 0xBEBE, 0x9647, 0xBEBF, 0x9648, + 0xBEC0, 0x9649, 0xBEC1, 0x964A, 0xBEC2, 0x964B, 0xBEC3, 0x964C, + 0xBEC4, 0x964D, 0xBEC5, 0x964E, 0xBEC6, 0x964F, 0xBEC7, 0x9650, + 0xBEC8, 0x9651, 0xBEC9, 0x9652, 0xBECA, 0x9653, 0xBECB, 0x9654, + 0xBECC, 0x9655, 0xBECD, 0x9656, 0xBECE, 0x9657, 0xBECF, 0x9658, + 0xBED0, 0xBBB5, 0xBED1, 0xBBB6, 0xBED2, 0x9659, 0xBED3, 0x965A, + 0xBED4, 0xBBB7, 0xBED5, 0x9661, 0xBED6, 0x9662, 0xBED7, 0xBBB8, + 0xBED8, 0xBBB9, 0xBED9, 0x9663, 0xBEDA, 0x9664, 0xBEDB, 0x9665, + 0xBEDC, 0x9666, 0xBEDD, 0x9667, 0xBEDE, 0x9668, 0xBEDF, 0x9669, + 0xBEE0, 0xBBBA, 0xBEE1, 0x966A, 0xBEE2, 0x966B, 0xBEE3, 0xBBBB, + 0xBEE4, 0xBBBC, 0xBEE5, 0xBBBD, 0xBEE6, 0x966C, 0xBEE7, 0x966D, + 0xBEE8, 0x966E, 0xBEE9, 0x966F, 0xBEEA, 0x9670, 0xBEEB, 0x9671, + 0xBEEC, 0xBBBE, 0xBEED, 0x9672, 0xBEEE, 0x9673, 0xBEEF, 0x9674, + 0xBEF0, 0x9675, 0xBEF1, 0x9676, 0xBEF2, 0x9677, 0xBEF3, 0x9678, + 0xBEF4, 0x9679, 0xBEF5, 0x967A, 0xBEF6, 0x9681, 0xBEF7, 0x9682, + 0xBEF8, 0x9683, 0xBEF9, 0x9684, 0xBEFA, 0x9685, 0xBEFB, 0x9686, + 0xBEFC, 0x9687, 0xBEFD, 0x9688, 0xBEFE, 0x9689, 0xBEFF, 0x968A, + 0xBF00, 0x968B, 0xBF01, 0xBBBF, 0xBF02, 0x968C, 0xBF03, 0x968D, + 0xBF04, 0x968E, 0xBF05, 0x968F, 0xBF06, 0x9690, 0xBF07, 0x9691, + 0xBF08, 0xBBC0, 0xBF09, 0xBBC1, 0xBF0A, 0x9692, 0xBF0B, 0x9693, + 0xBF0C, 0x9694, 0xBF0D, 0x9695, 0xBF0E, 0x9696, 0xBF0F, 0x9697, + 0xBF10, 0x9698, 0xBF11, 0x9699, 0xBF12, 0x969A, 0xBF13, 0x969B, + 0xBF14, 0x969C, 0xBF15, 0x969D, 0xBF16, 0x969E, 0xBF17, 0x969F, + 0xBF18, 0xBBC2, 0xBF19, 0xBBC3, 0xBF1A, 0x96A0, 0xBF1B, 0xBBC4, + 0xBF1C, 0xBBC5, 0xBF1D, 0xBBC6, 0xBF1E, 0x96A1, 0xBF1F, 0x96A2, + 0xBF20, 0x96A3, 0xBF21, 0x96A4, 0xBF22, 0x96A5, 0xBF23, 0x96A6, + 0xBF24, 0x96A7, 0xBF25, 0x96A8, 0xBF26, 0x96A9, 0xBF27, 0x96AA, + 0xBF28, 0x96AB, 0xBF29, 0x96AC, 0xBF2A, 0x96AD, 0xBF2B, 0x96AE, + 0xBF2C, 0x96AF, 0xBF2D, 0x96B0, 0xBF2E, 0x96B1, 0xBF2F, 0x96B2, + 0xBF30, 0x96B3, 0xBF31, 0x96B4, 0xBF32, 0x96B5, 0xBF33, 0x96B6, + 0xBF34, 0x96B7, 0xBF35, 0x96B8, 0xBF36, 0x96B9, 0xBF37, 0x96BA, + 0xBF38, 0x96BB, 0xBF39, 0x96BC, 0xBF3A, 0x96BD, 0xBF3B, 0x96BE, + 0xBF3C, 0x96BF, 0xBF3D, 0x96C0, 0xBF3E, 0x96C1, 0xBF3F, 0x96C2, + 0xBF40, 0xBBC7, 0xBF41, 0xBBC8, 0xBF42, 0x96C3, 0xBF43, 0x96C4, + 0xBF44, 0xBBC9, 0xBF45, 0x96C5, 0xBF46, 0x96C6, 0xBF47, 0x96C7, + 0xBF48, 0xBBCA, 0xBF49, 0x96C8, 0xBF4A, 0x96C9, 0xBF4B, 0x96CA, + 0xBF4C, 0x96CB, 0xBF4D, 0x96CC, 0xBF4E, 0x96CD, 0xBF4F, 0x96CE, + 0xBF50, 0xBBCB, 0xBF51, 0xBBCC, 0xBF52, 0x96CF, 0xBF53, 0x96D0, + 0xBF54, 0x96D1, 0xBF55, 0xBBCD, 0xBF56, 0x96D2, 0xBF57, 0x96D3, + 0xBF58, 0x96D4, 0xBF59, 0x96D5, 0xBF5A, 0x96D6, 0xBF5B, 0x96D7, + 0xBF5C, 0x96D8, 0xBF5D, 0x96D9, 0xBF5E, 0x96DA, 0xBF5F, 0x96DB, + 0xBF60, 0x96DC, 0xBF61, 0x96DD, 0xBF62, 0x96DE, 0xBF63, 0x96DF, + 0xBF64, 0x96E0, 0xBF65, 0x96E1, 0xBF66, 0x96E2, 0xBF67, 0x96E3, + 0xBF68, 0x96E4, 0xBF69, 0x96E5, 0xBF6A, 0x96E6, 0xBF6B, 0x96E7, + 0xBF6C, 0x96E8, 0xBF6D, 0x96E9, 0xBF6E, 0x96EA, 0xBF6F, 0x96EB, + 0xBF70, 0x96EC, 0xBF71, 0x96ED, 0xBF72, 0x96EE, 0xBF73, 0x96EF, + 0xBF74, 0x96F0, 0xBF75, 0x96F1, 0xBF76, 0x96F2, 0xBF77, 0x96F3, + 0xBF78, 0x96F4, 0xBF79, 0x96F5, 0xBF7A, 0x96F6, 0xBF7B, 0x96F7, + 0xBF7C, 0x96F8, 0xBF7D, 0x96F9, 0xBF7E, 0x96FA, 0xBF7F, 0x96FB, + 0xBF80, 0x96FC, 0xBF81, 0x96FD, 0xBF82, 0x96FE, 0xBF83, 0x9741, + 0xBF84, 0x9742, 0xBF85, 0x9743, 0xBF86, 0x9744, 0xBF87, 0x9745, + 0xBF88, 0x9746, 0xBF89, 0x9747, 0xBF8A, 0x9748, 0xBF8B, 0x9749, + 0xBF8C, 0x974A, 0xBF8D, 0x974B, 0xBF8E, 0x974C, 0xBF8F, 0x974D, + 0xBF90, 0x974E, 0xBF91, 0x974F, 0xBF92, 0x9750, 0xBF93, 0x9751, + 0xBF94, 0xBBCE, 0xBF95, 0x9752, 0xBF96, 0x9753, 0xBF97, 0x9754, + 0xBF98, 0x9755, 0xBF99, 0x9756, 0xBF9A, 0x9757, 0xBF9B, 0x9758, + 0xBF9C, 0x9759, 0xBF9D, 0x975A, 0xBF9E, 0x9761, 0xBF9F, 0x9762, + 0xBFA0, 0x9763, 0xBFA1, 0x9764, 0xBFA2, 0x9765, 0xBFA3, 0x9766, + 0xBFA4, 0x9767, 0xBFA5, 0x9768, 0xBFA6, 0x9769, 0xBFA7, 0x976A, + 0xBFA8, 0x976B, 0xBFA9, 0x976C, 0xBFAA, 0x976D, 0xBFAB, 0x976E, + 0xBFAC, 0x976F, 0xBFAD, 0x9770, 0xBFAE, 0x9771, 0xBFAF, 0x9772, + 0xBFB0, 0xBBCF, 0xBFB1, 0x9773, 0xBFB2, 0x9774, 0xBFB3, 0x9775, + 0xBFB4, 0x9776, 0xBFB5, 0x9777, 0xBFB6, 0x9778, 0xBFB7, 0x9779, + 0xBFB8, 0x977A, 0xBFB9, 0x9781, 0xBFBA, 0x9782, 0xBFBB, 0x9783, + 0xBFBC, 0x9784, 0xBFBD, 0x9785, 0xBFBE, 0x9786, 0xBFBF, 0x9787, + 0xBFC0, 0x9788, 0xBFC1, 0x9789, 0xBFC2, 0x978A, 0xBFC3, 0x978B, + 0xBFC4, 0x978C, 0xBFC5, 0xBBD0, 0xBFC6, 0x978D, 0xBFC7, 0x978E, + 0xBFC8, 0x978F, 0xBFC9, 0x9790, 0xBFCA, 0x9791, 0xBFCB, 0x9792, + 0xBFCC, 0xBBD1, 0xBFCD, 0xBBD2, 0xBFCE, 0x9793, 0xBFCF, 0x9794, + 0xBFD0, 0xBBD3, 0xBFD1, 0x9795, 0xBFD2, 0x9796, 0xBFD3, 0x9797, + 0xBFD4, 0xBBD4, 0xBFD5, 0x9798, 0xBFD6, 0x9799, 0xBFD7, 0x979A, + 0xBFD8, 0x979B, 0xBFD9, 0x979C, 0xBFDA, 0x979D, 0xBFDB, 0x979E, + 0xBFDC, 0xBBD5, 0xBFDD, 0x979F, 0xBFDE, 0x97A0, 0xBFDF, 0xBBD6, + 0xBFE0, 0x97A1, 0xBFE1, 0xBBD7, 0xBFE2, 0x97A2, 0xBFE3, 0x97A3, + 0xBFE4, 0x97A4, 0xBFE5, 0x97A5, 0xBFE6, 0x97A6, 0xBFE7, 0x97A7, + 0xBFE8, 0x97A8, 0xBFE9, 0x97A9, 0xBFEA, 0x97AA, 0xBFEB, 0x97AB, + 0xBFEC, 0x97AC, 0xBFED, 0x97AD, 0xBFEE, 0x97AE, 0xBFEF, 0x97AF, + 0xBFF0, 0x97B0, 0xBFF1, 0x97B1, 0xBFF2, 0x97B2, 0xBFF3, 0x97B3, + 0xBFF4, 0x97B4, 0xBFF5, 0x97B5, 0xBFF6, 0x97B6, 0xBFF7, 0x97B7, + 0xBFF8, 0x97B8, 0xBFF9, 0x97B9, 0xBFFA, 0x97BA, 0xBFFB, 0x97BB, + 0xBFFC, 0x97BC, 0xBFFD, 0x97BD, 0xBFFE, 0x97BE, 0xBFFF, 0x97BF, + 0xC000, 0x97C0, 0xC001, 0x97C1, 0xC002, 0x97C2, 0xC003, 0x97C3, + 0xC004, 0x97C4, 0xC005, 0x97C5, 0xC006, 0x97C6, 0xC007, 0x97C7, + 0xC008, 0x97C8, 0xC009, 0x97C9, 0xC00A, 0x97CA, 0xC00B, 0x97CB, + 0xC00C, 0x97CC, 0xC00D, 0x97CD, 0xC00E, 0x97CE, 0xC00F, 0x97CF, + 0xC010, 0x97D0, 0xC011, 0x97D1, 0xC012, 0x97D2, 0xC013, 0x97D3, + 0xC014, 0x97D4, 0xC015, 0x97D5, 0xC016, 0x97D6, 0xC017, 0x97D7, + 0xC018, 0x97D8, 0xC019, 0x97D9, 0xC01A, 0x97DA, 0xC01B, 0x97DB, + 0xC01C, 0x97DC, 0xC01D, 0x97DD, 0xC01E, 0x97DE, 0xC01F, 0x97DF, + 0xC020, 0x97E0, 0xC021, 0x97E1, 0xC022, 0x97E2, 0xC023, 0x97E3, + 0xC024, 0x97E4, 0xC025, 0x97E5, 0xC026, 0x97E6, 0xC027, 0x97E7, + 0xC028, 0x97E8, 0xC029, 0x97E9, 0xC02A, 0x97EA, 0xC02B, 0x97EB, + 0xC02C, 0x97EC, 0xC02D, 0x97ED, 0xC02E, 0x97EE, 0xC02F, 0x97EF, + 0xC030, 0x97F0, 0xC031, 0x97F1, 0xC032, 0x97F2, 0xC033, 0x97F3, + 0xC034, 0x97F4, 0xC035, 0x97F5, 0xC036, 0x97F6, 0xC037, 0x97F7, + 0xC038, 0x97F8, 0xC039, 0x97F9, 0xC03A, 0x97FA, 0xC03B, 0x97FB, + 0xC03C, 0xBBD8, 0xC03D, 0x97FC, 0xC03E, 0x97FD, 0xC03F, 0x97FE, + 0xC040, 0x9841, 0xC041, 0x9842, 0xC042, 0x9843, 0xC043, 0x9844, + 0xC044, 0x9845, 0xC045, 0x9846, 0xC046, 0x9847, 0xC047, 0x9848, + 0xC048, 0x9849, 0xC049, 0x984A, 0xC04A, 0x984B, 0xC04B, 0x984C, + 0xC04C, 0x984D, 0xC04D, 0x984E, 0xC04E, 0x984F, 0xC04F, 0x9850, + 0xC050, 0x9851, 0xC051, 0xBBD9, 0xC052, 0x9852, 0xC053, 0x9853, + 0xC054, 0x9854, 0xC055, 0x9855, 0xC056, 0x9856, 0xC057, 0x9857, + 0xC058, 0xBBDA, 0xC059, 0x9858, 0xC05A, 0x9859, 0xC05B, 0x985A, + 0xC05C, 0xBBDB, 0xC05D, 0x9861, 0xC05E, 0x9862, 0xC05F, 0x9863, + 0xC060, 0xBBDC, 0xC061, 0x9864, 0xC062, 0x9865, 0xC063, 0x9866, + 0xC064, 0x9867, 0xC065, 0x9868, 0xC066, 0x9869, 0xC067, 0x986A, + 0xC068, 0xBBDD, 0xC069, 0xBBDE, 0xC06A, 0x986B, 0xC06B, 0x986C, + 0xC06C, 0x986D, 0xC06D, 0x986E, 0xC06E, 0x986F, 0xC06F, 0x9870, + 0xC070, 0x9871, 0xC071, 0x9872, 0xC072, 0x9873, 0xC073, 0x9874, + 0xC074, 0x9875, 0xC075, 0x9876, 0xC076, 0x9877, 0xC077, 0x9878, + 0xC078, 0x9879, 0xC079, 0x987A, 0xC07A, 0x9881, 0xC07B, 0x9882, + 0xC07C, 0x9883, 0xC07D, 0x9884, 0xC07E, 0x9885, 0xC07F, 0x9886, + 0xC080, 0x9887, 0xC081, 0x9888, 0xC082, 0x9889, 0xC083, 0x988A, + 0xC084, 0x988B, 0xC085, 0x988C, 0xC086, 0x988D, 0xC087, 0x988E, + 0xC088, 0x988F, 0xC089, 0x9890, 0xC08A, 0x9891, 0xC08B, 0x9892, + 0xC08C, 0x9893, 0xC08D, 0x9894, 0xC08E, 0x9895, 0xC08F, 0x9896, + 0xC090, 0xBBDF, 0xC091, 0xBBE0, 0xC092, 0x9897, 0xC093, 0x9898, + 0xC094, 0xBBE1, 0xC095, 0x9899, 0xC096, 0x989A, 0xC097, 0x989B, + 0xC098, 0xBBE2, 0xC099, 0x989C, 0xC09A, 0x989D, 0xC09B, 0x989E, + 0xC09C, 0x989F, 0xC09D, 0x98A0, 0xC09E, 0x98A1, 0xC09F, 0x98A2, + 0xC0A0, 0xBBE3, 0xC0A1, 0xBBE4, 0xC0A2, 0x98A3, 0xC0A3, 0xBBE5, + 0xC0A4, 0x98A4, 0xC0A5, 0xBBE6, 0xC0A6, 0x98A5, 0xC0A7, 0x98A6, + 0xC0A8, 0x98A7, 0xC0A9, 0x98A8, 0xC0AA, 0x98A9, 0xC0AB, 0x98AA, + 0xC0AC, 0xBBE7, 0xC0AD, 0xBBE8, 0xC0AE, 0x98AB, 0xC0AF, 0xBBE9, + 0xC0B0, 0xBBEA, 0xC0B1, 0x98AC, 0xC0B2, 0x98AD, 0xC0B3, 0xBBEB, + 0xC0B4, 0xBBEC, 0xC0B5, 0xBBED, 0xC0B6, 0xBBEE, 0xC0B7, 0x98AE, + 0xC0B8, 0x98AF, 0xC0B9, 0x98B0, 0xC0BA, 0x98B1, 0xC0BB, 0x98B2, + 0xC0BC, 0xBBEF, 0xC0BD, 0xBBF0, 0xC0BE, 0x98B3, 0xC0BF, 0xBBF1, + 0xC0C0, 0xBBF2, 0xC0C1, 0xBBF3, 0xC0C2, 0x98B4, 0xC0C3, 0x98B5, + 0xC0C4, 0x98B6, 0xC0C5, 0xBBF4, 0xC0C6, 0x98B7, 0xC0C7, 0x98B8, + 0xC0C8, 0xBBF5, 0xC0C9, 0xBBF6, 0xC0CA, 0x98B9, 0xC0CB, 0x98BA, + 0xC0CC, 0xBBF7, 0xC0CD, 0x98BB, 0xC0CE, 0x98BC, 0xC0CF, 0x98BD, + 0xC0D0, 0xBBF8, 0xC0D1, 0x98BE, 0xC0D2, 0x98BF, 0xC0D3, 0x98C0, + 0xC0D4, 0x98C1, 0xC0D5, 0x98C2, 0xC0D6, 0x98C3, 0xC0D7, 0x98C4, + 0xC0D8, 0xBBF9, 0xC0D9, 0xBBFA, 0xC0DA, 0x98C5, 0xC0DB, 0xBBFB, + 0xC0DC, 0xBBFC, 0xC0DD, 0xBBFD, 0xC0DE, 0x98C6, 0xC0DF, 0x98C7, + 0xC0E0, 0x98C8, 0xC0E1, 0x98C9, 0xC0E2, 0x98CA, 0xC0E3, 0x98CB, + 0xC0E4, 0xBBFE, 0xC0E5, 0xBCA1, 0xC0E6, 0x98CC, 0xC0E7, 0x98CD, + 0xC0E8, 0xBCA2, 0xC0E9, 0x98CE, 0xC0EA, 0x98CF, 0xC0EB, 0x98D0, + 0xC0EC, 0xBCA3, 0xC0ED, 0x98D1, 0xC0EE, 0x98D2, 0xC0EF, 0x98D3, + 0xC0F0, 0x98D4, 0xC0F1, 0x98D5, 0xC0F2, 0x98D6, 0xC0F3, 0x98D7, + 0xC0F4, 0xBCA4, 0xC0F5, 0xBCA5, 0xC0F6, 0x98D8, 0xC0F7, 0xBCA6, + 0xC0F8, 0x98D9, 0xC0F9, 0xBCA7, 0xC0FA, 0x98DA, 0xC0FB, 0x98DB, + 0xC0FC, 0x98DC, 0xC0FD, 0x98DD, 0xC0FE, 0x98DE, 0xC0FF, 0x98DF, + 0xC100, 0xBCA8, 0xC101, 0x98E0, 0xC102, 0x98E1, 0xC103, 0x98E2, + 0xC104, 0xBCA9, 0xC105, 0x98E3, 0xC106, 0x98E4, 0xC107, 0x98E5, + 0xC108, 0xBCAA, 0xC109, 0x98E6, 0xC10A, 0x98E7, 0xC10B, 0x98E8, + 0xC10C, 0x98E9, 0xC10D, 0x98EA, 0xC10E, 0x98EB, 0xC10F, 0x98EC, + 0xC110, 0xBCAB, 0xC111, 0x98ED, 0xC112, 0x98EE, 0xC113, 0x98EF, + 0xC114, 0x98F0, 0xC115, 0xBCAC, 0xC116, 0x98F1, 0xC117, 0x98F2, + 0xC118, 0x98F3, 0xC119, 0x98F4, 0xC11A, 0x98F5, 0xC11B, 0x98F6, + 0xC11C, 0xBCAD, 0xC11D, 0xBCAE, 0xC11E, 0xBCAF, 0xC11F, 0xBCB0, + 0xC120, 0xBCB1, 0xC121, 0x98F7, 0xC122, 0x98F8, 0xC123, 0xBCB2, + 0xC124, 0xBCB3, 0xC125, 0x98F9, 0xC126, 0xBCB4, 0xC127, 0xBCB5, + 0xC128, 0x98FA, 0xC129, 0x98FB, 0xC12A, 0x98FC, 0xC12B, 0x98FD, + 0xC12C, 0xBCB6, 0xC12D, 0xBCB7, 0xC12E, 0x98FE, 0xC12F, 0xBCB8, + 0xC130, 0xBCB9, 0xC131, 0xBCBA, 0xC132, 0x9941, 0xC133, 0x9942, + 0xC134, 0x9943, 0xC135, 0x9944, 0xC136, 0xBCBB, 0xC137, 0x9945, + 0xC138, 0xBCBC, 0xC139, 0xBCBD, 0xC13A, 0x9946, 0xC13B, 0x9947, + 0xC13C, 0xBCBE, 0xC13D, 0x9948, 0xC13E, 0x9949, 0xC13F, 0x994A, + 0xC140, 0xBCBF, 0xC141, 0x994B, 0xC142, 0x994C, 0xC143, 0x994D, + 0xC144, 0x994E, 0xC145, 0x994F, 0xC146, 0x9950, 0xC147, 0x9951, + 0xC148, 0xBCC0, 0xC149, 0xBCC1, 0xC14A, 0x9952, 0xC14B, 0xBCC2, + 0xC14C, 0xBCC3, 0xC14D, 0xBCC4, 0xC14E, 0x9953, 0xC14F, 0x9954, + 0xC150, 0x9955, 0xC151, 0x9956, 0xC152, 0x9957, 0xC153, 0x9958, + 0xC154, 0xBCC5, 0xC155, 0xBCC6, 0xC156, 0x9959, 0xC157, 0x995A, + 0xC158, 0xBCC7, 0xC159, 0x9961, 0xC15A, 0x9962, 0xC15B, 0x9963, + 0xC15C, 0xBCC8, 0xC15D, 0x9964, 0xC15E, 0x9965, 0xC15F, 0x9966, + 0xC160, 0x9967, 0xC161, 0x9968, 0xC162, 0x9969, 0xC163, 0x996A, + 0xC164, 0xBCC9, 0xC165, 0xBCCA, 0xC166, 0x996B, 0xC167, 0xBCCB, + 0xC168, 0xBCCC, 0xC169, 0xBCCD, 0xC16A, 0x996C, 0xC16B, 0x996D, + 0xC16C, 0x996E, 0xC16D, 0x996F, 0xC16E, 0x9970, 0xC16F, 0x9971, + 0xC170, 0xBCCE, 0xC171, 0x9972, 0xC172, 0x9973, 0xC173, 0x9974, + 0xC174, 0xBCCF, 0xC175, 0x9975, 0xC176, 0x9976, 0xC177, 0x9977, + 0xC178, 0xBCD0, 0xC179, 0x9978, 0xC17A, 0x9979, 0xC17B, 0x997A, + 0xC17C, 0x9981, 0xC17D, 0x9982, 0xC17E, 0x9983, 0xC17F, 0x9984, + 0xC180, 0x9985, 0xC181, 0x9986, 0xC182, 0x9987, 0xC183, 0x9988, + 0xC184, 0x9989, 0xC185, 0xBCD1, 0xC186, 0x998A, 0xC187, 0x998B, + 0xC188, 0x998C, 0xC189, 0x998D, 0xC18A, 0x998E, 0xC18B, 0x998F, + 0xC18C, 0xBCD2, 0xC18D, 0xBCD3, 0xC18E, 0xBCD4, 0xC18F, 0x9990, + 0xC190, 0xBCD5, 0xC191, 0x9991, 0xC192, 0x9992, 0xC193, 0x9993, + 0xC194, 0xBCD6, 0xC195, 0x9994, 0xC196, 0xBCD7, 0xC197, 0x9995, + 0xC198, 0x9996, 0xC199, 0x9997, 0xC19A, 0x9998, 0xC19B, 0x9999, + 0xC19C, 0xBCD8, 0xC19D, 0xBCD9, 0xC19E, 0x999A, 0xC19F, 0xBCDA, + 0xC1A0, 0x999B, 0xC1A1, 0xBCDB, 0xC1A2, 0x999C, 0xC1A3, 0x999D, + 0xC1A4, 0x999E, 0xC1A5, 0xBCDC, 0xC1A6, 0x999F, 0xC1A7, 0x99A0, + 0xC1A8, 0xBCDD, 0xC1A9, 0xBCDE, 0xC1AA, 0x99A1, 0xC1AB, 0x99A2, + 0xC1AC, 0xBCDF, 0xC1AD, 0x99A3, 0xC1AE, 0x99A4, 0xC1AF, 0x99A5, + 0xC1B0, 0xBCE0, 0xC1B1, 0x99A6, 0xC1B2, 0x99A7, 0xC1B3, 0x99A8, + 0xC1B4, 0x99A9, 0xC1B5, 0x99AA, 0xC1B6, 0x99AB, 0xC1B7, 0x99AC, + 0xC1B8, 0x99AD, 0xC1B9, 0x99AE, 0xC1BA, 0x99AF, 0xC1BB, 0x99B0, + 0xC1BC, 0x99B1, 0xC1BD, 0xBCE1, 0xC1BE, 0x99B2, 0xC1BF, 0x99B3, + 0xC1C0, 0x99B4, 0xC1C1, 0x99B5, 0xC1C2, 0x99B6, 0xC1C3, 0x99B7, + 0xC1C4, 0xBCE2, 0xC1C5, 0x99B8, 0xC1C6, 0x99B9, 0xC1C7, 0x99BA, + 0xC1C8, 0xBCE3, 0xC1C9, 0x99BB, 0xC1CA, 0x99BC, 0xC1CB, 0x99BD, + 0xC1CC, 0xBCE4, 0xC1CD, 0x99BE, 0xC1CE, 0x99BF, 0xC1CF, 0x99C0, + 0xC1D0, 0x99C1, 0xC1D1, 0x99C2, 0xC1D2, 0x99C3, 0xC1D3, 0x99C4, + 0xC1D4, 0xBCE5, 0xC1D5, 0x99C5, 0xC1D6, 0x99C6, 0xC1D7, 0xBCE6, + 0xC1D8, 0xBCE7, 0xC1D9, 0x99C7, 0xC1DA, 0x99C8, 0xC1DB, 0x99C9, + 0xC1DC, 0x99CA, 0xC1DD, 0x99CB, 0xC1DE, 0x99CC, 0xC1DF, 0x99CD, + 0xC1E0, 0xBCE8, 0xC1E1, 0x99CE, 0xC1E2, 0x99CF, 0xC1E3, 0x99D0, + 0xC1E4, 0xBCE9, 0xC1E5, 0x99D1, 0xC1E6, 0x99D2, 0xC1E7, 0x99D3, + 0xC1E8, 0xBCEA, 0xC1E9, 0x99D4, 0xC1EA, 0x99D5, 0xC1EB, 0x99D6, + 0xC1EC, 0x99D7, 0xC1ED, 0x99D8, 0xC1EE, 0x99D9, 0xC1EF, 0x99DA, + 0xC1F0, 0xBCEB, 0xC1F1, 0xBCEC, 0xC1F2, 0x99DB, 0xC1F3, 0xBCED, + 0xC1F4, 0x99DC, 0xC1F5, 0x99DD, 0xC1F6, 0x99DE, 0xC1F7, 0x99DF, + 0xC1F8, 0x99E0, 0xC1F9, 0x99E1, 0xC1FA, 0x99E2, 0xC1FB, 0x99E3, + 0xC1FC, 0xBCEE, 0xC1FD, 0xBCEF, 0xC1FE, 0x99E4, 0xC1FF, 0x99E5, + 0xC200, 0xBCF0, 0xC201, 0x99E6, 0xC202, 0x99E7, 0xC203, 0x99E8, + 0xC204, 0xBCF1, 0xC205, 0x99E9, 0xC206, 0x99EA, 0xC207, 0x99EB, + 0xC208, 0x99EC, 0xC209, 0x99ED, 0xC20A, 0x99EE, 0xC20B, 0x99EF, + 0xC20C, 0xBCF2, 0xC20D, 0xBCF3, 0xC20E, 0x99F0, 0xC20F, 0xBCF4, + 0xC210, 0x99F1, 0xC211, 0xBCF5, 0xC212, 0x99F2, 0xC213, 0x99F3, + 0xC214, 0x99F4, 0xC215, 0x99F5, 0xC216, 0x99F6, 0xC217, 0x99F7, + 0xC218, 0xBCF6, 0xC219, 0xBCF7, 0xC21A, 0x99F8, 0xC21B, 0x99F9, + 0xC21C, 0xBCF8, 0xC21D, 0x99FA, 0xC21E, 0x99FB, 0xC21F, 0xBCF9, + 0xC220, 0xBCFA, 0xC221, 0x99FC, 0xC222, 0x99FD, 0xC223, 0x99FE, + 0xC224, 0x9A41, 0xC225, 0x9A42, 0xC226, 0x9A43, 0xC227, 0x9A44, + 0xC228, 0xBCFB, 0xC229, 0xBCFC, 0xC22A, 0x9A45, 0xC22B, 0xBCFD, + 0xC22C, 0x9A46, 0xC22D, 0xBCFE, 0xC22E, 0x9A47, 0xC22F, 0xBDA1, + 0xC230, 0x9A48, 0xC231, 0xBDA2, 0xC232, 0xBDA3, 0xC233, 0x9A49, + 0xC234, 0xBDA4, 0xC235, 0x9A4A, 0xC236, 0x9A4B, 0xC237, 0x9A4C, + 0xC238, 0x9A4D, 0xC239, 0x9A4E, 0xC23A, 0x9A4F, 0xC23B, 0x9A50, + 0xC23C, 0x9A51, 0xC23D, 0x9A52, 0xC23E, 0x9A53, 0xC23F, 0x9A54, + 0xC240, 0x9A55, 0xC241, 0x9A56, 0xC242, 0x9A57, 0xC243, 0x9A58, + 0xC244, 0x9A59, 0xC245, 0x9A5A, 0xC246, 0x9A61, 0xC247, 0x9A62, + 0xC248, 0xBDA5, 0xC249, 0x9A63, 0xC24A, 0x9A64, 0xC24B, 0x9A65, + 0xC24C, 0x9A66, 0xC24D, 0x9A67, 0xC24E, 0x9A68, 0xC24F, 0x9A69, + 0xC250, 0xBDA6, 0xC251, 0xBDA7, 0xC252, 0x9A6A, 0xC253, 0x9A6B, + 0xC254, 0xBDA8, 0xC255, 0x9A6C, 0xC256, 0x9A6D, 0xC257, 0x9A6E, + 0xC258, 0xBDA9, 0xC259, 0x9A6F, 0xC25A, 0x9A70, 0xC25B, 0x9A71, + 0xC25C, 0x9A72, 0xC25D, 0x9A73, 0xC25E, 0x9A74, 0xC25F, 0x9A75, + 0xC260, 0xBDAA, 0xC261, 0x9A76, 0xC262, 0x9A77, 0xC263, 0x9A78, + 0xC264, 0x9A79, 0xC265, 0xBDAB, 0xC266, 0x9A7A, 0xC267, 0x9A81, + 0xC268, 0x9A82, 0xC269, 0x9A83, 0xC26A, 0x9A84, 0xC26B, 0x9A85, + 0xC26C, 0xBDAC, 0xC26D, 0xBDAD, 0xC26E, 0x9A86, 0xC26F, 0x9A87, + 0xC270, 0xBDAE, 0xC271, 0x9A88, 0xC272, 0x9A89, 0xC273, 0x9A8A, + 0xC274, 0xBDAF, 0xC275, 0x9A8B, 0xC276, 0x9A8C, 0xC277, 0x9A8D, + 0xC278, 0x9A8E, 0xC279, 0x9A8F, 0xC27A, 0x9A90, 0xC27B, 0x9A91, + 0xC27C, 0xBDB0, 0xC27D, 0xBDB1, 0xC27E, 0x9A92, 0xC27F, 0xBDB2, + 0xC280, 0x9A93, 0xC281, 0xBDB3, 0xC282, 0x9A94, 0xC283, 0x9A95, + 0xC284, 0x9A96, 0xC285, 0x9A97, 0xC286, 0x9A98, 0xC287, 0x9A99, + 0xC288, 0xBDB4, 0xC289, 0xBDB5, 0xC28A, 0x9A9A, 0xC28B, 0x9A9B, + 0xC28C, 0x9A9C, 0xC28D, 0x9A9D, 0xC28E, 0x9A9E, 0xC28F, 0x9A9F, + 0xC290, 0xBDB6, 0xC291, 0x9AA0, 0xC292, 0x9AA1, 0xC293, 0x9AA2, + 0xC294, 0x9AA3, 0xC295, 0x9AA4, 0xC296, 0x9AA5, 0xC297, 0x9AA6, + 0xC298, 0xBDB7, 0xC299, 0x9AA7, 0xC29A, 0x9AA8, 0xC29B, 0xBDB8, + 0xC29C, 0x9AA9, 0xC29D, 0xBDB9, 0xC29E, 0x9AAA, 0xC29F, 0x9AAB, + 0xC2A0, 0x9AAC, 0xC2A1, 0x9AAD, 0xC2A2, 0x9AAE, 0xC2A3, 0x9AAF, + 0xC2A4, 0xBDBA, 0xC2A5, 0xBDBB, 0xC2A6, 0x9AB0, 0xC2A7, 0x9AB1, + 0xC2A8, 0xBDBC, 0xC2A9, 0x9AB2, 0xC2AA, 0x9AB3, 0xC2AB, 0x9AB4, + 0xC2AC, 0xBDBD, 0xC2AD, 0xBDBE, 0xC2AE, 0x9AB5, 0xC2AF, 0x9AB6, + 0xC2B0, 0x9AB7, 0xC2B1, 0x9AB8, 0xC2B2, 0x9AB9, 0xC2B3, 0x9ABA, + 0xC2B4, 0xBDBF, 0xC2B5, 0xBDC0, 0xC2B6, 0x9ABB, 0xC2B7, 0xBDC1, + 0xC2B8, 0x9ABC, 0xC2B9, 0xBDC2, 0xC2BA, 0x9ABD, 0xC2BB, 0x9ABE, + 0xC2BC, 0x9ABF, 0xC2BD, 0x9AC0, 0xC2BE, 0x9AC1, 0xC2BF, 0x9AC2, + 0xC2C0, 0x9AC3, 0xC2C1, 0x9AC4, 0xC2C2, 0x9AC5, 0xC2C3, 0x9AC6, + 0xC2C4, 0x9AC7, 0xC2C5, 0x9AC8, 0xC2C6, 0x9AC9, 0xC2C7, 0x9ACA, + 0xC2C8, 0x9ACB, 0xC2C9, 0x9ACC, 0xC2CA, 0x9ACD, 0xC2CB, 0x9ACE, + 0xC2CC, 0x9ACF, 0xC2CD, 0x9AD0, 0xC2CE, 0x9AD1, 0xC2CF, 0x9AD2, + 0xC2D0, 0x9AD3, 0xC2D1, 0x9AD4, 0xC2D2, 0x9AD5, 0xC2D3, 0x9AD6, + 0xC2D4, 0x9AD7, 0xC2D5, 0x9AD8, 0xC2D6, 0x9AD9, 0xC2D7, 0x9ADA, + 0xC2D8, 0x9ADB, 0xC2D9, 0x9ADC, 0xC2DA, 0x9ADD, 0xC2DB, 0x9ADE, + 0xC2DC, 0xBDC3, 0xC2DD, 0xBDC4, 0xC2DE, 0x9ADF, 0xC2DF, 0x9AE0, + 0xC2E0, 0xBDC5, 0xC2E1, 0x9AE1, 0xC2E2, 0x9AE2, 0xC2E3, 0xBDC6, + 0xC2E4, 0xBDC7, 0xC2E5, 0x9AE3, 0xC2E6, 0x9AE4, 0xC2E7, 0x9AE5, + 0xC2E8, 0x9AE6, 0xC2E9, 0x9AE7, 0xC2EA, 0x9AE8, 0xC2EB, 0xBDC8, + 0xC2EC, 0xBDC9, 0xC2ED, 0xBDCA, 0xC2EE, 0x9AE9, 0xC2EF, 0xBDCB, + 0xC2F0, 0x9AEA, 0xC2F1, 0xBDCC, 0xC2F2, 0x9AEB, 0xC2F3, 0x9AEC, + 0xC2F4, 0x9AED, 0xC2F5, 0x9AEE, 0xC2F6, 0xBDCD, 0xC2F7, 0x9AEF, + 0xC2F8, 0xBDCE, 0xC2F9, 0xBDCF, 0xC2FA, 0x9AF0, 0xC2FB, 0xBDD0, + 0xC2FC, 0xBDD1, 0xC2FD, 0x9AF1, 0xC2FE, 0x9AF2, 0xC2FF, 0x9AF3, + 0xC300, 0xBDD2, 0xC301, 0x9AF4, 0xC302, 0x9AF5, 0xC303, 0x9AF6, + 0xC304, 0x9AF7, 0xC305, 0x9AF8, 0xC306, 0x9AF9, 0xC307, 0x9AFA, + 0xC308, 0xBDD3, 0xC309, 0xBDD4, 0xC30A, 0x9AFB, 0xC30B, 0x9AFC, + 0xC30C, 0xBDD5, 0xC30D, 0xBDD6, 0xC30E, 0x9AFD, 0xC30F, 0x9AFE, + 0xC310, 0x9B41, 0xC311, 0x9B42, 0xC312, 0x9B43, 0xC313, 0xBDD7, + 0xC314, 0xBDD8, 0xC315, 0xBDD9, 0xC316, 0x9B44, 0xC317, 0x9B45, + 0xC318, 0xBDDA, 0xC319, 0x9B46, 0xC31A, 0x9B47, 0xC31B, 0x9B48, + 0xC31C, 0xBDDB, 0xC31D, 0x9B49, 0xC31E, 0x9B4A, 0xC31F, 0x9B4B, + 0xC320, 0x9B4C, 0xC321, 0x9B4D, 0xC322, 0x9B4E, 0xC323, 0x9B4F, + 0xC324, 0xBDDC, 0xC325, 0xBDDD, 0xC326, 0x9B50, 0xC327, 0x9B51, + 0xC328, 0xBDDE, 0xC329, 0xBDDF, 0xC32A, 0x9B52, 0xC32B, 0x9B53, + 0xC32C, 0x9B54, 0xC32D, 0x9B55, 0xC32E, 0x9B56, 0xC32F, 0x9B57, + 0xC330, 0x9B58, 0xC331, 0x9B59, 0xC332, 0x9B5A, 0xC333, 0x9B61, + 0xC334, 0x9B62, 0xC335, 0x9B63, 0xC336, 0x9B64, 0xC337, 0x9B65, + 0xC338, 0x9B66, 0xC339, 0x9B67, 0xC33A, 0x9B68, 0xC33B, 0x9B69, + 0xC33C, 0x9B6A, 0xC33D, 0x9B6B, 0xC33E, 0x9B6C, 0xC33F, 0x9B6D, + 0xC340, 0x9B6E, 0xC341, 0x9B6F, 0xC342, 0x9B70, 0xC343, 0x9B71, + 0xC344, 0x9B72, 0xC345, 0xBDE0, 0xC346, 0x9B73, 0xC347, 0x9B74, + 0xC348, 0x9B75, 0xC349, 0x9B76, 0xC34A, 0x9B77, 0xC34B, 0x9B78, + 0xC34C, 0x9B79, 0xC34D, 0x9B7A, 0xC34E, 0x9B81, 0xC34F, 0x9B82, + 0xC350, 0x9B83, 0xC351, 0x9B84, 0xC352, 0x9B85, 0xC353, 0x9B86, + 0xC354, 0x9B87, 0xC355, 0x9B88, 0xC356, 0x9B89, 0xC357, 0x9B8A, + 0xC358, 0x9B8B, 0xC359, 0x9B8C, 0xC35A, 0x9B8D, 0xC35B, 0x9B8E, + 0xC35C, 0x9B8F, 0xC35D, 0x9B90, 0xC35E, 0x9B91, 0xC35F, 0x9B92, + 0xC360, 0x9B93, 0xC361, 0x9B94, 0xC362, 0x9B95, 0xC363, 0x9B96, + 0xC364, 0x9B97, 0xC365, 0x9B98, 0xC366, 0x9B99, 0xC367, 0x9B9A, + 0xC368, 0xBDE1, 0xC369, 0xBDE2, 0xC36A, 0x9B9B, 0xC36B, 0x9B9C, + 0xC36C, 0xBDE3, 0xC36D, 0x9B9D, 0xC36E, 0x9B9E, 0xC36F, 0x9B9F, + 0xC370, 0xBDE4, 0xC371, 0x9BA0, 0xC372, 0xBDE5, 0xC373, 0x9BA1, + 0xC374, 0x9BA2, 0xC375, 0x9BA3, 0xC376, 0x9BA4, 0xC377, 0x9BA5, + 0xC378, 0xBDE6, 0xC379, 0xBDE7, 0xC37A, 0x9BA6, 0xC37B, 0x9BA7, + 0xC37C, 0xBDE8, 0xC37D, 0xBDE9, 0xC37E, 0x9BA8, 0xC37F, 0x9BA9, + 0xC380, 0x9BAA, 0xC381, 0x9BAB, 0xC382, 0x9BAC, 0xC383, 0x9BAD, + 0xC384, 0xBDEA, 0xC385, 0x9BAE, 0xC386, 0x9BAF, 0xC387, 0x9BB0, + 0xC388, 0xBDEB, 0xC389, 0x9BB1, 0xC38A, 0x9BB2, 0xC38B, 0x9BB3, + 0xC38C, 0xBDEC, 0xC38D, 0x9BB4, 0xC38E, 0x9BB5, 0xC38F, 0x9BB6, + 0xC390, 0x9BB7, 0xC391, 0x9BB8, 0xC392, 0x9BB9, 0xC393, 0x9BBA, + 0xC394, 0x9BBB, 0xC395, 0x9BBC, 0xC396, 0x9BBD, 0xC397, 0x9BBE, + 0xC398, 0x9BBF, 0xC399, 0x9BC0, 0xC39A, 0x9BC1, 0xC39B, 0x9BC2, + 0xC39C, 0x9BC3, 0xC39D, 0x9BC4, 0xC39E, 0x9BC5, 0xC39F, 0x9BC6, + 0xC3A0, 0x9BC7, 0xC3A1, 0x9BC8, 0xC3A2, 0x9BC9, 0xC3A3, 0x9BCA, + 0xC3A4, 0x9BCB, 0xC3A5, 0x9BCC, 0xC3A6, 0x9BCD, 0xC3A7, 0x9BCE, + 0xC3A8, 0x9BCF, 0xC3A9, 0x9BD0, 0xC3AA, 0x9BD1, 0xC3AB, 0x9BD2, + 0xC3AC, 0x9BD3, 0xC3AD, 0x9BD4, 0xC3AE, 0x9BD5, 0xC3AF, 0x9BD6, + 0xC3B0, 0x9BD7, 0xC3B1, 0x9BD8, 0xC3B2, 0x9BD9, 0xC3B3, 0x9BDA, + 0xC3B4, 0x9BDB, 0xC3B5, 0x9BDC, 0xC3B6, 0x9BDD, 0xC3B7, 0x9BDE, + 0xC3B8, 0x9BDF, 0xC3B9, 0x9BE0, 0xC3BA, 0x9BE1, 0xC3BB, 0x9BE2, + 0xC3BC, 0x9BE3, 0xC3BD, 0x9BE4, 0xC3BE, 0x9BE5, 0xC3BF, 0x9BE6, + 0xC3C0, 0xBDED, 0xC3C1, 0x9BE7, 0xC3C2, 0x9BE8, 0xC3C3, 0x9BE9, + 0xC3C4, 0x9BEA, 0xC3C5, 0x9BEB, 0xC3C6, 0x9BEC, 0xC3C7, 0x9BED, + 0xC3C8, 0x9BEE, 0xC3C9, 0x9BEF, 0xC3CA, 0x9BF0, 0xC3CB, 0x9BF1, + 0xC3CC, 0x9BF2, 0xC3CD, 0x9BF3, 0xC3CE, 0x9BF4, 0xC3CF, 0x9BF5, + 0xC3D0, 0x9BF6, 0xC3D1, 0x9BF7, 0xC3D2, 0x9BF8, 0xC3D3, 0x9BF9, + 0xC3D4, 0x9BFA, 0xC3D5, 0x9BFB, 0xC3D6, 0x9BFC, 0xC3D7, 0x9BFD, + 0xC3D8, 0xBDEE, 0xC3D9, 0xBDEF, 0xC3DA, 0x9BFE, 0xC3DB, 0x9C41, + 0xC3DC, 0xBDF0, 0xC3DD, 0x9C42, 0xC3DE, 0x9C43, 0xC3DF, 0xBDF1, + 0xC3E0, 0xBDF2, 0xC3E1, 0x9C44, 0xC3E2, 0xBDF3, 0xC3E3, 0x9C45, + 0xC3E4, 0x9C46, 0xC3E5, 0x9C47, 0xC3E6, 0x9C48, 0xC3E7, 0x9C49, + 0xC3E8, 0xBDF4, 0xC3E9, 0xBDF5, 0xC3EA, 0x9C4A, 0xC3EB, 0x9C4B, + 0xC3EC, 0x9C4C, 0xC3ED, 0xBDF6, 0xC3EE, 0x9C4D, 0xC3EF, 0x9C4E, + 0xC3F0, 0x9C4F, 0xC3F1, 0x9C50, 0xC3F2, 0x9C51, 0xC3F3, 0x9C52, + 0xC3F4, 0xBDF7, 0xC3F5, 0xBDF8, 0xC3F6, 0x9C53, 0xC3F7, 0x9C54, + 0xC3F8, 0xBDF9, 0xC3F9, 0x9C55, 0xC3FA, 0x9C56, 0xC3FB, 0x9C57, + 0xC3FC, 0x9C58, 0xC3FD, 0x9C59, 0xC3FE, 0x9C5A, 0xC3FF, 0x9C61, + 0xC400, 0x9C62, 0xC401, 0x9C63, 0xC402, 0x9C64, 0xC403, 0x9C65, + 0xC404, 0x9C66, 0xC405, 0x9C67, 0xC406, 0x9C68, 0xC407, 0x9C69, + 0xC408, 0xBDFA, 0xC409, 0x9C6A, 0xC40A, 0x9C6B, 0xC40B, 0x9C6C, + 0xC40C, 0x9C6D, 0xC40D, 0x9C6E, 0xC40E, 0x9C6F, 0xC40F, 0x9C70, + 0xC410, 0xBDFB, 0xC411, 0x9C71, 0xC412, 0x9C72, 0xC413, 0x9C73, + 0xC414, 0x9C74, 0xC415, 0x9C75, 0xC416, 0x9C76, 0xC417, 0x9C77, + 0xC418, 0x9C78, 0xC419, 0x9C79, 0xC41A, 0x9C7A, 0xC41B, 0x9C81, + 0xC41C, 0x9C82, 0xC41D, 0x9C83, 0xC41E, 0x9C84, 0xC41F, 0x9C85, + 0xC420, 0x9C86, 0xC421, 0x9C87, 0xC422, 0x9C88, 0xC423, 0x9C89, + 0xC424, 0xBDFC, 0xC425, 0x9C8A, 0xC426, 0x9C8B, 0xC427, 0x9C8C, + 0xC428, 0x9C8D, 0xC429, 0x9C8E, 0xC42A, 0x9C8F, 0xC42B, 0x9C90, + 0xC42C, 0xBDFD, 0xC42D, 0x9C91, 0xC42E, 0x9C92, 0xC42F, 0x9C93, + 0xC430, 0xBDFE, 0xC431, 0x9C94, 0xC432, 0x9C95, 0xC433, 0x9C96, + 0xC434, 0xBEA1, 0xC435, 0x9C97, 0xC436, 0x9C98, 0xC437, 0x9C99, + 0xC438, 0x9C9A, 0xC439, 0x9C9B, 0xC43A, 0x9C9C, 0xC43B, 0x9C9D, + 0xC43C, 0xBEA2, 0xC43D, 0xBEA3, 0xC43E, 0x9C9E, 0xC43F, 0x9C9F, + 0xC440, 0x9CA0, 0xC441, 0x9CA1, 0xC442, 0x9CA2, 0xC443, 0x9CA3, + 0xC444, 0x9CA4, 0xC445, 0x9CA5, 0xC446, 0x9CA6, 0xC447, 0x9CA7, + 0xC448, 0xBEA4, 0xC449, 0x9CA8, 0xC44A, 0x9CA9, 0xC44B, 0x9CAA, + 0xC44C, 0x9CAB, 0xC44D, 0x9CAC, 0xC44E, 0x9CAD, 0xC44F, 0x9CAE, + 0xC450, 0x9CAF, 0xC451, 0x9CB0, 0xC452, 0x9CB1, 0xC453, 0x9CB2, + 0xC454, 0x9CB3, 0xC455, 0x9CB4, 0xC456, 0x9CB5, 0xC457, 0x9CB6, + 0xC458, 0x9CB7, 0xC459, 0x9CB8, 0xC45A, 0x9CB9, 0xC45B, 0x9CBA, + 0xC45C, 0x9CBB, 0xC45D, 0x9CBC, 0xC45E, 0x9CBD, 0xC45F, 0x9CBE, + 0xC460, 0x9CBF, 0xC461, 0x9CC0, 0xC462, 0x9CC1, 0xC463, 0x9CC2, + 0xC464, 0xBEA5, 0xC465, 0xBEA6, 0xC466, 0x9CC3, 0xC467, 0x9CC4, + 0xC468, 0xBEA7, 0xC469, 0x9CC5, 0xC46A, 0x9CC6, 0xC46B, 0x9CC7, + 0xC46C, 0xBEA8, 0xC46D, 0x9CC8, 0xC46E, 0x9CC9, 0xC46F, 0x9CCA, + 0xC470, 0x9CCB, 0xC471, 0x9CCC, 0xC472, 0x9CCD, 0xC473, 0x9CCE, + 0xC474, 0xBEA9, 0xC475, 0xBEAA, 0xC476, 0x9CCF, 0xC477, 0x9CD0, + 0xC478, 0x9CD1, 0xC479, 0xBEAB, 0xC47A, 0x9CD2, 0xC47B, 0x9CD3, + 0xC47C, 0x9CD4, 0xC47D, 0x9CD5, 0xC47E, 0x9CD6, 0xC47F, 0x9CD7, + 0xC480, 0xBEAC, 0xC481, 0x9CD8, 0xC482, 0x9CD9, 0xC483, 0x9CDA, + 0xC484, 0x9CDB, 0xC485, 0x9CDC, 0xC486, 0x9CDD, 0xC487, 0x9CDE, + 0xC488, 0x9CDF, 0xC489, 0x9CE0, 0xC48A, 0x9CE1, 0xC48B, 0x9CE2, + 0xC48C, 0x9CE3, 0xC48D, 0x9CE4, 0xC48E, 0x9CE5, 0xC48F, 0x9CE6, + 0xC490, 0x9CE7, 0xC491, 0x9CE8, 0xC492, 0x9CE9, 0xC493, 0x9CEA, + 0xC494, 0xBEAD, 0xC495, 0x9CEB, 0xC496, 0x9CEC, 0xC497, 0x9CED, + 0xC498, 0x9CEE, 0xC499, 0x9CEF, 0xC49A, 0x9CF0, 0xC49B, 0x9CF1, + 0xC49C, 0xBEAE, 0xC49D, 0x9CF2, 0xC49E, 0x9CF3, 0xC49F, 0x9CF4, + 0xC4A0, 0x9CF5, 0xC4A1, 0x9CF6, 0xC4A2, 0x9CF7, 0xC4A3, 0x9CF8, + 0xC4A4, 0x9CF9, 0xC4A5, 0x9CFA, 0xC4A6, 0x9CFB, 0xC4A7, 0x9CFC, + 0xC4A8, 0x9CFD, 0xC4A9, 0x9CFE, 0xC4AA, 0x9D41, 0xC4AB, 0x9D42, + 0xC4AC, 0x9D43, 0xC4AD, 0x9D44, 0xC4AE, 0x9D45, 0xC4AF, 0x9D46, + 0xC4B0, 0x9D47, 0xC4B1, 0x9D48, 0xC4B2, 0x9D49, 0xC4B3, 0x9D4A, + 0xC4B4, 0x9D4B, 0xC4B5, 0x9D4C, 0xC4B6, 0x9D4D, 0xC4B7, 0x9D4E, + 0xC4B8, 0xBEAF, 0xC4B9, 0x9D4F, 0xC4BA, 0x9D50, 0xC4BB, 0x9D51, + 0xC4BC, 0xBEB0, 0xC4BD, 0x9D52, 0xC4BE, 0x9D53, 0xC4BF, 0x9D54, + 0xC4C0, 0x9D55, 0xC4C1, 0x9D56, 0xC4C2, 0x9D57, 0xC4C3, 0x9D58, + 0xC4C4, 0x9D59, 0xC4C5, 0x9D5A, 0xC4C6, 0x9D61, 0xC4C7, 0x9D62, + 0xC4C8, 0x9D63, 0xC4C9, 0x9D64, 0xC4CA, 0x9D65, 0xC4CB, 0x9D66, + 0xC4CC, 0x9D67, 0xC4CD, 0x9D68, 0xC4CE, 0x9D69, 0xC4CF, 0x9D6A, + 0xC4D0, 0x9D6B, 0xC4D1, 0x9D6C, 0xC4D2, 0x9D6D, 0xC4D3, 0x9D6E, + 0xC4D4, 0x9D6F, 0xC4D5, 0x9D70, 0xC4D6, 0x9D71, 0xC4D7, 0x9D72, + 0xC4D8, 0x9D73, 0xC4D9, 0x9D74, 0xC4DA, 0x9D75, 0xC4DB, 0x9D76, + 0xC4DC, 0x9D77, 0xC4DD, 0x9D78, 0xC4DE, 0x9D79, 0xC4DF, 0x9D7A, + 0xC4E0, 0x9D81, 0xC4E1, 0x9D82, 0xC4E2, 0x9D83, 0xC4E3, 0x9D84, + 0xC4E4, 0x9D85, 0xC4E5, 0x9D86, 0xC4E6, 0x9D87, 0xC4E7, 0x9D88, + 0xC4E8, 0x9D89, 0xC4E9, 0xBEB1, 0xC4EA, 0x9D8A, 0xC4EB, 0x9D8B, + 0xC4EC, 0x9D8C, 0xC4ED, 0x9D8D, 0xC4EE, 0x9D8E, 0xC4EF, 0x9D8F, + 0xC4F0, 0xBEB2, 0xC4F1, 0xBEB3, 0xC4F2, 0x9D90, 0xC4F3, 0x9D91, + 0xC4F4, 0xBEB4, 0xC4F5, 0x9D92, 0xC4F6, 0x9D93, 0xC4F7, 0x9D94, + 0xC4F8, 0xBEB5, 0xC4F9, 0x9D95, 0xC4FA, 0xBEB6, 0xC4FB, 0x9D96, + 0xC4FC, 0x9D97, 0xC4FD, 0x9D98, 0xC4FE, 0x9D99, 0xC4FF, 0xBEB7, + 0xC500, 0xBEB8, 0xC501, 0xBEB9, 0xC502, 0x9D9A, 0xC503, 0x9D9B, + 0xC504, 0x9D9C, 0xC505, 0x9D9D, 0xC506, 0x9D9E, 0xC507, 0x9D9F, + 0xC508, 0x9DA0, 0xC509, 0x9DA1, 0xC50A, 0x9DA2, 0xC50B, 0x9DA3, + 0xC50C, 0xBEBA, 0xC50D, 0x9DA4, 0xC50E, 0x9DA5, 0xC50F, 0x9DA6, + 0xC510, 0xBEBB, 0xC511, 0x9DA7, 0xC512, 0x9DA8, 0xC513, 0x9DA9, + 0xC514, 0xBEBC, 0xC515, 0x9DAA, 0xC516, 0x9DAB, 0xC517, 0x9DAC, + 0xC518, 0x9DAD, 0xC519, 0x9DAE, 0xC51A, 0x9DAF, 0xC51B, 0x9DB0, + 0xC51C, 0xBEBD, 0xC51D, 0x9DB1, 0xC51E, 0x9DB2, 0xC51F, 0x9DB3, + 0xC520, 0x9DB4, 0xC521, 0x9DB5, 0xC522, 0x9DB6, 0xC523, 0x9DB7, + 0xC524, 0x9DB8, 0xC525, 0x9DB9, 0xC526, 0x9DBA, 0xC527, 0x9DBB, + 0xC528, 0xBEBE, 0xC529, 0xBEBF, 0xC52A, 0x9DBC, 0xC52B, 0x9DBD, + 0xC52C, 0xBEC0, 0xC52D, 0x9DBE, 0xC52E, 0x9DBF, 0xC52F, 0x9DC0, + 0xC530, 0xBEC1, 0xC531, 0x9DC1, 0xC532, 0x9DC2, 0xC533, 0x9DC3, + 0xC534, 0x9DC4, 0xC535, 0x9DC5, 0xC536, 0x9DC6, 0xC537, 0x9DC7, + 0xC538, 0xBEC2, 0xC539, 0xBEC3, 0xC53A, 0x9DC8, 0xC53B, 0xBEC4, + 0xC53C, 0x9DC9, 0xC53D, 0xBEC5, 0xC53E, 0x9DCA, 0xC53F, 0x9DCB, + 0xC540, 0x9DCC, 0xC541, 0x9DCD, 0xC542, 0x9DCE, 0xC543, 0x9DCF, + 0xC544, 0xBEC6, 0xC545, 0xBEC7, 0xC546, 0x9DD0, 0xC547, 0x9DD1, + 0xC548, 0xBEC8, 0xC549, 0xBEC9, 0xC54A, 0xBECA, 0xC54B, 0x9DD2, + 0xC54C, 0xBECB, 0xC54D, 0xBECC, 0xC54E, 0xBECD, 0xC54F, 0x9DD3, + 0xC550, 0x9DD4, 0xC551, 0x9DD5, 0xC552, 0x9DD6, 0xC553, 0xBECE, + 0xC554, 0xBECF, 0xC555, 0xBED0, 0xC556, 0x9DD7, 0xC557, 0xBED1, + 0xC558, 0xBED2, 0xC559, 0xBED3, 0xC55A, 0x9DD8, 0xC55B, 0x9DD9, + 0xC55C, 0x9DDA, 0xC55D, 0xBED4, 0xC55E, 0xBED5, 0xC55F, 0x9DDB, + 0xC560, 0xBED6, 0xC561, 0xBED7, 0xC562, 0x9DDC, 0xC563, 0x9DDD, + 0xC564, 0xBED8, 0xC565, 0x9DDE, 0xC566, 0x9DDF, 0xC567, 0x9DE0, + 0xC568, 0xBED9, 0xC569, 0x9DE1, 0xC56A, 0x9DE2, 0xC56B, 0x9DE3, + 0xC56C, 0x9DE4, 0xC56D, 0x9DE5, 0xC56E, 0x9DE6, 0xC56F, 0x9DE7, + 0xC570, 0xBEDA, 0xC571, 0xBEDB, 0xC572, 0x9DE8, 0xC573, 0xBEDC, + 0xC574, 0xBEDD, 0xC575, 0xBEDE, 0xC576, 0x9DE9, 0xC577, 0x9DEA, + 0xC578, 0x9DEB, 0xC579, 0x9DEC, 0xC57A, 0x9DED, 0xC57B, 0x9DEE, + 0xC57C, 0xBEDF, 0xC57D, 0xBEE0, 0xC57E, 0x9DEF, 0xC57F, 0x9DF0, + 0xC580, 0xBEE1, 0xC581, 0x9DF1, 0xC582, 0x9DF2, 0xC583, 0x9DF3, + 0xC584, 0xBEE2, 0xC585, 0x9DF4, 0xC586, 0x9DF5, 0xC587, 0xBEE3, + 0xC588, 0x9DF6, 0xC589, 0x9DF7, 0xC58A, 0x9DF8, 0xC58B, 0x9DF9, + 0xC58C, 0xBEE4, 0xC58D, 0xBEE5, 0xC58E, 0x9DFA, 0xC58F, 0xBEE6, + 0xC590, 0x9DFB, 0xC591, 0xBEE7, 0xC592, 0x9DFC, 0xC593, 0x9DFD, + 0xC594, 0x9DFE, 0xC595, 0xBEE8, 0xC596, 0x9E41, 0xC597, 0xBEE9, + 0xC598, 0xBEEA, 0xC599, 0x9E42, 0xC59A, 0x9E43, 0xC59B, 0x9E44, + 0xC59C, 0xBEEB, 0xC59D, 0x9E45, 0xC59E, 0x9E46, 0xC59F, 0x9E47, + 0xC5A0, 0xBEEC, 0xC5A1, 0x9E48, 0xC5A2, 0x9E49, 0xC5A3, 0x9E4A, + 0xC5A4, 0x9E4B, 0xC5A5, 0x9E4C, 0xC5A6, 0x9E4D, 0xC5A7, 0x9E4E, + 0xC5A8, 0x9E4F, 0xC5A9, 0xBEED, 0xC5AA, 0x9E50, 0xC5AB, 0x9E51, + 0xC5AC, 0x9E52, 0xC5AD, 0x9E53, 0xC5AE, 0x9E54, 0xC5AF, 0x9E55, + 0xC5B0, 0x9E56, 0xC5B1, 0x9E57, 0xC5B2, 0x9E58, 0xC5B3, 0x9E59, + 0xC5B4, 0xBEEE, 0xC5B5, 0xBEEF, 0xC5B6, 0x9E5A, 0xC5B7, 0x9E61, + 0xC5B8, 0xBEF0, 0xC5B9, 0xBEF1, 0xC5BA, 0x9E62, 0xC5BB, 0xBEF2, + 0xC5BC, 0xBEF3, 0xC5BD, 0xBEF4, 0xC5BE, 0xBEF5, 0xC5BF, 0x9E63, + 0xC5C0, 0x9E64, 0xC5C1, 0x9E65, 0xC5C2, 0x9E66, 0xC5C3, 0x9E67, + 0xC5C4, 0xBEF6, 0xC5C5, 0xBEF7, 0xC5C6, 0xBEF8, 0xC5C7, 0xBEF9, + 0xC5C8, 0xBEFA, 0xC5C9, 0xBEFB, 0xC5CA, 0xBEFC, 0xC5CB, 0x9E68, + 0xC5CC, 0xBEFD, 0xC5CD, 0x9E69, 0xC5CE, 0xBEFE, 0xC5CF, 0x9E6A, + 0xC5D0, 0xBFA1, 0xC5D1, 0xBFA2, 0xC5D2, 0x9E6B, 0xC5D3, 0x9E6C, + 0xC5D4, 0xBFA3, 0xC5D5, 0x9E6D, 0xC5D6, 0x9E6E, 0xC5D7, 0x9E6F, + 0xC5D8, 0xBFA4, 0xC5D9, 0x9E70, 0xC5DA, 0x9E71, 0xC5DB, 0x9E72, + 0xC5DC, 0x9E73, 0xC5DD, 0x9E74, 0xC5DE, 0x9E75, 0xC5DF, 0x9E76, + 0xC5E0, 0xBFA5, 0xC5E1, 0xBFA6, 0xC5E2, 0x9E77, 0xC5E3, 0xBFA7, + 0xC5E4, 0x9E78, 0xC5E5, 0xBFA8, 0xC5E6, 0x9E79, 0xC5E7, 0x9E7A, + 0xC5E8, 0x9E81, 0xC5E9, 0x9E82, 0xC5EA, 0x9E83, 0xC5EB, 0x9E84, + 0xC5EC, 0xBFA9, 0xC5ED, 0xBFAA, 0xC5EE, 0xBFAB, 0xC5EF, 0x9E85, + 0xC5F0, 0xBFAC, 0xC5F1, 0x9E86, 0xC5F2, 0x9E87, 0xC5F3, 0x9E88, + 0xC5F4, 0xBFAD, 0xC5F5, 0x9E89, 0xC5F6, 0xBFAE, 0xC5F7, 0xBFAF, + 0xC5F8, 0x9E8A, 0xC5F9, 0x9E8B, 0xC5FA, 0x9E8C, 0xC5FB, 0x9E8D, + 0xC5FC, 0xBFB0, 0xC5FD, 0xBFB1, 0xC5FE, 0xBFB2, 0xC5FF, 0xBFB3, + 0xC600, 0xBFB4, 0xC601, 0xBFB5, 0xC602, 0x9E8E, 0xC603, 0x9E8F, + 0xC604, 0x9E90, 0xC605, 0xBFB6, 0xC606, 0xBFB7, 0xC607, 0xBFB8, + 0xC608, 0xBFB9, 0xC609, 0x9E91, 0xC60A, 0x9E92, 0xC60B, 0x9E93, + 0xC60C, 0xBFBA, 0xC60D, 0x9E94, 0xC60E, 0x9E95, 0xC60F, 0x9E96, + 0xC610, 0xBFBB, 0xC611, 0x9E97, 0xC612, 0x9E98, 0xC613, 0x9E99, + 0xC614, 0x9E9A, 0xC615, 0x9E9B, 0xC616, 0x9E9C, 0xC617, 0x9E9D, + 0xC618, 0xBFBC, 0xC619, 0xBFBD, 0xC61A, 0x9E9E, 0xC61B, 0xBFBE, + 0xC61C, 0xBFBF, 0xC61D, 0x9E9F, 0xC61E, 0x9EA0, 0xC61F, 0x9EA1, + 0xC620, 0x9EA2, 0xC621, 0x9EA3, 0xC622, 0x9EA4, 0xC623, 0x9EA5, + 0xC624, 0xBFC0, 0xC625, 0xBFC1, 0xC626, 0x9EA6, 0xC627, 0x9EA7, + 0xC628, 0xBFC2, 0xC629, 0x9EA8, 0xC62A, 0x9EA9, 0xC62B, 0x9EAA, + 0xC62C, 0xBFC3, 0xC62D, 0xBFC4, 0xC62E, 0xBFC5, 0xC62F, 0x9EAB, + 0xC630, 0xBFC6, 0xC631, 0x9EAC, 0xC632, 0x9EAD, 0xC633, 0xBFC7, + 0xC634, 0xBFC8, 0xC635, 0xBFC9, 0xC636, 0x9EAE, 0xC637, 0xBFCA, + 0xC638, 0x9EAF, 0xC639, 0xBFCB, 0xC63A, 0x9EB0, 0xC63B, 0xBFCC, + 0xC63C, 0x9EB1, 0xC63D, 0x9EB2, 0xC63E, 0x9EB3, 0xC63F, 0x9EB4, + 0xC640, 0xBFCD, 0xC641, 0xBFCE, 0xC642, 0x9EB5, 0xC643, 0x9EB6, + 0xC644, 0xBFCF, 0xC645, 0x9EB7, 0xC646, 0x9EB8, 0xC647, 0x9EB9, + 0xC648, 0xBFD0, 0xC649, 0x9EBA, 0xC64A, 0x9EBB, 0xC64B, 0x9EBC, + 0xC64C, 0x9EBD, 0xC64D, 0x9EBE, 0xC64E, 0x9EBF, 0xC64F, 0x9EC0, + 0xC650, 0xBFD1, 0xC651, 0xBFD2, 0xC652, 0x9EC1, 0xC653, 0xBFD3, + 0xC654, 0xBFD4, 0xC655, 0xBFD5, 0xC656, 0x9EC2, 0xC657, 0x9EC3, + 0xC658, 0x9EC4, 0xC659, 0x9EC5, 0xC65A, 0x9EC6, 0xC65B, 0x9EC7, + 0xC65C, 0xBFD6, 0xC65D, 0xBFD7, 0xC65E, 0x9EC8, 0xC65F, 0x9EC9, + 0xC660, 0xBFD8, 0xC661, 0x9ECA, 0xC662, 0x9ECB, 0xC663, 0x9ECC, + 0xC664, 0x9ECD, 0xC665, 0x9ECE, 0xC666, 0x9ECF, 0xC667, 0x9ED0, + 0xC668, 0x9ED1, 0xC669, 0x9ED2, 0xC66A, 0x9ED3, 0xC66B, 0x9ED4, + 0xC66C, 0xBFD9, 0xC66D, 0x9ED5, 0xC66E, 0x9ED6, 0xC66F, 0xBFDA, + 0xC670, 0x9ED7, 0xC671, 0xBFDB, 0xC672, 0x9ED8, 0xC673, 0x9ED9, + 0xC674, 0x9EDA, 0xC675, 0x9EDB, 0xC676, 0x9EDC, 0xC677, 0x9EDD, + 0xC678, 0xBFDC, 0xC679, 0xBFDD, 0xC67A, 0x9EDE, 0xC67B, 0x9EDF, + 0xC67C, 0xBFDE, 0xC67D, 0x9EE0, 0xC67E, 0x9EE1, 0xC67F, 0x9EE2, + 0xC680, 0xBFDF, 0xC681, 0x9EE3, 0xC682, 0x9EE4, 0xC683, 0x9EE5, + 0xC684, 0x9EE6, 0xC685, 0x9EE7, 0xC686, 0x9EE8, 0xC687, 0x9EE9, + 0xC688, 0xBFE0, 0xC689, 0xBFE1, 0xC68A, 0x9EEA, 0xC68B, 0xBFE2, + 0xC68C, 0x9EEB, 0xC68D, 0xBFE3, 0xC68E, 0x9EEC, 0xC68F, 0x9EED, + 0xC690, 0x9EEE, 0xC691, 0x9EEF, 0xC692, 0x9EF0, 0xC693, 0x9EF1, + 0xC694, 0xBFE4, 0xC695, 0xBFE5, 0xC696, 0x9EF2, 0xC697, 0x9EF3, + 0xC698, 0xBFE6, 0xC699, 0x9EF4, 0xC69A, 0x9EF5, 0xC69B, 0x9EF6, + 0xC69C, 0xBFE7, 0xC69D, 0x9EF7, 0xC69E, 0x9EF8, 0xC69F, 0x9EF9, + 0xC6A0, 0x9EFA, 0xC6A1, 0x9EFB, 0xC6A2, 0x9EFC, 0xC6A3, 0x9EFD, + 0xC6A4, 0xBFE8, 0xC6A5, 0xBFE9, 0xC6A6, 0x9EFE, 0xC6A7, 0xBFEA, + 0xC6A8, 0x9F41, 0xC6A9, 0xBFEB, 0xC6AA, 0x9F42, 0xC6AB, 0x9F43, + 0xC6AC, 0x9F44, 0xC6AD, 0x9F45, 0xC6AE, 0x9F46, 0xC6AF, 0x9F47, + 0xC6B0, 0xBFEC, 0xC6B1, 0xBFED, 0xC6B2, 0x9F48, 0xC6B3, 0x9F49, + 0xC6B4, 0xBFEE, 0xC6B5, 0x9F4A, 0xC6B6, 0x9F4B, 0xC6B7, 0x9F4C, + 0xC6B8, 0xBFEF, 0xC6B9, 0xBFF0, 0xC6BA, 0xBFF1, 0xC6BB, 0x9F4D, + 0xC6BC, 0x9F4E, 0xC6BD, 0x9F4F, 0xC6BE, 0x9F50, 0xC6BF, 0x9F51, + 0xC6C0, 0xBFF2, 0xC6C1, 0xBFF3, 0xC6C2, 0x9F52, 0xC6C3, 0xBFF4, + 0xC6C4, 0x9F53, 0xC6C5, 0xBFF5, 0xC6C6, 0x9F54, 0xC6C7, 0x9F55, + 0xC6C8, 0x9F56, 0xC6C9, 0x9F57, 0xC6CA, 0x9F58, 0xC6CB, 0x9F59, + 0xC6CC, 0xBFF6, 0xC6CD, 0xBFF7, 0xC6CE, 0x9F5A, 0xC6CF, 0x9F61, + 0xC6D0, 0xBFF8, 0xC6D1, 0x9F62, 0xC6D2, 0x9F63, 0xC6D3, 0x9F64, + 0xC6D4, 0xBFF9, 0xC6D5, 0x9F65, 0xC6D6, 0x9F66, 0xC6D7, 0x9F67, + 0xC6D8, 0x9F68, 0xC6D9, 0x9F69, 0xC6DA, 0x9F6A, 0xC6DB, 0x9F6B, + 0xC6DC, 0xBFFA, 0xC6DD, 0xBFFB, 0xC6DE, 0x9F6C, 0xC6DF, 0x9F6D, + 0xC6E0, 0xBFFC, 0xC6E1, 0xBFFD, 0xC6E2, 0x9F6E, 0xC6E3, 0x9F6F, + 0xC6E4, 0x9F70, 0xC6E5, 0x9F71, 0xC6E6, 0x9F72, 0xC6E7, 0x9F73, + 0xC6E8, 0xBFFE, 0xC6E9, 0xC0A1, 0xC6EA, 0x9F74, 0xC6EB, 0x9F75, + 0xC6EC, 0xC0A2, 0xC6ED, 0x9F76, 0xC6EE, 0x9F77, 0xC6EF, 0x9F78, + 0xC6F0, 0xC0A3, 0xC6F1, 0x9F79, 0xC6F2, 0x9F7A, 0xC6F3, 0x9F81, + 0xC6F4, 0x9F82, 0xC6F5, 0x9F83, 0xC6F6, 0x9F84, 0xC6F7, 0x9F85, + 0xC6F8, 0xC0A4, 0xC6F9, 0xC0A5, 0xC6FA, 0x9F86, 0xC6FB, 0x9F87, + 0xC6FC, 0x9F88, 0xC6FD, 0xC0A6, 0xC6FE, 0x9F89, 0xC6FF, 0x9F8A, + 0xC700, 0x9F8B, 0xC701, 0x9F8C, 0xC702, 0x9F8D, 0xC703, 0x9F8E, + 0xC704, 0xC0A7, 0xC705, 0xC0A8, 0xC706, 0x9F8F, 0xC707, 0x9F90, + 0xC708, 0xC0A9, 0xC709, 0x9F91, 0xC70A, 0x9F92, 0xC70B, 0x9F93, + 0xC70C, 0xC0AA, 0xC70D, 0x9F94, 0xC70E, 0x9F95, 0xC70F, 0x9F96, + 0xC710, 0x9F97, 0xC711, 0x9F98, 0xC712, 0x9F99, 0xC713, 0x9F9A, + 0xC714, 0xC0AB, 0xC715, 0xC0AC, 0xC716, 0x9F9B, 0xC717, 0xC0AD, + 0xC718, 0x9F9C, 0xC719, 0xC0AE, 0xC71A, 0x9F9D, 0xC71B, 0x9F9E, + 0xC71C, 0x9F9F, 0xC71D, 0x9FA0, 0xC71E, 0x9FA1, 0xC71F, 0x9FA2, + 0xC720, 0xC0AF, 0xC721, 0xC0B0, 0xC722, 0x9FA3, 0xC723, 0x9FA4, + 0xC724, 0xC0B1, 0xC725, 0x9FA5, 0xC726, 0x9FA6, 0xC727, 0x9FA7, + 0xC728, 0xC0B2, 0xC729, 0x9FA8, 0xC72A, 0x9FA9, 0xC72B, 0x9FAA, + 0xC72C, 0x9FAB, 0xC72D, 0x9FAC, 0xC72E, 0x9FAD, 0xC72F, 0x9FAE, + 0xC730, 0xC0B3, 0xC731, 0xC0B4, 0xC732, 0x9FAF, 0xC733, 0xC0B5, + 0xC734, 0x9FB0, 0xC735, 0xC0B6, 0xC736, 0x9FB1, 0xC737, 0xC0B7, + 0xC738, 0x9FB2, 0xC739, 0x9FB3, 0xC73A, 0x9FB4, 0xC73B, 0x9FB5, + 0xC73C, 0xC0B8, 0xC73D, 0xC0B9, 0xC73E, 0x9FB6, 0xC73F, 0x9FB7, + 0xC740, 0xC0BA, 0xC741, 0x9FB8, 0xC742, 0x9FB9, 0xC743, 0x9FBA, + 0xC744, 0xC0BB, 0xC745, 0x9FBB, 0xC746, 0x9FBC, 0xC747, 0x9FBD, + 0xC748, 0x9FBE, 0xC749, 0x9FBF, 0xC74A, 0xC0BC, 0xC74B, 0x9FC0, + 0xC74C, 0xC0BD, 0xC74D, 0xC0BE, 0xC74E, 0x9FC1, 0xC74F, 0xC0BF, + 0xC750, 0x9FC2, 0xC751, 0xC0C0, 0xC752, 0xC0C1, 0xC753, 0xC0C2, + 0xC754, 0xC0C3, 0xC755, 0xC0C4, 0xC756, 0xC0C5, 0xC757, 0xC0C6, + 0xC758, 0xC0C7, 0xC759, 0x9FC3, 0xC75A, 0x9FC4, 0xC75B, 0x9FC5, + 0xC75C, 0xC0C8, 0xC75D, 0x9FC6, 0xC75E, 0x9FC7, 0xC75F, 0x9FC8, + 0xC760, 0xC0C9, 0xC761, 0x9FC9, 0xC762, 0x9FCA, 0xC763, 0x9FCB, + 0xC764, 0x9FCC, 0xC765, 0x9FCD, 0xC766, 0x9FCE, 0xC767, 0x9FCF, + 0xC768, 0xC0CA, 0xC769, 0x9FD0, 0xC76A, 0x9FD1, 0xC76B, 0xC0CB, + 0xC76C, 0x9FD2, 0xC76D, 0x9FD3, 0xC76E, 0x9FD4, 0xC76F, 0x9FD5, + 0xC770, 0x9FD6, 0xC771, 0x9FD7, 0xC772, 0x9FD8, 0xC773, 0x9FD9, + 0xC774, 0xC0CC, 0xC775, 0xC0CD, 0xC776, 0x9FDA, 0xC777, 0x9FDB, + 0xC778, 0xC0CE, 0xC779, 0x9FDC, 0xC77A, 0x9FDD, 0xC77B, 0x9FDE, + 0xC77C, 0xC0CF, 0xC77D, 0xC0D0, 0xC77E, 0xC0D1, 0xC77F, 0x9FDF, + 0xC780, 0x9FE0, 0xC781, 0x9FE1, 0xC782, 0x9FE2, 0xC783, 0xC0D2, + 0xC784, 0xC0D3, 0xC785, 0xC0D4, 0xC786, 0x9FE3, 0xC787, 0xC0D5, + 0xC788, 0xC0D6, 0xC789, 0xC0D7, 0xC78A, 0xC0D8, 0xC78B, 0x9FE4, + 0xC78C, 0x9FE5, 0xC78D, 0x9FE6, 0xC78E, 0xC0D9, 0xC78F, 0x9FE7, + 0xC790, 0xC0DA, 0xC791, 0xC0DB, 0xC792, 0x9FE8, 0xC793, 0x9FE9, + 0xC794, 0xC0DC, 0xC795, 0x9FEA, 0xC796, 0xC0DD, 0xC797, 0xC0DE, + 0xC798, 0xC0DF, 0xC799, 0x9FEB, 0xC79A, 0xC0E0, 0xC79B, 0x9FEC, + 0xC79C, 0x9FED, 0xC79D, 0x9FEE, 0xC79E, 0x9FEF, 0xC79F, 0x9FF0, + 0xC7A0, 0xC0E1, 0xC7A1, 0xC0E2, 0xC7A2, 0x9FF1, 0xC7A3, 0xC0E3, + 0xC7A4, 0xC0E4, 0xC7A5, 0xC0E5, 0xC7A6, 0xC0E6, 0xC7A7, 0x9FF2, + 0xC7A8, 0x9FF3, 0xC7A9, 0x9FF4, 0xC7AA, 0x9FF5, 0xC7AB, 0x9FF6, + 0xC7AC, 0xC0E7, 0xC7AD, 0xC0E8, 0xC7AE, 0x9FF7, 0xC7AF, 0x9FF8, + 0xC7B0, 0xC0E9, 0xC7B1, 0x9FF9, 0xC7B2, 0x9FFA, 0xC7B3, 0x9FFB, + 0xC7B4, 0xC0EA, 0xC7B5, 0x9FFC, 0xC7B6, 0x9FFD, 0xC7B7, 0x9FFE, + 0xC7B8, 0xA041, 0xC7B9, 0xA042, 0xC7BA, 0xA043, 0xC7BB, 0xA044, + 0xC7BC, 0xC0EB, 0xC7BD, 0xC0EC, 0xC7BE, 0xA045, 0xC7BF, 0xC0ED, + 0xC7C0, 0xC0EE, 0xC7C1, 0xC0EF, 0xC7C2, 0xA046, 0xC7C3, 0xA047, + 0xC7C4, 0xA048, 0xC7C5, 0xA049, 0xC7C6, 0xA04A, 0xC7C7, 0xA04B, + 0xC7C8, 0xC0F0, 0xC7C9, 0xC0F1, 0xC7CA, 0xA04C, 0xC7CB, 0xA04D, + 0xC7CC, 0xC0F2, 0xC7CD, 0xA04E, 0xC7CE, 0xC0F3, 0xC7CF, 0xA04F, + 0xC7D0, 0xC0F4, 0xC7D1, 0xA050, 0xC7D2, 0xA051, 0xC7D3, 0xA052, + 0xC7D4, 0xA053, 0xC7D5, 0xA054, 0xC7D6, 0xA055, 0xC7D7, 0xA056, + 0xC7D8, 0xC0F5, 0xC7D9, 0xA057, 0xC7DA, 0xA058, 0xC7DB, 0xA059, + 0xC7DC, 0xA05A, 0xC7DD, 0xC0F6, 0xC7DE, 0xA061, 0xC7DF, 0xA062, + 0xC7E0, 0xA063, 0xC7E1, 0xA064, 0xC7E2, 0xA065, 0xC7E3, 0xA066, + 0xC7E4, 0xC0F7, 0xC7E5, 0xA067, 0xC7E6, 0xA068, 0xC7E7, 0xA069, + 0xC7E8, 0xC0F8, 0xC7E9, 0xA06A, 0xC7EA, 0xA06B, 0xC7EB, 0xA06C, + 0xC7EC, 0xC0F9, 0xC7ED, 0xA06D, 0xC7EE, 0xA06E, 0xC7EF, 0xA06F, + 0xC7F0, 0xA070, 0xC7F1, 0xA071, 0xC7F2, 0xA072, 0xC7F3, 0xA073, + 0xC7F4, 0xA074, 0xC7F5, 0xA075, 0xC7F6, 0xA076, 0xC7F7, 0xA077, + 0xC7F8, 0xA078, 0xC7F9, 0xA079, 0xC7FA, 0xA07A, 0xC7FB, 0xA081, + 0xC7FC, 0xA082, 0xC7FD, 0xA083, 0xC7FE, 0xA084, 0xC7FF, 0xA085, + 0xC800, 0xC0FA, 0xC801, 0xC0FB, 0xC802, 0xA086, 0xC803, 0xA087, + 0xC804, 0xC0FC, 0xC805, 0xA088, 0xC806, 0xA089, 0xC807, 0xA08A, + 0xC808, 0xC0FD, 0xC809, 0xA08B, 0xC80A, 0xC0FE, 0xC80B, 0xA08C, + 0xC80C, 0xA08D, 0xC80D, 0xA08E, 0xC80E, 0xA08F, 0xC80F, 0xA090, + 0xC810, 0xC1A1, 0xC811, 0xC1A2, 0xC812, 0xA091, 0xC813, 0xC1A3, + 0xC814, 0xA092, 0xC815, 0xC1A4, 0xC816, 0xC1A5, 0xC817, 0xA093, + 0xC818, 0xA094, 0xC819, 0xA095, 0xC81A, 0xA096, 0xC81B, 0xA097, + 0xC81C, 0xC1A6, 0xC81D, 0xC1A7, 0xC81E, 0xA098, 0xC81F, 0xA099, + 0xC820, 0xC1A8, 0xC821, 0xA09A, 0xC822, 0xA09B, 0xC823, 0xA09C, + 0xC824, 0xC1A9, 0xC825, 0xA09D, 0xC826, 0xA09E, 0xC827, 0xA09F, + 0xC828, 0xA0A0, 0xC829, 0xA0A1, 0xC82A, 0xA0A2, 0xC82B, 0xA0A3, + 0xC82C, 0xC1AA, 0xC82D, 0xC1AB, 0xC82E, 0xA0A4, 0xC82F, 0xC1AC, + 0xC830, 0xA0A5, 0xC831, 0xC1AD, 0xC832, 0xA0A6, 0xC833, 0xA0A7, + 0xC834, 0xA0A8, 0xC835, 0xA0A9, 0xC836, 0xA0AA, 0xC837, 0xA0AB, + 0xC838, 0xC1AE, 0xC839, 0xA0AC, 0xC83A, 0xA0AD, 0xC83B, 0xA0AE, + 0xC83C, 0xC1AF, 0xC83D, 0xA0AF, 0xC83E, 0xA0B0, 0xC83F, 0xA0B1, + 0xC840, 0xC1B0, 0xC841, 0xA0B2, 0xC842, 0xA0B3, 0xC843, 0xA0B4, + 0xC844, 0xA0B5, 0xC845, 0xA0B6, 0xC846, 0xA0B7, 0xC847, 0xA0B8, + 0xC848, 0xC1B1, 0xC849, 0xC1B2, 0xC84A, 0xA0B9, 0xC84B, 0xA0BA, + 0xC84C, 0xC1B3, 0xC84D, 0xC1B4, 0xC84E, 0xA0BB, 0xC84F, 0xA0BC, + 0xC850, 0xA0BD, 0xC851, 0xA0BE, 0xC852, 0xA0BF, 0xC853, 0xA0C0, + 0xC854, 0xC1B5, 0xC855, 0xA0C1, 0xC856, 0xA0C2, 0xC857, 0xA0C3, + 0xC858, 0xA0C4, 0xC859, 0xA0C5, 0xC85A, 0xA0C6, 0xC85B, 0xA0C7, + 0xC85C, 0xA0C8, 0xC85D, 0xA0C9, 0xC85E, 0xA0CA, 0xC85F, 0xA0CB, + 0xC860, 0xA0CC, 0xC861, 0xA0CD, 0xC862, 0xA0CE, 0xC863, 0xA0CF, + 0xC864, 0xA0D0, 0xC865, 0xA0D1, 0xC866, 0xA0D2, 0xC867, 0xA0D3, + 0xC868, 0xA0D4, 0xC869, 0xA0D5, 0xC86A, 0xA0D6, 0xC86B, 0xA0D7, + 0xC86C, 0xA0D8, 0xC86D, 0xA0D9, 0xC86E, 0xA0DA, 0xC86F, 0xA0DB, + 0xC870, 0xC1B6, 0xC871, 0xC1B7, 0xC872, 0xA0DC, 0xC873, 0xA0DD, + 0xC874, 0xC1B8, 0xC875, 0xA0DE, 0xC876, 0xA0DF, 0xC877, 0xA0E0, + 0xC878, 0xC1B9, 0xC879, 0xA0E1, 0xC87A, 0xC1BA, 0xC87B, 0xA0E2, + 0xC87C, 0xA0E3, 0xC87D, 0xA0E4, 0xC87E, 0xA0E5, 0xC87F, 0xA0E6, + 0xC880, 0xC1BB, 0xC881, 0xC1BC, 0xC882, 0xA0E7, 0xC883, 0xC1BD, + 0xC884, 0xA0E8, 0xC885, 0xC1BE, 0xC886, 0xC1BF, 0xC887, 0xC1C0, + 0xC888, 0xA0E9, 0xC889, 0xA0EA, 0xC88A, 0xA0EB, 0xC88B, 0xC1C1, + 0xC88C, 0xC1C2, 0xC88D, 0xC1C3, 0xC88E, 0xA0EC, 0xC88F, 0xA0ED, + 0xC890, 0xA0EE, 0xC891, 0xA0EF, 0xC892, 0xA0F0, 0xC893, 0xA0F1, + 0xC894, 0xC1C4, 0xC895, 0xA0F2, 0xC896, 0xA0F3, 0xC897, 0xA0F4, + 0xC898, 0xA0F5, 0xC899, 0xA0F6, 0xC89A, 0xA0F7, 0xC89B, 0xA0F8, + 0xC89C, 0xA0F9, 0xC89D, 0xC1C5, 0xC89E, 0xA0FA, 0xC89F, 0xC1C6, + 0xC8A0, 0xA0FB, 0xC8A1, 0xC1C7, 0xC8A2, 0xA0FC, 0xC8A3, 0xA0FD, + 0xC8A4, 0xA0FE, 0xC8A5, 0xA141, 0xC8A6, 0xA142, 0xC8A7, 0xA143, + 0xC8A8, 0xC1C8, 0xC8A9, 0xA144, 0xC8AA, 0xA145, 0xC8AB, 0xA146, + 0xC8AC, 0xA147, 0xC8AD, 0xA148, 0xC8AE, 0xA149, 0xC8AF, 0xA14A, + 0xC8B0, 0xA14B, 0xC8B1, 0xA14C, 0xC8B2, 0xA14D, 0xC8B3, 0xA14E, + 0xC8B4, 0xA14F, 0xC8B5, 0xA150, 0xC8B6, 0xA151, 0xC8B7, 0xA152, + 0xC8B8, 0xA153, 0xC8B9, 0xA154, 0xC8BA, 0xA155, 0xC8BB, 0xA156, + 0xC8BC, 0xC1C9, 0xC8BD, 0xC1CA, 0xC8BE, 0xA157, 0xC8BF, 0xA158, + 0xC8C0, 0xA159, 0xC8C1, 0xA15A, 0xC8C2, 0xA161, 0xC8C3, 0xA162, + 0xC8C4, 0xC1CB, 0xC8C5, 0xA163, 0xC8C6, 0xA164, 0xC8C7, 0xA165, + 0xC8C8, 0xC1CC, 0xC8C9, 0xA166, 0xC8CA, 0xA167, 0xC8CB, 0xA168, + 0xC8CC, 0xC1CD, 0xC8CD, 0xA169, 0xC8CE, 0xA16A, 0xC8CF, 0xA16B, + 0xC8D0, 0xA16C, 0xC8D1, 0xA16D, 0xC8D2, 0xA16E, 0xC8D3, 0xA16F, + 0xC8D4, 0xC1CE, 0xC8D5, 0xC1CF, 0xC8D6, 0xA170, 0xC8D7, 0xC1D0, + 0xC8D8, 0xA171, 0xC8D9, 0xC1D1, 0xC8DA, 0xA172, 0xC8DB, 0xA173, + 0xC8DC, 0xA174, 0xC8DD, 0xA175, 0xC8DE, 0xA176, 0xC8DF, 0xA177, + 0xC8E0, 0xC1D2, 0xC8E1, 0xC1D3, 0xC8E2, 0xA178, 0xC8E3, 0xA179, + 0xC8E4, 0xC1D4, 0xC8E5, 0xA17A, 0xC8E6, 0xA181, 0xC8E7, 0xA182, + 0xC8E8, 0xA183, 0xC8E9, 0xA184, 0xC8EA, 0xA185, 0xC8EB, 0xA186, + 0xC8EC, 0xA187, 0xC8ED, 0xA188, 0xC8EE, 0xA189, 0xC8EF, 0xA18A, + 0xC8F0, 0xA18B, 0xC8F1, 0xA18C, 0xC8F2, 0xA18D, 0xC8F3, 0xA18E, + 0xC8F4, 0xA18F, 0xC8F5, 0xC1D5, 0xC8F6, 0xA190, 0xC8F7, 0xA191, + 0xC8F8, 0xA192, 0xC8F9, 0xA193, 0xC8FA, 0xA194, 0xC8FB, 0xA195, + 0xC8FC, 0xC1D6, 0xC8FD, 0xC1D7, 0xC8FE, 0xA196, 0xC8FF, 0xA197, + 0xC900, 0xC1D8, 0xC901, 0xA198, 0xC902, 0xA199, 0xC903, 0xA19A, + 0xC904, 0xC1D9, 0xC905, 0xC1DA, 0xC906, 0xC1DB, 0xC907, 0xA19B, + 0xC908, 0xA19C, 0xC909, 0xA19D, 0xC90A, 0xA19E, 0xC90B, 0xA19F, + 0xC90C, 0xC1DC, 0xC90D, 0xC1DD, 0xC90E, 0xA1A0, 0xC90F, 0xC1DE, + 0xC910, 0xA241, 0xC911, 0xC1DF, 0xC912, 0xA242, 0xC913, 0xA243, + 0xC914, 0xA244, 0xC915, 0xA245, 0xC916, 0xA246, 0xC917, 0xA247, + 0xC918, 0xC1E0, 0xC919, 0xA248, 0xC91A, 0xA249, 0xC91B, 0xA24A, + 0xC91C, 0xA24B, 0xC91D, 0xA24C, 0xC91E, 0xA24D, 0xC91F, 0xA24E, + 0xC920, 0xA24F, 0xC921, 0xA250, 0xC922, 0xA251, 0xC923, 0xA252, + 0xC924, 0xA253, 0xC925, 0xA254, 0xC926, 0xA255, 0xC927, 0xA256, + 0xC928, 0xA257, 0xC929, 0xA258, 0xC92A, 0xA259, 0xC92B, 0xA25A, + 0xC92C, 0xC1E1, 0xC92D, 0xA261, 0xC92E, 0xA262, 0xC92F, 0xA263, + 0xC930, 0xA264, 0xC931, 0xA265, 0xC932, 0xA266, 0xC933, 0xA267, + 0xC934, 0xC1E2, 0xC935, 0xA268, 0xC936, 0xA269, 0xC937, 0xA26A, + 0xC938, 0xA26B, 0xC939, 0xA26C, 0xC93A, 0xA26D, 0xC93B, 0xA26E, + 0xC93C, 0xA26F, 0xC93D, 0xA270, 0xC93E, 0xA271, 0xC93F, 0xA272, + 0xC940, 0xA273, 0xC941, 0xA274, 0xC942, 0xA275, 0xC943, 0xA276, + 0xC944, 0xA277, 0xC945, 0xA278, 0xC946, 0xA279, 0xC947, 0xA27A, + 0xC948, 0xA281, 0xC949, 0xA282, 0xC94A, 0xA283, 0xC94B, 0xA284, + 0xC94C, 0xA285, 0xC94D, 0xA286, 0xC94E, 0xA287, 0xC94F, 0xA288, + 0xC950, 0xC1E3, 0xC951, 0xC1E4, 0xC952, 0xA289, 0xC953, 0xA28A, + 0xC954, 0xC1E5, 0xC955, 0xA28B, 0xC956, 0xA28C, 0xC957, 0xA28D, + 0xC958, 0xC1E6, 0xC959, 0xA28E, 0xC95A, 0xA28F, 0xC95B, 0xA290, + 0xC95C, 0xA291, 0xC95D, 0xA292, 0xC95E, 0xA293, 0xC95F, 0xA294, + 0xC960, 0xC1E7, 0xC961, 0xC1E8, 0xC962, 0xA295, 0xC963, 0xC1E9, + 0xC964, 0xA296, 0xC965, 0xA297, 0xC966, 0xA298, 0xC967, 0xA299, + 0xC968, 0xA29A, 0xC969, 0xA29B, 0xC96A, 0xA29C, 0xC96B, 0xA29D, + 0xC96C, 0xC1EA, 0xC96D, 0xA29E, 0xC96E, 0xA29F, 0xC96F, 0xA2A0, + 0xC970, 0xC1EB, 0xC971, 0xA341, 0xC972, 0xA342, 0xC973, 0xA343, + 0xC974, 0xC1EC, 0xC975, 0xA344, 0xC976, 0xA345, 0xC977, 0xA346, + 0xC978, 0xA347, 0xC979, 0xA348, 0xC97A, 0xA349, 0xC97B, 0xA34A, + 0xC97C, 0xC1ED, 0xC97D, 0xA34B, 0xC97E, 0xA34C, 0xC97F, 0xA34D, + 0xC980, 0xA34E, 0xC981, 0xA34F, 0xC982, 0xA350, 0xC983, 0xA351, + 0xC984, 0xA352, 0xC985, 0xA353, 0xC986, 0xA354, 0xC987, 0xA355, + 0xC988, 0xC1EE, 0xC989, 0xC1EF, 0xC98A, 0xA356, 0xC98B, 0xA357, + 0xC98C, 0xC1F0, 0xC98D, 0xA358, 0xC98E, 0xA359, 0xC98F, 0xA35A, + 0xC990, 0xC1F1, 0xC991, 0xA361, 0xC992, 0xA362, 0xC993, 0xA363, + 0xC994, 0xA364, 0xC995, 0xA365, 0xC996, 0xA366, 0xC997, 0xA367, + 0xC998, 0xC1F2, 0xC999, 0xC1F3, 0xC99A, 0xA368, 0xC99B, 0xC1F4, + 0xC99C, 0xA369, 0xC99D, 0xC1F5, 0xC99E, 0xA36A, 0xC99F, 0xA36B, + 0xC9A0, 0xA36C, 0xC9A1, 0xA36D, 0xC9A2, 0xA36E, 0xC9A3, 0xA36F, + 0xC9A4, 0xA370, 0xC9A5, 0xA371, 0xC9A6, 0xA372, 0xC9A7, 0xA373, + 0xC9A8, 0xA374, 0xC9A9, 0xA375, 0xC9AA, 0xA376, 0xC9AB, 0xA377, + 0xC9AC, 0xA378, 0xC9AD, 0xA379, 0xC9AE, 0xA37A, 0xC9AF, 0xA381, + 0xC9B0, 0xA382, 0xC9B1, 0xA383, 0xC9B2, 0xA384, 0xC9B3, 0xA385, + 0xC9B4, 0xA386, 0xC9B5, 0xA387, 0xC9B6, 0xA388, 0xC9B7, 0xA389, + 0xC9B8, 0xA38A, 0xC9B9, 0xA38B, 0xC9BA, 0xA38C, 0xC9BB, 0xA38D, + 0xC9BC, 0xA38E, 0xC9BD, 0xA38F, 0xC9BE, 0xA390, 0xC9BF, 0xA391, + 0xC9C0, 0xC1F6, 0xC9C1, 0xC1F7, 0xC9C2, 0xA392, 0xC9C3, 0xA393, + 0xC9C4, 0xC1F8, 0xC9C5, 0xA394, 0xC9C6, 0xA395, 0xC9C7, 0xC1F9, + 0xC9C8, 0xC1FA, 0xC9C9, 0xA396, 0xC9CA, 0xC1FB, 0xC9CB, 0xA397, + 0xC9CC, 0xA398, 0xC9CD, 0xA399, 0xC9CE, 0xA39A, 0xC9CF, 0xA39B, + 0xC9D0, 0xC1FC, 0xC9D1, 0xC1FD, 0xC9D2, 0xA39C, 0xC9D3, 0xC1FE, + 0xC9D4, 0xA39D, 0xC9D5, 0xC2A1, 0xC9D6, 0xC2A2, 0xC9D7, 0xA39E, + 0xC9D8, 0xA39F, 0xC9D9, 0xC2A3, 0xC9DA, 0xC2A4, 0xC9DB, 0xA3A0, + 0xC9DC, 0xC2A5, 0xC9DD, 0xC2A6, 0xC9DE, 0xA441, 0xC9DF, 0xA442, + 0xC9E0, 0xC2A7, 0xC9E1, 0xA443, 0xC9E2, 0xC2A8, 0xC9E3, 0xA444, + 0xC9E4, 0xC2A9, 0xC9E5, 0xA445, 0xC9E6, 0xA446, 0xC9E7, 0xC2AA, + 0xC9E8, 0xA447, 0xC9E9, 0xA448, 0xC9EA, 0xA449, 0xC9EB, 0xA44A, + 0xC9EC, 0xC2AB, 0xC9ED, 0xC2AC, 0xC9EE, 0xA44B, 0xC9EF, 0xC2AD, + 0xC9F0, 0xC2AE, 0xC9F1, 0xC2AF, 0xC9F2, 0xA44C, 0xC9F3, 0xA44D, + 0xC9F4, 0xA44E, 0xC9F5, 0xA44F, 0xC9F6, 0xA450, 0xC9F7, 0xA451, + 0xC9F8, 0xC2B0, 0xC9F9, 0xC2B1, 0xC9FA, 0xA452, 0xC9FB, 0xA453, + 0xC9FC, 0xC2B2, 0xC9FD, 0xA454, 0xC9FE, 0xA455, 0xC9FF, 0xA456, + 0xCA00, 0xC2B3, 0xCA01, 0xA457, 0xCA02, 0xA458, 0xCA03, 0xA459, + 0xCA04, 0xA45A, 0xCA05, 0xA461, 0xCA06, 0xA462, 0xCA07, 0xA463, + 0xCA08, 0xC2B4, 0xCA09, 0xC2B5, 0xCA0A, 0xA464, 0xCA0B, 0xC2B6, + 0xCA0C, 0xC2B7, 0xCA0D, 0xC2B8, 0xCA0E, 0xA465, 0xCA0F, 0xA466, + 0xCA10, 0xA467, 0xCA11, 0xA468, 0xCA12, 0xA469, 0xCA13, 0xA46A, + 0xCA14, 0xC2B9, 0xCA15, 0xA46B, 0xCA16, 0xA46C, 0xCA17, 0xA46D, + 0xCA18, 0xC2BA, 0xCA19, 0xA46E, 0xCA1A, 0xA46F, 0xCA1B, 0xA470, + 0xCA1C, 0xA471, 0xCA1D, 0xA472, 0xCA1E, 0xA473, 0xCA1F, 0xA474, + 0xCA20, 0xA475, 0xCA21, 0xA476, 0xCA22, 0xA477, 0xCA23, 0xA478, + 0xCA24, 0xA479, 0xCA25, 0xA47A, 0xCA26, 0xA481, 0xCA27, 0xA482, + 0xCA28, 0xA483, 0xCA29, 0xC2BB, 0xCA2A, 0xA484, 0xCA2B, 0xA485, + 0xCA2C, 0xA486, 0xCA2D, 0xA487, 0xCA2E, 0xA488, 0xCA2F, 0xA489, + 0xCA30, 0xA48A, 0xCA31, 0xA48B, 0xCA32, 0xA48C, 0xCA33, 0xA48D, + 0xCA34, 0xA48E, 0xCA35, 0xA48F, 0xCA36, 0xA490, 0xCA37, 0xA491, + 0xCA38, 0xA492, 0xCA39, 0xA493, 0xCA3A, 0xA494, 0xCA3B, 0xA495, + 0xCA3C, 0xA496, 0xCA3D, 0xA497, 0xCA3E, 0xA498, 0xCA3F, 0xA499, + 0xCA40, 0xA49A, 0xCA41, 0xA49B, 0xCA42, 0xA49C, 0xCA43, 0xA49D, + 0xCA44, 0xA49E, 0xCA45, 0xA49F, 0xCA46, 0xA4A0, 0xCA47, 0xA541, + 0xCA48, 0xA542, 0xCA49, 0xA543, 0xCA4A, 0xA544, 0xCA4B, 0xA545, + 0xCA4C, 0xC2BC, 0xCA4D, 0xC2BD, 0xCA4E, 0xA546, 0xCA4F, 0xA547, + 0xCA50, 0xC2BE, 0xCA51, 0xA548, 0xCA52, 0xA549, 0xCA53, 0xA54A, + 0xCA54, 0xC2BF, 0xCA55, 0xA54B, 0xCA56, 0xA54C, 0xCA57, 0xA54D, + 0xCA58, 0xA54E, 0xCA59, 0xA54F, 0xCA5A, 0xA550, 0xCA5B, 0xA551, + 0xCA5C, 0xC2C0, 0xCA5D, 0xC2C1, 0xCA5E, 0xA552, 0xCA5F, 0xC2C2, + 0xCA60, 0xC2C3, 0xCA61, 0xC2C4, 0xCA62, 0xA553, 0xCA63, 0xA554, + 0xCA64, 0xA555, 0xCA65, 0xA556, 0xCA66, 0xA557, 0xCA67, 0xA558, + 0xCA68, 0xC2C5, 0xCA69, 0xA559, 0xCA6A, 0xA55A, 0xCA6B, 0xA561, + 0xCA6C, 0xA562, 0xCA6D, 0xA563, 0xCA6E, 0xA564, 0xCA6F, 0xA565, + 0xCA70, 0xA566, 0xCA71, 0xA567, 0xCA72, 0xA568, 0xCA73, 0xA569, + 0xCA74, 0xA56A, 0xCA75, 0xA56B, 0xCA76, 0xA56C, 0xCA77, 0xA56D, + 0xCA78, 0xA56E, 0xCA79, 0xA56F, 0xCA7A, 0xA570, 0xCA7B, 0xA571, + 0xCA7C, 0xA572, 0xCA7D, 0xC2C6, 0xCA7E, 0xA573, 0xCA7F, 0xA574, + 0xCA80, 0xA575, 0xCA81, 0xA576, 0xCA82, 0xA577, 0xCA83, 0xA578, + 0xCA84, 0xC2C7, 0xCA85, 0xA579, 0xCA86, 0xA57A, 0xCA87, 0xA581, + 0xCA88, 0xA582, 0xCA89, 0xA583, 0xCA8A, 0xA584, 0xCA8B, 0xA585, + 0xCA8C, 0xA586, 0xCA8D, 0xA587, 0xCA8E, 0xA588, 0xCA8F, 0xA589, + 0xCA90, 0xA58A, 0xCA91, 0xA58B, 0xCA92, 0xA58C, 0xCA93, 0xA58D, + 0xCA94, 0xA58E, 0xCA95, 0xA58F, 0xCA96, 0xA590, 0xCA97, 0xA591, + 0xCA98, 0xC2C8, 0xCA99, 0xA592, 0xCA9A, 0xA593, 0xCA9B, 0xA594, + 0xCA9C, 0xA595, 0xCA9D, 0xA596, 0xCA9E, 0xA597, 0xCA9F, 0xA598, + 0xCAA0, 0xA599, 0xCAA1, 0xA59A, 0xCAA2, 0xA59B, 0xCAA3, 0xA59C, + 0xCAA4, 0xA59D, 0xCAA5, 0xA59E, 0xCAA6, 0xA59F, 0xCAA7, 0xA5A0, + 0xCAA8, 0xA641, 0xCAA9, 0xA642, 0xCAAA, 0xA643, 0xCAAB, 0xA644, + 0xCAAC, 0xA645, 0xCAAD, 0xA646, 0xCAAE, 0xA647, 0xCAAF, 0xA648, + 0xCAB0, 0xA649, 0xCAB1, 0xA64A, 0xCAB2, 0xA64B, 0xCAB3, 0xA64C, + 0xCAB4, 0xA64D, 0xCAB5, 0xA64E, 0xCAB6, 0xA64F, 0xCAB7, 0xA650, + 0xCAB8, 0xA651, 0xCAB9, 0xA652, 0xCABA, 0xA653, 0xCABB, 0xA654, + 0xCABC, 0xC2C9, 0xCABD, 0xC2CA, 0xCABE, 0xA655, 0xCABF, 0xA656, + 0xCAC0, 0xC2CB, 0xCAC1, 0xA657, 0xCAC2, 0xA658, 0xCAC3, 0xA659, + 0xCAC4, 0xC2CC, 0xCAC5, 0xA65A, 0xCAC6, 0xA661, 0xCAC7, 0xA662, + 0xCAC8, 0xA663, 0xCAC9, 0xA664, 0xCACA, 0xA665, 0xCACB, 0xA666, + 0xCACC, 0xC2CD, 0xCACD, 0xC2CE, 0xCACE, 0xA667, 0xCACF, 0xC2CF, + 0xCAD0, 0xA668, 0xCAD1, 0xC2D0, 0xCAD2, 0xA669, 0xCAD3, 0xC2D1, + 0xCAD4, 0xA66A, 0xCAD5, 0xA66B, 0xCAD6, 0xA66C, 0xCAD7, 0xA66D, + 0xCAD8, 0xC2D2, 0xCAD9, 0xC2D3, 0xCADA, 0xA66E, 0xCADB, 0xA66F, + 0xCADC, 0xA670, 0xCADD, 0xA671, 0xCADE, 0xA672, 0xCADF, 0xA673, + 0xCAE0, 0xC2D4, 0xCAE1, 0xA674, 0xCAE2, 0xA675, 0xCAE3, 0xA676, + 0xCAE4, 0xA677, 0xCAE5, 0xA678, 0xCAE6, 0xA679, 0xCAE7, 0xA67A, + 0xCAE8, 0xA681, 0xCAE9, 0xA682, 0xCAEA, 0xA683, 0xCAEB, 0xA684, + 0xCAEC, 0xC2D5, 0xCAED, 0xA685, 0xCAEE, 0xA686, 0xCAEF, 0xA687, + 0xCAF0, 0xA688, 0xCAF1, 0xA689, 0xCAF2, 0xA68A, 0xCAF3, 0xA68B, + 0xCAF4, 0xC2D6, 0xCAF5, 0xA68C, 0xCAF6, 0xA68D, 0xCAF7, 0xA68E, + 0xCAF8, 0xA68F, 0xCAF9, 0xA690, 0xCAFA, 0xA691, 0xCAFB, 0xA692, + 0xCAFC, 0xA693, 0xCAFD, 0xA694, 0xCAFE, 0xA695, 0xCAFF, 0xA696, + 0xCB00, 0xA697, 0xCB01, 0xA698, 0xCB02, 0xA699, 0xCB03, 0xA69A, + 0xCB04, 0xA69B, 0xCB05, 0xA69C, 0xCB06, 0xA69D, 0xCB07, 0xA69E, + 0xCB08, 0xC2D7, 0xCB09, 0xA69F, 0xCB0A, 0xA6A0, 0xCB0B, 0xA741, + 0xCB0C, 0xA742, 0xCB0D, 0xA743, 0xCB0E, 0xA744, 0xCB0F, 0xA745, + 0xCB10, 0xC2D8, 0xCB11, 0xA746, 0xCB12, 0xA747, 0xCB13, 0xA748, + 0xCB14, 0xC2D9, 0xCB15, 0xA749, 0xCB16, 0xA74A, 0xCB17, 0xA74B, + 0xCB18, 0xC2DA, 0xCB19, 0xA74C, 0xCB1A, 0xA74D, 0xCB1B, 0xA74E, + 0xCB1C, 0xA74F, 0xCB1D, 0xA750, 0xCB1E, 0xA751, 0xCB1F, 0xA752, + 0xCB20, 0xC2DB, 0xCB21, 0xC2DC, 0xCB22, 0xA753, 0xCB23, 0xA754, + 0xCB24, 0xA755, 0xCB25, 0xA756, 0xCB26, 0xA757, 0xCB27, 0xA758, + 0xCB28, 0xA759, 0xCB29, 0xA75A, 0xCB2A, 0xA761, 0xCB2B, 0xA762, + 0xCB2C, 0xA763, 0xCB2D, 0xA764, 0xCB2E, 0xA765, 0xCB2F, 0xA766, + 0xCB30, 0xA767, 0xCB31, 0xA768, 0xCB32, 0xA769, 0xCB33, 0xA76A, + 0xCB34, 0xA76B, 0xCB35, 0xA76C, 0xCB36, 0xA76D, 0xCB37, 0xA76E, + 0xCB38, 0xA76F, 0xCB39, 0xA770, 0xCB3A, 0xA771, 0xCB3B, 0xA772, + 0xCB3C, 0xA773, 0xCB3D, 0xA774, 0xCB3E, 0xA775, 0xCB3F, 0xA776, + 0xCB40, 0xA777, 0xCB41, 0xC2DD, 0xCB42, 0xA778, 0xCB43, 0xA779, + 0xCB44, 0xA77A, 0xCB45, 0xA781, 0xCB46, 0xA782, 0xCB47, 0xA783, + 0xCB48, 0xC2DE, 0xCB49, 0xC2DF, 0xCB4A, 0xA784, 0xCB4B, 0xA785, + 0xCB4C, 0xC2E0, 0xCB4D, 0xA786, 0xCB4E, 0xA787, 0xCB4F, 0xA788, + 0xCB50, 0xC2E1, 0xCB51, 0xA789, 0xCB52, 0xA78A, 0xCB53, 0xA78B, + 0xCB54, 0xA78C, 0xCB55, 0xA78D, 0xCB56, 0xA78E, 0xCB57, 0xA78F, + 0xCB58, 0xC2E2, 0xCB59, 0xC2E3, 0xCB5A, 0xA790, 0xCB5B, 0xA791, + 0xCB5C, 0xA792, 0xCB5D, 0xC2E4, 0xCB5E, 0xA793, 0xCB5F, 0xA794, + 0xCB60, 0xA795, 0xCB61, 0xA796, 0xCB62, 0xA797, 0xCB63, 0xA798, + 0xCB64, 0xC2E5, 0xCB65, 0xA799, 0xCB66, 0xA79A, 0xCB67, 0xA79B, + 0xCB68, 0xA79C, 0xCB69, 0xA79D, 0xCB6A, 0xA79E, 0xCB6B, 0xA79F, + 0xCB6C, 0xA7A0, 0xCB6D, 0xA841, 0xCB6E, 0xA842, 0xCB6F, 0xA843, + 0xCB70, 0xA844, 0xCB71, 0xA845, 0xCB72, 0xA846, 0xCB73, 0xA847, + 0xCB74, 0xA848, 0xCB75, 0xA849, 0xCB76, 0xA84A, 0xCB77, 0xA84B, + 0xCB78, 0xC2E6, 0xCB79, 0xC2E7, 0xCB7A, 0xA84C, 0xCB7B, 0xA84D, + 0xCB7C, 0xA84E, 0xCB7D, 0xA84F, 0xCB7E, 0xA850, 0xCB7F, 0xA851, + 0xCB80, 0xA852, 0xCB81, 0xA853, 0xCB82, 0xA854, 0xCB83, 0xA855, + 0xCB84, 0xA856, 0xCB85, 0xA857, 0xCB86, 0xA858, 0xCB87, 0xA859, + 0xCB88, 0xA85A, 0xCB89, 0xA861, 0xCB8A, 0xA862, 0xCB8B, 0xA863, + 0xCB8C, 0xA864, 0xCB8D, 0xA865, 0xCB8E, 0xA866, 0xCB8F, 0xA867, + 0xCB90, 0xA868, 0xCB91, 0xA869, 0xCB92, 0xA86A, 0xCB93, 0xA86B, + 0xCB94, 0xA86C, 0xCB95, 0xA86D, 0xCB96, 0xA86E, 0xCB97, 0xA86F, + 0xCB98, 0xA870, 0xCB99, 0xA871, 0xCB9A, 0xA872, 0xCB9B, 0xA873, + 0xCB9C, 0xC2E8, 0xCB9D, 0xA874, 0xCB9E, 0xA875, 0xCB9F, 0xA876, + 0xCBA0, 0xA877, 0xCBA1, 0xA878, 0xCBA2, 0xA879, 0xCBA3, 0xA87A, + 0xCBA4, 0xA881, 0xCBA5, 0xA882, 0xCBA6, 0xA883, 0xCBA7, 0xA884, + 0xCBA8, 0xA885, 0xCBA9, 0xA886, 0xCBAA, 0xA887, 0xCBAB, 0xA888, + 0xCBAC, 0xA889, 0xCBAD, 0xA88A, 0xCBAE, 0xA88B, 0xCBAF, 0xA88C, + 0xCBB0, 0xA88D, 0xCBB1, 0xA88E, 0xCBB2, 0xA88F, 0xCBB3, 0xA890, + 0xCBB4, 0xA891, 0xCBB5, 0xA892, 0xCBB6, 0xA893, 0xCBB7, 0xA894, + 0xCBB8, 0xC2E9, 0xCBB9, 0xA895, 0xCBBA, 0xA896, 0xCBBB, 0xA897, + 0xCBBC, 0xA898, 0xCBBD, 0xA899, 0xCBBE, 0xA89A, 0xCBBF, 0xA89B, + 0xCBC0, 0xA89C, 0xCBC1, 0xA89D, 0xCBC2, 0xA89E, 0xCBC3, 0xA89F, + 0xCBC4, 0xA8A0, 0xCBC5, 0xA941, 0xCBC6, 0xA942, 0xCBC7, 0xA943, + 0xCBC8, 0xA944, 0xCBC9, 0xA945, 0xCBCA, 0xA946, 0xCBCB, 0xA947, + 0xCBCC, 0xA948, 0xCBCD, 0xA949, 0xCBCE, 0xA94A, 0xCBCF, 0xA94B, + 0xCBD0, 0xA94C, 0xCBD1, 0xA94D, 0xCBD2, 0xA94E, 0xCBD3, 0xA94F, + 0xCBD4, 0xC2EA, 0xCBD5, 0xA950, 0xCBD6, 0xA951, 0xCBD7, 0xA952, + 0xCBD8, 0xA953, 0xCBD9, 0xA954, 0xCBDA, 0xA955, 0xCBDB, 0xA956, + 0xCBDC, 0xA957, 0xCBDD, 0xA958, 0xCBDE, 0xA959, 0xCBDF, 0xA95A, + 0xCBE0, 0xA961, 0xCBE1, 0xA962, 0xCBE2, 0xA963, 0xCBE3, 0xA964, + 0xCBE4, 0xC2EB, 0xCBE5, 0xA965, 0xCBE6, 0xA966, 0xCBE7, 0xC2EC, + 0xCBE8, 0xA967, 0xCBE9, 0xC2ED, 0xCBEA, 0xA968, 0xCBEB, 0xA969, + 0xCBEC, 0xA96A, 0xCBED, 0xA96B, 0xCBEE, 0xA96C, 0xCBEF, 0xA96D, + 0xCBF0, 0xA96E, 0xCBF1, 0xA96F, 0xCBF2, 0xA970, 0xCBF3, 0xA971, + 0xCBF4, 0xA972, 0xCBF5, 0xA973, 0xCBF6, 0xA974, 0xCBF7, 0xA975, + 0xCBF8, 0xA976, 0xCBF9, 0xA977, 0xCBFA, 0xA978, 0xCBFB, 0xA979, + 0xCBFC, 0xA97A, 0xCBFD, 0xA981, 0xCBFE, 0xA982, 0xCBFF, 0xA983, + 0xCC00, 0xA984, 0xCC01, 0xA985, 0xCC02, 0xA986, 0xCC03, 0xA987, + 0xCC04, 0xA988, 0xCC05, 0xA989, 0xCC06, 0xA98A, 0xCC07, 0xA98B, + 0xCC08, 0xA98C, 0xCC09, 0xA98D, 0xCC0A, 0xA98E, 0xCC0B, 0xA98F, + 0xCC0C, 0xC2EE, 0xCC0D, 0xC2EF, 0xCC0E, 0xA990, 0xCC0F, 0xA991, + 0xCC10, 0xC2F0, 0xCC11, 0xA992, 0xCC12, 0xA993, 0xCC13, 0xA994, + 0xCC14, 0xC2F1, 0xCC15, 0xA995, 0xCC16, 0xA996, 0xCC17, 0xA997, + 0xCC18, 0xA998, 0xCC19, 0xA999, 0xCC1A, 0xA99A, 0xCC1B, 0xA99B, + 0xCC1C, 0xC2F2, 0xCC1D, 0xC2F3, 0xCC1E, 0xA99C, 0xCC1F, 0xA99D, + 0xCC20, 0xA99E, 0xCC21, 0xC2F4, 0xCC22, 0xC2F5, 0xCC23, 0xA99F, + 0xCC24, 0xA9A0, 0xCC25, 0xAA41, 0xCC26, 0xAA42, 0xCC27, 0xC2F6, + 0xCC28, 0xC2F7, 0xCC29, 0xC2F8, 0xCC2A, 0xAA43, 0xCC2B, 0xAA44, + 0xCC2C, 0xC2F9, 0xCC2D, 0xAA45, 0xCC2E, 0xC2FA, 0xCC2F, 0xAA46, + 0xCC30, 0xC2FB, 0xCC31, 0xAA47, 0xCC32, 0xAA48, 0xCC33, 0xAA49, + 0xCC34, 0xAA4A, 0xCC35, 0xAA4B, 0xCC36, 0xAA4C, 0xCC37, 0xAA4D, + 0xCC38, 0xC2FC, 0xCC39, 0xC2FD, 0xCC3A, 0xAA4E, 0xCC3B, 0xC2FE, + 0xCC3C, 0xC3A1, 0xCC3D, 0xC3A2, 0xCC3E, 0xC3A3, 0xCC3F, 0xAA4F, + 0xCC40, 0xAA50, 0xCC41, 0xAA51, 0xCC42, 0xAA52, 0xCC43, 0xAA53, + 0xCC44, 0xC3A4, 0xCC45, 0xC3A5, 0xCC46, 0xAA54, 0xCC47, 0xAA55, + 0xCC48, 0xC3A6, 0xCC49, 0xAA56, 0xCC4A, 0xAA57, 0xCC4B, 0xAA58, + 0xCC4C, 0xC3A7, 0xCC4D, 0xAA59, 0xCC4E, 0xAA5A, 0xCC4F, 0xAA61, + 0xCC50, 0xAA62, 0xCC51, 0xAA63, 0xCC52, 0xAA64, 0xCC53, 0xAA65, + 0xCC54, 0xC3A8, 0xCC55, 0xC3A9, 0xCC56, 0xAA66, 0xCC57, 0xC3AA, + 0xCC58, 0xC3AB, 0xCC59, 0xC3AC, 0xCC5A, 0xAA67, 0xCC5B, 0xAA68, + 0xCC5C, 0xAA69, 0xCC5D, 0xAA6A, 0xCC5E, 0xAA6B, 0xCC5F, 0xAA6C, + 0xCC60, 0xC3AD, 0xCC61, 0xAA6D, 0xCC62, 0xAA6E, 0xCC63, 0xAA6F, + 0xCC64, 0xC3AE, 0xCC65, 0xAA70, 0xCC66, 0xC3AF, 0xCC67, 0xAA71, + 0xCC68, 0xC3B0, 0xCC69, 0xAA72, 0xCC6A, 0xAA73, 0xCC6B, 0xAA74, + 0xCC6C, 0xAA75, 0xCC6D, 0xAA76, 0xCC6E, 0xAA77, 0xCC6F, 0xAA78, + 0xCC70, 0xC3B1, 0xCC71, 0xAA79, 0xCC72, 0xAA7A, 0xCC73, 0xAA81, + 0xCC74, 0xAA82, 0xCC75, 0xC3B2, 0xCC76, 0xAA83, 0xCC77, 0xAA84, + 0xCC78, 0xAA85, 0xCC79, 0xAA86, 0xCC7A, 0xAA87, 0xCC7B, 0xAA88, + 0xCC7C, 0xAA89, 0xCC7D, 0xAA8A, 0xCC7E, 0xAA8B, 0xCC7F, 0xAA8C, + 0xCC80, 0xAA8D, 0xCC81, 0xAA8E, 0xCC82, 0xAA8F, 0xCC83, 0xAA90, + 0xCC84, 0xAA91, 0xCC85, 0xAA92, 0xCC86, 0xAA93, 0xCC87, 0xAA94, + 0xCC88, 0xAA95, 0xCC89, 0xAA96, 0xCC8A, 0xAA97, 0xCC8B, 0xAA98, + 0xCC8C, 0xAA99, 0xCC8D, 0xAA9A, 0xCC8E, 0xAA9B, 0xCC8F, 0xAA9C, + 0xCC90, 0xAA9D, 0xCC91, 0xAA9E, 0xCC92, 0xAA9F, 0xCC93, 0xAAA0, + 0xCC94, 0xAB41, 0xCC95, 0xAB42, 0xCC96, 0xAB43, 0xCC97, 0xAB44, + 0xCC98, 0xC3B3, 0xCC99, 0xC3B4, 0xCC9A, 0xAB45, 0xCC9B, 0xAB46, + 0xCC9C, 0xC3B5, 0xCC9D, 0xAB47, 0xCC9E, 0xAB48, 0xCC9F, 0xAB49, + 0xCCA0, 0xC3B6, 0xCCA1, 0xAB4A, 0xCCA2, 0xAB4B, 0xCCA3, 0xAB4C, + 0xCCA4, 0xAB4D, 0xCCA5, 0xAB4E, 0xCCA6, 0xAB4F, 0xCCA7, 0xAB50, + 0xCCA8, 0xC3B7, 0xCCA9, 0xC3B8, 0xCCAA, 0xAB51, 0xCCAB, 0xC3B9, + 0xCCAC, 0xC3BA, 0xCCAD, 0xC3BB, 0xCCAE, 0xAB52, 0xCCAF, 0xAB53, + 0xCCB0, 0xAB54, 0xCCB1, 0xAB55, 0xCCB2, 0xAB56, 0xCCB3, 0xAB57, + 0xCCB4, 0xC3BC, 0xCCB5, 0xC3BD, 0xCCB6, 0xAB58, 0xCCB7, 0xAB59, + 0xCCB8, 0xC3BE, 0xCCB9, 0xAB5A, 0xCCBA, 0xAB61, 0xCCBB, 0xAB62, + 0xCCBC, 0xC3BF, 0xCCBD, 0xAB63, 0xCCBE, 0xAB64, 0xCCBF, 0xAB65, + 0xCCC0, 0xAB66, 0xCCC1, 0xAB67, 0xCCC2, 0xAB68, 0xCCC3, 0xAB69, + 0xCCC4, 0xC3C0, 0xCCC5, 0xC3C1, 0xCCC6, 0xAB6A, 0xCCC7, 0xC3C2, + 0xCCC8, 0xAB6B, 0xCCC9, 0xC3C3, 0xCCCA, 0xAB6C, 0xCCCB, 0xAB6D, + 0xCCCC, 0xAB6E, 0xCCCD, 0xAB6F, 0xCCCE, 0xAB70, 0xCCCF, 0xAB71, + 0xCCD0, 0xC3C4, 0xCCD1, 0xAB72, 0xCCD2, 0xAB73, 0xCCD3, 0xAB74, + 0xCCD4, 0xC3C5, 0xCCD5, 0xAB75, 0xCCD6, 0xAB76, 0xCCD7, 0xAB77, + 0xCCD8, 0xAB78, 0xCCD9, 0xAB79, 0xCCDA, 0xAB7A, 0xCCDB, 0xAB81, + 0xCCDC, 0xAB82, 0xCCDD, 0xAB83, 0xCCDE, 0xAB84, 0xCCDF, 0xAB85, + 0xCCE0, 0xAB86, 0xCCE1, 0xAB87, 0xCCE2, 0xAB88, 0xCCE3, 0xAB89, + 0xCCE4, 0xC3C6, 0xCCE5, 0xAB8A, 0xCCE6, 0xAB8B, 0xCCE7, 0xAB8C, + 0xCCE8, 0xAB8D, 0xCCE9, 0xAB8E, 0xCCEA, 0xAB8F, 0xCCEB, 0xAB90, + 0xCCEC, 0xC3C7, 0xCCED, 0xAB91, 0xCCEE, 0xAB92, 0xCCEF, 0xAB93, + 0xCCF0, 0xC3C8, 0xCCF1, 0xAB94, 0xCCF2, 0xAB95, 0xCCF3, 0xAB96, + 0xCCF4, 0xAB97, 0xCCF5, 0xAB98, 0xCCF6, 0xAB99, 0xCCF7, 0xAB9A, + 0xCCF8, 0xAB9B, 0xCCF9, 0xAB9C, 0xCCFA, 0xAB9D, 0xCCFB, 0xAB9E, + 0xCCFC, 0xAB9F, 0xCCFD, 0xABA0, 0xCCFE, 0xAC41, 0xCCFF, 0xAC42, + 0xCD00, 0xAC43, 0xCD01, 0xC3C9, 0xCD02, 0xAC44, 0xCD03, 0xAC45, + 0xCD04, 0xAC46, 0xCD05, 0xAC47, 0xCD06, 0xAC48, 0xCD07, 0xAC49, + 0xCD08, 0xC3CA, 0xCD09, 0xC3CB, 0xCD0A, 0xAC4A, 0xCD0B, 0xAC4B, + 0xCD0C, 0xC3CC, 0xCD0D, 0xAC4C, 0xCD0E, 0xAC4D, 0xCD0F, 0xAC4E, + 0xCD10, 0xC3CD, 0xCD11, 0xAC4F, 0xCD12, 0xAC50, 0xCD13, 0xAC51, + 0xCD14, 0xAC52, 0xCD15, 0xAC53, 0xCD16, 0xAC54, 0xCD17, 0xAC55, + 0xCD18, 0xC3CE, 0xCD19, 0xC3CF, 0xCD1A, 0xAC56, 0xCD1B, 0xC3D0, + 0xCD1C, 0xAC57, 0xCD1D, 0xC3D1, 0xCD1E, 0xAC58, 0xCD1F, 0xAC59, + 0xCD20, 0xAC5A, 0xCD21, 0xAC61, 0xCD22, 0xAC62, 0xCD23, 0xAC63, + 0xCD24, 0xC3D2, 0xCD25, 0xAC64, 0xCD26, 0xAC65, 0xCD27, 0xAC66, + 0xCD28, 0xC3D3, 0xCD29, 0xAC67, 0xCD2A, 0xAC68, 0xCD2B, 0xAC69, + 0xCD2C, 0xC3D4, 0xCD2D, 0xAC6A, 0xCD2E, 0xAC6B, 0xCD2F, 0xAC6C, + 0xCD30, 0xAC6D, 0xCD31, 0xAC6E, 0xCD32, 0xAC6F, 0xCD33, 0xAC70, + 0xCD34, 0xAC71, 0xCD35, 0xAC72, 0xCD36, 0xAC73, 0xCD37, 0xAC74, + 0xCD38, 0xAC75, 0xCD39, 0xC3D5, 0xCD3A, 0xAC76, 0xCD3B, 0xAC77, + 0xCD3C, 0xAC78, 0xCD3D, 0xAC79, 0xCD3E, 0xAC7A, 0xCD3F, 0xAC81, + 0xCD40, 0xAC82, 0xCD41, 0xAC83, 0xCD42, 0xAC84, 0xCD43, 0xAC85, + 0xCD44, 0xAC86, 0xCD45, 0xAC87, 0xCD46, 0xAC88, 0xCD47, 0xAC89, + 0xCD48, 0xAC8A, 0xCD49, 0xAC8B, 0xCD4A, 0xAC8C, 0xCD4B, 0xAC8D, + 0xCD4C, 0xAC8E, 0xCD4D, 0xAC8F, 0xCD4E, 0xAC90, 0xCD4F, 0xAC91, + 0xCD50, 0xAC92, 0xCD51, 0xAC93, 0xCD52, 0xAC94, 0xCD53, 0xAC95, + 0xCD54, 0xAC96, 0xCD55, 0xAC97, 0xCD56, 0xAC98, 0xCD57, 0xAC99, + 0xCD58, 0xAC9A, 0xCD59, 0xAC9B, 0xCD5A, 0xAC9C, 0xCD5B, 0xAC9D, + 0xCD5C, 0xC3D6, 0xCD5D, 0xAC9E, 0xCD5E, 0xAC9F, 0xCD5F, 0xACA0, + 0xCD60, 0xC3D7, 0xCD61, 0xAD41, 0xCD62, 0xAD42, 0xCD63, 0xAD43, + 0xCD64, 0xC3D8, 0xCD65, 0xAD44, 0xCD66, 0xAD45, 0xCD67, 0xAD46, + 0xCD68, 0xAD47, 0xCD69, 0xAD48, 0xCD6A, 0xAD49, 0xCD6B, 0xAD4A, + 0xCD6C, 0xC3D9, 0xCD6D, 0xC3DA, 0xCD6E, 0xAD4B, 0xCD6F, 0xC3DB, + 0xCD70, 0xAD4C, 0xCD71, 0xC3DC, 0xCD72, 0xAD4D, 0xCD73, 0xAD4E, + 0xCD74, 0xAD4F, 0xCD75, 0xAD50, 0xCD76, 0xAD51, 0xCD77, 0xAD52, + 0xCD78, 0xC3DD, 0xCD79, 0xAD53, 0xCD7A, 0xAD54, 0xCD7B, 0xAD55, + 0xCD7C, 0xAD56, 0xCD7D, 0xAD57, 0xCD7E, 0xAD58, 0xCD7F, 0xAD59, + 0xCD80, 0xAD5A, 0xCD81, 0xAD61, 0xCD82, 0xAD62, 0xCD83, 0xAD63, + 0xCD84, 0xAD64, 0xCD85, 0xAD65, 0xCD86, 0xAD66, 0xCD87, 0xAD67, + 0xCD88, 0xC3DE, 0xCD89, 0xAD68, 0xCD8A, 0xAD69, 0xCD8B, 0xAD6A, + 0xCD8C, 0xAD6B, 0xCD8D, 0xAD6C, 0xCD8E, 0xAD6D, 0xCD8F, 0xAD6E, + 0xCD90, 0xAD6F, 0xCD91, 0xAD70, 0xCD92, 0xAD71, 0xCD93, 0xAD72, + 0xCD94, 0xC3DF, 0xCD95, 0xC3E0, 0xCD96, 0xAD73, 0xCD97, 0xAD74, + 0xCD98, 0xC3E1, 0xCD99, 0xAD75, 0xCD9A, 0xAD76, 0xCD9B, 0xAD77, + 0xCD9C, 0xC3E2, 0xCD9D, 0xAD78, 0xCD9E, 0xAD79, 0xCD9F, 0xAD7A, + 0xCDA0, 0xAD81, 0xCDA1, 0xAD82, 0xCDA2, 0xAD83, 0xCDA3, 0xAD84, + 0xCDA4, 0xC3E3, 0xCDA5, 0xC3E4, 0xCDA6, 0xAD85, 0xCDA7, 0xC3E5, + 0xCDA8, 0xAD86, 0xCDA9, 0xC3E6, 0xCDAA, 0xAD87, 0xCDAB, 0xAD88, + 0xCDAC, 0xAD89, 0xCDAD, 0xAD8A, 0xCDAE, 0xAD8B, 0xCDAF, 0xAD8C, + 0xCDB0, 0xC3E7, 0xCDB1, 0xAD8D, 0xCDB2, 0xAD8E, 0xCDB3, 0xAD8F, + 0xCDB4, 0xAD90, 0xCDB5, 0xAD91, 0xCDB6, 0xAD92, 0xCDB7, 0xAD93, + 0xCDB8, 0xAD94, 0xCDB9, 0xAD95, 0xCDBA, 0xAD96, 0xCDBB, 0xAD97, + 0xCDBC, 0xAD98, 0xCDBD, 0xAD99, 0xCDBE, 0xAD9A, 0xCDBF, 0xAD9B, + 0xCDC0, 0xAD9C, 0xCDC1, 0xAD9D, 0xCDC2, 0xAD9E, 0xCDC3, 0xAD9F, + 0xCDC4, 0xC3E8, 0xCDC5, 0xADA0, 0xCDC6, 0xAE41, 0xCDC7, 0xAE42, + 0xCDC8, 0xAE43, 0xCDC9, 0xAE44, 0xCDCA, 0xAE45, 0xCDCB, 0xAE46, + 0xCDCC, 0xC3E9, 0xCDCD, 0xAE47, 0xCDCE, 0xAE48, 0xCDCF, 0xAE49, + 0xCDD0, 0xC3EA, 0xCDD1, 0xAE4A, 0xCDD2, 0xAE4B, 0xCDD3, 0xAE4C, + 0xCDD4, 0xAE4D, 0xCDD5, 0xAE4E, 0xCDD6, 0xAE4F, 0xCDD7, 0xAE50, + 0xCDD8, 0xAE51, 0xCDD9, 0xAE52, 0xCDDA, 0xAE53, 0xCDDB, 0xAE54, + 0xCDDC, 0xAE55, 0xCDDD, 0xAE56, 0xCDDE, 0xAE57, 0xCDDF, 0xAE58, + 0xCDE0, 0xAE59, 0xCDE1, 0xAE5A, 0xCDE2, 0xAE61, 0xCDE3, 0xAE62, + 0xCDE4, 0xAE63, 0xCDE5, 0xAE64, 0xCDE6, 0xAE65, 0xCDE7, 0xAE66, + 0xCDE8, 0xC3EB, 0xCDE9, 0xAE67, 0xCDEA, 0xAE68, 0xCDEB, 0xAE69, + 0xCDEC, 0xC3EC, 0xCDED, 0xAE6A, 0xCDEE, 0xAE6B, 0xCDEF, 0xAE6C, + 0xCDF0, 0xC3ED, 0xCDF1, 0xAE6D, 0xCDF2, 0xAE6E, 0xCDF3, 0xAE6F, + 0xCDF4, 0xAE70, 0xCDF5, 0xAE71, 0xCDF6, 0xAE72, 0xCDF7, 0xAE73, + 0xCDF8, 0xC3EE, 0xCDF9, 0xC3EF, 0xCDFA, 0xAE74, 0xCDFB, 0xC3F0, + 0xCDFC, 0xAE75, 0xCDFD, 0xC3F1, 0xCDFE, 0xAE76, 0xCDFF, 0xAE77, + 0xCE00, 0xAE78, 0xCE01, 0xAE79, 0xCE02, 0xAE7A, 0xCE03, 0xAE81, + 0xCE04, 0xC3F2, 0xCE05, 0xAE82, 0xCE06, 0xAE83, 0xCE07, 0xAE84, + 0xCE08, 0xC3F3, 0xCE09, 0xAE85, 0xCE0A, 0xAE86, 0xCE0B, 0xAE87, + 0xCE0C, 0xC3F4, 0xCE0D, 0xAE88, 0xCE0E, 0xAE89, 0xCE0F, 0xAE8A, + 0xCE10, 0xAE8B, 0xCE11, 0xAE8C, 0xCE12, 0xAE8D, 0xCE13, 0xAE8E, + 0xCE14, 0xC3F5, 0xCE15, 0xAE8F, 0xCE16, 0xAE90, 0xCE17, 0xAE91, + 0xCE18, 0xAE92, 0xCE19, 0xC3F6, 0xCE1A, 0xAE93, 0xCE1B, 0xAE94, + 0xCE1C, 0xAE95, 0xCE1D, 0xAE96, 0xCE1E, 0xAE97, 0xCE1F, 0xAE98, + 0xCE20, 0xC3F7, 0xCE21, 0xC3F8, 0xCE22, 0xAE99, 0xCE23, 0xAE9A, + 0xCE24, 0xC3F9, 0xCE25, 0xAE9B, 0xCE26, 0xAE9C, 0xCE27, 0xAE9D, + 0xCE28, 0xC3FA, 0xCE29, 0xAE9E, 0xCE2A, 0xAE9F, 0xCE2B, 0xAEA0, + 0xCE2C, 0xAF41, 0xCE2D, 0xAF42, 0xCE2E, 0xAF43, 0xCE2F, 0xAF44, + 0xCE30, 0xC3FB, 0xCE31, 0xC3FC, 0xCE32, 0xAF45, 0xCE33, 0xC3FD, + 0xCE34, 0xAF46, 0xCE35, 0xC3FE, 0xCE36, 0xAF47, 0xCE37, 0xAF48, + 0xCE38, 0xAF49, 0xCE39, 0xAF4A, 0xCE3A, 0xAF4B, 0xCE3B, 0xAF4C, + 0xCE3C, 0xAF4D, 0xCE3D, 0xAF4E, 0xCE3E, 0xAF4F, 0xCE3F, 0xAF50, + 0xCE40, 0xAF51, 0xCE41, 0xAF52, 0xCE42, 0xAF53, 0xCE43, 0xAF54, + 0xCE44, 0xAF55, 0xCE45, 0xAF56, 0xCE46, 0xAF57, 0xCE47, 0xAF58, + 0xCE48, 0xAF59, 0xCE49, 0xAF5A, 0xCE4A, 0xAF61, 0xCE4B, 0xAF62, + 0xCE4C, 0xAF63, 0xCE4D, 0xAF64, 0xCE4E, 0xAF65, 0xCE4F, 0xAF66, + 0xCE50, 0xAF67, 0xCE51, 0xAF68, 0xCE52, 0xAF69, 0xCE53, 0xAF6A, + 0xCE54, 0xAF6B, 0xCE55, 0xAF6C, 0xCE56, 0xAF6D, 0xCE57, 0xAF6E, + 0xCE58, 0xC4A1, 0xCE59, 0xC4A2, 0xCE5A, 0xAF6F, 0xCE5B, 0xAF70, + 0xCE5C, 0xC4A3, 0xCE5D, 0xAF71, 0xCE5E, 0xAF72, 0xCE5F, 0xC4A4, + 0xCE60, 0xC4A5, 0xCE61, 0xC4A6, 0xCE62, 0xAF73, 0xCE63, 0xAF74, + 0xCE64, 0xAF75, 0xCE65, 0xAF76, 0xCE66, 0xAF77, 0xCE67, 0xAF78, + 0xCE68, 0xC4A7, 0xCE69, 0xC4A8, 0xCE6A, 0xAF79, 0xCE6B, 0xC4A9, + 0xCE6C, 0xAF7A, 0xCE6D, 0xC4AA, 0xCE6E, 0xAF81, 0xCE6F, 0xAF82, + 0xCE70, 0xAF83, 0xCE71, 0xAF84, 0xCE72, 0xAF85, 0xCE73, 0xAF86, + 0xCE74, 0xC4AB, 0xCE75, 0xC4AC, 0xCE76, 0xAF87, 0xCE77, 0xAF88, + 0xCE78, 0xC4AD, 0xCE79, 0xAF89, 0xCE7A, 0xAF8A, 0xCE7B, 0xAF8B, + 0xCE7C, 0xC4AE, 0xCE7D, 0xAF8C, 0xCE7E, 0xAF8D, 0xCE7F, 0xAF8E, + 0xCE80, 0xAF8F, 0xCE81, 0xAF90, 0xCE82, 0xAF91, 0xCE83, 0xAF92, + 0xCE84, 0xC4AF, 0xCE85, 0xC4B0, 0xCE86, 0xAF93, 0xCE87, 0xC4B1, + 0xCE88, 0xAF94, 0xCE89, 0xC4B2, 0xCE8A, 0xAF95, 0xCE8B, 0xAF96, + 0xCE8C, 0xAF97, 0xCE8D, 0xAF98, 0xCE8E, 0xAF99, 0xCE8F, 0xAF9A, + 0xCE90, 0xC4B3, 0xCE91, 0xC4B4, 0xCE92, 0xAF9B, 0xCE93, 0xAF9C, + 0xCE94, 0xC4B5, 0xCE95, 0xAF9D, 0xCE96, 0xAF9E, 0xCE97, 0xAF9F, + 0xCE98, 0xC4B6, 0xCE99, 0xAFA0, 0xCE9A, 0xB041, 0xCE9B, 0xB042, + 0xCE9C, 0xB043, 0xCE9D, 0xB044, 0xCE9E, 0xB045, 0xCE9F, 0xB046, + 0xCEA0, 0xC4B7, 0xCEA1, 0xC4B8, 0xCEA2, 0xB047, 0xCEA3, 0xC4B9, + 0xCEA4, 0xC4BA, 0xCEA5, 0xC4BB, 0xCEA6, 0xB048, 0xCEA7, 0xB049, + 0xCEA8, 0xB04A, 0xCEA9, 0xB04B, 0xCEAA, 0xB04C, 0xCEAB, 0xB04D, + 0xCEAC, 0xC4BC, 0xCEAD, 0xC4BD, 0xCEAE, 0xB04E, 0xCEAF, 0xB04F, + 0xCEB0, 0xB050, 0xCEB1, 0xB051, 0xCEB2, 0xB052, 0xCEB3, 0xB053, + 0xCEB4, 0xB054, 0xCEB5, 0xB055, 0xCEB6, 0xB056, 0xCEB7, 0xB057, + 0xCEB8, 0xB058, 0xCEB9, 0xB059, 0xCEBA, 0xB05A, 0xCEBB, 0xB061, + 0xCEBC, 0xB062, 0xCEBD, 0xB063, 0xCEBE, 0xB064, 0xCEBF, 0xB065, + 0xCEC0, 0xB066, 0xCEC1, 0xC4BE, 0xCEC2, 0xB067, 0xCEC3, 0xB068, + 0xCEC4, 0xB069, 0xCEC5, 0xB06A, 0xCEC6, 0xB06B, 0xCEC7, 0xB06C, + 0xCEC8, 0xB06D, 0xCEC9, 0xB06E, 0xCECA, 0xB06F, 0xCECB, 0xB070, + 0xCECC, 0xB071, 0xCECD, 0xB072, 0xCECE, 0xB073, 0xCECF, 0xB074, + 0xCED0, 0xB075, 0xCED1, 0xB076, 0xCED2, 0xB077, 0xCED3, 0xB078, + 0xCED4, 0xB079, 0xCED5, 0xB07A, 0xCED6, 0xB081, 0xCED7, 0xB082, + 0xCED8, 0xB083, 0xCED9, 0xB084, 0xCEDA, 0xB085, 0xCEDB, 0xB086, + 0xCEDC, 0xB087, 0xCEDD, 0xB088, 0xCEDE, 0xB089, 0xCEDF, 0xB08A, + 0xCEE0, 0xB08B, 0xCEE1, 0xB08C, 0xCEE2, 0xB08D, 0xCEE3, 0xB08E, + 0xCEE4, 0xC4BF, 0xCEE5, 0xC4C0, 0xCEE6, 0xB08F, 0xCEE7, 0xB090, + 0xCEE8, 0xC4C1, 0xCEE9, 0xB091, 0xCEEA, 0xB092, 0xCEEB, 0xC4C2, + 0xCEEC, 0xC4C3, 0xCEED, 0xB093, 0xCEEE, 0xB094, 0xCEEF, 0xB095, + 0xCEF0, 0xB096, 0xCEF1, 0xB097, 0xCEF2, 0xB098, 0xCEF3, 0xB099, + 0xCEF4, 0xC4C4, 0xCEF5, 0xC4C5, 0xCEF6, 0xB09A, 0xCEF7, 0xC4C6, + 0xCEF8, 0xC4C7, 0xCEF9, 0xC4C8, 0xCEFA, 0xB09B, 0xCEFB, 0xB09C, + 0xCEFC, 0xB09D, 0xCEFD, 0xB09E, 0xCEFE, 0xB09F, 0xCEFF, 0xB0A0, + 0xCF00, 0xC4C9, 0xCF01, 0xC4CA, 0xCF02, 0xB141, 0xCF03, 0xB142, + 0xCF04, 0xC4CB, 0xCF05, 0xB143, 0xCF06, 0xB144, 0xCF07, 0xB145, + 0xCF08, 0xC4CC, 0xCF09, 0xB146, 0xCF0A, 0xB147, 0xCF0B, 0xB148, + 0xCF0C, 0xB149, 0xCF0D, 0xB14A, 0xCF0E, 0xB14B, 0xCF0F, 0xB14C, + 0xCF10, 0xC4CD, 0xCF11, 0xC4CE, 0xCF12, 0xB14D, 0xCF13, 0xC4CF, + 0xCF14, 0xB14E, 0xCF15, 0xC4D0, 0xCF16, 0xB14F, 0xCF17, 0xB150, + 0xCF18, 0xB151, 0xCF19, 0xB152, 0xCF1A, 0xB153, 0xCF1B, 0xB154, + 0xCF1C, 0xC4D1, 0xCF1D, 0xB155, 0xCF1E, 0xB156, 0xCF1F, 0xB157, + 0xCF20, 0xC4D2, 0xCF21, 0xB158, 0xCF22, 0xB159, 0xCF23, 0xB15A, + 0xCF24, 0xC4D3, 0xCF25, 0xB161, 0xCF26, 0xB162, 0xCF27, 0xB163, + 0xCF28, 0xB164, 0xCF29, 0xB165, 0xCF2A, 0xB166, 0xCF2B, 0xB167, + 0xCF2C, 0xC4D4, 0xCF2D, 0xC4D5, 0xCF2E, 0xB168, 0xCF2F, 0xC4D6, + 0xCF30, 0xC4D7, 0xCF31, 0xC4D8, 0xCF32, 0xB169, 0xCF33, 0xB16A, + 0xCF34, 0xB16B, 0xCF35, 0xB16C, 0xCF36, 0xB16D, 0xCF37, 0xB16E, + 0xCF38, 0xC4D9, 0xCF39, 0xB16F, 0xCF3A, 0xB170, 0xCF3B, 0xB171, + 0xCF3C, 0xB172, 0xCF3D, 0xB173, 0xCF3E, 0xB174, 0xCF3F, 0xB175, + 0xCF40, 0xB176, 0xCF41, 0xB177, 0xCF42, 0xB178, 0xCF43, 0xB179, + 0xCF44, 0xB17A, 0xCF45, 0xB181, 0xCF46, 0xB182, 0xCF47, 0xB183, + 0xCF48, 0xB184, 0xCF49, 0xB185, 0xCF4A, 0xB186, 0xCF4B, 0xB187, + 0xCF4C, 0xB188, 0xCF4D, 0xB189, 0xCF4E, 0xB18A, 0xCF4F, 0xB18B, + 0xCF50, 0xB18C, 0xCF51, 0xB18D, 0xCF52, 0xB18E, 0xCF53, 0xB18F, + 0xCF54, 0xC4DA, 0xCF55, 0xC4DB, 0xCF56, 0xB190, 0xCF57, 0xB191, + 0xCF58, 0xC4DC, 0xCF59, 0xB192, 0xCF5A, 0xB193, 0xCF5B, 0xB194, + 0xCF5C, 0xC4DD, 0xCF5D, 0xB195, 0xCF5E, 0xB196, 0xCF5F, 0xB197, + 0xCF60, 0xB198, 0xCF61, 0xB199, 0xCF62, 0xB19A, 0xCF63, 0xB19B, + 0xCF64, 0xC4DE, 0xCF65, 0xC4DF, 0xCF66, 0xB19C, 0xCF67, 0xC4E0, + 0xCF68, 0xB19D, 0xCF69, 0xC4E1, 0xCF6A, 0xB19E, 0xCF6B, 0xB19F, + 0xCF6C, 0xB1A0, 0xCF6D, 0xB241, 0xCF6E, 0xB242, 0xCF6F, 0xB243, + 0xCF70, 0xC4E2, 0xCF71, 0xC4E3, 0xCF72, 0xB244, 0xCF73, 0xB245, + 0xCF74, 0xC4E4, 0xCF75, 0xB246, 0xCF76, 0xB247, 0xCF77, 0xB248, + 0xCF78, 0xC4E5, 0xCF79, 0xB249, 0xCF7A, 0xB24A, 0xCF7B, 0xB24B, + 0xCF7C, 0xB24C, 0xCF7D, 0xB24D, 0xCF7E, 0xB24E, 0xCF7F, 0xB24F, + 0xCF80, 0xC4E6, 0xCF81, 0xB250, 0xCF82, 0xB251, 0xCF83, 0xB252, + 0xCF84, 0xB253, 0xCF85, 0xC4E7, 0xCF86, 0xB254, 0xCF87, 0xB255, + 0xCF88, 0xB256, 0xCF89, 0xB257, 0xCF8A, 0xB258, 0xCF8B, 0xB259, + 0xCF8C, 0xC4E8, 0xCF8D, 0xB25A, 0xCF8E, 0xB261, 0xCF8F, 0xB262, + 0xCF90, 0xB263, 0xCF91, 0xB264, 0xCF92, 0xB265, 0xCF93, 0xB266, + 0xCF94, 0xB267, 0xCF95, 0xB268, 0xCF96, 0xB269, 0xCF97, 0xB26A, + 0xCF98, 0xB26B, 0xCF99, 0xB26C, 0xCF9A, 0xB26D, 0xCF9B, 0xB26E, + 0xCF9C, 0xB26F, 0xCF9D, 0xB270, 0xCF9E, 0xB271, 0xCF9F, 0xB272, + 0xCFA0, 0xB273, 0xCFA1, 0xC4E9, 0xCFA2, 0xB274, 0xCFA3, 0xB275, + 0xCFA4, 0xB276, 0xCFA5, 0xB277, 0xCFA6, 0xB278, 0xCFA7, 0xB279, + 0xCFA8, 0xC4EA, 0xCFA9, 0xB27A, 0xCFAA, 0xB281, 0xCFAB, 0xB282, + 0xCFAC, 0xB283, 0xCFAD, 0xB284, 0xCFAE, 0xB285, 0xCFAF, 0xB286, + 0xCFB0, 0xC4EB, 0xCFB1, 0xB287, 0xCFB2, 0xB288, 0xCFB3, 0xB289, + 0xCFB4, 0xB28A, 0xCFB5, 0xB28B, 0xCFB6, 0xB28C, 0xCFB7, 0xB28D, + 0xCFB8, 0xB28E, 0xCFB9, 0xB28F, 0xCFBA, 0xB290, 0xCFBB, 0xB291, + 0xCFBC, 0xB292, 0xCFBD, 0xB293, 0xCFBE, 0xB294, 0xCFBF, 0xB295, + 0xCFC0, 0xB296, 0xCFC1, 0xB297, 0xCFC2, 0xB298, 0xCFC3, 0xB299, + 0xCFC4, 0xC4EC, 0xCFC5, 0xB29A, 0xCFC6, 0xB29B, 0xCFC7, 0xB29C, + 0xCFC8, 0xB29D, 0xCFC9, 0xB29E, 0xCFCA, 0xB29F, 0xCFCB, 0xB2A0, + 0xCFCC, 0xB341, 0xCFCD, 0xB342, 0xCFCE, 0xB343, 0xCFCF, 0xB344, + 0xCFD0, 0xB345, 0xCFD1, 0xB346, 0xCFD2, 0xB347, 0xCFD3, 0xB348, + 0xCFD4, 0xB349, 0xCFD5, 0xB34A, 0xCFD6, 0xB34B, 0xCFD7, 0xB34C, + 0xCFD8, 0xB34D, 0xCFD9, 0xB34E, 0xCFDA, 0xB34F, 0xCFDB, 0xB350, + 0xCFDC, 0xB351, 0xCFDD, 0xB352, 0xCFDE, 0xB353, 0xCFDF, 0xB354, + 0xCFE0, 0xC4ED, 0xCFE1, 0xC4EE, 0xCFE2, 0xB355, 0xCFE3, 0xB356, + 0xCFE4, 0xC4EF, 0xCFE5, 0xB357, 0xCFE6, 0xB358, 0xCFE7, 0xB359, + 0xCFE8, 0xC4F0, 0xCFE9, 0xB35A, 0xCFEA, 0xB361, 0xCFEB, 0xB362, + 0xCFEC, 0xB363, 0xCFED, 0xB364, 0xCFEE, 0xB365, 0xCFEF, 0xB366, + 0xCFF0, 0xC4F1, 0xCFF1, 0xC4F2, 0xCFF2, 0xB367, 0xCFF3, 0xC4F3, + 0xCFF4, 0xB368, 0xCFF5, 0xC4F4, 0xCFF6, 0xB369, 0xCFF7, 0xB36A, + 0xCFF8, 0xB36B, 0xCFF9, 0xB36C, 0xCFFA, 0xB36D, 0xCFFB, 0xB36E, + 0xCFFC, 0xC4F5, 0xCFFD, 0xB36F, 0xCFFE, 0xB370, 0xCFFF, 0xB371, + 0xD000, 0xC4F6, 0xD001, 0xB372, 0xD002, 0xB373, 0xD003, 0xB374, + 0xD004, 0xC4F7, 0xD005, 0xB375, 0xD006, 0xB376, 0xD007, 0xB377, + 0xD008, 0xB378, 0xD009, 0xB379, 0xD00A, 0xB37A, 0xD00B, 0xB381, + 0xD00C, 0xB382, 0xD00D, 0xB383, 0xD00E, 0xB384, 0xD00F, 0xB385, + 0xD010, 0xB386, 0xD011, 0xC4F8, 0xD012, 0xB387, 0xD013, 0xB388, + 0xD014, 0xB389, 0xD015, 0xB38A, 0xD016, 0xB38B, 0xD017, 0xB38C, + 0xD018, 0xC4F9, 0xD019, 0xB38D, 0xD01A, 0xB38E, 0xD01B, 0xB38F, + 0xD01C, 0xB390, 0xD01D, 0xB391, 0xD01E, 0xB392, 0xD01F, 0xB393, + 0xD020, 0xB394, 0xD021, 0xB395, 0xD022, 0xB396, 0xD023, 0xB397, + 0xD024, 0xB398, 0xD025, 0xB399, 0xD026, 0xB39A, 0xD027, 0xB39B, + 0xD028, 0xB39C, 0xD029, 0xB39D, 0xD02A, 0xB39E, 0xD02B, 0xB39F, + 0xD02C, 0xB3A0, 0xD02D, 0xC4FA, 0xD02E, 0xB441, 0xD02F, 0xB442, + 0xD030, 0xB443, 0xD031, 0xB444, 0xD032, 0xB445, 0xD033, 0xB446, + 0xD034, 0xC4FB, 0xD035, 0xC4FC, 0xD036, 0xB447, 0xD037, 0xB448, + 0xD038, 0xC4FD, 0xD039, 0xB449, 0xD03A, 0xB44A, 0xD03B, 0xB44B, + 0xD03C, 0xC4FE, 0xD03D, 0xB44C, 0xD03E, 0xB44D, 0xD03F, 0xB44E, + 0xD040, 0xB44F, 0xD041, 0xB450, 0xD042, 0xB451, 0xD043, 0xB452, + 0xD044, 0xC5A1, 0xD045, 0xC5A2, 0xD046, 0xB453, 0xD047, 0xC5A3, + 0xD048, 0xB454, 0xD049, 0xC5A4, 0xD04A, 0xB455, 0xD04B, 0xB456, + 0xD04C, 0xB457, 0xD04D, 0xB458, 0xD04E, 0xB459, 0xD04F, 0xB45A, + 0xD050, 0xC5A5, 0xD051, 0xB461, 0xD052, 0xB462, 0xD053, 0xB463, + 0xD054, 0xC5A6, 0xD055, 0xB464, 0xD056, 0xB465, 0xD057, 0xB466, + 0xD058, 0xC5A7, 0xD059, 0xB467, 0xD05A, 0xB468, 0xD05B, 0xB469, + 0xD05C, 0xB46A, 0xD05D, 0xB46B, 0xD05E, 0xB46C, 0xD05F, 0xB46D, + 0xD060, 0xC5A8, 0xD061, 0xB46E, 0xD062, 0xB46F, 0xD063, 0xB470, + 0xD064, 0xB471, 0xD065, 0xB472, 0xD066, 0xB473, 0xD067, 0xB474, + 0xD068, 0xB475, 0xD069, 0xB476, 0xD06A, 0xB477, 0xD06B, 0xB478, + 0xD06C, 0xC5A9, 0xD06D, 0xC5AA, 0xD06E, 0xB479, 0xD06F, 0xB47A, + 0xD070, 0xC5AB, 0xD071, 0xB481, 0xD072, 0xB482, 0xD073, 0xB483, + 0xD074, 0xC5AC, 0xD075, 0xB484, 0xD076, 0xB485, 0xD077, 0xB486, + 0xD078, 0xB487, 0xD079, 0xB488, 0xD07A, 0xB489, 0xD07B, 0xB48A, + 0xD07C, 0xC5AD, 0xD07D, 0xC5AE, 0xD07E, 0xB48B, 0xD07F, 0xB48C, + 0xD080, 0xB48D, 0xD081, 0xC5AF, 0xD082, 0xB48E, 0xD083, 0xB48F, + 0xD084, 0xB490, 0xD085, 0xB491, 0xD086, 0xB492, 0xD087, 0xB493, + 0xD088, 0xB494, 0xD089, 0xB495, 0xD08A, 0xB496, 0xD08B, 0xB497, + 0xD08C, 0xB498, 0xD08D, 0xB499, 0xD08E, 0xB49A, 0xD08F, 0xB49B, + 0xD090, 0xB49C, 0xD091, 0xB49D, 0xD092, 0xB49E, 0xD093, 0xB49F, + 0xD094, 0xB4A0, 0xD095, 0xB541, 0xD096, 0xB542, 0xD097, 0xB543, + 0xD098, 0xB544, 0xD099, 0xB545, 0xD09A, 0xB546, 0xD09B, 0xB547, + 0xD09C, 0xB548, 0xD09D, 0xB549, 0xD09E, 0xB54A, 0xD09F, 0xB54B, + 0xD0A0, 0xB54C, 0xD0A1, 0xB54D, 0xD0A2, 0xB54E, 0xD0A3, 0xB54F, + 0xD0A4, 0xC5B0, 0xD0A5, 0xC5B1, 0xD0A6, 0xB550, 0xD0A7, 0xB551, + 0xD0A8, 0xC5B2, 0xD0A9, 0xB552, 0xD0AA, 0xB553, 0xD0AB, 0xB554, + 0xD0AC, 0xC5B3, 0xD0AD, 0xB555, 0xD0AE, 0xB556, 0xD0AF, 0xB557, + 0xD0B0, 0xB558, 0xD0B1, 0xB559, 0xD0B2, 0xB55A, 0xD0B3, 0xB561, + 0xD0B4, 0xC5B4, 0xD0B5, 0xC5B5, 0xD0B6, 0xB562, 0xD0B7, 0xC5B6, + 0xD0B8, 0xB563, 0xD0B9, 0xC5B7, 0xD0BA, 0xB564, 0xD0BB, 0xB565, + 0xD0BC, 0xB566, 0xD0BD, 0xB567, 0xD0BE, 0xB568, 0xD0BF, 0xB569, + 0xD0C0, 0xC5B8, 0xD0C1, 0xC5B9, 0xD0C2, 0xB56A, 0xD0C3, 0xB56B, + 0xD0C4, 0xC5BA, 0xD0C5, 0xB56C, 0xD0C6, 0xB56D, 0xD0C7, 0xB56E, + 0xD0C8, 0xC5BB, 0xD0C9, 0xC5BC, 0xD0CA, 0xB56F, 0xD0CB, 0xB570, + 0xD0CC, 0xB571, 0xD0CD, 0xB572, 0xD0CE, 0xB573, 0xD0CF, 0xB574, + 0xD0D0, 0xC5BD, 0xD0D1, 0xC5BE, 0xD0D2, 0xB575, 0xD0D3, 0xC5BF, + 0xD0D4, 0xC5C0, 0xD0D5, 0xC5C1, 0xD0D6, 0xB576, 0xD0D7, 0xB577, + 0xD0D8, 0xB578, 0xD0D9, 0xB579, 0xD0DA, 0xB57A, 0xD0DB, 0xB581, + 0xD0DC, 0xC5C2, 0xD0DD, 0xC5C3, 0xD0DE, 0xB582, 0xD0DF, 0xB583, + 0xD0E0, 0xC5C4, 0xD0E1, 0xB584, 0xD0E2, 0xB585, 0xD0E3, 0xB586, + 0xD0E4, 0xC5C5, 0xD0E5, 0xB587, 0xD0E6, 0xB588, 0xD0E7, 0xB589, + 0xD0E8, 0xB58A, 0xD0E9, 0xB58B, 0xD0EA, 0xB58C, 0xD0EB, 0xB58D, + 0xD0EC, 0xC5C6, 0xD0ED, 0xC5C7, 0xD0EE, 0xB58E, 0xD0EF, 0xC5C8, + 0xD0F0, 0xC5C9, 0xD0F1, 0xC5CA, 0xD0F2, 0xB58F, 0xD0F3, 0xB590, + 0xD0F4, 0xB591, 0xD0F5, 0xB592, 0xD0F6, 0xB593, 0xD0F7, 0xB594, + 0xD0F8, 0xC5CB, 0xD0F9, 0xB595, 0xD0FA, 0xB596, 0xD0FB, 0xB597, + 0xD0FC, 0xB598, 0xD0FD, 0xB599, 0xD0FE, 0xB59A, 0xD0FF, 0xB59B, + 0xD100, 0xB59C, 0xD101, 0xB59D, 0xD102, 0xB59E, 0xD103, 0xB59F, + 0xD104, 0xB5A0, 0xD105, 0xB641, 0xD106, 0xB642, 0xD107, 0xB643, + 0xD108, 0xB644, 0xD109, 0xB645, 0xD10A, 0xB646, 0xD10B, 0xB647, + 0xD10C, 0xB648, 0xD10D, 0xC5CC, 0xD10E, 0xB649, 0xD10F, 0xB64A, + 0xD110, 0xB64B, 0xD111, 0xB64C, 0xD112, 0xB64D, 0xD113, 0xB64E, + 0xD114, 0xB64F, 0xD115, 0xB650, 0xD116, 0xB651, 0xD117, 0xB652, + 0xD118, 0xB653, 0xD119, 0xB654, 0xD11A, 0xB655, 0xD11B, 0xB656, + 0xD11C, 0xB657, 0xD11D, 0xB658, 0xD11E, 0xB659, 0xD11F, 0xB65A, + 0xD120, 0xB661, 0xD121, 0xB662, 0xD122, 0xB663, 0xD123, 0xB664, + 0xD124, 0xB665, 0xD125, 0xB666, 0xD126, 0xB667, 0xD127, 0xB668, + 0xD128, 0xB669, 0xD129, 0xB66A, 0xD12A, 0xB66B, 0xD12B, 0xB66C, + 0xD12C, 0xB66D, 0xD12D, 0xB66E, 0xD12E, 0xB66F, 0xD12F, 0xB670, + 0xD130, 0xC5CD, 0xD131, 0xC5CE, 0xD132, 0xB671, 0xD133, 0xB672, + 0xD134, 0xC5CF, 0xD135, 0xB673, 0xD136, 0xB674, 0xD137, 0xB675, + 0xD138, 0xC5D0, 0xD139, 0xB676, 0xD13A, 0xC5D1, 0xD13B, 0xB677, + 0xD13C, 0xB678, 0xD13D, 0xB679, 0xD13E, 0xB67A, 0xD13F, 0xB681, + 0xD140, 0xC5D2, 0xD141, 0xC5D3, 0xD142, 0xB682, 0xD143, 0xC5D4, + 0xD144, 0xC5D5, 0xD145, 0xC5D6, 0xD146, 0xB683, 0xD147, 0xB684, + 0xD148, 0xB685, 0xD149, 0xB686, 0xD14A, 0xB687, 0xD14B, 0xB688, + 0xD14C, 0xC5D7, 0xD14D, 0xC5D8, 0xD14E, 0xB689, 0xD14F, 0xB68A, + 0xD150, 0xC5D9, 0xD151, 0xB68B, 0xD152, 0xB68C, 0xD153, 0xB68D, + 0xD154, 0xC5DA, 0xD155, 0xB68E, 0xD156, 0xB68F, 0xD157, 0xB690, + 0xD158, 0xB691, 0xD159, 0xB692, 0xD15A, 0xB693, 0xD15B, 0xB694, + 0xD15C, 0xC5DB, 0xD15D, 0xC5DC, 0xD15E, 0xB695, 0xD15F, 0xC5DD, + 0xD160, 0xB696, 0xD161, 0xC5DE, 0xD162, 0xB697, 0xD163, 0xB698, + 0xD164, 0xB699, 0xD165, 0xB69A, 0xD166, 0xB69B, 0xD167, 0xB69C, + 0xD168, 0xC5DF, 0xD169, 0xB69D, 0xD16A, 0xB69E, 0xD16B, 0xB69F, + 0xD16C, 0xC5E0, 0xD16D, 0xB6A0, 0xD16E, 0xB741, 0xD16F, 0xB742, + 0xD170, 0xB743, 0xD171, 0xB744, 0xD172, 0xB745, 0xD173, 0xB746, + 0xD174, 0xB747, 0xD175, 0xB748, 0xD176, 0xB749, 0xD177, 0xB74A, + 0xD178, 0xB74B, 0xD179, 0xB74C, 0xD17A, 0xB74D, 0xD17B, 0xB74E, + 0xD17C, 0xC5E1, 0xD17D, 0xB74F, 0xD17E, 0xB750, 0xD17F, 0xB751, + 0xD180, 0xB752, 0xD181, 0xB753, 0xD182, 0xB754, 0xD183, 0xB755, + 0xD184, 0xC5E2, 0xD185, 0xB756, 0xD186, 0xB757, 0xD187, 0xB758, + 0xD188, 0xC5E3, 0xD189, 0xB759, 0xD18A, 0xB75A, 0xD18B, 0xB761, + 0xD18C, 0xB762, 0xD18D, 0xB763, 0xD18E, 0xB764, 0xD18F, 0xB765, + 0xD190, 0xB766, 0xD191, 0xB767, 0xD192, 0xB768, 0xD193, 0xB769, + 0xD194, 0xB76A, 0xD195, 0xB76B, 0xD196, 0xB76C, 0xD197, 0xB76D, + 0xD198, 0xB76E, 0xD199, 0xB76F, 0xD19A, 0xB770, 0xD19B, 0xB771, + 0xD19C, 0xB772, 0xD19D, 0xB773, 0xD19E, 0xB774, 0xD19F, 0xB775, + 0xD1A0, 0xC5E4, 0xD1A1, 0xC5E5, 0xD1A2, 0xB776, 0xD1A3, 0xB777, + 0xD1A4, 0xC5E6, 0xD1A5, 0xB778, 0xD1A6, 0xB779, 0xD1A7, 0xB77A, + 0xD1A8, 0xC5E7, 0xD1A9, 0xB781, 0xD1AA, 0xB782, 0xD1AB, 0xB783, + 0xD1AC, 0xB784, 0xD1AD, 0xB785, 0xD1AE, 0xB786, 0xD1AF, 0xB787, + 0xD1B0, 0xC5E8, 0xD1B1, 0xC5E9, 0xD1B2, 0xB788, 0xD1B3, 0xC5EA, + 0xD1B4, 0xB789, 0xD1B5, 0xC5EB, 0xD1B6, 0xB78A, 0xD1B7, 0xB78B, + 0xD1B8, 0xB78C, 0xD1B9, 0xB78D, 0xD1BA, 0xC5EC, 0xD1BB, 0xB78E, + 0xD1BC, 0xC5ED, 0xD1BD, 0xB78F, 0xD1BE, 0xB790, 0xD1BF, 0xB791, + 0xD1C0, 0xC5EE, 0xD1C1, 0xB792, 0xD1C2, 0xB793, 0xD1C3, 0xB794, + 0xD1C4, 0xB795, 0xD1C5, 0xB796, 0xD1C6, 0xB797, 0xD1C7, 0xB798, + 0xD1C8, 0xB799, 0xD1C9, 0xB79A, 0xD1CA, 0xB79B, 0xD1CB, 0xB79C, + 0xD1CC, 0xB79D, 0xD1CD, 0xB79E, 0xD1CE, 0xB79F, 0xD1CF, 0xB7A0, + 0xD1D0, 0xB841, 0xD1D1, 0xB842, 0xD1D2, 0xB843, 0xD1D3, 0xB844, + 0xD1D4, 0xB845, 0xD1D5, 0xB846, 0xD1D6, 0xB847, 0xD1D7, 0xB848, + 0xD1D8, 0xC5EF, 0xD1D9, 0xB849, 0xD1DA, 0xB84A, 0xD1DB, 0xB84B, + 0xD1DC, 0xB84C, 0xD1DD, 0xB84D, 0xD1DE, 0xB84E, 0xD1DF, 0xB84F, + 0xD1E0, 0xB850, 0xD1E1, 0xB851, 0xD1E2, 0xB852, 0xD1E3, 0xB853, + 0xD1E4, 0xB854, 0xD1E5, 0xB855, 0xD1E6, 0xB856, 0xD1E7, 0xB857, + 0xD1E8, 0xB858, 0xD1E9, 0xB859, 0xD1EA, 0xB85A, 0xD1EB, 0xB861, + 0xD1EC, 0xB862, 0xD1ED, 0xB863, 0xD1EE, 0xB864, 0xD1EF, 0xB865, + 0xD1F0, 0xB866, 0xD1F1, 0xB867, 0xD1F2, 0xB868, 0xD1F3, 0xB869, + 0xD1F4, 0xC5F0, 0xD1F5, 0xB86A, 0xD1F6, 0xB86B, 0xD1F7, 0xB86C, + 0xD1F8, 0xC5F1, 0xD1F9, 0xB86D, 0xD1FA, 0xB86E, 0xD1FB, 0xB86F, + 0xD1FC, 0xB870, 0xD1FD, 0xB871, 0xD1FE, 0xB872, 0xD1FF, 0xB873, + 0xD200, 0xB874, 0xD201, 0xB875, 0xD202, 0xB876, 0xD203, 0xB877, + 0xD204, 0xB878, 0xD205, 0xB879, 0xD206, 0xB87A, 0xD207, 0xC5F2, + 0xD208, 0xB881, 0xD209, 0xC5F3, 0xD20A, 0xB882, 0xD20B, 0xB883, + 0xD20C, 0xB884, 0xD20D, 0xB885, 0xD20E, 0xB886, 0xD20F, 0xB887, + 0xD210, 0xC5F4, 0xD211, 0xB888, 0xD212, 0xB889, 0xD213, 0xB88A, + 0xD214, 0xB88B, 0xD215, 0xB88C, 0xD216, 0xB88D, 0xD217, 0xB88E, + 0xD218, 0xB88F, 0xD219, 0xB890, 0xD21A, 0xB891, 0xD21B, 0xB892, + 0xD21C, 0xB893, 0xD21D, 0xB894, 0xD21E, 0xB895, 0xD21F, 0xB896, + 0xD220, 0xB897, 0xD221, 0xB898, 0xD222, 0xB899, 0xD223, 0xB89A, + 0xD224, 0xB89B, 0xD225, 0xB89C, 0xD226, 0xB89D, 0xD227, 0xB89E, + 0xD228, 0xB89F, 0xD229, 0xB8A0, 0xD22A, 0xB941, 0xD22B, 0xB942, + 0xD22C, 0xC5F5, 0xD22D, 0xC5F6, 0xD22E, 0xB943, 0xD22F, 0xB944, + 0xD230, 0xC5F7, 0xD231, 0xB945, 0xD232, 0xB946, 0xD233, 0xB947, + 0xD234, 0xC5F8, 0xD235, 0xB948, 0xD236, 0xB949, 0xD237, 0xB94A, + 0xD238, 0xB94B, 0xD239, 0xB94C, 0xD23A, 0xB94D, 0xD23B, 0xB94E, + 0xD23C, 0xC5F9, 0xD23D, 0xC5FA, 0xD23E, 0xB94F, 0xD23F, 0xC5FB, + 0xD240, 0xB950, 0xD241, 0xC5FC, 0xD242, 0xB951, 0xD243, 0xB952, + 0xD244, 0xB953, 0xD245, 0xB954, 0xD246, 0xB955, 0xD247, 0xB956, + 0xD248, 0xC5FD, 0xD249, 0xB957, 0xD24A, 0xB958, 0xD24B, 0xB959, + 0xD24C, 0xB95A, 0xD24D, 0xB961, 0xD24E, 0xB962, 0xD24F, 0xB963, + 0xD250, 0xB964, 0xD251, 0xB965, 0xD252, 0xB966, 0xD253, 0xB967, + 0xD254, 0xB968, 0xD255, 0xB969, 0xD256, 0xB96A, 0xD257, 0xB96B, + 0xD258, 0xB96C, 0xD259, 0xB96D, 0xD25A, 0xB96E, 0xD25B, 0xB96F, + 0xD25C, 0xC5FE, 0xD25D, 0xB970, 0xD25E, 0xB971, 0xD25F, 0xB972, + 0xD260, 0xB973, 0xD261, 0xB974, 0xD262, 0xB975, 0xD263, 0xB976, + 0xD264, 0xC6A1, 0xD265, 0xB977, 0xD266, 0xB978, 0xD267, 0xB979, + 0xD268, 0xB97A, 0xD269, 0xB981, 0xD26A, 0xB982, 0xD26B, 0xB983, + 0xD26C, 0xB984, 0xD26D, 0xB985, 0xD26E, 0xB986, 0xD26F, 0xB987, + 0xD270, 0xB988, 0xD271, 0xB989, 0xD272, 0xB98A, 0xD273, 0xB98B, + 0xD274, 0xB98C, 0xD275, 0xB98D, 0xD276, 0xB98E, 0xD277, 0xB98F, + 0xD278, 0xB990, 0xD279, 0xB991, 0xD27A, 0xB992, 0xD27B, 0xB993, + 0xD27C, 0xB994, 0xD27D, 0xB995, 0xD27E, 0xB996, 0xD27F, 0xB997, + 0xD280, 0xC6A2, 0xD281, 0xC6A3, 0xD282, 0xB998, 0xD283, 0xB999, + 0xD284, 0xC6A4, 0xD285, 0xB99A, 0xD286, 0xB99B, 0xD287, 0xB99C, + 0xD288, 0xC6A5, 0xD289, 0xB99D, 0xD28A, 0xB99E, 0xD28B, 0xB99F, + 0xD28C, 0xB9A0, 0xD28D, 0xBA41, 0xD28E, 0xBA42, 0xD28F, 0xBA43, + 0xD290, 0xC6A6, 0xD291, 0xC6A7, 0xD292, 0xBA44, 0xD293, 0xBA45, + 0xD294, 0xBA46, 0xD295, 0xC6A8, 0xD296, 0xBA47, 0xD297, 0xBA48, + 0xD298, 0xBA49, 0xD299, 0xBA4A, 0xD29A, 0xBA4B, 0xD29B, 0xBA4C, + 0xD29C, 0xC6A9, 0xD29D, 0xBA4D, 0xD29E, 0xBA4E, 0xD29F, 0xBA4F, + 0xD2A0, 0xC6AA, 0xD2A1, 0xBA50, 0xD2A2, 0xBA51, 0xD2A3, 0xBA52, + 0xD2A4, 0xC6AB, 0xD2A5, 0xBA53, 0xD2A6, 0xBA54, 0xD2A7, 0xBA55, + 0xD2A8, 0xBA56, 0xD2A9, 0xBA57, 0xD2AA, 0xBA58, 0xD2AB, 0xBA59, + 0xD2AC, 0xC6AC, 0xD2AD, 0xBA5A, 0xD2AE, 0xBA61, 0xD2AF, 0xBA62, + 0xD2B0, 0xBA63, 0xD2B1, 0xC6AD, 0xD2B2, 0xBA64, 0xD2B3, 0xBA65, + 0xD2B4, 0xBA66, 0xD2B5, 0xBA67, 0xD2B6, 0xBA68, 0xD2B7, 0xBA69, + 0xD2B8, 0xC6AE, 0xD2B9, 0xC6AF, 0xD2BA, 0xBA6A, 0xD2BB, 0xBA6B, + 0xD2BC, 0xC6B0, 0xD2BD, 0xBA6C, 0xD2BE, 0xBA6D, 0xD2BF, 0xC6B1, + 0xD2C0, 0xC6B2, 0xD2C1, 0xBA6E, 0xD2C2, 0xC6B3, 0xD2C3, 0xBA6F, + 0xD2C4, 0xBA70, 0xD2C5, 0xBA71, 0xD2C6, 0xBA72, 0xD2C7, 0xBA73, + 0xD2C8, 0xC6B4, 0xD2C9, 0xC6B5, 0xD2CA, 0xBA74, 0xD2CB, 0xC6B6, + 0xD2CC, 0xBA75, 0xD2CD, 0xBA76, 0xD2CE, 0xBA77, 0xD2CF, 0xBA78, + 0xD2D0, 0xBA79, 0xD2D1, 0xBA7A, 0xD2D2, 0xBA81, 0xD2D3, 0xBA82, + 0xD2D4, 0xC6B7, 0xD2D5, 0xBA83, 0xD2D6, 0xBA84, 0xD2D7, 0xBA85, + 0xD2D8, 0xC6B8, 0xD2D9, 0xBA86, 0xD2DA, 0xBA87, 0xD2DB, 0xBA88, + 0xD2DC, 0xC6B9, 0xD2DD, 0xBA89, 0xD2DE, 0xBA8A, 0xD2DF, 0xBA8B, + 0xD2E0, 0xBA8C, 0xD2E1, 0xBA8D, 0xD2E2, 0xBA8E, 0xD2E3, 0xBA8F, + 0xD2E4, 0xC6BA, 0xD2E5, 0xC6BB, 0xD2E6, 0xBA90, 0xD2E7, 0xBA91, + 0xD2E8, 0xBA92, 0xD2E9, 0xBA93, 0xD2EA, 0xBA94, 0xD2EB, 0xBA95, + 0xD2EC, 0xBA96, 0xD2ED, 0xBA97, 0xD2EE, 0xBA98, 0xD2EF, 0xBA99, + 0xD2F0, 0xC6BC, 0xD2F1, 0xC6BD, 0xD2F2, 0xBA9A, 0xD2F3, 0xBA9B, + 0xD2F4, 0xC6BE, 0xD2F5, 0xBA9C, 0xD2F6, 0xBA9D, 0xD2F7, 0xBA9E, + 0xD2F8, 0xC6BF, 0xD2F9, 0xBA9F, 0xD2FA, 0xBAA0, 0xD2FB, 0xBB41, + 0xD2FC, 0xBB42, 0xD2FD, 0xBB43, 0xD2FE, 0xBB44, 0xD2FF, 0xBB45, + 0xD300, 0xC6C0, 0xD301, 0xC6C1, 0xD302, 0xBB46, 0xD303, 0xC6C2, + 0xD304, 0xBB47, 0xD305, 0xC6C3, 0xD306, 0xBB48, 0xD307, 0xBB49, + 0xD308, 0xBB4A, 0xD309, 0xBB4B, 0xD30A, 0xBB4C, 0xD30B, 0xBB4D, + 0xD30C, 0xC6C4, 0xD30D, 0xC6C5, 0xD30E, 0xC6C6, 0xD30F, 0xBB4E, + 0xD310, 0xC6C7, 0xD311, 0xBB4F, 0xD312, 0xBB50, 0xD313, 0xBB51, + 0xD314, 0xC6C8, 0xD315, 0xBB52, 0xD316, 0xC6C9, 0xD317, 0xBB53, + 0xD318, 0xBB54, 0xD319, 0xBB55, 0xD31A, 0xBB56, 0xD31B, 0xBB57, + 0xD31C, 0xC6CA, 0xD31D, 0xC6CB, 0xD31E, 0xBB58, 0xD31F, 0xC6CC, + 0xD320, 0xC6CD, 0xD321, 0xC6CE, 0xD322, 0xBB59, 0xD323, 0xBB5A, + 0xD324, 0xBB61, 0xD325, 0xC6CF, 0xD326, 0xBB62, 0xD327, 0xBB63, + 0xD328, 0xC6D0, 0xD329, 0xC6D1, 0xD32A, 0xBB64, 0xD32B, 0xBB65, + 0xD32C, 0xC6D2, 0xD32D, 0xBB66, 0xD32E, 0xBB67, 0xD32F, 0xBB68, + 0xD330, 0xC6D3, 0xD331, 0xBB69, 0xD332, 0xBB6A, 0xD333, 0xBB6B, + 0xD334, 0xBB6C, 0xD335, 0xBB6D, 0xD336, 0xBB6E, 0xD337, 0xBB6F, + 0xD338, 0xC6D4, 0xD339, 0xC6D5, 0xD33A, 0xBB70, 0xD33B, 0xC6D6, + 0xD33C, 0xC6D7, 0xD33D, 0xC6D8, 0xD33E, 0xBB71, 0xD33F, 0xBB72, + 0xD340, 0xBB73, 0xD341, 0xBB74, 0xD342, 0xBB75, 0xD343, 0xBB76, + 0xD344, 0xC6D9, 0xD345, 0xC6DA, 0xD346, 0xBB77, 0xD347, 0xBB78, + 0xD348, 0xBB79, 0xD349, 0xBB7A, 0xD34A, 0xBB81, 0xD34B, 0xBB82, + 0xD34C, 0xBB83, 0xD34D, 0xBB84, 0xD34E, 0xBB85, 0xD34F, 0xBB86, + 0xD350, 0xBB87, 0xD351, 0xBB88, 0xD352, 0xBB89, 0xD353, 0xBB8A, + 0xD354, 0xBB8B, 0xD355, 0xBB8C, 0xD356, 0xBB8D, 0xD357, 0xBB8E, + 0xD358, 0xBB8F, 0xD359, 0xBB90, 0xD35A, 0xBB91, 0xD35B, 0xBB92, + 0xD35C, 0xBB93, 0xD35D, 0xBB94, 0xD35E, 0xBB95, 0xD35F, 0xBB96, + 0xD360, 0xBB97, 0xD361, 0xBB98, 0xD362, 0xBB99, 0xD363, 0xBB9A, + 0xD364, 0xBB9B, 0xD365, 0xBB9C, 0xD366, 0xBB9D, 0xD367, 0xBB9E, + 0xD368, 0xBB9F, 0xD369, 0xBBA0, 0xD36A, 0xBC41, 0xD36B, 0xBC42, + 0xD36C, 0xBC43, 0xD36D, 0xBC44, 0xD36E, 0xBC45, 0xD36F, 0xBC46, + 0xD370, 0xBC47, 0xD371, 0xBC48, 0xD372, 0xBC49, 0xD373, 0xBC4A, + 0xD374, 0xBC4B, 0xD375, 0xBC4C, 0xD376, 0xBC4D, 0xD377, 0xBC4E, + 0xD378, 0xBC4F, 0xD379, 0xBC50, 0xD37A, 0xBC51, 0xD37B, 0xBC52, + 0xD37C, 0xC6DB, 0xD37D, 0xC6DC, 0xD37E, 0xBC53, 0xD37F, 0xBC54, + 0xD380, 0xC6DD, 0xD381, 0xBC55, 0xD382, 0xBC56, 0xD383, 0xBC57, + 0xD384, 0xC6DE, 0xD385, 0xBC58, 0xD386, 0xBC59, 0xD387, 0xBC5A, + 0xD388, 0xBC61, 0xD389, 0xBC62, 0xD38A, 0xBC63, 0xD38B, 0xBC64, + 0xD38C, 0xC6DF, 0xD38D, 0xC6E0, 0xD38E, 0xBC65, 0xD38F, 0xC6E1, + 0xD390, 0xC6E2, 0xD391, 0xC6E3, 0xD392, 0xBC66, 0xD393, 0xBC67, + 0xD394, 0xBC68, 0xD395, 0xBC69, 0xD396, 0xBC6A, 0xD397, 0xBC6B, + 0xD398, 0xC6E4, 0xD399, 0xC6E5, 0xD39A, 0xBC6C, 0xD39B, 0xBC6D, + 0xD39C, 0xC6E6, 0xD39D, 0xBC6E, 0xD39E, 0xBC6F, 0xD39F, 0xBC70, + 0xD3A0, 0xC6E7, 0xD3A1, 0xBC71, 0xD3A2, 0xBC72, 0xD3A3, 0xBC73, + 0xD3A4, 0xBC74, 0xD3A5, 0xBC75, 0xD3A6, 0xBC76, 0xD3A7, 0xBC77, + 0xD3A8, 0xC6E8, 0xD3A9, 0xC6E9, 0xD3AA, 0xBC78, 0xD3AB, 0xC6EA, + 0xD3AC, 0xBC79, 0xD3AD, 0xC6EB, 0xD3AE, 0xBC7A, 0xD3AF, 0xBC81, + 0xD3B0, 0xBC82, 0xD3B1, 0xBC83, 0xD3B2, 0xBC84, 0xD3B3, 0xBC85, + 0xD3B4, 0xC6EC, 0xD3B5, 0xBC86, 0xD3B6, 0xBC87, 0xD3B7, 0xBC88, + 0xD3B8, 0xC6ED, 0xD3B9, 0xBC89, 0xD3BA, 0xBC8A, 0xD3BB, 0xBC8B, + 0xD3BC, 0xC6EE, 0xD3BD, 0xBC8C, 0xD3BE, 0xBC8D, 0xD3BF, 0xBC8E, + 0xD3C0, 0xBC8F, 0xD3C1, 0xBC90, 0xD3C2, 0xBC91, 0xD3C3, 0xBC92, + 0xD3C4, 0xC6EF, 0xD3C5, 0xC6F0, 0xD3C6, 0xBC93, 0xD3C7, 0xBC94, + 0xD3C8, 0xC6F1, 0xD3C9, 0xC6F2, 0xD3CA, 0xBC95, 0xD3CB, 0xBC96, + 0xD3CC, 0xBC97, 0xD3CD, 0xBC98, 0xD3CE, 0xBC99, 0xD3CF, 0xBC9A, + 0xD3D0, 0xC6F3, 0xD3D1, 0xBC9B, 0xD3D2, 0xBC9C, 0xD3D3, 0xBC9D, + 0xD3D4, 0xBC9E, 0xD3D5, 0xBC9F, 0xD3D6, 0xBCA0, 0xD3D7, 0xBD41, + 0xD3D8, 0xC6F4, 0xD3D9, 0xBD42, 0xD3DA, 0xBD43, 0xD3DB, 0xBD44, + 0xD3DC, 0xBD45, 0xD3DD, 0xBD46, 0xD3DE, 0xBD47, 0xD3DF, 0xBD48, + 0xD3E0, 0xBD49, 0xD3E1, 0xC6F5, 0xD3E2, 0xBD4A, 0xD3E3, 0xC6F6, + 0xD3E4, 0xBD4B, 0xD3E5, 0xBD4C, 0xD3E6, 0xBD4D, 0xD3E7, 0xBD4E, + 0xD3E8, 0xBD4F, 0xD3E9, 0xBD50, 0xD3EA, 0xBD51, 0xD3EB, 0xBD52, + 0xD3EC, 0xC6F7, 0xD3ED, 0xC6F8, 0xD3EE, 0xBD53, 0xD3EF, 0xBD54, + 0xD3F0, 0xC6F9, 0xD3F1, 0xBD55, 0xD3F2, 0xBD56, 0xD3F3, 0xBD57, + 0xD3F4, 0xC6FA, 0xD3F5, 0xBD58, 0xD3F6, 0xBD59, 0xD3F7, 0xBD5A, + 0xD3F8, 0xBD61, 0xD3F9, 0xBD62, 0xD3FA, 0xBD63, 0xD3FB, 0xBD64, + 0xD3FC, 0xC6FB, 0xD3FD, 0xC6FC, 0xD3FE, 0xBD65, 0xD3FF, 0xC6FD, + 0xD400, 0xBD66, 0xD401, 0xC6FE, 0xD402, 0xBD67, 0xD403, 0xBD68, + 0xD404, 0xBD69, 0xD405, 0xBD6A, 0xD406, 0xBD6B, 0xD407, 0xBD6C, + 0xD408, 0xC7A1, 0xD409, 0xBD6D, 0xD40A, 0xBD6E, 0xD40B, 0xBD6F, + 0xD40C, 0xBD70, 0xD40D, 0xBD71, 0xD40E, 0xBD72, 0xD40F, 0xBD73, + 0xD410, 0xBD74, 0xD411, 0xBD75, 0xD412, 0xBD76, 0xD413, 0xBD77, + 0xD414, 0xBD78, 0xD415, 0xBD79, 0xD416, 0xBD7A, 0xD417, 0xBD81, + 0xD418, 0xBD82, 0xD419, 0xBD83, 0xD41A, 0xBD84, 0xD41B, 0xBD85, + 0xD41C, 0xBD86, 0xD41D, 0xC7A2, 0xD41E, 0xBD87, 0xD41F, 0xBD88, + 0xD420, 0xBD89, 0xD421, 0xBD8A, 0xD422, 0xBD8B, 0xD423, 0xBD8C, + 0xD424, 0xBD8D, 0xD425, 0xBD8E, 0xD426, 0xBD8F, 0xD427, 0xBD90, + 0xD428, 0xBD91, 0xD429, 0xBD92, 0xD42A, 0xBD93, 0xD42B, 0xBD94, + 0xD42C, 0xBD95, 0xD42D, 0xBD96, 0xD42E, 0xBD97, 0xD42F, 0xBD98, + 0xD430, 0xBD99, 0xD431, 0xBD9A, 0xD432, 0xBD9B, 0xD433, 0xBD9C, + 0xD434, 0xBD9D, 0xD435, 0xBD9E, 0xD436, 0xBD9F, 0xD437, 0xBDA0, + 0xD438, 0xBE41, 0xD439, 0xBE42, 0xD43A, 0xBE43, 0xD43B, 0xBE44, + 0xD43C, 0xBE45, 0xD43D, 0xBE46, 0xD43E, 0xBE47, 0xD43F, 0xBE48, + 0xD440, 0xC7A3, 0xD441, 0xBE49, 0xD442, 0xBE4A, 0xD443, 0xBE4B, + 0xD444, 0xC7A4, 0xD445, 0xBE4C, 0xD446, 0xBE4D, 0xD447, 0xBE4E, + 0xD448, 0xBE4F, 0xD449, 0xBE50, 0xD44A, 0xBE51, 0xD44B, 0xBE52, + 0xD44C, 0xBE53, 0xD44D, 0xBE54, 0xD44E, 0xBE55, 0xD44F, 0xBE56, + 0xD450, 0xBE57, 0xD451, 0xBE58, 0xD452, 0xBE59, 0xD453, 0xBE5A, + 0xD454, 0xBE61, 0xD455, 0xBE62, 0xD456, 0xBE63, 0xD457, 0xBE64, + 0xD458, 0xBE65, 0xD459, 0xBE66, 0xD45A, 0xBE67, 0xD45B, 0xBE68, + 0xD45C, 0xC7A5, 0xD45D, 0xBE69, 0xD45E, 0xBE6A, 0xD45F, 0xBE6B, + 0xD460, 0xC7A6, 0xD461, 0xBE6C, 0xD462, 0xBE6D, 0xD463, 0xBE6E, + 0xD464, 0xC7A7, 0xD465, 0xBE6F, 0xD466, 0xBE70, 0xD467, 0xBE71, + 0xD468, 0xBE72, 0xD469, 0xBE73, 0xD46A, 0xBE74, 0xD46B, 0xBE75, + 0xD46C, 0xBE76, 0xD46D, 0xC7A8, 0xD46E, 0xBE77, 0xD46F, 0xC7A9, + 0xD470, 0xBE78, 0xD471, 0xBE79, 0xD472, 0xBE7A, 0xD473, 0xBE81, + 0xD474, 0xBE82, 0xD475, 0xBE83, 0xD476, 0xBE84, 0xD477, 0xBE85, + 0xD478, 0xC7AA, 0xD479, 0xC7AB, 0xD47A, 0xBE86, 0xD47B, 0xBE87, + 0xD47C, 0xC7AC, 0xD47D, 0xBE88, 0xD47E, 0xBE89, 0xD47F, 0xC7AD, + 0xD480, 0xC7AE, 0xD481, 0xBE8A, 0xD482, 0xC7AF, 0xD483, 0xBE8B, + 0xD484, 0xBE8C, 0xD485, 0xBE8D, 0xD486, 0xBE8E, 0xD487, 0xBE8F, + 0xD488, 0xC7B0, 0xD489, 0xC7B1, 0xD48A, 0xBE90, 0xD48B, 0xC7B2, + 0xD48C, 0xBE91, 0xD48D, 0xC7B3, 0xD48E, 0xBE92, 0xD48F, 0xBE93, + 0xD490, 0xBE94, 0xD491, 0xBE95, 0xD492, 0xBE96, 0xD493, 0xBE97, + 0xD494, 0xC7B4, 0xD495, 0xBE98, 0xD496, 0xBE99, 0xD497, 0xBE9A, + 0xD498, 0xBE9B, 0xD499, 0xBE9C, 0xD49A, 0xBE9D, 0xD49B, 0xBE9E, + 0xD49C, 0xBE9F, 0xD49D, 0xBEA0, 0xD49E, 0xBF41, 0xD49F, 0xBF42, + 0xD4A0, 0xBF43, 0xD4A1, 0xBF44, 0xD4A2, 0xBF45, 0xD4A3, 0xBF46, + 0xD4A4, 0xBF47, 0xD4A5, 0xBF48, 0xD4A6, 0xBF49, 0xD4A7, 0xBF4A, + 0xD4A8, 0xBF4B, 0xD4A9, 0xC7B5, 0xD4AA, 0xBF4C, 0xD4AB, 0xBF4D, + 0xD4AC, 0xBF4E, 0xD4AD, 0xBF4F, 0xD4AE, 0xBF50, 0xD4AF, 0xBF51, + 0xD4B0, 0xBF52, 0xD4B1, 0xBF53, 0xD4B2, 0xBF54, 0xD4B3, 0xBF55, + 0xD4B4, 0xBF56, 0xD4B5, 0xBF57, 0xD4B6, 0xBF58, 0xD4B7, 0xBF59, + 0xD4B8, 0xBF5A, 0xD4B9, 0xBF61, 0xD4BA, 0xBF62, 0xD4BB, 0xBF63, + 0xD4BC, 0xBF64, 0xD4BD, 0xBF65, 0xD4BE, 0xBF66, 0xD4BF, 0xBF67, + 0xD4C0, 0xBF68, 0xD4C1, 0xBF69, 0xD4C2, 0xBF6A, 0xD4C3, 0xBF6B, + 0xD4C4, 0xBF6C, 0xD4C5, 0xBF6D, 0xD4C6, 0xBF6E, 0xD4C7, 0xBF6F, + 0xD4C8, 0xBF70, 0xD4C9, 0xBF71, 0xD4CA, 0xBF72, 0xD4CB, 0xBF73, + 0xD4CC, 0xC7B6, 0xD4CD, 0xBF74, 0xD4CE, 0xBF75, 0xD4CF, 0xBF76, + 0xD4D0, 0xC7B7, 0xD4D1, 0xBF77, 0xD4D2, 0xBF78, 0xD4D3, 0xBF79, + 0xD4D4, 0xC7B8, 0xD4D5, 0xBF7A, 0xD4D6, 0xBF81, 0xD4D7, 0xBF82, + 0xD4D8, 0xBF83, 0xD4D9, 0xBF84, 0xD4DA, 0xBF85, 0xD4DB, 0xBF86, + 0xD4DC, 0xC7B9, 0xD4DD, 0xBF87, 0xD4DE, 0xBF88, 0xD4DF, 0xC7BA, + 0xD4E0, 0xBF89, 0xD4E1, 0xBF8A, 0xD4E2, 0xBF8B, 0xD4E3, 0xBF8C, + 0xD4E4, 0xBF8D, 0xD4E5, 0xBF8E, 0xD4E6, 0xBF8F, 0xD4E7, 0xBF90, + 0xD4E8, 0xC7BB, 0xD4E9, 0xBF91, 0xD4EA, 0xBF92, 0xD4EB, 0xBF93, + 0xD4EC, 0xC7BC, 0xD4ED, 0xBF94, 0xD4EE, 0xBF95, 0xD4EF, 0xBF96, + 0xD4F0, 0xC7BD, 0xD4F1, 0xBF97, 0xD4F2, 0xBF98, 0xD4F3, 0xBF99, + 0xD4F4, 0xBF9A, 0xD4F5, 0xBF9B, 0xD4F6, 0xBF9C, 0xD4F7, 0xBF9D, + 0xD4F8, 0xC7BE, 0xD4F9, 0xBF9E, 0xD4FA, 0xBF9F, 0xD4FB, 0xC7BF, + 0xD4FC, 0xBFA0, 0xD4FD, 0xC7C0, 0xD4FE, 0xC041, 0xD4FF, 0xC042, + 0xD500, 0xC043, 0xD501, 0xC044, 0xD502, 0xC045, 0xD503, 0xC046, + 0xD504, 0xC7C1, 0xD505, 0xC047, 0xD506, 0xC048, 0xD507, 0xC049, + 0xD508, 0xC7C2, 0xD509, 0xC04A, 0xD50A, 0xC04B, 0xD50B, 0xC04C, + 0xD50C, 0xC7C3, 0xD50D, 0xC04D, 0xD50E, 0xC04E, 0xD50F, 0xC04F, + 0xD510, 0xC050, 0xD511, 0xC051, 0xD512, 0xC052, 0xD513, 0xC053, + 0xD514, 0xC7C4, 0xD515, 0xC7C5, 0xD516, 0xC054, 0xD517, 0xC7C6, + 0xD518, 0xC055, 0xD519, 0xC056, 0xD51A, 0xC057, 0xD51B, 0xC058, + 0xD51C, 0xC059, 0xD51D, 0xC05A, 0xD51E, 0xC061, 0xD51F, 0xC062, + 0xD520, 0xC063, 0xD521, 0xC064, 0xD522, 0xC065, 0xD523, 0xC066, + 0xD524, 0xC067, 0xD525, 0xC068, 0xD526, 0xC069, 0xD527, 0xC06A, + 0xD528, 0xC06B, 0xD529, 0xC06C, 0xD52A, 0xC06D, 0xD52B, 0xC06E, + 0xD52C, 0xC06F, 0xD52D, 0xC070, 0xD52E, 0xC071, 0xD52F, 0xC072, + 0xD530, 0xC073, 0xD531, 0xC074, 0xD532, 0xC075, 0xD533, 0xC076, + 0xD534, 0xC077, 0xD535, 0xC078, 0xD536, 0xC079, 0xD537, 0xC07A, + 0xD538, 0xC081, 0xD539, 0xC082, 0xD53A, 0xC083, 0xD53B, 0xC084, + 0xD53C, 0xC7C7, 0xD53D, 0xC7C8, 0xD53E, 0xC085, 0xD53F, 0xC086, + 0xD540, 0xC7C9, 0xD541, 0xC087, 0xD542, 0xC088, 0xD543, 0xC089, + 0xD544, 0xC7CA, 0xD545, 0xC08A, 0xD546, 0xC08B, 0xD547, 0xC08C, + 0xD548, 0xC08D, 0xD549, 0xC08E, 0xD54A, 0xC08F, 0xD54B, 0xC090, + 0xD54C, 0xC7CB, 0xD54D, 0xC7CC, 0xD54E, 0xC091, 0xD54F, 0xC7CD, + 0xD550, 0xC092, 0xD551, 0xC7CE, 0xD552, 0xC093, 0xD553, 0xC094, + 0xD554, 0xC095, 0xD555, 0xC096, 0xD556, 0xC097, 0xD557, 0xC098, + 0xD558, 0xC7CF, 0xD559, 0xC7D0, 0xD55A, 0xC099, 0xD55B, 0xC09A, + 0xD55C, 0xC7D1, 0xD55D, 0xC09B, 0xD55E, 0xC09C, 0xD55F, 0xC09D, + 0xD560, 0xC7D2, 0xD561, 0xC09E, 0xD562, 0xC09F, 0xD563, 0xC0A0, + 0xD564, 0xC141, 0xD565, 0xC7D3, 0xD566, 0xC142, 0xD567, 0xC143, + 0xD568, 0xC7D4, 0xD569, 0xC7D5, 0xD56A, 0xC144, 0xD56B, 0xC7D6, + 0xD56C, 0xC145, 0xD56D, 0xC7D7, 0xD56E, 0xC146, 0xD56F, 0xC147, + 0xD570, 0xC148, 0xD571, 0xC149, 0xD572, 0xC14A, 0xD573, 0xC14B, + 0xD574, 0xC7D8, 0xD575, 0xC7D9, 0xD576, 0xC14C, 0xD577, 0xC14D, + 0xD578, 0xC7DA, 0xD579, 0xC14E, 0xD57A, 0xC14F, 0xD57B, 0xC150, + 0xD57C, 0xC7DB, 0xD57D, 0xC151, 0xD57E, 0xC152, 0xD57F, 0xC153, + 0xD580, 0xC154, 0xD581, 0xC155, 0xD582, 0xC156, 0xD583, 0xC157, + 0xD584, 0xC7DC, 0xD585, 0xC7DD, 0xD586, 0xC158, 0xD587, 0xC7DE, + 0xD588, 0xC7DF, 0xD589, 0xC7E0, 0xD58A, 0xC159, 0xD58B, 0xC15A, + 0xD58C, 0xC161, 0xD58D, 0xC162, 0xD58E, 0xC163, 0xD58F, 0xC164, + 0xD590, 0xC7E1, 0xD591, 0xC165, 0xD592, 0xC166, 0xD593, 0xC167, + 0xD594, 0xC168, 0xD595, 0xC169, 0xD596, 0xC16A, 0xD597, 0xC16B, + 0xD598, 0xC16C, 0xD599, 0xC16D, 0xD59A, 0xC16E, 0xD59B, 0xC16F, + 0xD59C, 0xC170, 0xD59D, 0xC171, 0xD59E, 0xC172, 0xD59F, 0xC173, + 0xD5A0, 0xC174, 0xD5A1, 0xC175, 0xD5A2, 0xC176, 0xD5A3, 0xC177, + 0xD5A4, 0xC178, 0xD5A5, 0xC7E2, 0xD5A6, 0xC179, 0xD5A7, 0xC17A, + 0xD5A8, 0xC181, 0xD5A9, 0xC182, 0xD5AA, 0xC183, 0xD5AB, 0xC184, + 0xD5AC, 0xC185, 0xD5AD, 0xC186, 0xD5AE, 0xC187, 0xD5AF, 0xC188, + 0xD5B0, 0xC189, 0xD5B1, 0xC18A, 0xD5B2, 0xC18B, 0xD5B3, 0xC18C, + 0xD5B4, 0xC18D, 0xD5B5, 0xC18E, 0xD5B6, 0xC18F, 0xD5B7, 0xC190, + 0xD5B8, 0xC191, 0xD5B9, 0xC192, 0xD5BA, 0xC193, 0xD5BB, 0xC194, + 0xD5BC, 0xC195, 0xD5BD, 0xC196, 0xD5BE, 0xC197, 0xD5BF, 0xC198, + 0xD5C0, 0xC199, 0xD5C1, 0xC19A, 0xD5C2, 0xC19B, 0xD5C3, 0xC19C, + 0xD5C4, 0xC19D, 0xD5C5, 0xC19E, 0xD5C6, 0xC19F, 0xD5C7, 0xC1A0, + 0xD5C8, 0xC7E3, 0xD5C9, 0xC7E4, 0xD5CA, 0xC241, 0xD5CB, 0xC242, + 0xD5CC, 0xC7E5, 0xD5CD, 0xC243, 0xD5CE, 0xC244, 0xD5CF, 0xC245, + 0xD5D0, 0xC7E6, 0xD5D1, 0xC246, 0xD5D2, 0xC7E7, 0xD5D3, 0xC247, + 0xD5D4, 0xC248, 0xD5D5, 0xC249, 0xD5D6, 0xC24A, 0xD5D7, 0xC24B, + 0xD5D8, 0xC7E8, 0xD5D9, 0xC7E9, 0xD5DA, 0xC24C, 0xD5DB, 0xC7EA, + 0xD5DC, 0xC24D, 0xD5DD, 0xC7EB, 0xD5DE, 0xC24E, 0xD5DF, 0xC24F, + 0xD5E0, 0xC250, 0xD5E1, 0xC251, 0xD5E2, 0xC252, 0xD5E3, 0xC253, + 0xD5E4, 0xC7EC, 0xD5E5, 0xC7ED, 0xD5E6, 0xC254, 0xD5E7, 0xC255, + 0xD5E8, 0xC7EE, 0xD5E9, 0xC256, 0xD5EA, 0xC257, 0xD5EB, 0xC258, + 0xD5EC, 0xC7EF, 0xD5ED, 0xC259, 0xD5EE, 0xC25A, 0xD5EF, 0xC261, + 0xD5F0, 0xC262, 0xD5F1, 0xC263, 0xD5F2, 0xC264, 0xD5F3, 0xC265, + 0xD5F4, 0xC7F0, 0xD5F5, 0xC7F1, 0xD5F6, 0xC266, 0xD5F7, 0xC7F2, + 0xD5F8, 0xC267, 0xD5F9, 0xC7F3, 0xD5FA, 0xC268, 0xD5FB, 0xC269, + 0xD5FC, 0xC26A, 0xD5FD, 0xC26B, 0xD5FE, 0xC26C, 0xD5FF, 0xC26D, + 0xD600, 0xC7F4, 0xD601, 0xC7F5, 0xD602, 0xC26E, 0xD603, 0xC26F, + 0xD604, 0xC7F6, 0xD605, 0xC270, 0xD606, 0xC271, 0xD607, 0xC272, + 0xD608, 0xC7F7, 0xD609, 0xC273, 0xD60A, 0xC274, 0xD60B, 0xC275, + 0xD60C, 0xC276, 0xD60D, 0xC277, 0xD60E, 0xC278, 0xD60F, 0xC279, + 0xD610, 0xC7F8, 0xD611, 0xC7F9, 0xD612, 0xC27A, 0xD613, 0xC7FA, + 0xD614, 0xC7FB, 0xD615, 0xC7FC, 0xD616, 0xC281, 0xD617, 0xC282, + 0xD618, 0xC283, 0xD619, 0xC284, 0xD61A, 0xC285, 0xD61B, 0xC286, + 0xD61C, 0xC7FD, 0xD61D, 0xC287, 0xD61E, 0xC288, 0xD61F, 0xC289, + 0xD620, 0xC7FE, 0xD621, 0xC28A, 0xD622, 0xC28B, 0xD623, 0xC28C, + 0xD624, 0xC8A1, 0xD625, 0xC28D, 0xD626, 0xC28E, 0xD627, 0xC28F, + 0xD628, 0xC290, 0xD629, 0xC291, 0xD62A, 0xC292, 0xD62B, 0xC293, + 0xD62C, 0xC294, 0xD62D, 0xC8A2, 0xD62E, 0xC295, 0xD62F, 0xC296, + 0xD630, 0xC297, 0xD631, 0xC298, 0xD632, 0xC299, 0xD633, 0xC29A, + 0xD634, 0xC29B, 0xD635, 0xC29C, 0xD636, 0xC29D, 0xD637, 0xC29E, + 0xD638, 0xC8A3, 0xD639, 0xC8A4, 0xD63A, 0xC29F, 0xD63B, 0xC2A0, + 0xD63C, 0xC8A5, 0xD63D, 0xC341, 0xD63E, 0xC342, 0xD63F, 0xC343, + 0xD640, 0xC8A6, 0xD641, 0xC344, 0xD642, 0xC345, 0xD643, 0xC346, + 0xD644, 0xC347, 0xD645, 0xC8A7, 0xD646, 0xC348, 0xD647, 0xC349, + 0xD648, 0xC8A8, 0xD649, 0xC8A9, 0xD64A, 0xC34A, 0xD64B, 0xC8AA, + 0xD64C, 0xC34B, 0xD64D, 0xC8AB, 0xD64E, 0xC34C, 0xD64F, 0xC34D, + 0xD650, 0xC34E, 0xD651, 0xC8AC, 0xD652, 0xC34F, 0xD653, 0xC350, + 0xD654, 0xC8AD, 0xD655, 0xC8AE, 0xD656, 0xC351, 0xD657, 0xC352, + 0xD658, 0xC8AF, 0xD659, 0xC353, 0xD65A, 0xC354, 0xD65B, 0xC355, + 0xD65C, 0xC8B0, 0xD65D, 0xC356, 0xD65E, 0xC357, 0xD65F, 0xC358, + 0xD660, 0xC359, 0xD661, 0xC35A, 0xD662, 0xC361, 0xD663, 0xC362, + 0xD664, 0xC363, 0xD665, 0xC364, 0xD666, 0xC365, 0xD667, 0xC8B1, + 0xD668, 0xC366, 0xD669, 0xC8B2, 0xD66A, 0xC367, 0xD66B, 0xC368, + 0xD66C, 0xC369, 0xD66D, 0xC36A, 0xD66E, 0xC36B, 0xD66F, 0xC36C, + 0xD670, 0xC8B3, 0xD671, 0xC8B4, 0xD672, 0xC36D, 0xD673, 0xC36E, + 0xD674, 0xC8B5, 0xD675, 0xC36F, 0xD676, 0xC370, 0xD677, 0xC371, + 0xD678, 0xC372, 0xD679, 0xC373, 0xD67A, 0xC374, 0xD67B, 0xC375, + 0xD67C, 0xC376, 0xD67D, 0xC377, 0xD67E, 0xC378, 0xD67F, 0xC379, + 0xD680, 0xC37A, 0xD681, 0xC381, 0xD682, 0xC382, 0xD683, 0xC8B6, + 0xD684, 0xC383, 0xD685, 0xC8B7, 0xD686, 0xC384, 0xD687, 0xC385, + 0xD688, 0xC386, 0xD689, 0xC387, 0xD68A, 0xC388, 0xD68B, 0xC389, + 0xD68C, 0xC8B8, 0xD68D, 0xC8B9, 0xD68E, 0xC38A, 0xD68F, 0xC38B, + 0xD690, 0xC8BA, 0xD691, 0xC38C, 0xD692, 0xC38D, 0xD693, 0xC38E, + 0xD694, 0xC8BB, 0xD695, 0xC38F, 0xD696, 0xC390, 0xD697, 0xC391, + 0xD698, 0xC392, 0xD699, 0xC393, 0xD69A, 0xC394, 0xD69B, 0xC395, + 0xD69C, 0xC396, 0xD69D, 0xC8BC, 0xD69E, 0xC397, 0xD69F, 0xC8BD, + 0xD6A0, 0xC398, 0xD6A1, 0xC8BE, 0xD6A2, 0xC399, 0xD6A3, 0xC39A, + 0xD6A4, 0xC39B, 0xD6A5, 0xC39C, 0xD6A6, 0xC39D, 0xD6A7, 0xC39E, + 0xD6A8, 0xC8BF, 0xD6A9, 0xC39F, 0xD6AA, 0xC3A0, 0xD6AB, 0xC441, + 0xD6AC, 0xC8C0, 0xD6AD, 0xC442, 0xD6AE, 0xC443, 0xD6AF, 0xC444, + 0xD6B0, 0xC8C1, 0xD6B1, 0xC445, 0xD6B2, 0xC446, 0xD6B3, 0xC447, + 0xD6B4, 0xC448, 0xD6B5, 0xC449, 0xD6B6, 0xC44A, 0xD6B7, 0xC44B, + 0xD6B8, 0xC44C, 0xD6B9, 0xC8C2, 0xD6BA, 0xC44D, 0xD6BB, 0xC8C3, + 0xD6BC, 0xC44E, 0xD6BD, 0xC44F, 0xD6BE, 0xC450, 0xD6BF, 0xC451, + 0xD6C0, 0xC452, 0xD6C1, 0xC453, 0xD6C2, 0xC454, 0xD6C3, 0xC455, + 0xD6C4, 0xC8C4, 0xD6C5, 0xC8C5, 0xD6C6, 0xC456, 0xD6C7, 0xC457, + 0xD6C8, 0xC8C6, 0xD6C9, 0xC458, 0xD6CA, 0xC459, 0xD6CB, 0xC45A, + 0xD6CC, 0xC8C7, 0xD6CD, 0xC461, 0xD6CE, 0xC462, 0xD6CF, 0xC463, + 0xD6D0, 0xC464, 0xD6D1, 0xC8C8, 0xD6D2, 0xC465, 0xD6D3, 0xC466, + 0xD6D4, 0xC8C9, 0xD6D5, 0xC467, 0xD6D6, 0xC468, 0xD6D7, 0xC8CA, + 0xD6D8, 0xC469, 0xD6D9, 0xC8CB, 0xD6DA, 0xC46A, 0xD6DB, 0xC46B, + 0xD6DC, 0xC46C, 0xD6DD, 0xC46D, 0xD6DE, 0xC46E, 0xD6DF, 0xC46F, + 0xD6E0, 0xC8CC, 0xD6E1, 0xC470, 0xD6E2, 0xC471, 0xD6E3, 0xC472, + 0xD6E4, 0xC8CD, 0xD6E5, 0xC473, 0xD6E6, 0xC474, 0xD6E7, 0xC475, + 0xD6E8, 0xC8CE, 0xD6E9, 0xC476, 0xD6EA, 0xC477, 0xD6EB, 0xC478, + 0xD6EC, 0xC479, 0xD6ED, 0xC47A, 0xD6EE, 0xC481, 0xD6EF, 0xC482, + 0xD6F0, 0xC8CF, 0xD6F1, 0xC483, 0xD6F2, 0xC484, 0xD6F3, 0xC485, + 0xD6F4, 0xC486, 0xD6F5, 0xC8D0, 0xD6F6, 0xC487, 0xD6F7, 0xC488, + 0xD6F8, 0xC489, 0xD6F9, 0xC48A, 0xD6FA, 0xC48B, 0xD6FB, 0xC48C, + 0xD6FC, 0xC8D1, 0xD6FD, 0xC8D2, 0xD6FE, 0xC48D, 0xD6FF, 0xC48E, + 0xD700, 0xC8D3, 0xD701, 0xC48F, 0xD702, 0xC490, 0xD703, 0xC491, + 0xD704, 0xC8D4, 0xD705, 0xC492, 0xD706, 0xC493, 0xD707, 0xC494, + 0xD708, 0xC495, 0xD709, 0xC496, 0xD70A, 0xC497, 0xD70B, 0xC498, + 0xD70C, 0xC499, 0xD70D, 0xC49A, 0xD70E, 0xC49B, 0xD70F, 0xC49C, + 0xD710, 0xC49D, 0xD711, 0xC8D5, 0xD712, 0xC49E, 0xD713, 0xC49F, + 0xD714, 0xC4A0, 0xD715, 0xC541, 0xD716, 0xC542, 0xD717, 0xC543, + 0xD718, 0xC8D6, 0xD719, 0xC8D7, 0xD71A, 0xC544, 0xD71B, 0xC545, + 0xD71C, 0xC8D8, 0xD71D, 0xC546, 0xD71E, 0xC547, 0xD71F, 0xC548, + 0xD720, 0xC8D9, 0xD721, 0xC549, 0xD722, 0xC54A, 0xD723, 0xC54B, + 0xD724, 0xC54C, 0xD725, 0xC54D, 0xD726, 0xC54E, 0xD727, 0xC54F, + 0xD728, 0xC8DA, 0xD729, 0xC8DB, 0xD72A, 0xC550, 0xD72B, 0xC8DC, + 0xD72C, 0xC551, 0xD72D, 0xC8DD, 0xD72E, 0xC552, 0xD72F, 0xC553, + 0xD730, 0xC554, 0xD731, 0xC555, 0xD732, 0xC556, 0xD733, 0xC557, + 0xD734, 0xC8DE, 0xD735, 0xC8DF, 0xD736, 0xC558, 0xD737, 0xC559, + 0xD738, 0xC8E0, 0xD739, 0xC55A, 0xD73A, 0xC561, 0xD73B, 0xC562, + 0xD73C, 0xC8E1, 0xD73D, 0xC563, 0xD73E, 0xC564, 0xD73F, 0xC565, + 0xD740, 0xC566, 0xD741, 0xC567, 0xD742, 0xC568, 0xD743, 0xC569, + 0xD744, 0xC8E2, 0xD745, 0xC56A, 0xD746, 0xC56B, 0xD747, 0xC8E3, + 0xD748, 0xC56C, 0xD749, 0xC8E4, 0xD74A, 0xC56D, 0xD74B, 0xC56E, + 0xD74C, 0xC56F, 0xD74D, 0xC570, 0xD74E, 0xC571, 0xD74F, 0xC572, + 0xD750, 0xC8E5, 0xD751, 0xC8E6, 0xD752, 0xC573, 0xD753, 0xC574, + 0xD754, 0xC8E7, 0xD755, 0xC575, 0xD756, 0xC8E8, 0xD757, 0xC8E9, + 0xD758, 0xC8EA, 0xD759, 0xC8EB, 0xD75A, 0xC576, 0xD75B, 0xC577, + 0xD75C, 0xC578, 0xD75D, 0xC579, 0xD75E, 0xC57A, 0xD75F, 0xC581, + 0xD760, 0xC8EC, 0xD761, 0xC8ED, 0xD762, 0xC582, 0xD763, 0xC8EE, + 0xD764, 0xC583, 0xD765, 0xC8EF, 0xD766, 0xC584, 0xD767, 0xC585, + 0xD768, 0xC586, 0xD769, 0xC8F0, 0xD76A, 0xC587, 0xD76B, 0xC588, + 0xD76C, 0xC8F1, 0xD76D, 0xC589, 0xD76E, 0xC58A, 0xD76F, 0xC58B, + 0xD770, 0xC8F2, 0xD771, 0xC58C, 0xD772, 0xC58D, 0xD773, 0xC58E, + 0xD774, 0xC8F3, 0xD775, 0xC58F, 0xD776, 0xC590, 0xD777, 0xC591, + 0xD778, 0xC592, 0xD779, 0xC593, 0xD77A, 0xC594, 0xD77B, 0xC595, + 0xD77C, 0xC8F4, 0xD77D, 0xC8F5, 0xD77E, 0xC596, 0xD77F, 0xC597, + 0xD780, 0xC598, 0xD781, 0xC8F6, 0xD782, 0xC599, 0xD783, 0xC59A, + 0xD784, 0xC59B, 0xD785, 0xC59C, 0xD786, 0xC59D, 0xD787, 0xC59E, + 0xD788, 0xC8F7, 0xD789, 0xC8F8, 0xD78A, 0xC59F, 0xD78B, 0xC5A0, + 0xD78C, 0xC8F9, 0xD78D, 0xC641, 0xD78E, 0xC642, 0xD78F, 0xC643, + 0xD790, 0xC8FA, 0xD791, 0xC644, 0xD792, 0xC645, 0xD793, 0xC646, + 0xD794, 0xC647, 0xD795, 0xC648, 0xD796, 0xC649, 0xD797, 0xC64A, + 0xD798, 0xC8FB, 0xD799, 0xC8FC, 0xD79A, 0xC64B, 0xD79B, 0xC8FD, + 0xD79C, 0xC64C, 0xD79D, 0xC8FE, 0xD79E, 0xC64D, 0xD79F, 0xC64E, + 0xD7A0, 0xC64F, 0xD7A1, 0xC650, 0xD7A2, 0xC651, 0xD7A3, 0xC652, + 0xF900, 0xCBD0, 0xF901, 0xCBD6, 0xF902, 0xCBE7, 0xF903, 0xCDCF, + 0xF904, 0xCDE8, 0xF905, 0xCEAD, 0xF906, 0xCFFB, 0xF907, 0xD0A2, + 0xF908, 0xD0B8, 0xF909, 0xD0D0, 0xF90A, 0xD0DD, 0xF90B, 0xD1D4, + 0xF90C, 0xD1D5, 0xF90D, 0xD1D8, 0xF90E, 0xD1DB, 0xF90F, 0xD1DC, + 0xF910, 0xD1DD, 0xF911, 0xD1DE, 0xF912, 0xD1DF, 0xF913, 0xD1E0, + 0xF914, 0xD1E2, 0xF915, 0xD1E3, 0xF916, 0xD1E4, 0xF917, 0xD1E5, + 0xF918, 0xD1E6, 0xF919, 0xD1E8, 0xF91A, 0xD1E9, 0xF91B, 0xD1EA, + 0xF91C, 0xD1EB, 0xF91D, 0xD1ED, 0xF91E, 0xD1EF, 0xF91F, 0xD1F0, + 0xF920, 0xD1F2, 0xF921, 0xD1F6, 0xF922, 0xD1FA, 0xF923, 0xD1FC, + 0xF924, 0xD1FD, 0xF925, 0xD1FE, 0xF926, 0xD2A2, 0xF927, 0xD2A3, + 0xF928, 0xD2A7, 0xF929, 0xD2A8, 0xF92A, 0xD2A9, 0xF92B, 0xD2AA, + 0xF92C, 0xD2AB, 0xF92D, 0xD2AD, 0xF92E, 0xD2B2, 0xF92F, 0xD2BE, + 0xF930, 0xD2C2, 0xF931, 0xD2C3, 0xF932, 0xD2C4, 0xF933, 0xD2C6, + 0xF934, 0xD2C7, 0xF935, 0xD2C8, 0xF936, 0xD2C9, 0xF937, 0xD2CA, + 0xF938, 0xD2CB, 0xF939, 0xD2CD, 0xF93A, 0xD2CE, 0xF93B, 0xD2CF, + 0xF93C, 0xD2D0, 0xF93D, 0xD2D1, 0xF93E, 0xD2D2, 0xF93F, 0xD2D3, + 0xF940, 0xD2D4, 0xF941, 0xD2D5, 0xF942, 0xD2D6, 0xF943, 0xD2D7, + 0xF944, 0xD2D9, 0xF945, 0xD2DA, 0xF946, 0xD2DE, 0xF947, 0xD2DF, + 0xF948, 0xD2E1, 0xF949, 0xD2E2, 0xF94A, 0xD2E4, 0xF94B, 0xD2E5, + 0xF94C, 0xD2E6, 0xF94D, 0xD2E7, 0xF94E, 0xD2E8, 0xF94F, 0xD2E9, + 0xF950, 0xD2EA, 0xF951, 0xD2EB, 0xF952, 0xD2F0, 0xF953, 0xD2F1, + 0xF954, 0xD2F2, 0xF955, 0xD2F3, 0xF956, 0xD2F4, 0xF957, 0xD2F5, + 0xF958, 0xD2F7, 0xF959, 0xD2F8, 0xF95A, 0xD4E6, 0xF95B, 0xD4FC, + 0xF95C, 0xD5A5, 0xF95D, 0xD5AB, 0xF95E, 0xD5AE, 0xF95F, 0xD6B8, + 0xF960, 0xD6CD, 0xF961, 0xD7CB, 0xF962, 0xD7E4, 0xF963, 0xDBC5, + 0xF964, 0xDBE4, 0xF965, 0xDCA5, 0xF966, 0xDDA5, 0xF967, 0xDDD5, + 0xF968, 0xDDF4, 0xF969, 0xDEFC, 0xF96A, 0xDEFE, 0xF96B, 0xDFB3, + 0xF96C, 0xDFE1, 0xF96D, 0xDFE8, 0xF96E, 0xE0F1, 0xF96F, 0xE1AD, + 0xF970, 0xE1ED, 0xF971, 0xE3F5, 0xF972, 0xE4A1, 0xF973, 0xE4A9, + 0xF974, 0xE5AE, 0xF975, 0xE5B1, 0xF976, 0xE5B2, 0xF977, 0xE5B9, + 0xF978, 0xE5BB, 0xF979, 0xE5BC, 0xF97A, 0xE5C4, 0xF97B, 0xE5CE, + 0xF97C, 0xE5D0, 0xF97D, 0xE5D2, 0xF97E, 0xE5D6, 0xF97F, 0xE5FA, + 0xF980, 0xE5FB, 0xF981, 0xE5FC, 0xF982, 0xE5FE, 0xF983, 0xE6A1, + 0xF984, 0xE6A4, 0xF985, 0xE6A7, 0xF986, 0xE6AD, 0xF987, 0xE6AF, + 0xF988, 0xE6B0, 0xF989, 0xE6B1, 0xF98A, 0xE6B3, 0xF98B, 0xE6B7, + 0xF98C, 0xE6B8, 0xF98D, 0xE6BC, 0xF98E, 0xE6C4, 0xF98F, 0xE6C6, + 0xF990, 0xE6C7, 0xF991, 0xE6CA, 0xF992, 0xE6D2, 0xF993, 0xE6D6, + 0xF994, 0xE6D9, 0xF995, 0xE6DC, 0xF996, 0xE6DF, 0xF997, 0xE6E1, + 0xF998, 0xE6E4, 0xF999, 0xE6E5, 0xF99A, 0xE6E6, 0xF99B, 0xE6E8, + 0xF99C, 0xE6EA, 0xF99D, 0xE6EB, 0xF99E, 0xE6EC, 0xF99F, 0xE6EF, + 0xF9A0, 0xE6F1, 0xF9A1, 0xE6F2, 0xF9A2, 0xE6F5, 0xF9A3, 0xE6F6, + 0xF9A4, 0xE6F7, 0xF9A5, 0xE6F9, 0xF9A6, 0xE7A1, 0xF9A7, 0xE7A6, + 0xF9A8, 0xE7A9, 0xF9A9, 0xE7AA, 0xF9AA, 0xE7AC, 0xF9AB, 0xE7AD, + 0xF9AC, 0xE7B0, 0xF9AD, 0xE7BF, 0xF9AE, 0xE7C1, 0xF9AF, 0xE7C6, + 0xF9B0, 0xE7C7, 0xF9B1, 0xE7CB, 0xF9B2, 0xE7CD, 0xF9B3, 0xE7CF, + 0xF9B4, 0xE7D0, 0xF9B5, 0xE7D3, 0xF9B6, 0xE7DF, 0xF9B7, 0xE7E4, + 0xF9B8, 0xE7E6, 0xF9B9, 0xE7F7, 0xF9BA, 0xE8E7, 0xF9BB, 0xE8E8, + 0xF9BC, 0xE8F0, 0xF9BD, 0xE8F1, 0xF9BE, 0xE8F7, 0xF9BF, 0xE8F9, + 0xF9C0, 0xE8FB, 0xF9C1, 0xE8FE, 0xF9C2, 0xE9A7, 0xF9C3, 0xE9AC, + 0xF9C4, 0xE9CC, 0xF9C5, 0xE9F7, 0xF9C6, 0xEAC1, 0xF9C7, 0xEAE5, + 0xF9C8, 0xEAF4, 0xF9C9, 0xEAF7, 0xF9CA, 0xEAFC, 0xF9CB, 0xEAFE, + 0xF9CC, 0xEBA4, 0xF9CD, 0xEBA7, 0xF9CE, 0xEBA9, 0xF9CF, 0xEBAA, + 0xF9D0, 0xEBBA, 0xF9D1, 0xEBBB, 0xF9D2, 0xEBBD, 0xF9D3, 0xEBC1, + 0xF9D4, 0xEBC2, 0xF9D5, 0xEBC6, 0xF9D6, 0xEBC7, 0xF9D7, 0xEBCC, + 0xF9D8, 0xEBCF, 0xF9D9, 0xEBD0, 0xF9DA, 0xEBD1, 0xF9DB, 0xEBD2, + 0xF9DC, 0xEBD8, 0xF9DD, 0xECA6, 0xF9DE, 0xECA7, 0xF9DF, 0xECAA, + 0xF9E0, 0xECAF, 0xF9E1, 0xECB0, 0xF9E2, 0xECB1, 0xF9E3, 0xECB2, + 0xF9E4, 0xECB5, 0xF9E5, 0xECB8, 0xF9E6, 0xECBA, 0xF9E7, 0xECC0, + 0xF9E8, 0xECC1, 0xF9E9, 0xECC5, 0xF9EA, 0xECC6, 0xF9EB, 0xECC9, + 0xF9EC, 0xECCA, 0xF9ED, 0xECD5, 0xF9EE, 0xECDD, 0xF9EF, 0xECDE, + 0xF9F0, 0xECE1, 0xF9F1, 0xECE4, 0xF9F2, 0xECE7, 0xF9F3, 0xECE8, + 0xF9F4, 0xECF7, 0xF9F5, 0xECF8, 0xF9F6, 0xECFA, 0xF9F7, 0xEDA1, + 0xF9F8, 0xEDA2, 0xF9F9, 0xEDA3, 0xF9FA, 0xEDEE, 0xF9FB, 0xEEDB, + 0xF9FC, 0xF2BD, 0xF9FD, 0xF2FA, 0xF9FE, 0xF3B1, 0xF9FF, 0xF4A7, + 0xFA00, 0xF4EE, 0xFA01, 0xF6F4, 0xFA02, 0xF6F6, 0xFA03, 0xF7B8, + 0xFA04, 0xF7C8, 0xFA05, 0xF7D3, 0xFA06, 0xF8DB, 0xFA07, 0xF8F0, + 0xFA08, 0xFAA1, 0xFA09, 0xFAA2, 0xFA0A, 0xFAE6, 0xFA0B, 0xFCA9, + 0xFF01, 0xA3A1, 0xFF02, 0xA3A2, 0xFF03, 0xA3A3, 0xFF04, 0xA3A4, + 0xFF05, 0xA3A5, 0xFF06, 0xA3A6, 0xFF07, 0xA3A7, 0xFF08, 0xA3A8, + 0xFF09, 0xA3A9, 0xFF0A, 0xA3AA, 0xFF0B, 0xA3AB, 0xFF0C, 0xA3AC, + 0xFF0D, 0xA3AD, 0xFF0E, 0xA3AE, 0xFF0F, 0xA3AF, 0xFF10, 0xA3B0, + 0xFF11, 0xA3B1, 0xFF12, 0xA3B2, 0xFF13, 0xA3B3, 0xFF14, 0xA3B4, + 0xFF15, 0xA3B5, 0xFF16, 0xA3B6, 0xFF17, 0xA3B7, 0xFF18, 0xA3B8, + 0xFF19, 0xA3B9, 0xFF1A, 0xA3BA, 0xFF1B, 0xA3BB, 0xFF1C, 0xA3BC, + 0xFF1D, 0xA3BD, 0xFF1E, 0xA3BE, 0xFF1F, 0xA3BF, 0xFF20, 0xA3C0, + 0xFF21, 0xA3C1, 0xFF22, 0xA3C2, 0xFF23, 0xA3C3, 0xFF24, 0xA3C4, + 0xFF25, 0xA3C5, 0xFF26, 0xA3C6, 0xFF27, 0xA3C7, 0xFF28, 0xA3C8, + 0xFF29, 0xA3C9, 0xFF2A, 0xA3CA, 0xFF2B, 0xA3CB, 0xFF2C, 0xA3CC, + 0xFF2D, 0xA3CD, 0xFF2E, 0xA3CE, 0xFF2F, 0xA3CF, 0xFF30, 0xA3D0, + 0xFF31, 0xA3D1, 0xFF32, 0xA3D2, 0xFF33, 0xA3D3, 0xFF34, 0xA3D4, + 0xFF35, 0xA3D5, 0xFF36, 0xA3D6, 0xFF37, 0xA3D7, 0xFF38, 0xA3D8, + 0xFF39, 0xA3D9, 0xFF3A, 0xA3DA, 0xFF3B, 0xA3DB, 0xFF3C, 0xA1AC, + 0xFF3D, 0xA3DD, 0xFF3E, 0xA3DE, 0xFF3F, 0xA3DF, 0xFF40, 0xA3E0, + 0xFF41, 0xA3E1, 0xFF42, 0xA3E2, 0xFF43, 0xA3E3, 0xFF44, 0xA3E4, + 0xFF45, 0xA3E5, 0xFF46, 0xA3E6, 0xFF47, 0xA3E7, 0xFF48, 0xA3E8, + 0xFF49, 0xA3E9, 0xFF4A, 0xA3EA, 0xFF4B, 0xA3EB, 0xFF4C, 0xA3EC, + 0xFF4D, 0xA3ED, 0xFF4E, 0xA3EE, 0xFF4F, 0xA3EF, 0xFF50, 0xA3F0, + 0xFF51, 0xA3F1, 0xFF52, 0xA3F2, 0xFF53, 0xA3F3, 0xFF54, 0xA3F4, + 0xFF55, 0xA3F5, 0xFF56, 0xA3F6, 0xFF57, 0xA3F7, 0xFF58, 0xA3F8, + 0xFF59, 0xA3F9, 0xFF5A, 0xA3FA, 0xFF5B, 0xA3FB, 0xFF5C, 0xA3FC, + 0xFF5D, 0xA3FD, 0xFF5E, 0xA2A6, 0xFFE0, 0xA1CB, 0xFFE1, 0xA1CC, + 0xFFE2, 0xA1FE, 0xFFE3, 0xA3FE, 0xFFE5, 0xA1CD, 0xFFE6, 0xA3DC, + 0, 0 +}; + +static +const WCHAR oem2uni[] = { +/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ + 0x8141, 0xAC02, 0x8142, 0xAC03, 0x8143, 0xAC05, 0x8144, 0xAC06, + 0x8145, 0xAC0B, 0x8146, 0xAC0C, 0x8147, 0xAC0D, 0x8148, 0xAC0E, + 0x8149, 0xAC0F, 0x814A, 0xAC18, 0x814B, 0xAC1E, 0x814C, 0xAC1F, + 0x814D, 0xAC21, 0x814E, 0xAC22, 0x814F, 0xAC23, 0x8150, 0xAC25, + 0x8151, 0xAC26, 0x8152, 0xAC27, 0x8153, 0xAC28, 0x8154, 0xAC29, + 0x8155, 0xAC2A, 0x8156, 0xAC2B, 0x8157, 0xAC2E, 0x8158, 0xAC32, + 0x8159, 0xAC33, 0x815A, 0xAC34, 0x8161, 0xAC35, 0x8162, 0xAC36, + 0x8163, 0xAC37, 0x8164, 0xAC3A, 0x8165, 0xAC3B, 0x8166, 0xAC3D, + 0x8167, 0xAC3E, 0x8168, 0xAC3F, 0x8169, 0xAC41, 0x816A, 0xAC42, + 0x816B, 0xAC43, 0x816C, 0xAC44, 0x816D, 0xAC45, 0x816E, 0xAC46, + 0x816F, 0xAC47, 0x8170, 0xAC48, 0x8171, 0xAC49, 0x8172, 0xAC4A, + 0x8173, 0xAC4C, 0x8174, 0xAC4E, 0x8175, 0xAC4F, 0x8176, 0xAC50, + 0x8177, 0xAC51, 0x8178, 0xAC52, 0x8179, 0xAC53, 0x817A, 0xAC55, + 0x8181, 0xAC56, 0x8182, 0xAC57, 0x8183, 0xAC59, 0x8184, 0xAC5A, + 0x8185, 0xAC5B, 0x8186, 0xAC5D, 0x8187, 0xAC5E, 0x8188, 0xAC5F, + 0x8189, 0xAC60, 0x818A, 0xAC61, 0x818B, 0xAC62, 0x818C, 0xAC63, + 0x818D, 0xAC64, 0x818E, 0xAC65, 0x818F, 0xAC66, 0x8190, 0xAC67, + 0x8191, 0xAC68, 0x8192, 0xAC69, 0x8193, 0xAC6A, 0x8194, 0xAC6B, + 0x8195, 0xAC6C, 0x8196, 0xAC6D, 0x8197, 0xAC6E, 0x8198, 0xAC6F, + 0x8199, 0xAC72, 0x819A, 0xAC73, 0x819B, 0xAC75, 0x819C, 0xAC76, + 0x819D, 0xAC79, 0x819E, 0xAC7B, 0x819F, 0xAC7C, 0x81A0, 0xAC7D, + 0x81A1, 0xAC7E, 0x81A2, 0xAC7F, 0x81A3, 0xAC82, 0x81A4, 0xAC87, + 0x81A5, 0xAC88, 0x81A6, 0xAC8D, 0x81A7, 0xAC8E, 0x81A8, 0xAC8F, + 0x81A9, 0xAC91, 0x81AA, 0xAC92, 0x81AB, 0xAC93, 0x81AC, 0xAC95, + 0x81AD, 0xAC96, 0x81AE, 0xAC97, 0x81AF, 0xAC98, 0x81B0, 0xAC99, + 0x81B1, 0xAC9A, 0x81B2, 0xAC9B, 0x81B3, 0xAC9E, 0x81B4, 0xACA2, + 0x81B5, 0xACA3, 0x81B6, 0xACA4, 0x81B7, 0xACA5, 0x81B8, 0xACA6, + 0x81B9, 0xACA7, 0x81BA, 0xACAB, 0x81BB, 0xACAD, 0x81BC, 0xACAE, + 0x81BD, 0xACB1, 0x81BE, 0xACB2, 0x81BF, 0xACB3, 0x81C0, 0xACB4, + 0x81C1, 0xACB5, 0x81C2, 0xACB6, 0x81C3, 0xACB7, 0x81C4, 0xACBA, + 0x81C5, 0xACBE, 0x81C6, 0xACBF, 0x81C7, 0xACC0, 0x81C8, 0xACC2, + 0x81C9, 0xACC3, 0x81CA, 0xACC5, 0x81CB, 0xACC6, 0x81CC, 0xACC7, + 0x81CD, 0xACC9, 0x81CE, 0xACCA, 0x81CF, 0xACCB, 0x81D0, 0xACCD, + 0x81D1, 0xACCE, 0x81D2, 0xACCF, 0x81D3, 0xACD0, 0x81D4, 0xACD1, + 0x81D5, 0xACD2, 0x81D6, 0xACD3, 0x81D7, 0xACD4, 0x81D8, 0xACD6, + 0x81D9, 0xACD8, 0x81DA, 0xACD9, 0x81DB, 0xACDA, 0x81DC, 0xACDB, + 0x81DD, 0xACDC, 0x81DE, 0xACDD, 0x81DF, 0xACDE, 0x81E0, 0xACDF, + 0x81E1, 0xACE2, 0x81E2, 0xACE3, 0x81E3, 0xACE5, 0x81E4, 0xACE6, + 0x81E5, 0xACE9, 0x81E6, 0xACEB, 0x81E7, 0xACED, 0x81E8, 0xACEE, + 0x81E9, 0xACF2, 0x81EA, 0xACF4, 0x81EB, 0xACF7, 0x81EC, 0xACF8, + 0x81ED, 0xACF9, 0x81EE, 0xACFA, 0x81EF, 0xACFB, 0x81F0, 0xACFE, + 0x81F1, 0xACFF, 0x81F2, 0xAD01, 0x81F3, 0xAD02, 0x81F4, 0xAD03, + 0x81F5, 0xAD05, 0x81F6, 0xAD07, 0x81F7, 0xAD08, 0x81F8, 0xAD09, + 0x81F9, 0xAD0A, 0x81FA, 0xAD0B, 0x81FB, 0xAD0E, 0x81FC, 0xAD10, + 0x81FD, 0xAD12, 0x81FE, 0xAD13, 0x8241, 0xAD14, 0x8242, 0xAD15, + 0x8243, 0xAD16, 0x8244, 0xAD17, 0x8245, 0xAD19, 0x8246, 0xAD1A, + 0x8247, 0xAD1B, 0x8248, 0xAD1D, 0x8249, 0xAD1E, 0x824A, 0xAD1F, + 0x824B, 0xAD21, 0x824C, 0xAD22, 0x824D, 0xAD23, 0x824E, 0xAD24, + 0x824F, 0xAD25, 0x8250, 0xAD26, 0x8251, 0xAD27, 0x8252, 0xAD28, + 0x8253, 0xAD2A, 0x8254, 0xAD2B, 0x8255, 0xAD2E, 0x8256, 0xAD2F, + 0x8257, 0xAD30, 0x8258, 0xAD31, 0x8259, 0xAD32, 0x825A, 0xAD33, + 0x8261, 0xAD36, 0x8262, 0xAD37, 0x8263, 0xAD39, 0x8264, 0xAD3A, + 0x8265, 0xAD3B, 0x8266, 0xAD3D, 0x8267, 0xAD3E, 0x8268, 0xAD3F, + 0x8269, 0xAD40, 0x826A, 0xAD41, 0x826B, 0xAD42, 0x826C, 0xAD43, + 0x826D, 0xAD46, 0x826E, 0xAD48, 0x826F, 0xAD4A, 0x8270, 0xAD4B, + 0x8271, 0xAD4C, 0x8272, 0xAD4D, 0x8273, 0xAD4E, 0x8274, 0xAD4F, + 0x8275, 0xAD51, 0x8276, 0xAD52, 0x8277, 0xAD53, 0x8278, 0xAD55, + 0x8279, 0xAD56, 0x827A, 0xAD57, 0x8281, 0xAD59, 0x8282, 0xAD5A, + 0x8283, 0xAD5B, 0x8284, 0xAD5C, 0x8285, 0xAD5D, 0x8286, 0xAD5E, + 0x8287, 0xAD5F, 0x8288, 0xAD60, 0x8289, 0xAD62, 0x828A, 0xAD64, + 0x828B, 0xAD65, 0x828C, 0xAD66, 0x828D, 0xAD67, 0x828E, 0xAD68, + 0x828F, 0xAD69, 0x8290, 0xAD6A, 0x8291, 0xAD6B, 0x8292, 0xAD6E, + 0x8293, 0xAD6F, 0x8294, 0xAD71, 0x8295, 0xAD72, 0x8296, 0xAD77, + 0x8297, 0xAD78, 0x8298, 0xAD79, 0x8299, 0xAD7A, 0x829A, 0xAD7E, + 0x829B, 0xAD80, 0x829C, 0xAD83, 0x829D, 0xAD84, 0x829E, 0xAD85, + 0x829F, 0xAD86, 0x82A0, 0xAD87, 0x82A1, 0xAD8A, 0x82A2, 0xAD8B, + 0x82A3, 0xAD8D, 0x82A4, 0xAD8E, 0x82A5, 0xAD8F, 0x82A6, 0xAD91, + 0x82A7, 0xAD92, 0x82A8, 0xAD93, 0x82A9, 0xAD94, 0x82AA, 0xAD95, + 0x82AB, 0xAD96, 0x82AC, 0xAD97, 0x82AD, 0xAD98, 0x82AE, 0xAD99, + 0x82AF, 0xAD9A, 0x82B0, 0xAD9B, 0x82B1, 0xAD9E, 0x82B2, 0xAD9F, + 0x82B3, 0xADA0, 0x82B4, 0xADA1, 0x82B5, 0xADA2, 0x82B6, 0xADA3, + 0x82B7, 0xADA5, 0x82B8, 0xADA6, 0x82B9, 0xADA7, 0x82BA, 0xADA8, + 0x82BB, 0xADA9, 0x82BC, 0xADAA, 0x82BD, 0xADAB, 0x82BE, 0xADAC, + 0x82BF, 0xADAD, 0x82C0, 0xADAE, 0x82C1, 0xADAF, 0x82C2, 0xADB0, + 0x82C3, 0xADB1, 0x82C4, 0xADB2, 0x82C5, 0xADB3, 0x82C6, 0xADB4, + 0x82C7, 0xADB5, 0x82C8, 0xADB6, 0x82C9, 0xADB8, 0x82CA, 0xADB9, + 0x82CB, 0xADBA, 0x82CC, 0xADBB, 0x82CD, 0xADBC, 0x82CE, 0xADBD, + 0x82CF, 0xADBE, 0x82D0, 0xADBF, 0x82D1, 0xADC2, 0x82D2, 0xADC3, + 0x82D3, 0xADC5, 0x82D4, 0xADC6, 0x82D5, 0xADC7, 0x82D6, 0xADC9, + 0x82D7, 0xADCA, 0x82D8, 0xADCB, 0x82D9, 0xADCC, 0x82DA, 0xADCD, + 0x82DB, 0xADCE, 0x82DC, 0xADCF, 0x82DD, 0xADD2, 0x82DE, 0xADD4, + 0x82DF, 0xADD5, 0x82E0, 0xADD6, 0x82E1, 0xADD7, 0x82E2, 0xADD8, + 0x82E3, 0xADD9, 0x82E4, 0xADDA, 0x82E5, 0xADDB, 0x82E6, 0xADDD, + 0x82E7, 0xADDE, 0x82E8, 0xADDF, 0x82E9, 0xADE1, 0x82EA, 0xADE2, + 0x82EB, 0xADE3, 0x82EC, 0xADE5, 0x82ED, 0xADE6, 0x82EE, 0xADE7, + 0x82EF, 0xADE8, 0x82F0, 0xADE9, 0x82F1, 0xADEA, 0x82F2, 0xADEB, + 0x82F3, 0xADEC, 0x82F4, 0xADED, 0x82F5, 0xADEE, 0x82F6, 0xADEF, + 0x82F7, 0xADF0, 0x82F8, 0xADF1, 0x82F9, 0xADF2, 0x82FA, 0xADF3, + 0x82FB, 0xADF4, 0x82FC, 0xADF5, 0x82FD, 0xADF6, 0x82FE, 0xADF7, + 0x8341, 0xADFA, 0x8342, 0xADFB, 0x8343, 0xADFD, 0x8344, 0xADFE, + 0x8345, 0xAE02, 0x8346, 0xAE03, 0x8347, 0xAE04, 0x8348, 0xAE05, + 0x8349, 0xAE06, 0x834A, 0xAE07, 0x834B, 0xAE0A, 0x834C, 0xAE0C, + 0x834D, 0xAE0E, 0x834E, 0xAE0F, 0x834F, 0xAE10, 0x8350, 0xAE11, + 0x8351, 0xAE12, 0x8352, 0xAE13, 0x8353, 0xAE15, 0x8354, 0xAE16, + 0x8355, 0xAE17, 0x8356, 0xAE18, 0x8357, 0xAE19, 0x8358, 0xAE1A, + 0x8359, 0xAE1B, 0x835A, 0xAE1C, 0x8361, 0xAE1D, 0x8362, 0xAE1E, + 0x8363, 0xAE1F, 0x8364, 0xAE20, 0x8365, 0xAE21, 0x8366, 0xAE22, + 0x8367, 0xAE23, 0x8368, 0xAE24, 0x8369, 0xAE25, 0x836A, 0xAE26, + 0x836B, 0xAE27, 0x836C, 0xAE28, 0x836D, 0xAE29, 0x836E, 0xAE2A, + 0x836F, 0xAE2B, 0x8370, 0xAE2C, 0x8371, 0xAE2D, 0x8372, 0xAE2E, + 0x8373, 0xAE2F, 0x8374, 0xAE32, 0x8375, 0xAE33, 0x8376, 0xAE35, + 0x8377, 0xAE36, 0x8378, 0xAE39, 0x8379, 0xAE3B, 0x837A, 0xAE3C, + 0x8381, 0xAE3D, 0x8382, 0xAE3E, 0x8383, 0xAE3F, 0x8384, 0xAE42, + 0x8385, 0xAE44, 0x8386, 0xAE47, 0x8387, 0xAE48, 0x8388, 0xAE49, + 0x8389, 0xAE4B, 0x838A, 0xAE4F, 0x838B, 0xAE51, 0x838C, 0xAE52, + 0x838D, 0xAE53, 0x838E, 0xAE55, 0x838F, 0xAE57, 0x8390, 0xAE58, + 0x8391, 0xAE59, 0x8392, 0xAE5A, 0x8393, 0xAE5B, 0x8394, 0xAE5E, + 0x8395, 0xAE62, 0x8396, 0xAE63, 0x8397, 0xAE64, 0x8398, 0xAE66, + 0x8399, 0xAE67, 0x839A, 0xAE6A, 0x839B, 0xAE6B, 0x839C, 0xAE6D, + 0x839D, 0xAE6E, 0x839E, 0xAE6F, 0x839F, 0xAE71, 0x83A0, 0xAE72, + 0x83A1, 0xAE73, 0x83A2, 0xAE74, 0x83A3, 0xAE75, 0x83A4, 0xAE76, + 0x83A5, 0xAE77, 0x83A6, 0xAE7A, 0x83A7, 0xAE7E, 0x83A8, 0xAE7F, + 0x83A9, 0xAE80, 0x83AA, 0xAE81, 0x83AB, 0xAE82, 0x83AC, 0xAE83, + 0x83AD, 0xAE86, 0x83AE, 0xAE87, 0x83AF, 0xAE88, 0x83B0, 0xAE89, + 0x83B1, 0xAE8A, 0x83B2, 0xAE8B, 0x83B3, 0xAE8D, 0x83B4, 0xAE8E, + 0x83B5, 0xAE8F, 0x83B6, 0xAE90, 0x83B7, 0xAE91, 0x83B8, 0xAE92, + 0x83B9, 0xAE93, 0x83BA, 0xAE94, 0x83BB, 0xAE95, 0x83BC, 0xAE96, + 0x83BD, 0xAE97, 0x83BE, 0xAE98, 0x83BF, 0xAE99, 0x83C0, 0xAE9A, + 0x83C1, 0xAE9B, 0x83C2, 0xAE9C, 0x83C3, 0xAE9D, 0x83C4, 0xAE9E, + 0x83C5, 0xAE9F, 0x83C6, 0xAEA0, 0x83C7, 0xAEA1, 0x83C8, 0xAEA2, + 0x83C9, 0xAEA3, 0x83CA, 0xAEA4, 0x83CB, 0xAEA5, 0x83CC, 0xAEA6, + 0x83CD, 0xAEA7, 0x83CE, 0xAEA8, 0x83CF, 0xAEA9, 0x83D0, 0xAEAA, + 0x83D1, 0xAEAB, 0x83D2, 0xAEAC, 0x83D3, 0xAEAD, 0x83D4, 0xAEAE, + 0x83D5, 0xAEAF, 0x83D6, 0xAEB0, 0x83D7, 0xAEB1, 0x83D8, 0xAEB2, + 0x83D9, 0xAEB3, 0x83DA, 0xAEB4, 0x83DB, 0xAEB5, 0x83DC, 0xAEB6, + 0x83DD, 0xAEB7, 0x83DE, 0xAEB8, 0x83DF, 0xAEB9, 0x83E0, 0xAEBA, + 0x83E1, 0xAEBB, 0x83E2, 0xAEBF, 0x83E3, 0xAEC1, 0x83E4, 0xAEC2, + 0x83E5, 0xAEC3, 0x83E6, 0xAEC5, 0x83E7, 0xAEC6, 0x83E8, 0xAEC7, + 0x83E9, 0xAEC8, 0x83EA, 0xAEC9, 0x83EB, 0xAECA, 0x83EC, 0xAECB, + 0x83ED, 0xAECE, 0x83EE, 0xAED2, 0x83EF, 0xAED3, 0x83F0, 0xAED4, + 0x83F1, 0xAED5, 0x83F2, 0xAED6, 0x83F3, 0xAED7, 0x83F4, 0xAEDA, + 0x83F5, 0xAEDB, 0x83F6, 0xAEDD, 0x83F7, 0xAEDE, 0x83F8, 0xAEDF, + 0x83F9, 0xAEE0, 0x83FA, 0xAEE1, 0x83FB, 0xAEE2, 0x83FC, 0xAEE3, + 0x83FD, 0xAEE4, 0x83FE, 0xAEE5, 0x8441, 0xAEE6, 0x8442, 0xAEE7, + 0x8443, 0xAEE9, 0x8444, 0xAEEA, 0x8445, 0xAEEC, 0x8446, 0xAEEE, + 0x8447, 0xAEEF, 0x8448, 0xAEF0, 0x8449, 0xAEF1, 0x844A, 0xAEF2, + 0x844B, 0xAEF3, 0x844C, 0xAEF5, 0x844D, 0xAEF6, 0x844E, 0xAEF7, + 0x844F, 0xAEF9, 0x8450, 0xAEFA, 0x8451, 0xAEFB, 0x8452, 0xAEFD, + 0x8453, 0xAEFE, 0x8454, 0xAEFF, 0x8455, 0xAF00, 0x8456, 0xAF01, + 0x8457, 0xAF02, 0x8458, 0xAF03, 0x8459, 0xAF04, 0x845A, 0xAF05, + 0x8461, 0xAF06, 0x8462, 0xAF09, 0x8463, 0xAF0A, 0x8464, 0xAF0B, + 0x8465, 0xAF0C, 0x8466, 0xAF0E, 0x8467, 0xAF0F, 0x8468, 0xAF11, + 0x8469, 0xAF12, 0x846A, 0xAF13, 0x846B, 0xAF14, 0x846C, 0xAF15, + 0x846D, 0xAF16, 0x846E, 0xAF17, 0x846F, 0xAF18, 0x8470, 0xAF19, + 0x8471, 0xAF1A, 0x8472, 0xAF1B, 0x8473, 0xAF1C, 0x8474, 0xAF1D, + 0x8475, 0xAF1E, 0x8476, 0xAF1F, 0x8477, 0xAF20, 0x8478, 0xAF21, + 0x8479, 0xAF22, 0x847A, 0xAF23, 0x8481, 0xAF24, 0x8482, 0xAF25, + 0x8483, 0xAF26, 0x8484, 0xAF27, 0x8485, 0xAF28, 0x8486, 0xAF29, + 0x8487, 0xAF2A, 0x8488, 0xAF2B, 0x8489, 0xAF2E, 0x848A, 0xAF2F, + 0x848B, 0xAF31, 0x848C, 0xAF33, 0x848D, 0xAF35, 0x848E, 0xAF36, + 0x848F, 0xAF37, 0x8490, 0xAF38, 0x8491, 0xAF39, 0x8492, 0xAF3A, + 0x8493, 0xAF3B, 0x8494, 0xAF3E, 0x8495, 0xAF40, 0x8496, 0xAF44, + 0x8497, 0xAF45, 0x8498, 0xAF46, 0x8499, 0xAF47, 0x849A, 0xAF4A, + 0x849B, 0xAF4B, 0x849C, 0xAF4C, 0x849D, 0xAF4D, 0x849E, 0xAF4E, + 0x849F, 0xAF4F, 0x84A0, 0xAF51, 0x84A1, 0xAF52, 0x84A2, 0xAF53, + 0x84A3, 0xAF54, 0x84A4, 0xAF55, 0x84A5, 0xAF56, 0x84A6, 0xAF57, + 0x84A7, 0xAF58, 0x84A8, 0xAF59, 0x84A9, 0xAF5A, 0x84AA, 0xAF5B, + 0x84AB, 0xAF5E, 0x84AC, 0xAF5F, 0x84AD, 0xAF60, 0x84AE, 0xAF61, + 0x84AF, 0xAF62, 0x84B0, 0xAF63, 0x84B1, 0xAF66, 0x84B2, 0xAF67, + 0x84B3, 0xAF68, 0x84B4, 0xAF69, 0x84B5, 0xAF6A, 0x84B6, 0xAF6B, + 0x84B7, 0xAF6C, 0x84B8, 0xAF6D, 0x84B9, 0xAF6E, 0x84BA, 0xAF6F, + 0x84BB, 0xAF70, 0x84BC, 0xAF71, 0x84BD, 0xAF72, 0x84BE, 0xAF73, + 0x84BF, 0xAF74, 0x84C0, 0xAF75, 0x84C1, 0xAF76, 0x84C2, 0xAF77, + 0x84C3, 0xAF78, 0x84C4, 0xAF7A, 0x84C5, 0xAF7B, 0x84C6, 0xAF7C, + 0x84C7, 0xAF7D, 0x84C8, 0xAF7E, 0x84C9, 0xAF7F, 0x84CA, 0xAF81, + 0x84CB, 0xAF82, 0x84CC, 0xAF83, 0x84CD, 0xAF85, 0x84CE, 0xAF86, + 0x84CF, 0xAF87, 0x84D0, 0xAF89, 0x84D1, 0xAF8A, 0x84D2, 0xAF8B, + 0x84D3, 0xAF8C, 0x84D4, 0xAF8D, 0x84D5, 0xAF8E, 0x84D6, 0xAF8F, + 0x84D7, 0xAF92, 0x84D8, 0xAF93, 0x84D9, 0xAF94, 0x84DA, 0xAF96, + 0x84DB, 0xAF97, 0x84DC, 0xAF98, 0x84DD, 0xAF99, 0x84DE, 0xAF9A, + 0x84DF, 0xAF9B, 0x84E0, 0xAF9D, 0x84E1, 0xAF9E, 0x84E2, 0xAF9F, + 0x84E3, 0xAFA0, 0x84E4, 0xAFA1, 0x84E5, 0xAFA2, 0x84E6, 0xAFA3, + 0x84E7, 0xAFA4, 0x84E8, 0xAFA5, 0x84E9, 0xAFA6, 0x84EA, 0xAFA7, + 0x84EB, 0xAFA8, 0x84EC, 0xAFA9, 0x84ED, 0xAFAA, 0x84EE, 0xAFAB, + 0x84EF, 0xAFAC, 0x84F0, 0xAFAD, 0x84F1, 0xAFAE, 0x84F2, 0xAFAF, + 0x84F3, 0xAFB0, 0x84F4, 0xAFB1, 0x84F5, 0xAFB2, 0x84F6, 0xAFB3, + 0x84F7, 0xAFB4, 0x84F8, 0xAFB5, 0x84F9, 0xAFB6, 0x84FA, 0xAFB7, + 0x84FB, 0xAFBA, 0x84FC, 0xAFBB, 0x84FD, 0xAFBD, 0x84FE, 0xAFBE, + 0x8541, 0xAFBF, 0x8542, 0xAFC1, 0x8543, 0xAFC2, 0x8544, 0xAFC3, + 0x8545, 0xAFC4, 0x8546, 0xAFC5, 0x8547, 0xAFC6, 0x8548, 0xAFCA, + 0x8549, 0xAFCC, 0x854A, 0xAFCF, 0x854B, 0xAFD0, 0x854C, 0xAFD1, + 0x854D, 0xAFD2, 0x854E, 0xAFD3, 0x854F, 0xAFD5, 0x8550, 0xAFD6, + 0x8551, 0xAFD7, 0x8552, 0xAFD8, 0x8553, 0xAFD9, 0x8554, 0xAFDA, + 0x8555, 0xAFDB, 0x8556, 0xAFDD, 0x8557, 0xAFDE, 0x8558, 0xAFDF, + 0x8559, 0xAFE0, 0x855A, 0xAFE1, 0x8561, 0xAFE2, 0x8562, 0xAFE3, + 0x8563, 0xAFE4, 0x8564, 0xAFE5, 0x8565, 0xAFE6, 0x8566, 0xAFE7, + 0x8567, 0xAFEA, 0x8568, 0xAFEB, 0x8569, 0xAFEC, 0x856A, 0xAFED, + 0x856B, 0xAFEE, 0x856C, 0xAFEF, 0x856D, 0xAFF2, 0x856E, 0xAFF3, + 0x856F, 0xAFF5, 0x8570, 0xAFF6, 0x8571, 0xAFF7, 0x8572, 0xAFF9, + 0x8573, 0xAFFA, 0x8574, 0xAFFB, 0x8575, 0xAFFC, 0x8576, 0xAFFD, + 0x8577, 0xAFFE, 0x8578, 0xAFFF, 0x8579, 0xB002, 0x857A, 0xB003, + 0x8581, 0xB005, 0x8582, 0xB006, 0x8583, 0xB007, 0x8584, 0xB008, + 0x8585, 0xB009, 0x8586, 0xB00A, 0x8587, 0xB00B, 0x8588, 0xB00D, + 0x8589, 0xB00E, 0x858A, 0xB00F, 0x858B, 0xB011, 0x858C, 0xB012, + 0x858D, 0xB013, 0x858E, 0xB015, 0x858F, 0xB016, 0x8590, 0xB017, + 0x8591, 0xB018, 0x8592, 0xB019, 0x8593, 0xB01A, 0x8594, 0xB01B, + 0x8595, 0xB01E, 0x8596, 0xB01F, 0x8597, 0xB020, 0x8598, 0xB021, + 0x8599, 0xB022, 0x859A, 0xB023, 0x859B, 0xB024, 0x859C, 0xB025, + 0x859D, 0xB026, 0x859E, 0xB027, 0x859F, 0xB029, 0x85A0, 0xB02A, + 0x85A1, 0xB02B, 0x85A2, 0xB02C, 0x85A3, 0xB02D, 0x85A4, 0xB02E, + 0x85A5, 0xB02F, 0x85A6, 0xB030, 0x85A7, 0xB031, 0x85A8, 0xB032, + 0x85A9, 0xB033, 0x85AA, 0xB034, 0x85AB, 0xB035, 0x85AC, 0xB036, + 0x85AD, 0xB037, 0x85AE, 0xB038, 0x85AF, 0xB039, 0x85B0, 0xB03A, + 0x85B1, 0xB03B, 0x85B2, 0xB03C, 0x85B3, 0xB03D, 0x85B4, 0xB03E, + 0x85B5, 0xB03F, 0x85B6, 0xB040, 0x85B7, 0xB041, 0x85B8, 0xB042, + 0x85B9, 0xB043, 0x85BA, 0xB046, 0x85BB, 0xB047, 0x85BC, 0xB049, + 0x85BD, 0xB04B, 0x85BE, 0xB04D, 0x85BF, 0xB04F, 0x85C0, 0xB050, + 0x85C1, 0xB051, 0x85C2, 0xB052, 0x85C3, 0xB056, 0x85C4, 0xB058, + 0x85C5, 0xB05A, 0x85C6, 0xB05B, 0x85C7, 0xB05C, 0x85C8, 0xB05E, + 0x85C9, 0xB05F, 0x85CA, 0xB060, 0x85CB, 0xB061, 0x85CC, 0xB062, + 0x85CD, 0xB063, 0x85CE, 0xB064, 0x85CF, 0xB065, 0x85D0, 0xB066, + 0x85D1, 0xB067, 0x85D2, 0xB068, 0x85D3, 0xB069, 0x85D4, 0xB06A, + 0x85D5, 0xB06B, 0x85D6, 0xB06C, 0x85D7, 0xB06D, 0x85D8, 0xB06E, + 0x85D9, 0xB06F, 0x85DA, 0xB070, 0x85DB, 0xB071, 0x85DC, 0xB072, + 0x85DD, 0xB073, 0x85DE, 0xB074, 0x85DF, 0xB075, 0x85E0, 0xB076, + 0x85E1, 0xB077, 0x85E2, 0xB078, 0x85E3, 0xB079, 0x85E4, 0xB07A, + 0x85E5, 0xB07B, 0x85E6, 0xB07E, 0x85E7, 0xB07F, 0x85E8, 0xB081, + 0x85E9, 0xB082, 0x85EA, 0xB083, 0x85EB, 0xB085, 0x85EC, 0xB086, + 0x85ED, 0xB087, 0x85EE, 0xB088, 0x85EF, 0xB089, 0x85F0, 0xB08A, + 0x85F1, 0xB08B, 0x85F2, 0xB08E, 0x85F3, 0xB090, 0x85F4, 0xB092, + 0x85F5, 0xB093, 0x85F6, 0xB094, 0x85F7, 0xB095, 0x85F8, 0xB096, + 0x85F9, 0xB097, 0x85FA, 0xB09B, 0x85FB, 0xB09D, 0x85FC, 0xB09E, + 0x85FD, 0xB0A3, 0x85FE, 0xB0A4, 0x8641, 0xB0A5, 0x8642, 0xB0A6, + 0x8643, 0xB0A7, 0x8644, 0xB0AA, 0x8645, 0xB0B0, 0x8646, 0xB0B2, + 0x8647, 0xB0B6, 0x8648, 0xB0B7, 0x8649, 0xB0B9, 0x864A, 0xB0BA, + 0x864B, 0xB0BB, 0x864C, 0xB0BD, 0x864D, 0xB0BE, 0x864E, 0xB0BF, + 0x864F, 0xB0C0, 0x8650, 0xB0C1, 0x8651, 0xB0C2, 0x8652, 0xB0C3, + 0x8653, 0xB0C6, 0x8654, 0xB0CA, 0x8655, 0xB0CB, 0x8656, 0xB0CC, + 0x8657, 0xB0CD, 0x8658, 0xB0CE, 0x8659, 0xB0CF, 0x865A, 0xB0D2, + 0x8661, 0xB0D3, 0x8662, 0xB0D5, 0x8663, 0xB0D6, 0x8664, 0xB0D7, + 0x8665, 0xB0D9, 0x8666, 0xB0DA, 0x8667, 0xB0DB, 0x8668, 0xB0DC, + 0x8669, 0xB0DD, 0x866A, 0xB0DE, 0x866B, 0xB0DF, 0x866C, 0xB0E1, + 0x866D, 0xB0E2, 0x866E, 0xB0E3, 0x866F, 0xB0E4, 0x8670, 0xB0E6, + 0x8671, 0xB0E7, 0x8672, 0xB0E8, 0x8673, 0xB0E9, 0x8674, 0xB0EA, + 0x8675, 0xB0EB, 0x8676, 0xB0EC, 0x8677, 0xB0ED, 0x8678, 0xB0EE, + 0x8679, 0xB0EF, 0x867A, 0xB0F0, 0x8681, 0xB0F1, 0x8682, 0xB0F2, + 0x8683, 0xB0F3, 0x8684, 0xB0F4, 0x8685, 0xB0F5, 0x8686, 0xB0F6, + 0x8687, 0xB0F7, 0x8688, 0xB0F8, 0x8689, 0xB0F9, 0x868A, 0xB0FA, + 0x868B, 0xB0FB, 0x868C, 0xB0FC, 0x868D, 0xB0FD, 0x868E, 0xB0FE, + 0x868F, 0xB0FF, 0x8690, 0xB100, 0x8691, 0xB101, 0x8692, 0xB102, + 0x8693, 0xB103, 0x8694, 0xB104, 0x8695, 0xB105, 0x8696, 0xB106, + 0x8697, 0xB107, 0x8698, 0xB10A, 0x8699, 0xB10D, 0x869A, 0xB10E, + 0x869B, 0xB10F, 0x869C, 0xB111, 0x869D, 0xB114, 0x869E, 0xB115, + 0x869F, 0xB116, 0x86A0, 0xB117, 0x86A1, 0xB11A, 0x86A2, 0xB11E, + 0x86A3, 0xB11F, 0x86A4, 0xB120, 0x86A5, 0xB121, 0x86A6, 0xB122, + 0x86A7, 0xB126, 0x86A8, 0xB127, 0x86A9, 0xB129, 0x86AA, 0xB12A, + 0x86AB, 0xB12B, 0x86AC, 0xB12D, 0x86AD, 0xB12E, 0x86AE, 0xB12F, + 0x86AF, 0xB130, 0x86B0, 0xB131, 0x86B1, 0xB132, 0x86B2, 0xB133, + 0x86B3, 0xB136, 0x86B4, 0xB13A, 0x86B5, 0xB13B, 0x86B6, 0xB13C, + 0x86B7, 0xB13D, 0x86B8, 0xB13E, 0x86B9, 0xB13F, 0x86BA, 0xB142, + 0x86BB, 0xB143, 0x86BC, 0xB145, 0x86BD, 0xB146, 0x86BE, 0xB147, + 0x86BF, 0xB149, 0x86C0, 0xB14A, 0x86C1, 0xB14B, 0x86C2, 0xB14C, + 0x86C3, 0xB14D, 0x86C4, 0xB14E, 0x86C5, 0xB14F, 0x86C6, 0xB152, + 0x86C7, 0xB153, 0x86C8, 0xB156, 0x86C9, 0xB157, 0x86CA, 0xB159, + 0x86CB, 0xB15A, 0x86CC, 0xB15B, 0x86CD, 0xB15D, 0x86CE, 0xB15E, + 0x86CF, 0xB15F, 0x86D0, 0xB161, 0x86D1, 0xB162, 0x86D2, 0xB163, + 0x86D3, 0xB164, 0x86D4, 0xB165, 0x86D5, 0xB166, 0x86D6, 0xB167, + 0x86D7, 0xB168, 0x86D8, 0xB169, 0x86D9, 0xB16A, 0x86DA, 0xB16B, + 0x86DB, 0xB16C, 0x86DC, 0xB16D, 0x86DD, 0xB16E, 0x86DE, 0xB16F, + 0x86DF, 0xB170, 0x86E0, 0xB171, 0x86E1, 0xB172, 0x86E2, 0xB173, + 0x86E3, 0xB174, 0x86E4, 0xB175, 0x86E5, 0xB176, 0x86E6, 0xB177, + 0x86E7, 0xB17A, 0x86E8, 0xB17B, 0x86E9, 0xB17D, 0x86EA, 0xB17E, + 0x86EB, 0xB17F, 0x86EC, 0xB181, 0x86ED, 0xB183, 0x86EE, 0xB184, + 0x86EF, 0xB185, 0x86F0, 0xB186, 0x86F1, 0xB187, 0x86F2, 0xB18A, + 0x86F3, 0xB18C, 0x86F4, 0xB18E, 0x86F5, 0xB18F, 0x86F6, 0xB190, + 0x86F7, 0xB191, 0x86F8, 0xB195, 0x86F9, 0xB196, 0x86FA, 0xB197, + 0x86FB, 0xB199, 0x86FC, 0xB19A, 0x86FD, 0xB19B, 0x86FE, 0xB19D, + 0x8741, 0xB19E, 0x8742, 0xB19F, 0x8743, 0xB1A0, 0x8744, 0xB1A1, + 0x8745, 0xB1A2, 0x8746, 0xB1A3, 0x8747, 0xB1A4, 0x8748, 0xB1A5, + 0x8749, 0xB1A6, 0x874A, 0xB1A7, 0x874B, 0xB1A9, 0x874C, 0xB1AA, + 0x874D, 0xB1AB, 0x874E, 0xB1AC, 0x874F, 0xB1AD, 0x8750, 0xB1AE, + 0x8751, 0xB1AF, 0x8752, 0xB1B0, 0x8753, 0xB1B1, 0x8754, 0xB1B2, + 0x8755, 0xB1B3, 0x8756, 0xB1B4, 0x8757, 0xB1B5, 0x8758, 0xB1B6, + 0x8759, 0xB1B7, 0x875A, 0xB1B8, 0x8761, 0xB1B9, 0x8762, 0xB1BA, + 0x8763, 0xB1BB, 0x8764, 0xB1BC, 0x8765, 0xB1BD, 0x8766, 0xB1BE, + 0x8767, 0xB1BF, 0x8768, 0xB1C0, 0x8769, 0xB1C1, 0x876A, 0xB1C2, + 0x876B, 0xB1C3, 0x876C, 0xB1C4, 0x876D, 0xB1C5, 0x876E, 0xB1C6, + 0x876F, 0xB1C7, 0x8770, 0xB1C8, 0x8771, 0xB1C9, 0x8772, 0xB1CA, + 0x8773, 0xB1CB, 0x8774, 0xB1CD, 0x8775, 0xB1CE, 0x8776, 0xB1CF, + 0x8777, 0xB1D1, 0x8778, 0xB1D2, 0x8779, 0xB1D3, 0x877A, 0xB1D5, + 0x8781, 0xB1D6, 0x8782, 0xB1D7, 0x8783, 0xB1D8, 0x8784, 0xB1D9, + 0x8785, 0xB1DA, 0x8786, 0xB1DB, 0x8787, 0xB1DE, 0x8788, 0xB1E0, + 0x8789, 0xB1E1, 0x878A, 0xB1E2, 0x878B, 0xB1E3, 0x878C, 0xB1E4, + 0x878D, 0xB1E5, 0x878E, 0xB1E6, 0x878F, 0xB1E7, 0x8790, 0xB1EA, + 0x8791, 0xB1EB, 0x8792, 0xB1ED, 0x8793, 0xB1EE, 0x8794, 0xB1EF, + 0x8795, 0xB1F1, 0x8796, 0xB1F2, 0x8797, 0xB1F3, 0x8798, 0xB1F4, + 0x8799, 0xB1F5, 0x879A, 0xB1F6, 0x879B, 0xB1F7, 0x879C, 0xB1F8, + 0x879D, 0xB1FA, 0x879E, 0xB1FC, 0x879F, 0xB1FE, 0x87A0, 0xB1FF, + 0x87A1, 0xB200, 0x87A2, 0xB201, 0x87A3, 0xB202, 0x87A4, 0xB203, + 0x87A5, 0xB206, 0x87A6, 0xB207, 0x87A7, 0xB209, 0x87A8, 0xB20A, + 0x87A9, 0xB20D, 0x87AA, 0xB20E, 0x87AB, 0xB20F, 0x87AC, 0xB210, + 0x87AD, 0xB211, 0x87AE, 0xB212, 0x87AF, 0xB213, 0x87B0, 0xB216, + 0x87B1, 0xB218, 0x87B2, 0xB21A, 0x87B3, 0xB21B, 0x87B4, 0xB21C, + 0x87B5, 0xB21D, 0x87B6, 0xB21E, 0x87B7, 0xB21F, 0x87B8, 0xB221, + 0x87B9, 0xB222, 0x87BA, 0xB223, 0x87BB, 0xB224, 0x87BC, 0xB225, + 0x87BD, 0xB226, 0x87BE, 0xB227, 0x87BF, 0xB228, 0x87C0, 0xB229, + 0x87C1, 0xB22A, 0x87C2, 0xB22B, 0x87C3, 0xB22C, 0x87C4, 0xB22D, + 0x87C5, 0xB22E, 0x87C6, 0xB22F, 0x87C7, 0xB230, 0x87C8, 0xB231, + 0x87C9, 0xB232, 0x87CA, 0xB233, 0x87CB, 0xB235, 0x87CC, 0xB236, + 0x87CD, 0xB237, 0x87CE, 0xB238, 0x87CF, 0xB239, 0x87D0, 0xB23A, + 0x87D1, 0xB23B, 0x87D2, 0xB23D, 0x87D3, 0xB23E, 0x87D4, 0xB23F, + 0x87D5, 0xB240, 0x87D6, 0xB241, 0x87D7, 0xB242, 0x87D8, 0xB243, + 0x87D9, 0xB244, 0x87DA, 0xB245, 0x87DB, 0xB246, 0x87DC, 0xB247, + 0x87DD, 0xB248, 0x87DE, 0xB249, 0x87DF, 0xB24A, 0x87E0, 0xB24B, + 0x87E1, 0xB24C, 0x87E2, 0xB24D, 0x87E3, 0xB24E, 0x87E4, 0xB24F, + 0x87E5, 0xB250, 0x87E6, 0xB251, 0x87E7, 0xB252, 0x87E8, 0xB253, + 0x87E9, 0xB254, 0x87EA, 0xB255, 0x87EB, 0xB256, 0x87EC, 0xB257, + 0x87ED, 0xB259, 0x87EE, 0xB25A, 0x87EF, 0xB25B, 0x87F0, 0xB25D, + 0x87F1, 0xB25E, 0x87F2, 0xB25F, 0x87F3, 0xB261, 0x87F4, 0xB262, + 0x87F5, 0xB263, 0x87F6, 0xB264, 0x87F7, 0xB265, 0x87F8, 0xB266, + 0x87F9, 0xB267, 0x87FA, 0xB26A, 0x87FB, 0xB26B, 0x87FC, 0xB26C, + 0x87FD, 0xB26D, 0x87FE, 0xB26E, 0x8841, 0xB26F, 0x8842, 0xB270, + 0x8843, 0xB271, 0x8844, 0xB272, 0x8845, 0xB273, 0x8846, 0xB276, + 0x8847, 0xB277, 0x8848, 0xB278, 0x8849, 0xB279, 0x884A, 0xB27A, + 0x884B, 0xB27B, 0x884C, 0xB27D, 0x884D, 0xB27E, 0x884E, 0xB27F, + 0x884F, 0xB280, 0x8850, 0xB281, 0x8851, 0xB282, 0x8852, 0xB283, + 0x8853, 0xB286, 0x8854, 0xB287, 0x8855, 0xB288, 0x8856, 0xB28A, + 0x8857, 0xB28B, 0x8858, 0xB28C, 0x8859, 0xB28D, 0x885A, 0xB28E, + 0x8861, 0xB28F, 0x8862, 0xB292, 0x8863, 0xB293, 0x8864, 0xB295, + 0x8865, 0xB296, 0x8866, 0xB297, 0x8867, 0xB29B, 0x8868, 0xB29C, + 0x8869, 0xB29D, 0x886A, 0xB29E, 0x886B, 0xB29F, 0x886C, 0xB2A2, + 0x886D, 0xB2A4, 0x886E, 0xB2A7, 0x886F, 0xB2A8, 0x8870, 0xB2A9, + 0x8871, 0xB2AB, 0x8872, 0xB2AD, 0x8873, 0xB2AE, 0x8874, 0xB2AF, + 0x8875, 0xB2B1, 0x8876, 0xB2B2, 0x8877, 0xB2B3, 0x8878, 0xB2B5, + 0x8879, 0xB2B6, 0x887A, 0xB2B7, 0x8881, 0xB2B8, 0x8882, 0xB2B9, + 0x8883, 0xB2BA, 0x8884, 0xB2BB, 0x8885, 0xB2BC, 0x8886, 0xB2BD, + 0x8887, 0xB2BE, 0x8888, 0xB2BF, 0x8889, 0xB2C0, 0x888A, 0xB2C1, + 0x888B, 0xB2C2, 0x888C, 0xB2C3, 0x888D, 0xB2C4, 0x888E, 0xB2C5, + 0x888F, 0xB2C6, 0x8890, 0xB2C7, 0x8891, 0xB2CA, 0x8892, 0xB2CB, + 0x8893, 0xB2CD, 0x8894, 0xB2CE, 0x8895, 0xB2CF, 0x8896, 0xB2D1, + 0x8897, 0xB2D3, 0x8898, 0xB2D4, 0x8899, 0xB2D5, 0x889A, 0xB2D6, + 0x889B, 0xB2D7, 0x889C, 0xB2DA, 0x889D, 0xB2DC, 0x889E, 0xB2DE, + 0x889F, 0xB2DF, 0x88A0, 0xB2E0, 0x88A1, 0xB2E1, 0x88A2, 0xB2E3, + 0x88A3, 0xB2E7, 0x88A4, 0xB2E9, 0x88A5, 0xB2EA, 0x88A6, 0xB2F0, + 0x88A7, 0xB2F1, 0x88A8, 0xB2F2, 0x88A9, 0xB2F6, 0x88AA, 0xB2FC, + 0x88AB, 0xB2FD, 0x88AC, 0xB2FE, 0x88AD, 0xB302, 0x88AE, 0xB303, + 0x88AF, 0xB305, 0x88B0, 0xB306, 0x88B1, 0xB307, 0x88B2, 0xB309, + 0x88B3, 0xB30A, 0x88B4, 0xB30B, 0x88B5, 0xB30C, 0x88B6, 0xB30D, + 0x88B7, 0xB30E, 0x88B8, 0xB30F, 0x88B9, 0xB312, 0x88BA, 0xB316, + 0x88BB, 0xB317, 0x88BC, 0xB318, 0x88BD, 0xB319, 0x88BE, 0xB31A, + 0x88BF, 0xB31B, 0x88C0, 0xB31D, 0x88C1, 0xB31E, 0x88C2, 0xB31F, + 0x88C3, 0xB320, 0x88C4, 0xB321, 0x88C5, 0xB322, 0x88C6, 0xB323, + 0x88C7, 0xB324, 0x88C8, 0xB325, 0x88C9, 0xB326, 0x88CA, 0xB327, + 0x88CB, 0xB328, 0x88CC, 0xB329, 0x88CD, 0xB32A, 0x88CE, 0xB32B, + 0x88CF, 0xB32C, 0x88D0, 0xB32D, 0x88D1, 0xB32E, 0x88D2, 0xB32F, + 0x88D3, 0xB330, 0x88D4, 0xB331, 0x88D5, 0xB332, 0x88D6, 0xB333, + 0x88D7, 0xB334, 0x88D8, 0xB335, 0x88D9, 0xB336, 0x88DA, 0xB337, + 0x88DB, 0xB338, 0x88DC, 0xB339, 0x88DD, 0xB33A, 0x88DE, 0xB33B, + 0x88DF, 0xB33C, 0x88E0, 0xB33D, 0x88E1, 0xB33E, 0x88E2, 0xB33F, + 0x88E3, 0xB340, 0x88E4, 0xB341, 0x88E5, 0xB342, 0x88E6, 0xB343, + 0x88E7, 0xB344, 0x88E8, 0xB345, 0x88E9, 0xB346, 0x88EA, 0xB347, + 0x88EB, 0xB348, 0x88EC, 0xB349, 0x88ED, 0xB34A, 0x88EE, 0xB34B, + 0x88EF, 0xB34C, 0x88F0, 0xB34D, 0x88F1, 0xB34E, 0x88F2, 0xB34F, + 0x88F3, 0xB350, 0x88F4, 0xB351, 0x88F5, 0xB352, 0x88F6, 0xB353, + 0x88F7, 0xB357, 0x88F8, 0xB359, 0x88F9, 0xB35A, 0x88FA, 0xB35D, + 0x88FB, 0xB360, 0x88FC, 0xB361, 0x88FD, 0xB362, 0x88FE, 0xB363, + 0x8941, 0xB366, 0x8942, 0xB368, 0x8943, 0xB36A, 0x8944, 0xB36C, + 0x8945, 0xB36D, 0x8946, 0xB36F, 0x8947, 0xB372, 0x8948, 0xB373, + 0x8949, 0xB375, 0x894A, 0xB376, 0x894B, 0xB377, 0x894C, 0xB379, + 0x894D, 0xB37A, 0x894E, 0xB37B, 0x894F, 0xB37C, 0x8950, 0xB37D, + 0x8951, 0xB37E, 0x8952, 0xB37F, 0x8953, 0xB382, 0x8954, 0xB386, + 0x8955, 0xB387, 0x8956, 0xB388, 0x8957, 0xB389, 0x8958, 0xB38A, + 0x8959, 0xB38B, 0x895A, 0xB38D, 0x8961, 0xB38E, 0x8962, 0xB38F, + 0x8963, 0xB391, 0x8964, 0xB392, 0x8965, 0xB393, 0x8966, 0xB395, + 0x8967, 0xB396, 0x8968, 0xB397, 0x8969, 0xB398, 0x896A, 0xB399, + 0x896B, 0xB39A, 0x896C, 0xB39B, 0x896D, 0xB39C, 0x896E, 0xB39D, + 0x896F, 0xB39E, 0x8970, 0xB39F, 0x8971, 0xB3A2, 0x8972, 0xB3A3, + 0x8973, 0xB3A4, 0x8974, 0xB3A5, 0x8975, 0xB3A6, 0x8976, 0xB3A7, + 0x8977, 0xB3A9, 0x8978, 0xB3AA, 0x8979, 0xB3AB, 0x897A, 0xB3AD, + 0x8981, 0xB3AE, 0x8982, 0xB3AF, 0x8983, 0xB3B0, 0x8984, 0xB3B1, + 0x8985, 0xB3B2, 0x8986, 0xB3B3, 0x8987, 0xB3B4, 0x8988, 0xB3B5, + 0x8989, 0xB3B6, 0x898A, 0xB3B7, 0x898B, 0xB3B8, 0x898C, 0xB3B9, + 0x898D, 0xB3BA, 0x898E, 0xB3BB, 0x898F, 0xB3BC, 0x8990, 0xB3BD, + 0x8991, 0xB3BE, 0x8992, 0xB3BF, 0x8993, 0xB3C0, 0x8994, 0xB3C1, + 0x8995, 0xB3C2, 0x8996, 0xB3C3, 0x8997, 0xB3C6, 0x8998, 0xB3C7, + 0x8999, 0xB3C9, 0x899A, 0xB3CA, 0x899B, 0xB3CD, 0x899C, 0xB3CF, + 0x899D, 0xB3D1, 0x899E, 0xB3D2, 0x899F, 0xB3D3, 0x89A0, 0xB3D6, + 0x89A1, 0xB3D8, 0x89A2, 0xB3DA, 0x89A3, 0xB3DC, 0x89A4, 0xB3DE, + 0x89A5, 0xB3DF, 0x89A6, 0xB3E1, 0x89A7, 0xB3E2, 0x89A8, 0xB3E3, + 0x89A9, 0xB3E5, 0x89AA, 0xB3E6, 0x89AB, 0xB3E7, 0x89AC, 0xB3E9, + 0x89AD, 0xB3EA, 0x89AE, 0xB3EB, 0x89AF, 0xB3EC, 0x89B0, 0xB3ED, + 0x89B1, 0xB3EE, 0x89B2, 0xB3EF, 0x89B3, 0xB3F0, 0x89B4, 0xB3F1, + 0x89B5, 0xB3F2, 0x89B6, 0xB3F3, 0x89B7, 0xB3F4, 0x89B8, 0xB3F5, + 0x89B9, 0xB3F6, 0x89BA, 0xB3F7, 0x89BB, 0xB3F8, 0x89BC, 0xB3F9, + 0x89BD, 0xB3FA, 0x89BE, 0xB3FB, 0x89BF, 0xB3FD, 0x89C0, 0xB3FE, + 0x89C1, 0xB3FF, 0x89C2, 0xB400, 0x89C3, 0xB401, 0x89C4, 0xB402, + 0x89C5, 0xB403, 0x89C6, 0xB404, 0x89C7, 0xB405, 0x89C8, 0xB406, + 0x89C9, 0xB407, 0x89CA, 0xB408, 0x89CB, 0xB409, 0x89CC, 0xB40A, + 0x89CD, 0xB40B, 0x89CE, 0xB40C, 0x89CF, 0xB40D, 0x89D0, 0xB40E, + 0x89D1, 0xB40F, 0x89D2, 0xB411, 0x89D3, 0xB412, 0x89D4, 0xB413, + 0x89D5, 0xB414, 0x89D6, 0xB415, 0x89D7, 0xB416, 0x89D8, 0xB417, + 0x89D9, 0xB419, 0x89DA, 0xB41A, 0x89DB, 0xB41B, 0x89DC, 0xB41D, + 0x89DD, 0xB41E, 0x89DE, 0xB41F, 0x89DF, 0xB421, 0x89E0, 0xB422, + 0x89E1, 0xB423, 0x89E2, 0xB424, 0x89E3, 0xB425, 0x89E4, 0xB426, + 0x89E5, 0xB427, 0x89E6, 0xB42A, 0x89E7, 0xB42C, 0x89E8, 0xB42D, + 0x89E9, 0xB42E, 0x89EA, 0xB42F, 0x89EB, 0xB430, 0x89EC, 0xB431, + 0x89ED, 0xB432, 0x89EE, 0xB433, 0x89EF, 0xB435, 0x89F0, 0xB436, + 0x89F1, 0xB437, 0x89F2, 0xB438, 0x89F3, 0xB439, 0x89F4, 0xB43A, + 0x89F5, 0xB43B, 0x89F6, 0xB43C, 0x89F7, 0xB43D, 0x89F8, 0xB43E, + 0x89F9, 0xB43F, 0x89FA, 0xB440, 0x89FB, 0xB441, 0x89FC, 0xB442, + 0x89FD, 0xB443, 0x89FE, 0xB444, 0x8A41, 0xB445, 0x8A42, 0xB446, + 0x8A43, 0xB447, 0x8A44, 0xB448, 0x8A45, 0xB449, 0x8A46, 0xB44A, + 0x8A47, 0xB44B, 0x8A48, 0xB44C, 0x8A49, 0xB44D, 0x8A4A, 0xB44E, + 0x8A4B, 0xB44F, 0x8A4C, 0xB452, 0x8A4D, 0xB453, 0x8A4E, 0xB455, + 0x8A4F, 0xB456, 0x8A50, 0xB457, 0x8A51, 0xB459, 0x8A52, 0xB45A, + 0x8A53, 0xB45B, 0x8A54, 0xB45C, 0x8A55, 0xB45D, 0x8A56, 0xB45E, + 0x8A57, 0xB45F, 0x8A58, 0xB462, 0x8A59, 0xB464, 0x8A5A, 0xB466, + 0x8A61, 0xB467, 0x8A62, 0xB468, 0x8A63, 0xB469, 0x8A64, 0xB46A, + 0x8A65, 0xB46B, 0x8A66, 0xB46D, 0x8A67, 0xB46E, 0x8A68, 0xB46F, + 0x8A69, 0xB470, 0x8A6A, 0xB471, 0x8A6B, 0xB472, 0x8A6C, 0xB473, + 0x8A6D, 0xB474, 0x8A6E, 0xB475, 0x8A6F, 0xB476, 0x8A70, 0xB477, + 0x8A71, 0xB478, 0x8A72, 0xB479, 0x8A73, 0xB47A, 0x8A74, 0xB47B, + 0x8A75, 0xB47C, 0x8A76, 0xB47D, 0x8A77, 0xB47E, 0x8A78, 0xB47F, + 0x8A79, 0xB481, 0x8A7A, 0xB482, 0x8A81, 0xB483, 0x8A82, 0xB484, + 0x8A83, 0xB485, 0x8A84, 0xB486, 0x8A85, 0xB487, 0x8A86, 0xB489, + 0x8A87, 0xB48A, 0x8A88, 0xB48B, 0x8A89, 0xB48C, 0x8A8A, 0xB48D, + 0x8A8B, 0xB48E, 0x8A8C, 0xB48F, 0x8A8D, 0xB490, 0x8A8E, 0xB491, + 0x8A8F, 0xB492, 0x8A90, 0xB493, 0x8A91, 0xB494, 0x8A92, 0xB495, + 0x8A93, 0xB496, 0x8A94, 0xB497, 0x8A95, 0xB498, 0x8A96, 0xB499, + 0x8A97, 0xB49A, 0x8A98, 0xB49B, 0x8A99, 0xB49C, 0x8A9A, 0xB49E, + 0x8A9B, 0xB49F, 0x8A9C, 0xB4A0, 0x8A9D, 0xB4A1, 0x8A9E, 0xB4A2, + 0x8A9F, 0xB4A3, 0x8AA0, 0xB4A5, 0x8AA1, 0xB4A6, 0x8AA2, 0xB4A7, + 0x8AA3, 0xB4A9, 0x8AA4, 0xB4AA, 0x8AA5, 0xB4AB, 0x8AA6, 0xB4AD, + 0x8AA7, 0xB4AE, 0x8AA8, 0xB4AF, 0x8AA9, 0xB4B0, 0x8AAA, 0xB4B1, + 0x8AAB, 0xB4B2, 0x8AAC, 0xB4B3, 0x8AAD, 0xB4B4, 0x8AAE, 0xB4B6, + 0x8AAF, 0xB4B8, 0x8AB0, 0xB4BA, 0x8AB1, 0xB4BB, 0x8AB2, 0xB4BC, + 0x8AB3, 0xB4BD, 0x8AB4, 0xB4BE, 0x8AB5, 0xB4BF, 0x8AB6, 0xB4C1, + 0x8AB7, 0xB4C2, 0x8AB8, 0xB4C3, 0x8AB9, 0xB4C5, 0x8ABA, 0xB4C6, + 0x8ABB, 0xB4C7, 0x8ABC, 0xB4C9, 0x8ABD, 0xB4CA, 0x8ABE, 0xB4CB, + 0x8ABF, 0xB4CC, 0x8AC0, 0xB4CD, 0x8AC1, 0xB4CE, 0x8AC2, 0xB4CF, + 0x8AC3, 0xB4D1, 0x8AC4, 0xB4D2, 0x8AC5, 0xB4D3, 0x8AC6, 0xB4D4, + 0x8AC7, 0xB4D6, 0x8AC8, 0xB4D7, 0x8AC9, 0xB4D8, 0x8ACA, 0xB4D9, + 0x8ACB, 0xB4DA, 0x8ACC, 0xB4DB, 0x8ACD, 0xB4DE, 0x8ACE, 0xB4DF, + 0x8ACF, 0xB4E1, 0x8AD0, 0xB4E2, 0x8AD1, 0xB4E5, 0x8AD2, 0xB4E7, + 0x8AD3, 0xB4E8, 0x8AD4, 0xB4E9, 0x8AD5, 0xB4EA, 0x8AD6, 0xB4EB, + 0x8AD7, 0xB4EE, 0x8AD8, 0xB4F0, 0x8AD9, 0xB4F2, 0x8ADA, 0xB4F3, + 0x8ADB, 0xB4F4, 0x8ADC, 0xB4F5, 0x8ADD, 0xB4F6, 0x8ADE, 0xB4F7, + 0x8ADF, 0xB4F9, 0x8AE0, 0xB4FA, 0x8AE1, 0xB4FB, 0x8AE2, 0xB4FC, + 0x8AE3, 0xB4FD, 0x8AE4, 0xB4FE, 0x8AE5, 0xB4FF, 0x8AE6, 0xB500, + 0x8AE7, 0xB501, 0x8AE8, 0xB502, 0x8AE9, 0xB503, 0x8AEA, 0xB504, + 0x8AEB, 0xB505, 0x8AEC, 0xB506, 0x8AED, 0xB507, 0x8AEE, 0xB508, + 0x8AEF, 0xB509, 0x8AF0, 0xB50A, 0x8AF1, 0xB50B, 0x8AF2, 0xB50C, + 0x8AF3, 0xB50D, 0x8AF4, 0xB50E, 0x8AF5, 0xB50F, 0x8AF6, 0xB510, + 0x8AF7, 0xB511, 0x8AF8, 0xB512, 0x8AF9, 0xB513, 0x8AFA, 0xB516, + 0x8AFB, 0xB517, 0x8AFC, 0xB519, 0x8AFD, 0xB51A, 0x8AFE, 0xB51D, + 0x8B41, 0xB51E, 0x8B42, 0xB51F, 0x8B43, 0xB520, 0x8B44, 0xB521, + 0x8B45, 0xB522, 0x8B46, 0xB523, 0x8B47, 0xB526, 0x8B48, 0xB52B, + 0x8B49, 0xB52C, 0x8B4A, 0xB52D, 0x8B4B, 0xB52E, 0x8B4C, 0xB52F, + 0x8B4D, 0xB532, 0x8B4E, 0xB533, 0x8B4F, 0xB535, 0x8B50, 0xB536, + 0x8B51, 0xB537, 0x8B52, 0xB539, 0x8B53, 0xB53A, 0x8B54, 0xB53B, + 0x8B55, 0xB53C, 0x8B56, 0xB53D, 0x8B57, 0xB53E, 0x8B58, 0xB53F, + 0x8B59, 0xB542, 0x8B5A, 0xB546, 0x8B61, 0xB547, 0x8B62, 0xB548, + 0x8B63, 0xB549, 0x8B64, 0xB54A, 0x8B65, 0xB54E, 0x8B66, 0xB54F, + 0x8B67, 0xB551, 0x8B68, 0xB552, 0x8B69, 0xB553, 0x8B6A, 0xB555, + 0x8B6B, 0xB556, 0x8B6C, 0xB557, 0x8B6D, 0xB558, 0x8B6E, 0xB559, + 0x8B6F, 0xB55A, 0x8B70, 0xB55B, 0x8B71, 0xB55E, 0x8B72, 0xB562, + 0x8B73, 0xB563, 0x8B74, 0xB564, 0x8B75, 0xB565, 0x8B76, 0xB566, + 0x8B77, 0xB567, 0x8B78, 0xB568, 0x8B79, 0xB569, 0x8B7A, 0xB56A, + 0x8B81, 0xB56B, 0x8B82, 0xB56C, 0x8B83, 0xB56D, 0x8B84, 0xB56E, + 0x8B85, 0xB56F, 0x8B86, 0xB570, 0x8B87, 0xB571, 0x8B88, 0xB572, + 0x8B89, 0xB573, 0x8B8A, 0xB574, 0x8B8B, 0xB575, 0x8B8C, 0xB576, + 0x8B8D, 0xB577, 0x8B8E, 0xB578, 0x8B8F, 0xB579, 0x8B90, 0xB57A, + 0x8B91, 0xB57B, 0x8B92, 0xB57C, 0x8B93, 0xB57D, 0x8B94, 0xB57E, + 0x8B95, 0xB57F, 0x8B96, 0xB580, 0x8B97, 0xB581, 0x8B98, 0xB582, + 0x8B99, 0xB583, 0x8B9A, 0xB584, 0x8B9B, 0xB585, 0x8B9C, 0xB586, + 0x8B9D, 0xB587, 0x8B9E, 0xB588, 0x8B9F, 0xB589, 0x8BA0, 0xB58A, + 0x8BA1, 0xB58B, 0x8BA2, 0xB58C, 0x8BA3, 0xB58D, 0x8BA4, 0xB58E, + 0x8BA5, 0xB58F, 0x8BA6, 0xB590, 0x8BA7, 0xB591, 0x8BA8, 0xB592, + 0x8BA9, 0xB593, 0x8BAA, 0xB594, 0x8BAB, 0xB595, 0x8BAC, 0xB596, + 0x8BAD, 0xB597, 0x8BAE, 0xB598, 0x8BAF, 0xB599, 0x8BB0, 0xB59A, + 0x8BB1, 0xB59B, 0x8BB2, 0xB59C, 0x8BB3, 0xB59D, 0x8BB4, 0xB59E, + 0x8BB5, 0xB59F, 0x8BB6, 0xB5A2, 0x8BB7, 0xB5A3, 0x8BB8, 0xB5A5, + 0x8BB9, 0xB5A6, 0x8BBA, 0xB5A7, 0x8BBB, 0xB5A9, 0x8BBC, 0xB5AC, + 0x8BBD, 0xB5AD, 0x8BBE, 0xB5AE, 0x8BBF, 0xB5AF, 0x8BC0, 0xB5B2, + 0x8BC1, 0xB5B6, 0x8BC2, 0xB5B7, 0x8BC3, 0xB5B8, 0x8BC4, 0xB5B9, + 0x8BC5, 0xB5BA, 0x8BC6, 0xB5BE, 0x8BC7, 0xB5BF, 0x8BC8, 0xB5C1, + 0x8BC9, 0xB5C2, 0x8BCA, 0xB5C3, 0x8BCB, 0xB5C5, 0x8BCC, 0xB5C6, + 0x8BCD, 0xB5C7, 0x8BCE, 0xB5C8, 0x8BCF, 0xB5C9, 0x8BD0, 0xB5CA, + 0x8BD1, 0xB5CB, 0x8BD2, 0xB5CE, 0x8BD3, 0xB5D2, 0x8BD4, 0xB5D3, + 0x8BD5, 0xB5D4, 0x8BD6, 0xB5D5, 0x8BD7, 0xB5D6, 0x8BD8, 0xB5D7, + 0x8BD9, 0xB5D9, 0x8BDA, 0xB5DA, 0x8BDB, 0xB5DB, 0x8BDC, 0xB5DC, + 0x8BDD, 0xB5DD, 0x8BDE, 0xB5DE, 0x8BDF, 0xB5DF, 0x8BE0, 0xB5E0, + 0x8BE1, 0xB5E1, 0x8BE2, 0xB5E2, 0x8BE3, 0xB5E3, 0x8BE4, 0xB5E4, + 0x8BE5, 0xB5E5, 0x8BE6, 0xB5E6, 0x8BE7, 0xB5E7, 0x8BE8, 0xB5E8, + 0x8BE9, 0xB5E9, 0x8BEA, 0xB5EA, 0x8BEB, 0xB5EB, 0x8BEC, 0xB5ED, + 0x8BED, 0xB5EE, 0x8BEE, 0xB5EF, 0x8BEF, 0xB5F0, 0x8BF0, 0xB5F1, + 0x8BF1, 0xB5F2, 0x8BF2, 0xB5F3, 0x8BF3, 0xB5F4, 0x8BF4, 0xB5F5, + 0x8BF5, 0xB5F6, 0x8BF6, 0xB5F7, 0x8BF7, 0xB5F8, 0x8BF8, 0xB5F9, + 0x8BF9, 0xB5FA, 0x8BFA, 0xB5FB, 0x8BFB, 0xB5FC, 0x8BFC, 0xB5FD, + 0x8BFD, 0xB5FE, 0x8BFE, 0xB5FF, 0x8C41, 0xB600, 0x8C42, 0xB601, + 0x8C43, 0xB602, 0x8C44, 0xB603, 0x8C45, 0xB604, 0x8C46, 0xB605, + 0x8C47, 0xB606, 0x8C48, 0xB607, 0x8C49, 0xB608, 0x8C4A, 0xB609, + 0x8C4B, 0xB60A, 0x8C4C, 0xB60B, 0x8C4D, 0xB60C, 0x8C4E, 0xB60D, + 0x8C4F, 0xB60E, 0x8C50, 0xB60F, 0x8C51, 0xB612, 0x8C52, 0xB613, + 0x8C53, 0xB615, 0x8C54, 0xB616, 0x8C55, 0xB617, 0x8C56, 0xB619, + 0x8C57, 0xB61A, 0x8C58, 0xB61B, 0x8C59, 0xB61C, 0x8C5A, 0xB61D, + 0x8C61, 0xB61E, 0x8C62, 0xB61F, 0x8C63, 0xB620, 0x8C64, 0xB621, + 0x8C65, 0xB622, 0x8C66, 0xB623, 0x8C67, 0xB624, 0x8C68, 0xB626, + 0x8C69, 0xB627, 0x8C6A, 0xB628, 0x8C6B, 0xB629, 0x8C6C, 0xB62A, + 0x8C6D, 0xB62B, 0x8C6E, 0xB62D, 0x8C6F, 0xB62E, 0x8C70, 0xB62F, + 0x8C71, 0xB630, 0x8C72, 0xB631, 0x8C73, 0xB632, 0x8C74, 0xB633, + 0x8C75, 0xB635, 0x8C76, 0xB636, 0x8C77, 0xB637, 0x8C78, 0xB638, + 0x8C79, 0xB639, 0x8C7A, 0xB63A, 0x8C81, 0xB63B, 0x8C82, 0xB63C, + 0x8C83, 0xB63D, 0x8C84, 0xB63E, 0x8C85, 0xB63F, 0x8C86, 0xB640, + 0x8C87, 0xB641, 0x8C88, 0xB642, 0x8C89, 0xB643, 0x8C8A, 0xB644, + 0x8C8B, 0xB645, 0x8C8C, 0xB646, 0x8C8D, 0xB647, 0x8C8E, 0xB649, + 0x8C8F, 0xB64A, 0x8C90, 0xB64B, 0x8C91, 0xB64C, 0x8C92, 0xB64D, + 0x8C93, 0xB64E, 0x8C94, 0xB64F, 0x8C95, 0xB650, 0x8C96, 0xB651, + 0x8C97, 0xB652, 0x8C98, 0xB653, 0x8C99, 0xB654, 0x8C9A, 0xB655, + 0x8C9B, 0xB656, 0x8C9C, 0xB657, 0x8C9D, 0xB658, 0x8C9E, 0xB659, + 0x8C9F, 0xB65A, 0x8CA0, 0xB65B, 0x8CA1, 0xB65C, 0x8CA2, 0xB65D, + 0x8CA3, 0xB65E, 0x8CA4, 0xB65F, 0x8CA5, 0xB660, 0x8CA6, 0xB661, + 0x8CA7, 0xB662, 0x8CA8, 0xB663, 0x8CA9, 0xB665, 0x8CAA, 0xB666, + 0x8CAB, 0xB667, 0x8CAC, 0xB669, 0x8CAD, 0xB66A, 0x8CAE, 0xB66B, + 0x8CAF, 0xB66C, 0x8CB0, 0xB66D, 0x8CB1, 0xB66E, 0x8CB2, 0xB66F, + 0x8CB3, 0xB670, 0x8CB4, 0xB671, 0x8CB5, 0xB672, 0x8CB6, 0xB673, + 0x8CB7, 0xB674, 0x8CB8, 0xB675, 0x8CB9, 0xB676, 0x8CBA, 0xB677, + 0x8CBB, 0xB678, 0x8CBC, 0xB679, 0x8CBD, 0xB67A, 0x8CBE, 0xB67B, + 0x8CBF, 0xB67C, 0x8CC0, 0xB67D, 0x8CC1, 0xB67E, 0x8CC2, 0xB67F, + 0x8CC3, 0xB680, 0x8CC4, 0xB681, 0x8CC5, 0xB682, 0x8CC6, 0xB683, + 0x8CC7, 0xB684, 0x8CC8, 0xB685, 0x8CC9, 0xB686, 0x8CCA, 0xB687, + 0x8CCB, 0xB688, 0x8CCC, 0xB689, 0x8CCD, 0xB68A, 0x8CCE, 0xB68B, + 0x8CCF, 0xB68C, 0x8CD0, 0xB68D, 0x8CD1, 0xB68E, 0x8CD2, 0xB68F, + 0x8CD3, 0xB690, 0x8CD4, 0xB691, 0x8CD5, 0xB692, 0x8CD6, 0xB693, + 0x8CD7, 0xB694, 0x8CD8, 0xB695, 0x8CD9, 0xB696, 0x8CDA, 0xB697, + 0x8CDB, 0xB698, 0x8CDC, 0xB699, 0x8CDD, 0xB69A, 0x8CDE, 0xB69B, + 0x8CDF, 0xB69E, 0x8CE0, 0xB69F, 0x8CE1, 0xB6A1, 0x8CE2, 0xB6A2, + 0x8CE3, 0xB6A3, 0x8CE4, 0xB6A5, 0x8CE5, 0xB6A6, 0x8CE6, 0xB6A7, + 0x8CE7, 0xB6A8, 0x8CE8, 0xB6A9, 0x8CE9, 0xB6AA, 0x8CEA, 0xB6AD, + 0x8CEB, 0xB6AE, 0x8CEC, 0xB6AF, 0x8CED, 0xB6B0, 0x8CEE, 0xB6B2, + 0x8CEF, 0xB6B3, 0x8CF0, 0xB6B4, 0x8CF1, 0xB6B5, 0x8CF2, 0xB6B6, + 0x8CF3, 0xB6B7, 0x8CF4, 0xB6B8, 0x8CF5, 0xB6B9, 0x8CF6, 0xB6BA, + 0x8CF7, 0xB6BB, 0x8CF8, 0xB6BC, 0x8CF9, 0xB6BD, 0x8CFA, 0xB6BE, + 0x8CFB, 0xB6BF, 0x8CFC, 0xB6C0, 0x8CFD, 0xB6C1, 0x8CFE, 0xB6C2, + 0x8D41, 0xB6C3, 0x8D42, 0xB6C4, 0x8D43, 0xB6C5, 0x8D44, 0xB6C6, + 0x8D45, 0xB6C7, 0x8D46, 0xB6C8, 0x8D47, 0xB6C9, 0x8D48, 0xB6CA, + 0x8D49, 0xB6CB, 0x8D4A, 0xB6CC, 0x8D4B, 0xB6CD, 0x8D4C, 0xB6CE, + 0x8D4D, 0xB6CF, 0x8D4E, 0xB6D0, 0x8D4F, 0xB6D1, 0x8D50, 0xB6D2, + 0x8D51, 0xB6D3, 0x8D52, 0xB6D5, 0x8D53, 0xB6D6, 0x8D54, 0xB6D7, + 0x8D55, 0xB6D8, 0x8D56, 0xB6D9, 0x8D57, 0xB6DA, 0x8D58, 0xB6DB, + 0x8D59, 0xB6DC, 0x8D5A, 0xB6DD, 0x8D61, 0xB6DE, 0x8D62, 0xB6DF, + 0x8D63, 0xB6E0, 0x8D64, 0xB6E1, 0x8D65, 0xB6E2, 0x8D66, 0xB6E3, + 0x8D67, 0xB6E4, 0x8D68, 0xB6E5, 0x8D69, 0xB6E6, 0x8D6A, 0xB6E7, + 0x8D6B, 0xB6E8, 0x8D6C, 0xB6E9, 0x8D6D, 0xB6EA, 0x8D6E, 0xB6EB, + 0x8D6F, 0xB6EC, 0x8D70, 0xB6ED, 0x8D71, 0xB6EE, 0x8D72, 0xB6EF, + 0x8D73, 0xB6F1, 0x8D74, 0xB6F2, 0x8D75, 0xB6F3, 0x8D76, 0xB6F5, + 0x8D77, 0xB6F6, 0x8D78, 0xB6F7, 0x8D79, 0xB6F9, 0x8D7A, 0xB6FA, + 0x8D81, 0xB6FB, 0x8D82, 0xB6FC, 0x8D83, 0xB6FD, 0x8D84, 0xB6FE, + 0x8D85, 0xB6FF, 0x8D86, 0xB702, 0x8D87, 0xB703, 0x8D88, 0xB704, + 0x8D89, 0xB706, 0x8D8A, 0xB707, 0x8D8B, 0xB708, 0x8D8C, 0xB709, + 0x8D8D, 0xB70A, 0x8D8E, 0xB70B, 0x8D8F, 0xB70C, 0x8D90, 0xB70D, + 0x8D91, 0xB70E, 0x8D92, 0xB70F, 0x8D93, 0xB710, 0x8D94, 0xB711, + 0x8D95, 0xB712, 0x8D96, 0xB713, 0x8D97, 0xB714, 0x8D98, 0xB715, + 0x8D99, 0xB716, 0x8D9A, 0xB717, 0x8D9B, 0xB718, 0x8D9C, 0xB719, + 0x8D9D, 0xB71A, 0x8D9E, 0xB71B, 0x8D9F, 0xB71C, 0x8DA0, 0xB71D, + 0x8DA1, 0xB71E, 0x8DA2, 0xB71F, 0x8DA3, 0xB720, 0x8DA4, 0xB721, + 0x8DA5, 0xB722, 0x8DA6, 0xB723, 0x8DA7, 0xB724, 0x8DA8, 0xB725, + 0x8DA9, 0xB726, 0x8DAA, 0xB727, 0x8DAB, 0xB72A, 0x8DAC, 0xB72B, + 0x8DAD, 0xB72D, 0x8DAE, 0xB72E, 0x8DAF, 0xB731, 0x8DB0, 0xB732, + 0x8DB1, 0xB733, 0x8DB2, 0xB734, 0x8DB3, 0xB735, 0x8DB4, 0xB736, + 0x8DB5, 0xB737, 0x8DB6, 0xB73A, 0x8DB7, 0xB73C, 0x8DB8, 0xB73D, + 0x8DB9, 0xB73E, 0x8DBA, 0xB73F, 0x8DBB, 0xB740, 0x8DBC, 0xB741, + 0x8DBD, 0xB742, 0x8DBE, 0xB743, 0x8DBF, 0xB745, 0x8DC0, 0xB746, + 0x8DC1, 0xB747, 0x8DC2, 0xB749, 0x8DC3, 0xB74A, 0x8DC4, 0xB74B, + 0x8DC5, 0xB74D, 0x8DC6, 0xB74E, 0x8DC7, 0xB74F, 0x8DC8, 0xB750, + 0x8DC9, 0xB751, 0x8DCA, 0xB752, 0x8DCB, 0xB753, 0x8DCC, 0xB756, + 0x8DCD, 0xB757, 0x8DCE, 0xB758, 0x8DCF, 0xB759, 0x8DD0, 0xB75A, + 0x8DD1, 0xB75B, 0x8DD2, 0xB75C, 0x8DD3, 0xB75D, 0x8DD4, 0xB75E, + 0x8DD5, 0xB75F, 0x8DD6, 0xB761, 0x8DD7, 0xB762, 0x8DD8, 0xB763, + 0x8DD9, 0xB765, 0x8DDA, 0xB766, 0x8DDB, 0xB767, 0x8DDC, 0xB769, + 0x8DDD, 0xB76A, 0x8DDE, 0xB76B, 0x8DDF, 0xB76C, 0x8DE0, 0xB76D, + 0x8DE1, 0xB76E, 0x8DE2, 0xB76F, 0x8DE3, 0xB772, 0x8DE4, 0xB774, + 0x8DE5, 0xB776, 0x8DE6, 0xB777, 0x8DE7, 0xB778, 0x8DE8, 0xB779, + 0x8DE9, 0xB77A, 0x8DEA, 0xB77B, 0x8DEB, 0xB77E, 0x8DEC, 0xB77F, + 0x8DED, 0xB781, 0x8DEE, 0xB782, 0x8DEF, 0xB783, 0x8DF0, 0xB785, + 0x8DF1, 0xB786, 0x8DF2, 0xB787, 0x8DF3, 0xB788, 0x8DF4, 0xB789, + 0x8DF5, 0xB78A, 0x8DF6, 0xB78B, 0x8DF7, 0xB78E, 0x8DF8, 0xB793, + 0x8DF9, 0xB794, 0x8DFA, 0xB795, 0x8DFB, 0xB79A, 0x8DFC, 0xB79B, + 0x8DFD, 0xB79D, 0x8DFE, 0xB79E, 0x8E41, 0xB79F, 0x8E42, 0xB7A1, + 0x8E43, 0xB7A2, 0x8E44, 0xB7A3, 0x8E45, 0xB7A4, 0x8E46, 0xB7A5, + 0x8E47, 0xB7A6, 0x8E48, 0xB7A7, 0x8E49, 0xB7AA, 0x8E4A, 0xB7AE, + 0x8E4B, 0xB7AF, 0x8E4C, 0xB7B0, 0x8E4D, 0xB7B1, 0x8E4E, 0xB7B2, + 0x8E4F, 0xB7B3, 0x8E50, 0xB7B6, 0x8E51, 0xB7B7, 0x8E52, 0xB7B9, + 0x8E53, 0xB7BA, 0x8E54, 0xB7BB, 0x8E55, 0xB7BC, 0x8E56, 0xB7BD, + 0x8E57, 0xB7BE, 0x8E58, 0xB7BF, 0x8E59, 0xB7C0, 0x8E5A, 0xB7C1, + 0x8E61, 0xB7C2, 0x8E62, 0xB7C3, 0x8E63, 0xB7C4, 0x8E64, 0xB7C5, + 0x8E65, 0xB7C6, 0x8E66, 0xB7C8, 0x8E67, 0xB7CA, 0x8E68, 0xB7CB, + 0x8E69, 0xB7CC, 0x8E6A, 0xB7CD, 0x8E6B, 0xB7CE, 0x8E6C, 0xB7CF, + 0x8E6D, 0xB7D0, 0x8E6E, 0xB7D1, 0x8E6F, 0xB7D2, 0x8E70, 0xB7D3, + 0x8E71, 0xB7D4, 0x8E72, 0xB7D5, 0x8E73, 0xB7D6, 0x8E74, 0xB7D7, + 0x8E75, 0xB7D8, 0x8E76, 0xB7D9, 0x8E77, 0xB7DA, 0x8E78, 0xB7DB, + 0x8E79, 0xB7DC, 0x8E7A, 0xB7DD, 0x8E81, 0xB7DE, 0x8E82, 0xB7DF, + 0x8E83, 0xB7E0, 0x8E84, 0xB7E1, 0x8E85, 0xB7E2, 0x8E86, 0xB7E3, + 0x8E87, 0xB7E4, 0x8E88, 0xB7E5, 0x8E89, 0xB7E6, 0x8E8A, 0xB7E7, + 0x8E8B, 0xB7E8, 0x8E8C, 0xB7E9, 0x8E8D, 0xB7EA, 0x8E8E, 0xB7EB, + 0x8E8F, 0xB7EE, 0x8E90, 0xB7EF, 0x8E91, 0xB7F1, 0x8E92, 0xB7F2, + 0x8E93, 0xB7F3, 0x8E94, 0xB7F5, 0x8E95, 0xB7F6, 0x8E96, 0xB7F7, + 0x8E97, 0xB7F8, 0x8E98, 0xB7F9, 0x8E99, 0xB7FA, 0x8E9A, 0xB7FB, + 0x8E9B, 0xB7FE, 0x8E9C, 0xB802, 0x8E9D, 0xB803, 0x8E9E, 0xB804, + 0x8E9F, 0xB805, 0x8EA0, 0xB806, 0x8EA1, 0xB80A, 0x8EA2, 0xB80B, + 0x8EA3, 0xB80D, 0x8EA4, 0xB80E, 0x8EA5, 0xB80F, 0x8EA6, 0xB811, + 0x8EA7, 0xB812, 0x8EA8, 0xB813, 0x8EA9, 0xB814, 0x8EAA, 0xB815, + 0x8EAB, 0xB816, 0x8EAC, 0xB817, 0x8EAD, 0xB81A, 0x8EAE, 0xB81C, + 0x8EAF, 0xB81E, 0x8EB0, 0xB81F, 0x8EB1, 0xB820, 0x8EB2, 0xB821, + 0x8EB3, 0xB822, 0x8EB4, 0xB823, 0x8EB5, 0xB826, 0x8EB6, 0xB827, + 0x8EB7, 0xB829, 0x8EB8, 0xB82A, 0x8EB9, 0xB82B, 0x8EBA, 0xB82D, + 0x8EBB, 0xB82E, 0x8EBC, 0xB82F, 0x8EBD, 0xB830, 0x8EBE, 0xB831, + 0x8EBF, 0xB832, 0x8EC0, 0xB833, 0x8EC1, 0xB836, 0x8EC2, 0xB83A, + 0x8EC3, 0xB83B, 0x8EC4, 0xB83C, 0x8EC5, 0xB83D, 0x8EC6, 0xB83E, + 0x8EC7, 0xB83F, 0x8EC8, 0xB841, 0x8EC9, 0xB842, 0x8ECA, 0xB843, + 0x8ECB, 0xB845, 0x8ECC, 0xB846, 0x8ECD, 0xB847, 0x8ECE, 0xB848, + 0x8ECF, 0xB849, 0x8ED0, 0xB84A, 0x8ED1, 0xB84B, 0x8ED2, 0xB84C, + 0x8ED3, 0xB84D, 0x8ED4, 0xB84E, 0x8ED5, 0xB84F, 0x8ED6, 0xB850, + 0x8ED7, 0xB852, 0x8ED8, 0xB854, 0x8ED9, 0xB855, 0x8EDA, 0xB856, + 0x8EDB, 0xB857, 0x8EDC, 0xB858, 0x8EDD, 0xB859, 0x8EDE, 0xB85A, + 0x8EDF, 0xB85B, 0x8EE0, 0xB85E, 0x8EE1, 0xB85F, 0x8EE2, 0xB861, + 0x8EE3, 0xB862, 0x8EE4, 0xB863, 0x8EE5, 0xB865, 0x8EE6, 0xB866, + 0x8EE7, 0xB867, 0x8EE8, 0xB868, 0x8EE9, 0xB869, 0x8EEA, 0xB86A, + 0x8EEB, 0xB86B, 0x8EEC, 0xB86E, 0x8EED, 0xB870, 0x8EEE, 0xB872, + 0x8EEF, 0xB873, 0x8EF0, 0xB874, 0x8EF1, 0xB875, 0x8EF2, 0xB876, + 0x8EF3, 0xB877, 0x8EF4, 0xB879, 0x8EF5, 0xB87A, 0x8EF6, 0xB87B, + 0x8EF7, 0xB87D, 0x8EF8, 0xB87E, 0x8EF9, 0xB87F, 0x8EFA, 0xB880, + 0x8EFB, 0xB881, 0x8EFC, 0xB882, 0x8EFD, 0xB883, 0x8EFE, 0xB884, + 0x8F41, 0xB885, 0x8F42, 0xB886, 0x8F43, 0xB887, 0x8F44, 0xB888, + 0x8F45, 0xB889, 0x8F46, 0xB88A, 0x8F47, 0xB88B, 0x8F48, 0xB88C, + 0x8F49, 0xB88E, 0x8F4A, 0xB88F, 0x8F4B, 0xB890, 0x8F4C, 0xB891, + 0x8F4D, 0xB892, 0x8F4E, 0xB893, 0x8F4F, 0xB894, 0x8F50, 0xB895, + 0x8F51, 0xB896, 0x8F52, 0xB897, 0x8F53, 0xB898, 0x8F54, 0xB899, + 0x8F55, 0xB89A, 0x8F56, 0xB89B, 0x8F57, 0xB89C, 0x8F58, 0xB89D, + 0x8F59, 0xB89E, 0x8F5A, 0xB89F, 0x8F61, 0xB8A0, 0x8F62, 0xB8A1, + 0x8F63, 0xB8A2, 0x8F64, 0xB8A3, 0x8F65, 0xB8A4, 0x8F66, 0xB8A5, + 0x8F67, 0xB8A6, 0x8F68, 0xB8A7, 0x8F69, 0xB8A9, 0x8F6A, 0xB8AA, + 0x8F6B, 0xB8AB, 0x8F6C, 0xB8AC, 0x8F6D, 0xB8AD, 0x8F6E, 0xB8AE, + 0x8F6F, 0xB8AF, 0x8F70, 0xB8B1, 0x8F71, 0xB8B2, 0x8F72, 0xB8B3, + 0x8F73, 0xB8B5, 0x8F74, 0xB8B6, 0x8F75, 0xB8B7, 0x8F76, 0xB8B9, + 0x8F77, 0xB8BA, 0x8F78, 0xB8BB, 0x8F79, 0xB8BC, 0x8F7A, 0xB8BD, + 0x8F81, 0xB8BE, 0x8F82, 0xB8BF, 0x8F83, 0xB8C2, 0x8F84, 0xB8C4, + 0x8F85, 0xB8C6, 0x8F86, 0xB8C7, 0x8F87, 0xB8C8, 0x8F88, 0xB8C9, + 0x8F89, 0xB8CA, 0x8F8A, 0xB8CB, 0x8F8B, 0xB8CD, 0x8F8C, 0xB8CE, + 0x8F8D, 0xB8CF, 0x8F8E, 0xB8D1, 0x8F8F, 0xB8D2, 0x8F90, 0xB8D3, + 0x8F91, 0xB8D5, 0x8F92, 0xB8D6, 0x8F93, 0xB8D7, 0x8F94, 0xB8D8, + 0x8F95, 0xB8D9, 0x8F96, 0xB8DA, 0x8F97, 0xB8DB, 0x8F98, 0xB8DC, + 0x8F99, 0xB8DE, 0x8F9A, 0xB8E0, 0x8F9B, 0xB8E2, 0x8F9C, 0xB8E3, + 0x8F9D, 0xB8E4, 0x8F9E, 0xB8E5, 0x8F9F, 0xB8E6, 0x8FA0, 0xB8E7, + 0x8FA1, 0xB8EA, 0x8FA2, 0xB8EB, 0x8FA3, 0xB8ED, 0x8FA4, 0xB8EE, + 0x8FA5, 0xB8EF, 0x8FA6, 0xB8F1, 0x8FA7, 0xB8F2, 0x8FA8, 0xB8F3, + 0x8FA9, 0xB8F4, 0x8FAA, 0xB8F5, 0x8FAB, 0xB8F6, 0x8FAC, 0xB8F7, + 0x8FAD, 0xB8FA, 0x8FAE, 0xB8FC, 0x8FAF, 0xB8FE, 0x8FB0, 0xB8FF, + 0x8FB1, 0xB900, 0x8FB2, 0xB901, 0x8FB3, 0xB902, 0x8FB4, 0xB903, + 0x8FB5, 0xB905, 0x8FB6, 0xB906, 0x8FB7, 0xB907, 0x8FB8, 0xB908, + 0x8FB9, 0xB909, 0x8FBA, 0xB90A, 0x8FBB, 0xB90B, 0x8FBC, 0xB90C, + 0x8FBD, 0xB90D, 0x8FBE, 0xB90E, 0x8FBF, 0xB90F, 0x8FC0, 0xB910, + 0x8FC1, 0xB911, 0x8FC2, 0xB912, 0x8FC3, 0xB913, 0x8FC4, 0xB914, + 0x8FC5, 0xB915, 0x8FC6, 0xB916, 0x8FC7, 0xB917, 0x8FC8, 0xB919, + 0x8FC9, 0xB91A, 0x8FCA, 0xB91B, 0x8FCB, 0xB91C, 0x8FCC, 0xB91D, + 0x8FCD, 0xB91E, 0x8FCE, 0xB91F, 0x8FCF, 0xB921, 0x8FD0, 0xB922, + 0x8FD1, 0xB923, 0x8FD2, 0xB924, 0x8FD3, 0xB925, 0x8FD4, 0xB926, + 0x8FD5, 0xB927, 0x8FD6, 0xB928, 0x8FD7, 0xB929, 0x8FD8, 0xB92A, + 0x8FD9, 0xB92B, 0x8FDA, 0xB92C, 0x8FDB, 0xB92D, 0x8FDC, 0xB92E, + 0x8FDD, 0xB92F, 0x8FDE, 0xB930, 0x8FDF, 0xB931, 0x8FE0, 0xB932, + 0x8FE1, 0xB933, 0x8FE2, 0xB934, 0x8FE3, 0xB935, 0x8FE4, 0xB936, + 0x8FE5, 0xB937, 0x8FE6, 0xB938, 0x8FE7, 0xB939, 0x8FE8, 0xB93A, + 0x8FE9, 0xB93B, 0x8FEA, 0xB93E, 0x8FEB, 0xB93F, 0x8FEC, 0xB941, + 0x8FED, 0xB942, 0x8FEE, 0xB943, 0x8FEF, 0xB945, 0x8FF0, 0xB946, + 0x8FF1, 0xB947, 0x8FF2, 0xB948, 0x8FF3, 0xB949, 0x8FF4, 0xB94A, + 0x8FF5, 0xB94B, 0x8FF6, 0xB94D, 0x8FF7, 0xB94E, 0x8FF8, 0xB950, + 0x8FF9, 0xB952, 0x8FFA, 0xB953, 0x8FFB, 0xB954, 0x8FFC, 0xB955, + 0x8FFD, 0xB956, 0x8FFE, 0xB957, 0x9041, 0xB95A, 0x9042, 0xB95B, + 0x9043, 0xB95D, 0x9044, 0xB95E, 0x9045, 0xB95F, 0x9046, 0xB961, + 0x9047, 0xB962, 0x9048, 0xB963, 0x9049, 0xB964, 0x904A, 0xB965, + 0x904B, 0xB966, 0x904C, 0xB967, 0x904D, 0xB96A, 0x904E, 0xB96C, + 0x904F, 0xB96E, 0x9050, 0xB96F, 0x9051, 0xB970, 0x9052, 0xB971, + 0x9053, 0xB972, 0x9054, 0xB973, 0x9055, 0xB976, 0x9056, 0xB977, + 0x9057, 0xB979, 0x9058, 0xB97A, 0x9059, 0xB97B, 0x905A, 0xB97D, + 0x9061, 0xB97E, 0x9062, 0xB97F, 0x9063, 0xB980, 0x9064, 0xB981, + 0x9065, 0xB982, 0x9066, 0xB983, 0x9067, 0xB986, 0x9068, 0xB988, + 0x9069, 0xB98B, 0x906A, 0xB98C, 0x906B, 0xB98F, 0x906C, 0xB990, + 0x906D, 0xB991, 0x906E, 0xB992, 0x906F, 0xB993, 0x9070, 0xB994, + 0x9071, 0xB995, 0x9072, 0xB996, 0x9073, 0xB997, 0x9074, 0xB998, + 0x9075, 0xB999, 0x9076, 0xB99A, 0x9077, 0xB99B, 0x9078, 0xB99C, + 0x9079, 0xB99D, 0x907A, 0xB99E, 0x9081, 0xB99F, 0x9082, 0xB9A0, + 0x9083, 0xB9A1, 0x9084, 0xB9A2, 0x9085, 0xB9A3, 0x9086, 0xB9A4, + 0x9087, 0xB9A5, 0x9088, 0xB9A6, 0x9089, 0xB9A7, 0x908A, 0xB9A8, + 0x908B, 0xB9A9, 0x908C, 0xB9AA, 0x908D, 0xB9AB, 0x908E, 0xB9AE, + 0x908F, 0xB9AF, 0x9090, 0xB9B1, 0x9091, 0xB9B2, 0x9092, 0xB9B3, + 0x9093, 0xB9B5, 0x9094, 0xB9B6, 0x9095, 0xB9B7, 0x9096, 0xB9B8, + 0x9097, 0xB9B9, 0x9098, 0xB9BA, 0x9099, 0xB9BB, 0x909A, 0xB9BE, + 0x909B, 0xB9C0, 0x909C, 0xB9C2, 0x909D, 0xB9C3, 0x909E, 0xB9C4, + 0x909F, 0xB9C5, 0x90A0, 0xB9C6, 0x90A1, 0xB9C7, 0x90A2, 0xB9CA, + 0x90A3, 0xB9CB, 0x90A4, 0xB9CD, 0x90A5, 0xB9D3, 0x90A6, 0xB9D4, + 0x90A7, 0xB9D5, 0x90A8, 0xB9D6, 0x90A9, 0xB9D7, 0x90AA, 0xB9DA, + 0x90AB, 0xB9DC, 0x90AC, 0xB9DF, 0x90AD, 0xB9E0, 0x90AE, 0xB9E2, + 0x90AF, 0xB9E6, 0x90B0, 0xB9E7, 0x90B1, 0xB9E9, 0x90B2, 0xB9EA, + 0x90B3, 0xB9EB, 0x90B4, 0xB9ED, 0x90B5, 0xB9EE, 0x90B6, 0xB9EF, + 0x90B7, 0xB9F0, 0x90B8, 0xB9F1, 0x90B9, 0xB9F2, 0x90BA, 0xB9F3, + 0x90BB, 0xB9F6, 0x90BC, 0xB9FB, 0x90BD, 0xB9FC, 0x90BE, 0xB9FD, + 0x90BF, 0xB9FE, 0x90C0, 0xB9FF, 0x90C1, 0xBA02, 0x90C2, 0xBA03, + 0x90C3, 0xBA04, 0x90C4, 0xBA05, 0x90C5, 0xBA06, 0x90C6, 0xBA07, + 0x90C7, 0xBA09, 0x90C8, 0xBA0A, 0x90C9, 0xBA0B, 0x90CA, 0xBA0C, + 0x90CB, 0xBA0D, 0x90CC, 0xBA0E, 0x90CD, 0xBA0F, 0x90CE, 0xBA10, + 0x90CF, 0xBA11, 0x90D0, 0xBA12, 0x90D1, 0xBA13, 0x90D2, 0xBA14, + 0x90D3, 0xBA16, 0x90D4, 0xBA17, 0x90D5, 0xBA18, 0x90D6, 0xBA19, + 0x90D7, 0xBA1A, 0x90D8, 0xBA1B, 0x90D9, 0xBA1C, 0x90DA, 0xBA1D, + 0x90DB, 0xBA1E, 0x90DC, 0xBA1F, 0x90DD, 0xBA20, 0x90DE, 0xBA21, + 0x90DF, 0xBA22, 0x90E0, 0xBA23, 0x90E1, 0xBA24, 0x90E2, 0xBA25, + 0x90E3, 0xBA26, 0x90E4, 0xBA27, 0x90E5, 0xBA28, 0x90E6, 0xBA29, + 0x90E7, 0xBA2A, 0x90E8, 0xBA2B, 0x90E9, 0xBA2C, 0x90EA, 0xBA2D, + 0x90EB, 0xBA2E, 0x90EC, 0xBA2F, 0x90ED, 0xBA30, 0x90EE, 0xBA31, + 0x90EF, 0xBA32, 0x90F0, 0xBA33, 0x90F1, 0xBA34, 0x90F2, 0xBA35, + 0x90F3, 0xBA36, 0x90F4, 0xBA37, 0x90F5, 0xBA3A, 0x90F6, 0xBA3B, + 0x90F7, 0xBA3D, 0x90F8, 0xBA3E, 0x90F9, 0xBA3F, 0x90FA, 0xBA41, + 0x90FB, 0xBA43, 0x90FC, 0xBA44, 0x90FD, 0xBA45, 0x90FE, 0xBA46, + 0x9141, 0xBA47, 0x9142, 0xBA4A, 0x9143, 0xBA4C, 0x9144, 0xBA4F, + 0x9145, 0xBA50, 0x9146, 0xBA51, 0x9147, 0xBA52, 0x9148, 0xBA56, + 0x9149, 0xBA57, 0x914A, 0xBA59, 0x914B, 0xBA5A, 0x914C, 0xBA5B, + 0x914D, 0xBA5D, 0x914E, 0xBA5E, 0x914F, 0xBA5F, 0x9150, 0xBA60, + 0x9151, 0xBA61, 0x9152, 0xBA62, 0x9153, 0xBA63, 0x9154, 0xBA66, + 0x9155, 0xBA6A, 0x9156, 0xBA6B, 0x9157, 0xBA6C, 0x9158, 0xBA6D, + 0x9159, 0xBA6E, 0x915A, 0xBA6F, 0x9161, 0xBA72, 0x9162, 0xBA73, + 0x9163, 0xBA75, 0x9164, 0xBA76, 0x9165, 0xBA77, 0x9166, 0xBA79, + 0x9167, 0xBA7A, 0x9168, 0xBA7B, 0x9169, 0xBA7C, 0x916A, 0xBA7D, + 0x916B, 0xBA7E, 0x916C, 0xBA7F, 0x916D, 0xBA80, 0x916E, 0xBA81, + 0x916F, 0xBA82, 0x9170, 0xBA86, 0x9171, 0xBA88, 0x9172, 0xBA89, + 0x9173, 0xBA8A, 0x9174, 0xBA8B, 0x9175, 0xBA8D, 0x9176, 0xBA8E, + 0x9177, 0xBA8F, 0x9178, 0xBA90, 0x9179, 0xBA91, 0x917A, 0xBA92, + 0x9181, 0xBA93, 0x9182, 0xBA94, 0x9183, 0xBA95, 0x9184, 0xBA96, + 0x9185, 0xBA97, 0x9186, 0xBA98, 0x9187, 0xBA99, 0x9188, 0xBA9A, + 0x9189, 0xBA9B, 0x918A, 0xBA9C, 0x918B, 0xBA9D, 0x918C, 0xBA9E, + 0x918D, 0xBA9F, 0x918E, 0xBAA0, 0x918F, 0xBAA1, 0x9190, 0xBAA2, + 0x9191, 0xBAA3, 0x9192, 0xBAA4, 0x9193, 0xBAA5, 0x9194, 0xBAA6, + 0x9195, 0xBAA7, 0x9196, 0xBAAA, 0x9197, 0xBAAD, 0x9198, 0xBAAE, + 0x9199, 0xBAAF, 0x919A, 0xBAB1, 0x919B, 0xBAB3, 0x919C, 0xBAB4, + 0x919D, 0xBAB5, 0x919E, 0xBAB6, 0x919F, 0xBAB7, 0x91A0, 0xBABA, + 0x91A1, 0xBABC, 0x91A2, 0xBABE, 0x91A3, 0xBABF, 0x91A4, 0xBAC0, + 0x91A5, 0xBAC1, 0x91A6, 0xBAC2, 0x91A7, 0xBAC3, 0x91A8, 0xBAC5, + 0x91A9, 0xBAC6, 0x91AA, 0xBAC7, 0x91AB, 0xBAC9, 0x91AC, 0xBACA, + 0x91AD, 0xBACB, 0x91AE, 0xBACC, 0x91AF, 0xBACD, 0x91B0, 0xBACE, + 0x91B1, 0xBACF, 0x91B2, 0xBAD0, 0x91B3, 0xBAD1, 0x91B4, 0xBAD2, + 0x91B5, 0xBAD3, 0x91B6, 0xBAD4, 0x91B7, 0xBAD5, 0x91B8, 0xBAD6, + 0x91B9, 0xBAD7, 0x91BA, 0xBADA, 0x91BB, 0xBADB, 0x91BC, 0xBADC, + 0x91BD, 0xBADD, 0x91BE, 0xBADE, 0x91BF, 0xBADF, 0x91C0, 0xBAE0, + 0x91C1, 0xBAE1, 0x91C2, 0xBAE2, 0x91C3, 0xBAE3, 0x91C4, 0xBAE4, + 0x91C5, 0xBAE5, 0x91C6, 0xBAE6, 0x91C7, 0xBAE7, 0x91C8, 0xBAE8, + 0x91C9, 0xBAE9, 0x91CA, 0xBAEA, 0x91CB, 0xBAEB, 0x91CC, 0xBAEC, + 0x91CD, 0xBAED, 0x91CE, 0xBAEE, 0x91CF, 0xBAEF, 0x91D0, 0xBAF0, + 0x91D1, 0xBAF1, 0x91D2, 0xBAF2, 0x91D3, 0xBAF3, 0x91D4, 0xBAF4, + 0x91D5, 0xBAF5, 0x91D6, 0xBAF6, 0x91D7, 0xBAF7, 0x91D8, 0xBAF8, + 0x91D9, 0xBAF9, 0x91DA, 0xBAFA, 0x91DB, 0xBAFB, 0x91DC, 0xBAFD, + 0x91DD, 0xBAFE, 0x91DE, 0xBAFF, 0x91DF, 0xBB01, 0x91E0, 0xBB02, + 0x91E1, 0xBB03, 0x91E2, 0xBB05, 0x91E3, 0xBB06, 0x91E4, 0xBB07, + 0x91E5, 0xBB08, 0x91E6, 0xBB09, 0x91E7, 0xBB0A, 0x91E8, 0xBB0B, + 0x91E9, 0xBB0C, 0x91EA, 0xBB0E, 0x91EB, 0xBB10, 0x91EC, 0xBB12, + 0x91ED, 0xBB13, 0x91EE, 0xBB14, 0x91EF, 0xBB15, 0x91F0, 0xBB16, + 0x91F1, 0xBB17, 0x91F2, 0xBB19, 0x91F3, 0xBB1A, 0x91F4, 0xBB1B, + 0x91F5, 0xBB1D, 0x91F6, 0xBB1E, 0x91F7, 0xBB1F, 0x91F8, 0xBB21, + 0x91F9, 0xBB22, 0x91FA, 0xBB23, 0x91FB, 0xBB24, 0x91FC, 0xBB25, + 0x91FD, 0xBB26, 0x91FE, 0xBB27, 0x9241, 0xBB28, 0x9242, 0xBB2A, + 0x9243, 0xBB2C, 0x9244, 0xBB2D, 0x9245, 0xBB2E, 0x9246, 0xBB2F, + 0x9247, 0xBB30, 0x9248, 0xBB31, 0x9249, 0xBB32, 0x924A, 0xBB33, + 0x924B, 0xBB37, 0x924C, 0xBB39, 0x924D, 0xBB3A, 0x924E, 0xBB3F, + 0x924F, 0xBB40, 0x9250, 0xBB41, 0x9251, 0xBB42, 0x9252, 0xBB43, + 0x9253, 0xBB46, 0x9254, 0xBB48, 0x9255, 0xBB4A, 0x9256, 0xBB4B, + 0x9257, 0xBB4C, 0x9258, 0xBB4E, 0x9259, 0xBB51, 0x925A, 0xBB52, + 0x9261, 0xBB53, 0x9262, 0xBB55, 0x9263, 0xBB56, 0x9264, 0xBB57, + 0x9265, 0xBB59, 0x9266, 0xBB5A, 0x9267, 0xBB5B, 0x9268, 0xBB5C, + 0x9269, 0xBB5D, 0x926A, 0xBB5E, 0x926B, 0xBB5F, 0x926C, 0xBB60, + 0x926D, 0xBB62, 0x926E, 0xBB64, 0x926F, 0xBB65, 0x9270, 0xBB66, + 0x9271, 0xBB67, 0x9272, 0xBB68, 0x9273, 0xBB69, 0x9274, 0xBB6A, + 0x9275, 0xBB6B, 0x9276, 0xBB6D, 0x9277, 0xBB6E, 0x9278, 0xBB6F, + 0x9279, 0xBB70, 0x927A, 0xBB71, 0x9281, 0xBB72, 0x9282, 0xBB73, + 0x9283, 0xBB74, 0x9284, 0xBB75, 0x9285, 0xBB76, 0x9286, 0xBB77, + 0x9287, 0xBB78, 0x9288, 0xBB79, 0x9289, 0xBB7A, 0x928A, 0xBB7B, + 0x928B, 0xBB7C, 0x928C, 0xBB7D, 0x928D, 0xBB7E, 0x928E, 0xBB7F, + 0x928F, 0xBB80, 0x9290, 0xBB81, 0x9291, 0xBB82, 0x9292, 0xBB83, + 0x9293, 0xBB84, 0x9294, 0xBB85, 0x9295, 0xBB86, 0x9296, 0xBB87, + 0x9297, 0xBB89, 0x9298, 0xBB8A, 0x9299, 0xBB8B, 0x929A, 0xBB8D, + 0x929B, 0xBB8E, 0x929C, 0xBB8F, 0x929D, 0xBB91, 0x929E, 0xBB92, + 0x929F, 0xBB93, 0x92A0, 0xBB94, 0x92A1, 0xBB95, 0x92A2, 0xBB96, + 0x92A3, 0xBB97, 0x92A4, 0xBB98, 0x92A5, 0xBB99, 0x92A6, 0xBB9A, + 0x92A7, 0xBB9B, 0x92A8, 0xBB9C, 0x92A9, 0xBB9D, 0x92AA, 0xBB9E, + 0x92AB, 0xBB9F, 0x92AC, 0xBBA0, 0x92AD, 0xBBA1, 0x92AE, 0xBBA2, + 0x92AF, 0xBBA3, 0x92B0, 0xBBA5, 0x92B1, 0xBBA6, 0x92B2, 0xBBA7, + 0x92B3, 0xBBA9, 0x92B4, 0xBBAA, 0x92B5, 0xBBAB, 0x92B6, 0xBBAD, + 0x92B7, 0xBBAE, 0x92B8, 0xBBAF, 0x92B9, 0xBBB0, 0x92BA, 0xBBB1, + 0x92BB, 0xBBB2, 0x92BC, 0xBBB3, 0x92BD, 0xBBB5, 0x92BE, 0xBBB6, + 0x92BF, 0xBBB8, 0x92C0, 0xBBB9, 0x92C1, 0xBBBA, 0x92C2, 0xBBBB, + 0x92C3, 0xBBBC, 0x92C4, 0xBBBD, 0x92C5, 0xBBBE, 0x92C6, 0xBBBF, + 0x92C7, 0xBBC1, 0x92C8, 0xBBC2, 0x92C9, 0xBBC3, 0x92CA, 0xBBC5, + 0x92CB, 0xBBC6, 0x92CC, 0xBBC7, 0x92CD, 0xBBC9, 0x92CE, 0xBBCA, + 0x92CF, 0xBBCB, 0x92D0, 0xBBCC, 0x92D1, 0xBBCD, 0x92D2, 0xBBCE, + 0x92D3, 0xBBCF, 0x92D4, 0xBBD1, 0x92D5, 0xBBD2, 0x92D6, 0xBBD4, + 0x92D7, 0xBBD5, 0x92D8, 0xBBD6, 0x92D9, 0xBBD7, 0x92DA, 0xBBD8, + 0x92DB, 0xBBD9, 0x92DC, 0xBBDA, 0x92DD, 0xBBDB, 0x92DE, 0xBBDC, + 0x92DF, 0xBBDD, 0x92E0, 0xBBDE, 0x92E1, 0xBBDF, 0x92E2, 0xBBE0, + 0x92E3, 0xBBE1, 0x92E4, 0xBBE2, 0x92E5, 0xBBE3, 0x92E6, 0xBBE4, + 0x92E7, 0xBBE5, 0x92E8, 0xBBE6, 0x92E9, 0xBBE7, 0x92EA, 0xBBE8, + 0x92EB, 0xBBE9, 0x92EC, 0xBBEA, 0x92ED, 0xBBEB, 0x92EE, 0xBBEC, + 0x92EF, 0xBBED, 0x92F0, 0xBBEE, 0x92F1, 0xBBEF, 0x92F2, 0xBBF0, + 0x92F3, 0xBBF1, 0x92F4, 0xBBF2, 0x92F5, 0xBBF3, 0x92F6, 0xBBF4, + 0x92F7, 0xBBF5, 0x92F8, 0xBBF6, 0x92F9, 0xBBF7, 0x92FA, 0xBBFA, + 0x92FB, 0xBBFB, 0x92FC, 0xBBFD, 0x92FD, 0xBBFE, 0x92FE, 0xBC01, + 0x9341, 0xBC03, 0x9342, 0xBC04, 0x9343, 0xBC05, 0x9344, 0xBC06, + 0x9345, 0xBC07, 0x9346, 0xBC0A, 0x9347, 0xBC0E, 0x9348, 0xBC10, + 0x9349, 0xBC12, 0x934A, 0xBC13, 0x934B, 0xBC19, 0x934C, 0xBC1A, + 0x934D, 0xBC20, 0x934E, 0xBC21, 0x934F, 0xBC22, 0x9350, 0xBC23, + 0x9351, 0xBC26, 0x9352, 0xBC28, 0x9353, 0xBC2A, 0x9354, 0xBC2B, + 0x9355, 0xBC2C, 0x9356, 0xBC2E, 0x9357, 0xBC2F, 0x9358, 0xBC32, + 0x9359, 0xBC33, 0x935A, 0xBC35, 0x9361, 0xBC36, 0x9362, 0xBC37, + 0x9363, 0xBC39, 0x9364, 0xBC3A, 0x9365, 0xBC3B, 0x9366, 0xBC3C, + 0x9367, 0xBC3D, 0x9368, 0xBC3E, 0x9369, 0xBC3F, 0x936A, 0xBC42, + 0x936B, 0xBC46, 0x936C, 0xBC47, 0x936D, 0xBC48, 0x936E, 0xBC4A, + 0x936F, 0xBC4B, 0x9370, 0xBC4E, 0x9371, 0xBC4F, 0x9372, 0xBC51, + 0x9373, 0xBC52, 0x9374, 0xBC53, 0x9375, 0xBC54, 0x9376, 0xBC55, + 0x9377, 0xBC56, 0x9378, 0xBC57, 0x9379, 0xBC58, 0x937A, 0xBC59, + 0x9381, 0xBC5A, 0x9382, 0xBC5B, 0x9383, 0xBC5C, 0x9384, 0xBC5E, + 0x9385, 0xBC5F, 0x9386, 0xBC60, 0x9387, 0xBC61, 0x9388, 0xBC62, + 0x9389, 0xBC63, 0x938A, 0xBC64, 0x938B, 0xBC65, 0x938C, 0xBC66, + 0x938D, 0xBC67, 0x938E, 0xBC68, 0x938F, 0xBC69, 0x9390, 0xBC6A, + 0x9391, 0xBC6B, 0x9392, 0xBC6C, 0x9393, 0xBC6D, 0x9394, 0xBC6E, + 0x9395, 0xBC6F, 0x9396, 0xBC70, 0x9397, 0xBC71, 0x9398, 0xBC72, + 0x9399, 0xBC73, 0x939A, 0xBC74, 0x939B, 0xBC75, 0x939C, 0xBC76, + 0x939D, 0xBC77, 0x939E, 0xBC78, 0x939F, 0xBC79, 0x93A0, 0xBC7A, + 0x93A1, 0xBC7B, 0x93A2, 0xBC7C, 0x93A3, 0xBC7D, 0x93A4, 0xBC7E, + 0x93A5, 0xBC7F, 0x93A6, 0xBC80, 0x93A7, 0xBC81, 0x93A8, 0xBC82, + 0x93A9, 0xBC83, 0x93AA, 0xBC86, 0x93AB, 0xBC87, 0x93AC, 0xBC89, + 0x93AD, 0xBC8A, 0x93AE, 0xBC8D, 0x93AF, 0xBC8F, 0x93B0, 0xBC90, + 0x93B1, 0xBC91, 0x93B2, 0xBC92, 0x93B3, 0xBC93, 0x93B4, 0xBC96, + 0x93B5, 0xBC98, 0x93B6, 0xBC9B, 0x93B7, 0xBC9C, 0x93B8, 0xBC9D, + 0x93B9, 0xBC9E, 0x93BA, 0xBC9F, 0x93BB, 0xBCA2, 0x93BC, 0xBCA3, + 0x93BD, 0xBCA5, 0x93BE, 0xBCA6, 0x93BF, 0xBCA9, 0x93C0, 0xBCAA, + 0x93C1, 0xBCAB, 0x93C2, 0xBCAC, 0x93C3, 0xBCAD, 0x93C4, 0xBCAE, + 0x93C5, 0xBCAF, 0x93C6, 0xBCB2, 0x93C7, 0xBCB6, 0x93C8, 0xBCB7, + 0x93C9, 0xBCB8, 0x93CA, 0xBCB9, 0x93CB, 0xBCBA, 0x93CC, 0xBCBB, + 0x93CD, 0xBCBE, 0x93CE, 0xBCBF, 0x93CF, 0xBCC1, 0x93D0, 0xBCC2, + 0x93D1, 0xBCC3, 0x93D2, 0xBCC5, 0x93D3, 0xBCC6, 0x93D4, 0xBCC7, + 0x93D5, 0xBCC8, 0x93D6, 0xBCC9, 0x93D7, 0xBCCA, 0x93D8, 0xBCCB, + 0x93D9, 0xBCCC, 0x93DA, 0xBCCE, 0x93DB, 0xBCD2, 0x93DC, 0xBCD3, + 0x93DD, 0xBCD4, 0x93DE, 0xBCD6, 0x93DF, 0xBCD7, 0x93E0, 0xBCD9, + 0x93E1, 0xBCDA, 0x93E2, 0xBCDB, 0x93E3, 0xBCDD, 0x93E4, 0xBCDE, + 0x93E5, 0xBCDF, 0x93E6, 0xBCE0, 0x93E7, 0xBCE1, 0x93E8, 0xBCE2, + 0x93E9, 0xBCE3, 0x93EA, 0xBCE4, 0x93EB, 0xBCE5, 0x93EC, 0xBCE6, + 0x93ED, 0xBCE7, 0x93EE, 0xBCE8, 0x93EF, 0xBCE9, 0x93F0, 0xBCEA, + 0x93F1, 0xBCEB, 0x93F2, 0xBCEC, 0x93F3, 0xBCED, 0x93F4, 0xBCEE, + 0x93F5, 0xBCEF, 0x93F6, 0xBCF0, 0x93F7, 0xBCF1, 0x93F8, 0xBCF2, + 0x93F9, 0xBCF3, 0x93FA, 0xBCF7, 0x93FB, 0xBCF9, 0x93FC, 0xBCFA, + 0x93FD, 0xBCFB, 0x93FE, 0xBCFD, 0x9441, 0xBCFE, 0x9442, 0xBCFF, + 0x9443, 0xBD00, 0x9444, 0xBD01, 0x9445, 0xBD02, 0x9446, 0xBD03, + 0x9447, 0xBD06, 0x9448, 0xBD08, 0x9449, 0xBD0A, 0x944A, 0xBD0B, + 0x944B, 0xBD0C, 0x944C, 0xBD0D, 0x944D, 0xBD0E, 0x944E, 0xBD0F, + 0x944F, 0xBD11, 0x9450, 0xBD12, 0x9451, 0xBD13, 0x9452, 0xBD15, + 0x9453, 0xBD16, 0x9454, 0xBD17, 0x9455, 0xBD18, 0x9456, 0xBD19, + 0x9457, 0xBD1A, 0x9458, 0xBD1B, 0x9459, 0xBD1C, 0x945A, 0xBD1D, + 0x9461, 0xBD1E, 0x9462, 0xBD1F, 0x9463, 0xBD20, 0x9464, 0xBD21, + 0x9465, 0xBD22, 0x9466, 0xBD23, 0x9467, 0xBD25, 0x9468, 0xBD26, + 0x9469, 0xBD27, 0x946A, 0xBD28, 0x946B, 0xBD29, 0x946C, 0xBD2A, + 0x946D, 0xBD2B, 0x946E, 0xBD2D, 0x946F, 0xBD2E, 0x9470, 0xBD2F, + 0x9471, 0xBD30, 0x9472, 0xBD31, 0x9473, 0xBD32, 0x9474, 0xBD33, + 0x9475, 0xBD34, 0x9476, 0xBD35, 0x9477, 0xBD36, 0x9478, 0xBD37, + 0x9479, 0xBD38, 0x947A, 0xBD39, 0x9481, 0xBD3A, 0x9482, 0xBD3B, + 0x9483, 0xBD3C, 0x9484, 0xBD3D, 0x9485, 0xBD3E, 0x9486, 0xBD3F, + 0x9487, 0xBD41, 0x9488, 0xBD42, 0x9489, 0xBD43, 0x948A, 0xBD44, + 0x948B, 0xBD45, 0x948C, 0xBD46, 0x948D, 0xBD47, 0x948E, 0xBD4A, + 0x948F, 0xBD4B, 0x9490, 0xBD4D, 0x9491, 0xBD4E, 0x9492, 0xBD4F, + 0x9493, 0xBD51, 0x9494, 0xBD52, 0x9495, 0xBD53, 0x9496, 0xBD54, + 0x9497, 0xBD55, 0x9498, 0xBD56, 0x9499, 0xBD57, 0x949A, 0xBD5A, + 0x949B, 0xBD5B, 0x949C, 0xBD5C, 0x949D, 0xBD5D, 0x949E, 0xBD5E, + 0x949F, 0xBD5F, 0x94A0, 0xBD60, 0x94A1, 0xBD61, 0x94A2, 0xBD62, + 0x94A3, 0xBD63, 0x94A4, 0xBD65, 0x94A5, 0xBD66, 0x94A6, 0xBD67, + 0x94A7, 0xBD69, 0x94A8, 0xBD6A, 0x94A9, 0xBD6B, 0x94AA, 0xBD6C, + 0x94AB, 0xBD6D, 0x94AC, 0xBD6E, 0x94AD, 0xBD6F, 0x94AE, 0xBD70, + 0x94AF, 0xBD71, 0x94B0, 0xBD72, 0x94B1, 0xBD73, 0x94B2, 0xBD74, + 0x94B3, 0xBD75, 0x94B4, 0xBD76, 0x94B5, 0xBD77, 0x94B6, 0xBD78, + 0x94B7, 0xBD79, 0x94B8, 0xBD7A, 0x94B9, 0xBD7B, 0x94BA, 0xBD7C, + 0x94BB, 0xBD7D, 0x94BC, 0xBD7E, 0x94BD, 0xBD7F, 0x94BE, 0xBD82, + 0x94BF, 0xBD83, 0x94C0, 0xBD85, 0x94C1, 0xBD86, 0x94C2, 0xBD8B, + 0x94C3, 0xBD8C, 0x94C4, 0xBD8D, 0x94C5, 0xBD8E, 0x94C6, 0xBD8F, + 0x94C7, 0xBD92, 0x94C8, 0xBD94, 0x94C9, 0xBD96, 0x94CA, 0xBD97, + 0x94CB, 0xBD98, 0x94CC, 0xBD9B, 0x94CD, 0xBD9D, 0x94CE, 0xBD9E, + 0x94CF, 0xBD9F, 0x94D0, 0xBDA0, 0x94D1, 0xBDA1, 0x94D2, 0xBDA2, + 0x94D3, 0xBDA3, 0x94D4, 0xBDA5, 0x94D5, 0xBDA6, 0x94D6, 0xBDA7, + 0x94D7, 0xBDA8, 0x94D8, 0xBDA9, 0x94D9, 0xBDAA, 0x94DA, 0xBDAB, + 0x94DB, 0xBDAC, 0x94DC, 0xBDAD, 0x94DD, 0xBDAE, 0x94DE, 0xBDAF, + 0x94DF, 0xBDB1, 0x94E0, 0xBDB2, 0x94E1, 0xBDB3, 0x94E2, 0xBDB4, + 0x94E3, 0xBDB5, 0x94E4, 0xBDB6, 0x94E5, 0xBDB7, 0x94E6, 0xBDB9, + 0x94E7, 0xBDBA, 0x94E8, 0xBDBB, 0x94E9, 0xBDBC, 0x94EA, 0xBDBD, + 0x94EB, 0xBDBE, 0x94EC, 0xBDBF, 0x94ED, 0xBDC0, 0x94EE, 0xBDC1, + 0x94EF, 0xBDC2, 0x94F0, 0xBDC3, 0x94F1, 0xBDC4, 0x94F2, 0xBDC5, + 0x94F3, 0xBDC6, 0x94F4, 0xBDC7, 0x94F5, 0xBDC8, 0x94F6, 0xBDC9, + 0x94F7, 0xBDCA, 0x94F8, 0xBDCB, 0x94F9, 0xBDCC, 0x94FA, 0xBDCD, + 0x94FB, 0xBDCE, 0x94FC, 0xBDCF, 0x94FD, 0xBDD0, 0x94FE, 0xBDD1, + 0x9541, 0xBDD2, 0x9542, 0xBDD3, 0x9543, 0xBDD6, 0x9544, 0xBDD7, + 0x9545, 0xBDD9, 0x9546, 0xBDDA, 0x9547, 0xBDDB, 0x9548, 0xBDDD, + 0x9549, 0xBDDE, 0x954A, 0xBDDF, 0x954B, 0xBDE0, 0x954C, 0xBDE1, + 0x954D, 0xBDE2, 0x954E, 0xBDE3, 0x954F, 0xBDE4, 0x9550, 0xBDE5, + 0x9551, 0xBDE6, 0x9552, 0xBDE7, 0x9553, 0xBDE8, 0x9554, 0xBDEA, + 0x9555, 0xBDEB, 0x9556, 0xBDEC, 0x9557, 0xBDED, 0x9558, 0xBDEE, + 0x9559, 0xBDEF, 0x955A, 0xBDF1, 0x9561, 0xBDF2, 0x9562, 0xBDF3, + 0x9563, 0xBDF5, 0x9564, 0xBDF6, 0x9565, 0xBDF7, 0x9566, 0xBDF9, + 0x9567, 0xBDFA, 0x9568, 0xBDFB, 0x9569, 0xBDFC, 0x956A, 0xBDFD, + 0x956B, 0xBDFE, 0x956C, 0xBDFF, 0x956D, 0xBE01, 0x956E, 0xBE02, + 0x956F, 0xBE04, 0x9570, 0xBE06, 0x9571, 0xBE07, 0x9572, 0xBE08, + 0x9573, 0xBE09, 0x9574, 0xBE0A, 0x9575, 0xBE0B, 0x9576, 0xBE0E, + 0x9577, 0xBE0F, 0x9578, 0xBE11, 0x9579, 0xBE12, 0x957A, 0xBE13, + 0x9581, 0xBE15, 0x9582, 0xBE16, 0x9583, 0xBE17, 0x9584, 0xBE18, + 0x9585, 0xBE19, 0x9586, 0xBE1A, 0x9587, 0xBE1B, 0x9588, 0xBE1E, + 0x9589, 0xBE20, 0x958A, 0xBE21, 0x958B, 0xBE22, 0x958C, 0xBE23, + 0x958D, 0xBE24, 0x958E, 0xBE25, 0x958F, 0xBE26, 0x9590, 0xBE27, + 0x9591, 0xBE28, 0x9592, 0xBE29, 0x9593, 0xBE2A, 0x9594, 0xBE2B, + 0x9595, 0xBE2C, 0x9596, 0xBE2D, 0x9597, 0xBE2E, 0x9598, 0xBE2F, + 0x9599, 0xBE30, 0x959A, 0xBE31, 0x959B, 0xBE32, 0x959C, 0xBE33, + 0x959D, 0xBE34, 0x959E, 0xBE35, 0x959F, 0xBE36, 0x95A0, 0xBE37, + 0x95A1, 0xBE38, 0x95A2, 0xBE39, 0x95A3, 0xBE3A, 0x95A4, 0xBE3B, + 0x95A5, 0xBE3C, 0x95A6, 0xBE3D, 0x95A7, 0xBE3E, 0x95A8, 0xBE3F, + 0x95A9, 0xBE40, 0x95AA, 0xBE41, 0x95AB, 0xBE42, 0x95AC, 0xBE43, + 0x95AD, 0xBE46, 0x95AE, 0xBE47, 0x95AF, 0xBE49, 0x95B0, 0xBE4A, + 0x95B1, 0xBE4B, 0x95B2, 0xBE4D, 0x95B3, 0xBE4F, 0x95B4, 0xBE50, + 0x95B5, 0xBE51, 0x95B6, 0xBE52, 0x95B7, 0xBE53, 0x95B8, 0xBE56, + 0x95B9, 0xBE58, 0x95BA, 0xBE5C, 0x95BB, 0xBE5D, 0x95BC, 0xBE5E, + 0x95BD, 0xBE5F, 0x95BE, 0xBE62, 0x95BF, 0xBE63, 0x95C0, 0xBE65, + 0x95C1, 0xBE66, 0x95C2, 0xBE67, 0x95C3, 0xBE69, 0x95C4, 0xBE6B, + 0x95C5, 0xBE6C, 0x95C6, 0xBE6D, 0x95C7, 0xBE6E, 0x95C8, 0xBE6F, + 0x95C9, 0xBE72, 0x95CA, 0xBE76, 0x95CB, 0xBE77, 0x95CC, 0xBE78, + 0x95CD, 0xBE79, 0x95CE, 0xBE7A, 0x95CF, 0xBE7E, 0x95D0, 0xBE7F, + 0x95D1, 0xBE81, 0x95D2, 0xBE82, 0x95D3, 0xBE83, 0x95D4, 0xBE85, + 0x95D5, 0xBE86, 0x95D6, 0xBE87, 0x95D7, 0xBE88, 0x95D8, 0xBE89, + 0x95D9, 0xBE8A, 0x95DA, 0xBE8B, 0x95DB, 0xBE8E, 0x95DC, 0xBE92, + 0x95DD, 0xBE93, 0x95DE, 0xBE94, 0x95DF, 0xBE95, 0x95E0, 0xBE96, + 0x95E1, 0xBE97, 0x95E2, 0xBE9A, 0x95E3, 0xBE9B, 0x95E4, 0xBE9C, + 0x95E5, 0xBE9D, 0x95E6, 0xBE9E, 0x95E7, 0xBE9F, 0x95E8, 0xBEA0, + 0x95E9, 0xBEA1, 0x95EA, 0xBEA2, 0x95EB, 0xBEA3, 0x95EC, 0xBEA4, + 0x95ED, 0xBEA5, 0x95EE, 0xBEA6, 0x95EF, 0xBEA7, 0x95F0, 0xBEA9, + 0x95F1, 0xBEAA, 0x95F2, 0xBEAB, 0x95F3, 0xBEAC, 0x95F4, 0xBEAD, + 0x95F5, 0xBEAE, 0x95F6, 0xBEAF, 0x95F7, 0xBEB0, 0x95F8, 0xBEB1, + 0x95F9, 0xBEB2, 0x95FA, 0xBEB3, 0x95FB, 0xBEB4, 0x95FC, 0xBEB5, + 0x95FD, 0xBEB6, 0x95FE, 0xBEB7, 0x9641, 0xBEB8, 0x9642, 0xBEB9, + 0x9643, 0xBEBA, 0x9644, 0xBEBB, 0x9645, 0xBEBC, 0x9646, 0xBEBD, + 0x9647, 0xBEBE, 0x9648, 0xBEBF, 0x9649, 0xBEC0, 0x964A, 0xBEC1, + 0x964B, 0xBEC2, 0x964C, 0xBEC3, 0x964D, 0xBEC4, 0x964E, 0xBEC5, + 0x964F, 0xBEC6, 0x9650, 0xBEC7, 0x9651, 0xBEC8, 0x9652, 0xBEC9, + 0x9653, 0xBECA, 0x9654, 0xBECB, 0x9655, 0xBECC, 0x9656, 0xBECD, + 0x9657, 0xBECE, 0x9658, 0xBECF, 0x9659, 0xBED2, 0x965A, 0xBED3, + 0x9661, 0xBED5, 0x9662, 0xBED6, 0x9663, 0xBED9, 0x9664, 0xBEDA, + 0x9665, 0xBEDB, 0x9666, 0xBEDC, 0x9667, 0xBEDD, 0x9668, 0xBEDE, + 0x9669, 0xBEDF, 0x966A, 0xBEE1, 0x966B, 0xBEE2, 0x966C, 0xBEE6, + 0x966D, 0xBEE7, 0x966E, 0xBEE8, 0x966F, 0xBEE9, 0x9670, 0xBEEA, + 0x9671, 0xBEEB, 0x9672, 0xBEED, 0x9673, 0xBEEE, 0x9674, 0xBEEF, + 0x9675, 0xBEF0, 0x9676, 0xBEF1, 0x9677, 0xBEF2, 0x9678, 0xBEF3, + 0x9679, 0xBEF4, 0x967A, 0xBEF5, 0x9681, 0xBEF6, 0x9682, 0xBEF7, + 0x9683, 0xBEF8, 0x9684, 0xBEF9, 0x9685, 0xBEFA, 0x9686, 0xBEFB, + 0x9687, 0xBEFC, 0x9688, 0xBEFD, 0x9689, 0xBEFE, 0x968A, 0xBEFF, + 0x968B, 0xBF00, 0x968C, 0xBF02, 0x968D, 0xBF03, 0x968E, 0xBF04, + 0x968F, 0xBF05, 0x9690, 0xBF06, 0x9691, 0xBF07, 0x9692, 0xBF0A, + 0x9693, 0xBF0B, 0x9694, 0xBF0C, 0x9695, 0xBF0D, 0x9696, 0xBF0E, + 0x9697, 0xBF0F, 0x9698, 0xBF10, 0x9699, 0xBF11, 0x969A, 0xBF12, + 0x969B, 0xBF13, 0x969C, 0xBF14, 0x969D, 0xBF15, 0x969E, 0xBF16, + 0x969F, 0xBF17, 0x96A0, 0xBF1A, 0x96A1, 0xBF1E, 0x96A2, 0xBF1F, + 0x96A3, 0xBF20, 0x96A4, 0xBF21, 0x96A5, 0xBF22, 0x96A6, 0xBF23, + 0x96A7, 0xBF24, 0x96A8, 0xBF25, 0x96A9, 0xBF26, 0x96AA, 0xBF27, + 0x96AB, 0xBF28, 0x96AC, 0xBF29, 0x96AD, 0xBF2A, 0x96AE, 0xBF2B, + 0x96AF, 0xBF2C, 0x96B0, 0xBF2D, 0x96B1, 0xBF2E, 0x96B2, 0xBF2F, + 0x96B3, 0xBF30, 0x96B4, 0xBF31, 0x96B5, 0xBF32, 0x96B6, 0xBF33, + 0x96B7, 0xBF34, 0x96B8, 0xBF35, 0x96B9, 0xBF36, 0x96BA, 0xBF37, + 0x96BB, 0xBF38, 0x96BC, 0xBF39, 0x96BD, 0xBF3A, 0x96BE, 0xBF3B, + 0x96BF, 0xBF3C, 0x96C0, 0xBF3D, 0x96C1, 0xBF3E, 0x96C2, 0xBF3F, + 0x96C3, 0xBF42, 0x96C4, 0xBF43, 0x96C5, 0xBF45, 0x96C6, 0xBF46, + 0x96C7, 0xBF47, 0x96C8, 0xBF49, 0x96C9, 0xBF4A, 0x96CA, 0xBF4B, + 0x96CB, 0xBF4C, 0x96CC, 0xBF4D, 0x96CD, 0xBF4E, 0x96CE, 0xBF4F, + 0x96CF, 0xBF52, 0x96D0, 0xBF53, 0x96D1, 0xBF54, 0x96D2, 0xBF56, + 0x96D3, 0xBF57, 0x96D4, 0xBF58, 0x96D5, 0xBF59, 0x96D6, 0xBF5A, + 0x96D7, 0xBF5B, 0x96D8, 0xBF5C, 0x96D9, 0xBF5D, 0x96DA, 0xBF5E, + 0x96DB, 0xBF5F, 0x96DC, 0xBF60, 0x96DD, 0xBF61, 0x96DE, 0xBF62, + 0x96DF, 0xBF63, 0x96E0, 0xBF64, 0x96E1, 0xBF65, 0x96E2, 0xBF66, + 0x96E3, 0xBF67, 0x96E4, 0xBF68, 0x96E5, 0xBF69, 0x96E6, 0xBF6A, + 0x96E7, 0xBF6B, 0x96E8, 0xBF6C, 0x96E9, 0xBF6D, 0x96EA, 0xBF6E, + 0x96EB, 0xBF6F, 0x96EC, 0xBF70, 0x96ED, 0xBF71, 0x96EE, 0xBF72, + 0x96EF, 0xBF73, 0x96F0, 0xBF74, 0x96F1, 0xBF75, 0x96F2, 0xBF76, + 0x96F3, 0xBF77, 0x96F4, 0xBF78, 0x96F5, 0xBF79, 0x96F6, 0xBF7A, + 0x96F7, 0xBF7B, 0x96F8, 0xBF7C, 0x96F9, 0xBF7D, 0x96FA, 0xBF7E, + 0x96FB, 0xBF7F, 0x96FC, 0xBF80, 0x96FD, 0xBF81, 0x96FE, 0xBF82, + 0x9741, 0xBF83, 0x9742, 0xBF84, 0x9743, 0xBF85, 0x9744, 0xBF86, + 0x9745, 0xBF87, 0x9746, 0xBF88, 0x9747, 0xBF89, 0x9748, 0xBF8A, + 0x9749, 0xBF8B, 0x974A, 0xBF8C, 0x974B, 0xBF8D, 0x974C, 0xBF8E, + 0x974D, 0xBF8F, 0x974E, 0xBF90, 0x974F, 0xBF91, 0x9750, 0xBF92, + 0x9751, 0xBF93, 0x9752, 0xBF95, 0x9753, 0xBF96, 0x9754, 0xBF97, + 0x9755, 0xBF98, 0x9756, 0xBF99, 0x9757, 0xBF9A, 0x9758, 0xBF9B, + 0x9759, 0xBF9C, 0x975A, 0xBF9D, 0x9761, 0xBF9E, 0x9762, 0xBF9F, + 0x9763, 0xBFA0, 0x9764, 0xBFA1, 0x9765, 0xBFA2, 0x9766, 0xBFA3, + 0x9767, 0xBFA4, 0x9768, 0xBFA5, 0x9769, 0xBFA6, 0x976A, 0xBFA7, + 0x976B, 0xBFA8, 0x976C, 0xBFA9, 0x976D, 0xBFAA, 0x976E, 0xBFAB, + 0x976F, 0xBFAC, 0x9770, 0xBFAD, 0x9771, 0xBFAE, 0x9772, 0xBFAF, + 0x9773, 0xBFB1, 0x9774, 0xBFB2, 0x9775, 0xBFB3, 0x9776, 0xBFB4, + 0x9777, 0xBFB5, 0x9778, 0xBFB6, 0x9779, 0xBFB7, 0x977A, 0xBFB8, + 0x9781, 0xBFB9, 0x9782, 0xBFBA, 0x9783, 0xBFBB, 0x9784, 0xBFBC, + 0x9785, 0xBFBD, 0x9786, 0xBFBE, 0x9787, 0xBFBF, 0x9788, 0xBFC0, + 0x9789, 0xBFC1, 0x978A, 0xBFC2, 0x978B, 0xBFC3, 0x978C, 0xBFC4, + 0x978D, 0xBFC6, 0x978E, 0xBFC7, 0x978F, 0xBFC8, 0x9790, 0xBFC9, + 0x9791, 0xBFCA, 0x9792, 0xBFCB, 0x9793, 0xBFCE, 0x9794, 0xBFCF, + 0x9795, 0xBFD1, 0x9796, 0xBFD2, 0x9797, 0xBFD3, 0x9798, 0xBFD5, + 0x9799, 0xBFD6, 0x979A, 0xBFD7, 0x979B, 0xBFD8, 0x979C, 0xBFD9, + 0x979D, 0xBFDA, 0x979E, 0xBFDB, 0x979F, 0xBFDD, 0x97A0, 0xBFDE, + 0x97A1, 0xBFE0, 0x97A2, 0xBFE2, 0x97A3, 0xBFE3, 0x97A4, 0xBFE4, + 0x97A5, 0xBFE5, 0x97A6, 0xBFE6, 0x97A7, 0xBFE7, 0x97A8, 0xBFE8, + 0x97A9, 0xBFE9, 0x97AA, 0xBFEA, 0x97AB, 0xBFEB, 0x97AC, 0xBFEC, + 0x97AD, 0xBFED, 0x97AE, 0xBFEE, 0x97AF, 0xBFEF, 0x97B0, 0xBFF0, + 0x97B1, 0xBFF1, 0x97B2, 0xBFF2, 0x97B3, 0xBFF3, 0x97B4, 0xBFF4, + 0x97B5, 0xBFF5, 0x97B6, 0xBFF6, 0x97B7, 0xBFF7, 0x97B8, 0xBFF8, + 0x97B9, 0xBFF9, 0x97BA, 0xBFFA, 0x97BB, 0xBFFB, 0x97BC, 0xBFFC, + 0x97BD, 0xBFFD, 0x97BE, 0xBFFE, 0x97BF, 0xBFFF, 0x97C0, 0xC000, + 0x97C1, 0xC001, 0x97C2, 0xC002, 0x97C3, 0xC003, 0x97C4, 0xC004, + 0x97C5, 0xC005, 0x97C6, 0xC006, 0x97C7, 0xC007, 0x97C8, 0xC008, + 0x97C9, 0xC009, 0x97CA, 0xC00A, 0x97CB, 0xC00B, 0x97CC, 0xC00C, + 0x97CD, 0xC00D, 0x97CE, 0xC00E, 0x97CF, 0xC00F, 0x97D0, 0xC010, + 0x97D1, 0xC011, 0x97D2, 0xC012, 0x97D3, 0xC013, 0x97D4, 0xC014, + 0x97D5, 0xC015, 0x97D6, 0xC016, 0x97D7, 0xC017, 0x97D8, 0xC018, + 0x97D9, 0xC019, 0x97DA, 0xC01A, 0x97DB, 0xC01B, 0x97DC, 0xC01C, + 0x97DD, 0xC01D, 0x97DE, 0xC01E, 0x97DF, 0xC01F, 0x97E0, 0xC020, + 0x97E1, 0xC021, 0x97E2, 0xC022, 0x97E3, 0xC023, 0x97E4, 0xC024, + 0x97E5, 0xC025, 0x97E6, 0xC026, 0x97E7, 0xC027, 0x97E8, 0xC028, + 0x97E9, 0xC029, 0x97EA, 0xC02A, 0x97EB, 0xC02B, 0x97EC, 0xC02C, + 0x97ED, 0xC02D, 0x97EE, 0xC02E, 0x97EF, 0xC02F, 0x97F0, 0xC030, + 0x97F1, 0xC031, 0x97F2, 0xC032, 0x97F3, 0xC033, 0x97F4, 0xC034, + 0x97F5, 0xC035, 0x97F6, 0xC036, 0x97F7, 0xC037, 0x97F8, 0xC038, + 0x97F9, 0xC039, 0x97FA, 0xC03A, 0x97FB, 0xC03B, 0x97FC, 0xC03D, + 0x97FD, 0xC03E, 0x97FE, 0xC03F, 0x9841, 0xC040, 0x9842, 0xC041, + 0x9843, 0xC042, 0x9844, 0xC043, 0x9845, 0xC044, 0x9846, 0xC045, + 0x9847, 0xC046, 0x9848, 0xC047, 0x9849, 0xC048, 0x984A, 0xC049, + 0x984B, 0xC04A, 0x984C, 0xC04B, 0x984D, 0xC04C, 0x984E, 0xC04D, + 0x984F, 0xC04E, 0x9850, 0xC04F, 0x9851, 0xC050, 0x9852, 0xC052, + 0x9853, 0xC053, 0x9854, 0xC054, 0x9855, 0xC055, 0x9856, 0xC056, + 0x9857, 0xC057, 0x9858, 0xC059, 0x9859, 0xC05A, 0x985A, 0xC05B, + 0x9861, 0xC05D, 0x9862, 0xC05E, 0x9863, 0xC05F, 0x9864, 0xC061, + 0x9865, 0xC062, 0x9866, 0xC063, 0x9867, 0xC064, 0x9868, 0xC065, + 0x9869, 0xC066, 0x986A, 0xC067, 0x986B, 0xC06A, 0x986C, 0xC06B, + 0x986D, 0xC06C, 0x986E, 0xC06D, 0x986F, 0xC06E, 0x9870, 0xC06F, + 0x9871, 0xC070, 0x9872, 0xC071, 0x9873, 0xC072, 0x9874, 0xC073, + 0x9875, 0xC074, 0x9876, 0xC075, 0x9877, 0xC076, 0x9878, 0xC077, + 0x9879, 0xC078, 0x987A, 0xC079, 0x9881, 0xC07A, 0x9882, 0xC07B, + 0x9883, 0xC07C, 0x9884, 0xC07D, 0x9885, 0xC07E, 0x9886, 0xC07F, + 0x9887, 0xC080, 0x9888, 0xC081, 0x9889, 0xC082, 0x988A, 0xC083, + 0x988B, 0xC084, 0x988C, 0xC085, 0x988D, 0xC086, 0x988E, 0xC087, + 0x988F, 0xC088, 0x9890, 0xC089, 0x9891, 0xC08A, 0x9892, 0xC08B, + 0x9893, 0xC08C, 0x9894, 0xC08D, 0x9895, 0xC08E, 0x9896, 0xC08F, + 0x9897, 0xC092, 0x9898, 0xC093, 0x9899, 0xC095, 0x989A, 0xC096, + 0x989B, 0xC097, 0x989C, 0xC099, 0x989D, 0xC09A, 0x989E, 0xC09B, + 0x989F, 0xC09C, 0x98A0, 0xC09D, 0x98A1, 0xC09E, 0x98A2, 0xC09F, + 0x98A3, 0xC0A2, 0x98A4, 0xC0A4, 0x98A5, 0xC0A6, 0x98A6, 0xC0A7, + 0x98A7, 0xC0A8, 0x98A8, 0xC0A9, 0x98A9, 0xC0AA, 0x98AA, 0xC0AB, + 0x98AB, 0xC0AE, 0x98AC, 0xC0B1, 0x98AD, 0xC0B2, 0x98AE, 0xC0B7, + 0x98AF, 0xC0B8, 0x98B0, 0xC0B9, 0x98B1, 0xC0BA, 0x98B2, 0xC0BB, + 0x98B3, 0xC0BE, 0x98B4, 0xC0C2, 0x98B5, 0xC0C3, 0x98B6, 0xC0C4, + 0x98B7, 0xC0C6, 0x98B8, 0xC0C7, 0x98B9, 0xC0CA, 0x98BA, 0xC0CB, + 0x98BB, 0xC0CD, 0x98BC, 0xC0CE, 0x98BD, 0xC0CF, 0x98BE, 0xC0D1, + 0x98BF, 0xC0D2, 0x98C0, 0xC0D3, 0x98C1, 0xC0D4, 0x98C2, 0xC0D5, + 0x98C3, 0xC0D6, 0x98C4, 0xC0D7, 0x98C5, 0xC0DA, 0x98C6, 0xC0DE, + 0x98C7, 0xC0DF, 0x98C8, 0xC0E0, 0x98C9, 0xC0E1, 0x98CA, 0xC0E2, + 0x98CB, 0xC0E3, 0x98CC, 0xC0E6, 0x98CD, 0xC0E7, 0x98CE, 0xC0E9, + 0x98CF, 0xC0EA, 0x98D0, 0xC0EB, 0x98D1, 0xC0ED, 0x98D2, 0xC0EE, + 0x98D3, 0xC0EF, 0x98D4, 0xC0F0, 0x98D5, 0xC0F1, 0x98D6, 0xC0F2, + 0x98D7, 0xC0F3, 0x98D8, 0xC0F6, 0x98D9, 0xC0F8, 0x98DA, 0xC0FA, + 0x98DB, 0xC0FB, 0x98DC, 0xC0FC, 0x98DD, 0xC0FD, 0x98DE, 0xC0FE, + 0x98DF, 0xC0FF, 0x98E0, 0xC101, 0x98E1, 0xC102, 0x98E2, 0xC103, + 0x98E3, 0xC105, 0x98E4, 0xC106, 0x98E5, 0xC107, 0x98E6, 0xC109, + 0x98E7, 0xC10A, 0x98E8, 0xC10B, 0x98E9, 0xC10C, 0x98EA, 0xC10D, + 0x98EB, 0xC10E, 0x98EC, 0xC10F, 0x98ED, 0xC111, 0x98EE, 0xC112, + 0x98EF, 0xC113, 0x98F0, 0xC114, 0x98F1, 0xC116, 0x98F2, 0xC117, + 0x98F3, 0xC118, 0x98F4, 0xC119, 0x98F5, 0xC11A, 0x98F6, 0xC11B, + 0x98F7, 0xC121, 0x98F8, 0xC122, 0x98F9, 0xC125, 0x98FA, 0xC128, + 0x98FB, 0xC129, 0x98FC, 0xC12A, 0x98FD, 0xC12B, 0x98FE, 0xC12E, + 0x9941, 0xC132, 0x9942, 0xC133, 0x9943, 0xC134, 0x9944, 0xC135, + 0x9945, 0xC137, 0x9946, 0xC13A, 0x9947, 0xC13B, 0x9948, 0xC13D, + 0x9949, 0xC13E, 0x994A, 0xC13F, 0x994B, 0xC141, 0x994C, 0xC142, + 0x994D, 0xC143, 0x994E, 0xC144, 0x994F, 0xC145, 0x9950, 0xC146, + 0x9951, 0xC147, 0x9952, 0xC14A, 0x9953, 0xC14E, 0x9954, 0xC14F, + 0x9955, 0xC150, 0x9956, 0xC151, 0x9957, 0xC152, 0x9958, 0xC153, + 0x9959, 0xC156, 0x995A, 0xC157, 0x9961, 0xC159, 0x9962, 0xC15A, + 0x9963, 0xC15B, 0x9964, 0xC15D, 0x9965, 0xC15E, 0x9966, 0xC15F, + 0x9967, 0xC160, 0x9968, 0xC161, 0x9969, 0xC162, 0x996A, 0xC163, + 0x996B, 0xC166, 0x996C, 0xC16A, 0x996D, 0xC16B, 0x996E, 0xC16C, + 0x996F, 0xC16D, 0x9970, 0xC16E, 0x9971, 0xC16F, 0x9972, 0xC171, + 0x9973, 0xC172, 0x9974, 0xC173, 0x9975, 0xC175, 0x9976, 0xC176, + 0x9977, 0xC177, 0x9978, 0xC179, 0x9979, 0xC17A, 0x997A, 0xC17B, + 0x9981, 0xC17C, 0x9982, 0xC17D, 0x9983, 0xC17E, 0x9984, 0xC17F, + 0x9985, 0xC180, 0x9986, 0xC181, 0x9987, 0xC182, 0x9988, 0xC183, + 0x9989, 0xC184, 0x998A, 0xC186, 0x998B, 0xC187, 0x998C, 0xC188, + 0x998D, 0xC189, 0x998E, 0xC18A, 0x998F, 0xC18B, 0x9990, 0xC18F, + 0x9991, 0xC191, 0x9992, 0xC192, 0x9993, 0xC193, 0x9994, 0xC195, + 0x9995, 0xC197, 0x9996, 0xC198, 0x9997, 0xC199, 0x9998, 0xC19A, + 0x9999, 0xC19B, 0x999A, 0xC19E, 0x999B, 0xC1A0, 0x999C, 0xC1A2, + 0x999D, 0xC1A3, 0x999E, 0xC1A4, 0x999F, 0xC1A6, 0x99A0, 0xC1A7, + 0x99A1, 0xC1AA, 0x99A2, 0xC1AB, 0x99A3, 0xC1AD, 0x99A4, 0xC1AE, + 0x99A5, 0xC1AF, 0x99A6, 0xC1B1, 0x99A7, 0xC1B2, 0x99A8, 0xC1B3, + 0x99A9, 0xC1B4, 0x99AA, 0xC1B5, 0x99AB, 0xC1B6, 0x99AC, 0xC1B7, + 0x99AD, 0xC1B8, 0x99AE, 0xC1B9, 0x99AF, 0xC1BA, 0x99B0, 0xC1BB, + 0x99B1, 0xC1BC, 0x99B2, 0xC1BE, 0x99B3, 0xC1BF, 0x99B4, 0xC1C0, + 0x99B5, 0xC1C1, 0x99B6, 0xC1C2, 0x99B7, 0xC1C3, 0x99B8, 0xC1C5, + 0x99B9, 0xC1C6, 0x99BA, 0xC1C7, 0x99BB, 0xC1C9, 0x99BC, 0xC1CA, + 0x99BD, 0xC1CB, 0x99BE, 0xC1CD, 0x99BF, 0xC1CE, 0x99C0, 0xC1CF, + 0x99C1, 0xC1D0, 0x99C2, 0xC1D1, 0x99C3, 0xC1D2, 0x99C4, 0xC1D3, + 0x99C5, 0xC1D5, 0x99C6, 0xC1D6, 0x99C7, 0xC1D9, 0x99C8, 0xC1DA, + 0x99C9, 0xC1DB, 0x99CA, 0xC1DC, 0x99CB, 0xC1DD, 0x99CC, 0xC1DE, + 0x99CD, 0xC1DF, 0x99CE, 0xC1E1, 0x99CF, 0xC1E2, 0x99D0, 0xC1E3, + 0x99D1, 0xC1E5, 0x99D2, 0xC1E6, 0x99D3, 0xC1E7, 0x99D4, 0xC1E9, + 0x99D5, 0xC1EA, 0x99D6, 0xC1EB, 0x99D7, 0xC1EC, 0x99D8, 0xC1ED, + 0x99D9, 0xC1EE, 0x99DA, 0xC1EF, 0x99DB, 0xC1F2, 0x99DC, 0xC1F4, + 0x99DD, 0xC1F5, 0x99DE, 0xC1F6, 0x99DF, 0xC1F7, 0x99E0, 0xC1F8, + 0x99E1, 0xC1F9, 0x99E2, 0xC1FA, 0x99E3, 0xC1FB, 0x99E4, 0xC1FE, + 0x99E5, 0xC1FF, 0x99E6, 0xC201, 0x99E7, 0xC202, 0x99E8, 0xC203, + 0x99E9, 0xC205, 0x99EA, 0xC206, 0x99EB, 0xC207, 0x99EC, 0xC208, + 0x99ED, 0xC209, 0x99EE, 0xC20A, 0x99EF, 0xC20B, 0x99F0, 0xC20E, + 0x99F1, 0xC210, 0x99F2, 0xC212, 0x99F3, 0xC213, 0x99F4, 0xC214, + 0x99F5, 0xC215, 0x99F6, 0xC216, 0x99F7, 0xC217, 0x99F8, 0xC21A, + 0x99F9, 0xC21B, 0x99FA, 0xC21D, 0x99FB, 0xC21E, 0x99FC, 0xC221, + 0x99FD, 0xC222, 0x99FE, 0xC223, 0x9A41, 0xC224, 0x9A42, 0xC225, + 0x9A43, 0xC226, 0x9A44, 0xC227, 0x9A45, 0xC22A, 0x9A46, 0xC22C, + 0x9A47, 0xC22E, 0x9A48, 0xC230, 0x9A49, 0xC233, 0x9A4A, 0xC235, + 0x9A4B, 0xC236, 0x9A4C, 0xC237, 0x9A4D, 0xC238, 0x9A4E, 0xC239, + 0x9A4F, 0xC23A, 0x9A50, 0xC23B, 0x9A51, 0xC23C, 0x9A52, 0xC23D, + 0x9A53, 0xC23E, 0x9A54, 0xC23F, 0x9A55, 0xC240, 0x9A56, 0xC241, + 0x9A57, 0xC242, 0x9A58, 0xC243, 0x9A59, 0xC244, 0x9A5A, 0xC245, + 0x9A61, 0xC246, 0x9A62, 0xC247, 0x9A63, 0xC249, 0x9A64, 0xC24A, + 0x9A65, 0xC24B, 0x9A66, 0xC24C, 0x9A67, 0xC24D, 0x9A68, 0xC24E, + 0x9A69, 0xC24F, 0x9A6A, 0xC252, 0x9A6B, 0xC253, 0x9A6C, 0xC255, + 0x9A6D, 0xC256, 0x9A6E, 0xC257, 0x9A6F, 0xC259, 0x9A70, 0xC25A, + 0x9A71, 0xC25B, 0x9A72, 0xC25C, 0x9A73, 0xC25D, 0x9A74, 0xC25E, + 0x9A75, 0xC25F, 0x9A76, 0xC261, 0x9A77, 0xC262, 0x9A78, 0xC263, + 0x9A79, 0xC264, 0x9A7A, 0xC266, 0x9A81, 0xC267, 0x9A82, 0xC268, + 0x9A83, 0xC269, 0x9A84, 0xC26A, 0x9A85, 0xC26B, 0x9A86, 0xC26E, + 0x9A87, 0xC26F, 0x9A88, 0xC271, 0x9A89, 0xC272, 0x9A8A, 0xC273, + 0x9A8B, 0xC275, 0x9A8C, 0xC276, 0x9A8D, 0xC277, 0x9A8E, 0xC278, + 0x9A8F, 0xC279, 0x9A90, 0xC27A, 0x9A91, 0xC27B, 0x9A92, 0xC27E, + 0x9A93, 0xC280, 0x9A94, 0xC282, 0x9A95, 0xC283, 0x9A96, 0xC284, + 0x9A97, 0xC285, 0x9A98, 0xC286, 0x9A99, 0xC287, 0x9A9A, 0xC28A, + 0x9A9B, 0xC28B, 0x9A9C, 0xC28C, 0x9A9D, 0xC28D, 0x9A9E, 0xC28E, + 0x9A9F, 0xC28F, 0x9AA0, 0xC291, 0x9AA1, 0xC292, 0x9AA2, 0xC293, + 0x9AA3, 0xC294, 0x9AA4, 0xC295, 0x9AA5, 0xC296, 0x9AA6, 0xC297, + 0x9AA7, 0xC299, 0x9AA8, 0xC29A, 0x9AA9, 0xC29C, 0x9AAA, 0xC29E, + 0x9AAB, 0xC29F, 0x9AAC, 0xC2A0, 0x9AAD, 0xC2A1, 0x9AAE, 0xC2A2, + 0x9AAF, 0xC2A3, 0x9AB0, 0xC2A6, 0x9AB1, 0xC2A7, 0x9AB2, 0xC2A9, + 0x9AB3, 0xC2AA, 0x9AB4, 0xC2AB, 0x9AB5, 0xC2AE, 0x9AB6, 0xC2AF, + 0x9AB7, 0xC2B0, 0x9AB8, 0xC2B1, 0x9AB9, 0xC2B2, 0x9ABA, 0xC2B3, + 0x9ABB, 0xC2B6, 0x9ABC, 0xC2B8, 0x9ABD, 0xC2BA, 0x9ABE, 0xC2BB, + 0x9ABF, 0xC2BC, 0x9AC0, 0xC2BD, 0x9AC1, 0xC2BE, 0x9AC2, 0xC2BF, + 0x9AC3, 0xC2C0, 0x9AC4, 0xC2C1, 0x9AC5, 0xC2C2, 0x9AC6, 0xC2C3, + 0x9AC7, 0xC2C4, 0x9AC8, 0xC2C5, 0x9AC9, 0xC2C6, 0x9ACA, 0xC2C7, + 0x9ACB, 0xC2C8, 0x9ACC, 0xC2C9, 0x9ACD, 0xC2CA, 0x9ACE, 0xC2CB, + 0x9ACF, 0xC2CC, 0x9AD0, 0xC2CD, 0x9AD1, 0xC2CE, 0x9AD2, 0xC2CF, + 0x9AD3, 0xC2D0, 0x9AD4, 0xC2D1, 0x9AD5, 0xC2D2, 0x9AD6, 0xC2D3, + 0x9AD7, 0xC2D4, 0x9AD8, 0xC2D5, 0x9AD9, 0xC2D6, 0x9ADA, 0xC2D7, + 0x9ADB, 0xC2D8, 0x9ADC, 0xC2D9, 0x9ADD, 0xC2DA, 0x9ADE, 0xC2DB, + 0x9ADF, 0xC2DE, 0x9AE0, 0xC2DF, 0x9AE1, 0xC2E1, 0x9AE2, 0xC2E2, + 0x9AE3, 0xC2E5, 0x9AE4, 0xC2E6, 0x9AE5, 0xC2E7, 0x9AE6, 0xC2E8, + 0x9AE7, 0xC2E9, 0x9AE8, 0xC2EA, 0x9AE9, 0xC2EE, 0x9AEA, 0xC2F0, + 0x9AEB, 0xC2F2, 0x9AEC, 0xC2F3, 0x9AED, 0xC2F4, 0x9AEE, 0xC2F5, + 0x9AEF, 0xC2F7, 0x9AF0, 0xC2FA, 0x9AF1, 0xC2FD, 0x9AF2, 0xC2FE, + 0x9AF3, 0xC2FF, 0x9AF4, 0xC301, 0x9AF5, 0xC302, 0x9AF6, 0xC303, + 0x9AF7, 0xC304, 0x9AF8, 0xC305, 0x9AF9, 0xC306, 0x9AFA, 0xC307, + 0x9AFB, 0xC30A, 0x9AFC, 0xC30B, 0x9AFD, 0xC30E, 0x9AFE, 0xC30F, + 0x9B41, 0xC310, 0x9B42, 0xC311, 0x9B43, 0xC312, 0x9B44, 0xC316, + 0x9B45, 0xC317, 0x9B46, 0xC319, 0x9B47, 0xC31A, 0x9B48, 0xC31B, + 0x9B49, 0xC31D, 0x9B4A, 0xC31E, 0x9B4B, 0xC31F, 0x9B4C, 0xC320, + 0x9B4D, 0xC321, 0x9B4E, 0xC322, 0x9B4F, 0xC323, 0x9B50, 0xC326, + 0x9B51, 0xC327, 0x9B52, 0xC32A, 0x9B53, 0xC32B, 0x9B54, 0xC32C, + 0x9B55, 0xC32D, 0x9B56, 0xC32E, 0x9B57, 0xC32F, 0x9B58, 0xC330, + 0x9B59, 0xC331, 0x9B5A, 0xC332, 0x9B61, 0xC333, 0x9B62, 0xC334, + 0x9B63, 0xC335, 0x9B64, 0xC336, 0x9B65, 0xC337, 0x9B66, 0xC338, + 0x9B67, 0xC339, 0x9B68, 0xC33A, 0x9B69, 0xC33B, 0x9B6A, 0xC33C, + 0x9B6B, 0xC33D, 0x9B6C, 0xC33E, 0x9B6D, 0xC33F, 0x9B6E, 0xC340, + 0x9B6F, 0xC341, 0x9B70, 0xC342, 0x9B71, 0xC343, 0x9B72, 0xC344, + 0x9B73, 0xC346, 0x9B74, 0xC347, 0x9B75, 0xC348, 0x9B76, 0xC349, + 0x9B77, 0xC34A, 0x9B78, 0xC34B, 0x9B79, 0xC34C, 0x9B7A, 0xC34D, + 0x9B81, 0xC34E, 0x9B82, 0xC34F, 0x9B83, 0xC350, 0x9B84, 0xC351, + 0x9B85, 0xC352, 0x9B86, 0xC353, 0x9B87, 0xC354, 0x9B88, 0xC355, + 0x9B89, 0xC356, 0x9B8A, 0xC357, 0x9B8B, 0xC358, 0x9B8C, 0xC359, + 0x9B8D, 0xC35A, 0x9B8E, 0xC35B, 0x9B8F, 0xC35C, 0x9B90, 0xC35D, + 0x9B91, 0xC35E, 0x9B92, 0xC35F, 0x9B93, 0xC360, 0x9B94, 0xC361, + 0x9B95, 0xC362, 0x9B96, 0xC363, 0x9B97, 0xC364, 0x9B98, 0xC365, + 0x9B99, 0xC366, 0x9B9A, 0xC367, 0x9B9B, 0xC36A, 0x9B9C, 0xC36B, + 0x9B9D, 0xC36D, 0x9B9E, 0xC36E, 0x9B9F, 0xC36F, 0x9BA0, 0xC371, + 0x9BA1, 0xC373, 0x9BA2, 0xC374, 0x9BA3, 0xC375, 0x9BA4, 0xC376, + 0x9BA5, 0xC377, 0x9BA6, 0xC37A, 0x9BA7, 0xC37B, 0x9BA8, 0xC37E, + 0x9BA9, 0xC37F, 0x9BAA, 0xC380, 0x9BAB, 0xC381, 0x9BAC, 0xC382, + 0x9BAD, 0xC383, 0x9BAE, 0xC385, 0x9BAF, 0xC386, 0x9BB0, 0xC387, + 0x9BB1, 0xC389, 0x9BB2, 0xC38A, 0x9BB3, 0xC38B, 0x9BB4, 0xC38D, + 0x9BB5, 0xC38E, 0x9BB6, 0xC38F, 0x9BB7, 0xC390, 0x9BB8, 0xC391, + 0x9BB9, 0xC392, 0x9BBA, 0xC393, 0x9BBB, 0xC394, 0x9BBC, 0xC395, + 0x9BBD, 0xC396, 0x9BBE, 0xC397, 0x9BBF, 0xC398, 0x9BC0, 0xC399, + 0x9BC1, 0xC39A, 0x9BC2, 0xC39B, 0x9BC3, 0xC39C, 0x9BC4, 0xC39D, + 0x9BC5, 0xC39E, 0x9BC6, 0xC39F, 0x9BC7, 0xC3A0, 0x9BC8, 0xC3A1, + 0x9BC9, 0xC3A2, 0x9BCA, 0xC3A3, 0x9BCB, 0xC3A4, 0x9BCC, 0xC3A5, + 0x9BCD, 0xC3A6, 0x9BCE, 0xC3A7, 0x9BCF, 0xC3A8, 0x9BD0, 0xC3A9, + 0x9BD1, 0xC3AA, 0x9BD2, 0xC3AB, 0x9BD3, 0xC3AC, 0x9BD4, 0xC3AD, + 0x9BD5, 0xC3AE, 0x9BD6, 0xC3AF, 0x9BD7, 0xC3B0, 0x9BD8, 0xC3B1, + 0x9BD9, 0xC3B2, 0x9BDA, 0xC3B3, 0x9BDB, 0xC3B4, 0x9BDC, 0xC3B5, + 0x9BDD, 0xC3B6, 0x9BDE, 0xC3B7, 0x9BDF, 0xC3B8, 0x9BE0, 0xC3B9, + 0x9BE1, 0xC3BA, 0x9BE2, 0xC3BB, 0x9BE3, 0xC3BC, 0x9BE4, 0xC3BD, + 0x9BE5, 0xC3BE, 0x9BE6, 0xC3BF, 0x9BE7, 0xC3C1, 0x9BE8, 0xC3C2, + 0x9BE9, 0xC3C3, 0x9BEA, 0xC3C4, 0x9BEB, 0xC3C5, 0x9BEC, 0xC3C6, + 0x9BED, 0xC3C7, 0x9BEE, 0xC3C8, 0x9BEF, 0xC3C9, 0x9BF0, 0xC3CA, + 0x9BF1, 0xC3CB, 0x9BF2, 0xC3CC, 0x9BF3, 0xC3CD, 0x9BF4, 0xC3CE, + 0x9BF5, 0xC3CF, 0x9BF6, 0xC3D0, 0x9BF7, 0xC3D1, 0x9BF8, 0xC3D2, + 0x9BF9, 0xC3D3, 0x9BFA, 0xC3D4, 0x9BFB, 0xC3D5, 0x9BFC, 0xC3D6, + 0x9BFD, 0xC3D7, 0x9BFE, 0xC3DA, 0x9C41, 0xC3DB, 0x9C42, 0xC3DD, + 0x9C43, 0xC3DE, 0x9C44, 0xC3E1, 0x9C45, 0xC3E3, 0x9C46, 0xC3E4, + 0x9C47, 0xC3E5, 0x9C48, 0xC3E6, 0x9C49, 0xC3E7, 0x9C4A, 0xC3EA, + 0x9C4B, 0xC3EB, 0x9C4C, 0xC3EC, 0x9C4D, 0xC3EE, 0x9C4E, 0xC3EF, + 0x9C4F, 0xC3F0, 0x9C50, 0xC3F1, 0x9C51, 0xC3F2, 0x9C52, 0xC3F3, + 0x9C53, 0xC3F6, 0x9C54, 0xC3F7, 0x9C55, 0xC3F9, 0x9C56, 0xC3FA, + 0x9C57, 0xC3FB, 0x9C58, 0xC3FC, 0x9C59, 0xC3FD, 0x9C5A, 0xC3FE, + 0x9C61, 0xC3FF, 0x9C62, 0xC400, 0x9C63, 0xC401, 0x9C64, 0xC402, + 0x9C65, 0xC403, 0x9C66, 0xC404, 0x9C67, 0xC405, 0x9C68, 0xC406, + 0x9C69, 0xC407, 0x9C6A, 0xC409, 0x9C6B, 0xC40A, 0x9C6C, 0xC40B, + 0x9C6D, 0xC40C, 0x9C6E, 0xC40D, 0x9C6F, 0xC40E, 0x9C70, 0xC40F, + 0x9C71, 0xC411, 0x9C72, 0xC412, 0x9C73, 0xC413, 0x9C74, 0xC414, + 0x9C75, 0xC415, 0x9C76, 0xC416, 0x9C77, 0xC417, 0x9C78, 0xC418, + 0x9C79, 0xC419, 0x9C7A, 0xC41A, 0x9C81, 0xC41B, 0x9C82, 0xC41C, + 0x9C83, 0xC41D, 0x9C84, 0xC41E, 0x9C85, 0xC41F, 0x9C86, 0xC420, + 0x9C87, 0xC421, 0x9C88, 0xC422, 0x9C89, 0xC423, 0x9C8A, 0xC425, + 0x9C8B, 0xC426, 0x9C8C, 0xC427, 0x9C8D, 0xC428, 0x9C8E, 0xC429, + 0x9C8F, 0xC42A, 0x9C90, 0xC42B, 0x9C91, 0xC42D, 0x9C92, 0xC42E, + 0x9C93, 0xC42F, 0x9C94, 0xC431, 0x9C95, 0xC432, 0x9C96, 0xC433, + 0x9C97, 0xC435, 0x9C98, 0xC436, 0x9C99, 0xC437, 0x9C9A, 0xC438, + 0x9C9B, 0xC439, 0x9C9C, 0xC43A, 0x9C9D, 0xC43B, 0x9C9E, 0xC43E, + 0x9C9F, 0xC43F, 0x9CA0, 0xC440, 0x9CA1, 0xC441, 0x9CA2, 0xC442, + 0x9CA3, 0xC443, 0x9CA4, 0xC444, 0x9CA5, 0xC445, 0x9CA6, 0xC446, + 0x9CA7, 0xC447, 0x9CA8, 0xC449, 0x9CA9, 0xC44A, 0x9CAA, 0xC44B, + 0x9CAB, 0xC44C, 0x9CAC, 0xC44D, 0x9CAD, 0xC44E, 0x9CAE, 0xC44F, + 0x9CAF, 0xC450, 0x9CB0, 0xC451, 0x9CB1, 0xC452, 0x9CB2, 0xC453, + 0x9CB3, 0xC454, 0x9CB4, 0xC455, 0x9CB5, 0xC456, 0x9CB6, 0xC457, + 0x9CB7, 0xC458, 0x9CB8, 0xC459, 0x9CB9, 0xC45A, 0x9CBA, 0xC45B, + 0x9CBB, 0xC45C, 0x9CBC, 0xC45D, 0x9CBD, 0xC45E, 0x9CBE, 0xC45F, + 0x9CBF, 0xC460, 0x9CC0, 0xC461, 0x9CC1, 0xC462, 0x9CC2, 0xC463, + 0x9CC3, 0xC466, 0x9CC4, 0xC467, 0x9CC5, 0xC469, 0x9CC6, 0xC46A, + 0x9CC7, 0xC46B, 0x9CC8, 0xC46D, 0x9CC9, 0xC46E, 0x9CCA, 0xC46F, + 0x9CCB, 0xC470, 0x9CCC, 0xC471, 0x9CCD, 0xC472, 0x9CCE, 0xC473, + 0x9CCF, 0xC476, 0x9CD0, 0xC477, 0x9CD1, 0xC478, 0x9CD2, 0xC47A, + 0x9CD3, 0xC47B, 0x9CD4, 0xC47C, 0x9CD5, 0xC47D, 0x9CD6, 0xC47E, + 0x9CD7, 0xC47F, 0x9CD8, 0xC481, 0x9CD9, 0xC482, 0x9CDA, 0xC483, + 0x9CDB, 0xC484, 0x9CDC, 0xC485, 0x9CDD, 0xC486, 0x9CDE, 0xC487, + 0x9CDF, 0xC488, 0x9CE0, 0xC489, 0x9CE1, 0xC48A, 0x9CE2, 0xC48B, + 0x9CE3, 0xC48C, 0x9CE4, 0xC48D, 0x9CE5, 0xC48E, 0x9CE6, 0xC48F, + 0x9CE7, 0xC490, 0x9CE8, 0xC491, 0x9CE9, 0xC492, 0x9CEA, 0xC493, + 0x9CEB, 0xC495, 0x9CEC, 0xC496, 0x9CED, 0xC497, 0x9CEE, 0xC498, + 0x9CEF, 0xC499, 0x9CF0, 0xC49A, 0x9CF1, 0xC49B, 0x9CF2, 0xC49D, + 0x9CF3, 0xC49E, 0x9CF4, 0xC49F, 0x9CF5, 0xC4A0, 0x9CF6, 0xC4A1, + 0x9CF7, 0xC4A2, 0x9CF8, 0xC4A3, 0x9CF9, 0xC4A4, 0x9CFA, 0xC4A5, + 0x9CFB, 0xC4A6, 0x9CFC, 0xC4A7, 0x9CFD, 0xC4A8, 0x9CFE, 0xC4A9, + 0x9D41, 0xC4AA, 0x9D42, 0xC4AB, 0x9D43, 0xC4AC, 0x9D44, 0xC4AD, + 0x9D45, 0xC4AE, 0x9D46, 0xC4AF, 0x9D47, 0xC4B0, 0x9D48, 0xC4B1, + 0x9D49, 0xC4B2, 0x9D4A, 0xC4B3, 0x9D4B, 0xC4B4, 0x9D4C, 0xC4B5, + 0x9D4D, 0xC4B6, 0x9D4E, 0xC4B7, 0x9D4F, 0xC4B9, 0x9D50, 0xC4BA, + 0x9D51, 0xC4BB, 0x9D52, 0xC4BD, 0x9D53, 0xC4BE, 0x9D54, 0xC4BF, + 0x9D55, 0xC4C0, 0x9D56, 0xC4C1, 0x9D57, 0xC4C2, 0x9D58, 0xC4C3, + 0x9D59, 0xC4C4, 0x9D5A, 0xC4C5, 0x9D61, 0xC4C6, 0x9D62, 0xC4C7, + 0x9D63, 0xC4C8, 0x9D64, 0xC4C9, 0x9D65, 0xC4CA, 0x9D66, 0xC4CB, + 0x9D67, 0xC4CC, 0x9D68, 0xC4CD, 0x9D69, 0xC4CE, 0x9D6A, 0xC4CF, + 0x9D6B, 0xC4D0, 0x9D6C, 0xC4D1, 0x9D6D, 0xC4D2, 0x9D6E, 0xC4D3, + 0x9D6F, 0xC4D4, 0x9D70, 0xC4D5, 0x9D71, 0xC4D6, 0x9D72, 0xC4D7, + 0x9D73, 0xC4D8, 0x9D74, 0xC4D9, 0x9D75, 0xC4DA, 0x9D76, 0xC4DB, + 0x9D77, 0xC4DC, 0x9D78, 0xC4DD, 0x9D79, 0xC4DE, 0x9D7A, 0xC4DF, + 0x9D81, 0xC4E0, 0x9D82, 0xC4E1, 0x9D83, 0xC4E2, 0x9D84, 0xC4E3, + 0x9D85, 0xC4E4, 0x9D86, 0xC4E5, 0x9D87, 0xC4E6, 0x9D88, 0xC4E7, + 0x9D89, 0xC4E8, 0x9D8A, 0xC4EA, 0x9D8B, 0xC4EB, 0x9D8C, 0xC4EC, + 0x9D8D, 0xC4ED, 0x9D8E, 0xC4EE, 0x9D8F, 0xC4EF, 0x9D90, 0xC4F2, + 0x9D91, 0xC4F3, 0x9D92, 0xC4F5, 0x9D93, 0xC4F6, 0x9D94, 0xC4F7, + 0x9D95, 0xC4F9, 0x9D96, 0xC4FB, 0x9D97, 0xC4FC, 0x9D98, 0xC4FD, + 0x9D99, 0xC4FE, 0x9D9A, 0xC502, 0x9D9B, 0xC503, 0x9D9C, 0xC504, + 0x9D9D, 0xC505, 0x9D9E, 0xC506, 0x9D9F, 0xC507, 0x9DA0, 0xC508, + 0x9DA1, 0xC509, 0x9DA2, 0xC50A, 0x9DA3, 0xC50B, 0x9DA4, 0xC50D, + 0x9DA5, 0xC50E, 0x9DA6, 0xC50F, 0x9DA7, 0xC511, 0x9DA8, 0xC512, + 0x9DA9, 0xC513, 0x9DAA, 0xC515, 0x9DAB, 0xC516, 0x9DAC, 0xC517, + 0x9DAD, 0xC518, 0x9DAE, 0xC519, 0x9DAF, 0xC51A, 0x9DB0, 0xC51B, + 0x9DB1, 0xC51D, 0x9DB2, 0xC51E, 0x9DB3, 0xC51F, 0x9DB4, 0xC520, + 0x9DB5, 0xC521, 0x9DB6, 0xC522, 0x9DB7, 0xC523, 0x9DB8, 0xC524, + 0x9DB9, 0xC525, 0x9DBA, 0xC526, 0x9DBB, 0xC527, 0x9DBC, 0xC52A, + 0x9DBD, 0xC52B, 0x9DBE, 0xC52D, 0x9DBF, 0xC52E, 0x9DC0, 0xC52F, + 0x9DC1, 0xC531, 0x9DC2, 0xC532, 0x9DC3, 0xC533, 0x9DC4, 0xC534, + 0x9DC5, 0xC535, 0x9DC6, 0xC536, 0x9DC7, 0xC537, 0x9DC8, 0xC53A, + 0x9DC9, 0xC53C, 0x9DCA, 0xC53E, 0x9DCB, 0xC53F, 0x9DCC, 0xC540, + 0x9DCD, 0xC541, 0x9DCE, 0xC542, 0x9DCF, 0xC543, 0x9DD0, 0xC546, + 0x9DD1, 0xC547, 0x9DD2, 0xC54B, 0x9DD3, 0xC54F, 0x9DD4, 0xC550, + 0x9DD5, 0xC551, 0x9DD6, 0xC552, 0x9DD7, 0xC556, 0x9DD8, 0xC55A, + 0x9DD9, 0xC55B, 0x9DDA, 0xC55C, 0x9DDB, 0xC55F, 0x9DDC, 0xC562, + 0x9DDD, 0xC563, 0x9DDE, 0xC565, 0x9DDF, 0xC566, 0x9DE0, 0xC567, + 0x9DE1, 0xC569, 0x9DE2, 0xC56A, 0x9DE3, 0xC56B, 0x9DE4, 0xC56C, + 0x9DE5, 0xC56D, 0x9DE6, 0xC56E, 0x9DE7, 0xC56F, 0x9DE8, 0xC572, + 0x9DE9, 0xC576, 0x9DEA, 0xC577, 0x9DEB, 0xC578, 0x9DEC, 0xC579, + 0x9DED, 0xC57A, 0x9DEE, 0xC57B, 0x9DEF, 0xC57E, 0x9DF0, 0xC57F, + 0x9DF1, 0xC581, 0x9DF2, 0xC582, 0x9DF3, 0xC583, 0x9DF4, 0xC585, + 0x9DF5, 0xC586, 0x9DF6, 0xC588, 0x9DF7, 0xC589, 0x9DF8, 0xC58A, + 0x9DF9, 0xC58B, 0x9DFA, 0xC58E, 0x9DFB, 0xC590, 0x9DFC, 0xC592, + 0x9DFD, 0xC593, 0x9DFE, 0xC594, 0x9E41, 0xC596, 0x9E42, 0xC599, + 0x9E43, 0xC59A, 0x9E44, 0xC59B, 0x9E45, 0xC59D, 0x9E46, 0xC59E, + 0x9E47, 0xC59F, 0x9E48, 0xC5A1, 0x9E49, 0xC5A2, 0x9E4A, 0xC5A3, + 0x9E4B, 0xC5A4, 0x9E4C, 0xC5A5, 0x9E4D, 0xC5A6, 0x9E4E, 0xC5A7, + 0x9E4F, 0xC5A8, 0x9E50, 0xC5AA, 0x9E51, 0xC5AB, 0x9E52, 0xC5AC, + 0x9E53, 0xC5AD, 0x9E54, 0xC5AE, 0x9E55, 0xC5AF, 0x9E56, 0xC5B0, + 0x9E57, 0xC5B1, 0x9E58, 0xC5B2, 0x9E59, 0xC5B3, 0x9E5A, 0xC5B6, + 0x9E61, 0xC5B7, 0x9E62, 0xC5BA, 0x9E63, 0xC5BF, 0x9E64, 0xC5C0, + 0x9E65, 0xC5C1, 0x9E66, 0xC5C2, 0x9E67, 0xC5C3, 0x9E68, 0xC5CB, + 0x9E69, 0xC5CD, 0x9E6A, 0xC5CF, 0x9E6B, 0xC5D2, 0x9E6C, 0xC5D3, + 0x9E6D, 0xC5D5, 0x9E6E, 0xC5D6, 0x9E6F, 0xC5D7, 0x9E70, 0xC5D9, + 0x9E71, 0xC5DA, 0x9E72, 0xC5DB, 0x9E73, 0xC5DC, 0x9E74, 0xC5DD, + 0x9E75, 0xC5DE, 0x9E76, 0xC5DF, 0x9E77, 0xC5E2, 0x9E78, 0xC5E4, + 0x9E79, 0xC5E6, 0x9E7A, 0xC5E7, 0x9E81, 0xC5E8, 0x9E82, 0xC5E9, + 0x9E83, 0xC5EA, 0x9E84, 0xC5EB, 0x9E85, 0xC5EF, 0x9E86, 0xC5F1, + 0x9E87, 0xC5F2, 0x9E88, 0xC5F3, 0x9E89, 0xC5F5, 0x9E8A, 0xC5F8, + 0x9E8B, 0xC5F9, 0x9E8C, 0xC5FA, 0x9E8D, 0xC5FB, 0x9E8E, 0xC602, + 0x9E8F, 0xC603, 0x9E90, 0xC604, 0x9E91, 0xC609, 0x9E92, 0xC60A, + 0x9E93, 0xC60B, 0x9E94, 0xC60D, 0x9E95, 0xC60E, 0x9E96, 0xC60F, + 0x9E97, 0xC611, 0x9E98, 0xC612, 0x9E99, 0xC613, 0x9E9A, 0xC614, + 0x9E9B, 0xC615, 0x9E9C, 0xC616, 0x9E9D, 0xC617, 0x9E9E, 0xC61A, + 0x9E9F, 0xC61D, 0x9EA0, 0xC61E, 0x9EA1, 0xC61F, 0x9EA2, 0xC620, + 0x9EA3, 0xC621, 0x9EA4, 0xC622, 0x9EA5, 0xC623, 0x9EA6, 0xC626, + 0x9EA7, 0xC627, 0x9EA8, 0xC629, 0x9EA9, 0xC62A, 0x9EAA, 0xC62B, + 0x9EAB, 0xC62F, 0x9EAC, 0xC631, 0x9EAD, 0xC632, 0x9EAE, 0xC636, + 0x9EAF, 0xC638, 0x9EB0, 0xC63A, 0x9EB1, 0xC63C, 0x9EB2, 0xC63D, + 0x9EB3, 0xC63E, 0x9EB4, 0xC63F, 0x9EB5, 0xC642, 0x9EB6, 0xC643, + 0x9EB7, 0xC645, 0x9EB8, 0xC646, 0x9EB9, 0xC647, 0x9EBA, 0xC649, + 0x9EBB, 0xC64A, 0x9EBC, 0xC64B, 0x9EBD, 0xC64C, 0x9EBE, 0xC64D, + 0x9EBF, 0xC64E, 0x9EC0, 0xC64F, 0x9EC1, 0xC652, 0x9EC2, 0xC656, + 0x9EC3, 0xC657, 0x9EC4, 0xC658, 0x9EC5, 0xC659, 0x9EC6, 0xC65A, + 0x9EC7, 0xC65B, 0x9EC8, 0xC65E, 0x9EC9, 0xC65F, 0x9ECA, 0xC661, + 0x9ECB, 0xC662, 0x9ECC, 0xC663, 0x9ECD, 0xC664, 0x9ECE, 0xC665, + 0x9ECF, 0xC666, 0x9ED0, 0xC667, 0x9ED1, 0xC668, 0x9ED2, 0xC669, + 0x9ED3, 0xC66A, 0x9ED4, 0xC66B, 0x9ED5, 0xC66D, 0x9ED6, 0xC66E, + 0x9ED7, 0xC670, 0x9ED8, 0xC672, 0x9ED9, 0xC673, 0x9EDA, 0xC674, + 0x9EDB, 0xC675, 0x9EDC, 0xC676, 0x9EDD, 0xC677, 0x9EDE, 0xC67A, + 0x9EDF, 0xC67B, 0x9EE0, 0xC67D, 0x9EE1, 0xC67E, 0x9EE2, 0xC67F, + 0x9EE3, 0xC681, 0x9EE4, 0xC682, 0x9EE5, 0xC683, 0x9EE6, 0xC684, + 0x9EE7, 0xC685, 0x9EE8, 0xC686, 0x9EE9, 0xC687, 0x9EEA, 0xC68A, + 0x9EEB, 0xC68C, 0x9EEC, 0xC68E, 0x9EED, 0xC68F, 0x9EEE, 0xC690, + 0x9EEF, 0xC691, 0x9EF0, 0xC692, 0x9EF1, 0xC693, 0x9EF2, 0xC696, + 0x9EF3, 0xC697, 0x9EF4, 0xC699, 0x9EF5, 0xC69A, 0x9EF6, 0xC69B, + 0x9EF7, 0xC69D, 0x9EF8, 0xC69E, 0x9EF9, 0xC69F, 0x9EFA, 0xC6A0, + 0x9EFB, 0xC6A1, 0x9EFC, 0xC6A2, 0x9EFD, 0xC6A3, 0x9EFE, 0xC6A6, + 0x9F41, 0xC6A8, 0x9F42, 0xC6AA, 0x9F43, 0xC6AB, 0x9F44, 0xC6AC, + 0x9F45, 0xC6AD, 0x9F46, 0xC6AE, 0x9F47, 0xC6AF, 0x9F48, 0xC6B2, + 0x9F49, 0xC6B3, 0x9F4A, 0xC6B5, 0x9F4B, 0xC6B6, 0x9F4C, 0xC6B7, + 0x9F4D, 0xC6BB, 0x9F4E, 0xC6BC, 0x9F4F, 0xC6BD, 0x9F50, 0xC6BE, + 0x9F51, 0xC6BF, 0x9F52, 0xC6C2, 0x9F53, 0xC6C4, 0x9F54, 0xC6C6, + 0x9F55, 0xC6C7, 0x9F56, 0xC6C8, 0x9F57, 0xC6C9, 0x9F58, 0xC6CA, + 0x9F59, 0xC6CB, 0x9F5A, 0xC6CE, 0x9F61, 0xC6CF, 0x9F62, 0xC6D1, + 0x9F63, 0xC6D2, 0x9F64, 0xC6D3, 0x9F65, 0xC6D5, 0x9F66, 0xC6D6, + 0x9F67, 0xC6D7, 0x9F68, 0xC6D8, 0x9F69, 0xC6D9, 0x9F6A, 0xC6DA, + 0x9F6B, 0xC6DB, 0x9F6C, 0xC6DE, 0x9F6D, 0xC6DF, 0x9F6E, 0xC6E2, + 0x9F6F, 0xC6E3, 0x9F70, 0xC6E4, 0x9F71, 0xC6E5, 0x9F72, 0xC6E6, + 0x9F73, 0xC6E7, 0x9F74, 0xC6EA, 0x9F75, 0xC6EB, 0x9F76, 0xC6ED, + 0x9F77, 0xC6EE, 0x9F78, 0xC6EF, 0x9F79, 0xC6F1, 0x9F7A, 0xC6F2, + 0x9F81, 0xC6F3, 0x9F82, 0xC6F4, 0x9F83, 0xC6F5, 0x9F84, 0xC6F6, + 0x9F85, 0xC6F7, 0x9F86, 0xC6FA, 0x9F87, 0xC6FB, 0x9F88, 0xC6FC, + 0x9F89, 0xC6FE, 0x9F8A, 0xC6FF, 0x9F8B, 0xC700, 0x9F8C, 0xC701, + 0x9F8D, 0xC702, 0x9F8E, 0xC703, 0x9F8F, 0xC706, 0x9F90, 0xC707, + 0x9F91, 0xC709, 0x9F92, 0xC70A, 0x9F93, 0xC70B, 0x9F94, 0xC70D, + 0x9F95, 0xC70E, 0x9F96, 0xC70F, 0x9F97, 0xC710, 0x9F98, 0xC711, + 0x9F99, 0xC712, 0x9F9A, 0xC713, 0x9F9B, 0xC716, 0x9F9C, 0xC718, + 0x9F9D, 0xC71A, 0x9F9E, 0xC71B, 0x9F9F, 0xC71C, 0x9FA0, 0xC71D, + 0x9FA1, 0xC71E, 0x9FA2, 0xC71F, 0x9FA3, 0xC722, 0x9FA4, 0xC723, + 0x9FA5, 0xC725, 0x9FA6, 0xC726, 0x9FA7, 0xC727, 0x9FA8, 0xC729, + 0x9FA9, 0xC72A, 0x9FAA, 0xC72B, 0x9FAB, 0xC72C, 0x9FAC, 0xC72D, + 0x9FAD, 0xC72E, 0x9FAE, 0xC72F, 0x9FAF, 0xC732, 0x9FB0, 0xC734, + 0x9FB1, 0xC736, 0x9FB2, 0xC738, 0x9FB3, 0xC739, 0x9FB4, 0xC73A, + 0x9FB5, 0xC73B, 0x9FB6, 0xC73E, 0x9FB7, 0xC73F, 0x9FB8, 0xC741, + 0x9FB9, 0xC742, 0x9FBA, 0xC743, 0x9FBB, 0xC745, 0x9FBC, 0xC746, + 0x9FBD, 0xC747, 0x9FBE, 0xC748, 0x9FBF, 0xC749, 0x9FC0, 0xC74B, + 0x9FC1, 0xC74E, 0x9FC2, 0xC750, 0x9FC3, 0xC759, 0x9FC4, 0xC75A, + 0x9FC5, 0xC75B, 0x9FC6, 0xC75D, 0x9FC7, 0xC75E, 0x9FC8, 0xC75F, + 0x9FC9, 0xC761, 0x9FCA, 0xC762, 0x9FCB, 0xC763, 0x9FCC, 0xC764, + 0x9FCD, 0xC765, 0x9FCE, 0xC766, 0x9FCF, 0xC767, 0x9FD0, 0xC769, + 0x9FD1, 0xC76A, 0x9FD2, 0xC76C, 0x9FD3, 0xC76D, 0x9FD4, 0xC76E, + 0x9FD5, 0xC76F, 0x9FD6, 0xC770, 0x9FD7, 0xC771, 0x9FD8, 0xC772, + 0x9FD9, 0xC773, 0x9FDA, 0xC776, 0x9FDB, 0xC777, 0x9FDC, 0xC779, + 0x9FDD, 0xC77A, 0x9FDE, 0xC77B, 0x9FDF, 0xC77F, 0x9FE0, 0xC780, + 0x9FE1, 0xC781, 0x9FE2, 0xC782, 0x9FE3, 0xC786, 0x9FE4, 0xC78B, + 0x9FE5, 0xC78C, 0x9FE6, 0xC78D, 0x9FE7, 0xC78F, 0x9FE8, 0xC792, + 0x9FE9, 0xC793, 0x9FEA, 0xC795, 0x9FEB, 0xC799, 0x9FEC, 0xC79B, + 0x9FED, 0xC79C, 0x9FEE, 0xC79D, 0x9FEF, 0xC79E, 0x9FF0, 0xC79F, + 0x9FF1, 0xC7A2, 0x9FF2, 0xC7A7, 0x9FF3, 0xC7A8, 0x9FF4, 0xC7A9, + 0x9FF5, 0xC7AA, 0x9FF6, 0xC7AB, 0x9FF7, 0xC7AE, 0x9FF8, 0xC7AF, + 0x9FF9, 0xC7B1, 0x9FFA, 0xC7B2, 0x9FFB, 0xC7B3, 0x9FFC, 0xC7B5, + 0x9FFD, 0xC7B6, 0x9FFE, 0xC7B7, 0xA041, 0xC7B8, 0xA042, 0xC7B9, + 0xA043, 0xC7BA, 0xA044, 0xC7BB, 0xA045, 0xC7BE, 0xA046, 0xC7C2, + 0xA047, 0xC7C3, 0xA048, 0xC7C4, 0xA049, 0xC7C5, 0xA04A, 0xC7C6, + 0xA04B, 0xC7C7, 0xA04C, 0xC7CA, 0xA04D, 0xC7CB, 0xA04E, 0xC7CD, + 0xA04F, 0xC7CF, 0xA050, 0xC7D1, 0xA051, 0xC7D2, 0xA052, 0xC7D3, + 0xA053, 0xC7D4, 0xA054, 0xC7D5, 0xA055, 0xC7D6, 0xA056, 0xC7D7, + 0xA057, 0xC7D9, 0xA058, 0xC7DA, 0xA059, 0xC7DB, 0xA05A, 0xC7DC, + 0xA061, 0xC7DE, 0xA062, 0xC7DF, 0xA063, 0xC7E0, 0xA064, 0xC7E1, + 0xA065, 0xC7E2, 0xA066, 0xC7E3, 0xA067, 0xC7E5, 0xA068, 0xC7E6, + 0xA069, 0xC7E7, 0xA06A, 0xC7E9, 0xA06B, 0xC7EA, 0xA06C, 0xC7EB, + 0xA06D, 0xC7ED, 0xA06E, 0xC7EE, 0xA06F, 0xC7EF, 0xA070, 0xC7F0, + 0xA071, 0xC7F1, 0xA072, 0xC7F2, 0xA073, 0xC7F3, 0xA074, 0xC7F4, + 0xA075, 0xC7F5, 0xA076, 0xC7F6, 0xA077, 0xC7F7, 0xA078, 0xC7F8, + 0xA079, 0xC7F9, 0xA07A, 0xC7FA, 0xA081, 0xC7FB, 0xA082, 0xC7FC, + 0xA083, 0xC7FD, 0xA084, 0xC7FE, 0xA085, 0xC7FF, 0xA086, 0xC802, + 0xA087, 0xC803, 0xA088, 0xC805, 0xA089, 0xC806, 0xA08A, 0xC807, + 0xA08B, 0xC809, 0xA08C, 0xC80B, 0xA08D, 0xC80C, 0xA08E, 0xC80D, + 0xA08F, 0xC80E, 0xA090, 0xC80F, 0xA091, 0xC812, 0xA092, 0xC814, + 0xA093, 0xC817, 0xA094, 0xC818, 0xA095, 0xC819, 0xA096, 0xC81A, + 0xA097, 0xC81B, 0xA098, 0xC81E, 0xA099, 0xC81F, 0xA09A, 0xC821, + 0xA09B, 0xC822, 0xA09C, 0xC823, 0xA09D, 0xC825, 0xA09E, 0xC826, + 0xA09F, 0xC827, 0xA0A0, 0xC828, 0xA0A1, 0xC829, 0xA0A2, 0xC82A, + 0xA0A3, 0xC82B, 0xA0A4, 0xC82E, 0xA0A5, 0xC830, 0xA0A6, 0xC832, + 0xA0A7, 0xC833, 0xA0A8, 0xC834, 0xA0A9, 0xC835, 0xA0AA, 0xC836, + 0xA0AB, 0xC837, 0xA0AC, 0xC839, 0xA0AD, 0xC83A, 0xA0AE, 0xC83B, + 0xA0AF, 0xC83D, 0xA0B0, 0xC83E, 0xA0B1, 0xC83F, 0xA0B2, 0xC841, + 0xA0B3, 0xC842, 0xA0B4, 0xC843, 0xA0B5, 0xC844, 0xA0B6, 0xC845, + 0xA0B7, 0xC846, 0xA0B8, 0xC847, 0xA0B9, 0xC84A, 0xA0BA, 0xC84B, + 0xA0BB, 0xC84E, 0xA0BC, 0xC84F, 0xA0BD, 0xC850, 0xA0BE, 0xC851, + 0xA0BF, 0xC852, 0xA0C0, 0xC853, 0xA0C1, 0xC855, 0xA0C2, 0xC856, + 0xA0C3, 0xC857, 0xA0C4, 0xC858, 0xA0C5, 0xC859, 0xA0C6, 0xC85A, + 0xA0C7, 0xC85B, 0xA0C8, 0xC85C, 0xA0C9, 0xC85D, 0xA0CA, 0xC85E, + 0xA0CB, 0xC85F, 0xA0CC, 0xC860, 0xA0CD, 0xC861, 0xA0CE, 0xC862, + 0xA0CF, 0xC863, 0xA0D0, 0xC864, 0xA0D1, 0xC865, 0xA0D2, 0xC866, + 0xA0D3, 0xC867, 0xA0D4, 0xC868, 0xA0D5, 0xC869, 0xA0D6, 0xC86A, + 0xA0D7, 0xC86B, 0xA0D8, 0xC86C, 0xA0D9, 0xC86D, 0xA0DA, 0xC86E, + 0xA0DB, 0xC86F, 0xA0DC, 0xC872, 0xA0DD, 0xC873, 0xA0DE, 0xC875, + 0xA0DF, 0xC876, 0xA0E0, 0xC877, 0xA0E1, 0xC879, 0xA0E2, 0xC87B, + 0xA0E3, 0xC87C, 0xA0E4, 0xC87D, 0xA0E5, 0xC87E, 0xA0E6, 0xC87F, + 0xA0E7, 0xC882, 0xA0E8, 0xC884, 0xA0E9, 0xC888, 0xA0EA, 0xC889, + 0xA0EB, 0xC88A, 0xA0EC, 0xC88E, 0xA0ED, 0xC88F, 0xA0EE, 0xC890, + 0xA0EF, 0xC891, 0xA0F0, 0xC892, 0xA0F1, 0xC893, 0xA0F2, 0xC895, + 0xA0F3, 0xC896, 0xA0F4, 0xC897, 0xA0F5, 0xC898, 0xA0F6, 0xC899, + 0xA0F7, 0xC89A, 0xA0F8, 0xC89B, 0xA0F9, 0xC89C, 0xA0FA, 0xC89E, + 0xA0FB, 0xC8A0, 0xA0FC, 0xC8A2, 0xA0FD, 0xC8A3, 0xA0FE, 0xC8A4, + 0xA141, 0xC8A5, 0xA142, 0xC8A6, 0xA143, 0xC8A7, 0xA144, 0xC8A9, + 0xA145, 0xC8AA, 0xA146, 0xC8AB, 0xA147, 0xC8AC, 0xA148, 0xC8AD, + 0xA149, 0xC8AE, 0xA14A, 0xC8AF, 0xA14B, 0xC8B0, 0xA14C, 0xC8B1, + 0xA14D, 0xC8B2, 0xA14E, 0xC8B3, 0xA14F, 0xC8B4, 0xA150, 0xC8B5, + 0xA151, 0xC8B6, 0xA152, 0xC8B7, 0xA153, 0xC8B8, 0xA154, 0xC8B9, + 0xA155, 0xC8BA, 0xA156, 0xC8BB, 0xA157, 0xC8BE, 0xA158, 0xC8BF, + 0xA159, 0xC8C0, 0xA15A, 0xC8C1, 0xA161, 0xC8C2, 0xA162, 0xC8C3, + 0xA163, 0xC8C5, 0xA164, 0xC8C6, 0xA165, 0xC8C7, 0xA166, 0xC8C9, + 0xA167, 0xC8CA, 0xA168, 0xC8CB, 0xA169, 0xC8CD, 0xA16A, 0xC8CE, + 0xA16B, 0xC8CF, 0xA16C, 0xC8D0, 0xA16D, 0xC8D1, 0xA16E, 0xC8D2, + 0xA16F, 0xC8D3, 0xA170, 0xC8D6, 0xA171, 0xC8D8, 0xA172, 0xC8DA, + 0xA173, 0xC8DB, 0xA174, 0xC8DC, 0xA175, 0xC8DD, 0xA176, 0xC8DE, + 0xA177, 0xC8DF, 0xA178, 0xC8E2, 0xA179, 0xC8E3, 0xA17A, 0xC8E5, + 0xA181, 0xC8E6, 0xA182, 0xC8E7, 0xA183, 0xC8E8, 0xA184, 0xC8E9, + 0xA185, 0xC8EA, 0xA186, 0xC8EB, 0xA187, 0xC8EC, 0xA188, 0xC8ED, + 0xA189, 0xC8EE, 0xA18A, 0xC8EF, 0xA18B, 0xC8F0, 0xA18C, 0xC8F1, + 0xA18D, 0xC8F2, 0xA18E, 0xC8F3, 0xA18F, 0xC8F4, 0xA190, 0xC8F6, + 0xA191, 0xC8F7, 0xA192, 0xC8F8, 0xA193, 0xC8F9, 0xA194, 0xC8FA, + 0xA195, 0xC8FB, 0xA196, 0xC8FE, 0xA197, 0xC8FF, 0xA198, 0xC901, + 0xA199, 0xC902, 0xA19A, 0xC903, 0xA19B, 0xC907, 0xA19C, 0xC908, + 0xA19D, 0xC909, 0xA19E, 0xC90A, 0xA19F, 0xC90B, 0xA1A0, 0xC90E, + 0xA1A1, 0x3000, 0xA1A2, 0x3001, 0xA1A3, 0x3002, 0xA1A4, 0x00B7, + 0xA1A5, 0x2025, 0xA1A6, 0x2026, 0xA1A7, 0x00A8, 0xA1A8, 0x3003, + 0xA1A9, 0x00AD, 0xA1AA, 0x2015, 0xA1AB, 0x2225, 0xA1AC, 0xFF3C, + 0xA1AD, 0x223C, 0xA1AE, 0x2018, 0xA1AF, 0x2019, 0xA1B0, 0x201C, + 0xA1B1, 0x201D, 0xA1B2, 0x3014, 0xA1B3, 0x3015, 0xA1B4, 0x3008, + 0xA1B5, 0x3009, 0xA1B6, 0x300A, 0xA1B7, 0x300B, 0xA1B8, 0x300C, + 0xA1B9, 0x300D, 0xA1BA, 0x300E, 0xA1BB, 0x300F, 0xA1BC, 0x3010, + 0xA1BD, 0x3011, 0xA1BE, 0x00B1, 0xA1BF, 0x00D7, 0xA1C0, 0x00F7, + 0xA1C1, 0x2260, 0xA1C2, 0x2264, 0xA1C3, 0x2265, 0xA1C4, 0x221E, + 0xA1C5, 0x2234, 0xA1C6, 0x00B0, 0xA1C7, 0x2032, 0xA1C8, 0x2033, + 0xA1C9, 0x2103, 0xA1CA, 0x212B, 0xA1CB, 0xFFE0, 0xA1CC, 0xFFE1, + 0xA1CD, 0xFFE5, 0xA1CE, 0x2642, 0xA1CF, 0x2640, 0xA1D0, 0x2220, + 0xA1D1, 0x22A5, 0xA1D2, 0x2312, 0xA1D3, 0x2202, 0xA1D4, 0x2207, + 0xA1D5, 0x2261, 0xA1D6, 0x2252, 0xA1D7, 0x00A7, 0xA1D8, 0x203B, + 0xA1D9, 0x2606, 0xA1DA, 0x2605, 0xA1DB, 0x25CB, 0xA1DC, 0x25CF, + 0xA1DD, 0x25CE, 0xA1DE, 0x25C7, 0xA1DF, 0x25C6, 0xA1E0, 0x25A1, + 0xA1E1, 0x25A0, 0xA1E2, 0x25B3, 0xA1E3, 0x25B2, 0xA1E4, 0x25BD, + 0xA1E5, 0x25BC, 0xA1E6, 0x2192, 0xA1E7, 0x2190, 0xA1E8, 0x2191, + 0xA1E9, 0x2193, 0xA1EA, 0x2194, 0xA1EB, 0x3013, 0xA1EC, 0x226A, + 0xA1ED, 0x226B, 0xA1EE, 0x221A, 0xA1EF, 0x223D, 0xA1F0, 0x221D, + 0xA1F1, 0x2235, 0xA1F2, 0x222B, 0xA1F3, 0x222C, 0xA1F4, 0x2208, + 0xA1F5, 0x220B, 0xA1F6, 0x2286, 0xA1F7, 0x2287, 0xA1F8, 0x2282, + 0xA1F9, 0x2283, 0xA1FA, 0x222A, 0xA1FB, 0x2229, 0xA1FC, 0x2227, + 0xA1FD, 0x2228, 0xA1FE, 0xFFE2, 0xA241, 0xC910, 0xA242, 0xC912, + 0xA243, 0xC913, 0xA244, 0xC914, 0xA245, 0xC915, 0xA246, 0xC916, + 0xA247, 0xC917, 0xA248, 0xC919, 0xA249, 0xC91A, 0xA24A, 0xC91B, + 0xA24B, 0xC91C, 0xA24C, 0xC91D, 0xA24D, 0xC91E, 0xA24E, 0xC91F, + 0xA24F, 0xC920, 0xA250, 0xC921, 0xA251, 0xC922, 0xA252, 0xC923, + 0xA253, 0xC924, 0xA254, 0xC925, 0xA255, 0xC926, 0xA256, 0xC927, + 0xA257, 0xC928, 0xA258, 0xC929, 0xA259, 0xC92A, 0xA25A, 0xC92B, + 0xA261, 0xC92D, 0xA262, 0xC92E, 0xA263, 0xC92F, 0xA264, 0xC930, + 0xA265, 0xC931, 0xA266, 0xC932, 0xA267, 0xC933, 0xA268, 0xC935, + 0xA269, 0xC936, 0xA26A, 0xC937, 0xA26B, 0xC938, 0xA26C, 0xC939, + 0xA26D, 0xC93A, 0xA26E, 0xC93B, 0xA26F, 0xC93C, 0xA270, 0xC93D, + 0xA271, 0xC93E, 0xA272, 0xC93F, 0xA273, 0xC940, 0xA274, 0xC941, + 0xA275, 0xC942, 0xA276, 0xC943, 0xA277, 0xC944, 0xA278, 0xC945, + 0xA279, 0xC946, 0xA27A, 0xC947, 0xA281, 0xC948, 0xA282, 0xC949, + 0xA283, 0xC94A, 0xA284, 0xC94B, 0xA285, 0xC94C, 0xA286, 0xC94D, + 0xA287, 0xC94E, 0xA288, 0xC94F, 0xA289, 0xC952, 0xA28A, 0xC953, + 0xA28B, 0xC955, 0xA28C, 0xC956, 0xA28D, 0xC957, 0xA28E, 0xC959, + 0xA28F, 0xC95A, 0xA290, 0xC95B, 0xA291, 0xC95C, 0xA292, 0xC95D, + 0xA293, 0xC95E, 0xA294, 0xC95F, 0xA295, 0xC962, 0xA296, 0xC964, + 0xA297, 0xC965, 0xA298, 0xC966, 0xA299, 0xC967, 0xA29A, 0xC968, + 0xA29B, 0xC969, 0xA29C, 0xC96A, 0xA29D, 0xC96B, 0xA29E, 0xC96D, + 0xA29F, 0xC96E, 0xA2A0, 0xC96F, 0xA2A1, 0x21D2, 0xA2A2, 0x21D4, + 0xA2A3, 0x2200, 0xA2A4, 0x2203, 0xA2A5, 0x00B4, 0xA2A6, 0xFF5E, + 0xA2A7, 0x02C7, 0xA2A8, 0x02D8, 0xA2A9, 0x02DD, 0xA2AA, 0x02DA, + 0xA2AB, 0x02D9, 0xA2AC, 0x00B8, 0xA2AD, 0x02DB, 0xA2AE, 0x00A1, + 0xA2AF, 0x00BF, 0xA2B0, 0x02D0, 0xA2B1, 0x222E, 0xA2B2, 0x2211, + 0xA2B3, 0x220F, 0xA2B4, 0x00A4, 0xA2B5, 0x2109, 0xA2B6, 0x2030, + 0xA2B7, 0x25C1, 0xA2B8, 0x25C0, 0xA2B9, 0x25B7, 0xA2BA, 0x25B6, + 0xA2BB, 0x2664, 0xA2BC, 0x2660, 0xA2BD, 0x2661, 0xA2BE, 0x2665, + 0xA2BF, 0x2667, 0xA2C0, 0x2663, 0xA2C1, 0x2299, 0xA2C2, 0x25C8, + 0xA2C3, 0x25A3, 0xA2C4, 0x25D0, 0xA2C5, 0x25D1, 0xA2C6, 0x2592, + 0xA2C7, 0x25A4, 0xA2C8, 0x25A5, 0xA2C9, 0x25A8, 0xA2CA, 0x25A7, + 0xA2CB, 0x25A6, 0xA2CC, 0x25A9, 0xA2CD, 0x2668, 0xA2CE, 0x260F, + 0xA2CF, 0x260E, 0xA2D0, 0x261C, 0xA2D1, 0x261E, 0xA2D2, 0x00B6, + 0xA2D3, 0x2020, 0xA2D4, 0x2021, 0xA2D5, 0x2195, 0xA2D6, 0x2197, + 0xA2D7, 0x2199, 0xA2D8, 0x2196, 0xA2D9, 0x2198, 0xA2DA, 0x266D, + 0xA2DB, 0x2669, 0xA2DC, 0x266A, 0xA2DD, 0x266C, 0xA2DE, 0x327F, + 0xA2DF, 0x321C, 0xA2E0, 0x2116, 0xA2E1, 0x33C7, 0xA2E2, 0x2122, + 0xA2E3, 0x33C2, 0xA2E4, 0x33D8, 0xA2E5, 0x2121, 0xA2E6, 0x20AC, + 0xA2E7, 0x00AE, 0xA341, 0xC971, 0xA342, 0xC972, 0xA343, 0xC973, + 0xA344, 0xC975, 0xA345, 0xC976, 0xA346, 0xC977, 0xA347, 0xC978, + 0xA348, 0xC979, 0xA349, 0xC97A, 0xA34A, 0xC97B, 0xA34B, 0xC97D, + 0xA34C, 0xC97E, 0xA34D, 0xC97F, 0xA34E, 0xC980, 0xA34F, 0xC981, + 0xA350, 0xC982, 0xA351, 0xC983, 0xA352, 0xC984, 0xA353, 0xC985, + 0xA354, 0xC986, 0xA355, 0xC987, 0xA356, 0xC98A, 0xA357, 0xC98B, + 0xA358, 0xC98D, 0xA359, 0xC98E, 0xA35A, 0xC98F, 0xA361, 0xC991, + 0xA362, 0xC992, 0xA363, 0xC993, 0xA364, 0xC994, 0xA365, 0xC995, + 0xA366, 0xC996, 0xA367, 0xC997, 0xA368, 0xC99A, 0xA369, 0xC99C, + 0xA36A, 0xC99E, 0xA36B, 0xC99F, 0xA36C, 0xC9A0, 0xA36D, 0xC9A1, + 0xA36E, 0xC9A2, 0xA36F, 0xC9A3, 0xA370, 0xC9A4, 0xA371, 0xC9A5, + 0xA372, 0xC9A6, 0xA373, 0xC9A7, 0xA374, 0xC9A8, 0xA375, 0xC9A9, + 0xA376, 0xC9AA, 0xA377, 0xC9AB, 0xA378, 0xC9AC, 0xA379, 0xC9AD, + 0xA37A, 0xC9AE, 0xA381, 0xC9AF, 0xA382, 0xC9B0, 0xA383, 0xC9B1, + 0xA384, 0xC9B2, 0xA385, 0xC9B3, 0xA386, 0xC9B4, 0xA387, 0xC9B5, + 0xA388, 0xC9B6, 0xA389, 0xC9B7, 0xA38A, 0xC9B8, 0xA38B, 0xC9B9, + 0xA38C, 0xC9BA, 0xA38D, 0xC9BB, 0xA38E, 0xC9BC, 0xA38F, 0xC9BD, + 0xA390, 0xC9BE, 0xA391, 0xC9BF, 0xA392, 0xC9C2, 0xA393, 0xC9C3, + 0xA394, 0xC9C5, 0xA395, 0xC9C6, 0xA396, 0xC9C9, 0xA397, 0xC9CB, + 0xA398, 0xC9CC, 0xA399, 0xC9CD, 0xA39A, 0xC9CE, 0xA39B, 0xC9CF, + 0xA39C, 0xC9D2, 0xA39D, 0xC9D4, 0xA39E, 0xC9D7, 0xA39F, 0xC9D8, + 0xA3A0, 0xC9DB, 0xA3A1, 0xFF01, 0xA3A2, 0xFF02, 0xA3A3, 0xFF03, + 0xA3A4, 0xFF04, 0xA3A5, 0xFF05, 0xA3A6, 0xFF06, 0xA3A7, 0xFF07, + 0xA3A8, 0xFF08, 0xA3A9, 0xFF09, 0xA3AA, 0xFF0A, 0xA3AB, 0xFF0B, + 0xA3AC, 0xFF0C, 0xA3AD, 0xFF0D, 0xA3AE, 0xFF0E, 0xA3AF, 0xFF0F, + 0xA3B0, 0xFF10, 0xA3B1, 0xFF11, 0xA3B2, 0xFF12, 0xA3B3, 0xFF13, + 0xA3B4, 0xFF14, 0xA3B5, 0xFF15, 0xA3B6, 0xFF16, 0xA3B7, 0xFF17, + 0xA3B8, 0xFF18, 0xA3B9, 0xFF19, 0xA3BA, 0xFF1A, 0xA3BB, 0xFF1B, + 0xA3BC, 0xFF1C, 0xA3BD, 0xFF1D, 0xA3BE, 0xFF1E, 0xA3BF, 0xFF1F, + 0xA3C0, 0xFF20, 0xA3C1, 0xFF21, 0xA3C2, 0xFF22, 0xA3C3, 0xFF23, + 0xA3C4, 0xFF24, 0xA3C5, 0xFF25, 0xA3C6, 0xFF26, 0xA3C7, 0xFF27, + 0xA3C8, 0xFF28, 0xA3C9, 0xFF29, 0xA3CA, 0xFF2A, 0xA3CB, 0xFF2B, + 0xA3CC, 0xFF2C, 0xA3CD, 0xFF2D, 0xA3CE, 0xFF2E, 0xA3CF, 0xFF2F, + 0xA3D0, 0xFF30, 0xA3D1, 0xFF31, 0xA3D2, 0xFF32, 0xA3D3, 0xFF33, + 0xA3D4, 0xFF34, 0xA3D5, 0xFF35, 0xA3D6, 0xFF36, 0xA3D7, 0xFF37, + 0xA3D8, 0xFF38, 0xA3D9, 0xFF39, 0xA3DA, 0xFF3A, 0xA3DB, 0xFF3B, + 0xA3DC, 0xFFE6, 0xA3DD, 0xFF3D, 0xA3DE, 0xFF3E, 0xA3DF, 0xFF3F, + 0xA3E0, 0xFF40, 0xA3E1, 0xFF41, 0xA3E2, 0xFF42, 0xA3E3, 0xFF43, + 0xA3E4, 0xFF44, 0xA3E5, 0xFF45, 0xA3E6, 0xFF46, 0xA3E7, 0xFF47, + 0xA3E8, 0xFF48, 0xA3E9, 0xFF49, 0xA3EA, 0xFF4A, 0xA3EB, 0xFF4B, + 0xA3EC, 0xFF4C, 0xA3ED, 0xFF4D, 0xA3EE, 0xFF4E, 0xA3EF, 0xFF4F, + 0xA3F0, 0xFF50, 0xA3F1, 0xFF51, 0xA3F2, 0xFF52, 0xA3F3, 0xFF53, + 0xA3F4, 0xFF54, 0xA3F5, 0xFF55, 0xA3F6, 0xFF56, 0xA3F7, 0xFF57, + 0xA3F8, 0xFF58, 0xA3F9, 0xFF59, 0xA3FA, 0xFF5A, 0xA3FB, 0xFF5B, + 0xA3FC, 0xFF5C, 0xA3FD, 0xFF5D, 0xA3FE, 0xFFE3, 0xA441, 0xC9DE, + 0xA442, 0xC9DF, 0xA443, 0xC9E1, 0xA444, 0xC9E3, 0xA445, 0xC9E5, + 0xA446, 0xC9E6, 0xA447, 0xC9E8, 0xA448, 0xC9E9, 0xA449, 0xC9EA, + 0xA44A, 0xC9EB, 0xA44B, 0xC9EE, 0xA44C, 0xC9F2, 0xA44D, 0xC9F3, + 0xA44E, 0xC9F4, 0xA44F, 0xC9F5, 0xA450, 0xC9F6, 0xA451, 0xC9F7, + 0xA452, 0xC9FA, 0xA453, 0xC9FB, 0xA454, 0xC9FD, 0xA455, 0xC9FE, + 0xA456, 0xC9FF, 0xA457, 0xCA01, 0xA458, 0xCA02, 0xA459, 0xCA03, + 0xA45A, 0xCA04, 0xA461, 0xCA05, 0xA462, 0xCA06, 0xA463, 0xCA07, + 0xA464, 0xCA0A, 0xA465, 0xCA0E, 0xA466, 0xCA0F, 0xA467, 0xCA10, + 0xA468, 0xCA11, 0xA469, 0xCA12, 0xA46A, 0xCA13, 0xA46B, 0xCA15, + 0xA46C, 0xCA16, 0xA46D, 0xCA17, 0xA46E, 0xCA19, 0xA46F, 0xCA1A, + 0xA470, 0xCA1B, 0xA471, 0xCA1C, 0xA472, 0xCA1D, 0xA473, 0xCA1E, + 0xA474, 0xCA1F, 0xA475, 0xCA20, 0xA476, 0xCA21, 0xA477, 0xCA22, + 0xA478, 0xCA23, 0xA479, 0xCA24, 0xA47A, 0xCA25, 0xA481, 0xCA26, + 0xA482, 0xCA27, 0xA483, 0xCA28, 0xA484, 0xCA2A, 0xA485, 0xCA2B, + 0xA486, 0xCA2C, 0xA487, 0xCA2D, 0xA488, 0xCA2E, 0xA489, 0xCA2F, + 0xA48A, 0xCA30, 0xA48B, 0xCA31, 0xA48C, 0xCA32, 0xA48D, 0xCA33, + 0xA48E, 0xCA34, 0xA48F, 0xCA35, 0xA490, 0xCA36, 0xA491, 0xCA37, + 0xA492, 0xCA38, 0xA493, 0xCA39, 0xA494, 0xCA3A, 0xA495, 0xCA3B, + 0xA496, 0xCA3C, 0xA497, 0xCA3D, 0xA498, 0xCA3E, 0xA499, 0xCA3F, + 0xA49A, 0xCA40, 0xA49B, 0xCA41, 0xA49C, 0xCA42, 0xA49D, 0xCA43, + 0xA49E, 0xCA44, 0xA49F, 0xCA45, 0xA4A0, 0xCA46, 0xA4A1, 0x3131, + 0xA4A2, 0x3132, 0xA4A3, 0x3133, 0xA4A4, 0x3134, 0xA4A5, 0x3135, + 0xA4A6, 0x3136, 0xA4A7, 0x3137, 0xA4A8, 0x3138, 0xA4A9, 0x3139, + 0xA4AA, 0x313A, 0xA4AB, 0x313B, 0xA4AC, 0x313C, 0xA4AD, 0x313D, + 0xA4AE, 0x313E, 0xA4AF, 0x313F, 0xA4B0, 0x3140, 0xA4B1, 0x3141, + 0xA4B2, 0x3142, 0xA4B3, 0x3143, 0xA4B4, 0x3144, 0xA4B5, 0x3145, + 0xA4B6, 0x3146, 0xA4B7, 0x3147, 0xA4B8, 0x3148, 0xA4B9, 0x3149, + 0xA4BA, 0x314A, 0xA4BB, 0x314B, 0xA4BC, 0x314C, 0xA4BD, 0x314D, + 0xA4BE, 0x314E, 0xA4BF, 0x314F, 0xA4C0, 0x3150, 0xA4C1, 0x3151, + 0xA4C2, 0x3152, 0xA4C3, 0x3153, 0xA4C4, 0x3154, 0xA4C5, 0x3155, + 0xA4C6, 0x3156, 0xA4C7, 0x3157, 0xA4C8, 0x3158, 0xA4C9, 0x3159, + 0xA4CA, 0x315A, 0xA4CB, 0x315B, 0xA4CC, 0x315C, 0xA4CD, 0x315D, + 0xA4CE, 0x315E, 0xA4CF, 0x315F, 0xA4D0, 0x3160, 0xA4D1, 0x3161, + 0xA4D2, 0x3162, 0xA4D3, 0x3163, 0xA4D4, 0x3164, 0xA4D5, 0x3165, + 0xA4D6, 0x3166, 0xA4D7, 0x3167, 0xA4D8, 0x3168, 0xA4D9, 0x3169, + 0xA4DA, 0x316A, 0xA4DB, 0x316B, 0xA4DC, 0x316C, 0xA4DD, 0x316D, + 0xA4DE, 0x316E, 0xA4DF, 0x316F, 0xA4E0, 0x3170, 0xA4E1, 0x3171, + 0xA4E2, 0x3172, 0xA4E3, 0x3173, 0xA4E4, 0x3174, 0xA4E5, 0x3175, + 0xA4E6, 0x3176, 0xA4E7, 0x3177, 0xA4E8, 0x3178, 0xA4E9, 0x3179, + 0xA4EA, 0x317A, 0xA4EB, 0x317B, 0xA4EC, 0x317C, 0xA4ED, 0x317D, + 0xA4EE, 0x317E, 0xA4EF, 0x317F, 0xA4F0, 0x3180, 0xA4F1, 0x3181, + 0xA4F2, 0x3182, 0xA4F3, 0x3183, 0xA4F4, 0x3184, 0xA4F5, 0x3185, + 0xA4F6, 0x3186, 0xA4F7, 0x3187, 0xA4F8, 0x3188, 0xA4F9, 0x3189, + 0xA4FA, 0x318A, 0xA4FB, 0x318B, 0xA4FC, 0x318C, 0xA4FD, 0x318D, + 0xA4FE, 0x318E, 0xA541, 0xCA47, 0xA542, 0xCA48, 0xA543, 0xCA49, + 0xA544, 0xCA4A, 0xA545, 0xCA4B, 0xA546, 0xCA4E, 0xA547, 0xCA4F, + 0xA548, 0xCA51, 0xA549, 0xCA52, 0xA54A, 0xCA53, 0xA54B, 0xCA55, + 0xA54C, 0xCA56, 0xA54D, 0xCA57, 0xA54E, 0xCA58, 0xA54F, 0xCA59, + 0xA550, 0xCA5A, 0xA551, 0xCA5B, 0xA552, 0xCA5E, 0xA553, 0xCA62, + 0xA554, 0xCA63, 0xA555, 0xCA64, 0xA556, 0xCA65, 0xA557, 0xCA66, + 0xA558, 0xCA67, 0xA559, 0xCA69, 0xA55A, 0xCA6A, 0xA561, 0xCA6B, + 0xA562, 0xCA6C, 0xA563, 0xCA6D, 0xA564, 0xCA6E, 0xA565, 0xCA6F, + 0xA566, 0xCA70, 0xA567, 0xCA71, 0xA568, 0xCA72, 0xA569, 0xCA73, + 0xA56A, 0xCA74, 0xA56B, 0xCA75, 0xA56C, 0xCA76, 0xA56D, 0xCA77, + 0xA56E, 0xCA78, 0xA56F, 0xCA79, 0xA570, 0xCA7A, 0xA571, 0xCA7B, + 0xA572, 0xCA7C, 0xA573, 0xCA7E, 0xA574, 0xCA7F, 0xA575, 0xCA80, + 0xA576, 0xCA81, 0xA577, 0xCA82, 0xA578, 0xCA83, 0xA579, 0xCA85, + 0xA57A, 0xCA86, 0xA581, 0xCA87, 0xA582, 0xCA88, 0xA583, 0xCA89, + 0xA584, 0xCA8A, 0xA585, 0xCA8B, 0xA586, 0xCA8C, 0xA587, 0xCA8D, + 0xA588, 0xCA8E, 0xA589, 0xCA8F, 0xA58A, 0xCA90, 0xA58B, 0xCA91, + 0xA58C, 0xCA92, 0xA58D, 0xCA93, 0xA58E, 0xCA94, 0xA58F, 0xCA95, + 0xA590, 0xCA96, 0xA591, 0xCA97, 0xA592, 0xCA99, 0xA593, 0xCA9A, + 0xA594, 0xCA9B, 0xA595, 0xCA9C, 0xA596, 0xCA9D, 0xA597, 0xCA9E, + 0xA598, 0xCA9F, 0xA599, 0xCAA0, 0xA59A, 0xCAA1, 0xA59B, 0xCAA2, + 0xA59C, 0xCAA3, 0xA59D, 0xCAA4, 0xA59E, 0xCAA5, 0xA59F, 0xCAA6, + 0xA5A0, 0xCAA7, 0xA5A1, 0x2170, 0xA5A2, 0x2171, 0xA5A3, 0x2172, + 0xA5A4, 0x2173, 0xA5A5, 0x2174, 0xA5A6, 0x2175, 0xA5A7, 0x2176, + 0xA5A8, 0x2177, 0xA5A9, 0x2178, 0xA5AA, 0x2179, 0xA5B0, 0x2160, + 0xA5B1, 0x2161, 0xA5B2, 0x2162, 0xA5B3, 0x2163, 0xA5B4, 0x2164, + 0xA5B5, 0x2165, 0xA5B6, 0x2166, 0xA5B7, 0x2167, 0xA5B8, 0x2168, + 0xA5B9, 0x2169, 0xA5C1, 0x0391, 0xA5C2, 0x0392, 0xA5C3, 0x0393, + 0xA5C4, 0x0394, 0xA5C5, 0x0395, 0xA5C6, 0x0396, 0xA5C7, 0x0397, + 0xA5C8, 0x0398, 0xA5C9, 0x0399, 0xA5CA, 0x039A, 0xA5CB, 0x039B, + 0xA5CC, 0x039C, 0xA5CD, 0x039D, 0xA5CE, 0x039E, 0xA5CF, 0x039F, + 0xA5D0, 0x03A0, 0xA5D1, 0x03A1, 0xA5D2, 0x03A3, 0xA5D3, 0x03A4, + 0xA5D4, 0x03A5, 0xA5D5, 0x03A6, 0xA5D6, 0x03A7, 0xA5D7, 0x03A8, + 0xA5D8, 0x03A9, 0xA5E1, 0x03B1, 0xA5E2, 0x03B2, 0xA5E3, 0x03B3, + 0xA5E4, 0x03B4, 0xA5E5, 0x03B5, 0xA5E6, 0x03B6, 0xA5E7, 0x03B7, + 0xA5E8, 0x03B8, 0xA5E9, 0x03B9, 0xA5EA, 0x03BA, 0xA5EB, 0x03BB, + 0xA5EC, 0x03BC, 0xA5ED, 0x03BD, 0xA5EE, 0x03BE, 0xA5EF, 0x03BF, + 0xA5F0, 0x03C0, 0xA5F1, 0x03C1, 0xA5F2, 0x03C3, 0xA5F3, 0x03C4, + 0xA5F4, 0x03C5, 0xA5F5, 0x03C6, 0xA5F6, 0x03C7, 0xA5F7, 0x03C8, + 0xA5F8, 0x03C9, 0xA641, 0xCAA8, 0xA642, 0xCAA9, 0xA643, 0xCAAA, + 0xA644, 0xCAAB, 0xA645, 0xCAAC, 0xA646, 0xCAAD, 0xA647, 0xCAAE, + 0xA648, 0xCAAF, 0xA649, 0xCAB0, 0xA64A, 0xCAB1, 0xA64B, 0xCAB2, + 0xA64C, 0xCAB3, 0xA64D, 0xCAB4, 0xA64E, 0xCAB5, 0xA64F, 0xCAB6, + 0xA650, 0xCAB7, 0xA651, 0xCAB8, 0xA652, 0xCAB9, 0xA653, 0xCABA, + 0xA654, 0xCABB, 0xA655, 0xCABE, 0xA656, 0xCABF, 0xA657, 0xCAC1, + 0xA658, 0xCAC2, 0xA659, 0xCAC3, 0xA65A, 0xCAC5, 0xA661, 0xCAC6, + 0xA662, 0xCAC7, 0xA663, 0xCAC8, 0xA664, 0xCAC9, 0xA665, 0xCACA, + 0xA666, 0xCACB, 0xA667, 0xCACE, 0xA668, 0xCAD0, 0xA669, 0xCAD2, + 0xA66A, 0xCAD4, 0xA66B, 0xCAD5, 0xA66C, 0xCAD6, 0xA66D, 0xCAD7, + 0xA66E, 0xCADA, 0xA66F, 0xCADB, 0xA670, 0xCADC, 0xA671, 0xCADD, + 0xA672, 0xCADE, 0xA673, 0xCADF, 0xA674, 0xCAE1, 0xA675, 0xCAE2, + 0xA676, 0xCAE3, 0xA677, 0xCAE4, 0xA678, 0xCAE5, 0xA679, 0xCAE6, + 0xA67A, 0xCAE7, 0xA681, 0xCAE8, 0xA682, 0xCAE9, 0xA683, 0xCAEA, + 0xA684, 0xCAEB, 0xA685, 0xCAED, 0xA686, 0xCAEE, 0xA687, 0xCAEF, + 0xA688, 0xCAF0, 0xA689, 0xCAF1, 0xA68A, 0xCAF2, 0xA68B, 0xCAF3, + 0xA68C, 0xCAF5, 0xA68D, 0xCAF6, 0xA68E, 0xCAF7, 0xA68F, 0xCAF8, + 0xA690, 0xCAF9, 0xA691, 0xCAFA, 0xA692, 0xCAFB, 0xA693, 0xCAFC, + 0xA694, 0xCAFD, 0xA695, 0xCAFE, 0xA696, 0xCAFF, 0xA697, 0xCB00, + 0xA698, 0xCB01, 0xA699, 0xCB02, 0xA69A, 0xCB03, 0xA69B, 0xCB04, + 0xA69C, 0xCB05, 0xA69D, 0xCB06, 0xA69E, 0xCB07, 0xA69F, 0xCB09, + 0xA6A0, 0xCB0A, 0xA6A1, 0x2500, 0xA6A2, 0x2502, 0xA6A3, 0x250C, + 0xA6A4, 0x2510, 0xA6A5, 0x2518, 0xA6A6, 0x2514, 0xA6A7, 0x251C, + 0xA6A8, 0x252C, 0xA6A9, 0x2524, 0xA6AA, 0x2534, 0xA6AB, 0x253C, + 0xA6AC, 0x2501, 0xA6AD, 0x2503, 0xA6AE, 0x250F, 0xA6AF, 0x2513, + 0xA6B0, 0x251B, 0xA6B1, 0x2517, 0xA6B2, 0x2523, 0xA6B3, 0x2533, + 0xA6B4, 0x252B, 0xA6B5, 0x253B, 0xA6B6, 0x254B, 0xA6B7, 0x2520, + 0xA6B8, 0x252F, 0xA6B9, 0x2528, 0xA6BA, 0x2537, 0xA6BB, 0x253F, + 0xA6BC, 0x251D, 0xA6BD, 0x2530, 0xA6BE, 0x2525, 0xA6BF, 0x2538, + 0xA6C0, 0x2542, 0xA6C1, 0x2512, 0xA6C2, 0x2511, 0xA6C3, 0x251A, + 0xA6C4, 0x2519, 0xA6C5, 0x2516, 0xA6C6, 0x2515, 0xA6C7, 0x250E, + 0xA6C8, 0x250D, 0xA6C9, 0x251E, 0xA6CA, 0x251F, 0xA6CB, 0x2521, + 0xA6CC, 0x2522, 0xA6CD, 0x2526, 0xA6CE, 0x2527, 0xA6CF, 0x2529, + 0xA6D0, 0x252A, 0xA6D1, 0x252D, 0xA6D2, 0x252E, 0xA6D3, 0x2531, + 0xA6D4, 0x2532, 0xA6D5, 0x2535, 0xA6D6, 0x2536, 0xA6D7, 0x2539, + 0xA6D8, 0x253A, 0xA6D9, 0x253D, 0xA6DA, 0x253E, 0xA6DB, 0x2540, + 0xA6DC, 0x2541, 0xA6DD, 0x2543, 0xA6DE, 0x2544, 0xA6DF, 0x2545, + 0xA6E0, 0x2546, 0xA6E1, 0x2547, 0xA6E2, 0x2548, 0xA6E3, 0x2549, + 0xA6E4, 0x254A, 0xA741, 0xCB0B, 0xA742, 0xCB0C, 0xA743, 0xCB0D, + 0xA744, 0xCB0E, 0xA745, 0xCB0F, 0xA746, 0xCB11, 0xA747, 0xCB12, + 0xA748, 0xCB13, 0xA749, 0xCB15, 0xA74A, 0xCB16, 0xA74B, 0xCB17, + 0xA74C, 0xCB19, 0xA74D, 0xCB1A, 0xA74E, 0xCB1B, 0xA74F, 0xCB1C, + 0xA750, 0xCB1D, 0xA751, 0xCB1E, 0xA752, 0xCB1F, 0xA753, 0xCB22, + 0xA754, 0xCB23, 0xA755, 0xCB24, 0xA756, 0xCB25, 0xA757, 0xCB26, + 0xA758, 0xCB27, 0xA759, 0xCB28, 0xA75A, 0xCB29, 0xA761, 0xCB2A, + 0xA762, 0xCB2B, 0xA763, 0xCB2C, 0xA764, 0xCB2D, 0xA765, 0xCB2E, + 0xA766, 0xCB2F, 0xA767, 0xCB30, 0xA768, 0xCB31, 0xA769, 0xCB32, + 0xA76A, 0xCB33, 0xA76B, 0xCB34, 0xA76C, 0xCB35, 0xA76D, 0xCB36, + 0xA76E, 0xCB37, 0xA76F, 0xCB38, 0xA770, 0xCB39, 0xA771, 0xCB3A, + 0xA772, 0xCB3B, 0xA773, 0xCB3C, 0xA774, 0xCB3D, 0xA775, 0xCB3E, + 0xA776, 0xCB3F, 0xA777, 0xCB40, 0xA778, 0xCB42, 0xA779, 0xCB43, + 0xA77A, 0xCB44, 0xA781, 0xCB45, 0xA782, 0xCB46, 0xA783, 0xCB47, + 0xA784, 0xCB4A, 0xA785, 0xCB4B, 0xA786, 0xCB4D, 0xA787, 0xCB4E, + 0xA788, 0xCB4F, 0xA789, 0xCB51, 0xA78A, 0xCB52, 0xA78B, 0xCB53, + 0xA78C, 0xCB54, 0xA78D, 0xCB55, 0xA78E, 0xCB56, 0xA78F, 0xCB57, + 0xA790, 0xCB5A, 0xA791, 0xCB5B, 0xA792, 0xCB5C, 0xA793, 0xCB5E, + 0xA794, 0xCB5F, 0xA795, 0xCB60, 0xA796, 0xCB61, 0xA797, 0xCB62, + 0xA798, 0xCB63, 0xA799, 0xCB65, 0xA79A, 0xCB66, 0xA79B, 0xCB67, + 0xA79C, 0xCB68, 0xA79D, 0xCB69, 0xA79E, 0xCB6A, 0xA79F, 0xCB6B, + 0xA7A0, 0xCB6C, 0xA7A1, 0x3395, 0xA7A2, 0x3396, 0xA7A3, 0x3397, + 0xA7A4, 0x2113, 0xA7A5, 0x3398, 0xA7A6, 0x33C4, 0xA7A7, 0x33A3, + 0xA7A8, 0x33A4, 0xA7A9, 0x33A5, 0xA7AA, 0x33A6, 0xA7AB, 0x3399, + 0xA7AC, 0x339A, 0xA7AD, 0x339B, 0xA7AE, 0x339C, 0xA7AF, 0x339D, + 0xA7B0, 0x339E, 0xA7B1, 0x339F, 0xA7B2, 0x33A0, 0xA7B3, 0x33A1, + 0xA7B4, 0x33A2, 0xA7B5, 0x33CA, 0xA7B6, 0x338D, 0xA7B7, 0x338E, + 0xA7B8, 0x338F, 0xA7B9, 0x33CF, 0xA7BA, 0x3388, 0xA7BB, 0x3389, + 0xA7BC, 0x33C8, 0xA7BD, 0x33A7, 0xA7BE, 0x33A8, 0xA7BF, 0x33B0, + 0xA7C0, 0x33B1, 0xA7C1, 0x33B2, 0xA7C2, 0x33B3, 0xA7C3, 0x33B4, + 0xA7C4, 0x33B5, 0xA7C5, 0x33B6, 0xA7C6, 0x33B7, 0xA7C7, 0x33B8, + 0xA7C8, 0x33B9, 0xA7C9, 0x3380, 0xA7CA, 0x3381, 0xA7CB, 0x3382, + 0xA7CC, 0x3383, 0xA7CD, 0x3384, 0xA7CE, 0x33BA, 0xA7CF, 0x33BB, + 0xA7D0, 0x33BC, 0xA7D1, 0x33BD, 0xA7D2, 0x33BE, 0xA7D3, 0x33BF, + 0xA7D4, 0x3390, 0xA7D5, 0x3391, 0xA7D6, 0x3392, 0xA7D7, 0x3393, + 0xA7D8, 0x3394, 0xA7D9, 0x2126, 0xA7DA, 0x33C0, 0xA7DB, 0x33C1, + 0xA7DC, 0x338A, 0xA7DD, 0x338B, 0xA7DE, 0x338C, 0xA7DF, 0x33D6, + 0xA7E0, 0x33C5, 0xA7E1, 0x33AD, 0xA7E2, 0x33AE, 0xA7E3, 0x33AF, + 0xA7E4, 0x33DB, 0xA7E5, 0x33A9, 0xA7E6, 0x33AA, 0xA7E7, 0x33AB, + 0xA7E8, 0x33AC, 0xA7E9, 0x33DD, 0xA7EA, 0x33D0, 0xA7EB, 0x33D3, + 0xA7EC, 0x33C3, 0xA7ED, 0x33C9, 0xA7EE, 0x33DC, 0xA7EF, 0x33C6, + 0xA841, 0xCB6D, 0xA842, 0xCB6E, 0xA843, 0xCB6F, 0xA844, 0xCB70, + 0xA845, 0xCB71, 0xA846, 0xCB72, 0xA847, 0xCB73, 0xA848, 0xCB74, + 0xA849, 0xCB75, 0xA84A, 0xCB76, 0xA84B, 0xCB77, 0xA84C, 0xCB7A, + 0xA84D, 0xCB7B, 0xA84E, 0xCB7C, 0xA84F, 0xCB7D, 0xA850, 0xCB7E, + 0xA851, 0xCB7F, 0xA852, 0xCB80, 0xA853, 0xCB81, 0xA854, 0xCB82, + 0xA855, 0xCB83, 0xA856, 0xCB84, 0xA857, 0xCB85, 0xA858, 0xCB86, + 0xA859, 0xCB87, 0xA85A, 0xCB88, 0xA861, 0xCB89, 0xA862, 0xCB8A, + 0xA863, 0xCB8B, 0xA864, 0xCB8C, 0xA865, 0xCB8D, 0xA866, 0xCB8E, + 0xA867, 0xCB8F, 0xA868, 0xCB90, 0xA869, 0xCB91, 0xA86A, 0xCB92, + 0xA86B, 0xCB93, 0xA86C, 0xCB94, 0xA86D, 0xCB95, 0xA86E, 0xCB96, + 0xA86F, 0xCB97, 0xA870, 0xCB98, 0xA871, 0xCB99, 0xA872, 0xCB9A, + 0xA873, 0xCB9B, 0xA874, 0xCB9D, 0xA875, 0xCB9E, 0xA876, 0xCB9F, + 0xA877, 0xCBA0, 0xA878, 0xCBA1, 0xA879, 0xCBA2, 0xA87A, 0xCBA3, + 0xA881, 0xCBA4, 0xA882, 0xCBA5, 0xA883, 0xCBA6, 0xA884, 0xCBA7, + 0xA885, 0xCBA8, 0xA886, 0xCBA9, 0xA887, 0xCBAA, 0xA888, 0xCBAB, + 0xA889, 0xCBAC, 0xA88A, 0xCBAD, 0xA88B, 0xCBAE, 0xA88C, 0xCBAF, + 0xA88D, 0xCBB0, 0xA88E, 0xCBB1, 0xA88F, 0xCBB2, 0xA890, 0xCBB3, + 0xA891, 0xCBB4, 0xA892, 0xCBB5, 0xA893, 0xCBB6, 0xA894, 0xCBB7, + 0xA895, 0xCBB9, 0xA896, 0xCBBA, 0xA897, 0xCBBB, 0xA898, 0xCBBC, + 0xA899, 0xCBBD, 0xA89A, 0xCBBE, 0xA89B, 0xCBBF, 0xA89C, 0xCBC0, + 0xA89D, 0xCBC1, 0xA89E, 0xCBC2, 0xA89F, 0xCBC3, 0xA8A0, 0xCBC4, + 0xA8A1, 0x00C6, 0xA8A2, 0x00D0, 0xA8A3, 0x00AA, 0xA8A4, 0x0126, + 0xA8A6, 0x0132, 0xA8A8, 0x013F, 0xA8A9, 0x0141, 0xA8AA, 0x00D8, + 0xA8AB, 0x0152, 0xA8AC, 0x00BA, 0xA8AD, 0x00DE, 0xA8AE, 0x0166, + 0xA8AF, 0x014A, 0xA8B1, 0x3260, 0xA8B2, 0x3261, 0xA8B3, 0x3262, + 0xA8B4, 0x3263, 0xA8B5, 0x3264, 0xA8B6, 0x3265, 0xA8B7, 0x3266, + 0xA8B8, 0x3267, 0xA8B9, 0x3268, 0xA8BA, 0x3269, 0xA8BB, 0x326A, + 0xA8BC, 0x326B, 0xA8BD, 0x326C, 0xA8BE, 0x326D, 0xA8BF, 0x326E, + 0xA8C0, 0x326F, 0xA8C1, 0x3270, 0xA8C2, 0x3271, 0xA8C3, 0x3272, + 0xA8C4, 0x3273, 0xA8C5, 0x3274, 0xA8C6, 0x3275, 0xA8C7, 0x3276, + 0xA8C8, 0x3277, 0xA8C9, 0x3278, 0xA8CA, 0x3279, 0xA8CB, 0x327A, + 0xA8CC, 0x327B, 0xA8CD, 0x24D0, 0xA8CE, 0x24D1, 0xA8CF, 0x24D2, + 0xA8D0, 0x24D3, 0xA8D1, 0x24D4, 0xA8D2, 0x24D5, 0xA8D3, 0x24D6, + 0xA8D4, 0x24D7, 0xA8D5, 0x24D8, 0xA8D6, 0x24D9, 0xA8D7, 0x24DA, + 0xA8D8, 0x24DB, 0xA8D9, 0x24DC, 0xA8DA, 0x24DD, 0xA8DB, 0x24DE, + 0xA8DC, 0x24DF, 0xA8DD, 0x24E0, 0xA8DE, 0x24E1, 0xA8DF, 0x24E2, + 0xA8E0, 0x24E3, 0xA8E1, 0x24E4, 0xA8E2, 0x24E5, 0xA8E3, 0x24E6, + 0xA8E4, 0x24E7, 0xA8E5, 0x24E8, 0xA8E6, 0x24E9, 0xA8E7, 0x2460, + 0xA8E8, 0x2461, 0xA8E9, 0x2462, 0xA8EA, 0x2463, 0xA8EB, 0x2464, + 0xA8EC, 0x2465, 0xA8ED, 0x2466, 0xA8EE, 0x2467, 0xA8EF, 0x2468, + 0xA8F0, 0x2469, 0xA8F1, 0x246A, 0xA8F2, 0x246B, 0xA8F3, 0x246C, + 0xA8F4, 0x246D, 0xA8F5, 0x246E, 0xA8F6, 0x00BD, 0xA8F7, 0x2153, + 0xA8F8, 0x2154, 0xA8F9, 0x00BC, 0xA8FA, 0x00BE, 0xA8FB, 0x215B, + 0xA8FC, 0x215C, 0xA8FD, 0x215D, 0xA8FE, 0x215E, 0xA941, 0xCBC5, + 0xA942, 0xCBC6, 0xA943, 0xCBC7, 0xA944, 0xCBC8, 0xA945, 0xCBC9, + 0xA946, 0xCBCA, 0xA947, 0xCBCB, 0xA948, 0xCBCC, 0xA949, 0xCBCD, + 0xA94A, 0xCBCE, 0xA94B, 0xCBCF, 0xA94C, 0xCBD0, 0xA94D, 0xCBD1, + 0xA94E, 0xCBD2, 0xA94F, 0xCBD3, 0xA950, 0xCBD5, 0xA951, 0xCBD6, + 0xA952, 0xCBD7, 0xA953, 0xCBD8, 0xA954, 0xCBD9, 0xA955, 0xCBDA, + 0xA956, 0xCBDB, 0xA957, 0xCBDC, 0xA958, 0xCBDD, 0xA959, 0xCBDE, + 0xA95A, 0xCBDF, 0xA961, 0xCBE0, 0xA962, 0xCBE1, 0xA963, 0xCBE2, + 0xA964, 0xCBE3, 0xA965, 0xCBE5, 0xA966, 0xCBE6, 0xA967, 0xCBE8, + 0xA968, 0xCBEA, 0xA969, 0xCBEB, 0xA96A, 0xCBEC, 0xA96B, 0xCBED, + 0xA96C, 0xCBEE, 0xA96D, 0xCBEF, 0xA96E, 0xCBF0, 0xA96F, 0xCBF1, + 0xA970, 0xCBF2, 0xA971, 0xCBF3, 0xA972, 0xCBF4, 0xA973, 0xCBF5, + 0xA974, 0xCBF6, 0xA975, 0xCBF7, 0xA976, 0xCBF8, 0xA977, 0xCBF9, + 0xA978, 0xCBFA, 0xA979, 0xCBFB, 0xA97A, 0xCBFC, 0xA981, 0xCBFD, + 0xA982, 0xCBFE, 0xA983, 0xCBFF, 0xA984, 0xCC00, 0xA985, 0xCC01, + 0xA986, 0xCC02, 0xA987, 0xCC03, 0xA988, 0xCC04, 0xA989, 0xCC05, + 0xA98A, 0xCC06, 0xA98B, 0xCC07, 0xA98C, 0xCC08, 0xA98D, 0xCC09, + 0xA98E, 0xCC0A, 0xA98F, 0xCC0B, 0xA990, 0xCC0E, 0xA991, 0xCC0F, + 0xA992, 0xCC11, 0xA993, 0xCC12, 0xA994, 0xCC13, 0xA995, 0xCC15, + 0xA996, 0xCC16, 0xA997, 0xCC17, 0xA998, 0xCC18, 0xA999, 0xCC19, + 0xA99A, 0xCC1A, 0xA99B, 0xCC1B, 0xA99C, 0xCC1E, 0xA99D, 0xCC1F, + 0xA99E, 0xCC20, 0xA99F, 0xCC23, 0xA9A0, 0xCC24, 0xA9A1, 0x00E6, + 0xA9A2, 0x0111, 0xA9A3, 0x00F0, 0xA9A4, 0x0127, 0xA9A5, 0x0131, + 0xA9A6, 0x0133, 0xA9A7, 0x0138, 0xA9A8, 0x0140, 0xA9A9, 0x0142, + 0xA9AA, 0x00F8, 0xA9AB, 0x0153, 0xA9AC, 0x00DF, 0xA9AD, 0x00FE, + 0xA9AE, 0x0167, 0xA9AF, 0x014B, 0xA9B0, 0x0149, 0xA9B1, 0x3200, + 0xA9B2, 0x3201, 0xA9B3, 0x3202, 0xA9B4, 0x3203, 0xA9B5, 0x3204, + 0xA9B6, 0x3205, 0xA9B7, 0x3206, 0xA9B8, 0x3207, 0xA9B9, 0x3208, + 0xA9BA, 0x3209, 0xA9BB, 0x320A, 0xA9BC, 0x320B, 0xA9BD, 0x320C, + 0xA9BE, 0x320D, 0xA9BF, 0x320E, 0xA9C0, 0x320F, 0xA9C1, 0x3210, + 0xA9C2, 0x3211, 0xA9C3, 0x3212, 0xA9C4, 0x3213, 0xA9C5, 0x3214, + 0xA9C6, 0x3215, 0xA9C7, 0x3216, 0xA9C8, 0x3217, 0xA9C9, 0x3218, + 0xA9CA, 0x3219, 0xA9CB, 0x321A, 0xA9CC, 0x321B, 0xA9CD, 0x249C, + 0xA9CE, 0x249D, 0xA9CF, 0x249E, 0xA9D0, 0x249F, 0xA9D1, 0x24A0, + 0xA9D2, 0x24A1, 0xA9D3, 0x24A2, 0xA9D4, 0x24A3, 0xA9D5, 0x24A4, + 0xA9D6, 0x24A5, 0xA9D7, 0x24A6, 0xA9D8, 0x24A7, 0xA9D9, 0x24A8, + 0xA9DA, 0x24A9, 0xA9DB, 0x24AA, 0xA9DC, 0x24AB, 0xA9DD, 0x24AC, + 0xA9DE, 0x24AD, 0xA9DF, 0x24AE, 0xA9E0, 0x24AF, 0xA9E1, 0x24B0, + 0xA9E2, 0x24B1, 0xA9E3, 0x24B2, 0xA9E4, 0x24B3, 0xA9E5, 0x24B4, + 0xA9E6, 0x24B5, 0xA9E7, 0x2474, 0xA9E8, 0x2475, 0xA9E9, 0x2476, + 0xA9EA, 0x2477, 0xA9EB, 0x2478, 0xA9EC, 0x2479, 0xA9ED, 0x247A, + 0xA9EE, 0x247B, 0xA9EF, 0x247C, 0xA9F0, 0x247D, 0xA9F1, 0x247E, + 0xA9F2, 0x247F, 0xA9F3, 0x2480, 0xA9F4, 0x2481, 0xA9F5, 0x2482, + 0xA9F6, 0x00B9, 0xA9F7, 0x00B2, 0xA9F8, 0x00B3, 0xA9F9, 0x2074, + 0xA9FA, 0x207F, 0xA9FB, 0x2081, 0xA9FC, 0x2082, 0xA9FD, 0x2083, + 0xA9FE, 0x2084, 0xAA41, 0xCC25, 0xAA42, 0xCC26, 0xAA43, 0xCC2A, + 0xAA44, 0xCC2B, 0xAA45, 0xCC2D, 0xAA46, 0xCC2F, 0xAA47, 0xCC31, + 0xAA48, 0xCC32, 0xAA49, 0xCC33, 0xAA4A, 0xCC34, 0xAA4B, 0xCC35, + 0xAA4C, 0xCC36, 0xAA4D, 0xCC37, 0xAA4E, 0xCC3A, 0xAA4F, 0xCC3F, + 0xAA50, 0xCC40, 0xAA51, 0xCC41, 0xAA52, 0xCC42, 0xAA53, 0xCC43, + 0xAA54, 0xCC46, 0xAA55, 0xCC47, 0xAA56, 0xCC49, 0xAA57, 0xCC4A, + 0xAA58, 0xCC4B, 0xAA59, 0xCC4D, 0xAA5A, 0xCC4E, 0xAA61, 0xCC4F, + 0xAA62, 0xCC50, 0xAA63, 0xCC51, 0xAA64, 0xCC52, 0xAA65, 0xCC53, + 0xAA66, 0xCC56, 0xAA67, 0xCC5A, 0xAA68, 0xCC5B, 0xAA69, 0xCC5C, + 0xAA6A, 0xCC5D, 0xAA6B, 0xCC5E, 0xAA6C, 0xCC5F, 0xAA6D, 0xCC61, + 0xAA6E, 0xCC62, 0xAA6F, 0xCC63, 0xAA70, 0xCC65, 0xAA71, 0xCC67, + 0xAA72, 0xCC69, 0xAA73, 0xCC6A, 0xAA74, 0xCC6B, 0xAA75, 0xCC6C, + 0xAA76, 0xCC6D, 0xAA77, 0xCC6E, 0xAA78, 0xCC6F, 0xAA79, 0xCC71, + 0xAA7A, 0xCC72, 0xAA81, 0xCC73, 0xAA82, 0xCC74, 0xAA83, 0xCC76, + 0xAA84, 0xCC77, 0xAA85, 0xCC78, 0xAA86, 0xCC79, 0xAA87, 0xCC7A, + 0xAA88, 0xCC7B, 0xAA89, 0xCC7C, 0xAA8A, 0xCC7D, 0xAA8B, 0xCC7E, + 0xAA8C, 0xCC7F, 0xAA8D, 0xCC80, 0xAA8E, 0xCC81, 0xAA8F, 0xCC82, + 0xAA90, 0xCC83, 0xAA91, 0xCC84, 0xAA92, 0xCC85, 0xAA93, 0xCC86, + 0xAA94, 0xCC87, 0xAA95, 0xCC88, 0xAA96, 0xCC89, 0xAA97, 0xCC8A, + 0xAA98, 0xCC8B, 0xAA99, 0xCC8C, 0xAA9A, 0xCC8D, 0xAA9B, 0xCC8E, + 0xAA9C, 0xCC8F, 0xAA9D, 0xCC90, 0xAA9E, 0xCC91, 0xAA9F, 0xCC92, + 0xAAA0, 0xCC93, 0xAAA1, 0x3041, 0xAAA2, 0x3042, 0xAAA3, 0x3043, + 0xAAA4, 0x3044, 0xAAA5, 0x3045, 0xAAA6, 0x3046, 0xAAA7, 0x3047, + 0xAAA8, 0x3048, 0xAAA9, 0x3049, 0xAAAA, 0x304A, 0xAAAB, 0x304B, + 0xAAAC, 0x304C, 0xAAAD, 0x304D, 0xAAAE, 0x304E, 0xAAAF, 0x304F, + 0xAAB0, 0x3050, 0xAAB1, 0x3051, 0xAAB2, 0x3052, 0xAAB3, 0x3053, + 0xAAB4, 0x3054, 0xAAB5, 0x3055, 0xAAB6, 0x3056, 0xAAB7, 0x3057, + 0xAAB8, 0x3058, 0xAAB9, 0x3059, 0xAABA, 0x305A, 0xAABB, 0x305B, + 0xAABC, 0x305C, 0xAABD, 0x305D, 0xAABE, 0x305E, 0xAABF, 0x305F, + 0xAAC0, 0x3060, 0xAAC1, 0x3061, 0xAAC2, 0x3062, 0xAAC3, 0x3063, + 0xAAC4, 0x3064, 0xAAC5, 0x3065, 0xAAC6, 0x3066, 0xAAC7, 0x3067, + 0xAAC8, 0x3068, 0xAAC9, 0x3069, 0xAACA, 0x306A, 0xAACB, 0x306B, + 0xAACC, 0x306C, 0xAACD, 0x306D, 0xAACE, 0x306E, 0xAACF, 0x306F, + 0xAAD0, 0x3070, 0xAAD1, 0x3071, 0xAAD2, 0x3072, 0xAAD3, 0x3073, + 0xAAD4, 0x3074, 0xAAD5, 0x3075, 0xAAD6, 0x3076, 0xAAD7, 0x3077, + 0xAAD8, 0x3078, 0xAAD9, 0x3079, 0xAADA, 0x307A, 0xAADB, 0x307B, + 0xAADC, 0x307C, 0xAADD, 0x307D, 0xAADE, 0x307E, 0xAADF, 0x307F, + 0xAAE0, 0x3080, 0xAAE1, 0x3081, 0xAAE2, 0x3082, 0xAAE3, 0x3083, + 0xAAE4, 0x3084, 0xAAE5, 0x3085, 0xAAE6, 0x3086, 0xAAE7, 0x3087, + 0xAAE8, 0x3088, 0xAAE9, 0x3089, 0xAAEA, 0x308A, 0xAAEB, 0x308B, + 0xAAEC, 0x308C, 0xAAED, 0x308D, 0xAAEE, 0x308E, 0xAAEF, 0x308F, + 0xAAF0, 0x3090, 0xAAF1, 0x3091, 0xAAF2, 0x3092, 0xAAF3, 0x3093, + 0xAB41, 0xCC94, 0xAB42, 0xCC95, 0xAB43, 0xCC96, 0xAB44, 0xCC97, + 0xAB45, 0xCC9A, 0xAB46, 0xCC9B, 0xAB47, 0xCC9D, 0xAB48, 0xCC9E, + 0xAB49, 0xCC9F, 0xAB4A, 0xCCA1, 0xAB4B, 0xCCA2, 0xAB4C, 0xCCA3, + 0xAB4D, 0xCCA4, 0xAB4E, 0xCCA5, 0xAB4F, 0xCCA6, 0xAB50, 0xCCA7, + 0xAB51, 0xCCAA, 0xAB52, 0xCCAE, 0xAB53, 0xCCAF, 0xAB54, 0xCCB0, + 0xAB55, 0xCCB1, 0xAB56, 0xCCB2, 0xAB57, 0xCCB3, 0xAB58, 0xCCB6, + 0xAB59, 0xCCB7, 0xAB5A, 0xCCB9, 0xAB61, 0xCCBA, 0xAB62, 0xCCBB, + 0xAB63, 0xCCBD, 0xAB64, 0xCCBE, 0xAB65, 0xCCBF, 0xAB66, 0xCCC0, + 0xAB67, 0xCCC1, 0xAB68, 0xCCC2, 0xAB69, 0xCCC3, 0xAB6A, 0xCCC6, + 0xAB6B, 0xCCC8, 0xAB6C, 0xCCCA, 0xAB6D, 0xCCCB, 0xAB6E, 0xCCCC, + 0xAB6F, 0xCCCD, 0xAB70, 0xCCCE, 0xAB71, 0xCCCF, 0xAB72, 0xCCD1, + 0xAB73, 0xCCD2, 0xAB74, 0xCCD3, 0xAB75, 0xCCD5, 0xAB76, 0xCCD6, + 0xAB77, 0xCCD7, 0xAB78, 0xCCD8, 0xAB79, 0xCCD9, 0xAB7A, 0xCCDA, + 0xAB81, 0xCCDB, 0xAB82, 0xCCDC, 0xAB83, 0xCCDD, 0xAB84, 0xCCDE, + 0xAB85, 0xCCDF, 0xAB86, 0xCCE0, 0xAB87, 0xCCE1, 0xAB88, 0xCCE2, + 0xAB89, 0xCCE3, 0xAB8A, 0xCCE5, 0xAB8B, 0xCCE6, 0xAB8C, 0xCCE7, + 0xAB8D, 0xCCE8, 0xAB8E, 0xCCE9, 0xAB8F, 0xCCEA, 0xAB90, 0xCCEB, + 0xAB91, 0xCCED, 0xAB92, 0xCCEE, 0xAB93, 0xCCEF, 0xAB94, 0xCCF1, + 0xAB95, 0xCCF2, 0xAB96, 0xCCF3, 0xAB97, 0xCCF4, 0xAB98, 0xCCF5, + 0xAB99, 0xCCF6, 0xAB9A, 0xCCF7, 0xAB9B, 0xCCF8, 0xAB9C, 0xCCF9, + 0xAB9D, 0xCCFA, 0xAB9E, 0xCCFB, 0xAB9F, 0xCCFC, 0xABA0, 0xCCFD, + 0xABA1, 0x30A1, 0xABA2, 0x30A2, 0xABA3, 0x30A3, 0xABA4, 0x30A4, + 0xABA5, 0x30A5, 0xABA6, 0x30A6, 0xABA7, 0x30A7, 0xABA8, 0x30A8, + 0xABA9, 0x30A9, 0xABAA, 0x30AA, 0xABAB, 0x30AB, 0xABAC, 0x30AC, + 0xABAD, 0x30AD, 0xABAE, 0x30AE, 0xABAF, 0x30AF, 0xABB0, 0x30B0, + 0xABB1, 0x30B1, 0xABB2, 0x30B2, 0xABB3, 0x30B3, 0xABB4, 0x30B4, + 0xABB5, 0x30B5, 0xABB6, 0x30B6, 0xABB7, 0x30B7, 0xABB8, 0x30B8, + 0xABB9, 0x30B9, 0xABBA, 0x30BA, 0xABBB, 0x30BB, 0xABBC, 0x30BC, + 0xABBD, 0x30BD, 0xABBE, 0x30BE, 0xABBF, 0x30BF, 0xABC0, 0x30C0, + 0xABC1, 0x30C1, 0xABC2, 0x30C2, 0xABC3, 0x30C3, 0xABC4, 0x30C4, + 0xABC5, 0x30C5, 0xABC6, 0x30C6, 0xABC7, 0x30C7, 0xABC8, 0x30C8, + 0xABC9, 0x30C9, 0xABCA, 0x30CA, 0xABCB, 0x30CB, 0xABCC, 0x30CC, + 0xABCD, 0x30CD, 0xABCE, 0x30CE, 0xABCF, 0x30CF, 0xABD0, 0x30D0, + 0xABD1, 0x30D1, 0xABD2, 0x30D2, 0xABD3, 0x30D3, 0xABD4, 0x30D4, + 0xABD5, 0x30D5, 0xABD6, 0x30D6, 0xABD7, 0x30D7, 0xABD8, 0x30D8, + 0xABD9, 0x30D9, 0xABDA, 0x30DA, 0xABDB, 0x30DB, 0xABDC, 0x30DC, + 0xABDD, 0x30DD, 0xABDE, 0x30DE, 0xABDF, 0x30DF, 0xABE0, 0x30E0, + 0xABE1, 0x30E1, 0xABE2, 0x30E2, 0xABE3, 0x30E3, 0xABE4, 0x30E4, + 0xABE5, 0x30E5, 0xABE6, 0x30E6, 0xABE7, 0x30E7, 0xABE8, 0x30E8, + 0xABE9, 0x30E9, 0xABEA, 0x30EA, 0xABEB, 0x30EB, 0xABEC, 0x30EC, + 0xABED, 0x30ED, 0xABEE, 0x30EE, 0xABEF, 0x30EF, 0xABF0, 0x30F0, + 0xABF1, 0x30F1, 0xABF2, 0x30F2, 0xABF3, 0x30F3, 0xABF4, 0x30F4, + 0xABF5, 0x30F5, 0xABF6, 0x30F6, 0xAC41, 0xCCFE, 0xAC42, 0xCCFF, + 0xAC43, 0xCD00, 0xAC44, 0xCD02, 0xAC45, 0xCD03, 0xAC46, 0xCD04, + 0xAC47, 0xCD05, 0xAC48, 0xCD06, 0xAC49, 0xCD07, 0xAC4A, 0xCD0A, + 0xAC4B, 0xCD0B, 0xAC4C, 0xCD0D, 0xAC4D, 0xCD0E, 0xAC4E, 0xCD0F, + 0xAC4F, 0xCD11, 0xAC50, 0xCD12, 0xAC51, 0xCD13, 0xAC52, 0xCD14, + 0xAC53, 0xCD15, 0xAC54, 0xCD16, 0xAC55, 0xCD17, 0xAC56, 0xCD1A, + 0xAC57, 0xCD1C, 0xAC58, 0xCD1E, 0xAC59, 0xCD1F, 0xAC5A, 0xCD20, + 0xAC61, 0xCD21, 0xAC62, 0xCD22, 0xAC63, 0xCD23, 0xAC64, 0xCD25, + 0xAC65, 0xCD26, 0xAC66, 0xCD27, 0xAC67, 0xCD29, 0xAC68, 0xCD2A, + 0xAC69, 0xCD2B, 0xAC6A, 0xCD2D, 0xAC6B, 0xCD2E, 0xAC6C, 0xCD2F, + 0xAC6D, 0xCD30, 0xAC6E, 0xCD31, 0xAC6F, 0xCD32, 0xAC70, 0xCD33, + 0xAC71, 0xCD34, 0xAC72, 0xCD35, 0xAC73, 0xCD36, 0xAC74, 0xCD37, + 0xAC75, 0xCD38, 0xAC76, 0xCD3A, 0xAC77, 0xCD3B, 0xAC78, 0xCD3C, + 0xAC79, 0xCD3D, 0xAC7A, 0xCD3E, 0xAC81, 0xCD3F, 0xAC82, 0xCD40, + 0xAC83, 0xCD41, 0xAC84, 0xCD42, 0xAC85, 0xCD43, 0xAC86, 0xCD44, + 0xAC87, 0xCD45, 0xAC88, 0xCD46, 0xAC89, 0xCD47, 0xAC8A, 0xCD48, + 0xAC8B, 0xCD49, 0xAC8C, 0xCD4A, 0xAC8D, 0xCD4B, 0xAC8E, 0xCD4C, + 0xAC8F, 0xCD4D, 0xAC90, 0xCD4E, 0xAC91, 0xCD4F, 0xAC92, 0xCD50, + 0xAC93, 0xCD51, 0xAC94, 0xCD52, 0xAC95, 0xCD53, 0xAC96, 0xCD54, + 0xAC97, 0xCD55, 0xAC98, 0xCD56, 0xAC99, 0xCD57, 0xAC9A, 0xCD58, + 0xAC9B, 0xCD59, 0xAC9C, 0xCD5A, 0xAC9D, 0xCD5B, 0xAC9E, 0xCD5D, + 0xAC9F, 0xCD5E, 0xACA0, 0xCD5F, 0xACA1, 0x0410, 0xACA2, 0x0411, + 0xACA3, 0x0412, 0xACA4, 0x0413, 0xACA5, 0x0414, 0xACA6, 0x0415, + 0xACA7, 0x0401, 0xACA8, 0x0416, 0xACA9, 0x0417, 0xACAA, 0x0418, + 0xACAB, 0x0419, 0xACAC, 0x041A, 0xACAD, 0x041B, 0xACAE, 0x041C, + 0xACAF, 0x041D, 0xACB0, 0x041E, 0xACB1, 0x041F, 0xACB2, 0x0420, + 0xACB3, 0x0421, 0xACB4, 0x0422, 0xACB5, 0x0423, 0xACB6, 0x0424, + 0xACB7, 0x0425, 0xACB8, 0x0426, 0xACB9, 0x0427, 0xACBA, 0x0428, + 0xACBB, 0x0429, 0xACBC, 0x042A, 0xACBD, 0x042B, 0xACBE, 0x042C, + 0xACBF, 0x042D, 0xACC0, 0x042E, 0xACC1, 0x042F, 0xACD1, 0x0430, + 0xACD2, 0x0431, 0xACD3, 0x0432, 0xACD4, 0x0433, 0xACD5, 0x0434, + 0xACD6, 0x0435, 0xACD7, 0x0451, 0xACD8, 0x0436, 0xACD9, 0x0437, + 0xACDA, 0x0438, 0xACDB, 0x0439, 0xACDC, 0x043A, 0xACDD, 0x043B, + 0xACDE, 0x043C, 0xACDF, 0x043D, 0xACE0, 0x043E, 0xACE1, 0x043F, + 0xACE2, 0x0440, 0xACE3, 0x0441, 0xACE4, 0x0442, 0xACE5, 0x0443, + 0xACE6, 0x0444, 0xACE7, 0x0445, 0xACE8, 0x0446, 0xACE9, 0x0447, + 0xACEA, 0x0448, 0xACEB, 0x0449, 0xACEC, 0x044A, 0xACED, 0x044B, + 0xACEE, 0x044C, 0xACEF, 0x044D, 0xACF0, 0x044E, 0xACF1, 0x044F, + 0xAD41, 0xCD61, 0xAD42, 0xCD62, 0xAD43, 0xCD63, 0xAD44, 0xCD65, + 0xAD45, 0xCD66, 0xAD46, 0xCD67, 0xAD47, 0xCD68, 0xAD48, 0xCD69, + 0xAD49, 0xCD6A, 0xAD4A, 0xCD6B, 0xAD4B, 0xCD6E, 0xAD4C, 0xCD70, + 0xAD4D, 0xCD72, 0xAD4E, 0xCD73, 0xAD4F, 0xCD74, 0xAD50, 0xCD75, + 0xAD51, 0xCD76, 0xAD52, 0xCD77, 0xAD53, 0xCD79, 0xAD54, 0xCD7A, + 0xAD55, 0xCD7B, 0xAD56, 0xCD7C, 0xAD57, 0xCD7D, 0xAD58, 0xCD7E, + 0xAD59, 0xCD7F, 0xAD5A, 0xCD80, 0xAD61, 0xCD81, 0xAD62, 0xCD82, + 0xAD63, 0xCD83, 0xAD64, 0xCD84, 0xAD65, 0xCD85, 0xAD66, 0xCD86, + 0xAD67, 0xCD87, 0xAD68, 0xCD89, 0xAD69, 0xCD8A, 0xAD6A, 0xCD8B, + 0xAD6B, 0xCD8C, 0xAD6C, 0xCD8D, 0xAD6D, 0xCD8E, 0xAD6E, 0xCD8F, + 0xAD6F, 0xCD90, 0xAD70, 0xCD91, 0xAD71, 0xCD92, 0xAD72, 0xCD93, + 0xAD73, 0xCD96, 0xAD74, 0xCD97, 0xAD75, 0xCD99, 0xAD76, 0xCD9A, + 0xAD77, 0xCD9B, 0xAD78, 0xCD9D, 0xAD79, 0xCD9E, 0xAD7A, 0xCD9F, + 0xAD81, 0xCDA0, 0xAD82, 0xCDA1, 0xAD83, 0xCDA2, 0xAD84, 0xCDA3, + 0xAD85, 0xCDA6, 0xAD86, 0xCDA8, 0xAD87, 0xCDAA, 0xAD88, 0xCDAB, + 0xAD89, 0xCDAC, 0xAD8A, 0xCDAD, 0xAD8B, 0xCDAE, 0xAD8C, 0xCDAF, + 0xAD8D, 0xCDB1, 0xAD8E, 0xCDB2, 0xAD8F, 0xCDB3, 0xAD90, 0xCDB4, + 0xAD91, 0xCDB5, 0xAD92, 0xCDB6, 0xAD93, 0xCDB7, 0xAD94, 0xCDB8, + 0xAD95, 0xCDB9, 0xAD96, 0xCDBA, 0xAD97, 0xCDBB, 0xAD98, 0xCDBC, + 0xAD99, 0xCDBD, 0xAD9A, 0xCDBE, 0xAD9B, 0xCDBF, 0xAD9C, 0xCDC0, + 0xAD9D, 0xCDC1, 0xAD9E, 0xCDC2, 0xAD9F, 0xCDC3, 0xADA0, 0xCDC5, + 0xAE41, 0xCDC6, 0xAE42, 0xCDC7, 0xAE43, 0xCDC8, 0xAE44, 0xCDC9, + 0xAE45, 0xCDCA, 0xAE46, 0xCDCB, 0xAE47, 0xCDCD, 0xAE48, 0xCDCE, + 0xAE49, 0xCDCF, 0xAE4A, 0xCDD1, 0xAE4B, 0xCDD2, 0xAE4C, 0xCDD3, + 0xAE4D, 0xCDD4, 0xAE4E, 0xCDD5, 0xAE4F, 0xCDD6, 0xAE50, 0xCDD7, + 0xAE51, 0xCDD8, 0xAE52, 0xCDD9, 0xAE53, 0xCDDA, 0xAE54, 0xCDDB, + 0xAE55, 0xCDDC, 0xAE56, 0xCDDD, 0xAE57, 0xCDDE, 0xAE58, 0xCDDF, + 0xAE59, 0xCDE0, 0xAE5A, 0xCDE1, 0xAE61, 0xCDE2, 0xAE62, 0xCDE3, + 0xAE63, 0xCDE4, 0xAE64, 0xCDE5, 0xAE65, 0xCDE6, 0xAE66, 0xCDE7, + 0xAE67, 0xCDE9, 0xAE68, 0xCDEA, 0xAE69, 0xCDEB, 0xAE6A, 0xCDED, + 0xAE6B, 0xCDEE, 0xAE6C, 0xCDEF, 0xAE6D, 0xCDF1, 0xAE6E, 0xCDF2, + 0xAE6F, 0xCDF3, 0xAE70, 0xCDF4, 0xAE71, 0xCDF5, 0xAE72, 0xCDF6, + 0xAE73, 0xCDF7, 0xAE74, 0xCDFA, 0xAE75, 0xCDFC, 0xAE76, 0xCDFE, + 0xAE77, 0xCDFF, 0xAE78, 0xCE00, 0xAE79, 0xCE01, 0xAE7A, 0xCE02, + 0xAE81, 0xCE03, 0xAE82, 0xCE05, 0xAE83, 0xCE06, 0xAE84, 0xCE07, + 0xAE85, 0xCE09, 0xAE86, 0xCE0A, 0xAE87, 0xCE0B, 0xAE88, 0xCE0D, + 0xAE89, 0xCE0E, 0xAE8A, 0xCE0F, 0xAE8B, 0xCE10, 0xAE8C, 0xCE11, + 0xAE8D, 0xCE12, 0xAE8E, 0xCE13, 0xAE8F, 0xCE15, 0xAE90, 0xCE16, + 0xAE91, 0xCE17, 0xAE92, 0xCE18, 0xAE93, 0xCE1A, 0xAE94, 0xCE1B, + 0xAE95, 0xCE1C, 0xAE96, 0xCE1D, 0xAE97, 0xCE1E, 0xAE98, 0xCE1F, + 0xAE99, 0xCE22, 0xAE9A, 0xCE23, 0xAE9B, 0xCE25, 0xAE9C, 0xCE26, + 0xAE9D, 0xCE27, 0xAE9E, 0xCE29, 0xAE9F, 0xCE2A, 0xAEA0, 0xCE2B, + 0xAF41, 0xCE2C, 0xAF42, 0xCE2D, 0xAF43, 0xCE2E, 0xAF44, 0xCE2F, + 0xAF45, 0xCE32, 0xAF46, 0xCE34, 0xAF47, 0xCE36, 0xAF48, 0xCE37, + 0xAF49, 0xCE38, 0xAF4A, 0xCE39, 0xAF4B, 0xCE3A, 0xAF4C, 0xCE3B, + 0xAF4D, 0xCE3C, 0xAF4E, 0xCE3D, 0xAF4F, 0xCE3E, 0xAF50, 0xCE3F, + 0xAF51, 0xCE40, 0xAF52, 0xCE41, 0xAF53, 0xCE42, 0xAF54, 0xCE43, + 0xAF55, 0xCE44, 0xAF56, 0xCE45, 0xAF57, 0xCE46, 0xAF58, 0xCE47, + 0xAF59, 0xCE48, 0xAF5A, 0xCE49, 0xAF61, 0xCE4A, 0xAF62, 0xCE4B, + 0xAF63, 0xCE4C, 0xAF64, 0xCE4D, 0xAF65, 0xCE4E, 0xAF66, 0xCE4F, + 0xAF67, 0xCE50, 0xAF68, 0xCE51, 0xAF69, 0xCE52, 0xAF6A, 0xCE53, + 0xAF6B, 0xCE54, 0xAF6C, 0xCE55, 0xAF6D, 0xCE56, 0xAF6E, 0xCE57, + 0xAF6F, 0xCE5A, 0xAF70, 0xCE5B, 0xAF71, 0xCE5D, 0xAF72, 0xCE5E, + 0xAF73, 0xCE62, 0xAF74, 0xCE63, 0xAF75, 0xCE64, 0xAF76, 0xCE65, + 0xAF77, 0xCE66, 0xAF78, 0xCE67, 0xAF79, 0xCE6A, 0xAF7A, 0xCE6C, + 0xAF81, 0xCE6E, 0xAF82, 0xCE6F, 0xAF83, 0xCE70, 0xAF84, 0xCE71, + 0xAF85, 0xCE72, 0xAF86, 0xCE73, 0xAF87, 0xCE76, 0xAF88, 0xCE77, + 0xAF89, 0xCE79, 0xAF8A, 0xCE7A, 0xAF8B, 0xCE7B, 0xAF8C, 0xCE7D, + 0xAF8D, 0xCE7E, 0xAF8E, 0xCE7F, 0xAF8F, 0xCE80, 0xAF90, 0xCE81, + 0xAF91, 0xCE82, 0xAF92, 0xCE83, 0xAF93, 0xCE86, 0xAF94, 0xCE88, + 0xAF95, 0xCE8A, 0xAF96, 0xCE8B, 0xAF97, 0xCE8C, 0xAF98, 0xCE8D, + 0xAF99, 0xCE8E, 0xAF9A, 0xCE8F, 0xAF9B, 0xCE92, 0xAF9C, 0xCE93, + 0xAF9D, 0xCE95, 0xAF9E, 0xCE96, 0xAF9F, 0xCE97, 0xAFA0, 0xCE99, + 0xB041, 0xCE9A, 0xB042, 0xCE9B, 0xB043, 0xCE9C, 0xB044, 0xCE9D, + 0xB045, 0xCE9E, 0xB046, 0xCE9F, 0xB047, 0xCEA2, 0xB048, 0xCEA6, + 0xB049, 0xCEA7, 0xB04A, 0xCEA8, 0xB04B, 0xCEA9, 0xB04C, 0xCEAA, + 0xB04D, 0xCEAB, 0xB04E, 0xCEAE, 0xB04F, 0xCEAF, 0xB050, 0xCEB0, + 0xB051, 0xCEB1, 0xB052, 0xCEB2, 0xB053, 0xCEB3, 0xB054, 0xCEB4, + 0xB055, 0xCEB5, 0xB056, 0xCEB6, 0xB057, 0xCEB7, 0xB058, 0xCEB8, + 0xB059, 0xCEB9, 0xB05A, 0xCEBA, 0xB061, 0xCEBB, 0xB062, 0xCEBC, + 0xB063, 0xCEBD, 0xB064, 0xCEBE, 0xB065, 0xCEBF, 0xB066, 0xCEC0, + 0xB067, 0xCEC2, 0xB068, 0xCEC3, 0xB069, 0xCEC4, 0xB06A, 0xCEC5, + 0xB06B, 0xCEC6, 0xB06C, 0xCEC7, 0xB06D, 0xCEC8, 0xB06E, 0xCEC9, + 0xB06F, 0xCECA, 0xB070, 0xCECB, 0xB071, 0xCECC, 0xB072, 0xCECD, + 0xB073, 0xCECE, 0xB074, 0xCECF, 0xB075, 0xCED0, 0xB076, 0xCED1, + 0xB077, 0xCED2, 0xB078, 0xCED3, 0xB079, 0xCED4, 0xB07A, 0xCED5, + 0xB081, 0xCED6, 0xB082, 0xCED7, 0xB083, 0xCED8, 0xB084, 0xCED9, + 0xB085, 0xCEDA, 0xB086, 0xCEDB, 0xB087, 0xCEDC, 0xB088, 0xCEDD, + 0xB089, 0xCEDE, 0xB08A, 0xCEDF, 0xB08B, 0xCEE0, 0xB08C, 0xCEE1, + 0xB08D, 0xCEE2, 0xB08E, 0xCEE3, 0xB08F, 0xCEE6, 0xB090, 0xCEE7, + 0xB091, 0xCEE9, 0xB092, 0xCEEA, 0xB093, 0xCEED, 0xB094, 0xCEEE, + 0xB095, 0xCEEF, 0xB096, 0xCEF0, 0xB097, 0xCEF1, 0xB098, 0xCEF2, + 0xB099, 0xCEF3, 0xB09A, 0xCEF6, 0xB09B, 0xCEFA, 0xB09C, 0xCEFB, + 0xB09D, 0xCEFC, 0xB09E, 0xCEFD, 0xB09F, 0xCEFE, 0xB0A0, 0xCEFF, + 0xB0A1, 0xAC00, 0xB0A2, 0xAC01, 0xB0A3, 0xAC04, 0xB0A4, 0xAC07, + 0xB0A5, 0xAC08, 0xB0A6, 0xAC09, 0xB0A7, 0xAC0A, 0xB0A8, 0xAC10, + 0xB0A9, 0xAC11, 0xB0AA, 0xAC12, 0xB0AB, 0xAC13, 0xB0AC, 0xAC14, + 0xB0AD, 0xAC15, 0xB0AE, 0xAC16, 0xB0AF, 0xAC17, 0xB0B0, 0xAC19, + 0xB0B1, 0xAC1A, 0xB0B2, 0xAC1B, 0xB0B3, 0xAC1C, 0xB0B4, 0xAC1D, + 0xB0B5, 0xAC20, 0xB0B6, 0xAC24, 0xB0B7, 0xAC2C, 0xB0B8, 0xAC2D, + 0xB0B9, 0xAC2F, 0xB0BA, 0xAC30, 0xB0BB, 0xAC31, 0xB0BC, 0xAC38, + 0xB0BD, 0xAC39, 0xB0BE, 0xAC3C, 0xB0BF, 0xAC40, 0xB0C0, 0xAC4B, + 0xB0C1, 0xAC4D, 0xB0C2, 0xAC54, 0xB0C3, 0xAC58, 0xB0C4, 0xAC5C, + 0xB0C5, 0xAC70, 0xB0C6, 0xAC71, 0xB0C7, 0xAC74, 0xB0C8, 0xAC77, + 0xB0C9, 0xAC78, 0xB0CA, 0xAC7A, 0xB0CB, 0xAC80, 0xB0CC, 0xAC81, + 0xB0CD, 0xAC83, 0xB0CE, 0xAC84, 0xB0CF, 0xAC85, 0xB0D0, 0xAC86, + 0xB0D1, 0xAC89, 0xB0D2, 0xAC8A, 0xB0D3, 0xAC8B, 0xB0D4, 0xAC8C, + 0xB0D5, 0xAC90, 0xB0D6, 0xAC94, 0xB0D7, 0xAC9C, 0xB0D8, 0xAC9D, + 0xB0D9, 0xAC9F, 0xB0DA, 0xACA0, 0xB0DB, 0xACA1, 0xB0DC, 0xACA8, + 0xB0DD, 0xACA9, 0xB0DE, 0xACAA, 0xB0DF, 0xACAC, 0xB0E0, 0xACAF, + 0xB0E1, 0xACB0, 0xB0E2, 0xACB8, 0xB0E3, 0xACB9, 0xB0E4, 0xACBB, + 0xB0E5, 0xACBC, 0xB0E6, 0xACBD, 0xB0E7, 0xACC1, 0xB0E8, 0xACC4, + 0xB0E9, 0xACC8, 0xB0EA, 0xACCC, 0xB0EB, 0xACD5, 0xB0EC, 0xACD7, + 0xB0ED, 0xACE0, 0xB0EE, 0xACE1, 0xB0EF, 0xACE4, 0xB0F0, 0xACE7, + 0xB0F1, 0xACE8, 0xB0F2, 0xACEA, 0xB0F3, 0xACEC, 0xB0F4, 0xACEF, + 0xB0F5, 0xACF0, 0xB0F6, 0xACF1, 0xB0F7, 0xACF3, 0xB0F8, 0xACF5, + 0xB0F9, 0xACF6, 0xB0FA, 0xACFC, 0xB0FB, 0xACFD, 0xB0FC, 0xAD00, + 0xB0FD, 0xAD04, 0xB0FE, 0xAD06, 0xB141, 0xCF02, 0xB142, 0xCF03, + 0xB143, 0xCF05, 0xB144, 0xCF06, 0xB145, 0xCF07, 0xB146, 0xCF09, + 0xB147, 0xCF0A, 0xB148, 0xCF0B, 0xB149, 0xCF0C, 0xB14A, 0xCF0D, + 0xB14B, 0xCF0E, 0xB14C, 0xCF0F, 0xB14D, 0xCF12, 0xB14E, 0xCF14, + 0xB14F, 0xCF16, 0xB150, 0xCF17, 0xB151, 0xCF18, 0xB152, 0xCF19, + 0xB153, 0xCF1A, 0xB154, 0xCF1B, 0xB155, 0xCF1D, 0xB156, 0xCF1E, + 0xB157, 0xCF1F, 0xB158, 0xCF21, 0xB159, 0xCF22, 0xB15A, 0xCF23, + 0xB161, 0xCF25, 0xB162, 0xCF26, 0xB163, 0xCF27, 0xB164, 0xCF28, + 0xB165, 0xCF29, 0xB166, 0xCF2A, 0xB167, 0xCF2B, 0xB168, 0xCF2E, + 0xB169, 0xCF32, 0xB16A, 0xCF33, 0xB16B, 0xCF34, 0xB16C, 0xCF35, + 0xB16D, 0xCF36, 0xB16E, 0xCF37, 0xB16F, 0xCF39, 0xB170, 0xCF3A, + 0xB171, 0xCF3B, 0xB172, 0xCF3C, 0xB173, 0xCF3D, 0xB174, 0xCF3E, + 0xB175, 0xCF3F, 0xB176, 0xCF40, 0xB177, 0xCF41, 0xB178, 0xCF42, + 0xB179, 0xCF43, 0xB17A, 0xCF44, 0xB181, 0xCF45, 0xB182, 0xCF46, + 0xB183, 0xCF47, 0xB184, 0xCF48, 0xB185, 0xCF49, 0xB186, 0xCF4A, + 0xB187, 0xCF4B, 0xB188, 0xCF4C, 0xB189, 0xCF4D, 0xB18A, 0xCF4E, + 0xB18B, 0xCF4F, 0xB18C, 0xCF50, 0xB18D, 0xCF51, 0xB18E, 0xCF52, + 0xB18F, 0xCF53, 0xB190, 0xCF56, 0xB191, 0xCF57, 0xB192, 0xCF59, + 0xB193, 0xCF5A, 0xB194, 0xCF5B, 0xB195, 0xCF5D, 0xB196, 0xCF5E, + 0xB197, 0xCF5F, 0xB198, 0xCF60, 0xB199, 0xCF61, 0xB19A, 0xCF62, + 0xB19B, 0xCF63, 0xB19C, 0xCF66, 0xB19D, 0xCF68, 0xB19E, 0xCF6A, + 0xB19F, 0xCF6B, 0xB1A0, 0xCF6C, 0xB1A1, 0xAD0C, 0xB1A2, 0xAD0D, + 0xB1A3, 0xAD0F, 0xB1A4, 0xAD11, 0xB1A5, 0xAD18, 0xB1A6, 0xAD1C, + 0xB1A7, 0xAD20, 0xB1A8, 0xAD29, 0xB1A9, 0xAD2C, 0xB1AA, 0xAD2D, + 0xB1AB, 0xAD34, 0xB1AC, 0xAD35, 0xB1AD, 0xAD38, 0xB1AE, 0xAD3C, + 0xB1AF, 0xAD44, 0xB1B0, 0xAD45, 0xB1B1, 0xAD47, 0xB1B2, 0xAD49, + 0xB1B3, 0xAD50, 0xB1B4, 0xAD54, 0xB1B5, 0xAD58, 0xB1B6, 0xAD61, + 0xB1B7, 0xAD63, 0xB1B8, 0xAD6C, 0xB1B9, 0xAD6D, 0xB1BA, 0xAD70, + 0xB1BB, 0xAD73, 0xB1BC, 0xAD74, 0xB1BD, 0xAD75, 0xB1BE, 0xAD76, + 0xB1BF, 0xAD7B, 0xB1C0, 0xAD7C, 0xB1C1, 0xAD7D, 0xB1C2, 0xAD7F, + 0xB1C3, 0xAD81, 0xB1C4, 0xAD82, 0xB1C5, 0xAD88, 0xB1C6, 0xAD89, + 0xB1C7, 0xAD8C, 0xB1C8, 0xAD90, 0xB1C9, 0xAD9C, 0xB1CA, 0xAD9D, + 0xB1CB, 0xADA4, 0xB1CC, 0xADB7, 0xB1CD, 0xADC0, 0xB1CE, 0xADC1, + 0xB1CF, 0xADC4, 0xB1D0, 0xADC8, 0xB1D1, 0xADD0, 0xB1D2, 0xADD1, + 0xB1D3, 0xADD3, 0xB1D4, 0xADDC, 0xB1D5, 0xADE0, 0xB1D6, 0xADE4, + 0xB1D7, 0xADF8, 0xB1D8, 0xADF9, 0xB1D9, 0xADFC, 0xB1DA, 0xADFF, + 0xB1DB, 0xAE00, 0xB1DC, 0xAE01, 0xB1DD, 0xAE08, 0xB1DE, 0xAE09, + 0xB1DF, 0xAE0B, 0xB1E0, 0xAE0D, 0xB1E1, 0xAE14, 0xB1E2, 0xAE30, + 0xB1E3, 0xAE31, 0xB1E4, 0xAE34, 0xB1E5, 0xAE37, 0xB1E6, 0xAE38, + 0xB1E7, 0xAE3A, 0xB1E8, 0xAE40, 0xB1E9, 0xAE41, 0xB1EA, 0xAE43, + 0xB1EB, 0xAE45, 0xB1EC, 0xAE46, 0xB1ED, 0xAE4A, 0xB1EE, 0xAE4C, + 0xB1EF, 0xAE4D, 0xB1F0, 0xAE4E, 0xB1F1, 0xAE50, 0xB1F2, 0xAE54, + 0xB1F3, 0xAE56, 0xB1F4, 0xAE5C, 0xB1F5, 0xAE5D, 0xB1F6, 0xAE5F, + 0xB1F7, 0xAE60, 0xB1F8, 0xAE61, 0xB1F9, 0xAE65, 0xB1FA, 0xAE68, + 0xB1FB, 0xAE69, 0xB1FC, 0xAE6C, 0xB1FD, 0xAE70, 0xB1FE, 0xAE78, + 0xB241, 0xCF6D, 0xB242, 0xCF6E, 0xB243, 0xCF6F, 0xB244, 0xCF72, + 0xB245, 0xCF73, 0xB246, 0xCF75, 0xB247, 0xCF76, 0xB248, 0xCF77, + 0xB249, 0xCF79, 0xB24A, 0xCF7A, 0xB24B, 0xCF7B, 0xB24C, 0xCF7C, + 0xB24D, 0xCF7D, 0xB24E, 0xCF7E, 0xB24F, 0xCF7F, 0xB250, 0xCF81, + 0xB251, 0xCF82, 0xB252, 0xCF83, 0xB253, 0xCF84, 0xB254, 0xCF86, + 0xB255, 0xCF87, 0xB256, 0xCF88, 0xB257, 0xCF89, 0xB258, 0xCF8A, + 0xB259, 0xCF8B, 0xB25A, 0xCF8D, 0xB261, 0xCF8E, 0xB262, 0xCF8F, + 0xB263, 0xCF90, 0xB264, 0xCF91, 0xB265, 0xCF92, 0xB266, 0xCF93, + 0xB267, 0xCF94, 0xB268, 0xCF95, 0xB269, 0xCF96, 0xB26A, 0xCF97, + 0xB26B, 0xCF98, 0xB26C, 0xCF99, 0xB26D, 0xCF9A, 0xB26E, 0xCF9B, + 0xB26F, 0xCF9C, 0xB270, 0xCF9D, 0xB271, 0xCF9E, 0xB272, 0xCF9F, + 0xB273, 0xCFA0, 0xB274, 0xCFA2, 0xB275, 0xCFA3, 0xB276, 0xCFA4, + 0xB277, 0xCFA5, 0xB278, 0xCFA6, 0xB279, 0xCFA7, 0xB27A, 0xCFA9, + 0xB281, 0xCFAA, 0xB282, 0xCFAB, 0xB283, 0xCFAC, 0xB284, 0xCFAD, + 0xB285, 0xCFAE, 0xB286, 0xCFAF, 0xB287, 0xCFB1, 0xB288, 0xCFB2, + 0xB289, 0xCFB3, 0xB28A, 0xCFB4, 0xB28B, 0xCFB5, 0xB28C, 0xCFB6, + 0xB28D, 0xCFB7, 0xB28E, 0xCFB8, 0xB28F, 0xCFB9, 0xB290, 0xCFBA, + 0xB291, 0xCFBB, 0xB292, 0xCFBC, 0xB293, 0xCFBD, 0xB294, 0xCFBE, + 0xB295, 0xCFBF, 0xB296, 0xCFC0, 0xB297, 0xCFC1, 0xB298, 0xCFC2, + 0xB299, 0xCFC3, 0xB29A, 0xCFC5, 0xB29B, 0xCFC6, 0xB29C, 0xCFC7, + 0xB29D, 0xCFC8, 0xB29E, 0xCFC9, 0xB29F, 0xCFCA, 0xB2A0, 0xCFCB, + 0xB2A1, 0xAE79, 0xB2A2, 0xAE7B, 0xB2A3, 0xAE7C, 0xB2A4, 0xAE7D, + 0xB2A5, 0xAE84, 0xB2A6, 0xAE85, 0xB2A7, 0xAE8C, 0xB2A8, 0xAEBC, + 0xB2A9, 0xAEBD, 0xB2AA, 0xAEBE, 0xB2AB, 0xAEC0, 0xB2AC, 0xAEC4, + 0xB2AD, 0xAECC, 0xB2AE, 0xAECD, 0xB2AF, 0xAECF, 0xB2B0, 0xAED0, + 0xB2B1, 0xAED1, 0xB2B2, 0xAED8, 0xB2B3, 0xAED9, 0xB2B4, 0xAEDC, + 0xB2B5, 0xAEE8, 0xB2B6, 0xAEEB, 0xB2B7, 0xAEED, 0xB2B8, 0xAEF4, + 0xB2B9, 0xAEF8, 0xB2BA, 0xAEFC, 0xB2BB, 0xAF07, 0xB2BC, 0xAF08, + 0xB2BD, 0xAF0D, 0xB2BE, 0xAF10, 0xB2BF, 0xAF2C, 0xB2C0, 0xAF2D, + 0xB2C1, 0xAF30, 0xB2C2, 0xAF32, 0xB2C3, 0xAF34, 0xB2C4, 0xAF3C, + 0xB2C5, 0xAF3D, 0xB2C6, 0xAF3F, 0xB2C7, 0xAF41, 0xB2C8, 0xAF42, + 0xB2C9, 0xAF43, 0xB2CA, 0xAF48, 0xB2CB, 0xAF49, 0xB2CC, 0xAF50, + 0xB2CD, 0xAF5C, 0xB2CE, 0xAF5D, 0xB2CF, 0xAF64, 0xB2D0, 0xAF65, + 0xB2D1, 0xAF79, 0xB2D2, 0xAF80, 0xB2D3, 0xAF84, 0xB2D4, 0xAF88, + 0xB2D5, 0xAF90, 0xB2D6, 0xAF91, 0xB2D7, 0xAF95, 0xB2D8, 0xAF9C, + 0xB2D9, 0xAFB8, 0xB2DA, 0xAFB9, 0xB2DB, 0xAFBC, 0xB2DC, 0xAFC0, + 0xB2DD, 0xAFC7, 0xB2DE, 0xAFC8, 0xB2DF, 0xAFC9, 0xB2E0, 0xAFCB, + 0xB2E1, 0xAFCD, 0xB2E2, 0xAFCE, 0xB2E3, 0xAFD4, 0xB2E4, 0xAFDC, + 0xB2E5, 0xAFE8, 0xB2E6, 0xAFE9, 0xB2E7, 0xAFF0, 0xB2E8, 0xAFF1, + 0xB2E9, 0xAFF4, 0xB2EA, 0xAFF8, 0xB2EB, 0xB000, 0xB2EC, 0xB001, + 0xB2ED, 0xB004, 0xB2EE, 0xB00C, 0xB2EF, 0xB010, 0xB2F0, 0xB014, + 0xB2F1, 0xB01C, 0xB2F2, 0xB01D, 0xB2F3, 0xB028, 0xB2F4, 0xB044, + 0xB2F5, 0xB045, 0xB2F6, 0xB048, 0xB2F7, 0xB04A, 0xB2F8, 0xB04C, + 0xB2F9, 0xB04E, 0xB2FA, 0xB053, 0xB2FB, 0xB054, 0xB2FC, 0xB055, + 0xB2FD, 0xB057, 0xB2FE, 0xB059, 0xB341, 0xCFCC, 0xB342, 0xCFCD, + 0xB343, 0xCFCE, 0xB344, 0xCFCF, 0xB345, 0xCFD0, 0xB346, 0xCFD1, + 0xB347, 0xCFD2, 0xB348, 0xCFD3, 0xB349, 0xCFD4, 0xB34A, 0xCFD5, + 0xB34B, 0xCFD6, 0xB34C, 0xCFD7, 0xB34D, 0xCFD8, 0xB34E, 0xCFD9, + 0xB34F, 0xCFDA, 0xB350, 0xCFDB, 0xB351, 0xCFDC, 0xB352, 0xCFDD, + 0xB353, 0xCFDE, 0xB354, 0xCFDF, 0xB355, 0xCFE2, 0xB356, 0xCFE3, + 0xB357, 0xCFE5, 0xB358, 0xCFE6, 0xB359, 0xCFE7, 0xB35A, 0xCFE9, + 0xB361, 0xCFEA, 0xB362, 0xCFEB, 0xB363, 0xCFEC, 0xB364, 0xCFED, + 0xB365, 0xCFEE, 0xB366, 0xCFEF, 0xB367, 0xCFF2, 0xB368, 0xCFF4, + 0xB369, 0xCFF6, 0xB36A, 0xCFF7, 0xB36B, 0xCFF8, 0xB36C, 0xCFF9, + 0xB36D, 0xCFFA, 0xB36E, 0xCFFB, 0xB36F, 0xCFFD, 0xB370, 0xCFFE, + 0xB371, 0xCFFF, 0xB372, 0xD001, 0xB373, 0xD002, 0xB374, 0xD003, + 0xB375, 0xD005, 0xB376, 0xD006, 0xB377, 0xD007, 0xB378, 0xD008, + 0xB379, 0xD009, 0xB37A, 0xD00A, 0xB381, 0xD00B, 0xB382, 0xD00C, + 0xB383, 0xD00D, 0xB384, 0xD00E, 0xB385, 0xD00F, 0xB386, 0xD010, + 0xB387, 0xD012, 0xB388, 0xD013, 0xB389, 0xD014, 0xB38A, 0xD015, + 0xB38B, 0xD016, 0xB38C, 0xD017, 0xB38D, 0xD019, 0xB38E, 0xD01A, + 0xB38F, 0xD01B, 0xB390, 0xD01C, 0xB391, 0xD01D, 0xB392, 0xD01E, + 0xB393, 0xD01F, 0xB394, 0xD020, 0xB395, 0xD021, 0xB396, 0xD022, + 0xB397, 0xD023, 0xB398, 0xD024, 0xB399, 0xD025, 0xB39A, 0xD026, + 0xB39B, 0xD027, 0xB39C, 0xD028, 0xB39D, 0xD029, 0xB39E, 0xD02A, + 0xB39F, 0xD02B, 0xB3A0, 0xD02C, 0xB3A1, 0xB05D, 0xB3A2, 0xB07C, + 0xB3A3, 0xB07D, 0xB3A4, 0xB080, 0xB3A5, 0xB084, 0xB3A6, 0xB08C, + 0xB3A7, 0xB08D, 0xB3A8, 0xB08F, 0xB3A9, 0xB091, 0xB3AA, 0xB098, + 0xB3AB, 0xB099, 0xB3AC, 0xB09A, 0xB3AD, 0xB09C, 0xB3AE, 0xB09F, + 0xB3AF, 0xB0A0, 0xB3B0, 0xB0A1, 0xB3B1, 0xB0A2, 0xB3B2, 0xB0A8, + 0xB3B3, 0xB0A9, 0xB3B4, 0xB0AB, 0xB3B5, 0xB0AC, 0xB3B6, 0xB0AD, + 0xB3B7, 0xB0AE, 0xB3B8, 0xB0AF, 0xB3B9, 0xB0B1, 0xB3BA, 0xB0B3, + 0xB3BB, 0xB0B4, 0xB3BC, 0xB0B5, 0xB3BD, 0xB0B8, 0xB3BE, 0xB0BC, + 0xB3BF, 0xB0C4, 0xB3C0, 0xB0C5, 0xB3C1, 0xB0C7, 0xB3C2, 0xB0C8, + 0xB3C3, 0xB0C9, 0xB3C4, 0xB0D0, 0xB3C5, 0xB0D1, 0xB3C6, 0xB0D4, + 0xB3C7, 0xB0D8, 0xB3C8, 0xB0E0, 0xB3C9, 0xB0E5, 0xB3CA, 0xB108, + 0xB3CB, 0xB109, 0xB3CC, 0xB10B, 0xB3CD, 0xB10C, 0xB3CE, 0xB110, + 0xB3CF, 0xB112, 0xB3D0, 0xB113, 0xB3D1, 0xB118, 0xB3D2, 0xB119, + 0xB3D3, 0xB11B, 0xB3D4, 0xB11C, 0xB3D5, 0xB11D, 0xB3D6, 0xB123, + 0xB3D7, 0xB124, 0xB3D8, 0xB125, 0xB3D9, 0xB128, 0xB3DA, 0xB12C, + 0xB3DB, 0xB134, 0xB3DC, 0xB135, 0xB3DD, 0xB137, 0xB3DE, 0xB138, + 0xB3DF, 0xB139, 0xB3E0, 0xB140, 0xB3E1, 0xB141, 0xB3E2, 0xB144, + 0xB3E3, 0xB148, 0xB3E4, 0xB150, 0xB3E5, 0xB151, 0xB3E6, 0xB154, + 0xB3E7, 0xB155, 0xB3E8, 0xB158, 0xB3E9, 0xB15C, 0xB3EA, 0xB160, + 0xB3EB, 0xB178, 0xB3EC, 0xB179, 0xB3ED, 0xB17C, 0xB3EE, 0xB180, + 0xB3EF, 0xB182, 0xB3F0, 0xB188, 0xB3F1, 0xB189, 0xB3F2, 0xB18B, + 0xB3F3, 0xB18D, 0xB3F4, 0xB192, 0xB3F5, 0xB193, 0xB3F6, 0xB194, + 0xB3F7, 0xB198, 0xB3F8, 0xB19C, 0xB3F9, 0xB1A8, 0xB3FA, 0xB1CC, + 0xB3FB, 0xB1D0, 0xB3FC, 0xB1D4, 0xB3FD, 0xB1DC, 0xB3FE, 0xB1DD, + 0xB441, 0xD02E, 0xB442, 0xD02F, 0xB443, 0xD030, 0xB444, 0xD031, + 0xB445, 0xD032, 0xB446, 0xD033, 0xB447, 0xD036, 0xB448, 0xD037, + 0xB449, 0xD039, 0xB44A, 0xD03A, 0xB44B, 0xD03B, 0xB44C, 0xD03D, + 0xB44D, 0xD03E, 0xB44E, 0xD03F, 0xB44F, 0xD040, 0xB450, 0xD041, + 0xB451, 0xD042, 0xB452, 0xD043, 0xB453, 0xD046, 0xB454, 0xD048, + 0xB455, 0xD04A, 0xB456, 0xD04B, 0xB457, 0xD04C, 0xB458, 0xD04D, + 0xB459, 0xD04E, 0xB45A, 0xD04F, 0xB461, 0xD051, 0xB462, 0xD052, + 0xB463, 0xD053, 0xB464, 0xD055, 0xB465, 0xD056, 0xB466, 0xD057, + 0xB467, 0xD059, 0xB468, 0xD05A, 0xB469, 0xD05B, 0xB46A, 0xD05C, + 0xB46B, 0xD05D, 0xB46C, 0xD05E, 0xB46D, 0xD05F, 0xB46E, 0xD061, + 0xB46F, 0xD062, 0xB470, 0xD063, 0xB471, 0xD064, 0xB472, 0xD065, + 0xB473, 0xD066, 0xB474, 0xD067, 0xB475, 0xD068, 0xB476, 0xD069, + 0xB477, 0xD06A, 0xB478, 0xD06B, 0xB479, 0xD06E, 0xB47A, 0xD06F, + 0xB481, 0xD071, 0xB482, 0xD072, 0xB483, 0xD073, 0xB484, 0xD075, + 0xB485, 0xD076, 0xB486, 0xD077, 0xB487, 0xD078, 0xB488, 0xD079, + 0xB489, 0xD07A, 0xB48A, 0xD07B, 0xB48B, 0xD07E, 0xB48C, 0xD07F, + 0xB48D, 0xD080, 0xB48E, 0xD082, 0xB48F, 0xD083, 0xB490, 0xD084, + 0xB491, 0xD085, 0xB492, 0xD086, 0xB493, 0xD087, 0xB494, 0xD088, + 0xB495, 0xD089, 0xB496, 0xD08A, 0xB497, 0xD08B, 0xB498, 0xD08C, + 0xB499, 0xD08D, 0xB49A, 0xD08E, 0xB49B, 0xD08F, 0xB49C, 0xD090, + 0xB49D, 0xD091, 0xB49E, 0xD092, 0xB49F, 0xD093, 0xB4A0, 0xD094, + 0xB4A1, 0xB1DF, 0xB4A2, 0xB1E8, 0xB4A3, 0xB1E9, 0xB4A4, 0xB1EC, + 0xB4A5, 0xB1F0, 0xB4A6, 0xB1F9, 0xB4A7, 0xB1FB, 0xB4A8, 0xB1FD, + 0xB4A9, 0xB204, 0xB4AA, 0xB205, 0xB4AB, 0xB208, 0xB4AC, 0xB20B, + 0xB4AD, 0xB20C, 0xB4AE, 0xB214, 0xB4AF, 0xB215, 0xB4B0, 0xB217, + 0xB4B1, 0xB219, 0xB4B2, 0xB220, 0xB4B3, 0xB234, 0xB4B4, 0xB23C, + 0xB4B5, 0xB258, 0xB4B6, 0xB25C, 0xB4B7, 0xB260, 0xB4B8, 0xB268, + 0xB4B9, 0xB269, 0xB4BA, 0xB274, 0xB4BB, 0xB275, 0xB4BC, 0xB27C, + 0xB4BD, 0xB284, 0xB4BE, 0xB285, 0xB4BF, 0xB289, 0xB4C0, 0xB290, + 0xB4C1, 0xB291, 0xB4C2, 0xB294, 0xB4C3, 0xB298, 0xB4C4, 0xB299, + 0xB4C5, 0xB29A, 0xB4C6, 0xB2A0, 0xB4C7, 0xB2A1, 0xB4C8, 0xB2A3, + 0xB4C9, 0xB2A5, 0xB4CA, 0xB2A6, 0xB4CB, 0xB2AA, 0xB4CC, 0xB2AC, + 0xB4CD, 0xB2B0, 0xB4CE, 0xB2B4, 0xB4CF, 0xB2C8, 0xB4D0, 0xB2C9, + 0xB4D1, 0xB2CC, 0xB4D2, 0xB2D0, 0xB4D3, 0xB2D2, 0xB4D4, 0xB2D8, + 0xB4D5, 0xB2D9, 0xB4D6, 0xB2DB, 0xB4D7, 0xB2DD, 0xB4D8, 0xB2E2, + 0xB4D9, 0xB2E4, 0xB4DA, 0xB2E5, 0xB4DB, 0xB2E6, 0xB4DC, 0xB2E8, + 0xB4DD, 0xB2EB, 0xB4DE, 0xB2EC, 0xB4DF, 0xB2ED, 0xB4E0, 0xB2EE, + 0xB4E1, 0xB2EF, 0xB4E2, 0xB2F3, 0xB4E3, 0xB2F4, 0xB4E4, 0xB2F5, + 0xB4E5, 0xB2F7, 0xB4E6, 0xB2F8, 0xB4E7, 0xB2F9, 0xB4E8, 0xB2FA, + 0xB4E9, 0xB2FB, 0xB4EA, 0xB2FF, 0xB4EB, 0xB300, 0xB4EC, 0xB301, + 0xB4ED, 0xB304, 0xB4EE, 0xB308, 0xB4EF, 0xB310, 0xB4F0, 0xB311, + 0xB4F1, 0xB313, 0xB4F2, 0xB314, 0xB4F3, 0xB315, 0xB4F4, 0xB31C, + 0xB4F5, 0xB354, 0xB4F6, 0xB355, 0xB4F7, 0xB356, 0xB4F8, 0xB358, + 0xB4F9, 0xB35B, 0xB4FA, 0xB35C, 0xB4FB, 0xB35E, 0xB4FC, 0xB35F, + 0xB4FD, 0xB364, 0xB4FE, 0xB365, 0xB541, 0xD095, 0xB542, 0xD096, + 0xB543, 0xD097, 0xB544, 0xD098, 0xB545, 0xD099, 0xB546, 0xD09A, + 0xB547, 0xD09B, 0xB548, 0xD09C, 0xB549, 0xD09D, 0xB54A, 0xD09E, + 0xB54B, 0xD09F, 0xB54C, 0xD0A0, 0xB54D, 0xD0A1, 0xB54E, 0xD0A2, + 0xB54F, 0xD0A3, 0xB550, 0xD0A6, 0xB551, 0xD0A7, 0xB552, 0xD0A9, + 0xB553, 0xD0AA, 0xB554, 0xD0AB, 0xB555, 0xD0AD, 0xB556, 0xD0AE, + 0xB557, 0xD0AF, 0xB558, 0xD0B0, 0xB559, 0xD0B1, 0xB55A, 0xD0B2, + 0xB561, 0xD0B3, 0xB562, 0xD0B6, 0xB563, 0xD0B8, 0xB564, 0xD0BA, + 0xB565, 0xD0BB, 0xB566, 0xD0BC, 0xB567, 0xD0BD, 0xB568, 0xD0BE, + 0xB569, 0xD0BF, 0xB56A, 0xD0C2, 0xB56B, 0xD0C3, 0xB56C, 0xD0C5, + 0xB56D, 0xD0C6, 0xB56E, 0xD0C7, 0xB56F, 0xD0CA, 0xB570, 0xD0CB, + 0xB571, 0xD0CC, 0xB572, 0xD0CD, 0xB573, 0xD0CE, 0xB574, 0xD0CF, + 0xB575, 0xD0D2, 0xB576, 0xD0D6, 0xB577, 0xD0D7, 0xB578, 0xD0D8, + 0xB579, 0xD0D9, 0xB57A, 0xD0DA, 0xB581, 0xD0DB, 0xB582, 0xD0DE, + 0xB583, 0xD0DF, 0xB584, 0xD0E1, 0xB585, 0xD0E2, 0xB586, 0xD0E3, + 0xB587, 0xD0E5, 0xB588, 0xD0E6, 0xB589, 0xD0E7, 0xB58A, 0xD0E8, + 0xB58B, 0xD0E9, 0xB58C, 0xD0EA, 0xB58D, 0xD0EB, 0xB58E, 0xD0EE, + 0xB58F, 0xD0F2, 0xB590, 0xD0F3, 0xB591, 0xD0F4, 0xB592, 0xD0F5, + 0xB593, 0xD0F6, 0xB594, 0xD0F7, 0xB595, 0xD0F9, 0xB596, 0xD0FA, + 0xB597, 0xD0FB, 0xB598, 0xD0FC, 0xB599, 0xD0FD, 0xB59A, 0xD0FE, + 0xB59B, 0xD0FF, 0xB59C, 0xD100, 0xB59D, 0xD101, 0xB59E, 0xD102, + 0xB59F, 0xD103, 0xB5A0, 0xD104, 0xB5A1, 0xB367, 0xB5A2, 0xB369, + 0xB5A3, 0xB36B, 0xB5A4, 0xB36E, 0xB5A5, 0xB370, 0xB5A6, 0xB371, + 0xB5A7, 0xB374, 0xB5A8, 0xB378, 0xB5A9, 0xB380, 0xB5AA, 0xB381, + 0xB5AB, 0xB383, 0xB5AC, 0xB384, 0xB5AD, 0xB385, 0xB5AE, 0xB38C, + 0xB5AF, 0xB390, 0xB5B0, 0xB394, 0xB5B1, 0xB3A0, 0xB5B2, 0xB3A1, + 0xB5B3, 0xB3A8, 0xB5B4, 0xB3AC, 0xB5B5, 0xB3C4, 0xB5B6, 0xB3C5, + 0xB5B7, 0xB3C8, 0xB5B8, 0xB3CB, 0xB5B9, 0xB3CC, 0xB5BA, 0xB3CE, + 0xB5BB, 0xB3D0, 0xB5BC, 0xB3D4, 0xB5BD, 0xB3D5, 0xB5BE, 0xB3D7, + 0xB5BF, 0xB3D9, 0xB5C0, 0xB3DB, 0xB5C1, 0xB3DD, 0xB5C2, 0xB3E0, + 0xB5C3, 0xB3E4, 0xB5C4, 0xB3E8, 0xB5C5, 0xB3FC, 0xB5C6, 0xB410, + 0xB5C7, 0xB418, 0xB5C8, 0xB41C, 0xB5C9, 0xB420, 0xB5CA, 0xB428, + 0xB5CB, 0xB429, 0xB5CC, 0xB42B, 0xB5CD, 0xB434, 0xB5CE, 0xB450, + 0xB5CF, 0xB451, 0xB5D0, 0xB454, 0xB5D1, 0xB458, 0xB5D2, 0xB460, + 0xB5D3, 0xB461, 0xB5D4, 0xB463, 0xB5D5, 0xB465, 0xB5D6, 0xB46C, + 0xB5D7, 0xB480, 0xB5D8, 0xB488, 0xB5D9, 0xB49D, 0xB5DA, 0xB4A4, + 0xB5DB, 0xB4A8, 0xB5DC, 0xB4AC, 0xB5DD, 0xB4B5, 0xB5DE, 0xB4B7, + 0xB5DF, 0xB4B9, 0xB5E0, 0xB4C0, 0xB5E1, 0xB4C4, 0xB5E2, 0xB4C8, + 0xB5E3, 0xB4D0, 0xB5E4, 0xB4D5, 0xB5E5, 0xB4DC, 0xB5E6, 0xB4DD, + 0xB5E7, 0xB4E0, 0xB5E8, 0xB4E3, 0xB5E9, 0xB4E4, 0xB5EA, 0xB4E6, + 0xB5EB, 0xB4EC, 0xB5EC, 0xB4ED, 0xB5ED, 0xB4EF, 0xB5EE, 0xB4F1, + 0xB5EF, 0xB4F8, 0xB5F0, 0xB514, 0xB5F1, 0xB515, 0xB5F2, 0xB518, + 0xB5F3, 0xB51B, 0xB5F4, 0xB51C, 0xB5F5, 0xB524, 0xB5F6, 0xB525, + 0xB5F7, 0xB527, 0xB5F8, 0xB528, 0xB5F9, 0xB529, 0xB5FA, 0xB52A, + 0xB5FB, 0xB530, 0xB5FC, 0xB531, 0xB5FD, 0xB534, 0xB5FE, 0xB538, + 0xB641, 0xD105, 0xB642, 0xD106, 0xB643, 0xD107, 0xB644, 0xD108, + 0xB645, 0xD109, 0xB646, 0xD10A, 0xB647, 0xD10B, 0xB648, 0xD10C, + 0xB649, 0xD10E, 0xB64A, 0xD10F, 0xB64B, 0xD110, 0xB64C, 0xD111, + 0xB64D, 0xD112, 0xB64E, 0xD113, 0xB64F, 0xD114, 0xB650, 0xD115, + 0xB651, 0xD116, 0xB652, 0xD117, 0xB653, 0xD118, 0xB654, 0xD119, + 0xB655, 0xD11A, 0xB656, 0xD11B, 0xB657, 0xD11C, 0xB658, 0xD11D, + 0xB659, 0xD11E, 0xB65A, 0xD11F, 0xB661, 0xD120, 0xB662, 0xD121, + 0xB663, 0xD122, 0xB664, 0xD123, 0xB665, 0xD124, 0xB666, 0xD125, + 0xB667, 0xD126, 0xB668, 0xD127, 0xB669, 0xD128, 0xB66A, 0xD129, + 0xB66B, 0xD12A, 0xB66C, 0xD12B, 0xB66D, 0xD12C, 0xB66E, 0xD12D, + 0xB66F, 0xD12E, 0xB670, 0xD12F, 0xB671, 0xD132, 0xB672, 0xD133, + 0xB673, 0xD135, 0xB674, 0xD136, 0xB675, 0xD137, 0xB676, 0xD139, + 0xB677, 0xD13B, 0xB678, 0xD13C, 0xB679, 0xD13D, 0xB67A, 0xD13E, + 0xB681, 0xD13F, 0xB682, 0xD142, 0xB683, 0xD146, 0xB684, 0xD147, + 0xB685, 0xD148, 0xB686, 0xD149, 0xB687, 0xD14A, 0xB688, 0xD14B, + 0xB689, 0xD14E, 0xB68A, 0xD14F, 0xB68B, 0xD151, 0xB68C, 0xD152, + 0xB68D, 0xD153, 0xB68E, 0xD155, 0xB68F, 0xD156, 0xB690, 0xD157, + 0xB691, 0xD158, 0xB692, 0xD159, 0xB693, 0xD15A, 0xB694, 0xD15B, + 0xB695, 0xD15E, 0xB696, 0xD160, 0xB697, 0xD162, 0xB698, 0xD163, + 0xB699, 0xD164, 0xB69A, 0xD165, 0xB69B, 0xD166, 0xB69C, 0xD167, + 0xB69D, 0xD169, 0xB69E, 0xD16A, 0xB69F, 0xD16B, 0xB6A0, 0xD16D, + 0xB6A1, 0xB540, 0xB6A2, 0xB541, 0xB6A3, 0xB543, 0xB6A4, 0xB544, + 0xB6A5, 0xB545, 0xB6A6, 0xB54B, 0xB6A7, 0xB54C, 0xB6A8, 0xB54D, + 0xB6A9, 0xB550, 0xB6AA, 0xB554, 0xB6AB, 0xB55C, 0xB6AC, 0xB55D, + 0xB6AD, 0xB55F, 0xB6AE, 0xB560, 0xB6AF, 0xB561, 0xB6B0, 0xB5A0, + 0xB6B1, 0xB5A1, 0xB6B2, 0xB5A4, 0xB6B3, 0xB5A8, 0xB6B4, 0xB5AA, + 0xB6B5, 0xB5AB, 0xB6B6, 0xB5B0, 0xB6B7, 0xB5B1, 0xB6B8, 0xB5B3, + 0xB6B9, 0xB5B4, 0xB6BA, 0xB5B5, 0xB6BB, 0xB5BB, 0xB6BC, 0xB5BC, + 0xB6BD, 0xB5BD, 0xB6BE, 0xB5C0, 0xB6BF, 0xB5C4, 0xB6C0, 0xB5CC, + 0xB6C1, 0xB5CD, 0xB6C2, 0xB5CF, 0xB6C3, 0xB5D0, 0xB6C4, 0xB5D1, + 0xB6C5, 0xB5D8, 0xB6C6, 0xB5EC, 0xB6C7, 0xB610, 0xB6C8, 0xB611, + 0xB6C9, 0xB614, 0xB6CA, 0xB618, 0xB6CB, 0xB625, 0xB6CC, 0xB62C, + 0xB6CD, 0xB634, 0xB6CE, 0xB648, 0xB6CF, 0xB664, 0xB6D0, 0xB668, + 0xB6D1, 0xB69C, 0xB6D2, 0xB69D, 0xB6D3, 0xB6A0, 0xB6D4, 0xB6A4, + 0xB6D5, 0xB6AB, 0xB6D6, 0xB6AC, 0xB6D7, 0xB6B1, 0xB6D8, 0xB6D4, + 0xB6D9, 0xB6F0, 0xB6DA, 0xB6F4, 0xB6DB, 0xB6F8, 0xB6DC, 0xB700, + 0xB6DD, 0xB701, 0xB6DE, 0xB705, 0xB6DF, 0xB728, 0xB6E0, 0xB729, + 0xB6E1, 0xB72C, 0xB6E2, 0xB72F, 0xB6E3, 0xB730, 0xB6E4, 0xB738, + 0xB6E5, 0xB739, 0xB6E6, 0xB73B, 0xB6E7, 0xB744, 0xB6E8, 0xB748, + 0xB6E9, 0xB74C, 0xB6EA, 0xB754, 0xB6EB, 0xB755, 0xB6EC, 0xB760, + 0xB6ED, 0xB764, 0xB6EE, 0xB768, 0xB6EF, 0xB770, 0xB6F0, 0xB771, + 0xB6F1, 0xB773, 0xB6F2, 0xB775, 0xB6F3, 0xB77C, 0xB6F4, 0xB77D, + 0xB6F5, 0xB780, 0xB6F6, 0xB784, 0xB6F7, 0xB78C, 0xB6F8, 0xB78D, + 0xB6F9, 0xB78F, 0xB6FA, 0xB790, 0xB6FB, 0xB791, 0xB6FC, 0xB792, + 0xB6FD, 0xB796, 0xB6FE, 0xB797, 0xB741, 0xD16E, 0xB742, 0xD16F, + 0xB743, 0xD170, 0xB744, 0xD171, 0xB745, 0xD172, 0xB746, 0xD173, + 0xB747, 0xD174, 0xB748, 0xD175, 0xB749, 0xD176, 0xB74A, 0xD177, + 0xB74B, 0xD178, 0xB74C, 0xD179, 0xB74D, 0xD17A, 0xB74E, 0xD17B, + 0xB74F, 0xD17D, 0xB750, 0xD17E, 0xB751, 0xD17F, 0xB752, 0xD180, + 0xB753, 0xD181, 0xB754, 0xD182, 0xB755, 0xD183, 0xB756, 0xD185, + 0xB757, 0xD186, 0xB758, 0xD187, 0xB759, 0xD189, 0xB75A, 0xD18A, + 0xB761, 0xD18B, 0xB762, 0xD18C, 0xB763, 0xD18D, 0xB764, 0xD18E, + 0xB765, 0xD18F, 0xB766, 0xD190, 0xB767, 0xD191, 0xB768, 0xD192, + 0xB769, 0xD193, 0xB76A, 0xD194, 0xB76B, 0xD195, 0xB76C, 0xD196, + 0xB76D, 0xD197, 0xB76E, 0xD198, 0xB76F, 0xD199, 0xB770, 0xD19A, + 0xB771, 0xD19B, 0xB772, 0xD19C, 0xB773, 0xD19D, 0xB774, 0xD19E, + 0xB775, 0xD19F, 0xB776, 0xD1A2, 0xB777, 0xD1A3, 0xB778, 0xD1A5, + 0xB779, 0xD1A6, 0xB77A, 0xD1A7, 0xB781, 0xD1A9, 0xB782, 0xD1AA, + 0xB783, 0xD1AB, 0xB784, 0xD1AC, 0xB785, 0xD1AD, 0xB786, 0xD1AE, + 0xB787, 0xD1AF, 0xB788, 0xD1B2, 0xB789, 0xD1B4, 0xB78A, 0xD1B6, + 0xB78B, 0xD1B7, 0xB78C, 0xD1B8, 0xB78D, 0xD1B9, 0xB78E, 0xD1BB, + 0xB78F, 0xD1BD, 0xB790, 0xD1BE, 0xB791, 0xD1BF, 0xB792, 0xD1C1, + 0xB793, 0xD1C2, 0xB794, 0xD1C3, 0xB795, 0xD1C4, 0xB796, 0xD1C5, + 0xB797, 0xD1C6, 0xB798, 0xD1C7, 0xB799, 0xD1C8, 0xB79A, 0xD1C9, + 0xB79B, 0xD1CA, 0xB79C, 0xD1CB, 0xB79D, 0xD1CC, 0xB79E, 0xD1CD, + 0xB79F, 0xD1CE, 0xB7A0, 0xD1CF, 0xB7A1, 0xB798, 0xB7A2, 0xB799, + 0xB7A3, 0xB79C, 0xB7A4, 0xB7A0, 0xB7A5, 0xB7A8, 0xB7A6, 0xB7A9, + 0xB7A7, 0xB7AB, 0xB7A8, 0xB7AC, 0xB7A9, 0xB7AD, 0xB7AA, 0xB7B4, + 0xB7AB, 0xB7B5, 0xB7AC, 0xB7B8, 0xB7AD, 0xB7C7, 0xB7AE, 0xB7C9, + 0xB7AF, 0xB7EC, 0xB7B0, 0xB7ED, 0xB7B1, 0xB7F0, 0xB7B2, 0xB7F4, + 0xB7B3, 0xB7FC, 0xB7B4, 0xB7FD, 0xB7B5, 0xB7FF, 0xB7B6, 0xB800, + 0xB7B7, 0xB801, 0xB7B8, 0xB807, 0xB7B9, 0xB808, 0xB7BA, 0xB809, + 0xB7BB, 0xB80C, 0xB7BC, 0xB810, 0xB7BD, 0xB818, 0xB7BE, 0xB819, + 0xB7BF, 0xB81B, 0xB7C0, 0xB81D, 0xB7C1, 0xB824, 0xB7C2, 0xB825, + 0xB7C3, 0xB828, 0xB7C4, 0xB82C, 0xB7C5, 0xB834, 0xB7C6, 0xB835, + 0xB7C7, 0xB837, 0xB7C8, 0xB838, 0xB7C9, 0xB839, 0xB7CA, 0xB840, + 0xB7CB, 0xB844, 0xB7CC, 0xB851, 0xB7CD, 0xB853, 0xB7CE, 0xB85C, + 0xB7CF, 0xB85D, 0xB7D0, 0xB860, 0xB7D1, 0xB864, 0xB7D2, 0xB86C, + 0xB7D3, 0xB86D, 0xB7D4, 0xB86F, 0xB7D5, 0xB871, 0xB7D6, 0xB878, + 0xB7D7, 0xB87C, 0xB7D8, 0xB88D, 0xB7D9, 0xB8A8, 0xB7DA, 0xB8B0, + 0xB7DB, 0xB8B4, 0xB7DC, 0xB8B8, 0xB7DD, 0xB8C0, 0xB7DE, 0xB8C1, + 0xB7DF, 0xB8C3, 0xB7E0, 0xB8C5, 0xB7E1, 0xB8CC, 0xB7E2, 0xB8D0, + 0xB7E3, 0xB8D4, 0xB7E4, 0xB8DD, 0xB7E5, 0xB8DF, 0xB7E6, 0xB8E1, + 0xB7E7, 0xB8E8, 0xB7E8, 0xB8E9, 0xB7E9, 0xB8EC, 0xB7EA, 0xB8F0, + 0xB7EB, 0xB8F8, 0xB7EC, 0xB8F9, 0xB7ED, 0xB8FB, 0xB7EE, 0xB8FD, + 0xB7EF, 0xB904, 0xB7F0, 0xB918, 0xB7F1, 0xB920, 0xB7F2, 0xB93C, + 0xB7F3, 0xB93D, 0xB7F4, 0xB940, 0xB7F5, 0xB944, 0xB7F6, 0xB94C, + 0xB7F7, 0xB94F, 0xB7F8, 0xB951, 0xB7F9, 0xB958, 0xB7FA, 0xB959, + 0xB7FB, 0xB95C, 0xB7FC, 0xB960, 0xB7FD, 0xB968, 0xB7FE, 0xB969, + 0xB841, 0xD1D0, 0xB842, 0xD1D1, 0xB843, 0xD1D2, 0xB844, 0xD1D3, + 0xB845, 0xD1D4, 0xB846, 0xD1D5, 0xB847, 0xD1D6, 0xB848, 0xD1D7, + 0xB849, 0xD1D9, 0xB84A, 0xD1DA, 0xB84B, 0xD1DB, 0xB84C, 0xD1DC, + 0xB84D, 0xD1DD, 0xB84E, 0xD1DE, 0xB84F, 0xD1DF, 0xB850, 0xD1E0, + 0xB851, 0xD1E1, 0xB852, 0xD1E2, 0xB853, 0xD1E3, 0xB854, 0xD1E4, + 0xB855, 0xD1E5, 0xB856, 0xD1E6, 0xB857, 0xD1E7, 0xB858, 0xD1E8, + 0xB859, 0xD1E9, 0xB85A, 0xD1EA, 0xB861, 0xD1EB, 0xB862, 0xD1EC, + 0xB863, 0xD1ED, 0xB864, 0xD1EE, 0xB865, 0xD1EF, 0xB866, 0xD1F0, + 0xB867, 0xD1F1, 0xB868, 0xD1F2, 0xB869, 0xD1F3, 0xB86A, 0xD1F5, + 0xB86B, 0xD1F6, 0xB86C, 0xD1F7, 0xB86D, 0xD1F9, 0xB86E, 0xD1FA, + 0xB86F, 0xD1FB, 0xB870, 0xD1FC, 0xB871, 0xD1FD, 0xB872, 0xD1FE, + 0xB873, 0xD1FF, 0xB874, 0xD200, 0xB875, 0xD201, 0xB876, 0xD202, + 0xB877, 0xD203, 0xB878, 0xD204, 0xB879, 0xD205, 0xB87A, 0xD206, + 0xB881, 0xD208, 0xB882, 0xD20A, 0xB883, 0xD20B, 0xB884, 0xD20C, + 0xB885, 0xD20D, 0xB886, 0xD20E, 0xB887, 0xD20F, 0xB888, 0xD211, + 0xB889, 0xD212, 0xB88A, 0xD213, 0xB88B, 0xD214, 0xB88C, 0xD215, + 0xB88D, 0xD216, 0xB88E, 0xD217, 0xB88F, 0xD218, 0xB890, 0xD219, + 0xB891, 0xD21A, 0xB892, 0xD21B, 0xB893, 0xD21C, 0xB894, 0xD21D, + 0xB895, 0xD21E, 0xB896, 0xD21F, 0xB897, 0xD220, 0xB898, 0xD221, + 0xB899, 0xD222, 0xB89A, 0xD223, 0xB89B, 0xD224, 0xB89C, 0xD225, + 0xB89D, 0xD226, 0xB89E, 0xD227, 0xB89F, 0xD228, 0xB8A0, 0xD229, + 0xB8A1, 0xB96B, 0xB8A2, 0xB96D, 0xB8A3, 0xB974, 0xB8A4, 0xB975, + 0xB8A5, 0xB978, 0xB8A6, 0xB97C, 0xB8A7, 0xB984, 0xB8A8, 0xB985, + 0xB8A9, 0xB987, 0xB8AA, 0xB989, 0xB8AB, 0xB98A, 0xB8AC, 0xB98D, + 0xB8AD, 0xB98E, 0xB8AE, 0xB9AC, 0xB8AF, 0xB9AD, 0xB8B0, 0xB9B0, + 0xB8B1, 0xB9B4, 0xB8B2, 0xB9BC, 0xB8B3, 0xB9BD, 0xB8B4, 0xB9BF, + 0xB8B5, 0xB9C1, 0xB8B6, 0xB9C8, 0xB8B7, 0xB9C9, 0xB8B8, 0xB9CC, + 0xB8B9, 0xB9CE, 0xB8BA, 0xB9CF, 0xB8BB, 0xB9D0, 0xB8BC, 0xB9D1, + 0xB8BD, 0xB9D2, 0xB8BE, 0xB9D8, 0xB8BF, 0xB9D9, 0xB8C0, 0xB9DB, + 0xB8C1, 0xB9DD, 0xB8C2, 0xB9DE, 0xB8C3, 0xB9E1, 0xB8C4, 0xB9E3, + 0xB8C5, 0xB9E4, 0xB8C6, 0xB9E5, 0xB8C7, 0xB9E8, 0xB8C8, 0xB9EC, + 0xB8C9, 0xB9F4, 0xB8CA, 0xB9F5, 0xB8CB, 0xB9F7, 0xB8CC, 0xB9F8, + 0xB8CD, 0xB9F9, 0xB8CE, 0xB9FA, 0xB8CF, 0xBA00, 0xB8D0, 0xBA01, + 0xB8D1, 0xBA08, 0xB8D2, 0xBA15, 0xB8D3, 0xBA38, 0xB8D4, 0xBA39, + 0xB8D5, 0xBA3C, 0xB8D6, 0xBA40, 0xB8D7, 0xBA42, 0xB8D8, 0xBA48, + 0xB8D9, 0xBA49, 0xB8DA, 0xBA4B, 0xB8DB, 0xBA4D, 0xB8DC, 0xBA4E, + 0xB8DD, 0xBA53, 0xB8DE, 0xBA54, 0xB8DF, 0xBA55, 0xB8E0, 0xBA58, + 0xB8E1, 0xBA5C, 0xB8E2, 0xBA64, 0xB8E3, 0xBA65, 0xB8E4, 0xBA67, + 0xB8E5, 0xBA68, 0xB8E6, 0xBA69, 0xB8E7, 0xBA70, 0xB8E8, 0xBA71, + 0xB8E9, 0xBA74, 0xB8EA, 0xBA78, 0xB8EB, 0xBA83, 0xB8EC, 0xBA84, + 0xB8ED, 0xBA85, 0xB8EE, 0xBA87, 0xB8EF, 0xBA8C, 0xB8F0, 0xBAA8, + 0xB8F1, 0xBAA9, 0xB8F2, 0xBAAB, 0xB8F3, 0xBAAC, 0xB8F4, 0xBAB0, + 0xB8F5, 0xBAB2, 0xB8F6, 0xBAB8, 0xB8F7, 0xBAB9, 0xB8F8, 0xBABB, + 0xB8F9, 0xBABD, 0xB8FA, 0xBAC4, 0xB8FB, 0xBAC8, 0xB8FC, 0xBAD8, + 0xB8FD, 0xBAD9, 0xB8FE, 0xBAFC, 0xB941, 0xD22A, 0xB942, 0xD22B, + 0xB943, 0xD22E, 0xB944, 0xD22F, 0xB945, 0xD231, 0xB946, 0xD232, + 0xB947, 0xD233, 0xB948, 0xD235, 0xB949, 0xD236, 0xB94A, 0xD237, + 0xB94B, 0xD238, 0xB94C, 0xD239, 0xB94D, 0xD23A, 0xB94E, 0xD23B, + 0xB94F, 0xD23E, 0xB950, 0xD240, 0xB951, 0xD242, 0xB952, 0xD243, + 0xB953, 0xD244, 0xB954, 0xD245, 0xB955, 0xD246, 0xB956, 0xD247, + 0xB957, 0xD249, 0xB958, 0xD24A, 0xB959, 0xD24B, 0xB95A, 0xD24C, + 0xB961, 0xD24D, 0xB962, 0xD24E, 0xB963, 0xD24F, 0xB964, 0xD250, + 0xB965, 0xD251, 0xB966, 0xD252, 0xB967, 0xD253, 0xB968, 0xD254, + 0xB969, 0xD255, 0xB96A, 0xD256, 0xB96B, 0xD257, 0xB96C, 0xD258, + 0xB96D, 0xD259, 0xB96E, 0xD25A, 0xB96F, 0xD25B, 0xB970, 0xD25D, + 0xB971, 0xD25E, 0xB972, 0xD25F, 0xB973, 0xD260, 0xB974, 0xD261, + 0xB975, 0xD262, 0xB976, 0xD263, 0xB977, 0xD265, 0xB978, 0xD266, + 0xB979, 0xD267, 0xB97A, 0xD268, 0xB981, 0xD269, 0xB982, 0xD26A, + 0xB983, 0xD26B, 0xB984, 0xD26C, 0xB985, 0xD26D, 0xB986, 0xD26E, + 0xB987, 0xD26F, 0xB988, 0xD270, 0xB989, 0xD271, 0xB98A, 0xD272, + 0xB98B, 0xD273, 0xB98C, 0xD274, 0xB98D, 0xD275, 0xB98E, 0xD276, + 0xB98F, 0xD277, 0xB990, 0xD278, 0xB991, 0xD279, 0xB992, 0xD27A, + 0xB993, 0xD27B, 0xB994, 0xD27C, 0xB995, 0xD27D, 0xB996, 0xD27E, + 0xB997, 0xD27F, 0xB998, 0xD282, 0xB999, 0xD283, 0xB99A, 0xD285, + 0xB99B, 0xD286, 0xB99C, 0xD287, 0xB99D, 0xD289, 0xB99E, 0xD28A, + 0xB99F, 0xD28B, 0xB9A0, 0xD28C, 0xB9A1, 0xBB00, 0xB9A2, 0xBB04, + 0xB9A3, 0xBB0D, 0xB9A4, 0xBB0F, 0xB9A5, 0xBB11, 0xB9A6, 0xBB18, + 0xB9A7, 0xBB1C, 0xB9A8, 0xBB20, 0xB9A9, 0xBB29, 0xB9AA, 0xBB2B, + 0xB9AB, 0xBB34, 0xB9AC, 0xBB35, 0xB9AD, 0xBB36, 0xB9AE, 0xBB38, + 0xB9AF, 0xBB3B, 0xB9B0, 0xBB3C, 0xB9B1, 0xBB3D, 0xB9B2, 0xBB3E, + 0xB9B3, 0xBB44, 0xB9B4, 0xBB45, 0xB9B5, 0xBB47, 0xB9B6, 0xBB49, + 0xB9B7, 0xBB4D, 0xB9B8, 0xBB4F, 0xB9B9, 0xBB50, 0xB9BA, 0xBB54, + 0xB9BB, 0xBB58, 0xB9BC, 0xBB61, 0xB9BD, 0xBB63, 0xB9BE, 0xBB6C, + 0xB9BF, 0xBB88, 0xB9C0, 0xBB8C, 0xB9C1, 0xBB90, 0xB9C2, 0xBBA4, + 0xB9C3, 0xBBA8, 0xB9C4, 0xBBAC, 0xB9C5, 0xBBB4, 0xB9C6, 0xBBB7, + 0xB9C7, 0xBBC0, 0xB9C8, 0xBBC4, 0xB9C9, 0xBBC8, 0xB9CA, 0xBBD0, + 0xB9CB, 0xBBD3, 0xB9CC, 0xBBF8, 0xB9CD, 0xBBF9, 0xB9CE, 0xBBFC, + 0xB9CF, 0xBBFF, 0xB9D0, 0xBC00, 0xB9D1, 0xBC02, 0xB9D2, 0xBC08, + 0xB9D3, 0xBC09, 0xB9D4, 0xBC0B, 0xB9D5, 0xBC0C, 0xB9D6, 0xBC0D, + 0xB9D7, 0xBC0F, 0xB9D8, 0xBC11, 0xB9D9, 0xBC14, 0xB9DA, 0xBC15, + 0xB9DB, 0xBC16, 0xB9DC, 0xBC17, 0xB9DD, 0xBC18, 0xB9DE, 0xBC1B, + 0xB9DF, 0xBC1C, 0xB9E0, 0xBC1D, 0xB9E1, 0xBC1E, 0xB9E2, 0xBC1F, + 0xB9E3, 0xBC24, 0xB9E4, 0xBC25, 0xB9E5, 0xBC27, 0xB9E6, 0xBC29, + 0xB9E7, 0xBC2D, 0xB9E8, 0xBC30, 0xB9E9, 0xBC31, 0xB9EA, 0xBC34, + 0xB9EB, 0xBC38, 0xB9EC, 0xBC40, 0xB9ED, 0xBC41, 0xB9EE, 0xBC43, + 0xB9EF, 0xBC44, 0xB9F0, 0xBC45, 0xB9F1, 0xBC49, 0xB9F2, 0xBC4C, + 0xB9F3, 0xBC4D, 0xB9F4, 0xBC50, 0xB9F5, 0xBC5D, 0xB9F6, 0xBC84, + 0xB9F7, 0xBC85, 0xB9F8, 0xBC88, 0xB9F9, 0xBC8B, 0xB9FA, 0xBC8C, + 0xB9FB, 0xBC8E, 0xB9FC, 0xBC94, 0xB9FD, 0xBC95, 0xB9FE, 0xBC97, + 0xBA41, 0xD28D, 0xBA42, 0xD28E, 0xBA43, 0xD28F, 0xBA44, 0xD292, + 0xBA45, 0xD293, 0xBA46, 0xD294, 0xBA47, 0xD296, 0xBA48, 0xD297, + 0xBA49, 0xD298, 0xBA4A, 0xD299, 0xBA4B, 0xD29A, 0xBA4C, 0xD29B, + 0xBA4D, 0xD29D, 0xBA4E, 0xD29E, 0xBA4F, 0xD29F, 0xBA50, 0xD2A1, + 0xBA51, 0xD2A2, 0xBA52, 0xD2A3, 0xBA53, 0xD2A5, 0xBA54, 0xD2A6, + 0xBA55, 0xD2A7, 0xBA56, 0xD2A8, 0xBA57, 0xD2A9, 0xBA58, 0xD2AA, + 0xBA59, 0xD2AB, 0xBA5A, 0xD2AD, 0xBA61, 0xD2AE, 0xBA62, 0xD2AF, + 0xBA63, 0xD2B0, 0xBA64, 0xD2B2, 0xBA65, 0xD2B3, 0xBA66, 0xD2B4, + 0xBA67, 0xD2B5, 0xBA68, 0xD2B6, 0xBA69, 0xD2B7, 0xBA6A, 0xD2BA, + 0xBA6B, 0xD2BB, 0xBA6C, 0xD2BD, 0xBA6D, 0xD2BE, 0xBA6E, 0xD2C1, + 0xBA6F, 0xD2C3, 0xBA70, 0xD2C4, 0xBA71, 0xD2C5, 0xBA72, 0xD2C6, + 0xBA73, 0xD2C7, 0xBA74, 0xD2CA, 0xBA75, 0xD2CC, 0xBA76, 0xD2CD, + 0xBA77, 0xD2CE, 0xBA78, 0xD2CF, 0xBA79, 0xD2D0, 0xBA7A, 0xD2D1, + 0xBA81, 0xD2D2, 0xBA82, 0xD2D3, 0xBA83, 0xD2D5, 0xBA84, 0xD2D6, + 0xBA85, 0xD2D7, 0xBA86, 0xD2D9, 0xBA87, 0xD2DA, 0xBA88, 0xD2DB, + 0xBA89, 0xD2DD, 0xBA8A, 0xD2DE, 0xBA8B, 0xD2DF, 0xBA8C, 0xD2E0, + 0xBA8D, 0xD2E1, 0xBA8E, 0xD2E2, 0xBA8F, 0xD2E3, 0xBA90, 0xD2E6, + 0xBA91, 0xD2E7, 0xBA92, 0xD2E8, 0xBA93, 0xD2E9, 0xBA94, 0xD2EA, + 0xBA95, 0xD2EB, 0xBA96, 0xD2EC, 0xBA97, 0xD2ED, 0xBA98, 0xD2EE, + 0xBA99, 0xD2EF, 0xBA9A, 0xD2F2, 0xBA9B, 0xD2F3, 0xBA9C, 0xD2F5, + 0xBA9D, 0xD2F6, 0xBA9E, 0xD2F7, 0xBA9F, 0xD2F9, 0xBAA0, 0xD2FA, + 0xBAA1, 0xBC99, 0xBAA2, 0xBC9A, 0xBAA3, 0xBCA0, 0xBAA4, 0xBCA1, + 0xBAA5, 0xBCA4, 0xBAA6, 0xBCA7, 0xBAA7, 0xBCA8, 0xBAA8, 0xBCB0, + 0xBAA9, 0xBCB1, 0xBAAA, 0xBCB3, 0xBAAB, 0xBCB4, 0xBAAC, 0xBCB5, + 0xBAAD, 0xBCBC, 0xBAAE, 0xBCBD, 0xBAAF, 0xBCC0, 0xBAB0, 0xBCC4, + 0xBAB1, 0xBCCD, 0xBAB2, 0xBCCF, 0xBAB3, 0xBCD0, 0xBAB4, 0xBCD1, + 0xBAB5, 0xBCD5, 0xBAB6, 0xBCD8, 0xBAB7, 0xBCDC, 0xBAB8, 0xBCF4, + 0xBAB9, 0xBCF5, 0xBABA, 0xBCF6, 0xBABB, 0xBCF8, 0xBABC, 0xBCFC, + 0xBABD, 0xBD04, 0xBABE, 0xBD05, 0xBABF, 0xBD07, 0xBAC0, 0xBD09, + 0xBAC1, 0xBD10, 0xBAC2, 0xBD14, 0xBAC3, 0xBD24, 0xBAC4, 0xBD2C, + 0xBAC5, 0xBD40, 0xBAC6, 0xBD48, 0xBAC7, 0xBD49, 0xBAC8, 0xBD4C, + 0xBAC9, 0xBD50, 0xBACA, 0xBD58, 0xBACB, 0xBD59, 0xBACC, 0xBD64, + 0xBACD, 0xBD68, 0xBACE, 0xBD80, 0xBACF, 0xBD81, 0xBAD0, 0xBD84, + 0xBAD1, 0xBD87, 0xBAD2, 0xBD88, 0xBAD3, 0xBD89, 0xBAD4, 0xBD8A, + 0xBAD5, 0xBD90, 0xBAD6, 0xBD91, 0xBAD7, 0xBD93, 0xBAD8, 0xBD95, + 0xBAD9, 0xBD99, 0xBADA, 0xBD9A, 0xBADB, 0xBD9C, 0xBADC, 0xBDA4, + 0xBADD, 0xBDB0, 0xBADE, 0xBDB8, 0xBADF, 0xBDD4, 0xBAE0, 0xBDD5, + 0xBAE1, 0xBDD8, 0xBAE2, 0xBDDC, 0xBAE3, 0xBDE9, 0xBAE4, 0xBDF0, + 0xBAE5, 0xBDF4, 0xBAE6, 0xBDF8, 0xBAE7, 0xBE00, 0xBAE8, 0xBE03, + 0xBAE9, 0xBE05, 0xBAEA, 0xBE0C, 0xBAEB, 0xBE0D, 0xBAEC, 0xBE10, + 0xBAED, 0xBE14, 0xBAEE, 0xBE1C, 0xBAEF, 0xBE1D, 0xBAF0, 0xBE1F, + 0xBAF1, 0xBE44, 0xBAF2, 0xBE45, 0xBAF3, 0xBE48, 0xBAF4, 0xBE4C, + 0xBAF5, 0xBE4E, 0xBAF6, 0xBE54, 0xBAF7, 0xBE55, 0xBAF8, 0xBE57, + 0xBAF9, 0xBE59, 0xBAFA, 0xBE5A, 0xBAFB, 0xBE5B, 0xBAFC, 0xBE60, + 0xBAFD, 0xBE61, 0xBAFE, 0xBE64, 0xBB41, 0xD2FB, 0xBB42, 0xD2FC, + 0xBB43, 0xD2FD, 0xBB44, 0xD2FE, 0xBB45, 0xD2FF, 0xBB46, 0xD302, + 0xBB47, 0xD304, 0xBB48, 0xD306, 0xBB49, 0xD307, 0xBB4A, 0xD308, + 0xBB4B, 0xD309, 0xBB4C, 0xD30A, 0xBB4D, 0xD30B, 0xBB4E, 0xD30F, + 0xBB4F, 0xD311, 0xBB50, 0xD312, 0xBB51, 0xD313, 0xBB52, 0xD315, + 0xBB53, 0xD317, 0xBB54, 0xD318, 0xBB55, 0xD319, 0xBB56, 0xD31A, + 0xBB57, 0xD31B, 0xBB58, 0xD31E, 0xBB59, 0xD322, 0xBB5A, 0xD323, + 0xBB61, 0xD324, 0xBB62, 0xD326, 0xBB63, 0xD327, 0xBB64, 0xD32A, + 0xBB65, 0xD32B, 0xBB66, 0xD32D, 0xBB67, 0xD32E, 0xBB68, 0xD32F, + 0xBB69, 0xD331, 0xBB6A, 0xD332, 0xBB6B, 0xD333, 0xBB6C, 0xD334, + 0xBB6D, 0xD335, 0xBB6E, 0xD336, 0xBB6F, 0xD337, 0xBB70, 0xD33A, + 0xBB71, 0xD33E, 0xBB72, 0xD33F, 0xBB73, 0xD340, 0xBB74, 0xD341, + 0xBB75, 0xD342, 0xBB76, 0xD343, 0xBB77, 0xD346, 0xBB78, 0xD347, + 0xBB79, 0xD348, 0xBB7A, 0xD349, 0xBB81, 0xD34A, 0xBB82, 0xD34B, + 0xBB83, 0xD34C, 0xBB84, 0xD34D, 0xBB85, 0xD34E, 0xBB86, 0xD34F, + 0xBB87, 0xD350, 0xBB88, 0xD351, 0xBB89, 0xD352, 0xBB8A, 0xD353, + 0xBB8B, 0xD354, 0xBB8C, 0xD355, 0xBB8D, 0xD356, 0xBB8E, 0xD357, + 0xBB8F, 0xD358, 0xBB90, 0xD359, 0xBB91, 0xD35A, 0xBB92, 0xD35B, + 0xBB93, 0xD35C, 0xBB94, 0xD35D, 0xBB95, 0xD35E, 0xBB96, 0xD35F, + 0xBB97, 0xD360, 0xBB98, 0xD361, 0xBB99, 0xD362, 0xBB9A, 0xD363, + 0xBB9B, 0xD364, 0xBB9C, 0xD365, 0xBB9D, 0xD366, 0xBB9E, 0xD367, + 0xBB9F, 0xD368, 0xBBA0, 0xD369, 0xBBA1, 0xBE68, 0xBBA2, 0xBE6A, + 0xBBA3, 0xBE70, 0xBBA4, 0xBE71, 0xBBA5, 0xBE73, 0xBBA6, 0xBE74, + 0xBBA7, 0xBE75, 0xBBA8, 0xBE7B, 0xBBA9, 0xBE7C, 0xBBAA, 0xBE7D, + 0xBBAB, 0xBE80, 0xBBAC, 0xBE84, 0xBBAD, 0xBE8C, 0xBBAE, 0xBE8D, + 0xBBAF, 0xBE8F, 0xBBB0, 0xBE90, 0xBBB1, 0xBE91, 0xBBB2, 0xBE98, + 0xBBB3, 0xBE99, 0xBBB4, 0xBEA8, 0xBBB5, 0xBED0, 0xBBB6, 0xBED1, + 0xBBB7, 0xBED4, 0xBBB8, 0xBED7, 0xBBB9, 0xBED8, 0xBBBA, 0xBEE0, + 0xBBBB, 0xBEE3, 0xBBBC, 0xBEE4, 0xBBBD, 0xBEE5, 0xBBBE, 0xBEEC, + 0xBBBF, 0xBF01, 0xBBC0, 0xBF08, 0xBBC1, 0xBF09, 0xBBC2, 0xBF18, + 0xBBC3, 0xBF19, 0xBBC4, 0xBF1B, 0xBBC5, 0xBF1C, 0xBBC6, 0xBF1D, + 0xBBC7, 0xBF40, 0xBBC8, 0xBF41, 0xBBC9, 0xBF44, 0xBBCA, 0xBF48, + 0xBBCB, 0xBF50, 0xBBCC, 0xBF51, 0xBBCD, 0xBF55, 0xBBCE, 0xBF94, + 0xBBCF, 0xBFB0, 0xBBD0, 0xBFC5, 0xBBD1, 0xBFCC, 0xBBD2, 0xBFCD, + 0xBBD3, 0xBFD0, 0xBBD4, 0xBFD4, 0xBBD5, 0xBFDC, 0xBBD6, 0xBFDF, + 0xBBD7, 0xBFE1, 0xBBD8, 0xC03C, 0xBBD9, 0xC051, 0xBBDA, 0xC058, + 0xBBDB, 0xC05C, 0xBBDC, 0xC060, 0xBBDD, 0xC068, 0xBBDE, 0xC069, + 0xBBDF, 0xC090, 0xBBE0, 0xC091, 0xBBE1, 0xC094, 0xBBE2, 0xC098, + 0xBBE3, 0xC0A0, 0xBBE4, 0xC0A1, 0xBBE5, 0xC0A3, 0xBBE6, 0xC0A5, + 0xBBE7, 0xC0AC, 0xBBE8, 0xC0AD, 0xBBE9, 0xC0AF, 0xBBEA, 0xC0B0, + 0xBBEB, 0xC0B3, 0xBBEC, 0xC0B4, 0xBBED, 0xC0B5, 0xBBEE, 0xC0B6, + 0xBBEF, 0xC0BC, 0xBBF0, 0xC0BD, 0xBBF1, 0xC0BF, 0xBBF2, 0xC0C0, + 0xBBF3, 0xC0C1, 0xBBF4, 0xC0C5, 0xBBF5, 0xC0C8, 0xBBF6, 0xC0C9, + 0xBBF7, 0xC0CC, 0xBBF8, 0xC0D0, 0xBBF9, 0xC0D8, 0xBBFA, 0xC0D9, + 0xBBFB, 0xC0DB, 0xBBFC, 0xC0DC, 0xBBFD, 0xC0DD, 0xBBFE, 0xC0E4, + 0xBC41, 0xD36A, 0xBC42, 0xD36B, 0xBC43, 0xD36C, 0xBC44, 0xD36D, + 0xBC45, 0xD36E, 0xBC46, 0xD36F, 0xBC47, 0xD370, 0xBC48, 0xD371, + 0xBC49, 0xD372, 0xBC4A, 0xD373, 0xBC4B, 0xD374, 0xBC4C, 0xD375, + 0xBC4D, 0xD376, 0xBC4E, 0xD377, 0xBC4F, 0xD378, 0xBC50, 0xD379, + 0xBC51, 0xD37A, 0xBC52, 0xD37B, 0xBC53, 0xD37E, 0xBC54, 0xD37F, + 0xBC55, 0xD381, 0xBC56, 0xD382, 0xBC57, 0xD383, 0xBC58, 0xD385, + 0xBC59, 0xD386, 0xBC5A, 0xD387, 0xBC61, 0xD388, 0xBC62, 0xD389, + 0xBC63, 0xD38A, 0xBC64, 0xD38B, 0xBC65, 0xD38E, 0xBC66, 0xD392, + 0xBC67, 0xD393, 0xBC68, 0xD394, 0xBC69, 0xD395, 0xBC6A, 0xD396, + 0xBC6B, 0xD397, 0xBC6C, 0xD39A, 0xBC6D, 0xD39B, 0xBC6E, 0xD39D, + 0xBC6F, 0xD39E, 0xBC70, 0xD39F, 0xBC71, 0xD3A1, 0xBC72, 0xD3A2, + 0xBC73, 0xD3A3, 0xBC74, 0xD3A4, 0xBC75, 0xD3A5, 0xBC76, 0xD3A6, + 0xBC77, 0xD3A7, 0xBC78, 0xD3AA, 0xBC79, 0xD3AC, 0xBC7A, 0xD3AE, + 0xBC81, 0xD3AF, 0xBC82, 0xD3B0, 0xBC83, 0xD3B1, 0xBC84, 0xD3B2, + 0xBC85, 0xD3B3, 0xBC86, 0xD3B5, 0xBC87, 0xD3B6, 0xBC88, 0xD3B7, + 0xBC89, 0xD3B9, 0xBC8A, 0xD3BA, 0xBC8B, 0xD3BB, 0xBC8C, 0xD3BD, + 0xBC8D, 0xD3BE, 0xBC8E, 0xD3BF, 0xBC8F, 0xD3C0, 0xBC90, 0xD3C1, + 0xBC91, 0xD3C2, 0xBC92, 0xD3C3, 0xBC93, 0xD3C6, 0xBC94, 0xD3C7, + 0xBC95, 0xD3CA, 0xBC96, 0xD3CB, 0xBC97, 0xD3CC, 0xBC98, 0xD3CD, + 0xBC99, 0xD3CE, 0xBC9A, 0xD3CF, 0xBC9B, 0xD3D1, 0xBC9C, 0xD3D2, + 0xBC9D, 0xD3D3, 0xBC9E, 0xD3D4, 0xBC9F, 0xD3D5, 0xBCA0, 0xD3D6, + 0xBCA1, 0xC0E5, 0xBCA2, 0xC0E8, 0xBCA3, 0xC0EC, 0xBCA4, 0xC0F4, + 0xBCA5, 0xC0F5, 0xBCA6, 0xC0F7, 0xBCA7, 0xC0F9, 0xBCA8, 0xC100, + 0xBCA9, 0xC104, 0xBCAA, 0xC108, 0xBCAB, 0xC110, 0xBCAC, 0xC115, + 0xBCAD, 0xC11C, 0xBCAE, 0xC11D, 0xBCAF, 0xC11E, 0xBCB0, 0xC11F, + 0xBCB1, 0xC120, 0xBCB2, 0xC123, 0xBCB3, 0xC124, 0xBCB4, 0xC126, + 0xBCB5, 0xC127, 0xBCB6, 0xC12C, 0xBCB7, 0xC12D, 0xBCB8, 0xC12F, + 0xBCB9, 0xC130, 0xBCBA, 0xC131, 0xBCBB, 0xC136, 0xBCBC, 0xC138, + 0xBCBD, 0xC139, 0xBCBE, 0xC13C, 0xBCBF, 0xC140, 0xBCC0, 0xC148, + 0xBCC1, 0xC149, 0xBCC2, 0xC14B, 0xBCC3, 0xC14C, 0xBCC4, 0xC14D, + 0xBCC5, 0xC154, 0xBCC6, 0xC155, 0xBCC7, 0xC158, 0xBCC8, 0xC15C, + 0xBCC9, 0xC164, 0xBCCA, 0xC165, 0xBCCB, 0xC167, 0xBCCC, 0xC168, + 0xBCCD, 0xC169, 0xBCCE, 0xC170, 0xBCCF, 0xC174, 0xBCD0, 0xC178, + 0xBCD1, 0xC185, 0xBCD2, 0xC18C, 0xBCD3, 0xC18D, 0xBCD4, 0xC18E, + 0xBCD5, 0xC190, 0xBCD6, 0xC194, 0xBCD7, 0xC196, 0xBCD8, 0xC19C, + 0xBCD9, 0xC19D, 0xBCDA, 0xC19F, 0xBCDB, 0xC1A1, 0xBCDC, 0xC1A5, + 0xBCDD, 0xC1A8, 0xBCDE, 0xC1A9, 0xBCDF, 0xC1AC, 0xBCE0, 0xC1B0, + 0xBCE1, 0xC1BD, 0xBCE2, 0xC1C4, 0xBCE3, 0xC1C8, 0xBCE4, 0xC1CC, + 0xBCE5, 0xC1D4, 0xBCE6, 0xC1D7, 0xBCE7, 0xC1D8, 0xBCE8, 0xC1E0, + 0xBCE9, 0xC1E4, 0xBCEA, 0xC1E8, 0xBCEB, 0xC1F0, 0xBCEC, 0xC1F1, + 0xBCED, 0xC1F3, 0xBCEE, 0xC1FC, 0xBCEF, 0xC1FD, 0xBCF0, 0xC200, + 0xBCF1, 0xC204, 0xBCF2, 0xC20C, 0xBCF3, 0xC20D, 0xBCF4, 0xC20F, + 0xBCF5, 0xC211, 0xBCF6, 0xC218, 0xBCF7, 0xC219, 0xBCF8, 0xC21C, + 0xBCF9, 0xC21F, 0xBCFA, 0xC220, 0xBCFB, 0xC228, 0xBCFC, 0xC229, + 0xBCFD, 0xC22B, 0xBCFE, 0xC22D, 0xBD41, 0xD3D7, 0xBD42, 0xD3D9, + 0xBD43, 0xD3DA, 0xBD44, 0xD3DB, 0xBD45, 0xD3DC, 0xBD46, 0xD3DD, + 0xBD47, 0xD3DE, 0xBD48, 0xD3DF, 0xBD49, 0xD3E0, 0xBD4A, 0xD3E2, + 0xBD4B, 0xD3E4, 0xBD4C, 0xD3E5, 0xBD4D, 0xD3E6, 0xBD4E, 0xD3E7, + 0xBD4F, 0xD3E8, 0xBD50, 0xD3E9, 0xBD51, 0xD3EA, 0xBD52, 0xD3EB, + 0xBD53, 0xD3EE, 0xBD54, 0xD3EF, 0xBD55, 0xD3F1, 0xBD56, 0xD3F2, + 0xBD57, 0xD3F3, 0xBD58, 0xD3F5, 0xBD59, 0xD3F6, 0xBD5A, 0xD3F7, + 0xBD61, 0xD3F8, 0xBD62, 0xD3F9, 0xBD63, 0xD3FA, 0xBD64, 0xD3FB, + 0xBD65, 0xD3FE, 0xBD66, 0xD400, 0xBD67, 0xD402, 0xBD68, 0xD403, + 0xBD69, 0xD404, 0xBD6A, 0xD405, 0xBD6B, 0xD406, 0xBD6C, 0xD407, + 0xBD6D, 0xD409, 0xBD6E, 0xD40A, 0xBD6F, 0xD40B, 0xBD70, 0xD40C, + 0xBD71, 0xD40D, 0xBD72, 0xD40E, 0xBD73, 0xD40F, 0xBD74, 0xD410, + 0xBD75, 0xD411, 0xBD76, 0xD412, 0xBD77, 0xD413, 0xBD78, 0xD414, + 0xBD79, 0xD415, 0xBD7A, 0xD416, 0xBD81, 0xD417, 0xBD82, 0xD418, + 0xBD83, 0xD419, 0xBD84, 0xD41A, 0xBD85, 0xD41B, 0xBD86, 0xD41C, + 0xBD87, 0xD41E, 0xBD88, 0xD41F, 0xBD89, 0xD420, 0xBD8A, 0xD421, + 0xBD8B, 0xD422, 0xBD8C, 0xD423, 0xBD8D, 0xD424, 0xBD8E, 0xD425, + 0xBD8F, 0xD426, 0xBD90, 0xD427, 0xBD91, 0xD428, 0xBD92, 0xD429, + 0xBD93, 0xD42A, 0xBD94, 0xD42B, 0xBD95, 0xD42C, 0xBD96, 0xD42D, + 0xBD97, 0xD42E, 0xBD98, 0xD42F, 0xBD99, 0xD430, 0xBD9A, 0xD431, + 0xBD9B, 0xD432, 0xBD9C, 0xD433, 0xBD9D, 0xD434, 0xBD9E, 0xD435, + 0xBD9F, 0xD436, 0xBDA0, 0xD437, 0xBDA1, 0xC22F, 0xBDA2, 0xC231, + 0xBDA3, 0xC232, 0xBDA4, 0xC234, 0xBDA5, 0xC248, 0xBDA6, 0xC250, + 0xBDA7, 0xC251, 0xBDA8, 0xC254, 0xBDA9, 0xC258, 0xBDAA, 0xC260, + 0xBDAB, 0xC265, 0xBDAC, 0xC26C, 0xBDAD, 0xC26D, 0xBDAE, 0xC270, + 0xBDAF, 0xC274, 0xBDB0, 0xC27C, 0xBDB1, 0xC27D, 0xBDB2, 0xC27F, + 0xBDB3, 0xC281, 0xBDB4, 0xC288, 0xBDB5, 0xC289, 0xBDB6, 0xC290, + 0xBDB7, 0xC298, 0xBDB8, 0xC29B, 0xBDB9, 0xC29D, 0xBDBA, 0xC2A4, + 0xBDBB, 0xC2A5, 0xBDBC, 0xC2A8, 0xBDBD, 0xC2AC, 0xBDBE, 0xC2AD, + 0xBDBF, 0xC2B4, 0xBDC0, 0xC2B5, 0xBDC1, 0xC2B7, 0xBDC2, 0xC2B9, + 0xBDC3, 0xC2DC, 0xBDC4, 0xC2DD, 0xBDC5, 0xC2E0, 0xBDC6, 0xC2E3, + 0xBDC7, 0xC2E4, 0xBDC8, 0xC2EB, 0xBDC9, 0xC2EC, 0xBDCA, 0xC2ED, + 0xBDCB, 0xC2EF, 0xBDCC, 0xC2F1, 0xBDCD, 0xC2F6, 0xBDCE, 0xC2F8, + 0xBDCF, 0xC2F9, 0xBDD0, 0xC2FB, 0xBDD1, 0xC2FC, 0xBDD2, 0xC300, + 0xBDD3, 0xC308, 0xBDD4, 0xC309, 0xBDD5, 0xC30C, 0xBDD6, 0xC30D, + 0xBDD7, 0xC313, 0xBDD8, 0xC314, 0xBDD9, 0xC315, 0xBDDA, 0xC318, + 0xBDDB, 0xC31C, 0xBDDC, 0xC324, 0xBDDD, 0xC325, 0xBDDE, 0xC328, + 0xBDDF, 0xC329, 0xBDE0, 0xC345, 0xBDE1, 0xC368, 0xBDE2, 0xC369, + 0xBDE3, 0xC36C, 0xBDE4, 0xC370, 0xBDE5, 0xC372, 0xBDE6, 0xC378, + 0xBDE7, 0xC379, 0xBDE8, 0xC37C, 0xBDE9, 0xC37D, 0xBDEA, 0xC384, + 0xBDEB, 0xC388, 0xBDEC, 0xC38C, 0xBDED, 0xC3C0, 0xBDEE, 0xC3D8, + 0xBDEF, 0xC3D9, 0xBDF0, 0xC3DC, 0xBDF1, 0xC3DF, 0xBDF2, 0xC3E0, + 0xBDF3, 0xC3E2, 0xBDF4, 0xC3E8, 0xBDF5, 0xC3E9, 0xBDF6, 0xC3ED, + 0xBDF7, 0xC3F4, 0xBDF8, 0xC3F5, 0xBDF9, 0xC3F8, 0xBDFA, 0xC408, + 0xBDFB, 0xC410, 0xBDFC, 0xC424, 0xBDFD, 0xC42C, 0xBDFE, 0xC430, + 0xBE41, 0xD438, 0xBE42, 0xD439, 0xBE43, 0xD43A, 0xBE44, 0xD43B, + 0xBE45, 0xD43C, 0xBE46, 0xD43D, 0xBE47, 0xD43E, 0xBE48, 0xD43F, + 0xBE49, 0xD441, 0xBE4A, 0xD442, 0xBE4B, 0xD443, 0xBE4C, 0xD445, + 0xBE4D, 0xD446, 0xBE4E, 0xD447, 0xBE4F, 0xD448, 0xBE50, 0xD449, + 0xBE51, 0xD44A, 0xBE52, 0xD44B, 0xBE53, 0xD44C, 0xBE54, 0xD44D, + 0xBE55, 0xD44E, 0xBE56, 0xD44F, 0xBE57, 0xD450, 0xBE58, 0xD451, + 0xBE59, 0xD452, 0xBE5A, 0xD453, 0xBE61, 0xD454, 0xBE62, 0xD455, + 0xBE63, 0xD456, 0xBE64, 0xD457, 0xBE65, 0xD458, 0xBE66, 0xD459, + 0xBE67, 0xD45A, 0xBE68, 0xD45B, 0xBE69, 0xD45D, 0xBE6A, 0xD45E, + 0xBE6B, 0xD45F, 0xBE6C, 0xD461, 0xBE6D, 0xD462, 0xBE6E, 0xD463, + 0xBE6F, 0xD465, 0xBE70, 0xD466, 0xBE71, 0xD467, 0xBE72, 0xD468, + 0xBE73, 0xD469, 0xBE74, 0xD46A, 0xBE75, 0xD46B, 0xBE76, 0xD46C, + 0xBE77, 0xD46E, 0xBE78, 0xD470, 0xBE79, 0xD471, 0xBE7A, 0xD472, + 0xBE81, 0xD473, 0xBE82, 0xD474, 0xBE83, 0xD475, 0xBE84, 0xD476, + 0xBE85, 0xD477, 0xBE86, 0xD47A, 0xBE87, 0xD47B, 0xBE88, 0xD47D, + 0xBE89, 0xD47E, 0xBE8A, 0xD481, 0xBE8B, 0xD483, 0xBE8C, 0xD484, + 0xBE8D, 0xD485, 0xBE8E, 0xD486, 0xBE8F, 0xD487, 0xBE90, 0xD48A, + 0xBE91, 0xD48C, 0xBE92, 0xD48E, 0xBE93, 0xD48F, 0xBE94, 0xD490, + 0xBE95, 0xD491, 0xBE96, 0xD492, 0xBE97, 0xD493, 0xBE98, 0xD495, + 0xBE99, 0xD496, 0xBE9A, 0xD497, 0xBE9B, 0xD498, 0xBE9C, 0xD499, + 0xBE9D, 0xD49A, 0xBE9E, 0xD49B, 0xBE9F, 0xD49C, 0xBEA0, 0xD49D, + 0xBEA1, 0xC434, 0xBEA2, 0xC43C, 0xBEA3, 0xC43D, 0xBEA4, 0xC448, + 0xBEA5, 0xC464, 0xBEA6, 0xC465, 0xBEA7, 0xC468, 0xBEA8, 0xC46C, + 0xBEA9, 0xC474, 0xBEAA, 0xC475, 0xBEAB, 0xC479, 0xBEAC, 0xC480, + 0xBEAD, 0xC494, 0xBEAE, 0xC49C, 0xBEAF, 0xC4B8, 0xBEB0, 0xC4BC, + 0xBEB1, 0xC4E9, 0xBEB2, 0xC4F0, 0xBEB3, 0xC4F1, 0xBEB4, 0xC4F4, + 0xBEB5, 0xC4F8, 0xBEB6, 0xC4FA, 0xBEB7, 0xC4FF, 0xBEB8, 0xC500, + 0xBEB9, 0xC501, 0xBEBA, 0xC50C, 0xBEBB, 0xC510, 0xBEBC, 0xC514, + 0xBEBD, 0xC51C, 0xBEBE, 0xC528, 0xBEBF, 0xC529, 0xBEC0, 0xC52C, + 0xBEC1, 0xC530, 0xBEC2, 0xC538, 0xBEC3, 0xC539, 0xBEC4, 0xC53B, + 0xBEC5, 0xC53D, 0xBEC6, 0xC544, 0xBEC7, 0xC545, 0xBEC8, 0xC548, + 0xBEC9, 0xC549, 0xBECA, 0xC54A, 0xBECB, 0xC54C, 0xBECC, 0xC54D, + 0xBECD, 0xC54E, 0xBECE, 0xC553, 0xBECF, 0xC554, 0xBED0, 0xC555, + 0xBED1, 0xC557, 0xBED2, 0xC558, 0xBED3, 0xC559, 0xBED4, 0xC55D, + 0xBED5, 0xC55E, 0xBED6, 0xC560, 0xBED7, 0xC561, 0xBED8, 0xC564, + 0xBED9, 0xC568, 0xBEDA, 0xC570, 0xBEDB, 0xC571, 0xBEDC, 0xC573, + 0xBEDD, 0xC574, 0xBEDE, 0xC575, 0xBEDF, 0xC57C, 0xBEE0, 0xC57D, + 0xBEE1, 0xC580, 0xBEE2, 0xC584, 0xBEE3, 0xC587, 0xBEE4, 0xC58C, + 0xBEE5, 0xC58D, 0xBEE6, 0xC58F, 0xBEE7, 0xC591, 0xBEE8, 0xC595, + 0xBEE9, 0xC597, 0xBEEA, 0xC598, 0xBEEB, 0xC59C, 0xBEEC, 0xC5A0, + 0xBEED, 0xC5A9, 0xBEEE, 0xC5B4, 0xBEEF, 0xC5B5, 0xBEF0, 0xC5B8, + 0xBEF1, 0xC5B9, 0xBEF2, 0xC5BB, 0xBEF3, 0xC5BC, 0xBEF4, 0xC5BD, + 0xBEF5, 0xC5BE, 0xBEF6, 0xC5C4, 0xBEF7, 0xC5C5, 0xBEF8, 0xC5C6, + 0xBEF9, 0xC5C7, 0xBEFA, 0xC5C8, 0xBEFB, 0xC5C9, 0xBEFC, 0xC5CA, + 0xBEFD, 0xC5CC, 0xBEFE, 0xC5CE, 0xBF41, 0xD49E, 0xBF42, 0xD49F, + 0xBF43, 0xD4A0, 0xBF44, 0xD4A1, 0xBF45, 0xD4A2, 0xBF46, 0xD4A3, + 0xBF47, 0xD4A4, 0xBF48, 0xD4A5, 0xBF49, 0xD4A6, 0xBF4A, 0xD4A7, + 0xBF4B, 0xD4A8, 0xBF4C, 0xD4AA, 0xBF4D, 0xD4AB, 0xBF4E, 0xD4AC, + 0xBF4F, 0xD4AD, 0xBF50, 0xD4AE, 0xBF51, 0xD4AF, 0xBF52, 0xD4B0, + 0xBF53, 0xD4B1, 0xBF54, 0xD4B2, 0xBF55, 0xD4B3, 0xBF56, 0xD4B4, + 0xBF57, 0xD4B5, 0xBF58, 0xD4B6, 0xBF59, 0xD4B7, 0xBF5A, 0xD4B8, + 0xBF61, 0xD4B9, 0xBF62, 0xD4BA, 0xBF63, 0xD4BB, 0xBF64, 0xD4BC, + 0xBF65, 0xD4BD, 0xBF66, 0xD4BE, 0xBF67, 0xD4BF, 0xBF68, 0xD4C0, + 0xBF69, 0xD4C1, 0xBF6A, 0xD4C2, 0xBF6B, 0xD4C3, 0xBF6C, 0xD4C4, + 0xBF6D, 0xD4C5, 0xBF6E, 0xD4C6, 0xBF6F, 0xD4C7, 0xBF70, 0xD4C8, + 0xBF71, 0xD4C9, 0xBF72, 0xD4CA, 0xBF73, 0xD4CB, 0xBF74, 0xD4CD, + 0xBF75, 0xD4CE, 0xBF76, 0xD4CF, 0xBF77, 0xD4D1, 0xBF78, 0xD4D2, + 0xBF79, 0xD4D3, 0xBF7A, 0xD4D5, 0xBF81, 0xD4D6, 0xBF82, 0xD4D7, + 0xBF83, 0xD4D8, 0xBF84, 0xD4D9, 0xBF85, 0xD4DA, 0xBF86, 0xD4DB, + 0xBF87, 0xD4DD, 0xBF88, 0xD4DE, 0xBF89, 0xD4E0, 0xBF8A, 0xD4E1, + 0xBF8B, 0xD4E2, 0xBF8C, 0xD4E3, 0xBF8D, 0xD4E4, 0xBF8E, 0xD4E5, + 0xBF8F, 0xD4E6, 0xBF90, 0xD4E7, 0xBF91, 0xD4E9, 0xBF92, 0xD4EA, + 0xBF93, 0xD4EB, 0xBF94, 0xD4ED, 0xBF95, 0xD4EE, 0xBF96, 0xD4EF, + 0xBF97, 0xD4F1, 0xBF98, 0xD4F2, 0xBF99, 0xD4F3, 0xBF9A, 0xD4F4, + 0xBF9B, 0xD4F5, 0xBF9C, 0xD4F6, 0xBF9D, 0xD4F7, 0xBF9E, 0xD4F9, + 0xBF9F, 0xD4FA, 0xBFA0, 0xD4FC, 0xBFA1, 0xC5D0, 0xBFA2, 0xC5D1, + 0xBFA3, 0xC5D4, 0xBFA4, 0xC5D8, 0xBFA5, 0xC5E0, 0xBFA6, 0xC5E1, + 0xBFA7, 0xC5E3, 0xBFA8, 0xC5E5, 0xBFA9, 0xC5EC, 0xBFAA, 0xC5ED, + 0xBFAB, 0xC5EE, 0xBFAC, 0xC5F0, 0xBFAD, 0xC5F4, 0xBFAE, 0xC5F6, + 0xBFAF, 0xC5F7, 0xBFB0, 0xC5FC, 0xBFB1, 0xC5FD, 0xBFB2, 0xC5FE, + 0xBFB3, 0xC5FF, 0xBFB4, 0xC600, 0xBFB5, 0xC601, 0xBFB6, 0xC605, + 0xBFB7, 0xC606, 0xBFB8, 0xC607, 0xBFB9, 0xC608, 0xBFBA, 0xC60C, + 0xBFBB, 0xC610, 0xBFBC, 0xC618, 0xBFBD, 0xC619, 0xBFBE, 0xC61B, + 0xBFBF, 0xC61C, 0xBFC0, 0xC624, 0xBFC1, 0xC625, 0xBFC2, 0xC628, + 0xBFC3, 0xC62C, 0xBFC4, 0xC62D, 0xBFC5, 0xC62E, 0xBFC6, 0xC630, + 0xBFC7, 0xC633, 0xBFC8, 0xC634, 0xBFC9, 0xC635, 0xBFCA, 0xC637, + 0xBFCB, 0xC639, 0xBFCC, 0xC63B, 0xBFCD, 0xC640, 0xBFCE, 0xC641, + 0xBFCF, 0xC644, 0xBFD0, 0xC648, 0xBFD1, 0xC650, 0xBFD2, 0xC651, + 0xBFD3, 0xC653, 0xBFD4, 0xC654, 0xBFD5, 0xC655, 0xBFD6, 0xC65C, + 0xBFD7, 0xC65D, 0xBFD8, 0xC660, 0xBFD9, 0xC66C, 0xBFDA, 0xC66F, + 0xBFDB, 0xC671, 0xBFDC, 0xC678, 0xBFDD, 0xC679, 0xBFDE, 0xC67C, + 0xBFDF, 0xC680, 0xBFE0, 0xC688, 0xBFE1, 0xC689, 0xBFE2, 0xC68B, + 0xBFE3, 0xC68D, 0xBFE4, 0xC694, 0xBFE5, 0xC695, 0xBFE6, 0xC698, + 0xBFE7, 0xC69C, 0xBFE8, 0xC6A4, 0xBFE9, 0xC6A5, 0xBFEA, 0xC6A7, + 0xBFEB, 0xC6A9, 0xBFEC, 0xC6B0, 0xBFED, 0xC6B1, 0xBFEE, 0xC6B4, + 0xBFEF, 0xC6B8, 0xBFF0, 0xC6B9, 0xBFF1, 0xC6BA, 0xBFF2, 0xC6C0, + 0xBFF3, 0xC6C1, 0xBFF4, 0xC6C3, 0xBFF5, 0xC6C5, 0xBFF6, 0xC6CC, + 0xBFF7, 0xC6CD, 0xBFF8, 0xC6D0, 0xBFF9, 0xC6D4, 0xBFFA, 0xC6DC, + 0xBFFB, 0xC6DD, 0xBFFC, 0xC6E0, 0xBFFD, 0xC6E1, 0xBFFE, 0xC6E8, + 0xC041, 0xD4FE, 0xC042, 0xD4FF, 0xC043, 0xD500, 0xC044, 0xD501, + 0xC045, 0xD502, 0xC046, 0xD503, 0xC047, 0xD505, 0xC048, 0xD506, + 0xC049, 0xD507, 0xC04A, 0xD509, 0xC04B, 0xD50A, 0xC04C, 0xD50B, + 0xC04D, 0xD50D, 0xC04E, 0xD50E, 0xC04F, 0xD50F, 0xC050, 0xD510, + 0xC051, 0xD511, 0xC052, 0xD512, 0xC053, 0xD513, 0xC054, 0xD516, + 0xC055, 0xD518, 0xC056, 0xD519, 0xC057, 0xD51A, 0xC058, 0xD51B, + 0xC059, 0xD51C, 0xC05A, 0xD51D, 0xC061, 0xD51E, 0xC062, 0xD51F, + 0xC063, 0xD520, 0xC064, 0xD521, 0xC065, 0xD522, 0xC066, 0xD523, + 0xC067, 0xD524, 0xC068, 0xD525, 0xC069, 0xD526, 0xC06A, 0xD527, + 0xC06B, 0xD528, 0xC06C, 0xD529, 0xC06D, 0xD52A, 0xC06E, 0xD52B, + 0xC06F, 0xD52C, 0xC070, 0xD52D, 0xC071, 0xD52E, 0xC072, 0xD52F, + 0xC073, 0xD530, 0xC074, 0xD531, 0xC075, 0xD532, 0xC076, 0xD533, + 0xC077, 0xD534, 0xC078, 0xD535, 0xC079, 0xD536, 0xC07A, 0xD537, + 0xC081, 0xD538, 0xC082, 0xD539, 0xC083, 0xD53A, 0xC084, 0xD53B, + 0xC085, 0xD53E, 0xC086, 0xD53F, 0xC087, 0xD541, 0xC088, 0xD542, + 0xC089, 0xD543, 0xC08A, 0xD545, 0xC08B, 0xD546, 0xC08C, 0xD547, + 0xC08D, 0xD548, 0xC08E, 0xD549, 0xC08F, 0xD54A, 0xC090, 0xD54B, + 0xC091, 0xD54E, 0xC092, 0xD550, 0xC093, 0xD552, 0xC094, 0xD553, + 0xC095, 0xD554, 0xC096, 0xD555, 0xC097, 0xD556, 0xC098, 0xD557, + 0xC099, 0xD55A, 0xC09A, 0xD55B, 0xC09B, 0xD55D, 0xC09C, 0xD55E, + 0xC09D, 0xD55F, 0xC09E, 0xD561, 0xC09F, 0xD562, 0xC0A0, 0xD563, + 0xC0A1, 0xC6E9, 0xC0A2, 0xC6EC, 0xC0A3, 0xC6F0, 0xC0A4, 0xC6F8, + 0xC0A5, 0xC6F9, 0xC0A6, 0xC6FD, 0xC0A7, 0xC704, 0xC0A8, 0xC705, + 0xC0A9, 0xC708, 0xC0AA, 0xC70C, 0xC0AB, 0xC714, 0xC0AC, 0xC715, + 0xC0AD, 0xC717, 0xC0AE, 0xC719, 0xC0AF, 0xC720, 0xC0B0, 0xC721, + 0xC0B1, 0xC724, 0xC0B2, 0xC728, 0xC0B3, 0xC730, 0xC0B4, 0xC731, + 0xC0B5, 0xC733, 0xC0B6, 0xC735, 0xC0B7, 0xC737, 0xC0B8, 0xC73C, + 0xC0B9, 0xC73D, 0xC0BA, 0xC740, 0xC0BB, 0xC744, 0xC0BC, 0xC74A, + 0xC0BD, 0xC74C, 0xC0BE, 0xC74D, 0xC0BF, 0xC74F, 0xC0C0, 0xC751, + 0xC0C1, 0xC752, 0xC0C2, 0xC753, 0xC0C3, 0xC754, 0xC0C4, 0xC755, + 0xC0C5, 0xC756, 0xC0C6, 0xC757, 0xC0C7, 0xC758, 0xC0C8, 0xC75C, + 0xC0C9, 0xC760, 0xC0CA, 0xC768, 0xC0CB, 0xC76B, 0xC0CC, 0xC774, + 0xC0CD, 0xC775, 0xC0CE, 0xC778, 0xC0CF, 0xC77C, 0xC0D0, 0xC77D, + 0xC0D1, 0xC77E, 0xC0D2, 0xC783, 0xC0D3, 0xC784, 0xC0D4, 0xC785, + 0xC0D5, 0xC787, 0xC0D6, 0xC788, 0xC0D7, 0xC789, 0xC0D8, 0xC78A, + 0xC0D9, 0xC78E, 0xC0DA, 0xC790, 0xC0DB, 0xC791, 0xC0DC, 0xC794, + 0xC0DD, 0xC796, 0xC0DE, 0xC797, 0xC0DF, 0xC798, 0xC0E0, 0xC79A, + 0xC0E1, 0xC7A0, 0xC0E2, 0xC7A1, 0xC0E3, 0xC7A3, 0xC0E4, 0xC7A4, + 0xC0E5, 0xC7A5, 0xC0E6, 0xC7A6, 0xC0E7, 0xC7AC, 0xC0E8, 0xC7AD, + 0xC0E9, 0xC7B0, 0xC0EA, 0xC7B4, 0xC0EB, 0xC7BC, 0xC0EC, 0xC7BD, + 0xC0ED, 0xC7BF, 0xC0EE, 0xC7C0, 0xC0EF, 0xC7C1, 0xC0F0, 0xC7C8, + 0xC0F1, 0xC7C9, 0xC0F2, 0xC7CC, 0xC0F3, 0xC7CE, 0xC0F4, 0xC7D0, + 0xC0F5, 0xC7D8, 0xC0F6, 0xC7DD, 0xC0F7, 0xC7E4, 0xC0F8, 0xC7E8, + 0xC0F9, 0xC7EC, 0xC0FA, 0xC800, 0xC0FB, 0xC801, 0xC0FC, 0xC804, + 0xC0FD, 0xC808, 0xC0FE, 0xC80A, 0xC141, 0xD564, 0xC142, 0xD566, + 0xC143, 0xD567, 0xC144, 0xD56A, 0xC145, 0xD56C, 0xC146, 0xD56E, + 0xC147, 0xD56F, 0xC148, 0xD570, 0xC149, 0xD571, 0xC14A, 0xD572, + 0xC14B, 0xD573, 0xC14C, 0xD576, 0xC14D, 0xD577, 0xC14E, 0xD579, + 0xC14F, 0xD57A, 0xC150, 0xD57B, 0xC151, 0xD57D, 0xC152, 0xD57E, + 0xC153, 0xD57F, 0xC154, 0xD580, 0xC155, 0xD581, 0xC156, 0xD582, + 0xC157, 0xD583, 0xC158, 0xD586, 0xC159, 0xD58A, 0xC15A, 0xD58B, + 0xC161, 0xD58C, 0xC162, 0xD58D, 0xC163, 0xD58E, 0xC164, 0xD58F, + 0xC165, 0xD591, 0xC166, 0xD592, 0xC167, 0xD593, 0xC168, 0xD594, + 0xC169, 0xD595, 0xC16A, 0xD596, 0xC16B, 0xD597, 0xC16C, 0xD598, + 0xC16D, 0xD599, 0xC16E, 0xD59A, 0xC16F, 0xD59B, 0xC170, 0xD59C, + 0xC171, 0xD59D, 0xC172, 0xD59E, 0xC173, 0xD59F, 0xC174, 0xD5A0, + 0xC175, 0xD5A1, 0xC176, 0xD5A2, 0xC177, 0xD5A3, 0xC178, 0xD5A4, + 0xC179, 0xD5A6, 0xC17A, 0xD5A7, 0xC181, 0xD5A8, 0xC182, 0xD5A9, + 0xC183, 0xD5AA, 0xC184, 0xD5AB, 0xC185, 0xD5AC, 0xC186, 0xD5AD, + 0xC187, 0xD5AE, 0xC188, 0xD5AF, 0xC189, 0xD5B0, 0xC18A, 0xD5B1, + 0xC18B, 0xD5B2, 0xC18C, 0xD5B3, 0xC18D, 0xD5B4, 0xC18E, 0xD5B5, + 0xC18F, 0xD5B6, 0xC190, 0xD5B7, 0xC191, 0xD5B8, 0xC192, 0xD5B9, + 0xC193, 0xD5BA, 0xC194, 0xD5BB, 0xC195, 0xD5BC, 0xC196, 0xD5BD, + 0xC197, 0xD5BE, 0xC198, 0xD5BF, 0xC199, 0xD5C0, 0xC19A, 0xD5C1, + 0xC19B, 0xD5C2, 0xC19C, 0xD5C3, 0xC19D, 0xD5C4, 0xC19E, 0xD5C5, + 0xC19F, 0xD5C6, 0xC1A0, 0xD5C7, 0xC1A1, 0xC810, 0xC1A2, 0xC811, + 0xC1A3, 0xC813, 0xC1A4, 0xC815, 0xC1A5, 0xC816, 0xC1A6, 0xC81C, + 0xC1A7, 0xC81D, 0xC1A8, 0xC820, 0xC1A9, 0xC824, 0xC1AA, 0xC82C, + 0xC1AB, 0xC82D, 0xC1AC, 0xC82F, 0xC1AD, 0xC831, 0xC1AE, 0xC838, + 0xC1AF, 0xC83C, 0xC1B0, 0xC840, 0xC1B1, 0xC848, 0xC1B2, 0xC849, + 0xC1B3, 0xC84C, 0xC1B4, 0xC84D, 0xC1B5, 0xC854, 0xC1B6, 0xC870, + 0xC1B7, 0xC871, 0xC1B8, 0xC874, 0xC1B9, 0xC878, 0xC1BA, 0xC87A, + 0xC1BB, 0xC880, 0xC1BC, 0xC881, 0xC1BD, 0xC883, 0xC1BE, 0xC885, + 0xC1BF, 0xC886, 0xC1C0, 0xC887, 0xC1C1, 0xC88B, 0xC1C2, 0xC88C, + 0xC1C3, 0xC88D, 0xC1C4, 0xC894, 0xC1C5, 0xC89D, 0xC1C6, 0xC89F, + 0xC1C7, 0xC8A1, 0xC1C8, 0xC8A8, 0xC1C9, 0xC8BC, 0xC1CA, 0xC8BD, + 0xC1CB, 0xC8C4, 0xC1CC, 0xC8C8, 0xC1CD, 0xC8CC, 0xC1CE, 0xC8D4, + 0xC1CF, 0xC8D5, 0xC1D0, 0xC8D7, 0xC1D1, 0xC8D9, 0xC1D2, 0xC8E0, + 0xC1D3, 0xC8E1, 0xC1D4, 0xC8E4, 0xC1D5, 0xC8F5, 0xC1D6, 0xC8FC, + 0xC1D7, 0xC8FD, 0xC1D8, 0xC900, 0xC1D9, 0xC904, 0xC1DA, 0xC905, + 0xC1DB, 0xC906, 0xC1DC, 0xC90C, 0xC1DD, 0xC90D, 0xC1DE, 0xC90F, + 0xC1DF, 0xC911, 0xC1E0, 0xC918, 0xC1E1, 0xC92C, 0xC1E2, 0xC934, + 0xC1E3, 0xC950, 0xC1E4, 0xC951, 0xC1E5, 0xC954, 0xC1E6, 0xC958, + 0xC1E7, 0xC960, 0xC1E8, 0xC961, 0xC1E9, 0xC963, 0xC1EA, 0xC96C, + 0xC1EB, 0xC970, 0xC1EC, 0xC974, 0xC1ED, 0xC97C, 0xC1EE, 0xC988, + 0xC1EF, 0xC989, 0xC1F0, 0xC98C, 0xC1F1, 0xC990, 0xC1F2, 0xC998, + 0xC1F3, 0xC999, 0xC1F4, 0xC99B, 0xC1F5, 0xC99D, 0xC1F6, 0xC9C0, + 0xC1F7, 0xC9C1, 0xC1F8, 0xC9C4, 0xC1F9, 0xC9C7, 0xC1FA, 0xC9C8, + 0xC1FB, 0xC9CA, 0xC1FC, 0xC9D0, 0xC1FD, 0xC9D1, 0xC1FE, 0xC9D3, + 0xC241, 0xD5CA, 0xC242, 0xD5CB, 0xC243, 0xD5CD, 0xC244, 0xD5CE, + 0xC245, 0xD5CF, 0xC246, 0xD5D1, 0xC247, 0xD5D3, 0xC248, 0xD5D4, + 0xC249, 0xD5D5, 0xC24A, 0xD5D6, 0xC24B, 0xD5D7, 0xC24C, 0xD5DA, + 0xC24D, 0xD5DC, 0xC24E, 0xD5DE, 0xC24F, 0xD5DF, 0xC250, 0xD5E0, + 0xC251, 0xD5E1, 0xC252, 0xD5E2, 0xC253, 0xD5E3, 0xC254, 0xD5E6, + 0xC255, 0xD5E7, 0xC256, 0xD5E9, 0xC257, 0xD5EA, 0xC258, 0xD5EB, + 0xC259, 0xD5ED, 0xC25A, 0xD5EE, 0xC261, 0xD5EF, 0xC262, 0xD5F0, + 0xC263, 0xD5F1, 0xC264, 0xD5F2, 0xC265, 0xD5F3, 0xC266, 0xD5F6, + 0xC267, 0xD5F8, 0xC268, 0xD5FA, 0xC269, 0xD5FB, 0xC26A, 0xD5FC, + 0xC26B, 0xD5FD, 0xC26C, 0xD5FE, 0xC26D, 0xD5FF, 0xC26E, 0xD602, + 0xC26F, 0xD603, 0xC270, 0xD605, 0xC271, 0xD606, 0xC272, 0xD607, + 0xC273, 0xD609, 0xC274, 0xD60A, 0xC275, 0xD60B, 0xC276, 0xD60C, + 0xC277, 0xD60D, 0xC278, 0xD60E, 0xC279, 0xD60F, 0xC27A, 0xD612, + 0xC281, 0xD616, 0xC282, 0xD617, 0xC283, 0xD618, 0xC284, 0xD619, + 0xC285, 0xD61A, 0xC286, 0xD61B, 0xC287, 0xD61D, 0xC288, 0xD61E, + 0xC289, 0xD61F, 0xC28A, 0xD621, 0xC28B, 0xD622, 0xC28C, 0xD623, + 0xC28D, 0xD625, 0xC28E, 0xD626, 0xC28F, 0xD627, 0xC290, 0xD628, + 0xC291, 0xD629, 0xC292, 0xD62A, 0xC293, 0xD62B, 0xC294, 0xD62C, + 0xC295, 0xD62E, 0xC296, 0xD62F, 0xC297, 0xD630, 0xC298, 0xD631, + 0xC299, 0xD632, 0xC29A, 0xD633, 0xC29B, 0xD634, 0xC29C, 0xD635, + 0xC29D, 0xD636, 0xC29E, 0xD637, 0xC29F, 0xD63A, 0xC2A0, 0xD63B, + 0xC2A1, 0xC9D5, 0xC2A2, 0xC9D6, 0xC2A3, 0xC9D9, 0xC2A4, 0xC9DA, + 0xC2A5, 0xC9DC, 0xC2A6, 0xC9DD, 0xC2A7, 0xC9E0, 0xC2A8, 0xC9E2, + 0xC2A9, 0xC9E4, 0xC2AA, 0xC9E7, 0xC2AB, 0xC9EC, 0xC2AC, 0xC9ED, + 0xC2AD, 0xC9EF, 0xC2AE, 0xC9F0, 0xC2AF, 0xC9F1, 0xC2B0, 0xC9F8, + 0xC2B1, 0xC9F9, 0xC2B2, 0xC9FC, 0xC2B3, 0xCA00, 0xC2B4, 0xCA08, + 0xC2B5, 0xCA09, 0xC2B6, 0xCA0B, 0xC2B7, 0xCA0C, 0xC2B8, 0xCA0D, + 0xC2B9, 0xCA14, 0xC2BA, 0xCA18, 0xC2BB, 0xCA29, 0xC2BC, 0xCA4C, + 0xC2BD, 0xCA4D, 0xC2BE, 0xCA50, 0xC2BF, 0xCA54, 0xC2C0, 0xCA5C, + 0xC2C1, 0xCA5D, 0xC2C2, 0xCA5F, 0xC2C3, 0xCA60, 0xC2C4, 0xCA61, + 0xC2C5, 0xCA68, 0xC2C6, 0xCA7D, 0xC2C7, 0xCA84, 0xC2C8, 0xCA98, + 0xC2C9, 0xCABC, 0xC2CA, 0xCABD, 0xC2CB, 0xCAC0, 0xC2CC, 0xCAC4, + 0xC2CD, 0xCACC, 0xC2CE, 0xCACD, 0xC2CF, 0xCACF, 0xC2D0, 0xCAD1, + 0xC2D1, 0xCAD3, 0xC2D2, 0xCAD8, 0xC2D3, 0xCAD9, 0xC2D4, 0xCAE0, + 0xC2D5, 0xCAEC, 0xC2D6, 0xCAF4, 0xC2D7, 0xCB08, 0xC2D8, 0xCB10, + 0xC2D9, 0xCB14, 0xC2DA, 0xCB18, 0xC2DB, 0xCB20, 0xC2DC, 0xCB21, + 0xC2DD, 0xCB41, 0xC2DE, 0xCB48, 0xC2DF, 0xCB49, 0xC2E0, 0xCB4C, + 0xC2E1, 0xCB50, 0xC2E2, 0xCB58, 0xC2E3, 0xCB59, 0xC2E4, 0xCB5D, + 0xC2E5, 0xCB64, 0xC2E6, 0xCB78, 0xC2E7, 0xCB79, 0xC2E8, 0xCB9C, + 0xC2E9, 0xCBB8, 0xC2EA, 0xCBD4, 0xC2EB, 0xCBE4, 0xC2EC, 0xCBE7, + 0xC2ED, 0xCBE9, 0xC2EE, 0xCC0C, 0xC2EF, 0xCC0D, 0xC2F0, 0xCC10, + 0xC2F1, 0xCC14, 0xC2F2, 0xCC1C, 0xC2F3, 0xCC1D, 0xC2F4, 0xCC21, + 0xC2F5, 0xCC22, 0xC2F6, 0xCC27, 0xC2F7, 0xCC28, 0xC2F8, 0xCC29, + 0xC2F9, 0xCC2C, 0xC2FA, 0xCC2E, 0xC2FB, 0xCC30, 0xC2FC, 0xCC38, + 0xC2FD, 0xCC39, 0xC2FE, 0xCC3B, 0xC341, 0xD63D, 0xC342, 0xD63E, + 0xC343, 0xD63F, 0xC344, 0xD641, 0xC345, 0xD642, 0xC346, 0xD643, + 0xC347, 0xD644, 0xC348, 0xD646, 0xC349, 0xD647, 0xC34A, 0xD64A, + 0xC34B, 0xD64C, 0xC34C, 0xD64E, 0xC34D, 0xD64F, 0xC34E, 0xD650, + 0xC34F, 0xD652, 0xC350, 0xD653, 0xC351, 0xD656, 0xC352, 0xD657, + 0xC353, 0xD659, 0xC354, 0xD65A, 0xC355, 0xD65B, 0xC356, 0xD65D, + 0xC357, 0xD65E, 0xC358, 0xD65F, 0xC359, 0xD660, 0xC35A, 0xD661, + 0xC361, 0xD662, 0xC362, 0xD663, 0xC363, 0xD664, 0xC364, 0xD665, + 0xC365, 0xD666, 0xC366, 0xD668, 0xC367, 0xD66A, 0xC368, 0xD66B, + 0xC369, 0xD66C, 0xC36A, 0xD66D, 0xC36B, 0xD66E, 0xC36C, 0xD66F, + 0xC36D, 0xD672, 0xC36E, 0xD673, 0xC36F, 0xD675, 0xC370, 0xD676, + 0xC371, 0xD677, 0xC372, 0xD678, 0xC373, 0xD679, 0xC374, 0xD67A, + 0xC375, 0xD67B, 0xC376, 0xD67C, 0xC377, 0xD67D, 0xC378, 0xD67E, + 0xC379, 0xD67F, 0xC37A, 0xD680, 0xC381, 0xD681, 0xC382, 0xD682, + 0xC383, 0xD684, 0xC384, 0xD686, 0xC385, 0xD687, 0xC386, 0xD688, + 0xC387, 0xD689, 0xC388, 0xD68A, 0xC389, 0xD68B, 0xC38A, 0xD68E, + 0xC38B, 0xD68F, 0xC38C, 0xD691, 0xC38D, 0xD692, 0xC38E, 0xD693, + 0xC38F, 0xD695, 0xC390, 0xD696, 0xC391, 0xD697, 0xC392, 0xD698, + 0xC393, 0xD699, 0xC394, 0xD69A, 0xC395, 0xD69B, 0xC396, 0xD69C, + 0xC397, 0xD69E, 0xC398, 0xD6A0, 0xC399, 0xD6A2, 0xC39A, 0xD6A3, + 0xC39B, 0xD6A4, 0xC39C, 0xD6A5, 0xC39D, 0xD6A6, 0xC39E, 0xD6A7, + 0xC39F, 0xD6A9, 0xC3A0, 0xD6AA, 0xC3A1, 0xCC3C, 0xC3A2, 0xCC3D, + 0xC3A3, 0xCC3E, 0xC3A4, 0xCC44, 0xC3A5, 0xCC45, 0xC3A6, 0xCC48, + 0xC3A7, 0xCC4C, 0xC3A8, 0xCC54, 0xC3A9, 0xCC55, 0xC3AA, 0xCC57, + 0xC3AB, 0xCC58, 0xC3AC, 0xCC59, 0xC3AD, 0xCC60, 0xC3AE, 0xCC64, + 0xC3AF, 0xCC66, 0xC3B0, 0xCC68, 0xC3B1, 0xCC70, 0xC3B2, 0xCC75, + 0xC3B3, 0xCC98, 0xC3B4, 0xCC99, 0xC3B5, 0xCC9C, 0xC3B6, 0xCCA0, + 0xC3B7, 0xCCA8, 0xC3B8, 0xCCA9, 0xC3B9, 0xCCAB, 0xC3BA, 0xCCAC, + 0xC3BB, 0xCCAD, 0xC3BC, 0xCCB4, 0xC3BD, 0xCCB5, 0xC3BE, 0xCCB8, + 0xC3BF, 0xCCBC, 0xC3C0, 0xCCC4, 0xC3C1, 0xCCC5, 0xC3C2, 0xCCC7, + 0xC3C3, 0xCCC9, 0xC3C4, 0xCCD0, 0xC3C5, 0xCCD4, 0xC3C6, 0xCCE4, + 0xC3C7, 0xCCEC, 0xC3C8, 0xCCF0, 0xC3C9, 0xCD01, 0xC3CA, 0xCD08, + 0xC3CB, 0xCD09, 0xC3CC, 0xCD0C, 0xC3CD, 0xCD10, 0xC3CE, 0xCD18, + 0xC3CF, 0xCD19, 0xC3D0, 0xCD1B, 0xC3D1, 0xCD1D, 0xC3D2, 0xCD24, + 0xC3D3, 0xCD28, 0xC3D4, 0xCD2C, 0xC3D5, 0xCD39, 0xC3D6, 0xCD5C, + 0xC3D7, 0xCD60, 0xC3D8, 0xCD64, 0xC3D9, 0xCD6C, 0xC3DA, 0xCD6D, + 0xC3DB, 0xCD6F, 0xC3DC, 0xCD71, 0xC3DD, 0xCD78, 0xC3DE, 0xCD88, + 0xC3DF, 0xCD94, 0xC3E0, 0xCD95, 0xC3E1, 0xCD98, 0xC3E2, 0xCD9C, + 0xC3E3, 0xCDA4, 0xC3E4, 0xCDA5, 0xC3E5, 0xCDA7, 0xC3E6, 0xCDA9, + 0xC3E7, 0xCDB0, 0xC3E8, 0xCDC4, 0xC3E9, 0xCDCC, 0xC3EA, 0xCDD0, + 0xC3EB, 0xCDE8, 0xC3EC, 0xCDEC, 0xC3ED, 0xCDF0, 0xC3EE, 0xCDF8, + 0xC3EF, 0xCDF9, 0xC3F0, 0xCDFB, 0xC3F1, 0xCDFD, 0xC3F2, 0xCE04, + 0xC3F3, 0xCE08, 0xC3F4, 0xCE0C, 0xC3F5, 0xCE14, 0xC3F6, 0xCE19, + 0xC3F7, 0xCE20, 0xC3F8, 0xCE21, 0xC3F9, 0xCE24, 0xC3FA, 0xCE28, + 0xC3FB, 0xCE30, 0xC3FC, 0xCE31, 0xC3FD, 0xCE33, 0xC3FE, 0xCE35, + 0xC441, 0xD6AB, 0xC442, 0xD6AD, 0xC443, 0xD6AE, 0xC444, 0xD6AF, + 0xC445, 0xD6B1, 0xC446, 0xD6B2, 0xC447, 0xD6B3, 0xC448, 0xD6B4, + 0xC449, 0xD6B5, 0xC44A, 0xD6B6, 0xC44B, 0xD6B7, 0xC44C, 0xD6B8, + 0xC44D, 0xD6BA, 0xC44E, 0xD6BC, 0xC44F, 0xD6BD, 0xC450, 0xD6BE, + 0xC451, 0xD6BF, 0xC452, 0xD6C0, 0xC453, 0xD6C1, 0xC454, 0xD6C2, + 0xC455, 0xD6C3, 0xC456, 0xD6C6, 0xC457, 0xD6C7, 0xC458, 0xD6C9, + 0xC459, 0xD6CA, 0xC45A, 0xD6CB, 0xC461, 0xD6CD, 0xC462, 0xD6CE, + 0xC463, 0xD6CF, 0xC464, 0xD6D0, 0xC465, 0xD6D2, 0xC466, 0xD6D3, + 0xC467, 0xD6D5, 0xC468, 0xD6D6, 0xC469, 0xD6D8, 0xC46A, 0xD6DA, + 0xC46B, 0xD6DB, 0xC46C, 0xD6DC, 0xC46D, 0xD6DD, 0xC46E, 0xD6DE, + 0xC46F, 0xD6DF, 0xC470, 0xD6E1, 0xC471, 0xD6E2, 0xC472, 0xD6E3, + 0xC473, 0xD6E5, 0xC474, 0xD6E6, 0xC475, 0xD6E7, 0xC476, 0xD6E9, + 0xC477, 0xD6EA, 0xC478, 0xD6EB, 0xC479, 0xD6EC, 0xC47A, 0xD6ED, + 0xC481, 0xD6EE, 0xC482, 0xD6EF, 0xC483, 0xD6F1, 0xC484, 0xD6F2, + 0xC485, 0xD6F3, 0xC486, 0xD6F4, 0xC487, 0xD6F6, 0xC488, 0xD6F7, + 0xC489, 0xD6F8, 0xC48A, 0xD6F9, 0xC48B, 0xD6FA, 0xC48C, 0xD6FB, + 0xC48D, 0xD6FE, 0xC48E, 0xD6FF, 0xC48F, 0xD701, 0xC490, 0xD702, + 0xC491, 0xD703, 0xC492, 0xD705, 0xC493, 0xD706, 0xC494, 0xD707, + 0xC495, 0xD708, 0xC496, 0xD709, 0xC497, 0xD70A, 0xC498, 0xD70B, + 0xC499, 0xD70C, 0xC49A, 0xD70D, 0xC49B, 0xD70E, 0xC49C, 0xD70F, + 0xC49D, 0xD710, 0xC49E, 0xD712, 0xC49F, 0xD713, 0xC4A0, 0xD714, + 0xC4A1, 0xCE58, 0xC4A2, 0xCE59, 0xC4A3, 0xCE5C, 0xC4A4, 0xCE5F, + 0xC4A5, 0xCE60, 0xC4A6, 0xCE61, 0xC4A7, 0xCE68, 0xC4A8, 0xCE69, + 0xC4A9, 0xCE6B, 0xC4AA, 0xCE6D, 0xC4AB, 0xCE74, 0xC4AC, 0xCE75, + 0xC4AD, 0xCE78, 0xC4AE, 0xCE7C, 0xC4AF, 0xCE84, 0xC4B0, 0xCE85, + 0xC4B1, 0xCE87, 0xC4B2, 0xCE89, 0xC4B3, 0xCE90, 0xC4B4, 0xCE91, + 0xC4B5, 0xCE94, 0xC4B6, 0xCE98, 0xC4B7, 0xCEA0, 0xC4B8, 0xCEA1, + 0xC4B9, 0xCEA3, 0xC4BA, 0xCEA4, 0xC4BB, 0xCEA5, 0xC4BC, 0xCEAC, + 0xC4BD, 0xCEAD, 0xC4BE, 0xCEC1, 0xC4BF, 0xCEE4, 0xC4C0, 0xCEE5, + 0xC4C1, 0xCEE8, 0xC4C2, 0xCEEB, 0xC4C3, 0xCEEC, 0xC4C4, 0xCEF4, + 0xC4C5, 0xCEF5, 0xC4C6, 0xCEF7, 0xC4C7, 0xCEF8, 0xC4C8, 0xCEF9, + 0xC4C9, 0xCF00, 0xC4CA, 0xCF01, 0xC4CB, 0xCF04, 0xC4CC, 0xCF08, + 0xC4CD, 0xCF10, 0xC4CE, 0xCF11, 0xC4CF, 0xCF13, 0xC4D0, 0xCF15, + 0xC4D1, 0xCF1C, 0xC4D2, 0xCF20, 0xC4D3, 0xCF24, 0xC4D4, 0xCF2C, + 0xC4D5, 0xCF2D, 0xC4D6, 0xCF2F, 0xC4D7, 0xCF30, 0xC4D8, 0xCF31, + 0xC4D9, 0xCF38, 0xC4DA, 0xCF54, 0xC4DB, 0xCF55, 0xC4DC, 0xCF58, + 0xC4DD, 0xCF5C, 0xC4DE, 0xCF64, 0xC4DF, 0xCF65, 0xC4E0, 0xCF67, + 0xC4E1, 0xCF69, 0xC4E2, 0xCF70, 0xC4E3, 0xCF71, 0xC4E4, 0xCF74, + 0xC4E5, 0xCF78, 0xC4E6, 0xCF80, 0xC4E7, 0xCF85, 0xC4E8, 0xCF8C, + 0xC4E9, 0xCFA1, 0xC4EA, 0xCFA8, 0xC4EB, 0xCFB0, 0xC4EC, 0xCFC4, + 0xC4ED, 0xCFE0, 0xC4EE, 0xCFE1, 0xC4EF, 0xCFE4, 0xC4F0, 0xCFE8, + 0xC4F1, 0xCFF0, 0xC4F2, 0xCFF1, 0xC4F3, 0xCFF3, 0xC4F4, 0xCFF5, + 0xC4F5, 0xCFFC, 0xC4F6, 0xD000, 0xC4F7, 0xD004, 0xC4F8, 0xD011, + 0xC4F9, 0xD018, 0xC4FA, 0xD02D, 0xC4FB, 0xD034, 0xC4FC, 0xD035, + 0xC4FD, 0xD038, 0xC4FE, 0xD03C, 0xC541, 0xD715, 0xC542, 0xD716, + 0xC543, 0xD717, 0xC544, 0xD71A, 0xC545, 0xD71B, 0xC546, 0xD71D, + 0xC547, 0xD71E, 0xC548, 0xD71F, 0xC549, 0xD721, 0xC54A, 0xD722, + 0xC54B, 0xD723, 0xC54C, 0xD724, 0xC54D, 0xD725, 0xC54E, 0xD726, + 0xC54F, 0xD727, 0xC550, 0xD72A, 0xC551, 0xD72C, 0xC552, 0xD72E, + 0xC553, 0xD72F, 0xC554, 0xD730, 0xC555, 0xD731, 0xC556, 0xD732, + 0xC557, 0xD733, 0xC558, 0xD736, 0xC559, 0xD737, 0xC55A, 0xD739, + 0xC561, 0xD73A, 0xC562, 0xD73B, 0xC563, 0xD73D, 0xC564, 0xD73E, + 0xC565, 0xD73F, 0xC566, 0xD740, 0xC567, 0xD741, 0xC568, 0xD742, + 0xC569, 0xD743, 0xC56A, 0xD745, 0xC56B, 0xD746, 0xC56C, 0xD748, + 0xC56D, 0xD74A, 0xC56E, 0xD74B, 0xC56F, 0xD74C, 0xC570, 0xD74D, + 0xC571, 0xD74E, 0xC572, 0xD74F, 0xC573, 0xD752, 0xC574, 0xD753, + 0xC575, 0xD755, 0xC576, 0xD75A, 0xC577, 0xD75B, 0xC578, 0xD75C, + 0xC579, 0xD75D, 0xC57A, 0xD75E, 0xC581, 0xD75F, 0xC582, 0xD762, + 0xC583, 0xD764, 0xC584, 0xD766, 0xC585, 0xD767, 0xC586, 0xD768, + 0xC587, 0xD76A, 0xC588, 0xD76B, 0xC589, 0xD76D, 0xC58A, 0xD76E, + 0xC58B, 0xD76F, 0xC58C, 0xD771, 0xC58D, 0xD772, 0xC58E, 0xD773, + 0xC58F, 0xD775, 0xC590, 0xD776, 0xC591, 0xD777, 0xC592, 0xD778, + 0xC593, 0xD779, 0xC594, 0xD77A, 0xC595, 0xD77B, 0xC596, 0xD77E, + 0xC597, 0xD77F, 0xC598, 0xD780, 0xC599, 0xD782, 0xC59A, 0xD783, + 0xC59B, 0xD784, 0xC59C, 0xD785, 0xC59D, 0xD786, 0xC59E, 0xD787, + 0xC59F, 0xD78A, 0xC5A0, 0xD78B, 0xC5A1, 0xD044, 0xC5A2, 0xD045, + 0xC5A3, 0xD047, 0xC5A4, 0xD049, 0xC5A5, 0xD050, 0xC5A6, 0xD054, + 0xC5A7, 0xD058, 0xC5A8, 0xD060, 0xC5A9, 0xD06C, 0xC5AA, 0xD06D, + 0xC5AB, 0xD070, 0xC5AC, 0xD074, 0xC5AD, 0xD07C, 0xC5AE, 0xD07D, + 0xC5AF, 0xD081, 0xC5B0, 0xD0A4, 0xC5B1, 0xD0A5, 0xC5B2, 0xD0A8, + 0xC5B3, 0xD0AC, 0xC5B4, 0xD0B4, 0xC5B5, 0xD0B5, 0xC5B6, 0xD0B7, + 0xC5B7, 0xD0B9, 0xC5B8, 0xD0C0, 0xC5B9, 0xD0C1, 0xC5BA, 0xD0C4, + 0xC5BB, 0xD0C8, 0xC5BC, 0xD0C9, 0xC5BD, 0xD0D0, 0xC5BE, 0xD0D1, + 0xC5BF, 0xD0D3, 0xC5C0, 0xD0D4, 0xC5C1, 0xD0D5, 0xC5C2, 0xD0DC, + 0xC5C3, 0xD0DD, 0xC5C4, 0xD0E0, 0xC5C5, 0xD0E4, 0xC5C6, 0xD0EC, + 0xC5C7, 0xD0ED, 0xC5C8, 0xD0EF, 0xC5C9, 0xD0F0, 0xC5CA, 0xD0F1, + 0xC5CB, 0xD0F8, 0xC5CC, 0xD10D, 0xC5CD, 0xD130, 0xC5CE, 0xD131, + 0xC5CF, 0xD134, 0xC5D0, 0xD138, 0xC5D1, 0xD13A, 0xC5D2, 0xD140, + 0xC5D3, 0xD141, 0xC5D4, 0xD143, 0xC5D5, 0xD144, 0xC5D6, 0xD145, + 0xC5D7, 0xD14C, 0xC5D8, 0xD14D, 0xC5D9, 0xD150, 0xC5DA, 0xD154, + 0xC5DB, 0xD15C, 0xC5DC, 0xD15D, 0xC5DD, 0xD15F, 0xC5DE, 0xD161, + 0xC5DF, 0xD168, 0xC5E0, 0xD16C, 0xC5E1, 0xD17C, 0xC5E2, 0xD184, + 0xC5E3, 0xD188, 0xC5E4, 0xD1A0, 0xC5E5, 0xD1A1, 0xC5E6, 0xD1A4, + 0xC5E7, 0xD1A8, 0xC5E8, 0xD1B0, 0xC5E9, 0xD1B1, 0xC5EA, 0xD1B3, + 0xC5EB, 0xD1B5, 0xC5EC, 0xD1BA, 0xC5ED, 0xD1BC, 0xC5EE, 0xD1C0, + 0xC5EF, 0xD1D8, 0xC5F0, 0xD1F4, 0xC5F1, 0xD1F8, 0xC5F2, 0xD207, + 0xC5F3, 0xD209, 0xC5F4, 0xD210, 0xC5F5, 0xD22C, 0xC5F6, 0xD22D, + 0xC5F7, 0xD230, 0xC5F8, 0xD234, 0xC5F9, 0xD23C, 0xC5FA, 0xD23D, + 0xC5FB, 0xD23F, 0xC5FC, 0xD241, 0xC5FD, 0xD248, 0xC5FE, 0xD25C, + 0xC641, 0xD78D, 0xC642, 0xD78E, 0xC643, 0xD78F, 0xC644, 0xD791, + 0xC645, 0xD792, 0xC646, 0xD793, 0xC647, 0xD794, 0xC648, 0xD795, + 0xC649, 0xD796, 0xC64A, 0xD797, 0xC64B, 0xD79A, 0xC64C, 0xD79C, + 0xC64D, 0xD79E, 0xC64E, 0xD79F, 0xC64F, 0xD7A0, 0xC650, 0xD7A1, + 0xC651, 0xD7A2, 0xC652, 0xD7A3, 0xC6A1, 0xD264, 0xC6A2, 0xD280, + 0xC6A3, 0xD281, 0xC6A4, 0xD284, 0xC6A5, 0xD288, 0xC6A6, 0xD290, + 0xC6A7, 0xD291, 0xC6A8, 0xD295, 0xC6A9, 0xD29C, 0xC6AA, 0xD2A0, + 0xC6AB, 0xD2A4, 0xC6AC, 0xD2AC, 0xC6AD, 0xD2B1, 0xC6AE, 0xD2B8, + 0xC6AF, 0xD2B9, 0xC6B0, 0xD2BC, 0xC6B1, 0xD2BF, 0xC6B2, 0xD2C0, + 0xC6B3, 0xD2C2, 0xC6B4, 0xD2C8, 0xC6B5, 0xD2C9, 0xC6B6, 0xD2CB, + 0xC6B7, 0xD2D4, 0xC6B8, 0xD2D8, 0xC6B9, 0xD2DC, 0xC6BA, 0xD2E4, + 0xC6BB, 0xD2E5, 0xC6BC, 0xD2F0, 0xC6BD, 0xD2F1, 0xC6BE, 0xD2F4, + 0xC6BF, 0xD2F8, 0xC6C0, 0xD300, 0xC6C1, 0xD301, 0xC6C2, 0xD303, + 0xC6C3, 0xD305, 0xC6C4, 0xD30C, 0xC6C5, 0xD30D, 0xC6C6, 0xD30E, + 0xC6C7, 0xD310, 0xC6C8, 0xD314, 0xC6C9, 0xD316, 0xC6CA, 0xD31C, + 0xC6CB, 0xD31D, 0xC6CC, 0xD31F, 0xC6CD, 0xD320, 0xC6CE, 0xD321, + 0xC6CF, 0xD325, 0xC6D0, 0xD328, 0xC6D1, 0xD329, 0xC6D2, 0xD32C, + 0xC6D3, 0xD330, 0xC6D4, 0xD338, 0xC6D5, 0xD339, 0xC6D6, 0xD33B, + 0xC6D7, 0xD33C, 0xC6D8, 0xD33D, 0xC6D9, 0xD344, 0xC6DA, 0xD345, + 0xC6DB, 0xD37C, 0xC6DC, 0xD37D, 0xC6DD, 0xD380, 0xC6DE, 0xD384, + 0xC6DF, 0xD38C, 0xC6E0, 0xD38D, 0xC6E1, 0xD38F, 0xC6E2, 0xD390, + 0xC6E3, 0xD391, 0xC6E4, 0xD398, 0xC6E5, 0xD399, 0xC6E6, 0xD39C, + 0xC6E7, 0xD3A0, 0xC6E8, 0xD3A8, 0xC6E9, 0xD3A9, 0xC6EA, 0xD3AB, + 0xC6EB, 0xD3AD, 0xC6EC, 0xD3B4, 0xC6ED, 0xD3B8, 0xC6EE, 0xD3BC, + 0xC6EF, 0xD3C4, 0xC6F0, 0xD3C5, 0xC6F1, 0xD3C8, 0xC6F2, 0xD3C9, + 0xC6F3, 0xD3D0, 0xC6F4, 0xD3D8, 0xC6F5, 0xD3E1, 0xC6F6, 0xD3E3, + 0xC6F7, 0xD3EC, 0xC6F8, 0xD3ED, 0xC6F9, 0xD3F0, 0xC6FA, 0xD3F4, + 0xC6FB, 0xD3FC, 0xC6FC, 0xD3FD, 0xC6FD, 0xD3FF, 0xC6FE, 0xD401, + 0xC7A1, 0xD408, 0xC7A2, 0xD41D, 0xC7A3, 0xD440, 0xC7A4, 0xD444, + 0xC7A5, 0xD45C, 0xC7A6, 0xD460, 0xC7A7, 0xD464, 0xC7A8, 0xD46D, + 0xC7A9, 0xD46F, 0xC7AA, 0xD478, 0xC7AB, 0xD479, 0xC7AC, 0xD47C, + 0xC7AD, 0xD47F, 0xC7AE, 0xD480, 0xC7AF, 0xD482, 0xC7B0, 0xD488, + 0xC7B1, 0xD489, 0xC7B2, 0xD48B, 0xC7B3, 0xD48D, 0xC7B4, 0xD494, + 0xC7B5, 0xD4A9, 0xC7B6, 0xD4CC, 0xC7B7, 0xD4D0, 0xC7B8, 0xD4D4, + 0xC7B9, 0xD4DC, 0xC7BA, 0xD4DF, 0xC7BB, 0xD4E8, 0xC7BC, 0xD4EC, + 0xC7BD, 0xD4F0, 0xC7BE, 0xD4F8, 0xC7BF, 0xD4FB, 0xC7C0, 0xD4FD, + 0xC7C1, 0xD504, 0xC7C2, 0xD508, 0xC7C3, 0xD50C, 0xC7C4, 0xD514, + 0xC7C5, 0xD515, 0xC7C6, 0xD517, 0xC7C7, 0xD53C, 0xC7C8, 0xD53D, + 0xC7C9, 0xD540, 0xC7CA, 0xD544, 0xC7CB, 0xD54C, 0xC7CC, 0xD54D, + 0xC7CD, 0xD54F, 0xC7CE, 0xD551, 0xC7CF, 0xD558, 0xC7D0, 0xD559, + 0xC7D1, 0xD55C, 0xC7D2, 0xD560, 0xC7D3, 0xD565, 0xC7D4, 0xD568, + 0xC7D5, 0xD569, 0xC7D6, 0xD56B, 0xC7D7, 0xD56D, 0xC7D8, 0xD574, + 0xC7D9, 0xD575, 0xC7DA, 0xD578, 0xC7DB, 0xD57C, 0xC7DC, 0xD584, + 0xC7DD, 0xD585, 0xC7DE, 0xD587, 0xC7DF, 0xD588, 0xC7E0, 0xD589, + 0xC7E1, 0xD590, 0xC7E2, 0xD5A5, 0xC7E3, 0xD5C8, 0xC7E4, 0xD5C9, + 0xC7E5, 0xD5CC, 0xC7E6, 0xD5D0, 0xC7E7, 0xD5D2, 0xC7E8, 0xD5D8, + 0xC7E9, 0xD5D9, 0xC7EA, 0xD5DB, 0xC7EB, 0xD5DD, 0xC7EC, 0xD5E4, + 0xC7ED, 0xD5E5, 0xC7EE, 0xD5E8, 0xC7EF, 0xD5EC, 0xC7F0, 0xD5F4, + 0xC7F1, 0xD5F5, 0xC7F2, 0xD5F7, 0xC7F3, 0xD5F9, 0xC7F4, 0xD600, + 0xC7F5, 0xD601, 0xC7F6, 0xD604, 0xC7F7, 0xD608, 0xC7F8, 0xD610, + 0xC7F9, 0xD611, 0xC7FA, 0xD613, 0xC7FB, 0xD614, 0xC7FC, 0xD615, + 0xC7FD, 0xD61C, 0xC7FE, 0xD620, 0xC8A1, 0xD624, 0xC8A2, 0xD62D, + 0xC8A3, 0xD638, 0xC8A4, 0xD639, 0xC8A5, 0xD63C, 0xC8A6, 0xD640, + 0xC8A7, 0xD645, 0xC8A8, 0xD648, 0xC8A9, 0xD649, 0xC8AA, 0xD64B, + 0xC8AB, 0xD64D, 0xC8AC, 0xD651, 0xC8AD, 0xD654, 0xC8AE, 0xD655, + 0xC8AF, 0xD658, 0xC8B0, 0xD65C, 0xC8B1, 0xD667, 0xC8B2, 0xD669, + 0xC8B3, 0xD670, 0xC8B4, 0xD671, 0xC8B5, 0xD674, 0xC8B6, 0xD683, + 0xC8B7, 0xD685, 0xC8B8, 0xD68C, 0xC8B9, 0xD68D, 0xC8BA, 0xD690, + 0xC8BB, 0xD694, 0xC8BC, 0xD69D, 0xC8BD, 0xD69F, 0xC8BE, 0xD6A1, + 0xC8BF, 0xD6A8, 0xC8C0, 0xD6AC, 0xC8C1, 0xD6B0, 0xC8C2, 0xD6B9, + 0xC8C3, 0xD6BB, 0xC8C4, 0xD6C4, 0xC8C5, 0xD6C5, 0xC8C6, 0xD6C8, + 0xC8C7, 0xD6CC, 0xC8C8, 0xD6D1, 0xC8C9, 0xD6D4, 0xC8CA, 0xD6D7, + 0xC8CB, 0xD6D9, 0xC8CC, 0xD6E0, 0xC8CD, 0xD6E4, 0xC8CE, 0xD6E8, + 0xC8CF, 0xD6F0, 0xC8D0, 0xD6F5, 0xC8D1, 0xD6FC, 0xC8D2, 0xD6FD, + 0xC8D3, 0xD700, 0xC8D4, 0xD704, 0xC8D5, 0xD711, 0xC8D6, 0xD718, + 0xC8D7, 0xD719, 0xC8D8, 0xD71C, 0xC8D9, 0xD720, 0xC8DA, 0xD728, + 0xC8DB, 0xD729, 0xC8DC, 0xD72B, 0xC8DD, 0xD72D, 0xC8DE, 0xD734, + 0xC8DF, 0xD735, 0xC8E0, 0xD738, 0xC8E1, 0xD73C, 0xC8E2, 0xD744, + 0xC8E3, 0xD747, 0xC8E4, 0xD749, 0xC8E5, 0xD750, 0xC8E6, 0xD751, + 0xC8E7, 0xD754, 0xC8E8, 0xD756, 0xC8E9, 0xD757, 0xC8EA, 0xD758, + 0xC8EB, 0xD759, 0xC8EC, 0xD760, 0xC8ED, 0xD761, 0xC8EE, 0xD763, + 0xC8EF, 0xD765, 0xC8F0, 0xD769, 0xC8F1, 0xD76C, 0xC8F2, 0xD770, + 0xC8F3, 0xD774, 0xC8F4, 0xD77C, 0xC8F5, 0xD77D, 0xC8F6, 0xD781, + 0xC8F7, 0xD788, 0xC8F8, 0xD789, 0xC8F9, 0xD78C, 0xC8FA, 0xD790, + 0xC8FB, 0xD798, 0xC8FC, 0xD799, 0xC8FD, 0xD79B, 0xC8FE, 0xD79D, + 0xCAA1, 0x4F3D, 0xCAA2, 0x4F73, 0xCAA3, 0x5047, 0xCAA4, 0x50F9, + 0xCAA5, 0x52A0, 0xCAA6, 0x53EF, 0xCAA7, 0x5475, 0xCAA8, 0x54E5, + 0xCAA9, 0x5609, 0xCAAA, 0x5AC1, 0xCAAB, 0x5BB6, 0xCAAC, 0x6687, + 0xCAAD, 0x67B6, 0xCAAE, 0x67B7, 0xCAAF, 0x67EF, 0xCAB0, 0x6B4C, + 0xCAB1, 0x73C2, 0xCAB2, 0x75C2, 0xCAB3, 0x7A3C, 0xCAB4, 0x82DB, + 0xCAB5, 0x8304, 0xCAB6, 0x8857, 0xCAB7, 0x8888, 0xCAB8, 0x8A36, + 0xCAB9, 0x8CC8, 0xCABA, 0x8DCF, 0xCABB, 0x8EFB, 0xCABC, 0x8FE6, + 0xCABD, 0x99D5, 0xCABE, 0x523B, 0xCABF, 0x5374, 0xCAC0, 0x5404, + 0xCAC1, 0x606A, 0xCAC2, 0x6164, 0xCAC3, 0x6BBC, 0xCAC4, 0x73CF, + 0xCAC5, 0x811A, 0xCAC6, 0x89BA, 0xCAC7, 0x89D2, 0xCAC8, 0x95A3, + 0xCAC9, 0x4F83, 0xCACA, 0x520A, 0xCACB, 0x58BE, 0xCACC, 0x5978, + 0xCACD, 0x59E6, 0xCACE, 0x5E72, 0xCACF, 0x5E79, 0xCAD0, 0x61C7, + 0xCAD1, 0x63C0, 0xCAD2, 0x6746, 0xCAD3, 0x67EC, 0xCAD4, 0x687F, + 0xCAD5, 0x6F97, 0xCAD6, 0x764E, 0xCAD7, 0x770B, 0xCAD8, 0x78F5, + 0xCAD9, 0x7A08, 0xCADA, 0x7AFF, 0xCADB, 0x7C21, 0xCADC, 0x809D, + 0xCADD, 0x826E, 0xCADE, 0x8271, 0xCADF, 0x8AEB, 0xCAE0, 0x9593, + 0xCAE1, 0x4E6B, 0xCAE2, 0x559D, 0xCAE3, 0x66F7, 0xCAE4, 0x6E34, + 0xCAE5, 0x78A3, 0xCAE6, 0x7AED, 0xCAE7, 0x845B, 0xCAE8, 0x8910, + 0xCAE9, 0x874E, 0xCAEA, 0x97A8, 0xCAEB, 0x52D8, 0xCAEC, 0x574E, + 0xCAED, 0x582A, 0xCAEE, 0x5D4C, 0xCAEF, 0x611F, 0xCAF0, 0x61BE, + 0xCAF1, 0x6221, 0xCAF2, 0x6562, 0xCAF3, 0x67D1, 0xCAF4, 0x6A44, + 0xCAF5, 0x6E1B, 0xCAF6, 0x7518, 0xCAF7, 0x75B3, 0xCAF8, 0x76E3, + 0xCAF9, 0x77B0, 0xCAFA, 0x7D3A, 0xCAFB, 0x90AF, 0xCAFC, 0x9451, + 0xCAFD, 0x9452, 0xCAFE, 0x9F95, 0xCBA1, 0x5323, 0xCBA2, 0x5CAC, + 0xCBA3, 0x7532, 0xCBA4, 0x80DB, 0xCBA5, 0x9240, 0xCBA6, 0x9598, + 0xCBA7, 0x525B, 0xCBA8, 0x5808, 0xCBA9, 0x59DC, 0xCBAA, 0x5CA1, + 0xCBAB, 0x5D17, 0xCBAC, 0x5EB7, 0xCBAD, 0x5F3A, 0xCBAE, 0x5F4A, + 0xCBAF, 0x6177, 0xCBB0, 0x6C5F, 0xCBB1, 0x757A, 0xCBB2, 0x7586, + 0xCBB3, 0x7CE0, 0xCBB4, 0x7D73, 0xCBB5, 0x7DB1, 0xCBB6, 0x7F8C, + 0xCBB7, 0x8154, 0xCBB8, 0x8221, 0xCBB9, 0x8591, 0xCBBA, 0x8941, + 0xCBBB, 0x8B1B, 0xCBBC, 0x92FC, 0xCBBD, 0x964D, 0xCBBE, 0x9C47, + 0xCBBF, 0x4ECB, 0xCBC0, 0x4EF7, 0xCBC1, 0x500B, 0xCBC2, 0x51F1, + 0xCBC3, 0x584F, 0xCBC4, 0x6137, 0xCBC5, 0x613E, 0xCBC6, 0x6168, + 0xCBC7, 0x6539, 0xCBC8, 0x69EA, 0xCBC9, 0x6F11, 0xCBCA, 0x75A5, + 0xCBCB, 0x7686, 0xCBCC, 0x76D6, 0xCBCD, 0x7B87, 0xCBCE, 0x82A5, + 0xCBCF, 0x84CB, 0xCBD0, 0xF900, 0xCBD1, 0x93A7, 0xCBD2, 0x958B, + 0xCBD3, 0x5580, 0xCBD4, 0x5BA2, 0xCBD5, 0x5751, 0xCBD6, 0xF901, + 0xCBD7, 0x7CB3, 0xCBD8, 0x7FB9, 0xCBD9, 0x91B5, 0xCBDA, 0x5028, + 0xCBDB, 0x53BB, 0xCBDC, 0x5C45, 0xCBDD, 0x5DE8, 0xCBDE, 0x62D2, + 0xCBDF, 0x636E, 0xCBE0, 0x64DA, 0xCBE1, 0x64E7, 0xCBE2, 0x6E20, + 0xCBE3, 0x70AC, 0xCBE4, 0x795B, 0xCBE5, 0x8DDD, 0xCBE6, 0x8E1E, + 0xCBE7, 0xF902, 0xCBE8, 0x907D, 0xCBE9, 0x9245, 0xCBEA, 0x92F8, + 0xCBEB, 0x4E7E, 0xCBEC, 0x4EF6, 0xCBED, 0x5065, 0xCBEE, 0x5DFE, + 0xCBEF, 0x5EFA, 0xCBF0, 0x6106, 0xCBF1, 0x6957, 0xCBF2, 0x8171, + 0xCBF3, 0x8654, 0xCBF4, 0x8E47, 0xCBF5, 0x9375, 0xCBF6, 0x9A2B, + 0xCBF7, 0x4E5E, 0xCBF8, 0x5091, 0xCBF9, 0x6770, 0xCBFA, 0x6840, + 0xCBFB, 0x5109, 0xCBFC, 0x528D, 0xCBFD, 0x5292, 0xCBFE, 0x6AA2, + 0xCCA1, 0x77BC, 0xCCA2, 0x9210, 0xCCA3, 0x9ED4, 0xCCA4, 0x52AB, + 0xCCA5, 0x602F, 0xCCA6, 0x8FF2, 0xCCA7, 0x5048, 0xCCA8, 0x61A9, + 0xCCA9, 0x63ED, 0xCCAA, 0x64CA, 0xCCAB, 0x683C, 0xCCAC, 0x6A84, + 0xCCAD, 0x6FC0, 0xCCAE, 0x8188, 0xCCAF, 0x89A1, 0xCCB0, 0x9694, + 0xCCB1, 0x5805, 0xCCB2, 0x727D, 0xCCB3, 0x72AC, 0xCCB4, 0x7504, + 0xCCB5, 0x7D79, 0xCCB6, 0x7E6D, 0xCCB7, 0x80A9, 0xCCB8, 0x898B, + 0xCCB9, 0x8B74, 0xCCBA, 0x9063, 0xCCBB, 0x9D51, 0xCCBC, 0x6289, + 0xCCBD, 0x6C7A, 0xCCBE, 0x6F54, 0xCCBF, 0x7D50, 0xCCC0, 0x7F3A, + 0xCCC1, 0x8A23, 0xCCC2, 0x517C, 0xCCC3, 0x614A, 0xCCC4, 0x7B9D, + 0xCCC5, 0x8B19, 0xCCC6, 0x9257, 0xCCC7, 0x938C, 0xCCC8, 0x4EAC, + 0xCCC9, 0x4FD3, 0xCCCA, 0x501E, 0xCCCB, 0x50BE, 0xCCCC, 0x5106, + 0xCCCD, 0x52C1, 0xCCCE, 0x52CD, 0xCCCF, 0x537F, 0xCCD0, 0x5770, + 0xCCD1, 0x5883, 0xCCD2, 0x5E9A, 0xCCD3, 0x5F91, 0xCCD4, 0x6176, + 0xCCD5, 0x61AC, 0xCCD6, 0x64CE, 0xCCD7, 0x656C, 0xCCD8, 0x666F, + 0xCCD9, 0x66BB, 0xCCDA, 0x66F4, 0xCCDB, 0x6897, 0xCCDC, 0x6D87, + 0xCCDD, 0x7085, 0xCCDE, 0x70F1, 0xCCDF, 0x749F, 0xCCE0, 0x74A5, + 0xCCE1, 0x74CA, 0xCCE2, 0x75D9, 0xCCE3, 0x786C, 0xCCE4, 0x78EC, + 0xCCE5, 0x7ADF, 0xCCE6, 0x7AF6, 0xCCE7, 0x7D45, 0xCCE8, 0x7D93, + 0xCCE9, 0x8015, 0xCCEA, 0x803F, 0xCCEB, 0x811B, 0xCCEC, 0x8396, + 0xCCED, 0x8B66, 0xCCEE, 0x8F15, 0xCCEF, 0x9015, 0xCCF0, 0x93E1, + 0xCCF1, 0x9803, 0xCCF2, 0x9838, 0xCCF3, 0x9A5A, 0xCCF4, 0x9BE8, + 0xCCF5, 0x4FC2, 0xCCF6, 0x5553, 0xCCF7, 0x583A, 0xCCF8, 0x5951, + 0xCCF9, 0x5B63, 0xCCFA, 0x5C46, 0xCCFB, 0x60B8, 0xCCFC, 0x6212, + 0xCCFD, 0x6842, 0xCCFE, 0x68B0, 0xCDA1, 0x68E8, 0xCDA2, 0x6EAA, + 0xCDA3, 0x754C, 0xCDA4, 0x7678, 0xCDA5, 0x78CE, 0xCDA6, 0x7A3D, + 0xCDA7, 0x7CFB, 0xCDA8, 0x7E6B, 0xCDA9, 0x7E7C, 0xCDAA, 0x8A08, + 0xCDAB, 0x8AA1, 0xCDAC, 0x8C3F, 0xCDAD, 0x968E, 0xCDAE, 0x9DC4, + 0xCDAF, 0x53E4, 0xCDB0, 0x53E9, 0xCDB1, 0x544A, 0xCDB2, 0x5471, + 0xCDB3, 0x56FA, 0xCDB4, 0x59D1, 0xCDB5, 0x5B64, 0xCDB6, 0x5C3B, + 0xCDB7, 0x5EAB, 0xCDB8, 0x62F7, 0xCDB9, 0x6537, 0xCDBA, 0x6545, + 0xCDBB, 0x6572, 0xCDBC, 0x66A0, 0xCDBD, 0x67AF, 0xCDBE, 0x69C1, + 0xCDBF, 0x6CBD, 0xCDC0, 0x75FC, 0xCDC1, 0x7690, 0xCDC2, 0x777E, + 0xCDC3, 0x7A3F, 0xCDC4, 0x7F94, 0xCDC5, 0x8003, 0xCDC6, 0x80A1, + 0xCDC7, 0x818F, 0xCDC8, 0x82E6, 0xCDC9, 0x82FD, 0xCDCA, 0x83F0, + 0xCDCB, 0x85C1, 0xCDCC, 0x8831, 0xCDCD, 0x88B4, 0xCDCE, 0x8AA5, + 0xCDCF, 0xF903, 0xCDD0, 0x8F9C, 0xCDD1, 0x932E, 0xCDD2, 0x96C7, + 0xCDD3, 0x9867, 0xCDD4, 0x9AD8, 0xCDD5, 0x9F13, 0xCDD6, 0x54ED, + 0xCDD7, 0x659B, 0xCDD8, 0x66F2, 0xCDD9, 0x688F, 0xCDDA, 0x7A40, + 0xCDDB, 0x8C37, 0xCDDC, 0x9D60, 0xCDDD, 0x56F0, 0xCDDE, 0x5764, + 0xCDDF, 0x5D11, 0xCDE0, 0x6606, 0xCDE1, 0x68B1, 0xCDE2, 0x68CD, + 0xCDE3, 0x6EFE, 0xCDE4, 0x7428, 0xCDE5, 0x889E, 0xCDE6, 0x9BE4, + 0xCDE7, 0x6C68, 0xCDE8, 0xF904, 0xCDE9, 0x9AA8, 0xCDEA, 0x4F9B, + 0xCDEB, 0x516C, 0xCDEC, 0x5171, 0xCDED, 0x529F, 0xCDEE, 0x5B54, + 0xCDEF, 0x5DE5, 0xCDF0, 0x6050, 0xCDF1, 0x606D, 0xCDF2, 0x62F1, + 0xCDF3, 0x63A7, 0xCDF4, 0x653B, 0xCDF5, 0x73D9, 0xCDF6, 0x7A7A, + 0xCDF7, 0x86A3, 0xCDF8, 0x8CA2, 0xCDF9, 0x978F, 0xCDFA, 0x4E32, + 0xCDFB, 0x5BE1, 0xCDFC, 0x6208, 0xCDFD, 0x679C, 0xCDFE, 0x74DC, + 0xCEA1, 0x79D1, 0xCEA2, 0x83D3, 0xCEA3, 0x8A87, 0xCEA4, 0x8AB2, + 0xCEA5, 0x8DE8, 0xCEA6, 0x904E, 0xCEA7, 0x934B, 0xCEA8, 0x9846, + 0xCEA9, 0x5ED3, 0xCEAA, 0x69E8, 0xCEAB, 0x85FF, 0xCEAC, 0x90ED, + 0xCEAD, 0xF905, 0xCEAE, 0x51A0, 0xCEAF, 0x5B98, 0xCEB0, 0x5BEC, + 0xCEB1, 0x6163, 0xCEB2, 0x68FA, 0xCEB3, 0x6B3E, 0xCEB4, 0x704C, + 0xCEB5, 0x742F, 0xCEB6, 0x74D8, 0xCEB7, 0x7BA1, 0xCEB8, 0x7F50, + 0xCEB9, 0x83C5, 0xCEBA, 0x89C0, 0xCEBB, 0x8CAB, 0xCEBC, 0x95DC, + 0xCEBD, 0x9928, 0xCEBE, 0x522E, 0xCEBF, 0x605D, 0xCEC0, 0x62EC, + 0xCEC1, 0x9002, 0xCEC2, 0x4F8A, 0xCEC3, 0x5149, 0xCEC4, 0x5321, + 0xCEC5, 0x58D9, 0xCEC6, 0x5EE3, 0xCEC7, 0x66E0, 0xCEC8, 0x6D38, + 0xCEC9, 0x709A, 0xCECA, 0x72C2, 0xCECB, 0x73D6, 0xCECC, 0x7B50, + 0xCECD, 0x80F1, 0xCECE, 0x945B, 0xCECF, 0x5366, 0xCED0, 0x639B, + 0xCED1, 0x7F6B, 0xCED2, 0x4E56, 0xCED3, 0x5080, 0xCED4, 0x584A, + 0xCED5, 0x58DE, 0xCED6, 0x602A, 0xCED7, 0x6127, 0xCED8, 0x62D0, + 0xCED9, 0x69D0, 0xCEDA, 0x9B41, 0xCEDB, 0x5B8F, 0xCEDC, 0x7D18, + 0xCEDD, 0x80B1, 0xCEDE, 0x8F5F, 0xCEDF, 0x4EA4, 0xCEE0, 0x50D1, + 0xCEE1, 0x54AC, 0xCEE2, 0x55AC, 0xCEE3, 0x5B0C, 0xCEE4, 0x5DA0, + 0xCEE5, 0x5DE7, 0xCEE6, 0x652A, 0xCEE7, 0x654E, 0xCEE8, 0x6821, + 0xCEE9, 0x6A4B, 0xCEEA, 0x72E1, 0xCEEB, 0x768E, 0xCEEC, 0x77EF, + 0xCEED, 0x7D5E, 0xCEEE, 0x7FF9, 0xCEEF, 0x81A0, 0xCEF0, 0x854E, + 0xCEF1, 0x86DF, 0xCEF2, 0x8F03, 0xCEF3, 0x8F4E, 0xCEF4, 0x90CA, + 0xCEF5, 0x9903, 0xCEF6, 0x9A55, 0xCEF7, 0x9BAB, 0xCEF8, 0x4E18, + 0xCEF9, 0x4E45, 0xCEFA, 0x4E5D, 0xCEFB, 0x4EC7, 0xCEFC, 0x4FF1, + 0xCEFD, 0x5177, 0xCEFE, 0x52FE, 0xCFA1, 0x5340, 0xCFA2, 0x53E3, + 0xCFA3, 0x53E5, 0xCFA4, 0x548E, 0xCFA5, 0x5614, 0xCFA6, 0x5775, + 0xCFA7, 0x57A2, 0xCFA8, 0x5BC7, 0xCFA9, 0x5D87, 0xCFAA, 0x5ED0, + 0xCFAB, 0x61FC, 0xCFAC, 0x62D8, 0xCFAD, 0x6551, 0xCFAE, 0x67B8, + 0xCFAF, 0x67E9, 0xCFB0, 0x69CB, 0xCFB1, 0x6B50, 0xCFB2, 0x6BC6, + 0xCFB3, 0x6BEC, 0xCFB4, 0x6C42, 0xCFB5, 0x6E9D, 0xCFB6, 0x7078, + 0xCFB7, 0x72D7, 0xCFB8, 0x7396, 0xCFB9, 0x7403, 0xCFBA, 0x77BF, + 0xCFBB, 0x77E9, 0xCFBC, 0x7A76, 0xCFBD, 0x7D7F, 0xCFBE, 0x8009, + 0xCFBF, 0x81FC, 0xCFC0, 0x8205, 0xCFC1, 0x820A, 0xCFC2, 0x82DF, + 0xCFC3, 0x8862, 0xCFC4, 0x8B33, 0xCFC5, 0x8CFC, 0xCFC6, 0x8EC0, + 0xCFC7, 0x9011, 0xCFC8, 0x90B1, 0xCFC9, 0x9264, 0xCFCA, 0x92B6, + 0xCFCB, 0x99D2, 0xCFCC, 0x9A45, 0xCFCD, 0x9CE9, 0xCFCE, 0x9DD7, + 0xCFCF, 0x9F9C, 0xCFD0, 0x570B, 0xCFD1, 0x5C40, 0xCFD2, 0x83CA, + 0xCFD3, 0x97A0, 0xCFD4, 0x97AB, 0xCFD5, 0x9EB4, 0xCFD6, 0x541B, + 0xCFD7, 0x7A98, 0xCFD8, 0x7FA4, 0xCFD9, 0x88D9, 0xCFDA, 0x8ECD, + 0xCFDB, 0x90E1, 0xCFDC, 0x5800, 0xCFDD, 0x5C48, 0xCFDE, 0x6398, + 0xCFDF, 0x7A9F, 0xCFE0, 0x5BAE, 0xCFE1, 0x5F13, 0xCFE2, 0x7A79, + 0xCFE3, 0x7AAE, 0xCFE4, 0x828E, 0xCFE5, 0x8EAC, 0xCFE6, 0x5026, + 0xCFE7, 0x5238, 0xCFE8, 0x52F8, 0xCFE9, 0x5377, 0xCFEA, 0x5708, + 0xCFEB, 0x62F3, 0xCFEC, 0x6372, 0xCFED, 0x6B0A, 0xCFEE, 0x6DC3, + 0xCFEF, 0x7737, 0xCFF0, 0x53A5, 0xCFF1, 0x7357, 0xCFF2, 0x8568, + 0xCFF3, 0x8E76, 0xCFF4, 0x95D5, 0xCFF5, 0x673A, 0xCFF6, 0x6AC3, + 0xCFF7, 0x6F70, 0xCFF8, 0x8A6D, 0xCFF9, 0x8ECC, 0xCFFA, 0x994B, + 0xCFFB, 0xF906, 0xCFFC, 0x6677, 0xCFFD, 0x6B78, 0xCFFE, 0x8CB4, + 0xD0A1, 0x9B3C, 0xD0A2, 0xF907, 0xD0A3, 0x53EB, 0xD0A4, 0x572D, + 0xD0A5, 0x594E, 0xD0A6, 0x63C6, 0xD0A7, 0x69FB, 0xD0A8, 0x73EA, + 0xD0A9, 0x7845, 0xD0AA, 0x7ABA, 0xD0AB, 0x7AC5, 0xD0AC, 0x7CFE, + 0xD0AD, 0x8475, 0xD0AE, 0x898F, 0xD0AF, 0x8D73, 0xD0B0, 0x9035, + 0xD0B1, 0x95A8, 0xD0B2, 0x52FB, 0xD0B3, 0x5747, 0xD0B4, 0x7547, + 0xD0B5, 0x7B60, 0xD0B6, 0x83CC, 0xD0B7, 0x921E, 0xD0B8, 0xF908, + 0xD0B9, 0x6A58, 0xD0BA, 0x514B, 0xD0BB, 0x524B, 0xD0BC, 0x5287, + 0xD0BD, 0x621F, 0xD0BE, 0x68D8, 0xD0BF, 0x6975, 0xD0C0, 0x9699, + 0xD0C1, 0x50C5, 0xD0C2, 0x52A4, 0xD0C3, 0x52E4, 0xD0C4, 0x61C3, + 0xD0C5, 0x65A4, 0xD0C6, 0x6839, 0xD0C7, 0x69FF, 0xD0C8, 0x747E, + 0xD0C9, 0x7B4B, 0xD0CA, 0x82B9, 0xD0CB, 0x83EB, 0xD0CC, 0x89B2, + 0xD0CD, 0x8B39, 0xD0CE, 0x8FD1, 0xD0CF, 0x9949, 0xD0D0, 0xF909, + 0xD0D1, 0x4ECA, 0xD0D2, 0x5997, 0xD0D3, 0x64D2, 0xD0D4, 0x6611, + 0xD0D5, 0x6A8E, 0xD0D6, 0x7434, 0xD0D7, 0x7981, 0xD0D8, 0x79BD, + 0xD0D9, 0x82A9, 0xD0DA, 0x887E, 0xD0DB, 0x887F, 0xD0DC, 0x895F, + 0xD0DD, 0xF90A, 0xD0DE, 0x9326, 0xD0DF, 0x4F0B, 0xD0E0, 0x53CA, + 0xD0E1, 0x6025, 0xD0E2, 0x6271, 0xD0E3, 0x6C72, 0xD0E4, 0x7D1A, + 0xD0E5, 0x7D66, 0xD0E6, 0x4E98, 0xD0E7, 0x5162, 0xD0E8, 0x77DC, + 0xD0E9, 0x80AF, 0xD0EA, 0x4F01, 0xD0EB, 0x4F0E, 0xD0EC, 0x5176, + 0xD0ED, 0x5180, 0xD0EE, 0x55DC, 0xD0EF, 0x5668, 0xD0F0, 0x573B, + 0xD0F1, 0x57FA, 0xD0F2, 0x57FC, 0xD0F3, 0x5914, 0xD0F4, 0x5947, + 0xD0F5, 0x5993, 0xD0F6, 0x5BC4, 0xD0F7, 0x5C90, 0xD0F8, 0x5D0E, + 0xD0F9, 0x5DF1, 0xD0FA, 0x5E7E, 0xD0FB, 0x5FCC, 0xD0FC, 0x6280, + 0xD0FD, 0x65D7, 0xD0FE, 0x65E3, 0xD1A1, 0x671E, 0xD1A2, 0x671F, + 0xD1A3, 0x675E, 0xD1A4, 0x68CB, 0xD1A5, 0x68C4, 0xD1A6, 0x6A5F, + 0xD1A7, 0x6B3A, 0xD1A8, 0x6C23, 0xD1A9, 0x6C7D, 0xD1AA, 0x6C82, + 0xD1AB, 0x6DC7, 0xD1AC, 0x7398, 0xD1AD, 0x7426, 0xD1AE, 0x742A, + 0xD1AF, 0x7482, 0xD1B0, 0x74A3, 0xD1B1, 0x7578, 0xD1B2, 0x757F, + 0xD1B3, 0x7881, 0xD1B4, 0x78EF, 0xD1B5, 0x7941, 0xD1B6, 0x7947, + 0xD1B7, 0x7948, 0xD1B8, 0x797A, 0xD1B9, 0x7B95, 0xD1BA, 0x7D00, + 0xD1BB, 0x7DBA, 0xD1BC, 0x7F88, 0xD1BD, 0x8006, 0xD1BE, 0x802D, + 0xD1BF, 0x808C, 0xD1C0, 0x8A18, 0xD1C1, 0x8B4F, 0xD1C2, 0x8C48, + 0xD1C3, 0x8D77, 0xD1C4, 0x9321, 0xD1C5, 0x9324, 0xD1C6, 0x98E2, + 0xD1C7, 0x9951, 0xD1C8, 0x9A0E, 0xD1C9, 0x9A0F, 0xD1CA, 0x9A65, + 0xD1CB, 0x9E92, 0xD1CC, 0x7DCA, 0xD1CD, 0x4F76, 0xD1CE, 0x5409, + 0xD1CF, 0x62EE, 0xD1D0, 0x6854, 0xD1D1, 0x91D1, 0xD1D2, 0x55AB, + 0xD1D3, 0x513A, 0xD1D4, 0xF90B, 0xD1D5, 0xF90C, 0xD1D6, 0x5A1C, + 0xD1D7, 0x61E6, 0xD1D8, 0xF90D, 0xD1D9, 0x62CF, 0xD1DA, 0x62FF, + 0xD1DB, 0xF90E, 0xD1DC, 0xF90F, 0xD1DD, 0xF910, 0xD1DE, 0xF911, + 0xD1DF, 0xF912, 0xD1E0, 0xF913, 0xD1E1, 0x90A3, 0xD1E2, 0xF914, + 0xD1E3, 0xF915, 0xD1E4, 0xF916, 0xD1E5, 0xF917, 0xD1E6, 0xF918, + 0xD1E7, 0x8AFE, 0xD1E8, 0xF919, 0xD1E9, 0xF91A, 0xD1EA, 0xF91B, + 0xD1EB, 0xF91C, 0xD1EC, 0x6696, 0xD1ED, 0xF91D, 0xD1EE, 0x7156, + 0xD1EF, 0xF91E, 0xD1F0, 0xF91F, 0xD1F1, 0x96E3, 0xD1F2, 0xF920, + 0xD1F3, 0x634F, 0xD1F4, 0x637A, 0xD1F5, 0x5357, 0xD1F6, 0xF921, + 0xD1F7, 0x678F, 0xD1F8, 0x6960, 0xD1F9, 0x6E73, 0xD1FA, 0xF922, + 0xD1FB, 0x7537, 0xD1FC, 0xF923, 0xD1FD, 0xF924, 0xD1FE, 0xF925, + 0xD2A1, 0x7D0D, 0xD2A2, 0xF926, 0xD2A3, 0xF927, 0xD2A4, 0x8872, + 0xD2A5, 0x56CA, 0xD2A6, 0x5A18, 0xD2A7, 0xF928, 0xD2A8, 0xF929, + 0xD2A9, 0xF92A, 0xD2AA, 0xF92B, 0xD2AB, 0xF92C, 0xD2AC, 0x4E43, + 0xD2AD, 0xF92D, 0xD2AE, 0x5167, 0xD2AF, 0x5948, 0xD2B0, 0x67F0, + 0xD2B1, 0x8010, 0xD2B2, 0xF92E, 0xD2B3, 0x5973, 0xD2B4, 0x5E74, + 0xD2B5, 0x649A, 0xD2B6, 0x79CA, 0xD2B7, 0x5FF5, 0xD2B8, 0x606C, + 0xD2B9, 0x62C8, 0xD2BA, 0x637B, 0xD2BB, 0x5BE7, 0xD2BC, 0x5BD7, + 0xD2BD, 0x52AA, 0xD2BE, 0xF92F, 0xD2BF, 0x5974, 0xD2C0, 0x5F29, + 0xD2C1, 0x6012, 0xD2C2, 0xF930, 0xD2C3, 0xF931, 0xD2C4, 0xF932, + 0xD2C5, 0x7459, 0xD2C6, 0xF933, 0xD2C7, 0xF934, 0xD2C8, 0xF935, + 0xD2C9, 0xF936, 0xD2CA, 0xF937, 0xD2CB, 0xF938, 0xD2CC, 0x99D1, + 0xD2CD, 0xF939, 0xD2CE, 0xF93A, 0xD2CF, 0xF93B, 0xD2D0, 0xF93C, + 0xD2D1, 0xF93D, 0xD2D2, 0xF93E, 0xD2D3, 0xF93F, 0xD2D4, 0xF940, + 0xD2D5, 0xF941, 0xD2D6, 0xF942, 0xD2D7, 0xF943, 0xD2D8, 0x6FC3, + 0xD2D9, 0xF944, 0xD2DA, 0xF945, 0xD2DB, 0x81BF, 0xD2DC, 0x8FB2, + 0xD2DD, 0x60F1, 0xD2DE, 0xF946, 0xD2DF, 0xF947, 0xD2E0, 0x8166, + 0xD2E1, 0xF948, 0xD2E2, 0xF949, 0xD2E3, 0x5C3F, 0xD2E4, 0xF94A, + 0xD2E5, 0xF94B, 0xD2E6, 0xF94C, 0xD2E7, 0xF94D, 0xD2E8, 0xF94E, + 0xD2E9, 0xF94F, 0xD2EA, 0xF950, 0xD2EB, 0xF951, 0xD2EC, 0x5AE9, + 0xD2ED, 0x8A25, 0xD2EE, 0x677B, 0xD2EF, 0x7D10, 0xD2F0, 0xF952, + 0xD2F1, 0xF953, 0xD2F2, 0xF954, 0xD2F3, 0xF955, 0xD2F4, 0xF956, + 0xD2F5, 0xF957, 0xD2F6, 0x80FD, 0xD2F7, 0xF958, 0xD2F8, 0xF959, + 0xD2F9, 0x5C3C, 0xD2FA, 0x6CE5, 0xD2FB, 0x533F, 0xD2FC, 0x6EBA, + 0xD2FD, 0x591A, 0xD2FE, 0x8336, 0xD3A1, 0x4E39, 0xD3A2, 0x4EB6, + 0xD3A3, 0x4F46, 0xD3A4, 0x55AE, 0xD3A5, 0x5718, 0xD3A6, 0x58C7, + 0xD3A7, 0x5F56, 0xD3A8, 0x65B7, 0xD3A9, 0x65E6, 0xD3AA, 0x6A80, + 0xD3AB, 0x6BB5, 0xD3AC, 0x6E4D, 0xD3AD, 0x77ED, 0xD3AE, 0x7AEF, + 0xD3AF, 0x7C1E, 0xD3B0, 0x7DDE, 0xD3B1, 0x86CB, 0xD3B2, 0x8892, + 0xD3B3, 0x9132, 0xD3B4, 0x935B, 0xD3B5, 0x64BB, 0xD3B6, 0x6FBE, + 0xD3B7, 0x737A, 0xD3B8, 0x75B8, 0xD3B9, 0x9054, 0xD3BA, 0x5556, + 0xD3BB, 0x574D, 0xD3BC, 0x61BA, 0xD3BD, 0x64D4, 0xD3BE, 0x66C7, + 0xD3BF, 0x6DE1, 0xD3C0, 0x6E5B, 0xD3C1, 0x6F6D, 0xD3C2, 0x6FB9, + 0xD3C3, 0x75F0, 0xD3C4, 0x8043, 0xD3C5, 0x81BD, 0xD3C6, 0x8541, + 0xD3C7, 0x8983, 0xD3C8, 0x8AC7, 0xD3C9, 0x8B5A, 0xD3CA, 0x931F, + 0xD3CB, 0x6C93, 0xD3CC, 0x7553, 0xD3CD, 0x7B54, 0xD3CE, 0x8E0F, + 0xD3CF, 0x905D, 0xD3D0, 0x5510, 0xD3D1, 0x5802, 0xD3D2, 0x5858, + 0xD3D3, 0x5E62, 0xD3D4, 0x6207, 0xD3D5, 0x649E, 0xD3D6, 0x68E0, + 0xD3D7, 0x7576, 0xD3D8, 0x7CD6, 0xD3D9, 0x87B3, 0xD3DA, 0x9EE8, + 0xD3DB, 0x4EE3, 0xD3DC, 0x5788, 0xD3DD, 0x576E, 0xD3DE, 0x5927, + 0xD3DF, 0x5C0D, 0xD3E0, 0x5CB1, 0xD3E1, 0x5E36, 0xD3E2, 0x5F85, + 0xD3E3, 0x6234, 0xD3E4, 0x64E1, 0xD3E5, 0x73B3, 0xD3E6, 0x81FA, + 0xD3E7, 0x888B, 0xD3E8, 0x8CB8, 0xD3E9, 0x968A, 0xD3EA, 0x9EDB, + 0xD3EB, 0x5B85, 0xD3EC, 0x5FB7, 0xD3ED, 0x60B3, 0xD3EE, 0x5012, + 0xD3EF, 0x5200, 0xD3F0, 0x5230, 0xD3F1, 0x5716, 0xD3F2, 0x5835, + 0xD3F3, 0x5857, 0xD3F4, 0x5C0E, 0xD3F5, 0x5C60, 0xD3F6, 0x5CF6, + 0xD3F7, 0x5D8B, 0xD3F8, 0x5EA6, 0xD3F9, 0x5F92, 0xD3FA, 0x60BC, + 0xD3FB, 0x6311, 0xD3FC, 0x6389, 0xD3FD, 0x6417, 0xD3FE, 0x6843, + 0xD4A1, 0x68F9, 0xD4A2, 0x6AC2, 0xD4A3, 0x6DD8, 0xD4A4, 0x6E21, + 0xD4A5, 0x6ED4, 0xD4A6, 0x6FE4, 0xD4A7, 0x71FE, 0xD4A8, 0x76DC, + 0xD4A9, 0x7779, 0xD4AA, 0x79B1, 0xD4AB, 0x7A3B, 0xD4AC, 0x8404, + 0xD4AD, 0x89A9, 0xD4AE, 0x8CED, 0xD4AF, 0x8DF3, 0xD4B0, 0x8E48, + 0xD4B1, 0x9003, 0xD4B2, 0x9014, 0xD4B3, 0x9053, 0xD4B4, 0x90FD, + 0xD4B5, 0x934D, 0xD4B6, 0x9676, 0xD4B7, 0x97DC, 0xD4B8, 0x6BD2, + 0xD4B9, 0x7006, 0xD4BA, 0x7258, 0xD4BB, 0x72A2, 0xD4BC, 0x7368, + 0xD4BD, 0x7763, 0xD4BE, 0x79BF, 0xD4BF, 0x7BE4, 0xD4C0, 0x7E9B, + 0xD4C1, 0x8B80, 0xD4C2, 0x58A9, 0xD4C3, 0x60C7, 0xD4C4, 0x6566, + 0xD4C5, 0x65FD, 0xD4C6, 0x66BE, 0xD4C7, 0x6C8C, 0xD4C8, 0x711E, + 0xD4C9, 0x71C9, 0xD4CA, 0x8C5A, 0xD4CB, 0x9813, 0xD4CC, 0x4E6D, + 0xD4CD, 0x7A81, 0xD4CE, 0x4EDD, 0xD4CF, 0x51AC, 0xD4D0, 0x51CD, + 0xD4D1, 0x52D5, 0xD4D2, 0x540C, 0xD4D3, 0x61A7, 0xD4D4, 0x6771, + 0xD4D5, 0x6850, 0xD4D6, 0x68DF, 0xD4D7, 0x6D1E, 0xD4D8, 0x6F7C, + 0xD4D9, 0x75BC, 0xD4DA, 0x77B3, 0xD4DB, 0x7AE5, 0xD4DC, 0x80F4, + 0xD4DD, 0x8463, 0xD4DE, 0x9285, 0xD4DF, 0x515C, 0xD4E0, 0x6597, + 0xD4E1, 0x675C, 0xD4E2, 0x6793, 0xD4E3, 0x75D8, 0xD4E4, 0x7AC7, + 0xD4E5, 0x8373, 0xD4E6, 0xF95A, 0xD4E7, 0x8C46, 0xD4E8, 0x9017, + 0xD4E9, 0x982D, 0xD4EA, 0x5C6F, 0xD4EB, 0x81C0, 0xD4EC, 0x829A, + 0xD4ED, 0x9041, 0xD4EE, 0x906F, 0xD4EF, 0x920D, 0xD4F0, 0x5F97, + 0xD4F1, 0x5D9D, 0xD4F2, 0x6A59, 0xD4F3, 0x71C8, 0xD4F4, 0x767B, + 0xD4F5, 0x7B49, 0xD4F6, 0x85E4, 0xD4F7, 0x8B04, 0xD4F8, 0x9127, + 0xD4F9, 0x9A30, 0xD4FA, 0x5587, 0xD4FB, 0x61F6, 0xD4FC, 0xF95B, + 0xD4FD, 0x7669, 0xD4FE, 0x7F85, 0xD5A1, 0x863F, 0xD5A2, 0x87BA, + 0xD5A3, 0x88F8, 0xD5A4, 0x908F, 0xD5A5, 0xF95C, 0xD5A6, 0x6D1B, + 0xD5A7, 0x70D9, 0xD5A8, 0x73DE, 0xD5A9, 0x7D61, 0xD5AA, 0x843D, + 0xD5AB, 0xF95D, 0xD5AC, 0x916A, 0xD5AD, 0x99F1, 0xD5AE, 0xF95E, + 0xD5AF, 0x4E82, 0xD5B0, 0x5375, 0xD5B1, 0x6B04, 0xD5B2, 0x6B12, + 0xD5B3, 0x703E, 0xD5B4, 0x721B, 0xD5B5, 0x862D, 0xD5B6, 0x9E1E, + 0xD5B7, 0x524C, 0xD5B8, 0x8FA3, 0xD5B9, 0x5D50, 0xD5BA, 0x64E5, + 0xD5BB, 0x652C, 0xD5BC, 0x6B16, 0xD5BD, 0x6FEB, 0xD5BE, 0x7C43, + 0xD5BF, 0x7E9C, 0xD5C0, 0x85CD, 0xD5C1, 0x8964, 0xD5C2, 0x89BD, + 0xD5C3, 0x62C9, 0xD5C4, 0x81D8, 0xD5C5, 0x881F, 0xD5C6, 0x5ECA, + 0xD5C7, 0x6717, 0xD5C8, 0x6D6A, 0xD5C9, 0x72FC, 0xD5CA, 0x7405, + 0xD5CB, 0x746F, 0xD5CC, 0x8782, 0xD5CD, 0x90DE, 0xD5CE, 0x4F86, + 0xD5CF, 0x5D0D, 0xD5D0, 0x5FA0, 0xD5D1, 0x840A, 0xD5D2, 0x51B7, + 0xD5D3, 0x63A0, 0xD5D4, 0x7565, 0xD5D5, 0x4EAE, 0xD5D6, 0x5006, + 0xD5D7, 0x5169, 0xD5D8, 0x51C9, 0xD5D9, 0x6881, 0xD5DA, 0x6A11, + 0xD5DB, 0x7CAE, 0xD5DC, 0x7CB1, 0xD5DD, 0x7CE7, 0xD5DE, 0x826F, + 0xD5DF, 0x8AD2, 0xD5E0, 0x8F1B, 0xD5E1, 0x91CF, 0xD5E2, 0x4FB6, + 0xD5E3, 0x5137, 0xD5E4, 0x52F5, 0xD5E5, 0x5442, 0xD5E6, 0x5EEC, + 0xD5E7, 0x616E, 0xD5E8, 0x623E, 0xD5E9, 0x65C5, 0xD5EA, 0x6ADA, + 0xD5EB, 0x6FFE, 0xD5EC, 0x792A, 0xD5ED, 0x85DC, 0xD5EE, 0x8823, + 0xD5EF, 0x95AD, 0xD5F0, 0x9A62, 0xD5F1, 0x9A6A, 0xD5F2, 0x9E97, + 0xD5F3, 0x9ECE, 0xD5F4, 0x529B, 0xD5F5, 0x66C6, 0xD5F6, 0x6B77, + 0xD5F7, 0x701D, 0xD5F8, 0x792B, 0xD5F9, 0x8F62, 0xD5FA, 0x9742, + 0xD5FB, 0x6190, 0xD5FC, 0x6200, 0xD5FD, 0x6523, 0xD5FE, 0x6F23, + 0xD6A1, 0x7149, 0xD6A2, 0x7489, 0xD6A3, 0x7DF4, 0xD6A4, 0x806F, + 0xD6A5, 0x84EE, 0xD6A6, 0x8F26, 0xD6A7, 0x9023, 0xD6A8, 0x934A, + 0xD6A9, 0x51BD, 0xD6AA, 0x5217, 0xD6AB, 0x52A3, 0xD6AC, 0x6D0C, + 0xD6AD, 0x70C8, 0xD6AE, 0x88C2, 0xD6AF, 0x5EC9, 0xD6B0, 0x6582, + 0xD6B1, 0x6BAE, 0xD6B2, 0x6FC2, 0xD6B3, 0x7C3E, 0xD6B4, 0x7375, + 0xD6B5, 0x4EE4, 0xD6B6, 0x4F36, 0xD6B7, 0x56F9, 0xD6B8, 0xF95F, + 0xD6B9, 0x5CBA, 0xD6BA, 0x5DBA, 0xD6BB, 0x601C, 0xD6BC, 0x73B2, + 0xD6BD, 0x7B2D, 0xD6BE, 0x7F9A, 0xD6BF, 0x7FCE, 0xD6C0, 0x8046, + 0xD6C1, 0x901E, 0xD6C2, 0x9234, 0xD6C3, 0x96F6, 0xD6C4, 0x9748, + 0xD6C5, 0x9818, 0xD6C6, 0x9F61, 0xD6C7, 0x4F8B, 0xD6C8, 0x6FA7, + 0xD6C9, 0x79AE, 0xD6CA, 0x91B4, 0xD6CB, 0x96B7, 0xD6CC, 0x52DE, + 0xD6CD, 0xF960, 0xD6CE, 0x6488, 0xD6CF, 0x64C4, 0xD6D0, 0x6AD3, + 0xD6D1, 0x6F5E, 0xD6D2, 0x7018, 0xD6D3, 0x7210, 0xD6D4, 0x76E7, + 0xD6D5, 0x8001, 0xD6D6, 0x8606, 0xD6D7, 0x865C, 0xD6D8, 0x8DEF, + 0xD6D9, 0x8F05, 0xD6DA, 0x9732, 0xD6DB, 0x9B6F, 0xD6DC, 0x9DFA, + 0xD6DD, 0x9E75, 0xD6DE, 0x788C, 0xD6DF, 0x797F, 0xD6E0, 0x7DA0, + 0xD6E1, 0x83C9, 0xD6E2, 0x9304, 0xD6E3, 0x9E7F, 0xD6E4, 0x9E93, + 0xD6E5, 0x8AD6, 0xD6E6, 0x58DF, 0xD6E7, 0x5F04, 0xD6E8, 0x6727, + 0xD6E9, 0x7027, 0xD6EA, 0x74CF, 0xD6EB, 0x7C60, 0xD6EC, 0x807E, + 0xD6ED, 0x5121, 0xD6EE, 0x7028, 0xD6EF, 0x7262, 0xD6F0, 0x78CA, + 0xD6F1, 0x8CC2, 0xD6F2, 0x8CDA, 0xD6F3, 0x8CF4, 0xD6F4, 0x96F7, + 0xD6F5, 0x4E86, 0xD6F6, 0x50DA, 0xD6F7, 0x5BEE, 0xD6F8, 0x5ED6, + 0xD6F9, 0x6599, 0xD6FA, 0x71CE, 0xD6FB, 0x7642, 0xD6FC, 0x77AD, + 0xD6FD, 0x804A, 0xD6FE, 0x84FC, 0xD7A1, 0x907C, 0xD7A2, 0x9B27, + 0xD7A3, 0x9F8D, 0xD7A4, 0x58D8, 0xD7A5, 0x5A41, 0xD7A6, 0x5C62, + 0xD7A7, 0x6A13, 0xD7A8, 0x6DDA, 0xD7A9, 0x6F0F, 0xD7AA, 0x763B, + 0xD7AB, 0x7D2F, 0xD7AC, 0x7E37, 0xD7AD, 0x851E, 0xD7AE, 0x8938, + 0xD7AF, 0x93E4, 0xD7B0, 0x964B, 0xD7B1, 0x5289, 0xD7B2, 0x65D2, + 0xD7B3, 0x67F3, 0xD7B4, 0x69B4, 0xD7B5, 0x6D41, 0xD7B6, 0x6E9C, + 0xD7B7, 0x700F, 0xD7B8, 0x7409, 0xD7B9, 0x7460, 0xD7BA, 0x7559, + 0xD7BB, 0x7624, 0xD7BC, 0x786B, 0xD7BD, 0x8B2C, 0xD7BE, 0x985E, + 0xD7BF, 0x516D, 0xD7C0, 0x622E, 0xD7C1, 0x9678, 0xD7C2, 0x4F96, + 0xD7C3, 0x502B, 0xD7C4, 0x5D19, 0xD7C5, 0x6DEA, 0xD7C6, 0x7DB8, + 0xD7C7, 0x8F2A, 0xD7C8, 0x5F8B, 0xD7C9, 0x6144, 0xD7CA, 0x6817, + 0xD7CB, 0xF961, 0xD7CC, 0x9686, 0xD7CD, 0x52D2, 0xD7CE, 0x808B, + 0xD7CF, 0x51DC, 0xD7D0, 0x51CC, 0xD7D1, 0x695E, 0xD7D2, 0x7A1C, + 0xD7D3, 0x7DBE, 0xD7D4, 0x83F1, 0xD7D5, 0x9675, 0xD7D6, 0x4FDA, + 0xD7D7, 0x5229, 0xD7D8, 0x5398, 0xD7D9, 0x540F, 0xD7DA, 0x550E, + 0xD7DB, 0x5C65, 0xD7DC, 0x60A7, 0xD7DD, 0x674E, 0xD7DE, 0x68A8, + 0xD7DF, 0x6D6C, 0xD7E0, 0x7281, 0xD7E1, 0x72F8, 0xD7E2, 0x7406, + 0xD7E3, 0x7483, 0xD7E4, 0xF962, 0xD7E5, 0x75E2, 0xD7E6, 0x7C6C, + 0xD7E7, 0x7F79, 0xD7E8, 0x7FB8, 0xD7E9, 0x8389, 0xD7EA, 0x88CF, + 0xD7EB, 0x88E1, 0xD7EC, 0x91CC, 0xD7ED, 0x91D0, 0xD7EE, 0x96E2, + 0xD7EF, 0x9BC9, 0xD7F0, 0x541D, 0xD7F1, 0x6F7E, 0xD7F2, 0x71D0, + 0xD7F3, 0x7498, 0xD7F4, 0x85FA, 0xD7F5, 0x8EAA, 0xD7F6, 0x96A3, + 0xD7F7, 0x9C57, 0xD7F8, 0x9E9F, 0xD7F9, 0x6797, 0xD7FA, 0x6DCB, + 0xD7FB, 0x7433, 0xD7FC, 0x81E8, 0xD7FD, 0x9716, 0xD7FE, 0x782C, + 0xD8A1, 0x7ACB, 0xD8A2, 0x7B20, 0xD8A3, 0x7C92, 0xD8A4, 0x6469, + 0xD8A5, 0x746A, 0xD8A6, 0x75F2, 0xD8A7, 0x78BC, 0xD8A8, 0x78E8, + 0xD8A9, 0x99AC, 0xD8AA, 0x9B54, 0xD8AB, 0x9EBB, 0xD8AC, 0x5BDE, + 0xD8AD, 0x5E55, 0xD8AE, 0x6F20, 0xD8AF, 0x819C, 0xD8B0, 0x83AB, + 0xD8B1, 0x9088, 0xD8B2, 0x4E07, 0xD8B3, 0x534D, 0xD8B4, 0x5A29, + 0xD8B5, 0x5DD2, 0xD8B6, 0x5F4E, 0xD8B7, 0x6162, 0xD8B8, 0x633D, + 0xD8B9, 0x6669, 0xD8BA, 0x66FC, 0xD8BB, 0x6EFF, 0xD8BC, 0x6F2B, + 0xD8BD, 0x7063, 0xD8BE, 0x779E, 0xD8BF, 0x842C, 0xD8C0, 0x8513, + 0xD8C1, 0x883B, 0xD8C2, 0x8F13, 0xD8C3, 0x9945, 0xD8C4, 0x9C3B, + 0xD8C5, 0x551C, 0xD8C6, 0x62B9, 0xD8C7, 0x672B, 0xD8C8, 0x6CAB, + 0xD8C9, 0x8309, 0xD8CA, 0x896A, 0xD8CB, 0x977A, 0xD8CC, 0x4EA1, + 0xD8CD, 0x5984, 0xD8CE, 0x5FD8, 0xD8CF, 0x5FD9, 0xD8D0, 0x671B, + 0xD8D1, 0x7DB2, 0xD8D2, 0x7F54, 0xD8D3, 0x8292, 0xD8D4, 0x832B, + 0xD8D5, 0x83BD, 0xD8D6, 0x8F1E, 0xD8D7, 0x9099, 0xD8D8, 0x57CB, + 0xD8D9, 0x59B9, 0xD8DA, 0x5A92, 0xD8DB, 0x5BD0, 0xD8DC, 0x6627, + 0xD8DD, 0x679A, 0xD8DE, 0x6885, 0xD8DF, 0x6BCF, 0xD8E0, 0x7164, + 0xD8E1, 0x7F75, 0xD8E2, 0x8CB7, 0xD8E3, 0x8CE3, 0xD8E4, 0x9081, + 0xD8E5, 0x9B45, 0xD8E6, 0x8108, 0xD8E7, 0x8C8A, 0xD8E8, 0x964C, + 0xD8E9, 0x9A40, 0xD8EA, 0x9EA5, 0xD8EB, 0x5B5F, 0xD8EC, 0x6C13, + 0xD8ED, 0x731B, 0xD8EE, 0x76F2, 0xD8EF, 0x76DF, 0xD8F0, 0x840C, + 0xD8F1, 0x51AA, 0xD8F2, 0x8993, 0xD8F3, 0x514D, 0xD8F4, 0x5195, + 0xD8F5, 0x52C9, 0xD8F6, 0x68C9, 0xD8F7, 0x6C94, 0xD8F8, 0x7704, + 0xD8F9, 0x7720, 0xD8FA, 0x7DBF, 0xD8FB, 0x7DEC, 0xD8FC, 0x9762, + 0xD8FD, 0x9EB5, 0xD8FE, 0x6EC5, 0xD9A1, 0x8511, 0xD9A2, 0x51A5, + 0xD9A3, 0x540D, 0xD9A4, 0x547D, 0xD9A5, 0x660E, 0xD9A6, 0x669D, + 0xD9A7, 0x6927, 0xD9A8, 0x6E9F, 0xD9A9, 0x76BF, 0xD9AA, 0x7791, + 0xD9AB, 0x8317, 0xD9AC, 0x84C2, 0xD9AD, 0x879F, 0xD9AE, 0x9169, + 0xD9AF, 0x9298, 0xD9B0, 0x9CF4, 0xD9B1, 0x8882, 0xD9B2, 0x4FAE, + 0xD9B3, 0x5192, 0xD9B4, 0x52DF, 0xD9B5, 0x59C6, 0xD9B6, 0x5E3D, + 0xD9B7, 0x6155, 0xD9B8, 0x6478, 0xD9B9, 0x6479, 0xD9BA, 0x66AE, + 0xD9BB, 0x67D0, 0xD9BC, 0x6A21, 0xD9BD, 0x6BCD, 0xD9BE, 0x6BDB, + 0xD9BF, 0x725F, 0xD9C0, 0x7261, 0xD9C1, 0x7441, 0xD9C2, 0x7738, + 0xD9C3, 0x77DB, 0xD9C4, 0x8017, 0xD9C5, 0x82BC, 0xD9C6, 0x8305, + 0xD9C7, 0x8B00, 0xD9C8, 0x8B28, 0xD9C9, 0x8C8C, 0xD9CA, 0x6728, + 0xD9CB, 0x6C90, 0xD9CC, 0x7267, 0xD9CD, 0x76EE, 0xD9CE, 0x7766, + 0xD9CF, 0x7A46, 0xD9D0, 0x9DA9, 0xD9D1, 0x6B7F, 0xD9D2, 0x6C92, + 0xD9D3, 0x5922, 0xD9D4, 0x6726, 0xD9D5, 0x8499, 0xD9D6, 0x536F, + 0xD9D7, 0x5893, 0xD9D8, 0x5999, 0xD9D9, 0x5EDF, 0xD9DA, 0x63CF, + 0xD9DB, 0x6634, 0xD9DC, 0x6773, 0xD9DD, 0x6E3A, 0xD9DE, 0x732B, + 0xD9DF, 0x7AD7, 0xD9E0, 0x82D7, 0xD9E1, 0x9328, 0xD9E2, 0x52D9, + 0xD9E3, 0x5DEB, 0xD9E4, 0x61AE, 0xD9E5, 0x61CB, 0xD9E6, 0x620A, + 0xD9E7, 0x62C7, 0xD9E8, 0x64AB, 0xD9E9, 0x65E0, 0xD9EA, 0x6959, + 0xD9EB, 0x6B66, 0xD9EC, 0x6BCB, 0xD9ED, 0x7121, 0xD9EE, 0x73F7, + 0xD9EF, 0x755D, 0xD9F0, 0x7E46, 0xD9F1, 0x821E, 0xD9F2, 0x8302, + 0xD9F3, 0x856A, 0xD9F4, 0x8AA3, 0xD9F5, 0x8CBF, 0xD9F6, 0x9727, + 0xD9F7, 0x9D61, 0xD9F8, 0x58A8, 0xD9F9, 0x9ED8, 0xD9FA, 0x5011, + 0xD9FB, 0x520E, 0xD9FC, 0x543B, 0xD9FD, 0x554F, 0xD9FE, 0x6587, + 0xDAA1, 0x6C76, 0xDAA2, 0x7D0A, 0xDAA3, 0x7D0B, 0xDAA4, 0x805E, + 0xDAA5, 0x868A, 0xDAA6, 0x9580, 0xDAA7, 0x96EF, 0xDAA8, 0x52FF, + 0xDAA9, 0x6C95, 0xDAAA, 0x7269, 0xDAAB, 0x5473, 0xDAAC, 0x5A9A, + 0xDAAD, 0x5C3E, 0xDAAE, 0x5D4B, 0xDAAF, 0x5F4C, 0xDAB0, 0x5FAE, + 0xDAB1, 0x672A, 0xDAB2, 0x68B6, 0xDAB3, 0x6963, 0xDAB4, 0x6E3C, + 0xDAB5, 0x6E44, 0xDAB6, 0x7709, 0xDAB7, 0x7C73, 0xDAB8, 0x7F8E, + 0xDAB9, 0x8587, 0xDABA, 0x8B0E, 0xDABB, 0x8FF7, 0xDABC, 0x9761, + 0xDABD, 0x9EF4, 0xDABE, 0x5CB7, 0xDABF, 0x60B6, 0xDAC0, 0x610D, + 0xDAC1, 0x61AB, 0xDAC2, 0x654F, 0xDAC3, 0x65FB, 0xDAC4, 0x65FC, + 0xDAC5, 0x6C11, 0xDAC6, 0x6CEF, 0xDAC7, 0x739F, 0xDAC8, 0x73C9, + 0xDAC9, 0x7DE1, 0xDACA, 0x9594, 0xDACB, 0x5BC6, 0xDACC, 0x871C, + 0xDACD, 0x8B10, 0xDACE, 0x525D, 0xDACF, 0x535A, 0xDAD0, 0x62CD, + 0xDAD1, 0x640F, 0xDAD2, 0x64B2, 0xDAD3, 0x6734, 0xDAD4, 0x6A38, + 0xDAD5, 0x6CCA, 0xDAD6, 0x73C0, 0xDAD7, 0x749E, 0xDAD8, 0x7B94, + 0xDAD9, 0x7C95, 0xDADA, 0x7E1B, 0xDADB, 0x818A, 0xDADC, 0x8236, + 0xDADD, 0x8584, 0xDADE, 0x8FEB, 0xDADF, 0x96F9, 0xDAE0, 0x99C1, + 0xDAE1, 0x4F34, 0xDAE2, 0x534A, 0xDAE3, 0x53CD, 0xDAE4, 0x53DB, + 0xDAE5, 0x62CC, 0xDAE6, 0x642C, 0xDAE7, 0x6500, 0xDAE8, 0x6591, + 0xDAE9, 0x69C3, 0xDAEA, 0x6CEE, 0xDAEB, 0x6F58, 0xDAEC, 0x73ED, + 0xDAED, 0x7554, 0xDAEE, 0x7622, 0xDAEF, 0x76E4, 0xDAF0, 0x76FC, + 0xDAF1, 0x78D0, 0xDAF2, 0x78FB, 0xDAF3, 0x792C, 0xDAF4, 0x7D46, + 0xDAF5, 0x822C, 0xDAF6, 0x87E0, 0xDAF7, 0x8FD4, 0xDAF8, 0x9812, + 0xDAF9, 0x98EF, 0xDAFA, 0x52C3, 0xDAFB, 0x62D4, 0xDAFC, 0x64A5, + 0xDAFD, 0x6E24, 0xDAFE, 0x6F51, 0xDBA1, 0x767C, 0xDBA2, 0x8DCB, + 0xDBA3, 0x91B1, 0xDBA4, 0x9262, 0xDBA5, 0x9AEE, 0xDBA6, 0x9B43, + 0xDBA7, 0x5023, 0xDBA8, 0x508D, 0xDBA9, 0x574A, 0xDBAA, 0x59A8, + 0xDBAB, 0x5C28, 0xDBAC, 0x5E47, 0xDBAD, 0x5F77, 0xDBAE, 0x623F, + 0xDBAF, 0x653E, 0xDBB0, 0x65B9, 0xDBB1, 0x65C1, 0xDBB2, 0x6609, + 0xDBB3, 0x678B, 0xDBB4, 0x699C, 0xDBB5, 0x6EC2, 0xDBB6, 0x78C5, + 0xDBB7, 0x7D21, 0xDBB8, 0x80AA, 0xDBB9, 0x8180, 0xDBBA, 0x822B, + 0xDBBB, 0x82B3, 0xDBBC, 0x84A1, 0xDBBD, 0x868C, 0xDBBE, 0x8A2A, + 0xDBBF, 0x8B17, 0xDBC0, 0x90A6, 0xDBC1, 0x9632, 0xDBC2, 0x9F90, + 0xDBC3, 0x500D, 0xDBC4, 0x4FF3, 0xDBC5, 0xF963, 0xDBC6, 0x57F9, + 0xDBC7, 0x5F98, 0xDBC8, 0x62DC, 0xDBC9, 0x6392, 0xDBCA, 0x676F, + 0xDBCB, 0x6E43, 0xDBCC, 0x7119, 0xDBCD, 0x76C3, 0xDBCE, 0x80CC, + 0xDBCF, 0x80DA, 0xDBD0, 0x88F4, 0xDBD1, 0x88F5, 0xDBD2, 0x8919, + 0xDBD3, 0x8CE0, 0xDBD4, 0x8F29, 0xDBD5, 0x914D, 0xDBD6, 0x966A, + 0xDBD7, 0x4F2F, 0xDBD8, 0x4F70, 0xDBD9, 0x5E1B, 0xDBDA, 0x67CF, + 0xDBDB, 0x6822, 0xDBDC, 0x767D, 0xDBDD, 0x767E, 0xDBDE, 0x9B44, + 0xDBDF, 0x5E61, 0xDBE0, 0x6A0A, 0xDBE1, 0x7169, 0xDBE2, 0x71D4, + 0xDBE3, 0x756A, 0xDBE4, 0xF964, 0xDBE5, 0x7E41, 0xDBE6, 0x8543, + 0xDBE7, 0x85E9, 0xDBE8, 0x98DC, 0xDBE9, 0x4F10, 0xDBEA, 0x7B4F, + 0xDBEB, 0x7F70, 0xDBEC, 0x95A5, 0xDBED, 0x51E1, 0xDBEE, 0x5E06, + 0xDBEF, 0x68B5, 0xDBF0, 0x6C3E, 0xDBF1, 0x6C4E, 0xDBF2, 0x6CDB, + 0xDBF3, 0x72AF, 0xDBF4, 0x7BC4, 0xDBF5, 0x8303, 0xDBF6, 0x6CD5, + 0xDBF7, 0x743A, 0xDBF8, 0x50FB, 0xDBF9, 0x5288, 0xDBFA, 0x58C1, + 0xDBFB, 0x64D8, 0xDBFC, 0x6A97, 0xDBFD, 0x74A7, 0xDBFE, 0x7656, + 0xDCA1, 0x78A7, 0xDCA2, 0x8617, 0xDCA3, 0x95E2, 0xDCA4, 0x9739, + 0xDCA5, 0xF965, 0xDCA6, 0x535E, 0xDCA7, 0x5F01, 0xDCA8, 0x8B8A, + 0xDCA9, 0x8FA8, 0xDCAA, 0x8FAF, 0xDCAB, 0x908A, 0xDCAC, 0x5225, + 0xDCAD, 0x77A5, 0xDCAE, 0x9C49, 0xDCAF, 0x9F08, 0xDCB0, 0x4E19, + 0xDCB1, 0x5002, 0xDCB2, 0x5175, 0xDCB3, 0x5C5B, 0xDCB4, 0x5E77, + 0xDCB5, 0x661E, 0xDCB6, 0x663A, 0xDCB7, 0x67C4, 0xDCB8, 0x68C5, + 0xDCB9, 0x70B3, 0xDCBA, 0x7501, 0xDCBB, 0x75C5, 0xDCBC, 0x79C9, + 0xDCBD, 0x7ADD, 0xDCBE, 0x8F27, 0xDCBF, 0x9920, 0xDCC0, 0x9A08, + 0xDCC1, 0x4FDD, 0xDCC2, 0x5821, 0xDCC3, 0x5831, 0xDCC4, 0x5BF6, + 0xDCC5, 0x666E, 0xDCC6, 0x6B65, 0xDCC7, 0x6D11, 0xDCC8, 0x6E7A, + 0xDCC9, 0x6F7D, 0xDCCA, 0x73E4, 0xDCCB, 0x752B, 0xDCCC, 0x83E9, + 0xDCCD, 0x88DC, 0xDCCE, 0x8913, 0xDCCF, 0x8B5C, 0xDCD0, 0x8F14, + 0xDCD1, 0x4F0F, 0xDCD2, 0x50D5, 0xDCD3, 0x5310, 0xDCD4, 0x535C, + 0xDCD5, 0x5B93, 0xDCD6, 0x5FA9, 0xDCD7, 0x670D, 0xDCD8, 0x798F, + 0xDCD9, 0x8179, 0xDCDA, 0x832F, 0xDCDB, 0x8514, 0xDCDC, 0x8907, + 0xDCDD, 0x8986, 0xDCDE, 0x8F39, 0xDCDF, 0x8F3B, 0xDCE0, 0x99A5, + 0xDCE1, 0x9C12, 0xDCE2, 0x672C, 0xDCE3, 0x4E76, 0xDCE4, 0x4FF8, + 0xDCE5, 0x5949, 0xDCE6, 0x5C01, 0xDCE7, 0x5CEF, 0xDCE8, 0x5CF0, + 0xDCE9, 0x6367, 0xDCEA, 0x68D2, 0xDCEB, 0x70FD, 0xDCEC, 0x71A2, + 0xDCED, 0x742B, 0xDCEE, 0x7E2B, 0xDCEF, 0x84EC, 0xDCF0, 0x8702, + 0xDCF1, 0x9022, 0xDCF2, 0x92D2, 0xDCF3, 0x9CF3, 0xDCF4, 0x4E0D, + 0xDCF5, 0x4ED8, 0xDCF6, 0x4FEF, 0xDCF7, 0x5085, 0xDCF8, 0x5256, + 0xDCF9, 0x526F, 0xDCFA, 0x5426, 0xDCFB, 0x5490, 0xDCFC, 0x57E0, + 0xDCFD, 0x592B, 0xDCFE, 0x5A66, 0xDDA1, 0x5B5A, 0xDDA2, 0x5B75, + 0xDDA3, 0x5BCC, 0xDDA4, 0x5E9C, 0xDDA5, 0xF966, 0xDDA6, 0x6276, + 0xDDA7, 0x6577, 0xDDA8, 0x65A7, 0xDDA9, 0x6D6E, 0xDDAA, 0x6EA5, + 0xDDAB, 0x7236, 0xDDAC, 0x7B26, 0xDDAD, 0x7C3F, 0xDDAE, 0x7F36, + 0xDDAF, 0x8150, 0xDDB0, 0x8151, 0xDDB1, 0x819A, 0xDDB2, 0x8240, + 0xDDB3, 0x8299, 0xDDB4, 0x83A9, 0xDDB5, 0x8A03, 0xDDB6, 0x8CA0, + 0xDDB7, 0x8CE6, 0xDDB8, 0x8CFB, 0xDDB9, 0x8D74, 0xDDBA, 0x8DBA, + 0xDDBB, 0x90E8, 0xDDBC, 0x91DC, 0xDDBD, 0x961C, 0xDDBE, 0x9644, + 0xDDBF, 0x99D9, 0xDDC0, 0x9CE7, 0xDDC1, 0x5317, 0xDDC2, 0x5206, + 0xDDC3, 0x5429, 0xDDC4, 0x5674, 0xDDC5, 0x58B3, 0xDDC6, 0x5954, + 0xDDC7, 0x596E, 0xDDC8, 0x5FFF, 0xDDC9, 0x61A4, 0xDDCA, 0x626E, + 0xDDCB, 0x6610, 0xDDCC, 0x6C7E, 0xDDCD, 0x711A, 0xDDCE, 0x76C6, + 0xDDCF, 0x7C89, 0xDDD0, 0x7CDE, 0xDDD1, 0x7D1B, 0xDDD2, 0x82AC, + 0xDDD3, 0x8CC1, 0xDDD4, 0x96F0, 0xDDD5, 0xF967, 0xDDD6, 0x4F5B, + 0xDDD7, 0x5F17, 0xDDD8, 0x5F7F, 0xDDD9, 0x62C2, 0xDDDA, 0x5D29, + 0xDDDB, 0x670B, 0xDDDC, 0x68DA, 0xDDDD, 0x787C, 0xDDDE, 0x7E43, + 0xDDDF, 0x9D6C, 0xDDE0, 0x4E15, 0xDDE1, 0x5099, 0xDDE2, 0x5315, + 0xDDE3, 0x532A, 0xDDE4, 0x5351, 0xDDE5, 0x5983, 0xDDE6, 0x5A62, + 0xDDE7, 0x5E87, 0xDDE8, 0x60B2, 0xDDE9, 0x618A, 0xDDEA, 0x6249, + 0xDDEB, 0x6279, 0xDDEC, 0x6590, 0xDDED, 0x6787, 0xDDEE, 0x69A7, + 0xDDEF, 0x6BD4, 0xDDF0, 0x6BD6, 0xDDF1, 0x6BD7, 0xDDF2, 0x6BD8, + 0xDDF3, 0x6CB8, 0xDDF4, 0xF968, 0xDDF5, 0x7435, 0xDDF6, 0x75FA, + 0xDDF7, 0x7812, 0xDDF8, 0x7891, 0xDDF9, 0x79D5, 0xDDFA, 0x79D8, + 0xDDFB, 0x7C83, 0xDDFC, 0x7DCB, 0xDDFD, 0x7FE1, 0xDDFE, 0x80A5, + 0xDEA1, 0x813E, 0xDEA2, 0x81C2, 0xDEA3, 0x83F2, 0xDEA4, 0x871A, + 0xDEA5, 0x88E8, 0xDEA6, 0x8AB9, 0xDEA7, 0x8B6C, 0xDEA8, 0x8CBB, + 0xDEA9, 0x9119, 0xDEAA, 0x975E, 0xDEAB, 0x98DB, 0xDEAC, 0x9F3B, + 0xDEAD, 0x56AC, 0xDEAE, 0x5B2A, 0xDEAF, 0x5F6C, 0xDEB0, 0x658C, + 0xDEB1, 0x6AB3, 0xDEB2, 0x6BAF, 0xDEB3, 0x6D5C, 0xDEB4, 0x6FF1, + 0xDEB5, 0x7015, 0xDEB6, 0x725D, 0xDEB7, 0x73AD, 0xDEB8, 0x8CA7, + 0xDEB9, 0x8CD3, 0xDEBA, 0x983B, 0xDEBB, 0x6191, 0xDEBC, 0x6C37, + 0xDEBD, 0x8058, 0xDEBE, 0x9A01, 0xDEBF, 0x4E4D, 0xDEC0, 0x4E8B, + 0xDEC1, 0x4E9B, 0xDEC2, 0x4ED5, 0xDEC3, 0x4F3A, 0xDEC4, 0x4F3C, + 0xDEC5, 0x4F7F, 0xDEC6, 0x4FDF, 0xDEC7, 0x50FF, 0xDEC8, 0x53F2, + 0xDEC9, 0x53F8, 0xDECA, 0x5506, 0xDECB, 0x55E3, 0xDECC, 0x56DB, + 0xDECD, 0x58EB, 0xDECE, 0x5962, 0xDECF, 0x5A11, 0xDED0, 0x5BEB, + 0xDED1, 0x5BFA, 0xDED2, 0x5C04, 0xDED3, 0x5DF3, 0xDED4, 0x5E2B, + 0xDED5, 0x5F99, 0xDED6, 0x601D, 0xDED7, 0x6368, 0xDED8, 0x659C, + 0xDED9, 0x65AF, 0xDEDA, 0x67F6, 0xDEDB, 0x67FB, 0xDEDC, 0x68AD, + 0xDEDD, 0x6B7B, 0xDEDE, 0x6C99, 0xDEDF, 0x6CD7, 0xDEE0, 0x6E23, + 0xDEE1, 0x7009, 0xDEE2, 0x7345, 0xDEE3, 0x7802, 0xDEE4, 0x793E, + 0xDEE5, 0x7940, 0xDEE6, 0x7960, 0xDEE7, 0x79C1, 0xDEE8, 0x7BE9, + 0xDEE9, 0x7D17, 0xDEEA, 0x7D72, 0xDEEB, 0x8086, 0xDEEC, 0x820D, + 0xDEED, 0x838E, 0xDEEE, 0x84D1, 0xDEEF, 0x86C7, 0xDEF0, 0x88DF, + 0xDEF1, 0x8A50, 0xDEF2, 0x8A5E, 0xDEF3, 0x8B1D, 0xDEF4, 0x8CDC, + 0xDEF5, 0x8D66, 0xDEF6, 0x8FAD, 0xDEF7, 0x90AA, 0xDEF8, 0x98FC, + 0xDEF9, 0x99DF, 0xDEFA, 0x9E9D, 0xDEFB, 0x524A, 0xDEFC, 0xF969, + 0xDEFD, 0x6714, 0xDEFE, 0xF96A, 0xDFA1, 0x5098, 0xDFA2, 0x522A, + 0xDFA3, 0x5C71, 0xDFA4, 0x6563, 0xDFA5, 0x6C55, 0xDFA6, 0x73CA, + 0xDFA7, 0x7523, 0xDFA8, 0x759D, 0xDFA9, 0x7B97, 0xDFAA, 0x849C, + 0xDFAB, 0x9178, 0xDFAC, 0x9730, 0xDFAD, 0x4E77, 0xDFAE, 0x6492, + 0xDFAF, 0x6BBA, 0xDFB0, 0x715E, 0xDFB1, 0x85A9, 0xDFB2, 0x4E09, + 0xDFB3, 0xF96B, 0xDFB4, 0x6749, 0xDFB5, 0x68EE, 0xDFB6, 0x6E17, + 0xDFB7, 0x829F, 0xDFB8, 0x8518, 0xDFB9, 0x886B, 0xDFBA, 0x63F7, + 0xDFBB, 0x6F81, 0xDFBC, 0x9212, 0xDFBD, 0x98AF, 0xDFBE, 0x4E0A, + 0xDFBF, 0x50B7, 0xDFC0, 0x50CF, 0xDFC1, 0x511F, 0xDFC2, 0x5546, + 0xDFC3, 0x55AA, 0xDFC4, 0x5617, 0xDFC5, 0x5B40, 0xDFC6, 0x5C19, + 0xDFC7, 0x5CE0, 0xDFC8, 0x5E38, 0xDFC9, 0x5E8A, 0xDFCA, 0x5EA0, + 0xDFCB, 0x5EC2, 0xDFCC, 0x60F3, 0xDFCD, 0x6851, 0xDFCE, 0x6A61, + 0xDFCF, 0x6E58, 0xDFD0, 0x723D, 0xDFD1, 0x7240, 0xDFD2, 0x72C0, + 0xDFD3, 0x76F8, 0xDFD4, 0x7965, 0xDFD5, 0x7BB1, 0xDFD6, 0x7FD4, + 0xDFD7, 0x88F3, 0xDFD8, 0x89F4, 0xDFD9, 0x8A73, 0xDFDA, 0x8C61, + 0xDFDB, 0x8CDE, 0xDFDC, 0x971C, 0xDFDD, 0x585E, 0xDFDE, 0x74BD, + 0xDFDF, 0x8CFD, 0xDFE0, 0x55C7, 0xDFE1, 0xF96C, 0xDFE2, 0x7A61, + 0xDFE3, 0x7D22, 0xDFE4, 0x8272, 0xDFE5, 0x7272, 0xDFE6, 0x751F, + 0xDFE7, 0x7525, 0xDFE8, 0xF96D, 0xDFE9, 0x7B19, 0xDFEA, 0x5885, + 0xDFEB, 0x58FB, 0xDFEC, 0x5DBC, 0xDFED, 0x5E8F, 0xDFEE, 0x5EB6, + 0xDFEF, 0x5F90, 0xDFF0, 0x6055, 0xDFF1, 0x6292, 0xDFF2, 0x637F, + 0xDFF3, 0x654D, 0xDFF4, 0x6691, 0xDFF5, 0x66D9, 0xDFF6, 0x66F8, + 0xDFF7, 0x6816, 0xDFF8, 0x68F2, 0xDFF9, 0x7280, 0xDFFA, 0x745E, + 0xDFFB, 0x7B6E, 0xDFFC, 0x7D6E, 0xDFFD, 0x7DD6, 0xDFFE, 0x7F72, + 0xE0A1, 0x80E5, 0xE0A2, 0x8212, 0xE0A3, 0x85AF, 0xE0A4, 0x897F, + 0xE0A5, 0x8A93, 0xE0A6, 0x901D, 0xE0A7, 0x92E4, 0xE0A8, 0x9ECD, + 0xE0A9, 0x9F20, 0xE0AA, 0x5915, 0xE0AB, 0x596D, 0xE0AC, 0x5E2D, + 0xE0AD, 0x60DC, 0xE0AE, 0x6614, 0xE0AF, 0x6673, 0xE0B0, 0x6790, + 0xE0B1, 0x6C50, 0xE0B2, 0x6DC5, 0xE0B3, 0x6F5F, 0xE0B4, 0x77F3, + 0xE0B5, 0x78A9, 0xE0B6, 0x84C6, 0xE0B7, 0x91CB, 0xE0B8, 0x932B, + 0xE0B9, 0x4ED9, 0xE0BA, 0x50CA, 0xE0BB, 0x5148, 0xE0BC, 0x5584, + 0xE0BD, 0x5B0B, 0xE0BE, 0x5BA3, 0xE0BF, 0x6247, 0xE0C0, 0x657E, + 0xE0C1, 0x65CB, 0xE0C2, 0x6E32, 0xE0C3, 0x717D, 0xE0C4, 0x7401, + 0xE0C5, 0x7444, 0xE0C6, 0x7487, 0xE0C7, 0x74BF, 0xE0C8, 0x766C, + 0xE0C9, 0x79AA, 0xE0CA, 0x7DDA, 0xE0CB, 0x7E55, 0xE0CC, 0x7FA8, + 0xE0CD, 0x817A, 0xE0CE, 0x81B3, 0xE0CF, 0x8239, 0xE0D0, 0x861A, + 0xE0D1, 0x87EC, 0xE0D2, 0x8A75, 0xE0D3, 0x8DE3, 0xE0D4, 0x9078, + 0xE0D5, 0x9291, 0xE0D6, 0x9425, 0xE0D7, 0x994D, 0xE0D8, 0x9BAE, + 0xE0D9, 0x5368, 0xE0DA, 0x5C51, 0xE0DB, 0x6954, 0xE0DC, 0x6CC4, + 0xE0DD, 0x6D29, 0xE0DE, 0x6E2B, 0xE0DF, 0x820C, 0xE0E0, 0x859B, + 0xE0E1, 0x893B, 0xE0E2, 0x8A2D, 0xE0E3, 0x8AAA, 0xE0E4, 0x96EA, + 0xE0E5, 0x9F67, 0xE0E6, 0x5261, 0xE0E7, 0x66B9, 0xE0E8, 0x6BB2, + 0xE0E9, 0x7E96, 0xE0EA, 0x87FE, 0xE0EB, 0x8D0D, 0xE0EC, 0x9583, + 0xE0ED, 0x965D, 0xE0EE, 0x651D, 0xE0EF, 0x6D89, 0xE0F0, 0x71EE, + 0xE0F1, 0xF96E, 0xE0F2, 0x57CE, 0xE0F3, 0x59D3, 0xE0F4, 0x5BAC, + 0xE0F5, 0x6027, 0xE0F6, 0x60FA, 0xE0F7, 0x6210, 0xE0F8, 0x661F, + 0xE0F9, 0x665F, 0xE0FA, 0x7329, 0xE0FB, 0x73F9, 0xE0FC, 0x76DB, + 0xE0FD, 0x7701, 0xE0FE, 0x7B6C, 0xE1A1, 0x8056, 0xE1A2, 0x8072, + 0xE1A3, 0x8165, 0xE1A4, 0x8AA0, 0xE1A5, 0x9192, 0xE1A6, 0x4E16, + 0xE1A7, 0x52E2, 0xE1A8, 0x6B72, 0xE1A9, 0x6D17, 0xE1AA, 0x7A05, + 0xE1AB, 0x7B39, 0xE1AC, 0x7D30, 0xE1AD, 0xF96F, 0xE1AE, 0x8CB0, + 0xE1AF, 0x53EC, 0xE1B0, 0x562F, 0xE1B1, 0x5851, 0xE1B2, 0x5BB5, + 0xE1B3, 0x5C0F, 0xE1B4, 0x5C11, 0xE1B5, 0x5DE2, 0xE1B6, 0x6240, + 0xE1B7, 0x6383, 0xE1B8, 0x6414, 0xE1B9, 0x662D, 0xE1BA, 0x68B3, + 0xE1BB, 0x6CBC, 0xE1BC, 0x6D88, 0xE1BD, 0x6EAF, 0xE1BE, 0x701F, + 0xE1BF, 0x70A4, 0xE1C0, 0x71D2, 0xE1C1, 0x7526, 0xE1C2, 0x758F, + 0xE1C3, 0x758E, 0xE1C4, 0x7619, 0xE1C5, 0x7B11, 0xE1C6, 0x7BE0, + 0xE1C7, 0x7C2B, 0xE1C8, 0x7D20, 0xE1C9, 0x7D39, 0xE1CA, 0x852C, + 0xE1CB, 0x856D, 0xE1CC, 0x8607, 0xE1CD, 0x8A34, 0xE1CE, 0x900D, + 0xE1CF, 0x9061, 0xE1D0, 0x90B5, 0xE1D1, 0x92B7, 0xE1D2, 0x97F6, + 0xE1D3, 0x9A37, 0xE1D4, 0x4FD7, 0xE1D5, 0x5C6C, 0xE1D6, 0x675F, + 0xE1D7, 0x6D91, 0xE1D8, 0x7C9F, 0xE1D9, 0x7E8C, 0xE1DA, 0x8B16, + 0xE1DB, 0x8D16, 0xE1DC, 0x901F, 0xE1DD, 0x5B6B, 0xE1DE, 0x5DFD, + 0xE1DF, 0x640D, 0xE1E0, 0x84C0, 0xE1E1, 0x905C, 0xE1E2, 0x98E1, + 0xE1E3, 0x7387, 0xE1E4, 0x5B8B, 0xE1E5, 0x609A, 0xE1E6, 0x677E, + 0xE1E7, 0x6DDE, 0xE1E8, 0x8A1F, 0xE1E9, 0x8AA6, 0xE1EA, 0x9001, + 0xE1EB, 0x980C, 0xE1EC, 0x5237, 0xE1ED, 0xF970, 0xE1EE, 0x7051, + 0xE1EF, 0x788E, 0xE1F0, 0x9396, 0xE1F1, 0x8870, 0xE1F2, 0x91D7, + 0xE1F3, 0x4FEE, 0xE1F4, 0x53D7, 0xE1F5, 0x55FD, 0xE1F6, 0x56DA, + 0xE1F7, 0x5782, 0xE1F8, 0x58FD, 0xE1F9, 0x5AC2, 0xE1FA, 0x5B88, + 0xE1FB, 0x5CAB, 0xE1FC, 0x5CC0, 0xE1FD, 0x5E25, 0xE1FE, 0x6101, + 0xE2A1, 0x620D, 0xE2A2, 0x624B, 0xE2A3, 0x6388, 0xE2A4, 0x641C, + 0xE2A5, 0x6536, 0xE2A6, 0x6578, 0xE2A7, 0x6A39, 0xE2A8, 0x6B8A, + 0xE2A9, 0x6C34, 0xE2AA, 0x6D19, 0xE2AB, 0x6F31, 0xE2AC, 0x71E7, + 0xE2AD, 0x72E9, 0xE2AE, 0x7378, 0xE2AF, 0x7407, 0xE2B0, 0x74B2, + 0xE2B1, 0x7626, 0xE2B2, 0x7761, 0xE2B3, 0x79C0, 0xE2B4, 0x7A57, + 0xE2B5, 0x7AEA, 0xE2B6, 0x7CB9, 0xE2B7, 0x7D8F, 0xE2B8, 0x7DAC, + 0xE2B9, 0x7E61, 0xE2BA, 0x7F9E, 0xE2BB, 0x8129, 0xE2BC, 0x8331, + 0xE2BD, 0x8490, 0xE2BE, 0x84DA, 0xE2BF, 0x85EA, 0xE2C0, 0x8896, + 0xE2C1, 0x8AB0, 0xE2C2, 0x8B90, 0xE2C3, 0x8F38, 0xE2C4, 0x9042, + 0xE2C5, 0x9083, 0xE2C6, 0x916C, 0xE2C7, 0x9296, 0xE2C8, 0x92B9, + 0xE2C9, 0x968B, 0xE2CA, 0x96A7, 0xE2CB, 0x96A8, 0xE2CC, 0x96D6, + 0xE2CD, 0x9700, 0xE2CE, 0x9808, 0xE2CF, 0x9996, 0xE2D0, 0x9AD3, + 0xE2D1, 0x9B1A, 0xE2D2, 0x53D4, 0xE2D3, 0x587E, 0xE2D4, 0x5919, + 0xE2D5, 0x5B70, 0xE2D6, 0x5BBF, 0xE2D7, 0x6DD1, 0xE2D8, 0x6F5A, + 0xE2D9, 0x719F, 0xE2DA, 0x7421, 0xE2DB, 0x74B9, 0xE2DC, 0x8085, + 0xE2DD, 0x83FD, 0xE2DE, 0x5DE1, 0xE2DF, 0x5F87, 0xE2E0, 0x5FAA, + 0xE2E1, 0x6042, 0xE2E2, 0x65EC, 0xE2E3, 0x6812, 0xE2E4, 0x696F, + 0xE2E5, 0x6A53, 0xE2E6, 0x6B89, 0xE2E7, 0x6D35, 0xE2E8, 0x6DF3, + 0xE2E9, 0x73E3, 0xE2EA, 0x76FE, 0xE2EB, 0x77AC, 0xE2EC, 0x7B4D, + 0xE2ED, 0x7D14, 0xE2EE, 0x8123, 0xE2EF, 0x821C, 0xE2F0, 0x8340, + 0xE2F1, 0x84F4, 0xE2F2, 0x8563, 0xE2F3, 0x8A62, 0xE2F4, 0x8AC4, + 0xE2F5, 0x9187, 0xE2F6, 0x931E, 0xE2F7, 0x9806, 0xE2F8, 0x99B4, + 0xE2F9, 0x620C, 0xE2FA, 0x8853, 0xE2FB, 0x8FF0, 0xE2FC, 0x9265, + 0xE2FD, 0x5D07, 0xE2FE, 0x5D27, 0xE3A1, 0x5D69, 0xE3A2, 0x745F, + 0xE3A3, 0x819D, 0xE3A4, 0x8768, 0xE3A5, 0x6FD5, 0xE3A6, 0x62FE, + 0xE3A7, 0x7FD2, 0xE3A8, 0x8936, 0xE3A9, 0x8972, 0xE3AA, 0x4E1E, + 0xE3AB, 0x4E58, 0xE3AC, 0x50E7, 0xE3AD, 0x52DD, 0xE3AE, 0x5347, + 0xE3AF, 0x627F, 0xE3B0, 0x6607, 0xE3B1, 0x7E69, 0xE3B2, 0x8805, + 0xE3B3, 0x965E, 0xE3B4, 0x4F8D, 0xE3B5, 0x5319, 0xE3B6, 0x5636, + 0xE3B7, 0x59CB, 0xE3B8, 0x5AA4, 0xE3B9, 0x5C38, 0xE3BA, 0x5C4E, + 0xE3BB, 0x5C4D, 0xE3BC, 0x5E02, 0xE3BD, 0x5F11, 0xE3BE, 0x6043, + 0xE3BF, 0x65BD, 0xE3C0, 0x662F, 0xE3C1, 0x6642, 0xE3C2, 0x67BE, + 0xE3C3, 0x67F4, 0xE3C4, 0x731C, 0xE3C5, 0x77E2, 0xE3C6, 0x793A, + 0xE3C7, 0x7FC5, 0xE3C8, 0x8494, 0xE3C9, 0x84CD, 0xE3CA, 0x8996, + 0xE3CB, 0x8A66, 0xE3CC, 0x8A69, 0xE3CD, 0x8AE1, 0xE3CE, 0x8C55, + 0xE3CF, 0x8C7A, 0xE3D0, 0x57F4, 0xE3D1, 0x5BD4, 0xE3D2, 0x5F0F, + 0xE3D3, 0x606F, 0xE3D4, 0x62ED, 0xE3D5, 0x690D, 0xE3D6, 0x6B96, + 0xE3D7, 0x6E5C, 0xE3D8, 0x7184, 0xE3D9, 0x7BD2, 0xE3DA, 0x8755, + 0xE3DB, 0x8B58, 0xE3DC, 0x8EFE, 0xE3DD, 0x98DF, 0xE3DE, 0x98FE, + 0xE3DF, 0x4F38, 0xE3E0, 0x4F81, 0xE3E1, 0x4FE1, 0xE3E2, 0x547B, + 0xE3E3, 0x5A20, 0xE3E4, 0x5BB8, 0xE3E5, 0x613C, 0xE3E6, 0x65B0, + 0xE3E7, 0x6668, 0xE3E8, 0x71FC, 0xE3E9, 0x7533, 0xE3EA, 0x795E, + 0xE3EB, 0x7D33, 0xE3EC, 0x814E, 0xE3ED, 0x81E3, 0xE3EE, 0x8398, + 0xE3EF, 0x85AA, 0xE3F0, 0x85CE, 0xE3F1, 0x8703, 0xE3F2, 0x8A0A, + 0xE3F3, 0x8EAB, 0xE3F4, 0x8F9B, 0xE3F5, 0xF971, 0xE3F6, 0x8FC5, + 0xE3F7, 0x5931, 0xE3F8, 0x5BA4, 0xE3F9, 0x5BE6, 0xE3FA, 0x6089, + 0xE3FB, 0x5BE9, 0xE3FC, 0x5C0B, 0xE3FD, 0x5FC3, 0xE3FE, 0x6C81, + 0xE4A1, 0xF972, 0xE4A2, 0x6DF1, 0xE4A3, 0x700B, 0xE4A4, 0x751A, + 0xE4A5, 0x82AF, 0xE4A6, 0x8AF6, 0xE4A7, 0x4EC0, 0xE4A8, 0x5341, + 0xE4A9, 0xF973, 0xE4AA, 0x96D9, 0xE4AB, 0x6C0F, 0xE4AC, 0x4E9E, + 0xE4AD, 0x4FC4, 0xE4AE, 0x5152, 0xE4AF, 0x555E, 0xE4B0, 0x5A25, + 0xE4B1, 0x5CE8, 0xE4B2, 0x6211, 0xE4B3, 0x7259, 0xE4B4, 0x82BD, + 0xE4B5, 0x83AA, 0xE4B6, 0x86FE, 0xE4B7, 0x8859, 0xE4B8, 0x8A1D, + 0xE4B9, 0x963F, 0xE4BA, 0x96C5, 0xE4BB, 0x9913, 0xE4BC, 0x9D09, + 0xE4BD, 0x9D5D, 0xE4BE, 0x580A, 0xE4BF, 0x5CB3, 0xE4C0, 0x5DBD, + 0xE4C1, 0x5E44, 0xE4C2, 0x60E1, 0xE4C3, 0x6115, 0xE4C4, 0x63E1, + 0xE4C5, 0x6A02, 0xE4C6, 0x6E25, 0xE4C7, 0x9102, 0xE4C8, 0x9354, + 0xE4C9, 0x984E, 0xE4CA, 0x9C10, 0xE4CB, 0x9F77, 0xE4CC, 0x5B89, + 0xE4CD, 0x5CB8, 0xE4CE, 0x6309, 0xE4CF, 0x664F, 0xE4D0, 0x6848, + 0xE4D1, 0x773C, 0xE4D2, 0x96C1, 0xE4D3, 0x978D, 0xE4D4, 0x9854, + 0xE4D5, 0x9B9F, 0xE4D6, 0x65A1, 0xE4D7, 0x8B01, 0xE4D8, 0x8ECB, + 0xE4D9, 0x95BC, 0xE4DA, 0x5535, 0xE4DB, 0x5CA9, 0xE4DC, 0x5DD6, + 0xE4DD, 0x5EB5, 0xE4DE, 0x6697, 0xE4DF, 0x764C, 0xE4E0, 0x83F4, + 0xE4E1, 0x95C7, 0xE4E2, 0x58D3, 0xE4E3, 0x62BC, 0xE4E4, 0x72CE, + 0xE4E5, 0x9D28, 0xE4E6, 0x4EF0, 0xE4E7, 0x592E, 0xE4E8, 0x600F, + 0xE4E9, 0x663B, 0xE4EA, 0x6B83, 0xE4EB, 0x79E7, 0xE4EC, 0x9D26, + 0xE4ED, 0x5393, 0xE4EE, 0x54C0, 0xE4EF, 0x57C3, 0xE4F0, 0x5D16, + 0xE4F1, 0x611B, 0xE4F2, 0x66D6, 0xE4F3, 0x6DAF, 0xE4F4, 0x788D, + 0xE4F5, 0x827E, 0xE4F6, 0x9698, 0xE4F7, 0x9744, 0xE4F8, 0x5384, + 0xE4F9, 0x627C, 0xE4FA, 0x6396, 0xE4FB, 0x6DB2, 0xE4FC, 0x7E0A, + 0xE4FD, 0x814B, 0xE4FE, 0x984D, 0xE5A1, 0x6AFB, 0xE5A2, 0x7F4C, + 0xE5A3, 0x9DAF, 0xE5A4, 0x9E1A, 0xE5A5, 0x4E5F, 0xE5A6, 0x503B, + 0xE5A7, 0x51B6, 0xE5A8, 0x591C, 0xE5A9, 0x60F9, 0xE5AA, 0x63F6, + 0xE5AB, 0x6930, 0xE5AC, 0x723A, 0xE5AD, 0x8036, 0xE5AE, 0xF974, + 0xE5AF, 0x91CE, 0xE5B0, 0x5F31, 0xE5B1, 0xF975, 0xE5B2, 0xF976, + 0xE5B3, 0x7D04, 0xE5B4, 0x82E5, 0xE5B5, 0x846F, 0xE5B6, 0x84BB, + 0xE5B7, 0x85E5, 0xE5B8, 0x8E8D, 0xE5B9, 0xF977, 0xE5BA, 0x4F6F, + 0xE5BB, 0xF978, 0xE5BC, 0xF979, 0xE5BD, 0x58E4, 0xE5BE, 0x5B43, + 0xE5BF, 0x6059, 0xE5C0, 0x63DA, 0xE5C1, 0x6518, 0xE5C2, 0x656D, + 0xE5C3, 0x6698, 0xE5C4, 0xF97A, 0xE5C5, 0x694A, 0xE5C6, 0x6A23, + 0xE5C7, 0x6D0B, 0xE5C8, 0x7001, 0xE5C9, 0x716C, 0xE5CA, 0x75D2, + 0xE5CB, 0x760D, 0xE5CC, 0x79B3, 0xE5CD, 0x7A70, 0xE5CE, 0xF97B, + 0xE5CF, 0x7F8A, 0xE5D0, 0xF97C, 0xE5D1, 0x8944, 0xE5D2, 0xF97D, + 0xE5D3, 0x8B93, 0xE5D4, 0x91C0, 0xE5D5, 0x967D, 0xE5D6, 0xF97E, + 0xE5D7, 0x990A, 0xE5D8, 0x5704, 0xE5D9, 0x5FA1, 0xE5DA, 0x65BC, + 0xE5DB, 0x6F01, 0xE5DC, 0x7600, 0xE5DD, 0x79A6, 0xE5DE, 0x8A9E, + 0xE5DF, 0x99AD, 0xE5E0, 0x9B5A, 0xE5E1, 0x9F6C, 0xE5E2, 0x5104, + 0xE5E3, 0x61B6, 0xE5E4, 0x6291, 0xE5E5, 0x6A8D, 0xE5E6, 0x81C6, + 0xE5E7, 0x5043, 0xE5E8, 0x5830, 0xE5E9, 0x5F66, 0xE5EA, 0x7109, + 0xE5EB, 0x8A00, 0xE5EC, 0x8AFA, 0xE5ED, 0x5B7C, 0xE5EE, 0x8616, + 0xE5EF, 0x4FFA, 0xE5F0, 0x513C, 0xE5F1, 0x56B4, 0xE5F2, 0x5944, + 0xE5F3, 0x63A9, 0xE5F4, 0x6DF9, 0xE5F5, 0x5DAA, 0xE5F6, 0x696D, + 0xE5F7, 0x5186, 0xE5F8, 0x4E88, 0xE5F9, 0x4F59, 0xE5FA, 0xF97F, + 0xE5FB, 0xF980, 0xE5FC, 0xF981, 0xE5FD, 0x5982, 0xE5FE, 0xF982, + 0xE6A1, 0xF983, 0xE6A2, 0x6B5F, 0xE6A3, 0x6C5D, 0xE6A4, 0xF984, + 0xE6A5, 0x74B5, 0xE6A6, 0x7916, 0xE6A7, 0xF985, 0xE6A8, 0x8207, + 0xE6A9, 0x8245, 0xE6AA, 0x8339, 0xE6AB, 0x8F3F, 0xE6AC, 0x8F5D, + 0xE6AD, 0xF986, 0xE6AE, 0x9918, 0xE6AF, 0xF987, 0xE6B0, 0xF988, + 0xE6B1, 0xF989, 0xE6B2, 0x4EA6, 0xE6B3, 0xF98A, 0xE6B4, 0x57DF, + 0xE6B5, 0x5F79, 0xE6B6, 0x6613, 0xE6B7, 0xF98B, 0xE6B8, 0xF98C, + 0xE6B9, 0x75AB, 0xE6BA, 0x7E79, 0xE6BB, 0x8B6F, 0xE6BC, 0xF98D, + 0xE6BD, 0x9006, 0xE6BE, 0x9A5B, 0xE6BF, 0x56A5, 0xE6C0, 0x5827, + 0xE6C1, 0x59F8, 0xE6C2, 0x5A1F, 0xE6C3, 0x5BB4, 0xE6C4, 0xF98E, + 0xE6C5, 0x5EF6, 0xE6C6, 0xF98F, 0xE6C7, 0xF990, 0xE6C8, 0x6350, + 0xE6C9, 0x633B, 0xE6CA, 0xF991, 0xE6CB, 0x693D, 0xE6CC, 0x6C87, + 0xE6CD, 0x6CBF, 0xE6CE, 0x6D8E, 0xE6CF, 0x6D93, 0xE6D0, 0x6DF5, + 0xE6D1, 0x6F14, 0xE6D2, 0xF992, 0xE6D3, 0x70DF, 0xE6D4, 0x7136, + 0xE6D5, 0x7159, 0xE6D6, 0xF993, 0xE6D7, 0x71C3, 0xE6D8, 0x71D5, + 0xE6D9, 0xF994, 0xE6DA, 0x784F, 0xE6DB, 0x786F, 0xE6DC, 0xF995, + 0xE6DD, 0x7B75, 0xE6DE, 0x7DE3, 0xE6DF, 0xF996, 0xE6E0, 0x7E2F, + 0xE6E1, 0xF997, 0xE6E2, 0x884D, 0xE6E3, 0x8EDF, 0xE6E4, 0xF998, + 0xE6E5, 0xF999, 0xE6E6, 0xF99A, 0xE6E7, 0x925B, 0xE6E8, 0xF99B, + 0xE6E9, 0x9CF6, 0xE6EA, 0xF99C, 0xE6EB, 0xF99D, 0xE6EC, 0xF99E, + 0xE6ED, 0x6085, 0xE6EE, 0x6D85, 0xE6EF, 0xF99F, 0xE6F0, 0x71B1, + 0xE6F1, 0xF9A0, 0xE6F2, 0xF9A1, 0xE6F3, 0x95B1, 0xE6F4, 0x53AD, + 0xE6F5, 0xF9A2, 0xE6F6, 0xF9A3, 0xE6F7, 0xF9A4, 0xE6F8, 0x67D3, + 0xE6F9, 0xF9A5, 0xE6FA, 0x708E, 0xE6FB, 0x7130, 0xE6FC, 0x7430, + 0xE6FD, 0x8276, 0xE6FE, 0x82D2, 0xE7A1, 0xF9A6, 0xE7A2, 0x95BB, + 0xE7A3, 0x9AE5, 0xE7A4, 0x9E7D, 0xE7A5, 0x66C4, 0xE7A6, 0xF9A7, + 0xE7A7, 0x71C1, 0xE7A8, 0x8449, 0xE7A9, 0xF9A8, 0xE7AA, 0xF9A9, + 0xE7AB, 0x584B, 0xE7AC, 0xF9AA, 0xE7AD, 0xF9AB, 0xE7AE, 0x5DB8, + 0xE7AF, 0x5F71, 0xE7B0, 0xF9AC, 0xE7B1, 0x6620, 0xE7B2, 0x668E, + 0xE7B3, 0x6979, 0xE7B4, 0x69AE, 0xE7B5, 0x6C38, 0xE7B6, 0x6CF3, + 0xE7B7, 0x6E36, 0xE7B8, 0x6F41, 0xE7B9, 0x6FDA, 0xE7BA, 0x701B, + 0xE7BB, 0x702F, 0xE7BC, 0x7150, 0xE7BD, 0x71DF, 0xE7BE, 0x7370, + 0xE7BF, 0xF9AD, 0xE7C0, 0x745B, 0xE7C1, 0xF9AE, 0xE7C2, 0x74D4, + 0xE7C3, 0x76C8, 0xE7C4, 0x7A4E, 0xE7C5, 0x7E93, 0xE7C6, 0xF9AF, + 0xE7C7, 0xF9B0, 0xE7C8, 0x82F1, 0xE7C9, 0x8A60, 0xE7CA, 0x8FCE, + 0xE7CB, 0xF9B1, 0xE7CC, 0x9348, 0xE7CD, 0xF9B2, 0xE7CE, 0x9719, + 0xE7CF, 0xF9B3, 0xE7D0, 0xF9B4, 0xE7D1, 0x4E42, 0xE7D2, 0x502A, + 0xE7D3, 0xF9B5, 0xE7D4, 0x5208, 0xE7D5, 0x53E1, 0xE7D6, 0x66F3, + 0xE7D7, 0x6C6D, 0xE7D8, 0x6FCA, 0xE7D9, 0x730A, 0xE7DA, 0x777F, + 0xE7DB, 0x7A62, 0xE7DC, 0x82AE, 0xE7DD, 0x85DD, 0xE7DE, 0x8602, + 0xE7DF, 0xF9B6, 0xE7E0, 0x88D4, 0xE7E1, 0x8A63, 0xE7E2, 0x8B7D, + 0xE7E3, 0x8C6B, 0xE7E4, 0xF9B7, 0xE7E5, 0x92B3, 0xE7E6, 0xF9B8, + 0xE7E7, 0x9713, 0xE7E8, 0x9810, 0xE7E9, 0x4E94, 0xE7EA, 0x4F0D, + 0xE7EB, 0x4FC9, 0xE7EC, 0x50B2, 0xE7ED, 0x5348, 0xE7EE, 0x543E, + 0xE7EF, 0x5433, 0xE7F0, 0x55DA, 0xE7F1, 0x5862, 0xE7F2, 0x58BA, + 0xE7F3, 0x5967, 0xE7F4, 0x5A1B, 0xE7F5, 0x5BE4, 0xE7F6, 0x609F, + 0xE7F7, 0xF9B9, 0xE7F8, 0x61CA, 0xE7F9, 0x6556, 0xE7FA, 0x65FF, + 0xE7FB, 0x6664, 0xE7FC, 0x68A7, 0xE7FD, 0x6C5A, 0xE7FE, 0x6FB3, + 0xE8A1, 0x70CF, 0xE8A2, 0x71AC, 0xE8A3, 0x7352, 0xE8A4, 0x7B7D, + 0xE8A5, 0x8708, 0xE8A6, 0x8AA4, 0xE8A7, 0x9C32, 0xE8A8, 0x9F07, + 0xE8A9, 0x5C4B, 0xE8AA, 0x6C83, 0xE8AB, 0x7344, 0xE8AC, 0x7389, + 0xE8AD, 0x923A, 0xE8AE, 0x6EAB, 0xE8AF, 0x7465, 0xE8B0, 0x761F, + 0xE8B1, 0x7A69, 0xE8B2, 0x7E15, 0xE8B3, 0x860A, 0xE8B4, 0x5140, + 0xE8B5, 0x58C5, 0xE8B6, 0x64C1, 0xE8B7, 0x74EE, 0xE8B8, 0x7515, + 0xE8B9, 0x7670, 0xE8BA, 0x7FC1, 0xE8BB, 0x9095, 0xE8BC, 0x96CD, + 0xE8BD, 0x9954, 0xE8BE, 0x6E26, 0xE8BF, 0x74E6, 0xE8C0, 0x7AA9, + 0xE8C1, 0x7AAA, 0xE8C2, 0x81E5, 0xE8C3, 0x86D9, 0xE8C4, 0x8778, + 0xE8C5, 0x8A1B, 0xE8C6, 0x5A49, 0xE8C7, 0x5B8C, 0xE8C8, 0x5B9B, + 0xE8C9, 0x68A1, 0xE8CA, 0x6900, 0xE8CB, 0x6D63, 0xE8CC, 0x73A9, + 0xE8CD, 0x7413, 0xE8CE, 0x742C, 0xE8CF, 0x7897, 0xE8D0, 0x7DE9, + 0xE8D1, 0x7FEB, 0xE8D2, 0x8118, 0xE8D3, 0x8155, 0xE8D4, 0x839E, + 0xE8D5, 0x8C4C, 0xE8D6, 0x962E, 0xE8D7, 0x9811, 0xE8D8, 0x66F0, + 0xE8D9, 0x5F80, 0xE8DA, 0x65FA, 0xE8DB, 0x6789, 0xE8DC, 0x6C6A, + 0xE8DD, 0x738B, 0xE8DE, 0x502D, 0xE8DF, 0x5A03, 0xE8E0, 0x6B6A, + 0xE8E1, 0x77EE, 0xE8E2, 0x5916, 0xE8E3, 0x5D6C, 0xE8E4, 0x5DCD, + 0xE8E5, 0x7325, 0xE8E6, 0x754F, 0xE8E7, 0xF9BA, 0xE8E8, 0xF9BB, + 0xE8E9, 0x50E5, 0xE8EA, 0x51F9, 0xE8EB, 0x582F, 0xE8EC, 0x592D, + 0xE8ED, 0x5996, 0xE8EE, 0x59DA, 0xE8EF, 0x5BE5, 0xE8F0, 0xF9BC, + 0xE8F1, 0xF9BD, 0xE8F2, 0x5DA2, 0xE8F3, 0x62D7, 0xE8F4, 0x6416, + 0xE8F5, 0x6493, 0xE8F6, 0x64FE, 0xE8F7, 0xF9BE, 0xE8F8, 0x66DC, + 0xE8F9, 0xF9BF, 0xE8FA, 0x6A48, 0xE8FB, 0xF9C0, 0xE8FC, 0x71FF, + 0xE8FD, 0x7464, 0xE8FE, 0xF9C1, 0xE9A1, 0x7A88, 0xE9A2, 0x7AAF, + 0xE9A3, 0x7E47, 0xE9A4, 0x7E5E, 0xE9A5, 0x8000, 0xE9A6, 0x8170, + 0xE9A7, 0xF9C2, 0xE9A8, 0x87EF, 0xE9A9, 0x8981, 0xE9AA, 0x8B20, + 0xE9AB, 0x9059, 0xE9AC, 0xF9C3, 0xE9AD, 0x9080, 0xE9AE, 0x9952, + 0xE9AF, 0x617E, 0xE9B0, 0x6B32, 0xE9B1, 0x6D74, 0xE9B2, 0x7E1F, + 0xE9B3, 0x8925, 0xE9B4, 0x8FB1, 0xE9B5, 0x4FD1, 0xE9B6, 0x50AD, + 0xE9B7, 0x5197, 0xE9B8, 0x52C7, 0xE9B9, 0x57C7, 0xE9BA, 0x5889, + 0xE9BB, 0x5BB9, 0xE9BC, 0x5EB8, 0xE9BD, 0x6142, 0xE9BE, 0x6995, + 0xE9BF, 0x6D8C, 0xE9C0, 0x6E67, 0xE9C1, 0x6EB6, 0xE9C2, 0x7194, + 0xE9C3, 0x7462, 0xE9C4, 0x7528, 0xE9C5, 0x752C, 0xE9C6, 0x8073, + 0xE9C7, 0x8338, 0xE9C8, 0x84C9, 0xE9C9, 0x8E0A, 0xE9CA, 0x9394, + 0xE9CB, 0x93DE, 0xE9CC, 0xF9C4, 0xE9CD, 0x4E8E, 0xE9CE, 0x4F51, + 0xE9CF, 0x5076, 0xE9D0, 0x512A, 0xE9D1, 0x53C8, 0xE9D2, 0x53CB, + 0xE9D3, 0x53F3, 0xE9D4, 0x5B87, 0xE9D5, 0x5BD3, 0xE9D6, 0x5C24, + 0xE9D7, 0x611A, 0xE9D8, 0x6182, 0xE9D9, 0x65F4, 0xE9DA, 0x725B, + 0xE9DB, 0x7397, 0xE9DC, 0x7440, 0xE9DD, 0x76C2, 0xE9DE, 0x7950, + 0xE9DF, 0x7991, 0xE9E0, 0x79B9, 0xE9E1, 0x7D06, 0xE9E2, 0x7FBD, + 0xE9E3, 0x828B, 0xE9E4, 0x85D5, 0xE9E5, 0x865E, 0xE9E6, 0x8FC2, + 0xE9E7, 0x9047, 0xE9E8, 0x90F5, 0xE9E9, 0x91EA, 0xE9EA, 0x9685, + 0xE9EB, 0x96E8, 0xE9EC, 0x96E9, 0xE9ED, 0x52D6, 0xE9EE, 0x5F67, + 0xE9EF, 0x65ED, 0xE9F0, 0x6631, 0xE9F1, 0x682F, 0xE9F2, 0x715C, + 0xE9F3, 0x7A36, 0xE9F4, 0x90C1, 0xE9F5, 0x980A, 0xE9F6, 0x4E91, + 0xE9F7, 0xF9C5, 0xE9F8, 0x6A52, 0xE9F9, 0x6B9E, 0xE9FA, 0x6F90, + 0xE9FB, 0x7189, 0xE9FC, 0x8018, 0xE9FD, 0x82B8, 0xE9FE, 0x8553, + 0xEAA1, 0x904B, 0xEAA2, 0x9695, 0xEAA3, 0x96F2, 0xEAA4, 0x97FB, + 0xEAA5, 0x851A, 0xEAA6, 0x9B31, 0xEAA7, 0x4E90, 0xEAA8, 0x718A, + 0xEAA9, 0x96C4, 0xEAAA, 0x5143, 0xEAAB, 0x539F, 0xEAAC, 0x54E1, + 0xEAAD, 0x5713, 0xEAAE, 0x5712, 0xEAAF, 0x57A3, 0xEAB0, 0x5A9B, + 0xEAB1, 0x5AC4, 0xEAB2, 0x5BC3, 0xEAB3, 0x6028, 0xEAB4, 0x613F, + 0xEAB5, 0x63F4, 0xEAB6, 0x6C85, 0xEAB7, 0x6D39, 0xEAB8, 0x6E72, + 0xEAB9, 0x6E90, 0xEABA, 0x7230, 0xEABB, 0x733F, 0xEABC, 0x7457, + 0xEABD, 0x82D1, 0xEABE, 0x8881, 0xEABF, 0x8F45, 0xEAC0, 0x9060, + 0xEAC1, 0xF9C6, 0xEAC2, 0x9662, 0xEAC3, 0x9858, 0xEAC4, 0x9D1B, + 0xEAC5, 0x6708, 0xEAC6, 0x8D8A, 0xEAC7, 0x925E, 0xEAC8, 0x4F4D, + 0xEAC9, 0x5049, 0xEACA, 0x50DE, 0xEACB, 0x5371, 0xEACC, 0x570D, + 0xEACD, 0x59D4, 0xEACE, 0x5A01, 0xEACF, 0x5C09, 0xEAD0, 0x6170, + 0xEAD1, 0x6690, 0xEAD2, 0x6E2D, 0xEAD3, 0x7232, 0xEAD4, 0x744B, + 0xEAD5, 0x7DEF, 0xEAD6, 0x80C3, 0xEAD7, 0x840E, 0xEAD8, 0x8466, + 0xEAD9, 0x853F, 0xEADA, 0x875F, 0xEADB, 0x885B, 0xEADC, 0x8918, + 0xEADD, 0x8B02, 0xEADE, 0x9055, 0xEADF, 0x97CB, 0xEAE0, 0x9B4F, + 0xEAE1, 0x4E73, 0xEAE2, 0x4F91, 0xEAE3, 0x5112, 0xEAE4, 0x516A, + 0xEAE5, 0xF9C7, 0xEAE6, 0x552F, 0xEAE7, 0x55A9, 0xEAE8, 0x5B7A, + 0xEAE9, 0x5BA5, 0xEAEA, 0x5E7C, 0xEAEB, 0x5E7D, 0xEAEC, 0x5EBE, + 0xEAED, 0x60A0, 0xEAEE, 0x60DF, 0xEAEF, 0x6108, 0xEAF0, 0x6109, + 0xEAF1, 0x63C4, 0xEAF2, 0x6538, 0xEAF3, 0x6709, 0xEAF4, 0xF9C8, + 0xEAF5, 0x67D4, 0xEAF6, 0x67DA, 0xEAF7, 0xF9C9, 0xEAF8, 0x6961, + 0xEAF9, 0x6962, 0xEAFA, 0x6CB9, 0xEAFB, 0x6D27, 0xEAFC, 0xF9CA, + 0xEAFD, 0x6E38, 0xEAFE, 0xF9CB, 0xEBA1, 0x6FE1, 0xEBA2, 0x7336, + 0xEBA3, 0x7337, 0xEBA4, 0xF9CC, 0xEBA5, 0x745C, 0xEBA6, 0x7531, + 0xEBA7, 0xF9CD, 0xEBA8, 0x7652, 0xEBA9, 0xF9CE, 0xEBAA, 0xF9CF, + 0xEBAB, 0x7DAD, 0xEBAC, 0x81FE, 0xEBAD, 0x8438, 0xEBAE, 0x88D5, + 0xEBAF, 0x8A98, 0xEBB0, 0x8ADB, 0xEBB1, 0x8AED, 0xEBB2, 0x8E30, + 0xEBB3, 0x8E42, 0xEBB4, 0x904A, 0xEBB5, 0x903E, 0xEBB6, 0x907A, + 0xEBB7, 0x9149, 0xEBB8, 0x91C9, 0xEBB9, 0x936E, 0xEBBA, 0xF9D0, + 0xEBBB, 0xF9D1, 0xEBBC, 0x5809, 0xEBBD, 0xF9D2, 0xEBBE, 0x6BD3, + 0xEBBF, 0x8089, 0xEBC0, 0x80B2, 0xEBC1, 0xF9D3, 0xEBC2, 0xF9D4, + 0xEBC3, 0x5141, 0xEBC4, 0x596B, 0xEBC5, 0x5C39, 0xEBC6, 0xF9D5, + 0xEBC7, 0xF9D6, 0xEBC8, 0x6F64, 0xEBC9, 0x73A7, 0xEBCA, 0x80E4, + 0xEBCB, 0x8D07, 0xEBCC, 0xF9D7, 0xEBCD, 0x9217, 0xEBCE, 0x958F, + 0xEBCF, 0xF9D8, 0xEBD0, 0xF9D9, 0xEBD1, 0xF9DA, 0xEBD2, 0xF9DB, + 0xEBD3, 0x807F, 0xEBD4, 0x620E, 0xEBD5, 0x701C, 0xEBD6, 0x7D68, + 0xEBD7, 0x878D, 0xEBD8, 0xF9DC, 0xEBD9, 0x57A0, 0xEBDA, 0x6069, + 0xEBDB, 0x6147, 0xEBDC, 0x6BB7, 0xEBDD, 0x8ABE, 0xEBDE, 0x9280, + 0xEBDF, 0x96B1, 0xEBE0, 0x4E59, 0xEBE1, 0x541F, 0xEBE2, 0x6DEB, + 0xEBE3, 0x852D, 0xEBE4, 0x9670, 0xEBE5, 0x97F3, 0xEBE6, 0x98EE, + 0xEBE7, 0x63D6, 0xEBE8, 0x6CE3, 0xEBE9, 0x9091, 0xEBEA, 0x51DD, + 0xEBEB, 0x61C9, 0xEBEC, 0x81BA, 0xEBED, 0x9DF9, 0xEBEE, 0x4F9D, + 0xEBEF, 0x501A, 0xEBF0, 0x5100, 0xEBF1, 0x5B9C, 0xEBF2, 0x610F, + 0xEBF3, 0x61FF, 0xEBF4, 0x64EC, 0xEBF5, 0x6905, 0xEBF6, 0x6BC5, + 0xEBF7, 0x7591, 0xEBF8, 0x77E3, 0xEBF9, 0x7FA9, 0xEBFA, 0x8264, + 0xEBFB, 0x858F, 0xEBFC, 0x87FB, 0xEBFD, 0x8863, 0xEBFE, 0x8ABC, + 0xECA1, 0x8B70, 0xECA2, 0x91AB, 0xECA3, 0x4E8C, 0xECA4, 0x4EE5, + 0xECA5, 0x4F0A, 0xECA6, 0xF9DD, 0xECA7, 0xF9DE, 0xECA8, 0x5937, + 0xECA9, 0x59E8, 0xECAA, 0xF9DF, 0xECAB, 0x5DF2, 0xECAC, 0x5F1B, + 0xECAD, 0x5F5B, 0xECAE, 0x6021, 0xECAF, 0xF9E0, 0xECB0, 0xF9E1, + 0xECB1, 0xF9E2, 0xECB2, 0xF9E3, 0xECB3, 0x723E, 0xECB4, 0x73E5, + 0xECB5, 0xF9E4, 0xECB6, 0x7570, 0xECB7, 0x75CD, 0xECB8, 0xF9E5, + 0xECB9, 0x79FB, 0xECBA, 0xF9E6, 0xECBB, 0x800C, 0xECBC, 0x8033, + 0xECBD, 0x8084, 0xECBE, 0x82E1, 0xECBF, 0x8351, 0xECC0, 0xF9E7, + 0xECC1, 0xF9E8, 0xECC2, 0x8CBD, 0xECC3, 0x8CB3, 0xECC4, 0x9087, + 0xECC5, 0xF9E9, 0xECC6, 0xF9EA, 0xECC7, 0x98F4, 0xECC8, 0x990C, + 0xECC9, 0xF9EB, 0xECCA, 0xF9EC, 0xECCB, 0x7037, 0xECCC, 0x76CA, + 0xECCD, 0x7FCA, 0xECCE, 0x7FCC, 0xECCF, 0x7FFC, 0xECD0, 0x8B1A, + 0xECD1, 0x4EBA, 0xECD2, 0x4EC1, 0xECD3, 0x5203, 0xECD4, 0x5370, + 0xECD5, 0xF9ED, 0xECD6, 0x54BD, 0xECD7, 0x56E0, 0xECD8, 0x59FB, + 0xECD9, 0x5BC5, 0xECDA, 0x5F15, 0xECDB, 0x5FCD, 0xECDC, 0x6E6E, + 0xECDD, 0xF9EE, 0xECDE, 0xF9EF, 0xECDF, 0x7D6A, 0xECE0, 0x8335, + 0xECE1, 0xF9F0, 0xECE2, 0x8693, 0xECE3, 0x8A8D, 0xECE4, 0xF9F1, + 0xECE5, 0x976D, 0xECE6, 0x9777, 0xECE7, 0xF9F2, 0xECE8, 0xF9F3, + 0xECE9, 0x4E00, 0xECEA, 0x4F5A, 0xECEB, 0x4F7E, 0xECEC, 0x58F9, + 0xECED, 0x65E5, 0xECEE, 0x6EA2, 0xECEF, 0x9038, 0xECF0, 0x93B0, + 0xECF1, 0x99B9, 0xECF2, 0x4EFB, 0xECF3, 0x58EC, 0xECF4, 0x598A, + 0xECF5, 0x59D9, 0xECF6, 0x6041, 0xECF7, 0xF9F4, 0xECF8, 0xF9F5, + 0xECF9, 0x7A14, 0xECFA, 0xF9F6, 0xECFB, 0x834F, 0xECFC, 0x8CC3, + 0xECFD, 0x5165, 0xECFE, 0x5344, 0xEDA1, 0xF9F7, 0xEDA2, 0xF9F8, + 0xEDA3, 0xF9F9, 0xEDA4, 0x4ECD, 0xEDA5, 0x5269, 0xEDA6, 0x5B55, + 0xEDA7, 0x82BF, 0xEDA8, 0x4ED4, 0xEDA9, 0x523A, 0xEDAA, 0x54A8, + 0xEDAB, 0x59C9, 0xEDAC, 0x59FF, 0xEDAD, 0x5B50, 0xEDAE, 0x5B57, + 0xEDAF, 0x5B5C, 0xEDB0, 0x6063, 0xEDB1, 0x6148, 0xEDB2, 0x6ECB, + 0xEDB3, 0x7099, 0xEDB4, 0x716E, 0xEDB5, 0x7386, 0xEDB6, 0x74F7, + 0xEDB7, 0x75B5, 0xEDB8, 0x78C1, 0xEDB9, 0x7D2B, 0xEDBA, 0x8005, + 0xEDBB, 0x81EA, 0xEDBC, 0x8328, 0xEDBD, 0x8517, 0xEDBE, 0x85C9, + 0xEDBF, 0x8AEE, 0xEDC0, 0x8CC7, 0xEDC1, 0x96CC, 0xEDC2, 0x4F5C, + 0xEDC3, 0x52FA, 0xEDC4, 0x56BC, 0xEDC5, 0x65AB, 0xEDC6, 0x6628, + 0xEDC7, 0x707C, 0xEDC8, 0x70B8, 0xEDC9, 0x7235, 0xEDCA, 0x7DBD, + 0xEDCB, 0x828D, 0xEDCC, 0x914C, 0xEDCD, 0x96C0, 0xEDCE, 0x9D72, + 0xEDCF, 0x5B71, 0xEDD0, 0x68E7, 0xEDD1, 0x6B98, 0xEDD2, 0x6F7A, + 0xEDD3, 0x76DE, 0xEDD4, 0x5C91, 0xEDD5, 0x66AB, 0xEDD6, 0x6F5B, + 0xEDD7, 0x7BB4, 0xEDD8, 0x7C2A, 0xEDD9, 0x8836, 0xEDDA, 0x96DC, + 0xEDDB, 0x4E08, 0xEDDC, 0x4ED7, 0xEDDD, 0x5320, 0xEDDE, 0x5834, + 0xEDDF, 0x58BB, 0xEDE0, 0x58EF, 0xEDE1, 0x596C, 0xEDE2, 0x5C07, + 0xEDE3, 0x5E33, 0xEDE4, 0x5E84, 0xEDE5, 0x5F35, 0xEDE6, 0x638C, + 0xEDE7, 0x66B2, 0xEDE8, 0x6756, 0xEDE9, 0x6A1F, 0xEDEA, 0x6AA3, + 0xEDEB, 0x6B0C, 0xEDEC, 0x6F3F, 0xEDED, 0x7246, 0xEDEE, 0xF9FA, + 0xEDEF, 0x7350, 0xEDF0, 0x748B, 0xEDF1, 0x7AE0, 0xEDF2, 0x7CA7, + 0xEDF3, 0x8178, 0xEDF4, 0x81DF, 0xEDF5, 0x81E7, 0xEDF6, 0x838A, + 0xEDF7, 0x846C, 0xEDF8, 0x8523, 0xEDF9, 0x8594, 0xEDFA, 0x85CF, + 0xEDFB, 0x88DD, 0xEDFC, 0x8D13, 0xEDFD, 0x91AC, 0xEDFE, 0x9577, + 0xEEA1, 0x969C, 0xEEA2, 0x518D, 0xEEA3, 0x54C9, 0xEEA4, 0x5728, + 0xEEA5, 0x5BB0, 0xEEA6, 0x624D, 0xEEA7, 0x6750, 0xEEA8, 0x683D, + 0xEEA9, 0x6893, 0xEEAA, 0x6E3D, 0xEEAB, 0x6ED3, 0xEEAC, 0x707D, + 0xEEAD, 0x7E21, 0xEEAE, 0x88C1, 0xEEAF, 0x8CA1, 0xEEB0, 0x8F09, + 0xEEB1, 0x9F4B, 0xEEB2, 0x9F4E, 0xEEB3, 0x722D, 0xEEB4, 0x7B8F, + 0xEEB5, 0x8ACD, 0xEEB6, 0x931A, 0xEEB7, 0x4F47, 0xEEB8, 0x4F4E, + 0xEEB9, 0x5132, 0xEEBA, 0x5480, 0xEEBB, 0x59D0, 0xEEBC, 0x5E95, + 0xEEBD, 0x62B5, 0xEEBE, 0x6775, 0xEEBF, 0x696E, 0xEEC0, 0x6A17, + 0xEEC1, 0x6CAE, 0xEEC2, 0x6E1A, 0xEEC3, 0x72D9, 0xEEC4, 0x732A, + 0xEEC5, 0x75BD, 0xEEC6, 0x7BB8, 0xEEC7, 0x7D35, 0xEEC8, 0x82E7, + 0xEEC9, 0x83F9, 0xEECA, 0x8457, 0xEECB, 0x85F7, 0xEECC, 0x8A5B, + 0xEECD, 0x8CAF, 0xEECE, 0x8E87, 0xEECF, 0x9019, 0xEED0, 0x90B8, + 0xEED1, 0x96CE, 0xEED2, 0x9F5F, 0xEED3, 0x52E3, 0xEED4, 0x540A, + 0xEED5, 0x5AE1, 0xEED6, 0x5BC2, 0xEED7, 0x6458, 0xEED8, 0x6575, + 0xEED9, 0x6EF4, 0xEEDA, 0x72C4, 0xEEDB, 0xF9FB, 0xEEDC, 0x7684, + 0xEEDD, 0x7A4D, 0xEEDE, 0x7B1B, 0xEEDF, 0x7C4D, 0xEEE0, 0x7E3E, + 0xEEE1, 0x7FDF, 0xEEE2, 0x837B, 0xEEE3, 0x8B2B, 0xEEE4, 0x8CCA, + 0xEEE5, 0x8D64, 0xEEE6, 0x8DE1, 0xEEE7, 0x8E5F, 0xEEE8, 0x8FEA, + 0xEEE9, 0x8FF9, 0xEEEA, 0x9069, 0xEEEB, 0x93D1, 0xEEEC, 0x4F43, + 0xEEED, 0x4F7A, 0xEEEE, 0x50B3, 0xEEEF, 0x5168, 0xEEF0, 0x5178, + 0xEEF1, 0x524D, 0xEEF2, 0x526A, 0xEEF3, 0x5861, 0xEEF4, 0x587C, + 0xEEF5, 0x5960, 0xEEF6, 0x5C08, 0xEEF7, 0x5C55, 0xEEF8, 0x5EDB, + 0xEEF9, 0x609B, 0xEEFA, 0x6230, 0xEEFB, 0x6813, 0xEEFC, 0x6BBF, + 0xEEFD, 0x6C08, 0xEEFE, 0x6FB1, 0xEFA1, 0x714E, 0xEFA2, 0x7420, + 0xEFA3, 0x7530, 0xEFA4, 0x7538, 0xEFA5, 0x7551, 0xEFA6, 0x7672, + 0xEFA7, 0x7B4C, 0xEFA8, 0x7B8B, 0xEFA9, 0x7BAD, 0xEFAA, 0x7BC6, + 0xEFAB, 0x7E8F, 0xEFAC, 0x8A6E, 0xEFAD, 0x8F3E, 0xEFAE, 0x8F49, + 0xEFAF, 0x923F, 0xEFB0, 0x9293, 0xEFB1, 0x9322, 0xEFB2, 0x942B, + 0xEFB3, 0x96FB, 0xEFB4, 0x985A, 0xEFB5, 0x986B, 0xEFB6, 0x991E, + 0xEFB7, 0x5207, 0xEFB8, 0x622A, 0xEFB9, 0x6298, 0xEFBA, 0x6D59, + 0xEFBB, 0x7664, 0xEFBC, 0x7ACA, 0xEFBD, 0x7BC0, 0xEFBE, 0x7D76, + 0xEFBF, 0x5360, 0xEFC0, 0x5CBE, 0xEFC1, 0x5E97, 0xEFC2, 0x6F38, + 0xEFC3, 0x70B9, 0xEFC4, 0x7C98, 0xEFC5, 0x9711, 0xEFC6, 0x9B8E, + 0xEFC7, 0x9EDE, 0xEFC8, 0x63A5, 0xEFC9, 0x647A, 0xEFCA, 0x8776, + 0xEFCB, 0x4E01, 0xEFCC, 0x4E95, 0xEFCD, 0x4EAD, 0xEFCE, 0x505C, + 0xEFCF, 0x5075, 0xEFD0, 0x5448, 0xEFD1, 0x59C3, 0xEFD2, 0x5B9A, + 0xEFD3, 0x5E40, 0xEFD4, 0x5EAD, 0xEFD5, 0x5EF7, 0xEFD6, 0x5F81, + 0xEFD7, 0x60C5, 0xEFD8, 0x633A, 0xEFD9, 0x653F, 0xEFDA, 0x6574, + 0xEFDB, 0x65CC, 0xEFDC, 0x6676, 0xEFDD, 0x6678, 0xEFDE, 0x67FE, + 0xEFDF, 0x6968, 0xEFE0, 0x6A89, 0xEFE1, 0x6B63, 0xEFE2, 0x6C40, + 0xEFE3, 0x6DC0, 0xEFE4, 0x6DE8, 0xEFE5, 0x6E1F, 0xEFE6, 0x6E5E, + 0xEFE7, 0x701E, 0xEFE8, 0x70A1, 0xEFE9, 0x738E, 0xEFEA, 0x73FD, + 0xEFEB, 0x753A, 0xEFEC, 0x775B, 0xEFED, 0x7887, 0xEFEE, 0x798E, + 0xEFEF, 0x7A0B, 0xEFF0, 0x7A7D, 0xEFF1, 0x7CBE, 0xEFF2, 0x7D8E, + 0xEFF3, 0x8247, 0xEFF4, 0x8A02, 0xEFF5, 0x8AEA, 0xEFF6, 0x8C9E, + 0xEFF7, 0x912D, 0xEFF8, 0x914A, 0xEFF9, 0x91D8, 0xEFFA, 0x9266, + 0xEFFB, 0x92CC, 0xEFFC, 0x9320, 0xEFFD, 0x9706, 0xEFFE, 0x9756, + 0xF0A1, 0x975C, 0xF0A2, 0x9802, 0xF0A3, 0x9F0E, 0xF0A4, 0x5236, + 0xF0A5, 0x5291, 0xF0A6, 0x557C, 0xF0A7, 0x5824, 0xF0A8, 0x5E1D, + 0xF0A9, 0x5F1F, 0xF0AA, 0x608C, 0xF0AB, 0x63D0, 0xF0AC, 0x68AF, + 0xF0AD, 0x6FDF, 0xF0AE, 0x796D, 0xF0AF, 0x7B2C, 0xF0B0, 0x81CD, + 0xF0B1, 0x85BA, 0xF0B2, 0x88FD, 0xF0B3, 0x8AF8, 0xF0B4, 0x8E44, + 0xF0B5, 0x918D, 0xF0B6, 0x9664, 0xF0B7, 0x969B, 0xF0B8, 0x973D, + 0xF0B9, 0x984C, 0xF0BA, 0x9F4A, 0xF0BB, 0x4FCE, 0xF0BC, 0x5146, + 0xF0BD, 0x51CB, 0xF0BE, 0x52A9, 0xF0BF, 0x5632, 0xF0C0, 0x5F14, + 0xF0C1, 0x5F6B, 0xF0C2, 0x63AA, 0xF0C3, 0x64CD, 0xF0C4, 0x65E9, + 0xF0C5, 0x6641, 0xF0C6, 0x66FA, 0xF0C7, 0x66F9, 0xF0C8, 0x671D, + 0xF0C9, 0x689D, 0xF0CA, 0x68D7, 0xF0CB, 0x69FD, 0xF0CC, 0x6F15, + 0xF0CD, 0x6F6E, 0xF0CE, 0x7167, 0xF0CF, 0x71E5, 0xF0D0, 0x722A, + 0xF0D1, 0x74AA, 0xF0D2, 0x773A, 0xF0D3, 0x7956, 0xF0D4, 0x795A, + 0xF0D5, 0x79DF, 0xF0D6, 0x7A20, 0xF0D7, 0x7A95, 0xF0D8, 0x7C97, + 0xF0D9, 0x7CDF, 0xF0DA, 0x7D44, 0xF0DB, 0x7E70, 0xF0DC, 0x8087, + 0xF0DD, 0x85FB, 0xF0DE, 0x86A4, 0xF0DF, 0x8A54, 0xF0E0, 0x8ABF, + 0xF0E1, 0x8D99, 0xF0E2, 0x8E81, 0xF0E3, 0x9020, 0xF0E4, 0x906D, + 0xF0E5, 0x91E3, 0xF0E6, 0x963B, 0xF0E7, 0x96D5, 0xF0E8, 0x9CE5, + 0xF0E9, 0x65CF, 0xF0EA, 0x7C07, 0xF0EB, 0x8DB3, 0xF0EC, 0x93C3, + 0xF0ED, 0x5B58, 0xF0EE, 0x5C0A, 0xF0EF, 0x5352, 0xF0F0, 0x62D9, + 0xF0F1, 0x731D, 0xF0F2, 0x5027, 0xF0F3, 0x5B97, 0xF0F4, 0x5F9E, + 0xF0F5, 0x60B0, 0xF0F6, 0x616B, 0xF0F7, 0x68D5, 0xF0F8, 0x6DD9, + 0xF0F9, 0x742E, 0xF0FA, 0x7A2E, 0xF0FB, 0x7D42, 0xF0FC, 0x7D9C, + 0xF0FD, 0x7E31, 0xF0FE, 0x816B, 0xF1A1, 0x8E2A, 0xF1A2, 0x8E35, + 0xF1A3, 0x937E, 0xF1A4, 0x9418, 0xF1A5, 0x4F50, 0xF1A6, 0x5750, + 0xF1A7, 0x5DE6, 0xF1A8, 0x5EA7, 0xF1A9, 0x632B, 0xF1AA, 0x7F6A, + 0xF1AB, 0x4E3B, 0xF1AC, 0x4F4F, 0xF1AD, 0x4F8F, 0xF1AE, 0x505A, + 0xF1AF, 0x59DD, 0xF1B0, 0x80C4, 0xF1B1, 0x546A, 0xF1B2, 0x5468, + 0xF1B3, 0x55FE, 0xF1B4, 0x594F, 0xF1B5, 0x5B99, 0xF1B6, 0x5DDE, + 0xF1B7, 0x5EDA, 0xF1B8, 0x665D, 0xF1B9, 0x6731, 0xF1BA, 0x67F1, + 0xF1BB, 0x682A, 0xF1BC, 0x6CE8, 0xF1BD, 0x6D32, 0xF1BE, 0x6E4A, + 0xF1BF, 0x6F8D, 0xF1C0, 0x70B7, 0xF1C1, 0x73E0, 0xF1C2, 0x7587, + 0xF1C3, 0x7C4C, 0xF1C4, 0x7D02, 0xF1C5, 0x7D2C, 0xF1C6, 0x7DA2, + 0xF1C7, 0x821F, 0xF1C8, 0x86DB, 0xF1C9, 0x8A3B, 0xF1CA, 0x8A85, + 0xF1CB, 0x8D70, 0xF1CC, 0x8E8A, 0xF1CD, 0x8F33, 0xF1CE, 0x9031, + 0xF1CF, 0x914E, 0xF1D0, 0x9152, 0xF1D1, 0x9444, 0xF1D2, 0x99D0, + 0xF1D3, 0x7AF9, 0xF1D4, 0x7CA5, 0xF1D5, 0x4FCA, 0xF1D6, 0x5101, + 0xF1D7, 0x51C6, 0xF1D8, 0x57C8, 0xF1D9, 0x5BEF, 0xF1DA, 0x5CFB, + 0xF1DB, 0x6659, 0xF1DC, 0x6A3D, 0xF1DD, 0x6D5A, 0xF1DE, 0x6E96, + 0xF1DF, 0x6FEC, 0xF1E0, 0x710C, 0xF1E1, 0x756F, 0xF1E2, 0x7AE3, + 0xF1E3, 0x8822, 0xF1E4, 0x9021, 0xF1E5, 0x9075, 0xF1E6, 0x96CB, + 0xF1E7, 0x99FF, 0xF1E8, 0x8301, 0xF1E9, 0x4E2D, 0xF1EA, 0x4EF2, + 0xF1EB, 0x8846, 0xF1EC, 0x91CD, 0xF1ED, 0x537D, 0xF1EE, 0x6ADB, + 0xF1EF, 0x696B, 0xF1F0, 0x6C41, 0xF1F1, 0x847A, 0xF1F2, 0x589E, + 0xF1F3, 0x618E, 0xF1F4, 0x66FE, 0xF1F5, 0x62EF, 0xF1F6, 0x70DD, + 0xF1F7, 0x7511, 0xF1F8, 0x75C7, 0xF1F9, 0x7E52, 0xF1FA, 0x84B8, + 0xF1FB, 0x8B49, 0xF1FC, 0x8D08, 0xF1FD, 0x4E4B, 0xF1FE, 0x53EA, + 0xF2A1, 0x54AB, 0xF2A2, 0x5730, 0xF2A3, 0x5740, 0xF2A4, 0x5FD7, + 0xF2A5, 0x6301, 0xF2A6, 0x6307, 0xF2A7, 0x646F, 0xF2A8, 0x652F, + 0xF2A9, 0x65E8, 0xF2AA, 0x667A, 0xF2AB, 0x679D, 0xF2AC, 0x67B3, + 0xF2AD, 0x6B62, 0xF2AE, 0x6C60, 0xF2AF, 0x6C9A, 0xF2B0, 0x6F2C, + 0xF2B1, 0x77E5, 0xF2B2, 0x7825, 0xF2B3, 0x7949, 0xF2B4, 0x7957, + 0xF2B5, 0x7D19, 0xF2B6, 0x80A2, 0xF2B7, 0x8102, 0xF2B8, 0x81F3, + 0xF2B9, 0x829D, 0xF2BA, 0x82B7, 0xF2BB, 0x8718, 0xF2BC, 0x8A8C, + 0xF2BD, 0xF9FC, 0xF2BE, 0x8D04, 0xF2BF, 0x8DBE, 0xF2C0, 0x9072, + 0xF2C1, 0x76F4, 0xF2C2, 0x7A19, 0xF2C3, 0x7A37, 0xF2C4, 0x7E54, + 0xF2C5, 0x8077, 0xF2C6, 0x5507, 0xF2C7, 0x55D4, 0xF2C8, 0x5875, + 0xF2C9, 0x632F, 0xF2CA, 0x6422, 0xF2CB, 0x6649, 0xF2CC, 0x664B, + 0xF2CD, 0x686D, 0xF2CE, 0x699B, 0xF2CF, 0x6B84, 0xF2D0, 0x6D25, + 0xF2D1, 0x6EB1, 0xF2D2, 0x73CD, 0xF2D3, 0x7468, 0xF2D4, 0x74A1, + 0xF2D5, 0x755B, 0xF2D6, 0x75B9, 0xF2D7, 0x76E1, 0xF2D8, 0x771E, + 0xF2D9, 0x778B, 0xF2DA, 0x79E6, 0xF2DB, 0x7E09, 0xF2DC, 0x7E1D, + 0xF2DD, 0x81FB, 0xF2DE, 0x852F, 0xF2DF, 0x8897, 0xF2E0, 0x8A3A, + 0xF2E1, 0x8CD1, 0xF2E2, 0x8EEB, 0xF2E3, 0x8FB0, 0xF2E4, 0x9032, + 0xF2E5, 0x93AD, 0xF2E6, 0x9663, 0xF2E7, 0x9673, 0xF2E8, 0x9707, + 0xF2E9, 0x4F84, 0xF2EA, 0x53F1, 0xF2EB, 0x59EA, 0xF2EC, 0x5AC9, + 0xF2ED, 0x5E19, 0xF2EE, 0x684E, 0xF2EF, 0x74C6, 0xF2F0, 0x75BE, + 0xF2F1, 0x79E9, 0xF2F2, 0x7A92, 0xF2F3, 0x81A3, 0xF2F4, 0x86ED, + 0xF2F5, 0x8CEA, 0xF2F6, 0x8DCC, 0xF2F7, 0x8FED, 0xF2F8, 0x659F, + 0xF2F9, 0x6715, 0xF2FA, 0xF9FD, 0xF2FB, 0x57F7, 0xF2FC, 0x6F57, + 0xF2FD, 0x7DDD, 0xF2FE, 0x8F2F, 0xF3A1, 0x93F6, 0xF3A2, 0x96C6, + 0xF3A3, 0x5FB5, 0xF3A4, 0x61F2, 0xF3A5, 0x6F84, 0xF3A6, 0x4E14, + 0xF3A7, 0x4F98, 0xF3A8, 0x501F, 0xF3A9, 0x53C9, 0xF3AA, 0x55DF, + 0xF3AB, 0x5D6F, 0xF3AC, 0x5DEE, 0xF3AD, 0x6B21, 0xF3AE, 0x6B64, + 0xF3AF, 0x78CB, 0xF3B0, 0x7B9A, 0xF3B1, 0xF9FE, 0xF3B2, 0x8E49, + 0xF3B3, 0x8ECA, 0xF3B4, 0x906E, 0xF3B5, 0x6349, 0xF3B6, 0x643E, + 0xF3B7, 0x7740, 0xF3B8, 0x7A84, 0xF3B9, 0x932F, 0xF3BA, 0x947F, + 0xF3BB, 0x9F6A, 0xF3BC, 0x64B0, 0xF3BD, 0x6FAF, 0xF3BE, 0x71E6, + 0xF3BF, 0x74A8, 0xF3C0, 0x74DA, 0xF3C1, 0x7AC4, 0xF3C2, 0x7C12, + 0xF3C3, 0x7E82, 0xF3C4, 0x7CB2, 0xF3C5, 0x7E98, 0xF3C6, 0x8B9A, + 0xF3C7, 0x8D0A, 0xF3C8, 0x947D, 0xF3C9, 0x9910, 0xF3CA, 0x994C, + 0xF3CB, 0x5239, 0xF3CC, 0x5BDF, 0xF3CD, 0x64E6, 0xF3CE, 0x672D, + 0xF3CF, 0x7D2E, 0xF3D0, 0x50ED, 0xF3D1, 0x53C3, 0xF3D2, 0x5879, + 0xF3D3, 0x6158, 0xF3D4, 0x6159, 0xF3D5, 0x61FA, 0xF3D6, 0x65AC, + 0xF3D7, 0x7AD9, 0xF3D8, 0x8B92, 0xF3D9, 0x8B96, 0xF3DA, 0x5009, + 0xF3DB, 0x5021, 0xF3DC, 0x5275, 0xF3DD, 0x5531, 0xF3DE, 0x5A3C, + 0xF3DF, 0x5EE0, 0xF3E0, 0x5F70, 0xF3E1, 0x6134, 0xF3E2, 0x655E, + 0xF3E3, 0x660C, 0xF3E4, 0x6636, 0xF3E5, 0x66A2, 0xF3E6, 0x69CD, + 0xF3E7, 0x6EC4, 0xF3E8, 0x6F32, 0xF3E9, 0x7316, 0xF3EA, 0x7621, + 0xF3EB, 0x7A93, 0xF3EC, 0x8139, 0xF3ED, 0x8259, 0xF3EE, 0x83D6, + 0xF3EF, 0x84BC, 0xF3F0, 0x50B5, 0xF3F1, 0x57F0, 0xF3F2, 0x5BC0, + 0xF3F3, 0x5BE8, 0xF3F4, 0x5F69, 0xF3F5, 0x63A1, 0xF3F6, 0x7826, + 0xF3F7, 0x7DB5, 0xF3F8, 0x83DC, 0xF3F9, 0x8521, 0xF3FA, 0x91C7, + 0xF3FB, 0x91F5, 0xF3FC, 0x518A, 0xF3FD, 0x67F5, 0xF3FE, 0x7B56, + 0xF4A1, 0x8CAC, 0xF4A2, 0x51C4, 0xF4A3, 0x59BB, 0xF4A4, 0x60BD, + 0xF4A5, 0x8655, 0xF4A6, 0x501C, 0xF4A7, 0xF9FF, 0xF4A8, 0x5254, + 0xF4A9, 0x5C3A, 0xF4AA, 0x617D, 0xF4AB, 0x621A, 0xF4AC, 0x62D3, + 0xF4AD, 0x64F2, 0xF4AE, 0x65A5, 0xF4AF, 0x6ECC, 0xF4B0, 0x7620, + 0xF4B1, 0x810A, 0xF4B2, 0x8E60, 0xF4B3, 0x965F, 0xF4B4, 0x96BB, + 0xF4B5, 0x4EDF, 0xF4B6, 0x5343, 0xF4B7, 0x5598, 0xF4B8, 0x5929, + 0xF4B9, 0x5DDD, 0xF4BA, 0x64C5, 0xF4BB, 0x6CC9, 0xF4BC, 0x6DFA, + 0xF4BD, 0x7394, 0xF4BE, 0x7A7F, 0xF4BF, 0x821B, 0xF4C0, 0x85A6, + 0xF4C1, 0x8CE4, 0xF4C2, 0x8E10, 0xF4C3, 0x9077, 0xF4C4, 0x91E7, + 0xF4C5, 0x95E1, 0xF4C6, 0x9621, 0xF4C7, 0x97C6, 0xF4C8, 0x51F8, + 0xF4C9, 0x54F2, 0xF4CA, 0x5586, 0xF4CB, 0x5FB9, 0xF4CC, 0x64A4, + 0xF4CD, 0x6F88, 0xF4CE, 0x7DB4, 0xF4CF, 0x8F1F, 0xF4D0, 0x8F4D, + 0xF4D1, 0x9435, 0xF4D2, 0x50C9, 0xF4D3, 0x5C16, 0xF4D4, 0x6CBE, + 0xF4D5, 0x6DFB, 0xF4D6, 0x751B, 0xF4D7, 0x77BB, 0xF4D8, 0x7C3D, + 0xF4D9, 0x7C64, 0xF4DA, 0x8A79, 0xF4DB, 0x8AC2, 0xF4DC, 0x581E, + 0xF4DD, 0x59BE, 0xF4DE, 0x5E16, 0xF4DF, 0x6377, 0xF4E0, 0x7252, + 0xF4E1, 0x758A, 0xF4E2, 0x776B, 0xF4E3, 0x8ADC, 0xF4E4, 0x8CBC, + 0xF4E5, 0x8F12, 0xF4E6, 0x5EF3, 0xF4E7, 0x6674, 0xF4E8, 0x6DF8, + 0xF4E9, 0x807D, 0xF4EA, 0x83C1, 0xF4EB, 0x8ACB, 0xF4EC, 0x9751, + 0xF4ED, 0x9BD6, 0xF4EE, 0xFA00, 0xF4EF, 0x5243, 0xF4F0, 0x66FF, + 0xF4F1, 0x6D95, 0xF4F2, 0x6EEF, 0xF4F3, 0x7DE0, 0xF4F4, 0x8AE6, + 0xF4F5, 0x902E, 0xF4F6, 0x905E, 0xF4F7, 0x9AD4, 0xF4F8, 0x521D, + 0xF4F9, 0x527F, 0xF4FA, 0x54E8, 0xF4FB, 0x6194, 0xF4FC, 0x6284, + 0xF4FD, 0x62DB, 0xF4FE, 0x68A2, 0xF5A1, 0x6912, 0xF5A2, 0x695A, + 0xF5A3, 0x6A35, 0xF5A4, 0x7092, 0xF5A5, 0x7126, 0xF5A6, 0x785D, + 0xF5A7, 0x7901, 0xF5A8, 0x790E, 0xF5A9, 0x79D2, 0xF5AA, 0x7A0D, + 0xF5AB, 0x8096, 0xF5AC, 0x8278, 0xF5AD, 0x82D5, 0xF5AE, 0x8349, + 0xF5AF, 0x8549, 0xF5B0, 0x8C82, 0xF5B1, 0x8D85, 0xF5B2, 0x9162, + 0xF5B3, 0x918B, 0xF5B4, 0x91AE, 0xF5B5, 0x4FC3, 0xF5B6, 0x56D1, + 0xF5B7, 0x71ED, 0xF5B8, 0x77D7, 0xF5B9, 0x8700, 0xF5BA, 0x89F8, + 0xF5BB, 0x5BF8, 0xF5BC, 0x5FD6, 0xF5BD, 0x6751, 0xF5BE, 0x90A8, + 0xF5BF, 0x53E2, 0xF5C0, 0x585A, 0xF5C1, 0x5BF5, 0xF5C2, 0x60A4, + 0xF5C3, 0x6181, 0xF5C4, 0x6460, 0xF5C5, 0x7E3D, 0xF5C6, 0x8070, + 0xF5C7, 0x8525, 0xF5C8, 0x9283, 0xF5C9, 0x64AE, 0xF5CA, 0x50AC, + 0xF5CB, 0x5D14, 0xF5CC, 0x6700, 0xF5CD, 0x589C, 0xF5CE, 0x62BD, + 0xF5CF, 0x63A8, 0xF5D0, 0x690E, 0xF5D1, 0x6978, 0xF5D2, 0x6A1E, + 0xF5D3, 0x6E6B, 0xF5D4, 0x76BA, 0xF5D5, 0x79CB, 0xF5D6, 0x82BB, + 0xF5D7, 0x8429, 0xF5D8, 0x8ACF, 0xF5D9, 0x8DA8, 0xF5DA, 0x8FFD, + 0xF5DB, 0x9112, 0xF5DC, 0x914B, 0xF5DD, 0x919C, 0xF5DE, 0x9310, + 0xF5DF, 0x9318, 0xF5E0, 0x939A, 0xF5E1, 0x96DB, 0xF5E2, 0x9A36, + 0xF5E3, 0x9C0D, 0xF5E4, 0x4E11, 0xF5E5, 0x755C, 0xF5E6, 0x795D, + 0xF5E7, 0x7AFA, 0xF5E8, 0x7B51, 0xF5E9, 0x7BC9, 0xF5EA, 0x7E2E, + 0xF5EB, 0x84C4, 0xF5EC, 0x8E59, 0xF5ED, 0x8E74, 0xF5EE, 0x8EF8, + 0xF5EF, 0x9010, 0xF5F0, 0x6625, 0xF5F1, 0x693F, 0xF5F2, 0x7443, + 0xF5F3, 0x51FA, 0xF5F4, 0x672E, 0xF5F5, 0x9EDC, 0xF5F6, 0x5145, + 0xF5F7, 0x5FE0, 0xF5F8, 0x6C96, 0xF5F9, 0x87F2, 0xF5FA, 0x885D, + 0xF5FB, 0x8877, 0xF5FC, 0x60B4, 0xF5FD, 0x81B5, 0xF5FE, 0x8403, + 0xF6A1, 0x8D05, 0xF6A2, 0x53D6, 0xF6A3, 0x5439, 0xF6A4, 0x5634, + 0xF6A5, 0x5A36, 0xF6A6, 0x5C31, 0xF6A7, 0x708A, 0xF6A8, 0x7FE0, + 0xF6A9, 0x805A, 0xF6AA, 0x8106, 0xF6AB, 0x81ED, 0xF6AC, 0x8DA3, + 0xF6AD, 0x9189, 0xF6AE, 0x9A5F, 0xF6AF, 0x9DF2, 0xF6B0, 0x5074, + 0xF6B1, 0x4EC4, 0xF6B2, 0x53A0, 0xF6B3, 0x60FB, 0xF6B4, 0x6E2C, + 0xF6B5, 0x5C64, 0xF6B6, 0x4F88, 0xF6B7, 0x5024, 0xF6B8, 0x55E4, + 0xF6B9, 0x5CD9, 0xF6BA, 0x5E5F, 0xF6BB, 0x6065, 0xF6BC, 0x6894, + 0xF6BD, 0x6CBB, 0xF6BE, 0x6DC4, 0xF6BF, 0x71BE, 0xF6C0, 0x75D4, + 0xF6C1, 0x75F4, 0xF6C2, 0x7661, 0xF6C3, 0x7A1A, 0xF6C4, 0x7A49, + 0xF6C5, 0x7DC7, 0xF6C6, 0x7DFB, 0xF6C7, 0x7F6E, 0xF6C8, 0x81F4, + 0xF6C9, 0x86A9, 0xF6CA, 0x8F1C, 0xF6CB, 0x96C9, 0xF6CC, 0x99B3, + 0xF6CD, 0x9F52, 0xF6CE, 0x5247, 0xF6CF, 0x52C5, 0xF6D0, 0x98ED, + 0xF6D1, 0x89AA, 0xF6D2, 0x4E03, 0xF6D3, 0x67D2, 0xF6D4, 0x6F06, + 0xF6D5, 0x4FB5, 0xF6D6, 0x5BE2, 0xF6D7, 0x6795, 0xF6D8, 0x6C88, + 0xF6D9, 0x6D78, 0xF6DA, 0x741B, 0xF6DB, 0x7827, 0xF6DC, 0x91DD, + 0xF6DD, 0x937C, 0xF6DE, 0x87C4, 0xF6DF, 0x79E4, 0xF6E0, 0x7A31, + 0xF6E1, 0x5FEB, 0xF6E2, 0x4ED6, 0xF6E3, 0x54A4, 0xF6E4, 0x553E, + 0xF6E5, 0x58AE, 0xF6E6, 0x59A5, 0xF6E7, 0x60F0, 0xF6E8, 0x6253, + 0xF6E9, 0x62D6, 0xF6EA, 0x6736, 0xF6EB, 0x6955, 0xF6EC, 0x8235, + 0xF6ED, 0x9640, 0xF6EE, 0x99B1, 0xF6EF, 0x99DD, 0xF6F0, 0x502C, + 0xF6F1, 0x5353, 0xF6F2, 0x5544, 0xF6F3, 0x577C, 0xF6F4, 0xFA01, + 0xF6F5, 0x6258, 0xF6F6, 0xFA02, 0xF6F7, 0x64E2, 0xF6F8, 0x666B, + 0xF6F9, 0x67DD, 0xF6FA, 0x6FC1, 0xF6FB, 0x6FEF, 0xF6FC, 0x7422, + 0xF6FD, 0x7438, 0xF6FE, 0x8A17, 0xF7A1, 0x9438, 0xF7A2, 0x5451, + 0xF7A3, 0x5606, 0xF7A4, 0x5766, 0xF7A5, 0x5F48, 0xF7A6, 0x619A, + 0xF7A7, 0x6B4E, 0xF7A8, 0x7058, 0xF7A9, 0x70AD, 0xF7AA, 0x7DBB, + 0xF7AB, 0x8A95, 0xF7AC, 0x596A, 0xF7AD, 0x812B, 0xF7AE, 0x63A2, + 0xF7AF, 0x7708, 0xF7B0, 0x803D, 0xF7B1, 0x8CAA, 0xF7B2, 0x5854, + 0xF7B3, 0x642D, 0xF7B4, 0x69BB, 0xF7B5, 0x5B95, 0xF7B6, 0x5E11, + 0xF7B7, 0x6E6F, 0xF7B8, 0xFA03, 0xF7B9, 0x8569, 0xF7BA, 0x514C, + 0xF7BB, 0x53F0, 0xF7BC, 0x592A, 0xF7BD, 0x6020, 0xF7BE, 0x614B, + 0xF7BF, 0x6B86, 0xF7C0, 0x6C70, 0xF7C1, 0x6CF0, 0xF7C2, 0x7B1E, + 0xF7C3, 0x80CE, 0xF7C4, 0x82D4, 0xF7C5, 0x8DC6, 0xF7C6, 0x90B0, + 0xF7C7, 0x98B1, 0xF7C8, 0xFA04, 0xF7C9, 0x64C7, 0xF7CA, 0x6FA4, + 0xF7CB, 0x6491, 0xF7CC, 0x6504, 0xF7CD, 0x514E, 0xF7CE, 0x5410, + 0xF7CF, 0x571F, 0xF7D0, 0x8A0E, 0xF7D1, 0x615F, 0xF7D2, 0x6876, + 0xF7D3, 0xFA05, 0xF7D4, 0x75DB, 0xF7D5, 0x7B52, 0xF7D6, 0x7D71, + 0xF7D7, 0x901A, 0xF7D8, 0x5806, 0xF7D9, 0x69CC, 0xF7DA, 0x817F, + 0xF7DB, 0x892A, 0xF7DC, 0x9000, 0xF7DD, 0x9839, 0xF7DE, 0x5078, + 0xF7DF, 0x5957, 0xF7E0, 0x59AC, 0xF7E1, 0x6295, 0xF7E2, 0x900F, + 0xF7E3, 0x9B2A, 0xF7E4, 0x615D, 0xF7E5, 0x7279, 0xF7E6, 0x95D6, + 0xF7E7, 0x5761, 0xF7E8, 0x5A46, 0xF7E9, 0x5DF4, 0xF7EA, 0x628A, + 0xF7EB, 0x64AD, 0xF7EC, 0x64FA, 0xF7ED, 0x6777, 0xF7EE, 0x6CE2, + 0xF7EF, 0x6D3E, 0xF7F0, 0x722C, 0xF7F1, 0x7436, 0xF7F2, 0x7834, + 0xF7F3, 0x7F77, 0xF7F4, 0x82AD, 0xF7F5, 0x8DDB, 0xF7F6, 0x9817, + 0xF7F7, 0x5224, 0xF7F8, 0x5742, 0xF7F9, 0x677F, 0xF7FA, 0x7248, + 0xF7FB, 0x74E3, 0xF7FC, 0x8CA9, 0xF7FD, 0x8FA6, 0xF7FE, 0x9211, + 0xF8A1, 0x962A, 0xF8A2, 0x516B, 0xF8A3, 0x53ED, 0xF8A4, 0x634C, + 0xF8A5, 0x4F69, 0xF8A6, 0x5504, 0xF8A7, 0x6096, 0xF8A8, 0x6557, + 0xF8A9, 0x6C9B, 0xF8AA, 0x6D7F, 0xF8AB, 0x724C, 0xF8AC, 0x72FD, + 0xF8AD, 0x7A17, 0xF8AE, 0x8987, 0xF8AF, 0x8C9D, 0xF8B0, 0x5F6D, + 0xF8B1, 0x6F8E, 0xF8B2, 0x70F9, 0xF8B3, 0x81A8, 0xF8B4, 0x610E, + 0xF8B5, 0x4FBF, 0xF8B6, 0x504F, 0xF8B7, 0x6241, 0xF8B8, 0x7247, + 0xF8B9, 0x7BC7, 0xF8BA, 0x7DE8, 0xF8BB, 0x7FE9, 0xF8BC, 0x904D, + 0xF8BD, 0x97AD, 0xF8BE, 0x9A19, 0xF8BF, 0x8CB6, 0xF8C0, 0x576A, + 0xF8C1, 0x5E73, 0xF8C2, 0x67B0, 0xF8C3, 0x840D, 0xF8C4, 0x8A55, + 0xF8C5, 0x5420, 0xF8C6, 0x5B16, 0xF8C7, 0x5E63, 0xF8C8, 0x5EE2, + 0xF8C9, 0x5F0A, 0xF8CA, 0x6583, 0xF8CB, 0x80BA, 0xF8CC, 0x853D, + 0xF8CD, 0x9589, 0xF8CE, 0x965B, 0xF8CF, 0x4F48, 0xF8D0, 0x5305, + 0xF8D1, 0x530D, 0xF8D2, 0x530F, 0xF8D3, 0x5486, 0xF8D4, 0x54FA, + 0xF8D5, 0x5703, 0xF8D6, 0x5E03, 0xF8D7, 0x6016, 0xF8D8, 0x629B, + 0xF8D9, 0x62B1, 0xF8DA, 0x6355, 0xF8DB, 0xFA06, 0xF8DC, 0x6CE1, + 0xF8DD, 0x6D66, 0xF8DE, 0x75B1, 0xF8DF, 0x7832, 0xF8E0, 0x80DE, + 0xF8E1, 0x812F, 0xF8E2, 0x82DE, 0xF8E3, 0x8461, 0xF8E4, 0x84B2, + 0xF8E5, 0x888D, 0xF8E6, 0x8912, 0xF8E7, 0x900B, 0xF8E8, 0x92EA, + 0xF8E9, 0x98FD, 0xF8EA, 0x9B91, 0xF8EB, 0x5E45, 0xF8EC, 0x66B4, + 0xF8ED, 0x66DD, 0xF8EE, 0x7011, 0xF8EF, 0x7206, 0xF8F0, 0xFA07, + 0xF8F1, 0x4FF5, 0xF8F2, 0x527D, 0xF8F3, 0x5F6A, 0xF8F4, 0x6153, + 0xF8F5, 0x6753, 0xF8F6, 0x6A19, 0xF8F7, 0x6F02, 0xF8F8, 0x74E2, + 0xF8F9, 0x7968, 0xF8FA, 0x8868, 0xF8FB, 0x8C79, 0xF8FC, 0x98C7, + 0xF8FD, 0x98C4, 0xF8FE, 0x9A43, 0xF9A1, 0x54C1, 0xF9A2, 0x7A1F, + 0xF9A3, 0x6953, 0xF9A4, 0x8AF7, 0xF9A5, 0x8C4A, 0xF9A6, 0x98A8, + 0xF9A7, 0x99AE, 0xF9A8, 0x5F7C, 0xF9A9, 0x62AB, 0xF9AA, 0x75B2, + 0xF9AB, 0x76AE, 0xF9AC, 0x88AB, 0xF9AD, 0x907F, 0xF9AE, 0x9642, + 0xF9AF, 0x5339, 0xF9B0, 0x5F3C, 0xF9B1, 0x5FC5, 0xF9B2, 0x6CCC, + 0xF9B3, 0x73CC, 0xF9B4, 0x7562, 0xF9B5, 0x758B, 0xF9B6, 0x7B46, + 0xF9B7, 0x82FE, 0xF9B8, 0x999D, 0xF9B9, 0x4E4F, 0xF9BA, 0x903C, + 0xF9BB, 0x4E0B, 0xF9BC, 0x4F55, 0xF9BD, 0x53A6, 0xF9BE, 0x590F, + 0xF9BF, 0x5EC8, 0xF9C0, 0x6630, 0xF9C1, 0x6CB3, 0xF9C2, 0x7455, + 0xF9C3, 0x8377, 0xF9C4, 0x8766, 0xF9C5, 0x8CC0, 0xF9C6, 0x9050, + 0xF9C7, 0x971E, 0xF9C8, 0x9C15, 0xF9C9, 0x58D1, 0xF9CA, 0x5B78, + 0xF9CB, 0x8650, 0xF9CC, 0x8B14, 0xF9CD, 0x9DB4, 0xF9CE, 0x5BD2, + 0xF9CF, 0x6068, 0xF9D0, 0x608D, 0xF9D1, 0x65F1, 0xF9D2, 0x6C57, + 0xF9D3, 0x6F22, 0xF9D4, 0x6FA3, 0xF9D5, 0x701A, 0xF9D6, 0x7F55, + 0xF9D7, 0x7FF0, 0xF9D8, 0x9591, 0xF9D9, 0x9592, 0xF9DA, 0x9650, + 0xF9DB, 0x97D3, 0xF9DC, 0x5272, 0xF9DD, 0x8F44, 0xF9DE, 0x51FD, + 0xF9DF, 0x542B, 0xF9E0, 0x54B8, 0xF9E1, 0x5563, 0xF9E2, 0x558A, + 0xF9E3, 0x6ABB, 0xF9E4, 0x6DB5, 0xF9E5, 0x7DD8, 0xF9E6, 0x8266, + 0xF9E7, 0x929C, 0xF9E8, 0x9677, 0xF9E9, 0x9E79, 0xF9EA, 0x5408, + 0xF9EB, 0x54C8, 0xF9EC, 0x76D2, 0xF9ED, 0x86E4, 0xF9EE, 0x95A4, + 0xF9EF, 0x95D4, 0xF9F0, 0x965C, 0xF9F1, 0x4EA2, 0xF9F2, 0x4F09, + 0xF9F3, 0x59EE, 0xF9F4, 0x5AE6, 0xF9F5, 0x5DF7, 0xF9F6, 0x6052, + 0xF9F7, 0x6297, 0xF9F8, 0x676D, 0xF9F9, 0x6841, 0xF9FA, 0x6C86, + 0xF9FB, 0x6E2F, 0xF9FC, 0x7F38, 0xF9FD, 0x809B, 0xF9FE, 0x822A, + 0xFAA1, 0xFA08, 0xFAA2, 0xFA09, 0xFAA3, 0x9805, 0xFAA4, 0x4EA5, + 0xFAA5, 0x5055, 0xFAA6, 0x54B3, 0xFAA7, 0x5793, 0xFAA8, 0x595A, + 0xFAA9, 0x5B69, 0xFAAA, 0x5BB3, 0xFAAB, 0x61C8, 0xFAAC, 0x6977, + 0xFAAD, 0x6D77, 0xFAAE, 0x7023, 0xFAAF, 0x87F9, 0xFAB0, 0x89E3, + 0xFAB1, 0x8A72, 0xFAB2, 0x8AE7, 0xFAB3, 0x9082, 0xFAB4, 0x99ED, + 0xFAB5, 0x9AB8, 0xFAB6, 0x52BE, 0xFAB7, 0x6838, 0xFAB8, 0x5016, + 0xFAB9, 0x5E78, 0xFABA, 0x674F, 0xFABB, 0x8347, 0xFABC, 0x884C, + 0xFABD, 0x4EAB, 0xFABE, 0x5411, 0xFABF, 0x56AE, 0xFAC0, 0x73E6, + 0xFAC1, 0x9115, 0xFAC2, 0x97FF, 0xFAC3, 0x9909, 0xFAC4, 0x9957, + 0xFAC5, 0x9999, 0xFAC6, 0x5653, 0xFAC7, 0x589F, 0xFAC8, 0x865B, + 0xFAC9, 0x8A31, 0xFACA, 0x61B2, 0xFACB, 0x6AF6, 0xFACC, 0x737B, + 0xFACD, 0x8ED2, 0xFACE, 0x6B47, 0xFACF, 0x96AA, 0xFAD0, 0x9A57, + 0xFAD1, 0x5955, 0xFAD2, 0x7200, 0xFAD3, 0x8D6B, 0xFAD4, 0x9769, + 0xFAD5, 0x4FD4, 0xFAD6, 0x5CF4, 0xFAD7, 0x5F26, 0xFAD8, 0x61F8, + 0xFAD9, 0x665B, 0xFADA, 0x6CEB, 0xFADB, 0x70AB, 0xFADC, 0x7384, + 0xFADD, 0x73B9, 0xFADE, 0x73FE, 0xFADF, 0x7729, 0xFAE0, 0x774D, + 0xFAE1, 0x7D43, 0xFAE2, 0x7D62, 0xFAE3, 0x7E23, 0xFAE4, 0x8237, + 0xFAE5, 0x8852, 0xFAE6, 0xFA0A, 0xFAE7, 0x8CE2, 0xFAE8, 0x9249, + 0xFAE9, 0x986F, 0xFAEA, 0x5B51, 0xFAEB, 0x7A74, 0xFAEC, 0x8840, + 0xFAED, 0x9801, 0xFAEE, 0x5ACC, 0xFAEF, 0x4FE0, 0xFAF0, 0x5354, + 0xFAF1, 0x593E, 0xFAF2, 0x5CFD, 0xFAF3, 0x633E, 0xFAF4, 0x6D79, + 0xFAF5, 0x72F9, 0xFAF6, 0x8105, 0xFAF7, 0x8107, 0xFAF8, 0x83A2, + 0xFAF9, 0x92CF, 0xFAFA, 0x9830, 0xFAFB, 0x4EA8, 0xFAFC, 0x5144, + 0xFAFD, 0x5211, 0xFAFE, 0x578B, 0xFBA1, 0x5F62, 0xFBA2, 0x6CC2, + 0xFBA3, 0x6ECE, 0xFBA4, 0x7005, 0xFBA5, 0x7050, 0xFBA6, 0x70AF, + 0xFBA7, 0x7192, 0xFBA8, 0x73E9, 0xFBA9, 0x7469, 0xFBAA, 0x834A, + 0xFBAB, 0x87A2, 0xFBAC, 0x8861, 0xFBAD, 0x9008, 0xFBAE, 0x90A2, + 0xFBAF, 0x93A3, 0xFBB0, 0x99A8, 0xFBB1, 0x516E, 0xFBB2, 0x5F57, + 0xFBB3, 0x60E0, 0xFBB4, 0x6167, 0xFBB5, 0x66B3, 0xFBB6, 0x8559, + 0xFBB7, 0x8E4A, 0xFBB8, 0x91AF, 0xFBB9, 0x978B, 0xFBBA, 0x4E4E, + 0xFBBB, 0x4E92, 0xFBBC, 0x547C, 0xFBBD, 0x58D5, 0xFBBE, 0x58FA, + 0xFBBF, 0x597D, 0xFBC0, 0x5CB5, 0xFBC1, 0x5F27, 0xFBC2, 0x6236, + 0xFBC3, 0x6248, 0xFBC4, 0x660A, 0xFBC5, 0x6667, 0xFBC6, 0x6BEB, + 0xFBC7, 0x6D69, 0xFBC8, 0x6DCF, 0xFBC9, 0x6E56, 0xFBCA, 0x6EF8, + 0xFBCB, 0x6F94, 0xFBCC, 0x6FE0, 0xFBCD, 0x6FE9, 0xFBCE, 0x705D, + 0xFBCF, 0x72D0, 0xFBD0, 0x7425, 0xFBD1, 0x745A, 0xFBD2, 0x74E0, + 0xFBD3, 0x7693, 0xFBD4, 0x795C, 0xFBD5, 0x7CCA, 0xFBD6, 0x7E1E, + 0xFBD7, 0x80E1, 0xFBD8, 0x82A6, 0xFBD9, 0x846B, 0xFBDA, 0x84BF, + 0xFBDB, 0x864E, 0xFBDC, 0x865F, 0xFBDD, 0x8774, 0xFBDE, 0x8B77, + 0xFBDF, 0x8C6A, 0xFBE0, 0x93AC, 0xFBE1, 0x9800, 0xFBE2, 0x9865, + 0xFBE3, 0x60D1, 0xFBE4, 0x6216, 0xFBE5, 0x9177, 0xFBE6, 0x5A5A, + 0xFBE7, 0x660F, 0xFBE8, 0x6DF7, 0xFBE9, 0x6E3E, 0xFBEA, 0x743F, + 0xFBEB, 0x9B42, 0xFBEC, 0x5FFD, 0xFBED, 0x60DA, 0xFBEE, 0x7B0F, + 0xFBEF, 0x54C4, 0xFBF0, 0x5F18, 0xFBF1, 0x6C5E, 0xFBF2, 0x6CD3, + 0xFBF3, 0x6D2A, 0xFBF4, 0x70D8, 0xFBF5, 0x7D05, 0xFBF6, 0x8679, + 0xFBF7, 0x8A0C, 0xFBF8, 0x9D3B, 0xFBF9, 0x5316, 0xFBFA, 0x548C, + 0xFBFB, 0x5B05, 0xFBFC, 0x6A3A, 0xFBFD, 0x706B, 0xFBFE, 0x7575, + 0xFCA1, 0x798D, 0xFCA2, 0x79BE, 0xFCA3, 0x82B1, 0xFCA4, 0x83EF, + 0xFCA5, 0x8A71, 0xFCA6, 0x8B41, 0xFCA7, 0x8CA8, 0xFCA8, 0x9774, + 0xFCA9, 0xFA0B, 0xFCAA, 0x64F4, 0xFCAB, 0x652B, 0xFCAC, 0x78BA, + 0xFCAD, 0x78BB, 0xFCAE, 0x7A6B, 0xFCAF, 0x4E38, 0xFCB0, 0x559A, + 0xFCB1, 0x5950, 0xFCB2, 0x5BA6, 0xFCB3, 0x5E7B, 0xFCB4, 0x60A3, + 0xFCB5, 0x63DB, 0xFCB6, 0x6B61, 0xFCB7, 0x6665, 0xFCB8, 0x6853, + 0xFCB9, 0x6E19, 0xFCBA, 0x7165, 0xFCBB, 0x74B0, 0xFCBC, 0x7D08, + 0xFCBD, 0x9084, 0xFCBE, 0x9A69, 0xFCBF, 0x9C25, 0xFCC0, 0x6D3B, + 0xFCC1, 0x6ED1, 0xFCC2, 0x733E, 0xFCC3, 0x8C41, 0xFCC4, 0x95CA, + 0xFCC5, 0x51F0, 0xFCC6, 0x5E4C, 0xFCC7, 0x5FA8, 0xFCC8, 0x604D, + 0xFCC9, 0x60F6, 0xFCCA, 0x6130, 0xFCCB, 0x614C, 0xFCCC, 0x6643, + 0xFCCD, 0x6644, 0xFCCE, 0x69A5, 0xFCCF, 0x6CC1, 0xFCD0, 0x6E5F, + 0xFCD1, 0x6EC9, 0xFCD2, 0x6F62, 0xFCD3, 0x714C, 0xFCD4, 0x749C, + 0xFCD5, 0x7687, 0xFCD6, 0x7BC1, 0xFCD7, 0x7C27, 0xFCD8, 0x8352, + 0xFCD9, 0x8757, 0xFCDA, 0x9051, 0xFCDB, 0x968D, 0xFCDC, 0x9EC3, + 0xFCDD, 0x532F, 0xFCDE, 0x56DE, 0xFCDF, 0x5EFB, 0xFCE0, 0x5F8A, + 0xFCE1, 0x6062, 0xFCE2, 0x6094, 0xFCE3, 0x61F7, 0xFCE4, 0x6666, + 0xFCE5, 0x6703, 0xFCE6, 0x6A9C, 0xFCE7, 0x6DEE, 0xFCE8, 0x6FAE, + 0xFCE9, 0x7070, 0xFCEA, 0x736A, 0xFCEB, 0x7E6A, 0xFCEC, 0x81BE, + 0xFCED, 0x8334, 0xFCEE, 0x86D4, 0xFCEF, 0x8AA8, 0xFCF0, 0x8CC4, + 0xFCF1, 0x5283, 0xFCF2, 0x7372, 0xFCF3, 0x5B96, 0xFCF4, 0x6A6B, + 0xFCF5, 0x9404, 0xFCF6, 0x54EE, 0xFCF7, 0x5686, 0xFCF8, 0x5B5D, + 0xFCF9, 0x6548, 0xFCFA, 0x6585, 0xFCFB, 0x66C9, 0xFCFC, 0x689F, + 0xFCFD, 0x6D8D, 0xFCFE, 0x6DC6, 0xFDA1, 0x723B, 0xFDA2, 0x80B4, + 0xFDA3, 0x9175, 0xFDA4, 0x9A4D, 0xFDA5, 0x4FAF, 0xFDA6, 0x5019, + 0xFDA7, 0x539A, 0xFDA8, 0x540E, 0xFDA9, 0x543C, 0xFDAA, 0x5589, + 0xFDAB, 0x55C5, 0xFDAC, 0x5E3F, 0xFDAD, 0x5F8C, 0xFDAE, 0x673D, + 0xFDAF, 0x7166, 0xFDB0, 0x73DD, 0xFDB1, 0x9005, 0xFDB2, 0x52DB, + 0xFDB3, 0x52F3, 0xFDB4, 0x5864, 0xFDB5, 0x58CE, 0xFDB6, 0x7104, + 0xFDB7, 0x718F, 0xFDB8, 0x71FB, 0xFDB9, 0x85B0, 0xFDBA, 0x8A13, + 0xFDBB, 0x6688, 0xFDBC, 0x85A8, 0xFDBD, 0x55A7, 0xFDBE, 0x6684, + 0xFDBF, 0x714A, 0xFDC0, 0x8431, 0xFDC1, 0x5349, 0xFDC2, 0x5599, + 0xFDC3, 0x6BC1, 0xFDC4, 0x5F59, 0xFDC5, 0x5FBD, 0xFDC6, 0x63EE, + 0xFDC7, 0x6689, 0xFDC8, 0x7147, 0xFDC9, 0x8AF1, 0xFDCA, 0x8F1D, + 0xFDCB, 0x9EBE, 0xFDCC, 0x4F11, 0xFDCD, 0x643A, 0xFDCE, 0x70CB, + 0xFDCF, 0x7566, 0xFDD0, 0x8667, 0xFDD1, 0x6064, 0xFDD2, 0x8B4E, + 0xFDD3, 0x9DF8, 0xFDD4, 0x5147, 0xFDD5, 0x51F6, 0xFDD6, 0x5308, + 0xFDD7, 0x6D36, 0xFDD8, 0x80F8, 0xFDD9, 0x9ED1, 0xFDDA, 0x6615, + 0xFDDB, 0x6B23, 0xFDDC, 0x7098, 0xFDDD, 0x75D5, 0xFDDE, 0x5403, + 0xFDDF, 0x5C79, 0xFDE0, 0x7D07, 0xFDE1, 0x8A16, 0xFDE2, 0x6B20, + 0xFDE3, 0x6B3D, 0xFDE4, 0x6B46, 0xFDE5, 0x5438, 0xFDE6, 0x6070, + 0xFDE7, 0x6D3D, 0xFDE8, 0x7FD5, 0xFDE9, 0x8208, 0xFDEA, 0x50D6, + 0xFDEB, 0x51DE, 0xFDEC, 0x559C, 0xFDED, 0x566B, 0xFDEE, 0x56CD, + 0xFDEF, 0x59EC, 0xFDF0, 0x5B09, 0xFDF1, 0x5E0C, 0xFDF2, 0x6199, + 0xFDF3, 0x6198, 0xFDF4, 0x6231, 0xFDF5, 0x665E, 0xFDF6, 0x66E6, + 0xFDF7, 0x7199, 0xFDF8, 0x71B9, 0xFDF9, 0x71BA, 0xFDFA, 0x72A7, + 0xFDFB, 0x79A7, 0xFDFC, 0x7A00, 0xFDFD, 0x7FB2, 0xFDFE, 0x8A70, + 0, 0 +}; + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src < 0x80) { /* ASCII */ + c = src; + } else { + if (dir) { /* OEMCP to unicode */ + p = oem2uni; + hi = sizeof(oem2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2oem; + hi = sizeof(uni2oem) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; + } + + return c; +} +#else +#error This file is not needed in current configuration. + +#endif diff --git a/bertos/fs/fatfs/option/cc950.c b/bertos/fs/fatfs/option/cc950.c new file mode 100644 index 0000000..8e61677 --- /dev/null +++ b/bertos/fs/fatfs/option/cc950.c @@ -0,0 +1,6814 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - OEM code bidirectional converter (C)ChaN, 2009 */ +/* */ +/* CP950 (Traditional Chinese Big5) */ +/*------------------------------------------------------------------------*/ + +#include "../ff.h" + + +#if _USE_LFN && _CODE_PAGE == 950 + + +static +const WCHAR uni2oem[] = { +/* Unicode - OEM, Unicode - OEM, Unicode - OEM, Unicode - OEM */ + 0x00A7, 0xA1B1, 0x00AF, 0xA1C2, 0x00B0, 0xA258, 0x00B1, 0xA1D3, + 0x00B7, 0xA150, 0x00D7, 0xA1D1, 0x00F7, 0xA1D2, 0x02C7, 0xA3BE, + 0x02C9, 0xA3BC, 0x02CA, 0xA3BD, 0x02CB, 0xA3BF, 0x02CD, 0xA1C5, + 0x02D9, 0xA3BB, 0x0391, 0xA344, 0x0392, 0xA345, 0x0393, 0xA346, + 0x0394, 0xA347, 0x0395, 0xA348, 0x0396, 0xA349, 0x0397, 0xA34A, + 0x0398, 0xA34B, 0x0399, 0xA34C, 0x039A, 0xA34D, 0x039B, 0xA34E, + 0x039C, 0xA34F, 0x039D, 0xA350, 0x039E, 0xA351, 0x039F, 0xA352, + 0x03A0, 0xA353, 0x03A1, 0xA354, 0x03A3, 0xA355, 0x03A4, 0xA356, + 0x03A5, 0xA357, 0x03A6, 0xA358, 0x03A7, 0xA359, 0x03A8, 0xA35A, + 0x03A9, 0xA35B, 0x03B1, 0xA35C, 0x03B2, 0xA35D, 0x03B3, 0xA35E, + 0x03B4, 0xA35F, 0x03B5, 0xA360, 0x03B6, 0xA361, 0x03B7, 0xA362, + 0x03B8, 0xA363, 0x03B9, 0xA364, 0x03BA, 0xA365, 0x03BB, 0xA366, + 0x03BC, 0xA367, 0x03BD, 0xA368, 0x03BE, 0xA369, 0x03BF, 0xA36A, + 0x03C0, 0xA36B, 0x03C1, 0xA36C, 0x03C3, 0xA36D, 0x03C4, 0xA36E, + 0x03C5, 0xA36F, 0x03C6, 0xA370, 0x03C7, 0xA371, 0x03C8, 0xA372, + 0x03C9, 0xA373, 0x2013, 0xA156, 0x2014, 0xA158, 0x2018, 0xA1A5, + 0x2019, 0xA1A6, 0x201C, 0xA1A7, 0x201D, 0xA1A8, 0x2025, 0xA14C, + 0x2026, 0xA14B, 0x2027, 0xA145, 0x2032, 0xA1AC, 0x2035, 0xA1AB, + 0x203B, 0xA1B0, 0x20AC, 0xA3E1, 0x2103, 0xA24A, 0x2105, 0xA1C1, + 0x2109, 0xA24B, 0x2160, 0xA2B9, 0x2161, 0xA2BA, 0x2162, 0xA2BB, + 0x2163, 0xA2BC, 0x2164, 0xA2BD, 0x2165, 0xA2BE, 0x2166, 0xA2BF, + 0x2167, 0xA2C0, 0x2168, 0xA2C1, 0x2169, 0xA2C2, 0x2190, 0xA1F6, + 0x2191, 0xA1F4, 0x2192, 0xA1F7, 0x2193, 0xA1F5, 0x2196, 0xA1F8, + 0x2197, 0xA1F9, 0x2198, 0xA1FB, 0x2199, 0xA1FA, 0x2215, 0xA241, + 0x221A, 0xA1D4, 0x221E, 0xA1DB, 0x221F, 0xA1E8, 0x2220, 0xA1E7, + 0x2223, 0xA1FD, 0x2225, 0xA1FC, 0x2229, 0xA1E4, 0x222A, 0xA1E5, + 0x222B, 0xA1EC, 0x222E, 0xA1ED, 0x2234, 0xA1EF, 0x2235, 0xA1EE, + 0x2252, 0xA1DC, 0x2260, 0xA1DA, 0x2261, 0xA1DD, 0x2266, 0xA1D8, + 0x2267, 0xA1D9, 0x2295, 0xA1F2, 0x2299, 0xA1F3, 0x22A5, 0xA1E6, + 0x22BF, 0xA1E9, 0x2500, 0xA277, 0x2502, 0xA278, 0x250C, 0xA27A, + 0x2510, 0xA27B, 0x2514, 0xA27C, 0x2518, 0xA27D, 0x251C, 0xA275, + 0x2524, 0xA274, 0x252C, 0xA273, 0x2534, 0xA272, 0x253C, 0xA271, + 0x2550, 0xA2A4, 0x2550, 0xF9F9, 0x2551, 0xF9F8, 0x2552, 0xF9E6, + 0x2553, 0xF9EF, 0x2554, 0xF9DD, 0x2555, 0xF9E8, 0x2556, 0xF9F1, + 0x2557, 0xF9DF, 0x2558, 0xF9EC, 0x2559, 0xF9F5, 0x255A, 0xF9E3, + 0x255B, 0xF9EE, 0x255C, 0xF9F7, 0x255D, 0xF9E5, 0x255E, 0xA2A5, + 0x255E, 0xF9E9, 0x255F, 0xF9F2, 0x2560, 0xF9E0, 0x2561, 0xA2A7, + 0x2561, 0xF9EB, 0x2562, 0xF9F4, 0x2563, 0xF9E2, 0x2564, 0xF9E7, + 0x2565, 0xF9F0, 0x2566, 0xF9DE, 0x2567, 0xF9ED, 0x2568, 0xF9F6, + 0x2569, 0xF9E4, 0x256A, 0xA2A6, 0x256A, 0xF9EA, 0x256B, 0xF9F3, + 0x256C, 0xF9E1, 0x256D, 0xA27E, 0x256D, 0xF9FA, 0x256E, 0xA2A1, + 0x256E, 0xF9FB, 0x256F, 0xA2A3, 0x256F, 0xF9FD, 0x2570, 0xA2A2, + 0x2570, 0xF9FC, 0x2571, 0xA2AC, 0x2572, 0xA2AD, 0x2573, 0xA2AE, + 0x2574, 0xA15A, 0x2581, 0xA262, 0x2582, 0xA263, 0x2583, 0xA264, + 0x2584, 0xA265, 0x2585, 0xA266, 0x2586, 0xA267, 0x2587, 0xA268, + 0x2588, 0xA269, 0x2589, 0xA270, 0x258A, 0xA26F, 0x258B, 0xA26E, + 0x258C, 0xA26D, 0x258D, 0xA26C, 0x258E, 0xA26B, 0x258F, 0xA26A, + 0x2593, 0xF9FE, 0x2594, 0xA276, 0x2595, 0xA279, 0x25A0, 0xA1BD, + 0x25A1, 0xA1BC, 0x25B2, 0xA1B6, 0x25B3, 0xA1B5, 0x25BC, 0xA1BF, + 0x25BD, 0xA1BE, 0x25C6, 0xA1BB, 0x25C7, 0xA1BA, 0x25CB, 0xA1B3, + 0x25CE, 0xA1B7, 0x25CF, 0xA1B4, 0x25E2, 0xA2A8, 0x25E3, 0xA2A9, + 0x25E4, 0xA2AB, 0x25E5, 0xA2AA, 0x2605, 0xA1B9, 0x2606, 0xA1B8, + 0x2640, 0xA1F0, 0x2642, 0xA1F1, 0x3000, 0xA140, 0x3001, 0xA142, + 0x3002, 0xA143, 0x3003, 0xA1B2, 0x3008, 0xA171, 0x3009, 0xA172, + 0x300A, 0xA16D, 0x300B, 0xA16E, 0x300C, 0xA175, 0x300D, 0xA176, + 0x300E, 0xA179, 0x300F, 0xA17A, 0x3010, 0xA169, 0x3011, 0xA16A, + 0x3012, 0xA245, 0x3014, 0xA165, 0x3015, 0xA166, 0x301D, 0xA1A9, + 0x301E, 0xA1AA, 0x3021, 0xA2C3, 0x3022, 0xA2C4, 0x3023, 0xA2C5, + 0x3024, 0xA2C6, 0x3025, 0xA2C7, 0x3026, 0xA2C8, 0x3027, 0xA2C9, + 0x3028, 0xA2CA, 0x3029, 0xA2CB, 0x3105, 0xA374, 0x3106, 0xA375, + 0x3107, 0xA376, 0x3108, 0xA377, 0x3109, 0xA378, 0x310A, 0xA379, + 0x310B, 0xA37A, 0x310C, 0xA37B, 0x310D, 0xA37C, 0x310E, 0xA37D, + 0x310F, 0xA37E, 0x3110, 0xA3A1, 0x3111, 0xA3A2, 0x3112, 0xA3A3, + 0x3113, 0xA3A4, 0x3114, 0xA3A5, 0x3115, 0xA3A6, 0x3116, 0xA3A7, + 0x3117, 0xA3A8, 0x3118, 0xA3A9, 0x3119, 0xA3AA, 0x311A, 0xA3AB, + 0x311B, 0xA3AC, 0x311C, 0xA3AD, 0x311D, 0xA3AE, 0x311E, 0xA3AF, + 0x311F, 0xA3B0, 0x3120, 0xA3B1, 0x3121, 0xA3B2, 0x3122, 0xA3B3, + 0x3123, 0xA3B4, 0x3124, 0xA3B5, 0x3125, 0xA3B6, 0x3126, 0xA3B7, + 0x3127, 0xA3B8, 0x3128, 0xA3B9, 0x3129, 0xA3BA, 0x32A3, 0xA1C0, + 0x338E, 0xA255, 0x338F, 0xA256, 0x339C, 0xA250, 0x339D, 0xA251, + 0x339E, 0xA252, 0x33A1, 0xA254, 0x33C4, 0xA257, 0x33CE, 0xA253, + 0x33D1, 0xA1EB, 0x33D2, 0xA1EA, 0x33D5, 0xA24F, 0x4E00, 0xA440, + 0x4E01, 0xA442, 0x4E03, 0xA443, 0x4E07, 0xC945, 0x4E08, 0xA456, + 0x4E09, 0xA454, 0x4E0A, 0xA457, 0x4E0B, 0xA455, 0x4E0C, 0xC946, + 0x4E0D, 0xA4A3, 0x4E0E, 0xC94F, 0x4E0F, 0xC94D, 0x4E10, 0xA4A2, + 0x4E11, 0xA4A1, 0x4E14, 0xA542, 0x4E15, 0xA541, 0x4E16, 0xA540, + 0x4E18, 0xA543, 0x4E19, 0xA4FE, 0x4E1E, 0xA5E0, 0x4E1F, 0xA5E1, + 0x4E26, 0xA8C3, 0x4E2B, 0xA458, 0x4E2D, 0xA4A4, 0x4E2E, 0xC950, + 0x4E30, 0xA4A5, 0x4E31, 0xC963, 0x4E32, 0xA6EA, 0x4E33, 0xCBB1, + 0x4E38, 0xA459, 0x4E39, 0xA4A6, 0x4E3B, 0xA544, 0x4E3C, 0xC964, + 0x4E42, 0xC940, 0x4E43, 0xA444, 0x4E45, 0xA45B, 0x4E47, 0xC947, + 0x4E48, 0xA45C, 0x4E4B, 0xA4A7, 0x4E4D, 0xA545, 0x4E4E, 0xA547, + 0x4E4F, 0xA546, 0x4E52, 0xA5E2, 0x4E53, 0xA5E3, 0x4E56, 0xA8C4, + 0x4E58, 0xADBC, 0x4E59, 0xA441, 0x4E5C, 0xC941, 0x4E5D, 0xA445, + 0x4E5E, 0xA45E, 0x4E5F, 0xA45D, 0x4E69, 0xA5E4, 0x4E73, 0xA8C5, + 0x4E7E, 0xB0AE, 0x4E7F, 0xD44B, 0x4E82, 0xB6C3, 0x4E83, 0xDCB1, + 0x4E84, 0xDCB2, 0x4E86, 0xA446, 0x4E88, 0xA4A9, 0x4E8B, 0xA8C6, + 0x4E8C, 0xA447, 0x4E8D, 0xC948, 0x4E8E, 0xA45F, 0x4E91, 0xA4AA, + 0x4E92, 0xA4AC, 0x4E93, 0xC951, 0x4E94, 0xA4AD, 0x4E95, 0xA4AB, + 0x4E99, 0xA5E5, 0x4E9B, 0xA8C7, 0x4E9E, 0xA8C8, 0x4E9F, 0xAB45, + 0x4EA1, 0xA460, 0x4EA2, 0xA4AE, 0x4EA4, 0xA5E6, 0x4EA5, 0xA5E8, + 0x4EA6, 0xA5E7, 0x4EA8, 0xA6EB, 0x4EAB, 0xA8C9, 0x4EAC, 0xA8CA, + 0x4EAD, 0xAB46, 0x4EAE, 0xAB47, 0x4EB3, 0xADBD, 0x4EB6, 0xDCB3, + 0x4EB9, 0xF6D6, 0x4EBA, 0xA448, 0x4EC0, 0xA4B0, 0x4EC1, 0xA4AF, + 0x4EC2, 0xC952, 0x4EC3, 0xA4B1, 0x4EC4, 0xA4B7, 0x4EC6, 0xA4B2, + 0x4EC7, 0xA4B3, 0x4EC8, 0xC954, 0x4EC9, 0xC953, 0x4ECA, 0xA4B5, + 0x4ECB, 0xA4B6, 0x4ECD, 0xA4B4, 0x4ED4, 0xA54A, 0x4ED5, 0xA54B, + 0x4ED6, 0xA54C, 0x4ED7, 0xA54D, 0x4ED8, 0xA549, 0x4ED9, 0xA550, + 0x4EDA, 0xC96A, 0x4EDC, 0xC966, 0x4EDD, 0xC969, 0x4EDE, 0xA551, + 0x4EDF, 0xA561, 0x4EE1, 0xC968, 0x4EE3, 0xA54E, 0x4EE4, 0xA54F, + 0x4EE5, 0xA548, 0x4EE8, 0xC965, 0x4EE9, 0xC967, 0x4EF0, 0xA5F5, + 0x4EF1, 0xC9B0, 0x4EF2, 0xA5F2, 0x4EF3, 0xA5F6, 0x4EF4, 0xC9BA, + 0x4EF5, 0xC9AE, 0x4EF6, 0xA5F3, 0x4EF7, 0xC9B2, 0x4EFB, 0xA5F4, + 0x4EFD, 0xA5F7, 0x4EFF, 0xA5E9, 0x4F00, 0xC9B1, 0x4F01, 0xA5F8, + 0x4F02, 0xC9B5, 0x4F04, 0xC9B9, 0x4F05, 0xC9B6, 0x4F08, 0xC9B3, + 0x4F09, 0xA5EA, 0x4F0A, 0xA5EC, 0x4F0B, 0xA5F9, 0x4F0D, 0xA5EE, + 0x4F0E, 0xC9AB, 0x4F0F, 0xA5F1, 0x4F10, 0xA5EF, 0x4F11, 0xA5F0, + 0x4F12, 0xC9BB, 0x4F13, 0xC9B8, 0x4F14, 0xC9AF, 0x4F15, 0xA5ED, + 0x4F18, 0xC9AC, 0x4F19, 0xA5EB, 0x4F1D, 0xC9B4, 0x4F22, 0xC9B7, + 0x4F2C, 0xC9AD, 0x4F2D, 0xCA66, 0x4F2F, 0xA742, 0x4F30, 0xA6F4, + 0x4F33, 0xCA67, 0x4F34, 0xA6F1, 0x4F36, 0xA744, 0x4F38, 0xA6F9, + 0x4F3A, 0xA6F8, 0x4F3B, 0xCA5B, 0x4F3C, 0xA6FC, 0x4F3D, 0xA6F7, + 0x4F3E, 0xCA60, 0x4F3F, 0xCA68, 0x4F41, 0xCA64, 0x4F43, 0xA6FA, + 0x4F46, 0xA6FD, 0x4F47, 0xA6EE, 0x4F48, 0xA747, 0x4F49, 0xCA5D, + 0x4F4C, 0xCBBD, 0x4F4D, 0xA6EC, 0x4F4E, 0xA743, 0x4F4F, 0xA6ED, + 0x4F50, 0xA6F5, 0x4F51, 0xA6F6, 0x4F52, 0xCA62, 0x4F53, 0xCA5E, + 0x4F54, 0xA6FB, 0x4F55, 0xA6F3, 0x4F56, 0xCA5A, 0x4F57, 0xA6EF, + 0x4F58, 0xCA65, 0x4F59, 0xA745, 0x4F5A, 0xA748, 0x4F5B, 0xA6F2, + 0x4F5C, 0xA740, 0x4F5D, 0xA746, 0x4F5E, 0xA6F0, 0x4F5F, 0xCA63, + 0x4F60, 0xA741, 0x4F61, 0xCA69, 0x4F62, 0xCA5C, 0x4F63, 0xA6FE, + 0x4F64, 0xCA5F, 0x4F67, 0xCA61, 0x4F69, 0xA8D8, 0x4F6A, 0xCBBF, + 0x4F6B, 0xCBCB, 0x4F6C, 0xA8D0, 0x4F6E, 0xCBCC, 0x4F6F, 0xA8CB, + 0x4F70, 0xA8D5, 0x4F73, 0xA8CE, 0x4F74, 0xCBB9, 0x4F75, 0xA8D6, + 0x4F76, 0xCBB8, 0x4F77, 0xCBBC, 0x4F78, 0xCBC3, 0x4F79, 0xCBC1, + 0x4F7A, 0xA8DE, 0x4F7B, 0xA8D9, 0x4F7C, 0xCBB3, 0x4F7D, 0xCBB5, + 0x4F7E, 0xA8DB, 0x4F7F, 0xA8CF, 0x4F80, 0xCBB6, 0x4F81, 0xCBC2, + 0x4F82, 0xCBC9, 0x4F83, 0xA8D4, 0x4F84, 0xCBBB, 0x4F85, 0xCBB4, + 0x4F86, 0xA8D3, 0x4F87, 0xCBB7, 0x4F88, 0xA8D7, 0x4F89, 0xCBBA, + 0x4F8B, 0xA8D2, 0x4F8D, 0xA8CD, 0x4F8F, 0xA8DC, 0x4F90, 0xCBC4, + 0x4F91, 0xA8DD, 0x4F92, 0xCBC8, 0x4F94, 0xCBC6, 0x4F95, 0xCBCA, + 0x4F96, 0xA8DA, 0x4F97, 0xCBBE, 0x4F98, 0xCBB2, 0x4F9A, 0xCBC0, + 0x4F9B, 0xA8D1, 0x4F9C, 0xCBC5, 0x4F9D, 0xA8CC, 0x4F9E, 0xCBC7, + 0x4FAE, 0xAB56, 0x4FAF, 0xAB4A, 0x4FB2, 0xCDE0, 0x4FB3, 0xCDE8, + 0x4FB5, 0xAB49, 0x4FB6, 0xAB51, 0x4FB7, 0xAB5D, 0x4FB9, 0xCDEE, + 0x4FBA, 0xCDEC, 0x4FBB, 0xCDE7, 0x4FBF, 0xAB4B, 0x4FC0, 0xCDED, + 0x4FC1, 0xCDE3, 0x4FC2, 0xAB59, 0x4FC3, 0xAB50, 0x4FC4, 0xAB58, + 0x4FC5, 0xCDDE, 0x4FC7, 0xCDEA, 0x4FC9, 0xCDE1, 0x4FCA, 0xAB54, + 0x4FCB, 0xCDE2, 0x4FCD, 0xCDDD, 0x4FCE, 0xAB5B, 0x4FCF, 0xAB4E, + 0x4FD0, 0xAB57, 0x4FD1, 0xAB4D, 0x4FD3, 0xCDDF, 0x4FD4, 0xCDE4, + 0x4FD6, 0xCDEB, 0x4FD7, 0xAB55, 0x4FD8, 0xAB52, 0x4FD9, 0xCDE6, + 0x4FDA, 0xAB5A, 0x4FDB, 0xCDE9, 0x4FDC, 0xCDE5, 0x4FDD, 0xAB4F, + 0x4FDE, 0xAB5C, 0x4FDF, 0xAB53, 0x4FE0, 0xAB4C, 0x4FE1, 0xAB48, + 0x4FEC, 0xCDEF, 0x4FEE, 0xADD7, 0x4FEF, 0xADC1, 0x4FF1, 0xADD1, + 0x4FF3, 0xADD6, 0x4FF4, 0xD0D0, 0x4FF5, 0xD0CF, 0x4FF6, 0xD0D4, + 0x4FF7, 0xD0D5, 0x4FF8, 0xADC4, 0x4FFA, 0xADCD, 0x4FFE, 0xADDA, + 0x5000, 0xADCE, 0x5005, 0xD0C9, 0x5006, 0xADC7, 0x5007, 0xD0CA, + 0x5009, 0xADDC, 0x500B, 0xADD3, 0x500C, 0xADBE, 0x500D, 0xADBF, + 0x500E, 0xD0DD, 0x500F, 0xB0BF, 0x5011, 0xADCC, 0x5012, 0xADCB, + 0x5013, 0xD0CB, 0x5014, 0xADCF, 0x5015, 0xD45B, 0x5016, 0xADC6, + 0x5017, 0xD0D6, 0x5018, 0xADD5, 0x5019, 0xADD4, 0x501A, 0xADCA, + 0x501B, 0xD0CE, 0x501C, 0xD0D7, 0x501E, 0xD0C8, 0x501F, 0xADC9, + 0x5020, 0xD0D8, 0x5021, 0xADD2, 0x5022, 0xD0CC, 0x5023, 0xADC0, + 0x5025, 0xADC3, 0x5026, 0xADC2, 0x5027, 0xD0D9, 0x5028, 0xADD0, + 0x5029, 0xADC5, 0x502A, 0xADD9, 0x502B, 0xADDB, 0x502C, 0xD0D3, + 0x502D, 0xADD8, 0x502F, 0xD0DB, 0x5030, 0xD0CD, 0x5031, 0xD0DC, + 0x5033, 0xD0D1, 0x5035, 0xD0DA, 0x5037, 0xD0D2, 0x503C, 0xADC8, + 0x5040, 0xD463, 0x5041, 0xD457, 0x5043, 0xB0B3, 0x5045, 0xD45C, + 0x5046, 0xD462, 0x5047, 0xB0B2, 0x5048, 0xD455, 0x5049, 0xB0B6, + 0x504A, 0xD459, 0x504B, 0xD452, 0x504C, 0xB0B4, 0x504D, 0xD456, + 0x504E, 0xB0B9, 0x504F, 0xB0BE, 0x5051, 0xD467, 0x5053, 0xD451, + 0x5055, 0xB0BA, 0x5057, 0xD466, 0x505A, 0xB0B5, 0x505B, 0xD458, + 0x505C, 0xB0B1, 0x505D, 0xD453, 0x505E, 0xD44F, 0x505F, 0xD45D, + 0x5060, 0xD450, 0x5061, 0xD44E, 0x5062, 0xD45A, 0x5063, 0xD460, + 0x5064, 0xD461, 0x5065, 0xB0B7, 0x5068, 0xD85B, 0x5069, 0xD45E, + 0x506A, 0xD44D, 0x506B, 0xD45F, 0x506D, 0xB0C1, 0x506E, 0xD464, + 0x506F, 0xB0C0, 0x5070, 0xD44C, 0x5072, 0xD454, 0x5073, 0xD465, + 0x5074, 0xB0BC, 0x5075, 0xB0BB, 0x5076, 0xB0B8, 0x5077, 0xB0BD, + 0x507A, 0xB0AF, 0x507D, 0xB0B0, 0x5080, 0xB3C8, 0x5082, 0xD85E, + 0x5083, 0xD857, 0x5085, 0xB3C5, 0x5087, 0xD85F, 0x508B, 0xD855, + 0x508C, 0xD858, 0x508D, 0xB3C4, 0x508E, 0xD859, 0x5091, 0xB3C7, + 0x5092, 0xD85D, 0x5094, 0xD853, 0x5095, 0xD852, 0x5096, 0xB3C9, + 0x5098, 0xB3CA, 0x5099, 0xB3C6, 0x509A, 0xB3CB, 0x509B, 0xD851, + 0x509C, 0xD85C, 0x509D, 0xD85A, 0x509E, 0xD854, 0x50A2, 0xB3C3, + 0x50A3, 0xD856, 0x50AC, 0xB6CA, 0x50AD, 0xB6C4, 0x50AE, 0xDCB7, + 0x50AF, 0xB6CD, 0x50B0, 0xDCBD, 0x50B1, 0xDCC0, 0x50B2, 0xB6C6, + 0x50B3, 0xB6C7, 0x50B4, 0xDCBA, 0x50B5, 0xB6C5, 0x50B6, 0xDCC3, + 0x50B7, 0xB6CB, 0x50B8, 0xDCC4, 0x50BA, 0xDCBF, 0x50BB, 0xB6CC, + 0x50BD, 0xDCB4, 0x50BE, 0xB6C9, 0x50BF, 0xDCB5, 0x50C1, 0xDCBE, + 0x50C2, 0xDCBC, 0x50C4, 0xDCB8, 0x50C5, 0xB6C8, 0x50C6, 0xDCB6, + 0x50C7, 0xB6CE, 0x50C8, 0xDCBB, 0x50C9, 0xDCC2, 0x50CA, 0xDCB9, + 0x50CB, 0xDCC1, 0x50CE, 0xB9B6, 0x50CF, 0xB9B3, 0x50D1, 0xB9B4, + 0x50D3, 0xE0F9, 0x50D4, 0xE0F1, 0x50D5, 0xB9B2, 0x50D6, 0xB9AF, + 0x50D7, 0xE0F2, 0x50DA, 0xB9B1, 0x50DB, 0xE0F5, 0x50DD, 0xE0F7, + 0x50E0, 0xE0FE, 0x50E3, 0xE0FD, 0x50E4, 0xE0F8, 0x50E5, 0xB9AE, + 0x50E6, 0xE0F0, 0x50E7, 0xB9AC, 0x50E8, 0xE0F3, 0x50E9, 0xB9B7, + 0x50EA, 0xE0F6, 0x50EC, 0xE0FA, 0x50ED, 0xB9B0, 0x50EE, 0xB9AD, + 0x50EF, 0xE0FC, 0x50F0, 0xE0FB, 0x50F1, 0xB9B5, 0x50F3, 0xE0F4, + 0x50F5, 0xBBF8, 0x50F6, 0xE4EC, 0x50F8, 0xE4E9, 0x50F9, 0xBBF9, + 0x50FB, 0xBBF7, 0x50FD, 0xE4F0, 0x50FE, 0xE4ED, 0x50FF, 0xE4E6, + 0x5100, 0xBBF6, 0x5102, 0xBBFA, 0x5103, 0xE4E7, 0x5104, 0xBBF5, + 0x5105, 0xBBFD, 0x5106, 0xE4EA, 0x5107, 0xE4EB, 0x5108, 0xBBFB, + 0x5109, 0xBBFC, 0x510A, 0xE4F1, 0x510B, 0xE4EE, 0x510C, 0xE4EF, + 0x5110, 0xBEAA, 0x5111, 0xE8F8, 0x5112, 0xBEA7, 0x5113, 0xE8F5, + 0x5114, 0xBEA9, 0x5115, 0xBEAB, 0x5117, 0xE8F6, 0x5118, 0xBEA8, + 0x511A, 0xE8F7, 0x511C, 0xE8F4, 0x511F, 0xC076, 0x5120, 0xECBD, + 0x5121, 0xC077, 0x5122, 0xECBB, 0x5124, 0xECBC, 0x5125, 0xECBA, + 0x5126, 0xECB9, 0x5129, 0xECBE, 0x512A, 0xC075, 0x512D, 0xEFB8, + 0x512E, 0xEFB9, 0x5130, 0xE4E8, 0x5131, 0xEFB7, 0x5132, 0xC078, + 0x5133, 0xC35F, 0x5134, 0xF1EB, 0x5135, 0xF1EC, 0x5137, 0xC4D7, + 0x5138, 0xC4D8, 0x5139, 0xF5C1, 0x513A, 0xF5C0, 0x513B, 0xC56C, + 0x513C, 0xC56B, 0x513D, 0xF7D0, 0x513F, 0xA449, 0x5140, 0xA461, + 0x5141, 0xA4B9, 0x5143, 0xA4B8, 0x5144, 0xA553, 0x5145, 0xA552, + 0x5146, 0xA5FC, 0x5147, 0xA5FB, 0x5148, 0xA5FD, 0x5149, 0xA5FA, + 0x514B, 0xA74A, 0x514C, 0xA749, 0x514D, 0xA74B, 0x5152, 0xA8E0, + 0x5154, 0xA8DF, 0x5155, 0xA8E1, 0x5157, 0xAB5E, 0x5159, 0xA259, + 0x515A, 0xD0DE, 0x515B, 0xA25A, 0x515C, 0xB0C2, 0x515D, 0xA25C, + 0x515E, 0xA25B, 0x515F, 0xD860, 0x5161, 0xA25D, 0x5162, 0xB9B8, + 0x5163, 0xA25E, 0x5165, 0xA44A, 0x5167, 0xA4BA, 0x5168, 0xA5FE, + 0x5169, 0xA8E2, 0x516B, 0xA44B, 0x516C, 0xA4BD, 0x516D, 0xA4BB, + 0x516E, 0xA4BC, 0x5171, 0xA640, 0x5175, 0xA74C, 0x5176, 0xA8E4, + 0x5177, 0xA8E3, 0x5178, 0xA8E5, 0x517C, 0xADDD, 0x5180, 0xBEAC, + 0x5187, 0xC94E, 0x5189, 0xA554, 0x518A, 0xA555, 0x518D, 0xA641, + 0x518F, 0xCA6A, 0x5191, 0xAB60, 0x5192, 0xAB5F, 0x5193, 0xD0E0, + 0x5194, 0xD0DF, 0x5195, 0xB0C3, 0x5197, 0xA4BE, 0x5198, 0xC955, + 0x519E, 0xCBCD, 0x51A0, 0xAB61, 0x51A2, 0xADE0, 0x51A4, 0xADDE, + 0x51A5, 0xADDF, 0x51AA, 0xBEAD, 0x51AC, 0xA556, 0x51B0, 0xA642, + 0x51B1, 0xC9BC, 0x51B6, 0xA74D, 0x51B7, 0xA74E, 0x51B9, 0xCA6B, + 0x51BC, 0xCBCE, 0x51BD, 0xA8E6, 0x51BE, 0xCBCF, 0x51C4, 0xD0E2, + 0x51C5, 0xD0E3, 0x51C6, 0xADE3, 0x51C8, 0xD0E4, 0x51CA, 0xD0E1, + 0x51CB, 0xADE4, 0x51CC, 0xADE2, 0x51CD, 0xADE1, 0x51CE, 0xD0E5, + 0x51D0, 0xD468, 0x51D4, 0xD861, 0x51D7, 0xDCC5, 0x51D8, 0xE140, + 0x51DC, 0xBBFE, 0x51DD, 0xBEAE, 0x51DE, 0xE8F9, 0x51E0, 0xA44C, + 0x51E1, 0xA45A, 0x51F0, 0xB0C4, 0x51F1, 0xB3CD, 0x51F3, 0xB9B9, + 0x51F5, 0xC942, 0x51F6, 0xA4BF, 0x51F8, 0xA559, 0x51F9, 0xA557, + 0x51FA, 0xA558, 0x51FD, 0xA8E7, 0x5200, 0xA44D, 0x5201, 0xA44E, + 0x5203, 0xA462, 0x5206, 0xA4C0, 0x5207, 0xA4C1, 0x5208, 0xA4C2, + 0x5209, 0xC9BE, 0x520A, 0xA55A, 0x520C, 0xC96B, 0x520E, 0xA646, + 0x5210, 0xC9BF, 0x5211, 0xA644, 0x5212, 0xA645, 0x5213, 0xC9BD, + 0x5216, 0xA647, 0x5217, 0xA643, 0x521C, 0xCA6C, 0x521D, 0xAAEC, + 0x521E, 0xCA6D, 0x5221, 0xCA6E, 0x5224, 0xA750, 0x5225, 0xA74F, + 0x5228, 0xA753, 0x5229, 0xA751, 0x522A, 0xA752, 0x522E, 0xA8ED, + 0x5230, 0xA8EC, 0x5231, 0xCBD4, 0x5232, 0xCBD1, 0x5233, 0xCBD2, + 0x5235, 0xCBD0, 0x5236, 0xA8EE, 0x5237, 0xA8EA, 0x5238, 0xA8E9, + 0x523A, 0xA8EB, 0x523B, 0xA8E8, 0x5241, 0xA8EF, 0x5243, 0xAB63, + 0x5244, 0xCDF0, 0x5246, 0xCBD3, 0x5247, 0xAB68, 0x5249, 0xCDF1, + 0x524A, 0xAB64, 0x524B, 0xAB67, 0x524C, 0xAB66, 0x524D, 0xAB65, + 0x524E, 0xAB62, 0x5252, 0xD0E8, 0x5254, 0xADE7, 0x5255, 0xD0EB, + 0x5256, 0xADE5, 0x525A, 0xD0E7, 0x525B, 0xADE8, 0x525C, 0xADE6, + 0x525D, 0xADE9, 0x525E, 0xD0E9, 0x525F, 0xD0EA, 0x5261, 0xD0E6, + 0x5262, 0xD0EC, 0x5269, 0xB3D1, 0x526A, 0xB0C5, 0x526B, 0xD469, + 0x526C, 0xD46B, 0x526D, 0xD46A, 0x526E, 0xD46C, 0x526F, 0xB0C6, + 0x5272, 0xB3CE, 0x5274, 0xB3CF, 0x5275, 0xB3D0, 0x5277, 0xB6D0, + 0x5278, 0xDCC7, 0x527A, 0xDCC6, 0x527B, 0xDCC8, 0x527C, 0xDCC9, + 0x527D, 0xB6D1, 0x527F, 0xB6CF, 0x5280, 0xE141, 0x5281, 0xE142, + 0x5282, 0xB9BB, 0x5283, 0xB9BA, 0x5284, 0xE35A, 0x5287, 0xBC40, + 0x5288, 0xBC41, 0x5289, 0xBC42, 0x528A, 0xBC44, 0x528B, 0xE4F2, + 0x528C, 0xE4F3, 0x528D, 0xBC43, 0x5291, 0xBEAF, 0x5293, 0xBEB0, + 0x5296, 0xF1ED, 0x5297, 0xF5C3, 0x5298, 0xF5C2, 0x5299, 0xF7D1, + 0x529B, 0xA44F, 0x529F, 0xA55C, 0x52A0, 0xA55B, 0x52A3, 0xA648, + 0x52A6, 0xC9C0, 0x52A9, 0xA755, 0x52AA, 0xA756, 0x52AB, 0xA754, + 0x52AC, 0xA757, 0x52AD, 0xCA6F, 0x52AE, 0xCA70, 0x52BB, 0xA8F1, + 0x52BC, 0xCBD5, 0x52BE, 0xA8F0, 0x52C0, 0xCDF2, 0x52C1, 0xAB6C, + 0x52C2, 0xCDF3, 0x52C3, 0xAB6B, 0x52C7, 0xAB69, 0x52C9, 0xAB6A, + 0x52CD, 0xD0ED, 0x52D2, 0xB0C7, 0x52D3, 0xD46E, 0x52D5, 0xB0CA, + 0x52D6, 0xD46D, 0x52D7, 0xB1E5, 0x52D8, 0xB0C9, 0x52D9, 0xB0C8, + 0x52DB, 0xB3D4, 0x52DD, 0xB3D3, 0x52DE, 0xB3D2, 0x52DF, 0xB6D2, + 0x52E2, 0xB6D5, 0x52E3, 0xB6D6, 0x52E4, 0xB6D4, 0x52E6, 0xB6D3, + 0x52E9, 0xE143, 0x52EB, 0xE144, 0x52EF, 0xE4F5, 0x52F0, 0xBC45, + 0x52F1, 0xE4F4, 0x52F3, 0xBEB1, 0x52F4, 0xECBF, 0x52F5, 0xC079, + 0x52F7, 0xF1EE, 0x52F8, 0xC455, 0x52FA, 0xA463, 0x52FB, 0xA4C3, + 0x52FC, 0xC956, 0x52FE, 0xA4C4, 0x52FF, 0xA4C5, 0x5305, 0xA55D, + 0x5306, 0xA55E, 0x5308, 0xA649, 0x5309, 0xCA71, 0x530A, 0xCBD6, + 0x530B, 0xCBD7, 0x530D, 0xAB6D, 0x530E, 0xD0EE, 0x530F, 0xB0CC, + 0x5310, 0xB0CB, 0x5311, 0xD863, 0x5312, 0xD862, 0x5315, 0xA450, + 0x5316, 0xA4C6, 0x5317, 0xA55F, 0x5319, 0xB0CD, 0x531A, 0xC943, + 0x531C, 0xC96C, 0x531D, 0xA560, 0x531F, 0xC9C2, 0x5320, 0xA64B, + 0x5321, 0xA64A, 0x5322, 0xC9C1, 0x5323, 0xA758, 0x532A, 0xADEA, + 0x532D, 0xD46F, 0x532F, 0xB6D7, 0x5330, 0xE145, 0x5331, 0xB9BC, + 0x5334, 0xE8FA, 0x5337, 0xF3FD, 0x5339, 0xA4C7, 0x533C, 0xCBD8, + 0x533D, 0xCDF4, 0x533E, 0xB0D0, 0x533F, 0xB0CE, 0x5340, 0xB0CF, + 0x5341, 0xA2CC, 0x5341, 0xA451, 0x5343, 0xA464, 0x5344, 0xA2CD, + 0x5345, 0xA2CE, 0x5345, 0xA4CA, 0x5347, 0xA4C9, 0x5348, 0xA4C8, + 0x5349, 0xA563, 0x534A, 0xA562, 0x534C, 0xC96D, 0x534D, 0xC9C3, + 0x5351, 0xA8F5, 0x5352, 0xA8F2, 0x5353, 0xA8F4, 0x5354, 0xA8F3, + 0x5357, 0xAB6E, 0x535A, 0xB3D5, 0x535C, 0xA452, 0x535E, 0xA4CB, + 0x5360, 0xA565, 0x5361, 0xA564, 0x5363, 0xCA72, 0x5366, 0xA8F6, + 0x536C, 0xC957, 0x536E, 0xA567, 0x536F, 0xA566, 0x5370, 0xA64C, + 0x5371, 0xA64D, 0x5372, 0xCA73, 0x5373, 0xA759, 0x5375, 0xA75A, + 0x5377, 0xA8F7, 0x5378, 0xA8F8, 0x5379, 0xA8F9, 0x537B, 0xAB6F, + 0x537C, 0xCDF5, 0x537F, 0xADEB, 0x5382, 0xC944, 0x5384, 0xA4CC, + 0x538A, 0xC9C4, 0x538E, 0xCA74, 0x538F, 0xCA75, 0x5392, 0xCBD9, + 0x5394, 0xCBDA, 0x5396, 0xCDF7, 0x5397, 0xCDF6, 0x5398, 0xCDF9, + 0x5399, 0xCDF8, 0x539A, 0xAB70, 0x539C, 0xD470, 0x539D, 0xADED, + 0x539E, 0xD0EF, 0x539F, 0xADEC, 0x53A4, 0xD864, 0x53A5, 0xB3D6, + 0x53A7, 0xD865, 0x53AC, 0xE146, 0x53AD, 0xB9BD, 0x53B2, 0xBC46, + 0x53B4, 0xF1EF, 0x53B9, 0xC958, 0x53BB, 0xA568, 0x53C3, 0xB0D1, + 0x53C8, 0xA453, 0x53C9, 0xA465, 0x53CA, 0xA4CE, 0x53CB, 0xA4CD, + 0x53CD, 0xA4CF, 0x53D4, 0xA8FB, 0x53D6, 0xA8FA, 0x53D7, 0xA8FC, + 0x53DB, 0xAB71, 0x53DF, 0xADEE, 0x53E1, 0xE8FB, 0x53E2, 0xC24F, + 0x53E3, 0xA466, 0x53E4, 0xA56A, 0x53E5, 0xA579, 0x53E6, 0xA574, + 0x53E8, 0xA56F, 0x53E9, 0xA56E, 0x53EA, 0xA575, 0x53EB, 0xA573, + 0x53EC, 0xA56C, 0x53ED, 0xA57A, 0x53EE, 0xA56D, 0x53EF, 0xA569, + 0x53F0, 0xA578, 0x53F1, 0xA577, 0x53F2, 0xA576, 0x53F3, 0xA56B, + 0x53F5, 0xA572, 0x53F8, 0xA571, 0x53FB, 0xA57B, 0x53FC, 0xA570, + 0x5401, 0xA653, 0x5403, 0xA659, 0x5404, 0xA655, 0x5406, 0xA65B, + 0x5407, 0xC9C5, 0x5408, 0xA658, 0x5409, 0xA64E, 0x540A, 0xA651, + 0x540B, 0xA654, 0x540C, 0xA650, 0x540D, 0xA657, 0x540E, 0xA65A, + 0x540F, 0xA64F, 0x5410, 0xA652, 0x5411, 0xA656, 0x5412, 0xA65C, + 0x5418, 0xCA7E, 0x5419, 0xCA7B, 0x541B, 0xA767, 0x541C, 0xCA7C, + 0x541D, 0xA75B, 0x541E, 0xA75D, 0x541F, 0xA775, 0x5420, 0xA770, + 0x5424, 0xCAA5, 0x5425, 0xCA7D, 0x5426, 0xA75F, 0x5427, 0xA761, + 0x5428, 0xCAA4, 0x5429, 0xA768, 0x542A, 0xCA78, 0x542B, 0xA774, + 0x542C, 0xA776, 0x542D, 0xA75C, 0x542E, 0xA76D, 0x5430, 0xCA76, + 0x5431, 0xA773, 0x5433, 0xA764, 0x5435, 0xA76E, 0x5436, 0xA76F, + 0x5437, 0xCA77, 0x5438, 0xA76C, 0x5439, 0xA76A, 0x543B, 0xA76B, + 0x543C, 0xA771, 0x543D, 0xCAA1, 0x543E, 0xA75E, 0x5440, 0xA772, + 0x5441, 0xCAA3, 0x5442, 0xA766, 0x5443, 0xA763, 0x5445, 0xCA7A, + 0x5446, 0xA762, 0x5447, 0xCAA6, 0x5448, 0xA765, 0x544A, 0xA769, + 0x544E, 0xA760, 0x544F, 0xCAA2, 0x5454, 0xCA79, 0x5460, 0xCBEB, + 0x5461, 0xCBEA, 0x5462, 0xA94F, 0x5463, 0xCBED, 0x5464, 0xCBEF, + 0x5465, 0xCBE4, 0x5466, 0xCBE7, 0x5467, 0xCBEE, 0x5468, 0xA950, + 0x546B, 0xCBE1, 0x546C, 0xCBE5, 0x546F, 0xCBE9, 0x5470, 0xCE49, + 0x5471, 0xA94B, 0x5472, 0xCE4D, 0x5473, 0xA8FD, 0x5474, 0xCBE6, + 0x5475, 0xA8FE, 0x5476, 0xA94C, 0x5477, 0xA945, 0x5478, 0xA941, + 0x547A, 0xCBE2, 0x547B, 0xA944, 0x547C, 0xA949, 0x547D, 0xA952, + 0x547E, 0xCBE3, 0x547F, 0xCBDC, 0x5480, 0xA943, 0x5481, 0xCBDD, + 0x5482, 0xCBDF, 0x5484, 0xA946, 0x5486, 0xA948, 0x5487, 0xCBDB, + 0x5488, 0xCBE0, 0x548B, 0xA951, 0x548C, 0xA94D, 0x548D, 0xCBE8, + 0x548E, 0xA953, 0x5490, 0xA94A, 0x5491, 0xCBDE, 0x5492, 0xA947, + 0x5495, 0xA942, 0x5496, 0xA940, 0x5498, 0xCBEC, 0x549A, 0xA94E, + 0x54A0, 0xCE48, 0x54A1, 0xCDFB, 0x54A2, 0xCE4B, 0x54A5, 0xCDFD, + 0x54A6, 0xAB78, 0x54A7, 0xABA8, 0x54A8, 0xAB74, 0x54A9, 0xABA7, + 0x54AA, 0xAB7D, 0x54AB, 0xABA4, 0x54AC, 0xAB72, 0x54AD, 0xCDFC, + 0x54AE, 0xCE43, 0x54AF, 0xABA3, 0x54B0, 0xCE4F, 0x54B1, 0xABA5, + 0x54B3, 0xAB79, 0x54B6, 0xCE45, 0x54B7, 0xCE42, 0x54B8, 0xAB77, + 0x54BA, 0xCDFA, 0x54BB, 0xABA6, 0x54BC, 0xCE4A, 0x54BD, 0xAB7C, + 0x54BE, 0xCE4C, 0x54BF, 0xABA9, 0x54C0, 0xAB73, 0x54C1, 0xAB7E, + 0x54C2, 0xAB7B, 0x54C3, 0xCE40, 0x54C4, 0xABA1, 0x54C5, 0xCE46, + 0x54C6, 0xCE47, 0x54C7, 0xAB7A, 0x54C8, 0xABA2, 0x54C9, 0xAB76, + 0x54CE, 0xAB75, 0x54CF, 0xCDFE, 0x54D6, 0xCE44, 0x54DE, 0xCE4E, + 0x54E0, 0xD144, 0x54E1, 0xADFB, 0x54E2, 0xD0F1, 0x54E4, 0xD0F6, + 0x54E5, 0xADF4, 0x54E6, 0xAE40, 0x54E7, 0xD0F4, 0x54E8, 0xADEF, + 0x54E9, 0xADF9, 0x54EA, 0xADFE, 0x54EB, 0xD0FB, 0x54ED, 0xADFA, + 0x54EE, 0xADFD, 0x54F1, 0xD0FE, 0x54F2, 0xADF5, 0x54F3, 0xD0F5, + 0x54F7, 0xD142, 0x54F8, 0xD143, 0x54FA, 0xADF7, 0x54FB, 0xD141, + 0x54FC, 0xADF3, 0x54FD, 0xAE43, 0x54FF, 0xD0F8, 0x5501, 0xADF1, + 0x5503, 0xD146, 0x5504, 0xD0F9, 0x5505, 0xD0FD, 0x5506, 0xADF6, + 0x5507, 0xAE42, 0x5508, 0xD0FA, 0x5509, 0xADFC, 0x550A, 0xD140, + 0x550B, 0xD147, 0x550C, 0xD4A1, 0x550E, 0xD145, 0x550F, 0xAE44, + 0x5510, 0xADF0, 0x5511, 0xD0FC, 0x5512, 0xD0F3, 0x5514, 0xADF8, + 0x5517, 0xD0F2, 0x551A, 0xD0F7, 0x5526, 0xD0F0, 0x5527, 0xAE41, + 0x552A, 0xD477, 0x552C, 0xB0E4, 0x552D, 0xD4A7, 0x552E, 0xB0E2, + 0x552F, 0xB0DF, 0x5530, 0xD47C, 0x5531, 0xB0DB, 0x5532, 0xD4A2, + 0x5533, 0xB0E6, 0x5534, 0xD476, 0x5535, 0xD47B, 0x5536, 0xD47A, + 0x5537, 0xADF2, 0x5538, 0xB0E1, 0x5539, 0xD4A5, 0x553B, 0xD4A8, + 0x553C, 0xD473, 0x553E, 0xB3E8, 0x5540, 0xD4A9, 0x5541, 0xB0E7, + 0x5543, 0xB0D9, 0x5544, 0xB0D6, 0x5545, 0xD47E, 0x5546, 0xB0D3, + 0x5548, 0xD4A6, 0x554A, 0xB0DA, 0x554B, 0xD4AA, 0x554D, 0xD474, + 0x554E, 0xD4A4, 0x554F, 0xB0DD, 0x5550, 0xD475, 0x5551, 0xD478, + 0x5552, 0xD47D, 0x5555, 0xB0DE, 0x5556, 0xB0DC, 0x5557, 0xB0E8, + 0x555C, 0xB0E3, 0x555E, 0xB0D7, 0x555F, 0xB1D2, 0x5561, 0xB0D8, + 0x5562, 0xD479, 0x5563, 0xB0E5, 0x5564, 0xB0E0, 0x5565, 0xD4A3, + 0x5566, 0xB0D5, 0x556A, 0xB0D4, 0x5575, 0xD471, 0x5576, 0xD472, + 0x5577, 0xD86A, 0x557B, 0xB3D7, 0x557C, 0xB3DA, 0x557D, 0xD875, + 0x557E, 0xB3EE, 0x557F, 0xD878, 0x5580, 0xB3D8, 0x5581, 0xD871, + 0x5582, 0xB3DE, 0x5583, 0xB3E4, 0x5584, 0xB5BD, 0x5587, 0xB3E2, + 0x5588, 0xD86E, 0x5589, 0xB3EF, 0x558A, 0xB3DB, 0x558B, 0xB3E3, + 0x558C, 0xD876, 0x558D, 0xDCD7, 0x558E, 0xD87B, 0x558F, 0xD86F, + 0x5591, 0xD866, 0x5592, 0xD873, 0x5593, 0xD86D, 0x5594, 0xB3E1, + 0x5595, 0xD879, 0x5598, 0xB3DD, 0x5599, 0xB3F1, 0x559A, 0xB3EA, + 0x559C, 0xB3DF, 0x559D, 0xB3DC, 0x559F, 0xB3E7, 0x55A1, 0xD87A, + 0x55A2, 0xD86C, 0x55A3, 0xD872, 0x55A4, 0xD874, 0x55A5, 0xD868, + 0x55A6, 0xD877, 0x55A7, 0xB3D9, 0x55A8, 0xD867, 0x55AA, 0xB3E0, + 0x55AB, 0xB3F0, 0x55AC, 0xB3EC, 0x55AD, 0xD869, 0x55AE, 0xB3E6, + 0x55B1, 0xB3ED, 0x55B2, 0xB3E9, 0x55B3, 0xB3E5, 0x55B5, 0xD870, + 0x55BB, 0xB3EB, 0x55BF, 0xDCD5, 0x55C0, 0xDCD1, 0x55C2, 0xDCE0, + 0x55C3, 0xDCCA, 0x55C4, 0xDCD3, 0x55C5, 0xB6E5, 0x55C6, 0xB6E6, + 0x55C7, 0xB6DE, 0x55C8, 0xDCDC, 0x55C9, 0xB6E8, 0x55CA, 0xDCCF, + 0x55CB, 0xDCCE, 0x55CC, 0xDCCC, 0x55CD, 0xDCDE, 0x55CE, 0xB6DC, + 0x55CF, 0xDCD8, 0x55D0, 0xDCCD, 0x55D1, 0xB6DF, 0x55D2, 0xDCD6, + 0x55D3, 0xB6DA, 0x55D4, 0xDCD2, 0x55D5, 0xDCD9, 0x55D6, 0xDCDB, + 0x55D9, 0xDCDF, 0x55DA, 0xB6E3, 0x55DB, 0xDCCB, 0x55DC, 0xB6DD, + 0x55DD, 0xDCD0, 0x55DF, 0xB6D8, 0x55E1, 0xB6E4, 0x55E2, 0xDCDA, + 0x55E3, 0xB6E0, 0x55E4, 0xB6E1, 0x55E5, 0xB6E7, 0x55E6, 0xB6DB, + 0x55E7, 0xA25F, 0x55E8, 0xB6D9, 0x55E9, 0xDCD4, 0x55EF, 0xB6E2, + 0x55F2, 0xDCDD, 0x55F6, 0xB9CD, 0x55F7, 0xB9C8, 0x55F9, 0xE155, + 0x55FA, 0xE151, 0x55FC, 0xE14B, 0x55FD, 0xB9C2, 0x55FE, 0xB9BE, + 0x55FF, 0xE154, 0x5600, 0xB9BF, 0x5601, 0xE14E, 0x5602, 0xE150, + 0x5604, 0xE153, 0x5606, 0xB9C4, 0x5608, 0xB9CB, 0x5609, 0xB9C5, + 0x560C, 0xE149, 0x560D, 0xB9C6, 0x560E, 0xB9C7, 0x560F, 0xE14C, + 0x5610, 0xB9CC, 0x5612, 0xE14A, 0x5613, 0xE14F, 0x5614, 0xB9C3, + 0x5615, 0xE148, 0x5616, 0xB9C9, 0x5617, 0xB9C1, 0x561B, 0xB9C0, + 0x561C, 0xE14D, 0x561D, 0xE152, 0x561F, 0xB9CA, 0x5627, 0xE147, + 0x5629, 0xBC4D, 0x562A, 0xE547, 0x562C, 0xE544, 0x562E, 0xBC47, + 0x562F, 0xBC53, 0x5630, 0xBC54, 0x5632, 0xBC4A, 0x5633, 0xE542, + 0x5634, 0xBC4C, 0x5635, 0xE4F9, 0x5636, 0xBC52, 0x5638, 0xE546, + 0x5639, 0xBC49, 0x563A, 0xE548, 0x563B, 0xBC48, 0x563D, 0xE543, + 0x563E, 0xE545, 0x563F, 0xBC4B, 0x5640, 0xE541, 0x5641, 0xE4FA, + 0x5642, 0xE4F7, 0x5645, 0xD86B, 0x5646, 0xE4FD, 0x5648, 0xE4F6, + 0x5649, 0xE4FC, 0x564A, 0xE4FB, 0x564C, 0xE4F8, 0x564E, 0xBC4F, + 0x5653, 0xBC4E, 0x5657, 0xBC50, 0x5658, 0xE4FE, 0x5659, 0xBEB2, + 0x565A, 0xE540, 0x565E, 0xE945, 0x5660, 0xE8FD, 0x5662, 0xBEBE, + 0x5663, 0xE942, 0x5664, 0xBEB6, 0x5665, 0xBEBA, 0x5666, 0xE941, + 0x5668, 0xBEB9, 0x5669, 0xBEB5, 0x566A, 0xBEB8, 0x566B, 0xBEB3, + 0x566C, 0xBEBD, 0x566D, 0xE943, 0x566E, 0xE8FE, 0x566F, 0xBEBC, + 0x5670, 0xE8FC, 0x5671, 0xBEBB, 0x5672, 0xE944, 0x5673, 0xE940, + 0x5674, 0xBC51, 0x5676, 0xBEBF, 0x5677, 0xE946, 0x5678, 0xBEB7, + 0x5679, 0xBEB4, 0x567E, 0xECC6, 0x567F, 0xECC8, 0x5680, 0xC07B, + 0x5681, 0xECC9, 0x5682, 0xECC7, 0x5683, 0xECC5, 0x5684, 0xECC4, + 0x5685, 0xC07D, 0x5686, 0xECC3, 0x5687, 0xC07E, 0x568C, 0xECC1, + 0x568D, 0xECC2, 0x568E, 0xC07A, 0x568F, 0xC0A1, 0x5690, 0xC07C, + 0x5693, 0xECC0, 0x5695, 0xC250, 0x5697, 0xEFBC, 0x5698, 0xEFBA, + 0x5699, 0xEFBF, 0x569A, 0xEFBD, 0x569C, 0xEFBB, 0x569D, 0xEFBE, + 0x56A5, 0xC360, 0x56A6, 0xF1F2, 0x56A7, 0xF1F3, 0x56A8, 0xC456, + 0x56AA, 0xF1F4, 0x56AB, 0xF1F0, 0x56AC, 0xF1F5, 0x56AD, 0xF1F1, + 0x56AE, 0xC251, 0x56B2, 0xF3FE, 0x56B3, 0xF441, 0x56B4, 0xC459, + 0x56B5, 0xF440, 0x56B6, 0xC458, 0x56B7, 0xC457, 0x56BC, 0xC45A, + 0x56BD, 0xF5C5, 0x56BE, 0xF5C6, 0x56C0, 0xC4DA, 0x56C1, 0xC4D9, + 0x56C2, 0xC4DB, 0x56C3, 0xF5C4, 0x56C5, 0xF6D8, 0x56C6, 0xF6D7, + 0x56C8, 0xC56D, 0x56C9, 0xC56F, 0x56CA, 0xC56E, 0x56CB, 0xF6D9, + 0x56CC, 0xC5C8, 0x56CD, 0xF8A6, 0x56D1, 0xC5F1, 0x56D3, 0xF8A5, + 0x56D4, 0xF8EE, 0x56D7, 0xC949, 0x56DA, 0xA57D, 0x56DB, 0xA57C, + 0x56DD, 0xA65F, 0x56DE, 0xA65E, 0x56DF, 0xC9C7, 0x56E0, 0xA65D, + 0x56E1, 0xC9C6, 0x56E4, 0xA779, 0x56E5, 0xCAA9, 0x56E7, 0xCAA8, + 0x56EA, 0xA777, 0x56EB, 0xA77A, 0x56EE, 0xCAA7, 0x56F0, 0xA778, + 0x56F7, 0xCBF0, 0x56F9, 0xCBF1, 0x56FA, 0xA954, 0x56FF, 0xABAA, + 0x5701, 0xD148, 0x5702, 0xD149, 0x5703, 0xAE45, 0x5704, 0xAE46, + 0x5707, 0xD4AC, 0x5708, 0xB0E9, 0x5709, 0xB0EB, 0x570A, 0xD4AB, + 0x570B, 0xB0EA, 0x570C, 0xD87C, 0x570D, 0xB3F2, 0x5712, 0xB6E9, + 0x5713, 0xB6EA, 0x5714, 0xDCE1, 0x5716, 0xB9CF, 0x5718, 0xB9CE, + 0x571A, 0xE549, 0x571B, 0xE948, 0x571C, 0xE947, 0x571E, 0xF96B, + 0x571F, 0xA467, 0x5720, 0xC959, 0x5722, 0xC96E, 0x5723, 0xC96F, + 0x5728, 0xA662, 0x5729, 0xA666, 0x572A, 0xC9C9, 0x572C, 0xA664, + 0x572D, 0xA663, 0x572E, 0xC9C8, 0x572F, 0xA665, 0x5730, 0xA661, + 0x5733, 0xA660, 0x5734, 0xC9CA, 0x573B, 0xA7A6, 0x573E, 0xA7A3, + 0x5740, 0xA77D, 0x5741, 0xCAAA, 0x5745, 0xCAAB, 0x5747, 0xA7A1, + 0x5749, 0xCAAD, 0x574A, 0xA77B, 0x574B, 0xCAAE, 0x574C, 0xCAAC, + 0x574D, 0xA77E, 0x574E, 0xA7A2, 0x574F, 0xA7A5, 0x5750, 0xA7A4, + 0x5751, 0xA77C, 0x5752, 0xCAAF, 0x5761, 0xA959, 0x5762, 0xCBFE, + 0x5764, 0xA95B, 0x5766, 0xA95A, 0x5768, 0xCC40, 0x5769, 0xA958, + 0x576A, 0xA957, 0x576B, 0xCBF5, 0x576D, 0xCBF4, 0x576F, 0xCBF2, + 0x5770, 0xCBF7, 0x5771, 0xCBF6, 0x5772, 0xCBF3, 0x5773, 0xCBFC, + 0x5774, 0xCBFD, 0x5775, 0xCBFA, 0x5776, 0xCBF8, 0x5777, 0xA956, + 0x577B, 0xCBFB, 0x577C, 0xA95C, 0x577D, 0xCC41, 0x5780, 0xCBF9, + 0x5782, 0xABAB, 0x5783, 0xA955, 0x578B, 0xABAC, 0x578C, 0xCE54, + 0x578F, 0xCE5A, 0x5793, 0xABB2, 0x5794, 0xCE58, 0x5795, 0xCE5E, + 0x5797, 0xCE55, 0x5798, 0xCE59, 0x5799, 0xCE5B, 0x579A, 0xCE5D, + 0x579B, 0xCE57, 0x579D, 0xCE56, 0x579E, 0xCE51, 0x579F, 0xCE52, + 0x57A0, 0xABAD, 0x57A2, 0xABAF, 0x57A3, 0xABAE, 0x57A4, 0xCE53, + 0x57A5, 0xCE5C, 0x57AE, 0xABB1, 0x57B5, 0xCE50, 0x57B6, 0xD153, + 0x57B8, 0xD152, 0x57B9, 0xD157, 0x57BA, 0xD14E, 0x57BC, 0xD151, + 0x57BD, 0xD150, 0x57BF, 0xD154, 0x57C1, 0xD158, 0x57C2, 0xAE47, + 0x57C3, 0xAE4A, 0x57C6, 0xD14F, 0x57C7, 0xD155, 0x57CB, 0xAE49, + 0x57CC, 0xD14A, 0x57CE, 0xABB0, 0x57CF, 0xD4BA, 0x57D0, 0xD156, + 0x57D2, 0xD14D, 0x57D4, 0xAE48, 0x57D5, 0xD14C, 0x57DC, 0xD4B1, + 0x57DF, 0xB0EC, 0x57E0, 0xB0F0, 0x57E1, 0xD4C1, 0x57E2, 0xD4AF, + 0x57E3, 0xD4BD, 0x57E4, 0xB0F1, 0x57E5, 0xD4BF, 0x57E7, 0xD4C5, + 0x57E9, 0xD4C9, 0x57EC, 0xD4C0, 0x57ED, 0xD4B4, 0x57EE, 0xD4BC, + 0x57F0, 0xD4CA, 0x57F1, 0xD4C8, 0x57F2, 0xD4BE, 0x57F3, 0xD4B9, + 0x57F4, 0xD4B2, 0x57F5, 0xD8A6, 0x57F6, 0xD4B0, 0x57F7, 0xB0F5, + 0x57F8, 0xD4B7, 0x57F9, 0xB0F6, 0x57FA, 0xB0F2, 0x57FB, 0xD4AD, + 0x57FC, 0xD4C3, 0x57FD, 0xD4B5, 0x5800, 0xD4B3, 0x5801, 0xD4C6, + 0x5802, 0xB0F3, 0x5804, 0xD4CC, 0x5805, 0xB0ED, 0x5806, 0xB0EF, + 0x5807, 0xD4BB, 0x5808, 0xD4B6, 0x5809, 0xAE4B, 0x580A, 0xB0EE, + 0x580B, 0xD4B8, 0x580C, 0xD4C7, 0x580D, 0xD4CB, 0x580E, 0xD4C2, + 0x5810, 0xD4C4, 0x5814, 0xD4AE, 0x5819, 0xD8A1, 0x581B, 0xD8AA, + 0x581C, 0xD8A9, 0x581D, 0xB3FA, 0x581E, 0xD8A2, 0x5820, 0xB3FB, + 0x5821, 0xB3F9, 0x5823, 0xD8A4, 0x5824, 0xB3F6, 0x5825, 0xD8A8, + 0x5827, 0xD8A3, 0x5828, 0xD8A5, 0x5829, 0xD87D, 0x582A, 0xB3F4, + 0x582C, 0xD8B2, 0x582D, 0xD8B1, 0x582E, 0xD8AE, 0x582F, 0xB3F3, + 0x5830, 0xB3F7, 0x5831, 0xB3F8, 0x5832, 0xD14B, 0x5833, 0xD8AB, + 0x5834, 0xB3F5, 0x5835, 0xB0F4, 0x5836, 0xD8AD, 0x5837, 0xD87E, + 0x5838, 0xD8B0, 0x5839, 0xD8AF, 0x583B, 0xD8B3, 0x583D, 0xDCEF, + 0x583F, 0xD8AC, 0x5848, 0xD8A7, 0x5849, 0xDCE7, 0x584A, 0xB6F4, + 0x584B, 0xB6F7, 0x584C, 0xB6F2, 0x584D, 0xDCE6, 0x584E, 0xDCEA, + 0x584F, 0xDCE5, 0x5851, 0xB6EC, 0x5852, 0xB6F6, 0x5853, 0xDCE2, + 0x5854, 0xB6F0, 0x5855, 0xDCE9, 0x5857, 0xB6EE, 0x5858, 0xB6ED, + 0x5859, 0xDCEC, 0x585A, 0xB6EF, 0x585B, 0xDCEE, 0x585D, 0xDCEB, + 0x585E, 0xB6EB, 0x5862, 0xB6F5, 0x5863, 0xDCF0, 0x5864, 0xDCE4, + 0x5865, 0xDCED, 0x5868, 0xDCE3, 0x586B, 0xB6F1, 0x586D, 0xB6F3, + 0x586F, 0xDCE8, 0x5871, 0xDCF1, 0x5874, 0xE15D, 0x5875, 0xB9D0, + 0x5876, 0xE163, 0x5879, 0xB9D5, 0x587A, 0xE15F, 0x587B, 0xE166, + 0x587C, 0xE157, 0x587D, 0xB9D7, 0x587E, 0xB9D1, 0x587F, 0xE15C, + 0x5880, 0xBC55, 0x5881, 0xE15B, 0x5882, 0xE164, 0x5883, 0xB9D2, + 0x5885, 0xB9D6, 0x5886, 0xE15A, 0x5887, 0xE160, 0x5888, 0xE165, + 0x5889, 0xE156, 0x588A, 0xB9D4, 0x588B, 0xE15E, 0x588E, 0xE162, + 0x588F, 0xE168, 0x5890, 0xE158, 0x5891, 0xE161, 0x5893, 0xB9D3, + 0x5894, 0xE167, 0x5898, 0xE159, 0x589C, 0xBC59, 0x589D, 0xE54B, + 0x589E, 0xBC57, 0x589F, 0xBC56, 0x58A0, 0xE54D, 0x58A1, 0xE552, + 0x58A3, 0xE54E, 0x58A5, 0xE551, 0x58A6, 0xBC5C, 0x58A8, 0xBEA5, + 0x58A9, 0xBC5B, 0x58AB, 0xE54A, 0x58AC, 0xE550, 0x58AE, 0xBC5A, + 0x58AF, 0xE54F, 0x58B1, 0xE54C, 0x58B3, 0xBC58, 0x58BA, 0xE94D, + 0x58BB, 0xF9D9, 0x58BC, 0xE94F, 0x58BD, 0xE94A, 0x58BE, 0xBEC1, + 0x58BF, 0xE94C, 0x58C1, 0xBEC0, 0x58C2, 0xE94E, 0x58C5, 0xBEC3, + 0x58C6, 0xE950, 0x58C7, 0xBEC2, 0x58C8, 0xE949, 0x58C9, 0xE94B, + 0x58CE, 0xC0A5, 0x58CF, 0xECCC, 0x58D1, 0xC0A4, 0x58D2, 0xECCD, + 0x58D3, 0xC0A3, 0x58D4, 0xECCB, 0x58D5, 0xC0A2, 0x58D6, 0xECCA, + 0x58D8, 0xC253, 0x58D9, 0xC252, 0x58DA, 0xF1F6, 0x58DB, 0xF1F8, + 0x58DD, 0xF1F7, 0x58DE, 0xC361, 0x58DF, 0xC362, 0x58E2, 0xC363, + 0x58E3, 0xF442, 0x58E4, 0xC45B, 0x58E7, 0xF7D3, 0x58E8, 0xF7D2, + 0x58E9, 0xC5F2, 0x58EB, 0xA468, 0x58EC, 0xA4D0, 0x58EF, 0xA7A7, + 0x58F4, 0xCE5F, 0x58F9, 0xB3FC, 0x58FA, 0xB3FD, 0x58FC, 0xDCF2, + 0x58FD, 0xB9D8, 0x58FE, 0xE169, 0x58FF, 0xE553, 0x5903, 0xC95A, + 0x5906, 0xCAB0, 0x590C, 0xCC42, 0x590D, 0xCE60, 0x590E, 0xD159, + 0x590F, 0xAE4C, 0x5912, 0xF1F9, 0x5914, 0xC4DC, 0x5915, 0xA469, + 0x5916, 0xA57E, 0x5917, 0xC970, 0x5919, 0xA667, 0x591A, 0xA668, + 0x591C, 0xA95D, 0x5920, 0xB0F7, 0x5922, 0xB9DA, 0x5924, 0xB9DB, + 0x5925, 0xB9D9, 0x5927, 0xA46A, 0x5929, 0xA4D1, 0x592A, 0xA4D3, + 0x592B, 0xA4D2, 0x592C, 0xC95B, 0x592D, 0xA4D4, 0x592E, 0xA5A1, + 0x592F, 0xC971, 0x5931, 0xA5A2, 0x5937, 0xA669, 0x5938, 0xA66A, + 0x593C, 0xC9CB, 0x593E, 0xA7A8, 0x5940, 0xCAB1, 0x5944, 0xA961, + 0x5945, 0xCC43, 0x5947, 0xA95F, 0x5948, 0xA960, 0x5949, 0xA95E, + 0x594A, 0xD15A, 0x594E, 0xABB6, 0x594F, 0xABB5, 0x5950, 0xABB7, + 0x5951, 0xABB4, 0x5953, 0xCE61, 0x5954, 0xA962, 0x5955, 0xABB3, + 0x5957, 0xAE4D, 0x5958, 0xAE4E, 0x595A, 0xAE4F, 0x595C, 0xD4CD, + 0x5960, 0xB3FE, 0x5961, 0xD8B4, 0x5962, 0xB0F8, 0x5967, 0xB6F8, + 0x5969, 0xB9DD, 0x596A, 0xB9DC, 0x596B, 0xE16A, 0x596D, 0xBC5D, + 0x596E, 0xBEC4, 0x5970, 0xEFC0, 0x5971, 0xF6DA, 0x5972, 0xF7D4, + 0x5973, 0xA46B, 0x5974, 0xA5A3, 0x5976, 0xA5A4, 0x5977, 0xC9D1, + 0x5978, 0xA66C, 0x5979, 0xA66F, 0x597B, 0xC9CF, 0x597C, 0xC9CD, + 0x597D, 0xA66E, 0x597E, 0xC9D0, 0x597F, 0xC9D2, 0x5980, 0xC9CC, + 0x5981, 0xA671, 0x5982, 0xA670, 0x5983, 0xA66D, 0x5984, 0xA66B, + 0x5985, 0xC9CE, 0x598A, 0xA7B3, 0x598D, 0xA7B0, 0x598E, 0xCAB6, + 0x598F, 0xCAB9, 0x5990, 0xCAB8, 0x5992, 0xA7AA, 0x5993, 0xA7B2, + 0x5996, 0xA7AF, 0x5997, 0xCAB5, 0x5998, 0xCAB3, 0x5999, 0xA7AE, + 0x599D, 0xA7A9, 0x599E, 0xA7AC, 0x59A0, 0xCAB4, 0x59A1, 0xCABB, + 0x59A2, 0xCAB7, 0x59A3, 0xA7AD, 0x59A4, 0xA7B1, 0x59A5, 0xA7B4, + 0x59A6, 0xCAB2, 0x59A7, 0xCABA, 0x59A8, 0xA7AB, 0x59AE, 0xA967, + 0x59AF, 0xA96F, 0x59B1, 0xCC4F, 0x59B2, 0xCC48, 0x59B3, 0xA970, + 0x59B4, 0xCC53, 0x59B5, 0xCC44, 0x59B6, 0xCC4B, 0x59B9, 0xA966, + 0x59BA, 0xCC45, 0x59BB, 0xA964, 0x59BC, 0xCC4C, 0x59BD, 0xCC50, + 0x59BE, 0xA963, 0x59C0, 0xCC51, 0x59C1, 0xCC4A, 0x59C3, 0xCC4D, + 0x59C5, 0xA972, 0x59C6, 0xA969, 0x59C7, 0xCC54, 0x59C8, 0xCC52, + 0x59CA, 0xA96E, 0x59CB, 0xA96C, 0x59CC, 0xCC49, 0x59CD, 0xA96B, + 0x59CE, 0xCC47, 0x59CF, 0xCC46, 0x59D0, 0xA96A, 0x59D1, 0xA968, + 0x59D2, 0xA971, 0x59D3, 0xA96D, 0x59D4, 0xA965, 0x59D6, 0xCC4E, + 0x59D8, 0xABB9, 0x59DA, 0xABC0, 0x59DB, 0xCE6F, 0x59DC, 0xABB8, + 0x59DD, 0xCE67, 0x59DE, 0xCE63, 0x59E0, 0xCE73, 0x59E1, 0xCE62, + 0x59E3, 0xABBB, 0x59E4, 0xCE6C, 0x59E5, 0xABBE, 0x59E6, 0xABC1, + 0x59E8, 0xABBC, 0x59E9, 0xCE70, 0x59EA, 0xABBF, 0x59EC, 0xAE56, + 0x59ED, 0xCE76, 0x59EE, 0xCE64, 0x59F1, 0xCE66, 0x59F2, 0xCE6D, + 0x59F3, 0xCE71, 0x59F4, 0xCE75, 0x59F5, 0xCE72, 0x59F6, 0xCE6B, + 0x59F7, 0xCE6E, 0x59FA, 0xCE68, 0x59FB, 0xABC3, 0x59FC, 0xCE6A, + 0x59FD, 0xCE69, 0x59FE, 0xCE74, 0x59FF, 0xABBA, 0x5A00, 0xCE65, + 0x5A01, 0xABC2, 0x5A03, 0xABBD, 0x5A09, 0xAE5C, 0x5A0A, 0xD162, + 0x5A0C, 0xAE5B, 0x5A0F, 0xD160, 0x5A11, 0xAE50, 0x5A13, 0xAE55, + 0x5A15, 0xD15F, 0x5A16, 0xD15C, 0x5A17, 0xD161, 0x5A18, 0xAE51, + 0x5A19, 0xD15B, 0x5A1B, 0xAE54, 0x5A1C, 0xAE52, 0x5A1E, 0xD163, + 0x5A1F, 0xAE53, 0x5A20, 0xAE57, 0x5A23, 0xAE58, 0x5A25, 0xAE5A, + 0x5A29, 0xAE59, 0x5A2D, 0xD15D, 0x5A2E, 0xD15E, 0x5A33, 0xD164, + 0x5A35, 0xD4D4, 0x5A36, 0xB0F9, 0x5A37, 0xD8C2, 0x5A38, 0xD4D3, + 0x5A39, 0xD4E6, 0x5A3C, 0xB140, 0x5A3E, 0xD4E4, 0x5A40, 0xB0FE, + 0x5A41, 0xB0FA, 0x5A42, 0xD4ED, 0x5A43, 0xD4DD, 0x5A44, 0xD4E0, + 0x5A46, 0xB143, 0x5A47, 0xD4EA, 0x5A48, 0xD4E2, 0x5A49, 0xB0FB, + 0x5A4A, 0xB144, 0x5A4C, 0xD4E7, 0x5A4D, 0xD4E5, 0x5A50, 0xD4D6, + 0x5A51, 0xD4EB, 0x5A52, 0xD4DF, 0x5A53, 0xD4DA, 0x5A55, 0xD4D0, + 0x5A56, 0xD4EC, 0x5A57, 0xD4DC, 0x5A58, 0xD4CF, 0x5A5A, 0xB142, + 0x5A5B, 0xD4E1, 0x5A5C, 0xD4EE, 0x5A5D, 0xD4DE, 0x5A5E, 0xD4D2, + 0x5A5F, 0xD4D7, 0x5A60, 0xD4CE, 0x5A62, 0xB141, 0x5A64, 0xD4DB, + 0x5A65, 0xD4D8, 0x5A66, 0xB0FC, 0x5A67, 0xD4D1, 0x5A69, 0xD4E9, + 0x5A6A, 0xB0FD, 0x5A6C, 0xD4D9, 0x5A6D, 0xD4D5, 0x5A70, 0xD4E8, + 0x5A77, 0xB440, 0x5A78, 0xD8BB, 0x5A7A, 0xD8B8, 0x5A7B, 0xD8C9, + 0x5A7C, 0xD8BD, 0x5A7D, 0xD8CA, 0x5A7F, 0xB442, 0x5A83, 0xD8C6, + 0x5A84, 0xD8C3, 0x5A8A, 0xD8C4, 0x5A8B, 0xD8C7, 0x5A8C, 0xD8CB, + 0x5A8E, 0xD4E3, 0x5A8F, 0xD8CD, 0x5A90, 0xDD47, 0x5A92, 0xB443, + 0x5A93, 0xD8CE, 0x5A94, 0xD8B6, 0x5A95, 0xD8C0, 0x5A97, 0xD8C5, + 0x5A9A, 0xB441, 0x5A9B, 0xB444, 0x5A9C, 0xD8CC, 0x5A9D, 0xD8CF, + 0x5A9E, 0xD8BA, 0x5A9F, 0xD8B7, 0x5AA2, 0xD8B9, 0x5AA5, 0xD8BE, + 0x5AA6, 0xD8BC, 0x5AA7, 0xB445, 0x5AA9, 0xD8C8, 0x5AAC, 0xD8BF, + 0x5AAE, 0xD8C1, 0x5AAF, 0xD8B5, 0x5AB0, 0xDCFA, 0x5AB1, 0xDCF8, + 0x5AB2, 0xB742, 0x5AB3, 0xB740, 0x5AB4, 0xDD43, 0x5AB5, 0xDCF9, + 0x5AB6, 0xDD44, 0x5AB7, 0xDD40, 0x5AB8, 0xDCF7, 0x5AB9, 0xDD46, + 0x5ABA, 0xDCF6, 0x5ABB, 0xDCFD, 0x5ABC, 0xB6FE, 0x5ABD, 0xB6FD, + 0x5ABE, 0xB6FC, 0x5ABF, 0xDCFB, 0x5AC0, 0xDD41, 0x5AC1, 0xB6F9, + 0x5AC2, 0xB741, 0x5AC4, 0xDCF4, 0x5AC6, 0xDCFE, 0x5AC7, 0xDCF3, + 0x5AC8, 0xDCFC, 0x5AC9, 0xB6FA, 0x5ACA, 0xDD42, 0x5ACB, 0xDCF5, + 0x5ACC, 0xB6FB, 0x5ACD, 0xDD45, 0x5AD5, 0xE16E, 0x5AD6, 0xB9E2, + 0x5AD7, 0xB9E1, 0x5AD8, 0xB9E3, 0x5AD9, 0xE17A, 0x5ADA, 0xE170, + 0x5ADB, 0xE176, 0x5ADC, 0xE16B, 0x5ADD, 0xE179, 0x5ADE, 0xE178, + 0x5ADF, 0xE17C, 0x5AE0, 0xE175, 0x5AE1, 0xB9DE, 0x5AE2, 0xE174, + 0x5AE3, 0xB9E4, 0x5AE5, 0xE16D, 0x5AE6, 0xB9DF, 0x5AE8, 0xE17B, + 0x5AE9, 0xB9E0, 0x5AEA, 0xE16F, 0x5AEB, 0xE172, 0x5AEC, 0xE177, + 0x5AED, 0xE171, 0x5AEE, 0xE16C, 0x5AF3, 0xE173, 0x5AF4, 0xE555, + 0x5AF5, 0xBC61, 0x5AF6, 0xE558, 0x5AF7, 0xE557, 0x5AF8, 0xE55A, + 0x5AF9, 0xE55C, 0x5AFA, 0xF9DC, 0x5AFB, 0xBC5F, 0x5AFD, 0xE556, + 0x5AFF, 0xE554, 0x5B01, 0xE55D, 0x5B02, 0xE55B, 0x5B03, 0xE559, + 0x5B05, 0xE55F, 0x5B07, 0xE55E, 0x5B08, 0xBC63, 0x5B09, 0xBC5E, + 0x5B0B, 0xBC60, 0x5B0C, 0xBC62, 0x5B0F, 0xE560, 0x5B10, 0xE957, + 0x5B13, 0xE956, 0x5B14, 0xE955, 0x5B16, 0xE958, 0x5B17, 0xE951, + 0x5B19, 0xE952, 0x5B1A, 0xE95A, 0x5B1B, 0xE953, 0x5B1D, 0xBEC5, + 0x5B1E, 0xE95C, 0x5B20, 0xE95B, 0x5B21, 0xE954, 0x5B23, 0xECD1, + 0x5B24, 0xC0A8, 0x5B25, 0xECCF, 0x5B26, 0xECD4, 0x5B27, 0xECD3, + 0x5B28, 0xE959, 0x5B2A, 0xC0A7, 0x5B2C, 0xECD2, 0x5B2D, 0xECCE, + 0x5B2E, 0xECD6, 0x5B2F, 0xECD5, 0x5B30, 0xC0A6, 0x5B32, 0xECD0, + 0x5B34, 0xBEC6, 0x5B38, 0xC254, 0x5B3C, 0xEFC1, 0x5B3D, 0xF1FA, + 0x5B3E, 0xF1FB, 0x5B3F, 0xF1FC, 0x5B40, 0xC45C, 0x5B43, 0xC45D, + 0x5B45, 0xF443, 0x5B47, 0xF5C8, 0x5B48, 0xF5C7, 0x5B4B, 0xF6DB, + 0x5B4C, 0xF6DC, 0x5B4D, 0xF7D5, 0x5B4E, 0xF8A7, 0x5B50, 0xA46C, + 0x5B51, 0xA46D, 0x5B53, 0xA46E, 0x5B54, 0xA4D5, 0x5B55, 0xA5A5, + 0x5B56, 0xC9D3, 0x5B57, 0xA672, 0x5B58, 0xA673, 0x5B5A, 0xA7B7, + 0x5B5B, 0xA7B8, 0x5B5C, 0xA7B6, 0x5B5D, 0xA7B5, 0x5B5F, 0xA973, + 0x5B62, 0xCC55, 0x5B63, 0xA975, 0x5B64, 0xA974, 0x5B65, 0xCC56, + 0x5B69, 0xABC4, 0x5B6B, 0xAE5D, 0x5B6C, 0xD165, 0x5B6E, 0xD4F0, + 0x5B70, 0xB145, 0x5B71, 0xB447, 0x5B72, 0xD4EF, 0x5B73, 0xB446, + 0x5B75, 0xB9E5, 0x5B77, 0xE17D, 0x5B78, 0xBEC7, 0x5B7A, 0xC0A9, + 0x5B7B, 0xECD7, 0x5B7D, 0xC45E, 0x5B7F, 0xC570, 0x5B81, 0xC972, + 0x5B83, 0xA5A6, 0x5B84, 0xC973, 0x5B85, 0xA676, 0x5B87, 0xA674, + 0x5B88, 0xA675, 0x5B89, 0xA677, 0x5B8B, 0xA7BA, 0x5B8C, 0xA7B9, + 0x5B8E, 0xCABC, 0x5B8F, 0xA7BB, 0x5B92, 0xCABD, 0x5B93, 0xCC57, + 0x5B95, 0xCC58, 0x5B97, 0xA976, 0x5B98, 0xA978, 0x5B99, 0xA97A, + 0x5B9A, 0xA977, 0x5B9B, 0xA97B, 0x5B9C, 0xA979, 0x5BA2, 0xABC8, + 0x5BA3, 0xABC5, 0x5BA4, 0xABC7, 0x5BA5, 0xABC9, 0x5BA6, 0xABC6, + 0x5BA7, 0xD166, 0x5BA8, 0xCE77, 0x5BAC, 0xD168, 0x5BAD, 0xD167, + 0x5BAE, 0xAE63, 0x5BB0, 0xAE5F, 0x5BB3, 0xAE60, 0x5BB4, 0xAE62, + 0x5BB5, 0xAE64, 0x5BB6, 0xAE61, 0x5BB8, 0xAE66, 0x5BB9, 0xAE65, + 0x5BBF, 0xB14A, 0x5BC0, 0xD4F2, 0x5BC1, 0xD4F1, 0x5BC2, 0xB149, + 0x5BC4, 0xB148, 0x5BC5, 0xB147, 0x5BC6, 0xB14B, 0x5BC7, 0xB146, + 0x5BCA, 0xD8D5, 0x5BCB, 0xD8D2, 0x5BCC, 0xB449, 0x5BCD, 0xD8D1, + 0x5BCE, 0xD8D6, 0x5BD0, 0xB44B, 0x5BD1, 0xD8D4, 0x5BD2, 0xB448, + 0x5BD3, 0xB44A, 0x5BD4, 0xD8D3, 0x5BD6, 0xDD48, 0x5BD8, 0xDD49, + 0x5BD9, 0xDD4A, 0x5BDE, 0xB9E6, 0x5BDF, 0xB9EE, 0x5BE0, 0xE17E, + 0x5BE1, 0xB9E8, 0x5BE2, 0xB9EC, 0x5BE3, 0xE1A1, 0x5BE4, 0xB9ED, + 0x5BE5, 0xB9E9, 0x5BE6, 0xB9EA, 0x5BE7, 0xB9E7, 0x5BE8, 0xB9EB, + 0x5BE9, 0xBC66, 0x5BEA, 0xD8D0, 0x5BEB, 0xBC67, 0x5BEC, 0xBC65, + 0x5BEE, 0xBC64, 0x5BEF, 0xE95D, 0x5BF0, 0xBEC8, 0x5BF1, 0xECD8, + 0x5BF2, 0xECD9, 0x5BF5, 0xC364, 0x5BF6, 0xC45F, 0x5BF8, 0xA46F, + 0x5BFA, 0xA678, 0x5C01, 0xABCA, 0x5C03, 0xD169, 0x5C04, 0xAE67, + 0x5C07, 0xB14E, 0x5C08, 0xB14D, 0x5C09, 0xB14C, 0x5C0A, 0xB44C, + 0x5C0B, 0xB44D, 0x5C0C, 0xD8D7, 0x5C0D, 0xB9EF, 0x5C0E, 0xBEC9, + 0x5C0F, 0xA470, 0x5C10, 0xC95C, 0x5C11, 0xA4D6, 0x5C12, 0xC974, + 0x5C15, 0xC9D4, 0x5C16, 0xA679, 0x5C1A, 0xA97C, 0x5C1F, 0xDD4B, + 0x5C22, 0xA471, 0x5C24, 0xA4D7, 0x5C25, 0xC9D5, 0x5C28, 0xCABE, + 0x5C2A, 0xCABF, 0x5C2C, 0xA7BC, 0x5C30, 0xD8D8, 0x5C31, 0xB44E, + 0x5C33, 0xDD4C, 0x5C37, 0xC0AA, 0x5C38, 0xA472, 0x5C39, 0xA4A8, + 0x5C3A, 0xA4D8, 0x5C3B, 0xC975, 0x5C3C, 0xA5A7, 0x5C3E, 0xA7C0, + 0x5C3F, 0xA7BF, 0x5C40, 0xA7BD, 0x5C41, 0xA7BE, 0x5C44, 0xCC59, + 0x5C45, 0xA97E, 0x5C46, 0xA9A1, 0x5C47, 0xCC5A, 0x5C48, 0xA97D, + 0x5C4B, 0xABCE, 0x5C4C, 0xCE78, 0x5C4D, 0xABCD, 0x5C4E, 0xABCB, + 0x5C4F, 0xABCC, 0x5C50, 0xAE6A, 0x5C51, 0xAE68, 0x5C54, 0xD16B, + 0x5C55, 0xAE69, 0x5C56, 0xD16A, 0x5C58, 0xAE5E, 0x5C59, 0xD4F3, + 0x5C5C, 0xB150, 0x5C5D, 0xB151, 0x5C60, 0xB14F, 0x5C62, 0xB9F0, + 0x5C63, 0xE1A2, 0x5C64, 0xBC68, 0x5C65, 0xBC69, 0x5C67, 0xE561, + 0x5C68, 0xC0AB, 0x5C69, 0xEFC2, 0x5C6A, 0xEFC3, 0x5C6C, 0xC4DD, + 0x5C6D, 0xF8A8, 0x5C6E, 0xC94B, 0x5C6F, 0xA4D9, 0x5C71, 0xA473, + 0x5C73, 0xC977, 0x5C74, 0xC976, 0x5C79, 0xA67A, 0x5C7A, 0xC9D7, + 0x5C7B, 0xC9D8, 0x5C7C, 0xC9D6, 0x5C7E, 0xC9D9, 0x5C86, 0xCAC7, + 0x5C88, 0xCAC2, 0x5C89, 0xCAC4, 0x5C8A, 0xCAC6, 0x5C8B, 0xCAC3, + 0x5C8C, 0xA7C4, 0x5C8D, 0xCAC0, 0x5C8F, 0xCAC1, 0x5C90, 0xA7C1, + 0x5C91, 0xA7C2, 0x5C92, 0xCAC5, 0x5C93, 0xCAC8, 0x5C94, 0xA7C3, + 0x5C95, 0xCAC9, 0x5C9D, 0xCC68, 0x5C9F, 0xCC62, 0x5CA0, 0xCC5D, + 0x5CA1, 0xA9A3, 0x5CA2, 0xCC65, 0x5CA3, 0xCC63, 0x5CA4, 0xCC5C, + 0x5CA5, 0xCC69, 0x5CA6, 0xCC6C, 0x5CA7, 0xCC67, 0x5CA8, 0xCC60, + 0x5CA9, 0xA9A5, 0x5CAA, 0xCC66, 0x5CAB, 0xA9A6, 0x5CAC, 0xCC61, + 0x5CAD, 0xCC64, 0x5CAE, 0xCC5B, 0x5CAF, 0xCC5F, 0x5CB0, 0xCC6B, + 0x5CB1, 0xA9A7, 0x5CB3, 0xA9A8, 0x5CB5, 0xCC5E, 0x5CB6, 0xCC6A, + 0x5CB7, 0xA9A2, 0x5CB8, 0xA9A4, 0x5CC6, 0xCEAB, 0x5CC7, 0xCEA4, + 0x5CC8, 0xCEAA, 0x5CC9, 0xCEA3, 0x5CCA, 0xCEA5, 0x5CCB, 0xCE7D, + 0x5CCC, 0xCE7B, 0x5CCE, 0xCEAC, 0x5CCF, 0xCEA9, 0x5CD0, 0xCE79, + 0x5CD2, 0xABD0, 0x5CD3, 0xCEA7, 0x5CD4, 0xCEA8, 0x5CD6, 0xCEA6, + 0x5CD7, 0xCE7C, 0x5CD8, 0xCE7A, 0x5CD9, 0xABCF, 0x5CDA, 0xCEA2, + 0x5CDB, 0xCE7E, 0x5CDE, 0xCEA1, 0x5CDF, 0xCEAD, 0x5CE8, 0xAE6F, + 0x5CEA, 0xAE6E, 0x5CEC, 0xD16C, 0x5CED, 0xAE6B, 0x5CEE, 0xD16E, + 0x5CF0, 0xAE70, 0x5CF1, 0xD16F, 0x5CF4, 0xAE73, 0x5CF6, 0xAE71, + 0x5CF7, 0xD170, 0x5CF8, 0xCEAE, 0x5CF9, 0xD172, 0x5CFB, 0xAE6D, + 0x5CFD, 0xAE6C, 0x5CFF, 0xD16D, 0x5D00, 0xD171, 0x5D01, 0xAE72, + 0x5D06, 0xB153, 0x5D07, 0xB152, 0x5D0B, 0xD4F5, 0x5D0C, 0xD4F9, + 0x5D0D, 0xD4FB, 0x5D0E, 0xB154, 0x5D0F, 0xD4FE, 0x5D11, 0xB158, + 0x5D12, 0xD541, 0x5D14, 0xB15A, 0x5D16, 0xB156, 0x5D17, 0xB15E, + 0x5D19, 0xB15B, 0x5D1A, 0xD4F7, 0x5D1B, 0xB155, 0x5D1D, 0xD4F6, + 0x5D1E, 0xD4F4, 0x5D1F, 0xD543, 0x5D20, 0xD4F8, 0x5D22, 0xB157, + 0x5D23, 0xD542, 0x5D24, 0xB15C, 0x5D25, 0xD4FD, 0x5D26, 0xD4FC, + 0x5D27, 0xB15D, 0x5D28, 0xD4FA, 0x5D29, 0xB159, 0x5D2E, 0xD544, + 0x5D30, 0xD540, 0x5D31, 0xD8E7, 0x5D32, 0xD8EE, 0x5D33, 0xD8E3, + 0x5D34, 0xB451, 0x5D35, 0xD8DF, 0x5D36, 0xD8EF, 0x5D37, 0xD8D9, + 0x5D38, 0xD8EC, 0x5D39, 0xD8EA, 0x5D3A, 0xD8E4, 0x5D3C, 0xD8ED, + 0x5D3D, 0xD8E6, 0x5D3F, 0xD8DE, 0x5D40, 0xD8F0, 0x5D41, 0xD8DC, + 0x5D42, 0xD8E9, 0x5D43, 0xD8DA, 0x5D45, 0xD8F1, 0x5D47, 0xB452, + 0x5D49, 0xD8EB, 0x5D4A, 0xDD4F, 0x5D4B, 0xD8DD, 0x5D4C, 0xB44F, + 0x5D4E, 0xD8E1, 0x5D50, 0xB450, 0x5D51, 0xD8E0, 0x5D52, 0xD8E5, + 0x5D55, 0xD8E2, 0x5D59, 0xD8E8, 0x5D5E, 0xDD53, 0x5D62, 0xDD56, + 0x5D63, 0xDD4E, 0x5D65, 0xDD50, 0x5D67, 0xDD55, 0x5D68, 0xDD54, + 0x5D69, 0xB743, 0x5D6B, 0xD8DB, 0x5D6C, 0xDD52, 0x5D6F, 0xB744, + 0x5D71, 0xDD4D, 0x5D72, 0xDD51, 0x5D77, 0xE1A9, 0x5D79, 0xE1B0, + 0x5D7A, 0xE1A7, 0x5D7C, 0xE1AE, 0x5D7D, 0xE1A5, 0x5D7E, 0xE1AD, + 0x5D7F, 0xE1B1, 0x5D80, 0xE1A4, 0x5D81, 0xE1A8, 0x5D82, 0xE1A3, + 0x5D84, 0xB9F1, 0x5D86, 0xE1A6, 0x5D87, 0xB9F2, 0x5D88, 0xE1AC, + 0x5D89, 0xE1AB, 0x5D8A, 0xE1AA, 0x5D8D, 0xE1AF, 0x5D92, 0xE565, + 0x5D93, 0xE567, 0x5D94, 0xBC6B, 0x5D95, 0xE568, 0x5D97, 0xE563, + 0x5D99, 0xE562, 0x5D9A, 0xE56C, 0x5D9C, 0xE56A, 0x5D9D, 0xBC6A, + 0x5D9E, 0xE56D, 0x5D9F, 0xE564, 0x5DA0, 0xE569, 0x5DA1, 0xE56B, + 0x5DA2, 0xE566, 0x5DA7, 0xE961, 0x5DA8, 0xE966, 0x5DA9, 0xE960, + 0x5DAA, 0xE965, 0x5DAC, 0xE95E, 0x5DAD, 0xE968, 0x5DAE, 0xE964, + 0x5DAF, 0xE969, 0x5DB0, 0xE963, 0x5DB1, 0xE95F, 0x5DB2, 0xE967, + 0x5DB4, 0xE96A, 0x5DB5, 0xE962, 0x5DB7, 0xECDA, 0x5DB8, 0xC0AF, + 0x5DBA, 0xC0AD, 0x5DBC, 0xC0AC, 0x5DBD, 0xC0AE, 0x5DC0, 0xEFC4, + 0x5DC2, 0xF172, 0x5DC3, 0xF1FD, 0x5DC6, 0xF444, 0x5DC7, 0xF445, + 0x5DC9, 0xC460, 0x5DCB, 0xF5C9, 0x5DCD, 0xC4DE, 0x5DCF, 0xF5CA, + 0x5DD1, 0xF6DE, 0x5DD2, 0xC572, 0x5DD4, 0xC571, 0x5DD5, 0xF6DD, + 0x5DD6, 0xC5C9, 0x5DD8, 0xF7D6, 0x5DDD, 0xA474, 0x5DDE, 0xA67B, + 0x5DDF, 0xC9DA, 0x5DE0, 0xCACA, 0x5DE1, 0xA8B5, 0x5DE2, 0xB15F, + 0x5DE5, 0xA475, 0x5DE6, 0xA5AA, 0x5DE7, 0xA5A9, 0x5DE8, 0xA5A8, + 0x5DEB, 0xA7C5, 0x5DEE, 0xAE74, 0x5DF0, 0xDD57, 0x5DF1, 0xA476, + 0x5DF2, 0xA477, 0x5DF3, 0xA478, 0x5DF4, 0xA4DA, 0x5DF7, 0xABD1, + 0x5DF9, 0xCEAF, 0x5DFD, 0xB453, 0x5DFE, 0xA479, 0x5DFF, 0xC95D, + 0x5E02, 0xA5AB, 0x5E03, 0xA5AC, 0x5E04, 0xC978, 0x5E06, 0xA67C, + 0x5E0A, 0xCACB, 0x5E0C, 0xA7C6, 0x5E0E, 0xCACC, 0x5E11, 0xA9AE, + 0x5E14, 0xCC6E, 0x5E15, 0xA9AC, 0x5E16, 0xA9AB, 0x5E17, 0xCC6D, + 0x5E18, 0xA9A9, 0x5E19, 0xCC6F, 0x5E1A, 0xA9AA, 0x5E1B, 0xA9AD, + 0x5E1D, 0xABD2, 0x5E1F, 0xABD4, 0x5E20, 0xCEB3, 0x5E21, 0xCEB0, + 0x5E22, 0xCEB1, 0x5E23, 0xCEB2, 0x5E24, 0xCEB4, 0x5E25, 0xABD3, + 0x5E28, 0xD174, 0x5E29, 0xD173, 0x5E2B, 0xAE76, 0x5E2D, 0xAE75, + 0x5E33, 0xB162, 0x5E34, 0xD546, 0x5E36, 0xB161, 0x5E37, 0xB163, + 0x5E38, 0xB160, 0x5E3D, 0xB455, 0x5E3E, 0xD545, 0x5E40, 0xB456, + 0x5E41, 0xD8F3, 0x5E43, 0xB457, 0x5E44, 0xD8F2, 0x5E45, 0xB454, + 0x5E4A, 0xDD5A, 0x5E4B, 0xDD5C, 0x5E4C, 0xB745, 0x5E4D, 0xDD5B, + 0x5E4E, 0xDD59, 0x5E4F, 0xDD58, 0x5E53, 0xE1B4, 0x5E54, 0xB9F7, + 0x5E55, 0xB9F5, 0x5E57, 0xB9F6, 0x5E58, 0xE1B2, 0x5E59, 0xE1B3, + 0x5E5B, 0xB9F3, 0x5E5C, 0xE571, 0x5E5D, 0xE56F, 0x5E5F, 0xBC6D, + 0x5E60, 0xE570, 0x5E61, 0xBC6E, 0x5E62, 0xBC6C, 0x5E63, 0xB9F4, + 0x5E66, 0xE96D, 0x5E67, 0xE96B, 0x5E68, 0xE96C, 0x5E69, 0xE56E, + 0x5E6A, 0xECDC, 0x5E6B, 0xC0B0, 0x5E6C, 0xECDB, 0x5E6D, 0xEFC5, + 0x5E6E, 0xEFC6, 0x5E6F, 0xE96E, 0x5E70, 0xF1FE, 0x5E72, 0xA47A, + 0x5E73, 0xA5AD, 0x5E74, 0xA67E, 0x5E75, 0xC9DB, 0x5E76, 0xA67D, + 0x5E78, 0xA9AF, 0x5E79, 0xB746, 0x5E7B, 0xA4DB, 0x5E7C, 0xA5AE, + 0x5E7D, 0xABD5, 0x5E7E, 0xB458, 0x5E80, 0xC979, 0x5E82, 0xC97A, + 0x5E84, 0xC9DC, 0x5E87, 0xA7C8, 0x5E88, 0xCAD0, 0x5E89, 0xCACE, + 0x5E8A, 0xA7C9, 0x5E8B, 0xCACD, 0x5E8C, 0xCACF, 0x5E8D, 0xCAD1, + 0x5E8F, 0xA7C7, 0x5E95, 0xA9B3, 0x5E96, 0xA9B4, 0x5E97, 0xA9B1, + 0x5E9A, 0xA9B0, 0x5E9B, 0xCEB8, 0x5E9C, 0xA9B2, 0x5EA0, 0xABD6, + 0x5EA2, 0xCEB7, 0x5EA3, 0xCEB9, 0x5EA4, 0xCEB6, 0x5EA5, 0xCEBA, + 0x5EA6, 0xABD7, 0x5EA7, 0xAE79, 0x5EA8, 0xD175, 0x5EAA, 0xD177, + 0x5EAB, 0xAE77, 0x5EAC, 0xD178, 0x5EAD, 0xAE78, 0x5EAE, 0xD176, + 0x5EB0, 0xCEB5, 0x5EB1, 0xD547, 0x5EB2, 0xD54A, 0x5EB3, 0xD54B, + 0x5EB4, 0xD548, 0x5EB5, 0xB167, 0x5EB6, 0xB166, 0x5EB7, 0xB164, + 0x5EB8, 0xB165, 0x5EB9, 0xD549, 0x5EBE, 0xB168, 0x5EC1, 0xB45A, + 0x5EC2, 0xB45B, 0x5EC4, 0xB45C, 0x5EC5, 0xDD5D, 0x5EC6, 0xDD5F, + 0x5EC7, 0xDD61, 0x5EC8, 0xB748, 0x5EC9, 0xB747, 0x5ECA, 0xB459, + 0x5ECB, 0xDD60, 0x5ECC, 0xDD5E, 0x5ECE, 0xE1B8, 0x5ED1, 0xE1B6, + 0x5ED2, 0xE1BC, 0x5ED3, 0xB9F8, 0x5ED4, 0xE1BD, 0x5ED5, 0xE1BA, + 0x5ED6, 0xB9F9, 0x5ED7, 0xE1B7, 0x5ED8, 0xE1B5, 0x5ED9, 0xE1BB, + 0x5EDA, 0xBC70, 0x5EDB, 0xE573, 0x5EDC, 0xE1B9, 0x5EDD, 0xBC72, + 0x5EDE, 0xE574, 0x5EDF, 0xBC71, 0x5EE0, 0xBC74, 0x5EE1, 0xE575, + 0x5EE2, 0xBC6F, 0x5EE3, 0xBC73, 0x5EE5, 0xE973, 0x5EE6, 0xE971, + 0x5EE7, 0xE970, 0x5EE8, 0xE972, 0x5EE9, 0xE96F, 0x5EEC, 0xC366, + 0x5EEE, 0xF446, 0x5EEF, 0xF447, 0x5EF1, 0xF5CB, 0x5EF2, 0xF6DF, + 0x5EF3, 0xC655, 0x5EF6, 0xA9B5, 0x5EF7, 0xA7CA, 0x5EFA, 0xABD8, + 0x5EFE, 0xA47B, 0x5EFF, 0xA4DC, 0x5F01, 0xA5AF, 0x5F02, 0xC9DD, + 0x5F04, 0xA7CB, 0x5F05, 0xCAD2, 0x5F07, 0xCEBB, 0x5F08, 0xABD9, + 0x5F0A, 0xB9FA, 0x5F0B, 0xA47C, 0x5F0F, 0xA6A1, 0x5F12, 0xB749, + 0x5F13, 0xA47D, 0x5F14, 0xA4DD, 0x5F15, 0xA4DE, 0x5F17, 0xA5B1, + 0x5F18, 0xA5B0, 0x5F1A, 0xC9DE, 0x5F1B, 0xA6A2, 0x5F1D, 0xCAD3, + 0x5F1F, 0xA7CC, 0x5F22, 0xCC71, 0x5F23, 0xCC72, 0x5F24, 0xCC73, + 0x5F26, 0xA9B6, 0x5F27, 0xA9B7, 0x5F28, 0xCC70, 0x5F29, 0xA9B8, + 0x5F2D, 0xABDA, 0x5F2E, 0xCEBC, 0x5F30, 0xD17A, 0x5F31, 0xAE7A, + 0x5F33, 0xD179, 0x5F35, 0xB169, 0x5F36, 0xD54C, 0x5F37, 0xB16A, + 0x5F38, 0xD54D, 0x5F3C, 0xB45D, 0x5F40, 0xDD62, 0x5F43, 0xE1BF, + 0x5F44, 0xE1BE, 0x5F46, 0xB9FB, 0x5F48, 0xBC75, 0x5F49, 0xE576, + 0x5F4A, 0xBECA, 0x5F4B, 0xE974, 0x5F4C, 0xC0B1, 0x5F4E, 0xC573, + 0x5F4F, 0xF7D8, 0x5F54, 0xCC74, 0x5F56, 0xCEBD, 0x5F57, 0xB16B, + 0x5F58, 0xD8F4, 0x5F59, 0xB74A, 0x5F5D, 0xC255, 0x5F62, 0xA7CE, + 0x5F64, 0xA7CD, 0x5F65, 0xABDB, 0x5F67, 0xD17B, 0x5F69, 0xB16D, + 0x5F6A, 0xB343, 0x5F6B, 0xB16E, 0x5F6C, 0xB16C, 0x5F6D, 0xB45E, + 0x5F6F, 0xE1C0, 0x5F70, 0xB9FC, 0x5F71, 0xBC76, 0x5F73, 0xC94C, + 0x5F74, 0xC9DF, 0x5F76, 0xCAD5, 0x5F77, 0xA7CF, 0x5F78, 0xCAD4, + 0x5F79, 0xA7D0, 0x5F7C, 0xA9BC, 0x5F7D, 0xCC77, 0x5F7E, 0xCC76, + 0x5F7F, 0xA9BB, 0x5F80, 0xA9B9, 0x5F81, 0xA9BA, 0x5F82, 0xCC75, + 0x5F85, 0xABDD, 0x5F86, 0xCEBE, 0x5F87, 0xABE0, 0x5F88, 0xABDC, + 0x5F89, 0xABE2, 0x5F8A, 0xABDE, 0x5F8B, 0xABDF, 0x5F8C, 0xABE1, + 0x5F90, 0xAE7D, 0x5F91, 0xAE7C, 0x5F92, 0xAE7B, 0x5F96, 0xD54F, + 0x5F97, 0xB16F, 0x5F98, 0xB172, 0x5F99, 0xB170, 0x5F9B, 0xD54E, + 0x5F9C, 0xB175, 0x5F9E, 0xB171, 0x5F9F, 0xD550, 0x5FA0, 0xB174, + 0x5FA1, 0xB173, 0x5FA5, 0xD8F6, 0x5FA6, 0xD8F5, 0x5FA8, 0xB461, + 0x5FA9, 0xB45F, 0x5FAA, 0xB460, 0x5FAB, 0xD8F7, 0x5FAC, 0xB74B, + 0x5FAD, 0xDD64, 0x5FAE, 0xB74C, 0x5FAF, 0xDD63, 0x5FB2, 0xE577, + 0x5FB5, 0xBC78, 0x5FB6, 0xE1C1, 0x5FB7, 0xBC77, 0x5FB9, 0xB9FD, + 0x5FBB, 0xECDE, 0x5FBC, 0xE975, 0x5FBD, 0xC0B2, 0x5FBE, 0xECDD, + 0x5FBF, 0xF240, 0x5FC0, 0xF448, 0x5FC1, 0xF449, 0x5FC3, 0xA4DF, + 0x5FC5, 0xA5B2, 0x5FC9, 0xC97B, 0x5FCC, 0xA7D2, 0x5FCD, 0xA7D4, + 0x5FCF, 0xC9E2, 0x5FD0, 0xCAD8, 0x5FD1, 0xCAD7, 0x5FD2, 0xCAD6, + 0x5FD4, 0xC9E1, 0x5FD5, 0xC9E0, 0x5FD6, 0xA6A4, 0x5FD7, 0xA7D3, + 0x5FD8, 0xA7D1, 0x5FD9, 0xA6A3, 0x5FDD, 0xA9BD, 0x5FDE, 0xCC78, + 0x5FE0, 0xA9BE, 0x5FE1, 0xCADD, 0x5FE3, 0xCADF, 0x5FE4, 0xCADE, + 0x5FE5, 0xCC79, 0x5FE8, 0xCADA, 0x5FEA, 0xA7D8, 0x5FEB, 0xA7D6, + 0x5FED, 0xCAD9, 0x5FEE, 0xCADB, 0x5FEF, 0xCAE1, 0x5FF1, 0xA7D5, + 0x5FF3, 0xCADC, 0x5FF4, 0xCAE5, 0x5FF5, 0xA9C0, 0x5FF7, 0xCAE2, + 0x5FF8, 0xA7D7, 0x5FFA, 0xCAE0, 0x5FFB, 0xCAE3, 0x5FFD, 0xA9BF, + 0x5FFF, 0xA9C1, 0x6000, 0xCAE4, 0x6009, 0xCCAF, 0x600A, 0xCCA2, + 0x600B, 0xCC7E, 0x600C, 0xCCAE, 0x600D, 0xCCA9, 0x600E, 0xABE7, + 0x600F, 0xA9C2, 0x6010, 0xCCAA, 0x6011, 0xCCAD, 0x6012, 0xABE3, + 0x6013, 0xCCAC, 0x6014, 0xA9C3, 0x6015, 0xA9C8, 0x6016, 0xA9C6, + 0x6017, 0xCCA3, 0x6019, 0xCC7C, 0x601A, 0xCCA5, 0x601B, 0xA9CD, + 0x601C, 0xCCB0, 0x601D, 0xABE4, 0x601E, 0xCCA6, 0x6020, 0xABE5, + 0x6021, 0xA9C9, 0x6022, 0xCCA8, 0x6024, 0xCECD, 0x6025, 0xABE6, + 0x6026, 0xCC7B, 0x6027, 0xA9CA, 0x6028, 0xABE8, 0x6029, 0xA9CB, + 0x602A, 0xA9C7, 0x602B, 0xA9CC, 0x602C, 0xCCA7, 0x602D, 0xCC7A, + 0x602E, 0xCCAB, 0x602F, 0xA9C4, 0x6032, 0xCC7D, 0x6033, 0xCCA4, + 0x6034, 0xCCA1, 0x6035, 0xA9C5, 0x6037, 0xCEBF, 0x6039, 0xCEC0, + 0x6040, 0xCECA, 0x6041, 0xD1A1, 0x6042, 0xCECB, 0x6043, 0xABEE, + 0x6044, 0xCECE, 0x6045, 0xCEC4, 0x6046, 0xABED, 0x6047, 0xCEC6, + 0x6049, 0xCEC7, 0x604C, 0xCEC9, 0x604D, 0xABE9, 0x6050, 0xAEA3, + 0x6052, 0xF9DA, 0x6053, 0xCEC5, 0x6054, 0xCEC1, 0x6055, 0xAEA4, + 0x6058, 0xCECF, 0x6059, 0xAE7E, 0x605A, 0xD17D, 0x605B, 0xCEC8, + 0x605D, 0xD17C, 0x605E, 0xCEC3, 0x605F, 0xCECC, 0x6062, 0xABEC, + 0x6063, 0xAEA1, 0x6064, 0xABF2, 0x6065, 0xAEA2, 0x6066, 0xCED0, + 0x6067, 0xD17E, 0x6068, 0xABEB, 0x6069, 0xAEA6, 0x606A, 0xABF1, + 0x606B, 0xABF0, 0x606C, 0xABEF, 0x606D, 0xAEA5, 0x606E, 0xCED1, + 0x606F, 0xAEA7, 0x6070, 0xABEA, 0x6072, 0xCEC2, 0x607F, 0xB176, + 0x6080, 0xD1A4, 0x6081, 0xD1A6, 0x6083, 0xD1A8, 0x6084, 0xAEA8, + 0x6085, 0xAEAE, 0x6086, 0xD553, 0x6087, 0xD1AC, 0x6088, 0xD1A3, + 0x6089, 0xB178, 0x608A, 0xD551, 0x608C, 0xAEAD, 0x608D, 0xAEAB, + 0x608E, 0xD1AE, 0x6090, 0xD552, 0x6092, 0xD1A5, 0x6094, 0xAEAC, + 0x6095, 0xD1A9, 0x6096, 0xAEAF, 0x6097, 0xD1AB, 0x609A, 0xAEAA, + 0x609B, 0xD1AA, 0x609C, 0xD1AD, 0x609D, 0xD1A7, 0x609F, 0xAEA9, + 0x60A0, 0xB179, 0x60A2, 0xD1A2, 0x60A3, 0xB177, 0x60A8, 0xB17A, + 0x60B0, 0xD555, 0x60B1, 0xD55E, 0x60B2, 0xB464, 0x60B4, 0xB17C, + 0x60B5, 0xB1A3, 0x60B6, 0xB465, 0x60B7, 0xD560, 0x60B8, 0xB1AA, + 0x60B9, 0xD8F9, 0x60BA, 0xD556, 0x60BB, 0xB1A2, 0x60BC, 0xB1A5, + 0x60BD, 0xB17E, 0x60BE, 0xD554, 0x60BF, 0xD562, 0x60C0, 0xD565, + 0x60C1, 0xD949, 0x60C3, 0xD563, 0x60C4, 0xD8FD, 0x60C5, 0xB1A1, + 0x60C6, 0xB1A8, 0x60C7, 0xB1AC, 0x60C8, 0xD55D, 0x60C9, 0xD8F8, + 0x60CA, 0xD561, 0x60CB, 0xB17B, 0x60CC, 0xD8FA, 0x60CD, 0xD564, + 0x60CE, 0xD8FC, 0x60CF, 0xD559, 0x60D1, 0xB462, 0x60D3, 0xD557, + 0x60D4, 0xD558, 0x60D5, 0xB1A7, 0x60D8, 0xB1A6, 0x60D9, 0xD55B, + 0x60DA, 0xB1AB, 0x60DB, 0xD55F, 0x60DC, 0xB1A4, 0x60DD, 0xD55C, + 0x60DF, 0xB1A9, 0x60E0, 0xB466, 0x60E1, 0xB463, 0x60E2, 0xD8FB, + 0x60E4, 0xD55A, 0x60E6, 0xB17D, 0x60F0, 0xB46B, 0x60F1, 0xB46F, + 0x60F2, 0xD940, 0x60F3, 0xB751, 0x60F4, 0xB46D, 0x60F5, 0xD944, + 0x60F6, 0xB471, 0x60F7, 0xDD65, 0x60F8, 0xD946, 0x60F9, 0xB753, + 0x60FA, 0xB469, 0x60FB, 0xB46C, 0x60FC, 0xD947, 0x60FE, 0xD948, + 0x60FF, 0xD94E, 0x6100, 0xB473, 0x6101, 0xB754, 0x6103, 0xD94A, + 0x6104, 0xD94F, 0x6105, 0xD943, 0x6106, 0xB75E, 0x6108, 0xB755, + 0x6109, 0xB472, 0x610A, 0xD941, 0x610B, 0xD950, 0x610D, 0xB75D, + 0x610E, 0xB470, 0x610F, 0xB74E, 0x6110, 0xD94D, 0x6112, 0xB474, + 0x6113, 0xD945, 0x6114, 0xD8FE, 0x6115, 0xB46A, 0x6116, 0xD942, + 0x6118, 0xD94B, 0x611A, 0xB74D, 0x611B, 0xB752, 0x611C, 0xB467, + 0x611D, 0xD94C, 0x611F, 0xB750, 0x6123, 0xB468, 0x6127, 0xB75C, + 0x6128, 0xE1C3, 0x6129, 0xDD70, 0x612B, 0xDD68, 0x612C, 0xE1C2, + 0x612E, 0xDD6C, 0x612F, 0xDD6E, 0x6132, 0xDD6B, 0x6134, 0xB75B, + 0x6136, 0xDD6A, 0x6137, 0xB75F, 0x613B, 0xE1D2, 0x613E, 0xB75A, + 0x613F, 0xBA40, 0x6140, 0xDD71, 0x6141, 0xE1C4, 0x6144, 0xB758, + 0x6145, 0xDD69, 0x6146, 0xDD6D, 0x6147, 0xB9FE, 0x6148, 0xB74F, + 0x6149, 0xDD66, 0x614A, 0xDD67, 0x614B, 0xBA41, 0x614C, 0xB757, + 0x614D, 0xB759, 0x614E, 0xB756, 0x614F, 0xDD6F, 0x6152, 0xE1C8, + 0x6153, 0xE1C9, 0x6154, 0xE1CE, 0x6155, 0xBC7D, 0x6156, 0xE1D5, + 0x6158, 0xBA47, 0x615A, 0xBA46, 0x615B, 0xE1D0, 0x615D, 0xBC7C, + 0x615E, 0xE1C5, 0x615F, 0xBA45, 0x6161, 0xE1D4, 0x6162, 0xBA43, + 0x6163, 0xBA44, 0x6165, 0xE1D1, 0x6166, 0xE5AA, 0x6167, 0xBC7A, + 0x6168, 0xB46E, 0x616A, 0xE1D3, 0x616B, 0xBCA3, 0x616C, 0xE1CB, + 0x616E, 0xBC7B, 0x6170, 0xBCA2, 0x6171, 0xE1C6, 0x6172, 0xE1CA, + 0x6173, 0xE1C7, 0x6174, 0xE1CD, 0x6175, 0xBA48, 0x6176, 0xBC79, + 0x6177, 0xBA42, 0x6179, 0xE57A, 0x617A, 0xE1CF, 0x617C, 0xBCA1, + 0x617E, 0xBCA4, 0x6180, 0xE1CC, 0x6182, 0xBC7E, 0x6183, 0xE579, + 0x6189, 0xE57E, 0x618A, 0xBECE, 0x618B, 0xE578, 0x618C, 0xE9A3, + 0x618D, 0xE5A9, 0x618E, 0xBCA8, 0x6190, 0xBCA6, 0x6191, 0xBECC, + 0x6192, 0xE5A6, 0x6193, 0xE5A2, 0x6194, 0xBCAC, 0x6196, 0xE978, + 0x619A, 0xBCAA, 0x619B, 0xE5A1, 0x619D, 0xE976, 0x619F, 0xE5A5, + 0x61A1, 0xE5A8, 0x61A2, 0xE57D, 0x61A4, 0xBCAB, 0x61A7, 0xBCA5, + 0x61A8, 0xE977, 0x61A9, 0xBECD, 0x61AA, 0xE5A7, 0x61AB, 0xBCA7, + 0x61AC, 0xBCA9, 0x61AD, 0xE5A4, 0x61AE, 0xBCAD, 0x61AF, 0xE5A3, + 0x61B0, 0xE57C, 0x61B1, 0xE57B, 0x61B2, 0xBECB, 0x61B3, 0xE5AB, + 0x61B4, 0xE97A, 0x61B5, 0xECE0, 0x61B6, 0xBED0, 0x61B8, 0xE9A2, + 0x61BA, 0xE97E, 0x61BC, 0xECE1, 0x61BE, 0xBED1, 0x61BF, 0xE9A1, + 0x61C1, 0xE97C, 0x61C2, 0xC0B4, 0x61C3, 0xECDF, 0x61C5, 0xE979, + 0x61C6, 0xE97B, 0x61C7, 0xC0B5, 0x61C8, 0xBED3, 0x61C9, 0xC0B3, + 0x61CA, 0xBED2, 0x61CB, 0xC0B7, 0x61CC, 0xE97D, 0x61CD, 0xBECF, + 0x61D6, 0xEFCF, 0x61D8, 0xEFC7, 0x61DE, 0xECE7, 0x61DF, 0xEFC8, + 0x61E0, 0xECE3, 0x61E3, 0xC256, 0x61E4, 0xECE5, 0x61E5, 0xECE4, + 0x61E6, 0xC0B6, 0x61E7, 0xECE2, 0x61E8, 0xECE6, 0x61E9, 0xEFD0, + 0x61EA, 0xEFCC, 0x61EB, 0xEFCE, 0x61ED, 0xEFC9, 0x61EE, 0xEFCA, + 0x61F0, 0xEFCD, 0x61F1, 0xEFCB, 0x61F2, 0xC367, 0x61F5, 0xC36A, + 0x61F6, 0xC369, 0x61F7, 0xC368, 0x61F8, 0xC461, 0x61F9, 0xF44A, + 0x61FA, 0xC462, 0x61FB, 0xF241, 0x61FC, 0xC4DF, 0x61FD, 0xF5CC, + 0x61FE, 0xC4E0, 0x61FF, 0xC574, 0x6200, 0xC5CA, 0x6201, 0xF7D9, + 0x6203, 0xF7DA, 0x6204, 0xF7DB, 0x6207, 0xF9BA, 0x6208, 0xA4E0, + 0x6209, 0xC97C, 0x620A, 0xA5B3, 0x620C, 0xA6A6, 0x620D, 0xA6A7, + 0x620E, 0xA6A5, 0x6210, 0xA6A8, 0x6211, 0xA7DA, 0x6212, 0xA7D9, + 0x6214, 0xCCB1, 0x6215, 0xA9CF, 0x6216, 0xA9CE, 0x6219, 0xD1AF, + 0x621A, 0xB1AD, 0x621B, 0xB1AE, 0x621F, 0xB475, 0x6220, 0xDD72, + 0x6221, 0xB760, 0x6222, 0xB761, 0x6223, 0xDD74, 0x6224, 0xDD76, + 0x6225, 0xDD75, 0x6227, 0xE1D7, 0x6229, 0xE1D6, 0x622A, 0xBA49, + 0x622B, 0xE1D8, 0x622D, 0xE5AC, 0x622E, 0xBCAE, 0x6230, 0xBED4, + 0x6232, 0xC0B8, 0x6233, 0xC257, 0x6234, 0xC0B9, 0x6236, 0xA4E1, + 0x623A, 0xCAE6, 0x623D, 0xCCB2, 0x623E, 0xA9D1, 0x623F, 0xA9D0, + 0x6240, 0xA9D2, 0x6241, 0xABF3, 0x6242, 0xCED2, 0x6243, 0xCED3, + 0x6246, 0xD1B0, 0x6247, 0xAEB0, 0x6248, 0xB1AF, 0x6249, 0xB476, + 0x624A, 0xD951, 0x624B, 0xA4E2, 0x624D, 0xA47E, 0x624E, 0xA4E3, + 0x6250, 0xC97D, 0x6251, 0xA5B7, 0x6252, 0xA5B6, 0x6253, 0xA5B4, + 0x6254, 0xA5B5, 0x6258, 0xA6AB, 0x6259, 0xC9E9, 0x625A, 0xC9EB, + 0x625B, 0xA6AA, 0x625C, 0xC9E3, 0x625E, 0xC9E4, 0x6260, 0xC9EA, + 0x6261, 0xC9E6, 0x6262, 0xC9E8, 0x6263, 0xA6A9, 0x6264, 0xC9E5, + 0x6265, 0xC9EC, 0x6266, 0xC9E7, 0x626D, 0xA7E1, 0x626E, 0xA7EA, + 0x626F, 0xA7E8, 0x6270, 0xCAF0, 0x6271, 0xCAED, 0x6272, 0xCAF5, + 0x6273, 0xA7E6, 0x6274, 0xCAF6, 0x6276, 0xA7DF, 0x6277, 0xCAF3, + 0x6279, 0xA7E5, 0x627A, 0xCAEF, 0x627B, 0xCAEE, 0x627C, 0xA7E3, + 0x627D, 0xCAF4, 0x627E, 0xA7E4, 0x627F, 0xA9D3, 0x6280, 0xA7DE, + 0x6281, 0xCAF1, 0x6283, 0xCAE7, 0x6284, 0xA7DB, 0x6286, 0xA7EE, + 0x6287, 0xCAEC, 0x6288, 0xCAF2, 0x6289, 0xA7E0, 0x628A, 0xA7E2, + 0x628C, 0xCAE8, 0x628E, 0xCAE9, 0x628F, 0xCAEA, 0x6291, 0xA7ED, + 0x6292, 0xA7E7, 0x6293, 0xA7EC, 0x6294, 0xCAEB, 0x6295, 0xA7EB, + 0x6296, 0xA7DD, 0x6297, 0xA7DC, 0x6298, 0xA7E9, 0x62A8, 0xA9E1, + 0x62A9, 0xCCBE, 0x62AA, 0xCCB7, 0x62AB, 0xA9DC, 0x62AC, 0xA9EF, + 0x62AD, 0xCCB3, 0x62AE, 0xCCBA, 0x62AF, 0xCCBC, 0x62B0, 0xCCBF, + 0x62B1, 0xA9EA, 0x62B3, 0xCCBB, 0x62B4, 0xCCB4, 0x62B5, 0xA9E8, + 0x62B6, 0xCCB8, 0x62B8, 0xCCC0, 0x62B9, 0xA9D9, 0x62BB, 0xCCBD, + 0x62BC, 0xA9E3, 0x62BD, 0xA9E2, 0x62BE, 0xCCB6, 0x62BF, 0xA9D7, + 0x62C2, 0xA9D8, 0x62C4, 0xA9D6, 0x62C6, 0xA9EE, 0x62C7, 0xA9E6, + 0x62C8, 0xA9E0, 0x62C9, 0xA9D4, 0x62CA, 0xCCB9, 0x62CB, 0xA9DF, + 0x62CC, 0xA9D5, 0x62CD, 0xA9E7, 0x62CE, 0xA9F0, 0x62CF, 0xCED4, + 0x62D0, 0xA9E4, 0x62D1, 0xCCB5, 0x62D2, 0xA9DA, 0x62D3, 0xA9DD, + 0x62D4, 0xA9DE, 0x62D6, 0xA9EC, 0x62D7, 0xA9ED, 0x62D8, 0xA9EB, + 0x62D9, 0xA9E5, 0x62DA, 0xA9E9, 0x62DB, 0xA9DB, 0x62DC, 0xABF4, + 0x62EB, 0xCEDA, 0x62EC, 0xAC41, 0x62ED, 0xABF8, 0x62EE, 0xABFA, + 0x62EF, 0xAC40, 0x62F0, 0xCEE6, 0x62F1, 0xABFD, 0x62F2, 0xD1B1, + 0x62F3, 0xAEB1, 0x62F4, 0xAC43, 0x62F5, 0xCED7, 0x62F6, 0xCEDF, + 0x62F7, 0xABFE, 0x62F8, 0xCEDE, 0x62F9, 0xCEDB, 0x62FA, 0xCEE3, + 0x62FB, 0xCEE5, 0x62FC, 0xABF7, 0x62FD, 0xABFB, 0x62FE, 0xAC42, + 0x62FF, 0xAEB3, 0x6300, 0xCEE0, 0x6301, 0xABF9, 0x6302, 0xAC45, + 0x6303, 0xCED9, 0x6307, 0xABFC, 0x6308, 0xAEB2, 0x6309, 0xABF6, + 0x630B, 0xCED6, 0x630C, 0xCEDD, 0x630D, 0xCED5, 0x630E, 0xCED8, + 0x630F, 0xCEDC, 0x6310, 0xD1B2, 0x6311, 0xAC44, 0x6313, 0xCEE1, + 0x6314, 0xCEE2, 0x6315, 0xCEE4, 0x6316, 0xABF5, 0x6328, 0xAEC1, + 0x6329, 0xD1BE, 0x632A, 0xAEBF, 0x632B, 0xAEC0, 0x632C, 0xD1B4, + 0x632D, 0xD1C4, 0x632F, 0xAEB6, 0x6332, 0xD566, 0x6333, 0xD1C6, + 0x6334, 0xD1C0, 0x6336, 0xD1B7, 0x6338, 0xD1C9, 0x6339, 0xD1BA, + 0x633A, 0xAEBC, 0x633B, 0xD57D, 0x633C, 0xD1BD, 0x633D, 0xAEBE, + 0x633E, 0xAEB5, 0x6340, 0xD1CB, 0x6341, 0xD1BF, 0x6342, 0xAEB8, + 0x6343, 0xD1B8, 0x6344, 0xD1B5, 0x6345, 0xD1B6, 0x6346, 0xAEB9, + 0x6347, 0xD1C5, 0x6348, 0xD1CC, 0x6349, 0xAEBB, 0x634A, 0xD1BC, + 0x634B, 0xD1BB, 0x634C, 0xAEC3, 0x634D, 0xAEC2, 0x634E, 0xAEB4, + 0x634F, 0xAEBA, 0x6350, 0xAEBD, 0x6351, 0xD1C8, 0x6354, 0xD1C2, + 0x6355, 0xAEB7, 0x6356, 0xD1B3, 0x6357, 0xD1CA, 0x6358, 0xD1C1, + 0x6359, 0xD1C3, 0x635A, 0xD1C7, 0x6365, 0xD567, 0x6367, 0xB1B7, + 0x6368, 0xB1CB, 0x6369, 0xB1CA, 0x636B, 0xB1BF, 0x636D, 0xD579, + 0x636E, 0xD575, 0x636F, 0xD572, 0x6370, 0xD5A6, 0x6371, 0xB1BA, + 0x6372, 0xB1B2, 0x6375, 0xD577, 0x6376, 0xB4A8, 0x6377, 0xB1B6, + 0x6378, 0xD5A1, 0x637A, 0xB1CC, 0x637B, 0xB1C9, 0x637C, 0xD57B, + 0x637D, 0xD56A, 0x6380, 0xB1C8, 0x6381, 0xD5A3, 0x6382, 0xD569, + 0x6383, 0xB1BD, 0x6384, 0xB1C1, 0x6385, 0xD5A2, 0x6387, 0xD573, + 0x6388, 0xB1C2, 0x6389, 0xB1BC, 0x638A, 0xD568, 0x638C, 0xB478, + 0x638D, 0xD5A5, 0x638E, 0xD571, 0x638F, 0xB1C7, 0x6390, 0xD574, + 0x6391, 0xD5A4, 0x6392, 0xB1C6, 0x6394, 0xD952, 0x6396, 0xB1B3, + 0x6397, 0xD56F, 0x6398, 0xB1B8, 0x6399, 0xB1C3, 0x639B, 0xB1BE, + 0x639C, 0xD578, 0x639D, 0xD56E, 0x639E, 0xD56C, 0x639F, 0xD57E, + 0x63A0, 0xB1B0, 0x63A1, 0xB1C4, 0x63A2, 0xB1B4, 0x63A3, 0xB477, + 0x63A4, 0xD57C, 0x63A5, 0xB1B5, 0x63A7, 0xB1B1, 0x63A8, 0xB1C0, + 0x63A9, 0xB1BB, 0x63AA, 0xB1B9, 0x63AB, 0xD570, 0x63AC, 0xB1C5, + 0x63AD, 0xD56D, 0x63AE, 0xD57A, 0x63AF, 0xD576, 0x63B0, 0xD954, + 0x63B1, 0xD953, 0x63BD, 0xD56B, 0x63BE, 0xD964, 0x63C0, 0xB47A, + 0x63C2, 0xD96A, 0x63C3, 0xD959, 0x63C4, 0xD967, 0x63C5, 0xDD77, + 0x63C6, 0xB47D, 0x63C7, 0xD96B, 0x63C8, 0xD96E, 0x63C9, 0xB47C, + 0x63CA, 0xD95C, 0x63CB, 0xD96D, 0x63CC, 0xD96C, 0x63CD, 0xB47E, + 0x63CE, 0xD955, 0x63CF, 0xB479, 0x63D0, 0xB4A3, 0x63D2, 0xB4A1, + 0x63D3, 0xD969, 0x63D5, 0xD95F, 0x63D6, 0xB4A5, 0x63D7, 0xD970, + 0x63D8, 0xD968, 0x63D9, 0xD971, 0x63DA, 0xB4AD, 0x63DB, 0xB4AB, + 0x63DC, 0xD966, 0x63DD, 0xD965, 0x63DF, 0xD963, 0x63E0, 0xD95D, + 0x63E1, 0xB4A4, 0x63E3, 0xB4A2, 0x63E4, 0xD1B9, 0x63E5, 0xD956, + 0x63E7, 0xDDB7, 0x63E8, 0xD957, 0x63E9, 0xB47B, 0x63EA, 0xB4AA, + 0x63EB, 0xDD79, 0x63ED, 0xB4A6, 0x63EE, 0xB4A7, 0x63EF, 0xD958, + 0x63F0, 0xD96F, 0x63F1, 0xDD78, 0x63F2, 0xD960, 0x63F3, 0xD95B, + 0x63F4, 0xB4A9, 0x63F5, 0xD961, 0x63F6, 0xD95E, 0x63F9, 0xB4AE, + 0x6406, 0xB770, 0x6409, 0xDD7C, 0x640A, 0xDDB1, 0x640B, 0xDDB6, + 0x640C, 0xDDAA, 0x640D, 0xB76C, 0x640E, 0xDDBB, 0x640F, 0xB769, + 0x6410, 0xDD7A, 0x6412, 0xDD7B, 0x6413, 0xB762, 0x6414, 0xB76B, + 0x6415, 0xDDA4, 0x6416, 0xB76E, 0x6417, 0xB76F, 0x6418, 0xDDA5, + 0x641A, 0xDDB2, 0x641B, 0xDDB8, 0x641C, 0xB76A, 0x641E, 0xB764, + 0x641F, 0xDDA3, 0x6420, 0xDD7D, 0x6421, 0xDDBA, 0x6422, 0xDDA8, + 0x6423, 0xDDA9, 0x6424, 0xDD7E, 0x6425, 0xDDB4, 0x6426, 0xDDAB, + 0x6427, 0xDDB5, 0x6428, 0xDDAD, 0x642A, 0xB765, 0x642B, 0xE1D9, + 0x642C, 0xB768, 0x642D, 0xB766, 0x642E, 0xDDB9, 0x642F, 0xDDB0, + 0x6430, 0xDDAC, 0x6433, 0xDDA1, 0x6434, 0xBA53, 0x6435, 0xDDAF, + 0x6436, 0xB76D, 0x6437, 0xDDA7, 0x6439, 0xDDA6, 0x643D, 0xB767, + 0x643E, 0xB763, 0x643F, 0xE1EE, 0x6440, 0xDDB3, 0x6441, 0xDDAE, + 0x6443, 0xDDA2, 0x644B, 0xE1E9, 0x644D, 0xE1DA, 0x644E, 0xE1E5, + 0x6450, 0xE1EC, 0x6451, 0xBA51, 0x6452, 0xB4AC, 0x6453, 0xE1EA, + 0x6454, 0xBA4C, 0x6458, 0xBA4B, 0x6459, 0xE1F1, 0x645B, 0xE1DB, + 0x645C, 0xE1E8, 0x645D, 0xE1DC, 0x645E, 0xE1E7, 0x645F, 0xBA4F, + 0x6460, 0xE1EB, 0x6461, 0xD962, 0x6465, 0xE1F2, 0x6466, 0xE1E3, + 0x6467, 0xBA52, 0x6468, 0xE5BA, 0x6469, 0xBCAF, 0x646B, 0xE1F0, + 0x646C, 0xE1EF, 0x646D, 0xBA54, 0x646E, 0xE5AD, 0x646F, 0xBCB0, + 0x6470, 0xE5AE, 0x6472, 0xE1DF, 0x6473, 0xE1E0, 0x6474, 0xE1DD, + 0x6475, 0xE1E2, 0x6476, 0xE1DE, 0x6477, 0xE1F3, 0x6478, 0xBA4E, + 0x6479, 0xBCB1, 0x647A, 0xBA50, 0x647B, 0xBA55, 0x647D, 0xE1E1, + 0x647F, 0xE1ED, 0x6482, 0xE1E6, 0x6485, 0xE5B1, 0x6487, 0xBA4A, + 0x6488, 0xBCB4, 0x6489, 0xE9AA, 0x648A, 0xE5B6, 0x648B, 0xE5B5, + 0x648C, 0xE5B7, 0x648F, 0xE5B4, 0x6490, 0xBCB5, 0x6492, 0xBCBB, + 0x6493, 0xBCB8, 0x6495, 0xBCB9, 0x6496, 0xE5AF, 0x6497, 0xE5B2, + 0x6498, 0xE5BC, 0x6499, 0xBCC1, 0x649A, 0xBCBF, 0x649C, 0xE5B3, + 0x649D, 0xD95A, 0x649E, 0xBCB2, 0x649F, 0xE5B9, 0x64A0, 0xE5B0, + 0x64A2, 0xBCC2, 0x64A3, 0xE5B8, 0x64A4, 0xBA4D, 0x64A5, 0xBCB7, + 0x64A6, 0xE1E4, 0x64A9, 0xBCBA, 0x64AB, 0xBCBE, 0x64AC, 0xBCC0, + 0x64AD, 0xBCBD, 0x64AE, 0xBCBC, 0x64B0, 0xBCB6, 0x64B1, 0xE5BB, + 0x64B2, 0xBCB3, 0x64B3, 0xBCC3, 0x64BB, 0xBED8, 0x64BC, 0xBED9, + 0x64BD, 0xE9A9, 0x64BE, 0xBEE2, 0x64BF, 0xBEDF, 0x64C1, 0xBED6, + 0x64C2, 0xBEDD, 0x64C3, 0xE9AB, 0x64C4, 0xBEDB, 0x64C5, 0xBED5, + 0x64C7, 0xBEDC, 0x64C9, 0xE9A8, 0x64CA, 0xC0BB, 0x64CB, 0xBED7, + 0x64CD, 0xBEDE, 0x64CE, 0xC0BA, 0x64CF, 0xE9A7, 0x64D0, 0xE9A6, + 0x64D2, 0xBEE0, 0x64D4, 0xBEE1, 0x64D6, 0xE9A5, 0x64D7, 0xE9A4, + 0x64D8, 0xC0BC, 0x64D9, 0xE9AE, 0x64DA, 0xBEDA, 0x64DB, 0xE9AC, + 0x64E0, 0xC0BD, 0x64E2, 0xC0C2, 0x64E3, 0xECEA, 0x64E4, 0xECEC, + 0x64E6, 0xC0BF, 0x64E8, 0xECED, 0x64E9, 0xECE9, 0x64EB, 0xECEB, + 0x64EC, 0xC0C0, 0x64ED, 0xC0C3, 0x64EF, 0xECE8, 0x64F0, 0xC0BE, + 0x64F1, 0xC0C1, 0x64F2, 0xC259, 0x64F3, 0xE9AD, 0x64F4, 0xC258, + 0x64F7, 0xC25E, 0x64F8, 0xEFD4, 0x64FA, 0xC25C, 0x64FB, 0xC25D, + 0x64FC, 0xEFD7, 0x64FD, 0xEFD3, 0x64FE, 0xC25A, 0x64FF, 0xEFD1, + 0x6500, 0xC36B, 0x6501, 0xEFD5, 0x6503, 0xEFD6, 0x6504, 0xEFD2, + 0x6506, 0xC25B, 0x6507, 0xF242, 0x6509, 0xF245, 0x650C, 0xF246, + 0x650D, 0xF244, 0x650E, 0xF247, 0x650F, 0xC36C, 0x6510, 0xF243, + 0x6513, 0xF44E, 0x6514, 0xC464, 0x6515, 0xF44D, 0x6516, 0xF44C, + 0x6517, 0xF44B, 0x6518, 0xC463, 0x6519, 0xC465, 0x651B, 0xF5CD, + 0x651C, 0xC4E2, 0x651D, 0xC4E1, 0x6520, 0xF6E1, 0x6521, 0xF6E0, + 0x6522, 0xF6E3, 0x6523, 0xC5CB, 0x6524, 0xC575, 0x6525, 0xF7DD, + 0x6526, 0xF6E2, 0x6529, 0xF7DC, 0x652A, 0xC5CD, 0x652B, 0xC5CC, + 0x652C, 0xC5F3, 0x652D, 0xF8A9, 0x652E, 0xF8EF, 0x652F, 0xA4E4, + 0x6532, 0xD972, 0x6533, 0xE9AF, 0x6536, 0xA6AC, 0x6537, 0xCAF7, + 0x6538, 0xA7F1, 0x6539, 0xA7EF, 0x653B, 0xA7F0, 0x653D, 0xCCC1, + 0x653E, 0xA9F1, 0x653F, 0xAC46, 0x6541, 0xCEE7, 0x6543, 0xCEE8, + 0x6545, 0xAC47, 0x6546, 0xD1CE, 0x6548, 0xAEC4, 0x6549, 0xAEC5, + 0x654A, 0xD1CD, 0x654F, 0xB1D3, 0x6551, 0xB1CF, 0x6553, 0xD5A7, + 0x6554, 0xB1D6, 0x6555, 0xB1D5, 0x6556, 0xB1CE, 0x6557, 0xB1D1, + 0x6558, 0xB1D4, 0x6559, 0xB1D0, 0x655C, 0xD976, 0x655D, 0xB1CD, + 0x655E, 0xB4AF, 0x6562, 0xB4B1, 0x6563, 0xB4B2, 0x6564, 0xD975, + 0x6565, 0xD978, 0x6566, 0xB4B0, 0x6567, 0xD973, 0x6568, 0xD977, + 0x656A, 0xD974, 0x656C, 0xB771, 0x656F, 0xDDBC, 0x6572, 0xBA56, + 0x6573, 0xE1F4, 0x6574, 0xBEE3, 0x6575, 0xBCC4, 0x6576, 0xE5BD, + 0x6577, 0xBCC5, 0x6578, 0xBCC6, 0x6579, 0xE5BF, 0x657A, 0xE5BE, + 0x657B, 0xE5C0, 0x657C, 0xE9B1, 0x657F, 0xE9B0, 0x6580, 0xECEF, + 0x6581, 0xECEE, 0x6582, 0xC0C4, 0x6583, 0xC0C5, 0x6584, 0xF248, + 0x6587, 0xA4E5, 0x658C, 0xD979, 0x6590, 0xB4B4, 0x6591, 0xB4B3, + 0x6592, 0xDDBD, 0x6594, 0xEFD8, 0x6595, 0xC4E3, 0x6596, 0xF7DE, + 0x6597, 0xA4E6, 0x6599, 0xAEC6, 0x659B, 0xB1D8, 0x659C, 0xB1D7, + 0x659D, 0xD97A, 0x659E, 0xD97B, 0x659F, 0xB772, 0x65A0, 0xE1F5, + 0x65A1, 0xBA57, 0x65A2, 0xE9B2, 0x65A4, 0xA4E7, 0x65A5, 0xA5B8, + 0x65A7, 0xA9F2, 0x65A8, 0xCCC2, 0x65AA, 0xCEE9, 0x65AB, 0xAC48, + 0x65AC, 0xB1D9, 0x65AE, 0xD97C, 0x65AF, 0xB4B5, 0x65B0, 0xB773, + 0x65B2, 0xE5C1, 0x65B3, 0xE5C2, 0x65B6, 0xECF0, 0x65B7, 0xC25F, + 0x65B8, 0xF8F0, 0x65B9, 0xA4E8, 0x65BB, 0xCCC3, 0x65BC, 0xA9F3, + 0x65BD, 0xAC49, 0x65BF, 0xCEEA, 0x65C1, 0xAEC7, 0x65C2, 0xD1D2, + 0x65C3, 0xD1D0, 0x65C4, 0xD1D1, 0x65C5, 0xAEC8, 0x65C6, 0xD1CF, + 0x65CB, 0xB1DB, 0x65CC, 0xB1DC, 0x65CD, 0xD5A8, 0x65CE, 0xB1DD, + 0x65CF, 0xB1DA, 0x65D0, 0xD97D, 0x65D2, 0xD97E, 0x65D3, 0xDDBE, + 0x65D6, 0xBA59, 0x65D7, 0xBA58, 0x65DA, 0xECF1, 0x65DB, 0xEFD9, + 0x65DD, 0xF24A, 0x65DE, 0xF249, 0x65DF, 0xF44F, 0x65E1, 0xC95E, + 0x65E2, 0xAC4A, 0x65E5, 0xA4E9, 0x65E6, 0xA5B9, 0x65E8, 0xA6AE, + 0x65E9, 0xA6AD, 0x65EC, 0xA6AF, 0x65ED, 0xA6B0, 0x65EE, 0xC9EE, + 0x65EF, 0xC9ED, 0x65F0, 0xCAF8, 0x65F1, 0xA7F2, 0x65F2, 0xCAFB, + 0x65F3, 0xCAFA, 0x65F4, 0xCAF9, 0x65F5, 0xCAFC, 0x65FA, 0xA9F4, + 0x65FB, 0xCCC9, 0x65FC, 0xCCC5, 0x65FD, 0xCCCE, 0x6600, 0xA9FB, + 0x6602, 0xA9F9, 0x6603, 0xCCCA, 0x6604, 0xCCC6, 0x6605, 0xCCCD, + 0x6606, 0xA9F8, 0x6607, 0xAA40, 0x6608, 0xCCC8, 0x6609, 0xCCC4, + 0x660A, 0xA9FE, 0x660B, 0xCCCB, 0x660C, 0xA9F7, 0x660D, 0xCCCC, + 0x660E, 0xA9FA, 0x660F, 0xA9FC, 0x6610, 0xCCD0, 0x6611, 0xCCCF, + 0x6612, 0xCCC7, 0x6613, 0xA9F6, 0x6614, 0xA9F5, 0x6615, 0xA9FD, + 0x661C, 0xCEEF, 0x661D, 0xCEF5, 0x661F, 0xAC50, 0x6620, 0xAC4D, + 0x6621, 0xCEEC, 0x6622, 0xCEF1, 0x6624, 0xAC53, 0x6625, 0xAC4B, + 0x6626, 0xCEF0, 0x6627, 0xAC4E, 0x6628, 0xAC51, 0x662B, 0xCEF3, + 0x662D, 0xAC4C, 0x662E, 0xCEF8, 0x662F, 0xAC4F, 0x6631, 0xAC52, + 0x6632, 0xCEED, 0x6633, 0xCEF2, 0x6634, 0xCEF6, 0x6635, 0xCEEE, + 0x6636, 0xCEEB, 0x6639, 0xCEF7, 0x663A, 0xCEF4, 0x6641, 0xAED0, + 0x6642, 0xAEC9, 0x6643, 0xAECC, 0x6645, 0xAECF, 0x6647, 0xD1D5, + 0x6649, 0xAECA, 0x664A, 0xD1D3, 0x664C, 0xAECE, 0x664F, 0xAECB, + 0x6651, 0xD1D6, 0x6652, 0xAECD, 0x6659, 0xD5AC, 0x665A, 0xB1DF, + 0x665B, 0xD5AB, 0x665C, 0xD5AD, 0x665D, 0xB1DE, 0x665E, 0xB1E3, + 0x665F, 0xD1D4, 0x6661, 0xD5AA, 0x6662, 0xD5AE, 0x6664, 0xB1E0, + 0x6665, 0xD5A9, 0x6666, 0xB1E2, 0x6668, 0xB1E1, 0x666A, 0xD9A7, + 0x666C, 0xD9A2, 0x666E, 0xB4B6, 0x666F, 0xB4BA, 0x6670, 0xB4B7, + 0x6671, 0xD9A5, 0x6672, 0xD9A8, 0x6674, 0xB4B8, 0x6676, 0xB4B9, + 0x6677, 0xB4BE, 0x6678, 0xDDC7, 0x6679, 0xD9A6, 0x667A, 0xB4BC, + 0x667B, 0xD9A3, 0x667C, 0xD9A1, 0x667E, 0xB4BD, 0x6680, 0xD9A4, + 0x6684, 0xB779, 0x6686, 0xDDBF, 0x6687, 0xB776, 0x6688, 0xB777, + 0x6689, 0xB775, 0x668A, 0xDDC4, 0x668B, 0xDDC3, 0x668C, 0xDDC0, + 0x668D, 0xB77B, 0x6690, 0xDDC2, 0x6691, 0xB4BB, 0x6694, 0xDDC6, + 0x6695, 0xDDC1, 0x6696, 0xB778, 0x6697, 0xB774, 0x6698, 0xB77A, + 0x6699, 0xDDC5, 0x669D, 0xBA5C, 0x669F, 0xE1F8, 0x66A0, 0xE1F7, + 0x66A1, 0xE1F6, 0x66A2, 0xBA5A, 0x66A8, 0xBA5B, 0x66A9, 0xE5C5, + 0x66AA, 0xE5C8, 0x66AB, 0xBCC8, 0x66AE, 0xBCC7, 0x66AF, 0xE5C9, + 0x66B0, 0xE5C4, 0x66B1, 0xBCCA, 0x66B2, 0xE5C6, 0x66B4, 0xBCC9, + 0x66B5, 0xE5C3, 0x66B7, 0xE5C7, 0x66B8, 0xBEE9, 0x66B9, 0xBEE6, + 0x66BA, 0xE9BB, 0x66BB, 0xE9BA, 0x66BD, 0xE9B9, 0x66BE, 0xE9B4, + 0x66C0, 0xE9B5, 0x66C4, 0xBEE7, 0x66C6, 0xBEE4, 0x66C7, 0xBEE8, + 0x66C8, 0xE9B3, 0x66C9, 0xBEE5, 0x66CA, 0xE9B6, 0x66CB, 0xE9B7, + 0x66CC, 0xE9BC, 0x66CF, 0xE9B8, 0x66D2, 0xECF2, 0x66D6, 0xC0C7, + 0x66D8, 0xEFDC, 0x66D9, 0xC0C6, 0x66DA, 0xEFDA, 0x66DB, 0xEFDB, + 0x66DC, 0xC260, 0x66DD, 0xC36E, 0x66DE, 0xF24B, 0x66E0, 0xC36D, + 0x66E3, 0xF451, 0x66E4, 0xF452, 0x66E6, 0xC466, 0x66E8, 0xF450, + 0x66E9, 0xC4E4, 0x66EB, 0xF7DF, 0x66EC, 0xC5CE, 0x66ED, 0xF8AA, + 0x66EE, 0xF8AB, 0x66F0, 0xA4EA, 0x66F2, 0xA6B1, 0x66F3, 0xA6B2, + 0x66F4, 0xA7F3, 0x66F6, 0xCCD1, 0x66F7, 0xAC54, 0x66F8, 0xAED1, + 0x66F9, 0xB1E4, 0x66FC, 0xB0D2, 0x66FE, 0xB4BF, 0x66FF, 0xB4C0, + 0x6700, 0xB3CC, 0x6701, 0xD9A9, 0x6703, 0xB77C, 0x6704, 0xE1FA, + 0x6705, 0xE1F9, 0x6708, 0xA4EB, 0x6709, 0xA6B3, 0x670A, 0xCCD2, + 0x670B, 0xAA42, 0x670D, 0xAA41, 0x670F, 0xCEF9, 0x6710, 0xCEFA, + 0x6712, 0xD1D7, 0x6713, 0xD1D8, 0x6714, 0xAED2, 0x6715, 0xAED3, + 0x6717, 0xAED4, 0x6718, 0xD5AF, 0x671B, 0xB1E6, 0x671D, 0xB4C2, + 0x671F, 0xB4C1, 0x6720, 0xDDC8, 0x6721, 0xDF7A, 0x6722, 0xE1FB, + 0x6723, 0xE9BD, 0x6726, 0xC261, 0x6727, 0xC467, 0x6728, 0xA4EC, + 0x672A, 0xA5BC, 0x672B, 0xA5BD, 0x672C, 0xA5BB, 0x672D, 0xA5BE, + 0x672E, 0xA5BA, 0x6731, 0xA6B6, 0x6733, 0xC9F6, 0x6734, 0xA6B5, + 0x6735, 0xA6B7, 0x6738, 0xC9F1, 0x6739, 0xC9F0, 0x673A, 0xC9F3, + 0x673B, 0xC9F2, 0x673C, 0xC9F5, 0x673D, 0xA6B4, 0x673E, 0xC9EF, + 0x673F, 0xC9F4, 0x6745, 0xCAFD, 0x6746, 0xA7FD, 0x6747, 0xCAFE, + 0x6748, 0xCB43, 0x6749, 0xA7FC, 0x674B, 0xCB47, 0x674C, 0xCB42, + 0x674D, 0xCB45, 0x674E, 0xA7F5, 0x674F, 0xA7F6, 0x6750, 0xA7F7, + 0x6751, 0xA7F8, 0x6753, 0xA840, 0x6755, 0xCB41, 0x6756, 0xA7FA, + 0x6757, 0xA841, 0x6759, 0xCB40, 0x675A, 0xCB46, 0x675C, 0xA7F9, + 0x675D, 0xCB44, 0x675E, 0xA7FB, 0x675F, 0xA7F4, 0x6760, 0xA7FE, + 0x676A, 0xAA57, 0x676C, 0xCCD4, 0x676D, 0xAA43, 0x676F, 0xAA4D, + 0x6770, 0xAA4E, 0x6771, 0xAA46, 0x6772, 0xAA58, 0x6773, 0xAA48, + 0x6774, 0xCCDC, 0x6775, 0xAA53, 0x6776, 0xCCD7, 0x6777, 0xAA49, + 0x6778, 0xCCE6, 0x6779, 0xCCE7, 0x677A, 0xCCDF, 0x677B, 0xCCD8, + 0x677C, 0xAA56, 0x677D, 0xCCE4, 0x677E, 0xAA51, 0x677F, 0xAA4F, + 0x6781, 0xCCE5, 0x6783, 0xCCE3, 0x6784, 0xCCDB, 0x6785, 0xCCD3, + 0x6786, 0xCCDA, 0x6787, 0xAA4A, 0x6789, 0xAA50, 0x678B, 0xAA44, + 0x678C, 0xCCDE, 0x678D, 0xCCDD, 0x678E, 0xCCD5, 0x6790, 0xAA52, + 0x6791, 0xCCE1, 0x6792, 0xCCD6, 0x6793, 0xAA55, 0x6794, 0xCCE8, + 0x6795, 0xAA45, 0x6797, 0xAA4C, 0x6798, 0xCCD9, 0x6799, 0xCCE2, + 0x679A, 0xAA54, 0x679C, 0xAA47, 0x679D, 0xAA4B, 0x679F, 0xCCE0, + 0x67AE, 0xCF5B, 0x67AF, 0xAC5C, 0x67B0, 0xAC69, 0x67B2, 0xCF56, + 0x67B3, 0xCF4C, 0x67B4, 0xAC62, 0x67B5, 0xCF4A, 0x67B6, 0xAC5B, + 0x67B7, 0xCF45, 0x67B8, 0xAC65, 0x67B9, 0xCF52, 0x67BA, 0xCEFE, + 0x67BB, 0xCF41, 0x67C0, 0xCF44, 0x67C1, 0xCEFB, 0x67C2, 0xCF51, + 0x67C3, 0xCF61, 0x67C4, 0xAC60, 0x67C5, 0xCF46, 0x67C6, 0xCF58, + 0x67C8, 0xCEFD, 0x67C9, 0xCF5F, 0x67CA, 0xCF60, 0x67CB, 0xCF63, + 0x67CC, 0xCF5A, 0x67CD, 0xCF4B, 0x67CE, 0xCF53, 0x67CF, 0xAC66, + 0x67D0, 0xAC59, 0x67D1, 0xAC61, 0x67D2, 0xAC6D, 0x67D3, 0xAC56, + 0x67D4, 0xAC58, 0x67D8, 0xCF43, 0x67D9, 0xAC6A, 0x67DA, 0xAC63, + 0x67DB, 0xCF5D, 0x67DC, 0xCF40, 0x67DD, 0xAC6C, 0x67DE, 0xAC67, + 0x67DF, 0xCF49, 0x67E2, 0xAC6B, 0x67E3, 0xCF50, 0x67E4, 0xCF48, + 0x67E5, 0xAC64, 0x67E6, 0xCF5C, 0x67E7, 0xCF54, 0x67E9, 0xAC5E, + 0x67EA, 0xCF62, 0x67EB, 0xCF47, 0x67EC, 0xAC5A, 0x67ED, 0xCF59, + 0x67EE, 0xCF4F, 0x67EF, 0xAC5F, 0x67F0, 0xCF55, 0x67F1, 0xAC57, + 0x67F2, 0xCEFC, 0x67F3, 0xAC68, 0x67F4, 0xAEE3, 0x67F5, 0xAC5D, + 0x67F6, 0xCF4E, 0x67F7, 0xCF4D, 0x67F8, 0xCF42, 0x67FA, 0xCF5E, + 0x67FC, 0xCF57, 0x67FF, 0xAC55, 0x6812, 0xD1EC, 0x6813, 0xAEEA, + 0x6814, 0xD1ED, 0x6816, 0xD1E1, 0x6817, 0xAEDF, 0x6818, 0xAEEB, + 0x681A, 0xD1DA, 0x681C, 0xD1E3, 0x681D, 0xD1EB, 0x681F, 0xD1D9, + 0x6820, 0xD1F4, 0x6821, 0xAED5, 0x6825, 0xD1F3, 0x6826, 0xD1EE, + 0x6828, 0xD1EF, 0x6829, 0xAEDD, 0x682A, 0xAEE8, 0x682B, 0xD1E5, + 0x682D, 0xD1E6, 0x682E, 0xD1F0, 0x682F, 0xD1E7, 0x6831, 0xD1E2, + 0x6832, 0xD1DC, 0x6833, 0xD1DD, 0x6834, 0xD1EA, 0x6835, 0xD1E4, + 0x6838, 0xAED6, 0x6839, 0xAEDA, 0x683A, 0xD1F2, 0x683B, 0xD1DE, + 0x683C, 0xAEE6, 0x683D, 0xAEE2, 0x6840, 0xAEE5, 0x6841, 0xAEEC, + 0x6842, 0xAEDB, 0x6843, 0xAEE7, 0x6844, 0xD1E9, 0x6845, 0xAEE9, + 0x6846, 0xAED8, 0x6848, 0xAED7, 0x6849, 0xD1DB, 0x684B, 0xD1DF, + 0x684C, 0xAEE0, 0x684D, 0xD1F1, 0x684E, 0xD1E8, 0x684F, 0xD1E0, + 0x6850, 0xAEE4, 0x6851, 0xAEE1, 0x6853, 0xAED9, 0x6854, 0xAEDC, + 0x686B, 0xD5C4, 0x686D, 0xD5B4, 0x686E, 0xD5B5, 0x686F, 0xD5B9, + 0x6871, 0xD5C8, 0x6872, 0xD5C5, 0x6874, 0xD5BE, 0x6875, 0xD5BD, + 0x6876, 0xB1ED, 0x6877, 0xD5C1, 0x6878, 0xD5D0, 0x6879, 0xD5B0, + 0x687B, 0xD5D1, 0x687C, 0xD5C3, 0x687D, 0xD5D5, 0x687E, 0xD5C9, + 0x687F, 0xB1EC, 0x6880, 0xD5C7, 0x6881, 0xB1E7, 0x6882, 0xB1FC, + 0x6883, 0xB1F2, 0x6885, 0xB1F6, 0x6886, 0xB1F5, 0x6887, 0xD5B1, + 0x6889, 0xD5CE, 0x688A, 0xD5D4, 0x688B, 0xD5CC, 0x688C, 0xD5D3, + 0x688F, 0xD5C0, 0x6890, 0xD5B2, 0x6891, 0xD5D2, 0x6892, 0xD5C2, + 0x6893, 0xB1EA, 0x6894, 0xB1F7, 0x6896, 0xD5CB, 0x6897, 0xB1F0, + 0x689B, 0xD5CA, 0x689C, 0xD5B3, 0x689D, 0xB1F8, 0x689F, 0xB1FA, + 0x68A0, 0xD5CD, 0x68A1, 0xB1FB, 0x68A2, 0xB1E9, 0x68A3, 0xD5BA, + 0x68A4, 0xD5CF, 0x68A7, 0xB1EF, 0x68A8, 0xB1F9, 0x68A9, 0xD5BC, + 0x68AA, 0xD5C6, 0x68AB, 0xD5B7, 0x68AC, 0xD5BB, 0x68AD, 0xB1F4, + 0x68AE, 0xD5B6, 0x68AF, 0xB1E8, 0x68B0, 0xB1F1, 0x68B1, 0xB1EE, + 0x68B2, 0xD5BF, 0x68B3, 0xAEDE, 0x68B4, 0xD9C0, 0x68B5, 0xB1EB, + 0x68C4, 0xB1F3, 0x68C6, 0xD9C3, 0x68C7, 0xD9D9, 0x68C8, 0xD9CE, + 0x68C9, 0xB4D6, 0x68CB, 0xB4D1, 0x68CC, 0xD9BD, 0x68CD, 0xB4D2, + 0x68CE, 0xD9CD, 0x68D0, 0xD9C6, 0x68D1, 0xD9D3, 0x68D2, 0xB4CE, + 0x68D3, 0xD9AB, 0x68D4, 0xD9D5, 0x68D5, 0xB4C4, 0x68D6, 0xD9B3, + 0x68D7, 0xB4C7, 0x68D8, 0xB4C6, 0x68DA, 0xB4D7, 0x68DC, 0xD9AD, + 0x68DD, 0xD9CF, 0x68DE, 0xD9D0, 0x68DF, 0xB4C9, 0x68E0, 0xB4C5, + 0x68E1, 0xD9BB, 0x68E3, 0xB4D0, 0x68E4, 0xD9B6, 0x68E6, 0xD9D1, + 0x68E7, 0xB4CC, 0x68E8, 0xD9C9, 0x68E9, 0xD9D6, 0x68EA, 0xD9B0, + 0x68EB, 0xD9B5, 0x68EC, 0xD9AF, 0x68EE, 0xB4CB, 0x68EF, 0xD9C2, + 0x68F0, 0xDDDE, 0x68F1, 0xD9B1, 0x68F2, 0xB4CF, 0x68F3, 0xD9BA, + 0x68F4, 0xD9D2, 0x68F5, 0xB4CA, 0x68F6, 0xD9B7, 0x68F7, 0xD9B4, + 0x68F8, 0xD9C5, 0x68F9, 0xB4CD, 0x68FA, 0xB4C3, 0x68FB, 0xB4D9, + 0x68FC, 0xD9C8, 0x68FD, 0xD9C7, 0x6904, 0xD9AC, 0x6905, 0xB4C8, + 0x6906, 0xD9D4, 0x6907, 0xD9BC, 0x6908, 0xD9BE, 0x690A, 0xD9CB, + 0x690B, 0xD9CA, 0x690C, 0xD9AA, 0x690D, 0xB4D3, 0x690E, 0xB4D5, + 0x690F, 0xD9B2, 0x6910, 0xD9B9, 0x6911, 0xD9C1, 0x6912, 0xB4D4, + 0x6913, 0xD9B8, 0x6914, 0xD9C4, 0x6915, 0xD9D7, 0x6917, 0xD9CC, + 0x6925, 0xD9D8, 0x692A, 0xD9AE, 0x692F, 0xDDF2, 0x6930, 0xB7A6, + 0x6932, 0xDDF0, 0x6933, 0xDDDB, 0x6934, 0xDDE0, 0x6935, 0xDDD9, + 0x6937, 0xDDEC, 0x6938, 0xDDCB, 0x6939, 0xDDD2, 0x693B, 0xDDEA, + 0x693C, 0xDDF4, 0x693D, 0xDDDC, 0x693F, 0xDDCF, 0x6940, 0xDDE2, + 0x6941, 0xDDE7, 0x6942, 0xDDD3, 0x6944, 0xDDE4, 0x6945, 0xDDD0, + 0x6948, 0xDDD7, 0x6949, 0xDDD8, 0x694A, 0xB7A8, 0x694B, 0xDDEB, + 0x694C, 0xDDE9, 0x694E, 0xDDCC, 0x694F, 0xDDEE, 0x6951, 0xDDEF, + 0x6952, 0xDDF1, 0x6953, 0xB7AC, 0x6954, 0xB7A4, 0x6956, 0xD5B8, + 0x6957, 0xDDD4, 0x6958, 0xDDE6, 0x6959, 0xDDD5, 0x695A, 0xB7A1, + 0x695B, 0xB7B1, 0x695C, 0xDDED, 0x695D, 0xB7AF, 0x695E, 0xB7AB, + 0x695F, 0xDDCA, 0x6960, 0xB7A3, 0x6962, 0xDDCD, 0x6963, 0xB7B0, + 0x6965, 0xDDDD, 0x6966, 0xDDC9, 0x6968, 0xB7A9, 0x6969, 0xDDE1, + 0x696A, 0xDDD1, 0x696B, 0xB7AA, 0x696C, 0xDDDA, 0x696D, 0xB77E, + 0x696E, 0xB4D8, 0x696F, 0xDDE3, 0x6970, 0xD9BF, 0x6971, 0xDDCE, + 0x6974, 0xDDE8, 0x6975, 0xB7A5, 0x6976, 0xDDE5, 0x6977, 0xB7A2, + 0x6978, 0xDDDF, 0x6979, 0xB7AD, 0x697A, 0xDDD6, 0x697B, 0xDDF3, + 0x6982, 0xB7A7, 0x6983, 0xDEC6, 0x6986, 0xB7AE, 0x698D, 0xE24A, + 0x698E, 0xE248, 0x6990, 0xE25E, 0x6991, 0xE246, 0x6993, 0xE258, + 0x6994, 0xB77D, 0x6995, 0xBA5F, 0x6996, 0xE242, 0x6997, 0xE25D, + 0x6999, 0xE247, 0x699A, 0xE255, 0x699B, 0xBA64, 0x699C, 0xBA5D, + 0x699E, 0xE25B, 0x69A0, 0xE240, 0x69A1, 0xE25A, 0x69A3, 0xBA6F, + 0x69A4, 0xE251, 0x69A5, 0xE261, 0x69A6, 0xBA6D, 0x69A7, 0xE249, + 0x69A8, 0xBA5E, 0x69A9, 0xE24B, 0x69AA, 0xE259, 0x69AB, 0xBA67, + 0x69AC, 0xE244, 0x69AD, 0xBA6B, 0x69AE, 0xBA61, 0x69AF, 0xE24D, + 0x69B0, 0xE243, 0x69B1, 0xE1FC, 0x69B3, 0xE257, 0x69B4, 0xBA68, + 0x69B5, 0xE260, 0x69B6, 0xE1FD, 0x69B7, 0xBA65, 0x69B9, 0xE253, + 0x69BB, 0xBA66, 0x69BC, 0xE245, 0x69BD, 0xE250, 0x69BE, 0xE24C, + 0x69BF, 0xE24E, 0x69C1, 0xBA60, 0x69C2, 0xE25F, 0x69C3, 0xBA6E, + 0x69C4, 0xE24F, 0x69C6, 0xE262, 0x69C9, 0xE1FE, 0x69CA, 0xE254, + 0x69CB, 0xBA63, 0x69CC, 0xBA6C, 0x69CD, 0xBA6A, 0x69CE, 0xE241, + 0x69CF, 0xE256, 0x69D0, 0xBA69, 0x69D3, 0xBA62, 0x69D4, 0xE252, + 0x69D9, 0xE25C, 0x69E2, 0xE5D5, 0x69E4, 0xE5D1, 0x69E5, 0xE5CD, + 0x69E6, 0xE5E1, 0x69E7, 0xE5DE, 0x69E8, 0xBCCD, 0x69EB, 0xE5E5, + 0x69EC, 0xE5D4, 0x69ED, 0xBCD8, 0x69EE, 0xE5DB, 0x69F1, 0xE5D0, + 0x69F2, 0xE5DA, 0x69F3, 0xBCD5, 0x69F4, 0xE5EE, 0x69F6, 0xE5EB, + 0x69F7, 0xE5DD, 0x69F8, 0xE5CE, 0x69FB, 0xE5E2, 0x69FC, 0xE5E4, + 0x69FD, 0xBCD1, 0x69FE, 0xE5D8, 0x69FF, 0xE5D3, 0x6A00, 0xE5CA, + 0x6A01, 0xBCCE, 0x6A02, 0xBCD6, 0x6A04, 0xE5E7, 0x6A05, 0xBCD7, + 0x6A06, 0xE5CB, 0x6A07, 0xE5ED, 0x6A08, 0xE5E0, 0x6A09, 0xE5E6, + 0x6A0A, 0xBCD4, 0x6A0D, 0xE5E3, 0x6A0F, 0xE5EA, 0x6A11, 0xBCD9, + 0x6A13, 0xBCD3, 0x6A14, 0xE5DC, 0x6A15, 0xE5CF, 0x6A16, 0xE5EF, + 0x6A17, 0xE5CC, 0x6A18, 0xE5E8, 0x6A19, 0xBCD0, 0x6A1B, 0xE5D6, + 0x6A1D, 0xE5D7, 0x6A1E, 0xBCCF, 0x6A1F, 0xBCCC, 0x6A20, 0xE5D2, + 0x6A21, 0xBCD2, 0x6A23, 0xBCCB, 0x6A25, 0xE5E9, 0x6A26, 0xE5EC, + 0x6A27, 0xE5D9, 0x6A28, 0xE9CA, 0x6A32, 0xE9C2, 0x6A34, 0xE9BE, + 0x6A35, 0xBEF6, 0x6A38, 0xBEEB, 0x6A39, 0xBEF0, 0x6A3A, 0xBEEC, + 0x6A3B, 0xE9CC, 0x6A3C, 0xE9D7, 0x6A3D, 0xBEEA, 0x6A3E, 0xE9C4, + 0x6A3F, 0xE9CD, 0x6A40, 0xE5DF, 0x6A41, 0xE9CE, 0x6A44, 0xBEF1, + 0x6A46, 0xE9DD, 0x6A47, 0xBEF5, 0x6A48, 0xBEF8, 0x6A49, 0xE9C0, + 0x6A4B, 0xBEF4, 0x6A4D, 0xE9DB, 0x6A4E, 0xE9DC, 0x6A4F, 0xE9D2, + 0x6A50, 0xE9D1, 0x6A51, 0xE9C9, 0x6A54, 0xE9D3, 0x6A55, 0xE9DA, + 0x6A56, 0xE9D9, 0x6A58, 0xBEEF, 0x6A59, 0xBEED, 0x6A5A, 0xE9CB, + 0x6A5B, 0xE9C8, 0x6A5D, 0xE9C5, 0x6A5E, 0xE9D8, 0x6A5F, 0xBEF7, + 0x6A60, 0xE9D6, 0x6A61, 0xBEF3, 0x6A62, 0xBEF2, 0x6A64, 0xE9D0, + 0x6A66, 0xE9BF, 0x6A67, 0xE9C1, 0x6A68, 0xE9C3, 0x6A69, 0xE9D5, + 0x6A6A, 0xE9CF, 0x6A6B, 0xBEEE, 0x6A6D, 0xE9C6, 0x6A6F, 0xE9D4, + 0x6A76, 0xE9C7, 0x6A7E, 0xC0CF, 0x6A7F, 0xED45, 0x6A80, 0xC0C8, + 0x6A81, 0xECF5, 0x6A83, 0xED41, 0x6A84, 0xC0CA, 0x6A85, 0xED48, + 0x6A87, 0xECFC, 0x6A89, 0xECF7, 0x6A8C, 0xED49, 0x6A8D, 0xECF3, + 0x6A8E, 0xECFE, 0x6A90, 0xC0D1, 0x6A91, 0xED44, 0x6A92, 0xED4A, + 0x6A93, 0xECFD, 0x6A94, 0xC0C9, 0x6A95, 0xED40, 0x6A96, 0xECF4, + 0x6A97, 0xC0D0, 0x6A9A, 0xED47, 0x6A9B, 0xECF9, 0x6A9C, 0xC0CC, + 0x6A9E, 0xECFB, 0x6A9F, 0xECF8, 0x6AA0, 0xC0D2, 0x6AA1, 0xECFA, + 0x6AA2, 0xC0CB, 0x6AA3, 0xC0CE, 0x6AA4, 0xED43, 0x6AA5, 0xECF6, + 0x6AA6, 0xED46, 0x6AA8, 0xED42, 0x6AAC, 0xC263, 0x6AAD, 0xEFE7, + 0x6AAE, 0xC268, 0x6AAF, 0xC269, 0x6AB3, 0xC262, 0x6AB4, 0xEFE6, + 0x6AB6, 0xEFE3, 0x6AB7, 0xEFE4, 0x6AB8, 0xC266, 0x6AB9, 0xEFDE, + 0x6ABA, 0xEFE2, 0x6ABB, 0xC265, 0x6ABD, 0xEFDF, 0x6AC2, 0xC267, + 0x6AC3, 0xC264, 0x6AC5, 0xEFDD, 0x6AC6, 0xEFE1, 0x6AC7, 0xEFE5, + 0x6ACB, 0xF251, 0x6ACC, 0xF24E, 0x6ACD, 0xF257, 0x6ACF, 0xF256, + 0x6AD0, 0xF254, 0x6AD1, 0xF24F, 0x6AD3, 0xC372, 0x6AD9, 0xF250, + 0x6ADA, 0xC371, 0x6ADB, 0xC0CD, 0x6ADC, 0xF253, 0x6ADD, 0xC370, + 0x6ADE, 0xF258, 0x6ADF, 0xF252, 0x6AE0, 0xF24D, 0x6AE1, 0xEFE0, + 0x6AE5, 0xC36F, 0x6AE7, 0xF24C, 0x6AE8, 0xF456, 0x6AEA, 0xF455, + 0x6AEB, 0xF255, 0x6AEC, 0xC468, 0x6AEE, 0xF459, 0x6AEF, 0xF45A, + 0x6AF0, 0xF454, 0x6AF1, 0xF458, 0x6AF3, 0xF453, 0x6AF8, 0xF5D1, + 0x6AF9, 0xF457, 0x6AFA, 0xC4E7, 0x6AFB, 0xC4E5, 0x6AFC, 0xF5CF, + 0x6B00, 0xF5D2, 0x6B02, 0xF5CE, 0x6B03, 0xF5D0, 0x6B04, 0xC4E6, + 0x6B08, 0xF6E5, 0x6B09, 0xF6E6, 0x6B0A, 0xC576, 0x6B0B, 0xF6E4, + 0x6B0F, 0xF7E2, 0x6B10, 0xC5CF, 0x6B11, 0xF7E0, 0x6B12, 0xF7E1, + 0x6B13, 0xF8AC, 0x6B16, 0xC656, 0x6B17, 0xF8F3, 0x6B18, 0xF8F1, + 0x6B19, 0xF8F2, 0x6B1A, 0xF8F4, 0x6B1E, 0xF9BB, 0x6B20, 0xA4ED, + 0x6B21, 0xA6B8, 0x6B23, 0xAA59, 0x6B25, 0xCCE9, 0x6B28, 0xCF64, + 0x6B2C, 0xD1F5, 0x6B2D, 0xD1F7, 0x6B2F, 0xD1F6, 0x6B31, 0xD1F8, + 0x6B32, 0xB1FD, 0x6B33, 0xD5D7, 0x6B34, 0xD1F9, 0x6B36, 0xD5D6, + 0x6B37, 0xD5D8, 0x6B38, 0xD5D9, 0x6B39, 0xD9DA, 0x6B3A, 0xB4DB, + 0x6B3B, 0xD9DB, 0x6B3C, 0xD9DD, 0x6B3D, 0xB4DC, 0x6B3E, 0xB4DA, + 0x6B3F, 0xD9DC, 0x6B41, 0xDDFA, 0x6B42, 0xDDF8, 0x6B43, 0xDDF7, + 0x6B45, 0xDDF6, 0x6B46, 0xDDF5, 0x6B47, 0xB7B2, 0x6B48, 0xDDF9, + 0x6B49, 0xBA70, 0x6B4A, 0xE263, 0x6B4B, 0xE265, 0x6B4C, 0xBA71, + 0x6B4D, 0xE264, 0x6B4E, 0xBCDB, 0x6B50, 0xBCDA, 0x6B51, 0xE5F0, + 0x6B54, 0xE9DF, 0x6B55, 0xE9DE, 0x6B56, 0xE9E0, 0x6B59, 0xBEF9, + 0x6B5B, 0xED4B, 0x6B5C, 0xC0D3, 0x6B5E, 0xEFE8, 0x6B5F, 0xC26A, + 0x6B60, 0xF259, 0x6B61, 0xC577, 0x6B62, 0xA4EE, 0x6B63, 0xA5BF, + 0x6B64, 0xA6B9, 0x6B65, 0xA842, 0x6B66, 0xAA5A, 0x6B67, 0xAA5B, + 0x6B6A, 0xAC6E, 0x6B6D, 0xD1FA, 0x6B72, 0xB7B3, 0x6B76, 0xE6D1, + 0x6B77, 0xBEFA, 0x6B78, 0xC26B, 0x6B79, 0xA4EF, 0x6B7B, 0xA6BA, + 0x6B7E, 0xCCEB, 0x6B7F, 0xAA5C, 0x6B80, 0xCCEA, 0x6B82, 0xCF65, + 0x6B83, 0xAC6F, 0x6B84, 0xCF66, 0x6B86, 0xAC70, 0x6B88, 0xD1FC, + 0x6B89, 0xAEEE, 0x6B8A, 0xAEED, 0x6B8C, 0xD5DE, 0x6B8D, 0xD5DC, + 0x6B8E, 0xD5DD, 0x6B8F, 0xD5DB, 0x6B91, 0xD5DA, 0x6B94, 0xD9DE, + 0x6B95, 0xD9E1, 0x6B96, 0xB4DE, 0x6B97, 0xD9DF, 0x6B98, 0xB4DD, + 0x6B99, 0xD9E0, 0x6B9B, 0xDDFB, 0x6B9E, 0xE266, 0x6B9F, 0xE267, + 0x6BA0, 0xE268, 0x6BA2, 0xE5F3, 0x6BA3, 0xE5F2, 0x6BA4, 0xBCDC, + 0x6BA5, 0xE5F1, 0x6BA6, 0xE5F4, 0x6BA7, 0xE9E1, 0x6BAA, 0xE9E2, + 0x6BAB, 0xE9E3, 0x6BAD, 0xED4C, 0x6BAE, 0xC0D4, 0x6BAF, 0xC26C, + 0x6BB0, 0xF25A, 0x6BB2, 0xC4E8, 0x6BB3, 0xC95F, 0x6BB5, 0xAC71, + 0x6BB6, 0xCF67, 0x6BB7, 0xAEEF, 0x6BBA, 0xB1FE, 0x6BBC, 0xB4DF, + 0x6BBD, 0xD9E2, 0x6BBF, 0xB7B5, 0x6BC0, 0xB7B4, 0x6BC3, 0xE269, + 0x6BC4, 0xE26A, 0x6BC5, 0xBCDD, 0x6BC6, 0xBCDE, 0x6BC7, 0xE9E5, + 0x6BC8, 0xE9E4, 0x6BC9, 0xEFE9, 0x6BCA, 0xF7E3, 0x6BCB, 0xA4F0, + 0x6BCC, 0xC960, 0x6BCD, 0xA5C0, 0x6BCF, 0xA843, 0x6BD0, 0xCB48, + 0x6BD2, 0xAC72, 0x6BD3, 0xB7B6, 0x6BD4, 0xA4F1, 0x6BD6, 0xCF68, + 0x6BD7, 0xAC73, 0x6BD8, 0xCF69, 0x6BDA, 0xC0D5, 0x6BDB, 0xA4F2, + 0x6BDE, 0xCCEC, 0x6BE0, 0xCF6A, 0x6BE2, 0xD242, 0x6BE3, 0xD241, + 0x6BE4, 0xD1FE, 0x6BE6, 0xD1FD, 0x6BE7, 0xD243, 0x6BE8, 0xD240, + 0x6BEB, 0xB240, 0x6BEC, 0xB241, 0x6BEF, 0xB4E0, 0x6BF0, 0xD9E3, + 0x6BF2, 0xD9E4, 0x6BF3, 0xD9E5, 0x6BF7, 0xDE41, 0x6BF8, 0xDE42, + 0x6BF9, 0xDE40, 0x6BFB, 0xDDFD, 0x6BFC, 0xDDFE, 0x6BFD, 0xB7B7, + 0x6BFE, 0xE26B, 0x6BFF, 0xE5F7, 0x6C00, 0xE5F6, 0x6C01, 0xE5F5, + 0x6C02, 0xE5F8, 0x6C03, 0xE9E7, 0x6C04, 0xE9E6, 0x6C05, 0xBEFB, + 0x6C06, 0xE9E8, 0x6C08, 0xC0D6, 0x6C09, 0xED4D, 0x6C0B, 0xEFEA, + 0x6C0C, 0xF25B, 0x6C0D, 0xF6E7, 0x6C0F, 0xA4F3, 0x6C10, 0xA5C2, + 0x6C11, 0xA5C1, 0x6C13, 0xAA5D, 0x6C14, 0xC961, 0x6C15, 0xC97E, + 0x6C16, 0xA6BB, 0x6C18, 0xC9F7, 0x6C19, 0xCB49, 0x6C1A, 0xCB4A, + 0x6C1B, 0xAA5E, 0x6C1D, 0xCCED, 0x6C1F, 0xAC74, 0x6C20, 0xCF6B, + 0x6C21, 0xCF6C, 0x6C23, 0xAEF0, 0x6C24, 0xAEF4, 0x6C25, 0xD244, + 0x6C26, 0xAEF3, 0x6C27, 0xAEF1, 0x6C28, 0xAEF2, 0x6C2A, 0xD5DF, + 0x6C2B, 0xB242, 0x6C2C, 0xB4E3, 0x6C2E, 0xB4E1, 0x6C2F, 0xB4E2, + 0x6C30, 0xD9E6, 0x6C33, 0xBA72, 0x6C34, 0xA4F4, 0x6C36, 0xC9A1, + 0x6C38, 0xA5C3, 0x6C3B, 0xC9A4, 0x6C3E, 0xA5C6, 0x6C3F, 0xC9A3, + 0x6C40, 0xA5C5, 0x6C41, 0xA5C4, 0x6C42, 0xA844, 0x6C43, 0xC9A2, + 0x6C46, 0xC9F8, 0x6C4A, 0xC9FC, 0x6C4B, 0xC9FE, 0x6C4C, 0xCA40, + 0x6C4D, 0xA6C5, 0x6C4E, 0xA6C6, 0x6C4F, 0xC9FB, 0x6C50, 0xA6C1, + 0x6C52, 0xC9F9, 0x6C54, 0xC9FD, 0x6C55, 0xA6C2, 0x6C57, 0xA6BD, + 0x6C59, 0xA6BE, 0x6C5B, 0xA6C4, 0x6C5C, 0xC9FA, 0x6C5D, 0xA6BC, + 0x6C5E, 0xA845, 0x6C5F, 0xA6BF, 0x6C60, 0xA6C0, 0x6C61, 0xA6C3, + 0x6C65, 0xCB5B, 0x6C66, 0xCB59, 0x6C67, 0xCB4C, 0x6C68, 0xA851, + 0x6C69, 0xCB53, 0x6C6A, 0xA84C, 0x6C6B, 0xCB4D, 0x6C6D, 0xCB55, + 0x6C6F, 0xCB52, 0x6C70, 0xA84F, 0x6C71, 0xCB51, 0x6C72, 0xA856, + 0x6C73, 0xCB5A, 0x6C74, 0xA858, 0x6C76, 0xA85A, 0x6C78, 0xCB4B, + 0x6C7A, 0xA84D, 0x6C7B, 0xCB5C, 0x6C7D, 0xA854, 0x6C7E, 0xA857, + 0x6C80, 0xCD45, 0x6C81, 0xA847, 0x6C82, 0xA85E, 0x6C83, 0xA855, + 0x6C84, 0xCB4E, 0x6C85, 0xA84A, 0x6C86, 0xA859, 0x6C87, 0xCB56, + 0x6C88, 0xA848, 0x6C89, 0xA849, 0x6C8A, 0xCD43, 0x6C8B, 0xCB4F, + 0x6C8C, 0xA850, 0x6C8D, 0xA85B, 0x6C8E, 0xCB5D, 0x6C8F, 0xCB50, + 0x6C90, 0xA84E, 0x6C92, 0xA853, 0x6C93, 0xCCEE, 0x6C94, 0xA85C, + 0x6C95, 0xCB57, 0x6C96, 0xA852, 0x6C98, 0xA85D, 0x6C99, 0xA846, + 0x6C9A, 0xCB54, 0x6C9B, 0xA84B, 0x6C9C, 0xCB58, 0x6C9D, 0xCD44, + 0x6CAB, 0xAA6A, 0x6CAC, 0xAA7A, 0x6CAD, 0xCCF5, 0x6CAE, 0xAA71, + 0x6CB0, 0xCD4B, 0x6CB1, 0xAA62, 0x6CB3, 0xAA65, 0x6CB4, 0xCD42, + 0x6CB6, 0xCCF3, 0x6CB7, 0xCCF7, 0x6CB8, 0xAA6D, 0x6CB9, 0xAA6F, + 0x6CBA, 0xCCFA, 0x6CBB, 0xAA76, 0x6CBC, 0xAA68, 0x6CBD, 0xAA66, + 0x6CBE, 0xAA67, 0x6CBF, 0xAA75, 0x6CC0, 0xCD47, 0x6CC1, 0xAA70, + 0x6CC2, 0xCCF9, 0x6CC3, 0xCCFB, 0x6CC4, 0xAA6E, 0x6CC5, 0xAA73, + 0x6CC6, 0xCCFC, 0x6CC7, 0xCD4A, 0x6CC9, 0xAC75, 0x6CCA, 0xAA79, + 0x6CCC, 0xAA63, 0x6CCD, 0xCD49, 0x6CCF, 0xCD4D, 0x6CD0, 0xCCF8, + 0x6CD1, 0xCD4F, 0x6CD2, 0xCD40, 0x6CD3, 0xAA6C, 0x6CD4, 0xCCF4, + 0x6CD5, 0xAA6B, 0x6CD6, 0xAA7D, 0x6CD7, 0xAA72, 0x6CD9, 0xCCF2, + 0x6CDA, 0xCF75, 0x6CDB, 0xAA78, 0x6CDC, 0xAA7C, 0x6CDD, 0xCD41, + 0x6CDE, 0xCD46, 0x6CE0, 0xAA7E, 0x6CE1, 0xAA77, 0x6CE2, 0xAA69, + 0x6CE3, 0xAA5F, 0x6CE5, 0xAA64, 0x6CE7, 0xCCF6, 0x6CE8, 0xAA60, + 0x6CE9, 0xCD4E, 0x6CEB, 0xCCF0, 0x6CEC, 0xCCEF, 0x6CED, 0xCCFD, + 0x6CEE, 0xCCF1, 0x6CEF, 0xAA7B, 0x6CF0, 0xAEF5, 0x6CF1, 0xAA74, + 0x6CF2, 0xCCFE, 0x6CF3, 0xAA61, 0x6CF5, 0xACA6, 0x6CF9, 0xCD4C, + 0x6D00, 0xCF7C, 0x6D01, 0xCFA1, 0x6D03, 0xCFA4, 0x6D04, 0xCF77, + 0x6D07, 0xCFA7, 0x6D08, 0xCFAA, 0x6D09, 0xCFAC, 0x6D0A, 0xCF74, + 0x6D0B, 0xAC76, 0x6D0C, 0xAC7B, 0x6D0D, 0xD249, 0x6D0E, 0xACAD, + 0x6D0F, 0xCFA5, 0x6D10, 0xCFAD, 0x6D11, 0xCF7B, 0x6D12, 0xCF73, + 0x6D16, 0xD264, 0x6D17, 0xAC7E, 0x6D18, 0xCFA2, 0x6D19, 0xCF78, + 0x6D1A, 0xCF7A, 0x6D1B, 0xACA5, 0x6D1D, 0xCF7D, 0x6D1E, 0xAC7D, + 0x6D1F, 0xCF70, 0x6D20, 0xCFA8, 0x6D22, 0xCFAB, 0x6D25, 0xAC7A, + 0x6D27, 0xACA8, 0x6D28, 0xCF6D, 0x6D29, 0xACAA, 0x6D2A, 0xAC78, + 0x6D2B, 0xACAE, 0x6D2C, 0xCFA9, 0x6D2D, 0xCF6F, 0x6D2E, 0xACAB, + 0x6D2F, 0xD25E, 0x6D30, 0xCD48, 0x6D31, 0xAC7C, 0x6D32, 0xAC77, + 0x6D33, 0xCF76, 0x6D34, 0xCF6E, 0x6D35, 0xACAC, 0x6D36, 0xACA4, + 0x6D37, 0xCFA3, 0x6D38, 0xACA9, 0x6D39, 0xACA7, 0x6D3A, 0xCF79, + 0x6D3B, 0xACA1, 0x6D3C, 0xCF71, 0x6D3D, 0xACA2, 0x6D3E, 0xACA3, + 0x6D3F, 0xCF72, 0x6D40, 0xCFA6, 0x6D41, 0xAC79, 0x6D42, 0xCF7E, + 0x6D58, 0xD24C, 0x6D59, 0xAEFD, 0x6D5A, 0xAF43, 0x6D5E, 0xD255, + 0x6D5F, 0xD25B, 0x6D60, 0xD257, 0x6D61, 0xD24A, 0x6D62, 0xD24D, + 0x6D63, 0xD246, 0x6D64, 0xD247, 0x6D65, 0xAF4A, 0x6D66, 0xAEFA, + 0x6D67, 0xD256, 0x6D68, 0xD25F, 0x6D69, 0xAF45, 0x6D6A, 0xAEF6, + 0x6D6C, 0xAF40, 0x6D6D, 0xD24E, 0x6D6E, 0xAF42, 0x6D6F, 0xD24F, + 0x6D70, 0xD259, 0x6D74, 0xAF44, 0x6D75, 0xD268, 0x6D76, 0xD248, + 0x6D77, 0xAEFC, 0x6D78, 0xAEFB, 0x6D79, 0xAF48, 0x6D7A, 0xD245, + 0x6D7B, 0xD266, 0x6D7C, 0xD25A, 0x6D7D, 0xD267, 0x6D7E, 0xD261, + 0x6D7F, 0xD253, 0x6D80, 0xD262, 0x6D82, 0xD25C, 0x6D83, 0xD265, + 0x6D84, 0xD263, 0x6D85, 0xAF49, 0x6D86, 0xD254, 0x6D87, 0xAEF9, + 0x6D88, 0xAEF8, 0x6D89, 0xAF41, 0x6D8A, 0xAF47, 0x6D8B, 0xD260, + 0x6D8C, 0xAF46, 0x6D8D, 0xD251, 0x6D8E, 0xB243, 0x6D90, 0xD269, + 0x6D91, 0xD250, 0x6D92, 0xD24B, 0x6D93, 0xAEFE, 0x6D94, 0xAF4B, + 0x6D95, 0xAEF7, 0x6D97, 0xD258, 0x6D98, 0xD25D, 0x6DAA, 0xB265, + 0x6DAB, 0xD5E1, 0x6DAC, 0xD5E5, 0x6DAE, 0xB252, 0x6DAF, 0xB250, + 0x6DB2, 0xB247, 0x6DB3, 0xD5E3, 0x6DB4, 0xD5E2, 0x6DB5, 0xB25B, + 0x6DB7, 0xD5E8, 0x6DB8, 0xB255, 0x6DBA, 0xD5FA, 0x6DBB, 0xD647, + 0x6DBC, 0xB244, 0x6DBD, 0xD5F7, 0x6DBE, 0xD5F0, 0x6DBF, 0xB267, + 0x6DC0, 0xD5E0, 0x6DC2, 0xD5FC, 0x6DC4, 0xB264, 0x6DC5, 0xB258, + 0x6DC6, 0xB263, 0x6DC7, 0xB24E, 0x6DC8, 0xD5EC, 0x6DC9, 0xD5FE, + 0x6DCA, 0xD5F6, 0x6DCB, 0xB24F, 0x6DCC, 0xB249, 0x6DCD, 0xD645, + 0x6DCF, 0xD5FD, 0x6DD0, 0xD640, 0x6DD1, 0xB251, 0x6DD2, 0xB259, + 0x6DD3, 0xD642, 0x6DD4, 0xD5EA, 0x6DD5, 0xD5FB, 0x6DD6, 0xD5EF, + 0x6DD7, 0xD644, 0x6DD8, 0xB25E, 0x6DD9, 0xB246, 0x6DDA, 0xB25C, + 0x6DDB, 0xD5F4, 0x6DDC, 0xD5F2, 0x6DDD, 0xD5F3, 0x6DDE, 0xB253, + 0x6DDF, 0xD5EE, 0x6DE0, 0xD5ED, 0x6DE1, 0xB248, 0x6DE2, 0xD5E7, + 0x6DE3, 0xD646, 0x6DE4, 0xB24A, 0x6DE5, 0xD5F1, 0x6DE6, 0xB268, + 0x6DE8, 0xB262, 0x6DE9, 0xD5E6, 0x6DEA, 0xB25F, 0x6DEB, 0xB25D, + 0x6DEC, 0xB266, 0x6DED, 0xD5F8, 0x6DEE, 0xB261, 0x6DEF, 0xD252, + 0x6DF0, 0xD5F9, 0x6DF1, 0xB260, 0x6DF2, 0xD641, 0x6DF3, 0xB245, + 0x6DF4, 0xD5F5, 0x6DF5, 0xB257, 0x6DF6, 0xD5E9, 0x6DF7, 0xB256, + 0x6DF9, 0xB254, 0x6DFA, 0xB24C, 0x6DFB, 0xB24B, 0x6DFC, 0xD9E7, + 0x6DFD, 0xD643, 0x6E00, 0xD5EB, 0x6E03, 0xD9FC, 0x6E05, 0xB24D, + 0x6E19, 0xB541, 0x6E1A, 0xB25A, 0x6E1B, 0xB4EE, 0x6E1C, 0xD9F6, + 0x6E1D, 0xB4FC, 0x6E1F, 0xD9EA, 0x6E20, 0xB4EB, 0x6E21, 0xB4E7, + 0x6E22, 0xDA49, 0x6E23, 0xB4ED, 0x6E24, 0xB4F1, 0x6E25, 0xB4EC, + 0x6E26, 0xB4F5, 0x6E27, 0xDA4D, 0x6E28, 0xDA44, 0x6E2B, 0xD9F1, + 0x6E2C, 0xB4FA, 0x6E2D, 0xB4F4, 0x6E2E, 0xD9FD, 0x6E2F, 0xB4E4, + 0x6E30, 0xDA4A, 0x6E31, 0xDA43, 0x6E32, 0xB4E8, 0x6E33, 0xD9F7, + 0x6E34, 0xB4F7, 0x6E35, 0xDA55, 0x6E36, 0xDA56, 0x6E38, 0xB4E5, + 0x6E39, 0xDA48, 0x6E3A, 0xB4F9, 0x6E3B, 0xD9FB, 0x6E3C, 0xD9ED, + 0x6E3D, 0xD9EE, 0x6E3E, 0xB4FD, 0x6E3F, 0xD9F2, 0x6E40, 0xD9F9, + 0x6E41, 0xD9F3, 0x6E43, 0xB4FB, 0x6E44, 0xB544, 0x6E45, 0xD9EF, + 0x6E46, 0xD9E8, 0x6E47, 0xD9E9, 0x6E49, 0xD9EB, 0x6E4A, 0xB4EA, + 0x6E4B, 0xD9F8, 0x6E4D, 0xB4F8, 0x6E4E, 0xB542, 0x6E51, 0xD9FA, + 0x6E52, 0xDA53, 0x6E53, 0xDA4B, 0x6E54, 0xB4E6, 0x6E55, 0xDA51, + 0x6E56, 0xB4F2, 0x6E58, 0xB4F0, 0x6E5A, 0xDA57, 0x6E5B, 0xB4EF, + 0x6E5C, 0xDA41, 0x6E5D, 0xD9F4, 0x6E5E, 0xD9FE, 0x6E5F, 0xB547, + 0x6E60, 0xDA45, 0x6E61, 0xDA42, 0x6E62, 0xD9F0, 0x6E63, 0xB543, + 0x6E64, 0xDA4F, 0x6E65, 0xDA4C, 0x6E66, 0xDA54, 0x6E67, 0xB4E9, + 0x6E68, 0xDA40, 0x6E69, 0xB546, 0x6E6B, 0xDA47, 0x6E6E, 0xB4F3, + 0x6E6F, 0xB4F6, 0x6E71, 0xDA46, 0x6E72, 0xB545, 0x6E73, 0xD9F5, + 0x6E74, 0xD5E4, 0x6E77, 0xDA50, 0x6E78, 0xDA4E, 0x6E79, 0xDA52, + 0x6E88, 0xD9EC, 0x6E89, 0xB540, 0x6E8D, 0xDE61, 0x6E8E, 0xDE60, + 0x6E8F, 0xDE46, 0x6E90, 0xB7BD, 0x6E92, 0xDE5F, 0x6E93, 0xDE49, + 0x6E94, 0xDE4A, 0x6E96, 0xB7C7, 0x6E97, 0xDE68, 0x6E98, 0xB7C2, + 0x6E99, 0xDE5E, 0x6E9B, 0xDE43, 0x6E9C, 0xB7C8, 0x6E9D, 0xB7BE, + 0x6E9E, 0xDE52, 0x6E9F, 0xDE48, 0x6EA0, 0xDE4B, 0x6EA1, 0xDE63, + 0x6EA2, 0xB7B8, 0x6EA3, 0xDE6A, 0x6EA4, 0xDE62, 0x6EA5, 0xB7C1, + 0x6EA6, 0xDE57, 0x6EA7, 0xB7CC, 0x6EAA, 0xB7CB, 0x6EAB, 0xB7C5, + 0x6EAE, 0xDE69, 0x6EAF, 0xB7B9, 0x6EB0, 0xDE55, 0x6EB1, 0xDE4C, + 0x6EB2, 0xDE59, 0x6EB3, 0xDE65, 0x6EB4, 0xB7CD, 0x6EB6, 0xB7BB, + 0x6EB7, 0xDE54, 0x6EB9, 0xDE4D, 0x6EBA, 0xB7C4, 0x6EBC, 0xB7C3, + 0x6EBD, 0xDE50, 0x6EBE, 0xDE5A, 0x6EBF, 0xDE64, 0x6EC0, 0xDE47, + 0x6EC1, 0xDE51, 0x6EC2, 0xB7BC, 0x6EC3, 0xDE5B, 0x6EC4, 0xB7C9, + 0x6EC5, 0xB7C0, 0x6EC6, 0xDE4E, 0x6EC7, 0xB7BF, 0x6EC8, 0xDE45, + 0x6EC9, 0xDE53, 0x6ECA, 0xDE67, 0x6ECB, 0xB4FE, 0x6ECC, 0xBAB0, + 0x6ECD, 0xDE56, 0x6ECE, 0xE26C, 0x6ECF, 0xDE58, 0x6ED0, 0xDE66, + 0x6ED1, 0xB7C6, 0x6ED2, 0xDE4F, 0x6ED3, 0xB7BA, 0x6ED4, 0xB7CA, + 0x6ED5, 0xBCF0, 0x6ED6, 0xDE44, 0x6ED8, 0xDE5D, 0x6EDC, 0xDE5C, + 0x6EEB, 0xE2AA, 0x6EEC, 0xBAAD, 0x6EED, 0xE27D, 0x6EEE, 0xE2A4, + 0x6EEF, 0xBAA2, 0x6EF1, 0xE26E, 0x6EF2, 0xBAAF, 0x6EF4, 0xBA77, + 0x6EF5, 0xE26D, 0x6EF6, 0xE2B0, 0x6EF7, 0xBAB1, 0x6EF8, 0xE271, + 0x6EF9, 0xE2A3, 0x6EFB, 0xE273, 0x6EFC, 0xE2B3, 0x6EFD, 0xE2AF, + 0x6EFE, 0xBA75, 0x6EFF, 0xBAA1, 0x6F00, 0xE653, 0x6F01, 0xBAAE, + 0x6F02, 0xBA7D, 0x6F03, 0xE26F, 0x6F05, 0xE2AE, 0x6F06, 0xBAA3, + 0x6F07, 0xE2AB, 0x6F08, 0xE2B8, 0x6F09, 0xE275, 0x6F0A, 0xE27E, + 0x6F0D, 0xE2B6, 0x6F0E, 0xE2AC, 0x6F0F, 0xBA7C, 0x6F12, 0xE27C, + 0x6F13, 0xBA76, 0x6F14, 0xBA74, 0x6F15, 0xBAA8, 0x6F18, 0xE27A, + 0x6F19, 0xE277, 0x6F1A, 0xE278, 0x6F1C, 0xE2B2, 0x6F1E, 0xE2B7, + 0x6F1F, 0xE2B5, 0x6F20, 0xBA7A, 0x6F21, 0xE2B9, 0x6F22, 0xBA7E, + 0x6F23, 0xBAA7, 0x6F25, 0xE270, 0x6F26, 0xE5FA, 0x6F27, 0xE279, + 0x6F29, 0xBA78, 0x6F2A, 0xBAAC, 0x6F2B, 0xBAA9, 0x6F2C, 0xBA7B, + 0x6F2D, 0xE2A5, 0x6F2E, 0xE274, 0x6F2F, 0xBAAA, 0x6F30, 0xE2A7, + 0x6F31, 0xBAA4, 0x6F32, 0xBAA6, 0x6F33, 0xBA73, 0x6F35, 0xE2A9, + 0x6F36, 0xE2A1, 0x6F37, 0xE272, 0x6F38, 0xBAA5, 0x6F39, 0xE2B1, + 0x6F3A, 0xE2B4, 0x6F3B, 0xE27B, 0x6F3C, 0xE2A8, 0x6F3E, 0xBA79, + 0x6F3F, 0xBCDF, 0x6F40, 0xE2A6, 0x6F41, 0xE5F9, 0x6F43, 0xE2AD, + 0x6F4E, 0xE276, 0x6F4F, 0xE644, 0x6F50, 0xE64E, 0x6F51, 0xBCE2, + 0x6F52, 0xE64D, 0x6F53, 0xE659, 0x6F54, 0xBCE4, 0x6F55, 0xE64B, + 0x6F57, 0xE64F, 0x6F58, 0xBCEF, 0x6F5A, 0xE646, 0x6F5B, 0xBCE7, + 0x6F5D, 0xE652, 0x6F5E, 0xE9F0, 0x6F5F, 0xBCF3, 0x6F60, 0xBCF2, + 0x6F61, 0xE654, 0x6F62, 0xE643, 0x6F63, 0xE65E, 0x6F64, 0xBCED, + 0x6F66, 0xBCE3, 0x6F67, 0xE657, 0x6F69, 0xE65B, 0x6F6A, 0xE660, + 0x6F6B, 0xE655, 0x6F6C, 0xE649, 0x6F6D, 0xBCE6, 0x6F6E, 0xBCE9, + 0x6F6F, 0xBCF1, 0x6F70, 0xBCEC, 0x6F72, 0xE64C, 0x6F73, 0xE2A2, + 0x6F76, 0xE648, 0x6F77, 0xE65F, 0x6F78, 0xBCE8, 0x6F7A, 0xBCEB, + 0x6F7B, 0xE661, 0x6F7C, 0xBCE0, 0x6F7D, 0xE656, 0x6F7E, 0xE5FB, + 0x6F7F, 0xE65C, 0x6F80, 0xC0DF, 0x6F82, 0xE64A, 0x6F84, 0xBCE1, + 0x6F85, 0xE645, 0x6F86, 0xBCE5, 0x6F87, 0xE5FC, 0x6F88, 0xBAAB, + 0x6F89, 0xE641, 0x6F8B, 0xE65A, 0x6F8C, 0xE642, 0x6F8D, 0xE640, + 0x6F8E, 0xBCEA, 0x6F90, 0xE658, 0x6F92, 0xE5FE, 0x6F93, 0xE651, + 0x6F94, 0xE650, 0x6F95, 0xE65D, 0x6F96, 0xE647, 0x6F97, 0xBCEE, + 0x6F9E, 0xE9F3, 0x6FA0, 0xBF49, 0x6FA1, 0xBEFE, 0x6FA2, 0xEA40, + 0x6FA3, 0xE9EB, 0x6FA4, 0xBF41, 0x6FA5, 0xE9F7, 0x6FA6, 0xBF48, + 0x6FA7, 0xBF43, 0x6FA8, 0xE9F5, 0x6FA9, 0xED4F, 0x6FAA, 0xE9FB, + 0x6FAB, 0xEA42, 0x6FAC, 0xE9FA, 0x6FAD, 0xE9E9, 0x6FAE, 0xE9F8, + 0x6FAF, 0xEA44, 0x6FB0, 0xEA46, 0x6FB1, 0xBEFD, 0x6FB2, 0xEA45, + 0x6FB3, 0xBF44, 0x6FB4, 0xBF4A, 0x6FB6, 0xBF47, 0x6FB8, 0xE9FE, + 0x6FB9, 0xBF46, 0x6FBA, 0xE9F9, 0x6FBC, 0xE9ED, 0x6FBD, 0xE9F2, + 0x6FBF, 0xE9FD, 0x6FC0, 0xBF45, 0x6FC1, 0xBF42, 0x6FC2, 0xBEFC, + 0x6FC3, 0xBF40, 0x6FC4, 0xE9F1, 0x6FC6, 0xE5FD, 0x6FC7, 0xE9EC, + 0x6FC8, 0xE9EF, 0x6FC9, 0xEA41, 0x6FCA, 0xE9F4, 0x6FCB, 0xE9EA, + 0x6FCC, 0xED4E, 0x6FCD, 0xEA43, 0x6FCE, 0xE9EE, 0x6FCF, 0xE9FC, + 0x6FD4, 0xED51, 0x6FD5, 0xC0E3, 0x6FD8, 0xC0D7, 0x6FDB, 0xC0DB, + 0x6FDC, 0xED53, 0x6FDD, 0xED59, 0x6FDE, 0xED57, 0x6FDF, 0xC0D9, + 0x6FE0, 0xC0DA, 0x6FE1, 0xC0E1, 0x6FE2, 0xED5A, 0x6FE3, 0xED52, + 0x6FE4, 0xC0DC, 0x6FE6, 0xED56, 0x6FE7, 0xED55, 0x6FE8, 0xED5B, + 0x6FE9, 0xC0E2, 0x6FEB, 0xC0DD, 0x6FEC, 0xC0E0, 0x6FED, 0xED54, + 0x6FEE, 0xC0E4, 0x6FEF, 0xC0DE, 0x6FF0, 0xC0E5, 0x6FF1, 0xC0D8, + 0x6FF2, 0xED58, 0x6FF4, 0xED50, 0x6FF7, 0xEFF7, 0x6FFA, 0xC271, + 0x6FFB, 0xEFF4, 0x6FFC, 0xEFF6, 0x6FFE, 0xC26F, 0x6FFF, 0xEFF2, + 0x7000, 0xEFF3, 0x7001, 0xEFEE, 0x7004, 0xE9F6, 0x7005, 0xEFEF, + 0x7006, 0xC270, 0x7007, 0xEFEB, 0x7009, 0xC26D, 0x700A, 0xEFF8, + 0x700B, 0xC26E, 0x700C, 0xEFEC, 0x700D, 0xEFED, 0x700E, 0xEFF1, + 0x700F, 0xC273, 0x7011, 0xC272, 0x7014, 0xEFF0, 0x7015, 0xC378, + 0x7016, 0xF25F, 0x7017, 0xF265, 0x7018, 0xC379, 0x7019, 0xF25C, + 0x701A, 0xC376, 0x701B, 0xC373, 0x701C, 0xF267, 0x701D, 0xC377, + 0x701F, 0xC374, 0x7020, 0xF25E, 0x7021, 0xF261, 0x7022, 0xF262, + 0x7023, 0xF263, 0x7024, 0xF266, 0x7026, 0xEFF5, 0x7027, 0xF25D, + 0x7028, 0xC375, 0x7029, 0xF264, 0x702A, 0xF268, 0x702B, 0xF260, + 0x702F, 0xF45D, 0x7030, 0xC46A, 0x7031, 0xF460, 0x7032, 0xC46B, + 0x7033, 0xF468, 0x7034, 0xF45F, 0x7035, 0xF45C, 0x7037, 0xF45E, + 0x7038, 0xF462, 0x7039, 0xF465, 0x703A, 0xF464, 0x703B, 0xF467, + 0x703C, 0xF45B, 0x703E, 0xC469, 0x703F, 0xF463, 0x7040, 0xF466, + 0x7041, 0xF469, 0x7042, 0xF461, 0x7043, 0xF5D3, 0x7044, 0xF5D4, + 0x7045, 0xF5D8, 0x7046, 0xF5D9, 0x7048, 0xF5D6, 0x7049, 0xF5D7, + 0x704A, 0xF5D5, 0x704C, 0xC4E9, 0x7051, 0xC578, 0x7052, 0xF6EB, + 0x7055, 0xF6E8, 0x7056, 0xF6E9, 0x7057, 0xF6EA, 0x7058, 0xC579, + 0x705A, 0xF7E5, 0x705B, 0xF7E4, 0x705D, 0xF8AF, 0x705E, 0xC5F4, + 0x705F, 0xF8AD, 0x7060, 0xF8B0, 0x7061, 0xF8AE, 0x7062, 0xF8F5, + 0x7063, 0xC657, 0x7064, 0xC665, 0x7065, 0xF9A3, 0x7066, 0xF96C, + 0x7068, 0xF9A2, 0x7069, 0xF9D0, 0x706A, 0xF9D1, 0x706B, 0xA4F5, + 0x7070, 0xA6C7, 0x7071, 0xCA41, 0x7074, 0xCB5E, 0x7076, 0xA85F, + 0x7078, 0xA862, 0x707A, 0xCB5F, 0x707C, 0xA860, 0x707D, 0xA861, + 0x7082, 0xCD58, 0x7083, 0xCD5A, 0x7084, 0xCD55, 0x7085, 0xCD52, + 0x7086, 0xCD54, 0x708A, 0xAAA4, 0x708E, 0xAAA2, 0x7091, 0xCD56, + 0x7092, 0xAAA3, 0x7093, 0xCD53, 0x7094, 0xCD50, 0x7095, 0xAAA1, + 0x7096, 0xCD57, 0x7098, 0xCD51, 0x7099, 0xAAA5, 0x709A, 0xCD59, + 0x709F, 0xCFAF, 0x70A1, 0xCFB3, 0x70A4, 0xACB7, 0x70A9, 0xCFB6, + 0x70AB, 0xACAF, 0x70AC, 0xACB2, 0x70AD, 0xACB4, 0x70AE, 0xACB6, + 0x70AF, 0xACB3, 0x70B0, 0xCFB2, 0x70B1, 0xCFB1, 0x70B3, 0xACB1, + 0x70B4, 0xCFB4, 0x70B5, 0xCFB5, 0x70B7, 0xCFAE, 0x70B8, 0xACB5, + 0x70BA, 0xACB0, 0x70BE, 0xCFB0, 0x70C5, 0xD277, 0x70C6, 0xD278, + 0x70C7, 0xD279, 0x70C8, 0xAF50, 0x70CA, 0xAF4C, 0x70CB, 0xD26E, + 0x70CD, 0xD276, 0x70CE, 0xD27B, 0x70CF, 0xAF51, 0x70D1, 0xD26C, + 0x70D2, 0xD272, 0x70D3, 0xD26B, 0x70D4, 0xD275, 0x70D7, 0xD271, + 0x70D8, 0xAF4D, 0x70D9, 0xAF4F, 0x70DA, 0xD27A, 0x70DC, 0xD26A, + 0x70DD, 0xD26D, 0x70DE, 0xD273, 0x70E0, 0xD274, 0x70E1, 0xD27C, + 0x70E2, 0xD270, 0x70E4, 0xAF4E, 0x70EF, 0xB26D, 0x70F0, 0xD64E, + 0x70F3, 0xD650, 0x70F4, 0xD64C, 0x70F6, 0xD658, 0x70F7, 0xD64A, + 0x70F8, 0xD657, 0x70F9, 0xB269, 0x70FA, 0xD648, 0x70FB, 0xDA5B, + 0x70FC, 0xD652, 0x70FD, 0xB26C, 0x70FF, 0xD653, 0x7100, 0xD656, + 0x7102, 0xD65A, 0x7104, 0xD64F, 0x7106, 0xD654, 0x7109, 0xB26A, + 0x710A, 0xB26B, 0x710B, 0xD659, 0x710C, 0xD64D, 0x710D, 0xD649, + 0x710E, 0xD65B, 0x7110, 0xD651, 0x7113, 0xD655, 0x7117, 0xD64B, + 0x7119, 0xB548, 0x711A, 0xB549, 0x711B, 0xDA65, 0x711C, 0xB54F, + 0x711E, 0xDA59, 0x711F, 0xDA62, 0x7120, 0xDA58, 0x7121, 0xB54C, + 0x7122, 0xDA60, 0x7123, 0xDA5E, 0x7125, 0xDA5F, 0x7126, 0xB54A, + 0x7128, 0xDA63, 0x712E, 0xDA5C, 0x712F, 0xDA5A, 0x7130, 0xB54B, + 0x7131, 0xDA5D, 0x7132, 0xDA61, 0x7136, 0xB54D, 0x713A, 0xDA64, + 0x7141, 0xDE70, 0x7142, 0xDE77, 0x7143, 0xDE79, 0x7144, 0xDEA1, + 0x7146, 0xB7DA, 0x7147, 0xDE6B, 0x7149, 0xB7D2, 0x714B, 0xDE7A, + 0x714C, 0xB7D7, 0x714D, 0xDEA2, 0x714E, 0xB7CE, 0x7150, 0xDE7D, + 0x7152, 0xDE6D, 0x7153, 0xDE7E, 0x7154, 0xDE6C, 0x7156, 0xB7DC, + 0x7158, 0xDE78, 0x7159, 0xB7CF, 0x715A, 0xDEA3, 0x715C, 0xB7D4, + 0x715D, 0xDE71, 0x715E, 0xB7D9, 0x715F, 0xDE7C, 0x7160, 0xDE6F, + 0x7161, 0xDE76, 0x7162, 0xDE72, 0x7163, 0xDE6E, 0x7164, 0xB7D1, + 0x7165, 0xB7D8, 0x7166, 0xB7D6, 0x7167, 0xB7D3, 0x7168, 0xB7DB, + 0x7169, 0xB7D0, 0x716A, 0xDE75, 0x716C, 0xB7D5, 0x716E, 0xB54E, + 0x7170, 0xDE7B, 0x7172, 0xDE73, 0x7178, 0xDE74, 0x717B, 0xE2C1, + 0x717D, 0xBAB4, 0x7180, 0xE2BD, 0x7181, 0xE2C3, 0x7182, 0xE2BF, + 0x7184, 0xBAB6, 0x7185, 0xE2BE, 0x7186, 0xE2C2, 0x7187, 0xE2BA, + 0x7189, 0xE2BC, 0x718A, 0xBAB5, 0x718F, 0xE2C0, 0x7190, 0xE2BB, + 0x7192, 0xBAB7, 0x7194, 0xBAB2, 0x7197, 0xE2C4, 0x7199, 0xBAB3, + 0x719A, 0xE667, 0x719B, 0xE664, 0x719C, 0xE670, 0x719D, 0xE66A, + 0x719E, 0xE66C, 0x719F, 0xBCF4, 0x71A0, 0xE666, 0x71A1, 0xE66E, + 0x71A4, 0xE66D, 0x71A5, 0xE66B, 0x71A7, 0xE671, 0x71A8, 0xBCF7, + 0x71A9, 0xE668, 0x71AA, 0xE66F, 0x71AC, 0xBCF5, 0x71AF, 0xE663, + 0x71B0, 0xE665, 0x71B1, 0xBCF6, 0x71B2, 0xE662, 0x71B3, 0xE672, + 0x71B5, 0xE669, 0x71B8, 0xEA4A, 0x71B9, 0xBF51, 0x71BC, 0xEA55, + 0x71BD, 0xEA53, 0x71BE, 0xBF4B, 0x71BF, 0xEA49, 0x71C0, 0xEA4C, + 0x71C1, 0xEA4D, 0x71C2, 0xEA48, 0x71C3, 0xBF55, 0x71C4, 0xBF56, + 0x71C5, 0xEA47, 0x71C6, 0xEA56, 0x71C7, 0xEA51, 0x71C8, 0xBF4F, + 0x71C9, 0xBF4C, 0x71CA, 0xEA50, 0x71CB, 0xEA4E, 0x71CE, 0xBF52, + 0x71CF, 0xEA52, 0x71D0, 0xBF4D, 0x71D2, 0xBF4E, 0x71D4, 0xEA4F, + 0x71D5, 0xBF50, 0x71D6, 0xEA4B, 0x71D8, 0xEA54, 0x71D9, 0xBF53, + 0x71DA, 0xEA57, 0x71DB, 0xEA58, 0x71DC, 0xBF54, 0x71DF, 0xC0E7, + 0x71E0, 0xC0EE, 0x71E1, 0xED5C, 0x71E2, 0xED62, 0x71E4, 0xED60, + 0x71E5, 0xC0EA, 0x71E6, 0xC0E9, 0x71E7, 0xC0E6, 0x71E8, 0xED5E, + 0x71EC, 0xC0EC, 0x71ED, 0xC0EB, 0x71EE, 0xC0E8, 0x71F0, 0xED61, + 0x71F1, 0xED5D, 0x71F2, 0xED5F, 0x71F4, 0xC0ED, 0x71F8, 0xC277, + 0x71F9, 0xEFFB, 0x71FB, 0xC274, 0x71FC, 0xC275, 0x71FD, 0xEFFD, + 0x71FE, 0xC276, 0x71FF, 0xEFFA, 0x7201, 0xEFF9, 0x7202, 0xF26C, + 0x7203, 0xEFFC, 0x7205, 0xF26D, 0x7206, 0xC37A, 0x7207, 0xF26B, + 0x720A, 0xF26A, 0x720C, 0xF269, 0x720D, 0xC37B, 0x7210, 0xC46C, + 0x7213, 0xF46A, 0x7214, 0xF46B, 0x7219, 0xF5DC, 0x721A, 0xF5DB, + 0x721B, 0xC4EA, 0x721D, 0xF5DA, 0x721E, 0xF6EC, 0x721F, 0xF6ED, + 0x7222, 0xF7E6, 0x7223, 0xF8B1, 0x7226, 0xF8F6, 0x7227, 0xF9BC, + 0x7228, 0xC679, 0x7229, 0xF9C6, 0x722A, 0xA4F6, 0x722C, 0xAAA6, + 0x722D, 0xAAA7, 0x7230, 0xACB8, 0x7235, 0xC0EF, 0x7236, 0xA4F7, + 0x7238, 0xAAA8, 0x7239, 0xAF52, 0x723A, 0xB7DD, 0x723B, 0xA4F8, + 0x723D, 0xB26E, 0x723E, 0xBAB8, 0x723F, 0xC962, 0x7241, 0xCFB7, + 0x7242, 0xD27D, 0x7244, 0xE2C5, 0x7246, 0xC0F0, 0x7247, 0xA4F9, + 0x7248, 0xAAA9, 0x7249, 0xCFB8, 0x724A, 0xCFB9, 0x724B, 0xDA66, + 0x724C, 0xB550, 0x724F, 0xDEA4, 0x7252, 0xB7DE, 0x7253, 0xE2C6, + 0x7256, 0xBCF8, 0x7258, 0xC37C, 0x7259, 0xA4FA, 0x725A, 0xDA67, + 0x725B, 0xA4FB, 0x725D, 0xA6C9, 0x725E, 0xCA42, 0x725F, 0xA6C8, + 0x7260, 0xA865, 0x7261, 0xA864, 0x7262, 0xA863, 0x7263, 0xCB60, + 0x7267, 0xAAAA, 0x7269, 0xAAAB, 0x726A, 0xCD5B, 0x726C, 0xCFBA, + 0x726E, 0xCFBD, 0x726F, 0xACBA, 0x7270, 0xCFBB, 0x7272, 0xACB9, + 0x7273, 0xCFBC, 0x7274, 0xACBB, 0x7276, 0xD2A2, 0x7277, 0xD2A1, + 0x7278, 0xD27E, 0x7279, 0xAF53, 0x727B, 0xD65D, 0x727C, 0xD65E, + 0x727D, 0xB26F, 0x727E, 0xD65C, 0x727F, 0xD65F, 0x7280, 0xB552, + 0x7281, 0xB270, 0x7284, 0xB551, 0x7285, 0xDA6B, 0x7286, 0xDA6A, + 0x7288, 0xDA68, 0x7289, 0xDA69, 0x728B, 0xDA6C, 0x728C, 0xDEA6, + 0x728D, 0xDEA5, 0x728E, 0xDEA9, 0x7290, 0xDEA8, 0x7291, 0xDEA7, + 0x7292, 0xBAB9, 0x7293, 0xE2C9, 0x7295, 0xE2C8, 0x7296, 0xBABA, + 0x7297, 0xE2C7, 0x7298, 0xE673, 0x729A, 0xE674, 0x729B, 0xBCF9, + 0x729D, 0xEA59, 0x729E, 0xEA5A, 0x72A1, 0xF272, 0x72A2, 0xC37D, + 0x72A3, 0xF271, 0x72A4, 0xF270, 0x72A5, 0xF26E, 0x72A6, 0xF26F, + 0x72A7, 0xC4EB, 0x72A8, 0xF46C, 0x72A9, 0xF6EE, 0x72AA, 0xF8F7, + 0x72AC, 0xA4FC, 0x72AE, 0xC9A5, 0x72AF, 0xA5C7, 0x72B0, 0xC9A6, + 0x72B4, 0xCA43, 0x72B5, 0xCA44, 0x72BA, 0xCB66, 0x72BD, 0xCB62, + 0x72BF, 0xCB61, 0x72C0, 0xAAAC, 0x72C1, 0xCB65, 0x72C2, 0xA867, + 0x72C3, 0xCB63, 0x72C4, 0xA866, 0x72C5, 0xCB67, 0x72C6, 0xCB64, + 0x72C9, 0xCD5F, 0x72CA, 0xCFBE, 0x72CB, 0xCD5D, 0x72CC, 0xCD64, + 0x72CE, 0xAAAD, 0x72D0, 0xAAB0, 0x72D1, 0xCD65, 0x72D2, 0xCD61, + 0x72D4, 0xCD62, 0x72D6, 0xCD5C, 0x72D7, 0xAAAF, 0x72D8, 0xCD5E, + 0x72D9, 0xAAAE, 0x72DA, 0xCD63, 0x72DC, 0xCD60, 0x72DF, 0xCFC2, + 0x72E0, 0xACBD, 0x72E1, 0xACBE, 0x72E3, 0xCFC5, 0x72E4, 0xCFBF, + 0x72E6, 0xCFC4, 0x72E8, 0xCFC0, 0x72E9, 0xACBC, 0x72EA, 0xCFC3, + 0x72EB, 0xCFC1, 0x72F3, 0xD2A8, 0x72F4, 0xD2A5, 0x72F6, 0xD2A7, + 0x72F7, 0xAF58, 0x72F8, 0xAF57, 0x72F9, 0xAF55, 0x72FA, 0xD2A4, + 0x72FB, 0xD2A9, 0x72FC, 0xAF54, 0x72FD, 0xAF56, 0x72FE, 0xD2A6, + 0x72FF, 0xD667, 0x7300, 0xD2A3, 0x7301, 0xD2AA, 0x7307, 0xD662, + 0x7308, 0xD666, 0x730A, 0xD665, 0x730B, 0xDA6E, 0x730C, 0xDA79, + 0x730F, 0xD668, 0x7311, 0xD663, 0x7312, 0xDA6D, 0x7313, 0xB274, + 0x7316, 0xB273, 0x7317, 0xD661, 0x7318, 0xD664, 0x7319, 0xB275, + 0x731B, 0xB272, 0x731C, 0xB271, 0x731D, 0xD660, 0x731E, 0xD669, + 0x7322, 0xDA70, 0x7323, 0xDA77, 0x7325, 0xB554, 0x7326, 0xDA76, + 0x7327, 0xDA73, 0x7329, 0xB556, 0x732D, 0xDA75, 0x7330, 0xDA6F, + 0x7331, 0xDA71, 0x7332, 0xDA74, 0x7333, 0xDA72, 0x7334, 0xB555, + 0x7335, 0xDA78, 0x7336, 0xB553, 0x7337, 0xB7DF, 0x733A, 0xDEAD, + 0x733B, 0xDEAC, 0x733C, 0xDEAA, 0x733E, 0xB7E2, 0x733F, 0xB7E1, + 0x7340, 0xDEAE, 0x7342, 0xDEAB, 0x7343, 0xE2CA, 0x7344, 0xBABB, + 0x7345, 0xB7E0, 0x7349, 0xDEB0, 0x734A, 0xDEAF, 0x734C, 0xE2CD, + 0x734D, 0xE2CB, 0x734E, 0xBCFA, 0x7350, 0xBABC, 0x7351, 0xE2CC, + 0x7352, 0xE676, 0x7357, 0xBCFB, 0x7358, 0xE675, 0x7359, 0xE67E, + 0x735A, 0xE67D, 0x735B, 0xE67B, 0x735D, 0xE67A, 0x735E, 0xE677, + 0x735F, 0xE678, 0x7360, 0xE679, 0x7361, 0xE67C, 0x7362, 0xE6A1, + 0x7365, 0xEA5F, 0x7366, 0xEA5C, 0x7367, 0xEA5D, 0x7368, 0xBF57, + 0x7369, 0xEA5B, 0x736A, 0xEA61, 0x736B, 0xEA60, 0x736C, 0xEA5E, + 0x736E, 0xED64, 0x736F, 0xED65, 0x7370, 0xC0F1, 0x7372, 0xC0F2, + 0x7373, 0xED63, 0x7375, 0xC279, 0x7376, 0xEFFE, 0x7377, 0xC278, + 0x7378, 0xC37E, 0x737A, 0xC3A1, 0x737B, 0xC46D, 0x737C, 0xF46E, + 0x737D, 0xF46D, 0x737E, 0xF5DD, 0x737F, 0xF6EF, 0x7380, 0xC57A, + 0x7381, 0xF7E8, 0x7382, 0xF7E7, 0x7383, 0xF7E9, 0x7384, 0xA5C8, + 0x7385, 0xCFC6, 0x7386, 0xAF59, 0x7387, 0xB276, 0x7388, 0xD66A, + 0x7389, 0xA5C9, 0x738A, 0xC9A7, 0x738B, 0xA4FD, 0x738E, 0xCA45, + 0x7392, 0xCB6C, 0x7393, 0xCB6A, 0x7394, 0xCB6B, 0x7395, 0xCB68, + 0x7396, 0xA868, 0x7397, 0xCB69, 0x739D, 0xCD6D, 0x739F, 0xAAB3, + 0x73A0, 0xCD6B, 0x73A1, 0xCD67, 0x73A2, 0xCD6A, 0x73A4, 0xCD66, + 0x73A5, 0xAAB5, 0x73A6, 0xCD69, 0x73A8, 0xAAB2, 0x73A9, 0xAAB1, + 0x73AB, 0xAAB4, 0x73AC, 0xCD6C, 0x73AD, 0xCD68, 0x73B2, 0xACC2, + 0x73B3, 0xACC5, 0x73B4, 0xCFCE, 0x73B5, 0xCFCD, 0x73B6, 0xCFCC, + 0x73B7, 0xACBF, 0x73B8, 0xCFD5, 0x73B9, 0xCFCB, 0x73BB, 0xACC1, + 0x73BC, 0xD2AF, 0x73BE, 0xCFD2, 0x73BF, 0xCFD0, 0x73C0, 0xACC4, + 0x73C2, 0xCFC8, 0x73C3, 0xCFD3, 0x73C5, 0xCFCA, 0x73C6, 0xCFD4, + 0x73C7, 0xCFD1, 0x73C8, 0xCFC9, 0x73CA, 0xACC0, 0x73CB, 0xCFD6, + 0x73CC, 0xCFC7, 0x73CD, 0xACC3, 0x73D2, 0xD2B4, 0x73D3, 0xD2AB, + 0x73D4, 0xD2B6, 0x73D6, 0xD2AE, 0x73D7, 0xD2B9, 0x73D8, 0xD2BA, + 0x73D9, 0xD2AC, 0x73DA, 0xD2B8, 0x73DB, 0xD2B5, 0x73DC, 0xD2B3, + 0x73DD, 0xD2B7, 0x73DE, 0xAF5F, 0x73E0, 0xAF5D, 0x73E3, 0xD2B1, + 0x73E5, 0xD2AD, 0x73E7, 0xD2B0, 0x73E8, 0xD2BB, 0x73E9, 0xD2B2, + 0x73EA, 0xAF5E, 0x73EB, 0xCFCF, 0x73ED, 0xAF5A, 0x73EE, 0xAF5C, + 0x73F4, 0xD678, 0x73F5, 0xD66D, 0x73F6, 0xD66B, 0x73F8, 0xD66C, + 0x73FA, 0xD673, 0x73FC, 0xD674, 0x73FD, 0xD670, 0x73FE, 0xB27B, + 0x73FF, 0xD675, 0x7400, 0xD672, 0x7401, 0xD66F, 0x7403, 0xB279, + 0x7404, 0xD66E, 0x7405, 0xB277, 0x7406, 0xB27A, 0x7407, 0xD671, + 0x7408, 0xD679, 0x7409, 0xAF5B, 0x740A, 0xB278, 0x740B, 0xD677, + 0x740C, 0xD676, 0x740D, 0xB27C, 0x7416, 0xDA7E, 0x741A, 0xDAA1, + 0x741B, 0xB560, 0x741D, 0xDAA7, 0x7420, 0xDAA9, 0x7421, 0xDAA2, + 0x7422, 0xB55A, 0x7423, 0xDAA6, 0x7424, 0xDAA5, 0x7425, 0xB55B, + 0x7426, 0xB561, 0x7428, 0xB562, 0x7429, 0xDAA8, 0x742A, 0xB558, + 0x742B, 0xDA7D, 0x742C, 0xDA7B, 0x742D, 0xDAA3, 0x742E, 0xDA7A, + 0x742F, 0xB55F, 0x7430, 0xDA7C, 0x7431, 0xDAA4, 0x7432, 0xDAAA, + 0x7433, 0xB559, 0x7434, 0xB55E, 0x7435, 0xB55C, 0x7436, 0xB55D, + 0x743A, 0xB557, 0x743F, 0xB7E9, 0x7440, 0xDEB7, 0x7441, 0xB7E8, + 0x7442, 0xDEBB, 0x7444, 0xDEB1, 0x7446, 0xDEBC, 0x744A, 0xDEB2, + 0x744B, 0xDEB3, 0x744D, 0xDEBD, 0x744E, 0xDEBA, 0x744F, 0xDEB8, + 0x7450, 0xDEB9, 0x7451, 0xDEB5, 0x7452, 0xDEB4, 0x7454, 0xDEBE, + 0x7455, 0xB7E5, 0x7457, 0xDEB6, 0x7459, 0xB7EA, 0x745A, 0xB7E4, + 0x745B, 0xB7EB, 0x745C, 0xB7EC, 0x745E, 0xB7E7, 0x745F, 0xB7E6, + 0x7462, 0xE2CE, 0x7463, 0xBABE, 0x7464, 0xBABD, 0x7467, 0xE2D3, + 0x7469, 0xBCFC, 0x746A, 0xBABF, 0x746D, 0xBAC1, 0x746E, 0xE2D4, + 0x746F, 0xB7E3, 0x7470, 0xBAC0, 0x7471, 0xE2D0, 0x7472, 0xE2D2, + 0x7473, 0xE2CF, 0x7475, 0xE2D1, 0x7479, 0xE6AB, 0x747C, 0xE6AA, + 0x747D, 0xE6A7, 0x747E, 0xBD40, 0x747F, 0xEA62, 0x7480, 0xBD41, + 0x7481, 0xE6A6, 0x7483, 0xBCFE, 0x7485, 0xE6A8, 0x7486, 0xE6A5, + 0x7487, 0xE6A2, 0x7488, 0xE6A9, 0x7489, 0xE6A3, 0x748A, 0xE6A4, + 0x748B, 0xBCFD, 0x7490, 0xED69, 0x7492, 0xEA66, 0x7494, 0xEA65, + 0x7495, 0xEA67, 0x7497, 0xED66, 0x7498, 0xBF5A, 0x749A, 0xEA63, + 0x749C, 0xBF58, 0x749E, 0xBF5C, 0x749F, 0xBF5B, 0x74A0, 0xEA64, + 0x74A1, 0xEA68, 0x74A3, 0xBF59, 0x74A5, 0xED6D, 0x74A6, 0xC0F5, + 0x74A7, 0xC27A, 0x74A8, 0xC0F6, 0x74A9, 0xC0F3, 0x74AA, 0xED6A, + 0x74AB, 0xED68, 0x74AD, 0xED6B, 0x74AF, 0xED6E, 0x74B0, 0xC0F4, + 0x74B1, 0xED6C, 0x74B2, 0xED67, 0x74B5, 0xF042, 0x74B6, 0xF045, + 0x74B7, 0xF275, 0x74B8, 0xF040, 0x74BA, 0xF46F, 0x74BB, 0xF046, + 0x74BD, 0xC3A2, 0x74BE, 0xF044, 0x74BF, 0xC27B, 0x74C0, 0xF041, + 0x74C1, 0xF043, 0x74C2, 0xF047, 0x74C3, 0xF276, 0x74C5, 0xF274, + 0x74CA, 0xC3A3, 0x74CB, 0xF273, 0x74CF, 0xC46E, 0x74D4, 0xC4ED, + 0x74D5, 0xF6F1, 0x74D6, 0xC4EC, 0x74D7, 0xF6F3, 0x74D8, 0xF6F0, + 0x74D9, 0xF6F2, 0x74DA, 0xC5D0, 0x74DB, 0xF8B2, 0x74DC, 0xA5CA, + 0x74DD, 0xCD6E, 0x74DE, 0xD2BC, 0x74DF, 0xD2BD, 0x74E0, 0xB27D, + 0x74E1, 0xDEBF, 0x74E2, 0xBF5D, 0x74E3, 0xC3A4, 0x74E4, 0xC57B, + 0x74E5, 0xF8B3, 0x74E6, 0xA5CB, 0x74E8, 0xCD6F, 0x74E9, 0xA260, + 0x74EC, 0xCFD7, 0x74EE, 0xCFD8, 0x74F4, 0xD2BE, 0x74F5, 0xD2BF, + 0x74F6, 0xB27E, 0x74F7, 0xB2A1, 0x74FB, 0xDAAB, 0x74FD, 0xDEC2, + 0x74FE, 0xDEC1, 0x74FF, 0xDEC0, 0x7500, 0xE2D5, 0x7502, 0xE2D6, + 0x7503, 0xE2D7, 0x7504, 0xBAC2, 0x7507, 0xE6AD, 0x7508, 0xE6AC, + 0x750B, 0xEA69, 0x750C, 0xBF5E, 0x750D, 0xBF5F, 0x750F, 0xED72, + 0x7510, 0xED6F, 0x7511, 0xED70, 0x7512, 0xED71, 0x7513, 0xF049, + 0x7514, 0xF048, 0x7515, 0xC27C, 0x7516, 0xF277, 0x7517, 0xF5DE, + 0x7518, 0xA5CC, 0x751A, 0xACC6, 0x751C, 0xB2A2, 0x751D, 0xDEC3, + 0x751F, 0xA5CD, 0x7521, 0xD2C0, 0x7522, 0xB2A3, 0x7525, 0xB563, + 0x7526, 0xB564, 0x7528, 0xA5CE, 0x7529, 0xA5CF, 0x752A, 0xCA46, + 0x752B, 0xA86A, 0x752C, 0xA869, 0x752D, 0xACC7, 0x752E, 0xCFD9, + 0x752F, 0xDAAC, 0x7530, 0xA5D0, 0x7531, 0xA5D1, 0x7532, 0xA5D2, + 0x7533, 0xA5D3, 0x7537, 0xA86B, 0x7538, 0xA86C, 0x7539, 0xCB6E, + 0x753A, 0xCB6D, 0x753D, 0xAAB6, 0x753E, 0xCD72, 0x753F, 0xCD70, + 0x7540, 0xCD71, 0x7547, 0xCFDA, 0x7548, 0xCFDB, 0x754B, 0xACCB, + 0x754C, 0xACC9, 0x754E, 0xACCA, 0x754F, 0xACC8, 0x7554, 0xAF60, + 0x7559, 0xAF64, 0x755A, 0xAF63, 0x755B, 0xD2C1, 0x755C, 0xAF62, + 0x755D, 0xAF61, 0x755F, 0xD2C2, 0x7562, 0xB2A6, 0x7563, 0xD67B, + 0x7564, 0xD67A, 0x7565, 0xB2A4, 0x7566, 0xB2A5, 0x756A, 0xB566, + 0x756B, 0xB565, 0x756C, 0xDAAE, 0x756F, 0xDAAD, 0x7570, 0xB2A7, + 0x7576, 0xB7ED, 0x7577, 0xDEC5, 0x7578, 0xB7EE, 0x7579, 0xDEC4, + 0x757D, 0xE2D8, 0x757E, 0xE6AE, 0x757F, 0xBD42, 0x7580, 0xEA6A, + 0x7584, 0xED73, 0x7586, 0xC3A6, 0x7587, 0xC3A5, 0x758A, 0xC57C, + 0x758B, 0xA5D4, 0x758C, 0xCD73, 0x758F, 0xB2A8, 0x7590, 0xE2D9, + 0x7591, 0xBAC3, 0x7594, 0xCB6F, 0x7595, 0xCB70, 0x7598, 0xCD74, + 0x7599, 0xAAB8, 0x759A, 0xAAB9, 0x759D, 0xAAB7, 0x75A2, 0xACCF, + 0x75A3, 0xACD0, 0x75A4, 0xACCD, 0x75A5, 0xACCE, 0x75A7, 0xCFDC, + 0x75AA, 0xCFDD, 0x75AB, 0xACCC, 0x75B0, 0xD2C3, 0x75B2, 0xAF68, + 0x75B3, 0xAF69, 0x75B5, 0xB2AB, 0x75B6, 0xD2C9, 0x75B8, 0xAF6E, + 0x75B9, 0xAF6C, 0x75BA, 0xD2CA, 0x75BB, 0xD2C5, 0x75BC, 0xAF6B, + 0x75BD, 0xAF6A, 0x75BE, 0xAF65, 0x75BF, 0xD2C8, 0x75C0, 0xD2C7, + 0x75C1, 0xD2C4, 0x75C2, 0xAF6D, 0x75C4, 0xD2C6, 0x75C5, 0xAF66, + 0x75C7, 0xAF67, 0x75CA, 0xB2AC, 0x75CB, 0xD6A1, 0x75CC, 0xD6A2, + 0x75CD, 0xB2AD, 0x75CE, 0xD67C, 0x75CF, 0xD67E, 0x75D0, 0xD6A4, + 0x75D1, 0xD6A3, 0x75D2, 0xD67D, 0x75D4, 0xB2A9, 0x75D5, 0xB2AA, + 0x75D7, 0xDAB6, 0x75D8, 0xB56B, 0x75D9, 0xB56A, 0x75DA, 0xDAB0, + 0x75DB, 0xB568, 0x75DD, 0xDAB3, 0x75DE, 0xB56C, 0x75DF, 0xDAB4, + 0x75E0, 0xB56D, 0x75E1, 0xDAB1, 0x75E2, 0xB567, 0x75E3, 0xB569, + 0x75E4, 0xDAB5, 0x75E6, 0xDAB2, 0x75E7, 0xDAAF, 0x75ED, 0xDED2, + 0x75EF, 0xDEC7, 0x75F0, 0xB7F0, 0x75F1, 0xB7F3, 0x75F2, 0xB7F2, + 0x75F3, 0xB7F7, 0x75F4, 0xB7F6, 0x75F5, 0xDED3, 0x75F6, 0xDED1, + 0x75F7, 0xDECA, 0x75F8, 0xDECE, 0x75F9, 0xDECD, 0x75FA, 0xB7F4, + 0x75FB, 0xDED0, 0x75FC, 0xDECC, 0x75FD, 0xDED4, 0x75FE, 0xDECB, + 0x75FF, 0xB7F5, 0x7600, 0xB7EF, 0x7601, 0xB7F1, 0x7603, 0xDEC9, + 0x7608, 0xE2DB, 0x7609, 0xBAC7, 0x760A, 0xE2DF, 0x760B, 0xBAC6, + 0x760C, 0xE2DC, 0x760D, 0xBAC5, 0x760F, 0xDEC8, 0x7610, 0xDECF, + 0x7611, 0xE2DE, 0x7613, 0xBAC8, 0x7614, 0xE2E0, 0x7615, 0xE2DD, + 0x7616, 0xE2DA, 0x7619, 0xE6B1, 0x761A, 0xE6B5, 0x761B, 0xE6B7, + 0x761C, 0xE6B3, 0x761D, 0xE6B2, 0x761E, 0xE6B0, 0x761F, 0xBD45, + 0x7620, 0xBD43, 0x7621, 0xBD48, 0x7622, 0xBD49, 0x7623, 0xE6B4, + 0x7624, 0xBD46, 0x7625, 0xE6AF, 0x7626, 0xBD47, 0x7627, 0xBAC4, + 0x7628, 0xE6B6, 0x7629, 0xBD44, 0x762D, 0xEA6C, 0x762F, 0xEA6B, + 0x7630, 0xEA73, 0x7631, 0xEA6D, 0x7632, 0xEA72, 0x7633, 0xEA6F, + 0x7634, 0xBF60, 0x7635, 0xEA71, 0x7638, 0xBF61, 0x763A, 0xBF62, + 0x763C, 0xEA70, 0x763D, 0xEA6E, 0x7642, 0xC0F8, 0x7643, 0xED74, + 0x7646, 0xC0F7, 0x7647, 0xED77, 0x7648, 0xED75, 0x7649, 0xED76, + 0x764C, 0xC0F9, 0x7650, 0xF04D, 0x7652, 0xC2A1, 0x7653, 0xF04E, + 0x7656, 0xC27D, 0x7657, 0xF04F, 0x7658, 0xC27E, 0x7659, 0xF04C, + 0x765A, 0xF050, 0x765C, 0xF04A, 0x765F, 0xC3A7, 0x7660, 0xF278, + 0x7661, 0xC3A8, 0x7662, 0xC46F, 0x7664, 0xF04B, 0x7665, 0xC470, + 0x7669, 0xC4EE, 0x766A, 0xF5DF, 0x766C, 0xC57E, 0x766D, 0xF6F4, + 0x766E, 0xC57D, 0x7670, 0xF7EA, 0x7671, 0xC5F5, 0x7672, 0xC5F6, + 0x7675, 0xF9CC, 0x7678, 0xACD1, 0x7679, 0xCFDE, 0x767B, 0xB56E, + 0x767C, 0xB56F, 0x767D, 0xA5D5, 0x767E, 0xA6CA, 0x767F, 0xCA47, + 0x7681, 0xCB71, 0x7682, 0xA86D, 0x7684, 0xAABA, 0x7686, 0xACD2, + 0x7687, 0xACD3, 0x7688, 0xACD4, 0x7689, 0xD6A6, 0x768A, 0xD2CB, + 0x768B, 0xAF6F, 0x768E, 0xB2AE, 0x768F, 0xD6A5, 0x7692, 0xDAB8, + 0x7693, 0xB571, 0x7695, 0xDAB7, 0x7696, 0xB570, 0x7699, 0xDED5, + 0x769A, 0xBD4A, 0x769B, 0xE6BB, 0x769C, 0xE6B8, 0x769D, 0xE6B9, + 0x769E, 0xE6BA, 0x76A4, 0xED78, 0x76A6, 0xF051, 0x76AA, 0xF471, + 0x76AB, 0xF470, 0x76AD, 0xF6F5, 0x76AE, 0xA5D6, 0x76AF, 0xCD75, + 0x76B0, 0xAF70, 0x76B4, 0xB572, 0x76B5, 0xDED6, 0x76B8, 0xE2E1, + 0x76BA, 0xBD4B, 0x76BB, 0xEA74, 0x76BD, 0xF052, 0x76BE, 0xF472, + 0x76BF, 0xA5D7, 0x76C2, 0xAABB, 0x76C3, 0xACD7, 0x76C4, 0xCFDF, + 0x76C5, 0xACD8, 0x76C6, 0xACD6, 0x76C8, 0xACD5, 0x76C9, 0xD2CC, + 0x76CA, 0xAF71, 0x76CD, 0xAF72, 0x76CE, 0xAF73, 0x76D2, 0xB2B0, + 0x76D3, 0xD6A7, 0x76D4, 0xB2AF, 0x76DA, 0xDAB9, 0x76DB, 0xB2B1, + 0x76DC, 0xB573, 0x76DD, 0xDED7, 0x76DE, 0xB7F8, 0x76DF, 0xB7F9, + 0x76E1, 0xBAC9, 0x76E3, 0xBACA, 0x76E4, 0xBD4C, 0x76E5, 0xBF64, + 0x76E6, 0xEA75, 0x76E7, 0xBF63, 0x76E9, 0xED79, 0x76EA, 0xC0FA, + 0x76EC, 0xF053, 0x76ED, 0xF473, 0x76EE, 0xA5D8, 0x76EF, 0xA86E, + 0x76F0, 0xCD78, 0x76F1, 0xCD77, 0x76F2, 0xAABC, 0x76F3, 0xCD76, + 0x76F4, 0xAABD, 0x76F5, 0xCD79, 0x76F7, 0xCFE5, 0x76F8, 0xACDB, + 0x76F9, 0xACDA, 0x76FA, 0xCFE7, 0x76FB, 0xCFE6, 0x76FC, 0xACDF, + 0x76FE, 0xACDE, 0x7701, 0xACD9, 0x7703, 0xCFE1, 0x7704, 0xCFE2, + 0x7705, 0xCFE3, 0x7707, 0xACE0, 0x7708, 0xCFE0, 0x7709, 0xACDC, + 0x770A, 0xCFE4, 0x770B, 0xACDD, 0x7710, 0xD2CF, 0x7711, 0xD2D3, + 0x7712, 0xD2D1, 0x7713, 0xD2D0, 0x7715, 0xD2D4, 0x7719, 0xD2D5, + 0x771A, 0xD2D6, 0x771B, 0xD2CE, 0x771D, 0xD2CD, 0x771F, 0xAF75, + 0x7720, 0xAF76, 0x7722, 0xD2D7, 0x7723, 0xD2D2, 0x7725, 0xD6B0, + 0x7727, 0xD2D8, 0x7728, 0xAF77, 0x7729, 0xAF74, 0x772D, 0xD6AA, + 0x772F, 0xD6A9, 0x7731, 0xD6AB, 0x7732, 0xD6AC, 0x7733, 0xD6AE, + 0x7734, 0xD6AD, 0x7735, 0xD6B2, 0x7736, 0xB2B5, 0x7737, 0xB2B2, + 0x7738, 0xB2B6, 0x7739, 0xD6A8, 0x773A, 0xB2B7, 0x773B, 0xD6B1, + 0x773C, 0xB2B4, 0x773D, 0xD6AF, 0x773E, 0xB2B3, 0x7744, 0xDABC, + 0x7745, 0xDABE, 0x7746, 0xDABA, 0x7747, 0xDABB, 0x774A, 0xDABF, + 0x774B, 0xDAC1, 0x774C, 0xDAC2, 0x774D, 0xDABD, 0x774E, 0xDAC0, + 0x774F, 0xB574, 0x7752, 0xDEDB, 0x7754, 0xDEE0, 0x7755, 0xDED8, + 0x7756, 0xDEDC, 0x7759, 0xDEE1, 0x775A, 0xDEDD, 0x775B, 0xB7FA, + 0x775C, 0xB843, 0x775E, 0xB7FD, 0x775F, 0xDED9, 0x7760, 0xDEDA, + 0x7761, 0xBACE, 0x7762, 0xB846, 0x7763, 0xB7FE, 0x7765, 0xB844, + 0x7766, 0xB7FC, 0x7767, 0xDEDF, 0x7768, 0xB845, 0x7769, 0xDEDE, + 0x776A, 0xB841, 0x776B, 0xB7FB, 0x776C, 0xB842, 0x776D, 0xDEE2, + 0x776E, 0xE2E6, 0x776F, 0xE2E8, 0x7779, 0xB840, 0x777C, 0xE2E3, + 0x777D, 0xBACC, 0x777E, 0xE2E9, 0x777F, 0xBACD, 0x7780, 0xE2E7, + 0x7781, 0xE2E2, 0x7782, 0xE2E5, 0x7783, 0xE2EA, 0x7784, 0xBACB, + 0x7785, 0xE2E4, 0x7787, 0xBD4E, 0x7788, 0xE6BF, 0x7789, 0xE6BE, + 0x778B, 0xBD51, 0x778C, 0xBD4F, 0x778D, 0xE6BC, 0x778E, 0xBD4D, + 0x778F, 0xE6BD, 0x7791, 0xBD50, 0x7795, 0xEA7D, 0x7797, 0xEAA1, + 0x7799, 0xEA7E, 0x779A, 0xEA76, 0x779B, 0xEA7A, 0x779C, 0xEA79, + 0x779D, 0xEA77, 0x779E, 0xBF66, 0x779F, 0xBF67, 0x77A0, 0xBF65, + 0x77A1, 0xEA78, 0x77A2, 0xEA7B, 0x77A3, 0xEA7C, 0x77A5, 0xBF68, + 0x77A7, 0xC140, 0x77A8, 0xEDA3, 0x77AA, 0xC0FC, 0x77AB, 0xED7B, + 0x77AC, 0xC0FE, 0x77AD, 0xC141, 0x77B0, 0xC0FD, 0x77B1, 0xEDA2, + 0x77B2, 0xED7C, 0x77B3, 0xC0FB, 0x77B4, 0xEDA1, 0x77B5, 0xED7A, + 0x77B6, 0xED7E, 0x77B7, 0xED7D, 0x77BA, 0xF055, 0x77BB, 0xC2A4, + 0x77BC, 0xC2A5, 0x77BD, 0xC2A2, 0x77BF, 0xC2A3, 0x77C2, 0xF054, + 0x77C4, 0xF27B, 0x77C7, 0xC3A9, 0x77C9, 0xF279, 0x77CA, 0xF27A, + 0x77CC, 0xF474, 0x77CD, 0xF477, 0x77CE, 0xF475, 0x77CF, 0xF476, + 0x77D0, 0xF5E0, 0x77D3, 0xC4EF, 0x77D4, 0xF7EB, 0x77D5, 0xF8B4, + 0x77D7, 0xC5F7, 0x77D8, 0xF8F8, 0x77D9, 0xF8F9, 0x77DA, 0xC666, + 0x77DB, 0xA5D9, 0x77DC, 0xACE1, 0x77DE, 0xDAC3, 0x77E0, 0xDEE3, + 0x77E2, 0xA5DA, 0x77E3, 0xA86F, 0x77E5, 0xAABE, 0x77E7, 0xCFE8, + 0x77E8, 0xCFE9, 0x77E9, 0xAF78, 0x77EC, 0xDAC4, 0x77ED, 0xB575, + 0x77EE, 0xB847, 0x77EF, 0xC142, 0x77F0, 0xEDA4, 0x77F1, 0xF27C, + 0x77F2, 0xF478, 0x77F3, 0xA5DB, 0x77F7, 0xCDA1, 0x77F8, 0xCD7A, + 0x77F9, 0xCD7C, 0x77FA, 0xCD7E, 0x77FB, 0xCD7D, 0x77FC, 0xCD7B, + 0x77FD, 0xAABF, 0x7802, 0xACE2, 0x7803, 0xCFF2, 0x7805, 0xCFED, + 0x7806, 0xCFEA, 0x7809, 0xCFF1, 0x780C, 0xACE4, 0x780D, 0xACE5, + 0x780E, 0xCFF0, 0x780F, 0xCFEF, 0x7810, 0xCFEE, 0x7811, 0xCFEB, + 0x7812, 0xCFEC, 0x7813, 0xCFF3, 0x7814, 0xACE3, 0x781D, 0xAF7C, + 0x781F, 0xAFA4, 0x7820, 0xAFA3, 0x7821, 0xD2E1, 0x7822, 0xD2DB, + 0x7823, 0xD2D9, 0x7825, 0xAFA1, 0x7826, 0xD6B9, 0x7827, 0xAF7A, + 0x7828, 0xD2DE, 0x7829, 0xD2E2, 0x782A, 0xD2E4, 0x782B, 0xD2E0, + 0x782C, 0xD2DA, 0x782D, 0xAFA2, 0x782E, 0xD2DF, 0x782F, 0xD2DD, + 0x7830, 0xAF79, 0x7831, 0xD2E5, 0x7832, 0xAFA5, 0x7833, 0xD2E3, + 0x7834, 0xAF7D, 0x7835, 0xD2DC, 0x7837, 0xAF7E, 0x7838, 0xAF7B, + 0x7843, 0xB2B9, 0x7845, 0xD6BA, 0x7848, 0xD6B3, 0x7849, 0xD6B5, + 0x784A, 0xD6B7, 0x784C, 0xD6B8, 0x784D, 0xD6B6, 0x784E, 0xB2BA, + 0x7850, 0xD6BB, 0x7852, 0xD6B4, 0x785C, 0xDAC8, 0x785D, 0xB576, + 0x785E, 0xDAD0, 0x7860, 0xDAC5, 0x7862, 0xDAD1, 0x7864, 0xDAC6, + 0x7865, 0xDAC7, 0x7868, 0xDACF, 0x7869, 0xDACE, 0x786A, 0xDACB, + 0x786B, 0xB2B8, 0x786C, 0xB577, 0x786D, 0xDAC9, 0x786E, 0xDACC, + 0x786F, 0xB578, 0x7870, 0xDACD, 0x7871, 0xDACA, 0x7879, 0xDEEE, + 0x787B, 0xDEF2, 0x787C, 0xB84E, 0x787E, 0xE2F0, 0x787F, 0xB851, + 0x7880, 0xDEF0, 0x7881, 0xF9D6, 0x7883, 0xDEED, 0x7884, 0xDEE8, + 0x7885, 0xDEEA, 0x7886, 0xDEEB, 0x7887, 0xDEE4, 0x7889, 0xB84D, + 0x788C, 0xB84C, 0x788E, 0xB848, 0x788F, 0xDEE7, 0x7891, 0xB84F, + 0x7893, 0xB850, 0x7894, 0xDEE6, 0x7895, 0xDEE9, 0x7896, 0xDEF1, + 0x7897, 0xB84A, 0x7898, 0xB84B, 0x7899, 0xDEEF, 0x789A, 0xDEE5, + 0x789E, 0xE2F2, 0x789F, 0xBAD0, 0x78A0, 0xE2F4, 0x78A1, 0xDEEC, + 0x78A2, 0xE2F6, 0x78A3, 0xBAD4, 0x78A4, 0xE2F7, 0x78A5, 0xE2F3, + 0x78A7, 0xBAD1, 0x78A8, 0xE2EF, 0x78A9, 0xBAD3, 0x78AA, 0xE2EC, + 0x78AB, 0xE2F1, 0x78AC, 0xE2F5, 0x78AD, 0xE2EE, 0x78B0, 0xB849, + 0x78B2, 0xE2EB, 0x78B3, 0xBAD2, 0x78B4, 0xE2ED, 0x78BA, 0xBD54, + 0x78BB, 0xE6C1, 0x78BC, 0xBD58, 0x78BE, 0xBD56, 0x78C1, 0xBACF, + 0x78C3, 0xE6C8, 0x78C4, 0xE6C9, 0x78C5, 0xBD53, 0x78C8, 0xE6C7, + 0x78C9, 0xE6CA, 0x78CA, 0xBD55, 0x78CB, 0xBD52, 0x78CC, 0xE6C3, + 0x78CD, 0xE6C0, 0x78CE, 0xE6C5, 0x78CF, 0xE6C2, 0x78D0, 0xBD59, + 0x78D1, 0xE6C4, 0x78D4, 0xE6C6, 0x78D5, 0xBD57, 0x78DA, 0xBF6A, + 0x78DB, 0xEAA8, 0x78DD, 0xEAA2, 0x78DE, 0xEAA6, 0x78DF, 0xEAAC, + 0x78E0, 0xEAAD, 0x78E1, 0xEAA9, 0x78E2, 0xEAAA, 0x78E3, 0xEAA7, + 0x78E5, 0xEAA4, 0x78E7, 0xBF6C, 0x78E8, 0xBF69, 0x78E9, 0xEAA3, + 0x78EA, 0xEAA5, 0x78EC, 0xBF6B, 0x78ED, 0xEAAB, 0x78EF, 0xC146, + 0x78F2, 0xEDAA, 0x78F3, 0xEDA5, 0x78F4, 0xC145, 0x78F7, 0xC143, + 0x78F9, 0xEDAC, 0x78FA, 0xC144, 0x78FB, 0xEDA8, 0x78FC, 0xEDA9, + 0x78FD, 0xEDA6, 0x78FE, 0xEDAD, 0x78FF, 0xF056, 0x7901, 0xC147, + 0x7902, 0xEDA7, 0x7904, 0xEDAE, 0x7905, 0xEDAB, 0x7909, 0xF05A, + 0x790C, 0xF057, 0x790E, 0xC2A6, 0x7910, 0xF05B, 0x7911, 0xF05D, + 0x7912, 0xF05C, 0x7913, 0xF058, 0x7914, 0xF059, 0x7917, 0xF2A3, + 0x7919, 0xC3AA, 0x791B, 0xF27E, 0x791C, 0xF2A2, 0x791D, 0xF27D, + 0x791E, 0xF2A4, 0x7921, 0xF2A1, 0x7923, 0xF47A, 0x7924, 0xF47D, + 0x7925, 0xF479, 0x7926, 0xC471, 0x7927, 0xF47B, 0x7928, 0xF47C, + 0x7929, 0xF47E, 0x792A, 0xC472, 0x792B, 0xC474, 0x792C, 0xC473, + 0x792D, 0xF5E1, 0x792F, 0xF5E3, 0x7931, 0xF5E2, 0x7935, 0xF6F6, + 0x7938, 0xF8B5, 0x7939, 0xF8FA, 0x793A, 0xA5DC, 0x793D, 0xCB72, + 0x793E, 0xAAC0, 0x793F, 0xCDA3, 0x7940, 0xAAC1, 0x7941, 0xAAC2, + 0x7942, 0xCDA2, 0x7944, 0xCFF8, 0x7945, 0xCFF7, 0x7946, 0xACE6, + 0x7947, 0xACE9, 0x7948, 0xACE8, 0x7949, 0xACE7, 0x794A, 0xCFF4, + 0x794B, 0xCFF6, 0x794C, 0xCFF5, 0x794F, 0xD2E8, 0x7950, 0xAFA7, + 0x7951, 0xD2EC, 0x7952, 0xD2EB, 0x7953, 0xD2EA, 0x7954, 0xD2E6, + 0x7955, 0xAFA6, 0x7956, 0xAFAA, 0x7957, 0xAFAD, 0x795A, 0xAFAE, + 0x795B, 0xD2E7, 0x795C, 0xD2E9, 0x795D, 0xAFAC, 0x795E, 0xAFAB, + 0x795F, 0xAFA9, 0x7960, 0xAFA8, 0x7961, 0xD6C2, 0x7963, 0xD6C0, + 0x7964, 0xD6BC, 0x7965, 0xB2BB, 0x7967, 0xD6BD, 0x7968, 0xB2BC, + 0x7969, 0xD6BE, 0x796A, 0xD6BF, 0x796B, 0xD6C1, 0x796D, 0xB2BD, + 0x7970, 0xDAD5, 0x7972, 0xDAD4, 0x7973, 0xDAD3, 0x7974, 0xDAD2, + 0x7979, 0xDEF6, 0x797A, 0xB852, 0x797C, 0xDEF3, 0x797D, 0xDEF5, + 0x797F, 0xB853, 0x7981, 0xB854, 0x7982, 0xDEF4, 0x7988, 0xE341, + 0x798A, 0xE2F9, 0x798B, 0xE2FA, 0x798D, 0xBAD7, 0x798E, 0xBAD5, + 0x798F, 0xBAD6, 0x7990, 0xE343, 0x7992, 0xE342, 0x7993, 0xE2FE, + 0x7994, 0xE2FD, 0x7995, 0xE2FC, 0x7996, 0xE2FB, 0x7997, 0xE340, + 0x7998, 0xE2F8, 0x799A, 0xE6CB, 0x799B, 0xE6D0, 0x799C, 0xE6CE, + 0x79A0, 0xE6CD, 0x79A1, 0xE6CC, 0x79A2, 0xE6CF, 0x79A4, 0xEAAE, + 0x79A6, 0xBF6D, 0x79A7, 0xC148, 0x79A8, 0xEDB0, 0x79AA, 0xC149, + 0x79AB, 0xEDAF, 0x79AC, 0xF05F, 0x79AD, 0xF05E, 0x79AE, 0xC2A7, + 0x79B0, 0xF2A5, 0x79B1, 0xC3AB, 0x79B2, 0xF4A1, 0x79B3, 0xC5A1, + 0x79B4, 0xF6F7, 0x79B6, 0xF8B7, 0x79B7, 0xF8B6, 0x79B8, 0xC9A8, + 0x79B9, 0xACEA, 0x79BA, 0xACEB, 0x79BB, 0xD6C3, 0x79BD, 0xB856, + 0x79BE, 0xA5DD, 0x79BF, 0xA872, 0x79C0, 0xA871, 0x79C1, 0xA870, + 0x79C5, 0xCDA4, 0x79C8, 0xAAC4, 0x79C9, 0xAAC3, 0x79CB, 0xACEE, + 0x79CD, 0xCFFA, 0x79CE, 0xCFFD, 0x79CF, 0xCFFB, 0x79D1, 0xACEC, + 0x79D2, 0xACED, 0x79D5, 0xCFF9, 0x79D6, 0xCFFC, 0x79D8, 0xAFB5, + 0x79DC, 0xD2F3, 0x79DD, 0xD2F5, 0x79DE, 0xD2F4, 0x79DF, 0xAFB2, + 0x79E0, 0xD2EF, 0x79E3, 0xAFB0, 0x79E4, 0xAFAF, 0x79E6, 0xAFB3, + 0x79E7, 0xAFB1, 0x79E9, 0xAFB4, 0x79EA, 0xD2F2, 0x79EB, 0xD2ED, + 0x79EC, 0xD2EE, 0x79ED, 0xD2F1, 0x79EE, 0xD2F0, 0x79F6, 0xD6C6, + 0x79F7, 0xD6C7, 0x79F8, 0xD6C5, 0x79FA, 0xD6C4, 0x79FB, 0xB2BE, + 0x7A00, 0xB57D, 0x7A02, 0xDAD6, 0x7A03, 0xDAD8, 0x7A04, 0xDADA, + 0x7A05, 0xB57C, 0x7A08, 0xB57A, 0x7A0A, 0xDAD7, 0x7A0B, 0xB57B, + 0x7A0C, 0xDAD9, 0x7A0D, 0xB579, 0x7A10, 0xDF41, 0x7A11, 0xDEF7, + 0x7A12, 0xDEFA, 0x7A13, 0xDEFE, 0x7A14, 0xB85A, 0x7A15, 0xDEFC, + 0x7A17, 0xDEFB, 0x7A18, 0xDEF8, 0x7A19, 0xDEF9, 0x7A1A, 0xB858, + 0x7A1B, 0xDF40, 0x7A1C, 0xB857, 0x7A1E, 0xB85C, 0x7A1F, 0xB85B, + 0x7A20, 0xB859, 0x7A22, 0xDEFD, 0x7A26, 0xE349, 0x7A28, 0xE348, + 0x7A2B, 0xE344, 0x7A2E, 0xBAD8, 0x7A2F, 0xE347, 0x7A30, 0xE346, + 0x7A31, 0xBAD9, 0x7A37, 0xBD5E, 0x7A39, 0xE6D2, 0x7A3B, 0xBD5F, + 0x7A3C, 0xBD5B, 0x7A3D, 0xBD5D, 0x7A3F, 0xBD5A, 0x7A40, 0xBD5C, + 0x7A44, 0xEAAF, 0x7A46, 0xBF70, 0x7A47, 0xEAB1, 0x7A48, 0xEAB0, + 0x7A4A, 0xE345, 0x7A4B, 0xBF72, 0x7A4C, 0xBF71, 0x7A4D, 0xBF6E, + 0x7A4E, 0xBF6F, 0x7A54, 0xEDB5, 0x7A56, 0xEDB3, 0x7A57, 0xC14A, + 0x7A58, 0xEDB4, 0x7A5A, 0xEDB6, 0x7A5B, 0xEDB2, 0x7A5C, 0xEDB1, + 0x7A5F, 0xF060, 0x7A60, 0xC2AA, 0x7A61, 0xC2A8, 0x7A62, 0xC2A9, + 0x7A67, 0xF2A6, 0x7A68, 0xF2A7, 0x7A69, 0xC3AD, 0x7A6B, 0xC3AC, + 0x7A6C, 0xF4A3, 0x7A6D, 0xF4A4, 0x7A6E, 0xF4A2, 0x7A70, 0xF6F8, + 0x7A71, 0xF6F9, 0x7A74, 0xA5DE, 0x7A75, 0xCA48, 0x7A76, 0xA873, + 0x7A78, 0xCDA5, 0x7A79, 0xAAC6, 0x7A7A, 0xAAC5, 0x7A7B, 0xCDA6, + 0x7A7E, 0xD040, 0x7A7F, 0xACEF, 0x7A80, 0xCFFE, 0x7A81, 0xACF0, + 0x7A84, 0xAFB6, 0x7A85, 0xD2F8, 0x7A86, 0xD2F6, 0x7A87, 0xD2FC, + 0x7A88, 0xAFB7, 0x7A89, 0xD2F7, 0x7A8A, 0xD2FB, 0x7A8B, 0xD2F9, + 0x7A8C, 0xD2FA, 0x7A8F, 0xD6C8, 0x7A90, 0xD6CA, 0x7A92, 0xB2BF, + 0x7A94, 0xD6C9, 0x7A95, 0xB2C0, 0x7A96, 0xB5A2, 0x7A97, 0xB5A1, + 0x7A98, 0xB57E, 0x7A99, 0xDADB, 0x7A9E, 0xDF44, 0x7A9F, 0xB85D, + 0x7AA0, 0xB85E, 0x7AA2, 0xDF43, 0x7AA3, 0xDF42, 0x7AA8, 0xE34A, + 0x7AA9, 0xBADB, 0x7AAA, 0xBADA, 0x7AAB, 0xE34B, 0x7AAC, 0xE34C, + 0x7AAE, 0xBD61, 0x7AAF, 0xBD60, 0x7AB1, 0xEAB5, 0x7AB2, 0xE6D3, + 0x7AB3, 0xE6D5, 0x7AB4, 0xE6D4, 0x7AB5, 0xEAB4, 0x7AB6, 0xEAB2, + 0x7AB7, 0xEAB6, 0x7AB8, 0xEAB3, 0x7ABA, 0xBF73, 0x7ABE, 0xEDB7, + 0x7ABF, 0xC14B, 0x7AC0, 0xEDB8, 0x7AC1, 0xEDB9, 0x7AC4, 0xC2AB, + 0x7AC5, 0xC2AC, 0x7AC7, 0xC475, 0x7ACA, 0xC5D1, 0x7ACB, 0xA5DF, + 0x7AD1, 0xD041, 0x7AD8, 0xD2FD, 0x7AD9, 0xAFB8, 0x7ADF, 0xB3BA, + 0x7AE0, 0xB3B9, 0x7AE3, 0xB5A4, 0x7AE4, 0xDADD, 0x7AE5, 0xB5A3, + 0x7AE6, 0xDADC, 0x7AEB, 0xDF45, 0x7AED, 0xBADC, 0x7AEE, 0xE34D, + 0x7AEF, 0xBADD, 0x7AF6, 0xC476, 0x7AF7, 0xF4A5, 0x7AF9, 0xA6CB, + 0x7AFA, 0xAAC7, 0x7AFB, 0xCDA7, 0x7AFD, 0xACF2, 0x7AFF, 0xACF1, + 0x7B00, 0xD042, 0x7B01, 0xD043, 0x7B04, 0xD340, 0x7B05, 0xD342, + 0x7B06, 0xAFB9, 0x7B08, 0xD344, 0x7B09, 0xD347, 0x7B0A, 0xD345, + 0x7B0E, 0xD346, 0x7B0F, 0xD343, 0x7B10, 0xD2FE, 0x7B11, 0xAFBA, + 0x7B12, 0xD348, 0x7B13, 0xD341, 0x7B18, 0xD6D3, 0x7B19, 0xB2C6, + 0x7B1A, 0xD6DC, 0x7B1B, 0xB2C3, 0x7B1D, 0xD6D5, 0x7B1E, 0xB2C7, + 0x7B20, 0xB2C1, 0x7B22, 0xD6D0, 0x7B23, 0xD6DD, 0x7B24, 0xD6D1, + 0x7B25, 0xD6CE, 0x7B26, 0xB2C5, 0x7B28, 0xB2C2, 0x7B2A, 0xD6D4, + 0x7B2B, 0xD6D7, 0x7B2C, 0xB2C4, 0x7B2D, 0xD6D8, 0x7B2E, 0xB2C8, + 0x7B2F, 0xD6D9, 0x7B30, 0xD6CF, 0x7B31, 0xD6D6, 0x7B32, 0xD6DA, + 0x7B33, 0xD6D2, 0x7B34, 0xD6CD, 0x7B35, 0xD6CB, 0x7B38, 0xD6DB, + 0x7B3B, 0xDADF, 0x7B40, 0xDAE4, 0x7B44, 0xDAE0, 0x7B45, 0xDAE6, + 0x7B46, 0xB5A7, 0x7B47, 0xD6CC, 0x7B48, 0xDAE1, 0x7B49, 0xB5A5, + 0x7B4A, 0xDADE, 0x7B4B, 0xB5AC, 0x7B4C, 0xDAE2, 0x7B4D, 0xB5AB, + 0x7B4E, 0xDAE3, 0x7B4F, 0xB5AD, 0x7B50, 0xB5A8, 0x7B51, 0xB5AE, + 0x7B52, 0xB5A9, 0x7B54, 0xB5AA, 0x7B56, 0xB5A6, 0x7B58, 0xDAE5, + 0x7B60, 0xB861, 0x7B61, 0xDF50, 0x7B63, 0xDF53, 0x7B64, 0xDF47, + 0x7B65, 0xDF4C, 0x7B66, 0xDF46, 0x7B67, 0xB863, 0x7B69, 0xDF4A, + 0x7B6D, 0xDF48, 0x7B6E, 0xB862, 0x7B70, 0xDF4F, 0x7B71, 0xDF4E, + 0x7B72, 0xDF4B, 0x7B73, 0xDF4D, 0x7B74, 0xDF49, 0x7B75, 0xBAE1, + 0x7B76, 0xDF52, 0x7B77, 0xB85F, 0x7B78, 0xDF51, 0x7B82, 0xE35D, + 0x7B84, 0xBAE8, 0x7B85, 0xE358, 0x7B87, 0xBAE7, 0x7B88, 0xE34E, + 0x7B8A, 0xE350, 0x7B8B, 0xBAE0, 0x7B8C, 0xE355, 0x7B8D, 0xE354, + 0x7B8E, 0xE357, 0x7B8F, 0xBAE5, 0x7B90, 0xE352, 0x7B91, 0xE351, + 0x7B94, 0xBAE4, 0x7B95, 0xBADF, 0x7B96, 0xE353, 0x7B97, 0xBAE2, + 0x7B98, 0xE359, 0x7B99, 0xE35B, 0x7B9B, 0xE356, 0x7B9C, 0xE34F, + 0x7B9D, 0xBAE3, 0x7BA0, 0xBD69, 0x7BA1, 0xBADE, 0x7BA4, 0xE35C, + 0x7BAC, 0xE6D9, 0x7BAD, 0xBD62, 0x7BAF, 0xE6DB, 0x7BB1, 0xBD63, + 0x7BB4, 0xBD65, 0x7BB5, 0xE6DE, 0x7BB7, 0xE6D6, 0x7BB8, 0xBAE6, + 0x7BB9, 0xE6DC, 0x7BBE, 0xE6D8, 0x7BC0, 0xB860, 0x7BC1, 0xBD68, + 0x7BC4, 0xBD64, 0x7BC6, 0xBD66, 0x7BC7, 0xBD67, 0x7BC9, 0xBF76, + 0x7BCA, 0xE6DD, 0x7BCB, 0xE6D7, 0x7BCC, 0xBD6A, 0x7BCE, 0xE6DA, + 0x7BD4, 0xEAC0, 0x7BD5, 0xEABB, 0x7BD8, 0xEAC5, 0x7BD9, 0xBF74, + 0x7BDA, 0xEABD, 0x7BDB, 0xBF78, 0x7BDC, 0xEAC3, 0x7BDD, 0xEABA, + 0x7BDE, 0xEAB7, 0x7BDF, 0xEAC6, 0x7BE0, 0xC151, 0x7BE1, 0xBF79, + 0x7BE2, 0xEAC2, 0x7BE3, 0xEAB8, 0x7BE4, 0xBF77, 0x7BE5, 0xEABC, + 0x7BE6, 0xBF7B, 0x7BE7, 0xEAB9, 0x7BE8, 0xEABE, 0x7BE9, 0xBF7A, + 0x7BEA, 0xEAC1, 0x7BEB, 0xEAC4, 0x7BF0, 0xEDCB, 0x7BF1, 0xEDCC, + 0x7BF2, 0xEDBC, 0x7BF3, 0xEDC3, 0x7BF4, 0xEDC1, 0x7BF7, 0xC14F, + 0x7BF8, 0xEDC8, 0x7BF9, 0xEABF, 0x7BFB, 0xEDBF, 0x7BFD, 0xEDC9, + 0x7BFE, 0xC14E, 0x7BFF, 0xEDBE, 0x7C00, 0xEDBD, 0x7C01, 0xEDC7, + 0x7C02, 0xEDC4, 0x7C03, 0xEDC6, 0x7C05, 0xEDBA, 0x7C06, 0xEDCA, + 0x7C07, 0xC14C, 0x7C09, 0xEDC5, 0x7C0A, 0xEDCE, 0x7C0B, 0xEDC2, + 0x7C0C, 0xC150, 0x7C0D, 0xC14D, 0x7C0E, 0xEDC0, 0x7C0F, 0xEDBB, + 0x7C10, 0xEDCD, 0x7C11, 0xBF75, 0x7C19, 0xF063, 0x7C1C, 0xF061, + 0x7C1D, 0xF067, 0x7C1E, 0xC2B0, 0x7C1F, 0xF065, 0x7C20, 0xF064, + 0x7C21, 0xC2B2, 0x7C22, 0xF06A, 0x7C23, 0xC2B1, 0x7C25, 0xF06B, + 0x7C26, 0xF068, 0x7C27, 0xC2AE, 0x7C28, 0xF069, 0x7C29, 0xF062, + 0x7C2A, 0xC2AF, 0x7C2B, 0xC2AD, 0x7C2C, 0xF2AB, 0x7C2D, 0xF066, + 0x7C30, 0xF06C, 0x7C33, 0xF2A8, 0x7C37, 0xC3B2, 0x7C38, 0xC3B0, + 0x7C39, 0xF2AA, 0x7C3B, 0xF2AC, 0x7C3C, 0xF2A9, 0x7C3D, 0xC3B1, + 0x7C3E, 0xC3AE, 0x7C3F, 0xC3AF, 0x7C40, 0xC3B3, 0x7C43, 0xC478, + 0x7C45, 0xF4AA, 0x7C47, 0xF4A9, 0x7C48, 0xF4A7, 0x7C49, 0xF4A6, + 0x7C4A, 0xF4A8, 0x7C4C, 0xC477, 0x7C4D, 0xC479, 0x7C50, 0xC4F0, + 0x7C53, 0xF5E5, 0x7C54, 0xF5E4, 0x7C57, 0xF6FA, 0x7C59, 0xF6FC, + 0x7C5A, 0xF6FE, 0x7C5B, 0xF6FD, 0x7C5C, 0xF6FB, 0x7C5F, 0xC5A3, + 0x7C60, 0xC5A2, 0x7C63, 0xC5D3, 0x7C64, 0xC5D2, 0x7C65, 0xC5D4, + 0x7C66, 0xF7ED, 0x7C67, 0xF7EC, 0x7C69, 0xF8FB, 0x7C6A, 0xF8B8, + 0x7C6B, 0xF8FC, 0x7C6C, 0xC658, 0x7C6E, 0xC659, 0x7C6F, 0xF96D, + 0x7C72, 0xC67E, 0x7C73, 0xA6CC, 0x7C75, 0xCDA8, 0x7C78, 0xD045, + 0x7C79, 0xD046, 0x7C7A, 0xD044, 0x7C7D, 0xACF3, 0x7C7F, 0xD047, + 0x7C80, 0xD048, 0x7C81, 0xD049, 0x7C84, 0xD349, 0x7C85, 0xD34F, + 0x7C88, 0xD34D, 0x7C89, 0xAFBB, 0x7C8A, 0xD34B, 0x7C8C, 0xD34C, + 0x7C8D, 0xD34E, 0x7C91, 0xD34A, 0x7C92, 0xB2C9, 0x7C94, 0xD6DE, + 0x7C95, 0xB2CB, 0x7C96, 0xD6E0, 0x7C97, 0xB2CA, 0x7C98, 0xD6DF, + 0x7C9E, 0xDAE8, 0x7C9F, 0xB5AF, 0x7CA1, 0xDAEA, 0x7CA2, 0xDAE7, + 0x7CA3, 0xD6E1, 0x7CA5, 0xB5B0, 0x7CA7, 0xF9DB, 0x7CA8, 0xDAE9, + 0x7CAF, 0xDF56, 0x7CB1, 0xB864, 0x7CB2, 0xDF54, 0x7CB3, 0xB865, + 0x7CB4, 0xDF55, 0x7CB5, 0xB866, 0x7CB9, 0xBAE9, 0x7CBA, 0xE361, + 0x7CBB, 0xE35E, 0x7CBC, 0xE360, 0x7CBD, 0xBAEA, 0x7CBE, 0xBAEB, + 0x7CBF, 0xE35F, 0x7CC5, 0xE6DF, 0x7CC8, 0xE6E0, 0x7CCA, 0xBD6B, + 0x7CCB, 0xE6E2, 0x7CCC, 0xE6E1, 0x7CCE, 0xA261, 0x7CD0, 0xEACA, + 0x7CD1, 0xEACB, 0x7CD2, 0xEAC7, 0x7CD4, 0xEAC8, 0x7CD5, 0xBF7C, + 0x7CD6, 0xBF7D, 0x7CD7, 0xEAC9, 0x7CD9, 0xC157, 0x7CDC, 0xC153, + 0x7CDD, 0xC158, 0x7CDE, 0xC154, 0x7CDF, 0xC156, 0x7CE0, 0xC152, + 0x7CE2, 0xC155, 0x7CE7, 0xC2B3, 0x7CE8, 0xEDCF, 0x7CEA, 0xF2AE, + 0x7CEC, 0xF2AD, 0x7CEE, 0xF4AB, 0x7CEF, 0xC47A, 0x7CF0, 0xC47B, + 0x7CF1, 0xF741, 0x7CF2, 0xF5E6, 0x7CF4, 0xF740, 0x7CF6, 0xF8FD, + 0x7CF7, 0xF9A4, 0x7CF8, 0xA6CD, 0x7CFB, 0xA874, 0x7CFD, 0xCDA9, + 0x7CFE, 0xAAC8, 0x7D00, 0xACF6, 0x7D01, 0xD04C, 0x7D02, 0xACF4, + 0x7D03, 0xD04A, 0x7D04, 0xACF9, 0x7D05, 0xACF5, 0x7D06, 0xACFA, + 0x7D07, 0xACF8, 0x7D08, 0xD04B, 0x7D09, 0xACF7, 0x7D0A, 0xAFBF, + 0x7D0B, 0xAFBE, 0x7D0C, 0xD35A, 0x7D0D, 0xAFC7, 0x7D0E, 0xD353, + 0x7D0F, 0xD359, 0x7D10, 0xAFC3, 0x7D11, 0xD352, 0x7D12, 0xD358, + 0x7D13, 0xD356, 0x7D14, 0xAFC2, 0x7D15, 0xAFC4, 0x7D16, 0xD355, + 0x7D17, 0xAFBD, 0x7D18, 0xD354, 0x7D19, 0xAFC8, 0x7D1A, 0xAFC5, + 0x7D1B, 0xAFC9, 0x7D1C, 0xAFC6, 0x7D1D, 0xD351, 0x7D1E, 0xD350, + 0x7D1F, 0xD357, 0x7D20, 0xAFC0, 0x7D21, 0xAFBC, 0x7D22, 0xAFC1, + 0x7D28, 0xD6F0, 0x7D29, 0xD6E9, 0x7D2B, 0xB5B5, 0x7D2C, 0xD6E8, + 0x7D2E, 0xB2CF, 0x7D2F, 0xB2D6, 0x7D30, 0xB2D3, 0x7D31, 0xB2D9, + 0x7D32, 0xB2D8, 0x7D33, 0xB2D4, 0x7D35, 0xD6E2, 0x7D36, 0xD6E5, + 0x7D38, 0xD6E4, 0x7D39, 0xB2D0, 0x7D3A, 0xD6E6, 0x7D3B, 0xD6EF, + 0x7D3C, 0xB2D1, 0x7D3D, 0xD6E3, 0x7D3E, 0xD6EC, 0x7D3F, 0xD6ED, + 0x7D40, 0xB2D2, 0x7D41, 0xD6EA, 0x7D42, 0xB2D7, 0x7D43, 0xB2CD, + 0x7D44, 0xB2D5, 0x7D45, 0xD6E7, 0x7D46, 0xB2CC, 0x7D47, 0xD6EB, + 0x7D4A, 0xD6EE, 0x7D4E, 0xDAFB, 0x7D4F, 0xDAF2, 0x7D50, 0xB5B2, + 0x7D51, 0xDAF9, 0x7D52, 0xDAF6, 0x7D53, 0xDAEE, 0x7D54, 0xDAF7, + 0x7D55, 0xB5B4, 0x7D56, 0xDAEF, 0x7D58, 0xDAEB, 0x7D5B, 0xB86C, + 0x7D5C, 0xDAF4, 0x7D5E, 0xB5B1, 0x7D5F, 0xDAFA, 0x7D61, 0xB5B8, + 0x7D62, 0xB5BA, 0x7D63, 0xDAED, 0x7D66, 0xB5B9, 0x7D67, 0xDAF0, + 0x7D68, 0xB5B3, 0x7D69, 0xDAF8, 0x7D6A, 0xDAF1, 0x7D6B, 0xDAF5, + 0x7D6D, 0xDAF3, 0x7D6E, 0xB5B6, 0x7D6F, 0xDAEC, 0x7D70, 0xB5BB, + 0x7D71, 0xB2CE, 0x7D72, 0xB5B7, 0x7D73, 0xB5BC, 0x7D79, 0xB868, + 0x7D7A, 0xDF5D, 0x7D7B, 0xDF5F, 0x7D7C, 0xDF61, 0x7D7D, 0xDF65, + 0x7D7F, 0xDF5B, 0x7D80, 0xDF59, 0x7D81, 0xB86A, 0x7D83, 0xDF60, + 0x7D84, 0xDF64, 0x7D85, 0xDF5C, 0x7D86, 0xDF58, 0x7D88, 0xDF57, + 0x7D8C, 0xDF62, 0x7D8D, 0xDF5A, 0x7D8E, 0xDF5E, 0x7D8F, 0xB86B, + 0x7D91, 0xB869, 0x7D92, 0xDF66, 0x7D93, 0xB867, 0x7D94, 0xDF63, + 0x7D96, 0xE372, 0x7D9C, 0xBAEE, 0x7D9D, 0xE36A, 0x7D9E, 0xBD78, + 0x7D9F, 0xE374, 0x7DA0, 0xBAF1, 0x7DA1, 0xE378, 0x7DA2, 0xBAF7, + 0x7DA3, 0xE365, 0x7DA6, 0xE375, 0x7DA7, 0xE362, 0x7DA9, 0xE377, + 0x7DAA, 0xE366, 0x7DAC, 0xBAFE, 0x7DAD, 0xBAFB, 0x7DAE, 0xE376, + 0x7DAF, 0xE370, 0x7DB0, 0xBAED, 0x7DB1, 0xBAF5, 0x7DB2, 0xBAF4, + 0x7DB4, 0xBAF3, 0x7DB5, 0xBAF9, 0x7DB7, 0xE363, 0x7DB8, 0xBAFA, + 0x7DB9, 0xE371, 0x7DBA, 0xBAF6, 0x7DBB, 0xBAEC, 0x7DBC, 0xE373, + 0x7DBD, 0xBAEF, 0x7DBE, 0xBAF0, 0x7DBF, 0xBAF8, 0x7DC0, 0xE368, + 0x7DC1, 0xE367, 0x7DC2, 0xE364, 0x7DC4, 0xE36C, 0x7DC5, 0xE369, + 0x7DC6, 0xE36D, 0x7DC7, 0xBAFD, 0x7DC9, 0xE379, 0x7DCA, 0xBAF2, + 0x7DCB, 0xE36E, 0x7DCC, 0xE36F, 0x7DCE, 0xE36B, 0x7DD2, 0xBAFC, + 0x7DD7, 0xE6E7, 0x7DD8, 0xBD70, 0x7DD9, 0xBD79, 0x7DDA, 0xBD75, + 0x7DDB, 0xE6E4, 0x7DDD, 0xBD72, 0x7DDE, 0xBD76, 0x7DDF, 0xE6F0, + 0x7DE0, 0xBD6C, 0x7DE1, 0xE6E8, 0x7DE3, 0xBD74, 0x7DE6, 0xE6EB, + 0x7DE7, 0xE6E6, 0x7DE8, 0xBD73, 0x7DE9, 0xBD77, 0x7DEA, 0xE6E5, + 0x7DEC, 0xBD71, 0x7DEE, 0xE6EF, 0x7DEF, 0xBD6E, 0x7DF0, 0xE6EE, + 0x7DF1, 0xE6ED, 0x7DF2, 0xBD7A, 0x7DF3, 0xE572, 0x7DF4, 0xBD6D, + 0x7DF6, 0xE6EC, 0x7DF7, 0xE6E3, 0x7DF9, 0xBD7B, 0x7DFA, 0xE6EA, + 0x7DFB, 0xBD6F, 0x7E03, 0xE6E9, 0x7E08, 0xBFA2, 0x7E09, 0xBFA7, + 0x7E0A, 0xBF7E, 0x7E0B, 0xEAD8, 0x7E0C, 0xEACF, 0x7E0D, 0xEADB, + 0x7E0E, 0xEAD3, 0x7E0F, 0xEAD9, 0x7E10, 0xBFA8, 0x7E11, 0xBFA1, + 0x7E12, 0xEACC, 0x7E13, 0xEAD2, 0x7E14, 0xEADC, 0x7E15, 0xEAD5, + 0x7E16, 0xEADA, 0x7E17, 0xEACE, 0x7E1A, 0xEAD6, 0x7E1B, 0xBFA3, + 0x7E1C, 0xEAD4, 0x7E1D, 0xBFA6, 0x7E1E, 0xBFA5, 0x7E1F, 0xEAD0, + 0x7E20, 0xEAD1, 0x7E21, 0xEACD, 0x7E22, 0xEAD7, 0x7E23, 0xBFA4, + 0x7E24, 0xEADE, 0x7E25, 0xEADD, 0x7E29, 0xEDDA, 0x7E2A, 0xEDD6, + 0x7E2B, 0xC15F, 0x7E2D, 0xEDD0, 0x7E2E, 0xC159, 0x7E2F, 0xC169, + 0x7E30, 0xEDDC, 0x7E31, 0xC161, 0x7E32, 0xC15D, 0x7E33, 0xEDD3, + 0x7E34, 0xC164, 0x7E35, 0xC167, 0x7E36, 0xEDDE, 0x7E37, 0xC15C, + 0x7E38, 0xEDD5, 0x7E39, 0xC165, 0x7E3A, 0xEDE0, 0x7E3B, 0xEDDD, + 0x7E3C, 0xEDD1, 0x7E3D, 0xC160, 0x7E3E, 0xC15A, 0x7E3F, 0xC168, + 0x7E40, 0xEDD8, 0x7E41, 0xC163, 0x7E42, 0xEDD2, 0x7E43, 0xC15E, + 0x7E44, 0xEDDF, 0x7E45, 0xC162, 0x7E46, 0xC15B, 0x7E47, 0xEDD9, + 0x7E48, 0xC166, 0x7E49, 0xEDD7, 0x7E4C, 0xEDDB, 0x7E50, 0xF06E, + 0x7E51, 0xF074, 0x7E52, 0xC2B9, 0x7E53, 0xF077, 0x7E54, 0xC2B4, + 0x7E55, 0xC2B5, 0x7E56, 0xF06F, 0x7E57, 0xF076, 0x7E58, 0xF071, + 0x7E59, 0xC2BA, 0x7E5A, 0xC2B7, 0x7E5C, 0xF06D, 0x7E5E, 0xC2B6, + 0x7E5F, 0xF073, 0x7E60, 0xF075, 0x7E61, 0xC2B8, 0x7E62, 0xF072, + 0x7E63, 0xF070, 0x7E68, 0xF2B8, 0x7E69, 0xC3B7, 0x7E6A, 0xC3B8, + 0x7E6B, 0xC3B4, 0x7E6D, 0xC3B5, 0x7E6F, 0xF2B4, 0x7E70, 0xF2B2, + 0x7E72, 0xF2B6, 0x7E73, 0xC3BA, 0x7E74, 0xF2B7, 0x7E75, 0xF2B0, + 0x7E76, 0xF2AF, 0x7E77, 0xF2B3, 0x7E78, 0xF2B1, 0x7E79, 0xC3B6, + 0x7E7A, 0xF2B5, 0x7E7B, 0xF4AC, 0x7E7C, 0xC47E, 0x7E7D, 0xC47D, + 0x7E7E, 0xF4AD, 0x7E80, 0xF4AF, 0x7E81, 0xF4AE, 0x7E82, 0xC4A1, + 0x7E86, 0xF5EB, 0x7E87, 0xF5E8, 0x7E88, 0xF5E9, 0x7E8A, 0xF5E7, + 0x7E8B, 0xF5EA, 0x7E8C, 0xC4F2, 0x7E8D, 0xF5EC, 0x7E8F, 0xC4F1, + 0x7E91, 0xF742, 0x7E93, 0xC5D5, 0x7E94, 0xC5D7, 0x7E95, 0xF7EE, + 0x7E96, 0xC5D6, 0x7E97, 0xF8B9, 0x7E98, 0xF940, 0x7E99, 0xF942, + 0x7E9A, 0xF8FE, 0x7E9B, 0xF941, 0x7E9C, 0xC66C, 0x7F36, 0xA6CE, + 0x7F38, 0xACFB, 0x7F39, 0xD26F, 0x7F3A, 0xAFCA, 0x7F3D, 0xB2DA, + 0x7F3E, 0xDAFC, 0x7F3F, 0xDAFD, 0x7F43, 0xEADF, 0x7F44, 0xC16A, + 0x7F45, 0xEDE1, 0x7F48, 0xC2BB, 0x7F4A, 0xF2BA, 0x7F4B, 0xF2B9, + 0x7F4C, 0xC4A2, 0x7F4D, 0xF5ED, 0x7F4F, 0xF743, 0x7F50, 0xC5F8, + 0x7F51, 0xCA49, 0x7F54, 0xAAC9, 0x7F55, 0xA875, 0x7F58, 0xD04D, + 0x7F5B, 0xD360, 0x7F5C, 0xD35B, 0x7F5D, 0xD35F, 0x7F5E, 0xD35D, + 0x7F5F, 0xAFCB, 0x7F60, 0xD35E, 0x7F61, 0xD35C, 0x7F63, 0xD6F1, + 0x7F65, 0xDAFE, 0x7F66, 0xDB40, 0x7F67, 0xDF69, 0x7F68, 0xDF6A, + 0x7F69, 0xB86E, 0x7F6A, 0xB86F, 0x7F6B, 0xDF68, 0x7F6C, 0xDF6B, + 0x7F6D, 0xDF67, 0x7F6E, 0xB86D, 0x7F70, 0xBB40, 0x7F72, 0xB870, + 0x7F73, 0xE37A, 0x7F75, 0xBD7C, 0x7F76, 0xE6F1, 0x7F77, 0xBD7D, + 0x7F79, 0xBFA9, 0x7F7A, 0xEAE2, 0x7F7B, 0xEAE0, 0x7F7C, 0xEAE1, + 0x7F7D, 0xEDE4, 0x7F7E, 0xEDE3, 0x7F7F, 0xEDE2, 0x7F83, 0xF2BB, + 0x7F85, 0xC3B9, 0x7F86, 0xF2BC, 0x7F87, 0xF744, 0x7F88, 0xC5F9, + 0x7F89, 0xF8BA, 0x7F8A, 0xA6CF, 0x7F8B, 0xAACB, 0x7F8C, 0xAACA, + 0x7F8D, 0xD04F, 0x7F8E, 0xACFC, 0x7F91, 0xD04E, 0x7F92, 0xD362, + 0x7F94, 0xAFCC, 0x7F95, 0xD6F2, 0x7F96, 0xD361, 0x7F9A, 0xB2DC, + 0x7F9B, 0xD6F5, 0x7F9C, 0xD6F3, 0x7F9D, 0xD6F4, 0x7F9E, 0xB2DB, + 0x7FA0, 0xDB42, 0x7FA1, 0xDB43, 0x7FA2, 0xDB41, 0x7FA4, 0xB873, + 0x7FA5, 0xDF6D, 0x7FA6, 0xDF6C, 0x7FA7, 0xDF6E, 0x7FA8, 0xB872, + 0x7FA9, 0xB871, 0x7FAC, 0xE6F2, 0x7FAD, 0xE6F4, 0x7FAF, 0xBD7E, + 0x7FB0, 0xE6F3, 0x7FB1, 0xEAE3, 0x7FB2, 0xBFAA, 0x7FB3, 0xF079, + 0x7FB5, 0xF078, 0x7FB6, 0xC3BB, 0x7FB7, 0xF2BD, 0x7FB8, 0xC3BD, + 0x7FB9, 0xC3BC, 0x7FBA, 0xF4B0, 0x7FBB, 0xF5EE, 0x7FBC, 0xC4F3, + 0x7FBD, 0xA6D0, 0x7FBE, 0xD050, 0x7FBF, 0xACFD, 0x7FC0, 0xD365, + 0x7FC1, 0xAFCE, 0x7FC2, 0xD364, 0x7FC3, 0xD363, 0x7FC5, 0xAFCD, + 0x7FC7, 0xD6FB, 0x7FC9, 0xD6FD, 0x7FCA, 0xD6F6, 0x7FCB, 0xD6F7, + 0x7FCC, 0xB2DD, 0x7FCD, 0xD6F8, 0x7FCE, 0xB2DE, 0x7FCF, 0xD6FC, + 0x7FD0, 0xD6F9, 0x7FD1, 0xD6FA, 0x7FD2, 0xB2DF, 0x7FD4, 0xB5BE, + 0x7FD5, 0xB5BF, 0x7FD7, 0xDB44, 0x7FDB, 0xDF6F, 0x7FDC, 0xDF70, + 0x7FDE, 0xE37E, 0x7FDF, 0xBB43, 0x7FE0, 0xBB41, 0x7FE1, 0xBB42, + 0x7FE2, 0xE37B, 0x7FE3, 0xE37C, 0x7FE5, 0xE37D, 0x7FE6, 0xE6F9, + 0x7FE8, 0xE6FA, 0x7FE9, 0xBDA1, 0x7FEA, 0xE6F7, 0x7FEB, 0xE6F6, + 0x7FEC, 0xE6F8, 0x7FED, 0xE6F5, 0x7FEE, 0xBFAD, 0x7FEF, 0xEAE4, + 0x7FF0, 0xBFAB, 0x7FF1, 0xBFAC, 0x7FF2, 0xEDE6, 0x7FF3, 0xC16B, + 0x7FF4, 0xEDE5, 0x7FF5, 0xEFA8, 0x7FF7, 0xF07A, 0x7FF8, 0xF07B, + 0x7FF9, 0xC2BC, 0x7FFB, 0xC2BD, 0x7FFC, 0xC16C, 0x7FFD, 0xF2BE, + 0x7FFE, 0xF2BF, 0x7FFF, 0xF4B1, 0x8000, 0xC4A3, 0x8001, 0xA6D1, + 0x8003, 0xA6D2, 0x8004, 0xACFE, 0x8005, 0xAACC, 0x8006, 0xAFCF, + 0x8007, 0xD051, 0x800B, 0xB5C0, 0x800C, 0xA6D3, 0x800D, 0xAD41, + 0x800E, 0xD052, 0x800F, 0xD053, 0x8010, 0xAD40, 0x8011, 0xAD42, + 0x8012, 0xA6D4, 0x8014, 0xD054, 0x8015, 0xAFD1, 0x8016, 0xD366, + 0x8017, 0xAFD3, 0x8018, 0xAFD0, 0x8019, 0xAFD2, 0x801B, 0xD741, + 0x801C, 0xB2E0, 0x801E, 0xD740, 0x801F, 0xD6FE, 0x8021, 0xDF71, + 0x8024, 0xE3A1, 0x8026, 0xBDA2, 0x8028, 0xBFAE, 0x8029, 0xEAE6, + 0x802A, 0xEAE5, 0x802C, 0xEDE7, 0x8030, 0xF5EF, 0x8033, 0xA6D5, + 0x8034, 0xCB73, 0x8035, 0xCDAA, 0x8036, 0xAD43, 0x8037, 0xD055, + 0x8039, 0xD368, 0x803D, 0xAFD4, 0x803E, 0xD367, 0x803F, 0xAFD5, + 0x8043, 0xD743, 0x8046, 0xB2E2, 0x8047, 0xD742, 0x8048, 0xD744, + 0x804A, 0xB2E1, 0x804F, 0xDB46, 0x8050, 0xDB47, 0x8051, 0xDB45, + 0x8052, 0xB5C1, 0x8056, 0xB874, 0x8058, 0xB875, 0x805A, 0xBB45, + 0x805C, 0xE3A3, 0x805D, 0xE3A2, 0x805E, 0xBB44, 0x8064, 0xE6FB, + 0x8067, 0xE6FC, 0x806C, 0xEAE7, 0x806F, 0xC170, 0x8070, 0xC16F, + 0x8071, 0xC16D, 0x8072, 0xC16E, 0x8073, 0xC171, 0x8075, 0xF07C, + 0x8076, 0xC2BF, 0x8077, 0xC2BE, 0x8078, 0xF2C0, 0x8079, 0xF4B2, + 0x807D, 0xC5A5, 0x807E, 0xC5A4, 0x807F, 0xA6D6, 0x8082, 0xD1FB, + 0x8084, 0xB877, 0x8085, 0xB5C2, 0x8086, 0xB876, 0x8087, 0xBB46, + 0x8089, 0xA6D7, 0x808A, 0xC9A9, 0x808B, 0xA6D8, 0x808C, 0xA6D9, + 0x808F, 0xCDAB, 0x8090, 0xCB76, 0x8092, 0xCB77, 0x8093, 0xA877, + 0x8095, 0xCB74, 0x8096, 0xA876, 0x8098, 0xA879, 0x8099, 0xCB75, + 0x809A, 0xA87B, 0x809B, 0xA87A, 0x809C, 0xCB78, 0x809D, 0xA878, + 0x80A1, 0xAAD1, 0x80A2, 0xAACF, 0x80A3, 0xCDAD, 0x80A5, 0xAACE, + 0x80A9, 0xAAD3, 0x80AA, 0xAAD5, 0x80AB, 0xAAD2, 0x80AD, 0xCDB0, + 0x80AE, 0xCDAC, 0x80AF, 0xAAD6, 0x80B1, 0xAAD0, 0x80B2, 0xA87C, + 0x80B4, 0xAAD4, 0x80B5, 0xCDAF, 0x80B8, 0xCDAE, 0x80BA, 0xAACD, + 0x80C2, 0xD05B, 0x80C3, 0xAD47, 0x80C4, 0xAD48, 0x80C5, 0xD05D, + 0x80C7, 0xD057, 0x80C8, 0xD05A, 0x80C9, 0xD063, 0x80CA, 0xD061, + 0x80CC, 0xAD49, 0x80CD, 0xD067, 0x80CE, 0xAD4C, 0x80CF, 0xD064, + 0x80D0, 0xD05C, 0x80D1, 0xD059, 0x80D4, 0xDB49, 0x80D5, 0xD062, + 0x80D6, 0xAD44, 0x80D7, 0xD065, 0x80D8, 0xD056, 0x80D9, 0xD05F, + 0x80DA, 0xAD46, 0x80DB, 0xAD4B, 0x80DC, 0xD060, 0x80DD, 0xAD4F, + 0x80DE, 0xAD4D, 0x80E0, 0xD058, 0x80E1, 0xAD4A, 0x80E3, 0xD05E, + 0x80E4, 0xAD4E, 0x80E5, 0xAD45, 0x80E6, 0xD066, 0x80ED, 0xAFDA, + 0x80EF, 0xAFE3, 0x80F0, 0xAFD8, 0x80F1, 0xAFD6, 0x80F2, 0xD36A, + 0x80F3, 0xAFDE, 0x80F4, 0xAFDB, 0x80F5, 0xD36C, 0x80F8, 0xAFDD, + 0x80F9, 0xD36B, 0x80FA, 0xD369, 0x80FB, 0xD36E, 0x80FC, 0xAFE2, + 0x80FD, 0xAFE0, 0x80FE, 0xDB48, 0x8100, 0xD36F, 0x8101, 0xD36D, + 0x8102, 0xAFD7, 0x8105, 0xAFD9, 0x8106, 0xAFDC, 0x8108, 0xAFDF, + 0x810A, 0xAFE1, 0x8115, 0xD74E, 0x8116, 0xB2E4, 0x8118, 0xD745, + 0x8119, 0xD747, 0x811B, 0xD748, 0x811D, 0xD750, 0x811E, 0xD74C, + 0x811F, 0xD74A, 0x8121, 0xD74D, 0x8122, 0xD751, 0x8123, 0xB2E5, + 0x8124, 0xB2E9, 0x8125, 0xD746, 0x8127, 0xD74F, 0x8129, 0xB2E7, + 0x812B, 0xB2E6, 0x812C, 0xD74B, 0x812D, 0xD749, 0x812F, 0xB2E3, + 0x8130, 0xB2E8, 0x8139, 0xB5C8, 0x813A, 0xDB51, 0x813D, 0xDB4F, + 0x813E, 0xB5CA, 0x8143, 0xDB4A, 0x8144, 0xDFA1, 0x8146, 0xB5C9, + 0x8147, 0xDB4E, 0x814A, 0xDB4B, 0x814B, 0xB5C5, 0x814C, 0xB5CB, + 0x814D, 0xDB50, 0x814E, 0xB5C7, 0x814F, 0xDB4D, 0x8150, 0xBB47, + 0x8151, 0xB5C6, 0x8152, 0xDB4C, 0x8153, 0xB5CC, 0x8154, 0xB5C4, + 0x8155, 0xB5C3, 0x815B, 0xDF77, 0x815C, 0xDF75, 0x815E, 0xDF7B, + 0x8160, 0xDF73, 0x8161, 0xDFA2, 0x8162, 0xDF78, 0x8164, 0xDF72, + 0x8165, 0xB87B, 0x8166, 0xB8A3, 0x8167, 0xDF7D, 0x8169, 0xDF76, + 0x816B, 0xB87E, 0x816E, 0xB87C, 0x816F, 0xDF7E, 0x8170, 0xB879, + 0x8171, 0xB878, 0x8172, 0xDF79, 0x8173, 0xB87D, 0x8174, 0xB5CD, + 0x8176, 0xDF7C, 0x8177, 0xDF74, 0x8178, 0xB87A, 0x8179, 0xB8A1, + 0x817A, 0xB8A2, 0x817F, 0xBB4C, 0x8180, 0xBB48, 0x8182, 0xBB4D, + 0x8183, 0xE3A6, 0x8186, 0xE3A5, 0x8187, 0xE3A7, 0x8188, 0xBB4A, + 0x8189, 0xE3A4, 0x818A, 0xBB4B, 0x818B, 0xE3AA, 0x818C, 0xE3A9, + 0x818D, 0xE3A8, 0x818F, 0xBB49, 0x8195, 0xE741, 0x8197, 0xE744, + 0x8198, 0xBDA8, 0x8199, 0xE743, 0x819A, 0xBDA7, 0x819B, 0xBDA3, + 0x819C, 0xBDA4, 0x819D, 0xBDA5, 0x819E, 0xE740, 0x819F, 0xE6FE, + 0x81A0, 0xBDA6, 0x81A2, 0xE742, 0x81A3, 0xE6FD, 0x81A6, 0xEAE9, + 0x81A7, 0xEAF3, 0x81A8, 0xBFB1, 0x81A9, 0xBFB0, 0x81AB, 0xEAED, + 0x81AC, 0xEAEF, 0x81AE, 0xEAEA, 0x81B0, 0xEAEE, 0x81B1, 0xEAE8, + 0x81B2, 0xEAF1, 0x81B3, 0xBFAF, 0x81B4, 0xEAF0, 0x81B5, 0xEAEC, + 0x81B7, 0xEAF2, 0x81B9, 0xEAEB, 0x81BA, 0xC174, 0x81BB, 0xEDE8, + 0x81BC, 0xEDEE, 0x81BD, 0xC178, 0x81BE, 0xC17A, 0x81BF, 0xC177, + 0x81C0, 0xC176, 0x81C2, 0xC175, 0x81C3, 0xC173, 0x81C4, 0xEDE9, + 0x81C5, 0xEDEC, 0x81C6, 0xC172, 0x81C7, 0xEDED, 0x81C9, 0xC179, + 0x81CA, 0xEDEB, 0x81CC, 0xEDEA, 0x81CD, 0xC2C0, 0x81CF, 0xC2C1, + 0x81D0, 0xF0A1, 0x81D1, 0xF07D, 0x81D2, 0xF07E, 0x81D5, 0xF2C2, + 0x81D7, 0xF2C1, 0x81D8, 0xC3BE, 0x81D9, 0xF4B4, 0x81DA, 0xC4A4, + 0x81DB, 0xF4B3, 0x81DD, 0xF5F0, 0x81DE, 0xF745, 0x81DF, 0xC5A6, + 0x81E0, 0xF943, 0x81E1, 0xF944, 0x81E2, 0xC5D8, 0x81E3, 0xA6DA, + 0x81E5, 0xAAD7, 0x81E6, 0xDB52, 0x81E7, 0xBB4E, 0x81E8, 0xC17B, + 0x81E9, 0xEDEF, 0x81EA, 0xA6DB, 0x81EC, 0xAFE5, 0x81ED, 0xAFE4, + 0x81EE, 0xDB53, 0x81F2, 0xEAF4, 0x81F3, 0xA6DC, 0x81F4, 0xAD50, + 0x81F7, 0xDB54, 0x81F8, 0xDB55, 0x81F9, 0xDB56, 0x81FA, 0xBB4F, + 0x81FB, 0xBFB2, 0x81FC, 0xA6DD, 0x81FE, 0xAAD8, 0x81FF, 0xD068, + 0x8200, 0xAFE6, 0x8201, 0xD370, 0x8202, 0xB2EA, 0x8204, 0xDB57, + 0x8205, 0xB8A4, 0x8207, 0xBB50, 0x8208, 0xBFB3, 0x8209, 0xC17C, + 0x820A, 0xC2C2, 0x820B, 0xF4B5, 0x820C, 0xA6DE, 0x820D, 0xAAD9, + 0x8210, 0xAFE7, 0x8211, 0xD752, 0x8212, 0xB5CE, 0x8214, 0xBB51, + 0x8215, 0xE3AB, 0x8216, 0xE745, 0x821B, 0xA6DF, 0x821C, 0xB5CF, + 0x821D, 0xDFA3, 0x821E, 0xBB52, 0x821F, 0xA6E0, 0x8220, 0xCDB1, + 0x8221, 0xD069, 0x8222, 0xAD51, 0x8225, 0xD372, 0x8228, 0xAFEA, + 0x822A, 0xAFE8, 0x822B, 0xAFE9, 0x822C, 0xAFEB, 0x822F, 0xD371, + 0x8232, 0xD757, 0x8233, 0xD754, 0x8234, 0xD756, 0x8235, 0xB2EB, + 0x8236, 0xB2ED, 0x8237, 0xB2EC, 0x8238, 0xD753, 0x8239, 0xB2EE, + 0x823A, 0xD755, 0x823C, 0xDB58, 0x823D, 0xDB59, 0x823F, 0xDB5A, + 0x8240, 0xDFA6, 0x8242, 0xDFA7, 0x8244, 0xDFA5, 0x8245, 0xDFA8, + 0x8247, 0xB8A5, 0x8249, 0xDFA4, 0x824B, 0xBB53, 0x824E, 0xE74A, + 0x824F, 0xE746, 0x8250, 0xE749, 0x8251, 0xE74B, 0x8252, 0xE748, + 0x8253, 0xE747, 0x8255, 0xEAF5, 0x8256, 0xEAF6, 0x8257, 0xEAF7, + 0x8258, 0xBFB4, 0x8259, 0xBFB5, 0x825A, 0xEDF1, 0x825B, 0xEDF0, + 0x825C, 0xEDF2, 0x825E, 0xF0A3, 0x825F, 0xF0A2, 0x8261, 0xF2C4, + 0x8263, 0xF2C5, 0x8264, 0xF2C3, 0x8266, 0xC4A5, 0x8268, 0xF4B6, + 0x8269, 0xF4B7, 0x826B, 0xF746, 0x826C, 0xF7EF, 0x826D, 0xF8BB, + 0x826E, 0xA6E1, 0x826F, 0xA87D, 0x8271, 0xC17D, 0x8272, 0xA6E2, + 0x8274, 0xD758, 0x8275, 0xDB5B, 0x8277, 0xC641, 0x8278, 0xCA4A, + 0x827C, 0xCA4B, 0x827D, 0xCA4D, 0x827E, 0xA6E3, 0x827F, 0xCA4E, + 0x8280, 0xCA4C, 0x8283, 0xCBA2, 0x8284, 0xCBA3, 0x8285, 0xCB7B, + 0x828A, 0xCBA1, 0x828B, 0xA8A1, 0x828D, 0xA8A2, 0x828E, 0xCB7C, + 0x828F, 0xCB7A, 0x8290, 0xCB79, 0x8291, 0xCB7D, 0x8292, 0xA87E, + 0x8293, 0xCB7E, 0x8294, 0xD06A, 0x8298, 0xCDB6, 0x8299, 0xAADC, + 0x829A, 0xCDB5, 0x829B, 0xCDB7, 0x829D, 0xAADB, 0x829E, 0xCDBC, + 0x829F, 0xAADF, 0x82A0, 0xCDB2, 0x82A1, 0xCDC0, 0x82A2, 0xCDC6, + 0x82A3, 0xAAE6, 0x82A4, 0xCDC3, 0x82A5, 0xAAE3, 0x82A7, 0xCDB9, + 0x82A8, 0xCDBF, 0x82A9, 0xCDC1, 0x82AB, 0xCDB4, 0x82AC, 0xAAE2, + 0x82AD, 0xAADD, 0x82AE, 0xCDBA, 0x82AF, 0xAAE4, 0x82B0, 0xAAE7, + 0x82B1, 0xAAE1, 0x82B3, 0xAADA, 0x82B4, 0xCDBE, 0x82B5, 0xCDB8, + 0x82B6, 0xCDC5, 0x82B7, 0xAAE9, 0x82B8, 0xAAE5, 0x82B9, 0xAAE0, + 0x82BA, 0xCDBD, 0x82BB, 0xAFEC, 0x82BC, 0xCDBB, 0x82BD, 0xAADE, + 0x82BE, 0xAAE8, 0x82C0, 0xCDB3, 0x82C2, 0xCDC2, 0x82C3, 0xCDC4, + 0x82D1, 0xAD62, 0x82D2, 0xAD5C, 0x82D3, 0xAD64, 0x82D4, 0xAD61, + 0x82D5, 0xD071, 0x82D6, 0xD074, 0x82D7, 0xAD5D, 0x82D9, 0xD06B, + 0x82DB, 0xAD56, 0x82DC, 0xAD60, 0x82DE, 0xAD63, 0x82DF, 0xAD65, + 0x82E0, 0xD0A2, 0x82E1, 0xD077, 0x82E3, 0xAD55, 0x82E4, 0xD0A1, + 0x82E5, 0xAD59, 0x82E6, 0xAD57, 0x82E7, 0xAD52, 0x82E8, 0xD06F, + 0x82EA, 0xD07E, 0x82EB, 0xD073, 0x82EC, 0xD076, 0x82ED, 0xD0A5, + 0x82EF, 0xAD66, 0x82F0, 0xD07D, 0x82F1, 0xAD5E, 0x82F2, 0xD078, + 0x82F3, 0xD0A4, 0x82F4, 0xD075, 0x82F5, 0xD079, 0x82F6, 0xD07C, + 0x82F9, 0xD06D, 0x82FA, 0xD0A3, 0x82FB, 0xD07B, 0x82FE, 0xD06C, + 0x8300, 0xD070, 0x8301, 0xAD5F, 0x8302, 0xAD5A, 0x8303, 0xAD53, + 0x8304, 0xAD58, 0x8305, 0xAD54, 0x8306, 0xAD67, 0x8307, 0xD06E, + 0x8308, 0xD3A5, 0x8309, 0xAD5B, 0x830C, 0xD07A, 0x830D, 0xCE41, + 0x8316, 0xD3A8, 0x8317, 0xAFFA, 0x8319, 0xD376, 0x831B, 0xD3A3, + 0x831C, 0xD37D, 0x831E, 0xD3B2, 0x8320, 0xD3AA, 0x8322, 0xD37E, + 0x8324, 0xD3A9, 0x8325, 0xD378, 0x8326, 0xD37C, 0x8327, 0xD3B5, + 0x8328, 0xAFFD, 0x8329, 0xD3AD, 0x832A, 0xD3A4, 0x832B, 0xAFED, + 0x832C, 0xD3B3, 0x832D, 0xD374, 0x832F, 0xD3AC, 0x8331, 0xAFFC, + 0x8332, 0xAFF7, 0x8333, 0xD373, 0x8334, 0xAFF5, 0x8335, 0xAFF4, + 0x8336, 0xAFF9, 0x8337, 0xD3AB, 0x8338, 0xAFF1, 0x8339, 0xAFF8, + 0x833A, 0xD072, 0x833B, 0xDB5C, 0x833C, 0xD3A6, 0x833F, 0xD37A, + 0x8340, 0xAFFB, 0x8341, 0xD37B, 0x8342, 0xD3A1, 0x8343, 0xAFFE, + 0x8344, 0xD375, 0x8345, 0xD3AF, 0x8347, 0xD3AE, 0x8348, 0xD3B6, + 0x8349, 0xAFF3, 0x834A, 0xAFF0, 0x834B, 0xD3B4, 0x834C, 0xD3B0, + 0x834D, 0xD3A7, 0x834E, 0xD3A2, 0x834F, 0xAFF6, 0x8350, 0xAFF2, + 0x8351, 0xD377, 0x8352, 0xAFEE, 0x8353, 0xD3B1, 0x8354, 0xAFEF, + 0x8356, 0xD379, 0x8373, 0xD75E, 0x8374, 0xD760, 0x8375, 0xD765, + 0x8376, 0xD779, 0x8377, 0xB2FC, 0x8378, 0xB2F2, 0x837A, 0xD75D, + 0x837B, 0xB2FD, 0x837C, 0xB2FE, 0x837D, 0xD768, 0x837E, 0xD76F, + 0x837F, 0xD775, 0x8381, 0xD762, 0x8383, 0xD769, 0x8386, 0xB340, + 0x8387, 0xD777, 0x8388, 0xD772, 0x8389, 0xB2FA, 0x838A, 0xB2F8, + 0x838B, 0xD76E, 0x838C, 0xD76A, 0x838D, 0xD75C, 0x838E, 0xB2EF, + 0x838F, 0xD761, 0x8390, 0xD759, 0x8392, 0xB2F7, 0x8393, 0xB2F9, + 0x8394, 0xD766, 0x8395, 0xD763, 0x8396, 0xB2F4, 0x8397, 0xD773, + 0x8398, 0xB2F1, 0x8399, 0xD764, 0x839A, 0xD77A, 0x839B, 0xD76C, + 0x839D, 0xD76B, 0x839E, 0xB2F0, 0x83A0, 0xB2FB, 0x83A2, 0xB2F3, + 0x83A3, 0xD75A, 0x83A4, 0xD75F, 0x83A5, 0xD770, 0x83A6, 0xD776, + 0x83A7, 0xB341, 0x83A8, 0xD75B, 0x83A9, 0xD767, 0x83AA, 0xD76D, + 0x83AB, 0xB2F6, 0x83AE, 0xD778, 0x83AF, 0xD771, 0x83B0, 0xD774, + 0x83BD, 0xB2F5, 0x83BF, 0xDB6C, 0x83C0, 0xDB60, 0x83C1, 0xB5D7, + 0x83C2, 0xDB7D, 0x83C3, 0xDBA7, 0x83C4, 0xDBAA, 0x83C5, 0xB5D5, + 0x83C6, 0xDB68, 0x83C7, 0xDBA3, 0x83C8, 0xDB69, 0x83C9, 0xDB77, + 0x83CA, 0xB5E2, 0x83CB, 0xDB73, 0x83CC, 0xB5DF, 0x83CE, 0xDB74, + 0x83CF, 0xDB5D, 0x83D1, 0xDBA4, 0x83D4, 0xB5E8, 0x83D5, 0xDBA1, + 0x83D6, 0xDB75, 0x83D7, 0xDBAC, 0x83D8, 0xDB70, 0x83D9, 0xDFC8, + 0x83DB, 0xDBAF, 0x83DC, 0xB5E6, 0x83DD, 0xDB6E, 0x83DE, 0xDB7A, + 0x83DF, 0xB5E9, 0x83E0, 0xB5D4, 0x83E1, 0xDB72, 0x83E2, 0xDBAD, + 0x83E3, 0xDB6B, 0x83E4, 0xDB64, 0x83E5, 0xDB6F, 0x83E7, 0xDB63, + 0x83E8, 0xDB61, 0x83E9, 0xB5D0, 0x83EA, 0xDBA5, 0x83EB, 0xDB6A, + 0x83EC, 0xDBA8, 0x83EE, 0xDBA9, 0x83EF, 0xB5D8, 0x83F0, 0xB5DD, + 0x83F1, 0xB5D9, 0x83F2, 0xB5E1, 0x83F3, 0xDB7E, 0x83F4, 0xB5DA, + 0x83F5, 0xDB76, 0x83F6, 0xDB66, 0x83F8, 0xB5D2, 0x83F9, 0xDB5E, + 0x83FA, 0xDBA2, 0x83FB, 0xDBAB, 0x83FC, 0xDB65, 0x83FD, 0xB5E0, + 0x83FE, 0xDBB0, 0x83FF, 0xDB71, 0x8401, 0xDB6D, 0x8403, 0xB5D1, + 0x8404, 0xB5E5, 0x8406, 0xDB7C, 0x8407, 0xB5E7, 0x8409, 0xDB78, + 0x840A, 0xB5DC, 0x840B, 0xB5D6, 0x840C, 0xB5DE, 0x840D, 0xB5D3, + 0x840E, 0xB5E4, 0x840F, 0xDB79, 0x8410, 0xDB67, 0x8411, 0xDB7B, + 0x8412, 0xDB62, 0x8413, 0xDBA6, 0x841B, 0xDBAE, 0x8423, 0xDB5F, + 0x8429, 0xDFC7, 0x842B, 0xDFDD, 0x842C, 0xB855, 0x842D, 0xDFCC, + 0x842F, 0xDFCA, 0x8430, 0xDFB5, 0x8431, 0xB8A9, 0x8432, 0xDFC5, + 0x8433, 0xDFD9, 0x8434, 0xDFC1, 0x8435, 0xB8B1, 0x8436, 0xDFD8, + 0x8437, 0xDFBF, 0x8438, 0xB5E3, 0x8439, 0xDFCF, 0x843A, 0xDFC0, + 0x843B, 0xDFD6, 0x843C, 0xB8B0, 0x843D, 0xB8A8, 0x843F, 0xDFAA, + 0x8440, 0xDFB2, 0x8442, 0xDFCB, 0x8443, 0xDFC3, 0x8444, 0xDFDC, + 0x8445, 0xDFC6, 0x8446, 0xB8B6, 0x8447, 0xDFD7, 0x8449, 0xB8AD, + 0x844B, 0xDFC9, 0x844C, 0xDFD1, 0x844D, 0xDFB6, 0x844E, 0xDFD0, + 0x8450, 0xDFE1, 0x8451, 0xDFB1, 0x8452, 0xDFD2, 0x8454, 0xDFDF, + 0x8456, 0xDFAB, 0x8457, 0xB5DB, 0x8459, 0xDFB9, 0x845A, 0xDFB8, + 0x845B, 0xB8AF, 0x845D, 0xDFBC, 0x845E, 0xDFBE, 0x845F, 0xDFCD, + 0x8460, 0xDFDE, 0x8461, 0xB8B2, 0x8463, 0xB8B3, 0x8465, 0xDFB0, + 0x8466, 0xB8AB, 0x8467, 0xDFB4, 0x8468, 0xDFDA, 0x8469, 0xB8B4, + 0x846B, 0xB8AC, 0x846C, 0xB8AE, 0x846D, 0xB8B5, 0x846E, 0xDFE0, + 0x846F, 0xDFD3, 0x8470, 0xDFCE, 0x8473, 0xDFBB, 0x8474, 0xDFBA, + 0x8475, 0xB8AA, 0x8476, 0xDFAC, 0x8477, 0xB8A7, 0x8478, 0xDFC4, + 0x8479, 0xDFAD, 0x847A, 0xDFC2, 0x847D, 0xDFB7, 0x847E, 0xDFDB, + 0x8482, 0xB8A6, 0x8486, 0xDFB3, 0x848D, 0xDFAF, 0x848E, 0xDFD5, + 0x848F, 0xDFAE, 0x8490, 0xBB60, 0x8491, 0xE3D3, 0x8494, 0xE3C2, + 0x8497, 0xE3AC, 0x8498, 0xE3CA, 0x8499, 0xBB58, 0x849A, 0xE3BB, + 0x849B, 0xE3C5, 0x849C, 0xBB5B, 0x849D, 0xE3BE, 0x849E, 0xBB59, + 0x849F, 0xE3AF, 0x84A0, 0xE3CD, 0x84A1, 0xE3AE, 0x84A2, 0xE3C1, + 0x84A4, 0xE3AD, 0x84A7, 0xE3BF, 0x84A8, 0xE3C8, 0x84A9, 0xE3C6, + 0x84AA, 0xE3BA, 0x84AB, 0xE3B5, 0x84AC, 0xE3B3, 0x84AE, 0xE3B4, + 0x84AF, 0xE3C7, 0x84B0, 0xE3D2, 0x84B1, 0xE3BC, 0x84B2, 0xBB5A, + 0x84B4, 0xE3B7, 0x84B6, 0xE3CB, 0x84B8, 0xBB5D, 0x84B9, 0xE3B6, + 0x84BA, 0xE3B0, 0x84BB, 0xE3C0, 0x84BC, 0xBB61, 0x84BF, 0xBB55, + 0x84C0, 0xBB5E, 0x84C1, 0xE3B8, 0x84C2, 0xE3B2, 0x84C4, 0xBB57, + 0x84C5, 0xDFD4, 0x84C6, 0xBB56, 0x84C7, 0xE3C3, 0x84C9, 0xBB54, + 0x84CA, 0xBB63, 0x84CB, 0xBB5C, 0x84CC, 0xE3C4, 0x84CD, 0xE3B9, + 0x84CE, 0xE3B1, 0x84CF, 0xE3CC, 0x84D0, 0xE3BD, 0x84D1, 0xBB62, + 0x84D2, 0xE3D0, 0x84D3, 0xBB5F, 0x84D4, 0xE3CF, 0x84D6, 0xE3C9, + 0x84D7, 0xE3CE, 0x84DB, 0xE3D1, 0x84E7, 0xE773, 0x84E8, 0xE774, + 0x84E9, 0xE767, 0x84EA, 0xE766, 0x84EB, 0xE762, 0x84EC, 0xBDB4, + 0x84EE, 0xBDAC, 0x84EF, 0xE776, 0x84F0, 0xE775, 0x84F1, 0xDFA9, + 0x84F2, 0xE75F, 0x84F3, 0xE763, 0x84F4, 0xE75D, 0x84F6, 0xE770, + 0x84F7, 0xE761, 0x84F9, 0xE777, 0x84FA, 0xE75A, 0x84FB, 0xE758, + 0x84FC, 0xE764, 0x84FD, 0xE76E, 0x84FE, 0xE769, 0x84FF, 0xBDB6, + 0x8500, 0xE74F, 0x8502, 0xE76D, 0x8506, 0xBDB7, 0x8507, 0xDFBD, + 0x8508, 0xE75B, 0x8509, 0xE752, 0x850A, 0xE755, 0x850B, 0xE77B, + 0x850C, 0xE75C, 0x850D, 0xE753, 0x850E, 0xE751, 0x850F, 0xE74E, + 0x8511, 0xBDB0, 0x8512, 0xE765, 0x8513, 0xBDAF, 0x8514, 0xBDB3, + 0x8515, 0xE760, 0x8516, 0xE768, 0x8517, 0xBDA9, 0x8518, 0xE778, + 0x8519, 0xE77C, 0x851A, 0xBDAB, 0x851C, 0xE757, 0x851D, 0xE76B, + 0x851E, 0xE76F, 0x851F, 0xE754, 0x8520, 0xE779, 0x8521, 0xBDB2, + 0x8523, 0xBDB1, 0x8524, 0xE74C, 0x8525, 0xBDB5, 0x8526, 0xE772, + 0x8527, 0xE756, 0x8528, 0xE76A, 0x8529, 0xE750, 0x852A, 0xE75E, + 0x852B, 0xE759, 0x852C, 0xBDAD, 0x852D, 0xBDAE, 0x852E, 0xE76C, + 0x852F, 0xE77D, 0x8530, 0xE77A, 0x8531, 0xE771, 0x853B, 0xE74D, + 0x853D, 0xBDAA, 0x853E, 0xEB49, 0x8540, 0xEB40, 0x8541, 0xEB43, + 0x8543, 0xBFBB, 0x8544, 0xEB45, 0x8545, 0xEAF9, 0x8546, 0xEB41, + 0x8547, 0xEB47, 0x8548, 0xBFB8, 0x8549, 0xBFBC, 0x854A, 0xBFB6, + 0x854D, 0xEAFB, 0x854E, 0xEB4C, 0x8551, 0xEB46, 0x8553, 0xEAFC, + 0x8554, 0xEB55, 0x8555, 0xEB4F, 0x8556, 0xEAF8, 0x8557, 0xEE46, + 0x8558, 0xEAFE, 0x8559, 0xBFB7, 0x855B, 0xEB4A, 0x855D, 0xEB54, + 0x855E, 0xBFBF, 0x8560, 0xEB51, 0x8561, 0xEAFD, 0x8562, 0xEB44, + 0x8563, 0xEB48, 0x8564, 0xEB42, 0x8565, 0xEB56, 0x8566, 0xEB53, + 0x8567, 0xEB50, 0x8568, 0xBFB9, 0x8569, 0xBFBA, 0x856A, 0xBFBE, + 0x856B, 0xEAFA, 0x856C, 0xEB57, 0x856D, 0xBFBD, 0x856E, 0xEB4D, + 0x8571, 0xEB4B, 0x8575, 0xEB4E, 0x8576, 0xEE53, 0x8577, 0xEE40, + 0x8578, 0xEE45, 0x8579, 0xEE52, 0x857A, 0xEE44, 0x857B, 0xEDFB, + 0x857C, 0xEE41, 0x857E, 0xC1A2, 0x8580, 0xEDF4, 0x8581, 0xEE4D, + 0x8582, 0xEE4F, 0x8583, 0xEDF3, 0x8584, 0xC1A1, 0x8585, 0xEE51, + 0x8586, 0xEE49, 0x8587, 0xC1A8, 0x8588, 0xEE50, 0x8589, 0xEE42, + 0x858A, 0xC1AA, 0x858B, 0xEDF9, 0x858C, 0xEB52, 0x858D, 0xEE4A, + 0x858E, 0xEE47, 0x858F, 0xEDF5, 0x8590, 0xEE55, 0x8591, 0xC1A4, + 0x8594, 0xC1A5, 0x8595, 0xEDF7, 0x8596, 0xEE48, 0x8598, 0xEE54, + 0x8599, 0xEE4B, 0x859A, 0xEDFD, 0x859B, 0xC1A7, 0x859C, 0xC1A3, + 0x859D, 0xEE4C, 0x859E, 0xEDFE, 0x859F, 0xEE56, 0x85A0, 0xEDF8, + 0x85A1, 0xEE43, 0x85A2, 0xEE4E, 0x85A3, 0xEDFA, 0x85A4, 0xEDFC, + 0x85A6, 0xC2CB, 0x85A7, 0xEDF6, 0x85A8, 0xC1A9, 0x85A9, 0xC2C4, + 0x85AA, 0xC17E, 0x85AF, 0xC1A6, 0x85B0, 0xC2C8, 0x85B1, 0xF0B3, + 0x85B3, 0xF0A9, 0x85B4, 0xF0A4, 0x85B5, 0xF0AA, 0x85B6, 0xF0B4, + 0x85B7, 0xF0B8, 0x85B8, 0xF0B7, 0x85B9, 0xC2CA, 0x85BA, 0xC2C9, + 0x85BD, 0xF0AB, 0x85BE, 0xF0B9, 0x85BF, 0xF0AE, 0x85C0, 0xF0A6, + 0x85C2, 0xF0A8, 0x85C3, 0xF0A7, 0x85C4, 0xF0AD, 0x85C5, 0xF0B2, + 0x85C6, 0xF0A5, 0x85C7, 0xF0AC, 0x85C8, 0xF0B1, 0x85C9, 0xC2C7, + 0x85CB, 0xF0AF, 0x85CD, 0xC2C5, 0x85CE, 0xF0B0, 0x85CF, 0xC2C3, + 0x85D0, 0xC2C6, 0x85D1, 0xF2D5, 0x85D2, 0xF0B5, 0x85D5, 0xC3C2, + 0x85D7, 0xF2CD, 0x85D8, 0xF2D1, 0x85D9, 0xF2C9, 0x85DA, 0xF2CC, + 0x85DC, 0xF2D4, 0x85DD, 0xC3C0, 0x85DE, 0xF2D9, 0x85DF, 0xF2D2, + 0x85E1, 0xF2CA, 0x85E2, 0xF2DA, 0x85E3, 0xF2D3, 0x85E4, 0xC3C3, + 0x85E5, 0xC3C4, 0x85E6, 0xF2D7, 0x85E8, 0xF2CB, 0x85E9, 0xC3BF, + 0x85EA, 0xC3C1, 0x85EB, 0xF2C6, 0x85EC, 0xF2CE, 0x85ED, 0xF2C8, + 0x85EF, 0xF2D8, 0x85F0, 0xF2D6, 0x85F1, 0xF2C7, 0x85F2, 0xF2CF, + 0x85F6, 0xF4BE, 0x85F7, 0xC3C5, 0x85F8, 0xF2D0, 0x85F9, 0xC4A7, + 0x85FA, 0xC4A9, 0x85FB, 0xC4A6, 0x85FD, 0xF4C3, 0x85FE, 0xF4BB, + 0x85FF, 0xF4B9, 0x8600, 0xF4BD, 0x8601, 0xF4BA, 0x8604, 0xF4BF, + 0x8605, 0xF4C1, 0x8606, 0xC4AA, 0x8607, 0xC4AC, 0x8609, 0xF4C0, + 0x860A, 0xC4AD, 0x860B, 0xC4AB, 0x860C, 0xF4C2, 0x8611, 0xC4A8, + 0x8617, 0xC4F4, 0x8618, 0xF5F1, 0x8619, 0xF5F7, 0x861A, 0xC4F6, + 0x861B, 0xF4BC, 0x861C, 0xF5F6, 0x861E, 0xF5FD, 0x861F, 0xF5F4, + 0x8620, 0xF5FB, 0x8621, 0xF5FA, 0x8622, 0xF4B8, 0x8623, 0xF5F5, + 0x8624, 0xF0B6, 0x8625, 0xF5FE, 0x8626, 0xF5F3, 0x8627, 0xF5F8, + 0x8629, 0xF5FC, 0x862A, 0xF5F2, 0x862C, 0xF74A, 0x862D, 0xC4F5, + 0x862E, 0xF5F9, 0x8631, 0xF7F4, 0x8632, 0xF74B, 0x8633, 0xF749, + 0x8634, 0xF747, 0x8635, 0xF748, 0x8636, 0xF74C, 0x8638, 0xC5D9, + 0x8639, 0xF7F2, 0x863A, 0xF7F0, 0x863B, 0xF7F5, 0x863C, 0xF7F3, + 0x863E, 0xF7F6, 0x863F, 0xC5DA, 0x8640, 0xF7F1, 0x8643, 0xF8BC, + 0x8646, 0xF945, 0x8647, 0xF946, 0x8648, 0xF947, 0x864B, 0xF9C7, + 0x864C, 0xF9BD, 0x864D, 0xCA4F, 0x864E, 0xAAEA, 0x8650, 0xAD68, + 0x8652, 0xD3B8, 0x8653, 0xD3B7, 0x8654, 0xB040, 0x8655, 0xB342, + 0x8656, 0xD77C, 0x8659, 0xD77B, 0x865B, 0xB5EA, 0x865C, 0xB8B8, + 0x865E, 0xB8B7, 0x865F, 0xB8B9, 0x8661, 0xE3D4, 0x8662, 0xE77E, + 0x8663, 0xEB58, 0x8664, 0xEB5A, 0x8665, 0xEB59, 0x8667, 0xC1AB, + 0x8668, 0xEE57, 0x8669, 0xF0BA, 0x866A, 0xF9A5, 0x866B, 0xA6E4, + 0x866D, 0xCDC9, 0x866E, 0xCDCA, 0x866F, 0xCDC8, 0x8670, 0xCDC7, + 0x8671, 0xAAEB, 0x8673, 0xD0A9, 0x8674, 0xD0A7, 0x8677, 0xD0A6, + 0x8679, 0xAD69, 0x867A, 0xAD6B, 0x867B, 0xAD6A, 0x867C, 0xD0A8, + 0x8685, 0xD3C4, 0x8686, 0xD3C1, 0x8687, 0xD3BF, 0x868A, 0xB041, + 0x868B, 0xD3C2, 0x868C, 0xB046, 0x868D, 0xD3BC, 0x868E, 0xD3CB, + 0x8690, 0xD3CD, 0x8691, 0xD3BD, 0x8693, 0xB043, 0x8694, 0xD3CE, + 0x8695, 0xD3C9, 0x8696, 0xD3BB, 0x8697, 0xD3C0, 0x8698, 0xD3CA, + 0x8699, 0xD3C6, 0x869A, 0xD3C3, 0x869C, 0xB048, 0x869D, 0xD3CC, + 0x869E, 0xD3BE, 0x86A1, 0xD3C7, 0x86A2, 0xD3B9, 0x86A3, 0xB047, + 0x86A4, 0xB044, 0x86A5, 0xD3C5, 0x86A7, 0xD3C8, 0x86A8, 0xD3BA, + 0x86A9, 0xB045, 0x86AA, 0xB042, 0x86AF, 0xB34C, 0x86B0, 0xD7A5, + 0x86B1, 0xB34B, 0x86B3, 0xD7A8, 0x86B4, 0xD7AB, 0x86B5, 0xB348, + 0x86B6, 0xB346, 0x86B7, 0xD77E, 0x86B8, 0xD7A9, 0x86B9, 0xD7A7, + 0x86BA, 0xD7A4, 0x86BB, 0xD7AC, 0x86BC, 0xD7AD, 0x86BD, 0xD7AF, + 0x86BE, 0xD7B0, 0x86BF, 0xD77D, 0x86C0, 0xB345, 0x86C1, 0xD7A2, + 0x86C2, 0xD7A1, 0x86C3, 0xD7AE, 0x86C4, 0xB347, 0x86C5, 0xD7A3, + 0x86C6, 0xB349, 0x86C7, 0xB344, 0x86C8, 0xD7A6, 0x86C9, 0xB34D, + 0x86CB, 0xB34A, 0x86CC, 0xD7AA, 0x86D0, 0xB5F1, 0x86D1, 0xDBBF, + 0x86D3, 0xDBB4, 0x86D4, 0xB5EE, 0x86D6, 0xDFE7, 0x86D7, 0xDBBD, + 0x86D8, 0xDBB1, 0x86D9, 0xB5EC, 0x86DA, 0xDBB6, 0x86DB, 0xB5EF, + 0x86DC, 0xDBBA, 0x86DD, 0xDBB8, 0x86DE, 0xB5F2, 0x86DF, 0xB5EB, + 0x86E2, 0xDBB2, 0x86E3, 0xDBB5, 0x86E4, 0xB5F0, 0x86E6, 0xDBB3, + 0x86E8, 0xDBBE, 0x86E9, 0xDBBC, 0x86EA, 0xDBB7, 0x86EB, 0xDBB9, + 0x86EC, 0xDBBB, 0x86ED, 0xB5ED, 0x86F5, 0xDFE8, 0x86F6, 0xDFEE, + 0x86F7, 0xDFE4, 0x86F8, 0xDFEA, 0x86F9, 0xB8BA, 0x86FA, 0xDFE6, + 0x86FB, 0xB8C0, 0x86FE, 0xB8BF, 0x8700, 0xB8BE, 0x8701, 0xDFED, + 0x8702, 0xB8C1, 0x8703, 0xB8C2, 0x8704, 0xDFE3, 0x8705, 0xDFF0, + 0x8706, 0xB8C3, 0x8707, 0xB8BD, 0x8708, 0xB8BC, 0x8709, 0xDFEC, + 0x870A, 0xB8C4, 0x870B, 0xDFE2, 0x870C, 0xDFE5, 0x870D, 0xDFEF, + 0x870E, 0xDFEB, 0x8711, 0xE3F4, 0x8712, 0xE3E9, 0x8713, 0xB8BB, + 0x8718, 0xBB6A, 0x8719, 0xE3DD, 0x871A, 0xE3F2, 0x871B, 0xE3DE, + 0x871C, 0xBB65, 0x871E, 0xE3DB, 0x8720, 0xE3E4, 0x8721, 0xE3DC, + 0x8722, 0xBB67, 0x8723, 0xE3D6, 0x8724, 0xE3F1, 0x8725, 0xBB68, + 0x8726, 0xE3EE, 0x8727, 0xE3EF, 0x8728, 0xE3D7, 0x8729, 0xBB6D, + 0x872A, 0xE3E6, 0x872C, 0xE3E0, 0x872D, 0xE3E7, 0x872E, 0xE3DA, + 0x8730, 0xE3F3, 0x8731, 0xE3EB, 0x8732, 0xE3E5, 0x8733, 0xE3D5, + 0x8734, 0xBB69, 0x8735, 0xE3EC, 0x8737, 0xBB6C, 0x8738, 0xE3F0, + 0x873A, 0xE3EA, 0x873B, 0xBB66, 0x873C, 0xE3E8, 0x873E, 0xE3E2, + 0x873F, 0xBB64, 0x8740, 0xE3D9, 0x8741, 0xE3E1, 0x8742, 0xE3ED, + 0x8743, 0xE3DF, 0x8746, 0xE3E3, 0x874C, 0xBDC1, 0x874D, 0xDFE9, + 0x874E, 0xE7B2, 0x874F, 0xE7BB, 0x8750, 0xE7B1, 0x8751, 0xE7AD, + 0x8752, 0xE7AA, 0x8753, 0xBDC2, 0x8754, 0xE7A8, 0x8755, 0xBB6B, + 0x8756, 0xE7A1, 0x8757, 0xBDC0, 0x8758, 0xE7A7, 0x8759, 0xBDBF, + 0x875A, 0xE7AC, 0x875B, 0xE7A9, 0x875C, 0xE7B9, 0x875D, 0xE7B4, + 0x875E, 0xE7AE, 0x875F, 0xE7B3, 0x8760, 0xBDBB, 0x8761, 0xE7AB, + 0x8762, 0xE7BE, 0x8763, 0xE7A2, 0x8764, 0xE7A3, 0x8765, 0xE7BA, + 0x8766, 0xBDBC, 0x8767, 0xE7BF, 0x8768, 0xBDBE, 0x8769, 0xE7C0, + 0x876A, 0xE7B0, 0x876B, 0xE3D8, 0x876C, 0xE7B6, 0x876D, 0xE7AF, + 0x876E, 0xE7B8, 0x876F, 0xE7B5, 0x8773, 0xE7A6, 0x8774, 0xBDB9, + 0x8775, 0xE7BD, 0x8776, 0xBDBA, 0x8777, 0xE7A4, 0x8778, 0xBDBD, + 0x8779, 0xEB64, 0x877A, 0xE7B7, 0x877B, 0xE7BC, 0x8781, 0xEB61, + 0x8782, 0xBDB8, 0x8783, 0xBFC0, 0x8784, 0xEB6B, 0x8785, 0xEB67, + 0x8787, 0xEB65, 0x8788, 0xEB60, 0x8789, 0xEB6F, 0x878D, 0xBFC4, + 0x878F, 0xEB5C, 0x8790, 0xEB68, 0x8791, 0xEB69, 0x8792, 0xEB5F, + 0x8793, 0xEB5E, 0x8794, 0xEB6C, 0x8796, 0xEB62, 0x8797, 0xEB5D, + 0x8798, 0xEB63, 0x879A, 0xEB6E, 0x879B, 0xEB5B, 0x879C, 0xEB6D, + 0x879D, 0xEB6A, 0x879E, 0xBFC2, 0x879F, 0xBFC1, 0x87A2, 0xBFC3, + 0x87A3, 0xEB66, 0x87A4, 0xF0CB, 0x87AA, 0xEE59, 0x87AB, 0xC1B1, + 0x87AC, 0xEE5D, 0x87AD, 0xEE5A, 0x87AE, 0xEE61, 0x87AF, 0xEE67, + 0x87B0, 0xEE5C, 0x87B2, 0xEE70, 0x87B3, 0xC1AE, 0x87B4, 0xEE6A, + 0x87B5, 0xEE5F, 0x87B6, 0xEE6B, 0x87B7, 0xEE66, 0x87B8, 0xEE6D, + 0x87B9, 0xEE5E, 0x87BA, 0xC1B3, 0x87BB, 0xC1B2, 0x87BC, 0xEE60, + 0x87BD, 0xEE6E, 0x87BE, 0xEE58, 0x87BF, 0xEE6C, 0x87C0, 0xC1AC, + 0x87C2, 0xEE64, 0x87C3, 0xEE63, 0x87C4, 0xEE68, 0x87C5, 0xEE5B, + 0x87C6, 0xC1B0, 0x87C8, 0xC1B4, 0x87C9, 0xEE62, 0x87CA, 0xEE69, + 0x87CB, 0xC1B5, 0x87CC, 0xEE65, 0x87D1, 0xC1AD, 0x87D2, 0xC1AF, + 0x87D3, 0xF0C7, 0x87D4, 0xF0C5, 0x87D7, 0xF0CC, 0x87D8, 0xF0C9, + 0x87D9, 0xF0CD, 0x87DB, 0xF0BE, 0x87DC, 0xF0C6, 0x87DD, 0xF0D1, + 0x87DE, 0xEE6F, 0x87DF, 0xF0C2, 0x87E0, 0xC2CF, 0x87E1, 0xE7A5, + 0x87E2, 0xF0BD, 0x87E3, 0xF0CA, 0x87E4, 0xF0C4, 0x87E5, 0xF0C1, + 0x87E6, 0xF0BC, 0x87E7, 0xF0BB, 0x87E8, 0xF0D0, 0x87EA, 0xF0C0, + 0x87EB, 0xF0BF, 0x87EC, 0xC2CD, 0x87ED, 0xF0C8, 0x87EF, 0xC2CC, + 0x87F2, 0xC2CE, 0x87F3, 0xF0C3, 0x87F4, 0xF0CF, 0x87F6, 0xF2DE, + 0x87F7, 0xF2DF, 0x87F9, 0xC3C9, 0x87FA, 0xF2DC, 0x87FB, 0xC3C6, + 0x87FC, 0xF2E4, 0x87FE, 0xC3CA, 0x87FF, 0xF2E6, 0x8800, 0xF2DB, + 0x8801, 0xF0CE, 0x8802, 0xF2E8, 0x8803, 0xF2DD, 0x8805, 0xC3C7, + 0x8806, 0xF2E3, 0x8808, 0xF2E5, 0x8809, 0xF2E0, 0x880A, 0xF2E7, + 0x880B, 0xF2E2, 0x880C, 0xF2E1, 0x880D, 0xC3C8, 0x8810, 0xF4C5, + 0x8811, 0xF4C6, 0x8813, 0xF4C8, 0x8814, 0xC4AE, 0x8815, 0xC4AF, + 0x8816, 0xF4C9, 0x8817, 0xF4C7, 0x8819, 0xF4C4, 0x881B, 0xF642, + 0x881C, 0xF645, 0x881D, 0xF641, 0x881F, 0xC4FA, 0x8820, 0xF643, + 0x8821, 0xC4F9, 0x8822, 0xC4F8, 0x8823, 0xC4F7, 0x8824, 0xF644, + 0x8825, 0xF751, 0x8826, 0xF74F, 0x8828, 0xF74E, 0x8829, 0xF640, + 0x882A, 0xF750, 0x882B, 0xF646, 0x882C, 0xF74D, 0x882E, 0xF7F9, + 0x882F, 0xF7D7, 0x8830, 0xF7F7, 0x8831, 0xC5DB, 0x8832, 0xF7F8, + 0x8833, 0xF7FA, 0x8835, 0xF8BF, 0x8836, 0xC5FA, 0x8837, 0xF8BE, + 0x8838, 0xF8BD, 0x8839, 0xC5FB, 0x883B, 0xC65A, 0x883C, 0xF96E, + 0x883D, 0xF9A7, 0x883E, 0xF9A6, 0x883F, 0xF9A8, 0x8840, 0xA6E5, + 0x8841, 0xD0AA, 0x8843, 0xD3CF, 0x8844, 0xD3D0, 0x8848, 0xDBC0, + 0x884A, 0xF647, 0x884B, 0xF8C0, 0x884C, 0xA6E6, 0x884D, 0xAD6C, + 0x884E, 0xD0AB, 0x8852, 0xD7B1, 0x8853, 0xB34E, 0x8855, 0xDBC2, + 0x8856, 0xDBC1, 0x8857, 0xB5F3, 0x8859, 0xB8C5, 0x885A, 0xE7C1, + 0x885B, 0xBDC3, 0x885D, 0xBDC4, 0x8861, 0xBFC5, 0x8862, 0xC5FC, + 0x8863, 0xA6E7, 0x8867, 0xD0AC, 0x8868, 0xAAED, 0x8869, 0xD0AE, + 0x886A, 0xD0AD, 0x886B, 0xAD6D, 0x886D, 0xD3D1, 0x886F, 0xD3D8, + 0x8870, 0xB049, 0x8871, 0xD3D6, 0x8872, 0xD3D4, 0x8874, 0xD3DB, + 0x8875, 0xD3D2, 0x8876, 0xD3D3, 0x8877, 0xB04A, 0x8879, 0xB04E, + 0x887C, 0xD3DC, 0x887D, 0xB04D, 0x887E, 0xD3DA, 0x887F, 0xD3D7, + 0x8880, 0xD3D5, 0x8881, 0xB04B, 0x8882, 0xB04C, 0x8883, 0xD3D9, + 0x8888, 0xB350, 0x8889, 0xD7B2, 0x888B, 0xB355, 0x888C, 0xD7C2, + 0x888D, 0xB354, 0x888E, 0xD7C4, 0x8891, 0xD7B8, 0x8892, 0xB352, + 0x8893, 0xD7C3, 0x8895, 0xD7B3, 0x8896, 0xB353, 0x8897, 0xD7BF, + 0x8898, 0xD7BB, 0x8899, 0xD7BD, 0x889A, 0xD7B7, 0x889B, 0xD7BE, + 0x889E, 0xB34F, 0x889F, 0xD7BA, 0x88A1, 0xD7B9, 0x88A2, 0xD7B5, + 0x88A4, 0xD7C0, 0x88A7, 0xD7BC, 0x88A8, 0xD7B4, 0x88AA, 0xD7B6, + 0x88AB, 0xB351, 0x88AC, 0xD7C1, 0x88B1, 0xB5F6, 0x88B2, 0xDBCD, + 0x88B6, 0xDBC9, 0x88B7, 0xDBCB, 0x88B8, 0xDBC6, 0x88B9, 0xDBC5, + 0x88BA, 0xDBC3, 0x88BC, 0xDBCA, 0x88BD, 0xDBCC, 0x88BE, 0xDBC8, + 0x88C0, 0xDBC7, 0x88C1, 0xB5F4, 0x88C2, 0xB5F5, 0x88C9, 0xDBCF, + 0x88CA, 0xB8CD, 0x88CB, 0xDFF2, 0x88CC, 0xDFF8, 0x88CD, 0xDFF3, + 0x88CE, 0xDFF4, 0x88CF, 0xF9D8, 0x88D0, 0xDFF9, 0x88D2, 0xB8CF, + 0x88D4, 0xB8C7, 0x88D5, 0xB8CE, 0x88D6, 0xDFF1, 0x88D7, 0xDBC4, + 0x88D8, 0xB8CA, 0x88D9, 0xB8C8, 0x88DA, 0xDFF7, 0x88DB, 0xDFF6, + 0x88DC, 0xB8C9, 0x88DD, 0xB8CB, 0x88DE, 0xDFF5, 0x88DF, 0xB8C6, + 0x88E1, 0xB8CC, 0x88E7, 0xE3F6, 0x88E8, 0xBB74, 0x88EB, 0xE442, + 0x88EC, 0xE441, 0x88EE, 0xE3FB, 0x88EF, 0xBB76, 0x88F0, 0xE440, + 0x88F1, 0xE3F7, 0x88F2, 0xE3F8, 0x88F3, 0xBB6E, 0x88F4, 0xBB70, + 0x88F6, 0xE3FD, 0x88F7, 0xE3F5, 0x88F8, 0xBB72, 0x88F9, 0xBB71, + 0x88FA, 0xE3F9, 0x88FB, 0xE3FE, 0x88FC, 0xE3FC, 0x88FD, 0xBB73, + 0x88FE, 0xE3FA, 0x8901, 0xDBCE, 0x8902, 0xBB6F, 0x8905, 0xE7C2, + 0x8906, 0xE7C9, 0x8907, 0xBDC6, 0x8909, 0xE7CD, 0x890A, 0xBDCA, + 0x890B, 0xE7C5, 0x890C, 0xE7C3, 0x890E, 0xE7CC, 0x8910, 0xBDC5, + 0x8911, 0xE7CB, 0x8912, 0xBDC7, 0x8913, 0xBDC8, 0x8914, 0xE7C4, + 0x8915, 0xBDC9, 0x8916, 0xE7CA, 0x8917, 0xE7C6, 0x8918, 0xE7C7, + 0x8919, 0xE7C8, 0x891A, 0xBB75, 0x891E, 0xEB70, 0x891F, 0xEB7C, + 0x8921, 0xBFCA, 0x8922, 0xEB77, 0x8923, 0xEB79, 0x8925, 0xBFC8, + 0x8926, 0xEB71, 0x8927, 0xEB75, 0x8929, 0xEB78, 0x892A, 0xBFC6, + 0x892B, 0xBFC9, 0x892C, 0xEB7B, 0x892D, 0xEB73, 0x892E, 0xEB74, + 0x892F, 0xEB7A, 0x8930, 0xEB72, 0x8931, 0xEB76, 0x8932, 0xBFC7, + 0x8933, 0xEE72, 0x8935, 0xEE71, 0x8936, 0xC1B7, 0x8937, 0xEE77, + 0x8938, 0xC1B9, 0x893B, 0xC1B6, 0x893C, 0xEE73, 0x893D, 0xC1BA, + 0x893E, 0xEE74, 0x8941, 0xEE75, 0x8942, 0xEE78, 0x8944, 0xC1B8, + 0x8946, 0xF0D6, 0x8949, 0xF0D9, 0x894B, 0xF0D3, 0x894C, 0xF0D5, + 0x894F, 0xF0D4, 0x8950, 0xF0D7, 0x8951, 0xF0D8, 0x8952, 0xEE76, + 0x8953, 0xF0D2, 0x8956, 0xC3CD, 0x8957, 0xF2EC, 0x8958, 0xF2EF, + 0x8959, 0xF2F1, 0x895A, 0xF2EA, 0x895B, 0xF2EB, 0x895C, 0xF2EE, + 0x895D, 0xF2F0, 0x895E, 0xC3CE, 0x895F, 0xC3CC, 0x8960, 0xC3CB, + 0x8961, 0xF2ED, 0x8962, 0xF2E9, 0x8963, 0xF4CA, 0x8964, 0xC4B0, + 0x8966, 0xF4CB, 0x8969, 0xF649, 0x896A, 0xC4FB, 0x896B, 0xF64B, + 0x896C, 0xC4FC, 0x896D, 0xF648, 0x896E, 0xF64A, 0x896F, 0xC5A8, + 0x8971, 0xF752, 0x8972, 0xC5A7, 0x8973, 0xF7FD, 0x8974, 0xF7FC, + 0x8976, 0xF7FB, 0x8979, 0xF948, 0x897A, 0xF949, 0x897B, 0xF94B, + 0x897C, 0xF94A, 0x897E, 0xCA50, 0x897F, 0xA6E8, 0x8981, 0xAD6E, + 0x8982, 0xD7C5, 0x8983, 0xB5F7, 0x8985, 0xDFFA, 0x8986, 0xC2D0, + 0x8988, 0xF2F2, 0x898B, 0xA8A3, 0x898F, 0xB357, 0x8993, 0xB356, + 0x8995, 0xDBD0, 0x8996, 0xB5F8, 0x8997, 0xDBD2, 0x8998, 0xDBD1, + 0x899B, 0xDFFB, 0x899C, 0xB8D0, 0x899D, 0xE443, 0x899E, 0xE446, + 0x899F, 0xE445, 0x89A1, 0xE444, 0x89A2, 0xE7CE, 0x89A3, 0xE7D0, + 0x89A4, 0xE7CF, 0x89A6, 0xBFCC, 0x89AA, 0xBFCB, 0x89AC, 0xC1BB, + 0x89AD, 0xEE79, 0x89AE, 0xEE7B, 0x89AF, 0xEE7A, 0x89B2, 0xC2D1, + 0x89B6, 0xF2F4, 0x89B7, 0xF2F3, 0x89B9, 0xF4CC, 0x89BA, 0xC4B1, + 0x89BD, 0xC4FD, 0x89BE, 0xF754, 0x89BF, 0xF753, 0x89C0, 0xC65B, + 0x89D2, 0xA8A4, 0x89D3, 0xD0AF, 0x89D4, 0xAD6F, 0x89D5, 0xD7C8, + 0x89D6, 0xD7C6, 0x89D9, 0xD7C7, 0x89DA, 0xDBD4, 0x89DB, 0xDBD5, + 0x89DC, 0xE043, 0x89DD, 0xDBD3, 0x89DF, 0xDFFC, 0x89E0, 0xE041, + 0x89E1, 0xE040, 0x89E2, 0xE042, 0x89E3, 0xB8D1, 0x89E4, 0xDFFE, + 0x89E5, 0xDFFD, 0x89E6, 0xE044, 0x89E8, 0xE449, 0x89E9, 0xE447, + 0x89EB, 0xE448, 0x89EC, 0xE7D3, 0x89ED, 0xE7D1, 0x89F0, 0xE7D2, + 0x89F1, 0xEB7D, 0x89F2, 0xEE7C, 0x89F3, 0xEE7D, 0x89F4, 0xC2D2, + 0x89F6, 0xF2F5, 0x89F7, 0xF4CD, 0x89F8, 0xC4B2, 0x89FA, 0xF64C, + 0x89FB, 0xF755, 0x89FC, 0xC5A9, 0x89FE, 0xF7FE, 0x89FF, 0xF94C, + 0x8A00, 0xA8A5, 0x8A02, 0xAD71, 0x8A03, 0xAD72, 0x8A04, 0xD0B0, + 0x8A07, 0xD0B1, 0x8A08, 0xAD70, 0x8A0A, 0xB054, 0x8A0C, 0xB052, + 0x8A0E, 0xB051, 0x8A0F, 0xB058, 0x8A10, 0xB050, 0x8A11, 0xB059, + 0x8A12, 0xD3DD, 0x8A13, 0xB056, 0x8A15, 0xB053, 0x8A16, 0xB057, + 0x8A17, 0xB055, 0x8A18, 0xB04F, 0x8A1B, 0xB35F, 0x8A1D, 0xB359, + 0x8A1E, 0xD7CC, 0x8A1F, 0xB35E, 0x8A22, 0xB360, 0x8A23, 0xB35A, + 0x8A25, 0xB35B, 0x8A27, 0xD7CA, 0x8A2A, 0xB358, 0x8A2C, 0xD7CB, + 0x8A2D, 0xB35D, 0x8A30, 0xD7C9, 0x8A31, 0xB35C, 0x8A34, 0xB644, + 0x8A36, 0xB646, 0x8A39, 0xDBD8, 0x8A3A, 0xB645, 0x8A3B, 0xB5F9, + 0x8A3C, 0xB5FD, 0x8A3E, 0xB8E4, 0x8A3F, 0xE049, 0x8A40, 0xDBDA, + 0x8A41, 0xB5FE, 0x8A44, 0xDBDD, 0x8A45, 0xDBDE, 0x8A46, 0xB643, + 0x8A48, 0xDBE0, 0x8A4A, 0xDBE2, 0x8A4C, 0xDBE3, 0x8A4D, 0xDBD7, + 0x8A4E, 0xDBD6, 0x8A4F, 0xDBE4, 0x8A50, 0xB642, 0x8A51, 0xDBE1, + 0x8A52, 0xDBDF, 0x8A54, 0xB640, 0x8A55, 0xB5FB, 0x8A56, 0xB647, + 0x8A57, 0xDBDB, 0x8A58, 0xDBDC, 0x8A59, 0xDBD9, 0x8A5B, 0xB641, + 0x8A5E, 0xB5FC, 0x8A60, 0xB5FA, 0x8A61, 0xE048, 0x8A62, 0xB8DF, + 0x8A63, 0xB8DA, 0x8A66, 0xB8D5, 0x8A68, 0xB8E5, 0x8A69, 0xB8D6, + 0x8A6B, 0xB8D2, 0x8A6C, 0xB8E1, 0x8A6D, 0xB8DE, 0x8A6E, 0xB8E0, + 0x8A70, 0xB8D7, 0x8A71, 0xB8DC, 0x8A72, 0xB8D3, 0x8A73, 0xB8D4, + 0x8A74, 0xE050, 0x8A75, 0xE04D, 0x8A76, 0xE045, 0x8A77, 0xE04A, + 0x8A79, 0xB8E2, 0x8A7A, 0xE051, 0x8A7B, 0xB8E3, 0x8A7C, 0xB8D9, + 0x8A7F, 0xE047, 0x8A81, 0xE04F, 0x8A82, 0xE04B, 0x8A83, 0xE04E, + 0x8A84, 0xE04C, 0x8A85, 0xB8DD, 0x8A86, 0xE046, 0x8A87, 0xB8D8, + 0x8A8B, 0xE44C, 0x8A8C, 0xBB78, 0x8A8D, 0xBB7B, 0x8A8F, 0xE44E, + 0x8A91, 0xBBA5, 0x8A92, 0xE44D, 0x8A93, 0xBB7D, 0x8A95, 0xBDCF, + 0x8A96, 0xE44F, 0x8A98, 0xBBA4, 0x8A99, 0xE44B, 0x8A9A, 0xBBA6, + 0x8A9E, 0xBB79, 0x8AA0, 0xB8DB, 0x8AA1, 0xBB7C, 0x8AA3, 0xBB7A, + 0x8AA4, 0xBB7E, 0x8AA5, 0xBBA2, 0x8AA6, 0xBB77, 0x8AA7, 0xBBA7, + 0x8AA8, 0xBBA3, 0x8AAA, 0xBBA1, 0x8AAB, 0xE44A, 0x8AB0, 0xBDD6, + 0x8AB2, 0xBDD2, 0x8AB6, 0xBDD9, 0x8AB8, 0xE7D6, 0x8AB9, 0xBDDA, + 0x8ABA, 0xE7E2, 0x8ABB, 0xE7DB, 0x8ABC, 0xBDCB, 0x8ABD, 0xE7E3, + 0x8ABE, 0xE7DD, 0x8ABF, 0xBDD5, 0x8AC0, 0xE7DE, 0x8AC2, 0xBDD4, + 0x8AC3, 0xE7E1, 0x8AC4, 0xBDCE, 0x8AC5, 0xE7DF, 0x8AC6, 0xE7D5, + 0x8AC7, 0xBDCD, 0x8AC8, 0xEBAA, 0x8AC9, 0xBDD3, 0x8ACB, 0xBDD0, + 0x8ACD, 0xBDD8, 0x8ACF, 0xE7D4, 0x8AD1, 0xE7D8, 0x8AD2, 0xBDCC, + 0x8AD3, 0xE7D7, 0x8AD4, 0xE7D9, 0x8AD5, 0xE7DA, 0x8AD6, 0xBDD7, + 0x8AD7, 0xE7DC, 0x8AD8, 0xE7E0, 0x8AD9, 0xE7E4, 0x8ADB, 0xBDDB, + 0x8ADC, 0xBFD2, 0x8ADD, 0xEBA5, 0x8ADE, 0xEBAB, 0x8ADF, 0xEBA8, + 0x8AE0, 0xEB7E, 0x8AE1, 0xEBAC, 0x8AE2, 0xEBA1, 0x8AE4, 0xEBA7, + 0x8AE6, 0xBFCD, 0x8AE7, 0xBFD3, 0x8AE8, 0xEBAD, 0x8AEB, 0xBFCF, + 0x8AED, 0xBFD9, 0x8AEE, 0xBFD4, 0x8AEF, 0xEBAF, 0x8AF0, 0xEBA9, + 0x8AF1, 0xBFD0, 0x8AF2, 0xEBA2, 0x8AF3, 0xBFDA, 0x8AF4, 0xEBA3, + 0x8AF5, 0xEBA4, 0x8AF6, 0xBFDB, 0x8AF7, 0xBFD8, 0x8AF8, 0xBDD1, + 0x8AFA, 0xBFCE, 0x8AFB, 0xEBB0, 0x8AFC, 0xBFDC, 0x8AFE, 0xBFD5, + 0x8AFF, 0xEBAE, 0x8B00, 0xBFD1, 0x8B01, 0xBFD6, 0x8B02, 0xBFD7, + 0x8B04, 0xC1C3, 0x8B05, 0xEEA4, 0x8B06, 0xEEAD, 0x8B07, 0xEEAA, + 0x8B08, 0xEEAC, 0x8B0A, 0xC1C0, 0x8B0B, 0xEEA5, 0x8B0D, 0xEEAB, + 0x8B0E, 0xC1BC, 0x8B0F, 0xEEA7, 0x8B10, 0xC1C4, 0x8B11, 0xEEA3, + 0x8B12, 0xEEA8, 0x8B13, 0xEEAF, 0x8B14, 0xEBA6, 0x8B15, 0xEEA9, + 0x8B16, 0xEEA2, 0x8B17, 0xC1BD, 0x8B18, 0xEEA1, 0x8B19, 0xC1BE, + 0x8B1A, 0xEEB0, 0x8B1B, 0xC1BF, 0x8B1C, 0xEEAE, 0x8B1D, 0xC1C2, + 0x8B1E, 0xEE7E, 0x8B20, 0xC1C1, 0x8B22, 0xEEA6, 0x8B23, 0xF0DC, + 0x8B24, 0xF0EA, 0x8B25, 0xF0E5, 0x8B26, 0xF0E7, 0x8B27, 0xF0DB, + 0x8B28, 0xC2D3, 0x8B2A, 0xF0DA, 0x8B2B, 0xC2D6, 0x8B2C, 0xC2D5, + 0x8B2E, 0xF0E9, 0x8B2F, 0xF0E1, 0x8B30, 0xF0DE, 0x8B31, 0xF0E4, + 0x8B33, 0xF0DD, 0x8B35, 0xF0DF, 0x8B36, 0xF0E8, 0x8B37, 0xF0E6, + 0x8B39, 0xC2D4, 0x8B3A, 0xF0ED, 0x8B3B, 0xF0EB, 0x8B3C, 0xF0E2, + 0x8B3D, 0xF0EC, 0x8B3E, 0xF0E3, 0x8B40, 0xF2F9, 0x8B41, 0xC3CF, + 0x8B42, 0xF341, 0x8B45, 0xF64F, 0x8B46, 0xC3D6, 0x8B47, 0xF0E0, + 0x8B48, 0xF2F7, 0x8B49, 0xC3D2, 0x8B4A, 0xF2F8, 0x8B4B, 0xF2FD, + 0x8B4E, 0xC3D4, 0x8B4F, 0xC3D5, 0x8B50, 0xF2F6, 0x8B51, 0xF340, + 0x8B52, 0xF342, 0x8B53, 0xF2FA, 0x8B54, 0xF2FC, 0x8B55, 0xF2FE, + 0x8B56, 0xF2FB, 0x8B57, 0xF343, 0x8B58, 0xC3D1, 0x8B59, 0xC3D7, + 0x8B5A, 0xC3D3, 0x8B5C, 0xC3D0, 0x8B5D, 0xF4D0, 0x8B5F, 0xC4B7, + 0x8B60, 0xF4CE, 0x8B63, 0xF4D2, 0x8B65, 0xF4D3, 0x8B66, 0xC4B5, + 0x8B67, 0xF4D4, 0x8B68, 0xF4D1, 0x8B6A, 0xF4CF, 0x8B6B, 0xC4B8, + 0x8B6C, 0xC4B4, 0x8B6D, 0xF4D5, 0x8B6F, 0xC4B6, 0x8B70, 0xC4B3, + 0x8B74, 0xC4FE, 0x8B77, 0xC540, 0x8B78, 0xF64E, 0x8B79, 0xF64D, + 0x8B7A, 0xF650, 0x8B7B, 0xF651, 0x8B7D, 0xC541, 0x8B7E, 0xF756, + 0x8B7F, 0xF75B, 0x8B80, 0xC5AA, 0x8B82, 0xF758, 0x8B84, 0xF757, + 0x8B85, 0xF75A, 0x8B86, 0xF759, 0x8B88, 0xF843, 0x8B8A, 0xC5DC, + 0x8B8B, 0xF842, 0x8B8C, 0xF840, 0x8B8E, 0xF841, 0x8B92, 0xC5FE, + 0x8B93, 0xC5FD, 0x8B94, 0xF8C1, 0x8B95, 0xF8C2, 0x8B96, 0xC640, + 0x8B98, 0xF94D, 0x8B99, 0xF94E, 0x8B9A, 0xC667, 0x8B9C, 0xC66D, + 0x8B9E, 0xF9A9, 0x8B9F, 0xF9C8, 0x8C37, 0xA8A6, 0x8C39, 0xD7CD, + 0x8C3B, 0xD7CE, 0x8C3C, 0xE052, 0x8C3D, 0xE450, 0x8C3E, 0xE7E5, + 0x8C3F, 0xC1C6, 0x8C41, 0xC1C5, 0x8C42, 0xF0EE, 0x8C43, 0xF344, + 0x8C45, 0xF844, 0x8C46, 0xA8A7, 0x8C47, 0xD3DE, 0x8C48, 0xB05A, + 0x8C49, 0xB361, 0x8C4A, 0xE054, 0x8C4B, 0xE053, 0x8C4C, 0xBDDC, + 0x8C4D, 0xE7E6, 0x8C4E, 0xBDDD, 0x8C4F, 0xEEB1, 0x8C50, 0xC2D7, + 0x8C54, 0xC676, 0x8C55, 0xA8A8, 0x8C56, 0xCDCB, 0x8C57, 0xD3DF, + 0x8C5A, 0xB362, 0x8C5C, 0xD7CF, 0x8C5D, 0xD7D0, 0x8C5F, 0xDBE5, + 0x8C61, 0xB648, 0x8C62, 0xB8E6, 0x8C64, 0xE056, 0x8C65, 0xE055, + 0x8C66, 0xE057, 0x8C68, 0xE451, 0x8C69, 0xE452, 0x8C6A, 0xBBA8, + 0x8C6B, 0xBFDD, 0x8C6C, 0xBDDE, 0x8C6D, 0xBFDE, 0x8C6F, 0xEEB5, + 0x8C70, 0xEEB2, 0x8C71, 0xEEB4, 0x8C72, 0xEEB3, 0x8C73, 0xC1C7, + 0x8C75, 0xF0EF, 0x8C76, 0xF346, 0x8C77, 0xF345, 0x8C78, 0xCBA4, + 0x8C79, 0xB05C, 0x8C7A, 0xB05B, 0x8C7B, 0xD3E0, 0x8C7D, 0xD7D1, + 0x8C80, 0xDBE7, 0x8C81, 0xDBE6, 0x8C82, 0xB649, 0x8C84, 0xE059, + 0x8C85, 0xE05A, 0x8C86, 0xE058, 0x8C89, 0xB8E8, 0x8C8A, 0xB8E7, + 0x8C8C, 0xBBAA, 0x8C8D, 0xBBA9, 0x8C8F, 0xE7E7, 0x8C90, 0xEBB3, + 0x8C91, 0xEBB1, 0x8C92, 0xEBB2, 0x8C93, 0xBFDF, 0x8C94, 0xEEB7, + 0x8C95, 0xEEB6, 0x8C97, 0xF0F2, 0x8C98, 0xF0F1, 0x8C99, 0xF0F0, + 0x8C9A, 0xF347, 0x8C9C, 0xF9AA, 0x8C9D, 0xA8A9, 0x8C9E, 0xAD73, + 0x8CA0, 0xAD74, 0x8CA1, 0xB05D, 0x8CA2, 0xB05E, 0x8CA3, 0xD3E2, + 0x8CA4, 0xD3E1, 0x8CA5, 0xD7D2, 0x8CA7, 0xB368, 0x8CA8, 0xB366, + 0x8CA9, 0xB363, 0x8CAA, 0xB367, 0x8CAB, 0xB365, 0x8CAC, 0xB364, + 0x8CAF, 0xB64A, 0x8CB0, 0xDBEA, 0x8CB2, 0xB8ED, 0x8CB3, 0xB64C, + 0x8CB4, 0xB651, 0x8CB5, 0xDBEC, 0x8CB6, 0xB653, 0x8CB7, 0xB652, + 0x8CB8, 0xB655, 0x8CB9, 0xDBEB, 0x8CBA, 0xDBE8, 0x8CBB, 0xB64F, + 0x8CBC, 0xB64B, 0x8CBD, 0xB64D, 0x8CBE, 0xDBE9, 0x8CBF, 0xB654, + 0x8CC0, 0xB650, 0x8CC1, 0xB64E, 0x8CC2, 0xB8EF, 0x8CC3, 0xB8EE, + 0x8CC4, 0xB8EC, 0x8CC5, 0xB8F0, 0x8CC7, 0xB8EA, 0x8CC8, 0xB8EB, + 0x8CCA, 0xB8E9, 0x8CCC, 0xE05B, 0x8CCF, 0xE454, 0x8CD1, 0xBBAC, + 0x8CD2, 0xBBAD, 0x8CD3, 0xBBAB, 0x8CD5, 0xE453, 0x8CD7, 0xE455, + 0x8CD9, 0xE7EA, 0x8CDA, 0xE7EC, 0x8CDC, 0xBDE7, 0x8CDD, 0xE7ED, + 0x8CDE, 0xBDE0, 0x8CDF, 0xE7E9, 0x8CE0, 0xBDDF, 0x8CE1, 0xBDE9, + 0x8CE2, 0xBDE5, 0x8CE3, 0xBDE6, 0x8CE4, 0xBDE2, 0x8CE5, 0xE7E8, + 0x8CE6, 0xBDE1, 0x8CE7, 0xE7EE, 0x8CE8, 0xE7EB, 0x8CEA, 0xBDE8, + 0x8CEC, 0xBDE3, 0x8CED, 0xBDE4, 0x8CEE, 0xEBB5, 0x8CF0, 0xEBB7, + 0x8CF1, 0xEBB6, 0x8CF3, 0xEBB8, 0x8CF4, 0xBFE0, 0x8CF5, 0xEBB4, + 0x8CF8, 0xC1CB, 0x8CF9, 0xEEB8, 0x8CFA, 0xC1C8, 0x8CFB, 0xC1CC, + 0x8CFC, 0xC1CA, 0x8CFD, 0xC1C9, 0x8CFE, 0xF0F3, 0x8D00, 0xF0F6, + 0x8D02, 0xF0F5, 0x8D04, 0xF0F4, 0x8D05, 0xC2D8, 0x8D06, 0xF348, + 0x8D07, 0xF349, 0x8D08, 0xC3D8, 0x8D09, 0xF34A, 0x8D0A, 0xC3D9, + 0x8D0D, 0xC4BA, 0x8D0F, 0xC4B9, 0x8D10, 0xF652, 0x8D13, 0xC542, + 0x8D14, 0xF653, 0x8D15, 0xF75C, 0x8D16, 0xC5AB, 0x8D17, 0xC5AC, + 0x8D19, 0xF845, 0x8D1B, 0xC642, 0x8D64, 0xA8AA, 0x8D66, 0xB36A, + 0x8D67, 0xB369, 0x8D68, 0xE05C, 0x8D69, 0xE05D, 0x8D6B, 0xBBAE, + 0x8D6C, 0xEBB9, 0x8D6D, 0xBDEA, 0x8D6E, 0xEBBA, 0x8D6F, 0xEEB9, + 0x8D70, 0xA8AB, 0x8D72, 0xD0B2, 0x8D73, 0xAD76, 0x8D74, 0xAD75, + 0x8D76, 0xD3E3, 0x8D77, 0xB05F, 0x8D78, 0xD3E4, 0x8D79, 0xD7D5, + 0x8D7B, 0xD7D4, 0x8D7D, 0xD7D3, 0x8D80, 0xDBEE, 0x8D81, 0xB658, + 0x8D84, 0xDBED, 0x8D85, 0xB657, 0x8D89, 0xDBEF, 0x8D8A, 0xB656, + 0x8D8C, 0xE05F, 0x8D8D, 0xE062, 0x8D8E, 0xE060, 0x8D8F, 0xE061, + 0x8D90, 0xE065, 0x8D91, 0xE05E, 0x8D92, 0xE066, 0x8D93, 0xE063, + 0x8D94, 0xE064, 0x8D95, 0xBBB0, 0x8D96, 0xE456, 0x8D99, 0xBBAF, + 0x8D9B, 0xE7F2, 0x8D9C, 0xE7F0, 0x8D9F, 0xBDEB, 0x8DA0, 0xE7EF, + 0x8DA1, 0xE7F1, 0x8DA3, 0xBDEC, 0x8DA5, 0xEBBB, 0x8DA7, 0xEBBC, + 0x8DA8, 0xC1CD, 0x8DAA, 0xF34C, 0x8DAB, 0xF34E, 0x8DAC, 0xF34B, + 0x8DAD, 0xF34D, 0x8DAE, 0xF4D6, 0x8DAF, 0xF654, 0x8DB2, 0xF96F, + 0x8DB3, 0xA8AC, 0x8DB4, 0xAD77, 0x8DB5, 0xD3E5, 0x8DB6, 0xD3E7, + 0x8DB7, 0xD3E6, 0x8DB9, 0xD7D8, 0x8DBA, 0xB36C, 0x8DBC, 0xD7D6, + 0x8DBE, 0xB36B, 0x8DBF, 0xD7D9, 0x8DC1, 0xD7DA, 0x8DC2, 0xD7D7, + 0x8DC5, 0xDBFB, 0x8DC6, 0xB660, 0x8DC7, 0xDBF3, 0x8DC8, 0xDBF9, + 0x8DCB, 0xB65B, 0x8DCC, 0xB65E, 0x8DCD, 0xDBF2, 0x8DCE, 0xB659, + 0x8DCF, 0xDBF6, 0x8DD0, 0xE06C, 0x8DD1, 0xB65D, 0x8DD3, 0xDBF1, + 0x8DD5, 0xDBF7, 0x8DD6, 0xDBF4, 0x8DD7, 0xDBFA, 0x8DD8, 0xDBF0, + 0x8DD9, 0xDBF8, 0x8DDA, 0xB65C, 0x8DDB, 0xB65F, 0x8DDC, 0xDBF5, + 0x8DDD, 0xB65A, 0x8DDF, 0xB8F2, 0x8DE0, 0xE068, 0x8DE1, 0xB8F1, + 0x8DE2, 0xE06F, 0x8DE3, 0xE06E, 0x8DE4, 0xB8F8, 0x8DE6, 0xB8F9, + 0x8DE7, 0xE070, 0x8DE8, 0xB8F3, 0x8DE9, 0xE06D, 0x8DEA, 0xB8F7, + 0x8DEB, 0xE072, 0x8DEC, 0xE069, 0x8DEE, 0xE06B, 0x8DEF, 0xB8F4, + 0x8DF0, 0xE067, 0x8DF1, 0xE06A, 0x8DF2, 0xE071, 0x8DF3, 0xB8F5, + 0x8DF4, 0xE073, 0x8DFA, 0xB8F6, 0x8DFC, 0xBBB1, 0x8DFD, 0xE45B, + 0x8DFE, 0xE461, 0x8DFF, 0xE459, 0x8E00, 0xE462, 0x8E02, 0xE458, + 0x8E03, 0xE45D, 0x8E04, 0xE463, 0x8E05, 0xE460, 0x8E06, 0xE45F, + 0x8E07, 0xE45E, 0x8E09, 0xE457, 0x8E0A, 0xE45C, 0x8E0D, 0xE45A, + 0x8E0F, 0xBDF1, 0x8E10, 0xBDEE, 0x8E11, 0xE7FB, 0x8E12, 0xE841, + 0x8E13, 0xE843, 0x8E14, 0xE840, 0x8E15, 0xE7F8, 0x8E16, 0xE7FA, + 0x8E17, 0xE845, 0x8E18, 0xE842, 0x8E19, 0xE7FC, 0x8E1A, 0xE846, + 0x8E1B, 0xE7F9, 0x8E1C, 0xE844, 0x8E1D, 0xBDEF, 0x8E1E, 0xBDF5, + 0x8E1F, 0xBDF3, 0x8E20, 0xE7F3, 0x8E21, 0xBDF4, 0x8E22, 0xBDF0, + 0x8E23, 0xE7F4, 0x8E24, 0xE7F6, 0x8E25, 0xE7F5, 0x8E26, 0xE7FD, + 0x8E27, 0xE7FE, 0x8E29, 0xBDF2, 0x8E2B, 0xBDED, 0x8E2E, 0xE7F7, + 0x8E30, 0xEBC6, 0x8E31, 0xBFE2, 0x8E33, 0xEBBD, 0x8E34, 0xBFE3, + 0x8E35, 0xBFE6, 0x8E36, 0xEBC2, 0x8E38, 0xEBBF, 0x8E39, 0xBFE5, + 0x8E3C, 0xEBC3, 0x8E3D, 0xEBC4, 0x8E3E, 0xEBBE, 0x8E3F, 0xEBC7, + 0x8E40, 0xEBC0, 0x8E41, 0xEBC5, 0x8E42, 0xBFE4, 0x8E44, 0xBFE1, + 0x8E45, 0xEBC1, 0x8E47, 0xEEBF, 0x8E48, 0xC1D0, 0x8E49, 0xC1CE, + 0x8E4A, 0xC1D1, 0x8E4B, 0xC1CF, 0x8E4C, 0xEEBE, 0x8E4D, 0xEEBB, + 0x8E4E, 0xEEBA, 0x8E50, 0xEEBD, 0x8E53, 0xEEBC, 0x8E54, 0xF145, + 0x8E55, 0xC2DE, 0x8E56, 0xF0FB, 0x8E57, 0xF0FA, 0x8E59, 0xC2D9, + 0x8E5A, 0xF141, 0x8E5B, 0xF140, 0x8E5C, 0xF0F7, 0x8E5D, 0xF143, + 0x8E5E, 0xF0FC, 0x8E5F, 0xC2DD, 0x8E60, 0xF0F9, 0x8E61, 0xF142, + 0x8E62, 0xF0F8, 0x8E63, 0xC2DA, 0x8E64, 0xC2DC, 0x8E65, 0xF0FD, + 0x8E66, 0xC2DB, 0x8E67, 0xF0FE, 0x8E69, 0xF144, 0x8E6A, 0xF352, + 0x8E6C, 0xC3DE, 0x8E6D, 0xF34F, 0x8E6F, 0xF353, 0x8E72, 0xC3DB, + 0x8E73, 0xF351, 0x8E74, 0xC3E0, 0x8E76, 0xC3DD, 0x8E78, 0xF350, + 0x8E7A, 0xC3DF, 0x8E7B, 0xF354, 0x8E7C, 0xC3DA, 0x8E81, 0xC4BC, + 0x8E82, 0xC4BE, 0x8E84, 0xF4D9, 0x8E85, 0xC4BD, 0x8E86, 0xF4D7, + 0x8E87, 0xC3DC, 0x8E88, 0xF4D8, 0x8E89, 0xC4BB, 0x8E8A, 0xC543, + 0x8E8B, 0xC545, 0x8E8C, 0xF656, 0x8E8D, 0xC544, 0x8E8E, 0xF655, + 0x8E90, 0xF761, 0x8E91, 0xC5AD, 0x8E92, 0xF760, 0x8E93, 0xC5AE, + 0x8E94, 0xF75E, 0x8E95, 0xF75D, 0x8E96, 0xF762, 0x8E97, 0xF763, + 0x8E98, 0xF846, 0x8E9A, 0xF75F, 0x8E9D, 0xF8C6, 0x8E9E, 0xF8C3, + 0x8E9F, 0xF8C4, 0x8EA0, 0xF8C5, 0x8EA1, 0xC65C, 0x8EA3, 0xF951, + 0x8EA4, 0xF950, 0x8EA5, 0xF94F, 0x8EA6, 0xF970, 0x8EA8, 0xF9BE, + 0x8EA9, 0xF9AB, 0x8EAA, 0xC66E, 0x8EAB, 0xA8AD, 0x8EAC, 0xB060, + 0x8EB2, 0xB8FA, 0x8EBA, 0xBDF6, 0x8EBD, 0xEBC8, 0x8EC0, 0xC2DF, + 0x8EC2, 0xF355, 0x8EC9, 0xF9AC, 0x8ECA, 0xA8AE, 0x8ECB, 0xAAEE, + 0x8ECC, 0xAD79, 0x8ECD, 0xAD78, 0x8ECF, 0xB063, 0x8ED1, 0xD3E8, + 0x8ED2, 0xB061, 0x8ED3, 0xD3E9, 0x8ED4, 0xB062, 0x8ED7, 0xD7DF, + 0x8ED8, 0xD7DB, 0x8EDB, 0xB36D, 0x8EDC, 0xD7DE, 0x8EDD, 0xD7DD, + 0x8EDE, 0xD7DC, 0x8EDF, 0xB36E, 0x8EE0, 0xD7E0, 0x8EE1, 0xD7E1, + 0x8EE5, 0xDC43, 0x8EE6, 0xDC41, 0x8EE7, 0xDC45, 0x8EE8, 0xDC46, + 0x8EE9, 0xDC4C, 0x8EEB, 0xDC48, 0x8EEC, 0xDC4A, 0x8EEE, 0xDC42, + 0x8EEF, 0xDBFC, 0x8EF1, 0xDC49, 0x8EF4, 0xDC4B, 0x8EF5, 0xDC44, + 0x8EF6, 0xDC47, 0x8EF7, 0xDBFD, 0x8EF8, 0xB662, 0x8EF9, 0xDC40, + 0x8EFA, 0xDBFE, 0x8EFB, 0xB661, 0x8EFC, 0xB663, 0x8EFE, 0xB8FD, + 0x8EFF, 0xE075, 0x8F00, 0xE077, 0x8F01, 0xE076, 0x8F02, 0xE07B, + 0x8F03, 0xB8FB, 0x8F05, 0xE078, 0x8F06, 0xE074, 0x8F07, 0xE079, + 0x8F08, 0xE07A, 0x8F09, 0xB8FC, 0x8F0A, 0xB8FE, 0x8F0B, 0xE07C, + 0x8F0D, 0xE467, 0x8F0E, 0xE466, 0x8F10, 0xE464, 0x8F11, 0xE465, + 0x8F12, 0xBBB3, 0x8F13, 0xBBB5, 0x8F14, 0xBBB2, 0x8F15, 0xBBB4, + 0x8F16, 0xE84D, 0x8F17, 0xE84E, 0x8F18, 0xE849, 0x8F1A, 0xE84A, + 0x8F1B, 0xBDF8, 0x8F1C, 0xBDFD, 0x8F1D, 0xBDF7, 0x8F1E, 0xBDFE, + 0x8F1F, 0xBDF9, 0x8F20, 0xE84B, 0x8F23, 0xE84C, 0x8F24, 0xE848, + 0x8F25, 0xBE40, 0x8F26, 0xBDFB, 0x8F29, 0xBDFA, 0x8F2A, 0xBDFC, + 0x8F2C, 0xE847, 0x8F2E, 0xEBCA, 0x8F2F, 0xBFE8, 0x8F32, 0xEBCC, + 0x8F33, 0xBFEA, 0x8F34, 0xEBCF, 0x8F35, 0xEBCB, 0x8F36, 0xEBC9, + 0x8F37, 0xEBCE, 0x8F38, 0xBFE9, 0x8F39, 0xEBCD, 0x8F3B, 0xBFE7, + 0x8F3E, 0xC1D3, 0x8F3F, 0xC1D6, 0x8F40, 0xEEC1, 0x8F42, 0xC1D4, + 0x8F43, 0xEEC0, 0x8F44, 0xC1D2, 0x8F45, 0xC1D5, 0x8F46, 0xF146, + 0x8F47, 0xF147, 0x8F48, 0xF148, 0x8F49, 0xC2E0, 0x8F4B, 0xF149, + 0x8F4D, 0xC2E1, 0x8F4E, 0xC3E2, 0x8F4F, 0xF358, 0x8F50, 0xF359, + 0x8F51, 0xF357, 0x8F52, 0xF356, 0x8F53, 0xF35A, 0x8F54, 0xC3E1, + 0x8F55, 0xF4DD, 0x8F56, 0xF4DB, 0x8F57, 0xF4DC, 0x8F58, 0xF4DE, + 0x8F59, 0xF4DA, 0x8F5A, 0xF4DF, 0x8F5B, 0xF658, 0x8F5D, 0xF659, + 0x8F5E, 0xF657, 0x8F5F, 0xC546, 0x8F60, 0xF764, 0x8F61, 0xC5AF, + 0x8F62, 0xF765, 0x8F63, 0xF848, 0x8F64, 0xF847, 0x8F9B, 0xA8AF, + 0x8F9C, 0xB664, 0x8F9F, 0xB940, 0x8FA3, 0xBBB6, 0x8FA6, 0xBFEC, + 0x8FA8, 0xBFEB, 0x8FAD, 0xC3E3, 0x8FAE, 0xC47C, 0x8FAF, 0xC547, + 0x8FB0, 0xA8B0, 0x8FB1, 0xB064, 0x8FB2, 0xB941, 0x8FB4, 0xF35B, + 0x8FBF, 0xCBA6, 0x8FC2, 0xA8B1, 0x8FC4, 0xA8B4, 0x8FC5, 0xA8B3, + 0x8FC6, 0xA8B2, 0x8FC9, 0xCBA5, 0x8FCB, 0xCDCD, 0x8FCD, 0xCDCF, + 0x8FCE, 0xAAEF, 0x8FD1, 0xAAF1, 0x8FD2, 0xCDCC, 0x8FD3, 0xCDCE, + 0x8FD4, 0xAAF0, 0x8FD5, 0xCDD1, 0x8FD6, 0xCDD0, 0x8FD7, 0xCDD2, + 0x8FE0, 0xD0B6, 0x8FE1, 0xD0B4, 0x8FE2, 0xAD7C, 0x8FE3, 0xD0B3, + 0x8FE4, 0xADA3, 0x8FE5, 0xAD7E, 0x8FE6, 0xAD7B, 0x8FE8, 0xADA4, + 0x8FEA, 0xAD7D, 0x8FEB, 0xADA2, 0x8FED, 0xADA1, 0x8FEE, 0xD0B5, + 0x8FF0, 0xAD7A, 0x8FF4, 0xB06A, 0x8FF5, 0xD3EB, 0x8FF6, 0xD3F1, + 0x8FF7, 0xB067, 0x8FF8, 0xB06E, 0x8FFA, 0xB069, 0x8FFB, 0xD3EE, + 0x8FFC, 0xD3F0, 0x8FFD, 0xB06C, 0x8FFE, 0xD3EA, 0x8FFF, 0xD3ED, + 0x9000, 0xB068, 0x9001, 0xB065, 0x9002, 0xD3EC, 0x9003, 0xB06B, + 0x9004, 0xD3EF, 0x9005, 0xB06D, 0x9006, 0xB066, 0x900B, 0xD7E3, + 0x900C, 0xD7E6, 0x900D, 0xB370, 0x900F, 0xB37A, 0x9010, 0xB376, + 0x9011, 0xD7E4, 0x9014, 0xB37E, 0x9015, 0xB377, 0x9016, 0xB37C, + 0x9017, 0xB372, 0x9019, 0xB36F, 0x901A, 0xB371, 0x901B, 0xB37D, + 0x901C, 0xD7E5, 0x901D, 0xB375, 0x901E, 0xB378, 0x901F, 0xB374, + 0x9020, 0xB379, 0x9021, 0xD7E7, 0x9022, 0xB37B, 0x9023, 0xB373, + 0x9024, 0xD7E2, 0x902D, 0xDC4D, 0x902E, 0xB665, 0x902F, 0xDC4F, + 0x9031, 0xB667, 0x9032, 0xB669, 0x9034, 0xDC4E, 0x9035, 0xB666, + 0x9036, 0xB66A, 0x9038, 0xB668, 0x903C, 0xB947, 0x903D, 0xE0A3, + 0x903E, 0xB94F, 0x903F, 0xE07E, 0x9041, 0xB950, 0x9042, 0xB945, + 0x9044, 0xE0A1, 0x9047, 0xB94A, 0x9049, 0xE0A2, 0x904A, 0xB943, + 0x904B, 0xB942, 0x904D, 0xB94D, 0x904E, 0xB94C, 0x904F, 0xB94B, + 0x9050, 0xB949, 0x9051, 0xB94E, 0x9052, 0xE07D, 0x9053, 0xB944, + 0x9054, 0xB946, 0x9055, 0xB948, 0x9058, 0xBBB8, 0x9059, 0xBBBB, + 0x905B, 0xBBBF, 0x905C, 0xBBB9, 0x905D, 0xBBBE, 0x905E, 0xBBBC, + 0x9060, 0xBBB7, 0x9062, 0xBBBD, 0x9063, 0xBBBA, 0x9067, 0xE852, + 0x9068, 0xBE43, 0x9069, 0xBE41, 0x906B, 0xE853, 0x906D, 0xBE44, + 0x906E, 0xBE42, 0x906F, 0xE851, 0x9070, 0xE850, 0x9072, 0xBFF0, + 0x9073, 0xE84F, 0x9074, 0xBFEE, 0x9075, 0xBFED, 0x9076, 0xEBD0, + 0x9077, 0xBE45, 0x9078, 0xBFEF, 0x9079, 0xEBD1, 0x907A, 0xBFF2, + 0x907B, 0xEBD2, 0x907C, 0xBFF1, 0x907D, 0xC1D8, 0x907E, 0xEEC3, + 0x907F, 0xC1D7, 0x9080, 0xC1DC, 0x9081, 0xC1DA, 0x9082, 0xC1DB, + 0x9083, 0xC2E3, 0x9084, 0xC1D9, 0x9085, 0xEEC2, 0x9086, 0xEBD3, + 0x9087, 0xC2E2, 0x9088, 0xC2E4, 0x908A, 0xC3E4, 0x908B, 0xC3E5, + 0x908D, 0xF4E0, 0x908F, 0xC5DE, 0x9090, 0xC5DD, 0x9091, 0xA8B6, + 0x9094, 0xCA55, 0x9095, 0xB06F, 0x9097, 0xCA52, 0x9098, 0xCA53, + 0x9099, 0xCA51, 0x909B, 0xCA54, 0x909E, 0xCBAA, 0x909F, 0xCBA7, + 0x90A0, 0xCBAC, 0x90A1, 0xCBA8, 0x90A2, 0xA8B7, 0x90A3, 0xA8BA, + 0x90A5, 0xCBA9, 0x90A6, 0xA8B9, 0x90A7, 0xCBAB, 0x90AA, 0xA8B8, + 0x90AF, 0xCDD5, 0x90B0, 0xCDD7, 0x90B1, 0xAAF4, 0x90B2, 0xCDD3, + 0x90B3, 0xCDD6, 0x90B4, 0xCDD4, 0x90B5, 0xAAF2, 0x90B6, 0xAAF5, + 0x90B8, 0xAAF3, 0x90BD, 0xD0B8, 0x90BE, 0xD0BC, 0x90BF, 0xD0B9, + 0x90C1, 0xADA7, 0x90C3, 0xADA8, 0x90C5, 0xD0BB, 0x90C7, 0xD0BD, + 0x90C8, 0xD0BF, 0x90CA, 0xADA5, 0x90CB, 0xD0BE, 0x90CE, 0xADA6, + 0x90D4, 0xD7EE, 0x90D5, 0xD0BA, 0x90D6, 0xD3F2, 0x90D7, 0xD3FB, + 0x90D8, 0xD3F9, 0x90D9, 0xD3F4, 0x90DA, 0xD3F5, 0x90DB, 0xD3FA, + 0x90DC, 0xD3FC, 0x90DD, 0xB071, 0x90DF, 0xD3F7, 0x90E0, 0xD3F3, + 0x90E1, 0xB070, 0x90E2, 0xB072, 0x90E3, 0xD3F6, 0x90E4, 0xD3FD, + 0x90E5, 0xD3F8, 0x90E8, 0xB3A1, 0x90E9, 0xD7F1, 0x90EA, 0xD7E9, + 0x90EB, 0xD7EF, 0x90EC, 0xD7F0, 0x90ED, 0xB3A2, 0x90EF, 0xD7E8, + 0x90F0, 0xD7EA, 0x90F1, 0xD0B7, 0x90F2, 0xD7EC, 0x90F3, 0xD7ED, + 0x90F4, 0xD7EB, 0x90F5, 0xB66C, 0x90F9, 0xDC56, 0x90FA, 0xEBD4, + 0x90FB, 0xDC57, 0x90FC, 0xDC54, 0x90FD, 0xB3A3, 0x90FE, 0xB66E, + 0x90FF, 0xDC53, 0x9100, 0xDC59, 0x9101, 0xDC58, 0x9102, 0xB66B, + 0x9103, 0xDC5C, 0x9104, 0xDC52, 0x9105, 0xDC5B, 0x9106, 0xDC50, + 0x9107, 0xDC5A, 0x9108, 0xDC55, 0x9109, 0xB66D, 0x910B, 0xE0AA, + 0x910D, 0xE0A5, 0x910E, 0xE0AB, 0x910F, 0xE0A6, 0x9110, 0xE0A4, + 0x9111, 0xE0A7, 0x9112, 0xB951, 0x9114, 0xE0A9, 0x9116, 0xE0A8, + 0x9117, 0xB952, 0x9118, 0xBBC1, 0x9119, 0xBBC0, 0x911A, 0xE46E, + 0x911B, 0xE471, 0x911C, 0xE469, 0x911D, 0xE46D, 0x911E, 0xBBC2, + 0x911F, 0xE46C, 0x9120, 0xE46A, 0x9121, 0xE470, 0x9122, 0xE46B, + 0x9123, 0xE468, 0x9124, 0xE46F, 0x9126, 0xE859, 0x9127, 0xBE48, + 0x9128, 0xF14A, 0x9129, 0xE856, 0x912A, 0xE857, 0x912B, 0xE855, + 0x912C, 0xDC51, 0x912D, 0xBE47, 0x912E, 0xE85A, 0x912F, 0xE854, + 0x9130, 0xBE46, 0x9131, 0xBE49, 0x9132, 0xE858, 0x9133, 0xEBD5, + 0x9134, 0xBFF3, 0x9135, 0xEBD6, 0x9136, 0xEBD7, 0x9138, 0xEEC4, + 0x9139, 0xC1DD, 0x913A, 0xF14B, 0x913B, 0xF14C, 0x913E, 0xF14D, + 0x913F, 0xF35D, 0x9140, 0xF35C, 0x9141, 0xF4E2, 0x9143, 0xF4E1, + 0x9144, 0xF65B, 0x9145, 0xF65C, 0x9146, 0xF65A, 0x9147, 0xF766, + 0x9148, 0xC5B0, 0x9149, 0xA8BB, 0x914A, 0xADAA, 0x914B, 0xADA9, + 0x914C, 0xB075, 0x914D, 0xB074, 0x914E, 0xD440, 0x914F, 0xD441, + 0x9150, 0xD3FE, 0x9152, 0xB073, 0x9153, 0xD7F5, 0x9155, 0xD7F6, + 0x9156, 0xD7F2, 0x9157, 0xB3A4, 0x9158, 0xD7F3, 0x915A, 0xD7F4, + 0x915F, 0xDC5F, 0x9160, 0xDC61, 0x9161, 0xDC5D, 0x9162, 0xDC60, + 0x9163, 0xB66F, 0x9164, 0xDC5E, 0x9165, 0xB670, 0x9168, 0xDD73, + 0x9169, 0xB955, 0x916A, 0xB954, 0x916C, 0xB953, 0x916E, 0xE0AC, + 0x916F, 0xE0AD, 0x9172, 0xE473, 0x9173, 0xE475, 0x9174, 0xBBC6, + 0x9175, 0xBBC3, 0x9177, 0xBBC5, 0x9178, 0xBBC4, 0x9179, 0xE474, + 0x917A, 0xE472, 0x9180, 0xE861, 0x9181, 0xE85E, 0x9182, 0xE85F, + 0x9183, 0xBE4D, 0x9184, 0xE860, 0x9185, 0xE85B, 0x9186, 0xE85C, + 0x9187, 0xBE4A, 0x9189, 0xBE4B, 0x918A, 0xE85D, 0x918B, 0xBE4C, + 0x918D, 0xEBDB, 0x918F, 0xEBDC, 0x9190, 0xEBD9, 0x9191, 0xEBDA, + 0x9192, 0xBFF4, 0x9193, 0xEBD8, 0x9199, 0xEEC8, 0x919A, 0xEEC5, + 0x919B, 0xEEC7, 0x919C, 0xC1E0, 0x919D, 0xEECB, 0x919E, 0xC1DF, + 0x919F, 0xEEC9, 0x91A0, 0xEECC, 0x91A1, 0xEECA, 0x91A2, 0xEEC6, + 0x91A3, 0xC1DE, 0x91A5, 0xF14F, 0x91A7, 0xF150, 0x91A8, 0xF14E, + 0x91AA, 0xF152, 0x91AB, 0xC2E5, 0x91AC, 0xC2E6, 0x91AD, 0xF35F, + 0x91AE, 0xC3E7, 0x91AF, 0xF151, 0x91B0, 0xF35E, 0x91B1, 0xC3E6, + 0x91B2, 0xF4E5, 0x91B3, 0xF4E6, 0x91B4, 0xC4BF, 0x91B5, 0xF4E4, + 0x91B7, 0xF4E3, 0x91B9, 0xF65D, 0x91BA, 0xC548, 0x91BC, 0xF849, + 0x91BD, 0xF8C8, 0x91BE, 0xF8C7, 0x91C0, 0xC643, 0x91C1, 0xC65D, + 0x91C2, 0xF8C9, 0x91C3, 0xF971, 0x91C5, 0xC66F, 0x91C6, 0xA8BC, + 0x91C7, 0xAAF6, 0x91C9, 0xB956, 0x91CB, 0xC4C0, 0x91CC, 0xA8BD, + 0x91CD, 0xADAB, 0x91CE, 0xB3A5, 0x91CF, 0xB671, 0x91D0, 0xC2E7, + 0x91D1, 0xAAF7, 0x91D3, 0xD0C1, 0x91D4, 0xD0C0, 0x91D5, 0xD442, + 0x91D7, 0xB078, 0x91D8, 0xB076, 0x91D9, 0xB07A, 0x91DA, 0xD444, + 0x91DC, 0xB079, 0x91DD, 0xB077, 0x91E2, 0xD443, 0x91E3, 0xB3A8, + 0x91E4, 0xD7FC, 0x91E6, 0xB3A7, 0x91E7, 0xB3A9, 0x91E8, 0xD842, + 0x91E9, 0xB3AB, 0x91EA, 0xD7FE, 0x91EB, 0xD840, 0x91EC, 0xD7F7, + 0x91ED, 0xB3AA, 0x91EE, 0xD843, 0x91F1, 0xD7F9, 0x91F3, 0xD7FA, + 0x91F4, 0xD7F8, 0x91F5, 0xB3A6, 0x91F7, 0xD841, 0x91F8, 0xD7FB, + 0x91F9, 0xD7FD, 0x91FD, 0xDC6D, 0x91FF, 0xDC6C, 0x9200, 0xDC6A, + 0x9201, 0xDC62, 0x9202, 0xDC71, 0x9203, 0xDC65, 0x9204, 0xDC6F, + 0x9205, 0xDC76, 0x9206, 0xDC6E, 0x9207, 0xB679, 0x9209, 0xB675, + 0x920A, 0xDC63, 0x920C, 0xDC69, 0x920D, 0xB677, 0x920F, 0xDC68, + 0x9210, 0xB678, 0x9211, 0xB67A, 0x9212, 0xDC6B, 0x9214, 0xB672, + 0x9215, 0xB673, 0x9216, 0xDC77, 0x9217, 0xDC75, 0x9219, 0xDC74, + 0x921A, 0xDC66, 0x921C, 0xDC72, 0x921E, 0xB676, 0x9223, 0xB674, + 0x9224, 0xDC73, 0x9225, 0xDC64, 0x9226, 0xDC67, 0x9227, 0xDC70, + 0x922D, 0xE4BA, 0x922E, 0xE0B7, 0x9230, 0xE0B0, 0x9231, 0xE0C3, + 0x9232, 0xE0CC, 0x9233, 0xE0B3, 0x9234, 0xB961, 0x9236, 0xE0C0, + 0x9237, 0xB957, 0x9238, 0xB959, 0x9239, 0xB965, 0x923A, 0xE0B1, + 0x923D, 0xB95A, 0x923E, 0xB95C, 0x923F, 0xB966, 0x9240, 0xB95B, + 0x9245, 0xB964, 0x9246, 0xE0B9, 0x9248, 0xE0AE, 0x9249, 0xB962, + 0x924A, 0xE0B8, 0x924B, 0xB95E, 0x924C, 0xE0CA, 0x924D, 0xB963, + 0x924E, 0xE0C8, 0x924F, 0xE0BC, 0x9250, 0xE0C6, 0x9251, 0xB960, + 0x9252, 0xE0AF, 0x9253, 0xE0C9, 0x9254, 0xE0C4, 0x9256, 0xE0CB, + 0x9257, 0xB958, 0x925A, 0xB967, 0x925B, 0xB95D, 0x925E, 0xE0B5, + 0x9260, 0xE0BD, 0x9261, 0xE0C1, 0x9263, 0xE0C5, 0x9264, 0xB95F, + 0x9265, 0xE0B4, 0x9266, 0xE0B2, 0x9267, 0xE0BE, 0x926C, 0xE0BB, + 0x926D, 0xE0BA, 0x926F, 0xE0BF, 0x9270, 0xE0C2, 0x9272, 0xE0C7, + 0x9276, 0xE478, 0x9278, 0xBBC7, 0x9279, 0xE4A4, 0x927A, 0xE47A, + 0x927B, 0xBBCC, 0x927C, 0xBBD0, 0x927D, 0xE4AD, 0x927E, 0xE4B5, + 0x927F, 0xE4A6, 0x9280, 0xBBC8, 0x9282, 0xE4AA, 0x9283, 0xE0B6, + 0x9285, 0xBBC9, 0x9286, 0xE4B1, 0x9287, 0xE4B6, 0x9288, 0xE4AE, + 0x928A, 0xE4B0, 0x928B, 0xE4B9, 0x928C, 0xE4B2, 0x928D, 0xE47E, + 0x928E, 0xE4A9, 0x9291, 0xBBD1, 0x9293, 0xBBCD, 0x9294, 0xE47C, + 0x9295, 0xE4AB, 0x9296, 0xBBCB, 0x9297, 0xE4A5, 0x9298, 0xBBCA, + 0x9299, 0xE4B3, 0x929A, 0xE4A2, 0x929B, 0xE479, 0x929C, 0xBBCE, + 0x929D, 0xE4B8, 0x92A0, 0xE47B, 0x92A1, 0xE4AF, 0x92A2, 0xE4AC, + 0x92A3, 0xE4A7, 0x92A4, 0xE477, 0x92A5, 0xE476, 0x92A6, 0xE4A1, + 0x92A7, 0xE4B4, 0x92A8, 0xBBCF, 0x92A9, 0xE4B7, 0x92AA, 0xE47D, + 0x92AB, 0xE4A3, 0x92AC, 0xBE52, 0x92B2, 0xBE5A, 0x92B3, 0xBE55, + 0x92B4, 0xE8A4, 0x92B5, 0xE8A1, 0x92B6, 0xE867, 0x92B7, 0xBE50, + 0x92B9, 0xF9D7, 0x92BB, 0xBE4F, 0x92BC, 0xBE56, 0x92C0, 0xE865, + 0x92C1, 0xBE54, 0x92C2, 0xE871, 0x92C3, 0xE863, 0x92C4, 0xE864, + 0x92C5, 0xBE4E, 0x92C6, 0xE8A3, 0x92C7, 0xBE58, 0x92C8, 0xE874, + 0x92C9, 0xE879, 0x92CA, 0xE873, 0x92CB, 0xEBEE, 0x92CC, 0xE86F, + 0x92CD, 0xE877, 0x92CE, 0xE875, 0x92CF, 0xE868, 0x92D0, 0xE862, + 0x92D1, 0xE87D, 0x92D2, 0xBE57, 0x92D3, 0xE87E, 0x92D5, 0xE878, + 0x92D7, 0xE86D, 0x92D8, 0xE86B, 0x92D9, 0xE866, 0x92DD, 0xE86E, + 0x92DE, 0xE87B, 0x92DF, 0xE86A, 0x92E0, 0xE87A, 0x92E1, 0xE8A2, + 0x92E4, 0xBE53, 0x92E6, 0xE876, 0x92E7, 0xE87C, 0x92E8, 0xE872, + 0x92E9, 0xE86C, 0x92EA, 0xBE51, 0x92EE, 0xE4A8, 0x92EF, 0xE870, + 0x92F0, 0xBE59, 0x92F1, 0xE869, 0x92F7, 0xEBF4, 0x92F8, 0xBFF7, + 0x92F9, 0xEBF3, 0x92FA, 0xEBF0, 0x92FB, 0xEC44, 0x92FC, 0xBFFB, + 0x92FE, 0xEC41, 0x92FF, 0xEBF8, 0x9300, 0xEC43, 0x9301, 0xEBE9, + 0x9302, 0xEBF6, 0x9304, 0xBFFD, 0x9306, 0xEBE1, 0x9308, 0xEBDF, + 0x9309, 0xEC42, 0x930B, 0xEC40, 0x930C, 0xEBFE, 0x930D, 0xEBED, + 0x930E, 0xEBEC, 0x930F, 0xEBE2, 0x9310, 0xC040, 0x9312, 0xEBE8, + 0x9313, 0xEBF2, 0x9314, 0xEBFD, 0x9315, 0xC043, 0x9316, 0xEC45, + 0x9318, 0xC1E8, 0x9319, 0xC045, 0x931A, 0xBFFE, 0x931B, 0xEBE6, + 0x931D, 0xEBEF, 0x931E, 0xEBDE, 0x931F, 0xEBE0, 0x9320, 0xBFF5, + 0x9321, 0xC042, 0x9322, 0xBFFA, 0x9323, 0xEBE7, 0x9324, 0xEBF7, + 0x9325, 0xEBF1, 0x9326, 0xC041, 0x9327, 0xEBDD, 0x9328, 0xC1E3, + 0x9329, 0xEBF9, 0x932A, 0xEBFC, 0x932B, 0xBFFC, 0x932D, 0xEBEB, + 0x932E, 0xC044, 0x932F, 0xBFF9, 0x9333, 0xBFF8, 0x9334, 0xEBF5, + 0x9335, 0xEBFB, 0x9336, 0xBFF6, 0x9338, 0xEBE4, 0x9339, 0xEBFA, + 0x933C, 0xEBE5, 0x9346, 0xEBEA, 0x9347, 0xEED2, 0x9349, 0xEED7, + 0x934A, 0xC1E5, 0x934B, 0xC1E7, 0x934C, 0xEEDD, 0x934D, 0xC1E1, + 0x934E, 0xEEEC, 0x934F, 0xEEE3, 0x9350, 0xEED8, 0x9351, 0xEED9, + 0x9352, 0xEEE2, 0x9354, 0xC1EE, 0x9355, 0xEEE1, 0x9356, 0xEED1, + 0x9357, 0xEEE0, 0x9358, 0xEED4, 0x9359, 0xEEED, 0x935A, 0xC1ED, + 0x935B, 0xC1EB, 0x935C, 0xEED5, 0x935E, 0xEEE8, 0x9360, 0xEEDA, + 0x9361, 0xEEE7, 0x9363, 0xEEE9, 0x9364, 0xEED0, 0x9365, 0xC1E6, + 0x9367, 0xEEEA, 0x936A, 0xEEDE, 0x936C, 0xC1EA, 0x936D, 0xEEDB, + 0x9370, 0xC1EC, 0x9371, 0xEEE4, 0x9375, 0xC1E4, 0x9376, 0xEED6, + 0x9377, 0xEEE5, 0x9379, 0xEEDF, 0x937A, 0xEBE3, 0x937B, 0xEEE6, + 0x937C, 0xEED3, 0x937E, 0xC1E9, 0x9380, 0xEEEB, 0x9382, 0xC1E2, + 0x9383, 0xEECE, 0x9388, 0xF160, 0x9389, 0xF159, 0x938A, 0xC2E9, + 0x938C, 0xF154, 0x938D, 0xF163, 0x938E, 0xF15B, 0x938F, 0xEEDC, + 0x9391, 0xF165, 0x9392, 0xF155, 0x9394, 0xC2E8, 0x9395, 0xF15F, + 0x9396, 0xC2EA, 0x9397, 0xC2F2, 0x9398, 0xC2F0, 0x9399, 0xF161, + 0x939A, 0xC2F1, 0x939B, 0xF157, 0x939D, 0xF158, 0x939E, 0xF15D, + 0x939F, 0xF162, 0x93A1, 0xEECD, 0x93A2, 0xC2EB, 0x93A3, 0xF16A, + 0x93A4, 0xF167, 0x93A5, 0xF16B, 0x93A6, 0xF15E, 0x93A7, 0xF15A, + 0x93A8, 0xF168, 0x93A9, 0xF36A, 0x93AA, 0xF15C, 0x93AC, 0xC2EE, + 0x93AE, 0xC2ED, 0x93AF, 0xEECF, 0x93B0, 0xC2EF, 0x93B1, 0xF164, + 0x93B2, 0xF166, 0x93B3, 0xC2EC, 0x93B4, 0xF169, 0x93B5, 0xF153, + 0x93B7, 0xF156, 0x93C0, 0xF373, 0x93C2, 0xF363, 0x93C3, 0xC3EB, + 0x93C4, 0xF371, 0x93C7, 0xF361, 0x93C8, 0xC3EC, 0x93CA, 0xF36C, + 0x93CC, 0xF368, 0x93CD, 0xC3F1, 0x93CE, 0xF372, 0x93CF, 0xF362, + 0x93D0, 0xF365, 0x93D1, 0xC3E9, 0x93D2, 0xF374, 0x93D4, 0xF36D, + 0x93D5, 0xF370, 0x93D6, 0xC3EF, 0x93D7, 0xC3F4, 0x93D8, 0xC3F2, + 0x93D9, 0xF369, 0x93DA, 0xF364, 0x93DC, 0xC3ED, 0x93DD, 0xC3EE, + 0x93DE, 0xF360, 0x93DF, 0xC3EA, 0x93E1, 0xC3E8, 0x93E2, 0xC3F0, + 0x93E3, 0xF36F, 0x93E4, 0xC3F3, 0x93E6, 0xF36B, 0x93E7, 0xF375, + 0x93E8, 0xC3F5, 0x93EC, 0xF367, 0x93EE, 0xF36E, 0x93F5, 0xF4F3, + 0x93F6, 0xF542, 0x93F7, 0xF4F5, 0x93F8, 0xF4FC, 0x93F9, 0xF366, + 0x93FA, 0xF4FA, 0x93FB, 0xF4E9, 0x93FC, 0xF540, 0x93FD, 0xC4C3, + 0x93FE, 0xF4ED, 0x93FF, 0xF4FE, 0x9400, 0xF4F4, 0x9403, 0xC4C2, + 0x9406, 0xF544, 0x9407, 0xF4F6, 0x9409, 0xF4FB, 0x940A, 0xF4FD, + 0x940B, 0xF4E7, 0x940C, 0xF541, 0x940D, 0xF4F2, 0x940E, 0xF4F7, + 0x940F, 0xF4EB, 0x9410, 0xF4EF, 0x9411, 0xF543, 0x9412, 0xF4F9, + 0x9413, 0xF4E8, 0x9414, 0xF4EC, 0x9415, 0xF4EE, 0x9416, 0xF4F8, + 0x9418, 0xC4C1, 0x9419, 0xF4F1, 0x9420, 0xF4EA, 0x9428, 0xF4F0, + 0x9429, 0xF661, 0x942A, 0xF666, 0x942B, 0xC54F, 0x942C, 0xF668, + 0x942E, 0xC549, 0x9430, 0xF664, 0x9431, 0xF66A, 0x9432, 0xC54E, + 0x9433, 0xC54A, 0x9435, 0xC54B, 0x9436, 0xF660, 0x9437, 0xF667, + 0x9438, 0xC54D, 0x9439, 0xF665, 0x943A, 0xC54C, 0x943B, 0xF65F, + 0x943C, 0xF663, 0x943D, 0xF662, 0x943F, 0xF65E, 0x9440, 0xF669, + 0x9444, 0xC5B1, 0x9445, 0xF76D, 0x9446, 0xF770, 0x9447, 0xF76C, + 0x9448, 0xF76E, 0x9449, 0xF76F, 0x944A, 0xF769, 0x944B, 0xF76A, + 0x944C, 0xF767, 0x944F, 0xF76B, 0x9450, 0xF768, 0x9451, 0xC5B2, + 0x9452, 0xC5B3, 0x9455, 0xF84B, 0x9457, 0xF84D, 0x945D, 0xF84C, + 0x945E, 0xF84E, 0x9460, 0xC5E0, 0x9462, 0xF84A, 0x9463, 0xC5DF, + 0x9464, 0xC5E1, 0x9468, 0xF8CB, 0x9469, 0xF8CC, 0x946A, 0xC644, + 0x946B, 0xF8CA, 0x946D, 0xF953, 0x946E, 0xF952, 0x946F, 0xF954, + 0x9470, 0xC65F, 0x9471, 0xF955, 0x9472, 0xC65E, 0x9473, 0xF956, + 0x9474, 0xF972, 0x9475, 0xF975, 0x9476, 0xF974, 0x9477, 0xC668, + 0x9478, 0xF973, 0x947C, 0xC672, 0x947D, 0xC670, 0x947E, 0xC671, + 0x947F, 0xC677, 0x9480, 0xF9C0, 0x9481, 0xF9C1, 0x9482, 0xF9BF, + 0x9483, 0xF9C9, 0x9577, 0xAAF8, 0x957A, 0xD844, 0x957B, 0xDC78, + 0x957C, 0xE8A5, 0x957D, 0xF376, 0x9580, 0xAAF9, 0x9582, 0xADAC, + 0x9583, 0xB07B, 0x9586, 0xD845, 0x9588, 0xD846, 0x9589, 0xB3AC, + 0x958B, 0xB67D, 0x958C, 0xDC7A, 0x958D, 0xDC79, 0x958E, 0xB6A3, + 0x958F, 0xB67C, 0x9590, 0xDC7B, 0x9591, 0xB67E, 0x9592, 0xB6A2, + 0x9593, 0xB6A1, 0x9594, 0xB67B, 0x9598, 0xB968, 0x959B, 0xE0D0, + 0x959C, 0xE0CE, 0x959E, 0xE0CF, 0x959F, 0xE0CD, 0x95A1, 0xBBD2, + 0x95A3, 0xBBD5, 0x95A4, 0xBBD7, 0x95A5, 0xBBD6, 0x95A8, 0xBBD3, + 0x95A9, 0xBBD4, 0x95AB, 0xE8A7, 0x95AC, 0xE8A6, 0x95AD, 0xBE5B, + 0x95AE, 0xE8A8, 0x95B0, 0xE8A9, 0x95B1, 0xBE5C, 0x95B5, 0xEC4D, + 0x95B6, 0xEC4B, 0x95B7, 0xEEF3, 0x95B9, 0xEC49, 0x95BA, 0xEC4A, + 0x95BB, 0xC046, 0x95BC, 0xEC46, 0x95BD, 0xEC4E, 0x95BE, 0xEC48, + 0x95BF, 0xEC4C, 0x95C0, 0xEEEF, 0x95C3, 0xEEF1, 0x95C5, 0xEEF2, + 0x95C6, 0xC1F3, 0x95C7, 0xEEEE, 0x95C8, 0xC1F2, 0x95C9, 0xEEF0, + 0x95CA, 0xC1EF, 0x95CB, 0xC1F0, 0x95CC, 0xC1F1, 0x95CD, 0xEC47, + 0x95D0, 0xC2F5, 0x95D1, 0xF16E, 0x95D2, 0xF16C, 0x95D3, 0xF16D, + 0x95D4, 0xC2F3, 0x95D5, 0xC2F6, 0x95D6, 0xC2F4, 0x95DA, 0xF377, + 0x95DB, 0xF378, 0x95DC, 0xC3F6, 0x95DE, 0xF545, 0x95DF, 0xF547, + 0x95E0, 0xF546, 0x95E1, 0xC4C4, 0x95E2, 0xC550, 0x95E3, 0xF66D, + 0x95E4, 0xF66C, 0x95E5, 0xF66B, 0x961C, 0xAAFA, 0x961E, 0xC9AA, + 0x9620, 0xCA58, 0x9621, 0xA6E9, 0x9622, 0xCA56, 0x9623, 0xCA59, + 0x9624, 0xCA57, 0x9628, 0xCBAE, 0x962A, 0xA8C1, 0x962C, 0xA8C2, + 0x962D, 0xCBB0, 0x962E, 0xA8BF, 0x962F, 0xCBAF, 0x9630, 0xCBAD, + 0x9631, 0xA8C0, 0x9632, 0xA8BE, 0x9639, 0xCDD8, 0x963A, 0xCDDB, + 0x963B, 0xAAFD, 0x963C, 0xCDDA, 0x963D, 0xCDD9, 0x963F, 0xAAFC, + 0x9640, 0xAAFB, 0x9642, 0xAB40, 0x9643, 0xCDDC, 0x9644, 0xAAFE, + 0x964A, 0xD0C6, 0x964B, 0xADAE, 0x964C, 0xADAF, 0x964D, 0xADB0, + 0x964E, 0xD0C7, 0x964F, 0xD0C3, 0x9650, 0xADAD, 0x9651, 0xD0C4, + 0x9653, 0xD0C5, 0x9654, 0xD0C2, 0x9658, 0xB0A4, 0x965B, 0xB0A1, + 0x965C, 0xD445, 0x965D, 0xB0A2, 0x965E, 0xB0A5, 0x965F, 0xD446, + 0x9661, 0xB07E, 0x9662, 0xB07C, 0x9663, 0xB07D, 0x9664, 0xB0A3, + 0x966A, 0xB3AD, 0x966B, 0xD849, 0x966C, 0xB3B5, 0x966D, 0xD848, + 0x966F, 0xD84B, 0x9670, 0xB3B1, 0x9671, 0xD84A, 0x9672, 0xB6AB, + 0x9673, 0xB3AF, 0x9674, 0xB3B2, 0x9675, 0xB3AE, 0x9676, 0xB3B3, + 0x9677, 0xB3B4, 0x9678, 0xB3B0, 0x967C, 0xD847, 0x967D, 0xB6A7, + 0x967E, 0xDC7D, 0x9680, 0xDCA3, 0x9683, 0xDCA2, 0x9684, 0xB6AC, + 0x9685, 0xB6A8, 0x9686, 0xB6A9, 0x9687, 0xDC7C, 0x9688, 0xDC7E, + 0x9689, 0xDCA1, 0x968A, 0xB6A4, 0x968B, 0xB6A6, 0x968D, 0xB6AA, + 0x968E, 0xB6A5, 0x9691, 0xE0D3, 0x9692, 0xE0D1, 0x9693, 0xE0D2, + 0x9694, 0xB96A, 0x9695, 0xB96B, 0x9697, 0xE0D4, 0x9698, 0xB969, + 0x9699, 0xBBD8, 0x969B, 0xBBDA, 0x969C, 0xBBD9, 0x969E, 0xE4BB, + 0x96A1, 0xE4BC, 0x96A2, 0xE8AB, 0x96A4, 0xE8AA, 0x96A7, 0xC047, + 0x96A8, 0xC048, 0x96A9, 0xEC4F, 0x96AA, 0xC049, 0x96AC, 0xEEF6, + 0x96AE, 0xEEF4, 0x96B0, 0xEEF5, 0x96B1, 0xC1F4, 0x96B3, 0xF16F, + 0x96B4, 0xC3F7, 0x96B8, 0xC1F5, 0x96B9, 0xAB41, 0x96BB, 0xB0A6, + 0x96BC, 0xD447, 0x96BF, 0xD84C, 0x96C0, 0xB3B6, 0x96C1, 0xB6AD, + 0x96C2, 0xDCA4, 0x96C3, 0xDCA6, 0x96C4, 0xB6AF, 0x96C5, 0xB6AE, + 0x96C6, 0xB6B0, 0x96C7, 0xB6B1, 0x96C8, 0xDCA5, 0x96C9, 0xB96E, + 0x96CA, 0xB96F, 0x96CB, 0xB96D, 0x96CC, 0xBBDB, 0x96CD, 0xB96C, + 0x96CE, 0xE0D5, 0x96D2, 0xBBDC, 0x96D3, 0xE8AC, 0x96D4, 0xEC50, + 0x96D5, 0xC04A, 0x96D6, 0xC1F6, 0x96D7, 0xF170, 0x96D8, 0xF174, + 0x96D9, 0xC2F9, 0x96DA, 0xF171, 0x96DB, 0xC2FA, 0x96DC, 0xC2F8, + 0x96DD, 0xF175, 0x96DE, 0xC2FB, 0x96DF, 0xF173, 0x96E1, 0xF379, + 0x96E2, 0xC2F7, 0x96E3, 0xC3F8, 0x96E5, 0xF8CD, 0x96E8, 0xAB42, + 0x96E9, 0xB3B8, 0x96EA, 0xB3B7, 0x96EF, 0xB6B2, 0x96F0, 0xDCA8, + 0x96F1, 0xDCA7, 0x96F2, 0xB6B3, 0x96F5, 0xE0D9, 0x96F6, 0xB973, + 0x96F7, 0xB970, 0x96F8, 0xE0D8, 0x96F9, 0xB972, 0x96FA, 0xE0D6, + 0x96FB, 0xB971, 0x96FD, 0xE0D7, 0x96FF, 0xE4BD, 0x9700, 0xBBDD, + 0x9702, 0xE8AF, 0x9704, 0xBE5D, 0x9705, 0xE8AD, 0x9706, 0xBE5E, + 0x9707, 0xBE5F, 0x9708, 0xE8AE, 0x9709, 0xBE60, 0x970B, 0xEC51, + 0x970D, 0xC04E, 0x970E, 0xC04B, 0x970F, 0xC050, 0x9710, 0xEC53, + 0x9711, 0xC04C, 0x9712, 0xEC52, 0x9713, 0xC04F, 0x9716, 0xC04D, + 0x9718, 0xEEF9, 0x9719, 0xEEFB, 0x971C, 0xC1F7, 0x971D, 0xEEFA, + 0x971E, 0xC1F8, 0x971F, 0xEEF8, 0x9720, 0xEEF7, 0x9722, 0xF177, + 0x9723, 0xF176, 0x9724, 0xC2FC, 0x9725, 0xF178, 0x9726, 0xF37E, + 0x9727, 0xC3FA, 0x9728, 0xF37D, 0x9729, 0xF37A, 0x972A, 0xC3F9, + 0x972B, 0xF37B, 0x972C, 0xF37C, 0x972E, 0xF548, 0x972F, 0xF549, + 0x9730, 0xC4C5, 0x9732, 0xC553, 0x9735, 0xF66E, 0x9738, 0xC551, + 0x9739, 0xC552, 0x973A, 0xF66F, 0x973D, 0xC5B4, 0x973E, 0xC5B5, + 0x973F, 0xF771, 0x9742, 0xC645, 0x9743, 0xF8CF, 0x9744, 0xC647, + 0x9746, 0xF8CE, 0x9747, 0xF8D0, 0x9748, 0xC646, 0x9749, 0xF957, + 0x974B, 0xF9AD, 0x9752, 0xAB43, 0x9756, 0xB974, 0x9758, 0xE4BE, + 0x975A, 0xE8B0, 0x975B, 0xC051, 0x975C, 0xC052, 0x975E, 0xAB44, + 0x9760, 0xBE61, 0x9761, 0xC3FB, 0x9762, 0xADB1, 0x9766, 0xC053, + 0x9768, 0xC5E2, 0x9769, 0xADB2, 0x976A, 0xD84D, 0x976C, 0xDCA9, + 0x976E, 0xDCAB, 0x9770, 0xDCAA, 0x9772, 0xE0DD, 0x9773, 0xE0DA, + 0x9774, 0xB975, 0x9776, 0xB976, 0x9777, 0xE0DB, 0x9778, 0xE0DC, + 0x977A, 0xE4C0, 0x977B, 0xE4C5, 0x977C, 0xBBDE, 0x977D, 0xE4BF, + 0x977E, 0xE4C1, 0x977F, 0xE4C8, 0x9780, 0xE4C3, 0x9781, 0xE4C7, + 0x9782, 0xE4C4, 0x9783, 0xE4C2, 0x9784, 0xE4C6, 0x9785, 0xBBDF, + 0x9788, 0xE8B3, 0x978A, 0xE8B1, 0x978B, 0xBE63, 0x978D, 0xBE62, + 0x978E, 0xE8B2, 0x978F, 0xBE64, 0x9794, 0xEC56, 0x9797, 0xEC55, + 0x9798, 0xC054, 0x9799, 0xEC54, 0x979A, 0xEEFC, 0x979C, 0xEEFE, + 0x979D, 0xEF41, 0x979E, 0xEF40, 0x97A0, 0xC1F9, 0x97A1, 0xEEFD, + 0x97A2, 0xF1A1, 0x97A3, 0xC2FD, 0x97A4, 0xF17D, 0x97A5, 0xF1A2, + 0x97A6, 0xC2FE, 0x97A8, 0xF17B, 0x97AA, 0xF17E, 0x97AB, 0xF17C, + 0x97AC, 0xF179, 0x97AD, 0xC340, 0x97AE, 0xF17A, 0x97B3, 0xF3A1, + 0x97B6, 0xF3A3, 0x97B7, 0xF3A2, 0x97B9, 0xF54A, 0x97BB, 0xF54B, + 0x97BF, 0xF670, 0x97C1, 0xC5B7, 0x97C3, 0xC5B6, 0x97C4, 0xF84F, + 0x97C5, 0xF850, 0x97C6, 0xC648, 0x97C7, 0xF8D1, 0x97C9, 0xC669, + 0x97CB, 0xADB3, 0x97CC, 0xB6B4, 0x97CD, 0xE4CA, 0x97CE, 0xE4C9, + 0x97CF, 0xE8B5, 0x97D0, 0xE8B4, 0x97D3, 0xC1FA, 0x97D4, 0xEF43, + 0x97D5, 0xEF42, 0x97D6, 0xF1A5, 0x97D7, 0xF1A3, 0x97D8, 0xF1A6, + 0x97D9, 0xF1A4, 0x97DC, 0xC3FC, 0x97DD, 0xF3A4, 0x97DE, 0xF3A5, + 0x97DF, 0xF3A6, 0x97E1, 0xF671, 0x97E3, 0xF772, 0x97E5, 0xF8D2, + 0x97ED, 0xADB4, 0x97F0, 0xEC57, 0x97F1, 0xEF44, 0x97F3, 0xADB5, + 0x97F6, 0xBBE0, 0x97F8, 0xEC58, 0x97F9, 0xC341, 0x97FA, 0xF1A7, + 0x97FB, 0xC3FD, 0x97FD, 0xF54C, 0x97FE, 0xF54D, 0x97FF, 0xC554, + 0x9800, 0xF851, 0x9801, 0xADB6, 0x9802, 0xB3BB, 0x9803, 0xB3BC, + 0x9804, 0xD84E, 0x9805, 0xB6B5, 0x9806, 0xB6B6, 0x9807, 0xDCAC, + 0x9808, 0xB6B7, 0x980A, 0xB97A, 0x980C, 0xB97C, 0x980D, 0xE0DF, + 0x980E, 0xE0E0, 0x980F, 0xE0DE, 0x9810, 0xB977, 0x9811, 0xB978, + 0x9812, 0xB97B, 0x9813, 0xB979, 0x9816, 0xE4CB, 0x9817, 0xBBE1, + 0x9818, 0xBBE2, 0x981B, 0xE8BC, 0x981C, 0xBE67, 0x981D, 0xE8B7, + 0x981E, 0xE8B6, 0x9820, 0xE8BB, 0x9821, 0xBE65, 0x9824, 0xC05B, + 0x9826, 0xE8B8, 0x9827, 0xE8BD, 0x9828, 0xE8BA, 0x9829, 0xE8B9, + 0x982B, 0xBE66, 0x982D, 0xC059, 0x982F, 0xEC5A, 0x9830, 0xC055, + 0x9832, 0xEC5B, 0x9835, 0xEC59, 0x9837, 0xC058, 0x9838, 0xC056, + 0x9839, 0xC05A, 0x983B, 0xC057, 0x9841, 0xEF45, 0x9843, 0xEF4A, + 0x9844, 0xEF46, 0x9845, 0xEF49, 0x9846, 0xC1FB, 0x9848, 0xEDD4, + 0x9849, 0xEF48, 0x984A, 0xEF47, 0x984C, 0xC344, 0x984D, 0xC342, + 0x984E, 0xC345, 0x984F, 0xC343, 0x9850, 0xF1A8, 0x9851, 0xF1A9, + 0x9852, 0xF1AA, 0x9853, 0xC346, 0x9857, 0xF3AA, 0x9858, 0xC440, + 0x9859, 0xF3A8, 0x985B, 0xC441, 0x985C, 0xF3A7, 0x985D, 0xF3A9, + 0x985E, 0xC3FE, 0x985F, 0xF551, 0x9860, 0xF54E, 0x9862, 0xF54F, + 0x9863, 0xF550, 0x9864, 0xF672, 0x9865, 0xC556, 0x9867, 0xC555, + 0x9869, 0xF774, 0x986A, 0xF773, 0x986B, 0xC5B8, 0x986F, 0xC5E3, + 0x9870, 0xC649, 0x9871, 0xC660, 0x9872, 0xF958, 0x9873, 0xF9AE, + 0x9874, 0xF9AF, 0x98A8, 0xADB7, 0x98A9, 0xDCAD, 0x98AC, 0xE0E1, + 0x98AD, 0xE4CC, 0x98AE, 0xE4CD, 0x98AF, 0xBBE3, 0x98B1, 0xBBE4, + 0x98B2, 0xE8BE, 0x98B3, 0xBE68, 0x98B6, 0xC1FC, 0x98B8, 0xF1AB, + 0x98BA, 0xC347, 0x98BB, 0xF3AD, 0x98BC, 0xC442, 0x98BD, 0xF3AC, + 0x98BE, 0xF3AE, 0x98BF, 0xF3AB, 0x98C0, 0xF675, 0x98C1, 0xF552, + 0x98C2, 0xF553, 0x98C4, 0xC4C6, 0x98C6, 0xF674, 0x98C9, 0xF673, + 0x98CB, 0xF775, 0x98CC, 0xF9B0, 0x98DB, 0xADB8, 0x98DF, 0xADB9, + 0x98E2, 0xB0A7, 0x98E3, 0xD448, 0x98E5, 0xD84F, 0x98E7, 0xB6B8, + 0x98E9, 0xB6BB, 0x98EA, 0xB6B9, 0x98EB, 0xDCAE, 0x98ED, 0xB6BD, + 0x98EF, 0xB6BA, 0x98F2, 0xB6BC, 0x98F4, 0xB97E, 0x98F6, 0xE0E2, + 0x98F9, 0xE0E3, 0x98FA, 0xE8C0, 0x98FC, 0xB97D, 0x98FD, 0xB9A1, + 0x98FE, 0xB9A2, 0x9900, 0xE4CF, 0x9902, 0xE4CE, 0x9903, 0xBBE5, + 0x9905, 0xBBE6, 0x9907, 0xE4D0, 0x9908, 0xE8BF, 0x9909, 0xBBE8, + 0x990A, 0xBE69, 0x990C, 0xBBE7, 0x9910, 0xC05C, 0x9911, 0xE8C1, + 0x9912, 0xBE6B, 0x9913, 0xBE6A, 0x9914, 0xE8C2, 0x9915, 0xE8C5, + 0x9916, 0xE8C3, 0x9917, 0xE8C4, 0x9918, 0xBE6C, 0x991A, 0xC061, + 0x991B, 0xC05F, 0x991E, 0xC05E, 0x991F, 0xEC5D, 0x9921, 0xC060, + 0x9924, 0xEC5C, 0x9925, 0xEF4B, 0x9927, 0xEC5E, 0x9928, 0xC05D, + 0x9929, 0xEC5F, 0x992A, 0xEF4E, 0x992B, 0xEF4C, 0x992C, 0xEF4D, + 0x992D, 0xEF52, 0x992E, 0xC34B, 0x992F, 0xEF51, 0x9930, 0xEF54, + 0x9931, 0xEF53, 0x9932, 0xEF50, 0x9933, 0xEF4F, 0x9935, 0xC1FD, + 0x993A, 0xF1AE, 0x993C, 0xF1AD, 0x993D, 0xC34A, 0x993E, 0xC348, + 0x993F, 0xC349, 0x9941, 0xF1AC, 0x9943, 0xF3B1, 0x9945, 0xC443, + 0x9947, 0xF3B0, 0x9948, 0xF3AF, 0x9949, 0xC444, 0x994B, 0xF558, + 0x994C, 0xF557, 0x994E, 0xF555, 0x9950, 0xF554, 0x9951, 0xC4C8, + 0x9952, 0xC4C7, 0x9953, 0xF559, 0x9954, 0xF776, 0x9955, 0xC5B9, + 0x9956, 0xF677, 0x9957, 0xC557, 0x9958, 0xF676, 0x9959, 0xF556, + 0x995B, 0xF777, 0x995C, 0xC5E4, 0x995E, 0xC661, 0x995F, 0xF959, + 0x9961, 0xF9B1, 0x9996, 0xADBA, 0x9997, 0xD850, 0x9998, 0xEF55, + 0x9999, 0xADBB, 0x999C, 0xE4D2, 0x999D, 0xE4D1, 0x999E, 0xEC60, + 0x99A1, 0xEF57, 0x99A3, 0xEF56, 0x99A5, 0xC34C, 0x99A6, 0xF3B2, + 0x99A7, 0xF3B3, 0x99A8, 0xC4C9, 0x99AB, 0xF9B2, 0x99AC, 0xB0A8, + 0x99AD, 0xB6BF, 0x99AE, 0xB6BE, 0x99AF, 0xE0E4, 0x99B0, 0xE0E6, + 0x99B1, 0xB9A4, 0x99B2, 0xE0E5, 0x99B3, 0xB9A3, 0x99B4, 0xB9A5, + 0x99B5, 0xE0E7, 0x99B9, 0xE4D4, 0x99BA, 0xE4D6, 0x99BB, 0xE4D5, + 0x99BD, 0xE4D8, 0x99C1, 0xBBE9, 0x99C2, 0xE4D7, 0x99C3, 0xE4D3, + 0x99C7, 0xE4D9, 0x99C9, 0xE8CC, 0x99CB, 0xE8CF, 0x99CC, 0xE8D1, + 0x99CD, 0xE8C7, 0x99CE, 0xE8CB, 0x99CF, 0xE8C8, 0x99D0, 0xBE6E, + 0x99D1, 0xBE71, 0x99D2, 0xBE73, 0x99D3, 0xE8C9, 0x99D4, 0xE8CA, + 0x99D5, 0xBE72, 0x99D6, 0xE8CD, 0x99D7, 0xE8D0, 0x99D8, 0xE8CE, + 0x99D9, 0xBE74, 0x99DB, 0xBE70, 0x99DC, 0xE8C6, 0x99DD, 0xBE6D, + 0x99DF, 0xBE6F, 0x99E2, 0xC063, 0x99E3, 0xEC66, 0x99E4, 0xEC64, + 0x99E5, 0xEC63, 0x99E7, 0xEC69, 0x99E9, 0xEC68, 0x99EA, 0xEC67, + 0x99EC, 0xEC62, 0x99ED, 0xC062, 0x99EE, 0xEC61, 0x99F0, 0xEC65, + 0x99F1, 0xC064, 0x99F4, 0xEF5A, 0x99F6, 0xEF5E, 0x99F7, 0xEF5B, + 0x99F8, 0xEF5D, 0x99F9, 0xEF5C, 0x99FA, 0xEF59, 0x99FB, 0xEF5F, + 0x99FC, 0xEF62, 0x99FD, 0xEF60, 0x99FE, 0xEF61, 0x99FF, 0xC240, + 0x9A01, 0xC1FE, 0x9A02, 0xEF58, 0x9A03, 0xEF63, 0x9A04, 0xF1B3, + 0x9A05, 0xF1B6, 0x9A06, 0xF1B8, 0x9A07, 0xF1B7, 0x9A09, 0xF1B1, + 0x9A0A, 0xF1B5, 0x9A0B, 0xF1B0, 0x9A0D, 0xF1B2, 0x9A0E, 0xC34D, + 0x9A0F, 0xF1AF, 0x9A11, 0xF1B4, 0x9A14, 0xF3C0, 0x9A15, 0xF3B5, + 0x9A16, 0xC445, 0x9A19, 0xC446, 0x9A1A, 0xF3B4, 0x9A1B, 0xF3B9, + 0x9A1C, 0xF3BF, 0x9A1D, 0xF3B7, 0x9A1E, 0xF3BE, 0x9A20, 0xF3BB, + 0x9A22, 0xF3BA, 0x9A23, 0xF3BD, 0x9A24, 0xF3B8, 0x9A25, 0xF3B6, + 0x9A27, 0xF3BC, 0x9A29, 0xF560, 0x9A2A, 0xF55E, 0x9A2B, 0xC4CA, + 0x9A2C, 0xF55D, 0x9A2D, 0xF563, 0x9A2E, 0xF561, 0x9A30, 0xC4CB, + 0x9A31, 0xF55C, 0x9A32, 0xF55A, 0x9A34, 0xF55B, 0x9A35, 0xC4CD, + 0x9A36, 0xF55F, 0x9A37, 0xC4CC, 0x9A38, 0xF562, 0x9A39, 0xF678, + 0x9A3A, 0xF67E, 0x9A3D, 0xF679, 0x9A3E, 0xC55B, 0x9A3F, 0xF6A1, + 0x9A40, 0xC55A, 0x9A41, 0xF67D, 0x9A42, 0xF67C, 0x9A43, 0xC559, + 0x9A44, 0xF67B, 0x9A45, 0xC558, 0x9A46, 0xF67A, 0x9A48, 0xF77D, + 0x9A49, 0xF7A1, 0x9A4A, 0xF77E, 0x9A4C, 0xF77B, 0x9A4D, 0xC5BB, + 0x9A4E, 0xF778, 0x9A4F, 0xF77C, 0x9A50, 0xF7A3, 0x9A52, 0xF7A2, + 0x9A53, 0xF779, 0x9A54, 0xF77A, 0x9A55, 0xC5BA, 0x9A56, 0xF852, + 0x9A57, 0xC5E7, 0x9A59, 0xF853, 0x9A5A, 0xC5E5, 0x9A5B, 0xC5E6, + 0x9A5E, 0xF8D3, 0x9A5F, 0xC64A, 0x9A60, 0xF976, 0x9A62, 0xC66A, + 0x9A64, 0xF9B3, 0x9A65, 0xC66B, 0x9A66, 0xF9B4, 0x9A67, 0xF9B5, + 0x9A68, 0xF9C3, 0x9A69, 0xF9C2, 0x9A6A, 0xC67A, 0x9A6B, 0xF9CD, + 0x9AA8, 0xB0A9, 0x9AAB, 0xE0E9, 0x9AAD, 0xE0E8, 0x9AAF, 0xBBEA, + 0x9AB0, 0xBBEB, 0x9AB1, 0xE4DA, 0x9AB3, 0xE8D2, 0x9AB4, 0xEC6C, + 0x9AB7, 0xBE75, 0x9AB8, 0xC065, 0x9AB9, 0xEC6A, 0x9ABB, 0xEC6D, + 0x9ABC, 0xC066, 0x9ABE, 0xEF64, 0x9ABF, 0xEC6B, 0x9AC0, 0xF1B9, + 0x9AC1, 0xC34E, 0x9AC2, 0xF3C1, 0x9AC6, 0xF566, 0x9AC7, 0xF564, + 0x9ACA, 0xF565, 0x9ACD, 0xF6A2, 0x9ACF, 0xC55C, 0x9AD0, 0xF7A4, + 0x9AD1, 0xC5EA, 0x9AD2, 0xC5BC, 0x9AD3, 0xC5E8, 0x9AD4, 0xC5E9, + 0x9AD5, 0xF8D4, 0x9AD6, 0xC662, 0x9AD8, 0xB0AA, 0x9ADC, 0xF1BA, + 0x9ADF, 0xD449, 0x9AE1, 0xB9A6, 0x9AE3, 0xE4DB, 0x9AE6, 0xBBEC, + 0x9AE7, 0xE4DC, 0x9AEB, 0xE8D4, 0x9AEC, 0xE8D3, 0x9AED, 0xC068, + 0x9AEE, 0xBE76, 0x9AEF, 0xBE77, 0x9AF1, 0xE8D7, 0x9AF2, 0xE8D6, + 0x9AF3, 0xE8D5, 0x9AF6, 0xEC6E, 0x9AF7, 0xEC71, 0x9AF9, 0xEC70, + 0x9AFA, 0xEC6F, 0x9AFB, 0xC067, 0x9AFC, 0xEF68, 0x9AFD, 0xEF66, + 0x9AFE, 0xEF65, 0x9B01, 0xEF67, 0x9B03, 0xC34F, 0x9B04, 0xF1BC, + 0x9B05, 0xF1BD, 0x9B06, 0xC350, 0x9B08, 0xF1BB, 0x9B0A, 0xF3C3, + 0x9B0B, 0xF3C2, 0x9B0C, 0xF3C5, 0x9B0D, 0xC447, 0x9B0E, 0xF3C4, + 0x9B10, 0xF567, 0x9B11, 0xF569, 0x9B12, 0xF568, 0x9B15, 0xF6A3, + 0x9B16, 0xF6A6, 0x9B17, 0xF6A4, 0x9B18, 0xF6A5, 0x9B19, 0xF7A5, + 0x9B1A, 0xC5BD, 0x9B1E, 0xF854, 0x9B1F, 0xF855, 0x9B20, 0xF856, + 0x9B22, 0xC64B, 0x9B23, 0xC663, 0x9B24, 0xF9B6, 0x9B25, 0xB0AB, + 0x9B27, 0xBE78, 0x9B28, 0xC069, 0x9B29, 0xF1BE, 0x9B2B, 0xF7A6, + 0x9B2E, 0xF9C4, 0x9B2F, 0xD44A, 0x9B31, 0xC67B, 0x9B32, 0xB0AC, + 0x9B33, 0xEC72, 0x9B35, 0xF1BF, 0x9B37, 0xF3C6, 0x9B3A, 0xF6A7, + 0x9B3B, 0xF7A7, 0x9B3C, 0xB0AD, 0x9B3E, 0xE4DD, 0x9B3F, 0xE4DE, + 0x9B41, 0xBBED, 0x9B42, 0xBBEE, 0x9B43, 0xE8D9, 0x9B44, 0xBE7A, + 0x9B45, 0xBE79, 0x9B46, 0xE8D8, 0x9B48, 0xEF69, 0x9B4A, 0xF1C0, + 0x9B4B, 0xF1C2, 0x9B4C, 0xF1C1, 0x9B4D, 0xC353, 0x9B4E, 0xC352, + 0x9B4F, 0xC351, 0x9B51, 0xC55E, 0x9B52, 0xF6A8, 0x9B54, 0xC55D, + 0x9B55, 0xF7A9, 0x9B56, 0xF7A8, 0x9B58, 0xC64C, 0x9B59, 0xF8D5, + 0x9B5A, 0xB3BD, 0x9B5B, 0xE0EA, 0x9B5F, 0xE4E1, 0x9B60, 0xE4DF, + 0x9B61, 0xE4E0, 0x9B64, 0xE8E2, 0x9B66, 0xE8DD, 0x9B67, 0xE8DA, + 0x9B68, 0xE8E1, 0x9B6C, 0xE8E3, 0x9B6F, 0xBE7C, 0x9B70, 0xE8E0, + 0x9B71, 0xE8DC, 0x9B74, 0xE8DB, 0x9B75, 0xE8DF, 0x9B76, 0xE8DE, + 0x9B77, 0xBE7B, 0x9B7A, 0xEC7D, 0x9B7B, 0xEC78, 0x9B7C, 0xEC76, + 0x9B7D, 0xECA1, 0x9B7E, 0xEC77, 0x9B80, 0xEC73, 0x9B82, 0xEC79, + 0x9B85, 0xEC74, 0x9B86, 0xEF72, 0x9B87, 0xEC75, 0x9B88, 0xECA2, + 0x9B90, 0xEC7C, 0x9B91, 0xC06A, 0x9B92, 0xEC7B, 0x9B93, 0xEC7A, + 0x9B95, 0xEC7E, 0x9B9A, 0xEF6A, 0x9B9B, 0xEF6D, 0x9B9E, 0xEF6C, + 0x9BA0, 0xEF74, 0x9BA1, 0xEF6F, 0x9BA2, 0xEF73, 0x9BA4, 0xEF71, + 0x9BA5, 0xEF70, 0x9BA6, 0xEF6E, 0x9BA8, 0xEF6B, 0x9BAA, 0xC243, + 0x9BAB, 0xC242, 0x9BAD, 0xC244, 0x9BAE, 0xC241, 0x9BAF, 0xEF75, + 0x9BB5, 0xF1C8, 0x9BB6, 0xF1CB, 0x9BB8, 0xF1C9, 0x9BB9, 0xF1CD, + 0x9BBD, 0xF1CE, 0x9BBF, 0xF1C6, 0x9BC0, 0xC358, 0x9BC1, 0xF1C7, + 0x9BC3, 0xF1C5, 0x9BC4, 0xF1CC, 0x9BC6, 0xF1C4, 0x9BC7, 0xF1C3, + 0x9BC8, 0xC357, 0x9BC9, 0xC355, 0x9BCA, 0xC354, 0x9BD3, 0xF1CA, + 0x9BD4, 0xF3CF, 0x9BD5, 0xF3D5, 0x9BD6, 0xC44A, 0x9BD7, 0xF3D0, + 0x9BD9, 0xF3D3, 0x9BDA, 0xF3D7, 0x9BDB, 0xC44B, 0x9BDC, 0xF3D2, + 0x9BDE, 0xF3CA, 0x9BE0, 0xF3C9, 0x9BE1, 0xF3D6, 0x9BE2, 0xF3CD, + 0x9BE4, 0xF3CB, 0x9BE5, 0xF3D4, 0x9BE6, 0xF3CC, 0x9BE7, 0xC449, + 0x9BE8, 0xC448, 0x9BEA, 0xF3C7, 0x9BEB, 0xF3C8, 0x9BEC, 0xF3D1, + 0x9BF0, 0xF3CE, 0x9BF7, 0xF56C, 0x9BF8, 0xF56F, 0x9BFD, 0xC356, + 0x9C05, 0xF56D, 0x9C06, 0xF573, 0x9C07, 0xF571, 0x9C08, 0xF56B, + 0x9C09, 0xF576, 0x9C0B, 0xF56A, 0x9C0D, 0xC4CF, 0x9C0E, 0xF572, + 0x9C12, 0xF56E, 0x9C13, 0xC4CE, 0x9C14, 0xF575, 0x9C17, 0xF574, + 0x9C1C, 0xF6AB, 0x9C1D, 0xF6AA, 0x9C21, 0xF6B1, 0x9C23, 0xF6AD, + 0x9C24, 0xF6B0, 0x9C25, 0xC560, 0x9C28, 0xF6AE, 0x9C29, 0xF6AF, + 0x9C2B, 0xF6A9, 0x9C2C, 0xF6AC, 0x9C2D, 0xC55F, 0x9C31, 0xC5BF, + 0x9C32, 0xF7B4, 0x9C33, 0xF7AF, 0x9C34, 0xF7B3, 0x9C36, 0xF7B6, + 0x9C37, 0xF7B2, 0x9C39, 0xF7AE, 0x9C3B, 0xC5C1, 0x9C3C, 0xF7B1, + 0x9C3D, 0xF7B5, 0x9C3E, 0xC5C0, 0x9C3F, 0xF7AC, 0x9C40, 0xF570, + 0x9C41, 0xF7B0, 0x9C44, 0xF7AD, 0x9C46, 0xF7AA, 0x9C48, 0xF7AB, + 0x9C49, 0xC5BE, 0x9C4A, 0xF85A, 0x9C4B, 0xF85C, 0x9C4C, 0xF85F, + 0x9C4D, 0xF85B, 0x9C4E, 0xF860, 0x9C50, 0xF859, 0x9C52, 0xF857, + 0x9C54, 0xC5EB, 0x9C55, 0xF85D, 0x9C56, 0xC5ED, 0x9C57, 0xC5EC, + 0x9C58, 0xF858, 0x9C59, 0xF85E, 0x9C5E, 0xF8DA, 0x9C5F, 0xC64D, + 0x9C60, 0xF8DB, 0x9C62, 0xF8D9, 0x9C63, 0xF8D6, 0x9C66, 0xF8D8, + 0x9C67, 0xF8D7, 0x9C68, 0xF95A, 0x9C6D, 0xF95C, 0x9C6E, 0xF95B, + 0x9C71, 0xF979, 0x9C73, 0xF978, 0x9C74, 0xF977, 0x9C75, 0xF97A, + 0x9C77, 0xC673, 0x9C78, 0xC674, 0x9C79, 0xF9CA, 0x9C7A, 0xF9CE, + 0x9CE5, 0xB3BE, 0x9CE6, 0xDCAF, 0x9CE7, 0xE0ED, 0x9CE9, 0xB9A7, + 0x9CEA, 0xE0EB, 0x9CED, 0xE0EC, 0x9CF1, 0xE4E2, 0x9CF2, 0xE4E3, + 0x9CF3, 0xBBF1, 0x9CF4, 0xBBEF, 0x9CF5, 0xE4E4, 0x9CF6, 0xBBF0, + 0x9CF7, 0xE8E8, 0x9CF9, 0xE8EB, 0x9CFA, 0xE8E5, 0x9CFB, 0xE8EC, + 0x9CFC, 0xE8E4, 0x9CFD, 0xE8E6, 0x9CFF, 0xE8E7, 0x9D00, 0xE8EA, + 0x9D03, 0xBEA1, 0x9D04, 0xE8EF, 0x9D05, 0xE8EE, 0x9D06, 0xBE7D, + 0x9D07, 0xE8E9, 0x9D08, 0xE8ED, 0x9D09, 0xBE7E, 0x9D10, 0xECAC, + 0x9D12, 0xC06F, 0x9D14, 0xECA7, 0x9D15, 0xC06B, 0x9D17, 0xECA4, + 0x9D18, 0xECAA, 0x9D19, 0xECAD, 0x9D1B, 0xC070, 0x9D1D, 0xECA9, + 0x9D1E, 0xECA6, 0x9D1F, 0xECAE, 0x9D20, 0xECA5, 0x9D22, 0xECAB, + 0x9D23, 0xC06C, 0x9D25, 0xECA3, 0x9D26, 0xC06D, 0x9D28, 0xC06E, + 0x9D29, 0xECA8, 0x9D2D, 0xEFA9, 0x9D2E, 0xEF7A, 0x9D2F, 0xEF7B, + 0x9D30, 0xEF7E, 0x9D31, 0xEF7C, 0x9D33, 0xEF76, 0x9D36, 0xEF79, + 0x9D37, 0xEFA5, 0x9D38, 0xEF7D, 0x9D3B, 0xC245, 0x9D3D, 0xEFA7, + 0x9D3E, 0xEFA4, 0x9D3F, 0xC246, 0x9D40, 0xEFA6, 0x9D41, 0xEF77, + 0x9D42, 0xEFA2, 0x9D43, 0xEFA3, 0x9D45, 0xEFA1, 0x9D4A, 0xF1D2, + 0x9D4B, 0xF1D4, 0x9D4C, 0xF1D7, 0x9D4F, 0xF1D1, 0x9D51, 0xC359, + 0x9D52, 0xF1D9, 0x9D53, 0xF1D0, 0x9D54, 0xF1DA, 0x9D56, 0xF1D6, + 0x9D57, 0xF1D8, 0x9D58, 0xF1DC, 0x9D59, 0xF1D5, 0x9D5A, 0xF1DD, + 0x9D5B, 0xF1D3, 0x9D5C, 0xF1CF, 0x9D5D, 0xC35A, 0x9D5F, 0xF1DB, + 0x9D60, 0xC35B, 0x9D61, 0xC44D, 0x9D67, 0xEF78, 0x9D68, 0xF3F1, + 0x9D69, 0xF3E8, 0x9D6A, 0xC44F, 0x9D6B, 0xF3E4, 0x9D6C, 0xC450, + 0x9D6F, 0xF3ED, 0x9D70, 0xF3E7, 0x9D71, 0xF3DD, 0x9D72, 0xC44E, + 0x9D73, 0xF3EA, 0x9D74, 0xF3E5, 0x9D75, 0xF3E6, 0x9D77, 0xF3D8, + 0x9D78, 0xF3DF, 0x9D79, 0xF3EE, 0x9D7B, 0xF3EB, 0x9D7D, 0xF3E3, + 0x9D7F, 0xF3EF, 0x9D80, 0xF3DE, 0x9D81, 0xF3D9, 0x9D82, 0xF3EC, + 0x9D84, 0xF3DB, 0x9D85, 0xF3E9, 0x9D86, 0xF3E0, 0x9D87, 0xF3F0, + 0x9D88, 0xF3DC, 0x9D89, 0xC44C, 0x9D8A, 0xF3DA, 0x9D8B, 0xF3E1, + 0x9D8C, 0xF3E2, 0x9D90, 0xF57D, 0x9D92, 0xF57B, 0x9D94, 0xF5A2, + 0x9D96, 0xF5AE, 0x9D97, 0xF5A5, 0x9D98, 0xF57C, 0x9D99, 0xF578, + 0x9D9A, 0xF5A7, 0x9D9B, 0xF57E, 0x9D9C, 0xF5A3, 0x9D9D, 0xF57A, + 0x9D9E, 0xF5AA, 0x9D9F, 0xF577, 0x9DA0, 0xF5A1, 0x9DA1, 0xF5A6, + 0x9DA2, 0xF5A8, 0x9DA3, 0xF5AB, 0x9DA4, 0xF579, 0x9DA6, 0xF5AF, + 0x9DA7, 0xF5B0, 0x9DA8, 0xF5A9, 0x9DA9, 0xF5AD, 0x9DAA, 0xF5A4, + 0x9DAC, 0xF6C1, 0x9DAD, 0xF6C4, 0x9DAF, 0xC561, 0x9DB1, 0xF6C3, + 0x9DB2, 0xF6C8, 0x9DB3, 0xF6C6, 0x9DB4, 0xC562, 0x9DB5, 0xF6BD, + 0x9DB6, 0xF6B3, 0x9DB7, 0xF6B2, 0x9DB8, 0xC564, 0x9DB9, 0xF6BF, + 0x9DBA, 0xF6C0, 0x9DBB, 0xF6BC, 0x9DBC, 0xF6B4, 0x9DBE, 0xF6B9, + 0x9DBF, 0xF5AC, 0x9DC1, 0xF6B5, 0x9DC2, 0xC563, 0x9DC3, 0xF6BB, + 0x9DC5, 0xF6BA, 0x9DC7, 0xF6B6, 0x9DC8, 0xF6C2, 0x9DCA, 0xF6B7, + 0x9DCB, 0xF7BB, 0x9DCC, 0xF6C5, 0x9DCD, 0xF6C7, 0x9DCE, 0xF6BE, + 0x9DCF, 0xF6B8, 0x9DD0, 0xF7BC, 0x9DD1, 0xF7BE, 0x9DD2, 0xF7B8, + 0x9DD3, 0xC5C2, 0x9DD5, 0xF7C5, 0x9DD6, 0xF7C3, 0x9DD7, 0xC5C3, + 0x9DD8, 0xF7C2, 0x9DD9, 0xF7C1, 0x9DDA, 0xF7BA, 0x9DDB, 0xF7B7, + 0x9DDC, 0xF7BD, 0x9DDD, 0xF7C6, 0x9DDE, 0xF7B9, 0x9DDF, 0xF7BF, + 0x9DE1, 0xF869, 0x9DE2, 0xF86E, 0x9DE3, 0xF864, 0x9DE4, 0xF867, + 0x9DE5, 0xC5EE, 0x9DE6, 0xF86B, 0x9DE8, 0xF872, 0x9DE9, 0xF7C0, + 0x9DEB, 0xF865, 0x9DEC, 0xF86F, 0x9DED, 0xF873, 0x9DEE, 0xF86A, + 0x9DEF, 0xF863, 0x9DF0, 0xF86D, 0x9DF2, 0xF86C, 0x9DF3, 0xF871, + 0x9DF4, 0xF870, 0x9DF5, 0xF7C4, 0x9DF6, 0xF868, 0x9DF7, 0xF862, + 0x9DF8, 0xF866, 0x9DF9, 0xC64E, 0x9DFA, 0xC64F, 0x9DFB, 0xF861, + 0x9DFD, 0xF8E6, 0x9DFE, 0xF8DD, 0x9DFF, 0xF8E5, 0x9E00, 0xF8E2, + 0x9E01, 0xF8E3, 0x9E02, 0xF8DC, 0x9E03, 0xF8DF, 0x9E04, 0xF8E7, + 0x9E05, 0xF8E1, 0x9E06, 0xF8E0, 0x9E07, 0xF8DE, 0x9E09, 0xF8E4, + 0x9E0B, 0xF95D, 0x9E0D, 0xF95E, 0x9E0F, 0xF960, 0x9E10, 0xF95F, + 0x9E11, 0xF962, 0x9E12, 0xF961, 0x9E13, 0xF97C, 0x9E14, 0xF97B, + 0x9E15, 0xF9B7, 0x9E17, 0xF9B8, 0x9E19, 0xF9C5, 0x9E1A, 0xC678, + 0x9E1B, 0xC67C, 0x9E1D, 0xF9CF, 0x9E1E, 0xC67D, 0x9E75, 0xB3BF, + 0x9E79, 0xC4D0, 0x9E7A, 0xF6C9, 0x9E7C, 0xC650, 0x9E7D, 0xC651, + 0x9E7F, 0xB3C0, 0x9E80, 0xE0EE, 0x9E82, 0xB9A8, 0x9E83, 0xE8F0, + 0x9E86, 0xECB0, 0x9E87, 0xECB1, 0x9E88, 0xECAF, 0x9E89, 0xEFAB, + 0x9E8A, 0xEFAA, 0x9E8B, 0xC247, 0x9E8C, 0xF1DF, 0x9E8D, 0xEFAC, + 0x9E8E, 0xF1DE, 0x9E91, 0xF3F3, 0x9E92, 0xC451, 0x9E93, 0xC453, + 0x9E94, 0xF3F2, 0x9E97, 0xC452, 0x9E99, 0xF5B1, 0x9E9A, 0xF5B3, + 0x9E9B, 0xF5B2, 0x9E9C, 0xF6CA, 0x9E9D, 0xC565, 0x9E9F, 0xC5EF, + 0x9EA0, 0xF8E8, 0x9EA1, 0xF963, 0x9EA4, 0xF9D2, 0x9EA5, 0xB3C1, + 0x9EA7, 0xE4E5, 0x9EA9, 0xBEA2, 0x9EAD, 0xECB3, 0x9EAE, 0xECB2, + 0x9EB0, 0xEFAD, 0x9EB4, 0xC454, 0x9EB5, 0xC4D1, 0x9EB6, 0xF7C7, + 0x9EB7, 0xF9CB, 0x9EBB, 0xB3C2, 0x9EBC, 0xBBF2, 0x9EBE, 0xBEA3, + 0x9EC0, 0xF3F4, 0x9EC2, 0xF874, 0x9EC3, 0xB6C0, 0x9EC8, 0xEFAE, + 0x9ECC, 0xC664, 0x9ECD, 0xB6C1, 0x9ECE, 0xBEA4, 0x9ECF, 0xC248, + 0x9ED0, 0xF875, 0x9ED1, 0xB6C2, 0x9ED3, 0xE8F1, 0x9ED4, 0xC072, + 0x9ED5, 0xECB4, 0x9ED6, 0xECB5, 0x9ED8, 0xC071, 0x9EDA, 0xEFAF, + 0x9EDB, 0xC24C, 0x9EDC, 0xC24A, 0x9EDD, 0xC24B, 0x9EDE, 0xC249, + 0x9EDF, 0xF1E0, 0x9EE0, 0xC35C, 0x9EE4, 0xF5B5, 0x9EE5, 0xF5B4, + 0x9EE6, 0xF5B7, 0x9EE7, 0xF5B6, 0x9EE8, 0xC4D2, 0x9EEB, 0xF6CB, + 0x9EED, 0xF6CD, 0x9EEE, 0xF6CC, 0x9EEF, 0xC566, 0x9EF0, 0xF7C8, + 0x9EF2, 0xF876, 0x9EF3, 0xF877, 0x9EF4, 0xC5F0, 0x9EF5, 0xF964, + 0x9EF6, 0xF97D, 0x9EF7, 0xC675, 0x9EF9, 0xDCB0, 0x9EFA, 0xECB6, + 0x9EFB, 0xEFB0, 0x9EFC, 0xF3F5, 0x9EFD, 0xE0EF, 0x9EFF, 0xEFB1, + 0x9F00, 0xF1E2, 0x9F01, 0xF1E1, 0x9F06, 0xF878, 0x9F07, 0xC652, + 0x9F09, 0xF965, 0x9F0A, 0xF97E, 0x9F0E, 0xB9A9, 0x9F0F, 0xE8F2, + 0x9F10, 0xE8F3, 0x9F12, 0xECB7, 0x9F13, 0xB9AA, 0x9F15, 0xC35D, + 0x9F16, 0xF1E3, 0x9F18, 0xF6CF, 0x9F19, 0xC567, 0x9F1A, 0xF6D0, + 0x9F1B, 0xF6CE, 0x9F1C, 0xF879, 0x9F1E, 0xF8E9, 0x9F20, 0xB9AB, + 0x9F22, 0xEFB4, 0x9F23, 0xEFB3, 0x9F24, 0xEFB2, 0x9F25, 0xF1E4, + 0x9F28, 0xF1E8, 0x9F29, 0xF1E7, 0x9F2A, 0xF1E6, 0x9F2B, 0xF1E5, + 0x9F2C, 0xC35E, 0x9F2D, 0xF3F6, 0x9F2E, 0xF5B9, 0x9F2F, 0xC4D3, + 0x9F30, 0xF5B8, 0x9F31, 0xF6D1, 0x9F32, 0xF7CB, 0x9F33, 0xF7CA, + 0x9F34, 0xC5C4, 0x9F35, 0xF7C9, 0x9F36, 0xF87C, 0x9F37, 0xF87B, + 0x9F38, 0xF87A, 0x9F3B, 0xBBF3, 0x9F3D, 0xECB8, 0x9F3E, 0xC24D, + 0x9F40, 0xF3F7, 0x9F41, 0xF3F8, 0x9F42, 0xF7CC, 0x9F43, 0xF87D, + 0x9F46, 0xF8EA, 0x9F47, 0xF966, 0x9F48, 0xF9B9, 0x9F49, 0xF9D4, + 0x9F4A, 0xBBF4, 0x9F4B, 0xC24E, 0x9F4C, 0xF1E9, 0x9F4D, 0xF3F9, + 0x9F4E, 0xF6D2, 0x9F4F, 0xF87E, 0x9F52, 0xBEA6, 0x9F54, 0xEFB5, + 0x9F55, 0xF1EA, 0x9F56, 0xF3FA, 0x9F57, 0xF3FB, 0x9F58, 0xF3FC, + 0x9F59, 0xF5BE, 0x9F5B, 0xF5BA, 0x9F5C, 0xC568, 0x9F5D, 0xF5BD, + 0x9F5E, 0xF5BC, 0x9F5F, 0xC4D4, 0x9F60, 0xF5BB, 0x9F61, 0xC4D6, + 0x9F63, 0xC4D5, 0x9F64, 0xF6D4, 0x9F65, 0xF6D3, 0x9F66, 0xC569, + 0x9F67, 0xC56A, 0x9F6A, 0xC5C6, 0x9F6B, 0xF7CD, 0x9F6C, 0xC5C5, + 0x9F6E, 0xF8A3, 0x9F6F, 0xF8A4, 0x9F70, 0xF8A2, 0x9F71, 0xF8A1, + 0x9F72, 0xC654, 0x9F74, 0xF8EB, 0x9F75, 0xF8EC, 0x9F76, 0xF8ED, + 0x9F77, 0xC653, 0x9F78, 0xF967, 0x9F79, 0xF96A, 0x9F7A, 0xF969, + 0x9F7B, 0xF968, 0x9F7E, 0xF9D3, 0x9F8D, 0xC073, 0x9F90, 0xC365, + 0x9F91, 0xF5BF, 0x9F92, 0xF6D5, 0x9F94, 0xC5C7, 0x9F95, 0xF7CE, + 0x9F98, 0xF9D5, 0x9F9C, 0xC074, 0x9FA0, 0xEFB6, 0x9FA2, 0xF7CF, + 0x9FA4, 0xF9A1, 0xFA0C, 0xC94A, 0xFA0D, 0xDDFC, 0xFE30, 0xA14A, + 0xFE31, 0xA157, 0xFE33, 0xA159, 0xFE34, 0xA15B, 0xFE35, 0xA15F, + 0xFE36, 0xA160, 0xFE37, 0xA163, 0xFE38, 0xA164, 0xFE39, 0xA167, + 0xFE3A, 0xA168, 0xFE3B, 0xA16B, 0xFE3C, 0xA16C, 0xFE3D, 0xA16F, + 0xFE3E, 0xA170, 0xFE3F, 0xA173, 0xFE40, 0xA174, 0xFE41, 0xA177, + 0xFE42, 0xA178, 0xFE43, 0xA17B, 0xFE44, 0xA17C, 0xFE49, 0xA1C6, + 0xFE4A, 0xA1C7, 0xFE4B, 0xA1CA, 0xFE4C, 0xA1CB, 0xFE4D, 0xA1C8, + 0xFE4E, 0xA1C9, 0xFE4F, 0xA15C, 0xFE50, 0xA14D, 0xFE51, 0xA14E, + 0xFE52, 0xA14F, 0xFE54, 0xA151, 0xFE55, 0xA152, 0xFE56, 0xA153, + 0xFE57, 0xA154, 0xFE59, 0xA17D, 0xFE5A, 0xA17E, 0xFE5B, 0xA1A1, + 0xFE5C, 0xA1A2, 0xFE5D, 0xA1A3, 0xFE5E, 0xA1A4, 0xFE5F, 0xA1CC, + 0xFE60, 0xA1CD, 0xFE61, 0xA1CE, 0xFE62, 0xA1DE, 0xFE63, 0xA1DF, + 0xFE64, 0xA1E0, 0xFE65, 0xA1E1, 0xFE66, 0xA1E2, 0xFE68, 0xA242, + 0xFE69, 0xA24C, 0xFE6A, 0xA24D, 0xFE6B, 0xA24E, 0xFF01, 0xA149, + 0xFF03, 0xA1AD, 0xFF04, 0xA243, 0xFF05, 0xA248, 0xFF06, 0xA1AE, + 0xFF08, 0xA15D, 0xFF09, 0xA15E, 0xFF0A, 0xA1AF, 0xFF0B, 0xA1CF, + 0xFF0C, 0xA141, 0xFF0D, 0xA1D0, 0xFF0E, 0xA144, 0xFF0F, 0xA1FE, + 0xFF10, 0xA2AF, 0xFF11, 0xA2B0, 0xFF12, 0xA2B1, 0xFF13, 0xA2B2, + 0xFF14, 0xA2B3, 0xFF15, 0xA2B4, 0xFF16, 0xA2B5, 0xFF17, 0xA2B6, + 0xFF18, 0xA2B7, 0xFF19, 0xA2B8, 0xFF1A, 0xA147, 0xFF1B, 0xA146, + 0xFF1C, 0xA1D5, 0xFF1D, 0xA1D7, 0xFF1E, 0xA1D6, 0xFF1F, 0xA148, + 0xFF20, 0xA249, 0xFF21, 0xA2CF, 0xFF22, 0xA2D0, 0xFF23, 0xA2D1, + 0xFF24, 0xA2D2, 0xFF25, 0xA2D3, 0xFF26, 0xA2D4, 0xFF27, 0xA2D5, + 0xFF28, 0xA2D6, 0xFF29, 0xA2D7, 0xFF2A, 0xA2D8, 0xFF2B, 0xA2D9, + 0xFF2C, 0xA2DA, 0xFF2D, 0xA2DB, 0xFF2E, 0xA2DC, 0xFF2F, 0xA2DD, + 0xFF30, 0xA2DE, 0xFF31, 0xA2DF, 0xFF32, 0xA2E0, 0xFF33, 0xA2E1, + 0xFF34, 0xA2E2, 0xFF35, 0xA2E3, 0xFF36, 0xA2E4, 0xFF37, 0xA2E5, + 0xFF38, 0xA2E6, 0xFF39, 0xA2E7, 0xFF3A, 0xA2E8, 0xFF3C, 0xA240, + 0xFF3F, 0xA1C4, 0xFF41, 0xA2E9, 0xFF42, 0xA2EA, 0xFF43, 0xA2EB, + 0xFF44, 0xA2EC, 0xFF45, 0xA2ED, 0xFF46, 0xA2EE, 0xFF47, 0xA2EF, + 0xFF48, 0xA2F0, 0xFF49, 0xA2F1, 0xFF4A, 0xA2F2, 0xFF4B, 0xA2F3, + 0xFF4C, 0xA2F4, 0xFF4D, 0xA2F5, 0xFF4E, 0xA2F6, 0xFF4F, 0xA2F7, + 0xFF50, 0xA2F8, 0xFF51, 0xA2F9, 0xFF52, 0xA2FA, 0xFF53, 0xA2FB, + 0xFF54, 0xA2FC, 0xFF55, 0xA2FD, 0xFF56, 0xA2FE, 0xFF57, 0xA340, + 0xFF58, 0xA341, 0xFF59, 0xA342, 0xFF5A, 0xA343, 0xFF5B, 0xA161, + 0xFF5C, 0xA155, 0xFF5D, 0xA162, 0xFF5E, 0xA1E3, 0xFFE0, 0xA246, + 0xFFE1, 0xA247, 0xFFE3, 0xA1C3, 0xFFE5, 0xA244, 0, 0 +}; + +static +const WCHAR oem2uni[] = { +/* OEM - Unicode, OEM - Unicode, OEM - Unicode, OEM - Unicode */ + 0xA140, 0x3000, 0xA141, 0xFF0C, 0xA142, 0x3001, 0xA143, 0x3002, + 0xA144, 0xFF0E, 0xA145, 0x2027, 0xA146, 0xFF1B, 0xA147, 0xFF1A, + 0xA148, 0xFF1F, 0xA149, 0xFF01, 0xA14A, 0xFE30, 0xA14B, 0x2026, + 0xA14C, 0x2025, 0xA14D, 0xFE50, 0xA14E, 0xFE51, 0xA14F, 0xFE52, + 0xA150, 0x00B7, 0xA151, 0xFE54, 0xA152, 0xFE55, 0xA153, 0xFE56, + 0xA154, 0xFE57, 0xA155, 0xFF5C, 0xA156, 0x2013, 0xA157, 0xFE31, + 0xA158, 0x2014, 0xA159, 0xFE33, 0xA15A, 0x2574, 0xA15B, 0xFE34, + 0xA15C, 0xFE4F, 0xA15D, 0xFF08, 0xA15E, 0xFF09, 0xA15F, 0xFE35, + 0xA160, 0xFE36, 0xA161, 0xFF5B, 0xA162, 0xFF5D, 0xA163, 0xFE37, + 0xA164, 0xFE38, 0xA165, 0x3014, 0xA166, 0x3015, 0xA167, 0xFE39, + 0xA168, 0xFE3A, 0xA169, 0x3010, 0xA16A, 0x3011, 0xA16B, 0xFE3B, + 0xA16C, 0xFE3C, 0xA16D, 0x300A, 0xA16E, 0x300B, 0xA16F, 0xFE3D, + 0xA170, 0xFE3E, 0xA171, 0x3008, 0xA172, 0x3009, 0xA173, 0xFE3F, + 0xA174, 0xFE40, 0xA175, 0x300C, 0xA176, 0x300D, 0xA177, 0xFE41, + 0xA178, 0xFE42, 0xA179, 0x300E, 0xA17A, 0x300F, 0xA17B, 0xFE43, + 0xA17C, 0xFE44, 0xA17D, 0xFE59, 0xA17E, 0xFE5A, 0xA1A1, 0xFE5B, + 0xA1A2, 0xFE5C, 0xA1A3, 0xFE5D, 0xA1A4, 0xFE5E, 0xA1A5, 0x2018, + 0xA1A6, 0x2019, 0xA1A7, 0x201C, 0xA1A8, 0x201D, 0xA1A9, 0x301D, + 0xA1AA, 0x301E, 0xA1AB, 0x2035, 0xA1AC, 0x2032, 0xA1AD, 0xFF03, + 0xA1AE, 0xFF06, 0xA1AF, 0xFF0A, 0xA1B0, 0x203B, 0xA1B1, 0x00A7, + 0xA1B2, 0x3003, 0xA1B3, 0x25CB, 0xA1B4, 0x25CF, 0xA1B5, 0x25B3, + 0xA1B6, 0x25B2, 0xA1B7, 0x25CE, 0xA1B8, 0x2606, 0xA1B9, 0x2605, + 0xA1BA, 0x25C7, 0xA1BB, 0x25C6, 0xA1BC, 0x25A1, 0xA1BD, 0x25A0, + 0xA1BE, 0x25BD, 0xA1BF, 0x25BC, 0xA1C0, 0x32A3, 0xA1C1, 0x2105, + 0xA1C2, 0x00AF, 0xA1C3, 0xFFE3, 0xA1C4, 0xFF3F, 0xA1C5, 0x02CD, + 0xA1C6, 0xFE49, 0xA1C7, 0xFE4A, 0xA1C8, 0xFE4D, 0xA1C9, 0xFE4E, + 0xA1CA, 0xFE4B, 0xA1CB, 0xFE4C, 0xA1CC, 0xFE5F, 0xA1CD, 0xFE60, + 0xA1CE, 0xFE61, 0xA1CF, 0xFF0B, 0xA1D0, 0xFF0D, 0xA1D1, 0x00D7, + 0xA1D2, 0x00F7, 0xA1D3, 0x00B1, 0xA1D4, 0x221A, 0xA1D5, 0xFF1C, + 0xA1D6, 0xFF1E, 0xA1D7, 0xFF1D, 0xA1D8, 0x2266, 0xA1D9, 0x2267, + 0xA1DA, 0x2260, 0xA1DB, 0x221E, 0xA1DC, 0x2252, 0xA1DD, 0x2261, + 0xA1DE, 0xFE62, 0xA1DF, 0xFE63, 0xA1E0, 0xFE64, 0xA1E1, 0xFE65, + 0xA1E2, 0xFE66, 0xA1E3, 0xFF5E, 0xA1E4, 0x2229, 0xA1E5, 0x222A, + 0xA1E6, 0x22A5, 0xA1E7, 0x2220, 0xA1E8, 0x221F, 0xA1E9, 0x22BF, + 0xA1EA, 0x33D2, 0xA1EB, 0x33D1, 0xA1EC, 0x222B, 0xA1ED, 0x222E, + 0xA1EE, 0x2235, 0xA1EF, 0x2234, 0xA1F0, 0x2640, 0xA1F1, 0x2642, + 0xA1F2, 0x2295, 0xA1F3, 0x2299, 0xA1F4, 0x2191, 0xA1F5, 0x2193, + 0xA1F6, 0x2190, 0xA1F7, 0x2192, 0xA1F8, 0x2196, 0xA1F9, 0x2197, + 0xA1FA, 0x2199, 0xA1FB, 0x2198, 0xA1FC, 0x2225, 0xA1FD, 0x2223, + 0xA1FE, 0xFF0F, 0xA240, 0xFF3C, 0xA241, 0x2215, 0xA242, 0xFE68, + 0xA243, 0xFF04, 0xA244, 0xFFE5, 0xA245, 0x3012, 0xA246, 0xFFE0, + 0xA247, 0xFFE1, 0xA248, 0xFF05, 0xA249, 0xFF20, 0xA24A, 0x2103, + 0xA24B, 0x2109, 0xA24C, 0xFE69, 0xA24D, 0xFE6A, 0xA24E, 0xFE6B, + 0xA24F, 0x33D5, 0xA250, 0x339C, 0xA251, 0x339D, 0xA252, 0x339E, + 0xA253, 0x33CE, 0xA254, 0x33A1, 0xA255, 0x338E, 0xA256, 0x338F, + 0xA257, 0x33C4, 0xA258, 0x00B0, 0xA259, 0x5159, 0xA25A, 0x515B, + 0xA25B, 0x515E, 0xA25C, 0x515D, 0xA25D, 0x5161, 0xA25E, 0x5163, + 0xA25F, 0x55E7, 0xA260, 0x74E9, 0xA261, 0x7CCE, 0xA262, 0x2581, + 0xA263, 0x2582, 0xA264, 0x2583, 0xA265, 0x2584, 0xA266, 0x2585, + 0xA267, 0x2586, 0xA268, 0x2587, 0xA269, 0x2588, 0xA26A, 0x258F, + 0xA26B, 0x258E, 0xA26C, 0x258D, 0xA26D, 0x258C, 0xA26E, 0x258B, + 0xA26F, 0x258A, 0xA270, 0x2589, 0xA271, 0x253C, 0xA272, 0x2534, + 0xA273, 0x252C, 0xA274, 0x2524, 0xA275, 0x251C, 0xA276, 0x2594, + 0xA277, 0x2500, 0xA278, 0x2502, 0xA279, 0x2595, 0xA27A, 0x250C, + 0xA27B, 0x2510, 0xA27C, 0x2514, 0xA27D, 0x2518, 0xA27E, 0x256D, + 0xA2A1, 0x256E, 0xA2A2, 0x2570, 0xA2A3, 0x256F, 0xA2A4, 0x2550, + 0xA2A5, 0x255E, 0xA2A6, 0x256A, 0xA2A7, 0x2561, 0xA2A8, 0x25E2, + 0xA2A9, 0x25E3, 0xA2AA, 0x25E5, 0xA2AB, 0x25E4, 0xA2AC, 0x2571, + 0xA2AD, 0x2572, 0xA2AE, 0x2573, 0xA2AF, 0xFF10, 0xA2B0, 0xFF11, + 0xA2B1, 0xFF12, 0xA2B2, 0xFF13, 0xA2B3, 0xFF14, 0xA2B4, 0xFF15, + 0xA2B5, 0xFF16, 0xA2B6, 0xFF17, 0xA2B7, 0xFF18, 0xA2B8, 0xFF19, + 0xA2B9, 0x2160, 0xA2BA, 0x2161, 0xA2BB, 0x2162, 0xA2BC, 0x2163, + 0xA2BD, 0x2164, 0xA2BE, 0x2165, 0xA2BF, 0x2166, 0xA2C0, 0x2167, + 0xA2C1, 0x2168, 0xA2C2, 0x2169, 0xA2C3, 0x3021, 0xA2C4, 0x3022, + 0xA2C5, 0x3023, 0xA2C6, 0x3024, 0xA2C7, 0x3025, 0xA2C8, 0x3026, + 0xA2C9, 0x3027, 0xA2CA, 0x3028, 0xA2CB, 0x3029, 0xA2CC, 0x5341, + 0xA2CD, 0x5344, 0xA2CE, 0x5345, 0xA2CF, 0xFF21, 0xA2D0, 0xFF22, + 0xA2D1, 0xFF23, 0xA2D2, 0xFF24, 0xA2D3, 0xFF25, 0xA2D4, 0xFF26, + 0xA2D5, 0xFF27, 0xA2D6, 0xFF28, 0xA2D7, 0xFF29, 0xA2D8, 0xFF2A, + 0xA2D9, 0xFF2B, 0xA2DA, 0xFF2C, 0xA2DB, 0xFF2D, 0xA2DC, 0xFF2E, + 0xA2DD, 0xFF2F, 0xA2DE, 0xFF30, 0xA2DF, 0xFF31, 0xA2E0, 0xFF32, + 0xA2E1, 0xFF33, 0xA2E2, 0xFF34, 0xA2E3, 0xFF35, 0xA2E4, 0xFF36, + 0xA2E5, 0xFF37, 0xA2E6, 0xFF38, 0xA2E7, 0xFF39, 0xA2E8, 0xFF3A, + 0xA2E9, 0xFF41, 0xA2EA, 0xFF42, 0xA2EB, 0xFF43, 0xA2EC, 0xFF44, + 0xA2ED, 0xFF45, 0xA2EE, 0xFF46, 0xA2EF, 0xFF47, 0xA2F0, 0xFF48, + 0xA2F1, 0xFF49, 0xA2F2, 0xFF4A, 0xA2F3, 0xFF4B, 0xA2F4, 0xFF4C, + 0xA2F5, 0xFF4D, 0xA2F6, 0xFF4E, 0xA2F7, 0xFF4F, 0xA2F8, 0xFF50, + 0xA2F9, 0xFF51, 0xA2FA, 0xFF52, 0xA2FB, 0xFF53, 0xA2FC, 0xFF54, + 0xA2FD, 0xFF55, 0xA2FE, 0xFF56, 0xA340, 0xFF57, 0xA341, 0xFF58, + 0xA342, 0xFF59, 0xA343, 0xFF5A, 0xA344, 0x0391, 0xA345, 0x0392, + 0xA346, 0x0393, 0xA347, 0x0394, 0xA348, 0x0395, 0xA349, 0x0396, + 0xA34A, 0x0397, 0xA34B, 0x0398, 0xA34C, 0x0399, 0xA34D, 0x039A, + 0xA34E, 0x039B, 0xA34F, 0x039C, 0xA350, 0x039D, 0xA351, 0x039E, + 0xA352, 0x039F, 0xA353, 0x03A0, 0xA354, 0x03A1, 0xA355, 0x03A3, + 0xA356, 0x03A4, 0xA357, 0x03A5, 0xA358, 0x03A6, 0xA359, 0x03A7, + 0xA35A, 0x03A8, 0xA35B, 0x03A9, 0xA35C, 0x03B1, 0xA35D, 0x03B2, + 0xA35E, 0x03B3, 0xA35F, 0x03B4, 0xA360, 0x03B5, 0xA361, 0x03B6, + 0xA362, 0x03B7, 0xA363, 0x03B8, 0xA364, 0x03B9, 0xA365, 0x03BA, + 0xA366, 0x03BB, 0xA367, 0x03BC, 0xA368, 0x03BD, 0xA369, 0x03BE, + 0xA36A, 0x03BF, 0xA36B, 0x03C0, 0xA36C, 0x03C1, 0xA36D, 0x03C3, + 0xA36E, 0x03C4, 0xA36F, 0x03C5, 0xA370, 0x03C6, 0xA371, 0x03C7, + 0xA372, 0x03C8, 0xA373, 0x03C9, 0xA374, 0x3105, 0xA375, 0x3106, + 0xA376, 0x3107, 0xA377, 0x3108, 0xA378, 0x3109, 0xA379, 0x310A, + 0xA37A, 0x310B, 0xA37B, 0x310C, 0xA37C, 0x310D, 0xA37D, 0x310E, + 0xA37E, 0x310F, 0xA3A1, 0x3110, 0xA3A2, 0x3111, 0xA3A3, 0x3112, + 0xA3A4, 0x3113, 0xA3A5, 0x3114, 0xA3A6, 0x3115, 0xA3A7, 0x3116, + 0xA3A8, 0x3117, 0xA3A9, 0x3118, 0xA3AA, 0x3119, 0xA3AB, 0x311A, + 0xA3AC, 0x311B, 0xA3AD, 0x311C, 0xA3AE, 0x311D, 0xA3AF, 0x311E, + 0xA3B0, 0x311F, 0xA3B1, 0x3120, 0xA3B2, 0x3121, 0xA3B3, 0x3122, + 0xA3B4, 0x3123, 0xA3B5, 0x3124, 0xA3B6, 0x3125, 0xA3B7, 0x3126, + 0xA3B8, 0x3127, 0xA3B9, 0x3128, 0xA3BA, 0x3129, 0xA3BB, 0x02D9, + 0xA3BC, 0x02C9, 0xA3BD, 0x02CA, 0xA3BE, 0x02C7, 0xA3BF, 0x02CB, + 0xA3E1, 0x20AC, 0xA440, 0x4E00, 0xA441, 0x4E59, 0xA442, 0x4E01, + 0xA443, 0x4E03, 0xA444, 0x4E43, 0xA445, 0x4E5D, 0xA446, 0x4E86, + 0xA447, 0x4E8C, 0xA448, 0x4EBA, 0xA449, 0x513F, 0xA44A, 0x5165, + 0xA44B, 0x516B, 0xA44C, 0x51E0, 0xA44D, 0x5200, 0xA44E, 0x5201, + 0xA44F, 0x529B, 0xA450, 0x5315, 0xA451, 0x5341, 0xA452, 0x535C, + 0xA453, 0x53C8, 0xA454, 0x4E09, 0xA455, 0x4E0B, 0xA456, 0x4E08, + 0xA457, 0x4E0A, 0xA458, 0x4E2B, 0xA459, 0x4E38, 0xA45A, 0x51E1, + 0xA45B, 0x4E45, 0xA45C, 0x4E48, 0xA45D, 0x4E5F, 0xA45E, 0x4E5E, + 0xA45F, 0x4E8E, 0xA460, 0x4EA1, 0xA461, 0x5140, 0xA462, 0x5203, + 0xA463, 0x52FA, 0xA464, 0x5343, 0xA465, 0x53C9, 0xA466, 0x53E3, + 0xA467, 0x571F, 0xA468, 0x58EB, 0xA469, 0x5915, 0xA46A, 0x5927, + 0xA46B, 0x5973, 0xA46C, 0x5B50, 0xA46D, 0x5B51, 0xA46E, 0x5B53, + 0xA46F, 0x5BF8, 0xA470, 0x5C0F, 0xA471, 0x5C22, 0xA472, 0x5C38, + 0xA473, 0x5C71, 0xA474, 0x5DDD, 0xA475, 0x5DE5, 0xA476, 0x5DF1, + 0xA477, 0x5DF2, 0xA478, 0x5DF3, 0xA479, 0x5DFE, 0xA47A, 0x5E72, + 0xA47B, 0x5EFE, 0xA47C, 0x5F0B, 0xA47D, 0x5F13, 0xA47E, 0x624D, + 0xA4A1, 0x4E11, 0xA4A2, 0x4E10, 0xA4A3, 0x4E0D, 0xA4A4, 0x4E2D, + 0xA4A5, 0x4E30, 0xA4A6, 0x4E39, 0xA4A7, 0x4E4B, 0xA4A8, 0x5C39, + 0xA4A9, 0x4E88, 0xA4AA, 0x4E91, 0xA4AB, 0x4E95, 0xA4AC, 0x4E92, + 0xA4AD, 0x4E94, 0xA4AE, 0x4EA2, 0xA4AF, 0x4EC1, 0xA4B0, 0x4EC0, + 0xA4B1, 0x4EC3, 0xA4B2, 0x4EC6, 0xA4B3, 0x4EC7, 0xA4B4, 0x4ECD, + 0xA4B5, 0x4ECA, 0xA4B6, 0x4ECB, 0xA4B7, 0x4EC4, 0xA4B8, 0x5143, + 0xA4B9, 0x5141, 0xA4BA, 0x5167, 0xA4BB, 0x516D, 0xA4BC, 0x516E, + 0xA4BD, 0x516C, 0xA4BE, 0x5197, 0xA4BF, 0x51F6, 0xA4C0, 0x5206, + 0xA4C1, 0x5207, 0xA4C2, 0x5208, 0xA4C3, 0x52FB, 0xA4C4, 0x52FE, + 0xA4C5, 0x52FF, 0xA4C6, 0x5316, 0xA4C7, 0x5339, 0xA4C8, 0x5348, + 0xA4C9, 0x5347, 0xA4CA, 0x5345, 0xA4CB, 0x535E, 0xA4CC, 0x5384, + 0xA4CD, 0x53CB, 0xA4CE, 0x53CA, 0xA4CF, 0x53CD, 0xA4D0, 0x58EC, + 0xA4D1, 0x5929, 0xA4D2, 0x592B, 0xA4D3, 0x592A, 0xA4D4, 0x592D, + 0xA4D5, 0x5B54, 0xA4D6, 0x5C11, 0xA4D7, 0x5C24, 0xA4D8, 0x5C3A, + 0xA4D9, 0x5C6F, 0xA4DA, 0x5DF4, 0xA4DB, 0x5E7B, 0xA4DC, 0x5EFF, + 0xA4DD, 0x5F14, 0xA4DE, 0x5F15, 0xA4DF, 0x5FC3, 0xA4E0, 0x6208, + 0xA4E1, 0x6236, 0xA4E2, 0x624B, 0xA4E3, 0x624E, 0xA4E4, 0x652F, + 0xA4E5, 0x6587, 0xA4E6, 0x6597, 0xA4E7, 0x65A4, 0xA4E8, 0x65B9, + 0xA4E9, 0x65E5, 0xA4EA, 0x66F0, 0xA4EB, 0x6708, 0xA4EC, 0x6728, + 0xA4ED, 0x6B20, 0xA4EE, 0x6B62, 0xA4EF, 0x6B79, 0xA4F0, 0x6BCB, + 0xA4F1, 0x6BD4, 0xA4F2, 0x6BDB, 0xA4F3, 0x6C0F, 0xA4F4, 0x6C34, + 0xA4F5, 0x706B, 0xA4F6, 0x722A, 0xA4F7, 0x7236, 0xA4F8, 0x723B, + 0xA4F9, 0x7247, 0xA4FA, 0x7259, 0xA4FB, 0x725B, 0xA4FC, 0x72AC, + 0xA4FD, 0x738B, 0xA4FE, 0x4E19, 0xA540, 0x4E16, 0xA541, 0x4E15, + 0xA542, 0x4E14, 0xA543, 0x4E18, 0xA544, 0x4E3B, 0xA545, 0x4E4D, + 0xA546, 0x4E4F, 0xA547, 0x4E4E, 0xA548, 0x4EE5, 0xA549, 0x4ED8, + 0xA54A, 0x4ED4, 0xA54B, 0x4ED5, 0xA54C, 0x4ED6, 0xA54D, 0x4ED7, + 0xA54E, 0x4EE3, 0xA54F, 0x4EE4, 0xA550, 0x4ED9, 0xA551, 0x4EDE, + 0xA552, 0x5145, 0xA553, 0x5144, 0xA554, 0x5189, 0xA555, 0x518A, + 0xA556, 0x51AC, 0xA557, 0x51F9, 0xA558, 0x51FA, 0xA559, 0x51F8, + 0xA55A, 0x520A, 0xA55B, 0x52A0, 0xA55C, 0x529F, 0xA55D, 0x5305, + 0xA55E, 0x5306, 0xA55F, 0x5317, 0xA560, 0x531D, 0xA561, 0x4EDF, + 0xA562, 0x534A, 0xA563, 0x5349, 0xA564, 0x5361, 0xA565, 0x5360, + 0xA566, 0x536F, 0xA567, 0x536E, 0xA568, 0x53BB, 0xA569, 0x53EF, + 0xA56A, 0x53E4, 0xA56B, 0x53F3, 0xA56C, 0x53EC, 0xA56D, 0x53EE, + 0xA56E, 0x53E9, 0xA56F, 0x53E8, 0xA570, 0x53FC, 0xA571, 0x53F8, + 0xA572, 0x53F5, 0xA573, 0x53EB, 0xA574, 0x53E6, 0xA575, 0x53EA, + 0xA576, 0x53F2, 0xA577, 0x53F1, 0xA578, 0x53F0, 0xA579, 0x53E5, + 0xA57A, 0x53ED, 0xA57B, 0x53FB, 0xA57C, 0x56DB, 0xA57D, 0x56DA, + 0xA57E, 0x5916, 0xA5A1, 0x592E, 0xA5A2, 0x5931, 0xA5A3, 0x5974, + 0xA5A4, 0x5976, 0xA5A5, 0x5B55, 0xA5A6, 0x5B83, 0xA5A7, 0x5C3C, + 0xA5A8, 0x5DE8, 0xA5A9, 0x5DE7, 0xA5AA, 0x5DE6, 0xA5AB, 0x5E02, + 0xA5AC, 0x5E03, 0xA5AD, 0x5E73, 0xA5AE, 0x5E7C, 0xA5AF, 0x5F01, + 0xA5B0, 0x5F18, 0xA5B1, 0x5F17, 0xA5B2, 0x5FC5, 0xA5B3, 0x620A, + 0xA5B4, 0x6253, 0xA5B5, 0x6254, 0xA5B6, 0x6252, 0xA5B7, 0x6251, + 0xA5B8, 0x65A5, 0xA5B9, 0x65E6, 0xA5BA, 0x672E, 0xA5BB, 0x672C, + 0xA5BC, 0x672A, 0xA5BD, 0x672B, 0xA5BE, 0x672D, 0xA5BF, 0x6B63, + 0xA5C0, 0x6BCD, 0xA5C1, 0x6C11, 0xA5C2, 0x6C10, 0xA5C3, 0x6C38, + 0xA5C4, 0x6C41, 0xA5C5, 0x6C40, 0xA5C6, 0x6C3E, 0xA5C7, 0x72AF, + 0xA5C8, 0x7384, 0xA5C9, 0x7389, 0xA5CA, 0x74DC, 0xA5CB, 0x74E6, + 0xA5CC, 0x7518, 0xA5CD, 0x751F, 0xA5CE, 0x7528, 0xA5CF, 0x7529, + 0xA5D0, 0x7530, 0xA5D1, 0x7531, 0xA5D2, 0x7532, 0xA5D3, 0x7533, + 0xA5D4, 0x758B, 0xA5D5, 0x767D, 0xA5D6, 0x76AE, 0xA5D7, 0x76BF, + 0xA5D8, 0x76EE, 0xA5D9, 0x77DB, 0xA5DA, 0x77E2, 0xA5DB, 0x77F3, + 0xA5DC, 0x793A, 0xA5DD, 0x79BE, 0xA5DE, 0x7A74, 0xA5DF, 0x7ACB, + 0xA5E0, 0x4E1E, 0xA5E1, 0x4E1F, 0xA5E2, 0x4E52, 0xA5E3, 0x4E53, + 0xA5E4, 0x4E69, 0xA5E5, 0x4E99, 0xA5E6, 0x4EA4, 0xA5E7, 0x4EA6, + 0xA5E8, 0x4EA5, 0xA5E9, 0x4EFF, 0xA5EA, 0x4F09, 0xA5EB, 0x4F19, + 0xA5EC, 0x4F0A, 0xA5ED, 0x4F15, 0xA5EE, 0x4F0D, 0xA5EF, 0x4F10, + 0xA5F0, 0x4F11, 0xA5F1, 0x4F0F, 0xA5F2, 0x4EF2, 0xA5F3, 0x4EF6, + 0xA5F4, 0x4EFB, 0xA5F5, 0x4EF0, 0xA5F6, 0x4EF3, 0xA5F7, 0x4EFD, + 0xA5F8, 0x4F01, 0xA5F9, 0x4F0B, 0xA5FA, 0x5149, 0xA5FB, 0x5147, + 0xA5FC, 0x5146, 0xA5FD, 0x5148, 0xA5FE, 0x5168, 0xA640, 0x5171, + 0xA641, 0x518D, 0xA642, 0x51B0, 0xA643, 0x5217, 0xA644, 0x5211, + 0xA645, 0x5212, 0xA646, 0x520E, 0xA647, 0x5216, 0xA648, 0x52A3, + 0xA649, 0x5308, 0xA64A, 0x5321, 0xA64B, 0x5320, 0xA64C, 0x5370, + 0xA64D, 0x5371, 0xA64E, 0x5409, 0xA64F, 0x540F, 0xA650, 0x540C, + 0xA651, 0x540A, 0xA652, 0x5410, 0xA653, 0x5401, 0xA654, 0x540B, + 0xA655, 0x5404, 0xA656, 0x5411, 0xA657, 0x540D, 0xA658, 0x5408, + 0xA659, 0x5403, 0xA65A, 0x540E, 0xA65B, 0x5406, 0xA65C, 0x5412, + 0xA65D, 0x56E0, 0xA65E, 0x56DE, 0xA65F, 0x56DD, 0xA660, 0x5733, + 0xA661, 0x5730, 0xA662, 0x5728, 0xA663, 0x572D, 0xA664, 0x572C, + 0xA665, 0x572F, 0xA666, 0x5729, 0xA667, 0x5919, 0xA668, 0x591A, + 0xA669, 0x5937, 0xA66A, 0x5938, 0xA66B, 0x5984, 0xA66C, 0x5978, + 0xA66D, 0x5983, 0xA66E, 0x597D, 0xA66F, 0x5979, 0xA670, 0x5982, + 0xA671, 0x5981, 0xA672, 0x5B57, 0xA673, 0x5B58, 0xA674, 0x5B87, + 0xA675, 0x5B88, 0xA676, 0x5B85, 0xA677, 0x5B89, 0xA678, 0x5BFA, + 0xA679, 0x5C16, 0xA67A, 0x5C79, 0xA67B, 0x5DDE, 0xA67C, 0x5E06, + 0xA67D, 0x5E76, 0xA67E, 0x5E74, 0xA6A1, 0x5F0F, 0xA6A2, 0x5F1B, + 0xA6A3, 0x5FD9, 0xA6A4, 0x5FD6, 0xA6A5, 0x620E, 0xA6A6, 0x620C, + 0xA6A7, 0x620D, 0xA6A8, 0x6210, 0xA6A9, 0x6263, 0xA6AA, 0x625B, + 0xA6AB, 0x6258, 0xA6AC, 0x6536, 0xA6AD, 0x65E9, 0xA6AE, 0x65E8, + 0xA6AF, 0x65EC, 0xA6B0, 0x65ED, 0xA6B1, 0x66F2, 0xA6B2, 0x66F3, + 0xA6B3, 0x6709, 0xA6B4, 0x673D, 0xA6B5, 0x6734, 0xA6B6, 0x6731, + 0xA6B7, 0x6735, 0xA6B8, 0x6B21, 0xA6B9, 0x6B64, 0xA6BA, 0x6B7B, + 0xA6BB, 0x6C16, 0xA6BC, 0x6C5D, 0xA6BD, 0x6C57, 0xA6BE, 0x6C59, + 0xA6BF, 0x6C5F, 0xA6C0, 0x6C60, 0xA6C1, 0x6C50, 0xA6C2, 0x6C55, + 0xA6C3, 0x6C61, 0xA6C4, 0x6C5B, 0xA6C5, 0x6C4D, 0xA6C6, 0x6C4E, + 0xA6C7, 0x7070, 0xA6C8, 0x725F, 0xA6C9, 0x725D, 0xA6CA, 0x767E, + 0xA6CB, 0x7AF9, 0xA6CC, 0x7C73, 0xA6CD, 0x7CF8, 0xA6CE, 0x7F36, + 0xA6CF, 0x7F8A, 0xA6D0, 0x7FBD, 0xA6D1, 0x8001, 0xA6D2, 0x8003, + 0xA6D3, 0x800C, 0xA6D4, 0x8012, 0xA6D5, 0x8033, 0xA6D6, 0x807F, + 0xA6D7, 0x8089, 0xA6D8, 0x808B, 0xA6D9, 0x808C, 0xA6DA, 0x81E3, + 0xA6DB, 0x81EA, 0xA6DC, 0x81F3, 0xA6DD, 0x81FC, 0xA6DE, 0x820C, + 0xA6DF, 0x821B, 0xA6E0, 0x821F, 0xA6E1, 0x826E, 0xA6E2, 0x8272, + 0xA6E3, 0x827E, 0xA6E4, 0x866B, 0xA6E5, 0x8840, 0xA6E6, 0x884C, + 0xA6E7, 0x8863, 0xA6E8, 0x897F, 0xA6E9, 0x9621, 0xA6EA, 0x4E32, + 0xA6EB, 0x4EA8, 0xA6EC, 0x4F4D, 0xA6ED, 0x4F4F, 0xA6EE, 0x4F47, + 0xA6EF, 0x4F57, 0xA6F0, 0x4F5E, 0xA6F1, 0x4F34, 0xA6F2, 0x4F5B, + 0xA6F3, 0x4F55, 0xA6F4, 0x4F30, 0xA6F5, 0x4F50, 0xA6F6, 0x4F51, + 0xA6F7, 0x4F3D, 0xA6F8, 0x4F3A, 0xA6F9, 0x4F38, 0xA6FA, 0x4F43, + 0xA6FB, 0x4F54, 0xA6FC, 0x4F3C, 0xA6FD, 0x4F46, 0xA6FE, 0x4F63, + 0xA740, 0x4F5C, 0xA741, 0x4F60, 0xA742, 0x4F2F, 0xA743, 0x4F4E, + 0xA744, 0x4F36, 0xA745, 0x4F59, 0xA746, 0x4F5D, 0xA747, 0x4F48, + 0xA748, 0x4F5A, 0xA749, 0x514C, 0xA74A, 0x514B, 0xA74B, 0x514D, + 0xA74C, 0x5175, 0xA74D, 0x51B6, 0xA74E, 0x51B7, 0xA74F, 0x5225, + 0xA750, 0x5224, 0xA751, 0x5229, 0xA752, 0x522A, 0xA753, 0x5228, + 0xA754, 0x52AB, 0xA755, 0x52A9, 0xA756, 0x52AA, 0xA757, 0x52AC, + 0xA758, 0x5323, 0xA759, 0x5373, 0xA75A, 0x5375, 0xA75B, 0x541D, + 0xA75C, 0x542D, 0xA75D, 0x541E, 0xA75E, 0x543E, 0xA75F, 0x5426, + 0xA760, 0x544E, 0xA761, 0x5427, 0xA762, 0x5446, 0xA763, 0x5443, + 0xA764, 0x5433, 0xA765, 0x5448, 0xA766, 0x5442, 0xA767, 0x541B, + 0xA768, 0x5429, 0xA769, 0x544A, 0xA76A, 0x5439, 0xA76B, 0x543B, + 0xA76C, 0x5438, 0xA76D, 0x542E, 0xA76E, 0x5435, 0xA76F, 0x5436, + 0xA770, 0x5420, 0xA771, 0x543C, 0xA772, 0x5440, 0xA773, 0x5431, + 0xA774, 0x542B, 0xA775, 0x541F, 0xA776, 0x542C, 0xA777, 0x56EA, + 0xA778, 0x56F0, 0xA779, 0x56E4, 0xA77A, 0x56EB, 0xA77B, 0x574A, + 0xA77C, 0x5751, 0xA77D, 0x5740, 0xA77E, 0x574D, 0xA7A1, 0x5747, + 0xA7A2, 0x574E, 0xA7A3, 0x573E, 0xA7A4, 0x5750, 0xA7A5, 0x574F, + 0xA7A6, 0x573B, 0xA7A7, 0x58EF, 0xA7A8, 0x593E, 0xA7A9, 0x599D, + 0xA7AA, 0x5992, 0xA7AB, 0x59A8, 0xA7AC, 0x599E, 0xA7AD, 0x59A3, + 0xA7AE, 0x5999, 0xA7AF, 0x5996, 0xA7B0, 0x598D, 0xA7B1, 0x59A4, + 0xA7B2, 0x5993, 0xA7B3, 0x598A, 0xA7B4, 0x59A5, 0xA7B5, 0x5B5D, + 0xA7B6, 0x5B5C, 0xA7B7, 0x5B5A, 0xA7B8, 0x5B5B, 0xA7B9, 0x5B8C, + 0xA7BA, 0x5B8B, 0xA7BB, 0x5B8F, 0xA7BC, 0x5C2C, 0xA7BD, 0x5C40, + 0xA7BE, 0x5C41, 0xA7BF, 0x5C3F, 0xA7C0, 0x5C3E, 0xA7C1, 0x5C90, + 0xA7C2, 0x5C91, 0xA7C3, 0x5C94, 0xA7C4, 0x5C8C, 0xA7C5, 0x5DEB, + 0xA7C6, 0x5E0C, 0xA7C7, 0x5E8F, 0xA7C8, 0x5E87, 0xA7C9, 0x5E8A, + 0xA7CA, 0x5EF7, 0xA7CB, 0x5F04, 0xA7CC, 0x5F1F, 0xA7CD, 0x5F64, + 0xA7CE, 0x5F62, 0xA7CF, 0x5F77, 0xA7D0, 0x5F79, 0xA7D1, 0x5FD8, + 0xA7D2, 0x5FCC, 0xA7D3, 0x5FD7, 0xA7D4, 0x5FCD, 0xA7D5, 0x5FF1, + 0xA7D6, 0x5FEB, 0xA7D7, 0x5FF8, 0xA7D8, 0x5FEA, 0xA7D9, 0x6212, + 0xA7DA, 0x6211, 0xA7DB, 0x6284, 0xA7DC, 0x6297, 0xA7DD, 0x6296, + 0xA7DE, 0x6280, 0xA7DF, 0x6276, 0xA7E0, 0x6289, 0xA7E1, 0x626D, + 0xA7E2, 0x628A, 0xA7E3, 0x627C, 0xA7E4, 0x627E, 0xA7E5, 0x6279, + 0xA7E6, 0x6273, 0xA7E7, 0x6292, 0xA7E8, 0x626F, 0xA7E9, 0x6298, + 0xA7EA, 0x626E, 0xA7EB, 0x6295, 0xA7EC, 0x6293, 0xA7ED, 0x6291, + 0xA7EE, 0x6286, 0xA7EF, 0x6539, 0xA7F0, 0x653B, 0xA7F1, 0x6538, + 0xA7F2, 0x65F1, 0xA7F3, 0x66F4, 0xA7F4, 0x675F, 0xA7F5, 0x674E, + 0xA7F6, 0x674F, 0xA7F7, 0x6750, 0xA7F8, 0x6751, 0xA7F9, 0x675C, + 0xA7FA, 0x6756, 0xA7FB, 0x675E, 0xA7FC, 0x6749, 0xA7FD, 0x6746, + 0xA7FE, 0x6760, 0xA840, 0x6753, 0xA841, 0x6757, 0xA842, 0x6B65, + 0xA843, 0x6BCF, 0xA844, 0x6C42, 0xA845, 0x6C5E, 0xA846, 0x6C99, + 0xA847, 0x6C81, 0xA848, 0x6C88, 0xA849, 0x6C89, 0xA84A, 0x6C85, + 0xA84B, 0x6C9B, 0xA84C, 0x6C6A, 0xA84D, 0x6C7A, 0xA84E, 0x6C90, + 0xA84F, 0x6C70, 0xA850, 0x6C8C, 0xA851, 0x6C68, 0xA852, 0x6C96, + 0xA853, 0x6C92, 0xA854, 0x6C7D, 0xA855, 0x6C83, 0xA856, 0x6C72, + 0xA857, 0x6C7E, 0xA858, 0x6C74, 0xA859, 0x6C86, 0xA85A, 0x6C76, + 0xA85B, 0x6C8D, 0xA85C, 0x6C94, 0xA85D, 0x6C98, 0xA85E, 0x6C82, + 0xA85F, 0x7076, 0xA860, 0x707C, 0xA861, 0x707D, 0xA862, 0x7078, + 0xA863, 0x7262, 0xA864, 0x7261, 0xA865, 0x7260, 0xA866, 0x72C4, + 0xA867, 0x72C2, 0xA868, 0x7396, 0xA869, 0x752C, 0xA86A, 0x752B, + 0xA86B, 0x7537, 0xA86C, 0x7538, 0xA86D, 0x7682, 0xA86E, 0x76EF, + 0xA86F, 0x77E3, 0xA870, 0x79C1, 0xA871, 0x79C0, 0xA872, 0x79BF, + 0xA873, 0x7A76, 0xA874, 0x7CFB, 0xA875, 0x7F55, 0xA876, 0x8096, + 0xA877, 0x8093, 0xA878, 0x809D, 0xA879, 0x8098, 0xA87A, 0x809B, + 0xA87B, 0x809A, 0xA87C, 0x80B2, 0xA87D, 0x826F, 0xA87E, 0x8292, + 0xA8A1, 0x828B, 0xA8A2, 0x828D, 0xA8A3, 0x898B, 0xA8A4, 0x89D2, + 0xA8A5, 0x8A00, 0xA8A6, 0x8C37, 0xA8A7, 0x8C46, 0xA8A8, 0x8C55, + 0xA8A9, 0x8C9D, 0xA8AA, 0x8D64, 0xA8AB, 0x8D70, 0xA8AC, 0x8DB3, + 0xA8AD, 0x8EAB, 0xA8AE, 0x8ECA, 0xA8AF, 0x8F9B, 0xA8B0, 0x8FB0, + 0xA8B1, 0x8FC2, 0xA8B2, 0x8FC6, 0xA8B3, 0x8FC5, 0xA8B4, 0x8FC4, + 0xA8B5, 0x5DE1, 0xA8B6, 0x9091, 0xA8B7, 0x90A2, 0xA8B8, 0x90AA, + 0xA8B9, 0x90A6, 0xA8BA, 0x90A3, 0xA8BB, 0x9149, 0xA8BC, 0x91C6, + 0xA8BD, 0x91CC, 0xA8BE, 0x9632, 0xA8BF, 0x962E, 0xA8C0, 0x9631, + 0xA8C1, 0x962A, 0xA8C2, 0x962C, 0xA8C3, 0x4E26, 0xA8C4, 0x4E56, + 0xA8C5, 0x4E73, 0xA8C6, 0x4E8B, 0xA8C7, 0x4E9B, 0xA8C8, 0x4E9E, + 0xA8C9, 0x4EAB, 0xA8CA, 0x4EAC, 0xA8CB, 0x4F6F, 0xA8CC, 0x4F9D, + 0xA8CD, 0x4F8D, 0xA8CE, 0x4F73, 0xA8CF, 0x4F7F, 0xA8D0, 0x4F6C, + 0xA8D1, 0x4F9B, 0xA8D2, 0x4F8B, 0xA8D3, 0x4F86, 0xA8D4, 0x4F83, + 0xA8D5, 0x4F70, 0xA8D6, 0x4F75, 0xA8D7, 0x4F88, 0xA8D8, 0x4F69, + 0xA8D9, 0x4F7B, 0xA8DA, 0x4F96, 0xA8DB, 0x4F7E, 0xA8DC, 0x4F8F, + 0xA8DD, 0x4F91, 0xA8DE, 0x4F7A, 0xA8DF, 0x5154, 0xA8E0, 0x5152, + 0xA8E1, 0x5155, 0xA8E2, 0x5169, 0xA8E3, 0x5177, 0xA8E4, 0x5176, + 0xA8E5, 0x5178, 0xA8E6, 0x51BD, 0xA8E7, 0x51FD, 0xA8E8, 0x523B, + 0xA8E9, 0x5238, 0xA8EA, 0x5237, 0xA8EB, 0x523A, 0xA8EC, 0x5230, + 0xA8ED, 0x522E, 0xA8EE, 0x5236, 0xA8EF, 0x5241, 0xA8F0, 0x52BE, + 0xA8F1, 0x52BB, 0xA8F2, 0x5352, 0xA8F3, 0x5354, 0xA8F4, 0x5353, + 0xA8F5, 0x5351, 0xA8F6, 0x5366, 0xA8F7, 0x5377, 0xA8F8, 0x5378, + 0xA8F9, 0x5379, 0xA8FA, 0x53D6, 0xA8FB, 0x53D4, 0xA8FC, 0x53D7, + 0xA8FD, 0x5473, 0xA8FE, 0x5475, 0xA940, 0x5496, 0xA941, 0x5478, + 0xA942, 0x5495, 0xA943, 0x5480, 0xA944, 0x547B, 0xA945, 0x5477, + 0xA946, 0x5484, 0xA947, 0x5492, 0xA948, 0x5486, 0xA949, 0x547C, + 0xA94A, 0x5490, 0xA94B, 0x5471, 0xA94C, 0x5476, 0xA94D, 0x548C, + 0xA94E, 0x549A, 0xA94F, 0x5462, 0xA950, 0x5468, 0xA951, 0x548B, + 0xA952, 0x547D, 0xA953, 0x548E, 0xA954, 0x56FA, 0xA955, 0x5783, + 0xA956, 0x5777, 0xA957, 0x576A, 0xA958, 0x5769, 0xA959, 0x5761, + 0xA95A, 0x5766, 0xA95B, 0x5764, 0xA95C, 0x577C, 0xA95D, 0x591C, + 0xA95E, 0x5949, 0xA95F, 0x5947, 0xA960, 0x5948, 0xA961, 0x5944, + 0xA962, 0x5954, 0xA963, 0x59BE, 0xA964, 0x59BB, 0xA965, 0x59D4, + 0xA966, 0x59B9, 0xA967, 0x59AE, 0xA968, 0x59D1, 0xA969, 0x59C6, + 0xA96A, 0x59D0, 0xA96B, 0x59CD, 0xA96C, 0x59CB, 0xA96D, 0x59D3, + 0xA96E, 0x59CA, 0xA96F, 0x59AF, 0xA970, 0x59B3, 0xA971, 0x59D2, + 0xA972, 0x59C5, 0xA973, 0x5B5F, 0xA974, 0x5B64, 0xA975, 0x5B63, + 0xA976, 0x5B97, 0xA977, 0x5B9A, 0xA978, 0x5B98, 0xA979, 0x5B9C, + 0xA97A, 0x5B99, 0xA97B, 0x5B9B, 0xA97C, 0x5C1A, 0xA97D, 0x5C48, + 0xA97E, 0x5C45, 0xA9A1, 0x5C46, 0xA9A2, 0x5CB7, 0xA9A3, 0x5CA1, + 0xA9A4, 0x5CB8, 0xA9A5, 0x5CA9, 0xA9A6, 0x5CAB, 0xA9A7, 0x5CB1, + 0xA9A8, 0x5CB3, 0xA9A9, 0x5E18, 0xA9AA, 0x5E1A, 0xA9AB, 0x5E16, + 0xA9AC, 0x5E15, 0xA9AD, 0x5E1B, 0xA9AE, 0x5E11, 0xA9AF, 0x5E78, + 0xA9B0, 0x5E9A, 0xA9B1, 0x5E97, 0xA9B2, 0x5E9C, 0xA9B3, 0x5E95, + 0xA9B4, 0x5E96, 0xA9B5, 0x5EF6, 0xA9B6, 0x5F26, 0xA9B7, 0x5F27, + 0xA9B8, 0x5F29, 0xA9B9, 0x5F80, 0xA9BA, 0x5F81, 0xA9BB, 0x5F7F, + 0xA9BC, 0x5F7C, 0xA9BD, 0x5FDD, 0xA9BE, 0x5FE0, 0xA9BF, 0x5FFD, + 0xA9C0, 0x5FF5, 0xA9C1, 0x5FFF, 0xA9C2, 0x600F, 0xA9C3, 0x6014, + 0xA9C4, 0x602F, 0xA9C5, 0x6035, 0xA9C6, 0x6016, 0xA9C7, 0x602A, + 0xA9C8, 0x6015, 0xA9C9, 0x6021, 0xA9CA, 0x6027, 0xA9CB, 0x6029, + 0xA9CC, 0x602B, 0xA9CD, 0x601B, 0xA9CE, 0x6216, 0xA9CF, 0x6215, + 0xA9D0, 0x623F, 0xA9D1, 0x623E, 0xA9D2, 0x6240, 0xA9D3, 0x627F, + 0xA9D4, 0x62C9, 0xA9D5, 0x62CC, 0xA9D6, 0x62C4, 0xA9D7, 0x62BF, + 0xA9D8, 0x62C2, 0xA9D9, 0x62B9, 0xA9DA, 0x62D2, 0xA9DB, 0x62DB, + 0xA9DC, 0x62AB, 0xA9DD, 0x62D3, 0xA9DE, 0x62D4, 0xA9DF, 0x62CB, + 0xA9E0, 0x62C8, 0xA9E1, 0x62A8, 0xA9E2, 0x62BD, 0xA9E3, 0x62BC, + 0xA9E4, 0x62D0, 0xA9E5, 0x62D9, 0xA9E6, 0x62C7, 0xA9E7, 0x62CD, + 0xA9E8, 0x62B5, 0xA9E9, 0x62DA, 0xA9EA, 0x62B1, 0xA9EB, 0x62D8, + 0xA9EC, 0x62D6, 0xA9ED, 0x62D7, 0xA9EE, 0x62C6, 0xA9EF, 0x62AC, + 0xA9F0, 0x62CE, 0xA9F1, 0x653E, 0xA9F2, 0x65A7, 0xA9F3, 0x65BC, + 0xA9F4, 0x65FA, 0xA9F5, 0x6614, 0xA9F6, 0x6613, 0xA9F7, 0x660C, + 0xA9F8, 0x6606, 0xA9F9, 0x6602, 0xA9FA, 0x660E, 0xA9FB, 0x6600, + 0xA9FC, 0x660F, 0xA9FD, 0x6615, 0xA9FE, 0x660A, 0xAA40, 0x6607, + 0xAA41, 0x670D, 0xAA42, 0x670B, 0xAA43, 0x676D, 0xAA44, 0x678B, + 0xAA45, 0x6795, 0xAA46, 0x6771, 0xAA47, 0x679C, 0xAA48, 0x6773, + 0xAA49, 0x6777, 0xAA4A, 0x6787, 0xAA4B, 0x679D, 0xAA4C, 0x6797, + 0xAA4D, 0x676F, 0xAA4E, 0x6770, 0xAA4F, 0x677F, 0xAA50, 0x6789, + 0xAA51, 0x677E, 0xAA52, 0x6790, 0xAA53, 0x6775, 0xAA54, 0x679A, + 0xAA55, 0x6793, 0xAA56, 0x677C, 0xAA57, 0x676A, 0xAA58, 0x6772, + 0xAA59, 0x6B23, 0xAA5A, 0x6B66, 0xAA5B, 0x6B67, 0xAA5C, 0x6B7F, + 0xAA5D, 0x6C13, 0xAA5E, 0x6C1B, 0xAA5F, 0x6CE3, 0xAA60, 0x6CE8, + 0xAA61, 0x6CF3, 0xAA62, 0x6CB1, 0xAA63, 0x6CCC, 0xAA64, 0x6CE5, + 0xAA65, 0x6CB3, 0xAA66, 0x6CBD, 0xAA67, 0x6CBE, 0xAA68, 0x6CBC, + 0xAA69, 0x6CE2, 0xAA6A, 0x6CAB, 0xAA6B, 0x6CD5, 0xAA6C, 0x6CD3, + 0xAA6D, 0x6CB8, 0xAA6E, 0x6CC4, 0xAA6F, 0x6CB9, 0xAA70, 0x6CC1, + 0xAA71, 0x6CAE, 0xAA72, 0x6CD7, 0xAA73, 0x6CC5, 0xAA74, 0x6CF1, + 0xAA75, 0x6CBF, 0xAA76, 0x6CBB, 0xAA77, 0x6CE1, 0xAA78, 0x6CDB, + 0xAA79, 0x6CCA, 0xAA7A, 0x6CAC, 0xAA7B, 0x6CEF, 0xAA7C, 0x6CDC, + 0xAA7D, 0x6CD6, 0xAA7E, 0x6CE0, 0xAAA1, 0x7095, 0xAAA2, 0x708E, + 0xAAA3, 0x7092, 0xAAA4, 0x708A, 0xAAA5, 0x7099, 0xAAA6, 0x722C, + 0xAAA7, 0x722D, 0xAAA8, 0x7238, 0xAAA9, 0x7248, 0xAAAA, 0x7267, + 0xAAAB, 0x7269, 0xAAAC, 0x72C0, 0xAAAD, 0x72CE, 0xAAAE, 0x72D9, + 0xAAAF, 0x72D7, 0xAAB0, 0x72D0, 0xAAB1, 0x73A9, 0xAAB2, 0x73A8, + 0xAAB3, 0x739F, 0xAAB4, 0x73AB, 0xAAB5, 0x73A5, 0xAAB6, 0x753D, + 0xAAB7, 0x759D, 0xAAB8, 0x7599, 0xAAB9, 0x759A, 0xAABA, 0x7684, + 0xAABB, 0x76C2, 0xAABC, 0x76F2, 0xAABD, 0x76F4, 0xAABE, 0x77E5, + 0xAABF, 0x77FD, 0xAAC0, 0x793E, 0xAAC1, 0x7940, 0xAAC2, 0x7941, + 0xAAC3, 0x79C9, 0xAAC4, 0x79C8, 0xAAC5, 0x7A7A, 0xAAC6, 0x7A79, + 0xAAC7, 0x7AFA, 0xAAC8, 0x7CFE, 0xAAC9, 0x7F54, 0xAACA, 0x7F8C, + 0xAACB, 0x7F8B, 0xAACC, 0x8005, 0xAACD, 0x80BA, 0xAACE, 0x80A5, + 0xAACF, 0x80A2, 0xAAD0, 0x80B1, 0xAAD1, 0x80A1, 0xAAD2, 0x80AB, + 0xAAD3, 0x80A9, 0xAAD4, 0x80B4, 0xAAD5, 0x80AA, 0xAAD6, 0x80AF, + 0xAAD7, 0x81E5, 0xAAD8, 0x81FE, 0xAAD9, 0x820D, 0xAADA, 0x82B3, + 0xAADB, 0x829D, 0xAADC, 0x8299, 0xAADD, 0x82AD, 0xAADE, 0x82BD, + 0xAADF, 0x829F, 0xAAE0, 0x82B9, 0xAAE1, 0x82B1, 0xAAE2, 0x82AC, + 0xAAE3, 0x82A5, 0xAAE4, 0x82AF, 0xAAE5, 0x82B8, 0xAAE6, 0x82A3, + 0xAAE7, 0x82B0, 0xAAE8, 0x82BE, 0xAAE9, 0x82B7, 0xAAEA, 0x864E, + 0xAAEB, 0x8671, 0xAAEC, 0x521D, 0xAAED, 0x8868, 0xAAEE, 0x8ECB, + 0xAAEF, 0x8FCE, 0xAAF0, 0x8FD4, 0xAAF1, 0x8FD1, 0xAAF2, 0x90B5, + 0xAAF3, 0x90B8, 0xAAF4, 0x90B1, 0xAAF5, 0x90B6, 0xAAF6, 0x91C7, + 0xAAF7, 0x91D1, 0xAAF8, 0x9577, 0xAAF9, 0x9580, 0xAAFA, 0x961C, + 0xAAFB, 0x9640, 0xAAFC, 0x963F, 0xAAFD, 0x963B, 0xAAFE, 0x9644, + 0xAB40, 0x9642, 0xAB41, 0x96B9, 0xAB42, 0x96E8, 0xAB43, 0x9752, + 0xAB44, 0x975E, 0xAB45, 0x4E9F, 0xAB46, 0x4EAD, 0xAB47, 0x4EAE, + 0xAB48, 0x4FE1, 0xAB49, 0x4FB5, 0xAB4A, 0x4FAF, 0xAB4B, 0x4FBF, + 0xAB4C, 0x4FE0, 0xAB4D, 0x4FD1, 0xAB4E, 0x4FCF, 0xAB4F, 0x4FDD, + 0xAB50, 0x4FC3, 0xAB51, 0x4FB6, 0xAB52, 0x4FD8, 0xAB53, 0x4FDF, + 0xAB54, 0x4FCA, 0xAB55, 0x4FD7, 0xAB56, 0x4FAE, 0xAB57, 0x4FD0, + 0xAB58, 0x4FC4, 0xAB59, 0x4FC2, 0xAB5A, 0x4FDA, 0xAB5B, 0x4FCE, + 0xAB5C, 0x4FDE, 0xAB5D, 0x4FB7, 0xAB5E, 0x5157, 0xAB5F, 0x5192, + 0xAB60, 0x5191, 0xAB61, 0x51A0, 0xAB62, 0x524E, 0xAB63, 0x5243, + 0xAB64, 0x524A, 0xAB65, 0x524D, 0xAB66, 0x524C, 0xAB67, 0x524B, + 0xAB68, 0x5247, 0xAB69, 0x52C7, 0xAB6A, 0x52C9, 0xAB6B, 0x52C3, + 0xAB6C, 0x52C1, 0xAB6D, 0x530D, 0xAB6E, 0x5357, 0xAB6F, 0x537B, + 0xAB70, 0x539A, 0xAB71, 0x53DB, 0xAB72, 0x54AC, 0xAB73, 0x54C0, + 0xAB74, 0x54A8, 0xAB75, 0x54CE, 0xAB76, 0x54C9, 0xAB77, 0x54B8, + 0xAB78, 0x54A6, 0xAB79, 0x54B3, 0xAB7A, 0x54C7, 0xAB7B, 0x54C2, + 0xAB7C, 0x54BD, 0xAB7D, 0x54AA, 0xAB7E, 0x54C1, 0xABA1, 0x54C4, + 0xABA2, 0x54C8, 0xABA3, 0x54AF, 0xABA4, 0x54AB, 0xABA5, 0x54B1, + 0xABA6, 0x54BB, 0xABA7, 0x54A9, 0xABA8, 0x54A7, 0xABA9, 0x54BF, + 0xABAA, 0x56FF, 0xABAB, 0x5782, 0xABAC, 0x578B, 0xABAD, 0x57A0, + 0xABAE, 0x57A3, 0xABAF, 0x57A2, 0xABB0, 0x57CE, 0xABB1, 0x57AE, + 0xABB2, 0x5793, 0xABB3, 0x5955, 0xABB4, 0x5951, 0xABB5, 0x594F, + 0xABB6, 0x594E, 0xABB7, 0x5950, 0xABB8, 0x59DC, 0xABB9, 0x59D8, + 0xABBA, 0x59FF, 0xABBB, 0x59E3, 0xABBC, 0x59E8, 0xABBD, 0x5A03, + 0xABBE, 0x59E5, 0xABBF, 0x59EA, 0xABC0, 0x59DA, 0xABC1, 0x59E6, + 0xABC2, 0x5A01, 0xABC3, 0x59FB, 0xABC4, 0x5B69, 0xABC5, 0x5BA3, + 0xABC6, 0x5BA6, 0xABC7, 0x5BA4, 0xABC8, 0x5BA2, 0xABC9, 0x5BA5, + 0xABCA, 0x5C01, 0xABCB, 0x5C4E, 0xABCC, 0x5C4F, 0xABCD, 0x5C4D, + 0xABCE, 0x5C4B, 0xABCF, 0x5CD9, 0xABD0, 0x5CD2, 0xABD1, 0x5DF7, + 0xABD2, 0x5E1D, 0xABD3, 0x5E25, 0xABD4, 0x5E1F, 0xABD5, 0x5E7D, + 0xABD6, 0x5EA0, 0xABD7, 0x5EA6, 0xABD8, 0x5EFA, 0xABD9, 0x5F08, + 0xABDA, 0x5F2D, 0xABDB, 0x5F65, 0xABDC, 0x5F88, 0xABDD, 0x5F85, + 0xABDE, 0x5F8A, 0xABDF, 0x5F8B, 0xABE0, 0x5F87, 0xABE1, 0x5F8C, + 0xABE2, 0x5F89, 0xABE3, 0x6012, 0xABE4, 0x601D, 0xABE5, 0x6020, + 0xABE6, 0x6025, 0xABE7, 0x600E, 0xABE8, 0x6028, 0xABE9, 0x604D, + 0xABEA, 0x6070, 0xABEB, 0x6068, 0xABEC, 0x6062, 0xABED, 0x6046, + 0xABEE, 0x6043, 0xABEF, 0x606C, 0xABF0, 0x606B, 0xABF1, 0x606A, + 0xABF2, 0x6064, 0xABF3, 0x6241, 0xABF4, 0x62DC, 0xABF5, 0x6316, + 0xABF6, 0x6309, 0xABF7, 0x62FC, 0xABF8, 0x62ED, 0xABF9, 0x6301, + 0xABFA, 0x62EE, 0xABFB, 0x62FD, 0xABFC, 0x6307, 0xABFD, 0x62F1, + 0xABFE, 0x62F7, 0xAC40, 0x62EF, 0xAC41, 0x62EC, 0xAC42, 0x62FE, + 0xAC43, 0x62F4, 0xAC44, 0x6311, 0xAC45, 0x6302, 0xAC46, 0x653F, + 0xAC47, 0x6545, 0xAC48, 0x65AB, 0xAC49, 0x65BD, 0xAC4A, 0x65E2, + 0xAC4B, 0x6625, 0xAC4C, 0x662D, 0xAC4D, 0x6620, 0xAC4E, 0x6627, + 0xAC4F, 0x662F, 0xAC50, 0x661F, 0xAC51, 0x6628, 0xAC52, 0x6631, + 0xAC53, 0x6624, 0xAC54, 0x66F7, 0xAC55, 0x67FF, 0xAC56, 0x67D3, + 0xAC57, 0x67F1, 0xAC58, 0x67D4, 0xAC59, 0x67D0, 0xAC5A, 0x67EC, + 0xAC5B, 0x67B6, 0xAC5C, 0x67AF, 0xAC5D, 0x67F5, 0xAC5E, 0x67E9, + 0xAC5F, 0x67EF, 0xAC60, 0x67C4, 0xAC61, 0x67D1, 0xAC62, 0x67B4, + 0xAC63, 0x67DA, 0xAC64, 0x67E5, 0xAC65, 0x67B8, 0xAC66, 0x67CF, + 0xAC67, 0x67DE, 0xAC68, 0x67F3, 0xAC69, 0x67B0, 0xAC6A, 0x67D9, + 0xAC6B, 0x67E2, 0xAC6C, 0x67DD, 0xAC6D, 0x67D2, 0xAC6E, 0x6B6A, + 0xAC6F, 0x6B83, 0xAC70, 0x6B86, 0xAC71, 0x6BB5, 0xAC72, 0x6BD2, + 0xAC73, 0x6BD7, 0xAC74, 0x6C1F, 0xAC75, 0x6CC9, 0xAC76, 0x6D0B, + 0xAC77, 0x6D32, 0xAC78, 0x6D2A, 0xAC79, 0x6D41, 0xAC7A, 0x6D25, + 0xAC7B, 0x6D0C, 0xAC7C, 0x6D31, 0xAC7D, 0x6D1E, 0xAC7E, 0x6D17, + 0xACA1, 0x6D3B, 0xACA2, 0x6D3D, 0xACA3, 0x6D3E, 0xACA4, 0x6D36, + 0xACA5, 0x6D1B, 0xACA6, 0x6CF5, 0xACA7, 0x6D39, 0xACA8, 0x6D27, + 0xACA9, 0x6D38, 0xACAA, 0x6D29, 0xACAB, 0x6D2E, 0xACAC, 0x6D35, + 0xACAD, 0x6D0E, 0xACAE, 0x6D2B, 0xACAF, 0x70AB, 0xACB0, 0x70BA, + 0xACB1, 0x70B3, 0xACB2, 0x70AC, 0xACB3, 0x70AF, 0xACB4, 0x70AD, + 0xACB5, 0x70B8, 0xACB6, 0x70AE, 0xACB7, 0x70A4, 0xACB8, 0x7230, + 0xACB9, 0x7272, 0xACBA, 0x726F, 0xACBB, 0x7274, 0xACBC, 0x72E9, + 0xACBD, 0x72E0, 0xACBE, 0x72E1, 0xACBF, 0x73B7, 0xACC0, 0x73CA, + 0xACC1, 0x73BB, 0xACC2, 0x73B2, 0xACC3, 0x73CD, 0xACC4, 0x73C0, + 0xACC5, 0x73B3, 0xACC6, 0x751A, 0xACC7, 0x752D, 0xACC8, 0x754F, + 0xACC9, 0x754C, 0xACCA, 0x754E, 0xACCB, 0x754B, 0xACCC, 0x75AB, + 0xACCD, 0x75A4, 0xACCE, 0x75A5, 0xACCF, 0x75A2, 0xACD0, 0x75A3, + 0xACD1, 0x7678, 0xACD2, 0x7686, 0xACD3, 0x7687, 0xACD4, 0x7688, + 0xACD5, 0x76C8, 0xACD6, 0x76C6, 0xACD7, 0x76C3, 0xACD8, 0x76C5, + 0xACD9, 0x7701, 0xACDA, 0x76F9, 0xACDB, 0x76F8, 0xACDC, 0x7709, + 0xACDD, 0x770B, 0xACDE, 0x76FE, 0xACDF, 0x76FC, 0xACE0, 0x7707, + 0xACE1, 0x77DC, 0xACE2, 0x7802, 0xACE3, 0x7814, 0xACE4, 0x780C, + 0xACE5, 0x780D, 0xACE6, 0x7946, 0xACE7, 0x7949, 0xACE8, 0x7948, + 0xACE9, 0x7947, 0xACEA, 0x79B9, 0xACEB, 0x79BA, 0xACEC, 0x79D1, + 0xACED, 0x79D2, 0xACEE, 0x79CB, 0xACEF, 0x7A7F, 0xACF0, 0x7A81, + 0xACF1, 0x7AFF, 0xACF2, 0x7AFD, 0xACF3, 0x7C7D, 0xACF4, 0x7D02, + 0xACF5, 0x7D05, 0xACF6, 0x7D00, 0xACF7, 0x7D09, 0xACF8, 0x7D07, + 0xACF9, 0x7D04, 0xACFA, 0x7D06, 0xACFB, 0x7F38, 0xACFC, 0x7F8E, + 0xACFD, 0x7FBF, 0xACFE, 0x8004, 0xAD40, 0x8010, 0xAD41, 0x800D, + 0xAD42, 0x8011, 0xAD43, 0x8036, 0xAD44, 0x80D6, 0xAD45, 0x80E5, + 0xAD46, 0x80DA, 0xAD47, 0x80C3, 0xAD48, 0x80C4, 0xAD49, 0x80CC, + 0xAD4A, 0x80E1, 0xAD4B, 0x80DB, 0xAD4C, 0x80CE, 0xAD4D, 0x80DE, + 0xAD4E, 0x80E4, 0xAD4F, 0x80DD, 0xAD50, 0x81F4, 0xAD51, 0x8222, + 0xAD52, 0x82E7, 0xAD53, 0x8303, 0xAD54, 0x8305, 0xAD55, 0x82E3, + 0xAD56, 0x82DB, 0xAD57, 0x82E6, 0xAD58, 0x8304, 0xAD59, 0x82E5, + 0xAD5A, 0x8302, 0xAD5B, 0x8309, 0xAD5C, 0x82D2, 0xAD5D, 0x82D7, + 0xAD5E, 0x82F1, 0xAD5F, 0x8301, 0xAD60, 0x82DC, 0xAD61, 0x82D4, + 0xAD62, 0x82D1, 0xAD63, 0x82DE, 0xAD64, 0x82D3, 0xAD65, 0x82DF, + 0xAD66, 0x82EF, 0xAD67, 0x8306, 0xAD68, 0x8650, 0xAD69, 0x8679, + 0xAD6A, 0x867B, 0xAD6B, 0x867A, 0xAD6C, 0x884D, 0xAD6D, 0x886B, + 0xAD6E, 0x8981, 0xAD6F, 0x89D4, 0xAD70, 0x8A08, 0xAD71, 0x8A02, + 0xAD72, 0x8A03, 0xAD73, 0x8C9E, 0xAD74, 0x8CA0, 0xAD75, 0x8D74, + 0xAD76, 0x8D73, 0xAD77, 0x8DB4, 0xAD78, 0x8ECD, 0xAD79, 0x8ECC, + 0xAD7A, 0x8FF0, 0xAD7B, 0x8FE6, 0xAD7C, 0x8FE2, 0xAD7D, 0x8FEA, + 0xAD7E, 0x8FE5, 0xADA1, 0x8FED, 0xADA2, 0x8FEB, 0xADA3, 0x8FE4, + 0xADA4, 0x8FE8, 0xADA5, 0x90CA, 0xADA6, 0x90CE, 0xADA7, 0x90C1, + 0xADA8, 0x90C3, 0xADA9, 0x914B, 0xADAA, 0x914A, 0xADAB, 0x91CD, + 0xADAC, 0x9582, 0xADAD, 0x9650, 0xADAE, 0x964B, 0xADAF, 0x964C, + 0xADB0, 0x964D, 0xADB1, 0x9762, 0xADB2, 0x9769, 0xADB3, 0x97CB, + 0xADB4, 0x97ED, 0xADB5, 0x97F3, 0xADB6, 0x9801, 0xADB7, 0x98A8, + 0xADB8, 0x98DB, 0xADB9, 0x98DF, 0xADBA, 0x9996, 0xADBB, 0x9999, + 0xADBC, 0x4E58, 0xADBD, 0x4EB3, 0xADBE, 0x500C, 0xADBF, 0x500D, + 0xADC0, 0x5023, 0xADC1, 0x4FEF, 0xADC2, 0x5026, 0xADC3, 0x5025, + 0xADC4, 0x4FF8, 0xADC5, 0x5029, 0xADC6, 0x5016, 0xADC7, 0x5006, + 0xADC8, 0x503C, 0xADC9, 0x501F, 0xADCA, 0x501A, 0xADCB, 0x5012, + 0xADCC, 0x5011, 0xADCD, 0x4FFA, 0xADCE, 0x5000, 0xADCF, 0x5014, + 0xADD0, 0x5028, 0xADD1, 0x4FF1, 0xADD2, 0x5021, 0xADD3, 0x500B, + 0xADD4, 0x5019, 0xADD5, 0x5018, 0xADD6, 0x4FF3, 0xADD7, 0x4FEE, + 0xADD8, 0x502D, 0xADD9, 0x502A, 0xADDA, 0x4FFE, 0xADDB, 0x502B, + 0xADDC, 0x5009, 0xADDD, 0x517C, 0xADDE, 0x51A4, 0xADDF, 0x51A5, + 0xADE0, 0x51A2, 0xADE1, 0x51CD, 0xADE2, 0x51CC, 0xADE3, 0x51C6, + 0xADE4, 0x51CB, 0xADE5, 0x5256, 0xADE6, 0x525C, 0xADE7, 0x5254, + 0xADE8, 0x525B, 0xADE9, 0x525D, 0xADEA, 0x532A, 0xADEB, 0x537F, + 0xADEC, 0x539F, 0xADED, 0x539D, 0xADEE, 0x53DF, 0xADEF, 0x54E8, + 0xADF0, 0x5510, 0xADF1, 0x5501, 0xADF2, 0x5537, 0xADF3, 0x54FC, + 0xADF4, 0x54E5, 0xADF5, 0x54F2, 0xADF6, 0x5506, 0xADF7, 0x54FA, + 0xADF8, 0x5514, 0xADF9, 0x54E9, 0xADFA, 0x54ED, 0xADFB, 0x54E1, + 0xADFC, 0x5509, 0xADFD, 0x54EE, 0xADFE, 0x54EA, 0xAE40, 0x54E6, + 0xAE41, 0x5527, 0xAE42, 0x5507, 0xAE43, 0x54FD, 0xAE44, 0x550F, + 0xAE45, 0x5703, 0xAE46, 0x5704, 0xAE47, 0x57C2, 0xAE48, 0x57D4, + 0xAE49, 0x57CB, 0xAE4A, 0x57C3, 0xAE4B, 0x5809, 0xAE4C, 0x590F, + 0xAE4D, 0x5957, 0xAE4E, 0x5958, 0xAE4F, 0x595A, 0xAE50, 0x5A11, + 0xAE51, 0x5A18, 0xAE52, 0x5A1C, 0xAE53, 0x5A1F, 0xAE54, 0x5A1B, + 0xAE55, 0x5A13, 0xAE56, 0x59EC, 0xAE57, 0x5A20, 0xAE58, 0x5A23, + 0xAE59, 0x5A29, 0xAE5A, 0x5A25, 0xAE5B, 0x5A0C, 0xAE5C, 0x5A09, + 0xAE5D, 0x5B6B, 0xAE5E, 0x5C58, 0xAE5F, 0x5BB0, 0xAE60, 0x5BB3, + 0xAE61, 0x5BB6, 0xAE62, 0x5BB4, 0xAE63, 0x5BAE, 0xAE64, 0x5BB5, + 0xAE65, 0x5BB9, 0xAE66, 0x5BB8, 0xAE67, 0x5C04, 0xAE68, 0x5C51, + 0xAE69, 0x5C55, 0xAE6A, 0x5C50, 0xAE6B, 0x5CED, 0xAE6C, 0x5CFD, + 0xAE6D, 0x5CFB, 0xAE6E, 0x5CEA, 0xAE6F, 0x5CE8, 0xAE70, 0x5CF0, + 0xAE71, 0x5CF6, 0xAE72, 0x5D01, 0xAE73, 0x5CF4, 0xAE74, 0x5DEE, + 0xAE75, 0x5E2D, 0xAE76, 0x5E2B, 0xAE77, 0x5EAB, 0xAE78, 0x5EAD, + 0xAE79, 0x5EA7, 0xAE7A, 0x5F31, 0xAE7B, 0x5F92, 0xAE7C, 0x5F91, + 0xAE7D, 0x5F90, 0xAE7E, 0x6059, 0xAEA1, 0x6063, 0xAEA2, 0x6065, + 0xAEA3, 0x6050, 0xAEA4, 0x6055, 0xAEA5, 0x606D, 0xAEA6, 0x6069, + 0xAEA7, 0x606F, 0xAEA8, 0x6084, 0xAEA9, 0x609F, 0xAEAA, 0x609A, + 0xAEAB, 0x608D, 0xAEAC, 0x6094, 0xAEAD, 0x608C, 0xAEAE, 0x6085, + 0xAEAF, 0x6096, 0xAEB0, 0x6247, 0xAEB1, 0x62F3, 0xAEB2, 0x6308, + 0xAEB3, 0x62FF, 0xAEB4, 0x634E, 0xAEB5, 0x633E, 0xAEB6, 0x632F, + 0xAEB7, 0x6355, 0xAEB8, 0x6342, 0xAEB9, 0x6346, 0xAEBA, 0x634F, + 0xAEBB, 0x6349, 0xAEBC, 0x633A, 0xAEBD, 0x6350, 0xAEBE, 0x633D, + 0xAEBF, 0x632A, 0xAEC0, 0x632B, 0xAEC1, 0x6328, 0xAEC2, 0x634D, + 0xAEC3, 0x634C, 0xAEC4, 0x6548, 0xAEC5, 0x6549, 0xAEC6, 0x6599, + 0xAEC7, 0x65C1, 0xAEC8, 0x65C5, 0xAEC9, 0x6642, 0xAECA, 0x6649, + 0xAECB, 0x664F, 0xAECC, 0x6643, 0xAECD, 0x6652, 0xAECE, 0x664C, + 0xAECF, 0x6645, 0xAED0, 0x6641, 0xAED1, 0x66F8, 0xAED2, 0x6714, + 0xAED3, 0x6715, 0xAED4, 0x6717, 0xAED5, 0x6821, 0xAED6, 0x6838, + 0xAED7, 0x6848, 0xAED8, 0x6846, 0xAED9, 0x6853, 0xAEDA, 0x6839, + 0xAEDB, 0x6842, 0xAEDC, 0x6854, 0xAEDD, 0x6829, 0xAEDE, 0x68B3, + 0xAEDF, 0x6817, 0xAEE0, 0x684C, 0xAEE1, 0x6851, 0xAEE2, 0x683D, + 0xAEE3, 0x67F4, 0xAEE4, 0x6850, 0xAEE5, 0x6840, 0xAEE6, 0x683C, + 0xAEE7, 0x6843, 0xAEE8, 0x682A, 0xAEE9, 0x6845, 0xAEEA, 0x6813, + 0xAEEB, 0x6818, 0xAEEC, 0x6841, 0xAEED, 0x6B8A, 0xAEEE, 0x6B89, + 0xAEEF, 0x6BB7, 0xAEF0, 0x6C23, 0xAEF1, 0x6C27, 0xAEF2, 0x6C28, + 0xAEF3, 0x6C26, 0xAEF4, 0x6C24, 0xAEF5, 0x6CF0, 0xAEF6, 0x6D6A, + 0xAEF7, 0x6D95, 0xAEF8, 0x6D88, 0xAEF9, 0x6D87, 0xAEFA, 0x6D66, + 0xAEFB, 0x6D78, 0xAEFC, 0x6D77, 0xAEFD, 0x6D59, 0xAEFE, 0x6D93, + 0xAF40, 0x6D6C, 0xAF41, 0x6D89, 0xAF42, 0x6D6E, 0xAF43, 0x6D5A, + 0xAF44, 0x6D74, 0xAF45, 0x6D69, 0xAF46, 0x6D8C, 0xAF47, 0x6D8A, + 0xAF48, 0x6D79, 0xAF49, 0x6D85, 0xAF4A, 0x6D65, 0xAF4B, 0x6D94, + 0xAF4C, 0x70CA, 0xAF4D, 0x70D8, 0xAF4E, 0x70E4, 0xAF4F, 0x70D9, + 0xAF50, 0x70C8, 0xAF51, 0x70CF, 0xAF52, 0x7239, 0xAF53, 0x7279, + 0xAF54, 0x72FC, 0xAF55, 0x72F9, 0xAF56, 0x72FD, 0xAF57, 0x72F8, + 0xAF58, 0x72F7, 0xAF59, 0x7386, 0xAF5A, 0x73ED, 0xAF5B, 0x7409, + 0xAF5C, 0x73EE, 0xAF5D, 0x73E0, 0xAF5E, 0x73EA, 0xAF5F, 0x73DE, + 0xAF60, 0x7554, 0xAF61, 0x755D, 0xAF62, 0x755C, 0xAF63, 0x755A, + 0xAF64, 0x7559, 0xAF65, 0x75BE, 0xAF66, 0x75C5, 0xAF67, 0x75C7, + 0xAF68, 0x75B2, 0xAF69, 0x75B3, 0xAF6A, 0x75BD, 0xAF6B, 0x75BC, + 0xAF6C, 0x75B9, 0xAF6D, 0x75C2, 0xAF6E, 0x75B8, 0xAF6F, 0x768B, + 0xAF70, 0x76B0, 0xAF71, 0x76CA, 0xAF72, 0x76CD, 0xAF73, 0x76CE, + 0xAF74, 0x7729, 0xAF75, 0x771F, 0xAF76, 0x7720, 0xAF77, 0x7728, + 0xAF78, 0x77E9, 0xAF79, 0x7830, 0xAF7A, 0x7827, 0xAF7B, 0x7838, + 0xAF7C, 0x781D, 0xAF7D, 0x7834, 0xAF7E, 0x7837, 0xAFA1, 0x7825, + 0xAFA2, 0x782D, 0xAFA3, 0x7820, 0xAFA4, 0x781F, 0xAFA5, 0x7832, + 0xAFA6, 0x7955, 0xAFA7, 0x7950, 0xAFA8, 0x7960, 0xAFA9, 0x795F, + 0xAFAA, 0x7956, 0xAFAB, 0x795E, 0xAFAC, 0x795D, 0xAFAD, 0x7957, + 0xAFAE, 0x795A, 0xAFAF, 0x79E4, 0xAFB0, 0x79E3, 0xAFB1, 0x79E7, + 0xAFB2, 0x79DF, 0xAFB3, 0x79E6, 0xAFB4, 0x79E9, 0xAFB5, 0x79D8, + 0xAFB6, 0x7A84, 0xAFB7, 0x7A88, 0xAFB8, 0x7AD9, 0xAFB9, 0x7B06, + 0xAFBA, 0x7B11, 0xAFBB, 0x7C89, 0xAFBC, 0x7D21, 0xAFBD, 0x7D17, + 0xAFBE, 0x7D0B, 0xAFBF, 0x7D0A, 0xAFC0, 0x7D20, 0xAFC1, 0x7D22, + 0xAFC2, 0x7D14, 0xAFC3, 0x7D10, 0xAFC4, 0x7D15, 0xAFC5, 0x7D1A, + 0xAFC6, 0x7D1C, 0xAFC7, 0x7D0D, 0xAFC8, 0x7D19, 0xAFC9, 0x7D1B, + 0xAFCA, 0x7F3A, 0xAFCB, 0x7F5F, 0xAFCC, 0x7F94, 0xAFCD, 0x7FC5, + 0xAFCE, 0x7FC1, 0xAFCF, 0x8006, 0xAFD0, 0x8018, 0xAFD1, 0x8015, + 0xAFD2, 0x8019, 0xAFD3, 0x8017, 0xAFD4, 0x803D, 0xAFD5, 0x803F, + 0xAFD6, 0x80F1, 0xAFD7, 0x8102, 0xAFD8, 0x80F0, 0xAFD9, 0x8105, + 0xAFDA, 0x80ED, 0xAFDB, 0x80F4, 0xAFDC, 0x8106, 0xAFDD, 0x80F8, + 0xAFDE, 0x80F3, 0xAFDF, 0x8108, 0xAFE0, 0x80FD, 0xAFE1, 0x810A, + 0xAFE2, 0x80FC, 0xAFE3, 0x80EF, 0xAFE4, 0x81ED, 0xAFE5, 0x81EC, + 0xAFE6, 0x8200, 0xAFE7, 0x8210, 0xAFE8, 0x822A, 0xAFE9, 0x822B, + 0xAFEA, 0x8228, 0xAFEB, 0x822C, 0xAFEC, 0x82BB, 0xAFED, 0x832B, + 0xAFEE, 0x8352, 0xAFEF, 0x8354, 0xAFF0, 0x834A, 0xAFF1, 0x8338, + 0xAFF2, 0x8350, 0xAFF3, 0x8349, 0xAFF4, 0x8335, 0xAFF5, 0x8334, + 0xAFF6, 0x834F, 0xAFF7, 0x8332, 0xAFF8, 0x8339, 0xAFF9, 0x8336, + 0xAFFA, 0x8317, 0xAFFB, 0x8340, 0xAFFC, 0x8331, 0xAFFD, 0x8328, + 0xAFFE, 0x8343, 0xB040, 0x8654, 0xB041, 0x868A, 0xB042, 0x86AA, + 0xB043, 0x8693, 0xB044, 0x86A4, 0xB045, 0x86A9, 0xB046, 0x868C, + 0xB047, 0x86A3, 0xB048, 0x869C, 0xB049, 0x8870, 0xB04A, 0x8877, + 0xB04B, 0x8881, 0xB04C, 0x8882, 0xB04D, 0x887D, 0xB04E, 0x8879, + 0xB04F, 0x8A18, 0xB050, 0x8A10, 0xB051, 0x8A0E, 0xB052, 0x8A0C, + 0xB053, 0x8A15, 0xB054, 0x8A0A, 0xB055, 0x8A17, 0xB056, 0x8A13, + 0xB057, 0x8A16, 0xB058, 0x8A0F, 0xB059, 0x8A11, 0xB05A, 0x8C48, + 0xB05B, 0x8C7A, 0xB05C, 0x8C79, 0xB05D, 0x8CA1, 0xB05E, 0x8CA2, + 0xB05F, 0x8D77, 0xB060, 0x8EAC, 0xB061, 0x8ED2, 0xB062, 0x8ED4, + 0xB063, 0x8ECF, 0xB064, 0x8FB1, 0xB065, 0x9001, 0xB066, 0x9006, + 0xB067, 0x8FF7, 0xB068, 0x9000, 0xB069, 0x8FFA, 0xB06A, 0x8FF4, + 0xB06B, 0x9003, 0xB06C, 0x8FFD, 0xB06D, 0x9005, 0xB06E, 0x8FF8, + 0xB06F, 0x9095, 0xB070, 0x90E1, 0xB071, 0x90DD, 0xB072, 0x90E2, + 0xB073, 0x9152, 0xB074, 0x914D, 0xB075, 0x914C, 0xB076, 0x91D8, + 0xB077, 0x91DD, 0xB078, 0x91D7, 0xB079, 0x91DC, 0xB07A, 0x91D9, + 0xB07B, 0x9583, 0xB07C, 0x9662, 0xB07D, 0x9663, 0xB07E, 0x9661, + 0xB0A1, 0x965B, 0xB0A2, 0x965D, 0xB0A3, 0x9664, 0xB0A4, 0x9658, + 0xB0A5, 0x965E, 0xB0A6, 0x96BB, 0xB0A7, 0x98E2, 0xB0A8, 0x99AC, + 0xB0A9, 0x9AA8, 0xB0AA, 0x9AD8, 0xB0AB, 0x9B25, 0xB0AC, 0x9B32, + 0xB0AD, 0x9B3C, 0xB0AE, 0x4E7E, 0xB0AF, 0x507A, 0xB0B0, 0x507D, + 0xB0B1, 0x505C, 0xB0B2, 0x5047, 0xB0B3, 0x5043, 0xB0B4, 0x504C, + 0xB0B5, 0x505A, 0xB0B6, 0x5049, 0xB0B7, 0x5065, 0xB0B8, 0x5076, + 0xB0B9, 0x504E, 0xB0BA, 0x5055, 0xB0BB, 0x5075, 0xB0BC, 0x5074, + 0xB0BD, 0x5077, 0xB0BE, 0x504F, 0xB0BF, 0x500F, 0xB0C0, 0x506F, + 0xB0C1, 0x506D, 0xB0C2, 0x515C, 0xB0C3, 0x5195, 0xB0C4, 0x51F0, + 0xB0C5, 0x526A, 0xB0C6, 0x526F, 0xB0C7, 0x52D2, 0xB0C8, 0x52D9, + 0xB0C9, 0x52D8, 0xB0CA, 0x52D5, 0xB0CB, 0x5310, 0xB0CC, 0x530F, + 0xB0CD, 0x5319, 0xB0CE, 0x533F, 0xB0CF, 0x5340, 0xB0D0, 0x533E, + 0xB0D1, 0x53C3, 0xB0D2, 0x66FC, 0xB0D3, 0x5546, 0xB0D4, 0x556A, + 0xB0D5, 0x5566, 0xB0D6, 0x5544, 0xB0D7, 0x555E, 0xB0D8, 0x5561, + 0xB0D9, 0x5543, 0xB0DA, 0x554A, 0xB0DB, 0x5531, 0xB0DC, 0x5556, + 0xB0DD, 0x554F, 0xB0DE, 0x5555, 0xB0DF, 0x552F, 0xB0E0, 0x5564, + 0xB0E1, 0x5538, 0xB0E2, 0x552E, 0xB0E3, 0x555C, 0xB0E4, 0x552C, + 0xB0E5, 0x5563, 0xB0E6, 0x5533, 0xB0E7, 0x5541, 0xB0E8, 0x5557, + 0xB0E9, 0x5708, 0xB0EA, 0x570B, 0xB0EB, 0x5709, 0xB0EC, 0x57DF, + 0xB0ED, 0x5805, 0xB0EE, 0x580A, 0xB0EF, 0x5806, 0xB0F0, 0x57E0, + 0xB0F1, 0x57E4, 0xB0F2, 0x57FA, 0xB0F3, 0x5802, 0xB0F4, 0x5835, + 0xB0F5, 0x57F7, 0xB0F6, 0x57F9, 0xB0F7, 0x5920, 0xB0F8, 0x5962, + 0xB0F9, 0x5A36, 0xB0FA, 0x5A41, 0xB0FB, 0x5A49, 0xB0FC, 0x5A66, + 0xB0FD, 0x5A6A, 0xB0FE, 0x5A40, 0xB140, 0x5A3C, 0xB141, 0x5A62, + 0xB142, 0x5A5A, 0xB143, 0x5A46, 0xB144, 0x5A4A, 0xB145, 0x5B70, + 0xB146, 0x5BC7, 0xB147, 0x5BC5, 0xB148, 0x5BC4, 0xB149, 0x5BC2, + 0xB14A, 0x5BBF, 0xB14B, 0x5BC6, 0xB14C, 0x5C09, 0xB14D, 0x5C08, + 0xB14E, 0x5C07, 0xB14F, 0x5C60, 0xB150, 0x5C5C, 0xB151, 0x5C5D, + 0xB152, 0x5D07, 0xB153, 0x5D06, 0xB154, 0x5D0E, 0xB155, 0x5D1B, + 0xB156, 0x5D16, 0xB157, 0x5D22, 0xB158, 0x5D11, 0xB159, 0x5D29, + 0xB15A, 0x5D14, 0xB15B, 0x5D19, 0xB15C, 0x5D24, 0xB15D, 0x5D27, + 0xB15E, 0x5D17, 0xB15F, 0x5DE2, 0xB160, 0x5E38, 0xB161, 0x5E36, + 0xB162, 0x5E33, 0xB163, 0x5E37, 0xB164, 0x5EB7, 0xB165, 0x5EB8, + 0xB166, 0x5EB6, 0xB167, 0x5EB5, 0xB168, 0x5EBE, 0xB169, 0x5F35, + 0xB16A, 0x5F37, 0xB16B, 0x5F57, 0xB16C, 0x5F6C, 0xB16D, 0x5F69, + 0xB16E, 0x5F6B, 0xB16F, 0x5F97, 0xB170, 0x5F99, 0xB171, 0x5F9E, + 0xB172, 0x5F98, 0xB173, 0x5FA1, 0xB174, 0x5FA0, 0xB175, 0x5F9C, + 0xB176, 0x607F, 0xB177, 0x60A3, 0xB178, 0x6089, 0xB179, 0x60A0, + 0xB17A, 0x60A8, 0xB17B, 0x60CB, 0xB17C, 0x60B4, 0xB17D, 0x60E6, + 0xB17E, 0x60BD, 0xB1A1, 0x60C5, 0xB1A2, 0x60BB, 0xB1A3, 0x60B5, + 0xB1A4, 0x60DC, 0xB1A5, 0x60BC, 0xB1A6, 0x60D8, 0xB1A7, 0x60D5, + 0xB1A8, 0x60C6, 0xB1A9, 0x60DF, 0xB1AA, 0x60B8, 0xB1AB, 0x60DA, + 0xB1AC, 0x60C7, 0xB1AD, 0x621A, 0xB1AE, 0x621B, 0xB1AF, 0x6248, + 0xB1B0, 0x63A0, 0xB1B1, 0x63A7, 0xB1B2, 0x6372, 0xB1B3, 0x6396, + 0xB1B4, 0x63A2, 0xB1B5, 0x63A5, 0xB1B6, 0x6377, 0xB1B7, 0x6367, + 0xB1B8, 0x6398, 0xB1B9, 0x63AA, 0xB1BA, 0x6371, 0xB1BB, 0x63A9, + 0xB1BC, 0x6389, 0xB1BD, 0x6383, 0xB1BE, 0x639B, 0xB1BF, 0x636B, + 0xB1C0, 0x63A8, 0xB1C1, 0x6384, 0xB1C2, 0x6388, 0xB1C3, 0x6399, + 0xB1C4, 0x63A1, 0xB1C5, 0x63AC, 0xB1C6, 0x6392, 0xB1C7, 0x638F, + 0xB1C8, 0x6380, 0xB1C9, 0x637B, 0xB1CA, 0x6369, 0xB1CB, 0x6368, + 0xB1CC, 0x637A, 0xB1CD, 0x655D, 0xB1CE, 0x6556, 0xB1CF, 0x6551, + 0xB1D0, 0x6559, 0xB1D1, 0x6557, 0xB1D2, 0x555F, 0xB1D3, 0x654F, + 0xB1D4, 0x6558, 0xB1D5, 0x6555, 0xB1D6, 0x6554, 0xB1D7, 0x659C, + 0xB1D8, 0x659B, 0xB1D9, 0x65AC, 0xB1DA, 0x65CF, 0xB1DB, 0x65CB, + 0xB1DC, 0x65CC, 0xB1DD, 0x65CE, 0xB1DE, 0x665D, 0xB1DF, 0x665A, + 0xB1E0, 0x6664, 0xB1E1, 0x6668, 0xB1E2, 0x6666, 0xB1E3, 0x665E, + 0xB1E4, 0x66F9, 0xB1E5, 0x52D7, 0xB1E6, 0x671B, 0xB1E7, 0x6881, + 0xB1E8, 0x68AF, 0xB1E9, 0x68A2, 0xB1EA, 0x6893, 0xB1EB, 0x68B5, + 0xB1EC, 0x687F, 0xB1ED, 0x6876, 0xB1EE, 0x68B1, 0xB1EF, 0x68A7, + 0xB1F0, 0x6897, 0xB1F1, 0x68B0, 0xB1F2, 0x6883, 0xB1F3, 0x68C4, + 0xB1F4, 0x68AD, 0xB1F5, 0x6886, 0xB1F6, 0x6885, 0xB1F7, 0x6894, + 0xB1F8, 0x689D, 0xB1F9, 0x68A8, 0xB1FA, 0x689F, 0xB1FB, 0x68A1, + 0xB1FC, 0x6882, 0xB1FD, 0x6B32, 0xB1FE, 0x6BBA, 0xB240, 0x6BEB, + 0xB241, 0x6BEC, 0xB242, 0x6C2B, 0xB243, 0x6D8E, 0xB244, 0x6DBC, + 0xB245, 0x6DF3, 0xB246, 0x6DD9, 0xB247, 0x6DB2, 0xB248, 0x6DE1, + 0xB249, 0x6DCC, 0xB24A, 0x6DE4, 0xB24B, 0x6DFB, 0xB24C, 0x6DFA, + 0xB24D, 0x6E05, 0xB24E, 0x6DC7, 0xB24F, 0x6DCB, 0xB250, 0x6DAF, + 0xB251, 0x6DD1, 0xB252, 0x6DAE, 0xB253, 0x6DDE, 0xB254, 0x6DF9, + 0xB255, 0x6DB8, 0xB256, 0x6DF7, 0xB257, 0x6DF5, 0xB258, 0x6DC5, + 0xB259, 0x6DD2, 0xB25A, 0x6E1A, 0xB25B, 0x6DB5, 0xB25C, 0x6DDA, + 0xB25D, 0x6DEB, 0xB25E, 0x6DD8, 0xB25F, 0x6DEA, 0xB260, 0x6DF1, + 0xB261, 0x6DEE, 0xB262, 0x6DE8, 0xB263, 0x6DC6, 0xB264, 0x6DC4, + 0xB265, 0x6DAA, 0xB266, 0x6DEC, 0xB267, 0x6DBF, 0xB268, 0x6DE6, + 0xB269, 0x70F9, 0xB26A, 0x7109, 0xB26B, 0x710A, 0xB26C, 0x70FD, + 0xB26D, 0x70EF, 0xB26E, 0x723D, 0xB26F, 0x727D, 0xB270, 0x7281, + 0xB271, 0x731C, 0xB272, 0x731B, 0xB273, 0x7316, 0xB274, 0x7313, + 0xB275, 0x7319, 0xB276, 0x7387, 0xB277, 0x7405, 0xB278, 0x740A, + 0xB279, 0x7403, 0xB27A, 0x7406, 0xB27B, 0x73FE, 0xB27C, 0x740D, + 0xB27D, 0x74E0, 0xB27E, 0x74F6, 0xB2A1, 0x74F7, 0xB2A2, 0x751C, + 0xB2A3, 0x7522, 0xB2A4, 0x7565, 0xB2A5, 0x7566, 0xB2A6, 0x7562, + 0xB2A7, 0x7570, 0xB2A8, 0x758F, 0xB2A9, 0x75D4, 0xB2AA, 0x75D5, + 0xB2AB, 0x75B5, 0xB2AC, 0x75CA, 0xB2AD, 0x75CD, 0xB2AE, 0x768E, + 0xB2AF, 0x76D4, 0xB2B0, 0x76D2, 0xB2B1, 0x76DB, 0xB2B2, 0x7737, + 0xB2B3, 0x773E, 0xB2B4, 0x773C, 0xB2B5, 0x7736, 0xB2B6, 0x7738, + 0xB2B7, 0x773A, 0xB2B8, 0x786B, 0xB2B9, 0x7843, 0xB2BA, 0x784E, + 0xB2BB, 0x7965, 0xB2BC, 0x7968, 0xB2BD, 0x796D, 0xB2BE, 0x79FB, + 0xB2BF, 0x7A92, 0xB2C0, 0x7A95, 0xB2C1, 0x7B20, 0xB2C2, 0x7B28, + 0xB2C3, 0x7B1B, 0xB2C4, 0x7B2C, 0xB2C5, 0x7B26, 0xB2C6, 0x7B19, + 0xB2C7, 0x7B1E, 0xB2C8, 0x7B2E, 0xB2C9, 0x7C92, 0xB2CA, 0x7C97, + 0xB2CB, 0x7C95, 0xB2CC, 0x7D46, 0xB2CD, 0x7D43, 0xB2CE, 0x7D71, + 0xB2CF, 0x7D2E, 0xB2D0, 0x7D39, 0xB2D1, 0x7D3C, 0xB2D2, 0x7D40, + 0xB2D3, 0x7D30, 0xB2D4, 0x7D33, 0xB2D5, 0x7D44, 0xB2D6, 0x7D2F, + 0xB2D7, 0x7D42, 0xB2D8, 0x7D32, 0xB2D9, 0x7D31, 0xB2DA, 0x7F3D, + 0xB2DB, 0x7F9E, 0xB2DC, 0x7F9A, 0xB2DD, 0x7FCC, 0xB2DE, 0x7FCE, + 0xB2DF, 0x7FD2, 0xB2E0, 0x801C, 0xB2E1, 0x804A, 0xB2E2, 0x8046, + 0xB2E3, 0x812F, 0xB2E4, 0x8116, 0xB2E5, 0x8123, 0xB2E6, 0x812B, + 0xB2E7, 0x8129, 0xB2E8, 0x8130, 0xB2E9, 0x8124, 0xB2EA, 0x8202, + 0xB2EB, 0x8235, 0xB2EC, 0x8237, 0xB2ED, 0x8236, 0xB2EE, 0x8239, + 0xB2EF, 0x838E, 0xB2F0, 0x839E, 0xB2F1, 0x8398, 0xB2F2, 0x8378, + 0xB2F3, 0x83A2, 0xB2F4, 0x8396, 0xB2F5, 0x83BD, 0xB2F6, 0x83AB, + 0xB2F7, 0x8392, 0xB2F8, 0x838A, 0xB2F9, 0x8393, 0xB2FA, 0x8389, + 0xB2FB, 0x83A0, 0xB2FC, 0x8377, 0xB2FD, 0x837B, 0xB2FE, 0x837C, + 0xB340, 0x8386, 0xB341, 0x83A7, 0xB342, 0x8655, 0xB343, 0x5F6A, + 0xB344, 0x86C7, 0xB345, 0x86C0, 0xB346, 0x86B6, 0xB347, 0x86C4, + 0xB348, 0x86B5, 0xB349, 0x86C6, 0xB34A, 0x86CB, 0xB34B, 0x86B1, + 0xB34C, 0x86AF, 0xB34D, 0x86C9, 0xB34E, 0x8853, 0xB34F, 0x889E, + 0xB350, 0x8888, 0xB351, 0x88AB, 0xB352, 0x8892, 0xB353, 0x8896, + 0xB354, 0x888D, 0xB355, 0x888B, 0xB356, 0x8993, 0xB357, 0x898F, + 0xB358, 0x8A2A, 0xB359, 0x8A1D, 0xB35A, 0x8A23, 0xB35B, 0x8A25, + 0xB35C, 0x8A31, 0xB35D, 0x8A2D, 0xB35E, 0x8A1F, 0xB35F, 0x8A1B, + 0xB360, 0x8A22, 0xB361, 0x8C49, 0xB362, 0x8C5A, 0xB363, 0x8CA9, + 0xB364, 0x8CAC, 0xB365, 0x8CAB, 0xB366, 0x8CA8, 0xB367, 0x8CAA, + 0xB368, 0x8CA7, 0xB369, 0x8D67, 0xB36A, 0x8D66, 0xB36B, 0x8DBE, + 0xB36C, 0x8DBA, 0xB36D, 0x8EDB, 0xB36E, 0x8EDF, 0xB36F, 0x9019, + 0xB370, 0x900D, 0xB371, 0x901A, 0xB372, 0x9017, 0xB373, 0x9023, + 0xB374, 0x901F, 0xB375, 0x901D, 0xB376, 0x9010, 0xB377, 0x9015, + 0xB378, 0x901E, 0xB379, 0x9020, 0xB37A, 0x900F, 0xB37B, 0x9022, + 0xB37C, 0x9016, 0xB37D, 0x901B, 0xB37E, 0x9014, 0xB3A1, 0x90E8, + 0xB3A2, 0x90ED, 0xB3A3, 0x90FD, 0xB3A4, 0x9157, 0xB3A5, 0x91CE, + 0xB3A6, 0x91F5, 0xB3A7, 0x91E6, 0xB3A8, 0x91E3, 0xB3A9, 0x91E7, + 0xB3AA, 0x91ED, 0xB3AB, 0x91E9, 0xB3AC, 0x9589, 0xB3AD, 0x966A, + 0xB3AE, 0x9675, 0xB3AF, 0x9673, 0xB3B0, 0x9678, 0xB3B1, 0x9670, + 0xB3B2, 0x9674, 0xB3B3, 0x9676, 0xB3B4, 0x9677, 0xB3B5, 0x966C, + 0xB3B6, 0x96C0, 0xB3B7, 0x96EA, 0xB3B8, 0x96E9, 0xB3B9, 0x7AE0, + 0xB3BA, 0x7ADF, 0xB3BB, 0x9802, 0xB3BC, 0x9803, 0xB3BD, 0x9B5A, + 0xB3BE, 0x9CE5, 0xB3BF, 0x9E75, 0xB3C0, 0x9E7F, 0xB3C1, 0x9EA5, + 0xB3C2, 0x9EBB, 0xB3C3, 0x50A2, 0xB3C4, 0x508D, 0xB3C5, 0x5085, + 0xB3C6, 0x5099, 0xB3C7, 0x5091, 0xB3C8, 0x5080, 0xB3C9, 0x5096, + 0xB3CA, 0x5098, 0xB3CB, 0x509A, 0xB3CC, 0x6700, 0xB3CD, 0x51F1, + 0xB3CE, 0x5272, 0xB3CF, 0x5274, 0xB3D0, 0x5275, 0xB3D1, 0x5269, + 0xB3D2, 0x52DE, 0xB3D3, 0x52DD, 0xB3D4, 0x52DB, 0xB3D5, 0x535A, + 0xB3D6, 0x53A5, 0xB3D7, 0x557B, 0xB3D8, 0x5580, 0xB3D9, 0x55A7, + 0xB3DA, 0x557C, 0xB3DB, 0x558A, 0xB3DC, 0x559D, 0xB3DD, 0x5598, + 0xB3DE, 0x5582, 0xB3DF, 0x559C, 0xB3E0, 0x55AA, 0xB3E1, 0x5594, + 0xB3E2, 0x5587, 0xB3E3, 0x558B, 0xB3E4, 0x5583, 0xB3E5, 0x55B3, + 0xB3E6, 0x55AE, 0xB3E7, 0x559F, 0xB3E8, 0x553E, 0xB3E9, 0x55B2, + 0xB3EA, 0x559A, 0xB3EB, 0x55BB, 0xB3EC, 0x55AC, 0xB3ED, 0x55B1, + 0xB3EE, 0x557E, 0xB3EF, 0x5589, 0xB3F0, 0x55AB, 0xB3F1, 0x5599, + 0xB3F2, 0x570D, 0xB3F3, 0x582F, 0xB3F4, 0x582A, 0xB3F5, 0x5834, + 0xB3F6, 0x5824, 0xB3F7, 0x5830, 0xB3F8, 0x5831, 0xB3F9, 0x5821, + 0xB3FA, 0x581D, 0xB3FB, 0x5820, 0xB3FC, 0x58F9, 0xB3FD, 0x58FA, + 0xB3FE, 0x5960, 0xB440, 0x5A77, 0xB441, 0x5A9A, 0xB442, 0x5A7F, + 0xB443, 0x5A92, 0xB444, 0x5A9B, 0xB445, 0x5AA7, 0xB446, 0x5B73, + 0xB447, 0x5B71, 0xB448, 0x5BD2, 0xB449, 0x5BCC, 0xB44A, 0x5BD3, + 0xB44B, 0x5BD0, 0xB44C, 0x5C0A, 0xB44D, 0x5C0B, 0xB44E, 0x5C31, + 0xB44F, 0x5D4C, 0xB450, 0x5D50, 0xB451, 0x5D34, 0xB452, 0x5D47, + 0xB453, 0x5DFD, 0xB454, 0x5E45, 0xB455, 0x5E3D, 0xB456, 0x5E40, + 0xB457, 0x5E43, 0xB458, 0x5E7E, 0xB459, 0x5ECA, 0xB45A, 0x5EC1, + 0xB45B, 0x5EC2, 0xB45C, 0x5EC4, 0xB45D, 0x5F3C, 0xB45E, 0x5F6D, + 0xB45F, 0x5FA9, 0xB460, 0x5FAA, 0xB461, 0x5FA8, 0xB462, 0x60D1, + 0xB463, 0x60E1, 0xB464, 0x60B2, 0xB465, 0x60B6, 0xB466, 0x60E0, + 0xB467, 0x611C, 0xB468, 0x6123, 0xB469, 0x60FA, 0xB46A, 0x6115, + 0xB46B, 0x60F0, 0xB46C, 0x60FB, 0xB46D, 0x60F4, 0xB46E, 0x6168, + 0xB46F, 0x60F1, 0xB470, 0x610E, 0xB471, 0x60F6, 0xB472, 0x6109, + 0xB473, 0x6100, 0xB474, 0x6112, 0xB475, 0x621F, 0xB476, 0x6249, + 0xB477, 0x63A3, 0xB478, 0x638C, 0xB479, 0x63CF, 0xB47A, 0x63C0, + 0xB47B, 0x63E9, 0xB47C, 0x63C9, 0xB47D, 0x63C6, 0xB47E, 0x63CD, + 0xB4A1, 0x63D2, 0xB4A2, 0x63E3, 0xB4A3, 0x63D0, 0xB4A4, 0x63E1, + 0xB4A5, 0x63D6, 0xB4A6, 0x63ED, 0xB4A7, 0x63EE, 0xB4A8, 0x6376, + 0xB4A9, 0x63F4, 0xB4AA, 0x63EA, 0xB4AB, 0x63DB, 0xB4AC, 0x6452, + 0xB4AD, 0x63DA, 0xB4AE, 0x63F9, 0xB4AF, 0x655E, 0xB4B0, 0x6566, + 0xB4B1, 0x6562, 0xB4B2, 0x6563, 0xB4B3, 0x6591, 0xB4B4, 0x6590, + 0xB4B5, 0x65AF, 0xB4B6, 0x666E, 0xB4B7, 0x6670, 0xB4B8, 0x6674, + 0xB4B9, 0x6676, 0xB4BA, 0x666F, 0xB4BB, 0x6691, 0xB4BC, 0x667A, + 0xB4BD, 0x667E, 0xB4BE, 0x6677, 0xB4BF, 0x66FE, 0xB4C0, 0x66FF, + 0xB4C1, 0x671F, 0xB4C2, 0x671D, 0xB4C3, 0x68FA, 0xB4C4, 0x68D5, + 0xB4C5, 0x68E0, 0xB4C6, 0x68D8, 0xB4C7, 0x68D7, 0xB4C8, 0x6905, + 0xB4C9, 0x68DF, 0xB4CA, 0x68F5, 0xB4CB, 0x68EE, 0xB4CC, 0x68E7, + 0xB4CD, 0x68F9, 0xB4CE, 0x68D2, 0xB4CF, 0x68F2, 0xB4D0, 0x68E3, + 0xB4D1, 0x68CB, 0xB4D2, 0x68CD, 0xB4D3, 0x690D, 0xB4D4, 0x6912, + 0xB4D5, 0x690E, 0xB4D6, 0x68C9, 0xB4D7, 0x68DA, 0xB4D8, 0x696E, + 0xB4D9, 0x68FB, 0xB4DA, 0x6B3E, 0xB4DB, 0x6B3A, 0xB4DC, 0x6B3D, + 0xB4DD, 0x6B98, 0xB4DE, 0x6B96, 0xB4DF, 0x6BBC, 0xB4E0, 0x6BEF, + 0xB4E1, 0x6C2E, 0xB4E2, 0x6C2F, 0xB4E3, 0x6C2C, 0xB4E4, 0x6E2F, + 0xB4E5, 0x6E38, 0xB4E6, 0x6E54, 0xB4E7, 0x6E21, 0xB4E8, 0x6E32, + 0xB4E9, 0x6E67, 0xB4EA, 0x6E4A, 0xB4EB, 0x6E20, 0xB4EC, 0x6E25, + 0xB4ED, 0x6E23, 0xB4EE, 0x6E1B, 0xB4EF, 0x6E5B, 0xB4F0, 0x6E58, + 0xB4F1, 0x6E24, 0xB4F2, 0x6E56, 0xB4F3, 0x6E6E, 0xB4F4, 0x6E2D, + 0xB4F5, 0x6E26, 0xB4F6, 0x6E6F, 0xB4F7, 0x6E34, 0xB4F8, 0x6E4D, + 0xB4F9, 0x6E3A, 0xB4FA, 0x6E2C, 0xB4FB, 0x6E43, 0xB4FC, 0x6E1D, + 0xB4FD, 0x6E3E, 0xB4FE, 0x6ECB, 0xB540, 0x6E89, 0xB541, 0x6E19, + 0xB542, 0x6E4E, 0xB543, 0x6E63, 0xB544, 0x6E44, 0xB545, 0x6E72, + 0xB546, 0x6E69, 0xB547, 0x6E5F, 0xB548, 0x7119, 0xB549, 0x711A, + 0xB54A, 0x7126, 0xB54B, 0x7130, 0xB54C, 0x7121, 0xB54D, 0x7136, + 0xB54E, 0x716E, 0xB54F, 0x711C, 0xB550, 0x724C, 0xB551, 0x7284, + 0xB552, 0x7280, 0xB553, 0x7336, 0xB554, 0x7325, 0xB555, 0x7334, + 0xB556, 0x7329, 0xB557, 0x743A, 0xB558, 0x742A, 0xB559, 0x7433, + 0xB55A, 0x7422, 0xB55B, 0x7425, 0xB55C, 0x7435, 0xB55D, 0x7436, + 0xB55E, 0x7434, 0xB55F, 0x742F, 0xB560, 0x741B, 0xB561, 0x7426, + 0xB562, 0x7428, 0xB563, 0x7525, 0xB564, 0x7526, 0xB565, 0x756B, + 0xB566, 0x756A, 0xB567, 0x75E2, 0xB568, 0x75DB, 0xB569, 0x75E3, + 0xB56A, 0x75D9, 0xB56B, 0x75D8, 0xB56C, 0x75DE, 0xB56D, 0x75E0, + 0xB56E, 0x767B, 0xB56F, 0x767C, 0xB570, 0x7696, 0xB571, 0x7693, + 0xB572, 0x76B4, 0xB573, 0x76DC, 0xB574, 0x774F, 0xB575, 0x77ED, + 0xB576, 0x785D, 0xB577, 0x786C, 0xB578, 0x786F, 0xB579, 0x7A0D, + 0xB57A, 0x7A08, 0xB57B, 0x7A0B, 0xB57C, 0x7A05, 0xB57D, 0x7A00, + 0xB57E, 0x7A98, 0xB5A1, 0x7A97, 0xB5A2, 0x7A96, 0xB5A3, 0x7AE5, + 0xB5A4, 0x7AE3, 0xB5A5, 0x7B49, 0xB5A6, 0x7B56, 0xB5A7, 0x7B46, + 0xB5A8, 0x7B50, 0xB5A9, 0x7B52, 0xB5AA, 0x7B54, 0xB5AB, 0x7B4D, + 0xB5AC, 0x7B4B, 0xB5AD, 0x7B4F, 0xB5AE, 0x7B51, 0xB5AF, 0x7C9F, + 0xB5B0, 0x7CA5, 0xB5B1, 0x7D5E, 0xB5B2, 0x7D50, 0xB5B3, 0x7D68, + 0xB5B4, 0x7D55, 0xB5B5, 0x7D2B, 0xB5B6, 0x7D6E, 0xB5B7, 0x7D72, + 0xB5B8, 0x7D61, 0xB5B9, 0x7D66, 0xB5BA, 0x7D62, 0xB5BB, 0x7D70, + 0xB5BC, 0x7D73, 0xB5BD, 0x5584, 0xB5BE, 0x7FD4, 0xB5BF, 0x7FD5, + 0xB5C0, 0x800B, 0xB5C1, 0x8052, 0xB5C2, 0x8085, 0xB5C3, 0x8155, + 0xB5C4, 0x8154, 0xB5C5, 0x814B, 0xB5C6, 0x8151, 0xB5C7, 0x814E, + 0xB5C8, 0x8139, 0xB5C9, 0x8146, 0xB5CA, 0x813E, 0xB5CB, 0x814C, + 0xB5CC, 0x8153, 0xB5CD, 0x8174, 0xB5CE, 0x8212, 0xB5CF, 0x821C, + 0xB5D0, 0x83E9, 0xB5D1, 0x8403, 0xB5D2, 0x83F8, 0xB5D3, 0x840D, + 0xB5D4, 0x83E0, 0xB5D5, 0x83C5, 0xB5D6, 0x840B, 0xB5D7, 0x83C1, + 0xB5D8, 0x83EF, 0xB5D9, 0x83F1, 0xB5DA, 0x83F4, 0xB5DB, 0x8457, + 0xB5DC, 0x840A, 0xB5DD, 0x83F0, 0xB5DE, 0x840C, 0xB5DF, 0x83CC, + 0xB5E0, 0x83FD, 0xB5E1, 0x83F2, 0xB5E2, 0x83CA, 0xB5E3, 0x8438, + 0xB5E4, 0x840E, 0xB5E5, 0x8404, 0xB5E6, 0x83DC, 0xB5E7, 0x8407, + 0xB5E8, 0x83D4, 0xB5E9, 0x83DF, 0xB5EA, 0x865B, 0xB5EB, 0x86DF, + 0xB5EC, 0x86D9, 0xB5ED, 0x86ED, 0xB5EE, 0x86D4, 0xB5EF, 0x86DB, + 0xB5F0, 0x86E4, 0xB5F1, 0x86D0, 0xB5F2, 0x86DE, 0xB5F3, 0x8857, + 0xB5F4, 0x88C1, 0xB5F5, 0x88C2, 0xB5F6, 0x88B1, 0xB5F7, 0x8983, + 0xB5F8, 0x8996, 0xB5F9, 0x8A3B, 0xB5FA, 0x8A60, 0xB5FB, 0x8A55, + 0xB5FC, 0x8A5E, 0xB5FD, 0x8A3C, 0xB5FE, 0x8A41, 0xB640, 0x8A54, + 0xB641, 0x8A5B, 0xB642, 0x8A50, 0xB643, 0x8A46, 0xB644, 0x8A34, + 0xB645, 0x8A3A, 0xB646, 0x8A36, 0xB647, 0x8A56, 0xB648, 0x8C61, + 0xB649, 0x8C82, 0xB64A, 0x8CAF, 0xB64B, 0x8CBC, 0xB64C, 0x8CB3, + 0xB64D, 0x8CBD, 0xB64E, 0x8CC1, 0xB64F, 0x8CBB, 0xB650, 0x8CC0, + 0xB651, 0x8CB4, 0xB652, 0x8CB7, 0xB653, 0x8CB6, 0xB654, 0x8CBF, + 0xB655, 0x8CB8, 0xB656, 0x8D8A, 0xB657, 0x8D85, 0xB658, 0x8D81, + 0xB659, 0x8DCE, 0xB65A, 0x8DDD, 0xB65B, 0x8DCB, 0xB65C, 0x8DDA, + 0xB65D, 0x8DD1, 0xB65E, 0x8DCC, 0xB65F, 0x8DDB, 0xB660, 0x8DC6, + 0xB661, 0x8EFB, 0xB662, 0x8EF8, 0xB663, 0x8EFC, 0xB664, 0x8F9C, + 0xB665, 0x902E, 0xB666, 0x9035, 0xB667, 0x9031, 0xB668, 0x9038, + 0xB669, 0x9032, 0xB66A, 0x9036, 0xB66B, 0x9102, 0xB66C, 0x90F5, + 0xB66D, 0x9109, 0xB66E, 0x90FE, 0xB66F, 0x9163, 0xB670, 0x9165, + 0xB671, 0x91CF, 0xB672, 0x9214, 0xB673, 0x9215, 0xB674, 0x9223, + 0xB675, 0x9209, 0xB676, 0x921E, 0xB677, 0x920D, 0xB678, 0x9210, + 0xB679, 0x9207, 0xB67A, 0x9211, 0xB67B, 0x9594, 0xB67C, 0x958F, + 0xB67D, 0x958B, 0xB67E, 0x9591, 0xB6A1, 0x9593, 0xB6A2, 0x9592, + 0xB6A3, 0x958E, 0xB6A4, 0x968A, 0xB6A5, 0x968E, 0xB6A6, 0x968B, + 0xB6A7, 0x967D, 0xB6A8, 0x9685, 0xB6A9, 0x9686, 0xB6AA, 0x968D, + 0xB6AB, 0x9672, 0xB6AC, 0x9684, 0xB6AD, 0x96C1, 0xB6AE, 0x96C5, + 0xB6AF, 0x96C4, 0xB6B0, 0x96C6, 0xB6B1, 0x96C7, 0xB6B2, 0x96EF, + 0xB6B3, 0x96F2, 0xB6B4, 0x97CC, 0xB6B5, 0x9805, 0xB6B6, 0x9806, + 0xB6B7, 0x9808, 0xB6B8, 0x98E7, 0xB6B9, 0x98EA, 0xB6BA, 0x98EF, + 0xB6BB, 0x98E9, 0xB6BC, 0x98F2, 0xB6BD, 0x98ED, 0xB6BE, 0x99AE, + 0xB6BF, 0x99AD, 0xB6C0, 0x9EC3, 0xB6C1, 0x9ECD, 0xB6C2, 0x9ED1, + 0xB6C3, 0x4E82, 0xB6C4, 0x50AD, 0xB6C5, 0x50B5, 0xB6C6, 0x50B2, + 0xB6C7, 0x50B3, 0xB6C8, 0x50C5, 0xB6C9, 0x50BE, 0xB6CA, 0x50AC, + 0xB6CB, 0x50B7, 0xB6CC, 0x50BB, 0xB6CD, 0x50AF, 0xB6CE, 0x50C7, + 0xB6CF, 0x527F, 0xB6D0, 0x5277, 0xB6D1, 0x527D, 0xB6D2, 0x52DF, + 0xB6D3, 0x52E6, 0xB6D4, 0x52E4, 0xB6D5, 0x52E2, 0xB6D6, 0x52E3, + 0xB6D7, 0x532F, 0xB6D8, 0x55DF, 0xB6D9, 0x55E8, 0xB6DA, 0x55D3, + 0xB6DB, 0x55E6, 0xB6DC, 0x55CE, 0xB6DD, 0x55DC, 0xB6DE, 0x55C7, + 0xB6DF, 0x55D1, 0xB6E0, 0x55E3, 0xB6E1, 0x55E4, 0xB6E2, 0x55EF, + 0xB6E3, 0x55DA, 0xB6E4, 0x55E1, 0xB6E5, 0x55C5, 0xB6E6, 0x55C6, + 0xB6E7, 0x55E5, 0xB6E8, 0x55C9, 0xB6E9, 0x5712, 0xB6EA, 0x5713, + 0xB6EB, 0x585E, 0xB6EC, 0x5851, 0xB6ED, 0x5858, 0xB6EE, 0x5857, + 0xB6EF, 0x585A, 0xB6F0, 0x5854, 0xB6F1, 0x586B, 0xB6F2, 0x584C, + 0xB6F3, 0x586D, 0xB6F4, 0x584A, 0xB6F5, 0x5862, 0xB6F6, 0x5852, + 0xB6F7, 0x584B, 0xB6F8, 0x5967, 0xB6F9, 0x5AC1, 0xB6FA, 0x5AC9, + 0xB6FB, 0x5ACC, 0xB6FC, 0x5ABE, 0xB6FD, 0x5ABD, 0xB6FE, 0x5ABC, + 0xB740, 0x5AB3, 0xB741, 0x5AC2, 0xB742, 0x5AB2, 0xB743, 0x5D69, + 0xB744, 0x5D6F, 0xB745, 0x5E4C, 0xB746, 0x5E79, 0xB747, 0x5EC9, + 0xB748, 0x5EC8, 0xB749, 0x5F12, 0xB74A, 0x5F59, 0xB74B, 0x5FAC, + 0xB74C, 0x5FAE, 0xB74D, 0x611A, 0xB74E, 0x610F, 0xB74F, 0x6148, + 0xB750, 0x611F, 0xB751, 0x60F3, 0xB752, 0x611B, 0xB753, 0x60F9, + 0xB754, 0x6101, 0xB755, 0x6108, 0xB756, 0x614E, 0xB757, 0x614C, + 0xB758, 0x6144, 0xB759, 0x614D, 0xB75A, 0x613E, 0xB75B, 0x6134, + 0xB75C, 0x6127, 0xB75D, 0x610D, 0xB75E, 0x6106, 0xB75F, 0x6137, + 0xB760, 0x6221, 0xB761, 0x6222, 0xB762, 0x6413, 0xB763, 0x643E, + 0xB764, 0x641E, 0xB765, 0x642A, 0xB766, 0x642D, 0xB767, 0x643D, + 0xB768, 0x642C, 0xB769, 0x640F, 0xB76A, 0x641C, 0xB76B, 0x6414, + 0xB76C, 0x640D, 0xB76D, 0x6436, 0xB76E, 0x6416, 0xB76F, 0x6417, + 0xB770, 0x6406, 0xB771, 0x656C, 0xB772, 0x659F, 0xB773, 0x65B0, + 0xB774, 0x6697, 0xB775, 0x6689, 0xB776, 0x6687, 0xB777, 0x6688, + 0xB778, 0x6696, 0xB779, 0x6684, 0xB77A, 0x6698, 0xB77B, 0x668D, + 0xB77C, 0x6703, 0xB77D, 0x6994, 0xB77E, 0x696D, 0xB7A1, 0x695A, + 0xB7A2, 0x6977, 0xB7A3, 0x6960, 0xB7A4, 0x6954, 0xB7A5, 0x6975, + 0xB7A6, 0x6930, 0xB7A7, 0x6982, 0xB7A8, 0x694A, 0xB7A9, 0x6968, + 0xB7AA, 0x696B, 0xB7AB, 0x695E, 0xB7AC, 0x6953, 0xB7AD, 0x6979, + 0xB7AE, 0x6986, 0xB7AF, 0x695D, 0xB7B0, 0x6963, 0xB7B1, 0x695B, + 0xB7B2, 0x6B47, 0xB7B3, 0x6B72, 0xB7B4, 0x6BC0, 0xB7B5, 0x6BBF, + 0xB7B6, 0x6BD3, 0xB7B7, 0x6BFD, 0xB7B8, 0x6EA2, 0xB7B9, 0x6EAF, + 0xB7BA, 0x6ED3, 0xB7BB, 0x6EB6, 0xB7BC, 0x6EC2, 0xB7BD, 0x6E90, + 0xB7BE, 0x6E9D, 0xB7BF, 0x6EC7, 0xB7C0, 0x6EC5, 0xB7C1, 0x6EA5, + 0xB7C2, 0x6E98, 0xB7C3, 0x6EBC, 0xB7C4, 0x6EBA, 0xB7C5, 0x6EAB, + 0xB7C6, 0x6ED1, 0xB7C7, 0x6E96, 0xB7C8, 0x6E9C, 0xB7C9, 0x6EC4, + 0xB7CA, 0x6ED4, 0xB7CB, 0x6EAA, 0xB7CC, 0x6EA7, 0xB7CD, 0x6EB4, + 0xB7CE, 0x714E, 0xB7CF, 0x7159, 0xB7D0, 0x7169, 0xB7D1, 0x7164, + 0xB7D2, 0x7149, 0xB7D3, 0x7167, 0xB7D4, 0x715C, 0xB7D5, 0x716C, + 0xB7D6, 0x7166, 0xB7D7, 0x714C, 0xB7D8, 0x7165, 0xB7D9, 0x715E, + 0xB7DA, 0x7146, 0xB7DB, 0x7168, 0xB7DC, 0x7156, 0xB7DD, 0x723A, + 0xB7DE, 0x7252, 0xB7DF, 0x7337, 0xB7E0, 0x7345, 0xB7E1, 0x733F, + 0xB7E2, 0x733E, 0xB7E3, 0x746F, 0xB7E4, 0x745A, 0xB7E5, 0x7455, + 0xB7E6, 0x745F, 0xB7E7, 0x745E, 0xB7E8, 0x7441, 0xB7E9, 0x743F, + 0xB7EA, 0x7459, 0xB7EB, 0x745B, 0xB7EC, 0x745C, 0xB7ED, 0x7576, + 0xB7EE, 0x7578, 0xB7EF, 0x7600, 0xB7F0, 0x75F0, 0xB7F1, 0x7601, + 0xB7F2, 0x75F2, 0xB7F3, 0x75F1, 0xB7F4, 0x75FA, 0xB7F5, 0x75FF, + 0xB7F6, 0x75F4, 0xB7F7, 0x75F3, 0xB7F8, 0x76DE, 0xB7F9, 0x76DF, + 0xB7FA, 0x775B, 0xB7FB, 0x776B, 0xB7FC, 0x7766, 0xB7FD, 0x775E, + 0xB7FE, 0x7763, 0xB840, 0x7779, 0xB841, 0x776A, 0xB842, 0x776C, + 0xB843, 0x775C, 0xB844, 0x7765, 0xB845, 0x7768, 0xB846, 0x7762, + 0xB847, 0x77EE, 0xB848, 0x788E, 0xB849, 0x78B0, 0xB84A, 0x7897, + 0xB84B, 0x7898, 0xB84C, 0x788C, 0xB84D, 0x7889, 0xB84E, 0x787C, + 0xB84F, 0x7891, 0xB850, 0x7893, 0xB851, 0x787F, 0xB852, 0x797A, + 0xB853, 0x797F, 0xB854, 0x7981, 0xB855, 0x842C, 0xB856, 0x79BD, + 0xB857, 0x7A1C, 0xB858, 0x7A1A, 0xB859, 0x7A20, 0xB85A, 0x7A14, + 0xB85B, 0x7A1F, 0xB85C, 0x7A1E, 0xB85D, 0x7A9F, 0xB85E, 0x7AA0, + 0xB85F, 0x7B77, 0xB860, 0x7BC0, 0xB861, 0x7B60, 0xB862, 0x7B6E, + 0xB863, 0x7B67, 0xB864, 0x7CB1, 0xB865, 0x7CB3, 0xB866, 0x7CB5, + 0xB867, 0x7D93, 0xB868, 0x7D79, 0xB869, 0x7D91, 0xB86A, 0x7D81, + 0xB86B, 0x7D8F, 0xB86C, 0x7D5B, 0xB86D, 0x7F6E, 0xB86E, 0x7F69, + 0xB86F, 0x7F6A, 0xB870, 0x7F72, 0xB871, 0x7FA9, 0xB872, 0x7FA8, + 0xB873, 0x7FA4, 0xB874, 0x8056, 0xB875, 0x8058, 0xB876, 0x8086, + 0xB877, 0x8084, 0xB878, 0x8171, 0xB879, 0x8170, 0xB87A, 0x8178, + 0xB87B, 0x8165, 0xB87C, 0x816E, 0xB87D, 0x8173, 0xB87E, 0x816B, + 0xB8A1, 0x8179, 0xB8A2, 0x817A, 0xB8A3, 0x8166, 0xB8A4, 0x8205, + 0xB8A5, 0x8247, 0xB8A6, 0x8482, 0xB8A7, 0x8477, 0xB8A8, 0x843D, + 0xB8A9, 0x8431, 0xB8AA, 0x8475, 0xB8AB, 0x8466, 0xB8AC, 0x846B, + 0xB8AD, 0x8449, 0xB8AE, 0x846C, 0xB8AF, 0x845B, 0xB8B0, 0x843C, + 0xB8B1, 0x8435, 0xB8B2, 0x8461, 0xB8B3, 0x8463, 0xB8B4, 0x8469, + 0xB8B5, 0x846D, 0xB8B6, 0x8446, 0xB8B7, 0x865E, 0xB8B8, 0x865C, + 0xB8B9, 0x865F, 0xB8BA, 0x86F9, 0xB8BB, 0x8713, 0xB8BC, 0x8708, + 0xB8BD, 0x8707, 0xB8BE, 0x8700, 0xB8BF, 0x86FE, 0xB8C0, 0x86FB, + 0xB8C1, 0x8702, 0xB8C2, 0x8703, 0xB8C3, 0x8706, 0xB8C4, 0x870A, + 0xB8C5, 0x8859, 0xB8C6, 0x88DF, 0xB8C7, 0x88D4, 0xB8C8, 0x88D9, + 0xB8C9, 0x88DC, 0xB8CA, 0x88D8, 0xB8CB, 0x88DD, 0xB8CC, 0x88E1, + 0xB8CD, 0x88CA, 0xB8CE, 0x88D5, 0xB8CF, 0x88D2, 0xB8D0, 0x899C, + 0xB8D1, 0x89E3, 0xB8D2, 0x8A6B, 0xB8D3, 0x8A72, 0xB8D4, 0x8A73, + 0xB8D5, 0x8A66, 0xB8D6, 0x8A69, 0xB8D7, 0x8A70, 0xB8D8, 0x8A87, + 0xB8D9, 0x8A7C, 0xB8DA, 0x8A63, 0xB8DB, 0x8AA0, 0xB8DC, 0x8A71, + 0xB8DD, 0x8A85, 0xB8DE, 0x8A6D, 0xB8DF, 0x8A62, 0xB8E0, 0x8A6E, + 0xB8E1, 0x8A6C, 0xB8E2, 0x8A79, 0xB8E3, 0x8A7B, 0xB8E4, 0x8A3E, + 0xB8E5, 0x8A68, 0xB8E6, 0x8C62, 0xB8E7, 0x8C8A, 0xB8E8, 0x8C89, + 0xB8E9, 0x8CCA, 0xB8EA, 0x8CC7, 0xB8EB, 0x8CC8, 0xB8EC, 0x8CC4, + 0xB8ED, 0x8CB2, 0xB8EE, 0x8CC3, 0xB8EF, 0x8CC2, 0xB8F0, 0x8CC5, + 0xB8F1, 0x8DE1, 0xB8F2, 0x8DDF, 0xB8F3, 0x8DE8, 0xB8F4, 0x8DEF, + 0xB8F5, 0x8DF3, 0xB8F6, 0x8DFA, 0xB8F7, 0x8DEA, 0xB8F8, 0x8DE4, + 0xB8F9, 0x8DE6, 0xB8FA, 0x8EB2, 0xB8FB, 0x8F03, 0xB8FC, 0x8F09, + 0xB8FD, 0x8EFE, 0xB8FE, 0x8F0A, 0xB940, 0x8F9F, 0xB941, 0x8FB2, + 0xB942, 0x904B, 0xB943, 0x904A, 0xB944, 0x9053, 0xB945, 0x9042, + 0xB946, 0x9054, 0xB947, 0x903C, 0xB948, 0x9055, 0xB949, 0x9050, + 0xB94A, 0x9047, 0xB94B, 0x904F, 0xB94C, 0x904E, 0xB94D, 0x904D, + 0xB94E, 0x9051, 0xB94F, 0x903E, 0xB950, 0x9041, 0xB951, 0x9112, + 0xB952, 0x9117, 0xB953, 0x916C, 0xB954, 0x916A, 0xB955, 0x9169, + 0xB956, 0x91C9, 0xB957, 0x9237, 0xB958, 0x9257, 0xB959, 0x9238, + 0xB95A, 0x923D, 0xB95B, 0x9240, 0xB95C, 0x923E, 0xB95D, 0x925B, + 0xB95E, 0x924B, 0xB95F, 0x9264, 0xB960, 0x9251, 0xB961, 0x9234, + 0xB962, 0x9249, 0xB963, 0x924D, 0xB964, 0x9245, 0xB965, 0x9239, + 0xB966, 0x923F, 0xB967, 0x925A, 0xB968, 0x9598, 0xB969, 0x9698, + 0xB96A, 0x9694, 0xB96B, 0x9695, 0xB96C, 0x96CD, 0xB96D, 0x96CB, + 0xB96E, 0x96C9, 0xB96F, 0x96CA, 0xB970, 0x96F7, 0xB971, 0x96FB, + 0xB972, 0x96F9, 0xB973, 0x96F6, 0xB974, 0x9756, 0xB975, 0x9774, + 0xB976, 0x9776, 0xB977, 0x9810, 0xB978, 0x9811, 0xB979, 0x9813, + 0xB97A, 0x980A, 0xB97B, 0x9812, 0xB97C, 0x980C, 0xB97D, 0x98FC, + 0xB97E, 0x98F4, 0xB9A1, 0x98FD, 0xB9A2, 0x98FE, 0xB9A3, 0x99B3, + 0xB9A4, 0x99B1, 0xB9A5, 0x99B4, 0xB9A6, 0x9AE1, 0xB9A7, 0x9CE9, + 0xB9A8, 0x9E82, 0xB9A9, 0x9F0E, 0xB9AA, 0x9F13, 0xB9AB, 0x9F20, + 0xB9AC, 0x50E7, 0xB9AD, 0x50EE, 0xB9AE, 0x50E5, 0xB9AF, 0x50D6, + 0xB9B0, 0x50ED, 0xB9B1, 0x50DA, 0xB9B2, 0x50D5, 0xB9B3, 0x50CF, + 0xB9B4, 0x50D1, 0xB9B5, 0x50F1, 0xB9B6, 0x50CE, 0xB9B7, 0x50E9, + 0xB9B8, 0x5162, 0xB9B9, 0x51F3, 0xB9BA, 0x5283, 0xB9BB, 0x5282, + 0xB9BC, 0x5331, 0xB9BD, 0x53AD, 0xB9BE, 0x55FE, 0xB9BF, 0x5600, + 0xB9C0, 0x561B, 0xB9C1, 0x5617, 0xB9C2, 0x55FD, 0xB9C3, 0x5614, + 0xB9C4, 0x5606, 0xB9C5, 0x5609, 0xB9C6, 0x560D, 0xB9C7, 0x560E, + 0xB9C8, 0x55F7, 0xB9C9, 0x5616, 0xB9CA, 0x561F, 0xB9CB, 0x5608, + 0xB9CC, 0x5610, 0xB9CD, 0x55F6, 0xB9CE, 0x5718, 0xB9CF, 0x5716, + 0xB9D0, 0x5875, 0xB9D1, 0x587E, 0xB9D2, 0x5883, 0xB9D3, 0x5893, + 0xB9D4, 0x588A, 0xB9D5, 0x5879, 0xB9D6, 0x5885, 0xB9D7, 0x587D, + 0xB9D8, 0x58FD, 0xB9D9, 0x5925, 0xB9DA, 0x5922, 0xB9DB, 0x5924, + 0xB9DC, 0x596A, 0xB9DD, 0x5969, 0xB9DE, 0x5AE1, 0xB9DF, 0x5AE6, + 0xB9E0, 0x5AE9, 0xB9E1, 0x5AD7, 0xB9E2, 0x5AD6, 0xB9E3, 0x5AD8, + 0xB9E4, 0x5AE3, 0xB9E5, 0x5B75, 0xB9E6, 0x5BDE, 0xB9E7, 0x5BE7, + 0xB9E8, 0x5BE1, 0xB9E9, 0x5BE5, 0xB9EA, 0x5BE6, 0xB9EB, 0x5BE8, + 0xB9EC, 0x5BE2, 0xB9ED, 0x5BE4, 0xB9EE, 0x5BDF, 0xB9EF, 0x5C0D, + 0xB9F0, 0x5C62, 0xB9F1, 0x5D84, 0xB9F2, 0x5D87, 0xB9F3, 0x5E5B, + 0xB9F4, 0x5E63, 0xB9F5, 0x5E55, 0xB9F6, 0x5E57, 0xB9F7, 0x5E54, + 0xB9F8, 0x5ED3, 0xB9F9, 0x5ED6, 0xB9FA, 0x5F0A, 0xB9FB, 0x5F46, + 0xB9FC, 0x5F70, 0xB9FD, 0x5FB9, 0xB9FE, 0x6147, 0xBA40, 0x613F, + 0xBA41, 0x614B, 0xBA42, 0x6177, 0xBA43, 0x6162, 0xBA44, 0x6163, + 0xBA45, 0x615F, 0xBA46, 0x615A, 0xBA47, 0x6158, 0xBA48, 0x6175, + 0xBA49, 0x622A, 0xBA4A, 0x6487, 0xBA4B, 0x6458, 0xBA4C, 0x6454, + 0xBA4D, 0x64A4, 0xBA4E, 0x6478, 0xBA4F, 0x645F, 0xBA50, 0x647A, + 0xBA51, 0x6451, 0xBA52, 0x6467, 0xBA53, 0x6434, 0xBA54, 0x646D, + 0xBA55, 0x647B, 0xBA56, 0x6572, 0xBA57, 0x65A1, 0xBA58, 0x65D7, + 0xBA59, 0x65D6, 0xBA5A, 0x66A2, 0xBA5B, 0x66A8, 0xBA5C, 0x669D, + 0xBA5D, 0x699C, 0xBA5E, 0x69A8, 0xBA5F, 0x6995, 0xBA60, 0x69C1, + 0xBA61, 0x69AE, 0xBA62, 0x69D3, 0xBA63, 0x69CB, 0xBA64, 0x699B, + 0xBA65, 0x69B7, 0xBA66, 0x69BB, 0xBA67, 0x69AB, 0xBA68, 0x69B4, + 0xBA69, 0x69D0, 0xBA6A, 0x69CD, 0xBA6B, 0x69AD, 0xBA6C, 0x69CC, + 0xBA6D, 0x69A6, 0xBA6E, 0x69C3, 0xBA6F, 0x69A3, 0xBA70, 0x6B49, + 0xBA71, 0x6B4C, 0xBA72, 0x6C33, 0xBA73, 0x6F33, 0xBA74, 0x6F14, + 0xBA75, 0x6EFE, 0xBA76, 0x6F13, 0xBA77, 0x6EF4, 0xBA78, 0x6F29, + 0xBA79, 0x6F3E, 0xBA7A, 0x6F20, 0xBA7B, 0x6F2C, 0xBA7C, 0x6F0F, + 0xBA7D, 0x6F02, 0xBA7E, 0x6F22, 0xBAA1, 0x6EFF, 0xBAA2, 0x6EEF, + 0xBAA3, 0x6F06, 0xBAA4, 0x6F31, 0xBAA5, 0x6F38, 0xBAA6, 0x6F32, + 0xBAA7, 0x6F23, 0xBAA8, 0x6F15, 0xBAA9, 0x6F2B, 0xBAAA, 0x6F2F, + 0xBAAB, 0x6F88, 0xBAAC, 0x6F2A, 0xBAAD, 0x6EEC, 0xBAAE, 0x6F01, + 0xBAAF, 0x6EF2, 0xBAB0, 0x6ECC, 0xBAB1, 0x6EF7, 0xBAB2, 0x7194, + 0xBAB3, 0x7199, 0xBAB4, 0x717D, 0xBAB5, 0x718A, 0xBAB6, 0x7184, + 0xBAB7, 0x7192, 0xBAB8, 0x723E, 0xBAB9, 0x7292, 0xBABA, 0x7296, + 0xBABB, 0x7344, 0xBABC, 0x7350, 0xBABD, 0x7464, 0xBABE, 0x7463, + 0xBABF, 0x746A, 0xBAC0, 0x7470, 0xBAC1, 0x746D, 0xBAC2, 0x7504, + 0xBAC3, 0x7591, 0xBAC4, 0x7627, 0xBAC5, 0x760D, 0xBAC6, 0x760B, + 0xBAC7, 0x7609, 0xBAC8, 0x7613, 0xBAC9, 0x76E1, 0xBACA, 0x76E3, + 0xBACB, 0x7784, 0xBACC, 0x777D, 0xBACD, 0x777F, 0xBACE, 0x7761, + 0xBACF, 0x78C1, 0xBAD0, 0x789F, 0xBAD1, 0x78A7, 0xBAD2, 0x78B3, + 0xBAD3, 0x78A9, 0xBAD4, 0x78A3, 0xBAD5, 0x798E, 0xBAD6, 0x798F, + 0xBAD7, 0x798D, 0xBAD8, 0x7A2E, 0xBAD9, 0x7A31, 0xBADA, 0x7AAA, + 0xBADB, 0x7AA9, 0xBADC, 0x7AED, 0xBADD, 0x7AEF, 0xBADE, 0x7BA1, + 0xBADF, 0x7B95, 0xBAE0, 0x7B8B, 0xBAE1, 0x7B75, 0xBAE2, 0x7B97, + 0xBAE3, 0x7B9D, 0xBAE4, 0x7B94, 0xBAE5, 0x7B8F, 0xBAE6, 0x7BB8, + 0xBAE7, 0x7B87, 0xBAE8, 0x7B84, 0xBAE9, 0x7CB9, 0xBAEA, 0x7CBD, + 0xBAEB, 0x7CBE, 0xBAEC, 0x7DBB, 0xBAED, 0x7DB0, 0xBAEE, 0x7D9C, + 0xBAEF, 0x7DBD, 0xBAF0, 0x7DBE, 0xBAF1, 0x7DA0, 0xBAF2, 0x7DCA, + 0xBAF3, 0x7DB4, 0xBAF4, 0x7DB2, 0xBAF5, 0x7DB1, 0xBAF6, 0x7DBA, + 0xBAF7, 0x7DA2, 0xBAF8, 0x7DBF, 0xBAF9, 0x7DB5, 0xBAFA, 0x7DB8, + 0xBAFB, 0x7DAD, 0xBAFC, 0x7DD2, 0xBAFD, 0x7DC7, 0xBAFE, 0x7DAC, + 0xBB40, 0x7F70, 0xBB41, 0x7FE0, 0xBB42, 0x7FE1, 0xBB43, 0x7FDF, + 0xBB44, 0x805E, 0xBB45, 0x805A, 0xBB46, 0x8087, 0xBB47, 0x8150, + 0xBB48, 0x8180, 0xBB49, 0x818F, 0xBB4A, 0x8188, 0xBB4B, 0x818A, + 0xBB4C, 0x817F, 0xBB4D, 0x8182, 0xBB4E, 0x81E7, 0xBB4F, 0x81FA, + 0xBB50, 0x8207, 0xBB51, 0x8214, 0xBB52, 0x821E, 0xBB53, 0x824B, + 0xBB54, 0x84C9, 0xBB55, 0x84BF, 0xBB56, 0x84C6, 0xBB57, 0x84C4, + 0xBB58, 0x8499, 0xBB59, 0x849E, 0xBB5A, 0x84B2, 0xBB5B, 0x849C, + 0xBB5C, 0x84CB, 0xBB5D, 0x84B8, 0xBB5E, 0x84C0, 0xBB5F, 0x84D3, + 0xBB60, 0x8490, 0xBB61, 0x84BC, 0xBB62, 0x84D1, 0xBB63, 0x84CA, + 0xBB64, 0x873F, 0xBB65, 0x871C, 0xBB66, 0x873B, 0xBB67, 0x8722, + 0xBB68, 0x8725, 0xBB69, 0x8734, 0xBB6A, 0x8718, 0xBB6B, 0x8755, + 0xBB6C, 0x8737, 0xBB6D, 0x8729, 0xBB6E, 0x88F3, 0xBB6F, 0x8902, + 0xBB70, 0x88F4, 0xBB71, 0x88F9, 0xBB72, 0x88F8, 0xBB73, 0x88FD, + 0xBB74, 0x88E8, 0xBB75, 0x891A, 0xBB76, 0x88EF, 0xBB77, 0x8AA6, + 0xBB78, 0x8A8C, 0xBB79, 0x8A9E, 0xBB7A, 0x8AA3, 0xBB7B, 0x8A8D, + 0xBB7C, 0x8AA1, 0xBB7D, 0x8A93, 0xBB7E, 0x8AA4, 0xBBA1, 0x8AAA, + 0xBBA2, 0x8AA5, 0xBBA3, 0x8AA8, 0xBBA4, 0x8A98, 0xBBA5, 0x8A91, + 0xBBA6, 0x8A9A, 0xBBA7, 0x8AA7, 0xBBA8, 0x8C6A, 0xBBA9, 0x8C8D, + 0xBBAA, 0x8C8C, 0xBBAB, 0x8CD3, 0xBBAC, 0x8CD1, 0xBBAD, 0x8CD2, + 0xBBAE, 0x8D6B, 0xBBAF, 0x8D99, 0xBBB0, 0x8D95, 0xBBB1, 0x8DFC, + 0xBBB2, 0x8F14, 0xBBB3, 0x8F12, 0xBBB4, 0x8F15, 0xBBB5, 0x8F13, + 0xBBB6, 0x8FA3, 0xBBB7, 0x9060, 0xBBB8, 0x9058, 0xBBB9, 0x905C, + 0xBBBA, 0x9063, 0xBBBB, 0x9059, 0xBBBC, 0x905E, 0xBBBD, 0x9062, + 0xBBBE, 0x905D, 0xBBBF, 0x905B, 0xBBC0, 0x9119, 0xBBC1, 0x9118, + 0xBBC2, 0x911E, 0xBBC3, 0x9175, 0xBBC4, 0x9178, 0xBBC5, 0x9177, + 0xBBC6, 0x9174, 0xBBC7, 0x9278, 0xBBC8, 0x9280, 0xBBC9, 0x9285, + 0xBBCA, 0x9298, 0xBBCB, 0x9296, 0xBBCC, 0x927B, 0xBBCD, 0x9293, + 0xBBCE, 0x929C, 0xBBCF, 0x92A8, 0xBBD0, 0x927C, 0xBBD1, 0x9291, + 0xBBD2, 0x95A1, 0xBBD3, 0x95A8, 0xBBD4, 0x95A9, 0xBBD5, 0x95A3, + 0xBBD6, 0x95A5, 0xBBD7, 0x95A4, 0xBBD8, 0x9699, 0xBBD9, 0x969C, + 0xBBDA, 0x969B, 0xBBDB, 0x96CC, 0xBBDC, 0x96D2, 0xBBDD, 0x9700, + 0xBBDE, 0x977C, 0xBBDF, 0x9785, 0xBBE0, 0x97F6, 0xBBE1, 0x9817, + 0xBBE2, 0x9818, 0xBBE3, 0x98AF, 0xBBE4, 0x98B1, 0xBBE5, 0x9903, + 0xBBE6, 0x9905, 0xBBE7, 0x990C, 0xBBE8, 0x9909, 0xBBE9, 0x99C1, + 0xBBEA, 0x9AAF, 0xBBEB, 0x9AB0, 0xBBEC, 0x9AE6, 0xBBED, 0x9B41, + 0xBBEE, 0x9B42, 0xBBEF, 0x9CF4, 0xBBF0, 0x9CF6, 0xBBF1, 0x9CF3, + 0xBBF2, 0x9EBC, 0xBBF3, 0x9F3B, 0xBBF4, 0x9F4A, 0xBBF5, 0x5104, + 0xBBF6, 0x5100, 0xBBF7, 0x50FB, 0xBBF8, 0x50F5, 0xBBF9, 0x50F9, + 0xBBFA, 0x5102, 0xBBFB, 0x5108, 0xBBFC, 0x5109, 0xBBFD, 0x5105, + 0xBBFE, 0x51DC, 0xBC40, 0x5287, 0xBC41, 0x5288, 0xBC42, 0x5289, + 0xBC43, 0x528D, 0xBC44, 0x528A, 0xBC45, 0x52F0, 0xBC46, 0x53B2, + 0xBC47, 0x562E, 0xBC48, 0x563B, 0xBC49, 0x5639, 0xBC4A, 0x5632, + 0xBC4B, 0x563F, 0xBC4C, 0x5634, 0xBC4D, 0x5629, 0xBC4E, 0x5653, + 0xBC4F, 0x564E, 0xBC50, 0x5657, 0xBC51, 0x5674, 0xBC52, 0x5636, + 0xBC53, 0x562F, 0xBC54, 0x5630, 0xBC55, 0x5880, 0xBC56, 0x589F, + 0xBC57, 0x589E, 0xBC58, 0x58B3, 0xBC59, 0x589C, 0xBC5A, 0x58AE, + 0xBC5B, 0x58A9, 0xBC5C, 0x58A6, 0xBC5D, 0x596D, 0xBC5E, 0x5B09, + 0xBC5F, 0x5AFB, 0xBC60, 0x5B0B, 0xBC61, 0x5AF5, 0xBC62, 0x5B0C, + 0xBC63, 0x5B08, 0xBC64, 0x5BEE, 0xBC65, 0x5BEC, 0xBC66, 0x5BE9, + 0xBC67, 0x5BEB, 0xBC68, 0x5C64, 0xBC69, 0x5C65, 0xBC6A, 0x5D9D, + 0xBC6B, 0x5D94, 0xBC6C, 0x5E62, 0xBC6D, 0x5E5F, 0xBC6E, 0x5E61, + 0xBC6F, 0x5EE2, 0xBC70, 0x5EDA, 0xBC71, 0x5EDF, 0xBC72, 0x5EDD, + 0xBC73, 0x5EE3, 0xBC74, 0x5EE0, 0xBC75, 0x5F48, 0xBC76, 0x5F71, + 0xBC77, 0x5FB7, 0xBC78, 0x5FB5, 0xBC79, 0x6176, 0xBC7A, 0x6167, + 0xBC7B, 0x616E, 0xBC7C, 0x615D, 0xBC7D, 0x6155, 0xBC7E, 0x6182, + 0xBCA1, 0x617C, 0xBCA2, 0x6170, 0xBCA3, 0x616B, 0xBCA4, 0x617E, + 0xBCA5, 0x61A7, 0xBCA6, 0x6190, 0xBCA7, 0x61AB, 0xBCA8, 0x618E, + 0xBCA9, 0x61AC, 0xBCAA, 0x619A, 0xBCAB, 0x61A4, 0xBCAC, 0x6194, + 0xBCAD, 0x61AE, 0xBCAE, 0x622E, 0xBCAF, 0x6469, 0xBCB0, 0x646F, + 0xBCB1, 0x6479, 0xBCB2, 0x649E, 0xBCB3, 0x64B2, 0xBCB4, 0x6488, + 0xBCB5, 0x6490, 0xBCB6, 0x64B0, 0xBCB7, 0x64A5, 0xBCB8, 0x6493, + 0xBCB9, 0x6495, 0xBCBA, 0x64A9, 0xBCBB, 0x6492, 0xBCBC, 0x64AE, + 0xBCBD, 0x64AD, 0xBCBE, 0x64AB, 0xBCBF, 0x649A, 0xBCC0, 0x64AC, + 0xBCC1, 0x6499, 0xBCC2, 0x64A2, 0xBCC3, 0x64B3, 0xBCC4, 0x6575, + 0xBCC5, 0x6577, 0xBCC6, 0x6578, 0xBCC7, 0x66AE, 0xBCC8, 0x66AB, + 0xBCC9, 0x66B4, 0xBCCA, 0x66B1, 0xBCCB, 0x6A23, 0xBCCC, 0x6A1F, + 0xBCCD, 0x69E8, 0xBCCE, 0x6A01, 0xBCCF, 0x6A1E, 0xBCD0, 0x6A19, + 0xBCD1, 0x69FD, 0xBCD2, 0x6A21, 0xBCD3, 0x6A13, 0xBCD4, 0x6A0A, + 0xBCD5, 0x69F3, 0xBCD6, 0x6A02, 0xBCD7, 0x6A05, 0xBCD8, 0x69ED, + 0xBCD9, 0x6A11, 0xBCDA, 0x6B50, 0xBCDB, 0x6B4E, 0xBCDC, 0x6BA4, + 0xBCDD, 0x6BC5, 0xBCDE, 0x6BC6, 0xBCDF, 0x6F3F, 0xBCE0, 0x6F7C, + 0xBCE1, 0x6F84, 0xBCE2, 0x6F51, 0xBCE3, 0x6F66, 0xBCE4, 0x6F54, + 0xBCE5, 0x6F86, 0xBCE6, 0x6F6D, 0xBCE7, 0x6F5B, 0xBCE8, 0x6F78, + 0xBCE9, 0x6F6E, 0xBCEA, 0x6F8E, 0xBCEB, 0x6F7A, 0xBCEC, 0x6F70, + 0xBCED, 0x6F64, 0xBCEE, 0x6F97, 0xBCEF, 0x6F58, 0xBCF0, 0x6ED5, + 0xBCF1, 0x6F6F, 0xBCF2, 0x6F60, 0xBCF3, 0x6F5F, 0xBCF4, 0x719F, + 0xBCF5, 0x71AC, 0xBCF6, 0x71B1, 0xBCF7, 0x71A8, 0xBCF8, 0x7256, + 0xBCF9, 0x729B, 0xBCFA, 0x734E, 0xBCFB, 0x7357, 0xBCFC, 0x7469, + 0xBCFD, 0x748B, 0xBCFE, 0x7483, 0xBD40, 0x747E, 0xBD41, 0x7480, + 0xBD42, 0x757F, 0xBD43, 0x7620, 0xBD44, 0x7629, 0xBD45, 0x761F, + 0xBD46, 0x7624, 0xBD47, 0x7626, 0xBD48, 0x7621, 0xBD49, 0x7622, + 0xBD4A, 0x769A, 0xBD4B, 0x76BA, 0xBD4C, 0x76E4, 0xBD4D, 0x778E, + 0xBD4E, 0x7787, 0xBD4F, 0x778C, 0xBD50, 0x7791, 0xBD51, 0x778B, + 0xBD52, 0x78CB, 0xBD53, 0x78C5, 0xBD54, 0x78BA, 0xBD55, 0x78CA, + 0xBD56, 0x78BE, 0xBD57, 0x78D5, 0xBD58, 0x78BC, 0xBD59, 0x78D0, + 0xBD5A, 0x7A3F, 0xBD5B, 0x7A3C, 0xBD5C, 0x7A40, 0xBD5D, 0x7A3D, + 0xBD5E, 0x7A37, 0xBD5F, 0x7A3B, 0xBD60, 0x7AAF, 0xBD61, 0x7AAE, + 0xBD62, 0x7BAD, 0xBD63, 0x7BB1, 0xBD64, 0x7BC4, 0xBD65, 0x7BB4, + 0xBD66, 0x7BC6, 0xBD67, 0x7BC7, 0xBD68, 0x7BC1, 0xBD69, 0x7BA0, + 0xBD6A, 0x7BCC, 0xBD6B, 0x7CCA, 0xBD6C, 0x7DE0, 0xBD6D, 0x7DF4, + 0xBD6E, 0x7DEF, 0xBD6F, 0x7DFB, 0xBD70, 0x7DD8, 0xBD71, 0x7DEC, + 0xBD72, 0x7DDD, 0xBD73, 0x7DE8, 0xBD74, 0x7DE3, 0xBD75, 0x7DDA, + 0xBD76, 0x7DDE, 0xBD77, 0x7DE9, 0xBD78, 0x7D9E, 0xBD79, 0x7DD9, + 0xBD7A, 0x7DF2, 0xBD7B, 0x7DF9, 0xBD7C, 0x7F75, 0xBD7D, 0x7F77, + 0xBD7E, 0x7FAF, 0xBDA1, 0x7FE9, 0xBDA2, 0x8026, 0xBDA3, 0x819B, + 0xBDA4, 0x819C, 0xBDA5, 0x819D, 0xBDA6, 0x81A0, 0xBDA7, 0x819A, + 0xBDA8, 0x8198, 0xBDA9, 0x8517, 0xBDAA, 0x853D, 0xBDAB, 0x851A, + 0xBDAC, 0x84EE, 0xBDAD, 0x852C, 0xBDAE, 0x852D, 0xBDAF, 0x8513, + 0xBDB0, 0x8511, 0xBDB1, 0x8523, 0xBDB2, 0x8521, 0xBDB3, 0x8514, + 0xBDB4, 0x84EC, 0xBDB5, 0x8525, 0xBDB6, 0x84FF, 0xBDB7, 0x8506, + 0xBDB8, 0x8782, 0xBDB9, 0x8774, 0xBDBA, 0x8776, 0xBDBB, 0x8760, + 0xBDBC, 0x8766, 0xBDBD, 0x8778, 0xBDBE, 0x8768, 0xBDBF, 0x8759, + 0xBDC0, 0x8757, 0xBDC1, 0x874C, 0xBDC2, 0x8753, 0xBDC3, 0x885B, + 0xBDC4, 0x885D, 0xBDC5, 0x8910, 0xBDC6, 0x8907, 0xBDC7, 0x8912, + 0xBDC8, 0x8913, 0xBDC9, 0x8915, 0xBDCA, 0x890A, 0xBDCB, 0x8ABC, + 0xBDCC, 0x8AD2, 0xBDCD, 0x8AC7, 0xBDCE, 0x8AC4, 0xBDCF, 0x8A95, + 0xBDD0, 0x8ACB, 0xBDD1, 0x8AF8, 0xBDD2, 0x8AB2, 0xBDD3, 0x8AC9, + 0xBDD4, 0x8AC2, 0xBDD5, 0x8ABF, 0xBDD6, 0x8AB0, 0xBDD7, 0x8AD6, + 0xBDD8, 0x8ACD, 0xBDD9, 0x8AB6, 0xBDDA, 0x8AB9, 0xBDDB, 0x8ADB, + 0xBDDC, 0x8C4C, 0xBDDD, 0x8C4E, 0xBDDE, 0x8C6C, 0xBDDF, 0x8CE0, + 0xBDE0, 0x8CDE, 0xBDE1, 0x8CE6, 0xBDE2, 0x8CE4, 0xBDE3, 0x8CEC, + 0xBDE4, 0x8CED, 0xBDE5, 0x8CE2, 0xBDE6, 0x8CE3, 0xBDE7, 0x8CDC, + 0xBDE8, 0x8CEA, 0xBDE9, 0x8CE1, 0xBDEA, 0x8D6D, 0xBDEB, 0x8D9F, + 0xBDEC, 0x8DA3, 0xBDED, 0x8E2B, 0xBDEE, 0x8E10, 0xBDEF, 0x8E1D, + 0xBDF0, 0x8E22, 0xBDF1, 0x8E0F, 0xBDF2, 0x8E29, 0xBDF3, 0x8E1F, + 0xBDF4, 0x8E21, 0xBDF5, 0x8E1E, 0xBDF6, 0x8EBA, 0xBDF7, 0x8F1D, + 0xBDF8, 0x8F1B, 0xBDF9, 0x8F1F, 0xBDFA, 0x8F29, 0xBDFB, 0x8F26, + 0xBDFC, 0x8F2A, 0xBDFD, 0x8F1C, 0xBDFE, 0x8F1E, 0xBE40, 0x8F25, + 0xBE41, 0x9069, 0xBE42, 0x906E, 0xBE43, 0x9068, 0xBE44, 0x906D, + 0xBE45, 0x9077, 0xBE46, 0x9130, 0xBE47, 0x912D, 0xBE48, 0x9127, + 0xBE49, 0x9131, 0xBE4A, 0x9187, 0xBE4B, 0x9189, 0xBE4C, 0x918B, + 0xBE4D, 0x9183, 0xBE4E, 0x92C5, 0xBE4F, 0x92BB, 0xBE50, 0x92B7, + 0xBE51, 0x92EA, 0xBE52, 0x92AC, 0xBE53, 0x92E4, 0xBE54, 0x92C1, + 0xBE55, 0x92B3, 0xBE56, 0x92BC, 0xBE57, 0x92D2, 0xBE58, 0x92C7, + 0xBE59, 0x92F0, 0xBE5A, 0x92B2, 0xBE5B, 0x95AD, 0xBE5C, 0x95B1, + 0xBE5D, 0x9704, 0xBE5E, 0x9706, 0xBE5F, 0x9707, 0xBE60, 0x9709, + 0xBE61, 0x9760, 0xBE62, 0x978D, 0xBE63, 0x978B, 0xBE64, 0x978F, + 0xBE65, 0x9821, 0xBE66, 0x982B, 0xBE67, 0x981C, 0xBE68, 0x98B3, + 0xBE69, 0x990A, 0xBE6A, 0x9913, 0xBE6B, 0x9912, 0xBE6C, 0x9918, + 0xBE6D, 0x99DD, 0xBE6E, 0x99D0, 0xBE6F, 0x99DF, 0xBE70, 0x99DB, + 0xBE71, 0x99D1, 0xBE72, 0x99D5, 0xBE73, 0x99D2, 0xBE74, 0x99D9, + 0xBE75, 0x9AB7, 0xBE76, 0x9AEE, 0xBE77, 0x9AEF, 0xBE78, 0x9B27, + 0xBE79, 0x9B45, 0xBE7A, 0x9B44, 0xBE7B, 0x9B77, 0xBE7C, 0x9B6F, + 0xBE7D, 0x9D06, 0xBE7E, 0x9D09, 0xBEA1, 0x9D03, 0xBEA2, 0x9EA9, + 0xBEA3, 0x9EBE, 0xBEA4, 0x9ECE, 0xBEA5, 0x58A8, 0xBEA6, 0x9F52, + 0xBEA7, 0x5112, 0xBEA8, 0x5118, 0xBEA9, 0x5114, 0xBEAA, 0x5110, + 0xBEAB, 0x5115, 0xBEAC, 0x5180, 0xBEAD, 0x51AA, 0xBEAE, 0x51DD, + 0xBEAF, 0x5291, 0xBEB0, 0x5293, 0xBEB1, 0x52F3, 0xBEB2, 0x5659, + 0xBEB3, 0x566B, 0xBEB4, 0x5679, 0xBEB5, 0x5669, 0xBEB6, 0x5664, + 0xBEB7, 0x5678, 0xBEB8, 0x566A, 0xBEB9, 0x5668, 0xBEBA, 0x5665, + 0xBEBB, 0x5671, 0xBEBC, 0x566F, 0xBEBD, 0x566C, 0xBEBE, 0x5662, + 0xBEBF, 0x5676, 0xBEC0, 0x58C1, 0xBEC1, 0x58BE, 0xBEC2, 0x58C7, + 0xBEC3, 0x58C5, 0xBEC4, 0x596E, 0xBEC5, 0x5B1D, 0xBEC6, 0x5B34, + 0xBEC7, 0x5B78, 0xBEC8, 0x5BF0, 0xBEC9, 0x5C0E, 0xBECA, 0x5F4A, + 0xBECB, 0x61B2, 0xBECC, 0x6191, 0xBECD, 0x61A9, 0xBECE, 0x618A, + 0xBECF, 0x61CD, 0xBED0, 0x61B6, 0xBED1, 0x61BE, 0xBED2, 0x61CA, + 0xBED3, 0x61C8, 0xBED4, 0x6230, 0xBED5, 0x64C5, 0xBED6, 0x64C1, + 0xBED7, 0x64CB, 0xBED8, 0x64BB, 0xBED9, 0x64BC, 0xBEDA, 0x64DA, + 0xBEDB, 0x64C4, 0xBEDC, 0x64C7, 0xBEDD, 0x64C2, 0xBEDE, 0x64CD, + 0xBEDF, 0x64BF, 0xBEE0, 0x64D2, 0xBEE1, 0x64D4, 0xBEE2, 0x64BE, + 0xBEE3, 0x6574, 0xBEE4, 0x66C6, 0xBEE5, 0x66C9, 0xBEE6, 0x66B9, + 0xBEE7, 0x66C4, 0xBEE8, 0x66C7, 0xBEE9, 0x66B8, 0xBEEA, 0x6A3D, + 0xBEEB, 0x6A38, 0xBEEC, 0x6A3A, 0xBEED, 0x6A59, 0xBEEE, 0x6A6B, + 0xBEEF, 0x6A58, 0xBEF0, 0x6A39, 0xBEF1, 0x6A44, 0xBEF2, 0x6A62, + 0xBEF3, 0x6A61, 0xBEF4, 0x6A4B, 0xBEF5, 0x6A47, 0xBEF6, 0x6A35, + 0xBEF7, 0x6A5F, 0xBEF8, 0x6A48, 0xBEF9, 0x6B59, 0xBEFA, 0x6B77, + 0xBEFB, 0x6C05, 0xBEFC, 0x6FC2, 0xBEFD, 0x6FB1, 0xBEFE, 0x6FA1, + 0xBF40, 0x6FC3, 0xBF41, 0x6FA4, 0xBF42, 0x6FC1, 0xBF43, 0x6FA7, + 0xBF44, 0x6FB3, 0xBF45, 0x6FC0, 0xBF46, 0x6FB9, 0xBF47, 0x6FB6, + 0xBF48, 0x6FA6, 0xBF49, 0x6FA0, 0xBF4A, 0x6FB4, 0xBF4B, 0x71BE, + 0xBF4C, 0x71C9, 0xBF4D, 0x71D0, 0xBF4E, 0x71D2, 0xBF4F, 0x71C8, + 0xBF50, 0x71D5, 0xBF51, 0x71B9, 0xBF52, 0x71CE, 0xBF53, 0x71D9, + 0xBF54, 0x71DC, 0xBF55, 0x71C3, 0xBF56, 0x71C4, 0xBF57, 0x7368, + 0xBF58, 0x749C, 0xBF59, 0x74A3, 0xBF5A, 0x7498, 0xBF5B, 0x749F, + 0xBF5C, 0x749E, 0xBF5D, 0x74E2, 0xBF5E, 0x750C, 0xBF5F, 0x750D, + 0xBF60, 0x7634, 0xBF61, 0x7638, 0xBF62, 0x763A, 0xBF63, 0x76E7, + 0xBF64, 0x76E5, 0xBF65, 0x77A0, 0xBF66, 0x779E, 0xBF67, 0x779F, + 0xBF68, 0x77A5, 0xBF69, 0x78E8, 0xBF6A, 0x78DA, 0xBF6B, 0x78EC, + 0xBF6C, 0x78E7, 0xBF6D, 0x79A6, 0xBF6E, 0x7A4D, 0xBF6F, 0x7A4E, + 0xBF70, 0x7A46, 0xBF71, 0x7A4C, 0xBF72, 0x7A4B, 0xBF73, 0x7ABA, + 0xBF74, 0x7BD9, 0xBF75, 0x7C11, 0xBF76, 0x7BC9, 0xBF77, 0x7BE4, + 0xBF78, 0x7BDB, 0xBF79, 0x7BE1, 0xBF7A, 0x7BE9, 0xBF7B, 0x7BE6, + 0xBF7C, 0x7CD5, 0xBF7D, 0x7CD6, 0xBF7E, 0x7E0A, 0xBFA1, 0x7E11, + 0xBFA2, 0x7E08, 0xBFA3, 0x7E1B, 0xBFA4, 0x7E23, 0xBFA5, 0x7E1E, + 0xBFA6, 0x7E1D, 0xBFA7, 0x7E09, 0xBFA8, 0x7E10, 0xBFA9, 0x7F79, + 0xBFAA, 0x7FB2, 0xBFAB, 0x7FF0, 0xBFAC, 0x7FF1, 0xBFAD, 0x7FEE, + 0xBFAE, 0x8028, 0xBFAF, 0x81B3, 0xBFB0, 0x81A9, 0xBFB1, 0x81A8, + 0xBFB2, 0x81FB, 0xBFB3, 0x8208, 0xBFB4, 0x8258, 0xBFB5, 0x8259, + 0xBFB6, 0x854A, 0xBFB7, 0x8559, 0xBFB8, 0x8548, 0xBFB9, 0x8568, + 0xBFBA, 0x8569, 0xBFBB, 0x8543, 0xBFBC, 0x8549, 0xBFBD, 0x856D, + 0xBFBE, 0x856A, 0xBFBF, 0x855E, 0xBFC0, 0x8783, 0xBFC1, 0x879F, + 0xBFC2, 0x879E, 0xBFC3, 0x87A2, 0xBFC4, 0x878D, 0xBFC5, 0x8861, + 0xBFC6, 0x892A, 0xBFC7, 0x8932, 0xBFC8, 0x8925, 0xBFC9, 0x892B, + 0xBFCA, 0x8921, 0xBFCB, 0x89AA, 0xBFCC, 0x89A6, 0xBFCD, 0x8AE6, + 0xBFCE, 0x8AFA, 0xBFCF, 0x8AEB, 0xBFD0, 0x8AF1, 0xBFD1, 0x8B00, + 0xBFD2, 0x8ADC, 0xBFD3, 0x8AE7, 0xBFD4, 0x8AEE, 0xBFD5, 0x8AFE, + 0xBFD6, 0x8B01, 0xBFD7, 0x8B02, 0xBFD8, 0x8AF7, 0xBFD9, 0x8AED, + 0xBFDA, 0x8AF3, 0xBFDB, 0x8AF6, 0xBFDC, 0x8AFC, 0xBFDD, 0x8C6B, + 0xBFDE, 0x8C6D, 0xBFDF, 0x8C93, 0xBFE0, 0x8CF4, 0xBFE1, 0x8E44, + 0xBFE2, 0x8E31, 0xBFE3, 0x8E34, 0xBFE4, 0x8E42, 0xBFE5, 0x8E39, + 0xBFE6, 0x8E35, 0xBFE7, 0x8F3B, 0xBFE8, 0x8F2F, 0xBFE9, 0x8F38, + 0xBFEA, 0x8F33, 0xBFEB, 0x8FA8, 0xBFEC, 0x8FA6, 0xBFED, 0x9075, + 0xBFEE, 0x9074, 0xBFEF, 0x9078, 0xBFF0, 0x9072, 0xBFF1, 0x907C, + 0xBFF2, 0x907A, 0xBFF3, 0x9134, 0xBFF4, 0x9192, 0xBFF5, 0x9320, + 0xBFF6, 0x9336, 0xBFF7, 0x92F8, 0xBFF8, 0x9333, 0xBFF9, 0x932F, + 0xBFFA, 0x9322, 0xBFFB, 0x92FC, 0xBFFC, 0x932B, 0xBFFD, 0x9304, + 0xBFFE, 0x931A, 0xC040, 0x9310, 0xC041, 0x9326, 0xC042, 0x9321, + 0xC043, 0x9315, 0xC044, 0x932E, 0xC045, 0x9319, 0xC046, 0x95BB, + 0xC047, 0x96A7, 0xC048, 0x96A8, 0xC049, 0x96AA, 0xC04A, 0x96D5, + 0xC04B, 0x970E, 0xC04C, 0x9711, 0xC04D, 0x9716, 0xC04E, 0x970D, + 0xC04F, 0x9713, 0xC050, 0x970F, 0xC051, 0x975B, 0xC052, 0x975C, + 0xC053, 0x9766, 0xC054, 0x9798, 0xC055, 0x9830, 0xC056, 0x9838, + 0xC057, 0x983B, 0xC058, 0x9837, 0xC059, 0x982D, 0xC05A, 0x9839, + 0xC05B, 0x9824, 0xC05C, 0x9910, 0xC05D, 0x9928, 0xC05E, 0x991E, + 0xC05F, 0x991B, 0xC060, 0x9921, 0xC061, 0x991A, 0xC062, 0x99ED, + 0xC063, 0x99E2, 0xC064, 0x99F1, 0xC065, 0x9AB8, 0xC066, 0x9ABC, + 0xC067, 0x9AFB, 0xC068, 0x9AED, 0xC069, 0x9B28, 0xC06A, 0x9B91, + 0xC06B, 0x9D15, 0xC06C, 0x9D23, 0xC06D, 0x9D26, 0xC06E, 0x9D28, + 0xC06F, 0x9D12, 0xC070, 0x9D1B, 0xC071, 0x9ED8, 0xC072, 0x9ED4, + 0xC073, 0x9F8D, 0xC074, 0x9F9C, 0xC075, 0x512A, 0xC076, 0x511F, + 0xC077, 0x5121, 0xC078, 0x5132, 0xC079, 0x52F5, 0xC07A, 0x568E, + 0xC07B, 0x5680, 0xC07C, 0x5690, 0xC07D, 0x5685, 0xC07E, 0x5687, + 0xC0A1, 0x568F, 0xC0A2, 0x58D5, 0xC0A3, 0x58D3, 0xC0A4, 0x58D1, + 0xC0A5, 0x58CE, 0xC0A6, 0x5B30, 0xC0A7, 0x5B2A, 0xC0A8, 0x5B24, + 0xC0A9, 0x5B7A, 0xC0AA, 0x5C37, 0xC0AB, 0x5C68, 0xC0AC, 0x5DBC, + 0xC0AD, 0x5DBA, 0xC0AE, 0x5DBD, 0xC0AF, 0x5DB8, 0xC0B0, 0x5E6B, + 0xC0B1, 0x5F4C, 0xC0B2, 0x5FBD, 0xC0B3, 0x61C9, 0xC0B4, 0x61C2, + 0xC0B5, 0x61C7, 0xC0B6, 0x61E6, 0xC0B7, 0x61CB, 0xC0B8, 0x6232, + 0xC0B9, 0x6234, 0xC0BA, 0x64CE, 0xC0BB, 0x64CA, 0xC0BC, 0x64D8, + 0xC0BD, 0x64E0, 0xC0BE, 0x64F0, 0xC0BF, 0x64E6, 0xC0C0, 0x64EC, + 0xC0C1, 0x64F1, 0xC0C2, 0x64E2, 0xC0C3, 0x64ED, 0xC0C4, 0x6582, + 0xC0C5, 0x6583, 0xC0C6, 0x66D9, 0xC0C7, 0x66D6, 0xC0C8, 0x6A80, + 0xC0C9, 0x6A94, 0xC0CA, 0x6A84, 0xC0CB, 0x6AA2, 0xC0CC, 0x6A9C, + 0xC0CD, 0x6ADB, 0xC0CE, 0x6AA3, 0xC0CF, 0x6A7E, 0xC0D0, 0x6A97, + 0xC0D1, 0x6A90, 0xC0D2, 0x6AA0, 0xC0D3, 0x6B5C, 0xC0D4, 0x6BAE, + 0xC0D5, 0x6BDA, 0xC0D6, 0x6C08, 0xC0D7, 0x6FD8, 0xC0D8, 0x6FF1, + 0xC0D9, 0x6FDF, 0xC0DA, 0x6FE0, 0xC0DB, 0x6FDB, 0xC0DC, 0x6FE4, + 0xC0DD, 0x6FEB, 0xC0DE, 0x6FEF, 0xC0DF, 0x6F80, 0xC0E0, 0x6FEC, + 0xC0E1, 0x6FE1, 0xC0E2, 0x6FE9, 0xC0E3, 0x6FD5, 0xC0E4, 0x6FEE, + 0xC0E5, 0x6FF0, 0xC0E6, 0x71E7, 0xC0E7, 0x71DF, 0xC0E8, 0x71EE, + 0xC0E9, 0x71E6, 0xC0EA, 0x71E5, 0xC0EB, 0x71ED, 0xC0EC, 0x71EC, + 0xC0ED, 0x71F4, 0xC0EE, 0x71E0, 0xC0EF, 0x7235, 0xC0F0, 0x7246, + 0xC0F1, 0x7370, 0xC0F2, 0x7372, 0xC0F3, 0x74A9, 0xC0F4, 0x74B0, + 0xC0F5, 0x74A6, 0xC0F6, 0x74A8, 0xC0F7, 0x7646, 0xC0F8, 0x7642, + 0xC0F9, 0x764C, 0xC0FA, 0x76EA, 0xC0FB, 0x77B3, 0xC0FC, 0x77AA, + 0xC0FD, 0x77B0, 0xC0FE, 0x77AC, 0xC140, 0x77A7, 0xC141, 0x77AD, + 0xC142, 0x77EF, 0xC143, 0x78F7, 0xC144, 0x78FA, 0xC145, 0x78F4, + 0xC146, 0x78EF, 0xC147, 0x7901, 0xC148, 0x79A7, 0xC149, 0x79AA, + 0xC14A, 0x7A57, 0xC14B, 0x7ABF, 0xC14C, 0x7C07, 0xC14D, 0x7C0D, + 0xC14E, 0x7BFE, 0xC14F, 0x7BF7, 0xC150, 0x7C0C, 0xC151, 0x7BE0, + 0xC152, 0x7CE0, 0xC153, 0x7CDC, 0xC154, 0x7CDE, 0xC155, 0x7CE2, + 0xC156, 0x7CDF, 0xC157, 0x7CD9, 0xC158, 0x7CDD, 0xC159, 0x7E2E, + 0xC15A, 0x7E3E, 0xC15B, 0x7E46, 0xC15C, 0x7E37, 0xC15D, 0x7E32, + 0xC15E, 0x7E43, 0xC15F, 0x7E2B, 0xC160, 0x7E3D, 0xC161, 0x7E31, + 0xC162, 0x7E45, 0xC163, 0x7E41, 0xC164, 0x7E34, 0xC165, 0x7E39, + 0xC166, 0x7E48, 0xC167, 0x7E35, 0xC168, 0x7E3F, 0xC169, 0x7E2F, + 0xC16A, 0x7F44, 0xC16B, 0x7FF3, 0xC16C, 0x7FFC, 0xC16D, 0x8071, + 0xC16E, 0x8072, 0xC16F, 0x8070, 0xC170, 0x806F, 0xC171, 0x8073, + 0xC172, 0x81C6, 0xC173, 0x81C3, 0xC174, 0x81BA, 0xC175, 0x81C2, + 0xC176, 0x81C0, 0xC177, 0x81BF, 0xC178, 0x81BD, 0xC179, 0x81C9, + 0xC17A, 0x81BE, 0xC17B, 0x81E8, 0xC17C, 0x8209, 0xC17D, 0x8271, + 0xC17E, 0x85AA, 0xC1A1, 0x8584, 0xC1A2, 0x857E, 0xC1A3, 0x859C, + 0xC1A4, 0x8591, 0xC1A5, 0x8594, 0xC1A6, 0x85AF, 0xC1A7, 0x859B, + 0xC1A8, 0x8587, 0xC1A9, 0x85A8, 0xC1AA, 0x858A, 0xC1AB, 0x8667, + 0xC1AC, 0x87C0, 0xC1AD, 0x87D1, 0xC1AE, 0x87B3, 0xC1AF, 0x87D2, + 0xC1B0, 0x87C6, 0xC1B1, 0x87AB, 0xC1B2, 0x87BB, 0xC1B3, 0x87BA, + 0xC1B4, 0x87C8, 0xC1B5, 0x87CB, 0xC1B6, 0x893B, 0xC1B7, 0x8936, + 0xC1B8, 0x8944, 0xC1B9, 0x8938, 0xC1BA, 0x893D, 0xC1BB, 0x89AC, + 0xC1BC, 0x8B0E, 0xC1BD, 0x8B17, 0xC1BE, 0x8B19, 0xC1BF, 0x8B1B, + 0xC1C0, 0x8B0A, 0xC1C1, 0x8B20, 0xC1C2, 0x8B1D, 0xC1C3, 0x8B04, + 0xC1C4, 0x8B10, 0xC1C5, 0x8C41, 0xC1C6, 0x8C3F, 0xC1C7, 0x8C73, + 0xC1C8, 0x8CFA, 0xC1C9, 0x8CFD, 0xC1CA, 0x8CFC, 0xC1CB, 0x8CF8, + 0xC1CC, 0x8CFB, 0xC1CD, 0x8DA8, 0xC1CE, 0x8E49, 0xC1CF, 0x8E4B, + 0xC1D0, 0x8E48, 0xC1D1, 0x8E4A, 0xC1D2, 0x8F44, 0xC1D3, 0x8F3E, + 0xC1D4, 0x8F42, 0xC1D5, 0x8F45, 0xC1D6, 0x8F3F, 0xC1D7, 0x907F, + 0xC1D8, 0x907D, 0xC1D9, 0x9084, 0xC1DA, 0x9081, 0xC1DB, 0x9082, + 0xC1DC, 0x9080, 0xC1DD, 0x9139, 0xC1DE, 0x91A3, 0xC1DF, 0x919E, + 0xC1E0, 0x919C, 0xC1E1, 0x934D, 0xC1E2, 0x9382, 0xC1E3, 0x9328, + 0xC1E4, 0x9375, 0xC1E5, 0x934A, 0xC1E6, 0x9365, 0xC1E7, 0x934B, + 0xC1E8, 0x9318, 0xC1E9, 0x937E, 0xC1EA, 0x936C, 0xC1EB, 0x935B, + 0xC1EC, 0x9370, 0xC1ED, 0x935A, 0xC1EE, 0x9354, 0xC1EF, 0x95CA, + 0xC1F0, 0x95CB, 0xC1F1, 0x95CC, 0xC1F2, 0x95C8, 0xC1F3, 0x95C6, + 0xC1F4, 0x96B1, 0xC1F5, 0x96B8, 0xC1F6, 0x96D6, 0xC1F7, 0x971C, + 0xC1F8, 0x971E, 0xC1F9, 0x97A0, 0xC1FA, 0x97D3, 0xC1FB, 0x9846, + 0xC1FC, 0x98B6, 0xC1FD, 0x9935, 0xC1FE, 0x9A01, 0xC240, 0x99FF, + 0xC241, 0x9BAE, 0xC242, 0x9BAB, 0xC243, 0x9BAA, 0xC244, 0x9BAD, + 0xC245, 0x9D3B, 0xC246, 0x9D3F, 0xC247, 0x9E8B, 0xC248, 0x9ECF, + 0xC249, 0x9EDE, 0xC24A, 0x9EDC, 0xC24B, 0x9EDD, 0xC24C, 0x9EDB, + 0xC24D, 0x9F3E, 0xC24E, 0x9F4B, 0xC24F, 0x53E2, 0xC250, 0x5695, + 0xC251, 0x56AE, 0xC252, 0x58D9, 0xC253, 0x58D8, 0xC254, 0x5B38, + 0xC255, 0x5F5D, 0xC256, 0x61E3, 0xC257, 0x6233, 0xC258, 0x64F4, + 0xC259, 0x64F2, 0xC25A, 0x64FE, 0xC25B, 0x6506, 0xC25C, 0x64FA, + 0xC25D, 0x64FB, 0xC25E, 0x64F7, 0xC25F, 0x65B7, 0xC260, 0x66DC, + 0xC261, 0x6726, 0xC262, 0x6AB3, 0xC263, 0x6AAC, 0xC264, 0x6AC3, + 0xC265, 0x6ABB, 0xC266, 0x6AB8, 0xC267, 0x6AC2, 0xC268, 0x6AAE, + 0xC269, 0x6AAF, 0xC26A, 0x6B5F, 0xC26B, 0x6B78, 0xC26C, 0x6BAF, + 0xC26D, 0x7009, 0xC26E, 0x700B, 0xC26F, 0x6FFE, 0xC270, 0x7006, + 0xC271, 0x6FFA, 0xC272, 0x7011, 0xC273, 0x700F, 0xC274, 0x71FB, + 0xC275, 0x71FC, 0xC276, 0x71FE, 0xC277, 0x71F8, 0xC278, 0x7377, + 0xC279, 0x7375, 0xC27A, 0x74A7, 0xC27B, 0x74BF, 0xC27C, 0x7515, + 0xC27D, 0x7656, 0xC27E, 0x7658, 0xC2A1, 0x7652, 0xC2A2, 0x77BD, + 0xC2A3, 0x77BF, 0xC2A4, 0x77BB, 0xC2A5, 0x77BC, 0xC2A6, 0x790E, + 0xC2A7, 0x79AE, 0xC2A8, 0x7A61, 0xC2A9, 0x7A62, 0xC2AA, 0x7A60, + 0xC2AB, 0x7AC4, 0xC2AC, 0x7AC5, 0xC2AD, 0x7C2B, 0xC2AE, 0x7C27, + 0xC2AF, 0x7C2A, 0xC2B0, 0x7C1E, 0xC2B1, 0x7C23, 0xC2B2, 0x7C21, + 0xC2B3, 0x7CE7, 0xC2B4, 0x7E54, 0xC2B5, 0x7E55, 0xC2B6, 0x7E5E, + 0xC2B7, 0x7E5A, 0xC2B8, 0x7E61, 0xC2B9, 0x7E52, 0xC2BA, 0x7E59, + 0xC2BB, 0x7F48, 0xC2BC, 0x7FF9, 0xC2BD, 0x7FFB, 0xC2BE, 0x8077, + 0xC2BF, 0x8076, 0xC2C0, 0x81CD, 0xC2C1, 0x81CF, 0xC2C2, 0x820A, + 0xC2C3, 0x85CF, 0xC2C4, 0x85A9, 0xC2C5, 0x85CD, 0xC2C6, 0x85D0, + 0xC2C7, 0x85C9, 0xC2C8, 0x85B0, 0xC2C9, 0x85BA, 0xC2CA, 0x85B9, + 0xC2CB, 0x85A6, 0xC2CC, 0x87EF, 0xC2CD, 0x87EC, 0xC2CE, 0x87F2, + 0xC2CF, 0x87E0, 0xC2D0, 0x8986, 0xC2D1, 0x89B2, 0xC2D2, 0x89F4, + 0xC2D3, 0x8B28, 0xC2D4, 0x8B39, 0xC2D5, 0x8B2C, 0xC2D6, 0x8B2B, + 0xC2D7, 0x8C50, 0xC2D8, 0x8D05, 0xC2D9, 0x8E59, 0xC2DA, 0x8E63, + 0xC2DB, 0x8E66, 0xC2DC, 0x8E64, 0xC2DD, 0x8E5F, 0xC2DE, 0x8E55, + 0xC2DF, 0x8EC0, 0xC2E0, 0x8F49, 0xC2E1, 0x8F4D, 0xC2E2, 0x9087, + 0xC2E3, 0x9083, 0xC2E4, 0x9088, 0xC2E5, 0x91AB, 0xC2E6, 0x91AC, + 0xC2E7, 0x91D0, 0xC2E8, 0x9394, 0xC2E9, 0x938A, 0xC2EA, 0x9396, + 0xC2EB, 0x93A2, 0xC2EC, 0x93B3, 0xC2ED, 0x93AE, 0xC2EE, 0x93AC, + 0xC2EF, 0x93B0, 0xC2F0, 0x9398, 0xC2F1, 0x939A, 0xC2F2, 0x9397, + 0xC2F3, 0x95D4, 0xC2F4, 0x95D6, 0xC2F5, 0x95D0, 0xC2F6, 0x95D5, + 0xC2F7, 0x96E2, 0xC2F8, 0x96DC, 0xC2F9, 0x96D9, 0xC2FA, 0x96DB, + 0xC2FB, 0x96DE, 0xC2FC, 0x9724, 0xC2FD, 0x97A3, 0xC2FE, 0x97A6, + 0xC340, 0x97AD, 0xC341, 0x97F9, 0xC342, 0x984D, 0xC343, 0x984F, + 0xC344, 0x984C, 0xC345, 0x984E, 0xC346, 0x9853, 0xC347, 0x98BA, + 0xC348, 0x993E, 0xC349, 0x993F, 0xC34A, 0x993D, 0xC34B, 0x992E, + 0xC34C, 0x99A5, 0xC34D, 0x9A0E, 0xC34E, 0x9AC1, 0xC34F, 0x9B03, + 0xC350, 0x9B06, 0xC351, 0x9B4F, 0xC352, 0x9B4E, 0xC353, 0x9B4D, + 0xC354, 0x9BCA, 0xC355, 0x9BC9, 0xC356, 0x9BFD, 0xC357, 0x9BC8, + 0xC358, 0x9BC0, 0xC359, 0x9D51, 0xC35A, 0x9D5D, 0xC35B, 0x9D60, + 0xC35C, 0x9EE0, 0xC35D, 0x9F15, 0xC35E, 0x9F2C, 0xC35F, 0x5133, + 0xC360, 0x56A5, 0xC361, 0x58DE, 0xC362, 0x58DF, 0xC363, 0x58E2, + 0xC364, 0x5BF5, 0xC365, 0x9F90, 0xC366, 0x5EEC, 0xC367, 0x61F2, + 0xC368, 0x61F7, 0xC369, 0x61F6, 0xC36A, 0x61F5, 0xC36B, 0x6500, + 0xC36C, 0x650F, 0xC36D, 0x66E0, 0xC36E, 0x66DD, 0xC36F, 0x6AE5, + 0xC370, 0x6ADD, 0xC371, 0x6ADA, 0xC372, 0x6AD3, 0xC373, 0x701B, + 0xC374, 0x701F, 0xC375, 0x7028, 0xC376, 0x701A, 0xC377, 0x701D, + 0xC378, 0x7015, 0xC379, 0x7018, 0xC37A, 0x7206, 0xC37B, 0x720D, + 0xC37C, 0x7258, 0xC37D, 0x72A2, 0xC37E, 0x7378, 0xC3A1, 0x737A, + 0xC3A2, 0x74BD, 0xC3A3, 0x74CA, 0xC3A4, 0x74E3, 0xC3A5, 0x7587, + 0xC3A6, 0x7586, 0xC3A7, 0x765F, 0xC3A8, 0x7661, 0xC3A9, 0x77C7, + 0xC3AA, 0x7919, 0xC3AB, 0x79B1, 0xC3AC, 0x7A6B, 0xC3AD, 0x7A69, + 0xC3AE, 0x7C3E, 0xC3AF, 0x7C3F, 0xC3B0, 0x7C38, 0xC3B1, 0x7C3D, + 0xC3B2, 0x7C37, 0xC3B3, 0x7C40, 0xC3B4, 0x7E6B, 0xC3B5, 0x7E6D, + 0xC3B6, 0x7E79, 0xC3B7, 0x7E69, 0xC3B8, 0x7E6A, 0xC3B9, 0x7F85, + 0xC3BA, 0x7E73, 0xC3BB, 0x7FB6, 0xC3BC, 0x7FB9, 0xC3BD, 0x7FB8, + 0xC3BE, 0x81D8, 0xC3BF, 0x85E9, 0xC3C0, 0x85DD, 0xC3C1, 0x85EA, + 0xC3C2, 0x85D5, 0xC3C3, 0x85E4, 0xC3C4, 0x85E5, 0xC3C5, 0x85F7, + 0xC3C6, 0x87FB, 0xC3C7, 0x8805, 0xC3C8, 0x880D, 0xC3C9, 0x87F9, + 0xC3CA, 0x87FE, 0xC3CB, 0x8960, 0xC3CC, 0x895F, 0xC3CD, 0x8956, + 0xC3CE, 0x895E, 0xC3CF, 0x8B41, 0xC3D0, 0x8B5C, 0xC3D1, 0x8B58, + 0xC3D2, 0x8B49, 0xC3D3, 0x8B5A, 0xC3D4, 0x8B4E, 0xC3D5, 0x8B4F, + 0xC3D6, 0x8B46, 0xC3D7, 0x8B59, 0xC3D8, 0x8D08, 0xC3D9, 0x8D0A, + 0xC3DA, 0x8E7C, 0xC3DB, 0x8E72, 0xC3DC, 0x8E87, 0xC3DD, 0x8E76, + 0xC3DE, 0x8E6C, 0xC3DF, 0x8E7A, 0xC3E0, 0x8E74, 0xC3E1, 0x8F54, + 0xC3E2, 0x8F4E, 0xC3E3, 0x8FAD, 0xC3E4, 0x908A, 0xC3E5, 0x908B, + 0xC3E6, 0x91B1, 0xC3E7, 0x91AE, 0xC3E8, 0x93E1, 0xC3E9, 0x93D1, + 0xC3EA, 0x93DF, 0xC3EB, 0x93C3, 0xC3EC, 0x93C8, 0xC3ED, 0x93DC, + 0xC3EE, 0x93DD, 0xC3EF, 0x93D6, 0xC3F0, 0x93E2, 0xC3F1, 0x93CD, + 0xC3F2, 0x93D8, 0xC3F3, 0x93E4, 0xC3F4, 0x93D7, 0xC3F5, 0x93E8, + 0xC3F6, 0x95DC, 0xC3F7, 0x96B4, 0xC3F8, 0x96E3, 0xC3F9, 0x972A, + 0xC3FA, 0x9727, 0xC3FB, 0x9761, 0xC3FC, 0x97DC, 0xC3FD, 0x97FB, + 0xC3FE, 0x985E, 0xC440, 0x9858, 0xC441, 0x985B, 0xC442, 0x98BC, + 0xC443, 0x9945, 0xC444, 0x9949, 0xC445, 0x9A16, 0xC446, 0x9A19, + 0xC447, 0x9B0D, 0xC448, 0x9BE8, 0xC449, 0x9BE7, 0xC44A, 0x9BD6, + 0xC44B, 0x9BDB, 0xC44C, 0x9D89, 0xC44D, 0x9D61, 0xC44E, 0x9D72, + 0xC44F, 0x9D6A, 0xC450, 0x9D6C, 0xC451, 0x9E92, 0xC452, 0x9E97, + 0xC453, 0x9E93, 0xC454, 0x9EB4, 0xC455, 0x52F8, 0xC456, 0x56A8, + 0xC457, 0x56B7, 0xC458, 0x56B6, 0xC459, 0x56B4, 0xC45A, 0x56BC, + 0xC45B, 0x58E4, 0xC45C, 0x5B40, 0xC45D, 0x5B43, 0xC45E, 0x5B7D, + 0xC45F, 0x5BF6, 0xC460, 0x5DC9, 0xC461, 0x61F8, 0xC462, 0x61FA, + 0xC463, 0x6518, 0xC464, 0x6514, 0xC465, 0x6519, 0xC466, 0x66E6, + 0xC467, 0x6727, 0xC468, 0x6AEC, 0xC469, 0x703E, 0xC46A, 0x7030, + 0xC46B, 0x7032, 0xC46C, 0x7210, 0xC46D, 0x737B, 0xC46E, 0x74CF, + 0xC46F, 0x7662, 0xC470, 0x7665, 0xC471, 0x7926, 0xC472, 0x792A, + 0xC473, 0x792C, 0xC474, 0x792B, 0xC475, 0x7AC7, 0xC476, 0x7AF6, + 0xC477, 0x7C4C, 0xC478, 0x7C43, 0xC479, 0x7C4D, 0xC47A, 0x7CEF, + 0xC47B, 0x7CF0, 0xC47C, 0x8FAE, 0xC47D, 0x7E7D, 0xC47E, 0x7E7C, + 0xC4A1, 0x7E82, 0xC4A2, 0x7F4C, 0xC4A3, 0x8000, 0xC4A4, 0x81DA, + 0xC4A5, 0x8266, 0xC4A6, 0x85FB, 0xC4A7, 0x85F9, 0xC4A8, 0x8611, + 0xC4A9, 0x85FA, 0xC4AA, 0x8606, 0xC4AB, 0x860B, 0xC4AC, 0x8607, + 0xC4AD, 0x860A, 0xC4AE, 0x8814, 0xC4AF, 0x8815, 0xC4B0, 0x8964, + 0xC4B1, 0x89BA, 0xC4B2, 0x89F8, 0xC4B3, 0x8B70, 0xC4B4, 0x8B6C, + 0xC4B5, 0x8B66, 0xC4B6, 0x8B6F, 0xC4B7, 0x8B5F, 0xC4B8, 0x8B6B, + 0xC4B9, 0x8D0F, 0xC4BA, 0x8D0D, 0xC4BB, 0x8E89, 0xC4BC, 0x8E81, + 0xC4BD, 0x8E85, 0xC4BE, 0x8E82, 0xC4BF, 0x91B4, 0xC4C0, 0x91CB, + 0xC4C1, 0x9418, 0xC4C2, 0x9403, 0xC4C3, 0x93FD, 0xC4C4, 0x95E1, + 0xC4C5, 0x9730, 0xC4C6, 0x98C4, 0xC4C7, 0x9952, 0xC4C8, 0x9951, + 0xC4C9, 0x99A8, 0xC4CA, 0x9A2B, 0xC4CB, 0x9A30, 0xC4CC, 0x9A37, + 0xC4CD, 0x9A35, 0xC4CE, 0x9C13, 0xC4CF, 0x9C0D, 0xC4D0, 0x9E79, + 0xC4D1, 0x9EB5, 0xC4D2, 0x9EE8, 0xC4D3, 0x9F2F, 0xC4D4, 0x9F5F, + 0xC4D5, 0x9F63, 0xC4D6, 0x9F61, 0xC4D7, 0x5137, 0xC4D8, 0x5138, + 0xC4D9, 0x56C1, 0xC4DA, 0x56C0, 0xC4DB, 0x56C2, 0xC4DC, 0x5914, + 0xC4DD, 0x5C6C, 0xC4DE, 0x5DCD, 0xC4DF, 0x61FC, 0xC4E0, 0x61FE, + 0xC4E1, 0x651D, 0xC4E2, 0x651C, 0xC4E3, 0x6595, 0xC4E4, 0x66E9, + 0xC4E5, 0x6AFB, 0xC4E6, 0x6B04, 0xC4E7, 0x6AFA, 0xC4E8, 0x6BB2, + 0xC4E9, 0x704C, 0xC4EA, 0x721B, 0xC4EB, 0x72A7, 0xC4EC, 0x74D6, + 0xC4ED, 0x74D4, 0xC4EE, 0x7669, 0xC4EF, 0x77D3, 0xC4F0, 0x7C50, + 0xC4F1, 0x7E8F, 0xC4F2, 0x7E8C, 0xC4F3, 0x7FBC, 0xC4F4, 0x8617, + 0xC4F5, 0x862D, 0xC4F6, 0x861A, 0xC4F7, 0x8823, 0xC4F8, 0x8822, + 0xC4F9, 0x8821, 0xC4FA, 0x881F, 0xC4FB, 0x896A, 0xC4FC, 0x896C, + 0xC4FD, 0x89BD, 0xC4FE, 0x8B74, 0xC540, 0x8B77, 0xC541, 0x8B7D, + 0xC542, 0x8D13, 0xC543, 0x8E8A, 0xC544, 0x8E8D, 0xC545, 0x8E8B, + 0xC546, 0x8F5F, 0xC547, 0x8FAF, 0xC548, 0x91BA, 0xC549, 0x942E, + 0xC54A, 0x9433, 0xC54B, 0x9435, 0xC54C, 0x943A, 0xC54D, 0x9438, + 0xC54E, 0x9432, 0xC54F, 0x942B, 0xC550, 0x95E2, 0xC551, 0x9738, + 0xC552, 0x9739, 0xC553, 0x9732, 0xC554, 0x97FF, 0xC555, 0x9867, + 0xC556, 0x9865, 0xC557, 0x9957, 0xC558, 0x9A45, 0xC559, 0x9A43, + 0xC55A, 0x9A40, 0xC55B, 0x9A3E, 0xC55C, 0x9ACF, 0xC55D, 0x9B54, + 0xC55E, 0x9B51, 0xC55F, 0x9C2D, 0xC560, 0x9C25, 0xC561, 0x9DAF, + 0xC562, 0x9DB4, 0xC563, 0x9DC2, 0xC564, 0x9DB8, 0xC565, 0x9E9D, + 0xC566, 0x9EEF, 0xC567, 0x9F19, 0xC568, 0x9F5C, 0xC569, 0x9F66, + 0xC56A, 0x9F67, 0xC56B, 0x513C, 0xC56C, 0x513B, 0xC56D, 0x56C8, + 0xC56E, 0x56CA, 0xC56F, 0x56C9, 0xC570, 0x5B7F, 0xC571, 0x5DD4, + 0xC572, 0x5DD2, 0xC573, 0x5F4E, 0xC574, 0x61FF, 0xC575, 0x6524, + 0xC576, 0x6B0A, 0xC577, 0x6B61, 0xC578, 0x7051, 0xC579, 0x7058, + 0xC57A, 0x7380, 0xC57B, 0x74E4, 0xC57C, 0x758A, 0xC57D, 0x766E, + 0xC57E, 0x766C, 0xC5A1, 0x79B3, 0xC5A2, 0x7C60, 0xC5A3, 0x7C5F, + 0xC5A4, 0x807E, 0xC5A5, 0x807D, 0xC5A6, 0x81DF, 0xC5A7, 0x8972, + 0xC5A8, 0x896F, 0xC5A9, 0x89FC, 0xC5AA, 0x8B80, 0xC5AB, 0x8D16, + 0xC5AC, 0x8D17, 0xC5AD, 0x8E91, 0xC5AE, 0x8E93, 0xC5AF, 0x8F61, + 0xC5B0, 0x9148, 0xC5B1, 0x9444, 0xC5B2, 0x9451, 0xC5B3, 0x9452, + 0xC5B4, 0x973D, 0xC5B5, 0x973E, 0xC5B6, 0x97C3, 0xC5B7, 0x97C1, + 0xC5B8, 0x986B, 0xC5B9, 0x9955, 0xC5BA, 0x9A55, 0xC5BB, 0x9A4D, + 0xC5BC, 0x9AD2, 0xC5BD, 0x9B1A, 0xC5BE, 0x9C49, 0xC5BF, 0x9C31, + 0xC5C0, 0x9C3E, 0xC5C1, 0x9C3B, 0xC5C2, 0x9DD3, 0xC5C3, 0x9DD7, + 0xC5C4, 0x9F34, 0xC5C5, 0x9F6C, 0xC5C6, 0x9F6A, 0xC5C7, 0x9F94, + 0xC5C8, 0x56CC, 0xC5C9, 0x5DD6, 0xC5CA, 0x6200, 0xC5CB, 0x6523, + 0xC5CC, 0x652B, 0xC5CD, 0x652A, 0xC5CE, 0x66EC, 0xC5CF, 0x6B10, + 0xC5D0, 0x74DA, 0xC5D1, 0x7ACA, 0xC5D2, 0x7C64, 0xC5D3, 0x7C63, + 0xC5D4, 0x7C65, 0xC5D5, 0x7E93, 0xC5D6, 0x7E96, 0xC5D7, 0x7E94, + 0xC5D8, 0x81E2, 0xC5D9, 0x8638, 0xC5DA, 0x863F, 0xC5DB, 0x8831, + 0xC5DC, 0x8B8A, 0xC5DD, 0x9090, 0xC5DE, 0x908F, 0xC5DF, 0x9463, + 0xC5E0, 0x9460, 0xC5E1, 0x9464, 0xC5E2, 0x9768, 0xC5E3, 0x986F, + 0xC5E4, 0x995C, 0xC5E5, 0x9A5A, 0xC5E6, 0x9A5B, 0xC5E7, 0x9A57, + 0xC5E8, 0x9AD3, 0xC5E9, 0x9AD4, 0xC5EA, 0x9AD1, 0xC5EB, 0x9C54, + 0xC5EC, 0x9C57, 0xC5ED, 0x9C56, 0xC5EE, 0x9DE5, 0xC5EF, 0x9E9F, + 0xC5F0, 0x9EF4, 0xC5F1, 0x56D1, 0xC5F2, 0x58E9, 0xC5F3, 0x652C, + 0xC5F4, 0x705E, 0xC5F5, 0x7671, 0xC5F6, 0x7672, 0xC5F7, 0x77D7, + 0xC5F8, 0x7F50, 0xC5F9, 0x7F88, 0xC5FA, 0x8836, 0xC5FB, 0x8839, + 0xC5FC, 0x8862, 0xC5FD, 0x8B93, 0xC5FE, 0x8B92, 0xC640, 0x8B96, + 0xC641, 0x8277, 0xC642, 0x8D1B, 0xC643, 0x91C0, 0xC644, 0x946A, + 0xC645, 0x9742, 0xC646, 0x9748, 0xC647, 0x9744, 0xC648, 0x97C6, + 0xC649, 0x9870, 0xC64A, 0x9A5F, 0xC64B, 0x9B22, 0xC64C, 0x9B58, + 0xC64D, 0x9C5F, 0xC64E, 0x9DF9, 0xC64F, 0x9DFA, 0xC650, 0x9E7C, + 0xC651, 0x9E7D, 0xC652, 0x9F07, 0xC653, 0x9F77, 0xC654, 0x9F72, + 0xC655, 0x5EF3, 0xC656, 0x6B16, 0xC657, 0x7063, 0xC658, 0x7C6C, + 0xC659, 0x7C6E, 0xC65A, 0x883B, 0xC65B, 0x89C0, 0xC65C, 0x8EA1, + 0xC65D, 0x91C1, 0xC65E, 0x9472, 0xC65F, 0x9470, 0xC660, 0x9871, + 0xC661, 0x995E, 0xC662, 0x9AD6, 0xC663, 0x9B23, 0xC664, 0x9ECC, + 0xC665, 0x7064, 0xC666, 0x77DA, 0xC667, 0x8B9A, 0xC668, 0x9477, + 0xC669, 0x97C9, 0xC66A, 0x9A62, 0xC66B, 0x9A65, 0xC66C, 0x7E9C, + 0xC66D, 0x8B9C, 0xC66E, 0x8EAA, 0xC66F, 0x91C5, 0xC670, 0x947D, + 0xC671, 0x947E, 0xC672, 0x947C, 0xC673, 0x9C77, 0xC674, 0x9C78, + 0xC675, 0x9EF7, 0xC676, 0x8C54, 0xC677, 0x947F, 0xC678, 0x9E1A, + 0xC679, 0x7228, 0xC67A, 0x9A6A, 0xC67B, 0x9B31, 0xC67C, 0x9E1B, + 0xC67D, 0x9E1E, 0xC67E, 0x7C72, 0xC940, 0x4E42, 0xC941, 0x4E5C, + 0xC942, 0x51F5, 0xC943, 0x531A, 0xC944, 0x5382, 0xC945, 0x4E07, + 0xC946, 0x4E0C, 0xC947, 0x4E47, 0xC948, 0x4E8D, 0xC949, 0x56D7, + 0xC94A, 0xFA0C, 0xC94B, 0x5C6E, 0xC94C, 0x5F73, 0xC94D, 0x4E0F, + 0xC94E, 0x5187, 0xC94F, 0x4E0E, 0xC950, 0x4E2E, 0xC951, 0x4E93, + 0xC952, 0x4EC2, 0xC953, 0x4EC9, 0xC954, 0x4EC8, 0xC955, 0x5198, + 0xC956, 0x52FC, 0xC957, 0x536C, 0xC958, 0x53B9, 0xC959, 0x5720, + 0xC95A, 0x5903, 0xC95B, 0x592C, 0xC95C, 0x5C10, 0xC95D, 0x5DFF, + 0xC95E, 0x65E1, 0xC95F, 0x6BB3, 0xC960, 0x6BCC, 0xC961, 0x6C14, + 0xC962, 0x723F, 0xC963, 0x4E31, 0xC964, 0x4E3C, 0xC965, 0x4EE8, + 0xC966, 0x4EDC, 0xC967, 0x4EE9, 0xC968, 0x4EE1, 0xC969, 0x4EDD, + 0xC96A, 0x4EDA, 0xC96B, 0x520C, 0xC96C, 0x531C, 0xC96D, 0x534C, + 0xC96E, 0x5722, 0xC96F, 0x5723, 0xC970, 0x5917, 0xC971, 0x592F, + 0xC972, 0x5B81, 0xC973, 0x5B84, 0xC974, 0x5C12, 0xC975, 0x5C3B, + 0xC976, 0x5C74, 0xC977, 0x5C73, 0xC978, 0x5E04, 0xC979, 0x5E80, + 0xC97A, 0x5E82, 0xC97B, 0x5FC9, 0xC97C, 0x6209, 0xC97D, 0x6250, + 0xC97E, 0x6C15, 0xC9A1, 0x6C36, 0xC9A2, 0x6C43, 0xC9A3, 0x6C3F, + 0xC9A4, 0x6C3B, 0xC9A5, 0x72AE, 0xC9A6, 0x72B0, 0xC9A7, 0x738A, + 0xC9A8, 0x79B8, 0xC9A9, 0x808A, 0xC9AA, 0x961E, 0xC9AB, 0x4F0E, + 0xC9AC, 0x4F18, 0xC9AD, 0x4F2C, 0xC9AE, 0x4EF5, 0xC9AF, 0x4F14, + 0xC9B0, 0x4EF1, 0xC9B1, 0x4F00, 0xC9B2, 0x4EF7, 0xC9B3, 0x4F08, + 0xC9B4, 0x4F1D, 0xC9B5, 0x4F02, 0xC9B6, 0x4F05, 0xC9B7, 0x4F22, + 0xC9B8, 0x4F13, 0xC9B9, 0x4F04, 0xC9BA, 0x4EF4, 0xC9BB, 0x4F12, + 0xC9BC, 0x51B1, 0xC9BD, 0x5213, 0xC9BE, 0x5209, 0xC9BF, 0x5210, + 0xC9C0, 0x52A6, 0xC9C1, 0x5322, 0xC9C2, 0x531F, 0xC9C3, 0x534D, + 0xC9C4, 0x538A, 0xC9C5, 0x5407, 0xC9C6, 0x56E1, 0xC9C7, 0x56DF, + 0xC9C8, 0x572E, 0xC9C9, 0x572A, 0xC9CA, 0x5734, 0xC9CB, 0x593C, + 0xC9CC, 0x5980, 0xC9CD, 0x597C, 0xC9CE, 0x5985, 0xC9CF, 0x597B, + 0xC9D0, 0x597E, 0xC9D1, 0x5977, 0xC9D2, 0x597F, 0xC9D3, 0x5B56, + 0xC9D4, 0x5C15, 0xC9D5, 0x5C25, 0xC9D6, 0x5C7C, 0xC9D7, 0x5C7A, + 0xC9D8, 0x5C7B, 0xC9D9, 0x5C7E, 0xC9DA, 0x5DDF, 0xC9DB, 0x5E75, + 0xC9DC, 0x5E84, 0xC9DD, 0x5F02, 0xC9DE, 0x5F1A, 0xC9DF, 0x5F74, + 0xC9E0, 0x5FD5, 0xC9E1, 0x5FD4, 0xC9E2, 0x5FCF, 0xC9E3, 0x625C, + 0xC9E4, 0x625E, 0xC9E5, 0x6264, 0xC9E6, 0x6261, 0xC9E7, 0x6266, + 0xC9E8, 0x6262, 0xC9E9, 0x6259, 0xC9EA, 0x6260, 0xC9EB, 0x625A, + 0xC9EC, 0x6265, 0xC9ED, 0x65EF, 0xC9EE, 0x65EE, 0xC9EF, 0x673E, + 0xC9F0, 0x6739, 0xC9F1, 0x6738, 0xC9F2, 0x673B, 0xC9F3, 0x673A, + 0xC9F4, 0x673F, 0xC9F5, 0x673C, 0xC9F6, 0x6733, 0xC9F7, 0x6C18, + 0xC9F8, 0x6C46, 0xC9F9, 0x6C52, 0xC9FA, 0x6C5C, 0xC9FB, 0x6C4F, + 0xC9FC, 0x6C4A, 0xC9FD, 0x6C54, 0xC9FE, 0x6C4B, 0xCA40, 0x6C4C, + 0xCA41, 0x7071, 0xCA42, 0x725E, 0xCA43, 0x72B4, 0xCA44, 0x72B5, + 0xCA45, 0x738E, 0xCA46, 0x752A, 0xCA47, 0x767F, 0xCA48, 0x7A75, + 0xCA49, 0x7F51, 0xCA4A, 0x8278, 0xCA4B, 0x827C, 0xCA4C, 0x8280, + 0xCA4D, 0x827D, 0xCA4E, 0x827F, 0xCA4F, 0x864D, 0xCA50, 0x897E, + 0xCA51, 0x9099, 0xCA52, 0x9097, 0xCA53, 0x9098, 0xCA54, 0x909B, + 0xCA55, 0x9094, 0xCA56, 0x9622, 0xCA57, 0x9624, 0xCA58, 0x9620, + 0xCA59, 0x9623, 0xCA5A, 0x4F56, 0xCA5B, 0x4F3B, 0xCA5C, 0x4F62, + 0xCA5D, 0x4F49, 0xCA5E, 0x4F53, 0xCA5F, 0x4F64, 0xCA60, 0x4F3E, + 0xCA61, 0x4F67, 0xCA62, 0x4F52, 0xCA63, 0x4F5F, 0xCA64, 0x4F41, + 0xCA65, 0x4F58, 0xCA66, 0x4F2D, 0xCA67, 0x4F33, 0xCA68, 0x4F3F, + 0xCA69, 0x4F61, 0xCA6A, 0x518F, 0xCA6B, 0x51B9, 0xCA6C, 0x521C, + 0xCA6D, 0x521E, 0xCA6E, 0x5221, 0xCA6F, 0x52AD, 0xCA70, 0x52AE, + 0xCA71, 0x5309, 0xCA72, 0x5363, 0xCA73, 0x5372, 0xCA74, 0x538E, + 0xCA75, 0x538F, 0xCA76, 0x5430, 0xCA77, 0x5437, 0xCA78, 0x542A, + 0xCA79, 0x5454, 0xCA7A, 0x5445, 0xCA7B, 0x5419, 0xCA7C, 0x541C, + 0xCA7D, 0x5425, 0xCA7E, 0x5418, 0xCAA1, 0x543D, 0xCAA2, 0x544F, + 0xCAA3, 0x5441, 0xCAA4, 0x5428, 0xCAA5, 0x5424, 0xCAA6, 0x5447, + 0xCAA7, 0x56EE, 0xCAA8, 0x56E7, 0xCAA9, 0x56E5, 0xCAAA, 0x5741, + 0xCAAB, 0x5745, 0xCAAC, 0x574C, 0xCAAD, 0x5749, 0xCAAE, 0x574B, + 0xCAAF, 0x5752, 0xCAB0, 0x5906, 0xCAB1, 0x5940, 0xCAB2, 0x59A6, + 0xCAB3, 0x5998, 0xCAB4, 0x59A0, 0xCAB5, 0x5997, 0xCAB6, 0x598E, + 0xCAB7, 0x59A2, 0xCAB8, 0x5990, 0xCAB9, 0x598F, 0xCABA, 0x59A7, + 0xCABB, 0x59A1, 0xCABC, 0x5B8E, 0xCABD, 0x5B92, 0xCABE, 0x5C28, + 0xCABF, 0x5C2A, 0xCAC0, 0x5C8D, 0xCAC1, 0x5C8F, 0xCAC2, 0x5C88, + 0xCAC3, 0x5C8B, 0xCAC4, 0x5C89, 0xCAC5, 0x5C92, 0xCAC6, 0x5C8A, + 0xCAC7, 0x5C86, 0xCAC8, 0x5C93, 0xCAC9, 0x5C95, 0xCACA, 0x5DE0, + 0xCACB, 0x5E0A, 0xCACC, 0x5E0E, 0xCACD, 0x5E8B, 0xCACE, 0x5E89, + 0xCACF, 0x5E8C, 0xCAD0, 0x5E88, 0xCAD1, 0x5E8D, 0xCAD2, 0x5F05, + 0xCAD3, 0x5F1D, 0xCAD4, 0x5F78, 0xCAD5, 0x5F76, 0xCAD6, 0x5FD2, + 0xCAD7, 0x5FD1, 0xCAD8, 0x5FD0, 0xCAD9, 0x5FED, 0xCADA, 0x5FE8, + 0xCADB, 0x5FEE, 0xCADC, 0x5FF3, 0xCADD, 0x5FE1, 0xCADE, 0x5FE4, + 0xCADF, 0x5FE3, 0xCAE0, 0x5FFA, 0xCAE1, 0x5FEF, 0xCAE2, 0x5FF7, + 0xCAE3, 0x5FFB, 0xCAE4, 0x6000, 0xCAE5, 0x5FF4, 0xCAE6, 0x623A, + 0xCAE7, 0x6283, 0xCAE8, 0x628C, 0xCAE9, 0x628E, 0xCAEA, 0x628F, + 0xCAEB, 0x6294, 0xCAEC, 0x6287, 0xCAED, 0x6271, 0xCAEE, 0x627B, + 0xCAEF, 0x627A, 0xCAF0, 0x6270, 0xCAF1, 0x6281, 0xCAF2, 0x6288, + 0xCAF3, 0x6277, 0xCAF4, 0x627D, 0xCAF5, 0x6272, 0xCAF6, 0x6274, + 0xCAF7, 0x6537, 0xCAF8, 0x65F0, 0xCAF9, 0x65F4, 0xCAFA, 0x65F3, + 0xCAFB, 0x65F2, 0xCAFC, 0x65F5, 0xCAFD, 0x6745, 0xCAFE, 0x6747, + 0xCB40, 0x6759, 0xCB41, 0x6755, 0xCB42, 0x674C, 0xCB43, 0x6748, + 0xCB44, 0x675D, 0xCB45, 0x674D, 0xCB46, 0x675A, 0xCB47, 0x674B, + 0xCB48, 0x6BD0, 0xCB49, 0x6C19, 0xCB4A, 0x6C1A, 0xCB4B, 0x6C78, + 0xCB4C, 0x6C67, 0xCB4D, 0x6C6B, 0xCB4E, 0x6C84, 0xCB4F, 0x6C8B, + 0xCB50, 0x6C8F, 0xCB51, 0x6C71, 0xCB52, 0x6C6F, 0xCB53, 0x6C69, + 0xCB54, 0x6C9A, 0xCB55, 0x6C6D, 0xCB56, 0x6C87, 0xCB57, 0x6C95, + 0xCB58, 0x6C9C, 0xCB59, 0x6C66, 0xCB5A, 0x6C73, 0xCB5B, 0x6C65, + 0xCB5C, 0x6C7B, 0xCB5D, 0x6C8E, 0xCB5E, 0x7074, 0xCB5F, 0x707A, + 0xCB60, 0x7263, 0xCB61, 0x72BF, 0xCB62, 0x72BD, 0xCB63, 0x72C3, + 0xCB64, 0x72C6, 0xCB65, 0x72C1, 0xCB66, 0x72BA, 0xCB67, 0x72C5, + 0xCB68, 0x7395, 0xCB69, 0x7397, 0xCB6A, 0x7393, 0xCB6B, 0x7394, + 0xCB6C, 0x7392, 0xCB6D, 0x753A, 0xCB6E, 0x7539, 0xCB6F, 0x7594, + 0xCB70, 0x7595, 0xCB71, 0x7681, 0xCB72, 0x793D, 0xCB73, 0x8034, + 0xCB74, 0x8095, 0xCB75, 0x8099, 0xCB76, 0x8090, 0xCB77, 0x8092, + 0xCB78, 0x809C, 0xCB79, 0x8290, 0xCB7A, 0x828F, 0xCB7B, 0x8285, + 0xCB7C, 0x828E, 0xCB7D, 0x8291, 0xCB7E, 0x8293, 0xCBA1, 0x828A, + 0xCBA2, 0x8283, 0xCBA3, 0x8284, 0xCBA4, 0x8C78, 0xCBA5, 0x8FC9, + 0xCBA6, 0x8FBF, 0xCBA7, 0x909F, 0xCBA8, 0x90A1, 0xCBA9, 0x90A5, + 0xCBAA, 0x909E, 0xCBAB, 0x90A7, 0xCBAC, 0x90A0, 0xCBAD, 0x9630, + 0xCBAE, 0x9628, 0xCBAF, 0x962F, 0xCBB0, 0x962D, 0xCBB1, 0x4E33, + 0xCBB2, 0x4F98, 0xCBB3, 0x4F7C, 0xCBB4, 0x4F85, 0xCBB5, 0x4F7D, + 0xCBB6, 0x4F80, 0xCBB7, 0x4F87, 0xCBB8, 0x4F76, 0xCBB9, 0x4F74, + 0xCBBA, 0x4F89, 0xCBBB, 0x4F84, 0xCBBC, 0x4F77, 0xCBBD, 0x4F4C, + 0xCBBE, 0x4F97, 0xCBBF, 0x4F6A, 0xCBC0, 0x4F9A, 0xCBC1, 0x4F79, + 0xCBC2, 0x4F81, 0xCBC3, 0x4F78, 0xCBC4, 0x4F90, 0xCBC5, 0x4F9C, + 0xCBC6, 0x4F94, 0xCBC7, 0x4F9E, 0xCBC8, 0x4F92, 0xCBC9, 0x4F82, + 0xCBCA, 0x4F95, 0xCBCB, 0x4F6B, 0xCBCC, 0x4F6E, 0xCBCD, 0x519E, + 0xCBCE, 0x51BC, 0xCBCF, 0x51BE, 0xCBD0, 0x5235, 0xCBD1, 0x5232, + 0xCBD2, 0x5233, 0xCBD3, 0x5246, 0xCBD4, 0x5231, 0xCBD5, 0x52BC, + 0xCBD6, 0x530A, 0xCBD7, 0x530B, 0xCBD8, 0x533C, 0xCBD9, 0x5392, + 0xCBDA, 0x5394, 0xCBDB, 0x5487, 0xCBDC, 0x547F, 0xCBDD, 0x5481, + 0xCBDE, 0x5491, 0xCBDF, 0x5482, 0xCBE0, 0x5488, 0xCBE1, 0x546B, + 0xCBE2, 0x547A, 0xCBE3, 0x547E, 0xCBE4, 0x5465, 0xCBE5, 0x546C, + 0xCBE6, 0x5474, 0xCBE7, 0x5466, 0xCBE8, 0x548D, 0xCBE9, 0x546F, + 0xCBEA, 0x5461, 0xCBEB, 0x5460, 0xCBEC, 0x5498, 0xCBED, 0x5463, + 0xCBEE, 0x5467, 0xCBEF, 0x5464, 0xCBF0, 0x56F7, 0xCBF1, 0x56F9, + 0xCBF2, 0x576F, 0xCBF3, 0x5772, 0xCBF4, 0x576D, 0xCBF5, 0x576B, + 0xCBF6, 0x5771, 0xCBF7, 0x5770, 0xCBF8, 0x5776, 0xCBF9, 0x5780, + 0xCBFA, 0x5775, 0xCBFB, 0x577B, 0xCBFC, 0x5773, 0xCBFD, 0x5774, + 0xCBFE, 0x5762, 0xCC40, 0x5768, 0xCC41, 0x577D, 0xCC42, 0x590C, + 0xCC43, 0x5945, 0xCC44, 0x59B5, 0xCC45, 0x59BA, 0xCC46, 0x59CF, + 0xCC47, 0x59CE, 0xCC48, 0x59B2, 0xCC49, 0x59CC, 0xCC4A, 0x59C1, + 0xCC4B, 0x59B6, 0xCC4C, 0x59BC, 0xCC4D, 0x59C3, 0xCC4E, 0x59D6, + 0xCC4F, 0x59B1, 0xCC50, 0x59BD, 0xCC51, 0x59C0, 0xCC52, 0x59C8, + 0xCC53, 0x59B4, 0xCC54, 0x59C7, 0xCC55, 0x5B62, 0xCC56, 0x5B65, + 0xCC57, 0x5B93, 0xCC58, 0x5B95, 0xCC59, 0x5C44, 0xCC5A, 0x5C47, + 0xCC5B, 0x5CAE, 0xCC5C, 0x5CA4, 0xCC5D, 0x5CA0, 0xCC5E, 0x5CB5, + 0xCC5F, 0x5CAF, 0xCC60, 0x5CA8, 0xCC61, 0x5CAC, 0xCC62, 0x5C9F, + 0xCC63, 0x5CA3, 0xCC64, 0x5CAD, 0xCC65, 0x5CA2, 0xCC66, 0x5CAA, + 0xCC67, 0x5CA7, 0xCC68, 0x5C9D, 0xCC69, 0x5CA5, 0xCC6A, 0x5CB6, + 0xCC6B, 0x5CB0, 0xCC6C, 0x5CA6, 0xCC6D, 0x5E17, 0xCC6E, 0x5E14, + 0xCC6F, 0x5E19, 0xCC70, 0x5F28, 0xCC71, 0x5F22, 0xCC72, 0x5F23, + 0xCC73, 0x5F24, 0xCC74, 0x5F54, 0xCC75, 0x5F82, 0xCC76, 0x5F7E, + 0xCC77, 0x5F7D, 0xCC78, 0x5FDE, 0xCC79, 0x5FE5, 0xCC7A, 0x602D, + 0xCC7B, 0x6026, 0xCC7C, 0x6019, 0xCC7D, 0x6032, 0xCC7E, 0x600B, + 0xCCA1, 0x6034, 0xCCA2, 0x600A, 0xCCA3, 0x6017, 0xCCA4, 0x6033, + 0xCCA5, 0x601A, 0xCCA6, 0x601E, 0xCCA7, 0x602C, 0xCCA8, 0x6022, + 0xCCA9, 0x600D, 0xCCAA, 0x6010, 0xCCAB, 0x602E, 0xCCAC, 0x6013, + 0xCCAD, 0x6011, 0xCCAE, 0x600C, 0xCCAF, 0x6009, 0xCCB0, 0x601C, + 0xCCB1, 0x6214, 0xCCB2, 0x623D, 0xCCB3, 0x62AD, 0xCCB4, 0x62B4, + 0xCCB5, 0x62D1, 0xCCB6, 0x62BE, 0xCCB7, 0x62AA, 0xCCB8, 0x62B6, + 0xCCB9, 0x62CA, 0xCCBA, 0x62AE, 0xCCBB, 0x62B3, 0xCCBC, 0x62AF, + 0xCCBD, 0x62BB, 0xCCBE, 0x62A9, 0xCCBF, 0x62B0, 0xCCC0, 0x62B8, + 0xCCC1, 0x653D, 0xCCC2, 0x65A8, 0xCCC3, 0x65BB, 0xCCC4, 0x6609, + 0xCCC5, 0x65FC, 0xCCC6, 0x6604, 0xCCC7, 0x6612, 0xCCC8, 0x6608, + 0xCCC9, 0x65FB, 0xCCCA, 0x6603, 0xCCCB, 0x660B, 0xCCCC, 0x660D, + 0xCCCD, 0x6605, 0xCCCE, 0x65FD, 0xCCCF, 0x6611, 0xCCD0, 0x6610, + 0xCCD1, 0x66F6, 0xCCD2, 0x670A, 0xCCD3, 0x6785, 0xCCD4, 0x676C, + 0xCCD5, 0x678E, 0xCCD6, 0x6792, 0xCCD7, 0x6776, 0xCCD8, 0x677B, + 0xCCD9, 0x6798, 0xCCDA, 0x6786, 0xCCDB, 0x6784, 0xCCDC, 0x6774, + 0xCCDD, 0x678D, 0xCCDE, 0x678C, 0xCCDF, 0x677A, 0xCCE0, 0x679F, + 0xCCE1, 0x6791, 0xCCE2, 0x6799, 0xCCE3, 0x6783, 0xCCE4, 0x677D, + 0xCCE5, 0x6781, 0xCCE6, 0x6778, 0xCCE7, 0x6779, 0xCCE8, 0x6794, + 0xCCE9, 0x6B25, 0xCCEA, 0x6B80, 0xCCEB, 0x6B7E, 0xCCEC, 0x6BDE, + 0xCCED, 0x6C1D, 0xCCEE, 0x6C93, 0xCCEF, 0x6CEC, 0xCCF0, 0x6CEB, + 0xCCF1, 0x6CEE, 0xCCF2, 0x6CD9, 0xCCF3, 0x6CB6, 0xCCF4, 0x6CD4, + 0xCCF5, 0x6CAD, 0xCCF6, 0x6CE7, 0xCCF7, 0x6CB7, 0xCCF8, 0x6CD0, + 0xCCF9, 0x6CC2, 0xCCFA, 0x6CBA, 0xCCFB, 0x6CC3, 0xCCFC, 0x6CC6, + 0xCCFD, 0x6CED, 0xCCFE, 0x6CF2, 0xCD40, 0x6CD2, 0xCD41, 0x6CDD, + 0xCD42, 0x6CB4, 0xCD43, 0x6C8A, 0xCD44, 0x6C9D, 0xCD45, 0x6C80, + 0xCD46, 0x6CDE, 0xCD47, 0x6CC0, 0xCD48, 0x6D30, 0xCD49, 0x6CCD, + 0xCD4A, 0x6CC7, 0xCD4B, 0x6CB0, 0xCD4C, 0x6CF9, 0xCD4D, 0x6CCF, + 0xCD4E, 0x6CE9, 0xCD4F, 0x6CD1, 0xCD50, 0x7094, 0xCD51, 0x7098, + 0xCD52, 0x7085, 0xCD53, 0x7093, 0xCD54, 0x7086, 0xCD55, 0x7084, + 0xCD56, 0x7091, 0xCD57, 0x7096, 0xCD58, 0x7082, 0xCD59, 0x709A, + 0xCD5A, 0x7083, 0xCD5B, 0x726A, 0xCD5C, 0x72D6, 0xCD5D, 0x72CB, + 0xCD5E, 0x72D8, 0xCD5F, 0x72C9, 0xCD60, 0x72DC, 0xCD61, 0x72D2, + 0xCD62, 0x72D4, 0xCD63, 0x72DA, 0xCD64, 0x72CC, 0xCD65, 0x72D1, + 0xCD66, 0x73A4, 0xCD67, 0x73A1, 0xCD68, 0x73AD, 0xCD69, 0x73A6, + 0xCD6A, 0x73A2, 0xCD6B, 0x73A0, 0xCD6C, 0x73AC, 0xCD6D, 0x739D, + 0xCD6E, 0x74DD, 0xCD6F, 0x74E8, 0xCD70, 0x753F, 0xCD71, 0x7540, + 0xCD72, 0x753E, 0xCD73, 0x758C, 0xCD74, 0x7598, 0xCD75, 0x76AF, + 0xCD76, 0x76F3, 0xCD77, 0x76F1, 0xCD78, 0x76F0, 0xCD79, 0x76F5, + 0xCD7A, 0x77F8, 0xCD7B, 0x77FC, 0xCD7C, 0x77F9, 0xCD7D, 0x77FB, + 0xCD7E, 0x77FA, 0xCDA1, 0x77F7, 0xCDA2, 0x7942, 0xCDA3, 0x793F, + 0xCDA4, 0x79C5, 0xCDA5, 0x7A78, 0xCDA6, 0x7A7B, 0xCDA7, 0x7AFB, + 0xCDA8, 0x7C75, 0xCDA9, 0x7CFD, 0xCDAA, 0x8035, 0xCDAB, 0x808F, + 0xCDAC, 0x80AE, 0xCDAD, 0x80A3, 0xCDAE, 0x80B8, 0xCDAF, 0x80B5, + 0xCDB0, 0x80AD, 0xCDB1, 0x8220, 0xCDB2, 0x82A0, 0xCDB3, 0x82C0, + 0xCDB4, 0x82AB, 0xCDB5, 0x829A, 0xCDB6, 0x8298, 0xCDB7, 0x829B, + 0xCDB8, 0x82B5, 0xCDB9, 0x82A7, 0xCDBA, 0x82AE, 0xCDBB, 0x82BC, + 0xCDBC, 0x829E, 0xCDBD, 0x82BA, 0xCDBE, 0x82B4, 0xCDBF, 0x82A8, + 0xCDC0, 0x82A1, 0xCDC1, 0x82A9, 0xCDC2, 0x82C2, 0xCDC3, 0x82A4, + 0xCDC4, 0x82C3, 0xCDC5, 0x82B6, 0xCDC6, 0x82A2, 0xCDC7, 0x8670, + 0xCDC8, 0x866F, 0xCDC9, 0x866D, 0xCDCA, 0x866E, 0xCDCB, 0x8C56, + 0xCDCC, 0x8FD2, 0xCDCD, 0x8FCB, 0xCDCE, 0x8FD3, 0xCDCF, 0x8FCD, + 0xCDD0, 0x8FD6, 0xCDD1, 0x8FD5, 0xCDD2, 0x8FD7, 0xCDD3, 0x90B2, + 0xCDD4, 0x90B4, 0xCDD5, 0x90AF, 0xCDD6, 0x90B3, 0xCDD7, 0x90B0, + 0xCDD8, 0x9639, 0xCDD9, 0x963D, 0xCDDA, 0x963C, 0xCDDB, 0x963A, + 0xCDDC, 0x9643, 0xCDDD, 0x4FCD, 0xCDDE, 0x4FC5, 0xCDDF, 0x4FD3, + 0xCDE0, 0x4FB2, 0xCDE1, 0x4FC9, 0xCDE2, 0x4FCB, 0xCDE3, 0x4FC1, + 0xCDE4, 0x4FD4, 0xCDE5, 0x4FDC, 0xCDE6, 0x4FD9, 0xCDE7, 0x4FBB, + 0xCDE8, 0x4FB3, 0xCDE9, 0x4FDB, 0xCDEA, 0x4FC7, 0xCDEB, 0x4FD6, + 0xCDEC, 0x4FBA, 0xCDED, 0x4FC0, 0xCDEE, 0x4FB9, 0xCDEF, 0x4FEC, + 0xCDF0, 0x5244, 0xCDF1, 0x5249, 0xCDF2, 0x52C0, 0xCDF3, 0x52C2, + 0xCDF4, 0x533D, 0xCDF5, 0x537C, 0xCDF6, 0x5397, 0xCDF7, 0x5396, + 0xCDF8, 0x5399, 0xCDF9, 0x5398, 0xCDFA, 0x54BA, 0xCDFB, 0x54A1, + 0xCDFC, 0x54AD, 0xCDFD, 0x54A5, 0xCDFE, 0x54CF, 0xCE40, 0x54C3, + 0xCE41, 0x830D, 0xCE42, 0x54B7, 0xCE43, 0x54AE, 0xCE44, 0x54D6, + 0xCE45, 0x54B6, 0xCE46, 0x54C5, 0xCE47, 0x54C6, 0xCE48, 0x54A0, + 0xCE49, 0x5470, 0xCE4A, 0x54BC, 0xCE4B, 0x54A2, 0xCE4C, 0x54BE, + 0xCE4D, 0x5472, 0xCE4E, 0x54DE, 0xCE4F, 0x54B0, 0xCE50, 0x57B5, + 0xCE51, 0x579E, 0xCE52, 0x579F, 0xCE53, 0x57A4, 0xCE54, 0x578C, + 0xCE55, 0x5797, 0xCE56, 0x579D, 0xCE57, 0x579B, 0xCE58, 0x5794, + 0xCE59, 0x5798, 0xCE5A, 0x578F, 0xCE5B, 0x5799, 0xCE5C, 0x57A5, + 0xCE5D, 0x579A, 0xCE5E, 0x5795, 0xCE5F, 0x58F4, 0xCE60, 0x590D, + 0xCE61, 0x5953, 0xCE62, 0x59E1, 0xCE63, 0x59DE, 0xCE64, 0x59EE, + 0xCE65, 0x5A00, 0xCE66, 0x59F1, 0xCE67, 0x59DD, 0xCE68, 0x59FA, + 0xCE69, 0x59FD, 0xCE6A, 0x59FC, 0xCE6B, 0x59F6, 0xCE6C, 0x59E4, + 0xCE6D, 0x59F2, 0xCE6E, 0x59F7, 0xCE6F, 0x59DB, 0xCE70, 0x59E9, + 0xCE71, 0x59F3, 0xCE72, 0x59F5, 0xCE73, 0x59E0, 0xCE74, 0x59FE, + 0xCE75, 0x59F4, 0xCE76, 0x59ED, 0xCE77, 0x5BA8, 0xCE78, 0x5C4C, + 0xCE79, 0x5CD0, 0xCE7A, 0x5CD8, 0xCE7B, 0x5CCC, 0xCE7C, 0x5CD7, + 0xCE7D, 0x5CCB, 0xCE7E, 0x5CDB, 0xCEA1, 0x5CDE, 0xCEA2, 0x5CDA, + 0xCEA3, 0x5CC9, 0xCEA4, 0x5CC7, 0xCEA5, 0x5CCA, 0xCEA6, 0x5CD6, + 0xCEA7, 0x5CD3, 0xCEA8, 0x5CD4, 0xCEA9, 0x5CCF, 0xCEAA, 0x5CC8, + 0xCEAB, 0x5CC6, 0xCEAC, 0x5CCE, 0xCEAD, 0x5CDF, 0xCEAE, 0x5CF8, + 0xCEAF, 0x5DF9, 0xCEB0, 0x5E21, 0xCEB1, 0x5E22, 0xCEB2, 0x5E23, + 0xCEB3, 0x5E20, 0xCEB4, 0x5E24, 0xCEB5, 0x5EB0, 0xCEB6, 0x5EA4, + 0xCEB7, 0x5EA2, 0xCEB8, 0x5E9B, 0xCEB9, 0x5EA3, 0xCEBA, 0x5EA5, + 0xCEBB, 0x5F07, 0xCEBC, 0x5F2E, 0xCEBD, 0x5F56, 0xCEBE, 0x5F86, + 0xCEBF, 0x6037, 0xCEC0, 0x6039, 0xCEC1, 0x6054, 0xCEC2, 0x6072, + 0xCEC3, 0x605E, 0xCEC4, 0x6045, 0xCEC5, 0x6053, 0xCEC6, 0x6047, + 0xCEC7, 0x6049, 0xCEC8, 0x605B, 0xCEC9, 0x604C, 0xCECA, 0x6040, + 0xCECB, 0x6042, 0xCECC, 0x605F, 0xCECD, 0x6024, 0xCECE, 0x6044, + 0xCECF, 0x6058, 0xCED0, 0x6066, 0xCED1, 0x606E, 0xCED2, 0x6242, + 0xCED3, 0x6243, 0xCED4, 0x62CF, 0xCED5, 0x630D, 0xCED6, 0x630B, + 0xCED7, 0x62F5, 0xCED8, 0x630E, 0xCED9, 0x6303, 0xCEDA, 0x62EB, + 0xCEDB, 0x62F9, 0xCEDC, 0x630F, 0xCEDD, 0x630C, 0xCEDE, 0x62F8, + 0xCEDF, 0x62F6, 0xCEE0, 0x6300, 0xCEE1, 0x6313, 0xCEE2, 0x6314, + 0xCEE3, 0x62FA, 0xCEE4, 0x6315, 0xCEE5, 0x62FB, 0xCEE6, 0x62F0, + 0xCEE7, 0x6541, 0xCEE8, 0x6543, 0xCEE9, 0x65AA, 0xCEEA, 0x65BF, + 0xCEEB, 0x6636, 0xCEEC, 0x6621, 0xCEED, 0x6632, 0xCEEE, 0x6635, + 0xCEEF, 0x661C, 0xCEF0, 0x6626, 0xCEF1, 0x6622, 0xCEF2, 0x6633, + 0xCEF3, 0x662B, 0xCEF4, 0x663A, 0xCEF5, 0x661D, 0xCEF6, 0x6634, + 0xCEF7, 0x6639, 0xCEF8, 0x662E, 0xCEF9, 0x670F, 0xCEFA, 0x6710, + 0xCEFB, 0x67C1, 0xCEFC, 0x67F2, 0xCEFD, 0x67C8, 0xCEFE, 0x67BA, + 0xCF40, 0x67DC, 0xCF41, 0x67BB, 0xCF42, 0x67F8, 0xCF43, 0x67D8, + 0xCF44, 0x67C0, 0xCF45, 0x67B7, 0xCF46, 0x67C5, 0xCF47, 0x67EB, + 0xCF48, 0x67E4, 0xCF49, 0x67DF, 0xCF4A, 0x67B5, 0xCF4B, 0x67CD, + 0xCF4C, 0x67B3, 0xCF4D, 0x67F7, 0xCF4E, 0x67F6, 0xCF4F, 0x67EE, + 0xCF50, 0x67E3, 0xCF51, 0x67C2, 0xCF52, 0x67B9, 0xCF53, 0x67CE, + 0xCF54, 0x67E7, 0xCF55, 0x67F0, 0xCF56, 0x67B2, 0xCF57, 0x67FC, + 0xCF58, 0x67C6, 0xCF59, 0x67ED, 0xCF5A, 0x67CC, 0xCF5B, 0x67AE, + 0xCF5C, 0x67E6, 0xCF5D, 0x67DB, 0xCF5E, 0x67FA, 0xCF5F, 0x67C9, + 0xCF60, 0x67CA, 0xCF61, 0x67C3, 0xCF62, 0x67EA, 0xCF63, 0x67CB, + 0xCF64, 0x6B28, 0xCF65, 0x6B82, 0xCF66, 0x6B84, 0xCF67, 0x6BB6, + 0xCF68, 0x6BD6, 0xCF69, 0x6BD8, 0xCF6A, 0x6BE0, 0xCF6B, 0x6C20, + 0xCF6C, 0x6C21, 0xCF6D, 0x6D28, 0xCF6E, 0x6D34, 0xCF6F, 0x6D2D, + 0xCF70, 0x6D1F, 0xCF71, 0x6D3C, 0xCF72, 0x6D3F, 0xCF73, 0x6D12, + 0xCF74, 0x6D0A, 0xCF75, 0x6CDA, 0xCF76, 0x6D33, 0xCF77, 0x6D04, + 0xCF78, 0x6D19, 0xCF79, 0x6D3A, 0xCF7A, 0x6D1A, 0xCF7B, 0x6D11, + 0xCF7C, 0x6D00, 0xCF7D, 0x6D1D, 0xCF7E, 0x6D42, 0xCFA1, 0x6D01, + 0xCFA2, 0x6D18, 0xCFA3, 0x6D37, 0xCFA4, 0x6D03, 0xCFA5, 0x6D0F, + 0xCFA6, 0x6D40, 0xCFA7, 0x6D07, 0xCFA8, 0x6D20, 0xCFA9, 0x6D2C, + 0xCFAA, 0x6D08, 0xCFAB, 0x6D22, 0xCFAC, 0x6D09, 0xCFAD, 0x6D10, + 0xCFAE, 0x70B7, 0xCFAF, 0x709F, 0xCFB0, 0x70BE, 0xCFB1, 0x70B1, + 0xCFB2, 0x70B0, 0xCFB3, 0x70A1, 0xCFB4, 0x70B4, 0xCFB5, 0x70B5, + 0xCFB6, 0x70A9, 0xCFB7, 0x7241, 0xCFB8, 0x7249, 0xCFB9, 0x724A, + 0xCFBA, 0x726C, 0xCFBB, 0x7270, 0xCFBC, 0x7273, 0xCFBD, 0x726E, + 0xCFBE, 0x72CA, 0xCFBF, 0x72E4, 0xCFC0, 0x72E8, 0xCFC1, 0x72EB, + 0xCFC2, 0x72DF, 0xCFC3, 0x72EA, 0xCFC4, 0x72E6, 0xCFC5, 0x72E3, + 0xCFC6, 0x7385, 0xCFC7, 0x73CC, 0xCFC8, 0x73C2, 0xCFC9, 0x73C8, + 0xCFCA, 0x73C5, 0xCFCB, 0x73B9, 0xCFCC, 0x73B6, 0xCFCD, 0x73B5, + 0xCFCE, 0x73B4, 0xCFCF, 0x73EB, 0xCFD0, 0x73BF, 0xCFD1, 0x73C7, + 0xCFD2, 0x73BE, 0xCFD3, 0x73C3, 0xCFD4, 0x73C6, 0xCFD5, 0x73B8, + 0xCFD6, 0x73CB, 0xCFD7, 0x74EC, 0xCFD8, 0x74EE, 0xCFD9, 0x752E, + 0xCFDA, 0x7547, 0xCFDB, 0x7548, 0xCFDC, 0x75A7, 0xCFDD, 0x75AA, + 0xCFDE, 0x7679, 0xCFDF, 0x76C4, 0xCFE0, 0x7708, 0xCFE1, 0x7703, + 0xCFE2, 0x7704, 0xCFE3, 0x7705, 0xCFE4, 0x770A, 0xCFE5, 0x76F7, + 0xCFE6, 0x76FB, 0xCFE7, 0x76FA, 0xCFE8, 0x77E7, 0xCFE9, 0x77E8, + 0xCFEA, 0x7806, 0xCFEB, 0x7811, 0xCFEC, 0x7812, 0xCFED, 0x7805, + 0xCFEE, 0x7810, 0xCFEF, 0x780F, 0xCFF0, 0x780E, 0xCFF1, 0x7809, + 0xCFF2, 0x7803, 0xCFF3, 0x7813, 0xCFF4, 0x794A, 0xCFF5, 0x794C, + 0xCFF6, 0x794B, 0xCFF7, 0x7945, 0xCFF8, 0x7944, 0xCFF9, 0x79D5, + 0xCFFA, 0x79CD, 0xCFFB, 0x79CF, 0xCFFC, 0x79D6, 0xCFFD, 0x79CE, + 0xCFFE, 0x7A80, 0xD040, 0x7A7E, 0xD041, 0x7AD1, 0xD042, 0x7B00, + 0xD043, 0x7B01, 0xD044, 0x7C7A, 0xD045, 0x7C78, 0xD046, 0x7C79, + 0xD047, 0x7C7F, 0xD048, 0x7C80, 0xD049, 0x7C81, 0xD04A, 0x7D03, + 0xD04B, 0x7D08, 0xD04C, 0x7D01, 0xD04D, 0x7F58, 0xD04E, 0x7F91, + 0xD04F, 0x7F8D, 0xD050, 0x7FBE, 0xD051, 0x8007, 0xD052, 0x800E, + 0xD053, 0x800F, 0xD054, 0x8014, 0xD055, 0x8037, 0xD056, 0x80D8, + 0xD057, 0x80C7, 0xD058, 0x80E0, 0xD059, 0x80D1, 0xD05A, 0x80C8, + 0xD05B, 0x80C2, 0xD05C, 0x80D0, 0xD05D, 0x80C5, 0xD05E, 0x80E3, + 0xD05F, 0x80D9, 0xD060, 0x80DC, 0xD061, 0x80CA, 0xD062, 0x80D5, + 0xD063, 0x80C9, 0xD064, 0x80CF, 0xD065, 0x80D7, 0xD066, 0x80E6, + 0xD067, 0x80CD, 0xD068, 0x81FF, 0xD069, 0x8221, 0xD06A, 0x8294, + 0xD06B, 0x82D9, 0xD06C, 0x82FE, 0xD06D, 0x82F9, 0xD06E, 0x8307, + 0xD06F, 0x82E8, 0xD070, 0x8300, 0xD071, 0x82D5, 0xD072, 0x833A, + 0xD073, 0x82EB, 0xD074, 0x82D6, 0xD075, 0x82F4, 0xD076, 0x82EC, + 0xD077, 0x82E1, 0xD078, 0x82F2, 0xD079, 0x82F5, 0xD07A, 0x830C, + 0xD07B, 0x82FB, 0xD07C, 0x82F6, 0xD07D, 0x82F0, 0xD07E, 0x82EA, + 0xD0A1, 0x82E4, 0xD0A2, 0x82E0, 0xD0A3, 0x82FA, 0xD0A4, 0x82F3, + 0xD0A5, 0x82ED, 0xD0A6, 0x8677, 0xD0A7, 0x8674, 0xD0A8, 0x867C, + 0xD0A9, 0x8673, 0xD0AA, 0x8841, 0xD0AB, 0x884E, 0xD0AC, 0x8867, + 0xD0AD, 0x886A, 0xD0AE, 0x8869, 0xD0AF, 0x89D3, 0xD0B0, 0x8A04, + 0xD0B1, 0x8A07, 0xD0B2, 0x8D72, 0xD0B3, 0x8FE3, 0xD0B4, 0x8FE1, + 0xD0B5, 0x8FEE, 0xD0B6, 0x8FE0, 0xD0B7, 0x90F1, 0xD0B8, 0x90BD, + 0xD0B9, 0x90BF, 0xD0BA, 0x90D5, 0xD0BB, 0x90C5, 0xD0BC, 0x90BE, + 0xD0BD, 0x90C7, 0xD0BE, 0x90CB, 0xD0BF, 0x90C8, 0xD0C0, 0x91D4, + 0xD0C1, 0x91D3, 0xD0C2, 0x9654, 0xD0C3, 0x964F, 0xD0C4, 0x9651, + 0xD0C5, 0x9653, 0xD0C6, 0x964A, 0xD0C7, 0x964E, 0xD0C8, 0x501E, + 0xD0C9, 0x5005, 0xD0CA, 0x5007, 0xD0CB, 0x5013, 0xD0CC, 0x5022, + 0xD0CD, 0x5030, 0xD0CE, 0x501B, 0xD0CF, 0x4FF5, 0xD0D0, 0x4FF4, + 0xD0D1, 0x5033, 0xD0D2, 0x5037, 0xD0D3, 0x502C, 0xD0D4, 0x4FF6, + 0xD0D5, 0x4FF7, 0xD0D6, 0x5017, 0xD0D7, 0x501C, 0xD0D8, 0x5020, + 0xD0D9, 0x5027, 0xD0DA, 0x5035, 0xD0DB, 0x502F, 0xD0DC, 0x5031, + 0xD0DD, 0x500E, 0xD0DE, 0x515A, 0xD0DF, 0x5194, 0xD0E0, 0x5193, + 0xD0E1, 0x51CA, 0xD0E2, 0x51C4, 0xD0E3, 0x51C5, 0xD0E4, 0x51C8, + 0xD0E5, 0x51CE, 0xD0E6, 0x5261, 0xD0E7, 0x525A, 0xD0E8, 0x5252, + 0xD0E9, 0x525E, 0xD0EA, 0x525F, 0xD0EB, 0x5255, 0xD0EC, 0x5262, + 0xD0ED, 0x52CD, 0xD0EE, 0x530E, 0xD0EF, 0x539E, 0xD0F0, 0x5526, + 0xD0F1, 0x54E2, 0xD0F2, 0x5517, 0xD0F3, 0x5512, 0xD0F4, 0x54E7, + 0xD0F5, 0x54F3, 0xD0F6, 0x54E4, 0xD0F7, 0x551A, 0xD0F8, 0x54FF, + 0xD0F9, 0x5504, 0xD0FA, 0x5508, 0xD0FB, 0x54EB, 0xD0FC, 0x5511, + 0xD0FD, 0x5505, 0xD0FE, 0x54F1, 0xD140, 0x550A, 0xD141, 0x54FB, + 0xD142, 0x54F7, 0xD143, 0x54F8, 0xD144, 0x54E0, 0xD145, 0x550E, + 0xD146, 0x5503, 0xD147, 0x550B, 0xD148, 0x5701, 0xD149, 0x5702, + 0xD14A, 0x57CC, 0xD14B, 0x5832, 0xD14C, 0x57D5, 0xD14D, 0x57D2, + 0xD14E, 0x57BA, 0xD14F, 0x57C6, 0xD150, 0x57BD, 0xD151, 0x57BC, + 0xD152, 0x57B8, 0xD153, 0x57B6, 0xD154, 0x57BF, 0xD155, 0x57C7, + 0xD156, 0x57D0, 0xD157, 0x57B9, 0xD158, 0x57C1, 0xD159, 0x590E, + 0xD15A, 0x594A, 0xD15B, 0x5A19, 0xD15C, 0x5A16, 0xD15D, 0x5A2D, + 0xD15E, 0x5A2E, 0xD15F, 0x5A15, 0xD160, 0x5A0F, 0xD161, 0x5A17, + 0xD162, 0x5A0A, 0xD163, 0x5A1E, 0xD164, 0x5A33, 0xD165, 0x5B6C, + 0xD166, 0x5BA7, 0xD167, 0x5BAD, 0xD168, 0x5BAC, 0xD169, 0x5C03, + 0xD16A, 0x5C56, 0xD16B, 0x5C54, 0xD16C, 0x5CEC, 0xD16D, 0x5CFF, + 0xD16E, 0x5CEE, 0xD16F, 0x5CF1, 0xD170, 0x5CF7, 0xD171, 0x5D00, + 0xD172, 0x5CF9, 0xD173, 0x5E29, 0xD174, 0x5E28, 0xD175, 0x5EA8, + 0xD176, 0x5EAE, 0xD177, 0x5EAA, 0xD178, 0x5EAC, 0xD179, 0x5F33, + 0xD17A, 0x5F30, 0xD17B, 0x5F67, 0xD17C, 0x605D, 0xD17D, 0x605A, + 0xD17E, 0x6067, 0xD1A1, 0x6041, 0xD1A2, 0x60A2, 0xD1A3, 0x6088, + 0xD1A4, 0x6080, 0xD1A5, 0x6092, 0xD1A6, 0x6081, 0xD1A7, 0x609D, + 0xD1A8, 0x6083, 0xD1A9, 0x6095, 0xD1AA, 0x609B, 0xD1AB, 0x6097, + 0xD1AC, 0x6087, 0xD1AD, 0x609C, 0xD1AE, 0x608E, 0xD1AF, 0x6219, + 0xD1B0, 0x6246, 0xD1B1, 0x62F2, 0xD1B2, 0x6310, 0xD1B3, 0x6356, + 0xD1B4, 0x632C, 0xD1B5, 0x6344, 0xD1B6, 0x6345, 0xD1B7, 0x6336, + 0xD1B8, 0x6343, 0xD1B9, 0x63E4, 0xD1BA, 0x6339, 0xD1BB, 0x634B, + 0xD1BC, 0x634A, 0xD1BD, 0x633C, 0xD1BE, 0x6329, 0xD1BF, 0x6341, + 0xD1C0, 0x6334, 0xD1C1, 0x6358, 0xD1C2, 0x6354, 0xD1C3, 0x6359, + 0xD1C4, 0x632D, 0xD1C5, 0x6347, 0xD1C6, 0x6333, 0xD1C7, 0x635A, + 0xD1C8, 0x6351, 0xD1C9, 0x6338, 0xD1CA, 0x6357, 0xD1CB, 0x6340, + 0xD1CC, 0x6348, 0xD1CD, 0x654A, 0xD1CE, 0x6546, 0xD1CF, 0x65C6, + 0xD1D0, 0x65C3, 0xD1D1, 0x65C4, 0xD1D2, 0x65C2, 0xD1D3, 0x664A, + 0xD1D4, 0x665F, 0xD1D5, 0x6647, 0xD1D6, 0x6651, 0xD1D7, 0x6712, + 0xD1D8, 0x6713, 0xD1D9, 0x681F, 0xD1DA, 0x681A, 0xD1DB, 0x6849, + 0xD1DC, 0x6832, 0xD1DD, 0x6833, 0xD1DE, 0x683B, 0xD1DF, 0x684B, + 0xD1E0, 0x684F, 0xD1E1, 0x6816, 0xD1E2, 0x6831, 0xD1E3, 0x681C, + 0xD1E4, 0x6835, 0xD1E5, 0x682B, 0xD1E6, 0x682D, 0xD1E7, 0x682F, + 0xD1E8, 0x684E, 0xD1E9, 0x6844, 0xD1EA, 0x6834, 0xD1EB, 0x681D, + 0xD1EC, 0x6812, 0xD1ED, 0x6814, 0xD1EE, 0x6826, 0xD1EF, 0x6828, + 0xD1F0, 0x682E, 0xD1F1, 0x684D, 0xD1F2, 0x683A, 0xD1F3, 0x6825, + 0xD1F4, 0x6820, 0xD1F5, 0x6B2C, 0xD1F6, 0x6B2F, 0xD1F7, 0x6B2D, + 0xD1F8, 0x6B31, 0xD1F9, 0x6B34, 0xD1FA, 0x6B6D, 0xD1FB, 0x8082, + 0xD1FC, 0x6B88, 0xD1FD, 0x6BE6, 0xD1FE, 0x6BE4, 0xD240, 0x6BE8, + 0xD241, 0x6BE3, 0xD242, 0x6BE2, 0xD243, 0x6BE7, 0xD244, 0x6C25, + 0xD245, 0x6D7A, 0xD246, 0x6D63, 0xD247, 0x6D64, 0xD248, 0x6D76, + 0xD249, 0x6D0D, 0xD24A, 0x6D61, 0xD24B, 0x6D92, 0xD24C, 0x6D58, + 0xD24D, 0x6D62, 0xD24E, 0x6D6D, 0xD24F, 0x6D6F, 0xD250, 0x6D91, + 0xD251, 0x6D8D, 0xD252, 0x6DEF, 0xD253, 0x6D7F, 0xD254, 0x6D86, + 0xD255, 0x6D5E, 0xD256, 0x6D67, 0xD257, 0x6D60, 0xD258, 0x6D97, + 0xD259, 0x6D70, 0xD25A, 0x6D7C, 0xD25B, 0x6D5F, 0xD25C, 0x6D82, + 0xD25D, 0x6D98, 0xD25E, 0x6D2F, 0xD25F, 0x6D68, 0xD260, 0x6D8B, + 0xD261, 0x6D7E, 0xD262, 0x6D80, 0xD263, 0x6D84, 0xD264, 0x6D16, + 0xD265, 0x6D83, 0xD266, 0x6D7B, 0xD267, 0x6D7D, 0xD268, 0x6D75, + 0xD269, 0x6D90, 0xD26A, 0x70DC, 0xD26B, 0x70D3, 0xD26C, 0x70D1, + 0xD26D, 0x70DD, 0xD26E, 0x70CB, 0xD26F, 0x7F39, 0xD270, 0x70E2, + 0xD271, 0x70D7, 0xD272, 0x70D2, 0xD273, 0x70DE, 0xD274, 0x70E0, + 0xD275, 0x70D4, 0xD276, 0x70CD, 0xD277, 0x70C5, 0xD278, 0x70C6, + 0xD279, 0x70C7, 0xD27A, 0x70DA, 0xD27B, 0x70CE, 0xD27C, 0x70E1, + 0xD27D, 0x7242, 0xD27E, 0x7278, 0xD2A1, 0x7277, 0xD2A2, 0x7276, + 0xD2A3, 0x7300, 0xD2A4, 0x72FA, 0xD2A5, 0x72F4, 0xD2A6, 0x72FE, + 0xD2A7, 0x72F6, 0xD2A8, 0x72F3, 0xD2A9, 0x72FB, 0xD2AA, 0x7301, + 0xD2AB, 0x73D3, 0xD2AC, 0x73D9, 0xD2AD, 0x73E5, 0xD2AE, 0x73D6, + 0xD2AF, 0x73BC, 0xD2B0, 0x73E7, 0xD2B1, 0x73E3, 0xD2B2, 0x73E9, + 0xD2B3, 0x73DC, 0xD2B4, 0x73D2, 0xD2B5, 0x73DB, 0xD2B6, 0x73D4, + 0xD2B7, 0x73DD, 0xD2B8, 0x73DA, 0xD2B9, 0x73D7, 0xD2BA, 0x73D8, + 0xD2BB, 0x73E8, 0xD2BC, 0x74DE, 0xD2BD, 0x74DF, 0xD2BE, 0x74F4, + 0xD2BF, 0x74F5, 0xD2C0, 0x7521, 0xD2C1, 0x755B, 0xD2C2, 0x755F, + 0xD2C3, 0x75B0, 0xD2C4, 0x75C1, 0xD2C5, 0x75BB, 0xD2C6, 0x75C4, + 0xD2C7, 0x75C0, 0xD2C8, 0x75BF, 0xD2C9, 0x75B6, 0xD2CA, 0x75BA, + 0xD2CB, 0x768A, 0xD2CC, 0x76C9, 0xD2CD, 0x771D, 0xD2CE, 0x771B, + 0xD2CF, 0x7710, 0xD2D0, 0x7713, 0xD2D1, 0x7712, 0xD2D2, 0x7723, + 0xD2D3, 0x7711, 0xD2D4, 0x7715, 0xD2D5, 0x7719, 0xD2D6, 0x771A, + 0xD2D7, 0x7722, 0xD2D8, 0x7727, 0xD2D9, 0x7823, 0xD2DA, 0x782C, + 0xD2DB, 0x7822, 0xD2DC, 0x7835, 0xD2DD, 0x782F, 0xD2DE, 0x7828, + 0xD2DF, 0x782E, 0xD2E0, 0x782B, 0xD2E1, 0x7821, 0xD2E2, 0x7829, + 0xD2E3, 0x7833, 0xD2E4, 0x782A, 0xD2E5, 0x7831, 0xD2E6, 0x7954, + 0xD2E7, 0x795B, 0xD2E8, 0x794F, 0xD2E9, 0x795C, 0xD2EA, 0x7953, + 0xD2EB, 0x7952, 0xD2EC, 0x7951, 0xD2ED, 0x79EB, 0xD2EE, 0x79EC, + 0xD2EF, 0x79E0, 0xD2F0, 0x79EE, 0xD2F1, 0x79ED, 0xD2F2, 0x79EA, + 0xD2F3, 0x79DC, 0xD2F4, 0x79DE, 0xD2F5, 0x79DD, 0xD2F6, 0x7A86, + 0xD2F7, 0x7A89, 0xD2F8, 0x7A85, 0xD2F9, 0x7A8B, 0xD2FA, 0x7A8C, + 0xD2FB, 0x7A8A, 0xD2FC, 0x7A87, 0xD2FD, 0x7AD8, 0xD2FE, 0x7B10, + 0xD340, 0x7B04, 0xD341, 0x7B13, 0xD342, 0x7B05, 0xD343, 0x7B0F, + 0xD344, 0x7B08, 0xD345, 0x7B0A, 0xD346, 0x7B0E, 0xD347, 0x7B09, + 0xD348, 0x7B12, 0xD349, 0x7C84, 0xD34A, 0x7C91, 0xD34B, 0x7C8A, + 0xD34C, 0x7C8C, 0xD34D, 0x7C88, 0xD34E, 0x7C8D, 0xD34F, 0x7C85, + 0xD350, 0x7D1E, 0xD351, 0x7D1D, 0xD352, 0x7D11, 0xD353, 0x7D0E, + 0xD354, 0x7D18, 0xD355, 0x7D16, 0xD356, 0x7D13, 0xD357, 0x7D1F, + 0xD358, 0x7D12, 0xD359, 0x7D0F, 0xD35A, 0x7D0C, 0xD35B, 0x7F5C, + 0xD35C, 0x7F61, 0xD35D, 0x7F5E, 0xD35E, 0x7F60, 0xD35F, 0x7F5D, + 0xD360, 0x7F5B, 0xD361, 0x7F96, 0xD362, 0x7F92, 0xD363, 0x7FC3, + 0xD364, 0x7FC2, 0xD365, 0x7FC0, 0xD366, 0x8016, 0xD367, 0x803E, + 0xD368, 0x8039, 0xD369, 0x80FA, 0xD36A, 0x80F2, 0xD36B, 0x80F9, + 0xD36C, 0x80F5, 0xD36D, 0x8101, 0xD36E, 0x80FB, 0xD36F, 0x8100, + 0xD370, 0x8201, 0xD371, 0x822F, 0xD372, 0x8225, 0xD373, 0x8333, + 0xD374, 0x832D, 0xD375, 0x8344, 0xD376, 0x8319, 0xD377, 0x8351, + 0xD378, 0x8325, 0xD379, 0x8356, 0xD37A, 0x833F, 0xD37B, 0x8341, + 0xD37C, 0x8326, 0xD37D, 0x831C, 0xD37E, 0x8322, 0xD3A1, 0x8342, + 0xD3A2, 0x834E, 0xD3A3, 0x831B, 0xD3A4, 0x832A, 0xD3A5, 0x8308, + 0xD3A6, 0x833C, 0xD3A7, 0x834D, 0xD3A8, 0x8316, 0xD3A9, 0x8324, + 0xD3AA, 0x8320, 0xD3AB, 0x8337, 0xD3AC, 0x832F, 0xD3AD, 0x8329, + 0xD3AE, 0x8347, 0xD3AF, 0x8345, 0xD3B0, 0x834C, 0xD3B1, 0x8353, + 0xD3B2, 0x831E, 0xD3B3, 0x832C, 0xD3B4, 0x834B, 0xD3B5, 0x8327, + 0xD3B6, 0x8348, 0xD3B7, 0x8653, 0xD3B8, 0x8652, 0xD3B9, 0x86A2, + 0xD3BA, 0x86A8, 0xD3BB, 0x8696, 0xD3BC, 0x868D, 0xD3BD, 0x8691, + 0xD3BE, 0x869E, 0xD3BF, 0x8687, 0xD3C0, 0x8697, 0xD3C1, 0x8686, + 0xD3C2, 0x868B, 0xD3C3, 0x869A, 0xD3C4, 0x8685, 0xD3C5, 0x86A5, + 0xD3C6, 0x8699, 0xD3C7, 0x86A1, 0xD3C8, 0x86A7, 0xD3C9, 0x8695, + 0xD3CA, 0x8698, 0xD3CB, 0x868E, 0xD3CC, 0x869D, 0xD3CD, 0x8690, + 0xD3CE, 0x8694, 0xD3CF, 0x8843, 0xD3D0, 0x8844, 0xD3D1, 0x886D, + 0xD3D2, 0x8875, 0xD3D3, 0x8876, 0xD3D4, 0x8872, 0xD3D5, 0x8880, + 0xD3D6, 0x8871, 0xD3D7, 0x887F, 0xD3D8, 0x886F, 0xD3D9, 0x8883, + 0xD3DA, 0x887E, 0xD3DB, 0x8874, 0xD3DC, 0x887C, 0xD3DD, 0x8A12, + 0xD3DE, 0x8C47, 0xD3DF, 0x8C57, 0xD3E0, 0x8C7B, 0xD3E1, 0x8CA4, + 0xD3E2, 0x8CA3, 0xD3E3, 0x8D76, 0xD3E4, 0x8D78, 0xD3E5, 0x8DB5, + 0xD3E6, 0x8DB7, 0xD3E7, 0x8DB6, 0xD3E8, 0x8ED1, 0xD3E9, 0x8ED3, + 0xD3EA, 0x8FFE, 0xD3EB, 0x8FF5, 0xD3EC, 0x9002, 0xD3ED, 0x8FFF, + 0xD3EE, 0x8FFB, 0xD3EF, 0x9004, 0xD3F0, 0x8FFC, 0xD3F1, 0x8FF6, + 0xD3F2, 0x90D6, 0xD3F3, 0x90E0, 0xD3F4, 0x90D9, 0xD3F5, 0x90DA, + 0xD3F6, 0x90E3, 0xD3F7, 0x90DF, 0xD3F8, 0x90E5, 0xD3F9, 0x90D8, + 0xD3FA, 0x90DB, 0xD3FB, 0x90D7, 0xD3FC, 0x90DC, 0xD3FD, 0x90E4, + 0xD3FE, 0x9150, 0xD440, 0x914E, 0xD441, 0x914F, 0xD442, 0x91D5, + 0xD443, 0x91E2, 0xD444, 0x91DA, 0xD445, 0x965C, 0xD446, 0x965F, + 0xD447, 0x96BC, 0xD448, 0x98E3, 0xD449, 0x9ADF, 0xD44A, 0x9B2F, + 0xD44B, 0x4E7F, 0xD44C, 0x5070, 0xD44D, 0x506A, 0xD44E, 0x5061, + 0xD44F, 0x505E, 0xD450, 0x5060, 0xD451, 0x5053, 0xD452, 0x504B, + 0xD453, 0x505D, 0xD454, 0x5072, 0xD455, 0x5048, 0xD456, 0x504D, + 0xD457, 0x5041, 0xD458, 0x505B, 0xD459, 0x504A, 0xD45A, 0x5062, + 0xD45B, 0x5015, 0xD45C, 0x5045, 0xD45D, 0x505F, 0xD45E, 0x5069, + 0xD45F, 0x506B, 0xD460, 0x5063, 0xD461, 0x5064, 0xD462, 0x5046, + 0xD463, 0x5040, 0xD464, 0x506E, 0xD465, 0x5073, 0xD466, 0x5057, + 0xD467, 0x5051, 0xD468, 0x51D0, 0xD469, 0x526B, 0xD46A, 0x526D, + 0xD46B, 0x526C, 0xD46C, 0x526E, 0xD46D, 0x52D6, 0xD46E, 0x52D3, + 0xD46F, 0x532D, 0xD470, 0x539C, 0xD471, 0x5575, 0xD472, 0x5576, + 0xD473, 0x553C, 0xD474, 0x554D, 0xD475, 0x5550, 0xD476, 0x5534, + 0xD477, 0x552A, 0xD478, 0x5551, 0xD479, 0x5562, 0xD47A, 0x5536, + 0xD47B, 0x5535, 0xD47C, 0x5530, 0xD47D, 0x5552, 0xD47E, 0x5545, + 0xD4A1, 0x550C, 0xD4A2, 0x5532, 0xD4A3, 0x5565, 0xD4A4, 0x554E, + 0xD4A5, 0x5539, 0xD4A6, 0x5548, 0xD4A7, 0x552D, 0xD4A8, 0x553B, + 0xD4A9, 0x5540, 0xD4AA, 0x554B, 0xD4AB, 0x570A, 0xD4AC, 0x5707, + 0xD4AD, 0x57FB, 0xD4AE, 0x5814, 0xD4AF, 0x57E2, 0xD4B0, 0x57F6, + 0xD4B1, 0x57DC, 0xD4B2, 0x57F4, 0xD4B3, 0x5800, 0xD4B4, 0x57ED, + 0xD4B5, 0x57FD, 0xD4B6, 0x5808, 0xD4B7, 0x57F8, 0xD4B8, 0x580B, + 0xD4B9, 0x57F3, 0xD4BA, 0x57CF, 0xD4BB, 0x5807, 0xD4BC, 0x57EE, + 0xD4BD, 0x57E3, 0xD4BE, 0x57F2, 0xD4BF, 0x57E5, 0xD4C0, 0x57EC, + 0xD4C1, 0x57E1, 0xD4C2, 0x580E, 0xD4C3, 0x57FC, 0xD4C4, 0x5810, + 0xD4C5, 0x57E7, 0xD4C6, 0x5801, 0xD4C7, 0x580C, 0xD4C8, 0x57F1, + 0xD4C9, 0x57E9, 0xD4CA, 0x57F0, 0xD4CB, 0x580D, 0xD4CC, 0x5804, + 0xD4CD, 0x595C, 0xD4CE, 0x5A60, 0xD4CF, 0x5A58, 0xD4D0, 0x5A55, + 0xD4D1, 0x5A67, 0xD4D2, 0x5A5E, 0xD4D3, 0x5A38, 0xD4D4, 0x5A35, + 0xD4D5, 0x5A6D, 0xD4D6, 0x5A50, 0xD4D7, 0x5A5F, 0xD4D8, 0x5A65, + 0xD4D9, 0x5A6C, 0xD4DA, 0x5A53, 0xD4DB, 0x5A64, 0xD4DC, 0x5A57, + 0xD4DD, 0x5A43, 0xD4DE, 0x5A5D, 0xD4DF, 0x5A52, 0xD4E0, 0x5A44, + 0xD4E1, 0x5A5B, 0xD4E2, 0x5A48, 0xD4E3, 0x5A8E, 0xD4E4, 0x5A3E, + 0xD4E5, 0x5A4D, 0xD4E6, 0x5A39, 0xD4E7, 0x5A4C, 0xD4E8, 0x5A70, + 0xD4E9, 0x5A69, 0xD4EA, 0x5A47, 0xD4EB, 0x5A51, 0xD4EC, 0x5A56, + 0xD4ED, 0x5A42, 0xD4EE, 0x5A5C, 0xD4EF, 0x5B72, 0xD4F0, 0x5B6E, + 0xD4F1, 0x5BC1, 0xD4F2, 0x5BC0, 0xD4F3, 0x5C59, 0xD4F4, 0x5D1E, + 0xD4F5, 0x5D0B, 0xD4F6, 0x5D1D, 0xD4F7, 0x5D1A, 0xD4F8, 0x5D20, + 0xD4F9, 0x5D0C, 0xD4FA, 0x5D28, 0xD4FB, 0x5D0D, 0xD4FC, 0x5D26, + 0xD4FD, 0x5D25, 0xD4FE, 0x5D0F, 0xD540, 0x5D30, 0xD541, 0x5D12, + 0xD542, 0x5D23, 0xD543, 0x5D1F, 0xD544, 0x5D2E, 0xD545, 0x5E3E, + 0xD546, 0x5E34, 0xD547, 0x5EB1, 0xD548, 0x5EB4, 0xD549, 0x5EB9, + 0xD54A, 0x5EB2, 0xD54B, 0x5EB3, 0xD54C, 0x5F36, 0xD54D, 0x5F38, + 0xD54E, 0x5F9B, 0xD54F, 0x5F96, 0xD550, 0x5F9F, 0xD551, 0x608A, + 0xD552, 0x6090, 0xD553, 0x6086, 0xD554, 0x60BE, 0xD555, 0x60B0, + 0xD556, 0x60BA, 0xD557, 0x60D3, 0xD558, 0x60D4, 0xD559, 0x60CF, + 0xD55A, 0x60E4, 0xD55B, 0x60D9, 0xD55C, 0x60DD, 0xD55D, 0x60C8, + 0xD55E, 0x60B1, 0xD55F, 0x60DB, 0xD560, 0x60B7, 0xD561, 0x60CA, + 0xD562, 0x60BF, 0xD563, 0x60C3, 0xD564, 0x60CD, 0xD565, 0x60C0, + 0xD566, 0x6332, 0xD567, 0x6365, 0xD568, 0x638A, 0xD569, 0x6382, + 0xD56A, 0x637D, 0xD56B, 0x63BD, 0xD56C, 0x639E, 0xD56D, 0x63AD, + 0xD56E, 0x639D, 0xD56F, 0x6397, 0xD570, 0x63AB, 0xD571, 0x638E, + 0xD572, 0x636F, 0xD573, 0x6387, 0xD574, 0x6390, 0xD575, 0x636E, + 0xD576, 0x63AF, 0xD577, 0x6375, 0xD578, 0x639C, 0xD579, 0x636D, + 0xD57A, 0x63AE, 0xD57B, 0x637C, 0xD57C, 0x63A4, 0xD57D, 0x633B, + 0xD57E, 0x639F, 0xD5A1, 0x6378, 0xD5A2, 0x6385, 0xD5A3, 0x6381, + 0xD5A4, 0x6391, 0xD5A5, 0x638D, 0xD5A6, 0x6370, 0xD5A7, 0x6553, + 0xD5A8, 0x65CD, 0xD5A9, 0x6665, 0xD5AA, 0x6661, 0xD5AB, 0x665B, + 0xD5AC, 0x6659, 0xD5AD, 0x665C, 0xD5AE, 0x6662, 0xD5AF, 0x6718, + 0xD5B0, 0x6879, 0xD5B1, 0x6887, 0xD5B2, 0x6890, 0xD5B3, 0x689C, + 0xD5B4, 0x686D, 0xD5B5, 0x686E, 0xD5B6, 0x68AE, 0xD5B7, 0x68AB, + 0xD5B8, 0x6956, 0xD5B9, 0x686F, 0xD5BA, 0x68A3, 0xD5BB, 0x68AC, + 0xD5BC, 0x68A9, 0xD5BD, 0x6875, 0xD5BE, 0x6874, 0xD5BF, 0x68B2, + 0xD5C0, 0x688F, 0xD5C1, 0x6877, 0xD5C2, 0x6892, 0xD5C3, 0x687C, + 0xD5C4, 0x686B, 0xD5C5, 0x6872, 0xD5C6, 0x68AA, 0xD5C7, 0x6880, + 0xD5C8, 0x6871, 0xD5C9, 0x687E, 0xD5CA, 0x689B, 0xD5CB, 0x6896, + 0xD5CC, 0x688B, 0xD5CD, 0x68A0, 0xD5CE, 0x6889, 0xD5CF, 0x68A4, + 0xD5D0, 0x6878, 0xD5D1, 0x687B, 0xD5D2, 0x6891, 0xD5D3, 0x688C, + 0xD5D4, 0x688A, 0xD5D5, 0x687D, 0xD5D6, 0x6B36, 0xD5D7, 0x6B33, + 0xD5D8, 0x6B37, 0xD5D9, 0x6B38, 0xD5DA, 0x6B91, 0xD5DB, 0x6B8F, + 0xD5DC, 0x6B8D, 0xD5DD, 0x6B8E, 0xD5DE, 0x6B8C, 0xD5DF, 0x6C2A, + 0xD5E0, 0x6DC0, 0xD5E1, 0x6DAB, 0xD5E2, 0x6DB4, 0xD5E3, 0x6DB3, + 0xD5E4, 0x6E74, 0xD5E5, 0x6DAC, 0xD5E6, 0x6DE9, 0xD5E7, 0x6DE2, + 0xD5E8, 0x6DB7, 0xD5E9, 0x6DF6, 0xD5EA, 0x6DD4, 0xD5EB, 0x6E00, + 0xD5EC, 0x6DC8, 0xD5ED, 0x6DE0, 0xD5EE, 0x6DDF, 0xD5EF, 0x6DD6, + 0xD5F0, 0x6DBE, 0xD5F1, 0x6DE5, 0xD5F2, 0x6DDC, 0xD5F3, 0x6DDD, + 0xD5F4, 0x6DDB, 0xD5F5, 0x6DF4, 0xD5F6, 0x6DCA, 0xD5F7, 0x6DBD, + 0xD5F8, 0x6DED, 0xD5F9, 0x6DF0, 0xD5FA, 0x6DBA, 0xD5FB, 0x6DD5, + 0xD5FC, 0x6DC2, 0xD5FD, 0x6DCF, 0xD5FE, 0x6DC9, 0xD640, 0x6DD0, + 0xD641, 0x6DF2, 0xD642, 0x6DD3, 0xD643, 0x6DFD, 0xD644, 0x6DD7, + 0xD645, 0x6DCD, 0xD646, 0x6DE3, 0xD647, 0x6DBB, 0xD648, 0x70FA, + 0xD649, 0x710D, 0xD64A, 0x70F7, 0xD64B, 0x7117, 0xD64C, 0x70F4, + 0xD64D, 0x710C, 0xD64E, 0x70F0, 0xD64F, 0x7104, 0xD650, 0x70F3, + 0xD651, 0x7110, 0xD652, 0x70FC, 0xD653, 0x70FF, 0xD654, 0x7106, + 0xD655, 0x7113, 0xD656, 0x7100, 0xD657, 0x70F8, 0xD658, 0x70F6, + 0xD659, 0x710B, 0xD65A, 0x7102, 0xD65B, 0x710E, 0xD65C, 0x727E, + 0xD65D, 0x727B, 0xD65E, 0x727C, 0xD65F, 0x727F, 0xD660, 0x731D, + 0xD661, 0x7317, 0xD662, 0x7307, 0xD663, 0x7311, 0xD664, 0x7318, + 0xD665, 0x730A, 0xD666, 0x7308, 0xD667, 0x72FF, 0xD668, 0x730F, + 0xD669, 0x731E, 0xD66A, 0x7388, 0xD66B, 0x73F6, 0xD66C, 0x73F8, + 0xD66D, 0x73F5, 0xD66E, 0x7404, 0xD66F, 0x7401, 0xD670, 0x73FD, + 0xD671, 0x7407, 0xD672, 0x7400, 0xD673, 0x73FA, 0xD674, 0x73FC, + 0xD675, 0x73FF, 0xD676, 0x740C, 0xD677, 0x740B, 0xD678, 0x73F4, + 0xD679, 0x7408, 0xD67A, 0x7564, 0xD67B, 0x7563, 0xD67C, 0x75CE, + 0xD67D, 0x75D2, 0xD67E, 0x75CF, 0xD6A1, 0x75CB, 0xD6A2, 0x75CC, + 0xD6A3, 0x75D1, 0xD6A4, 0x75D0, 0xD6A5, 0x768F, 0xD6A6, 0x7689, + 0xD6A7, 0x76D3, 0xD6A8, 0x7739, 0xD6A9, 0x772F, 0xD6AA, 0x772D, + 0xD6AB, 0x7731, 0xD6AC, 0x7732, 0xD6AD, 0x7734, 0xD6AE, 0x7733, + 0xD6AF, 0x773D, 0xD6B0, 0x7725, 0xD6B1, 0x773B, 0xD6B2, 0x7735, + 0xD6B3, 0x7848, 0xD6B4, 0x7852, 0xD6B5, 0x7849, 0xD6B6, 0x784D, + 0xD6B7, 0x784A, 0xD6B8, 0x784C, 0xD6B9, 0x7826, 0xD6BA, 0x7845, + 0xD6BB, 0x7850, 0xD6BC, 0x7964, 0xD6BD, 0x7967, 0xD6BE, 0x7969, + 0xD6BF, 0x796A, 0xD6C0, 0x7963, 0xD6C1, 0x796B, 0xD6C2, 0x7961, + 0xD6C3, 0x79BB, 0xD6C4, 0x79FA, 0xD6C5, 0x79F8, 0xD6C6, 0x79F6, + 0xD6C7, 0x79F7, 0xD6C8, 0x7A8F, 0xD6C9, 0x7A94, 0xD6CA, 0x7A90, + 0xD6CB, 0x7B35, 0xD6CC, 0x7B47, 0xD6CD, 0x7B34, 0xD6CE, 0x7B25, + 0xD6CF, 0x7B30, 0xD6D0, 0x7B22, 0xD6D1, 0x7B24, 0xD6D2, 0x7B33, + 0xD6D3, 0x7B18, 0xD6D4, 0x7B2A, 0xD6D5, 0x7B1D, 0xD6D6, 0x7B31, + 0xD6D7, 0x7B2B, 0xD6D8, 0x7B2D, 0xD6D9, 0x7B2F, 0xD6DA, 0x7B32, + 0xD6DB, 0x7B38, 0xD6DC, 0x7B1A, 0xD6DD, 0x7B23, 0xD6DE, 0x7C94, + 0xD6DF, 0x7C98, 0xD6E0, 0x7C96, 0xD6E1, 0x7CA3, 0xD6E2, 0x7D35, + 0xD6E3, 0x7D3D, 0xD6E4, 0x7D38, 0xD6E5, 0x7D36, 0xD6E6, 0x7D3A, + 0xD6E7, 0x7D45, 0xD6E8, 0x7D2C, 0xD6E9, 0x7D29, 0xD6EA, 0x7D41, + 0xD6EB, 0x7D47, 0xD6EC, 0x7D3E, 0xD6ED, 0x7D3F, 0xD6EE, 0x7D4A, + 0xD6EF, 0x7D3B, 0xD6F0, 0x7D28, 0xD6F1, 0x7F63, 0xD6F2, 0x7F95, + 0xD6F3, 0x7F9C, 0xD6F4, 0x7F9D, 0xD6F5, 0x7F9B, 0xD6F6, 0x7FCA, + 0xD6F7, 0x7FCB, 0xD6F8, 0x7FCD, 0xD6F9, 0x7FD0, 0xD6FA, 0x7FD1, + 0xD6FB, 0x7FC7, 0xD6FC, 0x7FCF, 0xD6FD, 0x7FC9, 0xD6FE, 0x801F, + 0xD740, 0x801E, 0xD741, 0x801B, 0xD742, 0x8047, 0xD743, 0x8043, + 0xD744, 0x8048, 0xD745, 0x8118, 0xD746, 0x8125, 0xD747, 0x8119, + 0xD748, 0x811B, 0xD749, 0x812D, 0xD74A, 0x811F, 0xD74B, 0x812C, + 0xD74C, 0x811E, 0xD74D, 0x8121, 0xD74E, 0x8115, 0xD74F, 0x8127, + 0xD750, 0x811D, 0xD751, 0x8122, 0xD752, 0x8211, 0xD753, 0x8238, + 0xD754, 0x8233, 0xD755, 0x823A, 0xD756, 0x8234, 0xD757, 0x8232, + 0xD758, 0x8274, 0xD759, 0x8390, 0xD75A, 0x83A3, 0xD75B, 0x83A8, + 0xD75C, 0x838D, 0xD75D, 0x837A, 0xD75E, 0x8373, 0xD75F, 0x83A4, + 0xD760, 0x8374, 0xD761, 0x838F, 0xD762, 0x8381, 0xD763, 0x8395, + 0xD764, 0x8399, 0xD765, 0x8375, 0xD766, 0x8394, 0xD767, 0x83A9, + 0xD768, 0x837D, 0xD769, 0x8383, 0xD76A, 0x838C, 0xD76B, 0x839D, + 0xD76C, 0x839B, 0xD76D, 0x83AA, 0xD76E, 0x838B, 0xD76F, 0x837E, + 0xD770, 0x83A5, 0xD771, 0x83AF, 0xD772, 0x8388, 0xD773, 0x8397, + 0xD774, 0x83B0, 0xD775, 0x837F, 0xD776, 0x83A6, 0xD777, 0x8387, + 0xD778, 0x83AE, 0xD779, 0x8376, 0xD77A, 0x839A, 0xD77B, 0x8659, + 0xD77C, 0x8656, 0xD77D, 0x86BF, 0xD77E, 0x86B7, 0xD7A1, 0x86C2, + 0xD7A2, 0x86C1, 0xD7A3, 0x86C5, 0xD7A4, 0x86BA, 0xD7A5, 0x86B0, + 0xD7A6, 0x86C8, 0xD7A7, 0x86B9, 0xD7A8, 0x86B3, 0xD7A9, 0x86B8, + 0xD7AA, 0x86CC, 0xD7AB, 0x86B4, 0xD7AC, 0x86BB, 0xD7AD, 0x86BC, + 0xD7AE, 0x86C3, 0xD7AF, 0x86BD, 0xD7B0, 0x86BE, 0xD7B1, 0x8852, + 0xD7B2, 0x8889, 0xD7B3, 0x8895, 0xD7B4, 0x88A8, 0xD7B5, 0x88A2, + 0xD7B6, 0x88AA, 0xD7B7, 0x889A, 0xD7B8, 0x8891, 0xD7B9, 0x88A1, + 0xD7BA, 0x889F, 0xD7BB, 0x8898, 0xD7BC, 0x88A7, 0xD7BD, 0x8899, + 0xD7BE, 0x889B, 0xD7BF, 0x8897, 0xD7C0, 0x88A4, 0xD7C1, 0x88AC, + 0xD7C2, 0x888C, 0xD7C3, 0x8893, 0xD7C4, 0x888E, 0xD7C5, 0x8982, + 0xD7C6, 0x89D6, 0xD7C7, 0x89D9, 0xD7C8, 0x89D5, 0xD7C9, 0x8A30, + 0xD7CA, 0x8A27, 0xD7CB, 0x8A2C, 0xD7CC, 0x8A1E, 0xD7CD, 0x8C39, + 0xD7CE, 0x8C3B, 0xD7CF, 0x8C5C, 0xD7D0, 0x8C5D, 0xD7D1, 0x8C7D, + 0xD7D2, 0x8CA5, 0xD7D3, 0x8D7D, 0xD7D4, 0x8D7B, 0xD7D5, 0x8D79, + 0xD7D6, 0x8DBC, 0xD7D7, 0x8DC2, 0xD7D8, 0x8DB9, 0xD7D9, 0x8DBF, + 0xD7DA, 0x8DC1, 0xD7DB, 0x8ED8, 0xD7DC, 0x8EDE, 0xD7DD, 0x8EDD, + 0xD7DE, 0x8EDC, 0xD7DF, 0x8ED7, 0xD7E0, 0x8EE0, 0xD7E1, 0x8EE1, + 0xD7E2, 0x9024, 0xD7E3, 0x900B, 0xD7E4, 0x9011, 0xD7E5, 0x901C, + 0xD7E6, 0x900C, 0xD7E7, 0x9021, 0xD7E8, 0x90EF, 0xD7E9, 0x90EA, + 0xD7EA, 0x90F0, 0xD7EB, 0x90F4, 0xD7EC, 0x90F2, 0xD7ED, 0x90F3, + 0xD7EE, 0x90D4, 0xD7EF, 0x90EB, 0xD7F0, 0x90EC, 0xD7F1, 0x90E9, + 0xD7F2, 0x9156, 0xD7F3, 0x9158, 0xD7F4, 0x915A, 0xD7F5, 0x9153, + 0xD7F6, 0x9155, 0xD7F7, 0x91EC, 0xD7F8, 0x91F4, 0xD7F9, 0x91F1, + 0xD7FA, 0x91F3, 0xD7FB, 0x91F8, 0xD7FC, 0x91E4, 0xD7FD, 0x91F9, + 0xD7FE, 0x91EA, 0xD840, 0x91EB, 0xD841, 0x91F7, 0xD842, 0x91E8, + 0xD843, 0x91EE, 0xD844, 0x957A, 0xD845, 0x9586, 0xD846, 0x9588, + 0xD847, 0x967C, 0xD848, 0x966D, 0xD849, 0x966B, 0xD84A, 0x9671, + 0xD84B, 0x966F, 0xD84C, 0x96BF, 0xD84D, 0x976A, 0xD84E, 0x9804, + 0xD84F, 0x98E5, 0xD850, 0x9997, 0xD851, 0x509B, 0xD852, 0x5095, + 0xD853, 0x5094, 0xD854, 0x509E, 0xD855, 0x508B, 0xD856, 0x50A3, + 0xD857, 0x5083, 0xD858, 0x508C, 0xD859, 0x508E, 0xD85A, 0x509D, + 0xD85B, 0x5068, 0xD85C, 0x509C, 0xD85D, 0x5092, 0xD85E, 0x5082, + 0xD85F, 0x5087, 0xD860, 0x515F, 0xD861, 0x51D4, 0xD862, 0x5312, + 0xD863, 0x5311, 0xD864, 0x53A4, 0xD865, 0x53A7, 0xD866, 0x5591, + 0xD867, 0x55A8, 0xD868, 0x55A5, 0xD869, 0x55AD, 0xD86A, 0x5577, + 0xD86B, 0x5645, 0xD86C, 0x55A2, 0xD86D, 0x5593, 0xD86E, 0x5588, + 0xD86F, 0x558F, 0xD870, 0x55B5, 0xD871, 0x5581, 0xD872, 0x55A3, + 0xD873, 0x5592, 0xD874, 0x55A4, 0xD875, 0x557D, 0xD876, 0x558C, + 0xD877, 0x55A6, 0xD878, 0x557F, 0xD879, 0x5595, 0xD87A, 0x55A1, + 0xD87B, 0x558E, 0xD87C, 0x570C, 0xD87D, 0x5829, 0xD87E, 0x5837, + 0xD8A1, 0x5819, 0xD8A2, 0x581E, 0xD8A3, 0x5827, 0xD8A4, 0x5823, + 0xD8A5, 0x5828, 0xD8A6, 0x57F5, 0xD8A7, 0x5848, 0xD8A8, 0x5825, + 0xD8A9, 0x581C, 0xD8AA, 0x581B, 0xD8AB, 0x5833, 0xD8AC, 0x583F, + 0xD8AD, 0x5836, 0xD8AE, 0x582E, 0xD8AF, 0x5839, 0xD8B0, 0x5838, + 0xD8B1, 0x582D, 0xD8B2, 0x582C, 0xD8B3, 0x583B, 0xD8B4, 0x5961, + 0xD8B5, 0x5AAF, 0xD8B6, 0x5A94, 0xD8B7, 0x5A9F, 0xD8B8, 0x5A7A, + 0xD8B9, 0x5AA2, 0xD8BA, 0x5A9E, 0xD8BB, 0x5A78, 0xD8BC, 0x5AA6, + 0xD8BD, 0x5A7C, 0xD8BE, 0x5AA5, 0xD8BF, 0x5AAC, 0xD8C0, 0x5A95, + 0xD8C1, 0x5AAE, 0xD8C2, 0x5A37, 0xD8C3, 0x5A84, 0xD8C4, 0x5A8A, + 0xD8C5, 0x5A97, 0xD8C6, 0x5A83, 0xD8C7, 0x5A8B, 0xD8C8, 0x5AA9, + 0xD8C9, 0x5A7B, 0xD8CA, 0x5A7D, 0xD8CB, 0x5A8C, 0xD8CC, 0x5A9C, + 0xD8CD, 0x5A8F, 0xD8CE, 0x5A93, 0xD8CF, 0x5A9D, 0xD8D0, 0x5BEA, + 0xD8D1, 0x5BCD, 0xD8D2, 0x5BCB, 0xD8D3, 0x5BD4, 0xD8D4, 0x5BD1, + 0xD8D5, 0x5BCA, 0xD8D6, 0x5BCE, 0xD8D7, 0x5C0C, 0xD8D8, 0x5C30, + 0xD8D9, 0x5D37, 0xD8DA, 0x5D43, 0xD8DB, 0x5D6B, 0xD8DC, 0x5D41, + 0xD8DD, 0x5D4B, 0xD8DE, 0x5D3F, 0xD8DF, 0x5D35, 0xD8E0, 0x5D51, + 0xD8E1, 0x5D4E, 0xD8E2, 0x5D55, 0xD8E3, 0x5D33, 0xD8E4, 0x5D3A, + 0xD8E5, 0x5D52, 0xD8E6, 0x5D3D, 0xD8E7, 0x5D31, 0xD8E8, 0x5D59, + 0xD8E9, 0x5D42, 0xD8EA, 0x5D39, 0xD8EB, 0x5D49, 0xD8EC, 0x5D38, + 0xD8ED, 0x5D3C, 0xD8EE, 0x5D32, 0xD8EF, 0x5D36, 0xD8F0, 0x5D40, + 0xD8F1, 0x5D45, 0xD8F2, 0x5E44, 0xD8F3, 0x5E41, 0xD8F4, 0x5F58, + 0xD8F5, 0x5FA6, 0xD8F6, 0x5FA5, 0xD8F7, 0x5FAB, 0xD8F8, 0x60C9, + 0xD8F9, 0x60B9, 0xD8FA, 0x60CC, 0xD8FB, 0x60E2, 0xD8FC, 0x60CE, + 0xD8FD, 0x60C4, 0xD8FE, 0x6114, 0xD940, 0x60F2, 0xD941, 0x610A, + 0xD942, 0x6116, 0xD943, 0x6105, 0xD944, 0x60F5, 0xD945, 0x6113, + 0xD946, 0x60F8, 0xD947, 0x60FC, 0xD948, 0x60FE, 0xD949, 0x60C1, + 0xD94A, 0x6103, 0xD94B, 0x6118, 0xD94C, 0x611D, 0xD94D, 0x6110, + 0xD94E, 0x60FF, 0xD94F, 0x6104, 0xD950, 0x610B, 0xD951, 0x624A, + 0xD952, 0x6394, 0xD953, 0x63B1, 0xD954, 0x63B0, 0xD955, 0x63CE, + 0xD956, 0x63E5, 0xD957, 0x63E8, 0xD958, 0x63EF, 0xD959, 0x63C3, + 0xD95A, 0x649D, 0xD95B, 0x63F3, 0xD95C, 0x63CA, 0xD95D, 0x63E0, + 0xD95E, 0x63F6, 0xD95F, 0x63D5, 0xD960, 0x63F2, 0xD961, 0x63F5, + 0xD962, 0x6461, 0xD963, 0x63DF, 0xD964, 0x63BE, 0xD965, 0x63DD, + 0xD966, 0x63DC, 0xD967, 0x63C4, 0xD968, 0x63D8, 0xD969, 0x63D3, + 0xD96A, 0x63C2, 0xD96B, 0x63C7, 0xD96C, 0x63CC, 0xD96D, 0x63CB, + 0xD96E, 0x63C8, 0xD96F, 0x63F0, 0xD970, 0x63D7, 0xD971, 0x63D9, + 0xD972, 0x6532, 0xD973, 0x6567, 0xD974, 0x656A, 0xD975, 0x6564, + 0xD976, 0x655C, 0xD977, 0x6568, 0xD978, 0x6565, 0xD979, 0x658C, + 0xD97A, 0x659D, 0xD97B, 0x659E, 0xD97C, 0x65AE, 0xD97D, 0x65D0, + 0xD97E, 0x65D2, 0xD9A1, 0x667C, 0xD9A2, 0x666C, 0xD9A3, 0x667B, + 0xD9A4, 0x6680, 0xD9A5, 0x6671, 0xD9A6, 0x6679, 0xD9A7, 0x666A, + 0xD9A8, 0x6672, 0xD9A9, 0x6701, 0xD9AA, 0x690C, 0xD9AB, 0x68D3, + 0xD9AC, 0x6904, 0xD9AD, 0x68DC, 0xD9AE, 0x692A, 0xD9AF, 0x68EC, + 0xD9B0, 0x68EA, 0xD9B1, 0x68F1, 0xD9B2, 0x690F, 0xD9B3, 0x68D6, + 0xD9B4, 0x68F7, 0xD9B5, 0x68EB, 0xD9B6, 0x68E4, 0xD9B7, 0x68F6, + 0xD9B8, 0x6913, 0xD9B9, 0x6910, 0xD9BA, 0x68F3, 0xD9BB, 0x68E1, + 0xD9BC, 0x6907, 0xD9BD, 0x68CC, 0xD9BE, 0x6908, 0xD9BF, 0x6970, + 0xD9C0, 0x68B4, 0xD9C1, 0x6911, 0xD9C2, 0x68EF, 0xD9C3, 0x68C6, + 0xD9C4, 0x6914, 0xD9C5, 0x68F8, 0xD9C6, 0x68D0, 0xD9C7, 0x68FD, + 0xD9C8, 0x68FC, 0xD9C9, 0x68E8, 0xD9CA, 0x690B, 0xD9CB, 0x690A, + 0xD9CC, 0x6917, 0xD9CD, 0x68CE, 0xD9CE, 0x68C8, 0xD9CF, 0x68DD, + 0xD9D0, 0x68DE, 0xD9D1, 0x68E6, 0xD9D2, 0x68F4, 0xD9D3, 0x68D1, + 0xD9D4, 0x6906, 0xD9D5, 0x68D4, 0xD9D6, 0x68E9, 0xD9D7, 0x6915, + 0xD9D8, 0x6925, 0xD9D9, 0x68C7, 0xD9DA, 0x6B39, 0xD9DB, 0x6B3B, + 0xD9DC, 0x6B3F, 0xD9DD, 0x6B3C, 0xD9DE, 0x6B94, 0xD9DF, 0x6B97, + 0xD9E0, 0x6B99, 0xD9E1, 0x6B95, 0xD9E2, 0x6BBD, 0xD9E3, 0x6BF0, + 0xD9E4, 0x6BF2, 0xD9E5, 0x6BF3, 0xD9E6, 0x6C30, 0xD9E7, 0x6DFC, + 0xD9E8, 0x6E46, 0xD9E9, 0x6E47, 0xD9EA, 0x6E1F, 0xD9EB, 0x6E49, + 0xD9EC, 0x6E88, 0xD9ED, 0x6E3C, 0xD9EE, 0x6E3D, 0xD9EF, 0x6E45, + 0xD9F0, 0x6E62, 0xD9F1, 0x6E2B, 0xD9F2, 0x6E3F, 0xD9F3, 0x6E41, + 0xD9F4, 0x6E5D, 0xD9F5, 0x6E73, 0xD9F6, 0x6E1C, 0xD9F7, 0x6E33, + 0xD9F8, 0x6E4B, 0xD9F9, 0x6E40, 0xD9FA, 0x6E51, 0xD9FB, 0x6E3B, + 0xD9FC, 0x6E03, 0xD9FD, 0x6E2E, 0xD9FE, 0x6E5E, 0xDA40, 0x6E68, + 0xDA41, 0x6E5C, 0xDA42, 0x6E61, 0xDA43, 0x6E31, 0xDA44, 0x6E28, + 0xDA45, 0x6E60, 0xDA46, 0x6E71, 0xDA47, 0x6E6B, 0xDA48, 0x6E39, + 0xDA49, 0x6E22, 0xDA4A, 0x6E30, 0xDA4B, 0x6E53, 0xDA4C, 0x6E65, + 0xDA4D, 0x6E27, 0xDA4E, 0x6E78, 0xDA4F, 0x6E64, 0xDA50, 0x6E77, + 0xDA51, 0x6E55, 0xDA52, 0x6E79, 0xDA53, 0x6E52, 0xDA54, 0x6E66, + 0xDA55, 0x6E35, 0xDA56, 0x6E36, 0xDA57, 0x6E5A, 0xDA58, 0x7120, + 0xDA59, 0x711E, 0xDA5A, 0x712F, 0xDA5B, 0x70FB, 0xDA5C, 0x712E, + 0xDA5D, 0x7131, 0xDA5E, 0x7123, 0xDA5F, 0x7125, 0xDA60, 0x7122, + 0xDA61, 0x7132, 0xDA62, 0x711F, 0xDA63, 0x7128, 0xDA64, 0x713A, + 0xDA65, 0x711B, 0xDA66, 0x724B, 0xDA67, 0x725A, 0xDA68, 0x7288, + 0xDA69, 0x7289, 0xDA6A, 0x7286, 0xDA6B, 0x7285, 0xDA6C, 0x728B, + 0xDA6D, 0x7312, 0xDA6E, 0x730B, 0xDA6F, 0x7330, 0xDA70, 0x7322, + 0xDA71, 0x7331, 0xDA72, 0x7333, 0xDA73, 0x7327, 0xDA74, 0x7332, + 0xDA75, 0x732D, 0xDA76, 0x7326, 0xDA77, 0x7323, 0xDA78, 0x7335, + 0xDA79, 0x730C, 0xDA7A, 0x742E, 0xDA7B, 0x742C, 0xDA7C, 0x7430, + 0xDA7D, 0x742B, 0xDA7E, 0x7416, 0xDAA1, 0x741A, 0xDAA2, 0x7421, + 0xDAA3, 0x742D, 0xDAA4, 0x7431, 0xDAA5, 0x7424, 0xDAA6, 0x7423, + 0xDAA7, 0x741D, 0xDAA8, 0x7429, 0xDAA9, 0x7420, 0xDAAA, 0x7432, + 0xDAAB, 0x74FB, 0xDAAC, 0x752F, 0xDAAD, 0x756F, 0xDAAE, 0x756C, + 0xDAAF, 0x75E7, 0xDAB0, 0x75DA, 0xDAB1, 0x75E1, 0xDAB2, 0x75E6, + 0xDAB3, 0x75DD, 0xDAB4, 0x75DF, 0xDAB5, 0x75E4, 0xDAB6, 0x75D7, + 0xDAB7, 0x7695, 0xDAB8, 0x7692, 0xDAB9, 0x76DA, 0xDABA, 0x7746, + 0xDABB, 0x7747, 0xDABC, 0x7744, 0xDABD, 0x774D, 0xDABE, 0x7745, + 0xDABF, 0x774A, 0xDAC0, 0x774E, 0xDAC1, 0x774B, 0xDAC2, 0x774C, + 0xDAC3, 0x77DE, 0xDAC4, 0x77EC, 0xDAC5, 0x7860, 0xDAC6, 0x7864, + 0xDAC7, 0x7865, 0xDAC8, 0x785C, 0xDAC9, 0x786D, 0xDACA, 0x7871, + 0xDACB, 0x786A, 0xDACC, 0x786E, 0xDACD, 0x7870, 0xDACE, 0x7869, + 0xDACF, 0x7868, 0xDAD0, 0x785E, 0xDAD1, 0x7862, 0xDAD2, 0x7974, + 0xDAD3, 0x7973, 0xDAD4, 0x7972, 0xDAD5, 0x7970, 0xDAD6, 0x7A02, + 0xDAD7, 0x7A0A, 0xDAD8, 0x7A03, 0xDAD9, 0x7A0C, 0xDADA, 0x7A04, + 0xDADB, 0x7A99, 0xDADC, 0x7AE6, 0xDADD, 0x7AE4, 0xDADE, 0x7B4A, + 0xDADF, 0x7B3B, 0xDAE0, 0x7B44, 0xDAE1, 0x7B48, 0xDAE2, 0x7B4C, + 0xDAE3, 0x7B4E, 0xDAE4, 0x7B40, 0xDAE5, 0x7B58, 0xDAE6, 0x7B45, + 0xDAE7, 0x7CA2, 0xDAE8, 0x7C9E, 0xDAE9, 0x7CA8, 0xDAEA, 0x7CA1, + 0xDAEB, 0x7D58, 0xDAEC, 0x7D6F, 0xDAED, 0x7D63, 0xDAEE, 0x7D53, + 0xDAEF, 0x7D56, 0xDAF0, 0x7D67, 0xDAF1, 0x7D6A, 0xDAF2, 0x7D4F, + 0xDAF3, 0x7D6D, 0xDAF4, 0x7D5C, 0xDAF5, 0x7D6B, 0xDAF6, 0x7D52, + 0xDAF7, 0x7D54, 0xDAF8, 0x7D69, 0xDAF9, 0x7D51, 0xDAFA, 0x7D5F, + 0xDAFB, 0x7D4E, 0xDAFC, 0x7F3E, 0xDAFD, 0x7F3F, 0xDAFE, 0x7F65, + 0xDB40, 0x7F66, 0xDB41, 0x7FA2, 0xDB42, 0x7FA0, 0xDB43, 0x7FA1, + 0xDB44, 0x7FD7, 0xDB45, 0x8051, 0xDB46, 0x804F, 0xDB47, 0x8050, + 0xDB48, 0x80FE, 0xDB49, 0x80D4, 0xDB4A, 0x8143, 0xDB4B, 0x814A, + 0xDB4C, 0x8152, 0xDB4D, 0x814F, 0xDB4E, 0x8147, 0xDB4F, 0x813D, + 0xDB50, 0x814D, 0xDB51, 0x813A, 0xDB52, 0x81E6, 0xDB53, 0x81EE, + 0xDB54, 0x81F7, 0xDB55, 0x81F8, 0xDB56, 0x81F9, 0xDB57, 0x8204, + 0xDB58, 0x823C, 0xDB59, 0x823D, 0xDB5A, 0x823F, 0xDB5B, 0x8275, + 0xDB5C, 0x833B, 0xDB5D, 0x83CF, 0xDB5E, 0x83F9, 0xDB5F, 0x8423, + 0xDB60, 0x83C0, 0xDB61, 0x83E8, 0xDB62, 0x8412, 0xDB63, 0x83E7, + 0xDB64, 0x83E4, 0xDB65, 0x83FC, 0xDB66, 0x83F6, 0xDB67, 0x8410, + 0xDB68, 0x83C6, 0xDB69, 0x83C8, 0xDB6A, 0x83EB, 0xDB6B, 0x83E3, + 0xDB6C, 0x83BF, 0xDB6D, 0x8401, 0xDB6E, 0x83DD, 0xDB6F, 0x83E5, + 0xDB70, 0x83D8, 0xDB71, 0x83FF, 0xDB72, 0x83E1, 0xDB73, 0x83CB, + 0xDB74, 0x83CE, 0xDB75, 0x83D6, 0xDB76, 0x83F5, 0xDB77, 0x83C9, + 0xDB78, 0x8409, 0xDB79, 0x840F, 0xDB7A, 0x83DE, 0xDB7B, 0x8411, + 0xDB7C, 0x8406, 0xDB7D, 0x83C2, 0xDB7E, 0x83F3, 0xDBA1, 0x83D5, + 0xDBA2, 0x83FA, 0xDBA3, 0x83C7, 0xDBA4, 0x83D1, 0xDBA5, 0x83EA, + 0xDBA6, 0x8413, 0xDBA7, 0x83C3, 0xDBA8, 0x83EC, 0xDBA9, 0x83EE, + 0xDBAA, 0x83C4, 0xDBAB, 0x83FB, 0xDBAC, 0x83D7, 0xDBAD, 0x83E2, + 0xDBAE, 0x841B, 0xDBAF, 0x83DB, 0xDBB0, 0x83FE, 0xDBB1, 0x86D8, + 0xDBB2, 0x86E2, 0xDBB3, 0x86E6, 0xDBB4, 0x86D3, 0xDBB5, 0x86E3, + 0xDBB6, 0x86DA, 0xDBB7, 0x86EA, 0xDBB8, 0x86DD, 0xDBB9, 0x86EB, + 0xDBBA, 0x86DC, 0xDBBB, 0x86EC, 0xDBBC, 0x86E9, 0xDBBD, 0x86D7, + 0xDBBE, 0x86E8, 0xDBBF, 0x86D1, 0xDBC0, 0x8848, 0xDBC1, 0x8856, + 0xDBC2, 0x8855, 0xDBC3, 0x88BA, 0xDBC4, 0x88D7, 0xDBC5, 0x88B9, + 0xDBC6, 0x88B8, 0xDBC7, 0x88C0, 0xDBC8, 0x88BE, 0xDBC9, 0x88B6, + 0xDBCA, 0x88BC, 0xDBCB, 0x88B7, 0xDBCC, 0x88BD, 0xDBCD, 0x88B2, + 0xDBCE, 0x8901, 0xDBCF, 0x88C9, 0xDBD0, 0x8995, 0xDBD1, 0x8998, + 0xDBD2, 0x8997, 0xDBD3, 0x89DD, 0xDBD4, 0x89DA, 0xDBD5, 0x89DB, + 0xDBD6, 0x8A4E, 0xDBD7, 0x8A4D, 0xDBD8, 0x8A39, 0xDBD9, 0x8A59, + 0xDBDA, 0x8A40, 0xDBDB, 0x8A57, 0xDBDC, 0x8A58, 0xDBDD, 0x8A44, + 0xDBDE, 0x8A45, 0xDBDF, 0x8A52, 0xDBE0, 0x8A48, 0xDBE1, 0x8A51, + 0xDBE2, 0x8A4A, 0xDBE3, 0x8A4C, 0xDBE4, 0x8A4F, 0xDBE5, 0x8C5F, + 0xDBE6, 0x8C81, 0xDBE7, 0x8C80, 0xDBE8, 0x8CBA, 0xDBE9, 0x8CBE, + 0xDBEA, 0x8CB0, 0xDBEB, 0x8CB9, 0xDBEC, 0x8CB5, 0xDBED, 0x8D84, + 0xDBEE, 0x8D80, 0xDBEF, 0x8D89, 0xDBF0, 0x8DD8, 0xDBF1, 0x8DD3, + 0xDBF2, 0x8DCD, 0xDBF3, 0x8DC7, 0xDBF4, 0x8DD6, 0xDBF5, 0x8DDC, + 0xDBF6, 0x8DCF, 0xDBF7, 0x8DD5, 0xDBF8, 0x8DD9, 0xDBF9, 0x8DC8, + 0xDBFA, 0x8DD7, 0xDBFB, 0x8DC5, 0xDBFC, 0x8EEF, 0xDBFD, 0x8EF7, + 0xDBFE, 0x8EFA, 0xDC40, 0x8EF9, 0xDC41, 0x8EE6, 0xDC42, 0x8EEE, + 0xDC43, 0x8EE5, 0xDC44, 0x8EF5, 0xDC45, 0x8EE7, 0xDC46, 0x8EE8, + 0xDC47, 0x8EF6, 0xDC48, 0x8EEB, 0xDC49, 0x8EF1, 0xDC4A, 0x8EEC, + 0xDC4B, 0x8EF4, 0xDC4C, 0x8EE9, 0xDC4D, 0x902D, 0xDC4E, 0x9034, + 0xDC4F, 0x902F, 0xDC50, 0x9106, 0xDC51, 0x912C, 0xDC52, 0x9104, + 0xDC53, 0x90FF, 0xDC54, 0x90FC, 0xDC55, 0x9108, 0xDC56, 0x90F9, + 0xDC57, 0x90FB, 0xDC58, 0x9101, 0xDC59, 0x9100, 0xDC5A, 0x9107, + 0xDC5B, 0x9105, 0xDC5C, 0x9103, 0xDC5D, 0x9161, 0xDC5E, 0x9164, + 0xDC5F, 0x915F, 0xDC60, 0x9162, 0xDC61, 0x9160, 0xDC62, 0x9201, + 0xDC63, 0x920A, 0xDC64, 0x9225, 0xDC65, 0x9203, 0xDC66, 0x921A, + 0xDC67, 0x9226, 0xDC68, 0x920F, 0xDC69, 0x920C, 0xDC6A, 0x9200, + 0xDC6B, 0x9212, 0xDC6C, 0x91FF, 0xDC6D, 0x91FD, 0xDC6E, 0x9206, + 0xDC6F, 0x9204, 0xDC70, 0x9227, 0xDC71, 0x9202, 0xDC72, 0x921C, + 0xDC73, 0x9224, 0xDC74, 0x9219, 0xDC75, 0x9217, 0xDC76, 0x9205, + 0xDC77, 0x9216, 0xDC78, 0x957B, 0xDC79, 0x958D, 0xDC7A, 0x958C, + 0xDC7B, 0x9590, 0xDC7C, 0x9687, 0xDC7D, 0x967E, 0xDC7E, 0x9688, + 0xDCA1, 0x9689, 0xDCA2, 0x9683, 0xDCA3, 0x9680, 0xDCA4, 0x96C2, + 0xDCA5, 0x96C8, 0xDCA6, 0x96C3, 0xDCA7, 0x96F1, 0xDCA8, 0x96F0, + 0xDCA9, 0x976C, 0xDCAA, 0x9770, 0xDCAB, 0x976E, 0xDCAC, 0x9807, + 0xDCAD, 0x98A9, 0xDCAE, 0x98EB, 0xDCAF, 0x9CE6, 0xDCB0, 0x9EF9, + 0xDCB1, 0x4E83, 0xDCB2, 0x4E84, 0xDCB3, 0x4EB6, 0xDCB4, 0x50BD, + 0xDCB5, 0x50BF, 0xDCB6, 0x50C6, 0xDCB7, 0x50AE, 0xDCB8, 0x50C4, + 0xDCB9, 0x50CA, 0xDCBA, 0x50B4, 0xDCBB, 0x50C8, 0xDCBC, 0x50C2, + 0xDCBD, 0x50B0, 0xDCBE, 0x50C1, 0xDCBF, 0x50BA, 0xDCC0, 0x50B1, + 0xDCC1, 0x50CB, 0xDCC2, 0x50C9, 0xDCC3, 0x50B6, 0xDCC4, 0x50B8, + 0xDCC5, 0x51D7, 0xDCC6, 0x527A, 0xDCC7, 0x5278, 0xDCC8, 0x527B, + 0xDCC9, 0x527C, 0xDCCA, 0x55C3, 0xDCCB, 0x55DB, 0xDCCC, 0x55CC, + 0xDCCD, 0x55D0, 0xDCCE, 0x55CB, 0xDCCF, 0x55CA, 0xDCD0, 0x55DD, + 0xDCD1, 0x55C0, 0xDCD2, 0x55D4, 0xDCD3, 0x55C4, 0xDCD4, 0x55E9, + 0xDCD5, 0x55BF, 0xDCD6, 0x55D2, 0xDCD7, 0x558D, 0xDCD8, 0x55CF, + 0xDCD9, 0x55D5, 0xDCDA, 0x55E2, 0xDCDB, 0x55D6, 0xDCDC, 0x55C8, + 0xDCDD, 0x55F2, 0xDCDE, 0x55CD, 0xDCDF, 0x55D9, 0xDCE0, 0x55C2, + 0xDCE1, 0x5714, 0xDCE2, 0x5853, 0xDCE3, 0x5868, 0xDCE4, 0x5864, + 0xDCE5, 0x584F, 0xDCE6, 0x584D, 0xDCE7, 0x5849, 0xDCE8, 0x586F, + 0xDCE9, 0x5855, 0xDCEA, 0x584E, 0xDCEB, 0x585D, 0xDCEC, 0x5859, + 0xDCED, 0x5865, 0xDCEE, 0x585B, 0xDCEF, 0x583D, 0xDCF0, 0x5863, + 0xDCF1, 0x5871, 0xDCF2, 0x58FC, 0xDCF3, 0x5AC7, 0xDCF4, 0x5AC4, + 0xDCF5, 0x5ACB, 0xDCF6, 0x5ABA, 0xDCF7, 0x5AB8, 0xDCF8, 0x5AB1, + 0xDCF9, 0x5AB5, 0xDCFA, 0x5AB0, 0xDCFB, 0x5ABF, 0xDCFC, 0x5AC8, + 0xDCFD, 0x5ABB, 0xDCFE, 0x5AC6, 0xDD40, 0x5AB7, 0xDD41, 0x5AC0, + 0xDD42, 0x5ACA, 0xDD43, 0x5AB4, 0xDD44, 0x5AB6, 0xDD45, 0x5ACD, + 0xDD46, 0x5AB9, 0xDD47, 0x5A90, 0xDD48, 0x5BD6, 0xDD49, 0x5BD8, + 0xDD4A, 0x5BD9, 0xDD4B, 0x5C1F, 0xDD4C, 0x5C33, 0xDD4D, 0x5D71, + 0xDD4E, 0x5D63, 0xDD4F, 0x5D4A, 0xDD50, 0x5D65, 0xDD51, 0x5D72, + 0xDD52, 0x5D6C, 0xDD53, 0x5D5E, 0xDD54, 0x5D68, 0xDD55, 0x5D67, + 0xDD56, 0x5D62, 0xDD57, 0x5DF0, 0xDD58, 0x5E4F, 0xDD59, 0x5E4E, + 0xDD5A, 0x5E4A, 0xDD5B, 0x5E4D, 0xDD5C, 0x5E4B, 0xDD5D, 0x5EC5, + 0xDD5E, 0x5ECC, 0xDD5F, 0x5EC6, 0xDD60, 0x5ECB, 0xDD61, 0x5EC7, + 0xDD62, 0x5F40, 0xDD63, 0x5FAF, 0xDD64, 0x5FAD, 0xDD65, 0x60F7, + 0xDD66, 0x6149, 0xDD67, 0x614A, 0xDD68, 0x612B, 0xDD69, 0x6145, + 0xDD6A, 0x6136, 0xDD6B, 0x6132, 0xDD6C, 0x612E, 0xDD6D, 0x6146, + 0xDD6E, 0x612F, 0xDD6F, 0x614F, 0xDD70, 0x6129, 0xDD71, 0x6140, + 0xDD72, 0x6220, 0xDD73, 0x9168, 0xDD74, 0x6223, 0xDD75, 0x6225, + 0xDD76, 0x6224, 0xDD77, 0x63C5, 0xDD78, 0x63F1, 0xDD79, 0x63EB, + 0xDD7A, 0x6410, 0xDD7B, 0x6412, 0xDD7C, 0x6409, 0xDD7D, 0x6420, + 0xDD7E, 0x6424, 0xDDA1, 0x6433, 0xDDA2, 0x6443, 0xDDA3, 0x641F, + 0xDDA4, 0x6415, 0xDDA5, 0x6418, 0xDDA6, 0x6439, 0xDDA7, 0x6437, + 0xDDA8, 0x6422, 0xDDA9, 0x6423, 0xDDAA, 0x640C, 0xDDAB, 0x6426, + 0xDDAC, 0x6430, 0xDDAD, 0x6428, 0xDDAE, 0x6441, 0xDDAF, 0x6435, + 0xDDB0, 0x642F, 0xDDB1, 0x640A, 0xDDB2, 0x641A, 0xDDB3, 0x6440, + 0xDDB4, 0x6425, 0xDDB5, 0x6427, 0xDDB6, 0x640B, 0xDDB7, 0x63E7, + 0xDDB8, 0x641B, 0xDDB9, 0x642E, 0xDDBA, 0x6421, 0xDDBB, 0x640E, + 0xDDBC, 0x656F, 0xDDBD, 0x6592, 0xDDBE, 0x65D3, 0xDDBF, 0x6686, + 0xDDC0, 0x668C, 0xDDC1, 0x6695, 0xDDC2, 0x6690, 0xDDC3, 0x668B, + 0xDDC4, 0x668A, 0xDDC5, 0x6699, 0xDDC6, 0x6694, 0xDDC7, 0x6678, + 0xDDC8, 0x6720, 0xDDC9, 0x6966, 0xDDCA, 0x695F, 0xDDCB, 0x6938, + 0xDDCC, 0x694E, 0xDDCD, 0x6962, 0xDDCE, 0x6971, 0xDDCF, 0x693F, + 0xDDD0, 0x6945, 0xDDD1, 0x696A, 0xDDD2, 0x6939, 0xDDD3, 0x6942, + 0xDDD4, 0x6957, 0xDDD5, 0x6959, 0xDDD6, 0x697A, 0xDDD7, 0x6948, + 0xDDD8, 0x6949, 0xDDD9, 0x6935, 0xDDDA, 0x696C, 0xDDDB, 0x6933, + 0xDDDC, 0x693D, 0xDDDD, 0x6965, 0xDDDE, 0x68F0, 0xDDDF, 0x6978, + 0xDDE0, 0x6934, 0xDDE1, 0x6969, 0xDDE2, 0x6940, 0xDDE3, 0x696F, + 0xDDE4, 0x6944, 0xDDE5, 0x6976, 0xDDE6, 0x6958, 0xDDE7, 0x6941, + 0xDDE8, 0x6974, 0xDDE9, 0x694C, 0xDDEA, 0x693B, 0xDDEB, 0x694B, + 0xDDEC, 0x6937, 0xDDED, 0x695C, 0xDDEE, 0x694F, 0xDDEF, 0x6951, + 0xDDF0, 0x6932, 0xDDF1, 0x6952, 0xDDF2, 0x692F, 0xDDF3, 0x697B, + 0xDDF4, 0x693C, 0xDDF5, 0x6B46, 0xDDF6, 0x6B45, 0xDDF7, 0x6B43, + 0xDDF8, 0x6B42, 0xDDF9, 0x6B48, 0xDDFA, 0x6B41, 0xDDFB, 0x6B9B, + 0xDDFC, 0xFA0D, 0xDDFD, 0x6BFB, 0xDDFE, 0x6BFC, 0xDE40, 0x6BF9, + 0xDE41, 0x6BF7, 0xDE42, 0x6BF8, 0xDE43, 0x6E9B, 0xDE44, 0x6ED6, + 0xDE45, 0x6EC8, 0xDE46, 0x6E8F, 0xDE47, 0x6EC0, 0xDE48, 0x6E9F, + 0xDE49, 0x6E93, 0xDE4A, 0x6E94, 0xDE4B, 0x6EA0, 0xDE4C, 0x6EB1, + 0xDE4D, 0x6EB9, 0xDE4E, 0x6EC6, 0xDE4F, 0x6ED2, 0xDE50, 0x6EBD, + 0xDE51, 0x6EC1, 0xDE52, 0x6E9E, 0xDE53, 0x6EC9, 0xDE54, 0x6EB7, + 0xDE55, 0x6EB0, 0xDE56, 0x6ECD, 0xDE57, 0x6EA6, 0xDE58, 0x6ECF, + 0xDE59, 0x6EB2, 0xDE5A, 0x6EBE, 0xDE5B, 0x6EC3, 0xDE5C, 0x6EDC, + 0xDE5D, 0x6ED8, 0xDE5E, 0x6E99, 0xDE5F, 0x6E92, 0xDE60, 0x6E8E, + 0xDE61, 0x6E8D, 0xDE62, 0x6EA4, 0xDE63, 0x6EA1, 0xDE64, 0x6EBF, + 0xDE65, 0x6EB3, 0xDE66, 0x6ED0, 0xDE67, 0x6ECA, 0xDE68, 0x6E97, + 0xDE69, 0x6EAE, 0xDE6A, 0x6EA3, 0xDE6B, 0x7147, 0xDE6C, 0x7154, + 0xDE6D, 0x7152, 0xDE6E, 0x7163, 0xDE6F, 0x7160, 0xDE70, 0x7141, + 0xDE71, 0x715D, 0xDE72, 0x7162, 0xDE73, 0x7172, 0xDE74, 0x7178, + 0xDE75, 0x716A, 0xDE76, 0x7161, 0xDE77, 0x7142, 0xDE78, 0x7158, + 0xDE79, 0x7143, 0xDE7A, 0x714B, 0xDE7B, 0x7170, 0xDE7C, 0x715F, + 0xDE7D, 0x7150, 0xDE7E, 0x7153, 0xDEA1, 0x7144, 0xDEA2, 0x714D, + 0xDEA3, 0x715A, 0xDEA4, 0x724F, 0xDEA5, 0x728D, 0xDEA6, 0x728C, + 0xDEA7, 0x7291, 0xDEA8, 0x7290, 0xDEA9, 0x728E, 0xDEAA, 0x733C, + 0xDEAB, 0x7342, 0xDEAC, 0x733B, 0xDEAD, 0x733A, 0xDEAE, 0x7340, + 0xDEAF, 0x734A, 0xDEB0, 0x7349, 0xDEB1, 0x7444, 0xDEB2, 0x744A, + 0xDEB3, 0x744B, 0xDEB4, 0x7452, 0xDEB5, 0x7451, 0xDEB6, 0x7457, + 0xDEB7, 0x7440, 0xDEB8, 0x744F, 0xDEB9, 0x7450, 0xDEBA, 0x744E, + 0xDEBB, 0x7442, 0xDEBC, 0x7446, 0xDEBD, 0x744D, 0xDEBE, 0x7454, + 0xDEBF, 0x74E1, 0xDEC0, 0x74FF, 0xDEC1, 0x74FE, 0xDEC2, 0x74FD, + 0xDEC3, 0x751D, 0xDEC4, 0x7579, 0xDEC5, 0x7577, 0xDEC6, 0x6983, + 0xDEC7, 0x75EF, 0xDEC8, 0x760F, 0xDEC9, 0x7603, 0xDECA, 0x75F7, + 0xDECB, 0x75FE, 0xDECC, 0x75FC, 0xDECD, 0x75F9, 0xDECE, 0x75F8, + 0xDECF, 0x7610, 0xDED0, 0x75FB, 0xDED1, 0x75F6, 0xDED2, 0x75ED, + 0xDED3, 0x75F5, 0xDED4, 0x75FD, 0xDED5, 0x7699, 0xDED6, 0x76B5, + 0xDED7, 0x76DD, 0xDED8, 0x7755, 0xDED9, 0x775F, 0xDEDA, 0x7760, + 0xDEDB, 0x7752, 0xDEDC, 0x7756, 0xDEDD, 0x775A, 0xDEDE, 0x7769, + 0xDEDF, 0x7767, 0xDEE0, 0x7754, 0xDEE1, 0x7759, 0xDEE2, 0x776D, + 0xDEE3, 0x77E0, 0xDEE4, 0x7887, 0xDEE5, 0x789A, 0xDEE6, 0x7894, + 0xDEE7, 0x788F, 0xDEE8, 0x7884, 0xDEE9, 0x7895, 0xDEEA, 0x7885, + 0xDEEB, 0x7886, 0xDEEC, 0x78A1, 0xDEED, 0x7883, 0xDEEE, 0x7879, + 0xDEEF, 0x7899, 0xDEF0, 0x7880, 0xDEF1, 0x7896, 0xDEF2, 0x787B, + 0xDEF3, 0x797C, 0xDEF4, 0x7982, 0xDEF5, 0x797D, 0xDEF6, 0x7979, + 0xDEF7, 0x7A11, 0xDEF8, 0x7A18, 0xDEF9, 0x7A19, 0xDEFA, 0x7A12, + 0xDEFB, 0x7A17, 0xDEFC, 0x7A15, 0xDEFD, 0x7A22, 0xDEFE, 0x7A13, + 0xDF40, 0x7A1B, 0xDF41, 0x7A10, 0xDF42, 0x7AA3, 0xDF43, 0x7AA2, + 0xDF44, 0x7A9E, 0xDF45, 0x7AEB, 0xDF46, 0x7B66, 0xDF47, 0x7B64, + 0xDF48, 0x7B6D, 0xDF49, 0x7B74, 0xDF4A, 0x7B69, 0xDF4B, 0x7B72, + 0xDF4C, 0x7B65, 0xDF4D, 0x7B73, 0xDF4E, 0x7B71, 0xDF4F, 0x7B70, + 0xDF50, 0x7B61, 0xDF51, 0x7B78, 0xDF52, 0x7B76, 0xDF53, 0x7B63, + 0xDF54, 0x7CB2, 0xDF55, 0x7CB4, 0xDF56, 0x7CAF, 0xDF57, 0x7D88, + 0xDF58, 0x7D86, 0xDF59, 0x7D80, 0xDF5A, 0x7D8D, 0xDF5B, 0x7D7F, + 0xDF5C, 0x7D85, 0xDF5D, 0x7D7A, 0xDF5E, 0x7D8E, 0xDF5F, 0x7D7B, + 0xDF60, 0x7D83, 0xDF61, 0x7D7C, 0xDF62, 0x7D8C, 0xDF63, 0x7D94, + 0xDF64, 0x7D84, 0xDF65, 0x7D7D, 0xDF66, 0x7D92, 0xDF67, 0x7F6D, + 0xDF68, 0x7F6B, 0xDF69, 0x7F67, 0xDF6A, 0x7F68, 0xDF6B, 0x7F6C, + 0xDF6C, 0x7FA6, 0xDF6D, 0x7FA5, 0xDF6E, 0x7FA7, 0xDF6F, 0x7FDB, + 0xDF70, 0x7FDC, 0xDF71, 0x8021, 0xDF72, 0x8164, 0xDF73, 0x8160, + 0xDF74, 0x8177, 0xDF75, 0x815C, 0xDF76, 0x8169, 0xDF77, 0x815B, + 0xDF78, 0x8162, 0xDF79, 0x8172, 0xDF7A, 0x6721, 0xDF7B, 0x815E, + 0xDF7C, 0x8176, 0xDF7D, 0x8167, 0xDF7E, 0x816F, 0xDFA1, 0x8144, + 0xDFA2, 0x8161, 0xDFA3, 0x821D, 0xDFA4, 0x8249, 0xDFA5, 0x8244, + 0xDFA6, 0x8240, 0xDFA7, 0x8242, 0xDFA8, 0x8245, 0xDFA9, 0x84F1, + 0xDFAA, 0x843F, 0xDFAB, 0x8456, 0xDFAC, 0x8476, 0xDFAD, 0x8479, + 0xDFAE, 0x848F, 0xDFAF, 0x848D, 0xDFB0, 0x8465, 0xDFB1, 0x8451, + 0xDFB2, 0x8440, 0xDFB3, 0x8486, 0xDFB4, 0x8467, 0xDFB5, 0x8430, + 0xDFB6, 0x844D, 0xDFB7, 0x847D, 0xDFB8, 0x845A, 0xDFB9, 0x8459, + 0xDFBA, 0x8474, 0xDFBB, 0x8473, 0xDFBC, 0x845D, 0xDFBD, 0x8507, + 0xDFBE, 0x845E, 0xDFBF, 0x8437, 0xDFC0, 0x843A, 0xDFC1, 0x8434, + 0xDFC2, 0x847A, 0xDFC3, 0x8443, 0xDFC4, 0x8478, 0xDFC5, 0x8432, + 0xDFC6, 0x8445, 0xDFC7, 0x8429, 0xDFC8, 0x83D9, 0xDFC9, 0x844B, + 0xDFCA, 0x842F, 0xDFCB, 0x8442, 0xDFCC, 0x842D, 0xDFCD, 0x845F, + 0xDFCE, 0x8470, 0xDFCF, 0x8439, 0xDFD0, 0x844E, 0xDFD1, 0x844C, + 0xDFD2, 0x8452, 0xDFD3, 0x846F, 0xDFD4, 0x84C5, 0xDFD5, 0x848E, + 0xDFD6, 0x843B, 0xDFD7, 0x8447, 0xDFD8, 0x8436, 0xDFD9, 0x8433, + 0xDFDA, 0x8468, 0xDFDB, 0x847E, 0xDFDC, 0x8444, 0xDFDD, 0x842B, + 0xDFDE, 0x8460, 0xDFDF, 0x8454, 0xDFE0, 0x846E, 0xDFE1, 0x8450, + 0xDFE2, 0x870B, 0xDFE3, 0x8704, 0xDFE4, 0x86F7, 0xDFE5, 0x870C, + 0xDFE6, 0x86FA, 0xDFE7, 0x86D6, 0xDFE8, 0x86F5, 0xDFE9, 0x874D, + 0xDFEA, 0x86F8, 0xDFEB, 0x870E, 0xDFEC, 0x8709, 0xDFED, 0x8701, + 0xDFEE, 0x86F6, 0xDFEF, 0x870D, 0xDFF0, 0x8705, 0xDFF1, 0x88D6, + 0xDFF2, 0x88CB, 0xDFF3, 0x88CD, 0xDFF4, 0x88CE, 0xDFF5, 0x88DE, + 0xDFF6, 0x88DB, 0xDFF7, 0x88DA, 0xDFF8, 0x88CC, 0xDFF9, 0x88D0, + 0xDFFA, 0x8985, 0xDFFB, 0x899B, 0xDFFC, 0x89DF, 0xDFFD, 0x89E5, + 0xDFFE, 0x89E4, 0xE040, 0x89E1, 0xE041, 0x89E0, 0xE042, 0x89E2, + 0xE043, 0x89DC, 0xE044, 0x89E6, 0xE045, 0x8A76, 0xE046, 0x8A86, + 0xE047, 0x8A7F, 0xE048, 0x8A61, 0xE049, 0x8A3F, 0xE04A, 0x8A77, + 0xE04B, 0x8A82, 0xE04C, 0x8A84, 0xE04D, 0x8A75, 0xE04E, 0x8A83, + 0xE04F, 0x8A81, 0xE050, 0x8A74, 0xE051, 0x8A7A, 0xE052, 0x8C3C, + 0xE053, 0x8C4B, 0xE054, 0x8C4A, 0xE055, 0x8C65, 0xE056, 0x8C64, + 0xE057, 0x8C66, 0xE058, 0x8C86, 0xE059, 0x8C84, 0xE05A, 0x8C85, + 0xE05B, 0x8CCC, 0xE05C, 0x8D68, 0xE05D, 0x8D69, 0xE05E, 0x8D91, + 0xE05F, 0x8D8C, 0xE060, 0x8D8E, 0xE061, 0x8D8F, 0xE062, 0x8D8D, + 0xE063, 0x8D93, 0xE064, 0x8D94, 0xE065, 0x8D90, 0xE066, 0x8D92, + 0xE067, 0x8DF0, 0xE068, 0x8DE0, 0xE069, 0x8DEC, 0xE06A, 0x8DF1, + 0xE06B, 0x8DEE, 0xE06C, 0x8DD0, 0xE06D, 0x8DE9, 0xE06E, 0x8DE3, + 0xE06F, 0x8DE2, 0xE070, 0x8DE7, 0xE071, 0x8DF2, 0xE072, 0x8DEB, + 0xE073, 0x8DF4, 0xE074, 0x8F06, 0xE075, 0x8EFF, 0xE076, 0x8F01, + 0xE077, 0x8F00, 0xE078, 0x8F05, 0xE079, 0x8F07, 0xE07A, 0x8F08, + 0xE07B, 0x8F02, 0xE07C, 0x8F0B, 0xE07D, 0x9052, 0xE07E, 0x903F, + 0xE0A1, 0x9044, 0xE0A2, 0x9049, 0xE0A3, 0x903D, 0xE0A4, 0x9110, + 0xE0A5, 0x910D, 0xE0A6, 0x910F, 0xE0A7, 0x9111, 0xE0A8, 0x9116, + 0xE0A9, 0x9114, 0xE0AA, 0x910B, 0xE0AB, 0x910E, 0xE0AC, 0x916E, + 0xE0AD, 0x916F, 0xE0AE, 0x9248, 0xE0AF, 0x9252, 0xE0B0, 0x9230, + 0xE0B1, 0x923A, 0xE0B2, 0x9266, 0xE0B3, 0x9233, 0xE0B4, 0x9265, + 0xE0B5, 0x925E, 0xE0B6, 0x9283, 0xE0B7, 0x922E, 0xE0B8, 0x924A, + 0xE0B9, 0x9246, 0xE0BA, 0x926D, 0xE0BB, 0x926C, 0xE0BC, 0x924F, + 0xE0BD, 0x9260, 0xE0BE, 0x9267, 0xE0BF, 0x926F, 0xE0C0, 0x9236, + 0xE0C1, 0x9261, 0xE0C2, 0x9270, 0xE0C3, 0x9231, 0xE0C4, 0x9254, + 0xE0C5, 0x9263, 0xE0C6, 0x9250, 0xE0C7, 0x9272, 0xE0C8, 0x924E, + 0xE0C9, 0x9253, 0xE0CA, 0x924C, 0xE0CB, 0x9256, 0xE0CC, 0x9232, + 0xE0CD, 0x959F, 0xE0CE, 0x959C, 0xE0CF, 0x959E, 0xE0D0, 0x959B, + 0xE0D1, 0x9692, 0xE0D2, 0x9693, 0xE0D3, 0x9691, 0xE0D4, 0x9697, + 0xE0D5, 0x96CE, 0xE0D6, 0x96FA, 0xE0D7, 0x96FD, 0xE0D8, 0x96F8, + 0xE0D9, 0x96F5, 0xE0DA, 0x9773, 0xE0DB, 0x9777, 0xE0DC, 0x9778, + 0xE0DD, 0x9772, 0xE0DE, 0x980F, 0xE0DF, 0x980D, 0xE0E0, 0x980E, + 0xE0E1, 0x98AC, 0xE0E2, 0x98F6, 0xE0E3, 0x98F9, 0xE0E4, 0x99AF, + 0xE0E5, 0x99B2, 0xE0E6, 0x99B0, 0xE0E7, 0x99B5, 0xE0E8, 0x9AAD, + 0xE0E9, 0x9AAB, 0xE0EA, 0x9B5B, 0xE0EB, 0x9CEA, 0xE0EC, 0x9CED, + 0xE0ED, 0x9CE7, 0xE0EE, 0x9E80, 0xE0EF, 0x9EFD, 0xE0F0, 0x50E6, + 0xE0F1, 0x50D4, 0xE0F2, 0x50D7, 0xE0F3, 0x50E8, 0xE0F4, 0x50F3, + 0xE0F5, 0x50DB, 0xE0F6, 0x50EA, 0xE0F7, 0x50DD, 0xE0F8, 0x50E4, + 0xE0F9, 0x50D3, 0xE0FA, 0x50EC, 0xE0FB, 0x50F0, 0xE0FC, 0x50EF, + 0xE0FD, 0x50E3, 0xE0FE, 0x50E0, 0xE140, 0x51D8, 0xE141, 0x5280, + 0xE142, 0x5281, 0xE143, 0x52E9, 0xE144, 0x52EB, 0xE145, 0x5330, + 0xE146, 0x53AC, 0xE147, 0x5627, 0xE148, 0x5615, 0xE149, 0x560C, + 0xE14A, 0x5612, 0xE14B, 0x55FC, 0xE14C, 0x560F, 0xE14D, 0x561C, + 0xE14E, 0x5601, 0xE14F, 0x5613, 0xE150, 0x5602, 0xE151, 0x55FA, + 0xE152, 0x561D, 0xE153, 0x5604, 0xE154, 0x55FF, 0xE155, 0x55F9, + 0xE156, 0x5889, 0xE157, 0x587C, 0xE158, 0x5890, 0xE159, 0x5898, + 0xE15A, 0x5886, 0xE15B, 0x5881, 0xE15C, 0x587F, 0xE15D, 0x5874, + 0xE15E, 0x588B, 0xE15F, 0x587A, 0xE160, 0x5887, 0xE161, 0x5891, + 0xE162, 0x588E, 0xE163, 0x5876, 0xE164, 0x5882, 0xE165, 0x5888, + 0xE166, 0x587B, 0xE167, 0x5894, 0xE168, 0x588F, 0xE169, 0x58FE, + 0xE16A, 0x596B, 0xE16B, 0x5ADC, 0xE16C, 0x5AEE, 0xE16D, 0x5AE5, + 0xE16E, 0x5AD5, 0xE16F, 0x5AEA, 0xE170, 0x5ADA, 0xE171, 0x5AED, + 0xE172, 0x5AEB, 0xE173, 0x5AF3, 0xE174, 0x5AE2, 0xE175, 0x5AE0, + 0xE176, 0x5ADB, 0xE177, 0x5AEC, 0xE178, 0x5ADE, 0xE179, 0x5ADD, + 0xE17A, 0x5AD9, 0xE17B, 0x5AE8, 0xE17C, 0x5ADF, 0xE17D, 0x5B77, + 0xE17E, 0x5BE0, 0xE1A1, 0x5BE3, 0xE1A2, 0x5C63, 0xE1A3, 0x5D82, + 0xE1A4, 0x5D80, 0xE1A5, 0x5D7D, 0xE1A6, 0x5D86, 0xE1A7, 0x5D7A, + 0xE1A8, 0x5D81, 0xE1A9, 0x5D77, 0xE1AA, 0x5D8A, 0xE1AB, 0x5D89, + 0xE1AC, 0x5D88, 0xE1AD, 0x5D7E, 0xE1AE, 0x5D7C, 0xE1AF, 0x5D8D, + 0xE1B0, 0x5D79, 0xE1B1, 0x5D7F, 0xE1B2, 0x5E58, 0xE1B3, 0x5E59, + 0xE1B4, 0x5E53, 0xE1B5, 0x5ED8, 0xE1B6, 0x5ED1, 0xE1B7, 0x5ED7, + 0xE1B8, 0x5ECE, 0xE1B9, 0x5EDC, 0xE1BA, 0x5ED5, 0xE1BB, 0x5ED9, + 0xE1BC, 0x5ED2, 0xE1BD, 0x5ED4, 0xE1BE, 0x5F44, 0xE1BF, 0x5F43, + 0xE1C0, 0x5F6F, 0xE1C1, 0x5FB6, 0xE1C2, 0x612C, 0xE1C3, 0x6128, + 0xE1C4, 0x6141, 0xE1C5, 0x615E, 0xE1C6, 0x6171, 0xE1C7, 0x6173, + 0xE1C8, 0x6152, 0xE1C9, 0x6153, 0xE1CA, 0x6172, 0xE1CB, 0x616C, + 0xE1CC, 0x6180, 0xE1CD, 0x6174, 0xE1CE, 0x6154, 0xE1CF, 0x617A, + 0xE1D0, 0x615B, 0xE1D1, 0x6165, 0xE1D2, 0x613B, 0xE1D3, 0x616A, + 0xE1D4, 0x6161, 0xE1D5, 0x6156, 0xE1D6, 0x6229, 0xE1D7, 0x6227, + 0xE1D8, 0x622B, 0xE1D9, 0x642B, 0xE1DA, 0x644D, 0xE1DB, 0x645B, + 0xE1DC, 0x645D, 0xE1DD, 0x6474, 0xE1DE, 0x6476, 0xE1DF, 0x6472, + 0xE1E0, 0x6473, 0xE1E1, 0x647D, 0xE1E2, 0x6475, 0xE1E3, 0x6466, + 0xE1E4, 0x64A6, 0xE1E5, 0x644E, 0xE1E6, 0x6482, 0xE1E7, 0x645E, + 0xE1E8, 0x645C, 0xE1E9, 0x644B, 0xE1EA, 0x6453, 0xE1EB, 0x6460, + 0xE1EC, 0x6450, 0xE1ED, 0x647F, 0xE1EE, 0x643F, 0xE1EF, 0x646C, + 0xE1F0, 0x646B, 0xE1F1, 0x6459, 0xE1F2, 0x6465, 0xE1F3, 0x6477, + 0xE1F4, 0x6573, 0xE1F5, 0x65A0, 0xE1F6, 0x66A1, 0xE1F7, 0x66A0, + 0xE1F8, 0x669F, 0xE1F9, 0x6705, 0xE1FA, 0x6704, 0xE1FB, 0x6722, + 0xE1FC, 0x69B1, 0xE1FD, 0x69B6, 0xE1FE, 0x69C9, 0xE240, 0x69A0, + 0xE241, 0x69CE, 0xE242, 0x6996, 0xE243, 0x69B0, 0xE244, 0x69AC, + 0xE245, 0x69BC, 0xE246, 0x6991, 0xE247, 0x6999, 0xE248, 0x698E, + 0xE249, 0x69A7, 0xE24A, 0x698D, 0xE24B, 0x69A9, 0xE24C, 0x69BE, + 0xE24D, 0x69AF, 0xE24E, 0x69BF, 0xE24F, 0x69C4, 0xE250, 0x69BD, + 0xE251, 0x69A4, 0xE252, 0x69D4, 0xE253, 0x69B9, 0xE254, 0x69CA, + 0xE255, 0x699A, 0xE256, 0x69CF, 0xE257, 0x69B3, 0xE258, 0x6993, + 0xE259, 0x69AA, 0xE25A, 0x69A1, 0xE25B, 0x699E, 0xE25C, 0x69D9, + 0xE25D, 0x6997, 0xE25E, 0x6990, 0xE25F, 0x69C2, 0xE260, 0x69B5, + 0xE261, 0x69A5, 0xE262, 0x69C6, 0xE263, 0x6B4A, 0xE264, 0x6B4D, + 0xE265, 0x6B4B, 0xE266, 0x6B9E, 0xE267, 0x6B9F, 0xE268, 0x6BA0, + 0xE269, 0x6BC3, 0xE26A, 0x6BC4, 0xE26B, 0x6BFE, 0xE26C, 0x6ECE, + 0xE26D, 0x6EF5, 0xE26E, 0x6EF1, 0xE26F, 0x6F03, 0xE270, 0x6F25, + 0xE271, 0x6EF8, 0xE272, 0x6F37, 0xE273, 0x6EFB, 0xE274, 0x6F2E, + 0xE275, 0x6F09, 0xE276, 0x6F4E, 0xE277, 0x6F19, 0xE278, 0x6F1A, + 0xE279, 0x6F27, 0xE27A, 0x6F18, 0xE27B, 0x6F3B, 0xE27C, 0x6F12, + 0xE27D, 0x6EED, 0xE27E, 0x6F0A, 0xE2A1, 0x6F36, 0xE2A2, 0x6F73, + 0xE2A3, 0x6EF9, 0xE2A4, 0x6EEE, 0xE2A5, 0x6F2D, 0xE2A6, 0x6F40, + 0xE2A7, 0x6F30, 0xE2A8, 0x6F3C, 0xE2A9, 0x6F35, 0xE2AA, 0x6EEB, + 0xE2AB, 0x6F07, 0xE2AC, 0x6F0E, 0xE2AD, 0x6F43, 0xE2AE, 0x6F05, + 0xE2AF, 0x6EFD, 0xE2B0, 0x6EF6, 0xE2B1, 0x6F39, 0xE2B2, 0x6F1C, + 0xE2B3, 0x6EFC, 0xE2B4, 0x6F3A, 0xE2B5, 0x6F1F, 0xE2B6, 0x6F0D, + 0xE2B7, 0x6F1E, 0xE2B8, 0x6F08, 0xE2B9, 0x6F21, 0xE2BA, 0x7187, + 0xE2BB, 0x7190, 0xE2BC, 0x7189, 0xE2BD, 0x7180, 0xE2BE, 0x7185, + 0xE2BF, 0x7182, 0xE2C0, 0x718F, 0xE2C1, 0x717B, 0xE2C2, 0x7186, + 0xE2C3, 0x7181, 0xE2C4, 0x7197, 0xE2C5, 0x7244, 0xE2C6, 0x7253, + 0xE2C7, 0x7297, 0xE2C8, 0x7295, 0xE2C9, 0x7293, 0xE2CA, 0x7343, + 0xE2CB, 0x734D, 0xE2CC, 0x7351, 0xE2CD, 0x734C, 0xE2CE, 0x7462, + 0xE2CF, 0x7473, 0xE2D0, 0x7471, 0xE2D1, 0x7475, 0xE2D2, 0x7472, + 0xE2D3, 0x7467, 0xE2D4, 0x746E, 0xE2D5, 0x7500, 0xE2D6, 0x7502, + 0xE2D7, 0x7503, 0xE2D8, 0x757D, 0xE2D9, 0x7590, 0xE2DA, 0x7616, + 0xE2DB, 0x7608, 0xE2DC, 0x760C, 0xE2DD, 0x7615, 0xE2DE, 0x7611, + 0xE2DF, 0x760A, 0xE2E0, 0x7614, 0xE2E1, 0x76B8, 0xE2E2, 0x7781, + 0xE2E3, 0x777C, 0xE2E4, 0x7785, 0xE2E5, 0x7782, 0xE2E6, 0x776E, + 0xE2E7, 0x7780, 0xE2E8, 0x776F, 0xE2E9, 0x777E, 0xE2EA, 0x7783, + 0xE2EB, 0x78B2, 0xE2EC, 0x78AA, 0xE2ED, 0x78B4, 0xE2EE, 0x78AD, + 0xE2EF, 0x78A8, 0xE2F0, 0x787E, 0xE2F1, 0x78AB, 0xE2F2, 0x789E, + 0xE2F3, 0x78A5, 0xE2F4, 0x78A0, 0xE2F5, 0x78AC, 0xE2F6, 0x78A2, + 0xE2F7, 0x78A4, 0xE2F8, 0x7998, 0xE2F9, 0x798A, 0xE2FA, 0x798B, + 0xE2FB, 0x7996, 0xE2FC, 0x7995, 0xE2FD, 0x7994, 0xE2FE, 0x7993, + 0xE340, 0x7997, 0xE341, 0x7988, 0xE342, 0x7992, 0xE343, 0x7990, + 0xE344, 0x7A2B, 0xE345, 0x7A4A, 0xE346, 0x7A30, 0xE347, 0x7A2F, + 0xE348, 0x7A28, 0xE349, 0x7A26, 0xE34A, 0x7AA8, 0xE34B, 0x7AAB, + 0xE34C, 0x7AAC, 0xE34D, 0x7AEE, 0xE34E, 0x7B88, 0xE34F, 0x7B9C, + 0xE350, 0x7B8A, 0xE351, 0x7B91, 0xE352, 0x7B90, 0xE353, 0x7B96, + 0xE354, 0x7B8D, 0xE355, 0x7B8C, 0xE356, 0x7B9B, 0xE357, 0x7B8E, + 0xE358, 0x7B85, 0xE359, 0x7B98, 0xE35A, 0x5284, 0xE35B, 0x7B99, + 0xE35C, 0x7BA4, 0xE35D, 0x7B82, 0xE35E, 0x7CBB, 0xE35F, 0x7CBF, + 0xE360, 0x7CBC, 0xE361, 0x7CBA, 0xE362, 0x7DA7, 0xE363, 0x7DB7, + 0xE364, 0x7DC2, 0xE365, 0x7DA3, 0xE366, 0x7DAA, 0xE367, 0x7DC1, + 0xE368, 0x7DC0, 0xE369, 0x7DC5, 0xE36A, 0x7D9D, 0xE36B, 0x7DCE, + 0xE36C, 0x7DC4, 0xE36D, 0x7DC6, 0xE36E, 0x7DCB, 0xE36F, 0x7DCC, + 0xE370, 0x7DAF, 0xE371, 0x7DB9, 0xE372, 0x7D96, 0xE373, 0x7DBC, + 0xE374, 0x7D9F, 0xE375, 0x7DA6, 0xE376, 0x7DAE, 0xE377, 0x7DA9, + 0xE378, 0x7DA1, 0xE379, 0x7DC9, 0xE37A, 0x7F73, 0xE37B, 0x7FE2, + 0xE37C, 0x7FE3, 0xE37D, 0x7FE5, 0xE37E, 0x7FDE, 0xE3A1, 0x8024, + 0xE3A2, 0x805D, 0xE3A3, 0x805C, 0xE3A4, 0x8189, 0xE3A5, 0x8186, + 0xE3A6, 0x8183, 0xE3A7, 0x8187, 0xE3A8, 0x818D, 0xE3A9, 0x818C, + 0xE3AA, 0x818B, 0xE3AB, 0x8215, 0xE3AC, 0x8497, 0xE3AD, 0x84A4, + 0xE3AE, 0x84A1, 0xE3AF, 0x849F, 0xE3B0, 0x84BA, 0xE3B1, 0x84CE, + 0xE3B2, 0x84C2, 0xE3B3, 0x84AC, 0xE3B4, 0x84AE, 0xE3B5, 0x84AB, + 0xE3B6, 0x84B9, 0xE3B7, 0x84B4, 0xE3B8, 0x84C1, 0xE3B9, 0x84CD, + 0xE3BA, 0x84AA, 0xE3BB, 0x849A, 0xE3BC, 0x84B1, 0xE3BD, 0x84D0, + 0xE3BE, 0x849D, 0xE3BF, 0x84A7, 0xE3C0, 0x84BB, 0xE3C1, 0x84A2, + 0xE3C2, 0x8494, 0xE3C3, 0x84C7, 0xE3C4, 0x84CC, 0xE3C5, 0x849B, + 0xE3C6, 0x84A9, 0xE3C7, 0x84AF, 0xE3C8, 0x84A8, 0xE3C9, 0x84D6, + 0xE3CA, 0x8498, 0xE3CB, 0x84B6, 0xE3CC, 0x84CF, 0xE3CD, 0x84A0, + 0xE3CE, 0x84D7, 0xE3CF, 0x84D4, 0xE3D0, 0x84D2, 0xE3D1, 0x84DB, + 0xE3D2, 0x84B0, 0xE3D3, 0x8491, 0xE3D4, 0x8661, 0xE3D5, 0x8733, + 0xE3D6, 0x8723, 0xE3D7, 0x8728, 0xE3D8, 0x876B, 0xE3D9, 0x8740, + 0xE3DA, 0x872E, 0xE3DB, 0x871E, 0xE3DC, 0x8721, 0xE3DD, 0x8719, + 0xE3DE, 0x871B, 0xE3DF, 0x8743, 0xE3E0, 0x872C, 0xE3E1, 0x8741, + 0xE3E2, 0x873E, 0xE3E3, 0x8746, 0xE3E4, 0x8720, 0xE3E5, 0x8732, + 0xE3E6, 0x872A, 0xE3E7, 0x872D, 0xE3E8, 0x873C, 0xE3E9, 0x8712, + 0xE3EA, 0x873A, 0xE3EB, 0x8731, 0xE3EC, 0x8735, 0xE3ED, 0x8742, + 0xE3EE, 0x8726, 0xE3EF, 0x8727, 0xE3F0, 0x8738, 0xE3F1, 0x8724, + 0xE3F2, 0x871A, 0xE3F3, 0x8730, 0xE3F4, 0x8711, 0xE3F5, 0x88F7, + 0xE3F6, 0x88E7, 0xE3F7, 0x88F1, 0xE3F8, 0x88F2, 0xE3F9, 0x88FA, + 0xE3FA, 0x88FE, 0xE3FB, 0x88EE, 0xE3FC, 0x88FC, 0xE3FD, 0x88F6, + 0xE3FE, 0x88FB, 0xE440, 0x88F0, 0xE441, 0x88EC, 0xE442, 0x88EB, + 0xE443, 0x899D, 0xE444, 0x89A1, 0xE445, 0x899F, 0xE446, 0x899E, + 0xE447, 0x89E9, 0xE448, 0x89EB, 0xE449, 0x89E8, 0xE44A, 0x8AAB, + 0xE44B, 0x8A99, 0xE44C, 0x8A8B, 0xE44D, 0x8A92, 0xE44E, 0x8A8F, + 0xE44F, 0x8A96, 0xE450, 0x8C3D, 0xE451, 0x8C68, 0xE452, 0x8C69, + 0xE453, 0x8CD5, 0xE454, 0x8CCF, 0xE455, 0x8CD7, 0xE456, 0x8D96, + 0xE457, 0x8E09, 0xE458, 0x8E02, 0xE459, 0x8DFF, 0xE45A, 0x8E0D, + 0xE45B, 0x8DFD, 0xE45C, 0x8E0A, 0xE45D, 0x8E03, 0xE45E, 0x8E07, + 0xE45F, 0x8E06, 0xE460, 0x8E05, 0xE461, 0x8DFE, 0xE462, 0x8E00, + 0xE463, 0x8E04, 0xE464, 0x8F10, 0xE465, 0x8F11, 0xE466, 0x8F0E, + 0xE467, 0x8F0D, 0xE468, 0x9123, 0xE469, 0x911C, 0xE46A, 0x9120, + 0xE46B, 0x9122, 0xE46C, 0x911F, 0xE46D, 0x911D, 0xE46E, 0x911A, + 0xE46F, 0x9124, 0xE470, 0x9121, 0xE471, 0x911B, 0xE472, 0x917A, + 0xE473, 0x9172, 0xE474, 0x9179, 0xE475, 0x9173, 0xE476, 0x92A5, + 0xE477, 0x92A4, 0xE478, 0x9276, 0xE479, 0x929B, 0xE47A, 0x927A, + 0xE47B, 0x92A0, 0xE47C, 0x9294, 0xE47D, 0x92AA, 0xE47E, 0x928D, + 0xE4A1, 0x92A6, 0xE4A2, 0x929A, 0xE4A3, 0x92AB, 0xE4A4, 0x9279, + 0xE4A5, 0x9297, 0xE4A6, 0x927F, 0xE4A7, 0x92A3, 0xE4A8, 0x92EE, + 0xE4A9, 0x928E, 0xE4AA, 0x9282, 0xE4AB, 0x9295, 0xE4AC, 0x92A2, + 0xE4AD, 0x927D, 0xE4AE, 0x9288, 0xE4AF, 0x92A1, 0xE4B0, 0x928A, + 0xE4B1, 0x9286, 0xE4B2, 0x928C, 0xE4B3, 0x9299, 0xE4B4, 0x92A7, + 0xE4B5, 0x927E, 0xE4B6, 0x9287, 0xE4B7, 0x92A9, 0xE4B8, 0x929D, + 0xE4B9, 0x928B, 0xE4BA, 0x922D, 0xE4BB, 0x969E, 0xE4BC, 0x96A1, + 0xE4BD, 0x96FF, 0xE4BE, 0x9758, 0xE4BF, 0x977D, 0xE4C0, 0x977A, + 0xE4C1, 0x977E, 0xE4C2, 0x9783, 0xE4C3, 0x9780, 0xE4C4, 0x9782, + 0xE4C5, 0x977B, 0xE4C6, 0x9784, 0xE4C7, 0x9781, 0xE4C8, 0x977F, + 0xE4C9, 0x97CE, 0xE4CA, 0x97CD, 0xE4CB, 0x9816, 0xE4CC, 0x98AD, + 0xE4CD, 0x98AE, 0xE4CE, 0x9902, 0xE4CF, 0x9900, 0xE4D0, 0x9907, + 0xE4D1, 0x999D, 0xE4D2, 0x999C, 0xE4D3, 0x99C3, 0xE4D4, 0x99B9, + 0xE4D5, 0x99BB, 0xE4D6, 0x99BA, 0xE4D7, 0x99C2, 0xE4D8, 0x99BD, + 0xE4D9, 0x99C7, 0xE4DA, 0x9AB1, 0xE4DB, 0x9AE3, 0xE4DC, 0x9AE7, + 0xE4DD, 0x9B3E, 0xE4DE, 0x9B3F, 0xE4DF, 0x9B60, 0xE4E0, 0x9B61, + 0xE4E1, 0x9B5F, 0xE4E2, 0x9CF1, 0xE4E3, 0x9CF2, 0xE4E4, 0x9CF5, + 0xE4E5, 0x9EA7, 0xE4E6, 0x50FF, 0xE4E7, 0x5103, 0xE4E8, 0x5130, + 0xE4E9, 0x50F8, 0xE4EA, 0x5106, 0xE4EB, 0x5107, 0xE4EC, 0x50F6, + 0xE4ED, 0x50FE, 0xE4EE, 0x510B, 0xE4EF, 0x510C, 0xE4F0, 0x50FD, + 0xE4F1, 0x510A, 0xE4F2, 0x528B, 0xE4F3, 0x528C, 0xE4F4, 0x52F1, + 0xE4F5, 0x52EF, 0xE4F6, 0x5648, 0xE4F7, 0x5642, 0xE4F8, 0x564C, + 0xE4F9, 0x5635, 0xE4FA, 0x5641, 0xE4FB, 0x564A, 0xE4FC, 0x5649, + 0xE4FD, 0x5646, 0xE4FE, 0x5658, 0xE540, 0x565A, 0xE541, 0x5640, + 0xE542, 0x5633, 0xE543, 0x563D, 0xE544, 0x562C, 0xE545, 0x563E, + 0xE546, 0x5638, 0xE547, 0x562A, 0xE548, 0x563A, 0xE549, 0x571A, + 0xE54A, 0x58AB, 0xE54B, 0x589D, 0xE54C, 0x58B1, 0xE54D, 0x58A0, + 0xE54E, 0x58A3, 0xE54F, 0x58AF, 0xE550, 0x58AC, 0xE551, 0x58A5, + 0xE552, 0x58A1, 0xE553, 0x58FF, 0xE554, 0x5AFF, 0xE555, 0x5AF4, + 0xE556, 0x5AFD, 0xE557, 0x5AF7, 0xE558, 0x5AF6, 0xE559, 0x5B03, + 0xE55A, 0x5AF8, 0xE55B, 0x5B02, 0xE55C, 0x5AF9, 0xE55D, 0x5B01, + 0xE55E, 0x5B07, 0xE55F, 0x5B05, 0xE560, 0x5B0F, 0xE561, 0x5C67, + 0xE562, 0x5D99, 0xE563, 0x5D97, 0xE564, 0x5D9F, 0xE565, 0x5D92, + 0xE566, 0x5DA2, 0xE567, 0x5D93, 0xE568, 0x5D95, 0xE569, 0x5DA0, + 0xE56A, 0x5D9C, 0xE56B, 0x5DA1, 0xE56C, 0x5D9A, 0xE56D, 0x5D9E, + 0xE56E, 0x5E69, 0xE56F, 0x5E5D, 0xE570, 0x5E60, 0xE571, 0x5E5C, + 0xE572, 0x7DF3, 0xE573, 0x5EDB, 0xE574, 0x5EDE, 0xE575, 0x5EE1, + 0xE576, 0x5F49, 0xE577, 0x5FB2, 0xE578, 0x618B, 0xE579, 0x6183, + 0xE57A, 0x6179, 0xE57B, 0x61B1, 0xE57C, 0x61B0, 0xE57D, 0x61A2, + 0xE57E, 0x6189, 0xE5A1, 0x619B, 0xE5A2, 0x6193, 0xE5A3, 0x61AF, + 0xE5A4, 0x61AD, 0xE5A5, 0x619F, 0xE5A6, 0x6192, 0xE5A7, 0x61AA, + 0xE5A8, 0x61A1, 0xE5A9, 0x618D, 0xE5AA, 0x6166, 0xE5AB, 0x61B3, + 0xE5AC, 0x622D, 0xE5AD, 0x646E, 0xE5AE, 0x6470, 0xE5AF, 0x6496, + 0xE5B0, 0x64A0, 0xE5B1, 0x6485, 0xE5B2, 0x6497, 0xE5B3, 0x649C, + 0xE5B4, 0x648F, 0xE5B5, 0x648B, 0xE5B6, 0x648A, 0xE5B7, 0x648C, + 0xE5B8, 0x64A3, 0xE5B9, 0x649F, 0xE5BA, 0x6468, 0xE5BB, 0x64B1, + 0xE5BC, 0x6498, 0xE5BD, 0x6576, 0xE5BE, 0x657A, 0xE5BF, 0x6579, + 0xE5C0, 0x657B, 0xE5C1, 0x65B2, 0xE5C2, 0x65B3, 0xE5C3, 0x66B5, + 0xE5C4, 0x66B0, 0xE5C5, 0x66A9, 0xE5C6, 0x66B2, 0xE5C7, 0x66B7, + 0xE5C8, 0x66AA, 0xE5C9, 0x66AF, 0xE5CA, 0x6A00, 0xE5CB, 0x6A06, + 0xE5CC, 0x6A17, 0xE5CD, 0x69E5, 0xE5CE, 0x69F8, 0xE5CF, 0x6A15, + 0xE5D0, 0x69F1, 0xE5D1, 0x69E4, 0xE5D2, 0x6A20, 0xE5D3, 0x69FF, + 0xE5D4, 0x69EC, 0xE5D5, 0x69E2, 0xE5D6, 0x6A1B, 0xE5D7, 0x6A1D, + 0xE5D8, 0x69FE, 0xE5D9, 0x6A27, 0xE5DA, 0x69F2, 0xE5DB, 0x69EE, + 0xE5DC, 0x6A14, 0xE5DD, 0x69F7, 0xE5DE, 0x69E7, 0xE5DF, 0x6A40, + 0xE5E0, 0x6A08, 0xE5E1, 0x69E6, 0xE5E2, 0x69FB, 0xE5E3, 0x6A0D, + 0xE5E4, 0x69FC, 0xE5E5, 0x69EB, 0xE5E6, 0x6A09, 0xE5E7, 0x6A04, + 0xE5E8, 0x6A18, 0xE5E9, 0x6A25, 0xE5EA, 0x6A0F, 0xE5EB, 0x69F6, + 0xE5EC, 0x6A26, 0xE5ED, 0x6A07, 0xE5EE, 0x69F4, 0xE5EF, 0x6A16, + 0xE5F0, 0x6B51, 0xE5F1, 0x6BA5, 0xE5F2, 0x6BA3, 0xE5F3, 0x6BA2, + 0xE5F4, 0x6BA6, 0xE5F5, 0x6C01, 0xE5F6, 0x6C00, 0xE5F7, 0x6BFF, + 0xE5F8, 0x6C02, 0xE5F9, 0x6F41, 0xE5FA, 0x6F26, 0xE5FB, 0x6F7E, + 0xE5FC, 0x6F87, 0xE5FD, 0x6FC6, 0xE5FE, 0x6F92, 0xE640, 0x6F8D, + 0xE641, 0x6F89, 0xE642, 0x6F8C, 0xE643, 0x6F62, 0xE644, 0x6F4F, + 0xE645, 0x6F85, 0xE646, 0x6F5A, 0xE647, 0x6F96, 0xE648, 0x6F76, + 0xE649, 0x6F6C, 0xE64A, 0x6F82, 0xE64B, 0x6F55, 0xE64C, 0x6F72, + 0xE64D, 0x6F52, 0xE64E, 0x6F50, 0xE64F, 0x6F57, 0xE650, 0x6F94, + 0xE651, 0x6F93, 0xE652, 0x6F5D, 0xE653, 0x6F00, 0xE654, 0x6F61, + 0xE655, 0x6F6B, 0xE656, 0x6F7D, 0xE657, 0x6F67, 0xE658, 0x6F90, + 0xE659, 0x6F53, 0xE65A, 0x6F8B, 0xE65B, 0x6F69, 0xE65C, 0x6F7F, + 0xE65D, 0x6F95, 0xE65E, 0x6F63, 0xE65F, 0x6F77, 0xE660, 0x6F6A, + 0xE661, 0x6F7B, 0xE662, 0x71B2, 0xE663, 0x71AF, 0xE664, 0x719B, + 0xE665, 0x71B0, 0xE666, 0x71A0, 0xE667, 0x719A, 0xE668, 0x71A9, + 0xE669, 0x71B5, 0xE66A, 0x719D, 0xE66B, 0x71A5, 0xE66C, 0x719E, + 0xE66D, 0x71A4, 0xE66E, 0x71A1, 0xE66F, 0x71AA, 0xE670, 0x719C, + 0xE671, 0x71A7, 0xE672, 0x71B3, 0xE673, 0x7298, 0xE674, 0x729A, + 0xE675, 0x7358, 0xE676, 0x7352, 0xE677, 0x735E, 0xE678, 0x735F, + 0xE679, 0x7360, 0xE67A, 0x735D, 0xE67B, 0x735B, 0xE67C, 0x7361, + 0xE67D, 0x735A, 0xE67E, 0x7359, 0xE6A1, 0x7362, 0xE6A2, 0x7487, + 0xE6A3, 0x7489, 0xE6A4, 0x748A, 0xE6A5, 0x7486, 0xE6A6, 0x7481, + 0xE6A7, 0x747D, 0xE6A8, 0x7485, 0xE6A9, 0x7488, 0xE6AA, 0x747C, + 0xE6AB, 0x7479, 0xE6AC, 0x7508, 0xE6AD, 0x7507, 0xE6AE, 0x757E, + 0xE6AF, 0x7625, 0xE6B0, 0x761E, 0xE6B1, 0x7619, 0xE6B2, 0x761D, + 0xE6B3, 0x761C, 0xE6B4, 0x7623, 0xE6B5, 0x761A, 0xE6B6, 0x7628, + 0xE6B7, 0x761B, 0xE6B8, 0x769C, 0xE6B9, 0x769D, 0xE6BA, 0x769E, + 0xE6BB, 0x769B, 0xE6BC, 0x778D, 0xE6BD, 0x778F, 0xE6BE, 0x7789, + 0xE6BF, 0x7788, 0xE6C0, 0x78CD, 0xE6C1, 0x78BB, 0xE6C2, 0x78CF, + 0xE6C3, 0x78CC, 0xE6C4, 0x78D1, 0xE6C5, 0x78CE, 0xE6C6, 0x78D4, + 0xE6C7, 0x78C8, 0xE6C8, 0x78C3, 0xE6C9, 0x78C4, 0xE6CA, 0x78C9, + 0xE6CB, 0x799A, 0xE6CC, 0x79A1, 0xE6CD, 0x79A0, 0xE6CE, 0x799C, + 0xE6CF, 0x79A2, 0xE6D0, 0x799B, 0xE6D1, 0x6B76, 0xE6D2, 0x7A39, + 0xE6D3, 0x7AB2, 0xE6D4, 0x7AB4, 0xE6D5, 0x7AB3, 0xE6D6, 0x7BB7, + 0xE6D7, 0x7BCB, 0xE6D8, 0x7BBE, 0xE6D9, 0x7BAC, 0xE6DA, 0x7BCE, + 0xE6DB, 0x7BAF, 0xE6DC, 0x7BB9, 0xE6DD, 0x7BCA, 0xE6DE, 0x7BB5, + 0xE6DF, 0x7CC5, 0xE6E0, 0x7CC8, 0xE6E1, 0x7CCC, 0xE6E2, 0x7CCB, + 0xE6E3, 0x7DF7, 0xE6E4, 0x7DDB, 0xE6E5, 0x7DEA, 0xE6E6, 0x7DE7, + 0xE6E7, 0x7DD7, 0xE6E8, 0x7DE1, 0xE6E9, 0x7E03, 0xE6EA, 0x7DFA, + 0xE6EB, 0x7DE6, 0xE6EC, 0x7DF6, 0xE6ED, 0x7DF1, 0xE6EE, 0x7DF0, + 0xE6EF, 0x7DEE, 0xE6F0, 0x7DDF, 0xE6F1, 0x7F76, 0xE6F2, 0x7FAC, + 0xE6F3, 0x7FB0, 0xE6F4, 0x7FAD, 0xE6F5, 0x7FED, 0xE6F6, 0x7FEB, + 0xE6F7, 0x7FEA, 0xE6F8, 0x7FEC, 0xE6F9, 0x7FE6, 0xE6FA, 0x7FE8, + 0xE6FB, 0x8064, 0xE6FC, 0x8067, 0xE6FD, 0x81A3, 0xE6FE, 0x819F, + 0xE740, 0x819E, 0xE741, 0x8195, 0xE742, 0x81A2, 0xE743, 0x8199, + 0xE744, 0x8197, 0xE745, 0x8216, 0xE746, 0x824F, 0xE747, 0x8253, + 0xE748, 0x8252, 0xE749, 0x8250, 0xE74A, 0x824E, 0xE74B, 0x8251, + 0xE74C, 0x8524, 0xE74D, 0x853B, 0xE74E, 0x850F, 0xE74F, 0x8500, + 0xE750, 0x8529, 0xE751, 0x850E, 0xE752, 0x8509, 0xE753, 0x850D, + 0xE754, 0x851F, 0xE755, 0x850A, 0xE756, 0x8527, 0xE757, 0x851C, + 0xE758, 0x84FB, 0xE759, 0x852B, 0xE75A, 0x84FA, 0xE75B, 0x8508, + 0xE75C, 0x850C, 0xE75D, 0x84F4, 0xE75E, 0x852A, 0xE75F, 0x84F2, + 0xE760, 0x8515, 0xE761, 0x84F7, 0xE762, 0x84EB, 0xE763, 0x84F3, + 0xE764, 0x84FC, 0xE765, 0x8512, 0xE766, 0x84EA, 0xE767, 0x84E9, + 0xE768, 0x8516, 0xE769, 0x84FE, 0xE76A, 0x8528, 0xE76B, 0x851D, + 0xE76C, 0x852E, 0xE76D, 0x8502, 0xE76E, 0x84FD, 0xE76F, 0x851E, + 0xE770, 0x84F6, 0xE771, 0x8531, 0xE772, 0x8526, 0xE773, 0x84E7, + 0xE774, 0x84E8, 0xE775, 0x84F0, 0xE776, 0x84EF, 0xE777, 0x84F9, + 0xE778, 0x8518, 0xE779, 0x8520, 0xE77A, 0x8530, 0xE77B, 0x850B, + 0xE77C, 0x8519, 0xE77D, 0x852F, 0xE77E, 0x8662, 0xE7A1, 0x8756, + 0xE7A2, 0x8763, 0xE7A3, 0x8764, 0xE7A4, 0x8777, 0xE7A5, 0x87E1, + 0xE7A6, 0x8773, 0xE7A7, 0x8758, 0xE7A8, 0x8754, 0xE7A9, 0x875B, + 0xE7AA, 0x8752, 0xE7AB, 0x8761, 0xE7AC, 0x875A, 0xE7AD, 0x8751, + 0xE7AE, 0x875E, 0xE7AF, 0x876D, 0xE7B0, 0x876A, 0xE7B1, 0x8750, + 0xE7B2, 0x874E, 0xE7B3, 0x875F, 0xE7B4, 0x875D, 0xE7B5, 0x876F, + 0xE7B6, 0x876C, 0xE7B7, 0x877A, 0xE7B8, 0x876E, 0xE7B9, 0x875C, + 0xE7BA, 0x8765, 0xE7BB, 0x874F, 0xE7BC, 0x877B, 0xE7BD, 0x8775, + 0xE7BE, 0x8762, 0xE7BF, 0x8767, 0xE7C0, 0x8769, 0xE7C1, 0x885A, + 0xE7C2, 0x8905, 0xE7C3, 0x890C, 0xE7C4, 0x8914, 0xE7C5, 0x890B, + 0xE7C6, 0x8917, 0xE7C7, 0x8918, 0xE7C8, 0x8919, 0xE7C9, 0x8906, + 0xE7CA, 0x8916, 0xE7CB, 0x8911, 0xE7CC, 0x890E, 0xE7CD, 0x8909, + 0xE7CE, 0x89A2, 0xE7CF, 0x89A4, 0xE7D0, 0x89A3, 0xE7D1, 0x89ED, + 0xE7D2, 0x89F0, 0xE7D3, 0x89EC, 0xE7D4, 0x8ACF, 0xE7D5, 0x8AC6, + 0xE7D6, 0x8AB8, 0xE7D7, 0x8AD3, 0xE7D8, 0x8AD1, 0xE7D9, 0x8AD4, + 0xE7DA, 0x8AD5, 0xE7DB, 0x8ABB, 0xE7DC, 0x8AD7, 0xE7DD, 0x8ABE, + 0xE7DE, 0x8AC0, 0xE7DF, 0x8AC5, 0xE7E0, 0x8AD8, 0xE7E1, 0x8AC3, + 0xE7E2, 0x8ABA, 0xE7E3, 0x8ABD, 0xE7E4, 0x8AD9, 0xE7E5, 0x8C3E, + 0xE7E6, 0x8C4D, 0xE7E7, 0x8C8F, 0xE7E8, 0x8CE5, 0xE7E9, 0x8CDF, + 0xE7EA, 0x8CD9, 0xE7EB, 0x8CE8, 0xE7EC, 0x8CDA, 0xE7ED, 0x8CDD, + 0xE7EE, 0x8CE7, 0xE7EF, 0x8DA0, 0xE7F0, 0x8D9C, 0xE7F1, 0x8DA1, + 0xE7F2, 0x8D9B, 0xE7F3, 0x8E20, 0xE7F4, 0x8E23, 0xE7F5, 0x8E25, + 0xE7F6, 0x8E24, 0xE7F7, 0x8E2E, 0xE7F8, 0x8E15, 0xE7F9, 0x8E1B, + 0xE7FA, 0x8E16, 0xE7FB, 0x8E11, 0xE7FC, 0x8E19, 0xE7FD, 0x8E26, + 0xE7FE, 0x8E27, 0xE840, 0x8E14, 0xE841, 0x8E12, 0xE842, 0x8E18, + 0xE843, 0x8E13, 0xE844, 0x8E1C, 0xE845, 0x8E17, 0xE846, 0x8E1A, + 0xE847, 0x8F2C, 0xE848, 0x8F24, 0xE849, 0x8F18, 0xE84A, 0x8F1A, + 0xE84B, 0x8F20, 0xE84C, 0x8F23, 0xE84D, 0x8F16, 0xE84E, 0x8F17, + 0xE84F, 0x9073, 0xE850, 0x9070, 0xE851, 0x906F, 0xE852, 0x9067, + 0xE853, 0x906B, 0xE854, 0x912F, 0xE855, 0x912B, 0xE856, 0x9129, + 0xE857, 0x912A, 0xE858, 0x9132, 0xE859, 0x9126, 0xE85A, 0x912E, + 0xE85B, 0x9185, 0xE85C, 0x9186, 0xE85D, 0x918A, 0xE85E, 0x9181, + 0xE85F, 0x9182, 0xE860, 0x9184, 0xE861, 0x9180, 0xE862, 0x92D0, + 0xE863, 0x92C3, 0xE864, 0x92C4, 0xE865, 0x92C0, 0xE866, 0x92D9, + 0xE867, 0x92B6, 0xE868, 0x92CF, 0xE869, 0x92F1, 0xE86A, 0x92DF, + 0xE86B, 0x92D8, 0xE86C, 0x92E9, 0xE86D, 0x92D7, 0xE86E, 0x92DD, + 0xE86F, 0x92CC, 0xE870, 0x92EF, 0xE871, 0x92C2, 0xE872, 0x92E8, + 0xE873, 0x92CA, 0xE874, 0x92C8, 0xE875, 0x92CE, 0xE876, 0x92E6, + 0xE877, 0x92CD, 0xE878, 0x92D5, 0xE879, 0x92C9, 0xE87A, 0x92E0, + 0xE87B, 0x92DE, 0xE87C, 0x92E7, 0xE87D, 0x92D1, 0xE87E, 0x92D3, + 0xE8A1, 0x92B5, 0xE8A2, 0x92E1, 0xE8A3, 0x92C6, 0xE8A4, 0x92B4, + 0xE8A5, 0x957C, 0xE8A6, 0x95AC, 0xE8A7, 0x95AB, 0xE8A8, 0x95AE, + 0xE8A9, 0x95B0, 0xE8AA, 0x96A4, 0xE8AB, 0x96A2, 0xE8AC, 0x96D3, + 0xE8AD, 0x9705, 0xE8AE, 0x9708, 0xE8AF, 0x9702, 0xE8B0, 0x975A, + 0xE8B1, 0x978A, 0xE8B2, 0x978E, 0xE8B3, 0x9788, 0xE8B4, 0x97D0, + 0xE8B5, 0x97CF, 0xE8B6, 0x981E, 0xE8B7, 0x981D, 0xE8B8, 0x9826, + 0xE8B9, 0x9829, 0xE8BA, 0x9828, 0xE8BB, 0x9820, 0xE8BC, 0x981B, + 0xE8BD, 0x9827, 0xE8BE, 0x98B2, 0xE8BF, 0x9908, 0xE8C0, 0x98FA, + 0xE8C1, 0x9911, 0xE8C2, 0x9914, 0xE8C3, 0x9916, 0xE8C4, 0x9917, + 0xE8C5, 0x9915, 0xE8C6, 0x99DC, 0xE8C7, 0x99CD, 0xE8C8, 0x99CF, + 0xE8C9, 0x99D3, 0xE8CA, 0x99D4, 0xE8CB, 0x99CE, 0xE8CC, 0x99C9, + 0xE8CD, 0x99D6, 0xE8CE, 0x99D8, 0xE8CF, 0x99CB, 0xE8D0, 0x99D7, + 0xE8D1, 0x99CC, 0xE8D2, 0x9AB3, 0xE8D3, 0x9AEC, 0xE8D4, 0x9AEB, + 0xE8D5, 0x9AF3, 0xE8D6, 0x9AF2, 0xE8D7, 0x9AF1, 0xE8D8, 0x9B46, + 0xE8D9, 0x9B43, 0xE8DA, 0x9B67, 0xE8DB, 0x9B74, 0xE8DC, 0x9B71, + 0xE8DD, 0x9B66, 0xE8DE, 0x9B76, 0xE8DF, 0x9B75, 0xE8E0, 0x9B70, + 0xE8E1, 0x9B68, 0xE8E2, 0x9B64, 0xE8E3, 0x9B6C, 0xE8E4, 0x9CFC, + 0xE8E5, 0x9CFA, 0xE8E6, 0x9CFD, 0xE8E7, 0x9CFF, 0xE8E8, 0x9CF7, + 0xE8E9, 0x9D07, 0xE8EA, 0x9D00, 0xE8EB, 0x9CF9, 0xE8EC, 0x9CFB, + 0xE8ED, 0x9D08, 0xE8EE, 0x9D05, 0xE8EF, 0x9D04, 0xE8F0, 0x9E83, + 0xE8F1, 0x9ED3, 0xE8F2, 0x9F0F, 0xE8F3, 0x9F10, 0xE8F4, 0x511C, + 0xE8F5, 0x5113, 0xE8F6, 0x5117, 0xE8F7, 0x511A, 0xE8F8, 0x5111, + 0xE8F9, 0x51DE, 0xE8FA, 0x5334, 0xE8FB, 0x53E1, 0xE8FC, 0x5670, + 0xE8FD, 0x5660, 0xE8FE, 0x566E, 0xE940, 0x5673, 0xE941, 0x5666, + 0xE942, 0x5663, 0xE943, 0x566D, 0xE944, 0x5672, 0xE945, 0x565E, + 0xE946, 0x5677, 0xE947, 0x571C, 0xE948, 0x571B, 0xE949, 0x58C8, + 0xE94A, 0x58BD, 0xE94B, 0x58C9, 0xE94C, 0x58BF, 0xE94D, 0x58BA, + 0xE94E, 0x58C2, 0xE94F, 0x58BC, 0xE950, 0x58C6, 0xE951, 0x5B17, + 0xE952, 0x5B19, 0xE953, 0x5B1B, 0xE954, 0x5B21, 0xE955, 0x5B14, + 0xE956, 0x5B13, 0xE957, 0x5B10, 0xE958, 0x5B16, 0xE959, 0x5B28, + 0xE95A, 0x5B1A, 0xE95B, 0x5B20, 0xE95C, 0x5B1E, 0xE95D, 0x5BEF, + 0xE95E, 0x5DAC, 0xE95F, 0x5DB1, 0xE960, 0x5DA9, 0xE961, 0x5DA7, + 0xE962, 0x5DB5, 0xE963, 0x5DB0, 0xE964, 0x5DAE, 0xE965, 0x5DAA, + 0xE966, 0x5DA8, 0xE967, 0x5DB2, 0xE968, 0x5DAD, 0xE969, 0x5DAF, + 0xE96A, 0x5DB4, 0xE96B, 0x5E67, 0xE96C, 0x5E68, 0xE96D, 0x5E66, + 0xE96E, 0x5E6F, 0xE96F, 0x5EE9, 0xE970, 0x5EE7, 0xE971, 0x5EE6, + 0xE972, 0x5EE8, 0xE973, 0x5EE5, 0xE974, 0x5F4B, 0xE975, 0x5FBC, + 0xE976, 0x619D, 0xE977, 0x61A8, 0xE978, 0x6196, 0xE979, 0x61C5, + 0xE97A, 0x61B4, 0xE97B, 0x61C6, 0xE97C, 0x61C1, 0xE97D, 0x61CC, + 0xE97E, 0x61BA, 0xE9A1, 0x61BF, 0xE9A2, 0x61B8, 0xE9A3, 0x618C, + 0xE9A4, 0x64D7, 0xE9A5, 0x64D6, 0xE9A6, 0x64D0, 0xE9A7, 0x64CF, + 0xE9A8, 0x64C9, 0xE9A9, 0x64BD, 0xE9AA, 0x6489, 0xE9AB, 0x64C3, + 0xE9AC, 0x64DB, 0xE9AD, 0x64F3, 0xE9AE, 0x64D9, 0xE9AF, 0x6533, + 0xE9B0, 0x657F, 0xE9B1, 0x657C, 0xE9B2, 0x65A2, 0xE9B3, 0x66C8, + 0xE9B4, 0x66BE, 0xE9B5, 0x66C0, 0xE9B6, 0x66CA, 0xE9B7, 0x66CB, + 0xE9B8, 0x66CF, 0xE9B9, 0x66BD, 0xE9BA, 0x66BB, 0xE9BB, 0x66BA, + 0xE9BC, 0x66CC, 0xE9BD, 0x6723, 0xE9BE, 0x6A34, 0xE9BF, 0x6A66, + 0xE9C0, 0x6A49, 0xE9C1, 0x6A67, 0xE9C2, 0x6A32, 0xE9C3, 0x6A68, + 0xE9C4, 0x6A3E, 0xE9C5, 0x6A5D, 0xE9C6, 0x6A6D, 0xE9C7, 0x6A76, + 0xE9C8, 0x6A5B, 0xE9C9, 0x6A51, 0xE9CA, 0x6A28, 0xE9CB, 0x6A5A, + 0xE9CC, 0x6A3B, 0xE9CD, 0x6A3F, 0xE9CE, 0x6A41, 0xE9CF, 0x6A6A, + 0xE9D0, 0x6A64, 0xE9D1, 0x6A50, 0xE9D2, 0x6A4F, 0xE9D3, 0x6A54, + 0xE9D4, 0x6A6F, 0xE9D5, 0x6A69, 0xE9D6, 0x6A60, 0xE9D7, 0x6A3C, + 0xE9D8, 0x6A5E, 0xE9D9, 0x6A56, 0xE9DA, 0x6A55, 0xE9DB, 0x6A4D, + 0xE9DC, 0x6A4E, 0xE9DD, 0x6A46, 0xE9DE, 0x6B55, 0xE9DF, 0x6B54, + 0xE9E0, 0x6B56, 0xE9E1, 0x6BA7, 0xE9E2, 0x6BAA, 0xE9E3, 0x6BAB, + 0xE9E4, 0x6BC8, 0xE9E5, 0x6BC7, 0xE9E6, 0x6C04, 0xE9E7, 0x6C03, + 0xE9E8, 0x6C06, 0xE9E9, 0x6FAD, 0xE9EA, 0x6FCB, 0xE9EB, 0x6FA3, + 0xE9EC, 0x6FC7, 0xE9ED, 0x6FBC, 0xE9EE, 0x6FCE, 0xE9EF, 0x6FC8, + 0xE9F0, 0x6F5E, 0xE9F1, 0x6FC4, 0xE9F2, 0x6FBD, 0xE9F3, 0x6F9E, + 0xE9F4, 0x6FCA, 0xE9F5, 0x6FA8, 0xE9F6, 0x7004, 0xE9F7, 0x6FA5, + 0xE9F8, 0x6FAE, 0xE9F9, 0x6FBA, 0xE9FA, 0x6FAC, 0xE9FB, 0x6FAA, + 0xE9FC, 0x6FCF, 0xE9FD, 0x6FBF, 0xE9FE, 0x6FB8, 0xEA40, 0x6FA2, + 0xEA41, 0x6FC9, 0xEA42, 0x6FAB, 0xEA43, 0x6FCD, 0xEA44, 0x6FAF, + 0xEA45, 0x6FB2, 0xEA46, 0x6FB0, 0xEA47, 0x71C5, 0xEA48, 0x71C2, + 0xEA49, 0x71BF, 0xEA4A, 0x71B8, 0xEA4B, 0x71D6, 0xEA4C, 0x71C0, + 0xEA4D, 0x71C1, 0xEA4E, 0x71CB, 0xEA4F, 0x71D4, 0xEA50, 0x71CA, + 0xEA51, 0x71C7, 0xEA52, 0x71CF, 0xEA53, 0x71BD, 0xEA54, 0x71D8, + 0xEA55, 0x71BC, 0xEA56, 0x71C6, 0xEA57, 0x71DA, 0xEA58, 0x71DB, + 0xEA59, 0x729D, 0xEA5A, 0x729E, 0xEA5B, 0x7369, 0xEA5C, 0x7366, + 0xEA5D, 0x7367, 0xEA5E, 0x736C, 0xEA5F, 0x7365, 0xEA60, 0x736B, + 0xEA61, 0x736A, 0xEA62, 0x747F, 0xEA63, 0x749A, 0xEA64, 0x74A0, + 0xEA65, 0x7494, 0xEA66, 0x7492, 0xEA67, 0x7495, 0xEA68, 0x74A1, + 0xEA69, 0x750B, 0xEA6A, 0x7580, 0xEA6B, 0x762F, 0xEA6C, 0x762D, + 0xEA6D, 0x7631, 0xEA6E, 0x763D, 0xEA6F, 0x7633, 0xEA70, 0x763C, + 0xEA71, 0x7635, 0xEA72, 0x7632, 0xEA73, 0x7630, 0xEA74, 0x76BB, + 0xEA75, 0x76E6, 0xEA76, 0x779A, 0xEA77, 0x779D, 0xEA78, 0x77A1, + 0xEA79, 0x779C, 0xEA7A, 0x779B, 0xEA7B, 0x77A2, 0xEA7C, 0x77A3, + 0xEA7D, 0x7795, 0xEA7E, 0x7799, 0xEAA1, 0x7797, 0xEAA2, 0x78DD, + 0xEAA3, 0x78E9, 0xEAA4, 0x78E5, 0xEAA5, 0x78EA, 0xEAA6, 0x78DE, + 0xEAA7, 0x78E3, 0xEAA8, 0x78DB, 0xEAA9, 0x78E1, 0xEAAA, 0x78E2, + 0xEAAB, 0x78ED, 0xEAAC, 0x78DF, 0xEAAD, 0x78E0, 0xEAAE, 0x79A4, + 0xEAAF, 0x7A44, 0xEAB0, 0x7A48, 0xEAB1, 0x7A47, 0xEAB2, 0x7AB6, + 0xEAB3, 0x7AB8, 0xEAB4, 0x7AB5, 0xEAB5, 0x7AB1, 0xEAB6, 0x7AB7, + 0xEAB7, 0x7BDE, 0xEAB8, 0x7BE3, 0xEAB9, 0x7BE7, 0xEABA, 0x7BDD, + 0xEABB, 0x7BD5, 0xEABC, 0x7BE5, 0xEABD, 0x7BDA, 0xEABE, 0x7BE8, + 0xEABF, 0x7BF9, 0xEAC0, 0x7BD4, 0xEAC1, 0x7BEA, 0xEAC2, 0x7BE2, + 0xEAC3, 0x7BDC, 0xEAC4, 0x7BEB, 0xEAC5, 0x7BD8, 0xEAC6, 0x7BDF, + 0xEAC7, 0x7CD2, 0xEAC8, 0x7CD4, 0xEAC9, 0x7CD7, 0xEACA, 0x7CD0, + 0xEACB, 0x7CD1, 0xEACC, 0x7E12, 0xEACD, 0x7E21, 0xEACE, 0x7E17, + 0xEACF, 0x7E0C, 0xEAD0, 0x7E1F, 0xEAD1, 0x7E20, 0xEAD2, 0x7E13, + 0xEAD3, 0x7E0E, 0xEAD4, 0x7E1C, 0xEAD5, 0x7E15, 0xEAD6, 0x7E1A, + 0xEAD7, 0x7E22, 0xEAD8, 0x7E0B, 0xEAD9, 0x7E0F, 0xEADA, 0x7E16, + 0xEADB, 0x7E0D, 0xEADC, 0x7E14, 0xEADD, 0x7E25, 0xEADE, 0x7E24, + 0xEADF, 0x7F43, 0xEAE0, 0x7F7B, 0xEAE1, 0x7F7C, 0xEAE2, 0x7F7A, + 0xEAE3, 0x7FB1, 0xEAE4, 0x7FEF, 0xEAE5, 0x802A, 0xEAE6, 0x8029, + 0xEAE7, 0x806C, 0xEAE8, 0x81B1, 0xEAE9, 0x81A6, 0xEAEA, 0x81AE, + 0xEAEB, 0x81B9, 0xEAEC, 0x81B5, 0xEAED, 0x81AB, 0xEAEE, 0x81B0, + 0xEAEF, 0x81AC, 0xEAF0, 0x81B4, 0xEAF1, 0x81B2, 0xEAF2, 0x81B7, + 0xEAF3, 0x81A7, 0xEAF4, 0x81F2, 0xEAF5, 0x8255, 0xEAF6, 0x8256, + 0xEAF7, 0x8257, 0xEAF8, 0x8556, 0xEAF9, 0x8545, 0xEAFA, 0x856B, + 0xEAFB, 0x854D, 0xEAFC, 0x8553, 0xEAFD, 0x8561, 0xEAFE, 0x8558, + 0xEB40, 0x8540, 0xEB41, 0x8546, 0xEB42, 0x8564, 0xEB43, 0x8541, + 0xEB44, 0x8562, 0xEB45, 0x8544, 0xEB46, 0x8551, 0xEB47, 0x8547, + 0xEB48, 0x8563, 0xEB49, 0x853E, 0xEB4A, 0x855B, 0xEB4B, 0x8571, + 0xEB4C, 0x854E, 0xEB4D, 0x856E, 0xEB4E, 0x8575, 0xEB4F, 0x8555, + 0xEB50, 0x8567, 0xEB51, 0x8560, 0xEB52, 0x858C, 0xEB53, 0x8566, + 0xEB54, 0x855D, 0xEB55, 0x8554, 0xEB56, 0x8565, 0xEB57, 0x856C, + 0xEB58, 0x8663, 0xEB59, 0x8665, 0xEB5A, 0x8664, 0xEB5B, 0x879B, + 0xEB5C, 0x878F, 0xEB5D, 0x8797, 0xEB5E, 0x8793, 0xEB5F, 0x8792, + 0xEB60, 0x8788, 0xEB61, 0x8781, 0xEB62, 0x8796, 0xEB63, 0x8798, + 0xEB64, 0x8779, 0xEB65, 0x8787, 0xEB66, 0x87A3, 0xEB67, 0x8785, + 0xEB68, 0x8790, 0xEB69, 0x8791, 0xEB6A, 0x879D, 0xEB6B, 0x8784, + 0xEB6C, 0x8794, 0xEB6D, 0x879C, 0xEB6E, 0x879A, 0xEB6F, 0x8789, + 0xEB70, 0x891E, 0xEB71, 0x8926, 0xEB72, 0x8930, 0xEB73, 0x892D, + 0xEB74, 0x892E, 0xEB75, 0x8927, 0xEB76, 0x8931, 0xEB77, 0x8922, + 0xEB78, 0x8929, 0xEB79, 0x8923, 0xEB7A, 0x892F, 0xEB7B, 0x892C, + 0xEB7C, 0x891F, 0xEB7D, 0x89F1, 0xEB7E, 0x8AE0, 0xEBA1, 0x8AE2, + 0xEBA2, 0x8AF2, 0xEBA3, 0x8AF4, 0xEBA4, 0x8AF5, 0xEBA5, 0x8ADD, + 0xEBA6, 0x8B14, 0xEBA7, 0x8AE4, 0xEBA8, 0x8ADF, 0xEBA9, 0x8AF0, + 0xEBAA, 0x8AC8, 0xEBAB, 0x8ADE, 0xEBAC, 0x8AE1, 0xEBAD, 0x8AE8, + 0xEBAE, 0x8AFF, 0xEBAF, 0x8AEF, 0xEBB0, 0x8AFB, 0xEBB1, 0x8C91, + 0xEBB2, 0x8C92, 0xEBB3, 0x8C90, 0xEBB4, 0x8CF5, 0xEBB5, 0x8CEE, + 0xEBB6, 0x8CF1, 0xEBB7, 0x8CF0, 0xEBB8, 0x8CF3, 0xEBB9, 0x8D6C, + 0xEBBA, 0x8D6E, 0xEBBB, 0x8DA5, 0xEBBC, 0x8DA7, 0xEBBD, 0x8E33, + 0xEBBE, 0x8E3E, 0xEBBF, 0x8E38, 0xEBC0, 0x8E40, 0xEBC1, 0x8E45, + 0xEBC2, 0x8E36, 0xEBC3, 0x8E3C, 0xEBC4, 0x8E3D, 0xEBC5, 0x8E41, + 0xEBC6, 0x8E30, 0xEBC7, 0x8E3F, 0xEBC8, 0x8EBD, 0xEBC9, 0x8F36, + 0xEBCA, 0x8F2E, 0xEBCB, 0x8F35, 0xEBCC, 0x8F32, 0xEBCD, 0x8F39, + 0xEBCE, 0x8F37, 0xEBCF, 0x8F34, 0xEBD0, 0x9076, 0xEBD1, 0x9079, + 0xEBD2, 0x907B, 0xEBD3, 0x9086, 0xEBD4, 0x90FA, 0xEBD5, 0x9133, + 0xEBD6, 0x9135, 0xEBD7, 0x9136, 0xEBD8, 0x9193, 0xEBD9, 0x9190, + 0xEBDA, 0x9191, 0xEBDB, 0x918D, 0xEBDC, 0x918F, 0xEBDD, 0x9327, + 0xEBDE, 0x931E, 0xEBDF, 0x9308, 0xEBE0, 0x931F, 0xEBE1, 0x9306, + 0xEBE2, 0x930F, 0xEBE3, 0x937A, 0xEBE4, 0x9338, 0xEBE5, 0x933C, + 0xEBE6, 0x931B, 0xEBE7, 0x9323, 0xEBE8, 0x9312, 0xEBE9, 0x9301, + 0xEBEA, 0x9346, 0xEBEB, 0x932D, 0xEBEC, 0x930E, 0xEBED, 0x930D, + 0xEBEE, 0x92CB, 0xEBEF, 0x931D, 0xEBF0, 0x92FA, 0xEBF1, 0x9325, + 0xEBF2, 0x9313, 0xEBF3, 0x92F9, 0xEBF4, 0x92F7, 0xEBF5, 0x9334, + 0xEBF6, 0x9302, 0xEBF7, 0x9324, 0xEBF8, 0x92FF, 0xEBF9, 0x9329, + 0xEBFA, 0x9339, 0xEBFB, 0x9335, 0xEBFC, 0x932A, 0xEBFD, 0x9314, + 0xEBFE, 0x930C, 0xEC40, 0x930B, 0xEC41, 0x92FE, 0xEC42, 0x9309, + 0xEC43, 0x9300, 0xEC44, 0x92FB, 0xEC45, 0x9316, 0xEC46, 0x95BC, + 0xEC47, 0x95CD, 0xEC48, 0x95BE, 0xEC49, 0x95B9, 0xEC4A, 0x95BA, + 0xEC4B, 0x95B6, 0xEC4C, 0x95BF, 0xEC4D, 0x95B5, 0xEC4E, 0x95BD, + 0xEC4F, 0x96A9, 0xEC50, 0x96D4, 0xEC51, 0x970B, 0xEC52, 0x9712, + 0xEC53, 0x9710, 0xEC54, 0x9799, 0xEC55, 0x9797, 0xEC56, 0x9794, + 0xEC57, 0x97F0, 0xEC58, 0x97F8, 0xEC59, 0x9835, 0xEC5A, 0x982F, + 0xEC5B, 0x9832, 0xEC5C, 0x9924, 0xEC5D, 0x991F, 0xEC5E, 0x9927, + 0xEC5F, 0x9929, 0xEC60, 0x999E, 0xEC61, 0x99EE, 0xEC62, 0x99EC, + 0xEC63, 0x99E5, 0xEC64, 0x99E4, 0xEC65, 0x99F0, 0xEC66, 0x99E3, + 0xEC67, 0x99EA, 0xEC68, 0x99E9, 0xEC69, 0x99E7, 0xEC6A, 0x9AB9, + 0xEC6B, 0x9ABF, 0xEC6C, 0x9AB4, 0xEC6D, 0x9ABB, 0xEC6E, 0x9AF6, + 0xEC6F, 0x9AFA, 0xEC70, 0x9AF9, 0xEC71, 0x9AF7, 0xEC72, 0x9B33, + 0xEC73, 0x9B80, 0xEC74, 0x9B85, 0xEC75, 0x9B87, 0xEC76, 0x9B7C, + 0xEC77, 0x9B7E, 0xEC78, 0x9B7B, 0xEC79, 0x9B82, 0xEC7A, 0x9B93, + 0xEC7B, 0x9B92, 0xEC7C, 0x9B90, 0xEC7D, 0x9B7A, 0xEC7E, 0x9B95, + 0xECA1, 0x9B7D, 0xECA2, 0x9B88, 0xECA3, 0x9D25, 0xECA4, 0x9D17, + 0xECA5, 0x9D20, 0xECA6, 0x9D1E, 0xECA7, 0x9D14, 0xECA8, 0x9D29, + 0xECA9, 0x9D1D, 0xECAA, 0x9D18, 0xECAB, 0x9D22, 0xECAC, 0x9D10, + 0xECAD, 0x9D19, 0xECAE, 0x9D1F, 0xECAF, 0x9E88, 0xECB0, 0x9E86, + 0xECB1, 0x9E87, 0xECB2, 0x9EAE, 0xECB3, 0x9EAD, 0xECB4, 0x9ED5, + 0xECB5, 0x9ED6, 0xECB6, 0x9EFA, 0xECB7, 0x9F12, 0xECB8, 0x9F3D, + 0xECB9, 0x5126, 0xECBA, 0x5125, 0xECBB, 0x5122, 0xECBC, 0x5124, + 0xECBD, 0x5120, 0xECBE, 0x5129, 0xECBF, 0x52F4, 0xECC0, 0x5693, + 0xECC1, 0x568C, 0xECC2, 0x568D, 0xECC3, 0x5686, 0xECC4, 0x5684, + 0xECC5, 0x5683, 0xECC6, 0x567E, 0xECC7, 0x5682, 0xECC8, 0x567F, + 0xECC9, 0x5681, 0xECCA, 0x58D6, 0xECCB, 0x58D4, 0xECCC, 0x58CF, + 0xECCD, 0x58D2, 0xECCE, 0x5B2D, 0xECCF, 0x5B25, 0xECD0, 0x5B32, + 0xECD1, 0x5B23, 0xECD2, 0x5B2C, 0xECD3, 0x5B27, 0xECD4, 0x5B26, + 0xECD5, 0x5B2F, 0xECD6, 0x5B2E, 0xECD7, 0x5B7B, 0xECD8, 0x5BF1, + 0xECD9, 0x5BF2, 0xECDA, 0x5DB7, 0xECDB, 0x5E6C, 0xECDC, 0x5E6A, + 0xECDD, 0x5FBE, 0xECDE, 0x5FBB, 0xECDF, 0x61C3, 0xECE0, 0x61B5, + 0xECE1, 0x61BC, 0xECE2, 0x61E7, 0xECE3, 0x61E0, 0xECE4, 0x61E5, + 0xECE5, 0x61E4, 0xECE6, 0x61E8, 0xECE7, 0x61DE, 0xECE8, 0x64EF, + 0xECE9, 0x64E9, 0xECEA, 0x64E3, 0xECEB, 0x64EB, 0xECEC, 0x64E4, + 0xECED, 0x64E8, 0xECEE, 0x6581, 0xECEF, 0x6580, 0xECF0, 0x65B6, + 0xECF1, 0x65DA, 0xECF2, 0x66D2, 0xECF3, 0x6A8D, 0xECF4, 0x6A96, + 0xECF5, 0x6A81, 0xECF6, 0x6AA5, 0xECF7, 0x6A89, 0xECF8, 0x6A9F, + 0xECF9, 0x6A9B, 0xECFA, 0x6AA1, 0xECFB, 0x6A9E, 0xECFC, 0x6A87, + 0xECFD, 0x6A93, 0xECFE, 0x6A8E, 0xED40, 0x6A95, 0xED41, 0x6A83, + 0xED42, 0x6AA8, 0xED43, 0x6AA4, 0xED44, 0x6A91, 0xED45, 0x6A7F, + 0xED46, 0x6AA6, 0xED47, 0x6A9A, 0xED48, 0x6A85, 0xED49, 0x6A8C, + 0xED4A, 0x6A92, 0xED4B, 0x6B5B, 0xED4C, 0x6BAD, 0xED4D, 0x6C09, + 0xED4E, 0x6FCC, 0xED4F, 0x6FA9, 0xED50, 0x6FF4, 0xED51, 0x6FD4, + 0xED52, 0x6FE3, 0xED53, 0x6FDC, 0xED54, 0x6FED, 0xED55, 0x6FE7, + 0xED56, 0x6FE6, 0xED57, 0x6FDE, 0xED58, 0x6FF2, 0xED59, 0x6FDD, + 0xED5A, 0x6FE2, 0xED5B, 0x6FE8, 0xED5C, 0x71E1, 0xED5D, 0x71F1, + 0xED5E, 0x71E8, 0xED5F, 0x71F2, 0xED60, 0x71E4, 0xED61, 0x71F0, + 0xED62, 0x71E2, 0xED63, 0x7373, 0xED64, 0x736E, 0xED65, 0x736F, + 0xED66, 0x7497, 0xED67, 0x74B2, 0xED68, 0x74AB, 0xED69, 0x7490, + 0xED6A, 0x74AA, 0xED6B, 0x74AD, 0xED6C, 0x74B1, 0xED6D, 0x74A5, + 0xED6E, 0x74AF, 0xED6F, 0x7510, 0xED70, 0x7511, 0xED71, 0x7512, + 0xED72, 0x750F, 0xED73, 0x7584, 0xED74, 0x7643, 0xED75, 0x7648, + 0xED76, 0x7649, 0xED77, 0x7647, 0xED78, 0x76A4, 0xED79, 0x76E9, + 0xED7A, 0x77B5, 0xED7B, 0x77AB, 0xED7C, 0x77B2, 0xED7D, 0x77B7, + 0xED7E, 0x77B6, 0xEDA1, 0x77B4, 0xEDA2, 0x77B1, 0xEDA3, 0x77A8, + 0xEDA4, 0x77F0, 0xEDA5, 0x78F3, 0xEDA6, 0x78FD, 0xEDA7, 0x7902, + 0xEDA8, 0x78FB, 0xEDA9, 0x78FC, 0xEDAA, 0x78F2, 0xEDAB, 0x7905, + 0xEDAC, 0x78F9, 0xEDAD, 0x78FE, 0xEDAE, 0x7904, 0xEDAF, 0x79AB, + 0xEDB0, 0x79A8, 0xEDB1, 0x7A5C, 0xEDB2, 0x7A5B, 0xEDB3, 0x7A56, + 0xEDB4, 0x7A58, 0xEDB5, 0x7A54, 0xEDB6, 0x7A5A, 0xEDB7, 0x7ABE, + 0xEDB8, 0x7AC0, 0xEDB9, 0x7AC1, 0xEDBA, 0x7C05, 0xEDBB, 0x7C0F, + 0xEDBC, 0x7BF2, 0xEDBD, 0x7C00, 0xEDBE, 0x7BFF, 0xEDBF, 0x7BFB, + 0xEDC0, 0x7C0E, 0xEDC1, 0x7BF4, 0xEDC2, 0x7C0B, 0xEDC3, 0x7BF3, + 0xEDC4, 0x7C02, 0xEDC5, 0x7C09, 0xEDC6, 0x7C03, 0xEDC7, 0x7C01, + 0xEDC8, 0x7BF8, 0xEDC9, 0x7BFD, 0xEDCA, 0x7C06, 0xEDCB, 0x7BF0, + 0xEDCC, 0x7BF1, 0xEDCD, 0x7C10, 0xEDCE, 0x7C0A, 0xEDCF, 0x7CE8, + 0xEDD0, 0x7E2D, 0xEDD1, 0x7E3C, 0xEDD2, 0x7E42, 0xEDD3, 0x7E33, + 0xEDD4, 0x9848, 0xEDD5, 0x7E38, 0xEDD6, 0x7E2A, 0xEDD7, 0x7E49, + 0xEDD8, 0x7E40, 0xEDD9, 0x7E47, 0xEDDA, 0x7E29, 0xEDDB, 0x7E4C, + 0xEDDC, 0x7E30, 0xEDDD, 0x7E3B, 0xEDDE, 0x7E36, 0xEDDF, 0x7E44, + 0xEDE0, 0x7E3A, 0xEDE1, 0x7F45, 0xEDE2, 0x7F7F, 0xEDE3, 0x7F7E, + 0xEDE4, 0x7F7D, 0xEDE5, 0x7FF4, 0xEDE6, 0x7FF2, 0xEDE7, 0x802C, + 0xEDE8, 0x81BB, 0xEDE9, 0x81C4, 0xEDEA, 0x81CC, 0xEDEB, 0x81CA, + 0xEDEC, 0x81C5, 0xEDED, 0x81C7, 0xEDEE, 0x81BC, 0xEDEF, 0x81E9, + 0xEDF0, 0x825B, 0xEDF1, 0x825A, 0xEDF2, 0x825C, 0xEDF3, 0x8583, + 0xEDF4, 0x8580, 0xEDF5, 0x858F, 0xEDF6, 0x85A7, 0xEDF7, 0x8595, + 0xEDF8, 0x85A0, 0xEDF9, 0x858B, 0xEDFA, 0x85A3, 0xEDFB, 0x857B, + 0xEDFC, 0x85A4, 0xEDFD, 0x859A, 0xEDFE, 0x859E, 0xEE40, 0x8577, + 0xEE41, 0x857C, 0xEE42, 0x8589, 0xEE43, 0x85A1, 0xEE44, 0x857A, + 0xEE45, 0x8578, 0xEE46, 0x8557, 0xEE47, 0x858E, 0xEE48, 0x8596, + 0xEE49, 0x8586, 0xEE4A, 0x858D, 0xEE4B, 0x8599, 0xEE4C, 0x859D, + 0xEE4D, 0x8581, 0xEE4E, 0x85A2, 0xEE4F, 0x8582, 0xEE50, 0x8588, + 0xEE51, 0x8585, 0xEE52, 0x8579, 0xEE53, 0x8576, 0xEE54, 0x8598, + 0xEE55, 0x8590, 0xEE56, 0x859F, 0xEE57, 0x8668, 0xEE58, 0x87BE, + 0xEE59, 0x87AA, 0xEE5A, 0x87AD, 0xEE5B, 0x87C5, 0xEE5C, 0x87B0, + 0xEE5D, 0x87AC, 0xEE5E, 0x87B9, 0xEE5F, 0x87B5, 0xEE60, 0x87BC, + 0xEE61, 0x87AE, 0xEE62, 0x87C9, 0xEE63, 0x87C3, 0xEE64, 0x87C2, + 0xEE65, 0x87CC, 0xEE66, 0x87B7, 0xEE67, 0x87AF, 0xEE68, 0x87C4, + 0xEE69, 0x87CA, 0xEE6A, 0x87B4, 0xEE6B, 0x87B6, 0xEE6C, 0x87BF, + 0xEE6D, 0x87B8, 0xEE6E, 0x87BD, 0xEE6F, 0x87DE, 0xEE70, 0x87B2, + 0xEE71, 0x8935, 0xEE72, 0x8933, 0xEE73, 0x893C, 0xEE74, 0x893E, + 0xEE75, 0x8941, 0xEE76, 0x8952, 0xEE77, 0x8937, 0xEE78, 0x8942, + 0xEE79, 0x89AD, 0xEE7A, 0x89AF, 0xEE7B, 0x89AE, 0xEE7C, 0x89F2, + 0xEE7D, 0x89F3, 0xEE7E, 0x8B1E, 0xEEA1, 0x8B18, 0xEEA2, 0x8B16, + 0xEEA3, 0x8B11, 0xEEA4, 0x8B05, 0xEEA5, 0x8B0B, 0xEEA6, 0x8B22, + 0xEEA7, 0x8B0F, 0xEEA8, 0x8B12, 0xEEA9, 0x8B15, 0xEEAA, 0x8B07, + 0xEEAB, 0x8B0D, 0xEEAC, 0x8B08, 0xEEAD, 0x8B06, 0xEEAE, 0x8B1C, + 0xEEAF, 0x8B13, 0xEEB0, 0x8B1A, 0xEEB1, 0x8C4F, 0xEEB2, 0x8C70, + 0xEEB3, 0x8C72, 0xEEB4, 0x8C71, 0xEEB5, 0x8C6F, 0xEEB6, 0x8C95, + 0xEEB7, 0x8C94, 0xEEB8, 0x8CF9, 0xEEB9, 0x8D6F, 0xEEBA, 0x8E4E, + 0xEEBB, 0x8E4D, 0xEEBC, 0x8E53, 0xEEBD, 0x8E50, 0xEEBE, 0x8E4C, + 0xEEBF, 0x8E47, 0xEEC0, 0x8F43, 0xEEC1, 0x8F40, 0xEEC2, 0x9085, + 0xEEC3, 0x907E, 0xEEC4, 0x9138, 0xEEC5, 0x919A, 0xEEC6, 0x91A2, + 0xEEC7, 0x919B, 0xEEC8, 0x9199, 0xEEC9, 0x919F, 0xEECA, 0x91A1, + 0xEECB, 0x919D, 0xEECC, 0x91A0, 0xEECD, 0x93A1, 0xEECE, 0x9383, + 0xEECF, 0x93AF, 0xEED0, 0x9364, 0xEED1, 0x9356, 0xEED2, 0x9347, + 0xEED3, 0x937C, 0xEED4, 0x9358, 0xEED5, 0x935C, 0xEED6, 0x9376, + 0xEED7, 0x9349, 0xEED8, 0x9350, 0xEED9, 0x9351, 0xEEDA, 0x9360, + 0xEEDB, 0x936D, 0xEEDC, 0x938F, 0xEEDD, 0x934C, 0xEEDE, 0x936A, + 0xEEDF, 0x9379, 0xEEE0, 0x9357, 0xEEE1, 0x9355, 0xEEE2, 0x9352, + 0xEEE3, 0x934F, 0xEEE4, 0x9371, 0xEEE5, 0x9377, 0xEEE6, 0x937B, + 0xEEE7, 0x9361, 0xEEE8, 0x935E, 0xEEE9, 0x9363, 0xEEEA, 0x9367, + 0xEEEB, 0x9380, 0xEEEC, 0x934E, 0xEEED, 0x9359, 0xEEEE, 0x95C7, + 0xEEEF, 0x95C0, 0xEEF0, 0x95C9, 0xEEF1, 0x95C3, 0xEEF2, 0x95C5, + 0xEEF3, 0x95B7, 0xEEF4, 0x96AE, 0xEEF5, 0x96B0, 0xEEF6, 0x96AC, + 0xEEF7, 0x9720, 0xEEF8, 0x971F, 0xEEF9, 0x9718, 0xEEFA, 0x971D, + 0xEEFB, 0x9719, 0xEEFC, 0x979A, 0xEEFD, 0x97A1, 0xEEFE, 0x979C, + 0xEF40, 0x979E, 0xEF41, 0x979D, 0xEF42, 0x97D5, 0xEF43, 0x97D4, + 0xEF44, 0x97F1, 0xEF45, 0x9841, 0xEF46, 0x9844, 0xEF47, 0x984A, + 0xEF48, 0x9849, 0xEF49, 0x9845, 0xEF4A, 0x9843, 0xEF4B, 0x9925, + 0xEF4C, 0x992B, 0xEF4D, 0x992C, 0xEF4E, 0x992A, 0xEF4F, 0x9933, + 0xEF50, 0x9932, 0xEF51, 0x992F, 0xEF52, 0x992D, 0xEF53, 0x9931, + 0xEF54, 0x9930, 0xEF55, 0x9998, 0xEF56, 0x99A3, 0xEF57, 0x99A1, + 0xEF58, 0x9A02, 0xEF59, 0x99FA, 0xEF5A, 0x99F4, 0xEF5B, 0x99F7, + 0xEF5C, 0x99F9, 0xEF5D, 0x99F8, 0xEF5E, 0x99F6, 0xEF5F, 0x99FB, + 0xEF60, 0x99FD, 0xEF61, 0x99FE, 0xEF62, 0x99FC, 0xEF63, 0x9A03, + 0xEF64, 0x9ABE, 0xEF65, 0x9AFE, 0xEF66, 0x9AFD, 0xEF67, 0x9B01, + 0xEF68, 0x9AFC, 0xEF69, 0x9B48, 0xEF6A, 0x9B9A, 0xEF6B, 0x9BA8, + 0xEF6C, 0x9B9E, 0xEF6D, 0x9B9B, 0xEF6E, 0x9BA6, 0xEF6F, 0x9BA1, + 0xEF70, 0x9BA5, 0xEF71, 0x9BA4, 0xEF72, 0x9B86, 0xEF73, 0x9BA2, + 0xEF74, 0x9BA0, 0xEF75, 0x9BAF, 0xEF76, 0x9D33, 0xEF77, 0x9D41, + 0xEF78, 0x9D67, 0xEF79, 0x9D36, 0xEF7A, 0x9D2E, 0xEF7B, 0x9D2F, + 0xEF7C, 0x9D31, 0xEF7D, 0x9D38, 0xEF7E, 0x9D30, 0xEFA1, 0x9D45, + 0xEFA2, 0x9D42, 0xEFA3, 0x9D43, 0xEFA4, 0x9D3E, 0xEFA5, 0x9D37, + 0xEFA6, 0x9D40, 0xEFA7, 0x9D3D, 0xEFA8, 0x7FF5, 0xEFA9, 0x9D2D, + 0xEFAA, 0x9E8A, 0xEFAB, 0x9E89, 0xEFAC, 0x9E8D, 0xEFAD, 0x9EB0, + 0xEFAE, 0x9EC8, 0xEFAF, 0x9EDA, 0xEFB0, 0x9EFB, 0xEFB1, 0x9EFF, + 0xEFB2, 0x9F24, 0xEFB3, 0x9F23, 0xEFB4, 0x9F22, 0xEFB5, 0x9F54, + 0xEFB6, 0x9FA0, 0xEFB7, 0x5131, 0xEFB8, 0x512D, 0xEFB9, 0x512E, + 0xEFBA, 0x5698, 0xEFBB, 0x569C, 0xEFBC, 0x5697, 0xEFBD, 0x569A, + 0xEFBE, 0x569D, 0xEFBF, 0x5699, 0xEFC0, 0x5970, 0xEFC1, 0x5B3C, + 0xEFC2, 0x5C69, 0xEFC3, 0x5C6A, 0xEFC4, 0x5DC0, 0xEFC5, 0x5E6D, + 0xEFC6, 0x5E6E, 0xEFC7, 0x61D8, 0xEFC8, 0x61DF, 0xEFC9, 0x61ED, + 0xEFCA, 0x61EE, 0xEFCB, 0x61F1, 0xEFCC, 0x61EA, 0xEFCD, 0x61F0, + 0xEFCE, 0x61EB, 0xEFCF, 0x61D6, 0xEFD0, 0x61E9, 0xEFD1, 0x64FF, + 0xEFD2, 0x6504, 0xEFD3, 0x64FD, 0xEFD4, 0x64F8, 0xEFD5, 0x6501, + 0xEFD6, 0x6503, 0xEFD7, 0x64FC, 0xEFD8, 0x6594, 0xEFD9, 0x65DB, + 0xEFDA, 0x66DA, 0xEFDB, 0x66DB, 0xEFDC, 0x66D8, 0xEFDD, 0x6AC5, + 0xEFDE, 0x6AB9, 0xEFDF, 0x6ABD, 0xEFE0, 0x6AE1, 0xEFE1, 0x6AC6, + 0xEFE2, 0x6ABA, 0xEFE3, 0x6AB6, 0xEFE4, 0x6AB7, 0xEFE5, 0x6AC7, + 0xEFE6, 0x6AB4, 0xEFE7, 0x6AAD, 0xEFE8, 0x6B5E, 0xEFE9, 0x6BC9, + 0xEFEA, 0x6C0B, 0xEFEB, 0x7007, 0xEFEC, 0x700C, 0xEFED, 0x700D, + 0xEFEE, 0x7001, 0xEFEF, 0x7005, 0xEFF0, 0x7014, 0xEFF1, 0x700E, + 0xEFF2, 0x6FFF, 0xEFF3, 0x7000, 0xEFF4, 0x6FFB, 0xEFF5, 0x7026, + 0xEFF6, 0x6FFC, 0xEFF7, 0x6FF7, 0xEFF8, 0x700A, 0xEFF9, 0x7201, + 0xEFFA, 0x71FF, 0xEFFB, 0x71F9, 0xEFFC, 0x7203, 0xEFFD, 0x71FD, + 0xEFFE, 0x7376, 0xF040, 0x74B8, 0xF041, 0x74C0, 0xF042, 0x74B5, + 0xF043, 0x74C1, 0xF044, 0x74BE, 0xF045, 0x74B6, 0xF046, 0x74BB, + 0xF047, 0x74C2, 0xF048, 0x7514, 0xF049, 0x7513, 0xF04A, 0x765C, + 0xF04B, 0x7664, 0xF04C, 0x7659, 0xF04D, 0x7650, 0xF04E, 0x7653, + 0xF04F, 0x7657, 0xF050, 0x765A, 0xF051, 0x76A6, 0xF052, 0x76BD, + 0xF053, 0x76EC, 0xF054, 0x77C2, 0xF055, 0x77BA, 0xF056, 0x78FF, + 0xF057, 0x790C, 0xF058, 0x7913, 0xF059, 0x7914, 0xF05A, 0x7909, + 0xF05B, 0x7910, 0xF05C, 0x7912, 0xF05D, 0x7911, 0xF05E, 0x79AD, + 0xF05F, 0x79AC, 0xF060, 0x7A5F, 0xF061, 0x7C1C, 0xF062, 0x7C29, + 0xF063, 0x7C19, 0xF064, 0x7C20, 0xF065, 0x7C1F, 0xF066, 0x7C2D, + 0xF067, 0x7C1D, 0xF068, 0x7C26, 0xF069, 0x7C28, 0xF06A, 0x7C22, + 0xF06B, 0x7C25, 0xF06C, 0x7C30, 0xF06D, 0x7E5C, 0xF06E, 0x7E50, + 0xF06F, 0x7E56, 0xF070, 0x7E63, 0xF071, 0x7E58, 0xF072, 0x7E62, + 0xF073, 0x7E5F, 0xF074, 0x7E51, 0xF075, 0x7E60, 0xF076, 0x7E57, + 0xF077, 0x7E53, 0xF078, 0x7FB5, 0xF079, 0x7FB3, 0xF07A, 0x7FF7, + 0xF07B, 0x7FF8, 0xF07C, 0x8075, 0xF07D, 0x81D1, 0xF07E, 0x81D2, + 0xF0A1, 0x81D0, 0xF0A2, 0x825F, 0xF0A3, 0x825E, 0xF0A4, 0x85B4, + 0xF0A5, 0x85C6, 0xF0A6, 0x85C0, 0xF0A7, 0x85C3, 0xF0A8, 0x85C2, + 0xF0A9, 0x85B3, 0xF0AA, 0x85B5, 0xF0AB, 0x85BD, 0xF0AC, 0x85C7, + 0xF0AD, 0x85C4, 0xF0AE, 0x85BF, 0xF0AF, 0x85CB, 0xF0B0, 0x85CE, + 0xF0B1, 0x85C8, 0xF0B2, 0x85C5, 0xF0B3, 0x85B1, 0xF0B4, 0x85B6, + 0xF0B5, 0x85D2, 0xF0B6, 0x8624, 0xF0B7, 0x85B8, 0xF0B8, 0x85B7, + 0xF0B9, 0x85BE, 0xF0BA, 0x8669, 0xF0BB, 0x87E7, 0xF0BC, 0x87E6, + 0xF0BD, 0x87E2, 0xF0BE, 0x87DB, 0xF0BF, 0x87EB, 0xF0C0, 0x87EA, + 0xF0C1, 0x87E5, 0xF0C2, 0x87DF, 0xF0C3, 0x87F3, 0xF0C4, 0x87E4, + 0xF0C5, 0x87D4, 0xF0C6, 0x87DC, 0xF0C7, 0x87D3, 0xF0C8, 0x87ED, + 0xF0C9, 0x87D8, 0xF0CA, 0x87E3, 0xF0CB, 0x87A4, 0xF0CC, 0x87D7, + 0xF0CD, 0x87D9, 0xF0CE, 0x8801, 0xF0CF, 0x87F4, 0xF0D0, 0x87E8, + 0xF0D1, 0x87DD, 0xF0D2, 0x8953, 0xF0D3, 0x894B, 0xF0D4, 0x894F, + 0xF0D5, 0x894C, 0xF0D6, 0x8946, 0xF0D7, 0x8950, 0xF0D8, 0x8951, + 0xF0D9, 0x8949, 0xF0DA, 0x8B2A, 0xF0DB, 0x8B27, 0xF0DC, 0x8B23, + 0xF0DD, 0x8B33, 0xF0DE, 0x8B30, 0xF0DF, 0x8B35, 0xF0E0, 0x8B47, + 0xF0E1, 0x8B2F, 0xF0E2, 0x8B3C, 0xF0E3, 0x8B3E, 0xF0E4, 0x8B31, + 0xF0E5, 0x8B25, 0xF0E6, 0x8B37, 0xF0E7, 0x8B26, 0xF0E8, 0x8B36, + 0xF0E9, 0x8B2E, 0xF0EA, 0x8B24, 0xF0EB, 0x8B3B, 0xF0EC, 0x8B3D, + 0xF0ED, 0x8B3A, 0xF0EE, 0x8C42, 0xF0EF, 0x8C75, 0xF0F0, 0x8C99, + 0xF0F1, 0x8C98, 0xF0F2, 0x8C97, 0xF0F3, 0x8CFE, 0xF0F4, 0x8D04, + 0xF0F5, 0x8D02, 0xF0F6, 0x8D00, 0xF0F7, 0x8E5C, 0xF0F8, 0x8E62, + 0xF0F9, 0x8E60, 0xF0FA, 0x8E57, 0xF0FB, 0x8E56, 0xF0FC, 0x8E5E, + 0xF0FD, 0x8E65, 0xF0FE, 0x8E67, 0xF140, 0x8E5B, 0xF141, 0x8E5A, + 0xF142, 0x8E61, 0xF143, 0x8E5D, 0xF144, 0x8E69, 0xF145, 0x8E54, + 0xF146, 0x8F46, 0xF147, 0x8F47, 0xF148, 0x8F48, 0xF149, 0x8F4B, + 0xF14A, 0x9128, 0xF14B, 0x913A, 0xF14C, 0x913B, 0xF14D, 0x913E, + 0xF14E, 0x91A8, 0xF14F, 0x91A5, 0xF150, 0x91A7, 0xF151, 0x91AF, + 0xF152, 0x91AA, 0xF153, 0x93B5, 0xF154, 0x938C, 0xF155, 0x9392, + 0xF156, 0x93B7, 0xF157, 0x939B, 0xF158, 0x939D, 0xF159, 0x9389, + 0xF15A, 0x93A7, 0xF15B, 0x938E, 0xF15C, 0x93AA, 0xF15D, 0x939E, + 0xF15E, 0x93A6, 0xF15F, 0x9395, 0xF160, 0x9388, 0xF161, 0x9399, + 0xF162, 0x939F, 0xF163, 0x938D, 0xF164, 0x93B1, 0xF165, 0x9391, + 0xF166, 0x93B2, 0xF167, 0x93A4, 0xF168, 0x93A8, 0xF169, 0x93B4, + 0xF16A, 0x93A3, 0xF16B, 0x93A5, 0xF16C, 0x95D2, 0xF16D, 0x95D3, + 0xF16E, 0x95D1, 0xF16F, 0x96B3, 0xF170, 0x96D7, 0xF171, 0x96DA, + 0xF172, 0x5DC2, 0xF173, 0x96DF, 0xF174, 0x96D8, 0xF175, 0x96DD, + 0xF176, 0x9723, 0xF177, 0x9722, 0xF178, 0x9725, 0xF179, 0x97AC, + 0xF17A, 0x97AE, 0xF17B, 0x97A8, 0xF17C, 0x97AB, 0xF17D, 0x97A4, + 0xF17E, 0x97AA, 0xF1A1, 0x97A2, 0xF1A2, 0x97A5, 0xF1A3, 0x97D7, + 0xF1A4, 0x97D9, 0xF1A5, 0x97D6, 0xF1A6, 0x97D8, 0xF1A7, 0x97FA, + 0xF1A8, 0x9850, 0xF1A9, 0x9851, 0xF1AA, 0x9852, 0xF1AB, 0x98B8, + 0xF1AC, 0x9941, 0xF1AD, 0x993C, 0xF1AE, 0x993A, 0xF1AF, 0x9A0F, + 0xF1B0, 0x9A0B, 0xF1B1, 0x9A09, 0xF1B2, 0x9A0D, 0xF1B3, 0x9A04, + 0xF1B4, 0x9A11, 0xF1B5, 0x9A0A, 0xF1B6, 0x9A05, 0xF1B7, 0x9A07, + 0xF1B8, 0x9A06, 0xF1B9, 0x9AC0, 0xF1BA, 0x9ADC, 0xF1BB, 0x9B08, + 0xF1BC, 0x9B04, 0xF1BD, 0x9B05, 0xF1BE, 0x9B29, 0xF1BF, 0x9B35, + 0xF1C0, 0x9B4A, 0xF1C1, 0x9B4C, 0xF1C2, 0x9B4B, 0xF1C3, 0x9BC7, + 0xF1C4, 0x9BC6, 0xF1C5, 0x9BC3, 0xF1C6, 0x9BBF, 0xF1C7, 0x9BC1, + 0xF1C8, 0x9BB5, 0xF1C9, 0x9BB8, 0xF1CA, 0x9BD3, 0xF1CB, 0x9BB6, + 0xF1CC, 0x9BC4, 0xF1CD, 0x9BB9, 0xF1CE, 0x9BBD, 0xF1CF, 0x9D5C, + 0xF1D0, 0x9D53, 0xF1D1, 0x9D4F, 0xF1D2, 0x9D4A, 0xF1D3, 0x9D5B, + 0xF1D4, 0x9D4B, 0xF1D5, 0x9D59, 0xF1D6, 0x9D56, 0xF1D7, 0x9D4C, + 0xF1D8, 0x9D57, 0xF1D9, 0x9D52, 0xF1DA, 0x9D54, 0xF1DB, 0x9D5F, + 0xF1DC, 0x9D58, 0xF1DD, 0x9D5A, 0xF1DE, 0x9E8E, 0xF1DF, 0x9E8C, + 0xF1E0, 0x9EDF, 0xF1E1, 0x9F01, 0xF1E2, 0x9F00, 0xF1E3, 0x9F16, + 0xF1E4, 0x9F25, 0xF1E5, 0x9F2B, 0xF1E6, 0x9F2A, 0xF1E7, 0x9F29, + 0xF1E8, 0x9F28, 0xF1E9, 0x9F4C, 0xF1EA, 0x9F55, 0xF1EB, 0x5134, + 0xF1EC, 0x5135, 0xF1ED, 0x5296, 0xF1EE, 0x52F7, 0xF1EF, 0x53B4, + 0xF1F0, 0x56AB, 0xF1F1, 0x56AD, 0xF1F2, 0x56A6, 0xF1F3, 0x56A7, + 0xF1F4, 0x56AA, 0xF1F5, 0x56AC, 0xF1F6, 0x58DA, 0xF1F7, 0x58DD, + 0xF1F8, 0x58DB, 0xF1F9, 0x5912, 0xF1FA, 0x5B3D, 0xF1FB, 0x5B3E, + 0xF1FC, 0x5B3F, 0xF1FD, 0x5DC3, 0xF1FE, 0x5E70, 0xF240, 0x5FBF, + 0xF241, 0x61FB, 0xF242, 0x6507, 0xF243, 0x6510, 0xF244, 0x650D, + 0xF245, 0x6509, 0xF246, 0x650C, 0xF247, 0x650E, 0xF248, 0x6584, + 0xF249, 0x65DE, 0xF24A, 0x65DD, 0xF24B, 0x66DE, 0xF24C, 0x6AE7, + 0xF24D, 0x6AE0, 0xF24E, 0x6ACC, 0xF24F, 0x6AD1, 0xF250, 0x6AD9, + 0xF251, 0x6ACB, 0xF252, 0x6ADF, 0xF253, 0x6ADC, 0xF254, 0x6AD0, + 0xF255, 0x6AEB, 0xF256, 0x6ACF, 0xF257, 0x6ACD, 0xF258, 0x6ADE, + 0xF259, 0x6B60, 0xF25A, 0x6BB0, 0xF25B, 0x6C0C, 0xF25C, 0x7019, + 0xF25D, 0x7027, 0xF25E, 0x7020, 0xF25F, 0x7016, 0xF260, 0x702B, + 0xF261, 0x7021, 0xF262, 0x7022, 0xF263, 0x7023, 0xF264, 0x7029, + 0xF265, 0x7017, 0xF266, 0x7024, 0xF267, 0x701C, 0xF268, 0x702A, + 0xF269, 0x720C, 0xF26A, 0x720A, 0xF26B, 0x7207, 0xF26C, 0x7202, + 0xF26D, 0x7205, 0xF26E, 0x72A5, 0xF26F, 0x72A6, 0xF270, 0x72A4, + 0xF271, 0x72A3, 0xF272, 0x72A1, 0xF273, 0x74CB, 0xF274, 0x74C5, + 0xF275, 0x74B7, 0xF276, 0x74C3, 0xF277, 0x7516, 0xF278, 0x7660, + 0xF279, 0x77C9, 0xF27A, 0x77CA, 0xF27B, 0x77C4, 0xF27C, 0x77F1, + 0xF27D, 0x791D, 0xF27E, 0x791B, 0xF2A1, 0x7921, 0xF2A2, 0x791C, + 0xF2A3, 0x7917, 0xF2A4, 0x791E, 0xF2A5, 0x79B0, 0xF2A6, 0x7A67, + 0xF2A7, 0x7A68, 0xF2A8, 0x7C33, 0xF2A9, 0x7C3C, 0xF2AA, 0x7C39, + 0xF2AB, 0x7C2C, 0xF2AC, 0x7C3B, 0xF2AD, 0x7CEC, 0xF2AE, 0x7CEA, + 0xF2AF, 0x7E76, 0xF2B0, 0x7E75, 0xF2B1, 0x7E78, 0xF2B2, 0x7E70, + 0xF2B3, 0x7E77, 0xF2B4, 0x7E6F, 0xF2B5, 0x7E7A, 0xF2B6, 0x7E72, + 0xF2B7, 0x7E74, 0xF2B8, 0x7E68, 0xF2B9, 0x7F4B, 0xF2BA, 0x7F4A, + 0xF2BB, 0x7F83, 0xF2BC, 0x7F86, 0xF2BD, 0x7FB7, 0xF2BE, 0x7FFD, + 0xF2BF, 0x7FFE, 0xF2C0, 0x8078, 0xF2C1, 0x81D7, 0xF2C2, 0x81D5, + 0xF2C3, 0x8264, 0xF2C4, 0x8261, 0xF2C5, 0x8263, 0xF2C6, 0x85EB, + 0xF2C7, 0x85F1, 0xF2C8, 0x85ED, 0xF2C9, 0x85D9, 0xF2CA, 0x85E1, + 0xF2CB, 0x85E8, 0xF2CC, 0x85DA, 0xF2CD, 0x85D7, 0xF2CE, 0x85EC, + 0xF2CF, 0x85F2, 0xF2D0, 0x85F8, 0xF2D1, 0x85D8, 0xF2D2, 0x85DF, + 0xF2D3, 0x85E3, 0xF2D4, 0x85DC, 0xF2D5, 0x85D1, 0xF2D6, 0x85F0, + 0xF2D7, 0x85E6, 0xF2D8, 0x85EF, 0xF2D9, 0x85DE, 0xF2DA, 0x85E2, + 0xF2DB, 0x8800, 0xF2DC, 0x87FA, 0xF2DD, 0x8803, 0xF2DE, 0x87F6, + 0xF2DF, 0x87F7, 0xF2E0, 0x8809, 0xF2E1, 0x880C, 0xF2E2, 0x880B, + 0xF2E3, 0x8806, 0xF2E4, 0x87FC, 0xF2E5, 0x8808, 0xF2E6, 0x87FF, + 0xF2E7, 0x880A, 0xF2E8, 0x8802, 0xF2E9, 0x8962, 0xF2EA, 0x895A, + 0xF2EB, 0x895B, 0xF2EC, 0x8957, 0xF2ED, 0x8961, 0xF2EE, 0x895C, + 0xF2EF, 0x8958, 0xF2F0, 0x895D, 0xF2F1, 0x8959, 0xF2F2, 0x8988, + 0xF2F3, 0x89B7, 0xF2F4, 0x89B6, 0xF2F5, 0x89F6, 0xF2F6, 0x8B50, + 0xF2F7, 0x8B48, 0xF2F8, 0x8B4A, 0xF2F9, 0x8B40, 0xF2FA, 0x8B53, + 0xF2FB, 0x8B56, 0xF2FC, 0x8B54, 0xF2FD, 0x8B4B, 0xF2FE, 0x8B55, + 0xF340, 0x8B51, 0xF341, 0x8B42, 0xF342, 0x8B52, 0xF343, 0x8B57, + 0xF344, 0x8C43, 0xF345, 0x8C77, 0xF346, 0x8C76, 0xF347, 0x8C9A, + 0xF348, 0x8D06, 0xF349, 0x8D07, 0xF34A, 0x8D09, 0xF34B, 0x8DAC, + 0xF34C, 0x8DAA, 0xF34D, 0x8DAD, 0xF34E, 0x8DAB, 0xF34F, 0x8E6D, + 0xF350, 0x8E78, 0xF351, 0x8E73, 0xF352, 0x8E6A, 0xF353, 0x8E6F, + 0xF354, 0x8E7B, 0xF355, 0x8EC2, 0xF356, 0x8F52, 0xF357, 0x8F51, + 0xF358, 0x8F4F, 0xF359, 0x8F50, 0xF35A, 0x8F53, 0xF35B, 0x8FB4, + 0xF35C, 0x9140, 0xF35D, 0x913F, 0xF35E, 0x91B0, 0xF35F, 0x91AD, + 0xF360, 0x93DE, 0xF361, 0x93C7, 0xF362, 0x93CF, 0xF363, 0x93C2, + 0xF364, 0x93DA, 0xF365, 0x93D0, 0xF366, 0x93F9, 0xF367, 0x93EC, + 0xF368, 0x93CC, 0xF369, 0x93D9, 0xF36A, 0x93A9, 0xF36B, 0x93E6, + 0xF36C, 0x93CA, 0xF36D, 0x93D4, 0xF36E, 0x93EE, 0xF36F, 0x93E3, + 0xF370, 0x93D5, 0xF371, 0x93C4, 0xF372, 0x93CE, 0xF373, 0x93C0, + 0xF374, 0x93D2, 0xF375, 0x93E7, 0xF376, 0x957D, 0xF377, 0x95DA, + 0xF378, 0x95DB, 0xF379, 0x96E1, 0xF37A, 0x9729, 0xF37B, 0x972B, + 0xF37C, 0x972C, 0xF37D, 0x9728, 0xF37E, 0x9726, 0xF3A1, 0x97B3, + 0xF3A2, 0x97B7, 0xF3A3, 0x97B6, 0xF3A4, 0x97DD, 0xF3A5, 0x97DE, + 0xF3A6, 0x97DF, 0xF3A7, 0x985C, 0xF3A8, 0x9859, 0xF3A9, 0x985D, + 0xF3AA, 0x9857, 0xF3AB, 0x98BF, 0xF3AC, 0x98BD, 0xF3AD, 0x98BB, + 0xF3AE, 0x98BE, 0xF3AF, 0x9948, 0xF3B0, 0x9947, 0xF3B1, 0x9943, + 0xF3B2, 0x99A6, 0xF3B3, 0x99A7, 0xF3B4, 0x9A1A, 0xF3B5, 0x9A15, + 0xF3B6, 0x9A25, 0xF3B7, 0x9A1D, 0xF3B8, 0x9A24, 0xF3B9, 0x9A1B, + 0xF3BA, 0x9A22, 0xF3BB, 0x9A20, 0xF3BC, 0x9A27, 0xF3BD, 0x9A23, + 0xF3BE, 0x9A1E, 0xF3BF, 0x9A1C, 0xF3C0, 0x9A14, 0xF3C1, 0x9AC2, + 0xF3C2, 0x9B0B, 0xF3C3, 0x9B0A, 0xF3C4, 0x9B0E, 0xF3C5, 0x9B0C, + 0xF3C6, 0x9B37, 0xF3C7, 0x9BEA, 0xF3C8, 0x9BEB, 0xF3C9, 0x9BE0, + 0xF3CA, 0x9BDE, 0xF3CB, 0x9BE4, 0xF3CC, 0x9BE6, 0xF3CD, 0x9BE2, + 0xF3CE, 0x9BF0, 0xF3CF, 0x9BD4, 0xF3D0, 0x9BD7, 0xF3D1, 0x9BEC, + 0xF3D2, 0x9BDC, 0xF3D3, 0x9BD9, 0xF3D4, 0x9BE5, 0xF3D5, 0x9BD5, + 0xF3D6, 0x9BE1, 0xF3D7, 0x9BDA, 0xF3D8, 0x9D77, 0xF3D9, 0x9D81, + 0xF3DA, 0x9D8A, 0xF3DB, 0x9D84, 0xF3DC, 0x9D88, 0xF3DD, 0x9D71, + 0xF3DE, 0x9D80, 0xF3DF, 0x9D78, 0xF3E0, 0x9D86, 0xF3E1, 0x9D8B, + 0xF3E2, 0x9D8C, 0xF3E3, 0x9D7D, 0xF3E4, 0x9D6B, 0xF3E5, 0x9D74, + 0xF3E6, 0x9D75, 0xF3E7, 0x9D70, 0xF3E8, 0x9D69, 0xF3E9, 0x9D85, + 0xF3EA, 0x9D73, 0xF3EB, 0x9D7B, 0xF3EC, 0x9D82, 0xF3ED, 0x9D6F, + 0xF3EE, 0x9D79, 0xF3EF, 0x9D7F, 0xF3F0, 0x9D87, 0xF3F1, 0x9D68, + 0xF3F2, 0x9E94, 0xF3F3, 0x9E91, 0xF3F4, 0x9EC0, 0xF3F5, 0x9EFC, + 0xF3F6, 0x9F2D, 0xF3F7, 0x9F40, 0xF3F8, 0x9F41, 0xF3F9, 0x9F4D, + 0xF3FA, 0x9F56, 0xF3FB, 0x9F57, 0xF3FC, 0x9F58, 0xF3FD, 0x5337, + 0xF3FE, 0x56B2, 0xF440, 0x56B5, 0xF441, 0x56B3, 0xF442, 0x58E3, + 0xF443, 0x5B45, 0xF444, 0x5DC6, 0xF445, 0x5DC7, 0xF446, 0x5EEE, + 0xF447, 0x5EEF, 0xF448, 0x5FC0, 0xF449, 0x5FC1, 0xF44A, 0x61F9, + 0xF44B, 0x6517, 0xF44C, 0x6516, 0xF44D, 0x6515, 0xF44E, 0x6513, + 0xF44F, 0x65DF, 0xF450, 0x66E8, 0xF451, 0x66E3, 0xF452, 0x66E4, + 0xF453, 0x6AF3, 0xF454, 0x6AF0, 0xF455, 0x6AEA, 0xF456, 0x6AE8, + 0xF457, 0x6AF9, 0xF458, 0x6AF1, 0xF459, 0x6AEE, 0xF45A, 0x6AEF, + 0xF45B, 0x703C, 0xF45C, 0x7035, 0xF45D, 0x702F, 0xF45E, 0x7037, + 0xF45F, 0x7034, 0xF460, 0x7031, 0xF461, 0x7042, 0xF462, 0x7038, + 0xF463, 0x703F, 0xF464, 0x703A, 0xF465, 0x7039, 0xF466, 0x7040, + 0xF467, 0x703B, 0xF468, 0x7033, 0xF469, 0x7041, 0xF46A, 0x7213, + 0xF46B, 0x7214, 0xF46C, 0x72A8, 0xF46D, 0x737D, 0xF46E, 0x737C, + 0xF46F, 0x74BA, 0xF470, 0x76AB, 0xF471, 0x76AA, 0xF472, 0x76BE, + 0xF473, 0x76ED, 0xF474, 0x77CC, 0xF475, 0x77CE, 0xF476, 0x77CF, + 0xF477, 0x77CD, 0xF478, 0x77F2, 0xF479, 0x7925, 0xF47A, 0x7923, + 0xF47B, 0x7927, 0xF47C, 0x7928, 0xF47D, 0x7924, 0xF47E, 0x7929, + 0xF4A1, 0x79B2, 0xF4A2, 0x7A6E, 0xF4A3, 0x7A6C, 0xF4A4, 0x7A6D, + 0xF4A5, 0x7AF7, 0xF4A6, 0x7C49, 0xF4A7, 0x7C48, 0xF4A8, 0x7C4A, + 0xF4A9, 0x7C47, 0xF4AA, 0x7C45, 0xF4AB, 0x7CEE, 0xF4AC, 0x7E7B, + 0xF4AD, 0x7E7E, 0xF4AE, 0x7E81, 0xF4AF, 0x7E80, 0xF4B0, 0x7FBA, + 0xF4B1, 0x7FFF, 0xF4B2, 0x8079, 0xF4B3, 0x81DB, 0xF4B4, 0x81D9, + 0xF4B5, 0x820B, 0xF4B6, 0x8268, 0xF4B7, 0x8269, 0xF4B8, 0x8622, + 0xF4B9, 0x85FF, 0xF4BA, 0x8601, 0xF4BB, 0x85FE, 0xF4BC, 0x861B, + 0xF4BD, 0x8600, 0xF4BE, 0x85F6, 0xF4BF, 0x8604, 0xF4C0, 0x8609, + 0xF4C1, 0x8605, 0xF4C2, 0x860C, 0xF4C3, 0x85FD, 0xF4C4, 0x8819, + 0xF4C5, 0x8810, 0xF4C6, 0x8811, 0xF4C7, 0x8817, 0xF4C8, 0x8813, + 0xF4C9, 0x8816, 0xF4CA, 0x8963, 0xF4CB, 0x8966, 0xF4CC, 0x89B9, + 0xF4CD, 0x89F7, 0xF4CE, 0x8B60, 0xF4CF, 0x8B6A, 0xF4D0, 0x8B5D, + 0xF4D1, 0x8B68, 0xF4D2, 0x8B63, 0xF4D3, 0x8B65, 0xF4D4, 0x8B67, + 0xF4D5, 0x8B6D, 0xF4D6, 0x8DAE, 0xF4D7, 0x8E86, 0xF4D8, 0x8E88, + 0xF4D9, 0x8E84, 0xF4DA, 0x8F59, 0xF4DB, 0x8F56, 0xF4DC, 0x8F57, + 0xF4DD, 0x8F55, 0xF4DE, 0x8F58, 0xF4DF, 0x8F5A, 0xF4E0, 0x908D, + 0xF4E1, 0x9143, 0xF4E2, 0x9141, 0xF4E3, 0x91B7, 0xF4E4, 0x91B5, + 0xF4E5, 0x91B2, 0xF4E6, 0x91B3, 0xF4E7, 0x940B, 0xF4E8, 0x9413, + 0xF4E9, 0x93FB, 0xF4EA, 0x9420, 0xF4EB, 0x940F, 0xF4EC, 0x9414, + 0xF4ED, 0x93FE, 0xF4EE, 0x9415, 0xF4EF, 0x9410, 0xF4F0, 0x9428, + 0xF4F1, 0x9419, 0xF4F2, 0x940D, 0xF4F3, 0x93F5, 0xF4F4, 0x9400, + 0xF4F5, 0x93F7, 0xF4F6, 0x9407, 0xF4F7, 0x940E, 0xF4F8, 0x9416, + 0xF4F9, 0x9412, 0xF4FA, 0x93FA, 0xF4FB, 0x9409, 0xF4FC, 0x93F8, + 0xF4FD, 0x940A, 0xF4FE, 0x93FF, 0xF540, 0x93FC, 0xF541, 0x940C, + 0xF542, 0x93F6, 0xF543, 0x9411, 0xF544, 0x9406, 0xF545, 0x95DE, + 0xF546, 0x95E0, 0xF547, 0x95DF, 0xF548, 0x972E, 0xF549, 0x972F, + 0xF54A, 0x97B9, 0xF54B, 0x97BB, 0xF54C, 0x97FD, 0xF54D, 0x97FE, + 0xF54E, 0x9860, 0xF54F, 0x9862, 0xF550, 0x9863, 0xF551, 0x985F, + 0xF552, 0x98C1, 0xF553, 0x98C2, 0xF554, 0x9950, 0xF555, 0x994E, + 0xF556, 0x9959, 0xF557, 0x994C, 0xF558, 0x994B, 0xF559, 0x9953, + 0xF55A, 0x9A32, 0xF55B, 0x9A34, 0xF55C, 0x9A31, 0xF55D, 0x9A2C, + 0xF55E, 0x9A2A, 0xF55F, 0x9A36, 0xF560, 0x9A29, 0xF561, 0x9A2E, + 0xF562, 0x9A38, 0xF563, 0x9A2D, 0xF564, 0x9AC7, 0xF565, 0x9ACA, + 0xF566, 0x9AC6, 0xF567, 0x9B10, 0xF568, 0x9B12, 0xF569, 0x9B11, + 0xF56A, 0x9C0B, 0xF56B, 0x9C08, 0xF56C, 0x9BF7, 0xF56D, 0x9C05, + 0xF56E, 0x9C12, 0xF56F, 0x9BF8, 0xF570, 0x9C40, 0xF571, 0x9C07, + 0xF572, 0x9C0E, 0xF573, 0x9C06, 0xF574, 0x9C17, 0xF575, 0x9C14, + 0xF576, 0x9C09, 0xF577, 0x9D9F, 0xF578, 0x9D99, 0xF579, 0x9DA4, + 0xF57A, 0x9D9D, 0xF57B, 0x9D92, 0xF57C, 0x9D98, 0xF57D, 0x9D90, + 0xF57E, 0x9D9B, 0xF5A1, 0x9DA0, 0xF5A2, 0x9D94, 0xF5A3, 0x9D9C, + 0xF5A4, 0x9DAA, 0xF5A5, 0x9D97, 0xF5A6, 0x9DA1, 0xF5A7, 0x9D9A, + 0xF5A8, 0x9DA2, 0xF5A9, 0x9DA8, 0xF5AA, 0x9D9E, 0xF5AB, 0x9DA3, + 0xF5AC, 0x9DBF, 0xF5AD, 0x9DA9, 0xF5AE, 0x9D96, 0xF5AF, 0x9DA6, + 0xF5B0, 0x9DA7, 0xF5B1, 0x9E99, 0xF5B2, 0x9E9B, 0xF5B3, 0x9E9A, + 0xF5B4, 0x9EE5, 0xF5B5, 0x9EE4, 0xF5B6, 0x9EE7, 0xF5B7, 0x9EE6, + 0xF5B8, 0x9F30, 0xF5B9, 0x9F2E, 0xF5BA, 0x9F5B, 0xF5BB, 0x9F60, + 0xF5BC, 0x9F5E, 0xF5BD, 0x9F5D, 0xF5BE, 0x9F59, 0xF5BF, 0x9F91, + 0xF5C0, 0x513A, 0xF5C1, 0x5139, 0xF5C2, 0x5298, 0xF5C3, 0x5297, + 0xF5C4, 0x56C3, 0xF5C5, 0x56BD, 0xF5C6, 0x56BE, 0xF5C7, 0x5B48, + 0xF5C8, 0x5B47, 0xF5C9, 0x5DCB, 0xF5CA, 0x5DCF, 0xF5CB, 0x5EF1, + 0xF5CC, 0x61FD, 0xF5CD, 0x651B, 0xF5CE, 0x6B02, 0xF5CF, 0x6AFC, + 0xF5D0, 0x6B03, 0xF5D1, 0x6AF8, 0xF5D2, 0x6B00, 0xF5D3, 0x7043, + 0xF5D4, 0x7044, 0xF5D5, 0x704A, 0xF5D6, 0x7048, 0xF5D7, 0x7049, + 0xF5D8, 0x7045, 0xF5D9, 0x7046, 0xF5DA, 0x721D, 0xF5DB, 0x721A, + 0xF5DC, 0x7219, 0xF5DD, 0x737E, 0xF5DE, 0x7517, 0xF5DF, 0x766A, + 0xF5E0, 0x77D0, 0xF5E1, 0x792D, 0xF5E2, 0x7931, 0xF5E3, 0x792F, + 0xF5E4, 0x7C54, 0xF5E5, 0x7C53, 0xF5E6, 0x7CF2, 0xF5E7, 0x7E8A, + 0xF5E8, 0x7E87, 0xF5E9, 0x7E88, 0xF5EA, 0x7E8B, 0xF5EB, 0x7E86, + 0xF5EC, 0x7E8D, 0xF5ED, 0x7F4D, 0xF5EE, 0x7FBB, 0xF5EF, 0x8030, + 0xF5F0, 0x81DD, 0xF5F1, 0x8618, 0xF5F2, 0x862A, 0xF5F3, 0x8626, + 0xF5F4, 0x861F, 0xF5F5, 0x8623, 0xF5F6, 0x861C, 0xF5F7, 0x8619, + 0xF5F8, 0x8627, 0xF5F9, 0x862E, 0xF5FA, 0x8621, 0xF5FB, 0x8620, + 0xF5FC, 0x8629, 0xF5FD, 0x861E, 0xF5FE, 0x8625, 0xF640, 0x8829, + 0xF641, 0x881D, 0xF642, 0x881B, 0xF643, 0x8820, 0xF644, 0x8824, + 0xF645, 0x881C, 0xF646, 0x882B, 0xF647, 0x884A, 0xF648, 0x896D, + 0xF649, 0x8969, 0xF64A, 0x896E, 0xF64B, 0x896B, 0xF64C, 0x89FA, + 0xF64D, 0x8B79, 0xF64E, 0x8B78, 0xF64F, 0x8B45, 0xF650, 0x8B7A, + 0xF651, 0x8B7B, 0xF652, 0x8D10, 0xF653, 0x8D14, 0xF654, 0x8DAF, + 0xF655, 0x8E8E, 0xF656, 0x8E8C, 0xF657, 0x8F5E, 0xF658, 0x8F5B, + 0xF659, 0x8F5D, 0xF65A, 0x9146, 0xF65B, 0x9144, 0xF65C, 0x9145, + 0xF65D, 0x91B9, 0xF65E, 0x943F, 0xF65F, 0x943B, 0xF660, 0x9436, + 0xF661, 0x9429, 0xF662, 0x943D, 0xF663, 0x943C, 0xF664, 0x9430, + 0xF665, 0x9439, 0xF666, 0x942A, 0xF667, 0x9437, 0xF668, 0x942C, + 0xF669, 0x9440, 0xF66A, 0x9431, 0xF66B, 0x95E5, 0xF66C, 0x95E4, + 0xF66D, 0x95E3, 0xF66E, 0x9735, 0xF66F, 0x973A, 0xF670, 0x97BF, + 0xF671, 0x97E1, 0xF672, 0x9864, 0xF673, 0x98C9, 0xF674, 0x98C6, + 0xF675, 0x98C0, 0xF676, 0x9958, 0xF677, 0x9956, 0xF678, 0x9A39, + 0xF679, 0x9A3D, 0xF67A, 0x9A46, 0xF67B, 0x9A44, 0xF67C, 0x9A42, + 0xF67D, 0x9A41, 0xF67E, 0x9A3A, 0xF6A1, 0x9A3F, 0xF6A2, 0x9ACD, + 0xF6A3, 0x9B15, 0xF6A4, 0x9B17, 0xF6A5, 0x9B18, 0xF6A6, 0x9B16, + 0xF6A7, 0x9B3A, 0xF6A8, 0x9B52, 0xF6A9, 0x9C2B, 0xF6AA, 0x9C1D, + 0xF6AB, 0x9C1C, 0xF6AC, 0x9C2C, 0xF6AD, 0x9C23, 0xF6AE, 0x9C28, + 0xF6AF, 0x9C29, 0xF6B0, 0x9C24, 0xF6B1, 0x9C21, 0xF6B2, 0x9DB7, + 0xF6B3, 0x9DB6, 0xF6B4, 0x9DBC, 0xF6B5, 0x9DC1, 0xF6B6, 0x9DC7, + 0xF6B7, 0x9DCA, 0xF6B8, 0x9DCF, 0xF6B9, 0x9DBE, 0xF6BA, 0x9DC5, + 0xF6BB, 0x9DC3, 0xF6BC, 0x9DBB, 0xF6BD, 0x9DB5, 0xF6BE, 0x9DCE, + 0xF6BF, 0x9DB9, 0xF6C0, 0x9DBA, 0xF6C1, 0x9DAC, 0xF6C2, 0x9DC8, + 0xF6C3, 0x9DB1, 0xF6C4, 0x9DAD, 0xF6C5, 0x9DCC, 0xF6C6, 0x9DB3, + 0xF6C7, 0x9DCD, 0xF6C8, 0x9DB2, 0xF6C9, 0x9E7A, 0xF6CA, 0x9E9C, + 0xF6CB, 0x9EEB, 0xF6CC, 0x9EEE, 0xF6CD, 0x9EED, 0xF6CE, 0x9F1B, + 0xF6CF, 0x9F18, 0xF6D0, 0x9F1A, 0xF6D1, 0x9F31, 0xF6D2, 0x9F4E, + 0xF6D3, 0x9F65, 0xF6D4, 0x9F64, 0xF6D5, 0x9F92, 0xF6D6, 0x4EB9, + 0xF6D7, 0x56C6, 0xF6D8, 0x56C5, 0xF6D9, 0x56CB, 0xF6DA, 0x5971, + 0xF6DB, 0x5B4B, 0xF6DC, 0x5B4C, 0xF6DD, 0x5DD5, 0xF6DE, 0x5DD1, + 0xF6DF, 0x5EF2, 0xF6E0, 0x6521, 0xF6E1, 0x6520, 0xF6E2, 0x6526, + 0xF6E3, 0x6522, 0xF6E4, 0x6B0B, 0xF6E5, 0x6B08, 0xF6E6, 0x6B09, + 0xF6E7, 0x6C0D, 0xF6E8, 0x7055, 0xF6E9, 0x7056, 0xF6EA, 0x7057, + 0xF6EB, 0x7052, 0xF6EC, 0x721E, 0xF6ED, 0x721F, 0xF6EE, 0x72A9, + 0xF6EF, 0x737F, 0xF6F0, 0x74D8, 0xF6F1, 0x74D5, 0xF6F2, 0x74D9, + 0xF6F3, 0x74D7, 0xF6F4, 0x766D, 0xF6F5, 0x76AD, 0xF6F6, 0x7935, + 0xF6F7, 0x79B4, 0xF6F8, 0x7A70, 0xF6F9, 0x7A71, 0xF6FA, 0x7C57, + 0xF6FB, 0x7C5C, 0xF6FC, 0x7C59, 0xF6FD, 0x7C5B, 0xF6FE, 0x7C5A, + 0xF740, 0x7CF4, 0xF741, 0x7CF1, 0xF742, 0x7E91, 0xF743, 0x7F4F, + 0xF744, 0x7F87, 0xF745, 0x81DE, 0xF746, 0x826B, 0xF747, 0x8634, + 0xF748, 0x8635, 0xF749, 0x8633, 0xF74A, 0x862C, 0xF74B, 0x8632, + 0xF74C, 0x8636, 0xF74D, 0x882C, 0xF74E, 0x8828, 0xF74F, 0x8826, + 0xF750, 0x882A, 0xF751, 0x8825, 0xF752, 0x8971, 0xF753, 0x89BF, + 0xF754, 0x89BE, 0xF755, 0x89FB, 0xF756, 0x8B7E, 0xF757, 0x8B84, + 0xF758, 0x8B82, 0xF759, 0x8B86, 0xF75A, 0x8B85, 0xF75B, 0x8B7F, + 0xF75C, 0x8D15, 0xF75D, 0x8E95, 0xF75E, 0x8E94, 0xF75F, 0x8E9A, + 0xF760, 0x8E92, 0xF761, 0x8E90, 0xF762, 0x8E96, 0xF763, 0x8E97, + 0xF764, 0x8F60, 0xF765, 0x8F62, 0xF766, 0x9147, 0xF767, 0x944C, + 0xF768, 0x9450, 0xF769, 0x944A, 0xF76A, 0x944B, 0xF76B, 0x944F, + 0xF76C, 0x9447, 0xF76D, 0x9445, 0xF76E, 0x9448, 0xF76F, 0x9449, + 0xF770, 0x9446, 0xF771, 0x973F, 0xF772, 0x97E3, 0xF773, 0x986A, + 0xF774, 0x9869, 0xF775, 0x98CB, 0xF776, 0x9954, 0xF777, 0x995B, + 0xF778, 0x9A4E, 0xF779, 0x9A53, 0xF77A, 0x9A54, 0xF77B, 0x9A4C, + 0xF77C, 0x9A4F, 0xF77D, 0x9A48, 0xF77E, 0x9A4A, 0xF7A1, 0x9A49, + 0xF7A2, 0x9A52, 0xF7A3, 0x9A50, 0xF7A4, 0x9AD0, 0xF7A5, 0x9B19, + 0xF7A6, 0x9B2B, 0xF7A7, 0x9B3B, 0xF7A8, 0x9B56, 0xF7A9, 0x9B55, + 0xF7AA, 0x9C46, 0xF7AB, 0x9C48, 0xF7AC, 0x9C3F, 0xF7AD, 0x9C44, + 0xF7AE, 0x9C39, 0xF7AF, 0x9C33, 0xF7B0, 0x9C41, 0xF7B1, 0x9C3C, + 0xF7B2, 0x9C37, 0xF7B3, 0x9C34, 0xF7B4, 0x9C32, 0xF7B5, 0x9C3D, + 0xF7B6, 0x9C36, 0xF7B7, 0x9DDB, 0xF7B8, 0x9DD2, 0xF7B9, 0x9DDE, + 0xF7BA, 0x9DDA, 0xF7BB, 0x9DCB, 0xF7BC, 0x9DD0, 0xF7BD, 0x9DDC, + 0xF7BE, 0x9DD1, 0xF7BF, 0x9DDF, 0xF7C0, 0x9DE9, 0xF7C1, 0x9DD9, + 0xF7C2, 0x9DD8, 0xF7C3, 0x9DD6, 0xF7C4, 0x9DF5, 0xF7C5, 0x9DD5, + 0xF7C6, 0x9DDD, 0xF7C7, 0x9EB6, 0xF7C8, 0x9EF0, 0xF7C9, 0x9F35, + 0xF7CA, 0x9F33, 0xF7CB, 0x9F32, 0xF7CC, 0x9F42, 0xF7CD, 0x9F6B, + 0xF7CE, 0x9F95, 0xF7CF, 0x9FA2, 0xF7D0, 0x513D, 0xF7D1, 0x5299, + 0xF7D2, 0x58E8, 0xF7D3, 0x58E7, 0xF7D4, 0x5972, 0xF7D5, 0x5B4D, + 0xF7D6, 0x5DD8, 0xF7D7, 0x882F, 0xF7D8, 0x5F4F, 0xF7D9, 0x6201, + 0xF7DA, 0x6203, 0xF7DB, 0x6204, 0xF7DC, 0x6529, 0xF7DD, 0x6525, + 0xF7DE, 0x6596, 0xF7DF, 0x66EB, 0xF7E0, 0x6B11, 0xF7E1, 0x6B12, + 0xF7E2, 0x6B0F, 0xF7E3, 0x6BCA, 0xF7E4, 0x705B, 0xF7E5, 0x705A, + 0xF7E6, 0x7222, 0xF7E7, 0x7382, 0xF7E8, 0x7381, 0xF7E9, 0x7383, + 0xF7EA, 0x7670, 0xF7EB, 0x77D4, 0xF7EC, 0x7C67, 0xF7ED, 0x7C66, + 0xF7EE, 0x7E95, 0xF7EF, 0x826C, 0xF7F0, 0x863A, 0xF7F1, 0x8640, + 0xF7F2, 0x8639, 0xF7F3, 0x863C, 0xF7F4, 0x8631, 0xF7F5, 0x863B, + 0xF7F6, 0x863E, 0xF7F7, 0x8830, 0xF7F8, 0x8832, 0xF7F9, 0x882E, + 0xF7FA, 0x8833, 0xF7FB, 0x8976, 0xF7FC, 0x8974, 0xF7FD, 0x8973, + 0xF7FE, 0x89FE, 0xF840, 0x8B8C, 0xF841, 0x8B8E, 0xF842, 0x8B8B, + 0xF843, 0x8B88, 0xF844, 0x8C45, 0xF845, 0x8D19, 0xF846, 0x8E98, + 0xF847, 0x8F64, 0xF848, 0x8F63, 0xF849, 0x91BC, 0xF84A, 0x9462, + 0xF84B, 0x9455, 0xF84C, 0x945D, 0xF84D, 0x9457, 0xF84E, 0x945E, + 0xF84F, 0x97C4, 0xF850, 0x97C5, 0xF851, 0x9800, 0xF852, 0x9A56, + 0xF853, 0x9A59, 0xF854, 0x9B1E, 0xF855, 0x9B1F, 0xF856, 0x9B20, + 0xF857, 0x9C52, 0xF858, 0x9C58, 0xF859, 0x9C50, 0xF85A, 0x9C4A, + 0xF85B, 0x9C4D, 0xF85C, 0x9C4B, 0xF85D, 0x9C55, 0xF85E, 0x9C59, + 0xF85F, 0x9C4C, 0xF860, 0x9C4E, 0xF861, 0x9DFB, 0xF862, 0x9DF7, + 0xF863, 0x9DEF, 0xF864, 0x9DE3, 0xF865, 0x9DEB, 0xF866, 0x9DF8, + 0xF867, 0x9DE4, 0xF868, 0x9DF6, 0xF869, 0x9DE1, 0xF86A, 0x9DEE, + 0xF86B, 0x9DE6, 0xF86C, 0x9DF2, 0xF86D, 0x9DF0, 0xF86E, 0x9DE2, + 0xF86F, 0x9DEC, 0xF870, 0x9DF4, 0xF871, 0x9DF3, 0xF872, 0x9DE8, + 0xF873, 0x9DED, 0xF874, 0x9EC2, 0xF875, 0x9ED0, 0xF876, 0x9EF2, + 0xF877, 0x9EF3, 0xF878, 0x9F06, 0xF879, 0x9F1C, 0xF87A, 0x9F38, + 0xF87B, 0x9F37, 0xF87C, 0x9F36, 0xF87D, 0x9F43, 0xF87E, 0x9F4F, + 0xF8A1, 0x9F71, 0xF8A2, 0x9F70, 0xF8A3, 0x9F6E, 0xF8A4, 0x9F6F, + 0xF8A5, 0x56D3, 0xF8A6, 0x56CD, 0xF8A7, 0x5B4E, 0xF8A8, 0x5C6D, + 0xF8A9, 0x652D, 0xF8AA, 0x66ED, 0xF8AB, 0x66EE, 0xF8AC, 0x6B13, + 0xF8AD, 0x705F, 0xF8AE, 0x7061, 0xF8AF, 0x705D, 0xF8B0, 0x7060, + 0xF8B1, 0x7223, 0xF8B2, 0x74DB, 0xF8B3, 0x74E5, 0xF8B4, 0x77D5, + 0xF8B5, 0x7938, 0xF8B6, 0x79B7, 0xF8B7, 0x79B6, 0xF8B8, 0x7C6A, + 0xF8B9, 0x7E97, 0xF8BA, 0x7F89, 0xF8BB, 0x826D, 0xF8BC, 0x8643, + 0xF8BD, 0x8838, 0xF8BE, 0x8837, 0xF8BF, 0x8835, 0xF8C0, 0x884B, + 0xF8C1, 0x8B94, 0xF8C2, 0x8B95, 0xF8C3, 0x8E9E, 0xF8C4, 0x8E9F, + 0xF8C5, 0x8EA0, 0xF8C6, 0x8E9D, 0xF8C7, 0x91BE, 0xF8C8, 0x91BD, + 0xF8C9, 0x91C2, 0xF8CA, 0x946B, 0xF8CB, 0x9468, 0xF8CC, 0x9469, + 0xF8CD, 0x96E5, 0xF8CE, 0x9746, 0xF8CF, 0x9743, 0xF8D0, 0x9747, + 0xF8D1, 0x97C7, 0xF8D2, 0x97E5, 0xF8D3, 0x9A5E, 0xF8D4, 0x9AD5, + 0xF8D5, 0x9B59, 0xF8D6, 0x9C63, 0xF8D7, 0x9C67, 0xF8D8, 0x9C66, + 0xF8D9, 0x9C62, 0xF8DA, 0x9C5E, 0xF8DB, 0x9C60, 0xF8DC, 0x9E02, + 0xF8DD, 0x9DFE, 0xF8DE, 0x9E07, 0xF8DF, 0x9E03, 0xF8E0, 0x9E06, + 0xF8E1, 0x9E05, 0xF8E2, 0x9E00, 0xF8E3, 0x9E01, 0xF8E4, 0x9E09, + 0xF8E5, 0x9DFF, 0xF8E6, 0x9DFD, 0xF8E7, 0x9E04, 0xF8E8, 0x9EA0, + 0xF8E9, 0x9F1E, 0xF8EA, 0x9F46, 0xF8EB, 0x9F74, 0xF8EC, 0x9F75, + 0xF8ED, 0x9F76, 0xF8EE, 0x56D4, 0xF8EF, 0x652E, 0xF8F0, 0x65B8, + 0xF8F1, 0x6B18, 0xF8F2, 0x6B19, 0xF8F3, 0x6B17, 0xF8F4, 0x6B1A, + 0xF8F5, 0x7062, 0xF8F6, 0x7226, 0xF8F7, 0x72AA, 0xF8F8, 0x77D8, + 0xF8F9, 0x77D9, 0xF8FA, 0x7939, 0xF8FB, 0x7C69, 0xF8FC, 0x7C6B, + 0xF8FD, 0x7CF6, 0xF8FE, 0x7E9A, 0xF940, 0x7E98, 0xF941, 0x7E9B, + 0xF942, 0x7E99, 0xF943, 0x81E0, 0xF944, 0x81E1, 0xF945, 0x8646, + 0xF946, 0x8647, 0xF947, 0x8648, 0xF948, 0x8979, 0xF949, 0x897A, + 0xF94A, 0x897C, 0xF94B, 0x897B, 0xF94C, 0x89FF, 0xF94D, 0x8B98, + 0xF94E, 0x8B99, 0xF94F, 0x8EA5, 0xF950, 0x8EA4, 0xF951, 0x8EA3, + 0xF952, 0x946E, 0xF953, 0x946D, 0xF954, 0x946F, 0xF955, 0x9471, + 0xF956, 0x9473, 0xF957, 0x9749, 0xF958, 0x9872, 0xF959, 0x995F, + 0xF95A, 0x9C68, 0xF95B, 0x9C6E, 0xF95C, 0x9C6D, 0xF95D, 0x9E0B, + 0xF95E, 0x9E0D, 0xF95F, 0x9E10, 0xF960, 0x9E0F, 0xF961, 0x9E12, + 0xF962, 0x9E11, 0xF963, 0x9EA1, 0xF964, 0x9EF5, 0xF965, 0x9F09, + 0xF966, 0x9F47, 0xF967, 0x9F78, 0xF968, 0x9F7B, 0xF969, 0x9F7A, + 0xF96A, 0x9F79, 0xF96B, 0x571E, 0xF96C, 0x7066, 0xF96D, 0x7C6F, + 0xF96E, 0x883C, 0xF96F, 0x8DB2, 0xF970, 0x8EA6, 0xF971, 0x91C3, + 0xF972, 0x9474, 0xF973, 0x9478, 0xF974, 0x9476, 0xF975, 0x9475, + 0xF976, 0x9A60, 0xF977, 0x9C74, 0xF978, 0x9C73, 0xF979, 0x9C71, + 0xF97A, 0x9C75, 0xF97B, 0x9E14, 0xF97C, 0x9E13, 0xF97D, 0x9EF6, + 0xF97E, 0x9F0A, 0xF9A1, 0x9FA4, 0xF9A2, 0x7068, 0xF9A3, 0x7065, + 0xF9A4, 0x7CF7, 0xF9A5, 0x866A, 0xF9A6, 0x883E, 0xF9A7, 0x883D, + 0xF9A8, 0x883F, 0xF9A9, 0x8B9E, 0xF9AA, 0x8C9C, 0xF9AB, 0x8EA9, + 0xF9AC, 0x8EC9, 0xF9AD, 0x974B, 0xF9AE, 0x9873, 0xF9AF, 0x9874, + 0xF9B0, 0x98CC, 0xF9B1, 0x9961, 0xF9B2, 0x99AB, 0xF9B3, 0x9A64, + 0xF9B4, 0x9A66, 0xF9B5, 0x9A67, 0xF9B6, 0x9B24, 0xF9B7, 0x9E15, + 0xF9B8, 0x9E17, 0xF9B9, 0x9F48, 0xF9BA, 0x6207, 0xF9BB, 0x6B1E, + 0xF9BC, 0x7227, 0xF9BD, 0x864C, 0xF9BE, 0x8EA8, 0xF9BF, 0x9482, + 0xF9C0, 0x9480, 0xF9C1, 0x9481, 0xF9C2, 0x9A69, 0xF9C3, 0x9A68, + 0xF9C4, 0x9B2E, 0xF9C5, 0x9E19, 0xF9C6, 0x7229, 0xF9C7, 0x864B, + 0xF9C8, 0x8B9F, 0xF9C9, 0x9483, 0xF9CA, 0x9C79, 0xF9CB, 0x9EB7, + 0xF9CC, 0x7675, 0xF9CD, 0x9A6B, 0xF9CE, 0x9C7A, 0xF9CF, 0x9E1D, + 0xF9D0, 0x7069, 0xF9D1, 0x706A, 0xF9D2, 0x9EA4, 0xF9D3, 0x9F7E, + 0xF9D4, 0x9F49, 0xF9D5, 0x9F98, 0xF9D6, 0x7881, 0xF9D7, 0x92B9, + 0xF9D8, 0x88CF, 0xF9D9, 0x58BB, 0xF9DA, 0x6052, 0xF9DB, 0x7CA7, + 0xF9DC, 0x5AFA, 0xF9DD, 0x2554, 0xF9DE, 0x2566, 0xF9DF, 0x2557, + 0xF9E0, 0x2560, 0xF9E1, 0x256C, 0xF9E2, 0x2563, 0xF9E3, 0x255A, + 0xF9E4, 0x2569, 0xF9E5, 0x255D, 0xF9E6, 0x2552, 0xF9E7, 0x2564, + 0xF9E8, 0x2555, 0xF9E9, 0x255E, 0xF9EA, 0x256A, 0xF9EB, 0x2561, + 0xF9EC, 0x2558, 0xF9ED, 0x2567, 0xF9EE, 0x255B, 0xF9EF, 0x2553, + 0xF9F0, 0x2565, 0xF9F1, 0x2556, 0xF9F2, 0x255F, 0xF9F3, 0x256B, + 0xF9F4, 0x2562, 0xF9F5, 0x2559, 0xF9F6, 0x2568, 0xF9F7, 0x255C, + 0xF9F8, 0x2551, 0xF9F9, 0x2550, 0xF9FA, 0x256D, 0xF9FB, 0x256E, + 0xF9FC, 0x2570, 0xF9FD, 0x256F, 0xF9FE, 0x2593, 0, 0 +}; + + + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + int i, n, li, hi; + + + if (src < 0x80) { /* ASCII */ + c = src; + } else { + if (dir) { /* OEMCP to unicode */ + p = oem2uni; + hi = sizeof(oem2uni) / 4 - 1; + } else { /* Unicode to OEMCP */ + p = uni2oem; + hi = sizeof(uni2oem) / 4 - 1; + } + li = 0; + for (n = 16; n; n--) { + i = li + (hi - li) / 2; + if (src == p[i * 2]) break; + if (src > p[i * 2]) + li = i; + else + hi = i; + } + c = n ? p[i * 2 + 1] : 0; + } + + return c; +} +#else +#error This file is not needed in current configuration. + +#endif diff --git a/bertos/fs/fatfs/option/ccsbcs.c b/bertos/fs/fatfs/option/ccsbcs.c new file mode 100644 index 0000000..0d544b6 --- /dev/null +++ b/bertos/fs/fatfs/option/ccsbcs.c @@ -0,0 +1,528 @@ +/*------------------------------------------------------------------------*/ +/* Unicode - Local code bidirectional converter (C)ChaN, 2009 */ +/* (SBCS code pages) */ +/*------------------------------------------------------------------------*/ +/* 437 U.S. (OEM) +/ 720 Arabic (OEM) +/ 1256 Arabic (Windows) +/ 737 Greek (OEM) +/ 1253 Greek (Windows) +/ 1250 Central Europe (Windows) +/ 775 Baltic (OEM) +/ 1257 Baltic (Windows) +/ 850 Multilingual Latin 1 (OEM) +/ 852 Latin 2 (OEM) +/ 1252 Latin 1 (Windows) +/ 855 Cyrillic (OEM) +/ 1251 Cyrillic (Windows) +/ 866 Russian (OEM) +/ 857 Turkish (OEM) +/ 1254 Turkish (Windows) +/ 858 Multilingual Latin 1 + Euro (OEM) +/ 862 Hebrew (OEM) +/ 1255 Hebrew (Windows) +/ 874 Thai (OEM, Windows) +/ 1258 Vietnam (OEM, Windows) +*/ + +#include "../ff.h" + + +#if _USE_LFN && _CODE_PAGE == 437 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP437(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x00FF, 0x00D6, 0x00DC, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, + 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 720 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP720(0x80-0xFF) to Unicode conversion table */ + 0x0000, 0x0000, 0x00E9, 0x00E2, 0x0000, 0x00E0, 0x0000, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0000, 0x0000, 0x0000, + 0x0000, 0x0651, 0x0652, 0x00F4, 0x00A4, 0x0640, 0x00FB, 0x00F9, + 0x0621, 0x0622, 0x0623, 0x0624, 0x00A3, 0x0625, 0x0626, 0x0627, + 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, + 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x0636, 0x0637, 0x0638, 0x0639, 0x063A, 0x0641, 0x00B5, 0x0642, + 0x0643, 0x0644, 0x0645, 0x0646, 0x0647, 0x0648, 0x0649, 0x064A, + 0x2261, 0x064B, 0x064C, 0x064D, 0x064E, 0x064F, 0xO650, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 737 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP737(0x80-0xFF) to Unicode conversion table */ + 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, 0x0398, + 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, 0x03A0, + 0x03A1, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, 0x03A8, 0x03A9, + 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, 0x03B8, + 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, 0x03C0, + 0x03C1, 0x03C3, 0x03C2, 0x03C4, 0x03C5, 0x03C6, 0x03C7, 0x03C8, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03C9, 0x03AC, 0x03AD, 0x03AE, 0x03CA, 0x03AF, 0x03CC, 0x03CD, + 0x03CB, 0x03CE, 0x0386, 0x0388, 0x0389, 0x038A, 0x038C, 0x038E, + 0x038F, 0x00B1, 0x2265, 0x2264, 0x03AA, 0x03AB, 0x00F7, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 775 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP775(0x80-0xFF) to Unicode conversion table */ + 0x0106, 0x00FC, 0x00E9, 0x0101, 0x00E4, 0x0123, 0x00E5, 0x0107, + 0x0142, 0x0113, 0x0156, 0x0157, 0x012B, 0x0179, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x014D, 0x00F6, 0x0122, 0x00A2, 0x015A, + 0x015B, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x00A4, + 0x0100, 0x012A, 0x00F3, 0x017B, 0x017C, 0x017A, 0x201D, 0x00A6, + 0x00A9, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x0141, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0104, 0x010C, 0x0118, + 0x0116, 0x2563, 0x2551, 0x2557, 0x255D, 0x012E, 0x0160, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0172, 0x016A, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x017D, + 0x0105, 0x010D, 0x0119, 0x0117, 0x012F, 0x0161, 0x0173, 0x016B, + 0x017E, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x00D3, 0x00DF, 0x014C, 0x0143, 0x00F5, 0x00D5, 0x00B5, 0x0144, + 0x0136, 0x0137, 0x013B, 0x013C, 0x0146, 0x0112, 0x0145, 0x2019, + 0x00AD, 0x00B1, 0x201C, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x201E, + 0x00B0, 0x2219, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 850 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP850(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, + 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x0131, 0x00CD, 0x00CE, + 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, + 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 852 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP852(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x016F, 0x0107, 0x00E7, + 0x0142, 0x00EB, 0x0150, 0x0151, 0x00EE, 0x0179, 0x00C4, 0x0106, + 0x00C9, 0x0139, 0x013A, 0x00F4, 0x00F6, 0x013D, 0x013E, 0x015A, + 0x015B, 0x00D6, 0x00DC, 0x0164, 0x0165, 0x0141, 0x00D7, 0x010D, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x0104, 0x0105, 0x017D, 0x017E, + 0x0118, 0x0119, 0x00AC, 0x017A, 0x010C, 0x015F, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x011A, + 0x015E, 0x2563, 0x2551, 0x2557, 0x255D, 0x017B, 0x017C, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x0102, 0x0103, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x0111, 0x0110, 0x010E, 0x00CB, 0x010F, 0x0147, 0x00CD, 0x00CE, + 0x011B, 0x2518, 0x250C, 0x2588, 0x2584, 0x0162, 0x016E, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x0143, 0x0144, 0x0148, 0x0160, 0x0161, + 0x0154, 0x00DA, 0x0155, 0x0170, 0x00FD, 0x00DD, 0x0163, 0x00B4, + 0x00AD, 0x02DD, 0x02DB, 0x02C7, 0x02D8, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x02D9, 0x0171, 0x0158, 0x0159, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 855 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP855(0x80-0xFF) to Unicode conversion table */ + 0x0452, 0x0402, 0x0453, 0x0403, 0x0451, 0x0401, 0x0454, 0x0404, + 0x0455, 0x0405, 0x0456, 0x0406, 0x0457, 0x0407, 0x0458, 0x0408, + 0x0459, 0x0409, 0x045A, 0x040A, 0x045B, 0x040B, 0x045C, 0x040C, + 0x045E, 0x040E, 0x045F, 0x040F, 0x044E, 0x042E, 0x044A, 0x042A, + 0x0430, 0x0410, 0x0431, 0x0411, 0x0446, 0x0426, 0x0434, 0x0414, + 0x0435, 0x0415, 0x0444, 0x0424, 0x0433, 0x0413, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x0445, 0x0425, 0x0438, + 0x0418, 0x2563, 0x2551, 0x2557, 0x255D, 0x0439, 0x0419, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x043A, 0x041A, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x043B, 0x041B, 0x043C, 0x041C, 0x043D, 0x041D, 0x043E, 0x041E, + 0x043F, 0x2518, 0x250C, 0x2588, 0x2584, 0x041F, 0x044F, 0x2580, + 0x042F, 0x0440, 0x0420, 0x0441, 0x0421, 0x0442, 0x0422, 0x0443, + 0x0423, 0x0436, 0x0416, 0x0432, 0x0412, 0x044C, 0x042C, 0x2116, + 0x00AD, 0x044B, 0x042B, 0x0437, 0x0417, 0x0448, 0x0428, 0x044D, + 0x042D, 0x0449, 0x0429, 0x0447, 0x0427, 0x00A7, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 857 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP857(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x0131, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x0130, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x015E, 0x015F, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x011E, 0x011F, + 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, + 0x00A9, 0x2563, 0x2551, 0x2557, 0x255D, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00BA, 0x00AA, 0x00CA, 0x00CB, 0x00C8, 0x0000, 0x00CD, 0x00CE, + 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00A6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x0000, + 0x00D7, 0x00DA, 0x00DB, 0x00D9, 0x00EC, 0x00FF, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x0000, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 858 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP858(0x80-0xFF) to Unicode conversion table */ + 0x00C7, 0x00FC, 0x00E9, 0x00E2, 0x00E4, 0x00E0, 0x00E5, 0x00E7, + 0x00EA, 0x00EB, 0x00E8, 0x00EF, 0x00EE, 0x00EC, 0x00C4, 0x00C5, + 0x00C9, 0x00E6, 0x00C6, 0x00F4, 0x00F6, 0x00F2, 0x00FB, 0x00F9, + 0x00FF, 0x00D6, 0x00DC, 0x00F8, 0x00A3, 0x00D8, 0x00D7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x00AE, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x00C1, 0x00C2, 0x00C0, + 0x00A9, 0x2563, 0x2551, 0x2557, 0x2550, 0x00A2, 0x00A5, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x00E3, 0x00C3, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x00A4, + 0x00F0, 0x00D0, 0x00CA, 0x00CB, 0x00C8, 0x20AC, 0x00CD, 0x00CE, + 0x00CF, 0x2518, 0x250C, 0x2588, 0x2584, 0x00C6, 0x00CC, 0x2580, + 0x00D3, 0x00DF, 0x00D4, 0x00D2, 0x00F5, 0x00D5, 0x00B5, 0x00FE, + 0x00DE, 0x00DA, 0x00DB, 0x00D9, 0x00FD, 0x00DD, 0x00AF, 0x00B4, + 0x00AD, 0x00B1, 0x2017, 0x00BE, 0x00B6, 0x00A7, 0x00F7, 0x00B8, + 0x00B0, 0x00A8, 0x00B7, 0x00B9, 0x00B3, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 862 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP862(0x80-0xFF) to Unicode conversion table */ + 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, + 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, + 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, + 0x05E8, 0x05E9, 0x05EA, 0x00A2, 0x00A3, 0x00A5, 0x20A7, 0x0192, + 0x00E1, 0x00ED, 0x00F3, 0x00FA, 0x00F1, 0x00D1, 0x00AA, 0x00BA, + 0x00BF, 0x2310, 0x00AC, 0x00BD, 0x00BC, 0x00A1, 0x00AB, 0x00BB, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x03B1, 0x00DF, 0x0393, 0x03C0, 0x03A3, 0x03C3, 0x00B5, 0x03C4, + 0x03A6, 0x0398, 0x03A9, 0x03B4, 0x221E, 0x03C6, 0x03B5, 0x2229, + 0x2261, 0x00B1, 0x2265, 0x2264, 0x2320, 0x2321, 0x00F7, 0x2248, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x207F, 0x00B2, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 866 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP866(0x80-0xFF) to Unicode conversion table */ + 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, + 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, + 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, + 0x0428, 0x0429, 0x042A, 0x042B, 0x042C, 0x042D, 0x042E, 0x042F, + 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, + 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, + 0x2591, 0x2592, 0x2593, 0x2502, 0x2524, 0x2561, 0x2562, 0x2556, + 0x2555, 0x2563, 0x2551, 0x2557, 0x255D, 0x255C, 0x255B, 0x2510, + 0x2514, 0x2534, 0x252C, 0x251C, 0x2500, 0x253C, 0x255E, 0x255F, + 0x255A, 0x2554, 0x2569, 0x2566, 0x2560, 0x2550, 0x256C, 0x2567, + 0x2568, 0x2564, 0x2565, 0x2559, 0x2558, 0x2552, 0x2553, 0x256B, + 0x256A, 0x2518, 0x250C, 0x2588, 0x2584, 0x258C, 0x2590, 0x2580, + 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, + 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F, + 0x0401, 0x0451, 0x0404, 0x0454, 0x0407, 0x0457, 0x040E, 0x045E, + 0x00B0, 0x2219, 0x00B7, 0x221A, 0x2116, 0x00A4, 0x25A0, 0x00A0 +}; + +#elif _CODE_PAGE == 874 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP874(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x0000, 0x0000, 0x0000, 0x2026, 0x0000, 0x0000, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00A0, 0x0E01, 0x0E02, 0x0E03, 0x0E04, 0x0E05, 0x0E06, 0x0E07, + 0x0E08, 0x0E09, 0x0E0A, 0x0E0B, 0x0E0C, 0x0E0D, 0x0E0E, 0x0E0F, + 0x0E10, 0x0E11, 0x0E12, 0x0E13, 0x0E14, 0x0E15, 0x0E16, 0x0E17, + 0x0E18, 0x0E19, 0x0E1A, 0x0E1B, 0x0E1C, 0x0E1D, 0x0E1E, 0x0E1F, + 0x0E20, 0x0E21, 0x0E22, 0x0E23, 0x0E24, 0x0E25, 0x0E26, 0x0E27, + 0x0E28, 0x0E29, 0x0E2A, 0x0E2B, 0x0E2C, 0x0E2D, 0x0E2E, 0x0E2F, + 0x0E30, 0x0E31, 0x0E32, 0x0E33, 0x0E34, 0x0E35, 0x0E36, 0x0E37, + 0x0E38, 0x0E39, 0x0E3A, 0x0000, 0x0000, 0x0000, 0x0000, 0x0E3F, + 0x0E40, 0x0E41, 0x0E42, 0x0E43, 0x0E44, 0x0E45, 0x0E46, 0x0E47, + 0x0E48, 0x0E49, 0x0E4A, 0x0E4B, 0x0E4C, 0x0E4D, 0x0E4E, 0x0E4F, + 0x0E50, 0x0E51, 0x0E52, 0x0E53, 0x0E54, 0x0E55, 0x0E56, 0x0E57, + 0x0E58, 0x0E59, 0x0E5A, 0x0E5B, 0x0000, 0x0000, 0x0000, 0x0000 +}; + +#elif _CODE_PAGE == 1250 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1250(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021, + 0x0000, 0x2030, 0x0160, 0x2039, 0x015A, 0x0164, 0x017D, 0x0179, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2122, 0x0161, 0x203A, 0x015B, 0x0165, 0x017E, 0x017A, + 0x00A0, 0x02C7, 0x02D8, 0x0141, 0x00A4, 0x0104, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x015E, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x017B, + 0x00B0, 0x00B1, 0x02DB, 0x0142, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x0105, 0x015F, 0x00BB, 0x013D, 0x02DD, 0x013E, 0x017C, + 0x0154, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x0139, 0x0106, 0x00C7, + 0x010C, 0x00C9, 0x0118, 0x00CB, 0x011A, 0x00CD, 0x00CE, 0x010E, + 0x0110, 0x0143, 0x0147, 0x00D3, 0x00D4, 0x0150, 0x00D6, 0x00D7, + 0x0158, 0x016E, 0x00DA, 0x0170, 0x00DC, 0x00DD, 0x0162, 0x00DF, + 0x0155, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x013A, 0x0107, 0x00E7, + 0x010D, 0x00E9, 0x0119, 0x00EB, 0x011B, 0x00ED, 0x00EE, 0x010F, + 0x0111, 0x0144, 0x0148, 0x00F3, 0x00F4, 0x0151, 0x00F6, 0x00F7, + 0x0159, 0x016F, 0x00FA, 0x0171, 0x00FC, 0x00FD, 0x0163, 0x02D9 +}; + +#elif _CODE_PAGE == 1251 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1251(0x80-0xFF) to Unicode conversion table */ + 0x0402, 0x0403, 0x201A, 0x0453, 0x201E, 0x2026, 0x2020, 0x2021, + 0x20AC, 0x2030, 0x0409, 0x2039, 0x040A, 0x040C, 0x040B, 0x040F, + 0x0452, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2111, 0x0459, 0x203A, 0x045A, 0x045C, 0x045B, 0x045F, + 0x00A0, 0x040E, 0x045E, 0x0408, 0x00A4, 0x0490, 0x00A6, 0x00A7, + 0x0401, 0x00A9, 0x0404, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x0407, + 0x00B0, 0x00B1, 0x0406, 0x0456, 0x0491, 0x00B5, 0x00B6, 0x00B7, + 0x0451, 0x2116, 0x0454, 0x00BB, 0x0458, 0x0405, 0x0455, 0x0457, + 0x0410, 0x0411, 0x0412, 0x0413, 0x0414, 0x0415, 0x0416, 0x0417, + 0x0418, 0x0419, 0x041A, 0x041B, 0x041C, 0x041D, 0x041E, 0x041F, + 0x0420, 0x0421, 0x0422, 0x0423, 0x0424, 0x0425, 0x0426, 0x0427, + 0x0428, 0x0429, 0x042A, 0x042D, 0x042C, 0x042D, 0x042E, 0x042F, + 0x0430, 0x0431, 0x0432, 0x0433, 0x0434, 0x0435, 0x0436, 0x0437, + 0x0438, 0x0439, 0x043A, 0x043B, 0x043C, 0x043D, 0x043E, 0x043F, + 0x0440, 0x0441, 0x0442, 0x0443, 0x0444, 0x0445, 0x0446, 0x0447, + 0x0448, 0x0449, 0x044A, 0x044B, 0x044C, 0x044D, 0x044E, 0x044F +}; + +#elif _CODE_PAGE == 1252 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1252(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x017D, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x017E, 0x0178, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7, + 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF, + 0x00D0, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7, + 0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x00DD, 0x00DE, 0x00DF, + 0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF, + 0x00F0, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7, + 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x00FD, 0x00FE, 0x00FF +}; + +#elif _CODE_PAGE == 1253 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1253(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x0000, 0x2030, 0x0000, 0x2039, 0x000C, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00A0, 0x0385, 0x0386, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x0000, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x2015, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x0384, 0x00B5, 0x00B6, 0x00B7, + 0x0388, 0x0389, 0x038A, 0x00BB, 0x038C, 0x00BD, 0x038E, 0x038F, + 0x0390, 0x0391, 0x0392, 0x0393, 0x0394, 0x0395, 0x0396, 0x0397, + 0x0398, 0x0399, 0x039A, 0x039B, 0x039C, 0x039D, 0x039E, 0x039F, + 0x03A0, 0x03A1, 0x0000, 0x03A3, 0x03A4, 0x03A5, 0x03A6, 0x03A7, + 0x03A8, 0x03A9, 0x03AA, 0x03AD, 0x03AC, 0x03AD, 0x03AE, 0x03AF, + 0x03B0, 0x03B1, 0x03B2, 0x03B3, 0x03B4, 0x03B5, 0x03B6, 0x03B7, + 0x03B8, 0x03B9, 0x03BA, 0x03BB, 0x03BC, 0x03BD, 0x03BE, 0x03BF, + 0x03C0, 0x03C1, 0x03C2, 0x03C3, 0x03C4, 0x03C5, 0x03C6, 0x03C7, + 0x03C8, 0x03C9, 0x03CA, 0x03CB, 0x03CC, 0x03CD, 0x03CE, 0x0000 +}; + +#elif _CODE_PAGE == 1254 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1254(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x210A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0160, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0161, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x00C0, 0x00C1, 0x00C2, 0x00C3, 0x00C4, 0x00C5, 0x00C6, 0x00C7, + 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x00CC, 0x00CD, 0x00CE, 0x00CF, + 0x011E, 0x00D1, 0x00D2, 0x00D3, 0x00D4, 0x00D5, 0x00D6, 0x00D7, + 0x00D8, 0x00D9, 0x00DA, 0x00BD, 0x00DC, 0x0130, 0x015E, 0x00DF, + 0x00E0, 0x00E1, 0x00E2, 0x00E3, 0x00E4, 0x00E5, 0x00E6, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x00EC, 0x00ED, 0x00EE, 0x00EF, + 0x011F, 0x00F1, 0x00F2, 0x00F3, 0x00F4, 0x00F5, 0x00F6, 0x00F7, + 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x0131, 0x015F, 0x00FF +}; + +#elif _CODE_PAGE == 1255 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1255(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0000, 0x2039, 0x0000, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0000, 0x203A, 0x0000, 0x0000, 0x0000, 0x0000, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00D7, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00F7, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x05B0, 0x05B1, 0x05B2, 0x05B3, 0x05B4, 0x05B5, 0x05B6, 0x05B7, + 0x05B8, 0x05B9, 0x0000, 0x05BB, 0x05BC, 0x05BD, 0x05BE, 0x05BF, + 0x05C0, 0x05C1, 0x05C2, 0x05C3, 0x05F0, 0x05F1, 0x05F2, 0x05F3, + 0x05F4, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, + 0x05D0, 0x05D1, 0x05D2, 0x05D3, 0x05D4, 0x05D5, 0x05D6, 0x05D7, + 0x05D8, 0x05D9, 0x05DA, 0x05DB, 0x05DC, 0x05DD, 0x05DE, 0x05DF, + 0x05E0, 0x05E1, 0x05E2, 0x05E3, 0x05E4, 0x05E5, 0x05E6, 0x05E7, + 0x05E8, 0x05E9, 0x05EA, 0x0000, 0x0000, 0x200E, 0x200F, 0x0000 +}; + +#elif _CODE_PAGE == 1256 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1256(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x067E, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0679, 0x2039, 0x0152, 0x0686, 0x0698, 0x0688, + 0x06AF, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x06A9, 0x2122, 0x0691, 0x203A, 0x0153, 0x200C, 0x200D, 0x06BA, + 0x00A0, 0x060C, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x06BE, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x061B, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x061F, + 0x06C1, 0x0621, 0x0622, 0x0623, 0x0624, 0x0625, 0x0626, 0x0627, + 0x0628, 0x0629, 0x062A, 0x062B, 0x062C, 0x062D, 0x062E, 0x062F, + 0x0630, 0x0631, 0x0632, 0x0633, 0x0634, 0x0635, 0x0636, 0x00D7, + 0x0637, 0x0638, 0x0639, 0x063A, 0x0640, 0x0640, 0x0642, 0x0643, + 0x00E0, 0x0644, 0x00E2, 0x0645, 0x0646, 0x0647, 0x0648, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0649, 0x064A, 0x00EE, 0x00EF, + 0x064B, 0x064C, 0x064D, 0x064E, 0x00F4, 0x064F, 0x0650, 0x00F7, + 0x0651, 0x00F9, 0x0652, 0x00FB, 0x00FC, 0x200E, 0x200F, 0x06D2 +} + +#elif _CODE_PAGE == 1257 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1257(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0000, 0x201E, 0x2026, 0x2020, 0x2021, + 0x0000, 0x2030, 0x0000, 0x2039, 0x0000, 0x00A8, 0x02C7, 0x00B8, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x0000, 0x2122, 0x0000, 0x203A, 0x0000, 0x00AF, 0x02DB, 0x0000, + 0x00A0, 0x0000, 0x00A2, 0x00A3, 0x00A4, 0x0000, 0x00A6, 0x00A7, + 0x00D8, 0x00A9, 0x0156, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x0157, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00E6, + 0x0104, 0x012E, 0x0100, 0x0106, 0x00C4, 0x00C5, 0x0118, 0x0112, + 0x010C, 0x00C9, 0x0179, 0x0116, 0x0122, 0x0136, 0x012A, 0x013B, + 0x0160, 0x0143, 0x0145, 0x00D3, 0x014C, 0x00D5, 0x00D6, 0x00D7, + 0x0172, 0x0141, 0x015A, 0x016A, 0x00DC, 0x017B, 0x017D, 0x00DF, + 0x0105, 0x012F, 0x0101, 0x0107, 0x00E4, 0x00E5, 0x0119, 0x0113, + 0x010D, 0x00E9, 0x017A, 0x0117, 0x0123, 0x0137, 0x012B, 0x013C, + 0x0161, 0x0144, 0x0146, 0x00F3, 0x014D, 0x00F5, 0x00F6, 0x00F7, + 0x0173, 0x014E, 0x015B, 0x016B, 0x00FC, 0x017C, 0x017E, 0x02D9 +}; + +#elif _CODE_PAGE == 1258 +#define _TBLDEF 1 +static +const WCHAR Tbl[] = { /* CP1258(0x80-0xFF) to Unicode conversion table */ + 0x20AC, 0x0000, 0x201A, 0x0192, 0x201E, 0x2026, 0x2020, 0x2021, + 0x02C6, 0x2030, 0x0000, 0x2039, 0x0152, 0x0000, 0x0000, 0x0000, + 0x0000, 0x2018, 0x2019, 0x201C, 0x201D, 0x2022, 0x2013, 0x2014, + 0x02DC, 0x2122, 0x0000, 0x203A, 0x0153, 0x0000, 0x0000, 0x0178, + 0x00A0, 0x00A1, 0x00A2, 0x00A3, 0x00A4, 0x00A5, 0x00A6, 0x00A7, + 0x00A8, 0x00A9, 0x00AA, 0x00AB, 0x00AC, 0x00AD, 0x00AE, 0x00AF, + 0x00B0, 0x00B1, 0x00B2, 0x00B3, 0x00B4, 0x00B5, 0x00B6, 0x00B7, + 0x00B8, 0x00B9, 0x00BA, 0x00BB, 0x00BC, 0x00BD, 0x00BE, 0x00BF, + 0x00C0, 0x00C1, 0x00C2, 0x0102, 0x00C4, 0x00C5, 0x00C6, 0x00C7, + 0x00C8, 0x00C9, 0x00CA, 0x00CB, 0x0300, 0x00CD, 0x00CE, 0x00CF, + 0x0110, 0x00D1, 0x0309, 0x00D3, 0x00D4, 0x01A0, 0x00D6, 0x00D7, + 0x00D8, 0x00D9, 0x00DA, 0x00DB, 0x00DC, 0x01AF, 0x0303, 0x00DF, + 0x00E0, 0x00E1, 0x00E2, 0x0103, 0x00E4, 0x00E5, 0x00E6, 0x00E7, + 0x00E8, 0x00E9, 0x00EA, 0x00EB, 0x0301, 0x00ED, 0x00EE, 0x00EF, + 0x0111, 0x00F1, 0x0323, 0x00F3, 0x00F4, 0x01A1, 0x00F6, 0x00F7, + 0x00F8, 0x00F9, 0x00FA, 0x00FB, 0x00FC, 0x01B0, 0x20AB, 0x00FF +}; + +#endif + + +#if _TBLDEF + +WCHAR ff_convert ( /* Converted code, 0 means conversion error */ + WCHAR src, /* Character code to be converted */ + UINT dir /* 0: Unicode to OEMCP, 1: OEMCP to Unicode */ +) +{ + const WCHAR *p; + WCHAR c; + + + if (src < 0x80) { /* ASCII */ + c = src; + + } else { + if (dir) { /* OEMCP to Unicode */ + c = (src >= 0x100) ? 0 : Tbl[src - 0x80]; + + } else { /* Unicode to OEMCP */ + for (c = 0; c < 0x80; c++) { + if (src == Tbl[c]) break; + } + c = (c + 0x80) & 0xFF; + } + } + + return c; +} + +#else +#error This file is not needed in current configuration + +#endif diff --git a/bertos/fs/fatfs/option/syncobj.c b/bertos/fs/fatfs/option/syncobj.c new file mode 100644 index 0000000..d507592 --- /dev/null +++ b/bertos/fs/fatfs/option/syncobj.c @@ -0,0 +1,115 @@ +/*------------------------------------------------------------------------*/ +/* Sample code of OS dependent synchronization object controls */ +/* for FatFs R0.07a (C)ChaN, 2009 */ +/*------------------------------------------------------------------------*/ + +#include // Win32 +//#include // uC/OS-II + +#include "../ff.h" + +#if _FS_REENTRANT + +/*------------------------------------------------------------------------*/ +/* Create a Synchronization Object for a Volume +/*------------------------------------------------------------------------*/ +/* This function is called in f_mount function to create a new +/ synchronization object, such as semaphore and mutex. When a FALSE is +/ returned, the f_mount function fails with FR_INT_ERR. +*/ + +BOOL ff_cre_syncobj ( /* TRUE:Function succeeded, FALSE:Could not create due to any error */ + BYTE vol, /* Corresponding logical drive being processed */ + _SYNC_t *sobj /* Pointer to return the created sync object */ +) +{ + BOOL ret; + + *sobj = CreateMutex(NULL, FALSE, NULL); // Win32 + ret = (*sobj != INVALID_HANDLE_VALUE) ? TRUE : FALSE; // + +// *sobj = VolumeSemId[vol]; // uITRON (give a static created sync object) +// ret = TRUE; // The initial value of the semaphore must be 1. + +// *sobj = OSMutexCreate(0, &err); // uC/OS-II +// ret = (err == OS_NO_ERR) ? TRUE : FALSE; // + + return ret; +} + + + +/*------------------------------------------------------------------------*/ +/* Delete a Synchronization Object */ +/*------------------------------------------------------------------------*/ +/* This function is called in f_mount function to delete a synchronization +/ object that created with ff_cre_syncobj function. When a FALSE is +/ returned, the f_mount function fails with FR_INT_ERR. +*/ + +BOOL ff_del_syncobj ( /* TRUE:Function succeeded, FALSE:Could not delete due to any error */ + _SYNC_t sobj /* Sync object tied to the logical drive to be deleted */ +) +{ + BOOL ret; + + ret = CloseHandle(sobj); // Win32 + +// ret = TRUE; // uITRON (nothing to do) + +// OSMutexDel(sobj, OS_DEL_ALWAYS, &err); // uC/OS-II +// ret = (err == OS_NO_ERR) ? TRUE : FALSE; // + + return ret; +} + + + +/*------------------------------------------------------------------------*/ +/* Request Grant to Access the Volume */ +/*------------------------------------------------------------------------*/ +/* This function is called on entering file functions to lock the volume. +/ When a FALSE is returned, the file function fails with FR_TIMEOUT. +*/ + +BOOL ff_req_grant ( /* TRUE:Got a grant to access the volume, FALSE:Could not get a grant */ + _SYNC_t sobj /* Sync object to wait */ +) +{ + BOOL ret; + + ret = (WaitForSingleObject(sobj, _TIMEOUT) == WAIT_OBJECT_0) ? TRUE : FALSE; // Win32 + +// ret = (wai_sem(sobj) == E_OK) ? TRUE : FALSE; // uITRON + +// OSMutexPend(sobj, _TIMEOUT, &err)); // uC/OS-II +// ret = (err == OS_NO_ERR) ? TRUE : FALSE; // + + return ret; +} + + + +/*------------------------------------------------------------------------*/ +/* Release Grant to Access the Volume */ +/*------------------------------------------------------------------------*/ +/* This function is called on leaving file functions to unlock the volume. +*/ + +void ff_rel_grant ( + _SYNC_t sobj /* Sync object to be signaled */ +) +{ + ReleaseMutex(sobj); // Win32 + +// sig_sem(sobj); // uITRON + +// OSMutexPost(sobj); // uC/OS-II +} + + +#else + +#error This file is not needed in this configuration. + +#endif diff --git a/bertos/gfx/bitmap.c b/bertos/gfx/bitmap.c new file mode 100644 index 0000000..c94306a --- /dev/null +++ b/bertos/gfx/bitmap.c @@ -0,0 +1,267 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Bitmap manipulation routines. + * \sa gfx.h + */ + +#include "gfx.h" +#include "gfx_p.h" + +#include "cfg/cfg_gfx.h" /* CONFIG_GFX_CLIPPING */ +#include /* MIN() */ +#include /* ASSERT() */ + +#include /* CPU_HARVARD */ + +#include /* memset() */ + +#if CONFIG_GFX_TEXT +#include /* default_font */ +#endif + + +/** + * Initialize a Bitmap structure with the provided parameters. + * + * \note The pen position is reset to the origin. + */ +void gfx_bitmapInit(Bitmap *bm, uint8_t *raster, coord_t w, coord_t h) +{ + bm->raster = raster; + bm->width = w; + bm->height = h; + #if (CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_H_MSB) + bm->stride = (w + 7) / 8; + #elif CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_V_LSB + bm->stride = w; + #else + #error Unknown value of CONFIG_BITMAP_FMT + #endif /* CONFIG_BITMAP_FMT */ + bm->penX = 0; + bm->penY = 0; + +#if CONFIG_GFX_TEXT + gfx_setFont(bm, &default_font); + bm->styles = 0; +#endif + +#if CONFIG_GFX_CLIPPING + bm->cr.xmin = 0; + bm->cr.ymin = 0; + bm->cr.xmax = w; + bm->cr.ymax = h; +#endif /* CONFIG_GFX_CLIPPING */ +} + + +/** + * Clear the whole bitmap surface to the background color. + * + * \note This function does \b not update the current pen position. + * \note This function bypasses the current clipping area. + */ +void gfx_bitmapClear(Bitmap *bm) +{ + memset(bm->raster, 0, RAST_SIZE(bm->width, bm->height)); +} + + +#if CPU_HARVARD + +#include /* FIXME: memcpy_P() */ + +/** + * Copy a raster picture located in program memory in the bitmap. + * The size of the raster to copy *must* be the same of the raster bitmap. + * + * \note This function does \b not update the current pen position + */ +void gfx_blit_P(Bitmap *bm, const pgm_uint8_t *raster) +{ + memcpy_P(bm->raster, raster, RAST_SIZE(bm->width, bm->height)); +} +#endif /* CPU_HARVARD */ + +#if CONFIG_GFX_CLIPPING + /** + * Clip destination coordinates inside a clipping range. + * + * This macro helps a drawing operation to adjust its + * destination X and Y coordinates inside the destination + * clipping range. + * + * The source start coordinate is adjusted as well + * when destination start clipping occurs. + */ + #define gfx_clip(dmin, dmax, smin, cmin, cmax) \ + do { \ + if ((dmin) < (cmin)) \ + { \ + (smin) += (cmin) - (dmin); \ + (dmin) = (cmin); \ + } \ + (dmax) = MIN((dmax), (cmax)); \ + } while(0) + +#else /* !CONFIG_GFX_CLIPPING */ + + #define gfx_clip(dmin, dmax, smin, cmin, cmax) do { } while (0) + +#endif /* !CONFIG_GFX_CLIPPING */ + + +/** + * Copy a rectangular area of a bitmap on another bitmap. + * + * Blitting is a common copy operation involving two bitmaps. + * A rectangular area of the source bitmap is copied bit-wise + * to a different position in the destination bitmap. + * + * \note Using the same bitmap for \a src and \a dst is unsupported. + * + * \param dst Bitmap where the operation writes. + * \param rect The (xmin;ymin) coordinates provide the top/left offset + * for drawing in the destination bitmap. If the source + * bitmap is larger than the rectangle, drawing is clipped. + * \param src Bitmap containing the source pixels. + * \param srcx Starting X offset in the source bitmap. + * \param srcy Starting Y offset in the source bitmap. + */ +void gfx_blit(Bitmap *dst, const Rect *rect, const Bitmap *src, coord_t srcx, coord_t srcy) +{ + coord_t dxmin, dymin, dxmax, dymax; + coord_t dx, dy, sx, sy; + + /* + * Pre-clip coordinates inside src->width/height. + */ + dxmin = rect->xmin; + dymin = rect->ymin; + dxmax = MIN(rect->xmax, rect->xmin + src->width); + dymax = MIN(rect->ymax, rect->ymin + src->height); + + /* Perform regular clipping */ + gfx_clip(dxmin, dxmax, srcx, dst->cr.xmin, dst->cr.xmax); + gfx_clip(dymin, dymax, srcy, dst->cr.ymin, dst->cr.ymax); + + //kprintf("dxmin=%d, sxmin=%d, dxmax=%d; ", dxmin, sxmin, dxmax); + //kprintf("dymin=%d, symin=%d, dymax=%d\n", dymin, symin, dymax); + + /* TODO: make it not as dog slow as this */ + for (dx = dxmin, sx = srcx; dx < dxmax; ++dx, ++sx) + for (dy = dymin, sy = srcy; dy < dymax; ++dy, ++sy) + BM_DRAWPIXEL(dst, dx, dy, BM_READPIXEL(src, sx, sy)); +} + +/** + * Blit a raster to a Bitmap. + * + * \todo Merge this function into gfx_blit() + * + * \see gfx_blit() + */ +void gfx_blitRaster(Bitmap *dst, coord_t dxmin, coord_t dymin, + const uint8_t *raster, coord_t w, coord_t h, coord_t stride) +{ + coord_t dxmax = dxmin + w, dymax = dymin + h; + coord_t sxmin = 0, symin = 0; + coord_t dx, dy, sx, sy; + + /* Perform regular clipping */ + gfx_clip(dxmin, dxmax, sxmin, dst->cr.xmin, dst->cr.xmax); + gfx_clip(dymin, dymax, symin, dst->cr.ymin, dst->cr.ymax); + + //kprintf("dxmin=%d, sxmin=%d, dxmax=%d; ", dxmin, sxmin, dxmax); + //kprintf("dymin=%d, symin=%d, dymax=%d\n", dymin, symin, dymax); + + /* TODO: make it not as dog slow as this */ + for (dx = dxmin, sx = sxmin; dx < dxmax; ++dx, ++sx) + for (dy = dymin, sy = symin; dy < dymax; ++dy, ++sy) + BM_DRAWPIXEL(dst, dx, dy, RAST_READPIXEL(raster, sx, sy, stride)); +} + +/** + * Blit an Image to a Bitmap. + * + * \see gfx_blit() + */ +void gfx_blitImage(Bitmap *dst, coord_t dxmin, coord_t dymin, const Image *image) +{ + ASSERT(image); + + gfx_blitRaster(dst, dxmin, dymin, + image->raster, image->width, image->height, image->stride); +} + + +#if CONFIG_GFX_CLIPPING || CONFIG_GFX_VCOORDS + +/** + * Set the bitmap clipping rectangle to the specified coordinates. + * + * All drawing performed on the bitmap will be clipped inside this + * rectangle. + * + * The clipping rectangle is also used as a bounding box for the + * logical view of the virtual coordinate system. + * + * \note Following the convention used for all other operations, the + * top-left pixels of the rectangle are included, while the + * bottom-right pixels are considered outside the clipping region. + * + * \see gfx_setViewRect + */ +void gfx_setClipRect(Bitmap *bm, coord_t minx, coord_t miny, coord_t maxx, coord_t maxy) +{ + ASSERT(minx < maxx); + ASSERT(miny < maxy); + ASSERT(miny >= 0); + ASSERT(minx >= 0); + ASSERT(maxx <= bm->width); + ASSERT(maxy <= bm->height); + + bm->cr.xmin = minx; + bm->cr.ymin = miny; + bm->cr.xmax = maxx; + bm->cr.ymax = maxy; + +// kprintf("cr.xmin = %d, cr.ymin = %d, cr.xmax = %d, cr.ymax = %d\n", +// bm->cr.xMin, bm->cr.ymin, bm->cr.xmax, bm->cr.ymax); +} + +#endif /* CONFIG_GFX_CLIPPING */ + diff --git a/bertos/gfx/charts.c b/bertos/gfx/charts.c new file mode 100644 index 0000000..f798741 --- /dev/null +++ b/bertos/gfx/charts.c @@ -0,0 +1,152 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * + * \brief Simple charts on top of mware/gfx routines (implementation). + * + */ + +#include "charts.h" +#include + + +#ifndef CONFIG_CHART_ARROWS +#define CONFIG_CHART_ARROWS 0 +#endif + + +void chart_init(Bitmap *bm, coord_t xmin, coord_t ymin, coord_t xmax, coord_t ymax) +{ + /* Clear the chart area */ + gfx_rectClear(bm, xmin, ymin, xmax, ymax); + + gfx_setClipRect(bm, xmin + CHART_BORDERLEFT, ymin + CHART_BORDERTOP, + xmax - CHART_BORDERRIGHT, ymax - CHART_BORDERBOTTOM); + + chart_drawAxis(bm); +} + + +void chart_setScale(Bitmap *bm, chart_x_t xmin, chart_y_t ymin, chart_x_t xmax, chart_y_t ymax) +{ + gfx_setViewRect(bm, xmin, ymin, xmax, ymax); +} + + +/** + * Draw the chart axes + */ +void chart_drawAxis(Bitmap *bm) +{ +#if CONFIG_CHART_ARROWS + + /* Draw axis */ + gfx_moveTo(bm, bm->cr.xmin, bm->cr.ymin + 4); + gfx_lineTo(bm, bm->cr.xmin, bm->cr.ymax - 1); + gfx_lineTo(bm, bm->cr.xmax - 4 - 1, bm->cr.ymax - 1); + + /* Draw up arrow */ + gfx_moveTo(bm, bm->cr.xmin - 2, bm->cr.ymin + 3); + gfx_lineTo(bm, bm->cr.xmin + 2, bm->cr.ymin + 3); + gfx_lineTo(bm, bm->cr.xmin, bm->cr.ymin); + gfx_lineTo(bm, bm->cr.xmin - 2, bm->cr.ymin + 3); + + /* Draw right arrow */ + gfx_moveTo(bm, bm->cr.xmax - 4, bm->cr.ymax - 3); + gfx_lineTo(bm, bm->cr.xmax - 4, bm->cr.ymax + 1); + gfx_lineTo(bm, bm->cr.xmax - 1, bm->cr.ymax - 1); + gfx_lineTo(bm, bm->cr.xmax - 4, bm->cr.ymax - 3); + +#else /* CONFIG_CHART_ARROWS */ + + /* Draw a box around the chart */ + gfx_rectDraw(bm, bm->cr.xmin, bm->cr.ymin, bm->cr.xmax, bm->cr.ymax); + +#endif /* CONFIG_CHART_ARROWS */ + + //CHECK_WALL(wall_before_raster, WALL_SIZE); + //CHECK_WALL(wall_after_raster, WALL_SIZE); +} + + +/** + * Draw a set of \a curve_cnt connected segments, whose Y coordinates + * are identified by the \a curve_y array and X-coordinates are + * are evenly spaced by one virtual unit. + */ +void chart_drawCurve(Bitmap *bm, const chart_y_t *curve_y, int curve_cnt) +{ + int i; + + gfx_moveTo(bm, gfx_transformX(bm, 0), gfx_transformY(bm, curve_y[0])); + + for (i = 1; i < curve_cnt; i++) + gfx_lineTo(bm, gfx_transformX(bm, i), gfx_transformY(bm, curve_y[i])); + + //CHECK_WALL(wall_before_raster, WALL_SIZE); + //CHECK_WALL(wall_after_raster, WALL_SIZE); +} + + +/** + * Disegna dei dot in corrispondenza delle coppie (dotsx[i];dotsy[i]) + * Se dotsx e' NULL, i punti vengono disegnati ad intervalli regolari. + */ +void chart_drawDots(Bitmap *bm, const chart_x_t *dots_x, const chart_y_t *dots_y, int cnt) +{ + int i; + coord_t x, y; + + for (i = 0; i < cnt; i++) + { + if (dots_x) + x = gfx_transformX(bm, dots_x[i]); + else + x = gfx_transformX(bm, i); + + y = gfx_transformY(bm, dots_y[i]); + + /* Draw tick over the curve */ + gfx_rectFill(bm, + x - TICKS_WIDTH / 2, y - TICKS_HEIGHT / 2, + x + (TICKS_WIDTH + 1) / 2, y + (TICKS_HEIGHT + 1) / 2); + + /* Draw vertical line from the curve to the X-axis */ + //gfx_drawLine(bm, x, y, x, bm->cr.ymax - 1); + } + + //CHECK_WALL(wall_before_raster, WALL_SIZE); + //CHECK_WALL(wall_after_raster, WALL_SIZE); +} + diff --git a/bertos/gfx/charts.h b/bertos/gfx/charts.h new file mode 100644 index 0000000..e98f8cb --- /dev/null +++ b/bertos/gfx/charts.h @@ -0,0 +1,102 @@ +/** + * \file + * + * + * \defgroup chart Chart graphical routines + * \ingroup graphics + * \{ + * \brief Simple charts on top of mware/gfx routines (interface). + * + * Configuration: + * - \c CONFIG_CHART_TYPE_X: type for the input dataset of X-coordinates + * - \c CONFIG_CHART_TYPE_Y: type for the input dataset of Y-coordinates + * + * Sample usage: + * + * \code + * bm = chart_init(0, ymax, N_POINTS_CURVE, ymin); + * + * chart_drawCurve(bm, curve_y, curve_points + 1); + * gfx_setViewRect(bm, xmin, ymax, xmax, ymin); + * chart_drawDots(bm, samples_x, samples_y, samples_cnt); + * + * print_bitmap(bm); + * \endcode + * \author Bernie Innocenti + */ + +#ifndef GFX_CHARTS_H +#define GFX_CHARTS_H + +#include "cfg/cfg_gfx.h" /* CONFIG_ stuff */ + +#include /* vcoord_t */ + +/** + * \name Width/height of the small ticks drawn over the axes + * \{ + */ +#define TICKS_HEIGHT 2 +#define TICKS_WIDTH 2 +/*\}*/ + +/** + * \name Chart frame dimensions + * \{ + */ +#define CHART_BORDERTOP 0 +#define CHART_BORDERBOTTOM 0 +#define CHART_BORDERLEFT 0 +#define CHART_BORDERRIGHT 0 +/*\}*/ + +#ifndef CONFIG_CHART_TYPE_X +#define CONFIG_CHART_TYPE_X vcoord_t +#endif +#ifndef CONFIG_CHART_TYPE_Y +#define CONFIG_CHART_TYPE_Y vcoord_t +#endif + + +typedef CONFIG_CHART_TYPE_X chart_x_t; +typedef CONFIG_CHART_TYPE_Y chart_y_t; + + +/* Public function protos */ +void chart_init(Bitmap *bm, coord_t xmin, coord_t ymin, coord_t xmax, coord_t ymax); +void chart_setScale(Bitmap *bm, chart_x_t xmin, chart_y_t ymin, chart_x_t xmax, chart_y_t ymax); +void chart_drawAxis(Bitmap *bm); +void chart_drawCurve(Bitmap *bm, const chart_y_t *curve_y, int curve_cnt); +void chart_drawDots(Bitmap *bm, const chart_x_t *dots_x, const chart_y_t *dots_y, int cnt); + +/** \} */ //defgroup charts +#endif /* GFX_CHARTS_H */ diff --git a/bertos/gfx/fillpoly.cpp b/bertos/gfx/fillpoly.cpp new file mode 100644 index 0000000..cd44963 --- /dev/null +++ b/bertos/gfx/fillpoly.cpp @@ -0,0 +1,404 @@ +/** + * \file + * + * + * \author Massimiliano Corsini + * + * + * \brief Low-level drawing routines. + * + * This file contains the implementation of the low-level drawing routines + * to draw fill rectangle, fill triangle and so on. + * + */ + +/*#* + *#* $Log$ + *#* Revision 1.1 2006/07/19 13:00:01 bernie + *#* Import into DevLib. + *#* + *#* Revision 1.10 2005/10/15 15:03:43 rasky + *#* Remove per-pixel clipping from line(). + *#* Use clipLine() also for a-scope. + *#* + *#* Revision 1.9 2005/10/14 15:21:32 eldes + *#* Implement the cohen-sutherland clipping on the buffer + *#* + *#* Revision 1.8 2005/09/27 13:28:10 rasky + *#* Add clipping capabilities to line() + *#* Fix off-by-one computation of rectangles of drawing. + *#* + *#* Revision 1.7 2005/09/27 10:41:35 rasky + *#* Import line-drawing routine from Devlib + *#* + *#* Revision 1.6 2005/09/19 16:36:05 chad + *#* Fix doxygen autobrief + *#* + *#* Revision 1.5 2005/07/06 12:51:47 chad + *#* Make the fillRectangle() independent of the order of the points of the rectangle + *#* + *#* Revision 1.4 2005/06/17 15:06:36 chad + *#* Remove conversion warning + *#* + *#* Revision 1.3 2005/06/17 15:04:47 chad + *#* Add line clipping capability + *#* + *#* Revision 1.2 2005/06/15 14:04:43 chad + *#* Add line routine + *#* + *#* Revision 1.1 2005/06/15 13:34:34 chad + *#* Low-level drawing routines + *#* + *#*/ + +// Qt-specific headers +#include + + +/** + * Low-level routine to draw a line. + * + * This routine is based on the Bresenham Line-Drawing Algorithm. + * + * The \a stride represents the width of the image buffer. + * (\a x1, \a y1) are the coordinates of the starting point. + * (\a x2, \a y2) are the coordinates of the ending point. + * + * The line has no anti-alias, and clipping is not performed. The line + * must be fully contained in the buffer (use clipLine() if you need + * to clip it). + */ +void line(unsigned char *buf, + unsigned long bufw, unsigned long bufh, unsigned long stride, + int x1, int y1, int x2, int y2, unsigned char color) +{ + int x, y, e, len, adx, ady, signx, signy; + + if (x2 > x1) + { + /* left to right */ + signx = +1; + adx = x2 - x1; + } + else + { + /* right to left */ + signx = -1; + adx = x1 - x2; + } + + if (y2 > y1) + { + /* top to bottom */ + signy = +1; + ady = y2 - y1; + } + else + { + /* bottom to top */ + signy = -1; + ady = y1 - y2; + } + + x = x1; + y = y1; + + if (adx > ady) + { + /* X-major line (octants 1/4/5/8) */ + len = adx; + e = -adx; + while (len--) + { + /* Sanity check */ + assert(y >= 0 && y < static_cast(bufh) && + x >= 0 && x < static_cast(bufw)); + buf[y * stride + x] = color; + x += signx; + e += ady; + if (e >= 0) + { + y += signy; + e -= adx; + } + } + } + else + { + /* Y-major line (octants 2/3/6/7) */ + len = ady; + e = -ady; + while (len--) + { + /* Sanity check */ + assert(y >= 0 && y < static_cast(bufh) && + x >= 0 && x < static_cast(bufw)); + buf[y * stride + x] = color; + y += signy; + e += adx; + if (e >= 0) + { + x += signx; + e -= ady; + } + } + } +} + +/// Helper routine for clipLine(). +static int region(int x, int y, int w, int h) +{ + int code = 0; + + if (y >= h) + code |= 1; // top + else if (y < 0) + code |= 2; // bottom + + if (x >= w) + code |= 4; // right + else if (x < 0) + code |= 8; // left + + return code; +} + +/** + * Low-level routine to draw a line, clipped to the buffer extents. + * + * This routine executes the clipping, and then invokes line(). + * Parameters are the same of line(). The clipping is performed + * using the Cohen-Sutherland algorithm, which is very fast. + */ +void clipLine(unsigned char *buf, + unsigned long w, unsigned long h, unsigned long stride, + int x1, int y1, int x2, int y2, unsigned char color) +{ + int code1 = region(x1, y1, w, h); + int code2 = region(x2, y2, w, h); + + // Loop while there is at least one point outside + while (code1 | code2) + { + // Check for line totally outside + if (code1 & code2) + return; + + int c = code1 ? code1 : code2; + int x, y; + + if (c & 1) // top + { + x = x1 + (x2 - x1) * (h - y1) / (y2 - y1); + y = h - 1; + } + else if (c & 2) //bottom + { + x = x1 + (x2 - x1) * -y1 / (y2 - y1); + y = 0; + } + else if (c & 4) //right + { + y = y1 + (y2 - y1) * (w - x1) / (x2 - x1); + x = w - 1; + } + else //left + { + y = y1 + (y2 - y1) * -x1 / (x2 - x1); + x = 0; + } + + if (c == code1) // first endpoint was clipped + { + x1 = x; y1 = y; + code1 = region(x1, y1, w, h); + } + else //second endpoint was clipped + { + x2 = x; y2 = y; + code2 = region(x2, y2, w, h); + } + } + + line(buf, w, h, stride, x1, y1, x2, y2, color); +} + + +/** + * Low-level routine to draw a filled rectangle. + * + * The triangle is filled with the given color. + * + * The \a stride represents the width of the image buffer. + * The points \a p1 and \a p2 are two opposite corners of the + * rectangle. + */ +void fillRectangle(unsigned char *buf, unsigned long stride, + QPoint p1, QPoint p2, unsigned char color) +{ + QPoint ul; // upper-left corner + QPoint lr; // lower-right corner + + if (p2.x() > p1.x()) + { + ul.setX(p1.x()); + lr.setX(p2.x()); + } + else + { + ul.setX(p2.x()); + lr.setX(p1.x()); + } + + if (p2.y() > p1.y()) + { + ul.setY(p1.y()); + lr.setY(p2.y()); + } + else + { + ul.setY(p2.y()); + lr.setY(p1.y()); + } + + int width = lr.x() - ul.x(); + unsigned long offset = ul.x() + ul.y()*stride; + + for (int h = ul.y(); h < lr.y(); h++) + { + memset(buf+offset, color, width); + offset += stride; + } +} + +/** + * Low-level routines to draw a filled triangle. + * + * The triangle is filled with the given \a color. + * The \a stride represents the width of the image buffer (\a buf). + * + * The routine use fixed-point arithmetic. + */ +void fillTriangle(unsigned char* buf, unsigned long stride, + QPoint v1, QPoint v2, QPoint v3, unsigned char color) +{ + int altezza[3]; + + // Sort by vertical coordinate + if (v1.y() > v2.y()) + std::swap(v1, v2); + if (v1.y() > v3.y()) + std::swap(v1, v3); + if (v2.y() > v3.y()) + std::swap(v2, v3); + + altezza[0] = v3.y() - v1.y(); + if (!altezza[0]) + return; + + int sezioni = 2; + int sezione = 1; + + buf += v1.y() * stride; + + altezza[1] = v2.y() - v1.y(); + altezza[2] = v3.y() - v2.y(); + + int sinistra = v1.x(); + int destra = sinistra; + + if (v1.y() == v2.y()) + { + if (v1.x() < v2.x()) + destra = v2.x(); + else + sinistra = v2.x(); + } + + sinistra <<= 16; + destra <<= 16; + + int stmp1, stmp2, stmp3; + + stmp1 = (altezza[1] << 16) / altezza[0]; + int lunghezza = stmp1 * (v3.x() - v1.x()) + ((v1.x() - v2.x()) << 16); + + if (!lunghezza ) + return; + + int delta_sinistra[2]; + int delta_destra[2]; + + stmp1 = ((v3.x() - v1.x()) << 16) / altezza[0]; + + if (altezza[1]) + stmp2 = ((v2.x() - v1.x()) << 16) / altezza[1]; + if (altezza[2]) + stmp3 = ((v3.x() - v2.x()) << 16) / altezza[2]; + + if (lunghezza < 0) // Il secondo vertice ~J a destra + { + delta_sinistra[0] = stmp1; + delta_sinistra[1] = stmp1; + delta_destra[0] = stmp2; + delta_destra[1] = stmp3; + } + else // Il secondo vertice ~J a sinistra + { + delta_sinistra[0] = stmp2; + delta_sinistra[1] = stmp3; + delta_destra[0] = stmp1; + delta_destra[1] = stmp1; + } + + int len2 = lunghezza; + + do + { + while (altezza [sezione]) + { + unsigned char* curpos = buf + ((sinistra )>> 16); + lunghezza = ((destra ) >> 16) - ((sinistra ) >> 16); + assert(lunghezza >= 0); + if (lunghezza) + memset(curpos, color, lunghezza); + buf += stride; + destra += delta_destra[sezione - 1]; + sinistra += delta_sinistra[sezione - 1]; + altezza[sezione]--; + } + if (len2 < 0) + destra = v2.x() << 16; + else + sinistra = v2.x() << 16; + sezione++; + } while (--sezioni); +} diff --git a/bertos/gfx/font.h b/bertos/gfx/font.h new file mode 100644 index 0000000..4b28de6 --- /dev/null +++ b/bertos/gfx/font.h @@ -0,0 +1,77 @@ +/** + * \file + * + * + * \brief Font 8x6 IBM-PC 8bit + * + * + * \author Stefano Fedrigo + * + */ + +#ifndef GFX_FONT_H +#define GFX_FONT_H + +#include /* uint8_t */ +#include /* PROGMEM */ + +typedef struct Font +{ + /** + * Pointer to glyph data. + * + * Data is an array of at most 256 glyphs packed together. + * Raster format must be the same of the bitmap. + */ + const pgm_uint8_t *glyph; + + uint8_t width; /**< Pixel width of character cell. */ + uint8_t height; /**< Pixel height of character cell. */ + + uint8_t first; /**< First encoded character in glyph array. */ + uint8_t last; /**< Last encoded character in glyph array (inclusive). */ + + /** Array of glyph offsets in bytes. NULL for fixed-width fonts. */ + const pgm_uint16_t *offset; + const pgm_uint8_t *widths; + +} Font; + + +/** Return true if glyph \a c is available in \a font. */ +#define FONT_HAS_GLYPH(font, c) ((c) >= (font)->first && (c) <= (font)->last) + + +/** The default font. */ +#define default_font font_luBS14 +extern const struct Font default_font; + +#endif /* GFX_FONT_H */ diff --git a/bertos/gfx/font_10x20.c b/bertos/gfx/font_10x20.c new file mode 100644 index 0000000..51911c1 --- /dev/null +++ b/bertos/gfx/font_10x20.c @@ -0,0 +1,5740 @@ +/* Generated by convbdf on Fri Feb 10 01:05:15 CET 2006. */ +#include "font.h" + +/* Font information: + + name: -Misc-Fixed-Medium-R-Normal--20-200-75-75-C-100-ISO8859-1 + pixel size: 20 + ascent: 16 + descent: 4 +*/ + +/* Font character bitmap data. */ +static const PROGMEM uint8_t font_10x20_glyphs[] = { + +/* Character (0x00): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | *** *** | + | * * | + | * * | + | | + | | + | * * | + | * * | + | * * | + | | + | | + | * * | + | * * | + | *** *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0073, 0x0080, +0x0040, 0x0080, +0x0040, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0040, 0x0080, +0x0040, 0x0080, +0x0040, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0040, 0x0080, +0x0040, 0x0080, +0x0073, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x01): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | ** | + | **** | + | ****** | + | ******** | + | ******** | + | ****** | + | **** | + | ** | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x003f, 0x0000, +0x007f, 0x0080, +0x007f, 0x0080, +0x003f, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x02): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + | * * * * * | + |* * * * * | + +----------------+ */ +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, +0x0055, 0x0040, +0x00aa, 0x0080, + +/* Character (0x03): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x007e, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x0000, 0x0000, +0x001f, 0x0080, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x04): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ***** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | ***** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x007c, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0078, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x000f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000f, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x05): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | **** | + | ** ** | + | ** | + | ** | + | ** ** | + | **** | + | | + | ***** | + | ** ** | + | ** ** | + | ***** | + | **** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x003c, 0x0000, +0x0066, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0066, 0x0000, +0x003c, 0x0000, +0x0000, 0x0000, +0x001f, 0x0000, +0x0019, 0x0080, +0x0019, 0x0080, +0x001f, 0x0000, +0x001e, 0x0000, +0x001b, 0x0000, +0x0019, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x06): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ***** | + | | + | ***** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x003e, 0x0000, +0x0000, 0x0000, +0x000f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000f, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x07): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | **** | + | ** ** | + | ** ** | + | **** | + | ** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x08): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | ** | + | ** | + | ******** | + | ** | + | ** | + | | + | ******** | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x09): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ** ** | + | *** ** | + | ****** | + | ****** | + | ** *** | + | ** ** | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ***** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0066, 0x0000, +0x0076, 0x0000, +0x007e, 0x0000, +0x007e, 0x0000, +0x006e, 0x0000, +0x0066, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x0a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | ** ** | + | ** ** | + | ** ** | + | **** | + | **** | + | ** | + | ** | + | | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x003c, 0x0000, +0x003c, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0000, 0x0000, +0x001f, 0x0080, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x0b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + |***** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x00f8, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x0c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + |***** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00f8, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x0d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | ****** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000f, 0x00c0, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x0e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | ****** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x000f, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x0f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + |********** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x00ff, 0x00c0, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x10): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + |********** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x00ff, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x11): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + |********** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x12): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + |********** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x13): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + |********** | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x14): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + |********** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x00c0, + +/* Character (0x15): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | ****** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x000f, 0x00c0, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x16): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + |***** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x00f8, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x17): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + |********** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x00ff, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x18): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + |********** | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x00c0, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x19): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + | * | + +----------------+ */ +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, +0x0008, 0x0000, + +/* Character (0x1a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | *** | + | *** | + | *** | + |*** | + | *** | + | *** | + | *** | + | | + | | + |********* | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0003, 0x0080, +0x000e, 0x0000, +0x0038, 0x0000, +0x00e0, 0x0000, +0x0038, 0x0000, +0x000e, 0x0000, +0x0003, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x1b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + |*** | + | *** | + | *** | + | *** | + | *** | + | *** | + |*** | + | | + | | + |********* | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00e0, 0x0000, +0x0038, 0x0000, +0x000e, 0x0000, +0x0003, 0x0080, +0x000e, 0x0000, +0x0038, 0x0000, +0x00e0, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x00ff, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x1c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ******** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0033, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x1d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | ** | + | ** | + | ** | + | ******** | + | ** | + | ** | + | ******** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0006, 0x0000, +0x007f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x0018, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x1e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** | + | ** | + | ****** | + | ** | + | ** | + | ** | + | ***** | + | * * ** ** | + | *** *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000f, 0x0000, +0x0019, 0x0080, +0x0019, 0x0080, +0x0018, 0x0000, +0x0018, 0x0000, +0x007e, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x007c, 0x0000, +0x0056, 0x00c0, +0x0073, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x1f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | *** | + | *** | + | *** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x20): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x21): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x22): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | * * | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0012, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x23): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ******** | + | ** ** | + | ** ** | + | ** ** | + | ******** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000d, 0x0080, +0x000d, 0x0080, +0x000d, 0x0080, +0x003f, 0x00c0, +0x001b, 0x0000, +0x001b, 0x0000, +0x001b, 0x0000, +0x007f, 0x0080, +0x0036, 0x0000, +0x0036, 0x0000, +0x0036, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x24): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ****** | + | ** ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ** ** ** | + | ****** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x003f, 0x0000, +0x006d, 0x0080, +0x006c, 0x0000, +0x006c, 0x0000, +0x006c, 0x0000, +0x003f, 0x0000, +0x000d, 0x0080, +0x000d, 0x0080, +0x000d, 0x0080, +0x006d, 0x0080, +0x003f, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x25): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | *** ** | + | ** ** ** | + | ** **** | + | *** ** | + | ** | + | ** | + | ** | + | ** | + | ** *** | + | **** ** | + | ** ** ** | + | ** *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0039, 0x0080, +0x006d, 0x0080, +0x006f, 0x0000, +0x003b, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x001b, 0x0080, +0x001e, 0x00c0, +0x0036, 0x00c0, +0x0033, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x26): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | *** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | ** | + | *** | + | ** ** | + | ** ** ** | + | ** *** | + | ** ** | + | *** **** | + | **** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001c, 0x0000, +0x0036, 0x0000, +0x0036, 0x0000, +0x0036, 0x0000, +0x003c, 0x0000, +0x0018, 0x0000, +0x0038, 0x0000, +0x006c, 0x0000, +0x0066, 0x00c0, +0x0063, 0x0080, +0x0063, 0x0000, +0x0077, 0x0080, +0x003c, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x27): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | * | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0008, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x28): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0003, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0006, 0x0000, +0x0003, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x29): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0030, 0x0000, +0x0018, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x2a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | **** | + | ******** | + | **** | + | ** ** | + | ** ** | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x001e, 0x0000, +0x007f, 0x0080, +0x001e, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x2b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | ** | + | ** | + | ** | + | ******** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x2c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | *** | + | *** | + | *** | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x001c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x2d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | ******** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x2e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | *** | + | *** | + | *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x2f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0003, 0x0000, +0x0003, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x30): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x0033, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x31): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | *** | + | **** | + | ** ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001c, 0x0000, +0x003c, 0x0000, +0x006c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x32): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** | + | ** | + | ** | + | *** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0003, 0x0000, +0x000e, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x33): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** | + | ** | + | *** | + | ** | + | ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0001, 0x0080, +0x0003, 0x0000, +0x000e, 0x0000, +0x0003, 0x0000, +0x0001, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x34): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | * | + | ** | + | *** | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ******** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0001, 0x0000, +0x0003, 0x0000, +0x0007, 0x0000, +0x000f, 0x0000, +0x001b, 0x0000, +0x0033, 0x0000, +0x0063, 0x0000, +0x0063, 0x0000, +0x007f, 0x0080, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x35): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ******** | + | ** | + | ** | + | ** | + | ** | + | ** *** | + | *** ** | + | ** | + | ** | + | ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x006e, 0x0000, +0x0073, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x36): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** * | + | ** | + | ** | + | ** *** | + | *** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x006e, 0x0000, +0x0073, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x37): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ******** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0003, 0x0000, +0x0003, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x38): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x39): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | *** ** | + | ** | + | ** | + | * ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001d, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0021, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x3a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | *** | + | *** | + | | + | | + | | + | | + | *** | + | *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x3b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | *** | + | *** | + | | + | | + | | + | | + | *** | + | *** | + | *** | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000e, 0x0000, +0x000e, 0x0000, +0x001c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x3c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | * | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | * | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0001, 0x0000, +0x0003, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x0060, 0x0000, +0x0030, 0x0000, +0x0018, 0x0000, +0x000c, 0x0000, +0x0006, 0x0000, +0x0003, 0x0000, +0x0001, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x3d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | ******** | + | | + | | + | | + | | + | ******** | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x3e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | * | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | * | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0020, 0x0000, +0x0030, 0x0000, +0x0018, 0x0000, +0x000c, 0x0000, +0x0006, 0x0000, +0x0003, 0x0000, +0x0001, 0x0080, +0x0003, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x0020, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x3f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0003, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x40): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** **** | + | ** ***** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** **** | + | ** ** | + | ** | + | ** ** | + | ***** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0067, 0x0080, +0x006f, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006f, 0x0000, +0x0066, 0x0000, +0x0060, 0x0000, +0x0031, 0x0080, +0x001f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x41): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ******** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x007f, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x42): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ***** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007c, 0x0000, +0x0066, 0x0000, +0x0063, 0x0000, +0x0063, 0x0000, +0x0063, 0x0000, +0x0066, 0x0000, +0x007e, 0x0000, +0x0063, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0063, 0x0000, +0x007e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x43): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x44): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007e, 0x0000, +0x0063, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0063, 0x0000, +0x007e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x45): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ******** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x007e, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x46): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ******** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x007e, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x47): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** | + | ** | + | ** | + | ** **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | **** * | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0067, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001e, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x48): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ******** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x007f, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x49): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ******** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x4a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** ** | + | ** ** | + | ** ** | + | *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000f, 0x00c0, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0063, 0x0000, +0x0063, 0x0000, +0x0036, 0x0000, +0x001c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x4b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ***** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0063, 0x0000, +0x0063, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x007c, 0x0000, +0x0066, 0x0000, +0x0066, 0x0000, +0x0063, 0x0000, +0x0063, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x4c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x4d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | *** *** | + | *** *** | + | ******** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0073, 0x0080, +0x0073, 0x0080, +0x007f, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x4e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | *** ** | + | *** ** | + | **** ** | + | **** ** | + | ** ** ** | + | ** ** ** | + | ** **** | + | ** **** | + | ** *** | + | ** *** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0071, 0x0080, +0x0071, 0x0080, +0x0079, 0x0080, +0x0079, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x0067, 0x0080, +0x0067, 0x0080, +0x0063, 0x0080, +0x0063, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x4f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x50): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007e, 0x0000, +0x0063, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0063, 0x0000, +0x007e, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x51): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** ** | + | ** **** | + | ** ** | + | ***** | + | ** | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x006d, 0x0080, +0x0067, 0x0080, +0x0033, 0x0000, +0x001f, 0x0000, +0x0001, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x52): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007e, 0x0000, +0x0063, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0063, 0x0000, +0x007e, 0x0000, +0x0066, 0x0000, +0x0063, 0x0000, +0x0063, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x53): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0060, 0x0000, +0x0060, 0x0000, +0x0030, 0x0000, +0x001e, 0x0000, +0x0003, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x54): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ******** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x55): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x56): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | **** | + | **** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x001e, 0x0000, +0x001e, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x57): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | *** *** | + | *** *** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x0073, 0x0080, +0x0073, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x58): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | **** | + | ** | + | **** | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x0033, 0x0000, +0x001e, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x59): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x0033, 0x0000, +0x001e, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x5a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ******** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0003, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x5b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ****** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003f, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x003f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x5c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0006, 0x0000, +0x0006, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x5d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ****** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003f, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x0003, 0x0000, +0x003f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x5e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | **** | + | ** ** | + | ** ** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x5f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | ********* | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x007f, 0x00c0, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x60): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0018, 0x0000, +0x000c, 0x0000, +0x0006, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x61): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ***** | + | ** ** | + | ** | + | ******* | + | ** ** | + | ** ** | + | ** ** | + | ***** * | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001f, 0x0000, +0x0031, 0x0080, +0x0001, 0x0080, +0x003f, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x003e, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x62): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** *** | + | *** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | *** ** | + | ** *** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x006e, 0x0000, +0x0073, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0073, 0x0000, +0x006e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x63): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ***** | + | ** ** | + | ** | + | ** | + | ** | + | ** | + | ** ** | + | ***** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001f, 0x0000, +0x0031, 0x0080, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0031, 0x0080, +0x001f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x64): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | *** ** | + | ** *** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | *** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x001d, 0x0080, +0x0033, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001d, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x65): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ******** | + | ** | + | ** | + | ** ** | + | ***** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x007f, 0x0080, +0x0060, 0x0000, +0x0060, 0x0000, +0x0031, 0x0080, +0x001f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x66): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** | + | ** | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000f, 0x0000, +0x0019, 0x0080, +0x0019, 0x0080, +0x0018, 0x0000, +0x0018, 0x0000, +0x007e, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x67): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ***** * | + | ** *** | + | ** ** | + | ** ** | + | ** ** | + | ***** | + | ** | + | ****** | + | ** ** | + | ** ** | + | ** ** | + | ****** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003e, 0x0080, +0x0063, 0x0080, +0x0063, 0x0000, +0x0063, 0x0000, +0x0063, 0x0000, +0x003e, 0x0000, +0x0060, 0x0000, +0x003f, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x003f, 0x0000, + +/* Character (0x68): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** *** | + | *** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x006e, 0x0000, +0x0073, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x69): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | ** | + | ** | + | | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x003c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x6a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | ** | + | ** | + | | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** ** | + | ** ** | + | ** ** | + | ***** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0000, 0x0000, +0x0007, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0031, 0x0080, +0x0031, 0x0080, +0x0031, 0x0080, +0x001f, 0x0000, + +/* Character (0x6b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | ***** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0063, 0x0000, +0x0066, 0x0000, +0x006c, 0x0000, +0x0078, 0x0000, +0x007c, 0x0000, +0x0066, 0x0000, +0x0063, 0x0000, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x6c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x007f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x6d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | * ** ** | + | ******** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x005b, 0x0000, +0x007f, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x6e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** *** | + | *** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x006e, 0x0000, +0x0073, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x6f): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | **** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x70): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** *** | + | *** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | *** ** | + | ** *** | + | ** | + | ** | + | ** | + | ** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x006e, 0x0000, +0x0073, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0073, 0x0000, +0x006e, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, +0x0060, 0x0000, + +/* Character (0x71): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | *** ** | + | ** *** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | *** ** | + | ** | + | ** | + | ** | + | ** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x001d, 0x0080, +0x0033, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001d, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, +0x0001, 0x0080, + +/* Character (0x72): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** **** | + | *** ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x006f, 0x0000, +0x0039, 0x0080, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0030, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x73): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ****** | + | ** ** | + | ** | + | ****** | + | ** | + | ** | + | ** ** | + | ****** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003f, 0x0000, +0x0061, 0x0080, +0x0060, 0x0000, +0x003f, 0x0000, +0x0001, 0x0080, +0x0001, 0x0080, +0x0061, 0x0080, +0x003f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x74): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | ** | + | ** | + | ** | + | ****** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x007e, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0018, 0x0000, +0x0019, 0x0080, +0x000f, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x75): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | *** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001d, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x76): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | **** | + | **** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x0033, 0x0000, +0x001e, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x77): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** ** | + | ** ** ** | + | ** ** ** | + | ******** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x006d, 0x0080, +0x007f, 0x0080, +0x0033, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x78): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | **** | + | ** | + | ** | + | **** | + | ** ** | + | ** ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x001e, 0x0000, +0x0033, 0x0000, +0x0061, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x79): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** ** | + | ** *** | + | *** ** | + | ** | + | ** ** | + | ** ** | + | **** | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0061, 0x0080, +0x0033, 0x0080, +0x001d, 0x0080, +0x0001, 0x0080, +0x0061, 0x0080, +0x0033, 0x0000, +0x001e, 0x0000, + +/* Character (0x7a): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | | + | | + | | + | | + | | + | ******* | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ******* | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x003f, 0x0080, +0x0001, 0x0080, +0x0003, 0x0000, +0x0006, 0x0000, +0x000c, 0x0000, +0x0018, 0x0000, +0x0030, 0x0000, +0x003f, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x7b): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0007, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0078, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0007, 0x0080, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x7c): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | ** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x7d): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | **** | + | ** | + | ** | + | ** | + | ** | + | ** | + | **** | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0078, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0007, 0x0080, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x000c, 0x0000, +0x0078, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, + +/* Character (0x7e): + bbw=10, bbh=20, bbx=0, bby=-4, width=10 + +----------------+ + | | + | | + | | + | *** ** | + | ** ** ** | + | ** *** | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + | | + +----------------+ */ +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0039, 0x0080, +0x006d, 0x0080, +0x0067, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +0x0000, 0x0000, +}; + +#warning TODO: Fill the structure with missing parameter (see font.h for more detail). +/* Exported structure definition. */ +#if 0 +Font font_10x20 = { + font_10x20_glyphs, + 10, + 20 +}; +#endif + diff --git a/bertos/gfx/gfx.h b/bertos/gfx/gfx.h new file mode 100644 index 0000000..5ac1dc2 --- /dev/null +++ b/bertos/gfx/gfx.h @@ -0,0 +1,241 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Graphics private header. + */ + +/*#* + *#* $Log$ + *#* Revision 1.7 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.6 2006/05/27 17:17:34 bernie + *#* Optimize away divisions in RAST_ADDR/MASK macros. + *#* + *#* Revision 1.5 2006/05/25 23:35:40 bernie + *#* Cleanup. + *#* + *#* Revision 1.4 2006/03/22 09:50:37 bernie + *#* Use the same format for fonts and rasters. + *#* + *#* Revision 1.3 2006/02/15 09:10:15 bernie + *#* Implement prop fonts; Fix algo styles. + *#* + *#* Revision 1.2 2006/02/10 12:28:33 bernie + *#* Add font support in bitmaps; Make bitmap formats public. + *#* + *#* Revision 1.1 2006/01/26 00:32:49 bernie + *#* Graphics private header. + *#* + *#*/ + +#ifndef GFX_GFX_P_H +#define GFX_GFX_P_H + +#include + +#if CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_H_MSB + + /* We use ucoord_t to let the compiler optimize away the division/modulo. */ + #define RAST_ADDR(raster, x, y, stride) \ + ((raster) + (ucoord_t)(y) * (ucoord_t)(stride) + (ucoord_t)(x) / 8) + #define RAST_MASK(raster, x, y) \ + (1 << (7 - (ucoord_t)(x) % 8)) + +#elif CONFIG_BITMAP_FMT == BITMAP_FMT_PLANAR_V_LSB + + /* We use ucoord_t to let the compiler optimize away the division/modulo. */ + #define RAST_ADDR(raster, x, y, stride) \ + ((raster) + ((ucoord_t)(y) / 8) * (ucoord_t)(stride) + (ucoord_t)(x)) + #define RAST_MASK(raster, x, y) \ + (1 << ((ucoord_t)(y) % 8)) + +#else + #error Unknown value of CONFIG_BITMAP_FMT +#endif /* CONFIG_BITMAP_FMT */ + +#define BM_ADDR(bm, x, y) RAST_ADDR((bm)->raster, (x), (y), (bm)->stride) +#define BM_MASK(bm, x, y) RAST_MASK((bm)->raster, (x), (y)) + +/** + * Plot a pixel in bitmap \a bm. + * + * \note bm is evaluated twice. + * \see BM_CLEAR BM_DRAWPIXEL + */ +#define BM_PLOT(bm, x, y) \ + ( *BM_ADDR(bm, x, y) |= BM_MASK(bm, x, y) ) + +/** + * Clear a pixel in bitmap \a bm. + * + * \note bm is evaluated twice. + * \see BM_PLOT BM_DRAWPIXEL + */ +#define BM_CLEAR(bm, x, y) \ + ( *BM_ADDR(bm, x, y) &= ~BM_MASK(bm, x, y) ) + +/** + * Set a pixel in bitmap \a bm to the specified color. + * + * \note bm is evaluated twice. + * \note This macro is somewhat slower than BM_PLOT and BM_CLEAR. + * \see BM_PLOT BM_CLEAR + */ +#define BM_DRAWPIXEL(bm, x, y, fg_pen) \ + do { \ + uint8_t *p = BM_ADDR(bm, x, y); \ + uint8_t mask = BM_MASK(bm, x, y); \ + *p = (*p & ~mask) | ((fg_pen) ? mask : 0); \ + } while (0) + +/** + * Get the value of the pixel in bitmap \a bm. + * + * \return The returned value is either 0 or 1. + * + * \note bm is evaluated twice. + * \see BM_DRAWPIXEL + */ +#define BM_READPIXEL(bm, x, y) \ + ( *BM_ADDR(bm, x, y) & BM_MASK(bm, x, y) ? 1 : 0 ) + +#define RAST_READPIXEL(raster, x, y, stride) \ + ( *RAST_ADDR(raster, x, y, stride) & RAST_MASK(raster, x, y) ? 1 : 0 ) + +#endif /* GFX_GFX_P_H */ diff --git a/bertos/gfx/line.c b/bertos/gfx/line.c new file mode 100644 index 0000000..8c87a52 --- /dev/null +++ b/bertos/gfx/line.c @@ -0,0 +1,408 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Line drawing graphics routines + * \sa gfx.h + */ + +#include "gfx.h" +#include "gfx_p.h" + +#include "cfg/cfg_gfx.h" /* CONFIG_GFX_CLIPPING */ +#include /* ASSERT() */ +#include /* SWAP() */ + +/* Configuration sanity checks */ +#if !defined(CONFIG_GFX_CLIPPING) || (CONFIG_GFX_CLIPPING != 0 && CONFIG_GFX_CLIPPING != 1) + #error CONFIG_GFX_CLIPPING must be defined to either 0 or 1 +#endif +#if !defined(CONFIG_GFX_VCOORDS) || (CONFIG_GFX_VCOORDS != 0 && CONFIG_GFX_VCOORDS != 1) + #error CONFIG_GFX_VCOORDS must be defined to either 0 or 1 +#endif + +/** + * Draw a sloped line without performing clipping. + * + * Parameters are the same of gfx_line(). + * This routine is based on the Bresenham Line-Drawing Algorithm. + * + * \note Passing coordinates outside the bitmap boundaries will + * result in memory trashing. + * + * \todo Optimize for vertical and horiziontal lines. + * + * \sa gfx_line() + */ +static void gfx_lineUnclipped(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + int x, y, e, len, adx, ady, signx, signy; + + if (x2 > x1) + { + /* left to right */ + signx = +1; + adx = x2 - x1; + } + else + { + /* right to left */ + signx = -1; + adx = x1 - x2; + } + + if (y2 > y1) + { + /* top to bottom */ + signy = +1; + ady = y2 - y1; + } + else + { + /* bottom to top */ + signy = -1; + ady = y1 - y2; + } + + x = x1; + y = y1; + + if (adx > ady) + { + /* X-major line (octants 1/4/5/8) */ + + len = adx; + e = -adx; + while (len--) + { + /* Sanity check */ + ASSERT((x >= 0) && (x < bm->width) && (y >= 0) && (y < bm->height)); + BM_PLOT(bm, x, y); + x += signx; + e += ady; + if (e >= 0) + { + y += signy; + e -= adx; + } + } + } + else + { + /* Y-major line (octants 2/3/6/7) */ + + len = ady; + e = -ady; + while (len--) + { + /* Sanity check */ + ASSERT ((x >= 0) && (x < bm->width) && (y >= 0) && (y < bm->height)); + BM_PLOT(bm, x, y); + y += signy; + e += adx; + if (e >= 0) + { + x += signx; + e -= ady; + } + } + } +} + +#if CONFIG_GFX_CLIPPING + +/// Helper routine for gfx_line(). +static int gfx_findRegion(int x, int y, Rect *cr) +{ + int code = 0; + + if (y >= cr->ymax) + code |= 1; /* below */ + else if (y < cr->ymin) + code |= 2; /* above */ + + if (x >= cr->xmax) + code |= 4; /* right */ + else if (x < cr->xmin) + code |= 8; /* left */ + + return code; +} + +#endif /* CONFIG_CLIPPING */ + +/** + * Draw a sloped line segment. + * + * Draw a sloped line segment identified by the provided + * start and end coordinates on the bitmap \a bm. + * + * The line endpoints are clipped inside the current bitmap + * clipping rectangle using the Cohen-Sutherland algorithm, + * which is very fast. + * + * \note The point at coordinates \a x2 \a y2 is not drawn. + * + * \note This function does \b not update the current pen position. + * + * \todo Compute updated Bresenham error term. + */ +void gfx_line(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ +#if CONFIG_GFX_CLIPPING + int clip1 = gfx_findRegion(x1, y1, &bm->cr); + int clip2 = gfx_findRegion(x2, y2, &bm->cr); + + /* Loop while there is at least one point outside */ + while (clip1 | clip2) + { + /* Check for line totally outside */ + if (clip1 & clip2) + return; + + int c = clip1 ? clip1 : clip2; + int x, y; + + if (c & 1) /* Below */ + { + x = x1 + (x2 - x1) * (bm->cr.ymax - y1) / (y2 - y1); + y = bm->cr.ymax - 1; + } + else if (c & 2) /* Above */ + { + x = x1 + (x2 - x1) * (bm->cr.ymin - y1) / (y2 - y1); + y = bm->cr.ymin; + } + else if (c & 4) /* Right */ + { + y = y1 + (y2 - y1) * (bm->cr.xmax - x1) / (x2 - x1); + x = bm->cr.xmax - 1; + } + else /* Left */ + { + y = y1 + (y2 - y1) * (bm->cr.xmin - x1) / (x2 - x1); + x = bm->cr.xmin; + } + + if (c == clip1) /* First endpoint was clipped */ + { + // TODO: adjust Bresenham error term + //coord_t clipdx = ABS(x - x1); + //coord_t clipdy = ABS(y - y1); + //e += (clipdy * e2) + ((clipdx - clipdy) * e1); + + x1 = x; + y1 = y; + clip1 = gfx_findRegion(x1, y1, &bm->cr); + } + else /* Second endpoint was clipped */ + { + x2 = x; + y2 = y; + clip2 = gfx_findRegion(x2, y2, &bm->cr); + } + } +#endif /* CONFIG_GFX_CLIPPING */ + + gfx_lineUnclipped(bm, x1, y1, x2, y2); +} + +/** + * Move the current pen position to the specified coordinates. + * + * The pen position is used for drawing operations such as + * gfx_lineTo(), which can be used to draw polygons. + */ +void gfx_moveTo(Bitmap *bm, coord_t x, coord_t y) +{ + bm->penX = x; + bm->penY = y; +} + +/** + * Draw a line from the current pen position to the new coordinates. + * + * \note This function moves the current pen position to the + * new coordinates. + * + * \sa gfx_line() + */ +void gfx_lineTo(Bitmap *bm, coord_t x, coord_t y) +{ + gfx_line(bm, bm->penX, bm->penY, x, y); + gfx_moveTo(bm, x, y); +} + + +/** + * Draw the perimeter of an hollow rectangle. + * + * \note The bottom-right corner of the rectangle is drawn at (x2-1;y2-1). + * \note This function does \b not update the current pen position. + */ +void gfx_rectDraw(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + /* Sort coords (needed for correct bottom-right semantics) */ + if (x1 > x2) SWAP(x1, x2); + if (y1 > y2) SWAP(y1, y2); + + /* Draw rectangle */ + gfx_line(bm, x1, y1, x2-1, y1); + gfx_line(bm, x2-1, y1, x2-1, y2-1); + gfx_line(bm, x2-1, y2-1, x1, y2-1); + gfx_line(bm, x1, y2-1, x1, y1); +} + + +/** + * Fill a rectangular area with \a color. + * + * \note The bottom-right border of the rectangle is not drawn. + * + * \note This function does \b not update the current pen position. + */ +void gfx_rectFillC(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2, uint8_t color) +{ + coord_t x, y; + + /* Sort coords */ + if (x1 > x2) SWAP(x1, x2); + if (y1 > y2) SWAP(y1, y2); + +#if CONFIG_GFX_CLIPPING + /* Clip rect to bitmap clip region */ + if (x1 < bm->cr.xmin) x1 = bm->cr.xmin; + if (x2 < bm->cr.xmin) x2 = bm->cr.xmin; + if (x1 > bm->cr.xmax) x1 = bm->cr.xmax; + if (x2 > bm->cr.xmax) x2 = bm->cr.xmax; + if (y1 < bm->cr.ymin) y1 = bm->cr.ymin; + if (y2 < bm->cr.ymin) y2 = bm->cr.ymin; + if (y1 > bm->cr.ymax) y1 = bm->cr.ymax; + if (y2 > bm->cr.ymax) y2 = bm->cr.ymax; +#endif /* CONFIG_GFX_CLIPPING */ + + /* NOTE: Code paths are duplicated for efficiency */ + if (color) /* fill */ + { + for (x = x1; x < x2; x++) + for (y = y1; y < y2; y++) + BM_PLOT(bm, x, y); + } + else /* clear */ + { + for (x = x1; x < x2; x++) + for (y = y1; y < y2; y++) + BM_CLEAR(bm, x, y); + } +} + + +/** + * Draw a filled rectangle. + * + * \note The bottom-right border of the rectangle is not drawn. + * + * \note This function does \b not update the current pen position. + */ +void gfx_rectFill(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + gfx_rectFillC(bm, x1, y1, x2, y2, 0xFF); +} + + +/** + * Clear a rectangular area. + * + * \note The bottom-right border of the rectangle is not cleared. + * + * \note This function does \b not update the current pen position. + */ +void gfx_rectClear(Bitmap *bm, coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + gfx_rectFillC(bm, x1, y1, x2, y2, 0x00); +} + + +#if CONFIG_GFX_VCOORDS +/** + * Imposta gli estremi del sistema di coordinate cartesiane rispetto + * al rettangolo di clipping della bitmap. + */ +void gfx_setViewRect(Bitmap *bm, vcoord_t x1, vcoord_t y1, vcoord_t x2, vcoord_t y2) +{ + ASSERT(x1 != x2); + ASSERT(y1 != y2); + + bm->orgX = x1; + bm->orgY = y1; + bm->scaleX = (vcoord_t)(bm->cr.xmax - bm->cr.xmin - 1) / (vcoord_t)(x2 - x1); + bm->scaleY = (vcoord_t)(bm->cr.ymax - bm->cr.ymin - 1) / (vcoord_t)(y2 - y1); + +/* DB(kprintf("orgX = %f, orgY = %f, scaleX = %f, scaleY = %f\n", + bm->orgX, bm->orgY, bm->scaleX, bm->scaleY);) +*/ +} + + +/** + * Transform a coordinate from the current reference system to a + * pixel offset within the bitmap. + */ +coord_t gfx_transformX(Bitmap *bm, vcoord_t x) +{ + return bm->cr.xmin + (coord_t)((x - bm->orgX) * bm->scaleX); +} + +/** + * Transform a coordinate from the current reference system to a + * pixel offset within the bitmap. + */ +coord_t gfx_transformY(Bitmap *bm, vcoord_t y) +{ + return bm->cr.ymin + (coord_t)((y - bm->orgY) * bm->scaleY); +} + + +/** + * Draw a line from (x1;y1) to (x2;y2). + */ +void gfx_vline(Bitmap *bm, vcoord_t x1, vcoord_t y1, vcoord_t x2, vcoord_t y2) +{ + gfx_line(bm, + gfx_transformX(bm, x1), gfx_transformY(bm, y1), + gfx_transformY(bm, x2), gfx_transformY(bm, y2)); +} +#endif /* CONFIG_GFX_VCOORDS */ diff --git a/bertos/gfx/text.c b/bertos/gfx/text.c new file mode 100644 index 0000000..d1606e0 --- /dev/null +++ b/bertos/gfx/text.c @@ -0,0 +1,320 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Text graphic routines + */ + +#include +#include +#include + +#include // FIXME: BM_DRAWPIXEL + +#include + + +/** + * ANSI escape sequences flag: true for ESC state on. + * + * \todo Move to Bitmap.flags. + */ +static bool ansi_mode = false; + +/** + * Move (imaginary) cursor to coordinates specified. + */ +void text_setCoord(struct Bitmap *bm, int x, int y) +{ + bm->penX = x; + bm->penY = y; +} + + +/** + * Move (imaginary) cursor to column and row specified. + * Next text write will start a that row and col. + */ +void text_moveTo(struct Bitmap *bm, int row, int col) +{ + ASSERT(col >= 0); + ASSERT(col < bm->width / bm->font->width); + ASSERT(row >= 0); + ASSERT(row < bm->height / bm->font->height); + + text_setCoord(bm, col * bm->font->width, row * bm->font->height); +} + + +/** + * Render char \a c on Bitmap \a bm. + */ +static int text_putglyph(char c, struct Bitmap *bm) +{ + const uint8_t * PROGMEM glyph; /* font is in progmem */ + uint8_t glyph_width, glyph_height, glyph_height_bytes; + unsigned char index = (unsigned char)c; + + /* Check for out of range char and replace with '?' or first char in font. */ + if (UNLIKELY(!FONT_HAS_GLYPH(bm->font, index))) + { + kprintf("Illegal char '%c' (0x%02x)\n", index, index); + if (FONT_HAS_GLYPH(bm->font, '?')) + index = '?'; + else + index = bm->font->first; + } + + /* Make character relative to font start */ + index -= bm->font->first; + + glyph_height = bm->font->height; + // FIXME: for vertical fonts only + glyph_height_bytes = (glyph_height + 7) / 8; + + if (bm->font->offset) + { + /* Proportional font */ + glyph_width = bm->font->widths[index]; /* TODO: optimize away */ + glyph = bm->font->glyph + bm->font->offset[index]; + } + else + { + /* + * Fixed-width font: compute the first column of pixels + * of the selected glyph using the character code to index + * the glyph array. + */ + glyph_width = bm->font->width; + + //For horizontal fonts + //glyph = bm->font->glyph + index * (((glyph_width + 7) / 8) * glyph_height); + glyph = bm->font->glyph + index * glyph_height_bytes * glyph_width; + } + + /* Slow path for styled glyphs */ + if (UNLIKELY(bm->styles)) + { + uint8_t styles = bm->styles; + uint8_t prev_dots = 0, italic_prev_dots = 0; + uint8_t dots; + uint8_t row, col, row_bit; + + /* + * To avoid repeating clipping and other expensive computations, + * we cluster calls to gfx_blitRaster() using a small buffer. + */ + #define CONFIG_TEXT_RENDER_OPTIMIZE 1 + #if CONFIG_TEXT_RENDER_OPTIMIZE + #define RENDER_BUF_WIDTH 12 + #define RENDER_BUF_HEIGHT 8 + uint8_t render_buf[RAST_SIZE(RENDER_BUF_WIDTH, RENDER_BUF_HEIGHT)]; + uint8_t render_xpos = 0; + #endif + + /* This style alone could be handled by the fast path too */ + if (bm->styles & STYLEF_CONDENSED) + --glyph_width; + + if (bm->styles & STYLEF_EXPANDED) + glyph_width *= 2; + + for (row = 0, row_bit = 0; row < glyph_height_bytes; ++row, row_bit += 8) + { + /* For each dot column in the glyph... */ + for (col = 0; col < glyph_width; ++col) + { + uint8_t src_col = col; + + /* Expanded style: advances only once every two columns. */ + if (styles & STYLEF_EXPANDED) + src_col /= 2; + + /* Fetch a column of dots from glyph. */ + dots = PGM_READ_CHAR(RAST_ADDR(glyph, src_col, row_bit, glyph_width)); + + /* Italic: get lower 4 dots from previous column */ + if (styles & STYLEF_ITALIC) + { + uint8_t new_dots = dots; + dots = (dots & 0xF0) | italic_prev_dots; + italic_prev_dots = new_dots & 0x0F; + } + + /* Bold: "or" pixels with the previous column */ + if (styles & STYLEF_BOLD) + { + uint8_t new_dots = dots; + dots |= prev_dots; + prev_dots = new_dots; + } + + /* Underlined: turn on base pixel */ + if ((styles & STYLEF_UNDERLINE) + && (row == glyph_height_bytes - 1)) + dots |= (1 << (glyph_height - row_bit - 1)); + + /* Inverted: invert pixels */ + if (styles & STYLEF_INVERT) + dots = ~dots; + + /* Output dots */ + #if CONFIG_TEXT_RENDER_OPTIMIZE + render_buf[render_xpos++] = dots; + if (render_xpos == RENDER_BUF_WIDTH) + { + gfx_blitRaster(bm, bm->penX + col - render_xpos + 1, bm->penY + row_bit, + render_buf, render_xpos, + MIN((uint8_t)RENDER_BUF_HEIGHT, (uint8_t)(glyph_height - row_bit)), + RENDER_BUF_WIDTH); + render_xpos = 0; + } + #else + gfx_blitRaster(bm, bm->penX + col, bm->penY + row_bit, + &dots, 1, MIN((uint8_t)8, glyph_height - row_bit), 1); + #endif + } + + #if CONFIG_TEXT_RENDER_OPTIMIZE + /* Flush out rest of render buffer */ + if (render_xpos != 0) + { + gfx_blitRaster(bm, bm->penX + col - render_xpos, bm->penY + row_bit, + render_buf, render_xpos, + MIN((uint8_t)RENDER_BUF_HEIGHT, (uint8_t)(glyph_height - row_bit)), + RENDER_BUF_WIDTH); + render_xpos = 0; + } + #endif + } + } + else + { + /* No style: fast vanilla copy of glyph to bitmap */ + gfx_blitRaster(bm, bm->penX, bm->penY, glyph, glyph_width, glyph_height, glyph_width); + } + + /* Update current pen position */ + bm->penX += glyph_width; + + return c; +} + + +/** + * Render char \c c, with (currently) limited ANSI escapes + * emulation support and '\n' for newline. + */ +int text_putchar(char c, struct Bitmap *bm) +{ + /* Handle ANSI escape sequences */ + if (UNLIKELY(ansi_mode)) + { + switch (c) + { + case ANSI_ESC_CLEARSCREEN: + gfx_bitmapClear(bm); + bm->penX = 0; + bm->penY = 0; + text_style(bm, 0, STYLEF_MASK); + break; + DB(default: + kprintf("Unknown ANSI esc code: %x\n", c);) + } + ansi_mode = false; + } + else if (c == '\033') /* Enter ANSI ESC mode */ + { + ansi_mode = true; + } + else if (c == '\n') /* Go one line down on a line-feed */ + { + if (bm->penY + bm->font->height < bm->height) + { + bm->penY += bm->font->height; + bm->penX = 0; + } + } + else + { + text_putglyph(c, bm); + } + return c; +} + + +/** + * Clear the screen and reset cursor position + */ +void text_clear(struct Bitmap *bmp) +{ + text_putchar('\x1b', bmp); + text_putchar('c', bmp); +} + + +void text_clearLine(struct Bitmap *bm, int line) +{ + gfx_rectClear(bm, 0, line * bm->font->height, bm->width, (line + 1) * bm->font->height); +} + + +/** + * Set/clear algorithmic font style bits. + * + * \param bm Pointer to Bitmap to affect. + * \param flags Style flags to set + * \param mask Mask of flags to modify + * \return Old style flags + * + * Examples: + * Turn on bold, leave other styles alone + * \code text_style(bm, STYLEF_BOLD, STYLEF_BOLD); \endcode + * + * Turn off bold and turn on italic, leave others as they are + * \code text_style(bm, STYLEF_ITALIC, STYLEF_BOLD | STYLEF_ITALIC); \endcode + * + * Query current style without chaning it + * \code style = text_style(bm, 0, 0); \endcode + * + * Reset all styles (plain text) + * \code text_style(bm, 0, STYLE_MASK); \endcode + */ +uint8_t text_style(struct Bitmap *bm, uint8_t flags, uint8_t mask) +{ + uint8_t old = bm->styles; + bm->styles = (bm->styles & ~mask) | flags; + return old; +} diff --git a/bertos/gfx/text.h b/bertos/gfx/text.h new file mode 100644 index 0000000..aea4b1d --- /dev/null +++ b/bertos/gfx/text.h @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \defgroup text Text handling on graphical displays. + * \ingroup graphics + * \{ + * \brief Text graphic routines (interface) + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * $WIZ$ module_name = "text" + * $WIZ$ module_depends = "bitmap", "line" + */ + +#ifndef GFX_TEXT_H +#define GFX_TEXT_H + +#include +#include /* BV() */ +#include /* CPU_HARVARD */ +#include /* coord_t */ + +#include + +/** + * \name Style flags + * \see text_style() + * \{ + */ +#define STYLEF_BOLD BV(0) +#define STYLEF_ITALIC BV(1) +#define STYLEF_UNDERLINE BV(2) +#define STYLEF_INVERT BV(3) +#define STYLEF_EXPANDED BV(4) +#define STYLEF_CONDENSED BV(5) +#define STYLEF_STRIKEOUT BV(6) /* +int text_puts_P(const char * PROGMEM str, struct Bitmap *bm); +int text_vprintf_P(struct Bitmap *bm, const char * PROGMEM fmt, va_list ap); +int text_printf_P(struct Bitmap *bm, const char * PROGMEM fmt, ...) FORMAT(__printf__, 2, 3); +int text_xyvprintf_P(struct Bitmap *bm, coord_t x, coord_t y, uint16_t mode, const char *fmt, va_list ap); +int text_xyprintf_P(struct Bitmap *bm, coord_t x, coord_t col, uint16_t mode, const char *fmt, ...) FORMAT(__printf__, 5, 6); +int text_xprintf_P(struct Bitmap *bm, uint8_t row, uint8_t col, uint16_t mode, const char * PROGMEM fmt, ...) FORMAT(__printf__, 5, 6); +int text_vwidthf_P(struct Bitmap *bm, const char * PROGMEM fmt, va_list ap); +int text_widthf_P(struct Bitmap *bm, const char * PROGMEM fmt, ...); +#endif /* CPU_HARVARD */ + +/** \} */ //defgroup text +#endif /* GFX_TEXT_H */ diff --git a/bertos/gfx/text_format.c b/bertos/gfx/text_format.c new file mode 100644 index 0000000..93d9722 --- /dev/null +++ b/bertos/gfx/text_format.c @@ -0,0 +1,293 @@ +/** + * \file + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief printf-family routines for text output + * + * $WIZ$ module_name = "text_format" + * $WIZ$ module_depends = "sprintf", "formatwr", "text" + * $WIZ$ module_harvard = "both" + */ + +#include "text.h" + +#include /* _formatted_write() */ +#include +#include + +#include /* vsprintf() */ +#include +#include /* strlen() */ + +/** + * Render string \a str in Bitmap \a bm at current cursor position + * + * \note Text formatting functions are also available with an _P suffix + * accepting the source string from program memory. This feature + * is only available (and useful) on Harvard microprocessors such + * as the AVR. + * + * \see text_putchar() + */ +int PGM_FUNC(text_puts)(const char * PGM_ATTR str, struct Bitmap *bm) +{ + char c; + + while ((c = PGM_READ_CHAR(str++))) + text_putchar(c, bm); + + return 0; +} + + +/** + * vprintf()-like formatter to render text in a Bitmap. + * + * Perform vprintf()-like formatting on the \a fmt format string using the + * variable-argument list \a ap. + * Render the resulting string in Bitmap \a bm starting at the current + * cursor position. + * + * \see text_puts() text_putchar() text_printf() + */ +int PGM_FUNC(text_vprintf)(struct Bitmap *bm, const char * PGM_ATTR fmt, va_list ap) +{ + return PGM_FUNC(_formatted_write)(fmt, (void (*)(char, void *))text_putchar, bm, ap); +} + +/** + * printf()-like formatter to render text in a Bitmap. + * + * Perform printf()-like formatting on the \a fmt format string. + * Render the resulting string in Bitmap \a bm starting at the + * current cursor position. + * + * \see text_puts() text_putchar() text_vprintf() + */ +int PGM_FUNC(text_printf)(struct Bitmap *bm, const char * PGM_ATTR fmt, ...) +{ + int len; + + va_list ap; + va_start(ap, fmt); + len = PGM_FUNC(text_vprintf)(bm, fmt, ap); + va_end(ap); + + return len; +} + +/** + * Render text with vprintf()-like formatting at a specified pixel position. + * + * \see text_xyprintf() + */ +int PGM_FUNC(text_xyvprintf)(struct Bitmap *bm, + coord_t x, coord_t y, uint16_t style, const char * PGM_ATTR fmt, va_list ap) +{ + int len; + uint8_t oldstyle = 0; + + text_setCoord(bm, x, y); + + if (style & STYLEF_MASK) + oldstyle = text_style(bm, style, STYLEF_MASK); + + if (style & (TEXT_CENTER | TEXT_RIGHT)) + { + uint8_t pad = bm->width - PGM_FUNC(text_vwidthf)(bm, fmt, ap); + + if (style & TEXT_CENTER) + pad /= 2; + + if (style & TEXT_FILL) + gfx_rectFillC(bm, 0, y, pad, y + bm->font->height, + (style & STYLEF_INVERT) ? 0xFF : 0x00); + + text_setCoord(bm, pad, y); + } + + len = PGM_FUNC(text_vprintf)(bm, fmt, ap); + + if (style & TEXT_FILL) + gfx_rectFillC(bm, bm->penX, y, bm->width, y + bm->font->height, + (style & STYLEF_INVERT) ? 0xFF : 0x00); + + /* Restore old style */ + if (style & STYLEF_MASK) + text_style(bm, oldstyle, STYLEF_MASK); + + return len; +} + + +/** + * Render text with printf()-like formatting at a specified pixel position. + * + * \param bm Bitmap where to render the text + * \param x [pixels] Initial X coordinate of text. + * \param y [pixels] Coordinate of top border of text. + * \param style Formatting style to use. In addition to any STYLEF_ + * flag, it can be TEXT_NORMAL, TEXT_FILL, TEXT_INVERT or + * TEXT_RIGHT, or a combination of these flags ORed together. + * \param fmt String possibly containing printf() formatting commands. + * + * \see text_puts() text_putchar() text_printf() text_vprintf() + * \see text_moveTo() text_style() + */ +int PGM_FUNC(text_xyprintf)(struct Bitmap *bm, + coord_t x, coord_t y, uint16_t style, const char * PGM_ATTR fmt, ...) +{ + int len; + va_list ap; + + va_start(ap, fmt); + len = PGM_FUNC(text_xyvprintf)(bm, x, y, style, fmt, ap); + va_end(ap); + + return len; +} + + +/** + * Render text with printf()-like formatting at a specified row/column position. + * + * \see text_xyprintf() + */ +int PGM_FUNC(text_xprintf)(struct Bitmap *bm, + uint8_t row, uint8_t col, uint16_t style, const char * PGM_ATTR fmt, ...) +{ + int len; + va_list ap; + + va_start(ap, fmt); + len = PGM_FUNC(text_xyvprintf)( + bm, col * bm->font->width, row * bm->font->height, + style, fmt, ap); + va_end(ap); + + return len; +} + + +struct TextWidthData +{ + Bitmap *bitmap; + coord_t width; +}; + +/** + * Compute width in pixels of a character. + * + * Compute the on screen width of a character, taking the + * current style and font into account. + * + * The width is accumulated in the WidthData structure + * passed as second argument. + * + * This is a formatted_write() callback used by text_vwidthf() + * to compute the length of a formatted string. + */ +static int text_charWidth(int c, struct TextWidthData *twd) +{ + unsigned char index = (unsigned char)c; + Bitmap *bm = twd->bitmap; + coord_t glyph_width; + + + if (UNLIKELY(!FONT_HAS_GLYPH(bm->font, index))) + { + if (!FONT_HAS_GLYPH(bm->font, '?')) + index = '?'; + else + index = bm->font->first; + } + + /* Make character relative to font start */ + index -= bm->font->first; + + if (bm->font->offset) + /* Proportional font */ + glyph_width = bm->font->widths[index]; /* TODO: optimize away */ + else + /* Fixed width font */ + glyph_width = bm->font->width; + + if (bm->styles & STYLEF_CONDENSED) + --glyph_width; + + if (bm->styles & STYLEF_EXPANDED) + glyph_width *= 2; + + twd->width += glyph_width; + + return c; +} + +/** + * Return the width in pixels of a vprintf()-formatted string. + */ +int PGM_FUNC(text_vwidthf)( + UNUSED_ARG(struct Bitmap *, bm), + const char * PGM_ATTR fmt, + va_list ap) +{ + /* Fixed font with no styles affecting the width? */ + if (!bm->font->offset && !(bm->styles & (STYLEF_CONDENSED | STYLEF_EXPANDED))) + return PGM_FUNC(vsprintf)(NULL, fmt, ap) * bm->font->width; + else + { + struct TextWidthData twd; + twd.bitmap = bm; + twd.width = 0; + _formatted_write(fmt, (void (*)(char, void *))text_charWidth, &twd, ap); + return twd.width; + } +} + + +/** + * Return the width in pixels of a printf()-formatted string. + */ +int PGM_FUNC(text_widthf)(struct Bitmap *bm, const char * PGM_ATTR fmt, ...) +{ + int width; + + va_list ap; + va_start(ap, fmt); + width = PGM_FUNC(text_vwidthf)(bm, fmt, ap); + va_end(ap); + + return width; +} diff --git a/bertos/gfx/win.c b/bertos/gfx/win.c new file mode 100644 index 0000000..5bea857 --- /dev/null +++ b/bertos/gfx/win.c @@ -0,0 +1,231 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Very simple hierarchical windowing system. + * + * All functions in this module are to be intended as methods + * of the Window class. Please see its documentation + * for a module-wise introduction. + * + * \see struct Window + */ + +/*#* + *#* $Log$ + *#* Revision 1.2 2006/08/01 17:26:04 batt + *#* Update docs. + *#* + *#* Revision 1.1 2006/08/01 15:43:01 batt + *#* Add in board_kd current edited channel visualization. + *#* + *#* Revision 1.4 2006/07/19 12:56:26 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.3 2006/02/10 12:25:41 bernie + *#* Add missing header. + *#* + *#* Revision 1.2 2006/01/26 00:36:48 bernie + *#* Const correctness for some new functions. + *#* + *#* Revision 1.1 2006/01/23 23:14:29 bernie + *#* Implement simple, but impressive windowing system. + *#* + *#*/ + +#include "win.h" +#include + +/** + * Map the contents of all child-windows into the bitmap of \a w. + * + * \note Recursively drawing children into their parent + * effectively damages the parent buffer. + */ +void win_compose(Window *w) +{ + Window *child; + + /* + * Walk over all children, in back to front order and tell them + * to compose into us. + */ + REVERSE_FOREACH_NODE(child, &w->children) + { + /* Recursively compose child first. */ + win_compose(child); + + /* Draw child into our bitmap. */ + if (w->bitmap) + gfx_blit(w->bitmap, &child->geom, child->bitmap, 0, 0); + } +} + +/** + * Map window \a w into \a parent. + * + * The new window becomes the topmost window. + * + * \note Opening a window twice is illegal. + * + * \see win_close() + */ +void win_open(Window *w, Window *parent) +{ + ASSERT(!w->parent); + w->parent = parent; + ADDHEAD(&parent->children, &w->link); +} + +/** + * Detach window from its parent. + * + * Closing a window causes it to become orphan of its + * parent. Its content will no longer appear in its + * parent after the next refresh cycle. + * + * \note Closing a window that has not been previously + * opened is illegal. + * + * \see win_open() + */ +void win_close(Window *w) +{ + ASSERT(w->parent); + REMOVE(&w->link); + w->parent = NULL; +} + +/** + * Move window to the topmost position relative to its sibling. + * + * \see win_move(), win_resize(), win_setGeometry() + */ +void win_raise(Window *w) +{ + ASSERT(w->parent); + REMOVE(&w->link); + ADDHEAD(&w->parent->children, &w->link); +} + +/** + * Set window position and size at the same time. + * + * This function is equivalent to subsequent calls to win_move() + * and win_resize() using the coordinates provided by the + * \a new_geom rectangle. + * + * \note The xmax and ymax members of \a new_geom are non-inclusive, + * as usual for the Rect interface. + * + * \see win_move() + * \see win_resize() + */ +void win_setGeometry(Window *w, const Rect *new_geom) +{ + // requires C99? + // memcpy(&w->geom, new_geom, sizeof(w->geom)); + w->geom = *new_geom; +} + +/** + * Move window to specified position. + * + * Move the window top-left corner to the pixel coordinates + * \a left and \a top, which are relative to the parent window. + * + * \note A window can also be moved outside the borders + * of its parent, or at negative coordinates. + * + * \note It is allowed to move an orphan window. + */ +void win_move(Window *w, coord_t left, coord_t top) +{ + Rect r; + + r.xmin = left; + r.ymin = top; + r.xmax = r.xmin + RECT_WIDTH(&w->geom); + r.ymax = r.ymin + RECT_WIDTH(&w->geom); + + win_setGeometry(w, &r); +} + +/** + * Resize the rectangle of a window. + * + * The window shrinks or grows to the specified size. + * + * \note Growing a window beyond the size of its + * backing bitmap results in unspecified behavior. + * + * \note It is allowed to resize an orphan window. + */ +void win_resize(Window *w, coord_t width, coord_t height) +{ + Rect r; + + r.xmin = w->geom.xmin; + r.ymin = w->geom.ymin; + r.xmax = r.xmin + width; + r.ymax = r.ymin + height; + + win_setGeometry(w, &r); +} + +/** + * Initialize a new window structure. + * + * The new window initial position is set to (0,0). + * The size is set to the size of the installed bitmap, + * or (0,0) if there's no backing store. + * + * \arg bm The bitmap to install as backing store + * for drawing into the window, or NULL if + * the window is not drawable. + */ +void win_create(Window *w, Bitmap *bm) +{ + w->parent = NULL; + w->bitmap = bm; + w->geom.xmin = 0; + w->geom.ymin = 0; + if (bm) + { + w->geom.xmax = bm->width; + w->geom.ymax = bm->height; + } + LIST_INIT(&w->children); +} + diff --git a/bertos/gfx/win.h b/bertos/gfx/win.h new file mode 100644 index 0000000..e04a999 --- /dev/null +++ b/bertos/gfx/win.h @@ -0,0 +1,119 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Very simple hierarchical windowing system. + * + * All functions in this module are to be intended as methods + * of the Window class. Please see its documentation + * for a module-wise introduction. + * + * \see struct Window + */ + +/*#* + *#* $Log$ + *#* Revision 1.3 2006/07/19 12:56:27 bernie + *#* Convert to new Doxygen style. + *#* + *#* Revision 1.2 2006/01/26 00:36:48 bernie + *#* Const correctness for some new functions. + *#* + *#* Revision 1.1 2006/01/23 23:14:29 bernie + *#* Implement simple, but impressive windowing system. + *#* + *#*/ + +#ifndef GFX_WIN_H +#define GFX_WIN_H + +#include /* Node, List */ +#include /* coord_t */ + + +EXTERN_C_BEGIN + +/** + * Window handle and context structure. + * + * A window is a small rectangular area on the + * screen backed by its own bitmap where you + * can draw. + * + * A window can contain any number of children + * sub-windows that can be depth arranged with + * respect to their siblings. + * + * At any time, a window and all its children + * can be drawn into another bitmap to display + * a complete screen, taking depth and + * overlapping into account. + * + * This rendering model is commonly referred to as + * screen composition, and is quite popular among + * modern windowing systems. + */ +typedef struct Window +{ + Node link; /**< Link us with other siblings into our parent. */ + struct Window *parent; /**< Our parent window. NULL for the root window. */ + + Bitmap *bitmap; /**< Pixel storage for window contents. */ + Rect geom; /**< [px] Window size and position relative to parent. */ + + /** + * List of child windows, arranged by depth (front to back). + * + * Child top/left coordinates are relative to us. + */ + List children; + +} Window; + +/* + * Public function prototypes + */ +void win_compose(Window *w); +void win_open(Window *w, Window *parent); +void win_close(Window *w); +void win_raise(Window *w); +void win_setGeometry(Window *w, const Rect *new_geom); +void win_move(Window *w, coord_t left, coord_t top); +void win_resize(Window *w, coord_t width, coord_t height); +void win_create(Window *w, Bitmap *bm); + +EXTERN_C_END + +#endif /* GFX_WIN_H */ + diff --git a/bertos/gui/levelbar.c b/bertos/gui/levelbar.c new file mode 100644 index 0000000..7176517 --- /dev/null +++ b/bertos/gui/levelbar.c @@ -0,0 +1,105 @@ +/** + * \file + * Copyright 2004, 2006 Develer S.r.l. (http://www.develer.com/) + * + * + * \brief Graphics user interface element to display a level bar. + * + * \author Stefano Fedrigo + */ + +#include "levelbar.h" + + +/** + * Initialize the LevelBar widget with the bitmap associated, + * the value range and the coordinates in the bitmap. + * \note The levelbar should be at least 5 pixels wide and high + * for correct borders drawing. No check is done on this. + */ +void lbar_init(struct LevelBar *lb, struct Bitmap *bmp, int type, int min, int max, int pos, + coord_t x1, coord_t y1, coord_t x2, coord_t y2) +{ + lb->bitmap = bmp; + lb->type = type; + lb->min = min; + lb->max = max; + lb->pos = pos; + lb->x1 = x1; + lb->y1 = y1; + lb->x2 = x2; + lb->y2 = y2; +} + + +/** + * Set the level. + */ +void lbar_setLevel(struct LevelBar *lb, int level) +{ + if (level < lb->min) + level = lb->min; + if (level > lb->max) + level = lb->max; + + lb->pos = level; +} + + +/** + * Get current level. + */ +int lbar_getLevel(struct LevelBar *lb) +{ + return lb->pos; +} + + +/** + * Change level with respect to previous value + * (delta can be negative). + */ +void lbar_changeLevel(struct LevelBar *lb, int delta) +{ + lbar_setLevel(lb, lb->pos + delta); +} + + +/** + * Change the top limit. + */ +void lbar_setMax(struct LevelBar *lb, int max) +{ + lb->max = max; +} + + +/** + * Render the LevelBar on the bitmap. + */ +void lbar_draw(struct LevelBar *lb) +{ +#define BORDERW 1 +#define BORDERH 1 + + /* Compute filled bar length in pixels */ + int totlen = (lb->type & LBAR_HORIZONTAL) ? lb->x2 - lb->x1 - BORDERW*4 : lb->y2 - lb->y1 - BORDERH*4; + int range = lb->max - lb->min; + int barlen = ((long)(lb->pos - lb->min) * (long)totlen + range - 1) / range; + + // Draw border + gfx_rectDraw(lb->bitmap, lb->x1, lb->y1, lb->x2, lb->y2); + + // Clear inside + gfx_rectClear(lb->bitmap, lb->x1 + BORDERW, lb->y1 + BORDERH, lb->x2 - BORDERW, lb->y2 - BORDERH); + + // Draw bar + if (lb->type & LBAR_HORIZONTAL) + gfx_rectFill(lb->bitmap, + lb->x1 + BORDERW*2, lb->y1 + BORDERH*2, + lb->x1 + BORDERW*2 + barlen, lb->y2 - BORDERH*2); + else + gfx_rectFill(lb->bitmap, + lb->x1 + BORDERW*2, lb->y2 - BORDERH*2 - barlen, + lb->x2 - BORDERW*2, lb->y2 - BORDERH*2); +} diff --git a/bertos/gui/levelbar.h b/bertos/gui/levelbar.h new file mode 100644 index 0000000..d1d3692 --- /dev/null +++ b/bertos/gui/levelbar.h @@ -0,0 +1,39 @@ +/** + * \file + * Copyright 2004, 2006 Develer S.r.l. (http://www.develer.com/) + * + * + * \author Stefano Fedrigo + * + * \brief Graphics level bar widget + */ + +#ifndef GUI_LEVELBAR_H +#define GUI_LEVELBAR_H + +#include + + +/** Type of levelbar */ +#define LBAR_HORIZONTAL 1 +#define LBAR_VERTICAL 2 + +typedef struct LevelBar +{ + struct Bitmap *bitmap; + int type; + int pos; ///< Current level + int min; ///< Minimum level + int max; ///< Maximum level + coord_t x1, y1, x2, y2; ///< Position of widget in the bitmap +} LevelBar; + +void lbar_init(struct LevelBar *lb, struct Bitmap *bmp, int type, int min, int max, int pos, + coord_t x1, coord_t y1, coord_t x2, coord_t y2); +void lbar_setLevel(struct LevelBar *lb, int level); +int lbar_getLevel(struct LevelBar *lb); +void lbar_changeLevel(struct LevelBar *lb, int delta); +void lbar_setMax(struct LevelBar *lb, int max); +void lbar_draw(struct LevelBar *lb); + +#endif /* GUI_LEVELBAR_H */ diff --git a/bertos/gui/leveledit.c b/bertos/gui/leveledit.c new file mode 100644 index 0000000..27a4668 --- /dev/null +++ b/bertos/gui/leveledit.c @@ -0,0 +1,321 @@ +/** + * \file + * + * + * \brief Generic editor for (volume/gain/contrast/...) setting. + * + * \author Stefano Fedrigo + */ + +#include "leveledit.h" + +#include "cfg/cfg_menu.h" +#include /* MAX() */ + +#include +#include + +#include + +#include + +#include +#include + +#if CONFIG_MENU_MENUBAR +#include +#endif + +#warning FIXME: Revise me! + +#define LBAR_HEIGHT 16 + +/** + * Allow user to change level. + */ +void level_edit(struct LevelEdit *lev) +{ +#if CONFIG_MENU_MENUBAR + /* Labels for menubars */ + enum LabelId ch_labels[] = { LABEL_C1PLUS2, LABEL_CH_1, LABEL_CH_2 }; + const_iptr_t labels[] = + { + (const_iptr_t)LABEL_BACK, + (const_iptr_t)LABEL_MINUS, + (const_iptr_t)LABEL_PLUS, + (const_iptr_t)LABEL_EMPTY + }; + struct MenuBar mb; +#endif /* CONFIG_MENU_MENUBAR */ + + struct LevelBar bar1, bar2; + keymask_t keys, old_rpt_mask; + int step, rep_step; + + rep_step = MAX(lev->step, ((lev->max - lev->min) / 200)); + step = lev->step; + + // Allow keys repetition. + old_rpt_mask = kbd_setRepeatMask(K_UP | K_DOWN); + + text_clear(lev->bitmap); + //text_style(STYLEF_UNDERLINE, STYLEF_UNDERLINE); + text_puts(lev->title, lev->bitmap); + //text_style(0, STYLEF_UNDERLINE); + + if (lev->type & LEVELEDIT_DOUBLE) + { + int chn = 0; /* edit both channels */ + + /* Levelbars init */ + lbar_init(&bar1, lev->bitmap, LBAR_HORIZONTAL, + lev->min, lev->max, *lev->ch1_val, 0, 16, lev->bitmap->width / 2 - 1, 23); + lbar_init(&bar2, lev->bitmap, LBAR_HORIZONTAL, + lev->min, lev->max, *lev->ch2_val, lev->bitmap->width / 2 + 1, 16, lev->bitmap->width, 23); + + #if CONFIG_MENU_MENUBAR + labels[3] = (const_iptr_t)ch_labels[chn]; + mbar_init(&mb, lev->bitmap, labels, countof(labels)); + mbar_draw(&mb); + #endif /* CONFIG_MENU_MENUBAR */ + + /* Input loop for double level setting */ + for (;;) + { + #if CONFIG_LEVELEDIT_TIMEOUT != 0 + ticks_t idle_timeout = timer_clock(); + #endif + do + { + if (lev->display_hook) + lev->display_hook(lev); + else + { + text_xprintf(lev->bitmap, 1, 0, TEXT_CENTER | TEXT_FILL, lev->unit); + PGM_FUNC(text_xprintf)(lev->bitmap, 1, 3, 0, PGM_STR("%d"), *lev->ch1_val); + PGM_FUNC(text_xprintf)(lev->bitmap, 1, 14, 0, PGM_STR("%d"), *lev->ch2_val); + + lbar_setLevel(&bar1, *lev->ch1_val); + lbar_setLevel(&bar2, *lev->ch2_val); + lbar_draw(&bar1); + lbar_draw(&bar2); + } + + #if CONFIG_LEVELEDIT_TIMEOUT != 0 + if (timer_clock() - idle_timeout > ms_to_ticks(CONFIG_LEVELEDIT_TIMEOUT)) + { + /* Accept input implicitly */ + keys = K_OK; + break; + } + #endif + } + while (!(keys = kbd_peek())); + + if (keys & K_CANCEL) + break; + + if (keys & K_OK) + { + chn = (chn + 1) % 3; + + #if CONFIG_MENU_MENUBAR + labels[3] = (const_iptr_t)ch_labels[chn]; + mbar_draw(&mb); + #endif /* CONFIG_MENU_MENUBAR */ + } + + /* Increment step to achieve greater accelerations on larger values */ + if (keys & K_REPEAT) + step = MIN(rep_step, step + 1); + else + step = lev->step; + + if (keys & (K_UP | K_DOWN)) + { + if (keys & K_UP) + { + /* If changing both channels (chn == 0), don't change + * level if one of two is at min or max */ + if (chn != 0 || + (*lev->ch1_val + step <= lev->max + && *lev->ch2_val + step <= lev->max)) + { + /* If chn == 0 change both channels */ + if (chn != 2) + { + *lev->ch1_val += step; + if (*lev->ch1_val > lev->max) + *lev->ch1_val = lev->max; + } + if (chn != 1) + { + *lev->ch2_val += step; + if (*lev->ch2_val > lev->max) + *lev->ch2_val = lev->max; + } + } + } + else + { + if (chn != 0 || + (*lev->ch1_val - step >= lev->min + && *lev->ch2_val - step >= lev->min)) + { + if (chn != 2) + { + *lev->ch1_val -= step; + if (*lev->ch1_val < lev->min) + *lev->ch1_val = lev->min; + } + if (chn != 1) + { + *lev->ch2_val -= step; + if (*lev->ch2_val < lev->min) + *lev->ch2_val = lev->min; + } + } + } + + if (lev->set_hook) + lev->set_hook(); + } + } // end for(;;) + } + else + { + const PGM_ATTR char *fmt = lev->unit ? PGM_STR("%d %s") : PGM_STR("%d"); + +/* + const int textw = MAX(PGM_FUNC(text_widthf)(lev->bitmap, fmt, lev->max, lev->unit), + PGM_FUNC(text_widthf)(lev->bitmap, fmt, lev->min, lev->unit)); + + const coord_t barlen = lev->bitmap->width - 6 - textw; +*/ + const coord_t barlen = lev->bitmap->width; + const coord_t barvtop = lev->bitmap->height / 2 - LBAR_HEIGHT/2 + lev->bitmap->font->height; + lbar_init(&bar1, lev->bitmap, LBAR_HORIZONTAL, + lev->min, lev->max, *lev->ch1_val, + 0, barvtop, barlen, barvtop + LBAR_HEIGHT); + + #if CONFIG_MENU_MENUBAR + mbar_init(&mb, lev->bitmap, labels, countof(labels)); + mbar_draw(&mb); + #endif /* CONFIG_MENU_MENUBAR */ + + /* Input loop for single level setting */ + for (;;) + { + #if CONFIG_LEVELEDIT_TIMEOUT != 0 + ticks_t idle_timeout = timer_clock(); + #endif + do + { + if (lev->display_hook) + lev->display_hook(lev); + else + { + if (lev->type != LEVELEDIT_NOBAR) + { + lbar_setLevel(&bar1, *lev->ch1_val); + lbar_draw(&bar1); + } + PGM_FUNC(text_xyprintf)(lev->bitmap, 0, bar1.y1 - lev->bitmap->font->height, + TEXT_CENTER | TEXT_FILL, fmt, *lev->ch1_val, lev->unit); + } + + #if CONFIG_LEVELEDIT_TIMEOUT != 0 + if (timer_clock() - idle_timeout > CONFIG_LEVELEDIT_TIMEOUT) + { + /* Accept input implicitly */ + keys = K_CANCEL; + break; + } + #endif + + } + while (!(keys = kbd_peek())); + + if (keys & K_CANCEL) + break; + + /* Increment step to achieve greater accelerations on larger values */ + if (keys & K_REPEAT) + step = MIN(rep_step, step + 1); + else + step = lev->step; + + if (keys & K_UP) + { + *lev->ch1_val += step; + if (*lev->ch1_val > lev->max) + *lev->ch1_val = lev->max; + } + + if (keys & K_DOWN) + { + *lev->ch1_val -= step; + if (*lev->ch1_val < lev->min) + *lev->ch1_val = lev->min; + } + + if (lev->set_hook) + lev->set_hook(); + } + } + + kbd_setRepeatMask(old_rpt_mask); +} + +/** + * LevelEdit structure initialization. + * Init data structure and init LevelEdit widgets. + */ +void level_init(struct LevelEdit *lev, + int type, + struct Bitmap *bmp, const char *title, const char *unit, + int min, int max, int step, + int *ch1_val, int *ch2_val, + level_set_callback *set_hook, display_callback *display_hook) +{ + lev->type = type; + lev->bitmap = bmp; + lev->title = title; + lev->unit = unit; + lev->min = min; + lev->max = max; + lev->step = step; + + lev->ch1_val = ch1_val; + lev->ch2_val = ch2_val; + lev->set_hook = set_hook; + lev->display_hook = display_hook; +} diff --git a/bertos/gui/leveledit.h b/bertos/gui/leveledit.h new file mode 100644 index 0000000..0158efb --- /dev/null +++ b/bertos/gui/leveledit.h @@ -0,0 +1,87 @@ +/** + * \file + * + * + * \brief Generic editor for (volume/gain/contrast/...) setting. + * + * \author Stefano Fedrigo + */ +#ifndef GUI_LEVELEDIT_H +#define GUI_LEVELEDIT_H + +//#include + +/* Type for level_init */ +#define LEVELEDIT_NOBAR 0 /**< Edit number only, without bar nor units */ +#define LEVELEDIT_SINGLE 1 /**< Single channel editing */ +#define LEVELEDIT_DOUBLE 2 /**< Double channel editing */ + + + +/* Fwd decl */ +struct Bitmap; +struct LevelEdit; + +/** Type for callback used to set meter levels */ +typedef void level_set_callback(void); + +/** Type for callback used to customize display of units */ +typedef void display_callback(struct LevelEdit *); + +/** + * State of a level meter + */ +typedef struct LevelEdit { + int type; /* + * + * --> + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief General pourpose menu handling functions + */ + +#include "menu.h" + +#include "cfg/cfg_menu.h" +#include "cfg/cfg_arch.h" + +#include +#include + +#include +#include +#include + +#include + +#include + +#include /* strcpy() */ + +#if CPU_HARVARD +#include /* strncpy_P() */ +#endif + +#if (CONFIG_MENU_TIMEOUT != 0) +#include +#endif + +#if CONFIG_MENU_MENUBAR +#include "menubar.h" +#endif + +#if defined(CONFIG_LOCALE) && (CONFIG_LOCALE == 1) +#include "msg.h" +#else +#define PTRMSG(x) ((const char *)x) +#endif + + +/* Temporary fake defines for ABORT stuff... */ +#define abort_top 0 +#define PUSH_ABORT false +#define POP_ABORT do {} while(0) +#define DO_ABORT do {} while(0) + + +/** + * Return the total number of items in in a menu. + */ +static int menu_count(const struct Menu *menu) +{ + int cnt = 0; + + for (cnt = 0; /*NOP*/; ++cnt) + { + const MenuItem *item = &menu->items[cnt]; +#if CPU_HARVARD + MenuItem ram_item; + if (menu->flags & MF_ROMITEMS) + { + memcpy_P(&ram_item, item, sizeof(ram_item)); + item = &ram_item; + } +#endif + if (!(item->label || item->hook)) + break; + } + + return cnt; +} + +#if CONFIG_MENU_MENUBAR + +/** + * Update the menu bar according to the selected item and redraw it. + */ +static void menu_update_menubar( + const struct Menu *menu, + struct MenuBar *mb, + int selected) +{ + int item_flags; +#if CPU_HARVARD + if (menu->flags & MF_ROMITEMS) + { + ASSERT(sizeof(menu->items[selected].flags) == sizeof(int)); + item_flags = pgm_read_int(&menu->items[selected].flags); + } + else +#endif + item_flags = menu->items[selected].flags; + + const_iptr_t newlabel = (const_iptr_t)LABEL_OK; + + if (item_flags & MIF_DISABLED) + newlabel = (const_iptr_t)LABEL_EMPTY; + else if (item_flags & MIF_TOGGLE) + newlabel = (const_iptr_t)LABEL_SEL; + else if (item_flags & MIF_CHECKIT) + { + newlabel = (item_flags & MIF_CHECKED) ? + (const_iptr_t)LABEL_EMPTY : (const_iptr_t)LABEL_SEL; + } + + mb->labels[3] = newlabel; + mbar_draw(mb); +} +#endif /* CONFIG_MENU_MENUBAR */ + + +static void menu_defaultRenderHook(struct Bitmap *bm, int ypos, bool selected, const struct MenuItem *item) +{ + if (item->flags & MIF_CHECKIT) + { + gfx_rectClear(bm, 0, ypos, + bm->font->height, ypos + bm->font->height); + + if (item->flags & MIF_TOGGLE) + gfx_rectDraw(bm, 2, ypos + 2, + bm->font->height - 2, ypos + bm->font->height - 2); + if (item->flags & MIF_CHECKED) + { + gfx_line(bm, + 3, ypos + 3, + bm->font->height - 3, ypos + bm->font->height - 3); + gfx_line(bm, + bm->font->height - 3, ypos + 3, + 3, ypos + bm->font->height - 3); + } + } + +#if CPU_HARVARD + ((item->flags & MIF_RAMLABEL) ? text_xyprintf : text_xyprintf_P) +#else + text_xyprintf +#endif + ( + bm, (item->flags & MIF_CHECKIT) ? bm->font->height : 0, ypos, + selected ? (STYLEF_INVERT | TEXT_FILL) : TEXT_FILL, + PTRMSG(item->label) + ); +} + +/** + * Show a menu on the display. + */ +static void menu_layout( + const struct Menu *menu, + int first_item, + int selected, + bool redraw) +{ + coord_t ypos; + int i; + const char * PROGMEM title = PTRMSG(menu->title); + Bitmap *bm = menu->bitmap; + + ypos = bm->cr.ymin; + + if (redraw) + { + /* Clear screen */ + text_clear(menu->bitmap); + } + + if (title) + { + if (redraw) + text_xyprintf(bm, 0, ypos, STYLEF_UNDERLINE | STYLEF_BOLD | TEXT_CENTER | TEXT_FILL, title); + ypos += bm->font->height; + } + +#if CONFIG_MENU_SMOOTH + static coord_t yoffset = 0; + static int old_first_item = 0; + static int speed; + coord_t old_ymin = bm->cr.ymin; + + /* Clip drawing inside menu items area */ + gfx_setClipRect(bm, + bm->cr.xmin, bm->cr.ymin + ypos, + bm->cr.xmax, bm->cr.ymax); + + if (old_first_item != first_item) + { + /* Speed proportional to distance */ + speed = ABS(old_first_item - first_item) * 3; + + if (old_first_item > first_item) + { + yoffset += speed; + if (yoffset > bm->font->height) + { + yoffset = 0; + --old_first_item; + } + } + else + { + yoffset -= speed; + if (yoffset < -bm->font->height) + { + yoffset = 0; + ++old_first_item; + } + } + first_item = MIN(old_first_item, menu_count(menu)); + + ypos += yoffset; + redraw = true; + } +#endif /* CONFIG_MENU_SMOOTH */ + + if (redraw) for (i = first_item; /**/; ++i) + { + const MenuItem *item = &menu->items[i]; +#if CPU_HARVARD + MenuItem ram_item; + if (menu->flags & MF_ROMITEMS) + { + memcpy_P(&ram_item, item, sizeof(ram_item)); + item = &ram_item; + } +#endif /* CPU_HARVARD */ + + /* Check for end of room */ + if (ypos > bm->cr.ymax) + break; + + /* Check for end of menu */ + if (!(item->label || item->hook)) + break; + + /* Only print visible items */ + if (!(item->flags & MIF_HIDDEN)) + { + #warning __FILTER_NEXT_WARNING__ + RenderHook renderhook = (item->flags & MIF_RENDERHOOK) ? (RenderHook)item->label : menu_defaultRenderHook; + + /* Render menuitem */ + renderhook(menu->bitmap, ypos++, (i == selected), item); + + ypos += bm->font->height; + } + } + +#if CONFIG_MENU_SMOOTH + if (redraw) + { + /* Clear rest of area */ + gfx_rectClear(bm, bm->cr.xmin, ypos, bm->cr.xmax, bm->cr.ymax); + + menu->lcd_blitBitmap(bm); + } + + /* Restore old cliprect */ + gfx_setClipRect(bm, + bm->cr.xmin, old_ymin, + bm->cr.xmax, bm->cr.ymax); + +#endif /* CONFIG_MENU_SMOOTH */ +} + + +/** + * Handle menu item selection + */ +static iptr_t menu_doselect(const struct Menu *menu, struct MenuItem *item) +{ + iptr_t result = 0; + + /* Exclude other items */ + int mask, i; + for (mask = item->flags & MIF_EXCLUDE_MASK, i = 0; mask; mask >>= 1, ++i) + { + if (mask & 1) + menu->items[i].flags &= ~MIF_CHECKED; + } + + if (item->flags & MIF_DISABLED) + return MENU_DISABLED; + + /* Handle checkable items */ + if (item->flags & MIF_TOGGLE) + item->flags ^= MIF_CHECKED; + else if (item->flags & MIF_CHECKIT) + item->flags |= MIF_CHECKED; + + /* Handle items with callback hooks */ + if (item->hook) + { + /* Push a jmp buffer to abort the operation with the STOP/CANCEL key */ + if (!PUSH_ABORT) + { + result = item->hook(item->userdata); + POP_ABORT; + } + } + else + result = item->userdata; + + return result; +} + + +/** + * Return the next visible item (rolls back to the first item) + */ +static int menu_next_visible_item(const struct Menu *menu, int index) +{ + int total = menu_count(menu); + int item_flags; + + do + { + if (++index >= total) + index = 0; + +#if CPU_HARVARD + if (menu->flags & MF_ROMITEMS) + { + ASSERT(sizeof(menu->items[index].flags) == sizeof(int)); + item_flags = pgm_read_int(&menu->items[index].flags); + } + else +#endif + item_flags = menu->items[index].flags; + } + while (item_flags & MIF_HIDDEN); + + return index; +} + + +/** + * Return the previous visible item (rolls back to the last item) + */ +static int menu_prev_visible_item(const struct Menu *menu, int index) +{ + int total = menu_count(menu); + int item_flags; + + do + { + if (--index < 0) + index = total - 1; + +#if CPU_HARVARD + if (menu->flags & MF_ROMITEMS) + { + ASSERT(sizeof(menu->items[index].flags) == sizeof(int)); + item_flags = pgm_read_int(&menu->items[index].flags); + } + else +#endif + item_flags = menu->items[index].flags; + } + while (item_flags & MIF_HIDDEN); + + return index; +} + + +/** + * Handle a menu and invoke hook functions for the selected menu items. + */ +iptr_t menu_handle(const struct Menu *menu) +{ + uint8_t items_per_page; + uint8_t first_item = 0; + uint8_t selected; + iptr_t result = 0; + bool redraw = true; + +#if (CONFIG_MENU_TIMEOUT != 0) + ticks_t now, menu_idle_time = timer_clock(); +#endif + +#if CONFIG_MENU_MENUBAR + struct MenuBar mb; + const_iptr_t labels[] = + { + (const_iptr_t)LABEL_BACK, + (const_iptr_t)LABEL_UPARROW, + (const_iptr_t)LABEL_DOWNARROW, + (const_iptr_t)0 + }; + + /* + * Initialize menu bar + */ + if (menu->flags & MF_TOPLEVEL) + labels[0] = (const_iptr_t)LABEL_EMPTY; + + mbar_init(&mb, menu->bitmap, labels, countof(labels)); +#endif /* CONFIG_MENU_MENUBAR */ + + + items_per_page = + (menu->bitmap->height / menu->bitmap->font->height - 1) +#if CONFIG_MENU_MENUBAR + - 1 /* menu bar labels */ +#endif + - (menu->title ? 1 : 0); + + /* Selected item should be a visible entry */ + //first_item = selected = menu_next_visible_item(menu, menu->selected - 1); + selected = menu->selected; + first_item = 0; + + for(;;) + { + keymask_t key; + + /* + * Keep selected item visible + */ + while (selected < first_item) + first_item = menu_prev_visible_item(menu, first_item); + while (selected >= first_item + items_per_page) + first_item = menu_next_visible_item(menu, first_item); + + menu_layout(menu, first_item, selected, redraw); + redraw = false; + + #if CONFIG_MENU_MENUBAR + menu_update_menubar(menu, &mb, selected); + #endif + + #if CONFIG_MENU_SMOOTH || (CONFIG_MENU_TIMEOUT != 0) + key = kbd_peek(); + cpu_relax(); + #else + key = kbd_get(); + #endif + + #if (CONFIG_MENU_TIMEOUT != 0) + /* Reset idle timer on key press. */ + now = timer_clock(); + if (key) + menu_idle_time = now; + #endif + + if (key & K_OK) + { + struct MenuItem *item = &(menu->items[selected]); +#if CPU_HARVARD + MenuItem ram_item; + if (menu->flags & MF_ROMITEMS) + { + memcpy_P(&ram_item, item, sizeof(ram_item)); + item = &ram_item; + } +#endif + result = menu_doselect(menu, item); + redraw = true; + + /* Return immediately */ + if (!(menu->flags & MF_STICKY)) + break; + + #if (CONFIG_MENU_TIMEOUT != 0) + /* Chain timeout */ + if ((result == MENU_TIMEOUT) && !(menu->flags & MF_TOPLEVEL)) + break; + + /* Reset timeout */ + menu_idle_time = timer_clock(); + #endif + } + else if (key & K_UP) + { + selected = menu_prev_visible_item(menu, selected); + redraw = true; + } + else if (key & K_DOWN) + { + selected = menu_next_visible_item(menu, selected); + redraw = true; + } + else if (!(menu->flags & MF_TOPLEVEL)) + { + if (key & K_CANCEL) + { + result = MENU_CANCEL; + break; + } + + #if CONFIG_MENU_TIMEOUT != 0 + if (now - menu_idle_time > ms_to_ticks(CONFIG_MENU_TIMEOUT)) + { + result = MENU_TIMEOUT; + break; + } + #endif + } + } + + /* Store currently selected item before leaving. */ + if (menu->flags & MF_SAVESEL) + #warning __FILTER_NEXT_WARNING__ + CONST_CAST(struct Menu *, menu)->selected = selected; + + return result; +} + + +/** + * Set flags on a menuitem. + * + * \param menu Menu owner of the item to change. + * \param idx Index of the menu item. + * \param flags Bit mask of the flags to set. + * + * \return Old flags. + */ +int menu_setFlags(struct Menu *menu, int idx, int flags) +{ + ASSERT(idx < menu_count(menu)); + ASSERT(!(menu->flags & MF_ROMITEMS)); + + int old = menu->items[idx].flags; + menu->items[idx].flags |= flags; + return old; +} + + +/** + * Clear flags on a menuitem. + * + * \param menu Menu owner of the item to change. + * \param idx Index of the menu item. + * \param flags Bit mask of the flags to clear. + * + * \return Old flags. + */ +int menu_clearFlags(struct Menu *menu, int idx, int flags) +{ + ASSERT(idx < menu_count(menu)); + ASSERT(!(menu->flags & MF_ROMITEMS)); + + int old = menu->items[idx].flags; + menu->items[idx].flags &= ~flags; + return old; +} diff --git a/bertos/gui/menu.h b/bertos/gui/menu.h new file mode 100644 index 0000000..b3ada46 --- /dev/null +++ b/bertos/gui/menu.h @@ -0,0 +1,135 @@ +/** + * \file + * + * + * \defgroup menu Menu handling module + * \ingroup gui + * \{ + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + * \brief Common menu handling API + * + * $WIZ$ module_name = "menu" + * $WIZ$ module_depends = "text", "gfx", "timer", "kbd" + */ + +#ifndef GUI_MENU_H +#define GUI_MENU_H + +#include + +#include + +/** Menu callback function */ +typedef iptr_t (*MenuHook)(iptr_t userdata); +typedef void (*BlitBitmap)(const Bitmap *bm); + +/** + * Menu item description. + */ +typedef struct MenuItem +{ + const_iptr_t label; /**< Item label (ID or ptr to string, 0 to disable) */ + int flags; /**< See MIF_#? definitions below */ + MenuHook hook; /**< Callback function (NULL to terminate item list) */ + iptr_t userdata; /**< User data to be passed back to the hook */ +} MenuItem; + +/** Render hook callback function prototype */ +typedef void (*RenderHook)(struct Bitmap *bitmap, int ypos, bool selected, const struct MenuItem *item); + +/** + * \name Flags for MenuItem.flags. + * \{ + */ +#define MIF_EXCLUDE_MASK 0x00FF /**< Mask for mutual exclusion map (shared with priority). */ +#define MIF_PRI_MASK 0x00FF /**< Mask for priority value (shared with mutual exclusion). */ +#define MIF_PRI(x) ((x) & MIF_PRI_MASK) /**< Set menu item priority. */ +#define MIF_EXCLUDE_0 BV(0) /**< Exclude item 0 when this item is checked */ +#define MIF_EXCLUDE_1 BV(1) /**< Exclude item 1 when this item is checked */ +#define MIF_EXCLUDE_2 BV(2) /**< Exclude item 2 when this item is checked */ +#define MIF_EXCLUDE_3 BV(3) /**< Exclude item 3 when this item is checked */ +#define MIF_EXCLUDE_4 BV(4) /**< Exclude item 4 when this item is checked */ +#define MIF_EXCLUDE_5 BV(5) /**< Exclude item 5 when this item is checked */ +#define MIF_EXCLUDE_6 BV(6) /**< Exclude item 6 when this item is checked */ +#define MIF_EXCLUDE_7 BV(7) /**< Exclude item 7 when this item is checked */ +#define MIF_CHECKED BV(8) /**< Item is currently checked */ +#define MIF_CHECKIT BV(9) /**< Automatically check this item when selected */ +#define MIF_TOGGLE BV(10) /**< Toggle MIF_CHECKED when item is selected */ +#define MIF_HIDDEN BV(11) /**< This menu item is not visible */ +#define MIF_DISABLED BV(12) /**< This menu item is not visible */ +#define MIF_RAMLABEL BV(13) /**< Item label is stored in RAM, not in program memory */ +#define MIF_RENDERHOOK BV(14) /**< Menu render function is passed in label field */ +/* \} */ + +/** + * Menu description. + */ +typedef struct Menu +{ + MenuItem *items; /**< Array of items (end with a NULL hook) */ + const_iptr_t title; /**< Menu title (ID or ptr to string, 0 to disable) */ + int flags; /**< See MF_#? definitions below */ + struct Bitmap *bitmap; /**< Bitmap where the menu is rendered */ + int selected; /**< Initial selection (written to if MF_SAVESEL is set). */ + BlitBitmap lcd_blitBitmap; /**< Callback to call to do smooth the display */ +} Menu; + +/** + * \name Flags for Menu.flags. + * \{ + */ +#define MF_STICKY BV(0) /**< Stay in the menu when the items called return */ +#define MF_TOPLEVEL BV(1) /**< Top-level menu (do not display "back" label) */ +#define MF_ROMITEMS BV(2) /**< Menu items are stored in ROM (default is RAM) */ +#define MF_SAVESEL BV(3) /**< Remember the selected item across invocations. */ +/* \} */ + +/** + * \name Special result codes for menu_handle(). + * \{ + */ +#define MENU_OK ((iptr_t)0) +#define MENU_CANCEL ((iptr_t)-1) +#define MENU_TIMEOUT ((iptr_t)-2) +#define MENU_ABORT ((iptr_t)-3) +#define MENU_DISABLED ((iptr_t)-4) +/* \} */ + +/* Function prototypes */ +iptr_t menu_handle(const struct Menu *menu); +int menu_setFlags(struct Menu *menu, int idx, int flags); +int menu_clearFlags(struct Menu *menu, int idx, int flags); + +/** \} */ //defgroup menu +#endif /* GUI_MENU_H */ diff --git a/bertos/gui/menubar.c b/bertos/gui/menubar.c new file mode 100644 index 0000000..81576bd --- /dev/null +++ b/bertos/gui/menubar.c @@ -0,0 +1,177 @@ +/** + * \file + * + * + * \brief Graphics Menu bar widget + * + * \author Stefano Fedrigo + * \author Francesco Sacchi + * + */ + +#include "menubar.h" + +#include +#include +#include +#include + +#warning FIXME:This module is obsolete, you must refactor it! + +#if 0 +#if CPU_AVR + #include /* strlen_P() */ +#else + #define strlen_P(s) strlen(s) + #define text_puts_P(s, b) text_puts(s, b) + #define pgm_read_uint16_t(addr) (*(addr)) +#endif + +#include /* strlen, memcpy */ + + +/** Predefined labels */ +static const pgm_char lab_1[] = ""; +static const pgm_char lab_2[] = "mute"; +static const pgm_char lab_3[] = "menu"; +static const pgm_char lab_4[] = "back"; +static const pgm_char lab_5[] = " ok "; +static const pgm_char lab_6[] = "Ch 1"; +static const pgm_char lab_7[] = "Ch 2"; +static const pgm_char lab_8[] = "C1+2"; +static const pgm_char lab_9[] = " "UP_ARROW" "; +static const pgm_char lab_10[] = " "DOWN_ARROW" "; +static const pgm_char lab_11[] = " - "; +static const pgm_char lab_12[] = " + "; +static const pgm_char lab_13[] = "sel "; +static const pgm_char lab_14[] = "lock"; +static const pgm_char lab_15[] = "unlock"; +static const pgm_char lab_16[] = "more"; +static const pgm_char lab_17[] = "edit"; +static const pgm_char lab_18[] = "fast"; +static const pgm_char lab_19[] = LEFT_ARROW" "; +static const pgm_char lab_20[] = " "RIGHT_ARROW; +static const pgm_char lab_21[] = "slow"; +static const pgm_char lab_22[] = "yes"; +static const pgm_char lab_23[] = "no"; + + +static const pgm_char * PROGMEM label_strings[LABEL_CNT] = { + lab_1, lab_2, lab_3, lab_4, lab_5, lab_6, lab_7, lab_8, lab_9, + lab_10, lab_11, lab_12, lab_13, lab_14, lab_15, lab_16, lab_17, + lab_18, lab_19, lab_20, lab_21, lab_22, lab_23 +}; + +/** + * Macro to access a label iptr_t: if a char pointer get the string pointed to + * in program memory, otherwise return the corrispondent predefined string + * (see label_strings in menubar.c) + */ +#define PTRLBL(x) ((unsigned int)(x) < 256 ? \ + (const pgm_char *)pgm_read_uint16_t(label_strings + (unsigned int)(x)) \ + : (const pgm_char *)(x)) + + +/** + * Initialize the MenuBar widget with the bitmap associated, + * the label names and the number of labels. + */ +void mbar_init( + struct MenuBar *mb, + struct Bitmap *bmp, + const_iptr_t labels[], + int num_labels) +{ + mb->bitmap = bmp; + mb->labels = labels; + mb->num_labels = num_labels; +} + + +/** + * Render the MenuBar on the bitmap. + */ +void mbar_draw(const struct MenuBar *mb) +{ + uint8_t oldstyle; + int i; + size_t maxlen = 0; /* Length of the longest label */ + coord_t x1, x2, y1, y2, label_padding; + + /* Maximum space available for a label */ + coord_t slot_width = mb->bitmap->width / mb->num_labels; + + /* Find longest label */ + for (i = 0; i < mb->num_labels; i++) + if (strlen_P(PTRLBL(mb->labels[i])) > maxlen) + maxlen = strlen_P(PTRLBL(mb->labels[i])); + + oldstyle = text_style(mb->bitmap, STYLEF_INVERT, STYLEF_MASK); + + /* y coords for menubar: bottom of the bitmap */ + y1 = mb->bitmap->height - FONT_HEIGHT; + y2 = mb->bitmap->height; + + /* Clear menubar area */ + gfx_rectClear(mb->bitmap, 0, y1, mb->bitmap->width, y2); + + for (i = 0; i < mb->num_labels; i++) + { + size_t lablen = strlen_P(PTRLBL(mb->labels[i])); + + /* Don't draw empty labels */ + if (mb->labels[i] == (const_iptr_t)LABEL_EMPTY) + continue; + + /* x coords: magic formula for equal distribution of the + * labels along bitmap + */ + label_padding = slot_width - (FONT_WIDTH * lablen + 2); + x1 = i * (slot_width + (label_padding / (mb->num_labels - 1))); + x2 = x1 + lablen * FONT_WIDTH + 1; + + /* Draw vertical line before. + * Uncomment +1 for "rounded" menubars */ + gfx_line(mb->bitmap, x1, y1 /* + 1 */, x1, y2); + + /* Draw text */ + text_setCoord(mb->bitmap, x1 + 1, y1); + text_puts_P(PTRLBL(mb->labels[i]), mb->bitmap); + + /* Draw vertical line after + * Uncomment +1 for "rounded" menubars */ + gfx_line(mb->bitmap, x2, y1 /* + 1 */, x2, y2); + } + + text_style(mb->bitmap, oldstyle, STYLEF_MASK); +} +#endif + diff --git a/bertos/gui/menubar.h b/bertos/gui/menubar.h new file mode 100644 index 0000000..a30dd46 --- /dev/null +++ b/bertos/gui/menubar.h @@ -0,0 +1,97 @@ +/** + * \file + * + * + * \brief Graphic menu bar widget. + * + * \author Stefano Fedrigo + * + */ + +#ifndef GUI_MENUBAR_H +#define GUI_MENUBAR_H + +#include + +/** Predefined labels ids */ +enum LabelId +{ + LABEL_EMPTY, /* empty label */ + LABEL_MUTE, + LABEL_MENU, + LABEL_BACK, + LABEL_OK, + LABEL_CH_1, + LABEL_CH_2, + LABEL_C1PLUS2, + LABEL_UPARROW, + LABEL_DOWNARROW, + LABEL_MINUS, + LABEL_PLUS, + LABEL_SEL, + LABEL_LOCK, + LABEL_UNLOCK, + LABEL_MORE, + LABEL_EDIT, + LABEL_FAST, + LABEL_PREV, + LABEL_NEXT, + LABEL_SLOW, + LABEL_YES, + LABEL_NO, + + + LABEL_CNT +}; + +#define UP_ARROW "\x18" +#define DOWN_ARROW "\x19" +#define RIGHT_ARROW "\xC4\x1A" +#define LEFT_ARROW "\x10\xC4" + +/* Forward decl */ +struct Bitmap; + +typedef struct MenuBar +{ + struct Bitmap *bitmap; + const_iptr_t *labels; + int num_labels; +} MenuBar; + +void mbar_init( + struct MenuBar *mb, + struct Bitmap *bmp, + const_iptr_t *labels, + int num_labels); +void mbar_draw(const struct MenuBar *mb); + +#endif /* GUI_MENUBAR_H */ diff --git a/bertos/hw/hw_afsk.h b/bertos/hw/hw_afsk.h new file mode 100644 index 0000000..eae0ef7 --- /dev/null +++ b/bertos/hw/hw_afsk.h @@ -0,0 +1,85 @@ +/** + * \file + * + * + * \brief AFSK modem hardware-specific definitions. + * + * \author Francesco Sacchi + */ + +#ifndef HW_AFSK_H +#define HW_AFSK_H + +#include "cfg/cfg_arch.h" + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Initialize the specified channel of the ADC for AFSK needs. + * The adc should be configured to have a continuos stream of convertions. + * For every convertion there must be an ISR that read the sample + * and call afsk_adc_isr(), passing the context and the sample. + * + * \param ch channel to be used for AFSK demodulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_adc_isr() for every convertion. + */ +#define AFSK_ADC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +#define AFSK_STROBE_INIT() do { /* Implement me */ } while (0) +#define AFSK_STROBE_ON() do { /* Implement me */ } while (0) +#define AFSK_STROBE_OFF() do { /* Implement me */ } while (0) + +/** + * Initialize the specified channel of the DAC for AFSK needs. + * The DAC has to be configured in order to call an ISR for every sample sent. + * The DAC doesn't have to start the IRQ immediatly but have to wait + * the AFSK driver to call AFSK_DAC_IRQ_START(). + * The ISR must then call afsk_dac_isr() passing the AFSK context. + * \param ch DAC channel to be used for AFSK modulation. + * \param ctx AFSK context (\see Afsk). This parameter must be saved and + * passed back to afsk_dac_isr() for every convertion. + */ +#define AFSK_DAC_INIT(ch, ctx) do { (void)ch, (void)ctx; } while (0) + +/** + * Start DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_START(ch) do { (void)ch; /* Implement me */ } while (0) + +/** + * Stop DAC convertions on channel \a ch. + * \param ch DAC channel. + */ +#define AFSK_DAC_IRQ_STOP(ch) do { (void)ch; /* Implement me */ } while (0) + +#endif /* HW_AFSK_H */ diff --git a/bertos/hw/hw_blanker.h b/bertos/hw/hw_blanker.h new file mode 100644 index 0000000..c8c1133 --- /dev/null +++ b/bertos/hw/hw_blanker.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware-specific definitions + * + * + * \author Daniele Basile + */ + +#ifndef HW_BALNCKER_H +#define HW_BALNCKER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BLK_LCDON /* power_LcdOn() Implement me! */ +#define BLK_LCDOFF /* power_LcdOff() Implement me! */ + + +#endif /* HW_BLANCKER_H */ + diff --git a/bertos/hw/hw_boot.h b/bertos/hw/hw_boot.h new file mode 100644 index 0000000..3423810 --- /dev/null +++ b/bertos/hw/hw_boot.h @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Bootloader hardware specific definition. + * + * \author Daniele Basile + */ + +#ifndef HW_BOOT_H +#define HW_BOOT_H + +/** + * Define bootloader flash size. + * + * Note: Remember that this size should be comply + * to size defined in linker script, otherwise you + * could not find the main program application. + */ +#define FLASH_BOOT_SIZE 0x8000 // 32kbyte + +#endif /* HW_BOOT_H */ diff --git a/bertos/hw/hw_buzzer.h b/bertos/hw/hw_buzzer.h new file mode 100644 index 0000000..d597478 --- /dev/null +++ b/bertos/hw/hw_buzzer.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Buzzer hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_BUZZER_H +#define HW_BUZZER_H + +#warning TODO:This is an example implementation, you must implement it! + +#define BUZZER_BIT 1 +#define IS_BUZZER_ON 0 +#define BUZZER_HW_INIT do { /* Implement me! */ } while (0) +#define BUZZER_ON do { /* Implement me! */ } while (0) +#define BUZZER_OFF do { /* Implement me! */ } while (0) + +#endif /* HW_BUZZER_H */ diff --git a/bertos/hw/hw_buzzerled.h b/bertos/hw/hw_buzzerled.h new file mode 100644 index 0000000..4399e0a --- /dev/null +++ b/bertos/hw/hw_buzzerled.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Buzzerled hardware-specific definitions + * + * + * \author Daniele Basile + */ + + +#ifndef HW_BUZZERLED_H +#define HW_BUZZERLED_H + +#warning TODO:This is an example implementation, you must implement it! + + +#endif /* HW_BUZZERLED_H */ diff --git a/bertos/hw/hw_cpufreq.h b/bertos/hw/hw_cpufreq.h new file mode 100644 index 0000000..7bbca4c --- /dev/null +++ b/bertos/hw/hw_cpufreq.h @@ -0,0 +1,63 @@ +/** + * \file + * + * + * \brief Hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_CPUFREQ_H +#define HW_CPUFREQ_H + +#ifndef CPU_FREQ + #warning CPU_FREQ is not defined, you should upgrade to the newer clock frequency defining method. + + /* + * This file is DEPRECATED, it will be removed in the next major release. + * We have set up a new cpu frequency definition method. + * The new macro CPU_FREQ should be defined as a compiler flag in the + * makefile instead of the old CLOCK_FREQ macro. With new projects you should only + * use the CPU_FREQ macro. + * + * With gcc you should add something like this: + * + * -D'CPU_FREQ=(12288000UL)' + * + * For backward compatibility the old method is still supported. + */ + #include "hw/hw_cpu.h" + + #define CPU_FREQ (CLOCK_FREQ) +#endif /* CPU_FREQ */ + +#endif /* HW_CPUFREQ_H */ diff --git a/bertos/hw/hw_dataflash.c b/bertos/hw/hw_dataflash.c new file mode 100644 index 0000000..1a758a8 --- /dev/null +++ b/bertos/hw/hw_dataflash.c @@ -0,0 +1,125 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines. + * + * \author Francesco Sacchi + */ + +#include "hw/hw_dataflash.h" + +#include +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +MOD_DEFINE(hw_dataflash); + +/** + * Data flash init function. + * + * This function provide to initialize all that + * needs to drive a dataflash memory. + * Generaly needs to init pins to drive a CS line + * and reset line. + */ +void dataflash_hw_init(void) +{ + + //Disable CS line (remove if not needed) + dataflash_hw_setCS(false); + + /* + * Put here your code! + * + * Note: + * - if you drive manualy CS line, here init a CS pin + * - if you use a dedicated reset line, here init a reset pin + */ + + MOD_INIT(hw_dataflash); +} + +/** + * Chip Select drive. + * + * This function enable or disable a CS line. + * You must implement this function comply to a dataflash + * memory datasheet to allow the drive to enable a memory + * when \p enable flag is true, and disable it when is false. + */ +void dataflash_hw_setCS(bool enable) +{ + if (enable) + { + /* + * Put here your code to enable + * dataflash memory + */ + } + else + { + /* + * Put here your code to disable + * dataflash memory + */ + } +} + +/** + * Reset data flash memory. + * + * This function provide to send reset signal to + * dataflash memory. You must impement it comly to a dataflash + * memory datasheet to allow the drive to set a reset pin + * when \p enable flag is true, and disable it when is false. + * + */ +void dataflash_hw_setReset(bool enable) +{ + if (enable) + { + /* + * Put here your code to set reset of + * dataflash memory + */ + } + else + { + /* + * Put here your code to clear reset of + * dataflash memory + */ + } +} + diff --git a/bertos/hw/hw_dataflash.h b/bertos/hw/hw_dataflash.h new file mode 100644 index 0000000..0ea2fc9 --- /dev/null +++ b/bertos/hw/hw_dataflash.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief Dataflash HW control routines (interface). + * + * \author Francesco Sacchi + */ + +#ifndef HW_DATAFLASH_H +#define HW_DATAFLASH_H + +#include + +void dataflash_hw_init(void); +void dataflash_hw_setCS(bool enable); +void dataflash_hw_setReset(bool enable); + +#endif /* HW_DATAFLASH_H */ diff --git a/bertos/hw/hw_dc_motor.h b/bertos/hw/hw_dc_motor.h new file mode 100644 index 0000000..f39388d --- /dev/null +++ b/bertos/hw/hw_dc_motor.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief DC motor hardware-specific definitions + * + * \author Daniele Basile + */ + +#ifndef HW_DC_MOTOR_H +#define HW_DC_MOTOR_H + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Define fuctions which read adc value from specific device + */ + #define HW_DC_MOTOR_READ_VALUE(dev, min, max) \ + ({ \ + /* Put here the fuction that read from ADC */ \ + (void)(dev); \ + (void)(min); \ + (void)(max); \ + (0); \ + }) + +// Macro that enable the select DC motor +#define DC_MOTOR_ENABLE(dev) /* Implement me! */ +// Macro that disable the select DC motor +#define DC_MOTOR_DISABLE(dev) /* Implement me! */ + +// Macro that left the DC motor rotor float +#define DC_MOTOR_STOP_FLOAT(dev) DC_MOTOR_DISABLE(dev) +// Macro that put in short circuit DC motor supply pins +#define DC_MOTOR_STOP_BRAKED(dev) do { /* Implement me! */ } while (0) + +// Macro that set motor direction +#define DC_MOTOR_SET_DIR(dev, dir) do { /* Implement me! */ } while (0) + +#define MOTOR_DC_INIT() do { /* Implement me! */ } while (0) + + +#endif /* HW_DC_MOTOR_H */ diff --git a/bertos/hw/hw_eth.c b/bertos/hw/hw_eth.c new file mode 100644 index 0000000..c24cbfb --- /dev/null +++ b/bertos/hw/hw_eth.c @@ -0,0 +1,40 @@ +/** + * \file + * + * + * \brief MAC address definition + * + * \author Luca Ottaviano + */ + +#include "hw/hw_eth.h" + +uint8_t mac_addr[] = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 }; diff --git a/bertos/hw/hw_eth.h b/bertos/hw/hw_eth.h new file mode 100644 index 0000000..71c2ac8 --- /dev/null +++ b/bertos/hw/hw_eth.h @@ -0,0 +1,44 @@ +/** + * \file + * + * + * \brief MAC address definition + * + * \author Luca Ottaviano + */ +#ifndef HW_ETH_H +#define HW_ETH_H + +#include + +extern uint8_t mac_addr[6]; + +#endif // HW_ETH_H diff --git a/bertos/hw/hw_ft245rl.h b/bertos/hw/hw_ft245rl.h new file mode 100644 index 0000000..e260020 --- /dev/null +++ b/bertos/hw/hw_ft245rl.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief FT245RL USB interface hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_FT245RL_H +#define HW_FT245RL_H + +#warning TODO:This is an example implementation, you must implement it! + +#define FT245RL_DATA_IN() /* Implement me! */ +#define FT245RL_DATA_OUT() /* Implement me! */ +#define WR_HI /* Implement me! */ +#define WR_LO /* Implement me! */ + +#define RD_HI /* Implement me! */ +#define RD_LO /* Implement me! */ + +#define FT245RL_INIT() \ +do \ +{ \ + /* Implement me! */ \ +} while(0) + +#define FT245RL_DATA_RDY() (/* Implement me! */ false) +#define FT245RL_GETDATA() ({/* Implement me! */ (0);}) +#define FT245RL_TX_ALLOWED() (/* Implement me! */ false) +#define FT245RL_SETDATA(data) do {/* Implement me! */ (void)((data)); } while(0) + +#endif /* HW_FT245RL_H */ + diff --git a/bertos/hw/hw_hx8347.h b/bertos/hw/hw_hx8347.h new file mode 100644 index 0000000..c3af134 --- /dev/null +++ b/bertos/hw/hw_hx8347.h @@ -0,0 +1,84 @@ +/** + * \file + * + * + * \brief HX8347 low-level hardware macros for Atmel SAM3X-EK board. + * + * The LCD controller is connected to the cpu static memory controller. + * LCD has 16 data lines and usual RS/WR/RD lines. The data lines + * are connected to the SMC data bus (D0-15), while the SCM address bus + * (A1 only) is used to drive the RS pin. WR/RD are connected to SMC's + * NWE and NRD respectively. + * + * \author Stefano Fedrigo + */ + +#ifndef HW_HX8347_H +#define HW_HX8347_H + +#warning TODO: This is an example implementation, you must implement it! + +/** + * Send a command to LCD controller. + */ +INLINE void hx8347_cmd(uint8_t cmd) +{ + /* Implement me */ + (void)cmd; +} + +/** + * Send data to LCD controller. + */ +INLINE void hx8347_write(uint16_t data) +{ + /* Implement me */ + (void)data; +} + +/** + * Read data from LCD controller. + */ +INLINE uint16_t hx8347_read(void) +{ + /* Implement me */ + return 0; +} + +/** + * Bus initialization: setup hardware where LCD is connected. + */ +INLINE void hx8347_busInit(void) +{ + /* Implement me */ +} + +#endif /* HW_HX8347_H */ diff --git a/bertos/hw/hw_i2c_bitbang.h b/bertos/hw/hw_i2c_bitbang.h new file mode 100644 index 0000000..6aabb46 --- /dev/null +++ b/bertos/hw/hw_i2c_bitbang.h @@ -0,0 +1,127 @@ +/** + * \file + * + * + * \brief Macro for I2C bitbang operation. + * + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_I2C_BITBANG_H +#define HW_I2C_BITBANG_H + +#warning TODO:This is an example implementation, you must implement it! + +#define SDA_HI do { /* Implement me:Set SDA High by setting SDA pin as input */ } while (0) +#define SDA_LO do { /* Implement me:Set SDA Low by setting SDA pin as open collector output */ } while (0) +#define SCL_HI do { /* Implement me:Set SCL High by setting SCL pin as input */ } while (0) +#define SCL_LO do { /* Implement me:Set SCL Low by setting SCL pin as open collector output */ } while (0) + + +#define SCL_IN (true) /* Implement me: read SDA pin state */ +#define SDA_IN (true) /* Implement me: read SCL pin state */ + +/** + * This macro should set SDA and SCL lines as input. + */ +#define I2C_BITBANG_HW_INIT do { /* Implement me! */ } while (0) + +/** + * Half bit delay routine used to generate the correct timings. + */ +#define I2C_HALFBIT_DELAY() do { /* Implement me! */ } while (0) + + +/* + * New api + */ +#include + +INLINE void i2c_sdaHi(int dev) +{ + (void)(dev); + /* Implement me:Set SDA High by setting SDA pin as input */ +} + +INLINE void i2c_sdaLo(int dev) +{ + (void)(dev); + /* Implement me:Set SDA Low by setting SDA pin as open collector output */ +} + +INLINE void i2c_sclHi(int dev) +{ + (void)(dev); + /* Implement me:Set SCL High by setting SCL pin as input */ +} + +INLINE void i2c_sclLo(int dev) +{ + (void)(dev); + /* Implement me:Set SCL Low by setting SCL pin as open collector output */ +} + +INLINE bool i2c_sdaIn(int dev) +{ + (void)(dev); + /* Implement me: read SDA pin state */ + return true; +} + +INLINE bool i2c_sclIn(int dev) +{ + (void)(dev); + /* Implement me: read SCL pin state */ + return true; +} + +/** + * Half bit delay routine used to generate the correct timings. + */ +INLINE void i2c_halfbitDelay(int dev) +{ + (void)(dev); + /* Implement me! */ +} + +/** + * This macro should set SDA and SCL lines as input. + */ +INLINE void i2c_bitbangInit(int dev) +{ + (void)(dev); + /* Implement me! */ +} + +#endif /* HW_I2C_BITBANG_H */ diff --git a/bertos/hw/hw_ili9225.h b/bertos/hw/hw_ili9225.h new file mode 100644 index 0000000..6cfcc97 --- /dev/null +++ b/bertos/hw/hw_ili9225.h @@ -0,0 +1,73 @@ +/** + * \file + * + * + * \brief SAM3N-EK: ILI9225B low-level hardware macros + * + * \author Stefano Fedrigo + */ + +#ifndef HW_ILI9225_H +#define HW_ILI9225_H + +#include "cfg/macros.h" /* BV() */ + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_CS_PIN 0 /* Implement me! */ +#define LCD_RESET_PIN 0 /* Implement me! */ +#define LCD_RS_PIN 0 /* Implement me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CS_HIGH() do { /* Implement me! */ } while (0) +#define LCD_CS_LOW() do { /* Implement me! */ } while (0) +#define LCD_RESET_HIGH() do { /* Implement me! */ } while (0) +#define LCD_RESET_LOW() do { /* Implement me! */ } while (0) +#define LCD_RS_HIGH() do { /* Implement me! */ } while (0) +#define LCD_RS_LOW() do { /* Implement me! */ } while (0) +/*@}*/ + +/** + * Setup hardware bus where LCD is connected. + */ +INLINE void lcd_ili9225_hw_bus_init(void) +{ + /* Implement me! */ +} + +#endif /* HW_ILI9225_H */ diff --git a/bertos/hw/hw_input.h b/bertos/hw/hw_input.h new file mode 100644 index 0000000..dbf3bc5 --- /dev/null +++ b/bertos/hw/hw_input.h @@ -0,0 +1,46 @@ +/** + * \file + * + * + * \brief Macro for HW_INPUT_H + * + * \author Andrea Grandi + */ + +#ifndef HW_INPUT_H +#define HW_INPUT_H + +#warning FIXME: This is an example implementation, you must implement it + +#define INPUT_INIT() do { /* implement me */} while(0) + +#endif /* HW_INPUT_H */ diff --git a/bertos/hw/hw_kbd.h b/bertos/hw/hw_kbd.h new file mode 100644 index 0000000..e78a1ce --- /dev/null +++ b/bertos/hw/hw_kbd.h @@ -0,0 +1,71 @@ +/** + * \file + * + * + * \brief Keyboard hardware-specific definitions + * + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_H +#define HW_KBD_H + +#include "hw/kbd_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define K_RPT_MASK (K_UP | K_DOWN | K_OK | K_CANCEL) + +#define KBD_HW_INIT \ + do { \ + /* Put here code to init hw */ \ + } while (0) + +EXTERN_C int emul_kbdReadCols(void); + +/** + * Read the keyboard ports and return the mask of + * depressed keys. + */ +INLINE keymask_t kbd_readkeys(void) +{ + /* Implement me! */ + + //Only for test remove when implement this function + return 0; +} + +#endif /* HW_KBD_H */ diff --git a/bertos/hw/hw_lcd.h b/bertos/hw/hw_lcd.h new file mode 100644 index 0000000..e6657dd --- /dev/null +++ b/bertos/hw/hw_lcd.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Atmel SAM3N-EK testcase + * + * \author Luca Ottaviano + * \author Daniele Basile + */ + +#ifndef HW_LCD_H +#define HW_LCD_H + +#warning FIXME: This is an example implementation, you must implement it + +#include + +#include +#include + +#define LCD_BACKLIGHT_MAX // Max backlight level +#define LCD_BACKLIGHT_PIN // Port C +#define LCD_SPICLOCK // Minimum cycle len = 80 ns according specs + + +#define LCD_BACKLIGHT_LEVEL_UP() do { /* Implement me! */ } while(0) + + +INLINE void lcd_setBacklight(uint8_t level) +{ + (void)level; + /* Implement me! */ +} + +#define LCD_BACKLIGHT_INIT() do { /* Implement me! */ } while(0) + +#endif /* HW_LCD_H */ diff --git a/bertos/hw/hw_lcd_32122a.h b/bertos/hw/hw_lcd_32122a.h new file mode 100644 index 0000000..6ec29c5 --- /dev/null +++ b/bertos/hw/hw_lcd_32122a.h @@ -0,0 +1,155 @@ +/** + * \file + * + * + * \brief Displaytech 32122A LCD driver + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_32122A_H +#define HW_LCD_32122A_H + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * Predefined LCD PWM contrast values + */ +#define LCD_DEF_PWM 145 +#define LCD_MAX_PWM 505 +#define LCD_MIN_PWM 130 +#define LCD_PWM_CH 0 + + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_PE_E1 /* Implement me! */ +#define LCD_PE_E2 /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +#define LCD_PF_DB0 /* Implment me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_A0 do { /* Implement me! */ } while (0) +#define LCD_SET_A0 do { /* Implement me! */ } while (0) +#define LCD_CLR_RD do { /* Implement me! */ } while (0) +#define LCD_SET_RD do { /* Implement me! */ } while (0) +#define LCD_CLR_E1 do { /* Implement me! */ } while (0) +#define LCD_SET_E1 do { /* Implement me! */ } while (0) +#define LCD_CLR_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E2 do { /* Implement me! */ } while (0) +#define LCD_SET_E(x) do { (void)x; /* Implement me! */ } while (0) +#define LCD_CLR_E(x) do { (void)x; /* Implement me! */ } while (0) +/*@}*/ + +/** + * \name Chip select bits for LCD_SET_E() + * @{ + */ +#define LCDF_E1 ( 0/* Implement me! */) +#define LCDF_E2 ( 0/* Implement me! */) +/*@}*/ +/** Read from the LCD data bus (DB[0-7]) */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/** Write to the LCD data bus (DB[0-7]) */ +#define LCD_READ (0 /* Implement me! */ ) + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ + +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + +#define LCD_32122_RESET() do { /* Implement me! */ } while (0) + +INLINE void lcd_32122a_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_32122A_H */ + diff --git a/bertos/hw/hw_lcd_hd44.h b/bertos/hw/hw_lcd_hd44.h new file mode 100644 index 0000000..dfebbca --- /dev/null +++ b/bertos/hw/hw_lcd_hd44.h @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief LCD low-level hardware macros + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * + */ + +#ifndef HW_LCD_HD44_H +#define HW_LCD_HD44_H + +#include "cfg/cfg_lcd_hd44.h" /* CONFIG_LCD_4BIT */ + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +/** + * \name LCD I/O pins/ports + * @{ + */ +#define LCD_RS /* Implement me! */ +#define LCD_RW /* Implement me! */ +#define LCD_E /* Implement me! */ +#define LCD_DB0 /* Implement me! */ +#define LCD_DB1 /* Implement me! */ +#define LCD_DB2 /* Implement me! */ +#define LCD_DB3 /* Implement me! */ +#define LCD_DB4 /* Implement me! */ +#define LCD_DB5 /* Implement me! */ +#define LCD_DB6 /* Implement me! */ +#define LCD_DB7 /* Implement me! */ +/*@}*/ + +/** + * \name DB high nibble (DB[4-7]) + * @{ + */ + +#if CONFIG_LCD_4BIT + #define LCD_MASK (LCD_DB7 | LCD_DB6 | LCD_DB5 | LCD_DB4) + #define LCD_SHIFT 4 +#else + #define LCD_MASK (uint8_t)0xff + #define LCD_SHIFT 0 +#endif +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +#define LCD_CLR_RS /* Implement me! */ +#define LCD_SET_RS /* Implement me! */ +#define LCD_CLR_RD /* Implement me! */ +#define LCD_SET_RD /* Implement me! */ +#define LCD_CLR_E /* Implement me! */ +#define LCD_SET_E /* Implement me! */ + +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +#if CONFIG_LCD_4BIT + #define LCD_WRITE_H(x) ((void)x)/* Implement me! */ + #define LCD_WRITE_L(x) ((void)x)/* Implement me! */ + #define LCD_READ_H ( 0 /* Implement me! */ ) + #define LCD_READ_L ( 0 /* Implement me! */ ) +#else + #define LCD_WRITE(x) ((void)x)/* Implement me! */ + #define LCD_READ (0 /* Implement me! */ ) +#endif +/*@}*/ + +/** Set data bus direction to output (write to display) */ +#define LCD_DB_OUT /* Implement me! */ + +/** Set data bus direction to input (read from display) */ +#define LCD_DB_IN /* Implement me! */ +/** Delay for write (Enable pulse width, 220ns) */ +#define LCD_DELAY_WRITE \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + +/** Delay for read (Data ouput delay time, 120ns) */ +#define LCD_DELAY_READ \ + do { \ + NOP; \ + NOP; \ + NOP; \ + NOP; \ + } while (0) + + + +INLINE void lcd_hd44_hw_bus_init(void) +{ + cpu_flags_t flags; + IRQ_SAVE_DISABLE(flags); + + /* + * Here set bus pin! + * to init a lcd device. + * + */ + + /* + * Data bus is in output state most of the time: + * LCD r/w functions assume it is left in output state + */ + LCD_DB_OUT; + + + IRQ_RESTORE(flags); +} + +#endif /* HW_LCD_HD44_H */ diff --git a/bertos/hw/hw_led.h b/bertos/hw/hw_led.h new file mode 100644 index 0000000..615b071 --- /dev/null +++ b/bertos/hw/hw_led.h @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Led on/off macros. + * + * \author Daniele Basile + */ + +#ifndef HW_LED_H +#define HW_LED_H + +#warning FIXME: This is an example implementation, you must implement it + +#define LED_ON() do { /* implement me */} while(0) +#define LED_OFF() do { /* implement me */} while(0) + +#define LED_INIT() do { /* implement me */} while(0) + +#endif /* HW_LED_H */ diff --git a/bertos/hw/hw_led_7seg.h b/bertos/hw/hw_led_7seg.h new file mode 100644 index 0000000..56fa0bf --- /dev/null +++ b/bertos/hw/hw_led_7seg.h @@ -0,0 +1,233 @@ +/** + * \file hw_led_7seg.h + * + * + * \brief led 7 segment display low-level + * + * This file has the functions that must be + * implemented to drive the 7 segments display by your + * hardware + * + * \author Fabio Bizzi + * + * Example implementation for AtMEGA 1280 + * (Arduino MEGA) with a 4 digit display. + * We use PORTA to connect the 8 pins of + * the 7 segments display and 4 bit of + * PORTC to select which digit of the + * display we have to write on. + * + * \code + * 7 Seg LED Pin + * ---------------- + * LED SEGMENT + * ---------------- + * DP G F E D C B A + * 7 6 5 4 3 2 1 0 + * ---------------- + * PORT A Pin + * ---------------- + * + * 7 Seg Display Selection + * ---------------- + * Display Nr. + * ---------------- + * N N N N 3 2 1 0 + * 7 6 5 4 3 2 1 0 + * ---------------- + * PORT C Pin + * ---------------- + * \endcode + * + * The implementation of the sseg_on procedure that set the PROPER PIN of PORT C + * to enable the requested digit of the display, after write the encoded character + * to PORT A + * + * \code + * + * INLINE void sseg_on(uint8_t dgt, uint8_t n_dgt) + * { + * switch (n_dgt) + * { + * //Common Cathode + * #ifdef CONFIG_LED_7SEG_CCAT + * + * case 0: + * PORTC &= ~(BV(PORTC1) | BV(PORTC2) | BV(PORTC3)); + * PORTC |= BV(PORTC0); + * break; + * case 1: + * PORTC &= ~(BV(PORTC0) | BV(PORTC2) | BV(PORTC3)); + * PORTC |= BV(PORTC1); + * break; + * case 2: + * PORTC &= ~(BV(PORTC0) | BV(PORTC1) | BV(PORTC3)); + * PORTC |= BV(PORTC2); + * break; + * case 3: + * PORTC &= ~(BV(PORTC0) | BV(PORTC1) | BV(PORTC2)); + * PORTC |= BV(PORTC3); + * break; + * + * //Common Anode + * #else + * + * case 0: + * PORTC |= (BV(PORTC1) | BV(PORTC2) | BV(PORTC3)); + * PORTC &= ~(BV(PORTC0)); + * break; + * case 1: + * PORTC |= (BV(PORTC0) | BV(PORTC2) | BV(PORTC3)); + * PORTC &= ~(BV(PORTC1)); + * break; + * case 2: + * PORTC |= (BV(PORTC0) | BV(PORTC1) | BV(PORTC3)); + * PORTC &= ~(BV(PORTC2)); + * break; + * case 3: + * PORTC |= (BV(PORTC0) | BV(PORTC1) | BV(PORTC2)); + * PORTC &= ~(BV(PORTC3)); + * break; + * + * #endif + * + * } + * //Write the charater + * PORTA = dgt; + * } + * + * \endcode + * + * The implementation of the sseg_init procedure that set the DIRECTION of PORT C + * and PORT A to output + * + * \code + * + * INLINE void sseg_init(void) + * { + * //Initialize PIN Direction to OUTPUT + * DDRA = 0xFF; + * DDRC |= (BV(DDC0) | BV(DDC1) | BV(DDC2) | BV(DDC3)); + * //Set the display OFF + * SSEG_OFF(); + * } + * + * \endcode + * + * The implementation of the sseg_off procedure that set the reset PORT A + * to clean the display and turn off all the pin of PORT C that drive the + * display's digits + * + * \code + * + * INLINE void sseg_off(void) + * { + * //Set the display OFF + * //Common Cathode + * #ifdef CONFIG_LED_7SEG_CCAT + * PORTA = 0x00; + * PORTC &= ~(BV(PORTC0) | BV(PORTC1) | BV(PORTC2) | BV(PORTC3)); + * //Common Anode + * #else + * PORTA = 0xFF; + * PORTC |= (BV(PORTC0) | BV(PORTC1) | BV(PORTC2) | BV(PORTC3)); + * #endif + * + * } + * + * \endcode + * + */ + +#ifndef HW_LED_7SEG_H +#define HW_LED_7SEG_H + +#include "cfg/cfg_led_7seg.h" + +/* + * INLINE HW Functions + */ + +/** + * \brief Clean the display + * + * This is the procedure that clean the display in HW mode. + * you have to write it according with your hardware and micro. + */ +INLINE void sseg_off(void) +{ +/* Set the display OFF */ +#ifdef CONFIG_LED_7SEG_CCAT +/* You have to implment it */ +/* Common Cathode */ +#else +/* You have to implment it */ +/* Common Anode */ +#endif +} + +/** + * \brief writes the character to the single digit of the display + * + * This is the procedure that writes the character to the single digit + * of the display, you have to write it according with your hardware and micro. + * + * \param dgt the character that has to be displayed + * \param n_dgt the digit where to disply the character of the display's digits. + */ +INLINE void sseg_on(uint8_t dgt, uint8_t n_dgt) +{ + (void) dgt; + (void) n_dgt; +#ifdef CONFIG_LED_7SEG_CCAT +/* Common Cathode */ +/* You have to implment it */ +#else +/* Common Anode */ +/* You have to implment it */ +#endif +} + +/** + * \brief initalize the HW regsiters + * + * This is the procedure that initalize the HW regsiters. + * you have to write it according with your hardware and micro. + */ +INLINE void sseg_init(void) +{ + /* Initialize PIN Direction to OUTPUT*/ + /* You have to implment it */ + /* Set the display OFF */ + sseg_off(); +} + +#endif /* HW_LED_7SEG_H */ + diff --git a/bertos/hw/hw_lm75.h b/bertos/hw/hw_lm75.h new file mode 100644 index 0000000..290dae0 --- /dev/null +++ b/bertos/hw/hw_lm75.h @@ -0,0 +1,49 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_LM75_H +#define HW_LM75_H + +#warning TODO:This is an example implentation, you must implement it! + +#define LM75_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_LM75_H */ + diff --git a/bertos/hw/hw_mcp41.c b/bertos/hw/hw_mcp41.c new file mode 100644 index 0000000..512b19a --- /dev/null +++ b/bertos/hw/hw_mcp41.c @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \author Francesco Sacchi + */ + +#include "hw/hw_mcp41.h" + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +const uint16_t mcp41_ports[MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; +const uint8_t mcp41_pins [MCP41_CNT] = +{ + 0, /* add here mcp41 ports */ +}; + diff --git a/bertos/hw/hw_mcp41.h b/bertos/hw/hw_mcp41.h new file mode 100644 index 0000000..b31a7dd --- /dev/null +++ b/bertos/hw/hw_mcp41.h @@ -0,0 +1,74 @@ +/** + * \file + * + * + * \brief MCP41 hardware-specific definitions + * + * \author Francesco Sacchi + */ + +#ifndef HW_MCP41_H +#define HW_MCP41_H + +#include "hw/mcp41_map.h" + +#include + + +#warning TODO:This is an example implementation, you must implement it! + + +INLINE void SET_MCP41_DDR(Mcp41Dev dev) +{ + /* Implement me! */ + //Warning: this funtions is like avr target name, + //fix it to comply for all target. + + //Only for test remove when implement this function + (void)dev; +} + +INLINE void MCP41_ON(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void MCP41_OFF(Mcp41Dev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +#endif /* HW_MCP41_H */ diff --git a/bertos/hw/hw_ntc.c b/bertos/hw/hw_ntc.c new file mode 100644 index 0000000..2509239 --- /dev/null +++ b/bertos/hw/hw_ntc.c @@ -0,0 +1,45 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \author Lorenzo Berni + * + */ + +#include +#include "hw/ntc_map.h" + +const res_t NTC_RSER[NTC_CNT]; +const res_t NTC_RPAR[NTC_CNT]; +const amp_t NTC_AMP[NTC_CNT]; +const NtcHwInfo* NTC_INFO[NTC_CNT]; diff --git a/bertos/hw/hw_ntc.h b/bertos/hw/hw_ntc.h new file mode 100644 index 0000000..0f6743a --- /dev/null +++ b/bertos/hw/hw_ntc.h @@ -0,0 +1,135 @@ +/** + * \file + * + * + * \brief NTC hardware-specific definition + * + * \author Francesco Sacchi + * + * A NTC acts as a variable resistor, whose resistance changes as a + * function of the temperature it measures. To sample it correctly, it is + * usually parallelized and serialized with two fixed resistor. The following diagram shows + * what is the exact disposition of the components, as handled by this + * library: + * + *
+ *                 o Vref
+ *                 |
+ *                 |                               o Vref
+ *                 |                               |
+ *               -----                             |
+ *              |     |                        ---------
+ *              | Rser|                       |         |
+ *              |     |                       |         |
+ *               -----     -----              |   ADC   |
+ *                 | Vp   |     |             |         |
+ *      -----------|------| Amp |-------------|         |
+ *     |           |      |     |      Vadc   |         |
+ *   -----       -----     -----               ---------
+ *  |     |     |     |
+ *  | NTC |     | Rpar|
+ *  |     |     |     |
+ *   -----       -----
+ *     |           |
+ *     |           |
+ *   -----       -----
+ *    ---         ---
+ *
+ * Amp is an amplifier that amplify of AMP times the signal. + * If we indicate Rp as the parallel of NTC with Rpar, ADCBITS as the bits of the ad converter + * and ADCVAL as the result from the adc convertion (Not Vadc but just the value read + * from the adc register), after various calculation, the expression of Rp is: + * + *
+ *
+ *            ADCVAL * Rser
+ * Rp = ------------------------
+ *         ADCBITS
+ *	2         * AMP - ADCVAL
+ *
+ * + * And after that NTC obvisiously is: + *
+ *        Rpar * Rp
+ * NTC = ----------
+ *        Rpar - Rp
+ *
+ * + * + * The function ntc_hw_read() compute the resistence using these formulas above. + */ + +#ifndef HW_NTC_H +#define HW_NTC_H + +#include "ntc_map.h" + +#include + +#include +#include + +#warning TODO:This is an example implementation, you must implement it! + +extern const res_t NTC_RSER[NTC_CNT]; +extern const res_t NTC_RPAR[NTC_CNT]; +extern const amp_t NTC_AMP[NTC_CNT]; +extern const NtcHwInfo* NTC_INFO[NTC_CNT]; + + +/*! + * Read the resistence of ntc device \a dev. + * Return the result in res_t type. + */ +INLINE res_t ntc_hw_read(NtcDev dev) +{ + ASSERT(dev < NTC_CNT); + // See above for formula explanation. + adcread_t adcval = adc_read((uint16_t)dev); + float rp = (adcval * NTC_RSER[dev] ) / ((1 << adc_bits()) * NTC_AMP[dev] - adcval); + + //kprintf("Rp[%f], Rntc[%f]\n", rp/100, ((NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp)) / 100.0); + + return ( (NTC_RPAR[dev] * rp) / (NTC_RPAR[dev] - rp) ); +} + + +/*! + * Return the info (aka the table) associated with ntc device \a dev. + */ +INLINE const NtcHwInfo* ntc_hw_getInfo(NtcDev dev) +{ + return NTC_INFO[dev]; +} + +#define NTC_HW_INIT do { /* Implement me! */ } while(0) + +#endif /* HW_NTC_H */ diff --git a/bertos/hw/hw_phase.c b/bertos/hw/hw_phase.c new file mode 100644 index 0000000..cd50242 --- /dev/null +++ b/bertos/hw/hw_phase.c @@ -0,0 +1,45 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/hw_phase.h" + +#warning TODO:This is an example implementation, you must implement it! + +#endif /* HW_PHASE_H */ diff --git a/bertos/hw/hw_phase.h b/bertos/hw/hw_phase.h new file mode 100644 index 0000000..7cae67c --- /dev/null +++ b/bertos/hw/hw_phase.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Phase control hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_PHASE_H +#define HW_PHASE_H + +#include "hw/phase_map.h" + +#include + +#warning TODO:This is an example implementation, you must implement it! + +#define PHASE_HW_INIT do { /* Implement me! */ }while (0) + +INLINE void TRIAC_OFF(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + + +INLINE void TRIAC_ON(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +INLINE void SET_TRIAC_DDR(TriacDev i) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)i; +} + +void zerocross_isr(void); +#define DEFINE_ZEROCROSS_ISR() void zerocross_isr(void) + + +#endif /* HW_PHASE_H */ diff --git a/bertos/hw/hw_rit128x96.h b/bertos/hw/hw_rit128x96.h new file mode 100644 index 0000000..c24d1a8 --- /dev/null +++ b/bertos/hw/hw_rit128x96.h @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief LM3S1986: OLED-RIT-128x96 (P14201) low-level hardware macros + * + * \author Andrea Righi + */ + +#ifndef HW_RIT128x96_H +#define HW_RIT128x96_H + +#include "cfg/macros.h" /* BV() */ +#include "cfg/debug.h" + +#include +#include +#include + +/** + * \name LCD I/O pins/ports + * @{ + */ +/* OLED Data/Command control pin */ +#define GPIO_OLEDDC_PIN 0 /* Implement me! */ + +/* OLED enable pin */ +#define GPIO_OLEDEN_PIN 0 /* Implement me! */ +/*@}*/ + +/** + * \name LCD bus control macros + * @{ + */ +/* Enter command mode */ +#define LCD_SET_COMMAND() /* Implement me! */ + +/* Enter data mode */ +#define LCD_SET_DATA() /* Implement me! */ + +/* Send data to the display */ +#define LCD_WRITE(x) ((void)x)/* Implement me! */ +/*@}*/ + +INLINE void lcd_rit128x96_hw_bus_init(void) +{ + /* Implement me! */ +} + +#endif /* HW_RIT128x96_H */ diff --git a/bertos/hw/hw_sd.h b/bertos/hw/hw_sd.h new file mode 100644 index 0000000..ed10b80 --- /dev/null +++ b/bertos/hw/hw_sd.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief SD driver hardware-specific definitions. + * + * + * \author Luca Ottaviano + */ + +#ifndef HW_SD_H +#define HW_SD_H + +#warning FIXME: This is an example implementation, you must implement it + +#define SD_CS_INIT() do { /* implement me */} while(0) +#define SD_CS_ON() do { /* implement me */} while(0) +#define SD_CS_OFF() do { /* implement me */} while(0) + +#define SD_PIN_INIT() do { /* implement me */} while(0) +#define SD_CARD_PRESENT() true /* implement me */ +#define SD_WRITE_PROTECT() false /* implement me */ + +#endif /* HW_SD_H */ diff --git a/bertos/hw/hw_sensor.h b/bertos/hw/hw_sensor.h new file mode 100644 index 0000000..9913ff9 --- /dev/null +++ b/bertos/hw/hw_sensor.h @@ -0,0 +1,92 @@ +/** + * \file + * + * + * \brief Sensor hardware-specific definitions + * + * + * \author Daniele Basile + */ + +#ifndef HW_SENSOR_H +#define HW_SENSOR_H + +#warning TODO:This is an example implementation, you must implement it! + +#define NUM_HOME_SENSORS 1 + + +INLINE bool hw_home_sensor_read(int sensor) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + return 0; +} + +INLINE void hw_home_sensor_set_inverted(int sensor, bool inverted) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + (void)inverted; +} + +INLINE bool hw_level_sensor_read(int sensor) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + return 0; +} + +INLINE void hw_level_sensor_set_inverted(int sensor, bool inverted) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + (void)inverted; +} + +INLINE bool bld_hw_sensor_read(int sensor) +{ + /* Implement me! */ + + //Only for test remove when implement this function + (void)sensor; + return 0; +} + +#endif /* HW_SENSOR_H */ diff --git a/bertos/hw/hw_ser.h b/bertos/hw/hw_ser.h new file mode 100644 index 0000000..2033c98 --- /dev/null +++ b/bertos/hw/hw_ser.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Serial hardware-specific definitions + * + * + * \author Daniele Basile + */ + +#ifndef HW_SER_H +#define HW_SER_H + +#include "cfg/cfg_ser.h" + +#if CONFIG_SER_STROBE + #warning FIXME: this is an example implementation, you must implement it + + #define SER_STROBE_INIT do { /* implement me */ } while (0) + #define SER_STROBE_ON do { /* implement me */ } while (0) + #define SER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_SER_H */ diff --git a/bertos/hw/hw_sipo.h b/bertos/hw/hw_sipo.h new file mode 100644 index 0000000..552d4dd --- /dev/null +++ b/bertos/hw/hw_sipo.h @@ -0,0 +1,108 @@ +/** + * \file + * + * + * \brief Macro for HW_SIPO_H + * + * + * + * \author Andrea Grandi + * \author Daniele Basile + */ + +#ifndef HW_SIPO_H +#define HW_SIPO_H + +/** + * Map sipo connection on board. + */ +typedef enum SipoMap +{ + SIPO_CNT +} SipoMap; + +/** + * Define generic macro to set pins logic level + */ +#define SIPO_SET_LEVEL_LOW(dev) do { /* Implement me! */ } while (0) +#define SIPO_SET_LEVEL_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Generate one low pulse on select line. + */ +#define PULSE_LOW(dev) do { /* Implement me! */ } while (0) + +/** + * Generate one hight pulse on select line. + */ +#define PULSE_HIGH(dev) do { /* Implement me! */ } while (0) + + +/** + * Define the procedure to drive serial input in sipo device (SI). + */ +#define SIPO_SI_HIGH() do { /* Implement me! */ } while (0) +#define SIPO_SI_LOW() do { /* Implement me! */ } while (0) + +/** + * Drive clock to shift SI data into latch. + */ +#define SIPO_SI_CLOCK(clk_pol) \ + do { \ + (void)clk_pol; \ + /* Implement me! */ \ + } while (0) + +/** + * Do everything needed in order to load dato into sipo. + */ +#define SIPO_LOAD(device, load_pol) do { /* Implement me! */ } while (0) + +/** + * Enable the shift register output. + */ +#define SIPO_ENABLE() do { /* Implement me! */ } while (0) + +/** + * Set polarity for Load, Clk, SI signals. + */ +#define SIPO_SET_LD_LEVEL(device, load_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_CLK_LEVEL(clock_pol) do { /* Implement me! */ } while (0) +#define SIPO_SET_SI_LEVEL() do { /* Implement me! */ } while (0) + +/** + * Do anything that needed to init sipo pins. + */ +#define SIPO_INIT_PIN() do { /* Implement me! */ } while (0) + +#endif /* HW_SIPO_H */ diff --git a/bertos/hw/hw_spi.h b/bertos/hw/hw_spi.h new file mode 100644 index 0000000..991b86a --- /dev/null +++ b/bertos/hw/hw_spi.h @@ -0,0 +1,114 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * + * \author Daniele Basile + */ + +#ifndef HW_SPI_H +#define HW_SPI_H + +#warning TODO:This is an example implentation, you must implement it! + +#include + +/** + * SPI pin definition. + * + * \note CS is assert when level + * is low. + * + * \{ + */ +#define CS /* pin */ ///Connect to CS pin of Flash memory. +#define SCK /* pin */ ///Connect to SCK pin of Flash memory. +#define MOSI /* pin */ ///Connect to SI pin of Flash memory. +#define MISO /* pin */ ///Connect to SO pin of Flash memory. +#define SPI_PORT /* pin */ ///Micro pin PORT register. +#define SPI_PIN /* pin */ ///Micro pin PIN register. +#define SPI_DDR /* pin */ ///Micro pin DDR register. +/*\}*/ + +/** + * Pin logic level. + * + * \{ + */ +#define MOSI_LOW() do { /* Implement me! */ } while(0) +#define MOSI_HIGH() do { /* Implement me! */ } while(0) +#define MISO_HIGH() do { /* Implement me! */ } while(0) +#define SCK_LOW() do { /* Implement me! */ } while(0) +#define SCK_HIGH() do { /* Implement me! */ } while(0) +#define CS_LOW() do { /* Implement me! */ } while(0) +#define CS_HIGH() do { /* Implement me! */ } while(0) +/*\}*/ + +/** + * SPI pin commands. + * + * \{ + */ +#define CS_ENABLE() CS_LOW() +#define CS_DISABLE() CS_HIGH() +#define SS_ACTIVE() CS_LOW() +#define SS_INACTIVE() CS_HIGH() +#define SCK_INACTIVE() SCK_LOW() +#define SCK_ACTIVE() SCK_HIGH() +#define CS_OUT() do { /* Implement me! */ } while(0) +#define MOSI_IN() do { /* Implement me! */ } while(0) +#define MOSI_OUT() do { /* Implement me! */ } while(0) +#define IS_MISO_HIGH() (false /* Implement me! */ ) +#define MISO_IN() do { /* Implement me! */ } while(0) +#define MISO_OUT() do { /* Implement me! */ } while(0) +#define SCK_OUT() do { /* Implement me! */ } while(0) + +#define SCK_PULSE()\ + do {\ + SCK_HIGH();\ + SCK_LOW();\ + } while (0) +/*\}*/ + + +#define SPI_HW_INIT() \ + CS_DISABLE();\ + MOSI_LOW();\ + SCK_LOW();\ + MISO_IN();\ + MOSI_OUT();\ + SCK_OUT();\ + CS_OUT(); + +#endif /* HW_SPI_H */ + diff --git a/bertos/hw/hw_spi_dma.h b/bertos/hw/hw_spi_dma.h new file mode 100644 index 0000000..3d68f65 --- /dev/null +++ b/bertos/hw/hw_spi_dma.h @@ -0,0 +1,47 @@ +/** + * \file + * + * + * \brief SPI DMA driver hardware-specific definitions. + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_SPI_DMA_H +#define HW_SPI_DMA_H + +#define SPI_DMA_STROBE_INIT() do {/*PIOA_PER = BV(13); PIOA_OER = BV(13);*/} while(0) + +#define SPI_DMA_STROBE_ON() do {/*PIOA_CODR = BV(13);*/} while(0) +#define SPI_DMA_STROBE_OFF() do {/*PIOA_SODR = BV(13);*/} while(0) + +#endif /* HW_SPI_DMA_H */ diff --git a/bertos/hw/hw_stepper.h b/bertos/hw/hw_stepper.h new file mode 100644 index 0000000..b97bacb --- /dev/null +++ b/bertos/hw/hw_stepper.h @@ -0,0 +1,308 @@ +/** + * \file + * + * + * \brief Stepper hardware-specific definitions + * + * + * \author Daniele Basile + */ + + +#ifndef HW_STEPPER_H +#define HW_STEPPER_H + +#include + +#include + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define STEPPER_STROBE_INIT \ +do { \ + /* put init code for strobe */ \ +} while (0) + + +#define STEPPER_STROBE_ON do { /* Implement me! */ } while(0) +#define STEPPER_STROBE_OFF do { /* Implement me! */ } while(0) + +/** + * CPU clock frequency is divided by 2^STEPPER_PRESCALER_LOG2 to + * obtain stepper clock. + */ +#define STEPPER_PRESCALER_LOG2 1 + +/** + * Stepper timer clock frequency. + */ +#define STEPPER_CLOCK ((CPU_FREQ) >> STEPPER_PRESCALER_LOG2) + +/** + * us delay to reset a stepper motor. + * This is the time neccessary to reset + * the stepper controll chip. (see datasheet for more detail). + */ +#define STEPPER_RESET_DELAY 1 + +/* + * Pins define for each stepper + */ +#define STEPPER_1_CW_CCW_PIN 0 +#define STEPPER_1_HALF_FULL_PIN 0 +#define STEPPER_1_CONTROL_PIN 0 +#define STEPPER_1_ENABLE_PIN 0 +#define STEPPER_1_RESET_PIN 0 + +/* put here other stepper motor */ + +#define STEPPER_1_SET do { /* Implement me! */ } while(0) +/* add here the set for other stepper motor */ + +#define STEPPER_1_CLEAR do { /* Implement me! */ } while(0) +/* add here the clear for other stepper motor */ + +/* + * Generic macro definition + */ + +/* + * Stepper init macro + */ +#define STEPPER_PIN_INIT_MACRO(port, index) do { \ + /* Add here init pin code */ \ + } while (0) + +/* + * Stepper commands macros + */ +#define STEPPER_SET_CW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CCW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_HALF(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_FULL(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_LOW(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_CONTROL_HIGHT(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_DISABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_ENABLE(index) do { /* Implement me! */ } while (0) +#define STEPPER_SET_RESET_DISABLE(index) do { /* Implement me! */ } while (0) + + +/* + * Reset stepper macro + */ + +#define STEPPER_RESET_MACRO(index) do { \ + STEPPER_SET_RESET_ENABLE(index); \ + timer_udelay(STEPPER_RESET_DELAY); \ + STEPPER_SET_RESET_DISABLE(index); \ + } while (0) + +/* + * Set half or full step macro + */ +#define STEPPER_SET_STEP_MODE_MACRO(index, flag) do { \ + if (flag) \ + STEPPER_SET_HALF(index); \ + else \ + STEPPER_SET_FULL(index); \ + } while (0) + +/* + * Set control status macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_CONTROL_BIT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macros not implemented */ \ + /* else */ \ + /* WARNING This macros not implemented */ \ + } while (0) + +/* + * Set current power macro + */ +#warning TODO: This macro is not implemented (see below) + +#define STEPPER_SET_POWER_CURRENT_MACRO(index, flag) do { \ + /* if (flag) */ \ + /* WARNING This macrois not implemented */ \ + /* else */ \ + /* WARNING This macrois not implemented */ \ + } while (0) + +/* + * Set rotation of stepper motor + * - dir = 1: positive rotation + * - dir = 0: no motor moviment + * - dir = -1: negative rotation + * + */ +#define STEPPER_SET_DIRECTION_MACRO(index, dir) do { \ + switch (dir) \ + { \ + case 1: \ + STEPPER_SET_CW(index); \ + break; \ + case -1: \ + STEPPER_SET_CCW(index); \ + break; \ + case 0: \ + break; \ + } \ + } while (0) + + +/* + * Define macros for manage low level of stepper. + */ + +#define STEPPER_INIT() do { \ + STEPPER_PIN_INIT_MACRO(A, 1); \ + /* Add here code for other stepper motor */ \ + } while (0) + + +/* + * Enable select stepper motor + */ +#define STEPPER_ENABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_ENABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Enable all stepper connect to micro + */ +#define STEPPER_ENABLE_ALL() do { \ + STEPPER_SET_ENABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Disable select stepper motor + */ +#define STEPPER_DISABLE(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DISABLE(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Disable all stepper connect to micro + */ +#define STEPPER_DISABLE_ALL() do { \ + STEPPER_SET_DISABLE(1); \ + /* Add here code for other stepper motor */ \ + } while (0) + +/* + * Reset selected stepper motor + */ +#define STEPPER_RESET(index) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_RESET_MACRO(1); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +/* + * Reset all stepper motor + */ +#define STEPPER_RESET_ALL() do { \ + STEPPER_RESET_MACRO(1) \ + /* Add here code for other stepper motor */ \ + } while (0) + +// Set half/full step macros +#define STEPPER_SET_HALF_STEP(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_STEP_MODE_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Control status +#define STEPPER_SET_CONTROL_BIT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_CONTROL_BIT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + + +// Set stepper power current +#define STEPPER_SET_POWER_CURRENT(index, flag) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_POWER_CURRENT_MACRO(1, flag); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +// Set rotation dirction of stepper motor +#define STEPPER_SET_DIRECTION(index, dir) do { \ + switch (index) \ + { \ + case 1: \ + STEPPER_SET_DIRECTION_MACRO(1, dir); \ + break; \ + /* Add here code for other stepper motor */ \ + } \ + } while (0) + +#endif /* HW_STEPPER_H */ + + diff --git a/bertos/hw/hw_tas5706a.h b/bertos/hw/hw_tas5706a.h new file mode 100644 index 0000000..fda85e1 --- /dev/null +++ b/bertos/hw/hw_tas5706a.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief HW pin handling. + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TAS5706A_H +#define HW_TAS5706A_H + +#include + +#warning FIXME: This is an example implementation, you must implement it + +#define TAS5706A_SETPOWERDOWN(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETRESET(val) do { (void) val; /* implement me */ } while (0) +#define TAS5706A_SETMUTE(val) do { (void) val; /* implement me */ } while (0) + +#define TAS5706A_PIN_INIT() \ + do { \ + TAS5706A_SETPOWERDOWN(true); \ + TAS5706A_SETRESET(true); \ + TAS5706A_SETMUTE(true); \ + /* complete me */ \ + } while (0) + +#define TAS5706A_MCLK_INIT() \ + do { \ + /* implement me */ \ + } while(0) + + +#endif /* HW_TAS5706A_H */ diff --git a/bertos/hw/hw_tc520.h b/bertos/hw/hw_tc520.h new file mode 100644 index 0000000..77d48d0 --- /dev/null +++ b/bertos/hw/hw_tc520.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * + * \brief TC520 hardware-specific definitions + * + * \author Francesco Sacchi + */ + +#ifndef HW_TC520_H +#define HW_TC520_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +#define CE_PIN 0 +#define DV_PIN 0 +#define LOAD_PIN 0 +#define READ_PIN 0 + + +#define DV_HIGH() /* Implement me! */ +#define DV_LOW() /* Implement me! */ + +#define CE_HIGH() /* Implement me! */ +#define CE_LOW() /* Implement me! */ + +#define LOAD_HIGH() /* Implement me! */ +#define LOAD_LOW() /* Implement me! */ + +#define READ_HIGH() /* Implement me! */ +#define READ_LOW() /* Implement me! */ + +#define TC520_HW_INIT \ +do\ +{\ + /* Put here your code to init hardware */ \ +} while(0) + +#endif /* HW_TC520_H */ diff --git a/bertos/hw/hw_thermo.h b/bertos/hw/hw_thermo.h new file mode 100644 index 0000000..6f47806 --- /dev/null +++ b/bertos/hw/hw_thermo.h @@ -0,0 +1,121 @@ +/** + * \file + * + * + * \brief thermo hardware-specific control functions. + * + * \author Francesco Sacchi + * + */ + +#ifndef HW_THERMO_H +#define HW_THERMO_H + +#include "hw/thermo_map.h" + +#include + +#include + + +INLINE ticks_t thermo_hw_timeout(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * This function should return the temperature set tolerance. + */ +INLINE deg_t thermo_hw_tolerance(ThermoDev dev) +{ + (void)dev; + return 0; +} + +/** + * Read the temperature of the hw device \a dev. + */ +INLINE deg_t thermo_hw_read(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to read current temperature */ + return 0; +} + + +/** + * Turns off a specific device. + * This function is usefull to handle errors. + */ +INLINE void thermo_hw_off(ThermoDev dev) +{ + ASSERT(dev < THERMO_CNT); + /* Put here the code to turn off the thermo device */ +} + +/** + * Based on the current temperature \a cur_temp and the target temperature \a target, + * this function turns on and off specific thermo device. + * It may use also PID control for thermo-regolations. + */ +INLINE void thermo_hw_set(ThermoDev dev, deg_t target, deg_t cur_temp) +{ + ASSERT(dev < THERMO_CNT); + + if (target - cur_temp > 0) + { + /* + * We are leveaving the target temperature, so + * turn on the thermo device! + */ + } + else + { + /* + * Ok, we are near the target temperature, so + * turn off the thermo device! + */ + } + +} + +#define THERMO_HW_INIT _thermo_hw_init() + +/** + * Init hw associated with thermo-control. + */ +INLINE void _thermo_hw_init(void) +{ + /* Init your devices here! */ +} + +#endif /* HW_THERMO_H */ diff --git a/bertos/hw/hw_timer.h b/bertos/hw/hw_timer.h new file mode 100644 index 0000000..f9542b2 --- /dev/null +++ b/bertos/hw/hw_timer.h @@ -0,0 +1,51 @@ +/** + * \file + * + * + * \brief Timer hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TIMER_H +#define HW_TIMER_H + +#include "cfg/cfg_timer.h" + +#if CONFIG_TIMER_STROBE + #warning TODO:This is an example implementation, you must implement it! + #define TIMER_STROBE_INIT do { /* implement me */ } while (0) + #define TIMER_STROBE_ON do { /* implement me */ } while (0) + #define TIMER_STROBE_OFF do { /* implement me */ } while (0) +#endif + +#endif /* HW_TIMER_H */ diff --git a/bertos/hw/hw_tlv5618.h b/bertos/hw/hw_tlv5618.h new file mode 100644 index 0000000..4a2b420 --- /dev/null +++ b/bertos/hw/hw_tlv5618.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \brief TLV5816 DAC hardware-specific definitions + * + * + * \author Francesco Sacchi + */ + +#ifndef HW_TLV5816_H +#define HW_TLV5816_H + +#warning TODO:This is an example implementation, you must implement it! + +#define TLV5618_CSINIT(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ + TLV5618_CSHIGH(pin); \ +} while(0) + +#define TLV5618_CSLOW(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#define TLV5618_CSHIGH(pin) \ +do \ +{ \ + (void)pin; \ + /* Implement me! */ \ +} while(0) + + +#endif /* HW_TLV5816_H */ + diff --git a/bertos/hw/hw_tmp123.h b/bertos/hw/hw_tmp123.h new file mode 100644 index 0000000..adb1858 --- /dev/null +++ b/bertos/hw/hw_tmp123.h @@ -0,0 +1,52 @@ +/** + * \file + * + * + * \brief Hardware macro definition. + * + * \author Daniele Basile + */ + +#ifndef HW_TMP123_H +#define HW_TMP123_H + +#warning TODO:This is an example implentation, you must implement it! + +#define TMP123_HW_CS_EN() /* Implement me! */ +#define TMP123_HW_CS_DIS() /* Implement me! */ + +#define TMP123_HW_INIT() \ + do { \ + /* Pin init */\ + } while (0) + +#endif /* HW_TMP123_H */ + diff --git a/bertos/hw/kbd_map.h b/bertos/hw/kbd_map.h new file mode 100644 index 0000000..15e4f08 --- /dev/null +++ b/bertos/hw/kbd_map.h @@ -0,0 +1,70 @@ +/** + * \file + * + * + * \brief Keyboard map definitions. + * + * + * \author Francesco Sacchi + * \author Stefano Fedrigo + */ + +#ifndef HW_KBD_MAP_H +#define HW_KBD_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + + +/** + * Type for keyboard mask. + */ +typedef uint16_t keymask_t; + +/** + * \name Keycodes. + */ +/*@{*/ +#define K_UP BV(0) +#define K_DOWN BV(1) +#define K_OK BV(2) +#define K_CANCEL BV(3) + +#define K_REPEAT BV(13) /**< This is a repeated keyevent. */ +#define K_TIMEOUT BV(14) /**< Fake key event for timeouts. */ +#define K_LONG BV(15) +/*@}*/ + +#define K_LNG_MASK 0 + +#endif /* HW_KBD_MAP_H */ diff --git a/bertos/hw/mcp41_map.h b/bertos/hw/mcp41_map.h new file mode 100644 index 0000000..b2d223c --- /dev/null +++ b/bertos/hw/mcp41_map.h @@ -0,0 +1,58 @@ +/** + * \file + * + * + * \brief MCP41 digital potentiometer map definitions. + * + * + * \author Francesco Sacchi + */ + +#ifndef MCP41_MAP_H +#define MCP41_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/** \name Enum for mcp41 pot evices. + * \{ + * + */ +typedef enum Mcp41Dev +{ + MCP41_LED, + + /* put here other mcp41 device */ + + MCP41_CNT, +} Mcp41Dev; +/* \} */ + +#endif /* MCP41_MAP_H */ diff --git a/bertos/hw/ntc_map.h b/bertos/hw/ntc_map.h new file mode 100644 index 0000000..6d256be --- /dev/null +++ b/bertos/hw/ntc_map.h @@ -0,0 +1,60 @@ +/** + * \file + * + * + * \brief NTC map definitions. + * + * + * \author Giovanni Bajo + * \author Francesco Sacchi + */ + +#ifndef NTC_MAP_H +#define NTC_MAP_H + +#include + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for ntc devices. + * \{ + */ +typedef enum NtcDev +{ + NTC_TEST, + + /* Put here your thermo device */ + + NTC_CNT +} NtcDev; +/* \} */ + +#endif /* NTC_MAP_H */ diff --git a/bertos/hw/phase_map.h b/bertos/hw/phase_map.h new file mode 100644 index 0000000..185a36f --- /dev/null +++ b/bertos/hw/phase_map.h @@ -0,0 +1,57 @@ +/** + * \file + * + * + * \brief Triac map definitions. + * + * + * \author Francesco Sacchi + */ + +#ifndef PHASE_MAP_H +#define PHASE_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +/*! \name Enum for triac devices. + * \{ + */ +typedef enum TriacDev +{ + TRIAC_TEST, + + /* Put here other triac device */ + + TRIAC_CNT +} TriacDev; +/* \} */ + +#endif /* PHASE_MAP_H */ diff --git a/bertos/hw/pwm_map.h b/bertos/hw/pwm_map.h new file mode 100644 index 0000000..634f3ec --- /dev/null +++ b/bertos/hw/pwm_map.h @@ -0,0 +1,60 @@ +/** + * \file + * + * + * + * \brief PWM map device. + * + * + * \author Daniele Basile + */ + +#ifndef HW_PWM_MAP_H +#define HW_PWM_MAP_H + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum +{ + PWM_CH0 = 0, + PWM_CH1, + PWM_CH2, + PWM_CH3, + +/* + * add other PWM channel or + * change above. + */ + + PWM_CNT +} PwmDev; + +#endif /* HW_PWM_MAP_H */ diff --git a/bertos/hw/thermo_map.h b/bertos/hw/thermo_map.h new file mode 100644 index 0000000..7dbe27b --- /dev/null +++ b/bertos/hw/thermo_map.h @@ -0,0 +1,56 @@ +/** + * \file + * + * + * \brief Thermo regulation control map definitions. + * + * \author Francesco Sacchi + */ + +#ifndef THERMO_MAP_H +#define THERMO_MAP_H + +#include +#include + + +#warning TODO:This is an example implentation, you must implement it! + +typedef enum ThermoDev +{ + THERMO_TEST, + + /* Put here your thermo device */ + + THERMO_CNT +} ThermoDev; + +#endif /* THERMO_MAP_H */ diff --git a/bertos/icons/Makefile b/bertos/icons/Makefile new file mode 100644 index 0000000..5046954 --- /dev/null +++ b/bertos/icons/Makefile @@ -0,0 +1,45 @@ +# +# $Id: Makefile 18234 2007-10-08 13:39:48Z rasky $ +# Copyright 2004, 2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Author: Stefano Fedrigo +# +# $Log$ +# Revision 1.2 2006/09/20 14:18:01 marco +# Use only icons neede by demo. +# +# Revision 1.1 2006/09/19 17:48:00 bernie +# Add temporary logo. +# +# + +# Set to 1 for debug builds +DEBUG = 1 + +RASTERS = logo.raster + +FLIPIMAGE = flipimage +flipimage_SRC = flipimage.cpp +flipimage_OBJ = $(flipimage_SRC:%.cpp=%.o) + +.PHONY: all +all: $(RASTERS) + +# Link rule +$(FLIPIMAGE): $(flipimage_OBJ) + $(CXX) $^ $(flipimage_LIBS) $(LDFLAGS) -o $@ + +.PHONY: clean +clean: + rm -f $(TRG) $(flipimage_OBJ) + rm -f $(RASTERS) + +.PHONY: rasters +rasters: $(FLIPIMAGE) $(RASTERS) + +%.raster: %.png $(FLIPIMAGE) + convert $< txt:- | ./flipimage >$@ + +# Include dependencies +-include *.d diff --git a/bertos/icons/flipimage.cpp b/bertos/icons/flipimage.cpp new file mode 100644 index 0000000..48ff96f --- /dev/null +++ b/bertos/icons/flipimage.cpp @@ -0,0 +1,124 @@ +/** + * \file + * + * + * \author Stefano Fedrigo + * + * \brief Conversion tool from image TXT format to LCD bitmap + */ + +/* + * $Log$ + * Revision 1.1 2006/09/19 17:48:00 bernie + * Add temporary logo. + * + * Revision 1.3 2004/09/24 17:25:32 powersoft + * Fix for new version of ImageMagick. + * + * Revision 1.2 2004/03/13 22:52:54 aleph + * documentation fixes + * + * Revision 1.1 2004/01/26 15:31:17 aleph + * Add boot images and tools for importing them + * + */ + +#include +#include +#include + +extern "C" { +#include +#include +} + +#define RASTER_WIDTH 82 +#define RASTER_HEIGHT 64 + +// Minimum color level to consider a pixel on +#define COLOR_THRESHOLD 128 + + +using namespace std; + + +int main(void) +{ + char buf[64]; + int n; + unsigned char mask; + unsigned char line[RASTER_WIDTH]; + + for (int l = 0; l < RASTER_HEIGHT/8; l++) + { + mask = 1; + memset(line, 0, sizeof(line)); + + do + { + for (int x = 0; x < RASTER_WIDTH; x++) + { + if (!cin.getline(buf, sizeof(buf))) + goto print_line; + + istringstream ss(buf); + string s; + char c; + + ss + >> s // skip glob coord spec + >> c // skip open paren + >> n; // this is the red level + + //DEBUG + //cout << "s='" << s << "' n='" << n << "'" << endl; + + if (n < COLOR_THRESHOLD) + line[x] |= mask; + } + } + while (mask <<= 1); + +print_line: + cout << "\n\t"; + for (int x = 0; x < RASTER_WIDTH; x++) + { + printf("0x%02X", line[x]); + if (x % 8 == 7) + cout << ",\n\t"; + else + cout << ", "; + } + cout << endl; + } + + return 0; +} diff --git a/bertos/icons/logo.c b/bertos/icons/logo.c new file mode 100644 index 0000000..bdf14a3 --- /dev/null +++ b/bertos/icons/logo.c @@ -0,0 +1,115 @@ + +#include "logo.h" +#include +#include + +/** + * BeRTOS logo + */ +const PROGMEM uint8_t bertos_logo_raster[] = { + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, + + 0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE, 0x0E, 0x0E, + 0x0E, 0x0E, 0xFE, 0xFE, 0xFE, 0xFC, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0xFE, 0xFE, 0xFE, 0xFE, + 0xFE, 0x0E, 0x0E, 0x0E, 0xFE, 0xFE, 0xFE, 0xFE, + 0xFC, 0x00, 0x1E, 0x1E, 0x1E, 0x1E, 0xFE, 0xFE, + 0xFE, 0xFE, 0x1E, 0x1E, 0x1E, 0x1E, 0x00, 0xFC, + 0xFE, 0xFE, 0xFE, 0xFE, 0x0E, 0x0E, 0x0E, 0x0E, + 0xFE, 0xFE, 0xFE, 0xFE, 0xFC, 0x00, 0xFC, 0xFE, + 0xFE, 0xFE, 0xFE, 0x0E, 0x0E, 0x0E, 0xFE, 0xFE, + 0xFE, 0xFE, + + 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0x78, 0x78, + 0x7C, 0xFC, 0xFF, 0xFF, 0xEF, 0xCF, 0x00, 0x00, + 0xFC, 0xFE, 0xFE, 0xFE, 0x1E, 0x1E, 0xFE, 0xFE, + 0xFE, 0xFE, 0xFC, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0xF8, 0xF8, 0xF8, 0xFF, 0xFF, 0x7F, 0x3F, + 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, + 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x07, 0x0F, + 0x1F, 0x1F, 0x3F, 0x7E, 0xFC, 0xF8, 0xF1, 0xE1, + 0xC1, 0x81, + + 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, 0xC0, 0xC0, + 0xC0, 0xC0, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0x00, + 0xFF, 0xFF, 0xFF, 0xFF, 0xC7, 0xC7, 0xF7, 0xF7, + 0xF7, 0xF7, 0xF3, 0x00, 0xFF, 0xFF, 0xFF, 0xFF, + 0xFF, 0x01, 0x0F, 0x3F, 0xFF, 0xFF, 0xFE, 0xF0, + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, 0xFF, + 0xFF, 0xFF, 0x00, 0x00, 0x00, 0x00, 0x00, 0xFF, + 0xFF, 0xFF, 0xFF, 0xFF, 0xC0, 0xC0, 0xC0, 0xC0, + 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0x00, 0xFE, 0xFE, + 0xFE, 0xFE, 0xFE, 0xC0, 0xC0, 0xC1, 0xFF, 0xFF, + 0xFF, 0xFF, + + 0x00, 0x00, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0xF1, 0x60, 0x80, + 0xF1, 0x43, 0xE3, 0x13, 0x13, 0xE3, 0x13, 0x13, + 0xF3, 0x13, 0x01, 0x00, 0xE3, 0x13, 0x13, 0xF3, + 0x43, 0xF0, 0x60, 0xC0, 0xF1, 0x03, 0xF3, 0x03, + 0x03, 0x30, 0xC0, 0x60, 0x10, 0x00, 0x03, 0xF3, + 0x43, 0xB3, 0x00, 0xF0, 0x50, 0x50, 0x00, 0xF1, + 0x53, 0xF3, 0x03, 0xF3, 0x63, 0xC3, 0xF3, 0x03, + 0xF3, 0x53, 0x53, 0x03, 0xF0, 0x00, 0x01, 0x03, + 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, 0x03, + 0x03, 0x03, + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, + 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x00, + 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01, 0x01, + 0x00, 0x01, 0x00, 0x00, 0x01, 0x00, 0x01, 0x01, + 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x01, + 0x00, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, 0x01, + 0x00, 0x01, 0x01, 0x01, 0x00, 0x00, 0x01, 0x00, + 0x01, 0x01, 0x01, 0x00, 0x01, 0x01, 0x01, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, + + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + +EXTERN_CONST struct Image bertos_logo = +{ + /* .raster = */ bertos_logo_raster, + /* .width = */ 82, + /* .height = */ 64, + /* .stride = */ 82 +}; + diff --git a/bertos/icons/logo.h b/bertos/icons/logo.h new file mode 100644 index 0000000..e0bbc63 --- /dev/null +++ b/bertos/icons/logo.h @@ -0,0 +1,3 @@ +#include + +extern const struct Image bertos_logo; diff --git a/bertos/icons/logo.png b/bertos/icons/logo.png new file mode 100755 index 0000000000000000000000000000000000000000..68fecaa8fe55dc774acb2e059ba61fd6d5f9fec5 GIT binary patch literal 343 zcmeAS@N?(olHy`uVBq!ia0vp^And@%3?w)I+2jGF7>k44ofy`glX(f`um$*pxB}__ z|Nk$&IsYz@#aZAHS<*&cu@Q1rlnk$;=$g^~h zA0HO;$=F#O{(QUh(3_a)8nptyFK^p^Yvaba_Xl$}o8Kw!vuHfJKd1WjUUM@JoqucJ jCm)Lo*L=EgW*Wnsd7oHHpT}$kdXd4?)z4*}Q$iB}c;kbD literal 0 HcmV?d00001 diff --git a/bertos/io/kblock.c b/bertos/io/kblock.c new file mode 100644 index 0000000..117c3e9 --- /dev/null +++ b/bertos/io/kblock.c @@ -0,0 +1,281 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief KBlock interface + */ + + +#include "kblock.h" + +#define LOG_LEVEL LOG_LVL_ERR +#define LOG_FORMAT LOG_FMT_VERBOSE + +#include +#include + +INLINE size_t kblock_readDirect(struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size) +{ + KB_ASSERT_METHOD(b, readDirect); + ASSERT(index < b->blk_cnt); + return b->priv.vt->readDirect(b, b->priv.blk_start + index, buf, offset, size); +} + +INLINE size_t kblock_writeDirect(struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size) +{ + KB_ASSERT_METHOD(b, writeDirect); + ASSERT(index < b->blk_cnt); + return b->priv.vt->writeDirect(b, b->priv.blk_start + index, buf, offset, size); +} + +INLINE size_t kblock_readBuf(struct KBlock *b, void *buf, size_t offset, size_t size) +{ + KB_ASSERT_METHOD(b, readBuf); + ASSERT(offset + size <= b->blk_size); + + return b->priv.vt->readBuf(b, buf, offset, size); +} + +INLINE size_t kblock_writeBuf(struct KBlock *b, const void *buf, size_t offset, size_t size) +{ + KB_ASSERT_METHOD(b, writeBuf); + ASSERT(offset + size <= b->blk_size); + return b->priv.vt->writeBuf(b, buf, offset, size); +} + +INLINE int kblock_load(struct KBlock *b, block_idx_t index) +{ + KB_ASSERT_METHOD(b, load); + ASSERT(index < b->blk_cnt); + + LOG_INFO("index %ld\n", index); + return b->priv.vt->load(b, b->priv.blk_start + index); +} + +INLINE int kblock_store(struct KBlock *b, block_idx_t index) +{ + KB_ASSERT_METHOD(b, store); + ASSERT(index < b->blk_cnt); + + LOG_INFO("index %ld\n", index); + return b->priv.vt->store(b, b->priv.blk_start + index); +} + +INLINE void kblock_setDirty(struct KBlock *b, bool dirty) +{ + if (dirty) + b->priv.flags |= KB_CACHE_DIRTY; + else + b->priv.flags &= ~KB_CACHE_DIRTY; +} + + +size_t kblock_read(struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size) +{ + ASSERT(b); + ASSERT(buf); + ASSERT(offset + size <= b->blk_size); + LOG_INFO("blk_idx %ld, offset %u, size %u\n", idx, offset, size); + + if (kblock_buffered(b) && idx == b->priv.curr_blk) + return kblock_readBuf(b, buf, offset, size); + else + return kblock_readDirect(b, idx, buf, offset, size); +} + + +int kblock_flush(struct KBlock *b) +{ + ASSERT(b); + + if (!kblock_buffered(b)) + return 0; + + if (kblock_cacheDirty(b)) + { + LOG_INFO("flushing block %ld\n", b->priv.curr_blk); + if (kblock_store(b, b->priv.curr_blk) == 0) + kblock_setDirty(b, false); + else + return EOF; + } + return 0; +} + + +static bool kblock_loadPage(struct KBlock *b, block_idx_t idx) +{ + ASSERT(b); + + if (idx != b->priv.curr_blk) + { + LOG_INFO("loading block %ld\n", idx); + if (kblock_flush(b) != 0 || kblock_load(b, idx) != 0) + return false; + + b->priv.curr_blk = idx; + } + return true; +} + + +int kblock_trim(struct KBlock *b, block_idx_t start, block_idx_t count) +{ + ASSERT(start + count <= b->blk_cnt); + + if (kblock_buffered(b)) + { + if (!kblock_loadPage(b, start)) + return EOF; + } + + b->priv.blk_start += start; + b->priv.curr_blk = 0; // adjust logical address + b->blk_cnt = count; + return 0; +} + + +size_t kblock_write(struct KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size) +{ + ASSERT(b); + ASSERT(buf); + ASSERT(idx < b->blk_cnt); + ASSERT(offset + size <= b->blk_size); + + LOG_INFO("blk_idx %ld, offset %u, size %u\n", idx, offset, size); + + if (kblock_buffered(b)) + { + if (!kblock_loadPage(b, idx)) + return 0; + + kblock_setDirty(b, true); + return kblock_writeBuf(b, buf, offset, size); + } + else + { + #ifdef _DEBUG + if (offset != 0 || size != b->blk_size) + ASSERT(kblock_partialWrite(b)); + #endif + return kblock_writeDirect(b, idx, buf, offset, size); + } +} + +int kblock_copy(struct KBlock *b, block_idx_t src, block_idx_t dest) +{ + ASSERT(b); + ASSERT(src < b->blk_cnt); + ASSERT(dest < b->blk_cnt); + + if (kblock_buffered(b)) + { + if (!kblock_loadPage(b, src)) + return EOF; + + b->priv.curr_blk = dest; + kblock_setDirty(b, true); + return 0; + } + else if (kblock_partialWrite(b)) + { + uint8_t buf[16]; + size_t blk_size = b->blk_size; + size_t offset = 0; + + while (blk_size) + { + size_t size = MIN(sizeof(buf), blk_size); + if (kblock_readDirect(b, src, buf, offset, size) != size) + return EOF; + if (kblock_writeDirect(b, dest, buf, offset, size) != size) + return EOF; + + blk_size -= size; + offset += size; + } + return 0; + } + else + { + ASSERT(0); + return EOF; + } +} + +int kblock_swLoad(struct KBlock *b, block_idx_t index) +{ + /* + * Since this is a low level API, the index here is a fisical index. + * If we call another low level API, logical to fisical translation + * would be applied twice. + * In order to avoid this we subtract the start block index. + */ + ASSERT(index >= b->priv.blk_start); + return (kblock_readDirect(b, index - b->priv.blk_start, b->priv.buf, 0, b->blk_size) == b->blk_size) ? 0 : EOF; +} + +int kblock_swStore(struct KBlock *b, block_idx_t index) +{ + /* + * Since this is a low level API, the index here is a fisical index. + * If we call another low level API, logical to fisical translation + * would be applied twice. + * In order to avoid this we subtract the start block index. + */ + ASSERT(index >= b->priv.blk_start); + return (kblock_writeDirect(b, index - b->priv.blk_start, b->priv.buf, 0, b->blk_size) == b->blk_size) ? 0 : EOF; +} + +size_t kblock_swReadBuf(struct KBlock *b, void *buf, size_t offset, size_t size) +{ + ASSERT(buf); + ASSERT(offset + size <= b->blk_size); + + memcpy(buf, (uint8_t *)b->priv.buf + offset, size); + return size; +} + +size_t kblock_swWriteBuf(struct KBlock *b, const void *buf, size_t offset, size_t size) +{ + ASSERT(buf); + ASSERT(offset + size <= b->blk_size); + memcpy((uint8_t *)b->priv.buf + offset, buf, size); + return size; +} + +int kblock_swClose(UNUSED_ARG(struct KBlock, *b)) +{ + return 0; +} diff --git a/bertos/io/kblock.h b/bertos/io/kblock.h new file mode 100644 index 0000000..f354294 --- /dev/null +++ b/bertos/io/kblock.h @@ -0,0 +1,400 @@ +/** + * \file + * + * + * \defgroup io_kblock KBlock interface + * \ingroup core + * \{ + * + * \brief KBlock interface + * + * A block device is a device which can only be read/written + * with data blocks of constant size: flash memories, + * SD cards, hard disks, etc... + * This interface is designed to adapt to most block devices and + * use peculiar features in order to save CPU time and memory space. + * + * There is no init function because you do not have to use this + * structure directly, specific implementations will supply their own init + * functions. + * + * Error handling is done in a way similar to standard C library: whenever a + * function (eg. kblock_flush()) returns error, you need to check the error + * code, which is implementation specific. + * + * Example of code flow: + * \code + * // init a KBlock-derived class + * Flash fls; + * flash_init(&fls.blk, 0); + * + * // use kblock_* functions to access the derived class + * kblock_write(&fls.blk, ...); + * if (kblock_flush(&fls.blk) == EOF) + * { + * // oops, error occurred! + * int err = kblock_error(&fls.blk); + * // handle Flash specific error conditions + * // ... + * // clear error condition + * kblock_clearerr(&fls.blk); + * } + * \endcode + * + * \note The KBlock interface is optimized for block reads. If you need a + * file-like access, you can use \ref kfile_block. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kblock" + */ + +#ifndef IO_KBLOCK_H +#define IO_KBLOCK_H + +#include +#include +#include + +/** Type for addressing blocks in the device. */ +typedef uint32_t block_idx_t; + +// Fwd Declaration +struct KBlock; + +/** + * \name Prototypes for KBlock low level access functions. + * + * When writing a driver implementing the KBlock interface you can choose which + * function subset to implement, but you have to set to NULL unimplemented + * features. + * + * \{ + */ +typedef size_t (* kblock_read_direct_t) (struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size); +typedef size_t (* kblock_write_direct_t) (struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size); + +typedef size_t (* kblock_read_t) (struct KBlock *b, void *buf, size_t offset, size_t size); +typedef size_t (* kblock_write_t) (struct KBlock *b, const void *buf, size_t offset, size_t size); +typedef int (* kblock_load_t) (struct KBlock *b, block_idx_t index); +typedef int (* kblock_store_t) (struct KBlock *b, block_idx_t index); + +typedef int (* kblock_error_t) (struct KBlock *b); +typedef void (* kblock_clearerr_t) (struct KBlock *b); +typedef int (* kblock_close_t) (struct KBlock *b); +/* \} */ + +/* + * Table of interface functions for a KBlock device. + */ +typedef struct KBlockVTable +{ + kblock_read_direct_t readDirect; + kblock_write_direct_t writeDirect; + + kblock_read_t readBuf; + kblock_write_t writeBuf; + kblock_load_t load; + kblock_store_t store; + + kblock_error_t error; // \sa kblock_error() + kblock_clearerr_t clearerr; // \sa kblock_clearerr() + + kblock_close_t close; // \sa kblock_close() +} KBlockVTable; + + +#define KB_BUFFERED BV(0) ///< Internal flag: true if the KBlock has a buffer +#define KB_CACHE_DIRTY BV(1) ///< Internal flag: true if the cache is dirty +#define KB_PARTIAL_WRITE BV(2) ///< Internal flag: true if the device allows partial block write + + +/* + * KBlock private members. + * These are the private members of the KBlock interface, please do not + * access these directly, use the KBlock API. + */ +typedef struct KBlockPriv +{ + DB(id_t type); // Used to keep track, at runtime, of the class type. + int flags; // Status and error flags. + void *buf; // Pointer to the page buffer for RAM-cached KBlocks. + block_idx_t blk_start; // Start block number when the device is trimmed. \sa kblock_trim(). + block_idx_t curr_blk; // Current cached block number in cached KBlocks. + + const struct KBlockVTable *vt; // Virtual table of interface functions. +} KBlockPriv; + +/** + * KBlock: interface for a generic block device. + * + */ +typedef struct KBlock +{ + KBlockPriv priv; ///< Interface private data, do not use directly. + + /* Public access members */ + size_t blk_size; ///< Block size. + block_idx_t blk_cnt; ///< Number of blocks available in the device. +} KBlock; + + +/** + * Use a subset of the blocks on the device. + * + * This function is useful for partitioning a device and use it for + * different purposes at the same time. + * + * This function will limit the number of blocks used on the device by setting + * a start index and a number of blocks to be used counting from that index. + * + * The blocks outside this range are no more accessible. + * + * Logical block indexes will be mapped to physical indexes inside this new + * range automatically. Even following calls to kblock_trim() will use logical + * indexes, so, once trimmed, access can only be limited further and never + * expanded back. + * + * Example: + * \code + * //...init KBlock device dev + * kblock_trim(dev, 200, 1500); // Restrict access to the 200-1700 physical block range. + * kblock_read(dev, 0, buf, 0, dev->blk_size); // Read from physical block #200. + * kblock_trim(dev, 0, 300); // Restrict access to the 200-500 physical block range. + * \endcode + * + * \param b KBlock device. + * \param start The index of the start block for the limiting window in logical addressing units. + * \param count The number of blocks to be used. + * + * \return 0 if all is OK, EOF on errors. + */ +int kblock_trim(struct KBlock *b, block_idx_t start, block_idx_t count); + + +#define KB_ASSERT_METHOD(b, method) \ + do \ + { \ + ASSERT(b); \ + ASSERT((b)->priv.vt); \ + ASSERT((b)->priv.vt->method); \ + } \ + while (0) + + +/** + * Get the current errors for the device. + * + * \note Calling this function will not clear the errors. + * + * \param b KBlock device. + * + * \return 0 if no error is present, a driver specific mask of errors otherwise. + * + * \sa kblock_clearerr() + */ +INLINE int kblock_error(struct KBlock *b) +{ + KB_ASSERT_METHOD(b, error); + return b->priv.vt->error(b); +} + +/** + * Clear the errors of the device. + * + * \param b KBlock device. + * + * + * \sa kblock_error() + */ +INLINE void kblock_clearerr(struct KBlock *b) +{ + KB_ASSERT_METHOD(b, clearerr); + b->priv.vt->clearerr(b); +} + + +/** + * Flush the cache (if any) to the device. + * + * This function will write any pending modifications to the device. + * If the device does not have a cache, this function will do nothing. + * + * \return 0 if all is OK, EOF on errors. + * \sa kblock_read(), kblock_write(), kblock_buffered(). + */ +int kblock_flush(struct KBlock *b); + +/** + * Close the device. + * + * \param b KBlock device. + * + * \return 0 on success, EOF on errors. + */ +INLINE int kblock_close(struct KBlock *b) +{ + KB_ASSERT_METHOD(b, close); + return kblock_flush(b) | b->priv.vt->close(b); +} + +/** + * \return true if the device \a b is buffered, false otherwise. + * \param b KBlock device. + * \sa kblock_cachedBlock(), kblock_cacheDirty(). + */ +INLINE bool kblock_buffered(struct KBlock *b) +{ + ASSERT(b); + return (b->priv.flags & KB_BUFFERED); +} + + +/** + * \return The current cached block number if the device is buffered. + * \param b KBlock device. + * \note This function will throw an ASSERT if called on a non buffered KBlock. + * \sa kblock_buffered(), kblock_cacheDirty(). + */ +INLINE block_idx_t kblock_cachedBlock(struct KBlock *b) +{ + ASSERT(kblock_buffered(b)); + return b->priv.curr_blk; +} + + +/** + * Return the status of the internal cache. + * + * \param b KBlock device. + * \return If the device supports buffering, returns true if the cache is dirty, + * false if the cache is clean and coherent with device content. + * \note This function will throw an ASSERT if called on a non buffered KBlock. + * \sa kblock_cachedBlock(), kblock_buffered(). + */ +INLINE bool kblock_cacheDirty(struct KBlock *b) +{ + ASSERT(kblock_buffered(b)); + return kblock_buffered(b) && (b->priv.flags & KB_CACHE_DIRTY); +} + +/** + * \return true if the device \a b supports partial block write. That is, you + * can call kblock_write() with a size which is lesser than the block + * size. + * \param b KBlock device. + * \sa kblock_write(). + */ +INLINE bool kblock_partialWrite(struct KBlock *b) +{ + ASSERT(b); + return (b->priv.flags & KB_PARTIAL_WRITE); +} + +/** + * Read data from the block device. + * + * This function will read \a size bytes from block \a idx starting at + * address \a offset inside the block. + * + * Most block devices (almost all flash memories, for instance), + * can efficiently read even a part of the block. + * + * \note This function can be slow if you try to partial read a block from + * a device which does not support partial block reads and is opened + * in unbuffered mode. + * + * \param b KBlock device. + * \param idx the block number where you want to read. + * \param buf a buffer where the data will be read. + * \param offset the offset inside the block from which data reading will start. + * \param size the size of data to be read. + * + * \return the number of bytes read. + * + * \sa kblock_write(). + */ +size_t kblock_read(struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size); + + +/** + * Write data to the block device. + * + * This function will write \a size bytes to block \a idx starting at + * address \a offset inside the block. + * + * \note Partial block writes are supported only on certain devices. + * You can use kblock_partialWrite() in order to check if the device + * has this feature or not. + * + * \note If the device is opened in buffered mode, this function will use + * efficiently and trasparently the cache provided. + * In order to be sure that all modifications are actually written + * to the device you have to call kblock_flush(). + * + * \param b KBlock device. + * \param idx the block number where you want to write. + * \param buf a pointer to the data to be written. + * \param offset the offset inside the block from which data writing will start. + * \param size the size of data to be written. + * + * \return the number of bytes written. + * + * \sa kblock_read(), kblock_flush(), kblock_buffered(), kblock_partialWrite(). + */ +size_t kblock_write(struct KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size); + +/** + * Copy one block to another. + * + * This function will copy the content of block \a src to block \a dest. + * + * \note This function is available only on devices which support partial + * block write or are opened in buffered mode. + * + * \param b KBlock device. + * \param src source block number. + * \param dest destination block number. + * + * \return 0 if all is OK, EOF on errors. + */ +int kblock_copy(struct KBlock *b, block_idx_t src, block_idx_t dest); + +int kblock_swLoad(struct KBlock *b, block_idx_t index); +int kblock_swStore(struct KBlock *b, block_idx_t index); +size_t kblock_swReadBuf(struct KBlock *b, void *buf, size_t offset, size_t size); +size_t kblock_swWriteBuf(struct KBlock *b, const void *buf, size_t offset, size_t size); +int kblock_swClose(struct KBlock *b); + +/** \} */ //defgroup io_kblock + + +#endif /* IO_KBLOCK_H */ diff --git a/bertos/io/kblock_posix.c b/bertos/io/kblock_posix.c new file mode 100644 index 0000000..eefea0d --- /dev/null +++ b/bertos/io/kblock_posix.c @@ -0,0 +1,182 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief KBlock interface over libc files. + * + * notest: avr + * notest: arm + */ + + +#include "kblock_posix.h" +#include +#include + + +static int kblockposix_load(KBlock *b, block_idx_t index) +{ + KBlockPosix *f = KBLOCKPOSIX_CAST(b); + fseek(f->fp, index * b->blk_size, SEEK_SET); + return (fread(f->b.priv.buf, 1, b->blk_size, f->fp) == b->blk_size) ? 0 : EOF; +} + +static int kblockposix_store(struct KBlock *b, block_idx_t index) +{ + KBlockPosix *f = KBLOCKPOSIX_CAST(b); + fseek(f->fp, index * b->blk_size, SEEK_SET); + return (fwrite(f->b.priv.buf, 1, b->blk_size, f->fp) == b->blk_size) ? 0 : EOF; +} + +static size_t kblockposix_readBuf(struct KBlock *b, void *buf, size_t offset, size_t size) +{ + KBlockPosix *f = KBLOCKPOSIX_CAST(b); + memcpy(buf, (uint8_t *)f->b.priv.buf + offset, size); + return size; +} + +static size_t kblockposix_readDirect(struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size) +{ + KBlockPosix *f = KBLOCKPOSIX_CAST(b); + fseek(f->fp, index * b->blk_size + offset, SEEK_SET); + return fread(buf, 1, size, f->fp); +} + +static size_t kblockposix_writeBuf(struct KBlock *b, const void *buf, size_t offset, size_t size) +{ + KBlockPosix *f = KBLOCKPOSIX_CAST(b); + memcpy((uint8_t *)f->b.priv.buf + offset, buf, size); + return size; +} + +static size_t kblockposix_writeDirect(struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size) +{ + KBlockPosix *f = KBLOCKPOSIX_CAST(b); + ASSERT(buf); + ASSERT(index < b->blk_cnt); + fseek(f->fp, index * b->blk_size + offset, SEEK_SET); + return fwrite(buf, 1, size, f->fp); +} + +static int kblockposix_error(struct KBlock *b) +{ + KBlockPosix *f = KBLOCKPOSIX_CAST(b); + return ferror(f->fp); +} + + +static void kblockposix_claererr(struct KBlock *b) +{ + KBlockPosix *f = KBLOCKPOSIX_CAST(b); + clearerr(f->fp); +} + + +static int kblockposix_close(struct KBlock *b) +{ + KBlockPosix *f = KBLOCKPOSIX_CAST(b); + + return fflush(f->fp) | fclose(f->fp); +} + + +static const KBlockVTable kblockposix_hwbuffered_vt = +{ + .readDirect = kblockposix_readDirect, + + .readBuf = kblockposix_readBuf, + .writeBuf = kblockposix_writeBuf, + .load = kblockposix_load, + .store = kblockposix_store, + + .error = kblockposix_error, + .clearerr = kblockposix_claererr, + .close = kblockposix_close, +}; + +static const KBlockVTable kblockposix_swbuffered_vt = +{ + .readDirect = kblockposix_readDirect, + .writeDirect =kblockposix_writeDirect, + + .readBuf = kblock_swReadBuf, + .writeBuf = kblock_swWriteBuf, + .load = kblock_swLoad, + .store = kblock_swStore, + + .error = kblockposix_error, + .clearerr = kblockposix_claererr, + .close = kblockposix_close, +}; + +static const KBlockVTable kblockposix_unbuffered_vt = +{ + .readDirect = kblockposix_readDirect, + .writeDirect =kblockposix_writeDirect, + + .error = kblockposix_error, + .clearerr = kblockposix_claererr, + .close = kblockposix_close, +}; + + + +void kblockposix_init(KBlockPosix *f, FILE *fp, bool hwbuf, void *buf, size_t block_size, block_idx_t block_count) +{ + ASSERT(f); + ASSERT(fp); + ASSERT(block_size); + + memset(f, 0, sizeof(*f)); + + DB(f->b.priv.type = KBT_KBLOCKPOSIX); + + f->fp = fp; + f->b.blk_size = block_size; + f->b.blk_cnt = block_count; + + f->b.priv.flags |= KB_PARTIAL_WRITE; + if (buf) + { + f->b.priv.flags |= KB_BUFFERED; + f->b.priv.buf = buf; + if (hwbuf) + f->b.priv.vt = &kblockposix_hwbuffered_vt; + else + f->b.priv.vt = &kblockposix_swbuffered_vt; + kblockposix_load(&f->b, 0); + f->b.priv.curr_blk = 0; + } + else + f->b.priv.vt = &kblockposix_unbuffered_vt; +} diff --git a/bertos/io/kblock_posix.h b/bertos/io/kblock_posix.h new file mode 100644 index 0000000..6520f63 --- /dev/null +++ b/bertos/io/kblock_posix.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief KBlock interface on POSIX file. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kfile_posix" + * $WIZ$ module_depends = "kblock" + */ + +#ifndef KBLOCK_POSIX_H +#define KBLOCK_POSIX_H + +#include "kblock.h" + +#include + +typedef struct KBlockPosix +{ + KBlock b; + FILE *fp; +} KBlockPosix; + +#define KBT_KBLOCKPOSIX MAKE_ID('K', 'B', 'F', 'L') + + +INLINE KBlockPosix *KBLOCKPOSIX_CAST(KBlock *b) +{ + ASSERT(b->priv.type == KBT_KBLOCKPOSIX); + return (KBlockPosix *)b; +} + +void kblockposix_init(KBlockPosix *f, FILE *fp, bool hwbuf, void *buf, size_t block_size, block_idx_t block_count); + +#endif /* KBLOCK_POSIX_H */ diff --git a/bertos/io/kblock_ram.c b/bertos/io/kblock_ram.c new file mode 100644 index 0000000..b936e90 --- /dev/null +++ b/bertos/io/kblock_ram.c @@ -0,0 +1,171 @@ +/** + * \file + * + * + * \author Francesco Sacchi + * + * \brief KBlock interface on RAM memory + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kfile_ram" + * $WIZ$ module_depends = "kblock" + */ + + +#include "kblock_ram.h" +#include + + +static int kblockram_load(KBlock *b, block_idx_t index) +{ + KBlockRam *r = KBLOCKRAM_CAST(b); + memcpy(r->b.priv.buf, r->membuf + index * r->b.blk_size, r->b.blk_size); + return 0; +} + +static int kblockram_store(struct KBlock *b, block_idx_t index) +{ + KBlockRam *r = KBLOCKRAM_CAST(b); + memcpy(r->membuf + index * r->b.blk_size, r->b.priv.buf, r->b.blk_size); + return 0; +} + +static size_t kblockram_readBuf(struct KBlock *b, void *buf, size_t offset, size_t size) +{ + KBlockRam *r = KBLOCKRAM_CAST(b); + memcpy(buf, (uint8_t *)r->b.priv.buf + offset, size); + return size; +} + +static size_t kblockram_readDirect(struct KBlock *b, block_idx_t index, void *buf, size_t offset, size_t size) +{ + KBlockRam *r = KBLOCKRAM_CAST(b); + memcpy(buf, r->membuf + index * r->b.blk_size + offset, size); + return size; +} + +static size_t kblockram_writeBuf(struct KBlock *b, const void *buf, size_t offset, size_t size) +{ + KBlockRam *r = KBLOCKRAM_CAST(b); + memcpy((uint8_t *)r->b.priv.buf + offset, buf, size); + return size; +} + +static size_t kblockram_writeDirect(struct KBlock *b, block_idx_t index, const void *buf, size_t offset, size_t size) +{ + KBlockRam *r = KBLOCKRAM_CAST(b); + ASSERT(buf); + ASSERT(index < b->blk_cnt); + + memcpy(r->membuf + index * r->b.blk_size + offset, buf, size); + return size; +} + +static int kblockram_dummy(UNUSED_ARG(struct KBlock *,b)) +{ + return 0; +} + +static const KBlockVTable kblockram_hwbuffered_vt = +{ + .readDirect = kblockram_readDirect, + + .readBuf = kblockram_readBuf, + .writeBuf = kblockram_writeBuf, + .load = kblockram_load, + .store = kblockram_store, + + .error = kblockram_dummy, + .clearerr = (kblock_clearerr_t)kblockram_dummy, + .close = kblockram_dummy, +}; + + +static const KBlockVTable kblockram_swbuffered_vt = +{ + .readDirect = kblockram_readDirect, + .writeDirect = kblockram_writeDirect, + + .readBuf = kblock_swReadBuf, + .writeBuf = kblock_swWriteBuf, + .load = kblock_swLoad, + .store = kblock_swStore, + + .error = kblockram_dummy, + .clearerr = (kblock_clearerr_t)kblockram_dummy, + .close = kblockram_dummy, +}; + +static const KBlockVTable kblockram_unbuffered_vt = +{ + .readDirect = kblockram_readDirect, + .writeDirect = kblockram_writeDirect, + + .error = kblockram_dummy, + .clearerr = (kblock_clearerr_t)kblockram_dummy, + .close = kblockram_dummy, +}; + +void kblockram_init(KBlockRam *ram, void *buf, size_t size, size_t block_size, bool buffered, bool hwbuffered) +{ + ASSERT(buf); + ASSERT(size); + ASSERT(block_size); + + memset(ram, 0, sizeof(*ram)); + + DB(ram->b.priv.type = KBT_KBLOCKRAM); + ram->b.blk_size = block_size; + ram->b.priv.flags |= KB_PARTIAL_WRITE; + + if (buffered) + { + ram->b.priv.flags |= KB_BUFFERED; + ram->b.blk_cnt = (size / block_size) - 1; + ram->b.priv.buf = buf; + // First page used as page buffer + ram->membuf = (uint8_t *)buf + block_size; + + if (hwbuffered) + ram->b.priv.vt = &kblockram_hwbuffered_vt; + else + ram->b.priv.vt = &kblockram_swbuffered_vt; + + kblockram_load(&ram->b, 0); + } + else + { + ram->b.blk_cnt = (size / block_size); + ram->membuf = (uint8_t *)buf; + ram->b.priv.vt = &kblockram_unbuffered_vt; + } +} diff --git a/bertos/io/kblock_ram.h b/bertos/io/kblock_ram.h new file mode 100644 index 0000000..2b51890 --- /dev/null +++ b/bertos/io/kblock_ram.h @@ -0,0 +1,61 @@ +/** + * \file + * + * + * \brief KBlock interface + * + * \author Francesco Sacchi + */ + +#ifndef KBLOCK_RAM_H +#define KBLOCK_RAM_H + +#include "kblock.h" + + +typedef struct KBlockRam +{ + KBlock b; + uint8_t *membuf; +} KBlockRam; + +#define KBT_KBLOCKRAM MAKE_ID('K', 'B', 'R', 'M') + + +INLINE KBlockRam *KBLOCKRAM_CAST(KBlock *b) +{ + ASSERT(b->priv.type == KBT_KBLOCKRAM); + return (KBlockRam *)b; +} + +void kblockram_init(KBlockRam *ram, void *buf, size_t size, size_t block_size, bool buffered, bool hwbuffered); + +#endif /* KBLOCK_RAM_H */ diff --git a/bertos/io/kfile.c b/bertos/io/kfile.c new file mode 100644 index 0000000..52762bd --- /dev/null +++ b/bertos/io/kfile.c @@ -0,0 +1,304 @@ +/** + * \file + * + * + * \brief Virtual KFile I/O interface. + * + * This module implements some generic I/O interfaces for kfile. + * + * \author Francesco Sacchi + * \author Daniele Basile + */ + +#include "kfile.h" + +#include "cfg/cfg_kfile.h" +#include +#include + +#include +#include + +#include + +/* + * Sanity check for config parameters required by this module. + */ +#if !defined(CONFIG_KFILE_GETS) || ((CONFIG_KFILE_GETS != 0) && CONFIG_KFILE_GETS != 1) + #error CONFIG_KFILE_GETS must be set to either 0 or 1 in appconfig.h +#endif +#if !defined(CONFIG_PRINTF) + #error CONFIG_PRINTF missing in appconfig.h +#endif + + +/** + * Generic putc() implementation using \a fd->write. + */ +int kfile_putc(int _c, struct KFile *fd) +{ + unsigned char c = (unsigned char)_c; + + if (kfile_write(fd, &c, sizeof(c)) == sizeof(c)) + return (int)((unsigned char)_c); + else + return EOF; +} + +/** + * Generic getc() implementation using \a fd->read. + */ +int kfile_getc(struct KFile *fd) +{ + unsigned char c; + + if (kfile_read(fd, &c, sizeof(c)) == sizeof(c)) + return (int)((unsigned char)c); + else + return EOF; +} + +#if CONFIG_PRINTF +/** + * Formatted write. + */ +int kfile_printf(struct KFile *fd, const char *format, ...) +{ + va_list ap; + int len; + + va_start(ap, format); + len = _formatted_write(format, (void (*)(char, void *))kfile_putc, fd, ap); + va_end(ap); + + return len; +} +#endif /* CONFIG_PRINTF */ + +/** + * Write a string to kfile \a fd. + * \return 0 if OK, EOF in case of error. + */ +int kfile_print(struct KFile *fd, const char *s) +{ + while (*s) + { + if (kfile_putc(*s++, fd) == EOF) + return EOF; + } + return 0; +} + +#if CONFIG_KFILE_GETS +/** + * Read a line long at most as size and put it + * in buf. + * \return number of chars read or EOF in case + * of error. + */ +int kfile_gets(struct KFile *fd, char *buf, int size) +{ + return kfile_gets_echo(fd, buf, size, false); +} + + +/** + * Read a line long at most as size and put it + * in buf, with optional echo. + * + * \return number of chars read, or EOF in case + * of error. + */ +int kfile_gets_echo(struct KFile *fd, char *buf, int size, bool echo) +{ + int i = 0; + int c; + + for (;;) + { + if ((c = kfile_getc(fd)) == EOF) + { + buf[i] = '\0'; + return -1; + } + + /* FIXME */ + if (c == '\r' || c == '\n' || i >= size-1) + { + buf[i] = '\0'; + if (echo) + kfile_print(fd, "\r\n"); + break; + } + buf[i++] = c; + if (echo) + kfile_putc(c, fd); + } + + return i; +} +#endif /* !CONFIG_KFILE_GETS */ + + +kfile_off_t kfile_copy(KFile *src, KFile *dst, kfile_off_t size) +{ + char buf[32]; + kfile_off_t cp_len = 0; + + while (size) + { + size_t len = MIN(sizeof(buf), (size_t)size); + if (kfile_read(src, buf, len) != len) + break; + + size_t wr_len = kfile_write(dst, buf, len); + cp_len += wr_len; + size -= len; + + if (wr_len != len) + break; + } + + return cp_len; +} + + +/** + * Move \a fd file seek position of \a offset bytes from \a whence. + * + * This is a generic implementation of seek function, you can redefine + * it in your local module if needed. + */ +kfile_off_t kfile_genericSeek(struct KFile *fd, kfile_off_t offset, KSeekMode whence) +{ + kfile_off_t seek_pos; + + switch (whence) + { + + case KSM_SEEK_SET: + seek_pos = 0; + break; + case KSM_SEEK_END: + seek_pos = fd->size; + break; + case KSM_SEEK_CUR: + seek_pos = fd->seek_pos; + break; + default: + ASSERT(0); + return EOF; + break; + } + + /* Bound check */ + if (seek_pos + offset > fd->size) + LOG_INFO("seek outside EOF\n"); + + fd->seek_pos = seek_pos + offset; + + return fd->seek_pos; +} + +/** + * Reopen file \a fd. + * This is a generic implementation that only flush file + * and reset seek_pos to 0. + */ +struct KFile * kfile_genericReopen(struct KFile *fd) +{ + kfile_flush(fd); + kfile_seek(fd, 0, KSM_SEEK_SET); + return fd; +} + +/** + * Close file \a fd. + * This is a generic implementation that only flush the file. + */ +int kfile_genericClose(struct KFile *fd) +{ + return kfile_flush(fd); +} + + +/** + * Discard input to resynchronize with remote end. + * + * Discard incoming data until the kfile_getc stops receiving + * characters for at least \a delay milliseconds. + * + * \note If the timeout occur, we reset the error before to + * quit. + */ +void kfile_resync(KFile *fd, mtime_t delay) +{ + ticks_t start_time = timer_clock(); + for(;;) + { + if(kfile_getc(fd) != EOF) + start_time = timer_clock(); + + if ((timer_clock() - start_time) > ms_to_ticks(delay)) + { + kfile_clearerr(fd); + break; + } + + } +} + +/** + * Stub function that does nothing. + * This is a generic implementation that only return 0. + */ +static int kfile_generic(UNUSED_ARG(struct KFile *, fd)) +{ + return 0; +}; + + +/** + * Base class KFile constructor. + */ +void kfile_init(struct KFile *fd) +{ + ASSERT(fd); + memset(fd, 0, sizeof(*fd)); + fd->clearerr = (ClearErrFunc_t)kfile_generic; + fd->close = kfile_genericClose; + fd->error = kfile_generic; + fd->flush = kfile_generic; + fd->read = (ReadFunc_t)kfile_generic; + fd->reopen = kfile_genericReopen; + fd->seek = kfile_genericSeek; + fd->write = (WriteFunc_t)kfile_generic; +} + diff --git a/bertos/io/kfile.h b/bertos/io/kfile.h new file mode 100644 index 0000000..9a750fe --- /dev/null +++ b/bertos/io/kfile.h @@ -0,0 +1,359 @@ +/** + * \file + * + * + * \defgroup io_kfile KFile interface + * \ingroup core + * \{ + * + * \brief Virtual KFile I/O interface. + * + * KFile is a simple, generic interface for file I/O. It uses an + * object-oriented model to supply a device-neutral interface to + * communicate with drivers. + * + * This module contains only definitions, the instance structure + * and the common API. + * Each KFile subclass can override one or more methods of the interface, + * and can extend the base KFile structure with its own private data. + * For instance, a serial driver might implement the KFile interface by + * declaring a context structure like this: + * + * \code + * typedef struct Serial + * { + * // base class instance + * KFile fd; + * + * // private instance data + * FIFOBuffer txfifo, rxfifo; + * } Serial; + * \endcode + * + * You should also supply a macro for casting KFile to Serial: + * + * \code + * INLINE Serial * SERIAL_CAST(KFile *fd) + * { + * ASSERT(fd->_type == KFT_SERIAL); + * return (Serial *)fd; + * } + * \endcode + * + * Then you can implement as many interface functions as needed + * and leave the rest to NULL. + * + * Example implementation of the close KFile method for Serial: + * + * \code + * static int ser_kfile_close(struct KFile *fd) + * { + * Serial *fds = SERIAL_CAST(fd); + * // [driver specific code here] + * return 0; + * } + * \endcode + * + * The SERIAL_CAST() macro helps ensure that the passed object is + * really of type Serial. + * + * The KFile interface does not supply an open function: this is deliberate, + * because in embedded systems each device has its own init parameters. + * For the same reason, specific device settings like, for example, + * the baudrate, are not part of interface and should be handled by the + * driver-specific API. + * + * \author Bernie Innocenti + * \author Francesco Sacchi + * \author Daniele Basile + * + * $WIZ$ module_name = "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_kfile.h" + * $WIZ$ module_depends = "timer", "formatwr" + */ + +#ifndef KERN_KFILE_H +#define KERN_KFILE_H + +#include +#include +#include + +/* fwd decl */ +struct KFile; + +typedef int32_t kfile_off_t; ///< KFile offset type, used by kfile_seek(). + +/** + * Costants for repositioning read/write file offset. + * These are needed because on some embedded platforms + * ANSI I/O library may not be present. + */ +typedef enum KSeekMode +{ + KSM_SEEK_SET, ///< Seek from file beginning. + KSM_SEEK_CUR, ///< Seek from file current position. + KSM_SEEK_END, ///< Seek from file end. +} KSeekMode; + +/* + * Prototypes for KFile access functions. + * I/O file functions must be ANSI compliant. + * \note A KFile user can choose which function subset to implement, + * but has to set to NULL unimplemented features. + */ + +/* + * Read from file. + * \return the number of bytes read. + */ +typedef size_t (*ReadFunc_t) (struct KFile *fd, void *buf, size_t size); + +/* + * Write to file. + * \return the number of bytes written. + */ +typedef size_t (*WriteFunc_t) (struct KFile *fd, const void *buf, size_t size); + +/* + * Seek into file (if seekable). + * \return the new file offset or EOF on errors. + */ +typedef kfile_off_t (*SeekFunc_t) (struct KFile *fd, kfile_off_t offset, KSeekMode whence); + +/* + * Close and reopen file \a fd. + * The reopening is done with the former file parameters and access modes. + */ +typedef struct KFile * (*ReOpenFunc_t) (struct KFile *fd); + +/* + * Close file. + * \return 0 on success, EOF on errors. + */ +typedef int (*CloseFunc_t) (struct KFile *fd); + +/* + * Flush file I/O. + * \return 0 on success, EOF on errors. + */ +typedef int (*FlushFunc_t) (struct KFile *fd); + +/* + * Get file error mask. + * \return 0 on success or file error code, device specific. + */ +typedef int (*ErrorFunc_t) (struct KFile *fd); + +/* + * Clear errors. + */ +typedef void (*ClearErrFunc_t) (struct KFile *fd); + +/** + * Context data for callback functions which operate on + * pseudo files. + * + * \note Remember to add the corresponding accessor functions + * when extending this interface. + */ +typedef struct KFile +{ + ReadFunc_t read; + WriteFunc_t write; + ReOpenFunc_t reopen; + CloseFunc_t close; + SeekFunc_t seek; + FlushFunc_t flush; + ErrorFunc_t error; + ClearErrFunc_t clearerr; + DB(id_t _type); // Used to keep track, at runtime, of the class type. + + /* NOTE: these must _NOT_ be size_t on 16bit CPUs! */ + kfile_off_t seek_pos; + kfile_off_t size; +} KFile; + +/* + * Generic implementation of kfile_seek. + */ +kfile_off_t kfile_genericSeek(struct KFile *fd, kfile_off_t offset, KSeekMode whence); + +/* + * Generic implementation of kfile_reopen. + */ +struct KFile * kfile_genericReopen(struct KFile *fd); + +int kfile_genericClose(struct KFile *fd); + +/** @name KFile access functions + * Interface functions for KFile access. + * @{ + */ + +/** + * Read \a size bytes from file \a fd into \a buf. + * + * This function reads at most the number of requested bytes into the + * provided buffer. + * The value returned may be less than the requested bytes in case EOF is + * reached OR an error occurred. You need to check the error conditions + * using kfile_error() to understand which case happened. + * + * \note This function will block if there are less than \a size bytes + * to read. + * + * \param fd KFile context. + * \param buf User provided buffer. + * \param size Number of bytes to read. + * \return Number of bytes read. + */ +INLINE size_t kfile_read(struct KFile *fd, void *buf, size_t size) +{ + ASSERT(fd->read); + return fd->read(fd, buf, size); +} +int kfile_gets(struct KFile *fd, char *buf, int size); +int kfile_gets_echo(struct KFile *fd, char *buf, int size, bool echo); + +/** + * Copy \a size bytes from file \a src to \a dst. + * + * \param src Source KFile. + * \param dst Destionation KFile. + * \param size number of bytes to copy. + * \return the number of bytes copied. + */ +kfile_off_t kfile_copy(KFile *src, KFile *dst, kfile_off_t size); + +/** + * Write \a size bytes from buffer \a buf into KFile \a fd. + * + * Return value may be less than \a size. + * + * \param fd KFile context. + * \param buf User provided data. + * \param size Number of bytes to write. + * \return Number of bytes written. + */ +INLINE size_t kfile_write(struct KFile *fd, const void *buf, size_t size) +{ + ASSERT(fd->write); + return fd->write(fd, buf, size); +} + +int kfile_printf(struct KFile *fd, const char *format, ...); +int kfile_print(struct KFile *fd, const char *s); + +/** + * Seek into file (if seekable). + * + * Move \a fd file seek position of \a offset bytes from \a whence. + * + * \param fd KFile context. + * \param offset Offset bytes to move from position \a whence. + * \param whence Position where to start the seek. + * \return Current postion in the file. + */ +INLINE kfile_off_t kfile_seek(struct KFile *fd, kfile_off_t offset, KSeekMode whence) +{ + ASSERT(fd->seek); + return fd->seek(fd, offset, whence); +} + +/** + * Close and reopen file \a fd. + * The reopening is done with the former file parameters and access modes. + */ +INLINE KFile * kfile_reopen(struct KFile *fd) +{ + ASSERT(fd->reopen); + return fd->reopen(fd); +} + +/** + * Close file. + * \return 0 on success, EOF on errors. + */ +INLINE int kfile_close(struct KFile *fd) +{ + ASSERT(fd->close); + return fd->close(fd); +} + +/** + * Flush file I/O. + * \return 0 on success, EOF on errors. + */ +INLINE int kfile_flush(struct KFile *fd) +{ + ASSERT(fd->flush); + return fd->flush(fd); +} + +/** + * Get file error mask. + * \return 0 on success or file error code, device specific. + */ +INLINE int kfile_error(struct KFile *fd) +{ + ASSERT(fd->error); + return fd->error(fd); +} + +/** + * Clear errors. + */ +INLINE void kfile_clearerr(struct KFile *fd) +{ + ASSERT(fd->clearerr); + fd->clearerr(fd); +} + +int kfile_putc(int c, struct KFile *fd); ///< Generic putc implementation using kfile_write. +int kfile_getc(struct KFile *fd); ///< Generic getc implementation using kfile_read. +void kfile_resync(KFile *fd, mtime_t delay); +void kfile_init(struct KFile *fd); +/* @} */ + +/** \} */ //Defgroup io_kfile + +/* + * Kfile test function. + */ +int kfile_testSetup(void); +int kfile_testRun(void); +int kfile_testRunGeneric(KFile *fd, uint8_t *test_buf, uint8_t *save_buf, size_t size); +int kfile_testTearDown(void); + + +#endif /* KERN_KFILE_H */ diff --git a/bertos/io/kfile_block.c b/bertos/io/kfile_block.c new file mode 100644 index 0000000..e3bcdd3 --- /dev/null +++ b/bertos/io/kfile_block.c @@ -0,0 +1,131 @@ +/** + * \file + * + * + * \brief KFile interface over a KBlock. + * + * \author Francesco Sacchi + * \author Daniele Basile + * + */ + +#include "kfile_block.h" +#include + + +/** + * ID for KFile over a KBlock. + */ +#define KFT_KFILEBLOCK MAKE_ID('K', 'F', 'B', 'L') + +/** + * Convert + ASSERT from generic KFile to KFileBlock. + */ +INLINE KFileBlock * KFILEBLOCK_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_KFILEBLOCK); + return (KFileBlock *)fd; +} + +#define KFILEBLOCK(dir, fd, buf, size) \ +({ \ + KFileBlock *fb = KFILEBLOCK_CAST(fd); \ + size_t len = 0; \ + while (size) \ + { \ + block_idx_t id = (fd)->seek_pos / fb->blk->blk_size; \ + if (id >= fb->blk->blk_cnt) \ + break; \ + size_t offset = (fd)->seek_pos % fb->blk->blk_size; \ + size_t count = MIN(size, (size_t)(fb->blk->blk_size - offset)); \ + size_t ret_len = kblock_##dir(fb->blk, id, buf, offset, count); \ + size -= ret_len; \ + (fd)->seek_pos += ret_len; \ + buf = buf + ret_len; \ + len += ret_len; \ + if (ret_len != count) \ + break; \ + } \ + len; \ +}) + +static size_t kfileblock_read(struct KFile *fd, void *_buf, size_t size) +{ + uint8_t *buf = (uint8_t *)_buf; + return KFILEBLOCK(read, fd, buf, size); +} + +static size_t kfileblock_write(struct KFile *fd, const void *_buf, size_t size) +{ + const uint8_t *buf = (const uint8_t *)_buf; + return KFILEBLOCK(write, fd, buf, size); +} + +static int kfileblock_flush(struct KFile *fd) +{ + KFileBlock *fb = KFILEBLOCK_CAST(fd); + return kblock_flush(fb->blk); +} + +static int kfileblock_error(struct KFile *fd) +{ + KFileBlock *fb = KFILEBLOCK_CAST(fd); + return kblock_error(fb->blk); +} + +static void kfileblock_clearerr(struct KFile *fd) +{ + KFileBlock *fb = KFILEBLOCK_CAST(fd); + return kblock_clearerr(fb->blk); +} + +static int kfileblock_close(struct KFile *fd) +{ + KFileBlock *fb = KFILEBLOCK_CAST(fd); + return kblock_close(fb->blk); +} + +void kfileblock_init(KFileBlock *fb, KBlock *blk) +{ + ASSERT(fb); + ASSERT(blk); + memset(fb, 0, sizeof(*fb)); + kfile_init(&fb->fd); + DB(fb->fd._type = KFT_KFILEBLOCK); + fb->blk = blk; + fb->fd.size = blk->blk_cnt * blk->blk_size; + fb->fd.read = kfileblock_read; + fb->fd.write = kfileblock_write; + fb->fd.flush = kfileblock_flush; + fb->fd.error = kfileblock_error; + fb->fd.clearerr = kfileblock_clearerr; + fb->fd.close = kfileblock_close; +} diff --git a/bertos/io/kfile_block.h b/bertos/io/kfile_block.h new file mode 100644 index 0000000..c5dc26c --- /dev/null +++ b/bertos/io/kfile_block.h @@ -0,0 +1,100 @@ +/** + * \file + * + * + * \defgroup kfile_block KFile interface over KBlock + * \ingroup core + * \{ + * + * \brief KFile interface over a KBlock. + * + * With this module, you can access a KBlock device + * with the handy KFile interface. + * In order to achieve this, the block device must support partial block write. + * + * Error codes returned by kfile_error() are specific of the underlying + * KBlock implementation. + * + * Make sure you have trimmed the KBlock to avoid overwriting something. + * Example: + * \code + * // init a derived instance of KBlock + * // any will do. + * Flash flash; + * flash_init(&flash, 0); + * kblock_trim(&flash.blk, trim_start, internal_flash.blk.blk_cnt - trim_start); + * + * // now create and initialize the kfile_block instance + * KFileBlock kfb; + * kfileblock_init(&kfb, &flash.blk); + * + * // now you can access the Flash in a file like fashion + * kfile_read(&kfb.fd, buf, 20); + * \endcode + * + * \author Francesco Sacchi + * \author Daniele Basile + * + * $WIZ$ module_name = "kfile_block" + * $WIZ$ module_depends = "kfile", "kblock" + */ + +#ifndef IO_KFILE_BLOCK_H +#define IO_KFILE_BLOCK_H + +#include +#include +#include + +/** + * KFileBlock context. + */ +typedef struct KFileBlock +{ + KFile fd; ///< KFile context + KBlock *blk; ///< KBlock device +} KFileBlock; + +/** + * Init a KFile over KBlock. + * After this you can access your KBlock device with a handy KFile interface. + * + * \note The block device must support partial block write in order to support + * random write access. + * + * \param fb KFileBlock context. + * \param blk block device to be accessed with a KFile interface. + */ +void kfileblock_init(KFileBlock *fb, KBlock *blk); + +/** \} */ //defgroup kfile_block + +#endif /* IO_KFILE_KBLOCK_H */ diff --git a/bertos/io/kfile_test.c b/bertos/io/kfile_test.c new file mode 100644 index 0000000..16d6bc1 --- /dev/null +++ b/bertos/io/kfile_test.c @@ -0,0 +1,334 @@ +/** + * \file + * + * + * \brief Test suite for virtual KFile I/O interface. + * + * This module implements a test for some generic I/O interfaces for kfile. + * + * \author Francesco Sacchi + * \author Daniele Basile + */ + + +#include "kfile.h" +#include + +#include "cfg/cfg_kfile.h" +#include +#include +#include + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL KFILE_LOG_LEVEL +#define LOG_FORMAT KFILE_LOG_FORMAT +#include + +#include + +#include + +MOD_DEFINE(kfile_test); + +// Size of the "virtual" disk that +// we want to test. +#define BUF_TEST_LEN 3209 + +// Buffer for test +uint8_t test_buf[BUF_TEST_LEN]; +uint8_t test_buf_save[BUF_TEST_LEN]; + +uint8_t test_disk[BUF_TEST_LEN]; +KFileMem mem; + +/* + * Help function to init disk and the buffers. + */ +static void init_testBuf(void) +{ + + kprintf("Init fake buffer..\n"); + for (int i = 0; i < BUF_TEST_LEN; i++) + { + test_disk[i] = i; + kprintf("%d ", test_disk[i]); + } + kprintf("\nend\n"); + + memset(test_buf, 0, sizeof(test_buf)); + memset(test_buf_save, 0, sizeof(test_buf_save)); +} + +/** + * KFile read/write subtest. + * Try to write/read in the same \a f file location \a size bytes. + * \return true if all is ok, false otherwise + * \note Restore file position at exit (if no error) + * \note Test buffer \a buf must be filled with + * the following statement: + * 
+ * buf[i] = i & 0xff
+ *
+ */ +static bool kfile_rwTest(KFile *f, uint8_t *buf, size_t size) +{ + /* + * Write test buffer + */ + if (kfile_write(f, buf, size) != size) + { + LOG_ERR("error writing buf"); + return false; + } + + kfile_seek(f, -(kfile_off_t)size, KSM_SEEK_CUR); + + /* + * Reset test buffer + */ + memset(buf, 0, size); + + /* + * Read file in test buffer + */ + if (kfile_read(f, buf, size) != size) + { + LOG_ERR("error reading buf"); + return false; + } + + + kfile_seek(f, -(kfile_off_t)size, KSM_SEEK_CUR); + + /* + * Check test result + */ + for (size_t i = 0; i < size; i++) + { + if (buf[i] != (i & 0xff)) + { + LOG_ERR("error comparing at index [%d] read [%02x] expected [%02x]\n", i, buf[i], i); + return false; + } + } + + return true; +} + +/** + * KFile read/write test. + * This function write and read \a test_buf long \a size + * on \a fd handler. + * \a save_buf can be NULL or a buffer where to save previous file content. + */ +int kfile_testRunGeneric(KFile *fd, uint8_t *test_buf, uint8_t *save_buf, size_t size) +{ + + /* + * Part of test buf size that you would write. + * This var is used in test 3 to check kfile_write + * when writing beyond filesize limit. + */ + kfile_off_t len = size / 2; + + + /* Fill test buffer */ + for (size_t i = 0; i < size; i++) + test_buf[i] = (i & 0xff); + + /* + * If necessary, user can save content, + * for later restore. + */ + if (save_buf) + { + LOG_INFO("Saved content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + size); + kfile_read(fd, save_buf, size); + } + + /* TEST 1 BEGIN. */ + LOG_INFO("Test 1: write from pos 0 to [%ld]\n", (long)size); + + /* + * Seek to addr 0. + */ + if (kfile_seek(fd, 0, KSM_SEEK_SET) != 0) + goto kfile_test_end; + + /* + * Test read/write to address 0..size + */ + if (!kfile_rwTest(fd, test_buf, size)) + goto kfile_test_end; + + LOG_INFO("Test 1: ok!\n"); + + /* + * Restore previous read content. + */ + if (save_buf) + { + kfile_seek(fd, 0, KSM_SEEK_SET); + + if (kfile_write(fd, save_buf, size) != size) + goto kfile_test_end; + + LOG_INFO("Restore content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + size); + } + /* TEST 1 END. */ + + /* TEST 2 BEGIN. */ + LOG_INFO("Test 2: write from pos [%ld] to [%ld]\n", fd->size/2 , fd->size/2 + size); + + /* + * Go to half test size. + */ + kfile_seek(fd, (fd->size / 2), KSM_SEEK_SET); + + /* + * If necessary, user can save content + * for later restore. + */ + if (save_buf) + { + kfile_read(fd, save_buf, size); + kfile_seek(fd, -(kfile_off_t)size, KSM_SEEK_CUR); + LOG_INFO("Saved content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + size); + } + + /* + * Test read/write to address filesize/2 ... filesize/2 + size + */ + if (!kfile_rwTest(fd, test_buf, size)) + goto kfile_test_end; + + LOG_INFO("Test 2: ok!\n"); + + /* + * Restore previous content. + */ + if (save_buf) + { + kfile_seek(fd, -(kfile_off_t)size, KSM_SEEK_CUR); + + if (kfile_write(fd, save_buf, size) != size) + goto kfile_test_end; + + LOG_INFO("Restore content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + size); + } + + /* TEST 2 END. */ + + /* TEST 3 BEGIN. */ + LOG_INFO("Test 3: write outside of fd->size limit [%ld]\n", fd->size); + + /* + * Go to the Flash end + */ + kfile_seek(fd, -len, KSM_SEEK_END); + + /* + * If necessary, user can save content, + * for later restore. + */ + if (save_buf) + { + kfile_read(fd, save_buf, len); + kfile_seek(fd, -len, KSM_SEEK_CUR); + LOG_INFO("Saved content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + len); + } + + /* + * Test read/write to address (filesize - size) ... filesize + */ + if (kfile_rwTest(fd, test_buf, size)) + goto kfile_test_end; + + kprintf("Test 3: ok!\n"); + + /* + * Restore previous read content + */ + if (save_buf) + { + kfile_seek(fd, -len, KSM_SEEK_END); + + if ((kfile_off_t)kfile_write(fd, save_buf, len) != len) + goto kfile_test_end; + + LOG_INFO("Restore content..form [%ld] to [%ld]\n", fd->seek_pos, fd->seek_pos + len); + } + + /* TEST 3 END. */ + + kfile_close(fd); + return 0; + +kfile_test_end: + kfile_close(fd); + LOG_ERR("One kfile_test failed!\n"); + return EOF; +} + + + + +/** + * Setup all needed for kfile test + */ +int kfile_testSetup(void) +{ + MOD_INIT(kfile_test); + LOG_INFO("Mod init..ok\n"); + + // Init our backend and the buffers + kfilemem_init(&mem, test_disk, BUF_TEST_LEN); + init_testBuf(); + + return 0; +} + +int kfile_testRun(void) +{ + return kfile_testRunGeneric(&mem.fd, test_buf, test_buf_save, BUF_TEST_LEN); +} + +/** + * End a dataflash Test. + * (Unused) + */ +int kfile_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(kfile); + diff --git a/bertos/io/reblock.c b/bertos/io/reblock.c new file mode 100644 index 0000000..3c5009c --- /dev/null +++ b/bertos/io/reblock.c @@ -0,0 +1,126 @@ +/** + * \file + * + * + * \brief KBlock block size reducer + * + * This module allows access to a KBlock device using a smaller block + * size than the native one exported by the device. + * Note that the device being remapped needs either to be opened in buffered + * mode or to support partial writes. + * + * \author Stefano Fedrigo + * + * $WIZ$ module_depends = "kblock" + */ + +#include "reblock.h" +#include /* memset */ + + +static size_t reblock_readDirect(struct KBlock *b, block_idx_t idx, void *buf, size_t offset, size_t size) +{ + Reblock *r = REBLOCK_CAST(b); + + offset += idx % (r->native_fd->blk_size / r->fd.blk_size) * r->fd.blk_size; + idx = idx / (r->native_fd->blk_size / r->fd.blk_size); + + return kblock_read(r->native_fd, idx, buf, offset, size); +} + + +static size_t reblock_writeDirect(struct KBlock *b, block_idx_t idx, const void *buf, size_t offset, size_t size) +{ + Reblock *r = REBLOCK_CAST(b); + + offset += idx % (r->native_fd->blk_size / r->fd.blk_size) * r->fd.blk_size; + idx = idx / (r->native_fd->blk_size / r->fd.blk_size); + + return kblock_write(r->native_fd, idx, buf, offset, size); +} + + +static int reblock_error(struct KBlock *b) +{ + return kblock_error(REBLOCK_CAST(b)->native_fd); +} + +static void reblock_clearerr(struct KBlock *b) +{ + kblock_clearerr(REBLOCK_CAST(b)->native_fd); +} + +static int reblock_close(struct KBlock *b) +{ + return kblock_close(REBLOCK_CAST(b)->native_fd); +} + + +static const KBlockVTable reblock_vt = +{ + .readDirect = reblock_readDirect, + .writeDirect = reblock_writeDirect, + + .error = reblock_error, + .clearerr = reblock_clearerr, + .close = reblock_close, +}; + + +/* + * Initialize reblock device. + * + * \param rbl kblock reblock device + * \param native_fd kblock descriptor of the reblocked device + * \param new_blk_size new block size to export + * + * \note new block size is required to be a submultiple of the + * native device block size. + */ +void reblock_init(Reblock *rbl, KBlock *native_fd, size_t new_blk_size) +{ + ASSERT(new_blk_size); + ASSERT(new_blk_size < native_fd->blk_size); + ASSERT(native_fd->blk_size % new_blk_size == 0); + ASSERT(kblock_buffered(native_fd) || kblock_partialWrite(native_fd)); + + memset(rbl, 0, sizeof(Reblock)); + + DB(rbl->fd.priv.type = KBT_REBLOCK); + + rbl->fd.blk_size = new_blk_size; + rbl->fd.blk_cnt = native_fd->blk_cnt * (native_fd->blk_size / new_blk_size); + + rbl->fd.priv.flags |= KB_PARTIAL_WRITE; + rbl->fd.priv.vt = &reblock_vt; + + rbl->native_fd = native_fd; +} diff --git a/bertos/io/reblock.h b/bertos/io/reblock.h new file mode 100644 index 0000000..ae2df1b --- /dev/null +++ b/bertos/io/reblock.h @@ -0,0 +1,64 @@ +/** + * \file + * + * + * \brief KBlock block size reducer + * + * \author Stefano Fedrigo + * + * $WIZ$ module_name = "reblock" + * $WIZ$ module_depends = "kblock" + */ + +#ifndef REBLOCK_H +#define REBLOCK_H + +#include "kblock.h" + + +typedef struct Reblock +{ + KBlock fd; + KBlock *native_fd; +} Reblock; + +#define KBT_REBLOCK MAKE_ID('R', 'E', 'B', 'L') + + +INLINE Reblock *REBLOCK_CAST(KBlock *b) +{ + ASSERT(b->priv.type == KBT_REBLOCK); + return (Reblock *)b; +} + +void reblock_init(Reblock *rbl, KBlock *native_fd, size_t native_blk_size); + +#endif /* REBLOCK_H */ diff --git a/bertos/kern/coop.c b/bertos/kern/coop.c new file mode 100644 index 0000000..078724b --- /dev/null +++ b/bertos/kern/coop.c @@ -0,0 +1,32 @@ +/** + * \file + * + */ diff --git a/bertos/kern/irq.c b/bertos/kern/irq.c new file mode 100644 index 0000000..0bdbda8 --- /dev/null +++ b/bertos/kern/irq.c @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \brief Process scheduler (public interface). + * + * \author Bernie Innocenti + * + * Still in development, disable nightly test for now + * notest: avr + * notest: arm + */ +#include "irq.h" + +#include +#include +#include + +#include "cfg/cfg_proc.h" + +#include // FIXME: move POSIX stuff to irq_posix.h + +MOD_DEFINE(irq) + +// FIXME +static void (*irq_handlers[100])(void); + +/* signal handler */ +void irq_entry(int signum) +{ + irq_handlers[signum](); +} + +void irq_register(int irq, void (*callback)(void)) +{ + irq_handlers[irq] = callback; +} + +void irq_init(void) +{ + struct sigaction act; + + act.sa_handler = irq_entry; + sigemptyset(&act.sa_mask); + //sigaddset(&act.sa_mask, irq); + act.sa_flags = SA_RESTART; // | SA_SIGINFO; + + sigaction(SIGUSR1, &act, NULL); + sigaction(SIGALRM, &act, NULL); + + MOD_INIT(irq); +} diff --git a/bertos/kern/irq.h b/bertos/kern/irq.h new file mode 100644 index 0000000..3762de5 --- /dev/null +++ b/bertos/kern/irq.h @@ -0,0 +1,43 @@ +/** + * \file + * + * + * \brief Process scheduler (public interface). + * + * \author Bernie Innocenti + */ +#ifndef KERN_IRQ_H +#define KERN_IRQ_H + +void irq_entry(int irq); +void irq_register(int irq, void (*handler)(void)); +void irq_init(void); + +#endif // KERN_IRQ_H diff --git a/bertos/kern/kfile.h b/bertos/kern/kfile.h new file mode 100644 index 0000000..9a7cb6b --- /dev/null +++ b/bertos/kern/kfile.h @@ -0,0 +1,37 @@ +/** + * \file + * + * notest: all + * + */ + +#warning "This file is deprecated, include the new " +#include diff --git a/bertos/kern/monitor.c b/bertos/kern/monitor.c new file mode 100644 index 0000000..d0bf4a8 --- /dev/null +++ b/bertos/kern/monitor.c @@ -0,0 +1,166 @@ +/** + * \file + * + * + * \brief Monitor to check for stack overflows + * + * \author Giovanni Bajo + */ + + +#include "monitor.h" + +#if CONFIG_KERN_MONITOR + +#include "proc_p.h" +#include +#include + +#include + +#include + +#include + +#include /* CPU_STACK_GROWS_UPWARD */ + +/* Access to this list must be protected against the scheduler */ +static List MonitorProcs; + +void monitor_init(void) +{ + LIST_INIT(&MonitorProcs); +} + + +void monitor_add(Process *proc, const char *name) +{ + proc->monitor.name = name; + + PROC_ATOMIC(ADDTAIL(&MonitorProcs, &proc->monitor.link)); +} + + +void monitor_remove(Process *proc) +{ + PROC_ATOMIC(REMOVE(&proc->monitor.link)); +} + +void monitor_rename(Process *proc, const char *name) +{ + proc->monitor.name = name; +} + +size_t monitor_checkStack(cpu_stack_t *stack_base, size_t stack_size) +{ + cpu_stack_t *beg; + cpu_stack_t *cur; + cpu_stack_t *end; + int inc; + size_t sp_free; + + + beg = stack_base; + end = stack_base + stack_size / sizeof(cpu_stack_t); + inc = +1; + + if (CPU_STACK_GROWS_UPWARD) + { + SWAP(beg, end); + inc = -1; + } + + cur = beg; + while (cur != end) + { + if (*cur != CONFIG_KERN_STACKFILLCODE) + break; + + cur += inc; + } + + sp_free = ABS(cur - beg) * sizeof(cpu_stack_t); + return sp_free; +} + + +void monitor_report(void) +{ + Node *node; + int i; + + proc_forbid(); + kprintf("%-9s%-9s%-9s%-9s%s\n", "TCB", "SPbase", "SPsize", "SPfree", "Name"); + for (i = 0; i < 56; i++) + kputchar('-'); + kputchar('\n'); + + FOREACH_NODE(node, &MonitorProcs) + { + Process *p = containerof(node, Process, monitor.link); + size_t free = monitor_checkStack(p->stack_base, p->stack_size); + kprintf("%-9p%-9p%-9zu%-9zu%s\n", + p, p->stack_base, p->stack_size, free, p->monitor.name); + } + proc_permit(); +} + + +static void NORETURN monitor(void) +{ + Node *node; + + for (;;) + { + proc_forbid(); + FOREACH_NODE(node, &MonitorProcs) + { + Process *p = containerof(node, Process, monitor.link); + size_t free = monitor_checkStack(p->stack_base, p->stack_size); + + if (p->stack_base && free < 0x20) + kprintf("MONITOR: Free stack of process '%s' is only %u chars\n", + p->monitor.name, (unsigned int)free); + } + proc_permit(); + + /* Give some rest to the system */ + timer_delay(500); + } +} + +void monitor_start(size_t stacksize, cpu_stack_t *stack) +{ + struct Process *p = proc_new(monitor, NULL, stacksize, stack); + proc_setPri(p, -10); +} + +#endif /* CONFIG_KERN_MONITOR */ diff --git a/bertos/kern/monitor.h b/bertos/kern/monitor.h new file mode 100644 index 0000000..a414d87 --- /dev/null +++ b/bertos/kern/monitor.h @@ -0,0 +1,77 @@ +/** + * \file + * + * + * \brief Monitor to check for stack overflows + * + * + * \author Giovanni Bajo + * + * $WIZ$ module_name = "monitor" + * $WIZ$ module_depends = "kernel" + * $WIZ$ module_configuration = "bertos/cfg/cfg_monitor.h" + */ + +#ifndef KERN_MONITOR_H +#define KERN_MONITOR_H + +#include "cfg/cfg_monitor.h" + +#include + +/** + * Start the kernel monitor. It is a special process which checks every second the stacks of the + * running processes trying to detect stack overflows. + * + * \param stacksize Size of stack in chars + * \param stack Pointer to the stack that will be used by the monitor + * + * \note The stack is provided by the caller so that there is no wasted space if the monitor + * is not used. + */ +void monitor_start(size_t stacksize, cpu_stack_t *stack); + + +/** + * Manually check if a given stack has overflown. This is used to check for stacks + * of processes handled externally form the kernel, or for other stacks (for instance + * the interrupt supervisor stack). + * + * \note For this function to work, the stack must have been filled at startup with + * CONFIG_KERN_STACKFILLCODE. + */ +size_t monitor_checkStack(cpu_stack_t *stack_base, size_t stack_size); + + +/** Print a report of the stack status through kdebug */ +void monitor_report(void); + +#endif /* KERN_MONITOR_H */ diff --git a/bertos/kern/msg.h b/bertos/kern/msg.h new file mode 100644 index 0000000..6cbcc44 --- /dev/null +++ b/bertos/kern/msg.h @@ -0,0 +1,300 @@ +/** + * \file + * + * + * + * \defgroup kern_msg Message box IPC + * \ingroup kern + * \{ + * + * \brief Simple inter-process messaging system + * + * This module implements a common system for executing + * a user defined action calling a hook function. + * + * A message port is an abstraction used to exchange information + * asynchronously between processes or other entities such as + * interrupts and call-back functions. + * + * This form of IPC is higher-level than bare signals and + * semaphores, because it sets a policy for exchanging + * structured data with well-defined synchronization and + * ownership semantics. + * + * Before using it, a message port must be initialized by + * calling msg_initPort(), which associates the port with + * an Event object, which can be setup to signal a process + * or invoke a call-back hook. + * + * A process or interrupt routine can deliver messages to any + * message port by calling msg_put(). By sending a message, + * the sender temporarly or permanently transfers ownership + * of its associated data to the receiver. + * + * Queuing a message to a port automatically triggers the + * associated Event to notify the receiver. When the + * receiver wakes up, it usually invokes msg_get() to pick + * the next message from the port. + * + * \note + * When you put a message into a port, such message becomes + * unavailable until you retrieve it using msg_get(), eg. + * you must not delete it or put it into another port. + * + * Message ports can hold any number of pending messages, + * and receivers usually process them in FIFO order. + * Other scheduling policies are possible, but not implemented + * in this API. + * + * After the receiver has done processing a message, it replies + * it back to the sender with msg_reply(), which transfer + * ownership back to the original sender. Replies are delivered + * to a reply port, which is nothing more than another MsgPort + * structure designated by the sender. + * + * Returning messages to senders is not mandatory, but it provides + * a convenient way to provide some kind of result and simplify + * the resource allocation scheme at the same time. + * + * When using signals to receive messages in a process, you + * call sig_wait() in an event-loop to wake up when messages + * are delivered to any of your ports. When your process + * wakes up with the port signal active, multiple messages + * may already have queued up at the message port, and the + * process must process them all before returning to sleep. + * Signals don't keep a nesting count. + * + * A simple message loop works like this: + * + * \code + * // Our message port. + * static MsgPort test_port; + * + * // A test message with two parameters and a result. + * typedef struct + * { + * Msg msg; + * + * int x, y; + * int result; + * } TestMsg; + * + * + * PROC_DEFINE_STACK(sender_stack, KERN_MINSTACKSIZE); + * + * // A process that sends two messages and waits for replies. + * static void sender_proc(void) + * { + * MsgPort test_reply_port; + * TestMsg msg1; + * TestMsg msg2; + * Msg *reply; + * + * msg_initPort(&test_reply_port, + * event_createSignal(proc_current(), SIG_SINGLE); + * + * // Fill-in first message and send it out. + * msg1.x = 3; + * msg1.y = 2; + * msg1.msg.replyPort = &test_reply_port; + * msg_put(&test_port, &msg1.msg); + * + * // Fill-in second message and send it out too. + * msg2.x = 5; + * msg2.y = 4; + * msg2.msg.replyPort = &test_reply_port; + * msg_put(&test_port, &msg2.msg); + * + * // Wait for a reply... + * sig_wait(SIG_SINGLE); + * + reply = containerof(msg_get(&test_reply_port), TestMsg, msg); + * ASSERT(reply != NULL); + * ASSERT(reply->result == 5); + * + * // Get reply to second message. + * while (!(reply = containerof(msg_get(&test_reply_port), TestMsg, msg))) + * { + * // Not yet, be patient and wait some more. + * sig_wait(SIG_SINGLE); + * } + * + * ASSERT(reply->result == 9); + * } + * + * + * // Receive messages and do something boring with them. + * static void receiver_proc(void) + * { + * msg_initPort(&test_port, + * event_createSignal(proc_current(), SIG_EXAMPLE); + * + * proc_new(sender_proc, NULL,sizeof(sender_stack), sender_stack); + * + * for (;;) + * { + * sigmask_t sigs = sig_wait(SIG_EXAMPLE | more_signals); + * + * if (sigs & SIG_EXAMPLE) + * { + * TestMsg *emsg; + * while((emsg = containerof(msg_get(&test_port), TestMsg, msg))) + * { + * // Do something with the message + * emsg->result = emsg->x + emsg->y; + * msg_reply(emsg->msg); + * } + * } + * } + * } + * \endcode + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "msg" + * $WIZ$ module_depends = "event", "signal", "kernel" + */ + + +#ifndef KERN_MSG_H +#define KERN_MSG_H + +#include +#include +#include + +typedef struct MsgPort +{ + List queue; /**< Messages queued at this port. */ + Event event; /**< Event to trigger when a message arrives. */ +} MsgPort; + + +typedef struct Msg +{ + Node link; /**< Link into message port queue. */ + MsgPort *replyPort; /**< Port to which the msg is to be replied. */ + /* User data may follow */ +} Msg; + + +/** + * Lock a message port. + * + * This is required before reading or manipulating + * any field of the MsgPort structure. + * + * \note Ports may be locked multiple times and each + * call to msg_lockPort() must be paired with + * a corresponding call to msg_unlockPort(). + * + * \todo Add a configurable policy for locking against + * interrupts and locking with semaphorse. + * + * \see msg_unlockPort() + */ +INLINE void msg_lockPort(UNUSED_ARG(MsgPort *, port)) +{ + proc_forbid(); +} + +/** + * Unlock a message port. + * + * \see msg_lockPort() + */ +INLINE void msg_unlockPort(UNUSED_ARG(MsgPort *, port)) +{ + proc_permit(); +} + + +/** Initialize a message port */ +INLINE void msg_initPort(MsgPort *port, Event event) +{ + LIST_INIT(&port->queue); + port->event = event; +} + +/** Queue \a msg into \a port, triggering the associated event */ +INLINE void msg_put(MsgPort *port, Msg *msg) +{ + msg_lockPort(port); + ADDTAIL(&port->queue, &msg->link); + msg_unlockPort(port); + + event_do(&port->event); +} + +/** + * Get the first message from the queue of \a port. + * + * \return Pointer to the message or NULL if the port was empty. + */ +INLINE Msg *msg_get(MsgPort *port) +{ + Msg *msg; + + msg_lockPort(port); + msg = (Msg *)list_remHead(&port->queue); + msg_unlockPort(port); + + return msg; +} + +/** Peek the first message in the queue of \a port, or NULL if the port is empty. */ +INLINE Msg *msg_peek(MsgPort *port) +{ + Msg *msg; + + msg_lockPort(port); + msg = (Msg *)port->queue.head.succ; + if (LIST_EMPTY(&port->queue)) + msg = NULL; + msg_unlockPort(port); + + return msg; +} + +/** Send back (reply) \a msg to its sender. */ +INLINE void msg_reply(Msg *msg) +{ + msg_put(msg->replyPort, msg); +} + +/** \} */ //defgroup kern_msg + +int msg_testRun(void); +int msg_testSetup(void); +int msg_testTearDown(void); + +#endif /* KERN_MSG_H */ diff --git a/bertos/kern/msg_test.c b/bertos/kern/msg_test.c new file mode 100644 index 0000000..ab7bebd --- /dev/null +++ b/bertos/kern/msg_test.c @@ -0,0 +1,291 @@ +/** + * \file + * + * + * \brief Message test. + * + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + */ + +#include "cfg/cfg_timer.h" +#include +#include +#include + +#include +#include +#include + +#include + +#include + +/* + * In the nightly build test, signals are disables, so this + * code won't compile. + * Since this code is used when we run "make check" it will be + * compiled and therefor tested there. + */ +#if CONFIG_KERN_SIGNALS + + +// Global settings for the test. +#define MAX_GLOBAL_COUNT 11040 +#define TEST_TIME_OUT_MS 5000 +#define DELAY 5 + +// Settings for the test message. +//Process 0 +#define INC_PROC_T0 1 +#define DELAY_PROC_T0 INC_PROC_T0*DELAY +//Process 1 +#define INC_PROC_T1 3 +#define DELAY_PROC_T1 INC_PROC_T1*DELAY +//Process 2 +#define INC_PROC_T2 5 +#define DELAY_PROC_T2 INC_PROC_T2*DELAY +//Process 3 +#define INC_PROC_T3 7 +#define DELAY_PROC_T3 INC_PROC_T3*DELAY +//Process 4 +#define INC_PROC_T4 11 +#define DELAY_PROC_T4 INC_PROC_T4*DELAY +//Process 5 +#define INC_PROC_T5 13 +#define DELAY_PROC_T5 INC_PROC_T5*DELAY + +/* + * These macros generate the code needed to create the test process functions. + */ +#define RECV_PROC(num, sig) \ +static NORETURN void receiver_proc##num(void) \ +{ \ + TestMsg *rec_msg; \ + for(;;) \ + { \ + sig_wait(sig); \ + kprintf("Proc[%d]..get message\n", num); \ + rec_msg = containerof(msg_get(&test_port##num), TestMsg, msg); \ + timer_delay(rec_msg->delay); \ + rec_msg->result += rec_msg->val; \ + kprintf("Proc[%d]..process message val[%d],delay[%d],res[%d]\n", num, rec_msg->val, rec_msg->delay, rec_msg->result); \ + msg_reply(&rec_msg->msg); \ + process_num++; \ + kprintf("Proc[%d] reply\n", num); \ + } \ +} + +#define SEND_MSG(num) \ + do { \ + kprintf("Main send message to proc[%d]\n", num); \ + msg##num.msg.replyPort = &test_portMain; \ + msg_put(&test_port##num, &msg##num.msg); \ + } while(0) + +#define RECV_STACK(num) PROC_DEFINE_STACK(receiver_stack##num, KERN_MINSTACKSIZE * 2) +#define RECV_INIT_PROC(num) proc_new(receiver_proc##num, NULL, sizeof(receiver_stack##num), receiver_stack##num) +#define RECV_INIT_MSG(num, proc, sig) msg_initPort(&test_port##num, event_createSignal(proc, sig)) + +// A test message with the parameters and a result. +typedef struct +{ + Msg msg; + + int val; + int delay; + int result; +} TestMsg; + +// Global count to check if the test is going ok. +static int count = 0; +static int process_num; + +// Our message port. +static MsgPort test_port0; +static MsgPort test_port1; +static MsgPort test_port2; +static MsgPort test_port3; +static MsgPort test_port4; +static MsgPort test_port5; + +/* + * Generate the process to test message. + */ +RECV_PROC(0, SIG_USER0) +RECV_PROC(1, SIG_USER1) +RECV_PROC(2, SIG_USER2) +RECV_PROC(3, SIG_USER3) +RECV_PROC(4, SIG_SYSTEM5) +RECV_PROC(5, SIG_SYSTEM6) +/* + * These signal are already use from + * main process and the sig_waitWithTimeout functions, so we don't + * use it. + * + * RECV_PROC(6, SIG_SINGLE) + * RECV_PROC(7, SIG_TIMEOUT) + */ + +RECV_STACK(0); +RECV_STACK(1); +RECV_STACK(2); +RECV_STACK(3); +RECV_STACK(4); +RECV_STACK(5); + +/* + * Help function to fill the message to send + */ +static void fill_msg(TestMsg *msg, int val, int delay, int res) +{ + msg->val = val; + msg->delay = delay; + msg->result = res; +} + +/** + * Run signal test + */ +int msg_testRun(void) +{ + MsgPort test_portMain; + TestMsg msg0; + TestMsg msg1; + TestMsg msg2; + TestMsg msg3; + TestMsg msg4; + TestMsg msg5; + TestMsg *reply; + + // Allocate and start the test process + struct Process *recv0 = RECV_INIT_PROC(0); + struct Process *recv1 = RECV_INIT_PROC(1); + struct Process *recv2 = RECV_INIT_PROC(2); + struct Process *recv3 = RECV_INIT_PROC(3); + struct Process *recv4 = RECV_INIT_PROC(4); + struct Process *recv5 = RECV_INIT_PROC(5); + + kprintf("Run Message test..\n"); + + // Init port and message + RECV_INIT_MSG(Main, proc_current(), SIG_SINGLE); + RECV_INIT_MSG(0, recv0, SIG_USER0); + RECV_INIT_MSG(1, recv1, SIG_USER1); + RECV_INIT_MSG(2, recv2, SIG_USER2); + RECV_INIT_MSG(3, recv3, SIG_USER3); + RECV_INIT_MSG(4, recv4, SIG_SYSTEM5); + RECV_INIT_MSG(5, recv5, SIG_SYSTEM6); + + // Fill-in first message and send it out. + fill_msg(&msg0, INC_PROC_T0, DELAY_PROC_T0, 0); + fill_msg(&msg1, INC_PROC_T1, DELAY_PROC_T1, 0); + fill_msg(&msg2, INC_PROC_T2, DELAY_PROC_T2, 0); + fill_msg(&msg3, INC_PROC_T3, DELAY_PROC_T3, 0); + fill_msg(&msg4, INC_PROC_T4, DELAY_PROC_T4, 0); + fill_msg(&msg5, INC_PROC_T5, DELAY_PROC_T5, 0); + + + // Send and wait the message + for (int i = 0; i < 23; ++i) + { + process_num = 0; + SEND_MSG(0); + SEND_MSG(1); + SEND_MSG(2); + SEND_MSG(3); + SEND_MSG(4); + SEND_MSG(5); + while(1) + { + sigmask_t sigs = sig_waitTimeout(SIG_SINGLE, ms_to_ticks(TEST_TIME_OUT_MS)); + if (sigs & SIG_SINGLE) + { + // Wait for a reply... + while ((reply = (TestMsg *)msg_get(&test_portMain))) + { + count += reply->result; + kprintf("Main recv[%d] count[%d]\n", reply->result, count); + } + } + + if (process_num == 6) + break; + + if (sigs & SIG_TIMEOUT) + { + kputs("Main: sig timeout\n"); + goto error; + } + } + } + + if(count == MAX_GLOBAL_COUNT) + { + kprintf("Message test finished..ok!\n"); + return 0; + } + +error: + kprintf("Message test finished..fail!\n"); + return -1; +} + +int msg_testSetup(void) +{ + kdbg_init(); + + kprintf("Init Timer.."); + timer_init(); + kprintf("Done.\n"); + + kprintf("Init Process.."); + proc_init(); + kprintf("Done.\n"); + return 0; +} + +int msg_testTearDown(void) +{ + kputs("TearDown Message test.\n"); + return 0; +} + +TEST_MAIN(msg); + +#endif /* CONFIG_KERN_SIGNALS */ diff --git a/bertos/kern/preempt.c b/bertos/kern/preempt.c new file mode 100644 index 0000000..078724b --- /dev/null +++ b/bertos/kern/preempt.c @@ -0,0 +1,32 @@ +/** + * \file + * + */ diff --git a/bertos/kern/proc.c b/bertos/kern/proc.c new file mode 100644 index 0000000..f2054c3 --- /dev/null +++ b/bertos/kern/proc.c @@ -0,0 +1,678 @@ +/** + * \file + * + * + * \brief Simple cooperative and preemptive multitasking scheduler. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Andrea Righi + */ + +#include "proc_p.h" +#include "proc.h" + +#include "cfg/cfg_proc.h" +#define LOG_LEVEL KERN_LOG_LEVEL +#define LOG_FORMAT KERN_LOG_FORMAT +#include + +#include "cfg/cfg_monitor.h" +#include // ROUND_UP2 +#include +#include // CONFIG_DEPEND() + +#include +#include +#include +#include + +#if CONFIG_KERN_HEAP + #include +#endif + +#include /* memset() */ + +#define PROC_SIZE_WORDS (ROUND_UP2(sizeof(Process), sizeof(cpu_stack_t)) / sizeof(cpu_stack_t)) + +/* + * The scheduer tracks ready processes by enqueuing them in the + * ready list. + * + * \note Access to the list must occur while interrupts are disabled. + */ +REGISTER List proc_ready_list; + +/* + * Holds a pointer to the TCB of the currently running process. + * + * \note User applications should use proc_current() to retrieve this value. + */ +REGISTER Process *current_process; + +/** The main process (the one that executes main()). */ +static struct Process main_process; + +#if CONFIG_KERN_HEAP + +/** + * Local heap dedicated to allocate the memory used by the processes. + */ +static HEAP_DEFINE_BUF(heap_buf, CONFIG_KERN_HEAP_SIZE); +static Heap proc_heap; + +/* + * Keep track of zombie processes (processes that are exiting and need to + * release some resources). + * + * \note Access to the list must occur while kernel preemption is disabled. + */ +static List zombie_list; + +#endif /* CONFIG_KERN_HEAP */ + +/* + * Check if the process context switch can be performed directly by the + * architecture-dependent asm_switch_context() or if it must be delayed + * because we're in the middle of an ISR. + * + * Return true if asm_switch_context() can be executed, false + * otherwise. + * + * NOTE: if an architecture does not implement IRQ_RUNNING() this function + * always returns true. + */ +#define CONTEXT_SWITCH_FROM_ISR() (!IRQ_RUNNING()) + +/* + * Save context of old process and switch to new process. + */ +static void proc_context_switch(Process *next, Process *prev) +{ + cpu_stack_t *dummy; + + if (UNLIKELY(next == prev)) + return; + /* + * If there is no old process, we save the old stack pointer into a + * dummy variable that we ignore. In fact, this happens only when the + * old process has just exited. + */ + asm_switch_context(&next->stack, prev ? &prev->stack : &dummy); +} + +static void proc_initStruct(Process *proc) +{ + /* Avoid warning for unused argument. */ + (void)proc; + +#if CONFIG_KERN_SIGNALS + proc->sig.recv = 0; + proc->sig.wait = 0; +#endif + +#if CONFIG_KERN_HEAP + proc->flags = 0; +#endif + +#if CONFIG_KERN_PRI + proc->link.pri = 0; + +# if CONFIG_KERN_PRI_INHERIT + proc->orig_pri = proc->inh_link.pri = proc->link.pri; + proc->inh_blocked_by = NULL; + LIST_INIT(&proc->inh_list); +# endif +#endif +} + +MOD_DEFINE(proc); + +void proc_init(void) +{ + LIST_INIT(&proc_ready_list); + +#if CONFIG_KERN_HEAP + LIST_INIT(&zombie_list); + heap_init(&proc_heap, heap_buf, sizeof(heap_buf)); +#endif + /* + * We "promote" the current context into a real process. The only thing we have + * to do is create a PCB and make it current. We don't need to setup the stack + * pointer because it will be written the first time we switch to another process. + */ + proc_initStruct(&main_process); + current_process = &main_process; + +#if CONFIG_KERN_MONITOR + monitor_init(); + monitor_add(current_process, "main"); +#endif + MOD_INIT(proc); +} + + +#if CONFIG_KERN_HEAP + +/** + * Free all the resources of all zombie processes previously added to the zombie + * list. + */ +static void proc_freeZombies(void) +{ + Process *proc; + + while (1) + { + PROC_ATOMIC(proc = (Process *)list_remHead(&zombie_list)); + if (proc == NULL) + return; + + if (proc->flags & PF_FREESTACK) + { + PROC_ATOMIC(heap_freemem(&proc_heap, proc->stack_base, + proc->stack_size + PROC_SIZE_WORDS * sizeof(cpu_stack_t))); + } + } +} + +/** + * Enqueue a process in the zombie list. + */ +static void proc_addZombie(Process *proc) +{ + Node *node; +#if CONFIG_KERN_PREEMPT + ASSERT(!proc_preemptAllowed()); +#endif + +#if CONFIG_KERN_PRI + node = &(proc)->link.link; +#else + node = &(proc)->link; +#endif + LIST_ASSERT_VALID(&zombie_list); + ADDTAIL(&zombie_list, node); +} + +#endif /* CONFIG_KERN_HEAP */ + +/** + * Create a new process, starting at the provided entry point. + * + * + * \note The function + * \code + * proc_new(entry, data, stacksize, stack) + * \endcode + * is a more convenient way to create a process, as you don't have to specify + * the name. + * + * \return Process structure of new created process + * if successful, NULL otherwise. + */ +struct Process *proc_new_with_name(UNUSED_ARG(const char *, name), void (*entry)(void), iptr_t data, size_t stack_size, cpu_stack_t *stack_base) +{ + Process *proc; + LOG_INFO("name=%s", name); +#if CONFIG_KERN_HEAP + bool free_stack = false; + + /* + * Free up resources of a zombie process. + * + * We're implementing a kind of lazy garbage collector here for + * efficiency reasons: we can avoid to introduce overhead into another + * kernel task dedicated to free up resources (e.g., idle) and we're + * not introducing any overhead into the scheduler after a context + * switch (that would be *very* bad, because the scheduler runs with + * IRQ disabled). + * + * In this way we are able to release the memory of the zombie tasks + * without disabling IRQs and without introducing any significant + * overhead in any other kernel task. + */ + proc_freeZombies(); + + /* Did the caller provide a stack for us? */ + if (!stack_base) + { + /* Did the caller specify the desired stack size? */ + if (!stack_size) + stack_size = KERN_MINSTACKSIZE; + + /* Allocate stack dinamically */ + PROC_ATOMIC(stack_base = + (cpu_stack_t *)heap_allocmem(&proc_heap, stack_size)); + if (stack_base == NULL) + return NULL; + + free_stack = true; + } + +#else // CONFIG_KERN_HEAP + + /* Stack must have been provided by the user */ + ASSERT2(IS_VALID_PTR(stack_base), "Invalid stack pointer. Did you forget to \ + enable CONFIG_KERN_HEAP?"); + ASSERT2(stack_size, "Stack size cannot be 0."); + +#endif // CONFIG_KERN_HEAP + +#if CONFIG_KERN_MONITOR + /* + * Fill-in the stack with a special marker to help debugging. + * On 64bit platforms, CONFIG_KERN_STACKFILLCODE is larger + * than an int, so the (int) cast is required to silence the + * warning for truncating its size. + */ + memset(stack_base, (int)CONFIG_KERN_STACKFILLCODE, stack_size); +#endif + + /* Initialize the process control block */ + if (CPU_STACK_GROWS_UPWARD) + { + proc = (Process *)stack_base; + proc->stack = stack_base + PROC_SIZE_WORDS; + // On some architecture stack should be aligned, so we do it. + proc->stack = (cpu_stack_t *)((uintptr_t)proc->stack + (sizeof(cpu_aligned_stack_t) - ((uintptr_t)proc->stack % sizeof(cpu_aligned_stack_t)))); + if (CPU_SP_ON_EMPTY_SLOT) + proc->stack++; + } + else + { + proc = (Process *)(stack_base + stack_size / sizeof(cpu_stack_t) - PROC_SIZE_WORDS); + // On some architecture stack should be aligned, so we do it. + proc->stack = (cpu_stack_t *)((uintptr_t)proc - ((uintptr_t)proc % sizeof(cpu_aligned_stack_t))); + if (CPU_SP_ON_EMPTY_SLOT) + proc->stack--; + } + /* Ensure stack is aligned */ + ASSERT((uintptr_t)proc->stack % sizeof(cpu_aligned_stack_t) == 0); + + stack_size -= PROC_SIZE_WORDS * sizeof(cpu_stack_t); + proc_initStruct(proc); + proc->user_data = data; + +#if CONFIG_KERN_HEAP | CONFIG_KERN_MONITOR + proc->stack_base = stack_base; + proc->stack_size = stack_size; + #if CONFIG_KERN_HEAP + if (free_stack) + proc->flags |= PF_FREESTACK; + #endif +#endif + proc->user_entry = entry; + CPU_CREATE_NEW_STACK(proc->stack); + +#if CONFIG_KERN_MONITOR + monitor_add(proc, name); +#endif + + /* Add to ready list */ + ATOMIC(SCHED_ENQUEUE(proc)); + + return proc; +} + +/** + * Return the name of the specified process. + * + * NULL is a legal argument and will return the name "". + */ +const char *proc_name(struct Process *proc) +{ +#if CONFIG_KERN_MONITOR + return proc ? proc->monitor.name : ""; +#else + (void)proc; + return "---"; +#endif +} + +/// Return the name of the currently running process +const char *proc_currentName(void) +{ + return proc_name(proc_current()); +} + +/// Rename a process +void proc_rename(struct Process *proc, const char *name) +{ +#if CONFIG_KERN_MONITOR + monitor_rename(proc, name); +#else + (void)proc; (void)name; +#endif +} + + +#if CONFIG_KERN_PRI +/** + * Change the scheduling priority of a process. + * + * Process piorities are signed ints, whereas a larger integer value means + * higher scheduling priority. The default priority for new processes is 0. + * The idle process runs with the lowest possible priority: INT_MIN. + * + * A process with a higher priority always preempts lower priority processes. + * Processes of equal priority share the CPU time according to a simple + * round-robin policy. + * + * As a general rule to maximize responsiveness, compute-bound processes + * should be assigned negative priorities and tight, interactive processes + * should be assigned positive priorities. + * + * To avoid interfering with system background activities such as input + * processing, application processes should remain within the range -10 + * and +10. + */ +void proc_setPri(struct Process *proc, int pri) +{ +#if CONFIG_KERN_PRI_INHERIT + int new_pri; + + /* + * Whatever it will happen below, this is the new + * original priority of the process, i.e., the priority + * it has without taking inheritance under account. + */ + proc->orig_pri = pri; + + /* If not changing anything we can just leave */ + if ((new_pri = __prio_proc(proc)) == proc->link.pri) + return; + + /* + * Actual process priority is the highest among its + * own priority and the one of the top-priority + * process that it is blocking (returned by + * __prio_proc()). + */ + proc->link.pri = new_pri; +#else + if (proc->link.pri == pri) + return; + + proc->link.pri = pri; +#endif // CONFIG_KERN_PRI_INHERIT + + if (proc != current_process) + ATOMIC(sched_reenqueue(proc)); +} +#endif // CONFIG_KERN_PRI + +INLINE void proc_run(void) +{ + void (*entry)(void) = current_process->user_entry; + + LOG_INFO("New process starting at %p", entry); + entry(); +} + +/** + * Entry point for all the processes. + */ +void proc_entry(void) +{ + /* + * Return from a context switch assumes interrupts are disabled, so + * we need to explicitly re-enable them as soon as possible. + */ + IRQ_ENABLE; + /* Call the actual process's entry point */ + proc_run(); + proc_exit(); +} + +/** + * Terminate the current process + */ +void proc_exit(void) +{ + LOG_INFO("%p:%s", current_process, proc_currentName()); + +#if CONFIG_KERN_MONITOR + monitor_remove(current_process); +#endif + + proc_forbid(); +#if CONFIG_KERN_HEAP + /* + * Set the task as zombie, its resources will be freed in proc_new() in + * a lazy way, when another process will be created. + */ + proc_addZombie(current_process); +#endif + current_process = NULL; + proc_permit(); + + proc_switch(); + + /* never reached */ + ASSERT(0); +} + +/** + * Call the scheduler and eventually replace the current running process. + */ +static void proc_schedule(void) +{ + Process *old_process = current_process; + + IRQ_ASSERT_DISABLED(); + + /* Poll on the ready queue for the first ready process */ + LIST_ASSERT_VALID(&proc_ready_list); + while (!(current_process = (struct Process *)list_remHead(&proc_ready_list))) + { + /* + * Make sure we physically reenable interrupts here, no matter what + * the current task status is. This is important because if we + * are idle-spinning, we must allow interrupts, otherwise no + * process will ever wake up. + * + * During idle-spinning, an interrupt can occur and it may + * modify \p proc_ready_list. To ensure that compiler reload this + * variable every while cycle we call CPU_MEMORY_BARRIER. + * The memory barrier ensure that all variables used in this context + * are reloaded. + * \todo If there was a way to write sig_wait() so that it does not + * disable interrupts while waiting, there would not be any + * reason to do this. + */ + IRQ_ENABLE; + CPU_IDLE; + MEMORY_BARRIER; + IRQ_DISABLE; + } + if (CONTEXT_SWITCH_FROM_ISR()) + proc_context_switch(current_process, old_process); + /* This RET resumes the execution on the new process */ + LOG_INFO("resuming %p:%s\n", current_process, proc_currentName()); +} + +#if CONFIG_KERN_PREEMPT +/* Global preemption nesting counter */ +cpu_atomic_t preempt_count; + +/* + * The time sharing interval: when a process is scheduled on a CPU it gets an + * amount of CONFIG_KERN_QUANTUM clock ticks. When these ticks expires and + * preemption is enabled a new process is selected to run. + */ +int _proc_quantum; + +/** + * Check if we need to schedule another task + */ +bool proc_needPreempt(void) +{ + if (UNLIKELY(current_process == NULL)) + return false; + if (!proc_preemptAllowed()) + return false; + if (LIST_EMPTY(&proc_ready_list)) + return false; + return preempt_quantum() ? prio_next() > prio_curr() : + prio_next() >= prio_curr(); +} + +/** + * Preempt the current task. + */ +void proc_preempt(void) +{ + IRQ_ASSERT_DISABLED(); + ASSERT(current_process); + + /* Perform the kernel preemption */ + LOG_INFO("preempting %p:%s\n", current_process, proc_currentName()); + /* We are inside a IRQ context, so ATOMIC is not needed here */ + SCHED_ENQUEUE(current_process); + preempt_reset_quantum(); + proc_schedule(); +} +#endif /* CONFIG_KERN_PREEMPT */ + +/* Immediately switch to a particular process */ +static void proc_switchTo(Process *proc) +{ + Process *old_process = current_process; + + SCHED_ENQUEUE(current_process); + preempt_reset_quantum(); + current_process = proc; + proc_context_switch(current_process, old_process); +} + +/** + * Give the control of the CPU to another process. + * + * \note Assume the current process has been already added to a wait queue. + * + * \warning This should be considered an internal kernel function, even if it + * is allowed, usage from application code is strongly discouraged. + */ +void proc_switch(void) +{ + ASSERT(proc_preemptAllowed()); + ATOMIC( + preempt_reset_quantum(); + proc_schedule(); + ); +} + +/** + * Immediately wakeup a process, dispatching it to the CPU. + */ +void proc_wakeup(Process *proc) +{ + ASSERT(proc_preemptAllowed()); + ASSERT(current_process); + IRQ_ASSERT_DISABLED(); + + if (prio_proc(proc) >= prio_curr()) + proc_switchTo(proc); + else + SCHED_ENQUEUE_HEAD(proc); +} + +/** + * Voluntarily release the CPU. + */ +void proc_yield(void) +{ + Process *proc; + + /* + * Voluntary preemption while preemption is disabled is considered + * illegal, as not very useful in practice. + * + * ASSERT if it happens. + */ + ASSERT(proc_preemptAllowed()); + IRQ_ASSERT_ENABLED(); + + IRQ_DISABLE; + proc = (struct Process *)list_remHead(&proc_ready_list); + if (proc) + proc_switchTo(proc); + IRQ_ENABLE; +} diff --git a/bertos/kern/proc.h b/bertos/kern/proc.h new file mode 100644 index 0000000..1cacc2b --- /dev/null +++ b/bertos/kern/proc.h @@ -0,0 +1,463 @@ +/** + * \file + * + * + * \defgroup kern_proc Process (Threads) management + * \ingroup kern + * \{ + * + * \brief BeRTOS Kernel core (Process scheduler). + * + * This is the core kernel module. It allows you to create new processes + * (which are called \b threads in other systems) and set the priority of + * each process. + * + * A process needs a work area (called \b stack) to run. To create a process, + * you need to declare a stack area, then create the process. + * You may also pass NULL for the stack area, if you have enabled kernel heap: + * in this case the stack will be automatically allocated. + * + * Example: + * \code + * PROC_DEFINE_STACK(stack1, 200); + * + * void NORETURN proc1_run(void) + * { + * while (1) + * { + * LOG_INFO("I'm alive!\n"); + * timer_delay(1000); + * } + * } + * + * + * int main() + * { + * Process *p1 = proc_new(proc1_run, NULL, stack1, sizeof(stack1)); + * // here the process is already running + * proc_setPri(p1, 2); + * // ... + * } + * \endcode + * + * The Process struct must be regarded as an opaque data type, do not access + * any of its members directly. + * + * The entry point function should be declared as NORETURN, because it will + * remove a warning and enable compiler optimizations. + * + * You can temporarily disable preemption calling proc_forbid(); remember + * to enable it again calling proc_permit(). + * + * \note You should hardly need to manually release the CPU; however you + * can do it using the cpu_relax() function. It is illegal to release + * the CPU with preemption disabled. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "kernel" + * $WIZ$ module_configuration = "bertos/cfg/cfg_proc.h" + * $WIZ$ module_depends = "switch_ctx" + * $WIZ$ module_supports = "not atmega103" + */ + +#ifndef KERN_PROC_H +#define KERN_PROC_H + +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" +#include "cfg/cfg_monitor.h" +#include "sem.h" + +#include // Node, PriNode + +#include +#include // ASSERT() + +#include // cpu_stack_t +#include // CPU_SAVED_REGS_CNT + +/* The following silents warnings on nightly tests. We need to regenerate + * all the projects before this can be removed. + */ +#ifndef CONFIG_KERN_PRI_INHERIT +#define CONFIG_KERN_PRI_INHERIT 0 +#endif + +/* + * WARNING: struct Process is considered private, so its definition can change any time + * without notice. DO NOT RELY on any field defined here, use only the interface + * functions below. + * + * You have been warned. + */ +typedef struct Process +{ +#if CONFIG_KERN_PRI + PriNode link; /**< Link Process into scheduler lists */ +# if CONFIG_KERN_PRI_INHERIT + PriNode inh_link; /**< Link Process into priority inheritance lists */ + List inh_list; /**< Priority inheritance list for this Process */ + Semaphore *inh_blocked_by; /**< Semaphore blocking this Process */ + int orig_pri; /**< Process priority without considering inheritance */ +# endif +#else + Node link; /**< Link Process into scheduler lists */ +#endif + cpu_stack_t *stack; /**< Per-process SP */ + iptr_t user_data; /**< Custom data passed to the process */ + +#if CONFIG_KERN_SIGNALS + Signal sig; +#endif + +#if CONFIG_KERN_HEAP + uint16_t flags; /**< Flags */ +#endif + +#if CONFIG_KERN_HEAP | CONFIG_KERN_MONITOR + cpu_stack_t *stack_base; /**< Base of process stack */ + size_t stack_size; /**< Size of process stack */ +#endif + + /* The actual process entry point */ + void (*user_entry)(void); + +#if CONFIG_KERN_MONITOR + struct ProcMonitor + { + Node link; + const char *name; + } monitor; +#endif + +} Process; + +/** + * Initialize the process subsystem (kernel). + * It must be called before using any process related function. + */ +void proc_init(void); + +struct Process *proc_new_with_name(const char *name, void (*entry)(void), iptr_t data, size_t stacksize, cpu_stack_t *stack); + +#if !CONFIG_KERN_MONITOR + /** + * Create a new named process and schedules it for execution. + * + * When defining the stacksize take into account that you may want at least: + * \li save all the registers for each nested function call; + * \li have memory for the struct Process, which is positioned at the bottom + * of the stack; + * \li have some memory for temporary variables inside called functions. + * + * The value given by KERN_MINSTACKSIZE is rather safe to use in the first place. + * + * \param entry Function that the process will execute. + * \param data Pointer to user data. + * \param size Length of the stack. + * \param stack Pointer to the memory area to be used as a stack. + * + * \return Process structure of new created process + * if successful, NULL otherwise. + */ + #define proc_new(entry,data,size,stack) proc_new_with_name(NULL,(entry),(data),(size),(stack)) +#else + #define proc_new(entry,data,size,stack) proc_new_with_name(#entry,(entry),(data),(size),(stack)) +#endif + +/** + * Terminate the execution of the current process. + */ +void proc_exit(void); + +/* + * Public scheduling class methods. + */ +void proc_yield(void); + +#if CONFIG_KERN_PREEMPT +bool proc_needPreempt(void); +void proc_preempt(void); +#else +INLINE bool proc_needPreempt(void) +{ + return false; +} + +INLINE void proc_preempt(void) +{ +} +#endif + +void proc_rename(struct Process *proc, const char *name); +const char *proc_name(struct Process *proc); +const char *proc_currentName(void); + +/** + * Return a pointer to the user data of the current process. + * + * To obtain user data, just call this function inside the process. Remember to cast + * the returned pointer to the correct type. + * \return Pointer to the user data of the current process. + */ +INLINE iptr_t proc_currentUserData(void) +{ + extern struct Process *current_process; + return current_process->user_data; +} + +int proc_testSetup(void); +int proc_testRun(void); +int proc_testTearDown(void); + +/** + * Return the context structure of the currently running process. + * + * The details of the Process structure are private to the scheduler. + * The address returned by this function is an opaque pointer that can + * be passed as an argument to other process-related functions. + */ +INLINE struct Process *proc_current(void) +{ + extern struct Process *current_process; + return current_process; +} + +#if CONFIG_KERN_PRI + void proc_setPri(struct Process *proc, int pri); +#else + INLINE void proc_setPri(UNUSED_ARG(struct Process *,proc), UNUSED_ARG(int, pri)) + { + } +#endif + +#if CONFIG_KERN_PREEMPT + + /** + * Disable preemptive task switching. + * + * The scheduler maintains a global nesting counter. Task switching is + * effectively re-enabled only when the number of calls to proc_permit() + * matches the number of calls to proc_forbid(). + * + * \note Calling functions that could sleep while task switching is disabled + * is dangerous and unsupported. + * + * \note proc_permit() expands inline to 1-2 asm instructions, so it's a + * very efficient locking primitive in simple but performance-critical + * situations. In all other cases, semaphores offer a more flexible and + * fine-grained locking primitive. + * + * \sa proc_permit() + */ + INLINE void proc_forbid(void) + { + extern cpu_atomic_t preempt_count; + /* + * We don't need to protect the counter against other processes. + * The reason why is a bit subtle. + * + * If a process gets here, preempt_forbid_cnt can be either 0, + * or != 0. In the latter case, preemption is already disabled + * and no concurrency issues can occur. + * + * In the former case, we could be preempted just after reading the + * value 0 from memory, and a concurrent process might, in fact, + * bump the value of preempt_forbid_cnt under our nose! + * + * BUT: if this ever happens, then we won't get another chance to + * run until the other process calls proc_permit() to re-enable + * preemption. At this point, the value of preempt_forbid_cnt + * must be back to 0, and thus what we had originally read from + * memory happens to be valid. + * + * No matter how hard you think about it, and how complicated you + * make your scenario, the above holds true as long as + * "preempt_forbid_cnt != 0" means that no task switching is + * possible. + */ + ++preempt_count; + + /* + * Make sure preempt_count is flushed to memory so the preemption + * softirq will see the correct value from now on. + */ + MEMORY_BARRIER; + } + + /** + * Re-enable preemptive task switching. + * + * \sa proc_forbid() + */ + INLINE void proc_permit(void) + { + extern cpu_atomic_t preempt_count; + + /* + * This is to ensure any global state changed by the process gets + * flushed to memory before task switching is re-enabled. + */ + MEMORY_BARRIER; + /* No need to protect against interrupts here. */ + ASSERT(preempt_count > 0); + --preempt_count; + /* + * This ensures preempt_count is flushed to memory immediately so the + * preemption interrupt sees the correct value. + */ + MEMORY_BARRIER; + } + + /** + * \return true if preemptive task switching is allowed. + * \note This accessor is needed because preempt_count + * must be absoultely private. + */ + INLINE bool proc_preemptAllowed(void) + { + extern cpu_atomic_t preempt_count; + return (preempt_count == 0); + } +#else /* CONFIG_KERN_PREEMPT */ + #define proc_forbid() /* NOP */ + #define proc_permit() /* NOP */ + #define proc_preemptAllowed() (true) +#endif /* CONFIG_KERN_PREEMPT */ + +/** Deprecated, use the proc_preemptAllowed() macro. */ +#define proc_allowed() proc_preemptAllowed() + +/** + * Execute a block of \a CODE atomically with respect to task scheduling. + */ +#define PROC_ATOMIC(CODE) \ + do { \ + proc_forbid(); \ + CODE; \ + proc_permit(); \ + } while(0) + +/** + * Default stack size for each thread, in bytes. + * + * The goal here is to allow a minimal task to save all of its + * registers twice, plus push a maximum of 32 variables on the + * stack. We add also struct Process size since we save it into the process' + * stack. + * + * The actual size computed by the default formula greatly depends on what + * options are active and on the architecture. + * + * Note that on most 16bit architectures, interrupts will also + * run on the stack of the currently running process. Nested + * interrupts will greatly increases the amount of stack space + * required per process. Use irqmanager to minimize stack + * usage. + */ + +#if (ARCH & ARCH_EMUL) + /* We need a large stack because system libraries are bloated */ + #define KERN_MINSTACKSIZE 65536 +#else + #if CONFIG_KERN_PREEMPT + /* + * A preemptible kernel needs a larger stack compared to the + * cooperative case. A task can be interrupted anytime in each + * node of the call graph, at any level of depth. This may + * result in a higher stack consumption, to call the ISR, save + * the current user context and to execute the kernel + * preemption routines implemented as ISR prologue and + * epilogue. All these calls are nested into the process stack. + * + * So, to reduce the risk of stack overflow/underflow problems + * add a x2 to the portion stack reserved to the user process. + */ + #define KERN_MINSTACKSIZE \ + (sizeof(Process) + CPU_SAVED_REGS_CNT * 2 * sizeof(cpu_stack_t) \ + + 32 * sizeof(int) * 2) + #else + #define KERN_MINSTACKSIZE \ + (sizeof(Process) + CPU_SAVED_REGS_CNT * 2 * sizeof(cpu_stack_t) \ + + 32 * sizeof(int)) + #endif /* CONFIG_KERN_PREEMPT */ + +#endif + +#ifndef CONFIG_KERN_MINSTACKSIZE + /* For backward compatibility */ + #define CONFIG_KERN_MINSTACKSIZE KERN_MINSTACKSIZE +#else + #warning FIXME: This macro is deprecated, use KERN_MINSTACKSIZE instead +#endif + +/** + * Utility macro to allocate a stack of size \a size. + * + * This macro define a static stack for one process and do + * check if given stack size is enough to run process. + * \note If you plan to use kprintf() and similar functions, you will need + * at least KERN_MINSTACKSIZE * 2 bytes. + * + * \param name Variable name for the stack. + * \param size Stack size in bytes. It must be at least KERN_MINSTACKSIZE. + */ +#define PROC_DEFINE_STACK(name, size) \ + cpu_stack_t name[((size) + sizeof(cpu_stack_t) - 1) / sizeof(cpu_stack_t)]; \ + STATIC_ASSERT((size) >= KERN_MINSTACKSIZE); + +/* Memory fill codes to help debugging */ +#if CONFIG_KERN_MONITOR + #include + #if (SIZEOF_CPUSTACK_T == 1) + /* 8bit cpu_stack_t */ + #define CONFIG_KERN_STACKFILLCODE 0xA5 + #define CONFIG_KERN_MEMFILLCODE 0xDB + #elif (SIZEOF_CPUSTACK_T == 2) + /* 16bit cpu_stack_t */ + #define CONFIG_KERN_STACKFILLCODE 0xA5A5 + #define CONFIG_KERN_MEMFILLCODE 0xDBDB + #elif (SIZEOF_CPUSTACK_T == 4) + /* 32bit cpu_stack_t */ + #define CONFIG_KERN_STACKFILLCODE 0xA5A5A5A5UL + #define CONFIG_KERN_MEMFILLCODE 0xDBDBDBDBUL + #elif (SIZEOF_CPUSTACK_T == 8) + /* 64bit cpu_stack_t */ + #define CONFIG_KERN_STACKFILLCODE 0xA5A5A5A5A5A5A5A5ULL + #define CONFIG_KERN_MEMFILLCODE 0xDBDBDBDBDBDBDBDBULL + #else + #error No cpu_stack_t size supported! + #endif +#endif +/** \} */ //defgroup kern_proc + +#endif /* KERN_PROC_H */ diff --git a/bertos/kern/proc_p.h b/bertos/kern/proc_p.h new file mode 100644 index 0000000..2b68554 --- /dev/null +++ b/bertos/kern/proc_p.h @@ -0,0 +1,229 @@ +/** + * \file + * + * + * \brief Internal scheduler structures and definitions for processes. + * + * \author Bernie Innocenti + */ + +#ifndef KERN_PROC_P_H +#define KERN_PROC_P_H + +#include "cfg/cfg_proc.h" +#include "cfg/cfg_monitor.h" + +#include + +#include /* for cpu_stack_t */ +#include // IRQ_ASSERT_DISABLED() + +#include // struct Process + +#ifndef asm_switch_context +/** + * CPU dependent context switching routines. + * + * Saving and restoring the context on the stack is done by a CPU-dependent + * support routine which usually needs to be written in assembly. + */ +EXTERN_C void asm_switch_context(cpu_stack_t **new_sp, cpu_stack_t **save_sp); +#endif + +/** + * \name Flags for Process.flags. + * \{ + */ +#define PF_FREESTACK BV(0) /**< Free the stack when process dies */ +/*\}*/ + + +/** Track running processes. */ +extern REGISTER Process *current_process; + +/** + * Track ready processes. + * + * Access to this list must be performed with interrupts disabled + */ +extern REGISTER List proc_ready_list; + +#if CONFIG_KERN_PRI +# if CONFIG_KERN_PRI_INHERIT + #define __prio_orig(proc) (proc->orig_pri) + #define __prio_inh(proc) (LIST_EMPTY(&(proc)->inh_list) ? INT_MIN : \ + ((PriNode *)LIST_HEAD(&proc->inh_list))->pri) + #define __prio_proc(proc) (__prio_inh(proc) > __prio_orig(proc) ? \ + __prio_inh(proc) : __prio_orig(proc)) +# endif + #define prio_next() (LIST_EMPTY(&proc_ready_list) ? INT_MIN : \ + ((PriNode *)LIST_HEAD(&proc_ready_list))->pri) + #define prio_proc(proc) (proc->link.pri) + #define prio_curr() prio_proc(current_process) + + #define SCHED_ENQUEUE_INTERNAL(proc) \ + LIST_ENQUEUE(&proc_ready_list, &(proc)->link) + #define SCHED_ENQUEUE_HEAD_INTERNAL(proc) \ + LIST_ENQUEUE_HEAD(&proc_ready_list, &(proc)->link) +#else + #define prio_next() 0 + #define prio_proc(proc) 0 + #define prio_curr() 0 + + #define SCHED_ENQUEUE_INTERNAL(proc) ADDTAIL(&proc_ready_list, &(proc)->link) + #define SCHED_ENQUEUE_HEAD_INTERNAL(proc) ADDHEAD(&proc_ready_list, &(proc)->link) +#endif + +/** + * Enqueue a process in the ready list. + * + * Always use this macro to instert a process in the ready list, as its + * might vary to implement a different scheduling algorithms. + * + * \note Access to the scheduler ready list must be performed with + * interrupts disabled. + */ +#define SCHED_ENQUEUE(proc) do { \ + IRQ_ASSERT_DISABLED(); \ + LIST_ASSERT_VALID(&proc_ready_list); \ + SCHED_ENQUEUE_INTERNAL(proc); \ + } while (0) + +#define SCHED_ENQUEUE_HEAD(proc) do { \ + IRQ_ASSERT_DISABLED(); \ + LIST_ASSERT_VALID(&proc_ready_list); \ + SCHED_ENQUEUE_HEAD_INTERNAL(proc); \ + } while (0) + + +#if CONFIG_KERN_PRI +/** + * Changes the priority of an already enqueued process. + * + * Searches and removes the process from the ready list, then uses LIST_ENQUEUE(() + * to insert again to fix priority. + * + * No action is performed for processes that aren't in the ready list, eg. in semaphore queues. + * + * \note Performance could be improved with a different implementation of priority list. + */ +INLINE void sched_reenqueue(struct Process *proc) +{ + IRQ_ASSERT_DISABLED(); + LIST_ASSERT_VALID(&proc_ready_list); + Node *n; + PriNode *pos = NULL; + FOREACH_NODE(n, &proc_ready_list) + { + if (n == &proc->link.link) + { + pos = (PriNode *)n; + break; + } + } + + // only remove and enqueue again if process is already in the ready list + // otherwise leave it alone + if (pos) + { + REMOVE(&proc->link.link); + LIST_ENQUEUE(&proc_ready_list, &proc->link); + } +} +#endif //CONFIG_KERN_PRI + +/* Process trampoline */ +void proc_entry(void); + +/* Schedule another process *without* adding the current one to the ready list. */ +void proc_switch(void); + +/* Immediately schedule a particular process bypassing the scheduler. */ +void proc_wakeup(Process *proc); + +/* Initialize a scheduler class. */ +void proc_schedInit(void); + +#if CONFIG_KERN_MONITOR + /** Initialize the monitor */ + void monitor_init(void); + + /** Register a process into the monitor */ + void monitor_add(Process *proc, const char *name); + + /** Unregister a process from the monitor */ + void monitor_remove(Process *proc); + + /** Rename a process */ + void monitor_rename(Process *proc, const char *name); +#endif /* CONFIG_KERN_MONITOR */ + +/* + * Quantum related macros are used in the + * timer module and must be empty when + * kernel is disabled. + */ +#if (CONFIG_KERN && CONFIG_KERN_PREEMPT) +INLINE int preempt_quantum(void) +{ + extern int _proc_quantum; + return _proc_quantum; +} + +INLINE void proc_decQuantum(void) +{ + extern int _proc_quantum; + if (_proc_quantum > 0) + _proc_quantum--; +} + +INLINE void preempt_reset_quantum(void) +{ + extern int _proc_quantum; + _proc_quantum = CONFIG_KERN_QUANTUM; +} +#else /* !(CONFIG_KERN && CONFIG_KERN_PREEMPT) */ +INLINE int preempt_quantum(void) +{ + return 0; +} + +INLINE void proc_decQuantum(void) +{ +} + +INLINE void preempt_reset_quantum(void) +{ +} +#endif /* (CONFIG_KERN && CONFIG_KERN_PREEMPT) */ + +#endif /* KERN_PROC_P_H */ diff --git a/bertos/kern/proc_test.c b/bertos/kern/proc_test.c new file mode 100644 index 0000000..b2319fa --- /dev/null +++ b/bertos/kern/proc_test.c @@ -0,0 +1,406 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + */ + +#include // sprintf +#include // memset + +#include +#include +#include + +#include +#include +#include + +enum +{ + TEST_OK = 1, + TEST_FAIL = 2, +}; + +/* Number of tasks to spawn */ +#define TASKS 8 + +static char name[TASKS][32]; + +static unsigned int done[TASKS]; + +static cpu_atomic_t barrier[TASKS]; +static cpu_atomic_t main_barrier; + +/* Base time delay for processes using timer_delay() */ +#define DELAY 5 + +// Define process stacks for test. +#define WORKER_STACK_SIZE KERN_MINSTACKSIZE * 3 + +#if CONFIG_KERN_HEAP +#define WORKER_STACK(id) NULL +#else /* !CONFIG_KERN_HEAP */ +static cpu_stack_t worker_stack[TASKS][(WORKER_STACK_SIZE + + sizeof(cpu_stack_t) - 1) / sizeof(cpu_stack_t)]; +#define WORKER_STACK(id) (&worker_stack[id][0]) +#endif /* CONFIG_KERN_HEAP */ + +static int prime_numbers[] = +{ + 1, 3, 5, 7, 11, 13, 17, 19, + 23, 29, 31, 37, 41, 43, 47, 53, +}; +STATIC_ASSERT(TASKS <= countof(prime_numbers)); + +#if CONFIG_KERN_PREEMPT +/* Time to run each preemptible thread (in seconds) */ +#define TIME 10 + +static unsigned long preempt_counter[TASKS]; +static unsigned int preempt_done[TASKS]; +#endif + +static void cleanup(void) +{ +#if CONFIG_KERN_PREEMPT + // Clear shared data (this is needed when this testcase is embedded in + // the demo application). + memset(preempt_counter, 0, sizeof(preempt_counter)); + memset(preempt_done, 0, sizeof(preempt_done)); +#endif /* CONFIG_KERN_PREEMPT */ + memset(done, 0, sizeof(done)); + memset(barrier, 0, sizeof(barrier)); + main_barrier = 0; +} + +static void worker(void) +{ + ssize_t pid = (ssize_t)proc_currentUserData(); + long tot = prime_numbers[pid - 1]; + unsigned int my_count = 0; + int i; + + barrier[pid - 1] = 1; + /* Synchronize on the main barrier */ + while (!main_barrier) + proc_yield(); + for (i = 0; i < tot; i++) + { + my_count++; + PROC_ATOMIC(kprintf("> %s[%zd] running\n", __func__, pid)); + timer_delay(tot * DELAY); + } + done[pid - 1] = 1; + PROC_ATOMIC(kprintf("> %s[%zd] completed\n", __func__, pid)); +} + +static int worker_test(void) +{ + ssize_t i; + + // Init the test processes + cleanup(); + kputs("Run Proc test..\n"); + for (i = 0; i < TASKS; i++) + { + name[i][0] = '\0'; + snprintf(&name[i][0], sizeof(name[i]), "worker_%zd", i + 1); + name[i][sizeof(name[i]) - 1] = '\0'; + proc_new_with_name(name[i], worker, (iptr_t)(i + 1), + WORKER_STACK_SIZE, WORKER_STACK(i)); + } + /* Synchronize on start */ + while (1) + { + for (i = 0; i < TASKS; i++) + if (!barrier[i]) + break; + if (i == TASKS) + break; + proc_yield(); + } + main_barrier = 1; + MEMORY_BARRIER; + kputs("> Main: Processes started\n"); + while (1) + { + for (i = 0; i < TASKS; i++) + { + if (!done[i]) + break; + } + if (i == TASKS) + break; + monitor_report(); + timer_delay(93); + } + kputs("> Main: process test finished..ok!\n"); + return 0; +} + +#if CONFIG_KERN_PREEMPT +static void preempt_worker(void) +{ + ssize_t pid = (ssize_t)proc_currentUserData(); + unsigned long *my_count = &preempt_counter[pid - 1]; + ticks_t start, stop; + int i; + + barrier[pid - 1] = 1; + /* Synchronize on the main barrier */ + while (!main_barrier) + proc_yield(); + PROC_ATOMIC(kprintf("> %s[%zd] running\n", __func__, pid)); + start = timer_clock(); + stop = ms_to_ticks(TIME * 1000); + while (timer_clock() - start < stop) + { + IRQ_ASSERT_ENABLED(); + (*my_count)++; + /* be sure to wrap to a value different than 0 */ + if (UNLIKELY(*my_count == (unsigned int)~0)) + *my_count = 1; + } + PROC_ATOMIC(kprintf("> %s[%zd] completed: (counter = %lu)\n", + __func__, pid, *my_count)); + for (i = 0; i < TASKS; i++) + if (!preempt_counter[i]) + { + preempt_done[pid - 1] = TEST_FAIL; + return; + } + preempt_done[pid - 1] = TEST_OK; +} + +static int preempt_worker_test(void) +{ + unsigned long score = 0; + ssize_t i; + + // Init the test processes + cleanup(); + kputs("Run Preemption test..\n"); + for (i = 0; i < TASKS; i++) + { + name[i][0] = '\0'; + snprintf(&name[i][0], sizeof(name[i]), + "preempt_worker_%zd", i + 1); + name[i][sizeof(name[i]) - 1] = '\0'; + proc_new_with_name(name[i], preempt_worker, (iptr_t)(i + 1), + WORKER_STACK_SIZE, WORKER_STACK(i)); + } + kputs("> Main: Processes created\n"); + /* Synchronize on start */ + while (1) + { + for (i = 0; i < TASKS; i++) + if (!barrier[i]) + break; + if (i == TASKS) + break; + proc_yield(); + } + /* Now all threads have been created, start them all */ + main_barrier = 1; + MEMORY_BARRIER; + kputs("> Main: Processes started\n"); + while (1) + { + for (i = 0; i < TASKS; i++) + { + if (!preempt_done[i]) + break; + else if (preempt_done[i] == TEST_FAIL) + { + kputs("> Main: process test finished..fail!\n"); + return -1; + } + } + if (i == TASKS) + break; + monitor_report(); + timer_delay(1000); + } + for (i = 0; i < TASKS; i++) + score += preempt_counter[i]; + kputs("> Main: process test finished..ok!\n"); + kprintf("> Score: %lu\n", score); + return 0; +} +#endif /* CONFIG_KERN_PREEMPT */ + +#if CONFIG_KERN_SIGNALS & CONFIG_KERN_PRI + +// Define params to test priority +#define PROC_PRI_TEST(num) static void proc_pri_test##num(void) \ +{ \ + struct Process *main_proc = (struct Process *) proc_currentUserData(); \ + kputs("> Process: " #num "\n"); \ + sig_send(main_proc, SIG_USER##num); \ +} + +// Default priority is 0 +#define PROC_PRI_TEST_INIT(num, proc) \ +do { \ + struct Process *p = proc_new(proc_pri_test##num, (proc), \ + WORKER_STACK_SIZE, \ + WORKER_STACK(num)); \ + proc_setPri(p, num + 1); \ +} while (0) + +PROC_PRI_TEST(0) +PROC_PRI_TEST(1) +PROC_PRI_TEST(2) + +static int prio_worker_test(void) +{ + struct Process *curr = proc_current(); + int orig_pri = curr->link.pri; + int ret = 0; + + // test process priority + // main process must have the higher priority to check signals received + proc_setPri(proc_current(), 10); + + kputs("Run Priority test..\n"); + // the order in which the processes are created is important! + PROC_PRI_TEST_INIT(0, curr); + PROC_PRI_TEST_INIT(1, curr); + PROC_PRI_TEST_INIT(2, curr); + + // signals must be: USER2, 1, 0 in order + sigmask_t signals = sig_wait(SIG_USER0 | SIG_USER1 | SIG_USER2); + if (!(signals & SIG_USER2)) + { + ret = -1; + goto out; + } + signals = sig_wait(SIG_USER0 | SIG_USER1 | SIG_USER2); + if (!(signals & SIG_USER1)) + { + ret = -1; + goto out; + } + signals = sig_wait(SIG_USER0 | SIG_USER1 | SIG_USER2); + if (!(signals & SIG_USER0)) + { + ret = -1; + goto out; + } + // All processes must have quit by now, but just in case... + signals = sig_waitTimeout(SIG_USER0 | SIG_USER1 | SIG_USER2, 200); + if (signals & (SIG_USER0 | SIG_USER1 | SIG_USER2)) + { + ret = -1; + goto out; + } + if (signals & SIG_TIMEOUT) + { + kputs("Priority test successfull.\n"); + } +out: + proc_setPri(proc_current(), orig_pri); + if (ret != 0) + kputs("Priority test failed.\n"); + return ret; +} +#endif /* CONFIG_KERN_SIGNALS & CONFIG_KERN_PRI */ + +/** + * Process scheduling test + */ +int proc_testRun(void) +{ + /* Start tests */ + worker_test(); +#if CONFIG_KERN_PREEMPT + preempt_worker_test(); +#endif /* CONFIG_KERN_PREEMPT */ +#if CONFIG_KERN_SIGNALS & CONFIG_KERN_PRI + prio_worker_test(); +#endif /* CONFIG_KERN_SIGNALS & CONFIG_KERN_PRI */ + return 0; +} + +int proc_testSetup(void) +{ + kdbg_init(); + + kprintf("Init Timer.."); + timer_init(); + kprintf("Done.\n"); + + kprintf("Init Process.."); + proc_init(); + kprintf("Done.\n"); + + return 0; +} + +int proc_testTearDown(void) +{ + kputs("TearDown Process test.\n"); + return 0; +} + +TEST_MAIN(proc); diff --git a/bertos/kern/proc_test/coop_heap_test.c b/bertos/kern/proc_test/coop_heap_test.c new file mode 100644 index 0000000..fe84f01 --- /dev/null +++ b/bertos/kern/proc_test/coop_heap_test.c @@ -0,0 +1,65 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP " >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + * + */ + +#include "../proc_test.c" diff --git a/bertos/kern/proc_test/coop_msg_test.c b/bertos/kern/proc_test/coop_msg_test.c new file mode 100644 index 0000000..2c1e280 --- /dev/null +++ b/bertos/kern/proc_test/coop_msg_test.c @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Message test. + * + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../msg_test.c" diff --git a/bertos/kern/proc_test/coop_pri_heap_test.c b/bertos/kern/proc_test/coop_pri_heap_test.c new file mode 100644 index 0000000..caf78fc --- /dev/null +++ b/bertos/kern/proc_test/coop_pri_heap_test.c @@ -0,0 +1,67 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP " >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + * + */ + +#include "../proc_test.c" diff --git a/bertos/kern/proc_test/coop_pri_test.c b/bertos/kern/proc_test/coop_pri_test.c new file mode 100644 index 0000000..b2996ab --- /dev/null +++ b/bertos/kern/proc_test/coop_pri_test.c @@ -0,0 +1,63 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + * + */ + +#include "../proc_test.c" diff --git a/bertos/kern/proc_test/coop_sem_test.c b/bertos/kern/proc_test/coop_sem_test.c new file mode 100644 index 0000000..bf067fb --- /dev/null +++ b/bertos/kern/proc_test/coop_sem_test.c @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Semaphore test. + * + * + * \author Daniele Basile + * \author Stefano Fedrigo + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_sem.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SEMAPHORES" >> $cfgdir/cfg_sem.h + * $test$: echo "#define CONFIG_KERN_SEMAPHORES 1" >> $cfgdir/cfg_sem.h + * + * notest:all + */ + +#include "../sem_test.c" diff --git a/bertos/kern/proc_test/coop_signal_test.c b/bertos/kern/proc_test/coop_signal_test.c new file mode 100644 index 0000000..1ec46a0 --- /dev/null +++ b/bertos/kern/proc_test/coop_signal_test.c @@ -0,0 +1,48 @@ +/** + * \file + * + * + * \brief Signals test. + * + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../signal_test.c" diff --git a/bertos/kern/proc_test/coop_test.c b/bertos/kern/proc_test/coop_test.c new file mode 100644 index 0000000..c8ec86a --- /dev/null +++ b/bertos/kern/proc_test/coop_test.c @@ -0,0 +1,60 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/bertos/kern/proc_test/preempt_heap_test.c b/bertos/kern/proc_test/preempt_heap_test.c new file mode 100644 index 0000000..5040a56 --- /dev/null +++ b/bertos/kern/proc_test/preempt_heap_test.c @@ -0,0 +1,66 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP " >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/bertos/kern/proc_test/preempt_msg_test.c b/bertos/kern/proc_test/preempt_msg_test.c new file mode 100644 index 0000000..bf1614f --- /dev/null +++ b/bertos/kern/proc_test/preempt_msg_test.c @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Message test. + * + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest:all + */ + +#include "../msg_test.c" diff --git a/bertos/kern/proc_test/preempt_pri_heap_test.c b/bertos/kern/proc_test/preempt_pri_heap_test.c new file mode 100644 index 0000000..1788870 --- /dev/null +++ b/bertos/kern/proc_test/preempt_pri_heap_test.c @@ -0,0 +1,68 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP " >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_HEAP_SIZE" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_HEAP_SIZE 2097152L" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/bertos/kern/proc_test/preempt_pri_test.c b/bertos/kern/proc_test/preempt_pri_test.c new file mode 100644 index 0000000..a75150b --- /dev/null +++ b/bertos/kern/proc_test/preempt_pri_test.c @@ -0,0 +1,64 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/bertos/kern/proc_test/preempt_sem_test.c b/bertos/kern/proc_test/preempt_sem_test.c new file mode 100644 index 0000000..6e0d7c6 --- /dev/null +++ b/bertos/kern/proc_test/preempt_sem_test.c @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Semaphore test. + * + * + * \author Daniele Basile + * \author Stefano Fedrigo + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_sem.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SEMAPHORES" >> $cfgdir/cfg_sem.h + * $test$: echo "#define CONFIG_KERN_SEMAPHORES 1" >> $cfgdir/cfg_sem.h + * + * notest:all + */ + +#include "../sem_test.c" diff --git a/bertos/kern/proc_test/preempt_signal_test.c b/bertos/kern/proc_test/preempt_signal_test.c new file mode 100644 index 0000000..c668231 --- /dev/null +++ b/bertos/kern/proc_test/preempt_signal_test.c @@ -0,0 +1,50 @@ +/** + * \file + * + * + * \brief Signals test. + * + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../signal_test.c" diff --git a/bertos/kern/proc_test/preempt_test.c b/bertos/kern/proc_test/preempt_test.c new file mode 100644 index 0000000..b1c0e13 --- /dev/null +++ b/bertos/kern/proc_test/preempt_test.c @@ -0,0 +1,62 @@ +/** + * \file + * + * + * + * \brief Test kernel preemption. + * + * This testcase spawns TASKS parallel threads that runs for TIME seconds. They + * continuously spin updating a global counter (one counter for each thread). + * + * At exit each thread checks if the others have been che chance to update + * their own counter. If not, it means the preemption didn't occur and the + * testcase returns an error message. + * + * Otherwise, if all the threads have been able to update their own counter it + * means preemption successfully occurs, since there is no active sleep inside + * each thread's implementation. + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PREEMPT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PREEMPT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_monitor.h $cfgdir/ + * $test$: sed -i "s/CONFIG_KERN_MONITOR 0/CONFIG_KERN_MONITOR 1/" $cfgdir/cfg_monitor.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + * + * notest: all + */ + +#include "../proc_test.c" diff --git a/bertos/kern/sem.c b/bertos/kern/sem.c new file mode 100644 index 0000000..dc19f4a --- /dev/null +++ b/bertos/kern/sem.c @@ -0,0 +1,306 @@ +/** + * \file + * + * + * \brief Semaphore based synchronization services. + * + * \author Bernie Innocenti + */ + +#include "sem.h" +#include + +#include // ASSERT_IRQ_DISABLED() + +#include +#include +#include + +INLINE void sem_verify(struct Semaphore *s) +{ + (void)s; + ASSERT(s); + LIST_ASSERT_VALID(&s->wait_queue); + ASSERT(s->nest_count >= 0); + ASSERT(s->nest_count < 128); // heuristic max +} + +#if CONFIG_KERN_PRI && CONFIG_KERN_PRI_INHERIT + +#define proc_updatePri(proc) (proc_setPri(proc, (proc)->orig_pri)) + + +/** + * Priority inheritance update algorithm. + * + * The algorithm checks and boosts the priority of the semaphore's + * current owner and also processes in that block the owner, which + * form a chain of blocking processes. + * + * Note that the priority of a process in the chain of blocked + * processes is always greater or equal than the priority of a process + * before in the chain. See the diagram below: + * P1 --. S1 ---> P2 --. S2 ---> P3 + * prio_proc(P2) >= prio_proc(P1) always. + */ +INLINE void pri_inheritBlock(Semaphore *s) +{ + Process *owner = s->owner; + + /* + * Enqueue the blocking process in the owner's inheritance + * list. Notice that such process might have inherited its + * current priority from someone else. + */ + current_process->inh_link.pri = __prio_proc(current_process); + LIST_ENQUEUE(&owner->inh_list, ¤t_process->inh_link); + current_process->inh_blocked_by = s; + + /* + * As long as a process has the power of boosting the priority + * of its lock owner... + */ + while (current_process->inh_link.pri > prio_proc(owner)) { + Process *p = owner; + + /* Boost the priority of the owner */ + proc_updatePri(p); + + /* If the owner is not blocked, we're done */ + if (!p->inh_blocked_by) + break; + + /* + * Otherwise update the position of the owner + * (which is `p' at each round!) in the inheritance + * list it lies in and set up `owner' for the + * next round. + */ + REMOVE(&p->inh_link.link); + p->inh_link.pri = prio_proc(p); + owner = p->inh_blocked_by->owner; + LIST_ENQUEUE(&owner->inh_list, &p->inh_link); + } +} + + +/** + * Priority inheritance unblock algorithm. + * + * Pass the priority inheritance list from the current owner to the + * process that will take ownership of the semaphore next, potentially + * boosting its priority. + * + * \param proc The process that will take ownership of the semaphore. + */ +INLINE void pri_inheritUnblock(Semaphore *s, Process *proc) +{ + Process *owner = s->owner; + Node *n, *temp; + Process *p; + + /* + * This process has nothing more to do on a priority + * inheritance list. + */ + REMOVE(&proc->inh_link.link); + proc->inh_blocked_by = NULL; + + /* + * Each process in the former owner's priority inheritance + * list that is blocked on 's' needs to be removed from + * there and added to the priority inheritance list of + * this process, since it's going to be the new owner for + * that semaphore. + */ + FOREACH_NODE_SAFE(n, temp, &owner->inh_list) { + p = containerof(n, Process, inh_link.link); + /* Ensures only the processes blocked on 's' are affected! */ + if (p->inh_blocked_by == s) { + REMOVE(&p->inh_link.link); + LIST_ENQUEUE(&proc->inh_list, &p->inh_link); + + /* And again, update the priority of the new owner */ + if (p->inh_link.pri > prio_proc(proc)) + proc_updatePri(proc); + } + } + + proc_updatePri(owner); +} +#else +INLINE void pri_inheritBlock(UNUSED_ARG(Semaphore *, s)) +{ +} + +INLINE void pri_inheritUnblock(UNUSED_ARG(Semaphore *, s), UNUSED_ARG(Process *, proc)) +{ +} +#endif /* CONFIG_KERN_PRI_INHERIT */ + + +/** + * \brief Initialize a Semaphore structure. + */ +void sem_init(struct Semaphore *s) +{ + LIST_INIT(&s->wait_queue); + s->owner = NULL; + s->nest_count = 0; +} + + +/** + * \brief Attempt to lock a semaphore without waiting. + * + * \return true in case of success, false if the semaphore + * was already locked by someone else. + * + * \note each call to sem_attempt() must be matched by a + * call to sem_release(). + * + * \see sem_obtain() sem_release() + */ +bool sem_attempt(struct Semaphore *s) +{ + bool result = false; + + proc_forbid(); + sem_verify(s); + if ((!s->owner) || (s->owner == current_process)) + { + s->owner = current_process; + s->nest_count++; + result = true; + } + proc_permit(); + + return result; +} + + +/** + * \brief Lock a semaphore. + * + * If the semaphore is already owned by another process, the caller + * process will be enqueued into the waiting list and sleep until + * the semaphore is available. + * + * \note Each call to sem_obtain() must be matched by a + * call to sem_release(). + * + * \note This routine is optimized for highest speed in + * the most common case: the semaphore is free or locked + * by the calling process itself. Rearranging this code + * is probably a bad idea. + * + * \sa sem_release() sem_attempt() + */ +void sem_obtain(struct Semaphore *s) +{ + proc_forbid(); + sem_verify(s); + + /* Is the semaphore already locked by another process? */ + if (UNLIKELY(s->owner && (s->owner != current_process))) + { + /* Append calling process to the wait queue */ + ADDTAIL(&s->wait_queue, (Node *)current_process); + + /* Trigger priority inheritance logic, if enabled */ + pri_inheritBlock(s); + + /* + * We will wake up only when the current owner calls + * sem_release(). Then, the semaphore will already + * be locked for us. + */ + proc_permit(); + proc_switch(); + } + else + { + ASSERT(LIST_EMPTY(&s->wait_queue)); + + /* The semaphore was free: lock it */ + s->owner = current_process; + s->nest_count++; + proc_permit(); + } +} + + +/** + * \brief Release a lock on a previously locked semaphore. + * + * If the nesting count of the semaphore reaches zero, + * the next process waiting for it will be awaken. + * + * \note This routine is optimized for highest speed in + * the most common case: the semaphore has been locked just + * once and nobody else was waiting for it. Rearranging + * this code is probably a bad idea. + * + * \sa sem_obtain() sem_attempt() + */ +void sem_release(struct Semaphore *s) +{ + Process *proc = NULL; + + proc_forbid(); + sem_verify(s); + + ASSERT(s->owner == current_process); + + /* + * Decrement nesting count and check if the semaphore + * has been fully unlocked. + */ + if (--s->nest_count == 0) + { + /* Give semaphore to the first applicant, if any */ + if (UNLIKELY((proc = (Process *)list_remHead(&s->wait_queue)))) + { + /* Undo the effects of priority inheritance, if enabled */ + pri_inheritUnblock(s, proc); + + s->nest_count = 1; + s->owner = proc; + } else { + /* Disown semaphore */ + s->owner = NULL; + } + } + proc_permit(); + + if (proc) + ATOMIC(proc_wakeup(proc)); +} diff --git a/bertos/kern/sem.h b/bertos/kern/sem.h new file mode 100644 index 0000000..1e59c07 --- /dev/null +++ b/bertos/kern/sem.h @@ -0,0 +1,81 @@ +/** + * \file + * + * + * \defgroup kern_sem Mutually exclusive semaphores + * \ingroup kern + * \{ + * \brief Mutually exclusive semaphores. + * Shared locking not supported in this implementation. + * + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "semaphores" + * $WIZ$ module_depends = "kernel" + * $WIZ$ module_configuration = "bertos/cfg/cfg_sem.h" + */ + + +#ifndef KERN_SEM_H +#define KERN_SEM_H + +#include +#include + +/* Fwd decl */ +struct Process; + + +typedef struct Semaphore +{ + struct Process *owner; + List wait_queue; + int nest_count; +} Semaphore; + +/** + * \name Process synchronization services + * \{ + */ +void sem_init(struct Semaphore *s); +bool sem_attempt(struct Semaphore *s); +void sem_obtain(struct Semaphore *s); +void sem_release(struct Semaphore *s); +/* \} */ +/* \} */ //defgroup kern_sem + +int sem_testRun(void); +int sem_testSetup(void); +int sem_testTearDown(void); + +#endif /* KERN_SEM_H */ diff --git a/bertos/kern/sem_test.c b/bertos/kern/sem_test.c new file mode 100644 index 0000000..6a1f471 --- /dev/null +++ b/bertos/kern/sem_test.c @@ -0,0 +1,395 @@ +/** + * \file + * + * + * \brief Semaphore test. + * + * For testing priority inversion (avoidance) a set of processes + * interacting among each others by means of two semaphores are + * disturbed by an unrelated process, i.e., a process not using + * any semaphore at all. + * + * In case of priority inversion, high priority processes + * are affected (delayed!) by such process, even it has lower + * priority, because of semaphores. On the other hand, when priority + * inheritance is enabled, non interacting low priority processes + * can't affect the execution of high priority ones. + * + * It all can be seen looking at the finishing time of the various + * processes involved in sem_inv_test (logged). + * + * Notice that priority inheritance makes sense iff priorities + * exist, so the whole test depends on CONFIG_KERN_PRI. + * + * \author Daniele Basile + * \author Stefano Fedrigo + * \author Dario Faggioli + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI 1" >> $cfgdir/cfg_proc.h + * $test$: echo "#undef CONFIG_KERN_PRI_INHERIT" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN_PRI_INHERIT 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_sem.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SEMAPHORES" >> $cfgdir/cfg_sem.h + * $test$: echo "#define CONFIG_KERN_SEMAPHORES 1" >> $cfgdir/cfg_sem.h + */ + +#include +#include + +#include +#include +#include + +#include + +// Global settings for the serialization test. +#define MAX_GLOBAL_COUNT 1024 +#define TEST_TIME_OUT_MS 6000 +#define DELAY 5 + +// Settings for the test processes (serialization test). +//Process 1 +#define INC_PROC_T1 1 +#define DELAY_PROC_T1 INC_PROC_T1*DELAY +//Process 2 +#define INC_PROC_T2 3 +#define DELAY_PROC_T2 INC_PROC_T2*DELAY +//Process 3 +#define INC_PROC_T3 5 +#define DELAY_PROC_T3 INC_PROC_T3*DELAY +//Process 4 +#define INC_PROC_T4 7 +#define DELAY_PROC_T4 INC_PROC_T4*DELAY +//Process 5 +#define INC_PROC_T5 11 +#define DELAY_PROC_T5 INC_PROC_T5*DELAY +//Process 6 +#define INC_PROC_T6 13 +#define DELAY_PROC_T6 INC_PROC_T6*DELAY +//Process 7 +#define INC_PROC_T7 17 +#define DELAY_PROC_T7 INC_PROC_T7*DELAY +//Process 8 +#define INC_PROC_T8 19 +#define DELAY_PROC_T8 INC_PROC_T8*DELAY + +Semaphore sem; +unsigned int global_count = 0; + +/* + * These macros generate the code needed to create the test process functions. + */ +#define PROC_TEST(num) static void proc_semTest##num(void) \ +{ \ + unsigned int local_count = 0; \ + \ + for (int i = 0; i < INC_PROC_T##num; ++i) \ + { \ + sem_obtain(&sem); \ + kprintf("> test%d: Obtain semaphore.\n", num); \ + local_count = global_count; \ + kprintf("> test%d: Read global count [%d]\n", num, local_count); \ + timer_delay(DELAY_PROC_T##num); \ + local_count += INC_PROC_T##num; \ + global_count = local_count; \ + kprintf("> test%d: Update count g[%d] l[%d]\n", num, global_count, local_count); \ + sem_release(&sem); \ + kprintf("> test%d: Relase semaphore.\n", num); \ + } \ +} \ + +#define PROC_TEST_STACK(num) PROC_DEFINE_STACK(proc_sem_test##num##_stack, KERN_MINSTACKSIZE * 2) +#define PROC_TEST_INIT(num) proc_new(proc_semTest##num, NULL, sizeof(proc_sem_test##num##_stack), proc_sem_test##num##_stack); + +// Define processes for the serialization test. +PROC_TEST(1) +PROC_TEST(2) +PROC_TEST(3) +PROC_TEST(4) +PROC_TEST(5) +PROC_TEST(6) +PROC_TEST(7) +PROC_TEST(8) + +#if CONFIG_KERN_PRI + +// Global settings for the priority inversion test. +// 0.5 secs, enough for seeing the effects +#define BASETIME 500 + +Semaphore s1, s2; +unsigned int loops = 0; // For counting iterations +int finishing_time[8]; + +typedef enum ProcType {NONE, S1, S2, S1S2} ProcType; +/* + * Macros for the processes of the priority inversion test. + */ +#define PROC_INV_TEST(num) static void proc_semInvTest##num(void) \ +{ \ + ProcType p_type = (ProcType)((ssize_t) proc_currentUserData()); \ + int mult = p_type == NONE ? 5 : 1; \ + unsigned int i, local_count = 0; \ + ticks_t start; \ + \ + kprintf("> test%d(%d): Start.\n", num, proc_current()->link.pri); \ + finishing_time[num-1] = timer_clock(); \ + \ + if (p_type == S1 || p_type == S1S2) { \ + kprintf("> test%d(prio=%d): Obtain %p..\n", num, \ + proc_current()->link.pri, &s1); \ + sem_obtain(&s1); \ + kprintf("> test%d(prio=%d): Obtained %p.\n", num, \ + proc_current()->link.pri, &s1); \ + } \ + if (p_type == S2 || p_type == S1S2) { \ + kprintf("> test%d(prio=%d): Obtain %p..\n", num, \ + proc_current()->link.pri, &s2); \ + sem_obtain(&s2); \ + kprintf("> test%d(prio=%d): Obtained %p.\n", num, \ + proc_current()->link.pri, &s2); \ + } \ + \ + start = timer_clock(); \ + for (i = 0; i < loops * mult && (((unsigned)timer_clock()-start) <= loops*mult); i++) { \ + local_count++; \ + } \ + \ + sem_obtain(&sem); \ + global_count += local_count; \ + kprintf("> test%d(prio=%d): global_count=%u..\n", num, \ + proc_current()->link.pri, global_count); \ + sem_release(&sem); \ + \ + if (p_type == S2 || p_type == S1S2) { \ + kprintf("> test%d(prio=%d): Release %p..\n", num, \ + proc_current()->link.pri, &s2); \ + sem_release(&s2); \ + kprintf("> test%d(prio=%d): %p Released.\n", num, \ + proc_current()->link.pri, &s2); \ + } \ + if (p_type == S1 || p_type == S1S2) { \ + kprintf("> test%d(prio=%d): Release %p..\n", num, \ + proc_current()->link.pri, &s1); \ + sem_release(&s1); \ + kprintf("> test%d(prio=%d): %p Released.\n", num, \ + proc_current()->link.pri, &s1); \ + } \ + \ + finishing_time[num-1] = timer_clock() - finishing_time[num-1]; \ + kprintf("> test%d(prio=%d): Exit.\n", num, proc_current()->link.pri); \ +} \ + +#define PROC_INV_TEST_INIT(num, pri, type) \ +do { \ + struct Process *p; \ + \ + timer_delay(10); \ + p = proc_new(proc_semInvTest##num, \ + ((void*)type), sizeof(proc_sem_test##num##_stack), \ + proc_sem_test##num##_stack); \ + proc_setPri(p, pri); \ +} while (0) \ + +// Define processes for the priority inversion test. +PROC_INV_TEST(1) +PROC_INV_TEST(2) +PROC_INV_TEST(3) +PROC_INV_TEST(4) +PROC_INV_TEST(5) +PROC_INV_TEST(6) +PROC_INV_TEST(7) +PROC_INV_TEST(8) + +#endif /* CONFIG_KERN_PRI */ + +// Define process stacks for both of the tests. +PROC_TEST_STACK(1) +PROC_TEST_STACK(2) +PROC_TEST_STACK(3) +PROC_TEST_STACK(4) +PROC_TEST_STACK(5) +PROC_TEST_STACK(6) +PROC_TEST_STACK(7) +PROC_TEST_STACK(8) + +static int sem_ser_test(void) +{ + ticks_t start_time = timer_clock(); + + sem_init(&sem); + global_count = 0; + + kprintf("Run semaphore serialization test..\n"); + + // Initialize the processes. + PROC_TEST_INIT(1) + PROC_TEST_INIT(2) + PROC_TEST_INIT(3) + PROC_TEST_INIT(4) + PROC_TEST_INIT(5) + PROC_TEST_INIT(6) + PROC_TEST_INIT(7) + PROC_TEST_INIT(8) + kputs("> Main: Processes created\n"); + + /* + * Wait until all processes exit, if something goes wrong we return an + * error after timeout_ms. + */ + while((timer_clock() - start_time) < ms_to_ticks(TEST_TIME_OUT_MS)) + { + if (sem_attempt(&sem)) + { + kputs("> Main: Check if test has finished..\n"); + if(global_count == MAX_GLOBAL_COUNT) + { + kputs("> Main: Test Finished..Ok!\n"); + return 0; + } + sem_release(&sem); + kputs("> Main: Test is still running..\n"); + } + proc_yield(); + } + + kputs("Semaphore serialization test failed..\n"); + return -1; +} + +#if CONFIG_KERN_PRI + +static int sem_inv_test(void) +{ + int i, orig_pri = proc_current()->link.pri; + ticks_t fake, start_time; + + sem_init(&sem); + global_count = 0; + loops = 0; + + sem_init(&s1); + sem_init(&s2); + + kputs("> Main: calibration for the busy wait cycle..\n"); + proc_setPri(proc_current(), 10); + + fake = start_time = timer_clock(); + while ((fake - start_time) < ms_to_ticks(BASETIME)) { + fake = timer_clock(); + loops++; + } + kprintf("> Main: calibration done, %dms equals to %u cycles!\n", BASETIME, loops); + + kputs("> Main: Run Priority Inversion test...\n"); + + // Will take s2 + PROC_INV_TEST_INIT(1, 2, S2); + + // 2 will block on s2; 3 will take s2 and still block on s2 + PROC_INV_TEST_INIT(2, 3, S2); + PROC_INV_TEST_INIT(3, 4, S1S2); + + // Will block on s1, nothing happens.. + PROC_INV_TEST_INIT(4, 5, S1); + + // No semaphore, without PI this will delay everyone! + PROC_INV_TEST_INIT(5, 6, NONE); + + // Will block on s1 and boost + PROC_INV_TEST_INIT(6, 7, S1); + PROC_INV_TEST_INIT(7, 8, S1); + PROC_INV_TEST_INIT(8, 9, S1); + + // All processes created, let them run. + proc_setPri(proc_current(), orig_pri); + while ((timer_clock() - start_time) < ms_to_ticks(TEST_TIME_OUT_MS*2)) { + if (sem_attempt(&sem)) { + if (global_count >= loops*7 + loops*5) { + for (i = 0; i < 8; i++) + kprintf("> Main: I-O latency of %d = %ldms\n", i+1, (long) ms_to_ticks(finishing_time[i])); + kputs("> Main: Test Finished..Ok!\n"); + return 0; + } + sem_release(&sem); + } + proc_yield(); + } + + kputs("> Main: Priority Inversion Test failed..\n"); + return -1; +} + +#else + +void sem_inv_test(void) +{ +} + +#endif /* CONFIG_KERN_PRI */ + +/** + * Run semaphore test + */ +int sem_testRun(void) +{ + /* Start tests */ + sem_ser_test(); // Serialization + sem_inv_test(); // Priority Inversion + + return 0; +} + +int sem_testSetup(void) +{ + kdbg_init(); + + kprintf("Init Timer.."); + timer_init(); + kprintf("Done.\n"); + + kprintf("Init Process.."); + proc_init(); + kprintf("Done.\n"); + + return 0; +} + +int sem_testTearDown(void) +{ + kputs("TearDown Semaphore test.\n"); + return 0; +} + +TEST_MAIN(sem); diff --git a/bertos/kern/signal.c b/bertos/kern/signal.c new file mode 100644 index 0000000..2b3a191 --- /dev/null +++ b/bertos/kern/signal.c @@ -0,0 +1,262 @@ +/** + * \file + * + * + * \brief IPC signals implementation. + * + * Signals are a low-level IPC primitive. A process receives a signal + * when some external event has happened. Like interrupt requests, + * signals do not carry any additional information. If processing a + * specific event requires additional data, the process must obtain it + * through some other mechanism. + * + * Despite the name, one shouldn't confuse these signals with POSIX + * signals. POSIX signals are usually executed synchronously, like + * software interrupts. + * + * Signals are very low overhead. Using them exclusively to wait + * for multiple asynchronous events results in very simple dispatch + * logic with low processor and resource usage. + * + * The "event" module is a higher-level interface that can optionally + * deliver signals to processes. Messages provide even higher-level + * IPC services built on signals. Semaphore arbitration is also + * implemented using signals. + * + * In this implementation, each process has a limited set of signal + * bits (usually 32) and can wait for multiple signals at the same + * time using sig_wait(). Signals can also be polled using sig_check(), + * but a process spinning on its signals usually defeats their purpose + * of providing a multitasking-friendly infrastructure for event-driven + * applications. + * + * Signals are like flags: they are either active or inactive. After an + * external event has delivered a particular signal, it remains raised until + * the process acknowledges it using either sig_wait() or sig_check(). + * Counting signals is not a reliable way to count how many times a + * particular event has occurred, because the same signal may be + * delivered twice before the process can notice. + * + * Signals can be delivered synchronously via sig_send() or asynchronously via + * sig_post(). + * + * In the synchronous case the process is awakened if it was waiting for any + * signal and immediately dispatched for execution via a direct context switch, + * if its priority is greater than the running process. + * + * 
+ * - Synchronous-signal delivery:
+ *
+ *     [P1]____sig_send()____proc_wakeup()____[P2]
+ *
+ * + * In the asynchronous case, the process is scheduled for execution as a + * consequence of the delivery, but it will be dispatched by the scheduler as + * usual, according to the scheduling policy. + * + * 
+ * - Asynchronous-signal delivery:
+ *
+ *     [P1]____sig_post()____[P1]____proc_schedule()____[P2]
+ *
+ * + * In this way, any execution context, including an interrupt handler, can + * deliver a signal to a process. However, synchronous signal delivery from a + * non-sleepable context (like an interrupt handler) is forbidden in order to + * avoid potential deadlock conditions. Instead, sig_post() can be used from + * any context, expecially from interrupt context or when the preemption is + * disabled. + * + * Multiple independent signals may be delivered at once with a single + * invocation of sig_send() or sig_post(), although this is rarely useful. + * + * \section signal_allocation Signal Allocation + * + * There's no hardcoded mapping of specific events to signal bits. + * The meaning of a particular signal bit is defined by an agreement + * between the delivering entity and the receiving process. + * For instance, a terminal driver may be designed to deliver + * a signal bit called SIG_INT when it reads the CTRL-C sequence + * from the keyboard, and a process may react to it by quitting. + * + * \section sig_single SIG_SINGLE + * + * The SIG_SINGLE bit is reserved as a convenient shortcut in those + * simple scenarios where a process needs to wait on just one event + * synchronously. By using SIG_SINGLE, there's no need to allocate + * a specific signal from the free pool. The constraints for safely + * accessing SIG_SINGLE are: + * - The process MUST sig_wait() exclusively on SIG_SINGLE + * - SIG_SIGNAL MUST NOT be left pending after use (sig_wait() will reset + * it automatically) + * - Do not sleep between starting the asynchronous task that will fire + * SIG_SINGLE, and the call to sig_wait(). + * - Do not call system functions that may implicitly sleep, such as + * timer_delayTicks(). + * + * \author Bernie Innocenti + */ + +#include "signal.h" + +#include "cfg/cfg_timer.h" +#include +#include + +#include +#include +#include + + +#if CONFIG_KERN_SIGNALS + +// Check config dependencies +CONFIG_DEPEND(CONFIG_KERN_SIGNALS, CONFIG_KERN); + +sigmask_t sig_waitSignal(Signal *s, sigmask_t sigs) +{ + sigmask_t result; + + /* Sleeping with IRQs disabled or preemption forbidden is illegal */ + IRQ_ASSERT_ENABLED(); + ASSERT(proc_preemptAllowed()); + + /* + * This is subtle: there's a race condition where a concurrent process + * or an interrupt may call sig_send()/sig_post() to set a bit in + * Process.sig_recv just after we have checked for it, but before we've + * set Process.sig_wait to let them know we want to be awaken. + * + * In this case, we'd deadlock with the signal bit already set and the + * process never being reinserted into the ready list. + */ + IRQ_DISABLE; + + /* Loop until we get at least one of the signals */ + while (!(result = s->recv & sigs)) + { + /* + * Tell "them" that we want to be awaken when any of these + * signals arrives. + */ + s->wait = sigs; + + /* Go to sleep and proc_switch() to another process. */ + proc_switch(); + /* + * When we come back here, the wait mask must have been + * cleared by someone through sig_send()/sig_post(), and at + * least one of the signals we were expecting must have been + * delivered to us. + */ + ASSERT(!s->wait); + ASSERT(s->recv & sigs); + } + + /* Signals found: clear them and return */ + s->recv &= ~sigs; + + IRQ_ENABLE; + return result; +} + +#if CONFIG_TIMER_EVENTS + +#include + +sigmask_t sig_waitTimeoutSignal(Signal *s, sigmask_t sigs, ticks_t timeout, + Hook func, iptr_t data) +{ + Timer t; + sigmask_t res; + cpu_flags_t flags; + + ASSERT(!sig_checkSignal(s, SIG_TIMEOUT)); + ASSERT(!(sigs & SIG_TIMEOUT)); + /* IRQ are needed to run timer */ + ASSERT(IRQ_ENABLED()); + + if (func) + timer_setSoftint(&t, func, data); + else + timer_set_event_signal(&t, proc_current(), SIG_TIMEOUT); + timer_setDelay(&t, timeout); + timer_add(&t); + res = sig_waitSignal(s, SIG_TIMEOUT | sigs); + + IRQ_SAVE_DISABLE(flags); + /* Remove timer if sigs occur before timer signal */ + if (!(res & SIG_TIMEOUT) && !sig_checkSignal(s, SIG_TIMEOUT)) + timer_abort(&t); + IRQ_RESTORE(flags); + return res; +} + +#endif // CONFIG_TIMER_EVENTS + +INLINE void __sig_signal(Signal *s, Process *proc, sigmask_t sigs, bool wakeup) +{ + cpu_flags_t flags; + + IRQ_SAVE_DISABLE(flags); + + /* Set the signals */ + s->recv |= sigs; + + /* Check if process needs to be awoken */ + if (s->recv & s->wait) + { + ASSERT(proc != current_process); + + s->wait = 0; + if (wakeup) + proc_wakeup(proc); + else + SCHED_ENQUEUE_HEAD(proc); + } + IRQ_RESTORE(flags); +} + +void sig_sendSignal(Signal *s, Process *proc, sigmask_t sigs) +{ + ASSERT_USER_CONTEXT(); + IRQ_ASSERT_ENABLED(); + ASSERT(proc_preemptAllowed()); + + __sig_signal(s, proc, sigs, true); +} + +void sig_postSignal(Signal *s, Process *proc, sigmask_t sigs) +{ + __sig_signal(s, proc, sigs, false); +} + +#endif /* CONFIG_KERN_SIGNALS */ diff --git a/bertos/kern/signal.h b/bertos/kern/signal.h new file mode 100644 index 0000000..8821cfd --- /dev/null +++ b/bertos/kern/signal.h @@ -0,0 +1,193 @@ +/** + * \file + * + * + * \defgroup kern_signal Kernel signals + * \ingroup kern + * \{ + * + * \brief Signal module for IPC. + * + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "signal" + * $WIZ$ module_depends = "kernel", "timer" + * $WIZ$ module_configuration = "bertos/cfg/cfg_signal.h" + */ + +#ifndef KERN_SIGNAL_H +#define KERN_SIGNAL_H + +#include +#include // BV() + +#include + +#include + +#if CONFIG_KERN_SIGNALS + +INLINE sigmask_t __sig_checkSignal(Signal *s, sigmask_t sigs) +{ + sigmask_t result; + + result = s->recv & sigs; + s->recv &= ~sigs; + + return result; +} + +/** + * Check if any of the signals in \a sigs has occurred and clear them. + * + * \return the signals that have occurred. + */ +INLINE sigmask_t sig_checkSignal(Signal *s, sigmask_t sigs) +{ + cpu_flags_t flags; + sigmask_t result; + + IRQ_SAVE_DISABLE(flags); + result = __sig_checkSignal(s, sigs); + IRQ_RESTORE(flags); + + return result; +} + +/** + * Check if any of the signals in \a sigs has occurred and clear them. + * + * \return the signals that have occurred. + */ +INLINE sigmask_t sig_check(sigmask_t sigs) +{ + Process *proc = proc_current(); + return sig_checkSignal(&proc->sig, sigs); +} + +void sig_sendSignal(Signal *s, Process *proc, sigmask_t sig); + +/** + * Send the signals \a sigs to the process \a proc and immeditaly dispatch it + * for execution. + * + * The process will be awoken if it was waiting for any of them and immediately + * dispatched for execution. + * + * \note This function can't be called from IRQ context, use sig_post() + * instead. + */ +INLINE void sig_send(Process *proc, sigmask_t sig) +{ + sig_sendSignal(&proc->sig, proc, sig); +} + +void sig_postSignal(Signal *s, Process *proc, sigmask_t sig); + +/** + * Send the signals \a sigs to the process \a proc. + * The process will be awoken if it was waiting for any of them. + * + * \note This call is interrupt safe. + */ +INLINE void sig_post(Process *proc, sigmask_t sig) +{ + sig_postSignal(&proc->sig, proc, sig); +} + +/* + * XXX: this is provided for backword compatibility, consider to make this + * deprecated for the future. + */ +INLINE void sig_signal(Process *proc, sigmask_t sig) +{ + sig_postSignal(&proc->sig, proc, sig); +} + +sigmask_t sig_waitSignal(Signal *s, sigmask_t sigs); + +/** + * Sleep until any of the signals in \a sigs occurs. + * + * \return the signal(s) that have awoken the process. + */ +INLINE sigmask_t sig_wait(sigmask_t sigs) +{ + Process *proc = proc_current(); + return sig_waitSignal(&proc->sig, sigs); +} + +sigmask_t sig_waitTimeoutSignal(Signal *s, sigmask_t sigs, ticks_t timeout, + Hook func, iptr_t data); + +/** + * Sleep until any of the signals in \a sigs or \a timeout ticks elapse. + * If the timeout elapse a SIG_TIMEOUT is added to the received signal(s). + * \return the signal(s) that have awoken the process. + * \note Caller must check return value to check which signal awoke the process. + */ +INLINE sigmask_t sig_waitTimeout(sigmask_t sigs, ticks_t timeout) +{ + Process *proc = proc_current(); + return sig_waitTimeoutSignal(&proc->sig, sigs, timeout, + NULL, NULL); +} + +#endif /* CONFIG_KERN_SIGNALS */ + +int signal_testRun(void); +int signal_testSetup(void); +int signal_testTearDown(void); + +/** + * \name Signal definitions + * \{ + */ +#define SIG_USER0 BV(0) /**< Free for user usage */ +#define SIG_USER1 BV(1) /**< Free for user usage */ +#define SIG_USER2 BV(2) /**< Free for user usage */ +#define SIG_USER3 BV(3) /**< Free for user usage */ +#define SIG_SINGLE BV(4) /**< Used to wait for a single event */ +#define SIG_SYSTEM5 BV(5) /**< Reserved for internal system use */ +#define SIG_SYSTEM6 BV(6) /**< Reserved for internal system use */ +#define SIG_TIMEOUT BV(7) /**< Reserved for timeout use */ + +/** + * Max number of signals that can be used by drivers or user applications. + */ +#define SIG_USER_MAX SIG_SINGLE +/*\}*/ + +/* \} */ //defgroup kern_signal + +#endif /* KERN_SIGNAL_H */ diff --git a/bertos/kern/signal_test.c b/bertos/kern/signal_test.c new file mode 100644 index 0000000..6734347 --- /dev/null +++ b/bertos/kern/signal_test.c @@ -0,0 +1,189 @@ +/** + * \file + * + * + * \brief Signals test. + * + * + * \author Daniele Basile + * + * $test$: cp bertos/cfg/cfg_proc.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN" >> $cfgdir/cfg_proc.h + * $test$: echo "#define CONFIG_KERN 1" >> $cfgdir/cfg_proc.h + * $test$: cp bertos/cfg/cfg_signal.h $cfgdir/ + * $test$: echo "#undef CONFIG_KERN_SIGNALS" >> $cfgdir/cfg_signal.h + * $test$: echo "#define CONFIG_KERN_SIGNALS 1" >> $cfgdir/cfg_signal.h + */ + +#include "cfg/cfg_timer.h" +#include +#include + +#include +#include +#include + +#include + +// Set mask with all signal that we want to test. +int test_signal[] = { + SIG_USER0, + SIG_USER1, + SIG_USER2, + SIG_USER3, + SIG_TIMEOUT, + SIG_SYSTEM5, + SIG_SYSTEM6, + SIG_SINGLE +}; + +// Current signal to send +int count = 0; + +sigmask_t sig_to_master; +sigmask_t sig_to_slave; + +/* + * These macros generate the code needed to create the test process functions. + */ +#define PROC_TEST_SLAVE(index, signal) \ +static void proc_signalTest##index(void) \ +{ \ + kputs("> Slave [" #index "]: Wait signal [" #signal "]\n"); \ + sig_wait(signal); \ + kputs("> Slave [" #index "]: send signal [" #signal "]\n"); \ + sig_send(proc_currentUserData(), signal); \ +} + +#define MAIN_CHECK_SIGNAL(index, slave) \ + do { \ + kprintf("> Main: send signal [%d]\n", test_signal[index]); \ + sig_send(slave, test_signal[index]); \ + kprintf("> Main: wait signal [%d]\n", test_signal[index]); \ + sig_wait(test_signal[index]); \ + count++; \ + } while(0) \ + +#if CONFIG_KERN_HEAP + +#define PROC_TEST_SLAVE_INIT(index, master_process) proc_new(proc_signalTest##index, master_process, KERN_MINSTACKSIZE * 2, NULL) + +#else + +#define PROC_TEST_SLAVE_STACK(index) PROC_DEFINE_STACK(proc_signal_test##index##_stack, KERN_MINSTACKSIZE * 2); +#define PROC_TEST_SLAVE_INIT(index, master_process) proc_new(proc_signalTest##index, master_process, sizeof(proc_signal_test##index##_stack), proc_signal_test##index##_stack) + +PROC_TEST_SLAVE_STACK(0) +PROC_TEST_SLAVE_STACK(1) +PROC_TEST_SLAVE_STACK(2) +PROC_TEST_SLAVE_STACK(3) +PROC_TEST_SLAVE_STACK(4) +PROC_TEST_SLAVE_STACK(5) +PROC_TEST_SLAVE_STACK(6) +PROC_TEST_SLAVE_STACK(7) + +#endif + +// Generate the code for signal test. +PROC_TEST_SLAVE(0, SIG_USER0) +PROC_TEST_SLAVE(1, SIG_USER1) +PROC_TEST_SLAVE(2, SIG_USER2) +PROC_TEST_SLAVE(3, SIG_USER3) +PROC_TEST_SLAVE(4, SIG_TIMEOUT) +PROC_TEST_SLAVE(5, SIG_SYSTEM5) +PROC_TEST_SLAVE(6, SIG_SYSTEM6) +PROC_TEST_SLAVE(7, SIG_SINGLE) + +/** + * Run signal test + */ +int signal_testRun(void) +{ + struct Process *main_process = proc_current(); + struct Process *slave_0; + struct Process *slave_1; + struct Process *slave_2; + struct Process *slave_3; + struct Process *slave_4; + struct Process *slave_5; + struct Process *slave_6; + struct Process *slave_7; + + kprintf("Run Signal test..\n"); + slave_0 = PROC_TEST_SLAVE_INIT(0, main_process); + slave_1 = PROC_TEST_SLAVE_INIT(1, main_process); + slave_2 = PROC_TEST_SLAVE_INIT(2, main_process); + slave_3 = PROC_TEST_SLAVE_INIT(3, main_process); + slave_4 = PROC_TEST_SLAVE_INIT(4, main_process); + slave_5 = PROC_TEST_SLAVE_INIT(5, main_process); + slave_6 = PROC_TEST_SLAVE_INIT(6, main_process); + slave_7 = PROC_TEST_SLAVE_INIT(7, main_process); + + MAIN_CHECK_SIGNAL(0, slave_0); + MAIN_CHECK_SIGNAL(1, slave_1); + MAIN_CHECK_SIGNAL(2, slave_2); + MAIN_CHECK_SIGNAL(3, slave_3); + MAIN_CHECK_SIGNAL(4, slave_4); + MAIN_CHECK_SIGNAL(5, slave_5); + MAIN_CHECK_SIGNAL(6, slave_6); + MAIN_CHECK_SIGNAL(7, slave_7); + + if(count == countof(test_signal)) + { + kprintf("Signal test finished..ok!\n"); + return 0; + } + + kprintf("Signal test finished..fail!\n"); + return -1; +} + +int signal_testSetup(void) +{ + kdbg_init(); + + kprintf("Init Timer.."); + timer_init(); + kprintf("Done.\n"); + + kprintf("Init Process.."); + proc_init(); + kprintf("Done.\n"); + return 0; +} + +int signal_testTearDown(void) +{ + kputs("TearDown Signal test.\n"); + return 0; +} + +TEST_MAIN(signal); diff --git a/bertos/mware/blanker.c b/bertos/mware/blanker.c new file mode 100644 index 0000000..0e96c78 --- /dev/null +++ b/bertos/mware/blanker.c @@ -0,0 +1,221 @@ +/** + * \file + * + * + * \brief Display Blanker (implementation). + * + * + * \author Bernie Innocenti + */ + +#include "blanker.h" +#include "hw/hw_blanker.h" + +#include +#include + +/* Time without input events before starting blanker */ +#define BLK_BLANKTIMEOUT (15 * 1000) /* ms */ + + +#warning FIXME:Revise me! + +/** Keyboard event handler to listen for key presses in blanker. */ +static KbdHandler blk_KbdHandler; + +/** Time since last key event. */ +static ticks_t blk_lastevent; + +/** Display blanking function is enabled. */ +static bool blk_enabled; + +/** Display blanker is engaged right now. */ +static bool blk_active; + + +static bool blk_on(void) +{ + if (!blk_active) + { + blk_active = true; + BLK_LCDOFF; + } + return true; +} + + +static void blk_off(void) +{ + if (blk_active) + { + blk_active = false; + BLK_LCDON; + } +} + + +void blk_retrigger(void) +{ + blk_lastevent = timer_clock(); + blk_off(); +} + +#if 0 +/** + * Matrix-like screen saver effect + */ +static void blk_hack(void) +{ + static signed char blk_colstart[CONFIG_LCD_COLS]; + UBYTE row, col; + + + if (rand()%3 == 0) + { + /* Modify one column */ + col = rand() % CONFIG_LCD_COLS; + blk_colstart[col] += rand() % 12 - 5; + } + + for (col = 0; col < CONFIG_LCD_COLS; ++col) + { + if (blk_colstart[col] > 0) + { + --blk_colstart[col]; + + /* Scroll down */ + for(row = CONFIG_LCD_ROWS-1; row; --row) + { + lcd_SetAddr(blk_layer, LCD_POS(col,row)); + lcd_PutChar(blk_layer->Buf[LCD_POS(col,row-1)], blk_layer); + } + + /* Add new kanji */ + lcd_SetAddr(blk_layer, LCD_POS(col,0)); + lcd_PutChar((char)(rand() % 127 + 128), blk_layer); + } + else if (blk_colstart[col] < 0) + { + ++blk_colstart[col]; + + /* Clear tail */ + for(row = 0; row < CONFIG_LCD_ROWS; ++row) + { + if (blk_layer->Buf[LCD_POS(col,row)] != ' ') + { + lcd_SetAddr(blk_layer, LCD_POS(col,row)); + lcd_PutChar(' ', blk_layer); + break; + } + } + } + } +} +#endif + + +static keymask_t blk_handlerFunc(keymask_t key) +{ + /* key used to turn off blanker */ + static keymask_t offkey; + + ticks_t now = timer_clock(); + + /* If key pressed */ + if (key != 0) + { + blk_lastevent = now; + if (blk_active) + { + blk_off(); + + /* remember and eat key event */ + offkey = key; + key = 0; + } + else if (key == offkey) + { + /* keep eating the key until released */ + key = 0; + } + + /* pass key through */ + return key; + } + + /* reset off key */ + offkey = 0; + + /* Blank timeout reached? */ + if (now - blk_lastevent > ms_to_ticks(BLK_BLANKTIMEOUT)) + { + /* Enable blanker unless already done */ + if (!blk_active && !blk_on()) + return 0; + +#if 0 + /* Do some nice visual effect */ + blk_hack(); +#endif /* _DEBUG */ + } + + return 0; +} + + +void blk_enable(void) +{ + if (!blk_enabled) + { + blk_active = false; + blk_lastevent = timer_clock(); + + /* Add display blanker handler */ + blk_KbdHandler.hook = blk_handlerFunc; + blk_KbdHandler.pri = 100; /* high priority */ + blk_KbdHandler.flags = KHF_RAWKEYS; + kbd_addHandler(&blk_KbdHandler); + + blk_enabled = true; + } +} + + +void blk_disable(void) +{ + if (blk_enabled) + { + kbd_remHandler(&blk_KbdHandler); + blk_off(); + blk_enabled = false; + } +} + diff --git a/bertos/mware/blanker.h b/bertos/mware/blanker.h new file mode 100644 index 0000000..4a2eb2c --- /dev/null +++ b/bertos/mware/blanker.h @@ -0,0 +1,45 @@ +/** + * \file + * + * + * \brief Display Blanker (implementation). + * + * + * \author Bernie Innocenti + */ +#ifndef MWARE_BLANKER_H +#define MWARE_BLANKER_H + +extern void blk_enable(void); +extern void blk_disable(void); +extern void blk_retrigger(void); + +#endif /* MWARE_BLANKER_H */ diff --git a/bertos/mware/byteorder.h b/bertos/mware/byteorder.h new file mode 100644 index 0000000..2d5bede --- /dev/null +++ b/bertos/mware/byteorder.h @@ -0,0 +1,2 @@ +#warning This header is OBSOLETE +#include diff --git a/bertos/mware/cmd_hunk.h b/bertos/mware/cmd_hunk.h new file mode 100644 index 0000000..1cfb113 --- /dev/null +++ b/bertos/mware/cmd_hunk.h @@ -0,0 +1,146 @@ +/** + * \file + * + * + * \brief Preprocessor magic to create hunks for the commands executed from the parser + * + * This module permits to create hunks for the functions that must be executed through + * RPC commands. For instance, given this code: + * + * \code + * ResultCode cmd_add(long a, long b, long* result); + * DECLARE_COMMAND_HUNK(add, (long)(long)(NIL), (long)(NIL)); + * // ^ parameters ^ return values + * \endcode + * + * The macro is expanded to: + * + * \code + * ResultCode cmd_add_hunk(params argv[], params results[]) + * { + * return cmd_add(argv[0].l, argv[1].l, &results[0].l); + * } + * + * const struct CmdTemplate cmd_add_template = + * { + * "add", "dd", "d", cmd_add_hunk + * }; + * \endcode + * + * which is all the boilerplate needed to make the function ready for the RPC. + * The implementation uses the Boost Preprocessor Library (part of the Boost + * library, available at http://www.boost.org). The version we developed the + * code with is 1.31. + * + * + * \author Giovanni Bajo + * + */ + +#ifndef CMD_HUNK_H +#define CMD_HUNK_H + +#include "parser.h" + +// Bring in the Boost Preprocess Library +#include + +#define HUNK_INDEX_FOR_NIL 0 +#define HUNK_INDEX_FOR_string 1 +#define HUNK_INDEX_FOR_long 2 +#define HUNK_ARRAY_LETTERS (3, (NIL, s, l)) +#define HUNK_ARRAY_STRINGS (3, ("", "s", "d")) + +// Transform int->l, float->f, etc. +#define HUNK_TYPE_LETTER(s, _, type) \ + BOOST_PP_CAT(HUNK_INDEX_FOR_, type) \ + /**/ + +#define HUNK_TRANSFORMER(_, array, elem) \ + BOOST_PP_ARRAY_ELEM(elem, array) \ + /**/ + +#define HUNK_SEQ_TRANS_ARRAY(seq, array) \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TRANSFORMER, array, seq) \ + /**/ + +#define HUNK_PARAM(_, n, seq) \ + args_results[n+1]. BOOST_PP_SEQ_ELEM(n, seq) \ + /**/ + +#define HUNK_RESULT(_, n, seq) \ + &args_results[n]. BOOST_PP_SEQ_ELEM(n, seq) \ + /**/ + +#define HUNK_IDENTITY(_, dummy, x) x +#define CMD_HUNK_TEMPLATE(func) cmd_##func###_template + +#define DECLARE_CMD_HUNK_2(func, name, param_types, result_types, flags) \ + static ResultCode cmd_##name##_hunk(parms args_results[]) \ + { \ + return cmd_##func( \ + BOOST_PP_ENUM(BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(param_types)), HUNK_PARAM, HUNK_SEQ_TRANS_ARRAY(param_types, HUNK_ARRAY_LETTERS)) \ + BOOST_PP_COMMA_IF(BOOST_PP_AND(BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(param_types)), BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(result_types)))) \ + BOOST_PP_ENUM(BOOST_PP_DEC(BOOST_PP_SEQ_SIZE(result_types)), HUNK_RESULT, HUNK_SEQ_TRANS_ARRAY(result_types, HUNK_ARRAY_LETTERS)) \ + ); \ + } \ + const struct CmdTemplate CMD_HUNK_TEMPLATE(name) = { \ + #name, \ + BOOST_PP_SEQ_FOR_EACH(HUNK_IDENTITY, _, HUNK_SEQ_TRANS_ARRAY(param_types, HUNK_ARRAY_STRINGS)), \ + BOOST_PP_SEQ_FOR_EACH(HUNK_IDENTITY, _, HUNK_SEQ_TRANS_ARRAY(result_types, HUNK_ARRAY_STRINGS)), \ + cmd_##name##_hunk, \ + flags \ + } \ + /**/ + +#define DECLARE_CMD_HUNK(func, param_types, result_types) \ + DECLARE_CMD_HUNK_2(func, func, \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, param_types), \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, result_types), \ + 0) \ + /**/ + +#define DECLARE_CMD_HUNK_NAME(func, name, param_types, result_types) \ + DECLARE_CMD_HUNK_2(func, name, \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, param_types), \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, result_types), \ + 0) \ + /**/ + +#define DECLARE_CMD_HUNK_FLAGS(func, param_types, result_types, flags) \ + DECLARE_CMD_HUNK_2(func, func, \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, param_types), \ + BOOST_PP_SEQ_TRANSFORM(HUNK_TYPE_LETTER, _, result_types), \ + flags) \ + /**/ + +#endif diff --git a/bertos/mware/event.c b/bertos/mware/event.c new file mode 100644 index 0000000..9dcb71a --- /dev/null +++ b/bertos/mware/event.c @@ -0,0 +1,216 @@ +/** + * \file + * + * + * \brief Events handling implementation + * + * + * \author Giovanni Bajo + */ + + +#include "event.h" +#include "cfg/cfg_signal.h" +#include "cfg/cfg_timer.h" + +#include /* timer_clock() */ + +void event_hook_ignore(UNUSED_ARG(Event *, e)) +{ +} + +void event_hook_softint(Event *e) +{ + e->Ev.Int.func(e->Ev.Int.user_data); +} + +void event_hook_generic(Event *e) +{ + e->Ev.Gen.completed = true; + MEMORY_BARRIER; +} + +#if CONFIG_KERN && CONFIG_KERN_SIGNALS +void event_hook_signal(Event *e) +{ + sig_post((e)->Ev.Sig.sig_proc, (e)->Ev.Sig.sig_bit); +} + +void event_hook_generic_signal(Event *e) +{ + sig_postSignal(&e->Ev.Sig.sig, e->Ev.Sig.sig_proc, e->Ev.Sig.sig_bit); +} + +/* + * Custom event hook to notify the completion of a event monitored via + * event_select(). + */ +static void event_hook_generic_multiple_signal(Event *e) +{ + sig_post(e->Ev.Sig.sig_proc, e->Ev.Sig.sig_bit); +} + +/* + * Custom timer hook to notify the timeout of a event_waitTimeout(). + */ +static void event_hook_generic_timeout_signal(void *arg) +{ + Event *e = (Event *)arg; + + sig_postSignal(&e->Ev.Sig.sig, e->Ev.Sig.sig_proc, SIG_TIMEOUT); +} + +/* + * event_waitTimeout() slow path: this function put the current process to + * sleep until the event is notified. The timeout is managed using the custom + * timer hook event_hook_generic_timeout_signal(): if the timeout expires the + * signal SIG_TIMEOUT is notified via sig_post() to the sigmask embedded in the + * event. + * + * The custom timer hook is required because the default timer's behaviour is + * to use the process's sigmask to notify the completion of an event, that is + * not suitable for this case, because we're sleeping on the event's sigmask + * instead. + */ +static NOINLINE bool event_waitTimeoutSlowPath(Event *e, ticks_t timeout) +{ + bool ret; + + e->Ev.Sig.sig_proc = proc_current(); + ret = (sig_waitTimeoutSignal(&e->Ev.Sig.sig, + EVENT_GENERIC_SIGNAL, timeout, + event_hook_generic_timeout_signal, e) & SIG_TIMEOUT) ? + false : true; + return ret; +} + +bool event_waitTimeout(Event *e, ticks_t timeout) +{ + /* + * Fast path: check if the event already happened and return + * immediately in this case. + */ + if (sig_checkSignal(&e->Ev.Sig.sig, + EVENT_GENERIC_SIGNAL) == EVENT_GENERIC_SIGNAL) + return true; + return event_waitTimeoutSlowPath(e, timeout); +} + +/* + * event_select() slow path: this function handles the case when any event was + * not yet notified, so it takes care of making the current process to sleep on + * the list of events, mapping them to a different signal bit and issuing a + * call to sig_waitTimeout() using the process's sigmask. + */ +static NOINLINE int event_selectSlowPath(Event **evs, int n, ticks_t timeout) +{ + sigmask_t mask = (1 << n) - 1; + int i; + + for (i = 0; i < n; i++) + { + Event *e = evs[i]; + + /* Map each event to a distinct signal bit */ + e->Ev.Sig.sig_proc = proc_current(); + e->Ev.Sig.sig_bit = 1 << i; + e->action = event_hook_generic_multiple_signal; + } + IRQ_ENABLE; + + mask = timeout ? sig_waitTimeout(mask, timeout) : sig_wait(mask); + if (mask & SIG_TIMEOUT) + return -1; + return UINT8_LOG2(mask); +} + +int event_select(Event **evs, int n, ticks_t timeout) +{ + int i; + + ASSERT(n <= SIG_USER_MAX); + + IRQ_DISABLE; + /* Fast path: check if one of the event already happened */ + for (i = 0; i < n; i++) + { + Event *e = evs[i]; + + if (__sig_checkSignal(&e->Ev.Sig.sig, + EVENT_GENERIC_SIGNAL) == EVENT_GENERIC_SIGNAL) + { + IRQ_ENABLE; + return i; + } + } + /* Otherwise, fallback to the slow path */ + return event_selectSlowPath(evs, n, timeout); +} +#else /* !(CONFIG_KERN && CONFIG_KERN_SIGNALS) */ +bool event_waitTimeout(Event *e, ticks_t timeout) +{ + ticks_t end = timer_clock() + timeout; + bool ret; + + while ((ACCESS_SAFE(e->Ev.Gen.completed) == false) || + TIMER_AFTER(timer_clock(), end)) + cpu_relax(); + ret = e->Ev.Gen.completed; + e->Ev.Gen.completed = false; + MEMORY_BARRIER; + + return ret; +} + +int event_select(Event **evs, int n, ticks_t timeout) +{ + ticks_t end = timer_clock() + timeout; + int i; + + while (1) + { + for (i = 0; i < n; i++) + { + Event *e = evs[i]; + if (ACCESS_SAFE(e->Ev.Gen.completed) == true) + { + e->Ev.Gen.completed = false; + MEMORY_BARRIER; + return i; + } + } + if (timeout && TIMER_AFTER(timer_clock(), end)) + break; + cpu_relax(); + } + return -1; +} +#endif /* CONFIG_KERN && CONFIG_KERN_SIGNALS */ diff --git a/bertos/mware/event.h b/bertos/mware/event.h new file mode 100644 index 0000000..e6a8b1e --- /dev/null +++ b/bertos/mware/event.h @@ -0,0 +1,310 @@ +/** + * \file + * + * + * \defgroup event_handling Event handling module + * \ingroup core + * \{ + * + * \brief Events handling + * + * This module implements a common system for executing + * a user defined action calling a hook function. + * + * + * Device drivers often need to wait the completion of some event, usually to + * allow the hardware to accomplish some asynchronous task. + * + * A common approach is to place a busy wait with a cpu_relax() loop that invokes + * the architecture-specific instructions to say that we're not doing much with + * the processor. + * + * Although technically correct, the busy loop degrades the overall system + * performance in presence of multiple processes and power consumption. + * + * With the kernel the natural way to implement such wait/complete mechanism is to + * use signals via sig_wait() and sig_post()/sig_send(). + * + * However, signals in BeRTOS are only available in presence of the kernel (that + * is just a compile-time option). This means that each device driver must provide + * two different interfaces to implement the wait/complete semantic: one with the + * kernel and another without the kernel. + * + * The purpose of the completion events is to provide a generic interface to + * implement a synchronization mechanism to block the execution of code until a + * specific event happens. + * + * This interface does not depend on the presence of the kernel and it + * automatically uses the appropriate event backend to provide the same + * behaviour with or without the kernel. + * + * Example usage (wait for a generic device driver initialization): + * \code + * static Event e; + * + * static void irq_handler(void) + * { + * // Completion event has happened, resume the execution of init() + * event_do(&e); + * } + * + * static void init(void) + * { + * // Declare the generic completion event + * event_initGeneric(&e); + * // Submit the hardware initialization request + * async_hw_init(); + * // Wait for the completion of the event + * event_wait(&e); + * } + * \endcode + * + * Example usage: wait multiple generic events via event_select() + * \code + * Event ev1; + * Event ev2; + * + * void event_notifier(void) + * { + * Event *evs[] = { &ev1, &ev2 }; + * + * event_initGeneric(&ev1); + * event_initGeneric(&ev2); + * + * while (1) + * { + * int id = event_select(evs, countof(evs), + * ms_to_ticks(100)); + * if (id < 0) + * { + * kprintf("no IRQ\n"); + * continue; + * } + * kprintf("IRQ %d happened\n", id); + * } + * } + * + * void irq1_handler(void) + * { + * // do something + * ... + * + * // notify the completion of event 1 + * event_do(&ev1); + * } + * + * void irq2_handler(void) + * { + * // do something + * ... + * + * // notify the completion of event 2 + * event_do(&ev2); + * } + * \endcode + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "event" + */ + +#ifndef KERN_EVENT_H +#define KERN_EVENT_H + +#include "cfg/cfg_proc.h" +#include "cfg/cfg_signal.h" +#include "cfg/cfg_timer.h" +#include + +#include /* cpu_relax() */ + +#if CONFIG_KERN && CONFIG_KERN_SIGNALS +#include +/* Forward decl */ +struct Process; +#endif + +typedef struct Event +{ + void (*action)(struct Event *); + union + { +#if CONFIG_KERN && CONFIG_KERN_SIGNALS + struct + { + struct Process *sig_proc; /* Process to be signalled */ + sigbit_t sig_bit; /* Signal to send */ + Signal sig; /* Local signal structure (used by generic event) */ + } Sig; +#endif + struct + { + Hook func; /* Pointer to softint hook */ + void *user_data; /* Data to be passed back to user hook */ + } Int; + + struct + { + bool completed; /* Generic event completion */ + } Gen; + } Ev; +} Event; + +void event_hook_ignore(Event *event); +void event_hook_signal(Event *event); +void event_hook_softint(Event *event); +void event_hook_generic(Event *event); +void event_hook_generic_signal(Event *event); + +/** Initialize the event \a e as a no-op */ +#define event_initNone(e) \ + ((e)->action = event_hook_ignore) + +/** Same as event_initNone(), but returns the initialized event */ +INLINE Event event_createNone(void) +{ + Event e; + e.action = event_hook_ignore; + return e; +} + +/** Initialize the event \a e with a software interrupt (call function \a f, with parameter \a u) */ +#define event_initSoftint(e,f,u) \ + ((e)->action = event_hook_softint,(e)->Ev.Int.func = (f), (e)->Ev.Int.user_data = (u)) + +/** Same as event_initSoftint(), but returns the initialized event */ +INLINE Event event_createSoftint(Hook func, void *user_data) +{ + Event e; + e.action = event_hook_softint; + e.Ev.Int.func = func; + e.Ev.Int.user_data = user_data; + return e; +} + +#if CONFIG_KERN && CONFIG_KERN_SIGNALS +/** Initialize the event \a e with a signal (send signal \a s to process \a p) */ +#define event_initSignal(e,p,s) \ + ((e)->action = event_hook_signal,(e)->Ev.Sig.sig_proc = (p), (e)->Ev.Sig.sig_bit = (s)) + +/** Same as event_initSignal(), but returns the initialized event */ +INLINE Event event_createSignal(struct Process *proc, sigbit_t bit) +{ + Event e; + e.action = event_hook_signal; + e.Ev.Sig.sig_proc = proc; + e.Ev.Sig.sig_bit = bit; + return e; +} + +/** + * Signal used to implement generic events. + */ +#define EVENT_GENERIC_SIGNAL SIG_SYSTEM6 + +/** Initialize the generic sleepable event \a e */ +#define event_initGeneric(e) \ + ((e)->action = event_hook_generic_signal, \ + (e)->Ev.Sig.sig_proc = proc_current(), \ + (e)->Ev.Sig.sig_bit = EVENT_GENERIC_SIGNAL, \ + (e)->Ev.Sig.sig.wait = 0, (e)->Ev.Sig.sig.recv = 0) +#else +#define event_initGeneric(e) \ + ((e)->action = event_hook_generic, (e)->Ev.Gen.completed = false) +#endif + +/** + * Create a generic sleepable event. + * + * \return the properly initialized generic event structure. + */ +INLINE Event event_createGeneric(void) +{ + Event e; + event_initGeneric(&e); + return e; +} + +/** + * Wait the completion of event \a e. + * + * This function releases the CPU the application is configured to use + * the kernel, otherwise it's just a busy wait. + * \note It's forbidden to use this function inside irq handling functions. + */ +INLINE void event_wait(Event *e) +{ +#if CONFIG_KERN_SIGNALS + e->Ev.Sig.sig_proc = proc_current(); + sig_waitSignal(&e->Ev.Sig.sig, EVENT_GENERIC_SIGNAL); +#else + while (ACCESS_SAFE(e->Ev.Gen.completed) == false) + cpu_relax(); + e->Ev.Gen.completed = false; + MEMORY_BARRIER; +#endif +} + +/** + * Wait for multiple events + * + * On success return the offset in the \a evs vector of the Event that + * happened, -1 if the timeout expires. + * + * NOTE: timeout == 0 means no timeout. + * + * \attention The API is work in progress and may change in future versions. + */ +int event_select(Event **evs, int n, ticks_t timeout); + +/** + * Wait the completion of event \a e or \a timeout elapses. + * + * \note It's forbidden to use this function inside irq handling functions. + */ +bool event_waitTimeout(Event *e, ticks_t timeout); + +/** + * Trigger an event. + * + * Execute the callback function associated with event \a e. + * + * This function can be used also in interrupt routines, but only if the + * event was created as a signal or generic event. + */ +INLINE void event_do(struct Event *e) +{ + e->action(e); +} + +/** \} */ + +#endif /* KERN_EVENT_H */ diff --git a/bertos/mware/except.h b/bertos/mware/except.h new file mode 100644 index 0000000..5071e35 --- /dev/null +++ b/bertos/mware/except.h @@ -0,0 +1,124 @@ +/** + * \file + * + * + * \brief C++-like structured exception handling for C programs + * + * \author Bernie Innocenti + */ +#ifndef MWARE_EXCEPT_H +#define MWARE_EXCEPT_H + +#include + +#include + +#define EXCEPT_CONTEXTS 8 + +/** + * A stack of jump buffers used to record try sites + * so they can be reached from throw sites. + * + * The stack contains return points for each nested + * context. jmp_buf's are pushed into the stack at + * try points and popped out when the try block ends + * normally or when an exception is thrown. + */ +extern jmp_buf except_stack[EXCEPT_CONTEXTS]; +extern int except_top; + +#define PUSH_EXCEPT (ASSERT(except_top < EXCEPT_CONTEXTS), setjmp(except_stack[except_top++])) +#define POP_EXCEPT (ASSERT(except_top > 0), --except_top) +#define DO_EXCEPT (ASSERT(except_top > 0), longjmp(except_stack[--except_top], true)) + +/** + * Jump buffer to use when throwing an exception or aborting an operation + * + * User code can throw exceptions like this: + * + * \code + * void a_function_throwing_exceptions(void) + * { + * if (some_error_condition) + * THROW; + * } + * \endcode + * + * Catching exceptions (brackets are optional): + * + * \code + * EXCEPT_DEFINE; + * + * void a_function_catching_an_exception(void) + * { + * TRY + * { + * printf("Entered try block\n"); + * a_function_throwing_exceptions(); + * printf("Survived execution of critical code\n"); + * } + * CATCH + * { + * printf("Exception caught!\n"); + * } + * CATCH_END + * } + * \endcode + * + * Simple syntax when you don't need to do anything when catching an excaption: + * + * \code + * TRY + * printf("Entered try block\n"); + * a_function_throwing_exceptions(); + * printf("Survived execution of critical code\n"); + * TRY_END + * \endcode + * + * You also need to declare the exception stack once in + * your global declarations: + * \code + * EXCEPT_DEFINE; + * \endcode + */ +#define TRY if (PUSH_EXCEPT) { { +#define TRY_END } POP_EXCEPT; } +#define CATCH } POP_EXCEPT; } else { +#define CATCH_END } +#define THROW DO_EXCEPT + + +#define EXCEPT_DEFINE \ + jmp_buf except_stack[EXCEPT_CONTEXTS]; \ + int except_top; + +#endif /* MWARE_EXCEPT_H */ diff --git a/bertos/mware/formatwr.c b/bertos/mware/formatwr.c new file mode 100644 index 0000000..0f3c00d --- /dev/null +++ b/bertos/mware/formatwr.c @@ -0,0 +1,978 @@ +/** + * \file + * + * + * + * \brief Basic "printf", "sprintf" and "fprintf" formatter. + * + * This module is 100% reentrant and can be adapted to user-defined routines + * that needs formatters with special properties like different output + * channels or new format specifiers. + * + * To reduce size in applications not using real numbers or long integers + * the formatter may be compiled to exclude certain parts. This is + * controlled by giving a -D option a compilation time: + * + * \code + * -D CONFIG_PRINTF=PRINTF_FULL Full ANSI printf formatter, with some C99 extensions + * -D CONFIG_PRINTF=PRINTF_NOFLOAT Exclude support for floats + * -D CONFIG_PRINTF=PRINTF_REDUCED Simplified formatter (see below) + * -D CONFIG_PRINTF=PRINTF_NOMODIFIERS Exclude "l", "z" and "h" modifiers in reduced version + * -D CONFIG_PRINTF=PRINTF_DISABLED No formatter at all + * \endcode + * + * Code size on AVR4 with GCC 3.4.1 (-O2): + * \li PRINTF_FULL 2912byte (0xB60) + * \li PRINTF_NOFLOAT 1684byte (0x694) + * \li PRINTF_REDUCED 924byte (0x39C) + * \li PRINTF_NOMODIFIERS 416byte (0x1A0) + * + * Code/data size in words on DSP56K with CodeWarrior 6.0: + * \li PRINTF_FULL 1493/45 + * \li PRINTF_NOFLOAT 795/45 + * \li PRINTF_REDUCED 482/0 + * \li PRINTF_NOMODIFIERS 301/0 + * + * The reduced version of formatter is suitable when program size is critical + * rather than formatting power. This routine uses less than 20 bytes of + * stack space which makes it practical even in systems with less than 256 + * bytes of user RAM. + * + * The only formatting specifiers supported by the reduced formatter are: + * \code + * %% %c %s %d %o %x %X and %hd %ho %hx %hX %ld %lo %lx %lX + * \endcode + * + * It means that real variables are not supported as well as field + * width and precision arguments. + */ + + +#include "formatwr.h" + +#include "cfg/cfg_formatwr.h" /* CONFIG_ macros */ +#include /* ASSERT */ + +#include +#include + +#ifndef CONFIG_PRINTF_N_FORMATTER + /** Disable the arcane %n formatter. */ + #define CONFIG_PRINTF_N_FORMATTER 0 +#endif + +#ifndef CONFIG_PRINTF_OCTAL_FORMATTER + /** Disable the %o formatter. */ + #define CONFIG_PRINTF_OCTAL_FORMATTER 0 +#endif + +/* True if we must keep a count of the number of characters we print. */ +#define CONFIG_PRINTF_COUNT_CHARS (CONFIG_PRINTF_RETURN_COUNT || CONFIG_PRINTF_N_FORMATTER) + +#if CONFIG_PRINTF + +#if CONFIG_PRINTF > PRINTF_NOFLOAT + #include + + /* Maximum precision for floating point values */ + typedef long double max_float_t; + + #if CONFIG_FRMWRI_BUFSIZE + #define FRMWRI_BUFSIZE CONFIG_FRMWRI_BUFSIZE + #else + /* Conservative estimate. Max float is 3.40282e+038, so %f (but not %e or %g) must have + * space for: sign + all 38 digits + '.' + 6 decimal digits (default) + * Use a high value to avoid unexpected buffer overflows. + */ + #define FRMWRI_BUFSIZE 134 + #endif +#else + #if CONFIG_FRMWRI_BUFSIZE + #define FRMWRI_BUFSIZE CONFIG_FRMWRI_BUFSIZE + #else + /* + * Conservative estimate. Should be (probably) 12 (which is the size necessary + * to represent (2^32-1) in octal plus the sign bit. + */ + #define FRMWRI_BUFSIZE 16 + #endif +#endif + +/* Probably useful for fancy microcontrollers such as the PIC, nobody knows. */ +#ifndef MEM_ATTRIBUTE +#define MEM_ATTRIBUTE +#endif + +#if CONFIG_PRINTF > PRINTF_NOMODIFIERS + #define IS_SHORT (h_modifier || (sizeof(int) == 2 && !l_modifier)) +#else + #define IS_SHORT (sizeof(int) == 2) +#endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + + +#if CONFIG_PRINTF > PRINTF_NOFLOAT + +static char *float_conversion(MEM_ATTRIBUTE max_float_t value, + MEM_ATTRIBUTE short nr_of_digits, + MEM_ATTRIBUTE char *buf, + MEM_ATTRIBUTE char format_flag, + MEM_ATTRIBUTE char g_flag, + MEM_ATTRIBUTE bool alternate_flag) +{ + MEM_ATTRIBUTE char *cp; + MEM_ATTRIBUTE char *buf_pointer; + MEM_ATTRIBUTE short n, i, dec_point_pos, integral_10_log; + + buf_pointer = buf; + integral_10_log = 0; + + if (value >= 1) + { + while (value >= 1e11) /* To speed up things a bit */ + { + value /= 1e10; + integral_10_log += 10; + } + while (value >= 10) + { + value /= 10; + integral_10_log++; + } + } + else if (value) /* Not just 0.0 */ + { + while (value <= 1e-10) /* To speed up things a bit */ + { + value *= 1e10; + integral_10_log -= 10; + } + while (value < 1) + { + value *= 10; + integral_10_log--; + } + } + if (g_flag) + { + if (integral_10_log < nr_of_digits && integral_10_log >= -4) + { + format_flag = 0; + nr_of_digits -= integral_10_log; + } + nr_of_digits--; + if (alternate_flag) + /* %#G - No removal of trailing zeros */ + g_flag = 0; + else + /* %G - Removal of trailing zeros */ + alternate_flag = true; + } + + /* %e or %E */ + if (format_flag) + { + dec_point_pos = 0; + } + else + { + /* Less than one... */ + if (integral_10_log < 0) + { + *buf_pointer++ = '0'; + if ((n = nr_of_digits) || alternate_flag) + *buf_pointer++ = '.'; + i = 0; + while (--i > integral_10_log && nr_of_digits) + { + *buf_pointer++ = '0'; + nr_of_digits--; + } + if (integral_10_log < (-n - 1)) + /* Nothing more to do */ + goto CLEAN_UP; + dec_point_pos = 1; + } + else + { + dec_point_pos = - integral_10_log; + } + } + + i = dec_point_pos; + while (i <= nr_of_digits ) + { + value -= (max_float_t)(n = (short)value); /* n=Digit value=Remainder */ + value *= 10; /* Prepare for next shot */ + *buf_pointer++ = n + '0'; + if ( ! i++ && (nr_of_digits || alternate_flag)) + *buf_pointer++ = '.'; + } + + /* Rounding possible */ + if (value >= 5) + { + n = 1; /* Carry */ + cp = buf_pointer - 1; + do + { + if (*cp != '.') + { + if ( (*cp += n) == ('9' + 1) ) + { + *cp = '0'; + n = 1; + } + else + n = 0; + } + } while (cp-- > buf); + if (n) + { + /* %e or %E */ + if (format_flag) + { + cp = buf_pointer; + while (cp > buf) + { + if (*(cp - 1) == '.') + { + *cp = *(cp - 2); + cp--; + } + else + *cp = *(cp - 1); + cp--; + } + integral_10_log++; + } + else + { + cp = ++buf_pointer; + while (cp > buf) + { + *cp = *(cp - 1); + cp--; + } + } + *buf = '1'; + } + } + +CLEAN_UP: + /* %G - Remove trailing zeros */ + if (g_flag) + { + while (*(buf_pointer - 1) == '0') + buf_pointer--; + if (*(buf_pointer - 1) == '.') + buf_pointer--; + } + + /* %e or %E */ + if (format_flag) + { + *buf_pointer++ = format_flag; + if (integral_10_log < 0) + { + *buf_pointer++ = '-'; + integral_10_log = -integral_10_log; + } + else + *buf_pointer++ = '+'; + n = 0; + buf_pointer +=10; + do + { + n++; + *buf_pointer++ = (integral_10_log % 10) + '0'; + integral_10_log /= 10; + } while ( integral_10_log || n < 2 ); + for ( i = n ; n > 0 ; n-- ) + *(buf_pointer - 11 - i + n) = *(buf_pointer - n); + buf_pointer -= 10; + } + return (buf_pointer); +} + +#endif /* CONFIG_PRINTF > PRINTF_NOFLOAT */ + +/** + * This routine forms the core and entry of the formatter. + * + * The conversion performed conforms to the ANSI specification for "printf". + */ +int +PGM_FUNC(_formatted_write)(const char * PGM_ATTR format, + void put_one_char(char, void *), + void *secret_pointer, + va_list ap) +{ +#if CONFIG_PRINTF > PRINTF_REDUCED + MEM_ATTRIBUTE static char bad_conversion[] = "???"; + MEM_ATTRIBUTE static char null_pointer[] = ""; + + MEM_ATTRIBUTE int precision; + MEM_ATTRIBUTE int n; +#if CONFIG_PRINTF_COUNT_CHARS + MEM_ATTRIBUTE int nr_of_chars; +#endif + MEM_ATTRIBUTE int field_width; + MEM_ATTRIBUTE char format_flag; + enum PLUS_SPACE_FLAGS { + PSF_NONE, PSF_PLUS, PSF_MINUS + }; + enum DIV_FACTOR { + DIV_DEC, DIV_HEX, +#if CONFIG_PRINTF_OCTAL_FORMATTER + DIV_OCT, +#endif + }; + MEM_ATTRIBUTE struct { + enum PLUS_SPACE_FLAGS plus_space_flag : 2; +#if CONFIG_PRINTF_OCTAL_FORMATTER + enum DIV_FACTOR div_factor : 2; +#else + enum DIV_FACTOR div_factor : 1; +#endif + bool left_adjust : 1; + bool l_L_modifier : 1; + bool h_modifier : 1; + bool alternate_flag : 1; + bool nonzero_value : 1; + bool zeropad : 1; +#if CPU_HARVARD + bool progmem : 1; +#endif + } flags; + MEM_ATTRIBUTE unsigned long ulong; + +#if CONFIG_PRINTF > PRINTF_NOFLOAT + MEM_ATTRIBUTE max_float_t fvalue; +#endif + + MEM_ATTRIBUTE char *buf_pointer; + MEM_ATTRIBUTE char *ptr; + MEM_ATTRIBUTE const char *hex; + MEM_ATTRIBUTE char buf[FRMWRI_BUFSIZE]; + +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars = 0; +#endif + for (;;) /* Until full format string read */ + { + while ((format_flag = PGM_READ_CHAR(format++)) != '%') /* Until '%' or '\0' */ + { + if (!format_flag) +#if CONFIG_PRINTF_RETURN_COUNT + return (nr_of_chars); +#else + return 0; +#endif + put_one_char(format_flag, secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + if (PGM_READ_CHAR(format) == '%') /* %% prints as % */ + { + format++; + put_one_char('%', secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + continue; + } + + flags.left_adjust = false; + flags.alternate_flag = false; + flags.plus_space_flag = PSF_NONE; + flags.zeropad = false; +#if CPU_HARVARD + flags.progmem = false; +#endif + ptr = buf_pointer = &buf[0]; + hex = HEX_tab; + + /* check for leading '-', '+', ' ','#' or '0' flags */ + for (;;) + { + switch (PGM_READ_CHAR(format)) + { + case ' ': + if (flags.plus_space_flag) + goto NEXT_FLAG; + case '+': + flags.plus_space_flag = PSF_PLUS; + goto NEXT_FLAG; + case '-': + flags.left_adjust = true; + goto NEXT_FLAG; + case '#': + flags.alternate_flag = true; + goto NEXT_FLAG; + case '0': + flags.zeropad = true; + goto NEXT_FLAG; + } + break; +NEXT_FLAG: + format++; + } + + /* Optional field width (may be '*') */ + if (PGM_READ_CHAR(format) == '*') + { + field_width = va_arg(ap, int); + if (field_width < 0) + { + field_width = -field_width; + flags.left_adjust = true; + } + format++; + } + else + { + field_width = 0; + while (PGM_READ_CHAR(format) >= '0' && PGM_READ_CHAR(format) <= '9') + field_width = field_width * 10 + (PGM_READ_CHAR(format++) - '0'); + } + + if (flags.left_adjust) + flags.zeropad = false; + + /* Optional precision (or '*') */ + if (PGM_READ_CHAR(format) == '.') + { + if (PGM_READ_CHAR(++format) == '*') + { + precision = va_arg(ap, int); + format++; + } + else + { + precision = 0; + while (PGM_READ_CHAR(format) >= '0' && PGM_READ_CHAR(format) <= '9') + precision = precision * 10 + (PGM_READ_CHAR(format++) - '0'); + } + } + else + precision = -1; + + /* At this point, "left_adjust" is nonzero if there was + * a sign, "zeropad" is 1 if there was a leading zero + * and 0 otherwise, "field_width" and "precision" + * contain numbers corresponding to the digit strings + * before and after the decimal point, respectively, + * and "plus_space_flag" is either 0 (no flag) or + * contains a plus or space character. If there was no + * decimal point, "precision" will be -1. + */ + + flags.l_L_modifier = false; + flags.h_modifier = false; + + /* Optional 'l','L','z' or 'h' modifier? */ + switch (PGM_READ_CHAR(format)) + { + case 'l': + case 'L': + #if SIZEOF_SIZE_T == SIZEOF_LONG + case 'z': + flags.l_L_modifier = true; + #elif SIZEOF_SIZE_T == SIZEOF_INT + flags.l_L_modifier = true; + case 'z': + #endif + format++; + break; + + case 'h': + flags.h_modifier = true; + format++; + break; + + } + + /* + * At exit from the following switch, we will emit + * the characters starting at "buf_pointer" and + * ending at "ptr"-1 + */ + switch (format_flag = PGM_READ_CHAR(format++)) + { +#if CONFIG_PRINTF_N_FORMATTER + case 'n': + if (sizeof(short) != sizeof(int)) + { + if (sizeof(int) != sizeof(long)) + { + if (h_modifier) + *va_arg(ap, short *) = nr_of_chars; + else if (flags.l_L_modifier) + *va_arg(ap, long *) = nr_of_chars; + else + *va_arg(ap, int *) = nr_of_chars; + } + else + { + if (h_modifier) + *va_arg(ap, short *) = nr_of_chars; + else + *va_arg(ap, int *) = nr_of_chars; + } + } + else + { + if (flags.l_L_modifier) + *va_arg(ap, long *) = nr_of_chars; + else + *va_arg(ap, int *) = nr_of_chars; + } + continue; +#endif + case 'c': + buf[0] = va_arg(ap, int); + ptr++; + break; + + /* Custom formatter for strings in program memory. */ + case 'S': +#if CPU_HARVARD + flags.progmem = true; +#endif + /* Fall trough */ + + case 's': + if ( !(buf_pointer = va_arg(ap, char *)) ) + buf_pointer = null_pointer; + if (precision < 0) + precision = 10000; + + /* + * Move `ptr' to the last character of the + * string that will be actually printed. + */ + ptr = buf_pointer; +#if CPU_HARVARD + if (flags.progmem) + { + for (n=0; pgm_read_char(ptr) && n < precision; n++) + ++ptr; + } + else +#endif + for (n=0; *ptr && n < precision; n++) + ++ptr; + break; + +#if CONFIG_PRINTF_OCTAL_FORMATTER + case 'o': + if (flags.alternate_flag && !precision) + precision++; +#endif + case 'x': + hex = hex_tab; + case 'u': + case 'p': + case 'X': + if (format_flag == 'p') +#if defined(__AVR__) || defined(__I196__) || defined(__MSP430__) /* 16bit pointers */ + ulong = (unsigned long)(unsigned short)va_arg(ap, char *); +#else /* 32bit pointers */ + ulong = (unsigned long)va_arg(ap, char *); +#endif /* 32bit pointers */ + else if (flags.l_L_modifier) + ulong = va_arg(ap, unsigned long); + else if (flags.h_modifier) + ulong = (unsigned long)(unsigned short)va_arg(ap, unsigned int); + else + ulong = va_arg(ap, unsigned int); + + flags.div_factor = +#if CONFIG_PRINTF_OCTAL_FORMATTER + (format_flag == 'o') ? DIV_OCT : +#endif + (format_flag == 'u') ? DIV_DEC : DIV_HEX; + flags.plus_space_flag = PSF_NONE; + goto INTEGRAL_CONVERSION; + + case 'd': + case 'i': + if (flags.l_L_modifier) + ulong = (unsigned long)(long)va_arg(ap, long); + else + ulong = (unsigned long)(long)va_arg(ap, int); + + /* Extract sign */ + if ((signed long)ulong < 0) + { + flags.plus_space_flag = PSF_MINUS; + ulong = (unsigned long)(-((signed long)ulong)); + } + + flags.div_factor = DIV_DEC; + + /* Now convert to digits */ +INTEGRAL_CONVERSION: + ptr = buf_pointer = &buf[FRMWRI_BUFSIZE - 1]; + flags.nonzero_value = (ulong != 0); + + /* No char if zero and zero precision */ + if (precision != 0 || flags.nonzero_value) + { + switch (flags.div_factor) + { + case DIV_DEC: + do + *--buf_pointer = hex[ulong % 10]; + while (ulong /= 10); + break; + + case DIV_HEX: + do + *--buf_pointer = hex[ulong % 16]; + while (ulong /= 16); + break; +#if CONFIG_PRINTF_OCTAL_FORMATTER + case DIV_OCT: + do + *--buf_pointer = hex[ulong % 8]; + while (ulong /= 8); + break; +#endif + } + } + + /* "precision" takes precedence */ + if (precision < 0) + if (flags.zeropad) + precision = field_width - (flags.plus_space_flag != PSF_NONE); + while (precision > (int)(ptr - buf_pointer)) + *--buf_pointer = '0'; + + if (flags.alternate_flag && flags.nonzero_value) + { + if (format_flag == 'x' || format_flag == 'X') + { + *--buf_pointer = format_flag; + *--buf_pointer = '0'; + } +#if CONFIG_PRINTF_OCTAL_FORMATTER + else if ((format_flag == 'o') && (*buf_pointer != '0')) + { + *--buf_pointer = '0'; + } +#endif + } + ASSERT(buf_pointer >= buf); + break; + +#if CONFIG_PRINTF > PRINTF_NOFLOAT + case 'g': + case 'G': + n = 1; + format_flag -= 2; + if (! precision) + { + precision = 1; + } + goto FLOATING_CONVERSION; + case 'f': + format_flag = 0; + case 'e': + case 'E': + n = 0; +FLOATING_CONVERSION: + if (precision < 0) + { + precision = 6; + } + + if (sizeof(double) != sizeof(max_float_t)) + { + fvalue = flags.l_L_modifier ? + va_arg(ap,max_float_t) : va_arg(ap,double); + } + else + fvalue = va_arg(ap,max_float_t); + + if (fvalue < 0) + { + flags.plus_space_flag = PSF_MINUS; + fvalue = -fvalue; + } + ptr = float_conversion (fvalue, + (short)precision, + buf_pointer += field_width, + format_flag, + (char)n, + flags.alternate_flag); + if (flags.zeropad) + { + precision = field_width - (flags.plus_space_flag != PSF_NONE); + while (precision > ptr - buf_pointer) + *--buf_pointer = '0'; + } + break; + +#endif /* CONFIG_PRINTF <= PRINTF_NOFLOAT */ + + case '\0': /* Really bad place to find NUL in */ + format--; + + default: + /* Undefined conversion! */ + ptr = buf_pointer = bad_conversion; + ptr += sizeof(bad_conversion) - 1; + break; + + } + + /* + * This part emittes the formatted string to "put_one_char". + */ + + /* If field_width == 0 then nothing should be written. */ + precision = ptr - buf_pointer; + + if ( precision > field_width) + { + n = 0; + } + else + { + n = field_width - precision - (flags.plus_space_flag != PSF_NONE); + } + + /* emit any leading pad characters */ + if (!flags.left_adjust) + while (--n >= 0) + { + put_one_char(' ', secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + + /* emit flag characters (if any) */ + if (flags.plus_space_flag) + { + put_one_char(flags.plus_space_flag == PSF_PLUS ? '+' : '-', secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + +#if CPU_HARVARD + if (flags.progmem) + { + while (--precision >= 0) + { + put_one_char(pgm_read_char(buf_pointer++), secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + } + else +#endif /* CPU_HARVARD */ + { + /* emit the string itself */ + while (--precision >= 0) + { + put_one_char(*buf_pointer++, secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + } + + /* emit trailing space characters */ + if (flags.left_adjust) + while (--n >= 0) + { + put_one_char(' ', secret_pointer); +#if CONFIG_PRINTF_COUNT_CHARS + nr_of_chars++; +#endif + } + } + +#else /* PRINTF_REDUCED starts here */ + +#if CONFIG_PRINTF > PRINTF_NOMODIFIERS + bool l_modifier, h_modifier; + unsigned long u_val, div_val; +#else + unsigned int u_val, div_val; +#endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + + char format_flag; + unsigned int nr_of_chars, base; + char outChar; + char *ptr; + + nr_of_chars = 0; + for (;;) /* Until full format string read */ + { + while ((format_flag = PGM_READ_CHAR(format++)) != '%') /* Until '%' or '\0' */ + { + if (!format_flag) + return (nr_of_chars); + put_one_char(format_flag, secret_pointer); + nr_of_chars++; + } + +#if CONFIG_PRINTF > PRINTF_NOMODIFIERS + /* + * Optional 'l', 'z' or 'h' modifiers? + */ + l_modifier = h_modifier = false; + switch (PGM_READ_CHAR(format)) + { + case 'l': + #if SIZEOF_SIZE_T == SIZEOF_LONG + case 'z': + l_modifier = true; + #elif SIZEOF_SIZE_T == SIZEOF_INT + l_modifier = true; + case 'z': + #endif + format++; + break; + + case 'h': + h_modifier = true; + format++; + break; + } +#endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + + switch (format_flag = PGM_READ_CHAR(format++)) + { + case 'c': + format_flag = va_arg(ap, int); + default: + put_one_char(format_flag, secret_pointer); + nr_of_chars++; + continue; + + case 's': + ptr = va_arg(ap, char *); + while ((format_flag = *ptr++)) + { + put_one_char(format_flag, secret_pointer); + nr_of_chars++; + } + continue; + + case 'o': + base = 8; + if (IS_SHORT) + div_val = 0x8000; + else + div_val = 0x40000000; + goto CONVERSION_LOOP; + + case 'd': + base = 10; + if (IS_SHORT) + div_val = 10000; + else + div_val = 1000000000; + goto CONVERSION_LOOP; + + case 'X': + case 'x': + base = 16; + if (IS_SHORT) + div_val = 0x1000; + else + div_val = 0x10000000; + +CONVERSION_LOOP: +#if CONFIG_PRINTF > PRINTF_NOMODIFIERS + if (h_modifier) + { + if (format_flag == 'd') + u_val = (short)va_arg(ap, int); + else + u_val = (unsigned short)va_arg(ap, int); + } + else if (l_modifier) + u_val = va_arg(ap, long); + else + { + if (format_flag == 'd') + u_val = va_arg(ap, int); + else + u_val = va_arg(ap, unsigned int); + } + +#else /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + u_val = va_arg(ap,int); +#endif /* CONFIG_PRINTF > PRINTF_NOMODIFIERS */ + if (format_flag == 'd') + { + if (((int)u_val) < 0) + { + u_val = - u_val; + put_one_char('-', secret_pointer); + nr_of_chars++; + } + } + while (div_val > 1 && div_val > u_val) + { + div_val /= base; + } + do + { + outChar = (u_val / div_val) + '0'; + if (outChar > '9') + { + if (format_flag == 'x') + outChar += 'a'-'9'-1; + else + outChar += 'A'-'9'-1; + } + put_one_char(outChar, secret_pointer); + nr_of_chars++; + u_val %= div_val; + div_val /= base; + } + while (div_val); + + } /* end switch(format_flag...) */ + } +#endif /* CONFIG_PRINTF > PRINTF_REDUCED */ +} + +#endif /* CONFIG_PRINTF */ diff --git a/bertos/mware/formatwr.h b/bertos/mware/formatwr.h new file mode 100644 index 0000000..d80410f --- /dev/null +++ b/bertos/mware/formatwr.h @@ -0,0 +1,89 @@ +/** + * \file + * + * + * + * \brief Basic "printf", "sprintf" and "fprintf" formatter. + * + * $WIZ$ module_name = "formatwr" + * $WIZ$ module_configuration = "bertos/cfg/cfg_formatwr.h" + * $WIZ$ module_depends = "hex" + * $WIZ$ module_harvard = "both" + */ + +#ifndef MWARE_FORMATWR_H +#define MWARE_FORMATWR_H + +#include "cfg/cfg_formatwr.h" + +#include /* CPU_HARVARD */ + +#include /* va_list */ + +/** + * \name _formatted_write() configuration + * $WIZ$ printf_list = "PRINTF_DISABLED", "PRINTF_NOMODIFIERS", "PRINTF_REDUCED", "PRINTF_NOFLOAT", "PRINTF_FULL" + * \{ + */ +#define PRINTF_DISABLED 0 +#define PRINTF_NOMODIFIERS 1 +#define PRINTF_REDUCED 2 +#define PRINTF_NOFLOAT 3 +#define PRINTF_FULL 4 +/* \} */ + +#ifndef CONFIG_PRINTF_RETURN_COUNT + /** Enable/disable _formatted_write return value */ + #define CONFIG_PRINTF_RETURN_COUNT 1 +#endif + +int +_formatted_write( + const char *format, + void put_char_func(char c, void *user_data), + void *user_data, + va_list ap); + +#if CPU_HARVARD + #include + int _formatted_write_P( + const char * PROGMEM format, + void put_char_func(char c, void *user_data), + void *user_data, + va_list ap); +#endif /* CPU_HARVARD */ + +int sprintf_testSetup(void); +int sprintf_testRun(void); +int sprintf_testTearDown(void); + +#endif /* MWARE_FORMATWR_H */ + diff --git a/bertos/mware/hex.c b/bertos/mware/hex.c new file mode 100644 index 0000000..7e744ee --- /dev/null +++ b/bertos/mware/hex.c @@ -0,0 +1,41 @@ +/** + * \file + * + * + * \brief Poor man's hex arrays (implementation). + * + * \author Bernie Innocenti + */ + + +#include "hex.h" + +const char hex_tab[16] = { '0','1','2','3','4','5','6','7','8','9','a','b','c','d','e','f' }; +const char HEX_tab[16] = { '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F' }; diff --git a/bertos/mware/hex.h b/bertos/mware/hex.h new file mode 100644 index 0000000..ac8f217 --- /dev/null +++ b/bertos/mware/hex.h @@ -0,0 +1,45 @@ +/** + * \file + * + * + * \brief Poor man's hex arrays (implementation). + * + * + * \author Bernie Innocenti + */ + +#ifndef MWARE_HEX_H +#define MWARE_HEX_H + +extern const char hex_tab[16]; +extern const char HEX_tab[16]; + +#endif /* MWARE_HEX_H */ diff --git a/bertos/mware/ini_reader.c b/bertos/mware/ini_reader.c new file mode 100644 index 0000000..b49198b --- /dev/null +++ b/bertos/mware/ini_reader.c @@ -0,0 +1,161 @@ +/** + * \file + * + * + * \brief Ini file reader module. + * + * \author Luca Ottaviano + */ + +#include "ini_reader.h" +#include "cfg/cfg_ini_reader.h" +#include +#include +#include + +/* + * Returns when the line containing the section is found. + * The file pointer is positioned at the start of the next line. + * Returns EOF if no section was found, 0 otherwise. + */ +static int findSection(KFile *fd, const char *section, size_t section_len, char *line, size_t size) +{ + while (kfile_gets(fd, line, size) != EOF) + { + char *ptr = line; + unsigned i; + /* accept only sections that begin at first char */ + if (*ptr++ != '[') + continue; + + /* find the end-of-section character */ + for (i = 0; i < size && *ptr != ']'; ++i, ++ptr) + ; + + /* The found section could be long that our section key */ + if (section_len != i) + continue; + + /* did we find the correct section? */ + if(strncmp(&line[1], section, section_len)) + continue; + else + return 0; + } + return EOF; +} + +/* + * Fills the argument with the key found in line + */ +static char *getKey(const char *line, char *key, size_t size) +{ + /* null-terminated string */ + while (isspace((unsigned char)*line)) + ++line; + int i = 0; + while (*line != '=' && !isspace((unsigned char)*line) && size) + { + key[i++] = *line; + ++line; + --size; + } + size ? (key[i] = '\0') : (key[i-1] = '\0'); + return key; +} + +/* + * Fills the argument with the value found in line. + */ +static char *getValue(const char *line, char *value, size_t size) +{ + while (*line++ != '=') + ; + while (isspace((unsigned char)*line)) + ++line; + int i = 0; + while (*line && size) + { + value[i++] = *line++; + --size; + } + size ? (value[i] = '\0') : (value[i-1] = '\0'); + return value; +} + +/** + * Look for key inside a section. + * + * The function reads lines from input file. It fills the line parameter to allow splitting + * the key-value couple. It returns with error if a new section begins and no key was found. + * \return 0 if key was found, EOF on errors. + */ +static int findKey(KFile *fd, const char *key, char *line, size_t size) +{ + int err; + do + { + err = kfile_gets(fd, line, size); + char curr_key[30]; + getKey(line, curr_key, 30); + /* check key */ + if (!strcmp(curr_key, key)) + return 0; + } + while (err != EOF && *line != '['); + return EOF; +} + +/* + * On errors, the function returns EOF and fills the buffer with the default value. + */ +int ini_getString(KFile *fd, const char *section, const char *key, const char *default_value, char *buf, size_t size) +{ + char line[CONFIG_INI_MAX_LINE_LEN]; + + if (kfile_seek(fd, 0, KSM_SEEK_SET) == EOF) + goto error; + + if (findSection(fd, section, strlen(section), line, CONFIG_INI_MAX_LINE_LEN) == EOF) + goto error; + + if (findKey(fd, key, line, CONFIG_INI_MAX_LINE_LEN) == EOF) + goto error; + else + getValue(line, buf, size); + return 0; + +error: + strncpy(buf, default_value, size); + if (size > 0) + buf[size - 1] = '\0'; + return EOF; +} diff --git a/bertos/mware/ini_reader.h b/bertos/mware/ini_reader.h new file mode 100644 index 0000000..855365c --- /dev/null +++ b/bertos/mware/ini_reader.h @@ -0,0 +1,79 @@ +/** + * \file + * + * + * \defgroup ini_reader Ini file reader + * \ingroup mware + * \{ + * + * \brief Ini file reader module. + * + * The format accepted is: + * - Sections must begin at beginning of line. [ Long name ] will be found only if " Long name " is specified as section name. + * - key can contain any spaces at the beginning and before '=' but not in the middle. Eg. "long key name" is not valid. + * - values will be stripped of spaces at the beginning and will run until end-of-line. Eg. "= long value" will be treated as "long value". + * - no nested sections are allowed. + * - no comments are allowed inside a line with key=value pair. + * - every line that doesn't contain a '=' or doesn't start with '[' will be ignored. + * + * \author Luca Ottaviano + * + * $WIZ$ module_name = "ini_reader" + * $WIZ$ module_configuration = "bertos/cfg/cfg_ini_reader.h" + * $WIZ$ module_depends = "kfile" + */ + +#ifndef INI_READER_H +#define INI_READER_H + +#include + +/** + * \brief Returns the value for the given string in char* format. + * Reads the whole input file looking for section and key and fills the provided buffer with + * the corresponding value. + * On errors, the function fills the provided buffer with the default value and returns EOF. + * \param fd An initialized KFile structure. + * \param section The section to be looked for. + * \param key The key to search for. + * \param default_value The default value. + * \param buf The buffer to be filled. + * \param size The size of the provided buffer. + * \return 0 if section and key were found, EOF on errors. + */ +int ini_getString(KFile *fd, const char *section, const char *key, const char *default_value, char *buf, size_t size); + +int ini_reader_testSetup(void); +int ini_reader_testRun(void); +int ini_reader_testTearDown(void); + +/** \} */ // defgroup ini_reader +#endif /* INI_READER_H */ diff --git a/bertos/mware/ini_reader_test.c b/bertos/mware/ini_reader_test.c new file mode 100644 index 0000000..5913918 --- /dev/null +++ b/bertos/mware/ini_reader_test.c @@ -0,0 +1,100 @@ +/** + * \file + * + * + * \brief Test function for ini_reader module. + * + * $test$: cp bertos/cfg/cfg_kfile.h $cfgdir/ + * $test$: echo "#undef CONFIG_KFILE_GETS" >> $cfgdir/cfg_kfile.h + * $test$: echo "#define CONFIG_KFILE_GETS 1" >> $cfgdir/cfg_kfile.h + * + * \author Luca Ottaviano + */ + +#include +#include + +#include // strcmp + +#include "ini_reader.h" + +const char ini_file[] = "./test/ini_reader_file.ini"; +static KFilePosix kf; + +int ini_reader_testSetup(void) +{ + kdbg_init(); + if (!kfile_posix_init(&kf, ini_file, "r")) + { + kprintf("No test file found\n"); + return -1; + } + return 0; +} + +int ini_reader_testRun(void) +{ + char buf[30]; + memset(buf, 0, 30); + + ASSERT(ini_getString(&kf.fd, "First", "String", "default", buf, 30) != EOF); + ASSERT(strcmp(buf, "noot") == 0); + + ASSERT(ini_getString(&kf.fd, "Second", "Val", "default", buf, 30) != EOF); + ASSERT(strcmp(buf, "2") == 0); + + ASSERT(ini_getString(&kf.fd, "First", "Empty", "default", buf, 30) != EOF); + ASSERT(strcmp(buf, "") == 0); + + ASSERT(ini_getString(&kf.fd, "Second", "Bar", "default", buf, 30) == EOF); + ASSERT(strcmp(buf, "default") == 0); + + ASSERT(ini_getString(&kf.fd, "Foo", "Bar", "default", buf, 30) == EOF); + ASSERT(strcmp(buf, "default") == 0); + + ASSERT(ini_getString(&kf.fd, "Second", "Long key", "", buf, 30) == EOF); + + ASSERT(ini_getString(&kf.fd, "Second", "comment", "", buf, 30) != EOF); + ASSERT(strcmp(buf, "line with #comment") == 0); + + ASSERT(ini_getString(&kf.fd, "Long section with spaces", "value", "", buf, 30) != EOF); + ASSERT(strcmp(buf, "long value") == 0); + + ASSERT(ini_getString(&kf.fd, "Long section with spaces", "no_new_line", "", buf, 30) != EOF); + ASSERT(strcmp(buf, "value") == 0); + return 0; +} + +int ini_reader_testTearDown(void) +{ + return kfile_close(&kf.fd); +} + +TEST_MAIN(ini_reader); diff --git a/bertos/mware/messages.c b/bertos/mware/messages.c new file mode 100644 index 0000000..678642c --- /dev/null +++ b/bertos/mware/messages.c @@ -0,0 +1,66 @@ +/** + * \file + * + * + * \brief Messages for LCD. + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#include "messages.h" + +/** + * Array of pointers to localized strings. Should be filled + * by localization stuff, but not for now. + */ +const char *msg_strings[MSG_COUNT] = { + 0, + // TODO: add your strings here +}; + +/* Buffer for catalog file */ +/* char msg_buf[MSG_BUFSIZE]; */ + + +/* The following does not work (move string tables into the DMSG/CMSG segments) + * #pragma memory=dataseg(DMSG) + * #pragma memory=constseg(CMSG) + */ + + +/** + * Untranslated constant strings used more than once are + * grouped here to save ROM space. + */ +const char str_empty[] = ""; + diff --git a/bertos/mware/messages.h b/bertos/mware/messages.h new file mode 100644 index 0000000..4a9a203 --- /dev/null +++ b/bertos/mware/messages.h @@ -0,0 +1,67 @@ +/** + * \file + * + * + * \brief Definitions of constant string messages. + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#ifndef MWARE_MESSAGES_H +#define MWARE_MESSAGES_H + +enum +{ + MSG_NULL, + + // TODO: add your labels here. + + MSG_COUNT +}; + +#warning FIXME:Revise me! + +#define MSG_BUFSIZE 6144 /* FIXME: how much? */ + +/* String tables */ +/* extern const char *msg_strings const [MSG_COUNT]; */ +/* extern char msg_buf[MSG_BUFSIZE]; */ + + +/* Macros to access translated messages */ +#define MSG(x) msg_strings[x] +#define PTRMSG(x) ((x) < (const_iptr_t)256 ? msg_strings[(unsigned int)(x)] : (const char *)(x)) + + +#endif /* MWARE_MESSAGES_H */ + diff --git a/bertos/mware/observer.c b/bertos/mware/observer.c new file mode 100644 index 0000000..6049b56 --- /dev/null +++ b/bertos/mware/observer.c @@ -0,0 +1,80 @@ +/** + * \file + * + * + * \brief Simple notifier for the observer/subject pattern (implementation) + * + * \author Bernie Innocenti + */ + +#include "observer.h" +#include // IRQ_DISABLE/IRQ_ENABLE + + +void observer_SetEvent(Observer *observer, void (*event)(int event_id, void *param)) +{ + observer->event = event; +} + +void observer_InitSubject(Subject *subject) +{ + LIST_INIT(&subject->observers); +} + +void observer_Subscribe(Subject *subject, Observer *observer) +{ + ATOMIC(ADDHEAD(&subject->observers, &observer->link)); +} + +void observer_Unsubscribe(UNUSED_ARG(Subject *,subject), Observer *observer) +{ + ATOMIC(REMOVE(&observer->link)); +} + +void observer_notify(Subject *subject, int event_id, void *param) +{ + Observer *observer; + cpu_flags_t irqstate; + IRQ_SAVE_DISABLE(irqstate); + + /* + * Run over list with protection against other + * threads, but re-enable irqs in callbacks. + */ + FOREACH_NODE(observer, &subject->observers) + { + IRQ_RESTORE(irqstate); + observer->event(event_id, param); + IRQ_SAVE_DISABLE(irqstate); + } + + IRQ_RESTORE(irqstate); +} diff --git a/bertos/mware/observer.h b/bertos/mware/observer.h new file mode 100644 index 0000000..9d1bc6f --- /dev/null +++ b/bertos/mware/observer.h @@ -0,0 +1,95 @@ +/** + * \file + * + * + * \brief Simple notifier for the subject/observer pattern (interface) + * + * \author Bernie Innocenti + */ +#ifndef MWARE_OBSERVER_H +#define MWARE_OBSERVER_H + +#include + +/** + * + * Here's a simple example: + * + * \code + * Subject kbd_driver; + * + * Observer kbd_observer; + * + * void key_pressed(int event, void *_param) + * { + * char *param = (char *)_param; + * + * if (event == EVENT_KBD_PRESSED) + * printf("You pressed %c\n", *param); + * } + * + * void register_kbd_listener(void) + * { + * observer_SetEvent(&kbd_observer, key_pressed); + * observer_Subscribe(&kbd_driver, &kbd_observer); + * } + * \endcode + */ +typedef struct Observer +{ + Node link; + void (*event)(int event_id, void *param); +} Observer; + +typedef struct Subject +{ + /// Subscribed observers. + List observers; + +} Subject; + +void observer_SetEvent(Observer *observer, void (*event)(int event_id, void *param)); + +#define OBSERVER_INITIALIZER(callback) { { NULL, NULL }, callback } + +void observer_InitSubject(Subject *subject); + +/// Aggiunge un Observer all'insieme +void observer_Subscribe(Subject *subject, Observer *observer); + +/// Rimuove un Observer dall'insieme +void observer_Unsubscribe(Subject *subject, Observer *observer); + +/// per tutti gli elementi nel set notifica l'evento, chiamando la relativa +/// funzione event +void observer_notify(Subject *subject, int event_id, void *param); + +#endif /* MWARE_OBSERVER_H */ diff --git a/bertos/mware/parser.c b/bertos/mware/parser.c new file mode 100644 index 0000000..71aec30 --- /dev/null +++ b/bertos/mware/parser.c @@ -0,0 +1,323 @@ +/** + * \file + * + * + * \brief Channel protocol parser and commands. + * + * This file contains the channel protocol parser and + * the definition of the protocol commands. Commands are defined + * in a "CmdTemplate" type array, containing: + * - the name of the command, + * - the arguments it expects to receive, + * - the output values, + * - the name of the function implementing the command. + * + * The arguments and results are passed to command function + * using an union: the element of the union to use for each + * argument is determined by format strings present in the + * CmdTemplate table. + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Giovanni Bajo + * + * + */ + + +#include "parser.h" + +#include "cfg/cfg_parser.h" + +#include +#include + +#include // atol(), NULL +#include // strchr(), strcmp() + +/// Hashtable hook to extract the key from a command +static const void* get_key_from_command(const void* cmd, uint8_t* length); + +/// Hashtable that handles the commands that can be executed +DECLARE_HASHTABLE_STATIC(commands, CONFIG_MAX_COMMANDS_NUMBER, get_key_from_command); + + +/** + * \brief Tokenize one word at a time from a text. + * + * This function is similar to strtok, but does not use any implicit + * context, nor it does modify the input buffer in any form. + * The word is returned as a STL-like [begin,end) range. + * + * To extract the first word, make both begin and end point at the + * start of the text, and call the function. Then, subsequent + * calls will return the following words (assuming the begin/end + * variable are not modified between calls). + * + * \param begin Will contain the index of the first character of the word + * \param end Will contain the index of the character after the last + * character of the word + * + * \return True if a word was extracted, false if we got to the end + * of the string without extracting any word. + */ +static bool get_word(const char **begin, const char **end) +{ + const char *cur = *end; + + while ((*cur == ' ' || *cur == '\t') && *cur) + ++cur; + + *begin = cur; + + while ((*cur != ' ' && *cur != '\t') && *cur) + ++cur; + + *end = cur; + + return (*end != *begin); +} + + +/** + * \brief Command arguments parser. + * + * Using the format pointed by the argument fmt + * parses the input string filling the array argv + * with input parameters of the correct type. + * + * \param fmt Parameters format string. + * \param input Input string. + * \param argv Array filled with parameters. + * + * \return False in case of errors, otherwise true. + */ +static bool parseArgs(const char *fmt, const char *input, parms argv[]) +{ + const char *begin = input, *end = input; + + while (*fmt) + { + // Extract the argument + if (!get_word(&begin, &end)) + return false; + + switch (*fmt) + { + case 'd': + (*argv++).l = atol(begin); + break; + + case 's': + (*argv++).s = begin; + break; + + default: + ASSERT2(0, "Unknown format for argument"); + return false; + } + + ++fmt; + } + + /* check if there are remaining args */ + if (get_word(&begin, &end)) + return false; + + return true; +} + +/// Hook provided by the parser for matching of command names (TAB completion) for readline +const char* parser_rl_match(UNUSED_ARG(void *,dummy), const char *word, int word_len) +{ + HashIterator cur; + HashIterator end = ht_iter_end(&commands); + const char *found = NULL; + + for (cur = ht_iter_begin(&commands); + !ht_iter_cmp(cur, end); + cur = ht_iter_next(cur)) + { + const struct CmdTemplate* cmdp = (const struct CmdTemplate*)ht_iter_get(cur); + if (strncmp(cmdp->name, word, word_len) == 0) + { + // If there was another matching word, it means that we have a multiple + // match: then return NULL. + if (found) + return NULL; + + found = cmdp->name; + } + } + + return found; +} + +#if CONFIG_ENABLE_COMPAT_BEHAVIOUR +bool parser_get_cmd_id(const char* line, unsigned long* ID) +{ + const char *begin = line, *end = line; + char *end2; + + // The first word is the ID + if (!get_word(&begin, &end)) + return false; + + *ID = strtoul(begin, &end2, 10); + if (end2 != end) + return false; + + return true; +} +#endif + +/** + * Find the template for the command contained in the text line. + * The template can be used to tokenize the command and interpret + * it. + * + * This function can be used to find out which command is contained + * in a given text line without parsing all the parameters and + * executing it. + * + * \param input Text line to be processed (ASCIIZ) + * + * \return The command template associated with the command contained + * in the line, or NULL if the command is invalid. + */ +const struct CmdTemplate* parser_get_cmd_template(const char *input) +{ + const char *begin = input, *end = input; + +#if CONFIG_ENABLE_COMPAT_BEHAVIOUR + // Skip the ID, and get the command + if (!get_word(&begin, &end)) + return NULL; +#endif + if (!get_word(&begin, &end)) + return NULL; + + return (const struct CmdTemplate*)ht_find(&commands, begin, end-begin); +} + +static const char *skip_to_params(const char *input, const struct CmdTemplate *cmdp) +{ + const char *begin = input, *end = input; + +#if CONFIG_ENABLE_COMPAT_BEHAVIOUR + // Skip the ID, and get the command + if (!get_word(&begin, &end)) + return NULL; +#endif + if (!get_word(&begin, &end)) + return NULL; + + ASSERT2(strlen(cmdp->name) == (size_t)(end-begin), "Invalid command template specified"); + ASSERT2(!strncmp(begin, cmdp->name, end-begin), "Invalid command template specified"); + + return end; +} + +/** + * Extract the arguments for the command contained in the text line. + * + * The first argument will always be the command name, so the actual arguments + * will start at index 1. + * + * \param input Text line to be processed (ASCIIZ) + * \param cmdp Command template for this line + * \param args Will contain the extracted parameters + * + * \return True if everything OK, false in case of parsing error. + */ +bool parser_get_cmd_arguments(const char* input, const struct CmdTemplate* cmdp, parms args[CONFIG_PARSER_MAX_ARGS]) +{ + input = skip_to_params(input, cmdp); + if (!input) + return false; + + args[0].s = cmdp->name; + if (!parseArgs(cmdp->arg_fmt, input, args + 1)) + return false; + + return true; +} + +static const void* get_key_from_command(const void* cmd, uint8_t* length) +{ + const struct CmdTemplate* c = cmd; + *length = strlen(c->name); + return c->name; +} + +/** + * \brief Command input handler. + * + * Process the input, calling the requested command (if found). + * + * \param input Text line to be processed (ASCIIZ) + * + * \return true if everything is OK, false in case of errors + */ +bool parser_process_line(const char* input) +{ + const struct CmdTemplate *cmdp; + parms args[CONFIG_PARSER_MAX_ARGS]; + + cmdp = parser_get_cmd_template(input); + if (!cmdp) + return false; + + if (!parser_get_cmd_arguments(input, cmdp, args)) + return false; + + if (!parser_execute_cmd(cmdp, args)) + return false; + + return true; +} + +/** + * Register a new command into the parser + * + * \param cmd Command template describing the command + * \return true if registration was successful, false otherwise + */ +bool parser_register_cmd(const struct CmdTemplate* cmd) +{ + return ht_insert(&commands, cmd); +} + +void parser_init(void) +{ + // Initialize the hashtable used to store the command description + ht_init(&commands); +} diff --git a/bertos/mware/parser.h b/bertos/mware/parser.h new file mode 100644 index 0000000..281db39 --- /dev/null +++ b/bertos/mware/parser.h @@ -0,0 +1,277 @@ +/** + * \file + * + * + * \defgroup parser Simple RPC machinery + * \ingroup mware + * \{ + * + * \brief Channel protocol parser and commands. + * + * This module provides a simple text based RPC implementation. + * Often there is the need to give a command to the device and receive results + * back. Each command may have a variable number of input and output + * parameters, with variable type, and a return code which indicates if the + * command was successfully executed or not; this module provides the machinery + * to facilitate the above RPC scenario. + * You will need to write the RPC input and reply code as well as + * the definition of the commands. + * + * Commands are defined using a CmdTemplate struct containing: + * - command name: the string that will be matched by the parser; + * - command arguments: a string representing type and number of input + * arguments; + * - command output: a string representing type and number of output arguments; + * - function callback: function implementing the command. + * + * Once you have declared the commands, you need to register them in the + * parser with the function parser_register_cmd(). + * You are strongly encouraged to use MAKE_CMD() (or alternatively + * MAKE_TEMPLATE()) and REGISTER_CMD() to declare and register commands. + * + * A command line can be parsed with the following steps: + * - find the corresponding command template with parser_get_cmd_template() + * - extract command arguments with parser_get_cmd_arguments() + * - execute the command with parser_execute_cmd() + * + * You can also provide interactive command line completion using + * parser_rl_match(). + * + * Example: + * \code + * // Declare a buzzer command + * MAKE_CMD(beep, "d", "", + * ({ + * buz_beep(args[1].l); + * RC_OK; + * }), 0) + * + * // initialize the parser + * parser_init(); + * REGISTER_CMD(beep); + * + * // parse an input line + * char buf[80]; + * // read line from somewhere + * rpc_get(buf); + * // now parse the line + * const struct CmdTemplate *templ; + * templ = parser_get_cmd_template(buf); + * + * // Take arguments (optionally check errors) + * parms args[PARSER_MAX_ARGS]; + * parser_get_cmd_arguments(buf, templ, args); + * //Execute command + * if(!parser_execute_cmd(templ, args)) + * { + * // error + * } + * // Now args contain the outputs of the function, you can send it + * // back to the caller + * rpc_reply(args) + * + * \endcode + * + * Configuration file: cfg_parser.h + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + * \author Giovanni Bajo + * + * $WIZ$ module_name = "parser" + * $WIZ$ module_configuration = "bertos/cfg/cfg_parser.h" + * $WIZ$ module_depends = "kfile", "hashtable" + */ + + +#ifndef MWARE_PARSER_H +#define MWARE_PARSER_H + +#include "cfg/cfg_parser.h" + +#include +#include + +/** + * Error generated by the commands through the return code. + */ +typedef enum +{ + RC_ERROR = -1, ///< Reply with error. + RC_OK = 0, ///< No reply (ignore reply arguments). + RC_REPLY = 1, ///< Reply command arguments. + RC_SKIP = 2 ///< Skip following commands +} ResultCode; + +/** union that contains parameters passed to and from commands */ +typedef union { long l; const char *s; } parms; +/** pointer to commands */ +typedef ResultCode (*CmdFuncPtr)(parms args_results[]); + +/** + * Define a command that can be tokenized by the parser. + * + * The format strings are sequences of characters, one for each + * parameter/result. Valid characters are: + * + * d - a long integer, in decimal format + * s - a var string (in RAM) + * + * \note To create and fill an instance for this function, it is strongly + * advised to use \c DECLARE_CMD_HUNK (cmd_hunk.h). + */ +struct CmdTemplate +{ + const char *name; ///< Name of command + const char *arg_fmt; ///< Format string for the input + const char *result_fmt; ///< Format string for the output + CmdFuncPtr func; ///< Pointer to the handler function + uint16_t flags; ///< Currently unused. +}; + +#define REGISTER_FUNCTION parser_register_cmd + +/** + * Utility function to register a command. + * + * \param NAME Command name to register + */ +#define REGISTER_CMD(NAME) \ + do { \ + if (!REGISTER_FUNCTION(&cmd_ ## NAME ## _template)) \ + ASSERT2(0, "Error in registering command, no space left"); \ + } while (0) + +/** + * Utility macro to create a command template. + * + * It requires that a callback function with name \a cmd_NAME + * is already defined. + * \param NAME Command name + * \param ARGS Input arguments + * \param RES Output arguments + * \param FLAGS Command flags + */ +#define MAKE_TEMPLATE(NAME, ARGS, RES, FLAGS) \ +const struct CmdTemplate cmd_ ## NAME ## _template = \ +{ \ + #NAME, ARGS, RES, cmd_ ## NAME, FLAGS \ +}; + +/** + * Utility macro to create command templates and callback functions. + * + * Example for a version command: + * \code + * MAKE_CMD(ver, "", "ddd", + * ({ + * args[1].l = VERS_MAJOR; + * args[2].l = VERS_MINOR; + * args[3].l = VERS_REV; + * RC_OK; + * }), 0); + * \endcode + * + * Remember that input and output parameters start from index 1, since + * args[0] is the command itself. + * The last line is the return value of the function. + * + * \param NAME Command name matched by the parser + * \param ARGS Input arguments to the command + * \param RES Output arguments of the command + * \param BODY Command body, expressed with C 'statement expression' + * \param FLAGS Command flags + */ +#define MAKE_CMD(NAME, ARGS, RES, BODY, FLAGS) \ +static ResultCode cmd_ ## NAME (parms *args) \ +{ \ + return (ResultCode)BODY; \ +} \ +MAKE_TEMPLATE(NAME, ARGS, RES, FLAGS) + +/** + * Initialize the parser module + * + * \note This function must be called before any other function in this module + */ +void parser_init(void); + +bool parser_register_cmd(const struct CmdTemplate* cmd); + + +/** + * Hook for readline to provide completion support for the commands + * registered in the parser. + * + * \note This is meant to be used with mware/readline.c. See the + * documentation there for a description of this hook. + */ +const char* parser_rl_match(void* dummy, const char* word, int word_len); + +bool parser_process_line(const char* line); + +/** + * Execute a command with its arguments, and fetch its results. + * + * The \a args paramenter is value-result: it provides input arguments to + * the callback function and it stores output values on return. + * + * \param templ Template of the command to be executed + * \param args Arguments for the command, and will contain the results + * + * \return False if the command returned an error, true otherwise + */ +INLINE bool parser_execute_cmd(const struct CmdTemplate* templ, parms args[CONFIG_PARSER_MAX_ARGS]) +{ + return (templ->func(args) == 0); +} + +const struct CmdTemplate* parser_get_cmd_template(const char* line); + +bool parser_get_cmd_arguments(const char* line, const struct CmdTemplate* templ, parms args[CONFIG_PARSER_MAX_ARGS]); + +#if CONFIG_ENABLE_COMPAT_BEHAVIOUR +/** + * Extract the ID from the command text line. + * + * \param line Text line to be processed (ASCIIZ) + * \param ID Will contain the ID extracted. + * + * \return True if everything ok, false if there is no ID + * + */ +bool parser_get_cmd_id(const char* line, unsigned long* ID); +#endif + + +/** \} */ // defgroup parser +#endif /* MWARE_PARSER_H */ + diff --git a/bertos/mware/pgm.h b/bertos/mware/pgm.h new file mode 100644 index 0000000..8f6ce49 --- /dev/null +++ b/bertos/mware/pgm.h @@ -0,0 +1,2 @@ +#warning This header is OBSOLETE +#include diff --git a/bertos/mware/readline.c b/bertos/mware/readline.c new file mode 100644 index 0000000..dcad52b --- /dev/null +++ b/bertos/mware/readline.c @@ -0,0 +1,497 @@ +/** + * \file + * + * + * \brief Line editing support with history + * + * Rationale for basic implementation choices: + * + * \li The history is implemented storing consecutive ASCIIZ strings within an array of memory. When + * the history is full, the first (oldest) line is cancelled and the whole buffer is memmoved to + * overwrite it and make room. while this is is obviously not the fastest algorithm (which would + * require the use of a circular buffer) it is surely good enough for this module, which does not + * aim at fast performances (line editing does not require to be blazingly fast). + * + * \li The first character in the history is always \c \\0, and it is used as a guard. By 'wasting' it + * in this way, the code actually gets much simpler in that we remove many checks when moving + * backward (\c i>0 and similar). + * + * \li While editing, the current index points to the position of the buffer which contains the + * last character typed in (exactly like a stack pointer). This also allows to simplify calculations + * and to make easier using the last byte of history. + * + * \li While editing, the current line is always kept null-terminated. This is important because + * if the user press ENTER, we must have room to add a \c \\0 to terminate the line. If the line + * is as long as the whole history buffer, there would not be space for it. By always keeping the + * \c \\0 at the end, we properly ensure this without making index checks harder. + * + * \li When removing a line from the history (see \c pop_history()), instead of updating all the + * indices we have around, we move backward the pointer to the history we use. This way, we don't + * have to update anything. This means that we keep two pointers to the history: \c real_history + * always points to the physical start, while \c history is the adjusted pointer (that is + * dereference to read/write to it). + * + * \todo Use up/down to move through history The history line will be copied to the current line, + * making sure there is room for it. + * + * \author Giovanni Bajo + */ + + +#include "readline.h" + +#include +#include + +#include + +/// Enable compilation of the unit test code +#define DEBUG_UNIT_TEST 0 + +/// Enable dump of the history after each line +#define DEBUG_DUMP_HISTORY 0 + + +/** Special keys (escape sequences converted to a single code) */ +enum RL_KEYS { + SPECIAL_KEYS = 0x1000, + + /* + * Three byte keys: + * ################# + * UpArrow: 0x1B 0x5B 0X41 + * DownArrow: 0x1B 0x5B 0X42 + * RightArrow: 0x1B 0x5B 0x43 + * LeftArrow: 0x1b 0x5B 0x44 + * Beak(Pause): 0x1b 0x5B 0x50 + */ + KEY_UP_ARROW, + KEY_DOWN_ARROW, + KEY_LEFT_ARROW, + KEY_RIGHT_ARROW, + KEY_PAUSE, + + /* + * Four byte keys: + * ################ + * F1: 0x1b 0x5B 0x5B 0x41 + * F2: 0x1b 0x5B 0x5B 0x42 + * F3: 0x1b 0x5B 0x5B 0x43 + * F4: 0x1b 0x5B 0x5B 0x44 + * F5: 0x1b 0x5B 0x5B 0x45 + * Ins: 0x1b 0x5B 0x32 0x7E + * Home: 0x1b 0x5B 0x31 0x7E + * PgUp: 0x1b 0x5B 0x35 0x7E + * Del: 0x1b 0x5B 0x33 0x7E + * End: 0x1b 0x5B 0x34 0x7E + * PgDn: 0x1b 0x5B 0x36 0x7E + */ + KEY_F1, KEY_F2, KEY_F3, KEY_F4, KEY_F5, + KEY_INS, KEY_HOME, KEY_PGUP, KEY_DEL, KEY_END, KEY_PGDN, + + /* + * Five byte keys: + * ################ + * F6: 0x1b 0x5B 0x31 0x37 0x7E + * F7: 0x1b 0x5B 0x31 0x38 0x7E + * F8: 0x1b 0x5B 0x31 0x39 0x7E + * F9: 0x1b 0x5B 0x32 0x30 0x7E + * F10: 0x1b 0x5B 0x32 0x31 0x7E + * F11: 0x1b 0x5B 0x32 0x33 0x7E + * F12: 0x1b 0x5B 0x32 0x34 0x7E + */ + KEY_F6, KEY_F7, KEY_F8, KEY_F9, + KEY_F10, KEY_F11, KEY_F12, +}; + +/** Check if \a c is a separator between words. + * \note Parameter \a c is evaluated multiple times + */ +#define IS_WORD_SEPARATOR(c) ((c) == ' ' || (c) == '\0') + +/// Write the string \a txt to the IO output (without any kind of termination) +INLINE void rl_puts(const struct RLContext* ctx, const char* txt) +{ + if (!ctx->put) + return; + + while (*txt) + ctx->put(*txt++, ctx->put_param); +} + +/// Write character \a ch to the IO output. +INLINE void rl_putc(const struct RLContext* ctx, char ch) +{ + if (ctx->put) + ctx->put(ch, ctx->put_param); +} + +/** Read a character from the IO into \a ch. This function also takes + * care of converting the ANSI escape sequences into one of the codes + * defined in \c RL_KEYS. + */ +static bool rl_getc(const struct RLContext* ctx, int* ch) +{ + int c = ctx->get(ctx->get_param); + + if (c == EOF) + { + if (ctx->clear) + ctx->clear(ctx->clear_param); + + return false; + } + + if (c == 0x1B) + { + // Unknown ESC sequence. Ignore it and read + // return next character. + if (ctx->get(ctx->get_param) != 0x5B) + return rl_getc(ctx, ch); + + /* To be added: + * Home: 0x1b 0x5B 0x31 0x7E + * F6: 0x1b 0x5B 0x31 0x37 0x7E + * F7: 0x1b 0x5B 0x31 0x38 0x7E + * F8: 0x1b 0x5B 0x31 0x39 0x7E + * Ins: 0x1b 0x5B 0x32 0x7E + * F9: 0x1b 0x5B 0x32 0x30 0x7E + * F10: 0x1b 0x5B 0x32 0x31 0x7E + * F11: 0x1b 0x5B 0x32 0x33 0x7E + * F12: 0x1b 0x5B 0x32 0x34 0x7E + * Del: 0x1b 0x5B 0x33 0x7E + * End: 0x1b 0x5B 0x34 0x7E + * PgUp: 0x1b 0x5B 0x35 0x7E + * PgDn: 0x1b 0x5B 0x36 0x7E + */ + + c = ctx->get(ctx->get_param); + switch (c) + { + case 0x41: c = KEY_UP_ARROW; break; + case 0x42: c = KEY_DOWN_ARROW; break; + case 0x43: c = KEY_RIGHT_ARROW; break; + case 0x44: c = KEY_LEFT_ARROW; break; + case 0x50: c = KEY_PAUSE; break; + case 0x5B: + c = ctx->get(ctx->get_param); + switch (c) + { + case 0x41: c = KEY_F1; break; + case 0x42: c = KEY_F2; break; + case 0x43: c = KEY_F3; break; + case 0x44: c = KEY_F4; break; + case 0x45: c = KEY_F5; break; + default: return rl_getc(ctx, ch); + } + break; + default: return rl_getc(ctx, ch); + } + } + + *ch = c; + return true; +} + +INLINE void beep(struct RLContext* ctx) +{ + rl_putc(ctx, '\a'); +} + +static bool pop_history(struct RLContext* ctx, int total_len) +{ + // Compute the length of the first command (including terminator). + int len = strlen(ctx->real_history+1)+1; + + // (the first byte of the history should always be 0) + ASSERT(ctx->real_history[0] == '\0'); + + // If it is the only one in the history, do nothing + if (len == total_len) + return false; + + // Overwrite the first command with the second one + memmove(ctx->real_history, ctx->real_history+len, HISTORY_SIZE-len); + + // Move back the ctx->buffer pointer so that all the indices are still valid + ctx->history -= len; + + return true; +} + +/// Check if index \a i points to the begin of the history. +INLINE bool is_history_begin(struct RLContext* ctx, int i) +{ return ctx->history + i == ctx->real_history; } + +/// Check if index \a i points to the (exclusive) end of history +INLINE bool is_history_end(struct RLContext* ctx, int i) +{ return ctx->history + i == ctx->real_history + HISTORY_SIZE; } + +/// Check if index \a i points to the (exclusive) end of history, or somewhere past the end. +INLINE bool is_history_past_end(struct RLContext* ctx, int i) +{ return ctx->history + i >= ctx->real_history + HISTORY_SIZE; } + +/** Insert \a num_chars characters from \a ch into the history buffer at the + * position indicated by \a curpos. If needed, remove old history to make room. + * Returns true if everything was successful, false if there was no room to + * add the characters. + * \note \a num_chars can be 0, in which case we just make sure the line is + * correctly zero-terminated (ASCIIZ format). + */ +static bool insert_chars(struct RLContext* ctx, size_t *curpos, const char* ch, int num_chars) +{ + ASSERT(!is_history_past_end(ctx, *curpos)); + + while (is_history_past_end(ctx, *curpos+num_chars+1)) + { + if (!pop_history(ctx, *curpos)) + return false; + } + + while (num_chars--) + ctx->history[++(*curpos)] = *ch++; + + ASSERT(!is_history_past_end(ctx, *curpos + 1)); + ctx->history[*curpos+1] = '\0'; + return true; +} + +/// Insert a single character \a ch into the buffer (with the same semantic of \c insert_chars()) +static bool insert_char(struct RLContext* ctx, size_t *curpos, char ch) +{ + return insert_chars(ctx, curpos, &ch, 1); +} + +#if DEBUG_DUMP_HISTORY +/// Dump the internal history of a context (used only for debug purposes) +static void dump_history(struct RLContext* ctx) +{ + int k; + char buf[8]; + ASSERT(ctx->real_history[0] == '\0'); + rl_puts(ctx, "History dump:"); + rl_puts(ctx, "\r\n"); + for (k = 1; + ctx->real_history + k != ctx->history + ctx->history_pos + 1; + k += strlen(&ctx->real_history[k]) + 1) + { + rl_puts(ctx, &ctx->real_history[k]); + rl_puts(ctx, "\r\n"); + } + + sprintf(buf, "%d\r\n", ctx->history_pos + (ctx->history - ctx->real_history)); + rl_puts(ctx, buf); +} +#endif /* DEBUG_DUMP_HISTORY */ + +/// Complete the current word. Return false if no unambiguous completion was found +static bool complete_word(struct RLContext *ctx, size_t *curpos) +{ + const char* completed_word; + size_t wstart; + + // If the current character is a separator, + // there is nothing to complete + wstart = *curpos; + if (IS_WORD_SEPARATOR(ctx->history[wstart])) + { + beep(ctx); + return false; + } + + // Find the separator before the current word + do + --wstart; + while (!IS_WORD_SEPARATOR(ctx->history[wstart])); + + // Complete the word through the hook + completed_word = ctx->match(ctx->match_param, ctx->history + wstart + 1, *curpos - wstart); + if (!completed_word) + return false; + + // Move back the terminal cursor to the separator + while (*curpos != wstart) + { + rl_putc(ctx, '\b'); + --*curpos; + } + + // Insert the completed command + insert_chars(ctx, curpos, completed_word, strlen(completed_word)); + rl_puts(ctx, completed_word); + insert_char(ctx, curpos, ' '); + rl_putc(ctx, ' '); + + return true; +} + +void rl_refresh(struct RLContext* ctx) +{ + rl_puts(ctx, "\r\n"); + if (ctx->prompt) + rl_puts(ctx, ctx->prompt); + rl_puts(ctx, ctx->history + ctx->history_pos + 1); +} + +const char* rl_readline(struct RLContext* ctx) +{ + while (1) + { + char ch; + int c; + + ASSERT(ctx->history - ctx->real_history + ctx->line_pos < HISTORY_SIZE); + + if (!rl_getc(ctx, &c)) + return NULL; + + // Just ignore special keys for now + if (c > SPECIAL_KEYS) + continue; + + if (c == '\t') + { + // Ask the match hook if available + if (!ctx->match) + return NULL; + + complete_word(ctx, &ctx->line_pos); + continue; + } + + // Backspace cancels a character, or it is ignored if at + // the start of the line + if (c == '\b') + { + if (ctx->history[ctx->line_pos] != '\0') + { + --ctx->line_pos; + rl_puts(ctx, "\b \b"); + } + continue; + } + + if (c == '\r' || c == '\n') + { + rl_puts(ctx, "\r\n"); + break; + } + + + // Add a character to the buffer, if possible + ch = (char)c; + ASSERT2(ch == c, "a special key was not properly handled"); + if (insert_chars(ctx, &ctx->line_pos, &ch, 1)) + rl_putc(ctx, ch); + else + beep(ctx); + } + + ctx->history_pos = ctx->line_pos + 1; + while (ctx->history[ctx->line_pos] != '\0') + --ctx->line_pos; + + // Do not store empty lines in the history + if (ctx->line_pos == ctx->history_pos - 1) + ctx->history_pos -= 1; + +#if DEBUG_DUMP_HISTORY + dump_history(ctx); +#endif + + const char *buf = &ctx->history[ctx->line_pos + 1]; + + ctx->line_pos = ctx->history_pos; + + if (ctx->prompt) + rl_puts(ctx, ctx->prompt); + + insert_chars(ctx, &ctx->line_pos, NULL, 0); + + // Since the current pointer now points to the separator, we need + // to return the first character + return buf; +} + + +#if DEBUG_UNIT_TEST + +/** Perform the unit test for the readline library */ +void rl_test(void); + +#if HISTORY_SIZE != 32 + #error This test needs HISTORY_SIZE to be set at 32 +#endif + +static struct RLContext test_ctx; + +static char* test_getc_ptr; +static int test_getc(void* data) +{ + return *test_getc_ptr++; +} + +/** Perform a readline test. The function pipes the characters from \a input_buffer + * through the I/O to \c rl_readline(). After the whole string is sent, \c do_test() + * checks if the current history within the context match \a expected_history. + */ +static bool do_test(char* input_buffer, char* expected_history) +{ + rl_init_ctx(&test_ctx); + rl_sethook_get(&test_ctx, test_getc, NULL); + + test_getc_ptr = input_buffer; + while (*test_getc_ptr) + rl_readline(&test_ctx); + + if (memcmp(test_ctx.real_history, expected_history, HISTORY_SIZE) != 0) + { + ASSERT2(0, "history compare failed"); + return false; + } + + return true; +} + +void rl_test(void) +{ + char* test1_in = "a\nb\nc\nd\ne\nf\ng\nh\ni\nj\nk\nl\nm\nn\no\np\nq\nr\ns\nt\nu\nv\nw\nx\ny\nz\n"; + char test1_hist[HISTORY_SIZE] = "\0l\0m\0n\0o\0p\0q\0r\0s\0t\0u\0v\0w\0x\0y\0z"; + + if (!do_test(test1_in, test1_hist)) + return; + + kprintf("rl_test successful\n"); +} + +#endif /* DEBUG_UNIT_TEST */ + diff --git a/bertos/mware/readline.h b/bertos/mware/readline.h new file mode 100644 index 0000000..8a10475 --- /dev/null +++ b/bertos/mware/readline.h @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \brief Line editing support with history + * + * This file implements a kernel for line editing through a terminal, with history of the typed lines. + * Basic feature of this module: + * + * \li Abstracted from I/O. The user must provide hooks for getc and putc functions. + * \li Basic support for ANSI escape sequences for input of special codes. + * \li Support for command name completion (through a hook). + * + * + * \author Giovanni Bajo + * + * $WIZ$ module_name = "readline" + * $WIZ$ module_depends = "sprintf" + */ + + +#ifndef MWARE_READLINE_H +#define MWARE_READLINE_H + +#include + +#include + +#define HISTORY_SIZE 32 + +typedef int (*getc_hook)(void* user_data); +typedef void (*putc_hook)(char ch, void* user_data); +typedef const char* (*match_hook)(void* user_data, const char* word, int word_len); +typedef void (*clear_hook)(void* user_data); + +struct RLContext +{ + getc_hook get; + void* get_param; + + putc_hook put; + void* put_param; + + match_hook match; + void* match_param; + + clear_hook clear; + void* clear_param; + + const char* prompt; + + char real_history[HISTORY_SIZE]; + char* history; + size_t history_pos; + size_t line_pos; +}; + +INLINE void rl_init_ctx(struct RLContext *ctx) +{ + memset(ctx, 0, sizeof(*ctx)); + ctx->history = ctx->real_history; +} + +INLINE void rl_clear_history(struct RLContext *ctx) +{ + memset(ctx->real_history, 0, sizeof(ctx->real_history)); + ctx->history_pos = 0; + ctx->line_pos = ctx->history_pos; + ctx->history = ctx->real_history; +} + +INLINE void rl_sethook_get(struct RLContext* ctx, getc_hook get, void* get_param) +{ ctx->get = get; ctx->get_param = get_param; } + +INLINE void rl_sethook_put(struct RLContext* ctx, putc_hook put, void* put_param) +{ ctx->put = put; ctx->put_param = put_param; } + +INLINE void rl_sethook_match(struct RLContext* ctx, match_hook match, void* match_param) +{ ctx->match = match; ctx->match_param = match_param; } + +INLINE void rl_sethook_clear(struct RLContext* ctx, clear_hook clear, void* clear_param) +{ ctx->clear = clear; ctx->clear_param = clear_param; } + +INLINE void rl_setprompt(struct RLContext* ctx, const char* prompt) +{ ctx->prompt = prompt; } + +const char* rl_readline(struct RLContext* ctx); + +void rl_refresh(struct RLContext* ctx); + +#endif /* MWARE_READLINE_H */ diff --git a/bertos/mware/resource.c b/bertos/mware/resource.c new file mode 100644 index 0000000..c723bd6 --- /dev/null +++ b/bertos/mware/resource.c @@ -0,0 +1,113 @@ + +#include "resource.h" +#include + +/** + * Internal structure for building a priority queue + * of processes waiting for the resource to become free. + */ +typedef struct ResourceWaiter +{ + PriNode link; + struct Observer *owner; + +} ResourceWaiter; + + +bool ResMan_Alloc(Resource *res, int pri, ResMan_time_t timeout, struct Observer *releaseRequest) +{ + bool success = false; + + ASSERT(releaseRequest); + + sem_obtain(&res->lock); + + if (res->owner == releaseRequest) + { + // Already ours + res->pri = pri; + success = true; + } + else if (!res->owner) + { + // Trivial acquire: nobody was owning the resource + res->pri = pri; + res->owner = releaseRequest; + success = true; + } + else + { + ResourceWaiter waiter; + + // Setup waiter structure and enqueue it to resource + waiter.owner = releaseRequest; + waiter.link.pri = pri; + LIST_ENQUEUE(&res->queue, &waiter.link); + + // Resource busy: are we eligible for preemption? + if ((res->pri < pri) && res->owner->event) + res->owner->event(EVENT_RELEASE, res); + + // Wait in the queue until the timeout occurs. + do + { + sem_release(&res->lock); + // TODO: use a semaphore here instead + ResMan_sleep(); + sem_obtain(&res->lock); + + // Check for ownership + if (res->owner == releaseRequest) + { + success = true; + break; + } + } + while (timeout--); + + // Remove pending waiter + if (!success) + REMOVE(&waiter.link.link); + } + + sem_release(&res->lock); + return success; +} + +void ResMan_Free(Resource *res) +{ + ResourceWaiter *waiter; + + sem_obtain(&res->lock); + + + ASSERT(res->owner); + //TODO: check for real owner calling free + + // Check for new owner candidates. + if ((waiter = (ResourceWaiter *)list_remHead(&res->queue))) + { + // Transfer ownership of the resource + res->owner = waiter->owner; + res->pri = waiter->link.pri; + //ResMan_wakeup(waiter); + } + else + { + // Nobody waiting, free the resource + res->owner = NULL; + res->pri = -1; + } + + sem_release(&res->lock); +} + +void ResMan_Init(Resource *res) +{ + res->owner = NULL; + res->pri = -1; + + sem_init(&res->lock); + LIST_INIT(&res->queue); +} + diff --git a/bertos/mware/resource.h b/bertos/mware/resource.h new file mode 100644 index 0000000..0092e10 --- /dev/null +++ b/bertos/mware/resource.h @@ -0,0 +1,105 @@ +/** + * \file + * + * + * \brief TODO: + * + * + * \author Bernie Innocenti + * \author Stefano Fedrigo + */ + +#ifndef MWARE_RESOURCE_H +#define MWARE_RESOURCE_H + +#include // time_t +#include + +#warning FIXME:Revise me! + +/* + * Abstract locking primitives used by host OS. + */ +typedef Semaphore ResourceLock; +#define ResMan_sleep() timer_delay(1) +#define ResMan_time_t mtime_t + + + +// Forward decl +struct Observer; + +/** + * Hold context information for a resource such as an audio channel. + * + * Each driver registers one or more Resource instances with the + * ResMan using ResMan_Register(). + * + * Clients can then allocate the resource through ResMan_Alloc() + * providing a desired priority and an Observer for asynchronous + * notification. + * + * Allocated resources can be stolen by other clients asking for a + * higher priority. ResMan notifies a preemption request by invoking + * the Observer of the current owner. + * + * The Observer callback must take whatever action is needed to + * release the resource as soon as possible to avoid blocking the + * new owner. + */ +typedef struct Resource +{ +//Private + /// Control access to fields below. + Semaphore lock; + + /// Pointer to current owner's observer. NULL if resource is free. + struct Observer *owner; + + /// Priority of current owner (higher values mean higher priority). + int pri; + + /// Queue of processes waiting to obtain the resource. + List queue; +} Resource; + +/// Event sent by ResMan to owners when to request resource release. +enum { EVENT_RELEASE = 1 }; + +/// Try to allocate a resource \a res with priority \a pri for at most \a timeout ticks. +bool ResMan_Alloc(Resource *res, int pri, ResMan_time_t timeout, struct Observer *releaseRequest); + +/// Free resource \a res. Will eventually wake-up other queued owners. +void ResMan_Free(Resource *res); + +void ResMan_Init(Resource *res); + +#endif /* MWARE_RESOURCE_H */ diff --git a/bertos/mware/rle.h b/bertos/mware/rle.h new file mode 100644 index 0000000..0ca9a28 --- /dev/null +++ b/bertos/mware/rle.h @@ -0,0 +1,2 @@ +#warning This header is OBSOLETE +#include diff --git a/bertos/mware/sprintf.c b/bertos/mware/sprintf.c new file mode 100644 index 0000000..b170ed8 --- /dev/null +++ b/bertos/mware/sprintf.c @@ -0,0 +1,157 @@ +/** + * \file + * + * + * \brief sprintf() implementation based on _formatted_write() + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "sprintf" + * $WIZ$ module_depends = "formatwr" + * $WIZ$ module_harvard = "both" + */ + +#include +#include +#include + +#include + + +static void __str_put_char(char c, void *ptr) +{ + /* + * This Does not work on Code Warrior. Hmm... + * *(*((char **)ptr))++ = c; + */ + + **((char **)ptr) = c; + (*((char **)ptr))++; +} + +static void __null_put_char(UNUSED_ARG(char, c), UNUSED_ARG(void *, ptr)) +{ + /* nop */ +} + + +int PGM_FUNC(vsprintf)(char *str, const char * PGM_ATTR fmt, va_list ap) +{ + int result; + + if (str) + { + result = PGM_FUNC(_formatted_write)(fmt, __str_put_char, &str, ap); + + /* Terminate string */ + *str = '\0'; + } + else + result = PGM_FUNC(_formatted_write)(fmt, __null_put_char, 0, ap); + + + return result; +} + + +int PGM_FUNC(sprintf)(char *str, const char * fmt, ...) +{ + int result; + va_list ap; + + va_start(ap, fmt); + result = PGM_FUNC(vsprintf)(str, fmt, ap); + va_end(ap); + + return result; +} + +/** + * State information for __sn_put_char() + */ +struct __sn_state +{ + char *str; + size_t len; +}; + +/** + * formatted_write() callback used [v]snprintf(). + */ +static void __sn_put_char(char c, void *ptr) +{ + struct __sn_state *state = (struct __sn_state *)ptr; + + if (state->len) + { + --state->len; + *state->str++ = c; + } +} + + +int PGM_FUNC(vsnprintf)(char *str, size_t size, const char * PGM_ATTR fmt, va_list ap) +{ + int result = 0; + + /* Make room for traling '\0'. */ + if (size--) + { + if (str) + { + struct __sn_state state; + state.str = str; + state.len = size; + + result = PGM_FUNC(_formatted_write)(fmt, __sn_put_char, &state, ap); + + /* Terminate string. */ + *state.str = '\0'; + } + else + result = PGM_FUNC(_formatted_write)(fmt, __null_put_char, 0, ap); + } + + return result; +} + + +int PGM_FUNC(snprintf)(char *str, size_t size, const char * fmt, ...) +{ + int result; + va_list ap; + + va_start(ap, fmt); + result = PGM_FUNC(vsnprintf)(str, size, fmt, ap); + va_end(ap); + + return result; +} diff --git a/bertos/mware/sprintf_test.c b/bertos/mware/sprintf_test.c new file mode 100644 index 0000000..caf952a --- /dev/null +++ b/bertos/mware/sprintf_test.c @@ -0,0 +1,114 @@ +/** + * \file + * + * + * notest: avr + * notest: arm + * \brief sprintf() implementation based on _formatted_write() + * + * \author Bernie Innocenti + */ + +#include "formatwr.h" +#include +#include +#include + +#include + +#include + +#include /* strcmp() */ + + +int sprintf_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int sprintf_testRun(void) +{ + char buf[256]; + static const char test_string[] = "Hello, world!\n"; + static const pgm_char test_string_pgm[] = "Hello, world!\n"; + + snprintf(buf, sizeof buf, "%s", test_string); + if (strcmp(buf, test_string) != 0) + return 1; + + snprintf(buf, sizeof buf, "%S", (const wchar_t *)test_string_pgm); + if (strcmp(buf, test_string_pgm) != 0) + return 2; + + #define TEST(FMT, VALUE, EXPECT) do { \ + snprintf(buf, sizeof buf, FMT, VALUE); \ + if (strcmp(buf, EXPECT) != 0) \ + return -1; \ + } while (0) + + TEST("%d", 12345, "12345"); + TEST("%ld", 123456789L, "123456789"); + TEST("%ld", -12345678L, "-12345678"); + TEST("%lu", 4294967295UL, "4294967295"); + TEST("%hd", -12345, "-12345"); + TEST("%hu", 65535U, "65535"); + + TEST("%8d", 123, " 123"); + TEST("%8d", -123, " -123"); + TEST("%-8d", -123, "-123 "); + TEST("%08d", -123, "-0000123"); + + TEST("%8.2f", -123.456, " -123.46"); + TEST("%-8.2f", -123.456, "-123.46 "); + TEST("%8.0f", -123.456, " -123"); + + + /* + * Stress tests. + */ + snprintf(buf, sizeof buf, "%s", (char *)(NULL)); + if (strcmp(buf, "") != 0) + return 3; + snprintf(buf, sizeof buf, "%k"); + if (strcmp(buf, "???") != 0) + return 4; + sprintf(NULL, test_string); /* must not crash */ + + return 0; +} + +int sprintf_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(sprintf); diff --git a/bertos/mware/strtol10.c b/bertos/mware/strtol10.c new file mode 100644 index 0000000..d0f2a1e --- /dev/null +++ b/bertos/mware/strtol10.c @@ -0,0 +1,99 @@ +/** + * \file + * + * + * \brief Poor man's hex arrays (implementation). + * + * \author Bernie Innocenti + */ + +#include "strtol10.h" + +/** + * Convert a formatted base-10 ASCII number to unsigned long binary representation. + * + * Unlike the standard strtoul(), this function has an interface + * that makes it better suited for protocol parsers. It's also + * much simpler and smaller than a full featured strtoul(). + * + * \param first Pointer to first byte of input range (STL-style). + * \param last Pointer to end of input range (STL-style). + * Pass NULL to parse up to the first \\0. + * \param val Pointer to converted value. + * + * \return true for success, false for failure. + * + * \see strtol10() + */ +bool strtoul10(const char *first, const char *last, unsigned long *val) +{ + // Check for no input + if (*first == '\0') + return false; + + *val = 0; + for(/*nop*/; first != last && *first != '\0'; ++first) + { + if ((*first < '0') || (*first > '9')) + return false; + + *val = (*val * 10L) + (*first - '0'); + } + + return true; +} + + +/** + * Convert a formatted base-10 ASCII number to signed long binary representation. + * + * \see strtoul10() + */ +bool strtol10(const char *first, const char *last, long *val) +{ + bool negative = false; + + if (*first == '+') + ++first; /* skip unary plus sign */ + else if (*first == '-') + { + negative = true; + ++first; + } + + bool result = strtoul10(first, last, (unsigned long *)val); + + if (negative) + *val = - *val; + + return result; +} + diff --git a/bertos/mware/strtol10.h b/bertos/mware/strtol10.h new file mode 100644 index 0000000..03303cf --- /dev/null +++ b/bertos/mware/strtol10.h @@ -0,0 +1,65 @@ +/** + * \file + * + * + * \brief Poor man's hex arrays (implementation). + * + * \author Bernie Innocenti + */ + + +#ifndef MWARE_STRTOL10_H +#define MWARE_STRTOL10_H + +#include /* bool */ + +bool strtoul10(const char *first, const char *last, unsigned long *val); +bool strtol10(const char *first, const char *last, long *val); + +/** + * Replacement for standard library function atol(). + */ +INLINE long atol(const char *str) +{ + long val; + strtol10(str, NULL, &val); + return val; +} + +/** + * Replacement for standard library function atoi(). + */ +INLINE int atoi(const char *str) +{ + return (int)atol(str); +} + +#endif /* MWARE_STRTOL10_H */ diff --git a/bertos/net/afsk.c b/bertos/net/afsk.c new file mode 100644 index 0000000..d58758c --- /dev/null +++ b/bertos/net/afsk.c @@ -0,0 +1,567 @@ +/** + * \file + * + * + * \brief AFSK1200 modem. + * + * \author Francesco Sacchi + */ + +#include "afsk.h" +#include + +#include "cfg/cfg_afsk.h" +#include "hw/hw_afsk.h" + +#include + +#include + +#define LOG_LEVEL AFSK_LOG_LEVEL +#define LOG_FORMAT AFSK_LOG_FORMAT +#include + +#include +#include +#include + +#include /* memset */ + +#define PHASE_BIT 8 +#define PHASE_INC 1 + +#define PHASE_MAX (SAMPLEPERBIT * PHASE_BIT) +#define PHASE_THRES (PHASE_MAX / 2) // - PHASE_BIT / 2) + +// Modulator constants +#define MARK_FREQ 1200 +#define MARK_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)MARK_FREQ, CONFIG_AFSK_DAC_SAMPLERATE)) + +#define SPACE_FREQ 2200 +#define SPACE_INC (uint16_t)(DIV_ROUND(SIN_LEN * (uint32_t)SPACE_FREQ, CONFIG_AFSK_DAC_SAMPLERATE)) + +//Ensure sample rate is a multiple of bit rate +STATIC_ASSERT(!(CONFIG_AFSK_DAC_SAMPLERATE % BITRATE)); + +#define DAC_SAMPLEPERBIT (CONFIG_AFSK_DAC_SAMPLERATE / BITRATE) + +/** + * Sine table for the first quarter of wave. + * The rest of the wave is computed from this first quarter. + * This table is used to generate the modulated data. + */ +static const uint8_t PROGMEM sin_table[] = +{ + 128, 129, 131, 132, 134, 135, 137, 138, 140, 142, 143, 145, 146, 148, 149, 151, + 152, 154, 155, 157, 158, 160, 162, 163, 165, 166, 167, 169, 170, 172, 173, 175, + 176, 178, 179, 181, 182, 183, 185, 186, 188, 189, 190, 192, 193, 194, 196, 197, + 198, 200, 201, 202, 203, 205, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217, + 218, 219, 220, 221, 222, 223, 224, 225, 226, 227, 228, 229, 230, 231, 232, 233, + 234, 234, 235, 236, 237, 238, 238, 239, 240, 241, 241, 242, 243, 243, 244, 245, + 245, 246, 246, 247, 248, 248, 249, 249, 250, 250, 250, 251, 251, 252, 252, 252, + 253, 253, 253, 253, 254, 254, 254, 254, 254, 255, 255, 255, 255, 255, 255, 255, +}; + +#define SIN_LEN 512 ///< Full wave length + +STATIC_ASSERT(sizeof(sin_table) == SIN_LEN / 4); + + +/** + * Given the index, this function computes the correct sine sample + * based only on the first quarter of wave. + */ +INLINE uint8_t sin_sample(uint16_t idx) +{ + ASSERT(idx < SIN_LEN); + uint16_t new_idx = idx % (SIN_LEN / 2); + new_idx = (new_idx >= (SIN_LEN / 4)) ? (SIN_LEN / 2 - new_idx - 1) : new_idx; + + uint8_t data = pgm_read8(&sin_table[new_idx]); + + return (idx >= (SIN_LEN / 2)) ? (255 - data) : data; +} + + +#define BIT_DIFFER(bitline1, bitline2) (((bitline1) ^ (bitline2)) & 0x01) +#define EDGE_FOUND(bitline) BIT_DIFFER((bitline), (bitline) >> 1) + +/** + * High-Level Data Link Control parsing function. + * Parse bitstream in order to find characters. + * + * \param hdlc HDLC context. + * \param bit current bit to be parsed. + * \param fifo FIFO buffer used to push characters. + * + * \return true if all is ok, false if the fifo is full. + */ +static bool hdlc_parse(Hdlc *hdlc, bool bit, FIFOBuffer *fifo) +{ + bool ret = true; + + hdlc->demod_bits <<= 1; + hdlc->demod_bits |= bit ? 1 : 0; + + /* HDLC Flag */ + if (hdlc->demod_bits == HDLC_FLAG) + { + if (!fifo_isfull(fifo)) + { + fifo_push(fifo, HDLC_FLAG); + hdlc->rxstart = true; + } + else + { + ret = false; + hdlc->rxstart = false; + } + + hdlc->currchar = 0; + hdlc->bit_idx = 0; + return ret; + } + + /* Reset */ + if ((hdlc->demod_bits & HDLC_RESET) == HDLC_RESET) + { + hdlc->rxstart = false; + return ret; + } + + if (!hdlc->rxstart) + return ret; + + /* Stuffed bit */ + if ((hdlc->demod_bits & 0x3f) == 0x3e) + return ret; + + if (hdlc->demod_bits & 0x01) + hdlc->currchar |= 0x80; + + if (++hdlc->bit_idx >= 8) + { + if ((hdlc->currchar == HDLC_FLAG + || hdlc->currchar == HDLC_RESET + || hdlc->currchar == AX25_ESC)) + { + if (!fifo_isfull(fifo)) + fifo_push(fifo, AX25_ESC); + else + { + hdlc->rxstart = false; + ret = false; + } + } + + if (!fifo_isfull(fifo)) + fifo_push(fifo, hdlc->currchar); + else + { + hdlc->rxstart = false; + ret = false; + } + + hdlc->currchar = 0; + hdlc->bit_idx = 0; + } + else + hdlc->currchar >>= 1; + + return ret; +} + + +/** + * ADC ISR callback. + * This function has to be called by the ADC ISR when a sample of the configured + * channel is available. + * \param af Afsk context to operate on. + * \param curr_sample current sample from the ADC. + */ +void afsk_adc_isr(Afsk *af, int8_t curr_sample) +{ + AFSK_STROBE_ON(); + + /* + * Frequency discriminator and LP IIR filter. + * This filter is designed to work + * at the given sample rate and bit rate. + */ + STATIC_ASSERT(SAMPLERATE == 9600); + STATIC_ASSERT(BITRATE == 1200); + + /* + * Frequency discrimination is achieved by simply multiplying + * the sample with a delayed sample of (samples per bit) / 2. + * Then the signal is lowpass filtered with a first order, + * 600 Hz filter. The filter implementation is selectable + * through the CONFIG_AFSK_FILTER config variable. + */ + + af->iir_x[0] = af->iir_x[1]; + + #if (CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH) + af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2; + //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 6.027339492; + #elif (CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV) + af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) >> 2; + //af->iir_x[1] = ((int8_t)fifo_pop(&af->delay_fifo) * curr_sample) / 3.558147322; + #else + #error Filter type not found! + #endif + + af->iir_y[0] = af->iir_y[1]; + + #if CONFIG_AFSK_FILTER == AFSK_BUTTERWORTH + /* + * This strange sum + shift is an optimization for af->iir_y[0] * 0.668. + * iir * 0.668 ~= (iir * 21) / 32 = + * = (iir * 16) / 32 + (iir * 4) / 32 + iir / 32 = + * = iir / 2 + iir / 8 + iir / 32 = + * = iir >> 1 + iir >> 3 + iir >> 5 + */ + af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1) + (af->iir_y[0] >> 3) + (af->iir_y[0] >> 5); + //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.6681786379; + #elif CONFIG_AFSK_FILTER == AFSK_CHEBYSHEV + /* + * This should be (af->iir_y[0] * 0.438) but + * (af->iir_y[0] >> 1) is a faster approximation :-) + */ + af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + (af->iir_y[0] >> 1); + //af->iir_y[1] = af->iir_x[0] + af->iir_x[1] + af->iir_y[0] * 0.4379097269; + #endif + + /* Save this sampled bit in a delay line */ + af->sampled_bits <<= 1; + af->sampled_bits |= (af->iir_y[1] > 0) ? 1 : 0; + + /* Store current ADC sample in the af->delay_fifo */ + fifo_push(&af->delay_fifo, curr_sample); + + /* If there is an edge, adjust phase sampling */ + if (EDGE_FOUND(af->sampled_bits)) + { + if (af->curr_phase < PHASE_THRES) + af->curr_phase += PHASE_INC; + else + af->curr_phase -= PHASE_INC; + } + af->curr_phase += PHASE_BIT; + + /* sample the bit */ + if (af->curr_phase >= PHASE_MAX) + { + af->curr_phase %= PHASE_MAX; + + /* Shift 1 position in the shift register of the found bits */ + af->found_bits <<= 1; + + /* + * Determine bit value by reading the last 3 sampled bits. + * If the number of ones is two or greater, the bit value is a 1, + * otherwise is a 0. + * This algorithm presumes that there are 8 samples per bit. + */ + STATIC_ASSERT(SAMPLEPERBIT == 8); + uint8_t bits = af->sampled_bits & 0x07; + if (bits == 0x07 // 111, 3 bits set to 1 + || bits == 0x06 // 110, 2 bits + || bits == 0x05 // 101, 2 bits + || bits == 0x03 // 011, 2 bits + ) + af->found_bits |= 1; + + /* + * NRZI coding: if 2 consecutive bits have the same value + * a 1 is received, otherwise it's a 0. + */ + if (!hdlc_parse(&af->hdlc, !EDGE_FOUND(af->found_bits), &af->rx_fifo)) + af->status |= AFSK_RXFIFO_OVERRUN; + } + + + AFSK_STROBE_OFF(); +} + +static void afsk_txStart(Afsk *af) +{ + if (!af->sending) + { + af->phase_inc = MARK_INC; + af->phase_acc = 0; + af->stuff_cnt = 0; + af->sending = true; + af->preamble_len = DIV_ROUND(CONFIG_AFSK_PREAMBLE_LEN * BITRATE, 8000); + AFSK_DAC_IRQ_START(af->dac_ch); + } + ATOMIC(af->trailer_len = DIV_ROUND(CONFIG_AFSK_TRAILER_LEN * BITRATE, 8000)); +} + +#define BIT_STUFF_LEN 5 + +#define SWITCH_TONE(inc) (((inc) == MARK_INC) ? SPACE_INC : MARK_INC) + +/** + * DAC ISR callback. + * This function has to be called by the DAC ISR when a sample of the configured + * channel has been converted out. + * + * \param af Afsk context to operate on. + * + * \return The next DAC output sample. + */ +uint8_t afsk_dac_isr(Afsk *af) +{ + AFSK_STROBE_ON(); + + /* Check if we are at a start of a sample cycle */ + if (af->sample_count == 0) + { + if (af->tx_bit == 0) + { + /* We have just finished transimitting a char, get a new one. */ + if (fifo_isempty(&af->tx_fifo) && af->trailer_len == 0) + { + AFSK_DAC_IRQ_STOP(af->dac_ch); + af->sending = false; + AFSK_STROBE_OFF(); + return 0; + } + else + { + /* + * If we have just finished sending an unstuffed byte, + * reset bitstuff counter. + */ + if (!af->bit_stuff) + af->stuff_cnt = 0; + + af->bit_stuff = true; + + /* + * Handle preamble and trailer + */ + if (af->preamble_len == 0) + { + if (fifo_isempty(&af->tx_fifo)) + { + af->trailer_len--; + af->curr_out = HDLC_FLAG; + } + else + af->curr_out = fifo_pop(&af->tx_fifo); + } + else + { + af->preamble_len--; + af->curr_out = HDLC_FLAG; + } + + /* Handle char escape */ + if (af->curr_out == AX25_ESC) + { + if (fifo_isempty(&af->tx_fifo)) + { + AFSK_DAC_IRQ_STOP(af->dac_ch); + af->sending = false; + AFSK_STROBE_OFF(); + return 0; + } + else + af->curr_out = fifo_pop(&af->tx_fifo); + } + else if (af->curr_out == HDLC_FLAG || af->curr_out == HDLC_RESET) + /* If these chars are not escaped disable bit stuffing */ + af->bit_stuff = false; + } + /* Start with LSB mask */ + af->tx_bit = 0x01; + } + + /* check for bit stuffing */ + if (af->bit_stuff && af->stuff_cnt >= BIT_STUFF_LEN) + { + /* If there are more than 5 ones in a row insert a 0 */ + af->stuff_cnt = 0; + /* switch tone */ + af->phase_inc = SWITCH_TONE(af->phase_inc); + } + else + { + /* + * NRZI: if we want to transmit a 1 the modulated frequency will stay + * unchanged; with a 0, there will be a change in the tone. + */ + if (af->curr_out & af->tx_bit) + { + /* + * Transmit a 1: + * - Stay on the previous tone + * - Increase bit stuff counter + */ + af->stuff_cnt++; + } + else + { + /* + * Transmit a 0: + * - Reset bit stuff counter + * - Switch tone + */ + af->stuff_cnt = 0; + af->phase_inc = SWITCH_TONE(af->phase_inc); + } + + /* Go to the next bit */ + af->tx_bit <<= 1; + } + af->sample_count = DAC_SAMPLEPERBIT; + } + + /* Get new sample and put it out on the DAC */ + af->phase_acc += af->phase_inc; + af->phase_acc %= SIN_LEN; + + af->sample_count--; + AFSK_STROBE_OFF(); + return sin_sample(af->phase_acc); +} + + +static size_t afsk_read(KFile *fd, void *_buf, size_t size) +{ + Afsk *af = AFSK_CAST(fd); + uint8_t *buf = (uint8_t *)_buf; + + #if CONFIG_AFSK_RXTIMEOUT == 0 + while (size-- && !fifo_isempty_locked(&af->rx_fifo)) + #else + while (size--) + #endif + { + #if CONFIG_AFSK_RXTIMEOUT != -1 + ticks_t start = timer_clock(); + #endif + + while (fifo_isempty_locked(&af->rx_fifo)) + { + cpu_relax(); + #if CONFIG_AFSK_RXTIMEOUT != -1 + if (timer_clock() - start > ms_to_ticks(CONFIG_AFSK_RXTIMEOUT)) + return buf - (uint8_t *)_buf; + #endif + } + + *buf++ = fifo_pop_locked(&af->rx_fifo); + } + + return buf - (uint8_t *)_buf; +} + +static size_t afsk_write(KFile *fd, const void *_buf, size_t size) +{ + Afsk *af = AFSK_CAST(fd); + const uint8_t *buf = (const uint8_t *)_buf; + + while (size--) + { + while (fifo_isfull_locked(&af->tx_fifo)) + cpu_relax(); + + fifo_push_locked(&af->tx_fifo, *buf++); + afsk_txStart(af); + } + + return buf - (const uint8_t *)_buf; +} + +static int afsk_flush(KFile *fd) +{ + Afsk *af = AFSK_CAST(fd); + while (af->sending) + cpu_relax(); + return 0; +} + +static int afsk_error(KFile *fd) +{ + Afsk *af = AFSK_CAST(fd); + int err; + + ATOMIC(err = af->status); + return err; +} + +static void afsk_clearerr(KFile *fd) +{ + Afsk *af = AFSK_CAST(fd); + ATOMIC(af->status = 0); +} + + +/** + * Initialize an AFSK1200 modem. + * \param af Afsk context to operate on. + * \param adc_ch ADC channel used by the demodulator. + * \param dac_ch DAC channel used by the modulator. + */ +void afsk_init(Afsk *af, int adc_ch, int dac_ch) +{ + #if CONFIG_AFSK_RXTIMEOUT != -1 + MOD_CHECK(timer); + #endif + memset(af, 0, sizeof(*af)); + af->adc_ch = adc_ch; + af->dac_ch = dac_ch; + + fifo_init(&af->delay_fifo, (uint8_t *)af->delay_buf, sizeof(af->delay_buf)); + fifo_init(&af->rx_fifo, af->rx_buf, sizeof(af->rx_buf)); + + /* Fill sample FIFO with 0 */ + for (int i = 0; i < SAMPLEPERBIT / 2; i++) + fifo_push(&af->delay_fifo, 0); + + fifo_init(&af->tx_fifo, af->tx_buf, sizeof(af->tx_buf)); + + AFSK_ADC_INIT(adc_ch, af); + AFSK_DAC_INIT(dac_ch, af); + AFSK_STROBE_INIT(); + LOG_INFO("MARK_INC %d, SPACE_INC %d\n", MARK_INC, SPACE_INC); + + DB(af->fd._type = KFT_AFSK); + af->fd.write = afsk_write; + af->fd.read = afsk_read; + af->fd.flush = afsk_flush; + af->fd.error = afsk_error; + af->fd.clearerr = afsk_clearerr; + af->phase_inc = MARK_INC; +} diff --git a/bertos/net/afsk.h b/bertos/net/afsk.h new file mode 100644 index 0000000..b23ba63 --- /dev/null +++ b/bertos/net/afsk.h @@ -0,0 +1,226 @@ +/** + * \file + * + * + * \brief AFSK1200 modem. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "afsk" + * $WIZ$ module_configuration = "bertos/cfg/cfg_afsk.h" + * $WIZ$ module_depends = "timer", "kfile" + * $WIZ$ module_hw = "bertos/hw/hw_afsk.h" + */ + +#ifndef NET_AFSK_H +#define NET_AFSK_H + +#include "cfg/cfg_afsk.h" +#include "hw/hw_afsk.h" + +#include + +#include + +#include + + + +/** + * ADC sample rate. + * The demodulator filters are designed to work at this frequency. + * If you need to change this remember to update afsk_adc_isr(). + */ +#define SAMPLERATE 9600 + +/** + * Bitrate of the received/transmitted data. + * The demodulator filters and decoderes are designed to work at this frequency. + * If you need to change this remember to update afsk_adc_isr(). + */ +#define BITRATE 1200 + +#define SAMPLEPERBIT (SAMPLERATE / BITRATE) + +/** + * HDLC (High-Level Data Link Control) context. + * Maybe to be moved in a separate HDLC module one day. + */ +typedef struct Hdlc +{ + uint8_t demod_bits; ///< Bitstream from the demodulator. + uint8_t bit_idx; ///< Current received bit. + uint8_t currchar; ///< Current received character. + bool rxstart; ///< True if an HDLC_FLAG char has been found in the bitstream. +} Hdlc; + +/** + * RX FIFO buffer full error. + */ +#define AFSK_RXFIFO_OVERRUN BV(0) + +/** + * AFSK1200 modem context. + */ +typedef struct Afsk +{ + /** Base "class" */ + KFile fd; + + /** ADC channel to be used by the demodulator */ + int adc_ch; + + /** DAC channel to be used by the modulator */ + int dac_ch; + + /** Current sample of bit for output data. */ + uint8_t sample_count; + + /** Current character to be modulated */ + uint8_t curr_out; + + /** Mask of current modulated bit */ + uint8_t tx_bit; + + /** True if bit stuff is allowed, false otherwise */ + bool bit_stuff; + + /** Counter for bit stuffing */ + uint8_t stuff_cnt; + /** + * DDS phase accumulator for generating modulated data. + */ + uint16_t phase_acc; + + /** Current phase increment for current modulated bit */ + uint16_t phase_inc; + + /** Delay line used to delay samples by (SAMPLEPERBIT / 2) */ + FIFOBuffer delay_fifo; + + /** + * Buffer for delay FIFO. + * The 1 is added because the FIFO macros need + * 1 byte more to handle a buffer (SAMPLEPERBIT / 2) bytes long. + */ + int8_t delay_buf[SAMPLEPERBIT / 2 + 1]; + + /** FIFO for received data */ + FIFOBuffer rx_fifo; + + /** FIFO rx buffer */ + uint8_t rx_buf[CONFIG_AFSK_RX_BUFLEN]; + + /** FIFO for transmitted data */ + FIFOBuffer tx_fifo; + + /** FIFO tx buffer */ + uint8_t tx_buf[CONFIG_AFSK_TX_BUFLEN]; + + /** IIR filter X cells, used to filter sampled data by the demodulator */ + int16_t iir_x[2]; + + /** IIR filter Y cells, used to filter sampled data by the demodulator */ + int16_t iir_y[2]; + + /** + * Bits sampled by the demodulator are here. + * Since ADC samplerate is higher than the bitrate, the bits here are + * SAMPLEPERBIT times the bitrate. + */ + uint8_t sampled_bits; + + /** + * Current phase, needed to know when the bitstream at ADC speed + * should be sampled. + */ + int8_t curr_phase; + + /** Bits found by the demodulator at the correct bitrate speed. */ + uint8_t found_bits; + + /** True while modem sends data */ + volatile bool sending; + + /** + * AFSK modem status. + * If 0 all is ok, otherwise errors are present. + */ + volatile int status; + + /** Hdlc context */ + Hdlc hdlc; + + /** + * Preamble length. + * When the AFSK modem wants to send data, before sending the actual data, + * shifts out preamble_len HDLC_FLAG characters. + * This helps to synchronize the demodulator filters on the receiver side. + */ + uint16_t preamble_len; + + /** + * Trailer length. + * After sending the actual data, the AFSK shifts out + * trailer_len HDLC_FLAG characters. + * This helps to synchronize the demodulator filters on the receiver side. + */ + uint16_t trailer_len; +} Afsk; + +#define KFT_AFSK MAKE_ID('A', 'F', 'S', 'K') + +INLINE Afsk *AFSK_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_AFSK); + return (Afsk *)fd; +} + + +void afsk_adc_isr(Afsk *af, int8_t sample); +uint8_t afsk_dac_isr(Afsk *af); +void afsk_init(Afsk *af, int adc_ch, int dac_ch); + + +/** + * \name Afsk filter types. + * $WIZ$ afsk_filter_list = "AFSK_BUTTERWORTH", "AFSK_CHEBYSHEV" + * \{ + */ +#define AFSK_BUTTERWORTH 0 +#define AFSK_CHEBYSHEV 1 +/* \} */ + +int afsk_testSetup(void); +int afsk_testRun(void); +int afsk_testTearDown(void); + +#endif /* NET_AFSK_H */ diff --git a/bertos/net/afsk_test.c b/bertos/net/afsk_test.c new file mode 100644 index 0000000..cb7d2cd --- /dev/null +++ b/bertos/net/afsk_test.c @@ -0,0 +1,222 @@ +/** + * \file + * + * + * \brief AFSK demodulator test. + * + * \author Francesco Sacchi + * $test$: cp bertos/cfg/cfg_ax25.h $cfgdir/ + * $test$: echo "#undef AX25_LOG_LEVEL" >> $cfgdir/cfg_ax25.h + * $test$: echo "#define AX25_LOG_LEVEL LOG_LVL_INFO" >> $cfgdir/cfg_ax25.h + * $test$: cp bertos/cfg/cfg_afsk.h $cfgdir/ + * $test$: echo "#undef CONFIG_AFSK_TX_BUFLEN" >> $cfgdir/cfg_afsk.h + * $test$: echo "#define CONFIG_AFSK_TX_BUFLEN 512" >> $cfgdir/cfg_afsk.h + */ + + +#include "afsk.h" +#include "cfg/cfg_afsk.h" + +#include +#include + +#include +#include +#include + +#include + +#include +#include + +FILE *fp_adc; +FILE *fp_dac; +uint32_t data_size; +uint32_t data_written; +Afsk afsk_fd; +AX25Ctx ax25; +KFileDebug dbg; + +int msg_cnt; +static void message_hook(struct AX25Msg *msg) +{ + msg_cnt++; + ax25_print(&dbg.fd, msg); +} + +static FILE *afsk_fileOpen(const char *name) +{ + FILE *fp = 0; + #if CPU_AVR + (void)name; + #warning TODO: open the file? + #else + fp = fopen(name, "rb"); + #endif + ASSERT(fp); + + char snd[5]; + ASSERT(fread(snd, 1, 4, fp) == 4); + snd[4] = 0; + ASSERT(strcmp(snd, ".snd") == 0); + + uint32_t offset; + ASSERT(fread(&offset, 1, sizeof(offset), fp) == sizeof(offset)); + offset = be32_to_cpu(offset); + kprintf("AU file offset: %ld\n", (long)offset); + ASSERT(offset >= 24); + + ASSERT(fread(&data_size, 1, sizeof(data_size), fp) == sizeof(data_size)); + data_size = be32_to_cpu(data_size); + kprintf("AU file data_size: %ld\n", (long)data_size); + ASSERT(data_size); + + uint32_t encoding; + ASSERT(fread(&encoding, 1, sizeof(encoding), fp) == sizeof(encoding)); + encoding = be32_to_cpu(encoding); + kprintf("AU file encoding: %ld\n", (long)encoding); + ASSERT(encoding == 2); // 8 bit linear PCM + + uint32_t sample_rate; + ASSERT(fread(&sample_rate, 1, sizeof(sample_rate), fp) == sizeof(sample_rate)); + sample_rate = be32_to_cpu(sample_rate); + kprintf("AU file sample_rate: %ld\n", (long)sample_rate); + ASSERT(sample_rate == 9600); + + uint32_t channels; + ASSERT(fread(&channels, 1, sizeof(channels), fp) == sizeof(channels)); + channels = be32_to_cpu(channels); + kprintf("AU file channels: %ld\n", (long)channels); + ASSERT(channels == 1); + + #if CPU_AVR + #warning TODO: fseek? + #else + ASSERT(fseek(fp, offset, SEEK_SET) == 0); + #endif + return fp; +} + +int afsk_testSetup(void) +{ + kdbg_init(); + kfiledebug_init(&dbg); + fp_adc = afsk_fileOpen("test/afsk_test.au"); + #if CPU_AVR + #warning TODO: open the file? + #else + fp_dac = fopen("test/afsk_test_out.au", "w+b"); + #endif + ASSERT(fp_dac); + #define FS_HH (((uint32_t)CONFIG_AFSK_DAC_SAMPLERATE) >> 24) + #define FS_HL ((((uint32_t)CONFIG_AFSK_DAC_SAMPLERATE) >> 16) & 0xff) + #define FS_LH ((((uint32_t)CONFIG_AFSK_DAC_SAMPLERATE) >> 8) & 0xff) + #define FS_LL (((uint32_t)CONFIG_AFSK_DAC_SAMPLERATE) & 0xff) + + uint8_t snd_header[] = { '.','s','n','d', 0,0,0,24, 0,0,0,0, 0,0,0,2, FS_HH,FS_HL,FS_LH,FS_LL, 0,0,0,1}; + + ASSERT(fwrite(snd_header, 1, sizeof(snd_header), fp_dac) == sizeof(snd_header)); + + timer_init(); + afsk_init(&afsk_fd, 0 ,0); + ax25_init(&ax25, &afsk_fd.fd, message_hook); + return 0; +} + + +static void messageout_hook(struct AX25Msg *msg) +{ + ASSERT(strncmp(msg->dst.call, "ABCDEF", 6) == 0); + ASSERT(strncmp(msg->src.call, "123456", 6) == 0); + ASSERT(msg->src.ssid == 1); + ASSERT(msg->dst.ssid == 0); + ASSERT(msg->ctrl == AX25_CTRL_UI); + ASSERT(msg->pid == AX25_PID_NOLAYER3); + ASSERT(msg->len == 256); + for (int i = 0; i < 256; i++) + ASSERT(msg->info[i] == i); +} + +int afsk_testRun(void) +{ + int c; + while ((c = fgetc(fp_adc)) != EOF) + { + afsk_adc_isr(&afsk_fd, (int8_t)c); + + ax25_poll(&ax25); + } + kprintf("Messages correctly received: %d\n", msg_cnt); + ASSERT(msg_cnt >= 15); + + char buf[256]; + for (unsigned i = 0; i < sizeof(buf); i++) + buf[i] = i; + + ax25_send(&ax25, AX25_CALL("abcdef", 0), AX25_CALL("123456", 1), buf, sizeof(buf)); + + do + { + int8_t val = afsk_dac_isr(&afsk_fd) - 128; + ASSERT(fwrite(&val, 1, sizeof(val), fp_dac) == sizeof(val)); + data_written++; + } + while (afsk_fd.sending); + + #define SND_DATASIZE_OFF 8 + #if CPU_AVR + #warning TODO: fseek? + #else + ASSERT(fseek(fp_dac, SND_DATASIZE_OFF, SEEK_SET) == 0); + #endif + data_written = cpu_to_be32(data_written); + ASSERT(fwrite(&data_written, 1, sizeof(data_written), fp_dac) == sizeof(data_written)); + ASSERT(fclose(fp_adc) + fclose(fp_dac) == 0); + + fp_adc = afsk_fileOpen("test/afsk_test_out.au"); + ax25_init(&ax25, &afsk_fd.fd, messageout_hook); + + while ((c = fgetc(fp_adc)) != EOF) + { + afsk_adc_isr(&afsk_fd, (int8_t)c); + + ax25_poll(&ax25); + } + + return 0; +} + +int afsk_testTearDown(void) +{ + return fclose(fp_adc); +} + +TEST_MAIN(afsk); diff --git a/bertos/net/ax25.c b/bertos/net/ax25.c new file mode 100644 index 0000000..3bd3e75 --- /dev/null +++ b/bertos/net/ax25.c @@ -0,0 +1,329 @@ +/** + * \file + * + * \brief Simple AX25 data link layer implementation. + * + * For now, only UI frames without any Layer 3 protocol are handled. + * This however is enough to send/receive APRS packets. + * + * \author Francesco Sacchi + * + */ + +#include "ax25.h" +#include "cfg/cfg_ax25.h" + +#include + +#define LOG_LEVEL AX25_LOG_LEVEL +#define LOG_FORMAT AX25_LOG_FORMAT +#include + +#include //memset, memcmp +#include //isalnum, toupper + +#if CONFIG_AX25_RPT_LST + #define AX25_SET_REPEATED(msg, idx, val) \ + do \ + { \ + if (val) \ + (msg)->rpt_flags |= BV(idx) ; \ + else \ + (msg)->rpt_flags &= ~BV(idx) ; \ + } while(0) +#endif + +#define DECODE_CALL(buf, addr) \ + for (unsigned i = 0; i < sizeof((addr)); i++) \ + { \ + char c = (*(buf)++ >> 1); \ + (addr)[i] = (c == ' ') ? '\x0' : c; \ + } + +static void ax25_decode(AX25Ctx *ctx) +{ + AX25Msg msg; + uint8_t *buf = ctx->buf; + + DECODE_CALL(buf, msg.dst.call); + msg.dst.ssid = (*buf++ >> 1) & 0x0F; + + DECODE_CALL(buf, msg.src.call); + msg.src.ssid = (*buf >> 1) & 0x0F; + + LOG_INFO("SRC[%.6s-%d], DST[%.6s-%d]\n", msg.src.call, msg.src.ssid, msg.dst.call, msg.dst.ssid); + + /* Repeater addresses */ + #if CONFIG_AX25_RPT_LST + for (msg.rpt_cnt = 0; !(*buf++ & 0x01) && (msg.rpt_cnt < countof(msg.rpt_lst)); msg.rpt_cnt++) + { + DECODE_CALL(buf, msg.rpt_lst[msg.rpt_cnt].call); + msg.rpt_lst[msg.rpt_cnt].ssid = (*buf >> 1) & 0x0F; + AX25_SET_REPEATED(&msg, msg.rpt_cnt, (*buf & 0x80)); + + LOG_INFO("RPT%d[%.6s-%d]%c\n", msg.rpt_cnt, + msg.rpt_lst[msg.rpt_cnt].call, + msg.rpt_lst[msg.rpt_cnt].ssid, + (AX25_REPEATED(&msg, msg.rpt_cnt) ? '*' : ' ')); + } + #else + while (!(*buf++ & 0x01)) + { + char rpt[6]; + uint8_t ssid; + DECODE_CALL(buf, rpt); + ssid = (*buf >> 1) & 0x0F; + LOG_INFO("RPT[%.6s-%d]\n", rpt, ssid); + } + #endif + + msg.ctrl = *buf++; + if (msg.ctrl != AX25_CTRL_UI) + { + LOG_WARN("Only UI frames are handled, got [%02X]\n", msg.ctrl); + return; + } + + msg.pid = *buf++; + if (msg.pid != AX25_PID_NOLAYER3) + { + LOG_WARN("Only frames without layer3 protocol are handled, got [%02X]\n", msg.pid); + return; + } + + msg.len = ctx->frm_len - 2 - (buf - ctx->buf); + msg.info = buf; + LOG_INFO("DATA: %.*s\n", msg.len, msg.info); + + if (ctx->hook) + ctx->hook(&msg); +} + + +/** + * Check if there are any AX25 messages to be processed. + * This function read available characters from the medium and search for + * any AX25 messages. + * If a message is found it is decoded and the linked callback executed. + * This function may be blocking if there are no available chars and the KFile + * used in \a ctx to access the medium is configured in blocking mode. + * + * \param ctx AX25 context to operate on. + */ +void ax25_poll(AX25Ctx *ctx) +{ + int c; + + while ((c = kfile_getc(ctx->ch)) != EOF) + { + if (!ctx->escape && c == HDLC_FLAG) + { + if (ctx->frm_len >= AX25_MIN_FRAME_LEN) + { + if (ctx->crc_in == AX25_CRC_CORRECT) + { + LOG_INFO("Frame found!\n"); + ax25_decode(ctx); + } + else + { + LOG_INFO("CRC error, computed [%04X]\n", ctx->crc_in); + } + } + ctx->sync = true; + ctx->crc_in = CRC_CCITT_INIT_VAL; + ctx->frm_len = 0; + continue; + } + + if (!ctx->escape && c == HDLC_RESET) + { + LOG_INFO("HDLC reset\n"); + ctx->sync = false; + continue; + } + + if (!ctx->escape && c == AX25_ESC) + { + ctx->escape = true; + continue; + } + + if (ctx->sync) + { + if (ctx->frm_len < CONFIG_AX25_FRAME_BUF_LEN) + { + ctx->buf[ctx->frm_len++] = c; + ctx->crc_in = updcrc_ccitt(c, ctx->crc_in); + } + else + { + LOG_INFO("Buffer overrun"); + ctx->sync = false; + } + } + ctx->escape = false; + } + + if (kfile_error(ctx->ch)) + { + LOG_ERR("Channel error [%04x]\n", kfile_error(ctx->ch)); + kfile_clearerr(ctx->ch); + } +} + +static void ax25_putchar(AX25Ctx *ctx, uint8_t c) +{ + if (c == HDLC_FLAG || c == HDLC_RESET + || c == AX25_ESC) + kfile_putc(AX25_ESC, ctx->ch); + ctx->crc_out = updcrc_ccitt(c, ctx->crc_out); + kfile_putc(c, ctx->ch); +} + +static void ax25_sendCall(AX25Ctx *ctx, const AX25Call *addr, bool last) +{ + unsigned len = MIN(sizeof(addr->call), strlen(addr->call)); + + for (unsigned i = 0; i < len; i++) + { + uint8_t c = addr->call[i]; + ASSERT(isalnum(c) || c == ' '); + c = toupper(c); + ax25_putchar(ctx, c << 1); + } + + /* Fill with spaces the rest of the CALL if it's shorter */ + if (len < sizeof(addr->call)) + for (unsigned i = 0; i < sizeof(addr->call) - len; i++) + ax25_putchar(ctx, ' ' << 1); + + /* The bit7 "has-been-repeated" flag is not implemented here */ + /* Bits6:5 should be set to 1 for all SSIDs (0x60) */ + /* The bit0 of last call SSID should be set to 1 */ + uint8_t ssid = 0x60 | (addr->ssid << 1) | (last ? 0x01 : 0); + ax25_putchar(ctx, ssid); +} + +/** + * Send an AX25 frame on the channel through a specific path. + * \param ctx AX25 context to operate on. + * \param path An array of callsigns used as path, \see AX25_PATH for + * an handy way to create a path. + * \param path_len callsigns path lenght. + * \param _buf payload buffer. + * \param len length of the payload. + */ +void ax25_sendVia(AX25Ctx *ctx, const AX25Call *path, size_t path_len, const void *_buf, size_t len) +{ + const uint8_t *buf = (const uint8_t *)_buf; + ASSERT(path); + ASSERT(path_len >= 2); + + ctx->crc_out = CRC_CCITT_INIT_VAL; + kfile_putc(HDLC_FLAG, ctx->ch); + + + /* Send call */ + for (size_t i = 0; i < path_len; i++) + ax25_sendCall(ctx, &path[i], (i == path_len - 1)); + + ax25_putchar(ctx, AX25_CTRL_UI); + ax25_putchar(ctx, AX25_PID_NOLAYER3); + + while (len--) + ax25_putchar(ctx, *buf++); + + /* + * According to AX25 protocol, + * CRC is sent in reverse order! + */ + uint8_t crcl = (ctx->crc_out & 0xff) ^ 0xff; + uint8_t crch = (ctx->crc_out >> 8) ^ 0xff; + ax25_putchar(ctx, crcl); + ax25_putchar(ctx, crch); + + ASSERT(ctx->crc_out == AX25_CRC_CORRECT); + + kfile_putc(HDLC_FLAG, ctx->ch); +} + +static void print_call(KFile *ch, const AX25Call *call) +{ + kfile_printf(ch, "%.6s", call->call); + if (call->ssid) + kfile_printf(ch, "-%d", call->ssid); +} + +/** + * Print a AX25 message in TNC-2 packet monitor format. + * \param ch a kfile channel where the message will be printed. + * \param msg the message to be printed. + */ +void ax25_print(KFile *ch, const AX25Msg *msg) +{ + print_call(ch, &msg->src); + kfile_putc('>', ch); + print_call(ch, &msg->dst); + + #if CONFIG_AX25_RPT_LST + for (int i = 0; i < msg->rpt_cnt; i++) + { + kfile_putc(',', ch); + print_call(ch, &msg->rpt_lst[i]); + /* Print a '*' if packet has already been transmitted + * by this repeater */ + if (AX25_REPEATED(msg, i)) + kfile_putc('*', ch); + } + #endif + + kfile_printf(ch, ":%.*s\n", msg->len, msg->info); +} + + +/** + * Init the AX25 protocol decoder. + * + * \param ctx AX25 context to init. + * \param channel Used to gain access to the physical medium + * \param hook Callback function called when a message is received + */ +void ax25_init(AX25Ctx *ctx, KFile *channel, ax25_callback_t hook) +{ + ASSERT(ctx); + ASSERT(channel); + + memset(ctx, 0, sizeof(*ctx)); + ctx->ch = channel; + ctx->hook = hook; + ctx->crc_in = ctx->crc_out = CRC_CCITT_INIT_VAL; +} diff --git a/bertos/net/ax25.h b/bertos/net/ax25.h new file mode 100644 index 0000000..dd43944 --- /dev/null +++ b/bertos/net/ax25.h @@ -0,0 +1,195 @@ +/** + * \file + * + * \brief Simple AX25 data link layer implementation. + * + * For now, only UI frames without any Layer 3 protocol are handled. + * This however is enough to send/receive APRS packets. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "ax25" + * $WIZ$ module_configuration = "bertos/cfg/cfg_ax25.h" + * $WIZ$ module_depends = "kfile", "crc-ccitt" + */ + + +#ifndef NET_AX25_H +#define NET_AX25_H + +#include "cfg/cfg_ax25.h" + +#include +#include + +/** + * Maximum size of a AX25 frame. + */ +#define AX25_MIN_FRAME_LEN 18 + +/** + * CRC computation on correct AX25 packets should + * give this result (don't ask why). + */ +#define AX25_CRC_CORRECT 0xF0B8 + +struct AX25Msg; // fwd declaration + +/** + * Type for AX25 messages callback. + */ +typedef void (*ax25_callback_t)(struct AX25Msg *msg); + + +/** + * AX25 Protocol context. + */ +typedef struct AX25Ctx +{ + uint8_t buf[CONFIG_AX25_FRAME_BUF_LEN]; ///< buffer for received chars + KFile *ch; ///< KFile used to access the physical medium + size_t frm_len; ///< received frame length. + uint16_t crc_in; ///< CRC for current received frame + uint16_t crc_out; ///< CRC of current sent frame + ax25_callback_t hook; ///< Hook function to be called when a message is received + bool sync; ///< True if we have received a HDLC flag. + bool escape; ///< True when we have to escape the following char. +} AX25Ctx; + + +/** + * AX25 Call sign. + */ +typedef struct AX25Call +{ + char call[6]; ///< Call string, max 6 character + uint8_t ssid; ///< SSID (secondary station ID) for the call +} AX25Call; + +/** + * Create an AX25Call structure on the fly. + * \param str callsign, can be 6 characters or shorter. + * \param id ssid associated with the callsign. + */ +#define AX25_CALL(str, id) {.call = (str), .ssid = (id) } + +/** + * Maximum number of Repeaters in a AX25 message. + */ +#define AX25_MAX_RPT 8 + +/* + * Has to be lesser than 8 in order to fit in one byte + * change AX25Msg.rpt_flags if you need more repeaters. + */ +STATIC_ASSERT(AX25_MAX_RPT <= 8); + +/** + * AX25 Message. + * Used to handle AX25 sent/received messages. + */ +typedef struct AX25Msg +{ + AX25Call src; ///< Source adress + AX25Call dst; ///< Destination address + #if CONFIG_AX25_RPT_LST + AX25Call rpt_lst[AX25_MAX_RPT]; ///< List of repeaters + uint8_t rpt_cnt; ///< Number of repeaters in this message + uint8_t rpt_flags; ///< Has-been-repeated flags for each repeater (bit-mapped) + #define AX25_REPEATED(msg, idx) ((msg)->rpt_flags & BV(idx)) + #endif + uint16_t ctrl; ///< AX25 control field + uint8_t pid; ///< AX25 PID field + const uint8_t *info; ///< Pointer to the info field (payload) of the message + size_t len; ///< Payload length +} AX25Msg; + + +#define AX25_CTRL_UI 0x03 +#define AX25_PID_NOLAYER3 0xF0 + +/** + * \name HDLC flags. + * These should be moved in + * a separated HDLC related file one day... + * \{ + */ +#define HDLC_FLAG 0x7E +#define HDLC_RESET 0x7F +#define AX25_ESC 0x1B +/* \} */ + + +/** + * Declare an AX25 path. + * \param dst the destination callsign for the path, \see AX25_CALL + * for a handy way to create a callsign on the fly. + * \param src the source callsign for the path, \see AX25_CALL + * for a handy way to create a callsign on the fly. + * + * Additional optional callsigns can be specified at the end of this macro + * in order to add repeater callsigns or specific unproto paths. + * + * This macro can be used to simply path array declaration. + * Should be used in this way: + * \code + * AX25Call path[] = AX25_PATH(AX25_CALL("abcdef", 0), AX25_CALL("ghjklm", 0), AX25_CALL("wide1", 1), AX25_CALL("wide2", 2)); + * \endcode + * + * The declared path can then be passed to ax25_sendVia(). + */ +#define AX25_PATH(dst, src, ...) { dst, src, ## __VA_ARGS__ } + +void ax25_poll(AX25Ctx *ctx); +void ax25_sendVia(AX25Ctx *ctx, const AX25Call *path, size_t path_len, const void *_buf, size_t len); + +/** + * Send an AX25 frame on the channel. + * \param ctx AX25 context to operate on. + * \param dst the destination callsign for the frame, \see AX25_CALL + * for a handy way to create a callsign on the fly. + * \param src the source callsign for the frame, \see AX25_CALL + * for a handy way to create a callsign on the fly. + * \param buf payload buffer. + * \param len length of the payload. + * + * \see ax25_sendVia() if you want to send a frame with a specific path. + */ +#define ax25_send(ctx, dst, src, buf, len) ax25_sendVia(ctx, ({static AX25Call __path[]={dst, src}; __path;}), 2, buf, len) +void ax25_init(AX25Ctx *ctx, KFile *channel, ax25_callback_t hook); + +void ax25_print(KFile *ch, const AX25Msg *msg); + +int ax25_testSetup(void); +int ax25_testTearDown(void); +int ax25_testRun(void); + +#endif /* NET_AX25_H */ diff --git a/bertos/net/ax25_test.c b/bertos/net/ax25_test.c new file mode 100644 index 0000000..f801c2f --- /dev/null +++ b/bertos/net/ax25_test.c @@ -0,0 +1,112 @@ +/** + * \file + * + * + * \brief AX25 test. + * + * \author Francesco Sacchi + */ + +#include "ax25.h" + +#include + +#include +#include +#include + +#include //strncmp + +static AX25Ctx ax25; +static KFileMem mem; +static KFileDebug dbg; + +#define APRS_MSG \ + 0x3D, 0x34, 0x36, 0x30, 0x33, 0x2E, 0x36, 0x33, \ + 0x4E, 0x2F, 0x30, 0x31, 0x34, 0x33, 0x31, 0x2E, \ + 0x32, 0x36, 0x45, 0x2D, 0x4F, 0x70, 0x2E, 0x20, \ + 0x41, 0x6E, 0x64, 0x72, 0x65, 0x6A + +uint8_t aprs_packet[] = +{ + HDLC_FLAG, + 0x82, 0xA0, 0xA4, 0xA6, 0x40, 0x40, 0xE0, /* dst */ + 0xA6, 0x6A, 0x6E, 0x98, 0x9C, 0x40, 0x61, /* src */ + 0x03, /* ctrl */ + 0xF0, /* pid */ + APRS_MSG, /* payload */ + 0x40, 0x65, /* CRC */ + HDLC_FLAG, +}; + +uint8_t buf[] = { APRS_MSG }; +KFileMem mem1; +uint8_t aprs_packet_check[256]; + + +static void msg_callback(AX25Msg *msg) +{ + ax25_print(&dbg.fd, msg); + ASSERT(strncmp(msg->dst.call, "APRS\x0\x0", 6) == 0); + ASSERT(strncmp(msg->src.call, "S57LN\x0", 6) == 0); + ASSERT(msg->src.ssid == 0); + ASSERT(msg->dst.ssid == 0); + ASSERT(msg->ctrl == AX25_CTRL_UI); + ASSERT(msg->pid == AX25_PID_NOLAYER3); + ASSERT(msg->len == 30); + ASSERT(strncmp((const char *)msg->info, "=4603.63N/01431.26E-Op. Andrej", 30) == 0); +} + +int ax25_testSetup(void) +{ + kdbg_init(); + kfiledebug_init(&dbg); + kfilemem_init(&mem, aprs_packet, sizeof(aprs_packet)); + kfilemem_init(&mem1, aprs_packet_check, sizeof(aprs_packet_check)); + ax25_init(&ax25, &mem.fd, msg_callback); + return 0; +} + +int ax25_testTearDown(void) +{ + return 0; +} + +int ax25_testRun(void) +{ + ax25_poll(&ax25); + ax25_init(&ax25, &mem1.fd, NULL); + ax25_send(&ax25, AX25_CALL("aprs", 0x70), AX25_CALL("s57ln", 0x30), buf, sizeof(buf)); + ASSERT(memcmp(aprs_packet, aprs_packet_check, sizeof(aprs_packet)) == 0); + return 0; +} + +TEST_MAIN(ax25); diff --git a/bertos/net/keytag.c b/bertos/net/keytag.c new file mode 100644 index 0000000..dac1a11 --- /dev/null +++ b/bertos/net/keytag.c @@ -0,0 +1,162 @@ +/** + * \file + * + * + * \author Andrea Grandi + * \author Daniele Basile + * + * \brief KeyTAG parser. + * + * This module parse TAG message that come from comunication channel, + * and convert the tag value into string. + * + * TAG protocol is decribed in this way: + * 
+ * ---------------------------------------------------
+ * |STX (0x02)|data...(10 HEX chars)|CR|LF|ETX (0x03)|
+ * ---------------------------------------------------
+ *
+ */ + +#include "keytag.h" + +#include +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_KEYTAG_LOG_LEVEL +#define LOG_FORMAT CONFIG_KEYTAG_LOG_FORMAT +#include +#include + +#include + +#include +/** + * Starting communication char (STX). + */ +#define TAG_STX 0x02 + +/** + * Ending communication char (ETX). + */ +#define TAG_ETX 0x03 + +static void keytag_clearPkt(struct TagPacket *pkt) +{ + pkt->sync = false; + pkt->len = 0; +} + +/** + * DEPRECATED FUCNTIONS + * To read the tag string from device you shoul use the keytag_recv + * fuction, that return the string if we had received it. + */ +void keytag_poll(struct TagPacket *pkt) +{ + uint8_t buf[CONFIG_TAG_MAX_LEN]; + int len; + if ((len = keytag_recv(pkt, buf, sizeof(buf))) != EOF) + kfile_write(pkt->host, buf, len); +} + +/** + * Receive the tag message from channel, and if + * the tag is good put the converted string into given buffer. + * The fuction return the len of found tag string, otherwise EOF. + */ +int keytag_recv(struct TagPacket *pkt, uint8_t *tag, size_t len) +{ + int c; + + /* Get all chars from buffer */ + while ((c = kfile_getc(pkt->tag)) != EOF) + { + /* Search for STX char in received chars */ + if (c == TAG_STX) + { + /* When STX is found a new packet begins */ + if (pkt->sync) + LOG_WARN("TAG double sync!\n"); + keytag_clearPkt(pkt); + pkt->sync = true; + } + else if (pkt->sync) + { + /* Check for end of packet */ + if (c == TAG_ETX) + { + /* Terminate the tag string */ + size_t tag_len = MIN(len, pkt->len); + + /* Save read tag */ + memcpy(tag, pkt->buf, tag_len); + pkt->sync = false; + return tag_len; + } + else + { + /* Check for buffer overflow */ + if (pkt->len >= CONFIG_TAG_MAX_LEN) + { + LOG_ERR("TAG buffer overflow\n"); + pkt->sync = false; + } + else + { + /* Add every char after STX to tag reading buffer */ + if (pkt->sync) + { + pkt->buf[pkt->len] = c; + pkt->len++; + } + } + } + } + } + if (kfile_error(pkt->tag) != 0) + { + LOG_ERR("Error %04x\n", kfile_error(pkt->tag)); + kfile_clearerr(pkt->tag); + } + + return EOF; +} + +/** + * Init the keytag module. + */ +void keytag_init(struct TagPacket *pkt, struct KFile *comm, struct KFile *tag) +{ + keytag_clearPkt(pkt); + pkt->tag = tag; + pkt->host = comm; +} + diff --git a/bertos/net/keytag.h b/bertos/net/keytag.h new file mode 100644 index 0000000..ee8258c --- /dev/null +++ b/bertos/net/keytag.h @@ -0,0 +1,69 @@ +/** + * \file + * + * + * \author Andrea Grandi + * + * \brief Tag protocol. (interface). + * + * $WIZ$ module_name = "keytag" + * $WIZ$ module_configuration = "bertos/cfg/cfg_keytag.h" + * $WIZ$ module_depends = "kfile" + * $WIZ$ module_hw = "" + */ + +#ifndef NET_KEYTAG_H +#define NET_KEYTAG_H + +#include "cfg/cfg_keytag.h" +#include + +#include + + +/** + * Structure of a Tag packet + */ +typedef struct TagPacket +{ + KFile *tag; ///< Tag communication channel + KFile *host; ///< Host communication channel + bool sync; ///< Status flag: true if we find an STX + size_t len; ///< Packet lenght + uint8_t buf[CONFIG_TAG_MAX_LEN]; ///< Reception buffer +} TagPacket; + +void keytag_init(struct TagPacket *pkt, struct KFile *comm, struct KFile *tag); +int keytag_recv(struct TagPacket *pkt, uint8_t *tag, size_t len); + +DEPRECATED void keytag_poll(struct TagPacket *pkt); + +#endif /* NET_TAG_H */ diff --git a/bertos/net/lwip.c b/bertos/net/lwip.c new file mode 100644 index 0000000..8adb25b --- /dev/null +++ b/bertos/net/lwip.c @@ -0,0 +1,131 @@ +/** + * \file + * + * \brief lwIP TCP/IP stack module + * + * \author Andrea Righi + */ + +/* + * Required by arm-2010.09-51-arm-none-eabi toolchain + */ +#define __LINUX_ERRNO_EXTENSIONS__ + +/* XXX: exclude all the lwIP stuff from the BeRTOS documentation for now */ +#ifndef __doxygen__ +/* Ensure that the lwIP compile-time options are included first. */ +#include "cfg/cfg_lwip.h" + +/* Core lwIP TCP/IP stack */ +#if LWIP_DHCP +#include "lwip/src/core/dhcp.c" +#endif +#if LWIP_DNS +#include "lwip/src/core/dns.c" +#endif +#include "lwip/src/core/init.c" +#include "lwip/src/core/mem.c" +#include "lwip/src/core/memp.c" +#include "lwip/src/core/netif.c" +#include "lwip/src/core/pbuf.c" +#include "lwip/src/core/raw.c" +#include "lwip/src/core/stats.c" +#include "lwip/src/core/sys.c" +#if LWIP_TCP +#include "lwip/src/core/tcp.c" +#include "lwip/src/core/tcp_in.c" +#include "lwip/src/core/tcp_out.c" +#endif +#if LWIP_UDP +#include "lwip/src/core/udp.c" +#endif + +/* lwIP high-level API code */ +#include "lwip/src/api/api_lib.c" +#include "lwip/src/api/api_msg.c" +#include "lwip/src/api/err.c" +#include "lwip/src/api/netbuf.c" +#include "lwip/src/api/netdb.c" +#include "lwip/src/api/netifapi.c" +#include "lwip/src/api/sockets.c" +#include "lwip/src/api/tcpip.c" + +/* lwIP IPV4 implementation */ +#if LWIP_AUTOIP +#include "lwip/src/core/ipv4/autoip.c" +#endif +#if LWIP_ICMP +#include "lwip/src/core/ipv4/icmp.c" +#endif +#if LWIP_IGMP +#include "lwip/src/core/ipv4/igmp.c" +#endif +#include "lwip/src/core/ipv4/inet.c" +#include "lwip/src/core/ipv4/inet_chksum.c" +#include "lwip/src/core/ipv4/ip.c" +#include "lwip/src/core/ipv4/ip_addr.c" +#include "lwip/src/core/ipv4/ip_frag.c" + +/* lwIP SNMP implementation */ +#if LWIP_SNMP +#include "lwip/src/core/snmp/asn1_dec.c" +#include "lwip/src/core/snmp/asn1_enc.c" +#include "lwip/src/core/snmp/mib2.c" +#include "lwip/src/core/snmp/mib_structs.c" +#include "lwip/src/core/snmp/msg_in.c" +#include "lwip/src/core/snmp/msg_out.c" +#endif + +/* lwIP network interface */ +#include "lwip/src/netif/etharp.c" +#include "lwip/src/netif/loopif.c" + +/* lwIP PPP implementation */ +#if PPP_SUPPORT +#include "lwip/src/netif/ppp/auth.c" +#include "lwip/src/netif/ppp/chap.c" +#include "lwip/src/netif/ppp/chpms.c" +#include "lwip/src/netif/ppp/fsm.c" +#include "lwip/src/netif/ppp/ipcp.c" +#include "lwip/src/netif/ppp/lcp.c" +#include "lwip/src/netif/ppp/magic.c" +#include "lwip/src/netif/ppp/md5.c" +#include "lwip/src/netif/ppp/pap.c" +#include "lwip/src/netif/ppp/ppp.c" +#include "lwip/src/netif/ppp/ppp_oe.c" +#include "lwip/src/netif/ppp/randm.c" +#include "lwip/src/netif/ppp/vj.c" +#endif + +/* BeRTOS-specific lwIP interface/porting layer */ +#include "lwip/src/netif/ethernetif.c" +#include "lwip/src/arch/sys_arch.c" +#endif /* __doxygen__ */ diff --git a/bertos/net/lwip.h b/bertos/net/lwip.h new file mode 100644 index 0000000..3f592ff --- /dev/null +++ b/bertos/net/lwip.h @@ -0,0 +1,46 @@ +/** + * \file + * + * \brief lwIP TCP/IP stack module + * + * \author Andrea Righi + * + * $WIZ$ module_name = "lwip" + * $WIZ$ module_configuration = "bertos/cfg/cfg_lwip.h" + * $WIZ$ module_depends = "kern", "signal", "msg", "event", "eth" + */ + +#ifndef NET_LWIP_H +#define NET_LWIP_H + +#include "cfg/cfg_lwip.h" + +#endif /* NET_LWIP_H */ diff --git a/bertos/net/lwip/CHANGELOG b/bertos/net/lwip/CHANGELOG new file mode 100644 index 0000000..860d1c4 --- /dev/null +++ b/bertos/net/lwip/CHANGELOG @@ -0,0 +1,2419 @@ +FUTURE + + * TODO: The lwIP source code makes some invalid assumptions on processor + word-length, storage sizes and alignment. See the mailing lists for + problems with exoteric (/DSP) architectures showing these problems. + We still have to fix some of these issues neatly. + + * TODO: the PPP code is broken in a few ways. There are namespace + collisions on BSD systems and many assumptions on word-length + (sizeof(int)). In ppp.c an assumption is made on the availability of + a thread subsystem. Either PPP needs to be moved to contrib/ports/??? + or rearranged to be more generic. + +HISTORY + +(CVS HEAD) + + * [Enter new changes just after this line - do not remove this line] + + ++ New features: + + + ++ Bugfixes: + + +(STABLE-1.3.2) + + ++ New features: + + 2009-10-27 Simon Goldschmidt/Stephan Lesage + * netifapi.c/.h: Added netifapi_netif_set_addr() + + 2009-10-07 Simon Goldschmidt/Fabian Koch + * api_msg.c, netbuf.c/.h, opt.h: patch #6888: Patch for UDP Netbufs to + support dest-addr and dest-port (optional: LWIP_NETBUF_RECVINFO) + + 2009-08-26 Simon Goldschmidt/Simon Kallweit + * slipif.c/.h: bug #26397: SLIP polling support + + 2009-08-25 Simon Goldschmidt + * opt.h, etharp.h/.c: task #9033: Support IEEE 802.1q tagged frame (VLAN), + New configuration options ETHARP_SUPPORT_VLAN and ETHARP_VLAN_CHECK. + + 2009-08-25 Simon Goldschmidt + * ip_addr.h, netdb.c: patch #6900: added define ip_ntoa(struct ip_addr*) + + 2009-08-24 Jakob Stoklund Olesen + * autoip.c, dhcp.c, netif.c: patch #6725: Teach AutoIP and DHCP to respond + to netif_set_link_up(). + + 2009-08-23 Simon Goldschmidt + * tcp.h/.c: Added function tcp_debug_state_str() to convert a tcp state + to a human-readable string. + + ++ Bugfixes: + + 2009-12-24: Kieran Mansley + * tcp_in.c Apply patches from Oleg Tyshev to improve OOS processing + (BUG#28241) + + 2009-12-06: Simon Goldschmidt + * ppp.h/.c: Fixed bug #27079 (Yet another leak in PPP): outpacket_buf can + be statically allocated (like in ucip) + + 2009-12-04: Simon Goldschmidt (patch by Ioardan Neshev) + * pap.c: patch #6969: PPP: missing PAP authentication UNTIMEOUT + + 2009-12-03: Simon Goldschmidt + * tcp.h, tcp_in.c, tcp_out.c: Fixed bug #28106: dup ack for fast retransmit + could have non-zero length + + 2009-12-02: Simon Goldschmidt + * tcp_in.c: Fixed bug #27904: TCP sends too many ACKs: delay resetting + tcp_input_pcb until after calling the pcb's callbacks + + 2009-11-29: Simon Goldschmidt + * tcp_in.c: Fixed bug #28054: Two segments with FIN flag on the out-of- + sequence queue, also fixed PBUF_POOL leak in the out-of-sequence code + + 2009-11-29: Simon Goldschmidt + * pbuf.c: Fixed bug #28064: pbuf_alloc(PBUF_POOL) is not thread-safe by + queueing a call into tcpip_thread to free ooseq-bufs if the pool is empty + + 2009-11-26: Simon Goldschmidt + * tcp.h: Fixed bug #28098: Nagle can prevent fast retransmit from sending + segment + + 2009-11-26: Simon Goldschmidt + * tcp.h, sockets.c: Fixed bug #28099: API required to disable Nagle + algorithm at PCB level + + 2009-11-22: Simon Goldschmidt + * tcp_out.c: Fixed bug #27905: FIN isn't combined with data on unsent + + 2009-11-22: Simon Goldschmidt (suggested by Bill Auerbach) + * tcp.c: tcp_alloc: prevent increasing stats.err for MEMP_TCP_PCB when + reusing time-wait pcb + + 2009-11-20: Simon Goldschmidt (patch by Albert Bartel) + * sockets.c: Fixed bug #28062: Data received directly after accepting + does not wake up select + + 2009-11-11: Simon Goldschmidt + * netdb.h: Fixed bug #27994: incorrect define for freeaddrinfo(addrinfo) + + 2009-10-30: Simon Goldschmidt + * opt.h: Increased default value for TCP_MSS to 536, updated default + value for TCP_WND to 4*TCP_MSS to keep delayed ACK working. + + 2009-10-28: Kieran Mansley + * tcp_in.c, tcp_out.c, tcp.h: re-work the fast retransmission code + to follow algorithm from TCP/IP Illustrated + + 2009-10-27: Kieran Mansley + * tcp_in.c: fix BUG#27445: grow cwnd with every duplicate ACK + + 2009-10-25: Simon Goldschmidt + * tcp.h: bug-fix in the TCP_EVENT_RECV macro (has to call tcp_recved if + pcb->recv is NULL to keep rcv_wnd correct) + + 2009-10-25: Simon Goldschmidt + * tcp_in.c: Fixed bug #26251: RST process in TIME_WAIT TCP state + + 2009-10-23: Simon Goldschmidt (David Empson) + * tcp.c: Fixed bug #27783: Silly window avoidance for small window sizes + + 2009-10-21: Simon Goldschmidt + * tcp_in.c: Fixed bug #27215: TCP sent() callback gives leading and + trailing 1 byte len (SYN/FIN) + + 2009-10-21: Simon Goldschmidt + * tcp_out.c: Fixed bug #27315: zero window probe and FIN + + 2009-10-19: Simon Goldschmidt + * dhcp.c/.h: Minor code simplification (don't store received pbuf, change + conditional code to assert where applicable), check pbuf length before + testing for valid reply + + 2009-10-19: Simon Goldschmidt + * dhcp.c: Removed most calls to udp_connect since they aren't necessary + when using udp_sendto_if() - always stay connected to IP_ADDR_ANY. + + 2009-10-16: Simon Goldschmidt + * ip.c: Fixed bug #27390: Source IP check in ip_input() causes it to drop + valid DHCP packets -> allow 0.0.0.0 as source address when LWIP_DHCP is + enabled + + 2009-10-15: Simon Goldschmidt (Oleg Tyshev) + * tcp_in.c: Fixed bug #27329: dupacks by unidirectional data transmit + + 2009-10-15: Simon Goldschmidt + * api_lib.c: Fixed bug #27709: conn->err race condition on netconn_recv() + timeout + + 2009-10-15: Simon Goldschmidt + * autoip.c: Fixed bug #27704: autoip starts with wrong address + LWIP_AUTOIP_CREATE_SEED_ADDR() returned address in host byte order instead + of network byte order + + 2009-10-11 Simon Goldschmidt (Jörg Kesten) + * tcp_out.c: Fixed bug #27504: tcp_enqueue wrongly concatenates segments + which are not consecutive when retransmitting unacked segments + + 2009-10-09 Simon Goldschmidt + * opt.h: Fixed default values of some stats to only be enabled if used + Fixes bug #27338: sys_stats is defined when NO_SYS = 1 + + 2009-08-30 Simon Goldschmidt + * ip.c: Fixed bug bug #27345: "ip_frag() does not use the LWIP_NETIF_LOOPBACK + function" by checking for loopback before calling ip_frag + + 2009-08-25 Simon Goldschmidt + * dhcp.c: fixed invalid dependency to etharp_query if DHCP_DOES_ARP_CHECK==0 + + 2009-08-23 Simon Goldschmidt + * ppp.c: bug #27078: Possible memory leak in pppInit() + + 2009-08-23 Simon Goldschmidt + * netdb.c, dns.c: bug #26657: DNS, if host name is "localhost", result + is error. + + 2009-08-23 Simon Goldschmidt + * opt.h, init.c: bug #26649: TCP fails when TCP_MSS > TCP_SND_BUF + Fixed wrong parenthesis, added check in init.c + + 2009-08-23 Simon Goldschmidt + * ppp.c: bug #27266: wait-state debug message in pppMain occurs every ms + + 2009-08-23 Simon Goldschmidt + * many ppp files: bug #27267: Added include to string.h where needed + + 2009-08-23 Simon Goldschmidt + * tcp.h: patch #6843: tcp.h macro optimization patch (for little endian) + + +(STABLE-1.3.1) + + ++ New features: + + 2009-05-10 Simon Goldschmidt + * opt.h, sockets.c, pbuf.c, netbuf.h, pbuf.h: task #7013: Added option + LWIP_NETIF_TX_SINGLE_PBUF to try to create transmit packets from only + one pbuf to help MACs that don't support scatter-gather DMA. + + 2009-05-09 Simon Goldschmidt + * icmp.h, icmp.c: Shrinked ICMP code, added option to NOT check icoming + ECHO pbuf for size (just use it): LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN + + 2009-05-05 Simon Goldschmidt, Jakob Stoklund Olesen + * ip.h, ip.c: Added ip_current_netif() & ip_current_header() to receive + extended info about the currently received packet. + + 2009-04-27 Simon Goldschmidt + * sys.h: Made SYS_LIGHTWEIGHT_PROT and sys_now() work with NO_SYS=1 + + 2009-04-25 Simon Goldschmidt + * mem.c, opt.h: Added option MEM_USE_POOLS_TRY_BIGGER_POOL to try the next + bigger malloc pool if one is empty (only usable with MEM_USE_POOLS). + + 2009-04-21 Simon Goldschmidt + * dns.c, init.c, dns.h, opt.h: task #7507, patch #6786: DNS supports static + hosts table. New configuration options DNS_LOCAL_HOSTLIST and + DNS_LOCAL_HOSTLIST_IS_DYNAMIC. Also, DNS_LOOKUP_LOCAL_EXTERN() can be defined + as an external function for lookup. + + 2009-04-15 Simon Goldschmidt + * dhcp.c: patch #6763: Global DHCP XID can be redefined to something more unique + + 2009-03-31 Kieran Mansley + * tcp.c, tcp_out.c, tcp_in.c, sys.h, tcp.h, opts.h: add support for + TCP timestamp options, off by default. Rework tcp_enqueue() to + take option flags rather than specified option data + + 2009-02-18 Simon Goldschmidt + * cc.h: Added printf formatter for size_t: SZT_F + + 2009-02-16 Simon Goldschmidt (patch by Rishi Khan) + * icmp.c, opt.h: patch #6539: (configurable) response to broadcast- and multicast + pings + + 2009-02-12 Simon Goldschmidt + * init.h: Added LWIP_VERSION to get the current version of the stack + + 2009-02-11 Simon Goldschmidt (suggested by Gottfried Spitaler) + * opt.h, memp.h/.c: added MEMP_MEM_MALLOC to use mem_malloc/mem_free instead + of the pool allocator (can save code size with MEM_LIBC_MALLOC if libc-malloc + is otherwise used) + + 2009-01-28 Jonathan Larmour (suggested by Bill Bauerbach) + * ipv4/inet_chksum.c, ipv4/lwip/inet_chksum.h: inet_chksum_pseudo_partial() + is only used by UDPLITE at present, so conditionalise it. + + 2008-12-03 Simon Goldschmidt (base on patch from Luca Ceresoli) + * autoip.c: checked in (slightly modified) patch #6683: Customizable AUTOIP + "seed" address. This should reduce AUTOIP conflicts if + LWIP_AUTOIP_CREATE_SEED_ADDR is overridden. + + 2008-10-02 Jonathan Larmour and Rishi Khan + * sockets.c (lwip_accept): Return EWOULDBLOCK if would block on non-blocking + socket. + + 2008-06-30 Simon Goldschmidt + * mem.c, opt.h, stats.h: fixed bug #21433: Calling mem_free/pbuf_free from + interrupt context isn't safe: LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT allows + mem_free to run between mem_malloc iterations. Added illegal counter for + mem stats. + + 2008-06-27 Simon Goldschmidt + * stats.h/.c, some other files: patch #6483: stats module improvement: + Added defines to display each module's statistic individually, added stats + defines for MEM, MEMP and SYS modules, removed (unused) rexmit counter. + + 2008-06-17 Simon Goldschmidt + * err.h: patch #6459: Made err_t overridable to use a more efficient type + (define LWIP_ERR_T in cc.h) + + 2008-06-17 Simon Goldschmidt + * slipif.c: patch #6480: Added a configuration option for slipif for symmetry + to loopif + + 2008-06-17 Simon Goldschmidt (patch by Luca Ceresoli) + * netif.c, loopif.c, ip.c, netif.h, loopif.h, opt.h: Checked in slightly + modified version of patch # 6370: Moved loopif code to netif.c so that + loopback traffic is supported on all netifs (all local IPs). + Added option to limit loopback packets for each netifs. + + + ++ Bugfixes: + 2009-08-12 Kieran Mansley + * tcp_in.c, tcp.c: Fix bug #27209: handle trimming of segments when + out of window or out of order properly + + 2009-08-12 Kieran Mansley + * tcp_in.c: Fix bug #27199: use snd_wl2 instead of snd_wl1 + + 2009-07-28 Simon Goldschmidt + * mem.h: Fixed bug #27105: "realloc() cannot replace mem_realloc()"s + + 2009-07-27 Kieran Mansley + * api.h api_msg.h netdb.h sockets.h: add missing #include directives + + 2009-07-09 Kieran Mansley + * api_msg.c, sockets.c, api.h: BUG23240 use signed counters for + recv_avail and don't increment counters until message successfully + sent to mbox + + 2009-06-25 Kieran Mansley + * api_msg.c api.h: BUG26722: initialise netconn write variables + in netconn_alloc + + 2009-06-25 Kieran Mansley + * tcp.h: BUG26879: set ret value in TCP_EVENT macros when function is not set + + 2009-06-25 Kieran Mansley + * tcp.c, tcp_in.c, tcp_out.c, tcp.h: BUG26301 and BUG26267: correct + simultaneous close behaviour, and make snd_nxt have the same meaning + as in the RFCs. + + 2009-05-12 Simon Goldschmidt + * etharp.h, etharp.c, netif.c: fixed bug #26507: "Gratuitous ARP depends on + arp_table / uses etharp_query" by adding etharp_gratuitous() + + 2009-05-12 Simon Goldschmidt + * ip.h, ip.c, igmp.c: bug #26487: Added ip_output_if_opt that can add IP options + to the IP header (used by igmp_ip_output_if) + + 2009-05-06 Simon Goldschmidt + * inet_chksum.c: On little endian architectures, use LWIP_PLATFORM_HTONS (if + defined) for SWAP_BYTES_IN_WORD to speed up checksumming. + + 2009-05-05 Simon Goldschmidt + * sockets.c: bug #26405: Prematurely released semaphore causes lwip_select() + to crash + + 2009-05-04 Simon Goldschmidt + * init.c: snmp was not initialized in lwip_init() + + 2009-05-04 Frédéric Bernon + * dhcp.c, netbios.c: Changes if IP_SOF_BROADCAST is enabled. + + 2009-05-03 Simon Goldschmidt + * tcp.h: bug #26349: Nagle algorithm doesn't send although segment is full + (and unsent->next == NULL) + + 2009-05-02 Simon Goldschmidt + * tcpip.h, tcpip.c: fixed tcpip_untimeout (does not need the time, broken after + 1.3.0 in CVS only) - fixes compilation of ppp_oe.c + + 2009-05-02 Simon Goldschmidt + * msg_in.c: fixed bug #25636: SNMPSET value is ignored for integer fields + + 2009-05-01 Simon Goldschmidt + * pap.c: bug #21680: PPP upap_rauthnak() drops legal NAK packets + + 2009-05-01 Simon Goldschmidt + * ppp.c: bug #24228: Memory corruption with PPP and DHCP + + 2009-04-29 Frédéric Bernon + * raw.c, udp.c, init.c, opt.h, ip.h, sockets.h: bug #26309: Implement the + SO(F)_BROADCAST filter for all API layers. Avoid the unindented reception + of broadcast packets even when this option wasn't set. Port maintainers + which want to enable this filter have to set IP_SOF_BROADCAST=1 in opt.h. + If you want this option also filter broadcast on recv operations, you also + have to set IP_SOF_BROADCAST_RECV=1 in opt.h. + + 2009-04-28 Simon Goldschmidt, Jakob Stoklund Olesen + * dhcp.c: patch #6721, bugs #25575, #25576: Some small fixes to DHCP and + DHCP/AUTOIP cooperation + + 2009-04-25 Simon Goldschmidt, Oleg Tyshev + * tcp_out.c: bug #24212: Deadlocked tcp_retransmit due to exceeded pcb->cwnd + Fixed by sorting the unsent and unacked queues (segments are inserted at the + right place in tcp_output and tcp_rexmit). + + 2009-04-25 Simon Goldschmidt + * memp.c, mem.c, memp.h, mem_std.h: bug #26213 "Problem with memory allocation + when debugging": memp_sizes contained the wrong sizes (including sanity + regions); memp pools for MEM_USE_POOLS were too small + + 2009-04-24 Simon Goldschmidt, Frédéric Bernon + * inet.c: patch #6765: Fix a small problem with the last changes (incorrect + behavior, with with ip address string not ended by a '\0', a space or a + end of line) + + 2009-04-19 Simon Goldschmidt + * rawapi.txt: Fixed bug #26069: Corrected documentation: if tcp_connect fails, + pcb->err is called, not pcb->connected (with an error code). + + 2009-04-19 Simon Goldschmidt + * tcp_out.c: Fixed bug #26236: "TCP options (timestamp) don't work with + no-copy-tcpwrite": deallocate option data, only concat segments with same flags + + 2009-04-19 Simon Goldschmidt + * tcp_out.c: Fixed bug #25094: "Zero-length pbuf" (options are now allocated + in the header pbuf, not the data pbuf) + + 2009-04-18 Simon Goldschmidt + * api_msg.c: fixed bug #25695: Segmentation fault in do_writemore() + + 2009-04-15 Simon Goldschmidt + * sockets.c: tried to fix bug #23559: lwip_recvfrom problem with tcp + + 2009-04-15 Simon Goldschmidt + * dhcp.c: task #9192: mem_free of dhcp->options_in and dhcp->msg_in + + 2009-04-15 Simon Goldschmidt + * ip.c, ip6.c, tcp_out.c, ip.h: patch #6808: Add a utility function + ip_hinted_output() (for smaller code mainly) + + 2009-04-15 Simon Goldschmidt + * inet.c: patch #6765: Supporting new line characters in inet_aton() + + 2009-04-15 Simon Goldschmidt + * dhcp.c: patch #6764: DHCP rebind and renew did not send hostnam option; + Converted constant OPTION_MAX_MSG_SIZE to netif->mtu, check if netif->mtu + is big enough in dhcp_start + + 2009-04-15 Simon Goldschmidt + * netbuf.c: bug #26027: netbuf_chain resulted in pbuf memory leak + + 2009-04-15 Simon Goldschmidt + * sockets.c, ppp.c: bug #25763: corrected 4 occurrences of SMEMCPY to MEMCPY + + 2009-04-15 Simon Goldschmidt + * sockets.c: bug #26121: set_errno can be overridden + + 2009-04-09 Kieran Mansley (patch from Luca Ceresoli ) + * init.c, opt.h: Patch#6774 TCP_QUEUE_OOSEQ breaks compilation when + LWIP_TCP==0 + + 2009-04-09 Kieran Mansley (patch from Roy Lee ) + * tcp.h: Patch#6802 Add do-while-clauses to those function like + macros in tcp.h + + 2009-03-31 Kieran Mansley + * tcp.c, tcp_in.c, tcp_out.c, tcp.h, opt.h: Rework the way window + updates are calculated and sent (BUG20515) + + * tcp_in.c: cope with SYN packets received during established states, + and retransmission of initial SYN. + + * tcp_out.c: set push bit correctly when tcp segments are merged + + 2009-03-27 Kieran Mansley + * tcp_out.c set window correctly on probes (correcting change made + yesterday) + + 2009-03-26 Kieran Mansley + * tcp.c, tcp_in.c, tcp.h: add tcp_abandon() to cope with dropping + connections where no reset required (bug #25622) + + * tcp_out.c: set TCP_ACK flag on keepalive and zero window probes + (bug #20779) + + 2009-02-18 Simon Goldschmidt (Jonathan Larmour and Bill Auerbach) + * ip_frag.c: patch #6528: the buffer used for IP_FRAG_USES_STATIC_BUF could be + too small depending on MEM_ALIGNMENT + + 2009-02-16 Simon Goldschmidt + * sockets.h/.c, api_*.h/.c: fixed arguments of socket functions to match the standard; + converted size argument of netconn_write to 'size_t' + + 2009-02-16 Simon Goldschmidt + * tcp.h, tcp.c: fixed bug #24440: TCP connection close problem on 64-bit host + by moving accept callback function pointer to TCP_PCB_COMMON + + 2009-02-12 Simon Goldschmidt + * dhcp.c: fixed bug #25345 (DHCPDECLINE is sent with "Maximum message size" + option) + + 2009-02-11 Simon Goldschmidt + * dhcp.c: fixed bug #24480 (releasing old udp_pdb and pbuf in dhcp_start) + + 2009-02-11 Simon Goldschmidt + * opt.h, api_msg.c: added configurable default valud for netconn->recv_bufsize: + RECV_BUFSIZE_DEFAULT (fixes bug #23726: pbuf pool exhaustion on slow recv()) + + 2009-02-10 Simon Goldschmidt + * tcp.c: fixed bug #25467: Listen backlog is not reset on timeout in SYN_RCVD: + Accepts_pending is decrease on a corresponding listen pcb when a connection + in state SYN_RCVD is close. + + 2009-01-28 Jonathan Larmour + * pbuf.c: reclaim pbufs from TCP out-of-sequence segments if we run + out of pool pbufs. + + 2008-12-19 Simon Goldschmidt + * many files: patch #6699: fixed some warnings on platform where sizeof(int) == 2 + + 2008-12-10 Tamas Somogyi, Frédéric Bernon + * sockets.c: fixed bug #25051: lwip_recvfrom problem with udp: fromaddr and + port uses deleted netbuf. + + 2008-10-18 Simon Goldschmidt + * tcp_in.c: fixed bug ##24596: Vulnerability on faulty TCP options length + in tcp_parseopt + + 2008-10-15 Simon Goldschmidt + * ip_frag.c: fixed bug #24517: IP reassembly crashes on unaligned IP headers + by packing the struct ip_reass_helper. + + 2008-10-03 David Woodhouse, Jonathan Larmour + * etharp.c (etharp_arp_input): Fix type aliasing problem copying ip address. + + 2008-10-02 Jonathan Larmour + * dns.c: Hard-code structure sizes, to avoid issues on some compilers where + padding is included. + + 2008-09-30 Jonathan Larmour + * sockets.c (lwip_accept): check addr isn't NULL. If it's valid, do an + assertion check that addrlen isn't NULL. + + 2008-09-30 Jonathan Larmour + * tcp.c: Fix bug #24227, wrong error message in tcp_bind. + + 2008-08-26 Simon Goldschmidt + * inet.h, ip_addr.h: fixed bug #24132: Cross-dependency between ip_addr.h and + inet.h -> moved declaration of struct in_addr from ip_addr.h to inet.h + + 2008-08-14 Simon Goldschmidt + * api_msg.c: fixed bug #23847: do_close_internal references freed memory (when + tcp_close returns != ERR_OK) + + 2008-07-08 Frédéric Bernon + * stats.h: Fix some build bugs introduced with patch #6483 (missing some parameters + in macros, mainly if MEM_STATS=0 and MEMP_STATS=0). + + 2008-06-24 Jonathan Larmour + * tcp_in.c: Fix for bug #23693 as suggested by Art R. Ensure cseg is unused + if tcp_seg_copy fails. + + 2008-06-17 Simon Goldschmidt + * inet_chksum.c: Checked in some ideas of patch #6460 (loop optimizations) + and created defines for swapping bytes and folding u32 to u16. + + 2008-05-30 Kieran Mansley + * tcp_in.c Remove redundant "if" statement, and use real rcv_wnd + rather than rcv_ann_wnd when deciding if packets are in-window. + Contributed by + + 2008-05-30 Kieran Mansley + * mem.h: Fix BUG#23254. Change macro definition of mem_* to allow + passing as function pointers when MEM_LIBC_MALLOC is defined. + + 2008-05-09 Jonathan Larmour + * err.h, err.c, sockets.c: Fix bug #23119: Reorder timeout error code to + stop it being treated as a fatal error. + + 2008-04-15 Simon Goldschmidt + * dhcp.c: fixed bug #22804: dhcp_stop doesn't clear NETIF_FLAG_DHCP + (flag now cleared) + + 2008-03-27 Simon Goldschmidt + * mem.c, tcpip.c, tcpip.h, opt.h: fixed bug #21433 (Calling mem_free/pbuf_free + from interrupt context isn't safe): set LWIP_USE_HEAP_FROM_INTERRUPT to 1 + in lwipopts.h or use pbuf_free_callback(p)/mem_free_callback(m) to free pbufs + or heap memory from interrupt context + + 2008-03-26 Simon Goldschmidt + * tcp_in.c, tcp.c: fixed bug #22249: division by zero could occur if a remote + host sent a zero mss as TCP option. + + +(STABLE-1.3.0) + + ++ New features: + + 2008-03-10 Jonathan Larmour + * inet_chksum.c: Allow choice of one of the sample algorithms to be + made from lwipopts.h. Fix comment on how to override LWIP_CHKSUM. + + 2008-01-22 Frédéric Bernon + * tcp.c, tcp_in.c, tcp.h, opt.h: Rename LWIP_CALCULATE_EFF_SEND_MSS in + TCP_CALCULATE_EFF_SEND_MSS to have coherent TCP options names. + + 2008-01-14 Frédéric Bernon + * rawapi.txt, api_msg.c, tcp.c, tcp_in.c, tcp.h: changes for task #7675 "Enable + to refuse data on a TCP_EVENT_RECV call". Important, behavior changes for the + tcp_recv callback (see rawapi.txt). + + 2008-01-14 Frédéric Bernon, Marc Chaland + * ip.c: Integrate patch #6369" ip_input : checking before realloc". + + 2008-01-12 Frédéric Bernon + * tcpip.h, tcpip.c, api.h, api_lib.c, api_msg.c, sockets.c: replace the field + netconn::sem per netconn::op_completed like suggested for the task #7490 + "Add return value to sys_mbox_post". + + 2008-01-12 Frédéric Bernon + * api_msg.c, opt.h: replace DEFAULT_RECVMBOX_SIZE per DEFAULT_TCP_RECVMBOX_SIZE, + DEFAULT_UDP_RECVMBOX_SIZE and DEFAULT_RAW_RECVMBOX_SIZE (to optimize queues + sizes), like suggested for the task #7490 "Add return value to sys_mbox_post". + + 2008-01-10 Frédéric Bernon + * tcpip.h, tcpip.c: add tcpip_callback_with_block function for the task #7490 + "Add return value to sys_mbox_post". tcpip_callback is always defined as + "blocking" ("block" parameter = 1). + + 2008-01-10 Frédéric Bernon + * tcpip.h, tcpip.c, api.h, api_lib.c, api_msg.c, sockets.c: replace the field + netconn::mbox (sys_mbox_t) per netconn::sem (sys_sem_t) for the task #7490 + "Add return value to sys_mbox_post". + + 2008-01-05 Frédéric Bernon + * sys_arch.txt, api.h, api_lib.c, api_msg.h, api_msg.c, tcpip.c, sys.h, opt.h: + Introduce changes for task #7490 "Add return value to sys_mbox_post" with some + modifications in the sys_mbox api: sys_mbox_new take a "size" parameters which + indicate the number of pointers query by the mailbox. There is three defines + in opt.h to indicate sizes for tcpip::mbox, netconn::recvmbox, and for the + netconn::acceptmbox. Port maintainers, you can decide to just add this new + parameter in your implementation, but to ignore it to keep the previous behavior. + The new sys_mbox_trypost function return a value to know if the mailbox is + full or if the message is posted. Take a look to sys_arch.txt for more details. + This new function is used in tcpip_input (so, can be called in an interrupt + context since the function is not blocking), and in recv_udp and recv_raw. + + 2008-01-04 Frédéric Bernon, Simon Goldschmidt, Jonathan Larmour + * rawapi.txt, api.h, api_lib.c, api_msg.h, api_msg.c, sockets.c, tcp.h, tcp.c, + tcp_in.c, init.c, opt.h: rename backlog options with TCP_ prefix, limit the + "backlog" parameter in an u8_t, 0 is interpreted as "smallest queue", add + documentation in the rawapi.txt file. + + 2007-12-31 Kieran Mansley (based on patch from Per-Henrik Lundbolm) + * tcp.c, tcp_in.c, tcp_out.c, tcp.h: Add TCP persist timer + + 2007-12-31 Frédéric Bernon, Luca Ceresoli + * autoip.c, etharp.c: ip_addr.h: Integrate patch #6348: "Broadcast ARP packets + in autoip". The change in etharp_raw could be removed, since all calls to + etharp_raw use ethbroadcast for the "ethdst_addr" parameter. But it could be + wrong in the future. + + 2007-12-30 Frédéric Bernon, Tom Evans + * ip.c: Fix bug #21846 "LwIP doesn't appear to perform any IP Source Address + Filtering" reported by Tom Evans. + + 2007-12-21 Frédéric Bernon, Simon Goldschmidt, Jonathan Larmour + * tcp.h, opt.h, api.h, api_msg.h, tcp.c, tcp_in.c, api_lib.c, api_msg.c, + sockets.c, init.c: task #7252: Implement TCP listen backlog: Warning: raw API + applications have to call 'tcp_accepted(pcb)' in their accept callback to + keep accepting new connections. + + 2007-12-13 Frédéric Bernon + * api_msg.c, err.h, err.c, sockets.c, dns.c, dns.h: replace "enum dns_result" + by err_t type. Add a new err_t code "ERR_INPROGRESS". + + 2007-12-12 Frédéric Bernon + * dns.h, dns.c, opt.h: move DNS options to the "right" place. Most visibles + are the one which have ram usage. + + 2007-12-05 Frédéric Bernon + * netdb.c: add a LWIP_DNS_API_HOSTENT_STORAGE option to decide to use a static + set of variables (=0) or a local one (=1). In this last case, your port should + provide a function "struct hostent* sys_thread_hostent( struct hostent* h)" + which have to do a copy of "h" and return a pointer ont the "per-thread" copy. + + 2007-12-03 Simon Goldschmidt + * ip.c: ip_input: check if a packet is for inp first before checking all other + netifs on netif_list (speeds up packet receiving in most cases) + + 2007-11-30 Simon Goldschmidt + * udp.c, raw.c: task #7497: Sort lists (pcb, netif, ...) for faster access + UDP: move a (connected) pcb selected for input to the front of the list of + pcbs so that it is found faster next time. Same for RAW pcbs that have eaten + a packet. + + 2007-11-28 Simon Goldschmidt + * etharp.c, stats.c, stats.h, opt.h: Introduced ETHARP_STATS + + 2007-11-25 Simon Goldschmidt + * dhcp.c: dhcp_unfold_reply() uses pbuf_copy_partial instead of its own copy + algorithm. + + 2007-11-24 Simon Goldschmidt + * netdb.h, netdb.c, sockets.h/.c: Moved lwip_gethostbyname from sockets.c + to the new file netdb.c; included lwip_getaddrinfo. + + 2007-11-21 Simon Goldschmidt + * tcp.h, opt.h, tcp.c, tcp_in.c: implemented calculating the effective send-mss + based on the MTU of the netif used to send. Enabled by default. Disable by + setting LWIP_CALCULATE_EFF_SEND_MSS to 0. This fixes bug #21492. + + 2007-11-19 Frédéric Bernon + * api_msg.c, dns.h, dns.c: Implement DNS_DOES_NAME_CHECK option (check if name + received match the name query), implement DNS_USES_STATIC_BUF (the place where + copy dns payload to parse the response), return an error if there is no place + for a new query, and fix some minor problems. + + 2007-11-16 Simon Goldschmidt + * new files: ipv4/inet.c, ipv4/inet_chksum.c, ipv6/inet6.c + removed files: core/inet.c, core/inet6.c + Moved inet files into ipv4/ipv6 directory; splitted inet.c/inet.h into + inet and chksum part; changed includes in all lwIP files as appropriate + + 2007-11-16 Simon Goldschmidt + * api.h, api_msg.h, api_lib.c, api_msg.c, socket.h, socket.c: Added sequential + dns resolver function for netconn api (netconn_gethostbyname) and socket api + (gethostbyname/gethostbyname_r). + + 2007-11-15 Jim Pettinato, Frédéric Bernon + * opt.h, init.c, tcpip.c, dhcp.c, dns.h, dns.c: add DNS client for simple name + requests with RAW api interface. Initialization is done in lwip_init() with + build time options. DNS timer is added in tcpip_thread context. DHCP can set + DNS server ip addresses when options are received. You need to set LWIP_DNS=1 + in your lwipopts.h file (LWIP_DNS=0 in opt.h). DNS_DEBUG can be set to get + some traces with LWIP_DEBUGF. Sanity check have been added. There is a "todo" + list with points to improve. + + 2007-11-06 Simon Goldschmidt + * opt.h, mib2.c: Patch #6215: added ifAdminStatus write support (if explicitly + enabled by defining SNMP_SAFE_REQUESTS to 0); added code to check link status + for ifOperStatus if LWIP_NETIF_LINK_CALLBACK is defined. + + 2007-11-06 Simon Goldschmidt + * api.h, api_msg.h and dependent files: Task #7410: Removed the need to include + core header files in api.h (ip/tcp/udp/raw.h) to hide the internal + implementation from netconn api applications. + + 2007-11-03 Frédéric Bernon + * api.h, api_lib.c, api_msg.c, sockets.c, opt.h: add SO_RCVBUF option for UDP & + RAW netconn. You need to set LWIP_SO_RCVBUF=1 in your lwipopts.h (it's disabled + by default). Netconn API users can use the netconn_recv_bufsize macro to access + it. This is a first release which have to be improve for TCP. Note it used the + netconn::recv_avail which need to be more "thread-safe" (note there is already + the problem for FIONREAD with lwip_ioctl/ioctlsocket). + + 2007-11-01 Frédéric Bernon, Marc Chaland + * sockets.h, sockets.c, api.h, api_lib.c, api_msg.h, api_msg.c, tcp.h, tcp_out.c: + Integrate "patch #6250 : MSG_MORE flag for send". MSG_MORE is used at socket api + layer, NETCONN_MORE at netconn api layer, and TCP_WRITE_FLAG_MORE at raw api + layer. This option enable to delayed TCP PUSH flag on multiple "write" calls. + Note that previous "copy" parameter for "write" APIs is now called "apiflags". + + 2007-10-24 Frédéric Bernon + * api.h, api_lib.c, api_msg.c: Add macro API_EVENT in the same spirit than + TCP_EVENT_xxx macros to get a code more readable. It could also help to remove + some code (like we have talk in "patch #5919 : Create compile switch to remove + select code"), but it could be done later. + + 2007-10-08 Simon Goldschmidt + * many files: Changed initialization: many init functions are not needed any + more since we now rely on the compiler initializing global and static + variables to zero! + + 2007-10-06 Simon Goldschmidt + * ip_frag.c, memp.c, mib2.c, ip_frag.h, memp_std.h, opt.h: Changed IP_REASSEMBLY + to enqueue the received pbufs so that multiple packets can be reassembled + simultaneously and no static reassembly buffer is needed. + + 2007-10-05 Simon Goldschmidt + * tcpip.c, etharp.h, etharp.c: moved ethernet_input from tcpip.c to etharp.c so + all netifs (or ports) can use it. + + 2007-10-05 Frédéric Bernon + * netifapi.h, netifapi.c: add function netifapi_netif_set_default. Change the + common function to reduce a little bit the footprint (for all functions using + only the "netif" parameter). + + 2007-10-03 Frédéric Bernon + * netifapi.h, netifapi.c: add functions netifapi_netif_set_up, netifapi_netif_set_down, + netifapi_autoip_start and netifapi_autoip_stop. Use a common function to reduce + a little bit the footprint (for all functions using only the "netif" parameter). + + 2007-09-15 Frédéric Bernon + * udp.h, udp.c, sockets.c: Changes for "#20503 IGMP Improvement". Add IP_MULTICAST_IF + option in socket API, and a new field "multicast_ip" in "struct udp_pcb" (for + netconn and raw API users), only if LWIP_IGMP=1. Add getsockopt processing for + IP_MULTICAST_TTL and IP_MULTICAST_IF. + + 2007-09-10 Frédéric Bernon + * snmp.h, mib2.c: enable to remove SNMP timer (which consumne several cycles + even when it's not necessary). snmp_agent.txt tell to call snmp_inc_sysuptime() + each 10ms (but, it's intrusive if you use sys_timeout feature). Now, you can + decide to call snmp_add_sysuptime(100) each 1000ms (which is bigger "step", but + call to a lower frequency). Or, you can decide to not call snmp_inc_sysuptime() + or snmp_add_sysuptime(), and to define the SNMP_GET_SYSUPTIME(sysuptime) macro. + This one is undefined by default in mib2.c. SNMP_GET_SYSUPTIME is called inside + snmp_get_sysuptime(u32_t *value), and enable to change "sysuptime" value only + when it's queried (any direct call to "sysuptime" is changed by a call to + snmp_get_sysuptime). + + 2007-09-09 Frédéric Bernon, Bill Florac + * igmp.h, igmp.c, netif.h, netif.c, ip.c: To enable to have interfaces with IGMP, + and others without it, there is a new NETIF_FLAG_IGMP flag to set in netif->flags + if you want IGMP on an interface. igmp_stop() is now called inside netif_remove(). + igmp_report_groups() is now called inside netif_set_link_up() (need to have + LWIP_NETIF_LINK_CALLBACK=1) to resend reports once the link is up (avoid to wait + the next query message to receive the matching multicast streams). + + 2007-09-08 Frédéric Bernon + * sockets.c, ip.h, api.h, tcp.h: declare a "struct ip_pcb" which only contains + IP_PCB. Add in the netconn's "pcb" union a "struct ip_pcb *ip;" (no size change). + Use this new field to access to common pcb fields (ttl, tos, so_options, etc...). + Enable to access to these fields with LWIP_TCP=0. + + 2007-09-05 Frédéric Bernon + * udp.c, ipv4/icmp.c, ipv4/ip.c, ipv6/icmp.c, ipv6/ip6.c, ipv4/icmp.h, + ipv6/icmp.h, opt.h: Integrate "task #7272 : LWIP_ICMP option". The new option + LWIP_ICMP enable/disable ICMP module inside the IP stack (enable per default). + Be careful, disabling ICMP make your product non-compliant to RFC1122, but + help to reduce footprint, and to reduce "visibility" on the Internet. + + 2007-09-05 Frédéric Bernon, Bill Florac + * opt.h, sys.h, tcpip.c, slipif.c, ppp.c, sys_arch.txt: Change parameters list + for sys_thread_new (see "task #7252 : Create sys_thread_new_ex()"). Two new + parameters have to be provided: a task name, and a task stack size. For this + one, since it's platform dependant, you could define the best one for you in + your lwipopts.h. For port maintainers, you can just add these new parameters + in your sys_arch.c file, and but it's not mandatory, use them in your OS + specific functions. + + 2007-09-05 Frédéric Bernon + * inet.c, autoip.c, msg_in.c, msg_out.c, init.c: Move some build time checkings + inside init.c for task #7142 "Sanity check user-configurable values". + + 2007-09-04 Frédéric Bernon, Bill Florac + * igmp.h, igmp.c, memp_std.h, memp.c, init.c, opt.h: Replace mem_malloc call by + memp_malloc, and use a new MEMP_NUM_IGMP_GROUP option (see opt.h to define the + value). It will avoid potential fragmentation problems, use a counter to know + how many times a group is used on an netif, and free it when all applications + leave it. MEMP_NUM_IGMP_GROUP got 8 as default value (and init.c got a sanity + check if LWIP_IGMP!=0). + + 2007-09-03 Frédéric Bernon + * igmp.h, igmp.c, sockets.c, api_msg.c: Changes for "#20503 IGMP Improvement". + Initialize igmp_mac_filter to NULL in netif_add (this field should be set in + the netif's "init" function). Use the "imr_interface" field (for socket layer) + and/or the "interface" field (for netconn layer), for join/leave operations. + The igmp_join/leavegroup first parameter change from a netif to an ipaddr. + This field could be a netif's ipaddr, or "any" (same meaning than ip_addr_isany). + + 2007-08-30 Frédéric Bernon + * Add netbuf.h, netbuf.c, Change api.h, api_lib.c: #7249 "Split netbuf functions + from api/api_lib". Now netbuf API is independant of netconn, and can be used + with other API (application based on raw API, or future "socket2" API). Ports + maintainers just have to add src/api/netbuf.c in their makefile/projects. + + 2007-08-30 Frédéric Bernon, Jonathan Larmour + * init.c: Add first version of lwip_sanity_check for task #7142 "Sanity check + user-configurable values". + + 2007-08-29 Frédéric Bernon + * igmp.h, igmp.c, tcpip.c, init.c, netif.c: change igmp_init and add igmp_start. + igmp_start is call inside netif_add. Now, igmp initialization is in the same + spirit than the others modules. Modify some IGMP debug traces. + + 2007-08-29 Frédéric Bernon + * Add init.h, init.c, Change opt.h, tcpip.c: Task #7213 "Add a lwip_init function" + Add lwip_init function to regroup all modules initializations, and to provide + a place to add code for task #7142 "Sanity check user-configurable values". + Ports maintainers should remove direct initializations calls from their code, + and add init.c in their makefiles. Note that lwip_init() function is called + inside tcpip_init, but can also be used by raw api users since all calls are + disabled when matching options are disabled. Also note that their is new options + in opt.h, you should configure in your lwipopts.h (they are enabled per default). + + 2007-08-26 Marc Boucher + * api_msg.c: do_close_internal(): Reset the callbacks and arg (conn) to NULL + since they can under certain circumstances be called with an invalid conn + pointer after the connection has been closed (and conn has been freed). + + 2007-08-25 Frédéric Bernon (Artem Migaev's Patch) + * netif.h, netif.c: Integrate "patch #6163 : Function to check if link layer is up". + Add a netif_is_link_up() function if LWIP_NETIF_LINK_CALLBACK option is set. + + 2007-08-22 Frédéric Bernon + * netif.h, netif.c, opt.h: Rename LWIP_NETIF_CALLBACK in LWIP_NETIF_STATUS_CALLBACK + to be coherent with new LWIP_NETIF_LINK_CALLBACK option before next release. + + 2007-08-22 Frédéric Bernon + * tcpip.h, tcpip.c, ethernetif.c, opt.h: remove options ETHARP_TCPIP_INPUT & + ETHARP_TCPIP_ETHINPUT, now, only "ethinput" code is supported, even if the + name is tcpip_input (we keep the name of 1.2.0 function). + + 2007-08-17 Jared Grubb + * memp_std.h, memp.h, memp.c, mem.c, stats.c: (Task #7136) Centralize mempool + settings into new memp_std.h and optional user file lwippools.h. This adds + more dynamic mempools, and allows the user to create an arbitrary number of + mempools for mem_malloc. + + 2007-08-16 Marc Boucher + * api_msg.c: Initialize newconn->state to NETCONN_NONE in accept_function; + otherwise it was left to NETCONN_CLOSE and sent_tcp() could prematurely + close the connection. + + 2007-08-16 Marc Boucher + * sockets.c: lwip_accept(): check netconn_peer() error return. + + 2007-08-16 Marc Boucher + * mem.c, mem.h: Added mem_calloc(). + + 2007-08-16 Marc Boucher + * tcpip.c, tcpip.h memp.c, memp.h: Added distinct memp (MEMP_TCPIP_MSG_INPKT) + for input packets to prevent floods from consuming all of MEMP_TCPIP_MSG + and starving other message types. + Renamed MEMP_TCPIP_MSG to MEMP_TCPIP_MSG_API + + 2007-08-16 Marc Boucher + * pbuf.c, pbuf.h, etharp.c, tcp_in.c, sockets.c: Split pbuf flags in pbuf + type and flgs (later renamed to flags). + Use enum pbuf_flag as pbuf_type. Renumber PBUF_FLAG_*. + Improved lwip_recvfrom(). TCP push now propagated. + + 2007-08-16 Marc Boucher + * ethernetif.c, contrib/ports/various: ethbroadcast now a shared global + provided by etharp. + + 2007-08-16 Marc Boucher + * ppp_oe.c ppp_oe.h, auth.c chap.c fsm.c lcp.c ppp.c ppp.h, + etharp.c ethernetif.c, etharp.h, opt.h tcpip.h, tcpip.c: + Added PPPoE support and various PPP improvements. + + 2007-07-25 Simon Goldschmidt + * api_lib.c, ip_frag.c, pbuf.c, api.h, pbuf.h: Introduced pbuf_copy_partial, + making netbuf_copy_partial use this function. + + 2007-07-25 Simon Goldschmidt + * tcp_in.c: Fix bug #20506: Slow start / initial congestion window starts with + 2 * mss (instead of 1 * mss previously) to comply with some newer RFCs and + other stacks. + + 2007-07-13 Jared Grubb (integrated by Frédéric Bernon) + * opt.h, netif.h, netif.c, ethernetif.c: Add new configuration option to add + a link callback in the netif struct, and functions to handle it. Be carefull + for port maintainers to add the NETIF_FLAG_LINK_UP flag (like in ethernetif.c) + if you want to be sure to be compatible with future changes... + + 2007-06-30 Frédéric Bernon + * sockets.h, sockets.c: Implement MSG_PEEK flag for recv/recvfrom functions. + + 2007-06-21 Simon Goldschmidt + * etharp.h, etharp.c: Combined etharp_request with etharp_raw for both + LWIP_AUTOIP =0 and =1 to remove redundant code. + + 2007-06-21 Simon Goldschmidt + * mem.c, memp.c, mem.h, memp.h, opt.h: task #6863: Introduced the option + MEM_USE_POOLS to use 4 pools with different sized elements instead of a + heap. This both prevents memory fragmentation and gives a higher speed + at the cost of more memory consumption. Turned off by default. + + 2007-06-21 Simon Goldschmidt + * api_lib.c, api_msg.c, api.h, api_msg.h: Converted the length argument of + netconn_write (and therefore also api_msg_msg.msg.w.len) from u16_t into + int to be able to send a bigger buffer than 64K with one time (mainly + used from lwip_send). + + 2007-06-21 Simon Goldschmidt + * tcp.h, api_msg.c: Moved the nagle algorithm from netconn_write/do_write + into a define (tcp_output_nagle) in tcp.h to provide it to raw api users, too. + + 2007-06-21 Simon Goldschmidt + * api.h, api_lib.c, api_msg.c: Fixed bug #20021: Moved sendbuf-processing in + netconn_write from api_lib.c to api_msg.c to also prevent multiple context- + changes on low memory or empty send-buffer. + + 2007-06-18 Simon Goldschmidt + * etharp.c, etharp.h: Changed etharp to use a defined hardware address length + of 6 to avoid loading netif->hwaddr_len every time (since this file is only + used for ethernet and struct eth_addr already had a defined length of 6). + + 2007-06-17 Simon Goldschmidt + * sockets.c, sockets.h: Implemented socket options SO_NO_CHECK for UDP sockets + to disable UDP checksum generation on transmit. + + 2007-06-13 Frédéric Bernon, Simon Goldschmidt + * debug.h, api_msg.c: change LWIP_ERROR to use it to check errors like invalid + pointers or parameters, and let the possibility to redefined it in cc.h. Use + this macro to check "conn" parameter in api_msg.c functions. + + 2007-06-11 Simon Goldschmidt + * sockets.c, sockets.h: Added UDP lite support for sockets + + 2007-06-10 Simon Goldschmidt + * udp.h, opt.h, api_msg.c, ip.c, udp.c: Included switch LWIP_UDPLITE (enabled + by default) to switch off UDP-Lite support if not needed (reduces udp.c code + size) + + 2007-06-09 Dominik Spies (integrated by Frédéric Bernon) + * autoip.h, autoip.c, dhcp.h, dhcp.c, netif.h, netif.c, etharp.h, etharp.c, opt.h: + AutoIP implementation available for IPv4, with new options LWIP_AUTOIP and + LWIP_DHCP_AUTOIP_COOP if you want to cooperate with DHCP. Some tips to adapt + (see TODO mark in the source code). + + 2007-06-09 Simon Goldschmidt + * etharp.h, etharp.c, ethernetif.c: Modified order of parameters for + etharp_output() to match netif->output so etharp_output() can be used + directly as netif->output to save one function call. + + 2007-06-08 Simon Goldschmidt + * netif.h, ethernetif.c, slipif.c, loopif.c: Added define + NETIF_INIT_SNMP(netif, type, speed) to initialize per-netif snmp variables, + added initialization of those to ethernetif, slipif and loopif. + + 2007-05-18 Simon Goldschmidt + * opt.h, ip_frag.c, ip_frag.h, ip.c: Added option IP_FRAG_USES_STATIC_BUF + (defaulting to off for now) that can be set to 0 to send fragmented + packets by passing PBUF_REFs down the stack. + + 2007-05-23 Frédéric Bernon + * api_lib.c: Implement SO_RCVTIMEO for accept and recv on TCP + connections, such present in patch #5959. + + 2007-05-23 Frédéric Bernon + * api.h, api_lib.c, api_msg.c, sockets.c: group the different NETCONN_UDPxxx + code in only one part... + + 2007-05-18 Simon Goldschmidt + * opt.h, memp.h, memp.c: Added option MEMP_OVERFLOW_CHECK to check for memp + elements to overflow. This is achieved by adding some bytes before and after + each pool element (increasing their size, of course), filling them with a + prominent value and checking them on freeing the element. + Set it to 2 to also check every element in every pool each time memp_malloc() + or memp_free() is called (slower but more helpful). + + 2007-05-10 Simon Goldschmidt + * opt.h, memp.h, memp.c, pbuf.c (see task #6831): use a new memp pool for + PBUF_POOL pbufs instead of the old pool implementation in pbuf.c to reduce + code size. + + 2007-05-11 Frédéric Bernon + * sockets.c, api_lib.c, api_msg.h, api_msg.c, netifapi.h, netifapi.c, tcpip.c: + Include a function pointer instead of a table index in the message to reduce + footprint. Disable some part of lwip_send and lwip_sendto if some options are + not set (LWIP_TCP, LWIP_UDP, LWIP_RAW). + + 2007-05-10 Simon Goldschmidt + * *.h (except netif/ppp/*.h): Included patch #5448: include '#ifdef __cplusplus + \ extern "C" {' in all header files. Now you can write your application using + the lwIP stack in C++ and simply #include the core files. Note I have left + out the netif/ppp/*h header files for now, since I don't know which files are + included by applications and which are for internal use only. + + 2007-05-09 Simon Goldschmidt + * opt.h, *.c/*.h: Included patch #5920: Create define to override C-library + memcpy. 2 Defines are created: MEMCPY() for normal memcpy, SMEMCPY() for + situations where some compilers might inline the copy and save a function + call. Also replaced all calls to memcpy() with calls to (S)MEMCPY(). + + 2007-05-08 Simon Goldschmidt + * mem.h: If MEM_LIBC_MALLOC==1, allow the defines (e.g. mem_malloc() -> malloc()) + to be overriden in case the C-library malloc implementation is not protected + against concurrent access. + + 2007-05-04 Simon Goldschmidt (Atte Kojo) + * etharp.c: Introduced fast one-entry-cache to speed up ARP lookup when sending + multiple packets to the same host. + + 2007-05-04 Frédéric Bernon, Jonathan Larmour + * sockets.c, api.h, api_lib.c, api_msg.h, api_msg.c: Fix bug #19162 "lwip_sento: a possible + to corrupt remote addr/port connection state". Reduce problems "not enought memory" with + netbuf (if we receive lot of datagrams). Improve lwip_sendto (only one exchange between + sockets api and api_msg which run in tcpip_thread context). Add netconn_sento function. + Warning, if you directly access to "fromaddr" & "fromport" field from netbuf struct, + these fields are now renamed "addr" & "port". + + 2007-04-11 Jonathan Larmour + * sys.h, api_lib.c: Provide new sys_mbox_tryfetch function. Require ports to provide new + sys_arch_mbox_tryfetch function to get a message if one is there, otherwise return + with SYS_MBOX_EMPTY. sys_arch_mbox_tryfetch can be implemented as a function-like macro + by the port in sys_arch.h if desired. + + 2007-04-06 Frédéric Bernon, Simon Goldschmidt + * opt.h, tcpip.h, tcpip.c, netifapi.h, netifapi.c: New configuration option LWIP_NETIF_API + allow to use thread-safe functions to add/remove netif in list, and to start/stop dhcp + clients, using new functions from netifapi.h. Disable as default (no port change to do). + + 2007-04-05 Frédéric Bernon + * sockets.c: remplace ENOBUFS errors on alloc_socket by ENFILE to be more BSD compliant. + + 2007-04-04 Simon Goldschmidt + * arch.h, api_msg.c, dhcp.c, msg_in.c, sockets.c: Introduced #define LWIP_UNUSED_ARG(x) + use this for and architecture-independent form to tell the compiler you intentionally + are not using this variable. Can be overriden in cc.h. + + 2007-03-28 Frédéric Bernon + * opt.h, netif.h, dhcp.h, dhcp.c: New configuration option LWIP_NETIF_HOSTNAME allow to + define a hostname in netif struct (this is just a pointer, so, you can use a hardcoded + string, point on one of your's ethernetif field, or alloc a string you will free yourself). + It will be used by DHCP to register a client hostname, but can also be use when you call + snmp_set_sysname. + + 2007-03-28 Frédéric Bernon + * netif.h, netif.c: A new NETIF_FLAG_ETHARP flag is defined in netif.h, to allow to + initialize a network interface's flag with. It tell this interface is an ethernet + device, and we can use ARP with it to do a "gratuitous ARP" (RFC 3220 "IP Mobility + Support for IPv4" section 4.6) when interface is "up" with netif_set_up(). + + 2007-03-26 Frédéric Bernon, Jonathan Larmour + * opt.h, tcpip.c: New configuration option LWIP_ARP allow to disable ARP init at build + time if you only use PPP or SLIP. The default is enable. Note we don't have to call + etharp_init in your port's initilization sequence if you use tcpip.c, because this call + is done in tcpip_init function. + + 2007-03-22 Frédéric Bernon + * stats.h, stats.c, msg_in.c: Stats counters can be change to u32_t if necessary with the + new option LWIP_STATS_LARGE. If you need this option, define LWIP_STATS_LARGE to 1 in + your lwipopts.h. More, unused counters are not defined in the stats structs, and not + display by stats_display(). Note that some options (SYS_STATS and RAW_STATS) are defined + but never used. Fix msg_in.c with the correct #if test for a stat display. + + 2007-03-21 Kieran Mansley + * netif.c, netif.h: Apply patch#4197 with some changes (originator: rireland@hmgsl.com). + Provides callback on netif up/down state change. + + 2007-03-11 Frédéric Bernon, Mace Gael, Steve Reynolds + * sockets.h, sockets.c, api.h, api_lib.c, api_msg.h, api_msg.c, igmp.h, igmp.c, + ip.c, netif.h, tcpip.c, opt.h: + New configuration option LWIP_IGMP to enable IGMP processing. Based on only one + filter per all network interfaces. Declare a new function in netif to enable to + control the MAC filter (to reduce lwIP traffic processing). + + 2007-03-11 Frédéric Bernon + * tcp.h, tcp.c, sockets.c, tcp_out.c, tcp_in.c, opt.h: Keepalive values can + be configured at run time with LWIP_TCP_KEEPALIVE, but don't change this + unless you know what you're doing (default are RFC1122 compliant). Note + that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set in seconds. + + 2007-03-08 Frédéric Bernon + * tcp.h: Keepalive values can be configured at compile time, but don't change + this unless you know what you're doing (default are RFC1122 compliant). + + 2007-03-08 Frédéric Bernon + * sockets.c, api.h, api_lib.c, tcpip.c, sys.h, sys.c, err.c, opt.h: + Implement LWIP_SO_RCVTIMEO configuration option to enable/disable SO_RCVTIMEO + on UDP sockets/netconn. + + 2007-03-08 Simon Goldschmidt + * snmp_msg.h, msg_in.c: SNMP UDP ports can be configured at compile time. + + 2007-03-06 Frédéric Bernon + * api.h, api_lib.c, sockets.h, sockets.c, tcpip.c, sys.h, sys.c, err.h: + Implement SO_RCVTIMEO on UDP sockets/netconn. + + 2007-02-28 Kieran Mansley (based on patch from Simon Goldschmidt) + * api_lib.c, tcpip.c, memp.c, memp.h: make API msg structs allocated + on the stack and remove the API msg type from memp + + 2007-02-26 Jonathan Larmour (based on patch from Simon Goldschmidt) + * sockets.h, sockets.c: Move socket initialization to new + lwip_socket_init() function. + NOTE: this changes the API with ports. Ports will have to be + updated to call lwip_socket_init() now. + + 2007-02-26 Jonathan Larmour (based on patch from Simon Goldschmidt) + * api_lib.c: Use memcpy in netbuf_copy_partial. + + + ++ Bug fixes: + + 2008-03-17 Frédéric Bernon, Ed Kerekes + * igmp.h, igmp.c: Fix bug #22613 "IGMP iphdr problem" (could have + some problems to fill the IP header on some targets, use now the + ip.h macros to do it). + + 2008-03-13 Frédéric Bernon + * sockets.c: Fix bug #22435 "lwip_recvfrom with TCP break;". Using + (lwip_)recvfrom with valid "from" and "fromlen" parameters, on a + TCP connection caused a crash. Note that using (lwip_)recvfrom + like this is a bit slow and that using (lwip)getpeername is the + good lwip way to do it (so, using recv is faster on tcp sockets). + + 2008-03-12 Frédéric Bernon, Jonathan Larmour + * api_msg.c, contrib/apps/ping.c: Fix bug #22530 "api_msg.c's + recv_raw() does not consume data", and the ping sample (with + LWIP_SOCKET=1, the code did the wrong supposition that lwip_recvfrom + returned the IP payload, without the IP header). + + 2008-03-04 Jonathan Larmour + * mem.c, stats.c, mem.h: apply patch #6414 to avoid compiler errors + and/or warnings on some systems where mem_size_t and size_t differ. + * pbuf.c, ppp.c: Fix warnings on some systems with mem_malloc. + + 2008-03-04 Kieran Mansley (contributions by others) + * Numerous small compiler error/warning fixes from contributions to + mailing list after 1.3.0 release candidate made. + + 2008-01-25 Cui hengbin (integrated by Frédéric Bernon) + * dns.c: Fix bug #22108 "DNS problem" caused by unaligned structures. + + 2008-01-15 Kieran Mansley + * tcp_out.c: BUG20511. Modify persist timer to start when we are + prevented from sending by a small send window, not just a zero + send window. + + 2008-01-09 Jonathan Larmour + * opt.h, ip.c: Rename IP_OPTIONS define to IP_OPTIONS_ALLOWED to avoid + conflict with Linux system headers. + + 2008-01-06 Jonathan Larmour + * dhcp.c: fix bug #19927: "DHCP NACK problem" by clearing any existing set IP + address entirely on receiving a DHCPNAK, and restarting discovery. + + 2007-12-21 Simon Goldschmidt + * sys.h, api_lib.c, api_msg.c, sockets.c: fix bug #21698: "netconn->recv_avail + is not protected" by using new macros for interlocked access to modify/test + netconn->recv_avail. + + 2007-12-20 Kieran Mansley (based on patch from Oleg Tyshev) + * tcp_in.c: fix bug# 21535 (nrtx not reset correctly in SYN_SENT state) + + 2007-12-20 Kieran Mansley (based on patch from Per-Henrik Lundbolm) + * tcp.c, tcp_in.c, tcp_out.c, tcp.h: fix bug #20199 (better handling + of silly window avoidance and prevent lwIP from shrinking the window) + + 2007-12-04 Simon Goldschmidt + * tcp.c, tcp_in.c: fix bug #21699 (segment leak in ooseq processing when last + data packet was lost): add assert that all segment lists are empty in + tcp_pcb_remove before setting pcb to CLOSED state; don't directly set CLOSED + state from LAST_ACK in tcp_process + + 2007-12-02 Simon Goldschmidt + * sockets.h: fix bug #21654: exclude definition of struct timeval from #ifndef FD_SET + If including for system-struct timeval, LWIP_TIMEVAL_PRIVATE now + has to be set to 0 in lwipopts.h + + 2007-12-02 Simon Goldschmidt + * api_msg.c, api_lib.c: fix bug #21656 (recvmbox problem in netconn API): always + allocate a recvmbox in netconn_new_with_proto_and_callback. For a tcp-listen + netconn, this recvmbox is later freed and a new mbox is allocated for acceptmbox. + This is a fix for thread-safety and allocates all items needed for a netconn + when the netconn is created. + + 2007-11-30 Simon Goldschmidt + * udp.c: first attempt to fix bug #21655 (DHCP doesn't work reliably with multiple + netifs): if LWIP_DHCP is enabled, UDP packets to DHCP_CLIENT_PORT are passed + to netif->dhcp->pcb only (if that exists) and not to any other pcb for the same + port (only solution to let UDP pcbs 'bind' to a netif instead of an IP address) + + 2007-11-27 Simon Goldschmidt + * ip.c: fixed bug #21643 (udp_send/raw_send don't fail if netif is down) by + letting ip_route only use netifs that are up. + + 2007-11-27 Simon Goldschmidt + * err.h, api_lib.c, api_msg.c, sockets.c: Changed error handling: ERR_MEM, ERR_BUF + and ERR_RTE are seen as non-fatal, all other errors are fatal. netconns and + sockets block most operations once they have seen a fatal error. + + 2007-11-27 Simon Goldschmidt + * udp.h, udp.c, dhcp.c: Implemented new function udp_sendto_if which takes the + netif to send as an argument (to be able to send on netifs that are down). + + 2007-11-26 Simon Goldschmidt + * tcp_in.c: Fixed bug #21582: pcb->acked accounting can be wrong when ACKs + arrive out-of-order + + 2007-11-21 Simon Goldschmidt + * tcp.h, tcp_out.c, api_msg.c: Fixed bug #20287: tcp_output_nagle sends too early + Fixed the nagle algorithm; nagle now also works for all raw API applications + and has to be explicitly disabled with 'tcp_pcb->flags |= TF_NODELAY' + + 2007-11-12 Frédéric Bernon + * sockets.c, api.h, api_lib.c, api_msg.h, api_msg.c: Fixed bug #20900. Now, most + of the netconn_peer and netconn_addr processing is done inside tcpip_thread + context in do_getaddr. + + 2007-11-10 Simon Goldschmidt + * etharp.c: Fixed bug: assert fired when MEMP_ARP_QUEUE was empty (which can + happen any time). Now the packet simply isn't enqueued when out of memory. + + 2007-11-01 Simon Goldschmidt + * tcp.c, tcp_in.c: Fixed bug #21494: The send mss (pcb->mss) is set to 536 (or + TCP_MSS if that is smaller) as long as no MSS option is received from the + remote host. + + 2007-11-01 Simon Goldschmidt + * tcp.h, tcp.c, tcp_in.c: Fixed bug #21491: The MSS option sent (with SYN) + is now based on TCP_MSS instead of pcb->mss (on passive open now effectively + sending our configured TCP_MSS instead of the one received). + + 2007-11-01 Simon Goldschmidt + * tcp_in.c: Fixed bug #21181: On active open, the initial congestion window was + calculated based on the configured TCP_MSS, not on the MSS option received + with SYN+ACK. + + 2007-10-09 Simon Goldschmidt + * udp.c, inet.c, inet.h: Fixed UDPLite: send: Checksum was always generated too + short and also was generated wrong if checksum coverage != tot_len; + receive: checksum was calculated wrong if checksum coverage != tot_len + + 2007-10-08 Simon Goldschmidt + * mem.c: lfree was not updated in mem_realloc! + + 2007-10-07 Frédéric Bernon + * sockets.c, api.h, api_lib.c: First step to fix "bug #20900 : Potential + crash error problem with netconn_peer & netconn_addr". VERY IMPORTANT: + this change cause an API breakage for netconn_addr, since a parameter + type change. Any compiler should cause an error without any changes in + yours netconn_peer calls (so, it can't be a "silent change"). It also + reduce a little bit the footprint for socket layer (lwip_getpeername & + lwip_getsockname use now a common lwip_getaddrname function since + netconn_peer & netconn_addr have the same parameters). + + 2007-09-20 Simon Goldschmidt + * tcp.c: Fixed bug #21080 (tcp_bind without check pcbs in TIME_WAIT state) + by checking tcp_tw_pcbs also + + 2007-09-19 Simon Goldschmidt + * icmp.c: Fixed bug #21107 (didn't reset IP TTL in ICMP echo replies) + + 2007-09-15 Mike Kleshov + * mem.c: Fixed bug #21077 (inaccuracy in calculation of lwip_stat.mem.used) + + 2007-09-06 Frédéric Bernon + * several-files: replace some #include "arch/cc.h" by "lwip/arch.h", or simply remove + it as long as "lwip/opt.h" is included before (this one include "lwip/debug.h" which + already include "lwip/arch.h"). Like that, default defines are provided by "lwip/arch.h" + if they are not defined in cc.h, in the same spirit than "lwip/opt.h" for lwipopts.h. + + 2007-08-30 Frédéric Bernon + * igmp.h, igmp.c: Some changes to remove some redundant code, add some traces, + and fix some coding style. + + 2007-08-28 Frédéric Bernon + * tcpip.c: Fix TCPIP_MSG_INPKT processing: now, tcpip_input can be used for any + kind of packets. These packets are considered like Ethernet packets (payload + pointing to ethhdr) if the netif got the NETIF_FLAG_ETHARP flag. Else, packets + are considered like IP packets (payload pointing to iphdr). + + 2007-08-27 Frédéric Bernon + * api.h, api_lib.c, api_msg.c: First fix for "bug #20900 : Potential crash error + problem with netconn_peer & netconn_addr". Introduce NETCONN_LISTEN netconn_state + and remove obsolete ones (NETCONN_RECV & NETCONN_ACCEPT). + + 2007-08-24 Kieran Mansley + * inet.c Modify (acc >> 16) test to ((acc >> 16) != 0) to help buggy + compiler (Paradigm C++) + + 2007-08-09 Frédéric Bernon, Bill Florac + * stats.h, stats.c, igmp.h, igmp.c, opt.h: Fix for bug #20503 : IGMP Improvement. + Introduce IGMP_STATS to centralize statistics management. + + 2007-08-09 Frédéric Bernon, Bill Florac + * udp.c: Fix for bug #20503 : IGMP Improvement. Enable to receive a multicast + packet on a udp pcb binded on an netif's IP address, and not on "any". + + 2007-08-09 Frédéric Bernon, Bill Florac + * igmp.h, igmp.c, ip.c: Fix minor changes from bug #20503 : IGMP Improvement. + This is mainly on using lookup/lookfor, and some coding styles... + + 2007-07-26 Frédéric Bernon (and "thedoctor") + * igmp.c: Fix bug #20595 to accept IGMPv3 "Query" messages. + + 2007-07-25 Simon Goldschmidt + * api_msg.c, tcp.c: Another fix for bug #20021: by not returning an error if + tcp_output fails in tcp_close, the code in do_close_internal gets simpler + (tcp_output is called again later from tcp timers). + + 2007-07-25 Simon Goldschmidt + * ip_frag.c: Fixed bug #20429: use the new pbuf_copy_partial instead of the old + copy_from_pbuf, which illegally modified the given pbuf. + + 2007-07-25 Simon Goldschmidt + * tcp_out.c: tcp_enqueue: pcb->snd_queuelen didn't work for chaine PBUF_RAMs: + changed snd_queuelen++ to snd_queuelen += pbuf_clen(p). + + 2007-07-24 Simon Goldschmidt + * api_msg.c, tcp.c: Fix bug #20480: Check the pcb passed to tcp_listen() for the + correct state (must be CLOSED). + + 2007-07-13 Thomas Taranowski (commited by Jared Grubb) + * memp.c: Fix bug #20478: memp_malloc returned NULL+MEMP_SIZE on failed + allocation. It now returns NULL. + + 2007-07-13 Frédéric Bernon + * api_msg.c: Fix bug #20318: api_msg "recv" callbacks don't call pbuf_free in + all error cases. + + 2007-07-13 Frédéric Bernon + * api_msg.c: Fix bug #20315: possible memory leak problem if tcp_listen failed, + because current code doesn't follow rawapi.txt documentation. + + 2007-07-13 Kieran Mansley + * src/core/tcp_in.c Apply patch#5741 from Oleg Tyshev to fix bug in + out of sequence processing of received packets + + 2007-07-03 Simon Goldschmidt + * nearly-all-files: Added assertions where PBUF_RAM pbufs are used and an + assumption is made that this pbuf is in one piece (i.e. not chained). These + assumptions clash with the possibility of converting to fully pool-based + pbuf implementations, where PBUF_RAM pbufs might be chained. + + 2007-07-03 Simon Goldschmidt + * api.h, api_lib.c, api_msg.c: Final fix for bug #20021 and some other problems + when closing tcp netconns: removed conn->sem, less context switches when + closing, both netconn_close and netconn_delete should safely close tcp + connections. + + 2007-07-02 Simon Goldschmidt + * ipv4/ip.h, ipv6/ip.h, opt.h, netif.h, etharp.h, ipv4/ip.c, netif.c, raw.c, + tcp_out.c, udp.c, etharp.c: Added option LWIP_NETIF_HWADDRHINT (default=off) + to cache ARP table indices with each pcb instead of single-entry cache for + the complete stack. + + 2007-07-02 Simon Goldschmidt + * tcp.h, tcp.c, tcp_in.c, tcp_out.c: Added some ASSERTS and casts to prevent + warnings when assigning to smaller types. + + 2007-06-28 Simon Goldschmidt + * tcp_out.c: Added check to prevent tcp_pcb->snd_queuelen from overflowing. + + 2007-06-28 Simon Goldschmidt + * tcp.h: Fixed bug #20287: Fixed nagle algorithm (sending was done too early if + a segment contained chained pbufs) + + 2007-06-28 Frédéric Bernon + * autoip.c: replace most of rand() calls by a macro LWIP_AUTOIP_RAND which compute + a "pseudo-random" value based on netif's MAC and some autoip fields. It's always + possible to define this macro in your own lwipopts.h to always use C library's + rand(). Note that autoip_create_rand_addr doesn't use this macro. + + 2007-06-28 Frédéric Bernon + * netifapi.h, netifapi.c, tcpip.h, tcpip.c: Update code to handle the option + LWIP_TCPIP_CORE_LOCKING, and do some changes to be coherent with last modifications + in api_lib/api_msg (use pointers and not type with table, etc...) + + 2007-06-26 Simon Goldschmidt + * udp.h: Fixed bug #20259: struct udp_hdr was lacking the packin defines. + + 2007-06-25 Simon Goldschmidt + * udp.c: Fixed bug #20253: icmp_dest_unreach was called with a wrong p->payload + for udp packets with no matching pcb. + + 2007-06-25 Simon Goldschmidt + * udp.c: Fixed bug #20220: UDP PCB search in udp_input(): a non-local match + could get udp input packets if the remote side matched. + + 2007-06-13 Simon Goldschmidt + * netif.c: Fixed bug #20180 (TCP pcbs listening on IP_ADDR_ANY could get + changed in netif_set_ipaddr if previous netif->ip_addr.addr was 0. + + 2007-06-13 Simon Goldschmidt + * api_msg.c: pcb_new sets conn->err if protocol is not implemented + -> netconn_new_..() does not allocate a new connection for unsupported + protocols. + + 2007-06-13 Frédéric Bernon, Simon Goldschmidt + * api_lib.c: change return expression in netconn_addr and netconn_peer, because + conn->err was reset to ERR_OK without any reasons (and error was lost)... + + 2007-06-13 Frédéric Bernon, Matthias Weisser + * opt.h, mem.h, mem.c, memp.c, pbuf.c, ip_frag.c, vj.c: Fix bug #20162. Rename + MEM_ALIGN in LWIP_MEM_ALIGN and MEM_ALIGN_SIZE in LWIP_MEM_ALIGN_SIZE to avoid + some macro names collision with some OS macros. + + 2007-06-11 Simon Goldschmidt + * udp.c: UDP Lite: corrected the use of chksum_len (based on RFC3828: if it's 0, + create checksum over the complete packet. On RX, if it's < 8 (and not 0), + discard the packet. Also removed the duplicate 'udphdr->chksum = 0' for both + UDP & UDP Lite. + + 2007-06-11 Srinivas Gollakota & Oleg Tyshev + * tcp_out.c: Fix for bug #20075 : "A problem with keep-alive timer and TCP flags" + where TCP flags wasn't initialized in tcp_keepalive. + + 2007-06-03 Simon Goldschmidt + * udp.c: udp_input(): Input pbuf was not freed if pcb had no recv function + registered, p->payload was modified without modifying p->len if sending + icmp_dest_unreach() (had no negative effect but was definitively wrong). + + 2007-06-03 Simon Goldschmidt + * icmp.c: Corrected bug #19937: For responding to an icmp echo request, icmp + re-used the input pbuf even if that didn't have enough space to include the + link headers. Now the space is tested and a new pbuf is allocated for the + echo response packet if the echo request pbuf isn't big enough. + + 2007-06-01 Simon Goldschmidt + * sockets.c: Checked in patch #5914: Moved sockopt processing into tcpip_thread. + + 2007-05-23 Frédéric Bernon + * api_lib.c, sockets.c: Fixed bug #5958 for netconn_listen (acceptmbox only + allocated by do_listen if success) and netconn_accept errors handling. In + most of api_lib functions, we replace some errors checkings like "if (conn==NULL)" + by ASSERT, except for netconn_delete. + + 2007-05-23 Frédéric Bernon + * api_lib.c: Fixed bug #5957 "Safe-thread problem inside netconn_recv" to return + an error code if it's impossible to fetch a pbuf on a TCP connection (and not + directly close the recvmbox). + + 2007-05-22 Simon Goldschmidt + * tcp.c: Fixed bug #1895 (tcp_bind not correct) by introducing a list of + bound but unconnected (and non-listening) tcp_pcbs. + + 2007-05-22 Frédéric Bernon + * sys.h, sys.c, api_lib.c, tcpip.c: remove sys_mbox_fetch_timeout() (was only + used for LWIP_SO_RCVTIMEO option) and use sys_arch_mbox_fetch() instead of + sys_mbox_fetch() in api files. Now, users SHOULD NOT use internal lwIP features + like "sys_timeout" in their application threads. + + 2007-05-22 Frédéric Bernon + * api.h, api_lib.c, api_msg.h, api_msg.c: change the struct api_msg_msg to see + which parameters are used by which do_xxx function, and to avoid "misusing" + parameters (patch #5938). + + 2007-05-22 Simon Goldschmidt + * api_lib.c, api_msg.c, raw.c, api.h, api_msg.h, raw.h: Included patch #5938: + changed raw_pcb.protocol from u16_t to u8_t since for IPv4 and IPv6, proto + is only 8 bits wide. This affects the api, as there, the protocol was + u16_t, too. + + 2007-05-18 Simon Goldschmidt + * memp.c: addition to patch #5913: smaller pointer was returned but + memp_memory was the same size -> did not save memory. + + 2007-05-16 Simon Goldschmidt + * loopif.c, slipif.c: Fix bug #19729: free pbuf if netif->input() returns + != ERR_OK. + + 2007-05-16 Simon Goldschmidt + * api_msg.c, udp.c: If a udp_pcb has a local_ip set, check if it is the same + as the one of the netif used for sending to prevent sending from old + addresses after a netif address gets changed (partly fixes bug #3168). + + 2007-05-16 Frédéric Bernon + * tcpip.c, igmp.h, igmp.c: Fixed bug "#19800 : IGMP: igmp_tick() will not work + with NO_SYS=1". Note that igmp_init is always in tcpip_thread (and not in + tcpip_init) because we have to be sure that network interfaces are already + added (mac filter is updated only in igmp_init for the moment). + + 2007-05-16 Simon Goldschmidt + * mem.c, memp.c: Removed semaphores from memp, changed sys_sem_wait calls + into sys_arch_sem_wait calls to prevent timers from running while waiting + for the heap. This fixes bug #19167. + + 2007-05-13 Simon Goldschmidt + * tcp.h, sockets.h, sockets.c: Fixed bug from patch #5865 by moving the defines + for socket options (lwip_set/-getsockopt) used with level IPPROTO_TCP from + tcp.h to sockets.h. + + 2007-05-07 Simon Goldschmidt + * mem.c: Another attempt to fix bug #17922. + + 2007-05-04 Simon Goldschmidt + * pbuf.c, pbuf.h, etharp.c: Further update to ARP queueing: Changed pbuf_copy() + implementation so that it can be reused (don't allocate the target + pbuf inside pbuf_copy()). + + 2007-05-04 Simon Goldschmidt + * memp.c: checked in patch #5913: in memp_malloc() we can return memp as mem + to save a little RAM (next pointer of memp is not used while not in pool). + + 2007-05-03 "maq" + * sockets.c: Fix ioctl FIONREAD when some data remains from last recv. + (patch #3574). + + 2007-04-23 Simon Goldschmidt + * loopif.c, loopif.h, opt.h, src/netif/FILES: fix bug #2595: "loopif results + in NULL reference for incoming TCP packets". Loopif has to be configured + (using LWIP_LOOPIF_MULTITHREADING) to directly call netif->input() + (multithreading environments, e.g. netif->input() = tcpip_input()) or + putting packets on a list that is fed to the stack by calling loopif_poll() + (single-thread / NO_SYS / polling environment where e.g. + netif->input() = ip_input). + + 2007-04-17 Jonathan Larmour + * pbuf.c: Use s32_t in pbuf_realloc(), as an s16_t can't reliably hold + the difference between two u16_t's. + * sockets.h: FD_SETSIZE needs to match number of sockets, which is + MEMP_NUM_NETCONN in sockets.c right now. + + 2007-04-12 Jonathan Larmour + * icmp.c: Reset IP header TTL in ICMP ECHO responses (bug #19580). + + 2007-04-12 Kieran Mansley + * tcp.c, tcp_in.c, tcp_out.c, tcp.h: Modify way the retransmission + timer is reset to fix bug#19434, with help from Oleg Tyshev. + + 2007-04-11 Simon Goldschmidt + * etharp.c, pbuf.c, pbuf.h: 3rd fix for bug #11400 (arp-queuing): More pbufs than + previously thought need to be copied (everything but PBUF_ROM!). Cleaned up + pbuf.c: removed functions no needed any more (by etharp). + + 2007-04-11 Kieran Mansley + * inet.c, ip_addr.h, sockets.h, sys.h, tcp.h: Apply patch #5745: Fix + "Constant is long" warnings with 16bit compilers. Contributed by + avatar@mmlab.cse.yzu.edu.tw + + 2007-04-05 Frédéric Bernon, Jonathan Larmour + * api_msg.c: Fix bug #16830: "err_tcp() posts to connection mailbox when no pend on + the mailbox is active". Now, the post is only done during a connect, and do_send, + do_write and do_join_leave_group don't do anything if a previous error was signaled. + + 2007-04-03 Frédéric Bernon + * ip.c: Don't set the IP_DF ("Don't fragment") flag in the IP header in IP output + packets. See patch #5834. + + 2007-03-30 Frédéric Bernon + * api_msg.c: add a "pcb_new" helper function to avoid redundant code, and to add + missing pcb allocations checking (in do_bind, and for each raw_new). Fix style. + + 2007-03-30 Frédéric Bernon + * most of files: prefix all debug.h define with "LWIP_" to avoid any conflict with + others environment defines (these were too "generic"). + + 2007-03-28 Frédéric Bernon + * api.h, api_lib.c, sockets.c: netbuf_ref doesn't check its internal pbuf_alloc call + result and can cause a crash. lwip_send now check netbuf_ref result. + + 2007-03-28 Simon Goldschmidt + * sockets.c Remove "#include " from sockets.c to avoid multiple + definition of macros (in errno.h and lwip/arch.h) if LWIP_PROVIDE_ERRNO is + defined. This is the way it should have been already (looking at + doc/sys_arch.txt) + + 2007-03-28 Kieran Mansley + * opt.h Change default PBUF_POOL_BUFSIZE (again) to accomodate default MSS + + IP and TCP headers *and* physical link headers + + 2007-03-26 Frédéric Bernon (based on patch from Dmitry Potapov) + * api_lib.c: patch for netconn_write(), fixes a possible race condition which cause + to send some garbage. It is not a definitive solution, but the patch does solve + the problem for most cases. + + 2007-03-22 Frédéric Bernon + * api_msg.h, api_msg.c: Remove obsolete API_MSG_ACCEPT and do_accept (never used). + + 2007-03-22 Frédéric Bernon + * api_lib.c: somes resources couldn't be freed if there was errors during + netconn_new_with_proto_and_callback. + + 2007-03-22 Frédéric Bernon + * ethernetif.c: update netif->input calls to check return value. In older ports, + it's a good idea to upgrade them, even if before, there could be another problem + (access to an uninitialized mailbox). + + 2007-03-21 Simon Goldschmidt + * sockets.c: fixed bug #5067 (essentialy a signed/unsigned warning fixed + by casting to unsigned). + + 2007-03-21 Frédéric Bernon + * api_lib.c, api_msg.c, tcpip.c: integrate sys_mbox_fetch(conn->mbox, NULL) calls from + api_lib.c to tcpip.c's tcpip_apimsg(). Now, use a local variable and not a + dynamic one from memp to send tcpip_msg to tcpip_thread in a synchrone call. + Free tcpip_msg from tcpip_apimsg is not done in tcpip_thread. This give a + faster and more reliable communication between api_lib and tcpip. + + 2007-03-21 Frédéric Bernon + * opt.h: Add LWIP_NETIF_CALLBACK (to avoid compiler warning) and set it to 0. + + 2007-03-21 Frédéric Bernon + * api_msg.c, igmp.c, igmp.h: Fix C++ style comments + + 2007-03-21 Kieran Mansley + * opt.h Change default PBUF_POOL_BUFSIZE to accomodate default MSS + + IP and TCP headers + + 2007-03-21 Kieran Mansley + * Fix all uses of pbuf_header to check the return value. In some + cases just assert if it fails as I'm not sure how to fix them, but + this is no worse than before when they would carry on regardless + of the failure. + + 2007-03-21 Kieran Mansley + * sockets.c, igmp.c, igmp.h, memp.h: Fix C++ style comments and + comment out missing header include in icmp.c + + 2007-03-20 Frédéric Bernon + * memp.h, stats.c: Fix stats_display function where memp_names table wasn't + synchronized with memp.h. + + 2007-03-20 Frédéric Bernon + * tcpip.c: Initialize tcpip's mbox, and verify if initialized in tcpip_input, + tcpip_ethinput, tcpip_callback, tcpip_apimsg, to fix a init problem with + network interfaces. Also fix a compiler warning. + + 2007-03-20 Kieran Mansley + * udp.c: Only try and use pbuf_header() to make space for headers if + not a ROM or REF pbuf. + + 2007-03-19 Frédéric Bernon + * api_msg.h, api_msg.c, tcpip.h, tcpip.c: Add return types to tcpip_apimsg() + and api_msg_post(). + + 2007-03-19 Frédéric Bernon + * Remove unimplemented "memp_realloc" function from memp.h. + + 2007-03-11 Simon Goldschmidt + * pbuf.c: checked in patch #5796: pbuf_alloc: len field claculation caused + memory corruption. + + 2007-03-11 Simon Goldschmidt (based on patch from Dmitry Potapov) + * api_lib.c, sockets.c, api.h, api_msg.h, sockets.h: Fixed bug #19251 + (missing `const' qualifier in socket functions), to get more compatible to + standard POSIX sockets. + + 2007-03-11 Frédéric Bernon (based on patch from Dmitry Potapov) + * sockets.c: Add asserts inside bind, connect and sendto to check input + parameters. Remove excessive set_errno() calls after get_socket(), because + errno is set inside of get_socket(). Move last sock_set_errno() inside + lwip_close. + + 2007-03-09 Simon Goldschmidt + * memp.c: Fixed bug #11400: New etharp queueing introduced bug: memp_memory + was allocated too small. + + 2007-03-06 Simon Goldschmidt + * tcpip.c: Initialize dhcp timers in tcpip_thread (if LWIP_DHCP) to protect + the stack from concurrent access. + + 2007-03-06 Frédéric Bernon, Dmitry Potapov + * tcpip.c, ip_frag.c, ethernetif.c: Fix some build problems, and a redundancy + call to "lwip_stats.link.recv++;" in low_level_input() & ethernetif_input(). + + 2007-03-06 Simon Goldschmidt + * ip_frag.c, ip_frag.h: Reduce code size: don't include code in those files + if IP_FRAG == 0 and IP_REASSEMBLY == 0 + + 2007-03-06 Frédéric Bernon, Simon Goldschmidt + * opt.h, ip_frag.h, tcpip.h, tcpip.c, ethernetif.c: add new configuration + option named ETHARP_TCPIP_ETHINPUT, which enable the new tcpip_ethinput. + Allow to do ARP processing for incoming packets inside tcpip_thread + (protecting ARP layer against concurrent access). You can also disable + old code using tcp_input with new define ETHARP_TCPIP_INPUT set to 0. + Older ports have to use tcpip_ethinput. + + 2007-03-06 Simon Goldschmidt (based on patch from Dmitry Potapov) + * err.h, err.c: fixed compiler warning "initialization dircards qualifiers + from pointer target type" + + 2007-03-05 Frédéric Bernon + * opt.h, sockets.h: add new configuration options (LWIP_POSIX_SOCKETS_IO_NAMES, + ETHARP_TRUST_IP_MAC, review SO_REUSE) + + 2007-03-04 Frédéric Bernon + * api_msg.c: Remove some compiler warnings : parameter "pcb" was never + referenced. + + 2007-03-04 Frédéric Bernon + * api_lib.c: Fix "[patch #5764] api_lib.c cleanup: after patch #5687" (from + Dmitry Potapov). + The api_msg struct stay on the stack (not moved to netconn struct). + + 2007-03-04 Simon Goldschmidt (based on patch from Dmitry Potapov) + * pbuf.c: Fix BUG#19168 - pbuf_free can cause deadlock (if + SYS_LIGHTWEIGHT_PROT=1 & freeing PBUF_RAM when mem_sem is not available) + Also fixed cast warning in pbuf_alloc() + + 2007-03-04 Simon Goldschmidt + * etharp.c, etharp.h, memp.c, memp.h, opt.h: Fix BUG#11400 - don't corrupt + existing pbuf chain when enqueuing multiple pbufs to a pending ARP request + + 2007-03-03 Frédéric Bernon + * udp.c: remove obsolete line "static struct udp_pcb *pcb_cache = NULL;" + It is static, and never used in udp.c except udp_init(). + + 2007-03-02 Simon Goldschmidt + * tcpip.c: Moved call to ip_init(), udp_init() and tcp_init() from + tcpip_thread() to tcpip_init(). This way, raw API connections can be + initialized before tcpip_thread is running (e.g. before OS is started) + + 2007-03-02 Frédéric Bernon + * rawapi.txt: Fix documentation mismatch with etharp.h about etharp_tmr's call + interval. + + 2007-02-28 Kieran Mansley + * pbuf.c: Fix BUG#17645 - ensure pbuf payload pointer is not moved + outside the region of the pbuf by pbuf_header() + + 2007-02-28 Kieran Mansley + * sockets.c: Fix BUG#19161 - ensure milliseconds timeout is non-zero + when supplied timeout is also non-zero + +(STABLE-1.2.0) + + 2006-12-05 Leon Woestenberg + * CHANGELOG: Mention STABLE-1.2.0 release. + + ++ New features: + + 2006-12-01 Christiaan Simons + * mem.h, opt.h: Added MEM_LIBC_MALLOC option. + Note this is a workaround. Currently I have no other options left. + + 2006-10-26 Christiaan Simons (accepted patch by Jonathan Larmour) + * ipv4/ip_frag.c: rename MAX_MTU to IP_FRAG_MAX_MTU and move define + to include/lwip/opt.h. + * ipv4/lwip/ip_frag.h: Remove unused IP_REASS_INTERVAL. + Move IP_REASS_MAXAGE and IP_REASS_BUFSIZE to include/lwip/opt.h. + * opt.h: Add above new options. + + 2006-08-18 Christiaan Simons + * tcp_{in,out}.c: added SNMP counters. + * ipv4/ip.c: added SNMP counters. + * ipv4/ip_frag.c: added SNMP counters. + + 2006-08-08 Christiaan Simons + * etharp.{c,h}: added etharp_find_addr() to read + (stable) ethernet/IP address pair from ARP table + + 2006-07-14 Christiaan Simons + * mib_structs.c: added + * include/lwip/snmp_structs.h: added + * netif.{c,h}, netif/ethernetif.c: added SNMP statistics to netif struct + + 2006-07-06 Christiaan Simons + * snmp/asn1_{enc,dec}.c added + * snmp/mib2.c added + * snmp/msg_{in,out}.c added + * include/lwip/snmp_asn1.h added + * include/lwip/snmp_msg.h added + * doc/snmp_agent.txt added + + 2006-03-29 Christiaan Simons + * inet.c, inet.h: Added platform byteswap support. + Added LWIP_PLATFORM_BYTESWAP define (defaults to 0) and + optional LWIP_PLATFORM_HTONS(), LWIP_PLATFORM_HTONL() macros. + + ++ Bug fixes: + + 2006-11-30 Christiaan Simons + * dhcp.c: Fixed false triggers of request_timeout. + + 2006-11-28 Christiaan Simons + * netif.c: In netif_add() fixed missing clear of ip_addr, netmask, gw and flags. + + 2006-10-11 Christiaan Simons + * api_lib.c etharp.c, ip.c, memp.c, stats.c, sys.{c,h} tcp.h: + Partially accepted patch #5449 for ANSI C compatibility / build fixes. + * ipv4/lwip/ip.h ipv6/lwip/ip.h: Corrected UDP-Lite protocol + identifier from 170 to 136 (bug #17574). + + 2006-10-10 Christiaan Simons + * api_msg.c: Fixed Nagle algorithm as reported by Bob Grice. + + 2006-08-17 Christiaan Simons + * udp.c: Fixed bug #17200, added check for broadcast + destinations for PCBs bound to a unicast address. + + 2006-08-07 Christiaan Simons + * api_msg.c: Flushing TCP output in do_close() (bug #15926). + + 2006-06-27 Christiaan Simons + * api_msg.c: Applied patch for cold case (bug #11135). + In accept_function() ensure newconn->callback is always initialized. + + 2006-06-15 Christiaan Simons + * mem.h: added MEM_SIZE_F alias to fix an ancient cold case (bug #1748), + facilitate printing of mem_size_t and u16_t statistics. + + 2006-06-14 Christiaan Simons + * api_msg.c: Applied patch #5146 to handle allocation failures + in accept() by Kevin Lawson. + + 2006-05-26 Christiaan Simons + * api_lib.c: Removed conn->sem creation and destruction + from netconn_write() and added sys_sem_new to netconn_new_*. + +(STABLE-1_1_1) + + 2006-03-03 Christiaan Simons + * ipv4/ip_frag.c: Added bound-checking assertions on ip_reassbitmap + access and added pbuf_alloc() return value checks. + + 2006-01-01 Leon Woestenberg + * tcp_{in,out}.c, tcp_out.c: Removed 'even sndbuf' fix in TCP, which is + now handled by the checksum routine properly. + + 2006-02-27 Leon Woestenberg + * pbuf.c: Fix alignment; pbuf_init() would not work unless + pbuf_pool_memory[] was properly aligned. (Patch by Curt McDowell.) + + 2005-12-20 Leon Woestenberg + * tcp.c: Remove PCBs which stay in LAST_ACK state too long. Patch + submitted by Mitrani Hiroshi. + + 2005-12-15 Christiaan Simons + * inet.c: Disabled the added summing routine to preserve code space. + + 2005-12-14 Leon Woestenberg + * tcp_in.c: Duplicate FIN ACK race condition fix by Kelvin Lawson. + Added Curt McDowell's optimized checksumming routine for future + inclusion. Need to create test case for unaliged, aligned, odd, + even length combination of cases on various endianess machines. + + 2005-12-09 Christiaan Simons + * inet.c: Rewrote standard checksum routine in proper portable C. + + 2005-11-25 Christiaan Simons + * udp.c tcp.c: Removed SO_REUSE hack. Should reside in socket code only. + * *.c: introduced cc.h LWIP_DEBUG formatters matching the u16_t, s16_t, + u32_t, s32_t typedefs. This solves most debug word-length assumes. + + 2005-07-17 Leon Woestenberg + * inet.c: Fixed unaligned 16-bit access in the standard checksum + routine by Peter Jolasson. + * slipif.c: Fixed implementation assumption of single-pbuf datagrams. + + 2005-02-04 Leon Woestenberg + * tcp_out.c: Fixed uninitialized 'queue' referenced in memerr branch. + * tcp_{out|in}.c: Applied patch fixing unaligned access. + + 2005-01-04 Leon Woestenberg + * pbuf.c: Fixed missing semicolon after LWIP_DEBUG statement. + + 2005-01-03 Leon Woestenberg + * udp.c: UDP pcb->recv() was called even when it was NULL. + +(STABLE-1_1_0) + + 2004-12-28 Leon Woestenberg + * etharp.*: Disabled multiple packets on the ARP queue. + This clashes with TCP queueing. + + 2004-11-28 Leon Woestenberg + * etharp.*: Fixed race condition from ARP request to ARP timeout. + Halved the ARP period, doubled the period counts. + ETHARP_MAX_PENDING now should be at least 2. This prevents + the counter from reaching 0 right away (which would allow + too little time for ARP responses to be received). + + 2004-11-25 Leon Woestenberg + * dhcp.c: Decline messages were not multicast but unicast. + * etharp.c: ETHARP_CREATE is renamed to ETHARP_TRY_HARD. + Do not try hard to insert arbitrary packet's source address, + etharp_ip_input() now calls etharp_update() without ETHARP_TRY_HARD. + etharp_query() now always DOES call ETHARP_TRY_HARD so that users + querying an address will see it appear in the cache (DHCP could + suffer from this when a server invalidly gave an in-use address.) + * ipv4/ip_addr.h: Renamed ip_addr_maskcmp() to _netcmp() as we are + comparing network addresses (identifiers), not the network masks + themselves. + * ipv4/ip_addr.c: ip_addr_isbroadcast() now checks that the given + IP address actually belongs to the network of the given interface. + + 2004-11-24 Kieran Mansley + * tcp.c: Increment pcb->snd_buf when ACK is received in SYN_SENT state. + +(STABLE-1_1_0-RC1) + + 2004-10-16 Kieran Mansley + * tcp.c: Add code to tcp_recved() to send an ACK (window update) immediately, + even if one is already pending, if the rcv_wnd is above a threshold + (currently TCP_WND/2). This avoids waiting for a timer to expire to send a + delayed ACK in order to open the window if the stack is only receiving data. + + 2004-09-12 Kieran Mansley + * tcp*.*: Retransmit time-out handling improvement by Sam Jansen. + + 2004-08-20 Tony Mountifield + * etharp.c: Make sure the first pbuf queued on an ARP entry + is properly ref counted. + + 2004-07-27 Tony Mountifield + * debug.h: Added (int) cast in LWIP_DEBUGF() to avoid compiler + warnings about comparison. + * pbuf.c: Stopped compiler complaining of empty if statement + when LWIP_DEBUGF() empty. Closed an unclosed comment. + * tcp.c: Stopped compiler complaining of empty if statement + when LWIP_DEBUGF() empty. + * ip.h Corrected IPH_TOS() macro: returns a byte, so doesn't need htons(). + * inet.c: Added a couple of casts to quiet the compiler. + No need to test isascii(c) before isdigit(c) or isxdigit(c). + + 2004-07-22 Tony Mountifield + * inet.c: Made data types consistent in inet_ntoa(). + Added casts for return values of checksum routines, to pacify compiler. + * ip_frag.c, tcp_out.c, sockets.c, pbuf.c + Small corrections to some debugging statements, to pacify compiler. + + 2004-07-21 Tony Mountifield + * etharp.c: Removed spurious semicolon and added missing end-of-comment. + * ethernetif.c Updated low_level_output() to match prototype for + netif->linkoutput and changed low_level_input() similarly for consistency. + * api_msg.c: Changed recv_raw() from int to u8_t, to match prototype + of raw_recv() in raw.h and so avoid compiler error. + * sockets.c: Added trivial (int) cast to keep compiler happier. + * ip.c, netif.c Changed debug statements to use the tidier ip4_addrN() macros. + +(STABLE-1_0_0) + + ++ Changes: + + 2004-07-05 Leon Woestenberg + * sockets.*: Restructured LWIP_PRIVATE_TIMEVAL. Make sure + your cc.h file defines this either 1 or 0. If non-defined, + defaults to 1. + * .c: Added and includes where used. + * etharp.c: Made some array indices unsigned. + + 2004-06-27 Leon Woestenberg + * netif.*: Added netif_set_up()/down(). + * dhcp.c: Changes to restart program flow. + + 2004-05-07 Leon Woestenberg + * etharp.c: In find_entry(), instead of a list traversal per candidate, do a + single-pass lookup for different candidates. Should exploit locality. + + 2004-04-29 Leon Woestenberg + * tcp*.c: Cleaned up source comment documentation for Doxygen processing. + * opt.h: ETHARP_ALWAYS_INSERT option removed to comply with ARP RFC. + * etharp.c: update_arp_entry() only adds new ARP entries when adviced to by + the caller. This deprecates the ETHARP_ALWAYS_INSERT overrule option. + + ++ Bug fixes: + + 2004-04-27 Leon Woestenberg + * etharp.c: Applied patch of bug #8708 by Toni Mountifield with a solution + suggested by Timmy Brolin. Fix for 32-bit processors that cannot access + non-aligned 32-bit words, such as soms 32-bit TCP/IP header fields. Fix + is to prefix the 14-bit Ethernet headers with two padding bytes. + + 2004-04-23 Leon Woestenberg + * ip_addr.c: Fix in the ip_addr_isbroadcast() check. + * etharp.c: Fixed the case where the packet that initiates the ARP request + is not queued, and gets lost. Fixed the case where the packets destination + address is already known; we now always queue the packet and perform an ARP + request. + +(STABLE-0_7_0) + + ++ Bug fixes: + + * Fixed TCP bug for SYN_SENT to ESTABLISHED state transition. + * Fixed TCP bug in dequeueing of FIN from out of order segment queue. + * Fixed two possible NULL references in rare cases. + +(STABLE-0_6_6) + + ++ Bug fixes: + + * Fixed DHCP which did not include the IP address in DECLINE messages. + + ++ Changes: + + * etharp.c has been hauled over a bit. + +(STABLE-0_6_5) + + ++ Bug fixes: + + * Fixed TCP bug induced by bad window resizing with unidirectional TCP traffic. + * Packets sent from ARP queue had invalid source hardware address. + + ++ Changes: + + * Pass-by ARP requests do now update the cache. + + ++ New features: + + * No longer dependent on ctype.h. + * New socket options. + * Raw IP pcb support. + +(STABLE-0_6_4) + + ++ Bug fixes: + + * Some debug formatters and casts fixed. + * Numereous fixes in PPP. + + ++ Changes: + + * DEBUGF now is LWIP_DEBUGF + * pbuf_dechain() has been re-enabled. + * Mentioned the changed use of CVS branches in README. + +(STABLE-0_6_3) + + ++ Bug fixes: + + * Fixed pool pbuf memory leak in pbuf_alloc(). + Occured if not enough PBUF_POOL pbufs for a packet pbuf chain. + Reported by Savin Zlobec. + + * PBUF_POOL chains had their tot_len field not set for non-first + pbufs. Fixed in pbuf_alloc(). + + ++ New features: + + * Added PPP stack contributed by Marc Boucher + + ++ Changes: + + * Now drops short packets for ICMP/UDP/TCP protocols. More robust. + + * ARP queueuing now queues the latest packet instead of the first. + This is the RFC recommended behaviour, but can be overridden in + lwipopts.h. + +(0.6.2) + + ++ Bugfixes: + + * TCP has been fixed to deal with the new use of the pbuf->ref + counter. + + * DHCP dhcp_inform() crash bug fixed. + + ++ Changes: + + * Removed pbuf_pool_free_cache and pbuf_pool_alloc_cache. Also removed + pbuf_refresh(). This has sped up pbuf pool operations considerably. + Implemented by David Haas. + +(0.6.1) + + ++ New features: + + * The packet buffer implementation has been enhanced to support + zero-copy and copy-on-demand for packet buffers which have their + payloads in application-managed memory. + Implemented by David Haas. + + Use PBUF_REF to make a pbuf refer to RAM. lwIP will use zero-copy + if an outgoing packet can be directly sent on the link, or perform + a copy-on-demand when necessary. + + The application can safely assume the packet is sent, and the RAM + is available to the application directly after calling udp_send() + or similar function. + + ++ Bugfixes: + + * ARP_QUEUEING should now correctly work for all cases, including + PBUF_REF. + Implemented by Leon Woestenberg. + + ++ Changes: + + * IP_ADDR_ANY is no longer a NULL pointer. Instead, it is a pointer + to a '0.0.0.0' IP address. + + * The packet buffer implementation is changed. The pbuf->ref counter + meaning has changed, and several pbuf functions have been + adapted accordingly. + + * netif drivers have to be changed to set the hardware address length field + that must be initialized correctly by the driver (hint: 6 for Ethernet MAC). + See the contrib/ports/c16x cs8900 driver as a driver example. + + * netif's have a dhcp field that must be initialized to NULL by the driver. + See the contrib/ports/c16x cs8900 driver as a driver example. + +(0.5.x) This file has been unmaintained up to 0.6.1. All changes are + logged in CVS but have not been explained here. + +(0.5.3) Changes since version 0.5.2 + + ++ Bugfixes: + + * memp_malloc(MEMP_API_MSG) could fail with multiple application + threads because it wasn't protected by semaphores. + + ++ Other changes: + + * struct ip_addr now packed. + + * The name of the time variable in arp.c has been changed to ctime + to avoid conflicts with the time() function. + +(0.5.2) Changes since version 0.5.1 + + ++ New features: + + * A new TCP function, tcp_tmr(), now handles both TCP timers. + + ++ Bugfixes: + + * A bug in tcp_parseopt() could cause the stack to hang because of a + malformed TCP option. + + * The address of new connections in the accept() function in the BSD + socket library was not handled correctly. + + * pbuf_dechain() did not update the ->tot_len field of the tail. + + * Aborted TCP connections were not handled correctly in all + situations. + + ++ Other changes: + + * All protocol header structs are now packed. + + * The ->len field in the tcp_seg structure now counts the actual + amount of data, and does not add one for SYN and FIN segments. + +(0.5.1) Changes since version 0.5.0 + + ++ New features: + + * Possible to run as a user process under Linux. + + * Preliminary support for cross platform packed structs. + + * ARP timer now implemented. + + ++ Bugfixes: + + * TCP output queue length was badly initialized when opening + connections. + + * TCP delayed ACKs were not sent correctly. + + * Explicit initialization of BSS segment variables. + + * read() in BSD socket library could drop data. + + * Problems with memory alignment. + + * Situations when all TCP buffers were used could lead to + starvation. + + * TCP MSS option wasn't parsed correctly. + + * Problems with UDP checksum calculation. + + * IP multicast address tests had endianess problems. + + * ARP requests had wrong destination hardware address. + + ++ Other changes: + + * struct eth_addr changed from u16_t[3] array to u8_t[6]. + + * A ->linkoutput() member was added to struct netif. + + * TCP and UDP ->dest_* struct members where changed to ->remote_*. + + * ntoh* macros are now null definitions for big endian CPUs. + +(0.5.0) Changes since version 0.4.2 + + ++ New features: + + * Redesigned operating system emulation layer to make porting easier. + + * Better control over TCP output buffers. + + * Documenation added. + + ++ Bugfixes: + + * Locking issues in buffer management. + + * Bugfixes in the sequential API. + + * IP forwarding could cause memory leakage. This has been fixed. + + ++ Other changes: + + * Directory structure somewhat changed; the core/ tree has been + collapsed. + +(0.4.2) Changes since version 0.4.1 + + ++ New features: + + * Experimental ARP implementation added. + + * Skeleton Ethernet driver added. + + * Experimental BSD socket API library added. + + ++ Bugfixes: + + * In very intense situations, memory leakage could occur. This has + been fixed. + + ++ Other changes: + + * Variables named "data" and "code" have been renamed in order to + avoid name conflicts in certain compilers. + + * Variable++ have in appliciable cases been translated to ++variable + since some compilers generate better code in the latter case. + +(0.4.1) Changes since version 0.4 + + ++ New features: + + * TCP: Connection attempts time out earlier than data + transmissions. Nagle algorithm implemented. Push flag set on the + last segment in a burst. + + * UDP: experimental support for UDP-Lite extensions. + + ++ Bugfixes: + + * TCP: out of order segments were in some cases handled incorrectly, + and this has now been fixed. Delayed acknowledgements was broken + in 0.4, has now been fixed. Binding to an address that is in use + now results in an error. Reset connections sometimes hung an + application; this has been fixed. + + * Checksum calculation sometimes failed for chained pbufs with odd + lengths. This has been fixed. + + * API: a lot of bug fixes in the API. The UDP API has been improved + and tested. Error reporting and handling has been + improved. Logical flaws and race conditions for incoming TCP + connections has been found and removed. + + * Memory manager: alignment issues. Reallocating memory sometimes + failed, this has been fixed. + + * Generic library: bcopy was flawed and has been fixed. + + ++ Other changes: + + * API: all datatypes has been changed from generic ones such as + ints, to specified ones such as u16_t. Functions that return + errors now have the correct type (err_t). + + * General: A lot of code cleaned up and debugging code removed. Many + portability issues have been fixed. + + * The license was changed; the advertising clause was removed. + + * C64 port added. + + * Thanks: Huge thanks go to Dagan Galarneau, Horst Garnetzke, Petri + Kosunen, Mikael Caleres, and Frits Wilmink for reporting and + fixing bugs! + +(0.4) Changes since version 0.3.1 + + * Memory management has been radically changed; instead of + allocating memory from a shared heap, memory for objects that are + rapidly allocated and deallocated is now kept in pools. Allocation + and deallocation from those memory pools is very fast. The shared + heap is still present but is used less frequently. + + * The memory, memory pool, and packet buffer subsystems now support + 4-, 2-, or 1-byte alignment. + + * "Out of memory" situations are handled in a more robust way. + + * Stack usage has been reduced. + + * Easier configuration of lwIP parameters such as memory usage, + TTLs, statistics gathering, etc. All configuration parameters are + now kept in a single header file "lwipopts.h". + + * The directory structure has been changed slightly so that all + architecture specific files are kept under the src/arch + hierarchy. + + * Error propagation has been improved, both in the protocol modules + and in the API. + + * The code for the RTXC architecture has been implemented, tested + and put to use. + + * Bugs have been found and corrected in the TCP, UDP, IP, API, and + the Internet checksum modules. + + * Bugs related to porting between a 32-bit and a 16-bit architecture + have been found and corrected. + + * The license has been changed slightly to conform more with the + original BSD license, including the advertisement clause. + +(0.3.1) Changes since version 0.3 + + * Fix of a fatal bug in the buffer management. Pbufs with allocated + RAM never returned the RAM when the pbuf was deallocated. + + * TCP congestion control, window updates and retransmissions did not + work correctly. This has now been fixed. + + * Bugfixes in the API. + +(0.3) Changes since version 0.2 + + * New and improved directory structure. All include files are now + kept in a dedicated include/ directory. + + * The API now has proper error handling. A new function, + netconn_err(), now returns an error code for the connection in + case of errors. + + * Improvements in the memory management subsystem. The system now + keeps a pointer to the lowest free memory block. A new function, + mem_malloc2() tries to allocate memory once, and if it fails tries + to free some memory and retry the allocation. + + * Much testing has been done with limited memory + configurations. lwIP now does a better job when overloaded. + + * Some bugfixes and improvements to the buffer (pbuf) subsystem. + + * Many bugfixes in the TCP code: + + - Fixed a bug in tcp_close(). + + - The TCP receive window was incorrectly closed when out of + sequence segments was received. This has been fixed. + + - Connections are now timed-out of the FIN-WAIT-2 state. + + - The initial congestion window could in some cases be too + large. This has been fixed. + + - The retransmission queue could in some cases be screwed up. This + has been fixed. + + - TCP RST flag now handled correctly. + + - Out of sequence data was in some cases never delivered to the + application. This has been fixed. + + - Retransmitted segments now contain the correct acknowledgment + number and advertised window. + + - TCP retransmission timeout backoffs are not correctly computed + (ala BSD). After a number of retransmissions, TCP now gives up + the connection. + + * TCP connections now are kept on three lists, one for active + connections, one for listening connections, and one for + connections that are in TIME-WAIT. This greatly speeds up the fast + timeout processing for sending delayed ACKs. + + * TCP now provides proper feedback to the application when a + connection has been successfully set up. + + * More comments have been added to the code. The code has also been + somewhat cleaned up. + +(0.2) Initial public release. diff --git a/bertos/net/lwip/COPYING b/bertos/net/lwip/COPYING new file mode 100644 index 0000000..e23898b --- /dev/null +++ b/bertos/net/lwip/COPYING @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2001, 2002 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + + diff --git a/bertos/net/lwip/FILES b/bertos/net/lwip/FILES new file mode 100644 index 0000000..6625319 --- /dev/null +++ b/bertos/net/lwip/FILES @@ -0,0 +1,4 @@ +src/ - The source code for the lwIP TCP/IP stack. +doc/ - The documentation for lwIP. + +See also the FILES file in each subdirectory. diff --git a/bertos/net/lwip/README b/bertos/net/lwip/README new file mode 100644 index 0000000..a62cc4f --- /dev/null +++ b/bertos/net/lwip/README @@ -0,0 +1,89 @@ +INTRODUCTION + +lwIP is a small independent implementation of the TCP/IP protocol +suite that has been developed by Adam Dunkels at the Computer and +Networks Architectures (CNA) lab at the Swedish Institute of Computer +Science (SICS). + +The focus of the lwIP TCP/IP implementation is to reduce the RAM usage +while still having a full scale TCP. This making lwIP suitable for use +in embedded systems with tens of kilobytes of free RAM and room for +around 40 kilobytes of code ROM. + +FEATURES + + * IP (Internet Protocol) including packet forwarding over multiple network + interfaces + * ICMP (Internet Control Message Protocol) for network maintenance and debugging + * IGMP (Internet Group Management Protocol) for multicast traffic management + * UDP (User Datagram Protocol) including experimental UDP-lite extensions + * TCP (Transmission Control Protocol) with congestion control, RTT estimation + and fast recovery/fast retransmit + * Specialized raw/native API for enhanced performance + * Optional Berkeley-like socket API + * DNS (Domain names resolver) + * SNMP (Simple Network Management Protocol) + * DHCP (Dynamic Host Configuration Protocol) + * AUTOIP (for IPv4, conform with RFC 3927) + * PPP (Point-to-Point Protocol) + * ARP (Address Resolution Protocol) for Ethernet + +LICENSE + +lwIP is freely available under a BSD license. + +DEVELOPMENT + +lwIP has grown into an excellent TCP/IP stack for embedded devices, +and developers using the stack often submit bug fixes, improvements, +and additions to the stack to further increase its usefulness. + +Development of lwIP is hosted on Savannah, a central point for +software development, maintenance and distribution. Everyone can +help improve lwIP by use of Savannah's interface, CVS and the +mailing list. A core team of developers will commit changes to the +CVS source tree. + +The lwIP TCP/IP stack is maintained in the 'lwip' CVS module and +contributions (such as platform ports) are in the 'contrib' module. + +See doc/savannah.txt for details on CVS server access for users and +developers. + +Last night's CVS tar ball can be downloaded from: + http://savannah.gnu.org/cvs.backups/lwip.tar.gz [CHANGED - NEEDS FIXING] + +The current CVS trees are web-browsable: + http://savannah.nongnu.org/cgi-bin/viewcvs/lwip/lwip/ + http://savannah.nongnu.org/cgi-bin/viewcvs/lwip/contrib/ + +Submit patches and bugs via the lwIP project page: + http://savannah.nongnu.org/projects/lwip/ + + +DOCUMENTATION + +The original out-dated homepage of lwIP and Adam Dunkels' papers on +lwIP are at the official lwIP home page: + http://www.sics.se/~adam/lwip/ + +Self documentation of the source code is regularly extracted from the +current CVS sources and is available from this web page: + http://www.nongnu.org/lwip/ + +There is now a constantly growin wiki about lwIP at + http://lwip.wikia.com/wiki/LwIP_Wiki + +Also, there are mailing lists you can subscribe at + http://savannah.nongnu.org/mail/?group=lwip +plus searchable archives: + http://lists.nongnu.org/archive/html/lwip-users/ + http://lists.nongnu.org/archive/html/lwip-devel/ + +Reading Adam's papers, the files in docs/, browsing the source code +documentation and browsing the mailing list archives is a good way to +become familiar with the design of lwIP. + +Adam Dunkels +Leon Woestenberg + diff --git a/bertos/net/lwip/doc/FILES b/bertos/net/lwip/doc/FILES new file mode 100644 index 0000000..05d356f --- /dev/null +++ b/bertos/net/lwip/doc/FILES @@ -0,0 +1,6 @@ +savannah.txt - How to obtain the current development source code. +contrib.txt - How to contribute to lwIP as a developer. +rawapi.txt - The documentation for the core API of lwIP. + Also provides an overview about the other APIs and multithreading. +snmp_agent.txt - The documentation for the lwIP SNMP agent. +sys_arch.txt - The documentation for a system abstraction layer of lwIP. diff --git a/bertos/net/lwip/doc/contrib.txt b/bertos/net/lwip/doc/contrib.txt new file mode 100644 index 0000000..39596fc --- /dev/null +++ b/bertos/net/lwip/doc/contrib.txt @@ -0,0 +1,63 @@ +1 Introduction + +This document describes some guidelines for people participating +in lwIP development. + +2 How to contribute to lwIP + +Here is a short list of suggestions to anybody working with lwIP and +trying to contribute bug reports, fixes, enhancements, platform ports etc. +First of all as you may already know lwIP is a volunteer project so feedback +to fixes or questions might often come late. Hopefully the bug and patch tracking +features of Savannah help us not lose users' input. + +2.1 Source code style: + +1. do not use tabs. +2. indentation is two spaces per level (i.e. per tab). +3. end debug messages with a trailing newline (\n). +4. one space between keyword and opening bracket. +5. no space between function and opening bracket. +6. one space and no newline before opening curly braces of a block. +7. closing curly brace on a single line. +8. spaces surrounding assignment and comparisons. +9. don't initialize static and/or global variables to zero, the compiler takes care of that. +10. use current source code style as further reference. + +2.2 Source code documentation style: + +1. JavaDoc compliant and Doxygen compatible. +2. Function documentation above functions in .c files, not .h files. + (This forces you to synchronize documentation and implementation.) +3. Use current documentation style as further reference. + +2.3 Bug reports and patches: + +1. Make sure you are reporting bugs or send patches against the latest + sources. (From the latest release and/or the current CVS sources.) +2. If you think you found a bug make sure it's not already filed in the + bugtracker at Savannah. +3. If you have a fix put the patch on Savannah. If it is a patch that affects + both core and arch specific stuff please separate them so that the core can + be applied separately while leaving the other patch 'open'. The prefered way + is to NOT touch archs you can't test and let maintainers take care of them. + This is a good way to see if they are used at all - the same goes for unix + netifs except tapif. +4. Do not file a bug and post a fix to it to the patch area. Either a bug report + or a patch will be enough. + If you correct an existing bug then attach the patch to the bug rather than creating a new entry in the patch area. +5. Trivial patches (compiler warning, indentation and spelling fixes or anything obvious which takes a line or two) + can go to the lwip-users list. This is still the fastest way of interaction and the list is not so crowded + as to allow for loss of fixes. Putting bugs on Savannah and subsequently closing them is too much an overhead + for reporting a compiler warning fix. +6. Patches should be specific to a single change or to related changes.Do not mix bugfixes with spelling and other + trivial fixes unless the bugfix is trivial too.Do not reorganize code and rename identifiers in the same patch you + change behaviour if not necessary.A patch is easier to read and understand if it's to the point and short than + if it's not to the point and long :) so the chances for it to be applied are greater. + +2.4 Platform porters: + +1. If you have ported lwIP to a platform (an OS, a uC/processor or a combination of these) and + you think it could benefit others[1] you might want discuss this on the mailing list. You + can also ask for CVS access to submit and maintain your port in the contrib CVS module. + \ No newline at end of file diff --git a/bertos/net/lwip/doc/rawapi.txt b/bertos/net/lwip/doc/rawapi.txt new file mode 100644 index 0000000..8eec6e7 --- /dev/null +++ b/bertos/net/lwip/doc/rawapi.txt @@ -0,0 +1,478 @@ +Raw TCP/IP interface for lwIP + +Authors: Adam Dunkels, Leon Woestenberg, Christiaan Simons + +lwIP provides three Application Program's Interfaces (APIs) for programs +to use for communication with the TCP/IP code: +* low-level "core" / "callback" or "raw" API. +* higher-level "sequential" API. +* BSD-style socket API. + +The sequential API provides a way for ordinary, sequential, programs +to use the lwIP stack. It is quite similar to the BSD socket API. The +model of execution is based on the blocking open-read-write-close +paradigm. Since the TCP/IP stack is event based by nature, the TCP/IP +code and the application program must reside in different execution +contexts (threads). + +The socket API is a compatibility API for existing applications, +currently it is built on top of the sequential API. It is meant to +provide all functions needed to run socket API applications running +on other platforms (e.g. unix / windows etc.). However, due to limitations +in the specification of this API, there might be incompatibilities +that require small modifications of existing programs. + +** Threading + +lwIP started targeting single-threaded environments. When adding multi- +threading support, instead of making the core thread-safe, another +approach was chosen: there is one main thread running the lwIP core +(also known as the "tcpip_thread"). The raw API may only be used from +this thread! Application threads using the sequential- or socket API +communicate with this main thread through message passing. + + As such, the list of functions that may be called from + other threads or an ISR is very limited! Only functions + from these API header files are thread-safe: + - api.h + - netbuf.h + - netdb.h + - netifapi.h + - sockets.h + - sys.h + + Additionaly, memory (de-)allocation functions may be + called from multiple threads (not ISR!) with NO_SYS=0 + since they are protected by SYS_LIGHTWEIGHT_PROT and/or + semaphores. + + Only since 1.3.0, if SYS_LIGHTWEIGHT_PROT is set to 1 + and LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT is set to 1, + pbuf_free() may also be called from another thread or + an ISR (since only then, mem_free - for PBUF_RAM - may + be called from an ISR: otherwise, the HEAP is only + protected by semaphores). + + +** The remainder of this document discusses the "raw" API. ** + +The raw TCP/IP interface allows the application program to integrate +better with the TCP/IP code. Program execution is event based by +having callback functions being called from within the TCP/IP +code. The TCP/IP code and the application program both run in the same +thread. The sequential API has a much higher overhead and is not very +well suited for small systems since it forces a multithreaded paradigm +on the application. + +The raw TCP/IP interface is not only faster in terms of code execution +time but is also less memory intensive. The drawback is that program +development is somewhat harder and application programs written for +the raw TCP/IP interface are more difficult to understand. Still, this +is the preferred way of writing applications that should be small in +code size and memory usage. + +Both APIs can be used simultaneously by different application +programs. In fact, the sequential API is implemented as an application +program using the raw TCP/IP interface. + +--- Callbacks + +Program execution is driven by callbacks. Each callback is an ordinary +C function that is called from within the TCP/IP code. Every callback +function is passed the current TCP or UDP connection state as an +argument. Also, in order to be able to keep program specific state, +the callback functions are called with a program specified argument +that is independent of the TCP/IP state. + +The function for setting the application connection state is: + +- void tcp_arg(struct tcp_pcb *pcb, void *arg) + + Specifies the program specific state that should be passed to all + other callback functions. The "pcb" argument is the current TCP + connection control block, and the "arg" argument is the argument + that will be passed to the callbacks. + + +--- TCP connection setup + +The functions used for setting up connections is similar to that of +the sequential API and of the BSD socket API. A new TCP connection +identifier (i.e., a protocol control block - PCB) is created with the +tcp_new() function. This PCB can then be either set to listen for new +incoming connections or be explicitly connected to another host. + +- struct tcp_pcb *tcp_new(void) + + Creates a new connection identifier (PCB). If memory is not + available for creating the new pcb, NULL is returned. + +- err_t tcp_bind(struct tcp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port) + + Binds the pcb to a local IP address and port number. The IP address + can be specified as IP_ADDR_ANY in order to bind the connection to + all local IP addresses. + + If another connection is bound to the same port, the function will + return ERR_USE, otherwise ERR_OK is returned. + +- struct tcp_pcb *tcp_listen(struct tcp_pcb *pcb) + + Commands a pcb to start listening for incoming connections. When an + incoming connection is accepted, the function specified with the + tcp_accept() function will be called. The pcb will have to be bound + to a local port with the tcp_bind() function. + + The tcp_listen() function returns a new connection identifier, and + the one passed as an argument to the function will be + deallocated. The reason for this behavior is that less memory is + needed for a connection that is listening, so tcp_listen() will + reclaim the memory needed for the original connection and allocate a + new smaller memory block for the listening connection. + + tcp_listen() may return NULL if no memory was available for the + listening connection. If so, the memory associated with the pcb + passed as an argument to tcp_listen() will not be deallocated. + +- struct tcp_pcb *tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog) + + Same as tcp_listen, but limits the number of outstanding connections + in the listen queue to the value specified by the backlog argument. + To use it, your need to set TCP_LISTEN_BACKLOG=1 in your lwipopts.h. + +- void tcp_accepted(struct tcp_pcb *pcb) + + Inform lwIP that an incoming connection has been accepted. This would + usually be called from the accept callback. This allows lwIP to perform + housekeeping tasks, such as allowing further incoming connections to be + queued in the listen backlog. + +- void tcp_accept(struct tcp_pcb *pcb, + err_t (* accept)(void *arg, struct tcp_pcb *newpcb, + err_t err)) + + Specified the callback function that should be called when a new + connection arrives on a listening connection. + +- err_t tcp_connect(struct tcp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port, err_t (* connected)(void *arg, + struct tcp_pcb *tpcb, + err_t err)); + + Sets up the pcb to connect to the remote host and sends the + initial SYN segment which opens the connection. + + The tcp_connect() function returns immediately; it does not wait for + the connection to be properly setup. Instead, it will call the + function specified as the fourth argument (the "connected" argument) + when the connection is established. If the connection could not be + properly established, either because the other host refused the + connection or because the other host didn't answer, the "err" + callback function of this pcb (registered with tcp_err, see below) + will be called. + + The tcp_connect() function can return ERR_MEM if no memory is + available for enqueueing the SYN segment. If the SYN indeed was + enqueued successfully, the tcp_connect() function returns ERR_OK. + + +--- Sending TCP data + +TCP data is sent by enqueueing the data with a call to +tcp_write(). When the data is successfully transmitted to the remote +host, the application will be notified with a call to a specified +callback function. + +- err_t tcp_write(struct tcp_pcb *pcb, void *dataptr, u16_t len, + u8_t copy) + + Enqueues the data pointed to by the argument dataptr. The length of + the data is passed as the len parameter. The copy argument is either + 0 or 1 and indicates whether the new memory should be allocated for + the data to be copied into. If the argument is 0, no new memory + should be allocated and the data should only be referenced by + pointer. + + The tcp_write() function will fail and return ERR_MEM if the length + of the data exceeds the current send buffer size or if the length of + the queue of outgoing segment is larger than the upper limit defined + in lwipopts.h. The number of bytes available in the output queue can + be retrieved with the tcp_sndbuf() function. + + The proper way to use this function is to call the function with at + most tcp_sndbuf() bytes of data. If the function returns ERR_MEM, + the application should wait until some of the currently enqueued + data has been successfully received by the other host and try again. + +- void tcp_sent(struct tcp_pcb *pcb, + err_t (* sent)(void *arg, struct tcp_pcb *tpcb, + u16_t len)) + + Specifies the callback function that should be called when data has + successfully been received (i.e., acknowledged) by the remote + host. The len argument passed to the callback function gives the + amount bytes that was acknowledged by the last acknowledgment. + + +--- Receiving TCP data + +TCP data reception is callback based - an application specified +callback function is called when new data arrives. When the +application has taken the data, it has to call the tcp_recved() +function to indicate that TCP can advertise increase the receive +window. + +- void tcp_recv(struct tcp_pcb *pcb, + err_t (* recv)(void *arg, struct tcp_pcb *tpcb, + struct pbuf *p, err_t err)) + + Sets the callback function that will be called when new data + arrives. The callback function will be passed a NULL pbuf to + indicate that the remote host has closed the connection. If + there are no errors and the callback function is to return + ERR_OK, then it must free the pbuf. Otherwise, it must not + free the pbuf so that lwIP core code can store it. + +- void tcp_recved(struct tcp_pcb *pcb, u16_t len) + + Must be called when the application has received the data. The len + argument indicates the length of the received data. + + +--- Application polling + +When a connection is idle (i.e., no data is either transmitted or +received), lwIP will repeatedly poll the application by calling a +specified callback function. This can be used either as a watchdog +timer for killing connections that have stayed idle for too long, or +as a method of waiting for memory to become available. For instance, +if a call to tcp_write() has failed because memory wasn't available, +the application may use the polling functionality to call tcp_write() +again when the connection has been idle for a while. + +- void tcp_poll(struct tcp_pcb *pcb, u8_t interval, + err_t (* poll)(void *arg, struct tcp_pcb *tpcb)) + + Specifies the polling interval and the callback function that should + be called to poll the application. The interval is specified in + number of TCP coarse grained timer shots, which typically occurs + twice a second. An interval of 10 means that the application would + be polled every 5 seconds. + + +--- Closing and aborting connections + +- err_t tcp_close(struct tcp_pcb *pcb) + + Closes the connection. The function may return ERR_MEM if no memory + was available for closing the connection. If so, the application + should wait and try again either by using the acknowledgment + callback or the polling functionality. If the close succeeds, the + function returns ERR_OK. + + The pcb is deallocated by the TCP code after a call to tcp_close(). + +- void tcp_abort(struct tcp_pcb *pcb) + + Aborts the connection by sending a RST (reset) segment to the remote + host. The pcb is deallocated. This function never fails. + +If a connection is aborted because of an error, the application is +alerted of this event by the err callback. Errors that might abort a +connection are when there is a shortage of memory. The callback +function to be called is set using the tcp_err() function. + +- void tcp_err(struct tcp_pcb *pcb, void (* err)(void *arg, + err_t err)) + + The error callback function does not get the pcb passed to it as a + parameter since the pcb may already have been deallocated. + + +--- Lower layer TCP interface + +TCP provides a simple interface to the lower layers of the +system. During system initialization, the function tcp_init() has +to be called before any other TCP function is called. When the system +is running, the two timer functions tcp_fasttmr() and tcp_slowtmr() +must be called with regular intervals. The tcp_fasttmr() should be +called every TCP_FAST_INTERVAL milliseconds (defined in tcp.h) and +tcp_slowtmr() should be called every TCP_SLOW_INTERVAL milliseconds. + + +--- UDP interface + +The UDP interface is similar to that of TCP, but due to the lower +level of complexity of UDP, the interface is significantly simpler. + +- struct udp_pcb *udp_new(void) + + Creates a new UDP pcb which can be used for UDP communication. The + pcb is not active until it has either been bound to a local address + or connected to a remote address. + +- void udp_remove(struct udp_pcb *pcb) + + Removes and deallocates the pcb. + +- err_t udp_bind(struct udp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port) + + Binds the pcb to a local address. The IP-address argument "ipaddr" + can be IP_ADDR_ANY to indicate that it should listen to any local IP + address. The function currently always return ERR_OK. + +- err_t udp_connect(struct udp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port) + + Sets the remote end of the pcb. This function does not generate any + network traffic, but only set the remote address of the pcb. + +- err_t udp_disconnect(struct udp_pcb *pcb) + + Remove the remote end of the pcb. This function does not generate + any network traffic, but only removes the remote address of the pcb. + +- err_t udp_send(struct udp_pcb *pcb, struct pbuf *p) + + Sends the pbuf p. The pbuf is not deallocated. + +- void udp_recv(struct udp_pcb *pcb, + void (* recv)(void *arg, struct udp_pcb *upcb, + struct pbuf *p, + struct ip_addr *addr, + u16_t port), + void *recv_arg) + + Specifies a callback function that should be called when a UDP + datagram is received. + + +--- System initalization + +A truly complete and generic sequence for initializing the lwip stack +cannot be given because it depends on the build configuration (lwipopts.h) +and additional initializations for your runtime environment (e.g. timers). + +We can give you some idea on how to proceed when using the raw API. +We assume a configuration using a single Ethernet netif and the +UDP and TCP transport layers, IPv4 and the DHCP client. + +Call these functions in the order of appearance: + +- stats_init() + + Clears the structure where runtime statistics are gathered. + +- sys_init() + + Not of much use since we set the NO_SYS 1 option in lwipopts.h, + to be called for easy configuration changes. + +- mem_init() + + Initializes the dynamic memory heap defined by MEM_SIZE. + +- memp_init() + + Initializes the memory pools defined by MEMP_NUM_x. + +- pbuf_init() + + Initializes the pbuf memory pool defined by PBUF_POOL_SIZE. + +- etharp_init() + + Initializes the ARP table and queue. + Note: you must call etharp_tmr at a ARP_TMR_INTERVAL (5 seconds) regular interval + after this initialization. + +- ip_init() + + Doesn't do much, it should be called to handle future changes. + +- udp_init() + + Clears the UDP PCB list. + +- tcp_init() + + Clears the TCP PCB list and clears some internal TCP timers. + Note: you must call tcp_fasttmr() and tcp_slowtmr() at the + predefined regular intervals after this initialization. + +- netif_add(struct netif *netif, struct ip_addr *ipaddr, + struct ip_addr *netmask, struct ip_addr *gw, + void *state, err_t (* init)(struct netif *netif), + err_t (* input)(struct pbuf *p, struct netif *netif)) + + Adds your network interface to the netif_list. Allocate a struct + netif and pass a pointer to this structure as the first argument. + Give pointers to cleared ip_addr structures when using DHCP, + or fill them with sane numbers otherwise. The state pointer may be NULL. + + The init function pointer must point to a initialization function for + your ethernet netif interface. The following code illustrates it's use. + + err_t netif_if_init(struct netif *netif) + { + u8_t i; + + for(i = 0; i < ETHARP_HWADDR_LEN; i++) netif->hwaddr[i] = some_eth_addr[i]; + init_my_eth_device(); + return ERR_OK; + } + + For ethernet drivers, the input function pointer must point to the lwip + function ethernet_input() declared in "netif/etharp.h". Other drivers + must use ip_input() declared in "lwip/ip.h". + +- netif_set_default(struct netif *netif) + + Registers the default network interface. + +- netif_set_up(struct netif *netif) + + When the netif is fully configured this function must be called. + +- dhcp_start(struct netif *netif) + + Creates a new DHCP client for this interface on the first call. + Note: you must call dhcp_fine_tmr() and dhcp_coarse_tmr() at + the predefined regular intervals after starting the client. + + You can peek in the netif->dhcp struct for the actual DHCP status. + + +--- Optimalization hints + +The first thing you want to optimize is the lwip_standard_checksum() +routine from src/core/inet.c. You can override this standard +function with the #define LWIP_CHKSUM . + +There are C examples given in inet.c or you might want to +craft an assembly function for this. RFC1071 is a good +introduction to this subject. + +Other significant improvements can be made by supplying +assembly or inline replacements for htons() and htonl() +if you're using a little-endian architecture. +#define LWIP_PLATFORM_BYTESWAP 1 +#define LWIP_PLATFORM_HTONS(x) +#define LWIP_PLATFORM_HTONL(x) + +Check your network interface driver if it reads at +a higher speed than the maximum wire-speed. If the +hardware isn't serviced frequently and fast enough +buffer overflows are likely to occur. + +E.g. when using the cs8900 driver, call cs8900if_service(ethif) +as frequently as possible. When using an RTOS let the cs8900 interrupt +wake a high priority task that services your driver using a binary +semaphore or event flag. Some drivers might allow additional tuning +to match your application and network. + +For a production release it is recommended to set LWIP_STATS to 0. +Note that speed performance isn't influenced much by simply setting +high values to the memory options. diff --git a/bertos/net/lwip/doc/savannah.txt b/bertos/net/lwip/doc/savannah.txt new file mode 100644 index 0000000..409905b --- /dev/null +++ b/bertos/net/lwip/doc/savannah.txt @@ -0,0 +1,135 @@ +Daily Use Guide for using Savannah for lwIP + +Table of Contents: + +1 - Obtaining lwIP from the CVS repository +2 - Committers/developers CVS access using SSH (to be written) +3 - Merging from DEVEL branch to main trunk (stable branch) +4 - How to release lwIP + + + +1 Obtaining lwIP from the CVS repository +---------------------------------------- + +To perform an anonymous CVS checkout of the main trunk (this is where +bug fixes and incremental enhancements occur), do this: + +cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout lwip + +Or, obtain a stable branch (updated with bug fixes only) as follows: +cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout \ + -r STABLE-0_7 -d lwip-0.7 lwip + +Or, obtain a specific (fixed) release as follows: +cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout \ + -r STABLE-0_7_0 -d lwip-0.7.0 lwip + +3 Committers/developers CVS access using SSH +-------------------------------------------- + +The Savannah server uses SSH (Secure Shell) protocol 2 authentication and encryption. +As such, CVS commits to the server occur through a SSH tunnel for project members. +To create a SSH2 key pair in UNIX-like environments, do this: + +ssh-keygen -t dsa + +Under Windows, a recommended SSH client is "PuTTY", freely available with good +documentation and a graphic user interface. Use its key generator. + +Now paste the id_dsa.pub contents into your Savannah account public key list. Wait +a while so that Savannah can update its configuration (This can take minutes). + +Try to login using SSH: + +ssh -v your_login@cvs.sv.gnu.org + +If it tells you: + +Authenticating with public key "your_key_name"... +Server refused to allocate pty + +then you could login; Savannah refuses to give you a shell - which is OK, as we +are allowed to use SSH for CVS only. Now, you should be able to do this: + +export CVS_RSH=ssh +cvs -z3 -d:ext:your_login@cvs.sv.gnu.org:/sources/lwip co lwip + +after which you can edit your local files with bug fixes or new features and +commit them. Make sure you know what you are doing when using CVS to make +changes on the repository. If in doubt, ask on the lwip-members mailing list. + +(If SSH asks about authenticity of the host, you can check the key + fingerprint against http://savannah.nongnu.org/cvs/?group=lwip) + + +3 Merging from DEVEL branch to main trunk (stable) +-------------------------------------------------- + +Merging is a delicate process in CVS and requires the +following disciplined steps in order to prevent conflicts +in the future. Conflicts can be hard to solve! + +Merging from branch A to branch B requires that the A branch +has a tag indicating the previous merger. This tag is called +'merged_from_A_to_B'. After merging, the tag is moved in the +A branch to remember this merger for future merge actions. + +IMPORTANT: AFTER COMMITTING A SUCCESFUL MERGE IN THE +REPOSITORY, THE TAG MUST BE SET ON THE SOURCE BRANCH OF THE +MERGE ACTION (REPLACING EXISTING TAGS WITH THE SAME NAME). + +Merge all changes in DEVEL since our last merge to main: + +In the working copy of the main trunk: +cvs update -P -jmerged_from_DEVEL_to_main -jDEVEL + +(This will apply the changes between 'merged_from_DEVEL_to_main' +and 'DEVEL' to your work set of files) + +We can now commit the merge result. +cvs commit -R -m "Merged from DEVEL to main." + +If this worked out OK, we now move the tag in the DEVEL branch +to this merge point, so we can use this point for future merges: + +cvs rtag -F -r DEVEL merged_from_DEVEL_to_main lwip + +4 How to release lwIP +--------------------- + +First, checkout a clean copy of the branch to be released. Tag this set with +tag name "STABLE-0_6_3". (I use release number 0.6.3 throughout this example). + +Login CVS using pserver authentication, then export a clean copy of the +tagged tree. Export is similar to a checkout, except that the CVS metadata +is not created locally. + +export CVS_RSH=ssh +cvs -z3 -d:pserver:anonymous@cvs.sv.gnu.org:/sources/lwip checkout \ + -r STABLE-0_6_3 -d lwip-0.6.3 lwip + +Archive this directory using tar, gzip'd, bzip2'd and zip'd. + +tar czvf lwip-0.6.3.tar.gz lwip-0.6.3 +tar cjvf lwip-0.6.3.tar.bz2 lwip-0.6.3 +zip -r lwip-0.6.3.zip lwip-0.6.3 + +Now, sign the archives with a detached GPG binary signature as follows: + +gpg -b lwip-0.6.3.tar.gz +gpg -b lwip-0.6.3.tar.bz2 +gpg -b lwip-0.6.3.zip + +Upload these files using anonymous FTP: +ncftp ftp://savannah.gnu.org/incoming/savannah/lwip + +ncftp>mput *0.6.3.* + +Additionally, you may post a news item on Savannah, like this: + +A new 0.6.3 release is now available here: +http://savannah.nongnu.org/files/?group=lwip&highlight=0.6.3 + +You will have to submit this via the user News interface, then approve +this via the Administrator News interface. \ No newline at end of file diff --git a/bertos/net/lwip/doc/snmp_agent.txt b/bertos/net/lwip/doc/snmp_agent.txt new file mode 100644 index 0000000..9b58616 --- /dev/null +++ b/bertos/net/lwip/doc/snmp_agent.txt @@ -0,0 +1,181 @@ +SNMPv1 agent for lwIP + +Author: Christiaan Simons + +This is a brief introduction how to use and configure the SNMP agent. +Note the agent uses the raw-API UDP interface so you may also want to +read rawapi.txt to gain a better understanding of the SNMP message handling. + +0 Agent Capabilities +==================== + +SNMPv1 per RFC1157 + This is an old(er) standard but is still widely supported. + For SNMPv2c and v3 have a greater complexity and need many + more lines of code. IMHO this breaks the idea of "lightweight IP". + + Note the S in SNMP stands for "Simple". Note that "Simple" is + relative. SNMP is simple compared to the complex ISO network + management protocols CMIP (Common Management Information Protocol) + and CMOT (CMip Over Tcp). + +MIB II per RFC1213 + The standard lwIP stack management information base. + This is a required MIB, so this is always enabled. + When builing lwIP without TCP, the mib-2.tcp group is omitted. + The groups EGP, CMOT and transmission are disabled by default. + + Most mib-2 objects are not writable except: + sysName, sysLocation, sysContact, snmpEnableAuthenTraps. + Writing to or changing the ARP and IP address and route + tables is not possible. + + Note lwIP has a very limited notion of IP routing. It currently + doen't have a route table and doesn't have a notion of the U,G,H flags. + Instead lwIP uses the interface list with only one default interface + acting as a single gateway interface (G) for the default route. + + The agent returns a "virtual table" with the default route 0.0.0.0 + for the default interface and network routes (no H) for each + network interface in the netif_list. + All routes are considered to be up (U). + +Loading additional MIBs + MIBs can only be added in compile-time, not in run-time. + There is no MIB compiler thus additional MIBs must be hand coded. + +Large SNMP message support + The packet decoding and encoding routines are designed + to use pbuf-chains. Larger payloads then the minimum + SNMP requirement of 484 octets are supported if the + PBUF_POOL_SIZE and IP_REASS_BUFSIZE are set to match your + local requirement. + +1 Building the Agent +==================== + +First of all you'll need to add the following define +to your local lwipopts.h: + +#define LWIP_SNMP 1 + +and add the source files in lwip/src/core/snmp +and some snmp headers in lwip/src/include/lwip to your makefile. + +Note you'll might need to adapt you network driver to update +the mib2 variables for your interface. + +2 Running the Agent +=================== + +The following function calls must be made in your program to +actually get the SNMP agent running. + +Before starting the agent you should supply pointers +to non-volatile memory for sysContact, sysLocation, +and snmpEnableAuthenTraps. You can do this by calling + +snmp_set_syscontact() +snmp_set_syslocation() +snmp_set_snmpenableauthentraps() + +Additionally you may want to set + +snmp_set_sysdescr() +snmp_set_sysobjid() (if you have a private MIB) +snmp_set_sysname() + +Also before starting the agent you need to setup +one or more trap destinations using these calls: + +snmp_trap_dst_enable(); +snmp_trap_dst_ip_set(); + +In the lwIP initialisation sequence call snmp_init() just after +the call to udp_init(). + +Exactly every 10 msec the SNMP uptime timestamp must be updated with +snmp_inc_sysuptime(). You should call this from a timer interrupt +or a timer signal handler depending on your runtime environment. + +An alternative way to update the SNMP uptime timestamp is to do a call like +snmp_add_sysuptime(100) each 1000ms (which is bigger "step", but call to +a lower frequency). Another one is to not call snmp_inc_sysuptime() or +snmp_add_sysuptime(), and to define the SNMP_GET_SYSUPTIME(sysuptime) macro. +This one is undefined by default in mib2.c. SNMP_GET_SYSUPTIME is called inside +snmp_get_sysuptime(u32_t *value), and enable to change "sysuptime" value only +when it's queried (any function which need "sysuptime" have to call +snmp_get_sysuptime). + + +3 Private MIBs +============== + +If want to extend the agent with your own private MIB you'll need to +add the following define to your local lwipopts.h: + +#define SNMP_PRIVATE_MIB 1 + +You must provide the private_mib.h and associated files yourself. +Note we don't have a "MIB compiler" that generates C source from a MIB, +so you're required to do some serious coding if you enable this! + +Note the lwIP enterprise ID (26381) is assigned to the lwIP project, +ALL OBJECT IDENTIFIERS LIVING UNDER THIS ID ARE ASSIGNED BY THE lwIP +MAINTAINERS! + +If you need to create your own private MIB you'll need +to apply for your own enterprise ID with IANA: http://www.iana.org/numbers.html + +You can set it by passing a struct snmp_obj_id to the agent +using snmp_set_sysobjid(&my_object_id), just before snmp_init(). + +Note the object identifiers for thes MIB-2 and your private MIB +tree must be kept in sorted ascending (lexicographical) order. +This to ensure correct getnext operation. + +An example for a private MIB is part of the "minimal Unix" project: +contrib/ports/unix/proj/minimal/lwip_prvmib.c + +The next chapter gives a more detailed description of the +MIB-2 tree and the optional private MIB. + +4 The Gory Details +================== + +4.0 Object identifiers and the MIB tree. + +We have three distinct parts for all object identifiers: + +The prefix + .iso.org.dod.internet + +the middle part + .mgmt.mib-2.ip.ipNetToMediaTable.ipNetToMediaEntry.ipNetToMediaPhysAddress + +and the index part + .1.192.168.0.1 + +Objects located above the .internet hierarchy aren't supported. +Currently only the .mgmt sub-tree is available and +when the SNMP_PRIVATE_MIB is enabled the .private tree +becomes available too. + +Object identifiers from incoming requests are checked +for a matching prefix, middle part and index part +or are expanded(*) for GetNext requests with short +or inexisting names in the request. +(* we call this "expansion" but this also +resembles the "auto-completion" operation) + +The middle part is usually located in ROM (const) +to preserve precious RAM on small microcontrollers. +However RAM location is possible for an dynamically +changing private tree. + +The index part is handled by functions which in +turn use dynamically allocated index trees from RAM. +These trees are updated by e.g. the etharp code +when new entries are made or removed form the ARP cache. + +/** @todo more gory details */ diff --git a/bertos/net/lwip/doc/sys_arch.txt b/bertos/net/lwip/doc/sys_arch.txt new file mode 100644 index 0000000..66310a9 --- /dev/null +++ b/bertos/net/lwip/doc/sys_arch.txt @@ -0,0 +1,228 @@ +sys_arch interface for lwIP 0.6++ + +Author: Adam Dunkels + +The operating system emulation layer provides a common interface +between the lwIP code and the underlying operating system kernel. The +general idea is that porting lwIP to new architectures requires only +small changes to a few header files and a new sys_arch +implementation. It is also possible to do a sys_arch implementation +that does not rely on any underlying operating system. + +The sys_arch provides semaphores and mailboxes to lwIP. For the full +lwIP functionality, multiple threads support can be implemented in the +sys_arch, but this is not required for the basic lwIP +functionality. Previous versions of lwIP required the sys_arch to +implement timer scheduling as well but as of lwIP 0.5 this is +implemented in a higher layer. + +In addition to the source file providing the functionality of sys_arch, +the OS emulation layer must provide several header files defining +macros used throughout lwip. The files required and the macros they +must define are listed below the sys_arch description. + +Semaphores can be either counting or binary - lwIP works with both +kinds. Mailboxes are used for message passing and can be implemented +either as a queue which allows multiple messages to be posted to a +mailbox, or as a rendez-vous point where only one message can be +posted at a time. lwIP works with both kinds, but the former type will +be more efficient. A message in a mailbox is just a pointer, nothing +more. + +Semaphores are represented by the type "sys_sem_t" which is typedef'd +in the sys_arch.h file. Mailboxes are equivalently represented by the +type "sys_mbox_t". lwIP does not place any restrictions on how +sys_sem_t or sys_mbox_t are represented internally. + +The following functions must be implemented by the sys_arch: + +- void sys_init(void) + + Is called to initialize the sys_arch layer. + +- sys_sem_t sys_sem_new(u8_t count) + + Creates and returns a new semaphore. The "count" argument specifies + the initial state of the semaphore. + +- void sys_sem_free(sys_sem_t sem) + + Deallocates a semaphore. + +- void sys_sem_signal(sys_sem_t sem) + + Signals a semaphore. + +- u32_t sys_arch_sem_wait(sys_sem_t sem, u32_t timeout) + + Blocks the thread while waiting for the semaphore to be + signaled. If the "timeout" argument is non-zero, the thread should + only be blocked for the specified time (measured in + milliseconds). If the "timeout" argument is zero, the thread should be + blocked until the semaphore is signalled. + + If the timeout argument is non-zero, the return value is the number of + milliseconds spent waiting for the semaphore to be signaled. If the + semaphore wasn't signaled within the specified time, the return value is + SYS_ARCH_TIMEOUT. If the thread didn't have to wait for the semaphore + (i.e., it was already signaled), the function may return zero. + + Notice that lwIP implements a function with a similar name, + sys_sem_wait(), that uses the sys_arch_sem_wait() function. + +- sys_mbox_t sys_mbox_new(int size) + + Creates an empty mailbox for maximum "size" elements. Elements stored + in mailboxes are pointers. You have to define macros "_MBOX_SIZE" + in your lwipopts.h, or ignore this parameter in your implementation + and use a default size. + +- void sys_mbox_free(sys_mbox_t mbox) + + Deallocates a mailbox. If there are messages still present in the + mailbox when the mailbox is deallocated, it is an indication of a + programming error in lwIP and the developer should be notified. + +- void sys_mbox_post(sys_mbox_t mbox, void *msg) + + Posts the "msg" to the mailbox. This function have to block until + the "msg" is really posted. + +- err_t sys_mbox_trypost(sys_mbox_t mbox, void *msg) + + Try to post the "msg" to the mailbox. Returns ERR_MEM if this one + is full, else, ERR_OK if the "msg" is posted. + +- u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout) + + Blocks the thread until a message arrives in the mailbox, but does + not block the thread longer than "timeout" milliseconds (similar to + the sys_arch_sem_wait() function). If "timeout" is 0, the thread should + be blocked until a message arrives. The "msg" argument is a result + parameter that is set by the function (i.e., by doing "*msg = + ptr"). The "msg" parameter maybe NULL to indicate that the message + should be dropped. + + The return values are the same as for the sys_arch_sem_wait() function: + Number of milliseconds spent waiting or SYS_ARCH_TIMEOUT if there was a + timeout. + + Note that a function with a similar name, sys_mbox_fetch(), is + implemented by lwIP. + +- u32_t sys_arch_mbox_tryfetch(sys_mbox_t mbox, void **msg) + + This is similar to sys_arch_mbox_fetch, however if a message is not + present in the mailbox, it immediately returns with the code + SYS_MBOX_EMPTY. On success 0 is returned. + + To allow for efficient implementations, this can be defined as a + function-like macro in sys_arch.h instead of a normal function. For + example, a naive implementation could be: + #define sys_arch_mbox_tryfetch(mbox,msg) \ + sys_arch_mbox_fetch(mbox,msg,1) + although this would introduce unnecessary delays. + +- struct sys_timeouts *sys_arch_timeouts(void) + + Returns a pointer to the per-thread sys_timeouts structure. In lwIP, + each thread has a list of timeouts which is repressented as a linked + list of sys_timeout structures. The sys_timeouts structure holds a + pointer to a linked list of timeouts. This function is called by + the lwIP timeout scheduler and must not return a NULL value. + + In a single thread sys_arch implementation, this function will + simply return a pointer to a global sys_timeouts variable stored in + the sys_arch module. + +If threads are supported by the underlying operating system and if +such functionality is needed in lwIP, the following function will have +to be implemented as well: + +- sys_thread_t sys_thread_new(char *name, void (* thread)(void *arg), void *arg, int stacksize, int prio) + + Starts a new thread named "name" with priority "prio" that will begin its + execution in the function "thread()". The "arg" argument will be passed as an + argument to the thread() function. The stack size to used for this thread is + the "stacksize" parameter. The id of the new thread is returned. Both the id + and the priority are system dependent. + +- sys_prot_t sys_arch_protect(void) + + This optional function does a "fast" critical region protection and returns + the previous protection level. This function is only called during very short + critical regions. An embedded system which supports ISR-based drivers might + want to implement this function by disabling interrupts. Task-based systems + might want to implement this by using a mutex or disabling tasking. This + function should support recursive calls from the same task or interrupt. In + other words, sys_arch_protect() could be called while already protected. In + that case the return value indicates that it is already protected. + + sys_arch_protect() is only required if your port is supporting an operating + system. + +- void sys_arch_unprotect(sys_prot_t pval) + + This optional function does a "fast" set of critical region protection to the + value specified by pval. See the documentation for sys_arch_protect() for + more information. This function is only required if your port is supporting + an operating system. + +Note: + +Be carefull with using mem_malloc() in sys_arch. When malloc() refers to +mem_malloc() you can run into a circular function call problem. In mem.c +mem_init() tries to allcate a semaphore using mem_malloc, which of course +can't be performed when sys_arch uses mem_malloc. + +------------------------------------------------------------------------------- +Additional files required for the "OS support" emulation layer: +------------------------------------------------------------------------------- + +cc.h - Architecture environment, some compiler specific, some + environment specific (probably should move env stuff + to sys_arch.h.) + + Typedefs for the types used by lwip - + u8_t, s8_t, u16_t, s16_t, u32_t, s32_t, mem_ptr_t + + Compiler hints for packing lwip's structures - + PACK_STRUCT_FIELD(x) + PACK_STRUCT_STRUCT + PACK_STRUCT_BEGIN + PACK_STRUCT_END + + Platform specific diagnostic output - + LWIP_PLATFORM_DIAG(x) - non-fatal, print a message. + LWIP_PLATFORM_ASSERT(x) - fatal, print message and abandon execution. + Portability defines for printf formatters: + U16_F, S16_F, X16_F, U32_F, S32_F, X32_F, SZT_F + + "lightweight" synchronization mechanisms - + SYS_ARCH_DECL_PROTECT(x) - declare a protection state variable. + SYS_ARCH_PROTECT(x) - enter protection mode. + SYS_ARCH_UNPROTECT(x) - leave protection mode. + + If the compiler does not provide memset() this file must include a + definition of it, or include a file which defines it. + + This file must either include a system-local which defines + the standard *nix error codes, or it should #define LWIP_PROVIDE_ERRNO + to make lwip/arch.h define the codes which are used throughout. + + +perf.h - Architecture specific performance measurement. + Measurement calls made throughout lwip, these can be defined to nothing. + PERF_START - start measuring something. + PERF_STOP(x) - stop measuring something, and record the result. + +sys_arch.h - Tied to sys_arch.c + + Arch dependent types for the following objects: + sys_sem_t, sys_mbox_t, sys_thread_t, + And, optionally: + sys_prot_t + + Defines to set vars of sys_mbox_t and sys_sem_t to NULL. + SYS_MBOX_NULL NULL + SYS_SEM_NULL NULL diff --git a/bertos/net/lwip/src/FILES b/bertos/net/lwip/src/FILES new file mode 100644 index 0000000..952aeab --- /dev/null +++ b/bertos/net/lwip/src/FILES @@ -0,0 +1,13 @@ +api/ - The code for the high-level wrapper API. Not needed if + you use the lowel-level call-back/raw API. + +core/ - The core of the TPC/IP stack; protocol implementations, + memory and buffer management, and the low-level raw API. + +include/ - lwIP include files. + +netif/ - Generic network interface device drivers are kept here, + as well as the ARP module. + +For more information on the various subdirectories, check the FILES +file in each directory. diff --git a/bertos/net/lwip/src/api/api_lib.c b/bertos/net/lwip/src/api/api_lib.c new file mode 100644 index 0000000..195a9a5 --- /dev/null +++ b/bertos/net/lwip/src/api/api_lib.c @@ -0,0 +1,558 @@ +/** + * @file + * Sequential API External module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +/* This is the part of the API that is linked with + the application */ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/api.h" +#include "lwip/tcpip.h" +#include "lwip/memp.h" + +#include "lwip/ip.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" + +#include + +/** + * Create a new netconn (of a specific type) that has a callback function. + * The corresponding pcb is also created. + * + * @param t the type of 'connection' to create (@see enum netconn_type) + * @param proto the IP protocol for RAW IP pcbs + * @param callback a function to call on status changes (RX available, TX'ed) + * @return a newly allocated struct netconn or + * NULL on memory error + */ +struct netconn* +netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, netconn_callback callback) +{ + struct netconn *conn; + struct api_msg msg; + + conn = netconn_alloc(t, callback); + if (conn != NULL ) { + msg.function = do_newconn; + msg.msg.msg.n.proto = proto; + msg.msg.conn = conn; + TCPIP_APIMSG(&msg); + + if (conn->err != ERR_OK) { + LWIP_ASSERT("freeing conn without freeing pcb", conn->pcb.tcp == NULL); + LWIP_ASSERT("conn has no op_completed", conn->op_completed != SYS_SEM_NULL); + LWIP_ASSERT("conn has no recvmbox", conn->recvmbox != SYS_MBOX_NULL); + LWIP_ASSERT("conn->acceptmbox shouldn't exist", conn->acceptmbox == SYS_MBOX_NULL); + sys_sem_free(conn->op_completed); + sys_mbox_free(conn->recvmbox); + memp_free(MEMP_NETCONN, conn); + return NULL; + } + } + return conn; +} + +/** + * Close a netconn 'connection' and free its resources. + * UDP and RAW connection are completely closed, TCP pcbs might still be in a waitstate + * after this returns. + * + * @param conn the netconn to delete + * @return ERR_OK if the connection was deleted + */ +err_t +netconn_delete(struct netconn *conn) +{ + struct api_msg msg; + + /* No ASSERT here because possible to get a (conn == NULL) if we got an accept error */ + if (conn == NULL) { + return ERR_OK; + } + + msg.function = do_delconn; + msg.msg.conn = conn; + tcpip_apimsg(&msg); + + conn->pcb.tcp = NULL; + netconn_free(conn); + + return ERR_OK; +} + +/** + * Get the local or remote IP address and port of a netconn. + * For RAW netconns, this returns the protocol instead of a port! + * + * @param conn the netconn to query + * @param addr a pointer to which to save the IP address + * @param port a pointer to which to save the port (or protocol for RAW) + * @param local 1 to get the local IP address, 0 to get the remote one + * @return ERR_CONN for invalid connections + * ERR_OK if the information was retrieved + */ +err_t +netconn_getaddr(struct netconn *conn, struct ip_addr *addr, u16_t *port, u8_t local) +{ + struct api_msg msg; + + LWIP_ERROR("netconn_getaddr: invalid conn", (conn != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_getaddr: invalid addr", (addr != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_getaddr: invalid port", (port != NULL), return ERR_ARG;); + + msg.function = do_getaddr; + msg.msg.conn = conn; + msg.msg.msg.ad.ipaddr = addr; + msg.msg.msg.ad.port = port; + msg.msg.msg.ad.local = local; + TCPIP_APIMSG(&msg); + + return conn->err; +} + +/** + * Bind a netconn to a specific local IP address and port. + * Binding one netconn twice might not always be checked correctly! + * + * @param conn the netconn to bind + * @param addr the local IP address to bind the netconn to (use IP_ADDR_ANY + * to bind to all addresses) + * @param port the local port to bind the netconn to (not used for RAW) + * @return ERR_OK if bound, any other err_t on failure + */ +err_t +netconn_bind(struct netconn *conn, struct ip_addr *addr, u16_t port) +{ + struct api_msg msg; + + LWIP_ERROR("netconn_bind: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_bind; + msg.msg.conn = conn; + msg.msg.msg.bc.ipaddr = addr; + msg.msg.msg.bc.port = port; + TCPIP_APIMSG(&msg); + return conn->err; +} + +/** + * Connect a netconn to a specific remote IP address and port. + * + * @param conn the netconn to connect + * @param addr the remote IP address to connect to + * @param port the remote port to connect to (no used for RAW) + * @return ERR_OK if connected, return value of tcp_/udp_/raw_connect otherwise + */ +err_t +netconn_connect(struct netconn *conn, struct ip_addr *addr, u16_t port) +{ + struct api_msg msg; + + LWIP_ERROR("netconn_connect: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_connect; + msg.msg.conn = conn; + msg.msg.msg.bc.ipaddr = addr; + msg.msg.msg.bc.port = port; + /* This is the only function which need to not block tcpip_thread */ + tcpip_apimsg(&msg); + return conn->err; +} + +/** + * Disconnect a netconn from its current peer (only valid for UDP netconns). + * + * @param conn the netconn to disconnect + * @return TODO: return value is not set here... + */ +err_t +netconn_disconnect(struct netconn *conn) +{ + struct api_msg msg; + + LWIP_ERROR("netconn_disconnect: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_disconnect; + msg.msg.conn = conn; + TCPIP_APIMSG(&msg); + return conn->err; +} + +/** + * Set a TCP netconn into listen mode + * + * @param conn the tcp netconn to set to listen mode + * @param backlog the listen backlog, only used if TCP_LISTEN_BACKLOG==1 + * @return ERR_OK if the netconn was set to listen (UDP and RAW netconns + * don't return any error (yet?)) + */ +err_t +netconn_listen_with_backlog(struct netconn *conn, u8_t backlog) +{ + struct api_msg msg; + + /* This does no harm. If TCP_LISTEN_BACKLOG is off, backlog is unused. */ + LWIP_UNUSED_ARG(backlog); + + LWIP_ERROR("netconn_listen: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_listen; + msg.msg.conn = conn; +#if TCP_LISTEN_BACKLOG + msg.msg.msg.lb.backlog = backlog; +#endif /* TCP_LISTEN_BACKLOG */ + TCPIP_APIMSG(&msg); + return conn->err; +} + +/** + * Accept a new connection on a TCP listening netconn. + * + * @param conn the TCP listen netconn + * @return the newly accepted netconn or NULL on timeout + */ +struct netconn * +netconn_accept(struct netconn *conn) +{ + struct netconn *newconn; + + LWIP_ERROR("netconn_accept: invalid conn", (conn != NULL), return NULL;); + LWIP_ERROR("netconn_accept: invalid acceptmbox", (conn->acceptmbox != SYS_MBOX_NULL), return NULL;); + +#if LWIP_SO_RCVTIMEO + if (sys_arch_mbox_fetch(conn->acceptmbox, (void *)&newconn, conn->recv_timeout) == SYS_ARCH_TIMEOUT) { + newconn = NULL; + } else +#else + sys_arch_mbox_fetch(conn->acceptmbox, (void *)&newconn, 0); +#endif /* LWIP_SO_RCVTIMEO*/ + { + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVMINUS, 0); + +#if TCP_LISTEN_BACKLOG + if (newconn != NULL) { + /* Let the stack know that we have accepted the connection. */ + struct api_msg msg; + msg.function = do_recv; + msg.msg.conn = conn; + TCPIP_APIMSG(&msg); + } +#endif /* TCP_LISTEN_BACKLOG */ + } + + return newconn; +} + +/** + * Receive data (in form of a netbuf containing a packet buffer) from a netconn + * + * @param conn the netconn from which to receive data + * @return a new netbuf containing received data or NULL on memory error or timeout + */ +struct netbuf * +netconn_recv(struct netconn *conn) +{ + struct api_msg msg; + struct netbuf *buf = NULL; + struct pbuf *p; + u16_t len; + + LWIP_ERROR("netconn_recv: invalid conn", (conn != NULL), return NULL;); + + if (conn->recvmbox == SYS_MBOX_NULL) { + /* @todo: should calling netconn_recv on a TCP listen conn be fatal (ERR_CONN)?? */ + /* TCP listen conns don't have a recvmbox! */ + conn->err = ERR_CONN; + return NULL; + } + + if (ERR_IS_FATAL(conn->err)) { + return NULL; + } + + if (conn->type == NETCONN_TCP) { +#if LWIP_TCP + if (conn->state == NETCONN_LISTEN) { + /* @todo: should calling netconn_recv on a TCP listen conn be fatal?? */ + conn->err = ERR_CONN; + return NULL; + } + + buf = memp_malloc(MEMP_NETBUF); + + if (buf == NULL) { + conn->err = ERR_MEM; + return NULL; + } + +#if LWIP_SO_RCVTIMEO + if (sys_arch_mbox_fetch(conn->recvmbox, (void *)&p, conn->recv_timeout)==SYS_ARCH_TIMEOUT) { + memp_free(MEMP_NETBUF, buf); + conn->err = ERR_TIMEOUT; + return NULL; + } +#else + sys_arch_mbox_fetch(conn->recvmbox, (void *)&p, 0); +#endif /* LWIP_SO_RCVTIMEO*/ + + if (p != NULL) { + len = p->tot_len; + SYS_ARCH_DEC(conn->recv_avail, len); + } else { + len = 0; + } + + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVMINUS, len); + + /* If we are closed, we indicate that we no longer wish to use the socket */ + if (p == NULL) { + memp_free(MEMP_NETBUF, buf); + /* Avoid to lose any previous error code */ + if (conn->err == ERR_OK) { + conn->err = ERR_CLSD; + } + return NULL; + } + + buf->p = p; + buf->ptr = p; + buf->port = 0; + buf->addr = NULL; + + /* Let the stack know that we have taken the data. */ + msg.function = do_recv; + msg.msg.conn = conn; + if (buf != NULL) { + msg.msg.msg.r.len = buf->p->tot_len; + } else { + msg.msg.msg.r.len = 1; + } + TCPIP_APIMSG(&msg); +#endif /* LWIP_TCP */ + } else { +#if (LWIP_UDP || LWIP_RAW) +#if LWIP_SO_RCVTIMEO + if (sys_arch_mbox_fetch(conn->recvmbox, (void *)&buf, conn->recv_timeout)==SYS_ARCH_TIMEOUT) { + buf = NULL; + } +#else + sys_arch_mbox_fetch(conn->recvmbox, (void *)&buf, 0); +#endif /* LWIP_SO_RCVTIMEO*/ + if (buf!=NULL) { + SYS_ARCH_DEC(conn->recv_avail, buf->p->tot_len); + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVMINUS, buf->p->tot_len); + } +#endif /* (LWIP_UDP || LWIP_RAW) */ + } + + LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_recv: received %p (err %d)\n", (void *)buf, conn->err)); + + return buf; +} + +/** + * Send data (in form of a netbuf) to a specific remote IP address and port. + * Only to be used for UDP and RAW netconns (not TCP). + * + * @param conn the netconn over which to send data + * @param buf a netbuf containing the data to send + * @param addr the remote IP address to which to send the data + * @param port the remote port to which to send the data + * @return ERR_OK if data was sent, any other err_t on error + */ +err_t +netconn_sendto(struct netconn *conn, struct netbuf *buf, struct ip_addr *addr, u16_t port) +{ + if (buf != NULL) { + buf->addr = addr; + buf->port = port; + return netconn_send(conn, buf); + } + return ERR_VAL; +} + +/** + * Send data over a UDP or RAW netconn (that is already connected). + * + * @param conn the UDP or RAW netconn over which to send data + * @param buf a netbuf containing the data to send + * @return ERR_OK if data was sent, any other err_t on error + */ +err_t +netconn_send(struct netconn *conn, struct netbuf *buf) +{ + struct api_msg msg; + + LWIP_ERROR("netconn_send: invalid conn", (conn != NULL), return ERR_ARG;); + + LWIP_DEBUGF(API_LIB_DEBUG, ("netconn_send: sending %"U16_F" bytes\n", buf->p->tot_len)); + msg.function = do_send; + msg.msg.conn = conn; + msg.msg.msg.b = buf; + TCPIP_APIMSG(&msg); + return conn->err; +} + +/** + * Send data over a TCP netconn. + * + * @param conn the TCP netconn over which to send data + * @param dataptr pointer to the application buffer that contains the data to send + * @param size size of the application data to send + * @param apiflags combination of following flags : + * - NETCONN_COPY (0x01) data will be copied into memory belonging to the stack + * - NETCONN_MORE (0x02) for TCP connection, PSH flag will be set on last segment sent + * @return ERR_OK if data was sent, any other err_t on error + */ +err_t +netconn_write(struct netconn *conn, const void *dataptr, size_t size, u8_t apiflags) +{ + struct api_msg msg; + + LWIP_ERROR("netconn_write: invalid conn", (conn != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_write: invalid conn->type", (conn->type == NETCONN_TCP), return ERR_VAL;); + + msg.function = do_write; + msg.msg.conn = conn; + msg.msg.msg.w.dataptr = dataptr; + msg.msg.msg.w.apiflags = apiflags; + msg.msg.msg.w.len = size; + /* For locking the core: this _can_ be delayed on low memory/low send buffer, + but if it is, this is done inside api_msg.c:do_write(), so we can use the + non-blocking version here. */ + TCPIP_APIMSG(&msg); + return conn->err; +} + +/** + * Close a TCP netconn (doesn't delete it). + * + * @param conn the TCP netconn to close + * @return ERR_OK if the netconn was closed, any other err_t on error + */ +err_t +netconn_close(struct netconn *conn) +{ + struct api_msg msg; + + LWIP_ERROR("netconn_close: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_close; + msg.msg.conn = conn; + tcpip_apimsg(&msg); + return conn->err; +} + +#if LWIP_IGMP +/** + * Join multicast groups for UDP netconns. + * + * @param conn the UDP netconn for which to change multicast addresses + * @param multiaddr IP address of the multicast group to join or leave + * @param interface the IP address of the network interface on which to send + * the igmp message + * @param join_or_leave flag whether to send a join- or leave-message + * @return ERR_OK if the action was taken, any err_t on error + */ +err_t +netconn_join_leave_group(struct netconn *conn, + struct ip_addr *multiaddr, + struct ip_addr *interface, + enum netconn_igmp join_or_leave) +{ + struct api_msg msg; + + LWIP_ERROR("netconn_join_leave_group: invalid conn", (conn != NULL), return ERR_ARG;); + + msg.function = do_join_leave_group; + msg.msg.conn = conn; + msg.msg.msg.jl.multiaddr = multiaddr; + msg.msg.msg.jl.interface = interface; + msg.msg.msg.jl.join_or_leave = join_or_leave; + TCPIP_APIMSG(&msg); + return conn->err; +} +#endif /* LWIP_IGMP */ + +#if LWIP_DNS +/** + * Execute a DNS query, only one IP address is returned + * + * @param name a string representation of the DNS host name to query + * @param addr a preallocated struct ip_addr where to store the resolved IP address + * @return ERR_OK: resolving succeeded + * ERR_MEM: memory error, try again later + * ERR_ARG: dns client not initialized or invalid hostname + * ERR_VAL: dns server response was invalid + */ +err_t +netconn_gethostbyname(const char *name, struct ip_addr *addr) +{ + struct dns_api_msg msg; + err_t err; + sys_sem_t sem; + + LWIP_ERROR("netconn_gethostbyname: invalid name", (name != NULL), return ERR_ARG;); + LWIP_ERROR("netconn_gethostbyname: invalid addr", (addr != NULL), return ERR_ARG;); + + sem = sys_sem_new(0); + if (sem == SYS_SEM_NULL) { + return ERR_MEM; + } + + msg.name = name; + msg.addr = addr; + msg.err = &err; + msg.sem = sem; + + tcpip_callback(do_gethostbyname, &msg); + sys_sem_wait(sem); + sys_sem_free(sem); + + return err; +} +#endif /* LWIP_DNS*/ + +#endif /* LWIP_NETCONN */ diff --git a/bertos/net/lwip/src/api/api_msg.c b/bertos/net/lwip/src/api/api_msg.c new file mode 100644 index 0000000..46c9abf --- /dev/null +++ b/bertos/net/lwip/src/api/api_msg.c @@ -0,0 +1,1243 @@ +/** + * @file + * Sequential API Internal module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/api_msg.h" + +#include "lwip/ip.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" +#include "lwip/raw.h" + +#include "lwip/memp.h" +#include "lwip/tcpip.h" +#include "lwip/igmp.h" +#include "lwip/dns.h" + +#include + +/* forward declarations */ +#if LWIP_TCP +static err_t do_writemore(struct netconn *conn); +static void do_close_internal(struct netconn *conn); +#endif + +#if LWIP_RAW +/** + * Receive callback function for RAW netconns. + * Doesn't 'eat' the packet, only references it and sends it to + * conn->recvmbox + * + * @see raw.h (struct raw_pcb.recv) for parameters and return value + */ +static u8_t +recv_raw(void *arg, struct raw_pcb *pcb, struct pbuf *p, + struct ip_addr *addr) +{ + struct pbuf *q; + struct netbuf *buf; + struct netconn *conn; +#if LWIP_SO_RCVBUF + int recv_avail; +#endif /* LWIP_SO_RCVBUF */ + + LWIP_UNUSED_ARG(addr); + conn = arg; + +#if LWIP_SO_RCVBUF + SYS_ARCH_GET(conn->recv_avail, recv_avail); + if ((conn != NULL) && (conn->recvmbox != SYS_MBOX_NULL) && + ((recv_avail + (int)(p->tot_len)) <= conn->recv_bufsize)) { +#else /* LWIP_SO_RCVBUF */ + if ((conn != NULL) && (conn->recvmbox != SYS_MBOX_NULL)) { +#endif /* LWIP_SO_RCVBUF */ + /* copy the whole packet into new pbufs */ + q = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); + if(q != NULL) { + if (pbuf_copy(q, p) != ERR_OK) { + pbuf_free(q); + q = NULL; + } + } + + if(q != NULL) { + buf = memp_malloc(MEMP_NETBUF); + if (buf == NULL) { + pbuf_free(q); + return 0; + } + + buf->p = q; + buf->ptr = q; + buf->addr = &(((struct ip_hdr*)(q->payload))->src); + buf->port = pcb->protocol; + + if (sys_mbox_trypost(conn->recvmbox, buf) != ERR_OK) { + netbuf_delete(buf); + return 0; + } else { + SYS_ARCH_INC(conn->recv_avail, q->tot_len); + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, q->tot_len); + } + } + } + + return 0; /* do not eat the packet */ +} +#endif /* LWIP_RAW*/ + +#if LWIP_UDP +/** + * Receive callback function for UDP netconns. + * Posts the packet to conn->recvmbox or deletes it on memory error. + * + * @see udp.h (struct udp_pcb.recv) for parameters + */ +static void +recv_udp(void *arg, struct udp_pcb *pcb, struct pbuf *p, + struct ip_addr *addr, u16_t port) +{ + struct netbuf *buf; + struct netconn *conn; +#if LWIP_SO_RCVBUF + int recv_avail; +#endif /* LWIP_SO_RCVBUF */ + + LWIP_UNUSED_ARG(pcb); /* only used for asserts... */ + LWIP_ASSERT("recv_udp must have a pcb argument", pcb != NULL); + LWIP_ASSERT("recv_udp must have an argument", arg != NULL); + conn = arg; + LWIP_ASSERT("recv_udp: recv for wrong pcb!", conn->pcb.udp == pcb); + +#if LWIP_SO_RCVBUF + SYS_ARCH_GET(conn->recv_avail, recv_avail); + if ((conn == NULL) || (conn->recvmbox == SYS_MBOX_NULL) || + ((recv_avail + (int)(p->tot_len)) > conn->recv_bufsize)) { +#else /* LWIP_SO_RCVBUF */ + if ((conn == NULL) || (conn->recvmbox == SYS_MBOX_NULL)) { +#endif /* LWIP_SO_RCVBUF */ + pbuf_free(p); + return; + } + + buf = memp_malloc(MEMP_NETBUF); + if (buf == NULL) { + pbuf_free(p); + return; + } else { + buf->p = p; + buf->ptr = p; + buf->addr = addr; + buf->port = port; +#if LWIP_NETBUF_RECVINFO + { + const struct ip_hdr* iphdr = ip_current_header(); + /* get the UDP header - always in the first pbuf, ensured by udp_input */ + const struct udp_hdr* udphdr = (void*)(((char*)iphdr) + IPH_LEN(iphdr)); + buf->toaddr = (struct ip_addr*)&iphdr->dest; + buf->toport = udphdr->dest; + } +#endif /* LWIP_NETBUF_RECVINFO */ + } + + if (sys_mbox_trypost(conn->recvmbox, buf) != ERR_OK) { + netbuf_delete(buf); + return; + } else { + SYS_ARCH_INC(conn->recv_avail, p->tot_len); + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, p->tot_len); + } +} +#endif /* LWIP_UDP */ + +#if LWIP_TCP +/** + * Receive callback function for TCP netconns. + * Posts the packet to conn->recvmbox, but doesn't delete it on errors. + * + * @see tcp.h (struct tcp_pcb.recv) for parameters and return value + */ +static err_t +recv_tcp(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + struct netconn *conn; + u16_t len; + + LWIP_UNUSED_ARG(pcb); + LWIP_ASSERT("recv_tcp must have a pcb argument", pcb != NULL); + LWIP_ASSERT("recv_tcp must have an argument", arg != NULL); + conn = arg; + LWIP_ASSERT("recv_tcp: recv for wrong pcb!", conn->pcb.tcp == pcb); + + if ((conn == NULL) || (conn->recvmbox == SYS_MBOX_NULL)) { + return ERR_VAL; + } + + conn->err = err; + if (p != NULL) { + len = p->tot_len; + SYS_ARCH_INC(conn->recv_avail, len); + } else { + len = 0; + } + + if (sys_mbox_trypost(conn->recvmbox, p) != ERR_OK) { + return ERR_MEM; + } else { + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, len); + } + + return ERR_OK; +} + +/** + * Poll callback function for TCP netconns. + * Wakes up an application thread that waits for a connection to close + * or data to be sent. The application thread then takes the + * appropriate action to go on. + * + * Signals the conn->sem. + * netconn_close waits for conn->sem if closing failed. + * + * @see tcp.h (struct tcp_pcb.poll) for parameters and return value + */ +static err_t +poll_tcp(void *arg, struct tcp_pcb *pcb) +{ + struct netconn *conn = arg; + + LWIP_UNUSED_ARG(pcb); + LWIP_ASSERT("conn != NULL", (conn != NULL)); + + if (conn->state == NETCONN_WRITE) { + do_writemore(conn); + } else if (conn->state == NETCONN_CLOSE) { + do_close_internal(conn); + } + + return ERR_OK; +} + +/** + * Sent callback function for TCP netconns. + * Signals the conn->sem and calls API_EVENT. + * netconn_write waits for conn->sem if send buffer is low. + * + * @see tcp.h (struct tcp_pcb.sent) for parameters and return value + */ +static err_t +sent_tcp(void *arg, struct tcp_pcb *pcb, u16_t len) +{ + struct netconn *conn = arg; + + LWIP_UNUSED_ARG(pcb); + LWIP_ASSERT("conn != NULL", (conn != NULL)); + + if (conn->state == NETCONN_WRITE) { + LWIP_ASSERT("conn->pcb.tcp != NULL", conn->pcb.tcp != NULL); + do_writemore(conn); + } else if (conn->state == NETCONN_CLOSE) { + do_close_internal(conn); + } + + if (conn) { + if ((conn->pcb.tcp != NULL) && (tcp_sndbuf(conn->pcb.tcp) > TCP_SNDLOWAT)) { + API_EVENT(conn, NETCONN_EVT_SENDPLUS, len); + } + } + + return ERR_OK; +} + +/** + * Error callback function for TCP netconns. + * Signals conn->sem, posts to all conn mboxes and calls API_EVENT. + * The application thread has then to decide what to do. + * + * @see tcp.h (struct tcp_pcb.err) for parameters + */ +static void +err_tcp(void *arg, err_t err) +{ + struct netconn *conn; + + conn = arg; + LWIP_ASSERT("conn != NULL", (conn != NULL)); + + conn->pcb.tcp = NULL; + + conn->err = err; + if (conn->recvmbox != SYS_MBOX_NULL) { + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0); + sys_mbox_post(conn->recvmbox, NULL); + } + if (conn->op_completed != SYS_SEM_NULL && conn->state == NETCONN_CONNECT) { + conn->state = NETCONN_NONE; + sys_sem_signal(conn->op_completed); + } + if (conn->acceptmbox != SYS_MBOX_NULL) { + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0); + sys_mbox_post(conn->acceptmbox, NULL); + } + if ((conn->state == NETCONN_WRITE) || (conn->state == NETCONN_CLOSE)) { + /* calling do_writemore/do_close_internal is not necessary + since the pcb has already been deleted! */ + conn->state = NETCONN_NONE; + /* wake up the waiting task */ + sys_sem_signal(conn->op_completed); + } +} + +/** + * Setup a tcp_pcb with the correct callback function pointers + * and their arguments. + * + * @param conn the TCP netconn to setup + */ +static void +setup_tcp(struct netconn *conn) +{ + struct tcp_pcb *pcb; + + pcb = conn->pcb.tcp; + tcp_arg(pcb, conn); + tcp_recv(pcb, recv_tcp); + tcp_sent(pcb, sent_tcp); + tcp_poll(pcb, poll_tcp, 4); + tcp_err(pcb, err_tcp); +} + +/** + * Accept callback function for TCP netconns. + * Allocates a new netconn and posts that to conn->acceptmbox. + * + * @see tcp.h (struct tcp_pcb_listen.accept) for parameters and return value + */ +static err_t +accept_function(void *arg, struct tcp_pcb *newpcb, err_t err) +{ + struct netconn *newconn; + struct netconn *conn; + +#if API_MSG_DEBUG +#if TCP_DEBUG + tcp_debug_print_state(newpcb->state); +#endif /* TCP_DEBUG */ +#endif /* API_MSG_DEBUG */ + conn = (struct netconn *)arg; + + LWIP_ERROR("accept_function: invalid conn->acceptmbox", + conn->acceptmbox != SYS_MBOX_NULL, return ERR_VAL;); + + /* We have to set the callback here even though + * the new socket is unknown. conn->socket is marked as -1. */ + newconn = netconn_alloc(conn->type, conn->callback); + if (newconn == NULL) { + return ERR_MEM; + } + newconn->pcb.tcp = newpcb; + setup_tcp(newconn); + newconn->err = err; + + if (sys_mbox_trypost(conn->acceptmbox, newconn) != ERR_OK) { + /* When returning != ERR_OK, the connection is aborted in tcp_process(), + so do nothing here! */ + newconn->pcb.tcp = NULL; + netconn_free(newconn); + return ERR_MEM; + } else { + /* Register event with callback */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0); + } + + return ERR_OK; +} +#endif /* LWIP_TCP */ + +/** + * Create a new pcb of a specific type. + * Called from do_newconn(). + * + * @param msg the api_msg_msg describing the connection type + * @return msg->conn->err, but the return value is currently ignored + */ +static err_t +pcb_new(struct api_msg_msg *msg) +{ + msg->conn->err = ERR_OK; + + LWIP_ASSERT("pcb_new: pcb already allocated", msg->conn->pcb.tcp == NULL); + + /* Allocate a PCB for this connection */ + switch(NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + msg->conn->pcb.raw = raw_new(msg->msg.n.proto); + if(msg->conn->pcb.raw == NULL) { + msg->conn->err = ERR_MEM; + break; + } + raw_recv(msg->conn->pcb.raw, recv_raw, msg->conn); + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + msg->conn->pcb.udp = udp_new(); + if(msg->conn->pcb.udp == NULL) { + msg->conn->err = ERR_MEM; + break; + } +#if LWIP_UDPLITE + if (msg->conn->type==NETCONN_UDPLITE) { + udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_UDPLITE); + } +#endif /* LWIP_UDPLITE */ + if (msg->conn->type==NETCONN_UDPNOCHKSUM) { + udp_setflags(msg->conn->pcb.udp, UDP_FLAGS_NOCHKSUM); + } + udp_recv(msg->conn->pcb.udp, recv_udp, msg->conn); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + msg->conn->pcb.tcp = tcp_new(); + if(msg->conn->pcb.tcp == NULL) { + msg->conn->err = ERR_MEM; + break; + } + setup_tcp(msg->conn); + break; +#endif /* LWIP_TCP */ + default: + /* Unsupported netconn type, e.g. protocol disabled */ + msg->conn->err = ERR_VAL; + break; + } + + return msg->conn->err; +} + +/** + * Create a new pcb of a specific type inside a netconn. + * Called from netconn_new_with_proto_and_callback. + * + * @param msg the api_msg_msg describing the connection type + */ +void +do_newconn(struct api_msg_msg *msg) +{ + if(msg->conn->pcb.tcp == NULL) { + pcb_new(msg); + } + /* Else? This "new" connection already has a PCB allocated. */ + /* Is this an error condition? Should it be deleted? */ + /* We currently just are happy and return. */ + + TCPIP_APIMSG_ACK(msg); +} + +/** + * Create a new netconn (of a specific type) that has a callback function. + * The corresponding pcb is NOT created! + * + * @param t the type of 'connection' to create (@see enum netconn_type) + * @param proto the IP protocol for RAW IP pcbs + * @param callback a function to call on status changes (RX available, TX'ed) + * @return a newly allocated struct netconn or + * NULL on memory error + */ +struct netconn* +netconn_alloc(enum netconn_type t, netconn_callback callback) +{ + struct netconn *conn; + int size; + + conn = memp_malloc(MEMP_NETCONN); + if (conn == NULL) { + return NULL; + } + + conn->err = ERR_OK; + conn->type = t; + conn->pcb.tcp = NULL; + +#if (DEFAULT_RAW_RECVMBOX_SIZE == DEFAULT_UDP_RECVMBOX_SIZE) && \ + (DEFAULT_RAW_RECVMBOX_SIZE == DEFAULT_TCP_RECVMBOX_SIZE) + size = DEFAULT_RAW_RECVMBOX_SIZE; +#else + switch(NETCONNTYPE_GROUP(t)) { +#if LWIP_RAW + case NETCONN_RAW: + size = DEFAULT_RAW_RECVMBOX_SIZE; + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + size = DEFAULT_UDP_RECVMBOX_SIZE; + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + size = DEFAULT_TCP_RECVMBOX_SIZE; + break; +#endif /* LWIP_TCP */ + default: + LWIP_ASSERT("netconn_alloc: undefined netconn_type", 0); + break; + } +#endif + + if ((conn->op_completed = sys_sem_new(0)) == SYS_SEM_NULL) { + memp_free(MEMP_NETCONN, conn); + return NULL; + } + if ((conn->recvmbox = sys_mbox_new(size)) == SYS_MBOX_NULL) { + sys_sem_free(conn->op_completed); + memp_free(MEMP_NETCONN, conn); + return NULL; + } + + conn->acceptmbox = SYS_MBOX_NULL; + conn->state = NETCONN_NONE; + /* initialize socket to -1 since 0 is a valid socket */ + conn->socket = -1; + conn->callback = callback; + conn->recv_avail = 0; +#if LWIP_TCP + conn->write_msg = NULL; + conn->write_offset = 0; +#if LWIP_TCPIP_CORE_LOCKING + conn->write_delayed = 0; +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_TCP */ +#if LWIP_SO_RCVTIMEO + conn->recv_timeout = 0; +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + conn->recv_bufsize = RECV_BUFSIZE_DEFAULT; +#endif /* LWIP_SO_RCVBUF */ + return conn; +} + +/** + * Delete a netconn and all its resources. + * The pcb is NOT freed (since we might not be in the right thread context do this). + * + * @param conn the netconn to free + */ +void +netconn_free(struct netconn *conn) +{ + void *mem; + LWIP_ASSERT("PCB must be deallocated outside this function", conn->pcb.tcp == NULL); + + /* Drain the recvmbox. */ + if (conn->recvmbox != SYS_MBOX_NULL) { + while (sys_mbox_tryfetch(conn->recvmbox, &mem) != SYS_MBOX_EMPTY) { + if (conn->type == NETCONN_TCP) { + if(mem != NULL) { + pbuf_free((struct pbuf *)mem); + } + } else { + netbuf_delete((struct netbuf *)mem); + } + } + sys_mbox_free(conn->recvmbox); + conn->recvmbox = SYS_MBOX_NULL; + } + + /* Drain the acceptmbox. */ + if (conn->acceptmbox != SYS_MBOX_NULL) { + while (sys_mbox_tryfetch(conn->acceptmbox, &mem) != SYS_MBOX_EMPTY) { + netconn_delete((struct netconn *)mem); + } + sys_mbox_free(conn->acceptmbox); + conn->acceptmbox = SYS_MBOX_NULL; + } + + sys_sem_free(conn->op_completed); + conn->op_completed = SYS_SEM_NULL; + + memp_free(MEMP_NETCONN, conn); +} + +#if LWIP_TCP +/** + * Internal helper function to close a TCP netconn: since this sometimes + * doesn't work at the first attempt, this function is called from multiple + * places. + * + * @param conn the TCP netconn to close + */ +static void +do_close_internal(struct netconn *conn) +{ + err_t err; + + LWIP_ASSERT("invalid conn", (conn != NULL)); + LWIP_ASSERT("this is for tcp netconns only", (conn->type == NETCONN_TCP)); + LWIP_ASSERT("conn must be in state NETCONN_CLOSE", (conn->state == NETCONN_CLOSE)); + LWIP_ASSERT("pcb already closed", (conn->pcb.tcp != NULL)); + + /* Set back some callback pointers */ + tcp_arg(conn->pcb.tcp, NULL); + if (conn->pcb.tcp->state == LISTEN) { + tcp_accept(conn->pcb.tcp, NULL); + } else { + tcp_recv(conn->pcb.tcp, NULL); + tcp_accept(conn->pcb.tcp, NULL); + /* some callbacks have to be reset if tcp_close is not successful */ + tcp_sent(conn->pcb.tcp, NULL); + tcp_poll(conn->pcb.tcp, NULL, 4); + tcp_err(conn->pcb.tcp, NULL); + } + /* Try to close the connection */ + err = tcp_close(conn->pcb.tcp); + if (err == ERR_OK) { + /* Closing succeeded */ + conn->state = NETCONN_NONE; + /* Set back some callback pointers as conn is going away */ + conn->pcb.tcp = NULL; + conn->err = ERR_OK; + /* Trigger select() in socket layer. This send should something else so the + errorfd is set, not the read and write fd! */ + API_EVENT(conn, NETCONN_EVT_RCVPLUS, 0); + API_EVENT(conn, NETCONN_EVT_SENDPLUS, 0); + /* wake up the application task */ + sys_sem_signal(conn->op_completed); + } else { + /* Closing failed, restore some of the callbacks */ + /* Closing of listen pcb will never fail! */ + LWIP_ASSERT("Closing a listen pcb may not fail!", (conn->pcb.tcp->state != LISTEN)); + tcp_sent(conn->pcb.tcp, sent_tcp); + tcp_poll(conn->pcb.tcp, poll_tcp, 4); + tcp_err(conn->pcb.tcp, err_tcp); + tcp_arg(conn->pcb.tcp, conn); + } + /* If closing didn't succeed, we get called again either + from poll_tcp or from sent_tcp */ +} +#endif /* LWIP_TCP */ + +/** + * Delete the pcb inside a netconn. + * Called from netconn_delete. + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_delconn(struct api_msg_msg *msg) +{ + if (msg->conn->pcb.tcp != NULL) { + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + raw_remove(msg->conn->pcb.raw); + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + msg->conn->pcb.udp->recv_arg = NULL; + udp_remove(msg->conn->pcb.udp); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + msg->conn->state = NETCONN_CLOSE; + do_close_internal(msg->conn); + /* API_EVENT is called inside do_close_internal, before releasing + the application thread, so we can return at this point! */ + return; +#endif /* LWIP_TCP */ + default: + break; + } + } + /* tcp netconns don't come here! */ + + /* Trigger select() in socket layer. This send should something else so the + errorfd is set, not the read and write fd! */ + API_EVENT(msg->conn, NETCONN_EVT_RCVPLUS, 0); + API_EVENT(msg->conn, NETCONN_EVT_SENDPLUS, 0); + + if (msg->conn->op_completed != SYS_SEM_NULL) { + sys_sem_signal(msg->conn->op_completed); + } +} + +/** + * Bind a pcb contained in a netconn + * Called from netconn_bind. + * + * @param msg the api_msg_msg pointing to the connection and containing + * the IP address and port to bind to + */ +void +do_bind(struct api_msg_msg *msg) +{ + if (!ERR_IS_FATAL(msg->conn->err)) { + if (msg->conn->pcb.tcp != NULL) { + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + msg->conn->err = raw_bind(msg->conn->pcb.raw, msg->msg.bc.ipaddr); + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + msg->conn->err = udp_bind(msg->conn->pcb.udp, msg->msg.bc.ipaddr, msg->msg.bc.port); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + msg->conn->err = tcp_bind(msg->conn->pcb.tcp, msg->msg.bc.ipaddr, msg->msg.bc.port); + break; +#endif /* LWIP_TCP */ + default: + break; + } + } else { + /* msg->conn->pcb is NULL */ + msg->conn->err = ERR_VAL; + } + } + TCPIP_APIMSG_ACK(msg); +} + +#if LWIP_TCP +/** + * TCP callback function if a connection (opened by tcp_connect/do_connect) has + * been established (or reset by the remote host). + * + * @see tcp.h (struct tcp_pcb.connected) for parameters and return values + */ +static err_t +do_connected(void *arg, struct tcp_pcb *pcb, err_t err) +{ + struct netconn *conn; + + LWIP_UNUSED_ARG(pcb); + + conn = arg; + + if (conn == NULL) { + return ERR_VAL; + } + + conn->err = err; + if ((conn->type == NETCONN_TCP) && (err == ERR_OK)) { + setup_tcp(conn); + } + conn->state = NETCONN_NONE; + sys_sem_signal(conn->op_completed); + return ERR_OK; +} +#endif /* LWIP_TCP */ + +/** + * Connect a pcb contained inside a netconn + * Called from netconn_connect. + * + * @param msg the api_msg_msg pointing to the connection and containing + * the IP address and port to connect to + */ +void +do_connect(struct api_msg_msg *msg) +{ + if (msg->conn->pcb.tcp == NULL) { + sys_sem_signal(msg->conn->op_completed); + return; + } + + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + msg->conn->err = raw_connect(msg->conn->pcb.raw, msg->msg.bc.ipaddr); + sys_sem_signal(msg->conn->op_completed); + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + msg->conn->err = udp_connect(msg->conn->pcb.udp, msg->msg.bc.ipaddr, msg->msg.bc.port); + sys_sem_signal(msg->conn->op_completed); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + msg->conn->state = NETCONN_CONNECT; + setup_tcp(msg->conn); + msg->conn->err = tcp_connect(msg->conn->pcb.tcp, msg->msg.bc.ipaddr, msg->msg.bc.port, + do_connected); + /* sys_sem_signal() is called from do_connected (or err_tcp()), + * when the connection is established! */ + break; +#endif /* LWIP_TCP */ + default: + LWIP_ERROR("Invalid netconn type", 0, do{ msg->conn->err = ERR_VAL; + sys_sem_signal(msg->conn->op_completed); }while(0)); + break; + } +} + +/** + * Connect a pcb contained inside a netconn + * Only used for UDP netconns. + * Called from netconn_disconnect. + * + * @param msg the api_msg_msg pointing to the connection to disconnect + */ +void +do_disconnect(struct api_msg_msg *msg) +{ +#if LWIP_UDP + if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) { + udp_disconnect(msg->conn->pcb.udp); + } +#endif /* LWIP_UDP */ + TCPIP_APIMSG_ACK(msg); +} + +/** + * Set a TCP pcb contained in a netconn into listen mode + * Called from netconn_listen. + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_listen(struct api_msg_msg *msg) +{ +#if LWIP_TCP + if (!ERR_IS_FATAL(msg->conn->err)) { + if (msg->conn->pcb.tcp != NULL) { + if (msg->conn->type == NETCONN_TCP) { + if (msg->conn->pcb.tcp->state == CLOSED) { +#if TCP_LISTEN_BACKLOG + struct tcp_pcb* lpcb = tcp_listen_with_backlog(msg->conn->pcb.tcp, msg->msg.lb.backlog); +#else /* TCP_LISTEN_BACKLOG */ + struct tcp_pcb* lpcb = tcp_listen(msg->conn->pcb.tcp); +#endif /* TCP_LISTEN_BACKLOG */ + if (lpcb == NULL) { + msg->conn->err = ERR_MEM; + } else { + /* delete the recvmbox and allocate the acceptmbox */ + if (msg->conn->recvmbox != SYS_MBOX_NULL) { + /** @todo: should we drain the recvmbox here? */ + sys_mbox_free(msg->conn->recvmbox); + msg->conn->recvmbox = SYS_MBOX_NULL; + } + if (msg->conn->acceptmbox == SYS_MBOX_NULL) { + if ((msg->conn->acceptmbox = sys_mbox_new(DEFAULT_ACCEPTMBOX_SIZE)) == SYS_MBOX_NULL) { + msg->conn->err = ERR_MEM; + } + } + if (msg->conn->err == ERR_OK) { + msg->conn->state = NETCONN_LISTEN; + msg->conn->pcb.tcp = lpcb; + tcp_arg(msg->conn->pcb.tcp, msg->conn); + tcp_accept(msg->conn->pcb.tcp, accept_function); + } + } + } else { + msg->conn->err = ERR_CONN; + } + } + } + } +#endif /* LWIP_TCP */ + TCPIP_APIMSG_ACK(msg); +} + +/** + * Send some data on a RAW or UDP pcb contained in a netconn + * Called from netconn_send + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_send(struct api_msg_msg *msg) +{ + if (!ERR_IS_FATAL(msg->conn->err)) { + if (msg->conn->pcb.tcp != NULL) { + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + if (msg->msg.b->addr == NULL) { + msg->conn->err = raw_send(msg->conn->pcb.raw, msg->msg.b->p); + } else { + msg->conn->err = raw_sendto(msg->conn->pcb.raw, msg->msg.b->p, msg->msg.b->addr); + } + break; +#endif +#if LWIP_UDP + case NETCONN_UDP: + if (msg->msg.b->addr == NULL) { + msg->conn->err = udp_send(msg->conn->pcb.udp, msg->msg.b->p); + } else { + msg->conn->err = udp_sendto(msg->conn->pcb.udp, msg->msg.b->p, msg->msg.b->addr, msg->msg.b->port); + } + break; +#endif /* LWIP_UDP */ + default: + break; + } + } + } + TCPIP_APIMSG_ACK(msg); +} + +/** + * Indicate data has been received from a TCP pcb contained in a netconn + * Called from netconn_recv + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_recv(struct api_msg_msg *msg) +{ +#if LWIP_TCP + if (!ERR_IS_FATAL(msg->conn->err)) { + if (msg->conn->pcb.tcp != NULL) { + if (msg->conn->type == NETCONN_TCP) { +#if TCP_LISTEN_BACKLOG + if (msg->conn->pcb.tcp->state == LISTEN) { + tcp_accepted(msg->conn->pcb.tcp); + } else +#endif /* TCP_LISTEN_BACKLOG */ + { + tcp_recved(msg->conn->pcb.tcp, msg->msg.r.len); + } + } + } + } +#endif /* LWIP_TCP */ + TCPIP_APIMSG_ACK(msg); +} + +#if LWIP_TCP +/** + * See if more data needs to be written from a previous call to netconn_write. + * Called initially from do_write. If the first call can't send all data + * (because of low memory or empty send-buffer), this function is called again + * from sent_tcp() or poll_tcp() to send more data. If all data is sent, the + * blocking application thread (waiting in netconn_write) is released. + * + * @param conn netconn (that is currently in state NETCONN_WRITE) to process + * @return ERR_OK + * ERR_MEM if LWIP_TCPIP_CORE_LOCKING=1 and sending hasn't yet finished + */ +static err_t +do_writemore(struct netconn *conn) +{ + err_t err; + void *dataptr; + u16_t len, available; + u8_t write_finished = 0; + size_t diff; + + LWIP_ASSERT("conn->state == NETCONN_WRITE", (conn->state == NETCONN_WRITE)); + + dataptr = (u8_t*)conn->write_msg->msg.w.dataptr + conn->write_offset; + diff = conn->write_msg->msg.w.len - conn->write_offset; + if (diff > 0xffffUL) { /* max_u16_t */ + len = 0xffff; +#if LWIP_TCPIP_CORE_LOCKING + conn->write_delayed = 1; +#endif + } else { + len = (u16_t)diff; + } + available = tcp_sndbuf(conn->pcb.tcp); + if (available < len) { + /* don't try to write more than sendbuf */ + len = available; +#if LWIP_TCPIP_CORE_LOCKING + conn->write_delayed = 1; +#endif + } + + err = tcp_write(conn->pcb.tcp, dataptr, len, conn->write_msg->msg.w.apiflags); + LWIP_ASSERT("do_writemore: invalid length!", ((conn->write_offset + len) <= conn->write_msg->msg.w.len)); + if (err == ERR_OK) { + conn->write_offset += len; + if (conn->write_offset == conn->write_msg->msg.w.len) { + /* everything was written */ + write_finished = 1; + conn->write_msg = NULL; + conn->write_offset = 0; + /* API_EVENT might call tcp_tmr, so reset conn->state now */ + conn->state = NETCONN_NONE; + } + err = tcp_output_nagle(conn->pcb.tcp); + conn->err = err; + if ((err == ERR_OK) && (tcp_sndbuf(conn->pcb.tcp) <= TCP_SNDLOWAT)) { + API_EVENT(conn, NETCONN_EVT_SENDMINUS, len); + } + } else if (err == ERR_MEM) { + /* If ERR_MEM, we wait for sent_tcp or poll_tcp to be called + we do NOT return to the application thread, since ERR_MEM is + only a temporary error! */ + + /* tcp_enqueue returned ERR_MEM, try tcp_output anyway */ + err = tcp_output(conn->pcb.tcp); + +#if LWIP_TCPIP_CORE_LOCKING + conn->write_delayed = 1; +#endif + } else { + /* On errors != ERR_MEM, we don't try writing any more but return + the error to the application thread. */ + conn->err = err; + write_finished = 1; + } + + if (write_finished) { + /* everything was written: set back connection state + and back to application task */ + conn->state = NETCONN_NONE; +#if LWIP_TCPIP_CORE_LOCKING + if (conn->write_delayed != 0) +#endif + { + sys_sem_signal(conn->op_completed); + } + } +#if LWIP_TCPIP_CORE_LOCKING + else + return ERR_MEM; +#endif + return ERR_OK; +} +#endif /* LWIP_TCP */ + +/** + * Send some data on a TCP pcb contained in a netconn + * Called from netconn_write + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_write(struct api_msg_msg *msg) +{ + if (!ERR_IS_FATAL(msg->conn->err)) { + if ((msg->conn->pcb.tcp != NULL) && (msg->conn->type == NETCONN_TCP)) { +#if LWIP_TCP + msg->conn->state = NETCONN_WRITE; + /* set all the variables used by do_writemore */ + LWIP_ASSERT("already writing", msg->conn->write_msg == NULL && + msg->conn->write_offset == 0); + msg->conn->write_msg = msg; + msg->conn->write_offset = 0; +#if LWIP_TCPIP_CORE_LOCKING + msg->conn->write_delayed = 0; + if (do_writemore(msg->conn) != ERR_OK) { + LWIP_ASSERT("state!", msg->conn->state == NETCONN_WRITE); + UNLOCK_TCPIP_CORE(); + sys_arch_sem_wait(msg->conn->op_completed, 0); + LOCK_TCPIP_CORE(); + LWIP_ASSERT("state!", msg->conn->state == NETCONN_NONE); + } +#else + do_writemore(msg->conn); +#endif + /* for both cases: if do_writemore was called, don't ACK the APIMSG! */ + return; +#endif /* LWIP_TCP */ +#if (LWIP_UDP || LWIP_RAW) + } else { + msg->conn->err = ERR_VAL; +#endif /* (LWIP_UDP || LWIP_RAW) */ + } + } + TCPIP_APIMSG_ACK(msg); +} + +/** + * Return a connection's local or remote address + * Called from netconn_getaddr + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_getaddr(struct api_msg_msg *msg) +{ + if (msg->conn->pcb.ip != NULL) { + *(msg->msg.ad.ipaddr) = (msg->msg.ad.local?msg->conn->pcb.ip->local_ip:msg->conn->pcb.ip->remote_ip); + + switch (NETCONNTYPE_GROUP(msg->conn->type)) { +#if LWIP_RAW + case NETCONN_RAW: + if (msg->msg.ad.local) { + *(msg->msg.ad.port) = msg->conn->pcb.raw->protocol; + } else { + /* return an error as connecting is only a helper for upper layers */ + msg->conn->err = ERR_CONN; + } + break; +#endif /* LWIP_RAW */ +#if LWIP_UDP + case NETCONN_UDP: + if (msg->msg.ad.local) { + *(msg->msg.ad.port) = msg->conn->pcb.udp->local_port; + } else { + if ((msg->conn->pcb.udp->flags & UDP_FLAGS_CONNECTED) == 0) { + msg->conn->err = ERR_CONN; + } else { + *(msg->msg.ad.port) = msg->conn->pcb.udp->remote_port; + } + } + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case NETCONN_TCP: + *(msg->msg.ad.port) = (msg->msg.ad.local?msg->conn->pcb.tcp->local_port:msg->conn->pcb.tcp->remote_port); + break; +#endif /* LWIP_TCP */ + } + } else { + msg->conn->err = ERR_CONN; + } + TCPIP_APIMSG_ACK(msg); +} + +/** + * Close a TCP pcb contained in a netconn + * Called from netconn_close + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_close(struct api_msg_msg *msg) +{ +#if LWIP_TCP + if ((msg->conn->pcb.tcp != NULL) && (msg->conn->type == NETCONN_TCP)) { + msg->conn->state = NETCONN_CLOSE; + do_close_internal(msg->conn); + /* for tcp netconns, do_close_internal ACKs the message */ + } else +#endif /* LWIP_TCP */ + { + msg->conn->err = ERR_VAL; + sys_sem_signal(msg->conn->op_completed); + } +} + +#if LWIP_IGMP +/** + * Join multicast groups for UDP netconns. + * Called from netconn_join_leave_group + * + * @param msg the api_msg_msg pointing to the connection + */ +void +do_join_leave_group(struct api_msg_msg *msg) +{ + if (!ERR_IS_FATAL(msg->conn->err)) { + if (msg->conn->pcb.tcp != NULL) { + if (NETCONNTYPE_GROUP(msg->conn->type) == NETCONN_UDP) { +#if LWIP_UDP + if (msg->msg.jl.join_or_leave == NETCONN_JOIN) { + msg->conn->err = igmp_joingroup(msg->msg.jl.interface, msg->msg.jl.multiaddr); + } else { + msg->conn->err = igmp_leavegroup(msg->msg.jl.interface, msg->msg.jl.multiaddr); + } +#endif /* LWIP_UDP */ +#if (LWIP_TCP || LWIP_RAW) + } else { + msg->conn->err = ERR_VAL; +#endif /* (LWIP_TCP || LWIP_RAW) */ + } + } + } + TCPIP_APIMSG_ACK(msg); +} +#endif /* LWIP_IGMP */ + +#if LWIP_DNS +/** + * Callback function that is called when DNS name is resolved + * (or on timeout). A waiting application thread is waked up by + * signaling the semaphore. + */ +static void +do_dns_found(const char *name, struct ip_addr *ipaddr, void *arg) +{ + struct dns_api_msg *msg = (struct dns_api_msg*)arg; + + LWIP_ASSERT("DNS response for wrong host name", strcmp(msg->name, name) == 0); + + if (ipaddr == NULL) { + /* timeout or memory error */ + *msg->err = ERR_VAL; + } else { + /* address was resolved */ + *msg->err = ERR_OK; + *msg->addr = *ipaddr; + } + /* wake up the application task waiting in netconn_gethostbyname */ + sys_sem_signal(msg->sem); +} + +/** + * Execute a DNS query + * Called from netconn_gethostbyname + * + * @param arg the dns_api_msg pointing to the query + */ +void +do_gethostbyname(void *arg) +{ + struct dns_api_msg *msg = (struct dns_api_msg*)arg; + + *msg->err = dns_gethostbyname(msg->name, msg->addr, do_dns_found, msg); + if (*msg->err != ERR_INPROGRESS) { + /* on error or immediate success, wake up the application + * task waiting in netconn_gethostbyname */ + sys_sem_signal(msg->sem); + } +} +#endif /* LWIP_DNS */ + +#endif /* LWIP_NETCONN */ diff --git a/bertos/net/lwip/src/api/err.c b/bertos/net/lwip/src/api/err.c new file mode 100644 index 0000000..a90cb98 --- /dev/null +++ b/bertos/net/lwip/src/api/err.c @@ -0,0 +1,74 @@ +/** + * @file + * Error Management module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/err.h" + +#ifdef LWIP_DEBUG + +static const char *err_strerr[] = { + "Ok.", /* ERR_OK 0 */ + "Out of memory error.", /* ERR_MEM -1 */ + "Buffer error.", /* ERR_BUF -2 */ + "Timeout.", /* ERR_TIMEOUT -3 */ + "Routing problem.", /* ERR_RTE -4 */ + "Connection aborted.", /* ERR_ABRT -5 */ + "Connection reset.", /* ERR_RST -6 */ + "Connection closed.", /* ERR_CLSD -7 */ + "Not connected.", /* ERR_CONN -8 */ + "Illegal value.", /* ERR_VAL -9 */ + "Illegal argument.", /* ERR_ARG -10 */ + "Address in use.", /* ERR_USE -11 */ + "Low-level netif error.", /* ERR_IF -12 */ + "Already connected.", /* ERR_ISCONN -13 */ + "Operation in progress." /* ERR_INPROGRESS -14 */ +}; + +/** + * Convert an lwip internal error to a string representation. + * + * @param err an lwip internal err_t + * @return a string representation for err + */ +const char * +lwip_strerr(err_t err) +{ + return err_strerr[-err]; + +} + +#endif /* LWIP_DEBUG */ diff --git a/bertos/net/lwip/src/api/netbuf.c b/bertos/net/lwip/src/api/netbuf.c new file mode 100644 index 0000000..57efc4f --- /dev/null +++ b/bertos/net/lwip/src/api/netbuf.c @@ -0,0 +1,240 @@ +/** + * @file + * Network buffer management + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netbuf.h" +#include "lwip/memp.h" + +#include + +/** + * Create (allocate) and initialize a new netbuf. + * The netbuf doesn't yet contain a packet buffer! + * + * @return a pointer to a new netbuf + * NULL on lack of memory + */ +struct +netbuf *netbuf_new(void) +{ + struct netbuf *buf; + + buf = memp_malloc(MEMP_NETBUF); + if (buf != NULL) { + buf->p = NULL; + buf->ptr = NULL; + buf->addr = NULL; + buf->port = 0; +#if LWIP_NETBUF_RECVINFO + buf->toaddr = NULL; + buf->toport = 0; +#endif /* LWIP_NETBUF_RECVINFO */ + return buf; + } else { + return NULL; + } +} + +/** + * Deallocate a netbuf allocated by netbuf_new(). + * + * @param buf pointer to a netbuf allocated by netbuf_new() + */ +void +netbuf_delete(struct netbuf *buf) +{ + if (buf != NULL) { + if (buf->p != NULL) { + pbuf_free(buf->p); + buf->p = buf->ptr = NULL; + } + memp_free(MEMP_NETBUF, buf); + } +} + +/** + * Allocate memory for a packet buffer for a given netbuf. + * + * @param buf the netbuf for which to allocate a packet buffer + * @param size the size of the packet buffer to allocate + * @return pointer to the allocated memory + * NULL if no memory could be allocated + */ +void * +netbuf_alloc(struct netbuf *buf, u16_t size) +{ + LWIP_ERROR("netbuf_alloc: invalid buf", (buf != NULL), return NULL;); + + /* Deallocate any previously allocated memory. */ + if (buf->p != NULL) { + pbuf_free(buf->p); + } + buf->p = pbuf_alloc(PBUF_TRANSPORT, size, PBUF_RAM); + if (buf->p == NULL) { + return NULL; + } + LWIP_ASSERT("check that first pbuf can hold size", + (buf->p->len >= size)); + buf->ptr = buf->p; + return buf->p->payload; +} + +/** + * Free the packet buffer included in a netbuf + * + * @param buf pointer to the netbuf which contains the packet buffer to free + */ +void +netbuf_free(struct netbuf *buf) +{ + LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;); + if (buf->p != NULL) { + pbuf_free(buf->p); + } + buf->p = buf->ptr = NULL; +} + +/** + * Let a netbuf reference existing (non-volatile) data. + * + * @param buf netbuf which should reference the data + * @param dataptr pointer to the data to reference + * @param size size of the data + * @return ERR_OK if data is referenced + * ERR_MEM if data couldn't be referenced due to lack of memory + */ +err_t +netbuf_ref(struct netbuf *buf, const void *dataptr, u16_t size) +{ + LWIP_ERROR("netbuf_ref: invalid buf", (buf != NULL), return ERR_ARG;); + if (buf->p != NULL) { + pbuf_free(buf->p); + } + buf->p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF); + if (buf->p == NULL) { + buf->ptr = NULL; + return ERR_MEM; + } + buf->p->payload = (void*)dataptr; + buf->p->len = buf->p->tot_len = size; + buf->ptr = buf->p; + return ERR_OK; +} + +/** + * Chain one netbuf to another (@see pbuf_chain) + * + * @param head the first netbuf + * @param tail netbuf to chain after head, freed by this function, may not be reference after returning + */ +void +netbuf_chain(struct netbuf *head, struct netbuf *tail) +{ + LWIP_ERROR("netbuf_ref: invalid head", (head != NULL), return;); + LWIP_ERROR("netbuf_chain: invalid tail", (tail != NULL), return;); + pbuf_cat(head->p, tail->p); + head->ptr = head->p; + memp_free(MEMP_NETBUF, tail); +} + +/** + * Get the data pointer and length of the data inside a netbuf. + * + * @param buf netbuf to get the data from + * @param dataptr pointer to a void pointer where to store the data pointer + * @param len pointer to an u16_t where the length of the data is stored + * @return ERR_OK if the information was retreived, + * ERR_BUF on error. + */ +err_t +netbuf_data(struct netbuf *buf, void **dataptr, u16_t *len) +{ + LWIP_ERROR("netbuf_data: invalid buf", (buf != NULL), return ERR_ARG;); + LWIP_ERROR("netbuf_data: invalid dataptr", (dataptr != NULL), return ERR_ARG;); + LWIP_ERROR("netbuf_data: invalid len", (len != NULL), return ERR_ARG;); + + if (buf->ptr == NULL) { + return ERR_BUF; + } + *dataptr = buf->ptr->payload; + *len = buf->ptr->len; + return ERR_OK; +} + +/** + * Move the current data pointer of a packet buffer contained in a netbuf + * to the next part. + * The packet buffer itself is not modified. + * + * @param buf the netbuf to modify + * @return -1 if there is no next part + * 1 if moved to the next part but now there is no next part + * 0 if moved to the next part and there are still more parts + */ +s8_t +netbuf_next(struct netbuf *buf) +{ + LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return -1;); + if (buf->ptr->next == NULL) { + return -1; + } + buf->ptr = buf->ptr->next; + if (buf->ptr->next == NULL) { + return 1; + } + return 0; +} + +/** + * Move the current data pointer of a packet buffer contained in a netbuf + * to the beginning of the packet. + * The packet buffer itself is not modified. + * + * @param buf the netbuf to modify + */ +void +netbuf_first(struct netbuf *buf) +{ + LWIP_ERROR("netbuf_free: invalid buf", (buf != NULL), return;); + buf->ptr = buf->p; +} + +#endif /* LWIP_NETCONN */ diff --git a/bertos/net/lwip/src/api/netdb.c b/bertos/net/lwip/src/api/netdb.c new file mode 100644 index 0000000..69a331b --- /dev/null +++ b/bertos/net/lwip/src/api/netdb.c @@ -0,0 +1,346 @@ +/** + * @file + * API functions for name resolving + * + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Simon Goldschmidt + * + */ + +#include "lwip/netdb.h" + +#if LWIP_DNS && LWIP_SOCKET + +#include "lwip/err.h" +#include "lwip/mem.h" +#include "lwip/ip_addr.h" +#include "lwip/api.h" + +#include +#include + +/** helper struct for gethostbyname_r to access the char* buffer */ +struct gethostbyname_r_helper { + struct ip_addr *addrs; + struct ip_addr addr; + char *aliases; +}; + +/** h_errno is exported in netdb.h for access by applications. */ +#if LWIP_DNS_API_DECLARE_H_ERRNO +int h_errno; +#endif /* LWIP_DNS_API_DECLARE_H_ERRNO */ + +/** define "hostent" variables storage: 0 if we use a static (but unprotected) + * set of variables for lwip_gethostbyname, 1 if we use a local storage */ +#ifndef LWIP_DNS_API_HOSTENT_STORAGE +#define LWIP_DNS_API_HOSTENT_STORAGE 0 +#endif + +/** define "hostent" variables storage */ +#if LWIP_DNS_API_HOSTENT_STORAGE +#define HOSTENT_STORAGE +#else +#define HOSTENT_STORAGE static +#endif /* LWIP_DNS_API_STATIC_HOSTENT */ + +/** + * Returns an entry containing addresses of address family AF_INET + * for the host with name name. + * Due to dns_gethostbyname limitations, only one address is returned. + * + * @param name the hostname to resolve + * @return an entry containing addresses of address family AF_INET + * for the host with name name + */ +struct hostent* +lwip_gethostbyname(const char *name) +{ + err_t err; + struct ip_addr addr; + + /* buffer variables for lwip_gethostbyname() */ + HOSTENT_STORAGE struct hostent s_hostent; + HOSTENT_STORAGE char *s_aliases; + HOSTENT_STORAGE struct ip_addr s_hostent_addr; + HOSTENT_STORAGE struct ip_addr *s_phostent_addr; + + /* query host IP address */ + err = netconn_gethostbyname(name, &addr); + if (err != ERR_OK) { + LWIP_DEBUGF(DNS_DEBUG, ("lwip_gethostbyname(%s) failed, err=%d\n", name, err)); + h_errno = HOST_NOT_FOUND; + return NULL; + } + + /* fill hostent */ + s_hostent_addr = addr; + s_phostent_addr = &s_hostent_addr; + s_hostent.h_name = (char*)name; + s_hostent.h_aliases = &s_aliases; + s_hostent.h_addrtype = AF_INET; + s_hostent.h_length = sizeof(struct ip_addr); + s_hostent.h_addr_list = (char**)&s_phostent_addr; + +#if DNS_DEBUG + /* dump hostent */ + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_name == %s\n", s_hostent.h_name)); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_aliases == %p\n", s_hostent.h_aliases)); + if (s_hostent.h_aliases != NULL) { + u8_t idx; + for ( idx=0; s_hostent.h_aliases[idx]; idx++) { + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_aliases[%i]-> == %p\n", idx, s_hostent.h_aliases[idx])); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_aliases[%i]-> == %s\n", idx, s_hostent.h_aliases[idx])); + } + } + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_addrtype == %d\n", s_hostent.h_addrtype)); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_length == %d\n", s_hostent.h_length)); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_addr_list == %p\n", s_hostent.h_addr_list)); + if (s_hostent.h_addr_list != NULL) { + u8_t idx; + for ( idx=0; s_hostent.h_addr_list[idx]; idx++) { + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_addr_list[%i] == %p\n", idx, s_hostent.h_addr_list[idx])); + LWIP_DEBUGF(DNS_DEBUG, ("hostent.h_addr_list[%i]-> == %s\n", idx, ip_ntoa(s_hostent.h_addr_list[idx]))); + } + } +#endif /* DNS_DEBUG */ + +#if LWIP_DNS_API_HOSTENT_STORAGE + /* this function should return the "per-thread" hostent after copy from s_hostent */ + return sys_thread_hostent(&s_hostent); +#else + return &s_hostent; +#endif /* LWIP_DNS_API_HOSTENT_STORAGE */ +} + +/** + * Thread-safe variant of lwip_gethostbyname: instead of using a static + * buffer, this function takes buffer and errno pointers as arguments + * and uses these for the result. + * + * @param name the hostname to resolve + * @param ret pre-allocated struct where to store the result + * @param buf pre-allocated buffer where to store additional data + * @param buflen the size of buf + * @param result pointer to a hostent pointer that is set to ret on success + * and set to zero on error + * @param h_errnop pointer to an int where to store errors (instead of modifying + * the global h_errno) + * @return 0 on success, non-zero on error, additional error information + * is stored in *h_errnop instead of h_errno to be thread-safe + */ +int +lwip_gethostbyname_r(const char *name, struct hostent *ret, char *buf, + size_t buflen, struct hostent **result, int *h_errnop) +{ + err_t err; + struct gethostbyname_r_helper *h; + char *hostname; + size_t namelen; + int lh_errno; + + if (h_errnop == NULL) { + /* ensure h_errnop is never NULL */ + h_errnop = &lh_errno; + } + + if (result == NULL) { + /* not all arguments given */ + *h_errnop = EINVAL; + return -1; + } + /* first thing to do: set *result to nothing */ + *result = NULL; + if ((name == NULL) || (ret == NULL) || (buf == 0)) { + /* not all arguments given */ + *h_errnop = EINVAL; + return -1; + } + + namelen = strlen(name); + if (buflen < (sizeof(struct gethostbyname_r_helper) + namelen + 1 + (MEM_ALIGNMENT - 1))) { + /* buf can't hold the data needed + a copy of name */ + *h_errnop = ERANGE; + return -1; + } + + h = (struct gethostbyname_r_helper*)LWIP_MEM_ALIGN(buf); + hostname = ((char*)h) + sizeof(struct gethostbyname_r_helper); + + /* query host IP address */ + err = netconn_gethostbyname(name, &(h->addr)); + if (err != ERR_OK) { + LWIP_DEBUGF(DNS_DEBUG, ("lwip_gethostbyname(%s) failed, err=%d\n", name, err)); + *h_errnop = ENSRNOTFOUND; + return -1; + } + + /* copy the hostname into buf */ + MEMCPY(hostname, name, namelen); + hostname[namelen] = 0; + + /* fill hostent */ + h->addrs = &(h->addr); + h->aliases = NULL; + ret->h_name = (char*)hostname; + ret->h_aliases = &(h->aliases); + ret->h_addrtype = AF_INET; + ret->h_length = sizeof(struct ip_addr); + ret->h_addr_list = (char**)&(h->addrs); + + /* set result != NULL */ + *result = ret; + + /* return success */ + return 0; +} + +/** + * Frees one or more addrinfo structures returned by getaddrinfo(), along with + * any additional storage associated with those structures. If the ai_next field + * of the structure is not null, the entire list of structures is freed. + * + * @param ai struct addrinfo to free + */ +void +lwip_freeaddrinfo(struct addrinfo *ai) +{ + struct addrinfo *next; + + while (ai != NULL) { + next = ai->ai_next; + mem_free(ai); + ai = next; + } +} + +/** + * Translates the name of a service location (for example, a host name) and/or + * a service name and returns a set of socket addresses and associated + * information to be used in creating a socket with which to address the + * specified service. + * Memory for the result is allocated internally and must be freed by calling + * lwip_freeaddrinfo()! + * + * Due to a limitation in dns_gethostbyname, only the first address of a + * host is returned. + * Also, service names are not supported (only port numbers)! + * + * @param nodename descriptive name or address string of the host + * (may be NULL -> local address) + * @param servname port number as string of NULL + * @param hints structure containing input values that set socktype and protocol + * @param res pointer to a pointer where to store the result (set to NULL on failure) + * @return 0 on success, non-zero on failure + */ +int +lwip_getaddrinfo(const char *nodename, const char *servname, + const struct addrinfo *hints, struct addrinfo **res) +{ + err_t err; + struct ip_addr addr; + struct addrinfo *ai; + struct sockaddr_in *sa = NULL; + int port_nr = 0; + size_t total_size; + size_t namelen = 0; + + if (res == NULL) { + return EAI_FAIL; + } + *res = NULL; + if ((nodename == NULL) && (servname == NULL)) { + return EAI_NONAME; + } + + if (servname != NULL) { + /* service name specified: convert to port number + * @todo?: currently, only ASCII integers (port numbers) are supported! */ + port_nr = atoi(servname); + if ((port_nr <= 0) || (port_nr > 0xffff)) { + return EAI_SERVICE; + } + } + + if (nodename != NULL) { + /* service location specified, try to resolve */ + err = netconn_gethostbyname(nodename, &addr); + if (err != ERR_OK) { + return EAI_FAIL; + } + } else { + /* service location specified, use loopback address */ + addr.addr = htonl(INADDR_LOOPBACK); + } + + total_size = sizeof(struct addrinfo) + sizeof(struct sockaddr_in); + if (nodename != NULL) { + namelen = strlen(nodename); + LWIP_ASSERT("namelen is too long", (namelen + 1) <= (mem_size_t)-1); + total_size += namelen + 1; + } + ai = mem_malloc(total_size); + if (ai == NULL) { + goto memerr; + } + memset(ai, 0, total_size); + sa = (struct sockaddr_in*)((u8_t*)ai + sizeof(struct addrinfo)); + /* set up sockaddr */ + sa->sin_addr.s_addr = addr.addr; + sa->sin_family = AF_INET; + sa->sin_len = sizeof(struct sockaddr_in); + sa->sin_port = htons(port_nr); + + /* set up addrinfo */ + ai->ai_family = AF_INET; + if (hints != NULL) { + /* copy socktype & protocol from hints if specified */ + ai->ai_socktype = hints->ai_socktype; + ai->ai_protocol = hints->ai_protocol; + } + if (nodename != NULL) { + /* copy nodename to canonname if specified */ + ai->ai_canonname = ((char*)ai + sizeof(struct addrinfo) + sizeof(struct sockaddr_in)); + MEMCPY(ai->ai_canonname, nodename, namelen); + ai->ai_canonname[namelen] = 0; + } + ai->ai_addrlen = sizeof(struct sockaddr_in); + ai->ai_addr = (struct sockaddr*)sa; + + *res = ai; + + return 0; +memerr: + if (ai != NULL) { + mem_free(ai); + } + return EAI_MEMORY; +} + +#endif /* LWIP_DNS && LWIP_SOCKET */ diff --git a/bertos/net/lwip/src/api/netifapi.c b/bertos/net/lwip/src/api/netifapi.c new file mode 100644 index 0000000..5708986 --- /dev/null +++ b/bertos/net/lwip/src/api/netifapi.c @@ -0,0 +1,162 @@ +/** + * @file + * Network Interface Sequential API module + * + */ + +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ + +#include "lwip/opt.h" + +#if LWIP_NETIF_API /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netifapi.h" +#include "lwip/tcpip.h" + +/** + * Call netif_add() inside the tcpip_thread context. + */ +void +do_netifapi_netif_add( struct netifapi_msg_msg *msg) +{ + if (!netif_add( msg->netif, + msg->msg.add.ipaddr, + msg->msg.add.netmask, + msg->msg.add.gw, + msg->msg.add.state, + msg->msg.add.init, + msg->msg.add.input)) { + msg->err = ERR_IF; + } else { + msg->err = ERR_OK; + } + TCPIP_NETIFAPI_ACK(msg); +} + +/** + * Call netif_set_addr() inside the tcpip_thread context. + */ +void +do_netifapi_netif_set_addr( struct netifapi_msg_msg *msg) +{ + netif_set_addr( msg->netif, + msg->msg.add.ipaddr, + msg->msg.add.netmask, + msg->msg.add.gw); + msg->err = ERR_OK; + TCPIP_NETIFAPI_ACK(msg); +} + +/** + * Call the "errtfunc" (or the "voidfunc" if "errtfunc" is NULL) inside the + * tcpip_thread context. + */ +void +do_netifapi_netif_common( struct netifapi_msg_msg *msg) +{ + if (msg->msg.common.errtfunc!=NULL) { + msg->err = + msg->msg.common.errtfunc(msg->netif); + } else { + msg->err = ERR_OK; + msg->msg.common.voidfunc(msg->netif); + } + TCPIP_NETIFAPI_ACK(msg); +} + +/** + * Call netif_add() in a thread-safe way by running that function inside the + * tcpip_thread context. + * + * @note for params @see netif_add() + */ +err_t +netifapi_netif_add(struct netif *netif, + struct ip_addr *ipaddr, + struct ip_addr *netmask, + struct ip_addr *gw, + void *state, + err_t (* init)(struct netif *netif), + err_t (* input)(struct pbuf *p, struct netif *netif)) +{ + struct netifapi_msg msg; + msg.function = do_netifapi_netif_add; + msg.msg.netif = netif; + msg.msg.msg.add.ipaddr = ipaddr; + msg.msg.msg.add.netmask = netmask; + msg.msg.msg.add.gw = gw; + msg.msg.msg.add.state = state; + msg.msg.msg.add.init = init; + msg.msg.msg.add.input = input; + TCPIP_NETIFAPI(&msg); + return msg.msg.err; +} + +/** + * Call netif_set_addr() in a thread-safe way by running that function inside the + * tcpip_thread context. + * + * @note for params @see netif_set_addr() + */ +err_t +netifapi_netif_set_addr(struct netif *netif, + struct ip_addr *ipaddr, + struct ip_addr *netmask, + struct ip_addr *gw) +{ + struct netifapi_msg msg; + msg.function = do_netifapi_netif_set_addr; + msg.msg.netif = netif; + msg.msg.msg.add.ipaddr = ipaddr; + msg.msg.msg.add.netmask = netmask; + msg.msg.msg.add.gw = gw; + TCPIP_NETIFAPI(&msg); + return msg.msg.err; +} + +/** + * call the "errtfunc" (or the "voidfunc" if "errtfunc" is NULL) in a thread-safe + * way by running that function inside the tcpip_thread context. + * + * @note use only for functions where there is only "netif" parameter. + */ +err_t +netifapi_netif_common( struct netif *netif, + void (* voidfunc)(struct netif *netif), + err_t (* errtfunc)(struct netif *netif) ) +{ + struct netifapi_msg msg; + msg.function = do_netifapi_netif_common; + msg.msg.netif = netif; + msg.msg.msg.common.voidfunc = voidfunc; + msg.msg.msg.common.errtfunc = errtfunc; + TCPIP_NETIFAPI(&msg); + return msg.msg.err; +} + +#endif /* LWIP_NETIF_API */ diff --git a/bertos/net/lwip/src/api/sockets.c b/bertos/net/lwip/src/api/sockets.c new file mode 100644 index 0000000..340c6dc --- /dev/null +++ b/bertos/net/lwip/src/api/sockets.c @@ -0,0 +1,1971 @@ +/** + * @file + * Sockets BSD-Like API module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + * Improved by Marc Boucher and David Haas + * + */ + +#include "lwip/opt.h" + +#if LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sockets.h" +#include "lwip/api.h" +#include "lwip/sys.h" +#include "lwip/igmp.h" +#include "lwip/inet.h" +#include "lwip/tcp.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcpip.h" + +#include + +#define NUM_SOCKETS MEMP_NUM_NETCONN + +/** Contains all internal pointers and states used for a socket */ +struct lwip_socket { + /** sockets currently are built on netconns, each socket has one netconn */ + struct netconn *conn; + /** data that was left from the previous read */ + struct netbuf *lastdata; + /** offset in the data that was left from the previous read */ + u16_t lastoffset; + /** number of times data was received, set by event_callback(), + tested by the receive and select functions */ + s16_t rcvevent; + /** number of times data was received, set by event_callback(), + tested by select */ + u16_t sendevent; + /** socket flags (currently, only used for O_NONBLOCK) */ + u16_t flags; + /** last error that occurred on this socket */ + int err; +}; + +/** Description for a task waiting in select */ +struct lwip_select_cb { + /** Pointer to the next waiting task */ + struct lwip_select_cb *next; + /** readset passed to select */ + fd_set *readset; + /** writeset passed to select */ + fd_set *writeset; + /** unimplemented: exceptset passed to select */ + fd_set *exceptset; + /** don't signal the same semaphore twice: set to 1 when signalled */ + int sem_signalled; + /** semaphore to wake up a task waiting for select */ + sys_sem_t sem; +}; + +/** This struct is used to pass data to the set/getsockopt_internal + * functions running in tcpip_thread context (only a void* is allowed) */ +struct lwip_setgetsockopt_data { + /** socket struct for which to change options */ + struct lwip_socket *sock; + /** socket index for which to change options */ + int s; + /** level of the option to process */ + int level; + /** name of the option to process */ + int optname; + /** set: value to set the option to + * get: value of the option is stored here */ + void *optval; + /** size of *optval */ + socklen_t *optlen; + /** if an error occures, it is temporarily stored here */ + err_t err; +}; + +/** The global array of available sockets */ +static struct lwip_socket sockets[NUM_SOCKETS]; +/** The global list of tasks waiting for select */ +static struct lwip_select_cb *select_cb_list; + +/** Semaphore protecting the sockets array */ +static sys_sem_t socksem; +/** Semaphore protecting select_cb_list */ +static sys_sem_t selectsem; + +/** Table to quickly map an lwIP error (err_t) to a socket error + * by using -err as an index */ +static const int err_to_errno_table[] = { + 0, /* ERR_OK 0 No error, everything OK. */ + ENOMEM, /* ERR_MEM -1 Out of memory error. */ + ENOBUFS, /* ERR_BUF -2 Buffer error. */ + ETIMEDOUT, /* ERR_TIMEOUT -3 Timeout */ + EHOSTUNREACH, /* ERR_RTE -4 Routing problem. */ + ECONNABORTED, /* ERR_ABRT -5 Connection aborted. */ + ECONNRESET, /* ERR_RST -6 Connection reset. */ + ESHUTDOWN, /* ERR_CLSD -7 Connection closed. */ + ENOTCONN, /* ERR_CONN -8 Not connected. */ + EINVAL, /* ERR_VAL -9 Illegal value. */ + EIO, /* ERR_ARG -10 Illegal argument. */ + EADDRINUSE, /* ERR_USE -11 Address in use. */ + -1, /* ERR_IF -12 Low-level netif error */ + -1, /* ERR_ISCONN -13 Already connected. */ + EINPROGRESS /* ERR_INPROGRESS -14 Operation in progress */ +}; + +#define ERR_TO_ERRNO_TABLE_SIZE \ + (sizeof(err_to_errno_table)/sizeof(err_to_errno_table[0])) + +#define err_to_errno(err) \ + ((unsigned)(-(err)) < ERR_TO_ERRNO_TABLE_SIZE ? \ + err_to_errno_table[-(err)] : EIO) + +#ifdef ERRNO +#ifndef set_errno +#define set_errno(err) errno = (err) +#endif +#else +#define set_errno(err) +#endif + +#define sock_set_errno(sk, e) do { \ + sk->err = (e); \ + set_errno(sk->err); \ +} while (0) + +/* Forward delcaration of some functions */ +static void event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len); +static void lwip_getsockopt_internal(void *arg); +static void lwip_setsockopt_internal(void *arg); + +/** + * Initialize this module. This function has to be called before any other + * functions in this module! + */ +void +lwip_socket_init(void) +{ + socksem = sys_sem_new(1); + selectsem = sys_sem_new(1); +} + +/** + * Map a externally used socket index to the internal socket representation. + * + * @param s externally used socket index + * @return struct lwip_socket for the socket or NULL if not found + */ +static struct lwip_socket * +get_socket(int s) +{ + struct lwip_socket *sock; + + if ((s < 0) || (s >= NUM_SOCKETS)) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): invalid\n", s)); + set_errno(EBADF); + return NULL; + } + + sock = &sockets[s]; + + if (!sock->conn) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("get_socket(%d): not active\n", s)); + set_errno(EBADF); + return NULL; + } + + return sock; +} + +/** + * Allocate a new socket for a given netconn. + * + * @param newconn the netconn for which to allocate a socket + * @return the index of the new socket; -1 on error + */ +static int +alloc_socket(struct netconn *newconn) +{ + int i; + + /* Protect socket array */ + sys_sem_wait(socksem); + + /* allocate a new socket identifier */ + for (i = 0; i < NUM_SOCKETS; ++i) { + if (!sockets[i].conn) { + sockets[i].conn = newconn; + sockets[i].lastdata = NULL; + sockets[i].lastoffset = 0; + sockets[i].rcvevent = 0; + sockets[i].sendevent = 1; /* TCP send buf is empty */ + sockets[i].flags = 0; + sockets[i].err = 0; + sys_sem_signal(socksem); + return i; + } + } + sys_sem_signal(socksem); + return -1; +} + +/* Below this, the well-known socket functions are implemented. + * Use google.com or opengroup.org to get a good description :-) + * + * Exceptions are documented! + */ + +int +lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen) +{ + struct lwip_socket *sock, *nsock; + struct netconn *newconn; + struct ip_addr naddr; + u16_t port; + int newsock; + struct sockaddr_in sin; + err_t err; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d)...\n", s)); + sock = get_socket(s); + if (!sock) + return -1; + + if ((sock->flags & O_NONBLOCK) && (sock->rcvevent <= 0)) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d): returning EWOULDBLOCK\n", s)); + sock_set_errno(sock, EWOULDBLOCK); + return -1; + } + + newconn = netconn_accept(sock->conn); + if (!newconn) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d) failed, err=%d\n", s, sock->conn->err)); + sock_set_errno(sock, err_to_errno(sock->conn->err)); + return -1; + } + + /* get the IP address and port of the remote host */ + err = netconn_peer(newconn, &naddr, &port); + if (err != ERR_OK) { + netconn_delete(newconn); + sock_set_errno(sock, err_to_errno(err)); + return -1; + } + + /* Note that POSIX only requires us to check addr is non-NULL. addrlen must + * not be NULL if addr is valid. + */ + if (NULL != addr) { + LWIP_ASSERT("addr valid but addrlen NULL", addrlen != NULL); + memset(&sin, 0, sizeof(sin)); + sin.sin_len = sizeof(sin); + sin.sin_family = AF_INET; + sin.sin_port = htons(port); + sin.sin_addr.s_addr = naddr.addr; + + if (*addrlen > sizeof(sin)) + *addrlen = sizeof(sin); + + MEMCPY(addr, &sin, *addrlen); + } + + newsock = alloc_socket(newconn); + if (newsock == -1) { + netconn_delete(newconn); + sock_set_errno(sock, ENFILE); + return -1; + } + LWIP_ASSERT("invalid socket index", (newsock >= 0) && (newsock < NUM_SOCKETS)); + newconn->callback = event_callback; + nsock = &sockets[newsock]; + LWIP_ASSERT("invalid socket pointer", nsock != NULL); + + sys_sem_wait(socksem); + /* See event_callback: If data comes in right away after an accept, even + * though the server task might not have created a new socket yet. + * In that case, newconn->socket is counted down (newconn->socket--), + * so nsock->rcvevent is >= 1 here! + */ + nsock->rcvevent += -1 - newconn->socket; + newconn->socket = newsock; + sys_sem_signal(socksem); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_accept(%d) returning new sock=%d addr=", s, newsock)); + ip_addr_debug_print(SOCKETS_DEBUG, &naddr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F"\n", port)); + + sock_set_errno(sock, 0); + return newsock; +} + +int +lwip_bind(int s, const struct sockaddr *name, socklen_t namelen) +{ + struct lwip_socket *sock; + struct ip_addr local_addr; + u16_t local_port; + err_t err; + + sock = get_socket(s); + if (!sock) + return -1; + + LWIP_ERROR("lwip_bind: invalid address", ((namelen == sizeof(struct sockaddr_in)) && + ((((const struct sockaddr_in *)name)->sin_family) == AF_INET)), + sock_set_errno(sock, err_to_errno(ERR_ARG)); return -1;); + + local_addr.addr = ((const struct sockaddr_in *)name)->sin_addr.s_addr; + local_port = ((const struct sockaddr_in *)name)->sin_port; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d, addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, &local_addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F")\n", ntohs(local_port))); + + err = netconn_bind(sock->conn, &local_addr, ntohs(local_port)); + + if (err != ERR_OK) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d) failed, err=%d\n", s, err)); + sock_set_errno(sock, err_to_errno(err)); + return -1; + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_bind(%d) succeeded\n", s)); + sock_set_errno(sock, 0); + return 0; +} + +int +lwip_close(int s) +{ + struct lwip_socket *sock; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_close(%d)\n", s)); + + sock = get_socket(s); + if (!sock) { + return -1; + } + + netconn_delete(sock->conn); + + sys_sem_wait(socksem); + if (sock->lastdata) { + netbuf_delete(sock->lastdata); + } + sock->lastdata = NULL; + sock->lastoffset = 0; + sock->conn = NULL; + sock_set_errno(sock, 0); + sys_sem_signal(socksem); + return 0; +} + +int +lwip_connect(int s, const struct sockaddr *name, socklen_t namelen) +{ + struct lwip_socket *sock; + err_t err; + + sock = get_socket(s); + if (!sock) + return -1; + + LWIP_ERROR("lwip_connect: invalid address", ((namelen == sizeof(struct sockaddr_in)) && + ((((const struct sockaddr_in *)name)->sin_family) == AF_INET)), + sock_set_errno(sock, err_to_errno(ERR_ARG)); return -1;); + + if (((const struct sockaddr_in *)name)->sin_family == AF_UNSPEC) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, AF_UNSPEC)\n", s)); + err = netconn_disconnect(sock->conn); + } else { + struct ip_addr remote_addr; + u16_t remote_port; + + remote_addr.addr = ((const struct sockaddr_in *)name)->sin_addr.s_addr; + remote_port = ((const struct sockaddr_in *)name)->sin_port; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d, addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, &remote_addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F")\n", ntohs(remote_port))); + + err = netconn_connect(sock->conn, &remote_addr, ntohs(remote_port)); + } + + if (err != ERR_OK) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) failed, err=%d\n", s, err)); + sock_set_errno(sock, err_to_errno(err)); + return -1; + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_connect(%d) succeeded\n", s)); + sock_set_errno(sock, 0); + return 0; +} + +/** + * Set a socket into listen mode. + * The socket may not have been used for another connection previously. + * + * @param s the socket to set to listening mode + * @param backlog (ATTENTION: need TCP_LISTEN_BACKLOG=1) + * @return 0 on success, non-zero on failure + */ +int +lwip_listen(int s, int backlog) +{ + struct lwip_socket *sock; + err_t err; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_listen(%d, backlog=%d)\n", s, backlog)); + + sock = get_socket(s); + if (!sock) + return -1; + + /* limit the "backlog" parameter to fit in an u8_t */ + if (backlog < 0) { + backlog = 0; + } + if (backlog > 0xff) { + backlog = 0xff; + } + + err = netconn_listen_with_backlog(sock->conn, backlog); + + if (err != ERR_OK) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_listen(%d) failed, err=%d\n", s, err)); + sock_set_errno(sock, err_to_errno(err)); + return -1; + } + + sock_set_errno(sock, 0); + return 0; +} + +int +lwip_recvfrom(int s, void *mem, size_t len, int flags, + struct sockaddr *from, socklen_t *fromlen) +{ + struct lwip_socket *sock; + struct netbuf *buf; + u16_t buflen, copylen, off = 0; + struct ip_addr *addr; + u16_t port; + u8_t done = 0; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d, %p, %"SZT_F", 0x%x, ..)\n", s, mem, len, flags)); + sock = get_socket(s); + if (!sock) + return -1; + + do { + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: top while sock->lastdata=%p\n", (void*)sock->lastdata)); + /* Check if there is data left from the last recv operation. */ + if (sock->lastdata) { + buf = sock->lastdata; + } else { + /* If this is non-blocking call, then check first */ + if (((flags & MSG_DONTWAIT) || (sock->flags & O_NONBLOCK)) && + (sock->rcvevent <= 0)) { + if (off > 0) { + /* already received data, return that */ + sock_set_errno(sock, 0); + return off; + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): returning EWOULDBLOCK\n", s)); + sock_set_errno(sock, EWOULDBLOCK); + return -1; + } + + /* No data was left from the previous operation, so we try to get + some from the network. */ + sock->lastdata = buf = netconn_recv(sock->conn); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: netconn_recv netbuf=%p\n", (void*)buf)); + + if (!buf) { + if (off > 0) { + /* already received data, return that */ + sock_set_errno(sock, 0); + return off; + } + /* We should really do some error checking here. */ + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): buf == NULL!\n", s)); + sock_set_errno(sock, (((sock->conn->pcb.ip != NULL) && (sock->conn->err == ERR_OK)) + ? ETIMEDOUT : err_to_errno(sock->conn->err))); + return 0; + } + } + + buflen = netbuf_len(buf); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: buflen=%"U16_F" len=%"SZT_F" off=%"U16_F" sock->lastoffset=%"U16_F"\n", + buflen, len, off, sock->lastoffset)); + + buflen -= sock->lastoffset; + + if (len > buflen) { + copylen = buflen; + } else { + copylen = (u16_t)len; + } + + /* copy the contents of the received buffer into + the supplied memory pointer mem */ + netbuf_copy_partial(buf, (u8_t*)mem + off, copylen, sock->lastoffset); + + off += copylen; + + if (netconn_type(sock->conn) == NETCONN_TCP) { + LWIP_ASSERT("invalid copylen, len would underflow", len >= copylen); + len -= copylen; + if ( (len <= 0) || + (buf->p->flags & PBUF_FLAG_PUSH) || + (sock->rcvevent <= 0) || + ((flags & MSG_PEEK)!=0)) { + done = 1; + } + } else { + done = 1; + } + + /* Check to see from where the data was.*/ + if (done) { + if (from && fromlen) { + struct sockaddr_in sin; + + if (netconn_type(sock->conn) == NETCONN_TCP) { + addr = (struct ip_addr*)&(sin.sin_addr.s_addr); + netconn_getaddr(sock->conn, addr, &port, 0); + } else { + addr = netbuf_fromaddr(buf); + port = netbuf_fromport(buf); + } + + memset(&sin, 0, sizeof(sin)); + sin.sin_len = sizeof(sin); + sin.sin_family = AF_INET; + sin.sin_port = htons(port); + sin.sin_addr.s_addr = addr->addr; + + if (*fromlen > sizeof(sin)) { + *fromlen = sizeof(sin); + } + + MEMCPY(from, &sin, *fromlen); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%"U16_F"\n", port, off)); + } else { + #if SOCKETS_DEBUG + struct sockaddr_in sin; + + if (netconn_type(sock->conn) == NETCONN_TCP) { + addr = (struct ip_addr*)&(sin.sin_addr.s_addr); + netconn_getaddr(sock->conn, addr, &port, 0); + } else { + addr = netbuf_fromaddr(buf); + port = netbuf_fromport(buf); + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom(%d): addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F" len=%"U16_F"\n", port, off)); + #endif /* SOCKETS_DEBUG */ + } + } + + /* If we don't peek the incoming message... */ + if ((flags & MSG_PEEK)==0) { + /* If this is a TCP socket, check if there is data left in the + buffer. If so, it should be saved in the sock structure for next + time around. */ + if ((netconn_type(sock->conn) == NETCONN_TCP) && (buflen - copylen > 0)) { + sock->lastdata = buf; + sock->lastoffset += copylen; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: lastdata now netbuf=%p\n", (void*)buf)); + } else { + sock->lastdata = NULL; + sock->lastoffset = 0; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_recvfrom: deleting netbuf=%p\n", (void*)buf)); + netbuf_delete(buf); + } + } + } while (!done); + + sock_set_errno(sock, 0); + return off; +} + +int +lwip_read(int s, void *mem, size_t len) +{ + return lwip_recvfrom(s, mem, len, 0, NULL, NULL); +} + +int +lwip_recv(int s, void *mem, size_t len, int flags) +{ + return lwip_recvfrom(s, mem, len, flags, NULL, NULL); +} + +int +lwip_send(int s, const void *data, size_t size, int flags) +{ + struct lwip_socket *sock; + err_t err; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d, data=%p, size=%"SZT_F", flags=0x%x)\n", + s, data, size, flags)); + + sock = get_socket(s); + if (!sock) + return -1; + + if (sock->conn->type != NETCONN_TCP) { +#if (LWIP_UDP || LWIP_RAW) + return lwip_sendto(s, data, size, flags, NULL, 0); +#else + sock_set_errno(sock, err_to_errno(ERR_ARG)); + return -1; +#endif /* (LWIP_UDP || LWIP_RAW) */ + } + + err = netconn_write(sock->conn, data, size, NETCONN_COPY | ((flags & MSG_MORE)?NETCONN_MORE:0)); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_send(%d) err=%d size=%"SZT_F"\n", s, err, size)); + sock_set_errno(sock, err_to_errno(err)); + return (err == ERR_OK ? (int)size : -1); +} + +int +lwip_sendto(int s, const void *data, size_t size, int flags, + const struct sockaddr *to, socklen_t tolen) +{ + struct lwip_socket *sock; + struct ip_addr remote_addr; + err_t err; + u16_t short_size; +#if !LWIP_TCPIP_CORE_LOCKING + struct netbuf buf; + u16_t remote_port; +#endif + + sock = get_socket(s); + if (!sock) + return -1; + + if (sock->conn->type == NETCONN_TCP) { +#if LWIP_TCP + return lwip_send(s, data, size, flags); +#else + sock_set_errno(sock, err_to_errno(ERR_ARG)); + return -1; +#endif /* LWIP_TCP */ + } + + LWIP_ASSERT("lwip_sendto: size must fit in u16_t", size <= 0xffff); + short_size = (u16_t)size; + LWIP_ERROR("lwip_sendto: invalid address", (((to == NULL) && (tolen == 0)) || + ((tolen == sizeof(struct sockaddr_in)) && + ((((const struct sockaddr_in *)to)->sin_family) == AF_INET))), + sock_set_errno(sock, err_to_errno(ERR_ARG)); return -1;); + +#if LWIP_TCPIP_CORE_LOCKING + /* Should only be consider like a sample or a simple way to experiment this option (no check of "to" field...) */ + { struct pbuf* p; + + p = pbuf_alloc(PBUF_TRANSPORT, 0, PBUF_REF); + if (p == NULL) { + err = ERR_MEM; + } else { + p->payload = (void*)data; + p->len = p->tot_len = short_size; + + remote_addr.addr = ((const struct sockaddr_in *)to)->sin_addr.s_addr; + + LOCK_TCPIP_CORE(); + if (sock->conn->type==NETCONN_RAW) { + err = sock->conn->err = raw_sendto(sock->conn->pcb.raw, p, &remote_addr); + } else { + err = sock->conn->err = udp_sendto(sock->conn->pcb.udp, p, &remote_addr, ntohs(((const struct sockaddr_in *)to)->sin_port)); + } + UNLOCK_TCPIP_CORE(); + + pbuf_free(p); + } + } +#else + /* initialize a buffer */ + buf.p = buf.ptr = NULL; + if (to) { + remote_addr.addr = ((const struct sockaddr_in *)to)->sin_addr.s_addr; + remote_port = ntohs(((const struct sockaddr_in *)to)->sin_port); + buf.addr = &remote_addr; + buf.port = remote_port; + } else { + remote_addr.addr = 0; + remote_port = 0; + buf.addr = NULL; + buf.port = 0; + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_sendto(%d, data=%p, short_size=%d"U16_F", flags=0x%x to=", + s, data, short_size, flags)); + ip_addr_debug_print(SOCKETS_DEBUG, &remote_addr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F"\n", remote_port)); + + /* make the buffer point to the data that should be sent */ +#if LWIP_NETIF_TX_SINGLE_PBUF + /* Allocate a new netbuf and copy the data into it. */ + if (netbuf_alloc(&buf, short_size) == NULL) { + err = ERR_MEM; + } else { + err = netbuf_take(&buf, data, short_size); + } +#else /* LWIP_NETIF_TX_SINGLE_PBUF */ + err = netbuf_ref(&buf, data, short_size); +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + if (err == ERR_OK) { + /* send the data */ + err = netconn_send(sock->conn, &buf); + } + + /* deallocated the buffer */ + netbuf_free(&buf); +#endif /* LWIP_TCPIP_CORE_LOCKING */ + sock_set_errno(sock, err_to_errno(err)); + return (err == ERR_OK ? short_size : -1); +} + +int +lwip_socket(int domain, int type, int protocol) +{ + struct netconn *conn; + int i; + + LWIP_UNUSED_ARG(domain); + + /* create a netconn */ + switch (type) { + case SOCK_RAW: + conn = netconn_new_with_proto_and_callback(NETCONN_RAW, (u8_t)protocol, event_callback); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_RAW, %d) = ", + domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); + break; + case SOCK_DGRAM: + conn = netconn_new_with_callback( (protocol == IPPROTO_UDPLITE) ? + NETCONN_UDPLITE : NETCONN_UDP, event_callback); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_DGRAM, %d) = ", + domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); + break; + case SOCK_STREAM: + conn = netconn_new_with_callback(NETCONN_TCP, event_callback); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%s, SOCK_STREAM, %d) = ", + domain == PF_INET ? "PF_INET" : "UNKNOWN", protocol)); + break; + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_socket(%d, %d/UNKNOWN, %d) = -1\n", + domain, type, protocol)); + set_errno(EINVAL); + return -1; + } + + if (!conn) { + LWIP_DEBUGF(SOCKETS_DEBUG, ("-1 / ENOBUFS (could not create netconn)\n")); + set_errno(ENOBUFS); + return -1; + } + + i = alloc_socket(conn); + + if (i == -1) { + netconn_delete(conn); + set_errno(ENFILE); + return -1; + } + conn->socket = i; + LWIP_DEBUGF(SOCKETS_DEBUG, ("%d\n", i)); + set_errno(0); + return i; +} + +int +lwip_write(int s, const void *data, size_t size) +{ + return lwip_send(s, data, size, 0); +} + +/** + * Go through the readset and writeset lists and see which socket of the sockets + * set in the sets has events. On return, readset, writeset and exceptset have + * the sockets enabled that had events. + * + * exceptset is not used for now!!! + * + * @param maxfdp1 the highest socket index in the sets + * @param readset in: set of sockets to check for read events; + * out: set of sockets that had read events + * @param writeset in: set of sockets to check for write events; + * out: set of sockets that had write events + * @param exceptset not yet implemented + * @return number of sockets that had events (read+write) + */ +static int +lwip_selscan(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset) +{ + int i, nready = 0; + fd_set lreadset, lwriteset, lexceptset; + struct lwip_socket *p_sock; + + FD_ZERO(&lreadset); + FD_ZERO(&lwriteset); + FD_ZERO(&lexceptset); + + /* Go through each socket in each list to count number of sockets which + currently match */ + for(i = 0; i < maxfdp1; i++) { + if (FD_ISSET(i, readset)) { + /* See if netconn of this socket is ready for read */ + p_sock = get_socket(i); + if (p_sock && (p_sock->lastdata || (p_sock->rcvevent > 0))) { + FD_SET(i, &lreadset); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_selscan: fd=%d ready for reading\n", i)); + nready++; + } + } + if (FD_ISSET(i, writeset)) { + /* See if netconn of this socket is ready for write */ + p_sock = get_socket(i); + if (p_sock && p_sock->sendevent) { + FD_SET(i, &lwriteset); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_selscan: fd=%d ready for writing\n", i)); + nready++; + } + } + } + *readset = lreadset; + *writeset = lwriteset; + FD_ZERO(exceptset); + + return nready; +} + + +/** + * Processing exceptset is not yet implemented. + */ +int +lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, + struct timeval *timeout) +{ + int i; + int nready; + fd_set lreadset, lwriteset, lexceptset; + u32_t msectimeout; + struct lwip_select_cb select_cb; + struct lwip_select_cb *p_selcb; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select(%d, %p, %p, %p, tvsec=%ld tvusec=%ld)\n", + maxfdp1, (void *)readset, (void *) writeset, (void *) exceptset, + timeout ? (long)timeout->tv_sec : (long)-1, + timeout ? (long)timeout->tv_usec : (long)-1)); + + select_cb.next = 0; + select_cb.readset = readset; + select_cb.writeset = writeset; + select_cb.exceptset = exceptset; + select_cb.sem_signalled = 0; + + /* Protect ourselves searching through the list */ + sys_sem_wait(selectsem); + + if (readset) + lreadset = *readset; + else + FD_ZERO(&lreadset); + if (writeset) + lwriteset = *writeset; + else + FD_ZERO(&lwriteset); + if (exceptset) + lexceptset = *exceptset; + else + FD_ZERO(&lexceptset); + + /* Go through each socket in each list to count number of sockets which + currently match */ + nready = lwip_selscan(maxfdp1, &lreadset, &lwriteset, &lexceptset); + + /* If we don't have any current events, then suspend if we are supposed to */ + if (!nready) { + if (timeout && timeout->tv_sec == 0 && timeout->tv_usec == 0) { + sys_sem_signal(selectsem); + if (readset) + FD_ZERO(readset); + if (writeset) + FD_ZERO(writeset); + if (exceptset) + FD_ZERO(exceptset); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: no timeout, returning 0\n")); + set_errno(0); + + return 0; + } + + /* add our semaphore to list */ + /* We don't actually need any dynamic memory. Our entry on the + * list is only valid while we are in this function, so it's ok + * to use local variables */ + + select_cb.sem = sys_sem_new(0); + /* Note that we are still protected */ + /* Put this select_cb on top of list */ + select_cb.next = select_cb_list; + select_cb_list = &select_cb; + + /* Now we can safely unprotect */ + sys_sem_signal(selectsem); + + /* Now just wait to be woken */ + if (timeout == 0) + /* Wait forever */ + msectimeout = 0; + else { + msectimeout = ((timeout->tv_sec * 1000) + ((timeout->tv_usec + 500)/1000)); + if(msectimeout == 0) + msectimeout = 1; + } + + i = sys_sem_wait_timeout(select_cb.sem, msectimeout); + + /* Take us off the list */ + sys_sem_wait(selectsem); + if (select_cb_list == &select_cb) + select_cb_list = select_cb.next; + else + for (p_selcb = select_cb_list; p_selcb; p_selcb = p_selcb->next) { + if (p_selcb->next == &select_cb) { + p_selcb->next = select_cb.next; + break; + } + } + + sys_sem_signal(selectsem); + + sys_sem_free(select_cb.sem); + if (i == 0) { + /* Timeout */ + if (readset) + FD_ZERO(readset); + if (writeset) + FD_ZERO(writeset); + if (exceptset) + FD_ZERO(exceptset); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: timeout expired\n")); + set_errno(0); + + return 0; + } + + if (readset) + lreadset = *readset; + else + FD_ZERO(&lreadset); + if (writeset) + lwriteset = *writeset; + else + FD_ZERO(&lwriteset); + if (exceptset) + lexceptset = *exceptset; + else + FD_ZERO(&lexceptset); + + /* See what's set */ + nready = lwip_selscan(maxfdp1, &lreadset, &lwriteset, &lexceptset); + } else + sys_sem_signal(selectsem); + + if (readset) + *readset = lreadset; + if (writeset) + *writeset = lwriteset; + if (exceptset) + *exceptset = lexceptset; + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_select: nready=%d\n", nready)); + set_errno(0); + + return nready; +} + +/** + * Callback registered in the netconn layer for each socket-netconn. + * Processes recvevent (data available) and wakes up tasks waiting for select. + */ +static void +event_callback(struct netconn *conn, enum netconn_evt evt, u16_t len) +{ + int s; + struct lwip_socket *sock; + struct lwip_select_cb *scb; + + LWIP_UNUSED_ARG(len); + + /* Get socket */ + if (conn) { + s = conn->socket; + if (s < 0) { + /* Data comes in right away after an accept, even though + * the server task might not have created a new socket yet. + * Just count down (or up) if that's the case and we + * will use the data later. Note that only receive events + * can happen before the new socket is set up. */ + sys_sem_wait(socksem); + if (conn->socket < 0) { + if (evt == NETCONN_EVT_RCVPLUS) { + conn->socket--; + } + sys_sem_signal(socksem); + return; + } + s = conn->socket; + sys_sem_signal(socksem); + } + + sock = get_socket(s); + if (!sock) { + return; + } + } else { + return; + } + + sys_sem_wait(selectsem); + /* Set event as required */ + switch (evt) { + case NETCONN_EVT_RCVPLUS: + sock->rcvevent++; + break; + case NETCONN_EVT_RCVMINUS: + sock->rcvevent--; + break; + case NETCONN_EVT_SENDPLUS: + sock->sendevent = 1; + break; + case NETCONN_EVT_SENDMINUS: + sock->sendevent = 0; + break; + default: + LWIP_ASSERT("unknown event", 0); + break; + } + sys_sem_signal(selectsem); + + /* Now decide if anyone is waiting for this socket */ + /* NOTE: This code is written this way to protect the select link list + but to avoid a deadlock situation by releasing socksem before + signalling for the select. This means we need to go through the list + multiple times ONLY IF a select was actually waiting. We go through + the list the number of waiting select calls + 1. This list is + expected to be small. */ + while (1) { + sys_sem_wait(selectsem); + for (scb = select_cb_list; scb; scb = scb->next) { + if (scb->sem_signalled == 0) { + /* Test this select call for our socket */ + if (scb->readset && FD_ISSET(s, scb->readset)) + if (sock->rcvevent > 0) + break; + if (scb->writeset && FD_ISSET(s, scb->writeset)) + if (sock->sendevent) + break; + } + } + if (scb) { + scb->sem_signalled = 1; + sys_sem_signal(scb->sem); + sys_sem_signal(selectsem); + } else { + sys_sem_signal(selectsem); + break; + } + } +} + +/** + * Unimplemented: Close one end of a full-duplex connection. + * Currently, the full connection is closed. + */ +int +lwip_shutdown(int s, int how) +{ + LWIP_UNUSED_ARG(how); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_shutdown(%d, how=%d)\n", s, how)); + return lwip_close(s); /* XXX temporary hack until proper implementation */ +} + +static int +lwip_getaddrname(int s, struct sockaddr *name, socklen_t *namelen, u8_t local) +{ + struct lwip_socket *sock; + struct sockaddr_in sin; + struct ip_addr naddr; + + sock = get_socket(s); + if (!sock) + return -1; + + memset(&sin, 0, sizeof(sin)); + sin.sin_len = sizeof(sin); + sin.sin_family = AF_INET; + + /* get the IP address and port */ + netconn_getaddr(sock->conn, &naddr, &sin.sin_port, local); + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getaddrname(%d, addr=", s)); + ip_addr_debug_print(SOCKETS_DEBUG, &naddr); + LWIP_DEBUGF(SOCKETS_DEBUG, (" port=%"U16_F")\n", sin.sin_port)); + + sin.sin_port = htons(sin.sin_port); + sin.sin_addr.s_addr = naddr.addr; + + if (*namelen > sizeof(sin)) + *namelen = sizeof(sin); + + MEMCPY(name, &sin, *namelen); + sock_set_errno(sock, 0); + return 0; +} + +int +lwip_getpeername(int s, struct sockaddr *name, socklen_t *namelen) +{ + return lwip_getaddrname(s, name, namelen, 0); +} + +int +lwip_getsockname(int s, struct sockaddr *name, socklen_t *namelen) +{ + return lwip_getaddrname(s, name, namelen, 1); +} + +int +lwip_getsockopt(int s, int level, int optname, void *optval, socklen_t *optlen) +{ + err_t err = ERR_OK; + struct lwip_socket *sock = get_socket(s); + struct lwip_setgetsockopt_data data; + + if (!sock) + return -1; + + if ((NULL == optval) || (NULL == optlen)) { + sock_set_errno(sock, EFAULT); + return -1; + } + + /* Do length and type checks for the various options first, to keep it readable. */ + switch (level) { + +/* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) { + + case SO_ACCEPTCONN: + case SO_BROADCAST: + /* UNIMPL case SO_DEBUG: */ + /* UNIMPL case SO_DONTROUTE: */ + case SO_ERROR: + case SO_KEEPALIVE: + /* UNIMPL case SO_CONTIMEO: */ + /* UNIMPL case SO_SNDTIMEO: */ +#if LWIP_SO_RCVTIMEO + case SO_RCVTIMEO: +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + case SO_RCVBUF: +#endif /* LWIP_SO_RCVBUF */ + /* UNIMPL case SO_OOBINLINE: */ + /* UNIMPL case SO_SNDBUF: */ + /* UNIMPL case SO_RCVLOWAT: */ + /* UNIMPL case SO_SNDLOWAT: */ +#if SO_REUSE + case SO_REUSEADDR: + case SO_REUSEPORT: +#endif /* SO_REUSE */ + case SO_TYPE: + /* UNIMPL case SO_USELOOPBACK: */ + if (*optlen < sizeof(int)) { + err = EINVAL; + } + break; + + case SO_NO_CHECK: + if (*optlen < sizeof(int)) { + err = EINVAL; + } +#if LWIP_UDP + if ((sock->conn->type != NETCONN_UDP) || + ((udp_flags(sock->conn->pcb.udp) & UDP_FLAGS_UDPLITE) != 0)) { + /* this flag is only available for UDP, not for UDP lite */ + err = EAFNOSUPPORT; + } +#endif /* LWIP_UDP */ + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; + +/* Level: IPPROTO_IP */ + case IPPROTO_IP: + switch (optname) { + /* UNIMPL case IP_HDRINCL: */ + /* UNIMPL case IP_RCVDSTADDR: */ + /* UNIMPL case IP_RCVIF: */ + case IP_TTL: + case IP_TOS: + if (*optlen < sizeof(int)) { + err = EINVAL; + } + break; +#if LWIP_IGMP + case IP_MULTICAST_TTL: + if (*optlen < sizeof(u8_t)) { + err = EINVAL; + } + break; + case IP_MULTICAST_IF: + if (*optlen < sizeof(struct in_addr)) { + err = EINVAL; + } + break; +#endif /* LWIP_IGMP */ + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; + +#if LWIP_TCP +/* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + if (*optlen < sizeof(int)) { + err = EINVAL; + break; + } + + /* If this is no TCP socket, ignore any options. */ + if (sock->conn->type != NETCONN_TCP) + return 0; + + switch (optname) { + case TCP_NODELAY: + case TCP_KEEPALIVE: +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + case TCP_KEEPINTVL: + case TCP_KEEPCNT: +#endif /* LWIP_TCP_KEEPALIVE */ + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_TCP, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; +#endif /* LWIP_TCP */ +#if LWIP_UDP && LWIP_UDPLITE +/* Level: IPPROTO_UDPLITE */ + case IPPROTO_UDPLITE: + if (*optlen < sizeof(int)) { + err = EINVAL; + break; + } + + /* If this is no UDP lite socket, ignore any options. */ + if (sock->conn->type != NETCONN_UDPLITE) + return 0; + + switch (optname) { + case UDPLITE_SEND_CSCOV: + case UDPLITE_RECV_CSCOV: + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_UDPLITE, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; +#endif /* LWIP_UDP && LWIP_UDPLITE*/ +/* UNDEFINED LEVEL */ + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, level=0x%x, UNIMPL: optname=0x%x, ..)\n", + s, level, optname)); + err = ENOPROTOOPT; + } /* switch */ + + + if (err != ERR_OK) { + sock_set_errno(sock, err); + return -1; + } + + /* Now do the actual option processing */ + data.sock = sock; + data.level = level; + data.optname = optname; + data.optval = optval; + data.optlen = optlen; + data.err = err; + tcpip_callback(lwip_getsockopt_internal, &data); + sys_arch_sem_wait(sock->conn->op_completed, 0); + /* maybe lwip_getsockopt_internal has changed err */ + err = data.err; + + sock_set_errno(sock, err); + return err ? -1 : 0; +} + +static void +lwip_getsockopt_internal(void *arg) +{ + struct lwip_socket *sock; +#ifdef LWIP_DEBUG + int s; +#endif /* LWIP_DEBUG */ + int level, optname; + void *optval; + struct lwip_setgetsockopt_data *data; + + LWIP_ASSERT("arg != NULL", arg != NULL); + + data = (struct lwip_setgetsockopt_data*)arg; + sock = data->sock; +#ifdef LWIP_DEBUG + s = data->s; +#endif /* LWIP_DEBUG */ + level = data->level; + optname = data->optname; + optval = data->optval; + + switch (level) { + +/* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) { + + /* The option flags */ + case SO_ACCEPTCONN: + case SO_BROADCAST: + /* UNIMPL case SO_DEBUG: */ + /* UNIMPL case SO_DONTROUTE: */ + case SO_KEEPALIVE: + /* UNIMPL case SO_OOBINCLUDE: */ +#if SO_REUSE + case SO_REUSEADDR: + case SO_REUSEPORT: +#endif /* SO_REUSE */ + /*case SO_USELOOPBACK: UNIMPL */ + *(int*)optval = sock->conn->pcb.ip->so_options & optname; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, optname=0x%x, ..) = %s\n", + s, optname, (*(int*)optval?"on":"off"))); + break; + + case SO_TYPE: + switch (NETCONNTYPE_GROUP(sock->conn->type)) { + case NETCONN_RAW: + *(int*)optval = SOCK_RAW; + break; + case NETCONN_TCP: + *(int*)optval = SOCK_STREAM; + break; + case NETCONN_UDP: + *(int*)optval = SOCK_DGRAM; + break; + default: /* unrecognized socket type */ + *(int*)optval = sock->conn->type; + LWIP_DEBUGF(SOCKETS_DEBUG, + ("lwip_getsockopt(%d, SOL_SOCKET, SO_TYPE): unrecognized socket type %d\n", + s, *(int *)optval)); + } /* switch (sock->conn->type) */ + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_TYPE) = %d\n", + s, *(int *)optval)); + break; + + case SO_ERROR: + if (sock->err == 0) { + sock_set_errno(sock, err_to_errno(sock->conn->err)); + } + *(int *)optval = sock->err; + sock->err = 0; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, SOL_SOCKET, SO_ERROR) = %d\n", + s, *(int *)optval)); + break; + +#if LWIP_SO_RCVTIMEO + case SO_RCVTIMEO: + *(int *)optval = sock->conn->recv_timeout; + break; +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + case SO_RCVBUF: + *(int *)optval = sock->conn->recv_bufsize; + break; +#endif /* LWIP_SO_RCVBUF */ +#if LWIP_UDP + case SO_NO_CHECK: + *(int*)optval = (udp_flags(sock->conn->pcb.udp) & UDP_FLAGS_NOCHKSUM) ? 1 : 0; + break; +#endif /* LWIP_UDP*/ + } /* switch (optname) */ + break; + +/* Level: IPPROTO_IP */ + case IPPROTO_IP: + switch (optname) { + case IP_TTL: + *(int*)optval = sock->conn->pcb.ip->ttl; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_TTL) = %d\n", + s, *(int *)optval)); + break; + case IP_TOS: + *(int*)optval = sock->conn->pcb.ip->tos; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_TOS) = %d\n", + s, *(int *)optval)); + break; +#if LWIP_IGMP + case IP_MULTICAST_TTL: + *(u8_t*)optval = sock->conn->pcb.ip->ttl; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_MULTICAST_TTL) = %d\n", + s, *(int *)optval)); + break; + case IP_MULTICAST_IF: + ((struct in_addr*) optval)->s_addr = sock->conn->pcb.udp->multicast_ip.addr; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, IP_MULTICAST_IF) = 0x%"X32_F"\n", + s, *(u32_t *)optval)); + break; +#endif /* LWIP_IGMP */ + } /* switch (optname) */ + break; + +#if LWIP_TCP +/* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + switch (optname) { + case TCP_NODELAY: + *(int*)optval = tcp_nagle_disabled(sock->conn->pcb.tcp); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_TCP, TCP_NODELAY) = %s\n", + s, (*(int*)optval)?"on":"off") ); + break; + case TCP_KEEPALIVE: + *(int*)optval = (int)sock->conn->pcb.tcp->keep_idle; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPALIVE) = %d\n", + s, *(int *)optval)); + break; + +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + *(int*)optval = (int)(sock->conn->pcb.tcp->keep_idle/1000); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPIDLE) = %d\n", + s, *(int *)optval)); + break; + case TCP_KEEPINTVL: + *(int*)optval = (int)(sock->conn->pcb.tcp->keep_intvl/1000); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPINTVL) = %d\n", + s, *(int *)optval)); + break; + case TCP_KEEPCNT: + *(int*)optval = (int)sock->conn->pcb.tcp->keep_cnt; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_IP, TCP_KEEPCNT) = %d\n", + s, *(int *)optval)); + break; +#endif /* LWIP_TCP_KEEPALIVE */ + + } /* switch (optname) */ + break; +#endif /* LWIP_TCP */ +#if LWIP_UDP && LWIP_UDPLITE + /* Level: IPPROTO_UDPLITE */ + case IPPROTO_UDPLITE: + switch (optname) { + case UDPLITE_SEND_CSCOV: + *(int*)optval = sock->conn->pcb.udp->chksum_len_tx; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_UDPLITE, UDPLITE_SEND_CSCOV) = %d\n", + s, (*(int*)optval)) ); + break; + case UDPLITE_RECV_CSCOV: + *(int*)optval = sock->conn->pcb.udp->chksum_len_rx; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_getsockopt(%d, IPPROTO_UDPLITE, UDPLITE_RECV_CSCOV) = %d\n", + s, (*(int*)optval)) ); + break; + } /* switch (optname) */ + break; +#endif /* LWIP_UDP */ + } /* switch (level) */ + sys_sem_signal(sock->conn->op_completed); +} + +int +lwip_setsockopt(int s, int level, int optname, const void *optval, socklen_t optlen) +{ + struct lwip_socket *sock = get_socket(s); + int err = ERR_OK; + struct lwip_setgetsockopt_data data; + + if (!sock) + return -1; + + if (NULL == optval) { + sock_set_errno(sock, EFAULT); + return -1; + } + + /* Do length and type checks for the various options first, to keep it readable. */ + switch (level) { + +/* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) { + + case SO_BROADCAST: + /* UNIMPL case SO_DEBUG: */ + /* UNIMPL case SO_DONTROUTE: */ + case SO_KEEPALIVE: + /* UNIMPL case case SO_CONTIMEO: */ + /* UNIMPL case case SO_SNDTIMEO: */ +#if LWIP_SO_RCVTIMEO + case SO_RCVTIMEO: +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + case SO_RCVBUF: +#endif /* LWIP_SO_RCVBUF */ + /* UNIMPL case SO_OOBINLINE: */ + /* UNIMPL case SO_SNDBUF: */ + /* UNIMPL case SO_RCVLOWAT: */ + /* UNIMPL case SO_SNDLOWAT: */ +#if SO_REUSE + case SO_REUSEADDR: + case SO_REUSEPORT: +#endif /* SO_REUSE */ + /* UNIMPL case SO_USELOOPBACK: */ + if (optlen < sizeof(int)) { + err = EINVAL; + } + break; + case SO_NO_CHECK: + if (optlen < sizeof(int)) { + err = EINVAL; + } +#if LWIP_UDP + if ((sock->conn->type != NETCONN_UDP) || + ((udp_flags(sock->conn->pcb.udp) & UDP_FLAGS_UDPLITE) != 0)) { + /* this flag is only available for UDP, not for UDP lite */ + err = EAFNOSUPPORT; + } +#endif /* LWIP_UDP */ + break; + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, SOL_SOCKET, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; + +/* Level: IPPROTO_IP */ + case IPPROTO_IP: + switch (optname) { + /* UNIMPL case IP_HDRINCL: */ + /* UNIMPL case IP_RCVDSTADDR: */ + /* UNIMPL case IP_RCVIF: */ + case IP_TTL: + case IP_TOS: + if (optlen < sizeof(int)) { + err = EINVAL; + } + break; +#if LWIP_IGMP + case IP_MULTICAST_TTL: + if (optlen < sizeof(u8_t)) { + err = EINVAL; + } + if (NETCONNTYPE_GROUP(sock->conn->type) != NETCONN_UDP) { + err = EAFNOSUPPORT; + } + break; + case IP_MULTICAST_IF: + if (optlen < sizeof(struct in_addr)) { + err = EINVAL; + } + if (NETCONNTYPE_GROUP(sock->conn->type) != NETCONN_UDP) { + err = EAFNOSUPPORT; + } + break; + case IP_ADD_MEMBERSHIP: + case IP_DROP_MEMBERSHIP: + if (optlen < sizeof(struct ip_mreq)) { + err = EINVAL; + } + if (NETCONNTYPE_GROUP(sock->conn->type) != NETCONN_UDP) { + err = EAFNOSUPPORT; + } + break; +#endif /* LWIP_IGMP */ + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; + +#if LWIP_TCP +/* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + if (optlen < sizeof(int)) { + err = EINVAL; + break; + } + + /* If this is no TCP socket, ignore any options. */ + if (sock->conn->type != NETCONN_TCP) + return 0; + + switch (optname) { + case TCP_NODELAY: + case TCP_KEEPALIVE: +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + case TCP_KEEPINTVL: + case TCP_KEEPCNT: +#endif /* LWIP_TCP_KEEPALIVE */ + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; +#endif /* LWIP_TCP */ +#if LWIP_UDP && LWIP_UDPLITE +/* Level: IPPROTO_UDPLITE */ + case IPPROTO_UDPLITE: + if (optlen < sizeof(int)) { + err = EINVAL; + break; + } + + /* If this is no UDP lite socket, ignore any options. */ + if (sock->conn->type != NETCONN_UDPLITE) + return 0; + + switch (optname) { + case UDPLITE_SEND_CSCOV: + case UDPLITE_RECV_CSCOV: + break; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_UDPLITE, UNIMPL: optname=0x%x, ..)\n", + s, optname)); + err = ENOPROTOOPT; + } /* switch (optname) */ + break; +#endif /* LWIP_UDP && LWIP_UDPLITE */ +/* UNDEFINED LEVEL */ + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, level=0x%x, UNIMPL: optname=0x%x, ..)\n", + s, level, optname)); + err = ENOPROTOOPT; + } /* switch (level) */ + + + if (err != ERR_OK) { + sock_set_errno(sock, err); + return -1; + } + + + /* Now do the actual option processing */ + data.sock = sock; + data.level = level; + data.optname = optname; + data.optval = (void*)optval; + data.optlen = &optlen; + data.err = err; + tcpip_callback(lwip_setsockopt_internal, &data); + sys_arch_sem_wait(sock->conn->op_completed, 0); + /* maybe lwip_setsockopt_internal has changed err */ + err = data.err; + + sock_set_errno(sock, err); + return err ? -1 : 0; +} + +static void +lwip_setsockopt_internal(void *arg) +{ + struct lwip_socket *sock; +#ifdef LWIP_DEBUG + int s; +#endif /* LWIP_DEBUG */ + int level, optname; + const void *optval; + struct lwip_setgetsockopt_data *data; + + LWIP_ASSERT("arg != NULL", arg != NULL); + + data = (struct lwip_setgetsockopt_data*)arg; + sock = data->sock; +#ifdef LWIP_DEBUG + s = data->s; +#endif /* LWIP_DEBUG */ + level = data->level; + optname = data->optname; + optval = data->optval; + + switch (level) { + +/* Level: SOL_SOCKET */ + case SOL_SOCKET: + switch (optname) { + + /* The option flags */ + case SO_BROADCAST: + /* UNIMPL case SO_DEBUG: */ + /* UNIMPL case SO_DONTROUTE: */ + case SO_KEEPALIVE: + /* UNIMPL case SO_OOBINCLUDE: */ +#if SO_REUSE + case SO_REUSEADDR: + case SO_REUSEPORT: +#endif /* SO_REUSE */ + /* UNIMPL case SO_USELOOPBACK: */ + if (*(int*)optval) { + sock->conn->pcb.ip->so_options |= optname; + } else { + sock->conn->pcb.ip->so_options &= ~optname; + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, SOL_SOCKET, optname=0x%x, ..) -> %s\n", + s, optname, (*(int*)optval?"on":"off"))); + break; +#if LWIP_SO_RCVTIMEO + case SO_RCVTIMEO: + sock->conn->recv_timeout = ( *(int*)optval ); + break; +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + case SO_RCVBUF: + sock->conn->recv_bufsize = ( *(int*)optval ); + break; +#endif /* LWIP_SO_RCVBUF */ +#if LWIP_UDP + case SO_NO_CHECK: + if (*(int*)optval) { + udp_setflags(sock->conn->pcb.udp, udp_flags(sock->conn->pcb.udp) | UDP_FLAGS_NOCHKSUM); + } else { + udp_setflags(sock->conn->pcb.udp, udp_flags(sock->conn->pcb.udp) & ~UDP_FLAGS_NOCHKSUM); + } + break; +#endif /* LWIP_UDP */ + } /* switch (optname) */ + break; + +/* Level: IPPROTO_IP */ + case IPPROTO_IP: + switch (optname) { + case IP_TTL: + sock->conn->pcb.ip->ttl = (u8_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, IP_TTL, ..) -> %d\n", + s, sock->conn->pcb.ip->ttl)); + break; + case IP_TOS: + sock->conn->pcb.ip->tos = (u8_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_IP, IP_TOS, ..)-> %d\n", + s, sock->conn->pcb.ip->tos)); + break; +#if LWIP_IGMP + case IP_MULTICAST_TTL: + sock->conn->pcb.udp->ttl = (u8_t)(*(u8_t*)optval); + break; + case IP_MULTICAST_IF: + sock->conn->pcb.udp->multicast_ip.addr = ((struct in_addr*) optval)->s_addr; + break; + case IP_ADD_MEMBERSHIP: + case IP_DROP_MEMBERSHIP: + { + /* If this is a TCP or a RAW socket, ignore these options. */ + struct ip_mreq *imr = (struct ip_mreq *)optval; + if(optname == IP_ADD_MEMBERSHIP){ + data->err = igmp_joingroup((struct ip_addr*)&(imr->imr_interface.s_addr), (struct ip_addr*)&(imr->imr_multiaddr.s_addr)); + } else { + data->err = igmp_leavegroup((struct ip_addr*)&(imr->imr_interface.s_addr), (struct ip_addr*)&(imr->imr_multiaddr.s_addr)); + } + if(data->err != ERR_OK) { + data->err = EADDRNOTAVAIL; + } + } + break; +#endif /* LWIP_IGMP */ + } /* switch (optname) */ + break; + +#if LWIP_TCP +/* Level: IPPROTO_TCP */ + case IPPROTO_TCP: + switch (optname) { + case TCP_NODELAY: + if (*(int*)optval) { + tcp_nagle_disable(sock->conn->pcb.tcp); + } else { + tcp_nagle_enable(sock->conn->pcb.tcp); + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_NODELAY) -> %s\n", + s, (*(int *)optval)?"on":"off") ); + break; + case TCP_KEEPALIVE: + sock->conn->pcb.tcp->keep_idle = (u32_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPALIVE) -> %"U32_F"\n", + s, sock->conn->pcb.tcp->keep_idle)); + break; + +#if LWIP_TCP_KEEPALIVE + case TCP_KEEPIDLE: + sock->conn->pcb.tcp->keep_idle = 1000*(u32_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPIDLE) -> %"U32_F"\n", + s, sock->conn->pcb.tcp->keep_idle)); + break; + case TCP_KEEPINTVL: + sock->conn->pcb.tcp->keep_intvl = 1000*(u32_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPINTVL) -> %"U32_F"\n", + s, sock->conn->pcb.tcp->keep_intvl)); + break; + case TCP_KEEPCNT: + sock->conn->pcb.tcp->keep_cnt = (u32_t)(*(int*)optval); + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_TCP, TCP_KEEPCNT) -> %"U32_F"\n", + s, sock->conn->pcb.tcp->keep_cnt)); + break; +#endif /* LWIP_TCP_KEEPALIVE */ + + } /* switch (optname) */ + break; +#endif /* LWIP_TCP*/ +#if LWIP_UDP && LWIP_UDPLITE + /* Level: IPPROTO_UDPLITE */ + case IPPROTO_UDPLITE: + switch (optname) { + case UDPLITE_SEND_CSCOV: + if ((*(int*)optval != 0) && (*(int*)optval < 8)) { + /* don't allow illegal values! */ + sock->conn->pcb.udp->chksum_len_tx = 8; + } else { + sock->conn->pcb.udp->chksum_len_tx = *(int*)optval; + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_UDPLITE, UDPLITE_SEND_CSCOV) -> %d\n", + s, (*(int*)optval)) ); + break; + case UDPLITE_RECV_CSCOV: + if ((*(int*)optval != 0) && (*(int*)optval < 8)) { + /* don't allow illegal values! */ + sock->conn->pcb.udp->chksum_len_rx = 8; + } else { + sock->conn->pcb.udp->chksum_len_rx = *(int*)optval; + } + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_setsockopt(%d, IPPROTO_UDPLITE, UDPLITE_RECV_CSCOV) -> %d\n", + s, (*(int*)optval)) ); + break; + } /* switch (optname) */ + break; +#endif /* LWIP_UDP */ + } /* switch (level) */ + sys_sem_signal(sock->conn->op_completed); +} + +int +lwip_ioctl(int s, long cmd, void *argp) +{ + struct lwip_socket *sock = get_socket(s); + u16_t buflen = 0; + s16_t recv_avail; + + if (!sock) + return -1; + + switch (cmd) { + case FIONREAD: + if (!argp) { + sock_set_errno(sock, EINVAL); + return -1; + } + + SYS_ARCH_GET(sock->conn->recv_avail, recv_avail); + if (recv_avail < 0) + recv_avail = 0; + *((u16_t*)argp) = (u16_t)recv_avail; + + /* Check if there is data left from the last recv operation. /maq 041215 */ + if (sock->lastdata) { + buflen = netbuf_len(sock->lastdata); + buflen -= sock->lastoffset; + + *((u16_t*)argp) += buflen; + } + + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONREAD, %p) = %"U16_F"\n", s, argp, *((u16_t*)argp))); + sock_set_errno(sock, 0); + return 0; + + case FIONBIO: + if (argp && *(u32_t*)argp) + sock->flags |= O_NONBLOCK; + else + sock->flags &= ~O_NONBLOCK; + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, FIONBIO, %d)\n", s, !!(sock->flags & O_NONBLOCK))); + sock_set_errno(sock, 0); + return 0; + + default: + LWIP_DEBUGF(SOCKETS_DEBUG, ("lwip_ioctl(%d, UNIMPL: 0x%lx, %p)\n", s, cmd, argp)); + sock_set_errno(sock, ENOSYS); /* not yet implemented */ + return -1; + } /* switch (cmd) */ +} + +#endif /* LWIP_SOCKET */ diff --git a/bertos/net/lwip/src/api/tcpip.c b/bertos/net/lwip/src/api/tcpip.c new file mode 100644 index 0000000..002df90 --- /dev/null +++ b/bertos/net/lwip/src/api/tcpip.c @@ -0,0 +1,596 @@ +/** + * @file + * Sequential API Main thread module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if !NO_SYS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sys.h" +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/ip_frag.h" +#include "lwip/tcp.h" +#include "lwip/autoip.h" +#include "lwip/dhcp.h" +#include "lwip/igmp.h" +#include "lwip/dns.h" +#include "lwip/tcpip.h" +#include "lwip/init.h" +#include "netif/etharp.h" +#include "netif/ppp_oe.h" + +/* global variables */ +static void (* tcpip_init_done)(void *arg); +static void *tcpip_init_done_arg; +static sys_mbox_t mbox = SYS_MBOX_NULL; + +#if LWIP_TCPIP_CORE_LOCKING +/** The global semaphore to lock the stack. */ +sys_sem_t lock_tcpip_core; +#endif /* LWIP_TCPIP_CORE_LOCKING */ + +#if LWIP_TCP +/* global variable that shows if the tcp timer is currently scheduled or not */ +static int tcpip_tcp_timer_active; + +/** + * Timer callback function that calls tcp_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +tcpip_tcp_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + + /* call TCP timer handler */ + tcp_tmr(); + /* timer still needed? */ + if (tcp_active_pcbs || tcp_tw_pcbs) { + /* restart timer */ + sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); + } else { + /* disable timer */ + tcpip_tcp_timer_active = 0; + } +} + +#if !NO_SYS +/** + * Called from TCP_REG when registering a new PCB: + * the reason is to have the TCP timer only running when + * there are active (or time-wait) PCBs. + */ +void +tcp_timer_needed(void) +{ + /* timer is off but needed again? */ + if (!tcpip_tcp_timer_active && (tcp_active_pcbs || tcp_tw_pcbs)) { + /* enable and start timer */ + tcpip_tcp_timer_active = 1; + sys_timeout(TCP_TMR_INTERVAL, tcpip_tcp_timer, NULL); + } +} +#endif /* !NO_SYS */ +#endif /* LWIP_TCP */ + +#if IP_REASSEMBLY +/** + * Timer callback function that calls ip_reass_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +ip_reass_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip: ip_reass_tmr()\n")); + ip_reass_tmr(); + sys_timeout(IP_TMR_INTERVAL, ip_reass_timer, NULL); +} +#endif /* IP_REASSEMBLY */ + +#if LWIP_ARP +/** + * Timer callback function that calls etharp_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +arp_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip: etharp_tmr()\n")); + etharp_tmr(); + sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL); +} +#endif /* LWIP_ARP */ + +#if LWIP_DHCP +/** + * Timer callback function that calls dhcp_coarse_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +dhcp_timer_coarse(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip: dhcp_coarse_tmr()\n")); + dhcp_coarse_tmr(); + sys_timeout(DHCP_COARSE_TIMER_MSECS, dhcp_timer_coarse, NULL); +} + +/** + * Timer callback function that calls dhcp_fine_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +dhcp_timer_fine(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip: dhcp_fine_tmr()\n")); + dhcp_fine_tmr(); + sys_timeout(DHCP_FINE_TIMER_MSECS, dhcp_timer_fine, NULL); +} +#endif /* LWIP_DHCP */ + +#if LWIP_AUTOIP +/** + * Timer callback function that calls autoip_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +autoip_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip: autoip_tmr()\n")); + autoip_tmr(); + sys_timeout(AUTOIP_TMR_INTERVAL, autoip_timer, NULL); +} +#endif /* LWIP_AUTOIP */ + +#if LWIP_IGMP +/** + * Timer callback function that calls igmp_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +igmp_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip: igmp_tmr()\n")); + igmp_tmr(); + sys_timeout(IGMP_TMR_INTERVAL, igmp_timer, NULL); +} +#endif /* LWIP_IGMP */ + +#if LWIP_DNS +/** + * Timer callback function that calls dns_tmr() and reschedules itself. + * + * @param arg unused argument + */ +static void +dns_timer(void *arg) +{ + LWIP_UNUSED_ARG(arg); + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip: dns_tmr()\n")); + dns_tmr(); + sys_timeout(DNS_TMR_INTERVAL, dns_timer, NULL); +} +#endif /* LWIP_DNS */ + +/** + * The main lwIP thread. This thread has exclusive access to lwIP core functions + * (unless access to them is not locked). Other threads communicate with this + * thread using message boxes. + * + * It also starts all the timers to make sure they are running in the right + * thread context. + * + * @param arg unused argument + */ +static void +tcpip_thread(void *arg) +{ + struct tcpip_msg *msg; + LWIP_UNUSED_ARG(arg); + +#if IP_REASSEMBLY + sys_timeout(IP_TMR_INTERVAL, ip_reass_timer, NULL); +#endif /* IP_REASSEMBLY */ +#if LWIP_ARP + sys_timeout(ARP_TMR_INTERVAL, arp_timer, NULL); +#endif /* LWIP_ARP */ +#if LWIP_DHCP + sys_timeout(DHCP_COARSE_TIMER_MSECS, dhcp_timer_coarse, NULL); + sys_timeout(DHCP_FINE_TIMER_MSECS, dhcp_timer_fine, NULL); +#endif /* LWIP_DHCP */ +#if LWIP_AUTOIP + sys_timeout(AUTOIP_TMR_INTERVAL, autoip_timer, NULL); +#endif /* LWIP_AUTOIP */ +#if LWIP_IGMP + sys_timeout(IGMP_TMR_INTERVAL, igmp_timer, NULL); +#endif /* LWIP_IGMP */ +#if LWIP_DNS + sys_timeout(DNS_TMR_INTERVAL, dns_timer, NULL); +#endif /* LWIP_DNS */ + + if (tcpip_init_done != NULL) { + tcpip_init_done(tcpip_init_done_arg); + } + + LOCK_TCPIP_CORE(); + while (1) { /* MAIN Loop */ + sys_mbox_fetch(mbox, (void *)&msg); + switch (msg->type) { +#if LWIP_NETCONN + case TCPIP_MSG_API: + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: API message %p\n", (void *)msg)); + msg->msg.apimsg->function(&(msg->msg.apimsg->msg)); + break; +#endif /* LWIP_NETCONN */ + + case TCPIP_MSG_INPKT: + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: PACKET %p\n", (void *)msg)); +#if LWIP_ARP + if (msg->msg.inp.netif->flags & NETIF_FLAG_ETHARP) { + ethernet_input(msg->msg.inp.p, msg->msg.inp.netif); + } else +#endif /* LWIP_ARP */ + { ip_input(msg->msg.inp.p, msg->msg.inp.netif); + } + memp_free(MEMP_TCPIP_MSG_INPKT, msg); + break; + +#if LWIP_NETIF_API + case TCPIP_MSG_NETIFAPI: + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: Netif API message %p\n", (void *)msg)); + msg->msg.netifapimsg->function(&(msg->msg.netifapimsg->msg)); + break; +#endif /* LWIP_NETIF_API */ + + case TCPIP_MSG_CALLBACK: + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: CALLBACK %p\n", (void *)msg)); + msg->msg.cb.f(msg->msg.cb.ctx); + memp_free(MEMP_TCPIP_MSG_API, msg); + break; + + case TCPIP_MSG_TIMEOUT: + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: TIMEOUT %p\n", (void *)msg)); + sys_timeout(msg->msg.tmo.msecs, msg->msg.tmo.h, msg->msg.tmo.arg); + memp_free(MEMP_TCPIP_MSG_API, msg); + break; + case TCPIP_MSG_UNTIMEOUT: + LWIP_DEBUGF(TCPIP_DEBUG, ("tcpip_thread: UNTIMEOUT %p\n", (void *)msg)); + sys_untimeout(msg->msg.tmo.h, msg->msg.tmo.arg); + memp_free(MEMP_TCPIP_MSG_API, msg); + break; + + default: + break; + } + } +} + +/** + * Pass a received packet to tcpip_thread for input processing + * + * @param p the received packet, p->payload pointing to the Ethernet header or + * to an IP header (if netif doesn't got NETIF_FLAG_ETHARP flag) + * @param inp the network interface on which the packet was received + */ +err_t +tcpip_input(struct pbuf *p, struct netif *inp) +{ + struct tcpip_msg *msg; + + if (mbox != SYS_MBOX_NULL) { + msg = memp_malloc(MEMP_TCPIP_MSG_INPKT); + if (msg == NULL) { + return ERR_MEM; + } + + msg->type = TCPIP_MSG_INPKT; + msg->msg.inp.p = p; + msg->msg.inp.netif = inp; + if (sys_mbox_trypost(mbox, msg) != ERR_OK) { + memp_free(MEMP_TCPIP_MSG_INPKT, msg); + return ERR_MEM; + } + return ERR_OK; + } + return ERR_VAL; +} + +/** + * Call a specific function in the thread context of + * tcpip_thread for easy access synchronization. + * A function called in that way may access lwIP core code + * without fearing concurrent access. + * + * @param f the function to call + * @param ctx parameter passed to f + * @param block 1 to block until the request is posted, 0 to non-blocking mode + * @return ERR_OK if the function was called, another err_t if not + */ +err_t +tcpip_callback_with_block(void (*f)(void *ctx), void *ctx, u8_t block) +{ + struct tcpip_msg *msg; + + if (mbox != SYS_MBOX_NULL) { + msg = memp_malloc(MEMP_TCPIP_MSG_API); + if (msg == NULL) { + return ERR_MEM; + } + + msg->type = TCPIP_MSG_CALLBACK; + msg->msg.cb.f = f; + msg->msg.cb.ctx = ctx; + if (block) { + sys_mbox_post(mbox, msg); + } else { + if (sys_mbox_trypost(mbox, msg) != ERR_OK) { + memp_free(MEMP_TCPIP_MSG_API, msg); + return ERR_MEM; + } + } + return ERR_OK; + } + return ERR_VAL; +} + +/** + * call sys_timeout in tcpip_thread + * + * @param msec time in miliseconds for timeout + * @param h function to be called on timeout + * @param arg argument to pass to timeout function h + * @return ERR_MEM on memory error, ERR_OK otherwise + */ +err_t +tcpip_timeout(u32_t msecs, sys_timeout_handler h, void *arg) +{ + struct tcpip_msg *msg; + + if (mbox != SYS_MBOX_NULL) { + msg = memp_malloc(MEMP_TCPIP_MSG_API); + if (msg == NULL) { + return ERR_MEM; + } + + msg->type = TCPIP_MSG_TIMEOUT; + msg->msg.tmo.msecs = msecs; + msg->msg.tmo.h = h; + msg->msg.tmo.arg = arg; + sys_mbox_post(mbox, msg); + return ERR_OK; + } + return ERR_VAL; +} + +/** + * call sys_untimeout in tcpip_thread + * + * @param msec time in miliseconds for timeout + * @param h function to be called on timeout + * @param arg argument to pass to timeout function h + * @return ERR_MEM on memory error, ERR_OK otherwise + */ +err_t +tcpip_untimeout(sys_timeout_handler h, void *arg) +{ + struct tcpip_msg *msg; + + if (mbox != SYS_MBOX_NULL) { + msg = memp_malloc(MEMP_TCPIP_MSG_API); + if (msg == NULL) { + return ERR_MEM; + } + + msg->type = TCPIP_MSG_UNTIMEOUT; + msg->msg.tmo.h = h; + msg->msg.tmo.arg = arg; + sys_mbox_post(mbox, msg); + return ERR_OK; + } + return ERR_VAL; +} + +#if LWIP_NETCONN +/** + * Call the lower part of a netconn_* function + * This function is then running in the thread context + * of tcpip_thread and has exclusive access to lwIP core code. + * + * @param apimsg a struct containing the function to call and its parameters + * @return ERR_OK if the function was called, another err_t if not + */ +err_t +tcpip_apimsg(struct api_msg *apimsg) +{ + struct tcpip_msg msg; + + if (mbox != SYS_MBOX_NULL) { + msg.type = TCPIP_MSG_API; + msg.msg.apimsg = apimsg; + sys_mbox_post(mbox, &msg); + sys_arch_sem_wait(apimsg->msg.conn->op_completed, 0); + return ERR_OK; + } + return ERR_VAL; +} + +#if LWIP_TCPIP_CORE_LOCKING +/** + * Call the lower part of a netconn_* function + * This function has exclusive access to lwIP core code by locking it + * before the function is called. + * + * @param apimsg a struct containing the function to call and its parameters + * @return ERR_OK (only for compatibility fo tcpip_apimsg()) + */ +err_t +tcpip_apimsg_lock(struct api_msg *apimsg) +{ + LOCK_TCPIP_CORE(); + apimsg->function(&(apimsg->msg)); + UNLOCK_TCPIP_CORE(); + return ERR_OK; + +} +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETCONN */ + +#if LWIP_NETIF_API +#if !LWIP_TCPIP_CORE_LOCKING +/** + * Much like tcpip_apimsg, but calls the lower part of a netifapi_* + * function. + * + * @param netifapimsg a struct containing the function to call and its parameters + * @return error code given back by the function that was called + */ +err_t +tcpip_netifapi(struct netifapi_msg* netifapimsg) +{ + struct tcpip_msg msg; + + if (mbox != SYS_MBOX_NULL) { + netifapimsg->msg.sem = sys_sem_new(0); + if (netifapimsg->msg.sem == SYS_SEM_NULL) { + netifapimsg->msg.err = ERR_MEM; + return netifapimsg->msg.err; + } + + msg.type = TCPIP_MSG_NETIFAPI; + msg.msg.netifapimsg = netifapimsg; + sys_mbox_post(mbox, &msg); + sys_sem_wait(netifapimsg->msg.sem); + sys_sem_free(netifapimsg->msg.sem); + return netifapimsg->msg.err; + } + return ERR_VAL; +} +#else /* !LWIP_TCPIP_CORE_LOCKING */ +/** + * Call the lower part of a netifapi_* function + * This function has exclusive access to lwIP core code by locking it + * before the function is called. + * + * @param netifapimsg a struct containing the function to call and its parameters + * @return ERR_OK (only for compatibility fo tcpip_netifapi()) + */ +err_t +tcpip_netifapi_lock(struct netifapi_msg* netifapimsg) +{ + LOCK_TCPIP_CORE(); + netifapimsg->function(&(netifapimsg->msg)); + UNLOCK_TCPIP_CORE(); + return netifapimsg->msg.err; +} +#endif /* !LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETIF_API */ + +/** + * Initialize this module: + * - initialize all sub modules + * - start the tcpip_thread + * + * @param initfunc a function to call when tcpip_thread is running and finished initializing + * @param arg argument to pass to initfunc + */ +void +tcpip_init(void (* initfunc)(void *), void *arg) +{ + lwip_init(); + + tcpip_init_done = initfunc; + tcpip_init_done_arg = arg; + mbox = sys_mbox_new(TCPIP_MBOX_SIZE); +#if LWIP_TCPIP_CORE_LOCKING + lock_tcpip_core = sys_sem_new(1); +#endif /* LWIP_TCPIP_CORE_LOCKING */ + + sys_thread_new(TCPIP_THREAD_NAME, tcpip_thread, NULL, TCPIP_THREAD_STACKSIZE, TCPIP_THREAD_PRIO); +} + +/** + * Simple callback function used with tcpip_callback to free a pbuf + * (pbuf_free has a wrong signature for tcpip_callback) + * + * @param p The pbuf (chain) to be dereferenced. + */ +static void +pbuf_free_int(void *p) +{ + struct pbuf *q = p; + pbuf_free(q); +} + +/** + * A simple wrapper function that allows you to free a pbuf from interrupt context. + * + * @param p The pbuf (chain) to be dereferenced. + * @return ERR_OK if callback could be enqueued, an err_t if not + */ +err_t +pbuf_free_callback(struct pbuf *p) +{ + return tcpip_callback_with_block(pbuf_free_int, p, 0); +} + +/** + * A simple wrapper function that allows you to free heap memory from + * interrupt context. + * + * @param m the heap memory to free + * @return ERR_OK if callback could be enqueued, an err_t if not + */ +err_t +mem_free_callback(void *m) +{ + return tcpip_callback_with_block(mem_free, m, 0); +} + +#endif /* !NO_SYS */ diff --git a/bertos/net/lwip/src/arch/sys_arch.c b/bertos/net/lwip/src/arch/sys_arch.c new file mode 100644 index 0000000..b883529 --- /dev/null +++ b/bertos/net/lwip/src/arch/sys_arch.c @@ -0,0 +1,430 @@ +#include "cfg/cfg_lwip.h" + +#define LOG_LEVEL 3 //INFO +#define LOG_FORMAT 0 //TERSE +#include + +#include + +#include +#include + +#include +#include + +#include +#include +#include +#include + +#include + +#include + +/****************************************************************************/ + +/* + * Generic mutex (binary semaphore) implementation + * + * TODO: move this to a different place (i.e., bertos/kern/sem.c). + */ +INLINE void mutex_verify(struct Mutex *s) +{ + (void)s; + ASSERT(s); + LIST_ASSERT_VALID(&s->wait_queue); + ASSERT((s->count == MUTEX_LOCKED) || (s->count == MUTEX_UNLOCKED)); +} + +bool mutex_attempt(struct Mutex *s) +{ + return cpu_atomic_xchg(&s->count, MUTEX_LOCKED) == MUTEX_UNLOCKED; +} + +static NOINLINE void mutex_slowpath_obtain(struct Mutex *s) +{ + PROC_ATOMIC( + mutex_verify(s); + ADDTAIL(&s->wait_queue, (Node *)current_process) + ); + proc_switch(); +} + +void mutex_obtain(struct Mutex *s) +{ + if (UNLIKELY(cpu_atomic_xchg(&s->count, MUTEX_LOCKED)) != + MUTEX_UNLOCKED) + mutex_slowpath_obtain(s); +} + +void mutex_release(struct Mutex *s) +{ + Process *proc = NULL; + + PROC_ATOMIC( + mutex_verify(s); + proc = (Process *)list_remHead(&s->wait_queue); + if (!proc) + s->count = 1; + ); + if (proc) + ATOMIC(proc_wakeup(proc)); +} + +void mutex_init(struct Mutex *s) +{ + LIST_INIT(&s->wait_queue); + s->count = 1; +} + +/****************************************************************************/ + +typedef struct SemNode +{ + Node node; + Mutex sem; +} SemNode; + +#define MAX_SEM_CNT 16 + +static struct SemNode sem_pool[MAX_SEM_CNT]; +static List free_sem; + +/** + * Creates and returns a new semaphore. + * + * \param count Specifies the initial state of the semaphore. + * \return The semaphore or SYS_SEM_NULL on error. + */ +sys_sem_t sys_sem_new(u8_t count) +{ + SemNode *sem; + + PROC_ATOMIC(sem = (SemNode *)list_remHead(&free_sem)); + if (UNLIKELY(!sem)) + { + LOG_ERR("Out of semaphores!\n"); + return SYS_SEM_NULL; + } + + mutex_init(&sem->sem); + // must obtain semaphore depending on the parameter + // NOTE: count == 1 means that the semaphore is unlocked + if (count <= 0) + mutex_obtain(&sem->sem); + return (sys_sem_t)&sem->sem; +} + +/** + * Frees a semaphore created by sys_sem_new. + * + * \param semaphore Mutex to be freed + */ +void sys_sem_free(sys_sem_t semaphore) +{ + SemNode *sem = containerof(semaphore, SemNode, sem); + PROC_ATOMIC(ADDHEAD(&free_sem, &sem->node)); +} + +/** + * Signals (or releases) a semaphore. + */ +void sys_sem_signal(sys_sem_t sem) +{ + mutex_release(sem); +} + +/** + * Blocks the thread while waiting for the semaphore to be signaled. + * + * The timeout parameter specifies how many milliseconds the function should block + * before returning; if the function times out, it should return SYS_ARCH_TIMEOUT. + * If timeout=0, then the function should block indefinitely. + * If the function acquires the semaphore, it should return how many milliseconds + * expired while waiting for the semaphore. + * The function may return 0 if the semaphore was immediately available. + */ +u32_t sys_arch_sem_wait(sys_sem_t sem, u32_t timeout) +{ + ticks_t end, start = timer_clock(); + + if (timeout == 0) + { + mutex_obtain(sem); + return ticks_to_ms(timer_clock() - start); + } + + do + { + cpu_relax(); + end = timer_clock(); + } while ((end - start < ms_to_ticks(timeout) && !mutex_attempt(sem))); + + return (end - start > ms_to_ticks(timeout)) ? + SYS_ARCH_TIMEOUT : (u32_t)ticks_to_ms(end - start); +} + +/* Mbox functions */ + +typedef struct IpPort +{ + Node node; + MsgPort port; +} IpPort; + +#define MAX_PORT_CNT 16 +static struct IpPort port_pool[MAX_PORT_CNT]; +static List free_port; + +typedef struct IpMsg +{ + Msg msg; + void *data; +} IpMsg; + +#define MAX_MSG_CNT 32 +static struct IpMsg msg_pool[MAX_MSG_CNT]; +static List free_msg; + +// TODO: allocate memory for 'size' messages +sys_mbox_t sys_mbox_new(UNUSED_ARG(int, size)) +{ + IpPort *port; + + PROC_ATOMIC(port = (IpPort *)list_remHead(&free_port)); + if (UNLIKELY(!port)) + { + LOG_ERR("Out of message ports!\n"); + return SYS_MBOX_NULL; + } + msg_initPort(&port->port, event_createGeneric()); + port->port.event.Ev.Sig.sig_proc = NULL; + + return (sys_mbox_t)(&port->port); +} + +void sys_mbox_free(sys_mbox_t mbox) +{ + IpPort *port = containerof(mbox, IpPort, port); + PROC_ATOMIC(ADDHEAD(&free_port, &port->node)); +} + +void sys_mbox_post(sys_mbox_t mbox, void *data) +{ + sys_mbox_trypost(mbox, data); +} + +/* + * Try to post the "msg" to the mailbox. Returns ERR_MEM if this one + * is full, else, ERR_OK if the "msg" is posted. + */ +err_t sys_mbox_trypost(sys_mbox_t mbox, void *data) +{ + IpMsg *msg; + + PROC_ATOMIC(msg = (IpMsg *)list_remHead(&free_msg)); + if (UNLIKELY(!msg)) + { + LOG_ERR("out of messages!\n"); + return ERR_MEM; + } + msg->data = data; + + msg_lockPort(mbox); + ADDTAIL(&mbox->queue, &msg->msg.link); + msg_unlockPort(mbox); + + if (mbox->event.Ev.Sig.sig_proc) + event_do(&mbox->event); + + return ERR_OK; +} + +u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **data, u32_t timeout) +{ + /* Blocks the thread until a message arrives in the mailbox, but does + not block the thread longer than "timeout" milliseconds (similar to + the sys_arch_sem_wait() function). If "timeout" is 0, the thread should + be blocked until a message arrives. The "msg" argument is a result + parameter that is set by the function (i.e., by doing "*msg = + ptr"). The "msg" parameter maybe NULL to indicate that the message + should be dropped. + + The return values are the same as for the sys_arch_sem_wait() function: + Number of milliseconds spent waiting or SYS_ARCH_TIMEOUT if there was a + timeout. + + Note that a function with a similar name, sys_mbox_fetch(), is + implemented by lwIP. + */ + + Msg *msg; + ticks_t start = timer_clock(); + + while (1) + { + /* Fast path */ + msg = msg_get(mbox); + if (LIKELY(msg)) + break; + + mbox->event.Ev.Sig.sig_proc = proc_current(); + /* Slow path */ + if (!timeout) + event_wait(&mbox->event); + else + { + if (!event_waitTimeout(&mbox->event, + ms_to_ticks(timeout))) + { + mbox->event.Ev.Sig.sig_proc = NULL; + return SYS_ARCH_TIMEOUT; + } + } + } + mbox->event.Ev.Sig.sig_proc = NULL; + if (data) + *data = containerof(msg, IpMsg, msg)->data; + + PROC_ATOMIC(ADDHEAD(&free_msg, &msg->link)); + + return ticks_to_ms(timer_clock() - start); +} + +u32_t sys_arch_mbox_tryfetch(sys_mbox_t mbox, void **data) +{ + /* This is similar to sys_arch_mbox_fetch, however if a message is not + present in the mailbox, it immediately returns with the code + SYS_MBOX_EMPTY. On success 0 is returned. + + To allow for efficient implementations, this can be defined as a + function-like macro in sys_arch.h instead of a normal function. For + example, a naive implementation could be: + #define sys_arch_mbox_tryfetch(mbox,msg) \ + sys_arch_mbox_fetch(mbox,msg,1) + although this would introduce unnecessary delays. + */ + + Msg *msg; + + msg = msg_get(mbox); + if (UNLIKELY(!msg)) + return SYS_MBOX_EMPTY; + if (data) + *data = containerof(msg, IpMsg, msg)->data; + PROC_ATOMIC(ADDHEAD(&free_msg, &msg->link)); + + return 0; +} + +typedef struct ThreadNode +{ + Node node; + struct Process *pid; + void (*entry)(void *); + void *arg; + struct sys_timeouts timeout; +} ThreadNode; + +#define MAX_THREAD_CNT 8 + +static ThreadNode thread_pool[MAX_THREAD_CNT]; +static List free_thread; +static List used_thread; + +static struct sys_timeouts lwip_system_timeouts; // Default timeouts list for lwIP + +struct sys_timeouts *sys_arch_timeouts(void) +{ + ThreadNode *thread_node; + struct Process *curr_pid = proc_current(); + + FOREACH_NODE(thread_node, &used_thread) + { + if (thread_node->pid == curr_pid) + return &(thread_node->timeout); + } + + return &lwip_system_timeouts; +} + +static void thread_trampoline(void) +{ + ThreadNode *thread_node = (ThreadNode *)proc_currentUserData(); + + thread_node->entry(thread_node->arg); +} + +#if !CONFIG_KERN_HEAP +/* + * NOTE: threads are never destroyed, consequently these stacks are never + * deallocated. So, the stack allocator can be implemented as a simple index + * that is atomically incremented at each allocation. + */ +static cpu_stack_t thread_stack[MAX_THREAD_CNT] + [DEFAULT_THREAD_STACKSIZE / sizeof(cpu_stack_t)] + ALIGNED(sizeof(cpu_stack_t)); +static int last_stack; +#endif + +sys_thread_t sys_thread_new(const char *name, void (* thread)(void *arg), + void *arg, int stacksize, int prio) +{ + ThreadNode *thread_node; + cpu_stack_t *stackbase; + + proc_forbid(); + thread_node = (ThreadNode *)list_remHead(&free_thread); + if (UNLIKELY(!thread_node)) + { + proc_permit(); + LOG_ERR("Out of threads!\n"); + return NULL; + } + ADDHEAD(&used_thread, &thread_node->node); + proc_permit(); + + thread_node->entry = thread; + thread_node->arg = arg; + + #if !CONFIG_KERN_HEAP + ASSERT(stacksize <= DEFAULT_THREAD_STACKSIZE); + PROC_ATOMIC(stackbase = thread_stack[last_stack++]); + #else + stackbase = NULL; + #endif + thread_node->pid = proc_new_with_name(name, thread_trampoline, + (void *)thread_node, stacksize, stackbase); + if (thread_node->pid == NULL) + return NULL; + + #if CONFIG_KERN_PRI + proc_setPri(thread_node->pid, prio); + #else + /* Avoid warnings when priorities are disabled */ + (void) prio; + #endif + + return thread_node->pid; +} + +void sys_init(void) +{ + LIST_INIT(&free_sem); + LIST_INIT(&free_port); + LIST_INIT(&free_msg); + LIST_INIT(&free_thread); + LIST_INIT(&used_thread); + + for (int i = 0; i < MAX_SEM_CNT; ++i) + ADDHEAD(&free_sem, &sem_pool[i].node); + + for (int i = 0; i < MAX_PORT_CNT; ++i) + ADDHEAD(&free_port, &port_pool[i].node); + + for (int i = 0; i < MAX_MSG_CNT; ++i) + ADDHEAD(&free_msg, &msg_pool[i].msg.link); + + for (int i = 0; i < MAX_THREAD_CNT; ++i) + ADDHEAD(&free_thread, &thread_pool[i].node); +} diff --git a/bertos/net/lwip/src/core/dhcp.c b/bertos/net/lwip/src/core/dhcp.c new file mode 100644 index 0000000..82068bf --- /dev/null +++ b/bertos/net/lwip/src/core/dhcp.c @@ -0,0 +1,1722 @@ +/** + * @file + * Dynamic Host Configuration Protocol client + * + */ + +/* + * + * Copyright (c) 2001-2004 Leon Woestenberg + * Copyright (c) 2001-2004 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is a contribution to the lwIP TCP/IP stack. + * The Swedish Institute of Computer Science and Adam Dunkels + * are specifically granted permission to redistribute this + * source code. + * + * Author: Leon Woestenberg + * + * This is a DHCP client for the lwIP TCP/IP stack. It aims to conform + * with RFC 2131 and RFC 2132. + * + * TODO: + * - Proper parsing of DHCP messages exploiting file/sname field overloading. + * - Add JavaDoc style documentation (API, internals). + * - Support for interfaces other than Ethernet (SLIP, PPP, ...) + * + * Please coordinate changes and requests with Leon Woestenberg + * + * + * Integration with your code: + * + * In lwip/dhcp.h + * #define DHCP_COARSE_TIMER_SECS (recommended 60 which is a minute) + * #define DHCP_FINE_TIMER_MSECS (recommended 500 which equals TCP coarse timer) + * + * Then have your application call dhcp_coarse_tmr() and + * dhcp_fine_tmr() on the defined intervals. + * + * dhcp_start(struct netif *netif); + * starts a DHCP client instance which configures the interface by + * obtaining an IP address lease and maintaining it. + * + * Use dhcp_release(netif) to end the lease and use dhcp_stop(netif) + * to remove the DHCP client. + * + */ + +#include "lwip/opt.h" + +#if LWIP_DHCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/stats.h" +#include "lwip/mem.h" +#include "lwip/udp.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/inet.h" +#include "lwip/sys.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" +#include "lwip/dns.h" +#include "netif/etharp.h" + +#include + +/** Default for DHCP_GLOBAL_XID is 0xABCD0000 + * This can be changed by defining DHCP_GLOBAL_XID and DHCP_GLOBAL_XID_HEADER, e.g. + * #define DHCP_GLOBAL_XID_HEADER "stdlib.h" + * #define DHCP_GLOBAL_XID rand() + */ +#ifdef DHCP_GLOBAL_XID_HEADER +#include DHCP_GLOBAL_XID_HEADER /* include optional starting XID generation prototypes */ +#endif + +/** DHCP_OPTION_MAX_MSG_SIZE is set to the MTU + * MTU is checked to be big enough in dhcp_start */ +#define DHCP_MAX_MSG_LEN(netif) (netif->mtu) +#define DHCP_MAX_MSG_LEN_MIN_REQUIRED 576 +/** Minimum length for reply before packet is parsed */ +#define DHCP_MIN_REPLY_LEN 44 + +#define REBOOT_TRIES 2 + +/* DHCP client state machine functions */ +static void dhcp_handle_ack(struct netif *netif); +static void dhcp_handle_nak(struct netif *netif); +static void dhcp_handle_offer(struct netif *netif); + +static err_t dhcp_discover(struct netif *netif); +static err_t dhcp_select(struct netif *netif); +static void dhcp_bind(struct netif *netif); +#if DHCP_DOES_ARP_CHECK +static void dhcp_check(struct netif *netif); +static err_t dhcp_decline(struct netif *netif); +#endif /* DHCP_DOES_ARP_CHECK */ +static err_t dhcp_rebind(struct netif *netif); +static err_t dhcp_reboot(struct netif *netif); +static void dhcp_set_state(struct dhcp *dhcp, u8_t new_state); + +/* receive, unfold, parse and free incoming messages */ +static void dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port); +static err_t dhcp_unfold_reply(struct dhcp *dhcp, struct pbuf *p); +static u8_t *dhcp_get_option_ptr(struct dhcp *dhcp, u8_t option_type); +static u8_t dhcp_get_option_byte(u8_t *ptr); +#if 0 +static u16_t dhcp_get_option_short(u8_t *ptr); +#endif +static u32_t dhcp_get_option_long(u8_t *ptr); +static void dhcp_free_reply(struct dhcp *dhcp); + +/* set the DHCP timers */ +static void dhcp_timeout(struct netif *netif); +static void dhcp_t1_timeout(struct netif *netif); +static void dhcp_t2_timeout(struct netif *netif); + +/* build outgoing messages */ +/* create a DHCP request, fill in common headers */ +static err_t dhcp_create_request(struct netif *netif); +/* free a DHCP request */ +static void dhcp_delete_request(struct netif *netif); +/* add a DHCP option (type, then length in bytes) */ +static void dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len); +/* add option values */ +static void dhcp_option_byte(struct dhcp *dhcp, u8_t value); +static void dhcp_option_short(struct dhcp *dhcp, u16_t value); +static void dhcp_option_long(struct dhcp *dhcp, u32_t value); +/* always add the DHCP options trailer to end and pad */ +static void dhcp_option_trailer(struct dhcp *dhcp); + +/** + * Back-off the DHCP client (because of a received NAK response). + * + * Back-off the DHCP client because of a received NAK. Receiving a + * NAK means the client asked for something non-sensible, for + * example when it tries to renew a lease obtained on another network. + * + * We clear any existing set IP address and restart DHCP negotiation + * afresh (as per RFC2131 3.2.3). + * + * @param netif the netif under DHCP control + */ +static void +dhcp_handle_nak(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_nak(netif=%p) %c%c%"U16_F"\n", + (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + /* Set the interface down since the address must no longer be used, as per RFC2131 */ + netif_set_down(netif); + /* remove IP address from interface */ + netif_set_ipaddr(netif, IP_ADDR_ANY); + netif_set_gw(netif, IP_ADDR_ANY); + netif_set_netmask(netif, IP_ADDR_ANY); + /* Change to a defined state */ + dhcp_set_state(dhcp, DHCP_BACKING_OFF); + /* We can immediately restart discovery */ + dhcp_discover(netif); +} + +#if DHCP_DOES_ARP_CHECK +/** + * Checks if the offered IP address is already in use. + * + * It does so by sending an ARP request for the offered address and + * entering CHECKING state. If no ARP reply is received within a small + * interval, the address is assumed to be free for use by us. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_check(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_check(netif=%p) %c%c\n", (void *)netif, (s16_t)netif->name[0], + (s16_t)netif->name[1])); + dhcp_set_state(dhcp, DHCP_CHECKING); + /* create an ARP query for the offered IP address, expecting that no host + responds, as the IP address should not be in use. */ + result = etharp_query(netif, &dhcp->offered_ip_addr, NULL); + if (result != ERR_OK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_check: could not perform ARP query\n")); + } + dhcp->tries++; + msecs = 500; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_check(): set request timeout %"U16_F" msecs\n", msecs)); +} +#endif /* DHCP_DOES_ARP_CHECK */ + +/** + * Remember the configuration offered by a DHCP server. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_handle_offer(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + /* obtain the server address */ + u8_t *option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_SERVER_ID); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_handle_offer(netif=%p) %c%c%"U16_F"\n", + (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + if (option_ptr != NULL) { + dhcp->server_ip_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): server 0x%08"X32_F"\n", dhcp->server_ip_addr.addr)); + /* remember offered address */ + ip_addr_set(&dhcp->offered_ip_addr, (struct ip_addr *)&dhcp->msg_in->yiaddr); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_handle_offer(): offer for 0x%08"X32_F"\n", dhcp->offered_ip_addr.addr)); + + dhcp_select(netif); + } +} + +/** + * Select a DHCP server offer out of all offers. + * + * Simply select the first offer received. + * + * @param netif the netif under DHCP control + * @return lwIP specific error (see error.h) + */ +static err_t +dhcp_select(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; +#if LWIP_NETIF_HOSTNAME + const char *p; +#endif /* LWIP_NETIF_HOSTNAME */ + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_select(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + dhcp_set_state(dhcp, DHCP_REQUESTING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_REQUEST); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + + /* MUST request the offered IP address */ + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); + + dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); + dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); + + dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 4/*num options*/); + dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); + dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); + dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); + +#if LWIP_NETIF_HOSTNAME + p = (const char*)netif->hostname; + if (p != NULL) { + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, strlen(p)); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + + dhcp_option_trailer(dhcp); + /* shrink the pbuf to the actual content length */ + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* send broadcast to any DHCP server */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_select: REQUESTING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("dhcp_select: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = (dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_select(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +/** + * The DHCP timer that checks for lease renewal/rebind timeouts. + * + */ +void +dhcp_coarse_tmr() +{ + struct netif *netif = netif_list; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_coarse_tmr()\n")); + /* iterate through all network interfaces */ + while (netif != NULL) { + /* only act on DHCP configured interfaces */ + if (netif->dhcp != NULL) { + /* timer is active (non zero), and triggers (zeroes) now? */ + if (netif->dhcp->t2_timeout-- == 1) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t2 timeout\n")); + /* this clients' rebind timeout triggered */ + dhcp_t2_timeout(netif); + /* timer is active (non zero), and triggers (zeroes) now */ + } else if (netif->dhcp->t1_timeout-- == 1) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_coarse_tmr(): t1 timeout\n")); + /* this clients' renewal timeout triggered */ + dhcp_t1_timeout(netif); + } + } + /* proceed to next netif */ + netif = netif->next; + } +} + +/** + * DHCP transaction timeout handling + * + * A DHCP server is expected to respond within a short period of time. + * This timer checks whether an outstanding DHCP request is timed out. + * + */ +void +dhcp_fine_tmr() +{ + struct netif *netif = netif_list; + /* loop through netif's */ + while (netif != NULL) { + /* only act on DHCP configured interfaces */ + if (netif->dhcp != NULL) { + /* timer is active (non zero), and is about to trigger now */ + if (netif->dhcp->request_timeout > 1) { + netif->dhcp->request_timeout--; + } + else if (netif->dhcp->request_timeout == 1) { + netif->dhcp->request_timeout--; + /* { netif->dhcp->request_timeout == 0 } */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_fine_tmr(): request timeout\n")); + /* this clients' request timeout triggered */ + dhcp_timeout(netif); + } + } + /* proceed to next network interface */ + netif = netif->next; + } +} + +/** + * A DHCP negotiation transaction, or ARP request, has timed out. + * + * The timer that was started with the DHCP or ARP request has + * timed out, indicating no response was received in time. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_timeout(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout()\n")); + /* back-off period has passed, or server selection timed out */ + if ((dhcp->state == DHCP_BACKING_OFF) || (dhcp->state == DHCP_SELECTING)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_timeout(): restarting discovery\n")); + dhcp_discover(netif); + /* receiving the requested lease timed out */ + } else if (dhcp->state == DHCP_REQUESTING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): REQUESTING, DHCP request timed out\n")); + if (dhcp->tries <= 5) { + dhcp_select(netif); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): REQUESTING, releasing, restarting\n")); + dhcp_release(netif); + dhcp_discover(netif); + } +#if DHCP_DOES_ARP_CHECK + /* received no ARP reply for the offered address (which is good) */ + } else if (dhcp->state == DHCP_CHECKING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): CHECKING, ARP request timed out\n")); + if (dhcp->tries <= 1) { + dhcp_check(netif); + /* no ARP replies on the offered address, + looks like the IP address is indeed free */ + } else { + /* bind the interface to the offered address */ + dhcp_bind(netif); + } +#endif /* DHCP_DOES_ARP_CHECK */ + } + /* did not get response to renew request? */ + else if (dhcp->state == DHCP_RENEWING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): RENEWING, DHCP request timed out\n")); + /* just retry renewal */ + /* note that the rebind timer will eventually time-out if renew does not work */ + dhcp_renew(netif); + /* did not get response to rebind request? */ + } else if (dhcp->state == DHCP_REBINDING) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): REBINDING, DHCP request timed out\n")); + if (dhcp->tries <= 8) { + dhcp_rebind(netif); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_timeout(): RELEASING, DISCOVERING\n")); + dhcp_release(netif); + dhcp_discover(netif); + } + } else if (dhcp->state == DHCP_REBOOTING) { + if (dhcp->tries < REBOOT_TRIES) { + dhcp_reboot(netif); + } else { + dhcp_discover(netif); + } + } +} + +/** + * The renewal period has timed out. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_t1_timeout(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_t1_timeout()\n")); + if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || (dhcp->state == DHCP_RENEWING)) { + /* just retry to renew - note that the rebind timer (t2) will + * eventually time-out if renew tries fail. */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t1_timeout(): must renew\n")); + dhcp_renew(netif); + } +} + +/** + * The rebind period has timed out. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_t2_timeout(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout()\n")); + if ((dhcp->state == DHCP_REQUESTING) || (dhcp->state == DHCP_BOUND) || (dhcp->state == DHCP_RENEWING)) { + /* just retry to rebind */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_t2_timeout(): must rebind\n")); + dhcp_rebind(netif); + } +} + +/** + * Handle a DHCP ACK packet + * + * @param netif the netif under DHCP control + */ +static void +dhcp_handle_ack(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + u8_t *option_ptr; + /* clear options we might not get from the ACK */ + dhcp->offered_sn_mask.addr = 0; + dhcp->offered_gw_addr.addr = 0; + dhcp->offered_bc_addr.addr = 0; + + /* lease time given? */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_LEASE_TIME); + if (option_ptr != NULL) { + /* remember offered lease time */ + dhcp->offered_t0_lease = dhcp_get_option_long(option_ptr + 2); + } + /* renewal period given? */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_T1); + if (option_ptr != NULL) { + /* remember given renewal period */ + dhcp->offered_t1_renew = dhcp_get_option_long(option_ptr + 2); + } else { + /* calculate safe periods for renewal */ + dhcp->offered_t1_renew = dhcp->offered_t0_lease / 2; + } + + /* renewal period given? */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_T2); + if (option_ptr != NULL) { + /* remember given rebind period */ + dhcp->offered_t2_rebind = dhcp_get_option_long(option_ptr + 2); + } else { + /* calculate safe periods for rebinding */ + dhcp->offered_t2_rebind = dhcp->offered_t0_lease; + } + + /* (y)our internet address */ + ip_addr_set(&dhcp->offered_ip_addr, &dhcp->msg_in->yiaddr); + +/** + * Patch #1308 + * TODO: we must check if the file field is not overloaded by DHCP options! + */ +#if 0 + /* boot server address */ + ip_addr_set(&dhcp->offered_si_addr, &dhcp->msg_in->siaddr); + /* boot file name */ + if (dhcp->msg_in->file[0]) { + dhcp->boot_file_name = mem_malloc(strlen(dhcp->msg_in->file) + 1); + strcpy(dhcp->boot_file_name, dhcp->msg_in->file); + } +#endif + + /* subnet mask */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_SUBNET_MASK); + /* subnet mask given? */ + if (option_ptr != NULL) { + dhcp->offered_sn_mask.addr = htonl(dhcp_get_option_long(&option_ptr[2])); + } + + /* gateway router */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_ROUTER); + if (option_ptr != NULL) { + dhcp->offered_gw_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); + } + + /* broadcast address */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_BROADCAST); + if (option_ptr != NULL) { + dhcp->offered_bc_addr.addr = htonl(dhcp_get_option_long(&option_ptr[2])); + } + + /* DNS servers */ + option_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_DNS_SERVER); + if (option_ptr != NULL) { + u8_t n; + dhcp->dns_count = dhcp_get_option_byte(&option_ptr[1]) / (u32_t)sizeof(struct ip_addr); + /* limit to at most DHCP_MAX_DNS DNS servers */ + if (dhcp->dns_count > DHCP_MAX_DNS) + dhcp->dns_count = DHCP_MAX_DNS; + for (n = 0; n < dhcp->dns_count; n++) { + dhcp->offered_dns_addr[n].addr = htonl(dhcp_get_option_long(&option_ptr[2 + n * 4])); +#if LWIP_DNS + dns_setserver( n, (struct ip_addr *)(&(dhcp->offered_dns_addr[n].addr))); +#endif /* LWIP_DNS */ + } +#if LWIP_DNS + dns_setserver( n, (struct ip_addr *)(&ip_addr_any)); +#endif /* LWIP_DNS */ + } +} + +/** + * Start DHCP negotiation for a network interface. + * + * If no DHCP client instance was attached to this interface, + * a new client is created first. If a DHCP client instance + * was already present, it restarts negotiation. + * + * @param netif The lwIP network interface + * @return lwIP error code + * - ERR_OK - No error + * - ERR_MEM - Out of memory + */ +err_t +dhcp_start(struct netif *netif) +{ + struct dhcp *dhcp; + err_t result = ERR_OK; + + LWIP_ERROR("netif != NULL", (netif != NULL), return ERR_ARG;); + dhcp = netif->dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + /* Remove the flag that says this netif is handled by DHCP, + it is set when we succeeded starting. */ + netif->flags &= ~NETIF_FLAG_DHCP; + + /* check MTU of the netif */ + if (netif->mtu < DHCP_MAX_MSG_LEN_MIN_REQUIRED) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): Cannot use this netif with DHCP: MTU is too small\n")); + return ERR_MEM; + } + + /* no DHCP client attached yet? */ + if (dhcp == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting new DHCP client\n")); + dhcp = mem_malloc(sizeof(struct dhcp)); + if (dhcp == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not allocate dhcp\n")); + return ERR_MEM; + } + /* store this dhcp client in the netif */ + netif->dhcp = dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): allocated dhcp")); + /* already has DHCP client attached */ + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_start(): restarting DHCP configuration\n")); + if (dhcp->pcb != NULL) { + udp_remove(dhcp->pcb); + } + LWIP_ASSERT("pbuf p_out wasn't freed", dhcp->p_out == NULL); + LWIP_ASSERT("reply wasn't freed", dhcp->msg_in == NULL && + dhcp->options_in == NULL && dhcp->options_in_len == 0); + } + + /* clear data structure */ + memset(dhcp, 0, sizeof(struct dhcp)); + /* allocate UDP PCB */ + dhcp->pcb = udp_new(); + if (dhcp->pcb == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): could not obtain pcb\n")); + mem_free((void *)dhcp); + netif->dhcp = dhcp = NULL; + return ERR_MEM; + } +#if IP_SOF_BROADCAST + dhcp->pcb->so_options|=SOF_BROADCAST; +#endif /* IP_SOF_BROADCAST */ + /* set up local and remote port for the pcb */ + udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); + udp_connect(dhcp->pcb, IP_ADDR_ANY, DHCP_SERVER_PORT); + /* set up the recv callback and argument */ + udp_recv(dhcp->pcb, dhcp_recv, netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_start(): starting DHCP configuration\n")); + /* (re)start the DHCP negotiation */ + result = dhcp_discover(netif); + if (result != ERR_OK) { + /* free resources allocated above */ + dhcp_stop(netif); + return ERR_MEM; + } + /* Set the flag that says this netif is handled by DHCP. */ + netif->flags |= NETIF_FLAG_DHCP; + return result; +} + +/** + * Inform a DHCP server of our manual configuration. + * + * This informs DHCP servers of our fixed IP address configuration + * by sending an INFORM message. It does not involve DHCP address + * configuration, it is just here to be nice to the network. + * + * @param netif The lwIP network interface + */ +void +dhcp_inform(struct netif *netif) +{ + struct dhcp *dhcp, *old_dhcp; + err_t result = ERR_OK; + dhcp = mem_malloc(sizeof(struct dhcp)); + if (dhcp == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_inform(): could not allocate dhcp\n")); + return; + } + memset(dhcp, 0, sizeof(struct dhcp)); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_inform(): allocated dhcp\n")); + dhcp->pcb = udp_new(); + if (dhcp->pcb == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_inform(): could not obtain pcb")); + goto free_dhcp_and_return; + } + old_dhcp = netif->dhcp; + netif->dhcp = dhcp; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_inform(): created new udp pcb\n")); + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_INFORM); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + +#if IP_SOF_BROADCAST + dhcp->pcb->so_options|=SOF_BROADCAST; +#endif /* IP_SOF_BROADCAST */ + udp_bind(dhcp->pcb, IP_ADDR_ANY, DHCP_CLIENT_PORT); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_inform: INFORMING\n")); + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_inform: could not allocate DHCP request\n")); + } + + udp_remove(dhcp->pcb); + dhcp->pcb = NULL; + netif->dhcp = old_dhcp; +free_dhcp_and_return: + mem_free((void *)dhcp); +} + +/** Handle a possible change in the network configuration. + * + * This enters the REBOOTING state to verify that the currently bound + * address is still valid. + */ +void +dhcp_network_changed(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + if (!dhcp) + return; + switch (dhcp->state) { + case DHCP_REBINDING: + case DHCP_RENEWING: + case DHCP_BOUND: + case DHCP_REBOOTING: + netif_set_down(netif); + dhcp->tries = 0; + dhcp_reboot(netif); + break; + case DHCP_OFF: + /* stay off */ + break; + default: + dhcp->tries = 0; + dhcp_discover(netif); + break; + } +} + +#if DHCP_DOES_ARP_CHECK +/** + * Match an ARP reply with the offered IP address. + * + * @param netif the network interface on which the reply was received + * @param addr The IP address we received a reply from + */ +void dhcp_arp_reply(struct netif *netif, struct ip_addr *addr) +{ + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_arp_reply()\n")); + /* is a DHCP client doing an ARP check? */ + if ((netif->dhcp != NULL) && (netif->dhcp->state == DHCP_CHECKING)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_arp_reply(): CHECKING, arp reply for 0x%08"X32_F"\n", addr->addr)); + /* did a host respond with the address we + were offered by the DHCP server? */ + if (ip_addr_cmp(addr, &netif->dhcp->offered_ip_addr)) { + /* we will not accept the offered address */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING, + ("dhcp_arp_reply(): arp reply matched with offered address, declining\n")); + dhcp_decline(netif); + } + } +} + +/** + * Decline an offered lease. + * + * Tell the DHCP server we do not accept the offered address. + * One reason to decline the lease is when we find out the address + * is already in use by another host (through ARP). + * + * @param netif the netif under DHCP control + */ +static err_t +dhcp_decline(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result = ERR_OK; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline()\n")); + dhcp_set_state(dhcp, DHCP_BACKING_OFF); + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_DECLINE); + + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); + + dhcp_option_trailer(dhcp); + /* resize pbuf to reflect true size of options */ + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* per section 4.4.4, broadcast DECLINE messages */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_decline: BACKING OFF\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_decline: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = 10*1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_decline(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} +#endif + + +/** + * Start the DHCP process, discover a DHCP server. + * + * @param netif the netif under DHCP control + */ +static err_t +dhcp_discover(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result = ERR_OK; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover()\n")); + ip_addr_set(&dhcp->offered_ip_addr, IP_ADDR_ANY); + dhcp_set_state(dhcp, DHCP_SELECTING); + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: making request\n")); + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_DISCOVER); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + + dhcp_option(dhcp, DHCP_OPTION_PARAMETER_REQUEST_LIST, 4/*num options*/); + dhcp_option_byte(dhcp, DHCP_OPTION_SUBNET_MASK); + dhcp_option_byte(dhcp, DHCP_OPTION_ROUTER); + dhcp_option_byte(dhcp, DHCP_OPTION_BROADCAST); + dhcp_option_byte(dhcp, DHCP_OPTION_DNS_SERVER); + + dhcp_option_trailer(dhcp); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: realloc()ing\n")); + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: sendto(DISCOVER, IP_ADDR_BROADCAST, DHCP_SERVER_PORT)\n")); + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_discover: deleting()ing\n")); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover: SELECTING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_discover: could not allocate DHCP request\n")); + } + dhcp->tries++; +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->tries >= LWIP_DHCP_AUTOIP_COOP_TRIES && dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_OFF) { + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_ON; + autoip_start(netif); + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + msecs = (dhcp->tries < 6 ? 1 << dhcp->tries : 60) * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_discover(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + + +/** + * Bind the interface to the offered IP address. + * + * @param netif network interface to bind to the offered address + */ +static void +dhcp_bind(struct netif *netif) +{ + u32_t timeout; + struct dhcp *dhcp; + struct ip_addr sn_mask, gw_addr; + LWIP_ERROR("dhcp_bind: netif != NULL", (netif != NULL), return;); + dhcp = netif->dhcp; + LWIP_ERROR("dhcp_bind: dhcp != NULL", (dhcp != NULL), return;); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num)); + + /* temporary DHCP lease? */ + if (dhcp->offered_t1_renew != 0xffffffffUL) { + /* set renewal period timer */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew)); + timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; + if(timeout > 0xffff) { + timeout = 0xffff; + } + dhcp->t1_timeout = (u16_t)timeout; + if (dhcp->t1_timeout == 0) { + dhcp->t1_timeout = 1; + } + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew*1000)); + } + /* set renewal period timer */ + if (dhcp->offered_t2_rebind != 0xffffffffUL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind)); + timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; + if(timeout > 0xffff) { + timeout = 0xffff; + } + dhcp->t2_timeout = (u16_t)timeout; + if (dhcp->t2_timeout == 0) { + dhcp->t2_timeout = 1; + } + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind*1000)); + } + /* copy offered network mask */ + ip_addr_set(&sn_mask, &dhcp->offered_sn_mask); + + /* subnet mask not given? */ + /* TODO: this is not a valid check. what if the network mask is 0? */ + if (sn_mask.addr == 0) { + /* choose a safe subnet mask given the network class */ + u8_t first_octet = ip4_addr1(&sn_mask); + if (first_octet <= 127) { + sn_mask.addr = htonl(0xff000000); + } else if (first_octet >= 192) { + sn_mask.addr = htonl(0xffffff00); + } else { + sn_mask.addr = htonl(0xffff0000); + } + } + + ip_addr_set(&gw_addr, &dhcp->offered_gw_addr); + /* gateway address not given? */ + if (gw_addr.addr == 0) { + /* copy network address */ + gw_addr.addr = (dhcp->offered_ip_addr.addr & sn_mask.addr); + /* use first host address on network as gateway */ + gw_addr.addr |= htonl(0x00000001); + } + +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_ON) { + autoip_stop(netif); + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF; + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): IP: 0x%08"X32_F"\n", dhcp->offered_ip_addr.addr)); + netif_set_ipaddr(netif, &dhcp->offered_ip_addr); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): SN: 0x%08"X32_F"\n", sn_mask.addr)); + netif_set_netmask(netif, &sn_mask); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_STATE, ("dhcp_bind(): GW: 0x%08"X32_F"\n", gw_addr.addr)); + netif_set_gw(netif, &gw_addr); + /* bring the interface up */ + netif_set_up(netif); + /* netif is now bound to DHCP leased address */ + dhcp_set_state(dhcp, DHCP_BOUND); +} + +/** + * Renew an existing DHCP lease at the involved DHCP server. + * + * @param netif network interface which must renew its lease + */ +err_t +dhcp_renew(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; +#if LWIP_NETIF_HOSTNAME + const char *p; +#endif /* LWIP_NETIF_HOSTNAME */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_renew()\n")); + dhcp_set_state(dhcp, DHCP_RENEWING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_REQUEST); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + +#if LWIP_NETIF_HOSTNAME + p = (const char*)netif->hostname; + if (p != NULL) { + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, strlen(p)); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + +#if 0 + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); +#endif + +#if 0 + dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); + dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); +#endif + /* append DHCP message trailer */ + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + udp_sendto_if(dhcp->pcb, dhcp->p_out, &dhcp->server_ip_addr, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew: RENEWING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_renew: could not allocate DHCP request\n")); + } + dhcp->tries++; + /* back-off on retries, but to a maximum of 20 seconds */ + msecs = dhcp->tries < 10 ? dhcp->tries * 2000 : 20 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_renew(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +/** + * Rebind with a DHCP server for an existing DHCP lease. + * + * @param netif network interface which must rebind with a DHCP server + */ +static err_t +dhcp_rebind(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; +#if LWIP_NETIF_HOSTNAME + const char *p; +#endif /* LWIP_NETIF_HOSTNAME */ + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind()\n")); + dhcp_set_state(dhcp, DHCP_REBINDING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_REQUEST); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, DHCP_MAX_MSG_LEN(netif)); + +#if LWIP_NETIF_HOSTNAME + p = (const char*)netif->hostname; + if (p != NULL) { + dhcp_option(dhcp, DHCP_OPTION_HOSTNAME, strlen(p)); + while (*p) { + dhcp_option_byte(dhcp, *p++); + } + } +#endif /* LWIP_NETIF_HOSTNAME */ + +#if 0 + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); + + dhcp_option(dhcp, DHCP_OPTION_SERVER_ID, 4); + dhcp_option_long(dhcp, ntohl(dhcp->server_ip_addr.addr)); +#endif + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* broadcast to server */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind: REBINDING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_rebind: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_rebind(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + +/** + * Enter REBOOTING state to verify an existing lease + * + * @param netif network interface which must reboot + */ +static err_t +dhcp_reboot(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot()\n")); + dhcp_set_state(dhcp, DHCP_REBOOTING); + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_REQUEST); + + dhcp_option(dhcp, DHCP_OPTION_MAX_MSG_SIZE, DHCP_OPTION_MAX_MSG_SIZE_LEN); + dhcp_option_short(dhcp, 576); + + dhcp_option(dhcp, DHCP_OPTION_REQUESTED_IP, 4); + dhcp_option_long(dhcp, ntohl(dhcp->offered_ip_addr.addr)); + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + /* broadcast to server */ + udp_sendto_if(dhcp->pcb, dhcp->p_out, IP_ADDR_BROADCAST, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot: REBOOTING\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_reboot: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_reboot(): set request timeout %"U16_F" msecs\n", msecs)); + return result; +} + + +/** + * Release a DHCP lease. + * + * @param netif network interface which must release its lease + */ +err_t +dhcp_release(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + err_t result; + u16_t msecs; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_release()\n")); + + /* idle DHCP client */ + dhcp_set_state(dhcp, DHCP_OFF); + /* clean old DHCP offer */ + dhcp->server_ip_addr.addr = 0; + dhcp->offered_ip_addr.addr = dhcp->offered_sn_mask.addr = 0; + dhcp->offered_gw_addr.addr = dhcp->offered_bc_addr.addr = 0; + dhcp->offered_t0_lease = dhcp->offered_t1_renew = dhcp->offered_t2_rebind = 0; + dhcp->dns_count = 0; + + /* create and initialize the DHCP message header */ + result = dhcp_create_request(netif); + if (result == ERR_OK) { + dhcp_option(dhcp, DHCP_OPTION_MESSAGE_TYPE, DHCP_OPTION_MESSAGE_TYPE_LEN); + dhcp_option_byte(dhcp, DHCP_RELEASE); + + dhcp_option_trailer(dhcp); + + pbuf_realloc(dhcp->p_out, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN + dhcp->options_out_len); + + udp_sendto_if(dhcp->pcb, dhcp->p_out, &dhcp->server_ip_addr, DHCP_SERVER_PORT, netif); + dhcp_delete_request(netif); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_release: RELEASED, DHCP_OFF\n")); + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("dhcp_release: could not allocate DHCP request\n")); + } + dhcp->tries++; + msecs = dhcp->tries < 10 ? dhcp->tries * 1000 : 10 * 1000; + dhcp->request_timeout = (msecs + DHCP_FINE_TIMER_MSECS - 1) / DHCP_FINE_TIMER_MSECS; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_release(): set request timeout %"U16_F" msecs\n", msecs)); + /* bring the interface down */ + netif_set_down(netif); + /* remove IP address from interface */ + netif_set_ipaddr(netif, IP_ADDR_ANY); + netif_set_gw(netif, IP_ADDR_ANY); + netif_set_netmask(netif, IP_ADDR_ANY); + + /* TODO: netif_down(netif); */ + return result; +} + +/** + * Remove the DHCP client from the interface. + * + * @param netif The network interface to stop DHCP on + */ +void +dhcp_stop(struct netif *netif) +{ + struct dhcp *dhcp = netif->dhcp; + LWIP_ERROR("dhcp_stop: netif != NULL", (netif != NULL), return;); + /* Remove the flag that says this netif is handled by DHCP. */ + netif->flags &= ~NETIF_FLAG_DHCP; + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_stop()\n")); + /* netif is DHCP configured? */ + if (dhcp != NULL) { +#if LWIP_DHCP_AUTOIP_COOP + if(dhcp->autoip_coop_state == DHCP_AUTOIP_COOP_STATE_ON) { + autoip_stop(netif); + dhcp->autoip_coop_state = DHCP_AUTOIP_COOP_STATE_OFF; + } +#endif /* LWIP_DHCP_AUTOIP_COOP */ + + if (dhcp->pcb != NULL) { + udp_remove(dhcp->pcb); + dhcp->pcb = NULL; + } + LWIP_ASSERT("reply wasn't freed", dhcp->msg_in == NULL && + dhcp->options_in == NULL && dhcp->options_in_len == 0); + mem_free((void *)dhcp); + netif->dhcp = NULL; + } +} + +/* + * Set the DHCP state of a DHCP client. + * + * If the state changed, reset the number of tries. + * + * TODO: we might also want to reset the timeout here? + */ +static void +dhcp_set_state(struct dhcp *dhcp, u8_t new_state) +{ + if (new_state != dhcp->state) { + dhcp->state = new_state; + dhcp->tries = 0; + } +} + +/* + * Concatenate an option type and length field to the outgoing + * DHCP message. + * + */ +static void +dhcp_option(struct dhcp *dhcp, u8_t option_type, u8_t option_len) +{ + LWIP_ASSERT("dhcp_option: dhcp->options_out_len + 2 + option_len <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2U + option_len <= DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = option_type; + dhcp->msg_out->options[dhcp->options_out_len++] = option_len; +} +/* + * Concatenate a single byte to the outgoing DHCP message. + * + */ +static void +dhcp_option_byte(struct dhcp *dhcp, u8_t value) +{ + LWIP_ASSERT("dhcp_option_byte: dhcp->options_out_len < DHCP_OPTIONS_LEN", dhcp->options_out_len < DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = value; +} + +static void +dhcp_option_short(struct dhcp *dhcp, u16_t value) +{ + LWIP_ASSERT("dhcp_option_short: dhcp->options_out_len + 2 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 2U <= DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0xff00U) >> 8); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t) (value & 0x00ffU); +} + +static void +dhcp_option_long(struct dhcp *dhcp, u32_t value) +{ + LWIP_ASSERT("dhcp_option_long: dhcp->options_out_len + 4 <= DHCP_OPTIONS_LEN", dhcp->options_out_len + 4U <= DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0xff000000UL) >> 24); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0x00ff0000UL) >> 16); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0x0000ff00UL) >> 8); + dhcp->msg_out->options[dhcp->options_out_len++] = (u8_t)((value & 0x000000ffUL)); +} + +/** + * Extract the DHCP message and the DHCP options. + * + * Extract the DHCP message and the DHCP options, each into a contiguous + * piece of memory. As a DHCP message is variable sized by its options, + * and also allows overriding some fields for options, the easy approach + * is to first unfold the options into a conitguous piece of memory, and + * use that further on. + * + */ +static err_t +dhcp_unfold_reply(struct dhcp *dhcp, struct pbuf *p) +{ + u16_t ret; + LWIP_ERROR("dhcp != NULL", (dhcp != NULL), return ERR_ARG;); + /* free any left-overs from previous unfolds */ + dhcp_free_reply(dhcp); + /* options present? */ + if (p->tot_len > (sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN)) { + dhcp->options_in_len = p->tot_len - (sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); + dhcp->options_in = mem_malloc(dhcp->options_in_len); + if (dhcp->options_in == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_unfold_reply(): could not allocate dhcp->options\n")); + dhcp->options_in_len = 0; + return ERR_MEM; + } + } + dhcp->msg_in = mem_malloc(sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); + if (dhcp->msg_in == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_unfold_reply(): could not allocate dhcp->msg_in\n")); + if (dhcp->options_in != NULL) { + mem_free(dhcp->options_in); + dhcp->options_in = NULL; + dhcp->options_in_len = 0; + } + return ERR_MEM; + } + + /** copy the DHCP message without options */ + ret = pbuf_copy_partial(p, dhcp->msg_in, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN, 0); + LWIP_ASSERT("ret == sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN", ret == sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_unfold_reply(): copied %"U16_F" bytes into dhcp->msg_in[]\n", + sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN)); + + if (dhcp->options_in != NULL) { + /** copy the DHCP options */ + ret = pbuf_copy_partial(p, dhcp->options_in, dhcp->options_in_len, sizeof(struct dhcp_msg) - DHCP_OPTIONS_LEN); + LWIP_ASSERT("ret == dhcp->options_in_len", ret == dhcp->options_in_len); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_unfold_reply(): copied %"U16_F" bytes to dhcp->options_in[]\n", + dhcp->options_in_len)); + } + LWIP_UNUSED_ARG(ret); + return ERR_OK; +} + +/** + * Free the incoming DHCP message including contiguous copy of + * its DHCP options. + */ +static void dhcp_free_reply(struct dhcp *dhcp) +{ + if (dhcp->msg_in != NULL) { + mem_free((void *)dhcp->msg_in); + dhcp->msg_in = NULL; + } + if (dhcp->options_in) { + mem_free(dhcp->options_in); + dhcp->options_in = NULL; + dhcp->options_in_len = 0; + } + LWIP_DEBUGF(DHCP_DEBUG, ("dhcp_free_reply(): free'd\n")); +} + +/** + * If an incoming DHCP message is in response to us, then trigger the state machine + */ +static void dhcp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port) +{ + struct netif *netif = (struct netif *)arg; + struct dhcp *dhcp = netif->dhcp; + struct dhcp_msg *reply_msg = (struct dhcp_msg *)p->payload; + u8_t *options_ptr; + u8_t msg_type; + u8_t i; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_recv(pbuf = %p) from DHCP server %"U16_F".%"U16_F".%"U16_F".%"U16_F" port %"U16_F"\n", (void*)p, + (u16_t)(ntohl(addr->addr) >> 24 & 0xff), (u16_t)(ntohl(addr->addr) >> 16 & 0xff), + (u16_t)(ntohl(addr->addr) >> 8 & 0xff), (u16_t)(ntohl(addr->addr) & 0xff), port)); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("pbuf->len = %"U16_F"\n", p->len)); + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("pbuf->tot_len = %"U16_F"\n", p->tot_len)); + /* prevent warnings about unused arguments */ + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(addr); + LWIP_UNUSED_ARG(port); + + LWIP_ASSERT("reply wasn't freed", dhcp->msg_in == NULL && + dhcp->options_in == NULL && dhcp->options_in_len == 0); + + if (p->len < DHCP_MIN_REPLY_LEN) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP reply message too short\n")); + goto free_pbuf_and_return; + } + + if (reply_msg->op != DHCP_BOOTREPLY) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("not a DHCP reply message, but type %"U16_F"\n", (u16_t)reply_msg->op)); + goto free_pbuf_and_return; + } + /* iterate through hardware address and match against DHCP message */ + for (i = 0; i < netif->hwaddr_len; i++) { + if (netif->hwaddr[i] != reply_msg->chaddr[i]) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("netif->hwaddr[%"U16_F"]==%02"X16_F" != reply_msg->chaddr[%"U16_F"]==%02"X16_F"\n", + (u16_t)i, (u16_t)netif->hwaddr[i], (u16_t)i, (u16_t)reply_msg->chaddr[i])); + goto free_pbuf_and_return; + } + } + /* match transaction ID against what we expected */ + if (ntohl(reply_msg->xid) != dhcp->xid) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("transaction id mismatch reply_msg->xid(%"X32_F")!=dhcp->xid(%"X32_F")\n",ntohl(reply_msg->xid),dhcp->xid)); + goto free_pbuf_and_return; + } + /* option fields could be unfold? */ + if (dhcp_unfold_reply(dhcp, p) != ERR_OK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("problem unfolding DHCP message - too short on memory?\n")); + goto free_pbuf_and_return; + } + + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("searching DHCP_OPTION_MESSAGE_TYPE\n")); + /* obtain pointer to DHCP message type */ + options_ptr = dhcp_get_option_ptr(dhcp, DHCP_OPTION_MESSAGE_TYPE); + if (options_ptr == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("DHCP_OPTION_MESSAGE_TYPE option not found\n")); + goto free_pbuf_and_return; + } + + /* read DHCP message type */ + msg_type = dhcp_get_option_byte(options_ptr + 2); + /* message type is DHCP ACK? */ + if (msg_type == DHCP_ACK) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_ACK received\n")); + /* in requesting state? */ + if (dhcp->state == DHCP_REQUESTING) { + dhcp_handle_ack(netif); + dhcp->request_timeout = 0; +#if DHCP_DOES_ARP_CHECK + /* check if the acknowledged lease address is already in use */ + dhcp_check(netif); +#else + /* bind interface to the acknowledged lease address */ + dhcp_bind(netif); +#endif + } + /* already bound to the given lease address? */ + else if ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING)) { + dhcp->request_timeout = 0; + dhcp_bind(netif); + } + } + /* received a DHCP_NAK in appropriate state? */ + else if ((msg_type == DHCP_NAK) && + ((dhcp->state == DHCP_REBOOTING) || (dhcp->state == DHCP_REQUESTING) || + (dhcp->state == DHCP_REBINDING) || (dhcp->state == DHCP_RENEWING ))) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_NAK received\n")); + dhcp->request_timeout = 0; + dhcp_handle_nak(netif); + } + /* received a DHCP_OFFER in DHCP_SELECTING state? */ + else if ((msg_type == DHCP_OFFER) && (dhcp->state == DHCP_SELECTING)) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("DHCP_OFFER received in DHCP_SELECTING state\n")); + dhcp->request_timeout = 0; + /* remember offered lease */ + dhcp_handle_offer(netif); + } +free_pbuf_and_return: + dhcp_free_reply(dhcp); + pbuf_free(p); +} + +/** + * Create a DHCP request, fill in common headers + * + * @param netif the netif under DHCP control + */ +static err_t +dhcp_create_request(struct netif *netif) +{ + struct dhcp *dhcp; + u16_t i; +#ifndef DHCP_GLOBAL_XID + /** default global transaction identifier starting value (easy to match + * with a packet analyser). We simply increment for each new request. + * Predefine DHCP_GLOBAL_XID to a better value or a function call to generate one + * at runtime, any supporting function prototypes can be defined in DHCP_GLOBAL_XID_HEADER */ + static u32_t xid = 0xABCD0000; +#else + static u32_t xid; + static u8_t xid_initialised = 0; + if (!xid_initialised) { + xid = DHCP_GLOBAL_XID; + xid_initialised = !xid_initialised; + } +#endif + LWIP_ERROR("dhcp_create_request: netif != NULL", (netif != NULL), return ERR_ARG;); + dhcp = netif->dhcp; + LWIP_ERROR("dhcp_create_request: dhcp != NULL", (dhcp != NULL), return ERR_VAL;); + LWIP_ASSERT("dhcp_create_request: dhcp->p_out == NULL", dhcp->p_out == NULL); + LWIP_ASSERT("dhcp_create_request: dhcp->msg_out == NULL", dhcp->msg_out == NULL); + dhcp->p_out = pbuf_alloc(PBUF_TRANSPORT, sizeof(struct dhcp_msg), PBUF_RAM); + if (dhcp->p_out == NULL) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("dhcp_create_request(): could not allocate pbuf\n")); + return ERR_MEM; + } + LWIP_ASSERT("dhcp_create_request: check that first pbuf can hold struct dhcp_msg", + (dhcp->p_out->len >= sizeof(struct dhcp_msg))); + + /* reuse transaction identifier in retransmissions */ + if (dhcp->tries==0) + xid++; + dhcp->xid = xid; + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, + ("transaction id xid(%"X32_F")\n", xid)); + + dhcp->msg_out = (struct dhcp_msg *)dhcp->p_out->payload; + + dhcp->msg_out->op = DHCP_BOOTREQUEST; + /* TODO: make link layer independent */ + dhcp->msg_out->htype = DHCP_HTYPE_ETH; + /* TODO: make link layer independent */ + dhcp->msg_out->hlen = DHCP_HLEN_ETH; + dhcp->msg_out->hops = 0; + dhcp->msg_out->xid = htonl(dhcp->xid); + dhcp->msg_out->secs = 0; + dhcp->msg_out->flags = 0; + dhcp->msg_out->ciaddr.addr = 0; + if (dhcp->state==DHCP_BOUND || dhcp->state==DHCP_RENEWING || dhcp->state==DHCP_REBINDING) { + dhcp->msg_out->ciaddr.addr = netif->ip_addr.addr; + } + dhcp->msg_out->yiaddr.addr = 0; + dhcp->msg_out->siaddr.addr = 0; + dhcp->msg_out->giaddr.addr = 0; + for (i = 0; i < DHCP_CHADDR_LEN; i++) { + /* copy netif hardware address, pad with zeroes */ + dhcp->msg_out->chaddr[i] = (i < netif->hwaddr_len) ? netif->hwaddr[i] : 0/* pad byte*/; + } + for (i = 0; i < DHCP_SNAME_LEN; i++) { + dhcp->msg_out->sname[i] = 0; + } + for (i = 0; i < DHCP_FILE_LEN; i++) { + dhcp->msg_out->file[i] = 0; + } + dhcp->msg_out->cookie = htonl(0x63825363UL); + dhcp->options_out_len = 0; + /* fill options field with an incrementing array (for debugging purposes) */ + for (i = 0; i < DHCP_OPTIONS_LEN; i++) { + dhcp->msg_out->options[i] = (u8_t)i; /* for debugging only, no matter if truncated */ + } + return ERR_OK; +} + +/** + * Free previously allocated memory used to send a DHCP request. + * + * @param netif the netif under DHCP control + */ +static void +dhcp_delete_request(struct netif *netif) +{ + struct dhcp *dhcp; + LWIP_ERROR("dhcp_delete_request: netif != NULL", (netif != NULL), return;); + dhcp = netif->dhcp; + LWIP_ERROR("dhcp_delete_request: dhcp != NULL", (dhcp != NULL), return;); + LWIP_ASSERT("dhcp_delete_request: dhcp->p_out != NULL", dhcp->p_out != NULL); + LWIP_ASSERT("dhcp_delete_request: dhcp->msg_out != NULL", dhcp->msg_out != NULL); + if (dhcp->p_out != NULL) { + pbuf_free(dhcp->p_out); + } + dhcp->p_out = NULL; + dhcp->msg_out = NULL; +} + +/** + * Add a DHCP message trailer + * + * Adds the END option to the DHCP message, and if + * necessary, up to three padding bytes. + * + * @param dhcp DHCP state structure + */ +static void +dhcp_option_trailer(struct dhcp *dhcp) +{ + LWIP_ERROR("dhcp_option_trailer: dhcp != NULL", (dhcp != NULL), return;); + LWIP_ASSERT("dhcp_option_trailer: dhcp->msg_out != NULL\n", dhcp->msg_out != NULL); + LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); + dhcp->msg_out->options[dhcp->options_out_len++] = DHCP_OPTION_END; + /* packet is too small, or not 4 byte aligned? */ + while ((dhcp->options_out_len < DHCP_MIN_OPTIONS_LEN) || (dhcp->options_out_len & 3)) { + /* LWIP_DEBUGF(DHCP_DEBUG,("dhcp_option_trailer:dhcp->options_out_len=%"U16_F", DHCP_OPTIONS_LEN=%"U16_F, dhcp->options_out_len, DHCP_OPTIONS_LEN)); */ + LWIP_ASSERT("dhcp_option_trailer: dhcp->options_out_len < DHCP_OPTIONS_LEN\n", dhcp->options_out_len < DHCP_OPTIONS_LEN); + /* add a fill/padding byte */ + dhcp->msg_out->options[dhcp->options_out_len++] = 0; + } +} + +/** + * Find the offset of a DHCP option inside the DHCP message. + * + * @param dhcp DHCP client + * @param option_type + * + * @return a byte offset into the UDP message where the option was found, or + * zero if the given option was not found. + */ +static u8_t *dhcp_get_option_ptr(struct dhcp *dhcp, u8_t option_type) +{ + u8_t overload = DHCP_OVERLOAD_NONE; + + /* options available? */ + if ((dhcp->options_in != NULL) && (dhcp->options_in_len > 0)) { + /* start with options field */ + u8_t *options = (u8_t *)dhcp->options_in; + u16_t offset = 0; + /* at least 1 byte to read and no end marker, then at least 3 bytes to read? */ + while ((offset < dhcp->options_in_len) && (options[offset] != DHCP_OPTION_END)) { + /* LWIP_DEBUGF(DHCP_DEBUG, ("msg_offset=%"U16_F", q->len=%"U16_F, msg_offset, q->len)); */ + /* are the sname and/or file field overloaded with options? */ + if (options[offset] == DHCP_OPTION_OVERLOAD) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded message detected\n")); + /* skip option type and length */ + offset += 2; + overload = options[offset++]; + } + /* requested option found */ + else if (options[offset] == option_type) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("option found at offset %"U16_F" in options\n", offset)); + return &options[offset]; + /* skip option */ + } else { + LWIP_DEBUGF(DHCP_DEBUG, ("skipping option %"U16_F" in options\n", options[offset])); + /* skip option type */ + offset++; + /* skip option length, and then length bytes */ + offset += 1 + options[offset]; + } + } + /* is this an overloaded message? */ + if (overload != DHCP_OVERLOAD_NONE) { + u16_t field_len; + if (overload == DHCP_OVERLOAD_FILE) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded file field\n")); + options = (u8_t *)&dhcp->msg_in->file; + field_len = DHCP_FILE_LEN; + } else if (overload == DHCP_OVERLOAD_SNAME) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname field\n")); + options = (u8_t *)&dhcp->msg_in->sname; + field_len = DHCP_SNAME_LEN; + /* TODO: check if else if () is necessary */ + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("overloaded sname and file field\n")); + options = (u8_t *)&dhcp->msg_in->sname; + field_len = DHCP_FILE_LEN + DHCP_SNAME_LEN; + } + offset = 0; + + /* at least 1 byte to read and no end marker */ + while ((offset < field_len) && (options[offset] != DHCP_OPTION_END)) { + if (options[offset] == option_type) { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("option found at offset=%"U16_F"\n", offset)); + return &options[offset]; + /* skip option */ + } else { + LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("skipping option %"U16_F"\n", options[offset])); + /* skip option type */ + offset++; + offset += 1 + options[offset]; + } + } + } + } + return NULL; +} + +/** + * Return the byte of DHCP option data. + * + * @param client DHCP client. + * @param ptr pointer obtained by dhcp_get_option_ptr(). + * + * @return byte value at the given address. + */ +static u8_t +dhcp_get_option_byte(u8_t *ptr) +{ + LWIP_DEBUGF(DHCP_DEBUG, ("option byte value=%"U16_F"\n", (u16_t)(*ptr))); + return *ptr; +} + +#if 0 /* currently unused */ +/** + * Return the 16-bit value of DHCP option data. + * + * @param client DHCP client. + * @param ptr pointer obtained by dhcp_get_option_ptr(). + * + * @return byte value at the given address. + */ +static u16_t +dhcp_get_option_short(u8_t *ptr) +{ + u16_t value; + value = *ptr++ << 8; + value |= *ptr; + LWIP_DEBUGF(DHCP_DEBUG, ("option short value=%"U16_F"\n", value)); + return value; +} +#endif + +/** + * Return the 32-bit value of DHCP option data. + * + * @param client DHCP client. + * @param ptr pointer obtained by dhcp_get_option_ptr(). + * + * @return byte value at the given address. + */ +static u32_t dhcp_get_option_long(u8_t *ptr) +{ + u32_t value; + value = (u32_t)(*ptr++) << 24; + value |= (u32_t)(*ptr++) << 16; + value |= (u32_t)(*ptr++) << 8; + value |= (u32_t)(*ptr++); + LWIP_DEBUGF(DHCP_DEBUG, ("option long value=%"U32_F"\n", value)); + return value; +} + +#endif /* LWIP_DHCP */ diff --git a/bertos/net/lwip/src/core/dns.c b/bertos/net/lwip/src/core/dns.c new file mode 100644 index 0000000..b955538 --- /dev/null +++ b/bertos/net/lwip/src/core/dns.c @@ -0,0 +1,980 @@ +/** + * @file + * DNS - host name to IP address resolver. + * + */ + +/** + + * This file implements a DNS host name to IP address resolver. + + * Port to lwIP from uIP + * by Jim Pettinato April 2007 + + * uIP version Copyright (c) 2002-2003, Adam Dunkels. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * + * DNS.C + * + * The lwIP DNS resolver functions are used to lookup a host name and + * map it to a numerical IP address. It maintains a list of resolved + * hostnames that can be queried with the dns_lookup() function. + * New hostnames can be resolved using the dns_query() function. + * + * The lwIP version of the resolver also adds a non-blocking version of + * gethostbyname() that will work with a raw API application. This function + * checks for an IP address string first and converts it if it is valid. + * gethostbyname() then does a dns_lookup() to see if the name is + * already in the table. If so, the IP is returned. If not, a query is + * issued and the function returns with a ERR_INPROGRESS status. The app + * using the dns client must then go into a waiting state. + * + * Once a hostname has been resolved (or found to be non-existent), + * the resolver code calls a specified callback function (which + * must be implemented by the module that uses the resolver). + */ + +/*----------------------------------------------------------------------------- + * RFC 1035 - Domain names - implementation and specification + * RFC 2181 - Clarifications to the DNS Specification + *----------------------------------------------------------------------------*/ + +/** @todo: define good default values (rfc compliance) */ +/** @todo: improve answer parsing, more checkings... */ +/** @todo: check RFC1035 - 7.3. Processing responses */ + +/*----------------------------------------------------------------------------- + * Includes + *----------------------------------------------------------------------------*/ + +#include "lwip/opt.h" + +#if LWIP_DNS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/udp.h" +#include "lwip/mem.h" +#include "lwip/dns.h" + +#include + +/** DNS server IP address */ +#ifndef DNS_SERVER_ADDRESS +#define DNS_SERVER_ADDRESS inet_addr("208.67.222.222") /* resolver1.opendns.com */ +#endif + +/** DNS server port address */ +#ifndef DNS_SERVER_PORT +#define DNS_SERVER_PORT 53 +#endif + +/** DNS maximum number of retries when asking for a name, before "timeout". */ +#ifndef DNS_MAX_RETRIES +#define DNS_MAX_RETRIES 4 +#endif + +/** DNS resource record max. TTL (one week as default) */ +#ifndef DNS_MAX_TTL +#define DNS_MAX_TTL 604800 +#endif + +/* DNS protocol flags */ +#define DNS_FLAG1_RESPONSE 0x80 +#define DNS_FLAG1_OPCODE_STATUS 0x10 +#define DNS_FLAG1_OPCODE_INVERSE 0x08 +#define DNS_FLAG1_OPCODE_STANDARD 0x00 +#define DNS_FLAG1_AUTHORATIVE 0x04 +#define DNS_FLAG1_TRUNC 0x02 +#define DNS_FLAG1_RD 0x01 +#define DNS_FLAG2_RA 0x80 +#define DNS_FLAG2_ERR_MASK 0x0f +#define DNS_FLAG2_ERR_NONE 0x00 +#define DNS_FLAG2_ERR_NAME 0x03 + +/* DNS protocol states */ +#define DNS_STATE_UNUSED 0 +#define DNS_STATE_NEW 1 +#define DNS_STATE_ASKING 2 +#define DNS_STATE_DONE 3 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** DNS message header */ +struct dns_hdr { + PACK_STRUCT_FIELD(u16_t id); + PACK_STRUCT_FIELD(u8_t flags1); + PACK_STRUCT_FIELD(u8_t flags2); + PACK_STRUCT_FIELD(u16_t numquestions); + PACK_STRUCT_FIELD(u16_t numanswers); + PACK_STRUCT_FIELD(u16_t numauthrr); + PACK_STRUCT_FIELD(u16_t numextrarr); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif +#define SIZEOF_DNS_HDR 12 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** DNS query message structure */ +struct dns_query { + /* DNS query record starts with either a domain name or a pointer + to a name already present somewhere in the packet. */ + PACK_STRUCT_FIELD(u16_t type); + PACK_STRUCT_FIELD(u16_t class); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif +#define SIZEOF_DNS_QUERY 4 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** DNS answer message structure */ +struct dns_answer { + /* DNS answer record starts with either a domain name or a pointer + to a name already present somewhere in the packet. */ + PACK_STRUCT_FIELD(u16_t type); + PACK_STRUCT_FIELD(u16_t class); + PACK_STRUCT_FIELD(u32_t ttl); + PACK_STRUCT_FIELD(u16_t len); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif +#define SIZEOF_DNS_ANSWER 10 + +/** DNS table entry */ +struct dns_table_entry { + u8_t state; + u8_t numdns; + u8_t tmr; + u8_t retries; + u8_t seqno; + u8_t err; + u32_t ttl; + char name[DNS_MAX_NAME_LENGTH]; + struct ip_addr ipaddr; + /* pointer to callback on DNS query done */ + dns_found_callback found; + void *arg; +}; + +#if DNS_LOCAL_HOSTLIST +/** struct used for local host-list */ +struct local_hostlist_entry { + /** static hostname */ + const char *name; + /** static host address in network byteorder */ + u32_t addr; + struct local_hostlist_entry *next; +}; + +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC +/** Local host-list. For hostnames in this list, no + * external name resolution is performed */ +static struct local_hostlist_entry *local_hostlist_dynamic; +#else /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +/** Defining this allows the local_hostlist_static to be placed in a different + * linker section (e.g. FLASH) */ +#ifndef DNS_LOCAL_HOSTLIST_STORAGE_PRE +#define DNS_LOCAL_HOSTLIST_STORAGE_PRE static +#endif /* DNS_LOCAL_HOSTLIST_STORAGE_PRE */ +/** Defining this allows the local_hostlist_static to be placed in a different + * linker section (e.g. FLASH) */ +#ifndef DNS_LOCAL_HOSTLIST_STORAGE_POST +#define DNS_LOCAL_HOSTLIST_STORAGE_POST +#endif /* DNS_LOCAL_HOSTLIST_STORAGE_POST */ +DNS_LOCAL_HOSTLIST_STORAGE_PRE struct local_hostlist_entry local_hostlist_static[] + DNS_LOCAL_HOSTLIST_STORAGE_POST = DNS_LOCAL_HOSTLIST_INIT; + +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +static void dns_init_local(); +#endif /* DNS_LOCAL_HOSTLIST */ + + +/* forward declarations */ +static void dns_recv(void *s, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port); +static void dns_check_entries(void); + +/*----------------------------------------------------------------------------- + * Globales + *----------------------------------------------------------------------------*/ + +/* DNS variables */ +static struct udp_pcb *dns_pcb; +static u8_t dns_seqno; +static struct dns_table_entry dns_table[DNS_TABLE_SIZE]; +static struct ip_addr dns_servers[DNS_MAX_SERVERS]; + +#if (DNS_USES_STATIC_BUF == 1) +static u8_t dns_payload[DNS_MSG_SIZE]; +#endif /* (DNS_USES_STATIC_BUF == 1) */ + +/** + * Initialize the resolver: set up the UDP pcb and configure the default server + * (DNS_SERVER_ADDRESS). + */ +void +dns_init() +{ + struct ip_addr dnsserver; + + /* initialize default DNS server address */ + dnsserver.addr = DNS_SERVER_ADDRESS; + + LWIP_DEBUGF(DNS_DEBUG, ("dns_init: initializing\n")); + + /* if dns client not yet initialized... */ + if (dns_pcb == NULL) { + dns_pcb = udp_new(); + + if (dns_pcb != NULL) { + /* initialize DNS table not needed (initialized to zero since it is a + * global variable) */ + LWIP_ASSERT("For implicit initialization to work, DNS_STATE_UNUSED needs to be 0", + DNS_STATE_UNUSED == 0); + + /* initialize DNS client */ + udp_bind(dns_pcb, IP_ADDR_ANY, 0); + udp_recv(dns_pcb, dns_recv, NULL); + + /* initialize default DNS primary server */ + dns_setserver(0, &dnsserver); + } + } +#if DNS_LOCAL_HOSTLIST + dns_init_local(); +#endif +} + +/** + * Initialize one of the DNS servers. + * + * @param numdns the index of the DNS server to set must be < DNS_MAX_SERVERS + * @param dnsserver IP address of the DNS server to set + */ +void +dns_setserver(u8_t numdns, struct ip_addr *dnsserver) +{ + if ((numdns < DNS_MAX_SERVERS) && (dns_pcb != NULL) && + (dnsserver != NULL) && (dnsserver->addr !=0 )) { + dns_servers[numdns] = (*dnsserver); + } +} + +/** + * Obtain one of the currently configured DNS server. + * + * @param numdns the index of the DNS server + * @return IP address of the indexed DNS server or "ip_addr_any" if the DNS + * server has not been configured. + */ +struct ip_addr +dns_getserver(u8_t numdns) +{ + if (numdns < DNS_MAX_SERVERS) { + return dns_servers[numdns]; + } else { + return *IP_ADDR_ANY; + } +} + +/** + * The DNS resolver client timer - handle retries and timeouts and should + * be called every DNS_TMR_INTERVAL milliseconds (every second by default). + */ +void +dns_tmr(void) +{ + if (dns_pcb != NULL) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_tmr: dns_check_entries\n")); + dns_check_entries(); + } +} + +#if DNS_LOCAL_HOSTLIST +static void +dns_init_local() +{ +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC && defined(DNS_LOCAL_HOSTLIST_INIT) + int i; + struct local_hostlist_entry *entry; + /* Dynamic: copy entries from DNS_LOCAL_HOSTLIST_INIT to list */ + struct local_hostlist_entry local_hostlist_init[] = DNS_LOCAL_HOSTLIST_INIT; + for (i = 0; i < sizeof(local_hostlist_init) / sizeof(struct local_hostlist_entry); i++) { + entry = mem_malloc(sizeof(struct local_hostlist_entry)); + LWIP_ASSERT("mem-error in dns_init_local", entry != NULL); + if (entry != NULL) { + struct local_hostlist_entry *init_entry = &local_hostlist_init[i]; + entry->name = init_entry->name; + entry->addr = init_entry->addr; + entry->next = local_hostlist_dynamic; + local_hostlist_dynamic = entry; + } + } +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC && defined(DNS_LOCAL_HOSTLIST_INIT) */ +} + +/** + * Scans the local host-list for a hostname. + * + * @param hostname Hostname to look for in the local host-list + * @return The first IP address for the hostname in the local host-list or + * INADDR_NONE if not found. + */ +static u32_t +dns_lookup_local(const char *hostname) +{ +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC + struct local_hostlist_entry *entry = local_hostlist_dynamic; + while(entry != NULL) { + if(strcmp(entry->name, hostname) == 0) { + return entry->addr; + } + entry = entry->next; + } +#else /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + int i; + for (i = 0; i < sizeof(local_hostlist_static) / sizeof(struct local_hostlist_entry); i++) { + if(strcmp(local_hostlist_static[i].name, hostname) == 0) { + return local_hostlist_static[i].addr; + } + } +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + return INADDR_NONE; +} + +#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC +/** Remove all entries from the local host-list for a specific hostname + * and/or IP addess + * + * @param hostname hostname for which entries shall be removed from the local + * host-list + * @param addr address for which entries shall be removed from the local host-list + * @return the number of removed entries + */ +int +dns_local_removehost(const char *hostname, const struct ip_addr *addr) +{ + int removed = 0; + struct local_hostlist_entry *entry = local_hostlist_dynamic; + struct local_hostlist_entry *last_entry = NULL; + while (entry != NULL) { + if (((hostname == NULL) || !strcmp(entry->name, hostname)) && + ((addr == NULL) || (entry->addr == addr->addr))) { + struct local_hostlist_entry *free_entry; + if (last_entry != NULL) { + last_entry->next = entry->next; + } else { + local_hostlist_dynamic = entry->next; + } + free_entry = entry; + entry = entry->next; + mem_free(free_entry); + removed++; + } else { + last_entry = entry; + entry = entry->next; + } + } + return removed; +} + +/** + * Add a hostname/IP address pair to the local host-list. + * Duplicates are not checked. + * + * @param hostname hostname of the new entry + * @param addr IP address of the new entry + * @return ERR_OK if succeeded or ERR_MEM on memory error + */ +err_t +dns_local_addhost(const char *hostname, const struct ip_addr *addr) +{ + struct local_hostlist_entry *entry; + entry = mem_malloc(sizeof(struct local_hostlist_entry)); + if (entry == NULL) { + return ERR_MEM; + } + entry->name = hostname; + entry->addr = addr->addr; + entry->next = local_hostlist_dynamic; + local_hostlist_dynamic = entry; + return ERR_OK; +} +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC*/ +#endif /* DNS_LOCAL_HOSTLIST */ + +/** + * Look up a hostname in the array of known hostnames. + * + * @note This function only looks in the internal array of known + * hostnames, it does not send out a query for the hostname if none + * was found. The function dns_enqueue() can be used to send a query + * for a hostname. + * + * @param name the hostname to look up + * @return the hostname's IP address, as u32_t (instead of struct ip_addr to + * better check for failure: != INADDR_NONE) or INADDR_NONE if the hostname + * was not found in the cached dns_table. + */ +static u32_t +dns_lookup(const char *name) +{ + u8_t i; +#if DNS_LOCAL_HOSTLIST || defined(DNS_LOOKUP_LOCAL_EXTERN) + u32_t addr; +#endif /* DNS_LOCAL_HOSTLIST || defined(DNS_LOOKUP_LOCAL_EXTERN) */ +#if DNS_LOCAL_HOSTLIST + if ((addr = dns_lookup_local(name)) != INADDR_NONE) { + return addr; + } +#endif /* DNS_LOCAL_HOSTLIST */ +#ifdef DNS_LOOKUP_LOCAL_EXTERN + if((addr = DNS_LOOKUP_LOCAL_EXTERN(name)) != INADDR_NONE) { + return addr; + } +#endif /* DNS_LOOKUP_LOCAL_EXTERN */ + + /* Walk through name list, return entry if found. If not, return NULL. */ + for (i = 0; i < DNS_TABLE_SIZE; ++i) { + if ((dns_table[i].state == DNS_STATE_DONE) && + (strcmp(name, dns_table[i].name) == 0)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_lookup: \"%s\": found = ", name)); + ip_addr_debug_print(DNS_DEBUG, &(dns_table[i].ipaddr)); + LWIP_DEBUGF(DNS_DEBUG, ("\n")); + return dns_table[i].ipaddr.addr; + } + } + + return INADDR_NONE; +} + +#if DNS_DOES_NAME_CHECK +/** + * Compare the "dotted" name "query" with the encoded name "response" + * to make sure an answer from the DNS server matches the current dns_table + * entry (otherwise, answers might arrive late for hostname not on the list + * any more). + * + * @param query hostname (not encoded) from the dns_table + * @param response encoded hostname in the DNS response + * @return 0: names equal; 1: names differ + */ +static u8_t +dns_compare_name(unsigned char *query, unsigned char *response) +{ + unsigned char n; + + do { + n = *response++; + /** @see RFC 1035 - 4.1.4. Message compression */ + if ((n & 0xc0) == 0xc0) { + /* Compressed name */ + break; + } else { + /* Not compressed name */ + while (n > 0) { + if ((*query) != (*response)) { + return 1; + } + ++response; + ++query; + --n; + }; + ++query; + } + } while (*response != 0); + + return 0; +} +#endif /* DNS_DOES_NAME_CHECK */ + +/** + * Walk through a compact encoded DNS name and return the end of the name. + * + * @param query encoded DNS name in the DNS server response + * @return end of the name + */ +static unsigned char * +dns_parse_name(unsigned char *query) +{ + unsigned char n; + + do { + n = *query++; + /** @see RFC 1035 - 4.1.4. Message compression */ + if ((n & 0xc0) == 0xc0) { + /* Compressed name */ + break; + } else { + /* Not compressed name */ + while (n > 0) { + ++query; + --n; + }; + } + } while (*query != 0); + + return query + 1; +} + +/** + * Send a DNS query packet. + * + * @param numdns index of the DNS server in the dns_servers table + * @param name hostname to query + * @param id index of the hostname in dns_table, used as transaction ID in the + * DNS query packet + * @return ERR_OK if packet is sent; an err_t indicating the problem otherwise + */ +static err_t +dns_send(u8_t numdns, const char* name, u8_t id) +{ + err_t err; + struct dns_hdr *hdr; + struct dns_query qry; + struct pbuf *p; + char *query, *nptr; + const char *pHostname; + u8_t n; + + LWIP_DEBUGF(DNS_DEBUG, ("dns_send: dns_servers[%"U16_F"] \"%s\": request\n", + (u16_t)(numdns), name)); + LWIP_ASSERT("dns server out of array", numdns < DNS_MAX_SERVERS); + LWIP_ASSERT("dns server has no IP address set", dns_servers[numdns].addr != 0); + + /* if here, we have either a new query or a retry on a previous query to process */ + p = pbuf_alloc(PBUF_TRANSPORT, SIZEOF_DNS_HDR + DNS_MAX_NAME_LENGTH + + SIZEOF_DNS_QUERY, PBUF_RAM); + if (p != NULL) { + LWIP_ASSERT("pbuf must be in one piece", p->next == NULL); + /* fill dns header */ + hdr = (struct dns_hdr*)p->payload; + memset(hdr, 0, SIZEOF_DNS_HDR); + hdr->id = htons(id); + hdr->flags1 = DNS_FLAG1_RD; + hdr->numquestions = htons(1); + query = (char*)hdr + SIZEOF_DNS_HDR; + pHostname = name; + --pHostname; + + /* convert hostname into suitable query format. */ + do { + ++pHostname; + nptr = query; + ++query; + for(n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) { + *query = *pHostname; + ++query; + ++n; + } + *nptr = n; + } while(*pHostname != 0); + *query++='\0'; + + /* fill dns query */ + qry.type = htons(DNS_RRTYPE_A); + qry.class = htons(DNS_RRCLASS_IN); + MEMCPY( query, &qry, SIZEOF_DNS_QUERY); + + /* resize pbuf to the exact dns query */ + pbuf_realloc(p, (query + SIZEOF_DNS_QUERY) - ((char*)(p->payload))); + + /* connect to the server for faster receiving */ + udp_connect(dns_pcb, &dns_servers[numdns], DNS_SERVER_PORT); + /* send dns packet */ + err = udp_sendto(dns_pcb, p, &dns_servers[numdns], DNS_SERVER_PORT); + + /* free pbuf */ + pbuf_free(p); + } else { + err = ERR_MEM; + } + + return err; +} + +/** + * dns_check_entry() - see if pEntry has not yet been queried and, if so, sends out a query. + * Check an entry in the dns_table: + * - send out query for new entries + * - retry old pending entries on timeout (also with different servers) + * - remove completed entries from the table if their TTL has expired + * + * @param i index of the dns_table entry to check + */ +static void +dns_check_entry(u8_t i) +{ + struct dns_table_entry *pEntry = &dns_table[i]; + + LWIP_ASSERT("array index out of bounds", i < DNS_TABLE_SIZE); + + switch(pEntry->state) { + + case DNS_STATE_NEW: { + /* initialize new entry */ + pEntry->state = DNS_STATE_ASKING; + pEntry->numdns = 0; + pEntry->tmr = 1; + pEntry->retries = 0; + + /* send DNS packet for this entry */ + dns_send(pEntry->numdns, pEntry->name, i); + break; + } + + case DNS_STATE_ASKING: { + if (--pEntry->tmr == 0) { + if (++pEntry->retries == DNS_MAX_RETRIES) { + if ((pEntry->numdns+1numdns+1].addr!=0)) { + /* change of server */ + pEntry->numdns++; + pEntry->tmr = 1; + pEntry->retries = 0; + break; + } else { + LWIP_DEBUGF(DNS_DEBUG, ("dns_check_entry: \"%s\": timeout\n", pEntry->name)); + /* call specified callback function if provided */ + if (pEntry->found) + (*pEntry->found)(pEntry->name, NULL, pEntry->arg); + /* flush this entry */ + pEntry->state = DNS_STATE_UNUSED; + pEntry->found = NULL; + break; + } + } + + /* wait longer for the next retry */ + pEntry->tmr = pEntry->retries; + + /* send DNS packet for this entry */ + dns_send(pEntry->numdns, pEntry->name, i); + } + break; + } + + case DNS_STATE_DONE: { + /* if the time to live is nul */ + if (--pEntry->ttl == 0) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_check_entry: \"%s\": flush\n", pEntry->name)); + /* flush this entry */ + pEntry->state = DNS_STATE_UNUSED; + pEntry->found = NULL; + } + break; + } + case DNS_STATE_UNUSED: + /* nothing to do */ + break; + default: + LWIP_ASSERT("unknown dns_table entry state:", 0); + break; + } +} + +/** + * Call dns_check_entry for each entry in dns_table - check all entries. + */ +static void +dns_check_entries(void) +{ + u8_t i; + + for (i = 0; i < DNS_TABLE_SIZE; ++i) { + dns_check_entry(i); + } +} + +/** + * Receive input function for DNS response packets arriving for the dns UDP pcb. + * + * @params see udp.h + */ +static void +dns_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port) +{ + u8_t i; + char *pHostname; + struct dns_hdr *hdr; + struct dns_answer ans; + struct dns_table_entry *pEntry; + u8_t nquestions, nanswers; +#if (DNS_USES_STATIC_BUF == 0) + u8_t dns_payload[DNS_MSG_SIZE]; +#endif /* (DNS_USES_STATIC_BUF == 0) */ +#if (DNS_USES_STATIC_BUF == 2) + u8_t* dns_payload; +#endif /* (DNS_USES_STATIC_BUF == 2) */ + + LWIP_UNUSED_ARG(arg); + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(addr); + LWIP_UNUSED_ARG(port); + + /* is the dns message too big ? */ + if (p->tot_len > DNS_MSG_SIZE) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too big\n")); + /* free pbuf and return */ + goto memerr1; + } + + /* is the dns message big enough ? */ + if (p->tot_len < (SIZEOF_DNS_HDR + SIZEOF_DNS_QUERY + SIZEOF_DNS_ANSWER)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too small\n")); + /* free pbuf and return */ + goto memerr1; + } + +#if (DNS_USES_STATIC_BUF == 2) + dns_payload = mem_malloc(p->tot_len); + if (dns_payload == NULL) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: mem_malloc error\n")); + /* free pbuf and return */ + goto memerr1; + } +#endif /* (DNS_USES_STATIC_BUF == 2) */ + + /* copy dns payload inside static buffer for processing */ + if (pbuf_copy_partial(p, dns_payload, p->tot_len, 0) == p->tot_len) { + /* The ID in the DNS header should be our entry into the name table. */ + hdr = (struct dns_hdr*)dns_payload; + i = htons(hdr->id); + if (i < DNS_TABLE_SIZE) { + pEntry = &dns_table[i]; + if(pEntry->state == DNS_STATE_ASKING) { + /* This entry is now completed. */ + pEntry->state = DNS_STATE_DONE; + pEntry->err = hdr->flags2 & DNS_FLAG2_ERR_MASK; + + /* We only care about the question(s) and the answers. The authrr + and the extrarr are simply discarded. */ + nquestions = htons(hdr->numquestions); + nanswers = htons(hdr->numanswers); + + /* Check for error. If so, call callback to inform. */ + if (((hdr->flags1 & DNS_FLAG1_RESPONSE) == 0) || (pEntry->err != 0) || (nquestions != 1)) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": error in flags\n", pEntry->name)); + /* call callback to indicate error, clean up memory and return */ + goto responseerr; + } + +#if DNS_DOES_NAME_CHECK + /* Check if the name in the "question" part match with the name in the entry. */ + if (dns_compare_name((unsigned char *)(pEntry->name), (unsigned char *)dns_payload + SIZEOF_DNS_HDR) != 0) { + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": response not match to query\n", pEntry->name)); + /* call callback to indicate error, clean up memory and return */ + goto responseerr; + } +#endif /* DNS_DOES_NAME_CHECK */ + + /* Skip the name in the "question" part */ + pHostname = (char *) dns_parse_name((unsigned char *)dns_payload + SIZEOF_DNS_HDR) + SIZEOF_DNS_QUERY; + + while(nanswers > 0) { + /* skip answer resource record's host name */ + pHostname = (char *) dns_parse_name((unsigned char *)pHostname); + + /* Check for IP address type and Internet class. Others are discarded. */ + MEMCPY(&ans, pHostname, SIZEOF_DNS_ANSWER); + if((ntohs(ans.type) == DNS_RRTYPE_A) && (ntohs(ans.class) == DNS_RRCLASS_IN) && (ntohs(ans.len) == sizeof(struct ip_addr)) ) { + /* read the answer resource record's TTL, and maximize it if needed */ + pEntry->ttl = ntohl(ans.ttl); + if (pEntry->ttl > DNS_MAX_TTL) { + pEntry->ttl = DNS_MAX_TTL; + } + /* read the IP address after answer resource record's header */ + MEMCPY( &(pEntry->ipaddr), (pHostname+SIZEOF_DNS_ANSWER), sizeof(struct ip_addr)); + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": response = ", pEntry->name)); + ip_addr_debug_print(DNS_DEBUG, (&(pEntry->ipaddr))); + LWIP_DEBUGF(DNS_DEBUG, ("\n")); + /* call specified callback function if provided */ + if (pEntry->found) { + (*pEntry->found)(pEntry->name, &pEntry->ipaddr, pEntry->arg); + } + /* deallocate memory and return */ + goto memerr2; + } else { + pHostname = pHostname + SIZEOF_DNS_ANSWER + htons(ans.len); + } + --nanswers; + } + LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": error in response\n", pEntry->name)); + /* call callback to indicate error, clean up memory and return */ + goto responseerr; + } + } + } + + /* deallocate memory and return */ + goto memerr2; + +responseerr: + /* ERROR: call specified callback function with NULL as name to indicate an error */ + if (pEntry->found) { + (*pEntry->found)(pEntry->name, NULL, pEntry->arg); + } + /* flush this entry */ + pEntry->state = DNS_STATE_UNUSED; + pEntry->found = NULL; + +memerr2: +#if (DNS_USES_STATIC_BUF == 2) + /* free dns buffer */ + mem_free(dns_payload); +#endif /* (DNS_USES_STATIC_BUF == 2) */ + +memerr1: + /* free pbuf */ + pbuf_free(p); + return; +} + +/** + * Queues a new hostname to resolve and sends out a DNS query for that hostname + * + * @param name the hostname that is to be queried + * @param found a callback founction to be called on success, failure or timeout + * @param callback_arg argument to pass to the callback function + * @return @return a err_t return code. + */ +static err_t +dns_enqueue(const char *name, dns_found_callback found, void *callback_arg) +{ + u8_t i; + u8_t lseq, lseqi; + struct dns_table_entry *pEntry = NULL; + + /* search an unused entry, or the oldest one */ + lseq = lseqi = 0; + for (i = 0; i < DNS_TABLE_SIZE; ++i) { + pEntry = &dns_table[i]; + /* is it an unused entry ? */ + if (pEntry->state == DNS_STATE_UNUSED) + break; + + /* check if this is the oldest completed entry */ + if (pEntry->state == DNS_STATE_DONE) { + if ((dns_seqno - pEntry->seqno) > lseq) { + lseq = dns_seqno - pEntry->seqno; + lseqi = i; + } + } + } + + /* if we don't have found an unused entry, use the oldest completed one */ + if (i == DNS_TABLE_SIZE) { + if ((lseqi >= DNS_TABLE_SIZE) || (dns_table[lseqi].state != DNS_STATE_DONE)) { + /* no entry can't be used now, table is full */ + LWIP_DEBUGF(DNS_DEBUG, ("dns_enqueue: \"%s\": DNS entries table is full\n", name)); + return ERR_MEM; + } else { + /* use the oldest completed one */ + i = lseqi; + pEntry = &dns_table[i]; + } + } + + /* use this entry */ + LWIP_DEBUGF(DNS_DEBUG, ("dns_enqueue: \"%s\": use DNS entry %"U16_F"\n", name, (u16_t)(i))); + + /* fill the entry */ + pEntry->state = DNS_STATE_NEW; + pEntry->seqno = dns_seqno++; + pEntry->found = found; + pEntry->arg = callback_arg; + strcpy(pEntry->name, name); + + /* force to send query without waiting timer */ + dns_check_entry(i); + + /* dns query is enqueued */ + return ERR_INPROGRESS; +} + +/** + * Resolve a hostname (string) into an IP address. + * NON-BLOCKING callback version for use with raw API!!! + * + * Returns immediately with one of err_t return codes: + * - ERR_OK if hostname is a valid IP address string or the host + * name is already in the local names table. + * - ERR_INPROGRESS enqueue a request to be sent to the DNS server + * for resolution if no errors are present. + * + * @param hostname the hostname that is to be queried + * @param addr pointer to a struct ip_addr where to store the address if it is already + * cached in the dns_table (only valid if ERR_OK is returned!) + * @param found a callback function to be called on success, failure or timeout (only if + * ERR_INPROGRESS is returned!) + * @param callback_arg argument to pass to the callback function + * @return a err_t return code. + */ +err_t +dns_gethostbyname(const char *hostname, struct ip_addr *addr, dns_found_callback found, + void *callback_arg) +{ + /* not initialized or no valid server yet, or invalid addr pointer + * or invalid hostname or invalid hostname length */ + if ((dns_pcb == NULL) || (addr == NULL) || + (!hostname) || (!hostname[0]) || + (strlen(hostname) >= DNS_MAX_NAME_LENGTH)) { + return ERR_VAL; + } + +#if LWIP_HAVE_LOOPIF + if (strcmp(hostname,"localhost")==0) { + addr->addr = htonl(INADDR_LOOPBACK); + return ERR_OK; + } +#endif /* LWIP_HAVE_LOOPIF */ + + /* host name already in octet notation? set ip addr and return ERR_OK + * already have this address cached? */ + if (((addr->addr = inet_addr(hostname)) != INADDR_NONE) || + ((addr->addr = dns_lookup(hostname)) != INADDR_NONE)) { + return ERR_OK; + } + + /* queue query with specified callback */ + return dns_enqueue(hostname, found, callback_arg); +} + +#endif /* LWIP_DNS */ diff --git a/bertos/net/lwip/src/core/init.c b/bertos/net/lwip/src/core/init.c new file mode 100644 index 0000000..be0e358 --- /dev/null +++ b/bertos/net/lwip/src/core/init.c @@ -0,0 +1,274 @@ +/** + * @file + * Modules initialization + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/init.h" +#include "lwip/stats.h" +#include "lwip/sys.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/netif.h" +#include "lwip/sockets.h" +#include "lwip/ip.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" +#include "lwip/snmp_msg.h" +#include "lwip/autoip.h" +#include "lwip/igmp.h" +#include "lwip/dns.h" +#include "netif/etharp.h" + +/* Compile-time sanity checks for configuration errors. + * These can be done independently of LWIP_DEBUG, without penalty. + */ +#ifndef BYTE_ORDER + #error "BYTE_ORDER is not defined, you have to define it in your cc.h" +#endif +#if (!IP_SOF_BROADCAST && IP_SOF_BROADCAST_RECV) + #error "If you want to use broadcast filter per pcb on recv operations, you have to define IP_SOF_BROADCAST=1 in your lwipopts.h" +#endif +#if (!LWIP_ARP && ARP_QUEUEING) + #error "If you want to use ARP Queueing, you have to define LWIP_ARP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_UDPLITE) + #error "If you want to use UDP Lite, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_SNMP) + #error "If you want to use SNMP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_DHCP) + #error "If you want to use DHCP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_IGMP) + #error "If you want to use IGMP, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (!LWIP_UDP && LWIP_DNS) + #error "If you want to use DNS, you have to define LWIP_UDP=1 in your lwipopts.h" +#endif +#if (LWIP_ARP && (ARP_TABLE_SIZE > 0x7f)) + #error "If you want to use ARP, ARP_TABLE_SIZE must fit in an s8_t, so, you have to reduce it in your lwipopts.h" +#endif +#if (LWIP_ARP && ARP_QUEUEING && (MEMP_NUM_ARP_QUEUE<=0)) + #error "If you want to use ARP Queueing, you have to define MEMP_NUM_ARP_QUEUE>=1 in your lwipopts.h" +#endif +#if (LWIP_RAW && (MEMP_NUM_RAW_PCB<=0)) + #error "If you want to use RAW, you have to define MEMP_NUM_RAW_PCB>=1 in your lwipopts.h" +#endif +#if (LWIP_UDP && (MEMP_NUM_UDP_PCB<=0)) + #error "If you want to use UDP, you have to define MEMP_NUM_UDP_PCB>=1 in your lwipopts.h" +#endif +#if (LWIP_TCP && (MEMP_NUM_TCP_PCB<=0)) + #error "If you want to use TCP, you have to define MEMP_NUM_TCP_PCB>=1 in your lwipopts.h" +#endif +#if (LWIP_TCP && (TCP_WND > 0xffff)) + #error "If you want to use TCP, TCP_WND must fit in an u16_t, so, you have to reduce it in your lwipopts.h" +#endif +#if (LWIP_TCP && (TCP_SND_QUEUELEN > 0xffff)) + #error "If you want to use TCP, TCP_SND_QUEUELEN must fit in an u16_t, so, you have to reduce it in your lwipopts.h" +#endif +#if (LWIP_TCP && ((TCP_MAXRTX > 12) || (TCP_SYNMAXRTX > 12))) + #error "If you want to use TCP, TCP_MAXRTX and TCP_SYNMAXRTX must less or equal to 12 (due to tcp_backoff table), so, you have to reduce them in your lwipopts.h" +#endif +#if (LWIP_TCP && TCP_LISTEN_BACKLOG && (TCP_DEFAULT_LISTEN_BACKLOG < 0) || (TCP_DEFAULT_LISTEN_BACKLOG > 0xff)) + #error "If you want to use TCP backlog, TCP_DEFAULT_LISTEN_BACKLOG must fit into an u8_t" +#endif +#if (LWIP_IGMP && (MEMP_NUM_IGMP_GROUP<=1)) + #error "If you want to use IGMP, you have to define MEMP_NUM_IGMP_GROUP>1 in your lwipopts.h" +#endif +#if (PPP_SUPPORT && (NO_SYS==1)) + #error "If you want to use PPP, you have to define NO_SYS=0 in your lwipopts.h" +#endif +#if (LWIP_NETIF_API && (NO_SYS==1)) + #error "If you want to use NETIF API, you have to define NO_SYS=0 in your lwipopts.h" +#endif +#if ((LWIP_SOCKET || LWIP_NETCONN) && (NO_SYS==1)) + #error "If you want to use Sequential API, you have to define NO_SYS=0 in your lwipopts.h" +#endif +#if ((LWIP_NETCONN || LWIP_SOCKET) && (MEMP_NUM_TCPIP_MSG_API<=0)) + #error "If you want to use Sequential API, you have to define MEMP_NUM_TCPIP_MSG_API>=1 in your lwipopts.h" +#endif +#if (!LWIP_NETCONN && LWIP_SOCKET) + #error "If you want to use Socket API, you have to define LWIP_NETCONN=1 in your lwipopts.h" +#endif +#if (((!LWIP_DHCP) || (!LWIP_AUTOIP)) && LWIP_DHCP_AUTOIP_COOP) + #error "If you want to use DHCP/AUTOIP cooperation mode, you have to define LWIP_DHCP=1 and LWIP_AUTOIP=1 in your lwipopts.h" +#endif +#if (((!LWIP_DHCP) || (!LWIP_ARP)) && DHCP_DOES_ARP_CHECK) + #error "If you want to use DHCP ARP checking, you have to define LWIP_DHCP=1 and LWIP_ARP=1 in your lwipopts.h" +#endif +#if (!LWIP_ARP && LWIP_AUTOIP) + #error "If you want to use AUTOIP, you have to define LWIP_ARP=1 in your lwipopts.h" +#endif +#if (LWIP_SNMP && (SNMP_CONCURRENT_REQUESTS<=0)) + #error "If you want to use SNMP, you have to define SNMP_CONCURRENT_REQUESTS>=1 in your lwipopts.h" +#endif +#if (LWIP_SNMP && (SNMP_TRAP_DESTINATIONS<=0)) + #error "If you want to use SNMP, you have to define SNMP_TRAP_DESTINATIONS>=1 in your lwipopts.h" +#endif +#if (LWIP_TCP && ((LWIP_EVENT_API && LWIP_CALLBACK_API) || (!LWIP_EVENT_API && !LWIP_CALLBACK_API))) + #error "One and exactly one of LWIP_EVENT_API and LWIP_CALLBACK_API has to be enabled in your lwipopts.h" +#endif +/* There must be sufficient timeouts, taking into account requirements of the subsystems. */ +#if ((NO_SYS==0) && (MEMP_NUM_SYS_TIMEOUT < (LWIP_TCP + IP_REASSEMBLY + LWIP_ARP + (2*LWIP_DHCP) + LWIP_AUTOIP + LWIP_IGMP + LWIP_DNS + PPP_SUPPORT))) + #error "MEMP_NUM_SYS_TIMEOUT is too low to accomodate all required timeouts" +#endif +#if (IP_REASSEMBLY && (MEMP_NUM_REASSDATA > IP_REASS_MAX_PBUFS)) + #error "MEMP_NUM_REASSDATA > IP_REASS_MAX_PBUFS doesn't make sense since each struct ip_reassdata must hold 2 pbufs at least!" +#endif +#if (MEM_LIBC_MALLOC && MEM_USE_POOLS) + #error "MEM_LIBC_MALLOC and MEM_USE_POOLS may not both be simultaneously enabled in your lwipopts.h" +#endif +#if (MEM_USE_POOLS && !MEMP_USE_CUSTOM_POOLS) + #error "MEM_USE_POOLS requires custom pools (MEMP_USE_CUSTOM_POOLS) to be enabled in your lwipopts.h" +#endif +#if (PBUF_POOL_BUFSIZE <= MEM_ALIGNMENT) + #error "PBUF_POOL_BUFSIZE must be greater than MEM_ALIGNMENT or the offset may take the full first pbuf" +#endif +#if (TCP_QUEUE_OOSEQ && !LWIP_TCP) + #error "TCP_QUEUE_OOSEQ requires LWIP_TCP" +#endif +#if (DNS_LOCAL_HOSTLIST && !DNS_LOCAL_HOSTLIST_IS_DYNAMIC && !(defined(DNS_LOCAL_HOSTLIST_INIT))) + #error "you have to define define DNS_LOCAL_HOSTLIST_INIT {{'host1', 0x123}, {'host2', 0x234}} to initialize DNS_LOCAL_HOSTLIST" +#endif +#if PPP_SUPPORT && !PPPOS_SUPPORT & !PPPOE_SUPPORT + #error "PPP_SUPPORT needs either PPPOS_SUPPORT or PPPOE_SUPPORT turned on" +#endif + + +/* Compile-time checks for deprecated options. + */ +#ifdef MEMP_NUM_TCPIP_MSG + #error "MEMP_NUM_TCPIP_MSG option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef MEMP_NUM_API_MSG + #error "MEMP_NUM_API_MSG option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef TCP_REXMIT_DEBUG + #error "TCP_REXMIT_DEBUG option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef RAW_STATS + #error "RAW_STATS option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef ETHARP_QUEUE_FIRST + #error "ETHARP_QUEUE_FIRST option is deprecated. Remove it from your lwipopts.h." +#endif +#ifdef ETHARP_ALWAYS_INSERT + #error "ETHARP_ALWAYS_INSERT option is deprecated. Remove it from your lwipopts.h." +#endif +#if SO_REUSE +/* I removed the lot since this was an ugly hack. It broke the raw-API. + It also came with many ugly goto's, Christiaan Simons. */ + #error "SO_REUSE currently unavailable, this was a hack" +#endif + +#ifdef LWIP_DEBUG +static void +lwip_sanity_check(void) +{ + /* Warnings */ +#if LWIP_NETCONN + if (MEMP_NUM_NETCONN > (MEMP_NUM_TCP_PCB+MEMP_NUM_TCP_PCB_LISTEN+MEMP_NUM_UDP_PCB+MEMP_NUM_RAW_PCB)) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: MEMP_NUM_NETCONN should be less than the sum of MEMP_NUM_{TCP,RAW,UDP}_PCB+MEMP_NUM_TCP_PCB_LISTEN\n")); +#endif /* LWIP_NETCONN */ +#if LWIP_TCP + if (MEMP_NUM_TCP_SEG < TCP_SND_QUEUELEN) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: MEMP_NUM_TCP_SEG should be at least as big as TCP_SND_QUEUELEN\n")); + if (TCP_SND_BUF < 2 * TCP_MSS) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SND_BUF must be at least as much as (2 * TCP_MSS) for things to work smoothly\n")); + if (TCP_SND_QUEUELEN < (2 * (TCP_SND_BUF/TCP_MSS))) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SND_QUEUELEN must be at least as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work\n")); + if (TCP_SNDLOWAT > TCP_SND_BUF) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SNDLOWAT must be less than or equal to TCP_SND_BUF.\n")); + if (TCP_WND > (PBUF_POOL_SIZE*PBUF_POOL_BUFSIZE)) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_WND is larger than space provided by PBUF_POOL_SIZE*PBUF_POOL_BUFSIZE\n")); + if (TCP_WND < TCP_MSS) + LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_WND is smaller than MSS\n")); +#endif /* LWIP_TCP */ +} +#else /* LWIP_DEBUG */ +#define lwip_sanity_check() +#endif /* LWIP_DEBUG */ + +/** + * Perform Sanity check of user-configurable values, and initialize all modules. + */ +void +lwip_init(void) +{ + /* Sanity check user-configurable values */ + lwip_sanity_check(); + + /* Modules initialization */ + stats_init(); + sys_init(); + mem_init(); + memp_init(); + pbuf_init(); + netif_init(); +#if LWIP_SOCKET + lwip_socket_init(); +#endif /* LWIP_SOCKET */ + ip_init(); +#if LWIP_ARP + etharp_init(); +#endif /* LWIP_ARP */ +#if LWIP_RAW + raw_init(); +#endif /* LWIP_RAW */ +#if LWIP_UDP + udp_init(); +#endif /* LWIP_UDP */ +#if LWIP_TCP + tcp_init(); +#endif /* LWIP_TCP */ +#if LWIP_SNMP + snmp_init(); +#endif /* LWIP_SNMP */ +#if LWIP_AUTOIP + autoip_init(); +#endif /* LWIP_AUTOIP */ +#if LWIP_IGMP + igmp_init(); +#endif /* LWIP_IGMP */ +#if LWIP_DNS + dns_init(); +#endif /* LWIP_DNS */ +} diff --git a/bertos/net/lwip/src/core/ipv4/autoip.c b/bertos/net/lwip/src/core/ipv4/autoip.c new file mode 100644 index 0000000..7aa7cea --- /dev/null +++ b/bertos/net/lwip/src/core/ipv4/autoip.c @@ -0,0 +1,497 @@ +/** + * @file + * AutoIP Automatic LinkLocal IP Configuration + * + */ + +/* + * + * Copyright (c) 2007 Dominik Spies + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Dominik Spies + * + * This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform + * with RFC 3927. + * + * + * Please coordinate changes and requests with Dominik Spies + * + */ + +/******************************************************************************* + * USAGE: + * + * define LWIP_AUTOIP 1 in your lwipopts.h + * + * If you don't use tcpip.c (so, don't call, you don't call tcpip_init): + * - First, call autoip_init(). + * - call autoip_tmr() all AUTOIP_TMR_INTERVAL msces, + * that should be defined in autoip.h. + * I recommend a value of 100. The value must divide 1000 with a remainder almost 0. + * Possible values are 1000, 500, 333, 250, 200, 166, 142, 125, 111, 100 .... + * + * Without DHCP: + * - Call autoip_start() after netif_add(). + * + * With DHCP: + * - define LWIP_DHCP_AUTOIP_COOP 1 in your lwipopts.h. + * - Configure your DHCP Client. + * + */ + +#include "lwip/opt.h" + +#if LWIP_AUTOIP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/mem.h" +#include "lwip/udp.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/autoip.h" +#include "netif/etharp.h" + +#include +#include + +/* 169.254.0.0 */ +#define AUTOIP_NET 0xA9FE0000 +/* 169.254.1.0 */ +#define AUTOIP_RANGE_START (AUTOIP_NET | 0x0100) +/* 169.254.254.255 */ +#define AUTOIP_RANGE_END (AUTOIP_NET | 0xFEFF) + + +/** Pseudo random macro based on netif informations. + * You could use "rand()" from the C Library if you define LWIP_AUTOIP_RAND in lwipopts.h */ +#ifndef LWIP_AUTOIP_RAND +#define LWIP_AUTOIP_RAND(netif) ( (((u32_t)((netif->hwaddr[5]) & 0xff) << 24) | \ + ((u32_t)((netif->hwaddr[3]) & 0xff) << 16) | \ + ((u32_t)((netif->hwaddr[2]) & 0xff) << 8) | \ + ((u32_t)((netif->hwaddr[4]) & 0xff))) + \ + (netif->autoip?netif->autoip->tried_llipaddr:0)) +#endif /* LWIP_AUTOIP_RAND */ + +/** + * Macro that generates the initial IP address to be tried by AUTOIP. + * If you want to override this, define it to something else in lwipopts.h. + */ +#ifndef LWIP_AUTOIP_CREATE_SEED_ADDR +#define LWIP_AUTOIP_CREATE_SEED_ADDR(netif) \ + htonl(AUTOIP_RANGE_START + ((u32_t)(((u8_t)(netif->hwaddr[4])) | \ + ((u32_t)((u8_t)(netif->hwaddr[5]))) << 8))) +#endif /* LWIP_AUTOIP_CREATE_SEED_ADDR */ + +/* static functions */ +static void autoip_handle_arp_conflict(struct netif *netif); + +/* creates a pseudo random LL IP-Address for a network interface */ +static void autoip_create_addr(struct netif *netif, struct ip_addr *ipaddr); + +/* sends an ARP probe */ +static err_t autoip_arp_probe(struct netif *netif); + +/* sends an ARP announce */ +static err_t autoip_arp_announce(struct netif *netif); + +/* configure interface for use with current LL IP-Address */ +static err_t autoip_bind(struct netif *netif); + +/* start sending probes for llipaddr */ +static void autoip_start_probing(struct netif *netif); + +/** + * Initialize this module + */ +void +autoip_init(void) +{ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_init()\n")); +} + +/** + * Handle a IP address conflict after an ARP conflict detection + */ +static void +autoip_handle_arp_conflict(struct netif *netif) +{ + /* Somehow detect if we are defending or retreating */ + unsigned char defend = 1; /* tbd */ + + if(defend) { + if(netif->autoip->lastconflict > 0) { + /* retreat, there was a conflicting ARP in the last + * DEFEND_INTERVAL seconds + */ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_handle_arp_conflict(): we are defending, but in DEFEND_INTERVAL, retreating\n")); + + /* TODO: close all TCP sessions */ + autoip_start(netif); + } else { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_handle_arp_conflict(): we are defend, send ARP Announce\n")); + autoip_arp_announce(netif); + netif->autoip->lastconflict = DEFEND_INTERVAL * AUTOIP_TICKS_PER_SECOND; + } + } else { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_handle_arp_conflict(): we do not defend, retreating\n")); + /* TODO: close all TCP sessions */ + autoip_start(netif); + } +} + +/** + * Create an IP-Address out of range 169.254.1.0 to 169.254.254.255 + * + * @param netif network interface on which create the IP-Address + * @param ipaddr ip address to initialize + */ +static void +autoip_create_addr(struct netif *netif, struct ip_addr *ipaddr) +{ + /* Here we create an IP-Address out of range 169.254.1.0 to 169.254.254.255 + * compliant to RFC 3927 Section 2.1 + * We have 254 * 256 possibilities */ + + u32_t addr = ntohl(LWIP_AUTOIP_CREATE_SEED_ADDR(netif)); + addr += netif->autoip->tried_llipaddr; + addr = AUTOIP_NET | (addr & 0xffff); + /* Now, 169.254.0.0 <= addr <= 169.254.255.255 */ + + if (addr < AUTOIP_RANGE_START) { + addr += AUTOIP_RANGE_END - AUTOIP_RANGE_START + 1; + } + if (addr > AUTOIP_RANGE_END) { + addr -= AUTOIP_RANGE_END - AUTOIP_RANGE_START + 1; + } + LWIP_ASSERT("AUTOIP address not in range", (addr >= AUTOIP_RANGE_START) && + (addr <= AUTOIP_RANGE_END)); + ipaddr->addr = htonl(addr); + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_create_addr(): tried_llipaddr=%"U16_F", 0x%08"X32_F"\n", + (u16_t)(netif->autoip->tried_llipaddr), (u32_t)(ipaddr->addr))); +} + +/** + * Sends an ARP probe from a network interface + * + * @param netif network interface used to send the probe + */ +static err_t +autoip_arp_probe(struct netif *netif) +{ + return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, ðbroadcast, + (struct eth_addr *)netif->hwaddr, IP_ADDR_ANY, ðzero, + &netif->autoip->llipaddr, ARP_REQUEST); +} + +/** + * Sends an ARP announce from a network interface + * + * @param netif network interface used to send the announce + */ +static err_t +autoip_arp_announce(struct netif *netif) +{ + return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, ðbroadcast, + (struct eth_addr *)netif->hwaddr, &netif->autoip->llipaddr, ðzero, + &netif->autoip->llipaddr, ARP_REQUEST); +} + +/** + * Configure interface for use with current LL IP-Address + * + * @param netif network interface to configure with current LL IP-Address + */ +static err_t +autoip_bind(struct netif *netif) +{ + struct autoip *autoip = netif->autoip; + struct ip_addr sn_mask, gw_addr; + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_bind(netif=%p) %c%c%"U16_F" 0x%08"X32_F"\n", + (void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num, autoip->llipaddr.addr)); + + IP4_ADDR(&sn_mask, 255, 255, 0, 0); + IP4_ADDR(&gw_addr, 0, 0, 0, 0); + + netif_set_ipaddr(netif, &autoip->llipaddr); + netif_set_netmask(netif, &sn_mask); + netif_set_gw(netif, &gw_addr); + + /* bring the interface up */ + netif_set_up(netif); + + return ERR_OK; +} + +/** + * Start AutoIP client + * + * @param netif network interface on which start the AutoIP client + */ +err_t +autoip_start(struct netif *netif) +{ + struct autoip *autoip = netif->autoip; + err_t result = ERR_OK; + + if(netif_is_up(netif)) { + netif_set_down(netif); + } + + /* Set IP-Address, Netmask and Gateway to 0 to make sure that + * ARP Packets are formed correctly + */ + netif->ip_addr.addr = 0; + netif->netmask.addr = 0; + netif->gw.addr = 0; + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("autoip_start(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0], + netif->name[1], (u16_t)netif->num)); + if(autoip == NULL) { + /* no AutoIP client attached yet? */ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_start(): starting new AUTOIP client\n")); + autoip = mem_malloc(sizeof(struct autoip)); + if(autoip == NULL) { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_start(): could not allocate autoip\n")); + return ERR_MEM; + } + memset( autoip, 0, sizeof(struct autoip)); + /* store this AutoIP client in the netif */ + netif->autoip = autoip; + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_start(): allocated autoip")); + } else { + autoip->state = AUTOIP_STATE_OFF; + autoip->ttw = 0; + autoip->sent_num = 0; + memset(&autoip->llipaddr, 0, sizeof(struct ip_addr)); + autoip->lastconflict = 0; + } + + autoip_create_addr(netif, &(autoip->llipaddr)); + autoip->tried_llipaddr++; + autoip_start_probing(netif); + + return result; +} + +static void +autoip_start_probing(struct netif *netif) +{ + struct autoip *autoip = netif->autoip; + + autoip->state = AUTOIP_STATE_PROBING; + autoip->sent_num = 0; + + /* time to wait to first probe, this is randomly + * choosen out of 0 to PROBE_WAIT seconds. + * compliant to RFC 3927 Section 2.2.1 + */ + autoip->ttw = (u16_t)(LWIP_AUTOIP_RAND(netif) % (PROBE_WAIT * AUTOIP_TICKS_PER_SECOND)); + + /* + * if we tried more then MAX_CONFLICTS we must limit our rate for + * accquiring and probing address + * compliant to RFC 3927 Section 2.2.1 + */ + if(autoip->tried_llipaddr > MAX_CONFLICTS) { + autoip->ttw = RATE_LIMIT_INTERVAL * AUTOIP_TICKS_PER_SECOND; + } +} + +/** + * Handle a possible change in the network configuration. + * + * If there is an AutoIP address configured, take the interface down + * and begin probing with the same address. + */ +void +autoip_network_changed(struct netif *netif) +{ + if (netif->autoip && netif->autoip->state != AUTOIP_STATE_OFF) { + netif_set_down(netif); + autoip_start_probing(netif); + } +} + +/** + * Stop AutoIP client + * + * @param netif network interface on which stop the AutoIP client + */ +err_t +autoip_stop(struct netif *netif) +{ + netif->autoip->state = AUTOIP_STATE_OFF; + netif_set_down(netif); + return ERR_OK; +} + +/** + * Has to be called in loop every AUTOIP_TMR_INTERVAL milliseconds + */ +void +autoip_tmr() +{ + struct netif *netif = netif_list; + /* loop through netif's */ + while (netif != NULL) { + /* only act on AutoIP configured interfaces */ + if (netif->autoip != NULL) { + if(netif->autoip->lastconflict > 0) { + netif->autoip->lastconflict--; + } + + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_tmr() AutoIP-State: %"U16_F", ttw=%"U16_F"\n", + (u16_t)(netif->autoip->state), netif->autoip->ttw)); + + switch(netif->autoip->state) { + case AUTOIP_STATE_PROBING: + if(netif->autoip->ttw > 0) { + netif->autoip->ttw--; + } else { + if(netif->autoip->sent_num >= PROBE_NUM) { + netif->autoip->state = AUTOIP_STATE_ANNOUNCING; + netif->autoip->sent_num = 0; + netif->autoip->ttw = ANNOUNCE_WAIT * AUTOIP_TICKS_PER_SECOND; + } else { + autoip_arp_probe(netif); + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_tmr() PROBING Sent Probe\n")); + netif->autoip->sent_num++; + /* calculate time to wait to next probe */ + netif->autoip->ttw = (u16_t)((LWIP_AUTOIP_RAND(netif) % + ((PROBE_MAX - PROBE_MIN) * AUTOIP_TICKS_PER_SECOND) ) + + PROBE_MIN * AUTOIP_TICKS_PER_SECOND); + } + } + break; + + case AUTOIP_STATE_ANNOUNCING: + if(netif->autoip->ttw > 0) { + netif->autoip->ttw--; + } else { + if(netif->autoip->sent_num == 0) { + /* We are here the first time, so we waited ANNOUNCE_WAIT seconds + * Now we can bind to an IP address and use it. + * + * autoip_bind calls netif_set_up. This triggers a gratuitous ARP + * which counts as an announcement. + */ + autoip_bind(netif); + } else { + autoip_arp_announce(netif); + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, + ("autoip_tmr() ANNOUNCING Sent Announce\n")); + } + netif->autoip->ttw = ANNOUNCE_INTERVAL * AUTOIP_TICKS_PER_SECOND; + netif->autoip->sent_num++; + + if(netif->autoip->sent_num >= ANNOUNCE_NUM) { + netif->autoip->state = AUTOIP_STATE_BOUND; + netif->autoip->sent_num = 0; + netif->autoip->ttw = 0; + } + } + break; + } + } + /* proceed to next network interface */ + netif = netif->next; + } +} + +/** + * Handles every incoming ARP Packet, called by etharp_arp_input. + * + * @param netif network interface to use for autoip processing + * @param hdr Incoming ARP packet + */ +void +autoip_arp_reply(struct netif *netif, struct etharp_hdr *hdr) +{ + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_arp_reply()\n")); + if ((netif->autoip != NULL) && (netif->autoip->state != AUTOIP_STATE_OFF)) { + /* when ip.src == llipaddr && hw.src != netif->hwaddr + * + * when probing ip.dst == llipaddr && hw.src != netif->hwaddr + * we have a conflict and must solve it + */ + struct ip_addr sipaddr, dipaddr; + struct eth_addr netifaddr; + netifaddr.addr[0] = netif->hwaddr[0]; + netifaddr.addr[1] = netif->hwaddr[1]; + netifaddr.addr[2] = netif->hwaddr[2]; + netifaddr.addr[3] = netif->hwaddr[3]; + netifaddr.addr[4] = netif->hwaddr[4]; + netifaddr.addr[5] = netif->hwaddr[5]; + + /* Copy struct ip_addr2 to aligned ip_addr, to support compilers without + * structure packing (not using structure copy which breaks strict-aliasing rules). + */ + SMEMCPY(&sipaddr, &hdr->sipaddr, sizeof(sipaddr)); + SMEMCPY(&dipaddr, &hdr->dipaddr, sizeof(dipaddr)); + + if ((netif->autoip->state == AUTOIP_STATE_PROBING) || + ((netif->autoip->state == AUTOIP_STATE_ANNOUNCING) && + (netif->autoip->sent_num == 0))) { + /* RFC 3927 Section 2.2.1: + * from beginning to after ANNOUNCE_WAIT + * seconds we have a conflict if + * ip.src == llipaddr OR + * ip.dst == llipaddr && hw.src != own hwaddr + */ + if ((ip_addr_cmp(&sipaddr, &netif->autoip->llipaddr)) || + (ip_addr_cmp(&dipaddr, &netif->autoip->llipaddr) && + !eth_addr_cmp(&netifaddr, &hdr->shwaddr))) { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING, + ("autoip_arp_reply(): Probe Conflict detected\n")); + autoip_start(netif); + } + } else { + /* RFC 3927 Section 2.5: + * in any state we have a conflict if + * ip.src == llipaddr && hw.src != own hwaddr + */ + if (ip_addr_cmp(&sipaddr, &netif->autoip->llipaddr) && + !eth_addr_cmp(&netifaddr, &hdr->shwaddr)) { + LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING, + ("autoip_arp_reply(): Conflicting ARP-Packet detected\n")); + autoip_handle_arp_conflict(netif); + } + } + } +} + +#endif /* LWIP_AUTOIP */ diff --git a/bertos/net/lwip/src/core/ipv4/icmp.c b/bertos/net/lwip/src/core/ipv4/icmp.c new file mode 100644 index 0000000..b97a587 --- /dev/null +++ b/bertos/net/lwip/src/core/ipv4/icmp.c @@ -0,0 +1,331 @@ +/** + * @file + * ICMP - Internet Control Message Protocol + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +/* Some ICMP messages should be passed to the transport protocols. This + is not implemented. */ + +#include "lwip/opt.h" + +#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/icmp.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/ip.h" +#include "lwip/def.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" + +#include + +/** Small optimization: set to 0 if incoming PBUF_POOL pbuf always can be + * used to modify and send a response packet (and to 1 if this is not the case, + * e.g. when link header is stripped of when receiving) */ +#ifndef LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN +#define LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN 1 +#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ + +/* The amount of data from the original packet to return in a dest-unreachable */ +#define ICMP_DEST_UNREACH_DATASIZE 8 + +static void icmp_send_response(struct pbuf *p, u8_t type, u8_t code); + +/** + * Processes ICMP input packets, called from ip_input(). + * + * Currently only processes icmp echo requests and sends + * out the echo response. + * + * @param p the icmp echo request packet, p->payload pointing to the ip header + * @param inp the netif on which this packet was received + */ +void +icmp_input(struct pbuf *p, struct netif *inp) +{ + u8_t type; +#ifdef LWIP_DEBUG + u8_t code; +#endif /* LWIP_DEBUG */ + struct icmp_echo_hdr *iecho; + struct ip_hdr *iphdr; + struct ip_addr tmpaddr; + s16_t hlen; + + ICMP_STATS_INC(icmp.recv); + snmp_inc_icmpinmsgs(); + + + iphdr = p->payload; + hlen = IPH_HL(iphdr) * 4; + if (pbuf_header(p, -hlen) || (p->tot_len < sizeof(u16_t)*2)) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len)); + goto lenerr; + } + + type = *((u8_t *)p->payload); +#ifdef LWIP_DEBUG + code = *(((u8_t *)p->payload)+1); +#endif /* LWIP_DEBUG */ + switch (type) { + case ICMP_ECHO: +#if !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING + { + int accepted = 1; +#if !LWIP_MULTICAST_PING + /* multicast destination address? */ + if (ip_addr_ismulticast(&iphdr->dest)) { + accepted = 0; + } +#endif /* LWIP_MULTICAST_PING */ +#if !LWIP_BROADCAST_PING + /* broadcast destination address? */ + if (ip_addr_isbroadcast(&iphdr->dest, inp)) { + accepted = 0; + } +#endif /* LWIP_BROADCAST_PING */ + /* broadcast or multicast destination address not acceptd? */ + if (!accepted) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast or broadcast pings\n")); + ICMP_STATS_INC(icmp.err); + pbuf_free(p); + return; + } + } +#endif /* !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */ + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); + if (p->tot_len < sizeof(struct icmp_echo_hdr)) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); + goto lenerr; + } + if (inet_chksum_pbuf(p) != 0) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n")); + pbuf_free(p); + ICMP_STATS_INC(icmp.chkerr); + snmp_inc_icmpinerrors(); + return; + } +#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN + if (pbuf_header(p, (PBUF_IP_HLEN + PBUF_LINK_HLEN))) { + /* p is not big enough to contain link headers + * allocate a new one and copy p into it + */ + struct pbuf *r; + /* switch p->payload to ip header */ + if (pbuf_header(p, hlen)) { + LWIP_ASSERT("icmp_input: moving p->payload to ip header failed\n", 0); + goto memerr; + } + /* allocate new packet buffer with space for link headers */ + r = pbuf_alloc(PBUF_LINK, p->tot_len, PBUF_RAM); + if (r == NULL) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n")); + goto memerr; + } + LWIP_ASSERT("check that first pbuf can hold struct the ICMP header", + (r->len >= hlen + sizeof(struct icmp_echo_hdr))); + /* copy the whole packet including ip header */ + if (pbuf_copy(r, p) != ERR_OK) { + LWIP_ASSERT("icmp_input: copying to new pbuf failed\n", 0); + goto memerr; + } + iphdr = r->payload; + /* switch r->payload back to icmp header */ + if (pbuf_header(r, -hlen)) { + LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0); + goto memerr; + } + /* free the original p */ + pbuf_free(p); + /* we now have an identical copy of p that has room for link headers */ + p = r; + } else { + /* restore p->payload to point to icmp header */ + if (pbuf_header(p, -(s16_t)(PBUF_IP_HLEN + PBUF_LINK_HLEN))) { + LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0); + goto memerr; + } + } +#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ + /* At this point, all checks are OK. */ + /* We generate an answer by switching the dest and src ip addresses, + * setting the icmp type to ECHO_RESPONSE and updating the checksum. */ + iecho = p->payload; + tmpaddr.addr = iphdr->src.addr; + iphdr->src.addr = iphdr->dest.addr; + iphdr->dest.addr = tmpaddr.addr; + ICMPH_TYPE_SET(iecho, ICMP_ER); + /* adjust the checksum */ + if (iecho->chksum >= htons(0xffff - (ICMP_ECHO << 8))) { + iecho->chksum += htons(ICMP_ECHO << 8) + 1; + } else { + iecho->chksum += htons(ICMP_ECHO << 8); + } + + /* Set the correct TTL and recalculate the header checksum. */ + IPH_TTL_SET(iphdr, ICMP_TTL); + IPH_CHKSUM_SET(iphdr, 0); +#if CHECKSUM_GEN_IP + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); +#endif /* CHECKSUM_GEN_IP */ + + ICMP_STATS_INC(icmp.xmit); + /* increase number of messages attempted to send */ + snmp_inc_icmpoutmsgs(); + /* increase number of echo replies attempted to send */ + snmp_inc_icmpoutechoreps(); + + if(pbuf_header(p, hlen)) { + LWIP_ASSERT("Can't move over header in packet", 0); + } else { + err_t ret; + ret = ip_output_if(p, &(iphdr->src), IP_HDRINCL, + ICMP_TTL, 0, IP_PROTO_ICMP, inp); + if (ret != ERR_OK) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %c.\n", ret)); + } + } + break; + default: + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n", + (s16_t)type, (s16_t)code)); + ICMP_STATS_INC(icmp.proterr); + ICMP_STATS_INC(icmp.drop); + } + pbuf_free(p); + return; +lenerr: + pbuf_free(p); + ICMP_STATS_INC(icmp.lenerr); + snmp_inc_icmpinerrors(); + return; +#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN +memerr: + pbuf_free(p); + ICMP_STATS_INC(icmp.err); + snmp_inc_icmpinerrors(); + return; +#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */ +} + +/** + * Send an icmp 'destination unreachable' packet, called from ip_input() if + * the transport layer protocol is unknown and from udp_input() if the local + * port is not bound. + * + * @param p the input packet for which the 'unreachable' should be sent, + * p->payload pointing to the IP header + * @param t type of the 'unreachable' packet + */ +void +icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) +{ + icmp_send_response(p, ICMP_DUR, t); +} + +#if IP_FORWARD || IP_REASSEMBLY +/** + * Send a 'time exceeded' packet, called from ip_forward() if TTL is 0. + * + * @param p the input packet for which the 'time exceeded' should be sent, + * p->payload pointing to the IP header + * @param t type of the 'time exceeded' packet + */ +void +icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) +{ + icmp_send_response(p, ICMP_TE, t); +} + +#endif /* IP_FORWARD || IP_REASSEMBLY */ + +/** + * Send an icmp packet in response to an incoming packet. + * + * @param p the input packet for which the 'unreachable' should be sent, + * p->payload pointing to the IP header + * @param type Type of the ICMP header + * @param code Code of the ICMP header + */ +static void +icmp_send_response(struct pbuf *p, u8_t type, u8_t code) +{ + struct pbuf *q; + struct ip_hdr *iphdr; + /* we can use the echo header here */ + struct icmp_echo_hdr *icmphdr; + + /* ICMP header + IP header + 8 bytes of data */ + q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE, + PBUF_RAM); + if (q == NULL) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold icmp message", + (q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE))); + + iphdr = p->payload; + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded from ")); + ip_addr_debug_print(ICMP_DEBUG, &(iphdr->src)); + LWIP_DEBUGF(ICMP_DEBUG, (" to ")); + ip_addr_debug_print(ICMP_DEBUG, &(iphdr->dest)); + LWIP_DEBUGF(ICMP_DEBUG, ("\n")); + + icmphdr = q->payload; + icmphdr->type = type; + icmphdr->code = code; + icmphdr->id = 0; + icmphdr->seqno = 0; + + /* copy fields from original packet */ + SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload, + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE); + + /* calculate checksum */ + icmphdr->chksum = 0; + icmphdr->chksum = inet_chksum(icmphdr, q->len); + ICMP_STATS_INC(icmp.xmit); + /* increase number of messages attempted to send */ + snmp_inc_icmpoutmsgs(); + /* increase number of destination unreachable messages attempted to send */ + snmp_inc_icmpouttimeexcds(); + ip_output(q, NULL, &(iphdr->src), ICMP_TTL, 0, IP_PROTO_ICMP); + pbuf_free(q); +} + +#endif /* LWIP_ICMP */ diff --git a/bertos/net/lwip/src/core/ipv4/igmp.c b/bertos/net/lwip/src/core/ipv4/igmp.c new file mode 100644 index 0000000..7c07bc4 --- /dev/null +++ b/bertos/net/lwip/src/core/ipv4/igmp.c @@ -0,0 +1,757 @@ +/** + * @file + * IGMP - Internet Group Management Protocol + * + */ + +/* + * Copyright (c) 2002 CITEL Technologies Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of CITEL Technologies Ltd nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY CITEL TECHNOLOGIES AND CONTRIBUTORS ``AS IS'' + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL CITEL TECHNOLOGIES OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is a contribution to the lwIP TCP/IP stack. + * The Swedish Institute of Computer Science and Adam Dunkels + * are specifically granted permission to redistribute this + * source code. +*/ + +/*------------------------------------------------------------- +Note 1) +Although the rfc requires V1 AND V2 capability +we will only support v2 since now V1 is very old (August 1989) +V1 can be added if required + +a debug print and statistic have been implemented to +show this up. +------------------------------------------------------------- +------------------------------------------------------------- +Note 2) +A query for a specific group address (as opposed to ALLHOSTS) +has now been implemented as I am unsure if it is required + +a debug print and statistic have been implemented to +show this up. +------------------------------------------------------------- +------------------------------------------------------------- +Note 3) +The router alert rfc 2113 is implemented in outgoing packets +but not checked rigorously incoming +------------------------------------------------------------- +Steve Reynolds +------------------------------------------------------------*/ + +/*----------------------------------------------------------------------------- + * RFC 988 - Host extensions for IP multicasting - V0 + * RFC 1054 - Host extensions for IP multicasting - + * RFC 1112 - Host extensions for IP multicasting - V1 + * RFC 2236 - Internet Group Management Protocol, Version 2 - V2 <- this code is based on this RFC (it's the "de facto" standard) + * RFC 3376 - Internet Group Management Protocol, Version 3 - V3 + * RFC 4604 - Using Internet Group Management Protocol Version 3... - V3+ + * RFC 2113 - IP Router Alert Option - + *----------------------------------------------------------------------------*/ + +/*----------------------------------------------------------------------------- + * Includes + *----------------------------------------------------------------------------*/ + +#include "lwip/opt.h" + +#if LWIP_IGMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/igmp.h" +#include "lwip/debug.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/ip.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" +#include "lwip/stats.h" + +#include "string.h" + +/*----------------------------------------------------------------------------- + * Globales + *----------------------------------------------------------------------------*/ + +static struct igmp_group* igmp_group_list; +static struct ip_addr allsystems; +static struct ip_addr allrouters; + +/** + * Initialize the IGMP module + */ +void +igmp_init(void) +{ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_init: initializing\n")); + + IP4_ADDR(&allsystems, 224, 0, 0, 1); + IP4_ADDR(&allrouters, 224, 0, 0, 2); +} + +#ifdef LWIP_DEBUG +/** + * Dump global IGMP groups list + */ +void +igmp_dump_group_list() +{ + struct igmp_group *group = igmp_group_list; + + while (group != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_dump_group_list: [%"U32_F"] ", (u32_t)(group->group_state))); + ip_addr_debug_print(IGMP_DEBUG, &group->group_address); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", group->interface)); + group = group->next; + } + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); +} +#else +#define igmp_dump_group_list() +#endif /* LWIP_DEBUG */ + +/** + * Start IGMP processing on interface + * + * @param netif network interface on which start IGMP processing + */ +err_t +igmp_start(struct netif *netif) +{ + struct igmp_group* group; + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_start: starting IGMP processing on if %p\n", netif)); + + group = igmp_lookup_group(netif, &allsystems); + + if (group != NULL) { + group->group_state = IGMP_GROUP_IDLE_MEMBER; + group->use++; + + /* Allow the igmp messages at the MAC level */ + if (netif->igmp_mac_filter != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_start: igmp_mac_filter(ADD ")); + ip_addr_debug_print(IGMP_DEBUG, &allsystems); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter( netif, &allsystems, IGMP_ADD_MAC_FILTER); + } + + return ERR_OK; + } + + return ERR_MEM; +} + +/** + * Stop IGMP processing on interface + * + * @param netif network interface on which stop IGMP processing + */ +err_t +igmp_stop(struct netif *netif) +{ + struct igmp_group *group = igmp_group_list; + struct igmp_group *prev = NULL; + struct igmp_group *next; + + /* look for groups joined on this interface further down the list */ + while (group != NULL) { + next = group->next; + /* is it a group joined on this interface? */ + if (group->interface == netif) { + /* is it the first group of the list? */ + if (group == igmp_group_list) { + igmp_group_list = next; + } + /* is there a "previous" group defined? */ + if (prev != NULL) { + prev->next = next; + } + /* disable the group at the MAC level */ + if (netif->igmp_mac_filter != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_stop: igmp_mac_filter(DEL ")); + ip_addr_debug_print(IGMP_DEBUG, &group->group_address); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, &(group->group_address), IGMP_DEL_MAC_FILTER); + } + /* free group */ + memp_free(MEMP_IGMP_GROUP, group); + } else { + /* change the "previous" */ + prev = group; + } + /* move to "next" */ + group = next; + } + return ERR_OK; +} + +/** + * Report IGMP memberships for this interface + * + * @param netif network interface on which report IGMP memberships + */ +void +igmp_report_groups( struct netif *netif) +{ + struct igmp_group *group = igmp_group_list; + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_report_groups: sending IGMP reports on if %p\n", netif)); + + while (group != NULL) { + if (group->interface == netif) { + igmp_delaying_member( group, IGMP_JOIN_DELAYING_MEMBER_TMR); + } + group = group->next; + } +} + +/** + * Search for a group in the global igmp_group_list + * + * @param ifp the network interface for which to look + * @param addr the group ip address to search for + * @return a struct igmp_group* if the group has been found, + * NULL if the group wasn't found. + */ +struct igmp_group * +igmp_lookfor_group(struct netif *ifp, struct ip_addr *addr) +{ + struct igmp_group *group = igmp_group_list; + + while (group != NULL) { + if ((group->interface == ifp) && (ip_addr_cmp(&(group->group_address), addr))) { + return group; + } + group = group->next; + } + + /* to be clearer, we return NULL here instead of + * 'group' (which is also NULL at this point). + */ + return NULL; +} + +/** + * Search for a specific igmp group and create a new one if not found- + * + * @param ifp the network interface for which to look + * @param addr the group ip address to search + * @return a struct igmp_group*, + * NULL on memory error. + */ +struct igmp_group * +igmp_lookup_group(struct netif *ifp, struct ip_addr *addr) +{ + struct igmp_group *group = igmp_group_list; + + /* Search if the group already exists */ + group = igmp_lookfor_group(ifp, addr); + if (group != NULL) { + /* Group already exists. */ + return group; + } + + /* Group doesn't exist yet, create a new one */ + group = memp_malloc(MEMP_IGMP_GROUP); + if (group != NULL) { + group->interface = ifp; + ip_addr_set(&(group->group_address), addr); + group->timer = 0; /* Not running */ + group->group_state = IGMP_GROUP_NON_MEMBER; + group->last_reporter_flag = 0; + group->use = 0; + group->next = igmp_group_list; + + igmp_group_list = group; + } + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_lookup_group: %sallocated a new group with address ", (group?"":"impossible to "))); + ip_addr_debug_print(IGMP_DEBUG, addr); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", ifp)); + + return group; +} + +/** + * Remove a group in the global igmp_group_list + * + * @param group the group to remove from the global igmp_group_list + * @return ERR_OK if group was removed from the list, an err_t otherwise + */ +err_t +igmp_remove_group(struct igmp_group *group) +{ + err_t err = ERR_OK; + + /* Is it the first group? */ + if (igmp_group_list == group) { + igmp_group_list = group->next; + } else { + /* look for group further down the list */ + struct igmp_group *tmpGroup; + for (tmpGroup = igmp_group_list; tmpGroup != NULL; tmpGroup = tmpGroup->next) { + if (tmpGroup->next == group) { + tmpGroup->next = group->next; + break; + } + } + /* Group not found in the global igmp_group_list */ + if (tmpGroup == NULL) + err = ERR_ARG; + } + /* free group */ + memp_free(MEMP_IGMP_GROUP, group); + + return err; +} + +/** + * Called from ip_input() if a new IGMP packet is received. + * + * @param p received igmp packet, p->payload pointing to the ip header + * @param inp network interface on which the packet was received + * @param dest destination ip address of the igmp packet + */ +void +igmp_input(struct pbuf *p, struct netif *inp, struct ip_addr *dest) +{ + struct ip_hdr * iphdr; + struct igmp_msg* igmp; + struct igmp_group* group; + struct igmp_group* groupref; + + /* Note that the length CAN be greater than 8 but only 8 are used - All are included in the checksum */ + iphdr = p->payload; + if (pbuf_header(p, -(s16_t)(IPH_HL(iphdr) * 4)) || (p->len < IGMP_MINLEN)) { + pbuf_free(p); + IGMP_STATS_INC(igmp.lenerr); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: length error\n")); + return; + } + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: message from ")); + ip_addr_debug_print(IGMP_DEBUG, &(iphdr->src)); + LWIP_DEBUGF(IGMP_DEBUG, (" to address ")); + ip_addr_debug_print(IGMP_DEBUG, &(iphdr->dest)); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", inp)); + + /* Now calculate and check the checksum */ + igmp = (struct igmp_msg *)p->payload; + if (inet_chksum(igmp, p->len)) { + pbuf_free(p); + IGMP_STATS_INC(igmp.chkerr); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: checksum error\n")); + return; + } + + /* Packet is ok so find an existing group */ + group = igmp_lookfor_group(inp, dest); /* use the incoming IP address! */ + + /* If group can be found or create... */ + if (!group) { + pbuf_free(p); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP frame not for us\n")); + return; + } + + /* NOW ACT ON THE INCOMING MESSAGE TYPE... */ + switch (igmp->igmp_msgtype) { + case IGMP_MEMB_QUERY: { + /* IGMP_MEMB_QUERY to the "all systems" address ? */ + if ((ip_addr_cmp(dest, &allsystems)) && (igmp->igmp_group_address.addr == 0)) { + /* THIS IS THE GENERAL QUERY */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: General IGMP_MEMB_QUERY on \"ALL SYSTEMS\" address (224.0.0.1) [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp))); + + if (igmp->igmp_maxresp == 0) { + IGMP_STATS_INC(igmp.v1_rxed); + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: got an all hosts query with time== 0 - this is V1 and not implemented - treat as v2\n")); + igmp->igmp_maxresp = IGMP_V1_DELAYING_MEMBER_TMR; + } + + IGMP_STATS_INC(igmp.group_query_rxed); + groupref = igmp_group_list; + while (groupref) { + /* Do not send messages on the all systems group address! */ + if ((groupref->interface == inp) && (!(ip_addr_cmp(&(groupref->group_address), &allsystems)))) { + igmp_delaying_member( groupref, igmp->igmp_maxresp); + } + groupref = groupref->next; + } + } else { + /* IGMP_MEMB_QUERY to a specific group ? */ + if (group->group_address.addr != 0) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP_MEMB_QUERY to a specific group ")); + ip_addr_debug_print(IGMP_DEBUG, &group->group_address); + if (ip_addr_cmp (dest, &allsystems)) { + LWIP_DEBUGF(IGMP_DEBUG, (" using \"ALL SYSTEMS\" address (224.0.0.1) [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp))); + /* we first need to re-lookfor the group since we used dest last time */ + group = igmp_lookfor_group(inp, &igmp->igmp_group_address); + } else { + LWIP_DEBUGF(IGMP_DEBUG, (" with the group address as destination [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp))); + } + + if (group != NULL) { + IGMP_STATS_INC(igmp.unicast_query); + igmp_delaying_member( group, igmp->igmp_maxresp); + } + } + } + break; + } + case IGMP_V2_MEMB_REPORT: { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP_V2_MEMB_REPORT\n")); + + IGMP_STATS_INC(igmp.report_rxed); + if (group->group_state == IGMP_GROUP_DELAYING_MEMBER) { + /* This is on a specific group we have already looked up */ + group->timer = 0; /* stopped */ + group->group_state = IGMP_GROUP_IDLE_MEMBER; + group->last_reporter_flag = 0; + } + break; + } + default: { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: unexpected msg %d in state %d on group %p on if %p\n", + igmp->igmp_msgtype, group->group_state, &group, group->interface)); + break; + } + } + + pbuf_free(p); + return; +} + +/** + * Join a group on one network interface. + * + * @param ifaddr ip address of the network interface which should join a new group + * @param groupaddr the ip address of the group which to join + * @return ERR_OK if group was joined on the netif(s), an err_t otherwise + */ +err_t +igmp_joingroup(struct ip_addr *ifaddr, struct ip_addr *groupaddr) +{ + err_t err = ERR_VAL; /* no matching interface */ + struct igmp_group *group; + struct netif *netif; + + /* make sure it is multicast address */ + LWIP_ERROR("igmp_joingroup: attempt to join non-multicast address", ip_addr_ismulticast(groupaddr), return ERR_VAL;); + LWIP_ERROR("igmp_joingroup: attempt to join allsystems address", (!ip_addr_cmp(groupaddr, &allsystems)), return ERR_VAL;); + + /* loop through netif's */ + netif = netif_list; + while (netif != NULL) { + /* Should we join this interface ? */ + if ((netif->flags & NETIF_FLAG_IGMP) && ((ip_addr_isany(ifaddr) || ip_addr_cmp(&(netif->ip_addr), ifaddr)))) { + /* find group or create a new one if not found */ + group = igmp_lookup_group(netif, groupaddr); + + if (group != NULL) { + /* This should create a new group, check the state to make sure */ + if (group->group_state != IGMP_GROUP_NON_MEMBER) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: join to group not in state IGMP_GROUP_NON_MEMBER\n")); + } else { + /* OK - it was new group */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: join to new group: ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + + /* If first use of the group, allow the group at the MAC level */ + if ((group->use==0) && (netif->igmp_mac_filter != NULL)) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: igmp_mac_filter(ADD ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, groupaddr, IGMP_ADD_MAC_FILTER); + } + + IGMP_STATS_INC(igmp.join_sent); + igmp_send(group, IGMP_V2_MEMB_REPORT); + + igmp_start_timer(group, IGMP_JOIN_DELAYING_MEMBER_TMR); + + /* Need to work out where this timer comes from */ + group->group_state = IGMP_GROUP_DELAYING_MEMBER; + } + /* Increment group use */ + group->use++; + /* Join on this interface */ + err = ERR_OK; + } else { + /* Return an error even if some network interfaces are joined */ + /** @todo undo any other netif already joined */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: Not enought memory to join to group\n")); + return ERR_MEM; + } + } + /* proceed to next network interface */ + netif = netif->next; + } + + return err; +} + +/** + * Leave a group on one network interface. + * + * @param ifaddr ip address of the network interface which should leave a group + * @param groupaddr the ip address of the group which to leave + * @return ERR_OK if group was left on the netif(s), an err_t otherwise + */ +err_t +igmp_leavegroup(struct ip_addr *ifaddr, struct ip_addr *groupaddr) +{ + err_t err = ERR_VAL; /* no matching interface */ + struct igmp_group *group; + struct netif *netif; + + /* make sure it is multicast address */ + LWIP_ERROR("igmp_leavegroup: attempt to leave non-multicast address", ip_addr_ismulticast(groupaddr), return ERR_VAL;); + LWIP_ERROR("igmp_leavegroup: attempt to leave allsystems address", (!ip_addr_cmp(groupaddr, &allsystems)), return ERR_VAL;); + + /* loop through netif's */ + netif = netif_list; + while (netif != NULL) { + /* Should we leave this interface ? */ + if ((netif->flags & NETIF_FLAG_IGMP) && ((ip_addr_isany(ifaddr) || ip_addr_cmp(&(netif->ip_addr), ifaddr)))) { + /* find group */ + group = igmp_lookfor_group(netif, groupaddr); + + if (group != NULL) { + /* Only send a leave if the flag is set according to the state diagram */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: Leaving group: ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + + /* If there is no other use of the group */ + if (group->use <= 1) { + /* If we are the last reporter for this group */ + if (group->last_reporter_flag) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: sending leaving group\n")); + IGMP_STATS_INC(igmp.leave_sent); + igmp_send(group, IGMP_LEAVE_GROUP); + } + + /* Disable the group at the MAC level */ + if (netif->igmp_mac_filter != NULL) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: igmp_mac_filter(DEL ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif)); + netif->igmp_mac_filter(netif, groupaddr, IGMP_DEL_MAC_FILTER); + } + + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: remove group: ")); + ip_addr_debug_print(IGMP_DEBUG, groupaddr); + LWIP_DEBUGF(IGMP_DEBUG, ("\n")); + + /* Free the group */ + igmp_remove_group(group); + } else { + /* Decrement group use */ + group->use--; + } + /* Leave on this interface */ + err = ERR_OK; + } else { + /* It's not a fatal error on "leavegroup" */ + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: not member of group\n")); + } + } + /* proceed to next network interface */ + netif = netif->next; + } + + return err; +} + +/** + * The igmp timer function (both for NO_SYS=1 and =0) + * Should be called every IGMP_TMR_INTERVAL milliseconds (100 ms is default). + */ +void +igmp_tmr(void) +{ + struct igmp_group *group = igmp_group_list; + + while (group != NULL) { + if (group->timer != 0) { + group->timer -= 1; + if (group->timer == 0) { + igmp_timeout(group); + } + } + group = group->next; + } +} + +/** + * Called if a timeout for one group is reached. + * Sends a report for this group. + * + * @param group an igmp_group for which a timeout is reached + */ +void +igmp_timeout(struct igmp_group *group) +{ + /* If the state is IGMP_GROUP_DELAYING_MEMBER then we send a report for this group */ + if (group->group_state == IGMP_GROUP_DELAYING_MEMBER) { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_timeout: report membership for group with address ")); + ip_addr_debug_print(IGMP_DEBUG, &(group->group_address)); + LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", group->interface)); + + igmp_send(group, IGMP_V2_MEMB_REPORT); + } +} + +/** + * Start a timer for an igmp group + * + * @param group the igmp_group for which to start a timer + * @param max_time the time in multiples of IGMP_TMR_INTERVAL (decrease with + * every call to igmp_tmr()) + */ +void +igmp_start_timer(struct igmp_group *group, u8_t max_time) +{ + /** + * @todo Important !! this should be random 0 -> max_time. Find out how to do this + */ + group->timer = max_time; +} + +/** + * Stop a timer for an igmp_group + * + * @param group the igmp_group for which to stop the timer + */ +void +igmp_stop_timer(struct igmp_group *group) +{ + group->timer = 0; +} + +/** + * Delaying membership report for a group if necessary + * + * @param group the igmp_group for which "delaying" membership report + * @param maxresp query delay + */ +void +igmp_delaying_member( struct igmp_group *group, u8_t maxresp) +{ + if ((group->group_state == IGMP_GROUP_IDLE_MEMBER) || + ((group->group_state == IGMP_GROUP_DELAYING_MEMBER) && (maxresp > group->timer))) { + igmp_start_timer(group, (maxresp)/2); + group->group_state = IGMP_GROUP_DELAYING_MEMBER; + } +} + + +/** + * Sends an IP packet on a network interface. This function constructs the IP header + * and calculates the IP header checksum. If the source IP address is NULL, + * the IP address of the outgoing network interface is filled in as source address. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * @param netif the netif on which to send this packet + * @return ERR_OK if the packet was sent OK + * ERR_BUF if p doesn't have enough space for IP/LINK headers + * returns errors returned by netif->output + */ +err_t +igmp_ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t proto, struct netif *netif) +{ + /* This is the "router alert" option */ + u16_t ra[2]; + ra[0] = htons (ROUTER_ALERT); + ra[1] = 0x0000; /* Router shall examine packet */ + return ip_output_if_opt(p, src, dest, ttl, 0, proto, netif, ra, ROUTER_ALERTLEN); +} + +/** + * Send an igmp packet to a specific group. + * + * @param group the group to which to send the packet + * @param type the type of igmp packet to send + */ +void +igmp_send(struct igmp_group *group, u8_t type) +{ + struct pbuf* p = NULL; + struct igmp_msg* igmp = NULL; + struct ip_addr src = {0}; + struct ip_addr* dest = NULL; + + /* IP header + "router alert" option + IGMP header */ + p = pbuf_alloc(PBUF_TRANSPORT, IGMP_MINLEN, PBUF_RAM); + + if (p) { + igmp = p->payload; + LWIP_ASSERT("igmp_send: check that first pbuf can hold struct igmp_msg", + (p->len >= sizeof(struct igmp_msg))); + ip_addr_set(&src, &((group->interface)->ip_addr)); + + if (type == IGMP_V2_MEMB_REPORT) { + dest = &(group->group_address); + IGMP_STATS_INC(igmp.report_sent); + ip_addr_set(&(igmp->igmp_group_address), &(group->group_address)); + group->last_reporter_flag = 1; /* Remember we were the last to report */ + } else { + if (type == IGMP_LEAVE_GROUP) { + dest = &allrouters; + ip_addr_set(&(igmp->igmp_group_address), &(group->group_address)); + } + } + + if ((type == IGMP_V2_MEMB_REPORT) || (type == IGMP_LEAVE_GROUP)) { + igmp->igmp_msgtype = type; + igmp->igmp_maxresp = 0; + igmp->igmp_checksum = 0; + igmp->igmp_checksum = inet_chksum( igmp, IGMP_MINLEN); + + igmp_ip_output_if(p, &src, dest, IGMP_TTL, IP_PROTO_IGMP, group->interface); + } + + pbuf_free(p); + } else { + LWIP_DEBUGF(IGMP_DEBUG, ("igmp_send: not enough memory for igmp_send\n")); + } +} + +#endif /* LWIP_IGMP */ diff --git a/bertos/net/lwip/src/core/ipv4/inet.c b/bertos/net/lwip/src/core/ipv4/inet.c new file mode 100644 index 0000000..69baf1d --- /dev/null +++ b/bertos/net/lwip/src/core/ipv4/inet.c @@ -0,0 +1,278 @@ +/** + * @file + * Functions common to all TCP/IPv4 modules, such as the byte order functions. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/inet.h" + +/* Here for now until needed in other places in lwIP */ +#ifndef isprint +#define in_range(c, lo, up) ((u8_t)c >= lo && (u8_t)c <= up) +#define isprint(c) in_range(c, 0x20, 0x7f) +#define isdigit(c) in_range(c, '0', '9') +#define isxdigit(c) (isdigit(c) || in_range(c, 'a', 'f') || in_range(c, 'A', 'F')) +#define islower(c) in_range(c, 'a', 'z') +#define isspace(c) (c == ' ' || c == '\f' || c == '\n' || c == '\r' || c == '\t' || c == '\v') +#endif + +/** + * Ascii internet address interpretation routine. + * The value returned is in network order. + * + * @param cp IP address in ascii represenation (e.g. "127.0.0.1") + * @return ip address in network order + */ +u32_t +inet_addr(const char *cp) +{ + struct in_addr val; + + if (inet_aton(cp, &val)) { + return (val.s_addr); + } + return (INADDR_NONE); +} + +/** + * Check whether "cp" is a valid ascii representation + * of an Internet address and convert to a binary address. + * Returns 1 if the address is valid, 0 if not. + * This replaces inet_addr, the return value from which + * cannot distinguish between failure and a local broadcast address. + * + * @param cp IP address in ascii represenation (e.g. "127.0.0.1") + * @param addr pointer to which to save the ip address in network order + * @return 1 if cp could be converted to addr, 0 on failure + */ +int +inet_aton(const char *cp, struct in_addr *addr) +{ + u32_t val; + u8_t base; + char c; + u32_t parts[4]; + u32_t *pp = parts; + + c = *cp; + for (;;) { + /* + * Collect number up to ``.''. + * Values are specified as for C: + * 0x=hex, 0=octal, 1-9=decimal. + */ + if (!isdigit(c)) + return (0); + val = 0; + base = 10; + if (c == '0') { + c = *++cp; + if (c == 'x' || c == 'X') { + base = 16; + c = *++cp; + } else + base = 8; + } + for (;;) { + if (isdigit(c)) { + val = (val * base) + (int)(c - '0'); + c = *++cp; + } else if (base == 16 && isxdigit(c)) { + val = (val << 4) | (int)(c + 10 - (islower(c) ? 'a' : 'A')); + c = *++cp; + } else + break; + } + if (c == '.') { + /* + * Internet format: + * a.b.c.d + * a.b.c (with c treated as 16 bits) + * a.b (with b treated as 24 bits) + */ + if (pp >= parts + 3) + return (0); + *pp++ = val; + c = *++cp; + } else + break; + } + /* + * Check for trailing characters. + */ + if (c != '\0' && !isspace(c)) + return (0); + /* + * Concoct the address according to + * the number of parts specified. + */ + switch (pp - parts + 1) { + + case 0: + return (0); /* initial nondigit */ + + case 1: /* a -- 32 bits */ + break; + + case 2: /* a.b -- 8.24 bits */ + if (val > 0xffffffUL) + return (0); + val |= parts[0] << 24; + break; + + case 3: /* a.b.c -- 8.8.16 bits */ + if (val > 0xffff) + return (0); + val |= (parts[0] << 24) | (parts[1] << 16); + break; + + case 4: /* a.b.c.d -- 8.8.8.8 bits */ + if (val > 0xff) + return (0); + val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8); + break; + } + if (addr) + addr->s_addr = htonl(val); + return (1); +} + +/** + * Convert numeric IP address into decimal dotted ASCII representation. + * returns ptr to static buffer; not reentrant! + * + * @param addr ip address in network order to convert + * @return pointer to a global static (!) buffer that holds the ASCII + * represenation of addr + */ +char * +inet_ntoa(struct in_addr addr) +{ + static char str[16]; + u32_t s_addr = addr.s_addr; + char inv[3]; + char *rp; + u8_t *ap; + u8_t rem; + u8_t n; + u8_t i; + + rp = str; + ap = (u8_t *)&s_addr; + for(n = 0; n < 4; n++) { + i = 0; + do { + rem = *ap % (u8_t)10; + *ap /= (u8_t)10; + inv[i++] = '0' + rem; + } while(*ap); + while(i--) + *rp++ = inv[i]; + *rp++ = '.'; + ap++; + } + *--rp = 0; + return str; +} + +/** + * These are reference implementations of the byte swapping functions. + * Again with the aim of being simple, correct and fully portable. + * Byte swapping is the second thing you would want to optimize. You will + * need to port it to your architecture and in your cc.h: + * + * #define LWIP_PLATFORM_BYTESWAP 1 + * #define LWIP_PLATFORM_HTONS(x) + * #define LWIP_PLATFORM_HTONL(x) + * + * Note ntohs() and ntohl() are merely references to the htonx counterparts. + */ + +#if (LWIP_PLATFORM_BYTESWAP == 0) && (BYTE_ORDER == LITTLE_ENDIAN) + +/** + * Convert an u16_t from host- to network byte order. + * + * @param n u16_t in host byte order + * @return n in network byte order + */ +u16_t +htons(u16_t n) +{ + return ((n & 0xff) << 8) | ((n & 0xff00) >> 8); +} + +/** + * Convert an u16_t from network- to host byte order. + * + * @param n u16_t in network byte order + * @return n in host byte order + */ +u16_t +ntohs(u16_t n) +{ + return htons(n); +} + +/** + * Convert an u32_t from host- to network byte order. + * + * @param n u32_t in host byte order + * @return n in network byte order + */ +u32_t +htonl(u32_t n) +{ + return ((n & 0xff) << 24) | + ((n & 0xff00) << 8) | + ((n & 0xff0000UL) >> 8) | + ((n & 0xff000000UL) >> 24); +} + +/** + * Convert an u32_t from network- to host byte order. + * + * @param n u32_t in network byte order + * @return n in host byte order + */ +u32_t +ntohl(u32_t n) +{ + return htonl(n); +} + +#endif /* (LWIP_PLATFORM_BYTESWAP == 0) && (BYTE_ORDER == LITTLE_ENDIAN) */ diff --git a/bertos/net/lwip/src/core/ipv4/inet_chksum.c b/bertos/net/lwip/src/core/ipv4/inet_chksum.c new file mode 100644 index 0000000..185881e --- /dev/null +++ b/bertos/net/lwip/src/core/ipv4/inet_chksum.c @@ -0,0 +1,438 @@ +/** + * @file + * Incluse internet checksum functions. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/inet_chksum.h" +#include "lwip/inet.h" + +#include + +/* These are some reference implementations of the checksum algorithm, with the + * aim of being simple, correct and fully portable. Checksumming is the + * first thing you would want to optimize for your platform. If you create + * your own version, link it in and in your cc.h put: + * + * #define LWIP_CHKSUM + * + * Or you can select from the implementations below by defining + * LWIP_CHKSUM_ALGORITHM to 1, 2 or 3. + */ + +#ifndef LWIP_CHKSUM +# define LWIP_CHKSUM lwip_standard_chksum +# ifndef LWIP_CHKSUM_ALGORITHM +# define LWIP_CHKSUM_ALGORITHM 1 +# endif +#endif +/* If none set: */ +#ifndef LWIP_CHKSUM_ALGORITHM +# define LWIP_CHKSUM_ALGORITHM 0 +#endif + +/** Like the name says... */ +#if LWIP_PLATFORM_BYTESWAP && (BYTE_ORDER == LITTLE_ENDIAN) +/* little endian and PLATFORM_BYTESWAP defined */ +#define SWAP_BYTES_IN_WORD(w) LWIP_PLATFORM_HTONS(w) +#else +/* can't use htons on big endian (or PLATFORM_BYTESWAP not defined)... */ +#define SWAP_BYTES_IN_WORD(w) ((w & 0xff) << 8) | ((w & 0xff00) >> 8) +#endif + +/** Split an u32_t in two u16_ts and add them up */ +#define FOLD_U32T(u) ((u >> 16) + (u & 0x0000ffffUL)) + +#if (LWIP_CHKSUM_ALGORITHM == 1) /* Version #1 */ +/** + * lwip checksum + * + * @param dataptr points to start of data to be summed at any boundary + * @param len length of data to be summed + * @return host order (!) lwip checksum (non-inverted Internet sum) + * + * @note accumulator size limits summable length to 64k + * @note host endianess is irrelevant (p3 RFC1071) + */ +static u16_t +lwip_standard_chksum(void *dataptr, u16_t len) +{ + u32_t acc; + u16_t src; + u8_t *octetptr; + + acc = 0; + /* dataptr may be at odd or even addresses */ + octetptr = (u8_t*)dataptr; + while (len > 1) { + /* declare first octet as most significant + thus assume network order, ignoring host order */ + src = (*octetptr) << 8; + octetptr++; + /* declare second octet as least significant */ + src |= (*octetptr); + octetptr++; + acc += src; + len -= 2; + } + if (len > 0) { + /* accumulate remaining octet */ + src = (*octetptr) << 8; + acc += src; + } + /* add deferred carry bits */ + acc = (acc >> 16) + (acc & 0x0000ffffUL); + if ((acc & 0xffff0000UL) != 0) { + acc = (acc >> 16) + (acc & 0x0000ffffUL); + } + /* This maybe a little confusing: reorder sum using htons() + instead of ntohs() since it has a little less call overhead. + The caller must invert bits for Internet sum ! */ + return htons((u16_t)acc); +} +#endif + +#if (LWIP_CHKSUM_ALGORITHM == 2) /* Alternative version #2 */ +/* + * Curt McDowell + * Broadcom Corp. + * csm@broadcom.com + * + * IP checksum two bytes at a time with support for + * unaligned buffer. + * Works for len up to and including 0x20000. + * by Curt McDowell, Broadcom Corp. 12/08/2005 + * + * @param dataptr points to start of data to be summed at any boundary + * @param len length of data to be summed + * @return host order (!) lwip checksum (non-inverted Internet sum) + */ + +static u16_t +lwip_standard_chksum(void *dataptr, int len) +{ + u8_t *pb = dataptr; + u16_t *ps, t = 0; + u32_t sum = 0; + int odd = ((u32_t)pb & 1); + + /* Get aligned to u16_t */ + if (odd && len > 0) { + ((u8_t *)&t)[1] = *pb++; + len--; + } + + /* Add the bulk of the data */ + ps = (u16_t *)pb; + while (len > 1) { + sum += *ps++; + len -= 2; + } + + /* Consume left-over byte, if any */ + if (len > 0) { + ((u8_t *)&t)[0] = *(u8_t *)ps;; + } + + /* Add end bytes */ + sum += t; + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + sum = FOLD_U32T(sum); + sum = FOLD_U32T(sum); + + /* Swap if alignment was odd */ + if (odd) { + sum = SWAP_BYTES_IN_WORD(sum); + } + + return sum; +} +#endif + +#if (LWIP_CHKSUM_ALGORITHM == 3) /* Alternative version #3 */ +/** + * An optimized checksum routine. Basically, it uses loop-unrolling on + * the checksum loop, treating the head and tail bytes specially, whereas + * the inner loop acts on 8 bytes at a time. + * + * @arg start of buffer to be checksummed. May be an odd byte address. + * @len number of bytes in the buffer to be checksummed. + * @return host order (!) lwip checksum (non-inverted Internet sum) + * + * by Curt McDowell, Broadcom Corp. December 8th, 2005 + */ + +static u16_t +lwip_standard_chksum(void *dataptr, int len) +{ + u8_t *pb = dataptr; + u16_t *ps, t = 0; + u32_t *pl; + u32_t sum = 0, tmp; + /* starts at odd byte address? */ + int odd = ((u32_t)pb & 1); + + if (odd && len > 0) { + ((u8_t *)&t)[1] = *pb++; + len--; + } + + ps = (u16_t *)pb; + + if (((u32_t)ps & 3) && len > 1) { + sum += *ps++; + len -= 2; + } + + pl = (u32_t *)ps; + + while (len > 7) { + tmp = sum + *pl++; /* ping */ + if (tmp < sum) { + tmp++; /* add back carry */ + } + + sum = tmp + *pl++; /* pong */ + if (sum < tmp) { + sum++; /* add back carry */ + } + + len -= 8; + } + + /* make room in upper bits */ + sum = FOLD_U32T(sum); + + ps = (u16_t *)pl; + + /* 16-bit aligned word remaining? */ + while (len > 1) { + sum += *ps++; + len -= 2; + } + + /* dangling tail byte remaining? */ + if (len > 0) { /* include odd byte */ + ((u8_t *)&t)[0] = *(u8_t *)ps; + } + + sum += t; /* add end bytes */ + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + sum = FOLD_U32T(sum); + sum = FOLD_U32T(sum); + + if (odd) { + sum = SWAP_BYTES_IN_WORD(sum); + } + + return sum; +} +#endif + +/* inet_chksum_pseudo: + * + * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. + * IP addresses are expected to be in network byte order. + * + * @param p chain of pbufs over that a checksum should be calculated (ip data part) + * @param src source ip address (used for checksum of pseudo header) + * @param dst destination ip address (used for checksum of pseudo header) + * @param proto ip protocol (used for checksum of pseudo header) + * @param proto_len length of the ip data part (used for checksum of pseudo header) + * @return checksum (as u16_t) to be saved directly in the protocol header + */ +u16_t +inet_chksum_pseudo(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u16_t proto_len) +{ + u32_t acc; + struct pbuf *q; + u8_t swapped; + + acc = 0; + swapped = 0; + /* iterate through all pbuf in chain */ + for(q = p; q != NULL; q = q->next) { + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n", + (void *)q, (void *)q->next)); + acc += LWIP_CHKSUM(q->payload, q->len); + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/ + /* just executing this next line is probably faster that the if statement needed + to check whether we really need to execute it, and does no harm */ + acc = FOLD_U32T(acc); + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = SWAP_BYTES_IN_WORD(acc); + } + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/ + } + + if (swapped) { + acc = SWAP_BYTES_IN_WORD(acc); + } + acc += (src->addr & 0xffffUL); + acc += ((src->addr >> 16) & 0xffffUL); + acc += (dest->addr & 0xffffUL); + acc += ((dest->addr >> 16) & 0xffffUL); + acc += (u32_t)htons((u16_t)proto); + acc += (u32_t)htons(proto_len); + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + acc = FOLD_U32T(acc); + acc = FOLD_U32T(acc); + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc)); + return (u16_t)~(acc & 0xffffUL); +} + +/* inet_chksum_pseudo: + * + * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. + * IP addresses are expected to be in network byte order. + * + * @param p chain of pbufs over that a checksum should be calculated (ip data part) + * @param src source ip address (used for checksum of pseudo header) + * @param dst destination ip address (used for checksum of pseudo header) + * @param proto ip protocol (used for checksum of pseudo header) + * @param proto_len length of the ip data part (used for checksum of pseudo header) + * @return checksum (as u16_t) to be saved directly in the protocol header + */ +/* Currently only used by UDPLITE, although this could change in the future. */ +#if LWIP_UDPLITE +u16_t +inet_chksum_pseudo_partial(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u16_t proto_len, u16_t chksum_len) +{ + u32_t acc; + struct pbuf *q; + u8_t swapped; + u16_t chklen; + + acc = 0; + swapped = 0; + /* iterate through all pbuf in chain */ + for(q = p; (q != NULL) && (chksum_len > 0); q = q->next) { + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n", + (void *)q, (void *)q->next)); + chklen = q->len; + if (chklen > chksum_len) { + chklen = chksum_len; + } + acc += LWIP_CHKSUM(q->payload, chklen); + chksum_len -= chklen; + LWIP_ASSERT("delete me", chksum_len < 0x7fff); + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/ + /* fold the upper bit down */ + acc = FOLD_U32T(acc); + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = SWAP_BYTES_IN_WORD(acc); + } + /*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/ + } + + if (swapped) { + acc = SWAP_BYTES_IN_WORD(acc); + } + acc += (src->addr & 0xffffUL); + acc += ((src->addr >> 16) & 0xffffUL); + acc += (dest->addr & 0xffffUL); + acc += ((dest->addr >> 16) & 0xffffUL); + acc += (u32_t)htons((u16_t)proto); + acc += (u32_t)htons(proto_len); + + /* Fold 32-bit sum to 16 bits + calling this twice is propably faster than if statements... */ + acc = FOLD_U32T(acc); + acc = FOLD_U32T(acc); + LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc)); + return (u16_t)~(acc & 0xffffUL); +} +#endif /* LWIP_UDPLITE */ + +/* inet_chksum: + * + * Calculates the Internet checksum over a portion of memory. Used primarily for IP + * and ICMP. + * + * @param dataptr start of the buffer to calculate the checksum (no alignment needed) + * @param len length of the buffer to calculate the checksum + * @return checksum (as u16_t) to be saved directly in the protocol header + */ + +u16_t +inet_chksum(void *dataptr, u16_t len) +{ + return ~LWIP_CHKSUM(dataptr, len); +} + +/** + * Calculate a checksum over a chain of pbufs (without pseudo-header, much like + * inet_chksum only pbufs are used). + * + * @param p pbuf chain over that the checksum should be calculated + * @return checksum (as u16_t) to be saved directly in the protocol header + */ +u16_t +inet_chksum_pbuf(struct pbuf *p) +{ + u32_t acc; + struct pbuf *q; + u8_t swapped; + + acc = 0; + swapped = 0; + for(q = p; q != NULL; q = q->next) { + acc += LWIP_CHKSUM(q->payload, q->len); + acc = FOLD_U32T(acc); + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = SWAP_BYTES_IN_WORD(acc); + } + } + + if (swapped) { + acc = SWAP_BYTES_IN_WORD(acc); + } + return (u16_t)~(acc & 0xffffUL); +} diff --git a/bertos/net/lwip/src/core/ipv4/ip.c b/bertos/net/lwip/src/core/ipv4/ip.c new file mode 100644 index 0000000..b1e98f3 --- /dev/null +++ b/bertos/net/lwip/src/core/ipv4/ip.c @@ -0,0 +1,723 @@ +/** + * @file + * This is the IPv4 layer implementation for incoming and outgoing IP traffic. + * + * @see ip_frag.c + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" +#include "lwip/ip.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/ip_frag.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/igmp.h" +#include "lwip/raw.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" +#include "lwip/snmp.h" +#include "lwip/dhcp.h" +#include "lwip/stats.h" +#include "arch/perf.h" + +#include + +/** + * The interface that provided the packet for the current callback + * invocation. + */ +struct netif *current_netif; + +/** + * Header of the input packet currently being processed. + */ +const struct ip_hdr *current_header; + +/** + * Finds the appropriate network interface for a given IP address. It + * searches the list of network interfaces linearly. A match is found + * if the masked IP address of the network interface equals the masked + * IP address given to the function. + * + * @param dest the destination IP address for which to find the route + * @return the netif on which to send to reach dest + */ +struct netif * +ip_route(struct ip_addr *dest) +{ + struct netif *netif; + + /* iterate through netifs */ + for(netif = netif_list; netif != NULL; netif = netif->next) { + /* network mask matches? */ + if (netif_is_up(netif)) { + if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) { + /* return netif on which to forward IP packet */ + return netif; + } + } + } + if ((netif_default == NULL) || (!netif_is_up(netif_default))) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_route: No route to 0x%"X32_F"\n", dest->addr)); + IP_STATS_INC(ip.rterr); + snmp_inc_ipoutnoroutes(); + return NULL; + } + /* no matching netif found, use default netif */ + return netif_default; +} + +#if IP_FORWARD +/** + * Forwards an IP packet. It finds an appropriate route for the + * packet, decrements the TTL value of the packet, adjusts the + * checksum and outputs the packet on the appropriate interface. + * + * @param p the packet to forward (p->payload points to IP header) + * @param iphdr the IP header of the input packet + * @param inp the netif on which this packet was received + * @return the netif on which the packet was sent (NULL if it wasn't sent) + */ +static struct netif * +ip_forward(struct pbuf *p, struct ip_hdr *iphdr, struct netif *inp) +{ + struct netif *netif; + + PERF_START; + /* Find network interface where to forward this IP packet to. */ + netif = ip_route((struct ip_addr *)&(iphdr->dest)); + if (netif == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: no forwarding route for 0x%"X32_F" found\n", + iphdr->dest.addr)); + snmp_inc_ipoutnoroutes(); + return (struct netif *)NULL; + } + /* Do not forward packets onto the same network interface on which + * they arrived. */ + if (netif == inp) { + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: not bouncing packets back on incoming interface.\n")); + snmp_inc_ipoutnoroutes(); + return (struct netif *)NULL; + } + + /* decrement TTL */ + IPH_TTL_SET(iphdr, IPH_TTL(iphdr) - 1); + /* send ICMP if TTL == 0 */ + if (IPH_TTL(iphdr) == 0) { + snmp_inc_ipinhdrerrors(); +#if LWIP_ICMP + /* Don't send ICMP messages in response to ICMP messages */ + if (IPH_PROTO(iphdr) != IP_PROTO_ICMP) { + icmp_time_exceeded(p, ICMP_TE_TTL); + } +#endif /* LWIP_ICMP */ + return (struct netif *)NULL; + } + + /* Incrementally update the IP checksum. */ + if (IPH_CHKSUM(iphdr) >= htons(0xffff - 0x100)) { + IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100) + 1); + } else { + IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100)); + } + + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: forwarding packet to 0x%"X32_F"\n", + iphdr->dest.addr)); + + IP_STATS_INC(ip.fw); + IP_STATS_INC(ip.xmit); + snmp_inc_ipforwdatagrams(); + + PERF_STOP("ip_forward"); + /* transmit pbuf on chosen interface */ + netif->output(netif, p, (struct ip_addr *)&(iphdr->dest)); + return netif; +} +#endif /* IP_FORWARD */ + +/** + * This function is called by the network interface device driver when + * an IP packet is received. The function does the basic checks of the + * IP header such as packet size being at least larger than the header + * size etc. If the packet was not destined for us, the packet is + * forwarded (using ip_forward). The IP checksum is always checked. + * + * Finally, the packet is sent to the upper layer protocol input function. + * + * @param p the received IP packet (p->payload points to IP header) + * @param inp the netif on which this packet was received + * @return ERR_OK if the packet was processed (could return ERR_* if it wasn't + * processed, but currently always returns ERR_OK) + */ +err_t +ip_input(struct pbuf *p, struct netif *inp) +{ + struct ip_hdr *iphdr; + struct netif *netif; + u16_t iphdr_hlen; + u16_t iphdr_len; +#if LWIP_DHCP + int check_ip_src=1; +#endif /* LWIP_DHCP */ + + IP_STATS_INC(ip.recv); + snmp_inc_ipinreceives(); + + /* identify the IP header */ + iphdr = p->payload; + if (IPH_V(iphdr) != 4) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", IPH_V(iphdr))); + ip_debug_print(p); + pbuf_free(p); + IP_STATS_INC(ip.err); + IP_STATS_INC(ip.drop); + snmp_inc_ipinhdrerrors(); + return ERR_OK; + } + + /* obtain IP header length in number of 32-bit words */ + iphdr_hlen = IPH_HL(iphdr); + /* calculate IP header length in bytes */ + iphdr_hlen *= 4; + /* obtain ip length in bytes */ + iphdr_len = ntohs(IPH_LEN(iphdr)); + + /* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */ + if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len)) { + if (iphdr_hlen > p->len) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("IP header (len %"U16_F") does not fit in first pbuf (len %"U16_F"), IP packet dropped.\n", + iphdr_hlen, p->len)); + } + if (iphdr_len > p->tot_len) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n", + iphdr_len, p->tot_len)); + } + /* free (drop) packet pbufs */ + pbuf_free(p); + IP_STATS_INC(ip.lenerr); + IP_STATS_INC(ip.drop); + snmp_inc_ipindiscards(); + return ERR_OK; + } + + /* verify checksum */ +#if CHECKSUM_CHECK_IP + if (inet_chksum(iphdr, iphdr_hlen) != 0) { + + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("Checksum (0x%"X16_F") failed, IP packet dropped.\n", inet_chksum(iphdr, iphdr_hlen))); + ip_debug_print(p); + pbuf_free(p); + IP_STATS_INC(ip.chkerr); + IP_STATS_INC(ip.drop); + snmp_inc_ipinhdrerrors(); + return ERR_OK; + } +#endif + + /* Trim pbuf. This should have been done at the netif layer, + * but we'll do it anyway just to be sure that its done. */ + pbuf_realloc(p, iphdr_len); + + /* match packet against an interface, i.e. is this packet for us? */ +#if LWIP_IGMP + if (ip_addr_ismulticast(&(iphdr->dest))) { + if ((inp->flags & NETIF_FLAG_IGMP) && (igmp_lookfor_group(inp, &(iphdr->dest)))) { + netif = inp; + } else { + netif = NULL; + } + } else +#endif /* LWIP_IGMP */ + { + /* start trying with inp. if that's not acceptable, start walking the + list of configured netifs. + 'first' is used as a boolean to mark whether we started walking the list */ + int first = 1; + netif = inp; + do { + LWIP_DEBUGF(IP_DEBUG, ("ip_input: iphdr->dest 0x%"X32_F" netif->ip_addr 0x%"X32_F" (0x%"X32_F", 0x%"X32_F", 0x%"X32_F")\n", + iphdr->dest.addr, netif->ip_addr.addr, + iphdr->dest.addr & netif->netmask.addr, + netif->ip_addr.addr & netif->netmask.addr, + iphdr->dest.addr & ~(netif->netmask.addr))); + + /* interface is up and configured? */ + if ((netif_is_up(netif)) && (!ip_addr_isany(&(netif->ip_addr)))) { + /* unicast to this interface address? */ + if (ip_addr_cmp(&(iphdr->dest), &(netif->ip_addr)) || + /* or broadcast on this interface network address? */ + ip_addr_isbroadcast(&(iphdr->dest), netif)) { + LWIP_DEBUGF(IP_DEBUG, ("ip_input: packet accepted on interface %c%c\n", + netif->name[0], netif->name[1])); + /* break out of for loop */ + break; + } + } + if (first) { + first = 0; + netif = netif_list; + } else { + netif = netif->next; + } + if (netif == inp) { + netif = netif->next; + } + } while(netif != NULL); + } + +#if LWIP_DHCP + /* Pass DHCP messages regardless of destination address. DHCP traffic is addressed + * using link layer addressing (such as Ethernet MAC) so we must not filter on IP. + * According to RFC 1542 section 3.1.1, referred by RFC 2131). + */ + if (netif == NULL) { + /* remote port is DHCP server? */ + if (IPH_PROTO(iphdr) == IP_PROTO_UDP) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: UDP packet to DHCP client port %"U16_F"\n", + ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdr_hlen))->dest))); + if (ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdr_hlen))->dest) == DHCP_CLIENT_PORT) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: DHCP packet accepted.\n")); + netif = inp; + check_ip_src = 0; + } + } + } +#endif /* LWIP_DHCP */ + + /* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */ +#if LWIP_DHCP + /* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */ + if (check_ip_src && (iphdr->src.addr != 0)) +#endif /* LWIP_DHCP */ + { if ((ip_addr_isbroadcast(&(iphdr->src), inp)) || + (ip_addr_ismulticast(&(iphdr->src)))) { + /* packet source is not valid */ + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip_input: packet source is not valid.\n")); + /* free (drop) packet pbufs */ + pbuf_free(p); + IP_STATS_INC(ip.drop); + snmp_inc_ipinaddrerrors(); + snmp_inc_ipindiscards(); + return ERR_OK; + } + } + + /* packet not for us? */ + if (netif == NULL) { + /* packet not for us, route or discard */ + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: packet not for us.\n")); +#if IP_FORWARD + /* non-broadcast packet? */ + if (!ip_addr_isbroadcast(&(iphdr->dest), inp)) { + /* try to forward IP packet on (other) interfaces */ + ip_forward(p, iphdr, inp); + } else +#endif /* IP_FORWARD */ + { + snmp_inc_ipinaddrerrors(); + snmp_inc_ipindiscards(); + } + pbuf_free(p); + return ERR_OK; + } + /* packet consists of multiple fragments? */ + if ((IPH_OFFSET(iphdr) & htons(IP_OFFMASK | IP_MF)) != 0) { +#if IP_REASSEMBLY /* packet fragment reassembly code present? */ + LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip_reass()\n", + ntohs(IPH_ID(iphdr)), p->tot_len, ntohs(IPH_LEN(iphdr)), !!(IPH_OFFSET(iphdr) & htons(IP_MF)), (ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)*8)); + /* reassemble the packet*/ + p = ip_reass(p); + /* packet not fully reassembled yet? */ + if (p == NULL) { + return ERR_OK; + } + iphdr = p->payload; +#else /* IP_REASSEMBLY == 0, no packet fragment reassembly code present */ + pbuf_free(p); + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP packet dropped since it was fragmented (0x%"X16_F") (while IP_REASSEMBLY == 0).\n", + ntohs(IPH_OFFSET(iphdr)))); + IP_STATS_INC(ip.opterr); + IP_STATS_INC(ip.drop); + /* unsupported protocol feature */ + snmp_inc_ipinunknownprotos(); + return ERR_OK; +#endif /* IP_REASSEMBLY */ + } + +#if IP_OPTIONS_ALLOWED == 0 /* no support for IP options in the IP header? */ + +#if LWIP_IGMP + /* there is an extra "router alert" option in IGMP messages which we allow for but do not police */ + if((iphdr_hlen > IP_HLEN && (IPH_PROTO(iphdr) != IP_PROTO_IGMP)) { +#else + if (iphdr_hlen > IP_HLEN) { +#endif /* LWIP_IGMP */ + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP packet dropped since there were IP options (while IP_OPTIONS_ALLOWED == 0).\n")); + pbuf_free(p); + IP_STATS_INC(ip.opterr); + IP_STATS_INC(ip.drop); + /* unsupported protocol feature */ + snmp_inc_ipinunknownprotos(); + return ERR_OK; + } +#endif /* IP_OPTIONS_ALLOWED == 0 */ + + /* send to upper layers */ + LWIP_DEBUGF(IP_DEBUG, ("ip_input: \n")); + ip_debug_print(p); + LWIP_DEBUGF(IP_DEBUG, ("ip_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len)); + + current_netif = inp; + current_header = iphdr; + +#if LWIP_RAW + /* raw input did not eat the packet? */ + if (raw_input(p, inp) == 0) +#endif /* LWIP_RAW */ + { + + switch (IPH_PROTO(iphdr)) { +#if LWIP_UDP + case IP_PROTO_UDP: +#if LWIP_UDPLITE + case IP_PROTO_UDPLITE: +#endif /* LWIP_UDPLITE */ + snmp_inc_ipindelivers(); + udp_input(p, inp); + break; +#endif /* LWIP_UDP */ +#if LWIP_TCP + case IP_PROTO_TCP: + snmp_inc_ipindelivers(); + tcp_input(p, inp); + break; +#endif /* LWIP_TCP */ +#if LWIP_ICMP + case IP_PROTO_ICMP: + snmp_inc_ipindelivers(); + icmp_input(p, inp); + break; +#endif /* LWIP_ICMP */ +#if LWIP_IGMP + case IP_PROTO_IGMP: + igmp_input(p,inp,&(iphdr->dest)); + break; +#endif /* LWIP_IGMP */ + default: +#if LWIP_ICMP + /* send ICMP destination protocol unreachable unless is was a broadcast */ + if (!ip_addr_isbroadcast(&(iphdr->dest), inp) && + !ip_addr_ismulticast(&(iphdr->dest))) { + p->payload = iphdr; + icmp_dest_unreach(p, ICMP_DUR_PROTO); + } +#endif /* LWIP_ICMP */ + pbuf_free(p); + + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Unsupported transport protocol %"U16_F"\n", IPH_PROTO(iphdr))); + + IP_STATS_INC(ip.proterr); + IP_STATS_INC(ip.drop); + snmp_inc_ipinunknownprotos(); + } + } + + current_netif = NULL; + current_header = NULL; + + return ERR_OK; +} + +/** + * Sends an IP packet on a network interface. This function constructs + * the IP header and calculates the IP header checksum. If the source + * IP address is NULL, the IP address of the outgoing network + * interface is filled in as source address. + * If the destination IP address is IP_HDRINCL, p is assumed to already + * include an IP header and p->payload points to it instead of the data. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param tos the TOS value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * @param netif the netif on which to send this packet + * @return ERR_OK if the packet was sent OK + * ERR_BUF if p doesn't have enough space for IP/LINK headers + * returns errors returned by netif->output + * + * @note ip_id: RFC791 "some host may be able to simply use + * unique identifiers independent of destination" + */ +err_t +ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, + u8_t proto, struct netif *netif) +{ +#if IP_OPTIONS_SEND + return ip_output_if_opt(p, src, dest, ttl, tos, proto, netif, NULL, 0); +} + +/** + * Same as ip_output_if() but with the possibility to include IP options: + * + * @ param ip_options pointer to the IP options, copied into the IP header + * @ param optlen length of ip_options + */ +err_t ip_output_if_opt(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options, + u16_t optlen) +{ +#endif /* IP_OPTIONS_SEND */ + struct ip_hdr *iphdr; + static u16_t ip_id = 0; + + snmp_inc_ipoutrequests(); + + /* Should the IP header be generated or is it already included in p? */ + if (dest != IP_HDRINCL) { + u16_t ip_hlen = IP_HLEN; +#if IP_OPTIONS_SEND + u16_t optlen_aligned = 0; + if (optlen != 0) { + /* round up to a multiple of 4 */ + optlen_aligned = ((optlen + 3) & ~3); + ip_hlen += optlen_aligned; + /* First write in the IP options */ + if (pbuf_header(p, optlen_aligned)) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_output_if_opt: not enough room for IP options in pbuf\n")); + IP_STATS_INC(ip.err); + snmp_inc_ipoutdiscards(); + return ERR_BUF; + } + MEMCPY(p->payload, ip_options, optlen); + if (optlen < optlen_aligned) { + /* zero the remaining bytes */ + memset(((char*)p->payload) + optlen, 0, optlen_aligned - optlen); + } + } +#endif /* IP_OPTIONS_SEND */ + /* generate IP header */ + if (pbuf_header(p, IP_HLEN)) { + LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_output: not enough room for IP header in pbuf\n")); + + IP_STATS_INC(ip.err); + snmp_inc_ipoutdiscards(); + return ERR_BUF; + } + + iphdr = p->payload; + LWIP_ASSERT("check that first pbuf can hold struct ip_hdr", + (p->len >= sizeof(struct ip_hdr))); + + IPH_TTL_SET(iphdr, ttl); + IPH_PROTO_SET(iphdr, proto); + + ip_addr_set(&(iphdr->dest), dest); + + IPH_VHLTOS_SET(iphdr, 4, ip_hlen / 4, tos); + IPH_LEN_SET(iphdr, htons(p->tot_len)); + IPH_OFFSET_SET(iphdr, 0); + IPH_ID_SET(iphdr, htons(ip_id)); + ++ip_id; + + if (ip_addr_isany(src)) { + ip_addr_set(&(iphdr->src), &(netif->ip_addr)); + } else { + ip_addr_set(&(iphdr->src), src); + } + + IPH_CHKSUM_SET(iphdr, 0); +#if CHECKSUM_GEN_IP + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, ip_hlen)); +#endif + } else { + /* IP header already included in p */ + iphdr = p->payload; + dest = &(iphdr->dest); + } + + IP_STATS_INC(ip.xmit); + + LWIP_DEBUGF(IP_DEBUG, ("ip_output_if: %c%c%"U16_F"\n", netif->name[0], netif->name[1], netif->num)); + ip_debug_print(p); + +#if ENABLE_LOOPBACK + if (ip_addr_cmp(dest, &netif->ip_addr)) { + /* Packet to self, enqueue it for loopback */ + LWIP_DEBUGF(IP_DEBUG, ("netif_loop_output()")); + return netif_loop_output(netif, p, dest); + } +#endif /* ENABLE_LOOPBACK */ +#if IP_FRAG + /* don't fragment if interface has mtu set to 0 [loopif] */ + if (netif->mtu && (p->tot_len > netif->mtu)) { + return ip_frag(p,netif,dest); + } +#endif + + LWIP_DEBUGF(IP_DEBUG, ("netif->output()")); + return netif->output(netif, p, dest); +} + +/** + * Simple interface to ip_output_if. It finds the outgoing network + * interface and calls upon ip_output_if to do the actual work. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param tos the TOS value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * + * @return ERR_RTE if no route is found + * see ip_output_if() for more return values + */ +err_t +ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto) +{ + struct netif *netif; + + if ((netif = ip_route(dest)) == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); + IP_STATS_INC(ip.rterr); + return ERR_RTE; + } + + return ip_output_if(p, src, dest, ttl, tos, proto, netif); +} + +#if LWIP_NETIF_HWADDRHINT +/** Like ip_output, but takes and addr_hint pointer that is passed on to netif->addr_hint + * before calling ip_output_if. + * + * @param p the packet to send (p->payload points to the data, e.g. next + protocol header; if dest == IP_HDRINCL, p already includes an IP + header and p->payload points to that IP header) + * @param src the source IP address to send from (if src == IP_ADDR_ANY, the + * IP address of the netif used to send is used as source address) + * @param dest the destination IP address to send the packet to + * @param ttl the TTL value to be set in the IP header + * @param tos the TOS value to be set in the IP header + * @param proto the PROTOCOL to be set in the IP header + * @param addr_hint address hint pointer set to netif->addr_hint before + * calling ip_output_if() + * + * @return ERR_RTE if no route is found + * see ip_output_if() for more return values + */ +err_t +ip_output_hinted(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, u8_t *addr_hint) +{ + struct netif *netif; + err_t err; + + if ((netif = ip_route(dest)) == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); + IP_STATS_INC(ip.rterr); + return ERR_RTE; + } + + netif->addr_hint = addr_hint; + err = ip_output_if(p, src, dest, ttl, tos, proto, netif); + netif->addr_hint = NULL; + + return err; +} +#endif /* LWIP_NETIF_HWADDRHINT*/ + +#if IP_DEBUG +/* Print an IP header by using LWIP_DEBUGF + * @param p an IP packet, p->payload pointing to the IP header + */ +void +ip_debug_print(struct pbuf *p) +{ + struct ip_hdr *iphdr = p->payload; + u8_t *payload; + + payload = (u8_t *)iphdr + IP_HLEN; + + LWIP_DEBUGF(IP_DEBUG, ("IP header:\n")); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("|%2"S16_F" |%2"S16_F" | 0x%02"X16_F" | %5"U16_F" | (v, hl, tos, len)\n", + IPH_V(iphdr), + IPH_HL(iphdr), + IPH_TOS(iphdr), + ntohs(IPH_LEN(iphdr)))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %5"U16_F" |%"U16_F"%"U16_F"%"U16_F"| %4"U16_F" | (id, flags, offset)\n", + ntohs(IPH_ID(iphdr)), + ntohs(IPH_OFFSET(iphdr)) >> 15 & 1, + ntohs(IPH_OFFSET(iphdr)) >> 14 & 1, + ntohs(IPH_OFFSET(iphdr)) >> 13 & 1, + ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | 0x%04"X16_F" | (ttl, proto, chksum)\n", + IPH_TTL(iphdr), + IPH_PROTO(iphdr), + ntohs(IPH_CHKSUM(iphdr)))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (src)\n", + ip4_addr1(&iphdr->src), + ip4_addr2(&iphdr->src), + ip4_addr3(&iphdr->src), + ip4_addr4(&iphdr->src))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (dest)\n", + ip4_addr1(&iphdr->dest), + ip4_addr2(&iphdr->dest), + ip4_addr3(&iphdr->dest), + ip4_addr4(&iphdr->dest))); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); +} +#endif /* IP_DEBUG */ diff --git a/bertos/net/lwip/src/core/ipv4/ip_addr.c b/bertos/net/lwip/src/core/ipv4/ip_addr.c new file mode 100644 index 0000000..94bf467 --- /dev/null +++ b/bertos/net/lwip/src/core/ipv4/ip_addr.c @@ -0,0 +1,84 @@ +/** + * @file + * This is the IPv4 address tools implementation. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" +#include "lwip/ip_addr.h" +#include "lwip/inet.h" +#include "lwip/netif.h" + +#define IP_ADDR_ANY_VALUE 0x00000000UL +#define IP_ADDR_BROADCAST_VALUE 0xffffffffUL + +/* used by IP_ADDR_ANY and IP_ADDR_BROADCAST in ip_addr.h */ +const struct ip_addr ip_addr_any = { IP_ADDR_ANY_VALUE }; +const struct ip_addr ip_addr_broadcast = { IP_ADDR_BROADCAST_VALUE }; + +/** + * Determine if an address is a broadcast address on a network interface + * + * @param addr address to be checked + * @param netif the network interface against which the address is checked + * @return returns non-zero if the address is a broadcast address + */ +u8_t ip_addr_isbroadcast(struct ip_addr *addr, struct netif *netif) +{ + u32_t addr2test; + + addr2test = addr->addr; + /* all ones (broadcast) or all zeroes (old skool broadcast) */ + if ((~addr2test == IP_ADDR_ANY_VALUE) || + (addr2test == IP_ADDR_ANY_VALUE)) + return 1; + /* no broadcast support on this network interface? */ + else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0) + /* the given address cannot be a broadcast address + * nor can we check against any broadcast addresses */ + return 0; + /* address matches network interface address exactly? => no broadcast */ + else if (addr2test == netif->ip_addr.addr) + return 0; + /* on the same (sub) network... */ + else if (ip_addr_netcmp(addr, &(netif->ip_addr), &(netif->netmask)) + /* ...and host identifier bits are all ones? =>... */ + && ((addr2test & ~netif->netmask.addr) == + (IP_ADDR_BROADCAST_VALUE & ~netif->netmask.addr))) + /* => network broadcast address */ + return 1; + else + return 0; +} diff --git a/bertos/net/lwip/src/core/ipv4/ip_frag.c b/bertos/net/lwip/src/core/ipv4/ip_frag.c new file mode 100644 index 0000000..1939d83 --- /dev/null +++ b/bertos/net/lwip/src/core/ipv4/ip_frag.c @@ -0,0 +1,792 @@ +/** + * @file + * This is the IPv4 packet segmentation and reassembly implementation. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Jani Monoses + * Simon Goldschmidt + * original reassembly code by Adam Dunkels + * + */ + +#include "lwip/opt.h" +#include "lwip/ip_frag.h" +#include "lwip/ip.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/netif.h" +#include "lwip/snmp.h" +#include "lwip/stats.h" +#include "lwip/icmp.h" + +#include + +#if IP_REASSEMBLY +/** + * The IP reassembly code currently has the following limitations: + * - IP header options are not supported + * - fragments must not overlap (e.g. due to different routes), + * currently, overlapping or duplicate fragments are thrown away + * if IP_REASS_CHECK_OVERLAP=1 (the default)! + * + * @todo: work with IP header options + */ + +/** Setting this to 0, you can turn off checking the fragments for overlapping + * regions. The code gets a little smaller. Only use this if you know that + * overlapping won't occur on your network! */ +#ifndef IP_REASS_CHECK_OVERLAP +#define IP_REASS_CHECK_OVERLAP 1 +#endif /* IP_REASS_CHECK_OVERLAP */ + +/** Set to 0 to prevent freeing the oldest datagram when the reassembly buffer is + * full (IP_REASS_MAX_PBUFS pbufs are enqueued). The code gets a little smaller. + * Datagrams will be freed by timeout only. Especially useful when MEMP_NUM_REASSDATA + * is set to 1, so one datagram can be reassembled at a time, only. */ +#ifndef IP_REASS_FREE_OLDEST +#define IP_REASS_FREE_OLDEST 1 +#endif /* IP_REASS_FREE_OLDEST */ + +#define IP_REASS_FLAG_LASTFRAG 0x01 + +/** This is a helper struct which holds the starting + * offset and the ending offset of this fragment to + * easily chain the fragments. + * It has to be packed since it has to fit inside the IP header. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_reass_helper { + PACK_STRUCT_FIELD(struct pbuf *next_pbuf); + PACK_STRUCT_FIELD(u16_t start); + PACK_STRUCT_FIELD(u16_t end); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define IP_ADDRESSES_AND_ID_MATCH(iphdrA, iphdrB) \ + (ip_addr_cmp(&(iphdrA)->src, &(iphdrB)->src) && \ + ip_addr_cmp(&(iphdrA)->dest, &(iphdrB)->dest) && \ + IPH_ID(iphdrA) == IPH_ID(iphdrB)) ? 1 : 0 + +/* global variables */ +static struct ip_reassdata *reassdatagrams; +static u16_t ip_reass_pbufcount; + +/* function prototypes */ +static void ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev); +static int ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev); + +/** + * Reassembly timer base function + * for both NO_SYS == 0 and 1 (!). + * + * Should be called every 1000 msec (defined by IP_TMR_INTERVAL). + */ +void +ip_reass_tmr(void) +{ + struct ip_reassdata *r, *prev = NULL; + + r = reassdatagrams; + while (r != NULL) { + /* Decrement the timer. Once it reaches 0, + * clean up the incomplete fragment assembly */ + if (r->timer > 0) { + r->timer--; + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n",(u16_t)r->timer)); + prev = r; + r = r->next; + } else { + /* reassembly timed out */ + struct ip_reassdata *tmp; + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n")); + tmp = r; + /* get the next pointer before freeing */ + r = r->next; + /* free the helper struct and all enqueued pbufs */ + ip_reass_free_complete_datagram(tmp, prev); + } + } +} + +/** + * Free a datagram (struct ip_reassdata) and all its pbufs. + * Updates the total count of enqueued pbufs (ip_reass_pbufcount), + * SNMP counters and sends an ICMP time exceeded packet. + * + * @param ipr datagram to free + * @param prev the previous datagram in the linked list + * @return the number of pbufs freed + */ +static int +ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) +{ + int pbufs_freed = 0; + struct pbuf *p; + struct ip_reass_helper *iprh; + + LWIP_ASSERT("prev != ipr", prev != ipr); + if (prev != NULL) { + LWIP_ASSERT("prev->next == ipr", prev->next == ipr); + } + + snmp_inc_ipreasmfails(); +#if LWIP_ICMP + iprh = (struct ip_reass_helper *)ipr->p->payload; + if (iprh->start == 0) { + /* The first fragment was received, send ICMP time exceeded. */ + /* First, de-queue the first pbuf from r->p. */ + p = ipr->p; + ipr->p = iprh->next_pbuf; + /* Then, copy the original header into it. */ + SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN); + icmp_time_exceeded(p, ICMP_TE_FRAG); + pbufs_freed += pbuf_clen(p); + pbuf_free(p); + } +#endif /* LWIP_ICMP */ + + /* First, free all received pbufs. The individual pbufs need to be released + separately as they have not yet been chained */ + p = ipr->p; + while (p != NULL) { + struct pbuf *pcur; + iprh = (struct ip_reass_helper *)p->payload; + pcur = p; + /* get the next pointer before freeing */ + p = iprh->next_pbuf; + pbufs_freed += pbuf_clen(pcur); + pbuf_free(pcur); + } + /* Then, unchain the struct ip_reassdata from the list and free it. */ + ip_reass_dequeue_datagram(ipr, prev); + LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= pbufs_freed); + ip_reass_pbufcount -= pbufs_freed; + + return pbufs_freed; +} + +#if IP_REASS_FREE_OLDEST +/** + * Free the oldest datagram to make room for enqueueing new fragments. + * The datagram 'fraghdr' belongs to is not freed! + * + * @param fraghdr IP header of the current fragment + * @param pbufs_needed number of pbufs needed to enqueue + * (used for freeing other datagrams if not enough space) + * @return the number of pbufs freed + */ +static int +ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed) +{ + /* @todo Can't we simply remove the last datagram in the + * linked list behind reassdatagrams? + */ + struct ip_reassdata *r, *oldest, *prev; + int pbufs_freed = 0, pbufs_freed_current; + int other_datagrams; + + /* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs, + * but don't free the datagram that 'fraghdr' belongs to! */ + do { + oldest = NULL; + prev = NULL; + other_datagrams = 0; + r = reassdatagrams; + while (r != NULL) { + if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) { + /* Not the same datagram as fraghdr */ + other_datagrams++; + if (oldest == NULL) { + oldest = r; + } else if (r->timer <= oldest->timer) { + /* older than the previous oldest */ + oldest = r; + } + } + if (r->next != NULL) { + prev = r; + } + r = r->next; + } + if (oldest != NULL) { + pbufs_freed_current = ip_reass_free_complete_datagram(oldest, prev); + pbufs_freed += pbufs_freed_current; + } + } while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1)); + return pbufs_freed; +} +#endif /* IP_REASS_FREE_OLDEST */ + +/** + * Enqueues a new fragment into the fragment queue + * @param fraghdr points to the new fragments IP hdr + * @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space) + * @return A pointer to the queue location into which the fragment was enqueued + */ +static struct ip_reassdata* +ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen) +{ + struct ip_reassdata* ipr; + /* No matching previous fragment found, allocate a new reassdata struct */ + ipr = memp_malloc(MEMP_REASSDATA); + if (ipr == NULL) { +#if IP_REASS_FREE_OLDEST + if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) { + ipr = memp_malloc(MEMP_REASSDATA); + } + if (ipr == NULL) +#endif /* IP_REASS_FREE_OLDEST */ + { + IPFRAG_STATS_INC(ip_frag.memerr); + LWIP_DEBUGF(IP_REASS_DEBUG,("Failed to alloc reassdata struct\n")); + return NULL; + } + } + memset(ipr, 0, sizeof(struct ip_reassdata)); + ipr->timer = IP_REASS_MAXAGE; + + /* enqueue the new structure to the front of the list */ + ipr->next = reassdatagrams; + reassdatagrams = ipr; + /* copy the ip header for later tests and input */ + /* @todo: no ip options supported? */ + SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN); + return ipr; +} + +/** + * Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs. + * @param ipr points to the queue entry to dequeue + */ +static void +ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev) +{ + + /* dequeue the reass struct */ + if (reassdatagrams == ipr) { + /* it was the first in the list */ + reassdatagrams = ipr->next; + } else { + /* it wasn't the first, so it must have a valid 'prev' */ + LWIP_ASSERT("sanity check linked list", prev != NULL); + prev->next = ipr->next; + } + + /* now we can free the ip_reass struct */ + memp_free(MEMP_REASSDATA, ipr); +} + +/** + * Chain a new pbuf into the pbuf list that composes the datagram. The pbuf list + * will grow over time as new pbufs are rx. + * Also checks that the datagram passes basic continuity checks (if the last + * fragment was received at least once). + * @param root_p points to the 'root' pbuf for the current datagram being assembled. + * @param new_p points to the pbuf for the current fragment + * @return 0 if invalid, >0 otherwise + */ +static int +ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p) +{ + struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev=NULL; + struct pbuf *q; + u16_t offset,len; + struct ip_hdr *fraghdr; + int valid = 1; + + /* Extract length and fragment offset from current fragment */ + fraghdr = (struct ip_hdr*)new_p->payload; + len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4; + offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8; + + /* overwrite the fragment's ip header from the pbuf with our helper struct, + * and setup the embedded helper structure. */ + /* make sure the struct ip_reass_helper fits into the IP header */ + LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN", + sizeof(struct ip_reass_helper) <= IP_HLEN); + iprh = (struct ip_reass_helper*)new_p->payload; + iprh->next_pbuf = NULL; + iprh->start = offset; + iprh->end = offset + len; + + /* Iterate through until we either get to the end of the list (append), + * or we find on with a larger offset (insert). */ + for (q = ipr->p; q != NULL;) { + iprh_tmp = (struct ip_reass_helper*)q->payload; + if (iprh->start < iprh_tmp->start) { + /* the new pbuf should be inserted before this */ + iprh->next_pbuf = q; + if (iprh_prev != NULL) { + /* not the fragment with the lowest offset */ +#if IP_REASS_CHECK_OVERLAP + if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) { + /* fragment overlaps with previous or following, throw away */ + goto freepbuf; + } +#endif /* IP_REASS_CHECK_OVERLAP */ + iprh_prev->next_pbuf = new_p; + } else { + /* fragment with the lowest offset */ + ipr->p = new_p; + } + break; + } else if(iprh->start == iprh_tmp->start) { + /* received the same datagram twice: no need to keep the datagram */ + goto freepbuf; +#if IP_REASS_CHECK_OVERLAP + } else if(iprh->start < iprh_tmp->end) { + /* overlap: no need to keep the new datagram */ + goto freepbuf; +#endif /* IP_REASS_CHECK_OVERLAP */ + } else { + /* Check if the fragments received so far have no wholes. */ + if (iprh_prev != NULL) { + if (iprh_prev->end != iprh_tmp->start) { + /* There is a fragment missing between the current + * and the previous fragment */ + valid = 0; + } + } + } + q = iprh_tmp->next_pbuf; + iprh_prev = iprh_tmp; + } + + /* If q is NULL, then we made it to the end of the list. Determine what to do now */ + if (q == NULL) { + if (iprh_prev != NULL) { + /* this is (for now), the fragment with the highest offset: + * chain it to the last fragment */ +#if IP_REASS_CHECK_OVERLAP + LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start); +#endif /* IP_REASS_CHECK_OVERLAP */ + iprh_prev->next_pbuf = new_p; + if (iprh_prev->end != iprh->start) { + valid = 0; + } + } else { +#if IP_REASS_CHECK_OVERLAP + LWIP_ASSERT("no previous fragment, this must be the first fragment!", + ipr->p == NULL); +#endif /* IP_REASS_CHECK_OVERLAP */ + /* this is the first fragment we ever received for this ip datagram */ + ipr->p = new_p; + } + } + + /* At this point, the validation part begins: */ + /* If we already received the last fragment */ + if ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0) { + /* and had no wholes so far */ + if (valid) { + /* then check if the rest of the fragments is here */ + /* Check if the queue starts with the first datagram */ + if (((struct ip_reass_helper*)ipr->p->payload)->start != 0) { + valid = 0; + } else { + /* and check that there are no wholes after this datagram */ + iprh_prev = iprh; + q = iprh->next_pbuf; + while (q != NULL) { + iprh = (struct ip_reass_helper*)q->payload; + if (iprh_prev->end != iprh->start) { + valid = 0; + break; + } + iprh_prev = iprh; + q = iprh->next_pbuf; + } + /* if still valid, all fragments are received + * (because to the MF==0 already arrived */ + if (valid) { + LWIP_ASSERT("sanity check", ipr->p != NULL); + LWIP_ASSERT("sanity check", + ((struct ip_reass_helper*)ipr->p->payload) != iprh); + LWIP_ASSERT("validate_datagram:next_pbuf!=NULL", + iprh->next_pbuf == NULL); + LWIP_ASSERT("validate_datagram:datagram end!=datagram len", + iprh->end == ipr->datagram_len); + } + } + } + /* If valid is 0 here, there are some fragments missing in the middle + * (since MF == 0 has already arrived). Such datagrams simply time out if + * no more fragments are received... */ + return valid; + } + /* If we come here, not all fragments were received, yet! */ + return 0; /* not yet valid! */ +#if IP_REASS_CHECK_OVERLAP +freepbuf: + ip_reass_pbufcount -= pbuf_clen(new_p); + pbuf_free(new_p); + return 0; +#endif /* IP_REASS_CHECK_OVERLAP */ +} + +/** + * Reassembles incoming IP fragments into an IP datagram. + * + * @param p points to a pbuf chain of the fragment + * @return NULL if reassembly is incomplete, ? otherwise + */ +struct pbuf * +ip_reass(struct pbuf *p) +{ + struct pbuf *r; + struct ip_hdr *fraghdr; + struct ip_reassdata *ipr; + struct ip_reass_helper *iprh; + u16_t offset, len; + u8_t clen; + struct ip_reassdata *ipr_prev = NULL; + + IPFRAG_STATS_INC(ip_frag.recv); + snmp_inc_ipreasmreqds(); + + fraghdr = (struct ip_hdr*)p->payload; + + if ((IPH_HL(fraghdr) * 4) != IP_HLEN) { + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: IP options currently not supported!\n")); + IPFRAG_STATS_INC(ip_frag.err); + goto nullreturn; + } + + offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8; + len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4; + + /* Check if we are allowed to enqueue more datagrams. */ + clen = pbuf_clen(p); + if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) { +#if IP_REASS_FREE_OLDEST + if (!ip_reass_remove_oldest_datagram(fraghdr, clen) || + ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS)) +#endif /* IP_REASS_FREE_OLDEST */ + { + /* No datagram could be freed and still too many pbufs enqueued */ + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: Overflow condition: pbufct=%d, clen=%d, MAX=%d\n", + ip_reass_pbufcount, clen, IP_REASS_MAX_PBUFS)); + IPFRAG_STATS_INC(ip_frag.memerr); + /* @todo: send ICMP time exceeded here? */ + /* drop this pbuf */ + goto nullreturn; + } + } + + /* Look for the datagram the fragment belongs to in the current datagram queue, + * remembering the previous in the queue for later dequeueing. */ + for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) { + /* Check if the incoming fragment matches the one currently present + in the reassembly buffer. If so, we proceed with copying the + fragment into the buffer. */ + if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) { + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: matching previous fragment ID=%"X16_F"\n", + ntohs(IPH_ID(fraghdr)))); + IPFRAG_STATS_INC(ip_frag.cachehit); + break; + } + ipr_prev = ipr; + } + + if (ipr == NULL) { + /* Enqueue a new datagram into the datagram queue */ + ipr = ip_reass_enqueue_new_datagram(fraghdr, clen); + /* Bail if unable to enqueue */ + if(ipr == NULL) { + goto nullreturn; + } + } else { + if (((ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) && + ((ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) { + /* ipr->iphdr is not the header from the first fragment, but fraghdr is + * -> copy fraghdr into ipr->iphdr since we want to have the header + * of the first fragment (for ICMP time exceeded and later, for copying + * all options, if supported)*/ + SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN); + } + } + /* Track the current number of pbufs current 'in-flight', in order to limit + the number of fragments that may be enqueued at any one time */ + ip_reass_pbufcount += clen; + + /* At this point, we have either created a new entry or pointing + * to an existing one */ + + /* check for 'no more fragments', and update queue entry*/ + if ((ntohs(IPH_OFFSET(fraghdr)) & IP_MF) == 0) { + ipr->flags |= IP_REASS_FLAG_LASTFRAG; + ipr->datagram_len = offset + len; + LWIP_DEBUGF(IP_REASS_DEBUG, + ("ip_reass: last fragment seen, total len %"S16_F"\n", + ipr->datagram_len)); + } + /* find the right place to insert this pbuf */ + /* @todo: trim pbufs if fragments are overlapping */ + if (ip_reass_chain_frag_into_datagram_and_validate(ipr, p)) { + /* the totally last fragment (flag more fragments = 0) was received at least + * once AND all fragments are received */ + ipr->datagram_len += IP_HLEN; + + /* save the second pbuf before copying the header over the pointer */ + r = ((struct ip_reass_helper*)ipr->p->payload)->next_pbuf; + + /* copy the original ip header back to the first pbuf */ + fraghdr = (struct ip_hdr*)(ipr->p->payload); + SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN); + IPH_LEN_SET(fraghdr, htons(ipr->datagram_len)); + IPH_OFFSET_SET(fraghdr, 0); + IPH_CHKSUM_SET(fraghdr, 0); + /* @todo: do we need to set calculate the correct checksum? */ + IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN)); + + p = ipr->p; + + /* chain together the pbufs contained within the reass_data list. */ + while(r != NULL) { + iprh = (struct ip_reass_helper*)r->payload; + + /* hide the ip header for every succeding fragment */ + pbuf_header(r, -IP_HLEN); + pbuf_cat(p, r); + r = iprh->next_pbuf; + } + /* release the sources allocate for the fragment queue entry */ + ip_reass_dequeue_datagram(ipr, ipr_prev); + + /* and adjust the number of pbufs currently queued for reassembly. */ + ip_reass_pbufcount -= pbuf_clen(p); + + /* Return the pbuf chain */ + return p; + } + /* the datagram is not (yet?) reassembled completely */ + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount)); + return NULL; + +nullreturn: + LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: nullreturn\n")); + IPFRAG_STATS_INC(ip_frag.drop); + pbuf_free(p); + return NULL; +} +#endif /* IP_REASSEMBLY */ + +#if IP_FRAG +#if IP_FRAG_USES_STATIC_BUF +static u8_t buf[LWIP_MEM_ALIGN_SIZE(IP_FRAG_MAX_MTU + MEM_ALIGNMENT - 1)]; +#endif /* IP_FRAG_USES_STATIC_BUF */ + +/** + * Fragment an IP datagram if too large for the netif. + * + * Chop the datagram in MTU sized chunks and send them in order + * by using a fixed size static memory buffer (PBUF_REF) or + * point PBUF_REFs into p (depending on IP_FRAG_USES_STATIC_BUF). + * + * @param p ip packet to send + * @param netif the netif on which to send + * @param dest destination ip address to which to send + * + * @return ERR_OK if sent successfully, err_t otherwise + */ +err_t +ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest) +{ + struct pbuf *rambuf; +#if IP_FRAG_USES_STATIC_BUF + struct pbuf *header; +#else + struct pbuf *newpbuf; + struct ip_hdr *original_iphdr; +#endif + struct ip_hdr *iphdr; + u16_t nfb; + u16_t left, cop; + u16_t mtu = netif->mtu; + u16_t ofo, omf; + u16_t last; + u16_t poff = IP_HLEN; + u16_t tmp; +#if !IP_FRAG_USES_STATIC_BUF + u16_t newpbuflen = 0; + u16_t left_to_copy; +#endif + + /* Get a RAM based MTU sized pbuf */ +#if IP_FRAG_USES_STATIC_BUF + /* When using a static buffer, we use a PBUF_REF, which we will + * use to reference the packet (without link header). + * Layer and length is irrelevant. + */ + rambuf = pbuf_alloc(PBUF_LINK, 0, PBUF_REF); + if (rambuf == NULL) { + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_frag: pbuf_alloc(PBUF_LINK, 0, PBUF_REF) failed\n")); + return ERR_MEM; + } + rambuf->tot_len = rambuf->len = mtu; + rambuf->payload = LWIP_MEM_ALIGN((void *)buf); + + /* Copy the IP header in it */ + iphdr = rambuf->payload; + SMEMCPY(iphdr, p->payload, IP_HLEN); +#else /* IP_FRAG_USES_STATIC_BUF */ + original_iphdr = p->payload; + iphdr = original_iphdr; +#endif /* IP_FRAG_USES_STATIC_BUF */ + + /* Save original offset */ + tmp = ntohs(IPH_OFFSET(iphdr)); + ofo = tmp & IP_OFFMASK; + omf = tmp & IP_MF; + + left = p->tot_len - IP_HLEN; + + nfb = (mtu - IP_HLEN) / 8; + + while (left) { + last = (left <= mtu - IP_HLEN); + + /* Set new offset and MF flag */ + tmp = omf | (IP_OFFMASK & (ofo)); + if (!last) + tmp = tmp | IP_MF; + + /* Fill this fragment */ + cop = last ? left : nfb * 8; + +#if IP_FRAG_USES_STATIC_BUF + poff += pbuf_copy_partial(p, (u8_t*)iphdr + IP_HLEN, cop, poff); +#else /* IP_FRAG_USES_STATIC_BUF */ + /* When not using a static buffer, create a chain of pbufs. + * The first will be a PBUF_RAM holding the link and IP header. + * The rest will be PBUF_REFs mirroring the pbuf chain to be fragged, + * but limited to the size of an mtu. + */ + rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM); + if (rambuf == NULL) { + return ERR_MEM; + } + LWIP_ASSERT("this needs a pbuf in one piece!", + (p->len >= (IP_HLEN))); + SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN); + iphdr = rambuf->payload; + + /* Can just adjust p directly for needed offset. */ + p->payload = (u8_t *)p->payload + poff; + p->len -= poff; + + left_to_copy = cop; + while (left_to_copy) { + newpbuflen = (left_to_copy < p->len) ? left_to_copy : p->len; + /* Is this pbuf already empty? */ + if (!newpbuflen) { + p = p->next; + continue; + } + newpbuf = pbuf_alloc(PBUF_RAW, 0, PBUF_REF); + if (newpbuf == NULL) { + pbuf_free(rambuf); + return ERR_MEM; + } + /* Mirror this pbuf, although we might not need all of it. */ + newpbuf->payload = p->payload; + newpbuf->len = newpbuf->tot_len = newpbuflen; + /* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain + * so that it is removed when pbuf_dechain is later called on rambuf. + */ + pbuf_cat(rambuf, newpbuf); + left_to_copy -= newpbuflen; + if (left_to_copy) + p = p->next; + } + poff = newpbuflen; +#endif /* IP_FRAG_USES_STATIC_BUF */ + + /* Correct header */ + IPH_OFFSET_SET(iphdr, htons(tmp)); + IPH_LEN_SET(iphdr, htons(cop + IP_HLEN)); + IPH_CHKSUM_SET(iphdr, 0); + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); + +#if IP_FRAG_USES_STATIC_BUF + if (last) + pbuf_realloc(rambuf, left + IP_HLEN); + + /* This part is ugly: we alloc a RAM based pbuf for + * the link level header for each chunk and then + * free it.A PBUF_ROM style pbuf for which pbuf_header + * worked would make things simpler. + */ + header = pbuf_alloc(PBUF_LINK, 0, PBUF_RAM); + if (header != NULL) { + pbuf_chain(header, rambuf); + netif->output(netif, header, dest); + IPFRAG_STATS_INC(ip_frag.xmit); + snmp_inc_ipfragcreates(); + pbuf_free(header); + } else { + LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_frag: pbuf_alloc() for header failed\n")); + pbuf_free(rambuf); + return ERR_MEM; + } +#else /* IP_FRAG_USES_STATIC_BUF */ + /* No need for separate header pbuf - we allowed room for it in rambuf + * when allocated. + */ + netif->output(netif, rambuf, dest); + IPFRAG_STATS_INC(ip_frag.xmit); + + /* Unfortunately we can't reuse rambuf - the hardware may still be + * using the buffer. Instead we free it (and the ensuing chain) and + * recreate it next time round the loop. If we're lucky the hardware + * will have already sent the packet, the free will really free, and + * there will be zero memory penalty. + */ + + pbuf_free(rambuf); +#endif /* IP_FRAG_USES_STATIC_BUF */ + left -= cop; + ofo += nfb; + } +#if IP_FRAG_USES_STATIC_BUF + pbuf_free(rambuf); +#endif /* IP_FRAG_USES_STATIC_BUF */ + snmp_inc_ipfragoks(); + return ERR_OK; +} +#endif /* IP_FRAG */ diff --git a/bertos/net/lwip/src/core/ipv6/README b/bertos/net/lwip/src/core/ipv6/README new file mode 100644 index 0000000..3620004 --- /dev/null +++ b/bertos/net/lwip/src/core/ipv6/README @@ -0,0 +1 @@ +IPv6 support in lwIP is very experimental. diff --git a/bertos/net/lwip/src/core/ipv6/icmp6.c b/bertos/net/lwip/src/core/ipv6/icmp6.c new file mode 100644 index 0000000..4fcc895 --- /dev/null +++ b/bertos/net/lwip/src/core/ipv6/icmp6.c @@ -0,0 +1,179 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +/* Some ICMP messages should be passed to the transport protocols. This + is not implemented. */ + +#include "lwip/opt.h" + +#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/icmp.h" +#include "lwip/inet.h" +#include "lwip/ip.h" +#include "lwip/def.h" +#include "lwip/stats.h" + +void +icmp_input(struct pbuf *p, struct netif *inp) +{ + u8_t type; + struct icmp_echo_hdr *iecho; + struct ip_hdr *iphdr; + struct ip_addr tmpaddr; + + ICMP_STATS_INC(icmp.recv); + + /* TODO: check length before accessing payload! */ + + type = ((u8_t *)p->payload)[0]; + + switch (type) { + case ICMP6_ECHO: + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n")); + + if (p->tot_len < sizeof(struct icmp_echo_hdr)) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n")); + + pbuf_free(p); + ICMP_STATS_INC(icmp.lenerr); + return; + } + iecho = p->payload; + iphdr = (struct ip_hdr *)((u8_t *)p->payload - IP_HLEN); + if (inet_chksum_pbuf(p) != 0) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo (%"X16_F")\n", inet_chksum_pseudo(p, &(iphdr->src), &(iphdr->dest), IP_PROTO_ICMP, p->tot_len))); + ICMP_STATS_INC(icmp.chkerr); + /* return;*/ + } + LWIP_DEBUGF(ICMP_DEBUG, ("icmp: p->len %"S16_F" p->tot_len %"S16_F"\n", p->len, p->tot_len)); + ip_addr_set(&tmpaddr, &(iphdr->src)); + ip_addr_set(&(iphdr->src), &(iphdr->dest)); + ip_addr_set(&(iphdr->dest), &tmpaddr); + iecho->type = ICMP6_ER; + /* adjust the checksum */ + if (iecho->chksum >= htons(0xffff - (ICMP6_ECHO << 8))) { + iecho->chksum += htons(ICMP6_ECHO << 8) + 1; + } else { + iecho->chksum += htons(ICMP6_ECHO << 8); + } + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo (%"X16_F")\n", inet_chksum_pseudo(p, &(iphdr->src), &(iphdr->dest), IP_PROTO_ICMP, p->tot_len))); + ICMP_STATS_INC(icmp.xmit); + + /* LWIP_DEBUGF("icmp: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len);*/ + ip_output_if (p, &(iphdr->src), IP_HDRINCL, + iphdr->hoplim, IP_PROTO_ICMP, inp); + break; + default: + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" not supported.\n", (s16_t)type)); + ICMP_STATS_INC(icmp.proterr); + ICMP_STATS_INC(icmp.drop); + } + + pbuf_free(p); +} + +void +icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t) +{ + struct pbuf *q; + struct ip_hdr *iphdr; + struct icmp_dur_hdr *idur; + + /* @todo: can this be PBUF_LINK instead of PBUF_IP? */ + q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); + /* ICMP header + IP header + 8 bytes of data */ + if (q == NULL) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_dest_unreach: failed to allocate pbuf for ICMP packet.\n")); + pbuf_free(p); + return; + } + LWIP_ASSERT("check that first pbuf can hold icmp message", + (q->len >= (8 + IP_HLEN + 8))); + + iphdr = p->payload; + + idur = q->payload; + idur->type = (u8_t)ICMP6_DUR; + idur->icode = (u8_t)t; + + SMEMCPY((u8_t *)q->payload + 8, p->payload, IP_HLEN + 8); + + /* calculate checksum */ + idur->chksum = 0; + idur->chksum = inet_chksum(idur, q->len); + ICMP_STATS_INC(icmp.xmit); + + ip_output(q, NULL, + (struct ip_addr *)&(iphdr->src), ICMP_TTL, IP_PROTO_ICMP); + pbuf_free(q); +} + +void +icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t) +{ + struct pbuf *q; + struct ip_hdr *iphdr; + struct icmp_te_hdr *tehdr; + + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded\n")); + + /* @todo: can this be PBUF_LINK instead of PBUF_IP? */ + q = pbuf_alloc(PBUF_IP, 8 + IP_HLEN + 8, PBUF_RAM); + /* ICMP header + IP header + 8 bytes of data */ + if (q == NULL) { + LWIP_DEBUGF(ICMP_DEBUG, ("icmp_dest_unreach: failed to allocate pbuf for ICMP packet.\n")); + pbuf_free(p); + return; + } + LWIP_ASSERT("check that first pbuf can hold icmp message", + (q->len >= (8 + IP_HLEN + 8))); + + iphdr = p->payload; + + tehdr = q->payload; + tehdr->type = (u8_t)ICMP6_TE; + tehdr->icode = (u8_t)t; + + /* copy fields from original packet */ + SMEMCPY((u8_t *)q->payload + 8, (u8_t *)p->payload, IP_HLEN + 8); + + /* calculate checksum */ + tehdr->chksum = 0; + tehdr->chksum = inet_chksum(tehdr, q->len); + ICMP_STATS_INC(icmp.xmit); + ip_output(q, NULL, + (struct ip_addr *)&(iphdr->src), ICMP_TTL, IP_PROTO_ICMP); + pbuf_free(q); +} + +#endif /* LWIP_ICMP */ diff --git a/bertos/net/lwip/src/core/ipv6/inet6.c b/bertos/net/lwip/src/core/ipv6/inet6.c new file mode 100644 index 0000000..c3de85c --- /dev/null +++ b/bertos/net/lwip/src/core/ipv6/inet6.c @@ -0,0 +1,163 @@ +/** + * @file + * Functions common to all TCP/IPv6 modules, such as the Internet checksum and the + * byte order functions. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/def.h" +#include "lwip/inet.h" + +/* chksum: + * + * Sums up all 16 bit words in a memory portion. Also includes any odd byte. + * This function is used by the other checksum functions. + * + * For now, this is not optimized. Must be optimized for the particular processor + * arcitecture on which it is to run. Preferebly coded in assembler. + */ + +static u32_t +chksum(void *dataptr, u16_t len) +{ + u16_t *sdataptr = dataptr; + u32_t acc; + + + for(acc = 0; len > 1; len -= 2) { + acc += *sdataptr++; + } + + /* add up any odd byte */ + if (len == 1) { + acc += htons((u16_t)(*(u8_t *)dataptr) << 8); + } + + return acc; + +} + +/* inet_chksum_pseudo: + * + * Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain. + */ + +u16_t +inet_chksum_pseudo(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u32_t proto_len) +{ + u32_t acc; + struct pbuf *q; + u8_t swapped, i; + + acc = 0; + swapped = 0; + for(q = p; q != NULL; q = q->next) { + acc += chksum(q->payload, q->len); + while (acc >> 16) { + acc = (acc & 0xffff) + (acc >> 16); + } + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = ((acc & 0xff) << 8) | ((acc & 0xff00) >> 8); + } + } + + if (swapped) { + acc = ((acc & 0xff) << 8) | ((acc & 0xff00) >> 8); + } + + for(i = 0; i < 8; i++) { + acc += ((u16_t *)src->addr)[i] & 0xffff; + acc += ((u16_t *)dest->addr)[i] & 0xffff; + while (acc >> 16) { + acc = (acc & 0xffff) + (acc >> 16); + } + } + acc += (u16_t)htons((u16_t)proto); + acc += ((u16_t *)&proto_len)[0] & 0xffff; + acc += ((u16_t *)&proto_len)[1] & 0xffff; + + while (acc >> 16) { + acc = (acc & 0xffff) + (acc >> 16); + } + return ~(acc & 0xffff); +} + +/* inet_chksum: + * + * Calculates the Internet checksum over a portion of memory. Used primarely for IP + * and ICMP. + */ + +u16_t +inet_chksum(void *dataptr, u16_t len) +{ + u32_t acc, sum; + + acc = chksum(dataptr, len); + sum = (acc & 0xffff) + (acc >> 16); + sum += (sum >> 16); + return ~(sum & 0xffff); +} + +u16_t +inet_chksum_pbuf(struct pbuf *p) +{ + u32_t acc; + struct pbuf *q; + u8_t swapped; + + acc = 0; + swapped = 0; + for(q = p; q != NULL; q = q->next) { + acc += chksum(q->payload, q->len); + while (acc >> 16) { + acc = (acc & 0xffff) + (acc >> 16); + } + if (q->len % 2 != 0) { + swapped = 1 - swapped; + acc = (acc & 0xff << 8) | (acc & 0xff00 >> 8); + } + } + + if (swapped) { + acc = ((acc & 0xff) << 8) | ((acc & 0xff00) >> 8); + } + return ~(acc & 0xffff); +} diff --git a/bertos/net/lwip/src/core/ipv6/ip6.c b/bertos/net/lwip/src/core/ipv6/ip6.c new file mode 100644 index 0000000..7e43420 --- /dev/null +++ b/bertos/net/lwip/src/core/ipv6/ip6.c @@ -0,0 +1,397 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + + + +/* ip.c + * + * This is the code for the IP layer for IPv6. + * + */ + + +#include "lwip/opt.h" + +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/ip.h" +#include "lwip/inet.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/udp.h" +#include "lwip/tcp.h" + +#include "lwip/stats.h" + +#include "arch/perf.h" + +/* ip_init: + * + * Initializes the IP layer. + */ + +void +ip_init(void) +{ +} + +/* ip_route: + * + * Finds the appropriate network interface for a given IP address. It searches the + * list of network interfaces linearly. A match is found if the masked IP address of + * the network interface equals the masked IP address given to the function. + */ + +struct netif * +ip_route(struct ip_addr *dest) +{ + struct netif *netif; + + for(netif = netif_list; netif != NULL; netif = netif->next) { + if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) { + return netif; + } + } + + return netif_default; +} + +/* ip_forward: + * + * Forwards an IP packet. It finds an appropriate route for the packet, decrements + * the TTL value of the packet, adjusts the checksum and outputs the packet on the + * appropriate interface. + */ + +static void +ip_forward(struct pbuf *p, struct ip_hdr *iphdr) +{ + struct netif *netif; + + PERF_START; + + if ((netif = ip_route((struct ip_addr *)&(iphdr->dest))) == NULL) { + + LWIP_DEBUGF(IP_DEBUG, ("ip_input: no forwarding route found for ")); +#if IP_DEBUG + ip_addr_debug_print(IP_DEBUG, ((struct ip_addr *)&(iphdr->dest))); +#endif /* IP_DEBUG */ + LWIP_DEBUGF(IP_DEBUG, ("\n")); + pbuf_free(p); + return; + } + /* Decrement TTL and send ICMP if ttl == 0. */ + if (--iphdr->hoplim == 0) { +#if LWIP_ICMP + /* Don't send ICMP messages in response to ICMP messages */ + if (iphdr->nexthdr != IP_PROTO_ICMP) { + icmp_time_exceeded(p, ICMP_TE_TTL); + } +#endif /* LWIP_ICMP */ + pbuf_free(p); + return; + } + + /* Incremental update of the IP checksum. */ + /* if (iphdr->chksum >= htons(0xffff - 0x100)) { + iphdr->chksum += htons(0x100) + 1; + } else { + iphdr->chksum += htons(0x100); + }*/ + + + LWIP_DEBUGF(IP_DEBUG, ("ip_forward: forwarding packet to ")); +#if IP_DEBUG + ip_addr_debug_print(IP_DEBUG, ((struct ip_addr *)&(iphdr->dest))); +#endif /* IP_DEBUG */ + LWIP_DEBUGF(IP_DEBUG, ("\n")); + + IP_STATS_INC(ip.fw); + IP_STATS_INC(ip.xmit); + + PERF_STOP("ip_forward"); + + netif->output(netif, p, (struct ip_addr *)&(iphdr->dest)); +} + +/* ip_input: + * + * This function is called by the network interface device driver when an IP packet is + * received. The function does the basic checks of the IP header such as packet size + * being at least larger than the header size etc. If the packet was not destined for + * us, the packet is forwarded (using ip_forward). The IP checksum is always checked. + * + * Finally, the packet is sent to the upper layer protocol input function. + */ + +void +ip_input(struct pbuf *p, struct netif *inp) { + struct ip_hdr *iphdr; + struct netif *netif; + + + PERF_START; + +#if IP_DEBUG + ip_debug_print(p); +#endif /* IP_DEBUG */ + + + IP_STATS_INC(ip.recv); + + /* identify the IP header */ + iphdr = p->payload; + + + if (iphdr->v != 6) { + LWIP_DEBUGF(IP_DEBUG, ("IP packet dropped due to bad version number\n")); +#if IP_DEBUG + ip_debug_print(p); +#endif /* IP_DEBUG */ + pbuf_free(p); + IP_STATS_INC(ip.err); + IP_STATS_INC(ip.drop); + return; + } + + /* is this packet for us? */ + for(netif = netif_list; netif != NULL; netif = netif->next) { +#if IP_DEBUG + LWIP_DEBUGF(IP_DEBUG, ("ip_input: iphdr->dest ")); + ip_addr_debug_print(IP_DEBUG, ((struct ip_addr *)&(iphdr->dest))); + LWIP_DEBUGF(IP_DEBUG, ("netif->ip_addr ")); + ip_addr_debug_print(IP_DEBUG, ((struct ip_addr *)&(iphdr->dest))); + LWIP_DEBUGF(IP_DEBUG, ("\n")); +#endif /* IP_DEBUG */ + if (ip_addr_cmp(&(iphdr->dest), &(netif->ip_addr))) { + break; + } + } + + + if (netif == NULL) { + /* packet not for us, route or discard */ +#if IP_FORWARD + ip_forward(p, iphdr); +#endif + pbuf_free(p); + return; + } + + pbuf_realloc(p, IP_HLEN + ntohs(iphdr->len)); + + /* send to upper layers */ +#if IP_DEBUG + /* LWIP_DEBUGF("ip_input: \n"); + ip_debug_print(p); + LWIP_DEBUGF("ip_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len);*/ +#endif /* IP_DEBUG */ + + if(pbuf_header(p, -IP_HLEN)) { + LWIP_ASSERT("Can't move over header in packet", 0); + return; + } + + switch (iphdr->nexthdr) { + case IP_PROTO_UDP: + udp_input(p, inp); + break; + case IP_PROTO_TCP: + tcp_input(p, inp); + break; +#if LWIP_ICMP + case IP_PROTO_ICMP: + icmp_input(p, inp); + break; +#endif /* LWIP_ICMP */ + default: +#if LWIP_ICMP + /* send ICMP destination protocol unreachable */ + icmp_dest_unreach(p, ICMP_DUR_PROTO); +#endif /* LWIP_ICMP */ + pbuf_free(p); + LWIP_DEBUGF(IP_DEBUG, ("Unsupported transport protocol %"U16_F"\n", + iphdr->nexthdr)); + + IP_STATS_INC(ip.proterr); + IP_STATS_INC(ip.drop); + } + PERF_STOP("ip_input"); +} + + +/* ip_output_if: + * + * Sends an IP packet on a network interface. This function constructs the IP header + * and calculates the IP header checksum. If the source IP address is NULL, + * the IP address of the outgoing network interface is filled in as source address. + */ + +err_t +ip_output_if (struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, + u8_t proto, struct netif *netif) +{ + struct ip_hdr *iphdr; + + PERF_START; + + LWIP_DEBUGF(IP_DEBUG, ("len %"U16_F" tot_len %"U16_F"\n", p->len, p->tot_len)); + if (pbuf_header(p, IP_HLEN)) { + LWIP_DEBUGF(IP_DEBUG, ("ip_output: not enough room for IP header in pbuf\n")); + IP_STATS_INC(ip.err); + + return ERR_BUF; + } + LWIP_DEBUGF(IP_DEBUG, ("len %"U16_F" tot_len %"U16_F"\n", p->len, p->tot_len)); + + iphdr = p->payload; + + + if (dest != IP_HDRINCL) { + LWIP_DEBUGF(IP_DEBUG, ("!IP_HDRLINCL\n")); + iphdr->hoplim = ttl; + iphdr->nexthdr = proto; + iphdr->len = htons(p->tot_len - IP_HLEN); + ip_addr_set(&(iphdr->dest), dest); + + iphdr->v = 6; + + if (ip_addr_isany(src)) { + ip_addr_set(&(iphdr->src), &(netif->ip_addr)); + } else { + ip_addr_set(&(iphdr->src), src); + } + + } else { + dest = &(iphdr->dest); + } + + IP_STATS_INC(ip.xmit); + + LWIP_DEBUGF(IP_DEBUG, ("ip_output_if: %c%c (len %"U16_F")\n", netif->name[0], netif->name[1], p->tot_len)); +#if IP_DEBUG + ip_debug_print(p); +#endif /* IP_DEBUG */ + + PERF_STOP("ip_output_if"); + return netif->output(netif, p, dest); +} + +/* ip_output: + * + * Simple interface to ip_output_if. It finds the outgoing network interface and + * calls upon ip_output_if to do the actual work. + */ + +err_t +ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t proto) +{ + struct netif *netif; + if ((netif = ip_route(dest)) == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); + IP_STATS_INC(ip.rterr); + return ERR_RTE; + } + + return ip_output_if (p, src, dest, ttl, proto, netif); +} + +#if LWIP_NETIF_HWADDRHINT +err_t +ip_output_hinted(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, u8_t *addr_hint) +{ + struct netif *netif; + err_t err; + + if ((netif = ip_route(dest)) == NULL) { + LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr)); + IP_STATS_INC(ip.rterr); + return ERR_RTE; + } + + netif->addr_hint = addr_hint; + err = ip_output_if(p, src, dest, ttl, tos, proto, netif); + netif->addr_hint = NULL; + + return err; +} +#endif /* LWIP_NETIF_HWADDRHINT*/ + +#if IP_DEBUG +void +ip_debug_print(struct pbuf *p) +{ + struct ip_hdr *iphdr = p->payload; + + LWIP_DEBUGF(IP_DEBUG, ("IP header:\n")); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("|%2"S16_F" | %"X16_F"%"X16_F" | %"X16_F"%"X16_F" | (v, traffic class, flow label)\n", + iphdr->v, + iphdr->tclass1, iphdr->tclass2, + iphdr->flow1, iphdr->flow2)); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %5"U16_F" | %2"U16_F" | %2"U16_F" | (len, nexthdr, hoplim)\n", + ntohs(iphdr->len), + iphdr->nexthdr, + iphdr->hoplim)); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", + (ntohl(iphdr->src.addr[0]) >> 16) & 0xffff, + ntohl(iphdr->src.addr[0]) & 0xffff)); + LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", + (ntohl(iphdr->src.addr[1]) >> 16) & 0xffff, + ntohl(iphdr->src.addr[1]) & 0xffff)); + LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", + (ntohl(iphdr->src.addr[2]) >> 16) & 0xffff, + ntohl(iphdr->src.addr[2]) & 0xffff)); + LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (src)\n", + (ntohl(iphdr->src.addr[3]) >> 16) & 0xffff, + ntohl(iphdr->src.addr[3]) & 0xffff)); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", + (ntohl(iphdr->dest.addr[0]) >> 16) & 0xffff, + ntohl(iphdr->dest.addr[0]) & 0xffff)); + LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", + (ntohl(iphdr->dest.addr[1]) >> 16) & 0xffff, + ntohl(iphdr->dest.addr[1]) & 0xffff)); + LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", + (ntohl(iphdr->dest.addr[2]) >> 16) & 0xffff, + ntohl(iphdr->dest.addr[2]) & 0xffff)); + LWIP_DEBUGF(IP_DEBUG, ("| %4"X32_F" | %4"X32_F" | (dest)\n", + (ntohl(iphdr->dest.addr[3]) >> 16) & 0xffff, + ntohl(iphdr->dest.addr[3]) & 0xffff)); + LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n")); +} +#endif /* IP_DEBUG */ diff --git a/bertos/net/lwip/src/core/ipv6/ip6_addr.c b/bertos/net/lwip/src/core/ipv6/ip6_addr.c new file mode 100644 index 0000000..2da6cea --- /dev/null +++ b/bertos/net/lwip/src/core/ipv6/ip6_addr.c @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" +#include "lwip/ip_addr.h" +#include "lwip/inet.h" + +u8_t +ip_addr_netcmp(struct ip_addr *addr1, struct ip_addr *addr2, + struct ip_addr *mask) +{ + return((addr1->addr[0] & mask->addr[0]) == (addr2->addr[0] & mask->addr[0]) && + (addr1->addr[1] & mask->addr[1]) == (addr2->addr[1] & mask->addr[1]) && + (addr1->addr[2] & mask->addr[2]) == (addr2->addr[2] & mask->addr[2]) && + (addr1->addr[3] & mask->addr[3]) == (addr2->addr[3] & mask->addr[3])); + +} + +u8_t +ip_addr_cmp(struct ip_addr *addr1, struct ip_addr *addr2) +{ + return(addr1->addr[0] == addr2->addr[0] && + addr1->addr[1] == addr2->addr[1] && + addr1->addr[2] == addr2->addr[2] && + addr1->addr[3] == addr2->addr[3]); +} + +void +ip_addr_set(struct ip_addr *dest, struct ip_addr *src) +{ + SMEMCPY(dest, src, sizeof(struct ip_addr)); + /* dest->addr[0] = src->addr[0]; + dest->addr[1] = src->addr[1]; + dest->addr[2] = src->addr[2]; + dest->addr[3] = src->addr[3];*/ +} + +u8_t +ip_addr_isany(struct ip_addr *addr) +{ + if (addr == NULL) return 1; + return((addr->addr[0] | addr->addr[1] | addr->addr[2] | addr->addr[3]) == 0); +} diff --git a/bertos/net/lwip/src/core/mem.c b/bertos/net/lwip/src/core/mem.c new file mode 100644 index 0000000..7928e3b --- /dev/null +++ b/bertos/net/lwip/src/core/mem.c @@ -0,0 +1,633 @@ +/** + * @file + * Dynamic memory manager + * + * This is a lightweight replacement for the standard C library malloc(). + * + * If you want to use the standard C library malloc() instead, define + * MEM_LIBC_MALLOC to 1 in your lwipopts.h + * + * To let mem_malloc() use pools (prevents fragmentation and is much faster than + * a heap but might waste some memory), define MEM_USE_POOLS to 1, define + * MEM_USE_CUSTOM_POOLS to 1 and create a file "lwippools.h" that includes a list + * of pools like this (more pools can be added between _START and _END): + * + * Define three pools with sizes 256, 512, and 1512 bytes + * LWIP_MALLOC_MEMPOOL_START + * LWIP_MALLOC_MEMPOOL(20, 256) + * LWIP_MALLOC_MEMPOOL(10, 512) + * LWIP_MALLOC_MEMPOOL(5, 1512) + * LWIP_MALLOC_MEMPOOL_END + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * Simon Goldschmidt + * + */ + +#include "lwip/opt.h" + +#if !MEM_LIBC_MALLOC /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/sys.h" +#include "lwip/stats.h" + +#include + +#if MEM_USE_POOLS +/* lwIP head implemented with different sized pools */ + +/** + * Allocate memory: determine the smallest pool that is big enough + * to contain an element of 'size' and get an element from that pool. + * + * @param size the size in bytes of the memory needed + * @return a pointer to the allocated memory or NULL if the pool is empty + */ +void * +mem_malloc(mem_size_t size) +{ + struct memp_malloc_helper *element; + memp_t poolnr; + mem_size_t required_size = size + sizeof(struct memp_malloc_helper); + + for (poolnr = MEMP_POOL_FIRST; poolnr <= MEMP_POOL_LAST; poolnr++) { +#if MEM_USE_POOLS_TRY_BIGGER_POOL +again: +#endif /* MEM_USE_POOLS_TRY_BIGGER_POOL */ + /* is this pool big enough to hold an element of the required size + plus a struct memp_malloc_helper that saves the pool this element came from? */ + if (required_size <= memp_sizes[poolnr]) { + break; + } + } + if (poolnr > MEMP_POOL_LAST) { + LWIP_ASSERT("mem_malloc(): no pool is that big!", 0); + return NULL; + } + element = (struct memp_malloc_helper*)memp_malloc(poolnr); + if (element == NULL) { + /* No need to DEBUGF or ASSERT: This error is already + taken care of in memp.c */ +#if MEM_USE_POOLS_TRY_BIGGER_POOL + /** Try a bigger pool if this one is empty! */ + if (poolnr < MEMP_POOL_LAST) { + poolnr++; + goto again; + } +#endif /* MEM_USE_POOLS_TRY_BIGGER_POOL */ + return NULL; + } + + /* save the pool number this element came from */ + element->poolnr = poolnr; + /* and return a pointer to the memory directly after the struct memp_malloc_helper */ + element++; + + return element; +} + +/** + * Free memory previously allocated by mem_malloc. Loads the pool number + * and calls memp_free with that pool number to put the element back into + * its pool + * + * @param rmem the memory element to free + */ +void +mem_free(void *rmem) +{ + struct memp_malloc_helper *hmem = (struct memp_malloc_helper*)rmem; + + LWIP_ASSERT("rmem != NULL", (rmem != NULL)); + LWIP_ASSERT("rmem == MEM_ALIGN(rmem)", (rmem == LWIP_MEM_ALIGN(rmem))); + + /* get the original struct memp_malloc_helper */ + hmem--; + + LWIP_ASSERT("hmem != NULL", (hmem != NULL)); + LWIP_ASSERT("hmem == MEM_ALIGN(hmem)", (hmem == LWIP_MEM_ALIGN(hmem))); + LWIP_ASSERT("hmem->poolnr < MEMP_MAX", (hmem->poolnr < MEMP_MAX)); + + /* and put it in the pool we saved earlier */ + memp_free(hmem->poolnr, hmem); +} + +#else /* MEM_USE_POOLS */ +/* lwIP replacement for your libc malloc() */ + +/** + * The heap is made up as a list of structs of this type. + * This does not have to be aligned since for getting its size, + * we only use the macro SIZEOF_STRUCT_MEM, which automatically alignes. + */ +struct mem { + /** index (-> ram[next]) of the next struct */ + mem_size_t next; + /** index (-> ram[next]) of the next struct */ + mem_size_t prev; + /** 1: this area is used; 0: this area is unused */ + u8_t used; +}; + +/** All allocated blocks will be MIN_SIZE bytes big, at least! + * MIN_SIZE can be overridden to suit your needs. Smaller values save space, + * larger values could prevent too small blocks to fragment the RAM too much. */ +#ifndef MIN_SIZE +#define MIN_SIZE 12 +#endif /* MIN_SIZE */ +/* some alignment macros: we define them here for better source code layout */ +#define MIN_SIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(MIN_SIZE) +#define SIZEOF_STRUCT_MEM LWIP_MEM_ALIGN_SIZE(sizeof(struct mem)) +#define MEM_SIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(MEM_SIZE) + +/** the heap. we need one struct mem at the end and some room for alignment */ +static u8_t ram_heap[MEM_SIZE_ALIGNED + (2*SIZEOF_STRUCT_MEM) + MEM_ALIGNMENT]; +/** pointer to the heap (ram_heap): for alignment, ram is now a pointer instead of an array */ +static u8_t *ram; +/** the last entry, always unused! */ +static struct mem *ram_end; +/** pointer to the lowest free block, this is used for faster search */ +static struct mem *lfree; + +/** concurrent access protection */ +static sys_sem_t mem_sem; + +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + +static volatile u8_t mem_free_count; + +/* Allow mem_free from other (e.g. interrupt) context */ +#define LWIP_MEM_FREE_DECL_PROTECT() SYS_ARCH_DECL_PROTECT(lev_free) +#define LWIP_MEM_FREE_PROTECT() SYS_ARCH_PROTECT(lev_free) +#define LWIP_MEM_FREE_UNPROTECT() SYS_ARCH_UNPROTECT(lev_free) +#define LWIP_MEM_ALLOC_DECL_PROTECT() SYS_ARCH_DECL_PROTECT(lev_alloc) +#define LWIP_MEM_ALLOC_PROTECT() SYS_ARCH_PROTECT(lev_alloc) +#define LWIP_MEM_ALLOC_UNPROTECT() SYS_ARCH_UNPROTECT(lev_alloc) + +#else /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + +/* Protect the heap only by using a semaphore */ +#define LWIP_MEM_FREE_DECL_PROTECT() +#define LWIP_MEM_FREE_PROTECT() sys_arch_sem_wait(mem_sem, 0) +#define LWIP_MEM_FREE_UNPROTECT() sys_sem_signal(mem_sem) +/* mem_malloc is protected using semaphore AND LWIP_MEM_ALLOC_PROTECT */ +#define LWIP_MEM_ALLOC_DECL_PROTECT() +#define LWIP_MEM_ALLOC_PROTECT() +#define LWIP_MEM_ALLOC_UNPROTECT() + +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + + +/** + * "Plug holes" by combining adjacent empty struct mems. + * After this function is through, there should not exist + * one empty struct mem pointing to another empty struct mem. + * + * @param mem this points to a struct mem which just has been freed + * @internal this function is only called by mem_free() and mem_realloc() + * + * This assumes access to the heap is protected by the calling function + * already. + */ +static void +plug_holes(struct mem *mem) +{ + struct mem *nmem; + struct mem *pmem; + + LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram); + LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end); + LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0); + + /* plug hole forward */ + LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED); + + nmem = (struct mem *)&ram[mem->next]; + if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) { + /* if mem->next is unused and not end of ram, combine mem and mem->next */ + if (lfree == nmem) { + lfree = mem; + } + mem->next = nmem->next; + ((struct mem *)&ram[nmem->next])->prev = (u8_t *)mem - ram; + } + + /* plug hole backward */ + pmem = (struct mem *)&ram[mem->prev]; + if (pmem != mem && pmem->used == 0) { + /* if mem->prev is unused, combine mem and mem->prev */ + if (lfree == mem) { + lfree = pmem; + } + pmem->next = mem->next; + ((struct mem *)&ram[mem->next])->prev = (u8_t *)pmem - ram; + } +} + +/** + * Zero the heap and initialize start, end and lowest-free + */ +void +mem_init(void) +{ + struct mem *mem; + + LWIP_ASSERT("Sanity check alignment", + (SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT-1)) == 0); + + /* align the heap */ + ram = LWIP_MEM_ALIGN(ram_heap); + /* initialize the start of the heap */ + mem = (struct mem *)ram; + mem->next = MEM_SIZE_ALIGNED; + mem->prev = 0; + mem->used = 0; + /* initialize the end of the heap */ + ram_end = (struct mem *)&ram[MEM_SIZE_ALIGNED]; + ram_end->used = 1; + ram_end->next = MEM_SIZE_ALIGNED; + ram_end->prev = MEM_SIZE_ALIGNED; + + mem_sem = sys_sem_new(1); + + /* initialize the lowest-free pointer to the start of the heap */ + lfree = (struct mem *)ram; + + MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED); +} + +/** + * Put a struct mem back on the heap + * + * @param rmem is the data portion of a struct mem as returned by a previous + * call to mem_malloc() + */ +void +mem_free(void *rmem) +{ + struct mem *mem; + LWIP_MEM_FREE_DECL_PROTECT(); + + if (rmem == NULL) { + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n")); + return; + } + LWIP_ASSERT("mem_free: sanity check alignment", (((mem_ptr_t)rmem) & (MEM_ALIGNMENT-1)) == 0); + + LWIP_ASSERT("mem_free: legal memory", (u8_t *)rmem >= (u8_t *)ram && + (u8_t *)rmem < (u8_t *)ram_end); + + if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { + SYS_ARCH_DECL_PROTECT(lev); + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n")); + /* protect mem stats from concurrent access */ + SYS_ARCH_PROTECT(lev); + MEM_STATS_INC(illegal); + SYS_ARCH_UNPROTECT(lev); + return; + } + /* protect the heap from concurrent access */ + LWIP_MEM_FREE_PROTECT(); + /* Get the corresponding struct mem ... */ + mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); + /* ... which has to be in a used state ... */ + LWIP_ASSERT("mem_free: mem->used", mem->used); + /* ... and is now unused. */ + mem->used = 0; + + if (mem < lfree) { + /* the newly freed struct is now the lowest */ + lfree = mem; + } + + MEM_STATS_DEC_USED(used, mem->next - ((u8_t *)mem - ram)); + + /* finally, see if prev or next are free also */ + plug_holes(mem); +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + mem_free_count = 1; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_MEM_FREE_UNPROTECT(); +} + +/** + * In contrast to its name, mem_realloc can only shrink memory, not expand it. + * Since the only use (for now) is in pbuf_realloc (which also can only shrink), + * this shouldn't be a problem! + * + * @param rmem pointer to memory allocated by mem_malloc the is to be shrinked + * @param newsize required size after shrinking (needs to be smaller than or + * equal to the previous size) + * @return for compatibility reasons: is always == rmem, at the moment + * or NULL if newsize is > old size, in which case rmem is NOT touched + * or freed! + */ +void * +mem_realloc(void *rmem, mem_size_t newsize) +{ + mem_size_t size; + mem_size_t ptr, ptr2; + struct mem *mem, *mem2; + /* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */ + LWIP_MEM_FREE_DECL_PROTECT(); + + /* Expand the size of the allocated memory region so that we can + adjust for alignment. */ + newsize = LWIP_MEM_ALIGN_SIZE(newsize); + + if(newsize < MIN_SIZE_ALIGNED) { + /* every data block must be at least MIN_SIZE_ALIGNED long */ + newsize = MIN_SIZE_ALIGNED; + } + + if (newsize > MEM_SIZE_ALIGNED) { + return NULL; + } + + LWIP_ASSERT("mem_realloc: legal memory", (u8_t *)rmem >= (u8_t *)ram && + (u8_t *)rmem < (u8_t *)ram_end); + + if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) { + SYS_ARCH_DECL_PROTECT(lev); + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_realloc: illegal memory\n")); + /* protect mem stats from concurrent access */ + SYS_ARCH_PROTECT(lev); + MEM_STATS_INC(illegal); + SYS_ARCH_UNPROTECT(lev); + return rmem; + } + /* Get the corresponding struct mem ... */ + mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM); + /* ... and its offset pointer */ + ptr = (u8_t *)mem - ram; + + size = mem->next - ptr - SIZEOF_STRUCT_MEM; + LWIP_ASSERT("mem_realloc can only shrink memory", newsize <= size); + if (newsize > size) { + /* not supported */ + return NULL; + } + if (newsize == size) { + /* No change in size, simply return */ + return rmem; + } + + /* protect the heap from concurrent access */ + LWIP_MEM_FREE_PROTECT(); + + MEM_STATS_DEC_USED(used, (size - newsize)); + + mem2 = (struct mem *)&ram[mem->next]; + if(mem2->used == 0) { + /* The next struct is unused, we can simply move it at little */ + mem_size_t next; + /* remember the old next pointer */ + next = mem2->next; + /* create new struct mem which is moved directly after the shrinked mem */ + ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize; + if (lfree == mem2) { + lfree = (struct mem *)&ram[ptr2]; + } + mem2 = (struct mem *)&ram[ptr2]; + mem2->used = 0; + /* restore the next pointer */ + mem2->next = next; + /* link it back to mem */ + mem2->prev = ptr; + /* link mem to it */ + mem->next = ptr2; + /* last thing to restore linked list: as we have moved mem2, + * let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not + * the end of the heap */ + if (mem2->next != MEM_SIZE_ALIGNED) { + ((struct mem *)&ram[mem2->next])->prev = ptr2; + } + /* no need to plug holes, we've already done that */ + } else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) { + /* Next struct is used but there's room for another struct mem with + * at least MIN_SIZE_ALIGNED of data. + * Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem + * ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED'). + * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty + * region that couldn't hold data, but when mem->next gets freed, + * the 2 regions would be combined, resulting in more free memory */ + ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize; + mem2 = (struct mem *)&ram[ptr2]; + if (mem2 < lfree) { + lfree = mem2; + } + mem2->used = 0; + mem2->next = mem->next; + mem2->prev = ptr; + mem->next = ptr2; + if (mem2->next != MEM_SIZE_ALIGNED) { + ((struct mem *)&ram[mem2->next])->prev = ptr2; + } + /* the original mem->next is used, so no need to plug holes! */ + } + /* else { + next struct mem is used but size between mem and mem2 is not big enough + to create another struct mem + -> don't do anyhting. + -> the remaining space stays unused since it is too small + } */ +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + mem_free_count = 1; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_MEM_FREE_UNPROTECT(); + return rmem; +} + +/** + * Adam's mem_malloc() plus solution for bug #17922 + * Allocate a block of memory with a minimum of 'size' bytes. + * + * @param size is the minimum size of the requested block in bytes. + * @return pointer to allocated memory or NULL if no free memory was found. + * + * Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT). + */ +void * +mem_malloc(mem_size_t size) +{ + mem_size_t ptr, ptr2; + struct mem *mem, *mem2; +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + u8_t local_mem_free_count = 0; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_MEM_ALLOC_DECL_PROTECT(); + + if (size == 0) { + return NULL; + } + + /* Expand the size of the allocated memory region so that we can + adjust for alignment. */ + size = LWIP_MEM_ALIGN_SIZE(size); + + if(size < MIN_SIZE_ALIGNED) { + /* every data block must be at least MIN_SIZE_ALIGNED long */ + size = MIN_SIZE_ALIGNED; + } + + if (size > MEM_SIZE_ALIGNED) { + return NULL; + } + + /* protect the heap from concurrent access */ + sys_arch_sem_wait(mem_sem, 0); + LWIP_MEM_ALLOC_PROTECT(); +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + /* run as long as a mem_free disturbed mem_malloc */ + do { + local_mem_free_count = 0; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + + /* Scan through the heap searching for a free block that is big enough, + * beginning with the lowest free block. + */ + for (ptr = (u8_t *)lfree - ram; ptr < MEM_SIZE_ALIGNED - size; + ptr = ((struct mem *)&ram[ptr])->next) { + mem = (struct mem *)&ram[ptr]; +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + mem_free_count = 0; + LWIP_MEM_ALLOC_UNPROTECT(); + /* allow mem_free to run */ + LWIP_MEM_ALLOC_PROTECT(); + if (mem_free_count != 0) { + local_mem_free_count = mem_free_count; + } + mem_free_count = 0; +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + + if ((!mem->used) && + (mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) { + /* mem is not used and at least perfect fit is possible: + * mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */ + + if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) { + /* (in addition to the above, we test if another struct mem (SIZEOF_STRUCT_MEM) containing + * at least MIN_SIZE_ALIGNED of data also fits in the 'user data space' of 'mem') + * -> split large block, create empty remainder, + * remainder must be large enough to contain MIN_SIZE_ALIGNED data: if + * mem->next - (ptr + (2*SIZEOF_STRUCT_MEM)) == size, + * struct mem would fit in but no data between mem2 and mem2->next + * @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty + * region that couldn't hold data, but when mem->next gets freed, + * the 2 regions would be combined, resulting in more free memory + */ + ptr2 = ptr + SIZEOF_STRUCT_MEM + size; + /* create mem2 struct */ + mem2 = (struct mem *)&ram[ptr2]; + mem2->used = 0; + mem2->next = mem->next; + mem2->prev = ptr; + /* and insert it between mem and mem->next */ + mem->next = ptr2; + mem->used = 1; + + if (mem2->next != MEM_SIZE_ALIGNED) { + ((struct mem *)&ram[mem2->next])->prev = ptr2; + } + MEM_STATS_INC_USED(used, (size + SIZEOF_STRUCT_MEM)); + } else { + /* (a mem2 struct does no fit into the user data space of mem and mem->next will always + * be used at this point: if not we have 2 unused structs in a row, plug_holes should have + * take care of this). + * -> near fit or excact fit: do not split, no mem2 creation + * also can't move mem->next directly behind mem, since mem->next + * will always be used at this point! + */ + mem->used = 1; + MEM_STATS_INC_USED(used, mem->next - ((u8_t *)mem - ram)); + } + + if (mem == lfree) { + /* Find next free block after mem and update lowest free pointer */ + while (lfree->used && lfree != ram_end) { + LWIP_MEM_ALLOC_UNPROTECT(); + /* prevent high interrupt latency... */ + LWIP_MEM_ALLOC_PROTECT(); + lfree = (struct mem *)&ram[lfree->next]; + } + LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used))); + } + LWIP_MEM_ALLOC_UNPROTECT(); + sys_sem_signal(mem_sem); + LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.", + (mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end); + LWIP_ASSERT("mem_malloc: allocated memory properly aligned.", + ((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0); + LWIP_ASSERT("mem_malloc: sanity check alignment", + (((mem_ptr_t)mem) & (MEM_ALIGNMENT-1)) == 0); + + return (u8_t *)mem + SIZEOF_STRUCT_MEM; + } + } +#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT + /* if we got interrupted by a mem_free, try again */ + } while(local_mem_free_count != 0); +#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */ + LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size)); + MEM_STATS_INC(err); + LWIP_MEM_ALLOC_UNPROTECT(); + sys_sem_signal(mem_sem); + return NULL; +} + +#endif /* MEM_USE_POOLS */ +/** + * Contiguously allocates enough space for count objects that are size bytes + * of memory each and returns a pointer to the allocated memory. + * + * The allocated memory is filled with bytes of value zero. + * + * @param count number of objects to allocate + * @param size size of the objects to allocate + * @return pointer to allocated memory / NULL pointer if there is an error + */ +void *mem_calloc(mem_size_t count, mem_size_t size) +{ + void *p; + + /* allocate 'count' objects of size 'size' */ + p = mem_malloc(count * size); + if (p) { + /* zero the memory */ + memset(p, 0, count * size); + } + return p; +} + +#endif /* !MEM_LIBC_MALLOC */ diff --git a/bertos/net/lwip/src/core/memp.c b/bertos/net/lwip/src/core/memp.c new file mode 100644 index 0000000..dea1815 --- /dev/null +++ b/bertos/net/lwip/src/core/memp.c @@ -0,0 +1,386 @@ +/** + * @file + * Dynamic pool memory manager + * + * lwIP has dedicated pools for many structures (netconn, protocol control blocks, + * packet buffers, ...). All these pools are managed here. + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/udp.h" +#include "lwip/raw.h" +#include "lwip/tcp.h" +#include "lwip/igmp.h" +#include "lwip/api.h" +#include "lwip/api_msg.h" +#include "lwip/tcpip.h" +#include "lwip/sys.h" +#include "lwip/stats.h" +#include "netif/etharp.h" +#include "lwip/ip_frag.h" + +#include + +#if !MEMP_MEM_MALLOC /* don't build if not configured for use in lwipopts.h */ + +struct memp { + struct memp *next; +#if MEMP_OVERFLOW_CHECK + const char *file; + int line; +#endif /* MEMP_OVERFLOW_CHECK */ +}; + +#if MEMP_OVERFLOW_CHECK +/* if MEMP_OVERFLOW_CHECK is turned on, we reserve some bytes at the beginning + * and at the end of each element, initialize them as 0xcd and check + * them later. */ +/* If MEMP_OVERFLOW_CHECK is >= 2, on every call to memp_malloc or memp_free, + * every single element in each pool is checked! + * This is VERY SLOW but also very helpful. */ +/* MEMP_SANITY_REGION_BEFORE and MEMP_SANITY_REGION_AFTER can be overridden in + * lwipopts.h to change the amount reserved for checking. */ +#ifndef MEMP_SANITY_REGION_BEFORE +#define MEMP_SANITY_REGION_BEFORE 16 +#endif /* MEMP_SANITY_REGION_BEFORE*/ +#if MEMP_SANITY_REGION_BEFORE > 0 +#define MEMP_SANITY_REGION_BEFORE_ALIGNED LWIP_MEM_ALIGN_SIZE(MEMP_SANITY_REGION_BEFORE) +#else +#define MEMP_SANITY_REGION_BEFORE_ALIGNED 0 +#endif /* MEMP_SANITY_REGION_BEFORE*/ +#ifndef MEMP_SANITY_REGION_AFTER +#define MEMP_SANITY_REGION_AFTER 16 +#endif /* MEMP_SANITY_REGION_AFTER*/ +#if MEMP_SANITY_REGION_AFTER > 0 +#define MEMP_SANITY_REGION_AFTER_ALIGNED LWIP_MEM_ALIGN_SIZE(MEMP_SANITY_REGION_AFTER) +#else +#define MEMP_SANITY_REGION_AFTER_ALIGNED 0 +#endif /* MEMP_SANITY_REGION_AFTER*/ + +/* MEMP_SIZE: save space for struct memp and for sanity check */ +#define MEMP_SIZE (LWIP_MEM_ALIGN_SIZE(sizeof(struct memp)) + MEMP_SANITY_REGION_BEFORE_ALIGNED) +#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x) + MEMP_SANITY_REGION_AFTER_ALIGNED) + +#else /* MEMP_OVERFLOW_CHECK */ + +/* No sanity checks + * We don't need to preserve the struct memp while not allocated, so we + * can save a little space and set MEMP_SIZE to 0. + */ +#define MEMP_SIZE 0 +#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x)) + +#endif /* MEMP_OVERFLOW_CHECK */ + +/** This array holds the first free element of each pool. + * Elements form a linked list. */ +static struct memp *memp_tab[MEMP_MAX]; + +#else /* MEMP_MEM_MALLOC */ + +#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x)) + +#endif /* MEMP_MEM_MALLOC */ + +/** This array holds the element sizes of each pool. */ +#if !MEM_USE_POOLS && !MEMP_MEM_MALLOC +static +#endif +const u16_t memp_sizes[MEMP_MAX] = { +#define LWIP_MEMPOOL(name,num,size,desc) LWIP_MEM_ALIGN_SIZE(size), +#include "lwip/memp_std.h" +}; + +#if !MEMP_MEM_MALLOC /* don't build if not configured for use in lwipopts.h */ + +/** This array holds the number of elements in each pool. */ +static const u16_t memp_num[MEMP_MAX] = { +#define LWIP_MEMPOOL(name,num,size,desc) (num), +#include "lwip/memp_std.h" +}; + +/** This array holds a textual description of each pool. */ +#ifdef LWIP_DEBUG +static const char *memp_desc[MEMP_MAX] = { +#define LWIP_MEMPOOL(name,num,size,desc) (desc), +#include "lwip/memp_std.h" +}; +#endif /* LWIP_DEBUG */ + +/** This is the actual memory used by the pools. */ +static u8_t memp_memory[MEM_ALIGNMENT - 1 +#define LWIP_MEMPOOL(name,num,size,desc) + ( (num) * (MEMP_SIZE + MEMP_ALIGN_SIZE(size) ) ) +#include "lwip/memp_std.h" +]; + +#if MEMP_SANITY_CHECK +/** + * Check that memp-lists don't form a circle + */ +static int +memp_sanity(void) +{ + s16_t i, c; + struct memp *m, *n; + + for (i = 0; i < MEMP_MAX; i++) { + for (m = memp_tab[i]; m != NULL; m = m->next) { + c = 1; + for (n = memp_tab[i]; n != NULL; n = n->next) { + if (n == m && --c < 0) { + return 0; + } + } + } + } + return 1; +} +#endif /* MEMP_SANITY_CHECK*/ +#if MEMP_OVERFLOW_CHECK +/** + * Check if a memp element was victim of an overflow + * (e.g. the restricted area after it has been altered) + * + * @param p the memp element to check + * @param memp_size the element size of the pool p comes from + */ +static void +memp_overflow_check_element(struct memp *p, u16_t memp_size) +{ + u16_t k; + u8_t *m; +#if MEMP_SANITY_REGION_BEFORE_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE - MEMP_SANITY_REGION_BEFORE_ALIGNED; + for (k = 0; k < MEMP_SANITY_REGION_BEFORE_ALIGNED; k++) { + if (m[k] != 0xcd) { + LWIP_ASSERT("detected memp underflow!", 0); + } + } +#endif +#if MEMP_SANITY_REGION_AFTER_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE + memp_size; + for (k = 0; k < MEMP_SANITY_REGION_AFTER_ALIGNED; k++) { + if (m[k] != 0xcd) { + LWIP_ASSERT("detected memp overflow!", 0); + } + } +#endif +} + +/** + * Do an overflow check for all elements in every pool. + * + * @see memp_overflow_check_element for a description of the check + */ +static void +memp_overflow_check_all(void) +{ + u16_t i, j; + struct memp *p; + + p = LWIP_MEM_ALIGN(memp_memory); + for (i = 0; i < MEMP_MAX; ++i) { + p = p; + for (j = 0; j < memp_num[i]; ++j) { + memp_overflow_check_element(p, memp_sizes[i]); + p = (struct memp*)((u8_t*)p + MEMP_SIZE + memp_sizes[i] + MEMP_SANITY_REGION_AFTER_ALIGNED); + } + } +} + +/** + * Initialize the restricted areas of all memp elements in every pool. + */ +static void +memp_overflow_init(void) +{ + u16_t i, j; + struct memp *p; + u8_t *m; + + p = LWIP_MEM_ALIGN(memp_memory); + for (i = 0; i < MEMP_MAX; ++i) { + p = p; + for (j = 0; j < memp_num[i]; ++j) { +#if MEMP_SANITY_REGION_BEFORE_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE - MEMP_SANITY_REGION_BEFORE_ALIGNED; + memset(m, 0xcd, MEMP_SANITY_REGION_BEFORE_ALIGNED); +#endif +#if MEMP_SANITY_REGION_AFTER_ALIGNED > 0 + m = (u8_t*)p + MEMP_SIZE + memp_sizes[i]; + memset(m, 0xcd, MEMP_SANITY_REGION_AFTER_ALIGNED); +#endif + p = (struct memp*)((u8_t*)p + MEMP_SIZE + memp_sizes[i] + MEMP_SANITY_REGION_AFTER_ALIGNED); + } + } +} +#endif /* MEMP_OVERFLOW_CHECK */ + +/** + * Initialize this module. + * + * Carves out memp_memory into linked lists for each pool-type. + */ +void +memp_init(void) +{ + struct memp *memp; + u16_t i, j; + + for (i = 0; i < MEMP_MAX; ++i) { + MEMP_STATS_AVAIL(used, i, 0); + MEMP_STATS_AVAIL(max, i, 0); + MEMP_STATS_AVAIL(err, i, 0); + MEMP_STATS_AVAIL(avail, i, memp_num[i]); + } + + memp = LWIP_MEM_ALIGN(memp_memory); + /* for every pool: */ + for (i = 0; i < MEMP_MAX; ++i) { + memp_tab[i] = NULL; + /* create a linked list of memp elements */ + for (j = 0; j < memp_num[i]; ++j) { + memp->next = memp_tab[i]; + memp_tab[i] = memp; + memp = (struct memp *)((u8_t *)memp + MEMP_SIZE + memp_sizes[i] +#if MEMP_OVERFLOW_CHECK + + MEMP_SANITY_REGION_AFTER_ALIGNED +#endif + ); + } + } +#if MEMP_OVERFLOW_CHECK + memp_overflow_init(); + /* check everything a first time to see if it worked */ + memp_overflow_check_all(); +#endif /* MEMP_OVERFLOW_CHECK */ +} + +/** + * Get an element from a specific pool. + * + * @param type the pool to get an element from + * + * the debug version has two more parameters: + * @param file file name calling this function + * @param line number of line where this function is called + * + * @return a pointer to the allocated memory or a NULL pointer on error + */ +void * +#if !MEMP_OVERFLOW_CHECK +memp_malloc(memp_t type) +#else +memp_malloc_fn(memp_t type, const char* file, const int line) +#endif +{ + struct memp *memp; + SYS_ARCH_DECL_PROTECT(old_level); + + LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;); + + SYS_ARCH_PROTECT(old_level); +#if MEMP_OVERFLOW_CHECK >= 2 + memp_overflow_check_all(); +#endif /* MEMP_OVERFLOW_CHECK >= 2 */ + + memp = memp_tab[type]; + + if (memp != NULL) { + memp_tab[type] = memp->next; +#if MEMP_OVERFLOW_CHECK + memp->next = NULL; + memp->file = file; + memp->line = line; +#endif /* MEMP_OVERFLOW_CHECK */ + MEMP_STATS_INC_USED(used, type); + LWIP_ASSERT("memp_malloc: memp properly aligned", + ((mem_ptr_t)memp % MEM_ALIGNMENT) == 0); + memp = (struct memp*)((u8_t*)memp + MEMP_SIZE); + } else { + LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", memp_desc[type])); + MEMP_STATS_INC(err, type); + } + + SYS_ARCH_UNPROTECT(old_level); + + return memp; +} + +/** + * Put an element back into its pool. + * + * @param type the pool where to put mem + * @param mem the memp element to free + */ +void +memp_free(memp_t type, void *mem) +{ + struct memp *memp; + SYS_ARCH_DECL_PROTECT(old_level); + + if (mem == NULL) { + return; + } + LWIP_ASSERT("memp_free: mem properly aligned", + ((mem_ptr_t)mem % MEM_ALIGNMENT) == 0); + + memp = (struct memp *)((u8_t*)mem - MEMP_SIZE); + + SYS_ARCH_PROTECT(old_level); +#if MEMP_OVERFLOW_CHECK +#if MEMP_OVERFLOW_CHECK >= 2 + memp_overflow_check_all(); +#else + memp_overflow_check_element(memp, memp_sizes[type]); +#endif /* MEMP_OVERFLOW_CHECK >= 2 */ +#endif /* MEMP_OVERFLOW_CHECK */ + + MEMP_STATS_DEC(used, type); + + memp->next = memp_tab[type]; + memp_tab[type] = memp; + +#if MEMP_SANITY_CHECK + LWIP_ASSERT("memp sanity", memp_sanity()); +#endif /* MEMP_SANITY_CHECK */ + + SYS_ARCH_UNPROTECT(old_level); +} + +#endif /* MEMP_MEM_MALLOC */ diff --git a/bertos/net/lwip/src/core/netif.c b/bertos/net/lwip/src/core/netif.c new file mode 100644 index 0000000..b52cd02 --- /dev/null +++ b/bertos/net/lwip/src/core/netif.c @@ -0,0 +1,681 @@ +/** + * @file + * lwIP network interface abstraction + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/def.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/tcp.h" +#include "lwip/snmp.h" +#include "lwip/igmp.h" +#include "netif/etharp.h" +#if ENABLE_LOOPBACK +#include "lwip/sys.h" +#if LWIP_NETIF_LOOPBACK_MULTITHREADING +#include "lwip/tcpip.h" +#endif /* LWIP_NETIF_LOOPBACK_MULTITHREADING */ +#endif /* ENABLE_LOOPBACK */ + +#if LWIP_AUTOIP +#include "lwip/autoip.h" +#endif /* LWIP_AUTOIP */ +#if LWIP_DHCP +#include "lwip/dhcp.h" +#endif /* LWIP_DHCP */ + +#if LWIP_NETIF_STATUS_CALLBACK +#define NETIF_STATUS_CALLBACK(n) { if (n->status_callback) (n->status_callback)(n); } +#else +#define NETIF_STATUS_CALLBACK(n) { /* NOP */ } +#endif /* LWIP_NETIF_STATUS_CALLBACK */ + +#if LWIP_NETIF_LINK_CALLBACK +#define NETIF_LINK_CALLBACK(n) { if (n->link_callback) (n->link_callback)(n); } +#else +#define NETIF_LINK_CALLBACK(n) { /* NOP */ } +#endif /* LWIP_NETIF_LINK_CALLBACK */ + +struct netif *netif_list; +struct netif *netif_default; + +/** + * Add a network interface to the list of lwIP netifs. + * + * @param netif a pre-allocated netif structure + * @param ipaddr IP address for the new netif + * @param netmask network mask for the new netif + * @param gw default gateway IP address for the new netif + * @param state opaque data passed to the new netif + * @param init callback function that initializes the interface + * @param input callback function that is called to pass + * ingress packets up in the protocol layer stack. + * + * @return netif, or NULL if failed. + */ +struct netif * +netif_add(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, + struct ip_addr *gw, + void *state, + err_t (* init)(struct netif *netif), + err_t (* input)(struct pbuf *p, struct netif *netif)) +{ + static u8_t netifnum = 0; + + /* reset new interface configuration state */ + netif->ip_addr.addr = 0; + netif->netmask.addr = 0; + netif->gw.addr = 0; + netif->flags = 0; +#if LWIP_DHCP + /* netif not under DHCP control by default */ + netif->dhcp = NULL; +#endif /* LWIP_DHCP */ +#if LWIP_AUTOIP + /* netif not under AutoIP control by default */ + netif->autoip = NULL; +#endif /* LWIP_AUTOIP */ +#if LWIP_NETIF_STATUS_CALLBACK + netif->status_callback = NULL; +#endif /* LWIP_NETIF_STATUS_CALLBACK */ +#if LWIP_NETIF_LINK_CALLBACK + netif->link_callback = NULL; +#endif /* LWIP_NETIF_LINK_CALLBACK */ +#if LWIP_IGMP + netif->igmp_mac_filter = NULL; +#endif /* LWIP_IGMP */ +#if ENABLE_LOOPBACK + netif->loop_first = NULL; + netif->loop_last = NULL; +#endif /* ENABLE_LOOPBACK */ + + /* remember netif specific state information data */ + netif->state = state; + netif->num = netifnum++; + netif->input = input; +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ +#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS + netif->loop_cnt_current = 0; +#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */ + + netif_set_addr(netif, ipaddr, netmask, gw); + + /* call user specified initialization function for netif */ + if (init(netif) != ERR_OK) { + return NULL; + } + + /* add this netif to the list */ + netif->next = netif_list; + netif_list = netif; + snmp_inc_iflist(); + +#if LWIP_IGMP + /* start IGMP processing */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_start( netif); + } +#endif /* LWIP_IGMP */ + + LWIP_DEBUGF(NETIF_DEBUG, ("netif: added interface %c%c IP addr ", + netif->name[0], netif->name[1])); + ip_addr_debug_print(NETIF_DEBUG, ipaddr); + LWIP_DEBUGF(NETIF_DEBUG, (" netmask ")); + ip_addr_debug_print(NETIF_DEBUG, netmask); + LWIP_DEBUGF(NETIF_DEBUG, (" gw ")); + ip_addr_debug_print(NETIF_DEBUG, gw); + LWIP_DEBUGF(NETIF_DEBUG, ("\n")); + return netif; +} + +/** + * Change IP address configuration for a network interface (including netmask + * and default gateway). + * + * @param netif the network interface to change + * @param ipaddr the new IP address + * @param netmask the new netmask + * @param gw the new default gateway + */ +void +netif_set_addr(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, + struct ip_addr *gw) +{ + netif_set_ipaddr(netif, ipaddr); + netif_set_netmask(netif, netmask); + netif_set_gw(netif, gw); +} + +/** + * Remove a network interface from the list of lwIP netifs. + * + * @param netif the network interface to remove + */ +void netif_remove(struct netif * netif) +{ + if ( netif == NULL ) return; + +#if LWIP_IGMP + /* stop IGMP processing */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_stop( netif); + } +#endif /* LWIP_IGMP */ + + snmp_delete_ipaddridx_tree(netif); + + /* is it the first netif? */ + if (netif_list == netif) { + netif_list = netif->next; + snmp_dec_iflist(); + } + else { + /* look for netif further down the list */ + struct netif * tmpNetif; + for (tmpNetif = netif_list; tmpNetif != NULL; tmpNetif = tmpNetif->next) { + if (tmpNetif->next == netif) { + tmpNetif->next = netif->next; + snmp_dec_iflist(); + break; + } + } + if (tmpNetif == NULL) + return; /* we didn't find any netif today */ + } + /* this netif is default? */ + if (netif_default == netif) + /* reset default netif */ + netif_set_default(NULL); + LWIP_DEBUGF( NETIF_DEBUG, ("netif_remove: removed netif\n") ); +} + +/** + * Find a network interface by searching for its name + * + * @param name the name of the netif (like netif->name) plus concatenated number + * in ascii representation (e.g. 'en0') + */ +struct netif * +netif_find(char *name) +{ + struct netif *netif; + u8_t num; + + if (name == NULL) { + return NULL; + } + + num = name[2] - '0'; + + for(netif = netif_list; netif != NULL; netif = netif->next) { + if (num == netif->num && + name[0] == netif->name[0] && + name[1] == netif->name[1]) { + LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: found %c%c\n", name[0], name[1])); + return netif; + } + } + LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: didn't find %c%c\n", name[0], name[1])); + return NULL; +} + +/** + * Change the IP address of a network interface + * + * @param netif the network interface to change + * @param ipaddr the new IP address + * + * @note call netif_set_addr() if you also want to change netmask and + * default gateway + */ +void +netif_set_ipaddr(struct netif *netif, struct ip_addr *ipaddr) +{ + /* TODO: Handling of obsolete pcbs */ + /* See: http://mail.gnu.org/archive/html/lwip-users/2003-03/msg00118.html */ +#if LWIP_TCP + struct tcp_pcb *pcb; + struct tcp_pcb_listen *lpcb; + + /* address is actually being changed? */ + if ((ip_addr_cmp(ipaddr, &(netif->ip_addr))) == 0) + { + /* extern struct tcp_pcb *tcp_active_pcbs; defined by tcp.h */ + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n")); + pcb = tcp_active_pcbs; + while (pcb != NULL) { + /* PCB bound to current local interface address? */ + if (ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr))) { + /* this connection must be aborted */ + struct tcp_pcb *next = pcb->next; + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb)); + tcp_abort(pcb); + pcb = next; + } else { + pcb = pcb->next; + } + } + for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { + /* PCB bound to current local interface address? */ + if ((!(ip_addr_isany(&(lpcb->local_ip)))) && + (ip_addr_cmp(&(lpcb->local_ip), &(netif->ip_addr)))) { + /* The PCB is listening to the old ipaddr and + * is set to listen to the new one instead */ + ip_addr_set(&(lpcb->local_ip), ipaddr); + } + } + } +#endif + snmp_delete_ipaddridx_tree(netif); + snmp_delete_iprteidx_tree(0,netif); + /* set new IP address to netif */ + ip_addr_set(&(netif->ip_addr), ipaddr); + snmp_insert_ipaddridx_tree(netif); + snmp_insert_iprteidx_tree(0,netif); + + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: IP address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + netif->name[0], netif->name[1], + ip4_addr1(&netif->ip_addr), + ip4_addr2(&netif->ip_addr), + ip4_addr3(&netif->ip_addr), + ip4_addr4(&netif->ip_addr))); +} + +/** + * Change the default gateway for a network interface + * + * @param netif the network interface to change + * @param gw the new default gateway + * + * @note call netif_set_addr() if you also want to change ip address and netmask + */ +void +netif_set_gw(struct netif *netif, struct ip_addr *gw) +{ + ip_addr_set(&(netif->gw), gw); + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: GW address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + netif->name[0], netif->name[1], + ip4_addr1(&netif->gw), + ip4_addr2(&netif->gw), + ip4_addr3(&netif->gw), + ip4_addr4(&netif->gw))); +} + +/** + * Change the netmask of a network interface + * + * @param netif the network interface to change + * @param netmask the new netmask + * + * @note call netif_set_addr() if you also want to change ip address and + * default gateway + */ +void +netif_set_netmask(struct netif *netif, struct ip_addr *netmask) +{ + snmp_delete_iprteidx_tree(0, netif); + /* set new netmask to netif */ + ip_addr_set(&(netif->netmask), netmask); + snmp_insert_iprteidx_tree(0, netif); + LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: netmask of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + netif->name[0], netif->name[1], + ip4_addr1(&netif->netmask), + ip4_addr2(&netif->netmask), + ip4_addr3(&netif->netmask), + ip4_addr4(&netif->netmask))); +} + +/** + * Set a network interface as the default network interface + * (used to output all packets for which no specific route is found) + * + * @param netif the default network interface + */ +void +netif_set_default(struct netif *netif) +{ + if (netif == NULL) + { + /* remove default route */ + snmp_delete_iprteidx_tree(1, netif); + } + else + { + /* install default route */ + snmp_insert_iprteidx_tree(1, netif); + } + netif_default = netif; + LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n", + netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\'')); +} + +/** + * Bring an interface up, available for processing + * traffic. + * + * @note: Enabling DHCP on a down interface will make it come + * up once configured. + * + * @see dhcp_start() + */ +void netif_set_up(struct netif *netif) +{ + if ( !(netif->flags & NETIF_FLAG_UP )) { + netif->flags |= NETIF_FLAG_UP; + +#if LWIP_SNMP + snmp_get_sysuptime(&netif->ts); +#endif /* LWIP_SNMP */ + + NETIF_LINK_CALLBACK(netif); + NETIF_STATUS_CALLBACK(netif); + +#if LWIP_ARP + /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */ + if (netif->flags & NETIF_FLAG_ETHARP) { + etharp_gratuitous(netif); + } +#endif /* LWIP_ARP */ + +#if LWIP_IGMP + /* resend IGMP memberships */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_report_groups( netif); + } +#endif /* LWIP_IGMP */ + } +} + +/** + * Bring an interface down, disabling any traffic processing. + * + * @note: Enabling DHCP on a down interface will make it come + * up once configured. + * + * @see dhcp_start() + */ +void netif_set_down(struct netif *netif) +{ + if ( netif->flags & NETIF_FLAG_UP ) + { + netif->flags &= ~NETIF_FLAG_UP; +#if LWIP_SNMP + snmp_get_sysuptime(&netif->ts); +#endif + + NETIF_LINK_CALLBACK(netif); + NETIF_STATUS_CALLBACK(netif); + } +} + +/** + * Ask if an interface is up + */ +u8_t netif_is_up(struct netif *netif) +{ + return (netif->flags & NETIF_FLAG_UP)?1:0; +} + +#if LWIP_NETIF_STATUS_CALLBACK +/** + * Set callback to be called when interface is brought up/down + */ +void netif_set_status_callback(struct netif *netif, void (* status_callback)(struct netif *netif )) +{ + if ( netif ) + netif->status_callback = status_callback; +} +#endif /* LWIP_NETIF_STATUS_CALLBACK */ + +#if LWIP_NETIF_LINK_CALLBACK +/** + * Called by a driver when its link goes up + */ +void netif_set_link_up(struct netif *netif ) +{ + netif->flags |= NETIF_FLAG_LINK_UP; + +#if LWIP_DHCP + if (netif->dhcp) { + dhcp_network_changed(netif); + } +#endif /* LWIP_DHCP */ + +#if LWIP_AUTOIP + if (netif->autoip) { + autoip_network_changed(netif); + } +#endif /* LWIP_AUTOIP */ + + if (netif->flags & NETIF_FLAG_UP) { +#if LWIP_ARP + /* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */ + if (netif->flags & NETIF_FLAG_ETHARP) { + etharp_gratuitous(netif); + } +#endif /* LWIP_ARP */ + +#if LWIP_IGMP + /* resend IGMP memberships */ + if (netif->flags & NETIF_FLAG_IGMP) { + igmp_report_groups( netif); + } +#endif /* LWIP_IGMP */ + } + NETIF_LINK_CALLBACK(netif); +} + +/** + * Called by a driver when its link goes down + */ +void netif_set_link_down(struct netif *netif ) +{ + netif->flags &= ~NETIF_FLAG_LINK_UP; + NETIF_LINK_CALLBACK(netif); +} + +/** + * Ask if a link is up + */ +u8_t netif_is_link_up(struct netif *netif) +{ + return (netif->flags & NETIF_FLAG_LINK_UP) ? 1 : 0; +} + +/** + * Set callback to be called when link is brought up/down + */ +void netif_set_link_callback(struct netif *netif, void (* link_callback)(struct netif *netif )) +{ + if (netif) { + netif->link_callback = link_callback; + } +} +#endif /* LWIP_NETIF_LINK_CALLBACK */ + +#if ENABLE_LOOPBACK +/** + * Send an IP packet to be received on the same netif (loopif-like). + * The pbuf is simply copied and handed back to netif->input. + * In multithreaded mode, this is done directly since netif->input must put + * the packet on a queue. + * In callback mode, the packet is put on an internal queue and is fed to + * netif->input by netif_poll(). + * + * @param netif the lwip network interface structure + * @param p the (IP) packet to 'send' + * @param ipaddr the ip address to send the packet to (not used) + * @return ERR_OK if the packet has been sent + * ERR_MEM if the pbuf used to copy the packet couldn't be allocated + */ +err_t +netif_loop_output(struct netif *netif, struct pbuf *p, + struct ip_addr *ipaddr) +{ + struct pbuf *r; + err_t err; + struct pbuf *last; +#if LWIP_LOOPBACK_MAX_PBUFS + u8_t clen = 0; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ + SYS_ARCH_DECL_PROTECT(lev); + LWIP_UNUSED_ARG(ipaddr); + + /* Allocate a new pbuf */ + r = pbuf_alloc(PBUF_LINK, p->tot_len, PBUF_RAM); + if (r == NULL) { + return ERR_MEM; + } +#if LWIP_LOOPBACK_MAX_PBUFS + clen = pbuf_clen(r); + /* check for overflow or too many pbuf on queue */ + if(((netif->loop_cnt_current + clen) < netif->loop_cnt_current) || + ((netif->loop_cnt_current + clen) > LWIP_LOOPBACK_MAX_PBUFS)) { + pbuf_free(r); + r = NULL; + return ERR_MEM; + } + netif->loop_cnt_current += clen; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ + + /* Copy the whole pbuf queue p into the single pbuf r */ + if ((err = pbuf_copy(r, p)) != ERR_OK) { + pbuf_free(r); + r = NULL; + return err; + } + + /* Put the packet on a linked list which gets emptied through calling + netif_poll(). */ + + /* let last point to the last pbuf in chain r */ + for (last = r; last->next != NULL; last = last->next); + + SYS_ARCH_PROTECT(lev); + if(netif->loop_first != NULL) { + LWIP_ASSERT("if first != NULL, last must also be != NULL", netif->loop_last != NULL); + netif->loop_last->next = r; + netif->loop_last = last; + } else { + netif->loop_first = r; + netif->loop_last = last; + } + SYS_ARCH_UNPROTECT(lev); + +#if LWIP_NETIF_LOOPBACK_MULTITHREADING + /* For multithreading environment, schedule a call to netif_poll */ + tcpip_callback((void (*)(void *))(netif_poll), netif); +#endif /* LWIP_NETIF_LOOPBACK_MULTITHREADING */ + + return ERR_OK; +} + +/** + * Call netif_poll() in the main loop of your application. This is to prevent + * reentering non-reentrant functions like tcp_input(). Packets passed to + * netif_loop_output() are put on a list that is passed to netif->input() by + * netif_poll(). + */ +void +netif_poll(struct netif *netif) +{ + struct pbuf *in; + SYS_ARCH_DECL_PROTECT(lev); + + do { + /* Get a packet from the list. With SYS_LIGHTWEIGHT_PROT=1, this is protected */ + SYS_ARCH_PROTECT(lev); + in = netif->loop_first; + if(in != NULL) { + struct pbuf *in_end = in; +#if LWIP_LOOPBACK_MAX_PBUFS + u8_t clen = pbuf_clen(in); + /* adjust the number of pbufs on queue */ + LWIP_ASSERT("netif->loop_cnt_current underflow", + ((netif->loop_cnt_current - clen) < netif->loop_cnt_current)); + netif->loop_cnt_current -= clen; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ + while(in_end->len != in_end->tot_len) { + LWIP_ASSERT("bogus pbuf: len != tot_len but next == NULL!", in_end->next != NULL); + in_end = in_end->next; + } + /* 'in_end' now points to the last pbuf from 'in' */ + if(in_end == netif->loop_last) { + /* this was the last pbuf in the list */ + netif->loop_first = netif->loop_last = NULL; + } else { + /* pop the pbuf off the list */ + netif->loop_first = in_end->next; + LWIP_ASSERT("should not be null since first != last!", netif->loop_first != NULL); + } + /* De-queue the pbuf from its successors on the 'loop_' list. */ + in_end->next = NULL; + } + SYS_ARCH_UNPROTECT(lev); + + if(in != NULL) { + /* loopback packets are always IP packets! */ + if(ip_input(in, netif) != ERR_OK) { + pbuf_free(in); + } + /* Don't reference the packet any more! */ + in = NULL; + } + /* go on while there is a packet on the list */ + } while(netif->loop_first != NULL); +} + +#if !LWIP_NETIF_LOOPBACK_MULTITHREADING +/** + * Calls netif_poll() for every netif on the netif_list. + */ +void +netif_poll_all(void) +{ + struct netif *netif = netif_list; + /* loop through netifs */ + while (netif != NULL) { + netif_poll(netif); + /* proceed to next network interface */ + netif = netif->next; + } +} +#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */ +#endif /* ENABLE_LOOPBACK */ diff --git a/bertos/net/lwip/src/core/pbuf.c b/bertos/net/lwip/src/core/pbuf.c new file mode 100644 index 0000000..11cc2e6 --- /dev/null +++ b/bertos/net/lwip/src/core/pbuf.c @@ -0,0 +1,929 @@ +/** + * @file + * Packet buffer management + * + * Packets are built from the pbuf data structure. It supports dynamic + * memory allocation for packet contents or can reference externally + * managed packet contents both in RAM and ROM. Quick allocation for + * incoming packets is provided through pools with fixed sized pbufs. + * + * A packet may span over multiple pbufs, chained as a singly linked + * list. This is called a "pbuf chain". + * + * Multiple packets may be queued, also using this singly linked list. + * This is called a "packet queue". + * + * So, a packet queue consists of one or more pbuf chains, each of + * which consist of one or more pbufs. CURRENTLY, PACKET QUEUES ARE + * NOT SUPPORTED!!! Use helper structs to queue multiple packets. + * + * The differences between a pbuf chain and a packet queue are very + * precise but subtle. + * + * The last pbuf of a packet has a ->tot_len field that equals the + * ->len field. It can be found by traversing the list. If the last + * pbuf of a packet has a ->next field other than NULL, more packets + * are on the queue. + * + * Therefore, looping through a pbuf of a single packet, has an + * loop end condition (tot_len == p->len), NOT (next == NULL). + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#include "lwip/stats.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/pbuf.h" +#include "lwip/sys.h" +#include "arch/perf.h" +#if TCP_QUEUE_OOSEQ +#include "lwip/tcp.h" +#endif + +#include + +#define SIZEOF_STRUCT_PBUF LWIP_MEM_ALIGN_SIZE(sizeof(struct pbuf)) +/* Since the pool is created in memp, PBUF_POOL_BUFSIZE will be automatically + aligned there. Therefore, PBUF_POOL_BUFSIZE_ALIGNED can be used here. */ +#define PBUF_POOL_BUFSIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(PBUF_POOL_BUFSIZE) + +#if !TCP_QUEUE_OOSEQ || NO_SYS +#define PBUF_POOL_IS_EMPTY() +#else /* !TCP_QUEUE_OOSEQ || NO_SYS */ +/** Define this to 0 to prevent freeing ooseq pbufs when the PBUF_POOL is empty */ +#ifndef PBUF_POOL_FREE_OOSEQ +#define PBUF_POOL_FREE_OOSEQ 1 +#endif /* PBUF_POOL_FREE_OOSEQ */ + +#if PBUF_POOL_FREE_OOSEQ +#include "lwip/tcpip.h" +#define PBUF_POOL_IS_EMPTY() pbuf_pool_is_empty() +static u8_t pbuf_free_ooseq_queued; +/** + * Attempt to reclaim some memory from queued out-of-sequence TCP segments + * if we run out of pool pbufs. It's better to give priority to new packets + * if we're running out. + * + * This must be done in the correct thread context therefore this function + * can only be used with NO_SYS=0 and through tcpip_callback. + */ +static void +pbuf_free_ooseq(void* arg) +{ + struct tcp_pcb* pcb; + SYS_ARCH_DECL_PROTECT(old_level); + LWIP_UNUSED_ARG(arg); + + SYS_ARCH_PROTECT(old_level); + pbuf_free_ooseq_queued = 0; + SYS_ARCH_UNPROTECT(old_level); + + for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) { + if (NULL != pcb->ooseq) { + /** Free the ooseq pbufs of one PCB only */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n")); + tcp_segs_free(pcb->ooseq); + pcb->ooseq = NULL; + return; + } + } +} + +/** Queue a call to pbuf_free_ooseq if not already queued. */ +static void +pbuf_pool_is_empty(void) +{ + u8_t queued; + SYS_ARCH_DECL_PROTECT(old_level); + + SYS_ARCH_PROTECT(old_level); + queued = pbuf_free_ooseq_queued; + pbuf_free_ooseq_queued = 1; + SYS_ARCH_UNPROTECT(old_level); + + if(!queued) { + /* queue a call to pbuf_free_ooseq if not already queued */ + if(tcpip_callback_with_block(pbuf_free_ooseq, NULL, 0) != ERR_OK) { + SYS_ARCH_PROTECT(old_level); + pbuf_free_ooseq_queued = 0; + SYS_ARCH_UNPROTECT(old_level); + } + } +} +#endif /* PBUF_POOL_FREE_OOSEQ */ +#endif /* !TCP_QUEUE_OOSEQ || NO_SYS */ + +/** + * Allocates a pbuf of the given type (possibly a chain for PBUF_POOL type). + * + * The actual memory allocated for the pbuf is determined by the + * layer at which the pbuf is allocated and the requested size + * (from the size parameter). + * + * @param layer flag to define header size + * @param length size of the pbuf's payload + * @param type this parameter decides how and where the pbuf + * should be allocated as follows: + * + * - PBUF_RAM: buffer memory for pbuf is allocated as one large + * chunk. This includes protocol headers as well. + * - PBUF_ROM: no buffer memory is allocated for the pbuf, even for + * protocol headers. Additional headers must be prepended + * by allocating another pbuf and chain in to the front of + * the ROM pbuf. It is assumed that the memory used is really + * similar to ROM in that it is immutable and will not be + * changed. Memory which is dynamic should generally not + * be attached to PBUF_ROM pbufs. Use PBUF_REF instead. + * - PBUF_REF: no buffer memory is allocated for the pbuf, even for + * protocol headers. It is assumed that the pbuf is only + * being used in a single thread. If the pbuf gets queued, + * then pbuf_take should be called to copy the buffer. + * - PBUF_POOL: the pbuf is allocated as a pbuf chain, with pbufs from + * the pbuf pool that is allocated during pbuf_init(). + * + * @return the allocated pbuf. If multiple pbufs where allocated, this + * is the first pbuf of a pbuf chain. + */ +struct pbuf * +pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type) +{ + struct pbuf *p, *q, *r; + u16_t offset; + s32_t rem_len; /* remaining length */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length)); + + /* determine header offset */ + offset = 0; + switch (layer) { + case PBUF_TRANSPORT: + /* add room for transport (often TCP) layer header */ + offset += PBUF_TRANSPORT_HLEN; + /* FALLTHROUGH */ + case PBUF_IP: + /* add room for IP layer header */ + offset += PBUF_IP_HLEN; + /* FALLTHROUGH */ + case PBUF_LINK: + /* add room for link layer header */ + offset += PBUF_LINK_HLEN; + break; + case PBUF_RAW: + break; + default: + LWIP_ASSERT("pbuf_alloc: bad pbuf layer", 0); + return NULL; + } + + switch (type) { + case PBUF_POOL: + /* allocate head of pbuf chain into p */ + p = memp_malloc(MEMP_PBUF_POOL); + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc: allocated pbuf %p\n", (void *)p)); + if (p == NULL) { + PBUF_POOL_IS_EMPTY(); + return NULL; + } + p->type = type; + p->next = NULL; + + /* make the payload pointer point 'offset' bytes into pbuf data memory */ + p->payload = LWIP_MEM_ALIGN((void *)((u8_t *)p + (SIZEOF_STRUCT_PBUF + offset))); + LWIP_ASSERT("pbuf_alloc: pbuf p->payload properly aligned", + ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); + /* the total length of the pbuf chain is the requested size */ + p->tot_len = length; + /* set the length of the first pbuf in the chain */ + p->len = LWIP_MIN(length, PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)); + LWIP_ASSERT("check p->payload + p->len does not overflow pbuf", + ((u8_t*)p->payload + p->len <= + (u8_t*)p + SIZEOF_STRUCT_PBUF + PBUF_POOL_BUFSIZE_ALIGNED)); + LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT", + (PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 ); + /* set reference count (needed here in case we fail) */ + p->ref = 1; + + /* now allocate the tail of the pbuf chain */ + + /* remember first pbuf for linkage in next iteration */ + r = p; + /* remaining length to be allocated */ + rem_len = length - p->len; + /* any remaining pbufs to be allocated? */ + while (rem_len > 0) { + q = memp_malloc(MEMP_PBUF_POOL); + if (q == NULL) { + PBUF_POOL_IS_EMPTY(); + /* free chain so far allocated */ + pbuf_free(p); + /* bail out unsuccesfully */ + return NULL; + } + q->type = type; + q->flags = 0; + q->next = NULL; + /* make previous pbuf point to this pbuf */ + r->next = q; + /* set total length of this pbuf and next in chain */ + LWIP_ASSERT("rem_len < max_u16_t", rem_len < 0xffff); + q->tot_len = (u16_t)rem_len; + /* this pbuf length is pool size, unless smaller sized tail */ + q->len = LWIP_MIN((u16_t)rem_len, PBUF_POOL_BUFSIZE_ALIGNED); + q->payload = (void *)((u8_t *)q + SIZEOF_STRUCT_PBUF); + LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned", + ((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0); + LWIP_ASSERT("check p->payload + p->len does not overflow pbuf", + ((u8_t*)p->payload + p->len <= + (u8_t*)p + SIZEOF_STRUCT_PBUF + PBUF_POOL_BUFSIZE_ALIGNED)); + q->ref = 1; + /* calculate remaining length to be allocated */ + rem_len -= q->len; + /* remember this pbuf for linkage in next iteration */ + r = q; + } + /* end of chain */ + /*r->next = NULL;*/ + + break; + case PBUF_RAM: + /* If pbuf is to be allocated in RAM, allocate memory for it. */ + p = (struct pbuf*)mem_malloc(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF + offset) + LWIP_MEM_ALIGN_SIZE(length)); + if (p == NULL) { + return NULL; + } + /* Set up internal structure of the pbuf. */ + p->payload = LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset)); + p->len = p->tot_len = length; + p->next = NULL; + p->type = type; + + LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned", + ((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0); + break; + /* pbuf references existing (non-volatile static constant) ROM payload? */ + case PBUF_ROM: + /* pbuf references existing (externally allocated) RAM payload? */ + case PBUF_REF: + /* only allocate memory for the pbuf structure */ + p = memp_malloc(MEMP_PBUF); + if (p == NULL) { + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("pbuf_alloc: Could not allocate MEMP_PBUF for PBUF_%s.\n", + (type == PBUF_ROM) ? "ROM" : "REF")); + return NULL; + } + /* caller must set this field properly, afterwards */ + p->payload = NULL; + p->len = p->tot_len = length; + p->next = NULL; + p->type = type; + break; + default: + LWIP_ASSERT("pbuf_alloc: erroneous type", 0); + return NULL; + } + /* set reference count */ + p->ref = 1; + /* set flags */ + p->flags = 0; + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p)); + return p; +} + + +/** + * Shrink a pbuf chain to a desired length. + * + * @param p pbuf to shrink. + * @param new_len desired new length of pbuf chain + * + * Depending on the desired length, the first few pbufs in a chain might + * be skipped and left unchanged. The new last pbuf in the chain will be + * resized, and any remaining pbufs will be freed. + * + * @note If the pbuf is ROM/REF, only the ->tot_len and ->len fields are adjusted. + * @note May not be called on a packet queue. + * + * @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain). + */ +void +pbuf_realloc(struct pbuf *p, u16_t new_len) +{ + struct pbuf *q; + u16_t rem_len; /* remaining length */ + s32_t grow; + + LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL); + LWIP_ASSERT("pbuf_realloc: sane p->type", p->type == PBUF_POOL || + p->type == PBUF_ROM || + p->type == PBUF_RAM || + p->type == PBUF_REF); + + /* desired length larger than current length? */ + if (new_len >= p->tot_len) { + /* enlarging not yet supported */ + return; + } + + /* the pbuf chain grows by (new_len - p->tot_len) bytes + * (which may be negative in case of shrinking) */ + grow = new_len - p->tot_len; + + /* first, step over any pbufs that should remain in the chain */ + rem_len = new_len; + q = p; + /* should this pbuf be kept? */ + while (rem_len > q->len) { + /* decrease remaining length by pbuf length */ + rem_len -= q->len; + /* decrease total length indicator */ + LWIP_ASSERT("grow < max_u16_t", grow < 0xffff); + q->tot_len += (u16_t)grow; + /* proceed to next pbuf in chain */ + q = q->next; + LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL); + } + /* we have now reached the new last pbuf (in q) */ + /* rem_len == desired length for pbuf q */ + + /* shrink allocated memory for PBUF_RAM */ + /* (other types merely adjust their length fields */ + if ((q->type == PBUF_RAM) && (rem_len != q->len)) { + /* reallocate and adjust the length of the pbuf that will be split */ + q = mem_realloc(q, (u8_t *)q->payload - (u8_t *)q + rem_len); + LWIP_ASSERT("mem_realloc give q == NULL", q != NULL); + } + /* adjust length fields for new last pbuf */ + q->len = rem_len; + q->tot_len = q->len; + + /* any remaining pbufs in chain? */ + if (q->next != NULL) { + /* free remaining pbufs in chain */ + pbuf_free(q->next); + } + /* q is last packet in chain */ + q->next = NULL; + +} + +/** + * Adjusts the payload pointer to hide or reveal headers in the payload. + * + * Adjusts the ->payload pointer so that space for a header + * (dis)appears in the pbuf payload. + * + * The ->payload, ->tot_len and ->len fields are adjusted. + * + * @param p pbuf to change the header size. + * @param header_size_increment Number of bytes to increment header size which + * increases the size of the pbuf. New space is on the front. + * (Using a negative value decreases the header size.) + * If hdr_size_inc is 0, this function does nothing and returns succesful. + * + * PBUF_ROM and PBUF_REF type buffers cannot have their sizes increased, so + * the call will fail. A check is made that the increase in header size does + * not move the payload pointer in front of the start of the buffer. + * @return non-zero on failure, zero on success. + * + */ +u8_t +pbuf_header(struct pbuf *p, s16_t header_size_increment) +{ + u16_t type; + void *payload; + u16_t increment_magnitude; + + LWIP_ASSERT("p != NULL", p != NULL); + if ((header_size_increment == 0) || (p == NULL)) + return 0; + + if (header_size_increment < 0){ + increment_magnitude = -header_size_increment; + /* Check that we aren't going to move off the end of the pbuf */ + LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;); + } else { + increment_magnitude = header_size_increment; +#if 0 + /* Can't assert these as some callers speculatively call + pbuf_header() to see if it's OK. Will return 1 below instead. */ + /* Check that we've got the correct type of pbuf to work with */ + LWIP_ASSERT("p->type == PBUF_RAM || p->type == PBUF_POOL", + p->type == PBUF_RAM || p->type == PBUF_POOL); + /* Check that we aren't going to move off the beginning of the pbuf */ + LWIP_ASSERT("p->payload - increment_magnitude >= p + SIZEOF_STRUCT_PBUF", + (u8_t *)p->payload - increment_magnitude >= (u8_t *)p + SIZEOF_STRUCT_PBUF); +#endif + } + + type = p->type; + /* remember current payload pointer */ + payload = p->payload; + + /* pbuf types containing payloads? */ + if (type == PBUF_RAM || type == PBUF_POOL) { + /* set new payload pointer */ + p->payload = (u8_t *)p->payload - header_size_increment; + /* boundary check fails? */ + if ((u8_t *)p->payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) { + LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("pbuf_header: failed as %p < %p (not enough space for new header size)\n", + (void *)p->payload, (void *)(p + 1))); + /* restore old payload pointer */ + p->payload = payload; + /* bail out unsuccesfully */ + return 1; + } + /* pbuf types refering to external payloads? */ + } else if (type == PBUF_REF || type == PBUF_ROM) { + /* hide a header in the payload? */ + if ((header_size_increment < 0) && (increment_magnitude <= p->len)) { + /* increase payload pointer */ + p->payload = (u8_t *)p->payload - header_size_increment; + } else { + /* cannot expand payload to front (yet!) + * bail out unsuccesfully */ + return 1; + } + } + else { + /* Unknown type */ + LWIP_ASSERT("bad pbuf type", 0); + return 1; + } + /* modify pbuf length fields */ + p->len += header_size_increment; + p->tot_len += header_size_increment; + + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_header: old %p new %p (%"S16_F")\n", + (void *)payload, (void *)p->payload, header_size_increment)); + + return 0; +} + +/** + * Dereference a pbuf chain or queue and deallocate any no-longer-used + * pbufs at the head of this chain or queue. + * + * Decrements the pbuf reference count. If it reaches zero, the pbuf is + * deallocated. + * + * For a pbuf chain, this is repeated for each pbuf in the chain, + * up to the first pbuf which has a non-zero reference count after + * decrementing. So, when all reference counts are one, the whole + * chain is free'd. + * + * @param p The pbuf (chain) to be dereferenced. + * + * @return the number of pbufs that were de-allocated + * from the head of the chain. + * + * @note MUST NOT be called on a packet queue (Not verified to work yet). + * @note the reference counter of a pbuf equals the number of pointers + * that refer to the pbuf (or into the pbuf). + * + * @internal examples: + * + * Assuming existing chains a->b->c with the following reference + * counts, calling pbuf_free(a) results in: + * + * 1->2->3 becomes ...1->3 + * 3->3->3 becomes 2->3->3 + * 1->1->2 becomes ......1 + * 2->1->1 becomes 1->1->1 + * 1->1->1 becomes ....... + * + */ +u8_t +pbuf_free(struct pbuf *p) +{ + u16_t type; + struct pbuf *q; + u8_t count; + + if (p == NULL) { + LWIP_ASSERT("p != NULL", p != NULL); + /* if assertions are disabled, proceed with debug output */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("pbuf_free(p == NULL) was called.\n")); + return 0; + } + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p)); + + PERF_START; + + LWIP_ASSERT("pbuf_free: sane type", + p->type == PBUF_RAM || p->type == PBUF_ROM || + p->type == PBUF_REF || p->type == PBUF_POOL); + + count = 0; + /* de-allocate all consecutive pbufs from the head of the chain that + * obtain a zero reference count after decrementing*/ + while (p != NULL) { + u16_t ref; + SYS_ARCH_DECL_PROTECT(old_level); + /* Since decrementing ref cannot be guaranteed to be a single machine operation + * we must protect it. We put the new ref into a local variable to prevent + * further protection. */ + SYS_ARCH_PROTECT(old_level); + /* all pbufs in a chain are referenced at least once */ + LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0); + /* decrease reference count (number of pointers to pbuf) */ + ref = --(p->ref); + SYS_ARCH_UNPROTECT(old_level); + /* this pbuf is no longer referenced to? */ + if (ref == 0) { + /* remember next pbuf in chain for next iteration */ + q = p->next; + LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p)); + type = p->type; + /* is this a pbuf from the pool? */ + if (type == PBUF_POOL) { + memp_free(MEMP_PBUF_POOL, p); + /* is this a ROM or RAM referencing pbuf? */ + } else if (type == PBUF_ROM || type == PBUF_REF) { + memp_free(MEMP_PBUF, p); + /* type == PBUF_RAM */ + } else { + mem_free(p); + } + count++; + /* proceed to next pbuf */ + p = q; + /* p->ref > 0, this pbuf is still referenced to */ + /* (and so the remaining pbufs in chain as well) */ + } else { + LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, ref)); + /* stop walking through the chain */ + p = NULL; + } + } + PERF_STOP("pbuf_free"); + /* return number of de-allocated pbufs */ + return count; +} + +/** + * Count number of pbufs in a chain + * + * @param p first pbuf of chain + * @return the number of pbufs in a chain + */ + +u8_t +pbuf_clen(struct pbuf *p) +{ + u8_t len; + + len = 0; + while (p != NULL) { + ++len; + p = p->next; + } + return len; +} + +/** + * Increment the reference count of the pbuf. + * + * @param p pbuf to increase reference counter of + * + */ +void +pbuf_ref(struct pbuf *p) +{ + SYS_ARCH_DECL_PROTECT(old_level); + /* pbuf given? */ + if (p != NULL) { + SYS_ARCH_PROTECT(old_level); + ++(p->ref); + SYS_ARCH_UNPROTECT(old_level); + } +} + +/** + * Concatenate two pbufs (each may be a pbuf chain) and take over + * the caller's reference of the tail pbuf. + * + * @note The caller MAY NOT reference the tail pbuf afterwards. + * Use pbuf_chain() for that purpose. + * + * @see pbuf_chain() + */ + +void +pbuf_cat(struct pbuf *h, struct pbuf *t) +{ + struct pbuf *p; + + LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)", + ((h != NULL) && (t != NULL)), return;); + + /* proceed to last pbuf of chain */ + for (p = h; p->next != NULL; p = p->next) { + /* add total length of second chain to all totals of first chain */ + p->tot_len += t->tot_len; + } + /* { p is last pbuf of first h chain, p->next == NULL } */ + LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len); + LWIP_ASSERT("p->next == NULL", p->next == NULL); + /* add total length of second chain to last pbuf total of first chain */ + p->tot_len += t->tot_len; + /* chain last pbuf of head (p) with first of tail (t) */ + p->next = t; + /* p->next now references t, but the caller will drop its reference to t, + * so netto there is no change to the reference count of t. + */ +} + +/** + * Chain two pbufs (or pbuf chains) together. + * + * The caller MUST call pbuf_free(t) once it has stopped + * using it. Use pbuf_cat() instead if you no longer use t. + * + * @param h head pbuf (chain) + * @param t tail pbuf (chain) + * @note The pbufs MUST belong to the same packet. + * @note MAY NOT be called on a packet queue. + * + * The ->tot_len fields of all pbufs of the head chain are adjusted. + * The ->next field of the last pbuf of the head chain is adjusted. + * The ->ref field of the first pbuf of the tail chain is adjusted. + * + */ +void +pbuf_chain(struct pbuf *h, struct pbuf *t) +{ + pbuf_cat(h, t); + /* t is now referenced by h */ + pbuf_ref(t); + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t)); +} + +/** + * Dechains the first pbuf from its succeeding pbufs in the chain. + * + * Makes p->tot_len field equal to p->len. + * @param p pbuf to dechain + * @return remainder of the pbuf chain, or NULL if it was de-allocated. + * @note May not be called on a packet queue. + */ +struct pbuf * +pbuf_dechain(struct pbuf *p) +{ + struct pbuf *q; + u8_t tail_gone = 1; + /* tail */ + q = p->next; + /* pbuf has successor in chain? */ + if (q != NULL) { + /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ + LWIP_ASSERT("p->tot_len == p->len + q->tot_len", q->tot_len == p->tot_len - p->len); + /* enforce invariant if assertion is disabled */ + q->tot_len = p->tot_len - p->len; + /* decouple pbuf from remainder */ + p->next = NULL; + /* total length of pbuf p is its own length only */ + p->tot_len = p->len; + /* q is no longer referenced by p, free it */ + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_dechain: unreferencing %p\n", (void *)q)); + tail_gone = pbuf_free(q); + if (tail_gone > 0) { + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, + ("pbuf_dechain: deallocated %p (as it is no longer referenced)\n", (void *)q)); + } + /* return remaining tail or NULL if deallocated */ + } + /* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */ + LWIP_ASSERT("p->tot_len == p->len", p->tot_len == p->len); + return ((tail_gone > 0) ? NULL : q); +} + +/** + * + * Create PBUF_RAM copies of pbufs. + * + * Used to queue packets on behalf of the lwIP stack, such as + * ARP based queueing. + * + * @note You MUST explicitly use p = pbuf_take(p); + * + * @note Only one packet is copied, no packet queue! + * + * @param p_to pbuf destination of the copy + * @param p_from pbuf source of the copy + * + * @return ERR_OK if pbuf was copied + * ERR_ARG if one of the pbufs is NULL or p_to is not big + * enough to hold p_from + */ +err_t +pbuf_copy(struct pbuf *p_to, struct pbuf *p_from) +{ + u16_t offset_to=0, offset_from=0, len; + + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n", + (void*)p_to, (void*)p_from)); + + /* is the target big enough to hold the source? */ + LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) && + (p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;); + + /* iterate through pbuf chain */ + do + { + LWIP_ASSERT("p_to != NULL", p_to != NULL); + /* copy one part of the original chain */ + if ((p_to->len - offset_to) >= (p_from->len - offset_from)) { + /* complete current p_from fits into current p_to */ + len = p_from->len - offset_from; + } else { + /* current p_from does not fit into current p_to */ + len = p_to->len - offset_to; + } + MEMCPY((u8_t*)p_to->payload + offset_to, (u8_t*)p_from->payload + offset_from, len); + offset_to += len; + offset_from += len; + LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len); + if (offset_to == p_to->len) { + /* on to next p_to (if any) */ + offset_to = 0; + p_to = p_to->next; + } + LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len); + if (offset_from >= p_from->len) { + /* on to next p_from (if any) */ + offset_from = 0; + p_from = p_from->next; + } + + if((p_from != NULL) && (p_from->len == p_from->tot_len)) { + /* don't copy more than one packet! */ + LWIP_ERROR("pbuf_copy() does not allow packet queues!\n", + (p_from->next == NULL), return ERR_VAL;); + } + if((p_to != NULL) && (p_to->len == p_to->tot_len)) { + /* don't copy more than one packet! */ + LWIP_ERROR("pbuf_copy() does not allow packet queues!\n", + (p_to->next == NULL), return ERR_VAL;); + } + } while (p_from); + LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n")); + return ERR_OK; +} + +/** + * Copy (part of) the contents of a packet buffer + * to an application supplied buffer. + * + * @param buf the pbuf from which to copy data + * @param dataptr the application supplied buffer + * @param len length of data to copy (dataptr must be big enough). No more + * than buf->tot_len will be copied, irrespective of len + * @param offset offset into the packet buffer from where to begin copying len bytes + * @return the number of bytes copied, or 0 on failure + */ +u16_t +pbuf_copy_partial(struct pbuf *buf, void *dataptr, u16_t len, u16_t offset) +{ + struct pbuf *p; + u16_t left; + u16_t buf_copy_len; + u16_t copied_total = 0; + + LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;); + LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;); + + left = 0; + + if((buf == NULL) || (dataptr == NULL)) { + return 0; + } + + /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */ + for(p = buf; len != 0 && p != NULL; p = p->next) { + if ((offset != 0) && (offset >= p->len)) { + /* don't copy from this buffer -> on to the next */ + offset -= p->len; + } else { + /* copy from this buffer. maybe only partially. */ + buf_copy_len = p->len - offset; + if (buf_copy_len > len) + buf_copy_len = len; + /* copy the necessary parts of the buffer */ + MEMCPY(&((char*)dataptr)[left], &((char*)p->payload)[offset], buf_copy_len); + copied_total += buf_copy_len; + left += buf_copy_len; + len -= buf_copy_len; + offset = 0; + } + } + return copied_total; +} + +/** + * Copy application supplied data into a pbuf. + * This function can only be used to copy the equivalent of buf->tot_len data. + * + * @param buf pbuf to fill with data + * @param dataptr application supplied data buffer + * @param len length of the application supplied data buffer + * + * @return ERR_OK if successful, ERR_MEM if the pbuf is not big enough + */ +err_t +pbuf_take(struct pbuf *buf, const void *dataptr, u16_t len) +{ + struct pbuf *p; + u16_t buf_copy_len; + u16_t total_copy_len = len; + u16_t copied_total = 0; + + LWIP_ERROR("pbuf_take: invalid buf", (buf != NULL), return 0;); + LWIP_ERROR("pbuf_take: invalid dataptr", (dataptr != NULL), return 0;); + + if ((buf == NULL) || (dataptr == NULL) || (buf->tot_len < len)) { + return ERR_ARG; + } + + /* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */ + for(p = buf; total_copy_len != 0; p = p->next) { + LWIP_ASSERT("pbuf_take: invalid pbuf", p != NULL); + buf_copy_len = total_copy_len; + if (buf_copy_len > p->len) { + /* this pbuf cannot hold all remaining data */ + buf_copy_len = p->len; + } + /* copy the necessary parts of the buffer */ + MEMCPY(p->payload, &((char*)dataptr)[copied_total], buf_copy_len); + total_copy_len -= buf_copy_len; + copied_total += buf_copy_len; + } + LWIP_ASSERT("did not copy all data", total_copy_len == 0 && copied_total == len); + return ERR_OK; +} + +/** + * Creates a single pbuf out of a queue of pbufs. + * + * @remark: The source pbuf 'p' is not freed by this function because that can + * be illegal in some places! + * + * @param p the source pbuf + * @param layer pbuf_layer of the new pbuf + * + * @return a new, single pbuf (p->next is NULL) + * or the old pbuf if allocation fails + */ +struct pbuf* +pbuf_coalesce(struct pbuf *p, pbuf_layer layer) +{ + struct pbuf *q; + err_t err; + if (p->next == NULL) { + return p; + } + q = pbuf_alloc(layer, p->tot_len, PBUF_RAM); + if (q == NULL) { + /* @todo: what do we do now? */ + return p; + } + err = pbuf_copy(q, p); + LWIP_ASSERT("pbuf_copy failed", err == ERR_OK); + pbuf_free(p); + return q; +} diff --git a/bertos/net/lwip/src/core/raw.c b/bertos/net/lwip/src/core/raw.c new file mode 100644 index 0000000..2f105fe --- /dev/null +++ b/bertos/net/lwip/src/core/raw.c @@ -0,0 +1,353 @@ +/** + * @file + * Implementation of raw protocol PCBs for low-level handling of + * different types of protocols besides (or overriding) those + * already available in lwIP. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/memp.h" +#include "lwip/inet.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/raw.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "arch/perf.h" + +#include + +/** The list of RAW PCBs */ +static struct raw_pcb *raw_pcbs; + +/** + * Determine if in incoming IP packet is covered by a RAW PCB + * and if so, pass it to a user-provided receive callback function. + * + * Given an incoming IP datagram (as a chain of pbufs) this function + * finds a corresponding RAW PCB and calls the corresponding receive + * callback function. + * + * @param p pbuf to be demultiplexed to a RAW PCB. + * @param inp network interface on which the datagram was received. + * @return - 1 if the packet has been eaten by a RAW PCB receive + * callback function. The caller MAY NOT not reference the + * packet any longer, and MAY NOT call pbuf_free(). + * @return - 0 if packet is not eaten (pbuf is still referenced by the + * caller). + * + */ +u8_t +raw_input(struct pbuf *p, struct netif *inp) +{ + struct raw_pcb *pcb, *prev; + struct ip_hdr *iphdr; + s16_t proto; + u8_t eaten = 0; + + LWIP_UNUSED_ARG(inp); + + iphdr = p->payload; + proto = IPH_PROTO(iphdr); + + prev = NULL; + pcb = raw_pcbs; + /* loop through all raw pcbs until the packet is eaten by one */ + /* this allows multiple pcbs to match against the packet by design */ + while ((eaten == 0) && (pcb != NULL)) { + if (pcb->protocol == proto) { +#if IP_SOF_BROADCAST_RECV + /* broadcast filter? */ + if ((pcb->so_options & SOF_BROADCAST) || !ip_addr_isbroadcast(&(iphdr->dest), inp)) +#endif /* IP_SOF_BROADCAST_RECV */ + { + /* receive callback function available? */ + if (pcb->recv != NULL) { + /* the receive callback function did not eat the packet? */ + if (pcb->recv(pcb->recv_arg, pcb, p, &(iphdr->src)) != 0) { + /* receive function ate the packet */ + p = NULL; + eaten = 1; + if (prev != NULL) { + /* move the pcb to the front of raw_pcbs so that is + found faster next time */ + prev->next = pcb->next; + pcb->next = raw_pcbs; + raw_pcbs = pcb; + } + } + } + /* no receive callback function was set for this raw PCB */ + } + /* drop the packet */ + } + prev = pcb; + pcb = pcb->next; + } + return eaten; +} + +/** + * Bind a RAW PCB. + * + * @param pcb RAW PCB to be bound with a local address ipaddr. + * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to + * bind to all local interfaces. + * + * @return lwIP error code. + * - ERR_OK. Successful. No error occured. + * - ERR_USE. The specified IP address is already bound to by + * another RAW PCB. + * + * @see raw_disconnect() + */ +err_t +raw_bind(struct raw_pcb *pcb, struct ip_addr *ipaddr) +{ + ip_addr_set(&pcb->local_ip, ipaddr); + return ERR_OK; +} + +/** + * Connect an RAW PCB. This function is required by upper layers + * of lwip. Using the raw api you could use raw_sendto() instead + * + * This will associate the RAW PCB with the remote address. + * + * @param pcb RAW PCB to be connected with remote address ipaddr and port. + * @param ipaddr remote IP address to connect with. + * + * @return lwIP error code + * + * @see raw_disconnect() and raw_sendto() + */ +err_t +raw_connect(struct raw_pcb *pcb, struct ip_addr *ipaddr) +{ + ip_addr_set(&pcb->remote_ip, ipaddr); + return ERR_OK; +} + + +/** + * Set the callback function for received packets that match the + * raw PCB's protocol and binding. + * + * The callback function MUST either + * - eat the packet by calling pbuf_free() and returning non-zero. The + * packet will not be passed to other raw PCBs or other protocol layers. + * - not free the packet, and return zero. The packet will be matched + * against further PCBs and/or forwarded to another protocol layers. + * + * @return non-zero if the packet was free()d, zero if the packet remains + * available for others. + */ +void +raw_recv(struct raw_pcb *pcb, + u8_t (* recv)(void *arg, struct raw_pcb *upcb, struct pbuf *p, + struct ip_addr *addr), + void *recv_arg) +{ + /* remember recv() callback and user data */ + pcb->recv = recv; + pcb->recv_arg = recv_arg; +} + +/** + * Send the raw IP packet to the given address. Note that actually you cannot + * modify the IP headers (this is inconsistent with the receive callback where + * you actually get the IP headers), you can only specify the IP payload here. + * It requires some more changes in lwIP. (there will be a raw_send() function + * then.) + * + * @param pcb the raw pcb which to send + * @param p the IP payload to send + * @param ipaddr the destination address of the IP packet + * + */ +err_t +raw_sendto(struct raw_pcb *pcb, struct pbuf *p, struct ip_addr *ipaddr) +{ + err_t err; + struct netif *netif; + struct ip_addr *src_ip; + struct pbuf *q; /* q will be sent down the stack */ + + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE, ("raw_sendto\n")); + + /* not enough space to add an IP header to first pbuf in given p chain? */ + if (pbuf_header(p, IP_HLEN)) { + /* allocate header in new pbuf */ + q = pbuf_alloc(PBUF_IP, 0, PBUF_RAM); + /* new header pbuf could not be allocated? */ + if (q == NULL) { + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("raw_sendto: could not allocate header\n")); + return ERR_MEM; + } + /* chain header q in front of given pbuf p */ + pbuf_chain(q, p); + /* { first pbuf q points to header pbuf } */ + LWIP_DEBUGF(RAW_DEBUG, ("raw_sendto: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); + } else { + /* first pbuf q equals given pbuf */ + q = p; + if(pbuf_header(q, -IP_HLEN)) { + LWIP_ASSERT("Can't restore header we just removed!", 0); + return ERR_MEM; + } + } + + if ((netif = ip_route(ipaddr)) == NULL) { + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_LEVEL_WARNING, ("raw_sendto: No route to 0x%"X32_F"\n", ipaddr->addr)); + /* free any temporary header pbuf allocated by pbuf_header() */ + if (q != p) { + pbuf_free(q); + } + return ERR_RTE; + } + +#if IP_SOF_BROADCAST + /* broadcast filter? */ + if ( ((pcb->so_options & SOF_BROADCAST) == 0) && ip_addr_isbroadcast(ipaddr, netif) ) { + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_LEVEL_WARNING, ("raw_sendto: SOF_BROADCAST not enabled on pcb %p\n", (void *)pcb)); + /* free any temporary header pbuf allocated by pbuf_header() */ + if (q != p) { + pbuf_free(q); + } + return ERR_VAL; + } +#endif /* IP_SOF_BROADCAST */ + + if (ip_addr_isany(&pcb->local_ip)) { + /* use outgoing network interface IP address as source address */ + src_ip = &(netif->ip_addr); + } else { + /* use RAW PCB local IP address as source address */ + src_ip = &(pcb->local_ip); + } + +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = &(pcb->addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT*/ + err = ip_output_if (q, src_ip, ipaddr, pcb->ttl, pcb->tos, pcb->protocol, netif); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ + + /* did we chain a header earlier? */ + if (q != p) { + /* free the header */ + pbuf_free(q); + } + return err; +} + +/** + * Send the raw IP packet to the address given by raw_connect() + * + * @param pcb the raw pcb which to send + * @param p the IP payload to send + * + */ +err_t +raw_send(struct raw_pcb *pcb, struct pbuf *p) +{ + return raw_sendto(pcb, p, &pcb->remote_ip); +} + +/** + * Remove an RAW PCB. + * + * @param pcb RAW PCB to be removed. The PCB is removed from the list of + * RAW PCB's and the data structure is freed from memory. + * + * @see raw_new() + */ +void +raw_remove(struct raw_pcb *pcb) +{ + struct raw_pcb *pcb2; + /* pcb to be removed is first in list? */ + if (raw_pcbs == pcb) { + /* make list start at 2nd pcb */ + raw_pcbs = raw_pcbs->next; + /* pcb not 1st in list */ + } else { + for(pcb2 = raw_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { + /* find pcb in raw_pcbs list */ + if (pcb2->next != NULL && pcb2->next == pcb) { + /* remove pcb from list */ + pcb2->next = pcb->next; + } + } + } + memp_free(MEMP_RAW_PCB, pcb); +} + +/** + * Create a RAW PCB. + * + * @return The RAW PCB which was created. NULL if the PCB data structure + * could not be allocated. + * + * @param proto the protocol number of the IPs payload (e.g. IP_PROTO_ICMP) + * + * @see raw_remove() + */ +struct raw_pcb * +raw_new(u8_t proto) { + struct raw_pcb *pcb; + + LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE, ("raw_new\n")); + + pcb = memp_malloc(MEMP_RAW_PCB); + /* could allocate RAW PCB? */ + if (pcb != NULL) { + /* initialize PCB to all zeroes */ + memset(pcb, 0, sizeof(struct raw_pcb)); + pcb->protocol = proto; + pcb->ttl = RAW_TTL; + pcb->next = raw_pcbs; + raw_pcbs = pcb; + } + return pcb; +} + +#endif /* LWIP_RAW */ diff --git a/bertos/net/lwip/src/core/snmp/asn1_dec.c b/bertos/net/lwip/src/core/snmp/asn1_dec.c new file mode 100644 index 0000000..650fb40 --- /dev/null +++ b/bertos/net/lwip/src/core/snmp/asn1_dec.c @@ -0,0 +1,657 @@ +/** + * @file + * Abstract Syntax Notation One (ISO 8824, 8825) decoding + * + * @todo not optimised (yet), favor correctness over speed, favor speed over size + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#include "lwip/opt.h" + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/snmp_asn1.h" + +/** + * Retrieves type field from incoming pbuf chain. + * + * @param p points to a pbuf holding an ASN1 coded type field + * @param ofs points to the offset within the pbuf chain of the ASN1 coded type field + * @param type return ASN1 type + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) decode + */ +err_t +snmp_asn1_dec_type(struct pbuf *p, u16_t ofs, u8_t *type) +{ + u16_t plen, base; + u8_t *msg_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + *type = *msg_ptr; + return ERR_OK; + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Decodes length field from incoming pbuf chain into host length. + * + * @param p points to a pbuf holding an ASN1 coded length + * @param ofs points to the offset within the pbuf chain of the ASN1 coded length + * @param octets_used returns number of octets used by the length code + * @param length return host order length, upto 64k + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) decode + */ +err_t +snmp_asn1_dec_length(struct pbuf *p, u16_t ofs, u8_t *octets_used, u16_t *length) +{ + u16_t plen, base; + u8_t *msg_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + + if (*msg_ptr < 0x80) + { + /* primitive definite length format */ + *octets_used = 1; + *length = *msg_ptr; + return ERR_OK; + } + else if (*msg_ptr == 0x80) + { + /* constructed indefinite length format, termination with two zero octets */ + u8_t zeros; + u8_t i; + + *length = 0; + zeros = 0; + while (zeros != 2) + { + i = 2; + while (i > 0) + { + i--; + (*length) += 1; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + if (*msg_ptr == 0) + { + zeros++; + if (zeros == 2) + { + /* stop while (i > 0) */ + i = 0; + } + } + else + { + zeros = 0; + } + } + } + *octets_used = 1; + return ERR_OK; + } + else if (*msg_ptr == 0x81) + { + /* constructed definite length format, one octet */ + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + *length = *msg_ptr; + *octets_used = 2; + return ERR_OK; + } + else if (*msg_ptr == 0x82) + { + u8_t i; + + /* constructed definite length format, two octets */ + i = 2; + while (i > 0) + { + i--; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + if (i == 0) + { + /* least significant length octet */ + *length |= *msg_ptr; + } + else + { + /* most significant length octet */ + *length = (*msg_ptr) << 8; + } + } + *octets_used = 3; + return ERR_OK; + } + else + { + /* constructed definite length format 3..127 octets, this is too big (>64k) */ + /** @todo: do we need to accept inefficient codings with many leading zero's? */ + *octets_used = 1 + ((*msg_ptr) & 0x7f); + return ERR_ARG; + } + } + p = p->next; + } + + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Decodes positive integer (counter, gauge, timeticks) into u32_t. + * + * @param p points to a pbuf holding an ASN1 coded integer + * @param ofs points to the offset within the pbuf chain of the ASN1 coded integer + * @param len length of the coded integer field + * @param value return host order integer + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) decode + * + * @note ASN coded integers are _always_ signed. E.g. +0xFFFF is coded + * as 0x00,0xFF,0xFF. Note the leading sign octet. A positive value + * of 0xFFFFFFFF is preceded with 0x00 and the length is 5 octets!! + */ +err_t +snmp_asn1_dec_u32t(struct pbuf *p, u16_t ofs, u16_t len, u32_t *value) +{ + u16_t plen, base; + u8_t *msg_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + if ((len > 0) && (len < 6)) + { + /* start from zero */ + *value = 0; + if (*msg_ptr & 0x80) + { + /* negative, expecting zero sign bit! */ + return ERR_ARG; + } + else + { + /* positive */ + if ((len > 1) && (*msg_ptr == 0)) + { + /* skip leading "sign byte" octet 0x00 */ + len--; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + } + /* OR octets with value */ + while (len > 1) + { + len--; + *value |= *msg_ptr; + *value <<= 8; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + *value |= *msg_ptr; + return ERR_OK; + } + else + { + return ERR_ARG; + } + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Decodes integer into s32_t. + * + * @param p points to a pbuf holding an ASN1 coded integer + * @param ofs points to the offset within the pbuf chain of the ASN1 coded integer + * @param len length of the coded integer field + * @param value return host order integer + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) decode + * + * @note ASN coded integers are _always_ signed! + */ +err_t +snmp_asn1_dec_s32t(struct pbuf *p, u16_t ofs, u16_t len, s32_t *value) +{ + u16_t plen, base; + u8_t *msg_ptr; +#if BYTE_ORDER == LITTLE_ENDIAN + u8_t *lsb_ptr = (u8_t*)value; +#endif +#if BYTE_ORDER == BIG_ENDIAN + u8_t *lsb_ptr = (u8_t*)value + sizeof(s32_t) - 1; +#endif + u8_t sign; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + if ((len > 0) && (len < 5)) + { + if (*msg_ptr & 0x80) + { + /* negative, start from -1 */ + *value = -1; + sign = 1; + } + else + { + /* positive, start from 0 */ + *value = 0; + sign = 0; + } + /* OR/AND octets with value */ + while (len > 1) + { + len--; + if (sign) + { + *lsb_ptr &= *msg_ptr; + *value <<= 8; + *lsb_ptr |= 255; + } + else + { + *lsb_ptr |= *msg_ptr; + *value <<= 8; + } + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + if (sign) + { + *lsb_ptr &= *msg_ptr; + } + else + { + *lsb_ptr |= *msg_ptr; + } + return ERR_OK; + } + else + { + return ERR_ARG; + } + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Decodes object identifier from incoming message into array of s32_t. + * + * @param p points to a pbuf holding an ASN1 coded object identifier + * @param ofs points to the offset within the pbuf chain of the ASN1 coded object identifier + * @param len length of the coded object identifier + * @param oid return object identifier struct + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) decode + */ +err_t +snmp_asn1_dec_oid(struct pbuf *p, u16_t ofs, u16_t len, struct snmp_obj_id *oid) +{ + u16_t plen, base; + u8_t *msg_ptr; + s32_t *oid_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + + oid->len = 0; + oid_ptr = &oid->id[0]; + if (len > 0) + { + /* first compressed octet */ + if (*msg_ptr == 0x2B) + { + /* (most) common case 1.3 (iso.org) */ + *oid_ptr = 1; + oid_ptr++; + *oid_ptr = 3; + oid_ptr++; + } + else if (*msg_ptr < 40) + { + *oid_ptr = 0; + oid_ptr++; + *oid_ptr = *msg_ptr; + oid_ptr++; + } + else if (*msg_ptr < 80) + { + *oid_ptr = 1; + oid_ptr++; + *oid_ptr = (*msg_ptr) - 40; + oid_ptr++; + } + else + { + *oid_ptr = 2; + oid_ptr++; + *oid_ptr = (*msg_ptr) - 80; + oid_ptr++; + } + oid->len = 2; + } + else + { + /* accepting zero length identifiers e.g. for + getnext operation. uncommon but valid */ + return ERR_OK; + } + len--; + if (len > 0) + { + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + while ((len > 0) && (oid->len < LWIP_SNMP_OBJ_ID_LEN)) + { + /* sub-identifier uses multiple octets */ + if (*msg_ptr & 0x80) + { + s32_t sub_id = 0; + + while ((*msg_ptr & 0x80) && (len > 1)) + { + len--; + sub_id = (sub_id << 7) + (*msg_ptr & ~0x80); + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + if (!(*msg_ptr & 0x80) && (len > 0)) + { + /* last octet sub-identifier */ + len--; + sub_id = (sub_id << 7) + *msg_ptr; + *oid_ptr = sub_id; + } + } + else + { + /* !(*msg_ptr & 0x80) sub-identifier uses single octet */ + len--; + *oid_ptr = *msg_ptr; + } + if (len > 0) + { + /* remaining oid bytes available ... */ + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + oid_ptr++; + oid->len++; + } + if (len == 0) + { + /* len == 0, end of oid */ + return ERR_OK; + } + else + { + /* len > 0, oid->len == LWIP_SNMP_OBJ_ID_LEN or malformed encoding */ + return ERR_ARG; + } + + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Decodes (copies) raw data (ip-addresses, octet strings, opaque encoding) + * from incoming message into array. + * + * @param p points to a pbuf holding an ASN1 coded raw data + * @param ofs points to the offset within the pbuf chain of the ASN1 coded raw data + * @param len length of the coded raw data (zero is valid, e.g. empty string!) + * @param raw_len length of the raw return value + * @param raw return raw bytes + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) decode + */ +err_t +snmp_asn1_dec_raw(struct pbuf *p, u16_t ofs, u16_t len, u16_t raw_len, u8_t *raw) +{ + u16_t plen, base; + u8_t *msg_ptr; + + if (len > 0) + { + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + if (raw_len >= len) + { + while (len > 1) + { + /* copy len - 1 octets */ + len--; + *raw = *msg_ptr; + raw++; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + /* copy last octet */ + *raw = *msg_ptr; + return ERR_OK; + } + else + { + /* raw_len < len, not enough dst space */ + return ERR_ARG; + } + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; + } + else + { + /* len == 0, empty string */ + return ERR_OK; + } +} + +#endif /* LWIP_SNMP */ diff --git a/bertos/net/lwip/src/core/snmp/asn1_enc.c b/bertos/net/lwip/src/core/snmp/asn1_enc.c new file mode 100644 index 0000000..77af6b4 --- /dev/null +++ b/bertos/net/lwip/src/core/snmp/asn1_enc.c @@ -0,0 +1,611 @@ +/** + * @file + * Abstract Syntax Notation One (ISO 8824, 8825) encoding + * + * @todo not optimised (yet), favor correctness over speed, favor speed over size + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#include "lwip/opt.h" + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/snmp_asn1.h" + +/** + * Returns octet count for length. + * + * @param length + * @param octets_needed points to the return value + */ +void +snmp_asn1_enc_length_cnt(u16_t length, u8_t *octets_needed) +{ + if (length < 0x80U) + { + *octets_needed = 1; + } + else if (length < 0x100U) + { + *octets_needed = 2; + } + else + { + *octets_needed = 3; + } +} + +/** + * Returns octet count for an u32_t. + * + * @param value + * @param octets_needed points to the return value + * + * @note ASN coded integers are _always_ signed. E.g. +0xFFFF is coded + * as 0x00,0xFF,0xFF. Note the leading sign octet. A positive value + * of 0xFFFFFFFF is preceded with 0x00 and the length is 5 octets!! + */ +void +snmp_asn1_enc_u32t_cnt(u32_t value, u16_t *octets_needed) +{ + if (value < 0x80UL) + { + *octets_needed = 1; + } + else if (value < 0x8000UL) + { + *octets_needed = 2; + } + else if (value < 0x800000UL) + { + *octets_needed = 3; + } + else if (value < 0x80000000UL) + { + *octets_needed = 4; + } + else + { + *octets_needed = 5; + } +} + +/** + * Returns octet count for an s32_t. + * + * @param value + * @param octets_needed points to the return value + * + * @note ASN coded integers are _always_ signed. + */ +void +snmp_asn1_enc_s32t_cnt(s32_t value, u16_t *octets_needed) +{ + if (value < 0) + { + value = ~value; + } + if (value < 0x80L) + { + *octets_needed = 1; + } + else if (value < 0x8000L) + { + *octets_needed = 2; + } + else if (value < 0x800000L) + { + *octets_needed = 3; + } + else + { + *octets_needed = 4; + } +} + +/** + * Returns octet count for an object identifier. + * + * @param ident_len object identifier array length + * @param ident points to object identifier array + * @param octets_needed points to the return value + */ +void +snmp_asn1_enc_oid_cnt(u8_t ident_len, s32_t *ident, u16_t *octets_needed) +{ + s32_t sub_id; + u8_t cnt; + + cnt = 0; + if (ident_len > 1) + { + /* compressed prefix in one octet */ + cnt++; + ident_len -= 2; + ident += 2; + } + while(ident_len > 0) + { + ident_len--; + sub_id = *ident; + + sub_id >>= 7; + cnt++; + while(sub_id > 0) + { + sub_id >>= 7; + cnt++; + } + ident++; + } + *octets_needed = cnt; +} + +/** + * Encodes ASN type field into a pbuf chained ASN1 msg. + * + * @param p points to output pbuf to encode value into + * @param ofs points to the offset within the pbuf chain + * @param type input ASN1 type + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) encode + */ +err_t +snmp_asn1_enc_type(struct pbuf *p, u16_t ofs, u8_t type) +{ + u16_t plen, base; + u8_t *msg_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + *msg_ptr = type; + return ERR_OK; + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Encodes host order length field into a pbuf chained ASN1 msg. + * + * @param p points to output pbuf to encode length into + * @param ofs points to the offset within the pbuf chain + * @param length is the host order length to be encoded + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) encode + */ +err_t +snmp_asn1_enc_length(struct pbuf *p, u16_t ofs, u16_t length) +{ + u16_t plen, base; + u8_t *msg_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + + if (length < 0x80) + { + *msg_ptr = length; + return ERR_OK; + } + else if (length < 0x100) + { + *msg_ptr = 0x81; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + *msg_ptr = length; + return ERR_OK; + } + else + { + u8_t i; + + /* length >= 0x100 && length <= 0xFFFF */ + *msg_ptr = 0x82; + i = 2; + while (i > 0) + { + i--; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + if (i == 0) + { + /* least significant length octet */ + *msg_ptr = length; + } + else + { + /* most significant length octet */ + *msg_ptr = length >> 8; + } + } + return ERR_OK; + } + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Encodes u32_t (counter, gauge, timeticks) into a pbuf chained ASN1 msg. + * + * @param p points to output pbuf to encode value into + * @param ofs points to the offset within the pbuf chain + * @param octets_needed encoding length (from snmp_asn1_enc_u32t_cnt()) + * @param value is the host order u32_t value to be encoded + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) encode + * + * @see snmp_asn1_enc_u32t_cnt() + */ +err_t +snmp_asn1_enc_u32t(struct pbuf *p, u16_t ofs, u8_t octets_needed, u32_t value) +{ + u16_t plen, base; + u8_t *msg_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + + if (octets_needed == 5) + { + /* not enough bits in 'value' add leading 0x00 */ + octets_needed--; + *msg_ptr = 0x00; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + while (octets_needed > 1) + { + octets_needed--; + *msg_ptr = value >> (octets_needed << 3); + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + /* (only) one least significant octet */ + *msg_ptr = value; + return ERR_OK; + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Encodes s32_t integer into a pbuf chained ASN1 msg. + * + * @param p points to output pbuf to encode value into + * @param ofs points to the offset within the pbuf chain + * @param octets_needed encoding length (from snmp_asn1_enc_s32t_cnt()) + * @param value is the host order s32_t value to be encoded + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) encode + * + * @see snmp_asn1_enc_s32t_cnt() + */ +err_t +snmp_asn1_enc_s32t(struct pbuf *p, u16_t ofs, u8_t octets_needed, s32_t value) +{ + u16_t plen, base; + u8_t *msg_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + + while (octets_needed > 1) + { + octets_needed--; + *msg_ptr = value >> (octets_needed << 3); + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + /* (only) one least significant octet */ + *msg_ptr = value; + return ERR_OK; + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Encodes object identifier into a pbuf chained ASN1 msg. + * + * @param p points to output pbuf to encode oid into + * @param ofs points to the offset within the pbuf chain + * @param ident_len object identifier array length + * @param ident points to object identifier array + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) encode + */ +err_t +snmp_asn1_enc_oid(struct pbuf *p, u16_t ofs, u8_t ident_len, s32_t *ident) +{ + u16_t plen, base; + u8_t *msg_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + + if (ident_len > 1) + { + if ((ident[0] == 1) && (ident[1] == 3)) + { + /* compressed (most common) prefix .iso.org */ + *msg_ptr = 0x2b; + } + else + { + /* calculate prefix */ + *msg_ptr = (ident[0] * 40) + ident[1]; + } + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + ident_len -= 2; + ident += 2; + } + else + { +/* @bug: allow empty varbinds for symmetry (we must decode them for getnext), allow partial compression?? */ + /* ident_len <= 1, at least we need zeroDotZero (0.0) (ident_len == 2) */ + return ERR_ARG; + } + while (ident_len > 0) + { + s32_t sub_id; + u8_t shift, tail; + + ident_len--; + sub_id = *ident; + tail = 0; + shift = 28; + while(shift > 0) + { + u8_t code; + + code = sub_id >> shift; + if ((code != 0) || (tail != 0)) + { + tail = 1; + *msg_ptr = code | 0x80; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + shift -= 7; + } + *msg_ptr = (u8_t)sub_id & 0x7F; + if (ident_len > 0) + { + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + /* proceed to next sub-identifier */ + ident++; + } + return ERR_OK; + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +/** + * Encodes raw data (octet string, opaque) into a pbuf chained ASN1 msg. + * + * @param p points to output pbuf to encode raw data into + * @param ofs points to the offset within the pbuf chain + * @param raw_len raw data length + * @param raw points raw data + * @return ERR_OK if successfull, ERR_ARG if we can't (or won't) encode + */ +err_t +snmp_asn1_enc_raw(struct pbuf *p, u16_t ofs, u8_t raw_len, u8_t *raw) +{ + u16_t plen, base; + u8_t *msg_ptr; + + plen = 0; + while (p != NULL) + { + base = plen; + plen += p->len; + if (ofs < plen) + { + msg_ptr = p->payload; + msg_ptr += ofs - base; + + while (raw_len > 1) + { + /* copy raw_len - 1 octets */ + raw_len--; + *msg_ptr = *raw; + raw++; + ofs += 1; + if (ofs >= plen) + { + /* next octet in next pbuf */ + p = p->next; + if (p == NULL) { return ERR_ARG; } + msg_ptr = p->payload; + plen += p->len; + } + else + { + /* next octet in same pbuf */ + msg_ptr++; + } + } + if (raw_len > 0) + { + /* copy last or single octet */ + *msg_ptr = *raw; + } + return ERR_OK; + } + p = p->next; + } + /* p == NULL, ofs >= plen */ + return ERR_ARG; +} + +#endif /* LWIP_SNMP */ diff --git a/bertos/net/lwip/src/core/snmp/mib2.c b/bertos/net/lwip/src/core/snmp/mib2.c new file mode 100644 index 0000000..bc5830d --- /dev/null +++ b/bertos/net/lwip/src/core/snmp/mib2.c @@ -0,0 +1,4128 @@ +/** + * @file + * Management Information Base II (RFC1213) objects and functions. + * + * @note the object identifiers for this MIB-2 and private MIB tree + * must be kept in sorted ascending order. This to ensure correct getnext operation. + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#include "lwip/opt.h" + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/snmp.h" +#include "lwip/netif.h" +#include "lwip/ip.h" +#include "lwip/ip_frag.h" +#include "lwip/tcp.h" +#include "lwip/udp.h" +#include "lwip/snmp_asn1.h" +#include "lwip/snmp_structs.h" +#include "netif/etharp.h" + +/** + * IANA assigned enterprise ID for lwIP is 26381 + * @see http://www.iana.org/assignments/enterprise-numbers + * + * @note this enterprise ID is assigned to the lwIP project, + * all object identifiers living under this ID are assigned + * by the lwIP maintainers (contact Christiaan Simons)! + * @note don't change this define, use snmp_set_sysobjid() + * + * If you need to create your own private MIB you'll need + * to apply for your own enterprise ID with IANA: + * http://www.iana.org/numbers.html + */ +#define SNMP_ENTERPRISE_ID 26381 +#define SNMP_SYSOBJID_LEN 7 +#define SNMP_SYSOBJID {1, 3, 6, 1, 4, 1, SNMP_ENTERPRISE_ID} + +#ifndef SNMP_SYSSERVICES +#define SNMP_SYSSERVICES ((1 << 6) | (1 << 3) | ((IP_FORWARD) << 2)) +#endif + +#ifndef SNMP_GET_SYSUPTIME +#define SNMP_GET_SYSUPTIME(sysuptime) +#endif + +static void system_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void system_get_value(struct obj_def *od, u16_t len, void *value); +static u8_t system_set_test(struct obj_def *od, u16_t len, void *value); +static void system_set_value(struct obj_def *od, u16_t len, void *value); +static void interfaces_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void interfaces_get_value(struct obj_def *od, u16_t len, void *value); +static void ifentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void ifentry_get_value(struct obj_def *od, u16_t len, void *value); +#if !SNMP_SAFE_REQUESTS +static u8_t ifentry_set_test (struct obj_def *od, u16_t len, void *value); +static void ifentry_set_value (struct obj_def *od, u16_t len, void *value); +#endif /* SNMP_SAFE_REQUESTS */ +static void atentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void atentry_get_value(struct obj_def *od, u16_t len, void *value); +static void ip_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void ip_get_value(struct obj_def *od, u16_t len, void *value); +static u8_t ip_set_test(struct obj_def *od, u16_t len, void *value); +static void ip_addrentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void ip_addrentry_get_value(struct obj_def *od, u16_t len, void *value); +static void ip_rteentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void ip_rteentry_get_value(struct obj_def *od, u16_t len, void *value); +static void ip_ntomentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void ip_ntomentry_get_value(struct obj_def *od, u16_t len, void *value); +static void icmp_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void icmp_get_value(struct obj_def *od, u16_t len, void *value); +#if LWIP_TCP +static void tcp_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void tcp_get_value(struct obj_def *od, u16_t len, void *value); +#ifdef THIS_SEEMS_UNUSED +static void tcpconnentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void tcpconnentry_get_value(struct obj_def *od, u16_t len, void *value); +#endif +#endif +static void udp_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void udp_get_value(struct obj_def *od, u16_t len, void *value); +static void udpentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void udpentry_get_value(struct obj_def *od, u16_t len, void *value); +static void snmp_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +static void snmp_get_value(struct obj_def *od, u16_t len, void *value); +static u8_t snmp_set_test(struct obj_def *od, u16_t len, void *value); +static void snmp_set_value(struct obj_def *od, u16_t len, void *value); + + +/* snmp .1.3.6.1.2.1.11 */ +const mib_scalar_node snmp_scalar = { + &snmp_get_object_def, + &snmp_get_value, + &snmp_set_test, + &snmp_set_value, + MIB_NODE_SC, + 0 +}; +const s32_t snmp_ids[28] = { + 1, 2, 3, 4, 5, 6, 8, 9, 10, 11, 12, 13, 14, 15, 16, + 17, 18, 19, 20, 21, 22, 24, 25, 26, 27, 28, 29, 30 +}; +struct mib_node* const snmp_nodes[28] = { + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar, + (struct mib_node* const)&snmp_scalar, (struct mib_node* const)&snmp_scalar +}; +const struct mib_array_node snmp = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 28, + snmp_ids, + snmp_nodes +}; + +/* dot3 and EtherLike MIB not planned. (transmission .1.3.6.1.2.1.10) */ +/* historical (some say hysterical). (cmot .1.3.6.1.2.1.9) */ +/* lwIP has no EGP, thus may not implement it. (egp .1.3.6.1.2.1.8) */ + +/* udp .1.3.6.1.2.1.7 */ +/** index root node for udpTable */ +struct mib_list_rootnode udp_root = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_LR, + 0, + NULL, + NULL, + 0 +}; +const s32_t udpentry_ids[2] = { 1, 2 }; +struct mib_node* const udpentry_nodes[2] = { + (struct mib_node* const)&udp_root, (struct mib_node* const)&udp_root, +}; +const struct mib_array_node udpentry = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 2, + udpentry_ids, + udpentry_nodes +}; + +s32_t udptable_id = 1; +struct mib_node* udptable_node = (struct mib_node* const)&udpentry; +struct mib_ram_array_node udptable = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_RA, + 0, + &udptable_id, + &udptable_node +}; + +const mib_scalar_node udp_scalar = { + &udp_get_object_def, + &udp_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_SC, + 0 +}; +const s32_t udp_ids[5] = { 1, 2, 3, 4, 5 }; +struct mib_node* const udp_nodes[5] = { + (struct mib_node* const)&udp_scalar, (struct mib_node* const)&udp_scalar, + (struct mib_node* const)&udp_scalar, (struct mib_node* const)&udp_scalar, + (struct mib_node* const)&udptable +}; +const struct mib_array_node udp = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 5, + udp_ids, + udp_nodes +}; + +/* tcp .1.3.6.1.2.1.6 */ +#if LWIP_TCP +/* only if the TCP protocol is available may implement this group */ +/** index root node for tcpConnTable */ +struct mib_list_rootnode tcpconntree_root = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_LR, + 0, + NULL, + NULL, + 0 +}; +const s32_t tcpconnentry_ids[5] = { 1, 2, 3, 4, 5 }; +struct mib_node* const tcpconnentry_nodes[5] = { + (struct mib_node* const)&tcpconntree_root, (struct mib_node* const)&tcpconntree_root, + (struct mib_node* const)&tcpconntree_root, (struct mib_node* const)&tcpconntree_root, + (struct mib_node* const)&tcpconntree_root +}; +const struct mib_array_node tcpconnentry = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 5, + tcpconnentry_ids, + tcpconnentry_nodes +}; + +s32_t tcpconntable_id = 1; +struct mib_node* tcpconntable_node = (struct mib_node* const)&tcpconnentry; +struct mib_ram_array_node tcpconntable = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_RA, +/** @todo update maxlength when inserting / deleting from table + 0 when table is empty, 1 when more than one entry */ + 0, + &tcpconntable_id, + &tcpconntable_node +}; + +const mib_scalar_node tcp_scalar = { + &tcp_get_object_def, + &tcp_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_SC, + 0 +}; +const s32_t tcp_ids[15] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; +struct mib_node* const tcp_nodes[15] = { + (struct mib_node* const)&tcp_scalar, (struct mib_node* const)&tcp_scalar, + (struct mib_node* const)&tcp_scalar, (struct mib_node* const)&tcp_scalar, + (struct mib_node* const)&tcp_scalar, (struct mib_node* const)&tcp_scalar, + (struct mib_node* const)&tcp_scalar, (struct mib_node* const)&tcp_scalar, + (struct mib_node* const)&tcp_scalar, (struct mib_node* const)&tcp_scalar, + (struct mib_node* const)&tcp_scalar, (struct mib_node* const)&tcp_scalar, + (struct mib_node* const)&tcpconntable, (struct mib_node* const)&tcp_scalar, + (struct mib_node* const)&tcp_scalar +}; +const struct mib_array_node tcp = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 15, + tcp_ids, + tcp_nodes +}; +#endif + +/* icmp .1.3.6.1.2.1.5 */ +const mib_scalar_node icmp_scalar = { + &icmp_get_object_def, + &icmp_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_SC, + 0 +}; +const s32_t icmp_ids[26] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26 }; +struct mib_node* const icmp_nodes[26] = { + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar, + (struct mib_node* const)&icmp_scalar, (struct mib_node* const)&icmp_scalar +}; +const struct mib_array_node icmp = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 26, + icmp_ids, + icmp_nodes +}; + +/** index root node for ipNetToMediaTable */ +struct mib_list_rootnode ipntomtree_root = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_LR, + 0, + NULL, + NULL, + 0 +}; +const s32_t ipntomentry_ids[4] = { 1, 2, 3, 4 }; +struct mib_node* const ipntomentry_nodes[4] = { + (struct mib_node* const)&ipntomtree_root, (struct mib_node* const)&ipntomtree_root, + (struct mib_node* const)&ipntomtree_root, (struct mib_node* const)&ipntomtree_root +}; +const struct mib_array_node ipntomentry = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 4, + ipntomentry_ids, + ipntomentry_nodes +}; + +s32_t ipntomtable_id = 1; +struct mib_node* ipntomtable_node = (struct mib_node* const)&ipntomentry; +struct mib_ram_array_node ipntomtable = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_RA, + 0, + &ipntomtable_id, + &ipntomtable_node +}; + +/** index root node for ipRouteTable */ +struct mib_list_rootnode iprtetree_root = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_LR, + 0, + NULL, + NULL, + 0 +}; +const s32_t iprteentry_ids[13] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13 }; +struct mib_node* const iprteentry_nodes[13] = { + (struct mib_node* const)&iprtetree_root, (struct mib_node* const)&iprtetree_root, + (struct mib_node* const)&iprtetree_root, (struct mib_node* const)&iprtetree_root, + (struct mib_node* const)&iprtetree_root, (struct mib_node* const)&iprtetree_root, + (struct mib_node* const)&iprtetree_root, (struct mib_node* const)&iprtetree_root, + (struct mib_node* const)&iprtetree_root, (struct mib_node* const)&iprtetree_root, + (struct mib_node* const)&iprtetree_root, (struct mib_node* const)&iprtetree_root, + (struct mib_node* const)&iprtetree_root +}; +const struct mib_array_node iprteentry = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 13, + iprteentry_ids, + iprteentry_nodes +}; + +s32_t iprtetable_id = 1; +struct mib_node* iprtetable_node = (struct mib_node* const)&iprteentry; +struct mib_ram_array_node iprtetable = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_RA, + 0, + &iprtetable_id, + &iprtetable_node +}; + +/** index root node for ipAddrTable */ +struct mib_list_rootnode ipaddrtree_root = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_LR, + 0, + NULL, + NULL, + 0 +}; +const s32_t ipaddrentry_ids[5] = { 1, 2, 3, 4, 5 }; +struct mib_node* const ipaddrentry_nodes[5] = { + (struct mib_node* const)&ipaddrtree_root, + (struct mib_node* const)&ipaddrtree_root, + (struct mib_node* const)&ipaddrtree_root, + (struct mib_node* const)&ipaddrtree_root, + (struct mib_node* const)&ipaddrtree_root +}; +const struct mib_array_node ipaddrentry = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 5, + ipaddrentry_ids, + ipaddrentry_nodes +}; + +s32_t ipaddrtable_id = 1; +struct mib_node* ipaddrtable_node = (struct mib_node* const)&ipaddrentry; +struct mib_ram_array_node ipaddrtable = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_RA, + 0, + &ipaddrtable_id, + &ipaddrtable_node +}; + +/* ip .1.3.6.1.2.1.4 */ +const mib_scalar_node ip_scalar = { + &ip_get_object_def, + &ip_get_value, + &ip_set_test, + &noleafs_set_value, + MIB_NODE_SC, + 0 +}; +const s32_t ip_ids[23] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23 }; +struct mib_node* const ip_nodes[23] = { + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ip_scalar, + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ip_scalar, + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ip_scalar, + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ip_scalar, + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ip_scalar, + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ip_scalar, + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ip_scalar, + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ip_scalar, + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ip_scalar, + (struct mib_node* const)&ip_scalar, (struct mib_node* const)&ipaddrtable, + (struct mib_node* const)&iprtetable, (struct mib_node* const)&ipntomtable, + (struct mib_node* const)&ip_scalar +}; +const struct mib_array_node mib2_ip = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 23, + ip_ids, + ip_nodes +}; + +/** index root node for atTable */ +struct mib_list_rootnode arptree_root = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_LR, + 0, + NULL, + NULL, + 0 +}; +const s32_t atentry_ids[3] = { 1, 2, 3 }; +struct mib_node* const atentry_nodes[3] = { + (struct mib_node* const)&arptree_root, + (struct mib_node* const)&arptree_root, + (struct mib_node* const)&arptree_root +}; +const struct mib_array_node atentry = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 3, + atentry_ids, + atentry_nodes +}; + +const s32_t attable_id = 1; +struct mib_node* const attable_node = (struct mib_node* const)&atentry; +const struct mib_array_node attable = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 1, + &attable_id, + &attable_node +}; + +/* at .1.3.6.1.2.1.3 */ +s32_t at_id = 1; +struct mib_node* mib2_at_node = (struct mib_node* const)&attable; +struct mib_ram_array_node at = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_RA, + 0, + &at_id, + &mib2_at_node +}; + +/** index root node for ifTable */ +struct mib_list_rootnode iflist_root = { + &ifentry_get_object_def, + &ifentry_get_value, +#if SNMP_SAFE_REQUESTS + &noleafs_set_test, + &noleafs_set_value, +#else /* SNMP_SAFE_REQUESTS */ + &ifentry_set_test, + &ifentry_set_value, +#endif /* SNMP_SAFE_REQUESTS */ + MIB_NODE_LR, + 0, + NULL, + NULL, + 0 +}; +const s32_t ifentry_ids[22] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22 }; +struct mib_node* const ifentry_nodes[22] = { + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root, + (struct mib_node* const)&iflist_root, (struct mib_node* const)&iflist_root +}; +const struct mib_array_node ifentry = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 22, + ifentry_ids, + ifentry_nodes +}; + +s32_t iftable_id = 1; +struct mib_node* iftable_node = (struct mib_node* const)&ifentry; +struct mib_ram_array_node iftable = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_RA, + 0, + &iftable_id, + &iftable_node +}; + +/* interfaces .1.3.6.1.2.1.2 */ +const mib_scalar_node interfaces_scalar = { + &interfaces_get_object_def, + &interfaces_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_SC, + 0 +}; +const s32_t interfaces_ids[2] = { 1, 2 }; +struct mib_node* const interfaces_nodes[2] = { + (struct mib_node* const)&interfaces_scalar, (struct mib_node* const)&iftable +}; +const struct mib_array_node interfaces = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 2, + interfaces_ids, + interfaces_nodes +}; + + +/* 0 1 2 3 4 5 6 */ +/* system .1.3.6.1.2.1.1 */ +const mib_scalar_node sys_tem_scalar = { + &system_get_object_def, + &system_get_value, + &system_set_test, + &system_set_value, + MIB_NODE_SC, + 0 +}; +const s32_t sys_tem_ids[7] = { 1, 2, 3, 4, 5, 6, 7 }; +struct mib_node* const sys_tem_nodes[7] = { + (struct mib_node* const)&sys_tem_scalar, (struct mib_node* const)&sys_tem_scalar, + (struct mib_node* const)&sys_tem_scalar, (struct mib_node* const)&sys_tem_scalar, + (struct mib_node* const)&sys_tem_scalar, (struct mib_node* const)&sys_tem_scalar, + (struct mib_node* const)&sys_tem_scalar +}; +/* work around name issue with 'sys_tem', some compiler(s?) seem to reserve 'system' */ +const struct mib_array_node sys_tem = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 7, + sys_tem_ids, + sys_tem_nodes +}; + +/* mib-2 .1.3.6.1.2.1 */ +#if LWIP_TCP +#define MIB2_GROUPS 8 +#else +#define MIB2_GROUPS 7 +#endif +const s32_t mib2_ids[MIB2_GROUPS] = +{ + 1, + 2, + 3, + 4, + 5, +#if LWIP_TCP + 6, +#endif + 7, + 11 +}; +struct mib_node* const mib2_nodes[MIB2_GROUPS] = { + (struct mib_node* const)&sys_tem, + (struct mib_node* const)&interfaces, + (struct mib_node* const)&at, + (struct mib_node* const)&mib2_ip, + (struct mib_node* const)&icmp, +#if LWIP_TCP + (struct mib_node* const)&tcp, +#endif + (struct mib_node* const)&udp, + (struct mib_node* const)&snmp +}; + +const struct mib_array_node mib2 = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + MIB2_GROUPS, + mib2_ids, + mib2_nodes +}; + +/* mgmt .1.3.6.1.2 */ +const s32_t mgmt_ids[1] = { 1 }; +struct mib_node* const mgmt_nodes[1] = { (struct mib_node* const)&mib2 }; +const struct mib_array_node mgmt = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 1, + mgmt_ids, + mgmt_nodes +}; + +/* internet .1.3.6.1 */ +#if SNMP_PRIVATE_MIB +s32_t internet_ids[2] = { 2, 4 }; +struct mib_node* const internet_nodes[2] = { (struct mib_node* const)&mgmt, (struct mib_node* const)&private }; +const struct mib_array_node internet = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 2, + internet_ids, + internet_nodes +}; +#else +const s32_t internet_ids[1] = { 2 }; +struct mib_node* const internet_nodes[1] = { (struct mib_node* const)&mgmt }; +const struct mib_array_node internet = { + &noleafs_get_object_def, + &noleafs_get_value, + &noleafs_set_test, + &noleafs_set_value, + MIB_NODE_AR, + 1, + internet_ids, + internet_nodes +}; +#endif + +/** mib-2.system.sysObjectID */ +static struct snmp_obj_id sysobjid = {SNMP_SYSOBJID_LEN, SNMP_SYSOBJID}; +/** enterprise ID for generic TRAPs, .iso.org.dod.internet.mgmt.mib-2.snmp */ +static struct snmp_obj_id snmpgrp_id = {7,{1,3,6,1,2,1,11}}; +/** mib-2.system.sysServices */ +static const s32_t sysservices = SNMP_SYSSERVICES; + +/** mib-2.system.sysDescr */ +static const u8_t sysdescr_len_default = 4; +static const u8_t sysdescr_default[] = "lwIP"; +static u8_t* sysdescr_len_ptr = (u8_t*)&sysdescr_len_default; +static u8_t* sysdescr_ptr = (u8_t*)&sysdescr_default[0]; +/** mib-2.system.sysContact */ +static const u8_t syscontact_len_default = 0; +static const u8_t syscontact_default[] = ""; +static u8_t* syscontact_len_ptr = (u8_t*)&syscontact_len_default; +static u8_t* syscontact_ptr = (u8_t*)&syscontact_default[0]; +/** mib-2.system.sysName */ +static const u8_t sysname_len_default = 8; +static const u8_t sysname_default[] = "FQDN-unk"; +static u8_t* sysname_len_ptr = (u8_t*)&sysname_len_default; +static u8_t* sysname_ptr = (u8_t*)&sysname_default[0]; +/** mib-2.system.sysLocation */ +static const u8_t syslocation_len_default = 0; +static const u8_t syslocation_default[] = ""; +static u8_t* syslocation_len_ptr = (u8_t*)&syslocation_len_default; +static u8_t* syslocation_ptr = (u8_t*)&syslocation_default[0]; +/** mib-2.snmp.snmpEnableAuthenTraps */ +static const u8_t snmpenableauthentraps_default = 2; /* disabled */ +static u8_t* snmpenableauthentraps_ptr = (u8_t*)&snmpenableauthentraps_default; + +/** mib-2.interfaces.ifTable.ifEntry.ifSpecific (zeroDotZero) */ +static const struct snmp_obj_id ifspecific = {2, {0, 0}}; +/** mib-2.ip.ipRouteTable.ipRouteEntry.ipRouteInfo (zeroDotZero) */ +static const struct snmp_obj_id iprouteinfo = {2, {0, 0}}; + + + +/* mib-2.system counter(s) */ +static u32_t sysuptime = 0; + +/* mib-2.ip counter(s) */ +static u32_t ipinreceives = 0, + ipinhdrerrors = 0, + ipinaddrerrors = 0, + ipforwdatagrams = 0, + ipinunknownprotos = 0, + ipindiscards = 0, + ipindelivers = 0, + ipoutrequests = 0, + ipoutdiscards = 0, + ipoutnoroutes = 0, + ipreasmreqds = 0, + ipreasmoks = 0, + ipreasmfails = 0, + ipfragoks = 0, + ipfragfails = 0, + ipfragcreates = 0, + iproutingdiscards = 0; +/* mib-2.icmp counter(s) */ +static u32_t icmpinmsgs = 0, + icmpinerrors = 0, + icmpindestunreachs = 0, + icmpintimeexcds = 0, + icmpinparmprobs = 0, + icmpinsrcquenchs = 0, + icmpinredirects = 0, + icmpinechos = 0, + icmpinechoreps = 0, + icmpintimestamps = 0, + icmpintimestampreps = 0, + icmpinaddrmasks = 0, + icmpinaddrmaskreps = 0, + icmpoutmsgs = 0, + icmpouterrors = 0, + icmpoutdestunreachs = 0, + icmpouttimeexcds = 0, + icmpoutparmprobs = 0, + icmpoutsrcquenchs = 0, + icmpoutredirects = 0, + icmpoutechos = 0, + icmpoutechoreps = 0, + icmpouttimestamps = 0, + icmpouttimestampreps = 0, + icmpoutaddrmasks = 0, + icmpoutaddrmaskreps = 0; +/* mib-2.tcp counter(s) */ +static u32_t tcpactiveopens = 0, + tcppassiveopens = 0, + tcpattemptfails = 0, + tcpestabresets = 0, + tcpinsegs = 0, + tcpoutsegs = 0, + tcpretranssegs = 0, + tcpinerrs = 0, + tcpoutrsts = 0; +/* mib-2.udp counter(s) */ +static u32_t udpindatagrams = 0, + udpnoports = 0, + udpinerrors = 0, + udpoutdatagrams = 0; +/* mib-2.snmp counter(s) */ +static u32_t snmpinpkts = 0, + snmpoutpkts = 0, + snmpinbadversions = 0, + snmpinbadcommunitynames = 0, + snmpinbadcommunityuses = 0, + snmpinasnparseerrs = 0, + snmpintoobigs = 0, + snmpinnosuchnames = 0, + snmpinbadvalues = 0, + snmpinreadonlys = 0, + snmpingenerrs = 0, + snmpintotalreqvars = 0, + snmpintotalsetvars = 0, + snmpingetrequests = 0, + snmpingetnexts = 0, + snmpinsetrequests = 0, + snmpingetresponses = 0, + snmpintraps = 0, + snmpouttoobigs = 0, + snmpoutnosuchnames = 0, + snmpoutbadvalues = 0, + snmpoutgenerrs = 0, + snmpoutgetrequests = 0, + snmpoutgetnexts = 0, + snmpoutsetrequests = 0, + snmpoutgetresponses = 0, + snmpouttraps = 0; + + + +/* prototypes of the following functions are in lwip/src/include/lwip/snmp.h */ +/** + * Copy octet string. + * + * @param dst points to destination + * @param src points to source + * @param n number of octets to copy. + */ +void ocstrncpy(u8_t *dst, u8_t *src, u8_t n) +{ + while (n > 0) + { + n--; + *dst++ = *src++; + } +} + +/** + * Copy object identifier (s32_t) array. + * + * @param dst points to destination + * @param src points to source + * @param n number of sub identifiers to copy. + */ +void objectidncpy(s32_t *dst, s32_t *src, u8_t n) +{ + while(n > 0) + { + n--; + *dst++ = *src++; + } +} + +/** + * Initializes sysDescr pointers. + * + * @param str if non-NULL then copy str pointer + * @param len points to string length, excluding zero terminator + */ +void snmp_set_sysdesr(u8_t *str, u8_t *len) +{ + if (str != NULL) + { + sysdescr_ptr = str; + sysdescr_len_ptr = len; + } +} + +void snmp_get_sysobjid_ptr(struct snmp_obj_id **oid) +{ + *oid = &sysobjid; +} + +/** + * Initializes sysObjectID value. + * + * @param oid points to stuct snmp_obj_id to copy + */ +void snmp_set_sysobjid(struct snmp_obj_id *oid) +{ + sysobjid = *oid; +} + +/** + * Must be called at regular 10 msec interval from a timer interrupt + * or signal handler depending on your runtime environment. + */ +void snmp_inc_sysuptime(void) +{ + sysuptime++; +} + +void snmp_add_sysuptime(u32_t value) +{ + sysuptime+=value; +} + +void snmp_get_sysuptime(u32_t *value) +{ + SNMP_GET_SYSUPTIME(sysuptime); + *value = sysuptime; +} + +/** + * Initializes sysContact pointers, + * e.g. ptrs to non-volatile memory external to lwIP. + * + * @param ocstr if non-NULL then copy str pointer + * @param ocstrlen points to string length, excluding zero terminator + */ +void snmp_set_syscontact(u8_t *ocstr, u8_t *ocstrlen) +{ + if (ocstr != NULL) + { + syscontact_ptr = ocstr; + syscontact_len_ptr = ocstrlen; + } +} + +/** + * Initializes sysName pointers, + * e.g. ptrs to non-volatile memory external to lwIP. + * + * @param ocstr if non-NULL then copy str pointer + * @param ocstrlen points to string length, excluding zero terminator + */ +void snmp_set_sysname(u8_t *ocstr, u8_t *ocstrlen) +{ + if (ocstr != NULL) + { + sysname_ptr = ocstr; + sysname_len_ptr = ocstrlen; + } +} + +/** + * Initializes sysLocation pointers, + * e.g. ptrs to non-volatile memory external to lwIP. + * + * @param ocstr if non-NULL then copy str pointer + * @param ocstrlen points to string length, excluding zero terminator + */ +void snmp_set_syslocation(u8_t *ocstr, u8_t *ocstrlen) +{ + if (ocstr != NULL) + { + syslocation_ptr = ocstr; + syslocation_len_ptr = ocstrlen; + } +} + + +void snmp_add_ifinoctets(struct netif *ni, u32_t value) +{ + ni->ifinoctets += value; +} + +void snmp_inc_ifinucastpkts(struct netif *ni) +{ + (ni->ifinucastpkts)++; +} + +void snmp_inc_ifinnucastpkts(struct netif *ni) +{ + (ni->ifinnucastpkts)++; +} + +void snmp_inc_ifindiscards(struct netif *ni) +{ + (ni->ifindiscards)++; +} + +void snmp_add_ifoutoctets(struct netif *ni, u32_t value) +{ + ni->ifoutoctets += value; +} + +void snmp_inc_ifoutucastpkts(struct netif *ni) +{ + (ni->ifoutucastpkts)++; +} + +void snmp_inc_ifoutnucastpkts(struct netif *ni) +{ + (ni->ifoutnucastpkts)++; +} + +void snmp_inc_ifoutdiscards(struct netif *ni) +{ + (ni->ifoutdiscards)++; +} + +void snmp_inc_iflist(void) +{ + struct mib_list_node *if_node = NULL; + + snmp_mib_node_insert(&iflist_root, iflist_root.count + 1, &if_node); + /* enable getnext traversal on filled table */ + iftable.maxlength = 1; +} + +void snmp_dec_iflist(void) +{ + snmp_mib_node_delete(&iflist_root, iflist_root.tail); + /* disable getnext traversal on empty table */ + if(iflist_root.count == 0) iftable.maxlength = 0; +} + +/** + * Inserts ARP table indexes (.xIfIndex.xNetAddress) + * into arp table index trees (both atTable and ipNetToMediaTable). + */ +void snmp_insert_arpidx_tree(struct netif *ni, struct ip_addr *ip) +{ + struct mib_list_rootnode *at_rn; + struct mib_list_node *at_node; + struct ip_addr hip; + s32_t arpidx[5]; + u8_t level, tree; + + LWIP_ASSERT("ni != NULL", ni != NULL); + snmp_netiftoifindex(ni, &arpidx[0]); + hip.addr = ntohl(ip->addr); + snmp_iptooid(&hip, &arpidx[1]); + + for (tree = 0; tree < 2; tree++) + { + if (tree == 0) + { + at_rn = &arptree_root; + } + else + { + at_rn = &ipntomtree_root; + } + for (level = 0; level < 5; level++) + { + at_node = NULL; + snmp_mib_node_insert(at_rn, arpidx[level], &at_node); + if ((level != 4) && (at_node != NULL)) + { + if (at_node->nptr == NULL) + { + at_rn = snmp_mib_lrn_alloc(); + at_node->nptr = (struct mib_node*)at_rn; + if (at_rn != NULL) + { + if (level == 3) + { + if (tree == 0) + { + at_rn->get_object_def = atentry_get_object_def; + at_rn->get_value = atentry_get_value; + } + else + { + at_rn->get_object_def = ip_ntomentry_get_object_def; + at_rn->get_value = ip_ntomentry_get_value; + } + at_rn->set_test = noleafs_set_test; + at_rn->set_value = noleafs_set_value; + } + } + else + { + /* at_rn == NULL, malloc failure */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("snmp_insert_arpidx_tree() insert failed, mem full")); + break; + } + } + else + { + at_rn = (struct mib_list_rootnode*)at_node->nptr; + } + } + } + } + /* enable getnext traversal on filled tables */ + at.maxlength = 1; + ipntomtable.maxlength = 1; +} + +/** + * Removes ARP table indexes (.xIfIndex.xNetAddress) + * from arp table index trees. + */ +void snmp_delete_arpidx_tree(struct netif *ni, struct ip_addr *ip) +{ + struct mib_list_rootnode *at_rn, *next, *del_rn[5]; + struct mib_list_node *at_n, *del_n[5]; + struct ip_addr hip; + s32_t arpidx[5]; + u8_t fc, tree, level, del_cnt; + + snmp_netiftoifindex(ni, &arpidx[0]); + hip.addr = ntohl(ip->addr); + snmp_iptooid(&hip, &arpidx[1]); + + for (tree = 0; tree < 2; tree++) + { + /* mark nodes for deletion */ + if (tree == 0) + { + at_rn = &arptree_root; + } + else + { + at_rn = &ipntomtree_root; + } + level = 0; + del_cnt = 0; + while ((level < 5) && (at_rn != NULL)) + { + fc = snmp_mib_node_find(at_rn, arpidx[level], &at_n); + if (fc == 0) + { + /* arpidx[level] does not exist */ + del_cnt = 0; + at_rn = NULL; + } + else if (fc == 1) + { + del_rn[del_cnt] = at_rn; + del_n[del_cnt] = at_n; + del_cnt++; + at_rn = (struct mib_list_rootnode*)(at_n->nptr); + } + else if (fc == 2) + { + /* reset delete (2 or more childs) */ + del_cnt = 0; + at_rn = (struct mib_list_rootnode*)(at_n->nptr); + } + level++; + } + /* delete marked index nodes */ + while (del_cnt > 0) + { + del_cnt--; + + at_rn = del_rn[del_cnt]; + at_n = del_n[del_cnt]; + + next = snmp_mib_node_delete(at_rn, at_n); + if (next != NULL) + { + LWIP_ASSERT("next_count == 0",next->count == 0); + snmp_mib_lrn_free(next); + } + } + } + /* disable getnext traversal on empty tables */ + if(arptree_root.count == 0) at.maxlength = 0; + if(ipntomtree_root.count == 0) ipntomtable.maxlength = 0; +} + +void snmp_inc_ipinreceives(void) +{ + ipinreceives++; +} + +void snmp_inc_ipinhdrerrors(void) +{ + ipinhdrerrors++; +} + +void snmp_inc_ipinaddrerrors(void) +{ + ipinaddrerrors++; +} + +void snmp_inc_ipforwdatagrams(void) +{ + ipforwdatagrams++; +} + +void snmp_inc_ipinunknownprotos(void) +{ + ipinunknownprotos++; +} + +void snmp_inc_ipindiscards(void) +{ + ipindiscards++; +} + +void snmp_inc_ipindelivers(void) +{ + ipindelivers++; +} + +void snmp_inc_ipoutrequests(void) +{ + ipoutrequests++; +} + +void snmp_inc_ipoutdiscards(void) +{ + ipoutdiscards++; +} + +void snmp_inc_ipoutnoroutes(void) +{ + ipoutnoroutes++; +} + +void snmp_inc_ipreasmreqds(void) +{ + ipreasmreqds++; +} + +void snmp_inc_ipreasmoks(void) +{ + ipreasmoks++; +} + +void snmp_inc_ipreasmfails(void) +{ + ipreasmfails++; +} + +void snmp_inc_ipfragoks(void) +{ + ipfragoks++; +} + +void snmp_inc_ipfragfails(void) +{ + ipfragfails++; +} + +void snmp_inc_ipfragcreates(void) +{ + ipfragcreates++; +} + +void snmp_inc_iproutingdiscards(void) +{ + iproutingdiscards++; +} + +/** + * Inserts ipAddrTable indexes (.ipAdEntAddr) + * into index tree. + */ +void snmp_insert_ipaddridx_tree(struct netif *ni) +{ + struct mib_list_rootnode *ipa_rn; + struct mib_list_node *ipa_node; + struct ip_addr ip; + s32_t ipaddridx[4]; + u8_t level; + + LWIP_ASSERT("ni != NULL", ni != NULL); + ip.addr = ntohl(ni->ip_addr.addr); + snmp_iptooid(&ip, &ipaddridx[0]); + + level = 0; + ipa_rn = &ipaddrtree_root; + while (level < 4) + { + ipa_node = NULL; + snmp_mib_node_insert(ipa_rn, ipaddridx[level], &ipa_node); + if ((level != 3) && (ipa_node != NULL)) + { + if (ipa_node->nptr == NULL) + { + ipa_rn = snmp_mib_lrn_alloc(); + ipa_node->nptr = (struct mib_node*)ipa_rn; + if (ipa_rn != NULL) + { + if (level == 2) + { + ipa_rn->get_object_def = ip_addrentry_get_object_def; + ipa_rn->get_value = ip_addrentry_get_value; + ipa_rn->set_test = noleafs_set_test; + ipa_rn->set_value = noleafs_set_value; + } + } + else + { + /* ipa_rn == NULL, malloc failure */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("snmp_insert_ipaddridx_tree() insert failed, mem full")); + break; + } + } + else + { + ipa_rn = (struct mib_list_rootnode*)ipa_node->nptr; + } + } + level++; + } + /* enable getnext traversal on filled table */ + ipaddrtable.maxlength = 1; +} + +/** + * Removes ipAddrTable indexes (.ipAdEntAddr) + * from index tree. + */ +void snmp_delete_ipaddridx_tree(struct netif *ni) +{ + struct mib_list_rootnode *ipa_rn, *next, *del_rn[4]; + struct mib_list_node *ipa_n, *del_n[4]; + struct ip_addr ip; + s32_t ipaddridx[4]; + u8_t fc, level, del_cnt; + + LWIP_ASSERT("ni != NULL", ni != NULL); + ip.addr = ntohl(ni->ip_addr.addr); + snmp_iptooid(&ip, &ipaddridx[0]); + + /* mark nodes for deletion */ + level = 0; + del_cnt = 0; + ipa_rn = &ipaddrtree_root; + while ((level < 4) && (ipa_rn != NULL)) + { + fc = snmp_mib_node_find(ipa_rn, ipaddridx[level], &ipa_n); + if (fc == 0) + { + /* ipaddridx[level] does not exist */ + del_cnt = 0; + ipa_rn = NULL; + } + else if (fc == 1) + { + del_rn[del_cnt] = ipa_rn; + del_n[del_cnt] = ipa_n; + del_cnt++; + ipa_rn = (struct mib_list_rootnode*)(ipa_n->nptr); + } + else if (fc == 2) + { + /* reset delete (2 or more childs) */ + del_cnt = 0; + ipa_rn = (struct mib_list_rootnode*)(ipa_n->nptr); + } + level++; + } + /* delete marked index nodes */ + while (del_cnt > 0) + { + del_cnt--; + + ipa_rn = del_rn[del_cnt]; + ipa_n = del_n[del_cnt]; + + next = snmp_mib_node_delete(ipa_rn, ipa_n); + if (next != NULL) + { + LWIP_ASSERT("next_count == 0",next->count == 0); + snmp_mib_lrn_free(next); + } + } + /* disable getnext traversal on empty table */ + if (ipaddrtree_root.count == 0) ipaddrtable.maxlength = 0; +} + +/** + * Inserts ipRouteTable indexes (.ipRouteDest) + * into index tree. + * + * @param dflt non-zero for the default rte, zero for network rte + * @param ni points to network interface for this rte + * + * @todo record sysuptime for _this_ route when it is installed + * (needed for ipRouteAge) in the netif. + */ +void snmp_insert_iprteidx_tree(u8_t dflt, struct netif *ni) +{ + u8_t insert = 0; + struct ip_addr dst; + + if (dflt != 0) + { + /* the default route 0.0.0.0 */ + dst.addr = 0; + insert = 1; + } + else + { + /* route to the network address */ + dst.addr = ntohl(ni->ip_addr.addr & ni->netmask.addr); + /* exclude 0.0.0.0 network (reserved for default rte) */ + if (dst.addr != 0) insert = 1; + } + if (insert) + { + struct mib_list_rootnode *iprte_rn; + struct mib_list_node *iprte_node; + s32_t iprteidx[4]; + u8_t level; + + snmp_iptooid(&dst, &iprteidx[0]); + level = 0; + iprte_rn = &iprtetree_root; + while (level < 4) + { + iprte_node = NULL; + snmp_mib_node_insert(iprte_rn, iprteidx[level], &iprte_node); + if ((level != 3) && (iprte_node != NULL)) + { + if (iprte_node->nptr == NULL) + { + iprte_rn = snmp_mib_lrn_alloc(); + iprte_node->nptr = (struct mib_node*)iprte_rn; + if (iprte_rn != NULL) + { + if (level == 2) + { + iprte_rn->get_object_def = ip_rteentry_get_object_def; + iprte_rn->get_value = ip_rteentry_get_value; + iprte_rn->set_test = noleafs_set_test; + iprte_rn->set_value = noleafs_set_value; + } + } + else + { + /* iprte_rn == NULL, malloc failure */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("snmp_insert_iprteidx_tree() insert failed, mem full")); + break; + } + } + else + { + iprte_rn = (struct mib_list_rootnode*)iprte_node->nptr; + } + } + level++; + } + } + /* enable getnext traversal on filled table */ + iprtetable.maxlength = 1; +} + +/** + * Removes ipRouteTable indexes (.ipRouteDest) + * from index tree. + * + * @param dflt non-zero for the default rte, zero for network rte + * @param ni points to network interface for this rte or NULL + * for default route to be removed. + */ +void snmp_delete_iprteidx_tree(u8_t dflt, struct netif *ni) +{ + u8_t delete = 0; + struct ip_addr dst; + + if (dflt != 0) + { + /* the default route 0.0.0.0 */ + dst.addr = 0; + delete = 1; + } + else + { + /* route to the network address */ + dst.addr = ntohl(ni->ip_addr.addr & ni->netmask.addr); + /* exclude 0.0.0.0 network (reserved for default rte) */ + if (dst.addr != 0) delete = 1; + } + if (delete) + { + struct mib_list_rootnode *iprte_rn, *next, *del_rn[4]; + struct mib_list_node *iprte_n, *del_n[4]; + s32_t iprteidx[4]; + u8_t fc, level, del_cnt; + + snmp_iptooid(&dst, &iprteidx[0]); + /* mark nodes for deletion */ + level = 0; + del_cnt = 0; + iprte_rn = &iprtetree_root; + while ((level < 4) && (iprte_rn != NULL)) + { + fc = snmp_mib_node_find(iprte_rn, iprteidx[level], &iprte_n); + if (fc == 0) + { + /* iprteidx[level] does not exist */ + del_cnt = 0; + iprte_rn = NULL; + } + else if (fc == 1) + { + del_rn[del_cnt] = iprte_rn; + del_n[del_cnt] = iprte_n; + del_cnt++; + iprte_rn = (struct mib_list_rootnode*)(iprte_n->nptr); + } + else if (fc == 2) + { + /* reset delete (2 or more childs) */ + del_cnt = 0; + iprte_rn = (struct mib_list_rootnode*)(iprte_n->nptr); + } + level++; + } + /* delete marked index nodes */ + while (del_cnt > 0) + { + del_cnt--; + + iprte_rn = del_rn[del_cnt]; + iprte_n = del_n[del_cnt]; + + next = snmp_mib_node_delete(iprte_rn, iprte_n); + if (next != NULL) + { + LWIP_ASSERT("next_count == 0",next->count == 0); + snmp_mib_lrn_free(next); + } + } + } + /* disable getnext traversal on empty table */ + if (iprtetree_root.count == 0) iprtetable.maxlength = 0; +} + + +void snmp_inc_icmpinmsgs(void) +{ + icmpinmsgs++; +} + +void snmp_inc_icmpinerrors(void) +{ + icmpinerrors++; +} + +void snmp_inc_icmpindestunreachs(void) +{ + icmpindestunreachs++; +} + +void snmp_inc_icmpintimeexcds(void) +{ + icmpintimeexcds++; +} + +void snmp_inc_icmpinparmprobs(void) +{ + icmpinparmprobs++; +} + +void snmp_inc_icmpinsrcquenchs(void) +{ + icmpinsrcquenchs++; +} + +void snmp_inc_icmpinredirects(void) +{ + icmpinredirects++; +} + +void snmp_inc_icmpinechos(void) +{ + icmpinechos++; +} + +void snmp_inc_icmpinechoreps(void) +{ + icmpinechoreps++; +} + +void snmp_inc_icmpintimestamps(void) +{ + icmpintimestamps++; +} + +void snmp_inc_icmpintimestampreps(void) +{ + icmpintimestampreps++; +} + +void snmp_inc_icmpinaddrmasks(void) +{ + icmpinaddrmasks++; +} + +void snmp_inc_icmpinaddrmaskreps(void) +{ + icmpinaddrmaskreps++; +} + +void snmp_inc_icmpoutmsgs(void) +{ + icmpoutmsgs++; +} + +void snmp_inc_icmpouterrors(void) +{ + icmpouterrors++; +} + +void snmp_inc_icmpoutdestunreachs(void) +{ + icmpoutdestunreachs++; +} + +void snmp_inc_icmpouttimeexcds(void) +{ + icmpouttimeexcds++; +} + +void snmp_inc_icmpoutparmprobs(void) +{ + icmpoutparmprobs++; +} + +void snmp_inc_icmpoutsrcquenchs(void) +{ + icmpoutsrcquenchs++; +} + +void snmp_inc_icmpoutredirects(void) +{ + icmpoutredirects++; +} + +void snmp_inc_icmpoutechos(void) +{ + icmpoutechos++; +} + +void snmp_inc_icmpoutechoreps(void) +{ + icmpoutechoreps++; +} + +void snmp_inc_icmpouttimestamps(void) +{ + icmpouttimestamps++; +} + +void snmp_inc_icmpouttimestampreps(void) +{ + icmpouttimestampreps++; +} + +void snmp_inc_icmpoutaddrmasks(void) +{ + icmpoutaddrmasks++; +} + +void snmp_inc_icmpoutaddrmaskreps(void) +{ + icmpoutaddrmaskreps++; +} + +void snmp_inc_tcpactiveopens(void) +{ + tcpactiveopens++; +} + +void snmp_inc_tcppassiveopens(void) +{ + tcppassiveopens++; +} + +void snmp_inc_tcpattemptfails(void) +{ + tcpattemptfails++; +} + +void snmp_inc_tcpestabresets(void) +{ + tcpestabresets++; +} + +void snmp_inc_tcpinsegs(void) +{ + tcpinsegs++; +} + +void snmp_inc_tcpoutsegs(void) +{ + tcpoutsegs++; +} + +void snmp_inc_tcpretranssegs(void) +{ + tcpretranssegs++; +} + +void snmp_inc_tcpinerrs(void) +{ + tcpinerrs++; +} + +void snmp_inc_tcpoutrsts(void) +{ + tcpoutrsts++; +} + +void snmp_inc_udpindatagrams(void) +{ + udpindatagrams++; +} + +void snmp_inc_udpnoports(void) +{ + udpnoports++; +} + +void snmp_inc_udpinerrors(void) +{ + udpinerrors++; +} + +void snmp_inc_udpoutdatagrams(void) +{ + udpoutdatagrams++; +} + +/** + * Inserts udpTable indexes (.udpLocalAddress.udpLocalPort) + * into index tree. + */ +void snmp_insert_udpidx_tree(struct udp_pcb *pcb) +{ + struct mib_list_rootnode *udp_rn; + struct mib_list_node *udp_node; + struct ip_addr ip; + s32_t udpidx[5]; + u8_t level; + + LWIP_ASSERT("pcb != NULL", pcb != NULL); + ip.addr = ntohl(pcb->local_ip.addr); + snmp_iptooid(&ip, &udpidx[0]); + udpidx[4] = pcb->local_port; + + udp_rn = &udp_root; + for (level = 0; level < 5; level++) + { + udp_node = NULL; + snmp_mib_node_insert(udp_rn, udpidx[level], &udp_node); + if ((level != 4) && (udp_node != NULL)) + { + if (udp_node->nptr == NULL) + { + udp_rn = snmp_mib_lrn_alloc(); + udp_node->nptr = (struct mib_node*)udp_rn; + if (udp_rn != NULL) + { + if (level == 3) + { + udp_rn->get_object_def = udpentry_get_object_def; + udp_rn->get_value = udpentry_get_value; + udp_rn->set_test = noleafs_set_test; + udp_rn->set_value = noleafs_set_value; + } + } + else + { + /* udp_rn == NULL, malloc failure */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("snmp_insert_udpidx_tree() insert failed, mem full")); + break; + } + } + else + { + udp_rn = (struct mib_list_rootnode*)udp_node->nptr; + } + } + } + udptable.maxlength = 1; +} + +/** + * Removes udpTable indexes (.udpLocalAddress.udpLocalPort) + * from index tree. + */ +void snmp_delete_udpidx_tree(struct udp_pcb *pcb) +{ + struct mib_list_rootnode *udp_rn, *next, *del_rn[5]; + struct mib_list_node *udp_n, *del_n[5]; + struct ip_addr ip; + s32_t udpidx[5]; + u8_t bindings, fc, level, del_cnt; + + LWIP_ASSERT("pcb != NULL", pcb != NULL); + ip.addr = ntohl(pcb->local_ip.addr); + snmp_iptooid(&ip, &udpidx[0]); + udpidx[4] = pcb->local_port; + + /* count PCBs for a given binding + (e.g. when reusing ports or for temp output PCBs) */ + bindings = 0; + pcb = udp_pcbs; + while ((pcb != NULL)) + { + if ((pcb->local_ip.addr == ip.addr) && + (pcb->local_port == udpidx[4])) + { + bindings++; + } + pcb = pcb->next; + } + if (bindings == 1) + { + /* selectively remove */ + /* mark nodes for deletion */ + level = 0; + del_cnt = 0; + udp_rn = &udp_root; + while ((level < 5) && (udp_rn != NULL)) + { + fc = snmp_mib_node_find(udp_rn, udpidx[level], &udp_n); + if (fc == 0) + { + /* udpidx[level] does not exist */ + del_cnt = 0; + udp_rn = NULL; + } + else if (fc == 1) + { + del_rn[del_cnt] = udp_rn; + del_n[del_cnt] = udp_n; + del_cnt++; + udp_rn = (struct mib_list_rootnode*)(udp_n->nptr); + } + else if (fc == 2) + { + /* reset delete (2 or more childs) */ + del_cnt = 0; + udp_rn = (struct mib_list_rootnode*)(udp_n->nptr); + } + level++; + } + /* delete marked index nodes */ + while (del_cnt > 0) + { + del_cnt--; + + udp_rn = del_rn[del_cnt]; + udp_n = del_n[del_cnt]; + + next = snmp_mib_node_delete(udp_rn, udp_n); + if (next != NULL) + { + LWIP_ASSERT("next_count == 0",next->count == 0); + snmp_mib_lrn_free(next); + } + } + } + /* disable getnext traversal on empty table */ + if (udp_root.count == 0) udptable.maxlength = 0; +} + + +void snmp_inc_snmpinpkts(void) +{ + snmpinpkts++; +} + +void snmp_inc_snmpoutpkts(void) +{ + snmpoutpkts++; +} + +void snmp_inc_snmpinbadversions(void) +{ + snmpinbadversions++; +} + +void snmp_inc_snmpinbadcommunitynames(void) +{ + snmpinbadcommunitynames++; +} + +void snmp_inc_snmpinbadcommunityuses(void) +{ + snmpinbadcommunityuses++; +} + +void snmp_inc_snmpinasnparseerrs(void) +{ + snmpinasnparseerrs++; +} + +void snmp_inc_snmpintoobigs(void) +{ + snmpintoobigs++; +} + +void snmp_inc_snmpinnosuchnames(void) +{ + snmpinnosuchnames++; +} + +void snmp_inc_snmpinbadvalues(void) +{ + snmpinbadvalues++; +} + +void snmp_inc_snmpinreadonlys(void) +{ + snmpinreadonlys++; +} + +void snmp_inc_snmpingenerrs(void) +{ + snmpingenerrs++; +} + +void snmp_add_snmpintotalreqvars(u8_t value) +{ + snmpintotalreqvars += value; +} + +void snmp_add_snmpintotalsetvars(u8_t value) +{ + snmpintotalsetvars += value; +} + +void snmp_inc_snmpingetrequests(void) +{ + snmpingetrequests++; +} + +void snmp_inc_snmpingetnexts(void) +{ + snmpingetnexts++; +} + +void snmp_inc_snmpinsetrequests(void) +{ + snmpinsetrequests++; +} + +void snmp_inc_snmpingetresponses(void) +{ + snmpingetresponses++; +} + +void snmp_inc_snmpintraps(void) +{ + snmpintraps++; +} + +void snmp_inc_snmpouttoobigs(void) +{ + snmpouttoobigs++; +} + +void snmp_inc_snmpoutnosuchnames(void) +{ + snmpoutnosuchnames++; +} + +void snmp_inc_snmpoutbadvalues(void) +{ + snmpoutbadvalues++; +} + +void snmp_inc_snmpoutgenerrs(void) +{ + snmpoutgenerrs++; +} + +void snmp_inc_snmpoutgetrequests(void) +{ + snmpoutgetrequests++; +} + +void snmp_inc_snmpoutgetnexts(void) +{ + snmpoutgetnexts++; +} + +void snmp_inc_snmpoutsetrequests(void) +{ + snmpoutsetrequests++; +} + +void snmp_inc_snmpoutgetresponses(void) +{ + snmpoutgetresponses++; +} + +void snmp_inc_snmpouttraps(void) +{ + snmpouttraps++; +} + +void snmp_get_snmpgrpid_ptr(struct snmp_obj_id **oid) +{ + *oid = &snmpgrp_id; +} + +void snmp_set_snmpenableauthentraps(u8_t *value) +{ + if (value != NULL) + { + snmpenableauthentraps_ptr = value; + } +} + +void snmp_get_snmpenableauthentraps(u8_t *value) +{ + *value = *snmpenableauthentraps_ptr; +} + +void +noleafs_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + LWIP_UNUSED_ARG(ident_len); + LWIP_UNUSED_ARG(ident); + od->instance = MIB_OBJECT_NONE; +} + +void +noleafs_get_value(struct obj_def *od, u16_t len, void *value) +{ + LWIP_UNUSED_ARG(od); + LWIP_UNUSED_ARG(len); + LWIP_UNUSED_ARG(value); +} + +u8_t +noleafs_set_test(struct obj_def *od, u16_t len, void *value) +{ + LWIP_UNUSED_ARG(od); + LWIP_UNUSED_ARG(len); + LWIP_UNUSED_ARG(value); + /* can't set */ + return 0; +} + +void +noleafs_set_value(struct obj_def *od, u16_t len, void *value) +{ + LWIP_UNUSED_ARG(od); + LWIP_UNUSED_ARG(len); + LWIP_UNUSED_ARG(value); +} + + +/** + * Returns systems object definitions. + * + * @param ident_len the address length (2) + * @param ident points to objectname.0 (object id trailer) + * @param od points to object definition. + */ +static void +system_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + u8_t id; + + /* return to object name, adding index depth (1) */ + ident_len += 1; + ident -= 1; + if (ident_len == 2) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + id = ident[0]; + LWIP_DEBUGF(SNMP_MIB_DEBUG,("get_object_def system.%"U16_F".0\n",(u16_t)id)); + switch (id) + { + case 1: /* sysDescr */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR); + od->v_len = *sysdescr_len_ptr; + break; + case 2: /* sysObjectID */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OBJ_ID); + od->v_len = sysobjid.len * sizeof(s32_t); + break; + case 3: /* sysUpTime */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_TIMETICKS); + od->v_len = sizeof(u32_t); + break; + case 4: /* sysContact */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR); + od->v_len = *syscontact_len_ptr; + break; + case 5: /* sysName */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR); + od->v_len = *sysname_len_ptr; + break; + case 6: /* sysLocation */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR); + od->v_len = *syslocation_len_ptr; + break; + case 7: /* sysServices */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("system_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + }; + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("system_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +/** + * Returns system object value. + * + * @param ident_len the address length (2) + * @param ident points to objectname.0 (object id trailer) + * @param len return value space (in bytes) + * @param value points to (varbind) space to copy value into. + */ +static void +system_get_value(struct obj_def *od, u16_t len, void *value) +{ + u8_t id; + + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* sysDescr */ + ocstrncpy(value,sysdescr_ptr, len); + break; + case 2: /* sysObjectID */ + objectidncpy((s32_t*)value, (s32_t*)sysobjid.id, (u8_t)(len / sizeof(s32_t))); + break; + case 3: /* sysUpTime */ + { + snmp_get_sysuptime(value); + } + break; + case 4: /* sysContact */ + ocstrncpy(value,syscontact_ptr,len); + break; + case 5: /* sysName */ + ocstrncpy(value,sysname_ptr,len); + break; + case 6: /* sysLocation */ + ocstrncpy(value,syslocation_ptr,len); + break; + case 7: /* sysServices */ + { + s32_t *sint_ptr = value; + *sint_ptr = sysservices; + } + break; + }; +} + +static u8_t +system_set_test(struct obj_def *od, u16_t len, void *value) +{ + u8_t id, set_ok; + + LWIP_UNUSED_ARG(value); + set_ok = 0; + id = od->id_inst_ptr[0]; + switch (id) + { + case 4: /* sysContact */ + if ((syscontact_ptr != syscontact_default) && + (len <= 255)) + { + set_ok = 1; + } + break; + case 5: /* sysName */ + if ((sysname_ptr != sysname_default) && + (len <= 255)) + { + set_ok = 1; + } + break; + case 6: /* sysLocation */ + if ((syslocation_ptr != syslocation_default) && + (len <= 255)) + { + set_ok = 1; + } + break; + }; + return set_ok; +} + +static void +system_set_value(struct obj_def *od, u16_t len, void *value) +{ + u8_t id; + + id = od->id_inst_ptr[0]; + switch (id) + { + case 4: /* sysContact */ + ocstrncpy(syscontact_ptr,value,len); + *syscontact_len_ptr = len; + break; + case 5: /* sysName */ + ocstrncpy(sysname_ptr,value,len); + *sysname_len_ptr = len; + break; + case 6: /* sysLocation */ + ocstrncpy(syslocation_ptr,value,len); + *syslocation_len_ptr = len; + break; + }; +} + +/** + * Returns interfaces.ifnumber object definition. + * + * @param ident_len the address length (2) + * @param ident points to objectname.index + * @param od points to object definition. + */ +static void +interfaces_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + /* return to object name, adding index depth (1) */ + ident_len += 1; + ident -= 1; + if (ident_len == 2) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("interfaces_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +/** + * Returns interfaces.ifnumber object value. + * + * @param ident_len the address length (2) + * @param ident points to objectname.0 (object id trailer) + * @param len return value space (in bytes) + * @param value points to (varbind) space to copy value into. + */ +static void +interfaces_get_value(struct obj_def *od, u16_t len, void *value) +{ + LWIP_UNUSED_ARG(len); + if (od->id_inst_ptr[0] == 1) + { + s32_t *sint_ptr = value; + *sint_ptr = iflist_root.count; + } +} + +/** + * Returns ifentry object definitions. + * + * @param ident_len the address length (2) + * @param ident points to objectname.index + * @param od points to object definition. + */ +static void +ifentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + u8_t id; + + /* return to object name, adding index depth (1) */ + ident_len += 1; + ident -= 1; + if (ident_len == 2) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + id = ident[0]; + LWIP_DEBUGF(SNMP_MIB_DEBUG,("get_object_def ifentry.%"U16_F"\n",(u16_t)id)); + switch (id) + { + case 1: /* ifIndex */ + case 3: /* ifType */ + case 4: /* ifMtu */ + case 8: /* ifOperStatus */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + case 2: /* ifDescr */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR); + /** @todo this should be some sort of sizeof(struct netif.name) */ + od->v_len = 2; + break; + case 5: /* ifSpeed */ + case 21: /* ifOutQLen */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_GAUGE); + od->v_len = sizeof(u32_t); + break; + case 6: /* ifPhysAddress */ + { + struct netif *netif; + + snmp_ifindextonetif(ident[1], &netif); + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR); + od->v_len = netif->hwaddr_len; + } + break; + case 7: /* ifAdminStatus */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + case 9: /* ifLastChange */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_TIMETICKS); + od->v_len = sizeof(u32_t); + break; + case 10: /* ifInOctets */ + case 11: /* ifInUcastPkts */ + case 12: /* ifInNUcastPkts */ + case 13: /* ifInDiscarts */ + case 14: /* ifInErrors */ + case 15: /* ifInUnkownProtos */ + case 16: /* ifOutOctets */ + case 17: /* ifOutUcastPkts */ + case 18: /* ifOutNUcastPkts */ + case 19: /* ifOutDiscarts */ + case 20: /* ifOutErrors */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_COUNTER); + od->v_len = sizeof(u32_t); + break; + case 22: /* ifSpecific */ + /** @note returning zeroDotZero (0.0) no media specific MIB support */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OBJ_ID); + od->v_len = ifspecific.len * sizeof(s32_t); + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ifentry_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + }; + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ifentry_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +/** + * Returns ifentry object value. + * + * @param ident_len the address length (2) + * @param ident points to objectname.0 (object id trailer) + * @param len return value space (in bytes) + * @param value points to (varbind) space to copy value into. + */ +static void +ifentry_get_value(struct obj_def *od, u16_t len, void *value) +{ + struct netif *netif; + u8_t id; + + snmp_ifindextonetif(od->id_inst_ptr[1], &netif); + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* ifIndex */ + { + s32_t *sint_ptr = value; + *sint_ptr = od->id_inst_ptr[1]; + } + break; + case 2: /* ifDescr */ + ocstrncpy(value,(u8_t*)netif->name,len); + break; + case 3: /* ifType */ + { + s32_t *sint_ptr = value; + *sint_ptr = netif->link_type; + } + break; + case 4: /* ifMtu */ + { + s32_t *sint_ptr = value; + *sint_ptr = netif->mtu; + } + break; + case 5: /* ifSpeed */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->link_speed; + } + break; + case 6: /* ifPhysAddress */ + ocstrncpy(value,netif->hwaddr,len); + break; + case 7: /* ifAdminStatus */ +#if LWIP_NETIF_LINK_CALLBACK + { + s32_t *sint_ptr = value; + if (netif_is_up(netif)) + { + if (netif_is_link_up(netif)) + { + *sint_ptr = 1; /* up */ + } + else + { + *sint_ptr = 7; /* lowerLayerDown */ + } + } + else + { + *sint_ptr = 2; /* down */ + } + } + break; +#endif + case 8: /* ifOperStatus */ + { + s32_t *sint_ptr = value; + if (netif_is_up(netif)) + { + *sint_ptr = 1; + } + else + { + *sint_ptr = 2; + } + } + break; + case 9: /* ifLastChange */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->ts; + } + break; + case 10: /* ifInOctets */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->ifinoctets; + } + break; + case 11: /* ifInUcastPkts */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->ifinucastpkts; + } + break; + case 12: /* ifInNUcastPkts */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->ifinnucastpkts; + } + break; + case 13: /* ifInDiscarts */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->ifindiscards; + } + break; + case 14: /* ifInErrors */ + case 15: /* ifInUnkownProtos */ + /** @todo add these counters! */ + { + u32_t *uint_ptr = value; + *uint_ptr = 0; + } + break; + case 16: /* ifOutOctets */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->ifoutoctets; + } + break; + case 17: /* ifOutUcastPkts */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->ifoutucastpkts; + } + break; + case 18: /* ifOutNUcastPkts */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->ifoutnucastpkts; + } + break; + case 19: /* ifOutDiscarts */ + { + u32_t *uint_ptr = value; + *uint_ptr = netif->ifoutdiscards; + } + break; + case 20: /* ifOutErrors */ + /** @todo add this counter! */ + { + u32_t *uint_ptr = value; + *uint_ptr = 0; + } + break; + case 21: /* ifOutQLen */ + /** @todo figure out if this must be 0 (no queue) or 1? */ + { + u32_t *uint_ptr = value; + *uint_ptr = 0; + } + break; + case 22: /* ifSpecific */ + objectidncpy((s32_t*)value, (s32_t*)ifspecific.id, (u8_t)(len / sizeof(s32_t))); + break; + }; +} + +#if !SNMP_SAFE_REQUESTS +static u8_t +ifentry_set_test (struct obj_def *od, u16_t len, void *value) +{ + struct netif *netif; + u8_t id, set_ok; + + set_ok = 0; + snmp_ifindextonetif(od->id_inst_ptr[1], &netif); + id = od->id_inst_ptr[0]; + switch (id) + { + case 7: /* ifAdminStatus */ + { + s32_t *sint_ptr = value; + if (*sint_ptr == 1 || *sint_ptr == 2) + set_ok = 1; + } + break; + } + return set_ok; +} + +static void +ifentry_set_value (struct obj_def *od, u16_t len, void *value) +{ + struct netif *netif; + u8_t id; + + snmp_ifindextonetif(od->id_inst_ptr[1], &netif); + id = od->id_inst_ptr[0]; + switch (id) + { + case 7: /* ifAdminStatus */ + { + s32_t *sint_ptr = value; + if (*sint_ptr == 1) + { + netif_set_up(netif); + } + else if (*sint_ptr == 2) + { + netif_set_down(netif); + } + } + break; + } +} +#endif /* SNMP_SAFE_REQUESTS */ + +/** + * Returns atentry object definitions. + * + * @param ident_len the address length (6) + * @param ident points to objectname.atifindex.atnetaddress + * @param od points to object definition. + */ +static void +atentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + /* return to object name, adding index depth (5) */ + ident_len += 5; + ident -= 5; + + if (ident_len == 6) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + switch (ident[0]) + { + case 1: /* atIfIndex */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + case 2: /* atPhysAddress */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR); + od->v_len = 6; /** @todo try to use netif::hwaddr_len */ + break; + case 3: /* atNetAddress */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR); + od->v_len = 4; + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("atentry_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + } + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("atentry_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +atentry_get_value(struct obj_def *od, u16_t len, void *value) +{ +#if LWIP_ARP + u8_t id; + struct eth_addr* ethaddr_ret; + struct ip_addr* ipaddr_ret; +#endif /* LWIP_ARP */ + struct ip_addr ip; + struct netif *netif; + + LWIP_UNUSED_ARG(len); + LWIP_UNUSED_ARG(value);/* if !LWIP_ARP */ + + snmp_ifindextonetif(od->id_inst_ptr[1], &netif); + snmp_oidtoip(&od->id_inst_ptr[2], &ip); + ip.addr = htonl(ip.addr); + +#if LWIP_ARP /** @todo implement a netif_find_addr */ + if (etharp_find_addr(netif, &ip, ðaddr_ret, &ipaddr_ret) > -1) + { + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* atIfIndex */ + { + s32_t *sint_ptr = value; + *sint_ptr = od->id_inst_ptr[1]; + } + break; + case 2: /* atPhysAddress */ + { + struct eth_addr *dst = value; + + *dst = *ethaddr_ret; + } + break; + case 3: /* atNetAddress */ + { + struct ip_addr *dst = value; + + *dst = *ipaddr_ret; + } + break; + } + } +#endif /* LWIP_ARP */ +} + +static void +ip_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + u8_t id; + + /* return to object name, adding index depth (1) */ + ident_len += 1; + ident -= 1; + if (ident_len == 2) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + id = ident[0]; + LWIP_DEBUGF(SNMP_MIB_DEBUG,("get_object_def ip.%"U16_F".0\n",(u16_t)id)); + switch (id) + { + case 1: /* ipForwarding */ + case 2: /* ipDefaultTTL */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + case 3: /* ipInReceives */ + case 4: /* ipInHdrErrors */ + case 5: /* ipInAddrErrors */ + case 6: /* ipForwDatagrams */ + case 7: /* ipInUnknownProtos */ + case 8: /* ipInDiscards */ + case 9: /* ipInDelivers */ + case 10: /* ipOutRequests */ + case 11: /* ipOutDiscards */ + case 12: /* ipOutNoRoutes */ + case 14: /* ipReasmReqds */ + case 15: /* ipReasmOKs */ + case 16: /* ipReasmFails */ + case 17: /* ipFragOKs */ + case 18: /* ipFragFails */ + case 19: /* ipFragCreates */ + case 23: /* ipRoutingDiscards */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_COUNTER); + od->v_len = sizeof(u32_t); + break; + case 13: /* ipReasmTimeout */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ip_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + }; + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ip_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +ip_get_value(struct obj_def *od, u16_t len, void *value) +{ + u8_t id; + + LWIP_UNUSED_ARG(len); + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* ipForwarding */ + { + s32_t *sint_ptr = value; +#if IP_FORWARD + /* forwarding */ + *sint_ptr = 1; +#else + /* not-forwarding */ + *sint_ptr = 2; +#endif + } + break; + case 2: /* ipDefaultTTL */ + { + s32_t *sint_ptr = value; + *sint_ptr = IP_DEFAULT_TTL; + } + break; + case 3: /* ipInReceives */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipinreceives; + } + break; + case 4: /* ipInHdrErrors */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipinhdrerrors; + } + break; + case 5: /* ipInAddrErrors */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipinaddrerrors; + } + break; + case 6: /* ipForwDatagrams */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipforwdatagrams; + } + break; + case 7: /* ipInUnknownProtos */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipinunknownprotos; + } + break; + case 8: /* ipInDiscards */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipindiscards; + } + break; + case 9: /* ipInDelivers */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipindelivers; + } + break; + case 10: /* ipOutRequests */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipoutrequests; + } + break; + case 11: /* ipOutDiscards */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipoutdiscards; + } + break; + case 12: /* ipOutNoRoutes */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipoutnoroutes; + } + break; + case 13: /* ipReasmTimeout */ + { + s32_t *sint_ptr = value; +#if IP_REASSEMBLY + *sint_ptr = IP_REASS_MAXAGE; +#else + *sint_ptr = 0; +#endif + } + break; + case 14: /* ipReasmReqds */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipreasmreqds; + } + break; + case 15: /* ipReasmOKs */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipreasmoks; + } + break; + case 16: /* ipReasmFails */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipreasmfails; + } + break; + case 17: /* ipFragOKs */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipfragoks; + } + break; + case 18: /* ipFragFails */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipfragfails; + } + break; + case 19: /* ipFragCreates */ + { + u32_t *uint_ptr = value; + *uint_ptr = ipfragcreates; + } + break; + case 23: /* ipRoutingDiscards */ + /** @todo can lwIP discard routes at all?? hardwire this to 0?? */ + { + u32_t *uint_ptr = value; + *uint_ptr = iproutingdiscards; + } + break; + }; +} + +/** + * Test ip object value before setting. + * + * @param od is the object definition + * @param len return value space (in bytes) + * @param value points to (varbind) space to copy value from. + * + * @note we allow set if the value matches the hardwired value, + * otherwise return badvalue. + */ +static u8_t +ip_set_test(struct obj_def *od, u16_t len, void *value) +{ + u8_t id, set_ok; + s32_t *sint_ptr = value; + + LWIP_UNUSED_ARG(len); + set_ok = 0; + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* ipForwarding */ +#if IP_FORWARD + /* forwarding */ + if (*sint_ptr == 1) +#else + /* not-forwarding */ + if (*sint_ptr == 2) +#endif + { + set_ok = 1; + } + break; + case 2: /* ipDefaultTTL */ + if (*sint_ptr == IP_DEFAULT_TTL) + { + set_ok = 1; + } + break; + }; + return set_ok; +} + +static void +ip_addrentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + /* return to object name, adding index depth (4) */ + ident_len += 4; + ident -= 4; + + if (ident_len == 5) + { + u8_t id; + + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + id = ident[0]; + switch (id) + { + case 1: /* ipAdEntAddr */ + case 3: /* ipAdEntNetMask */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR); + od->v_len = 4; + break; + case 2: /* ipAdEntIfIndex */ + case 4: /* ipAdEntBcastAddr */ + case 5: /* ipAdEntReasmMaxSize */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ip_addrentry_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + } + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ip_addrentry_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +ip_addrentry_get_value(struct obj_def *od, u16_t len, void *value) +{ + u8_t id; + u16_t ifidx; + struct ip_addr ip; + struct netif *netif = netif_list; + + LWIP_UNUSED_ARG(len); + snmp_oidtoip(&od->id_inst_ptr[1], &ip); + ip.addr = htonl(ip.addr); + ifidx = 0; + while ((netif != NULL) && !ip_addr_cmp(&ip, &netif->ip_addr)) + { + netif = netif->next; + ifidx++; + } + + if (netif != NULL) + { + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* ipAdEntAddr */ + { + struct ip_addr *dst = value; + *dst = netif->ip_addr; + } + break; + case 2: /* ipAdEntIfIndex */ + { + s32_t *sint_ptr = value; + *sint_ptr = ifidx + 1; + } + break; + case 3: /* ipAdEntNetMask */ + { + struct ip_addr *dst = value; + *dst = netif->netmask; + } + break; + case 4: /* ipAdEntBcastAddr */ + { + s32_t *sint_ptr = value; + + /* lwIP oddity, there's no broadcast + address in the netif we can rely on */ + *sint_ptr = ip_addr_broadcast.addr & 1; + } + break; + case 5: /* ipAdEntReasmMaxSize */ + { + s32_t *sint_ptr = value; +#if IP_REASSEMBLY + /* @todo The theoretical maximum is IP_REASS_MAX_PBUFS * size of the pbufs, + * but only if receiving one fragmented packet at a time. + * The current solution is to calculate for 2 simultaneous packets... + */ + *sint_ptr = (IP_HLEN + ((IP_REASS_MAX_PBUFS/2) * + (PBUF_POOL_BUFSIZE - PBUF_LINK_HLEN - IP_HLEN))); +#else + /** @todo returning MTU would be a bad thing and + returning a wild guess like '576' isn't good either */ + *sint_ptr = 0; +#endif + } + break; + } + } +} + +/** + * @note + * lwIP IP routing is currently using the network addresses in netif_list. + * if no suitable network IP is found in netif_list, the default_netif is used. + */ +static void +ip_rteentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + u8_t id; + + /* return to object name, adding index depth (4) */ + ident_len += 4; + ident -= 4; + + if (ident_len == 5) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + id = ident[0]; + switch (id) + { + case 1: /* ipRouteDest */ + case 7: /* ipRouteNextHop */ + case 11: /* ipRouteMask */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR); + od->v_len = 4; + break; + case 2: /* ipRouteIfIndex */ + case 3: /* ipRouteMetric1 */ + case 4: /* ipRouteMetric2 */ + case 5: /* ipRouteMetric3 */ + case 6: /* ipRouteMetric4 */ + case 8: /* ipRouteType */ + case 10: /* ipRouteAge */ + case 12: /* ipRouteMetric5 */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + case 9: /* ipRouteProto */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + case 13: /* ipRouteInfo */ + /** @note returning zeroDotZero (0.0) no routing protocol specific MIB */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OBJ_ID); + od->v_len = iprouteinfo.len * sizeof(s32_t); + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ip_rteentry_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + } + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ip_rteentry_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +ip_rteentry_get_value(struct obj_def *od, u16_t len, void *value) +{ + struct netif *netif; + struct ip_addr dest; + s32_t *ident; + u8_t id; + + ident = od->id_inst_ptr; + snmp_oidtoip(&ident[1], &dest); + dest.addr = htonl(dest.addr); + + if (dest.addr == 0) + { + /* ip_route() uses default netif for default route */ + netif = netif_default; + } + else + { + /* not using ip_route(), need exact match! */ + netif = netif_list; + while ((netif != NULL) && + !ip_addr_netcmp(&dest, &(netif->ip_addr), &(netif->netmask)) ) + { + netif = netif->next; + } + } + if (netif != NULL) + { + id = ident[0]; + switch (id) + { + case 1: /* ipRouteDest */ + { + struct ip_addr *dst = value; + + if (dest.addr == 0) + { + /* default rte has 0.0.0.0 dest */ + dst->addr = 0; + } + else + { + /* netifs have netaddress dest */ + dst->addr = netif->ip_addr.addr & netif->netmask.addr; + } + } + break; + case 2: /* ipRouteIfIndex */ + { + s32_t *sint_ptr = value; + + snmp_netiftoifindex(netif, sint_ptr); + } + break; + case 3: /* ipRouteMetric1 */ + { + s32_t *sint_ptr = value; + + if (dest.addr == 0) + { + /* default rte has metric 1 */ + *sint_ptr = 1; + } + else + { + /* other rtes have metric 0 */ + *sint_ptr = 0; + } + } + break; + case 4: /* ipRouteMetric2 */ + case 5: /* ipRouteMetric3 */ + case 6: /* ipRouteMetric4 */ + case 12: /* ipRouteMetric5 */ + { + s32_t *sint_ptr = value; + /* not used */ + *sint_ptr = -1; + } + break; + case 7: /* ipRouteNextHop */ + { + struct ip_addr *dst = value; + + if (dest.addr == 0) + { + /* default rte: gateway */ + *dst = netif->gw; + } + else + { + /* other rtes: netif ip_addr */ + *dst = netif->ip_addr; + } + } + break; + case 8: /* ipRouteType */ + { + s32_t *sint_ptr = value; + + if (dest.addr == 0) + { + /* default rte is indirect */ + *sint_ptr = 4; + } + else + { + /* other rtes are direct */ + *sint_ptr = 3; + } + } + break; + case 9: /* ipRouteProto */ + { + s32_t *sint_ptr = value; + /* locally defined routes */ + *sint_ptr = 2; + } + break; + case 10: /* ipRouteAge */ + { + s32_t *sint_ptr = value; + /** @todo (sysuptime - timestamp last change) / 100 + @see snmp_insert_iprteidx_tree() */ + *sint_ptr = 0; + } + break; + case 11: /* ipRouteMask */ + { + struct ip_addr *dst = value; + + if (dest.addr == 0) + { + /* default rte use 0.0.0.0 mask */ + dst->addr = 0; + } + else + { + /* other rtes use netmask */ + *dst = netif->netmask; + } + } + break; + case 13: /* ipRouteInfo */ + objectidncpy((s32_t*)value, (s32_t*)iprouteinfo.id, (u8_t)(len / sizeof(s32_t))); + break; + } + } +} + +static void +ip_ntomentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + /* return to object name, adding index depth (5) */ + ident_len += 5; + ident -= 5; + + if (ident_len == 6) + { + u8_t id; + + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + id = ident[0]; + switch (id) + { + case 1: /* ipNetToMediaIfIndex */ + case 4: /* ipNetToMediaType */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + case 2: /* ipNetToMediaPhysAddress */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR); + od->v_len = 6; /** @todo try to use netif::hwaddr_len */ + break; + case 3: /* ipNetToMediaNetAddress */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR); + od->v_len = 4; + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ip_ntomentry_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + } + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ip_ntomentry_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +ip_ntomentry_get_value(struct obj_def *od, u16_t len, void *value) +{ +#if LWIP_ARP + u8_t id; + struct eth_addr* ethaddr_ret; + struct ip_addr* ipaddr_ret; +#endif /* LWIP_ARP */ + struct ip_addr ip; + struct netif *netif; + + LWIP_UNUSED_ARG(len); + LWIP_UNUSED_ARG(value);/* if !LWIP_ARP */ + + snmp_ifindextonetif(od->id_inst_ptr[1], &netif); + snmp_oidtoip(&od->id_inst_ptr[2], &ip); + ip.addr = htonl(ip.addr); + +#if LWIP_ARP /** @todo implement a netif_find_addr */ + if (etharp_find_addr(netif, &ip, ðaddr_ret, &ipaddr_ret) > -1) + { + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* ipNetToMediaIfIndex */ + { + s32_t *sint_ptr = value; + *sint_ptr = od->id_inst_ptr[1]; + } + break; + case 2: /* ipNetToMediaPhysAddress */ + { + struct eth_addr *dst = value; + + *dst = *ethaddr_ret; + } + break; + case 3: /* ipNetToMediaNetAddress */ + { + struct ip_addr *dst = value; + + *dst = *ipaddr_ret; + } + break; + case 4: /* ipNetToMediaType */ + { + s32_t *sint_ptr = value; + /* dynamic (?) */ + *sint_ptr = 3; + } + break; + } + } +#endif /* LWIP_ARP */ +} + +static void +icmp_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + /* return to object name, adding index depth (1) */ + ident_len += 1; + ident -= 1; + if ((ident_len == 2) && + (ident[0] > 0) && (ident[0] < 27)) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_COUNTER); + od->v_len = sizeof(u32_t); + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("icmp_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +icmp_get_value(struct obj_def *od, u16_t len, void *value) +{ + u32_t *uint_ptr = value; + u8_t id; + + LWIP_UNUSED_ARG(len); + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* icmpInMsgs */ + *uint_ptr = icmpinmsgs; + break; + case 2: /* icmpInErrors */ + *uint_ptr = icmpinerrors; + break; + case 3: /* icmpInDestUnreachs */ + *uint_ptr = icmpindestunreachs; + break; + case 4: /* icmpInTimeExcds */ + *uint_ptr = icmpintimeexcds; + break; + case 5: /* icmpInParmProbs */ + *uint_ptr = icmpinparmprobs; + break; + case 6: /* icmpInSrcQuenchs */ + *uint_ptr = icmpinsrcquenchs; + break; + case 7: /* icmpInRedirects */ + *uint_ptr = icmpinredirects; + break; + case 8: /* icmpInEchos */ + *uint_ptr = icmpinechos; + break; + case 9: /* icmpInEchoReps */ + *uint_ptr = icmpinechoreps; + break; + case 10: /* icmpInTimestamps */ + *uint_ptr = icmpintimestamps; + break; + case 11: /* icmpInTimestampReps */ + *uint_ptr = icmpintimestampreps; + break; + case 12: /* icmpInAddrMasks */ + *uint_ptr = icmpinaddrmasks; + break; + case 13: /* icmpInAddrMaskReps */ + *uint_ptr = icmpinaddrmaskreps; + break; + case 14: /* icmpOutMsgs */ + *uint_ptr = icmpoutmsgs; + break; + case 15: /* icmpOutErrors */ + *uint_ptr = icmpouterrors; + break; + case 16: /* icmpOutDestUnreachs */ + *uint_ptr = icmpoutdestunreachs; + break; + case 17: /* icmpOutTimeExcds */ + *uint_ptr = icmpouttimeexcds; + break; + case 18: /* icmpOutParmProbs */ + *uint_ptr = icmpoutparmprobs; + break; + case 19: /* icmpOutSrcQuenchs */ + *uint_ptr = icmpoutsrcquenchs; + break; + case 20: /* icmpOutRedirects */ + *uint_ptr = icmpoutredirects; + break; + case 21: /* icmpOutEchos */ + *uint_ptr = icmpoutechos; + break; + case 22: /* icmpOutEchoReps */ + *uint_ptr = icmpoutechoreps; + break; + case 23: /* icmpOutTimestamps */ + *uint_ptr = icmpouttimestamps; + break; + case 24: /* icmpOutTimestampReps */ + *uint_ptr = icmpouttimestampreps; + break; + case 25: /* icmpOutAddrMasks */ + *uint_ptr = icmpoutaddrmasks; + break; + case 26: /* icmpOutAddrMaskReps */ + *uint_ptr = icmpoutaddrmaskreps; + break; + } +} + +#if LWIP_TCP +/** @todo tcp grp */ +static void +tcp_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + u8_t id; + + /* return to object name, adding index depth (1) */ + ident_len += 1; + ident -= 1; + if (ident_len == 2) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + id = ident[0]; + LWIP_DEBUGF(SNMP_MIB_DEBUG,("get_object_def tcp.%"U16_F".0\n",(u16_t)id)); + + switch (id) + { + case 1: /* tcpRtoAlgorithm */ + case 2: /* tcpRtoMin */ + case 3: /* tcpRtoMax */ + case 4: /* tcpMaxConn */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + case 5: /* tcpActiveOpens */ + case 6: /* tcpPassiveOpens */ + case 7: /* tcpAttemptFails */ + case 8: /* tcpEstabResets */ + case 10: /* tcpInSegs */ + case 11: /* tcpOutSegs */ + case 12: /* tcpRetransSegs */ + case 14: /* tcpInErrs */ + case 15: /* tcpOutRsts */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_COUNTER); + od->v_len = sizeof(u32_t); + break; + case 9: /* tcpCurrEstab */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_GAUGE); + od->v_len = sizeof(u32_t); + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("tcp_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + }; + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("tcp_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +tcp_get_value(struct obj_def *od, u16_t len, void *value) +{ + u32_t *uint_ptr = value; + s32_t *sint_ptr = value; + u8_t id; + + LWIP_UNUSED_ARG(len); + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* tcpRtoAlgorithm, vanj(4) */ + *sint_ptr = 4; + break; + case 2: /* tcpRtoMin */ + /* @todo not the actual value, a guess, + needs to be calculated */ + *sint_ptr = 1000; + break; + case 3: /* tcpRtoMax */ + /* @todo not the actual value, a guess, + needs to be calculated */ + *sint_ptr = 60000; + break; + case 4: /* tcpMaxConn */ + *sint_ptr = MEMP_NUM_TCP_PCB; + break; + case 5: /* tcpActiveOpens */ + *uint_ptr = tcpactiveopens; + break; + case 6: /* tcpPassiveOpens */ + *uint_ptr = tcppassiveopens; + break; + case 7: /* tcpAttemptFails */ + *uint_ptr = tcpattemptfails; + break; + case 8: /* tcpEstabResets */ + *uint_ptr = tcpestabresets; + break; + case 9: /* tcpCurrEstab */ + { + u16_t tcpcurrestab = 0; + struct tcp_pcb *pcb = tcp_active_pcbs; + while (pcb != NULL) + { + if ((pcb->state == ESTABLISHED) || + (pcb->state == CLOSE_WAIT)) + { + tcpcurrestab++; + } + pcb = pcb->next; + } + *uint_ptr = tcpcurrestab; + } + break; + case 10: /* tcpInSegs */ + *uint_ptr = tcpinsegs; + break; + case 11: /* tcpOutSegs */ + *uint_ptr = tcpoutsegs; + break; + case 12: /* tcpRetransSegs */ + *uint_ptr = tcpretranssegs; + break; + case 14: /* tcpInErrs */ + *uint_ptr = tcpinerrs; + break; + case 15: /* tcpOutRsts */ + *uint_ptr = tcpoutrsts; + break; + } +} +#ifdef THIS_SEEMS_UNUSED +static void +tcpconnentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + /* return to object name, adding index depth (10) */ + ident_len += 10; + ident -= 10; + + if (ident_len == 11) + { + u8_t id; + + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + id = ident[0]; + LWIP_DEBUGF(SNMP_MIB_DEBUG,("get_object_def tcp.%"U16_F".0\n",(u16_t)id)); + + switch (id) + { + case 1: /* tcpConnState */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + case 2: /* tcpConnLocalAddress */ + case 4: /* tcpConnRemAddress */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR); + od->v_len = 4; + break; + case 3: /* tcpConnLocalPort */ + case 5: /* tcpConnRemPort */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("tcpconnentry_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + }; + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("tcpconnentry_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +tcpconnentry_get_value(struct obj_def *od, u16_t len, void *value) +{ + struct ip_addr lip, rip; + u16_t lport, rport; + s32_t *ident; + + ident = od->id_inst_ptr; + snmp_oidtoip(&ident[1], &lip); + lip.addr = htonl(lip.addr); + lport = ident[5]; + snmp_oidtoip(&ident[6], &rip); + rip.addr = htonl(rip.addr); + rport = ident[10]; + + /** @todo find matching PCB */ +} +#endif /* if 0 */ +#endif + +static void +udp_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + /* return to object name, adding index depth (1) */ + ident_len += 1; + ident -= 1; + if ((ident_len == 2) && + (ident[0] > 0) && (ident[0] < 6)) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_COUNTER); + od->v_len = sizeof(u32_t); + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("udp_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +udp_get_value(struct obj_def *od, u16_t len, void *value) +{ + u32_t *uint_ptr = value; + u8_t id; + + LWIP_UNUSED_ARG(len); + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* udpInDatagrams */ + *uint_ptr = udpindatagrams; + break; + case 2: /* udpNoPorts */ + *uint_ptr = udpnoports; + break; + case 3: /* udpInErrors */ + *uint_ptr = udpinerrors; + break; + case 4: /* udpOutDatagrams */ + *uint_ptr = udpoutdatagrams; + break; + } +} + +static void +udpentry_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + /* return to object name, adding index depth (5) */ + ident_len += 5; + ident -= 5; + + if (ident_len == 6) + { + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + switch (ident[0]) + { + case 1: /* udpLocalAddress */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR); + od->v_len = 4; + break; + case 2: /* udpLocalPort */ + od->instance = MIB_OBJECT_TAB; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("udpentry_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + } + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("udpentry_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +udpentry_get_value(struct obj_def *od, u16_t len, void *value) +{ + u8_t id; + struct udp_pcb *pcb; + struct ip_addr ip; + u16_t port; + + LWIP_UNUSED_ARG(len); + snmp_oidtoip(&od->id_inst_ptr[1], &ip); + ip.addr = htonl(ip.addr); + port = od->id_inst_ptr[5]; + + pcb = udp_pcbs; + while ((pcb != NULL) && + !((pcb->local_ip.addr == ip.addr) && + (pcb->local_port == port))) + { + pcb = pcb->next; + } + + if (pcb != NULL) + { + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* udpLocalAddress */ + { + struct ip_addr *dst = value; + *dst = pcb->local_ip; + } + break; + case 2: /* udpLocalPort */ + { + s32_t *sint_ptr = value; + *sint_ptr = pcb->local_port; + } + break; + } + } +} + +static void +snmp_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od) +{ + /* return to object name, adding index depth (1) */ + ident_len += 1; + ident -= 1; + if (ident_len == 2) + { + u8_t id; + + od->id_inst_len = ident_len; + od->id_inst_ptr = ident; + + id = ident[0]; + switch (id) + { + case 1: /* snmpInPkts */ + case 2: /* snmpOutPkts */ + case 3: /* snmpInBadVersions */ + case 4: /* snmpInBadCommunityNames */ + case 5: /* snmpInBadCommunityUses */ + case 6: /* snmpInASNParseErrs */ + case 8: /* snmpInTooBigs */ + case 9: /* snmpInNoSuchNames */ + case 10: /* snmpInBadValues */ + case 11: /* snmpInReadOnlys */ + case 12: /* snmpInGenErrs */ + case 13: /* snmpInTotalReqVars */ + case 14: /* snmpInTotalSetVars */ + case 15: /* snmpInGetRequests */ + case 16: /* snmpInGetNexts */ + case 17: /* snmpInSetRequests */ + case 18: /* snmpInGetResponses */ + case 19: /* snmpInTraps */ + case 20: /* snmpOutTooBigs */ + case 21: /* snmpOutNoSuchNames */ + case 22: /* snmpOutBadValues */ + case 24: /* snmpOutGenErrs */ + case 25: /* snmpOutGetRequests */ + case 26: /* snmpOutGetNexts */ + case 27: /* snmpOutSetRequests */ + case 28: /* snmpOutGetResponses */ + case 29: /* snmpOutTraps */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_ONLY; + od->asn_type = (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_COUNTER); + od->v_len = sizeof(u32_t); + break; + case 30: /* snmpEnableAuthenTraps */ + od->instance = MIB_OBJECT_SCALAR; + od->access = MIB_OBJECT_READ_WRITE; + od->asn_type = (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG); + od->v_len = sizeof(s32_t); + break; + default: + LWIP_DEBUGF(SNMP_MIB_DEBUG,("snmp_get_object_def: no such object\n")); + od->instance = MIB_OBJECT_NONE; + break; + }; + } + else + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("snmp_get_object_def: no scalar\n")); + od->instance = MIB_OBJECT_NONE; + } +} + +static void +snmp_get_value(struct obj_def *od, u16_t len, void *value) +{ + u32_t *uint_ptr = value; + u8_t id; + + LWIP_UNUSED_ARG(len); + id = od->id_inst_ptr[0]; + switch (id) + { + case 1: /* snmpInPkts */ + *uint_ptr = snmpinpkts; + break; + case 2: /* snmpOutPkts */ + *uint_ptr = snmpoutpkts; + break; + case 3: /* snmpInBadVersions */ + *uint_ptr = snmpinbadversions; + break; + case 4: /* snmpInBadCommunityNames */ + *uint_ptr = snmpinbadcommunitynames; + break; + case 5: /* snmpInBadCommunityUses */ + *uint_ptr = snmpinbadcommunityuses; + break; + case 6: /* snmpInASNParseErrs */ + *uint_ptr = snmpinasnparseerrs; + break; + case 8: /* snmpInTooBigs */ + *uint_ptr = snmpintoobigs; + break; + case 9: /* snmpInNoSuchNames */ + *uint_ptr = snmpinnosuchnames; + break; + case 10: /* snmpInBadValues */ + *uint_ptr = snmpinbadvalues; + break; + case 11: /* snmpInReadOnlys */ + *uint_ptr = snmpinreadonlys; + break; + case 12: /* snmpInGenErrs */ + *uint_ptr = snmpingenerrs; + break; + case 13: /* snmpInTotalReqVars */ + *uint_ptr = snmpintotalreqvars; + break; + case 14: /* snmpInTotalSetVars */ + *uint_ptr = snmpintotalsetvars; + break; + case 15: /* snmpInGetRequests */ + *uint_ptr = snmpingetrequests; + break; + case 16: /* snmpInGetNexts */ + *uint_ptr = snmpingetnexts; + break; + case 17: /* snmpInSetRequests */ + *uint_ptr = snmpinsetrequests; + break; + case 18: /* snmpInGetResponses */ + *uint_ptr = snmpingetresponses; + break; + case 19: /* snmpInTraps */ + *uint_ptr = snmpintraps; + break; + case 20: /* snmpOutTooBigs */ + *uint_ptr = snmpouttoobigs; + break; + case 21: /* snmpOutNoSuchNames */ + *uint_ptr = snmpoutnosuchnames; + break; + case 22: /* snmpOutBadValues */ + *uint_ptr = snmpoutbadvalues; + break; + case 24: /* snmpOutGenErrs */ + *uint_ptr = snmpoutgenerrs; + break; + case 25: /* snmpOutGetRequests */ + *uint_ptr = snmpoutgetrequests; + break; + case 26: /* snmpOutGetNexts */ + *uint_ptr = snmpoutgetnexts; + break; + case 27: /* snmpOutSetRequests */ + *uint_ptr = snmpoutsetrequests; + break; + case 28: /* snmpOutGetResponses */ + *uint_ptr = snmpoutgetresponses; + break; + case 29: /* snmpOutTraps */ + *uint_ptr = snmpouttraps; + break; + case 30: /* snmpEnableAuthenTraps */ + *uint_ptr = *snmpenableauthentraps_ptr; + break; + }; +} + +/** + * Test snmp object value before setting. + * + * @param od is the object definition + * @param len return value space (in bytes) + * @param value points to (varbind) space to copy value from. + */ +static u8_t +snmp_set_test(struct obj_def *od, u16_t len, void *value) +{ + u8_t id, set_ok; + + LWIP_UNUSED_ARG(len); + set_ok = 0; + id = od->id_inst_ptr[0]; + if (id == 30) + { + /* snmpEnableAuthenTraps */ + s32_t *sint_ptr = value; + + if (snmpenableauthentraps_ptr != &snmpenableauthentraps_default) + { + /* we should have writable non-volatile mem here */ + if ((*sint_ptr == 1) || (*sint_ptr == 2)) + { + set_ok = 1; + } + } + else + { + /* const or hardwired value */ + if (*sint_ptr == snmpenableauthentraps_default) + { + set_ok = 1; + } + } + } + return set_ok; +} + +static void +snmp_set_value(struct obj_def *od, u16_t len, void *value) +{ + u8_t id; + + LWIP_UNUSED_ARG(len); + id = od->id_inst_ptr[0]; + if (id == 30) + { + /* snmpEnableAuthenTraps */ + s32_t *sint_ptr = value; + *snmpenableauthentraps_ptr = *sint_ptr; + } +} + +#endif /* LWIP_SNMP */ diff --git a/bertos/net/lwip/src/core/snmp/mib_structs.c b/bertos/net/lwip/src/core/snmp/mib_structs.c new file mode 100644 index 0000000..39a2949 --- /dev/null +++ b/bertos/net/lwip/src/core/snmp/mib_structs.c @@ -0,0 +1,1183 @@ +/** + * @file + * MIB tree access/construction functions. + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#include "lwip/opt.h" + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/snmp_structs.h" +#include "lwip/mem.h" + +/** .iso.org.dod.internet address prefix, @see snmp_iso_*() */ +const s32_t prefix[4] = {1, 3, 6, 1}; + +#define NODE_STACK_SIZE (LWIP_SNMP_OBJ_ID_LEN) +/** node stack entry (old news?) */ +struct nse +{ + /** right child */ + struct mib_node* r_ptr; + /** right child identifier */ + s32_t r_id; + /** right child next level */ + u8_t r_nl; +}; +static u8_t node_stack_cnt; +static struct nse node_stack[NODE_STACK_SIZE]; + +/** + * Pushes nse struct onto stack. + */ +static void +push_node(struct nse* node) +{ + LWIP_ASSERT("node_stack_cnt < NODE_STACK_SIZE",node_stack_cnt < NODE_STACK_SIZE); + LWIP_DEBUGF(SNMP_MIB_DEBUG,("push_node() node=%p id=%"S32_F"\n",(void*)(node->r_ptr),node->r_id)); + if (node_stack_cnt < NODE_STACK_SIZE) + { + node_stack[node_stack_cnt] = *node; + node_stack_cnt++; + } +} + +/** + * Pops nse struct from stack. + */ +static void +pop_node(struct nse* node) +{ + if (node_stack_cnt > 0) + { + node_stack_cnt--; + *node = node_stack[node_stack_cnt]; + } + LWIP_DEBUGF(SNMP_MIB_DEBUG,("pop_node() node=%p id=%"S32_F"\n",(void *)(node->r_ptr),node->r_id)); +} + +/** + * Conversion from ifIndex to lwIP netif + * @param ifindex is a s32_t object sub-identifier + * @param netif points to returned netif struct pointer + */ +void +snmp_ifindextonetif(s32_t ifindex, struct netif **netif) +{ + struct netif *nif = netif_list; + u16_t i, ifidx; + + ifidx = ifindex - 1; + i = 0; + while ((nif != NULL) && (i < ifidx)) + { + nif = nif->next; + i++; + } + *netif = nif; +} + +/** + * Conversion from lwIP netif to ifIndex + * @param netif points to a netif struct + * @param ifidx points to s32_t object sub-identifier + */ +void +snmp_netiftoifindex(struct netif *netif, s32_t *ifidx) +{ + struct netif *nif = netif_list; + u16_t i; + + i = 0; + while ((nif != NULL) && (nif != netif)) + { + nif = nif->next; + i++; + } + *ifidx = i+1; +} + +/** + * Conversion from oid to lwIP ip_addr + * @param ident points to s32_t ident[4] input + * @param ip points to output struct + */ +void +snmp_oidtoip(s32_t *ident, struct ip_addr *ip) +{ + u32_t ipa; + + ipa = ident[0]; + ipa <<= 8; + ipa |= ident[1]; + ipa <<= 8; + ipa |= ident[2]; + ipa <<= 8; + ipa |= ident[3]; + ip->addr = ipa; +} + +/** + * Conversion from lwIP ip_addr to oid + * @param ip points to input struct + * @param ident points to s32_t ident[4] output + */ +void +snmp_iptooid(struct ip_addr *ip, s32_t *ident) +{ + u32_t ipa; + + ipa = ip->addr; + ident[0] = (ipa >> 24) & 0xff; + ident[1] = (ipa >> 16) & 0xff; + ident[2] = (ipa >> 8) & 0xff; + ident[3] = ipa & 0xff; +} + +struct mib_list_node * +snmp_mib_ln_alloc(s32_t id) +{ + struct mib_list_node *ln; + + ln = (struct mib_list_node *)mem_malloc(sizeof(struct mib_list_node)); + if (ln != NULL) + { + ln->prev = NULL; + ln->next = NULL; + ln->objid = id; + ln->nptr = NULL; + } + return ln; +} + +void +snmp_mib_ln_free(struct mib_list_node *ln) +{ + mem_free(ln); +} + +struct mib_list_rootnode * +snmp_mib_lrn_alloc(void) +{ + struct mib_list_rootnode *lrn; + + lrn = (struct mib_list_rootnode*)mem_malloc(sizeof(struct mib_list_rootnode)); + if (lrn != NULL) + { + lrn->get_object_def = noleafs_get_object_def; + lrn->get_value = noleafs_get_value; + lrn->set_test = noleafs_set_test; + lrn->set_value = noleafs_set_value; + lrn->node_type = MIB_NODE_LR; + lrn->maxlength = 0; + lrn->head = NULL; + lrn->tail = NULL; + lrn->count = 0; + } + return lrn; +} + +void +snmp_mib_lrn_free(struct mib_list_rootnode *lrn) +{ + mem_free(lrn); +} + +/** + * Inserts node in idx list in a sorted + * (ascending order) fashion and + * allocates the node if needed. + * + * @param rn points to the root node + * @param objid is the object sub identifier + * @param insn points to a pointer to the inserted node + * used for constructing the tree. + * @return -1 if failed, 1 if inserted, 2 if present. + */ +s8_t +snmp_mib_node_insert(struct mib_list_rootnode *rn, s32_t objid, struct mib_list_node **insn) +{ + struct mib_list_node *nn; + s8_t insert; + + LWIP_ASSERT("rn != NULL",rn != NULL); + + /* -1 = malloc failure, 0 = not inserted, 1 = inserted, 2 = was present */ + insert = 0; + if (rn->head == NULL) + { + /* empty list, add first node */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("alloc empty list objid==%"S32_F"\n",objid)); + nn = snmp_mib_ln_alloc(objid); + if (nn != NULL) + { + rn->head = nn; + rn->tail = nn; + *insn = nn; + insert = 1; + } + else + { + insert = -1; + } + } + else + { + struct mib_list_node *n; + /* at least one node is present */ + n = rn->head; + while ((n != NULL) && (insert == 0)) + { + if (n->objid == objid) + { + /* node is already there */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("node already there objid==%"S32_F"\n",objid)); + *insn = n; + insert = 2; + } + else if (n->objid < objid) + { + if (n->next == NULL) + { + /* alloc and insert at the tail */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("alloc ins tail objid==%"S32_F"\n",objid)); + nn = snmp_mib_ln_alloc(objid); + if (nn != NULL) + { + nn->next = NULL; + nn->prev = n; + n->next = nn; + rn->tail = nn; + *insn = nn; + insert = 1; + } + else + { + /* insertion failure */ + insert = -1; + } + } + else + { + /* there's more to explore: traverse list */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("traverse list\n")); + n = n->next; + } + } + else + { + /* n->objid > objid */ + /* alloc and insert between n->prev and n */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("alloc ins n->prev, objid==%"S32_F", n\n",objid)); + nn = snmp_mib_ln_alloc(objid); + if (nn != NULL) + { + if (n->prev == NULL) + { + /* insert at the head */ + nn->next = n; + nn->prev = NULL; + rn->head = nn; + n->prev = nn; + } + else + { + /* insert in the middle */ + nn->next = n; + nn->prev = n->prev; + n->prev->next = nn; + n->prev = nn; + } + *insn = nn; + insert = 1; + } + else + { + /* insertion failure */ + insert = -1; + } + } + } + } + if (insert == 1) + { + rn->count += 1; + } + LWIP_ASSERT("insert != 0",insert != 0); + return insert; +} + +/** + * Finds node in idx list and returns deletion mark. + * + * @param rn points to the root node + * @param objid is the object sub identifier + * @param fn returns pointer to found node + * @return 0 if not found, 1 if deletable, + * 2 can't delete (2 or more children), 3 not a list_node + */ +s8_t +snmp_mib_node_find(struct mib_list_rootnode *rn, s32_t objid, struct mib_list_node **fn) +{ + s8_t fc; + struct mib_list_node *n; + + LWIP_ASSERT("rn != NULL",rn != NULL); + n = rn->head; + while ((n != NULL) && (n->objid != objid)) + { + n = n->next; + } + if (n == NULL) + { + fc = 0; + } + else if (n->nptr == NULL) + { + /* leaf, can delete node */ + fc = 1; + } + else + { + struct mib_list_rootnode *r; + + if (n->nptr->node_type == MIB_NODE_LR) + { + r = (struct mib_list_rootnode *)n->nptr; + if (r->count > 1) + { + /* can't delete node */ + fc = 2; + } + else + { + /* count <= 1, can delete node */ + fc = 1; + } + } + else + { + /* other node type */ + fc = 3; + } + } + *fn = n; + return fc; +} + +/** + * Removes node from idx list + * if it has a single child left. + * + * @param rn points to the root node + * @param n points to the node to delete + * @return the nptr to be freed by caller + */ +struct mib_list_rootnode * +snmp_mib_node_delete(struct mib_list_rootnode *rn, struct mib_list_node *n) +{ + struct mib_list_rootnode *next; + + LWIP_ASSERT("rn != NULL",rn != NULL); + LWIP_ASSERT("n != NULL",n != NULL); + + /* caller must remove this sub-tree */ + next = (struct mib_list_rootnode*)(n->nptr); + rn->count -= 1; + + if (n == rn->head) + { + rn->head = n->next; + if (n->next != NULL) + { + /* not last node, new list begin */ + n->next->prev = NULL; + } + } + else if (n == rn->tail) + { + rn->tail = n->prev; + if (n->prev != NULL) + { + /* not last node, new list end */ + n->prev->next = NULL; + } + } + else + { + /* node must be in the middle */ + n->prev->next = n->next; + n->next->prev = n->prev; + } + LWIP_DEBUGF(SNMP_MIB_DEBUG,("free list objid==%"S32_F"\n",n->objid)); + snmp_mib_ln_free(n); + if (rn->count == 0) + { + rn->head = NULL; + rn->tail = NULL; + } + return next; +} + + + +/** + * Searches tree for the supplied (scalar?) object identifier. + * + * @param node points to the root of the tree ('.internet') + * @param ident_len the length of the supplied object identifier + * @param ident points to the array of sub identifiers + * @param np points to the found object instance (rerurn) + * @return pointer to the requested parent (!) node if success, NULL otherwise + */ +struct mib_node * +snmp_search_tree(struct mib_node *node, u8_t ident_len, s32_t *ident, struct snmp_name_ptr *np) +{ + u8_t node_type, ext_level; + + ext_level = 0; + LWIP_DEBUGF(SNMP_MIB_DEBUG,("node==%p *ident==%"S32_F"\n",(void*)node,*ident)); + while (node != NULL) + { + node_type = node->node_type; + if ((node_type == MIB_NODE_AR) || (node_type == MIB_NODE_RA)) + { + struct mib_array_node *an; + u16_t i; + + if (ident_len > 0) + { + /* array node (internal ROM or RAM, fixed length) */ + an = (struct mib_array_node *)node; + i = 0; + while ((i < an->maxlength) && (an->objid[i] != *ident)) + { + i++; + } + if (i < an->maxlength) + { + /* found it, if available proceed to child, otherwise inspect leaf */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("an->objid[%"U16_F"]==%"S32_F" *ident==%"S32_F"\n",i,an->objid[i],*ident)); + if (an->nptr[i] == NULL) + { + /* a scalar leaf OR table, + inspect remaining instance number / table index */ + np->ident_len = ident_len; + np->ident = ident; + return (struct mib_node*)an; + } + else + { + /* follow next child pointer */ + ident++; + ident_len--; + node = an->nptr[i]; + } + } + else + { + /* search failed, identifier mismatch (nosuchname) */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("an search failed *ident==%"S32_F"\n",*ident)); + return NULL; + } + } + else + { + /* search failed, short object identifier (nosuchname) */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("an search failed, short object identifier\n")); + return NULL; + } + } + else if(node_type == MIB_NODE_LR) + { + struct mib_list_rootnode *lrn; + struct mib_list_node *ln; + + if (ident_len > 0) + { + /* list root node (internal 'RAM', variable length) */ + lrn = (struct mib_list_rootnode *)node; + ln = lrn->head; + /* iterate over list, head to tail */ + while ((ln != NULL) && (ln->objid != *ident)) + { + ln = ln->next; + } + if (ln != NULL) + { + /* found it, proceed to child */; + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ln->objid==%"S32_F" *ident==%"S32_F"\n",ln->objid,*ident)); + if (ln->nptr == NULL) + { + np->ident_len = ident_len; + np->ident = ident; + return (struct mib_node*)lrn; + } + else + { + /* follow next child pointer */ + ident_len--; + ident++; + node = ln->nptr; + } + } + else + { + /* search failed */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ln search failed *ident==%"S32_F"\n",*ident)); + return NULL; + } + } + else + { + /* search failed, short object identifier (nosuchname) */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ln search failed, short object identifier\n")); + return NULL; + } + } + else if(node_type == MIB_NODE_EX) + { + struct mib_external_node *en; + u16_t i, len; + + if (ident_len > 0) + { + /* external node (addressing and access via functions) */ + en = (struct mib_external_node *)node; + + i = 0; + len = en->level_length(en->addr_inf,ext_level); + while ((i < len) && (en->ident_cmp(en->addr_inf,ext_level,i,*ident) != 0)) + { + i++; + } + if (i < len) + { + s32_t debug_id; + + en->get_objid(en->addr_inf,ext_level,i,&debug_id); + LWIP_DEBUGF(SNMP_MIB_DEBUG,("en->objid==%"S32_F" *ident==%"S32_F"\n",debug_id,*ident)); + if ((ext_level + 1) == en->tree_levels) + { + np->ident_len = ident_len; + np->ident = ident; + return (struct mib_node*)en; + } + else + { + /* found it, proceed to child */ + ident_len--; + ident++; + ext_level++; + } + } + else + { + /* search failed */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("en search failed *ident==%"S32_F"\n",*ident)); + return NULL; + } + } + else + { + /* search failed, short object identifier (nosuchname) */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("en search failed, short object identifier\n")); + return NULL; + } + } + else if (node_type == MIB_NODE_SC) + { + mib_scalar_node *sn; + + sn = (mib_scalar_node *)node; + if ((ident_len == 1) && (*ident == 0)) + { + np->ident_len = ident_len; + np->ident = ident; + return (struct mib_node*)sn; + } + else + { + /* search failed, short object identifier (nosuchname) */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("search failed, invalid object identifier length\n")); + return NULL; + } + } + else + { + /* unknown node_type */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("search failed node_type %"U16_F" unkown\n",(u16_t)node_type)); + return NULL; + } + } + /* done, found nothing */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("search failed node==%p\n",(void*)node)); + return NULL; +} + +/** + * Test table for presence of at least one table entry. + */ +static u8_t +empty_table(struct mib_node *node) +{ + u8_t node_type; + u8_t empty = 0; + + if (node != NULL) + { + node_type = node->node_type; + if (node_type == MIB_NODE_LR) + { + struct mib_list_rootnode *lrn; + lrn = (struct mib_list_rootnode *)node; + if ((lrn->count == 0) || (lrn->head == NULL)) + { + empty = 1; + } + } + else if ((node_type == MIB_NODE_AR) || (node_type == MIB_NODE_RA)) + { + struct mib_array_node *an; + an = (struct mib_array_node *)node; + if ((an->maxlength == 0) || (an->nptr == NULL)) + { + empty = 1; + } + } + else if (node_type == MIB_NODE_EX) + { + struct mib_external_node *en; + en = (struct mib_external_node *)node; + if (en->tree_levels == 0) + { + empty = 1; + } + } + } + return empty; +} + +/** + * Tree expansion. + */ +struct mib_node * +snmp_expand_tree(struct mib_node *node, u8_t ident_len, s32_t *ident, struct snmp_obj_id *oidret) +{ + u8_t node_type, ext_level, climb_tree; + + ext_level = 0; + /* reset node stack */ + node_stack_cnt = 0; + while (node != NULL) + { + climb_tree = 0; + node_type = node->node_type; + if ((node_type == MIB_NODE_AR) || (node_type == MIB_NODE_RA)) + { + struct mib_array_node *an; + u16_t i; + + /* array node (internal ROM or RAM, fixed length) */ + an = (struct mib_array_node *)node; + if (ident_len > 0) + { + i = 0; + while ((i < an->maxlength) && (an->objid[i] < *ident)) + { + i++; + } + if (i < an->maxlength) + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("an->objid[%"U16_F"]==%"S32_F" *ident==%"S32_F"\n",i,an->objid[i],*ident)); + /* add identifier to oidret */ + oidret->id[oidret->len] = an->objid[i]; + (oidret->len)++; + + if (an->nptr[i] == NULL) + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("leaf node\n")); + /* leaf node (e.g. in a fixed size table) */ + if (an->objid[i] > *ident) + { + return (struct mib_node*)an; + } + else if ((i + 1) < an->maxlength) + { + /* an->objid[i] == *ident */ + (oidret->len)--; + oidret->id[oidret->len] = an->objid[i + 1]; + (oidret->len)++; + return (struct mib_node*)an; + } + else + { + /* (i + 1) == an->maxlength */ + (oidret->len)--; + climb_tree = 1; + } + } + else + { + u8_t j; + struct nse cur_node; + + LWIP_DEBUGF(SNMP_MIB_DEBUG,("non-leaf node\n")); + /* non-leaf, store right child ptr and id */ + j = i + 1; + while ((j < an->maxlength) && (empty_table(an->nptr[j]))) + { + j++; + } + if (j < an->maxlength) + { + cur_node.r_ptr = an->nptr[j]; + cur_node.r_id = an->objid[j]; + cur_node.r_nl = 0; + } + else + { + cur_node.r_ptr = NULL; + } + push_node(&cur_node); + if (an->objid[i] == *ident) + { + ident_len--; + ident++; + } + else + { + /* an->objid[i] < *ident */ + ident_len = 0; + } + /* follow next child pointer */ + node = an->nptr[i]; + } + } + else + { + /* i == an->maxlength */ + climb_tree = 1; + } + } + else + { + u8_t j; + /* ident_len == 0, complete with leftmost '.thing' */ + j = 0; + while ((j < an->maxlength) && empty_table(an->nptr[j])) + { + j++; + } + if (j < an->maxlength) + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("left an->objid[j]==%"S32_F"\n",an->objid[j])); + oidret->id[oidret->len] = an->objid[j]; + (oidret->len)++; + if (an->nptr[j] == NULL) + { + /* leaf node */ + return (struct mib_node*)an; + } + else + { + /* no leaf, continue */ + node = an->nptr[j]; + } + } + else + { + /* j == an->maxlength */ + climb_tree = 1; + } + } + } + else if(node_type == MIB_NODE_LR) + { + struct mib_list_rootnode *lrn; + struct mib_list_node *ln; + + /* list root node (internal 'RAM', variable length) */ + lrn = (struct mib_list_rootnode *)node; + if (ident_len > 0) + { + ln = lrn->head; + /* iterate over list, head to tail */ + while ((ln != NULL) && (ln->objid < *ident)) + { + ln = ln->next; + } + if (ln != NULL) + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("ln->objid==%"S32_F" *ident==%"S32_F"\n",ln->objid,*ident)); + oidret->id[oidret->len] = ln->objid; + (oidret->len)++; + if (ln->nptr == NULL) + { + /* leaf node */ + if (ln->objid > *ident) + { + return (struct mib_node*)lrn; + } + else if (ln->next != NULL) + { + /* ln->objid == *ident */ + (oidret->len)--; + oidret->id[oidret->len] = ln->next->objid; + (oidret->len)++; + return (struct mib_node*)lrn; + } + else + { + /* ln->next == NULL */ + (oidret->len)--; + climb_tree = 1; + } + } + else + { + struct mib_list_node *jn; + struct nse cur_node; + + /* non-leaf, store right child ptr and id */ + jn = ln->next; + while ((jn != NULL) && empty_table(jn->nptr)) + { + jn = jn->next; + } + if (jn != NULL) + { + cur_node.r_ptr = jn->nptr; + cur_node.r_id = jn->objid; + cur_node.r_nl = 0; + } + else + { + cur_node.r_ptr = NULL; + } + push_node(&cur_node); + if (ln->objid == *ident) + { + ident_len--; + ident++; + } + else + { + /* ln->objid < *ident */ + ident_len = 0; + } + /* follow next child pointer */ + node = ln->nptr; + } + + } + else + { + /* ln == NULL */ + climb_tree = 1; + } + } + else + { + struct mib_list_node *jn; + /* ident_len == 0, complete with leftmost '.thing' */ + jn = lrn->head; + while ((jn != NULL) && empty_table(jn->nptr)) + { + jn = jn->next; + } + if (jn != NULL) + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("left jn->objid==%"S32_F"\n",jn->objid)); + oidret->id[oidret->len] = jn->objid; + (oidret->len)++; + if (jn->nptr == NULL) + { + /* leaf node */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("jn->nptr == NULL\n")); + return (struct mib_node*)lrn; + } + else + { + /* no leaf, continue */ + node = jn->nptr; + } + } + else + { + /* jn == NULL */ + climb_tree = 1; + } + } + } + else if(node_type == MIB_NODE_EX) + { + struct mib_external_node *en; + s32_t ex_id; + + /* external node (addressing and access via functions) */ + en = (struct mib_external_node *)node; + if (ident_len > 0) + { + u16_t i, len; + + i = 0; + len = en->level_length(en->addr_inf,ext_level); + while ((i < len) && (en->ident_cmp(en->addr_inf,ext_level,i,*ident) < 0)) + { + i++; + } + if (i < len) + { + /* add identifier to oidret */ + en->get_objid(en->addr_inf,ext_level,i,&ex_id); + LWIP_DEBUGF(SNMP_MIB_DEBUG,("en->objid[%"U16_F"]==%"S32_F" *ident==%"S32_F"\n",i,ex_id,*ident)); + oidret->id[oidret->len] = ex_id; + (oidret->len)++; + + if ((ext_level + 1) == en->tree_levels) + { + LWIP_DEBUGF(SNMP_MIB_DEBUG,("leaf node\n")); + /* leaf node */ + if (ex_id > *ident) + { + return (struct mib_node*)en; + } + else if ((i + 1) < len) + { + /* ex_id == *ident */ + en->get_objid(en->addr_inf,ext_level,i + 1,&ex_id); + (oidret->len)--; + oidret->id[oidret->len] = ex_id; + (oidret->len)++; + return (struct mib_node*)en; + } + else + { + /* (i + 1) == len */ + (oidret->len)--; + climb_tree = 1; + } + } + else + { + u8_t j; + struct nse cur_node; + + LWIP_DEBUGF(SNMP_MIB_DEBUG,("non-leaf node\n")); + /* non-leaf, store right child ptr and id */ + j = i + 1; + if (j < len) + { + /* right node is the current external node */ + cur_node.r_ptr = node; + en->get_objid(en->addr_inf,ext_level,j,&cur_node.r_id); + cur_node.r_nl = ext_level + 1; + } + else + { + cur_node.r_ptr = NULL; + } + push_node(&cur_node); + if (en->ident_cmp(en->addr_inf,ext_level,i,*ident) == 0) + { + ident_len--; + ident++; + } + else + { + /* external id < *ident */ + ident_len = 0; + } + /* proceed to child */ + ext_level++; + } + } + else + { + /* i == len (en->level_len()) */ + climb_tree = 1; + } + } + else + { + /* ident_len == 0, complete with leftmost '.thing' */ + en->get_objid(en->addr_inf,ext_level,0,&ex_id); + LWIP_DEBUGF(SNMP_MIB_DEBUG,("left en->objid==%"S32_F"\n",ex_id)); + oidret->id[oidret->len] = ex_id; + (oidret->len)++; + if ((ext_level + 1) == en->tree_levels) + { + /* leaf node */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("(ext_level + 1) == en->tree_levels\n")); + return (struct mib_node*)en; + } + else + { + /* no leaf, proceed to child */ + ext_level++; + } + } + } + else if(node_type == MIB_NODE_SC) + { + mib_scalar_node *sn; + + /* scalar node */ + sn = (mib_scalar_node *)node; + if (ident_len > 0) + { + /* at .0 */ + climb_tree = 1; + } + else + { + /* ident_len == 0, complete object identifier */ + oidret->id[oidret->len] = 0; + (oidret->len)++; + /* leaf node */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("completed scalar leaf\n")); + return (struct mib_node*)sn; + } + } + else + { + /* unknown/unhandled node_type */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("expand failed node_type %"U16_F" unkown\n",(u16_t)node_type)); + return NULL; + } + + if (climb_tree) + { + struct nse child; + + /* find right child ptr */ + child.r_ptr = NULL; + child.r_id = 0; + child.r_nl = 0; + while ((node_stack_cnt > 0) && (child.r_ptr == NULL)) + { + pop_node(&child); + /* trim returned oid */ + (oidret->len)--; + } + if (child.r_ptr != NULL) + { + /* incoming ident is useless beyond this point */ + ident_len = 0; + oidret->id[oidret->len] = child.r_id; + oidret->len++; + node = child.r_ptr; + ext_level = child.r_nl; + } + else + { + /* tree ends here ... */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("expand failed, tree ends here\n")); + return NULL; + } + } + } + /* done, found nothing */ + LWIP_DEBUGF(SNMP_MIB_DEBUG,("expand failed node==%p\n",(void*)node)); + return NULL; +} + +/** + * Test object identifier for the iso.org.dod.internet prefix. + * + * @param ident_len the length of the supplied object identifier + * @param ident points to the array of sub identifiers + * @return 1 if it matches, 0 otherwise + */ +u8_t +snmp_iso_prefix_tst(u8_t ident_len, s32_t *ident) +{ + if ((ident_len > 3) && + (ident[0] == 1) && (ident[1] == 3) && + (ident[2] == 6) && (ident[3] == 1)) + { + return 1; + } + else + { + return 0; + } +} + +/** + * Expands object identifier to the iso.org.dod.internet + * prefix for use in getnext operation. + * + * @param ident_len the length of the supplied object identifier + * @param ident points to the array of sub identifiers + * @param oidret points to returned expanded object identifier + * @return 1 if it matches, 0 otherwise + * + * @note ident_len 0 is allowed, expanding to the first known object id!! + */ +u8_t +snmp_iso_prefix_expand(u8_t ident_len, s32_t *ident, struct snmp_obj_id *oidret) +{ + const s32_t *prefix_ptr; + s32_t *ret_ptr; + u8_t i; + + i = 0; + prefix_ptr = &prefix[0]; + ret_ptr = &oidret->id[0]; + ident_len = ((ident_len < 4)?ident_len:4); + while ((i < ident_len) && ((*ident) <= (*prefix_ptr))) + { + *ret_ptr++ = *prefix_ptr++; + ident++; + i++; + } + if (i == ident_len) + { + /* match, complete missing bits */ + while (i < 4) + { + *ret_ptr++ = *prefix_ptr++; + i++; + } + oidret->len = i; + return 1; + } + else + { + /* i != ident_len */ + return 0; + } +} + +#endif /* LWIP_SNMP */ diff --git a/bertos/net/lwip/src/core/snmp/msg_in.c b/bertos/net/lwip/src/core/snmp/msg_in.c new file mode 100644 index 0000000..d0c3c75 --- /dev/null +++ b/bertos/net/lwip/src/core/snmp/msg_in.c @@ -0,0 +1,1454 @@ +/** + * @file + * SNMP input message processing (RFC1157). + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#include "lwip/opt.h" + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/ip_addr.h" +#include "lwip/mem.h" +#include "lwip/udp.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "lwip/snmp_asn1.h" +#include "lwip/snmp_msg.h" +#include "lwip/snmp_structs.h" + +#include + +/* public (non-static) constants */ +/** SNMP v1 == 0 */ +const s32_t snmp_version = 0; +/** default SNMP community string */ +const char snmp_publiccommunity[7] = "public"; + +/* statically allocated buffers for SNMP_CONCURRENT_REQUESTS */ +struct snmp_msg_pstat msg_input_list[SNMP_CONCURRENT_REQUESTS]; +/* UDP Protocol Control Block */ +struct udp_pcb *snmp1_pcb; + +static void snmp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port); +static err_t snmp_pdu_header_check(struct pbuf *p, u16_t ofs, u16_t pdu_len, u16_t *ofs_ret, struct snmp_msg_pstat *m_stat); +static err_t snmp_pdu_dec_varbindlist(struct pbuf *p, u16_t ofs, u16_t *ofs_ret, struct snmp_msg_pstat *m_stat); + + +/** + * Starts SNMP Agent. + * Allocates UDP pcb and binds it to IP_ADDR_ANY port 161. + */ +void +snmp_init(void) +{ + struct snmp_msg_pstat *msg_ps; + u8_t i; + + snmp1_pcb = udp_new(); + if (snmp1_pcb != NULL) + { + udp_recv(snmp1_pcb, snmp_recv, (void *)SNMP_IN_PORT); + udp_bind(snmp1_pcb, IP_ADDR_ANY, SNMP_IN_PORT); + } + msg_ps = &msg_input_list[0]; + for (i=0; istate = SNMP_MSG_EMPTY; + msg_ps->error_index = 0; + msg_ps->error_status = SNMP_ES_NOERROR; + msg_ps++; + } + trap_msg.pcb = snmp1_pcb; + /* The coldstart trap will only be output + if our outgoing interface is up & configured */ + snmp_coldstart_trap(); +} + +static void +snmp_error_response(struct snmp_msg_pstat *msg_ps, u8_t error) +{ + snmp_varbind_list_free(&msg_ps->outvb); + msg_ps->outvb = msg_ps->invb; + msg_ps->invb.head = NULL; + msg_ps->invb.tail = NULL; + msg_ps->invb.count = 0; + msg_ps->error_status = error; + msg_ps->error_index = 1 + msg_ps->vb_idx; + snmp_send_response(msg_ps); + snmp_varbind_list_free(&msg_ps->outvb); + msg_ps->state = SNMP_MSG_EMPTY; +} + +static void +snmp_ok_response(struct snmp_msg_pstat *msg_ps) +{ + err_t err_ret; + + err_ret = snmp_send_response(msg_ps); + if (err_ret == ERR_MEM) + { + /* serious memory problem, can't return tooBig */ + } + else + { + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_msg_event = %"S32_F"\n",msg_ps->error_status)); + } + /* free varbinds (if available) */ + snmp_varbind_list_free(&msg_ps->invb); + snmp_varbind_list_free(&msg_ps->outvb); + msg_ps->state = SNMP_MSG_EMPTY; +} + +/** + * Service an internal or external event for SNMP GET. + * + * @param request_id identifies requests from 0 to (SNMP_CONCURRENT_REQUESTS-1) + * @param msg_ps points to the assosicated message process state + */ +static void +snmp_msg_get_event(u8_t request_id, struct snmp_msg_pstat *msg_ps) +{ + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_msg_get_event: msg_ps->state==%"U16_F"\n",(u16_t)msg_ps->state)); + + if (msg_ps->state == SNMP_MSG_EXTERNAL_GET_OBJDEF) + { + struct mib_external_node *en; + struct snmp_name_ptr np; + + /* get_object_def() answer*/ + en = msg_ps->ext_mib_node; + np = msg_ps->ext_name_ptr; + + /* translate answer into a known lifeform */ + en->get_object_def_a(request_id, np.ident_len, np.ident, &msg_ps->ext_object_def); + if (msg_ps->ext_object_def.instance != MIB_OBJECT_NONE) + { + msg_ps->state = SNMP_MSG_EXTERNAL_GET_VALUE; + en->get_value_q(request_id, &msg_ps->ext_object_def); + } + else + { + en->get_object_def_pc(request_id, np.ident_len, np.ident); + /* search failed, object id points to unknown object (nosuchname) */ + snmp_error_response(msg_ps,SNMP_ES_NOSUCHNAME); + } + } + else if (msg_ps->state == SNMP_MSG_EXTERNAL_GET_VALUE) + { + struct mib_external_node *en; + struct snmp_varbind *vb; + + /* get_value() answer */ + en = msg_ps->ext_mib_node; + + /* allocate output varbind */ + vb = (struct snmp_varbind *)mem_malloc(sizeof(struct snmp_varbind)); + LWIP_ASSERT("vb != NULL",vb != NULL); + if (vb != NULL) + { + vb->next = NULL; + vb->prev = NULL; + + /* move name from invb to outvb */ + vb->ident = msg_ps->vb_ptr->ident; + vb->ident_len = msg_ps->vb_ptr->ident_len; + /* ensure this memory is refereced once only */ + msg_ps->vb_ptr->ident = NULL; + msg_ps->vb_ptr->ident_len = 0; + + vb->value_type = msg_ps->ext_object_def.asn_type; + vb->value_len = msg_ps->ext_object_def.v_len; + if (vb->value_len > 0) + { + vb->value = mem_malloc(vb->value_len); + LWIP_ASSERT("vb->value != NULL",vb->value != NULL); + if (vb->value != NULL) + { + en->get_value_a(request_id, &msg_ps->ext_object_def, vb->value_len, vb->value); + snmp_varbind_tail_add(&msg_ps->outvb, vb); + /* search again (if vb_idx < msg_ps->invb.count) */ + msg_ps->state = SNMP_MSG_SEARCH_OBJ; + msg_ps->vb_idx += 1; + } + else + { + en->get_value_pc(request_id, &msg_ps->ext_object_def); + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_msg_event: no variable space\n")); + msg_ps->vb_ptr->ident = vb->ident; + msg_ps->vb_ptr->ident_len = vb->ident_len; + mem_free(vb); + snmp_error_response(msg_ps,SNMP_ES_TOOBIG); + } + } + else + { + /* vb->value_len == 0, empty value (e.g. empty string) */ + en->get_value_a(request_id, &msg_ps->ext_object_def, 0, NULL); + vb->value = NULL; + snmp_varbind_tail_add(&msg_ps->outvb, vb); + /* search again (if vb_idx < msg_ps->invb.count) */ + msg_ps->state = SNMP_MSG_SEARCH_OBJ; + msg_ps->vb_idx += 1; + } + } + else + { + en->get_value_pc(request_id, &msg_ps->ext_object_def); + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_msg_event: no outvb space\n")); + snmp_error_response(msg_ps,SNMP_ES_TOOBIG); + } + } + + while ((msg_ps->state == SNMP_MSG_SEARCH_OBJ) && + (msg_ps->vb_idx < msg_ps->invb.count)) + { + struct mib_node *mn; + struct snmp_name_ptr np; + + if (msg_ps->vb_idx == 0) + { + msg_ps->vb_ptr = msg_ps->invb.head; + } + else + { + msg_ps->vb_ptr = msg_ps->vb_ptr->next; + } + /** test object identifier for .iso.org.dod.internet prefix */ + if (snmp_iso_prefix_tst(msg_ps->vb_ptr->ident_len, msg_ps->vb_ptr->ident)) + { + mn = snmp_search_tree((struct mib_node*)&internet, msg_ps->vb_ptr->ident_len - 4, + msg_ps->vb_ptr->ident + 4, &np); + if (mn != NULL) + { + if (mn->node_type == MIB_NODE_EX) + { + /* external object */ + struct mib_external_node *en = (struct mib_external_node*)mn; + + msg_ps->state = SNMP_MSG_EXTERNAL_GET_OBJDEF; + /* save en && args in msg_ps!! */ + msg_ps->ext_mib_node = en; + msg_ps->ext_name_ptr = np; + + en->get_object_def_q(en->addr_inf, request_id, np.ident_len, np.ident); + } + else + { + /* internal object */ + struct obj_def object_def; + + msg_ps->state = SNMP_MSG_INTERNAL_GET_OBJDEF; + mn->get_object_def(np.ident_len, np.ident, &object_def); + if (object_def.instance != MIB_OBJECT_NONE) + { + mn = mn; + } + else + { + /* search failed, object id points to unknown object (nosuchname) */ + mn = NULL; + } + if (mn != NULL) + { + struct snmp_varbind *vb; + + msg_ps->state = SNMP_MSG_INTERNAL_GET_VALUE; + /* allocate output varbind */ + vb = (struct snmp_varbind *)mem_malloc(sizeof(struct snmp_varbind)); + LWIP_ASSERT("vb != NULL",vb != NULL); + if (vb != NULL) + { + vb->next = NULL; + vb->prev = NULL; + + /* move name from invb to outvb */ + vb->ident = msg_ps->vb_ptr->ident; + vb->ident_len = msg_ps->vb_ptr->ident_len; + /* ensure this memory is refereced once only */ + msg_ps->vb_ptr->ident = NULL; + msg_ps->vb_ptr->ident_len = 0; + + vb->value_type = object_def.asn_type; + vb->value_len = object_def.v_len; + if (vb->value_len > 0) + { + vb->value = mem_malloc(vb->value_len); + LWIP_ASSERT("vb->value != NULL",vb->value != NULL); + if (vb->value != NULL) + { + mn->get_value(&object_def, vb->value_len, vb->value); + snmp_varbind_tail_add(&msg_ps->outvb, vb); + msg_ps->state = SNMP_MSG_SEARCH_OBJ; + msg_ps->vb_idx += 1; + } + else + { + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_msg_event: couldn't allocate variable space\n")); + msg_ps->vb_ptr->ident = vb->ident; + msg_ps->vb_ptr->ident_len = vb->ident_len; + mem_free(vb); + snmp_error_response(msg_ps,SNMP_ES_TOOBIG); + } + } + else + { + /* vb->value_len == 0, empty value (e.g. empty string) */ + vb->value = NULL; + snmp_varbind_tail_add(&msg_ps->outvb, vb); + msg_ps->state = SNMP_MSG_SEARCH_OBJ; + msg_ps->vb_idx += 1; + } + } + else + { + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_msg_event: couldn't allocate outvb space\n")); + snmp_error_response(msg_ps,SNMP_ES_TOOBIG); + } + } + } + } + } + else + { + mn = NULL; + } + if (mn == NULL) + { + /* mn == NULL, noSuchName */ + snmp_error_response(msg_ps,SNMP_ES_NOSUCHNAME); + } + } + if ((msg_ps->state == SNMP_MSG_SEARCH_OBJ) && + (msg_ps->vb_idx == msg_ps->invb.count)) + { + snmp_ok_response(msg_ps); + } +} + +/** + * Service an internal or external event for SNMP GETNEXT. + * + * @param request_id identifies requests from 0 to (SNMP_CONCURRENT_REQUESTS-1) + * @param msg_ps points to the assosicated message process state + */ +static void +snmp_msg_getnext_event(u8_t request_id, struct snmp_msg_pstat *msg_ps) +{ + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_msg_getnext_event: msg_ps->state==%"U16_F"\n",(u16_t)msg_ps->state)); + + if (msg_ps->state == SNMP_MSG_EXTERNAL_GET_OBJDEF) + { + struct mib_external_node *en; + + /* get_object_def() answer*/ + en = msg_ps->ext_mib_node; + + /* translate answer into a known lifeform */ + en->get_object_def_a(request_id, 1, &msg_ps->ext_oid.id[msg_ps->ext_oid.len - 1], &msg_ps->ext_object_def); + if (msg_ps->ext_object_def.instance != MIB_OBJECT_NONE) + { + msg_ps->state = SNMP_MSG_EXTERNAL_GET_VALUE; + en->get_value_q(request_id, &msg_ps->ext_object_def); + } + else + { + en->get_object_def_pc(request_id, 1, &msg_ps->ext_oid.id[msg_ps->ext_oid.len - 1]); + /* search failed, object id points to unknown object (nosuchname) */ + snmp_error_response(msg_ps,SNMP_ES_NOSUCHNAME); + } + } + else if (msg_ps->state == SNMP_MSG_EXTERNAL_GET_VALUE) + { + struct mib_external_node *en; + struct snmp_varbind *vb; + + /* get_value() answer */ + en = msg_ps->ext_mib_node; + + vb = snmp_varbind_alloc(&msg_ps->ext_oid, + msg_ps->ext_object_def.asn_type, + msg_ps->ext_object_def.v_len); + if (vb != NULL) + { + en->get_value_a(request_id, &msg_ps->ext_object_def, vb->value_len, vb->value); + snmp_varbind_tail_add(&msg_ps->outvb, vb); + msg_ps->state = SNMP_MSG_SEARCH_OBJ; + msg_ps->vb_idx += 1; + } + else + { + en->get_value_pc(request_id, &msg_ps->ext_object_def); + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_msg_getnext_event: couldn't allocate outvb space\n")); + snmp_error_response(msg_ps,SNMP_ES_TOOBIG); + } + } + + while ((msg_ps->state == SNMP_MSG_SEARCH_OBJ) && + (msg_ps->vb_idx < msg_ps->invb.count)) + { + struct mib_node *mn; + struct snmp_obj_id oid; + + if (msg_ps->vb_idx == 0) + { + msg_ps->vb_ptr = msg_ps->invb.head; + } + else + { + msg_ps->vb_ptr = msg_ps->vb_ptr->next; + } + if (snmp_iso_prefix_expand(msg_ps->vb_ptr->ident_len, msg_ps->vb_ptr->ident, &oid)) + { + if (msg_ps->vb_ptr->ident_len > 3) + { + /* can offset ident_len and ident */ + mn = snmp_expand_tree((struct mib_node*)&internet, + msg_ps->vb_ptr->ident_len - 4, + msg_ps->vb_ptr->ident + 4, &oid); + } + else + { + /* can't offset ident_len -4, ident + 4 */ + mn = snmp_expand_tree((struct mib_node*)&internet, 0, NULL, &oid); + } + } + else + { + mn = NULL; + } + if (mn != NULL) + { + if (mn->node_type == MIB_NODE_EX) + { + /* external object */ + struct mib_external_node *en = (struct mib_external_node*)mn; + + msg_ps->state = SNMP_MSG_EXTERNAL_GET_OBJDEF; + /* save en && args in msg_ps!! */ + msg_ps->ext_mib_node = en; + msg_ps->ext_oid = oid; + + en->get_object_def_q(en->addr_inf, request_id, 1, &oid.id[oid.len - 1]); + } + else + { + /* internal object */ + struct obj_def object_def; + struct snmp_varbind *vb; + + msg_ps->state = SNMP_MSG_INTERNAL_GET_OBJDEF; + mn->get_object_def(1, &oid.id[oid.len - 1], &object_def); + + vb = snmp_varbind_alloc(&oid, object_def.asn_type, object_def.v_len); + if (vb != NULL) + { + msg_ps->state = SNMP_MSG_INTERNAL_GET_VALUE; + mn->get_value(&object_def, object_def.v_len, vb->value); + snmp_varbind_tail_add(&msg_ps->outvb, vb); + msg_ps->state = SNMP_MSG_SEARCH_OBJ; + msg_ps->vb_idx += 1; + } + else + { + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_recv couldn't allocate outvb space\n")); + snmp_error_response(msg_ps,SNMP_ES_TOOBIG); + } + } + } + if (mn == NULL) + { + /* mn == NULL, noSuchName */ + snmp_error_response(msg_ps,SNMP_ES_NOSUCHNAME); + } + } + if ((msg_ps->state == SNMP_MSG_SEARCH_OBJ) && + (msg_ps->vb_idx == msg_ps->invb.count)) + { + snmp_ok_response(msg_ps); + } +} + +/** + * Service an internal or external event for SNMP SET. + * + * @param request_id identifies requests from 0 to (SNMP_CONCURRENT_REQUESTS-1) + * @param msg_ps points to the assosicated message process state + */ +static void +snmp_msg_set_event(u8_t request_id, struct snmp_msg_pstat *msg_ps) +{ + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_msg_set_event: msg_ps->state==%"U16_F"\n",(u16_t)msg_ps->state)); + + if (msg_ps->state == SNMP_MSG_EXTERNAL_GET_OBJDEF) + { + struct mib_external_node *en; + struct snmp_name_ptr np; + + /* get_object_def() answer*/ + en = msg_ps->ext_mib_node; + np = msg_ps->ext_name_ptr; + + /* translate answer into a known lifeform */ + en->get_object_def_a(request_id, np.ident_len, np.ident, &msg_ps->ext_object_def); + if (msg_ps->ext_object_def.instance != MIB_OBJECT_NONE) + { + msg_ps->state = SNMP_MSG_EXTERNAL_SET_TEST; + en->set_test_q(request_id, &msg_ps->ext_object_def); + } + else + { + en->get_object_def_pc(request_id, np.ident_len, np.ident); + /* search failed, object id points to unknown object (nosuchname) */ + snmp_error_response(msg_ps,SNMP_ES_NOSUCHNAME); + } + } + else if (msg_ps->state == SNMP_MSG_EXTERNAL_SET_TEST) + { + struct mib_external_node *en; + + /* set_test() answer*/ + en = msg_ps->ext_mib_node; + + if (msg_ps->ext_object_def.access == MIB_OBJECT_READ_WRITE) + { + if ((msg_ps->ext_object_def.asn_type == msg_ps->vb_ptr->value_type) && + (en->set_test_a(request_id,&msg_ps->ext_object_def, + msg_ps->vb_ptr->value_len,msg_ps->vb_ptr->value) != 0)) + { + msg_ps->state = SNMP_MSG_SEARCH_OBJ; + msg_ps->vb_idx += 1; + } + else + { + en->set_test_pc(request_id,&msg_ps->ext_object_def); + /* bad value */ + snmp_error_response(msg_ps,SNMP_ES_BADVALUE); + } + } + else + { + en->set_test_pc(request_id,&msg_ps->ext_object_def); + /* object not available for set */ + snmp_error_response(msg_ps,SNMP_ES_NOSUCHNAME); + } + } + else if (msg_ps->state == SNMP_MSG_EXTERNAL_GET_OBJDEF_S) + { + struct mib_external_node *en; + struct snmp_name_ptr np; + + /* get_object_def() answer*/ + en = msg_ps->ext_mib_node; + np = msg_ps->ext_name_ptr; + + /* translate answer into a known lifeform */ + en->get_object_def_a(request_id, np.ident_len, np.ident, &msg_ps->ext_object_def); + if (msg_ps->ext_object_def.instance != MIB_OBJECT_NONE) + { + msg_ps->state = SNMP_MSG_EXTERNAL_SET_VALUE; + en->set_value_q(request_id, &msg_ps->ext_object_def, + msg_ps->vb_ptr->value_len,msg_ps->vb_ptr->value); + } + else + { + en->get_object_def_pc(request_id, np.ident_len, np.ident); + /* set_value failed, object has disappeared for some odd reason?? */ + snmp_error_response(msg_ps,SNMP_ES_GENERROR); + } + } + else if (msg_ps->state == SNMP_MSG_EXTERNAL_SET_VALUE) + { + struct mib_external_node *en; + + /** set_value_a() */ + en = msg_ps->ext_mib_node; + en->set_value_a(request_id, &msg_ps->ext_object_def, + msg_ps->vb_ptr->value_len, msg_ps->vb_ptr->value); + + /** @todo use set_value_pc() if toobig */ + msg_ps->state = SNMP_MSG_INTERNAL_SET_VALUE; + msg_ps->vb_idx += 1; + } + + /* test all values before setting */ + while ((msg_ps->state == SNMP_MSG_SEARCH_OBJ) && + (msg_ps->vb_idx < msg_ps->invb.count)) + { + struct mib_node *mn; + struct snmp_name_ptr np; + + if (msg_ps->vb_idx == 0) + { + msg_ps->vb_ptr = msg_ps->invb.head; + } + else + { + msg_ps->vb_ptr = msg_ps->vb_ptr->next; + } + /** test object identifier for .iso.org.dod.internet prefix */ + if (snmp_iso_prefix_tst(msg_ps->vb_ptr->ident_len, msg_ps->vb_ptr->ident)) + { + mn = snmp_search_tree((struct mib_node*)&internet, msg_ps->vb_ptr->ident_len - 4, + msg_ps->vb_ptr->ident + 4, &np); + if (mn != NULL) + { + if (mn->node_type == MIB_NODE_EX) + { + /* external object */ + struct mib_external_node *en = (struct mib_external_node*)mn; + + msg_ps->state = SNMP_MSG_EXTERNAL_GET_OBJDEF; + /* save en && args in msg_ps!! */ + msg_ps->ext_mib_node = en; + msg_ps->ext_name_ptr = np; + + en->get_object_def_q(en->addr_inf, request_id, np.ident_len, np.ident); + } + else + { + /* internal object */ + struct obj_def object_def; + + msg_ps->state = SNMP_MSG_INTERNAL_GET_OBJDEF; + mn->get_object_def(np.ident_len, np.ident, &object_def); + if (object_def.instance != MIB_OBJECT_NONE) + { + mn = mn; + } + else + { + /* search failed, object id points to unknown object (nosuchname) */ + mn = NULL; + } + if (mn != NULL) + { + msg_ps->state = SNMP_MSG_INTERNAL_SET_TEST; + + if (object_def.access == MIB_OBJECT_READ_WRITE) + { + if ((object_def.asn_type == msg_ps->vb_ptr->value_type) && + (mn->set_test(&object_def,msg_ps->vb_ptr->value_len,msg_ps->vb_ptr->value) != 0)) + { + msg_ps->state = SNMP_MSG_SEARCH_OBJ; + msg_ps->vb_idx += 1; + } + else + { + /* bad value */ + snmp_error_response(msg_ps,SNMP_ES_BADVALUE); + } + } + else + { + /* object not available for set */ + snmp_error_response(msg_ps,SNMP_ES_NOSUCHNAME); + } + } + } + } + } + else + { + mn = NULL; + } + if (mn == NULL) + { + /* mn == NULL, noSuchName */ + snmp_error_response(msg_ps,SNMP_ES_NOSUCHNAME); + } + } + + if ((msg_ps->state == SNMP_MSG_SEARCH_OBJ) && + (msg_ps->vb_idx == msg_ps->invb.count)) + { + msg_ps->vb_idx = 0; + msg_ps->state = SNMP_MSG_INTERNAL_SET_VALUE; + } + + /* set all values "atomically" (be as "atomic" as possible) */ + while ((msg_ps->state == SNMP_MSG_INTERNAL_SET_VALUE) && + (msg_ps->vb_idx < msg_ps->invb.count)) + { + struct mib_node *mn; + struct snmp_name_ptr np; + + if (msg_ps->vb_idx == 0) + { + msg_ps->vb_ptr = msg_ps->invb.head; + } + else + { + msg_ps->vb_ptr = msg_ps->vb_ptr->next; + } + /* skip iso prefix test, was done previously while settesting() */ + mn = snmp_search_tree((struct mib_node*)&internet, msg_ps->vb_ptr->ident_len - 4, + msg_ps->vb_ptr->ident + 4, &np); + /* check if object is still available + (e.g. external hot-plug thingy present?) */ + if (mn != NULL) + { + if (mn->node_type == MIB_NODE_EX) + { + /* external object */ + struct mib_external_node *en = (struct mib_external_node*)mn; + + msg_ps->state = SNMP_MSG_EXTERNAL_GET_OBJDEF_S; + /* save en && args in msg_ps!! */ + msg_ps->ext_mib_node = en; + msg_ps->ext_name_ptr = np; + + en->get_object_def_q(en->addr_inf, request_id, np.ident_len, np.ident); + } + else + { + /* internal object */ + struct obj_def object_def; + + msg_ps->state = SNMP_MSG_INTERNAL_GET_OBJDEF_S; + mn->get_object_def(np.ident_len, np.ident, &object_def); + msg_ps->state = SNMP_MSG_INTERNAL_SET_VALUE; + mn->set_value(&object_def,msg_ps->vb_ptr->value_len,msg_ps->vb_ptr->value); + msg_ps->vb_idx += 1; + } + } + } + if ((msg_ps->state == SNMP_MSG_INTERNAL_SET_VALUE) && + (msg_ps->vb_idx == msg_ps->invb.count)) + { + /* simply echo the input if we can set it + @todo do we need to return the actual value? + e.g. if value is silently modified or behaves sticky? */ + msg_ps->outvb = msg_ps->invb; + msg_ps->invb.head = NULL; + msg_ps->invb.tail = NULL; + msg_ps->invb.count = 0; + snmp_ok_response(msg_ps); + } +} + + +/** + * Handle one internal or external event. + * Called for one async event. (recv external/private answer) + * + * @param request_id identifies requests from 0 to (SNMP_CONCURRENT_REQUESTS-1) + */ +void +snmp_msg_event(u8_t request_id) +{ + struct snmp_msg_pstat *msg_ps; + + if (request_id < SNMP_CONCURRENT_REQUESTS) + { + msg_ps = &msg_input_list[request_id]; + if (msg_ps->rt == SNMP_ASN1_PDU_GET_NEXT_REQ) + { + snmp_msg_getnext_event(request_id, msg_ps); + } + else if (msg_ps->rt == SNMP_ASN1_PDU_GET_REQ) + { + snmp_msg_get_event(request_id, msg_ps); + } + else if(msg_ps->rt == SNMP_ASN1_PDU_SET_REQ) + { + snmp_msg_set_event(request_id, msg_ps); + } + } +} + + +/* lwIP UDP receive callback function */ +static void +snmp_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port) +{ + struct udp_hdr *udphdr; + + /* suppress unused argument warning */ + LWIP_UNUSED_ARG(arg); + /* peek in the UDP header (goto IP payload) */ + if(pbuf_header(p, UDP_HLEN)){ + LWIP_ASSERT("Can't move to UDP header", 0); + pbuf_free(p); + return; + } + udphdr = p->payload; + + /* check if datagram is really directed at us (including broadcast requests) */ + if ((pcb == snmp1_pcb) && (ntohs(udphdr->dest) == SNMP_IN_PORT)) + { + struct snmp_msg_pstat *msg_ps; + u8_t req_idx; + + /* traverse input message process list, look for SNMP_MSG_EMPTY */ + msg_ps = &msg_input_list[0]; + req_idx = 0; + while ((req_idxstate != SNMP_MSG_EMPTY)) + { + req_idx++; + msg_ps++; + } + if (req_idx != SNMP_CONCURRENT_REQUESTS) + { + err_t err_ret; + u16_t payload_len; + u16_t payload_ofs; + u16_t varbind_ofs = 0; + + /* accepting request */ + snmp_inc_snmpinpkts(); + /* record used 'protocol control block' */ + msg_ps->pcb = pcb; + /* source address (network order) */ + msg_ps->sip = *addr; + /* source port (host order (lwIP oddity)) */ + msg_ps->sp = port; + /* read UDP payload length from UDP header */ + payload_len = ntohs(udphdr->len) - UDP_HLEN; + + /* adjust to UDP payload */ + payload_ofs = UDP_HLEN; + + /* check total length, version, community, pdu type */ + err_ret = snmp_pdu_header_check(p, payload_ofs, payload_len, &varbind_ofs, msg_ps); + if (((msg_ps->rt == SNMP_ASN1_PDU_GET_REQ) || + (msg_ps->rt == SNMP_ASN1_PDU_GET_NEXT_REQ) || + (msg_ps->rt == SNMP_ASN1_PDU_SET_REQ)) && + ((msg_ps->error_status == SNMP_ES_NOERROR) && + (msg_ps->error_index == 0)) ) + { + /* Only accept requests and requests without error (be robust) */ + err_ret = err_ret; + } + else + { + /* Reject response and trap headers or error requests as input! */ + err_ret = ERR_ARG; + } + if (err_ret == ERR_OK) + { + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_recv ok, community %s\n", msg_ps->community)); + + /* Builds a list of variable bindings. Copy the varbinds from the pbuf + chain to glue them when these are divided over two or more pbuf's. */ + err_ret = snmp_pdu_dec_varbindlist(p, varbind_ofs, &varbind_ofs, msg_ps); + if ((err_ret == ERR_OK) && (msg_ps->invb.count > 0)) + { + /* we've decoded the incoming message, release input msg now */ + pbuf_free(p); + + msg_ps->error_status = SNMP_ES_NOERROR; + msg_ps->error_index = 0; + /* find object for each variable binding */ + msg_ps->state = SNMP_MSG_SEARCH_OBJ; + /* first variable binding from list to inspect */ + msg_ps->vb_idx = 0; + + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_recv varbind cnt=%"U16_F"\n",(u16_t)msg_ps->invb.count)); + + /* handle input event and as much objects as possible in one go */ + snmp_msg_event(req_idx); + } + else + { + /* varbind-list decode failed, or varbind list empty. + drop request silently, do not return error! + (errors are only returned for a specific varbind failure) */ + pbuf_free(p); + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_pdu_dec_varbindlist() failed\n")); + } + } + else + { + /* header check failed + drop request silently, do not return error! */ + pbuf_free(p); + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_pdu_header_check() failed\n")); + } + } + else + { + /* exceeding number of concurrent requests */ + pbuf_free(p); + } + } + else + { + /* datagram not for us */ + pbuf_free(p); + } +} + +/** + * Checks and decodes incoming SNMP message header, logs header errors. + * + * @param p points to pbuf chain of SNMP message (UDP payload) + * @param ofs points to first octet of SNMP message + * @param pdu_len the length of the UDP payload + * @param ofs_ret returns the ofset of the variable bindings + * @param m_stat points to the current message request state return + * @return + * - ERR_OK SNMP header is sane and accepted + * - ERR_ARG SNMP header is either malformed or rejected + */ +static err_t +snmp_pdu_header_check(struct pbuf *p, u16_t ofs, u16_t pdu_len, u16_t *ofs_ret, struct snmp_msg_pstat *m_stat) +{ + err_t derr; + u16_t len, ofs_base; + u8_t len_octets; + u8_t type; + s32_t version; + + ofs_base = ofs; + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if ((derr != ERR_OK) || + (pdu_len != (1 + len_octets + len)) || + (type != (SNMP_ASN1_UNIV | SNMP_ASN1_CONSTR | SNMP_ASN1_SEQ))) + { + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + ofs += (1 + len_octets); + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if ((derr != ERR_OK) || (type != (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG))) + { + /* can't decode or no integer (version) */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + derr = snmp_asn1_dec_s32t(p, ofs + 1 + len_octets, len, &version); + if (derr != ERR_OK) + { + /* can't decode */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + if (version != 0) + { + /* not version 1 */ + snmp_inc_snmpinbadversions(); + return ERR_ARG; + } + ofs += (1 + len_octets + len); + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if ((derr != ERR_OK) || (type != (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR))) + { + /* can't decode or no octet string (community) */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + derr = snmp_asn1_dec_raw(p, ofs + 1 + len_octets, len, SNMP_COMMUNITY_STR_LEN, m_stat->community); + if (derr != ERR_OK) + { + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + /* add zero terminator */ + len = ((len < (SNMP_COMMUNITY_STR_LEN))?(len):(SNMP_COMMUNITY_STR_LEN)); + m_stat->community[len] = 0; + m_stat->com_strlen = len; + if (strncmp(snmp_publiccommunity, (const char*)m_stat->community, SNMP_COMMUNITY_STR_LEN) != 0) + { + /** @todo: move this if we need to check more names */ + snmp_inc_snmpinbadcommunitynames(); + snmp_authfail_trap(); + return ERR_ARG; + } + ofs += (1 + len_octets + len); + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if (derr != ERR_OK) + { + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + switch(type) + { + case (SNMP_ASN1_CONTXT | SNMP_ASN1_CONSTR | SNMP_ASN1_PDU_GET_REQ): + /* GetRequest PDU */ + snmp_inc_snmpingetrequests(); + derr = ERR_OK; + break; + case (SNMP_ASN1_CONTXT | SNMP_ASN1_CONSTR | SNMP_ASN1_PDU_GET_NEXT_REQ): + /* GetNextRequest PDU */ + snmp_inc_snmpingetnexts(); + derr = ERR_OK; + break; + case (SNMP_ASN1_CONTXT | SNMP_ASN1_CONSTR | SNMP_ASN1_PDU_GET_RESP): + /* GetResponse PDU */ + snmp_inc_snmpingetresponses(); + derr = ERR_ARG; + break; + case (SNMP_ASN1_CONTXT | SNMP_ASN1_CONSTR | SNMP_ASN1_PDU_SET_REQ): + /* SetRequest PDU */ + snmp_inc_snmpinsetrequests(); + derr = ERR_OK; + break; + case (SNMP_ASN1_CONTXT | SNMP_ASN1_CONSTR | SNMP_ASN1_PDU_TRAP): + /* Trap PDU */ + snmp_inc_snmpintraps(); + derr = ERR_ARG; + break; + default: + snmp_inc_snmpinasnparseerrs(); + derr = ERR_ARG; + break; + } + if (derr != ERR_OK) + { + /* unsupported input PDU for this agent (no parse error) */ + return ERR_ARG; + } + m_stat->rt = type & 0x1F; + ofs += (1 + len_octets); + if (len != (pdu_len - (ofs - ofs_base))) + { + /* decoded PDU length does not equal actual payload length */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if ((derr != ERR_OK) || (type != (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG))) + { + /* can't decode or no integer (request ID) */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + derr = snmp_asn1_dec_s32t(p, ofs + 1 + len_octets, len, &m_stat->rid); + if (derr != ERR_OK) + { + /* can't decode */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + ofs += (1 + len_octets + len); + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if ((derr != ERR_OK) || (type != (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG))) + { + /* can't decode or no integer (error-status) */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + /* must be noError (0) for incoming requests. + log errors for mib-2 completeness and for debug purposes */ + derr = snmp_asn1_dec_s32t(p, ofs + 1 + len_octets, len, &m_stat->error_status); + if (derr != ERR_OK) + { + /* can't decode */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + switch (m_stat->error_status) + { + case SNMP_ES_TOOBIG: + snmp_inc_snmpintoobigs(); + break; + case SNMP_ES_NOSUCHNAME: + snmp_inc_snmpinnosuchnames(); + break; + case SNMP_ES_BADVALUE: + snmp_inc_snmpinbadvalues(); + break; + case SNMP_ES_READONLY: + snmp_inc_snmpinreadonlys(); + break; + case SNMP_ES_GENERROR: + snmp_inc_snmpingenerrs(); + break; + } + ofs += (1 + len_octets + len); + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if ((derr != ERR_OK) || (type != (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG))) + { + /* can't decode or no integer (error-index) */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + /* must be 0 for incoming requests. + decode anyway to catch bad integers (and dirty tricks) */ + derr = snmp_asn1_dec_s32t(p, ofs + 1 + len_octets, len, &m_stat->error_index); + if (derr != ERR_OK) + { + /* can't decode */ + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + ofs += (1 + len_octets + len); + *ofs_ret = ofs; + return ERR_OK; +} + +static err_t +snmp_pdu_dec_varbindlist(struct pbuf *p, u16_t ofs, u16_t *ofs_ret, struct snmp_msg_pstat *m_stat) +{ + err_t derr; + u16_t len, vb_len; + u8_t len_octets; + u8_t type; + + /* variable binding list */ + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &vb_len); + if ((derr != ERR_OK) || + (type != (SNMP_ASN1_UNIV | SNMP_ASN1_CONSTR | SNMP_ASN1_SEQ))) + { + snmp_inc_snmpinasnparseerrs(); + return ERR_ARG; + } + ofs += (1 + len_octets); + + /* start with empty list */ + m_stat->invb.count = 0; + m_stat->invb.head = NULL; + m_stat->invb.tail = NULL; + + while (vb_len > 0) + { + struct snmp_obj_id oid, oid_value; + struct snmp_varbind *vb; + + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if ((derr != ERR_OK) || + (type != (SNMP_ASN1_UNIV | SNMP_ASN1_CONSTR | SNMP_ASN1_SEQ)) || + (len == 0) || (len > vb_len)) + { + snmp_inc_snmpinasnparseerrs(); + /* free varbinds (if available) */ + snmp_varbind_list_free(&m_stat->invb); + return ERR_ARG; + } + ofs += (1 + len_octets); + vb_len -= (1 + len_octets); + + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if ((derr != ERR_OK) || (type != (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OBJ_ID))) + { + /* can't decode object name length */ + snmp_inc_snmpinasnparseerrs(); + /* free varbinds (if available) */ + snmp_varbind_list_free(&m_stat->invb); + return ERR_ARG; + } + derr = snmp_asn1_dec_oid(p, ofs + 1 + len_octets, len, &oid); + if (derr != ERR_OK) + { + /* can't decode object name */ + snmp_inc_snmpinasnparseerrs(); + /* free varbinds (if available) */ + snmp_varbind_list_free(&m_stat->invb); + return ERR_ARG; + } + ofs += (1 + len_octets + len); + vb_len -= (1 + len_octets + len); + + snmp_asn1_dec_type(p, ofs, &type); + derr = snmp_asn1_dec_length(p, ofs+1, &len_octets, &len); + if (derr != ERR_OK) + { + /* can't decode object value length */ + snmp_inc_snmpinasnparseerrs(); + /* free varbinds (if available) */ + snmp_varbind_list_free(&m_stat->invb); + return ERR_ARG; + } + + switch (type) + { + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG): + vb = snmp_varbind_alloc(&oid, type, sizeof(s32_t)); + if (vb != NULL) + { + s32_t *vptr = vb->value; + + derr = snmp_asn1_dec_s32t(p, ofs + 1 + len_octets, len, vptr); + snmp_varbind_tail_add(&m_stat->invb, vb); + } + else + { + derr = ERR_ARG; + } + break; + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_COUNTER): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_GAUGE): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_TIMETICKS): + vb = snmp_varbind_alloc(&oid, type, sizeof(u32_t)); + if (vb != NULL) + { + u32_t *vptr = vb->value; + + derr = snmp_asn1_dec_u32t(p, ofs + 1 + len_octets, len, vptr); + snmp_varbind_tail_add(&m_stat->invb, vb); + } + else + { + derr = ERR_ARG; + } + break; + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_OPAQUE): + vb = snmp_varbind_alloc(&oid, type, len); + if (vb != NULL) + { + derr = snmp_asn1_dec_raw(p, ofs + 1 + len_octets, len, vb->value_len, vb->value); + snmp_varbind_tail_add(&m_stat->invb, vb); + } + else + { + derr = ERR_ARG; + } + break; + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_NUL): + vb = snmp_varbind_alloc(&oid, type, 0); + if (vb != NULL) + { + snmp_varbind_tail_add(&m_stat->invb, vb); + derr = ERR_OK; + } + else + { + derr = ERR_ARG; + } + break; + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OBJ_ID): + derr = snmp_asn1_dec_oid(p, ofs + 1 + len_octets, len, &oid_value); + if (derr == ERR_OK) + { + vb = snmp_varbind_alloc(&oid, type, oid_value.len * sizeof(s32_t)); + if (vb != NULL) + { + u8_t i = oid_value.len; + s32_t *vptr = vb->value; + + while(i > 0) + { + i--; + vptr[i] = oid_value.id[i]; + } + snmp_varbind_tail_add(&m_stat->invb, vb); + derr = ERR_OK; + } + else + { + derr = ERR_ARG; + } + } + break; + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR): + if (len == 4) + { + /* must be exactly 4 octets! */ + vb = snmp_varbind_alloc(&oid, type, 4); + if (vb != NULL) + { + derr = snmp_asn1_dec_raw(p, ofs + 1 + len_octets, len, vb->value_len, vb->value); + snmp_varbind_tail_add(&m_stat->invb, vb); + } + else + { + derr = ERR_ARG; + } + } + else + { + derr = ERR_ARG; + } + break; + default: + derr = ERR_ARG; + break; + } + if (derr != ERR_OK) + { + snmp_inc_snmpinasnparseerrs(); + /* free varbinds (if available) */ + snmp_varbind_list_free(&m_stat->invb); + return ERR_ARG; + } + ofs += (1 + len_octets + len); + vb_len -= (1 + len_octets + len); + } + + if (m_stat->rt == SNMP_ASN1_PDU_SET_REQ) + { + snmp_add_snmpintotalsetvars(m_stat->invb.count); + } + else + { + snmp_add_snmpintotalreqvars(m_stat->invb.count); + } + + *ofs_ret = ofs; + return ERR_OK; +} + +struct snmp_varbind* +snmp_varbind_alloc(struct snmp_obj_id *oid, u8_t type, u8_t len) +{ + struct snmp_varbind *vb; + + vb = (struct snmp_varbind *)mem_malloc(sizeof(struct snmp_varbind)); + LWIP_ASSERT("vb != NULL",vb != NULL); + if (vb != NULL) + { + u8_t i; + + vb->next = NULL; + vb->prev = NULL; + i = oid->len; + vb->ident_len = i; + if (i > 0) + { + /* allocate array of s32_t for our object identifier */ + vb->ident = (s32_t*)mem_malloc(sizeof(s32_t) * i); + LWIP_ASSERT("vb->ident != NULL",vb->ident != NULL); + if (vb->ident == NULL) + { + mem_free(vb); + return NULL; + } + while(i > 0) + { + i--; + vb->ident[i] = oid->id[i]; + } + } + else + { + /* i == 0, pass zero length object identifier */ + vb->ident = NULL; + } + vb->value_type = type; + vb->value_len = len; + if (len > 0) + { + /* allocate raw bytes for our object value */ + vb->value = mem_malloc(len); + LWIP_ASSERT("vb->value != NULL",vb->value != NULL); + if (vb->value == NULL) + { + if (vb->ident != NULL) + { + mem_free(vb->ident); + } + mem_free(vb); + return NULL; + } + } + else + { + /* ASN1_NUL type, or zero length ASN1_OC_STR */ + vb->value = NULL; + } + } + return vb; +} + +void +snmp_varbind_free(struct snmp_varbind *vb) +{ + if (vb->value != NULL ) + { + mem_free(vb->value); + } + if (vb->ident != NULL ) + { + mem_free(vb->ident); + } + mem_free(vb); +} + +void +snmp_varbind_list_free(struct snmp_varbind_root *root) +{ + struct snmp_varbind *vb, *prev; + + vb = root->tail; + while ( vb != NULL ) + { + prev = vb->prev; + snmp_varbind_free(vb); + vb = prev; + } + root->count = 0; + root->head = NULL; + root->tail = NULL; +} + +void +snmp_varbind_tail_add(struct snmp_varbind_root *root, struct snmp_varbind *vb) +{ + if (root->count == 0) + { + /* add first varbind to list */ + root->head = vb; + root->tail = vb; + } + else + { + /* add nth varbind to list tail */ + root->tail->next = vb; + vb->prev = root->tail; + root->tail = vb; + } + root->count += 1; +} + +struct snmp_varbind* +snmp_varbind_tail_remove(struct snmp_varbind_root *root) +{ + struct snmp_varbind* vb; + + if (root->count > 0) + { + /* remove tail varbind */ + vb = root->tail; + root->tail = vb->prev; + vb->prev->next = NULL; + root->count -= 1; + } + else + { + /* nothing to remove */ + vb = NULL; + } + return vb; +} + +#endif /* LWIP_SNMP */ diff --git a/bertos/net/lwip/src/core/snmp/msg_out.c b/bertos/net/lwip/src/core/snmp/msg_out.c new file mode 100644 index 0000000..b705aac --- /dev/null +++ b/bertos/net/lwip/src/core/snmp/msg_out.c @@ -0,0 +1,683 @@ +/** + * @file + * SNMP output message processing (RFC1157). + * + * Output responses and traps are build in two passes: + * + * Pass 0: iterate over the output message backwards to determine encoding lengths + * Pass 1: the actual forward encoding of internal form into ASN1 + * + * The single-pass encoding method described by Comer & Stevens + * requires extra buffer space and copying for reversal of the packet. + * The buffer requirement can be prohibitively large for big payloads + * (>= 484) therefore we use the two encoding passes. + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#include "lwip/opt.h" + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/udp.h" +#include "lwip/netif.h" +#include "lwip/snmp.h" +#include "lwip/snmp_asn1.h" +#include "lwip/snmp_msg.h" + +struct snmp_trap_dst +{ + /* destination IP address in network order */ + struct ip_addr dip; + /* set to 0 when disabled, >0 when enabled */ + u8_t enable; +}; +struct snmp_trap_dst trap_dst[SNMP_TRAP_DESTINATIONS]; + +/** TRAP message structure */ +struct snmp_msg_trap trap_msg; + +static u16_t snmp_resp_header_sum(struct snmp_msg_pstat *m_stat, u16_t vb_len); +static u16_t snmp_trap_header_sum(struct snmp_msg_trap *m_trap, u16_t vb_len); +static u16_t snmp_varbind_list_sum(struct snmp_varbind_root *root); + +static u16_t snmp_resp_header_enc(struct snmp_msg_pstat *m_stat, struct pbuf *p); +static u16_t snmp_trap_header_enc(struct snmp_msg_trap *m_trap, struct pbuf *p); +static u16_t snmp_varbind_list_enc(struct snmp_varbind_root *root, struct pbuf *p, u16_t ofs); + +/** + * Sets enable switch for this trap destination. + * @param dst_idx index in 0 .. SNMP_TRAP_DESTINATIONS-1 + * @param enable switch if 0 destination is disabled >0 enabled. + */ +void +snmp_trap_dst_enable(u8_t dst_idx, u8_t enable) +{ + if (dst_idx < SNMP_TRAP_DESTINATIONS) + { + trap_dst[dst_idx].enable = enable; + } +} + +/** + * Sets IPv4 address for this trap destination. + * @param dst_idx index in 0 .. SNMP_TRAP_DESTINATIONS-1 + * @param dst IPv4 address in host order. + */ +void +snmp_trap_dst_ip_set(u8_t dst_idx, struct ip_addr *dst) +{ + if (dst_idx < SNMP_TRAP_DESTINATIONS) + { + trap_dst[dst_idx].dip.addr = htonl(dst->addr); + } +} + +/** + * Sends a 'getresponse' message to the request originator. + * + * @param m_stat points to the current message request state source + * @return ERR_OK when success, ERR_MEM if we're out of memory + * + * @note the caller is responsible for filling in outvb in the m_stat + * and provide error-status and index (except for tooBig errors) ... + */ +err_t +snmp_send_response(struct snmp_msg_pstat *m_stat) +{ + struct snmp_varbind_root emptyvb = {NULL, NULL, 0, 0, 0}; + struct pbuf *p; + u16_t tot_len; + err_t err; + + /* pass 0, calculate length fields */ + tot_len = snmp_varbind_list_sum(&m_stat->outvb); + tot_len = snmp_resp_header_sum(m_stat, tot_len); + + /* try allocating pbuf(s) for complete response */ + p = pbuf_alloc(PBUF_TRANSPORT, tot_len, PBUF_POOL); + if (p == NULL) + { + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_snd_response() tooBig\n")); + + /* can't construct reply, return error-status tooBig */ + m_stat->error_status = SNMP_ES_TOOBIG; + m_stat->error_index = 0; + /* pass 0, recalculate lengths, for empty varbind-list */ + tot_len = snmp_varbind_list_sum(&emptyvb); + tot_len = snmp_resp_header_sum(m_stat, tot_len); + /* retry allocation once for header and empty varbind-list */ + p = pbuf_alloc(PBUF_TRANSPORT, tot_len, PBUF_POOL); + } + if (p != NULL) + { + /* first pbuf alloc try or retry alloc success */ + u16_t ofs; + + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_snd_response() p != NULL\n")); + + /* pass 1, size error, encode packet ino the pbuf(s) */ + ofs = snmp_resp_header_enc(m_stat, p); + if (m_stat->error_status == SNMP_ES_TOOBIG) + { + snmp_varbind_list_enc(&emptyvb, p, ofs); + } + else + { + snmp_varbind_list_enc(&m_stat->outvb, p, ofs); + } + + switch (m_stat->error_status) + { + case SNMP_ES_TOOBIG: + snmp_inc_snmpouttoobigs(); + break; + case SNMP_ES_NOSUCHNAME: + snmp_inc_snmpoutnosuchnames(); + break; + case SNMP_ES_BADVALUE: + snmp_inc_snmpoutbadvalues(); + break; + case SNMP_ES_GENERROR: + snmp_inc_snmpoutgenerrs(); + break; + } + snmp_inc_snmpoutgetresponses(); + snmp_inc_snmpoutpkts(); + + /** @todo do we need separate rx and tx pcbs for threaded case? */ + /** connect to the originating source */ + udp_connect(m_stat->pcb, &m_stat->sip, m_stat->sp); + err = udp_send(m_stat->pcb, p); + if (err == ERR_MEM) + { + /** @todo release some memory, retry and return tooBig? tooMuchHassle? */ + err = ERR_MEM; + } + else + { + err = ERR_OK; + } + /** disassociate remote address and port with this pcb */ + udp_disconnect(m_stat->pcb); + + pbuf_free(p); + LWIP_DEBUGF(SNMP_MSG_DEBUG, ("snmp_snd_response() done\n")); + return err; + } + else + { + /* first pbuf alloc try or retry alloc failed + very low on memory, couldn't return tooBig */ + return ERR_MEM; + } +} + + +/** + * Sends an generic or enterprise specific trap message. + * + * @param generic_trap is the trap code + * @param eoid points to enterprise object identifier + * @param specific_trap used for enterprise traps when generic_trap == 6 + * @return ERR_OK when success, ERR_MEM if we're out of memory + * + * @note the caller is responsible for filling in outvb in the trap_msg + * @note the use of the enterpise identifier field + * is per RFC1215. + * Use .iso.org.dod.internet.mgmt.mib-2.snmp for generic traps + * and .iso.org.dod.internet.private.enterprises.yourenterprise + * (sysObjectID) for specific traps. + */ +err_t +snmp_send_trap(s8_t generic_trap, struct snmp_obj_id *eoid, s32_t specific_trap) +{ + struct snmp_trap_dst *td; + struct netif *dst_if; + struct ip_addr dst_ip; + struct pbuf *p; + u16_t i,tot_len; + + for (i=0, td = &trap_dst[0]; ienable != 0) && (td->dip.addr != 0)) + { + /* network order trap destination */ + trap_msg.dip.addr = td->dip.addr; + /* lookup current source address for this dst */ + dst_if = ip_route(&td->dip); + dst_ip.addr = ntohl(dst_if->ip_addr.addr); + trap_msg.sip_raw[0] = dst_ip.addr >> 24; + trap_msg.sip_raw[1] = dst_ip.addr >> 16; + trap_msg.sip_raw[2] = dst_ip.addr >> 8; + trap_msg.sip_raw[3] = dst_ip.addr; + trap_msg.gen_trap = generic_trap; + trap_msg.spc_trap = specific_trap; + if (generic_trap == SNMP_GENTRAP_ENTERPRISESPC) + { + /* enterprise-Specific trap */ + trap_msg.enterprise = eoid; + } + else + { + /* generic (MIB-II) trap */ + snmp_get_snmpgrpid_ptr(&trap_msg.enterprise); + } + snmp_get_sysuptime(&trap_msg.ts); + + /* pass 0, calculate length fields */ + tot_len = snmp_varbind_list_sum(&trap_msg.outvb); + tot_len = snmp_trap_header_sum(&trap_msg, tot_len); + + /* allocate pbuf(s) */ + p = pbuf_alloc(PBUF_TRANSPORT, tot_len, PBUF_POOL); + if (p != NULL) + { + u16_t ofs; + + /* pass 1, encode packet ino the pbuf(s) */ + ofs = snmp_trap_header_enc(&trap_msg, p); + snmp_varbind_list_enc(&trap_msg.outvb, p, ofs); + + snmp_inc_snmpouttraps(); + snmp_inc_snmpoutpkts(); + + /** connect to the TRAP destination */ + udp_connect(trap_msg.pcb, &trap_msg.dip, SNMP_TRAP_PORT); + udp_send(trap_msg.pcb, p); + /** disassociate remote address and port with this pcb */ + udp_disconnect(trap_msg.pcb); + + pbuf_free(p); + } + else + { + return ERR_MEM; + } + } + } + return ERR_OK; +} + +void +snmp_coldstart_trap(void) +{ + trap_msg.outvb.head = NULL; + trap_msg.outvb.tail = NULL; + trap_msg.outvb.count = 0; + snmp_send_trap(SNMP_GENTRAP_COLDSTART, NULL, 0); +} + +void +snmp_authfail_trap(void) +{ + u8_t enable; + snmp_get_snmpenableauthentraps(&enable); + if (enable == 1) + { + trap_msg.outvb.head = NULL; + trap_msg.outvb.tail = NULL; + trap_msg.outvb.count = 0; + snmp_send_trap(SNMP_GENTRAP_AUTHFAIL, NULL, 0); + } +} + +/** + * Sums response header field lengths from tail to head and + * returns resp_header_lengths for second encoding pass. + * + * @param vb_len varbind-list length + * @param rhl points to returned header lengths + * @return the required lenght for encoding the response header + */ +static u16_t +snmp_resp_header_sum(struct snmp_msg_pstat *m_stat, u16_t vb_len) +{ + u16_t tot_len; + struct snmp_resp_header_lengths *rhl; + + rhl = &m_stat->rhl; + tot_len = vb_len; + snmp_asn1_enc_s32t_cnt(m_stat->error_index, &rhl->erridxlen); + snmp_asn1_enc_length_cnt(rhl->erridxlen, &rhl->erridxlenlen); + tot_len += 1 + rhl->erridxlenlen + rhl->erridxlen; + + snmp_asn1_enc_s32t_cnt(m_stat->error_status, &rhl->errstatlen); + snmp_asn1_enc_length_cnt(rhl->errstatlen, &rhl->errstatlenlen); + tot_len += 1 + rhl->errstatlenlen + rhl->errstatlen; + + snmp_asn1_enc_s32t_cnt(m_stat->rid, &rhl->ridlen); + snmp_asn1_enc_length_cnt(rhl->ridlen, &rhl->ridlenlen); + tot_len += 1 + rhl->ridlenlen + rhl->ridlen; + + rhl->pdulen = tot_len; + snmp_asn1_enc_length_cnt(rhl->pdulen, &rhl->pdulenlen); + tot_len += 1 + rhl->pdulenlen; + + rhl->comlen = m_stat->com_strlen; + snmp_asn1_enc_length_cnt(rhl->comlen, &rhl->comlenlen); + tot_len += 1 + rhl->comlenlen + rhl->comlen; + + snmp_asn1_enc_s32t_cnt(snmp_version, &rhl->verlen); + snmp_asn1_enc_length_cnt(rhl->verlen, &rhl->verlenlen); + tot_len += 1 + rhl->verlen + rhl->verlenlen; + + rhl->seqlen = tot_len; + snmp_asn1_enc_length_cnt(rhl->seqlen, &rhl->seqlenlen); + tot_len += 1 + rhl->seqlenlen; + + return tot_len; +} + +/** + * Sums trap header field lengths from tail to head and + * returns trap_header_lengths for second encoding pass. + * + * @param vb_len varbind-list length + * @param thl points to returned header lengths + * @return the required lenght for encoding the trap header + */ +static u16_t +snmp_trap_header_sum(struct snmp_msg_trap *m_trap, u16_t vb_len) +{ + u16_t tot_len; + struct snmp_trap_header_lengths *thl; + + thl = &m_trap->thl; + tot_len = vb_len; + + snmp_asn1_enc_u32t_cnt(m_trap->ts, &thl->tslen); + snmp_asn1_enc_length_cnt(thl->tslen, &thl->tslenlen); + tot_len += 1 + thl->tslen + thl->tslenlen; + + snmp_asn1_enc_s32t_cnt(m_trap->spc_trap, &thl->strplen); + snmp_asn1_enc_length_cnt(thl->strplen, &thl->strplenlen); + tot_len += 1 + thl->strplen + thl->strplenlen; + + snmp_asn1_enc_s32t_cnt(m_trap->gen_trap, &thl->gtrplen); + snmp_asn1_enc_length_cnt(thl->gtrplen, &thl->gtrplenlen); + tot_len += 1 + thl->gtrplen + thl->gtrplenlen; + + thl->aaddrlen = 4; + snmp_asn1_enc_length_cnt(thl->aaddrlen, &thl->aaddrlenlen); + tot_len += 1 + thl->aaddrlen + thl->aaddrlenlen; + + snmp_asn1_enc_oid_cnt(m_trap->enterprise->len, &m_trap->enterprise->id[0], &thl->eidlen); + snmp_asn1_enc_length_cnt(thl->eidlen, &thl->eidlenlen); + tot_len += 1 + thl->eidlen + thl->eidlenlen; + + thl->pdulen = tot_len; + snmp_asn1_enc_length_cnt(thl->pdulen, &thl->pdulenlen); + tot_len += 1 + thl->pdulenlen; + + thl->comlen = sizeof(snmp_publiccommunity) - 1; + snmp_asn1_enc_length_cnt(thl->comlen, &thl->comlenlen); + tot_len += 1 + thl->comlenlen + thl->comlen; + + snmp_asn1_enc_s32t_cnt(snmp_version, &thl->verlen); + snmp_asn1_enc_length_cnt(thl->verlen, &thl->verlenlen); + tot_len += 1 + thl->verlen + thl->verlenlen; + + thl->seqlen = tot_len; + snmp_asn1_enc_length_cnt(thl->seqlen, &thl->seqlenlen); + tot_len += 1 + thl->seqlenlen; + + return tot_len; +} + +/** + * Sums varbind lengths from tail to head and + * annotates lengths in varbind for second encoding pass. + * + * @param root points to the root of the variable binding list + * @return the required lenght for encoding the variable bindings + */ +static u16_t +snmp_varbind_list_sum(struct snmp_varbind_root *root) +{ + struct snmp_varbind *vb; + u32_t *uint_ptr; + s32_t *sint_ptr; + u16_t tot_len; + + tot_len = 0; + vb = root->tail; + while ( vb != NULL ) + { + /* encoded value lenght depends on type */ + switch (vb->value_type) + { + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG): + sint_ptr = vb->value; + snmp_asn1_enc_s32t_cnt(*sint_ptr, &vb->vlen); + break; + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_COUNTER): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_GAUGE): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_TIMETICKS): + uint_ptr = vb->value; + snmp_asn1_enc_u32t_cnt(*uint_ptr, &vb->vlen); + break; + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR): + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_NUL): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_OPAQUE): + vb->vlen = vb->value_len; + break; + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OBJ_ID): + sint_ptr = vb->value; + snmp_asn1_enc_oid_cnt(vb->value_len / sizeof(s32_t), sint_ptr, &vb->vlen); + break; + default: + /* unsupported type */ + vb->vlen = 0; + break; + }; + /* encoding length of value length field */ + snmp_asn1_enc_length_cnt(vb->vlen, &vb->vlenlen); + snmp_asn1_enc_oid_cnt(vb->ident_len, vb->ident, &vb->olen); + snmp_asn1_enc_length_cnt(vb->olen, &vb->olenlen); + + vb->seqlen = 1 + vb->vlenlen + vb->vlen; + vb->seqlen += 1 + vb->olenlen + vb->olen; + snmp_asn1_enc_length_cnt(vb->seqlen, &vb->seqlenlen); + + /* varbind seq */ + tot_len += 1 + vb->seqlenlen + vb->seqlen; + + vb = vb->prev; + } + + /* varbind-list seq */ + root->seqlen = tot_len; + snmp_asn1_enc_length_cnt(root->seqlen, &root->seqlenlen); + tot_len += 1 + root->seqlenlen; + + return tot_len; +} + +/** + * Encodes response header from head to tail. + */ +static u16_t +snmp_resp_header_enc(struct snmp_msg_pstat *m_stat, struct pbuf *p) +{ + u16_t ofs; + + ofs = 0; + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_CONSTR | SNMP_ASN1_SEQ)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_stat->rhl.seqlen); + ofs += m_stat->rhl.seqlenlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_stat->rhl.verlen); + ofs += m_stat->rhl.verlenlen; + snmp_asn1_enc_s32t(p, ofs, m_stat->rhl.verlen, snmp_version); + ofs += m_stat->rhl.verlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_stat->rhl.comlen); + ofs += m_stat->rhl.comlenlen; + snmp_asn1_enc_raw(p, ofs, m_stat->rhl.comlen, m_stat->community); + ofs += m_stat->rhl.comlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_CONTXT | SNMP_ASN1_CONSTR | SNMP_ASN1_PDU_GET_RESP)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_stat->rhl.pdulen); + ofs += m_stat->rhl.pdulenlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_stat->rhl.ridlen); + ofs += m_stat->rhl.ridlenlen; + snmp_asn1_enc_s32t(p, ofs, m_stat->rhl.ridlen, m_stat->rid); + ofs += m_stat->rhl.ridlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_stat->rhl.errstatlen); + ofs += m_stat->rhl.errstatlenlen; + snmp_asn1_enc_s32t(p, ofs, m_stat->rhl.errstatlen, m_stat->error_status); + ofs += m_stat->rhl.errstatlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_stat->rhl.erridxlen); + ofs += m_stat->rhl.erridxlenlen; + snmp_asn1_enc_s32t(p, ofs, m_stat->rhl.erridxlen, m_stat->error_index); + ofs += m_stat->rhl.erridxlen; + + return ofs; +} + +/** + * Encodes trap header from head to tail. + */ +static u16_t +snmp_trap_header_enc(struct snmp_msg_trap *m_trap, struct pbuf *p) +{ + u16_t ofs; + + ofs = 0; + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_CONSTR | SNMP_ASN1_SEQ)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_trap->thl.seqlen); + ofs += m_trap->thl.seqlenlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_trap->thl.verlen); + ofs += m_trap->thl.verlenlen; + snmp_asn1_enc_s32t(p, ofs, m_trap->thl.verlen, snmp_version); + ofs += m_trap->thl.verlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_trap->thl.comlen); + ofs += m_trap->thl.comlenlen; + snmp_asn1_enc_raw(p, ofs, m_trap->thl.comlen, (u8_t *)&snmp_publiccommunity[0]); + ofs += m_trap->thl.comlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_CONTXT | SNMP_ASN1_CONSTR | SNMP_ASN1_PDU_TRAP)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_trap->thl.pdulen); + ofs += m_trap->thl.pdulenlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OBJ_ID)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_trap->thl.eidlen); + ofs += m_trap->thl.eidlenlen; + snmp_asn1_enc_oid(p, ofs, m_trap->enterprise->len, &m_trap->enterprise->id[0]); + ofs += m_trap->thl.eidlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_trap->thl.aaddrlen); + ofs += m_trap->thl.aaddrlenlen; + snmp_asn1_enc_raw(p, ofs, m_trap->thl.aaddrlen, &m_trap->sip_raw[0]); + ofs += m_trap->thl.aaddrlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_trap->thl.gtrplen); + ofs += m_trap->thl.gtrplenlen; + snmp_asn1_enc_u32t(p, ofs, m_trap->thl.gtrplen, m_trap->gen_trap); + ofs += m_trap->thl.gtrplen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_trap->thl.strplen); + ofs += m_trap->thl.strplenlen; + snmp_asn1_enc_u32t(p, ofs, m_trap->thl.strplen, m_trap->spc_trap); + ofs += m_trap->thl.strplen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_TIMETICKS)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, m_trap->thl.tslen); + ofs += m_trap->thl.tslenlen; + snmp_asn1_enc_u32t(p, ofs, m_trap->thl.tslen, m_trap->ts); + ofs += m_trap->thl.tslen; + + return ofs; +} + +/** + * Encodes varbind list from head to tail. + */ +static u16_t +snmp_varbind_list_enc(struct snmp_varbind_root *root, struct pbuf *p, u16_t ofs) +{ + struct snmp_varbind *vb; + s32_t *sint_ptr; + u32_t *uint_ptr; + u8_t *raw_ptr; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_CONSTR | SNMP_ASN1_SEQ)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, root->seqlen); + ofs += root->seqlenlen; + + vb = root->head; + while ( vb != NULL ) + { + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_CONSTR | SNMP_ASN1_SEQ)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, vb->seqlen); + ofs += vb->seqlenlen; + + snmp_asn1_enc_type(p, ofs, (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OBJ_ID)); + ofs += 1; + snmp_asn1_enc_length(p, ofs, vb->olen); + ofs += vb->olenlen; + snmp_asn1_enc_oid(p, ofs, vb->ident_len, &vb->ident[0]); + ofs += vb->olen; + + snmp_asn1_enc_type(p, ofs, vb->value_type); + ofs += 1; + snmp_asn1_enc_length(p, ofs, vb->vlen); + ofs += vb->vlenlen; + + switch (vb->value_type) + { + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_INTEG): + sint_ptr = vb->value; + snmp_asn1_enc_s32t(p, ofs, vb->vlen, *sint_ptr); + break; + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_COUNTER): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_GAUGE): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_TIMETICKS): + uint_ptr = vb->value; + snmp_asn1_enc_u32t(p, ofs, vb->vlen, *uint_ptr); + break; + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OC_STR): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_IPADDR): + case (SNMP_ASN1_APPLIC | SNMP_ASN1_PRIMIT | SNMP_ASN1_OPAQUE): + raw_ptr = vb->value; + snmp_asn1_enc_raw(p, ofs, vb->vlen, raw_ptr); + break; + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_NUL): + break; + case (SNMP_ASN1_UNIV | SNMP_ASN1_PRIMIT | SNMP_ASN1_OBJ_ID): + sint_ptr = vb->value; + snmp_asn1_enc_oid(p, ofs, vb->value_len / sizeof(s32_t), sint_ptr); + break; + default: + /* unsupported type */ + break; + }; + ofs += vb->vlen; + vb = vb->next; + } + return ofs; +} + +#endif /* LWIP_SNMP */ diff --git a/bertos/net/lwip/src/core/stats.c b/bertos/net/lwip/src/core/stats.c new file mode 100644 index 0000000..a036d83 --- /dev/null +++ b/bertos/net/lwip/src/core/stats.c @@ -0,0 +1,149 @@ +/** + * @file + * Statistics module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_STATS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/stats.h" +#include "lwip/mem.h" + +#include + +struct stats_ lwip_stats; + +#if LWIP_STATS_DISPLAY +void +stats_display_proto(struct stats_proto *proto, char *name) +{ + LWIP_PLATFORM_DIAG(("\n%s\n\t", name)); + LWIP_PLATFORM_DIAG(("xmit: %"STAT_COUNTER_F"\n\t", proto->xmit)); + LWIP_PLATFORM_DIAG(("recv: %"STAT_COUNTER_F"\n\t", proto->recv)); + LWIP_PLATFORM_DIAG(("fw: %"STAT_COUNTER_F"\n\t", proto->fw)); + LWIP_PLATFORM_DIAG(("drop: %"STAT_COUNTER_F"\n\t", proto->drop)); + LWIP_PLATFORM_DIAG(("chkerr: %"STAT_COUNTER_F"\n\t", proto->chkerr)); + LWIP_PLATFORM_DIAG(("lenerr: %"STAT_COUNTER_F"\n\t", proto->lenerr)); + LWIP_PLATFORM_DIAG(("memerr: %"STAT_COUNTER_F"\n\t", proto->memerr)); + LWIP_PLATFORM_DIAG(("rterr: %"STAT_COUNTER_F"\n\t", proto->rterr)); + LWIP_PLATFORM_DIAG(("proterr: %"STAT_COUNTER_F"\n\t", proto->proterr)); + LWIP_PLATFORM_DIAG(("opterr: %"STAT_COUNTER_F"\n\t", proto->opterr)); + LWIP_PLATFORM_DIAG(("err: %"STAT_COUNTER_F"\n\t", proto->err)); + LWIP_PLATFORM_DIAG(("cachehit: %"STAT_COUNTER_F"\n", proto->cachehit)); +} + +#if IGMP_STATS +void +stats_display_igmp(struct stats_igmp *igmp) +{ + LWIP_PLATFORM_DIAG(("\nIGMP\n\t")); + LWIP_PLATFORM_DIAG(("lenerr: %"STAT_COUNTER_F"\n\t", igmp->lenerr)); + LWIP_PLATFORM_DIAG(("chkerr: %"STAT_COUNTER_F"\n\t", igmp->chkerr)); + LWIP_PLATFORM_DIAG(("v1_rxed: %"STAT_COUNTER_F"\n\t", igmp->v1_rxed)); + LWIP_PLATFORM_DIAG(("join_sent: %"STAT_COUNTER_F"\n\t", igmp->join_sent)); + LWIP_PLATFORM_DIAG(("leave_sent: %"STAT_COUNTER_F"\n\t", igmp->leave_sent)); + LWIP_PLATFORM_DIAG(("unicast_query: %"STAT_COUNTER_F"\n\t", igmp->unicast_query)); + LWIP_PLATFORM_DIAG(("report_sent: %"STAT_COUNTER_F"\n\t", igmp->report_sent)); + LWIP_PLATFORM_DIAG(("report_rxed: %"STAT_COUNTER_F"\n\t", igmp->report_rxed)); + LWIP_PLATFORM_DIAG(("group_query_rxed: %"STAT_COUNTER_F"\n", igmp->group_query_rxed)); +} +#endif /* IGMP_STATS */ + +#if MEM_STATS || MEMP_STATS +void +stats_display_mem(struct stats_mem *mem, char *name) +{ + LWIP_PLATFORM_DIAG(("\nMEM %s\n\t", name)); + LWIP_PLATFORM_DIAG(("avail: %"U32_F"\n\t", (u32_t)mem->avail)); + LWIP_PLATFORM_DIAG(("used: %"U32_F"\n\t", (u32_t)mem->used)); + LWIP_PLATFORM_DIAG(("max: %"U32_F"\n\t", (u32_t)mem->max)); + LWIP_PLATFORM_DIAG(("err: %"U32_F"\n", (u32_t)mem->err)); +} + +#if MEMP_STATS +void +stats_display_memp(struct stats_mem *mem, int index) +{ + char * memp_names[] = { +#define LWIP_MEMPOOL(name,num,size,desc) desc, +#include "lwip/memp_std.h" + }; + if(index < MEMP_MAX) { + stats_display_mem(mem, memp_names[index]); + } +} +#endif /* MEMP_STATS */ +#endif /* MEM_STATS || MEMP_STATS */ + +#if SYS_STATS +void +stats_display_sys(struct stats_sys *sys) +{ + LWIP_PLATFORM_DIAG(("\nSYS\n\t")); + LWIP_PLATFORM_DIAG(("sem.used: %"U32_F"\n\t", (u32_t)sys->sem.used)); + LWIP_PLATFORM_DIAG(("sem.max: %"U32_F"\n\t", (u32_t)sys->sem.max)); + LWIP_PLATFORM_DIAG(("sem.err: %"U32_F"\n\t", (u32_t)sys->sem.err)); + LWIP_PLATFORM_DIAG(("mbox.used: %"U32_F"\n\t", (u32_t)sys->mbox.used)); + LWIP_PLATFORM_DIAG(("mbox.max: %"U32_F"\n\t", (u32_t)sys->mbox.max)); + LWIP_PLATFORM_DIAG(("mbox.err: %"U32_F"\n\t", (u32_t)sys->mbox.err)); +} +#endif /* SYS_STATS */ + +void +stats_display(void) +{ + s16_t i; + + LINK_STATS_DISPLAY(); + ETHARP_STATS_DISPLAY(); + IPFRAG_STATS_DISPLAY(); + IP_STATS_DISPLAY(); + IGMP_STATS_DISPLAY(); + ICMP_STATS_DISPLAY(); + UDP_STATS_DISPLAY(); + TCP_STATS_DISPLAY(); + MEM_STATS_DISPLAY(); + for (i = 0; i < MEMP_MAX; i++) { + MEMP_STATS_DISPLAY(i); + } + SYS_STATS_DISPLAY(); +} +#endif /* LWIP_STATS_DISPLAY */ + +#endif /* LWIP_STATS */ + diff --git a/bertos/net/lwip/src/core/sys.c b/bertos/net/lwip/src/core/sys.c new file mode 100644 index 0000000..cb5e86a --- /dev/null +++ b/bertos/net/lwip/src/core/sys.c @@ -0,0 +1,346 @@ +/** + * @file + * lwIP Operating System abstraction + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if (NO_SYS == 0) /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sys.h" +#include "lwip/def.h" +#include "lwip/memp.h" +#include "lwip/tcpip.h" + +/** + * Struct used for sys_sem_wait_timeout() to tell wether the time + * has run out or the semaphore has really become available. + */ +struct sswt_cb +{ + s16_t timeflag; + sys_sem_t *psem; +}; + +/** + * Wait (forever) for a message to arrive in an mbox. + * While waiting, timeouts (for this thread) are processed. + * + * @param mbox the mbox to fetch the message from + * @param msg the place to store the message + */ +void +sys_mbox_fetch(sys_mbox_t mbox, void **msg) +{ + u32_t time_needed; + struct sys_timeouts *timeouts; + struct sys_timeo *tmptimeout; + sys_timeout_handler h; + void *arg; + + again: + timeouts = sys_arch_timeouts(); + + if (!timeouts || !timeouts->next) { + UNLOCK_TCPIP_CORE(); + time_needed = sys_arch_mbox_fetch(mbox, msg, 0); + LOCK_TCPIP_CORE(); + } else { + if (timeouts->next->time > 0) { + UNLOCK_TCPIP_CORE(); + time_needed = sys_arch_mbox_fetch(mbox, msg, timeouts->next->time); + LOCK_TCPIP_CORE(); + } else { + time_needed = SYS_ARCH_TIMEOUT; + } + + if (time_needed == SYS_ARCH_TIMEOUT) { + /* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message + could be fetched. We should now call the timeout handler and + deallocate the memory allocated for the timeout. */ + tmptimeout = timeouts->next; + timeouts->next = tmptimeout->next; + h = tmptimeout->h; + arg = tmptimeout->arg; + memp_free(MEMP_SYS_TIMEOUT, tmptimeout); + if (h != NULL) { + LWIP_DEBUGF(SYS_DEBUG, ("smf calling h=%p(%p)\n", *(void**)&h, arg)); + h(arg); + } + + /* We try again to fetch a message from the mbox. */ + goto again; + } else { + /* If time != SYS_ARCH_TIMEOUT, a message was received before the timeout + occured. The time variable is set to the number of + milliseconds we waited for the message. */ + if (time_needed < timeouts->next->time) { + timeouts->next->time -= time_needed; + } else { + timeouts->next->time = 0; + } + } + } +} + +/** + * Wait (forever) for a semaphore to become available. + * While waiting, timeouts (for this thread) are processed. + * + * @param sem semaphore to wait for + */ +void +sys_sem_wait(sys_sem_t sem) +{ + u32_t time_needed; + struct sys_timeouts *timeouts; + struct sys_timeo *tmptimeout; + sys_timeout_handler h; + void *arg; + + again: + + timeouts = sys_arch_timeouts(); + + if (!timeouts || !timeouts->next) { + sys_arch_sem_wait(sem, 0); + } else { + if (timeouts->next->time > 0) { + time_needed = sys_arch_sem_wait(sem, timeouts->next->time); + } else { + time_needed = SYS_ARCH_TIMEOUT; + } + + if (time_needed == SYS_ARCH_TIMEOUT) { + /* If time == SYS_ARCH_TIMEOUT, a timeout occured before a message + could be fetched. We should now call the timeout handler and + deallocate the memory allocated for the timeout. */ + tmptimeout = timeouts->next; + timeouts->next = tmptimeout->next; + h = tmptimeout->h; + arg = tmptimeout->arg; + memp_free(MEMP_SYS_TIMEOUT, tmptimeout); + if (h != NULL) { + LWIP_DEBUGF(SYS_DEBUG, ("ssw h=%p(%p)\n", *(void**)&h, (void *)arg)); + h(arg); + } + + /* We try again to fetch a message from the mbox. */ + goto again; + } else { + /* If time != SYS_ARCH_TIMEOUT, a message was received before the timeout + occured. The time variable is set to the number of + milliseconds we waited for the message. */ + if (time_needed < timeouts->next->time) { + timeouts->next->time -= time_needed; + } else { + timeouts->next->time = 0; + } + } + } +} + +/** + * Create a one-shot timer (aka timeout). Timeouts are processed in the + * following cases: + * - while waiting for a message using sys_mbox_fetch() + * - while waiting for a semaphore using sys_sem_wait() or sys_sem_wait_timeout() + * - while sleeping using the inbuilt sys_msleep() + * + * @param msecs time in milliseconds after that the timer should expire + * @param h callback function to call when msecs have elapsed + * @param arg argument to pass to the callback function + */ +void +sys_timeout(u32_t msecs, sys_timeout_handler h, void *arg) +{ + struct sys_timeouts *timeouts; + struct sys_timeo *timeout, *t; + + timeout = memp_malloc(MEMP_SYS_TIMEOUT); + if (timeout == NULL) { + LWIP_ASSERT("sys_timeout: timeout != NULL", timeout != NULL); + return; + } + timeout->next = NULL; + timeout->h = h; + timeout->arg = arg; + timeout->time = msecs; + + timeouts = sys_arch_timeouts(); + + LWIP_DEBUGF(SYS_DEBUG, ("sys_timeout: %p msecs=%"U32_F" h=%p arg=%p\n", + (void *)timeout, msecs, *(void**)&h, (void *)arg)); + + if (timeouts == NULL) { + LWIP_ASSERT("sys_timeout: timeouts != NULL", timeouts != NULL); + return; + } + + if (timeouts->next == NULL) { + timeouts->next = timeout; + return; + } + + if (timeouts->next->time > msecs) { + timeouts->next->time -= msecs; + timeout->next = timeouts->next; + timeouts->next = timeout; + } else { + for(t = timeouts->next; t != NULL; t = t->next) { + timeout->time -= t->time; + if (t->next == NULL || t->next->time > timeout->time) { + if (t->next != NULL) { + t->next->time -= timeout->time; + } + timeout->next = t->next; + t->next = timeout; + break; + } + } + } +} + +/** + * Go through timeout list (for this task only) and remove the first matching + * entry, even though the timeout has not triggered yet. + * + * @note This function only works as expected if there is only one timeout + * calling 'h' in the list of timeouts. + * + * @param h callback function that would be called by the timeout + * @param arg callback argument that would be passed to h +*/ +void +sys_untimeout(sys_timeout_handler h, void *arg) +{ + struct sys_timeouts *timeouts; + struct sys_timeo *prev_t, *t; + + timeouts = sys_arch_timeouts(); + + if (timeouts == NULL) { + LWIP_ASSERT("sys_untimeout: timeouts != NULL", timeouts != NULL); + return; + } + if (timeouts->next == NULL) { + return; + } + + for (t = timeouts->next, prev_t = NULL; t != NULL; prev_t = t, t = t->next) { + if ((t->h == h) && (t->arg == arg)) { + /* We have a match */ + /* Unlink from previous in list */ + if (prev_t == NULL) { + timeouts->next = t->next; + } else { + prev_t->next = t->next; + } + /* If not the last one, add time of this one back to next */ + if (t->next != NULL) { + t->next->time += t->time; + } + memp_free(MEMP_SYS_TIMEOUT, t); + return; + } + } + return; +} + +/** + * Timeout handler function for sys_sem_wait_timeout() + * + * @param arg struct sswt_cb* used to signal a semaphore and end waiting. + */ +static void +sswt_handler(void *arg) +{ + struct sswt_cb *sswt_cb = (struct sswt_cb *) arg; + + /* Timeout. Set flag to TRUE and signal semaphore */ + sswt_cb->timeflag = 1; + sys_sem_signal(*(sswt_cb->psem)); +} + +/** + * Wait for a semaphore with timeout (specified in ms) + * + * @param sem semaphore to wait + * @param timeout timeout in ms (0: wait forever) + * @return 0 on timeout, 1 otherwise + */ +int +sys_sem_wait_timeout(sys_sem_t sem, u32_t timeout) +{ + struct sswt_cb sswt_cb; + + sswt_cb.psem = &sem; + sswt_cb.timeflag = 0; + + /* If timeout is zero, then just wait forever */ + if (timeout > 0) { + /* Create a timer and pass it the address of our flag */ + sys_timeout(timeout, sswt_handler, &sswt_cb); + } + sys_sem_wait(sem); + /* Was it a timeout? */ + if (sswt_cb.timeflag) { + /* timeout */ + return 0; + } else { + /* Not a timeout. Remove timeout entry */ + sys_untimeout(sswt_handler, &sswt_cb); + return 1; + } +} + +/** + * Sleep for some ms. Timeouts are processed while sleeping. + * + * @param ms number of milliseconds to sleep + */ +void +sys_msleep(u32_t ms) +{ + sys_sem_t delaysem = sys_sem_new(0); + + sys_sem_wait_timeout(delaysem, ms); + + sys_sem_free(delaysem); +} + + +#endif /* NO_SYS */ diff --git a/bertos/net/lwip/src/core/tcp.c b/bertos/net/lwip/src/core/tcp.c new file mode 100644 index 0000000..29cdf18 --- /dev/null +++ b/bertos/net/lwip/src/core/tcp.c @@ -0,0 +1,1461 @@ +/** + * @file + * Transmission Control Protocol for IP + * + * This file contains common functions for the TCP implementation, such as functinos + * for manipulating the data structures and the TCP timer functions. TCP functions + * related to input and output is found in tcp_in.c and tcp_out.c respectively. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/snmp.h" +#include "lwip/tcp.h" +#include "lwip/debug.h" +#include "lwip/stats.h" + +#include + +const char *tcp_state_str[] = { + "CLOSED", + "LISTEN", + "SYN_SENT", + "SYN_RCVD", + "ESTABLISHED", + "FIN_WAIT_1", + "FIN_WAIT_2", + "CLOSE_WAIT", + "CLOSING", + "LAST_ACK", + "TIME_WAIT" +}; + +/* Incremented every coarse grained timer shot (typically every 500 ms). */ +u32_t tcp_ticks; +const u8_t tcp_backoff[13] = + { 1, 2, 3, 4, 5, 6, 7, 7, 7, 7, 7, 7, 7}; + /* Times per slowtmr hits */ +const u8_t tcp_persist_backoff[7] = { 3, 6, 12, 24, 48, 96, 120 }; + +/* The TCP PCB lists. */ + +/** List of all TCP PCBs bound but not yet (connected || listening) */ +struct tcp_pcb *tcp_bound_pcbs; +/** List of all TCP PCBs in LISTEN state */ +union tcp_listen_pcbs_t tcp_listen_pcbs; +/** List of all TCP PCBs that are in a state in which + * they accept or send data. */ +struct tcp_pcb *tcp_active_pcbs; +/** List of all TCP PCBs in TIME-WAIT state */ +struct tcp_pcb *tcp_tw_pcbs; + +struct tcp_pcb *tcp_tmp_pcb; + +static u8_t tcp_timer; +static u16_t tcp_new_port(void); + +/** + * Called periodically to dispatch TCP timers. + * + */ +void +tcp_tmr(void) +{ + /* Call tcp_fasttmr() every 250 ms */ + tcp_fasttmr(); + + if (++tcp_timer & 1) { + /* Call tcp_tmr() every 500 ms, i.e., every other timer + tcp_tmr() is called. */ + tcp_slowtmr(); + } +} + +/** + * Closes the connection held by the PCB. + * + * Listening pcbs are freed and may not be referenced any more. + * Connection pcbs are freed if not yet connected and may not be referenced + * any more. If a connection is established (at least SYN received or in + * a closing state), the connection is closed, and put in a closing state. + * The pcb is then automatically freed in tcp_slowtmr(). It is therefore + * unsafe to reference it. + * + * @param pcb the tcp_pcb to close + * @return ERR_OK if connection has been closed + * another err_t if closing failed and pcb is not freed + */ +err_t +tcp_close(struct tcp_pcb *pcb) +{ + err_t err; + +#if TCP_DEBUG + LWIP_DEBUGF(TCP_DEBUG, ("tcp_close: closing in ")); + tcp_debug_print_state(pcb->state); +#endif /* TCP_DEBUG */ + + switch (pcb->state) { + case CLOSED: + /* Closing a pcb in the CLOSED state might seem erroneous, + * however, it is in this state once allocated and as yet unused + * and the user needs some way to free it should the need arise. + * Calling tcp_close() with a pcb that has already been closed, (i.e. twice) + * or for a pcb that has been used and then entered the CLOSED state + * is erroneous, but this should never happen as the pcb has in those cases + * been freed, and so any remaining handles are bogus. */ + err = ERR_OK; + TCP_RMV(&tcp_bound_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + pcb = NULL; + break; + case LISTEN: + err = ERR_OK; + tcp_pcb_remove((struct tcp_pcb **)&tcp_listen_pcbs.pcbs, pcb); + memp_free(MEMP_TCP_PCB_LISTEN, pcb); + pcb = NULL; + break; + case SYN_SENT: + err = ERR_OK; + tcp_pcb_remove(&tcp_active_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + pcb = NULL; + snmp_inc_tcpattemptfails(); + break; + case SYN_RCVD: + err = tcp_send_ctrl(pcb, TCP_FIN); + if (err == ERR_OK) { + snmp_inc_tcpattemptfails(); + pcb->state = FIN_WAIT_1; + } + break; + case ESTABLISHED: + err = tcp_send_ctrl(pcb, TCP_FIN); + if (err == ERR_OK) { + snmp_inc_tcpestabresets(); + pcb->state = FIN_WAIT_1; + } + break; + case CLOSE_WAIT: + err = tcp_send_ctrl(pcb, TCP_FIN); + if (err == ERR_OK) { + snmp_inc_tcpestabresets(); + pcb->state = LAST_ACK; + } + break; + default: + /* Has already been closed, do nothing. */ + err = ERR_OK; + pcb = NULL; + break; + } + + if (pcb != NULL && err == ERR_OK) { + /* To ensure all data has been sent when tcp_close returns, we have + to make sure tcp_output doesn't fail. + Since we don't really have to ensure all data has been sent when tcp_close + returns (unsent data is sent from tcp timer functions, also), we don't care + for the return value of tcp_output for now. */ + /* @todo: When implementing SO_LINGER, this must be changed somehow: + If SOF_LINGER is set, the data should be sent when tcp_close returns. */ + tcp_output(pcb); + } + return err; +} + +/** + * Abandons a connection and optionally sends a RST to the remote + * host. Deletes the local protocol control block. This is done when + * a connection is killed because of shortage of memory. + * + * @param pcb the tcp_pcb to abort + * @param reset boolean to indicate whether a reset should be sent + */ +void +tcp_abandon(struct tcp_pcb *pcb, int reset) +{ + u32_t seqno, ackno; + u16_t remote_port, local_port; + struct ip_addr remote_ip, local_ip; +#if LWIP_CALLBACK_API + void (* errf)(void *arg, err_t err); +#endif /* LWIP_CALLBACK_API */ + void *errf_arg; + + + /* Figure out on which TCP PCB list we are, and remove us. If we + are in an active state, call the receive function associated with + the PCB with a NULL argument, and send an RST to the remote end. */ + if (pcb->state == TIME_WAIT) { + tcp_pcb_remove(&tcp_tw_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + } else { + seqno = pcb->snd_nxt; + ackno = pcb->rcv_nxt; + ip_addr_set(&local_ip, &(pcb->local_ip)); + ip_addr_set(&remote_ip, &(pcb->remote_ip)); + local_port = pcb->local_port; + remote_port = pcb->remote_port; +#if LWIP_CALLBACK_API + errf = pcb->errf; +#endif /* LWIP_CALLBACK_API */ + errf_arg = pcb->callback_arg; + tcp_pcb_remove(&tcp_active_pcbs, pcb); + if (pcb->unacked != NULL) { + tcp_segs_free(pcb->unacked); + } + if (pcb->unsent != NULL) { + tcp_segs_free(pcb->unsent); + } +#if TCP_QUEUE_OOSEQ + if (pcb->ooseq != NULL) { + tcp_segs_free(pcb->ooseq); + } +#endif /* TCP_QUEUE_OOSEQ */ + memp_free(MEMP_TCP_PCB, pcb); + TCP_EVENT_ERR(errf, errf_arg, ERR_ABRT); + if (reset) { + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_abandon: sending RST\n")); + tcp_rst(seqno, ackno, &local_ip, &remote_ip, local_port, remote_port); + } + } +} + +/** + * Binds the connection to a local portnumber and IP address. If the + * IP address is not given (i.e., ipaddr == NULL), the IP address of + * the outgoing network interface is used instead. + * + * @param pcb the tcp_pcb to bind (no check is done whether this pcb is + * already bound!) + * @param ipaddr the local ip address to bind to (use IP_ADDR_ANY to bind + * to any local address + * @param port the local port to bind to + * @return ERR_USE if the port is already in use + * ERR_OK if bound + */ +err_t +tcp_bind(struct tcp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) +{ + struct tcp_pcb *cpcb; + + LWIP_ERROR("tcp_bind: can only bind in state CLOSED", pcb->state == CLOSED, return ERR_ISCONN); + + if (port == 0) { + port = tcp_new_port(); + } + /* Check if the address already is in use. */ + /* Check the listen pcbs. */ + for(cpcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; + cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->local_port == port) { + if (ip_addr_isany(&(cpcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { + return ERR_USE; + } + } + } + /* Check the connected pcbs. */ + for(cpcb = tcp_active_pcbs; + cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->local_port == port) { + if (ip_addr_isany(&(cpcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { + return ERR_USE; + } + } + } + /* Check the bound, not yet connected pcbs. */ + for(cpcb = tcp_bound_pcbs; cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->local_port == port) { + if (ip_addr_isany(&(cpcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { + return ERR_USE; + } + } + } + /* @todo: until SO_REUSEADDR is implemented (see task #6995 on savannah), + * we have to check the pcbs in TIME-WAIT state, also: */ + for(cpcb = tcp_tw_pcbs; cpcb != NULL; cpcb = cpcb->next) { + if (cpcb->local_port == port) { + if (ip_addr_cmp(&(cpcb->local_ip), ipaddr)) { + return ERR_USE; + } + } + } + + if (!ip_addr_isany(ipaddr)) { + pcb->local_ip = *ipaddr; + } + pcb->local_port = port; + TCP_REG(&tcp_bound_pcbs, pcb); + LWIP_DEBUGF(TCP_DEBUG, ("tcp_bind: bind to port %"U16_F"\n", port)); + return ERR_OK; +} +#if LWIP_CALLBACK_API +/** + * Default accept callback if no accept callback is specified by the user. + */ +static err_t +tcp_accept_null(void *arg, struct tcp_pcb *pcb, err_t err) +{ + LWIP_UNUSED_ARG(arg); + LWIP_UNUSED_ARG(pcb); + LWIP_UNUSED_ARG(err); + + return ERR_ABRT; +} +#endif /* LWIP_CALLBACK_API */ + +/** + * Set the state of the connection to be LISTEN, which means that it + * is able to accept incoming connections. The protocol control block + * is reallocated in order to consume less memory. Setting the + * connection to LISTEN is an irreversible process. + * + * @param pcb the original tcp_pcb + * @param backlog the incoming connections queue limit + * @return tcp_pcb used for listening, consumes less memory. + * + * @note The original tcp_pcb is freed. This function therefore has to be + * called like this: + * tpcb = tcp_listen(tpcb); + */ +struct tcp_pcb * +tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog) +{ + struct tcp_pcb_listen *lpcb; + + LWIP_UNUSED_ARG(backlog); + LWIP_ERROR("tcp_listen: pcb already connected", pcb->state == CLOSED, return NULL); + + /* already listening? */ + if (pcb->state == LISTEN) { + return pcb; + } + lpcb = memp_malloc(MEMP_TCP_PCB_LISTEN); + if (lpcb == NULL) { + return NULL; + } + lpcb->callback_arg = pcb->callback_arg; + lpcb->local_port = pcb->local_port; + lpcb->state = LISTEN; + lpcb->so_options = pcb->so_options; + lpcb->so_options |= SOF_ACCEPTCONN; + lpcb->ttl = pcb->ttl; + lpcb->tos = pcb->tos; + ip_addr_set(&lpcb->local_ip, &pcb->local_ip); + TCP_RMV(&tcp_bound_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); +#if LWIP_CALLBACK_API + lpcb->accept = tcp_accept_null; +#endif /* LWIP_CALLBACK_API */ +#if TCP_LISTEN_BACKLOG + lpcb->accepts_pending = 0; + lpcb->backlog = (backlog ? backlog : 1); +#endif /* TCP_LISTEN_BACKLOG */ + TCP_REG(&tcp_listen_pcbs.listen_pcbs, lpcb); + return (struct tcp_pcb *)lpcb; +} + +/** + * Update the state that tracks the available window space to advertise. + * + * Returns how much extra window would be advertised if we sent an + * update now. + */ +u32_t tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb) +{ + u32_t new_right_edge = pcb->rcv_nxt + pcb->rcv_wnd; + + if (TCP_SEQ_GEQ(new_right_edge, pcb->rcv_ann_right_edge + LWIP_MIN((TCP_WND / 2), pcb->mss))) { + /* we can advertise more window */ + pcb->rcv_ann_wnd = pcb->rcv_wnd; + return new_right_edge - pcb->rcv_ann_right_edge; + } else { + if (TCP_SEQ_GT(pcb->rcv_nxt, pcb->rcv_ann_right_edge)) { + /* Can happen due to other end sending out of advertised window, + * but within actual available (but not yet advertised) window */ + pcb->rcv_ann_wnd = 0; + } else { + /* keep the right edge of window constant */ + pcb->rcv_ann_wnd = pcb->rcv_ann_right_edge - pcb->rcv_nxt; + } + return 0; + } +} + +/** + * This function should be called by the application when it has + * processed the data. The purpose is to advertise a larger window + * when the data has been processed. + * + * @param pcb the tcp_pcb for which data is read + * @param len the amount of bytes that have been read by the application + */ +void +tcp_recved(struct tcp_pcb *pcb, u16_t len) +{ + int wnd_inflation; + + LWIP_ASSERT("tcp_recved: len would wrap rcv_wnd\n", + len <= 0xffff - pcb->rcv_wnd ); + + pcb->rcv_wnd += len; + if (pcb->rcv_wnd > TCP_WND) + pcb->rcv_wnd = TCP_WND; + + wnd_inflation = tcp_update_rcv_ann_wnd(pcb); + + /* If the change in the right edge of window is significant (default + * watermark is TCP_WND/2), then send an explicit update now. + * Otherwise wait for a packet to be sent in the normal course of + * events (or more window to be available later) */ + if (wnd_inflation >= TCP_WND_UPDATE_THRESHOLD) + tcp_ack_now(pcb); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_recved: recveived %"U16_F" bytes, wnd %"U16_F" (%"U16_F").\n", + len, pcb->rcv_wnd, TCP_WND - pcb->rcv_wnd)); +} + +/** + * A nastly hack featuring 'goto' statements that allocates a + * new TCP local port. + * + * @return a new (free) local TCP port number + */ +static u16_t +tcp_new_port(void) +{ + struct tcp_pcb *pcb; +#ifndef TCP_LOCAL_PORT_RANGE_START +#define TCP_LOCAL_PORT_RANGE_START 4096 +#define TCP_LOCAL_PORT_RANGE_END 0x7fff +#endif + static u16_t port = TCP_LOCAL_PORT_RANGE_START; + + again: + if (++port > TCP_LOCAL_PORT_RANGE_END) { + port = TCP_LOCAL_PORT_RANGE_START; + } + + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->local_port == port) { + goto again; + } + } + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->local_port == port) { + goto again; + } + } + for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->local_port == port) { + goto again; + } + } + return port; +} + +/** + * Connects to another host. The function given as the "connected" + * argument will be called when the connection has been established. + * + * @param pcb the tcp_pcb used to establish the connection + * @param ipaddr the remote ip address to connect to + * @param port the remote tcp port to connect to + * @param connected callback function to call when connected (or on error) + * @return ERR_VAL if invalid arguments are given + * ERR_OK if connect request has been sent + * other err_t values if connect request couldn't be sent + */ +err_t +tcp_connect(struct tcp_pcb *pcb, struct ip_addr *ipaddr, u16_t port, + err_t (* connected)(void *arg, struct tcp_pcb *tpcb, err_t err)) +{ + err_t ret; + u32_t iss; + + LWIP_ERROR("tcp_connect: can only connected from state CLOSED", pcb->state == CLOSED, return ERR_ISCONN); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_connect to port %"U16_F"\n", port)); + if (ipaddr != NULL) { + pcb->remote_ip = *ipaddr; + } else { + return ERR_VAL; + } + pcb->remote_port = port; + if (pcb->local_port == 0) { + pcb->local_port = tcp_new_port(); + } + iss = tcp_next_iss(); + pcb->rcv_nxt = 0; + pcb->snd_nxt = iss; + pcb->lastack = iss - 1; + pcb->snd_lbb = iss - 1; + pcb->rcv_wnd = TCP_WND; + pcb->rcv_ann_wnd = TCP_WND; + pcb->rcv_ann_right_edge = pcb->rcv_nxt; + pcb->snd_wnd = TCP_WND; + /* As initial send MSS, we use TCP_MSS but limit it to 536. + The send MSS is updated when an MSS option is received. */ + pcb->mss = (TCP_MSS > 536) ? 536 : TCP_MSS; +#if TCP_CALCULATE_EFF_SEND_MSS + pcb->mss = tcp_eff_send_mss(pcb->mss, ipaddr); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + pcb->cwnd = 1; + pcb->ssthresh = pcb->mss * 10; + pcb->state = SYN_SENT; +#if LWIP_CALLBACK_API + pcb->connected = connected; +#endif /* LWIP_CALLBACK_API */ + TCP_RMV(&tcp_bound_pcbs, pcb); + TCP_REG(&tcp_active_pcbs, pcb); + + snmp_inc_tcpactiveopens(); + + ret = tcp_enqueue(pcb, NULL, 0, TCP_SYN, 0, TF_SEG_OPTS_MSS +#if LWIP_TCP_TIMESTAMPS + | TF_SEG_OPTS_TS +#endif + ); + if (ret == ERR_OK) { + tcp_output(pcb); + } + return ret; +} + +/** + * Called every 500 ms and implements the retransmission timer and the timer that + * removes PCBs that have been in TIME-WAIT for enough time. It also increments + * various timers such as the inactivity timer in each PCB. + * + * Automatically called from tcp_tmr(). + */ +void +tcp_slowtmr(void) +{ + struct tcp_pcb *pcb, *pcb2, *prev; + u16_t eff_wnd; + u8_t pcb_remove; /* flag if a PCB should be removed */ + u8_t pcb_reset; /* flag if a RST should be sent when removing */ + err_t err; + + err = ERR_OK; + + ++tcp_ticks; + + /* Steps through all of the active PCBs. */ + prev = NULL; + pcb = tcp_active_pcbs; + if (pcb == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: no active pcbs\n")); + } + while (pcb != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: processing active pcb\n")); + LWIP_ASSERT("tcp_slowtmr: active pcb->state != CLOSED\n", pcb->state != CLOSED); + LWIP_ASSERT("tcp_slowtmr: active pcb->state != LISTEN\n", pcb->state != LISTEN); + LWIP_ASSERT("tcp_slowtmr: active pcb->state != TIME-WAIT\n", pcb->state != TIME_WAIT); + + pcb_remove = 0; + pcb_reset = 0; + + if (pcb->state == SYN_SENT && pcb->nrtx == TCP_SYNMAXRTX) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max SYN retries reached\n")); + } + else if (pcb->nrtx == TCP_MAXRTX) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: max DATA retries reached\n")); + } else { + if (pcb->persist_backoff > 0) { + /* If snd_wnd is zero, use persist timer to send 1 byte probes + * instead of using the standard retransmission mechanism. */ + pcb->persist_cnt++; + if (pcb->persist_cnt >= tcp_persist_backoff[pcb->persist_backoff-1]) { + pcb->persist_cnt = 0; + if (pcb->persist_backoff < sizeof(tcp_persist_backoff)) { + pcb->persist_backoff++; + } + tcp_zero_window_probe(pcb); + } + } else { + /* Increase the retransmission timer if it is running */ + if(pcb->rtime >= 0) + ++pcb->rtime; + + if (pcb->unacked != NULL && pcb->rtime >= pcb->rto) { + /* Time for a retransmission. */ + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_slowtmr: rtime %"S16_F + " pcb->rto %"S16_F"\n", + pcb->rtime, pcb->rto)); + + /* Double retransmission time-out unless we are trying to + * connect to somebody (i.e., we are in SYN_SENT). */ + if (pcb->state != SYN_SENT) { + pcb->rto = ((pcb->sa >> 3) + pcb->sv) << tcp_backoff[pcb->nrtx]; + } + + /* Reset the retransmission timer. */ + pcb->rtime = 0; + + /* Reduce congestion window and ssthresh. */ + eff_wnd = LWIP_MIN(pcb->cwnd, pcb->snd_wnd); + pcb->ssthresh = eff_wnd >> 1; + if (pcb->ssthresh < pcb->mss) { + pcb->ssthresh = pcb->mss * 2; + } + pcb->cwnd = pcb->mss; + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: cwnd %"U16_F + " ssthresh %"U16_F"\n", + pcb->cwnd, pcb->ssthresh)); + + /* The following needs to be called AFTER cwnd is set to one + mss - STJ */ + tcp_rexmit_rto(pcb); + } + } + } + /* Check if this PCB has stayed too long in FIN-WAIT-2 */ + if (pcb->state == FIN_WAIT_2) { + if ((u32_t)(tcp_ticks - pcb->tmr) > + TCP_FIN_WAIT_TIMEOUT / TCP_SLOW_INTERVAL) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in FIN-WAIT-2\n")); + } + } + + /* Check if KEEPALIVE should be sent */ + if((pcb->so_options & SOF_KEEPALIVE) && + ((pcb->state == ESTABLISHED) || + (pcb->state == CLOSE_WAIT))) { +#if LWIP_TCP_KEEPALIVE + if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + (pcb->keep_cnt*pcb->keep_intvl)) + / TCP_SLOW_INTERVAL) +#else + if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + TCP_MAXIDLE) / TCP_SLOW_INTERVAL) +#endif /* LWIP_TCP_KEEPALIVE */ + { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: KEEPALIVE timeout. Aborting connection to %"U16_F".%"U16_F".%"U16_F".%"U16_F".\n", + ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), + ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); + + ++pcb_remove; + ++pcb_reset; + } +#if LWIP_TCP_KEEPALIVE + else if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + pcb->keep_cnt_sent * pcb->keep_intvl) + / TCP_SLOW_INTERVAL) +#else + else if((u32_t)(tcp_ticks - pcb->tmr) > + (pcb->keep_idle + pcb->keep_cnt_sent * TCP_KEEPINTVL_DEFAULT) + / TCP_SLOW_INTERVAL) +#endif /* LWIP_TCP_KEEPALIVE */ + { + tcp_keepalive(pcb); + pcb->keep_cnt_sent++; + } + } + + /* If this PCB has queued out of sequence data, but has been + inactive for too long, will drop the data (it will eventually + be retransmitted). */ +#if TCP_QUEUE_OOSEQ + if (pcb->ooseq != NULL && + (u32_t)tcp_ticks - pcb->tmr >= pcb->rto * TCP_OOSEQ_TIMEOUT) { + tcp_segs_free(pcb->ooseq); + pcb->ooseq = NULL; + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_slowtmr: dropping OOSEQ queued data\n")); + } +#endif /* TCP_QUEUE_OOSEQ */ + + /* Check if this PCB has stayed too long in SYN-RCVD */ + if (pcb->state == SYN_RCVD) { + if ((u32_t)(tcp_ticks - pcb->tmr) > + TCP_SYN_RCVD_TIMEOUT / TCP_SLOW_INTERVAL) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in SYN-RCVD\n")); + } + } + + /* Check if this PCB has stayed too long in LAST-ACK */ + if (pcb->state == LAST_ACK) { + if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { + ++pcb_remove; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: removing pcb stuck in LAST-ACK\n")); + } + } + + /* If the PCB should be removed, do it. */ + if (pcb_remove) { + tcp_pcb_purge(pcb); + /* Remove PCB from tcp_active_pcbs list. */ + if (prev != NULL) { + LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_active_pcbs", pcb != tcp_active_pcbs); + prev->next = pcb->next; + } else { + /* This PCB was the first. */ + LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_active_pcbs", tcp_active_pcbs == pcb); + tcp_active_pcbs = pcb->next; + } + + TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_ABRT); + if (pcb_reset) { + tcp_rst(pcb->snd_nxt, pcb->rcv_nxt, &pcb->local_ip, &pcb->remote_ip, + pcb->local_port, pcb->remote_port); + } + + pcb2 = pcb->next; + memp_free(MEMP_TCP_PCB, pcb); + pcb = pcb2; + } else { + + /* We check if we should poll the connection. */ + ++pcb->polltmr; + if (pcb->polltmr >= pcb->pollinterval) { + pcb->polltmr = 0; + LWIP_DEBUGF(TCP_DEBUG, ("tcp_slowtmr: polling application\n")); + TCP_EVENT_POLL(pcb, err); + if (err == ERR_OK) { + tcp_output(pcb); + } + } + + prev = pcb; + pcb = pcb->next; + } + } + + + /* Steps through all of the TIME-WAIT PCBs. */ + prev = NULL; + pcb = tcp_tw_pcbs; + while (pcb != NULL) { + LWIP_ASSERT("tcp_slowtmr: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); + pcb_remove = 0; + + /* Check if this PCB has stayed long enough in TIME-WAIT */ + if ((u32_t)(tcp_ticks - pcb->tmr) > 2 * TCP_MSL / TCP_SLOW_INTERVAL) { + ++pcb_remove; + } + + + + /* If the PCB should be removed, do it. */ + if (pcb_remove) { + tcp_pcb_purge(pcb); + /* Remove PCB from tcp_tw_pcbs list. */ + if (prev != NULL) { + LWIP_ASSERT("tcp_slowtmr: middle tcp != tcp_tw_pcbs", pcb != tcp_tw_pcbs); + prev->next = pcb->next; + } else { + /* This PCB was the first. */ + LWIP_ASSERT("tcp_slowtmr: first pcb == tcp_tw_pcbs", tcp_tw_pcbs == pcb); + tcp_tw_pcbs = pcb->next; + } + pcb2 = pcb->next; + memp_free(MEMP_TCP_PCB, pcb); + pcb = pcb2; + } else { + prev = pcb; + pcb = pcb->next; + } + } +} + +/** + * Is called every TCP_FAST_INTERVAL (250 ms) and process data previously + * "refused" by upper layer (application) and sends delayed ACKs. + * + * Automatically called from tcp_tmr(). + */ +void +tcp_fasttmr(void) +{ + struct tcp_pcb *pcb; + + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + /* If there is data which was previously "refused" by upper layer */ + if (pcb->refused_data != NULL) { + /* Notify again application with data previously received. */ + err_t err; + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_fasttmr: notify kept packet\n")); + TCP_EVENT_RECV(pcb, pcb->refused_data, ERR_OK, err); + if (err == ERR_OK) { + pcb->refused_data = NULL; + } + } + + /* send delayed ACKs */ + if (pcb->flags & TF_ACK_DELAY) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_fasttmr: delayed ACK\n")); + tcp_ack_now(pcb); + pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); + } + } +} + +/** + * Deallocates a list of TCP segments (tcp_seg structures). + * + * @param seg tcp_seg list of TCP segments to free + * @return the number of pbufs that were deallocated + */ +u8_t +tcp_segs_free(struct tcp_seg *seg) +{ + u8_t count = 0; + struct tcp_seg *next; + while (seg != NULL) { + next = seg->next; + count += tcp_seg_free(seg); + seg = next; + } + return count; +} + +/** + * Frees a TCP segment (tcp_seg structure). + * + * @param seg single tcp_seg to free + * @return the number of pbufs that were deallocated + */ +u8_t +tcp_seg_free(struct tcp_seg *seg) +{ + u8_t count = 0; + + if (seg != NULL) { + if (seg->p != NULL) { + count = pbuf_free(seg->p); +#if TCP_DEBUG + seg->p = NULL; +#endif /* TCP_DEBUG */ + } + memp_free(MEMP_TCP_SEG, seg); + } + return count; +} + +/** + * Sets the priority of a connection. + * + * @param pcb the tcp_pcb to manipulate + * @param prio new priority + */ +void +tcp_setprio(struct tcp_pcb *pcb, u8_t prio) +{ + pcb->prio = prio; +} +#if TCP_QUEUE_OOSEQ + +/** + * Returns a copy of the given TCP segment. + * The pbuf and data are not copied, only the pointers + * + * @param seg the old tcp_seg + * @return a copy of seg + */ +struct tcp_seg * +tcp_seg_copy(struct tcp_seg *seg) +{ + struct tcp_seg *cseg; + + cseg = memp_malloc(MEMP_TCP_SEG); + if (cseg == NULL) { + return NULL; + } + SMEMCPY((u8_t *)cseg, (const u8_t *)seg, sizeof(struct tcp_seg)); + pbuf_ref(cseg->p); + return cseg; +} +#endif + +#if LWIP_CALLBACK_API +/** + * Default receive callback that is called if the user didn't register + * a recv callback for the pcb. + */ +err_t +tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err) +{ + LWIP_UNUSED_ARG(arg); + if (p != NULL) { + tcp_recved(pcb, p->tot_len); + pbuf_free(p); + } else if (err == ERR_OK) { + return tcp_close(pcb); + } + return ERR_OK; +} +#endif /* LWIP_CALLBACK_API */ + +/** + * Kills the oldest active connection that has lower priority than prio. + * + * @param prio minimum priority + */ +static void +tcp_kill_prio(u8_t prio) +{ + struct tcp_pcb *pcb, *inactive; + u32_t inactivity; + u8_t mprio; + + + mprio = TCP_PRIO_MAX; + + /* We kill the oldest active connection that has lower priority than prio. */ + inactivity = 0; + inactive = NULL; + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + if (pcb->prio <= prio && + pcb->prio <= mprio && + (u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { + inactivity = tcp_ticks - pcb->tmr; + inactive = pcb; + mprio = pcb->prio; + } + } + if (inactive != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_prio: killing oldest PCB %p (%"S32_F")\n", + (void *)inactive, inactivity)); + tcp_abort(inactive); + } +} + +/** + * Kills the oldest connection that is in TIME_WAIT state. + * Called from tcp_alloc() if no more connections are available. + */ +static void +tcp_kill_timewait(void) +{ + struct tcp_pcb *pcb, *inactive; + u32_t inactivity; + + inactivity = 0; + inactive = NULL; + /* Go through the list of TIME_WAIT pcbs and get the oldest pcb. */ + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + if ((u32_t)(tcp_ticks - pcb->tmr) >= inactivity) { + inactivity = tcp_ticks - pcb->tmr; + inactive = pcb; + } + } + if (inactive != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_kill_timewait: killing oldest TIME-WAIT PCB %p (%"S32_F")\n", + (void *)inactive, inactivity)); + tcp_abort(inactive); + } +} + +/** + * Allocate a new tcp_pcb structure. + * + * @param prio priority for the new pcb + * @return a new tcp_pcb that initially is in state CLOSED + */ +struct tcp_pcb * +tcp_alloc(u8_t prio) +{ + struct tcp_pcb *pcb; + u32_t iss; + + pcb = memp_malloc(MEMP_TCP_PCB); + if (pcb == NULL) { + /* Try killing oldest connection in TIME-WAIT. */ + LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing off oldest TIME-WAIT connection\n")); + tcp_kill_timewait(); + /* Try to allocate a tcp_pcb again. */ + pcb = memp_malloc(MEMP_TCP_PCB); + if (pcb == NULL) { + /* Try killing active connections with lower priority than the new one. */ + LWIP_DEBUGF(TCP_DEBUG, ("tcp_alloc: killing connection with prio lower than %d\n", prio)); + tcp_kill_prio(prio); + /* Try to allocate a tcp_pcb again. */ + pcb = memp_malloc(MEMP_TCP_PCB); + if (pcb != NULL) { + /* adjust err stats: memp_malloc failed twice before */ + MEMP_STATS_DEC(err, MEMP_TCP_PCB); + } + } + if (pcb != NULL) { + /* adjust err stats: timewait PCB was freed above */ + MEMP_STATS_DEC(err, MEMP_TCP_PCB); + } + } + if (pcb != NULL) { + memset(pcb, 0, sizeof(struct tcp_pcb)); + pcb->prio = TCP_PRIO_NORMAL; + pcb->snd_buf = TCP_SND_BUF; + pcb->snd_queuelen = 0; + pcb->rcv_wnd = TCP_WND; + pcb->rcv_ann_wnd = TCP_WND; + pcb->tos = 0; + pcb->ttl = TCP_TTL; + /* As initial send MSS, we use TCP_MSS but limit it to 536. + The send MSS is updated when an MSS option is received. */ + pcb->mss = (TCP_MSS > 536) ? 536 : TCP_MSS; + pcb->rto = 3000 / TCP_SLOW_INTERVAL; + pcb->sa = 0; + pcb->sv = 3000 / TCP_SLOW_INTERVAL; + pcb->rtime = -1; + pcb->cwnd = 1; + iss = tcp_next_iss(); + pcb->snd_wl2 = iss; + pcb->snd_nxt = iss; + pcb->lastack = iss; + pcb->snd_lbb = iss; + pcb->tmr = tcp_ticks; + + pcb->polltmr = 0; + +#if LWIP_CALLBACK_API + pcb->recv = tcp_recv_null; +#endif /* LWIP_CALLBACK_API */ + + /* Init KEEPALIVE timer */ + pcb->keep_idle = TCP_KEEPIDLE_DEFAULT; + +#if LWIP_TCP_KEEPALIVE + pcb->keep_intvl = TCP_KEEPINTVL_DEFAULT; + pcb->keep_cnt = TCP_KEEPCNT_DEFAULT; +#endif /* LWIP_TCP_KEEPALIVE */ + + pcb->keep_cnt_sent = 0; + } + return pcb; +} + +/** + * Creates a new TCP protocol control block but doesn't place it on + * any of the TCP PCB lists. + * The pcb is not put on any list until binding using tcp_bind(). + * + * @internal: Maybe there should be a idle TCP PCB list where these + * PCBs are put on. Port reservation using tcp_bind() is implemented but + * allocated pcbs that are not bound can't be killed automatically if wanting + * to allocate a pcb with higher prio (@see tcp_kill_prio()) + * + * @return a new tcp_pcb that initially is in state CLOSED + */ +struct tcp_pcb * +tcp_new(void) +{ + return tcp_alloc(TCP_PRIO_NORMAL); +} + +/** + * Used to specify the argument that should be passed callback + * functions. + * + * @param pcb tcp_pcb to set the callback argument + * @param arg void pointer argument to pass to callback functions + */ +void +tcp_arg(struct tcp_pcb *pcb, void *arg) +{ + pcb->callback_arg = arg; +} +#if LWIP_CALLBACK_API + +/** + * Used to specify the function that should be called when a TCP + * connection receives data. + * + * @param pcb tcp_pcb to set the recv callback + * @param recv callback function to call for this pcb when data is received + */ +void +tcp_recv(struct tcp_pcb *pcb, + err_t (* recv)(void *arg, struct tcp_pcb *tpcb, struct pbuf *p, err_t err)) +{ + pcb->recv = recv; +} + +/** + * Used to specify the function that should be called when TCP data + * has been successfully delivered to the remote host. + * + * @param pcb tcp_pcb to set the sent callback + * @param sent callback function to call for this pcb when data is successfully sent + */ +void +tcp_sent(struct tcp_pcb *pcb, + err_t (* sent)(void *arg, struct tcp_pcb *tpcb, u16_t len)) +{ + pcb->sent = sent; +} + +/** + * Used to specify the function that should be called when a fatal error + * has occured on the connection. + * + * @param pcb tcp_pcb to set the err callback + * @param errf callback function to call for this pcb when a fatal error + * has occured on the connection + */ +void +tcp_err(struct tcp_pcb *pcb, + void (* errf)(void *arg, err_t err)) +{ + pcb->errf = errf; +} + +/** + * Used for specifying the function that should be called when a + * LISTENing connection has been connected to another host. + * + * @param pcb tcp_pcb to set the accept callback + * @param accept callback function to call for this pcb when LISTENing + * connection has been connected to another host + */ +void +tcp_accept(struct tcp_pcb *pcb, + err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err)) +{ + pcb->accept = accept; +} +#endif /* LWIP_CALLBACK_API */ + + +/** + * Used to specify the function that should be called periodically + * from TCP. The interval is specified in terms of the TCP coarse + * timer interval, which is called twice a second. + * + */ +void +tcp_poll(struct tcp_pcb *pcb, + err_t (* poll)(void *arg, struct tcp_pcb *tpcb), u8_t interval) +{ +#if LWIP_CALLBACK_API + pcb->poll = poll; +#endif /* LWIP_CALLBACK_API */ + pcb->pollinterval = interval; +} + +/** + * Purges a TCP PCB. Removes any buffered data and frees the buffer memory + * (pcb->ooseq, pcb->unsent and pcb->unacked are freed). + * + * @param pcb tcp_pcb to purge. The pcb itself is not deallocated! + */ +void +tcp_pcb_purge(struct tcp_pcb *pcb) +{ + if (pcb->state != CLOSED && + pcb->state != TIME_WAIT && + pcb->state != LISTEN) { + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge\n")); + +#if TCP_LISTEN_BACKLOG + if (pcb->state == SYN_RCVD) { + /* Need to find the corresponding listen_pcb and decrease its accepts_pending */ + struct tcp_pcb_listen *lpcb; + LWIP_ASSERT("tcp_pcb_purge: pcb->state == SYN_RCVD but tcp_listen_pcbs is NULL", + tcp_listen_pcbs.listen_pcbs != NULL); + for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { + if ((lpcb->local_port == pcb->local_port) && + (ip_addr_isany(&lpcb->local_ip) || + ip_addr_cmp(&pcb->local_ip, &lpcb->local_ip))) { + /* port and address of the listen pcb match the timed-out pcb */ + LWIP_ASSERT("tcp_pcb_purge: listen pcb does not have accepts pending", + lpcb->accepts_pending > 0); + lpcb->accepts_pending--; + break; + } + } + } +#endif /* TCP_LISTEN_BACKLOG */ + + + if (pcb->refused_data != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->refused_data\n")); + pbuf_free(pcb->refused_data); + pcb->refused_data = NULL; + } + if (pcb->unsent != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: not all data sent\n")); + } + if (pcb->unacked != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->unacked\n")); + } +#if TCP_QUEUE_OOSEQ /* LW */ + if (pcb->ooseq != NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_pcb_purge: data left on ->ooseq\n")); + } + + /* Stop the retransmission timer as it will expect data on unacked + queue if it fires */ + pcb->rtime = -1; + + tcp_segs_free(pcb->ooseq); + pcb->ooseq = NULL; +#endif /* TCP_QUEUE_OOSEQ */ + tcp_segs_free(pcb->unsent); + tcp_segs_free(pcb->unacked); + pcb->unacked = pcb->unsent = NULL; + } +} + +/** + * Purges the PCB and removes it from a PCB list. Any delayed ACKs are sent first. + * + * @param pcblist PCB list to purge. + * @param pcb tcp_pcb to purge. The pcb itself is NOT deallocated! + */ +void +tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb) +{ + TCP_RMV(pcblist, pcb); + + tcp_pcb_purge(pcb); + + /* if there is an outstanding delayed ACKs, send it */ + if (pcb->state != TIME_WAIT && + pcb->state != LISTEN && + pcb->flags & TF_ACK_DELAY) { + pcb->flags |= TF_ACK_NOW; + tcp_output(pcb); + } + + if (pcb->state != LISTEN) { + LWIP_ASSERT("unsent segments leaking", pcb->unsent == NULL); + LWIP_ASSERT("unacked segments leaking", pcb->unacked == NULL); +#if TCP_QUEUE_OOSEQ + LWIP_ASSERT("ooseq segments leaking", pcb->ooseq == NULL); +#endif /* TCP_QUEUE_OOSEQ */ + } + + pcb->state = CLOSED; + + LWIP_ASSERT("tcp_pcb_remove: tcp_pcbs_sane()", tcp_pcbs_sane()); +} + +/** + * Calculates a new initial sequence number for new connections. + * + * @return u32_t pseudo random sequence number + */ +u32_t +tcp_next_iss(void) +{ + static u32_t iss = 6510; + + iss += tcp_ticks; /* XXX */ + return iss; +} + +#if TCP_CALCULATE_EFF_SEND_MSS +/** + * Calcluates the effective send mss that can be used for a specific IP address + * by using ip_route to determin the netif used to send to the address and + * calculating the minimum of TCP_MSS and that netif's mtu (if set). + */ +u16_t +tcp_eff_send_mss(u16_t sendmss, struct ip_addr *addr) +{ + u16_t mss_s; + struct netif *outif; + + outif = ip_route(addr); + if ((outif != NULL) && (outif->mtu != 0)) { + mss_s = outif->mtu - IP_HLEN - TCP_HLEN; + /* RFC 1122, chap 4.2.2.6: + * Eff.snd.MSS = min(SendMSS+20, MMS_S) - TCPhdrsize - IPoptionsize + * We correct for TCP options in tcp_enqueue(), and don't support + * IP options + */ + sendmss = LWIP_MIN(sendmss, mss_s); + } + return sendmss; +} +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + +const char* +tcp_debug_state_str(enum tcp_state s) +{ + return tcp_state_str[s]; +} + +#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG +/** + * Print a tcp header for debugging purposes. + * + * @param tcphdr pointer to a struct tcp_hdr + */ +void +tcp_debug_print(struct tcp_hdr *tcphdr) +{ + LWIP_DEBUGF(TCP_DEBUG, ("TCP header:\n")); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", + ntohs(tcphdr->src), ntohs(tcphdr->dest))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (seq no)\n", + ntohl(tcphdr->seqno))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %010"U32_F" | (ack no)\n", + ntohl(tcphdr->ackno))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| %2"U16_F" | |%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"%"U16_F"| %5"U16_F" | (hdrlen, flags (", + TCPH_HDRLEN(tcphdr), + TCPH_FLAGS(tcphdr) >> 5 & 1, + TCPH_FLAGS(tcphdr) >> 4 & 1, + TCPH_FLAGS(tcphdr) >> 3 & 1, + TCPH_FLAGS(tcphdr) >> 2 & 1, + TCPH_FLAGS(tcphdr) >> 1 & 1, + TCPH_FLAGS(tcphdr) & 1, + ntohs(tcphdr->wnd))); + tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); + LWIP_DEBUGF(TCP_DEBUG, ("), win)\n")); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(TCP_DEBUG, ("| 0x%04"X16_F" | %5"U16_F" | (chksum, urgp)\n", + ntohs(tcphdr->chksum), ntohs(tcphdr->urgp))); + LWIP_DEBUGF(TCP_DEBUG, ("+-------------------------------+\n")); +} + +/** + * Print a tcp state for debugging purposes. + * + * @param s enum tcp_state to print + */ +void +tcp_debug_print_state(enum tcp_state s) +{ + LWIP_DEBUGF(TCP_DEBUG, ("State: %s\n", tcp_state_str[s])); +} + +/** + * Print tcp flags for debugging purposes. + * + * @param flags tcp flags, all active flags are printed + */ +void +tcp_debug_print_flags(u8_t flags) +{ + if (flags & TCP_FIN) { + LWIP_DEBUGF(TCP_DEBUG, ("FIN ")); + } + if (flags & TCP_SYN) { + LWIP_DEBUGF(TCP_DEBUG, ("SYN ")); + } + if (flags & TCP_RST) { + LWIP_DEBUGF(TCP_DEBUG, ("RST ")); + } + if (flags & TCP_PSH) { + LWIP_DEBUGF(TCP_DEBUG, ("PSH ")); + } + if (flags & TCP_ACK) { + LWIP_DEBUGF(TCP_DEBUG, ("ACK ")); + } + if (flags & TCP_URG) { + LWIP_DEBUGF(TCP_DEBUG, ("URG ")); + } + if (flags & TCP_ECE) { + LWIP_DEBUGF(TCP_DEBUG, ("ECE ")); + } + if (flags & TCP_CWR) { + LWIP_DEBUGF(TCP_DEBUG, ("CWR ")); + } + LWIP_DEBUGF(TCP_DEBUG, ("\n")); +} + +/** + * Print all tcp_pcbs in every list for debugging purposes. + */ +void +tcp_debug_print_pcbs(void) +{ + struct tcp_pcb *pcb; + LWIP_DEBUGF(TCP_DEBUG, ("Active PCB states:\n")); + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", + pcb->local_port, pcb->remote_port, + pcb->snd_nxt, pcb->rcv_nxt)); + tcp_debug_print_state(pcb->state); + } + LWIP_DEBUGF(TCP_DEBUG, ("Listen PCB states:\n")); + for(pcb = (struct tcp_pcb *)tcp_listen_pcbs.pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", + pcb->local_port, pcb->remote_port, + pcb->snd_nxt, pcb->rcv_nxt)); + tcp_debug_print_state(pcb->state); + } + LWIP_DEBUGF(TCP_DEBUG, ("TIME-WAIT PCB states:\n")); + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_DEBUGF(TCP_DEBUG, ("Local port %"U16_F", foreign port %"U16_F" snd_nxt %"U32_F" rcv_nxt %"U32_F" ", + pcb->local_port, pcb->remote_port, + pcb->snd_nxt, pcb->rcv_nxt)); + tcp_debug_print_state(pcb->state); + } +} + +/** + * Check state consistency of the tcp_pcb lists. + */ +s16_t +tcp_pcbs_sane(void) +{ + struct tcp_pcb *pcb; + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != CLOSED", pcb->state != CLOSED); + LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != LISTEN", pcb->state != LISTEN); + LWIP_ASSERT("tcp_pcbs_sane: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); + } + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_pcbs_sane: tw pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); + } + return 1; +} +#endif /* TCP_DEBUG */ + +#endif /* LWIP_TCP */ diff --git a/bertos/net/lwip/src/core/tcp_in.c b/bertos/net/lwip/src/core/tcp_in.c new file mode 100644 index 0000000..51e8775 --- /dev/null +++ b/bertos/net/lwip/src/core/tcp_in.c @@ -0,0 +1,1506 @@ +/** + * @file + * Transmission Control Protocol, incoming traffic + * + * The input processing functions of the TCP layer. + * + * These functions are generally called in the order (ip_input() ->) + * tcp_input() -> * tcp_process() -> tcp_receive() (-> application). + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/tcp.h" +#include "lwip/def.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "arch/perf.h" + +/* These variables are global to all functions involved in the input + processing of TCP segments. They are set by the tcp_input() + function. */ +static struct tcp_seg inseg; +static struct tcp_hdr *tcphdr; +static struct ip_hdr *iphdr; +static u32_t seqno, ackno; +static u8_t flags; +static u16_t tcplen; + +static u8_t recv_flags; +static struct pbuf *recv_data; + +struct tcp_pcb *tcp_input_pcb; + +/* Forward declarations. */ +static err_t tcp_process(struct tcp_pcb *pcb); +static void tcp_receive(struct tcp_pcb *pcb); +static void tcp_parseopt(struct tcp_pcb *pcb); + +static err_t tcp_listen_input(struct tcp_pcb_listen *pcb); +static err_t tcp_timewait_input(struct tcp_pcb *pcb); + +/** + * The initial input processing of TCP. It verifies the TCP header, demultiplexes + * the segment between the PCBs and passes it on to tcp_process(), which implements + * the TCP finite state machine. This function is called by the IP layer (in + * ip_input()). + * + * @param p received TCP segment to process (p->payload pointing to the IP header) + * @param inp network interface on which this segment was received + */ +void +tcp_input(struct pbuf *p, struct netif *inp) +{ + struct tcp_pcb *pcb, *prev; + struct tcp_pcb_listen *lpcb; + u8_t hdrlen; + err_t err; + + PERF_START; + + TCP_STATS_INC(tcp.recv); + snmp_inc_tcpinsegs(); + + iphdr = p->payload; + tcphdr = (struct tcp_hdr *)((u8_t *)p->payload + IPH_HL(iphdr) * 4); + +#if TCP_INPUT_DEBUG + tcp_debug_print(tcphdr); +#endif + + /* remove header from payload */ + if (pbuf_header(p, -((s16_t)(IPH_HL(iphdr) * 4))) || (p->tot_len < sizeof(struct tcp_hdr))) { + /* drop short packets */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: short packet (%"U16_F" bytes) discarded\n", p->tot_len)); + TCP_STATS_INC(tcp.lenerr); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + + /* Don't even process incoming broadcasts/multicasts. */ + if (ip_addr_isbroadcast(&(iphdr->dest), inp) || + ip_addr_ismulticast(&(iphdr->dest))) { + TCP_STATS_INC(tcp.proterr); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + +#if CHECKSUM_CHECK_TCP + /* Verify TCP checksum. */ + if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), + (struct ip_addr *)&(iphdr->dest), + IP_PROTO_TCP, p->tot_len) != 0) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packet discarded due to failing checksum 0x%04"X16_F"\n", + inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), (struct ip_addr *)&(iphdr->dest), + IP_PROTO_TCP, p->tot_len))); +#if TCP_DEBUG + tcp_debug_print(tcphdr); +#endif /* TCP_DEBUG */ + TCP_STATS_INC(tcp.chkerr); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } +#endif + + /* Move the payload pointer in the pbuf so that it points to the + TCP data instead of the TCP header. */ + hdrlen = TCPH_HDRLEN(tcphdr); + if(pbuf_header(p, -(hdrlen * 4))){ + /* drop short packets */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: short packet\n")); + TCP_STATS_INC(tcp.lenerr); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + + /* Convert fields in TCP header to host byte order. */ + tcphdr->src = ntohs(tcphdr->src); + tcphdr->dest = ntohs(tcphdr->dest); + seqno = tcphdr->seqno = ntohl(tcphdr->seqno); + ackno = tcphdr->ackno = ntohl(tcphdr->ackno); + tcphdr->wnd = ntohs(tcphdr->wnd); + + flags = TCPH_FLAGS(tcphdr); + tcplen = p->tot_len + ((flags & (TCP_FIN | TCP_SYN)) ? 1 : 0); + + /* Demultiplex an incoming segment. First, we check if it is destined + for an active connection. */ + prev = NULL; + + + for(pcb = tcp_active_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_input: active pcb->state != CLOSED", pcb->state != CLOSED); + LWIP_ASSERT("tcp_input: active pcb->state != TIME-WAIT", pcb->state != TIME_WAIT); + LWIP_ASSERT("tcp_input: active pcb->state != LISTEN", pcb->state != LISTEN); + if (pcb->remote_port == tcphdr->src && + pcb->local_port == tcphdr->dest && + ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)) && + ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest))) { + + /* Move this PCB to the front of the list so that subsequent + lookups will be faster (we exploit locality in TCP segment + arrivals). */ + LWIP_ASSERT("tcp_input: pcb->next != pcb (before cache)", pcb->next != pcb); + if (prev != NULL) { + prev->next = pcb->next; + pcb->next = tcp_active_pcbs; + tcp_active_pcbs = pcb; + } + LWIP_ASSERT("tcp_input: pcb->next != pcb (after cache)", pcb->next != pcb); + break; + } + prev = pcb; + } + + if (pcb == NULL) { + /* If it did not go to an active connection, we check the connections + in the TIME-WAIT state. */ + for(pcb = tcp_tw_pcbs; pcb != NULL; pcb = pcb->next) { + LWIP_ASSERT("tcp_input: TIME-WAIT pcb->state == TIME-WAIT", pcb->state == TIME_WAIT); + if (pcb->remote_port == tcphdr->src && + pcb->local_port == tcphdr->dest && + ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)) && + ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest))) { + /* We don't really care enough to move this PCB to the front + of the list since we are not very likely to receive that + many segments for connections in TIME-WAIT. */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for TIME_WAITing connection.\n")); + tcp_timewait_input(pcb); + pbuf_free(p); + return; + } + } + + /* Finally, if we still did not get a match, we check all PCBs that + are LISTENing for incoming connections. */ + prev = NULL; + for(lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) { + if ((ip_addr_isany(&(lpcb->local_ip)) || + ip_addr_cmp(&(lpcb->local_ip), &(iphdr->dest))) && + lpcb->local_port == tcphdr->dest) { + /* Move this PCB to the front of the list so that subsequent + lookups will be faster (we exploit locality in TCP segment + arrivals). */ + if (prev != NULL) { + ((struct tcp_pcb_listen *)prev)->next = lpcb->next; + /* our successor is the remainder of the listening list */ + lpcb->next = tcp_listen_pcbs.listen_pcbs; + /* put this listening pcb at the head of the listening list */ + tcp_listen_pcbs.listen_pcbs = lpcb; + } + + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: packed for LISTENing connection.\n")); + tcp_listen_input(lpcb); + pbuf_free(p); + return; + } + prev = (struct tcp_pcb *)lpcb; + } + } + +#if TCP_INPUT_DEBUG + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("+-+-+-+-+-+-+-+-+-+-+-+-+-+- tcp_input: flags ")); + tcp_debug_print_flags(TCPH_FLAGS(tcphdr)); + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("-+-+-+-+-+-+-+-+-+-+-+-+-+-+\n")); +#endif /* TCP_INPUT_DEBUG */ + + + if (pcb != NULL) { + /* The incoming segment belongs to a connection. */ +#if TCP_INPUT_DEBUG +#if TCP_DEBUG + tcp_debug_print_state(pcb->state); +#endif /* TCP_DEBUG */ +#endif /* TCP_INPUT_DEBUG */ + + /* Set up a tcp_seg structure. */ + inseg.next = NULL; + inseg.len = p->tot_len; + inseg.dataptr = p->payload; + inseg.p = p; + inseg.tcphdr = tcphdr; + + recv_data = NULL; + recv_flags = 0; + + /* If there is data which was previously "refused" by upper layer */ + if (pcb->refused_data != NULL) { + /* Notify again application with data previously received. */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: notify kept packet\n")); + TCP_EVENT_RECV(pcb, pcb->refused_data, ERR_OK, err); + if (err == ERR_OK) { + pcb->refused_data = NULL; + } else { + /* drop incoming packets, because pcb is "full" */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: drop incoming packets, because pcb is \"full\"\n")); + TCP_STATS_INC(tcp.drop); + snmp_inc_tcpinerrs(); + pbuf_free(p); + return; + } + } + tcp_input_pcb = pcb; + err = tcp_process(pcb); + /* A return value of ERR_ABRT means that tcp_abort() was called + and that the pcb has been freed. If so, we don't do anything. */ + if (err != ERR_ABRT) { + if (recv_flags & TF_RESET) { + /* TF_RESET means that the connection was reset by the other + end. We then call the error callback to inform the + application that the connection is dead before we + deallocate the PCB. */ + TCP_EVENT_ERR(pcb->errf, pcb->callback_arg, ERR_RST); + tcp_pcb_remove(&tcp_active_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + } else if (recv_flags & TF_CLOSED) { + /* The connection has been closed and we will deallocate the + PCB. */ + tcp_pcb_remove(&tcp_active_pcbs, pcb); + memp_free(MEMP_TCP_PCB, pcb); + } else { + err = ERR_OK; + /* If the application has registered a "sent" function to be + called when new send buffer space is available, we call it + now. */ + if (pcb->acked > 0) { + TCP_EVENT_SENT(pcb, pcb->acked, err); + } + + if (recv_data != NULL) { + if(flags & TCP_PSH) { + recv_data->flags |= PBUF_FLAG_PUSH; + } + + /* Notify application that data has been received. */ + TCP_EVENT_RECV(pcb, recv_data, ERR_OK, err); + + /* If the upper layer can't receive this data, store it */ + if (err != ERR_OK) { + pcb->refused_data = recv_data; + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_input: keep incoming packet, because pcb is \"full\"\n")); + } + } + + /* If a FIN segment was received, we call the callback + function with a NULL buffer to indicate EOF. */ + if (recv_flags & TF_GOT_FIN) { + TCP_EVENT_RECV(pcb, NULL, ERR_OK, err); + } + + tcp_input_pcb = NULL; + /* Try to send something out. */ + tcp_output(pcb); +#if TCP_INPUT_DEBUG +#if TCP_DEBUG + tcp_debug_print_state(pcb->state); +#endif /* TCP_DEBUG */ +#endif /* TCP_INPUT_DEBUG */ + } + } + tcp_input_pcb = NULL; + + + /* give up our reference to inseg.p */ + if (inseg.p != NULL) + { + pbuf_free(inseg.p); + inseg.p = NULL; + } + } else { + + /* If no matching PCB was found, send a TCP RST (reset) to the + sender. */ + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_input: no PCB match found, resetting.\n")); + if (!(TCPH_FLAGS(tcphdr) & TCP_RST)) { + TCP_STATS_INC(tcp.proterr); + TCP_STATS_INC(tcp.drop); + tcp_rst(ackno, seqno + tcplen, + &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + } + pbuf_free(p); + } + + LWIP_ASSERT("tcp_input: tcp_pcbs_sane()", tcp_pcbs_sane()); + PERF_STOP("tcp_input"); +} + +/** + * Called by tcp_input() when a segment arrives for a listening + * connection (from tcp_input()). + * + * @param pcb the tcp_pcb_listen for which a segment arrived + * @return ERR_OK if the segment was processed + * another err_t on error + * + * @note the return value is not (yet?) used in tcp_input() + * @note the segment which arrived is saved in global variables, therefore only the pcb + * involved is passed as a parameter to this function + */ +static err_t +tcp_listen_input(struct tcp_pcb_listen *pcb) +{ + struct tcp_pcb *npcb; + err_t rc; + + /* In the LISTEN state, we check for incoming SYN segments, + creates a new PCB, and responds with a SYN|ACK. */ + if (flags & TCP_ACK) { + /* For incoming segments with the ACK flag set, respond with a + RST. */ + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_listen_input: ACK in LISTEN, sending reset\n")); + tcp_rst(ackno + 1, seqno + tcplen, + &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + } else if (flags & TCP_SYN) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection request %"U16_F" -> %"U16_F".\n", tcphdr->src, tcphdr->dest)); +#if TCP_LISTEN_BACKLOG + if (pcb->accepts_pending >= pcb->backlog) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_listen_input: listen backlog exceeded for port %"U16_F"\n", tcphdr->dest)); + return ERR_ABRT; + } +#endif /* TCP_LISTEN_BACKLOG */ + npcb = tcp_alloc(pcb->prio); + /* If a new PCB could not be created (probably due to lack of memory), + we don't do anything, but rely on the sender will retransmit the + SYN at a time when we have more memory available. */ + if (npcb == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_listen_input: could not allocate PCB\n")); + TCP_STATS_INC(tcp.memerr); + return ERR_MEM; + } +#if TCP_LISTEN_BACKLOG + pcb->accepts_pending++; +#endif /* TCP_LISTEN_BACKLOG */ + /* Set up the new PCB. */ + ip_addr_set(&(npcb->local_ip), &(iphdr->dest)); + npcb->local_port = pcb->local_port; + ip_addr_set(&(npcb->remote_ip), &(iphdr->src)); + npcb->remote_port = tcphdr->src; + npcb->state = SYN_RCVD; + npcb->rcv_nxt = seqno + 1; + npcb->rcv_ann_right_edge = npcb->rcv_nxt; + npcb->snd_wnd = tcphdr->wnd; + npcb->ssthresh = npcb->snd_wnd; + npcb->snd_wl1 = seqno - 1;/* initialise to seqno-1 to force window update */ + npcb->callback_arg = pcb->callback_arg; +#if LWIP_CALLBACK_API + npcb->accept = pcb->accept; +#endif /* LWIP_CALLBACK_API */ + /* inherit socket options */ + npcb->so_options = pcb->so_options & (SOF_DEBUG|SOF_DONTROUTE|SOF_KEEPALIVE|SOF_OOBINLINE|SOF_LINGER); + /* Register the new PCB so that we can begin receiving segments + for it. */ + TCP_REG(&tcp_active_pcbs, npcb); + + /* Parse any options in the SYN. */ + tcp_parseopt(npcb); +#if TCP_CALCULATE_EFF_SEND_MSS + npcb->mss = tcp_eff_send_mss(npcb->mss, &(npcb->remote_ip)); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + + snmp_inc_tcppassiveopens(); + + /* Send a SYN|ACK together with the MSS option. */ + rc = tcp_enqueue(npcb, NULL, 0, TCP_SYN | TCP_ACK, 0, TF_SEG_OPTS_MSS +#if LWIP_TCP_TIMESTAMPS + /* and maybe include the TIMESTAMP option */ + | (npcb->flags & TF_TIMESTAMP ? TF_SEG_OPTS_TS : 0) +#endif + ); + if (rc != ERR_OK) { + tcp_abandon(npcb, 0); + return rc; + } + return tcp_output(npcb); + } + return ERR_OK; +} + +/** + * Called by tcp_input() when a segment arrives for a connection in + * TIME_WAIT. + * + * @param pcb the tcp_pcb for which a segment arrived + * + * @note the segment which arrived is saved in global variables, therefore only the pcb + * involved is passed as a parameter to this function + */ +static err_t +tcp_timewait_input(struct tcp_pcb *pcb) +{ + /* RFC 1337: in TIME_WAIT, ignore RST and ACK FINs + any 'acceptable' segments */ + /* RFC 793 3.9 Event Processing - Segment Arrives: + * - first check sequence number - we skip that one in TIME_WAIT (always + * acceptable since we only send ACKs) + * - second check the RST bit (... return) */ + if (flags & TCP_RST) { + return ERR_OK; + } + /* - fourth, check the SYN bit, */ + if (flags & TCP_SYN) { + /* If an incoming segment is not acceptable, an acknowledgment + should be sent in reply */ + if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt+pcb->rcv_wnd)) { + /* If the SYN is in the window it is an error, send a reset */ + tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + return ERR_OK; + } + } else if (flags & TCP_FIN) { + /* - eighth, check the FIN bit: Remain in the TIME-WAIT state. + Restart the 2 MSL time-wait timeout.*/ + pcb->tmr = tcp_ticks; + } + + if ((tcplen > 0)) { + /* Acknowledge data, FIN or out-of-window SYN */ + pcb->flags |= TF_ACK_NOW; + return tcp_output(pcb); + } + return ERR_OK; +} + +/** + * Implements the TCP state machine. Called by tcp_input. In some + * states tcp_receive() is called to receive data. The tcp_seg + * argument will be freed by the caller (tcp_input()) unless the + * recv_data pointer in the pcb is set. + * + * @param pcb the tcp_pcb for which a segment arrived + * + * @note the segment which arrived is saved in global variables, therefore only the pcb + * involved is passed as a parameter to this function + */ +static err_t +tcp_process(struct tcp_pcb *pcb) +{ + struct tcp_seg *rseg; + u8_t acceptable = 0; + err_t err; + + err = ERR_OK; + + /* Process incoming RST segments. */ + if (flags & TCP_RST) { + /* First, determine if the reset is acceptable. */ + if (pcb->state == SYN_SENT) { + if (ackno == pcb->snd_nxt) { + acceptable = 1; + } + } else { + if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, + pcb->rcv_nxt+pcb->rcv_wnd)) { + acceptable = 1; + } + } + + if (acceptable) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: Connection RESET\n")); + LWIP_ASSERT("tcp_input: pcb->state != CLOSED", pcb->state != CLOSED); + recv_flags |= TF_RESET; + pcb->flags &= ~TF_ACK_DELAY; + return ERR_RST; + } else { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", + seqno, pcb->rcv_nxt)); + LWIP_DEBUGF(TCP_DEBUG, ("tcp_process: unacceptable reset seqno %"U32_F" rcv_nxt %"U32_F"\n", + seqno, pcb->rcv_nxt)); + return ERR_OK; + } + } + + if ((flags & TCP_SYN) && (pcb->state != SYN_SENT && pcb->state != SYN_RCVD)) { + /* Cope with new connection attempt after remote end crashed */ + tcp_ack_now(pcb); + return ERR_OK; + } + + /* Update the PCB (in)activity timer. */ + pcb->tmr = tcp_ticks; + pcb->keep_cnt_sent = 0; + + tcp_parseopt(pcb); + + /* Do different things depending on the TCP state. */ + switch (pcb->state) { + case SYN_SENT: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("SYN-SENT: ackno %"U32_F" pcb->snd_nxt %"U32_F" unacked %"U32_F"\n", ackno, + pcb->snd_nxt, ntohl(pcb->unacked->tcphdr->seqno))); + /* received SYN ACK with expected sequence number? */ + if ((flags & TCP_ACK) && (flags & TCP_SYN) + && ackno == ntohl(pcb->unacked->tcphdr->seqno) + 1) { + pcb->snd_buf++; + pcb->rcv_nxt = seqno + 1; + pcb->rcv_ann_right_edge = pcb->rcv_nxt; + pcb->lastack = ackno; + pcb->snd_wnd = tcphdr->wnd; + pcb->snd_wl1 = seqno - 1; /* initialise to seqno - 1 to force window update */ + pcb->state = ESTABLISHED; + +#if TCP_CALCULATE_EFF_SEND_MSS + pcb->mss = tcp_eff_send_mss(pcb->mss, &(pcb->remote_ip)); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + + /* Set ssthresh again after changing pcb->mss (already set in tcp_connect + * but for the default value of pcb->mss) */ + pcb->ssthresh = pcb->mss * 10; + + pcb->cwnd = ((pcb->cwnd == 1) ? (pcb->mss * 2) : pcb->mss); + LWIP_ASSERT("pcb->snd_queuelen > 0", (pcb->snd_queuelen > 0)); + --pcb->snd_queuelen; + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_process: SYN-SENT --queuelen %"U16_F"\n", (u16_t)pcb->snd_queuelen)); + rseg = pcb->unacked; + pcb->unacked = rseg->next; + + /* If there's nothing left to acknowledge, stop the retransmit + timer, otherwise reset it to start again */ + if(pcb->unacked == NULL) + pcb->rtime = -1; + else { + pcb->rtime = 0; + pcb->nrtx = 0; + } + + tcp_seg_free(rseg); + + /* Call the user specified function to call when sucessfully + * connected. */ + TCP_EVENT_CONNECTED(pcb, ERR_OK, err); + tcp_ack_now(pcb); + } + /* received ACK? possibly a half-open connection */ + else if (flags & TCP_ACK) { + /* send a RST to bring the other side in a non-synchronized state. */ + tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + } + break; + case SYN_RCVD: + if (flags & TCP_ACK) { + /* expected ACK number? */ + if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_nxt)) { + u16_t old_cwnd; + pcb->state = ESTABLISHED; + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection established %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); +#if LWIP_CALLBACK_API + LWIP_ASSERT("pcb->accept != NULL", pcb->accept != NULL); +#endif + /* Call the accept function. */ + TCP_EVENT_ACCEPT(pcb, ERR_OK, err); + if (err != ERR_OK) { + /* If the accept function returns with an error, we abort + * the connection. */ + tcp_abort(pcb); + return ERR_ABRT; + } + old_cwnd = pcb->cwnd; + /* If there was any data contained within this ACK, + * we'd better pass it on to the application as well. */ + tcp_receive(pcb); + + /* Prevent ACK for SYN to generate a sent event */ + if (pcb->acked != 0) { + pcb->acked--; + } + + pcb->cwnd = ((old_cwnd == 1) ? (pcb->mss * 2) : pcb->mss); + + if (recv_flags & TF_GOT_FIN) { + tcp_ack_now(pcb); + pcb->state = CLOSE_WAIT; + } + } + /* incorrect ACK number */ + else { + /* send RST */ + tcp_rst(ackno, seqno + tcplen, &(iphdr->dest), &(iphdr->src), + tcphdr->dest, tcphdr->src); + } + } else if ((flags & TCP_SYN) && (seqno == pcb->rcv_nxt - 1)) { + /* Looks like another copy of the SYN - retransmit our SYN-ACK */ + tcp_rexmit(pcb); + } + break; + case CLOSE_WAIT: + /* FALLTHROUGH */ + case ESTABLISHED: + tcp_receive(pcb); + if (recv_flags & TF_GOT_FIN) { /* passive close */ + tcp_ack_now(pcb); + pcb->state = CLOSE_WAIT; + } + break; + case FIN_WAIT_1: + tcp_receive(pcb); + if (recv_flags & TF_GOT_FIN) { + if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt)) { + LWIP_DEBUGF(TCP_DEBUG, + ("TCP connection closed: FIN_WAIT_1 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + tcp_ack_now(pcb); + tcp_pcb_purge(pcb); + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + } else { + tcp_ack_now(pcb); + pcb->state = CLOSING; + } + } else if ((flags & TCP_ACK) && (ackno == pcb->snd_nxt)) { + pcb->state = FIN_WAIT_2; + } + break; + case FIN_WAIT_2: + tcp_receive(pcb); + if (recv_flags & TF_GOT_FIN) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: FIN_WAIT_2 %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + tcp_ack_now(pcb); + tcp_pcb_purge(pcb); + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + } + break; + case CLOSING: + tcp_receive(pcb); + if (flags & TCP_ACK && ackno == pcb->snd_nxt) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: CLOSING %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + tcp_pcb_purge(pcb); + TCP_RMV(&tcp_active_pcbs, pcb); + pcb->state = TIME_WAIT; + TCP_REG(&tcp_tw_pcbs, pcb); + } + break; + case LAST_ACK: + tcp_receive(pcb); + if (flags & TCP_ACK && ackno == pcb->snd_nxt) { + LWIP_DEBUGF(TCP_DEBUG, ("TCP connection closed: LAST_ACK %"U16_F" -> %"U16_F".\n", inseg.tcphdr->src, inseg.tcphdr->dest)); + /* bugfix #21699: don't set pcb->state to CLOSED here or we risk leaking segments */ + recv_flags |= TF_CLOSED; + } + break; + default: + break; + } + return ERR_OK; +} + +#if TCP_QUEUE_OOSEQ +/** + * Insert segment into the list (segments covered with new one will be deleted) + * + * Called from tcp_receive() + */ +static void +tcp_oos_insert_segment(struct tcp_seg *cseg, struct tcp_seg *next) +{ + struct tcp_seg *old_seg; + + if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { + /* received segment overlaps all following segments */ + tcp_segs_free(next); + next = NULL; + } + else { + /* delete some following segments + oos queue may have segments with FIN flag */ + while (next && + TCP_SEQ_GEQ((seqno + cseg->len), + (next->tcphdr->seqno + next->len))) { + /* cseg with FIN already processed */ + if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { + TCPH_FLAGS_SET(cseg->tcphdr, TCPH_FLAGS(cseg->tcphdr) | TCP_FIN); + } + old_seg = next; + next = next->next; + tcp_seg_free(old_seg); + } + if (next && + TCP_SEQ_GT(seqno + cseg->len, next->tcphdr->seqno)) { + /* We need to trim the incoming segment. */ + cseg->len = (u16_t)(next->tcphdr->seqno - seqno); + pbuf_realloc(cseg->p, cseg->len); + } + } + cseg->next = next; +} +#endif + +/** + * Called by tcp_process. Checks if the given segment is an ACK for outstanding + * data, and if so frees the memory of the buffered data. Next, is places the + * segment on any of the receive queues (pcb->recved or pcb->ooseq). If the segment + * is buffered, the pbuf is referenced by pbuf_ref so that it will not be freed until + * i it has been removed from the buffer. + * + * If the incoming segment constitutes an ACK for a segment that was used for RTT + * estimation, the RTT is estimated here as well. + * + * Called from tcp_process(). + */ +static void +tcp_receive(struct tcp_pcb *pcb) +{ + struct tcp_seg *next; +#if TCP_QUEUE_OOSEQ + struct tcp_seg *prev, *cseg; +#endif + struct pbuf *p; + s32_t off; + s16_t m; + u32_t right_wnd_edge; + u16_t new_tot_len; + int found_dupack = 0; + + if (flags & TCP_ACK) { + right_wnd_edge = pcb->snd_wnd + pcb->snd_wl2; + + /* Update window. */ + if (TCP_SEQ_LT(pcb->snd_wl1, seqno) || + (pcb->snd_wl1 == seqno && TCP_SEQ_LT(pcb->snd_wl2, ackno)) || + (pcb->snd_wl2 == ackno && tcphdr->wnd > pcb->snd_wnd)) { + pcb->snd_wnd = tcphdr->wnd; + pcb->snd_wl1 = seqno; + pcb->snd_wl2 = ackno; + if (pcb->snd_wnd > 0 && pcb->persist_backoff > 0) { + pcb->persist_backoff = 0; + } + LWIP_DEBUGF(TCP_WND_DEBUG, ("tcp_receive: window update %"U16_F"\n", pcb->snd_wnd)); +#if TCP_WND_DEBUG + } else { + if (pcb->snd_wnd != tcphdr->wnd) { + LWIP_DEBUGF(TCP_WND_DEBUG, + ("tcp_receive: no window update lastack %"U32_F" ackno %" + U32_F" wl1 %"U32_F" seqno %"U32_F" wl2 %"U32_F"\n", + pcb->lastack, ackno, pcb->snd_wl1, seqno, pcb->snd_wl2)); + } +#endif /* TCP_WND_DEBUG */ + } + + /* (From Stevens TCP/IP Illustrated Vol II, p970.) Its only a + * duplicate ack if: + * 1) It doesn't ACK new data + * 2) length of received packet is zero (i.e. no payload) + * 3) the advertised window hasn't changed + * 4) There is outstanding unacknowledged data (retransmission timer running) + * 5) The ACK is == biggest ACK sequence number so far seen (snd_una) + * + * If it passes all five, should process as a dupack: + * a) dupacks < 3: do nothing + * b) dupacks == 3: fast retransmit + * c) dupacks > 3: increase cwnd + * + * If it only passes 1-3, should reset dupack counter (and add to + * stats, which we don't do in lwIP) + * + * If it only passes 1, should reset dupack counter + * + */ + + /* Clause 1 */ + if (TCP_SEQ_LEQ(ackno, pcb->lastack)) { + pcb->acked = 0; + /* Clause 2 */ + if (tcplen == 0) { + /* Clause 3 */ + if (pcb->snd_wl2 + pcb->snd_wnd == right_wnd_edge){ + /* Clause 4 */ + if (pcb->rtime >= 0) { + /* Clause 5 */ + if (pcb->lastack == ackno) { + found_dupack = 1; + if (pcb->dupacks + 1 > pcb->dupacks) + ++pcb->dupacks; + if (pcb->dupacks > 3) { + /* Inflate the congestion window, but not if it means that + the value overflows. */ + if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { + pcb->cwnd += pcb->mss; + } + } else if (pcb->dupacks == 3) { + /* Do fast retransmit */ + tcp_rexmit_fast(pcb); + } + } + } + } + } + /* If Clause (1) or more is true, but not a duplicate ack, reset + * count of consecutive duplicate acks */ + if (!found_dupack) { + pcb->dupacks = 0; + } + } else if (TCP_SEQ_BETWEEN(ackno, pcb->lastack+1, pcb->snd_nxt)){ + /* We come here when the ACK acknowledges new data. */ + + /* Reset the "IN Fast Retransmit" flag, since we are no longer + in fast retransmit. Also reset the congestion window to the + slow start threshold. */ + if (pcb->flags & TF_INFR) { + pcb->flags &= ~TF_INFR; + pcb->cwnd = pcb->ssthresh; + } + + /* Reset the number of retransmissions. */ + pcb->nrtx = 0; + + /* Reset the retransmission time-out. */ + pcb->rto = (pcb->sa >> 3) + pcb->sv; + + /* Update the send buffer space. Diff between the two can never exceed 64K? */ + pcb->acked = (u16_t)(ackno - pcb->lastack); + + pcb->snd_buf += pcb->acked; + + /* Reset the fast retransmit variables. */ + pcb->dupacks = 0; + pcb->lastack = ackno; + + /* Update the congestion control variables (cwnd and + ssthresh). */ + if (pcb->state >= ESTABLISHED) { + if (pcb->cwnd < pcb->ssthresh) { + if ((u16_t)(pcb->cwnd + pcb->mss) > pcb->cwnd) { + pcb->cwnd += pcb->mss; + } + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: slow start cwnd %"U16_F"\n", pcb->cwnd)); + } else { + u16_t new_cwnd = (pcb->cwnd + pcb->mss * pcb->mss / pcb->cwnd); + if (new_cwnd > pcb->cwnd) { + pcb->cwnd = new_cwnd; + } + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_receive: congestion avoidance cwnd %"U16_F"\n", pcb->cwnd)); + } + } + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: ACK for %"U32_F", unacked->seqno %"U32_F":%"U32_F"\n", + ackno, + pcb->unacked != NULL? + ntohl(pcb->unacked->tcphdr->seqno): 0, + pcb->unacked != NULL? + ntohl(pcb->unacked->tcphdr->seqno) + TCP_TCPLEN(pcb->unacked): 0)); + + /* Remove segment from the unacknowledged list if the incoming + ACK acknowlegdes them. */ + while (pcb->unacked != NULL && + TCP_SEQ_LEQ(ntohl(pcb->unacked->tcphdr->seqno) + + TCP_TCPLEN(pcb->unacked), ackno)) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unacked\n", + ntohl(pcb->unacked->tcphdr->seqno), + ntohl(pcb->unacked->tcphdr->seqno) + + TCP_TCPLEN(pcb->unacked))); + + next = pcb->unacked; + pcb->unacked = pcb->unacked->next; + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); + LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= pbuf_clen(next->p))); + /* Prevent ACK for FIN to generate a sent event */ + if ((pcb->acked != 0) && ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0)) { + pcb->acked--; + } + + pcb->snd_queuelen -= pbuf_clen(next->p); + tcp_seg_free(next); + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unacked)\n", (u16_t)pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_receive: valid queue length", pcb->unacked != NULL || + pcb->unsent != NULL); + } + } + + /* If there's nothing left to acknowledge, stop the retransmit + timer, otherwise reset it to start again */ + if(pcb->unacked == NULL) + pcb->rtime = -1; + else + pcb->rtime = 0; + + pcb->polltmr = 0; + } else { + /* Fix bug bug #21582: out of sequence ACK, didn't really ack anything */ + pcb->acked = 0; + } + + /* We go through the ->unsent list to see if any of the segments + on the list are acknowledged by the ACK. This may seem + strange since an "unsent" segment shouldn't be acked. The + rationale is that lwIP puts all outstanding segments on the + ->unsent list after a retransmission, so these segments may + in fact have been sent once. */ + while (pcb->unsent != NULL && + TCP_SEQ_BETWEEN(ackno, ntohl(pcb->unsent->tcphdr->seqno) + + TCP_TCPLEN(pcb->unsent), pcb->snd_nxt)) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: removing %"U32_F":%"U32_F" from pcb->unsent\n", + ntohl(pcb->unsent->tcphdr->seqno), ntohl(pcb->unsent->tcphdr->seqno) + + TCP_TCPLEN(pcb->unsent))); + + next = pcb->unsent; + pcb->unsent = pcb->unsent->next; + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_receive: queuelen %"U16_F" ... ", (u16_t)pcb->snd_queuelen)); + LWIP_ASSERT("pcb->snd_queuelen >= pbuf_clen(next->p)", (pcb->snd_queuelen >= pbuf_clen(next->p))); + /* Prevent ACK for FIN to generate a sent event */ + if ((pcb->acked != 0) && ((TCPH_FLAGS(next->tcphdr) & TCP_FIN) != 0)) { + pcb->acked--; + } + pcb->snd_queuelen -= pbuf_clen(next->p); + tcp_seg_free(next); + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("%"U16_F" (after freeing unsent)\n", (u16_t)pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_receive: valid queue length", + pcb->unacked != NULL || pcb->unsent != NULL); + } + } + /* End of ACK for new data processing. */ + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: pcb->rttest %"U32_F" rtseq %"U32_F" ackno %"U32_F"\n", + pcb->rttest, pcb->rtseq, ackno)); + + /* RTT estimation calculations. This is done by checking if the + incoming segment acknowledges the segment we use to take a + round-trip time measurement. */ + if (pcb->rttest && TCP_SEQ_LT(pcb->rtseq, ackno)) { + /* diff between this shouldn't exceed 32K since this are tcp timer ticks + and a round-trip shouldn't be that long... */ + m = (s16_t)(tcp_ticks - pcb->rttest); + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: experienced rtt %"U16_F" ticks (%"U16_F" msec).\n", + m, m * TCP_SLOW_INTERVAL)); + + /* This is taken directly from VJs original code in his paper */ + m = m - (pcb->sa >> 3); + pcb->sa += m; + if (m < 0) { + m = -m; + } + m = m - (pcb->sv >> 2); + pcb->sv += m; + pcb->rto = (pcb->sa >> 3) + pcb->sv; + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_receive: RTO %"U16_F" (%"U16_F" milliseconds)\n", + pcb->rto, pcb->rto * TCP_SLOW_INTERVAL)); + + pcb->rttest = 0; + } + } + + /* If the incoming segment contains data, we must process it + further. */ + if (tcplen > 0) { + /* This code basically does three things: + + +) If the incoming segment contains data that is the next + in-sequence data, this data is passed to the application. This + might involve trimming the first edge of the data. The rcv_nxt + variable and the advertised window are adjusted. + + +) If the incoming segment has data that is above the next + sequence number expected (->rcv_nxt), the segment is placed on + the ->ooseq queue. This is done by finding the appropriate + place in the ->ooseq queue (which is ordered by sequence + number) and trim the segment in both ends if needed. An + immediate ACK is sent to indicate that we received an + out-of-sequence segment. + + +) Finally, we check if the first segment on the ->ooseq queue + now is in sequence (i.e., if rcv_nxt >= ooseq->seqno). If + rcv_nxt > ooseq->seqno, we must trim the first edge of the + segment on ->ooseq before we adjust rcv_nxt. The data in the + segments that are now on sequence are chained onto the + incoming segment so that we only need to call the application + once. + */ + + /* First, we check if we must trim the first edge. We have to do + this if the sequence number of the incoming segment is less + than rcv_nxt, and the sequence number plus the length of the + segment is larger than rcv_nxt. */ + /* if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)){ + if (TCP_SEQ_LT(pcb->rcv_nxt, seqno + tcplen)) {*/ + if (TCP_SEQ_BETWEEN(pcb->rcv_nxt, seqno + 1, seqno + tcplen - 1)){ + /* Trimming the first edge is done by pushing the payload + pointer in the pbuf downwards. This is somewhat tricky since + we do not want to discard the full contents of the pbuf up to + the new starting point of the data since we have to keep the + TCP header which is present in the first pbuf in the chain. + + What is done is really quite a nasty hack: the first pbuf in + the pbuf chain is pointed to by inseg.p. Since we need to be + able to deallocate the whole pbuf, we cannot change this + inseg.p pointer to point to any of the later pbufs in the + chain. Instead, we point the ->payload pointer in the first + pbuf to data in one of the later pbufs. We also set the + inseg.data pointer to point to the right place. This way, the + ->p pointer will still point to the first pbuf, but the + ->p->payload pointer will point to data in another pbuf. + + After we are done with adjusting the pbuf pointers we must + adjust the ->data pointer in the seg and the segment + length.*/ + + off = pcb->rcv_nxt - seqno; + p = inseg.p; + LWIP_ASSERT("inseg.p != NULL", inseg.p); + LWIP_ASSERT("insane offset!", (off < 0x7fff)); + if (inseg.p->len < off) { + LWIP_ASSERT("pbuf too short!", (((s32_t)inseg.p->tot_len) >= off)); + new_tot_len = (u16_t)(inseg.p->tot_len - off); + while (p->len < off) { + off -= p->len; + /* KJM following line changed (with addition of new_tot_len var) + to fix bug #9076 + inseg.p->tot_len -= p->len; */ + p->tot_len = new_tot_len; + p->len = 0; + p = p->next; + } + if(pbuf_header(p, (s16_t)-off)) { + /* Do we need to cope with this failing? Assert for now */ + LWIP_ASSERT("pbuf_header failed", 0); + } + } else { + if(pbuf_header(inseg.p, (s16_t)-off)) { + /* Do we need to cope with this failing? Assert for now */ + LWIP_ASSERT("pbuf_header failed", 0); + } + } + /* KJM following line changed to use p->payload rather than inseg->p->payload + to fix bug #9076 */ + inseg.dataptr = p->payload; + inseg.len -= (u16_t)(pcb->rcv_nxt - seqno); + inseg.tcphdr->seqno = seqno = pcb->rcv_nxt; + } + else { + if (TCP_SEQ_LT(seqno, pcb->rcv_nxt)){ + /* the whole segment is < rcv_nxt */ + /* must be a duplicate of a packet that has already been correctly handled */ + + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: duplicate seqno %"U32_F"\n", seqno)); + tcp_ack_now(pcb); + } + } + + /* The sequence number must be within the window (above rcv_nxt + and below rcv_nxt + rcv_wnd) in order to be further + processed. */ + if (TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, + pcb->rcv_nxt + pcb->rcv_wnd - 1)){ + if (pcb->rcv_nxt == seqno) { + /* The incoming segment is the next in sequence. We check if + we have to trim the end of the segment and update rcv_nxt + and pass the data to the application. */ + tcplen = TCP_TCPLEN(&inseg); + + if (tcplen > pcb->rcv_wnd) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, + ("tcp_receive: other end overran receive window" + "seqno %"U32_F" len %"U32_F" right edge %"U32_F"\n", + seqno, tcplen, pcb->rcv_nxt + pcb->rcv_wnd)); + if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { + /* Must remove the FIN from the header as we're trimming + * that byte of sequence-space from the packet */ + TCPH_FLAGS_SET(inseg.tcphdr, TCPH_FLAGS(inseg.tcphdr) &~ TCP_FIN); + } + /* Adjust length of segment to fit in the window. */ + inseg.len = pcb->rcv_wnd; + if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { + inseg.len -= 1; + } + pbuf_realloc(inseg.p, inseg.len); + tcplen = TCP_TCPLEN(&inseg); + LWIP_ASSERT("tcp_receive: segment not trimmed correctly to rcv_wnd\n", + (seqno + tcplen) == (pcb->rcv_nxt + pcb->rcv_wnd)); + } +#if TCP_QUEUE_OOSEQ + if (pcb->ooseq != NULL) { + if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, + ("tcp_receive: received in-order FIN, binning ooseq queue\n")); + /* Received in-order FIN means anything that was received + * out of order must now have been received in-order, so + * bin the ooseq queue + * rcv_nxt + * . |--ooseq--| + * .==seg============|FIN + */ + while (pcb->ooseq != NULL) { + struct tcp_seg *old_ooseq = pcb->ooseq; + pcb->ooseq = pcb->ooseq->next; + tcp_seg_free(old_ooseq); + } + } + else { + struct tcp_seg* next = pcb->ooseq; + struct tcp_seg *old_seg; + /* rcv_nxt + * . |--ooseq--| + * .==seg============| + */ + while (next && + TCP_SEQ_GEQ(seqno + tcplen, + next->tcphdr->seqno + next->len)) { + /* inseg doesn't have FIN (already processed) */ + if (TCPH_FLAGS(next->tcphdr) & TCP_FIN && + (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) == 0) { + TCPH_FLAGS_SET(inseg.tcphdr, + TCPH_FLAGS(inseg.tcphdr) | TCP_FIN); + tcplen = TCP_TCPLEN(&inseg); + } + old_seg = next; + next = next->next; + tcp_seg_free(old_seg); + } + /* rcv_nxt + * . |--ooseq--| + * .==seg============| + */ + if (next && + TCP_SEQ_GT(seqno + tcplen, + next->tcphdr->seqno)) { + /* FIN in inseg already handled by dropping whole ooseq queue */ + inseg.len = (u16_t)(pcb->ooseq->tcphdr->seqno - seqno); + if (TCPH_FLAGS(inseg.tcphdr) & TCP_SYN) { + inseg.len -= 1; + } + pbuf_realloc(inseg.p, inseg.len); + tcplen = TCP_TCPLEN(&inseg); + LWIP_ASSERT("tcp_receive: segment not trimmed correctly to ooseq queue\n", + (seqno + tcplen) == pcb->ooseq->tcphdr->seqno); + } + pcb->ooseq = next; + } + } +#endif /* TCP_QUEUE_OOSEQ */ + + pcb->rcv_nxt = seqno + tcplen; + + /* Update the receiver's (our) window. */ + LWIP_ASSERT("tcp_receive: tcplen > rcv_wnd\n", pcb->rcv_wnd >= tcplen); + pcb->rcv_wnd -= tcplen; + + tcp_update_rcv_ann_wnd(pcb); + + /* If there is data in the segment, we make preparations to + pass this up to the application. The ->recv_data variable + is used for holding the pbuf that goes to the + application. The code for reassembling out-of-sequence data + chains its data on this pbuf as well. + + If the segment was a FIN, we set the TF_GOT_FIN flag that will + be used to indicate to the application that the remote side has + closed its end of the connection. */ + if (inseg.p->tot_len > 0) { + recv_data = inseg.p; + /* Since this pbuf now is the responsibility of the + application, we delete our reference to it so that we won't + (mistakingly) deallocate it. */ + inseg.p = NULL; + } + if (TCPH_FLAGS(inseg.tcphdr) & TCP_FIN) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: received FIN.\n")); + recv_flags |= TF_GOT_FIN; + } + +#if TCP_QUEUE_OOSEQ + /* We now check if we have segments on the ->ooseq queue that + is now in sequence. */ + while (pcb->ooseq != NULL && + pcb->ooseq->tcphdr->seqno == pcb->rcv_nxt) { + + cseg = pcb->ooseq; + seqno = pcb->ooseq->tcphdr->seqno; + + pcb->rcv_nxt += TCP_TCPLEN(cseg); + LWIP_ASSERT("tcp_receive: ooseq tcplen > rcv_wnd\n", + pcb->rcv_wnd >= TCP_TCPLEN(cseg)); + pcb->rcv_wnd -= TCP_TCPLEN(cseg); + + tcp_update_rcv_ann_wnd(pcb); + + if (cseg->p->tot_len > 0) { + /* Chain this pbuf onto the pbuf that we will pass to + the application. */ + if (recv_data) { + pbuf_cat(recv_data, cseg->p); + } else { + recv_data = cseg->p; + } + cseg->p = NULL; + } + if (TCPH_FLAGS(cseg->tcphdr) & TCP_FIN) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_receive: dequeued FIN.\n")); + recv_flags |= TF_GOT_FIN; + if (pcb->state == ESTABLISHED) { /* force passive close or we can move to active close */ + pcb->state = CLOSE_WAIT; + } + } + + pcb->ooseq = cseg->next; + tcp_seg_free(cseg); + } +#endif /* TCP_QUEUE_OOSEQ */ + + + /* Acknowledge the segment(s). */ + tcp_ack(pcb); + + } else { + /* We get here if the incoming segment is out-of-sequence. */ + tcp_send_empty_ack(pcb); +#if TCP_QUEUE_OOSEQ + /* We queue the segment on the ->ooseq queue. */ + if (pcb->ooseq == NULL) { + pcb->ooseq = tcp_seg_copy(&inseg); + } else { + /* If the queue is not empty, we walk through the queue and + try to find a place where the sequence number of the + incoming segment is between the sequence numbers of the + previous and the next segment on the ->ooseq queue. That is + the place where we put the incoming segment. If needed, we + trim the second edges of the previous and the incoming + segment so that it will fit into the sequence. + + If the incoming segment has the same sequence number as a + segment on the ->ooseq queue, we discard the segment that + contains less data. */ + + prev = NULL; + for(next = pcb->ooseq; next != NULL; next = next->next) { + if (seqno == next->tcphdr->seqno) { + /* The sequence number of the incoming segment is the + same as the sequence number of the segment on + ->ooseq. We check the lengths to see which one to + discard. */ + if (inseg.len > next->len) { + /* The incoming segment is larger than the old + segment. We replace some segments with the new + one. */ + cseg = tcp_seg_copy(&inseg); + if (cseg != NULL) { + if (prev != NULL) { + prev->next = cseg; + } else { + pcb->ooseq = cseg; + } + tcp_oos_insert_segment(cseg, next); + } + break; + } else { + /* Either the lenghts are the same or the incoming + segment was smaller than the old one; in either + case, we ditch the incoming segment. */ + break; + } + } else { + if (prev == NULL) { + if (TCP_SEQ_LT(seqno, next->tcphdr->seqno)) { + /* The sequence number of the incoming segment is lower + than the sequence number of the first segment on the + queue. We put the incoming segment first on the + queue. */ + cseg = tcp_seg_copy(&inseg); + if (cseg != NULL) { + pcb->ooseq = cseg; + tcp_oos_insert_segment(cseg, next); + } + break; + } + } else { + /*if (TCP_SEQ_LT(prev->tcphdr->seqno, seqno) && + TCP_SEQ_LT(seqno, next->tcphdr->seqno)) {*/ + if (TCP_SEQ_BETWEEN(seqno, prev->tcphdr->seqno+1, next->tcphdr->seqno-1)) { + /* The sequence number of the incoming segment is in + between the sequence numbers of the previous and + the next segment on ->ooseq. We trim trim the previous + segment, delete next segments that included in received segment + and trim received, if needed. */ + cseg = tcp_seg_copy(&inseg); + if (cseg != NULL) { + if (TCP_SEQ_GT(prev->tcphdr->seqno + prev->len, seqno)) { + /* We need to trim the prev segment. */ + prev->len = (u16_t)(seqno - prev->tcphdr->seqno); + pbuf_realloc(prev->p, prev->len); + } + prev->next = cseg; + tcp_oos_insert_segment(cseg, next); + } + break; + } + } + /* If the "next" segment is the last segment on the + ooseq queue, we add the incoming segment to the end + of the list. */ + if (next->next == NULL && + TCP_SEQ_GT(seqno, next->tcphdr->seqno)) { + if (TCPH_FLAGS(next->tcphdr) & TCP_FIN) { + /* segment "next" already contains all data */ + break; + } + next->next = tcp_seg_copy(&inseg); + if (next->next != NULL) { + if (TCP_SEQ_GT(next->tcphdr->seqno + next->len, seqno)) { + /* We need to trim the last segment. */ + next->len = (u16_t)(seqno - next->tcphdr->seqno); + pbuf_realloc(next->p, next->len); + } + } + break; + } + } + prev = next; + } + } +#endif /* TCP_QUEUE_OOSEQ */ + + } + } else { + /* The incoming segment is not withing the window. */ + tcp_send_empty_ack(pcb); + } + } else { + /* Segments with length 0 is taken care of here. Segments that + fall out of the window are ACKed. */ + /*if (TCP_SEQ_GT(pcb->rcv_nxt, seqno) || + TCP_SEQ_GEQ(seqno, pcb->rcv_nxt + pcb->rcv_wnd)) {*/ + if(!TCP_SEQ_BETWEEN(seqno, pcb->rcv_nxt, pcb->rcv_nxt + pcb->rcv_wnd-1)){ + tcp_ack_now(pcb); + } + } +} + +/** + * Parses the options contained in the incoming segment. + * + * Called from tcp_listen_input() and tcp_process(). + * Currently, only the MSS option is supported! + * + * @param pcb the tcp_pcb for which a segment arrived + */ +static void +tcp_parseopt(struct tcp_pcb *pcb) +{ + u16_t c, max_c; + u16_t mss; + u8_t *opts, opt; +#if LWIP_TCP_TIMESTAMPS + u32_t tsval; +#endif + + opts = (u8_t *)tcphdr + TCP_HLEN; + + /* Parse the TCP MSS option, if present. */ + if(TCPH_HDRLEN(tcphdr) > 0x5) { + max_c = (TCPH_HDRLEN(tcphdr) - 5) << 2; + for (c = 0; c < max_c; ) { + opt = opts[c]; + switch (opt) { + case 0x00: + /* End of options. */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: EOL\n")); + return; + case 0x01: + /* NOP option. */ + ++c; + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: NOP\n")); + break; + case 0x02: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: MSS\n")); + if (opts[c + 1] != 0x04 || c + 0x04 > max_c) { + /* Bad length */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); + return; + } + /* An MSS option with the right option length. */ + mss = (opts[c + 2] << 8) | opts[c + 3]; + /* Limit the mss to the configured TCP_MSS and prevent division by zero */ + pcb->mss = ((mss > TCP_MSS) || (mss == 0)) ? TCP_MSS : mss; + /* Advance to next option */ + c += 0x04; + break; +#if LWIP_TCP_TIMESTAMPS + case 0x08: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: TS\n")); + if (opts[c + 1] != 0x0A || c + 0x0A > max_c) { + /* Bad length */ + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); + return; + } + /* TCP timestamp option with valid length */ + tsval = (opts[c+2]) | (opts[c+3] << 8) | + (opts[c+4] << 16) | (opts[c+5] << 24); + if (flags & TCP_SYN) { + pcb->ts_recent = ntohl(tsval); + pcb->flags |= TF_TIMESTAMP; + } else if (TCP_SEQ_BETWEEN(pcb->ts_lastacksent, seqno, seqno+tcplen)) { + pcb->ts_recent = ntohl(tsval); + } + /* Advance to next option */ + c += 0x0A; + break; +#endif + default: + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: other\n")); + if (opts[c + 1] == 0) { + LWIP_DEBUGF(TCP_INPUT_DEBUG, ("tcp_parseopt: bad length\n")); + /* If the length field is zero, the options are malformed + and we don't process them further. */ + return; + } + /* All other options have a length field, so that we easily + can skip past them. */ + c += opts[c + 1]; + } + } + } +} + +#endif /* LWIP_TCP */ diff --git a/bertos/net/lwip/src/core/tcp_out.c b/bertos/net/lwip/src/core/tcp_out.c new file mode 100644 index 0000000..ddada42 --- /dev/null +++ b/bertos/net/lwip/src/core/tcp_out.c @@ -0,0 +1,1054 @@ +/** + * @file + * Transmission Control Protocol, outgoing traffic + * + * The output functions of TCP. + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/tcp.h" +#include "lwip/def.h" +#include "lwip/mem.h" +#include "lwip/memp.h" +#include "lwip/sys.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" + +#include + +/* Forward declarations.*/ +static void tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb); + +static struct tcp_hdr * +tcp_output_set_header(struct tcp_pcb *pcb, struct pbuf *p, int optlen, + u32_t seqno_be /* already in network byte order */) +{ + struct tcp_hdr *tcphdr = p->payload; + tcphdr->src = htons(pcb->local_port); + tcphdr->dest = htons(pcb->remote_port); + tcphdr->seqno = seqno_be; + tcphdr->ackno = htonl(pcb->rcv_nxt); + TCPH_FLAGS_SET(tcphdr, TCP_ACK); + tcphdr->wnd = htons(pcb->rcv_ann_wnd); + tcphdr->urgp = 0; + TCPH_HDRLEN_SET(tcphdr, (5 + optlen / 4)); + tcphdr->chksum = 0; + + /* If we're sending a packet, update the announced right window edge */ + pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; + + return tcphdr; +} + +/** + * Called by tcp_close() to send a segment including flags but not data. + * + * @param pcb the tcp_pcb over which to send a segment + * @param flags the flags to set in the segment header + * @return ERR_OK if sent, another err_t otherwise + */ +err_t +tcp_send_ctrl(struct tcp_pcb *pcb, u8_t flags) +{ + /* no data, no length, flags, copy=1, no optdata */ + return tcp_enqueue(pcb, NULL, 0, flags, TCP_WRITE_FLAG_COPY, 0); +} + +/** + * Write data for sending (but does not send it immediately). + * + * It waits in the expectation of more data being sent soon (as + * it can send them more efficiently by combining them together). + * To prompt the system to send data now, call tcp_output() after + * calling tcp_write(). + * + * @param pcb Protocol control block of the TCP connection to enqueue data for. + * @param data pointer to the data to send + * @param len length (in bytes) of the data to send + * @param apiflags combination of following flags : + * - TCP_WRITE_FLAG_COPY (0x01) data will be copied into memory belonging to the stack + * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will be set on last segment sent, + * @return ERR_OK if enqueued, another err_t on error + * + * @see tcp_write() + */ +err_t +tcp_write(struct tcp_pcb *pcb, const void *data, u16_t len, u8_t apiflags) +{ + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_write(pcb=%p, data=%p, len=%"U16_F", apiflags=%"U16_F")\n", (void *)pcb, + data, len, (u16_t)apiflags)); + /* connection is in valid state for data transmission? */ + if (pcb->state == ESTABLISHED || + pcb->state == CLOSE_WAIT || + pcb->state == SYN_SENT || + pcb->state == SYN_RCVD) { + if (len > 0) { +#if LWIP_TCP_TIMESTAMPS + return tcp_enqueue(pcb, (void *)data, len, 0, apiflags, + pcb->flags & TF_TIMESTAMP ? TF_SEG_OPTS_TS : 0); +#else + return tcp_enqueue(pcb, (void *)data, len, 0, apiflags, 0); +#endif + } + return ERR_OK; + } else { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_STATE | LWIP_DBG_LEVEL_SEVERE, ("tcp_write() called in invalid state\n")); + return ERR_CONN; + } +} + +/** + * Enqueue data and/or TCP options for transmission + * + * Called by tcp_connect(), tcp_listen_input(), tcp_send_ctrl() and tcp_write(). + * + * @param pcb Protocol control block for the TCP connection to enqueue data for. + * @param arg Pointer to the data to be enqueued for sending. + * @param len Data length in bytes + * @param flags tcp header flags to set in the outgoing segment + * @param apiflags combination of following flags : + * - TCP_WRITE_FLAG_COPY (0x01) data will be copied into memory belonging to the stack + * - TCP_WRITE_FLAG_MORE (0x02) for TCP connection, PSH flag will be set on last segment sent, + * @param optflags options to include in segment later on (see definition of struct tcp_seg) + */ +err_t +tcp_enqueue(struct tcp_pcb *pcb, void *arg, u16_t len, + u8_t flags, u8_t apiflags, u8_t optflags) +{ + struct pbuf *p; + struct tcp_seg *seg, *useg, *queue; + u32_t seqno; + u16_t left, seglen; + void *ptr; + u16_t queuelen; + u8_t optlen; + + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, + ("tcp_enqueue(pcb=%p, arg=%p, len=%"U16_F", flags=%"X16_F", apiflags=%"U16_F")\n", + (void *)pcb, arg, len, (u16_t)flags, (u16_t)apiflags)); + LWIP_ERROR("tcp_enqueue: packet needs payload, options, or SYN/FIN (programmer violates API)", + ((len != 0) || (optflags != 0) || ((flags & (TCP_SYN | TCP_FIN)) != 0)), + return ERR_ARG;); + LWIP_ERROR("tcp_enqueue: len != 0 || arg == NULL (programmer violates API)", + ((len != 0) || (arg == NULL)), return ERR_ARG;); + + /* fail on too much data */ + if (len > pcb->snd_buf) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_WARNING, + ("tcp_enqueue: too much data (len=%"U16_F" > snd_buf=%"U16_F")\n", len, pcb->snd_buf)); + pcb->flags |= TF_NAGLEMEMERR; + return ERR_MEM; + } + left = len; + ptr = arg; + + optlen = LWIP_TCP_OPT_LENGTH(optflags); + + /* seqno will be the sequence number of the first segment enqueued + * by the call to this function. */ + seqno = pcb->snd_lbb; + + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: queuelen: %"U16_F"\n", (u16_t)pcb->snd_queuelen)); + + /* If total number of pbufs on the unsent/unacked queues exceeds the + * configured maximum, return an error */ + queuelen = pcb->snd_queuelen; + /* check for configured max queuelen and possible overflow */ + if ((queuelen >= TCP_SND_QUEUELEN) || (queuelen > TCP_SNDQUEUELEN_OVERFLOW)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_WARNING, + ("tcp_enqueue: too long queue %"U16_F" (max %"U16_F")\n", queuelen, TCP_SND_QUEUELEN)); + TCP_STATS_INC(tcp.memerr); + pcb->flags |= TF_NAGLEMEMERR; + return ERR_MEM; + } + if (queuelen != 0) { + LWIP_ASSERT("tcp_enqueue: pbufs on queue => at least one queue non-empty", + pcb->unacked != NULL || pcb->unsent != NULL); + } else { + LWIP_ASSERT("tcp_enqueue: no pbufs on queue => both queues empty", + pcb->unacked == NULL && pcb->unsent == NULL); + } + + /* First, break up the data into segments and tuck them together in + * the local "queue" variable. */ + useg = queue = seg = NULL; + seglen = 0; + while (queue == NULL || left > 0) { + /* The segment length (including options) should be at most the MSS */ + seglen = left > (pcb->mss - optlen) ? (pcb->mss - optlen) : left; + + /* Allocate memory for tcp_seg, and fill in fields. */ + seg = memp_malloc(MEMP_TCP_SEG); + if (seg == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue: could not allocate memory for tcp_seg\n")); + goto memerr; + } + seg->next = NULL; + seg->p = NULL; + + /* first segment of to-be-queued data? */ + if (queue == NULL) { + queue = seg; + } + /* subsequent segments of to-be-queued data */ + else { + /* Attach the segment to the end of the queued segments */ + LWIP_ASSERT("useg != NULL", useg != NULL); + useg->next = seg; + } + /* remember last segment of to-be-queued data for next iteration */ + useg = seg; + + /* If copy is set, memory should be allocated + * and data copied into pbuf, otherwise data comes from + * ROM or other static memory, and need not be copied. */ + if (apiflags & TCP_WRITE_FLAG_COPY) { + if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, seglen + optlen, PBUF_RAM)) == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue : could not allocate memory for pbuf copy size %"U16_F"\n", seglen)); + goto memerr; + } + LWIP_ASSERT("check that first pbuf can hold the complete seglen", + (seg->p->len >= seglen + optlen)); + queuelen += pbuf_clen(seg->p); + if (arg != NULL) { + MEMCPY((char *)seg->p->payload + optlen, ptr, seglen); + } + seg->dataptr = seg->p->payload; + } + /* do not copy data */ + else { + /* First, allocate a pbuf for the headers. */ + if ((seg->p = pbuf_alloc(PBUF_TRANSPORT, optlen, PBUF_RAM)) == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue: could not allocate memory for header pbuf\n")); + goto memerr; + } + queuelen += pbuf_clen(seg->p); + + /* Second, allocate a pbuf for holding the data. + * since the referenced data is available at least until it is sent out on the + * link (as it has to be ACKed by the remote party) we can safely use PBUF_ROM + * instead of PBUF_REF here. + */ + if (left > 0) { + if ((p = pbuf_alloc(PBUF_RAW, seglen, PBUF_ROM)) == NULL) { + /* If allocation fails, we have to deallocate the header pbuf as well. */ + pbuf_free(seg->p); + seg->p = NULL; + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue: could not allocate memory for zero-copy pbuf\n")); + goto memerr; + } + ++queuelen; + /* reference the non-volatile payload data */ + p->payload = ptr; + seg->dataptr = ptr; + + /* Concatenate the headers and data pbufs together. */ + pbuf_cat(seg->p/*header*/, p/*data*/); + p = NULL; + } + } + + /* Now that there are more segments queued, we check again if the + length of the queue exceeds the configured maximum or overflows. */ + if ((queuelen > TCP_SND_QUEUELEN) || (queuelen > TCP_SNDQUEUELEN_OVERFLOW)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("tcp_enqueue: queue too long %"U16_F" (%"U16_F")\n", queuelen, TCP_SND_QUEUELEN)); + goto memerr; + } + + seg->len = seglen; + + /* build TCP header */ + if (pbuf_header(seg->p, TCP_HLEN)) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("tcp_enqueue: no room for TCP header in pbuf.\n")); + TCP_STATS_INC(tcp.err); + goto memerr; + } + seg->tcphdr = seg->p->payload; + seg->tcphdr->src = htons(pcb->local_port); + seg->tcphdr->dest = htons(pcb->remote_port); + seg->tcphdr->seqno = htonl(seqno); + seg->tcphdr->urgp = 0; + TCPH_FLAGS_SET(seg->tcphdr, flags); + /* don't fill in tcphdr->ackno and tcphdr->wnd until later */ + + seg->flags = optflags; + + /* Set the length of the header */ + TCPH_HDRLEN_SET(seg->tcphdr, (5 + optlen / 4)); + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE, ("tcp_enqueue: queueing %"U32_F":%"U32_F" (0x%"X16_F")\n", + ntohl(seg->tcphdr->seqno), + ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg), + (u16_t)flags)); + + left -= seglen; + seqno += seglen; + ptr = (void *)((u8_t *)ptr + seglen); + } + + /* Now that the data to be enqueued has been broken up into TCP + segments in the queue variable, we add them to the end of the + pcb->unsent queue. */ + if (pcb->unsent == NULL) { + useg = NULL; + } + else { + for (useg = pcb->unsent; useg->next != NULL; useg = useg->next); + } + /* { useg is last segment on the unsent queue, NULL if list is empty } */ + + /* If there is room in the last pbuf on the unsent queue, + chain the first pbuf on the queue together with that. */ + if (useg != NULL && + TCP_TCPLEN(useg) != 0 && + !(TCPH_FLAGS(useg->tcphdr) & (TCP_SYN | TCP_FIN)) && + (!(flags & (TCP_SYN | TCP_FIN)) || (flags == TCP_FIN)) && + /* fit within max seg size */ + (useg->len + queue->len <= pcb->mss) && + /* only concatenate segments with the same options */ + (useg->flags == queue->flags) && + /* segments are consecutive */ + (ntohl(useg->tcphdr->seqno) + useg->len == ntohl(queue->tcphdr->seqno)) ) { + /* Remove TCP header from first segment of our to-be-queued list */ + if(pbuf_header(queue->p, -(TCP_HLEN + optlen))) { + /* Can we cope with this failing? Just assert for now */ + LWIP_ASSERT("pbuf_header failed\n", 0); + TCP_STATS_INC(tcp.err); + goto memerr; + } + if (queue->p->len == 0) { + /* free the first (header-only) pbuf if it is now empty (contained only headers) */ + struct pbuf *old_q = queue->p; + queue->p = queue->p->next; + old_q->next = NULL; + queuelen--; + pbuf_free(old_q); + } + if (flags & TCP_FIN) { + /* the new segment contains only FIN, no data -> put the FIN into the last segment */ + LWIP_ASSERT("FIN enqueued together with data", queue->p == NULL && queue->len == 0); + TCPH_SET_FLAG(useg->tcphdr, TCP_FIN); + } else { + LWIP_ASSERT("zero-length pbuf", (queue->p != NULL) && (queue->p->len > 0)); + pbuf_cat(useg->p, queue->p); + useg->len += queue->len; + useg->next = queue->next; + } + + LWIP_DEBUGF(TCP_OUTPUT_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("tcp_enqueue: chaining segments, new len %"U16_F"\n", useg->len)); + if (seg == queue) { + seg = useg; + seglen = useg->len; + } + memp_free(MEMP_TCP_SEG, queue); + } + else { + /* empty list */ + if (useg == NULL) { + /* initialize list with this segment */ + pcb->unsent = queue; + } + /* enqueue segment */ + else { + useg->next = queue; + } + } + if ((flags & TCP_SYN) || (flags & TCP_FIN)) { + ++len; + } + if (flags & TCP_FIN) { + pcb->flags |= TF_FIN; + } + pcb->snd_lbb += len; + + pcb->snd_buf -= len; + + /* update number of segments on the queues */ + pcb->snd_queuelen = queuelen; + LWIP_DEBUGF(TCP_QLEN_DEBUG, ("tcp_enqueue: %"S16_F" (after enqueued)\n", pcb->snd_queuelen)); + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_enqueue: valid queue length", + pcb->unacked != NULL || pcb->unsent != NULL); + } + + /* Set the PSH flag in the last segment that we enqueued, but only + if the segment has data (indicated by seglen > 0). */ + if (seg != NULL && seglen > 0 && seg->tcphdr != NULL && ((apiflags & TCP_WRITE_FLAG_MORE)==0)) { + TCPH_SET_FLAG(seg->tcphdr, TCP_PSH); + } + + return ERR_OK; +memerr: + pcb->flags |= TF_NAGLEMEMERR; + TCP_STATS_INC(tcp.memerr); + + if (queue != NULL) { + tcp_segs_free(queue); + } + if (pcb->snd_queuelen != 0) { + LWIP_ASSERT("tcp_enqueue: valid queue length", pcb->unacked != NULL || + pcb->unsent != NULL); + } + LWIP_DEBUGF(TCP_QLEN_DEBUG | LWIP_DBG_STATE, ("tcp_enqueue: %"S16_F" (with mem err)\n", pcb->snd_queuelen)); + return ERR_MEM; +} + + +#if LWIP_TCP_TIMESTAMPS +/* Build a timestamp option (12 bytes long) at the specified options pointer) + * + * @param pcb tcp_pcb + * @param opts option pointer where to store the timestamp option + */ +static void +tcp_build_timestamp_option(struct tcp_pcb *pcb, u32_t *opts) +{ + /* Pad with two NOP options to make everything nicely aligned */ + opts[0] = htonl(0x0101080A); + opts[1] = htonl(sys_now()); + opts[2] = htonl(pcb->ts_recent); +} +#endif + +/** Send an ACK without data. + * + * @param pcb Protocol control block for the TCP connection to send the ACK + */ +err_t +tcp_send_empty_ack(struct tcp_pcb *pcb) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + u8_t optlen = 0; + +#if LWIP_TCP_TIMESTAMPS + if (pcb->flags & TF_TIMESTAMP) { + optlen = LWIP_TCP_OPT_LENGTH(TF_SEG_OPTS_TS); + } +#endif + p = pbuf_alloc(PBUF_IP, TCP_HLEN + optlen, PBUF_RAM); + if (p == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: (ACK) could not allocate pbuf\n")); + return ERR_BUF; + } + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, + ("tcp_output: sending ACK for %"U32_F"\n", pcb->rcv_nxt)); + /* remove ACK flags from the PCB, as we send an empty ACK now */ + pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); + + tcphdr = tcp_output_set_header(pcb, p, optlen, htonl(pcb->snd_nxt)); + + /* NB. MSS option is only sent on SYNs, so ignore it here */ +#if LWIP_TCP_TIMESTAMPS + pcb->ts_lastacksent = pcb->rcv_nxt; + + if (pcb->flags & TF_TIMESTAMP) { + tcp_build_timestamp_option(pcb, (u32_t *)(tcphdr + 1)); + } +#endif + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, &(pcb->local_ip), &(pcb->remote_ip), + IP_PROTO_TCP, p->tot_len); +#endif +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP, &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ + pbuf_free(p); + + return ERR_OK; +} + +/** + * Find out what we can send and send it + * + * @param pcb Protocol control block for the TCP connection to send data + * @return ERR_OK if data has been sent or nothing to send + * another err_t on error + */ +err_t +tcp_output(struct tcp_pcb *pcb) +{ + struct tcp_seg *seg, *useg; + u32_t wnd, snd_nxt; +#if TCP_CWND_DEBUG + s16_t i = 0; +#endif /* TCP_CWND_DEBUG */ + + /* First, check if we are invoked by the TCP input processing + code. If so, we do not output anything. Instead, we rely on the + input processing code to call us when input processing is done + with. */ + if (tcp_input_pcb == pcb) { + return ERR_OK; + } + + wnd = LWIP_MIN(pcb->snd_wnd, pcb->cwnd); + + seg = pcb->unsent; + + /* If the TF_ACK_NOW flag is set and no data will be sent (either + * because the ->unsent queue is empty or because the window does + * not allow it), construct an empty ACK segment and send it. + * + * If data is to be sent, we will just piggyback the ACK (see below). + */ + if (pcb->flags & TF_ACK_NOW && + (seg == NULL || + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > wnd)) { + return tcp_send_empty_ack(pcb); + } + + /* useg should point to last segment on unacked queue */ + useg = pcb->unacked; + if (useg != NULL) { + for (; useg->next != NULL; useg = useg->next); + } + +#if TCP_OUTPUT_DEBUG + if (seg == NULL) { + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output: nothing to send (%p)\n", + (void*)pcb->unsent)); + } +#endif /* TCP_OUTPUT_DEBUG */ +#if TCP_CWND_DEBUG + if (seg == NULL) { + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U16_F + ", cwnd %"U16_F", wnd %"U32_F + ", seg == NULL, ack %"U32_F"\n", + pcb->snd_wnd, pcb->cwnd, wnd, pcb->lastack)); + } else { + LWIP_DEBUGF(TCP_CWND_DEBUG, + ("tcp_output: snd_wnd %"U16_F", cwnd %"U16_F", wnd %"U32_F + ", effwnd %"U32_F", seq %"U32_F", ack %"U32_F"\n", + pcb->snd_wnd, pcb->cwnd, wnd, + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len, + ntohl(seg->tcphdr->seqno), pcb->lastack)); + } +#endif /* TCP_CWND_DEBUG */ + /* data available and window allows it to be sent? */ + while (seg != NULL && + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len <= wnd) { + LWIP_ASSERT("RST not expected here!", + (TCPH_FLAGS(seg->tcphdr) & TCP_RST) == 0); + /* Stop sending if the nagle algorithm would prevent it + * Don't stop: + * - if tcp_enqueue had a memory error before (prevent delayed ACK timeout) or + * - if FIN was already enqueued for this PCB (SYN is always alone in a segment - + * either seg->next != NULL or pcb->unacked == NULL; + * RST is no sent using tcp_enqueue/tcp_output. + */ + if((tcp_do_output_nagle(pcb) == 0) && + ((pcb->flags & (TF_NAGLEMEMERR | TF_FIN)) == 0)){ + break; + } +#if TCP_CWND_DEBUG + LWIP_DEBUGF(TCP_CWND_DEBUG, ("tcp_output: snd_wnd %"U16_F", cwnd %"U16_F", wnd %"U32_F", effwnd %"U32_F", seq %"U32_F", ack %"U32_F", i %"S16_F"\n", + pcb->snd_wnd, pcb->cwnd, wnd, + ntohl(seg->tcphdr->seqno) + seg->len - + pcb->lastack, + ntohl(seg->tcphdr->seqno), pcb->lastack, i)); + ++i; +#endif /* TCP_CWND_DEBUG */ + + pcb->unsent = seg->next; + + if (pcb->state != SYN_SENT) { + TCPH_SET_FLAG(seg->tcphdr, TCP_ACK); + pcb->flags &= ~(TF_ACK_DELAY | TF_ACK_NOW); + } + + tcp_output_segment(seg, pcb); + snd_nxt = ntohl(seg->tcphdr->seqno) + TCP_TCPLEN(seg); + if (TCP_SEQ_LT(pcb->snd_nxt, snd_nxt)) { + pcb->snd_nxt = snd_nxt; + } + /* put segment on unacknowledged list if length > 0 */ + if (TCP_TCPLEN(seg) > 0) { + seg->next = NULL; + /* unacked list is empty? */ + if (pcb->unacked == NULL) { + pcb->unacked = seg; + useg = seg; + /* unacked list is not empty? */ + } else { + /* In the case of fast retransmit, the packet should not go to the tail + * of the unacked queue, but rather somewhere before it. We need to check for + * this case. -STJ Jul 27, 2004 */ + if (TCP_SEQ_LT(ntohl(seg->tcphdr->seqno), ntohl(useg->tcphdr->seqno))){ + /* add segment to before tail of unacked list, keeping the list sorted */ + struct tcp_seg **cur_seg = &(pcb->unacked); + while (*cur_seg && + TCP_SEQ_LT(ntohl((*cur_seg)->tcphdr->seqno), ntohl(seg->tcphdr->seqno))) { + cur_seg = &((*cur_seg)->next ); + } + seg->next = (*cur_seg); + (*cur_seg) = seg; + } else { + /* add segment to tail of unacked list */ + useg->next = seg; + useg = useg->next; + } + } + /* do not queue empty segments on the unacked list */ + } else { + tcp_seg_free(seg); + } + seg = pcb->unsent; + } + + if (seg != NULL && pcb->persist_backoff == 0 && + ntohl(seg->tcphdr->seqno) - pcb->lastack + seg->len > pcb->snd_wnd) { + /* prepare for persist timer */ + pcb->persist_cnt = 0; + pcb->persist_backoff = 1; + } + + pcb->flags &= ~TF_NAGLEMEMERR; + return ERR_OK; +} + +/** + * Called by tcp_output() to actually send a TCP segment over IP. + * + * @param seg the tcp_seg to send + * @param pcb the tcp_pcb for the TCP connection used to send the segment + */ +static void +tcp_output_segment(struct tcp_seg *seg, struct tcp_pcb *pcb) +{ + u16_t len; + struct netif *netif; + u32_t *opts; + + /** @bug Exclude retransmitted segments from this count. */ + snmp_inc_tcpoutsegs(); + + /* The TCP header has already been constructed, but the ackno and + wnd fields remain. */ + seg->tcphdr->ackno = htonl(pcb->rcv_nxt); + + /* advertise our receive window size in this TCP segment */ + seg->tcphdr->wnd = htons(pcb->rcv_ann_wnd); + + pcb->rcv_ann_right_edge = pcb->rcv_nxt + pcb->rcv_ann_wnd; + + /* Add any requested options. NB MSS option is only set on SYN + packets, so ignore it here */ + opts = (u32_t *)(seg->tcphdr + 1); + if (seg->flags & TF_SEG_OPTS_MSS) { + TCP_BUILD_MSS_OPTION(*opts); + opts += 1; + } +#if LWIP_TCP_TIMESTAMPS + pcb->ts_lastacksent = pcb->rcv_nxt; + + if (seg->flags & TF_SEG_OPTS_TS) { + tcp_build_timestamp_option(pcb, opts); + opts += 3; + } +#endif + + /* If we don't have a local IP address, we get one by + calling ip_route(). */ + if (ip_addr_isany(&(pcb->local_ip))) { + netif = ip_route(&(pcb->remote_ip)); + if (netif == NULL) { + return; + } + ip_addr_set(&(pcb->local_ip), &(netif->ip_addr)); + } + + /* Set retransmission timer running if it is not currently enabled */ + if(pcb->rtime == -1) + pcb->rtime = 0; + + if (pcb->rttest == 0) { + pcb->rttest = tcp_ticks; + pcb->rtseq = ntohl(seg->tcphdr->seqno); + + LWIP_DEBUGF(TCP_RTO_DEBUG, ("tcp_output_segment: rtseq %"U32_F"\n", pcb->rtseq)); + } + LWIP_DEBUGF(TCP_OUTPUT_DEBUG, ("tcp_output_segment: %"U32_F":%"U32_F"\n", + htonl(seg->tcphdr->seqno), htonl(seg->tcphdr->seqno) + + seg->len)); + + len = (u16_t)((u8_t *)seg->tcphdr - (u8_t *)seg->p->payload); + + seg->p->len -= len; + seg->p->tot_len -= len; + + seg->p->payload = seg->tcphdr; + + seg->tcphdr->chksum = 0; +#if CHECKSUM_GEN_TCP + seg->tcphdr->chksum = inet_chksum_pseudo(seg->p, + &(pcb->local_ip), + &(pcb->remote_ip), + IP_PROTO_TCP, seg->p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(seg->p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP, &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(seg->p, &(pcb->local_ip), &(pcb->remote_ip), pcb->ttl, pcb->tos, + IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ +} + +/** + * Send a TCP RESET packet (empty segment with RST flag set) either to + * abort a connection or to show that there is no matching local connection + * for a received segment. + * + * Called by tcp_abort() (to abort a local connection), tcp_input() (if no + * matching local pcb was found), tcp_listen_input() (if incoming segment + * has ACK flag set) and tcp_process() (received segment in the wrong state) + * + * Since a RST segment is in most cases not sent for an active connection, + * tcp_rst() has a number of arguments that are taken from a tcp_pcb for + * most other segment output functions. + * + * @param seqno the sequence number to use for the outgoing segment + * @param ackno the acknowledge number to use for the outgoing segment + * @param local_ip the local IP address to send the segment from + * @param remote_ip the remote IP address to send the segment to + * @param local_port the local TCP port to send the segment from + * @param remote_port the remote TCP port to send the segment to + */ +void +tcp_rst(u32_t seqno, u32_t ackno, + struct ip_addr *local_ip, struct ip_addr *remote_ip, + u16_t local_port, u16_t remote_port) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); + if (p == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_rst: could not allocate memory for pbuf\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", + (p->len >= sizeof(struct tcp_hdr))); + + tcphdr = p->payload; + tcphdr->src = htons(local_port); + tcphdr->dest = htons(remote_port); + tcphdr->seqno = htonl(seqno); + tcphdr->ackno = htonl(ackno); + TCPH_FLAGS_SET(tcphdr, TCP_RST | TCP_ACK); + tcphdr->wnd = htons(TCP_WND); + tcphdr->urgp = 0; + TCPH_HDRLEN_SET(tcphdr, 5); + + tcphdr->chksum = 0; +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, local_ip, remote_ip, + IP_PROTO_TCP, p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + snmp_inc_tcpoutrsts(); + /* Send output with hardcoded TTL since we have no access to the pcb */ + ip_output(p, local_ip, remote_ip, TCP_TTL, 0, IP_PROTO_TCP); + pbuf_free(p); + LWIP_DEBUGF(TCP_RST_DEBUG, ("tcp_rst: seqno %"U32_F" ackno %"U32_F".\n", seqno, ackno)); +} + +/** + * Requeue all unacked segments for retransmission + * + * Called by tcp_slowtmr() for slow retransmission. + * + * @param pcb the tcp_pcb for which to re-enqueue all unacked segments + */ +void +tcp_rexmit_rto(struct tcp_pcb *pcb) +{ + struct tcp_seg *seg; + + if (pcb->unacked == NULL) { + return; + } + + /* Move all unacked segments to the head of the unsent queue */ + for (seg = pcb->unacked; seg->next != NULL; seg = seg->next); + /* concatenate unsent queue after unacked queue */ + seg->next = pcb->unsent; + /* unsent queue is the concatenated queue (of unacked, unsent) */ + pcb->unsent = pcb->unacked; + /* unacked queue is now empty */ + pcb->unacked = NULL; + + /* increment number of retransmissions */ + ++pcb->nrtx; + + /* Don't take any RTT measurements after retransmitting. */ + pcb->rttest = 0; + + /* Do the actual retransmission */ + tcp_output(pcb); +} + +/** + * Requeue the first unacked segment for retransmission + * + * Called by tcp_receive() for fast retramsmit. + * + * @param pcb the tcp_pcb for which to retransmit the first unacked segment + */ +void +tcp_rexmit(struct tcp_pcb *pcb) +{ + struct tcp_seg *seg; + struct tcp_seg **cur_seg; + + if (pcb->unacked == NULL) { + return; + } + + /* Move the first unacked segment to the unsent queue */ + /* Keep the unsent queue sorted. */ + seg = pcb->unacked; + pcb->unacked = seg->next; + + cur_seg = &(pcb->unsent); + while (*cur_seg && + TCP_SEQ_LT(ntohl((*cur_seg)->tcphdr->seqno), ntohl(seg->tcphdr->seqno))) { + cur_seg = &((*cur_seg)->next ); + } + seg->next = *cur_seg; + *cur_seg = seg; + + ++pcb->nrtx; + + /* Don't take any rtt measurements after retransmitting. */ + pcb->rttest = 0; + + /* Do the actual retransmission. */ + snmp_inc_tcpretranssegs(); + /* No need to call tcp_output: we are always called from tcp_input() + and thus tcp_output directly returns. */ +} + + +/** + * Handle retransmission after three dupacks received + * + * @param pcb the tcp_pcb for which to retransmit the first unacked segment + */ +void +tcp_rexmit_fast(struct tcp_pcb *pcb) +{ + if (pcb->unacked != NULL && !(pcb->flags & TF_INFR)) { + /* This is fast retransmit. Retransmit the first unacked segment. */ + LWIP_DEBUGF(TCP_FR_DEBUG, + ("tcp_receive: dupacks %"U16_F" (%"U32_F + "), fast retransmit %"U32_F"\n", + (u16_t)pcb->dupacks, pcb->lastack, + ntohl(pcb->unacked->tcphdr->seqno))); + tcp_rexmit(pcb); + + /* Set ssthresh to half of the minimum of the current + * cwnd and the advertised window */ + if (pcb->cwnd > pcb->snd_wnd) + pcb->ssthresh = pcb->snd_wnd / 2; + else + pcb->ssthresh = pcb->cwnd / 2; + + /* The minimum value for ssthresh should be 2 MSS */ + if (pcb->ssthresh < 2*pcb->mss) { + LWIP_DEBUGF(TCP_FR_DEBUG, + ("tcp_receive: The minimum value for ssthresh %"U16_F + " should be min 2 mss %"U16_F"...\n", + pcb->ssthresh, 2*pcb->mss)); + pcb->ssthresh = 2*pcb->mss; + } + + pcb->cwnd = pcb->ssthresh + 3 * pcb->mss; + pcb->flags |= TF_INFR; + } +} + + +/** + * Send keepalive packets to keep a connection active although + * no data is sent over it. + * + * Called by tcp_slowtmr() + * + * @param pcb the tcp_pcb for which to send a keepalive packet + */ +void +tcp_keepalive(struct tcp_pcb *pcb) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: sending KEEPALIVE probe to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), + ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: tcp_ticks %"U32_F" pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", + tcp_ticks, pcb->tmr, pcb->keep_cnt_sent)); + + p = pbuf_alloc(PBUF_IP, TCP_HLEN, PBUF_RAM); + + if(p == NULL) { + LWIP_DEBUGF(TCP_DEBUG, + ("tcp_keepalive: could not allocate memory for pbuf\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", + (p->len >= sizeof(struct tcp_hdr))); + + tcphdr = tcp_output_set_header(pcb, p, 0, htonl(pcb->snd_nxt - 1)); + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, &pcb->local_ip, &pcb->remote_ip, + IP_PROTO_TCP, p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + + /* Send output to IP */ +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP, + &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ + + pbuf_free(p); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_keepalive: seqno %"U32_F" ackno %"U32_F".\n", + pcb->snd_nxt - 1, pcb->rcv_nxt)); +} + + +/** + * Send persist timer zero-window probes to keep a connection active + * when a window update is lost. + * + * Called by tcp_slowtmr() + * + * @param pcb the tcp_pcb for which to send a zero-window probe packet + */ +void +tcp_zero_window_probe(struct tcp_pcb *pcb) +{ + struct pbuf *p; + struct tcp_hdr *tcphdr; + struct tcp_seg *seg; + u16_t len; + u8_t is_fin; + + LWIP_DEBUGF(TCP_DEBUG, + ("tcp_zero_window_probe: sending ZERO WINDOW probe to %" + U16_F".%"U16_F".%"U16_F".%"U16_F"\n", + ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), + ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip))); + + LWIP_DEBUGF(TCP_DEBUG, + ("tcp_zero_window_probe: tcp_ticks %"U32_F + " pcb->tmr %"U32_F" pcb->keep_cnt_sent %"U16_F"\n", + tcp_ticks, pcb->tmr, pcb->keep_cnt_sent)); + + seg = pcb->unacked; + + if(seg == NULL) + seg = pcb->unsent; + + if(seg == NULL) + return; + + is_fin = ((TCPH_FLAGS(seg->tcphdr) & TCP_FIN) != 0) && (seg->len == 0); + len = is_fin ? TCP_HLEN : TCP_HLEN + 1; + + p = pbuf_alloc(PBUF_IP, len, PBUF_RAM); + if(p == NULL) { + LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: no memory for pbuf\n")); + return; + } + LWIP_ASSERT("check that first pbuf can hold struct tcp_hdr", + (p->len >= sizeof(struct tcp_hdr))); + + tcphdr = tcp_output_set_header(pcb, p, 0, seg->tcphdr->seqno); + + if (is_fin) { + /* FIN segment, no data */ + TCPH_FLAGS_SET(tcphdr, TCP_ACK | TCP_FIN); + } else { + /* Data segment, copy in one byte from the head of the unacked queue */ + *((char *)p->payload + sizeof(struct tcp_hdr)) = *(char *)seg->dataptr; + } + +#if CHECKSUM_GEN_TCP + tcphdr->chksum = inet_chksum_pseudo(p, &pcb->local_ip, &pcb->remote_ip, + IP_PROTO_TCP, p->tot_len); +#endif + TCP_STATS_INC(tcp.xmit); + + /* Send output to IP */ +#if LWIP_NETIF_HWADDRHINT + ip_output_hinted(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP, + &(pcb->addr_hint)); +#else /* LWIP_NETIF_HWADDRHINT*/ + ip_output(p, &pcb->local_ip, &pcb->remote_ip, pcb->ttl, 0, IP_PROTO_TCP); +#endif /* LWIP_NETIF_HWADDRHINT*/ + + pbuf_free(p); + + LWIP_DEBUGF(TCP_DEBUG, ("tcp_zero_window_probe: seqno %"U32_F + " ackno %"U32_F".\n", + pcb->snd_nxt - 1, pcb->rcv_nxt)); +} +#endif /* LWIP_TCP */ diff --git a/bertos/net/lwip/src/core/udp.c b/bertos/net/lwip/src/core/udp.c new file mode 100644 index 0000000..96dab41 --- /dev/null +++ b/bertos/net/lwip/src/core/udp.c @@ -0,0 +1,841 @@ +/** + * @file + * User Datagram Protocol module + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + + +/* udp.c + * + * The code for the User Datagram Protocol UDP & UDPLite (RFC 3828). + * + */ + +/* @todo Check the use of '(struct udp_pcb).chksum_len_rx'! + */ + +#include "lwip/opt.h" + +#if LWIP_UDP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/udp.h" +#include "lwip/def.h" +#include "lwip/memp.h" +#include "lwip/inet.h" +#include "lwip/inet_chksum.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/icmp.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "arch/perf.h" +#include "lwip/dhcp.h" + +#include + +/* The list of UDP PCBs */ +/* exported in udp.h (was static) */ +struct udp_pcb *udp_pcbs; + +/** + * Process an incoming UDP datagram. + * + * Given an incoming UDP datagram (as a chain of pbufs) this function + * finds a corresponding UDP PCB and hands over the pbuf to the pcbs + * recv function. If no pcb is found or the datagram is incorrect, the + * pbuf is freed. + * + * @param p pbuf to be demultiplexed to a UDP PCB. + * @param inp network interface on which the datagram was received. + * + */ +void +udp_input(struct pbuf *p, struct netif *inp) +{ + struct udp_hdr *udphdr; + struct udp_pcb *pcb, *prev; + struct udp_pcb *uncon_pcb; + struct ip_hdr *iphdr; + u16_t src, dest; + u8_t local_match; + u8_t broadcast; + + PERF_START; + + UDP_STATS_INC(udp.recv); + + iphdr = p->payload; + + /* Check minimum length (IP header + UDP header) + * and move payload pointer to UDP header */ + if (p->tot_len < (IPH_HL(iphdr) * 4 + UDP_HLEN) || pbuf_header(p, -(s16_t)(IPH_HL(iphdr) * 4))) { + /* drop short packets */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len)); + UDP_STATS_INC(udp.lenerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + + udphdr = (struct udp_hdr *)p->payload; + + /* is broadcast packet ? */ + broadcast = ip_addr_isbroadcast(&(iphdr->dest), inp); + + LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len)); + + /* convert src and dest ports to host byte order */ + src = ntohs(udphdr->src); + dest = ntohs(udphdr->dest); + + udp_debug_print(udphdr); + + /* print the UDP source and destination */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") <-- " + "(%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", + ip4_addr1(&iphdr->dest), ip4_addr2(&iphdr->dest), + ip4_addr3(&iphdr->dest), ip4_addr4(&iphdr->dest), ntohs(udphdr->dest), + ip4_addr1(&iphdr->src), ip4_addr2(&iphdr->src), + ip4_addr3(&iphdr->src), ip4_addr4(&iphdr->src), ntohs(udphdr->src))); + +#if LWIP_DHCP + pcb = NULL; + /* when LWIP_DHCP is active, packets to DHCP_CLIENT_PORT may only be processed by + the dhcp module, no other UDP pcb may use the local UDP port DHCP_CLIENT_PORT */ + if (dest == DHCP_CLIENT_PORT) { + /* all packets for DHCP_CLIENT_PORT not coming from DHCP_SERVER_PORT are dropped! */ + if (src == DHCP_SERVER_PORT) { + if ((inp->dhcp != NULL) && (inp->dhcp->pcb != NULL)) { + /* accept the packe if + (- broadcast or directed to us) -> DHCP is link-layer-addressed, local ip is always ANY! + - inp->dhcp->pcb->remote == ANY or iphdr->src */ + if ((ip_addr_isany(&inp->dhcp->pcb->remote_ip) || + ip_addr_cmp(&(inp->dhcp->pcb->remote_ip), &(iphdr->src)))) { + pcb = inp->dhcp->pcb; + } + } + } + } else +#endif /* LWIP_DHCP */ + { + prev = NULL; + local_match = 0; + uncon_pcb = NULL; + /* Iterate through the UDP pcb list for a matching pcb. + * 'Perfect match' pcbs (connected to the remote port & ip address) are + * preferred. If no perfect match is found, the first unconnected pcb that + * matches the local port and ip address gets the datagram. */ + for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) { + local_match = 0; + /* print the PCB local and remote address */ + LWIP_DEBUGF(UDP_DEBUG, + ("pcb (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") --- " + "(%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n", + ip4_addr1(&pcb->local_ip), ip4_addr2(&pcb->local_ip), + ip4_addr3(&pcb->local_ip), ip4_addr4(&pcb->local_ip), pcb->local_port, + ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip), + ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip), pcb->remote_port)); + + /* compare PCB local addr+port to UDP destination addr+port */ + if ((pcb->local_port == dest) && + ((!broadcast && ip_addr_isany(&pcb->local_ip)) || + ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest)) || +#if LWIP_IGMP + ip_addr_ismulticast(&(iphdr->dest)) || +#endif /* LWIP_IGMP */ +#if IP_SOF_BROADCAST_RECV + (broadcast && (pcb->so_options & SOF_BROADCAST)))) { +#else /* IP_SOF_BROADCAST_RECV */ + (broadcast))) { +#endif /* IP_SOF_BROADCAST_RECV */ + local_match = 1; + if ((uncon_pcb == NULL) && + ((pcb->flags & UDP_FLAGS_CONNECTED) == 0)) { + /* the first unconnected matching PCB */ + uncon_pcb = pcb; + } + } + /* compare PCB remote addr+port to UDP source addr+port */ + if ((local_match != 0) && + (pcb->remote_port == src) && + (ip_addr_isany(&pcb->remote_ip) || + ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)))) { + /* the first fully matching PCB */ + if (prev != NULL) { + /* move the pcb to the front of udp_pcbs so that is + found faster next time */ + prev->next = pcb->next; + pcb->next = udp_pcbs; + udp_pcbs = pcb; + } else { + UDP_STATS_INC(udp.cachehit); + } + break; + } + prev = pcb; + } + /* no fully matching pcb found? then look for an unconnected pcb */ + if (pcb == NULL) { + pcb = uncon_pcb; + } + } + + /* Check checksum if this is a match or if it was directed at us. */ + if (pcb != NULL || ip_addr_cmp(&inp->ip_addr, &iphdr->dest)) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_input: calculating checksum\n")); +#if LWIP_UDPLITE + if (IPH_PROTO(iphdr) == IP_PROTO_UDPLITE) { + /* Do the UDP Lite checksum */ +#if CHECKSUM_CHECK_UDP + u16_t chklen = ntohs(udphdr->len); + if (chklen < sizeof(struct udp_hdr)) { + if (chklen == 0) { + /* For UDP-Lite, checksum length of 0 means checksum + over the complete packet (See RFC 3828 chap. 3.1) */ + chklen = p->tot_len; + } else { + /* At least the UDP-Lite header must be covered by the + checksum! (Again, see RFC 3828 chap. 3.1) */ + UDP_STATS_INC(udp.chkerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + } + if (inet_chksum_pseudo_partial(p, (struct ip_addr *)&(iphdr->src), + (struct ip_addr *)&(iphdr->dest), + IP_PROTO_UDPLITE, p->tot_len, chklen) != 0) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("udp_input: UDP Lite datagram discarded due to failing checksum\n")); + UDP_STATS_INC(udp.chkerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } +#endif /* CHECKSUM_CHECK_UDP */ + } else +#endif /* LWIP_UDPLITE */ + { +#if CHECKSUM_CHECK_UDP + if (udphdr->chksum != 0) { + if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src), + (struct ip_addr *)&(iphdr->dest), + IP_PROTO_UDP, p->tot_len) != 0) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("udp_input: UDP datagram discarded due to failing checksum\n")); + UDP_STATS_INC(udp.chkerr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + } +#endif /* CHECKSUM_CHECK_UDP */ + } + if(pbuf_header(p, -UDP_HLEN)) { + /* Can we cope with this failing? Just assert for now */ + LWIP_ASSERT("pbuf_header failed\n", 0); + UDP_STATS_INC(udp.drop); + snmp_inc_udpinerrors(); + pbuf_free(p); + goto end; + } + if (pcb != NULL) { + snmp_inc_udpindatagrams(); + /* callback */ + if (pcb->recv != NULL) { + /* now the recv function is responsible for freeing p */ + pcb->recv(pcb->recv_arg, pcb, p, &iphdr->src, src); + } else { + /* no recv function registered? then we have to free the pbuf! */ + pbuf_free(p); + goto end; + } + } else { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_input: not for us.\n")); + +#if LWIP_ICMP + /* No match was found, send ICMP destination port unreachable unless + destination address was broadcast/multicast. */ + if (!broadcast && + !ip_addr_ismulticast(&iphdr->dest)) { + /* move payload pointer back to ip header */ + pbuf_header(p, (IPH_HL(iphdr) * 4) + UDP_HLEN); + LWIP_ASSERT("p->payload == iphdr", (p->payload == iphdr)); + icmp_dest_unreach(p, ICMP_DUR_PORT); + } +#endif /* LWIP_ICMP */ + UDP_STATS_INC(udp.proterr); + UDP_STATS_INC(udp.drop); + snmp_inc_udpnoports(); + pbuf_free(p); + } + } else { + pbuf_free(p); + } +end: + PERF_STOP("udp_input"); +} + +/** + * Send data using UDP. + * + * @param pcb UDP PCB used to send the data. + * @param p chain of pbuf's to be sent. + * + * The datagram will be sent to the current remote_ip & remote_port + * stored in pcb. If the pcb is not bound to a port, it will + * automatically be bound to a random port. + * + * @return lwIP error code. + * - ERR_OK. Successful. No error occured. + * - ERR_MEM. Out of memory. + * - ERR_RTE. Could not find route to destination address. + * - More errors could be returned by lower protocol layers. + * + * @see udp_disconnect() udp_sendto() + */ +err_t +udp_send(struct udp_pcb *pcb, struct pbuf *p) +{ + /* send to the packet using remote ip and port stored in the pcb */ + return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port); +} + +/** + * Send data to a specified address using UDP. + * + * @param pcb UDP PCB used to send the data. + * @param p chain of pbuf's to be sent. + * @param dst_ip Destination IP address. + * @param dst_port Destination UDP port. + * + * dst_ip & dst_port are expected to be in the same byte order as in the pcb. + * + * If the PCB already has a remote address association, it will + * be restored after the data is sent. + * + * @return lwIP error code (@see udp_send for possible error codes) + * + * @see udp_disconnect() udp_send() + */ +err_t +udp_sendto(struct udp_pcb *pcb, struct pbuf *p, + struct ip_addr *dst_ip, u16_t dst_port) +{ + struct netif *netif; + + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n")); + + /* find the outgoing network interface for this packet */ +#if LWIP_IGMP + netif = ip_route((ip_addr_ismulticast(dst_ip))?(&(pcb->multicast_ip)):(dst_ip)); +#else + netif = ip_route(dst_ip); +#endif /* LWIP_IGMP */ + + /* no outgoing network interface could be found? */ + if (netif == NULL) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to 0x%"X32_F"\n", dst_ip->addr)); + UDP_STATS_INC(udp.rterr); + return ERR_RTE; + } + return udp_sendto_if(pcb, p, dst_ip, dst_port, netif); +} + +/** + * Send data to a specified address using UDP. + * The netif used for sending can be specified. + * + * This function exists mainly for DHCP, to be able to send UDP packets + * on a netif that is still down. + * + * @param pcb UDP PCB used to send the data. + * @param p chain of pbuf's to be sent. + * @param dst_ip Destination IP address. + * @param dst_port Destination UDP port. + * @param netif the netif used for sending. + * + * dst_ip & dst_port are expected to be in the same byte order as in the pcb. + * + * @return lwIP error code (@see udp_send for possible error codes) + * + * @see udp_disconnect() udp_send() + */ +err_t +udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p, + struct ip_addr *dst_ip, u16_t dst_port, struct netif *netif) +{ + struct udp_hdr *udphdr; + struct ip_addr *src_ip; + err_t err; + struct pbuf *q; /* q will be sent down the stack */ + +#if IP_SOF_BROADCAST + /* broadcast filter? */ + if ( ((pcb->so_options & SOF_BROADCAST) == 0) && ip_addr_isbroadcast(dst_ip, netif) ) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, + ("udp_sendto_if: SOF_BROADCAST not enabled on pcb %p\n", (void *)pcb)); + return ERR_VAL; + } +#endif /* IP_SOF_BROADCAST */ + + /* if the PCB is not yet bound to a port, bind it here */ + if (pcb->local_port == 0) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n")); + err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); + if (err != ERR_OK) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n")); + return err; + } + } + + /* not enough space to add an UDP header to first pbuf in given p chain? */ + if (pbuf_header(p, UDP_HLEN)) { + /* allocate header in a separate new pbuf */ + q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM); + /* new header pbuf could not be allocated? */ + if (q == NULL) { + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n")); + return ERR_MEM; + } + /* chain header q in front of given pbuf p */ + pbuf_chain(q, p); + /* first pbuf q points to header pbuf */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p)); + } else { + /* adding space for header within p succeeded */ + /* first pbuf q equals given pbuf */ + q = p; + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p)); + } + LWIP_ASSERT("check that first pbuf can hold struct udp_hdr", + (q->len >= sizeof(struct udp_hdr))); + /* q now represents the packet to be sent */ + udphdr = q->payload; + udphdr->src = htons(pcb->local_port); + udphdr->dest = htons(dst_port); + /* in UDP, 0 checksum means 'no checksum' */ + udphdr->chksum = 0x0000; + + /* PCB local address is IP_ANY_ADDR? */ + if (ip_addr_isany(&pcb->local_ip)) { + /* use outgoing network interface IP address as source address */ + src_ip = &(netif->ip_addr); + } else { + /* check if UDP PCB local IP address is correct + * this could be an old address if netif->ip_addr has changed */ + if (!ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr))) { + /* local_ip doesn't match, drop the packet */ + if (q != p) { + /* free the header pbuf */ + pbuf_free(q); + q = NULL; + /* p is still referenced by the caller, and will live on */ + } + return ERR_VAL; + } + /* use UDP PCB local IP address as source address */ + src_ip = &(pcb->local_ip); + } + + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: sending datagram of length %"U16_F"\n", q->tot_len)); + +#if LWIP_UDPLITE + /* UDP Lite protocol? */ + if (pcb->flags & UDP_FLAGS_UDPLITE) { + u16_t chklen, chklen_hdr; + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE packet length %"U16_F"\n", q->tot_len)); + /* set UDP message length in UDP header */ + chklen_hdr = chklen = pcb->chksum_len_tx; + if ((chklen < sizeof(struct udp_hdr)) || (chklen > q->tot_len)) { + if (chklen != 0) { + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE pcb->chksum_len is illegal: %"U16_F"\n", chklen)); + } + /* For UDP-Lite, checksum length of 0 means checksum + over the complete packet. (See RFC 3828 chap. 3.1) + At least the UDP-Lite header must be covered by the + checksum, therefore, if chksum_len has an illegal + value, we generate the checksum over the complete + packet to be safe. */ + chklen_hdr = 0; + chklen = q->tot_len; + } + udphdr->len = htons(chklen_hdr); + /* calculate checksum */ +#if CHECKSUM_GEN_UDP + udphdr->chksum = inet_chksum_pseudo_partial(q, src_ip, dst_ip, + IP_PROTO_UDPLITE, q->tot_len, chklen); + /* chksum zero must become 0xffff, as zero means 'no checksum' */ + if (udphdr->chksum == 0x0000) + udphdr->chksum = 0xffff; +#endif /* CHECKSUM_CHECK_UDP */ + /* output to IP */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDPLITE,)\n")); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = &(pcb->addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT*/ + err = ip_output_if(q, src_ip, dst_ip, pcb->ttl, pcb->tos, IP_PROTO_UDPLITE, netif); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ + } else +#endif /* LWIP_UDPLITE */ + { /* UDP */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len)); + udphdr->len = htons(q->tot_len); + /* calculate checksum */ +#if CHECKSUM_GEN_UDP + if ((pcb->flags & UDP_FLAGS_NOCHKSUM) == 0) { + udphdr->chksum = inet_chksum_pseudo(q, src_ip, dst_ip, IP_PROTO_UDP, q->tot_len); + /* chksum zero must become 0xffff, as zero means 'no checksum' */ + if (udphdr->chksum == 0x0000) udphdr->chksum = 0xffff; + } +#endif /* CHECKSUM_CHECK_UDP */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum)); + LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDP,)\n")); + /* output to IP */ +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = &(pcb->addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT*/ + err = ip_output_if(q, src_ip, dst_ip, pcb->ttl, pcb->tos, IP_PROTO_UDP, netif); +#if LWIP_NETIF_HWADDRHINT + netif->addr_hint = NULL; +#endif /* LWIP_NETIF_HWADDRHINT*/ + } + /* TODO: must this be increased even if error occured? */ + snmp_inc_udpoutdatagrams(); + + /* did we chain a separate header pbuf earlier? */ + if (q != p) { + /* free the header pbuf */ + pbuf_free(q); + q = NULL; + /* p is still referenced by the caller, and will live on */ + } + + UDP_STATS_INC(udp.xmit); + return err; +} + +/** + * Bind an UDP PCB. + * + * @param pcb UDP PCB to be bound with a local address ipaddr and port. + * @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to + * bind to all local interfaces. + * @param port local UDP port to bind with. Use 0 to automatically bind + * to a random port between UDP_LOCAL_PORT_RANGE_START and + * UDP_LOCAL_PORT_RANGE_END. + * + * ipaddr & port are expected to be in the same byte order as in the pcb. + * + * @return lwIP error code. + * - ERR_OK. Successful. No error occured. + * - ERR_USE. The specified ipaddr and port are already bound to by + * another UDP PCB. + * + * @see udp_disconnect() + */ +err_t +udp_bind(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) +{ + struct udp_pcb *ipcb; + u8_t rebind; + + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = ")); + ip_addr_debug_print(UDP_DEBUG, ipaddr); + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port)); + + rebind = 0; + /* Check for double bind and rebind of the same pcb */ + for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { + /* is this UDP PCB already on active list? */ + if (pcb == ipcb) { + /* pcb may occur at most once in active list */ + LWIP_ASSERT("rebind == 0", rebind == 0); + /* pcb already in list, just rebind */ + rebind = 1; + } + + /* this code does not allow upper layer to share a UDP port for + listening to broadcast or multicast traffic (See SO_REUSE_ADDR and + SO_REUSE_PORT under *BSD). TODO: See where it fits instead, OR + combine with implementation of UDP PCB flags. Leon Woestenberg. */ +#ifdef LWIP_UDP_TODO + /* port matches that of PCB in list? */ + else + if ((ipcb->local_port == port) && + /* IP address matches, or one is IP_ADDR_ANY? */ + (ip_addr_isany(&(ipcb->local_ip)) || + ip_addr_isany(ipaddr) || + ip_addr_cmp(&(ipcb->local_ip), ipaddr))) { + /* other PCB already binds to this local IP and port */ + LWIP_DEBUGF(UDP_DEBUG, + ("udp_bind: local port %"U16_F" already bound by another pcb\n", port)); + return ERR_USE; + } +#endif + } + + ip_addr_set(&pcb->local_ip, ipaddr); + + /* no port specified? */ + if (port == 0) { +#ifndef UDP_LOCAL_PORT_RANGE_START +#define UDP_LOCAL_PORT_RANGE_START 4096 +#define UDP_LOCAL_PORT_RANGE_END 0x7fff +#endif + port = UDP_LOCAL_PORT_RANGE_START; + ipcb = udp_pcbs; + while ((ipcb != NULL) && (port != UDP_LOCAL_PORT_RANGE_END)) { + if (ipcb->local_port == port) { + /* port is already used by another udp_pcb */ + port++; + /* restart scanning all udp pcbs */ + ipcb = udp_pcbs; + } else + /* go on with next udp pcb */ + ipcb = ipcb->next; + } + if (ipcb != NULL) { + /* no more ports available in local range */ + LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n")); + return ERR_USE; + } + } + pcb->local_port = port; + snmp_insert_udpidx_tree(pcb); + /* pcb not active yet? */ + if (rebind == 0) { + /* place the PCB on the active list if not already there */ + pcb->next = udp_pcbs; + udp_pcbs = pcb; + } + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("udp_bind: bound to %"U16_F".%"U16_F".%"U16_F".%"U16_F", port %"U16_F"\n", + (u16_t)((ntohl(pcb->local_ip.addr) >> 24) & 0xff), + (u16_t)((ntohl(pcb->local_ip.addr) >> 16) & 0xff), + (u16_t)((ntohl(pcb->local_ip.addr) >> 8) & 0xff), + (u16_t)(ntohl(pcb->local_ip.addr) & 0xff), pcb->local_port)); + return ERR_OK; +} +/** + * Connect an UDP PCB. + * + * This will associate the UDP PCB with the remote address. + * + * @param pcb UDP PCB to be connected with remote address ipaddr and port. + * @param ipaddr remote IP address to connect with. + * @param port remote UDP port to connect with. + * + * @return lwIP error code + * + * ipaddr & port are expected to be in the same byte order as in the pcb. + * + * The udp pcb is bound to a random local port if not already bound. + * + * @see udp_disconnect() + */ +err_t +udp_connect(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port) +{ + struct udp_pcb *ipcb; + + if (pcb->local_port == 0) { + err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port); + if (err != ERR_OK) + return err; + } + + ip_addr_set(&pcb->remote_ip, ipaddr); + pcb->remote_port = port; + pcb->flags |= UDP_FLAGS_CONNECTED; +/** TODO: this functionality belongs in upper layers */ +#ifdef LWIP_UDP_TODO + /* Nail down local IP for netconn_addr()/getsockname() */ + if (ip_addr_isany(&pcb->local_ip) && !ip_addr_isany(&pcb->remote_ip)) { + struct netif *netif; + + if ((netif = ip_route(&(pcb->remote_ip))) == NULL) { + LWIP_DEBUGF(UDP_DEBUG, ("udp_connect: No route to 0x%lx\n", pcb->remote_ip.addr)); + UDP_STATS_INC(udp.rterr); + return ERR_RTE; + } + /** TODO: this will bind the udp pcb locally, to the interface which + is used to route output packets to the remote address. However, we + might want to accept incoming packets on any interface! */ + pcb->local_ip = netif->ip_addr; + } else if (ip_addr_isany(&pcb->remote_ip)) { + pcb->local_ip.addr = 0; + } +#endif + LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, + ("udp_connect: connected to %"U16_F".%"U16_F".%"U16_F".%"U16_F",port %"U16_F"\n", + (u16_t)((ntohl(pcb->remote_ip.addr) >> 24) & 0xff), + (u16_t)((ntohl(pcb->remote_ip.addr) >> 16) & 0xff), + (u16_t)((ntohl(pcb->remote_ip.addr) >> 8) & 0xff), + (u16_t)(ntohl(pcb->remote_ip.addr) & 0xff), pcb->remote_port)); + + /* Insert UDP PCB into the list of active UDP PCBs. */ + for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) { + if (pcb == ipcb) { + /* already on the list, just return */ + return ERR_OK; + } + } + /* PCB not yet on the list, add PCB now */ + pcb->next = udp_pcbs; + udp_pcbs = pcb; + return ERR_OK; +} + +/** + * Disconnect a UDP PCB + * + * @param pcb the udp pcb to disconnect. + */ +void +udp_disconnect(struct udp_pcb *pcb) +{ + /* reset remote address association */ + ip_addr_set(&pcb->remote_ip, IP_ADDR_ANY); + pcb->remote_port = 0; + /* mark PCB as unconnected */ + pcb->flags &= ~UDP_FLAGS_CONNECTED; +} + +/** + * Set a receive callback for a UDP PCB + * + * This callback will be called when receiving a datagram for the pcb. + * + * @param pcb the pcb for wich to set the recv callback + * @param recv function pointer of the callback function + * @param recv_arg additional argument to pass to the callback function + */ +void +udp_recv(struct udp_pcb *pcb, + void (* recv)(void *arg, struct udp_pcb *upcb, struct pbuf *p, + struct ip_addr *addr, u16_t port), + void *recv_arg) +{ + /* remember recv() callback and user data */ + pcb->recv = recv; + pcb->recv_arg = recv_arg; +} + +/** + * Remove an UDP PCB. + * + * @param pcb UDP PCB to be removed. The PCB is removed from the list of + * UDP PCB's and the data structure is freed from memory. + * + * @see udp_new() + */ +void +udp_remove(struct udp_pcb *pcb) +{ + struct udp_pcb *pcb2; + + snmp_delete_udpidx_tree(pcb); + /* pcb to be removed is first in list? */ + if (udp_pcbs == pcb) { + /* make list start at 2nd pcb */ + udp_pcbs = udp_pcbs->next; + /* pcb not 1st in list */ + } else + for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) { + /* find pcb in udp_pcbs list */ + if (pcb2->next != NULL && pcb2->next == pcb) { + /* remove pcb from list */ + pcb2->next = pcb->next; + } + } + memp_free(MEMP_UDP_PCB, pcb); +} + +/** + * Create a UDP PCB. + * + * @return The UDP PCB which was created. NULL if the PCB data structure + * could not be allocated. + * + * @see udp_remove() + */ +struct udp_pcb * +udp_new(void) +{ + struct udp_pcb *pcb; + pcb = memp_malloc(MEMP_UDP_PCB); + /* could allocate UDP PCB? */ + if (pcb != NULL) { + /* UDP Lite: by initializing to all zeroes, chksum_len is set to 0 + * which means checksum is generated over the whole datagram per default + * (recommended as default by RFC 3828). */ + /* initialize PCB to all zeroes */ + memset(pcb, 0, sizeof(struct udp_pcb)); + pcb->ttl = UDP_TTL; + } + return pcb; +} + +#if UDP_DEBUG +/** + * Print UDP header information for debug purposes. + * + * @param udphdr pointer to the udp header in memory. + */ +void +udp_debug_print(struct udp_hdr *udphdr) +{ + LWIP_DEBUGF(UDP_DEBUG, ("UDP header:\n")); + LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n", + ntohs(udphdr->src), ntohs(udphdr->dest))); + LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); + LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | 0x%04"X16_F" | (len, chksum)\n", + ntohs(udphdr->len), ntohs(udphdr->chksum))); + LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n")); +} +#endif /* UDP_DEBUG */ + +#endif /* LWIP_UDP */ diff --git a/bertos/net/lwip/src/include/arch/cc.h b/bertos/net/lwip/src/include/arch/cc.h new file mode 100644 index 0000000..fd8bb44 --- /dev/null +++ b/bertos/net/lwip/src/include/arch/cc.h @@ -0,0 +1,129 @@ +/** + * \file + * + * + * \author Luca Ottaviano + * + * \brief Compiler defines for Emulation Layer for lwIP + * - Architecture environment, some compiler specific, some + * environment specific (probably should move env stuff + * to sys_arch.h.) + * + */ + +#ifndef LWIP_CC_H +#define LWIP_CC_H + +#include +#include +#include +#ifndef BYTE_ORDER + #if CPU_BYTE_ORDER == CPU_BIG_ENDIAN + #define BYTE_ORDER BIG_ENDIAN + #elif CPU_BYTE_ORDER == CPU_LITTLE_ENDIAN + #define BYTE_ORDER LITTLE_ENDIAN + #endif +#endif + +#include + +#include +// Unix error codes required by lwip +#include +// memset required by lwip +#include + +typedef uint8_t u8_t; +typedef int8_t s8_t; +typedef uint16_t u16_t; +typedef int16_t s16_t; +typedef uint32_t u32_t; +typedef int32_t s32_t; +typedef int mem_ptr_t; + + +/* Define (sn)printf formatters for these lwIP types */ +#if CPU_ARM_AT91 || CPU_CM3_SAM3 || (ARCH & ARCH_EMUL) + #define U16_F "hu" + #define S16_F "d" + #define X16_F "x" + #define U32_F "lu" + #define S32_F "ld" + #define X32_F "lx" +#elif CPU_AVR + #define U16_F "u" + #define S16_F "d" + #define X16_F "x" + #define U32_F "lu" + #define S32_F "ld" + #define X32_F "lx" +#else + #error This CPU is currently unsupported by lwip +#endif + +/** + * Compiler hints for packing lwip's structures + */ +#define PACK_STRUCT_STRUCT PACKED + +/* + * Platform specific diagnostic output + */ +// not fatal, print a message +#define LWIP_PLATFORM_DIAG(y) kprintf y + +// fatal, print message and abandon execution. +#define LWIP_PLATFORM_ASSERT(y) \ + do { \ + kprintf(y); \ + ASSERT(0); \ + } while(0) + +/* + * "lightweight" synchronization mechanisms + * + * SYS_LIGHTWEIGHT_PROT + * define SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection + * for certain critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ + +// TODO: if lwip is not used within multiple processes or interrupts, it's ok +// not to define them +/* #define SYS_ARCH_DECL_PROTECT(x) - declare a protection state variable. + SYS_ARCH_PROTECT(x) - enter protection mode. + SYS_ARCH_UNPROTECT(x) - leave protection mode. */ + +#define SYS_ARCH_DECL_PROTECT(x) +#define SYS_ARCH_PROTECT(x) proc_forbid() +#define SYS_ARCH_UNPROTECT(x) proc_permit() + +#endif diff --git a/bertos/net/lwip/src/include/arch/perf.h b/bertos/net/lwip/src/include/arch/perf.h new file mode 100644 index 0000000..10891dd --- /dev/null +++ b/bertos/net/lwip/src/include/arch/perf.h @@ -0,0 +1,7 @@ +#ifndef LWIP_PERF_H +#define LWIP_PERF_H + +#define PERF_START +#define PERF_STOP + +#endif diff --git a/bertos/net/lwip/src/include/arch/sys_arch.h b/bertos/net/lwip/src/include/arch/sys_arch.h new file mode 100644 index 0000000..2af49b0 --- /dev/null +++ b/bertos/net/lwip/src/include/arch/sys_arch.h @@ -0,0 +1,103 @@ +/** + * \file + * + * + * \author Luca Ottaviano + * + * \brief Emulation Layer for lwIP + */ + +#ifndef LWIP_SYS_ARCH_H +#define LWIP_SYS_ARCH_H + +#include + +#include +#include +#include + +/****************************************************************************/ + +/* + * Generic mutex (binary semaphore) prototypes + * + * TODO: move this to a different place (i.e., bertos/kern/sem.h). + */ +#include // cpu_atomic_xchg() +#include + +#include + +#define MUTEX_UNLOCKED 1 +#define MUTEX_LOCKED (!MUTEX_UNLOCKED) + +typedef struct Mutex +{ + List wait_queue; + cpu_atomic_t count; +} Mutex; + +void mutex_init(struct Mutex *s); +bool mutex_attempt(struct Mutex *s); +void mutex_obtain(struct Mutex *s); +void mutex_release(struct Mutex *s); + +/****************************************************************************/ + +typedef Mutex *sys_sem_t; +typedef MsgPort *sys_mbox_t; +typedef struct Process *sys_thread_t; +// TODO: what does it mean? +typedef int sys_prot_t; + +#define SYS_MBOX_NULL (sys_mbox_t)0 +#define SYS_SEM_NULL (sys_sem_t)0 + + +EXTERN_C_BEGIN + +void sys_init(void); + +sys_sem_t sys_sem_new(u8_t count); +void sys_sem_free(sys_sem_t sem); +void sys_sem_signal(sys_sem_t sem); +u32_t sys_arch_sem_wait(sys_sem_t sem, u32_t timeout); + +sys_mbox_t sys_mbox_new(int); +void sys_mbox_free(sys_mbox_t mbox); +void sys_mbox_post(sys_mbox_t mbox, void *msg); +u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout); + +struct sys_timeouts *sys_arch_timeouts(void); + +EXTERN_C_END + +#endif diff --git a/bertos/net/lwip/src/include/ipv4/lwip/autoip.h b/bertos/net/lwip/src/include/ipv4/lwip/autoip.h new file mode 100644 index 0000000..f262165 --- /dev/null +++ b/bertos/net/lwip/src/include/ipv4/lwip/autoip.h @@ -0,0 +1,116 @@ +/** + * @file + * + * AutoIP Automatic LinkLocal IP Configuration + */ + +/* + * + * Copyright (c) 2007 Dominik Spies + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Dominik Spies + * + * This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform + * with RFC 3927. + * + * + * Please coordinate changes and requests with Dominik Spies + * + */ + +#ifndef __LWIP_AUTOIP_H__ +#define __LWIP_AUTOIP_H__ + +#include "lwip/opt.h" + +#if LWIP_AUTOIP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netif.h" +#include "lwip/udp.h" +#include "netif/etharp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* AutoIP Timing */ +#define AUTOIP_TMR_INTERVAL 100 +#define AUTOIP_TICKS_PER_SECOND (1000 / AUTOIP_TMR_INTERVAL) + +/* RFC 3927 Constants */ +#define PROBE_WAIT 1 /* second (initial random delay) */ +#define PROBE_MIN 1 /* second (minimum delay till repeated probe) */ +#define PROBE_MAX 2 /* seconds (maximum delay till repeated probe) */ +#define PROBE_NUM 3 /* (number of probe packets) */ +#define ANNOUNCE_NUM 2 /* (number of announcement packets) */ +#define ANNOUNCE_INTERVAL 2 /* seconds (time between announcement packets) */ +#define ANNOUNCE_WAIT 2 /* seconds (delay before announcing) */ +#define MAX_CONFLICTS 10 /* (max conflicts before rate limiting) */ +#define RATE_LIMIT_INTERVAL 60 /* seconds (delay between successive attempts) */ +#define DEFEND_INTERVAL 10 /* seconds (min. wait between defensive ARPs) */ + +/* AutoIP client states */ +#define AUTOIP_STATE_OFF 0 +#define AUTOIP_STATE_PROBING 1 +#define AUTOIP_STATE_ANNOUNCING 2 +#define AUTOIP_STATE_BOUND 3 + +struct autoip +{ + struct ip_addr llipaddr; /* the currently selected, probed, announced or used LL IP-Address */ + u8_t state; /* current AutoIP state machine state */ + u8_t sent_num; /* sent number of probes or announces, dependent on state */ + u16_t ttw; /* ticks to wait, tick is AUTOIP_TMR_INTERVAL long */ + u8_t lastconflict; /* ticks until a conflict can be solved by defending */ + u8_t tried_llipaddr; /* total number of probed/used Link Local IP-Addresses */ +}; + + +/** Init srand, has to be called before entering mainloop */ +void autoip_init(void); + +/** Start AutoIP client */ +err_t autoip_start(struct netif *netif); + +/** Stop AutoIP client */ +err_t autoip_stop(struct netif *netif); + +/** Handles every incoming ARP Packet, called by etharp_arp_input */ +void autoip_arp_reply(struct netif *netif, struct etharp_hdr *hdr); + +/** Has to be called in loop every AUTOIP_TMR_INTERVAL milliseconds */ +void autoip_tmr(void); + +/** Handle a possible change in the network configuration */ +void autoip_network_changed(struct netif *netif); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_AUTOIP */ + +#endif /* __LWIP_AUTOIP_H__ */ diff --git a/bertos/net/lwip/src/include/ipv4/lwip/icmp.h b/bertos/net/lwip/src/include/ipv4/lwip/icmp.h new file mode 100644 index 0000000..c73961c --- /dev/null +++ b/bertos/net/lwip/src/include/ipv4/lwip/icmp.h @@ -0,0 +1,111 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ICMP_H__ +#define __LWIP_ICMP_H__ + +#include "lwip/opt.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define ICMP_ER 0 /* echo reply */ +#define ICMP_DUR 3 /* destination unreachable */ +#define ICMP_SQ 4 /* source quench */ +#define ICMP_RD 5 /* redirect */ +#define ICMP_ECHO 8 /* echo */ +#define ICMP_TE 11 /* time exceeded */ +#define ICMP_PP 12 /* parameter problem */ +#define ICMP_TS 13 /* timestamp */ +#define ICMP_TSR 14 /* timestamp reply */ +#define ICMP_IRQ 15 /* information request */ +#define ICMP_IR 16 /* information reply */ + +enum icmp_dur_type { + ICMP_DUR_NET = 0, /* net unreachable */ + ICMP_DUR_HOST = 1, /* host unreachable */ + ICMP_DUR_PROTO = 2, /* protocol unreachable */ + ICMP_DUR_PORT = 3, /* port unreachable */ + ICMP_DUR_FRAG = 4, /* fragmentation needed and DF set */ + ICMP_DUR_SR = 5 /* source route failed */ +}; + +enum icmp_te_type { + ICMP_TE_TTL = 0, /* time to live exceeded in transit */ + ICMP_TE_FRAG = 1 /* fragment reassembly time exceeded */ +}; + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +/** This is the standard ICMP header only that the u32_t data + * is splitted to two u16_t like ICMP echo needs it. + * This header is also used for other ICMP types that do not + * use the data part. + */ +PACK_STRUCT_BEGIN +struct icmp_echo_hdr { + PACK_STRUCT_FIELD(u8_t type); + PACK_STRUCT_FIELD(u8_t code); + PACK_STRUCT_FIELD(u16_t chksum); + PACK_STRUCT_FIELD(u16_t id); + PACK_STRUCT_FIELD(u16_t seqno); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define ICMPH_TYPE(hdr) ((hdr)->type) +#define ICMPH_CODE(hdr) ((hdr)->code) + +/** Combines type and code to an u16_t */ +#define ICMPH_TYPE_SET(hdr, t) ((hdr)->type = (t)) +#define ICMPH_CODE_SET(hdr, c) ((hdr)->code = (c)) + + +#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */ + +void icmp_input(struct pbuf *p, struct netif *inp); +void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t); +void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t); + +#endif /* LWIP_ICMP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_ICMP_H__ */ diff --git a/bertos/net/lwip/src/include/ipv4/lwip/igmp.h b/bertos/net/lwip/src/include/ipv4/lwip/igmp.h new file mode 100644 index 0000000..59c933f --- /dev/null +++ b/bertos/net/lwip/src/include/ipv4/lwip/igmp.h @@ -0,0 +1,162 @@ +/* + * Copyright (c) 2002 CITEL Technologies Ltd. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of CITEL Technologies Ltd nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY CITEL TECHNOLOGIES AND CONTRIBUTORS ``AS IS'' + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL CITEL TECHNOLOGIES OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is a contribution to the lwIP TCP/IP stack. + * The Swedish Institute of Computer Science and Adam Dunkels + * are specifically granted permission to redistribute this + * source code. +*/ + +#ifndef __LWIP_IGMP_H__ +#define __LWIP_IGMP_H__ + +#include "lwip/opt.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/pbuf.h" + +#if LWIP_IGMP /* don't build if not configured for use in lwipopts.h */ + +#ifdef __cplusplus +extern "C" { +#endif + +/* + * IGMP constants + */ +#define IP_PROTO_IGMP 2 +#define IGMP_TTL 1 +#define IGMP_MINLEN 8 +#define ROUTER_ALERT 0x9404 +#define ROUTER_ALERTLEN 4 + +/* + * IGMP message types, including version number. + */ +#define IGMP_MEMB_QUERY 0x11 /* Membership query */ +#define IGMP_V1_MEMB_REPORT 0x12 /* Ver. 1 membership report */ +#define IGMP_V2_MEMB_REPORT 0x16 /* Ver. 2 membership report */ +#define IGMP_LEAVE_GROUP 0x17 /* Leave-group message */ + +/* IGMP timer */ +#define IGMP_TMR_INTERVAL 100 /* Milliseconds */ +#define IGMP_V1_DELAYING_MEMBER_TMR (1000/IGMP_TMR_INTERVAL) +#define IGMP_JOIN_DELAYING_MEMBER_TMR (500 /IGMP_TMR_INTERVAL) + +/* MAC Filter Actions */ +#define IGMP_DEL_MAC_FILTER 0 +#define IGMP_ADD_MAC_FILTER 1 + +/* Group membership states */ +#define IGMP_GROUP_NON_MEMBER 0 +#define IGMP_GROUP_DELAYING_MEMBER 1 +#define IGMP_GROUP_IDLE_MEMBER 2 + +/* + * IGMP packet format. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct igmp_msg { + PACK_STRUCT_FIELD(u8_t igmp_msgtype); + PACK_STRUCT_FIELD(u8_t igmp_maxresp); + PACK_STRUCT_FIELD(u16_t igmp_checksum); + PACK_STRUCT_FIELD(struct ip_addr igmp_group_address); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/* + * now a group structure - there is + * a list of groups for each interface + * these should really be linked from the interface, but + * if we keep them separate we will not affect the lwip original code + * too much + * + * There will be a group for the all systems group address but this + * will not run the state machine as it is used to kick off reports + * from all the other groups + */ + +struct igmp_group { + struct igmp_group *next; + struct netif *interface; + struct ip_addr group_address; + u8_t last_reporter_flag; /* signifies we were the last person to report */ + u8_t group_state; + u16_t timer; + u8_t use; /* counter of simultaneous uses */ +}; + + +/* Prototypes */ +void igmp_init(void); + +err_t igmp_start( struct netif *netif); + +err_t igmp_stop( struct netif *netif); + +void igmp_report_groups( struct netif *netif); + +struct igmp_group *igmp_lookfor_group( struct netif *ifp, struct ip_addr *addr); + +struct igmp_group *igmp_lookup_group( struct netif *ifp, struct ip_addr *addr); + +err_t igmp_remove_group( struct igmp_group *group); + +void igmp_input( struct pbuf *p, struct netif *inp, struct ip_addr *dest); + +err_t igmp_joingroup( struct ip_addr *ifaddr, struct ip_addr *groupaddr); + +err_t igmp_leavegroup( struct ip_addr *ifaddr, struct ip_addr *groupaddr); + +void igmp_tmr(void); + +void igmp_timeout( struct igmp_group *group); + +void igmp_start_timer( struct igmp_group *group, u8_t max_time); + +void igmp_stop_timer( struct igmp_group *group); + +void igmp_delaying_member( struct igmp_group *group, u8_t maxresp); + +err_t igmp_ip_output_if( struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, u8_t ttl, u8_t proto, struct netif *netif); + +void igmp_send( struct igmp_group *group, u8_t type); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_IGMP */ + +#endif /* __LWIP_IGMP_H__ */ diff --git a/bertos/net/lwip/src/include/ipv4/lwip/inet.h b/bertos/net/lwip/src/include/ipv4/lwip/inet.h new file mode 100644 index 0000000..6f30d0d --- /dev/null +++ b/bertos/net/lwip/src/include/ipv4/lwip/inet.h @@ -0,0 +1,103 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INET_H__ +#define __LWIP_INET_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* For compatibility with BSD code */ +struct in_addr { + u32_t s_addr; +}; + +#define INADDR_NONE ((u32_t)0xffffffffUL) /* 255.255.255.255 */ +#define INADDR_LOOPBACK ((u32_t)0x7f000001UL) /* 127.0.0.1 */ +#define INADDR_ANY ((u32_t)0x00000000UL) /* 0.0.0.0 */ +#define INADDR_BROADCAST ((u32_t)0xffffffffUL) /* 255.255.255.255 */ + +u32_t inet_addr(const char *cp); +int inet_aton(const char *cp, struct in_addr *addr); +char *inet_ntoa(struct in_addr addr); /* returns ptr to static buffer; not reentrant! */ + +#ifdef htons +#undef htons +#endif /* htons */ +#ifdef htonl +#undef htonl +#endif /* htonl */ +#ifdef ntohs +#undef ntohs +#endif /* ntohs */ +#ifdef ntohl +#undef ntohl +#endif /* ntohl */ + +#ifndef LWIP_PLATFORM_BYTESWAP +#define LWIP_PLATFORM_BYTESWAP 0 +#endif + +#if BYTE_ORDER == BIG_ENDIAN +#define htons(x) (x) +#define ntohs(x) (x) +#define htonl(x) (x) +#define ntohl(x) (x) +#else /* BYTE_ORDER != BIG_ENDIAN */ +#ifdef LWIP_PREFIX_BYTEORDER_FUNCS +/* workaround for naming collisions on some platforms */ +#define htons lwip_htons +#define ntohs lwip_ntohs +#define htonl lwip_htonl +#define ntohl lwip_ntohl +#endif /* LWIP_PREFIX_BYTEORDER_FUNCS */ +#if LWIP_PLATFORM_BYTESWAP +#define htons(x) LWIP_PLATFORM_HTONS(x) +#define ntohs(x) LWIP_PLATFORM_HTONS(x) +#define htonl(x) LWIP_PLATFORM_HTONL(x) +#define ntohl(x) LWIP_PLATFORM_HTONL(x) +#else /* LWIP_PLATFORM_BYTESWAP */ +u16_t htons(u16_t x); +u16_t ntohs(u16_t x); +u32_t htonl(u32_t x); +u32_t ntohl(u32_t x); +#endif /* LWIP_PLATFORM_BYTESWAP */ + +#endif /* BYTE_ORDER == BIG_ENDIAN */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INET_H__ */ diff --git a/bertos/net/lwip/src/include/ipv4/lwip/inet_chksum.h b/bertos/net/lwip/src/include/ipv4/lwip/inet_chksum.h new file mode 100644 index 0000000..5cae59c --- /dev/null +++ b/bertos/net/lwip/src/include/ipv4/lwip/inet_chksum.h @@ -0,0 +1,60 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INET_CHKSUM_H__ +#define __LWIP_INET_CHKSUM_H__ + +#include "lwip/opt.h" + +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +u16_t inet_chksum(void *dataptr, u16_t len); +u16_t inet_chksum_pbuf(struct pbuf *p); +u16_t inet_chksum_pseudo(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u16_t proto_len); +#if LWIP_UDPLITE +u16_t inet_chksum_pseudo_partial(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u16_t proto_len, u16_t chksum_len); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INET_H__ */ + diff --git a/bertos/net/lwip/src/include/ipv4/lwip/ip.h b/bertos/net/lwip/src/include/ipv4/lwip/ip.h new file mode 100644 index 0000000..fd84f30 --- /dev/null +++ b/bertos/net/lwip/src/include/ipv4/lwip/ip.h @@ -0,0 +1,198 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_IP_H__ +#define __LWIP_IP_H__ + +#include "lwip/opt.h" + +#include "lwip/def.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" +#include "lwip/err.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** Currently, the function ip_output_if_opt() is only used with IGMP */ +#define IP_OPTIONS_SEND LWIP_IGMP + +#define IP_HLEN 20 + +#define IP_PROTO_ICMP 1 +#define IP_PROTO_UDP 17 +#define IP_PROTO_UDPLITE 136 +#define IP_PROTO_TCP 6 + +/* This is passed as the destination address to ip_output_if (not + to ip_output), meaning that an IP header already is constructed + in the pbuf. This is used when TCP retransmits. */ +#ifdef IP_HDRINCL +#undef IP_HDRINCL +#endif /* IP_HDRINCL */ +#define IP_HDRINCL NULL + +#if LWIP_NETIF_HWADDRHINT +#define IP_PCB_ADDRHINT ;u8_t addr_hint +#else +#define IP_PCB_ADDRHINT +#endif /* LWIP_NETIF_HWADDRHINT */ + +/* This is the common part of all PCB types. It needs to be at the + beginning of a PCB type definition. It is located here so that + changes to this common part are made in one location instead of + having to change all PCB structs. */ +#define IP_PCB \ + /* ip addresses in network byte order */ \ + struct ip_addr local_ip; \ + struct ip_addr remote_ip; \ + /* Socket options */ \ + u16_t so_options; \ + /* Type Of Service */ \ + u8_t tos; \ + /* Time To Live */ \ + u8_t ttl \ + /* link layer address resolution hint */ \ + IP_PCB_ADDRHINT + +struct ip_pcb { +/* Common members of all PCB types */ + IP_PCB; +}; + +/* + * Option flags per-socket. These are the same like SO_XXX. + */ +#define SOF_DEBUG (u16_t)0x0001U /* turn on debugging info recording */ +#define SOF_ACCEPTCONN (u16_t)0x0002U /* socket has had listen() */ +#define SOF_REUSEADDR (u16_t)0x0004U /* allow local address reuse */ +#define SOF_KEEPALIVE (u16_t)0x0008U /* keep connections alive */ +#define SOF_DONTROUTE (u16_t)0x0010U /* just use interface addresses */ +#define SOF_BROADCAST (u16_t)0x0020U /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */ +#define SOF_USELOOPBACK (u16_t)0x0040U /* bypass hardware when possible */ +#define SOF_LINGER (u16_t)0x0080U /* linger on close if data present */ +#define SOF_OOBINLINE (u16_t)0x0100U /* leave received OOB data in line */ +#define SOF_REUSEPORT (u16_t)0x0200U /* allow local address & port reuse */ + + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_hdr { + /* version / header length / type of service */ + PACK_STRUCT_FIELD(u16_t _v_hl_tos); + /* total length */ + PACK_STRUCT_FIELD(u16_t _len); + /* identification */ + PACK_STRUCT_FIELD(u16_t _id); + /* fragment offset field */ + PACK_STRUCT_FIELD(u16_t _offset); +#define IP_RF 0x8000 /* reserved fragment flag */ +#define IP_DF 0x4000 /* dont fragment flag */ +#define IP_MF 0x2000 /* more fragments flag */ +#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */ + /* time to live / protocol*/ + PACK_STRUCT_FIELD(u16_t _ttl_proto); + /* checksum */ + PACK_STRUCT_FIELD(u16_t _chksum); + /* source and destination IP addresses */ + PACK_STRUCT_FIELD(struct ip_addr src); + PACK_STRUCT_FIELD(struct ip_addr dest); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define IPH_V(hdr) (ntohs((hdr)->_v_hl_tos) >> 12) +#define IPH_HL(hdr) ((ntohs((hdr)->_v_hl_tos) >> 8) & 0x0f) +#define IPH_TOS(hdr) (ntohs((hdr)->_v_hl_tos) & 0xff) +#define IPH_LEN(hdr) ((hdr)->_len) +#define IPH_ID(hdr) ((hdr)->_id) +#define IPH_OFFSET(hdr) ((hdr)->_offset) +#define IPH_TTL(hdr) (ntohs((hdr)->_ttl_proto) >> 8) +#define IPH_PROTO(hdr) (ntohs((hdr)->_ttl_proto) & 0xff) +#define IPH_CHKSUM(hdr) ((hdr)->_chksum) + +#define IPH_VHLTOS_SET(hdr, v, hl, tos) (hdr)->_v_hl_tos = (htons(((v) << 12) | ((hl) << 8) | (tos))) +#define IPH_LEN_SET(hdr, len) (hdr)->_len = (len) +#define IPH_ID_SET(hdr, id) (hdr)->_id = (id) +#define IPH_OFFSET_SET(hdr, off) (hdr)->_offset = (off) +#define IPH_TTL_SET(hdr, ttl) (hdr)->_ttl_proto = (htons(IPH_PROTO(hdr) | ((u16_t)(ttl) << 8))) +#define IPH_PROTO_SET(hdr, proto) (hdr)->_ttl_proto = (htons((proto) | (IPH_TTL(hdr) << 8))) +#define IPH_CHKSUM_SET(hdr, chksum) (hdr)->_chksum = (chksum) + +/** The interface that provided the packet for the current callback invocation. */ +extern struct netif *current_netif; +/** Header of the input packet currently being processed. */ +extern const struct ip_hdr *current_header; + +#define ip_init() /* Compatibility define, not init needed. */ +struct netif *ip_route(struct ip_addr *dest); +err_t ip_input(struct pbuf *p, struct netif *inp); +err_t ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto); +err_t ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, + struct netif *netif); +#if LWIP_NETIF_HWADDRHINT +err_t ip_output_hinted(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, u8_t *addr_hint); +#endif /* LWIP_NETIF_HWADDRHINT */ +#if IP_OPTIONS_SEND +err_t ip_output_if_opt(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options, + u16_t optlen); +#endif /* IP_OPTIONS_SEND */ +/** Get the interface that received the current packet. + * This function must only be called from a receive callback (udp_recv, + * raw_recv, tcp_accept). It will return NULL otherwise. */ +#define ip_current_netif() (current_netif) +/** Get the IP header of the current packet. + * This function must only be called from a receive callback (udp_recv, + * raw_recv, tcp_accept). It will return NULL otherwise. */ +#define ip_current_header() (current_header) +#if IP_DEBUG +void ip_debug_print(struct pbuf *p); +#else +#define ip_debug_print(p) +#endif /* IP_DEBUG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_H__ */ + + diff --git a/bertos/net/lwip/src/include/ipv4/lwip/ip_addr.h b/bertos/net/lwip/src/include/ipv4/lwip/ip_addr.h new file mode 100644 index 0000000..298e657 --- /dev/null +++ b/bertos/net/lwip/src/include/ipv4/lwip/ip_addr.h @@ -0,0 +1,173 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_IP_ADDR_H__ +#define __LWIP_IP_ADDR_H__ + +#include "lwip/opt.h" + +#include "lwip/inet.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_addr { + PACK_STRUCT_FIELD(u32_t addr); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/* + * struct ipaddr2 is used in the definition of the ARP packet format in + * order to support compilers that don't have structure packing. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_addr2 { + PACK_STRUCT_FIELD(u16_t addrw[2]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +struct netif; + +extern const struct ip_addr ip_addr_any; +extern const struct ip_addr ip_addr_broadcast; + +/** IP_ADDR_ can be used as a fixed IP address + * for the wildcard and the broadcast address + */ +#define IP_ADDR_ANY ((struct ip_addr *)&ip_addr_any) +#define IP_ADDR_BROADCAST ((struct ip_addr *)&ip_addr_broadcast) + +/* Definitions of the bits in an Internet address integer. + + On subnets, host and network parts are found according to + the subnet mask, not these masks. */ + +#define IN_CLASSA(a) ((((u32_t)(a)) & 0x80000000UL) == 0) +#define IN_CLASSA_NET 0xff000000 +#define IN_CLASSA_NSHIFT 24 +#define IN_CLASSA_HOST (0xffffffff & ~IN_CLASSA_NET) +#define IN_CLASSA_MAX 128 + +#define IN_CLASSB(a) ((((u32_t)(a)) & 0xc0000000UL) == 0x80000000UL) +#define IN_CLASSB_NET 0xffff0000 +#define IN_CLASSB_NSHIFT 16 +#define IN_CLASSB_HOST (0xffffffff & ~IN_CLASSB_NET) +#define IN_CLASSB_MAX 65536 + +#define IN_CLASSC(a) ((((u32_t)(a)) & 0xe0000000UL) == 0xc0000000UL) +#define IN_CLASSC_NET 0xffffff00 +#define IN_CLASSC_NSHIFT 8 +#define IN_CLASSC_HOST (0xffffffff & ~IN_CLASSC_NET) + +#define IN_CLASSD(a) (((u32_t)(a) & 0xf0000000UL) == 0xe0000000UL) +#define IN_CLASSD_NET 0xf0000000 /* These ones aren't really */ +#define IN_CLASSD_NSHIFT 28 /* net and host fields, but */ +#define IN_CLASSD_HOST 0x0fffffff /* routing needn't know. */ +#define IN_MULTICAST(a) IN_CLASSD(a) + +#define IN_EXPERIMENTAL(a) (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL) +#define IN_BADCLASS(a) (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL) + +#define IN_LOOPBACKNET 127 /* official! */ + +#define IP4_ADDR(ipaddr, a,b,c,d) \ + (ipaddr)->addr = htonl(((u32_t)((a) & 0xff) << 24) | \ + ((u32_t)((b) & 0xff) << 16) | \ + ((u32_t)((c) & 0xff) << 8) | \ + (u32_t)((d) & 0xff)) + +#define ip_addr_set(dest, src) (dest)->addr = \ + ((src) == NULL? 0:\ + (src)->addr) +/** + * Determine if two address are on the same network. + * + * @arg addr1 IP address 1 + * @arg addr2 IP address 2 + * @arg mask network identifier mask + * @return !0 if the network identifiers of both address match + */ +#define ip_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \ + (mask)->addr) == \ + ((addr2)->addr & \ + (mask)->addr)) +#define ip_addr_cmp(addr1, addr2) ((addr1)->addr == (addr2)->addr) + +#define ip_addr_isany(addr1) ((addr1) == NULL || (addr1)->addr == 0) + +u8_t ip_addr_isbroadcast(struct ip_addr *, struct netif *); + +#define ip_addr_ismulticast(addr1) (((addr1)->addr & ntohl(0xf0000000UL)) == ntohl(0xe0000000UL)) + +#define ip_addr_islinklocal(addr1) (((addr1)->addr & ntohl(0xffff0000UL)) == ntohl(0xa9fe0000UL)) + +#define ip_addr_debug_print(debug, ipaddr) \ + LWIP_DEBUGF(debug, ("%"U16_F".%"U16_F".%"U16_F".%"U16_F, \ + ipaddr != NULL ? \ + (u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff : 0, \ + ipaddr != NULL ? \ + (u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff : 0, \ + ipaddr != NULL ? \ + (u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff : 0, \ + ipaddr != NULL ? \ + (u16_t)ntohl((ipaddr)->addr) & 0xff : 0)) + +/* These are cast to u16_t, with the intent that they are often arguments + * to printf using the U16_F format from cc.h. */ +#define ip4_addr1(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff) +#define ip4_addr2(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff) +#define ip4_addr3(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff) +#define ip4_addr4(ipaddr) ((u16_t)(ntohl((ipaddr)->addr)) & 0xff) + +/** + * Same as inet_ntoa() but takes a struct ip_addr* + */ +#define ip_ntoa(addr) ((addr != NULL) ? inet_ntoa(*((struct in_addr*)(addr))) : "NULL") + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_ADDR_H__ */ diff --git a/bertos/net/lwip/src/include/ipv4/lwip/ip_frag.h b/bertos/net/lwip/src/include/ipv4/lwip/ip_frag.h new file mode 100644 index 0000000..380e604 --- /dev/null +++ b/bertos/net/lwip/src/include/ipv4/lwip/ip_frag.h @@ -0,0 +1,76 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Jani Monoses + * + */ + +#ifndef __LWIP_IP_FRAG_H__ +#define __LWIP_IP_FRAG_H__ + +#include "lwip/opt.h" +#include "lwip/err.h" +#include "lwip/pbuf.h" +#include "lwip/netif.h" +#include "lwip/ip_addr.h" +#include "lwip/ip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if IP_REASSEMBLY +/* The IP reassembly timer interval in milliseconds. */ +#define IP_TMR_INTERVAL 1000 + +/* IP reassembly helper struct. + * This is exported because memp needs to know the size. + */ +struct ip_reassdata { + struct ip_reassdata *next; + struct pbuf *p; + struct ip_hdr iphdr; + u16_t datagram_len; + u8_t flags; + u8_t timer; +}; + +void ip_reass_init(void); +void ip_reass_tmr(void); +struct pbuf * ip_reass(struct pbuf *p); +#endif /* IP_REASSEMBLY */ + +#if IP_FRAG +err_t ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest); +#endif /* IP_FRAG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_FRAG_H__ */ diff --git a/bertos/net/lwip/src/include/ipv6/lwip/icmp.h b/bertos/net/lwip/src/include/ipv6/lwip/icmp.h new file mode 100644 index 0000000..87e9ffd --- /dev/null +++ b/bertos/net/lwip/src/include/ipv6/lwip/icmp.h @@ -0,0 +1,100 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ICMP_H__ +#define __LWIP_ICMP_H__ + +#include "lwip/opt.h" + +#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define ICMP6_DUR 1 +#define ICMP6_TE 3 +#define ICMP6_ECHO 128 /* echo */ +#define ICMP6_ER 129 /* echo reply */ + + +enum icmp_dur_type { + ICMP_DUR_NET = 0, /* net unreachable */ + ICMP_DUR_HOST = 1, /* host unreachable */ + ICMP_DUR_PROTO = 2, /* protocol unreachable */ + ICMP_DUR_PORT = 3, /* port unreachable */ + ICMP_DUR_FRAG = 4, /* fragmentation needed and DF set */ + ICMP_DUR_SR = 5 /* source route failed */ +}; + +enum icmp_te_type { + ICMP_TE_TTL = 0, /* time to live exceeded in transit */ + ICMP_TE_FRAG = 1 /* fragment reassembly time exceeded */ +}; + +void icmp_input(struct pbuf *p, struct netif *inp); + +void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t); +void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t); + +struct icmp_echo_hdr { + u8_t type; + u8_t icode; + u16_t chksum; + u16_t id; + u16_t seqno; +}; + +struct icmp_dur_hdr { + u8_t type; + u8_t icode; + u16_t chksum; + u32_t unused; +}; + +struct icmp_te_hdr { + u8_t type; + u8_t icode; + u16_t chksum; + u32_t unused; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_ICMP */ + +#endif /* __LWIP_ICMP_H__ */ + diff --git a/bertos/net/lwip/src/include/ipv6/lwip/inet.h b/bertos/net/lwip/src/include/ipv6/lwip/inet.h new file mode 100644 index 0000000..de1a0b6 --- /dev/null +++ b/bertos/net/lwip/src/include/ipv6/lwip/inet.h @@ -0,0 +1,68 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INET_H__ +#define __LWIP_INET_H__ + +#include "lwip/opt.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +u16_t inet_chksum(void *data, u16_t len); +u16_t inet_chksum_pbuf(struct pbuf *p); +u16_t inet_chksum_pseudo(struct pbuf *p, + struct ip_addr *src, struct ip_addr *dest, + u8_t proto, u32_t proto_len); + +u32_t inet_addr(const char *cp); +s8_t inet_aton(const char *cp, struct in_addr *addr); + +#ifndef _MACHINE_ENDIAN_H_ +#ifndef _NETINET_IN_H +#ifndef _LINUX_BYTEORDER_GENERIC_H +u16_t htons(u16_t n); +u16_t ntohs(u16_t n); +u32_t htonl(u32_t n); +u32_t ntohl(u32_t n); +#endif /* _LINUX_BYTEORDER_GENERIC_H */ +#endif /* _NETINET_IN_H */ +#endif /* _MACHINE_ENDIAN_H_ */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INET_H__ */ + diff --git a/bertos/net/lwip/src/include/ipv6/lwip/ip.h b/bertos/net/lwip/src/include/ipv6/lwip/ip.h new file mode 100644 index 0000000..a01cfc6 --- /dev/null +++ b/bertos/net/lwip/src/include/ipv6/lwip/ip.h @@ -0,0 +1,130 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_IP_H__ +#define __LWIP_IP_H__ + +#include "lwip/opt.h" +#include "lwip/def.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" + +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define IP_HLEN 40 + +#define IP_PROTO_ICMP 58 +#define IP_PROTO_UDP 17 +#define IP_PROTO_UDPLITE 136 +#define IP_PROTO_TCP 6 + +/* This is passed as the destination address to ip_output_if (not + to ip_output), meaning that an IP header already is constructed + in the pbuf. This is used when TCP retransmits. */ +#ifdef IP_HDRINCL +#undef IP_HDRINCL +#endif /* IP_HDRINCL */ +#define IP_HDRINCL NULL + +#if LWIP_NETIF_HWADDRHINT +#define IP_PCB_ADDRHINT ;u8_t addr_hint +#else +#define IP_PCB_ADDRHINT +#endif /* LWIP_NETIF_HWADDRHINT */ + +/* This is the common part of all PCB types. It needs to be at the + beginning of a PCB type definition. It is located here so that + changes to this common part are made in one location instead of + having to change all PCB structs. */ +#define IP_PCB struct ip_addr local_ip; \ + struct ip_addr remote_ip; \ + /* Socket options */ \ + u16_t so_options; \ + /* Type Of Service */ \ + u8_t tos; \ + /* Time To Live */ \ + u8_t ttl; \ + /* link layer address resolution hint */ \ + IP_PCB_ADDRHINT + + +/* The IPv6 header. */ +struct ip_hdr { +#if BYTE_ORDER == LITTLE_ENDIAN + u8_t tclass1:4, v:4; + u8_t flow1:4, tclass2:4; +#else + u8_t v:4, tclass1:4; + u8_t tclass2:8, flow1:4; +#endif + u16_t flow2; + u16_t len; /* payload length */ + u8_t nexthdr; /* next header */ + u8_t hoplim; /* hop limit (TTL) */ + struct ip_addr src, dest; /* source and destination IP addresses */ +}; + +#define IPH_PROTO(hdr) (iphdr->nexthdr) + +void ip_init(void); + +#include "lwip/netif.h" + +struct netif *ip_route(struct ip_addr *dest); + +void ip_input(struct pbuf *p, struct netif *inp); + +/* source and destination addresses in network byte order, please */ +err_t ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t proto); + +err_t ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, + u8_t ttl, u8_t proto, + struct netif *netif); + +#define ip_current_netif() NULL +#define ip_current_header() NULL + +#if IP_DEBUG +void ip_debug_print(struct pbuf *p); +#endif /* IP_DEBUG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_H__ */ + + diff --git a/bertos/net/lwip/src/include/ipv6/lwip/ip_addr.h b/bertos/net/lwip/src/include/ipv6/lwip/ip_addr.h new file mode 100644 index 0000000..b2d8ae5 --- /dev/null +++ b/bertos/net/lwip/src/include/ipv6/lwip/ip_addr.h @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_IP_ADDR_H__ +#define __LWIP_IP_ADDR_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define IP_ADDR_ANY 0 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN + struct ip_addr { + PACK_STRUCT_FIELD(u32_t addr[4]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/* + * struct ipaddr2 is used in the definition of the ARP packet format in + * order to support compilers that don't have structure packing. + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct ip_addr2 { + PACK_STRUCT_FIELD(u16_t addrw[2]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define IP6_ADDR(ipaddr, a,b,c,d,e,f,g,h) do { (ipaddr)->addr[0] = htonl((u32_t)((a & 0xffff) << 16) | (b & 0xffff)); \ + (ipaddr)->addr[1] = htonl(((c & 0xffff) << 16) | (d & 0xffff)); \ + (ipaddr)->addr[2] = htonl(((e & 0xffff) << 16) | (f & 0xffff)); \ + (ipaddr)->addr[3] = htonl(((g & 0xffff) << 16) | (h & 0xffff)); } while(0) + +u8_t ip_addr_netcmp(struct ip_addr *addr1, struct ip_addr *addr2, + struct ip_addr *mask); +u8_t ip_addr_cmp(struct ip_addr *addr1, struct ip_addr *addr2); +void ip_addr_set(struct ip_addr *dest, struct ip_addr *src); +u8_t ip_addr_isany(struct ip_addr *addr); + +#define ip_addr_debug_print(debug, ipaddr) \ + LWIP_DEBUGF(debug, ("%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F":%"X32_F"\n", \ + (ntohl(ipaddr->addr[0]) >> 16) & 0xffff, \ + ntohl(ipaddr->addr[0]) & 0xffff, \ + (ntohl(ipaddr->addr[1]) >> 16) & 0xffff, \ + ntohl(ipaddr->addr[1]) & 0xffff, \ + (ntohl(ipaddr->addr[2]) >> 16) & 0xffff, \ + ntohl(ipaddr->addr[2]) & 0xffff, \ + (ntohl(ipaddr->addr[3]) >> 16) & 0xffff, \ + ntohl(ipaddr->addr[3]) & 0xffff)); + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_IP_ADDR_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/api.h b/bertos/net/lwip/src/include/lwip/api.h new file mode 100644 index 0000000..f6b1f74 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/api.h @@ -0,0 +1,222 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_API_H__ +#define __LWIP_API_H__ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include /* for size_t */ + +#include "lwip/netbuf.h" +#include "lwip/sys.h" +#include "lwip/ip_addr.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Throughout this file, IP addresses and port numbers are expected to be in + * the same byte order as in the corresponding pcb. + */ + +/* Flags for netconn_write */ +#define NETCONN_NOFLAG 0x00 +#define NETCONN_NOCOPY 0x00 /* Only for source code compatibility */ +#define NETCONN_COPY 0x01 +#define NETCONN_MORE 0x02 + +/* Helpers to process several netconn_types by the same code */ +#define NETCONNTYPE_GROUP(t) (t&0xF0) +#define NETCONNTYPE_DATAGRAM(t) (t&0xE0) + +enum netconn_type { + NETCONN_INVALID = 0, + /* NETCONN_TCP Group */ + NETCONN_TCP = 0x10, + /* NETCONN_UDP Group */ + NETCONN_UDP = 0x20, + NETCONN_UDPLITE = 0x21, + NETCONN_UDPNOCHKSUM= 0x22, + /* NETCONN_RAW Group */ + NETCONN_RAW = 0x40 +}; + +enum netconn_state { + NETCONN_NONE, + NETCONN_WRITE, + NETCONN_LISTEN, + NETCONN_CONNECT, + NETCONN_CLOSE +}; + +enum netconn_evt { + NETCONN_EVT_RCVPLUS, + NETCONN_EVT_RCVMINUS, + NETCONN_EVT_SENDPLUS, + NETCONN_EVT_SENDMINUS +}; + +#if LWIP_IGMP +enum netconn_igmp { + NETCONN_JOIN, + NETCONN_LEAVE +}; +#endif /* LWIP_IGMP */ + +/* forward-declare some structs to avoid to include their headers */ +struct ip_pcb; +struct tcp_pcb; +struct udp_pcb; +struct raw_pcb; +struct netconn; + +/** A callback prototype to inform about events for a netconn */ +typedef void (* netconn_callback)(struct netconn *, enum netconn_evt, u16_t len); + +/** A netconn descriptor */ +struct netconn { + /** type of the netconn (TCP, UDP or RAW) */ + enum netconn_type type; + /** current state of the netconn */ + enum netconn_state state; + /** the lwIP internal protocol control block */ + union { + struct ip_pcb *ip; + struct tcp_pcb *tcp; + struct udp_pcb *udp; + struct raw_pcb *raw; + } pcb; + /** the last error this netconn had */ + err_t err; + /** sem that is used to synchroneously execute functions in the core context */ + sys_sem_t op_completed; + /** mbox where received packets are stored until they are fetched + by the netconn application thread (can grow quite big) */ + sys_mbox_t recvmbox; + /** mbox where new connections are stored until processed + by the application thread */ + sys_mbox_t acceptmbox; + /** only used for socket layer */ + int socket; +#if LWIP_SO_RCVTIMEO + /** timeout to wait for new data to be received + (or connections to arrive for listening netconns) */ + int recv_timeout; +#endif /* LWIP_SO_RCVTIMEO */ +#if LWIP_SO_RCVBUF + /** maximum amount of bytes queued in recvmbox */ + int recv_bufsize; +#endif /* LWIP_SO_RCVBUF */ + s16_t recv_avail; +#if LWIP_TCP + /** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores the message. */ + struct api_msg_msg *write_msg; + /** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores how much is already sent. */ + size_t write_offset; +#if LWIP_TCPIP_CORE_LOCKING + /** TCP: when data passed to netconn_write doesn't fit into the send buffer, + this temporarily stores whether to wake up the original application task + if data couldn't be sent in the first try. */ + u8_t write_delayed; +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_TCP */ + /** A callback function that is informed about events for this netconn */ + netconn_callback callback; +}; + +/* Register an Network connection event */ +#define API_EVENT(c,e,l) if (c->callback) { \ + (*c->callback)(c, e, l); \ + } + +/* Network connection functions: */ +#define netconn_new(t) netconn_new_with_proto_and_callback(t, 0, NULL) +#define netconn_new_with_callback(t, c) netconn_new_with_proto_and_callback(t, 0, c) +struct +netconn *netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto, + netconn_callback callback); +err_t netconn_delete (struct netconn *conn); +/** Get the type of a netconn (as enum netconn_type). */ +#define netconn_type(conn) (conn->type) + +err_t netconn_getaddr (struct netconn *conn, + struct ip_addr *addr, + u16_t *port, + u8_t local); +#define netconn_peer(c,i,p) netconn_getaddr(c,i,p,0) +#define netconn_addr(c,i,p) netconn_getaddr(c,i,p,1) + +err_t netconn_bind (struct netconn *conn, + struct ip_addr *addr, + u16_t port); +err_t netconn_connect (struct netconn *conn, + struct ip_addr *addr, + u16_t port); +err_t netconn_disconnect (struct netconn *conn); +err_t netconn_listen_with_backlog(struct netconn *conn, u8_t backlog); +#define netconn_listen(conn) netconn_listen_with_backlog(conn, TCP_DEFAULT_LISTEN_BACKLOG) +struct netconn * netconn_accept (struct netconn *conn); +struct netbuf * netconn_recv (struct netconn *conn); +err_t netconn_sendto (struct netconn *conn, + struct netbuf *buf, struct ip_addr *addr, u16_t port); +err_t netconn_send (struct netconn *conn, + struct netbuf *buf); +err_t netconn_write (struct netconn *conn, + const void *dataptr, size_t size, + u8_t apiflags); +err_t netconn_close (struct netconn *conn); + +#if LWIP_IGMP +err_t netconn_join_leave_group (struct netconn *conn, + struct ip_addr *multiaddr, + struct ip_addr *interface, + enum netconn_igmp join_or_leave); +#endif /* LWIP_IGMP */ +#if LWIP_DNS +err_t netconn_gethostbyname(const char *name, struct ip_addr *addr); +#endif /* LWIP_DNS */ + +#define netconn_err(conn) ((conn)->err) +#define netconn_recv_bufsize(conn) ((conn)->recv_bufsize) + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_NETCONN */ + +#endif /* __LWIP_API_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/api_msg.h b/bertos/net/lwip/src/include/lwip/api_msg.h new file mode 100644 index 0000000..d3b0456 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/api_msg.h @@ -0,0 +1,162 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_API_MSG_H__ +#define __LWIP_API_MSG_H__ + +#include "lwip/opt.h" + +#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */ + +#include /* for size_t */ + +#include "lwip/ip_addr.h" +#include "lwip/err.h" +#include "lwip/sys.h" +#include "lwip/igmp.h" +#include "lwip/api.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* IP addresses and port numbers are expected to be in + * the same byte order as in the corresponding pcb. + */ +/** This struct includes everything that is necessary to execute a function + for a netconn in another thread context (mainly used to process netconns + in the tcpip_thread context to be thread safe). */ +struct api_msg_msg { + /** The netconn which to process - always needed: it includes the semaphore + which is used to block the application thread until the function finished. */ + struct netconn *conn; + /** Depending on the executed function, one of these union members is used */ + union { + /** used for do_send */ + struct netbuf *b; + /** used for do_newconn */ + struct { + u8_t proto; + } n; + /** used for do_bind and do_connect */ + struct { + struct ip_addr *ipaddr; + u16_t port; + } bc; + /** used for do_getaddr */ + struct { + struct ip_addr *ipaddr; + u16_t *port; + u8_t local; + } ad; + /** used for do_write */ + struct { + const void *dataptr; + size_t len; + u8_t apiflags; + } w; + /** used for do_recv */ + struct { + u16_t len; + } r; +#if LWIP_IGMP + /** used for do_join_leave_group */ + struct { + struct ip_addr *multiaddr; + struct ip_addr *interface; + enum netconn_igmp join_or_leave; + } jl; +#endif /* LWIP_IGMP */ +#if TCP_LISTEN_BACKLOG + struct { + u8_t backlog; + } lb; +#endif /* TCP_LISTEN_BACKLOG */ + } msg; +}; + +/** This struct contains a function to execute in another thread context and + a struct api_msg_msg that serves as an argument for this function. + This is passed to tcpip_apimsg to execute functions in tcpip_thread context. */ +struct api_msg { + /** function to execute in tcpip_thread context */ + void (* function)(struct api_msg_msg *msg); + /** arguments for this function */ + struct api_msg_msg msg; +}; + +#if LWIP_DNS +/** As do_gethostbyname requires more arguments but doesn't require a netconn, + it has its own struct (to avoid struct api_msg getting bigger than necessary). + do_gethostbyname must be called using tcpip_callback instead of tcpip_apimsg + (see netconn_gethostbyname). */ +struct dns_api_msg { + /** Hostname to query or dotted IP address string */ + const char *name; + /** Rhe resolved address is stored here */ + struct ip_addr *addr; + /** This semaphore is posted when the name is resolved, the application thread + should wait on it. */ + sys_sem_t sem; + /** Errors are given back here */ + err_t *err; +}; +#endif /* LWIP_DNS */ + +void do_newconn ( struct api_msg_msg *msg); +void do_delconn ( struct api_msg_msg *msg); +void do_bind ( struct api_msg_msg *msg); +void do_connect ( struct api_msg_msg *msg); +void do_disconnect ( struct api_msg_msg *msg); +void do_listen ( struct api_msg_msg *msg); +void do_send ( struct api_msg_msg *msg); +void do_recv ( struct api_msg_msg *msg); +void do_write ( struct api_msg_msg *msg); +void do_getaddr ( struct api_msg_msg *msg); +void do_close ( struct api_msg_msg *msg); +#if LWIP_IGMP +void do_join_leave_group( struct api_msg_msg *msg); +#endif /* LWIP_IGMP */ + +#if LWIP_DNS +void do_gethostbyname(void *arg); +#endif /* LWIP_DNS */ + +struct netconn* netconn_alloc(enum netconn_type t, netconn_callback callback); +void netconn_free(struct netconn *conn); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_NETCONN */ + +#endif /* __LWIP_API_MSG_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/arch.h b/bertos/net/lwip/src/include/lwip/arch.h new file mode 100644 index 0000000..3a5a0e4 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/arch.h @@ -0,0 +1,233 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ARCH_H__ +#define __LWIP_ARCH_H__ + +#ifndef LITTLE_ENDIAN +#define LITTLE_ENDIAN 1234 +#endif + +#ifndef BIG_ENDIAN +#define BIG_ENDIAN 4321 +#endif + +#include "arch/cc.h" + +/** Temporary: define format string for size_t if not defined in cc.h */ +#ifndef SZT_F +#define SZT_F U32_F +#endif /* SZT_F */ + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef PACK_STRUCT_BEGIN +#define PACK_STRUCT_BEGIN +#endif /* PACK_STRUCT_BEGIN */ + +#ifndef PACK_STRUCT_END +#define PACK_STRUCT_END +#endif /* PACK_STRUCT_END */ + +#ifndef PACK_STRUCT_FIELD +#define PACK_STRUCT_FIELD(x) x +#endif /* PACK_STRUCT_FIELD */ + + +#ifndef LWIP_UNUSED_ARG +#define LWIP_UNUSED_ARG(x) (void)x +#endif /* LWIP_UNUSED_ARG */ + + +#ifdef LWIP_PROVIDE_ERRNO + +#define EPERM 1 /* Operation not permitted */ +#define ENOENT 2 /* No such file or directory */ +#define ESRCH 3 /* No such process */ +#define EINTR 4 /* Interrupted system call */ +#define EIO 5 /* I/O error */ +#define ENXIO 6 /* No such device or address */ +#define E2BIG 7 /* Arg list too long */ +#define ENOEXEC 8 /* Exec format error */ +#define EBADF 9 /* Bad file number */ +#define ECHILD 10 /* No child processes */ +#define EAGAIN 11 /* Try again */ +#define ENOMEM 12 /* Out of memory */ +#define EACCES 13 /* Permission denied */ +#define EFAULT 14 /* Bad address */ +#define ENOTBLK 15 /* Block device required */ +#define EBUSY 16 /* Device or resource busy */ +#define EEXIST 17 /* File exists */ +#define EXDEV 18 /* Cross-device link */ +#define ENODEV 19 /* No such device */ +#define ENOTDIR 20 /* Not a directory */ +#define EISDIR 21 /* Is a directory */ +#define EINVAL 22 /* Invalid argument */ +#define ENFILE 23 /* File table overflow */ +#define EMFILE 24 /* Too many open files */ +#define ENOTTY 25 /* Not a typewriter */ +#define ETXTBSY 26 /* Text file busy */ +#define EFBIG 27 /* File too large */ +#define ENOSPC 28 /* No space left on device */ +#define ESPIPE 29 /* Illegal seek */ +#define EROFS 30 /* Read-only file system */ +#define EMLINK 31 /* Too many links */ +#define EPIPE 32 /* Broken pipe */ +#define EDOM 33 /* Math argument out of domain of func */ +#define ERANGE 34 /* Math result not representable */ +#define EDEADLK 35 /* Resource deadlock would occur */ +#define ENAMETOOLONG 36 /* File name too long */ +#define ENOLCK 37 /* No record locks available */ +#define ENOSYS 38 /* Function not implemented */ +#define ENOTEMPTY 39 /* Directory not empty */ +#define ELOOP 40 /* Too many symbolic links encountered */ +#define EWOULDBLOCK EAGAIN /* Operation would block */ +#define ENOMSG 42 /* No message of desired type */ +#define EIDRM 43 /* Identifier removed */ +#define ECHRNG 44 /* Channel number out of range */ +#define EL2NSYNC 45 /* Level 2 not synchronized */ +#define EL3HLT 46 /* Level 3 halted */ +#define EL3RST 47 /* Level 3 reset */ +#define ELNRNG 48 /* Link number out of range */ +#define EUNATCH 49 /* Protocol driver not attached */ +#define ENOCSI 50 /* No CSI structure available */ +#define EL2HLT 51 /* Level 2 halted */ +#define EBADE 52 /* Invalid exchange */ +#define EBADR 53 /* Invalid request descriptor */ +#define EXFULL 54 /* Exchange full */ +#define ENOANO 55 /* No anode */ +#define EBADRQC 56 /* Invalid request code */ +#define EBADSLT 57 /* Invalid slot */ + +#define EDEADLOCK EDEADLK + +#define EBFONT 59 /* Bad font file format */ +#define ENOSTR 60 /* Device not a stream */ +#define ENODATA 61 /* No data available */ +#define ETIME 62 /* Timer expired */ +#define ENOSR 63 /* Out of streams resources */ +#define ENONET 64 /* Machine is not on the network */ +#define ENOPKG 65 /* Package not installed */ +#define EREMOTE 66 /* Object is remote */ +#define ENOLINK 67 /* Link has been severed */ +#define EADV 68 /* Advertise error */ +#define ESRMNT 69 /* Srmount error */ +#define ECOMM 70 /* Communication error on send */ +#define EPROTO 71 /* Protocol error */ +#define EMULTIHOP 72 /* Multihop attempted */ +#define EDOTDOT 73 /* RFS specific error */ +#define EBADMSG 74 /* Not a data message */ +#define EOVERFLOW 75 /* Value too large for defined data type */ +#define ENOTUNIQ 76 /* Name not unique on network */ +#define EBADFD 77 /* File descriptor in bad state */ +#define EREMCHG 78 /* Remote address changed */ +#define ELIBACC 79 /* Can not access a needed shared library */ +#define ELIBBAD 80 /* Accessing a corrupted shared library */ +#define ELIBSCN 81 /* .lib section in a.out corrupted */ +#define ELIBMAX 82 /* Attempting to link in too many shared libraries */ +#define ELIBEXEC 83 /* Cannot exec a shared library directly */ +#define EILSEQ 84 /* Illegal byte sequence */ +#define ERESTART 85 /* Interrupted system call should be restarted */ +#define ESTRPIPE 86 /* Streams pipe error */ +#define EUSERS 87 /* Too many users */ +#define ENOTSOCK 88 /* Socket operation on non-socket */ +#define EDESTADDRREQ 89 /* Destination address required */ +#define EMSGSIZE 90 /* Message too long */ +#define EPROTOTYPE 91 /* Protocol wrong type for socket */ +#define ENOPROTOOPT 92 /* Protocol not available */ +#define EPROTONOSUPPORT 93 /* Protocol not supported */ +#define ESOCKTNOSUPPORT 94 /* Socket type not supported */ +#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */ +#define EPFNOSUPPORT 96 /* Protocol family not supported */ +#define EAFNOSUPPORT 97 /* Address family not supported by protocol */ +#define EADDRINUSE 98 /* Address already in use */ +#define EADDRNOTAVAIL 99 /* Cannot assign requested address */ +#define ENETDOWN 100 /* Network is down */ +#define ENETUNREACH 101 /* Network is unreachable */ +#define ENETRESET 102 /* Network dropped connection because of reset */ +#define ECONNABORTED 103 /* Software caused connection abort */ +#define ECONNRESET 104 /* Connection reset by peer */ +#define ENOBUFS 105 /* No buffer space available */ +#define EISCONN 106 /* Transport endpoint is already connected */ +#define ENOTCONN 107 /* Transport endpoint is not connected */ +#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */ +#define ETOOMANYREFS 109 /* Too many references: cannot splice */ +#define ETIMEDOUT 110 /* Connection timed out */ +#define ECONNREFUSED 111 /* Connection refused */ +#define EHOSTDOWN 112 /* Host is down */ +#define EHOSTUNREACH 113 /* No route to host */ +#define EALREADY 114 /* Operation already in progress */ +#define EINPROGRESS 115 /* Operation now in progress */ +#define ESTALE 116 /* Stale NFS file handle */ +#define EUCLEAN 117 /* Structure needs cleaning */ +#define ENOTNAM 118 /* Not a XENIX named type file */ +#define ENAVAIL 119 /* No XENIX semaphores available */ +#define EISNAM 120 /* Is a named type file */ +#define EREMOTEIO 121 /* Remote I/O error */ +#define EDQUOT 122 /* Quota exceeded */ + +#define ENOMEDIUM 123 /* No medium found */ +#define EMEDIUMTYPE 124 /* Wrong medium type */ + + +#define ENSROK 0 /* DNS server returned answer with no data */ +#define ENSRNODATA 160 /* DNS server returned answer with no data */ +#define ENSRFORMERR 161 /* DNS server claims query was misformatted */ +#define ENSRSERVFAIL 162 /* DNS server returned general failure */ +#define ENSRNOTFOUND 163 /* Domain name not found */ +#define ENSRNOTIMP 164 /* DNS server does not implement requested operation */ +#define ENSRREFUSED 165 /* DNS server refused query */ +#define ENSRBADQUERY 166 /* Misformatted DNS query */ +#define ENSRBADNAME 167 /* Misformatted domain name */ +#define ENSRBADFAMILY 168 /* Unsupported address family */ +#define ENSRBADRESP 169 /* Misformatted DNS reply */ +#define ENSRCONNREFUSED 170 /* Could not contact DNS servers */ +#define ENSRTIMEOUT 171 /* Timeout while contacting DNS servers */ +#define ENSROF 172 /* End of file */ +#define ENSRFILE 173 /* Error reading file */ +#define ENSRNOMEM 174 /* Out of memory */ +#define ENSRDESTRUCTION 175 /* Application terminated lookup */ +#define ENSRQUERYDOMAINTOOLONG 176 /* Domain name is too long */ +#define ENSRCNAMELOOP 177 /* Domain name is too long */ + +#ifndef errno +extern int errno; +#endif + +#endif /* LWIP_PROVIDE_ERRNO */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_ARCH_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/debug.h b/bertos/net/lwip/src/include/lwip/debug.h new file mode 100644 index 0000000..d8359ea --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/debug.h @@ -0,0 +1,98 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_DEBUG_H__ +#define __LWIP_DEBUG_H__ + +#include "lwip/arch.h" + +/** lower two bits indicate debug level + * - 0 all + * - 1 warning + * - 2 serious + * - 3 severe + */ +#define LWIP_DBG_LEVEL_ALL 0x00 +#define LWIP_DBG_LEVEL_OFF LWIP_DBG_LEVEL_ALL /* compatibility define only */ +#define LWIP_DBG_LEVEL_WARNING 0x01 /* bad checksums, dropped packets, ... */ +#define LWIP_DBG_LEVEL_SERIOUS 0x02 /* memory allocation failures, ... */ +#define LWIP_DBG_LEVEL_SEVERE 0x03 +#define LWIP_DBG_MASK_LEVEL 0x03 + +/** flag for LWIP_DEBUGF to enable that debug message */ +#define LWIP_DBG_ON 0x80U +/** flag for LWIP_DEBUGF to disable that debug message */ +#define LWIP_DBG_OFF 0x00U + +/** flag for LWIP_DEBUGF indicating a tracing message (to follow program flow) */ +#define LWIP_DBG_TRACE 0x40U +/** flag for LWIP_DEBUGF indicating a state debug message (to follow module states) */ +#define LWIP_DBG_STATE 0x20U +/** flag for LWIP_DEBUGF indicating newly added code, not thoroughly tested yet */ +#define LWIP_DBG_FRESH 0x10U +/** flag for LWIP_DEBUGF to halt after printing this debug message */ +#define LWIP_DBG_HALT 0x08U + +#ifndef LWIP_NOASSERT +#define LWIP_ASSERT(message, assertion) do { if(!(assertion)) \ + LWIP_PLATFORM_ASSERT(message); } while(0) +#else /* LWIP_NOASSERT */ +#define LWIP_ASSERT(message, assertion) +#endif /* LWIP_NOASSERT */ + +/** if "expression" isn't true, then print "message" and execute "handler" expression */ +#ifndef LWIP_ERROR +#define LWIP_ERROR(message, expression, handler) do { if (!(expression)) { \ + LWIP_PLATFORM_ASSERT(message); handler;}} while(0) +#endif /* LWIP_ERROR */ + +#ifdef LWIP_DEBUG +/** print debug message only if debug message type is enabled... + * AND is of correct type AND is at least LWIP_DBG_LEVEL + */ +#define LWIP_DEBUGF(debug, message) do { \ + if ( \ + ((debug) & LWIP_DBG_ON) && \ + ((debug) & LWIP_DBG_TYPES_ON) && \ + ((s16_t)((debug) & LWIP_DBG_MASK_LEVEL) >= LWIP_DBG_MIN_LEVEL)) { \ + LWIP_PLATFORM_DIAG(message); \ + if ((debug) & LWIP_DBG_HALT) { \ + while(1); \ + } \ + } \ + } while(0) + +#else /* LWIP_DEBUG */ +#define LWIP_DEBUGF(debug, message) +#endif /* LWIP_DEBUG */ + +#endif /* __LWIP_DEBUG_H__ */ + diff --git a/bertos/net/lwip/src/include/lwip/def.h b/bertos/net/lwip/src/include/lwip/def.h new file mode 100644 index 0000000..d2ed251 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/def.h @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_DEF_H__ +#define __LWIP_DEF_H__ + +/* this might define NULL already */ +#include "lwip/arch.h" + +#define LWIP_MAX(x , y) (((x) > (y)) ? (x) : (y)) +#define LWIP_MIN(x , y) (((x) < (y)) ? (x) : (y)) + +#ifndef NULL +#define NULL ((void *)0) +#endif + + +#endif /* __LWIP_DEF_H__ */ + diff --git a/bertos/net/lwip/src/include/lwip/dhcp.h b/bertos/net/lwip/src/include/lwip/dhcp.h new file mode 100644 index 0000000..db37e88 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/dhcp.h @@ -0,0 +1,246 @@ +/** @file + */ + +#ifndef __LWIP_DHCP_H__ +#define __LWIP_DHCP_H__ + +#include "lwip/opt.h" + +#if LWIP_DHCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/netif.h" +#include "lwip/udp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** period (in seconds) of the application calling dhcp_coarse_tmr() */ +#define DHCP_COARSE_TIMER_SECS 60 +/** period (in milliseconds) of the application calling dhcp_coarse_tmr() */ +#define DHCP_COARSE_TIMER_MSECS (DHCP_COARSE_TIMER_SECS * 1000UL) +/** period (in milliseconds) of the application calling dhcp_fine_tmr() */ +#define DHCP_FINE_TIMER_MSECS 500 + +struct dhcp +{ + /** transaction identifier of last sent request */ + u32_t xid; + /** our connection to the DHCP server */ + struct udp_pcb *pcb; + /** incoming msg */ + struct dhcp_msg *msg_in; + /** incoming msg options */ + void *options_in; + /** ingoing msg options length */ + u16_t options_in_len; + /** current DHCP state machine state */ + u8_t state; + /** retries of current request */ + u8_t tries; + + struct pbuf *p_out; /* pbuf of outcoming msg */ + struct dhcp_msg *msg_out; /* outgoing msg */ + u16_t options_out_len; /* outgoing msg options length */ + u16_t request_timeout; /* #ticks with period DHCP_FINE_TIMER_SECS for request timeout */ + u16_t t1_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */ + u16_t t2_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */ + struct ip_addr server_ip_addr; /* dhcp server address that offered this lease */ + struct ip_addr offered_ip_addr; + struct ip_addr offered_sn_mask; + struct ip_addr offered_gw_addr; + struct ip_addr offered_bc_addr; +#define DHCP_MAX_DNS 2 + u32_t dns_count; /* actual number of DNS servers obtained */ + struct ip_addr offered_dns_addr[DHCP_MAX_DNS]; /* DNS server addresses */ + + u32_t offered_t0_lease; /* lease period (in seconds) */ + u32_t offered_t1_renew; /* recommended renew time (usually 50% of lease period) */ + u32_t offered_t2_rebind; /* recommended rebind time (usually 66% of lease period) */ +#if LWIP_DHCP_AUTOIP_COOP + u8_t autoip_coop_state; +#endif +/** Patch #1308 + * TODO: See dhcp.c "TODO"s + */ +#if 0 + struct ip_addr offered_si_addr; + u8_t *boot_file_name; +#endif +}; + +/* MUST be compiled with "pack structs" or equivalent! */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** minimum set of fields of any DHCP message */ +struct dhcp_msg +{ + PACK_STRUCT_FIELD(u8_t op); + PACK_STRUCT_FIELD(u8_t htype); + PACK_STRUCT_FIELD(u8_t hlen); + PACK_STRUCT_FIELD(u8_t hops); + PACK_STRUCT_FIELD(u32_t xid); + PACK_STRUCT_FIELD(u16_t secs); + PACK_STRUCT_FIELD(u16_t flags); + PACK_STRUCT_FIELD(struct ip_addr ciaddr); + PACK_STRUCT_FIELD(struct ip_addr yiaddr); + PACK_STRUCT_FIELD(struct ip_addr siaddr); + PACK_STRUCT_FIELD(struct ip_addr giaddr); +#define DHCP_CHADDR_LEN 16U + PACK_STRUCT_FIELD(u8_t chaddr[DHCP_CHADDR_LEN]); +#define DHCP_SNAME_LEN 64U + PACK_STRUCT_FIELD(u8_t sname[DHCP_SNAME_LEN]); +#define DHCP_FILE_LEN 128U + PACK_STRUCT_FIELD(u8_t file[DHCP_FILE_LEN]); + PACK_STRUCT_FIELD(u32_t cookie); +#define DHCP_MIN_OPTIONS_LEN 68U +/** make sure user does not configure this too small */ +#if ((defined(DHCP_OPTIONS_LEN)) && (DHCP_OPTIONS_LEN < DHCP_MIN_OPTIONS_LEN)) +# undef DHCP_OPTIONS_LEN +#endif +/** allow this to be configured in lwipopts.h, but not too small */ +#if (!defined(DHCP_OPTIONS_LEN)) +/** set this to be sufficient for your options in outgoing DHCP msgs */ +# define DHCP_OPTIONS_LEN DHCP_MIN_OPTIONS_LEN +#endif + PACK_STRUCT_FIELD(u8_t options[DHCP_OPTIONS_LEN]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +/** start DHCP configuration */ +err_t dhcp_start(struct netif *netif); +/** enforce early lease renewal (not needed normally)*/ +err_t dhcp_renew(struct netif *netif); +/** release the DHCP lease, usually called before dhcp_stop()*/ +err_t dhcp_release(struct netif *netif); +/** stop DHCP configuration */ +void dhcp_stop(struct netif *netif); +/** inform server of our manual IP address */ +void dhcp_inform(struct netif *netif); +/** Handle a possible change in the network configuration */ +void dhcp_network_changed(struct netif *netif); + +/** if enabled, check whether the offered IP address is not in use, using ARP */ +#if DHCP_DOES_ARP_CHECK +void dhcp_arp_reply(struct netif *netif, struct ip_addr *addr); +#endif + +/** to be called every minute */ +void dhcp_coarse_tmr(void); +/** to be called every half second */ +void dhcp_fine_tmr(void); + +/** DHCP message item offsets and length */ +#define DHCP_MSG_OFS (UDP_DATA_OFS) + #define DHCP_OP_OFS (DHCP_MSG_OFS + 0) + #define DHCP_HTYPE_OFS (DHCP_MSG_OFS + 1) + #define DHCP_HLEN_OFS (DHCP_MSG_OFS + 2) + #define DHCP_HOPS_OFS (DHCP_MSG_OFS + 3) + #define DHCP_XID_OFS (DHCP_MSG_OFS + 4) + #define DHCP_SECS_OFS (DHCP_MSG_OFS + 8) + #define DHCP_FLAGS_OFS (DHCP_MSG_OFS + 10) + #define DHCP_CIADDR_OFS (DHCP_MSG_OFS + 12) + #define DHCP_YIADDR_OFS (DHCP_MSG_OFS + 16) + #define DHCP_SIADDR_OFS (DHCP_MSG_OFS + 20) + #define DHCP_GIADDR_OFS (DHCP_MSG_OFS + 24) + #define DHCP_CHADDR_OFS (DHCP_MSG_OFS + 28) + #define DHCP_SNAME_OFS (DHCP_MSG_OFS + 44) + #define DHCP_FILE_OFS (DHCP_MSG_OFS + 108) +#define DHCP_MSG_LEN 236 + +#define DHCP_COOKIE_OFS (DHCP_MSG_OFS + DHCP_MSG_LEN) +#define DHCP_OPTIONS_OFS (DHCP_MSG_OFS + DHCP_MSG_LEN + 4) + +#define DHCP_CLIENT_PORT 68 +#define DHCP_SERVER_PORT 67 + +/** DHCP client states */ +#define DHCP_REQUESTING 1 +#define DHCP_INIT 2 +#define DHCP_REBOOTING 3 +#define DHCP_REBINDING 4 +#define DHCP_RENEWING 5 +#define DHCP_SELECTING 6 +#define DHCP_INFORMING 7 +#define DHCP_CHECKING 8 +#define DHCP_PERMANENT 9 +#define DHCP_BOUND 10 +/** not yet implemented #define DHCP_RELEASING 11 */ +#define DHCP_BACKING_OFF 12 +#define DHCP_OFF 13 + +/** AUTOIP cooperatation flags */ +#define DHCP_AUTOIP_COOP_STATE_OFF 0 +#define DHCP_AUTOIP_COOP_STATE_ON 1 + +#define DHCP_BOOTREQUEST 1 +#define DHCP_BOOTREPLY 2 + +#define DHCP_DISCOVER 1 +#define DHCP_OFFER 2 +#define DHCP_REQUEST 3 +#define DHCP_DECLINE 4 +#define DHCP_ACK 5 +#define DHCP_NAK 6 +#define DHCP_RELEASE 7 +#define DHCP_INFORM 8 + +#define DHCP_HTYPE_ETH 1 + +#define DHCP_HLEN_ETH 6 + +#define DHCP_BROADCAST_FLAG 15 +#define DHCP_BROADCAST_MASK (1 << DHCP_FLAG_BROADCAST) + +/** BootP options */ +#define DHCP_OPTION_PAD 0 +#define DHCP_OPTION_SUBNET_MASK 1 /* RFC 2132 3.3 */ +#define DHCP_OPTION_ROUTER 3 +#define DHCP_OPTION_DNS_SERVER 6 +#define DHCP_OPTION_HOSTNAME 12 +#define DHCP_OPTION_IP_TTL 23 +#define DHCP_OPTION_MTU 26 +#define DHCP_OPTION_BROADCAST 28 +#define DHCP_OPTION_TCP_TTL 37 +#define DHCP_OPTION_END 255 + +/** DHCP options */ +#define DHCP_OPTION_REQUESTED_IP 50 /* RFC 2132 9.1, requested IP address */ +#define DHCP_OPTION_LEASE_TIME 51 /* RFC 2132 9.2, time in seconds, in 4 bytes */ +#define DHCP_OPTION_OVERLOAD 52 /* RFC2132 9.3, use file and/or sname field for options */ + +#define DHCP_OPTION_MESSAGE_TYPE 53 /* RFC 2132 9.6, important for DHCP */ +#define DHCP_OPTION_MESSAGE_TYPE_LEN 1 + + +#define DHCP_OPTION_SERVER_ID 54 /* RFC 2132 9.7, server IP address */ +#define DHCP_OPTION_PARAMETER_REQUEST_LIST 55 /* RFC 2132 9.8, requested option types */ + +#define DHCP_OPTION_MAX_MSG_SIZE 57 /* RFC 2132 9.10, message size accepted >= 576 */ +#define DHCP_OPTION_MAX_MSG_SIZE_LEN 2 + +#define DHCP_OPTION_T1 58 /* T1 renewal time */ +#define DHCP_OPTION_T2 59 /* T2 rebinding time */ +#define DHCP_OPTION_US 60 +#define DHCP_OPTION_CLIENT_ID 61 +#define DHCP_OPTION_TFTP_SERVERNAME 66 +#define DHCP_OPTION_BOOTFILE 67 + +/** possible combinations of overloading the file and sname fields with options */ +#define DHCP_OVERLOAD_NONE 0 +#define DHCP_OVERLOAD_FILE 1 +#define DHCP_OVERLOAD_SNAME 2 +#define DHCP_OVERLOAD_SNAME_FILE 3 + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_DHCP */ + +#endif /*__LWIP_DHCP_H__*/ diff --git a/bertos/net/lwip/src/include/lwip/dns.h b/bertos/net/lwip/src/include/lwip/dns.h new file mode 100644 index 0000000..e5f4b7a --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/dns.h @@ -0,0 +1,97 @@ +/** + * lwip DNS resolver header file. + + * Author: Jim Pettinato + * April 2007 + + * ported from uIP resolv.c Copyright (c) 2002-2003, Adam Dunkels. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote + * products derived from this software without specific prior + * written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS + * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE + * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __LWIP_DNS_H__ +#define __LWIP_DNS_H__ + +#include "lwip/opt.h" + +#if LWIP_DNS /* don't build if not configured for use in lwipopts.h */ + +/** DNS timer period */ +#define DNS_TMR_INTERVAL 1000 + +/** DNS field TYPE used for "Resource Records" */ +#define DNS_RRTYPE_A 1 /* a host address */ +#define DNS_RRTYPE_NS 2 /* an authoritative name server */ +#define DNS_RRTYPE_MD 3 /* a mail destination (Obsolete - use MX) */ +#define DNS_RRTYPE_MF 4 /* a mail forwarder (Obsolete - use MX) */ +#define DNS_RRTYPE_CNAME 5 /* the canonical name for an alias */ +#define DNS_RRTYPE_SOA 6 /* marks the start of a zone of authority */ +#define DNS_RRTYPE_MB 7 /* a mailbox domain name (EXPERIMENTAL) */ +#define DNS_RRTYPE_MG 8 /* a mail group member (EXPERIMENTAL) */ +#define DNS_RRTYPE_MR 9 /* a mail rename domain name (EXPERIMENTAL) */ +#define DNS_RRTYPE_NULL 10 /* a null RR (EXPERIMENTAL) */ +#define DNS_RRTYPE_WKS 11 /* a well known service description */ +#define DNS_RRTYPE_PTR 12 /* a domain name pointer */ +#define DNS_RRTYPE_HINFO 13 /* host information */ +#define DNS_RRTYPE_MINFO 14 /* mailbox or mail list information */ +#define DNS_RRTYPE_MX 15 /* mail exchange */ +#define DNS_RRTYPE_TXT 16 /* text strings */ + +/** DNS field CLASS used for "Resource Records" */ +#define DNS_RRCLASS_IN 1 /* the Internet */ +#define DNS_RRCLASS_CS 2 /* the CSNET class (Obsolete - used only for examples in some obsolete RFCs) */ +#define DNS_RRCLASS_CH 3 /* the CHAOS class */ +#define DNS_RRCLASS_HS 4 /* Hesiod [Dyer 87] */ +#define DNS_RRCLASS_FLUSH 0x800 /* Flush bit */ + +/** Callback which is invoked when a hostname is found. + * A function of this type must be implemented by the application using the DNS resolver. + * @param name pointer to the name that was looked up. + * @param ipaddr pointer to a struct ip_addr containing the IP address of the hostname, + * or NULL if the name could not be found (or on any other error). + * @param callback_arg a user-specified callback argument passed to dns_gethostbyname +*/ +typedef void (*dns_found_callback)(const char *name, struct ip_addr *ipaddr, void *callback_arg); + + +void dns_init(void); + +void dns_tmr(void); + +void dns_setserver(u8_t numdns, struct ip_addr *dnsserver); + +struct ip_addr dns_getserver(u8_t numdns); + +err_t dns_gethostbyname(const char *hostname, struct ip_addr *addr, + dns_found_callback found, void *callback_arg); + +#if DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC +int dns_local_removehost(const char *hostname, const struct ip_addr *addr); +err_t dns_local_addhost(const char *hostname, const struct ip_addr *addr); +#endif /* DNS_LOCAL_HOSTLIST && DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +#endif /* LWIP_DNS */ + +#endif /* __LWIP_DNS_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/err.h b/bertos/net/lwip/src/include/lwip/err.h new file mode 100644 index 0000000..6967644 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/err.h @@ -0,0 +1,87 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_ERR_H__ +#define __LWIP_ERR_H__ + +#include "lwip/opt.h" +#include "lwip/arch.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** Define LWIP_ERR_T in cc.h if you want to use + * a different type for your platform (must be signed). */ +#ifdef LWIP_ERR_T +typedef LWIP_ERR_T err_t; +#else /* LWIP_ERR_T */ + typedef s8_t err_t; +#endif /* LWIP_ERR_T*/ + +/* Definitions for error constants. */ + +#define ERR_OK 0 /* No error, everything OK. */ +#define ERR_MEM -1 /* Out of memory error. */ +#define ERR_BUF -2 /* Buffer error. */ +#define ERR_TIMEOUT -3 /* Timeout. */ +#define ERR_RTE -4 /* Routing problem. */ + +#define ERR_IS_FATAL(e) ((e) < ERR_RTE) + +#define ERR_ABRT -5 /* Connection aborted. */ +#define ERR_RST -6 /* Connection reset. */ +#define ERR_CLSD -7 /* Connection closed. */ +#define ERR_CONN -8 /* Not connected. */ + +#define ERR_VAL -9 /* Illegal value. */ + +#define ERR_ARG -10 /* Illegal argument. */ + +#define ERR_USE -11 /* Address in use. */ + +#define ERR_IF -12 /* Low-level netif error */ +#define ERR_ISCONN -13 /* Already connected. */ + +#define ERR_INPROGRESS -14 /* Operation in progress */ + + +#ifdef LWIP_DEBUG +extern const char *lwip_strerr(err_t err); +#else +#define lwip_strerr(x) "" +#endif /* LWIP_DEBUG */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_ERR_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/init.h b/bertos/net/lwip/src/include/lwip/init.h new file mode 100644 index 0000000..c1455f5 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/init.h @@ -0,0 +1,72 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_INIT_H__ +#define __LWIP_INIT_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** X.x.x: Major version of the stack */ +#define LWIP_VERSION_MAJOR 1U +/** x.X.x: Minor version of the stack */ +#define LWIP_VERSION_MINOR 3U +/** x.x.X: Revision of the stack */ +#define LWIP_VERSION_REVISION 2U +/** For release candidates, this is set to 1..254 + * For official releases, this is set to 255 (LWIP_RC_RELEASE) + * For development versions (CVS), this is set to 0 (LWIP_RC_DEVELOPMENT) */ +#define LWIP_VERSION_RC 255U + +/** LWIP_VERSION_RC is set to LWIP_RC_RELEASE for official releases */ +#define LWIP_RC_RELEASE 255U +/** LWIP_VERSION_RC is set to LWIP_RC_DEVELOPMENT for CVS versions */ +#define LWIP_RC_DEVELOPMENT 0U + +#define LWIP_VERSION_IS_RELEASE (LWIP_VERSION_RC == LWIP_RC_RELEASE) +#define LWIP_VERSION_IS_DEVELOPMENT (LWIP_VERSION_RC == LWIP_RC_DEVELOPMENT) +#define LWIP_VERSION_IS_RC ((LWIP_VERSION_RC != LWIP_RC_RELEASE) && (LWIP_VERSION_RC != LWIP_RC_DEVELOPMENT)) + +/** Provides the version of the stack */ +#define LWIP_VERSION (LWIP_VERSION_MAJOR << 24 | LWIP_VERSION_MINOR << 16 | \ + LWIP_VERSION_REVISION << 8 | LWIP_VERSION_RC) + +/* Modules initialization */ +void lwip_init(void); + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_INIT_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/mem.h b/bertos/net/lwip/src/include/lwip/mem.h new file mode 100644 index 0000000..327c204 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/mem.h @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_MEM_H__ +#define __LWIP_MEM_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if MEM_LIBC_MALLOC + +#include /* for size_t */ + +typedef size_t mem_size_t; + +/* aliases for C library malloc() */ +#define mem_init() +/* in case C library malloc() needs extra protection, + * allow these defines to be overridden. + */ +#ifndef mem_free +#define mem_free free +#endif +#ifndef mem_malloc +#define mem_malloc malloc +#endif +#ifndef mem_calloc +#define mem_calloc calloc +#endif +#ifndef mem_realloc +static void *mem_realloc(void *mem, mem_size_t size) +{ + LWIP_UNUSED_ARG(size); + return mem; +} +#endif +#else /* MEM_LIBC_MALLOC */ + +/* MEM_SIZE would have to be aligned, but using 64000 here instead of + * 65535 leaves some room for alignment... + */ +#if MEM_SIZE > 64000l +typedef u32_t mem_size_t; +#else +typedef u16_t mem_size_t; +#endif /* MEM_SIZE > 64000 */ + +#if MEM_USE_POOLS +/** mem_init is not used when using pools instead of a heap */ +#define mem_init() +/** mem_realloc is not used when using pools instead of a heap: + we can't free part of a pool element and don't want to copy the rest */ +#define mem_realloc(mem, size) (mem) +#else /* MEM_USE_POOLS */ +/* lwIP alternative malloc */ +void mem_init(void); +void *mem_realloc(void *mem, mem_size_t size); +#endif /* MEM_USE_POOLS */ +void *mem_malloc(mem_size_t size); +void *mem_calloc(mem_size_t count, mem_size_t size); +void mem_free(void *mem); +#endif /* MEM_LIBC_MALLOC */ + +#ifndef LWIP_MEM_ALIGN_SIZE +#define LWIP_MEM_ALIGN_SIZE(size) (((size) + MEM_ALIGNMENT - 1) & ~(MEM_ALIGNMENT-1)) +#endif + +#ifndef LWIP_MEM_ALIGN +#define LWIP_MEM_ALIGN(addr) ((void *)(((mem_ptr_t)(addr) + MEM_ALIGNMENT - 1) & ~(mem_ptr_t)(MEM_ALIGNMENT-1))) +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_MEM_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/memp.h b/bertos/net/lwip/src/include/lwip/memp.h new file mode 100644 index 0000000..f0d0739 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/memp.h @@ -0,0 +1,116 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#ifndef __LWIP_MEMP_H__ +#define __LWIP_MEMP_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* Create the list of all memory pools managed by memp. MEMP_MAX represents a NULL pool at the end */ +typedef enum { +#define LWIP_MEMPOOL(name,num,size,desc) MEMP_##name, +#include "lwip/memp_std.h" + MEMP_MAX +} memp_t; + +#if MEM_USE_POOLS +/* Use a helper type to get the start and end of the user "memory pools" for mem_malloc */ +typedef enum { + /* Get the first (via: + MEMP_POOL_HELPER_START = ((u8_t) 1*MEMP_POOL_A + 0*MEMP_POOL_B + 0*MEMP_POOL_C + 0)*/ + MEMP_POOL_HELPER_FIRST = ((u8_t) +#define LWIP_MEMPOOL(name,num,size,desc) +#define LWIP_MALLOC_MEMPOOL_START 1 +#define LWIP_MALLOC_MEMPOOL(num, size) * MEMP_POOL_##size + 0 +#define LWIP_MALLOC_MEMPOOL_END +#include "lwip/memp_std.h" + ) , + /* Get the last (via: + MEMP_POOL_HELPER_END = ((u8_t) 0 + MEMP_POOL_A*0 + MEMP_POOL_B*0 + MEMP_POOL_C*1) */ + MEMP_POOL_HELPER_LAST = ((u8_t) +#define LWIP_MEMPOOL(name,num,size,desc) +#define LWIP_MALLOC_MEMPOOL_START +#define LWIP_MALLOC_MEMPOOL(num, size) 0 + MEMP_POOL_##size * +#define LWIP_MALLOC_MEMPOOL_END 1 +#include "lwip/memp_std.h" + ) +} memp_pool_helper_t; + +/* The actual start and stop values are here (cast them over) + We use this helper type and these defines so we can avoid using const memp_t values */ +#define MEMP_POOL_FIRST ((memp_t) MEMP_POOL_HELPER_FIRST) +#define MEMP_POOL_LAST ((memp_t) MEMP_POOL_HELPER_LAST) +#endif /* MEM_USE_POOLS */ + +#if MEMP_MEM_MALLOC || MEM_USE_POOLS +extern const u16_t memp_sizes[MEMP_MAX]; +#endif /* MEMP_MEM_MALLOC || MEM_USE_POOLS */ + +#if MEMP_MEM_MALLOC + +#include "mem.h" + +#define memp_init() +#define memp_malloc(type) mem_malloc(memp_sizes[type]) +#define memp_free(type, mem) mem_free(mem) + +#else /* MEMP_MEM_MALLOC */ + +#if MEM_USE_POOLS +/** This structure is used to save the pool one element came from. */ +struct memp_malloc_helper +{ + memp_t poolnr; +}; +#endif /* MEM_USE_POOLS */ + +void memp_init(void); + +#if MEMP_OVERFLOW_CHECK +void *memp_malloc_fn(memp_t type, const char* file, const int line); +#define memp_malloc(t) memp_malloc_fn((t), __FILE__, __LINE__) +#else +void *memp_malloc(memp_t type); +#endif +void memp_free(memp_t type, void *mem); + +#endif /* MEMP_MEM_MALLOC */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_MEMP_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/memp_std.h b/bertos/net/lwip/src/include/lwip/memp_std.h new file mode 100644 index 0000000..3446903 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/memp_std.h @@ -0,0 +1,102 @@ +/* + * SETUP: Make sure we define everything we will need. + * + * We have create three types of pools: + * 1) MEMPOOL - standard pools + * 2) MALLOC_MEMPOOL - to be used by mem_malloc in mem.c + * 3) PBUF_MEMPOOL - a mempool of pbuf's, so include space for the pbuf struct + * + * If the include'r doesn't require any special treatment of each of the types + * above, then will declare #2 & #3 to be just standard mempools. + */ +#ifndef LWIP_MALLOC_MEMPOOL +/* This treats "malloc pools" just like any other pool. + The pools are a little bigger to provide 'size' as the amount of user data. */ +#define LWIP_MALLOC_MEMPOOL(num, size) LWIP_MEMPOOL(POOL_##size, num, (size + sizeof(struct memp_malloc_helper)), "MALLOC_"#size) +#define LWIP_MALLOC_MEMPOOL_START +#define LWIP_MALLOC_MEMPOOL_END +#endif /* LWIP_MALLOC_MEMPOOL */ + +#ifndef LWIP_PBUF_MEMPOOL +/* This treats "pbuf pools" just like any other pool. + * Allocates buffers for a pbuf struct AND a payload size */ +#define LWIP_PBUF_MEMPOOL(name, num, payload, desc) LWIP_MEMPOOL(name, num, (MEMP_ALIGN_SIZE(sizeof(struct pbuf)) + MEMP_ALIGN_SIZE(payload)), desc) +#endif /* LWIP_PBUF_MEMPOOL */ + + +/* + * A list of internal pools used by LWIP. + * + * LWIP_MEMPOOL(pool_name, number_elements, element_size, pool_description) + * creates a pool name MEMP_pool_name. description is used in stats.c + */ +#if LWIP_RAW +LWIP_MEMPOOL(RAW_PCB, MEMP_NUM_RAW_PCB, sizeof(struct raw_pcb), "RAW_PCB") +#endif /* LWIP_RAW */ + +#if LWIP_UDP +LWIP_MEMPOOL(UDP_PCB, MEMP_NUM_UDP_PCB, sizeof(struct udp_pcb), "UDP_PCB") +#endif /* LWIP_UDP */ + +#if LWIP_TCP +LWIP_MEMPOOL(TCP_PCB, MEMP_NUM_TCP_PCB, sizeof(struct tcp_pcb), "TCP_PCB") +LWIP_MEMPOOL(TCP_PCB_LISTEN, MEMP_NUM_TCP_PCB_LISTEN, sizeof(struct tcp_pcb_listen), "TCP_PCB_LISTEN") +LWIP_MEMPOOL(TCP_SEG, MEMP_NUM_TCP_SEG, sizeof(struct tcp_seg), "TCP_SEG") +#endif /* LWIP_TCP */ + +#if IP_REASSEMBLY +LWIP_MEMPOOL(REASSDATA, MEMP_NUM_REASSDATA, sizeof(struct ip_reassdata), "REASSDATA") +#endif /* IP_REASSEMBLY */ + +#if LWIP_NETCONN +LWIP_MEMPOOL(NETBUF, MEMP_NUM_NETBUF, sizeof(struct netbuf), "NETBUF") +LWIP_MEMPOOL(NETCONN, MEMP_NUM_NETCONN, sizeof(struct netconn), "NETCONN") +#endif /* LWIP_NETCONN */ + +#if NO_SYS==0 +LWIP_MEMPOOL(TCPIP_MSG_API, MEMP_NUM_TCPIP_MSG_API, sizeof(struct tcpip_msg), "TCPIP_MSG_API") +LWIP_MEMPOOL(TCPIP_MSG_INPKT,MEMP_NUM_TCPIP_MSG_INPKT, sizeof(struct tcpip_msg), "TCPIP_MSG_INPKT") +#endif /* NO_SYS==0 */ + +#if ARP_QUEUEING +LWIP_MEMPOOL(ARP_QUEUE, MEMP_NUM_ARP_QUEUE, sizeof(struct etharp_q_entry), "ARP_QUEUE") +#endif /* ARP_QUEUEING */ + +#if LWIP_IGMP +LWIP_MEMPOOL(IGMP_GROUP, MEMP_NUM_IGMP_GROUP, sizeof(struct igmp_group), "IGMP_GROUP") +#endif /* LWIP_IGMP */ + +#if NO_SYS==0 +LWIP_MEMPOOL(SYS_TIMEOUT, MEMP_NUM_SYS_TIMEOUT, sizeof(struct sys_timeo), "SYS_TIMEOUT") +#endif /* NO_SYS==0 */ + + +/* + * A list of pools of pbuf's used by LWIP. + * + * LWIP_PBUF_MEMPOOL(pool_name, number_elements, pbuf_payload_size, pool_description) + * creates a pool name MEMP_pool_name. description is used in stats.c + * This allocates enough space for the pbuf struct and a payload. + * (Example: pbuf_payload_size=0 allocates only size for the struct) + */ +LWIP_PBUF_MEMPOOL(PBUF, MEMP_NUM_PBUF, 0, "PBUF_REF/ROM") +LWIP_PBUF_MEMPOOL(PBUF_POOL, PBUF_POOL_SIZE, PBUF_POOL_BUFSIZE, "PBUF_POOL") + + +/* + * Allow for user-defined pools; this must be explicitly set in lwipopts.h + * since the default is to NOT look for lwippools.h + */ +#if MEMP_USE_CUSTOM_POOLS +#include "lwippools.h" +#endif /* MEMP_USE_CUSTOM_POOLS */ + +/* + * REQUIRED CLEANUP: Clear up so we don't get "multiply defined" error later + * (#undef is ignored for something that is not defined) + */ +#undef LWIP_MEMPOOL +#undef LWIP_MALLOC_MEMPOOL +#undef LWIP_MALLOC_MEMPOOL_START +#undef LWIP_MALLOC_MEMPOOL_END +#undef LWIP_PBUF_MEMPOOL diff --git a/bertos/net/lwip/src/include/lwip/netbuf.h b/bertos/net/lwip/src/include/lwip/netbuf.h new file mode 100644 index 0000000..0dfb367 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/netbuf.h @@ -0,0 +1,86 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_NETBUF_H__ +#define __LWIP_NETBUF_H__ + +#include "lwip/opt.h" +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct netbuf { + struct pbuf *p, *ptr; + struct ip_addr *addr; + u16_t port; +#if LWIP_NETBUF_RECVINFO + struct ip_addr *toaddr; + u16_t toport; +#endif /* LWIP_NETBUF_RECVINFO */ +}; + +/* Network buffer functions: */ +struct netbuf * netbuf_new (void); +void netbuf_delete (struct netbuf *buf); +void * netbuf_alloc (struct netbuf *buf, u16_t size); +void netbuf_free (struct netbuf *buf); +err_t netbuf_ref (struct netbuf *buf, + const void *dataptr, u16_t size); +void netbuf_chain (struct netbuf *head, + struct netbuf *tail); + +u16_t netbuf_len (struct netbuf *buf); +err_t netbuf_data (struct netbuf *buf, + void **dataptr, u16_t *len); +s8_t netbuf_next (struct netbuf *buf); +void netbuf_first (struct netbuf *buf); + + +#define netbuf_copy_partial(buf, dataptr, len, offset) \ + pbuf_copy_partial((buf)->p, (dataptr), (len), (offset)) +#define netbuf_copy(buf,dataptr,len) netbuf_copy_partial(buf, dataptr, len, 0) +#define netbuf_take(buf, dataptr, len) pbuf_take((buf)->p, dataptr, len) +#define netbuf_len(buf) ((buf)->p->tot_len) +#define netbuf_fromaddr(buf) ((buf)->addr) +#define netbuf_fromport(buf) ((buf)->port) +#if LWIP_NETBUF_RECVINFO +#define netbuf_destaddr(buf) ((buf)->toaddr) +#define netbuf_destport(buf) ((buf)->toport) +#endif /* LWIP_NETBUF_RECVINFO */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_NETBUF_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/netdb.h b/bertos/net/lwip/src/include/lwip/netdb.h new file mode 100644 index 0000000..29c9847 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/netdb.h @@ -0,0 +1,111 @@ +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Simon Goldschmidt + * + */ + +#include "lwip/opt.h" + +#if LWIP_DNS && LWIP_SOCKET + +#include /* for size_t */ + +#include "lwip/sockets.h" + +/* some rarely used options */ +#ifndef LWIP_DNS_API_DECLARE_H_ERRNO +#define LWIP_DNS_API_DECLARE_H_ERRNO 1 +#endif + +#ifndef LWIP_DNS_API_DEFINE_ERRORS +#define LWIP_DNS_API_DEFINE_ERRORS 1 +#endif + +#ifndef LWIP_DNS_API_DECLARE_STRUCTS +#define LWIP_DNS_API_DECLARE_STRUCTS 1 +#endif + +#if LWIP_DNS_API_DEFINE_ERRORS +/** Errors used by the DNS API functions, h_errno can be one of them */ +#define EAI_NONAME 200 +#define EAI_SERVICE 201 +#define EAI_FAIL 202 +#define EAI_MEMORY 203 + +#define HOST_NOT_FOUND 210 +#define NO_DATA 211 +#define NO_RECOVERY 212 +#define TRY_AGAIN 213 +#endif /* LWIP_DNS_API_DEFINE_ERRORS */ + +#if LWIP_DNS_API_DECLARE_STRUCTS +struct hostent { + char *h_name; /* Official name of the host. */ + char **h_aliases; /* A pointer to an array of pointers to alternative host names, + terminated by a null pointer. */ + int h_addrtype; /* Address type. */ + int h_length; /* The length, in bytes, of the address. */ + char **h_addr_list; /* A pointer to an array of pointers to network addresses (in + network byte order) for the host, terminated by a null pointer. */ +#define h_addr h_addr_list[0] /* for backward compatibility */ +}; + +struct addrinfo { + int ai_flags; /* Input flags. */ + int ai_family; /* Address family of socket. */ + int ai_socktype; /* Socket type. */ + int ai_protocol; /* Protocol of socket. */ + socklen_t ai_addrlen; /* Length of socket address. */ + struct sockaddr *ai_addr; /* Socket address of socket. */ + char *ai_canonname; /* Canonical name of service location. */ + struct addrinfo *ai_next; /* Pointer to next in list. */ +}; +#endif /* LWIP_DNS_API_DECLARE_STRUCTS */ + +#if LWIP_DNS_API_DECLARE_H_ERRNO +/* application accessable error code set by the DNS API functions */ +extern int h_errno; +#endif /* LWIP_DNS_API_DECLARE_H_ERRNO*/ + +struct hostent *lwip_gethostbyname(const char *name); +int lwip_gethostbyname_r(const char *name, struct hostent *ret, char *buf, + size_t buflen, struct hostent **result, int *h_errnop); +void lwip_freeaddrinfo(struct addrinfo *ai); +int lwip_getaddrinfo(const char *nodename, + const char *servname, + const struct addrinfo *hints, + struct addrinfo **res); + +#if LWIP_COMPAT_SOCKETS +#define gethostbyname(name) lwip_gethostbyname(name) +#define gethostbyname_r(name, ret, buf, buflen, result, h_errnop) \ + lwip_gethostbyname_r(name, ret, buf, buflen, result, h_errnop) +#define freeaddrinfo(addrinfo) lwip_freeaddrinfo(addrinfo) +#define getaddrinfo(nodname, servname, hints, res) \ + lwip_getaddrinfo(nodname, servname, hints, res) +#endif /* LWIP_COMPAT_SOCKETS */ + +#endif /* LWIP_DNS && LWIP_SOCKET */ diff --git a/bertos/net/lwip/src/include/lwip/netif.h b/bertos/net/lwip/src/include/lwip/netif.h new file mode 100644 index 0000000..c50a6da --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/netif.h @@ -0,0 +1,263 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_NETIF_H__ +#define __LWIP_NETIF_H__ + +#include "lwip/opt.h" + +#define ENABLE_LOOPBACK (LWIP_NETIF_LOOPBACK || LWIP_HAVE_LOOPIF) + +#include "lwip/err.h" + +#include "lwip/ip_addr.h" + +#include "lwip/inet.h" +#include "lwip/pbuf.h" +#if LWIP_DHCP +struct dhcp; +#endif +#if LWIP_AUTOIP +struct autoip; +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* Throughout this file, IP addresses are expected to be in + * the same byte order as in IP_PCB. */ + +/** must be the maximum of all used hardware address lengths + across all types of interfaces in use */ +#define NETIF_MAX_HWADDR_LEN 6U + +/** TODO: define the use (where, when, whom) of netif flags */ + +/** whether the network interface is 'up'. this is + * a software flag used to control whether this network + * interface is enabled and processes traffic. + */ +#define NETIF_FLAG_UP 0x01U +/** if set, the netif has broadcast capability */ +#define NETIF_FLAG_BROADCAST 0x02U +/** if set, the netif is one end of a point-to-point connection */ +#define NETIF_FLAG_POINTTOPOINT 0x04U +/** if set, the interface is configured using DHCP */ +#define NETIF_FLAG_DHCP 0x08U +/** if set, the interface has an active link + * (set by the network interface driver) */ +#define NETIF_FLAG_LINK_UP 0x10U +/** if set, the netif is an device using ARP */ +#define NETIF_FLAG_ETHARP 0x20U +/** if set, the netif has IGMP capability */ +#define NETIF_FLAG_IGMP 0x40U + +/** Generic data structure used for all lwIP network interfaces. + * The following fields should be filled in by the initialization + * function for the device driver: hwaddr_len, hwaddr[], mtu, flags */ + +struct netif { + /** pointer to next in linked list */ + struct netif *next; + + /** IP address configuration in network byte order */ + struct ip_addr ip_addr; + struct ip_addr netmask; + struct ip_addr gw; + + /** This function is called by the network device driver + * to pass a packet up the TCP/IP stack. */ + err_t (* input)(struct pbuf *p, struct netif *inp); + /** This function is called by the IP module when it wants + * to send a packet on the interface. This function typically + * first resolves the hardware address, then sends the packet. */ + err_t (* output)(struct netif *netif, struct pbuf *p, + struct ip_addr *ipaddr); + /** This function is called by the ARP module when it wants + * to send a packet on the interface. This function outputs + * the pbuf as-is on the link medium. */ + err_t (* linkoutput)(struct netif *netif, struct pbuf *p); +#if LWIP_NETIF_STATUS_CALLBACK + /** This function is called when the netif state is set to up or down + */ + void (* status_callback)(struct netif *netif); +#endif /* LWIP_NETIF_STATUS_CALLBACK */ +#if LWIP_NETIF_LINK_CALLBACK + /** This function is called when the netif link is set to up or down + */ + void (* link_callback)(struct netif *netif); +#endif /* LWIP_NETIF_LINK_CALLBACK */ + /** This field can be set by the device driver and could point + * to state information for the device. */ + void *state; +#if LWIP_DHCP + /** the DHCP client state information for this netif */ + struct dhcp *dhcp; +#endif /* LWIP_DHCP */ +#if LWIP_AUTOIP + /** the AutoIP client state information for this netif */ + struct autoip *autoip; +#endif +#if LWIP_NETIF_HOSTNAME + /* the hostname for this netif, NULL is a valid value */ + char* hostname; +#endif /* LWIP_NETIF_HOSTNAME */ + /** maximum transfer unit (in bytes) */ + u16_t mtu; + /** number of bytes used in hwaddr */ + u8_t hwaddr_len; + /** link level hardware address of this interface */ + u8_t hwaddr[NETIF_MAX_HWADDR_LEN]; + /** flags (see NETIF_FLAG_ above) */ + u8_t flags; + /** descriptive abbreviation */ + char name[2]; + /** number of this interface */ + u8_t num; +#if LWIP_SNMP + /** link type (from "snmp_ifType" enum from snmp.h) */ + u8_t link_type; + /** (estimate) link speed */ + u32_t link_speed; + /** timestamp at last change made (up/down) */ + u32_t ts; + /** counters */ + u32_t ifinoctets; + u32_t ifinucastpkts; + u32_t ifinnucastpkts; + u32_t ifindiscards; + u32_t ifoutoctets; + u32_t ifoutucastpkts; + u32_t ifoutnucastpkts; + u32_t ifoutdiscards; +#endif /* LWIP_SNMP */ +#if LWIP_IGMP + /* This function could be called to add or delete a entry in the multicast filter table of the ethernet MAC.*/ + err_t (*igmp_mac_filter)( struct netif *netif, struct ip_addr *group, u8_t action); +#endif /* LWIP_IGMP */ +#if LWIP_NETIF_HWADDRHINT + u8_t *addr_hint; +#endif /* LWIP_NETIF_HWADDRHINT */ +#if ENABLE_LOOPBACK + /* List of packets to be queued for ourselves. */ + struct pbuf *loop_first; + struct pbuf *loop_last; +#if LWIP_LOOPBACK_MAX_PBUFS + u16_t loop_cnt_current; +#endif /* LWIP_LOOPBACK_MAX_PBUFS */ +#endif /* ENABLE_LOOPBACK */ +}; + +#if LWIP_SNMP +#define NETIF_INIT_SNMP(netif, type, speed) \ + /* use "snmp_ifType" enum from snmp.h for "type", snmp_ifType_ethernet_csmacd by example */ \ + netif->link_type = type; \ + /* your link speed here (units: bits per second) */ \ + netif->link_speed = speed; \ + netif->ts = 0; \ + netif->ifinoctets = 0; \ + netif->ifinucastpkts = 0; \ + netif->ifinnucastpkts = 0; \ + netif->ifindiscards = 0; \ + netif->ifoutoctets = 0; \ + netif->ifoutucastpkts = 0; \ + netif->ifoutnucastpkts = 0; \ + netif->ifoutdiscards = 0 +#else /* LWIP_SNMP */ +#define NETIF_INIT_SNMP(netif, type, speed) +#endif /* LWIP_SNMP */ + + +/** The list of network interfaces. */ +extern struct netif *netif_list; +/** The default network interface. */ +extern struct netif *netif_default; + +#define netif_init() /* Compatibility define, not init needed. */ + +struct netif *netif_add(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask, + struct ip_addr *gw, + void *state, + err_t (* init)(struct netif *netif), + err_t (* input)(struct pbuf *p, struct netif *netif)); + +void +netif_set_addr(struct netif *netif,struct ip_addr *ipaddr, struct ip_addr *netmask, + struct ip_addr *gw); +void netif_remove(struct netif * netif); + +/* Returns a network interface given its name. The name is of the form + "et0", where the first two letters are the "name" field in the + netif structure, and the digit is in the num field in the same + structure. */ +struct netif *netif_find(char *name); + +void netif_set_default(struct netif *netif); + +void netif_set_ipaddr(struct netif *netif, struct ip_addr *ipaddr); +void netif_set_netmask(struct netif *netif, struct ip_addr *netmask); +void netif_set_gw(struct netif *netif, struct ip_addr *gw); + +void netif_set_up(struct netif *netif); +void netif_set_down(struct netif *netif); +u8_t netif_is_up(struct netif *netif); + +#if LWIP_NETIF_STATUS_CALLBACK +/* + * Set callback to be called when interface is brought up/down + */ +void netif_set_status_callback(struct netif *netif, void (* status_callback)(struct netif *netif)); +#endif /* LWIP_NETIF_STATUS_CALLBACK */ + +#if LWIP_NETIF_LINK_CALLBACK +void netif_set_link_up(struct netif *netif); +void netif_set_link_down(struct netif *netif); +u8_t netif_is_link_up(struct netif *netif); +/* + * Set callback to be called when link is brought up/down + */ +void netif_set_link_callback(struct netif *netif, void (* link_callback)(struct netif *netif)); +#endif /* LWIP_NETIF_LINK_CALLBACK */ + +#ifdef __cplusplus +} +#endif + +#if ENABLE_LOOPBACK +err_t netif_loop_output(struct netif *netif, struct pbuf *p, struct ip_addr *dest_ip); +void netif_poll(struct netif *netif); +#if !LWIP_NETIF_LOOPBACK_MULTITHREADING +void netif_poll_all(void); +#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */ +#endif /* ENABLE_LOOPBACK */ + +#endif /* __LWIP_NETIF_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/netifapi.h b/bertos/net/lwip/src/include/lwip/netifapi.h new file mode 100644 index 0000000..4145dd7 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/netifapi.h @@ -0,0 +1,105 @@ +/* + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ + +#ifndef __LWIP_NETIFAPI_H__ +#define __LWIP_NETIFAPI_H__ + +#include "lwip/opt.h" + +#if LWIP_NETIF_API /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sys.h" +#include "lwip/netif.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct netifapi_msg_msg { +#if !LWIP_TCPIP_CORE_LOCKING + sys_sem_t sem; +#endif /* !LWIP_TCPIP_CORE_LOCKING */ + err_t err; + struct netif *netif; + union { + struct { + struct ip_addr *ipaddr; + struct ip_addr *netmask; + struct ip_addr *gw; + void *state; + err_t (* init) (struct netif *netif); + err_t (* input)(struct pbuf *p, struct netif *netif); + } add; + struct { + void (* voidfunc)(struct netif *netif); + err_t (* errtfunc)(struct netif *netif); + } common; + } msg; +}; + +struct netifapi_msg { + void (* function)(struct netifapi_msg_msg *msg); + struct netifapi_msg_msg msg; +}; + + +/* API for application */ +err_t netifapi_netif_add ( struct netif *netif, + struct ip_addr *ipaddr, + struct ip_addr *netmask, + struct ip_addr *gw, + void *state, + err_t (* init)(struct netif *netif), + err_t (* input)(struct pbuf *p, struct netif *netif) ); + +err_t netifapi_netif_set_addr ( struct netif *netif, + struct ip_addr *ipaddr, + struct ip_addr *netmask, + struct ip_addr *gw ); + +err_t netifapi_netif_common ( struct netif *netif, + void (* voidfunc)(struct netif *netif), + err_t (* errtfunc)(struct netif *netif) ); + +#define netifapi_netif_remove(n) netifapi_netif_common(n, netif_remove, NULL) +#define netifapi_netif_set_up(n) netifapi_netif_common(n, netif_set_up, NULL) +#define netifapi_netif_set_down(n) netifapi_netif_common(n, netif_set_down, NULL) +#define netifapi_netif_set_default(n) netifapi_netif_common(n, netif_set_default, NULL) +#define netifapi_dhcp_start(n) netifapi_netif_common(n, NULL, dhcp_start) +#define netifapi_dhcp_stop(n) netifapi_netif_common(n, dhcp_stop, NULL) +#define netifapi_autoip_start(n) netifapi_netif_common(n, NULL, autoip_start) +#define netifapi_autoip_stop(n) netifapi_netif_common(n, NULL, autoip_stop) + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_NETIF_API */ + +#endif /* __LWIP_NETIFAPI_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/opt.h b/bertos/net/lwip/src/include/lwip/opt.h new file mode 100644 index 0000000..8e3b821 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/opt.h @@ -0,0 +1,1840 @@ +/** + * @file + * + * lwIP Options Configuration + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_OPT_H__ +#define __LWIP_OPT_H__ + +/* + * Include user defined options first. Anything not defined in these files + * will be set to standard values. Override anything you dont like! + */ +#include "lwipopts.h" +#include "lwip/debug.h" + +/* + ----------------------------------------------- + ---------- Platform specific locking ---------- + ----------------------------------------------- +*/ + +/** + * SYS_LIGHTWEIGHT_PROT==1: if you want inter-task protection for certain + * critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#ifndef SYS_LIGHTWEIGHT_PROT +#define SYS_LIGHTWEIGHT_PROT 0 +#endif + +/** + * NO_SYS==1: Provides VERY minimal functionality. Otherwise, + * use lwIP facilities. + */ +#ifndef NO_SYS +#define NO_SYS 0 +#endif + +/** + * MEMCPY: override this if you have a faster implementation at hand than the + * one included in your C library + */ +#ifndef MEMCPY +#define MEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/** + * SMEMCPY: override this with care! Some compilers (e.g. gcc) can inline a + * call to memcpy() if the length is known at compile time and is small. + */ +#ifndef SMEMCPY +#define SMEMCPY(dst,src,len) memcpy(dst,src,len) +#endif + +/* + ------------------------------------ + ---------- Memory options ---------- + ------------------------------------ +*/ +/** + * MEM_LIBC_MALLOC==1: Use malloc/free/realloc provided by your C-library + * instead of the lwip internal allocator. Can save code size if you + * already use it. + */ +#ifndef MEM_LIBC_MALLOC +#define MEM_LIBC_MALLOC 0 +#endif + +/** +* MEMP_MEM_MALLOC==1: Use mem_malloc/mem_free instead of the lwip pool allocator. +* Especially useful with MEM_LIBC_MALLOC but handle with care regarding execution +* speed and usage from interrupts! +*/ +#ifndef MEMP_MEM_MALLOC +#define MEMP_MEM_MALLOC 0 +#endif + +/** + * MEM_ALIGNMENT: should be set to the alignment of the CPU + * 4 byte alignment -> #define MEM_ALIGNMENT 4 + * 2 byte alignment -> #define MEM_ALIGNMENT 2 + */ +#ifndef MEM_ALIGNMENT +#define MEM_ALIGNMENT 1 +#endif + +/** + * MEM_SIZE: the size of the heap memory. If the application will send + * a lot of data that needs to be copied, this should be set high. + */ +#ifndef MEM_SIZE +#define MEM_SIZE 1600 +#endif + +/** + * MEMP_OVERFLOW_CHECK: memp overflow protection reserves a configurable + * amount of bytes before and after each memp element in every pool and fills + * it with a prominent default value. + * MEMP_OVERFLOW_CHECK == 0 no checking + * MEMP_OVERFLOW_CHECK == 1 checks each element when it is freed + * MEMP_OVERFLOW_CHECK >= 2 checks each element in every pool every time + * memp_malloc() or memp_free() is called (useful but slow!) + */ +#ifndef MEMP_OVERFLOW_CHECK +#define MEMP_OVERFLOW_CHECK 0 +#endif + +/** + * MEMP_SANITY_CHECK==1: run a sanity check after each memp_free() to make + * sure that there are no cycles in the linked lists. + */ +#ifndef MEMP_SANITY_CHECK +#define MEMP_SANITY_CHECK 0 +#endif + +/** + * MEM_USE_POOLS==1: Use an alternative to malloc() by allocating from a set + * of memory pools of various sizes. When mem_malloc is called, an element of + * the smallest pool that can provide the length needed is returned. + * To use this, MEMP_USE_CUSTOM_POOLS also has to be enabled. + */ +#ifndef MEM_USE_POOLS +#define MEM_USE_POOLS 0 +#endif + +/** + * MEM_USE_POOLS_TRY_BIGGER_POOL==1: if one malloc-pool is empty, try the next + * bigger pool - WARNING: THIS MIGHT WASTE MEMORY but it can make a system more + * reliable. */ +#ifndef MEM_USE_POOLS_TRY_BIGGER_POOL +#define MEM_USE_POOLS_TRY_BIGGER_POOL 0 +#endif + +/** + * MEMP_USE_CUSTOM_POOLS==1: whether to include a user file lwippools.h + * that defines additional pools beyond the "standard" ones required + * by lwIP. If you set this to 1, you must have lwippools.h in your + * inlude path somewhere. + */ +#ifndef MEMP_USE_CUSTOM_POOLS +#define MEMP_USE_CUSTOM_POOLS 0 +#endif + +/** + * Set this to 1 if you want to free PBUF_RAM pbufs (or call mem_free()) from + * interrupt context (or another context that doesn't allow waiting for a + * semaphore). + * If set to 1, mem_malloc will be protected by a semaphore and SYS_ARCH_PROTECT, + * while mem_free will only use SYS_ARCH_PROTECT. mem_malloc SYS_ARCH_UNPROTECTs + * with each loop so that mem_free can run. + * + * ATTENTION: As you can see from the above description, this leads to dis-/ + * enabling interrupts often, which can be slow! Also, on low memory, mem_malloc + * can need longer. + * + * If you don't want that, at least for NO_SYS=0, you can still use the following + * functions to enqueue a deallocation call which then runs in the tcpip_thread + * context: + * - pbuf_free_callback(p); + * - mem_free_callback(m); + */ +#ifndef LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT +#define LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT 0 +#endif + +/* + ------------------------------------------------ + ---------- Internal Memory Pool Sizes ---------- + ------------------------------------------------ +*/ +/** + * MEMP_NUM_PBUF: the number of memp struct pbufs (used for PBUF_ROM and PBUF_REF). + * If the application sends a lot of data out of ROM (or other static memory), + * this should be set high. + */ +#ifndef MEMP_NUM_PBUF +#define MEMP_NUM_PBUF 16 +#endif + +/** + * MEMP_NUM_RAW_PCB: Number of raw connection PCBs + * (requires the LWIP_RAW option) + */ +#ifndef MEMP_NUM_RAW_PCB +#define MEMP_NUM_RAW_PCB 4 +#endif + +/** + * MEMP_NUM_UDP_PCB: the number of UDP protocol control blocks. One + * per active UDP "connection". + * (requires the LWIP_UDP option) + */ +#ifndef MEMP_NUM_UDP_PCB +#define MEMP_NUM_UDP_PCB 4 +#endif + +/** + * MEMP_NUM_TCP_PCB: the number of simulatenously active TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB +#define MEMP_NUM_TCP_PCB 5 +#endif + +/** + * MEMP_NUM_TCP_PCB_LISTEN: the number of listening TCP connections. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_PCB_LISTEN +#define MEMP_NUM_TCP_PCB_LISTEN 8 +#endif + +/** + * MEMP_NUM_TCP_SEG: the number of simultaneously queued TCP segments. + * (requires the LWIP_TCP option) + */ +#ifndef MEMP_NUM_TCP_SEG +#define MEMP_NUM_TCP_SEG 16 +#endif + +/** + * MEMP_NUM_REASSDATA: the number of simultaneously IP packets queued for + * reassembly (whole packets, not fragments!) + */ +#ifndef MEMP_NUM_REASSDATA +#define MEMP_NUM_REASSDATA 5 +#endif + +/** + * MEMP_NUM_ARP_QUEUE: the number of simulateously queued outgoing + * packets (pbufs) that are waiting for an ARP request (to resolve + * their destination address) to finish. + * (requires the ARP_QUEUEING option) + */ +#ifndef MEMP_NUM_ARP_QUEUE +#define MEMP_NUM_ARP_QUEUE 30 +#endif + +/** + * MEMP_NUM_IGMP_GROUP: The number of multicast groups whose network interfaces + * can be members et the same time (one per netif - allsystems group -, plus one + * per netif membership). + * (requires the LWIP_IGMP option) + */ +#ifndef MEMP_NUM_IGMP_GROUP +#define MEMP_NUM_IGMP_GROUP 8 +#endif + +/** + * MEMP_NUM_SYS_TIMEOUT: the number of simulateously active timeouts. + * (requires NO_SYS==0) + */ +#ifndef MEMP_NUM_SYS_TIMEOUT +#define MEMP_NUM_SYS_TIMEOUT 3 +#endif + +/** + * MEMP_NUM_NETBUF: the number of struct netbufs. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETBUF +#define MEMP_NUM_NETBUF 2 +#endif + +/** + * MEMP_NUM_NETCONN: the number of struct netconns. + * (only needed if you use the sequential API, like api_lib.c) + */ +#ifndef MEMP_NUM_NETCONN +#define MEMP_NUM_NETCONN 4 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_API: the number of struct tcpip_msg, which are used + * for callback/timeout API communication. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_API +#define MEMP_NUM_TCPIP_MSG_API 8 +#endif + +/** + * MEMP_NUM_TCPIP_MSG_INPKT: the number of struct tcpip_msg, which are used + * for incoming packets. + * (only needed if you use tcpip.c) + */ +#ifndef MEMP_NUM_TCPIP_MSG_INPKT +#define MEMP_NUM_TCPIP_MSG_INPKT 8 +#endif + +/** + * PBUF_POOL_SIZE: the number of buffers in the pbuf pool. + */ +#ifndef PBUF_POOL_SIZE +#define PBUF_POOL_SIZE 16 +#endif + +/* + --------------------------------- + ---------- ARP options ---------- + --------------------------------- +*/ +/** + * LWIP_ARP==1: Enable ARP functionality. + */ +#ifndef LWIP_ARP +#define LWIP_ARP 1 +#endif + +/** + * ARP_TABLE_SIZE: Number of active MAC-IP address pairs cached. + */ +#ifndef ARP_TABLE_SIZE +#define ARP_TABLE_SIZE 10 +#endif + +/** + * ARP_QUEUEING==1: Outgoing packets are queued during hardware address + * resolution. + */ +#ifndef ARP_QUEUEING +#define ARP_QUEUEING 1 +#endif + +/** + * ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be + * updated with the source MAC and IP addresses supplied in the packet. + * You may want to disable this if you do not trust LAN peers to have the + * correct addresses, or as a limited approach to attempt to handle + * spoofing. If disabled, lwIP will need to make a new ARP request if + * the peer is not already in the ARP table, adding a little latency. + */ +#ifndef ETHARP_TRUST_IP_MAC +#define ETHARP_TRUST_IP_MAC 1 +#endif + +/** + * ETHARP_SUPPORT_VLAN==1: support receiving ethernet packets with VLAN header. + * Additionally, you can define ETHARP_VLAN_CHECK to an u16_t VLAN ID to check. + * If ETHARP_VLAN_CHECK is defined, only VLAN-traffic for this VLAN is accepted. + * If ETHARP_VLAN_CHECK is not defined, all traffic is accepted. + */ +#ifndef ETHARP_SUPPORT_VLAN +#define ETHARP_SUPPORT_VLAN 0 +#endif + +/* + -------------------------------- + ---------- IP options ---------- + -------------------------------- +*/ +/** + * IP_FORWARD==1: Enables the ability to forward IP packets across network + * interfaces. If you are going to run lwIP on a device with only one network + * interface, define this to 0. + */ +#ifndef IP_FORWARD +#define IP_FORWARD 0 +#endif + +/** + * IP_OPTIONS_ALLOWED: Defines the behavior for IP options. + * IP_OPTIONS_ALLOWED==0: All packets with IP options are dropped. + * IP_OPTIONS_ALLOWED==1: IP options are allowed (but not parsed). + */ +#ifndef IP_OPTIONS_ALLOWED +#define IP_OPTIONS_ALLOWED 1 +#endif + +/** + * IP_REASSEMBLY==1: Reassemble incoming fragmented IP packets. Note that + * this option does not affect outgoing packet sizes, which can be controlled + * via IP_FRAG. + */ +#ifndef IP_REASSEMBLY +#define IP_REASSEMBLY 1 +#endif + +/** + * IP_FRAG==1: Fragment outgoing IP packets if their size exceeds MTU. Note + * that this option does not affect incoming packet sizes, which can be + * controlled via IP_REASSEMBLY. + */ +#ifndef IP_FRAG +#define IP_FRAG 1 +#endif + +/** + * IP_REASS_MAXAGE: Maximum time (in multiples of IP_TMR_INTERVAL - so seconds, normally) + * a fragmented IP packet waits for all fragments to arrive. If not all fragments arrived + * in this time, the whole packet is discarded. + */ +#ifndef IP_REASS_MAXAGE +#define IP_REASS_MAXAGE 3 +#endif + +/** + * IP_REASS_MAX_PBUFS: Total maximum amount of pbufs waiting to be reassembled. + * Since the received pbufs are enqueued, be sure to configure + * PBUF_POOL_SIZE > IP_REASS_MAX_PBUFS so that the stack is still able to receive + * packets even if the maximum amount of fragments is enqueued for reassembly! + */ +#ifndef IP_REASS_MAX_PBUFS +#define IP_REASS_MAX_PBUFS 10 +#endif + +/** + * IP_FRAG_USES_STATIC_BUF==1: Use a static MTU-sized buffer for IP + * fragmentation. Otherwise pbufs are allocated and reference the original + * packet data to be fragmented. + */ +#ifndef IP_FRAG_USES_STATIC_BUF +#define IP_FRAG_USES_STATIC_BUF 1 +#endif + +/** + * IP_FRAG_MAX_MTU: Assumed max MTU on any interface for IP frag buffer + * (requires IP_FRAG_USES_STATIC_BUF==1) + */ +#if IP_FRAG_USES_STATIC_BUF && !defined(IP_FRAG_MAX_MTU) +#define IP_FRAG_MAX_MTU 1500 +#endif + +/** + * IP_DEFAULT_TTL: Default value for Time-To-Live used by transport layers. + */ +#ifndef IP_DEFAULT_TTL +#define IP_DEFAULT_TTL 255 +#endif + +/** + * IP_SOF_BROADCAST=1: Use the SOF_BROADCAST field to enable broadcast + * filter per pcb on udp and raw send operations. To enable broadcast filter + * on recv operations, you also have to set IP_SOF_BROADCAST_RECV=1. + */ +#ifndef IP_SOF_BROADCAST +#define IP_SOF_BROADCAST 0 +#endif + +/** + * IP_SOF_BROADCAST_RECV (requires IP_SOF_BROADCAST=1) enable the broadcast + * filter on recv operations. + */ +#ifndef IP_SOF_BROADCAST_RECV +#define IP_SOF_BROADCAST_RECV 0 +#endif + +/* + ---------------------------------- + ---------- ICMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_ICMP==1: Enable ICMP module inside the IP stack. + * Be careful, disable that make your product non-compliant to RFC1122 + */ +#ifndef LWIP_ICMP +#define LWIP_ICMP 1 +#endif + +/** + * ICMP_TTL: Default value for Time-To-Live used by ICMP packets. + */ +#ifndef ICMP_TTL +#define ICMP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_BROADCAST_PING==1: respond to broadcast pings (default is unicast only) + */ +#ifndef LWIP_BROADCAST_PING +#define LWIP_BROADCAST_PING 0 +#endif + +/** + * LWIP_MULTICAST_PING==1: respond to multicast pings (default is unicast only) + */ +#ifndef LWIP_MULTICAST_PING +#define LWIP_MULTICAST_PING 0 +#endif + +/* + --------------------------------- + ---------- RAW options ---------- + --------------------------------- +*/ +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef LWIP_RAW +#define LWIP_RAW 1 +#endif + +/** + * LWIP_RAW==1: Enable application layer to hook into the IP layer itself. + */ +#ifndef RAW_TTL +#define RAW_TTL (IP_DEFAULT_TTL) +#endif + +/* + ---------------------------------- + ---------- DHCP options ---------- + ---------------------------------- +*/ +/** + * LWIP_DHCP==1: Enable DHCP module. + */ +#ifndef LWIP_DHCP +#define LWIP_DHCP 0 +#endif + +/** + * DHCP_DOES_ARP_CHECK==1: Do an ARP check on the offered address. + */ +#ifndef DHCP_DOES_ARP_CHECK +#define DHCP_DOES_ARP_CHECK ((LWIP_DHCP) && (LWIP_ARP)) +#endif + +/* + ------------------------------------ + ---------- AUTOIP options ---------- + ------------------------------------ +*/ +/** + * LWIP_AUTOIP==1: Enable AUTOIP module. + */ +#ifndef LWIP_AUTOIP +#define LWIP_AUTOIP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP==1: Allow DHCP and AUTOIP to be both enabled on + * the same interface at the same time. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP +#define LWIP_DHCP_AUTOIP_COOP 0 +#endif + +/** + * LWIP_DHCP_AUTOIP_COOP_TRIES: Set to the number of DHCP DISCOVER probes + * that should be sent before falling back on AUTOIP. This can be set + * as low as 1 to get an AutoIP address very quickly, but you should + * be prepared to handle a changing IP address when DHCP overrides + * AutoIP. + */ +#ifndef LWIP_DHCP_AUTOIP_COOP_TRIES +#define LWIP_DHCP_AUTOIP_COOP_TRIES 9 +#endif + +/* + ---------------------------------- + ---------- SNMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_SNMP==1: Turn on SNMP module. UDP must be available for SNMP + * transport. + */ +#ifndef LWIP_SNMP +#define LWIP_SNMP 0 +#endif + +/** + * SNMP_CONCURRENT_REQUESTS: Number of concurrent requests the module will + * allow. At least one request buffer is required. + */ +#ifndef SNMP_CONCURRENT_REQUESTS +#define SNMP_CONCURRENT_REQUESTS 1 +#endif + +/** + * SNMP_TRAP_DESTINATIONS: Number of trap destinations. At least one trap + * destination is required + */ +#ifndef SNMP_TRAP_DESTINATIONS +#define SNMP_TRAP_DESTINATIONS 1 +#endif + +/** + * SNMP_PRIVATE_MIB: + */ +#ifndef SNMP_PRIVATE_MIB +#define SNMP_PRIVATE_MIB 0 +#endif + +/** + * Only allow SNMP write actions that are 'safe' (e.g. disabeling netifs is not + * a safe action and disabled when SNMP_SAFE_REQUESTS = 1). + * Unsafe requests are disabled by default! + */ +#ifndef SNMP_SAFE_REQUESTS +#define SNMP_SAFE_REQUESTS 1 +#endif + +/* + ---------------------------------- + ---------- IGMP options ---------- + ---------------------------------- +*/ +/** + * LWIP_IGMP==1: Turn on IGMP module. + */ +#ifndef LWIP_IGMP +#define LWIP_IGMP 0 +#endif + +/* + ---------------------------------- + ---------- DNS options ----------- + ---------------------------------- +*/ +/** + * LWIP_DNS==1: Turn on DNS module. UDP must be available for DNS + * transport. + */ +#ifndef LWIP_DNS +#define LWIP_DNS 0 +#endif + +/** DNS maximum number of entries to maintain locally. */ +#ifndef DNS_TABLE_SIZE +#define DNS_TABLE_SIZE 4 +#endif + +/** DNS maximum host name length supported in the name table. */ +#ifndef DNS_MAX_NAME_LENGTH +#define DNS_MAX_NAME_LENGTH 256 +#endif + +/** The maximum of DNS servers */ +#ifndef DNS_MAX_SERVERS +#define DNS_MAX_SERVERS 2 +#endif + +/** DNS do a name checking between the query and the response. */ +#ifndef DNS_DOES_NAME_CHECK +#define DNS_DOES_NAME_CHECK 1 +#endif + +/** DNS use a local buffer if DNS_USES_STATIC_BUF=0, a static one if + DNS_USES_STATIC_BUF=1, or a dynamic one if DNS_USES_STATIC_BUF=2. + The buffer will be of size DNS_MSG_SIZE */ +#ifndef DNS_USES_STATIC_BUF +#define DNS_USES_STATIC_BUF 1 +#endif + +/** DNS message max. size. Default value is RFC compliant. */ +#ifndef DNS_MSG_SIZE +#define DNS_MSG_SIZE 512 +#endif + +/** DNS_LOCAL_HOSTLIST: Implements a local host-to-address list. If enabled, + * you have to define + * #define DNS_LOCAL_HOSTLIST_INIT {{"host1", 0x123}, {"host2", 0x234}} + * (an array of structs name/address, where address is an u32_t in network + * byte order). + * + * Instead, you can also use an external function: + * #define DNS_LOOKUP_LOCAL_EXTERN(x) extern u32_t my_lookup_function(const char *name) + * that returns the IP address or INADDR_NONE if not found. + */ +#ifndef DNS_LOCAL_HOSTLIST +#define DNS_LOCAL_HOSTLIST 0 +#endif /* DNS_LOCAL_HOSTLIST */ + +/** If this is turned on, the local host-list can be dynamically changed + * at runtime. */ +#ifndef DNS_LOCAL_HOSTLIST_IS_DYNAMIC +#define DNS_LOCAL_HOSTLIST_IS_DYNAMIC 0 +#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */ + +/* + --------------------------------- + ---------- UDP options ---------- + --------------------------------- +*/ +/** + * LWIP_UDP==1: Turn on UDP. + */ +#ifndef LWIP_UDP +#define LWIP_UDP 1 +#endif + +/** + * LWIP_UDPLITE==1: Turn on UDP-Lite. (Requires LWIP_UDP) + */ +#ifndef LWIP_UDPLITE +#define LWIP_UDPLITE 0 +#endif + +/** + * UDP_TTL: Default Time-To-Live value. + */ +#ifndef UDP_TTL +#define UDP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * LWIP_NETBUF_RECVINFO==1: append destination addr and port to every netbuf. + */ +#ifndef LWIP_NETBUF_RECVINFO +#define LWIP_NETBUF_RECVINFO 0 +#endif + +/* + --------------------------------- + ---------- TCP options ---------- + --------------------------------- +*/ +/** + * LWIP_TCP==1: Turn on TCP. + */ +#ifndef LWIP_TCP +#define LWIP_TCP 1 +#endif + +/** + * TCP_TTL: Default Time-To-Live value. + */ +#ifndef TCP_TTL +#define TCP_TTL (IP_DEFAULT_TTL) +#endif + +/** + * TCP_WND: The size of a TCP window. This must be at least + * (2 * TCP_MSS) for things to work well + */ +#ifndef TCP_WND +#define TCP_WND (4 * TCP_MSS) +#endif + +/** + * TCP_MAXRTX: Maximum number of retransmissions of data segments. + */ +#ifndef TCP_MAXRTX +#define TCP_MAXRTX 12 +#endif + +/** + * TCP_SYNMAXRTX: Maximum number of retransmissions of SYN segments. + */ +#ifndef TCP_SYNMAXRTX +#define TCP_SYNMAXRTX 6 +#endif + +/** + * TCP_QUEUE_OOSEQ==1: TCP will queue segments that arrive out of order. + * Define to 0 if your device is low on memory. + */ +#ifndef TCP_QUEUE_OOSEQ +#define TCP_QUEUE_OOSEQ (LWIP_TCP) +#endif + +/** + * TCP_MSS: TCP Maximum segment size. (default is 536, a conservative default, + * you might want to increase this.) + * For the receive side, this MSS is advertised to the remote side + * when opening a connection. For the transmit size, this MSS sets + * an upper limit on the MSS advertised by the remote host. + */ +#ifndef TCP_MSS +#define TCP_MSS 536 +#endif + +/** + * TCP_CALCULATE_EFF_SEND_MSS: "The maximum size of a segment that TCP really + * sends, the 'effective send MSS,' MUST be the smaller of the send MSS (which + * reflects the available reassembly buffer size at the remote host) and the + * largest size permitted by the IP layer" (RFC 1122) + * Setting this to 1 enables code that checks TCP_MSS against the MTU of the + * netif used for a connection and limits the MSS if it would be too big otherwise. + */ +#ifndef TCP_CALCULATE_EFF_SEND_MSS +#define TCP_CALCULATE_EFF_SEND_MSS 1 +#endif + + +/** + * TCP_SND_BUF: TCP sender buffer space (bytes). + */ +#ifndef TCP_SND_BUF +#define TCP_SND_BUF 256 +#endif + +/** + * TCP_SND_QUEUELEN: TCP sender buffer space (pbufs). This must be at least + * as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work. + */ +#ifndef TCP_SND_QUEUELEN +#define TCP_SND_QUEUELEN (4 * (TCP_SND_BUF)/(TCP_MSS)) +#endif + +/** + * TCP_SNDLOWAT: TCP writable space (bytes). This must be less than or equal + * to TCP_SND_BUF. It is the amount of space which must be available in the + * TCP snd_buf for select to return writable. + */ +#ifndef TCP_SNDLOWAT +#define TCP_SNDLOWAT ((TCP_SND_BUF)/2) +#endif + +/** + * TCP_LISTEN_BACKLOG: Enable the backlog option for tcp listen pcb. + */ +#ifndef TCP_LISTEN_BACKLOG +#define TCP_LISTEN_BACKLOG 0 +#endif + +/** + * The maximum allowed backlog for TCP listen netconns. + * This backlog is used unless another is explicitly specified. + * 0xff is the maximum (u8_t). + */ +#ifndef TCP_DEFAULT_LISTEN_BACKLOG +#define TCP_DEFAULT_LISTEN_BACKLOG 0xff +#endif + +/** + * LWIP_TCP_TIMESTAMPS==1: support the TCP timestamp option. + */ +#ifndef LWIP_TCP_TIMESTAMPS +#define LWIP_TCP_TIMESTAMPS 0 +#endif + +/** + * TCP_WND_UPDATE_THRESHOLD: difference in window to trigger an + * explicit window update + */ +#ifndef TCP_WND_UPDATE_THRESHOLD +#define TCP_WND_UPDATE_THRESHOLD (TCP_WND / 4) +#endif + +/** + * LWIP_EVENT_API and LWIP_CALLBACK_API: Only one of these should be set to 1. + * LWIP_EVENT_API==1: The user defines lwip_tcp_event() to receive all + * events (accept, sent, etc) that happen in the system. + * LWIP_CALLBACK_API==1: The PCB callback function is called directly + * for the event. + */ +#ifndef LWIP_EVENT_API +#define LWIP_EVENT_API 0 +#define LWIP_CALLBACK_API 1 +#else +// #define LWIP_EVENT_API 1 +// #define LWIP_CALLBACK_API 0 +#endif + + +/* + ---------------------------------- + ---------- Pbuf options ---------- + ---------------------------------- +*/ +/** + * PBUF_LINK_HLEN: the number of bytes that should be allocated for a + * link level header. The default is 14, the standard value for + * Ethernet. + */ +#ifndef PBUF_LINK_HLEN +#define PBUF_LINK_HLEN 14 +#endif + +/** + * PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. The default is + * designed to accomodate single full size TCP frame in one pbuf, including + * TCP_MSS, IP header, and link header. + */ +#ifndef PBUF_POOL_BUFSIZE +#define PBUF_POOL_BUFSIZE LWIP_MEM_ALIGN_SIZE(TCP_MSS+40+PBUF_LINK_HLEN) +#endif + +/* + ------------------------------------------------ + ---------- Network Interfaces options ---------- + ------------------------------------------------ +*/ +/** + * LWIP_NETIF_HOSTNAME==1: use DHCP_OPTION_HOSTNAME with netif's hostname + * field. + */ +#ifndef LWIP_NETIF_HOSTNAME +#define LWIP_NETIF_HOSTNAME 0 +#endif + +/** + * LWIP_NETIF_API==1: Support netif api (in netifapi.c) + */ +#ifndef LWIP_NETIF_API +#define LWIP_NETIF_API 0 +#endif + +/** + * LWIP_NETIF_STATUS_CALLBACK==1: Support a callback function whenever an interface + * changes its up/down status (i.e., due to DHCP IP acquistion) + */ +#ifndef LWIP_NETIF_STATUS_CALLBACK +#define LWIP_NETIF_STATUS_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_LINK_CALLBACK==1: Support a callback function from an interface + * whenever the link changes (i.e., link down) + */ +#ifndef LWIP_NETIF_LINK_CALLBACK +#define LWIP_NETIF_LINK_CALLBACK 0 +#endif + +/** + * LWIP_NETIF_HWADDRHINT==1: Cache link-layer-address hints (e.g. table + * indices) in struct netif. TCP and UDP can make use of this to prevent + * scanning the ARP table for every sent packet. While this is faster for big + * ARP tables or many concurrent connections, it might be counterproductive + * if you have a tiny ARP table or if there never are concurrent connections. + */ +#ifndef LWIP_NETIF_HWADDRHINT +#define LWIP_NETIF_HWADDRHINT 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK==1: Support sending packets with a destination IP + * address equal to the netif IP address, looping them back up the stack. + */ +#ifndef LWIP_NETIF_LOOPBACK +#define LWIP_NETIF_LOOPBACK 0 +#endif + +/** + * LWIP_LOOPBACK_MAX_PBUFS: Maximum number of pbufs on queue for loopback + * sending for each netif (0 = disabled) + */ +#ifndef LWIP_LOOPBACK_MAX_PBUFS +#define LWIP_LOOPBACK_MAX_PBUFS 0 +#endif + +/** + * LWIP_NETIF_LOOPBACK_MULTITHREADING: Indicates whether threading is enabled in + * the system, as netifs must change how they behave depending on this setting + * for the LWIP_NETIF_LOOPBACK option to work. + * Setting this is needed to avoid reentering non-reentrant functions like + * tcp_input(). + * LWIP_NETIF_LOOPBACK_MULTITHREADING==1: Indicates that the user is using a + * multithreaded environment like tcpip.c. In this case, netif->input() + * is called directly. + * LWIP_NETIF_LOOPBACK_MULTITHREADING==0: Indicates a polling (or NO_SYS) setup. + * The packets are put on a list and netif_poll() must be called in + * the main application loop. + */ +#ifndef LWIP_NETIF_LOOPBACK_MULTITHREADING +#define LWIP_NETIF_LOOPBACK_MULTITHREADING (!NO_SYS) +#endif + +/** + * LWIP_NETIF_TX_SINGLE_PBUF: if this is set to 1, lwIP tries to put all data + * to be sent into one single pbuf. This is for compatibility with DMA-enabled + * MACs that do not support scatter-gather. + * Beware that this might involve CPU-memcpy before transmitting that would not + * be needed without this flag! Use this only if you need to! + * + * @todo: TCP and IP-frag do not work with this, yet: + */ +#ifndef LWIP_NETIF_TX_SINGLE_PBUF +#define LWIP_NETIF_TX_SINGLE_PBUF 0 +#endif /* LWIP_NETIF_TX_SINGLE_PBUF */ + +/* + ------------------------------------ + ---------- LOOPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_LOOPIF==1: Support loop interface (127.0.0.1) and loopif.c + */ +#ifndef LWIP_HAVE_LOOPIF +#define LWIP_HAVE_LOOPIF 0 +#endif + +/* + ------------------------------------ + ---------- SLIPIF options ---------- + ------------------------------------ +*/ +/** + * LWIP_HAVE_SLIPIF==1: Support slip interface and slipif.c + */ +#ifndef LWIP_HAVE_SLIPIF +#define LWIP_HAVE_SLIPIF 0 +#endif + +/* + ------------------------------------ + ---------- Thread options ---------- + ------------------------------------ +*/ +/** + * TCPIP_THREAD_NAME: The name assigned to the main tcpip thread. + */ +#ifndef TCPIP_THREAD_NAME +#define TCPIP_THREAD_NAME "tcpip_thread" +#endif + +/** + * TCPIP_THREAD_STACKSIZE: The stack size used by the main tcpip thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_STACKSIZE +#define TCPIP_THREAD_STACKSIZE 0 +#endif + +/** + * TCPIP_THREAD_PRIO: The priority assigned to the main tcpip thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef TCPIP_THREAD_PRIO +#define TCPIP_THREAD_PRIO 1 +#endif + +/** + * TCPIP_MBOX_SIZE: The mailbox size for the tcpip thread messages + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when tcpip_init is called. + */ +#ifndef TCPIP_MBOX_SIZE +#define TCPIP_MBOX_SIZE 0 +#endif + +/** + * SLIPIF_THREAD_NAME: The name assigned to the slipif_loop thread. + */ +#ifndef SLIPIF_THREAD_NAME +#define SLIPIF_THREAD_NAME "slipif_loop" +#endif + +/** + * SLIP_THREAD_STACKSIZE: The stack size used by the slipif_loop thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_STACKSIZE +#define SLIPIF_THREAD_STACKSIZE 0 +#endif + +/** + * SLIPIF_THREAD_PRIO: The priority assigned to the slipif_loop thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef SLIPIF_THREAD_PRIO +#define SLIPIF_THREAD_PRIO 1 +#endif + +/** + * PPP_THREAD_NAME: The name assigned to the pppMain thread. + */ +#ifndef PPP_THREAD_NAME +#define PPP_THREAD_NAME "pppMain" +#endif + +/** + * PPP_THREAD_STACKSIZE: The stack size used by the pppMain thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_STACKSIZE +#define PPP_THREAD_STACKSIZE 0 +#endif + +/** + * PPP_THREAD_PRIO: The priority assigned to the pppMain thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef PPP_THREAD_PRIO +#define PPP_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_THREAD_NAME: The name assigned to any other lwIP thread. + */ +#ifndef DEFAULT_THREAD_NAME +#define DEFAULT_THREAD_NAME "lwIP" +#endif + +/** + * DEFAULT_THREAD_STACKSIZE: The stack size used by any other lwIP thread. + * The stack size value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_STACKSIZE +#define DEFAULT_THREAD_STACKSIZE 0 +#endif + +/** + * DEFAULT_THREAD_PRIO: The priority assigned to any other lwIP thread. + * The priority value itself is platform-dependent, but is passed to + * sys_thread_new() when the thread is created. + */ +#ifndef DEFAULT_THREAD_PRIO +#define DEFAULT_THREAD_PRIO 1 +#endif + +/** + * DEFAULT_RAW_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_RAW. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_RAW_RECVMBOX_SIZE +#define DEFAULT_RAW_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_UDP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_UDP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_UDP_RECVMBOX_SIZE +#define DEFAULT_UDP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_TCP_RECVMBOX_SIZE: The mailbox size for the incoming packets on a + * NETCONN_TCP. The queue size value itself is platform-dependent, but is passed + * to sys_mbox_new() when the recvmbox is created. + */ +#ifndef DEFAULT_TCP_RECVMBOX_SIZE +#define DEFAULT_TCP_RECVMBOX_SIZE 0 +#endif + +/** + * DEFAULT_ACCEPTMBOX_SIZE: The mailbox size for the incoming connections. + * The queue size value itself is platform-dependent, but is passed to + * sys_mbox_new() when the acceptmbox is created. + */ +#ifndef DEFAULT_ACCEPTMBOX_SIZE +#define DEFAULT_ACCEPTMBOX_SIZE 0 +#endif + +/* + ---------------------------------------------- + ---------- Sequential layer options ---------- + ---------------------------------------------- +*/ +/** + * LWIP_TCPIP_CORE_LOCKING: (EXPERIMENTAL!) + * Don't use it if you're not an active lwIP project member + */ +#ifndef LWIP_TCPIP_CORE_LOCKING +#define LWIP_TCPIP_CORE_LOCKING 0 +#endif + +/** + * LWIP_NETCONN==1: Enable Netconn API (require to use api_lib.c) + */ +#ifndef LWIP_NETCONN +#define LWIP_NETCONN 1 +#endif + +/* + ------------------------------------ + ---------- Socket options ---------- + ------------------------------------ +*/ +/** + * LWIP_SOCKET==1: Enable Socket API (require to use sockets.c) + */ +#ifndef LWIP_SOCKET +#define LWIP_SOCKET 1 +#endif + +/** + * LWIP_COMPAT_SOCKETS==1: Enable BSD-style sockets functions names. + * (only used if you use sockets.c) + */ +#ifndef LWIP_COMPAT_SOCKETS +#define LWIP_COMPAT_SOCKETS 1 +#endif + +/** + * LWIP_POSIX_SOCKETS_IO_NAMES==1: Enable POSIX-style sockets functions names. + * Disable this option if you use a POSIX operating system that uses the same + * names (read, write & close). (only used if you use sockets.c) + */ +#ifndef LWIP_POSIX_SOCKETS_IO_NAMES +#define LWIP_POSIX_SOCKETS_IO_NAMES 1 +#endif + +/** + * LWIP_TCP_KEEPALIVE==1: Enable TCP_KEEPIDLE, TCP_KEEPINTVL and TCP_KEEPCNT + * options processing. Note that TCP_KEEPIDLE and TCP_KEEPINTVL have to be set + * in seconds. (does not require sockets.c, and will affect tcp.c) + */ +#ifndef LWIP_TCP_KEEPALIVE +#define LWIP_TCP_KEEPALIVE 0 +#endif + +/** + * LWIP_SO_RCVTIMEO==1: Enable SO_RCVTIMEO processing. + */ +#ifndef LWIP_SO_RCVTIMEO +#define LWIP_SO_RCVTIMEO 0 +#endif + +/** + * LWIP_SO_RCVBUF==1: Enable SO_RCVBUF processing. + */ +#ifndef LWIP_SO_RCVBUF +#define LWIP_SO_RCVBUF 0 +#endif + +/** + * If LWIP_SO_RCVBUF is used, this is the default value for recv_bufsize. + */ +#ifndef RECV_BUFSIZE_DEFAULT +#define RECV_BUFSIZE_DEFAULT INT_MAX +#endif + +/** + * SO_REUSE==1: Enable SO_REUSEADDR and SO_REUSEPORT options. DO NOT USE! + */ +#ifndef SO_REUSE +#define SO_REUSE 0 +#endif + +/* + ---------------------------------------- + ---------- Statistics options ---------- + ---------------------------------------- +*/ +/** + * LWIP_STATS==1: Enable statistics collection in lwip_stats. + */ +#ifndef LWIP_STATS +#define LWIP_STATS 1 +#endif + +#if LWIP_STATS + +/** + * LWIP_STATS_DISPLAY==1: Compile in the statistics output functions. + */ +#ifndef LWIP_STATS_DISPLAY +#define LWIP_STATS_DISPLAY 0 +#endif + +/** + * LINK_STATS==1: Enable link stats. + */ +#ifndef LINK_STATS +#define LINK_STATS 1 +#endif + +/** + * ETHARP_STATS==1: Enable etharp stats. + */ +#ifndef ETHARP_STATS +#define ETHARP_STATS (LWIP_ARP) +#endif + +/** + * IP_STATS==1: Enable IP stats. + */ +#ifndef IP_STATS +#define IP_STATS 1 +#endif + +/** + * IPFRAG_STATS==1: Enable IP fragmentation stats. Default is + * on if using either frag or reass. + */ +#ifndef IPFRAG_STATS +#define IPFRAG_STATS (IP_REASSEMBLY || IP_FRAG) +#endif + +/** + * ICMP_STATS==1: Enable ICMP stats. + */ +#ifndef ICMP_STATS +#define ICMP_STATS 1 +#endif + +/** + * IGMP_STATS==1: Enable IGMP stats. + */ +#ifndef IGMP_STATS +#define IGMP_STATS (LWIP_IGMP) +#endif + +/** + * UDP_STATS==1: Enable UDP stats. Default is on if + * UDP enabled, otherwise off. + */ +#ifndef UDP_STATS +#define UDP_STATS (LWIP_UDP) +#endif + +/** + * TCP_STATS==1: Enable TCP stats. Default is on if TCP + * enabled, otherwise off. + */ +#ifndef TCP_STATS +#define TCP_STATS (LWIP_TCP) +#endif + +/** + * MEM_STATS==1: Enable mem.c stats. + */ +#ifndef MEM_STATS +#define MEM_STATS ((MEM_LIBC_MALLOC == 0) && (MEM_USE_POOLS == 0)) +#endif + +/** + * MEMP_STATS==1: Enable memp.c pool stats. + */ +#ifndef MEMP_STATS +#define MEMP_STATS (MEMP_MEM_MALLOC == 0) +#endif + +/** + * SYS_STATS==1: Enable system stats (sem and mbox counts, etc). + */ +#ifndef SYS_STATS +#define SYS_STATS (NO_SYS == 0) +#endif + +#else + +#define LINK_STATS 0 +#define IP_STATS 0 +#define IPFRAG_STATS 0 +#define ICMP_STATS 0 +#define IGMP_STATS 0 +#define UDP_STATS 0 +#define TCP_STATS 0 +#define MEM_STATS 0 +#define MEMP_STATS 0 +#define SYS_STATS 0 +#define LWIP_STATS_DISPLAY 0 + +#endif /* LWIP_STATS */ + +/* + --------------------------------- + ---------- PPP options ---------- + --------------------------------- +*/ +/** + * PPP_SUPPORT==1: Enable PPP. + */ +#ifndef PPP_SUPPORT +#define PPP_SUPPORT 0 +#endif + +/** + * PPPOE_SUPPORT==1: Enable PPP Over Ethernet + */ +#ifndef PPPOE_SUPPORT +#define PPPOE_SUPPORT 0 +#endif + +/** + * PPPOS_SUPPORT==1: Enable PPP Over Serial + */ +#ifndef PPPOS_SUPPORT +#define PPPOS_SUPPORT PPP_SUPPORT +#endif + +#if PPP_SUPPORT + +/** + * NUM_PPP: Max PPP sessions. + */ +#ifndef NUM_PPP +#define NUM_PPP 1 +#endif + +/** + * PAP_SUPPORT==1: Support PAP. + */ +#ifndef PAP_SUPPORT +#define PAP_SUPPORT 0 +#endif + +/** + * CHAP_SUPPORT==1: Support CHAP. + */ +#ifndef CHAP_SUPPORT +#define CHAP_SUPPORT 0 +#endif + +/** + * MSCHAP_SUPPORT==1: Support MSCHAP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef MSCHAP_SUPPORT +#define MSCHAP_SUPPORT 0 +#endif + +/** + * CBCP_SUPPORT==1: Support CBCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CBCP_SUPPORT +#define CBCP_SUPPORT 0 +#endif + +/** + * CCP_SUPPORT==1: Support CCP. CURRENTLY NOT SUPPORTED! DO NOT SET! + */ +#ifndef CCP_SUPPORT +#define CCP_SUPPORT 0 +#endif + +/** + * VJ_SUPPORT==1: Support VJ header compression. + */ +#ifndef VJ_SUPPORT +#define VJ_SUPPORT 0 +#endif + +/** + * MD5_SUPPORT==1: Support MD5 (see also CHAP). + */ +#ifndef MD5_SUPPORT +#define MD5_SUPPORT 0 +#endif + +/* + * Timeouts + */ +#ifndef FSM_DEFTIMEOUT +#define FSM_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef FSM_DEFMAXTERMREQS +#define FSM_DEFMAXTERMREQS 2 /* Maximum Terminate-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXCONFREQS +#define FSM_DEFMAXCONFREQS 10 /* Maximum Configure-Request transmissions */ +#endif + +#ifndef FSM_DEFMAXNAKLOOPS +#define FSM_DEFMAXNAKLOOPS 5 /* Maximum number of nak loops */ +#endif + +#ifndef UPAP_DEFTIMEOUT +#define UPAP_DEFTIMEOUT 6 /* Timeout (seconds) for retransmitting req */ +#endif + +#ifndef UPAP_DEFREQTIME +#define UPAP_DEFREQTIME 30 /* Time to wait for auth-req from peer */ +#endif + +#ifndef CHAP_DEFTIMEOUT +#define CHAP_DEFTIMEOUT 6 /* Timeout time in seconds */ +#endif + +#ifndef CHAP_DEFTRANSMITS +#define CHAP_DEFTRANSMITS 10 /* max # times to send challenge */ +#endif + +/* Interval in seconds between keepalive echo requests, 0 to disable. */ +#ifndef LCP_ECHOINTERVAL +#define LCP_ECHOINTERVAL 0 +#endif + +/* Number of unanswered echo requests before failure. */ +#ifndef LCP_MAXECHOFAILS +#define LCP_MAXECHOFAILS 3 +#endif + +/* Max Xmit idle time (in jiffies) before resend flag char. */ +#ifndef PPP_MAXIDLEFLAG +#define PPP_MAXIDLEFLAG 100 +#endif + +/* + * Packet sizes + * + * Note - lcp shouldn't be allowed to negotiate stuff outside these + * limits. See lcp.h in the pppd directory. + * (XXX - these constants should simply be shared by lcp.c instead + * of living in lcp.h) + */ +#define PPP_MTU 1500 /* Default MTU (size of Info field) */ +#ifndef PPP_MAXMTU +/* #define PPP_MAXMTU 65535 - (PPP_HDRLEN + PPP_FCSLEN) */ +#define PPP_MAXMTU 1500 /* Largest MTU we allow */ +#endif +#define PPP_MINMTU 64 +#define PPP_MRU 1500 /* default MRU = max length of info field */ +#define PPP_MAXMRU 1500 /* Largest MRU we allow */ +#ifndef PPP_DEFMRU +#define PPP_DEFMRU 296 /* Try for this */ +#endif +#define PPP_MINMRU 128 /* No MRUs below this */ + +#ifndef MAXNAMELEN +#define MAXNAMELEN 256 /* max length of hostname or name for auth */ +#endif +#ifndef MAXSECRETLEN +#define MAXSECRETLEN 256 /* max length of password or secret */ +#endif + +#endif /* PPP_SUPPORT */ + +/* + -------------------------------------- + ---------- Checksum options ---------- + -------------------------------------- +*/ +/** + * CHECKSUM_GEN_IP==1: Generate checksums in software for outgoing IP packets. + */ +#ifndef CHECKSUM_GEN_IP +#define CHECKSUM_GEN_IP 1 +#endif + +/** + * CHECKSUM_GEN_UDP==1: Generate checksums in software for outgoing UDP packets. + */ +#ifndef CHECKSUM_GEN_UDP +#define CHECKSUM_GEN_UDP 1 +#endif + +/** + * CHECKSUM_GEN_TCP==1: Generate checksums in software for outgoing TCP packets. + */ +#ifndef CHECKSUM_GEN_TCP +#define CHECKSUM_GEN_TCP 1 +#endif + +/** + * CHECKSUM_CHECK_IP==1: Check checksums in software for incoming IP packets. + */ +#ifndef CHECKSUM_CHECK_IP +#define CHECKSUM_CHECK_IP 1 +#endif + +/** + * CHECKSUM_CHECK_UDP==1: Check checksums in software for incoming UDP packets. + */ +#ifndef CHECKSUM_CHECK_UDP +#define CHECKSUM_CHECK_UDP 1 +#endif + +/** + * CHECKSUM_CHECK_TCP==1: Check checksums in software for incoming TCP packets. + */ +#ifndef CHECKSUM_CHECK_TCP +#define CHECKSUM_CHECK_TCP 1 +#endif + +/* + --------------------------------------- + ---------- Debugging options ---------- + --------------------------------------- +*/ +/** + * LWIP_DBG_MIN_LEVEL: After masking, the value of the debug is + * compared against this value. If it is smaller, then debugging + * messages are written. + */ +#ifndef LWIP_DBG_MIN_LEVEL +#define LWIP_DBG_MIN_LEVEL LWIP_DBG_LEVEL_ALL +#endif + +/** + * LWIP_DBG_TYPES_ON: A mask that can be used to globally enable/disable + * debug messages of certain types. + */ +#ifndef LWIP_DBG_TYPES_ON +#define LWIP_DBG_TYPES_ON LWIP_DBG_ON +#endif + +/** + * ETHARP_DEBUG: Enable debugging in etharp.c. + */ +#ifndef ETHARP_DEBUG +#define ETHARP_DEBUG LWIP_DBG_OFF +#endif + +/** + * NETIF_DEBUG: Enable debugging in netif.c. + */ +#ifndef NETIF_DEBUG +#define NETIF_DEBUG LWIP_DBG_OFF +#endif + +/** + * PBUF_DEBUG: Enable debugging in pbuf.c. + */ +#ifndef PBUF_DEBUG +#define PBUF_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_LIB_DEBUG: Enable debugging in api_lib.c. + */ +#ifndef API_LIB_DEBUG +#define API_LIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * API_MSG_DEBUG: Enable debugging in api_msg.c. + */ +#ifndef API_MSG_DEBUG +#define API_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SOCKETS_DEBUG: Enable debugging in sockets.c. + */ +#ifndef SOCKETS_DEBUG +#define SOCKETS_DEBUG LWIP_DBG_OFF +#endif + +/** + * ICMP_DEBUG: Enable debugging in icmp.c. + */ +#ifndef ICMP_DEBUG +#define ICMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IGMP_DEBUG: Enable debugging in igmp.c. + */ +#ifndef IGMP_DEBUG +#define IGMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * INET_DEBUG: Enable debugging in inet.c. + */ +#ifndef INET_DEBUG +#define INET_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_DEBUG: Enable debugging for IP. + */ +#ifndef IP_DEBUG +#define IP_DEBUG LWIP_DBG_OFF +#endif + +/** + * IP_REASS_DEBUG: Enable debugging in ip_frag.c for both frag & reass. + */ +#ifndef IP_REASS_DEBUG +#define IP_REASS_DEBUG LWIP_DBG_OFF +#endif + +/** + * RAW_DEBUG: Enable debugging in raw.c. + */ +#ifndef RAW_DEBUG +#define RAW_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEM_DEBUG: Enable debugging in mem.c. + */ +#ifndef MEM_DEBUG +#define MEM_DEBUG LWIP_DBG_OFF +#endif + +/** + * MEMP_DEBUG: Enable debugging in memp.c. + */ +#ifndef MEMP_DEBUG +#define MEMP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SYS_DEBUG: Enable debugging in sys.c. + */ +#ifndef SYS_DEBUG +#define SYS_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_DEBUG: Enable debugging for TCP. + */ +#ifndef TCP_DEBUG +#define TCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_INPUT_DEBUG: Enable debugging in tcp_in.c for incoming debug. + */ +#ifndef TCP_INPUT_DEBUG +#define TCP_INPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_FR_DEBUG: Enable debugging in tcp_in.c for fast retransmit. + */ +#ifndef TCP_FR_DEBUG +#define TCP_FR_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RTO_DEBUG: Enable debugging in TCP for retransmit + * timeout. + */ +#ifndef TCP_RTO_DEBUG +#define TCP_RTO_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_CWND_DEBUG: Enable debugging for TCP congestion window. + */ +#ifndef TCP_CWND_DEBUG +#define TCP_CWND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_WND_DEBUG: Enable debugging in tcp_in.c for window updating. + */ +#ifndef TCP_WND_DEBUG +#define TCP_WND_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_OUTPUT_DEBUG: Enable debugging in tcp_out.c output functions. + */ +#ifndef TCP_OUTPUT_DEBUG +#define TCP_OUTPUT_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_RST_DEBUG: Enable debugging for TCP with the RST message. + */ +#ifndef TCP_RST_DEBUG +#define TCP_RST_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCP_QLEN_DEBUG: Enable debugging for TCP queue lengths. + */ +#ifndef TCP_QLEN_DEBUG +#define TCP_QLEN_DEBUG LWIP_DBG_OFF +#endif + +/** + * UDP_DEBUG: Enable debugging in UDP. + */ +#ifndef UDP_DEBUG +#define UDP_DEBUG LWIP_DBG_OFF +#endif + +/** + * TCPIP_DEBUG: Enable debugging in tcpip.c. + */ +#ifndef TCPIP_DEBUG +#define TCPIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * PPP_DEBUG: Enable debugging for PPP. + */ +#ifndef PPP_DEBUG +#define PPP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SLIP_DEBUG: Enable debugging in slipif.c. + */ +#ifndef SLIP_DEBUG +#define SLIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * DHCP_DEBUG: Enable debugging in dhcp.c. + */ +#ifndef DHCP_DEBUG +#define DHCP_DEBUG LWIP_DBG_OFF +#endif + +/** + * AUTOIP_DEBUG: Enable debugging in autoip.c. + */ +#ifndef AUTOIP_DEBUG +#define AUTOIP_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MSG_DEBUG: Enable debugging for SNMP messages. + */ +#ifndef SNMP_MSG_DEBUG +#define SNMP_MSG_DEBUG LWIP_DBG_OFF +#endif + +/** + * SNMP_MIB_DEBUG: Enable debugging for SNMP MIBs. + */ +#ifndef SNMP_MIB_DEBUG +#define SNMP_MIB_DEBUG LWIP_DBG_OFF +#endif + +/** + * DNS_DEBUG: Enable debugging for DNS. + */ +#ifndef DNS_DEBUG +#define DNS_DEBUG LWIP_DBG_OFF +#endif + +#endif /* __LWIP_OPT_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/pbuf.h b/bertos/net/lwip/src/include/lwip/pbuf.h new file mode 100644 index 0000000..8380f65 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/pbuf.h @@ -0,0 +1,120 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#ifndef __LWIP_PBUF_H__ +#define __LWIP_PBUF_H__ + +#include "lwip/opt.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define PBUF_TRANSPORT_HLEN 20 +#define PBUF_IP_HLEN 20 + +typedef enum { + PBUF_TRANSPORT, + PBUF_IP, + PBUF_LINK, + PBUF_RAW +} pbuf_layer; + +typedef enum { + PBUF_RAM, /* pbuf data is stored in RAM */ + PBUF_ROM, /* pbuf data is stored in ROM */ + PBUF_REF, /* pbuf comes from the pbuf pool */ + PBUF_POOL /* pbuf payload refers to RAM */ +} pbuf_type; + + +/** indicates this packet's data should be immediately passed to the application */ +#define PBUF_FLAG_PUSH 0x01U + +struct pbuf { + /** next pbuf in singly linked pbuf chain */ + struct pbuf *next; + + /** pointer to the actual data in the buffer */ + void *payload; + + /** + * total length of this buffer and all next buffers in chain + * belonging to the same packet. + * + * For non-queue packet chains this is the invariant: + * p->tot_len == p->len + (p->next? p->next->tot_len: 0) + */ + u16_t tot_len; + + /** length of this buffer */ + u16_t len; + + /** pbuf_type as u8_t instead of enum to save space */ + u8_t /*pbuf_type*/ type; + + /** misc flags */ + u8_t flags; + + /** + * the reference count always equals the number of pointers + * that refer to this pbuf. This can be pointers from an application, + * the stack itself, or pbuf->next pointers from a chain. + */ + u16_t ref; + +}; + +/* Initializes the pbuf module. This call is empty for now, but may not be in future. */ +#define pbuf_init() + +struct pbuf *pbuf_alloc(pbuf_layer l, u16_t size, pbuf_type type); +void pbuf_realloc(struct pbuf *p, u16_t size); +u8_t pbuf_header(struct pbuf *p, s16_t header_size); +void pbuf_ref(struct pbuf *p); +void pbuf_ref_chain(struct pbuf *p); +u8_t pbuf_free(struct pbuf *p); +u8_t pbuf_clen(struct pbuf *p); +void pbuf_cat(struct pbuf *head, struct pbuf *tail); +void pbuf_chain(struct pbuf *head, struct pbuf *tail); +struct pbuf *pbuf_dechain(struct pbuf *p); +err_t pbuf_copy(struct pbuf *p_to, struct pbuf *p_from); +u16_t pbuf_copy_partial(struct pbuf *p, void *dataptr, u16_t len, u16_t offset); +err_t pbuf_take(struct pbuf *buf, const void *dataptr, u16_t len); +struct pbuf *pbuf_coalesce(struct pbuf *p, pbuf_layer layer); + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_PBUF_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/raw.h b/bertos/net/lwip/src/include/lwip/raw.h new file mode 100644 index 0000000..20b0a11 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/raw.h @@ -0,0 +1,97 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_RAW_H__ +#define __LWIP_RAW_H__ + +#include "lwip/opt.h" + +#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/inet.h" +#include "lwip/ip.h" +#include "lwip/ip_addr.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct raw_pcb { +/* Common members of all PCB types */ + IP_PCB; + + struct raw_pcb *next; + + u8_t protocol; + + /* receive callback function + * @param arg user supplied argument (raw_pcb.recv_arg) + * @param pcb the raw_pcb which received data + * @param p the packet buffer that was received + * @param addr the remote IP address from which the packet was received + * @return 1 if the packet was 'eaten' (aka. deleted), + * 0 if the packet lives on + * If returning 1, the callback is responsible for freeing the pbuf + * if it's not used any more. + */ + u8_t (* recv)(void *arg, struct raw_pcb *pcb, struct pbuf *p, + struct ip_addr *addr); + /* user-supplied argument for the recv callback */ + void *recv_arg; +}; + +/* The following functions is the application layer interface to the + RAW code. */ +struct raw_pcb * raw_new (u8_t proto); +void raw_remove (struct raw_pcb *pcb); +err_t raw_bind (struct raw_pcb *pcb, struct ip_addr *ipaddr); +err_t raw_connect (struct raw_pcb *pcb, struct ip_addr *ipaddr); + +void raw_recv (struct raw_pcb *pcb, + u8_t (* recv)(void *arg, struct raw_pcb *pcb, + struct pbuf *p, + struct ip_addr *addr), + void *recv_arg); +err_t raw_sendto (struct raw_pcb *pcb, struct pbuf *p, struct ip_addr *ipaddr); +err_t raw_send (struct raw_pcb *pcb, struct pbuf *p); + +/* The following functions are the lower layer interface to RAW. */ +u8_t raw_input (struct pbuf *p, struct netif *inp); +#define raw_init() /* Compatibility define, not init needed. */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_RAW */ + +#endif /* __LWIP_RAW_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/sio.h b/bertos/net/lwip/src/include/lwip/sio.h new file mode 100644 index 0000000..28ae2f2 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/sio.h @@ -0,0 +1,141 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + */ + +/* + * This is the interface to the platform specific serial IO module + * It needs to be implemented by those platforms which need SLIP or PPP + */ + +#ifndef __SIO_H__ +#define __SIO_H__ + +#include "lwip/arch.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* If you want to define sio_fd_t elsewhere or differently, + define this in your cc.h file. */ +#ifndef __sio_fd_t_defined +typedef void * sio_fd_t; +#endif + +/* The following functions can be defined to something else in your cc.h file + or be implemented in your custom sio.c file. */ + +#ifndef sio_open +/** + * Opens a serial device for communication. + * + * @param devnum device number + * @return handle to serial device if successful, NULL otherwise + */ +sio_fd_t sio_open(u8_t devnum); +#endif + +#ifndef sio_send +/** + * Sends a single character to the serial device. + * + * @param c character to send + * @param fd serial device handle + * + * @note This function will block until the character can be sent. + */ +void sio_send(u8_t c, sio_fd_t fd); +#endif + +#ifndef sio_recv +/** + * Receives a single character from the serial device. + * + * @param fd serial device handle + * + * @note This function will block until a character is received. + */ +u8_t sio_recv(sio_fd_t fd); +#endif + +#ifndef sio_read +/** + * Reads from the serial device. + * + * @param fd serial device handle + * @param data pointer to data buffer for receiving + * @param len maximum length (in bytes) of data to receive + * @return number of bytes actually received - may be 0 if aborted by sio_read_abort + * + * @note This function will block until data can be received. The blocking + * can be cancelled by calling sio_read_abort(). + */ +u32_t sio_read(sio_fd_t fd, u8_t *data, u32_t len); +#endif + +#ifndef sio_tryread +/** + * Tries to read from the serial device. Same as sio_read but returns + * immediately if no data is available and never blocks. + * + * @param fd serial device handle + * @param data pointer to data buffer for receiving + * @param len maximum length (in bytes) of data to receive + * @return number of bytes actually received + */ +u32_t sio_tryread(sio_fd_t fd, u8_t *data, u32_t len); +#endif + +#ifndef sio_write +/** + * Writes to the serial device. + * + * @param fd serial device handle + * @param data pointer to data to send + * @param len length (in bytes) of data to send + * @return number of bytes actually sent + * + * @note This function will block until all data can be sent. + */ +u32_t sio_write(sio_fd_t fd, u8_t *data, u32_t len); +#endif + +#ifndef sio_read_abort +/** + * Aborts a blocking sio_read() call. + * + * @param fd serial device handle + */ +void sio_read_abort(sio_fd_t fd); +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* __SIO_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/snmp.h b/bertos/net/lwip/src/include/lwip/snmp.h new file mode 100644 index 0000000..dd03d5d --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/snmp.h @@ -0,0 +1,364 @@ +/* + * Copyright (c) 2001, 2002 Leon Woestenberg + * Copyright (c) 2001, 2002 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Leon Woestenberg + * + */ +#ifndef __LWIP_SNMP_H__ +#define __LWIP_SNMP_H__ + +#include "lwip/opt.h" +#include "lwip/netif.h" +#include "lwip/udp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * @see RFC1213, "MIB-II, 6. Definitions" + */ +enum snmp_ifType { + snmp_ifType_other=1, /* none of the following */ + snmp_ifType_regular1822, + snmp_ifType_hdh1822, + snmp_ifType_ddn_x25, + snmp_ifType_rfc877_x25, + snmp_ifType_ethernet_csmacd, + snmp_ifType_iso88023_csmacd, + snmp_ifType_iso88024_tokenBus, + snmp_ifType_iso88025_tokenRing, + snmp_ifType_iso88026_man, + snmp_ifType_starLan, + snmp_ifType_proteon_10Mbit, + snmp_ifType_proteon_80Mbit, + snmp_ifType_hyperchannel, + snmp_ifType_fddi, + snmp_ifType_lapb, + snmp_ifType_sdlc, + snmp_ifType_ds1, /* T-1 */ + snmp_ifType_e1, /* european equiv. of T-1 */ + snmp_ifType_basicISDN, + snmp_ifType_primaryISDN, /* proprietary serial */ + snmp_ifType_propPointToPointSerial, + snmp_ifType_ppp, + snmp_ifType_softwareLoopback, + snmp_ifType_eon, /* CLNP over IP [11] */ + snmp_ifType_ethernet_3Mbit, + snmp_ifType_nsip, /* XNS over IP */ + snmp_ifType_slip, /* generic SLIP */ + snmp_ifType_ultra, /* ULTRA technologies */ + snmp_ifType_ds3, /* T-3 */ + snmp_ifType_sip, /* SMDS */ + snmp_ifType_frame_relay +}; + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +/** SNMP "sysuptime" Interval */ +#define SNMP_SYSUPTIME_INTERVAL 10 + +/** fixed maximum length for object identifier type */ +#define LWIP_SNMP_OBJ_ID_LEN 32 + +/** internal object identifier representation */ +struct snmp_obj_id +{ + u8_t len; + s32_t id[LWIP_SNMP_OBJ_ID_LEN]; +}; + +/* system */ +void snmp_set_sysdesr(u8_t* str, u8_t* len); +void snmp_set_sysobjid(struct snmp_obj_id *oid); +void snmp_get_sysobjid_ptr(struct snmp_obj_id **oid); +void snmp_inc_sysuptime(void); +void snmp_add_sysuptime(u32_t value); +void snmp_get_sysuptime(u32_t *value); +void snmp_set_syscontact(u8_t *ocstr, u8_t *ocstrlen); +void snmp_set_sysname(u8_t *ocstr, u8_t *ocstrlen); +void snmp_set_syslocation(u8_t *ocstr, u8_t *ocstrlen); + +/* network interface */ +void snmp_add_ifinoctets(struct netif *ni, u32_t value); +void snmp_inc_ifinucastpkts(struct netif *ni); +void snmp_inc_ifinnucastpkts(struct netif *ni); +void snmp_inc_ifindiscards(struct netif *ni); +void snmp_add_ifoutoctets(struct netif *ni, u32_t value); +void snmp_inc_ifoutucastpkts(struct netif *ni); +void snmp_inc_ifoutnucastpkts(struct netif *ni); +void snmp_inc_ifoutdiscards(struct netif *ni); +void snmp_inc_iflist(void); +void snmp_dec_iflist(void); + +/* ARP (for atTable and ipNetToMediaTable) */ +void snmp_insert_arpidx_tree(struct netif *ni, struct ip_addr *ip); +void snmp_delete_arpidx_tree(struct netif *ni, struct ip_addr *ip); + +/* IP */ +void snmp_inc_ipinreceives(void); +void snmp_inc_ipinhdrerrors(void); +void snmp_inc_ipinaddrerrors(void); +void snmp_inc_ipforwdatagrams(void); +void snmp_inc_ipinunknownprotos(void); +void snmp_inc_ipindiscards(void); +void snmp_inc_ipindelivers(void); +void snmp_inc_ipoutrequests(void); +void snmp_inc_ipoutdiscards(void); +void snmp_inc_ipoutnoroutes(void); +void snmp_inc_ipreasmreqds(void); +void snmp_inc_ipreasmoks(void); +void snmp_inc_ipreasmfails(void); +void snmp_inc_ipfragoks(void); +void snmp_inc_ipfragfails(void); +void snmp_inc_ipfragcreates(void); +void snmp_inc_iproutingdiscards(void); +void snmp_insert_ipaddridx_tree(struct netif *ni); +void snmp_delete_ipaddridx_tree(struct netif *ni); +void snmp_insert_iprteidx_tree(u8_t dflt, struct netif *ni); +void snmp_delete_iprteidx_tree(u8_t dflt, struct netif *ni); + +/* ICMP */ +void snmp_inc_icmpinmsgs(void); +void snmp_inc_icmpinerrors(void); +void snmp_inc_icmpindestunreachs(void); +void snmp_inc_icmpintimeexcds(void); +void snmp_inc_icmpinparmprobs(void); +void snmp_inc_icmpinsrcquenchs(void); +void snmp_inc_icmpinredirects(void); +void snmp_inc_icmpinechos(void); +void snmp_inc_icmpinechoreps(void); +void snmp_inc_icmpintimestamps(void); +void snmp_inc_icmpintimestampreps(void); +void snmp_inc_icmpinaddrmasks(void); +void snmp_inc_icmpinaddrmaskreps(void); +void snmp_inc_icmpoutmsgs(void); +void snmp_inc_icmpouterrors(void); +void snmp_inc_icmpoutdestunreachs(void); +void snmp_inc_icmpouttimeexcds(void); +void snmp_inc_icmpoutparmprobs(void); +void snmp_inc_icmpoutsrcquenchs(void); +void snmp_inc_icmpoutredirects(void); +void snmp_inc_icmpoutechos(void); +void snmp_inc_icmpoutechoreps(void); +void snmp_inc_icmpouttimestamps(void); +void snmp_inc_icmpouttimestampreps(void); +void snmp_inc_icmpoutaddrmasks(void); +void snmp_inc_icmpoutaddrmaskreps(void); + +/* TCP */ +void snmp_inc_tcpactiveopens(void); +void snmp_inc_tcppassiveopens(void); +void snmp_inc_tcpattemptfails(void); +void snmp_inc_tcpestabresets(void); +void snmp_inc_tcpinsegs(void); +void snmp_inc_tcpoutsegs(void); +void snmp_inc_tcpretranssegs(void); +void snmp_inc_tcpinerrs(void); +void snmp_inc_tcpoutrsts(void); + +/* UDP */ +void snmp_inc_udpindatagrams(void); +void snmp_inc_udpnoports(void); +void snmp_inc_udpinerrors(void); +void snmp_inc_udpoutdatagrams(void); +void snmp_insert_udpidx_tree(struct udp_pcb *pcb); +void snmp_delete_udpidx_tree(struct udp_pcb *pcb); + +/* SNMP */ +void snmp_inc_snmpinpkts(void); +void snmp_inc_snmpoutpkts(void); +void snmp_inc_snmpinbadversions(void); +void snmp_inc_snmpinbadcommunitynames(void); +void snmp_inc_snmpinbadcommunityuses(void); +void snmp_inc_snmpinasnparseerrs(void); +void snmp_inc_snmpintoobigs(void); +void snmp_inc_snmpinnosuchnames(void); +void snmp_inc_snmpinbadvalues(void); +void snmp_inc_snmpinreadonlys(void); +void snmp_inc_snmpingenerrs(void); +void snmp_add_snmpintotalreqvars(u8_t value); +void snmp_add_snmpintotalsetvars(u8_t value); +void snmp_inc_snmpingetrequests(void); +void snmp_inc_snmpingetnexts(void); +void snmp_inc_snmpinsetrequests(void); +void snmp_inc_snmpingetresponses(void); +void snmp_inc_snmpintraps(void); +void snmp_inc_snmpouttoobigs(void); +void snmp_inc_snmpoutnosuchnames(void); +void snmp_inc_snmpoutbadvalues(void); +void snmp_inc_snmpoutgenerrs(void); +void snmp_inc_snmpoutgetrequests(void); +void snmp_inc_snmpoutgetnexts(void); +void snmp_inc_snmpoutsetrequests(void); +void snmp_inc_snmpoutgetresponses(void); +void snmp_inc_snmpouttraps(void); +void snmp_get_snmpgrpid_ptr(struct snmp_obj_id **oid); +void snmp_set_snmpenableauthentraps(u8_t *value); +void snmp_get_snmpenableauthentraps(u8_t *value); + +/* LWIP_SNMP support not available */ +/* define everything to be empty */ +#else + +/* system */ +#define snmp_set_sysdesr(str, len) +#define snmp_set_sysobjid(oid); +#define snmp_get_sysobjid_ptr(oid) +#define snmp_inc_sysuptime() +#define snmp_add_sysuptime(value) +#define snmp_get_sysuptime(value) +#define snmp_set_syscontact(ocstr, ocstrlen); +#define snmp_set_sysname(ocstr, ocstrlen); +#define snmp_set_syslocation(ocstr, ocstrlen); + +/* network interface */ +#define snmp_add_ifinoctets(ni,value) +#define snmp_inc_ifinucastpkts(ni) +#define snmp_inc_ifinnucastpkts(ni) +#define snmp_inc_ifindiscards(ni) +#define snmp_add_ifoutoctets(ni,value) +#define snmp_inc_ifoutucastpkts(ni) +#define snmp_inc_ifoutnucastpkts(ni) +#define snmp_inc_ifoutdiscards(ni) +#define snmp_inc_iflist() +#define snmp_dec_iflist() + +/* ARP */ +#define snmp_insert_arpidx_tree(ni,ip) +#define snmp_delete_arpidx_tree(ni,ip) + +/* IP */ +#define snmp_inc_ipinreceives() +#define snmp_inc_ipinhdrerrors() +#define snmp_inc_ipinaddrerrors() +#define snmp_inc_ipforwdatagrams() +#define snmp_inc_ipinunknownprotos() +#define snmp_inc_ipindiscards() +#define snmp_inc_ipindelivers() +#define snmp_inc_ipoutrequests() +#define snmp_inc_ipoutdiscards() +#define snmp_inc_ipoutnoroutes() +#define snmp_inc_ipreasmreqds() +#define snmp_inc_ipreasmoks() +#define snmp_inc_ipreasmfails() +#define snmp_inc_ipfragoks() +#define snmp_inc_ipfragfails() +#define snmp_inc_ipfragcreates() +#define snmp_inc_iproutingdiscards() +#define snmp_insert_ipaddridx_tree(ni) +#define snmp_delete_ipaddridx_tree(ni) +#define snmp_insert_iprteidx_tree(dflt, ni) +#define snmp_delete_iprteidx_tree(dflt, ni) + +/* ICMP */ +#define snmp_inc_icmpinmsgs() +#define snmp_inc_icmpinerrors() +#define snmp_inc_icmpindestunreachs() +#define snmp_inc_icmpintimeexcds() +#define snmp_inc_icmpinparmprobs() +#define snmp_inc_icmpinsrcquenchs() +#define snmp_inc_icmpinredirects() +#define snmp_inc_icmpinechos() +#define snmp_inc_icmpinechoreps() +#define snmp_inc_icmpintimestamps() +#define snmp_inc_icmpintimestampreps() +#define snmp_inc_icmpinaddrmasks() +#define snmp_inc_icmpinaddrmaskreps() +#define snmp_inc_icmpoutmsgs() +#define snmp_inc_icmpouterrors() +#define snmp_inc_icmpoutdestunreachs() +#define snmp_inc_icmpouttimeexcds() +#define snmp_inc_icmpoutparmprobs() +#define snmp_inc_icmpoutsrcquenchs() +#define snmp_inc_icmpoutredirects() +#define snmp_inc_icmpoutechos() +#define snmp_inc_icmpoutechoreps() +#define snmp_inc_icmpouttimestamps() +#define snmp_inc_icmpouttimestampreps() +#define snmp_inc_icmpoutaddrmasks() +#define snmp_inc_icmpoutaddrmaskreps() +/* TCP */ +#define snmp_inc_tcpactiveopens() +#define snmp_inc_tcppassiveopens() +#define snmp_inc_tcpattemptfails() +#define snmp_inc_tcpestabresets() +#define snmp_inc_tcpinsegs() +#define snmp_inc_tcpoutsegs() +#define snmp_inc_tcpretranssegs() +#define snmp_inc_tcpinerrs() +#define snmp_inc_tcpoutrsts() + +/* UDP */ +#define snmp_inc_udpindatagrams() +#define snmp_inc_udpnoports() +#define snmp_inc_udpinerrors() +#define snmp_inc_udpoutdatagrams() +#define snmp_insert_udpidx_tree(pcb) +#define snmp_delete_udpidx_tree(pcb) + +/* SNMP */ +#define snmp_inc_snmpinpkts() +#define snmp_inc_snmpoutpkts() +#define snmp_inc_snmpinbadversions() +#define snmp_inc_snmpinbadcommunitynames() +#define snmp_inc_snmpinbadcommunityuses() +#define snmp_inc_snmpinasnparseerrs() +#define snmp_inc_snmpintoobigs() +#define snmp_inc_snmpinnosuchnames() +#define snmp_inc_snmpinbadvalues() +#define snmp_inc_snmpinreadonlys() +#define snmp_inc_snmpingenerrs() +#define snmp_add_snmpintotalreqvars(value) +#define snmp_add_snmpintotalsetvars(value) +#define snmp_inc_snmpingetrequests() +#define snmp_inc_snmpingetnexts() +#define snmp_inc_snmpinsetrequests() +#define snmp_inc_snmpingetresponses() +#define snmp_inc_snmpintraps() +#define snmp_inc_snmpouttoobigs() +#define snmp_inc_snmpoutnosuchnames() +#define snmp_inc_snmpoutbadvalues() +#define snmp_inc_snmpoutgenerrs() +#define snmp_inc_snmpoutgetrequests() +#define snmp_inc_snmpoutgetnexts() +#define snmp_inc_snmpoutsetrequests() +#define snmp_inc_snmpoutgetresponses() +#define snmp_inc_snmpouttraps() +#define snmp_get_snmpgrpid_ptr(oid) +#define snmp_set_snmpenableauthentraps(value) +#define snmp_get_snmpenableauthentraps(value) + +#endif /* LWIP_SNMP */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_SNMP_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/snmp_asn1.h b/bertos/net/lwip/src/include/lwip/snmp_asn1.h new file mode 100644 index 0000000..8a60288 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/snmp_asn1.h @@ -0,0 +1,101 @@ +/** + * @file + * Abstract Syntax Notation One (ISO 8824, 8825) codec. + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#ifndef __LWIP_SNMP_ASN1_H__ +#define __LWIP_SNMP_ASN1_H__ + +#include "lwip/opt.h" +#include "lwip/err.h" +#include "lwip/pbuf.h" +#include "lwip/snmp.h" + +#if LWIP_SNMP + +#ifdef __cplusplus +extern "C" { +#endif + +#define SNMP_ASN1_UNIV (!0x80 | !0x40) +#define SNMP_ASN1_APPLIC (!0x80 | 0x40) +#define SNMP_ASN1_CONTXT ( 0x80 | !0x40) + +#define SNMP_ASN1_CONSTR (0x20) +#define SNMP_ASN1_PRIMIT (!0x20) + +/* universal tags */ +#define SNMP_ASN1_INTEG 2 +#define SNMP_ASN1_OC_STR 4 +#define SNMP_ASN1_NUL 5 +#define SNMP_ASN1_OBJ_ID 6 +#define SNMP_ASN1_SEQ 16 + +/* application specific (SNMP) tags */ +#define SNMP_ASN1_IPADDR 0 /* octet string size(4) */ +#define SNMP_ASN1_COUNTER 1 /* u32_t */ +#define SNMP_ASN1_GAUGE 2 /* u32_t */ +#define SNMP_ASN1_TIMETICKS 3 /* u32_t */ +#define SNMP_ASN1_OPAQUE 4 /* octet string */ + +/* context specific (SNMP) tags */ +#define SNMP_ASN1_PDU_GET_REQ 0 +#define SNMP_ASN1_PDU_GET_NEXT_REQ 1 +#define SNMP_ASN1_PDU_GET_RESP 2 +#define SNMP_ASN1_PDU_SET_REQ 3 +#define SNMP_ASN1_PDU_TRAP 4 + +err_t snmp_asn1_dec_type(struct pbuf *p, u16_t ofs, u8_t *type); +err_t snmp_asn1_dec_length(struct pbuf *p, u16_t ofs, u8_t *octets_used, u16_t *length); +err_t snmp_asn1_dec_u32t(struct pbuf *p, u16_t ofs, u16_t len, u32_t *value); +err_t snmp_asn1_dec_s32t(struct pbuf *p, u16_t ofs, u16_t len, s32_t *value); +err_t snmp_asn1_dec_oid(struct pbuf *p, u16_t ofs, u16_t len, struct snmp_obj_id *oid); +err_t snmp_asn1_dec_raw(struct pbuf *p, u16_t ofs, u16_t len, u16_t raw_len, u8_t *raw); + +void snmp_asn1_enc_length_cnt(u16_t length, u8_t *octets_needed); +void snmp_asn1_enc_u32t_cnt(u32_t value, u16_t *octets_needed); +void snmp_asn1_enc_s32t_cnt(s32_t value, u16_t *octets_needed); +void snmp_asn1_enc_oid_cnt(u8_t ident_len, s32_t *ident, u16_t *octets_needed); +err_t snmp_asn1_enc_type(struct pbuf *p, u16_t ofs, u8_t type); +err_t snmp_asn1_enc_length(struct pbuf *p, u16_t ofs, u16_t length); +err_t snmp_asn1_enc_u32t(struct pbuf *p, u16_t ofs, u8_t octets_needed, u32_t value); +err_t snmp_asn1_enc_s32t(struct pbuf *p, u16_t ofs, u8_t octets_needed, s32_t value); +err_t snmp_asn1_enc_oid(struct pbuf *p, u16_t ofs, u8_t ident_len, s32_t *ident); +err_t snmp_asn1_enc_raw(struct pbuf *p, u16_t ofs, u8_t raw_len, u8_t *raw); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNMP */ + +#endif /* __LWIP_SNMP_ASN1_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/snmp_msg.h b/bertos/net/lwip/src/include/lwip/snmp_msg.h new file mode 100644 index 0000000..b2f69c4 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/snmp_msg.h @@ -0,0 +1,311 @@ +/** + * @file + * SNMP Agent message handling structures. + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#ifndef __LWIP_SNMP_MSG_H__ +#define __LWIP_SNMP_MSG_H__ + +#include "lwip/opt.h" +#include "lwip/snmp.h" +#include "lwip/snmp_structs.h" + +#if LWIP_SNMP + +#if SNMP_PRIVATE_MIB +#include "private_mib.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* The listen port of the SNMP agent. Clients have to make their requests to + this port. Most standard clients won't work if you change this! */ +#ifndef SNMP_IN_PORT +#define SNMP_IN_PORT 161 +#endif +/* The remote port the SNMP agent sends traps to. Most standard trap sinks won't + work if you change this! */ +#ifndef SNMP_TRAP_PORT +#define SNMP_TRAP_PORT 162 +#endif + +#define SNMP_ES_NOERROR 0 +#define SNMP_ES_TOOBIG 1 +#define SNMP_ES_NOSUCHNAME 2 +#define SNMP_ES_BADVALUE 3 +#define SNMP_ES_READONLY 4 +#define SNMP_ES_GENERROR 5 + +#define SNMP_GENTRAP_COLDSTART 0 +#define SNMP_GENTRAP_WARMSTART 1 +#define SNMP_GENTRAP_AUTHFAIL 4 +#define SNMP_GENTRAP_ENTERPRISESPC 6 + +struct snmp_varbind +{ + /* next pointer, NULL for last in list */ + struct snmp_varbind *next; + /* previous pointer, NULL for first in list */ + struct snmp_varbind *prev; + + /* object identifier length (in s32_t) */ + u8_t ident_len; + /* object identifier array */ + s32_t *ident; + + /* object value ASN1 type */ + u8_t value_type; + /* object value length (in u8_t) */ + u8_t value_len; + /* object value */ + void *value; + + /* encoding varbind seq length length */ + u8_t seqlenlen; + /* encoding object identifier length length */ + u8_t olenlen; + /* encoding object value length length */ + u8_t vlenlen; + /* encoding varbind seq length */ + u16_t seqlen; + /* encoding object identifier length */ + u16_t olen; + /* encoding object value length */ + u16_t vlen; +}; + +struct snmp_varbind_root +{ + struct snmp_varbind *head; + struct snmp_varbind *tail; + /* number of variable bindings in list */ + u8_t count; + /* encoding varbind-list seq length length */ + u8_t seqlenlen; + /* encoding varbind-list seq length */ + u16_t seqlen; +}; + +/** output response message header length fields */ +struct snmp_resp_header_lengths +{ + /* encoding error-index length length */ + u8_t erridxlenlen; + /* encoding error-status length length */ + u8_t errstatlenlen; + /* encoding request id length length */ + u8_t ridlenlen; + /* encoding pdu length length */ + u8_t pdulenlen; + /* encoding community length length */ + u8_t comlenlen; + /* encoding version length length */ + u8_t verlenlen; + /* encoding sequence length length */ + u8_t seqlenlen; + + /* encoding error-index length */ + u16_t erridxlen; + /* encoding error-status length */ + u16_t errstatlen; + /* encoding request id length */ + u16_t ridlen; + /* encoding pdu length */ + u16_t pdulen; + /* encoding community length */ + u16_t comlen; + /* encoding version length */ + u16_t verlen; + /* encoding sequence length */ + u16_t seqlen; +}; + +/** output response message header length fields */ +struct snmp_trap_header_lengths +{ + /* encoding timestamp length length */ + u8_t tslenlen; + /* encoding specific-trap length length */ + u8_t strplenlen; + /* encoding generic-trap length length */ + u8_t gtrplenlen; + /* encoding agent-addr length length */ + u8_t aaddrlenlen; + /* encoding enterprise-id length length */ + u8_t eidlenlen; + /* encoding pdu length length */ + u8_t pdulenlen; + /* encoding community length length */ + u8_t comlenlen; + /* encoding version length length */ + u8_t verlenlen; + /* encoding sequence length length */ + u8_t seqlenlen; + + /* encoding timestamp length */ + u16_t tslen; + /* encoding specific-trap length */ + u16_t strplen; + /* encoding generic-trap length */ + u16_t gtrplen; + /* encoding agent-addr length */ + u16_t aaddrlen; + /* encoding enterprise-id length */ + u16_t eidlen; + /* encoding pdu length */ + u16_t pdulen; + /* encoding community length */ + u16_t comlen; + /* encoding version length */ + u16_t verlen; + /* encoding sequence length */ + u16_t seqlen; +}; + +/* Accepting new SNMP messages. */ +#define SNMP_MSG_EMPTY 0 +/* Search for matching object for variable binding. */ +#define SNMP_MSG_SEARCH_OBJ 1 +/* Perform SNMP operation on in-memory object. + Pass-through states, for symmetry only. */ +#define SNMP_MSG_INTERNAL_GET_OBJDEF 2 +#define SNMP_MSG_INTERNAL_GET_VALUE 3 +#define SNMP_MSG_INTERNAL_SET_TEST 4 +#define SNMP_MSG_INTERNAL_GET_OBJDEF_S 5 +#define SNMP_MSG_INTERNAL_SET_VALUE 6 +/* Perform SNMP operation on object located externally. + In theory this could be used for building a proxy agent. + Practical use is for an enterprise spc. app. gateway. */ +#define SNMP_MSG_EXTERNAL_GET_OBJDEF 7 +#define SNMP_MSG_EXTERNAL_GET_VALUE 8 +#define SNMP_MSG_EXTERNAL_SET_TEST 9 +#define SNMP_MSG_EXTERNAL_GET_OBJDEF_S 10 +#define SNMP_MSG_EXTERNAL_SET_VALUE 11 + +#define SNMP_COMMUNITY_STR_LEN 64 +struct snmp_msg_pstat +{ + /* lwIP local port (161) binding */ + struct udp_pcb *pcb; + /* source IP address */ + struct ip_addr sip; + /* source UDP port */ + u16_t sp; + /* request type */ + u8_t rt; + /* request ID */ + s32_t rid; + /* error status */ + s32_t error_status; + /* error index */ + s32_t error_index; + /* community name (zero terminated) */ + u8_t community[SNMP_COMMUNITY_STR_LEN + 1]; + /* community string length (exclusive zero term) */ + u8_t com_strlen; + /* one out of MSG_EMPTY, MSG_DEMUX, MSG_INTERNAL, MSG_EXTERNAL_x */ + u8_t state; + /* saved arguments for MSG_EXTERNAL_x */ + struct mib_external_node *ext_mib_node; + struct snmp_name_ptr ext_name_ptr; + struct obj_def ext_object_def; + struct snmp_obj_id ext_oid; + /* index into input variable binding list */ + u8_t vb_idx; + /* ptr into input variable binding list */ + struct snmp_varbind *vb_ptr; + /* list of variable bindings from input */ + struct snmp_varbind_root invb; + /* list of variable bindings to output */ + struct snmp_varbind_root outvb; + /* output response lengths used in ASN encoding */ + struct snmp_resp_header_lengths rhl; +}; + +struct snmp_msg_trap +{ + /* lwIP local port (161) binding */ + struct udp_pcb *pcb; + /* destination IP address in network order */ + struct ip_addr dip; + + /* source enterprise ID (sysObjectID) */ + struct snmp_obj_id *enterprise; + /* source IP address, raw network order format */ + u8_t sip_raw[4]; + /* generic trap code */ + u32_t gen_trap; + /* specific trap code */ + u32_t spc_trap; + /* timestamp */ + u32_t ts; + /* list of variable bindings to output */ + struct snmp_varbind_root outvb; + /* output trap lengths used in ASN encoding */ + struct snmp_trap_header_lengths thl; +}; + +/** Agent Version constant, 0 = v1 oddity */ +extern const s32_t snmp_version; +/** Agent default "public" community string */ +extern const char snmp_publiccommunity[7]; + +extern struct snmp_msg_trap trap_msg; + +/** Agent setup, start listening to port 161. */ +void snmp_init(void); +void snmp_trap_dst_enable(u8_t dst_idx, u8_t enable); +void snmp_trap_dst_ip_set(u8_t dst_idx, struct ip_addr *dst); + +/** Varbind-list functions. */ +struct snmp_varbind* snmp_varbind_alloc(struct snmp_obj_id *oid, u8_t type, u8_t len); +void snmp_varbind_free(struct snmp_varbind *vb); +void snmp_varbind_list_free(struct snmp_varbind_root *root); +void snmp_varbind_tail_add(struct snmp_varbind_root *root, struct snmp_varbind *vb); +struct snmp_varbind* snmp_varbind_tail_remove(struct snmp_varbind_root *root); + +/** Handle an internal (recv) or external (private response) event. */ +void snmp_msg_event(u8_t request_id); +err_t snmp_send_response(struct snmp_msg_pstat *m_stat); +err_t snmp_send_trap(s8_t generic_trap, struct snmp_obj_id *eoid, s32_t specific_trap); +void snmp_coldstart_trap(void); +void snmp_authfail_trap(void); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNMP */ + +#endif /* __LWIP_SNMP_MSG_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/snmp_structs.h b/bertos/net/lwip/src/include/lwip/snmp_structs.h new file mode 100644 index 0000000..9f3f8a9 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/snmp_structs.h @@ -0,0 +1,262 @@ +/** + * @file + * Generic MIB tree structures. + * + * @todo namespace prefixes + */ + +/* + * Copyright (c) 2006 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * Author: Christiaan Simons + */ + +#ifndef __LWIP_SNMP_STRUCTS_H__ +#define __LWIP_SNMP_STRUCTS_H__ + +#include "lwip/opt.h" + +#if LWIP_SNMP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/snmp.h" + +#if SNMP_PRIVATE_MIB +#include "private_mib.h" +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +/* MIB object instance */ +#define MIB_OBJECT_NONE 0 +#define MIB_OBJECT_SCALAR 1 +#define MIB_OBJECT_TAB 2 + +/* MIB object access */ +#define MIB_OBJECT_READ_ONLY 0 +#define MIB_OBJECT_READ_WRITE 1 +#define MIB_OBJECT_WRITE_ONLY 2 +#define MIB_OBJECT_NOT_ACCESSIBLE 3 + +/** object definition returned by (get_object_def)() */ +struct obj_def +{ + /* MIB_OBJECT_NONE (0), MIB_OBJECT_SCALAR (1), MIB_OBJECT_TAB (2) */ + u8_t instance; + /* 0 read-only, 1 read-write, 2 write-only, 3 not-accessible */ + u8_t access; + /* ASN type for this object */ + u8_t asn_type; + /* value length (host length) */ + u16_t v_len; + /* length of instance part of supplied object identifier */ + u8_t id_inst_len; + /* instance part of supplied object identifier */ + s32_t *id_inst_ptr; +}; + +struct snmp_name_ptr +{ + u8_t ident_len; + s32_t *ident; +}; + +/** MIB const scalar (.0) node */ +#define MIB_NODE_SC 0x01 +/** MIB const array node */ +#define MIB_NODE_AR 0x02 +/** MIB array node (mem_malloced from RAM) */ +#define MIB_NODE_RA 0x03 +/** MIB list root node (mem_malloced from RAM) */ +#define MIB_NODE_LR 0x04 +/** MIB node for external objects */ +#define MIB_NODE_EX 0x05 + +/** node "base class" layout, the mandatory fields for a node */ +struct mib_node +{ + /** returns struct obj_def for the given object identifier */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + /** returns object value for the given object identifier, + @note the caller must allocate at least len bytes for the value */ + void (*get_value)(struct obj_def *od, u16_t len, void *value); + /** tests length and/or range BEFORE setting */ + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + /** sets object value, only to be called when set_test() */ + void (*set_value)(struct obj_def *od, u16_t len, void *value); + /** One out of MIB_NODE_AR, MIB_NODE_LR or MIB_NODE_EX */ + const u8_t node_type; + /* array or max list length */ + const u16_t maxlength; +}; + +/** derived node for scalars .0 index */ +typedef struct mib_node mib_scalar_node; + +/** derived node, points to a fixed size const array + of sub-identifiers plus a 'child' pointer */ +struct mib_array_node +{ + /* inherited "base class" members */ + void (* const get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (* const get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + const u8_t node_type; + const u16_t maxlength; + + /* aditional struct members */ + const s32_t *objid; + struct mib_node* const *nptr; +}; + +/** derived node, points to a fixed size mem_malloced array + of sub-identifiers plus a 'child' pointer */ +struct mib_ram_array_node +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* aditional struct members */ + s32_t *objid; + struct mib_node **nptr; +}; + +struct mib_list_node +{ + struct mib_list_node *prev; + struct mib_list_node *next; + s32_t objid; + struct mib_node *nptr; +}; + +/** derived node, points to a doubly linked list + of sub-identifiers plus a 'child' pointer */ +struct mib_list_rootnode +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* aditional struct members */ + struct mib_list_node *head; + struct mib_list_node *tail; + /* counts list nodes in list */ + u16_t count; +}; + +/** derived node, has access functions for mib object in external memory or device + using 'tree_level' and 'idx', with a range 0 .. (level_length() - 1) */ +struct mib_external_node +{ + /* inherited "base class" members */ + void (*get_object_def)(u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value)(struct obj_def *od, u16_t len, void *value); + u8_t (*set_test)(struct obj_def *od, u16_t len, void *value); + void (*set_value)(struct obj_def *od, u16_t len, void *value); + + u8_t node_type; + u16_t maxlength; + + /* aditional struct members */ + /** points to an extenal (in memory) record of some sort of addressing + information, passed to and interpreted by the funtions below */ + void* addr_inf; + /** tree levels under this node */ + u8_t tree_levels; + /** number of objects at this level */ + u16_t (*level_length)(void* addr_inf, u8_t level); + /** compares object sub identifier with external id + return zero when equal, nonzero when unequal */ + s32_t (*ident_cmp)(void* addr_inf, u8_t level, u16_t idx, s32_t sub_id); + void (*get_objid)(void* addr_inf, u8_t level, u16_t idx, s32_t *sub_id); + + /** async Questions */ + void (*get_object_def_q)(void* addr_inf, u8_t rid, u8_t ident_len, s32_t *ident); + void (*get_value_q)(u8_t rid, struct obj_def *od); + void (*set_test_q)(u8_t rid, struct obj_def *od); + void (*set_value_q)(u8_t rid, struct obj_def *od, u16_t len, void *value); + /** async Answers */ + void (*get_object_def_a)(u8_t rid, u8_t ident_len, s32_t *ident, struct obj_def *od); + void (*get_value_a)(u8_t rid, struct obj_def *od, u16_t len, void *value); + u8_t (*set_test_a)(u8_t rid, struct obj_def *od, u16_t len, void *value); + void (*set_value_a)(u8_t rid, struct obj_def *od, u16_t len, void *value); + /** async Panic Close (agent returns error reply, + e.g. used for external transaction cleanup) */ + void (*get_object_def_pc)(u8_t rid, u8_t ident_len, s32_t *ident); + void (*get_value_pc)(u8_t rid, struct obj_def *od); + void (*set_test_pc)(u8_t rid, struct obj_def *od); + void (*set_value_pc)(u8_t rid, struct obj_def *od); +}; + +/** export MIB tree from mib2.c */ +extern const struct mib_array_node internet; + +/** dummy function pointers for non-leaf MIB nodes from mib2.c */ +void noleafs_get_object_def(u8_t ident_len, s32_t *ident, struct obj_def *od); +void noleafs_get_value(struct obj_def *od, u16_t len, void *value); +u8_t noleafs_set_test(struct obj_def *od, u16_t len, void *value); +void noleafs_set_value(struct obj_def *od, u16_t len, void *value); + +void snmp_oidtoip(s32_t *ident, struct ip_addr *ip); +void snmp_iptooid(struct ip_addr *ip, s32_t *ident); +void snmp_ifindextonetif(s32_t ifindex, struct netif **netif); +void snmp_netiftoifindex(struct netif *netif, s32_t *ifidx); + +struct mib_list_node* snmp_mib_ln_alloc(s32_t id); +void snmp_mib_ln_free(struct mib_list_node *ln); +struct mib_list_rootnode* snmp_mib_lrn_alloc(void); +void snmp_mib_lrn_free(struct mib_list_rootnode *lrn); + +s8_t snmp_mib_node_insert(struct mib_list_rootnode *rn, s32_t objid, struct mib_list_node **insn); +s8_t snmp_mib_node_find(struct mib_list_rootnode *rn, s32_t objid, struct mib_list_node **fn); +struct mib_list_rootnode *snmp_mib_node_delete(struct mib_list_rootnode *rn, struct mib_list_node *n); + +struct mib_node* snmp_search_tree(struct mib_node *node, u8_t ident_len, s32_t *ident, struct snmp_name_ptr *np); +struct mib_node* snmp_expand_tree(struct mib_node *node, u8_t ident_len, s32_t *ident, struct snmp_obj_id *oidret); +u8_t snmp_iso_prefix_tst(u8_t ident_len, s32_t *ident); +u8_t snmp_iso_prefix_expand(u8_t ident_len, s32_t *ident, struct snmp_obj_id *oidret); + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SNMP */ + +#endif /* __LWIP_SNMP_STRUCTS_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/sockets.h b/bertos/net/lwip/src/include/lwip/sockets.h new file mode 100644 index 0000000..7b52e15 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/sockets.h @@ -0,0 +1,357 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + + +#ifndef __LWIP_SOCKETS_H__ +#define __LWIP_SOCKETS_H__ + +#include "lwip/opt.h" + +#if LWIP_SOCKET /* don't build if not configured for use in lwipopts.h */ + +#include /* for size_t */ + +#include "lwip/ip_addr.h" +#include "lwip/inet.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* members are in network byte order */ +struct sockaddr_in { + u8_t sin_len; + u8_t sin_family; + u16_t sin_port; + struct in_addr sin_addr; + char sin_zero[8]; +}; + +struct sockaddr { + u8_t sa_len; + u8_t sa_family; + char sa_data[14]; +}; + +#ifndef socklen_t +# define socklen_t u32_t +#endif + +/* Socket protocol types (TCP/UDP/RAW) */ +#define SOCK_STREAM 1 +#define SOCK_DGRAM 2 +#define SOCK_RAW 3 + +/* + * Option flags per-socket. These must match the SOF_ flags in ip.h! + */ +#define SO_DEBUG 0x0001 /* Unimplemented: turn on debugging info recording */ +#define SO_ACCEPTCONN 0x0002 /* socket has had listen() */ +#define SO_REUSEADDR 0x0004 /* Unimplemented: allow local address reuse */ +#define SO_KEEPALIVE 0x0008 /* keep connections alive */ +#define SO_DONTROUTE 0x0010 /* Unimplemented: just use interface addresses */ +#define SO_BROADCAST 0x0020 /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */ +#define SO_USELOOPBACK 0x0040 /* Unimplemented: bypass hardware when possible */ +#define SO_LINGER 0x0080 /* linger on close if data present */ +#define SO_OOBINLINE 0x0100 /* Unimplemented: leave received OOB data in line */ +#define SO_REUSEPORT 0x0200 /* Unimplemented: allow local address & port reuse */ + +#define SO_DONTLINGER ((int)(~SO_LINGER)) + +/* + * Additional options, not kept in so_options. + */ +#define SO_SNDBUF 0x1001 /* Unimplemented: send buffer size */ +#define SO_RCVBUF 0x1002 /* receive buffer size */ +#define SO_SNDLOWAT 0x1003 /* Unimplemented: send low-water mark */ +#define SO_RCVLOWAT 0x1004 /* Unimplemented: receive low-water mark */ +#define SO_SNDTIMEO 0x1005 /* Unimplemented: send timeout */ +#define SO_RCVTIMEO 0x1006 /* receive timeout */ +#define SO_ERROR 0x1007 /* get error status and clear */ +#define SO_TYPE 0x1008 /* get socket type */ +#define SO_CONTIMEO 0x1009 /* Unimplemented: connect timeout */ +#define SO_NO_CHECK 0x100a /* don't create UDP checksum */ + + +/* + * Structure used for manipulating linger option. + */ +struct linger { + int l_onoff; /* option on/off */ + int l_linger; /* linger time */ +}; + +/* + * Level number for (get/set)sockopt() to apply to socket itself. + */ +#define SOL_SOCKET 0xfff /* options for socket level */ + + +#define AF_UNSPEC 0 +#define AF_INET 2 +#define PF_INET AF_INET +#define PF_UNSPEC AF_UNSPEC + +#define IPPROTO_IP 0 +#define IPPROTO_TCP 6 +#define IPPROTO_UDP 17 +#define IPPROTO_UDPLITE 136 + +/* Flags we can use with send and recv. */ +#define MSG_PEEK 0x01 /* Peeks at an incoming message */ +#define MSG_WAITALL 0x02 /* Unimplemented: Requests that the function block until the full amount of data requested can be returned */ +#define MSG_OOB 0x04 /* Unimplemented: Requests out-of-band data. The significance and semantics of out-of-band data are protocol-specific */ +#define MSG_DONTWAIT 0x08 /* Nonblocking i/o for this operation only */ +#define MSG_MORE 0x10 /* Sender will send more */ + + +/* + * Options for level IPPROTO_IP + */ +#define IP_TOS 1 +#define IP_TTL 2 + +#if LWIP_TCP +/* + * Options for level IPPROTO_TCP + */ +#define TCP_NODELAY 0x01 /* don't delay send to coalesce packets */ +#define TCP_KEEPALIVE 0x02 /* send KEEPALIVE probes when idle for pcb->keep_idle milliseconds */ +#define TCP_KEEPIDLE 0x03 /* set pcb->keep_idle - Same as TCP_KEEPALIVE, but use seconds for get/setsockopt */ +#define TCP_KEEPINTVL 0x04 /* set pcb->keep_intvl - Use seconds for get/setsockopt */ +#define TCP_KEEPCNT 0x05 /* set pcb->keep_cnt - Use number of probes sent for get/setsockopt */ +#endif /* LWIP_TCP */ + +#if LWIP_UDP && LWIP_UDPLITE +/* + * Options for level IPPROTO_UDPLITE + */ +#define UDPLITE_SEND_CSCOV 0x01 /* sender checksum coverage */ +#define UDPLITE_RECV_CSCOV 0x02 /* minimal receiver checksum coverage */ +#endif /* LWIP_UDP && LWIP_UDPLITE*/ + + +#if LWIP_IGMP +/* + * Options and types for UDP multicast traffic handling + */ +#define IP_ADD_MEMBERSHIP 3 +#define IP_DROP_MEMBERSHIP 4 +#define IP_MULTICAST_TTL 5 +#define IP_MULTICAST_IF 6 +#define IP_MULTICAST_LOOP 7 + +typedef struct ip_mreq { + struct in_addr imr_multiaddr; /* IP multicast address of group */ + struct in_addr imr_interface; /* local IP address of interface */ +} ip_mreq; +#endif /* LWIP_IGMP */ + +/* + * The Type of Service provides an indication of the abstract + * parameters of the quality of service desired. These parameters are + * to be used to guide the selection of the actual service parameters + * when transmitting a datagram through a particular network. Several + * networks offer service precedence, which somehow treats high + * precedence traffic as more important than other traffic (generally + * by accepting only traffic above a certain precedence at time of high + * load). The major choice is a three way tradeoff between low-delay, + * high-reliability, and high-throughput. + * The use of the Delay, Throughput, and Reliability indications may + * increase the cost (in some sense) of the service. In many networks + * better performance for one of these parameters is coupled with worse + * performance on another. Except for very unusual cases at most two + * of these three indications should be set. + */ +#define IPTOS_TOS_MASK 0x1E +#define IPTOS_TOS(tos) ((tos) & IPTOS_TOS_MASK) +#define IPTOS_LOWDELAY 0x10 +#define IPTOS_THROUGHPUT 0x08 +#define IPTOS_RELIABILITY 0x04 +#define IPTOS_LOWCOST 0x02 +#define IPTOS_MINCOST IPTOS_LOWCOST + +/* + * The Network Control precedence designation is intended to be used + * within a network only. The actual use and control of that + * designation is up to each network. The Internetwork Control + * designation is intended for use by gateway control originators only. + * If the actual use of these precedence designations is of concern to + * a particular network, it is the responsibility of that network to + * control the access to, and use of, those precedence designations. + */ +#define IPTOS_PREC_MASK 0xe0 +#define IPTOS_PREC(tos) ((tos) & IPTOS_PREC_MASK) +#define IPTOS_PREC_NETCONTROL 0xe0 +#define IPTOS_PREC_INTERNETCONTROL 0xc0 +#define IPTOS_PREC_CRITIC_ECP 0xa0 +#define IPTOS_PREC_FLASHOVERRIDE 0x80 +#define IPTOS_PREC_FLASH 0x60 +#define IPTOS_PREC_IMMEDIATE 0x40 +#define IPTOS_PREC_PRIORITY 0x20 +#define IPTOS_PREC_ROUTINE 0x00 + + +/* + * Commands for ioctlsocket(), taken from the BSD file fcntl.h. + * lwip_ioctl only supports FIONREAD and FIONBIO, for now + * + * Ioctl's have the command encoded in the lower word, + * and the size of any in or out parameters in the upper + * word. The high 2 bits of the upper word are used + * to encode the in/out status of the parameter; for now + * we restrict parameters to at most 128 bytes. + */ +#if !defined(FIONREAD) || !defined(FIONBIO) +#define IOCPARM_MASK 0x7fU /* parameters must be < 128 bytes */ +#define IOC_VOID 0x20000000UL /* no parameters */ +#define IOC_OUT 0x40000000UL /* copy out parameters */ +#define IOC_IN 0x80000000UL /* copy in parameters */ +#define IOC_INOUT (IOC_IN|IOC_OUT) + /* 0x20000000 distinguishes new & + old ioctl's */ +#define _IO(x,y) (IOC_VOID|((x)<<8)|(y)) + +#define _IOR(x,y,t) (IOC_OUT|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) + +#define _IOW(x,y,t) (IOC_IN|(((long)sizeof(t)&IOCPARM_MASK)<<16)|((x)<<8)|(y)) +#endif /* !defined(FIONREAD) || !defined(FIONBIO) */ + +#ifndef FIONREAD +#define FIONREAD _IOR('f', 127, unsigned long) /* get # bytes to read */ +#endif +#ifndef FIONBIO +#define FIONBIO _IOW('f', 126, unsigned long) /* set/clear non-blocking i/o */ +#endif + +/* Socket I/O Controls: unimplemented */ +#ifndef SIOCSHIWAT +#define SIOCSHIWAT _IOW('s', 0, unsigned long) /* set high watermark */ +#define SIOCGHIWAT _IOR('s', 1, unsigned long) /* get high watermark */ +#define SIOCSLOWAT _IOW('s', 2, unsigned long) /* set low watermark */ +#define SIOCGLOWAT _IOR('s', 3, unsigned long) /* get low watermark */ +#define SIOCATMARK _IOR('s', 7, unsigned long) /* at oob mark? */ +#endif + +/* Socket flags: */ +#ifndef O_NONBLOCK +#define O_NONBLOCK 04000U +#endif + +/* FD_SET used for lwip_select */ +#ifndef FD_SET + #undef FD_SETSIZE + /* Make FD_SETSIZE match NUM_SOCKETS in socket.c */ + #define FD_SETSIZE MEMP_NUM_NETCONN + #define FD_SET(n, p) ((p)->fd_bits[(n)/8] |= (1 << ((n) & 7))) + #define FD_CLR(n, p) ((p)->fd_bits[(n)/8] &= ~(1 << ((n) & 7))) + #define FD_ISSET(n,p) ((p)->fd_bits[(n)/8] & (1 << ((n) & 7))) + #define FD_ZERO(p) memset((void*)(p),0,sizeof(*(p))) + + typedef struct fd_set { + unsigned char fd_bits [(FD_SETSIZE+7)/8]; + } fd_set; + +#endif /* FD_SET */ + +/** LWIP_TIMEVAL_PRIVATE: if you want to use the struct timeval provided + * by your system, set this to 0 and include in cc.h */ +#ifndef LWIP_TIMEVAL_PRIVATE +#define LWIP_TIMEVAL_PRIVATE 1 +#endif + +#if LWIP_TIMEVAL_PRIVATE +struct timeval { + long tv_sec; /* seconds */ + long tv_usec; /* and microseconds */ +}; +#endif /* LWIP_TIMEVAL_PRIVATE */ + +void lwip_socket_init(void); + +int lwip_accept(int s, struct sockaddr *addr, socklen_t *addrlen); +int lwip_bind(int s, const struct sockaddr *name, socklen_t namelen); +int lwip_shutdown(int s, int how); +int lwip_getpeername (int s, struct sockaddr *name, socklen_t *namelen); +int lwip_getsockname (int s, struct sockaddr *name, socklen_t *namelen); +int lwip_getsockopt (int s, int level, int optname, void *optval, socklen_t *optlen); +int lwip_setsockopt (int s, int level, int optname, const void *optval, socklen_t optlen); +int lwip_close(int s); +int lwip_connect(int s, const struct sockaddr *name, socklen_t namelen); +int lwip_listen(int s, int backlog); +int lwip_recv(int s, void *mem, size_t len, int flags); +int lwip_read(int s, void *mem, size_t len); +int lwip_recvfrom(int s, void *mem, size_t len, int flags, + struct sockaddr *from, socklen_t *fromlen); +int lwip_send(int s, const void *dataptr, size_t size, int flags); +int lwip_sendto(int s, const void *dataptr, size_t size, int flags, + const struct sockaddr *to, socklen_t tolen); +int lwip_socket(int domain, int type, int protocol); +int lwip_write(int s, const void *dataptr, size_t size); +int lwip_select(int maxfdp1, fd_set *readset, fd_set *writeset, fd_set *exceptset, + struct timeval *timeout); +int lwip_ioctl(int s, long cmd, void *argp); + +#if LWIP_COMPAT_SOCKETS +#define accept(a,b,c) lwip_accept(a,b,c) +#define bind(a,b,c) lwip_bind(a,b,c) +#define shutdown(a,b) lwip_shutdown(a,b) +#define closesocket(s) lwip_close(s) +#define connect(a,b,c) lwip_connect(a,b,c) +#define getsockname(a,b,c) lwip_getsockname(a,b,c) +#define getpeername(a,b,c) lwip_getpeername(a,b,c) +#define setsockopt(a,b,c,d,e) lwip_setsockopt(a,b,c,d,e) +#define getsockopt(a,b,c,d,e) lwip_getsockopt(a,b,c,d,e) +#define listen(a,b) lwip_listen(a,b) +#define recv(a,b,c,d) lwip_recv(a,b,c,d) +#define recvfrom(a,b,c,d,e,f) lwip_recvfrom(a,b,c,d,e,f) +#define send(a,b,c,d) lwip_send(a,b,c,d) +#define sendto(a,b,c,d,e,f) lwip_sendto(a,b,c,d,e,f) +#define socket(a,b,c) lwip_socket(a,b,c) +#define select(a,b,c,d,e) lwip_select(a,b,c,d,e) +#define ioctlsocket(a,b,c) lwip_ioctl(a,b,c) + +#if LWIP_POSIX_SOCKETS_IO_NAMES +#define read(a,b,c) lwip_read(a,b,c) +#define write(a,b,c) lwip_write(a,b,c) +#define close(s) lwip_close(s) +#endif /* LWIP_POSIX_SOCKETS_IO_NAMES */ + +#endif /* LWIP_COMPAT_SOCKETS */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_SOCKET */ + +#endif /* __LWIP_SOCKETS_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/stats.h b/bertos/net/lwip/src/include/lwip/stats.h new file mode 100644 index 0000000..aa179f5 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/stats.h @@ -0,0 +1,283 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_STATS_H__ +#define __LWIP_STATS_H__ + +#include "lwip/opt.h" + +#include "lwip/mem.h" +#include "lwip/memp.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if LWIP_STATS + +#ifndef LWIP_STATS_LARGE +#define LWIP_STATS_LARGE 0 +#endif + +#if LWIP_STATS_LARGE +#define STAT_COUNTER u32_t +#define STAT_COUNTER_F U32_F +#else +#define STAT_COUNTER u16_t +#define STAT_COUNTER_F U16_F +#endif + +struct stats_proto { + STAT_COUNTER xmit; /* Transmitted packets. */ + STAT_COUNTER recv; /* Received packets. */ + STAT_COUNTER fw; /* Forwarded packets. */ + STAT_COUNTER drop; /* Dropped packets. */ + STAT_COUNTER chkerr; /* Checksum error. */ + STAT_COUNTER lenerr; /* Invalid length error. */ + STAT_COUNTER memerr; /* Out of memory error. */ + STAT_COUNTER rterr; /* Routing error. */ + STAT_COUNTER proterr; /* Protocol error. */ + STAT_COUNTER opterr; /* Error in options. */ + STAT_COUNTER err; /* Misc error. */ + STAT_COUNTER cachehit; +}; + +struct stats_igmp { + STAT_COUNTER lenerr; /* Invalid length error. */ + STAT_COUNTER chkerr; /* Checksum error. */ + STAT_COUNTER v1_rxed; /* */ + STAT_COUNTER join_sent; /* */ + STAT_COUNTER leave_sent; /* */ + STAT_COUNTER unicast_query; /* */ + STAT_COUNTER report_sent; /* */ + STAT_COUNTER report_rxed; /* */ + STAT_COUNTER group_query_rxed; /* */ +}; + +struct stats_mem { + mem_size_t avail; + mem_size_t used; + mem_size_t max; + STAT_COUNTER err; + STAT_COUNTER illegal; +}; + +struct stats_syselem { + STAT_COUNTER used; + STAT_COUNTER max; + STAT_COUNTER err; +}; + +struct stats_sys { + struct stats_syselem sem; + struct stats_syselem mbox; +}; + +struct stats_ { +#if LINK_STATS + struct stats_proto link; +#endif +#if ETHARP_STATS + struct stats_proto etharp; +#endif +#if IPFRAG_STATS + struct stats_proto ip_frag; +#endif +#if IP_STATS + struct stats_proto ip; +#endif +#if ICMP_STATS + struct stats_proto icmp; +#endif +#if IGMP_STATS + struct stats_igmp igmp; +#endif +#if UDP_STATS + struct stats_proto udp; +#endif +#if TCP_STATS + struct stats_proto tcp; +#endif +#if MEM_STATS + struct stats_mem mem; +#endif +#if MEMP_STATS + struct stats_mem memp[MEMP_MAX]; +#endif +#if SYS_STATS + struct stats_sys sys; +#endif +}; + +extern struct stats_ lwip_stats; + +#define stats_init() /* Compatibility define, not init needed. */ + +#define STATS_INC(x) ++lwip_stats.x +#define STATS_DEC(x) --lwip_stats.x +#else +#define stats_init() +#define STATS_INC(x) +#define STATS_DEC(x) +#endif /* LWIP_STATS */ + +#if TCP_STATS +#define TCP_STATS_INC(x) STATS_INC(x) +#define TCP_STATS_DISPLAY() stats_display_proto(&lwip_stats.tcp, "TCP") +#else +#define TCP_STATS_INC(x) +#define TCP_STATS_DISPLAY() +#endif + +#if UDP_STATS +#define UDP_STATS_INC(x) STATS_INC(x) +#define UDP_STATS_DISPLAY() stats_display_proto(&lwip_stats.udp, "UDP") +#else +#define UDP_STATS_INC(x) +#define UDP_STATS_DISPLAY() +#endif + +#if ICMP_STATS +#define ICMP_STATS_INC(x) STATS_INC(x) +#define ICMP_STATS_DISPLAY() stats_display_proto(&lwip_stats.icmp, "ICMP") +#else +#define ICMP_STATS_INC(x) +#define ICMP_STATS_DISPLAY() +#endif + +#if IGMP_STATS +#define IGMP_STATS_INC(x) STATS_INC(x) +#define IGMP_STATS_DISPLAY() stats_display_igmp(&lwip_stats.igmp) +#else +#define IGMP_STATS_INC(x) +#define IGMP_STATS_DISPLAY() +#endif + +#if IP_STATS +#define IP_STATS_INC(x) STATS_INC(x) +#define IP_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip, "IP") +#else +#define IP_STATS_INC(x) +#define IP_STATS_DISPLAY() +#endif + +#if IPFRAG_STATS +#define IPFRAG_STATS_INC(x) STATS_INC(x) +#define IPFRAG_STATS_DISPLAY() stats_display_proto(&lwip_stats.ip_frag, "IP_FRAG") +#else +#define IPFRAG_STATS_INC(x) +#define IPFRAG_STATS_DISPLAY() +#endif + +#if ETHARP_STATS +#define ETHARP_STATS_INC(x) STATS_INC(x) +#define ETHARP_STATS_DISPLAY() stats_display_proto(&lwip_stats.etharp, "ETHARP") +#else +#define ETHARP_STATS_INC(x) +#define ETHARP_STATS_DISPLAY() +#endif + +#if LINK_STATS +#define LINK_STATS_INC(x) STATS_INC(x) +#define LINK_STATS_DISPLAY() stats_display_proto(&lwip_stats.link, "LINK") +#else +#define LINK_STATS_INC(x) +#define LINK_STATS_DISPLAY() +#endif + +#if MEM_STATS +#define MEM_STATS_AVAIL(x, y) lwip_stats.mem.x = y +#define MEM_STATS_INC(x) STATS_INC(mem.x) +#define MEM_STATS_INC_USED(x, y) do { lwip_stats.mem.used += y; \ + if (lwip_stats.mem.max < lwip_stats.mem.used) { \ + lwip_stats.mem.max = lwip_stats.mem.used; \ + } \ + } while(0) +#define MEM_STATS_DEC_USED(x, y) lwip_stats.mem.x -= y +#define MEM_STATS_DISPLAY() stats_display_mem(&lwip_stats.mem, "HEAP") +#else +#define MEM_STATS_AVAIL(x, y) +#define MEM_STATS_INC(x) +#define MEM_STATS_INC_USED(x, y) +#define MEM_STATS_DEC_USED(x, y) +#define MEM_STATS_DISPLAY() +#endif + +#if MEMP_STATS +#define MEMP_STATS_AVAIL(x, i, y) lwip_stats.memp[i].x = y +#define MEMP_STATS_INC(x, i) STATS_INC(memp[i].x) +#define MEMP_STATS_DEC(x, i) STATS_DEC(memp[i].x) +#define MEMP_STATS_INC_USED(x, i) do { ++lwip_stats.memp[i].used; \ + if (lwip_stats.memp[i].max < lwip_stats.memp[i].used) { \ + lwip_stats.memp[i].max = lwip_stats.memp[i].used; \ + } \ + } while(0) +#define MEMP_STATS_DISPLAY(i) stats_display_memp(&lwip_stats.memp[i], i) +#else +#define MEMP_STATS_AVAIL(x, i, y) +#define MEMP_STATS_INC(x, i) +#define MEMP_STATS_DEC(x, i) +#define MEMP_STATS_INC_USED(x, i) +#define MEMP_STATS_DISPLAY(i) +#endif + +#if SYS_STATS +#define SYS_STATS_INC(x) STATS_INC(sys.x) +#define SYS_STATS_DEC(x) STATS_DEC(sys.x) +#define SYS_STATS_DISPLAY() stats_display_sys(&lwip_stats.sys) +#else +#define SYS_STATS_INC(x) +#define SYS_STATS_DEC(x) +#define SYS_STATS_DISPLAY() +#endif + +/* Display of statistics */ +#if LWIP_STATS_DISPLAY +void stats_display(void); +void stats_display_proto(struct stats_proto *proto, char *name); +void stats_display_igmp(struct stats_igmp *igmp); +void stats_display_mem(struct stats_mem *mem, char *name); +void stats_display_memp(struct stats_mem *mem, int index); +void stats_display_sys(struct stats_sys *sys); +#else +#define stats_display() +#define stats_display_proto(proto, name) +#define stats_display_igmp(igmp) +#define stats_display_mem(mem, name) +#define stats_display_memp(mem, index) +#define stats_display_sys(sys) +#endif /* LWIP_STATS_DISPLAY */ + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_STATS_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/sys.h b/bertos/net/lwip/src/include/lwip/sys.h new file mode 100644 index 0000000..93bbb53 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/sys.h @@ -0,0 +1,243 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_SYS_H__ +#define __LWIP_SYS_H__ + +#include "lwip/opt.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if NO_SYS + +/* For a totally minimal and standalone system, we provide null + definitions of the sys_ functions. */ +typedef u8_t sys_sem_t; +typedef u8_t sys_mbox_t; +struct sys_timeo {u8_t dummy;}; + +#define sys_init() +#define sys_timeout(m,h,a) +#define sys_untimeout(m,a) +#define sys_sem_new(c) c +#define sys_sem_signal(s) +#define sys_sem_wait(s) +#define sys_sem_wait_timeout(s,t) +#define sys_arch_sem_wait(s,t) +#define sys_sem_free(s) +#define sys_mbox_new(s) 0 +#define sys_mbox_fetch(m,d) +#define sys_mbox_tryfetch(m,d) +#define sys_mbox_post(m,d) +#define sys_mbox_trypost(m,d) +#define sys_mbox_free(m) + +#define sys_thread_new(n,t,a,s,p) + +#else /* NO_SYS */ + +/** Return code for timeouts from sys_arch_mbox_fetch and sys_arch_sem_wait */ +#define SYS_ARCH_TIMEOUT 0xffffffffUL + +/* sys_mbox_tryfetch returns SYS_MBOX_EMPTY if appropriate. + * For now we use the same magic value, but we allow this to change in future. + */ +#define SYS_MBOX_EMPTY SYS_ARCH_TIMEOUT + +#include "lwip/err.h" +#include "arch/sys_arch.h" + +typedef void (* sys_timeout_handler)(void *arg); + +struct sys_timeo { + struct sys_timeo *next; + u32_t time; + sys_timeout_handler h; + void *arg; +}; + +struct sys_timeouts { + struct sys_timeo *next; +}; + +/* sys_init() must be called before anthing else. */ +void sys_init(void); + +/* + * sys_timeout(): + * + * Schedule a timeout a specified amount of milliseconds in the + * future. When the timeout occurs, the specified timeout handler will + * be called. The handler will be passed the "arg" argument when + * called. + * + */ +void sys_timeout(u32_t msecs, sys_timeout_handler h, void *arg); +void sys_untimeout(sys_timeout_handler h, void *arg); +struct sys_timeouts *sys_arch_timeouts(void); + +/* Semaphore functions. */ +sys_sem_t sys_sem_new(u8_t count); +void sys_sem_signal(sys_sem_t sem); +u32_t sys_arch_sem_wait(sys_sem_t sem, u32_t timeout); +void sys_sem_free(sys_sem_t sem); +void sys_sem_wait(sys_sem_t sem); +int sys_sem_wait_timeout(sys_sem_t sem, u32_t timeout); + +/* Time functions. */ +#ifndef sys_msleep +void sys_msleep(u32_t ms); /* only has a (close to) 1 jiffy resolution. */ +#endif +#ifndef sys_jiffies +u32_t sys_jiffies(void); /* since power up. */ +#endif + +/* Mailbox functions. */ +sys_mbox_t sys_mbox_new(int size); +void sys_mbox_post(sys_mbox_t mbox, void *msg); +err_t sys_mbox_trypost(sys_mbox_t mbox, void *msg); +u32_t sys_arch_mbox_fetch(sys_mbox_t mbox, void **msg, u32_t timeout); +#ifndef sys_arch_mbox_tryfetch /* Allow port to override with a macro */ +u32_t sys_arch_mbox_tryfetch(sys_mbox_t mbox, void **msg); +#endif +/* For now, we map straight to sys_arch implementation. */ +#define sys_mbox_tryfetch(mbox, msg) sys_arch_mbox_tryfetch(mbox, msg) +void sys_mbox_free(sys_mbox_t mbox); +void sys_mbox_fetch(sys_mbox_t mbox, void **msg); + +/* Thread functions. */ +sys_thread_t sys_thread_new(const char *name, void (* thread)(void *arg), void *arg, int stacksize, int prio); + +#endif /* NO_SYS */ + +/** Returns the current time in milliseconds. */ +u32_t sys_now(void); + +/* Critical Region Protection */ +/* These functions must be implemented in the sys_arch.c file. + In some implementations they can provide a more light-weight protection + mechanism than using semaphores. Otherwise semaphores can be used for + implementation */ +#ifndef SYS_ARCH_PROTECT +/** SYS_LIGHTWEIGHT_PROT + * define SYS_LIGHTWEIGHT_PROT in lwipopts.h if you want inter-task protection + * for certain critical regions during buffer allocation, deallocation and memory + * allocation and deallocation. + */ +#if SYS_LIGHTWEIGHT_PROT + +/** SYS_ARCH_DECL_PROTECT + * declare a protection variable. This macro will default to defining a variable of + * type sys_prot_t. If a particular port needs a different implementation, then + * this macro may be defined in sys_arch.h. + */ +#define SYS_ARCH_DECL_PROTECT(lev) sys_prot_t lev +/** SYS_ARCH_PROTECT + * Perform a "fast" protect. This could be implemented by + * disabling interrupts for an embedded system or by using a semaphore or + * mutex. The implementation should allow calling SYS_ARCH_PROTECT when + * already protected. The old protection level is returned in the variable + * "lev". This macro will default to calling the sys_arch_protect() function + * which should be implemented in sys_arch.c. If a particular port needs a + * different implementation, then this macro may be defined in sys_arch.h + */ +#define SYS_ARCH_PROTECT(lev) lev = sys_arch_protect() +/** SYS_ARCH_UNPROTECT + * Perform a "fast" set of the protection level to "lev". This could be + * implemented by setting the interrupt level to "lev" within the MACRO or by + * using a semaphore or mutex. This macro will default to calling the + * sys_arch_unprotect() function which should be implemented in + * sys_arch.c. If a particular port needs a different implementation, then + * this macro may be defined in sys_arch.h + */ +#define SYS_ARCH_UNPROTECT(lev) sys_arch_unprotect(lev) +sys_prot_t sys_arch_protect(void); +void sys_arch_unprotect(sys_prot_t pval); + +#else + +#define SYS_ARCH_DECL_PROTECT(lev) +#define SYS_ARCH_PROTECT(lev) +#define SYS_ARCH_UNPROTECT(lev) + +#endif /* SYS_LIGHTWEIGHT_PROT */ + +#endif /* SYS_ARCH_PROTECT */ + +/* + * Macros to set/get and increase/decrease variables in a thread-safe way. + * Use these for accessing variable that are used from more than one thread. + */ + +#ifndef SYS_ARCH_INC +#define SYS_ARCH_INC(var, val) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + var += val; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_INC */ + +#ifndef SYS_ARCH_DEC +#define SYS_ARCH_DEC(var, val) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + var -= val; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_DEC */ + +#ifndef SYS_ARCH_GET +#define SYS_ARCH_GET(var, ret) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + ret = var; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_GET */ + +#ifndef SYS_ARCH_SET +#define SYS_ARCH_SET(var, val) do { \ + SYS_ARCH_DECL_PROTECT(old_level); \ + SYS_ARCH_PROTECT(old_level); \ + var = val; \ + SYS_ARCH_UNPROTECT(old_level); \ + } while(0) +#endif /* SYS_ARCH_SET */ + + +#ifdef __cplusplus +} +#endif + +#endif /* __LWIP_SYS_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/tcp.h b/bertos/net/lwip/src/include/lwip/tcp.h new file mode 100644 index 0000000..c88d25d --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/tcp.h @@ -0,0 +1,707 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_TCP_H__ +#define __LWIP_TCP_H__ + +#include "lwip/opt.h" + +#if LWIP_TCP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/sys.h" +#include "lwip/mem.h" +#include "lwip/pbuf.h" +#include "lwip/ip.h" +#include "lwip/icmp.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +struct tcp_pcb; + +/* Functions for interfacing with TCP: */ + +/* Lower layer interface to TCP: */ +#define tcp_init() /* Compatibility define, not init needed. */ +void tcp_tmr (void); /* Must be called every + TCP_TMR_INTERVAL + ms. (Typically 250 ms). */ +/* Application program's interface: */ +struct tcp_pcb * tcp_new (void); +struct tcp_pcb * tcp_alloc (u8_t prio); + +void tcp_arg (struct tcp_pcb *pcb, void *arg); +void tcp_accept (struct tcp_pcb *pcb, + err_t (* accept)(void *arg, struct tcp_pcb *newpcb, + err_t err)); +void tcp_recv (struct tcp_pcb *pcb, + err_t (* recv)(void *arg, struct tcp_pcb *tpcb, + struct pbuf *p, err_t err)); +void tcp_sent (struct tcp_pcb *pcb, + err_t (* sent)(void *arg, struct tcp_pcb *tpcb, + u16_t len)); +void tcp_poll (struct tcp_pcb *pcb, + err_t (* poll)(void *arg, struct tcp_pcb *tpcb), + u8_t interval); +void tcp_err (struct tcp_pcb *pcb, + void (* err)(void *arg, err_t err)); + +#define tcp_mss(pcb) ((pcb)->mss) +#define tcp_sndbuf(pcb) ((pcb)->snd_buf) +#define tcp_nagle_disable(pcb) ((pcb)->flags |= TF_NODELAY) +#define tcp_nagle_enable(pcb) ((pcb)->flags &= ~TF_NODELAY) +#define tcp_nagle_disabled(pcb) (((pcb)->flags & TF_NODELAY) != 0) + +#if TCP_LISTEN_BACKLOG +#define tcp_accepted(pcb) (((struct tcp_pcb_listen *)(pcb))->accepts_pending--) +#else /* TCP_LISTEN_BACKLOG */ +#define tcp_accepted(pcb) +#endif /* TCP_LISTEN_BACKLOG */ + +void tcp_recved (struct tcp_pcb *pcb, u16_t len); +err_t tcp_bind (struct tcp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port); +err_t tcp_connect (struct tcp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port, err_t (* connected)(void *arg, + struct tcp_pcb *tpcb, + err_t err)); + +struct tcp_pcb * tcp_listen_with_backlog(struct tcp_pcb *pcb, u8_t backlog); +#define tcp_listen(pcb) tcp_listen_with_backlog(pcb, TCP_DEFAULT_LISTEN_BACKLOG) + +void tcp_abandon (struct tcp_pcb *pcb, int reset); +#define tcp_abort(pcb) tcp_abandon((pcb), 1) +err_t tcp_close (struct tcp_pcb *pcb); + +/* Flags for "apiflags" parameter in tcp_write and tcp_enqueue */ +#define TCP_WRITE_FLAG_COPY 0x01 +#define TCP_WRITE_FLAG_MORE 0x02 + +err_t tcp_write (struct tcp_pcb *pcb, const void *dataptr, u16_t len, + u8_t apiflags); + +void tcp_setprio (struct tcp_pcb *pcb, u8_t prio); + +#define TCP_PRIO_MIN 1 +#define TCP_PRIO_NORMAL 64 +#define TCP_PRIO_MAX 127 + +/* It is also possible to call these two functions at the right + intervals (instead of calling tcp_tmr()). */ +void tcp_slowtmr (void); +void tcp_fasttmr (void); + + +/* Only used by IP to pass a TCP segment to TCP: */ +void tcp_input (struct pbuf *p, struct netif *inp); +/* Used within the TCP code only: */ +err_t tcp_send_empty_ack(struct tcp_pcb *pcb); +err_t tcp_output (struct tcp_pcb *pcb); +void tcp_rexmit (struct tcp_pcb *pcb); +void tcp_rexmit_rto (struct tcp_pcb *pcb); +void tcp_rexmit_fast (struct tcp_pcb *pcb); +u32_t tcp_update_rcv_ann_wnd(struct tcp_pcb *pcb); + +/** + * This is the Nagle algorithm: try to combine user data to send as few TCP + * segments as possible. Only send if + * - no previously transmitted data on the connection remains unacknowledged or + * - the TF_NODELAY flag is set (nagle algorithm turned off for this pcb) or + * - the only unsent segment is at least pcb->mss bytes long (or there is more + * than one unsent segment - with lwIP, this can happen although unsent->len < mss) + * - or if we are in fast-retransmit (TF_INFR) + */ +#define tcp_do_output_nagle(tpcb) ((((tpcb)->unacked == NULL) || \ + ((tpcb)->flags & (TF_NODELAY | TF_INFR)) || \ + (((tpcb)->unsent != NULL) && (((tpcb)->unsent->next != NULL) || \ + ((tpcb)->unsent->len >= (tpcb)->mss))) \ + ) ? 1 : 0) +#define tcp_output_nagle(tpcb) (tcp_do_output_nagle(tpcb) ? tcp_output(tpcb) : ERR_OK) + + +#define TCP_SEQ_LT(a,b) ((s32_t)((a)-(b)) < 0) +#define TCP_SEQ_LEQ(a,b) ((s32_t)((a)-(b)) <= 0) +#define TCP_SEQ_GT(a,b) ((s32_t)((a)-(b)) > 0) +#define TCP_SEQ_GEQ(a,b) ((s32_t)((a)-(b)) >= 0) +/* is b<=a<=c? */ +#if 0 /* see bug #10548 */ +#define TCP_SEQ_BETWEEN(a,b,c) ((c)-(b) >= (a)-(b)) +#endif +#define TCP_SEQ_BETWEEN(a,b,c) (TCP_SEQ_GEQ(a,b) && TCP_SEQ_LEQ(a,c)) +#define TCP_FIN 0x01U +#define TCP_SYN 0x02U +#define TCP_RST 0x04U +#define TCP_PSH 0x08U +#define TCP_ACK 0x10U +#define TCP_URG 0x20U +#define TCP_ECE 0x40U +#define TCP_CWR 0x80U + +#define TCP_FLAGS 0x3fU + +/* Length of the TCP header, excluding options. */ +#define TCP_HLEN 20 + +#ifndef TCP_TMR_INTERVAL +#define TCP_TMR_INTERVAL 250 /* The TCP timer interval in milliseconds. */ +#endif /* TCP_TMR_INTERVAL */ + +#ifndef TCP_FAST_INTERVAL +#define TCP_FAST_INTERVAL TCP_TMR_INTERVAL /* the fine grained timeout in milliseconds */ +#endif /* TCP_FAST_INTERVAL */ + +#ifndef TCP_SLOW_INTERVAL +#define TCP_SLOW_INTERVAL (2*TCP_TMR_INTERVAL) /* the coarse grained timeout in milliseconds */ +#endif /* TCP_SLOW_INTERVAL */ + +#define TCP_FIN_WAIT_TIMEOUT 20000 /* milliseconds */ +#define TCP_SYN_RCVD_TIMEOUT 20000 /* milliseconds */ + +#define TCP_OOSEQ_TIMEOUT 6U /* x RTO */ + +#ifndef TCP_MSL +#define TCP_MSL 60000UL /* The maximum segment lifetime in milliseconds */ +#endif + +/* Keepalive values, compliant with RFC 1122. Don't change this unless you know what you're doing */ +#ifndef TCP_KEEPIDLE_DEFAULT +#define TCP_KEEPIDLE_DEFAULT 7200000UL /* Default KEEPALIVE timer in milliseconds */ +#endif + +#ifndef TCP_KEEPINTVL_DEFAULT +#define TCP_KEEPINTVL_DEFAULT 75000UL /* Default Time between KEEPALIVE probes in milliseconds */ +#endif + +#ifndef TCP_KEEPCNT_DEFAULT +#define TCP_KEEPCNT_DEFAULT 9U /* Default Counter for KEEPALIVE probes */ +#endif + +#define TCP_MAXIDLE TCP_KEEPCNT_DEFAULT * TCP_KEEPINTVL_DEFAULT /* Maximum KEEPALIVE probe time */ + +/* Fields are (of course) in network byte order. + * Some fields are converted to host byte order in tcp_input(). + */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct tcp_hdr { + PACK_STRUCT_FIELD(u16_t src); + PACK_STRUCT_FIELD(u16_t dest); + PACK_STRUCT_FIELD(u32_t seqno); + PACK_STRUCT_FIELD(u32_t ackno); + PACK_STRUCT_FIELD(u16_t _hdrlen_rsvd_flags); + PACK_STRUCT_FIELD(u16_t wnd); + PACK_STRUCT_FIELD(u16_t chksum); + PACK_STRUCT_FIELD(u16_t urgp); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define TCPH_OFFSET(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 8) +#define TCPH_HDRLEN(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) >> 12) +#define TCPH_FLAGS(phdr) (ntohs((phdr)->_hdrlen_rsvd_flags) & TCP_FLAGS) + +#define TCPH_OFFSET_SET(phdr, offset) (phdr)->_hdrlen_rsvd_flags = htons(((offset) << 8) | TCPH_FLAGS(phdr)) +#define TCPH_HDRLEN_SET(phdr, len) (phdr)->_hdrlen_rsvd_flags = htons(((len) << 12) | TCPH_FLAGS(phdr)) +#define TCPH_FLAGS_SET(phdr, flags) (phdr)->_hdrlen_rsvd_flags = (((phdr)->_hdrlen_rsvd_flags & htons((u16_t)(~(u16_t)(TCP_FLAGS)))) | htons(flags)) +#define TCPH_SET_FLAG(phdr, flags ) (phdr)->_hdrlen_rsvd_flags = ((phdr)->_hdrlen_rsvd_flags | htons(flags)) +#define TCPH_UNSET_FLAG(phdr, flags) (phdr)->_hdrlen_rsvd_flags = htons(ntohs((phdr)->_hdrlen_rsvd_flags) | (TCPH_FLAGS(phdr) & ~(flags)) ) + +#define TCP_TCPLEN(seg) ((seg)->len + ((TCPH_FLAGS((seg)->tcphdr) & (TCP_FIN | TCP_SYN)) != 0)) + +enum tcp_state { + CLOSED = 0, + LISTEN = 1, + SYN_SENT = 2, + SYN_RCVD = 3, + ESTABLISHED = 4, + FIN_WAIT_1 = 5, + FIN_WAIT_2 = 6, + CLOSE_WAIT = 7, + CLOSING = 8, + LAST_ACK = 9, + TIME_WAIT = 10 +}; + +/** Flags used on input processing, not on pcb->flags +*/ +#define TF_RESET (u8_t)0x08U /* Connection was reset. */ +#define TF_CLOSED (u8_t)0x10U /* Connection was sucessfully closed. */ +#define TF_GOT_FIN (u8_t)0x20U /* Connection was closed by the remote end. */ + + +#if LWIP_CALLBACK_API + /* Function to call when a listener has been connected. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb a new tcp_pcb that now is connected + * @param err an error argument (TODO: that is current always ERR_OK?) + * @return ERR_OK: accept the new connection, + * any other err_t abortsthe new connection + */ +#define DEF_ACCEPT_CALLBACK err_t (* accept)(void *arg, struct tcp_pcb *newpcb, err_t err) +#else /* LWIP_CALLBACK_API */ +#define DEF_ACCEPT_CALLBACK +#endif /* LWIP_CALLBACK_API */ + +/** + * members common to struct tcp_pcb and struct tcp_listen_pcb + */ +#define TCP_PCB_COMMON(type) \ + type *next; /* for the linked list */ \ + enum tcp_state state; /* TCP state */ \ + u8_t prio; \ + void *callback_arg; \ + /* ports are in host byte order */ \ + u16_t local_port; \ + /* the accept callback for listen- and normal pcbs, if LWIP_CALLBACK_API */ \ + DEF_ACCEPT_CALLBACK + + +/* the TCP protocol control block */ +struct tcp_pcb { +/** common PCB members */ + IP_PCB; +/** protocol specific PCB members */ + TCP_PCB_COMMON(struct tcp_pcb); + + /* ports are in host byte order */ + u16_t remote_port; + + u8_t flags; +#define TF_ACK_DELAY ((u8_t)0x01U) /* Delayed ACK. */ +#define TF_ACK_NOW ((u8_t)0x02U) /* Immediate ACK. */ +#define TF_INFR ((u8_t)0x04U) /* In fast recovery. */ +#define TF_TIMESTAMP ((u8_t)0x08U) /* Timestamp option enabled */ +#define TF_FIN ((u8_t)0x20U) /* Connection was closed locally (FIN segment enqueued). */ +#define TF_NODELAY ((u8_t)0x40U) /* Disable Nagle algorithm */ +#define TF_NAGLEMEMERR ((u8_t)0x80U) /* nagle enabled, memerr, try to output to prevent delayed ACK to happen */ + + /* the rest of the fields are in host byte order + as we have to do some math with them */ + /* receiver variables */ + u32_t rcv_nxt; /* next seqno expected */ + u16_t rcv_wnd; /* receiver window available */ + u16_t rcv_ann_wnd; /* receiver window to announce */ + u32_t rcv_ann_right_edge; /* announced right edge of window */ + + /* Timers */ + u32_t tmr; + u8_t polltmr, pollinterval; + + /* Retransmission timer. */ + s16_t rtime; + + u16_t mss; /* maximum segment size */ + + /* RTT (round trip time) estimation variables */ + u32_t rttest; /* RTT estimate in 500ms ticks */ + u32_t rtseq; /* sequence number being timed */ + s16_t sa, sv; /* @todo document this */ + + s16_t rto; /* retransmission time-out */ + u8_t nrtx; /* number of retransmissions */ + + /* fast retransmit/recovery */ + u32_t lastack; /* Highest acknowledged seqno. */ + u8_t dupacks; + + /* congestion avoidance/control variables */ + u16_t cwnd; + u16_t ssthresh; + + /* sender variables */ + u32_t snd_nxt; /* next new seqno to be sent */ + u16_t snd_wnd; /* sender window */ + u32_t snd_wl1, snd_wl2; /* Sequence and acknowledgement numbers of last + window update. */ + u32_t snd_lbb; /* Sequence number of next byte to be buffered. */ + + u16_t acked; + + u16_t snd_buf; /* Available buffer space for sending (in bytes). */ +#define TCP_SNDQUEUELEN_OVERFLOW (0xffff-3) + u16_t snd_queuelen; /* Available buffer space for sending (in tcp_segs). */ + + + /* These are ordered by sequence number: */ + struct tcp_seg *unsent; /* Unsent (queued) segments. */ + struct tcp_seg *unacked; /* Sent but unacknowledged segments. */ +#if TCP_QUEUE_OOSEQ + struct tcp_seg *ooseq; /* Received out of sequence segments. */ +#endif /* TCP_QUEUE_OOSEQ */ + + struct pbuf *refused_data; /* Data previously received but not yet taken by upper layer */ + +#if LWIP_CALLBACK_API + /* Function to be called when more send buffer space is available. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb the tcp_pcb which has send buffer space available + * @param space the amount of bytes available + * @return ERR_OK: try to send some data by calling tcp_output + */ + err_t (* sent)(void *arg, struct tcp_pcb *pcb, u16_t space); + + /* Function to be called when (in-sequence) data has arrived. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb the tcp_pcb for which data has arrived + * @param p the packet buffer which arrived + * @param err an error argument (TODO: that is current always ERR_OK?) + * @return ERR_OK: try to send some data by calling tcp_output + */ + err_t (* recv)(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err); + + /* Function to be called when a connection has been set up. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb the tcp_pcb that now is connected + * @param err an error argument (TODO: that is current always ERR_OK?) + * @return value is currently ignored + */ + err_t (* connected)(void *arg, struct tcp_pcb *pcb, err_t err); + + /* Function which is called periodically. + * The period can be adjusted in multiples of the TCP slow timer interval + * by changing tcp_pcb.polltmr. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param pcb the tcp_pcb to poll for + * @return ERR_OK: try to send some data by calling tcp_output + */ + err_t (* poll)(void *arg, struct tcp_pcb *pcb); + + /* Function to be called whenever a fatal error occurs. + * There is no pcb parameter since most of the times, the pcb is + * already deallocated (or there is no pcb) when this function is called. + * @param arg user-supplied argument (tcp_pcb.callback_arg) + * @param err an indication why the error callback is called: + * ERR_ABRT: aborted through tcp_abort or by a TCP timer + * ERR_RST: the connection was reset by the remote host + */ + void (* errf)(void *arg, err_t err); +#endif /* LWIP_CALLBACK_API */ + +#if LWIP_TCP_TIMESTAMPS + u32_t ts_lastacksent; + u32_t ts_recent; +#endif /* LWIP_TCP_TIMESTAMPS */ + + /* idle time before KEEPALIVE is sent */ + u32_t keep_idle; +#if LWIP_TCP_KEEPALIVE + u32_t keep_intvl; + u32_t keep_cnt; +#endif /* LWIP_TCP_KEEPALIVE */ + + /* Persist timer counter */ + u32_t persist_cnt; + /* Persist timer back-off */ + u8_t persist_backoff; + + /* KEEPALIVE counter */ + u8_t keep_cnt_sent; +}; + +struct tcp_pcb_listen { +/* Common members of all PCB types */ + IP_PCB; +/* Protocol specific PCB members */ + TCP_PCB_COMMON(struct tcp_pcb_listen); + +#if TCP_LISTEN_BACKLOG + u8_t backlog; + u8_t accepts_pending; +#endif /* TCP_LISTEN_BACKLOG */ +}; + +#if LWIP_EVENT_API + +enum lwip_event { + LWIP_EVENT_ACCEPT, + LWIP_EVENT_SENT, + LWIP_EVENT_RECV, + LWIP_EVENT_CONNECTED, + LWIP_EVENT_POLL, + LWIP_EVENT_ERR +}; + +err_t lwip_tcp_event(void *arg, struct tcp_pcb *pcb, + enum lwip_event, + struct pbuf *p, + u16_t size, + err_t err); + +#define TCP_EVENT_ACCEPT(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_ACCEPT, NULL, 0, err) +#define TCP_EVENT_SENT(pcb,space,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_SENT, NULL, space, ERR_OK) +#define TCP_EVENT_RECV(pcb,p,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_RECV, (p), 0, (err)) +#define TCP_EVENT_CONNECTED(pcb,err,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_CONNECTED, NULL, 0, (err)) +#define TCP_EVENT_POLL(pcb,ret) ret = lwip_tcp_event((pcb)->callback_arg, (pcb),\ + LWIP_EVENT_POLL, NULL, 0, ERR_OK) +#define TCP_EVENT_ERR(errf,arg,err) lwip_tcp_event((arg), NULL, \ + LWIP_EVENT_ERR, NULL, 0, (err)) +#else /* LWIP_EVENT_API */ + +#define TCP_EVENT_ACCEPT(pcb,err,ret) \ + do { \ + if((pcb)->accept != NULL) \ + (ret) = (pcb)->accept((pcb)->callback_arg,(pcb),(err)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_SENT(pcb,space,ret) \ + do { \ + if((pcb)->sent != NULL) \ + (ret) = (pcb)->sent((pcb)->callback_arg,(pcb),(space)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_RECV(pcb,p,err,ret) \ + do { \ + if((pcb)->recv != NULL) { \ + (ret) = (pcb)->recv((pcb)->callback_arg,(pcb),(p),(err)); \ + } else { \ + (ret) = tcp_recv_null(NULL, (pcb), (p), (err)); \ + } \ + } while (0) + +#define TCP_EVENT_CONNECTED(pcb,err,ret) \ + do { \ + if((pcb)->connected != NULL) \ + (ret) = (pcb)->connected((pcb)->callback_arg,(pcb),(err)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_POLL(pcb,ret) \ + do { \ + if((pcb)->poll != NULL) \ + (ret) = (pcb)->poll((pcb)->callback_arg,(pcb)); \ + else (ret) = ERR_OK; \ + } while (0) + +#define TCP_EVENT_ERR(errf,arg,err) \ + do { \ + if((errf) != NULL) \ + (errf)((arg),(err)); \ + } while (0) + +#endif /* LWIP_EVENT_API */ + +/* This structure represents a TCP segment on the unsent and unacked queues */ +struct tcp_seg { + struct tcp_seg *next; /* used when putting segements on a queue */ + struct pbuf *p; /* buffer containing data + TCP header */ + void *dataptr; /* pointer to the TCP data in the pbuf */ + u16_t len; /* the TCP length of this segment */ + u8_t flags; +#define TF_SEG_OPTS_MSS (u8_t)0x01U /* Include MSS option. */ +#define TF_SEG_OPTS_TS (u8_t)0x02U /* Include timestamp option. */ + struct tcp_hdr *tcphdr; /* the TCP header */ +}; + +#define LWIP_TCP_OPT_LENGTH(flags) \ + (flags & TF_SEG_OPTS_MSS ? 4 : 0) + \ + (flags & TF_SEG_OPTS_TS ? 12 : 0) + +/** This returns a TCP header option for MSS in an u32_t */ +#define TCP_BUILD_MSS_OPTION(x) (x) = htonl(((u32_t)2 << 24) | \ + ((u32_t)4 << 16) | \ + (((u32_t)TCP_MSS / 256) << 8) | \ + (TCP_MSS & 255)) + +/* Internal functions and global variables: */ +struct tcp_pcb *tcp_pcb_copy(struct tcp_pcb *pcb); +void tcp_pcb_purge(struct tcp_pcb *pcb); +void tcp_pcb_remove(struct tcp_pcb **pcblist, struct tcp_pcb *pcb); + +u8_t tcp_segs_free(struct tcp_seg *seg); +u8_t tcp_seg_free(struct tcp_seg *seg); +struct tcp_seg *tcp_seg_copy(struct tcp_seg *seg); + +#define tcp_ack(pcb) \ + do { \ + if((pcb)->flags & TF_ACK_DELAY) { \ + (pcb)->flags &= ~TF_ACK_DELAY; \ + (pcb)->flags |= TF_ACK_NOW; \ + tcp_output(pcb); \ + } \ + else { \ + (pcb)->flags |= TF_ACK_DELAY; \ + } \ + } while (0) + +#define tcp_ack_now(pcb) \ + do { \ + (pcb)->flags |= TF_ACK_NOW; \ + tcp_output(pcb); \ + } while (0) + +err_t tcp_send_ctrl(struct tcp_pcb *pcb, u8_t flags); +err_t tcp_enqueue(struct tcp_pcb *pcb, void *dataptr, u16_t len, + u8_t flags, u8_t apiflags, u8_t optflags); + +void tcp_rexmit_seg(struct tcp_pcb *pcb, struct tcp_seg *seg); + +void tcp_rst(u32_t seqno, u32_t ackno, + struct ip_addr *local_ip, struct ip_addr *remote_ip, + u16_t local_port, u16_t remote_port); + +u32_t tcp_next_iss(void); + +void tcp_keepalive(struct tcp_pcb *pcb); +void tcp_zero_window_probe(struct tcp_pcb *pcb); + +#if TCP_CALCULATE_EFF_SEND_MSS +u16_t tcp_eff_send_mss(u16_t sendmss, struct ip_addr *addr); +#endif /* TCP_CALCULATE_EFF_SEND_MSS */ + +#if LWIP_CALLBACK_API +err_t tcp_recv_null(void *arg, struct tcp_pcb *pcb, struct pbuf *p, err_t err); +#endif /* LWIP_CALLBACK_API */ + +extern struct tcp_pcb *tcp_input_pcb; +extern u32_t tcp_ticks; + +const char* tcp_debug_state_str(enum tcp_state s); +#if TCP_DEBUG || TCP_INPUT_DEBUG || TCP_OUTPUT_DEBUG +void tcp_debug_print(struct tcp_hdr *tcphdr); +void tcp_debug_print_flags(u8_t flags); +void tcp_debug_print_state(enum tcp_state s); +void tcp_debug_print_pcbs(void); +s16_t tcp_pcbs_sane(void); +#else +# define tcp_debug_print(tcphdr) +# define tcp_debug_print_flags(flags) +# define tcp_debug_print_state(s) +# define tcp_debug_print_pcbs() +# define tcp_pcbs_sane() 1 +#endif /* TCP_DEBUG */ + +#if NO_SYS +#define tcp_timer_needed() +#else +void tcp_timer_needed(void); +#endif + +/* The TCP PCB lists. */ +union tcp_listen_pcbs_t { /* List of all TCP PCBs in LISTEN state. */ + struct tcp_pcb_listen *listen_pcbs; + struct tcp_pcb *pcbs; +}; +extern union tcp_listen_pcbs_t tcp_listen_pcbs; +extern struct tcp_pcb *tcp_active_pcbs; /* List of all TCP PCBs that are in a + state in which they accept or send + data. */ +extern struct tcp_pcb *tcp_tw_pcbs; /* List of all TCP PCBs in TIME-WAIT. */ + +extern struct tcp_pcb *tcp_tmp_pcb; /* Only used for temporary storage. */ + +/* Axioms about the above lists: + 1) Every TCP PCB that is not CLOSED is in one of the lists. + 2) A PCB is only in one of the lists. + 3) All PCBs in the tcp_listen_pcbs list is in LISTEN state. + 4) All PCBs in the tcp_tw_pcbs list is in TIME-WAIT state. +*/ + +/* Define two macros, TCP_REG and TCP_RMV that registers a TCP PCB + with a PCB list or removes a PCB from a list, respectively. */ +#if 0 +#define TCP_REG(pcbs, npcb) do {\ + LWIP_DEBUGF(TCP_DEBUG, ("TCP_REG %p local port %d\n", npcb, npcb->local_port)); \ + for(tcp_tmp_pcb = *pcbs; \ + tcp_tmp_pcb != NULL; \ + tcp_tmp_pcb = tcp_tmp_pcb->next) { \ + LWIP_ASSERT("TCP_REG: already registered\n", tcp_tmp_pcb != npcb); \ + } \ + LWIP_ASSERT("TCP_REG: pcb->state != CLOSED", npcb->state != CLOSED); \ + npcb->next = *pcbs; \ + LWIP_ASSERT("TCP_REG: npcb->next != npcb", npcb->next != npcb); \ + *(pcbs) = npcb; \ + LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ + tcp_timer_needed(); \ + } while(0) +#define TCP_RMV(pcbs, npcb) do { \ + LWIP_ASSERT("TCP_RMV: pcbs != NULL", *pcbs != NULL); \ + LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removing %p from %p\n", npcb, *pcbs)); \ + if(*pcbs == npcb) { \ + *pcbs = (*pcbs)->next; \ + } else for(tcp_tmp_pcb = *pcbs; tcp_tmp_pcb != NULL; tcp_tmp_pcb = tcp_tmp_pcb->next) { \ + if(tcp_tmp_pcb->next == npcb) { \ + tcp_tmp_pcb->next = npcb->next; \ + break; \ + } \ + } \ + npcb->next = NULL; \ + LWIP_ASSERT("TCP_RMV: tcp_pcbs sane", tcp_pcbs_sane()); \ + LWIP_DEBUGF(TCP_DEBUG, ("TCP_RMV: removed %p from %p\n", npcb, *pcbs)); \ + } while(0) + +#else /* LWIP_DEBUG */ + +#define TCP_REG(pcbs, npcb) \ + do { \ + npcb->next = *pcbs; \ + *(pcbs) = npcb; \ + tcp_timer_needed(); \ + } while (0) + +#define TCP_RMV(pcbs, npcb) \ + do { \ + if(*(pcbs) == npcb) { \ + (*(pcbs)) = (*pcbs)->next; \ + } \ + else { \ + for(tcp_tmp_pcb = *pcbs; \ + tcp_tmp_pcb != NULL; \ + tcp_tmp_pcb = tcp_tmp_pcb->next) { \ + if(tcp_tmp_pcb->next == npcb) { \ + tcp_tmp_pcb->next = npcb->next; \ + break; \ + } \ + } \ + } \ + npcb->next = NULL; \ + } while(0) + +#endif /* LWIP_DEBUG */ + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_TCP */ + +#endif /* __LWIP_TCP_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/tcpip.h b/bertos/net/lwip/src/include/lwip/tcpip.h new file mode 100644 index 0000000..75393ee --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/tcpip.h @@ -0,0 +1,141 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_TCPIP_H__ +#define __LWIP_TCPIP_H__ + +#include "lwip/opt.h" + +#if !NO_SYS /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/api_msg.h" +#include "lwip/netifapi.h" +#include "lwip/pbuf.h" +#include "lwip/api.h" +#include "lwip/sys.h" +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if LWIP_TCPIP_CORE_LOCKING +/** The global semaphore to lock the stack. */ +extern sys_sem_t lock_tcpip_core; +#define LOCK_TCPIP_CORE() sys_sem_wait(lock_tcpip_core) +#define UNLOCK_TCPIP_CORE() sys_sem_signal(lock_tcpip_core) +#define TCPIP_APIMSG(m) tcpip_apimsg_lock(m) +#define TCPIP_APIMSG_ACK(m) +#define TCPIP_NETIFAPI(m) tcpip_netifapi_lock(m) +#define TCPIP_NETIFAPI_ACK(m) +#else +#define LOCK_TCPIP_CORE() +#define UNLOCK_TCPIP_CORE() +#define TCPIP_APIMSG(m) tcpip_apimsg(m) +#define TCPIP_APIMSG_ACK(m) sys_sem_signal(m->conn->op_completed) +#define TCPIP_NETIFAPI(m) tcpip_netifapi(m) +#define TCPIP_NETIFAPI_ACK(m) sys_sem_signal(m->sem) +#endif /* LWIP_TCPIP_CORE_LOCKING */ + +void tcpip_init(void (* tcpip_init_done)(void *), void *arg); + +#if LWIP_NETCONN +err_t tcpip_apimsg(struct api_msg *apimsg); +#if LWIP_TCPIP_CORE_LOCKING +err_t tcpip_apimsg_lock(struct api_msg *apimsg); +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETCONN */ + +err_t tcpip_input(struct pbuf *p, struct netif *inp); + +#if LWIP_NETIF_API +err_t tcpip_netifapi(struct netifapi_msg *netifapimsg); +#if LWIP_TCPIP_CORE_LOCKING +err_t tcpip_netifapi_lock(struct netifapi_msg *netifapimsg); +#endif /* LWIP_TCPIP_CORE_LOCKING */ +#endif /* LWIP_NETIF_API */ + +err_t tcpip_callback_with_block(void (*f)(void *ctx), void *ctx, u8_t block); +#define tcpip_callback(f, ctx) tcpip_callback_with_block(f, ctx, 1) + +/* free pbufs or heap memory from another context without blocking */ +err_t pbuf_free_callback(struct pbuf *p); +err_t mem_free_callback(void *m); + +err_t tcpip_timeout(u32_t msecs, sys_timeout_handler h, void *arg); +err_t tcpip_untimeout(sys_timeout_handler h, void *arg); + +enum tcpip_msg_type { +#if LWIP_NETCONN + TCPIP_MSG_API, +#endif /* LWIP_NETCONN */ + TCPIP_MSG_INPKT, +#if LWIP_NETIF_API + TCPIP_MSG_NETIFAPI, +#endif /* LWIP_NETIF_API */ + TCPIP_MSG_CALLBACK, + TCPIP_MSG_TIMEOUT, + TCPIP_MSG_UNTIMEOUT +}; + +struct tcpip_msg { + enum tcpip_msg_type type; + sys_sem_t *sem; + union { +#if LWIP_NETCONN + struct api_msg *apimsg; +#endif /* LWIP_NETCONN */ +#if LWIP_NETIF_API + struct netifapi_msg *netifapimsg; +#endif /* LWIP_NETIF_API */ + struct { + struct pbuf *p; + struct netif *netif; + } inp; + struct { + void (*f)(void *ctx); + void *ctx; + } cb; + struct { + u32_t msecs; + sys_timeout_handler h; + void *arg; + } tmo; + } msg; +}; + +#ifdef __cplusplus +} +#endif + +#endif /* !NO_SYS */ + +#endif /* __LWIP_TCPIP_H__ */ diff --git a/bertos/net/lwip/src/include/lwip/udp.h b/bertos/net/lwip/src/include/lwip/udp.h new file mode 100644 index 0000000..08d1817 --- /dev/null +++ b/bertos/net/lwip/src/include/lwip/udp.h @@ -0,0 +1,153 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __LWIP_UDP_H__ +#define __LWIP_UDP_H__ + +#include "lwip/opt.h" + +#if LWIP_UDP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/netif.h" +#include "lwip/ip_addr.h" +#include "lwip/ip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define UDP_HLEN 8 + +/* Fields are (of course) in network byte order. */ +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct udp_hdr { + PACK_STRUCT_FIELD(u16_t src); + PACK_STRUCT_FIELD(u16_t dest); /* src/dest UDP ports */ + PACK_STRUCT_FIELD(u16_t len); + PACK_STRUCT_FIELD(u16_t chksum); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define UDP_FLAGS_NOCHKSUM 0x01U +#define UDP_FLAGS_UDPLITE 0x02U +#define UDP_FLAGS_CONNECTED 0x04U + +struct udp_pcb { +/* Common members of all PCB types */ + IP_PCB; + +/* Protocol specific PCB members */ + + struct udp_pcb *next; + + u8_t flags; + /* ports are in host byte order */ + u16_t local_port, remote_port; + +#if LWIP_IGMP + /* outgoing network interface for multicast packets */ + struct ip_addr multicast_ip; +#endif /* LWIP_IGMP */ + +#if LWIP_UDPLITE + /* used for UDP_LITE only */ + u16_t chksum_len_rx, chksum_len_tx; +#endif /* LWIP_UDPLITE */ + + /* receive callback function + * addr and port are in same byte order as in the pcb + * The callback is responsible for freeing the pbuf + * if it's not used any more. + * + * ATTENTION: Be aware that 'addr' points into the pbuf 'p' so freeing this pbuf + * makes 'addr' invalid, too. + * + * @param arg user supplied argument (udp_pcb.recv_arg) + * @param pcb the udp_pcb which received data + * @param p the packet buffer that was received + * @param addr the remote IP address from which the packet was received + * @param port the remote port from which the packet was received + */ + void (* recv)(void *arg, struct udp_pcb *pcb, struct pbuf *p, + struct ip_addr *addr, u16_t port); + /* user-supplied argument for the recv callback */ + void *recv_arg; +}; +/* udp_pcbs export for exernal reference (e.g. SNMP agent) */ +extern struct udp_pcb *udp_pcbs; + +/* The following functions is the application layer interface to the + UDP code. */ +struct udp_pcb * udp_new (void); +void udp_remove (struct udp_pcb *pcb); +err_t udp_bind (struct udp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port); +err_t udp_connect (struct udp_pcb *pcb, struct ip_addr *ipaddr, + u16_t port); +void udp_disconnect (struct udp_pcb *pcb); +void udp_recv (struct udp_pcb *pcb, + void (* recv)(void *arg, struct udp_pcb *upcb, + struct pbuf *p, + struct ip_addr *addr, + u16_t port), + void *recv_arg); +err_t udp_sendto_if (struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *dst_ip, u16_t dst_port, struct netif *netif); +err_t udp_sendto (struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *dst_ip, u16_t dst_port); +err_t udp_send (struct udp_pcb *pcb, struct pbuf *p); + +#define udp_flags(pcb) ((pcb)->flags) +#define udp_setflags(pcb, f) ((pcb)->flags = (f)) + +/* The following functions are the lower layer interface to UDP. */ +void udp_input (struct pbuf *p, struct netif *inp); + +#define udp_init() /* Compatibility define, not init needed. */ + +#if UDP_DEBUG +void udp_debug_print(struct udp_hdr *udphdr); +#else +#define udp_debug_print(udphdr) +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_UDP */ + +#endif /* __LWIP_UDP_H__ */ diff --git a/bertos/net/lwip/src/include/lwipopts.h b/bertos/net/lwip/src/include/lwipopts.h new file mode 100644 index 0000000..25116d1 --- /dev/null +++ b/bertos/net/lwip/src/include/lwipopts.h @@ -0,0 +1,42 @@ +/** + * \file + * + * + * \brief Configuration file for lwip network module. + * + * \author Luca Ottaviano + */ +#ifndef LWIPOPTS_H +#define LWIPOPTS_H + +#include "cfg/cfg_lwip.h" + +#endif /* LWIPOPTS_H */ diff --git a/bertos/net/lwip/src/include/netif/etharp.h b/bertos/net/lwip/src/include/netif/etharp.h new file mode 100644 index 0000000..72b8d79 --- /dev/null +++ b/bertos/net/lwip/src/include/netif/etharp.h @@ -0,0 +1,192 @@ +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * Copyright (c) 2003-2004 Leon Woestenberg + * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +#ifndef __NETIF_ETHARP_H__ +#define __NETIF_ETHARP_H__ + +#include "lwip/opt.h" + +#if LWIP_ARP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/pbuf.h" +#include "lwip/ip_addr.h" +#include "lwip/netif.h" +#include "lwip/ip.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#ifndef ETH_PAD_SIZE +#define ETH_PAD_SIZE 0 +#endif + +#ifndef ETHARP_HWADDR_LEN +#define ETHARP_HWADDR_LEN 6 +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct eth_addr { + PACK_STRUCT_FIELD(u8_t addr[ETHARP_HWADDR_LEN]); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct eth_hdr { +#if ETH_PAD_SIZE + PACK_STRUCT_FIELD(u8_t padding[ETH_PAD_SIZE]); +#endif + PACK_STRUCT_FIELD(struct eth_addr dest); + PACK_STRUCT_FIELD(struct eth_addr src); + PACK_STRUCT_FIELD(u16_t type); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_ETH_HDR (14 + ETH_PAD_SIZE) + +#if ETHARP_SUPPORT_VLAN + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct eth_vlan_hdr { + PACK_STRUCT_FIELD(u16_t tpid); + PACK_STRUCT_FIELD(u16_t prio_vid); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_VLAN_HDR 4 +#define VLAN_ID(vlan_hdr) (htons((vlan_hdr)->prio_vid) & 0xFFF) + +#endif /* ETHARP_SUPPORT_VLAN */ + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +/** the ARP message */ +struct etharp_hdr { + PACK_STRUCT_FIELD(u16_t hwtype); + PACK_STRUCT_FIELD(u16_t proto); + PACK_STRUCT_FIELD(u16_t _hwlen_protolen); + PACK_STRUCT_FIELD(u16_t opcode); + PACK_STRUCT_FIELD(struct eth_addr shwaddr); + PACK_STRUCT_FIELD(struct ip_addr2 sipaddr); + PACK_STRUCT_FIELD(struct eth_addr dhwaddr); + PACK_STRUCT_FIELD(struct ip_addr2 dipaddr); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#define SIZEOF_ETHARP_HDR 28 +#define SIZEOF_ETHARP_PACKET (SIZEOF_ETH_HDR + SIZEOF_ETHARP_HDR) + +/** 5 seconds period */ +#define ARP_TMR_INTERVAL 5000 + +#define ETHTYPE_ARP 0x0806 +#define ETHTYPE_IP 0x0800 +#define ETHTYPE_VLAN 0x8100 +#define ETHTYPE_PPPOEDISC 0x8863 /* PPP Over Ethernet Discovery Stage */ +#define ETHTYPE_PPPOE 0x8864 /* PPP Over Ethernet Session Stage */ + +/** ARP message types (opcodes) */ +#define ARP_REQUEST 1 +#define ARP_REPLY 2 + +#if ARP_QUEUEING +/** struct for queueing outgoing packets for unknown address + * defined here to be accessed by memp.h + */ +struct etharp_q_entry { + struct etharp_q_entry *next; + struct pbuf *p; +}; +#endif /* ARP_QUEUEING */ + +#define etharp_init() /* Compatibility define, not init needed. */ +void etharp_tmr(void); +s8_t etharp_find_addr(struct netif *netif, struct ip_addr *ipaddr, + struct eth_addr **eth_ret, struct ip_addr **ip_ret); +void etharp_ip_input(struct netif *netif, struct pbuf *p); +void etharp_arp_input(struct netif *netif, struct eth_addr *ethaddr, + struct pbuf *p); +err_t etharp_output(struct netif *netif, struct pbuf *q, struct ip_addr *ipaddr); +err_t etharp_query(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q); +err_t etharp_request(struct netif *netif, struct ip_addr *ipaddr); +/** For Ethernet network interfaces, we might want to send "gratuitous ARP"; + * this is an ARP packet sent by a node in order to spontaneously cause other + * nodes to update an entry in their ARP cache. + * From RFC 3220 "IP Mobility Support for IPv4" section 4.6. */ +#define etharp_gratuitous(netif) etharp_request((netif), &(netif)->ip_addr) + +err_t ethernet_input(struct pbuf *p, struct netif *netif); + +#if LWIP_AUTOIP +err_t etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr, + const struct eth_addr *ethdst_addr, + const struct eth_addr *hwsrc_addr, const struct ip_addr *ipsrc_addr, + const struct eth_addr *hwdst_addr, const struct ip_addr *ipdst_addr, + const u16_t opcode); +#endif /* LWIP_AUTOIP */ + +#define eth_addr_cmp(addr1, addr2) (memcmp((addr1)->addr, (addr2)->addr, ETHARP_HWADDR_LEN) == 0) + +extern const struct eth_addr ethbroadcast, ethzero; + +#ifdef __cplusplus +} +#endif + +#endif /* LWIP_ARP */ + +#endif /* __NETIF_ARP_H__ */ diff --git a/bertos/net/lwip/src/include/netif/ethernetif.h b/bertos/net/lwip/src/include/netif/ethernetif.h new file mode 100644 index 0000000..0690d17 --- /dev/null +++ b/bertos/net/lwip/src/include/netif/ethernetif.h @@ -0,0 +1,7 @@ +#ifndef ETHERNETIF_H +#define ETHERNETIF_H + +#include +err_t ethernetif_init(struct netif *netif); + +#endif /* ETHERNETIF_H */ diff --git a/bertos/net/lwip/src/include/netif/loopif.h b/bertos/net/lwip/src/include/netif/loopif.h new file mode 100644 index 0000000..304af4b --- /dev/null +++ b/bertos/net/lwip/src/include/netif/loopif.h @@ -0,0 +1,53 @@ +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __NETIF_LOOPIF_H__ +#define __NETIF_LOOPIF_H__ + +#include "lwip/opt.h" +#include "lwip/netif.h" +#include "lwip/err.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#if !LWIP_NETIF_LOOPBACK_MULTITHREADING +#define loopif_poll netif_poll +#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */ + +err_t loopif_init(struct netif *netif); + +#ifdef __cplusplus +} +#endif + +#endif /* __NETIF_LOOPIF_H__ */ diff --git a/bertos/net/lwip/src/include/netif/ppp_oe.h b/bertos/net/lwip/src/include/netif/ppp_oe.h new file mode 100644 index 0000000..3aa55ae --- /dev/null +++ b/bertos/net/lwip/src/include/netif/ppp_oe.h @@ -0,0 +1,161 @@ +/***************************************************************************** +* ppp_oe.h - PPP Over Ethernet implementation for lwIP. +* +* Copyright (c) 2006 by Marc Boucher, Services Informatiques (MBSI) inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 06-01-01 Marc Boucher +* Ported to lwIP. +*****************************************************************************/ + + + +/* based on NetBSD: if_pppoe.c,v 1.64 2006/01/31 23:50:15 martin Exp */ + +/*- + * Copyright (c) 2002 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Martin Husemann . + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef PPP_OE_H +#define PPP_OE_H + +#include "lwip/opt.h" + +#if PPPOE_SUPPORT > 0 + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct pppoehdr { + PACK_STRUCT_FIELD(u8_t vertype); + PACK_STRUCT_FIELD(u8_t code); + PACK_STRUCT_FIELD(u16_t session); + PACK_STRUCT_FIELD(u16_t plen); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/bpstruct.h" +#endif +PACK_STRUCT_BEGIN +struct pppoetag { + PACK_STRUCT_FIELD(u16_t tag); + PACK_STRUCT_FIELD(u16_t len); +} PACK_STRUCT_STRUCT; +PACK_STRUCT_END +#ifdef PACK_STRUCT_USE_INCLUDES +# include "arch/epstruct.h" +#endif + + +#define PPPOE_STATE_INITIAL 0 +#define PPPOE_STATE_PADI_SENT 1 +#define PPPOE_STATE_PADR_SENT 2 +#define PPPOE_STATE_SESSION 3 +#define PPPOE_STATE_CLOSING 4 +/* passive */ +#define PPPOE_STATE_PADO_SENT 1 + +#define PPPOE_HEADERLEN sizeof(struct pppoehdr) +#define PPPOE_VERTYPE 0x11 /* VER=1, TYPE = 1 */ + +#define PPPOE_TAG_EOL 0x0000 /* end of list */ +#define PPPOE_TAG_SNAME 0x0101 /* service name */ +#define PPPOE_TAG_ACNAME 0x0102 /* access concentrator name */ +#define PPPOE_TAG_HUNIQUE 0x0103 /* host unique */ +#define PPPOE_TAG_ACCOOKIE 0x0104 /* AC cookie */ +#define PPPOE_TAG_VENDOR 0x0105 /* vendor specific */ +#define PPPOE_TAG_RELAYSID 0x0110 /* relay session id */ +#define PPPOE_TAG_SNAME_ERR 0x0201 /* service name error */ +#define PPPOE_TAG_ACSYS_ERR 0x0202 /* AC system error */ +#define PPPOE_TAG_GENERIC_ERR 0x0203 /* gerneric error */ + +#define PPPOE_CODE_PADI 0x09 /* Active Discovery Initiation */ +#define PPPOE_CODE_PADO 0x07 /* Active Discovery Offer */ +#define PPPOE_CODE_PADR 0x19 /* Active Discovery Request */ +#define PPPOE_CODE_PADS 0x65 /* Active Discovery Session confirmation */ +#define PPPOE_CODE_PADT 0xA7 /* Active Discovery Terminate */ + +#ifndef ETHERMTU +#define ETHERMTU 1500 +#endif + +/* two byte PPP protocol discriminator, then IP data */ +#define PPPOE_MAXMTU (ETHERMTU-PPPOE_HEADERLEN-2) + +struct pppoe_softc; + + +void pppoe_init(void); + +err_t pppoe_create(struct netif *ethif, int pd, void (*linkStatusCB)(int pd, int up), struct pppoe_softc **scptr); +err_t pppoe_destroy(struct netif *ifp); + +int pppoe_connect(struct pppoe_softc *sc); +void pppoe_disconnect(struct pppoe_softc *sc); + +void pppoe_disc_input(struct netif *netif, struct pbuf *p); +void pppoe_data_input(struct netif *netif, struct pbuf *p); + +err_t pppoe_xmit(struct pppoe_softc *sc, struct pbuf *pb); + +extern int pppoe_hdrlen; + +#endif /* PPPOE_SUPPORT */ + +#endif /* PPP_OE_H */ diff --git a/bertos/net/lwip/src/include/netif/slipif.h b/bertos/net/lwip/src/include/netif/slipif.h new file mode 100644 index 0000000..ccd03c8 --- /dev/null +++ b/bertos/net/lwip/src/include/netif/slipif.h @@ -0,0 +1,51 @@ +/* + * Copyright (c) 2001, Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#ifndef __NETIF_SLIPIF_H__ +#define __NETIF_SLIPIF_H__ + +#include "lwip/netif.h" + +#ifdef __cplusplus +extern "C" { +#endif + +err_t slipif_init(struct netif * netif); +void slipif_poll(struct netif *netif); + +#ifdef __cplusplus +} +#endif + +#endif + diff --git a/bertos/net/lwip/src/netif/FILES b/bertos/net/lwip/src/netif/FILES new file mode 100644 index 0000000..099dbf3 --- /dev/null +++ b/bertos/net/lwip/src/netif/FILES @@ -0,0 +1,29 @@ +This directory contains generic network interface device drivers that +do not contain any hardware or architecture specific code. The files +are: + +etharp.c + Implements the ARP (Address Resolution Protocol) over + Ethernet. The code in this file should be used together with + Ethernet device drivers. Note that this module has been + largely made Ethernet independent so you should be able to + adapt this for other link layers (such as Firewire). + +ethernetif.c + An example of how an Ethernet device driver could look. This + file can be used as a "skeleton" for developing new Ethernet + network device drivers. It uses the etharp.c ARP code. + +loopif.c + A "loopback" network interface driver. It requires configuration + through the define LWIP_LOOPIF_MULTITHREADING (see opt.h). + +slipif.c + A generic implementation of the SLIP (Serial Line IP) + protocol. It requires a sio (serial I/O) module to work. + +ppp/ Point-to-Point Protocol stack + The PPP stack has been ported from ucip (http://ucip.sourceforge.net). + It matches quite well to pppd 2.3.1 (http://ppp.samba.org), although + compared to that, it has some modifications for embedded systems and + the source code has been reordered a bit. \ No newline at end of file diff --git a/bertos/net/lwip/src/netif/etharp.c b/bertos/net/lwip/src/netif/etharp.c new file mode 100644 index 0000000..8f6872f --- /dev/null +++ b/bertos/net/lwip/src/netif/etharp.c @@ -0,0 +1,1222 @@ +/** + * @file + * Address Resolution Protocol module for IP over Ethernet + * + * Functionally, ARP is divided into two parts. The first maps an IP address + * to a physical address when sending a packet, and the second part answers + * requests from other machines for our physical address. + * + * This implementation complies with RFC 826 (Ethernet ARP). It supports + * Gratuitious ARP from RFC3220 (IP Mobility Support for IPv4) section 4.6 + * if an interface calls etharp_gratuitous(our_netif) upon address change. + */ + +/* + * Copyright (c) 2001-2003 Swedish Institute of Computer Science. + * Copyright (c) 2003-2004 Leon Woestenberg + * Copyright (c) 2003-2004 Axon Digital Design B.V., The Netherlands. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + */ + +#include "lwip/opt.h" + +#if LWIP_ARP /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/inet.h" +#include "lwip/ip.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "lwip/dhcp.h" +#include "lwip/autoip.h" +#include "netif/etharp.h" + +#if PPPOE_SUPPORT +#include "netif/ppp_oe.h" +#endif /* PPPOE_SUPPORT */ + +#include + +/** the time an ARP entry stays valid after its last update, + * for ARP_TMR_INTERVAL = 5000, this is + * (240 * 5) seconds = 20 minutes. + */ +#define ARP_MAXAGE 240 +/** the time an ARP entry stays pending after first request, + * for ARP_TMR_INTERVAL = 5000, this is + * (2 * 5) seconds = 10 seconds. + * + * @internal Keep this number at least 2, otherwise it might + * run out instantly if the timeout occurs directly after a request. + */ +#define ARP_MAXPENDING 2 + +#define HWTYPE_ETHERNET 1 + +#define ARPH_HWLEN(hdr) (ntohs((hdr)->_hwlen_protolen) >> 8) +#define ARPH_PROTOLEN(hdr) (ntohs((hdr)->_hwlen_protolen) & 0xff) + +#define ARPH_HWLEN_SET(hdr, len) (hdr)->_hwlen_protolen = htons(ARPH_PROTOLEN(hdr) | ((len) << 8)) +#define ARPH_PROTOLEN_SET(hdr, len) (hdr)->_hwlen_protolen = htons((len) | (ARPH_HWLEN(hdr) << 8)) + +enum etharp_state { + ETHARP_STATE_EMPTY = 0, + ETHARP_STATE_PENDING, + ETHARP_STATE_STABLE +}; + +struct etharp_entry { +#if ARP_QUEUEING + /** + * Pointer to queue of pending outgoing packets on this ARP entry. + */ + struct etharp_q_entry *q; +#endif + struct ip_addr ipaddr; + struct eth_addr ethaddr; + enum etharp_state state; + u8_t ctime; + struct netif *netif; +}; + +const struct eth_addr ethbroadcast = {{0xff,0xff,0xff,0xff,0xff,0xff}}; +const struct eth_addr ethzero = {{0,0,0,0,0,0}}; +static struct etharp_entry arp_table[ARP_TABLE_SIZE]; +#if !LWIP_NETIF_HWADDRHINT +static u8_t etharp_cached_entry; +#endif + +/** + * Try hard to create a new entry - we want the IP address to appear in + * the cache (even if this means removing an active entry or so). */ +#define ETHARP_TRY_HARD 1 +#define ETHARP_FIND_ONLY 2 + +#if LWIP_NETIF_HWADDRHINT +#define NETIF_SET_HINT(netif, hint) if (((netif) != NULL) && ((netif)->addr_hint != NULL)) \ + *((netif)->addr_hint) = (hint); +static s8_t find_entry(struct ip_addr *ipaddr, u8_t flags, struct netif *netif); +#else /* LWIP_NETIF_HWADDRHINT */ +static s8_t find_entry(struct ip_addr *ipaddr, u8_t flags); +#endif /* LWIP_NETIF_HWADDRHINT */ + +static err_t update_arp_entry(struct netif *netif, struct ip_addr *ipaddr, struct eth_addr *ethaddr, u8_t flags); + + +/* Some checks, instead of etharp_init(): */ +#if (LWIP_ARP && (ARP_TABLE_SIZE > 0x7f)) + #error "If you want to use ARP, ARP_TABLE_SIZE must fit in an s8_t, so, you have to reduce it in your lwipopts.h" +#endif + + +#if ARP_QUEUEING +/** + * Free a complete queue of etharp entries + * + * @param q a qeueue of etharp_q_entry's to free + */ +static void +free_etharp_q(struct etharp_q_entry *q) +{ + struct etharp_q_entry *r; + LWIP_ASSERT("q != NULL", q != NULL); + LWIP_ASSERT("q->p != NULL", q->p != NULL); + while (q) { + r = q; + q = q->next; + LWIP_ASSERT("r->p != NULL", (r->p != NULL)); + pbuf_free(r->p); + memp_free(MEMP_ARP_QUEUE, r); + } +} +#endif + +/** + * Clears expired entries in the ARP table. + * + * This function should be called every ETHARP_TMR_INTERVAL microseconds (5 seconds), + * in order to expire entries in the ARP table. + */ +void +etharp_tmr(void) +{ + u8_t i; + + LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer\n")); + /* remove expired entries from the ARP table */ + for (i = 0; i < ARP_TABLE_SIZE; ++i) { + arp_table[i].ctime++; + if (((arp_table[i].state == ETHARP_STATE_STABLE) && + (arp_table[i].ctime >= ARP_MAXAGE)) || + ((arp_table[i].state == ETHARP_STATE_PENDING) && + (arp_table[i].ctime >= ARP_MAXPENDING))) { + /* pending or stable entry has become old! */ + LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: expired %s entry %"U16_F".\n", + arp_table[i].state == ETHARP_STATE_STABLE ? "stable" : "pending", (u16_t)i)); + /* clean up entries that have just been expired */ + /* remove from SNMP ARP index tree */ + snmp_delete_arpidx_tree(arp_table[i].netif, &arp_table[i].ipaddr); +#if ARP_QUEUEING + /* and empty packet queue */ + if (arp_table[i].q != NULL) { + /* remove all queued packets */ + LWIP_DEBUGF(ETHARP_DEBUG, ("etharp_timer: freeing entry %"U16_F", packet queue %p.\n", (u16_t)i, (void *)(arp_table[i].q))); + free_etharp_q(arp_table[i].q); + arp_table[i].q = NULL; + } +#endif + /* recycle entry for re-use */ + arp_table[i].state = ETHARP_STATE_EMPTY; + } +#if ARP_QUEUEING + /* still pending entry? (not expired) */ + if (arp_table[i].state == ETHARP_STATE_PENDING) { + /* resend an ARP query here? */ + } +#endif + } +} + +/** + * Search the ARP table for a matching or new entry. + * + * If an IP address is given, return a pending or stable ARP entry that matches + * the address. If no match is found, create a new entry with this address set, + * but in state ETHARP_EMPTY. The caller must check and possibly change the + * state of the returned entry. + * + * If ipaddr is NULL, return a initialized new entry in state ETHARP_EMPTY. + * + * In all cases, attempt to create new entries from an empty entry. If no + * empty entries are available and ETHARP_TRY_HARD flag is set, recycle + * old entries. Heuristic choose the least important entry for recycling. + * + * @param ipaddr IP address to find in ARP cache, or to add if not found. + * @param flags + * - ETHARP_TRY_HARD: Try hard to create a entry by allowing recycling of + * active (stable or pending) entries. + * + * @return The ARP entry index that matched or is created, ERR_MEM if no + * entry is found or could be recycled. + */ +static s8_t +#if LWIP_NETIF_HWADDRHINT +find_entry(struct ip_addr *ipaddr, u8_t flags, struct netif *netif) +#else /* LWIP_NETIF_HWADDRHINT */ +find_entry(struct ip_addr *ipaddr, u8_t flags) +#endif /* LWIP_NETIF_HWADDRHINT */ +{ + s8_t old_pending = ARP_TABLE_SIZE, old_stable = ARP_TABLE_SIZE; + s8_t empty = ARP_TABLE_SIZE; + u8_t i = 0, age_pending = 0, age_stable = 0; +#if ARP_QUEUEING + /* oldest entry with packets on queue */ + s8_t old_queue = ARP_TABLE_SIZE; + /* its age */ + u8_t age_queue = 0; +#endif + + /* First, test if the last call to this function asked for the + * same address. If so, we're really fast! */ + if (ipaddr) { + /* ipaddr to search for was given */ +#if LWIP_NETIF_HWADDRHINT + if ((netif != NULL) && (netif->addr_hint != NULL)) { + /* per-pcb cached entry was given */ + u8_t per_pcb_cache = *(netif->addr_hint); + if ((per_pcb_cache < ARP_TABLE_SIZE) && arp_table[per_pcb_cache].state == ETHARP_STATE_STABLE) { + /* the per-pcb-cached entry is stable */ + if (ip_addr_cmp(ipaddr, &arp_table[per_pcb_cache].ipaddr)) { + /* per-pcb cached entry was the right one! */ + ETHARP_STATS_INC(etharp.cachehit); + return per_pcb_cache; + } + } + } +#else /* #if LWIP_NETIF_HWADDRHINT */ + if (arp_table[etharp_cached_entry].state == ETHARP_STATE_STABLE) { + /* the cached entry is stable */ + if (ip_addr_cmp(ipaddr, &arp_table[etharp_cached_entry].ipaddr)) { + /* cached entry was the right one! */ + ETHARP_STATS_INC(etharp.cachehit); + return etharp_cached_entry; + } + } +#endif /* #if LWIP_NETIF_HWADDRHINT */ + } + + /** + * a) do a search through the cache, remember candidates + * b) select candidate entry + * c) create new entry + */ + + /* a) in a single search sweep, do all of this + * 1) remember the first empty entry (if any) + * 2) remember the oldest stable entry (if any) + * 3) remember the oldest pending entry without queued packets (if any) + * 4) remember the oldest pending entry with queued packets (if any) + * 5) search for a matching IP entry, either pending or stable + * until 5 matches, or all entries are searched for. + */ + + for (i = 0; i < ARP_TABLE_SIZE; ++i) { + /* no empty entry found yet and now we do find one? */ + if ((empty == ARP_TABLE_SIZE) && (arp_table[i].state == ETHARP_STATE_EMPTY)) { + LWIP_DEBUGF(ETHARP_DEBUG, ("find_entry: found empty entry %"U16_F"\n", (u16_t)i)); + /* remember first empty entry */ + empty = i; + } + /* pending entry? */ + else if (arp_table[i].state == ETHARP_STATE_PENDING) { + /* if given, does IP address match IP address in ARP entry? */ + if (ipaddr && ip_addr_cmp(ipaddr, &arp_table[i].ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: found matching pending entry %"U16_F"\n", (u16_t)i)); + /* found exact IP address match, simply bail out */ +#if LWIP_NETIF_HWADDRHINT + NETIF_SET_HINT(netif, i); +#else /* #if LWIP_NETIF_HWADDRHINT */ + etharp_cached_entry = i; +#endif /* #if LWIP_NETIF_HWADDRHINT */ + return i; +#if ARP_QUEUEING + /* pending with queued packets? */ + } else if (arp_table[i].q != NULL) { + if (arp_table[i].ctime >= age_queue) { + old_queue = i; + age_queue = arp_table[i].ctime; + } +#endif + /* pending without queued packets? */ + } else { + if (arp_table[i].ctime >= age_pending) { + old_pending = i; + age_pending = arp_table[i].ctime; + } + } + } + /* stable entry? */ + else if (arp_table[i].state == ETHARP_STATE_STABLE) { + /* if given, does IP address match IP address in ARP entry? */ + if (ipaddr && ip_addr_cmp(ipaddr, &arp_table[i].ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: found matching stable entry %"U16_F"\n", (u16_t)i)); + /* found exact IP address match, simply bail out */ +#if LWIP_NETIF_HWADDRHINT + NETIF_SET_HINT(netif, i); +#else /* #if LWIP_NETIF_HWADDRHINT */ + etharp_cached_entry = i; +#endif /* #if LWIP_NETIF_HWADDRHINT */ + return i; + /* remember entry with oldest stable entry in oldest, its age in maxtime */ + } else if (arp_table[i].ctime >= age_stable) { + old_stable = i; + age_stable = arp_table[i].ctime; + } + } + } + /* { we have no match } => try to create a new entry */ + + /* no empty entry found and not allowed to recycle? */ + if (((empty == ARP_TABLE_SIZE) && ((flags & ETHARP_TRY_HARD) == 0)) + /* or don't create new entry, only search? */ + || ((flags & ETHARP_FIND_ONLY) != 0)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: no empty entry found and not allowed to recycle\n")); + return (s8_t)ERR_MEM; + } + + /* b) choose the least destructive entry to recycle: + * 1) empty entry + * 2) oldest stable entry + * 3) oldest pending entry without queued packets + * 4) oldest pending entry with queued packets + * + * { ETHARP_TRY_HARD is set at this point } + */ + + /* 1) empty entry available? */ + if (empty < ARP_TABLE_SIZE) { + i = empty; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting empty entry %"U16_F"\n", (u16_t)i)); + } + /* 2) found recyclable stable entry? */ + else if (old_stable < ARP_TABLE_SIZE) { + /* recycle oldest stable*/ + i = old_stable; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting oldest stable entry %"U16_F"\n", (u16_t)i)); +#if ARP_QUEUEING + /* no queued packets should exist on stable entries */ + LWIP_ASSERT("arp_table[i].q == NULL", arp_table[i].q == NULL); +#endif + /* 3) found recyclable pending entry without queued packets? */ + } else if (old_pending < ARP_TABLE_SIZE) { + /* recycle oldest pending */ + i = old_pending; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F" (without queue)\n", (u16_t)i)); +#if ARP_QUEUEING + /* 4) found recyclable pending entry with queued packets? */ + } else if (old_queue < ARP_TABLE_SIZE) { + /* recycle oldest pending */ + i = old_queue; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("find_entry: selecting oldest pending entry %"U16_F", freeing packet queue %p\n", (u16_t)i, (void *)(arp_table[i].q))); + free_etharp_q(arp_table[i].q); + arp_table[i].q = NULL; +#endif + /* no empty or recyclable entries found */ + } else { + return (s8_t)ERR_MEM; + } + + /* { empty or recyclable entry found } */ + LWIP_ASSERT("i < ARP_TABLE_SIZE", i < ARP_TABLE_SIZE); + + if (arp_table[i].state != ETHARP_STATE_EMPTY) + { + snmp_delete_arpidx_tree(arp_table[i].netif, &arp_table[i].ipaddr); + } + /* recycle entry (no-op for an already empty entry) */ + arp_table[i].state = ETHARP_STATE_EMPTY; + + /* IP address given? */ + if (ipaddr != NULL) { + /* set IP address */ + ip_addr_set(&arp_table[i].ipaddr, ipaddr); + } + arp_table[i].ctime = 0; +#if LWIP_NETIF_HWADDRHINT + NETIF_SET_HINT(netif, i); +#else /* #if LWIP_NETIF_HWADDRHINT */ + etharp_cached_entry = i; +#endif /* #if LWIP_NETIF_HWADDRHINT */ + return (err_t)i; +} + +/** + * Send an IP packet on the network using netif->linkoutput + * The ethernet header is filled in before sending. + * + * @params netif the lwIP network interface on which to send the packet + * @params p the packet to send, p->payload pointing to the (uninitialized) ethernet header + * @params src the source MAC address to be copied into the ethernet header + * @params dst the destination MAC address to be copied into the ethernet header + * @return ERR_OK if the packet was sent, any other err_t on failure + */ +static err_t +etharp_send_ip(struct netif *netif, struct pbuf *p, struct eth_addr *src, struct eth_addr *dst) +{ + struct eth_hdr *ethhdr = p->payload; + u8_t k; + + LWIP_ASSERT("netif->hwaddr_len must be the same as ETHARP_HWADDR_LEN for etharp!", + (netif->hwaddr_len == ETHARP_HWADDR_LEN)); + k = ETHARP_HWADDR_LEN; + while(k > 0) { + k--; + ethhdr->dest.addr[k] = dst->addr[k]; + ethhdr->src.addr[k] = src->addr[k]; + } + ethhdr->type = htons(ETHTYPE_IP); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_send_ip: sending packet %p\n", (void *)p)); + /* send the packet */ + return netif->linkoutput(netif, p); +} + +/** + * Update (or insert) a IP/MAC address pair in the ARP cache. + * + * If a pending entry is resolved, any queued packets will be sent + * at this point. + * + * @param ipaddr IP address of the inserted ARP entry. + * @param ethaddr Ethernet address of the inserted ARP entry. + * @param flags Defines behaviour: + * - ETHARP_TRY_HARD Allows ARP to insert this as a new item. If not specified, + * only existing ARP entries will be updated. + * + * @return + * - ERR_OK Succesfully updated ARP cache. + * - ERR_MEM If we could not add a new ARP entry when ETHARP_TRY_HARD was set. + * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. + * + * @see pbuf_free() + */ +static err_t +update_arp_entry(struct netif *netif, struct ip_addr *ipaddr, struct eth_addr *ethaddr, u8_t flags) +{ + s8_t i; + u8_t k; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry()\n")); + LWIP_ASSERT("netif->hwaddr_len == ETHARP_HWADDR_LEN", netif->hwaddr_len == ETHARP_HWADDR_LEN); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry: %"U16_F".%"U16_F".%"U16_F".%"U16_F" - %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F"\n", + ip4_addr1(ipaddr), ip4_addr2(ipaddr), ip4_addr3(ipaddr), ip4_addr4(ipaddr), + ethaddr->addr[0], ethaddr->addr[1], ethaddr->addr[2], + ethaddr->addr[3], ethaddr->addr[4], ethaddr->addr[5])); + /* non-unicast address? */ + if (ip_addr_isany(ipaddr) || + ip_addr_isbroadcast(ipaddr, netif) || + ip_addr_ismulticast(ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry: will not add non-unicast IP address to ARP cache\n")); + return ERR_ARG; + } + /* find or create ARP entry */ +#if LWIP_NETIF_HWADDRHINT + i = find_entry(ipaddr, flags, netif); +#else /* LWIP_NETIF_HWADDRHINT */ + i = find_entry(ipaddr, flags); +#endif /* LWIP_NETIF_HWADDRHINT */ + /* bail out if no entry could be found */ + if (i < 0) + return (err_t)i; + + /* mark it stable */ + arp_table[i].state = ETHARP_STATE_STABLE; + /* record network interface */ + arp_table[i].netif = netif; + + /* insert in SNMP ARP index tree */ + snmp_insert_arpidx_tree(netif, &arp_table[i].ipaddr); + + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("update_arp_entry: updating stable entry %"S16_F"\n", (s16_t)i)); + /* update address */ + k = ETHARP_HWADDR_LEN; + while (k > 0) { + k--; + arp_table[i].ethaddr.addr[k] = ethaddr->addr[k]; + } + /* reset time stamp */ + arp_table[i].ctime = 0; +#if ARP_QUEUEING + /* this is where we will send out queued packets! */ + while (arp_table[i].q != NULL) { + struct pbuf *p; + /* remember remainder of queue */ + struct etharp_q_entry *q = arp_table[i].q; + /* pop first item off the queue */ + arp_table[i].q = q->next; + /* get the packet pointer */ + p = q->p; + /* now queue entry can be freed */ + memp_free(MEMP_ARP_QUEUE, q); + /* send the queued IP packet */ + etharp_send_ip(netif, p, (struct eth_addr*)(netif->hwaddr), ethaddr); + /* free the queued IP packet */ + pbuf_free(p); + } +#endif + return ERR_OK; +} + +/** + * Finds (stable) ethernet/IP address pair from ARP table + * using interface and IP address index. + * @note the addresses in the ARP table are in network order! + * + * @param netif points to interface index + * @param ipaddr points to the (network order) IP address index + * @param eth_ret points to return pointer + * @param ip_ret points to return pointer + * @return table index if found, -1 otherwise + */ +s8_t +etharp_find_addr(struct netif *netif, struct ip_addr *ipaddr, + struct eth_addr **eth_ret, struct ip_addr **ip_ret) +{ + s8_t i; + + LWIP_UNUSED_ARG(netif); + +#if LWIP_NETIF_HWADDRHINT + i = find_entry(ipaddr, ETHARP_FIND_ONLY, NULL); +#else /* LWIP_NETIF_HWADDRHINT */ + i = find_entry(ipaddr, ETHARP_FIND_ONLY); +#endif /* LWIP_NETIF_HWADDRHINT */ + if((i >= 0) && arp_table[i].state == ETHARP_STATE_STABLE) { + *eth_ret = &arp_table[i].ethaddr; + *ip_ret = &arp_table[i].ipaddr; + return i; + } + return -1; +} + +/** + * Updates the ARP table using the given IP packet. + * + * Uses the incoming IP packet's source address to update the + * ARP cache for the local network. The function does not alter + * or free the packet. This function must be called before the + * packet p is passed to the IP layer. + * + * @param netif The lwIP network interface on which the IP packet pbuf arrived. + * @param p The IP packet that arrived on netif. + * + * @return NULL + * + * @see pbuf_free() + */ +void +etharp_ip_input(struct netif *netif, struct pbuf *p) +{ + struct eth_hdr *ethhdr; + struct ip_hdr *iphdr; + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + /* Only insert an entry if the source IP address of the + incoming IP packet comes from a host on the local network. */ + ethhdr = p->payload; + iphdr = (struct ip_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR); +#if ETHARP_SUPPORT_VLAN + if (ethhdr->type == ETHTYPE_VLAN) { + iphdr = (struct ip_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR + SIZEOF_VLAN_HDR); + } +#endif /* ETHARP_SUPPORT_VLAN */ + + /* source is not on the local network? */ + if (!ip_addr_netcmp(&(iphdr->src), &(netif->ip_addr), &(netif->netmask))) { + /* do nothing */ + return; + } + + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_ip_input: updating ETHARP table.\n")); + /* update ARP table */ + /* @todo We could use ETHARP_TRY_HARD if we think we are going to talk + * back soon (for example, if the destination IP address is ours. */ + update_arp_entry(netif, &(iphdr->src), &(ethhdr->src), 0); +} + + +/** + * Responds to ARP requests to us. Upon ARP replies to us, add entry to cache + * send out queued IP packets. Updates cache with snooped address pairs. + * + * Should be called for incoming ARP packets. The pbuf in the argument + * is freed by this function. + * + * @param netif The lwIP network interface on which the ARP packet pbuf arrived. + * @param ethaddr Ethernet address of netif. + * @param p The ARP packet that arrived on netif. Is freed by this function. + * + * @return NULL + * + * @see pbuf_free() + */ +void +etharp_arp_input(struct netif *netif, struct eth_addr *ethaddr, struct pbuf *p) +{ + struct etharp_hdr *hdr; + struct eth_hdr *ethhdr; + /* these are aligned properly, whereas the ARP header fields might not be */ + struct ip_addr sipaddr, dipaddr; + u8_t i; + u8_t for_us; +#if LWIP_AUTOIP + const u8_t * ethdst_hwaddr; +#endif /* LWIP_AUTOIP */ + + LWIP_ERROR("netif != NULL", (netif != NULL), return;); + + /* drop short ARP packets: we have to check for p->len instead of p->tot_len here + since a struct etharp_hdr is pointed to p->payload, so it musn't be chained! */ + if (p->len < SIZEOF_ETHARP_PACKET) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("etharp_arp_input: packet dropped, too short (%"S16_F"/%"S16_F")\n", p->tot_len, + (s16_t)SIZEOF_ETHARP_PACKET)); + ETHARP_STATS_INC(etharp.lenerr); + ETHARP_STATS_INC(etharp.drop); + pbuf_free(p); + return; + } + + ethhdr = p->payload; + hdr = (struct etharp_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR); +#if ETHARP_SUPPORT_VLAN + if (ethhdr->type == ETHTYPE_VLAN) { + hdr = (struct etharp_hdr *)(((u8_t*)ethhdr) + SIZEOF_ETH_HDR + SIZEOF_VLAN_HDR); + } +#endif /* ETHARP_SUPPORT_VLAN */ + + /* RFC 826 "Packet Reception": */ + if ((hdr->hwtype != htons(HWTYPE_ETHERNET)) || + (hdr->_hwlen_protolen != htons((ETHARP_HWADDR_LEN << 8) | sizeof(struct ip_addr))) || + (hdr->proto != htons(ETHTYPE_IP)) || + (ethhdr->type != htons(ETHTYPE_ARP))) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, + ("etharp_arp_input: packet dropped, wrong hw type, hwlen, proto, protolen or ethernet type (%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F"/%"U16_F")\n", + hdr->hwtype, ARPH_HWLEN(hdr), hdr->proto, ARPH_PROTOLEN(hdr), ethhdr->type)); + ETHARP_STATS_INC(etharp.proterr); + ETHARP_STATS_INC(etharp.drop); + pbuf_free(p); + return; + } + ETHARP_STATS_INC(etharp.recv); + +#if LWIP_AUTOIP + /* We have to check if a host already has configured our random + * created link local address and continously check if there is + * a host with this IP-address so we can detect collisions */ + autoip_arp_reply(netif, hdr); +#endif /* LWIP_AUTOIP */ + + /* Copy struct ip_addr2 to aligned ip_addr, to support compilers without + * structure packing (not using structure copy which breaks strict-aliasing rules). */ + SMEMCPY(&sipaddr, &hdr->sipaddr, sizeof(sipaddr)); + SMEMCPY(&dipaddr, &hdr->dipaddr, sizeof(dipaddr)); + + /* this interface is not configured? */ + if (netif->ip_addr.addr == 0) { + for_us = 0; + } else { + /* ARP packet directed to us? */ + for_us = ip_addr_cmp(&dipaddr, &(netif->ip_addr)); + } + + /* ARP message directed to us? */ + if (for_us) { + /* add IP address in ARP cache; assume requester wants to talk to us. + * can result in directly sending the queued packets for this host. */ + update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), ETHARP_TRY_HARD); + /* ARP message not directed to us? */ + } else { + /* update the source IP address in the cache, if present */ + update_arp_entry(netif, &sipaddr, &(hdr->shwaddr), 0); + } + + /* now act on the message itself */ + switch (htons(hdr->opcode)) { + /* ARP request? */ + case ARP_REQUEST: + /* ARP request. If it asked for our address, we send out a + * reply. In any case, we time-stamp any existing ARP entry, + * and possiby send out an IP packet that was queued on it. */ + + LWIP_DEBUGF (ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: incoming ARP request\n")); + /* ARP request for our address? */ + if (for_us) { + + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: replying to ARP request for our IP address\n")); + /* Re-use pbuf to send ARP reply. + Since we are re-using an existing pbuf, we can't call etharp_raw since + that would allocate a new pbuf. */ + hdr->opcode = htons(ARP_REPLY); + + hdr->dipaddr = hdr->sipaddr; + SMEMCPY(&hdr->sipaddr, &netif->ip_addr, sizeof(hdr->sipaddr)); + + LWIP_ASSERT("netif->hwaddr_len must be the same as ETHARP_HWADDR_LEN for etharp!", + (netif->hwaddr_len == ETHARP_HWADDR_LEN)); + i = ETHARP_HWADDR_LEN; +#if LWIP_AUTOIP + /* If we are using Link-Local, ARP packets must be broadcast on the + * link layer. (See RFC3927 Section 2.5) */ + ethdst_hwaddr = ((netif->autoip != NULL) && (netif->autoip->state != AUTOIP_STATE_OFF)) ? (u8_t*)(ethbroadcast.addr) : hdr->shwaddr.addr; +#endif /* LWIP_AUTOIP */ + + while(i > 0) { + i--; + hdr->dhwaddr.addr[i] = hdr->shwaddr.addr[i]; +#if LWIP_AUTOIP + ethhdr->dest.addr[i] = ethdst_hwaddr[i]; +#else /* LWIP_AUTOIP */ + ethhdr->dest.addr[i] = hdr->shwaddr.addr[i]; +#endif /* LWIP_AUTOIP */ + hdr->shwaddr.addr[i] = ethaddr->addr[i]; + ethhdr->src.addr[i] = ethaddr->addr[i]; + } + + /* hwtype, hwaddr_len, proto, protolen and the type in the ethernet header + are already correct, we tested that before */ + + /* return ARP reply */ + netif->linkoutput(netif, p); + /* we are not configured? */ + } else if (netif->ip_addr.addr == 0) { + /* { for_us == 0 and netif->ip_addr.addr == 0 } */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: we are unconfigured, ARP request ignored.\n")); + /* request was not directed to us */ + } else { + /* { for_us == 0 and netif->ip_addr.addr != 0 } */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: ARP request was not for us.\n")); + } + break; + case ARP_REPLY: + /* ARP reply. We already updated the ARP cache earlier. */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: incoming ARP reply\n")); +#if (LWIP_DHCP && DHCP_DOES_ARP_CHECK) + /* DHCP wants to know about ARP replies from any host with an + * IP address also offered to us by the DHCP server. We do not + * want to take a duplicate IP address on a single network. + * @todo How should we handle redundant (fail-over) interfaces? */ + dhcp_arp_reply(netif, &sipaddr); +#endif + break; + default: + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_arp_input: ARP unknown opcode type %"S16_F"\n", htons(hdr->opcode))); + ETHARP_STATS_INC(etharp.err); + break; + } + /* free ARP packet */ + pbuf_free(p); +} + +/** + * Resolve and fill-in Ethernet address header for outgoing IP packet. + * + * For IP multicast and broadcast, corresponding Ethernet addresses + * are selected and the packet is transmitted on the link. + * + * For unicast addresses, the packet is submitted to etharp_query(). In + * case the IP address is outside the local network, the IP address of + * the gateway is used. + * + * @param netif The lwIP network interface which the IP packet will be sent on. + * @param q The pbuf(s) containing the IP packet to be sent. + * @param ipaddr The IP address of the packet destination. + * + * @return + * - ERR_RTE No route to destination (no gateway to external networks), + * or the return type of either etharp_query() or etharp_send_ip(). + */ +err_t +etharp_output(struct netif *netif, struct pbuf *q, struct ip_addr *ipaddr) +{ + struct eth_addr *dest, mcastaddr; + + /* make room for Ethernet header - should not fail */ + if (pbuf_header(q, sizeof(struct eth_hdr)) != 0) { + /* bail out */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("etharp_output: could not allocate room for header.\n")); + LINK_STATS_INC(link.lenerr); + return ERR_BUF; + } + + /* assume unresolved Ethernet address */ + dest = NULL; + /* Determine on destination hardware address. Broadcasts and multicasts + * are special, other IP addresses are looked up in the ARP table. */ + + /* broadcast destination IP address? */ + if (ip_addr_isbroadcast(ipaddr, netif)) { + /* broadcast on Ethernet also */ + dest = (struct eth_addr *)ðbroadcast; + /* multicast destination IP address? */ + } else if (ip_addr_ismulticast(ipaddr)) { + /* Hash IP multicast address to MAC address.*/ + mcastaddr.addr[0] = 0x01; + mcastaddr.addr[1] = 0x00; + mcastaddr.addr[2] = 0x5e; + mcastaddr.addr[3] = ip4_addr2(ipaddr) & 0x7f; + mcastaddr.addr[4] = ip4_addr3(ipaddr); + mcastaddr.addr[5] = ip4_addr4(ipaddr); + /* destination Ethernet address is multicast */ + dest = &mcastaddr; + /* unicast destination IP address? */ + } else { + /* outside local network? */ + if (!ip_addr_netcmp(ipaddr, &(netif->ip_addr), &(netif->netmask))) { + /* interface has default gateway? */ + if (netif->gw.addr != 0) { + /* send to hardware address of default gateway IP address */ + ipaddr = &(netif->gw); + /* no default gateway available */ + } else { + /* no route to destination error (default gateway missing) */ + return ERR_RTE; + } + } + /* queue on destination Ethernet address belonging to ipaddr */ + return etharp_query(netif, ipaddr, q); + } + + /* continuation for multicast/broadcast destinations */ + /* obtain source Ethernet address of the given interface */ + /* send packet directly on the link */ + return etharp_send_ip(netif, q, (struct eth_addr*)(netif->hwaddr), dest); +} + +/** + * Send an ARP request for the given IP address and/or queue a packet. + * + * If the IP address was not yet in the cache, a pending ARP cache entry + * is added and an ARP request is sent for the given address. The packet + * is queued on this entry. + * + * If the IP address was already pending in the cache, a new ARP request + * is sent for the given address. The packet is queued on this entry. + * + * If the IP address was already stable in the cache, and a packet is + * given, it is directly sent and no ARP request is sent out. + * + * If the IP address was already stable in the cache, and no packet is + * given, an ARP request is sent out. + * + * @param netif The lwIP network interface on which ipaddr + * must be queried for. + * @param ipaddr The IP address to be resolved. + * @param q If non-NULL, a pbuf that must be delivered to the IP address. + * q is not freed by this function. + * + * @note q must only be ONE packet, not a packet queue! + * + * @return + * - ERR_BUF Could not make room for Ethernet header. + * - ERR_MEM Hardware address unknown, and no more ARP entries available + * to query for address or queue the packet. + * - ERR_MEM Could not queue packet due to memory shortage. + * - ERR_RTE No route to destination (no gateway to external networks). + * - ERR_ARG Non-unicast address given, those will not appear in ARP cache. + * + */ +err_t +etharp_query(struct netif *netif, struct ip_addr *ipaddr, struct pbuf *q) +{ + struct eth_addr * srcaddr = (struct eth_addr *)netif->hwaddr; + err_t result = ERR_MEM; + s8_t i; /* ARP entry index */ + + /* non-unicast address? */ + if (ip_addr_isbroadcast(ipaddr, netif) || + ip_addr_ismulticast(ipaddr) || + ip_addr_isany(ipaddr)) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: will not add non-unicast IP address to ARP cache\n")); + return ERR_ARG; + } + + /* find entry in ARP cache, ask to create entry if queueing packet */ +#if LWIP_NETIF_HWADDRHINT + i = find_entry(ipaddr, ETHARP_TRY_HARD, netif); +#else /* LWIP_NETIF_HWADDRHINT */ + i = find_entry(ipaddr, ETHARP_TRY_HARD); +#endif /* LWIP_NETIF_HWADDRHINT */ + + /* could not find or create entry? */ + if (i < 0) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not create ARP entry\n")); + if (q) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: packet dropped\n")); + ETHARP_STATS_INC(etharp.memerr); + } + return (err_t)i; + } + + /* mark a fresh entry as pending (we just sent a request) */ + if (arp_table[i].state == ETHARP_STATE_EMPTY) { + arp_table[i].state = ETHARP_STATE_PENDING; + } + + /* { i is either a STABLE or (new or existing) PENDING entry } */ + LWIP_ASSERT("arp_table[i].state == PENDING or STABLE", + ((arp_table[i].state == ETHARP_STATE_PENDING) || + (arp_table[i].state == ETHARP_STATE_STABLE))); + + /* do we have a pending entry? or an implicit query request? */ + if ((arp_table[i].state == ETHARP_STATE_PENDING) || (q == NULL)) { + /* try to resolve it; send out ARP request */ + result = etharp_request(netif, ipaddr); + if (result != ERR_OK) { + /* ARP request couldn't be sent */ + /* We don't re-send arp request in etharp_tmr, but we still queue packets, + since this failure could be temporary, and the next packet calling + etharp_query again could lead to sending the queued packets. */ + } + } + + /* packet given? */ + if (q != NULL) { + /* stable entry? */ + if (arp_table[i].state == ETHARP_STATE_STABLE) { + /* we have a valid IP->Ethernet address mapping */ + /* send the packet */ + result = etharp_send_ip(netif, q, srcaddr, &(arp_table[i].ethaddr)); + /* pending entry? (either just created or already pending */ + } else if (arp_table[i].state == ETHARP_STATE_PENDING) { +#if ARP_QUEUEING /* queue the given q packet */ + struct pbuf *p; + int copy_needed = 0; + /* IF q includes a PBUF_REF, PBUF_POOL or PBUF_RAM, we have no choice but + * to copy the whole queue into a new PBUF_RAM (see bug #11400) + * PBUF_ROMs can be left as they are, since ROM must not get changed. */ + p = q; + while (p) { + LWIP_ASSERT("no packet queues allowed!", (p->len != p->tot_len) || (p->next == 0)); + if(p->type != PBUF_ROM) { + copy_needed = 1; + break; + } + p = p->next; + } + if(copy_needed) { + /* copy the whole packet into new pbufs */ + p = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); + if(p != NULL) { + if (pbuf_copy(p, q) != ERR_OK) { + pbuf_free(p); + p = NULL; + } + } + } else { + /* referencing the old pbuf is enough */ + p = q; + pbuf_ref(p); + } + /* packet could be taken over? */ + if (p != NULL) { + /* queue packet ... */ + struct etharp_q_entry *new_entry; + /* allocate a new arp queue entry */ + new_entry = memp_malloc(MEMP_ARP_QUEUE); + if (new_entry != NULL) { + new_entry->next = 0; + new_entry->p = p; + if(arp_table[i].q != NULL) { + /* queue was already existent, append the new entry to the end */ + struct etharp_q_entry *r; + r = arp_table[i].q; + while (r->next != NULL) { + r = r->next; + } + r->next = new_entry; + } else { + /* queue did not exist, first item in queue */ + arp_table[i].q = new_entry; + } + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: queued packet %p on ARP entry %"S16_F"\n", (void *)q, (s16_t)i)); + result = ERR_OK; + } else { + /* the pool MEMP_ARP_QUEUE is empty */ + pbuf_free(p); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); + /* { result == ERR_MEM } through initialization */ + } + } else { + ETHARP_STATS_INC(etharp.memerr); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: could not queue a copy of PBUF_REF packet %p (out of memory)\n", (void *)q)); + /* { result == ERR_MEM } through initialization */ + } +#else /* ARP_QUEUEING == 0 */ + /* q && state == PENDING && ARP_QUEUEING == 0 => result = ERR_MEM */ + /* { result == ERR_MEM } through initialization */ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_query: Ethernet destination address unknown, queueing disabled, packet %p dropped\n", (void *)q)); +#endif + } + } + return result; +} + +/** + * Send a raw ARP packet (opcode and all addresses can be modified) + * + * @param netif the lwip network interface on which to send the ARP packet + * @param ethsrc_addr the source MAC address for the ethernet header + * @param ethdst_addr the destination MAC address for the ethernet header + * @param hwsrc_addr the source MAC address for the ARP protocol header + * @param ipsrc_addr the source IP address for the ARP protocol header + * @param hwdst_addr the destination MAC address for the ARP protocol header + * @param ipdst_addr the destination IP address for the ARP protocol header + * @param opcode the type of the ARP packet + * @return ERR_OK if the ARP packet has been sent + * ERR_MEM if the ARP packet couldn't be allocated + * any other err_t on failure + */ +#if !LWIP_AUTOIP +static +#endif /* LWIP_AUTOIP */ +err_t +etharp_raw(struct netif *netif, const struct eth_addr *ethsrc_addr, + const struct eth_addr *ethdst_addr, + const struct eth_addr *hwsrc_addr, const struct ip_addr *ipsrc_addr, + const struct eth_addr *hwdst_addr, const struct ip_addr *ipdst_addr, + const u16_t opcode) +{ + struct pbuf *p; + err_t result = ERR_OK; + u8_t k; /* ARP entry index */ + struct eth_hdr *ethhdr; + struct etharp_hdr *hdr; +#if LWIP_AUTOIP + const u8_t * ethdst_hwaddr; +#endif /* LWIP_AUTOIP */ + + /* allocate a pbuf for the outgoing ARP request packet */ + p = pbuf_alloc(PBUF_RAW, SIZEOF_ETHARP_PACKET, PBUF_RAM); + /* could allocate a pbuf for an ARP request? */ + if (p == NULL) { + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, + ("etharp_raw: could not allocate pbuf for ARP request.\n")); + ETHARP_STATS_INC(etharp.memerr); + return ERR_MEM; + } + LWIP_ASSERT("check that first pbuf can hold struct etharp_hdr", + (p->len >= SIZEOF_ETHARP_PACKET)); + + ethhdr = p->payload; + hdr = (struct etharp_hdr *)((u8_t*)ethhdr + SIZEOF_ETH_HDR); + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_raw: sending raw ARP packet.\n")); + hdr->opcode = htons(opcode); + + LWIP_ASSERT("netif->hwaddr_len must be the same as ETHARP_HWADDR_LEN for etharp!", + (netif->hwaddr_len == ETHARP_HWADDR_LEN)); + k = ETHARP_HWADDR_LEN; +#if LWIP_AUTOIP + /* If we are using Link-Local, ARP packets must be broadcast on the + * link layer. (See RFC3927 Section 2.5) */ + ethdst_hwaddr = ((netif->autoip != NULL) && (netif->autoip->state != AUTOIP_STATE_OFF)) ? (u8_t*)(ethbroadcast.addr) : ethdst_addr->addr; +#endif /* LWIP_AUTOIP */ + /* Write MAC-Addresses (combined loop for both headers) */ + while(k > 0) { + k--; + /* Write the ARP MAC-Addresses */ + hdr->shwaddr.addr[k] = hwsrc_addr->addr[k]; + hdr->dhwaddr.addr[k] = hwdst_addr->addr[k]; + /* Write the Ethernet MAC-Addresses */ +#if LWIP_AUTOIP + ethhdr->dest.addr[k] = ethdst_hwaddr[k]; +#else /* LWIP_AUTOIP */ + ethhdr->dest.addr[k] = ethdst_addr->addr[k]; +#endif /* LWIP_AUTOIP */ + ethhdr->src.addr[k] = ethsrc_addr->addr[k]; + } + hdr->sipaddr = *(struct ip_addr2 *)ipsrc_addr; + hdr->dipaddr = *(struct ip_addr2 *)ipdst_addr; + + hdr->hwtype = htons(HWTYPE_ETHERNET); + hdr->proto = htons(ETHTYPE_IP); + /* set hwlen and protolen together */ + hdr->_hwlen_protolen = htons((ETHARP_HWADDR_LEN << 8) | sizeof(struct ip_addr)); + + ethhdr->type = htons(ETHTYPE_ARP); + /* send ARP query */ + result = netif->linkoutput(netif, p); + ETHARP_STATS_INC(etharp.xmit); + /* free ARP query packet */ + pbuf_free(p); + p = NULL; + /* could not allocate pbuf for ARP request */ + + return result; +} + +/** + * Send an ARP request packet asking for ipaddr. + * + * @param netif the lwip network interface on which to send the request + * @param ipaddr the IP address for which to ask + * @return ERR_OK if the request has been sent + * ERR_MEM if the ARP packet couldn't be allocated + * any other err_t on failure + */ +err_t +etharp_request(struct netif *netif, struct ip_addr *ipaddr) +{ + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, ("etharp_request: sending ARP request.\n")); + return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, ðbroadcast, + (struct eth_addr *)netif->hwaddr, &netif->ip_addr, ðzero, + ipaddr, ARP_REQUEST); +} + +/** + * Process received ethernet frames. Using this function instead of directly + * calling ip_input and passing ARP frames through etharp in ethernetif_input, + * the ARP cache is protected from concurrent access. + * + * @param p the recevied packet, p->payload pointing to the ethernet header + * @param netif the network interface on which the packet was received + */ +err_t +ethernet_input(struct pbuf *p, struct netif *netif) +{ + struct eth_hdr* ethhdr; + u16_t type; + + /* points to packet payload, which starts with an Ethernet header */ + ethhdr = p->payload; + LWIP_DEBUGF(ETHARP_DEBUG | LWIP_DBG_TRACE, + ("ethernet_input: dest:%02x:%02x:%02x:%02x:%02x:%02x, src:%02x:%02x:%02x:%02x:%02x:%02x, type:%2hx\n", + (unsigned)ethhdr->dest.addr[0], (unsigned)ethhdr->dest.addr[1], (unsigned)ethhdr->dest.addr[2], + (unsigned)ethhdr->dest.addr[3], (unsigned)ethhdr->dest.addr[4], (unsigned)ethhdr->dest.addr[5], + (unsigned)ethhdr->src.addr[0], (unsigned)ethhdr->src.addr[1], (unsigned)ethhdr->src.addr[2], + (unsigned)ethhdr->src.addr[3], (unsigned)ethhdr->src.addr[4], (unsigned)ethhdr->src.addr[5], + (unsigned)htons(ethhdr->type))); + + type = htons(ethhdr->type); +#if ETHARP_SUPPORT_VLAN + if (type == ETHTYPE_VLAN) { + struct eth_vlan_hdr *vlan = (struct eth_vlan_hdr*)(((char*)ethhdr) + SIZEOF_ETH_HDR); +#ifdef ETHARP_VLAN_CHECK /* if not, allow all VLANs */ + if (VLAN_ID(vlan) != ETHARP_VLAN_CHECK) { + /* silently ignore this packet: not for our VLAN */ + pbuf_free(p); + return ERR_OK; + } +#endif /* ETHARP_VLAN_CHECK */ + type = htons(vlan->tpid); + } +#endif /* ETHARP_SUPPORT_VLAN */ + + switch (type) { + /* IP packet? */ + case ETHTYPE_IP: +#if ETHARP_TRUST_IP_MAC + /* update ARP table */ + etharp_ip_input(netif, p); +#endif /* ETHARP_TRUST_IP_MAC */ + /* skip Ethernet header */ + if(pbuf_header(p, -(s16_t)SIZEOF_ETH_HDR)) { + LWIP_ASSERT("Can't move over header in packet", 0); + pbuf_free(p); + p = NULL; + } else { + /* pass to IP layer */ + ip_input(p, netif); + } + break; + + case ETHTYPE_ARP: + /* pass p to ARP module */ + etharp_arp_input(netif, (struct eth_addr*)(netif->hwaddr), p); + break; + +#if PPPOE_SUPPORT + case ETHTYPE_PPPOEDISC: /* PPP Over Ethernet Discovery Stage */ + pppoe_disc_input(netif, p); + break; + + case ETHTYPE_PPPOE: /* PPP Over Ethernet Session Stage */ + pppoe_data_input(netif, p); + break; +#endif /* PPPOE_SUPPORT */ + + default: + ETHARP_STATS_INC(etharp.proterr); + ETHARP_STATS_INC(etharp.drop); + pbuf_free(p); + p = NULL; + break; + } + + /* This means the pbuf is freed or consumed, + so the caller doesn't have to free it again */ + return ERR_OK; +} +#endif /* LWIP_ARP */ diff --git a/bertos/net/lwip/src/netif/ethernetif.c b/bertos/net/lwip/src/netif/ethernetif.c new file mode 100644 index 0000000..336614d --- /dev/null +++ b/bertos/net/lwip/src/netif/ethernetif.c @@ -0,0 +1,353 @@ +/** + * \file + * + * + * \brief Ethernet driver glue for lwIP + * + * \author Andrea Righi + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ + +/* + * This file is a skeleton for developing Ethernet network interface + * drivers for lwIP. Add code to the low_level functions and do a + * search-and-replace for the word "ethernetif" to replace it with + * something that better describes your network interface. + */ + +#include "cfg/cfg_lwip.h" + +#include + +#include + +#include + +#include +#include +#include +#include +#include +#include + +#include +#include + +#include + +/* Define those to better describe your network interface. */ +#define IFNAME0 'e' +#define IFNAME1 '0' + +/** + * Helper struct to hold private data used to operate your ethernet interface. + * Keeping the ethernet address of the MAC in this struct is not necessary + * as it is already kept in the struct netif. + * But this is only an example, anyway... + */ +struct ethernetif +{ + struct eth_addr *ethaddr; + /* Add whatever per-interface state that is needed here. */ +}; + +/** + * In this function, the hardware should be initialized. + * Called from ethernetif_init(). + * + * @param netif the already initialized lwip network interface structure + * for this ethernetif + */ +static void low_level_init(struct netif *netif) +{ + /* set MAC hardware address length */ + netif->hwaddr_len = ETHARP_HWADDR_LEN; + + /* set MAC hardware address */ + netif->hwaddr[0] = mac_addr[0]; + netif->hwaddr[1] = mac_addr[1]; + netif->hwaddr[2] = mac_addr[2]; + netif->hwaddr[3] = mac_addr[3]; + netif->hwaddr[4] = mac_addr[4]; + netif->hwaddr[5] = mac_addr[5]; + + /* maximum transfer unit */ + netif->mtu = 1500; + + /* device capabilities */ + /* don't set NETIF_FLAG_ETHARP if this device is not an ethernet one */ + netif->flags = NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_LINK_UP; + + eth_init(); +} + +/** + * This function should do the actual transmission of the packet. The packet is + * contained in the pbuf that is passed to the function. This pbuf + * might be chained. + * + * @param netif the lwip network interface structure for this ethernetif + * @param p the MAC packet to send (e.g. IP packet including MAC addresses and type) + * @return ERR_OK if the packet could be sent + * an err_t value if the packet couldn't be sent + * + * @note Returning ERR_MEM here if a DMA queue of your MAC is full can lead to + * strange results. You might consider waiting for space in the DMA queue + * to become availale since the stack doesn't retry to send a packet + * dropped because of memory failure (except for the TCP timers). + */ + +static err_t low_level_output(UNUSED_ARG(struct netif *, netif), struct pbuf *p) +{ + struct pbuf *q; + + #if ETH_PAD_SIZE + pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */ + #endif + + proc_forbid(); + for (q = p; q != NULL; q = q->next) + eth_putFrame(q->payload, q->len); + eth_sendFrame(); + + #if ETH_PAD_SIZE + pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */ + #endif + + LINK_STATS_INC(link.xmit); + proc_permit(); + + return ERR_OK; +} + +/** + * Should allocate a pbuf and transfer the bytes of the incoming + * packet from the interface into the pbuf. + * + * @param netif the lwip network interface structure for this ethernetif + * @return a pbuf filled with the received packet (including MAC header) + * NULL on memory error + */ +static struct pbuf *low_level_input(UNUSED_ARG(struct netif *, netif)) +{ + struct pbuf *p, *q; + size_t len; + + len = eth_getFrameLen(); + if (UNLIKELY(len <= 0)) + return NULL; + + #if ETH_PAD_SIZE + len += ETH_PAD_SIZE; /* allow room for Ethernet padding */ + #endif + + proc_forbid(); + /* We allocate a pbuf chain of pbufs from the pool. */ + p = pbuf_alloc(PBUF_RAW, len, PBUF_POOL); + if (p != NULL) + { + #if ETH_PAD_SIZE + pbuf_header(p, -ETH_PAD_SIZE); /* drop the padding word */ + #endif + + for (q = p; q != NULL; q = q->next) + eth_getFrame(q->payload, q->len); + + #if ETH_PAD_SIZE + pbuf_header(p, ETH_PAD_SIZE); /* reclaim the padding word */ + #endif + + LINK_STATS_INC(link.recv); + } + else + { + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.drop); + } + proc_permit(); + + return p; +} + +/** + * This function should be called when a packet is ready to be read + * from the interface. It uses the function low_level_input() that + * should handle the actual reception of bytes from the network + * interface. Then the type of the received packet is determined and + * the appropriate input function is called. + * + * @param netif the lwip network interface structure for this ethernetif + */ +static void ethernetif_input(struct netif *netif) +{ + struct ethernetif *ethernetif; + struct eth_hdr *ethhdr; + struct pbuf *p; + + ethernetif = netif->state; + + /* move received packet into a new pbuf */ + p = low_level_input(netif); + /* no packet could be read, silently ignore this */ + if (p == NULL) + return; + /* points to packet payload, which starts with an Ethernet header */ + ethhdr = p->payload; + + switch (htons(ethhdr->type)) + { + /* IP or ARP packet? */ + case ETHTYPE_IP: + case ETHTYPE_ARP: +#if PPPOE_SUPPORT + /* PPPoE packet? */ + case ETHTYPE_PPPOEDISC: + case ETHTYPE_PPPOE: +#endif /* PPPOE_SUPPORT */ + /* full packet send to tcpip_thread to process */ + if (netif->input(p, netif) != ERR_OK) + { + LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_input: IP input error\n")); + pbuf_free(p); + p = NULL; + } + break; + + default: + pbuf_free(p); + p = NULL; + break; + } +} + + +static NORETURN void ethernetif_loop(void *arg) +{ + struct netif *netif = (struct netif *)arg; + while (1) + ethernetif_input(netif); +} + +/** + * Should be called at the beginning of the program to set up the + * network interface. It calls the function low_level_init() to do the + * actual setup of the hardware. + * + * This function should be passed as a parameter to netif_add(). + * + * @param netif the lwip network interface structure for this ethernetif + * @return ERR_OK if the loopif is initialized + * ERR_MEM if private data couldn't be allocated + * any other err_t on error + */ +err_t ethernetif_init(struct netif *netif) +{ + struct ethernetif *ethernetif; + + LWIP_ASSERT("netif != NULL", (netif != NULL)); + + ethernetif = mem_malloc(sizeof(struct ethernetif)); + if (ethernetif == NULL) + { + LWIP_DEBUGF(NETIF_DEBUG, ("ethernetif_init: out of memory\n")); + return ERR_MEM; + } + + /* + * Initialize the snmp variables and counters inside the struct netif. + * The last argument should be replaced with your link speed, in units + * of bits per second. + */ + NETIF_INIT_SNMP(netif, snmp_ifType_ethernet_csmacd, LINK_SPEED_OF_YOUR_NETIF_IN_BPS); + + netif->state = ethernetif; + + netif->hwaddr_len = 6; + netif->name[0] = IFNAME0; + netif->name[1] = IFNAME1; + netif->mtu = 1500; + + + /* We directly use etharp_output() here to save a function call. + * You can instead declare your own function an call etharp_output() + * from it if you have to do some checks before sending (e.g. if link + * is available...) + */ + netif->output = etharp_output; + netif->linkoutput = low_level_output; + + ethernetif->ethaddr = (struct eth_addr *)&(netif->hwaddr[0]); + + /* initialize the hardware */ + low_level_init(netif); + etharp_init(); + + if (!sys_thread_new((char *)"eth_thread", ethernetif_loop, netif, + DEFAULT_THREAD_STACKSIZE, DEFAULT_THREAD_PRIO)) + { + LWIP_DEBUGF(NETIF_DEBUG, + ("ethernetif_init: max number of threads exceeded\n")); + mem_free(ethernetif); + return ERR_MEM; + } + return ERR_OK; +} diff --git a/bertos/net/lwip/src/netif/loopif.c b/bertos/net/lwip/src/netif/loopif.c new file mode 100644 index 0000000..1e1f28c --- /dev/null +++ b/bertos/net/lwip/src/netif/loopif.c @@ -0,0 +1,66 @@ +/** + * @file + * Loop Interface + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED + * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT + * SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT + * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING + * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * This file is part of the lwIP TCP/IP stack. + * + * Author: Adam Dunkels + * + */ +#include "lwip/opt.h" + +#if LWIP_HAVE_LOOPIF + +#include "netif/loopif.h" +#include "lwip/snmp.h" + +/** + * Initialize a lwip network interface structure for a loopback interface + * + * @param netif the lwip network interface structure for this loopif + * @return ERR_OK if the loopif is initialized + * ERR_MEM if private data couldn't be allocated + */ +err_t +loopif_init(struct netif *netif) +{ + /* initialize the snmp variables and counters inside the struct netif + * ifSpeed: no assumption can be made! + */ + NETIF_INIT_SNMP(netif, snmp_ifType_softwareLoopback, 0); + + netif->name[0] = 'l'; + netif->name[1] = 'o'; + netif->output = netif_loop_output; + return ERR_OK; +} + +#endif /* LWIP_HAVE_LOOPIF */ diff --git a/bertos/net/lwip/src/netif/ppp/auth.c b/bertos/net/lwip/src/netif/ppp/auth.c new file mode 100644 index 0000000..cbd3eb2 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/auth.c @@ -0,0 +1,990 @@ +/***************************************************************************** +* auth.c - Network Authentication and Phase Control program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* Copyright (c) 1997 by Global Election Systems Inc. All rights reserved. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-08 Guy Lancaster , Global Election Systems Inc. +* Ported from public pppd code. +*****************************************************************************/ +/* + * auth.c - PPP authentication and phase control. + * + * Copyright (c) 1993 The Australian National University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by the Australian National University. The name of the University + * may not be used to endorse or promote products derived from this + * software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "fsm.h" +#include "lcp.h" +#include "pap.h" +#include "chap.h" +#include "auth.h" +#include "ipcp.h" + +#if CBCP_SUPPORT +#include "cbcp.h" +#endif /* CBCP_SUPPORT */ + +#include + +/*************************/ +/*** LOCAL DEFINITIONS ***/ +/*************************/ + +/* Bits in auth_pending[] */ +#define PAP_WITHPEER 1 +#define PAP_PEER 2 +#define CHAP_WITHPEER 4 +#define CHAP_PEER 8 + + +/************************/ +/*** LOCAL DATA TYPES ***/ +/************************/ +/* Used for storing a sequence of words. Usually malloced. */ +struct wordlist { + struct wordlist *next; + char word[1]; +}; + + +/***********************************/ +/*** LOCAL FUNCTION DECLARATIONS ***/ +/***********************************/ +extern char *crypt (const char *, const char *); + +/* Prototypes for procedures local to this file. */ + +static void network_phase (int); +static void check_idle (void *); +static void connect_time_expired (void *); +#if 0 +static int login (char *, char *, char **, int *); +#endif +static void logout (void); +static int null_login (int); +static int get_pap_passwd (int, char *, char *); +static int have_pap_secret (void); +static int have_chap_secret (char *, char *, u32_t); +static int ip_addr_check (u32_t, struct wordlist *); +#if 0 /* PAP_SUPPORT || CHAP_SUPPORT */ +static void set_allowed_addrs(int unit, struct wordlist *addrs); +static void free_wordlist (struct wordlist *); +#endif /* 0 */ /* PAP_SUPPORT || CHAP_SUPPORT */ +#if CBCP_SUPPORT +static void callback_phase (int); +#endif /* CBCP_SUPPORT */ + + +/******************************/ +/*** PUBLIC DATA STRUCTURES ***/ +/******************************/ + + +/*****************************/ +/*** LOCAL DATA STRUCTURES ***/ +/*****************************/ +#if PAP_SUPPORT || CHAP_SUPPORT +/* The name by which the peer authenticated itself to us. */ +static char peer_authname[MAXNAMELEN]; +#endif /* PAP_SUPPORT || CHAP_SUPPORT */ + +/* Records which authentication operations haven't completed yet. */ +static int auth_pending[NUM_PPP]; + +/* Set if we have successfully called login() */ +static int logged_in; + +/* Set if we have run the /etc/ppp/auth-up script. */ +static int did_authup; + +/* List of addresses which the peer may use. */ +static struct wordlist *addresses[NUM_PPP]; + +/* Number of network protocols which we have opened. */ +static int num_np_open; + +/* Number of network protocols which have come up. */ +static int num_np_up; + +#if PAP_SUPPORT || CHAP_SUPPORT +/* Set if we got the contents of passwd[] from the pap-secrets file. */ +static int passwd_from_file; +#endif /* PAP_SUPPORT || CHAP_SUPPORT */ + + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ +/* + * An Open on LCP has requested a change from Dead to Establish phase. + * Do what's necessary to bring the physical layer up. + */ +void +link_required(int unit) +{ + LWIP_UNUSED_ARG(unit); + + AUTHDEBUG((LOG_INFO, "link_required: %d\n", unit)); +} + +/* + * LCP has terminated the link; go to the Dead phase and take the + * physical layer down. + */ +void +link_terminated(int unit) +{ + AUTHDEBUG((LOG_INFO, "link_terminated: %d\n", unit)); + if (lcp_phase[unit] == PHASE_DEAD) { + return; + } + if (logged_in) { + logout(); + } + lcp_phase[unit] = PHASE_DEAD; + AUTHDEBUG((LOG_NOTICE, "Connection terminated.\n")); + pppLinkTerminated(unit); +} + +/* + * LCP has gone down; it will either die or try to re-establish. + */ +void +link_down(int unit) +{ + int i; + struct protent *protp; + + AUTHDEBUG((LOG_INFO, "link_down: %d\n", unit)); + if (did_authup) { + /* XXX Do link down processing. */ + did_authup = 0; + } + for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) { + if (!protp->enabled_flag) { + continue; + } + if (protp->protocol != PPP_LCP && protp->lowerdown != NULL) { + (*protp->lowerdown)(unit); + } + if (protp->protocol < 0xC000 && protp->close != NULL) { + (*protp->close)(unit, "LCP down"); + } + } + num_np_open = 0; + num_np_up = 0; + if (lcp_phase[unit] != PHASE_DEAD) { + lcp_phase[unit] = PHASE_TERMINATE; + } + pppLinkDown(unit); +} + +/* + * The link is established. + * Proceed to the Dead, Authenticate or Network phase as appropriate. + */ +void +link_established(int unit) +{ + int auth; + int i; + struct protent *protp; + lcp_options *wo = &lcp_wantoptions[unit]; + lcp_options *go = &lcp_gotoptions[unit]; +#if PAP_SUPPORT || CHAP_SUPPORT + lcp_options *ho = &lcp_hisoptions[unit]; +#endif /* PAP_SUPPORT || CHAP_SUPPORT */ + + AUTHDEBUG((LOG_INFO, "link_established: %d\n", unit)); + /* + * Tell higher-level protocols that LCP is up. + */ + for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) { + if (protp->protocol != PPP_LCP && protp->enabled_flag && protp->lowerup != NULL) { + (*protp->lowerup)(unit); + } + } + if (ppp_settings.auth_required && !(go->neg_chap || go->neg_upap)) { + /* + * We wanted the peer to authenticate itself, and it refused: + * treat it as though it authenticated with PAP using a username + * of "" and a password of "". If that's not OK, boot it out. + */ + if (!wo->neg_upap || !null_login(unit)) { + AUTHDEBUG((LOG_WARNING, "peer refused to authenticate\n")); + lcp_close(unit, "peer refused to authenticate"); + return; + } + } + + lcp_phase[unit] = PHASE_AUTHENTICATE; + auth = 0; +#if CHAP_SUPPORT + if (go->neg_chap) { + ChapAuthPeer(unit, ppp_settings.our_name, go->chap_mdtype); + auth |= CHAP_PEER; + } +#endif /* CHAP_SUPPORT */ +#if PAP_SUPPORT && CHAP_SUPPORT + else +#endif /* PAP_SUPPORT && CHAP_SUPPORT */ +#if PAP_SUPPORT + if (go->neg_upap) { + upap_authpeer(unit); + auth |= PAP_PEER; + } +#endif /* PAP_SUPPORT */ +#if CHAP_SUPPORT + if (ho->neg_chap) { + ChapAuthWithPeer(unit, ppp_settings.user, ho->chap_mdtype); + auth |= CHAP_WITHPEER; + } +#endif /* CHAP_SUPPORT */ +#if PAP_SUPPORT && CHAP_SUPPORT + else +#endif /* PAP_SUPPORT && CHAP_SUPPORT */ +#if PAP_SUPPORT + if (ho->neg_upap) { + if (ppp_settings.passwd[0] == 0) { + passwd_from_file = 1; + if (!get_pap_passwd(unit, ppp_settings.user, ppp_settings.passwd)) { + AUTHDEBUG((LOG_ERR, "No secret found for PAP login\n")); + } + } + upap_authwithpeer(unit, ppp_settings.user, ppp_settings.passwd); + auth |= PAP_WITHPEER; + } +#endif /* PAP_SUPPORT */ + auth_pending[unit] = auth; + + if (!auth) { + network_phase(unit); + } +} + +/* + * The peer has failed to authenticate himself using `protocol'. + */ +void +auth_peer_fail(int unit, u16_t protocol) +{ + LWIP_UNUSED_ARG(protocol); + + AUTHDEBUG((LOG_INFO, "auth_peer_fail: %d proto=%X\n", unit, protocol)); + /* + * Authentication failure: take the link down + */ + lcp_close(unit, "Authentication failed"); +} + + +#if PAP_SUPPORT || CHAP_SUPPORT +/* + * The peer has been successfully authenticated using `protocol'. + */ +void +auth_peer_success(int unit, u16_t protocol, char *name, int namelen) +{ + int pbit; + + AUTHDEBUG((LOG_INFO, "auth_peer_success: %d proto=%X\n", unit, protocol)); + switch (protocol) { + case PPP_CHAP: + pbit = CHAP_PEER; + break; + case PPP_PAP: + pbit = PAP_PEER; + break; + default: + AUTHDEBUG((LOG_WARNING, "auth_peer_success: unknown protocol %x\n", protocol)); + return; + } + + /* + * Save the authenticated name of the peer for later. + */ + if (namelen > sizeof(peer_authname) - 1) { + namelen = sizeof(peer_authname) - 1; + } + BCOPY(name, peer_authname, namelen); + peer_authname[namelen] = 0; + + /* + * If there is no more authentication still to be done, + * proceed to the network (or callback) phase. + */ + if ((auth_pending[unit] &= ~pbit) == 0) { + network_phase(unit); + } +} + +/* + * We have failed to authenticate ourselves to the peer using `protocol'. + */ +void +auth_withpeer_fail(int unit, u16_t protocol) +{ + int errCode = PPPERR_AUTHFAIL; + + LWIP_UNUSED_ARG(protocol); + + AUTHDEBUG((LOG_INFO, "auth_withpeer_fail: %d proto=%X\n", unit, protocol)); + if (passwd_from_file) { + BZERO(ppp_settings.passwd, MAXSECRETLEN); + } + /* + * XXX Warning: the unit number indicates the interface which is + * not necessarily the PPP connection. It works here as long + * as we are only supporting PPP interfaces. + */ + pppIOCtl(unit, PPPCTLS_ERRCODE, &errCode); + + /* + * We've failed to authenticate ourselves to our peer. + * He'll probably take the link down, and there's not much + * we can do except wait for that. + */ +} + +/* + * We have successfully authenticated ourselves with the peer using `protocol'. + */ +void +auth_withpeer_success(int unit, u16_t protocol) +{ + int pbit; + + AUTHDEBUG((LOG_INFO, "auth_withpeer_success: %d proto=%X\n", unit, protocol)); + switch (protocol) { + case PPP_CHAP: + pbit = CHAP_WITHPEER; + break; + case PPP_PAP: + if (passwd_from_file) { + BZERO(ppp_settings.passwd, MAXSECRETLEN); + } + pbit = PAP_WITHPEER; + break; + default: + AUTHDEBUG((LOG_WARNING, "auth_peer_success: unknown protocol %x\n", protocol)); + pbit = 0; + } + + /* + * If there is no more authentication still being done, + * proceed to the network (or callback) phase. + */ + if ((auth_pending[unit] &= ~pbit) == 0) { + network_phase(unit); + } +} +#endif /* PAP_SUPPORT || CHAP_SUPPORT */ + + +/* + * np_up - a network protocol has come up. + */ +void +np_up(int unit, u16_t proto) +{ + LWIP_UNUSED_ARG(unit); + LWIP_UNUSED_ARG(proto); + + AUTHDEBUG((LOG_INFO, "np_up: %d proto=%X\n", unit, proto)); + if (num_np_up == 0) { + AUTHDEBUG((LOG_INFO, "np_up: maxconnect=%d idle_time_limit=%d\n",ppp_settings.maxconnect,ppp_settings.idle_time_limit)); + /* + * At this point we consider that the link has come up successfully. + */ + if (ppp_settings.idle_time_limit > 0) { + TIMEOUT(check_idle, NULL, ppp_settings.idle_time_limit); + } + + /* + * Set a timeout to close the connection once the maximum + * connect time has expired. + */ + if (ppp_settings.maxconnect > 0) { + TIMEOUT(connect_time_expired, 0, ppp_settings.maxconnect); + } + } + ++num_np_up; +} + +/* + * np_down - a network protocol has gone down. + */ +void +np_down(int unit, u16_t proto) +{ + LWIP_UNUSED_ARG(unit); + LWIP_UNUSED_ARG(proto); + + AUTHDEBUG((LOG_INFO, "np_down: %d proto=%X\n", unit, proto)); + if (--num_np_up == 0 && ppp_settings.idle_time_limit > 0) { + UNTIMEOUT(check_idle, NULL); + } +} + +/* + * np_finished - a network protocol has finished using the link. + */ +void +np_finished(int unit, u16_t proto) +{ + LWIP_UNUSED_ARG(unit); + LWIP_UNUSED_ARG(proto); + + AUTHDEBUG((LOG_INFO, "np_finished: %d proto=%X\n", unit, proto)); + if (--num_np_open <= 0) { + /* no further use for the link: shut up shop. */ + lcp_close(0, "No network protocols running"); + } +} + +/* + * auth_reset - called when LCP is starting negotiations to recheck + * authentication options, i.e. whether we have appropriate secrets + * to use for authenticating ourselves and/or the peer. + */ +void +auth_reset(int unit) +{ + lcp_options *go = &lcp_gotoptions[unit]; + lcp_options *ao = &lcp_allowoptions[0]; + ipcp_options *ipwo = &ipcp_wantoptions[0]; + u32_t remote; + + AUTHDEBUG((LOG_INFO, "auth_reset: %d\n", unit)); + ao->neg_upap = !ppp_settings.refuse_pap && (ppp_settings.passwd[0] != 0 || get_pap_passwd(unit, NULL, NULL)); + ao->neg_chap = !ppp_settings.refuse_chap && ppp_settings.passwd[0] != 0 /*have_chap_secret(ppp_settings.user, ppp_settings.remote_name, (u32_t)0)*/; + + if (go->neg_upap && !have_pap_secret()) { + go->neg_upap = 0; + } + if (go->neg_chap) { + remote = ipwo->accept_remote? 0: ipwo->hisaddr; + if (!have_chap_secret(ppp_settings.remote_name, ppp_settings.our_name, remote)) { + go->neg_chap = 0; + } + } +} + +#if PAP_SUPPORT +/* + * check_passwd - Check the user name and passwd against the PAP secrets + * file. If requested, also check against the system password database, + * and login the user if OK. + * + * returns: + * UPAP_AUTHNAK: Authentication failed. + * UPAP_AUTHACK: Authentication succeeded. + * In either case, msg points to an appropriate message. + */ +int +check_passwd( int unit, char *auser, int userlen, char *apasswd, int passwdlen, char **msg, int *msglen) +{ +#if 1 + LWIP_UNUSED_ARG(unit); + LWIP_UNUSED_ARG(auser); + LWIP_UNUSED_ARG(userlen); + LWIP_UNUSED_ARG(apasswd); + LWIP_UNUSED_ARG(passwdlen); + LWIP_UNUSED_ARG(msglen); + *msg = (char *) 0; + return UPAP_AUTHACK; /* XXX Assume all entries OK. */ +#else + int ret = 0; + struct wordlist *addrs = NULL; + char passwd[256], user[256]; + char secret[MAXWORDLEN]; + static u_short attempts = 0; + + /* + * Make copies of apasswd and auser, then null-terminate them. + */ + BCOPY(apasswd, passwd, passwdlen); + passwd[passwdlen] = '\0'; + BCOPY(auser, user, userlen); + user[userlen] = '\0'; + *msg = (char *) 0; + + /* XXX Validate user name and password. */ + ret = UPAP_AUTHACK; /* XXX Assume all entries OK. */ + + if (ret == UPAP_AUTHNAK) { + if (*msg == (char *) 0) { + *msg = "Login incorrect"; + } + *msglen = strlen(*msg); + /* + * Frustrate passwd stealer programs. + * Allow 10 tries, but start backing off after 3 (stolen from login). + * On 10'th, drop the connection. + */ + if (attempts++ >= 10) { + AUTHDEBUG((LOG_WARNING, "%d LOGIN FAILURES BY %s\n", attempts, user)); + /*ppp_panic("Excess Bad Logins");*/ + } + if (attempts > 3) { + sys_msleep((attempts - 3) * 5); + } + if (addrs != NULL) { + free_wordlist(addrs); + } + } else { + attempts = 0; /* Reset count */ + if (*msg == (char *) 0) { + *msg = "Login ok"; + } + *msglen = strlen(*msg); + set_allowed_addrs(unit, addrs); + } + + BZERO(passwd, sizeof(passwd)); + BZERO(secret, sizeof(secret)); + + return ret; +#endif +} +#endif /* PAP_SUPPORT */ + + +/* + * auth_ip_addr - check whether the peer is authorized to use + * a given IP address. Returns 1 if authorized, 0 otherwise. + */ +int +auth_ip_addr(int unit, u32_t addr) +{ + return ip_addr_check(addr, addresses[unit]); +} + +/* + * bad_ip_adrs - return 1 if the IP address is one we don't want + * to use, such as an address in the loopback net or a multicast address. + * addr is in network byte order. + */ +int +bad_ip_adrs(u32_t addr) +{ + addr = ntohl(addr); + return (addr >> IN_CLASSA_NSHIFT) == IN_LOOPBACKNET + || IN_MULTICAST(addr) || IN_BADCLASS(addr); +} + + +#if CHAP_SUPPORT +/* + * get_secret - open the CHAP secret file and return the secret + * for authenticating the given client on the given server. + * (We could be either client or server). + */ +int get_secret( int unit, char *client, char *server, char *secret, int *secret_len, int save_addrs) +{ +#if 1 + int len; + struct wordlist *addrs; + + LWIP_UNUSED_ARG(unit); + LWIP_UNUSED_ARG(server); + LWIP_UNUSED_ARG(save_addrs); + + addrs = NULL; + + if(!client || !client[0] || strcmp(client, ppp_settings.user)) { + return 0; + } + + len = strlen(ppp_settings.passwd); + if (len > MAXSECRETLEN) { + AUTHDEBUG((LOG_ERR, "Secret for %s on %s is too long\n", client, server)); + len = MAXSECRETLEN; + } + + BCOPY(ppp_settings.passwd, secret, len); + *secret_len = len; + + return 1; +#else + int ret = 0, len; + struct wordlist *addrs; + char secbuf[MAXWORDLEN]; + + addrs = NULL; + secbuf[0] = 0; + + /* XXX Find secret. */ + if (ret < 0) { + return 0; + } + + if (save_addrs) { + set_allowed_addrs(unit, addrs); + } + + len = strlen(secbuf); + if (len > MAXSECRETLEN) { + AUTHDEBUG((LOG_ERR, "Secret for %s on %s is too long\n", client, server)); + len = MAXSECRETLEN; + } + + BCOPY(secbuf, secret, len); + BZERO(secbuf, sizeof(secbuf)); + *secret_len = len; + + return 1; +#endif +} +#endif /* CHAP_SUPPORT */ + + +#if 0 /* UNUSED */ +/* + * auth_check_options - called to check authentication options. + */ +void +auth_check_options(void) +{ + lcp_options *wo = &lcp_wantoptions[0]; + int can_auth; + ipcp_options *ipwo = &ipcp_wantoptions[0]; + u32_t remote; + + /* Default our_name to hostname, and user to our_name */ + if (ppp_settings.our_name[0] == 0 || ppp_settings.usehostname) { + strcpy(ppp_settings.our_name, ppp_settings.hostname); + } + + if (ppp_settings.user[0] == 0) { + strcpy(ppp_settings.user, ppp_settings.our_name); + } + + /* If authentication is required, ask peer for CHAP or PAP. */ + if (ppp_settings.auth_required && !wo->neg_chap && !wo->neg_upap) { + wo->neg_chap = 1; + wo->neg_upap = 1; + } + + /* + * Check whether we have appropriate secrets to use + * to authenticate the peer. + */ + can_auth = wo->neg_upap && have_pap_secret(); + if (!can_auth && wo->neg_chap) { + remote = ipwo->accept_remote? 0: ipwo->hisaddr; + can_auth = have_chap_secret(ppp_settings.remote_name, ppp_settings.our_name, remote); + } + + if (ppp_settings.auth_required && !can_auth) { + ppp_panic("No auth secret"); + } +} +#endif + + +/**********************************/ +/*** LOCAL FUNCTION DEFINITIONS ***/ +/**********************************/ +/* + * Proceed to the network phase. + */ +static void +network_phase(int unit) +{ + int i; + struct protent *protp; + lcp_options *go = &lcp_gotoptions[unit]; + + /* + * If the peer had to authenticate, run the auth-up script now. + */ + if ((go->neg_chap || go->neg_upap) && !did_authup) { + /* XXX Do setup for peer authentication. */ + did_authup = 1; + } + +#if CBCP_SUPPORT + /* + * If we negotiated callback, do it now. + */ + if (go->neg_cbcp) { + lcp_phase[unit] = PHASE_CALLBACK; + (*cbcp_protent.open)(unit); + return; + } +#endif /* CBCP_SUPPORT */ + + lcp_phase[unit] = PHASE_NETWORK; + for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) { + if (protp->protocol < 0xC000 && protp->enabled_flag && protp->open != NULL) { + (*protp->open)(unit); + if (protp->protocol != PPP_CCP) { + ++num_np_open; + } + } + } + + if (num_np_open == 0) { + /* nothing to do */ + lcp_close(0, "No network protocols running"); + } +} + +/* + * check_idle - check whether the link has been idle for long + * enough that we can shut it down. + */ +static void +check_idle(void *arg) +{ + struct ppp_idle idle; + u_short itime; + + LWIP_UNUSED_ARG(arg); + if (!get_idle_time(0, &idle)) { + return; + } + itime = LWIP_MIN(idle.xmit_idle, idle.recv_idle); + if (itime >= ppp_settings.idle_time_limit) { + /* link is idle: shut it down. */ + AUTHDEBUG((LOG_INFO, "Terminating connection due to lack of activity.\n")); + lcp_close(0, "Link inactive"); + } else { + TIMEOUT(check_idle, NULL, ppp_settings.idle_time_limit - itime); + } +} + +/* + * connect_time_expired - log a message and close the connection. + */ +static void +connect_time_expired(void *arg) +{ + LWIP_UNUSED_ARG(arg); + + AUTHDEBUG((LOG_INFO, "Connect time expired\n")); + lcp_close(0, "Connect time expired"); /* Close connection */ +} + +#if 0 +/* + * login - Check the user name and password against the system + * password database, and login the user if OK. + * + * returns: + * UPAP_AUTHNAK: Login failed. + * UPAP_AUTHACK: Login succeeded. + * In either case, msg points to an appropriate message. + */ +static int +login(char *user, char *passwd, char **msg, int *msglen) +{ + /* XXX Fail until we decide that we want to support logins. */ + return (UPAP_AUTHNAK); +} +#endif + +/* + * logout - Logout the user. + */ +static void +logout(void) +{ + logged_in = 0; +} + +/* + * null_login - Check if a username of "" and a password of "" are + * acceptable, and iff so, set the list of acceptable IP addresses + * and return 1. + */ +static int +null_login(int unit) +{ + LWIP_UNUSED_ARG(unit); + /* XXX Fail until we decide that we want to support logins. */ + return 0; +} + +/* + * get_pap_passwd - get a password for authenticating ourselves with + * our peer using PAP. Returns 1 on success, 0 if no suitable password + * could be found. + */ +static int +get_pap_passwd(int unit, char *user, char *passwd) +{ + LWIP_UNUSED_ARG(unit); +/* normally we would reject PAP if no password is provided, + but this causes problems with some providers (like CHT in Taiwan) + who incorrectly request PAP and expect a bogus/empty password, so + always provide a default user/passwd of "none"/"none" +*/ + if(user) { + strcpy(user, "none"); + } + if(passwd) { + strcpy(passwd, "none"); + } + return 1; +} + +/* + * have_pap_secret - check whether we have a PAP file with any + * secrets that we could possibly use for authenticating the peer. + */ +static int +have_pap_secret(void) +{ + /* XXX Fail until we set up our passwords. */ + return 0; +} + +/* + * have_chap_secret - check whether we have a CHAP file with a + * secret that we could possibly use for authenticating `client' + * on `server'. Either can be the null string, meaning we don't + * know the identity yet. + */ +static int +have_chap_secret(char *client, char *server, u32_t remote) +{ + LWIP_UNUSED_ARG(client); + LWIP_UNUSED_ARG(server); + LWIP_UNUSED_ARG(remote); + /* XXX Fail until we set up our passwords. */ + return 0; +} + +#if 0 /* PAP_SUPPORT || CHAP_SUPPORT */ +/* + * set_allowed_addrs() - set the list of allowed addresses. + */ +static void +set_allowed_addrs(int unit, struct wordlist *addrs) +{ + if (addresses[unit] != NULL) { + free_wordlist(addresses[unit]); + } + addresses[unit] = addrs; + +#if 0 + /* + * If there's only one authorized address we might as well + * ask our peer for that one right away + */ + if (addrs != NULL && addrs->next == NULL) { + char *p = addrs->word; + struct ipcp_options *wo = &ipcp_wantoptions[unit]; + u32_t a; + struct hostent *hp; + + if (wo->hisaddr == 0 && *p != '!' && *p != '-' && strchr(p, '/') == NULL) { + hp = gethostbyname(p); + if (hp != NULL && hp->h_addrtype == AF_INET) { + a = *(u32_t *)hp->h_addr; + } else { + a = inet_addr(p); + } + if (a != (u32_t) -1) { + wo->hisaddr = a; + } + } + } +#endif +} +#endif /* 0 */ /* PAP_SUPPORT || CHAP_SUPPORT */ + +static int +ip_addr_check(u32_t addr, struct wordlist *addrs) +{ + /* don't allow loopback or multicast address */ + if (bad_ip_adrs(addr)) { + return 0; + } + + if (addrs == NULL) { + return !ppp_settings.auth_required; /* no addresses authorized */ + } + + /* XXX All other addresses allowed. */ + return 1; +} + +#if 0 /* PAP_SUPPORT || CHAP_SUPPORT */ +/* + * free_wordlist - release memory allocated for a wordlist. + */ +static void +free_wordlist(struct wordlist *wp) +{ + struct wordlist *next; + + while (wp != NULL) { + next = wp->next; + free(wp); + wp = next; + } +} +#endif /* 0 */ /* PAP_SUPPORT || CHAP_SUPPORT */ + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/auth.h b/bertos/net/lwip/src/netif/ppp/auth.h new file mode 100644 index 0000000..86ff049 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/auth.h @@ -0,0 +1,111 @@ +/***************************************************************************** +* auth.h - PPP Authentication and phase control header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1998 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-04 Guy Lancaster , Global Election Systems Inc. +* Original derived from BSD pppd.h. +*****************************************************************************/ +/* + * pppd.h - PPP daemon global declarations. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + */ + +#ifndef AUTH_H +#define AUTH_H + +/*********************** +*** PUBLIC FUNCTIONS *** +***********************/ + +/* we are starting to use the link */ +void link_required (int); + +/* we are finished with the link */ +void link_terminated (int); + +/* the LCP layer has left the Opened state */ +void link_down (int); + +/* the link is up; authenticate now */ +void link_established (int); + +/* a network protocol has come up */ +void np_up (int, u16_t); + +/* a network protocol has gone down */ +void np_down (int, u16_t); + +/* a network protocol no longer needs link */ +void np_finished (int, u16_t); + +/* peer failed to authenticate itself */ +void auth_peer_fail (int, u16_t); + +/* peer successfully authenticated itself */ +void auth_peer_success (int, u16_t, char *, int); + +/* we failed to authenticate ourselves */ +void auth_withpeer_fail (int, u16_t); + +/* we successfully authenticated ourselves */ +void auth_withpeer_success (int, u16_t); + +/* check authentication options supplied */ +void auth_check_options (void); + +/* check what secrets we have */ +void auth_reset (int); + +/* Check peer-supplied username/password */ +int check_passwd (int, char *, int, char *, int, char **, int *); + +/* get "secret" for chap */ +int get_secret (int, char *, char *, char *, int *, int); + +/* check if IP address is authorized */ +int auth_ip_addr (int, u32_t); + +/* check if IP address is unreasonable */ +int bad_ip_adrs (u32_t); + +#endif /* AUTH_H */ diff --git a/bertos/net/lwip/src/netif/ppp/chap.c b/bertos/net/lwip/src/netif/ppp/chap.c new file mode 100644 index 0000000..b3ea6b2 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/chap.c @@ -0,0 +1,903 @@ +/*** WARNING - THIS HAS NEVER BEEN FINISHED ***/ +/***************************************************************************** +* chap.c - Network Challenge Handshake Authentication Protocol program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 by Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-04 Guy Lancaster , Global Election Systems Inc. +* Original based on BSD chap.c. +*****************************************************************************/ +/* + * chap.c - Challenge Handshake Authentication Protocol. + * + * Copyright (c) 1993 The Australian National University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by the Australian National University. The name of the University + * may not be used to endorse or promote products derived from this + * software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * Copyright (c) 1991 Gregory M. Christy. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Gregory M. Christy. The name of the author may not be used to + * endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#if CHAP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "magic.h" +#include "randm.h" +#include "auth.h" +#include "md5.h" +#include "chap.h" +#include "chpms.h" + +#include + +/*************************/ +/*** LOCAL DEFINITIONS ***/ +/*************************/ + + +/************************/ +/*** LOCAL DATA TYPES ***/ +/************************/ + + +/***********************************/ +/*** LOCAL FUNCTION DECLARATIONS ***/ +/***********************************/ +/* + * Protocol entry points. + */ +static void ChapInit (int); +static void ChapLowerUp (int); +static void ChapLowerDown (int); +static void ChapInput (int, u_char *, int); +static void ChapProtocolReject (int); +#if 0 +static int ChapPrintPkt (u_char *, int, void (*) (void *, char *, ...), void *); +#endif + +static void ChapChallengeTimeout (void *); +static void ChapResponseTimeout (void *); +static void ChapReceiveChallenge (chap_state *, u_char *, int, int); +static void ChapRechallenge (void *); +static void ChapReceiveResponse (chap_state *, u_char *, int, int); +static void ChapReceiveSuccess(chap_state *cstate, u_char *inp, u_char id, int len); +static void ChapReceiveFailure(chap_state *cstate, u_char *inp, u_char id, int len); +static void ChapSendStatus (chap_state *, int); +static void ChapSendChallenge (chap_state *); +static void ChapSendResponse (chap_state *); +static void ChapGenChallenge (chap_state *); + + +/******************************/ +/*** PUBLIC DATA STRUCTURES ***/ +/******************************/ +chap_state chap[NUM_PPP]; /* CHAP state; one for each unit */ + +struct protent chap_protent = { + PPP_CHAP, + ChapInit, + ChapInput, + ChapProtocolReject, + ChapLowerUp, + ChapLowerDown, + NULL, + NULL, +#if 0 + ChapPrintPkt, + NULL, +#endif + 1, + "CHAP", +#if 0 + NULL, + NULL, + NULL +#endif +}; + + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ +/* + * ChapAuthWithPeer - Authenticate us with our peer (start client). + * + */ +void +ChapAuthWithPeer(int unit, char *our_name, int digest) +{ + chap_state *cstate = &chap[unit]; + + cstate->resp_name = our_name; + cstate->resp_type = digest; + + if (cstate->clientstate == CHAPCS_INITIAL || + cstate->clientstate == CHAPCS_PENDING) { + /* lower layer isn't up - wait until later */ + cstate->clientstate = CHAPCS_PENDING; + return; + } + + /* + * We get here as a result of LCP coming up. + * So even if CHAP was open before, we will + * have to re-authenticate ourselves. + */ + cstate->clientstate = CHAPCS_LISTEN; +} + + +/* + * ChapAuthPeer - Authenticate our peer (start server). + */ +void +ChapAuthPeer(int unit, char *our_name, int digest) +{ + chap_state *cstate = &chap[unit]; + + cstate->chal_name = our_name; + cstate->chal_type = digest; + + if (cstate->serverstate == CHAPSS_INITIAL || + cstate->serverstate == CHAPSS_PENDING) { + /* lower layer isn't up - wait until later */ + cstate->serverstate = CHAPSS_PENDING; + return; + } + + ChapGenChallenge(cstate); + ChapSendChallenge(cstate); /* crank it up dude! */ + cstate->serverstate = CHAPSS_INITIAL_CHAL; +} + + +/**********************************/ +/*** LOCAL FUNCTION DEFINITIONS ***/ +/**********************************/ +/* + * ChapInit - Initialize a CHAP unit. + */ +static void +ChapInit(int unit) +{ + chap_state *cstate = &chap[unit]; + + BZERO(cstate, sizeof(*cstate)); + cstate->unit = unit; + cstate->clientstate = CHAPCS_INITIAL; + cstate->serverstate = CHAPSS_INITIAL; + cstate->timeouttime = CHAP_DEFTIMEOUT; + cstate->max_transmits = CHAP_DEFTRANSMITS; + /* random number generator is initialized in magic_init */ +} + + +/* + * ChapChallengeTimeout - Timeout expired on sending challenge. + */ +static void +ChapChallengeTimeout(void *arg) +{ + chap_state *cstate = (chap_state *) arg; + + /* if we aren't sending challenges, don't worry. then again we */ + /* probably shouldn't be here either */ + if (cstate->serverstate != CHAPSS_INITIAL_CHAL && + cstate->serverstate != CHAPSS_RECHALLENGE) { + return; + } + + if (cstate->chal_transmits >= cstate->max_transmits) { + /* give up on peer */ + CHAPDEBUG((LOG_ERR, "Peer failed to respond to CHAP challenge\n")); + cstate->serverstate = CHAPSS_BADAUTH; + auth_peer_fail(cstate->unit, PPP_CHAP); + return; + } + + ChapSendChallenge(cstate); /* Re-send challenge */ +} + + +/* + * ChapResponseTimeout - Timeout expired on sending response. + */ +static void +ChapResponseTimeout(void *arg) +{ + chap_state *cstate = (chap_state *) arg; + + /* if we aren't sending a response, don't worry. */ + if (cstate->clientstate != CHAPCS_RESPONSE) { + return; + } + + ChapSendResponse(cstate); /* re-send response */ +} + + +/* + * ChapRechallenge - Time to challenge the peer again. + */ +static void +ChapRechallenge(void *arg) +{ + chap_state *cstate = (chap_state *) arg; + + /* if we aren't sending a response, don't worry. */ + if (cstate->serverstate != CHAPSS_OPEN) { + return; + } + + ChapGenChallenge(cstate); + ChapSendChallenge(cstate); + cstate->serverstate = CHAPSS_RECHALLENGE; +} + + +/* + * ChapLowerUp - The lower layer is up. + * + * Start up if we have pending requests. + */ +static void +ChapLowerUp(int unit) +{ + chap_state *cstate = &chap[unit]; + + if (cstate->clientstate == CHAPCS_INITIAL) { + cstate->clientstate = CHAPCS_CLOSED; + } else if (cstate->clientstate == CHAPCS_PENDING) { + cstate->clientstate = CHAPCS_LISTEN; + } + + if (cstate->serverstate == CHAPSS_INITIAL) { + cstate->serverstate = CHAPSS_CLOSED; + } else if (cstate->serverstate == CHAPSS_PENDING) { + ChapGenChallenge(cstate); + ChapSendChallenge(cstate); + cstate->serverstate = CHAPSS_INITIAL_CHAL; + } +} + + +/* + * ChapLowerDown - The lower layer is down. + * + * Cancel all timeouts. + */ +static void +ChapLowerDown(int unit) +{ + chap_state *cstate = &chap[unit]; + + /* Timeout(s) pending? Cancel if so. */ + if (cstate->serverstate == CHAPSS_INITIAL_CHAL || + cstate->serverstate == CHAPSS_RECHALLENGE) { + UNTIMEOUT(ChapChallengeTimeout, cstate); + } else if (cstate->serverstate == CHAPSS_OPEN + && cstate->chal_interval != 0) { + UNTIMEOUT(ChapRechallenge, cstate); + } + if (cstate->clientstate == CHAPCS_RESPONSE) { + UNTIMEOUT(ChapResponseTimeout, cstate); + } + cstate->clientstate = CHAPCS_INITIAL; + cstate->serverstate = CHAPSS_INITIAL; +} + + +/* + * ChapProtocolReject - Peer doesn't grok CHAP. + */ +static void +ChapProtocolReject(int unit) +{ + chap_state *cstate = &chap[unit]; + + if (cstate->serverstate != CHAPSS_INITIAL && + cstate->serverstate != CHAPSS_CLOSED) { + auth_peer_fail(unit, PPP_CHAP); + } + if (cstate->clientstate != CHAPCS_INITIAL && + cstate->clientstate != CHAPCS_CLOSED) { + auth_withpeer_fail(unit, PPP_CHAP); + } + ChapLowerDown(unit); /* shutdown chap */ +} + + +/* + * ChapInput - Input CHAP packet. + */ +static void +ChapInput(int unit, u_char *inpacket, int packet_len) +{ + chap_state *cstate = &chap[unit]; + u_char *inp; + u_char code, id; + int len; + + /* + * Parse header (code, id and length). + * If packet too short, drop it. + */ + inp = inpacket; + if (packet_len < CHAP_HEADERLEN) { + CHAPDEBUG((LOG_INFO, "ChapInput: rcvd short header.\n")); + return; + } + GETCHAR(code, inp); + GETCHAR(id, inp); + GETSHORT(len, inp); + if (len < CHAP_HEADERLEN) { + CHAPDEBUG((LOG_INFO, "ChapInput: rcvd illegal length.\n")); + return; + } + if (len > packet_len) { + CHAPDEBUG((LOG_INFO, "ChapInput: rcvd short packet.\n")); + return; + } + len -= CHAP_HEADERLEN; + + /* + * Action depends on code (as in fact it usually does :-). + */ + switch (code) { + case CHAP_CHALLENGE: + ChapReceiveChallenge(cstate, inp, id, len); + break; + + case CHAP_RESPONSE: + ChapReceiveResponse(cstate, inp, id, len); + break; + + case CHAP_FAILURE: + ChapReceiveFailure(cstate, inp, id, len); + break; + + case CHAP_SUCCESS: + ChapReceiveSuccess(cstate, inp, id, len); + break; + + default: /* Need code reject? */ + CHAPDEBUG((LOG_WARNING, "Unknown CHAP code (%d) received.\n", code)); + break; + } +} + + +/* + * ChapReceiveChallenge - Receive Challenge and send Response. + */ +static void +ChapReceiveChallenge(chap_state *cstate, u_char *inp, int id, int len) +{ + int rchallenge_len; + u_char *rchallenge; + int secret_len; + char secret[MAXSECRETLEN]; + char rhostname[256]; + MD5_CTX mdContext; + u_char hash[MD5_SIGNATURE_SIZE]; + + CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: Rcvd id %d.\n", id)); + if (cstate->clientstate == CHAPCS_CLOSED || + cstate->clientstate == CHAPCS_PENDING) { + CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: in state %d\n", + cstate->clientstate)); + return; + } + + if (len < 2) { + CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: rcvd short packet.\n")); + return; + } + + GETCHAR(rchallenge_len, inp); + len -= sizeof (u_char) + rchallenge_len; /* now name field length */ + if (len < 0) { + CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: rcvd short packet.\n")); + return; + } + rchallenge = inp; + INCPTR(rchallenge_len, inp); + + if (len >= sizeof(rhostname)) { + len = sizeof(rhostname) - 1; + } + BCOPY(inp, rhostname, len); + rhostname[len] = '\000'; + + CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: received name field '%s'\n", rhostname)); + + /* Microsoft doesn't send their name back in the PPP packet */ + if (ppp_settings.remote_name[0] != 0 && (ppp_settings.explicit_remote || rhostname[0] == 0)) { + strncpy(rhostname, ppp_settings.remote_name, sizeof(rhostname)); + rhostname[sizeof(rhostname) - 1] = 0; + CHAPDEBUG((LOG_INFO, "ChapReceiveChallenge: using '%s' as remote name\n", rhostname)); + } + + /* get secret for authenticating ourselves with the specified host */ + if (!get_secret(cstate->unit, cstate->resp_name, rhostname, secret, &secret_len, 0)) { + secret_len = 0; /* assume null secret if can't find one */ + CHAPDEBUG((LOG_WARNING, "No CHAP secret found for authenticating us to %s\n", rhostname)); + } + + /* cancel response send timeout if necessary */ + if (cstate->clientstate == CHAPCS_RESPONSE) { + UNTIMEOUT(ChapResponseTimeout, cstate); + } + + cstate->resp_id = id; + cstate->resp_transmits = 0; + + /* generate MD based on negotiated type */ + switch (cstate->resp_type) { + + case CHAP_DIGEST_MD5: + MD5Init(&mdContext); + MD5Update(&mdContext, &cstate->resp_id, 1); + MD5Update(&mdContext, (u_char*)secret, secret_len); + MD5Update(&mdContext, rchallenge, rchallenge_len); + MD5Final(hash, &mdContext); + BCOPY(hash, cstate->response, MD5_SIGNATURE_SIZE); + cstate->resp_length = MD5_SIGNATURE_SIZE; + break; + +#ifdef CHAPMS + case CHAP_MICROSOFT: + ChapMS(cstate, rchallenge, rchallenge_len, secret, secret_len); + break; +#endif + + default: + CHAPDEBUG((LOG_INFO, "unknown digest type %d\n", cstate->resp_type)); + return; + } + + BZERO(secret, sizeof(secret)); + ChapSendResponse(cstate); +} + + +/* + * ChapReceiveResponse - Receive and process response. + */ +static void +ChapReceiveResponse(chap_state *cstate, u_char *inp, int id, int len) +{ + u_char *remmd, remmd_len; + int secret_len, old_state; + int code; + char rhostname[256]; + MD5_CTX mdContext; + char secret[MAXSECRETLEN]; + u_char hash[MD5_SIGNATURE_SIZE]; + + CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: Rcvd id %d.\n", id)); + + if (cstate->serverstate == CHAPSS_CLOSED || + cstate->serverstate == CHAPSS_PENDING) { + CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: in state %d\n", + cstate->serverstate)); + return; + } + + if (id != cstate->chal_id) { + return; /* doesn't match ID of last challenge */ + } + + /* + * If we have received a duplicate or bogus Response, + * we have to send the same answer (Success/Failure) + * as we did for the first Response we saw. + */ + if (cstate->serverstate == CHAPSS_OPEN) { + ChapSendStatus(cstate, CHAP_SUCCESS); + return; + } + if (cstate->serverstate == CHAPSS_BADAUTH) { + ChapSendStatus(cstate, CHAP_FAILURE); + return; + } + + if (len < 2) { + CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: rcvd short packet.\n")); + return; + } + GETCHAR(remmd_len, inp); /* get length of MD */ + remmd = inp; /* get pointer to MD */ + INCPTR(remmd_len, inp); + + len -= sizeof (u_char) + remmd_len; + if (len < 0) { + CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: rcvd short packet.\n")); + return; + } + + UNTIMEOUT(ChapChallengeTimeout, cstate); + + if (len >= sizeof(rhostname)) { + len = sizeof(rhostname) - 1; + } + BCOPY(inp, rhostname, len); + rhostname[len] = '\000'; + + CHAPDEBUG((LOG_INFO, "ChapReceiveResponse: received name field: %s\n", rhostname)); + + /* + * Get secret for authenticating them with us, + * do the hash ourselves, and compare the result. + */ + code = CHAP_FAILURE; + if (!get_secret(cstate->unit, rhostname, cstate->chal_name, secret, &secret_len, 1)) { + /* CHAPDEBUG((LOG_WARNING, TL_CHAP, "No CHAP secret found for authenticating %s\n", rhostname)); */ + CHAPDEBUG((LOG_WARNING, "No CHAP secret found for authenticating %s\n", + rhostname)); + } else { + /* generate MD based on negotiated type */ + switch (cstate->chal_type) { + + case CHAP_DIGEST_MD5: /* only MD5 is defined for now */ + if (remmd_len != MD5_SIGNATURE_SIZE) { + break; /* it's not even the right length */ + } + MD5Init(&mdContext); + MD5Update(&mdContext, &cstate->chal_id, 1); + MD5Update(&mdContext, (u_char*)secret, secret_len); + MD5Update(&mdContext, cstate->challenge, cstate->chal_len); + MD5Final(hash, &mdContext); + + /* compare local and remote MDs and send the appropriate status */ + if (memcmp (hash, remmd, MD5_SIGNATURE_SIZE) == 0) { + code = CHAP_SUCCESS; /* they are the same! */ + } + break; + + default: + CHAPDEBUG((LOG_INFO, "unknown digest type %d\n", cstate->chal_type)); + } + } + + BZERO(secret, sizeof(secret)); + ChapSendStatus(cstate, code); + + if (code == CHAP_SUCCESS) { + old_state = cstate->serverstate; + cstate->serverstate = CHAPSS_OPEN; + if (old_state == CHAPSS_INITIAL_CHAL) { + auth_peer_success(cstate->unit, PPP_CHAP, rhostname, len); + } + if (cstate->chal_interval != 0) { + TIMEOUT(ChapRechallenge, cstate, cstate->chal_interval); + } + } else { + CHAPDEBUG((LOG_ERR, "CHAP peer authentication failed\n")); + cstate->serverstate = CHAPSS_BADAUTH; + auth_peer_fail(cstate->unit, PPP_CHAP); + } +} + +/* + * ChapReceiveSuccess - Receive Success + */ +static void +ChapReceiveSuccess(chap_state *cstate, u_char *inp, u_char id, int len) +{ + LWIP_UNUSED_ARG(id); + LWIP_UNUSED_ARG(inp); + + CHAPDEBUG((LOG_INFO, "ChapReceiveSuccess: Rcvd id %d.\n", id)); + + if (cstate->clientstate == CHAPCS_OPEN) { + /* presumably an answer to a duplicate response */ + return; + } + + if (cstate->clientstate != CHAPCS_RESPONSE) { + /* don't know what this is */ + CHAPDEBUG((LOG_INFO, "ChapReceiveSuccess: in state %d\n", cstate->clientstate)); + return; + } + + UNTIMEOUT(ChapResponseTimeout, cstate); + + /* + * Print message. + */ + if (len > 0) { + PRINTMSG(inp, len); + } + + cstate->clientstate = CHAPCS_OPEN; + + auth_withpeer_success(cstate->unit, PPP_CHAP); +} + + +/* + * ChapReceiveFailure - Receive failure. + */ +static void +ChapReceiveFailure(chap_state *cstate, u_char *inp, u_char id, int len) +{ + LWIP_UNUSED_ARG(id); + LWIP_UNUSED_ARG(inp); + + CHAPDEBUG((LOG_INFO, "ChapReceiveFailure: Rcvd id %d.\n", id)); + + if (cstate->clientstate != CHAPCS_RESPONSE) { + /* don't know what this is */ + CHAPDEBUG((LOG_INFO, "ChapReceiveFailure: in state %d\n", cstate->clientstate)); + return; + } + + UNTIMEOUT(ChapResponseTimeout, cstate); + + /* + * Print message. + */ + if (len > 0) { + PRINTMSG(inp, len); + } + + CHAPDEBUG((LOG_ERR, "CHAP authentication failed\n")); + auth_withpeer_fail(cstate->unit, PPP_CHAP); +} + + +/* + * ChapSendChallenge - Send an Authenticate challenge. + */ +static void +ChapSendChallenge(chap_state *cstate) +{ + u_char *outp; + int chal_len, name_len; + int outlen; + + chal_len = cstate->chal_len; + name_len = strlen(cstate->chal_name); + outlen = CHAP_HEADERLEN + sizeof (u_char) + chal_len + name_len; + outp = outpacket_buf[cstate->unit]; + + MAKEHEADER(outp, PPP_CHAP); /* paste in a CHAP header */ + + PUTCHAR(CHAP_CHALLENGE, outp); + PUTCHAR(cstate->chal_id, outp); + PUTSHORT(outlen, outp); + + PUTCHAR(chal_len, outp); /* put length of challenge */ + BCOPY(cstate->challenge, outp, chal_len); + INCPTR(chal_len, outp); + + BCOPY(cstate->chal_name, outp, name_len); /* append hostname */ + + pppWrite(cstate->unit, outpacket_buf[cstate->unit], outlen + PPP_HDRLEN); + + CHAPDEBUG((LOG_INFO, "ChapSendChallenge: Sent id %d.\n", cstate->chal_id)); + + TIMEOUT(ChapChallengeTimeout, cstate, cstate->timeouttime); + ++cstate->chal_transmits; +} + + +/* + * ChapSendStatus - Send a status response (ack or nak). + */ +static void +ChapSendStatus(chap_state *cstate, int code) +{ + u_char *outp; + int outlen, msglen; + char msg[256]; + + if (code == CHAP_SUCCESS) { + strcpy(msg, "Welcome!"); + } else { + strcpy(msg, "I don't like you. Go 'way."); + } + msglen = strlen(msg); + + outlen = CHAP_HEADERLEN + msglen; + outp = outpacket_buf[cstate->unit]; + + MAKEHEADER(outp, PPP_CHAP); /* paste in a header */ + + PUTCHAR(code, outp); + PUTCHAR(cstate->chal_id, outp); + PUTSHORT(outlen, outp); + BCOPY(msg, outp, msglen); + pppWrite(cstate->unit, outpacket_buf[cstate->unit], outlen + PPP_HDRLEN); + + CHAPDEBUG((LOG_INFO, "ChapSendStatus: Sent code %d, id %d.\n", code, cstate->chal_id)); +} + +/* + * ChapGenChallenge is used to generate a pseudo-random challenge string of + * a pseudo-random length between min_len and max_len. The challenge + * string and its length are stored in *cstate, and various other fields of + * *cstate are initialized. + */ + +static void +ChapGenChallenge(chap_state *cstate) +{ + int chal_len; + u_char *ptr = cstate->challenge; + int i; + + /* pick a random challenge length between MIN_CHALLENGE_LENGTH and + MAX_CHALLENGE_LENGTH */ + chal_len = (unsigned) + ((((magic() >> 16) * + (MAX_CHALLENGE_LENGTH - MIN_CHALLENGE_LENGTH)) >> 16) + + MIN_CHALLENGE_LENGTH); + cstate->chal_len = chal_len; + cstate->chal_id = ++cstate->id; + cstate->chal_transmits = 0; + + /* generate a random string */ + for (i = 0; i < chal_len; i++ ) { + *ptr++ = (char) (magic() & 0xff); + } +} + +/* + * ChapSendResponse - send a response packet with values as specified + * in *cstate. + */ +/* ARGSUSED */ +static void +ChapSendResponse(chap_state *cstate) +{ + u_char *outp; + int outlen, md_len, name_len; + + md_len = cstate->resp_length; + name_len = strlen(cstate->resp_name); + outlen = CHAP_HEADERLEN + sizeof (u_char) + md_len + name_len; + outp = outpacket_buf[cstate->unit]; + + MAKEHEADER(outp, PPP_CHAP); + + PUTCHAR(CHAP_RESPONSE, outp); /* we are a response */ + PUTCHAR(cstate->resp_id, outp); /* copy id from challenge packet */ + PUTSHORT(outlen, outp); /* packet length */ + + PUTCHAR(md_len, outp); /* length of MD */ + BCOPY(cstate->response, outp, md_len); /* copy MD to buffer */ + INCPTR(md_len, outp); + + BCOPY(cstate->resp_name, outp, name_len); /* append our name */ + + /* send the packet */ + pppWrite(cstate->unit, outpacket_buf[cstate->unit], outlen + PPP_HDRLEN); + + cstate->clientstate = CHAPCS_RESPONSE; + TIMEOUT(ChapResponseTimeout, cstate, cstate->timeouttime); + ++cstate->resp_transmits; +} + +#if 0 +static char *ChapCodenames[] = { + "Challenge", "Response", "Success", "Failure" +}; +/* + * ChapPrintPkt - print the contents of a CHAP packet. + */ +static int +ChapPrintPkt( u_char *p, int plen, void (*printer) (void *, char *, ...), void *arg) +{ + int code, id, len; + int clen, nlen; + u_char x; + + if (plen < CHAP_HEADERLEN) { + return 0; + } + GETCHAR(code, p); + GETCHAR(id, p); + GETSHORT(len, p); + if (len < CHAP_HEADERLEN || len > plen) { + return 0; + } + if (code >= 1 && code <= sizeof(ChapCodenames) / sizeof(char *)) { + printer(arg, " %s", ChapCodenames[code-1]); + } else { + printer(arg, " code=0x%x", code); + } + printer(arg, " id=0x%x", id); + len -= CHAP_HEADERLEN; + switch (code) { + case CHAP_CHALLENGE: + case CHAP_RESPONSE: + if (len < 1) { + break; + } + clen = p[0]; + if (len < clen + 1) { + break; + } + ++p; + nlen = len - clen - 1; + printer(arg, " <"); + for (; clen > 0; --clen) { + GETCHAR(x, p); + printer(arg, "%.2x", x); + } + printer(arg, ">, name = %.*Z", nlen, p); + break; + case CHAP_FAILURE: + case CHAP_SUCCESS: + printer(arg, " %.*Z", len, p); + break; + default: + for (clen = len; clen > 0; --clen) { + GETCHAR(x, p); + printer(arg, " %.2x", x); + } + } + + return len + CHAP_HEADERLEN; +} +#endif + +#endif /* CHAP_SUPPORT */ + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/chap.h b/bertos/net/lwip/src/netif/ppp/chap.h new file mode 100644 index 0000000..83dafd7 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/chap.h @@ -0,0 +1,166 @@ +/***************************************************************************** +* chap.h - Network Challenge Handshake Authentication Protocol header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1998 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-03 Guy Lancaster , Global Election Systems Inc. +* Original built from BSD network code. +******************************************************************************/ +/* + * chap.h - Challenge Handshake Authentication Protocol definitions. + * + * Copyright (c) 1993 The Australian National University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by the Australian National University. The name of the University + * may not be used to endorse or promote products derived from this + * software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * Copyright (c) 1991 Gregory M. Christy + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by the author. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * $Id: chap.h,v 1.4 2007/12/19 20:47:22 fbernon Exp $ + */ + +#ifndef CHAP_H +#define CHAP_H + +/************************* +*** PUBLIC DEFINITIONS *** +*************************/ + +/* Code + ID + length */ +#define CHAP_HEADERLEN 4 + +/* + * CHAP codes. + */ + +#define CHAP_DIGEST_MD5 5 /* use MD5 algorithm */ +#define MD5_SIGNATURE_SIZE 16 /* 16 bytes in a MD5 message digest */ +#define CHAP_MICROSOFT 0x80 /* use Microsoft-compatible alg. */ +#define MS_CHAP_RESPONSE_LEN 49 /* Response length for MS-CHAP */ + +#define CHAP_CHALLENGE 1 +#define CHAP_RESPONSE 2 +#define CHAP_SUCCESS 3 +#define CHAP_FAILURE 4 + +/* + * Challenge lengths (for challenges we send) and other limits. + */ +#define MIN_CHALLENGE_LENGTH 32 +#define MAX_CHALLENGE_LENGTH 64 +#define MAX_RESPONSE_LENGTH 64 /* sufficient for MD5 or MS-CHAP */ + +/* + * Client (peer) states. + */ +#define CHAPCS_INITIAL 0 /* Lower layer down, not opened */ +#define CHAPCS_CLOSED 1 /* Lower layer up, not opened */ +#define CHAPCS_PENDING 2 /* Auth us to peer when lower up */ +#define CHAPCS_LISTEN 3 /* Listening for a challenge */ +#define CHAPCS_RESPONSE 4 /* Sent response, waiting for status */ +#define CHAPCS_OPEN 5 /* We've received Success */ + +/* + * Server (authenticator) states. + */ +#define CHAPSS_INITIAL 0 /* Lower layer down, not opened */ +#define CHAPSS_CLOSED 1 /* Lower layer up, not opened */ +#define CHAPSS_PENDING 2 /* Auth peer when lower up */ +#define CHAPSS_INITIAL_CHAL 3 /* We've sent the first challenge */ +#define CHAPSS_OPEN 4 /* We've sent a Success msg */ +#define CHAPSS_RECHALLENGE 5 /* We've sent another challenge */ +#define CHAPSS_BADAUTH 6 /* We've sent a Failure msg */ + +/************************ +*** PUBLIC DATA TYPES *** +************************/ + +/* + * Each interface is described by a chap structure. + */ + +typedef struct chap_state { + int unit; /* Interface unit number */ + int clientstate; /* Client state */ + int serverstate; /* Server state */ + u_char challenge[MAX_CHALLENGE_LENGTH]; /* last challenge string sent */ + u_char chal_len; /* challenge length */ + u_char chal_id; /* ID of last challenge */ + u_char chal_type; /* hash algorithm for challenges */ + u_char id; /* Current id */ + char *chal_name; /* Our name to use with challenge */ + int chal_interval; /* Time until we challenge peer again */ + int timeouttime; /* Timeout time in seconds */ + int max_transmits; /* Maximum # of challenge transmissions */ + int chal_transmits; /* Number of transmissions of challenge */ + int resp_transmits; /* Number of transmissions of response */ + u_char response[MAX_RESPONSE_LENGTH]; /* Response to send */ + u_char resp_length; /* length of response */ + u_char resp_id; /* ID for response messages */ + u_char resp_type; /* hash algorithm for responses */ + char *resp_name; /* Our name to send with response */ +} chap_state; + + +/****************** +*** PUBLIC DATA *** +******************/ +extern chap_state chap[]; + +extern struct protent chap_protent; + + +/*********************** +*** PUBLIC FUNCTIONS *** +***********************/ + +void ChapAuthWithPeer (int, char *, int); +void ChapAuthPeer (int, char *, int); + +#endif /* CHAP_H */ diff --git a/bertos/net/lwip/src/netif/ppp/chpms.c b/bertos/net/lwip/src/netif/ppp/chpms.c new file mode 100644 index 0000000..582cfd2 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/chpms.c @@ -0,0 +1,399 @@ +/*** WARNING - THIS CODE HAS NOT BEEN FINISHED! ***/ +/*** The original PPPD code is written in a way to require either the UNIX DES + encryption functions encrypt(3) and setkey(3) or the DES library libdes. + Since both is not included in lwIP, MSCHAP currently does not work! */ +/***************************************************************************** +* chpms.c - Network MicroSoft Challenge Handshake Authentication Protocol program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* Copyright (c) 1997 by Global Election Systems Inc. All rights reserved. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-08 Guy Lancaster , Global Election Systems Inc. +* Original based on BSD chap_ms.c. +*****************************************************************************/ +/* + * chap_ms.c - Microsoft MS-CHAP compatible implementation. + * + * Copyright (c) 1995 Eric Rosenquist, Strata Software Limited. + * http://www.strataware.com/ + * + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Eric Rosenquist. The name of the author may not be used to + * endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +/* + * Modifications by Lauri Pesonen / lpesonen@clinet.fi, april 1997 + * + * Implemented LANManager type password response to MS-CHAP challenges. + * Now pppd provides both NT style and LANMan style blocks, and the + * prefered is set by option "ms-lanman". Default is to use NT. + * The hash text (StdText) was taken from Win95 RASAPI32.DLL. + * + * You should also use DOMAIN\\USERNAME as described in README.MSCHAP80 + */ + +#define USE_CRYPT + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#if MSCHAP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "md4.h" +#ifndef USE_CRYPT +#include "des.h" +#endif +#include "chap.h" +#include "chpms.h" + + +/*************************/ +/*** LOCAL DEFINITIONS ***/ +/*************************/ + + +/************************/ +/*** LOCAL DATA TYPES ***/ +/************************/ +typedef struct { + u_char LANManResp[24]; + u_char NTResp[24]; + u_char UseNT; /* If 1, ignore the LANMan response field */ +} MS_ChapResponse; +/* We use MS_CHAP_RESPONSE_LEN, rather than sizeof(MS_ChapResponse), + in case this struct gets padded. */ + + + +/***********************************/ +/*** LOCAL FUNCTION DECLARATIONS ***/ +/***********************************/ + +/* XXX Don't know what to do with these. */ +extern void setkey(const char *); +extern void encrypt(char *, int); + +static void DesEncrypt (u_char *, u_char *, u_char *); +static void MakeKey (u_char *, u_char *); + +#ifdef USE_CRYPT +static void Expand (u_char *, u_char *); +static void Collapse (u_char *, u_char *); +#endif + +static void ChallengeResponse( + u_char *challenge, /* IN 8 octets */ + u_char *pwHash, /* IN 16 octets */ + u_char *response /* OUT 24 octets */ +); +static void ChapMS_NT( + char *rchallenge, + int rchallenge_len, + char *secret, + int secret_len, + MS_ChapResponse *response +); +static u_char Get7Bits( + u_char *input, + int startBit +); + + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ +void +ChapMS( chap_state *cstate, char *rchallenge, int rchallenge_len, char *secret, int secret_len) +{ + MS_ChapResponse response; +#ifdef MSLANMAN + extern int ms_lanman; +#endif + +#if 0 + CHAPDEBUG((LOG_INFO, "ChapMS: secret is '%.*s'\n", secret_len, secret)); +#endif + BZERO(&response, sizeof(response)); + + /* Calculate both always */ + ChapMS_NT(rchallenge, rchallenge_len, secret, secret_len, &response); + +#ifdef MSLANMAN + ChapMS_LANMan(rchallenge, rchallenge_len, secret, secret_len, &response); + + /* prefered method is set by option */ + response.UseNT = !ms_lanman; +#else + response.UseNT = 1; +#endif + + BCOPY(&response, cstate->response, MS_CHAP_RESPONSE_LEN); + cstate->resp_length = MS_CHAP_RESPONSE_LEN; +} + + +/**********************************/ +/*** LOCAL FUNCTION DEFINITIONS ***/ +/**********************************/ +static void +ChallengeResponse( u_char *challenge, /* IN 8 octets */ + u_char *pwHash, /* IN 16 octets */ + u_char *response /* OUT 24 octets */) +{ + char ZPasswordHash[21]; + + BZERO(ZPasswordHash, sizeof(ZPasswordHash)); + BCOPY(pwHash, ZPasswordHash, 16); + +#if 0 + log_packet(ZPasswordHash, sizeof(ZPasswordHash), "ChallengeResponse - ZPasswordHash", LOG_DEBUG); +#endif + + DesEncrypt(challenge, ZPasswordHash + 0, response + 0); + DesEncrypt(challenge, ZPasswordHash + 7, response + 8); + DesEncrypt(challenge, ZPasswordHash + 14, response + 16); + +#if 0 + log_packet(response, 24, "ChallengeResponse - response", LOG_DEBUG); +#endif +} + + +#ifdef USE_CRYPT +static void +DesEncrypt( u_char *clear, /* IN 8 octets */ + u_char *key, /* IN 7 octets */ + u_char *cipher /* OUT 8 octets */) +{ + u_char des_key[8]; + u_char crypt_key[66]; + u_char des_input[66]; + + MakeKey(key, des_key); + + Expand(des_key, crypt_key); + setkey(crypt_key); + +#if 0 + CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet input : %02X%02X%02X%02X%02X%02X%02X%02X\n", + clear[0], clear[1], clear[2], clear[3], clear[4], clear[5], clear[6], clear[7])); +#endif + + Expand(clear, des_input); + encrypt(des_input, 0); + Collapse(des_input, cipher); + +#if 0 + CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet output: %02X%02X%02X%02X%02X%02X%02X%02X\n", + cipher[0], cipher[1], cipher[2], cipher[3], cipher[4], cipher[5], cipher[6], cipher[7])); +#endif +} + +#else /* USE_CRYPT */ + +static void +DesEncrypt( u_char *clear, /* IN 8 octets */ + u_char *key, /* IN 7 octets */ + u_char *cipher /* OUT 8 octets */) +{ + des_cblock des_key; + des_key_schedule key_schedule; + + MakeKey(key, des_key); + + des_set_key(&des_key, key_schedule); + +#if 0 + CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet input : %02X%02X%02X%02X%02X%02X%02X%02X\n", + clear[0], clear[1], clear[2], clear[3], clear[4], clear[5], clear[6], clear[7])); +#endif + + des_ecb_encrypt((des_cblock *)clear, (des_cblock *)cipher, key_schedule, 1); + +#if 0 + CHAPDEBUG((LOG_INFO, "DesEncrypt: 8 octet output: %02X%02X%02X%02X%02X%02X%02X%02X\n", + cipher[0], cipher[1], cipher[2], cipher[3], cipher[4], cipher[5], cipher[6], cipher[7])); +#endif +} + +#endif /* USE_CRYPT */ + + +static u_char +Get7Bits( u_char *input, int startBit) +{ + register unsigned int word; + + word = (unsigned)input[startBit / 8] << 8; + word |= (unsigned)input[startBit / 8 + 1]; + + word >>= 15 - (startBit % 8 + 7); + + return word & 0xFE; +} + +#ifdef USE_CRYPT + +/* in == 8-byte string (expanded version of the 56-bit key) + * out == 64-byte string where each byte is either 1 or 0 + * Note that the low-order "bit" is always ignored by by setkey() + */ +static void +Expand(u_char *in, u_char *out) +{ + int j, c; + int i; + + for(i = 0; i < 64; in++){ + c = *in; + for(j = 7; j >= 0; j--) { + *out++ = (c >> j) & 01; + } + i += 8; + } +} + +/* The inverse of Expand + */ +static void +Collapse(u_char *in, u_char *out) +{ + int j; + int i; + unsigned int c; + + for (i = 0; i < 64; i += 8, out++) { + c = 0; + for (j = 7; j >= 0; j--, in++) { + c |= *in << j; + } + *out = c & 0xff; + } +} +#endif + +static void +MakeKey( u_char *key, /* IN 56 bit DES key missing parity bits */ + u_char *des_key /* OUT 64 bit DES key with parity bits added */) +{ + des_key[0] = Get7Bits(key, 0); + des_key[1] = Get7Bits(key, 7); + des_key[2] = Get7Bits(key, 14); + des_key[3] = Get7Bits(key, 21); + des_key[4] = Get7Bits(key, 28); + des_key[5] = Get7Bits(key, 35); + des_key[6] = Get7Bits(key, 42); + des_key[7] = Get7Bits(key, 49); + +#ifndef USE_CRYPT + des_set_odd_parity((des_cblock *)des_key); +#endif + +#if 0 + CHAPDEBUG((LOG_INFO, "MakeKey: 56-bit input : %02X%02X%02X%02X%02X%02X%02X\n", + key[0], key[1], key[2], key[3], key[4], key[5], key[6])); + CHAPDEBUG((LOG_INFO, "MakeKey: 64-bit output: %02X%02X%02X%02X%02X%02X%02X%02X\n", + des_key[0], des_key[1], des_key[2], des_key[3], des_key[4], des_key[5], des_key[6], des_key[7])); +#endif +} + +static void +ChapMS_NT( char *rchallenge, + int rchallenge_len, + char *secret, + int secret_len, + MS_ChapResponse *response) +{ + int i; + MDstruct md4Context; + u_char unicodePassword[MAX_NT_PASSWORD * 2]; + static int low_byte_first = -1; + + /* Initialize the Unicode version of the secret (== password). */ + /* This implicitly supports 8-bit ISO8859/1 characters. */ + BZERO(unicodePassword, sizeof(unicodePassword)); + for (i = 0; i < secret_len; i++) { + unicodePassword[i * 2] = (u_char)secret[i]; + } + MDbegin(&md4Context); + MDupdate(&md4Context, unicodePassword, secret_len * 2 * 8); /* Unicode is 2 bytes/char, *8 for bit count */ + + if (low_byte_first == -1) { + low_byte_first = (htons((unsigned short int)1) != 1); + } + if (low_byte_first == 0) { + MDreverse((u_long *)&md4Context); /* sfb 961105 */ + } + + MDupdate(&md4Context, NULL, 0); /* Tell MD4 we're done */ + + ChallengeResponse(rchallenge, (char *)md4Context.buffer, response->NTResp); +} + +#ifdef MSLANMAN +static u_char *StdText = (u_char *)"KGS!@#$%"; /* key from rasapi32.dll */ + +static void +ChapMS_LANMan( char *rchallenge, + int rchallenge_len, + char *secret, + int secret_len, + MS_ChapResponse *response) +{ + int i; + u_char UcasePassword[MAX_NT_PASSWORD]; /* max is actually 14 */ + u_char PasswordHash[16]; + + /* LANMan password is case insensitive */ + BZERO(UcasePassword, sizeof(UcasePassword)); + for (i = 0; i < secret_len; i++) { + UcasePassword[i] = (u_char)toupper(secret[i]); + } + DesEncrypt( StdText, UcasePassword + 0, PasswordHash + 0 ); + DesEncrypt( StdText, UcasePassword + 7, PasswordHash + 8 ); + ChallengeResponse(rchallenge, PasswordHash, response->LANManResp); +} +#endif + +#endif /* MSCHAP_SUPPORT */ + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/chpms.h b/bertos/net/lwip/src/netif/ppp/chpms.h new file mode 100644 index 0000000..df070fb --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/chpms.h @@ -0,0 +1,64 @@ +/***************************************************************************** +* chpms.h - Network Microsoft Challenge Handshake Protocol header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1998 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 98-01-30 Guy Lancaster , Global Election Systems Inc. +* Original built from BSD network code. +******************************************************************************/ +/* + * chap.h - Challenge Handshake Authentication Protocol definitions. + * + * Copyright (c) 1995 Eric Rosenquist, Strata Software Limited. + * http://www.strataware.com/ + * + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Eric Rosenquist. The name of the author may not be used to + * endorse or promote products derived from this software without + * specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * $Id: chpms.h,v 1.5 2007/12/19 20:47:23 fbernon Exp $ + */ + +#ifndef CHPMS_H +#define CHPMS_H + +#define MAX_NT_PASSWORD 256 /* Maximum number of (Unicode) chars in an NT password */ + +void ChapMS (chap_state *, char *, int, char *, int); + +#endif /* CHPMS_H */ diff --git a/bertos/net/lwip/src/netif/ppp/fsm.c b/bertos/net/lwip/src/netif/ppp/fsm.c new file mode 100644 index 0000000..ee549f2 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/fsm.c @@ -0,0 +1,908 @@ +/***************************************************************************** +* fsm.c - Network Control Protocol Finite State Machine program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 by Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-01 Guy Lancaster , Global Election Systems Inc. +* Original based on BSD fsm.c. +*****************************************************************************/ +/* + * fsm.c - {Link, IP} Control Protocol Finite State Machine. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +/* + * TODO: + * Randomize fsm id on link/init. + * Deal with variable outgoing MTU. + */ + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "fsm.h" + +#include + + +/*************************/ +/*** LOCAL DEFINITIONS ***/ +/*************************/ + +#if PPP_DEBUG + +static const char *ppperr_strerr[] = { + "LS_INITIAL", /* LS_INITIAL 0 */ + "LS_STARTING", /* LS_STARTING 1 */ + "LS_CLOSED", /* LS_CLOSED 2 */ + "LS_STOPPED", /* LS_STOPPED 3 */ + "LS_CLOSING", /* LS_CLOSING 4 */ + "LS_STOPPING", /* LS_STOPPING 5 */ + "LS_REQSENT", /* LS_REQSENT 6 */ + "LS_ACKRCVD", /* LS_ACKRCVD 7 */ + "LS_ACKSENT", /* LS_ACKSENT 8 */ + "LS_OPENED" /* LS_OPENED 9 */ +}; + +#endif /* PPP_DEBUG */ + +/************************/ +/*** LOCAL DATA TYPES ***/ +/************************/ + + +/***********************************/ +/*** LOCAL FUNCTION DECLARATIONS ***/ +/***********************************/ +static void fsm_timeout (void *); +static void fsm_rconfreq (fsm *, u_char, u_char *, int); +static void fsm_rconfack (fsm *, int, u_char *, int); +static void fsm_rconfnakrej (fsm *, int, int, u_char *, int); +static void fsm_rtermreq (fsm *, int, u_char *, int); +static void fsm_rtermack (fsm *); +static void fsm_rcoderej (fsm *, u_char *, int); +static void fsm_sconfreq (fsm *, int); + +#define PROTO_NAME(f) ((f)->callbacks->proto_name) + + +/******************************/ +/*** PUBLIC DATA STRUCTURES ***/ +/******************************/ + + +/*****************************/ +/*** LOCAL DATA STRUCTURES ***/ +/*****************************/ +int peer_mru[NUM_PPP]; + + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ + +/* + * fsm_init - Initialize fsm. + * + * Initialize fsm state. + */ +void +fsm_init(fsm *f) +{ + f->state = LS_INITIAL; + f->flags = 0; + f->id = 0; /* XXX Start with random id? */ + f->timeouttime = FSM_DEFTIMEOUT; + f->maxconfreqtransmits = FSM_DEFMAXCONFREQS; + f->maxtermtransmits = FSM_DEFMAXTERMREQS; + f->maxnakloops = FSM_DEFMAXNAKLOOPS; + f->term_reason_len = 0; +} + + +/* + * fsm_lowerup - The lower layer is up. + */ +void +fsm_lowerup(fsm *f) +{ + int oldState = f->state; + + LWIP_UNUSED_ARG(oldState); + + switch( f->state ) { + case LS_INITIAL: + f->state = LS_CLOSED; + break; + + case LS_STARTING: + if( f->flags & OPT_SILENT ) { + f->state = LS_STOPPED; + } else { + /* Send an initial configure-request */ + fsm_sconfreq(f, 0); + f->state = LS_REQSENT; + } + break; + + default: + FSMDEBUG((LOG_INFO, "%s: Up event in state %d (%s)!\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + } + + FSMDEBUG((LOG_INFO, "%s: lowerup state %d (%s) -> %d (%s)\n", + PROTO_NAME(f), oldState, ppperr_strerr[oldState], f->state, ppperr_strerr[f->state])); +} + + +/* + * fsm_lowerdown - The lower layer is down. + * + * Cancel all timeouts and inform upper layers. + */ +void +fsm_lowerdown(fsm *f) +{ + int oldState = f->state; + + LWIP_UNUSED_ARG(oldState); + + switch( f->state ) { + case LS_CLOSED: + f->state = LS_INITIAL; + break; + + case LS_STOPPED: + f->state = LS_STARTING; + if( f->callbacks->starting ) { + (*f->callbacks->starting)(f); + } + break; + + case LS_CLOSING: + f->state = LS_INITIAL; + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + break; + + case LS_STOPPING: + case LS_REQSENT: + case LS_ACKRCVD: + case LS_ACKSENT: + f->state = LS_STARTING; + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + break; + + case LS_OPENED: + if( f->callbacks->down ) { + (*f->callbacks->down)(f); + } + f->state = LS_STARTING; + break; + + default: + FSMDEBUG((LOG_INFO, "%s: Down event in state %d (%s)!\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + } + + FSMDEBUG((LOG_INFO, "%s: lowerdown state %d (%s) -> %d (%s)\n", + PROTO_NAME(f), oldState, ppperr_strerr[oldState], f->state, ppperr_strerr[f->state])); +} + + +/* + * fsm_open - Link is allowed to come up. + */ +void +fsm_open(fsm *f) +{ + int oldState = f->state; + + LWIP_UNUSED_ARG(oldState); + + switch( f->state ) { + case LS_INITIAL: + f->state = LS_STARTING; + if( f->callbacks->starting ) { + (*f->callbacks->starting)(f); + } + break; + + case LS_CLOSED: + if( f->flags & OPT_SILENT ) { + f->state = LS_STOPPED; + } else { + /* Send an initial configure-request */ + fsm_sconfreq(f, 0); + f->state = LS_REQSENT; + } + break; + + case LS_CLOSING: + f->state = LS_STOPPING; + /* fall through */ + case LS_STOPPED: + case LS_OPENED: + if( f->flags & OPT_RESTART ) { + fsm_lowerdown(f); + fsm_lowerup(f); + } + break; + } + + FSMDEBUG((LOG_INFO, "%s: open state %d (%s) -> %d (%s)\n", + PROTO_NAME(f), oldState, ppperr_strerr[oldState], f->state, ppperr_strerr[f->state])); +} + + +/* + * fsm_close - Start closing connection. + * + * Cancel timeouts and either initiate close or possibly go directly to + * the LS_CLOSED state. + */ +void +fsm_close(fsm *f, char *reason) +{ + int oldState = f->state; + + LWIP_UNUSED_ARG(oldState); + + f->term_reason = reason; + f->term_reason_len = (reason == NULL? 0: strlen(reason)); + switch( f->state ) { + case LS_STARTING: + f->state = LS_INITIAL; + break; + case LS_STOPPED: + f->state = LS_CLOSED; + break; + case LS_STOPPING: + f->state = LS_CLOSING; + break; + + case LS_REQSENT: + case LS_ACKRCVD: + case LS_ACKSENT: + case LS_OPENED: + if( f->state != LS_OPENED ) { + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + } else if( f->callbacks->down ) { + (*f->callbacks->down)(f); /* Inform upper layers we're down */ + } + /* Init restart counter, send Terminate-Request */ + f->retransmits = f->maxtermtransmits; + fsm_sdata(f, TERMREQ, f->reqid = ++f->id, + (u_char *) f->term_reason, f->term_reason_len); + TIMEOUT(fsm_timeout, f, f->timeouttime); + --f->retransmits; + + f->state = LS_CLOSING; + break; + } + + FSMDEBUG((LOG_INFO, "%s: close reason=%s state %d (%s) -> %d (%s)\n", + PROTO_NAME(f), reason, oldState, ppperr_strerr[oldState], f->state, ppperr_strerr[f->state])); +} + + +/* + * fsm_sdata - Send some data. + * + * Used for all packets sent to our peer by this module. + */ +void +fsm_sdata( fsm *f, u_char code, u_char id, u_char *data, int datalen) +{ + u_char *outp; + int outlen; + + /* Adjust length to be smaller than MTU */ + outp = outpacket_buf[f->unit]; + if (datalen > peer_mru[f->unit] - (int)HEADERLEN) { + datalen = peer_mru[f->unit] - HEADERLEN; + } + if (datalen && data != outp + PPP_HDRLEN + HEADERLEN) { + BCOPY(data, outp + PPP_HDRLEN + HEADERLEN, datalen); + } + outlen = datalen + HEADERLEN; + MAKEHEADER(outp, f->protocol); + PUTCHAR(code, outp); + PUTCHAR(id, outp); + PUTSHORT(outlen, outp); + pppWrite(f->unit, outpacket_buf[f->unit], outlen + PPP_HDRLEN); + FSMDEBUG((LOG_INFO, "fsm_sdata(%s): Sent code %d,%d,%d.\n", + PROTO_NAME(f), code, id, outlen)); +} + + +/* + * fsm_input - Input packet. + */ +void +fsm_input(fsm *f, u_char *inpacket, int l) +{ + u_char *inp = inpacket; + u_char code, id; + int len; + + /* + * Parse header (code, id and length). + * If packet too short, drop it. + */ + if (l < HEADERLEN) { + FSMDEBUG((LOG_WARNING, "fsm_input(%x): Rcvd short header.\n", + f->protocol)); + return; + } + GETCHAR(code, inp); + GETCHAR(id, inp); + GETSHORT(len, inp); + if (len < HEADERLEN) { + FSMDEBUG((LOG_INFO, "fsm_input(%x): Rcvd illegal length.\n", + f->protocol)); + return; + } + if (len > l) { + FSMDEBUG((LOG_INFO, "fsm_input(%x): Rcvd short packet.\n", + f->protocol)); + return; + } + len -= HEADERLEN; /* subtract header length */ + + if( f->state == LS_INITIAL || f->state == LS_STARTING ) { + FSMDEBUG((LOG_INFO, "fsm_input(%x): Rcvd packet in state %d (%s).\n", + f->protocol, f->state, ppperr_strerr[f->state])); + return; + } + FSMDEBUG((LOG_INFO, "fsm_input(%s):%d,%d,%d\n", PROTO_NAME(f), code, id, l)); + /* + * Action depends on code. + */ + switch (code) { + case CONFREQ: + fsm_rconfreq(f, id, inp, len); + break; + + case CONFACK: + fsm_rconfack(f, id, inp, len); + break; + + case CONFNAK: + case CONFREJ: + fsm_rconfnakrej(f, code, id, inp, len); + break; + + case TERMREQ: + fsm_rtermreq(f, id, inp, len); + break; + + case TERMACK: + fsm_rtermack(f); + break; + + case CODEREJ: + fsm_rcoderej(f, inp, len); + break; + + default: + if( !f->callbacks->extcode || + !(*f->callbacks->extcode)(f, code, id, inp, len) ) { + fsm_sdata(f, CODEREJ, ++f->id, inpacket, len + HEADERLEN); + } + break; + } +} + + +/* + * fsm_protreject - Peer doesn't speak this protocol. + * + * Treat this as a catastrophic error (RXJ-). + */ +void +fsm_protreject(fsm *f) +{ + switch( f->state ) { + case LS_CLOSING: + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + /* fall through */ + case LS_CLOSED: + f->state = LS_CLOSED; + if( f->callbacks->finished ) { + (*f->callbacks->finished)(f); + } + break; + + case LS_STOPPING: + case LS_REQSENT: + case LS_ACKRCVD: + case LS_ACKSENT: + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + /* fall through */ + case LS_STOPPED: + f->state = LS_STOPPED; + if( f->callbacks->finished ) { + (*f->callbacks->finished)(f); + } + break; + + case LS_OPENED: + if( f->callbacks->down ) { + (*f->callbacks->down)(f); + } + /* Init restart counter, send Terminate-Request */ + f->retransmits = f->maxtermtransmits; + fsm_sdata(f, TERMREQ, f->reqid = ++f->id, + (u_char *) f->term_reason, f->term_reason_len); + TIMEOUT(fsm_timeout, f, f->timeouttime); + --f->retransmits; + + f->state = LS_STOPPING; + break; + + default: + FSMDEBUG((LOG_INFO, "%s: Protocol-reject event in state %d (%s)!\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + } +} + + + + + +/**********************************/ +/*** LOCAL FUNCTION DEFINITIONS ***/ +/**********************************/ + +/* + * fsm_timeout - Timeout expired. + */ +static void +fsm_timeout(void *arg) +{ + fsm *f = (fsm *) arg; + + switch (f->state) { + case LS_CLOSING: + case LS_STOPPING: + if( f->retransmits <= 0 ) { + FSMDEBUG((LOG_WARNING, "%s: timeout sending Terminate-Request state=%d (%s)\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + /* + * We've waited for an ack long enough. Peer probably heard us. + */ + f->state = (f->state == LS_CLOSING)? LS_CLOSED: LS_STOPPED; + if( f->callbacks->finished ) { + (*f->callbacks->finished)(f); + } + } else { + FSMDEBUG((LOG_WARNING, "%s: timeout resending Terminate-Requests state=%d (%s)\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + /* Send Terminate-Request */ + fsm_sdata(f, TERMREQ, f->reqid = ++f->id, + (u_char *) f->term_reason, f->term_reason_len); + TIMEOUT(fsm_timeout, f, f->timeouttime); + --f->retransmits; + } + break; + + case LS_REQSENT: + case LS_ACKRCVD: + case LS_ACKSENT: + if (f->retransmits <= 0) { + FSMDEBUG((LOG_WARNING, "%s: timeout sending Config-Requests state=%d (%s)\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + f->state = LS_STOPPED; + if( (f->flags & OPT_PASSIVE) == 0 && f->callbacks->finished ) { + (*f->callbacks->finished)(f); + } + } else { + FSMDEBUG((LOG_WARNING, "%s: timeout resending Config-Request state=%d (%s)\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + /* Retransmit the configure-request */ + if (f->callbacks->retransmit) { + (*f->callbacks->retransmit)(f); + } + fsm_sconfreq(f, 1); /* Re-send Configure-Request */ + if( f->state == LS_ACKRCVD ) { + f->state = LS_REQSENT; + } + } + break; + + default: + FSMDEBUG((LOG_INFO, "%s: UNHANDLED timeout event in state %d (%s)!\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + } +} + + +/* + * fsm_rconfreq - Receive Configure-Request. + */ +static void +fsm_rconfreq(fsm *f, u_char id, u_char *inp, int len) +{ + int code, reject_if_disagree; + + FSMDEBUG((LOG_INFO, "fsm_rconfreq(%s): Rcvd id %d state=%d (%s)\n", + PROTO_NAME(f), id, f->state, ppperr_strerr[f->state])); + switch( f->state ) { + case LS_CLOSED: + /* Go away, we're closed */ + fsm_sdata(f, TERMACK, id, NULL, 0); + return; + case LS_CLOSING: + case LS_STOPPING: + return; + + case LS_OPENED: + /* Go down and restart negotiation */ + if( f->callbacks->down ) { + (*f->callbacks->down)(f); /* Inform upper layers */ + } + fsm_sconfreq(f, 0); /* Send initial Configure-Request */ + break; + + case LS_STOPPED: + /* Negotiation started by our peer */ + fsm_sconfreq(f, 0); /* Send initial Configure-Request */ + f->state = LS_REQSENT; + break; + } + + /* + * Pass the requested configuration options + * to protocol-specific code for checking. + */ + if (f->callbacks->reqci) { /* Check CI */ + reject_if_disagree = (f->nakloops >= f->maxnakloops); + code = (*f->callbacks->reqci)(f, inp, &len, reject_if_disagree); + } else if (len) { + code = CONFREJ; /* Reject all CI */ + } else { + code = CONFACK; + } + + /* send the Ack, Nak or Rej to the peer */ + fsm_sdata(f, (u_char)code, id, inp, len); + + if (code == CONFACK) { + if (f->state == LS_ACKRCVD) { + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + f->state = LS_OPENED; + if (f->callbacks->up) { + (*f->callbacks->up)(f); /* Inform upper layers */ + } + } else { + f->state = LS_ACKSENT; + } + f->nakloops = 0; + } else { + /* we sent CONFACK or CONFREJ */ + if (f->state != LS_ACKRCVD) { + f->state = LS_REQSENT; + } + if( code == CONFNAK ) { + ++f->nakloops; + } + } +} + + +/* + * fsm_rconfack - Receive Configure-Ack. + */ +static void +fsm_rconfack(fsm *f, int id, u_char *inp, int len) +{ + FSMDEBUG((LOG_INFO, "fsm_rconfack(%s): Rcvd id %d state=%d (%s)\n", + PROTO_NAME(f), id, f->state, ppperr_strerr[f->state])); + + if (id != f->reqid || f->seen_ack) { /* Expected id? */ + return; /* Nope, toss... */ + } + if( !(f->callbacks->ackci? (*f->callbacks->ackci)(f, inp, len): (len == 0)) ) { + /* Ack is bad - ignore it */ + FSMDEBUG((LOG_INFO, "%s: received bad Ack (length %d)\n", + PROTO_NAME(f), len)); + return; + } + f->seen_ack = 1; + + switch (f->state) { + case LS_CLOSED: + case LS_STOPPED: + fsm_sdata(f, TERMACK, (u_char)id, NULL, 0); + break; + + case LS_REQSENT: + f->state = LS_ACKRCVD; + f->retransmits = f->maxconfreqtransmits; + break; + + case LS_ACKRCVD: + /* Huh? an extra valid Ack? oh well... */ + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + fsm_sconfreq(f, 0); + f->state = LS_REQSENT; + break; + + case LS_ACKSENT: + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + f->state = LS_OPENED; + f->retransmits = f->maxconfreqtransmits; + if (f->callbacks->up) { + (*f->callbacks->up)(f); /* Inform upper layers */ + } + break; + + case LS_OPENED: + /* Go down and restart negotiation */ + if (f->callbacks->down) { + (*f->callbacks->down)(f); /* Inform upper layers */ + } + fsm_sconfreq(f, 0); /* Send initial Configure-Request */ + f->state = LS_REQSENT; + break; + } +} + + +/* + * fsm_rconfnakrej - Receive Configure-Nak or Configure-Reject. + */ +static void +fsm_rconfnakrej(fsm *f, int code, int id, u_char *inp, int len) +{ + int (*proc) (fsm *, u_char *, int); + int ret; + + FSMDEBUG((LOG_INFO, "fsm_rconfnakrej(%s): Rcvd id %d state=%d (%s)\n", + PROTO_NAME(f), id, f->state, ppperr_strerr[f->state])); + + if (id != f->reqid || f->seen_ack) { /* Expected id? */ + return; /* Nope, toss... */ + } + proc = (code == CONFNAK)? f->callbacks->nakci: f->callbacks->rejci; + if (!proc || !((ret = proc(f, inp, len)))) { + /* Nak/reject is bad - ignore it */ + FSMDEBUG((LOG_INFO, "%s: received bad %s (length %d)\n", + PROTO_NAME(f), (code==CONFNAK? "Nak": "reject"), len)); + return; + } + f->seen_ack = 1; + + switch (f->state) { + case LS_CLOSED: + case LS_STOPPED: + fsm_sdata(f, TERMACK, (u_char)id, NULL, 0); + break; + + case LS_REQSENT: + case LS_ACKSENT: + /* They didn't agree to what we wanted - try another request */ + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + if (ret < 0) { + f->state = LS_STOPPED; /* kludge for stopping CCP */ + } else { + fsm_sconfreq(f, 0); /* Send Configure-Request */ + } + break; + + case LS_ACKRCVD: + /* Got a Nak/reject when we had already had an Ack?? oh well... */ + UNTIMEOUT(fsm_timeout, f); /* Cancel timeout */ + fsm_sconfreq(f, 0); + f->state = LS_REQSENT; + break; + + case LS_OPENED: + /* Go down and restart negotiation */ + if (f->callbacks->down) { + (*f->callbacks->down)(f); /* Inform upper layers */ + } + fsm_sconfreq(f, 0); /* Send initial Configure-Request */ + f->state = LS_REQSENT; + break; + } +} + + +/* + * fsm_rtermreq - Receive Terminate-Req. + */ +static void +fsm_rtermreq(fsm *f, int id, u_char *p, int len) +{ + LWIP_UNUSED_ARG(p); + + FSMDEBUG((LOG_INFO, "fsm_rtermreq(%s): Rcvd id %d state=%d (%s)\n", + PROTO_NAME(f), id, f->state, ppperr_strerr[f->state])); + + switch (f->state) { + case LS_ACKRCVD: + case LS_ACKSENT: + f->state = LS_REQSENT; /* Start over but keep trying */ + break; + + case LS_OPENED: + if (len > 0) { + FSMDEBUG((LOG_INFO, "%s terminated by peer (%x)\n", PROTO_NAME(f), p)); + } else { + FSMDEBUG((LOG_INFO, "%s terminated by peer\n", PROTO_NAME(f))); + } + if (f->callbacks->down) { + (*f->callbacks->down)(f); /* Inform upper layers */ + } + f->retransmits = 0; + f->state = LS_STOPPING; + TIMEOUT(fsm_timeout, f, f->timeouttime); + break; + } + + fsm_sdata(f, TERMACK, (u_char)id, NULL, 0); +} + + +/* + * fsm_rtermack - Receive Terminate-Ack. + */ +static void +fsm_rtermack(fsm *f) +{ + FSMDEBUG((LOG_INFO, "fsm_rtermack(%s): state=%d (%s)\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + + switch (f->state) { + case LS_CLOSING: + UNTIMEOUT(fsm_timeout, f); + f->state = LS_CLOSED; + if( f->callbacks->finished ) { + (*f->callbacks->finished)(f); + } + break; + + case LS_STOPPING: + UNTIMEOUT(fsm_timeout, f); + f->state = LS_STOPPED; + if( f->callbacks->finished ) { + (*f->callbacks->finished)(f); + } + break; + + case LS_ACKRCVD: + f->state = LS_REQSENT; + break; + + case LS_OPENED: + if (f->callbacks->down) { + (*f->callbacks->down)(f); /* Inform upper layers */ + } + fsm_sconfreq(f, 0); + break; + } +} + + +/* + * fsm_rcoderej - Receive an Code-Reject. + */ +static void +fsm_rcoderej(fsm *f, u_char *inp, int len) +{ + u_char code, id; + + FSMDEBUG((LOG_INFO, "fsm_rcoderej(%s): state=%d (%s)\n", + PROTO_NAME(f), f->state, ppperr_strerr[f->state])); + + if (len < HEADERLEN) { + FSMDEBUG((LOG_INFO, "fsm_rcoderej: Rcvd short Code-Reject packet!\n")); + return; + } + GETCHAR(code, inp); + GETCHAR(id, inp); + FSMDEBUG((LOG_WARNING, "%s: Rcvd Code-Reject for code %d, id %d\n", + PROTO_NAME(f), code, id)); + + if( f->state == LS_ACKRCVD ) { + f->state = LS_REQSENT; + } +} + + +/* + * fsm_sconfreq - Send a Configure-Request. + */ +static void +fsm_sconfreq(fsm *f, int retransmit) +{ + u_char *outp; + int cilen; + + if( f->state != LS_REQSENT && f->state != LS_ACKRCVD && f->state != LS_ACKSENT ) { + /* Not currently negotiating - reset options */ + if( f->callbacks->resetci ) { + (*f->callbacks->resetci)(f); + } + f->nakloops = 0; + } + + if( !retransmit ) { + /* New request - reset retransmission counter, use new ID */ + f->retransmits = f->maxconfreqtransmits; + f->reqid = ++f->id; + } + + f->seen_ack = 0; + + /* + * Make up the request packet + */ + outp = outpacket_buf[f->unit] + PPP_HDRLEN + HEADERLEN; + if( f->callbacks->cilen && f->callbacks->addci ) { + cilen = (*f->callbacks->cilen)(f); + if( cilen > peer_mru[f->unit] - (int)HEADERLEN ) { + cilen = peer_mru[f->unit] - HEADERLEN; + } + if (f->callbacks->addci) { + (*f->callbacks->addci)(f, outp, &cilen); + } + } else { + cilen = 0; + } + + /* send the request to our peer */ + fsm_sdata(f, CONFREQ, f->reqid, outp, cilen); + + /* start the retransmit timer */ + --f->retransmits; + TIMEOUT(fsm_timeout, f, f->timeouttime); + + FSMDEBUG((LOG_INFO, "%s: sending Configure-Request, id %d\n", + PROTO_NAME(f), f->reqid)); +} + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/fsm.h b/bertos/net/lwip/src/netif/ppp/fsm.h new file mode 100644 index 0000000..14034ec --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/fsm.h @@ -0,0 +1,169 @@ +/***************************************************************************** +* fsm.h - Network Control Protocol Finite State Machine header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* Copyright (c) 1997 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-11-05 Guy Lancaster , Global Election Systems Inc. +* Original based on BSD code. +*****************************************************************************/ +/* + * fsm.h - {Link, IP} Control Protocol Finite State Machine definitions. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * $Id: fsm.h,v 1.4 2007/12/19 20:47:23 fbernon Exp $ + */ + +#ifndef FSM_H +#define FSM_H + +/***************************************************************************** +************************* PUBLIC DEFINITIONS ********************************* +*****************************************************************************/ +/* + * LCP Packet header = Code, id, length. + */ +#define HEADERLEN (sizeof (u_char) + sizeof (u_char) + sizeof (u_short)) + + +/* + * CP (LCP, IPCP, etc.) codes. + */ +#define CONFREQ 1 /* Configuration Request */ +#define CONFACK 2 /* Configuration Ack */ +#define CONFNAK 3 /* Configuration Nak */ +#define CONFREJ 4 /* Configuration Reject */ +#define TERMREQ 5 /* Termination Request */ +#define TERMACK 6 /* Termination Ack */ +#define CODEREJ 7 /* Code Reject */ + +/* + * Link states. + */ +#define LS_INITIAL 0 /* Down, hasn't been opened */ +#define LS_STARTING 1 /* Down, been opened */ +#define LS_CLOSED 2 /* Up, hasn't been opened */ +#define LS_STOPPED 3 /* Open, waiting for down event */ +#define LS_CLOSING 4 /* Terminating the connection, not open */ +#define LS_STOPPING 5 /* Terminating, but open */ +#define LS_REQSENT 6 /* We've sent a Config Request */ +#define LS_ACKRCVD 7 /* We've received a Config Ack */ +#define LS_ACKSENT 8 /* We've sent a Config Ack */ +#define LS_OPENED 9 /* Connection available */ + +/* + * Flags - indicate options controlling FSM operation + */ +#define OPT_PASSIVE 1 /* Don't die if we don't get a response */ +#define OPT_RESTART 2 /* Treat 2nd OPEN as DOWN, UP */ +#define OPT_SILENT 4 /* Wait for peer to speak first */ + + +/***************************************************************************** +************************* PUBLIC DATA TYPES ********************************** +*****************************************************************************/ +/* + * Each FSM is described by an fsm structure and fsm callbacks. + */ +typedef struct fsm { + int unit; /* Interface unit number */ + u_short protocol; /* Data Link Layer Protocol field value */ + int state; /* State */ + int flags; /* Contains option bits */ + u_char id; /* Current id */ + u_char reqid; /* Current request id */ + u_char seen_ack; /* Have received valid Ack/Nak/Rej to Req */ + int timeouttime; /* Timeout time in milliseconds */ + int maxconfreqtransmits; /* Maximum Configure-Request transmissions */ + int retransmits; /* Number of retransmissions left */ + int maxtermtransmits; /* Maximum Terminate-Request transmissions */ + int nakloops; /* Number of nak loops since last ack */ + int maxnakloops; /* Maximum number of nak loops tolerated */ + struct fsm_callbacks* callbacks; /* Callback routines */ + char* term_reason; /* Reason for closing protocol */ + int term_reason_len; /* Length of term_reason */ +} fsm; + + +typedef struct fsm_callbacks { + void (*resetci)(fsm*); /* Reset our Configuration Information */ + int (*cilen)(fsm*); /* Length of our Configuration Information */ + void (*addci)(fsm*, u_char*, int*); /* Add our Configuration Information */ + int (*ackci)(fsm*, u_char*, int); /* ACK our Configuration Information */ + int (*nakci)(fsm*, u_char*, int); /* NAK our Configuration Information */ + int (*rejci)(fsm*, u_char*, int); /* Reject our Configuration Information */ + int (*reqci)(fsm*, u_char*, int*, int); /* Request peer's Configuration Information */ + void (*up)(fsm*); /* Called when fsm reaches LS_OPENED state */ + void (*down)(fsm*); /* Called when fsm leaves LS_OPENED state */ + void (*starting)(fsm*); /* Called when we want the lower layer */ + void (*finished)(fsm*); /* Called when we don't want the lower layer */ + void (*protreject)(int); /* Called when Protocol-Reject received */ + void (*retransmit)(fsm*); /* Retransmission is necessary */ + int (*extcode)(fsm*, int, u_char, u_char*, int); /* Called when unknown code received */ + char *proto_name; /* String name for protocol (for messages) */ +} fsm_callbacks; + + +/***************************************************************************** +*********************** PUBLIC DATA STRUCTURES ******************************* +*****************************************************************************/ +/* + * Variables + */ +extern int peer_mru[]; /* currently negotiated peer MRU (per unit) */ + + +/***************************************************************************** +************************** PUBLIC FUNCTIONS ********************************** +*****************************************************************************/ + +/* + * Prototypes + */ +void fsm_init (fsm*); +void fsm_lowerup (fsm*); +void fsm_lowerdown (fsm*); +void fsm_open (fsm*); +void fsm_close (fsm*, char*); +void fsm_input (fsm*, u_char*, int); +void fsm_protreject (fsm*); +void fsm_sdata (fsm*, u_char, u_char, u_char*, int); + +#endif /* FSM_H */ diff --git a/bertos/net/lwip/src/netif/ppp/ipcp.c b/bertos/net/lwip/src/netif/ppp/ipcp.c new file mode 100644 index 0000000..0ff4ce3 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/ipcp.c @@ -0,0 +1,1427 @@ +/***************************************************************************** +* ipcp.c - Network PPP IP Control Protocol program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 by Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-08 Guy Lancaster , Global Election Systems Inc. +* Original. +*****************************************************************************/ +/* + * ipcp.c - PPP IP Control Protocol. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "auth.h" +#include "fsm.h" +#include "vj.h" +#include "ipcp.h" + +#include + +/*************************/ +/*** LOCAL DEFINITIONS ***/ +/*************************/ +/* #define OLD_CI_ADDRS 1 */ /* Support deprecated address negotiation. */ + +/* + * Lengths of configuration options. + */ +#define CILEN_VOID 2 +#define CILEN_COMPRESS 4 /* min length for compression protocol opt. */ +#define CILEN_VJ 6 /* length for RFC1332 Van-Jacobson opt. */ +#define CILEN_ADDR 6 /* new-style single address option */ +#define CILEN_ADDRS 10 /* old-style dual address option */ + + + +/***********************************/ +/*** LOCAL FUNCTION DECLARATIONS ***/ +/***********************************/ +/* + * Callbacks for fsm code. (CI = Configuration Information) + */ +static void ipcp_resetci (fsm *); /* Reset our CI */ +static int ipcp_cilen (fsm *); /* Return length of our CI */ +static void ipcp_addci (fsm *, u_char *, int *); /* Add our CI */ +static int ipcp_ackci (fsm *, u_char *, int); /* Peer ack'd our CI */ +static int ipcp_nakci (fsm *, u_char *, int); /* Peer nak'd our CI */ +static int ipcp_rejci (fsm *, u_char *, int); /* Peer rej'd our CI */ +static int ipcp_reqci (fsm *, u_char *, int *, int); /* Rcv CI */ +static void ipcp_up (fsm *); /* We're UP */ +static void ipcp_down (fsm *); /* We're DOWN */ +#if 0 +static void ipcp_script (fsm *, char *); /* Run an up/down script */ +#endif +static void ipcp_finished (fsm *); /* Don't need lower layer */ + +/* + * Protocol entry points from main code. + */ +static void ipcp_init (int); +static void ipcp_open (int); +static void ipcp_close (int, char *); +static void ipcp_lowerup (int); +static void ipcp_lowerdown (int); +static void ipcp_input (int, u_char *, int); +static void ipcp_protrej (int); + +static void ipcp_clear_addrs (int); + +#define CODENAME(x) ((x) == CONFACK ? "ACK" : \ + (x) == CONFNAK ? "NAK" : "REJ") + + + +/******************************/ +/*** PUBLIC DATA STRUCTURES ***/ +/******************************/ +/* global vars */ +ipcp_options ipcp_wantoptions[NUM_PPP]; /* Options that we want to request */ +ipcp_options ipcp_gotoptions[NUM_PPP]; /* Options that peer ack'd */ +ipcp_options ipcp_allowoptions[NUM_PPP]; /* Options we allow peer to request */ +ipcp_options ipcp_hisoptions[NUM_PPP]; /* Options that we ack'd */ + +fsm ipcp_fsm[NUM_PPP]; /* IPCP fsm structure */ + +struct protent ipcp_protent = { + PPP_IPCP, + ipcp_init, + ipcp_input, + ipcp_protrej, + ipcp_lowerup, + ipcp_lowerdown, + ipcp_open, + ipcp_close, +#if 0 + ipcp_printpkt, + NULL, +#endif + 1, + "IPCP", +#if 0 + ip_check_options, + NULL, + ip_active_pkt +#endif +}; + + + +/*****************************/ +/*** LOCAL DATA STRUCTURES ***/ +/*****************************/ +/* local vars */ +static int cis_received[NUM_PPP]; /* # Conf-Reqs received */ +static int default_route_set[NUM_PPP]; /* Have set up a default route */ + +static fsm_callbacks ipcp_callbacks = { /* IPCP callback routines */ + ipcp_resetci, /* Reset our Configuration Information */ + ipcp_cilen, /* Length of our Configuration Information */ + ipcp_addci, /* Add our Configuration Information */ + ipcp_ackci, /* ACK our Configuration Information */ + ipcp_nakci, /* NAK our Configuration Information */ + ipcp_rejci, /* Reject our Configuration Information */ + ipcp_reqci, /* Request peer's Configuration Information */ + ipcp_up, /* Called when fsm reaches LS_OPENED state */ + ipcp_down, /* Called when fsm leaves LS_OPENED state */ + NULL, /* Called when we want the lower layer up */ + ipcp_finished, /* Called when we want the lower layer down */ + NULL, /* Called when Protocol-Reject received */ + NULL, /* Retransmission is necessary */ + NULL, /* Called to handle protocol-specific codes */ + "IPCP" /* String name of protocol */ +}; + + + +/**********************************/ +/*** LOCAL FUNCTION DEFINITIONS ***/ +/**********************************/ + +#define inet_ntoa(addr) ip_ntoa(((struct ip_addr*)&(addr))) + +/* + * ipcp_init - Initialize IPCP. + */ +static void +ipcp_init(int unit) +{ + fsm *f = &ipcp_fsm[unit]; + ipcp_options *wo = &ipcp_wantoptions[unit]; + ipcp_options *ao = &ipcp_allowoptions[unit]; + + f->unit = unit; + f->protocol = PPP_IPCP; + f->callbacks = &ipcp_callbacks; + fsm_init(&ipcp_fsm[unit]); + + memset(wo, 0, sizeof(*wo)); + memset(ao, 0, sizeof(*ao)); + + wo->neg_addr = 1; + wo->ouraddr = 0; +#if VJ_SUPPORT + wo->neg_vj = 1; +#else /* VJ_SUPPORT */ + wo->neg_vj = 0; +#endif /* VJ_SUPPORT */ + wo->vj_protocol = IPCP_VJ_COMP; + wo->maxslotindex = MAX_SLOTS - 1; + wo->cflag = 0; + wo->default_route = 1; + + ao->neg_addr = 1; +#if VJ_SUPPORT + ao->neg_vj = 1; +#else /* VJ_SUPPORT */ + ao->neg_vj = 0; +#endif /* VJ_SUPPORT */ + ao->maxslotindex = MAX_SLOTS - 1; + ao->cflag = 1; + ao->default_route = 1; +} + + +/* + * ipcp_open - IPCP is allowed to come up. + */ +static void +ipcp_open(int unit) +{ + fsm_open(&ipcp_fsm[unit]); +} + + +/* + * ipcp_close - Take IPCP down. + */ +static void +ipcp_close(int unit, char *reason) +{ + fsm_close(&ipcp_fsm[unit], reason); +} + + +/* + * ipcp_lowerup - The lower layer is up. + */ +static void +ipcp_lowerup(int unit) +{ + fsm_lowerup(&ipcp_fsm[unit]); +} + + +/* + * ipcp_lowerdown - The lower layer is down. + */ +static void +ipcp_lowerdown(int unit) +{ + fsm_lowerdown(&ipcp_fsm[unit]); +} + + +/* + * ipcp_input - Input IPCP packet. + */ +static void +ipcp_input(int unit, u_char *p, int len) +{ + fsm_input(&ipcp_fsm[unit], p, len); +} + + +/* + * ipcp_protrej - A Protocol-Reject was received for IPCP. + * + * Pretend the lower layer went down, so we shut up. + */ +static void +ipcp_protrej(int unit) +{ + fsm_lowerdown(&ipcp_fsm[unit]); +} + + +/* + * ipcp_resetci - Reset our CI. + */ +static void +ipcp_resetci(fsm *f) +{ + ipcp_options *wo = &ipcp_wantoptions[f->unit]; + + wo->req_addr = wo->neg_addr && ipcp_allowoptions[f->unit].neg_addr; + if (wo->ouraddr == 0) { + wo->accept_local = 1; + } + if (wo->hisaddr == 0) { + wo->accept_remote = 1; + } + /* Request DNS addresses from the peer */ + wo->req_dns1 = ppp_settings.usepeerdns; + wo->req_dns2 = ppp_settings.usepeerdns; + ipcp_gotoptions[f->unit] = *wo; + cis_received[f->unit] = 0; +} + + +/* + * ipcp_cilen - Return length of our CI. + */ +static int +ipcp_cilen(fsm *f) +{ + ipcp_options *go = &ipcp_gotoptions[f->unit]; + ipcp_options *wo = &ipcp_wantoptions[f->unit]; + ipcp_options *ho = &ipcp_hisoptions[f->unit]; + +#define LENCIVJ(neg, old) (neg ? (old? CILEN_COMPRESS : CILEN_VJ) : 0) +#define LENCIADDR(neg, old) (neg ? (old? CILEN_ADDRS : CILEN_ADDR) : 0) +#define LENCIDNS(neg) (neg ? (CILEN_ADDR) : 0) + + /* + * First see if we want to change our options to the old + * forms because we have received old forms from the peer. + */ + if (wo->neg_addr && !go->neg_addr && !go->old_addrs) { + /* use the old style of address negotiation */ + go->neg_addr = 1; + go->old_addrs = 1; + } + if (wo->neg_vj && !go->neg_vj && !go->old_vj) { + /* try an older style of VJ negotiation */ + if (cis_received[f->unit] == 0) { + /* keep trying the new style until we see some CI from the peer */ + go->neg_vj = 1; + } else { + /* use the old style only if the peer did */ + if (ho->neg_vj && ho->old_vj) { + go->neg_vj = 1; + go->old_vj = 1; + go->vj_protocol = ho->vj_protocol; + } + } + } + + return (LENCIADDR(go->neg_addr, go->old_addrs) + + LENCIVJ(go->neg_vj, go->old_vj) + + LENCIDNS(go->req_dns1) + + LENCIDNS(go->req_dns2)); +} + + +/* + * ipcp_addci - Add our desired CIs to a packet. + */ +static void +ipcp_addci(fsm *f, u_char *ucp, int *lenp) +{ + ipcp_options *go = &ipcp_gotoptions[f->unit]; + int len = *lenp; + +#define ADDCIVJ(opt, neg, val, old, maxslotindex, cflag) \ + if (neg) { \ + int vjlen = old? CILEN_COMPRESS : CILEN_VJ; \ + if (len >= vjlen) { \ + PUTCHAR(opt, ucp); \ + PUTCHAR(vjlen, ucp); \ + PUTSHORT(val, ucp); \ + if (!old) { \ + PUTCHAR(maxslotindex, ucp); \ + PUTCHAR(cflag, ucp); \ + } \ + len -= vjlen; \ + } else { \ + neg = 0; \ + } \ + } + +#define ADDCIADDR(opt, neg, old, val1, val2) \ + if (neg) { \ + int addrlen = (old? CILEN_ADDRS: CILEN_ADDR); \ + if (len >= addrlen) { \ + u32_t l; \ + PUTCHAR(opt, ucp); \ + PUTCHAR(addrlen, ucp); \ + l = ntohl(val1); \ + PUTLONG(l, ucp); \ + if (old) { \ + l = ntohl(val2); \ + PUTLONG(l, ucp); \ + } \ + len -= addrlen; \ + } else { \ + neg = 0; \ + } \ + } + +#define ADDCIDNS(opt, neg, addr) \ + if (neg) { \ + if (len >= CILEN_ADDR) { \ + u32_t l; \ + PUTCHAR(opt, ucp); \ + PUTCHAR(CILEN_ADDR, ucp); \ + l = ntohl(addr); \ + PUTLONG(l, ucp); \ + len -= CILEN_ADDR; \ + } else { \ + neg = 0; \ + } \ + } + + ADDCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), go->neg_addr, + go->old_addrs, go->ouraddr, go->hisaddr); + + ADDCIVJ(CI_COMPRESSTYPE, go->neg_vj, go->vj_protocol, go->old_vj, + go->maxslotindex, go->cflag); + + ADDCIDNS(CI_MS_DNS1, go->req_dns1, go->dnsaddr[0]); + + ADDCIDNS(CI_MS_DNS2, go->req_dns2, go->dnsaddr[1]); + + *lenp -= len; +} + + +/* + * ipcp_ackci - Ack our CIs. + * + * Returns: + * 0 - Ack was bad. + * 1 - Ack was good. + */ +static int +ipcp_ackci(fsm *f, u_char *p, int len) +{ + ipcp_options *go = &ipcp_gotoptions[f->unit]; + u_short cilen, citype, cishort; + u32_t cilong; + u_char cimaxslotindex, cicflag; + + /* + * CIs must be in exactly the same order that we sent... + * Check packet length and CI length at each step. + * If we find any deviations, then this packet is bad. + */ + +#define ACKCIVJ(opt, neg, val, old, maxslotindex, cflag) \ + if (neg) { \ + int vjlen = old? CILEN_COMPRESS : CILEN_VJ; \ + if ((len -= vjlen) < 0) { \ + goto bad; \ + } \ + GETCHAR(citype, p); \ + GETCHAR(cilen, p); \ + if (cilen != vjlen || \ + citype != opt) { \ + goto bad; \ + } \ + GETSHORT(cishort, p); \ + if (cishort != val) { \ + goto bad; \ + } \ + if (!old) { \ + GETCHAR(cimaxslotindex, p); \ + if (cimaxslotindex != maxslotindex) { \ + goto bad; \ + } \ + GETCHAR(cicflag, p); \ + if (cicflag != cflag) { \ + goto bad; \ + } \ + } \ + } + +#define ACKCIADDR(opt, neg, old, val1, val2) \ + if (neg) { \ + int addrlen = (old? CILEN_ADDRS: CILEN_ADDR); \ + u32_t l; \ + if ((len -= addrlen) < 0) { \ + goto bad; \ + } \ + GETCHAR(citype, p); \ + GETCHAR(cilen, p); \ + if (cilen != addrlen || \ + citype != opt) { \ + goto bad; \ + } \ + GETLONG(l, p); \ + cilong = htonl(l); \ + if (val1 != cilong) { \ + goto bad; \ + } \ + if (old) { \ + GETLONG(l, p); \ + cilong = htonl(l); \ + if (val2 != cilong) { \ + goto bad; \ + } \ + } \ + } + +#define ACKCIDNS(opt, neg, addr) \ + if (neg) { \ + u32_t l; \ + if ((len -= CILEN_ADDR) < 0) { \ + goto bad; \ + } \ + GETCHAR(citype, p); \ + GETCHAR(cilen, p); \ + if (cilen != CILEN_ADDR || \ + citype != opt) { \ + goto bad; \ + } \ + GETLONG(l, p); \ + cilong = htonl(l); \ + if (addr != cilong) { \ + goto bad; \ + } \ + } + + ACKCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), go->neg_addr, + go->old_addrs, go->ouraddr, go->hisaddr); + + ACKCIVJ(CI_COMPRESSTYPE, go->neg_vj, go->vj_protocol, go->old_vj, + go->maxslotindex, go->cflag); + + ACKCIDNS(CI_MS_DNS1, go->req_dns1, go->dnsaddr[0]); + + ACKCIDNS(CI_MS_DNS2, go->req_dns2, go->dnsaddr[1]); + + /* + * If there are any remaining CIs, then this packet is bad. + */ + if (len != 0) { + goto bad; + } + return (1); + +bad: + IPCPDEBUG((LOG_INFO, "ipcp_ackci: received bad Ack!\n")); + return (0); +} + +/* + * ipcp_nakci - Peer has sent a NAK for some of our CIs. + * This should not modify any state if the Nak is bad + * or if IPCP is in the LS_OPENED state. + * + * Returns: + * 0 - Nak was bad. + * 1 - Nak was good. + */ +static int +ipcp_nakci(fsm *f, u_char *p, int len) +{ + ipcp_options *go = &ipcp_gotoptions[f->unit]; + u_char cimaxslotindex, cicflag; + u_char citype, cilen, *next; + u_short cishort; + u32_t ciaddr1, ciaddr2, l, cidnsaddr; + ipcp_options no; /* options we've seen Naks for */ + ipcp_options try; /* options to request next time */ + + BZERO(&no, sizeof(no)); + try = *go; + + /* + * Any Nak'd CIs must be in exactly the same order that we sent. + * Check packet length and CI length at each step. + * If we find any deviations, then this packet is bad. + */ +#define NAKCIADDR(opt, neg, old, code) \ + if (go->neg && \ + len >= (cilen = (old? CILEN_ADDRS: CILEN_ADDR)) && \ + p[1] == cilen && \ + p[0] == opt) { \ + len -= cilen; \ + INCPTR(2, p); \ + GETLONG(l, p); \ + ciaddr1 = htonl(l); \ + if (old) { \ + GETLONG(l, p); \ + ciaddr2 = htonl(l); \ + no.old_addrs = 1; \ + } else { \ + ciaddr2 = 0; \ + } \ + no.neg = 1; \ + code \ + } + +#define NAKCIVJ(opt, neg, code) \ + if (go->neg && \ + ((cilen = p[1]) == CILEN_COMPRESS || cilen == CILEN_VJ) && \ + len >= cilen && \ + p[0] == opt) { \ + len -= cilen; \ + INCPTR(2, p); \ + GETSHORT(cishort, p); \ + no.neg = 1; \ + code \ + } + +#define NAKCIDNS(opt, neg, code) \ + if (go->neg && \ + ((cilen = p[1]) == CILEN_ADDR) && \ + len >= cilen && \ + p[0] == opt) { \ + len -= cilen; \ + INCPTR(2, p); \ + GETLONG(l, p); \ + cidnsaddr = htonl(l); \ + no.neg = 1; \ + code \ + } + + /* + * Accept the peer's idea of {our,his} address, if different + * from our idea, only if the accept_{local,remote} flag is set. + */ + NAKCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), neg_addr, go->old_addrs, + if (go->accept_local && ciaddr1) { /* Do we know our address? */ + try.ouraddr = ciaddr1; + IPCPDEBUG((LOG_INFO, "local IP address %s\n", + inet_ntoa(ciaddr1))); + } + if (go->accept_remote && ciaddr2) { /* Does he know his? */ + try.hisaddr = ciaddr2; + IPCPDEBUG((LOG_INFO, "remote IP address %s\n", + inet_ntoa(ciaddr2))); + } + ); + + /* + * Accept the peer's value of maxslotindex provided that it + * is less than what we asked for. Turn off slot-ID compression + * if the peer wants. Send old-style compress-type option if + * the peer wants. + */ + NAKCIVJ(CI_COMPRESSTYPE, neg_vj, + if (cilen == CILEN_VJ) { + GETCHAR(cimaxslotindex, p); + GETCHAR(cicflag, p); + if (cishort == IPCP_VJ_COMP) { + try.old_vj = 0; + if (cimaxslotindex < go->maxslotindex) { + try.maxslotindex = cimaxslotindex; + } + if (!cicflag) { + try.cflag = 0; + } + } else { + try.neg_vj = 0; + } + } else { + if (cishort == IPCP_VJ_COMP || cishort == IPCP_VJ_COMP_OLD) { + try.old_vj = 1; + try.vj_protocol = cishort; + } else { + try.neg_vj = 0; + } + } + ); + + NAKCIDNS(CI_MS_DNS1, req_dns1, + try.dnsaddr[0] = cidnsaddr; + IPCPDEBUG((LOG_INFO, "primary DNS address %s\n", inet_ntoa(cidnsaddr))); + ); + + NAKCIDNS(CI_MS_DNS2, req_dns2, + try.dnsaddr[1] = cidnsaddr; + IPCPDEBUG((LOG_INFO, "secondary DNS address %s\n", inet_ntoa(cidnsaddr))); + ); + + /* + * There may be remaining CIs, if the peer is requesting negotiation + * on an option that we didn't include in our request packet. + * If they want to negotiate about IP addresses, we comply. + * If they want us to ask for compression, we refuse. + */ + while (len > CILEN_VOID) { + GETCHAR(citype, p); + GETCHAR(cilen, p); + if( (len -= cilen) < 0 ) { + goto bad; + } + next = p + cilen - 2; + + switch (citype) { + case CI_COMPRESSTYPE: + if (go->neg_vj || no.neg_vj || + (cilen != CILEN_VJ && cilen != CILEN_COMPRESS)) { + goto bad; + } + no.neg_vj = 1; + break; + case CI_ADDRS: + if ((go->neg_addr && go->old_addrs) || no.old_addrs + || cilen != CILEN_ADDRS) { + goto bad; + } + try.neg_addr = 1; + try.old_addrs = 1; + GETLONG(l, p); + ciaddr1 = htonl(l); + if (ciaddr1 && go->accept_local) { + try.ouraddr = ciaddr1; + } + GETLONG(l, p); + ciaddr2 = htonl(l); + if (ciaddr2 && go->accept_remote) { + try.hisaddr = ciaddr2; + } + no.old_addrs = 1; + break; + case CI_ADDR: + if (go->neg_addr || no.neg_addr || cilen != CILEN_ADDR) { + goto bad; + } + try.old_addrs = 0; + GETLONG(l, p); + ciaddr1 = htonl(l); + if (ciaddr1 && go->accept_local) { + try.ouraddr = ciaddr1; + } + if (try.ouraddr != 0) { + try.neg_addr = 1; + } + no.neg_addr = 1; + break; + } + p = next; + } + + /* If there is still anything left, this packet is bad. */ + if (len != 0) { + goto bad; + } + + /* + * OK, the Nak is good. Now we can update state. + */ + if (f->state != LS_OPENED) { + *go = try; + } + + return 1; + +bad: + IPCPDEBUG((LOG_INFO, "ipcp_nakci: received bad Nak!\n")); + return 0; +} + + +/* + * ipcp_rejci - Reject some of our CIs. + */ +static int +ipcp_rejci(fsm *f, u_char *p, int len) +{ + ipcp_options *go = &ipcp_gotoptions[f->unit]; + u_char cimaxslotindex, ciflag, cilen; + u_short cishort; + u32_t cilong; + ipcp_options try; /* options to request next time */ + + try = *go; + /* + * Any Rejected CIs must be in exactly the same order that we sent. + * Check packet length and CI length at each step. + * If we find any deviations, then this packet is bad. + */ +#define REJCIADDR(opt, neg, old, val1, val2) \ + if (go->neg && \ + len >= (cilen = old? CILEN_ADDRS: CILEN_ADDR) && \ + p[1] == cilen && \ + p[0] == opt) { \ + u32_t l; \ + len -= cilen; \ + INCPTR(2, p); \ + GETLONG(l, p); \ + cilong = htonl(l); \ + /* Check rejected value. */ \ + if (cilong != val1) { \ + goto bad; \ + } \ + if (old) { \ + GETLONG(l, p); \ + cilong = htonl(l); \ + /* Check rejected value. */ \ + if (cilong != val2) { \ + goto bad; \ + } \ + } \ + try.neg = 0; \ + } + +#define REJCIVJ(opt, neg, val, old, maxslot, cflag) \ + if (go->neg && \ + p[1] == (old? CILEN_COMPRESS : CILEN_VJ) && \ + len >= p[1] && \ + p[0] == opt) { \ + len -= p[1]; \ + INCPTR(2, p); \ + GETSHORT(cishort, p); \ + /* Check rejected value. */ \ + if (cishort != val) { \ + goto bad; \ + } \ + if (!old) { \ + GETCHAR(cimaxslotindex, p); \ + if (cimaxslotindex != maxslot) { \ + goto bad; \ + } \ + GETCHAR(ciflag, p); \ + if (ciflag != cflag) { \ + goto bad; \ + } \ + } \ + try.neg = 0; \ + } + +#define REJCIDNS(opt, neg, dnsaddr) \ + if (go->neg && \ + ((cilen = p[1]) == CILEN_ADDR) && \ + len >= cilen && \ + p[0] == opt) { \ + u32_t l; \ + len -= cilen; \ + INCPTR(2, p); \ + GETLONG(l, p); \ + cilong = htonl(l); \ + /* Check rejected value. */ \ + if (cilong != dnsaddr) { \ + goto bad; \ + } \ + try.neg = 0; \ + } + + REJCIADDR((go->old_addrs? CI_ADDRS: CI_ADDR), neg_addr, + go->old_addrs, go->ouraddr, go->hisaddr); + + REJCIVJ(CI_COMPRESSTYPE, neg_vj, go->vj_protocol, go->old_vj, + go->maxslotindex, go->cflag); + + REJCIDNS(CI_MS_DNS1, req_dns1, go->dnsaddr[0]); + + REJCIDNS(CI_MS_DNS2, req_dns2, go->dnsaddr[1]); + + /* + * If there are any remaining CIs, then this packet is bad. + */ + if (len != 0) { + goto bad; + } + /* + * Now we can update state. + */ + if (f->state != LS_OPENED) { + *go = try; + } + return 1; + +bad: + IPCPDEBUG((LOG_INFO, "ipcp_rejci: received bad Reject!\n")); + return 0; +} + + +/* + * ipcp_reqci - Check the peer's requested CIs and send appropriate response. + * + * Returns: CONFACK, CONFNAK or CONFREJ and input packet modified + * appropriately. If reject_if_disagree is non-zero, doesn't return + * CONFNAK; returns CONFREJ if it can't return CONFACK. + */ +static int +ipcp_reqci(fsm *f, u_char *inp/* Requested CIs */,int *len/* Length of requested CIs */,int reject_if_disagree) +{ + ipcp_options *wo = &ipcp_wantoptions[f->unit]; + ipcp_options *ho = &ipcp_hisoptions[f->unit]; + ipcp_options *ao = &ipcp_allowoptions[f->unit]; +#ifdef OLD_CI_ADDRS + ipcp_options *go = &ipcp_gotoptions[f->unit]; +#endif + u_char *cip, *next; /* Pointer to current and next CIs */ + u_short cilen, citype; /* Parsed len, type */ + u_short cishort; /* Parsed short value */ + u32_t tl, ciaddr1; /* Parsed address values */ +#ifdef OLD_CI_ADDRS + u32_t ciaddr2; /* Parsed address values */ +#endif + int rc = CONFACK; /* Final packet return code */ + int orc; /* Individual option return code */ + u_char *p; /* Pointer to next char to parse */ + u_char *ucp = inp; /* Pointer to current output char */ + int l = *len; /* Length left */ + u_char maxslotindex, cflag; + int d; + + cis_received[f->unit] = 1; + + /* + * Reset all his options. + */ + BZERO(ho, sizeof(*ho)); + + /* + * Process all his options. + */ + next = inp; + while (l) { + orc = CONFACK; /* Assume success */ + cip = p = next; /* Remember begining of CI */ + if (l < 2 || /* Not enough data for CI header or */ + p[1] < 2 || /* CI length too small or */ + p[1] > l) { /* CI length too big? */ + IPCPDEBUG((LOG_INFO, "ipcp_reqci: bad CI length!\n")); + orc = CONFREJ; /* Reject bad CI */ + cilen = l; /* Reject till end of packet */ + l = 0; /* Don't loop again */ + goto endswitch; + } + GETCHAR(citype, p); /* Parse CI type */ + GETCHAR(cilen, p); /* Parse CI length */ + l -= cilen; /* Adjust remaining length */ + next += cilen; /* Step to next CI */ + + switch (citype) { /* Check CI type */ +#ifdef OLD_CI_ADDRS /* Need to save space... */ + case CI_ADDRS: + IPCPDEBUG((LOG_INFO, "ipcp_reqci: received ADDRS\n")); + if (!ao->neg_addr || + cilen != CILEN_ADDRS) { /* Check CI length */ + orc = CONFREJ; /* Reject CI */ + break; + } + + /* + * If he has no address, or if we both have his address but + * disagree about it, then NAK it with our idea. + * In particular, if we don't know his address, but he does, + * then accept it. + */ + GETLONG(tl, p); /* Parse source address (his) */ + ciaddr1 = htonl(tl); + IPCPDEBUG((LOG_INFO, "his addr %s\n", inet_ntoa(ciaddr1))); + if (ciaddr1 != wo->hisaddr + && (ciaddr1 == 0 || !wo->accept_remote)) { + orc = CONFNAK; + if (!reject_if_disagree) { + DECPTR(sizeof(u32_t), p); + tl = ntohl(wo->hisaddr); + PUTLONG(tl, p); + } + } else if (ciaddr1 == 0 && wo->hisaddr == 0) { + /* + * If neither we nor he knows his address, reject the option. + */ + orc = CONFREJ; + wo->req_addr = 0; /* don't NAK with 0.0.0.0 later */ + break; + } + + /* + * If he doesn't know our address, or if we both have our address + * but disagree about it, then NAK it with our idea. + */ + GETLONG(tl, p); /* Parse desination address (ours) */ + ciaddr2 = htonl(tl); + IPCPDEBUG((LOG_INFO, "our addr %s\n", inet_ntoa(ciaddr2))); + if (ciaddr2 != wo->ouraddr) { + if (ciaddr2 == 0 || !wo->accept_local) { + orc = CONFNAK; + if (!reject_if_disagree) { + DECPTR(sizeof(u32_t), p); + tl = ntohl(wo->ouraddr); + PUTLONG(tl, p); + } + } else { + go->ouraddr = ciaddr2; /* accept peer's idea */ + } + } + + ho->neg_addr = 1; + ho->old_addrs = 1; + ho->hisaddr = ciaddr1; + ho->ouraddr = ciaddr2; + break; +#endif + + case CI_ADDR: + if (!ao->neg_addr) { + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Reject ADDR not allowed\n")); + orc = CONFREJ; /* Reject CI */ + break; + } else if (cilen != CILEN_ADDR) { /* Check CI length */ + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Reject ADDR bad len\n")); + orc = CONFREJ; /* Reject CI */ + break; + } + + /* + * If he has no address, or if we both have his address but + * disagree about it, then NAK it with our idea. + * In particular, if we don't know his address, but he does, + * then accept it. + */ + GETLONG(tl, p); /* Parse source address (his) */ + ciaddr1 = htonl(tl); + if (ciaddr1 != wo->hisaddr + && (ciaddr1 == 0 || !wo->accept_remote)) { + orc = CONFNAK; + if (!reject_if_disagree) { + DECPTR(sizeof(u32_t), p); + tl = ntohl(wo->hisaddr); + PUTLONG(tl, p); + } + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Nak ADDR %s\n", inet_ntoa(ciaddr1))); + } else if (ciaddr1 == 0 && wo->hisaddr == 0) { + /* + * Don't ACK an address of 0.0.0.0 - reject it instead. + */ + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Reject ADDR %s\n", inet_ntoa(ciaddr1))); + orc = CONFREJ; + wo->req_addr = 0; /* don't NAK with 0.0.0.0 later */ + break; + } + + ho->neg_addr = 1; + ho->hisaddr = ciaddr1; + IPCPDEBUG((LOG_INFO, "ipcp_reqci: ADDR %s\n", inet_ntoa(ciaddr1))); + break; + + case CI_MS_DNS1: + case CI_MS_DNS2: + /* Microsoft primary or secondary DNS request */ + d = citype == CI_MS_DNS2; + + /* If we do not have a DNS address then we cannot send it */ + if (ao->dnsaddr[d] == 0 || + cilen != CILEN_ADDR) { /* Check CI length */ + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting DNS%d Request\n", d+1)); + orc = CONFREJ; /* Reject CI */ + break; + } + GETLONG(tl, p); + if (htonl(tl) != ao->dnsaddr[d]) { + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Naking DNS%d Request %d\n", + d+1, inet_ntoa(tl))); + DECPTR(sizeof(u32_t), p); + tl = ntohl(ao->dnsaddr[d]); + PUTLONG(tl, p); + orc = CONFNAK; + } + IPCPDEBUG((LOG_INFO, "ipcp_reqci: received DNS%d Request\n", d+1)); + break; + + case CI_MS_WINS1: + case CI_MS_WINS2: + /* Microsoft primary or secondary WINS request */ + d = citype == CI_MS_WINS2; + IPCPDEBUG((LOG_INFO, "ipcp_reqci: received WINS%d Request\n", d+1)); + + /* If we do not have a DNS address then we cannot send it */ + if (ao->winsaddr[d] == 0 || + cilen != CILEN_ADDR) { /* Check CI length */ + orc = CONFREJ; /* Reject CI */ + break; + } + GETLONG(tl, p); + if (htonl(tl) != ao->winsaddr[d]) { + DECPTR(sizeof(u32_t), p); + tl = ntohl(ao->winsaddr[d]); + PUTLONG(tl, p); + orc = CONFNAK; + } + break; + + case CI_COMPRESSTYPE: + if (!ao->neg_vj) { + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting COMPRESSTYPE not allowed\n")); + orc = CONFREJ; + break; + } else if (cilen != CILEN_VJ && cilen != CILEN_COMPRESS) { + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting COMPRESSTYPE len=%d\n", cilen)); + orc = CONFREJ; + break; + } + GETSHORT(cishort, p); + + if (!(cishort == IPCP_VJ_COMP || + (cishort == IPCP_VJ_COMP_OLD && cilen == CILEN_COMPRESS))) { + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting COMPRESSTYPE %d\n", cishort)); + orc = CONFREJ; + break; + } + + ho->neg_vj = 1; + ho->vj_protocol = cishort; + if (cilen == CILEN_VJ) { + GETCHAR(maxslotindex, p); + if (maxslotindex > ao->maxslotindex) { + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Naking VJ max slot %d\n", maxslotindex)); + orc = CONFNAK; + if (!reject_if_disagree) { + DECPTR(1, p); + PUTCHAR(ao->maxslotindex, p); + } + } + GETCHAR(cflag, p); + if (cflag && !ao->cflag) { + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Naking VJ cflag %d\n", cflag)); + orc = CONFNAK; + if (!reject_if_disagree) { + DECPTR(1, p); + PUTCHAR(wo->cflag, p); + } + } + ho->maxslotindex = maxslotindex; + ho->cflag = cflag; + } else { + ho->old_vj = 1; + ho->maxslotindex = MAX_SLOTS - 1; + ho->cflag = 1; + } + IPCPDEBUG((LOG_INFO, + "ipcp_reqci: received COMPRESSTYPE p=%d old=%d maxslot=%d cflag=%d\n", + ho->vj_protocol, ho->old_vj, ho->maxslotindex, ho->cflag)); + break; + + default: + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting unknown CI type %d\n", citype)); + orc = CONFREJ; + break; + } + +endswitch: + if (orc == CONFACK && /* Good CI */ + rc != CONFACK) { /* but prior CI wasnt? */ + continue; /* Don't send this one */ + } + + if (orc == CONFNAK) { /* Nak this CI? */ + if (reject_if_disagree) { /* Getting fed up with sending NAKs? */ + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Rejecting too many naks\n")); + orc = CONFREJ; /* Get tough if so */ + } else { + if (rc == CONFREJ) { /* Rejecting prior CI? */ + continue; /* Don't send this one */ + } + if (rc == CONFACK) { /* Ack'd all prior CIs? */ + rc = CONFNAK; /* Not anymore... */ + ucp = inp; /* Backup */ + } + } + } + + if (orc == CONFREJ && /* Reject this CI */ + rc != CONFREJ) { /* but no prior ones? */ + rc = CONFREJ; + ucp = inp; /* Backup */ + } + + /* Need to move CI? */ + if (ucp != cip) { + BCOPY(cip, ucp, cilen); /* Move it */ + } + + /* Update output pointer */ + INCPTR(cilen, ucp); + } + + /* + * If we aren't rejecting this packet, and we want to negotiate + * their address, and they didn't send their address, then we + * send a NAK with a CI_ADDR option appended. We assume the + * input buffer is long enough that we can append the extra + * option safely. + */ + if (rc != CONFREJ && !ho->neg_addr && + wo->req_addr && !reject_if_disagree) { + IPCPDEBUG((LOG_INFO, "ipcp_reqci: Requesting peer address\n")); + if (rc == CONFACK) { + rc = CONFNAK; + ucp = inp; /* reset pointer */ + wo->req_addr = 0; /* don't ask again */ + } + PUTCHAR(CI_ADDR, ucp); + PUTCHAR(CILEN_ADDR, ucp); + tl = ntohl(wo->hisaddr); + PUTLONG(tl, ucp); + } + + *len = (int)(ucp - inp); /* Compute output length */ + IPCPDEBUG((LOG_INFO, "ipcp_reqci: returning Configure-%s\n", CODENAME(rc))); + return (rc); /* Return final code */ +} + + +#if 0 +/* + * ip_check_options - check that any IP-related options are OK, + * and assign appropriate defaults. + */ +static void +ip_check_options(u_long localAddr) +{ + ipcp_options *wo = &ipcp_wantoptions[0]; + + /* + * Load our default IP address but allow the remote host to give us + * a new address. + */ + if (wo->ouraddr == 0 && !ppp_settings.disable_defaultip) { + wo->accept_local = 1; /* don't insist on this default value */ + wo->ouraddr = htonl(localAddr); + } +} +#endif + + +/* + * ipcp_up - IPCP has come UP. + * + * Configure the IP network interface appropriately and bring it up. + */ +static void +ipcp_up(fsm *f) +{ + u32_t mask; + ipcp_options *ho = &ipcp_hisoptions[f->unit]; + ipcp_options *go = &ipcp_gotoptions[f->unit]; + ipcp_options *wo = &ipcp_wantoptions[f->unit]; + + np_up(f->unit, PPP_IP); + IPCPDEBUG((LOG_INFO, "ipcp: up\n")); + + /* + * We must have a non-zero IP address for both ends of the link. + */ + if (!ho->neg_addr) { + ho->hisaddr = wo->hisaddr; + } + + if (ho->hisaddr == 0) { + IPCPDEBUG((LOG_ERR, "Could not determine remote IP address\n")); + ipcp_close(f->unit, "Could not determine remote IP address"); + return; + } + if (go->ouraddr == 0) { + IPCPDEBUG((LOG_ERR, "Could not determine local IP address\n")); + ipcp_close(f->unit, "Could not determine local IP address"); + return; + } + + if (ppp_settings.usepeerdns && (go->dnsaddr[0] || go->dnsaddr[1])) { + /*pppGotDNSAddrs(go->dnsaddr[0], go->dnsaddr[1]);*/ + } + + /* + * Check that the peer is allowed to use the IP address it wants. + */ + if (!auth_ip_addr(f->unit, ho->hisaddr)) { + IPCPDEBUG((LOG_ERR, "Peer is not authorized to use remote address %s\n", + inet_ntoa(ho->hisaddr))); + ipcp_close(f->unit, "Unauthorized remote IP address"); + return; + } + + /* set tcp compression */ + sifvjcomp(f->unit, ho->neg_vj, ho->cflag, ho->maxslotindex); + + /* + * Set IP addresses and (if specified) netmask. + */ + mask = GetMask(go->ouraddr); + + if (!sifaddr(f->unit, go->ouraddr, ho->hisaddr, mask, go->dnsaddr[0], go->dnsaddr[1])) { + IPCPDEBUG((LOG_WARNING, "sifaddr failed\n")); + ipcp_close(f->unit, "Interface configuration failed"); + return; + } + + /* bring the interface up for IP */ + if (!sifup(f->unit)) { + IPCPDEBUG((LOG_WARNING, "sifup failed\n")); + ipcp_close(f->unit, "Interface configuration failed"); + return; + } + + sifnpmode(f->unit, PPP_IP, NPMODE_PASS); + + /* assign a default route through the interface if required */ + if (ipcp_wantoptions[f->unit].default_route) { + if (sifdefaultroute(f->unit, go->ouraddr, ho->hisaddr)) { + default_route_set[f->unit] = 1; + } + } + + IPCPDEBUG((LOG_NOTICE, "local IP address %s\n", inet_ntoa(go->ouraddr))); + IPCPDEBUG((LOG_NOTICE, "remote IP address %s\n", inet_ntoa(ho->hisaddr))); + if (go->dnsaddr[0]) { + IPCPDEBUG((LOG_NOTICE, "primary DNS address %s\n", inet_ntoa(go->dnsaddr[0]))); + } + if (go->dnsaddr[1]) { + IPCPDEBUG((LOG_NOTICE, "secondary DNS address %s\n", inet_ntoa(go->dnsaddr[1]))); + } +} + + +/* + * ipcp_down - IPCP has gone DOWN. + * + * Take the IP network interface down, clear its addresses + * and delete routes through it. + */ +static void +ipcp_down(fsm *f) +{ + IPCPDEBUG((LOG_INFO, "ipcp: down\n")); + np_down(f->unit, PPP_IP); + sifvjcomp(f->unit, 0, 0, 0); + + sifdown(f->unit); + ipcp_clear_addrs(f->unit); +} + + +/* + * ipcp_clear_addrs() - clear the interface addresses, routes, etc. + */ +static void +ipcp_clear_addrs(int unit) +{ + u32_t ouraddr, hisaddr; + + ouraddr = ipcp_gotoptions[unit].ouraddr; + hisaddr = ipcp_hisoptions[unit].hisaddr; + if (default_route_set[unit]) { + cifdefaultroute(unit, ouraddr, hisaddr); + default_route_set[unit] = 0; + } + cifaddr(unit, ouraddr, hisaddr); +} + + +/* + * ipcp_finished - possibly shut down the lower layers. + */ +static void +ipcp_finished(fsm *f) +{ + np_finished(f->unit, PPP_IP); +} + +#if 0 +static int +ipcp_printpkt(u_char *p, int plen, void (*printer) (void *, char *, ...), void *arg) +{ + LWIP_UNUSED_ARG(p); + LWIP_UNUSED_ARG(plen); + LWIP_UNUSED_ARG(printer); + LWIP_UNUSED_ARG(arg); + return 0; +} + +/* + * ip_active_pkt - see if this IP packet is worth bringing the link up for. + * We don't bring the link up for IP fragments or for TCP FIN packets + * with no data. + */ +#define IP_HDRLEN 20 /* bytes */ +#define IP_OFFMASK 0x1fff +#define IPPROTO_TCP 6 +#define TCP_HDRLEN 20 +#define TH_FIN 0x01 + +/* + * We use these macros because the IP header may be at an odd address, + * and some compilers might use word loads to get th_off or ip_hl. + */ + +#define net_short(x) (((x)[0] << 8) + (x)[1]) +#define get_iphl(x) (((unsigned char *)(x))[0] & 0xF) +#define get_ipoff(x) net_short((unsigned char *)(x) + 6) +#define get_ipproto(x) (((unsigned char *)(x))[9]) +#define get_tcpoff(x) (((unsigned char *)(x))[12] >> 4) +#define get_tcpflags(x) (((unsigned char *)(x))[13]) + +static int +ip_active_pkt(u_char *pkt, int len) +{ + u_char *tcp; + int hlen; + + len -= PPP_HDRLEN; + pkt += PPP_HDRLEN; + if (len < IP_HDRLEN) { + return 0; + } + if ((get_ipoff(pkt) & IP_OFFMASK) != 0) { + return 0; + } + if (get_ipproto(pkt) != IPPROTO_TCP) { + return 1; + } + hlen = get_iphl(pkt) * 4; + if (len < hlen + TCP_HDRLEN) { + return 0; + } + tcp = pkt + hlen; + if ((get_tcpflags(tcp) & TH_FIN) != 0 && len == hlen + get_tcpoff(tcp) * 4) { + return 0; + } + return 1; +} +#endif + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/ipcp.h b/bertos/net/lwip/src/netif/ppp/ipcp.h new file mode 100644 index 0000000..dfcf4fb --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/ipcp.h @@ -0,0 +1,124 @@ +/***************************************************************************** +* ipcp.h - PPP IP NCP: Internet Protocol Network Control Protocol header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-04 Guy Lancaster , Global Election Systems Inc. +* Original derived from BSD codes. +*****************************************************************************/ +/* + * ipcp.h - IP Control Protocol definitions. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * $Id: ipcp.h,v 1.3 2007/12/19 20:47:23 fbernon Exp $ + */ + +#ifndef IPCP_H +#define IPCP_H + +/************************* +*** PUBLIC DEFINITIONS *** +*************************/ +/* + * Options. + */ +#define CI_ADDRS 1 /* IP Addresses */ +#define CI_COMPRESSTYPE 2 /* Compression Type */ +#define CI_ADDR 3 + +#define CI_MS_WINS1 128 /* Primary WINS value */ +#define CI_MS_DNS1 129 /* Primary DNS value */ +#define CI_MS_WINS2 130 /* Secondary WINS value */ +#define CI_MS_DNS2 131 /* Secondary DNS value */ + +#define IPCP_VJMODE_OLD 1 /* "old" mode (option # = 0x0037) */ +#define IPCP_VJMODE_RFC1172 2 /* "old-rfc"mode (option # = 0x002d) */ +#define IPCP_VJMODE_RFC1332 3 /* "new-rfc"mode (option # = 0x002d, */ + /* maxslot and slot number compression) */ + +#define IPCP_VJ_COMP 0x002d /* current value for VJ compression option */ +#define IPCP_VJ_COMP_OLD 0x0037 /* "old" (i.e, broken) value for VJ */ + /* compression option */ + + +/************************ +*** PUBLIC DATA TYPES *** +************************/ + +typedef struct ipcp_options { + u_int neg_addr : 1; /* Negotiate IP Address? */ + u_int old_addrs : 1; /* Use old (IP-Addresses) option? */ + u_int req_addr : 1; /* Ask peer to send IP address? */ + u_int default_route : 1; /* Assign default route through interface? */ + u_int proxy_arp : 1; /* Make proxy ARP entry for peer? */ + u_int neg_vj : 1; /* Van Jacobson Compression? */ + u_int old_vj : 1; /* use old (short) form of VJ option? */ + u_int accept_local : 1; /* accept peer's value for ouraddr */ + u_int accept_remote : 1; /* accept peer's value for hisaddr */ + u_int req_dns1 : 1; /* Ask peer to send primary DNS address? */ + u_int req_dns2 : 1; /* Ask peer to send secondary DNS address? */ + u_short vj_protocol; /* protocol value to use in VJ option */ + u_char maxslotindex; /* VJ slots - 1. */ + u_char cflag; /* VJ slot compression flag. */ + u32_t ouraddr, hisaddr; /* Addresses in NETWORK BYTE ORDER */ + u32_t dnsaddr[2]; /* Primary and secondary MS DNS entries */ + u32_t winsaddr[2]; /* Primary and secondary MS WINS entries */ +} ipcp_options; + + +/***************************** +*** PUBLIC DATA STRUCTURES *** +*****************************/ + +extern fsm ipcp_fsm[]; +extern ipcp_options ipcp_wantoptions[]; +extern ipcp_options ipcp_gotoptions[]; +extern ipcp_options ipcp_allowoptions[]; +extern ipcp_options ipcp_hisoptions[]; + +extern struct protent ipcp_protent; + + +/*********************** +*** PUBLIC FUNCTIONS *** +***********************/ + +#endif /* IPCP_H */ diff --git a/bertos/net/lwip/src/netif/ppp/lcp.c b/bertos/net/lwip/src/netif/ppp/lcp.c new file mode 100644 index 0000000..85a0add --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/lcp.c @@ -0,0 +1,2035 @@ +/***************************************************************************** +* lcp.c - Network Link Control Protocol program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 by Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-01 Guy Lancaster , Global Election Systems Inc. +* Original. +*****************************************************************************/ + +/* + * lcp.c - PPP Link Control Protocol. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "fsm.h" +#include "chap.h" +#include "magic.h" +#include "auth.h" +#include "lcp.h" + +#include + +#if PPPOE_SUPPORT +#include "netif/ppp_oe.h" +#else +#define PPPOE_MAXMTU PPP_MAXMRU +#endif + + +/*************************/ +/*** LOCAL DEFINITIONS ***/ +/*************************/ +/* + * Length of each type of configuration option (in octets) + */ +#define CILEN_VOID 2 +#define CILEN_CHAR 3 +#define CILEN_SHORT 4 /* CILEN_VOID + sizeof(short) */ +#define CILEN_CHAP 5 /* CILEN_VOID + sizeof(short) + 1 */ +#define CILEN_LONG 6 /* CILEN_VOID + sizeof(long) */ +#define CILEN_LQR 8 /* CILEN_VOID + sizeof(short) + sizeof(long) */ +#define CILEN_CBCP 3 + + +/***********************************/ +/*** LOCAL FUNCTION DECLARATIONS ***/ +/***********************************/ +/* + * Callbacks for fsm code. (CI = Configuration Information) + */ +static void lcp_resetci (fsm*); /* Reset our CI */ +static int lcp_cilen (fsm*); /* Return length of our CI */ +static void lcp_addci (fsm*, u_char*, int*); /* Add our CI to pkt */ +static int lcp_ackci (fsm*, u_char*, int); /* Peer ack'd our CI */ +static int lcp_nakci (fsm*, u_char*, int); /* Peer nak'd our CI */ +static int lcp_rejci (fsm*, u_char*, int); /* Peer rej'd our CI */ +static int lcp_reqci (fsm*, u_char*, int*, int); /* Rcv peer CI */ +static void lcp_up (fsm*); /* We're UP */ +static void lcp_down (fsm*); /* We're DOWN */ +static void lcp_starting (fsm*); /* We need lower layer up */ +static void lcp_finished (fsm*); /* We need lower layer down */ +static int lcp_extcode (fsm*, int, u_char, u_char*, int); + +static void lcp_rprotrej (fsm*, u_char*, int); + +/* + * routines to send LCP echos to peer + */ +static void lcp_echo_lowerup (int); +static void lcp_echo_lowerdown (int); +static void LcpEchoTimeout (void*); +static void lcp_received_echo_reply (fsm*, int, u_char*, int); +static void LcpSendEchoRequest (fsm*); +static void LcpLinkFailure (fsm*); +static void LcpEchoCheck (fsm*); + +/* + * Protocol entry points. + * Some of these are called directly. + */ +static void lcp_input (int, u_char *, int); +static void lcp_protrej (int); + +#define CODENAME(x) ((x) == CONFACK ? "ACK" : (x) == CONFNAK ? "NAK" : "REJ") + + +/******************************/ +/*** PUBLIC DATA STRUCTURES ***/ +/******************************/ +/* global vars */ +LinkPhase lcp_phase[NUM_PPP]; /* Phase of link session (RFC 1661) */ +lcp_options lcp_wantoptions[NUM_PPP]; /* Options that we want to request */ +lcp_options lcp_gotoptions[NUM_PPP]; /* Options that peer ack'd */ +lcp_options lcp_allowoptions[NUM_PPP]; /* Options we allow peer to request */ +lcp_options lcp_hisoptions[NUM_PPP]; /* Options that we ack'd */ +ext_accm xmit_accm[NUM_PPP]; /* extended transmit ACCM */ + + + +/*****************************/ +/*** LOCAL DATA STRUCTURES ***/ +/*****************************/ +static fsm lcp_fsm[NUM_PPP]; /* LCP fsm structure (global)*/ +static u_int lcp_echo_interval = LCP_ECHOINTERVAL; /* Interval between LCP echo-requests */ +static u_int lcp_echo_fails = LCP_MAXECHOFAILS; /* Tolerance to unanswered echo-requests */ +static u32_t lcp_echos_pending = 0; /* Number of outstanding echo msgs */ +static u32_t lcp_echo_number = 0; /* ID number of next echo frame */ +static u32_t lcp_echo_timer_running = 0; /* TRUE if a timer is running */ + +static u_char nak_buffer[PPP_MRU]; /* where we construct a nak packet */ + +static fsm_callbacks lcp_callbacks = { /* LCP callback routines */ + lcp_resetci, /* Reset our Configuration Information */ + lcp_cilen, /* Length of our Configuration Information */ + lcp_addci, /* Add our Configuration Information */ + lcp_ackci, /* ACK our Configuration Information */ + lcp_nakci, /* NAK our Configuration Information */ + lcp_rejci, /* Reject our Configuration Information */ + lcp_reqci, /* Request peer's Configuration Information */ + lcp_up, /* Called when fsm reaches LS_OPENED state */ + lcp_down, /* Called when fsm leaves LS_OPENED state */ + lcp_starting, /* Called when we want the lower layer up */ + lcp_finished, /* Called when we want the lower layer down */ + NULL, /* Called when Protocol-Reject received */ + NULL, /* Retransmission is necessary */ + lcp_extcode, /* Called to handle LCP-specific codes */ + "LCP" /* String name of protocol */ +}; + +struct protent lcp_protent = { + PPP_LCP, + lcp_init, + lcp_input, + lcp_protrej, + lcp_lowerup, + lcp_lowerdown, + lcp_open, + lcp_close, +#if 0 + lcp_printpkt, + NULL, +#endif + 1, + "LCP", +#if 0 + NULL, + NULL, + NULL +#endif +}; + +int lcp_loopbackfail = DEFLOOPBACKFAIL; + + + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ +/* + * lcp_init - Initialize LCP. + */ +void +lcp_init(int unit) +{ + fsm *f = &lcp_fsm[unit]; + lcp_options *wo = &lcp_wantoptions[unit]; + lcp_options *ao = &lcp_allowoptions[unit]; + + f->unit = unit; + f->protocol = PPP_LCP; + f->callbacks = &lcp_callbacks; + + fsm_init(f); + + wo->passive = 0; + wo->silent = 0; + wo->restart = 0; /* Set to 1 in kernels or multi-line implementations */ + wo->neg_mru = 1; + wo->mru = PPP_DEFMRU; + wo->neg_asyncmap = 1; + wo->asyncmap = 0x00000000l; /* Assume don't need to escape any ctl chars. */ + wo->neg_chap = 0; /* Set to 1 on server */ + wo->neg_upap = 0; /* Set to 1 on server */ + wo->chap_mdtype = CHAP_DIGEST_MD5; + wo->neg_magicnumber = 1; + wo->neg_pcompression = 1; + wo->neg_accompression = 1; + wo->neg_lqr = 0; /* no LQR implementation yet */ + wo->neg_cbcp = 0; + + ao->neg_mru = 1; + ao->mru = PPP_MAXMRU; + ao->neg_asyncmap = 1; + ao->asyncmap = 0x00000000l; /* Assume don't need to escape any ctl chars. */ + ao->neg_chap = (CHAP_SUPPORT != 0); + ao->chap_mdtype = CHAP_DIGEST_MD5; + ao->neg_upap = (PAP_SUPPORT != 0); + ao->neg_magicnumber = 1; + ao->neg_pcompression = 1; + ao->neg_accompression = 1; + ao->neg_lqr = 0; /* no LQR implementation yet */ + ao->neg_cbcp = (CBCP_SUPPORT != 0); + + /* + * Set transmit escape for the flag and escape characters plus anything + * set for the allowable options. + */ + memset(xmit_accm[unit], 0, sizeof(xmit_accm[0])); + xmit_accm[unit][15] = 0x60; + xmit_accm[unit][0] = (u_char)((ao->asyncmap & 0xFF)); + xmit_accm[unit][1] = (u_char)((ao->asyncmap >> 8) & 0xFF); + xmit_accm[unit][2] = (u_char)((ao->asyncmap >> 16) & 0xFF); + xmit_accm[unit][3] = (u_char)((ao->asyncmap >> 24) & 0xFF); + LCPDEBUG((LOG_INFO, "lcp_init: xmit_accm=%X %X %X %X\n", + xmit_accm[unit][0], + xmit_accm[unit][1], + xmit_accm[unit][2], + xmit_accm[unit][3])); + + lcp_phase[unit] = PHASE_INITIALIZE; +} + + +/* + * lcp_open - LCP is allowed to come up. + */ +void +lcp_open(int unit) +{ + fsm *f = &lcp_fsm[unit]; + lcp_options *wo = &lcp_wantoptions[unit]; + + f->flags = 0; + if (wo->passive) { + f->flags |= OPT_PASSIVE; + } + if (wo->silent) { + f->flags |= OPT_SILENT; + } + fsm_open(f); + + lcp_phase[unit] = PHASE_ESTABLISH; +} + + +/* + * lcp_close - Take LCP down. + */ +void +lcp_close(int unit, char *reason) +{ + fsm *f = &lcp_fsm[unit]; + + if (lcp_phase[unit] != PHASE_DEAD) { + lcp_phase[unit] = PHASE_TERMINATE; + } + if (f->state == LS_STOPPED && f->flags & (OPT_PASSIVE|OPT_SILENT)) { + /* + * This action is not strictly according to the FSM in RFC1548, + * but it does mean that the program terminates if you do an + * lcp_close() in passive/silent mode when a connection hasn't + * been established. + */ + f->state = LS_CLOSED; + lcp_finished(f); + } else { + fsm_close(&lcp_fsm[unit], reason); + } +} + + +/* + * lcp_lowerup - The lower layer is up. + */ +void +lcp_lowerup(int unit) +{ + lcp_options *wo = &lcp_wantoptions[unit]; + + /* + * Don't use A/C or protocol compression on transmission, + * but accept A/C and protocol compressed packets + * if we are going to ask for A/C and protocol compression. + */ + ppp_set_xaccm(unit, &xmit_accm[unit]); + ppp_send_config(unit, PPP_MRU, 0xffffffffl, 0, 0); + ppp_recv_config(unit, PPP_MRU, 0x00000000l, + wo->neg_pcompression, wo->neg_accompression); + peer_mru[unit] = PPP_MRU; + lcp_allowoptions[unit].asyncmap = (u_long)xmit_accm[unit][0] + | ((u_long)xmit_accm[unit][1] << 8) + | ((u_long)xmit_accm[unit][2] << 16) + | ((u_long)xmit_accm[unit][3] << 24); + LCPDEBUG((LOG_INFO, "lcp_lowerup: asyncmap=%X %X %X %X\n", + xmit_accm[unit][3], + xmit_accm[unit][2], + xmit_accm[unit][1], + xmit_accm[unit][0])); + + fsm_lowerup(&lcp_fsm[unit]); +} + + +/* + * lcp_lowerdown - The lower layer is down. + */ +void +lcp_lowerdown(int unit) +{ + fsm_lowerdown(&lcp_fsm[unit]); +} + +/* + * lcp_sprotrej - Send a Protocol-Reject for some protocol. + */ +void +lcp_sprotrej(int unit, u_char *p, int len) +{ + /* + * Send back the protocol and the information field of the + * rejected packet. We only get here if LCP is in the LS_OPENED state. + */ + + fsm_sdata(&lcp_fsm[unit], PROTREJ, ++lcp_fsm[unit].id, p, len); +} + + + +/**********************************/ +/*** LOCAL FUNCTION DEFINITIONS ***/ +/**********************************/ +/* + * lcp_input - Input LCP packet. + */ +static void +lcp_input(int unit, u_char *p, int len) +{ + fsm *f = &lcp_fsm[unit]; + + fsm_input(f, p, len); +} + + +/* + * lcp_extcode - Handle a LCP-specific code. + */ +static int +lcp_extcode(fsm *f, int code, u_char id, u_char *inp, int len) +{ + u_char *magp; + + switch( code ){ + case PROTREJ: + lcp_rprotrej(f, inp, len); + break; + + case ECHOREQ: + if (f->state != LS_OPENED) { + break; + } + LCPDEBUG((LOG_INFO, "lcp: Echo-Request, Rcvd id %d\n", id)); + magp = inp; + PUTLONG(lcp_gotoptions[f->unit].magicnumber, magp); + fsm_sdata(f, ECHOREP, id, inp, len); + break; + + case ECHOREP: + lcp_received_echo_reply(f, id, inp, len); + break; + + case DISCREQ: + break; + + default: + return 0; + } + return 1; +} + + +/* + * lcp_rprotrej - Receive an Protocol-Reject. + * + * Figure out which protocol is rejected and inform it. + */ +static void +lcp_rprotrej(fsm *f, u_char *inp, int len) +{ + int i; + struct protent *protp; + u_short prot; + + if (len < sizeof (u_short)) { + LCPDEBUG((LOG_INFO, "lcp_rprotrej: Rcvd short Protocol-Reject packet!\n")); + return; + } + + GETSHORT(prot, inp); + + LCPDEBUG((LOG_INFO, "lcp_rprotrej: Rcvd Protocol-Reject packet for %x!\n", prot)); + + /* + * Protocol-Reject packets received in any state other than the LCP + * LS_OPENED state SHOULD be silently discarded. + */ + if( f->state != LS_OPENED ) { + LCPDEBUG((LOG_INFO, "Protocol-Reject discarded: LCP in state %d\n", f->state)); + return; + } + + /* + * Upcall the proper Protocol-Reject routine. + */ + for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) { + if (protp->protocol == prot && protp->enabled_flag) { + (*protp->protrej)(f->unit); + return; + } + } + + LCPDEBUG((LOG_WARNING, "Protocol-Reject for unsupported protocol 0x%x\n", prot)); +} + + +/* + * lcp_protrej - A Protocol-Reject was received. + */ +static void +lcp_protrej(int unit) +{ + LWIP_UNUSED_ARG(unit); + /* + * Can't reject LCP! + */ + LCPDEBUG((LOG_WARNING, "lcp_protrej: Received Protocol-Reject for LCP!\n")); + fsm_protreject(&lcp_fsm[unit]); +} + + +/* + * lcp_resetci - Reset our CI. + */ +static void +lcp_resetci(fsm *f) +{ + lcp_wantoptions[f->unit].magicnumber = magic(); + lcp_wantoptions[f->unit].numloops = 0; + lcp_gotoptions[f->unit] = lcp_wantoptions[f->unit]; + peer_mru[f->unit] = PPP_MRU; + auth_reset(f->unit); +} + + +/* + * lcp_cilen - Return length of our CI. + */ +static int lcp_cilen(fsm *f) +{ + lcp_options *go = &lcp_gotoptions[f->unit]; + +#define LENCIVOID(neg) ((neg) ? CILEN_VOID : 0) +#define LENCICHAP(neg) ((neg) ? CILEN_CHAP : 0) +#define LENCISHORT(neg) ((neg) ? CILEN_SHORT : 0) +#define LENCILONG(neg) ((neg) ? CILEN_LONG : 0) +#define LENCILQR(neg) ((neg) ? CILEN_LQR: 0) +#define LENCICBCP(neg) ((neg) ? CILEN_CBCP: 0) + /* + * NB: we only ask for one of CHAP and UPAP, even if we will + * accept either. + */ + return (LENCISHORT(go->neg_mru && go->mru != PPP_DEFMRU) + + LENCILONG(go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl) + + LENCICHAP(go->neg_chap) + + LENCISHORT(!go->neg_chap && go->neg_upap) + + LENCILQR(go->neg_lqr) + + LENCICBCP(go->neg_cbcp) + + LENCILONG(go->neg_magicnumber) + + LENCIVOID(go->neg_pcompression) + + LENCIVOID(go->neg_accompression)); +} + + +/* + * lcp_addci - Add our desired CIs to a packet. + */ +static void +lcp_addci(fsm *f, u_char *ucp, int *lenp) +{ + lcp_options *go = &lcp_gotoptions[f->unit]; + u_char *start_ucp = ucp; + +#define ADDCIVOID(opt, neg) \ + if (neg) { \ + LCPDEBUG((LOG_INFO, "lcp_addci: opt=%d\n", opt)); \ + PUTCHAR(opt, ucp); \ + PUTCHAR(CILEN_VOID, ucp); \ + } +#define ADDCISHORT(opt, neg, val) \ + if (neg) { \ + LCPDEBUG((LOG_INFO, "lcp_addci: INT opt=%d %X\n", opt, val)); \ + PUTCHAR(opt, ucp); \ + PUTCHAR(CILEN_SHORT, ucp); \ + PUTSHORT(val, ucp); \ + } +#define ADDCICHAP(opt, neg, val, digest) \ + if (neg) { \ + LCPDEBUG((LOG_INFO, "lcp_addci: CHAP opt=%d %X\n", opt, val)); \ + PUTCHAR(opt, ucp); \ + PUTCHAR(CILEN_CHAP, ucp); \ + PUTSHORT(val, ucp); \ + PUTCHAR(digest, ucp); \ + } +#define ADDCILONG(opt, neg, val) \ + if (neg) { \ + LCPDEBUG((LOG_INFO, "lcp_addci: L opt=%d %lX\n", opt, val)); \ + PUTCHAR(opt, ucp); \ + PUTCHAR(CILEN_LONG, ucp); \ + PUTLONG(val, ucp); \ + } +#define ADDCILQR(opt, neg, val) \ + if (neg) { \ + LCPDEBUG((LOG_INFO, "lcp_addci: LQR opt=%d %lX\n", opt, val)); \ + PUTCHAR(opt, ucp); \ + PUTCHAR(CILEN_LQR, ucp); \ + PUTSHORT(PPP_LQR, ucp); \ + PUTLONG(val, ucp); \ + } +#define ADDCICHAR(opt, neg, val) \ + if (neg) { \ + LCPDEBUG((LOG_INFO, "lcp_addci: CHAR opt=%d %X '%z'\n", opt, val, val)); \ + PUTCHAR(opt, ucp); \ + PUTCHAR(CILEN_CHAR, ucp); \ + PUTCHAR(val, ucp); \ + } + + ADDCISHORT(CI_MRU, go->neg_mru && go->mru != PPP_DEFMRU, go->mru); + ADDCILONG(CI_ASYNCMAP, go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl, go->asyncmap); + ADDCICHAP(CI_AUTHTYPE, go->neg_chap, PPP_CHAP, go->chap_mdtype); + ADDCISHORT(CI_AUTHTYPE, !go->neg_chap && go->neg_upap, PPP_PAP); + ADDCILQR(CI_QUALITY, go->neg_lqr, go->lqr_period); + ADDCICHAR(CI_CALLBACK, go->neg_cbcp, CBCP_OPT); + ADDCILONG(CI_MAGICNUMBER, go->neg_magicnumber, go->magicnumber); + ADDCIVOID(CI_PCOMPRESSION, go->neg_pcompression); + ADDCIVOID(CI_ACCOMPRESSION, go->neg_accompression); + + if (ucp - start_ucp != *lenp) { + /* this should never happen, because peer_mtu should be 1500 */ + LCPDEBUG((LOG_ERR, "Bug in lcp_addci: wrong length\n")); + } +} + + +/* + * lcp_ackci - Ack our CIs. + * This should not modify any state if the Ack is bad. + * + * Returns: + * 0 - Ack was bad. + * 1 - Ack was good. + */ +static int +lcp_ackci(fsm *f, u_char *p, int len) +{ + lcp_options *go = &lcp_gotoptions[f->unit]; + u_char cilen, citype, cichar; + u_short cishort; + u32_t cilong; + + /* + * CIs must be in exactly the same order that we sent. + * Check packet length and CI length at each step. + * If we find any deviations, then this packet is bad. + */ +#define ACKCIVOID(opt, neg) \ + if (neg) { \ + if ((len -= CILEN_VOID) < 0) \ + goto bad; \ + GETCHAR(citype, p); \ + GETCHAR(cilen, p); \ + if (cilen != CILEN_VOID || citype != opt) \ + goto bad; \ + } +#define ACKCISHORT(opt, neg, val) \ + if (neg) { \ + if ((len -= CILEN_SHORT) < 0) \ + goto bad; \ + GETCHAR(citype, p); \ + GETCHAR(cilen, p); \ + if (cilen != CILEN_SHORT || citype != opt) \ + goto bad; \ + GETSHORT(cishort, p); \ + if (cishort != val) \ + goto bad; \ + } +#define ACKCICHAR(opt, neg, val) \ + if (neg) { \ + if ((len -= CILEN_CHAR) < 0) \ + goto bad; \ + GETCHAR(citype, p); \ + GETCHAR(cilen, p); \ + if (cilen != CILEN_CHAR || citype != opt) \ + goto bad; \ + GETCHAR(cichar, p); \ + if (cichar != val) \ + goto bad; \ + } +#define ACKCICHAP(opt, neg, val, digest) \ + if (neg) { \ + if ((len -= CILEN_CHAP) < 0) \ + goto bad; \ + GETCHAR(citype, p); \ + GETCHAR(cilen, p); \ + if (cilen != CILEN_CHAP || citype != opt) \ + goto bad; \ + GETSHORT(cishort, p); \ + if (cishort != val) \ + goto bad; \ + GETCHAR(cichar, p); \ + if (cichar != digest) \ + goto bad; \ + } +#define ACKCILONG(opt, neg, val) \ + if (neg) { \ + if ((len -= CILEN_LONG) < 0) \ + goto bad; \ + GETCHAR(citype, p); \ + GETCHAR(cilen, p); \ + if (cilen != CILEN_LONG || citype != opt) \ + goto bad; \ + GETLONG(cilong, p); \ + if (cilong != val) \ + goto bad; \ + } +#define ACKCILQR(opt, neg, val) \ + if (neg) { \ + if ((len -= CILEN_LQR) < 0) \ + goto bad; \ + GETCHAR(citype, p); \ + GETCHAR(cilen, p); \ + if (cilen != CILEN_LQR || citype != opt) \ + goto bad; \ + GETSHORT(cishort, p); \ + if (cishort != PPP_LQR) \ + goto bad; \ + GETLONG(cilong, p); \ + if (cilong != val) \ + goto bad; \ + } + + ACKCISHORT(CI_MRU, go->neg_mru && go->mru != PPP_DEFMRU, go->mru); + ACKCILONG(CI_ASYNCMAP, go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl, go->asyncmap); + ACKCICHAP(CI_AUTHTYPE, go->neg_chap, PPP_CHAP, go->chap_mdtype); + ACKCISHORT(CI_AUTHTYPE, !go->neg_chap && go->neg_upap, PPP_PAP); + ACKCILQR(CI_QUALITY, go->neg_lqr, go->lqr_period); + ACKCICHAR(CI_CALLBACK, go->neg_cbcp, CBCP_OPT); + ACKCILONG(CI_MAGICNUMBER, go->neg_magicnumber, go->magicnumber); + ACKCIVOID(CI_PCOMPRESSION, go->neg_pcompression); + ACKCIVOID(CI_ACCOMPRESSION, go->neg_accompression); + + /* + * If there are any remaining CIs, then this packet is bad. + */ + if (len != 0) { + goto bad; + } + LCPDEBUG((LOG_INFO, "lcp_acki: Ack\n")); + return (1); +bad: + LCPDEBUG((LOG_WARNING, "lcp_acki: received bad Ack!\n")); + return (0); +} + + +/* + * lcp_nakci - Peer has sent a NAK for some of our CIs. + * This should not modify any state if the Nak is bad + * or if LCP is in the LS_OPENED state. + * + * Returns: + * 0 - Nak was bad. + * 1 - Nak was good. + */ +static int +lcp_nakci(fsm *f, u_char *p, int len) +{ + lcp_options *go = &lcp_gotoptions[f->unit]; + lcp_options *wo = &lcp_wantoptions[f->unit]; + u_char citype, cichar, *next; + u_short cishort; + u32_t cilong; + lcp_options no; /* options we've seen Naks for */ + lcp_options try; /* options to request next time */ + int looped_back = 0; + int cilen; + + BZERO(&no, sizeof(no)); + try = *go; + + /* + * Any Nak'd CIs must be in exactly the same order that we sent. + * Check packet length and CI length at each step. + * If we find any deviations, then this packet is bad. + */ +#define NAKCIVOID(opt, neg, code) \ + if (go->neg && \ + len >= CILEN_VOID && \ + p[1] == CILEN_VOID && \ + p[0] == opt) { \ + len -= CILEN_VOID; \ + INCPTR(CILEN_VOID, p); \ + no.neg = 1; \ + code \ + } +#define NAKCICHAP(opt, neg, code) \ + if (go->neg && \ + len >= CILEN_CHAP && \ + p[1] == CILEN_CHAP && \ + p[0] == opt) { \ + len -= CILEN_CHAP; \ + INCPTR(2, p); \ + GETSHORT(cishort, p); \ + GETCHAR(cichar, p); \ + no.neg = 1; \ + code \ + } +#define NAKCICHAR(opt, neg, code) \ + if (go->neg && \ + len >= CILEN_CHAR && \ + p[1] == CILEN_CHAR && \ + p[0] == opt) { \ + len -= CILEN_CHAR; \ + INCPTR(2, p); \ + GETCHAR(cichar, p); \ + no.neg = 1; \ + code \ + } +#define NAKCISHORT(opt, neg, code) \ + if (go->neg && \ + len >= CILEN_SHORT && \ + p[1] == CILEN_SHORT && \ + p[0] == opt) { \ + len -= CILEN_SHORT; \ + INCPTR(2, p); \ + GETSHORT(cishort, p); \ + no.neg = 1; \ + code \ + } +#define NAKCILONG(opt, neg, code) \ + if (go->neg && \ + len >= CILEN_LONG && \ + p[1] == CILEN_LONG && \ + p[0] == opt) { \ + len -= CILEN_LONG; \ + INCPTR(2, p); \ + GETLONG(cilong, p); \ + no.neg = 1; \ + code \ + } +#define NAKCILQR(opt, neg, code) \ + if (go->neg && \ + len >= CILEN_LQR && \ + p[1] == CILEN_LQR && \ + p[0] == opt) { \ + len -= CILEN_LQR; \ + INCPTR(2, p); \ + GETSHORT(cishort, p); \ + GETLONG(cilong, p); \ + no.neg = 1; \ + code \ + } + + /* + * We don't care if they want to send us smaller packets than + * we want. Therefore, accept any MRU less than what we asked for, + * but then ignore the new value when setting the MRU in the kernel. + * If they send us a bigger MRU than what we asked, accept it, up to + * the limit of the default MRU we'd get if we didn't negotiate. + */ + if (go->neg_mru && go->mru != PPP_DEFMRU) { + NAKCISHORT(CI_MRU, neg_mru, + if (cishort <= wo->mru || cishort < PPP_DEFMRU) { + try.mru = cishort; + } + ); + } + + /* + * Add any characters they want to our (receive-side) asyncmap. + */ + if (go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl) { + NAKCILONG(CI_ASYNCMAP, neg_asyncmap, + try.asyncmap = go->asyncmap | cilong; + ); + } + + /* + * If they've nak'd our authentication-protocol, check whether + * they are proposing a different protocol, or a different + * hash algorithm for CHAP. + */ + if ((go->neg_chap || go->neg_upap) + && len >= CILEN_SHORT + && p[0] == CI_AUTHTYPE && p[1] >= CILEN_SHORT && p[1] <= len) { + cilen = p[1]; + len -= cilen; + no.neg_chap = go->neg_chap; + no.neg_upap = go->neg_upap; + INCPTR(2, p); + GETSHORT(cishort, p); + if (cishort == PPP_PAP && cilen == CILEN_SHORT) { + /* + * If we were asking for CHAP, they obviously don't want to do it. + * If we weren't asking for CHAP, then we were asking for PAP, + * in which case this Nak is bad. + */ + if (!go->neg_chap) { + goto bad; + } + try.neg_chap = 0; + + } else if (cishort == PPP_CHAP && cilen == CILEN_CHAP) { + GETCHAR(cichar, p); + if (go->neg_chap) { + /* + * We were asking for CHAP/MD5; they must want a different + * algorithm. If they can't do MD5, we'll have to stop + * asking for CHAP. + */ + if (cichar != go->chap_mdtype) { + try.neg_chap = 0; + } + } else { + /* + * Stop asking for PAP if we were asking for it. + */ + try.neg_upap = 0; + } + + } else { + /* + * We don't recognize what they're suggesting. + * Stop asking for what we were asking for. + */ + if (go->neg_chap) { + try.neg_chap = 0; + } else { + try.neg_upap = 0; + } + p += cilen - CILEN_SHORT; + } + } + + /* + * If they can't cope with our link quality protocol, we'll have + * to stop asking for LQR. We haven't got any other protocol. + * If they Nak the reporting period, take their value XXX ? + */ + NAKCILQR(CI_QUALITY, neg_lqr, + if (cishort != PPP_LQR) { + try.neg_lqr = 0; + } else { + try.lqr_period = cilong; + } + ); + + /* + * Only implementing CBCP...not the rest of the callback options + */ + NAKCICHAR(CI_CALLBACK, neg_cbcp, + try.neg_cbcp = 0; + ); + + /* + * Check for a looped-back line. + */ + NAKCILONG(CI_MAGICNUMBER, neg_magicnumber, + try.magicnumber = magic(); + looped_back = 1; + ); + + /* + * Peer shouldn't send Nak for protocol compression or + * address/control compression requests; they should send + * a Reject instead. If they send a Nak, treat it as a Reject. + */ + NAKCIVOID(CI_PCOMPRESSION, neg_pcompression, + try.neg_pcompression = 0; + ); + NAKCIVOID(CI_ACCOMPRESSION, neg_accompression, + try.neg_accompression = 0; + ); + + /* + * There may be remaining CIs, if the peer is requesting negotiation + * on an option that we didn't include in our request packet. + * If we see an option that we requested, or one we've already seen + * in this packet, then this packet is bad. + * If we wanted to respond by starting to negotiate on the requested + * option(s), we could, but we don't, because except for the + * authentication type and quality protocol, if we are not negotiating + * an option, it is because we were told not to. + * For the authentication type, the Nak from the peer means + * `let me authenticate myself with you' which is a bit pointless. + * For the quality protocol, the Nak means `ask me to send you quality + * reports', but if we didn't ask for them, we don't want them. + * An option we don't recognize represents the peer asking to + * negotiate some option we don't support, so ignore it. + */ + while (len > CILEN_VOID) { + GETCHAR(citype, p); + GETCHAR(cilen, p); + if (cilen < CILEN_VOID || (len -= cilen) < 0) { + goto bad; + } + next = p + cilen - 2; + + switch (citype) { + case CI_MRU: + if ((go->neg_mru && go->mru != PPP_DEFMRU) + || no.neg_mru || cilen != CILEN_SHORT) { + goto bad; + } + GETSHORT(cishort, p); + if (cishort < PPP_DEFMRU) { + try.mru = cishort; + } + break; + case CI_ASYNCMAP: + if ((go->neg_asyncmap && go->asyncmap != 0xFFFFFFFFl) + || no.neg_asyncmap || cilen != CILEN_LONG) { + goto bad; + } + break; + case CI_AUTHTYPE: + if (go->neg_chap || no.neg_chap || go->neg_upap || no.neg_upap) { + goto bad; + } + break; + case CI_MAGICNUMBER: + if (go->neg_magicnumber || no.neg_magicnumber || + cilen != CILEN_LONG) { + goto bad; + } + break; + case CI_PCOMPRESSION: + if (go->neg_pcompression || no.neg_pcompression + || cilen != CILEN_VOID) { + goto bad; + } + break; + case CI_ACCOMPRESSION: + if (go->neg_accompression || no.neg_accompression + || cilen != CILEN_VOID) { + goto bad; + } + break; + case CI_QUALITY: + if (go->neg_lqr || no.neg_lqr || cilen != CILEN_LQR) { + goto bad; + } + break; + } + p = next; + } + + /* If there is still anything left, this packet is bad. */ + if (len != 0) { + goto bad; + } + + /* + * OK, the Nak is good. Now we can update state. + */ + if (f->state != LS_OPENED) { + if (looped_back) { + if (++try.numloops >= lcp_loopbackfail) { + LCPDEBUG((LOG_NOTICE, "Serial line is looped back.\n")); + lcp_close(f->unit, "Loopback detected"); + } + } else { + try.numloops = 0; + } + *go = try; + } + + return 1; + +bad: + LCPDEBUG((LOG_WARNING, "lcp_nakci: received bad Nak!\n")); + return 0; +} + + +/* + * lcp_rejci - Peer has Rejected some of our CIs. + * This should not modify any state if the Reject is bad + * or if LCP is in the LS_OPENED state. + * + * Returns: + * 0 - Reject was bad. + * 1 - Reject was good. + */ +static int +lcp_rejci(fsm *f, u_char *p, int len) +{ + lcp_options *go = &lcp_gotoptions[f->unit]; + u_char cichar; + u_short cishort; + u32_t cilong; + lcp_options try; /* options to request next time */ + + try = *go; + + /* + * Any Rejected CIs must be in exactly the same order that we sent. + * Check packet length and CI length at each step. + * If we find any deviations, then this packet is bad. + */ +#define REJCIVOID(opt, neg) \ + if (go->neg && \ + len >= CILEN_VOID && \ + p[1] == CILEN_VOID && \ + p[0] == opt) { \ + len -= CILEN_VOID; \ + INCPTR(CILEN_VOID, p); \ + try.neg = 0; \ + LCPDEBUG((LOG_INFO, "lcp_rejci: void opt %d rejected\n", opt)); \ + } +#define REJCISHORT(opt, neg, val) \ + if (go->neg && \ + len >= CILEN_SHORT && \ + p[1] == CILEN_SHORT && \ + p[0] == opt) { \ + len -= CILEN_SHORT; \ + INCPTR(2, p); \ + GETSHORT(cishort, p); \ + /* Check rejected value. */ \ + if (cishort != val) { \ + goto bad; \ + } \ + try.neg = 0; \ + LCPDEBUG((LOG_INFO,"lcp_rejci: short opt %d rejected\n", opt)); \ + } +#define REJCICHAP(opt, neg, val, digest) \ + if (go->neg && \ + len >= CILEN_CHAP && \ + p[1] == CILEN_CHAP && \ + p[0] == opt) { \ + len -= CILEN_CHAP; \ + INCPTR(2, p); \ + GETSHORT(cishort, p); \ + GETCHAR(cichar, p); \ + /* Check rejected value. */ \ + if (cishort != val || cichar != digest) { \ + goto bad; \ + } \ + try.neg = 0; \ + try.neg_upap = 0; \ + LCPDEBUG((LOG_INFO,"lcp_rejci: chap opt %d rejected\n", opt)); \ + } +#define REJCILONG(opt, neg, val) \ + if (go->neg && \ + len >= CILEN_LONG && \ + p[1] == CILEN_LONG && \ + p[0] == opt) { \ + len -= CILEN_LONG; \ + INCPTR(2, p); \ + GETLONG(cilong, p); \ + /* Check rejected value. */ \ + if (cilong != val) { \ + goto bad; \ + } \ + try.neg = 0; \ + LCPDEBUG((LOG_INFO,"lcp_rejci: long opt %d rejected\n", opt)); \ + } +#define REJCILQR(opt, neg, val) \ + if (go->neg && \ + len >= CILEN_LQR && \ + p[1] == CILEN_LQR && \ + p[0] == opt) { \ + len -= CILEN_LQR; \ + INCPTR(2, p); \ + GETSHORT(cishort, p); \ + GETLONG(cilong, p); \ + /* Check rejected value. */ \ + if (cishort != PPP_LQR || cilong != val) { \ + goto bad; \ + } \ + try.neg = 0; \ + LCPDEBUG((LOG_INFO,"lcp_rejci: LQR opt %d rejected\n", opt)); \ + } +#define REJCICBCP(opt, neg, val) \ + if (go->neg && \ + len >= CILEN_CBCP && \ + p[1] == CILEN_CBCP && \ + p[0] == opt) { \ + len -= CILEN_CBCP; \ + INCPTR(2, p); \ + GETCHAR(cichar, p); \ + /* Check rejected value. */ \ + if (cichar != val) { \ + goto bad; \ + } \ + try.neg = 0; \ + LCPDEBUG((LOG_INFO,"lcp_rejci: Callback opt %d rejected\n", opt)); \ + } + + REJCISHORT(CI_MRU, neg_mru, go->mru); + REJCILONG(CI_ASYNCMAP, neg_asyncmap, go->asyncmap); + REJCICHAP(CI_AUTHTYPE, neg_chap, PPP_CHAP, go->chap_mdtype); + if (!go->neg_chap) { + REJCISHORT(CI_AUTHTYPE, neg_upap, PPP_PAP); + } + REJCILQR(CI_QUALITY, neg_lqr, go->lqr_period); + REJCICBCP(CI_CALLBACK, neg_cbcp, CBCP_OPT); + REJCILONG(CI_MAGICNUMBER, neg_magicnumber, go->magicnumber); + REJCIVOID(CI_PCOMPRESSION, neg_pcompression); + REJCIVOID(CI_ACCOMPRESSION, neg_accompression); + + /* + * If there are any remaining CIs, then this packet is bad. + */ + if (len != 0) { + goto bad; + } + /* + * Now we can update state. + */ + if (f->state != LS_OPENED) { + *go = try; + } + return 1; + +bad: + LCPDEBUG((LOG_WARNING, "lcp_rejci: received bad Reject!\n")); + return 0; +} + + +/* + * lcp_reqci - Check the peer's requested CIs and send appropriate response. + * + * Returns: CONFACK, CONFNAK or CONFREJ and input packet modified + * appropriately. If reject_if_disagree is non-zero, doesn't return + * CONFNAK; returns CONFREJ if it can't return CONFACK. + */ +static int +lcp_reqci(fsm *f, + u_char *inp, /* Requested CIs */ + int *lenp, /* Length of requested CIs */ + int reject_if_disagree) +{ + lcp_options *go = &lcp_gotoptions[f->unit]; + lcp_options *ho = &lcp_hisoptions[f->unit]; + lcp_options *ao = &lcp_allowoptions[f->unit]; + u_char *cip, *next; /* Pointer to current and next CIs */ + int cilen, citype, cichar; /* Parsed len, type, char value */ + u_short cishort; /* Parsed short value */ + u32_t cilong; /* Parse long value */ + int rc = CONFACK; /* Final packet return code */ + int orc; /* Individual option return code */ + u_char *p; /* Pointer to next char to parse */ + u_char *rejp; /* Pointer to next char in reject frame */ + u_char *nakp; /* Pointer to next char in Nak frame */ + int l = *lenp; /* Length left */ +#if TRACELCP > 0 + char traceBuf[80]; + int traceNdx = 0; +#endif + + /* + * Reset all his options. + */ + BZERO(ho, sizeof(*ho)); + + /* + * Process all his options. + */ + next = inp; + nakp = nak_buffer; + rejp = inp; + while (l) { + orc = CONFACK; /* Assume success */ + cip = p = next; /* Remember begining of CI */ + if (l < 2 || /* Not enough data for CI header or */ + p[1] < 2 || /* CI length too small or */ + p[1] > l) { /* CI length too big? */ + LCPDEBUG((LOG_WARNING, "lcp_reqci: bad CI length!\n")); + orc = CONFREJ; /* Reject bad CI */ + cilen = l; /* Reject till end of packet */ + l = 0; /* Don't loop again */ + citype = 0; + goto endswitch; + } + GETCHAR(citype, p); /* Parse CI type */ + GETCHAR(cilen, p); /* Parse CI length */ + l -= cilen; /* Adjust remaining length */ + next += cilen; /* Step to next CI */ + + switch (citype) { /* Check CI type */ + case CI_MRU: + if (!ao->neg_mru) { /* Allow option? */ + LCPDEBUG((LOG_INFO, "lcp_reqci: Reject MRU - not allowed\n")); + orc = CONFREJ; /* Reject CI */ + break; + } else if (cilen != CILEN_SHORT) { /* Check CI length */ + LCPDEBUG((LOG_INFO, "lcp_reqci: Reject MRU - bad length\n")); + orc = CONFREJ; /* Reject CI */ + break; + } + GETSHORT(cishort, p); /* Parse MRU */ + + /* + * He must be able to receive at least our minimum. + * No need to check a maximum. If he sends a large number, + * we'll just ignore it. + */ + if (cishort < PPP_MINMRU) { + LCPDEBUG((LOG_INFO, "lcp_reqci: Nak - MRU too small\n")); + orc = CONFNAK; /* Nak CI */ + PUTCHAR(CI_MRU, nakp); + PUTCHAR(CILEN_SHORT, nakp); + PUTSHORT(PPP_MINMRU, nakp); /* Give him a hint */ + break; + } + ho->neg_mru = 1; /* Remember he sent MRU */ + ho->mru = cishort; /* And remember value */ +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " MRU %d", cishort); + traceNdx = strlen(traceBuf); +#endif + break; + + case CI_ASYNCMAP: + if (!ao->neg_asyncmap) { + LCPDEBUG((LOG_INFO, "lcp_reqci: Reject ASYNCMAP not allowed\n")); + orc = CONFREJ; + break; + } else if (cilen != CILEN_LONG) { + LCPDEBUG((LOG_INFO, "lcp_reqci: Reject ASYNCMAP bad length\n")); + orc = CONFREJ; + break; + } + GETLONG(cilong, p); + + /* + * Asyncmap must have set at least the bits + * which are set in lcp_allowoptions[unit].asyncmap. + */ + if ((ao->asyncmap & ~cilong) != 0) { + LCPDEBUG((LOG_INFO, "lcp_reqci: Nak ASYNCMAP %lX missing %lX\n", + cilong, ao->asyncmap)); + orc = CONFNAK; + PUTCHAR(CI_ASYNCMAP, nakp); + PUTCHAR(CILEN_LONG, nakp); + PUTLONG(ao->asyncmap | cilong, nakp); + break; + } + ho->neg_asyncmap = 1; + ho->asyncmap = cilong; +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " ASYNCMAP=%lX", cilong); + traceNdx = strlen(traceBuf); +#endif + break; + + case CI_AUTHTYPE: + if (cilen < CILEN_SHORT) { + LCPDEBUG((LOG_INFO, "lcp_reqci: Reject AUTHTYPE missing arg\n")); + orc = CONFREJ; + break; + } else if (!(ao->neg_upap || ao->neg_chap)) { + /* + * Reject the option if we're not willing to authenticate. + */ + LCPDEBUG((LOG_INFO, "lcp_reqci: Reject AUTHTYPE not allowed\n")); + orc = CONFREJ; + break; + } + GETSHORT(cishort, p); + + /* + * Authtype must be UPAP or CHAP. + * + * Note: if both ao->neg_upap and ao->neg_chap are set, + * and the peer sends a Configure-Request with two + * authenticate-protocol requests, one for CHAP and one + * for UPAP, then we will reject the second request. + * Whether we end up doing CHAP or UPAP depends then on + * the ordering of the CIs in the peer's Configure-Request. + */ + + if (cishort == PPP_PAP) { + if (ho->neg_chap) { /* we've already accepted CHAP */ + LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE PAP already accepted\n")); + orc = CONFREJ; + break; + } else if (cilen != CILEN_SHORT) { + LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE PAP bad len\n")); + orc = CONFREJ; + break; + } + if (!ao->neg_upap) { /* we don't want to do PAP */ + LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE PAP not allowed\n")); + orc = CONFNAK; /* NAK it and suggest CHAP */ + PUTCHAR(CI_AUTHTYPE, nakp); + PUTCHAR(CILEN_CHAP, nakp); + PUTSHORT(PPP_CHAP, nakp); + PUTCHAR(ao->chap_mdtype, nakp); + break; + } + ho->neg_upap = 1; +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " PAP (%X)", cishort); + traceNdx = strlen(traceBuf); +#endif + break; + } + if (cishort == PPP_CHAP) { + if (ho->neg_upap) { /* we've already accepted PAP */ + LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE CHAP accepted PAP\n")); + orc = CONFREJ; + break; + } else if (cilen != CILEN_CHAP) { + LCPDEBUG((LOG_WARNING, "lcp_reqci: Reject AUTHTYPE CHAP bad len\n")); + orc = CONFREJ; + break; + } + if (!ao->neg_chap) { /* we don't want to do CHAP */ + LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE CHAP not allowed\n")); + orc = CONFNAK; /* NAK it and suggest PAP */ + PUTCHAR(CI_AUTHTYPE, nakp); + PUTCHAR(CILEN_SHORT, nakp); + PUTSHORT(PPP_PAP, nakp); + break; + } + GETCHAR(cichar, p); /* get digest type*/ + if (cichar != CHAP_DIGEST_MD5 +#ifdef CHAPMS + && cichar != CHAP_MICROSOFT +#endif + ) { + LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE CHAP digest=%d\n", cichar)); + orc = CONFNAK; + PUTCHAR(CI_AUTHTYPE, nakp); + PUTCHAR(CILEN_CHAP, nakp); + PUTSHORT(PPP_CHAP, nakp); + PUTCHAR(ao->chap_mdtype, nakp); + break; + } +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CHAP %X,%d", cishort, cichar); + traceNdx = strlen(traceBuf); +#endif + ho->chap_mdtype = cichar; /* save md type */ + ho->neg_chap = 1; + break; + } + + /* + * We don't recognize the protocol they're asking for. + * Nak it with something we're willing to do. + * (At this point we know ao->neg_upap || ao->neg_chap.) + */ + orc = CONFNAK; + PUTCHAR(CI_AUTHTYPE, nakp); + if (ao->neg_chap) { + LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE %d req CHAP\n", cishort)); + PUTCHAR(CILEN_CHAP, nakp); + PUTSHORT(PPP_CHAP, nakp); + PUTCHAR(ao->chap_mdtype, nakp); + } else { + LCPDEBUG((LOG_WARNING, "lcp_reqci: Nak AUTHTYPE %d req PAP\n", cishort)); + PUTCHAR(CILEN_SHORT, nakp); + PUTSHORT(PPP_PAP, nakp); + } + break; + + case CI_QUALITY: + GETSHORT(cishort, p); + GETLONG(cilong, p); +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " QUALITY (%x %x)", cishort, (unsigned int) cilong); + traceNdx = strlen(traceBuf); +#endif + + if (!ao->neg_lqr || + cilen != CILEN_LQR) { + orc = CONFREJ; + break; + } + + /* + * Check the protocol and the reporting period. + * XXX When should we Nak this, and what with? + */ + if (cishort != PPP_LQR) { + orc = CONFNAK; + PUTCHAR(CI_QUALITY, nakp); + PUTCHAR(CILEN_LQR, nakp); + PUTSHORT(PPP_LQR, nakp); + PUTLONG(ao->lqr_period, nakp); + break; + } + break; + + case CI_MAGICNUMBER: + if (!(ao->neg_magicnumber || go->neg_magicnumber) || + cilen != CILEN_LONG) { + orc = CONFREJ; + break; + } + GETLONG(cilong, p); +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " MAGICNUMBER (%lX)", cilong); + traceNdx = strlen(traceBuf); +#endif + + /* + * He must have a different magic number. + */ + if (go->neg_magicnumber && + cilong == go->magicnumber) { + cilong = magic(); /* Don't put magic() inside macro! */ + orc = CONFNAK; + PUTCHAR(CI_MAGICNUMBER, nakp); + PUTCHAR(CILEN_LONG, nakp); + PUTLONG(cilong, nakp); + break; + } + ho->neg_magicnumber = 1; + ho->magicnumber = cilong; + break; + + + case CI_PCOMPRESSION: +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " PCOMPRESSION"); + traceNdx = strlen(traceBuf); +#endif + if (!ao->neg_pcompression || + cilen != CILEN_VOID) { + orc = CONFREJ; + break; + } + ho->neg_pcompression = 1; + break; + + case CI_ACCOMPRESSION: +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " ACCOMPRESSION"); + traceNdx = strlen(traceBuf); +#endif + if (!ao->neg_accompression || + cilen != CILEN_VOID) { + orc = CONFREJ; + break; + } + ho->neg_accompression = 1; + break; + + case CI_MRRU: +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CI_MRRU"); + traceNdx = strlen(traceBuf); +#endif + orc = CONFREJ; + break; + + case CI_SSNHF: +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CI_SSNHF"); + traceNdx = strlen(traceBuf); +#endif + orc = CONFREJ; + break; + + case CI_EPDISC: +#if TRACELCP > 0 + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " CI_EPDISC"); + traceNdx = strlen(traceBuf); +#endif + orc = CONFREJ; + break; + + default: +#if TRACELCP + snprintf(&traceBuf[traceNdx], sizeof(traceBuf), " unknown %d", citype); + traceNdx = strlen(traceBuf); +#endif + orc = CONFREJ; + break; + } + + endswitch: +#if TRACELCP + if (traceNdx >= 80 - 32) { + LCPDEBUG((LOG_INFO, "lcp_reqci: rcvd%s\n", traceBuf)); + traceNdx = 0; + } +#endif + if (orc == CONFACK && /* Good CI */ + rc != CONFACK) { /* but prior CI wasnt? */ + continue; /* Don't send this one */ + } + + if (orc == CONFNAK) { /* Nak this CI? */ + if (reject_if_disagree /* Getting fed up with sending NAKs? */ + && citype != CI_MAGICNUMBER) { + orc = CONFREJ; /* Get tough if so */ + } else { + if (rc == CONFREJ) { /* Rejecting prior CI? */ + continue; /* Don't send this one */ + } + rc = CONFNAK; + } + } + if (orc == CONFREJ) { /* Reject this CI */ + rc = CONFREJ; + if (cip != rejp) { /* Need to move rejected CI? */ + BCOPY(cip, rejp, cilen); /* Move it */ + } + INCPTR(cilen, rejp); /* Update output pointer */ + } + } + + /* + * If we wanted to send additional NAKs (for unsent CIs), the + * code would go here. The extra NAKs would go at *nakp. + * At present there are no cases where we want to ask the + * peer to negotiate an option. + */ + + switch (rc) { + case CONFACK: + *lenp = (int)(next - inp); + break; + case CONFNAK: + /* + * Copy the Nak'd options from the nak_buffer to the caller's buffer. + */ + *lenp = (int)(nakp - nak_buffer); + BCOPY(nak_buffer, inp, *lenp); + break; + case CONFREJ: + *lenp = (int)(rejp - inp); + break; + } + +#if TRACELCP > 0 + if (traceNdx > 0) { + LCPDEBUG((LOG_INFO, "lcp_reqci: %s\n", traceBuf)); + } +#endif + LCPDEBUG((LOG_INFO, "lcp_reqci: returning CONF%s.\n", CODENAME(rc))); + return (rc); /* Return final code */ +} + + +/* + * lcp_up - LCP has come UP. + */ +static void +lcp_up(fsm *f) +{ + lcp_options *wo = &lcp_wantoptions[f->unit]; + lcp_options *ho = &lcp_hisoptions[f->unit]; + lcp_options *go = &lcp_gotoptions[f->unit]; + lcp_options *ao = &lcp_allowoptions[f->unit]; + + if (!go->neg_magicnumber) { + go->magicnumber = 0; + } + if (!ho->neg_magicnumber) { + ho->magicnumber = 0; + } + + /* + * Set our MTU to the smaller of the MTU we wanted and + * the MRU our peer wanted. If we negotiated an MRU, + * set our MRU to the larger of value we wanted and + * the value we got in the negotiation. + */ + ppp_send_config(f->unit, LWIP_MIN(ao->mru, (ho->neg_mru? ho->mru: PPP_MRU)), + (ho->neg_asyncmap? ho->asyncmap: 0xffffffffl), + ho->neg_pcompression, ho->neg_accompression); + /* + * If the asyncmap hasn't been negotiated, we really should + * set the receive asyncmap to ffffffff, but we set it to 0 + * for backwards contemptibility. + */ + ppp_recv_config(f->unit, (go->neg_mru? LWIP_MAX(wo->mru, go->mru): PPP_MRU), + (go->neg_asyncmap? go->asyncmap: 0x00000000), + go->neg_pcompression, go->neg_accompression); + + if (ho->neg_mru) { + peer_mru[f->unit] = ho->mru; + } + + lcp_echo_lowerup(f->unit); /* Enable echo messages */ + + link_established(f->unit); +} + + +/* + * lcp_down - LCP has gone DOWN. + * + * Alert other protocols. + */ +static void +lcp_down(fsm *f) +{ + lcp_options *go = &lcp_gotoptions[f->unit]; + + lcp_echo_lowerdown(f->unit); + + link_down(f->unit); + + ppp_send_config(f->unit, PPP_MRU, 0xffffffffl, 0, 0); + ppp_recv_config(f->unit, PPP_MRU, + (go->neg_asyncmap? go->asyncmap: 0x00000000), + go->neg_pcompression, go->neg_accompression); + peer_mru[f->unit] = PPP_MRU; +} + + +/* + * lcp_starting - LCP needs the lower layer up. + */ +static void +lcp_starting(fsm *f) +{ + link_required(f->unit); +} + + +/* + * lcp_finished - LCP has finished with the lower layer. + */ +static void +lcp_finished(fsm *f) +{ + link_terminated(f->unit); +} + + +#if 0 +/* + * print_string - print a readable representation of a string using + * printer. + */ +static void +print_string( char *p, int len, void (*printer) (void *, char *, ...), void *arg) +{ + int c; + + printer(arg, "\""); + for (; len > 0; --len) { + c = *p++; + if (' ' <= c && c <= '~') { + if (c == '\\' || c == '"') { + printer(arg, "\\"); + } + printer(arg, "%c", c); + } else { + switch (c) { + case '\n': + printer(arg, "\\n"); + break; + case '\r': + printer(arg, "\\r"); + break; + case '\t': + printer(arg, "\\t"); + break; + default: + printer(arg, "\\%.3o", c); + } + } + } + printer(arg, "\""); +} + + +/* + * lcp_printpkt - print the contents of an LCP packet. + */ +static char *lcp_codenames[] = { + "ConfReq", "ConfAck", "ConfNak", "ConfRej", + "TermReq", "TermAck", "CodeRej", "ProtRej", + "EchoReq", "EchoRep", "DiscReq" +}; + +static int +lcp_printpkt( u_char *p, int plen, void (*printer) (void *, char *, ...), void *arg) +{ + int code, id, len, olen; + u_char *pstart, *optend; + u_short cishort; + u32_t cilong; + + if (plen < HEADERLEN) { + return 0; + } + pstart = p; + GETCHAR(code, p); + GETCHAR(id, p); + GETSHORT(len, p); + if (len < HEADERLEN || len > plen) { + return 0; + } + + if (code >= 1 && code <= sizeof(lcp_codenames) / sizeof(char *)) { + printer(arg, " %s", lcp_codenames[code-1]); + } else { + printer(arg, " code=0x%x", code); + } + printer(arg, " id=0x%x", id); + len -= HEADERLEN; + switch (code) { + case CONFREQ: + case CONFACK: + case CONFNAK: + case CONFREJ: + /* print option list */ + while (len >= 2) { + GETCHAR(code, p); + GETCHAR(olen, p); + p -= 2; + if (olen < 2 || olen > len) { + break; + } + printer(arg, " <"); + len -= olen; + optend = p + olen; + switch (code) { + case CI_MRU: + if (olen == CILEN_SHORT) { + p += 2; + GETSHORT(cishort, p); + printer(arg, "mru %d", cishort); + } + break; + case CI_ASYNCMAP: + if (olen == CILEN_LONG) { + p += 2; + GETLONG(cilong, p); + printer(arg, "asyncmap 0x%lx", cilong); + } + break; + case CI_AUTHTYPE: + if (olen >= CILEN_SHORT) { + p += 2; + printer(arg, "auth "); + GETSHORT(cishort, p); + switch (cishort) { + case PPP_PAP: + printer(arg, "pap"); + break; + case PPP_CHAP: + printer(arg, "chap"); + break; + default: + printer(arg, "0x%x", cishort); + } + } + break; + case CI_QUALITY: + if (olen >= CILEN_SHORT) { + p += 2; + printer(arg, "quality "); + GETSHORT(cishort, p); + switch (cishort) { + case PPP_LQR: + printer(arg, "lqr"); + break; + default: + printer(arg, "0x%x", cishort); + } + } + break; + case CI_CALLBACK: + if (olen >= CILEN_CHAR) { + p += 2; + printer(arg, "callback "); + GETSHORT(cishort, p); + switch (cishort) { + case CBCP_OPT: + printer(arg, "CBCP"); + break; + default: + printer(arg, "0x%x", cishort); + } + } + break; + case CI_MAGICNUMBER: + if (olen == CILEN_LONG) { + p += 2; + GETLONG(cilong, p); + printer(arg, "magic 0x%x", cilong); + } + break; + case CI_PCOMPRESSION: + if (olen == CILEN_VOID) { + p += 2; + printer(arg, "pcomp"); + } + break; + case CI_ACCOMPRESSION: + if (olen == CILEN_VOID) { + p += 2; + printer(arg, "accomp"); + } + break; + } + while (p < optend) { + GETCHAR(code, p); + printer(arg, " %.2x", code); + } + printer(arg, ">"); + } + break; + + case TERMACK: + case TERMREQ: + if (len > 0 && *p >= ' ' && *p < 0x7f) { + printer(arg, " "); + print_string((char*)p, len, printer, arg); + p += len; + len = 0; + } + break; + + case ECHOREQ: + case ECHOREP: + case DISCREQ: + if (len >= 4) { + GETLONG(cilong, p); + printer(arg, " magic=0x%x", cilong); + p += 4; + len -= 4; + } + break; + } + + /* print the rest of the bytes in the packet */ + for (; len > 0; --len) { + GETCHAR(code, p); + printer(arg, " %.2x", code); + } + + return (int)(p - pstart); +} +#endif + +/* + * Time to shut down the link because there is nothing out there. + */ +static void +LcpLinkFailure (fsm *f) +{ + if (f->state == LS_OPENED) { + LCPDEBUG((LOG_INFO, "No response to %d echo-requests\n", lcp_echos_pending)); + LCPDEBUG((LOG_NOTICE, "Serial link appears to be disconnected.\n")); + lcp_close(f->unit, "Peer not responding"); + } +} + +/* + * Timer expired for the LCP echo requests from this process. + */ +static void +LcpEchoCheck (fsm *f) +{ + LcpSendEchoRequest (f); + + /* + * Start the timer for the next interval. + */ + LWIP_ASSERT("lcp_echo_timer_running == 0", lcp_echo_timer_running == 0); + + TIMEOUT (LcpEchoTimeout, f, lcp_echo_interval); + lcp_echo_timer_running = 1; +} + +/* + * LcpEchoTimeout - Timer expired on the LCP echo + */ +static void +LcpEchoTimeout (void *arg) +{ + if (lcp_echo_timer_running != 0) { + lcp_echo_timer_running = 0; + LcpEchoCheck ((fsm *) arg); + } +} + +/* + * LcpEchoReply - LCP has received a reply to the echo + */ +static void +lcp_received_echo_reply (fsm *f, int id, u_char *inp, int len) +{ + u32_t magic; + + LWIP_UNUSED_ARG(id); + + /* Check the magic number - don't count replies from ourselves. */ + if (len < 4) { + LCPDEBUG((LOG_WARNING, "lcp: received short Echo-Reply, length %d\n", len)); + return; + } + GETLONG(magic, inp); + if (lcp_gotoptions[f->unit].neg_magicnumber && magic == lcp_gotoptions[f->unit].magicnumber) { + LCPDEBUG((LOG_WARNING, "appear to have received our own echo-reply!\n")); + return; + } + + /* Reset the number of outstanding echo frames */ + lcp_echos_pending = 0; +} + +/* + * LcpSendEchoRequest - Send an echo request frame to the peer + */ +static void +LcpSendEchoRequest (fsm *f) +{ + u32_t lcp_magic; + u_char pkt[4], *pktp; + + /* + * Detect the failure of the peer at this point. + */ + if (lcp_echo_fails != 0) { + if (lcp_echos_pending++ >= lcp_echo_fails) { + LcpLinkFailure(f); + lcp_echos_pending = 0; + } + } + + /* + * Make and send the echo request frame. + */ + if (f->state == LS_OPENED) { + lcp_magic = lcp_gotoptions[f->unit].magicnumber; + pktp = pkt; + PUTLONG(lcp_magic, pktp); + fsm_sdata(f, ECHOREQ, (u_char)(lcp_echo_number++ & 0xFF), pkt, (int)(pktp - pkt)); + } +} + +/* + * lcp_echo_lowerup - Start the timer for the LCP frame + */ + +static void +lcp_echo_lowerup (int unit) +{ + fsm *f = &lcp_fsm[unit]; + + /* Clear the parameters for generating echo frames */ + lcp_echos_pending = 0; + lcp_echo_number = 0; + lcp_echo_timer_running = 0; + + /* If a timeout interval is specified then start the timer */ + if (lcp_echo_interval != 0) { + LcpEchoCheck (f); + } +} + +/* + * lcp_echo_lowerdown - Stop the timer for the LCP frame + */ + +static void +lcp_echo_lowerdown (int unit) +{ + fsm *f = &lcp_fsm[unit]; + + if (lcp_echo_timer_running != 0) { + UNTIMEOUT (LcpEchoTimeout, f); + lcp_echo_timer_running = 0; + } +} + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/lcp.h b/bertos/net/lwip/src/netif/ppp/lcp.h new file mode 100644 index 0000000..1a5e5a4 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/lcp.h @@ -0,0 +1,167 @@ +/***************************************************************************** +* lcp.h - Network Link Control Protocol header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-11-05 Guy Lancaster , Global Election Systems Inc. +* Original derived from BSD codes. +*****************************************************************************/ +/* + * lcp.h - Link Control Protocol definitions. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * $Id: lcp.h,v 1.3 2007/12/19 20:47:23 fbernon Exp $ + */ + +#ifndef LCP_H +#define LCP_H + +/************************* +*** PUBLIC DEFINITIONS *** +*************************/ +/* + * Options. + */ +#define CI_MRU 1 /* Maximum Receive Unit */ +#define CI_ASYNCMAP 2 /* Async Control Character Map */ +#define CI_AUTHTYPE 3 /* Authentication Type */ +#define CI_QUALITY 4 /* Quality Protocol */ +#define CI_MAGICNUMBER 5 /* Magic Number */ +#define CI_PCOMPRESSION 7 /* Protocol Field Compression */ +#define CI_ACCOMPRESSION 8 /* Address/Control Field Compression */ +#define CI_CALLBACK 13 /* callback */ +#define CI_MRRU 17 /* max reconstructed receive unit; multilink */ +#define CI_SSNHF 18 /* short sequence numbers for multilink */ +#define CI_EPDISC 19 /* endpoint discriminator */ + +/* + * LCP-specific packet types. + */ +#define PROTREJ 8 /* Protocol Reject */ +#define ECHOREQ 9 /* Echo Request */ +#define ECHOREP 10 /* Echo Reply */ +#define DISCREQ 11 /* Discard Request */ +#define CBCP_OPT 6 /* Use callback control protocol */ + + +/************************ +*** PUBLIC DATA TYPES *** +************************/ + +/* + * The state of options is described by an lcp_options structure. + */ +typedef struct lcp_options { + u_int passive : 1; /* Don't die if we don't get a response */ + u_int silent : 1; /* Wait for the other end to start first */ + u_int restart : 1; /* Restart vs. exit after close */ + u_int neg_mru : 1; /* Negotiate the MRU? */ + u_int neg_asyncmap : 1; /* Negotiate the async map? */ + u_int neg_upap : 1; /* Ask for UPAP authentication? */ + u_int neg_chap : 1; /* Ask for CHAP authentication? */ + u_int neg_magicnumber : 1; /* Ask for magic number? */ + u_int neg_pcompression : 1; /* HDLC Protocol Field Compression? */ + u_int neg_accompression : 1; /* HDLC Address/Control Field Compression? */ + u_int neg_lqr : 1; /* Negotiate use of Link Quality Reports */ + u_int neg_cbcp : 1; /* Negotiate use of CBCP */ +#ifdef PPP_MULTILINK + u_int neg_mrru : 1; /* Negotiate multilink MRRU */ + u_int neg_ssnhf : 1; /* Negotiate short sequence numbers */ + u_int neg_endpoint : 1; /* Negotiate endpoint discriminator */ +#endif + u_short mru; /* Value of MRU */ +#ifdef PPP_MULTILINK + u_short mrru; /* Value of MRRU, and multilink enable */ +#endif + u_char chap_mdtype; /* which MD type (hashing algorithm) */ + u32_t asyncmap; /* Value of async map */ + u32_t magicnumber; + int numloops; /* Number of loops during magic number neg. */ + u32_t lqr_period; /* Reporting period for LQR 1/100ths second */ +#ifdef PPP_MULTILINK + struct epdisc endpoint; /* endpoint discriminator */ +#endif +} lcp_options; + +/* + * Values for phase from BSD pppd.h based on RFC 1661. + */ +typedef enum { + PHASE_DEAD = 0, + PHASE_INITIALIZE, + PHASE_ESTABLISH, + PHASE_AUTHENTICATE, + PHASE_CALLBACK, + PHASE_NETWORK, + PHASE_TERMINATE +} LinkPhase; + + +/***************************** +*** PUBLIC DATA STRUCTURES *** +*****************************/ + +extern LinkPhase lcp_phase[NUM_PPP]; /* Phase of link session (RFC 1661) */ +extern lcp_options lcp_wantoptions[]; +extern lcp_options lcp_gotoptions[]; +extern lcp_options lcp_allowoptions[]; +extern lcp_options lcp_hisoptions[]; +extern ext_accm xmit_accm[]; + + +/*********************** +*** PUBLIC FUNCTIONS *** +***********************/ + +void lcp_init (int); +void lcp_open (int); +void lcp_close (int, char *); +void lcp_lowerup (int); +void lcp_lowerdown(int); +void lcp_sprotrej (int, u_char *, int); /* send protocol reject */ + +extern struct protent lcp_protent; + +/* Default number of times we receive our magic number from the peer + before deciding the link is looped-back. */ +#define DEFLOOPBACKFAIL 10 + +#endif /* LCP_H */ diff --git a/bertos/net/lwip/src/netif/ppp/magic.c b/bertos/net/lwip/src/netif/ppp/magic.c new file mode 100644 index 0000000..d3922bb --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/magic.c @@ -0,0 +1,82 @@ +/***************************************************************************** +* magic.c - Network Random Number Generator program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 by Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-04 Guy Lancaster , Global Election Systems Inc. +* Original based on BSD magic.c. +*****************************************************************************/ +/* + * magic.c - PPP Magic Number routines. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +#include "lwip/opt.h" + +#if PPP_SUPPORT + +#include "ppp.h" +#include "randm.h" +#include "magic.h" + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ +/* + * magicInit - Initialize the magic number generator. + * + * Since we use another random number generator that has its own + * initialization, we do nothing here. + */ +void magicInit() +{ + return; +} + +/* + * magic - Returns the next magic number. + */ +u32_t magic() +{ + return avRandom(); +} + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/magic.h b/bertos/net/lwip/src/netif/ppp/magic.h new file mode 100644 index 0000000..bc51749 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/magic.h @@ -0,0 +1,67 @@ +/***************************************************************************** +* magic.h - Network Random Number Generator header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-04 Guy Lancaster , Global Election Systems Inc. +* Original derived from BSD codes. +*****************************************************************************/ +/* + * magic.h - PPP Magic Number definitions. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * $Id: magic.h,v 1.2 2007/12/02 22:35:55 fbernon Exp $ + */ + +#ifndef MAGIC_H +#define MAGIC_H + +/***************************************************************************** +************************** PUBLIC FUNCTIONS ********************************** +*****************************************************************************/ + +/* Initialize the magic number generator */ +void magicInit(void); + +/* Returns the next magic number */ +u32_t magic(void); + +#endif /* MAGIC_H */ diff --git a/bertos/net/lwip/src/netif/ppp/md5.c b/bertos/net/lwip/src/netif/ppp/md5.c new file mode 100644 index 0000000..7a60d78 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/md5.c @@ -0,0 +1,320 @@ +/* + *********************************************************************** + ** md5.c -- the source code for MD5 routines ** + ** RSA Data Security, Inc. MD5 Message-Digest Algorithm ** + ** Created: 2/17/90 RLR ** + ** Revised: 1/91 SRD,AJ,BSK,JT Reference C ver., 7/10 constant corr. ** + *********************************************************************** + */ + +/* + *********************************************************************** + ** Copyright (C) 1990, RSA Data Security, Inc. All rights reserved. ** + ** ** + ** License to copy and use this software is granted provided that ** + ** it is identified as the "RSA Data Security, Inc. MD5 Message- ** + ** Digest Algorithm" in all material mentioning or referencing this ** + ** software or this function. ** + ** ** + ** License is also granted to make and use derivative works ** + ** provided that such works are identified as "derived from the RSA ** + ** Data Security, Inc. MD5 Message-Digest Algorithm" in all ** + ** material mentioning or referencing the derived work. ** + ** ** + ** RSA Data Security, Inc. makes no representations concerning ** + ** either the merchantability of this software or the suitability ** + ** of this software for any particular purpose. It is provided "as ** + ** is" without express or implied warranty of any kind. ** + ** ** + ** These notices must be retained in any copies of any part of this ** + ** documentation and/or software. ** + *********************************************************************** + */ + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#if CHAP_SUPPORT || MD5_SUPPORT + +#include "ppp.h" +#include "pppdebug.h" + +#include "md5.h" + +#include + +/* + *********************************************************************** + ** Message-digest routines: ** + ** To form the message digest for a message M ** + ** (1) Initialize a context buffer mdContext using MD5Init ** + ** (2) Call MD5Update on mdContext and M ** + ** (3) Call MD5Final on mdContext ** + ** The message digest is now in mdContext->digest[0...15] ** + *********************************************************************** + */ + +/* forward declaration */ +static void Transform (u32_t *buf, u32_t *in); + +static unsigned char PADDING[64] = { + 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 +}; + +/* F, G, H and I are basic MD5 functions */ +#define F(x, y, z) (((x) & (y)) | ((~x) & (z))) +#define G(x, y, z) (((x) & (z)) | ((y) & (~z))) +#define H(x, y, z) ((x) ^ (y) ^ (z)) +#define I(x, y, z) ((y) ^ ((x) | (~z))) + +/* ROTATE_LEFT rotates x left n bits */ +#define ROTATE_LEFT(x, n) (((x) << (n)) | ((x) >> (32-(n)))) + +/* FF, GG, HH, and II transformations for rounds 1, 2, 3, and 4 */ +/* Rotation is separate from addition to prevent recomputation */ +#define FF(a, b, c, d, x, s, ac) \ + {(a) += F ((b), (c), (d)) + (x) + (u32_t)(ac); \ + (a) = ROTATE_LEFT ((a), (s)); \ + (a) += (b); \ + } +#define GG(a, b, c, d, x, s, ac) \ + {(a) += G ((b), (c), (d)) + (x) + (u32_t)(ac); \ + (a) = ROTATE_LEFT ((a), (s)); \ + (a) += (b); \ + } +#define HH(a, b, c, d, x, s, ac) \ + {(a) += H ((b), (c), (d)) + (x) + (u32_t)(ac); \ + (a) = ROTATE_LEFT ((a), (s)); \ + (a) += (b); \ + } +#define II(a, b, c, d, x, s, ac) \ + {(a) += I ((b), (c), (d)) + (x) + (u32_t)(ac); \ + (a) = ROTATE_LEFT ((a), (s)); \ + (a) += (b); \ + } + +#ifdef __STDC__ +#define UL(x) x##UL +#else +#ifdef WIN32 +#define UL(x) x##UL +#else +#define UL(x) x +#endif +#endif + +/* The routine MD5Init initializes the message-digest context + mdContext. All fields are set to zero. + */ +void +MD5Init (MD5_CTX *mdContext) +{ + mdContext->i[0] = mdContext->i[1] = (u32_t)0; + + /* Load magic initialization constants. */ + mdContext->buf[0] = (u32_t)0x67452301UL; + mdContext->buf[1] = (u32_t)0xefcdab89UL; + mdContext->buf[2] = (u32_t)0x98badcfeUL; + mdContext->buf[3] = (u32_t)0x10325476UL; +} + +/* The routine MD5Update updates the message-digest context to + account for the presence of each of the characters inBuf[0..inLen-1] + in the message whose digest is being computed. + */ +void +MD5Update(MD5_CTX *mdContext, unsigned char *inBuf, unsigned int inLen) +{ + u32_t in[16]; + int mdi; + unsigned int i, ii; + +#if 0 + ppp_trace(LOG_INFO, "MD5Update: %u:%.*H\n", inLen, MIN(inLen, 20) * 2, inBuf); + ppp_trace(LOG_INFO, "MD5Update: %u:%s\n", inLen, inBuf); +#endif + + /* compute number of bytes mod 64 */ + mdi = (int)((mdContext->i[0] >> 3) & 0x3F); + + /* update number of bits */ + if ((mdContext->i[0] + ((u32_t)inLen << 3)) < mdContext->i[0]) { + mdContext->i[1]++; + } + mdContext->i[0] += ((u32_t)inLen << 3); + mdContext->i[1] += ((u32_t)inLen >> 29); + + while (inLen--) { + /* add new character to buffer, increment mdi */ + mdContext->in[mdi++] = *inBuf++; + + /* transform if necessary */ + if (mdi == 0x40) { + for (i = 0, ii = 0; i < 16; i++, ii += 4) { + in[i] = (((u32_t)mdContext->in[ii+3]) << 24) | + (((u32_t)mdContext->in[ii+2]) << 16) | + (((u32_t)mdContext->in[ii+1]) << 8) | + ((u32_t)mdContext->in[ii]); + } + Transform (mdContext->buf, in); + mdi = 0; + } + } +} + +/* The routine MD5Final terminates the message-digest computation and + ends with the desired message digest in mdContext->digest[0...15]. + */ +void +MD5Final (unsigned char hash[], MD5_CTX *mdContext) +{ + u32_t in[16]; + int mdi; + unsigned int i, ii; + unsigned int padLen; + + /* save number of bits */ + in[14] = mdContext->i[0]; + in[15] = mdContext->i[1]; + + /* compute number of bytes mod 64 */ + mdi = (int)((mdContext->i[0] >> 3) & 0x3F); + + /* pad out to 56 mod 64 */ + padLen = (mdi < 56) ? (56 - mdi) : (120 - mdi); + MD5Update (mdContext, PADDING, padLen); + + /* append length in bits and transform */ + for (i = 0, ii = 0; i < 14; i++, ii += 4) { + in[i] = (((u32_t)mdContext->in[ii+3]) << 24) | + (((u32_t)mdContext->in[ii+2]) << 16) | + (((u32_t)mdContext->in[ii+1]) << 8) | + ((u32_t)mdContext->in[ii]); + } + Transform (mdContext->buf, in); + + /* store buffer in digest */ + for (i = 0, ii = 0; i < 4; i++, ii += 4) { + mdContext->digest[ii] = (unsigned char)(mdContext->buf[i] & 0xFF); + mdContext->digest[ii+1] = + (unsigned char)((mdContext->buf[i] >> 8) & 0xFF); + mdContext->digest[ii+2] = + (unsigned char)((mdContext->buf[i] >> 16) & 0xFF); + mdContext->digest[ii+3] = + (unsigned char)((mdContext->buf[i] >> 24) & 0xFF); + } + SMEMCPY(hash, mdContext->digest, 16); +} + +/* Basic MD5 step. Transforms buf based on in. + */ +static void +Transform (u32_t *buf, u32_t *in) +{ + u32_t a = buf[0], b = buf[1], c = buf[2], d = buf[3]; + + /* Round 1 */ +#define S11 7 +#define S12 12 +#define S13 17 +#define S14 22 + FF ( a, b, c, d, in[ 0], S11, UL(3614090360)); /* 1 */ + FF ( d, a, b, c, in[ 1], S12, UL(3905402710)); /* 2 */ + FF ( c, d, a, b, in[ 2], S13, UL( 606105819)); /* 3 */ + FF ( b, c, d, a, in[ 3], S14, UL(3250441966)); /* 4 */ + FF ( a, b, c, d, in[ 4], S11, UL(4118548399)); /* 5 */ + FF ( d, a, b, c, in[ 5], S12, UL(1200080426)); /* 6 */ + FF ( c, d, a, b, in[ 6], S13, UL(2821735955)); /* 7 */ + FF ( b, c, d, a, in[ 7], S14, UL(4249261313)); /* 8 */ + FF ( a, b, c, d, in[ 8], S11, UL(1770035416)); /* 9 */ + FF ( d, a, b, c, in[ 9], S12, UL(2336552879)); /* 10 */ + FF ( c, d, a, b, in[10], S13, UL(4294925233)); /* 11 */ + FF ( b, c, d, a, in[11], S14, UL(2304563134)); /* 12 */ + FF ( a, b, c, d, in[12], S11, UL(1804603682)); /* 13 */ + FF ( d, a, b, c, in[13], S12, UL(4254626195)); /* 14 */ + FF ( c, d, a, b, in[14], S13, UL(2792965006)); /* 15 */ + FF ( b, c, d, a, in[15], S14, UL(1236535329)); /* 16 */ + + /* Round 2 */ +#define S21 5 +#define S22 9 +#define S23 14 +#define S24 20 + GG ( a, b, c, d, in[ 1], S21, UL(4129170786)); /* 17 */ + GG ( d, a, b, c, in[ 6], S22, UL(3225465664)); /* 18 */ + GG ( c, d, a, b, in[11], S23, UL( 643717713)); /* 19 */ + GG ( b, c, d, a, in[ 0], S24, UL(3921069994)); /* 20 */ + GG ( a, b, c, d, in[ 5], S21, UL(3593408605)); /* 21 */ + GG ( d, a, b, c, in[10], S22, UL( 38016083)); /* 22 */ + GG ( c, d, a, b, in[15], S23, UL(3634488961)); /* 23 */ + GG ( b, c, d, a, in[ 4], S24, UL(3889429448)); /* 24 */ + GG ( a, b, c, d, in[ 9], S21, UL( 568446438)); /* 25 */ + GG ( d, a, b, c, in[14], S22, UL(3275163606)); /* 26 */ + GG ( c, d, a, b, in[ 3], S23, UL(4107603335)); /* 27 */ + GG ( b, c, d, a, in[ 8], S24, UL(1163531501)); /* 28 */ + GG ( a, b, c, d, in[13], S21, UL(2850285829)); /* 29 */ + GG ( d, a, b, c, in[ 2], S22, UL(4243563512)); /* 30 */ + GG ( c, d, a, b, in[ 7], S23, UL(1735328473)); /* 31 */ + GG ( b, c, d, a, in[12], S24, UL(2368359562)); /* 32 */ + + /* Round 3 */ +#define S31 4 +#define S32 11 +#define S33 16 +#define S34 23 + HH ( a, b, c, d, in[ 5], S31, UL(4294588738)); /* 33 */ + HH ( d, a, b, c, in[ 8], S32, UL(2272392833)); /* 34 */ + HH ( c, d, a, b, in[11], S33, UL(1839030562)); /* 35 */ + HH ( b, c, d, a, in[14], S34, UL(4259657740)); /* 36 */ + HH ( a, b, c, d, in[ 1], S31, UL(2763975236)); /* 37 */ + HH ( d, a, b, c, in[ 4], S32, UL(1272893353)); /* 38 */ + HH ( c, d, a, b, in[ 7], S33, UL(4139469664)); /* 39 */ + HH ( b, c, d, a, in[10], S34, UL(3200236656)); /* 40 */ + HH ( a, b, c, d, in[13], S31, UL( 681279174)); /* 41 */ + HH ( d, a, b, c, in[ 0], S32, UL(3936430074)); /* 42 */ + HH ( c, d, a, b, in[ 3], S33, UL(3572445317)); /* 43 */ + HH ( b, c, d, a, in[ 6], S34, UL( 76029189)); /* 44 */ + HH ( a, b, c, d, in[ 9], S31, UL(3654602809)); /* 45 */ + HH ( d, a, b, c, in[12], S32, UL(3873151461)); /* 46 */ + HH ( c, d, a, b, in[15], S33, UL( 530742520)); /* 47 */ + HH ( b, c, d, a, in[ 2], S34, UL(3299628645)); /* 48 */ + + /* Round 4 */ +#define S41 6 +#define S42 10 +#define S43 15 +#define S44 21 + II ( a, b, c, d, in[ 0], S41, UL(4096336452)); /* 49 */ + II ( d, a, b, c, in[ 7], S42, UL(1126891415)); /* 50 */ + II ( c, d, a, b, in[14], S43, UL(2878612391)); /* 51 */ + II ( b, c, d, a, in[ 5], S44, UL(4237533241)); /* 52 */ + II ( a, b, c, d, in[12], S41, UL(1700485571)); /* 53 */ + II ( d, a, b, c, in[ 3], S42, UL(2399980690)); /* 54 */ + II ( c, d, a, b, in[10], S43, UL(4293915773)); /* 55 */ + II ( b, c, d, a, in[ 1], S44, UL(2240044497)); /* 56 */ + II ( a, b, c, d, in[ 8], S41, UL(1873313359)); /* 57 */ + II ( d, a, b, c, in[15], S42, UL(4264355552)); /* 58 */ + II ( c, d, a, b, in[ 6], S43, UL(2734768916)); /* 59 */ + II ( b, c, d, a, in[13], S44, UL(1309151649)); /* 60 */ + II ( a, b, c, d, in[ 4], S41, UL(4149444226)); /* 61 */ + II ( d, a, b, c, in[11], S42, UL(3174756917)); /* 62 */ + II ( c, d, a, b, in[ 2], S43, UL( 718787259)); /* 63 */ + II ( b, c, d, a, in[ 9], S44, UL(3951481745)); /* 64 */ + + buf[0] += a; + buf[1] += b; + buf[2] += c; + buf[3] += d; +} + +#endif /* CHAP_SUPPORT || MD5_SUPPORT */ + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/md5.h b/bertos/net/lwip/src/netif/ppp/md5.h new file mode 100644 index 0000000..e129533 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/md5.h @@ -0,0 +1,55 @@ +/* + *********************************************************************** + ** md5.h -- header file for implementation of MD5 ** + ** RSA Data Security, Inc. MD5 Message-Digest Algorithm ** + ** Created: 2/17/90 RLR ** + ** Revised: 12/27/90 SRD,AJ,BSK,JT Reference C version ** + ** Revised (for MD5): RLR 4/27/91 ** + ** -- G modified to have y&~z instead of y&z ** + ** -- FF, GG, HH modified to add in last register done ** + ** -- Access pattern: round 2 works mod 5, round 3 works mod 3 ** + ** -- distinct additive constant for each step ** + ** -- round 4 added, working mod 7 ** + *********************************************************************** + */ + +/* + *********************************************************************** + ** Copyright (C) 1990, RSA Data Security, Inc. All rights reserved. ** + ** ** + ** License to copy and use this software is granted provided that ** + ** it is identified as the "RSA Data Security, Inc. MD5 Message- ** + ** Digest Algorithm" in all material mentioning or referencing this ** + ** software or this function. ** + ** ** + ** License is also granted to make and use derivative works ** + ** provided that such works are identified as "derived from the RSA ** + ** Data Security, Inc. MD5 Message-Digest Algorithm" in all ** + ** material mentioning or referencing the derived work. ** + ** ** + ** RSA Data Security, Inc. makes no representations concerning ** + ** either the merchantability of this software or the suitability ** + ** of this software for any particular purpose. It is provided "as ** + ** is" without express or implied warranty of any kind. ** + ** ** + ** These notices must be retained in any copies of any part of this ** + ** documentation and/or software. ** + *********************************************************************** + */ + +#ifndef MD5_H +#define MD5_H + +/* Data structure for MD5 (Message-Digest) computation */ +typedef struct { + u32_t i[2]; /* number of _bits_ handled mod 2^64 */ + u32_t buf[4]; /* scratch buffer */ + unsigned char in[64]; /* input buffer */ + unsigned char digest[16]; /* actual digest after MD5Final call */ +} MD5_CTX; + +void MD5Init ( MD5_CTX *mdContext); +void MD5Update( MD5_CTX *mdContext, unsigned char *inBuf, unsigned int inLen); +void MD5Final ( unsigned char hash[], MD5_CTX *mdContext); + +#endif /* MD5_H */ diff --git a/bertos/net/lwip/src/netif/ppp/pap.c b/bertos/net/lwip/src/netif/ppp/pap.c new file mode 100644 index 0000000..e8c45df --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/pap.c @@ -0,0 +1,622 @@ +/***************************************************************************** +* pap.c - Network Password Authentication Protocol program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 by Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-12 Guy Lancaster , Global Election Systems Inc. +* Original. +*****************************************************************************/ +/* + * upap.c - User/Password Authentication Protocol. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#if PAP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "auth.h" +#include "pap.h" + +#include + +/***********************************/ +/*** LOCAL FUNCTION DECLARATIONS ***/ +/***********************************/ +/* + * Protocol entry points. + */ +static void upap_init (int); +static void upap_lowerup (int); +static void upap_lowerdown (int); +static void upap_input (int, u_char *, int); +static void upap_protrej (int); + +static void upap_timeout (void *); +static void upap_reqtimeout(void *); +static void upap_rauthreq (upap_state *, u_char *, int, int); +static void upap_rauthack (upap_state *, u_char *, int, int); +static void upap_rauthnak (upap_state *, u_char *, int, int); +static void upap_sauthreq (upap_state *); +static void upap_sresp (upap_state *, u_char, u_char, char *, int); + + +/******************************/ +/*** PUBLIC DATA STRUCTURES ***/ +/******************************/ +struct protent pap_protent = { + PPP_PAP, + upap_init, + upap_input, + upap_protrej, + upap_lowerup, + upap_lowerdown, + NULL, + NULL, +#if 0 + upap_printpkt, + NULL, +#endif + 1, + "PAP", +#if 0 + NULL, + NULL, + NULL +#endif +}; + +upap_state upap[NUM_PPP]; /* UPAP state; one for each unit */ + + + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ +/* + * Set the default login name and password for the pap sessions + */ +void +upap_setloginpasswd(int unit, const char *luser, const char *lpassword) +{ + upap_state *u = &upap[unit]; + + /* Save the username and password we're given */ + u->us_user = luser; + u->us_userlen = strlen(luser); + u->us_passwd = lpassword; + u->us_passwdlen = strlen(lpassword); +} + + +/* + * upap_authwithpeer - Authenticate us with our peer (start client). + * + * Set new state and send authenticate's. + */ +void +upap_authwithpeer(int unit, char *user, char *password) +{ + upap_state *u = &upap[unit]; + + UPAPDEBUG((LOG_INFO, "upap_authwithpeer: %d user=%s password=%s s=%d\n", + unit, user, password, u->us_clientstate)); + + upap_setloginpasswd(unit, user, password); + + u->us_transmits = 0; + + /* Lower layer up yet? */ + if (u->us_clientstate == UPAPCS_INITIAL || + u->us_clientstate == UPAPCS_PENDING) { + u->us_clientstate = UPAPCS_PENDING; + return; + } + + upap_sauthreq(u); /* Start protocol */ +} + + +/* + * upap_authpeer - Authenticate our peer (start server). + * + * Set new state. + */ +void +upap_authpeer(int unit) +{ + upap_state *u = &upap[unit]; + + /* Lower layer up yet? */ + if (u->us_serverstate == UPAPSS_INITIAL || + u->us_serverstate == UPAPSS_PENDING) { + u->us_serverstate = UPAPSS_PENDING; + return; + } + + u->us_serverstate = UPAPSS_LISTEN; + if (u->us_reqtimeout > 0) { + TIMEOUT(upap_reqtimeout, u, u->us_reqtimeout); + } +} + + + +/**********************************/ +/*** LOCAL FUNCTION DEFINITIONS ***/ +/**********************************/ +/* + * upap_init - Initialize a UPAP unit. + */ +static void +upap_init(int unit) +{ + upap_state *u = &upap[unit]; + + UPAPDEBUG((LOG_INFO, "upap_init: %d\n", unit)); + u->us_unit = unit; + u->us_user = NULL; + u->us_userlen = 0; + u->us_passwd = NULL; + u->us_passwdlen = 0; + u->us_clientstate = UPAPCS_INITIAL; + u->us_serverstate = UPAPSS_INITIAL; + u->us_id = 0; + u->us_timeouttime = UPAP_DEFTIMEOUT; + u->us_maxtransmits = 10; + u->us_reqtimeout = UPAP_DEFREQTIME; +} + +/* + * upap_timeout - Retransmission timer for sending auth-reqs expired. + */ +static void +upap_timeout(void *arg) +{ + upap_state *u = (upap_state *) arg; + + UPAPDEBUG((LOG_INFO, "upap_timeout: %d timeout %d expired s=%d\n", + u->us_unit, u->us_timeouttime, u->us_clientstate)); + + if (u->us_clientstate != UPAPCS_AUTHREQ) { + return; + } + + if (u->us_transmits >= u->us_maxtransmits) { + /* give up in disgust */ + UPAPDEBUG((LOG_ERR, "No response to PAP authenticate-requests\n")); + u->us_clientstate = UPAPCS_BADAUTH; + auth_withpeer_fail(u->us_unit, PPP_PAP); + return; + } + + upap_sauthreq(u); /* Send Authenticate-Request */ +} + + +/* + * upap_reqtimeout - Give up waiting for the peer to send an auth-req. + */ +static void +upap_reqtimeout(void *arg) +{ + upap_state *u = (upap_state *) arg; + + if (u->us_serverstate != UPAPSS_LISTEN) { + return; /* huh?? */ + } + + auth_peer_fail(u->us_unit, PPP_PAP); + u->us_serverstate = UPAPSS_BADAUTH; +} + + +/* + * upap_lowerup - The lower layer is up. + * + * Start authenticating if pending. + */ +static void +upap_lowerup(int unit) +{ + upap_state *u = &upap[unit]; + + UPAPDEBUG((LOG_INFO, "upap_lowerup: %d s=%d\n", unit, u->us_clientstate)); + + if (u->us_clientstate == UPAPCS_INITIAL) { + u->us_clientstate = UPAPCS_CLOSED; + } else if (u->us_clientstate == UPAPCS_PENDING) { + upap_sauthreq(u); /* send an auth-request */ + } + + if (u->us_serverstate == UPAPSS_INITIAL) { + u->us_serverstate = UPAPSS_CLOSED; + } else if (u->us_serverstate == UPAPSS_PENDING) { + u->us_serverstate = UPAPSS_LISTEN; + if (u->us_reqtimeout > 0) { + TIMEOUT(upap_reqtimeout, u, u->us_reqtimeout); + } + } +} + + +/* + * upap_lowerdown - The lower layer is down. + * + * Cancel all timeouts. + */ +static void +upap_lowerdown(int unit) +{ + upap_state *u = &upap[unit]; + + UPAPDEBUG((LOG_INFO, "upap_lowerdown: %d s=%d\n", unit, u->us_clientstate)); + + if (u->us_clientstate == UPAPCS_AUTHREQ) { /* Timeout pending? */ + UNTIMEOUT(upap_timeout, u); /* Cancel timeout */ + } + if (u->us_serverstate == UPAPSS_LISTEN && u->us_reqtimeout > 0) { + UNTIMEOUT(upap_reqtimeout, u); + } + + u->us_clientstate = UPAPCS_INITIAL; + u->us_serverstate = UPAPSS_INITIAL; +} + + +/* + * upap_protrej - Peer doesn't speak this protocol. + * + * This shouldn't happen. In any case, pretend lower layer went down. + */ +static void +upap_protrej(int unit) +{ + upap_state *u = &upap[unit]; + + if (u->us_clientstate == UPAPCS_AUTHREQ) { + UPAPDEBUG((LOG_ERR, "PAP authentication failed due to protocol-reject\n")); + auth_withpeer_fail(unit, PPP_PAP); + } + if (u->us_serverstate == UPAPSS_LISTEN) { + UPAPDEBUG((LOG_ERR, "PAP authentication of peer failed (protocol-reject)\n")); + auth_peer_fail(unit, PPP_PAP); + } + upap_lowerdown(unit); +} + + +/* + * upap_input - Input UPAP packet. + */ +static void +upap_input(int unit, u_char *inpacket, int l) +{ + upap_state *u = &upap[unit]; + u_char *inp; + u_char code, id; + int len; + + /* + * Parse header (code, id and length). + * If packet too short, drop it. + */ + inp = inpacket; + if (l < UPAP_HEADERLEN) { + UPAPDEBUG((LOG_INFO, "pap_input: rcvd short header.\n")); + return; + } + GETCHAR(code, inp); + GETCHAR(id, inp); + GETSHORT(len, inp); + if (len < UPAP_HEADERLEN) { + UPAPDEBUG((LOG_INFO, "pap_input: rcvd illegal length.\n")); + return; + } + if (len > l) { + UPAPDEBUG((LOG_INFO, "pap_input: rcvd short packet.\n")); + return; + } + len -= UPAP_HEADERLEN; + + /* + * Action depends on code. + */ + switch (code) { + case UPAP_AUTHREQ: + upap_rauthreq(u, inp, id, len); + break; + + case UPAP_AUTHACK: + upap_rauthack(u, inp, id, len); + break; + + case UPAP_AUTHNAK: + upap_rauthnak(u, inp, id, len); + break; + + default: /* XXX Need code reject */ + break; + } +} + + +/* + * upap_rauth - Receive Authenticate. + */ +static void +upap_rauthreq(upap_state *u, u_char *inp, int id, int len) +{ + u_char ruserlen, rpasswdlen; + char *ruser, *rpasswd; + int retcode; + char *msg; + int msglen; + + UPAPDEBUG((LOG_INFO, "pap_rauth: Rcvd id %d.\n", id)); + + if (u->us_serverstate < UPAPSS_LISTEN) { + return; + } + + /* + * If we receive a duplicate authenticate-request, we are + * supposed to return the same status as for the first request. + */ + if (u->us_serverstate == UPAPSS_OPEN) { + upap_sresp(u, UPAP_AUTHACK, id, "", 0); /* return auth-ack */ + return; + } + if (u->us_serverstate == UPAPSS_BADAUTH) { + upap_sresp(u, UPAP_AUTHNAK, id, "", 0); /* return auth-nak */ + return; + } + + /* + * Parse user/passwd. + */ + if (len < sizeof (u_char)) { + UPAPDEBUG((LOG_INFO, "pap_rauth: rcvd short packet.\n")); + return; + } + GETCHAR(ruserlen, inp); + len -= sizeof (u_char) + ruserlen + sizeof (u_char); + if (len < 0) { + UPAPDEBUG((LOG_INFO, "pap_rauth: rcvd short packet.\n")); + return; + } + ruser = (char *) inp; + INCPTR(ruserlen, inp); + GETCHAR(rpasswdlen, inp); + if (len < rpasswdlen) { + UPAPDEBUG((LOG_INFO, "pap_rauth: rcvd short packet.\n")); + return; + } + rpasswd = (char *) inp; + + /* + * Check the username and password given. + */ + retcode = check_passwd(u->us_unit, ruser, ruserlen, rpasswd, rpasswdlen, &msg, &msglen); + BZERO(rpasswd, rpasswdlen); + + upap_sresp(u, retcode, id, msg, msglen); + + if (retcode == UPAP_AUTHACK) { + u->us_serverstate = UPAPSS_OPEN; + auth_peer_success(u->us_unit, PPP_PAP, ruser, ruserlen); + } else { + u->us_serverstate = UPAPSS_BADAUTH; + auth_peer_fail(u->us_unit, PPP_PAP); + } + + if (u->us_reqtimeout > 0) { + UNTIMEOUT(upap_reqtimeout, u); + } +} + + +/* + * upap_rauthack - Receive Authenticate-Ack. + */ +static void +upap_rauthack(upap_state *u, u_char *inp, int id, int len) +{ + u_char msglen; + char *msg; + + LWIP_UNUSED_ARG(id); + + UPAPDEBUG((LOG_INFO, "pap_rauthack: Rcvd id %d s=%d\n", id, u->us_clientstate)); + + if (u->us_clientstate != UPAPCS_AUTHREQ) { /* XXX */ + return; + } + + /* + * Parse message. + */ + if (len < sizeof (u_char)) { + UPAPDEBUG((LOG_INFO, "pap_rauthack: rcvd short packet.\n")); + return; + } + GETCHAR(msglen, inp); + len -= sizeof (u_char); + if (len < msglen) { + UPAPDEBUG((LOG_INFO, "pap_rauthack: rcvd short packet.\n")); + return; + } + msg = (char *) inp; + PRINTMSG(msg, msglen); + + UNTIMEOUT(upap_timeout, u); /* Cancel timeout */ + u->us_clientstate = UPAPCS_OPEN; + + auth_withpeer_success(u->us_unit, PPP_PAP); +} + + +/* + * upap_rauthnak - Receive Authenticate-Nakk. + */ +static void +upap_rauthnak(upap_state *u, u_char *inp, int id, int len) +{ + u_char msglen; + char *msg; + + LWIP_UNUSED_ARG(id); + + UPAPDEBUG((LOG_INFO, "pap_rauthnak: Rcvd id %d s=%d\n", id, u->us_clientstate)); + + if (u->us_clientstate != UPAPCS_AUTHREQ) { /* XXX */ + return; + } + + /* + * Parse message. + */ + if (len < sizeof (u_char)) { + UPAPDEBUG((LOG_INFO, "pap_rauthnak: rcvd short packet.\n")); + } else { + GETCHAR(msglen, inp); + if(msglen > 0) { + len -= sizeof (u_char); + if (len < msglen) { + UPAPDEBUG((LOG_INFO, "pap_rauthnak: rcvd short packet.\n")); + return; + } + msg = (char *) inp; + PRINTMSG(msg, msglen); + } + } + + u->us_clientstate = UPAPCS_BADAUTH; + + UPAPDEBUG((LOG_ERR, "PAP authentication failed\n")); + auth_withpeer_fail(u->us_unit, PPP_PAP); +} + + +/* + * upap_sauthreq - Send an Authenticate-Request. + */ +static void +upap_sauthreq(upap_state *u) +{ + u_char *outp; + int outlen; + + outlen = UPAP_HEADERLEN + 2 * sizeof (u_char) + + u->us_userlen + u->us_passwdlen; + outp = outpacket_buf[u->us_unit]; + + MAKEHEADER(outp, PPP_PAP); + + PUTCHAR(UPAP_AUTHREQ, outp); + PUTCHAR(++u->us_id, outp); + PUTSHORT(outlen, outp); + PUTCHAR(u->us_userlen, outp); + BCOPY(u->us_user, outp, u->us_userlen); + INCPTR(u->us_userlen, outp); + PUTCHAR(u->us_passwdlen, outp); + BCOPY(u->us_passwd, outp, u->us_passwdlen); + + pppWrite(u->us_unit, outpacket_buf[u->us_unit], outlen + PPP_HDRLEN); + + UPAPDEBUG((LOG_INFO, "pap_sauth: Sent id %d\n", u->us_id)); + + TIMEOUT(upap_timeout, u, u->us_timeouttime); + ++u->us_transmits; + u->us_clientstate = UPAPCS_AUTHREQ; +} + + +/* + * upap_sresp - Send a response (ack or nak). + */ +static void +upap_sresp(upap_state *u, u_char code, u_char id, char *msg, int msglen) +{ + u_char *outp; + int outlen; + + outlen = UPAP_HEADERLEN + sizeof (u_char) + msglen; + outp = outpacket_buf[u->us_unit]; + MAKEHEADER(outp, PPP_PAP); + + PUTCHAR(code, outp); + PUTCHAR(id, outp); + PUTSHORT(outlen, outp); + PUTCHAR(msglen, outp); + BCOPY(msg, outp, msglen); + pppWrite(u->us_unit, outpacket_buf[u->us_unit], outlen + PPP_HDRLEN); + + UPAPDEBUG((LOG_INFO, "pap_sresp: Sent code %d, id %d s=%d\n", code, id, u->us_clientstate)); +} + +#if 0 +/* + * upap_printpkt - print the contents of a PAP packet. + */ +static int upap_printpkt( + u_char *p, + int plen, + void (*printer) (void *, char *, ...), + void *arg +) +{ + LWIP_UNUSED_ARG(p); + LWIP_UNUSED_ARG(plen); + LWIP_UNUSED_ARG(printer); + LWIP_UNUSED_ARG(arg); + return 0; +} +#endif /* 0 */ + +#endif /* PAP_SUPPORT */ + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/pap.h b/bertos/net/lwip/src/netif/ppp/pap.h new file mode 100644 index 0000000..0a09fc8 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/pap.h @@ -0,0 +1,131 @@ +/***************************************************************************** +* pap.h - PPP Password Authentication Protocol header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-12-04 Guy Lancaster , Global Election Systems Inc. +* Original derived from BSD codes. +*****************************************************************************/ +/* + * upap.h - User/Password Authentication Protocol definitions. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +#ifndef PAP_H +#define PAP_H + +#if PAP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +/************************* +*** PUBLIC DEFINITIONS *** +*************************/ +/* + * Packet header = Code, id, length. + */ +#define UPAP_HEADERLEN (sizeof (u_char) + sizeof (u_char) + sizeof (u_short)) + + +/* + * UPAP codes. + */ +#define UPAP_AUTHREQ 1 /* Authenticate-Request */ +#define UPAP_AUTHACK 2 /* Authenticate-Ack */ +#define UPAP_AUTHNAK 3 /* Authenticate-Nak */ + +/* + * Client states. + */ +#define UPAPCS_INITIAL 0 /* Connection down */ +#define UPAPCS_CLOSED 1 /* Connection up, haven't requested auth */ +#define UPAPCS_PENDING 2 /* Connection down, have requested auth */ +#define UPAPCS_AUTHREQ 3 /* We've sent an Authenticate-Request */ +#define UPAPCS_OPEN 4 /* We've received an Ack */ +#define UPAPCS_BADAUTH 5 /* We've received a Nak */ + +/* + * Server states. + */ +#define UPAPSS_INITIAL 0 /* Connection down */ +#define UPAPSS_CLOSED 1 /* Connection up, haven't requested auth */ +#define UPAPSS_PENDING 2 /* Connection down, have requested auth */ +#define UPAPSS_LISTEN 3 /* Listening for an Authenticate */ +#define UPAPSS_OPEN 4 /* We've sent an Ack */ +#define UPAPSS_BADAUTH 5 /* We've sent a Nak */ + + +/************************ +*** PUBLIC DATA TYPES *** +************************/ + +/* + * Each interface is described by upap structure. + */ +typedef struct upap_state { + int us_unit; /* Interface unit number */ + const char *us_user; /* User */ + int us_userlen; /* User length */ + const char *us_passwd; /* Password */ + int us_passwdlen; /* Password length */ + int us_clientstate; /* Client state */ + int us_serverstate; /* Server state */ + u_char us_id; /* Current id */ + int us_timeouttime; /* Timeout (seconds) for auth-req retrans. */ + int us_transmits; /* Number of auth-reqs sent */ + int us_maxtransmits; /* Maximum number of auth-reqs to send */ + int us_reqtimeout; /* Time to wait for auth-req from peer */ +} upap_state; + + +/*********************** +*** PUBLIC FUNCTIONS *** +***********************/ + +extern upap_state upap[]; + +void upap_setloginpasswd(int unit, const char *luser, const char *lpassword); +void upap_authwithpeer (int, char *, char *); +void upap_authpeer (int); + +extern struct protent pap_protent; + +#endif /* PAP_SUPPORT */ + +#endif /* PAP_H */ diff --git a/bertos/net/lwip/src/netif/ppp/ppp.c b/bertos/net/lwip/src/netif/ppp/ppp.c new file mode 100644 index 0000000..13fa5ed --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/ppp.c @@ -0,0 +1,1989 @@ +/***************************************************************************** +* ppp.c - Network Point to Point Protocol program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 by Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-11-05 Guy Lancaster , Global Election Systems Inc. +* Original. +*****************************************************************************/ + +/* + * ppp_defs.h - PPP definitions. + * + * if_pppvar.h - private structures and declarations for PPP. + * + * Copyright (c) 1994 The Australian National University. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation is hereby granted, provided that the above copyright + * notice appears in all copies. This software is provided without any + * warranty, express or implied. The Australian National University + * makes no representations about the suitability of this software for + * any purpose. + * + * IN NO EVENT SHALL THE AUSTRALIAN NATIONAL UNIVERSITY BE LIABLE TO ANY + * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF + * THE AUSTRALIAN NATIONAL UNIVERSITY HAVE BEEN ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * THE AUSTRALIAN NATIONAL UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE AUSTRALIAN NATIONAL UNIVERSITY HAS NO + * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, + * OR MODIFICATIONS. + */ + +/* + * if_ppp.h - Point-to-Point Protocol definitions. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/ip.h" /* for ip_input() */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "randm.h" +#include "fsm.h" +#if PAP_SUPPORT +#include "pap.h" +#endif /* PAP_SUPPORT */ +#if CHAP_SUPPORT +#include "chap.h" +#endif /* CHAP_SUPPORT */ +#include "ipcp.h" +#include "lcp.h" +#include "magic.h" +#include "auth.h" +#if VJ_SUPPORT +#include "vj.h" +#endif /* VJ_SUPPORT */ +#if PPPOE_SUPPORT +#include "netif/ppp_oe.h" +#endif /* PPPOE_SUPPORT */ + +#include + +/*************************/ +/*** LOCAL DEFINITIONS ***/ +/*************************/ + +/* + * The basic PPP frame. + */ +#define PPP_ADDRESS(p) (((u_char *)(p))[0]) +#define PPP_CONTROL(p) (((u_char *)(p))[1]) +#define PPP_PROTOCOL(p) ((((u_char *)(p))[2] << 8) + ((u_char *)(p))[3]) + +/* PPP packet parser states. Current state indicates operation yet to be + * completed. */ +typedef enum { + PDIDLE = 0, /* Idle state - waiting. */ + PDSTART, /* Process start flag. */ + PDADDRESS, /* Process address field. */ + PDCONTROL, /* Process control field. */ + PDPROTOCOL1, /* Process protocol field 1. */ + PDPROTOCOL2, /* Process protocol field 2. */ + PDDATA /* Process data byte. */ +} PPPDevStates; + +#define ESCAPE_P(accm, c) ((accm)[(c) >> 3] & pppACCMMask[c & 0x07]) + +/************************/ +/*** LOCAL DATA TYPES ***/ +/************************/ +/* + * PPP interface control block. + */ +typedef struct PPPControl_s { + char openFlag; /* True when in use. */ +#if PPPOE_SUPPORT + struct netif *ethif; + struct pppoe_softc *pppoe_sc; +#endif /* PPPOE_SUPPORT */ + int if_up; /* True when the interface is up. */ + int errCode; /* Code indicating why interface is down. */ +#if PPPOS_SUPPORT + sio_fd_t fd; /* File device ID of port. */ + int kill_link; /* Shut the link down. */ + int sig_hup; /* Carrier lost. */ + struct pbuf *inHead, *inTail; /* The input packet. */ + PPPDevStates inState; /* The input process state. */ + char inEscaped; /* Escape next character. */ + u16_t inProtocol; /* The input protocol code. */ + u16_t inFCS; /* Input Frame Check Sequence value. */ +#endif /* PPPOS_SUPPORT */ + int mtu; /* Peer's mru */ + int pcomp; /* Does peer accept protocol compression? */ + int accomp; /* Does peer accept addr/ctl compression? */ + u_long lastXMit; /* Time of last transmission. */ + ext_accm inACCM; /* Async-Ctl-Char-Map for input. */ + ext_accm outACCM; /* Async-Ctl-Char-Map for output. */ +#if PPPOS_SUPPORT && VJ_SUPPORT + int vjEnabled; /* Flag indicating VJ compression enabled. */ + struct vjcompress vjComp; /* Van Jacobson compression header. */ +#endif /* PPPOS_SUPPORT && VJ_SUPPORT */ + + struct netif netif; + + struct ppp_addrs addrs; + + void (*linkStatusCB)(void *ctx, int errCode, void *arg); + void *linkStatusCtx; + +} PPPControl; + + +/* + * Ioctl definitions. + */ + +struct npioctl { + int protocol; /* PPP procotol, e.g. PPP_IP */ + enum NPmode mode; +}; + + + +/***********************************/ +/*** LOCAL FUNCTION DECLARATIONS ***/ +/***********************************/ +#if PPPOS_SUPPORT +static void pppMain(void *pd); +static void pppDrop(PPPControl *pc); +static void pppInProc(int pd, u_char *s, int l); +#endif /* PPPOS_SUPPORT */ + + +/******************************/ +/*** PUBLIC DATA STRUCTURES ***/ +/******************************/ +u_long subnetMask; + +static PPPControl pppControl[NUM_PPP]; /* The PPP interface control blocks. */ + +/* + * PPP Data Link Layer "protocol" table. + * One entry per supported protocol. + * The last entry must be NULL. + */ +struct protent *ppp_protocols[] = { + &lcp_protent, +#if PAP_SUPPORT + &pap_protent, +#endif /* PAP_SUPPORT */ +#if CHAP_SUPPORT + &chap_protent, +#endif /* CHAP_SUPPORT */ +#if CBCP_SUPPORT + &cbcp_protent, +#endif /* CBCP_SUPPORT */ + &ipcp_protent, +#if CCP_SUPPORT + &ccp_protent, +#endif /* CCP_SUPPORT */ + NULL +}; + + +/* + * Buffers for outgoing packets. This must be accessed only from the appropriate + * PPP task so that it doesn't need to be protected to avoid collisions. + */ +u_char outpacket_buf[NUM_PPP][PPP_MRU+PPP_HDRLEN]; + + +/*****************************/ +/*** LOCAL DATA STRUCTURES ***/ +/*****************************/ + +#if PPPOS_SUPPORT +/* + * FCS lookup table as calculated by genfcstab. + */ +static const u_short fcstab[256] = { + 0x0000, 0x1189, 0x2312, 0x329b, 0x4624, 0x57ad, 0x6536, 0x74bf, + 0x8c48, 0x9dc1, 0xaf5a, 0xbed3, 0xca6c, 0xdbe5, 0xe97e, 0xf8f7, + 0x1081, 0x0108, 0x3393, 0x221a, 0x56a5, 0x472c, 0x75b7, 0x643e, + 0x9cc9, 0x8d40, 0xbfdb, 0xae52, 0xdaed, 0xcb64, 0xf9ff, 0xe876, + 0x2102, 0x308b, 0x0210, 0x1399, 0x6726, 0x76af, 0x4434, 0x55bd, + 0xad4a, 0xbcc3, 0x8e58, 0x9fd1, 0xeb6e, 0xfae7, 0xc87c, 0xd9f5, + 0x3183, 0x200a, 0x1291, 0x0318, 0x77a7, 0x662e, 0x54b5, 0x453c, + 0xbdcb, 0xac42, 0x9ed9, 0x8f50, 0xfbef, 0xea66, 0xd8fd, 0xc974, + 0x4204, 0x538d, 0x6116, 0x709f, 0x0420, 0x15a9, 0x2732, 0x36bb, + 0xce4c, 0xdfc5, 0xed5e, 0xfcd7, 0x8868, 0x99e1, 0xab7a, 0xbaf3, + 0x5285, 0x430c, 0x7197, 0x601e, 0x14a1, 0x0528, 0x37b3, 0x263a, + 0xdecd, 0xcf44, 0xfddf, 0xec56, 0x98e9, 0x8960, 0xbbfb, 0xaa72, + 0x6306, 0x728f, 0x4014, 0x519d, 0x2522, 0x34ab, 0x0630, 0x17b9, + 0xef4e, 0xfec7, 0xcc5c, 0xddd5, 0xa96a, 0xb8e3, 0x8a78, 0x9bf1, + 0x7387, 0x620e, 0x5095, 0x411c, 0x35a3, 0x242a, 0x16b1, 0x0738, + 0xffcf, 0xee46, 0xdcdd, 0xcd54, 0xb9eb, 0xa862, 0x9af9, 0x8b70, + 0x8408, 0x9581, 0xa71a, 0xb693, 0xc22c, 0xd3a5, 0xe13e, 0xf0b7, + 0x0840, 0x19c9, 0x2b52, 0x3adb, 0x4e64, 0x5fed, 0x6d76, 0x7cff, + 0x9489, 0x8500, 0xb79b, 0xa612, 0xd2ad, 0xc324, 0xf1bf, 0xe036, + 0x18c1, 0x0948, 0x3bd3, 0x2a5a, 0x5ee5, 0x4f6c, 0x7df7, 0x6c7e, + 0xa50a, 0xb483, 0x8618, 0x9791, 0xe32e, 0xf2a7, 0xc03c, 0xd1b5, + 0x2942, 0x38cb, 0x0a50, 0x1bd9, 0x6f66, 0x7eef, 0x4c74, 0x5dfd, + 0xb58b, 0xa402, 0x9699, 0x8710, 0xf3af, 0xe226, 0xd0bd, 0xc134, + 0x39c3, 0x284a, 0x1ad1, 0x0b58, 0x7fe7, 0x6e6e, 0x5cf5, 0x4d7c, + 0xc60c, 0xd785, 0xe51e, 0xf497, 0x8028, 0x91a1, 0xa33a, 0xb2b3, + 0x4a44, 0x5bcd, 0x6956, 0x78df, 0x0c60, 0x1de9, 0x2f72, 0x3efb, + 0xd68d, 0xc704, 0xf59f, 0xe416, 0x90a9, 0x8120, 0xb3bb, 0xa232, + 0x5ac5, 0x4b4c, 0x79d7, 0x685e, 0x1ce1, 0x0d68, 0x3ff3, 0x2e7a, + 0xe70e, 0xf687, 0xc41c, 0xd595, 0xa12a, 0xb0a3, 0x8238, 0x93b1, + 0x6b46, 0x7acf, 0x4854, 0x59dd, 0x2d62, 0x3ceb, 0x0e70, 0x1ff9, + 0xf78f, 0xe606, 0xd49d, 0xc514, 0xb1ab, 0xa022, 0x92b9, 0x8330, + 0x7bc7, 0x6a4e, 0x58d5, 0x495c, 0x3de3, 0x2c6a, 0x1ef1, 0x0f78 +}; + +/* PPP's Asynchronous-Control-Character-Map. The mask array is used + * to select the specific bit for a character. */ +static u_char pppACCMMask[] = { + 0x01, + 0x02, + 0x04, + 0x08, + 0x10, + 0x20, + 0x40, + 0x80 +}; + + +void +pppMainWakeup(int pd) +{ + PPPDEBUG((LOG_DEBUG, "pppMainWakeup: unit %d\n", pd)); + sio_read_abort(pppControl[pd].fd); +} +#endif /* PPPOS_SUPPORT */ + +void +pppLinkTerminated(int pd) +{ + PPPDEBUG((LOG_DEBUG, "pppLinkTerminated: unit %d\n", pd)); + +#if PPPOE_SUPPORT + if(pppControl[pd].ethif) { + pppoe_disconnect(pppControl[pd].pppoe_sc); + } else +#endif /* PPPOE_SUPPORT */ + { +#if PPPOS_SUPPORT + pppMainWakeup(pd); +#endif /* PPPOS_SUPPORT */ + } +} + +void +pppLinkDown(int pd) +{ + PPPDEBUG((LOG_DEBUG, "pppLinkDown: unit %d\n", pd)); + +#if PPPOE_SUPPORT + if(pppControl[pd].ethif) { + pppoe_disconnect(pppControl[pd].pppoe_sc); + } else +#endif /* PPPOE_SUPPORT */ + { +#if PPPOS_SUPPORT + pppMainWakeup(pd); +#endif /* PPPOS_SUPPORT */ + } +} + +/* these callbacks are necessary because lcp_* functions + must be called in the same context as pppInput(), + namely the tcpip_thread(), essentially because + they manipulate timeouts which are thread-private +*/ + +static void +pppStartCB(void *arg) +{ + int pd = (int)arg; + + PPPDEBUG((LOG_DEBUG, "pppStartCB: unit %d\n", pd)); + lcp_lowerup(pd); + lcp_open(pd); /* Start protocol */ +} + +static void +pppStopCB(void *arg) +{ + int pd = (int)arg; + + PPPDEBUG((LOG_DEBUG, "pppStopCB: unit %d\n", pd)); + lcp_close(pd, "User request"); +} + +static void +pppHupCB(void *arg) +{ + int pd = (int)arg; + + PPPDEBUG((LOG_DEBUG, "pppHupCB: unit %d\n", pd)); + lcp_lowerdown(pd); + link_terminated(pd); +} + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ +/* Initialize the PPP subsystem. */ + +struct ppp_settings ppp_settings; + +void +pppInit(void) +{ + struct protent *protp; + int i, j; + + memset(&ppp_settings, 0, sizeof(ppp_settings)); + ppp_settings.usepeerdns = 1; + pppSetAuth(PPPAUTHTYPE_NONE, NULL, NULL); + + magicInit(); + + subnetMask = htonl(0xffffff00); + + for (i = 0; i < NUM_PPP; i++) { + pppControl[i].openFlag = 0; + + /* + * Initialize to the standard option set. + */ + for (j = 0; (protp = ppp_protocols[j]) != NULL; ++j) { + (*protp->init)(i); + } + } + +#if PPPOE_SUPPORT + pppoe_init(); +#endif /* PPPOE_SUPPORT */ +} + +void +pppSetAuth(enum pppAuthType authType, const char *user, const char *passwd) +{ + switch(authType) { + case PPPAUTHTYPE_NONE: + default: +#ifdef LWIP_PPP_STRICT_PAP_REJECT + ppp_settings.refuse_pap = 1; +#else /* LWIP_PPP_STRICT_PAP_REJECT */ + /* some providers request pap and accept an empty login/pw */ + ppp_settings.refuse_pap = 0; +#endif /* LWIP_PPP_STRICT_PAP_REJECT */ + ppp_settings.refuse_chap = 1; + break; + + case PPPAUTHTYPE_ANY: + /* Warning: Using PPPAUTHTYPE_ANY might have security consequences. + * RFC 1994 says: + * + * In practice, within or associated with each PPP server, there is a + * database which associates "user" names with authentication + * information ("secrets"). It is not anticipated that a particular + * named user would be authenticated by multiple methods. This would + * make the user vulnerable to attacks which negotiate the least secure + * method from among a set (such as PAP rather than CHAP). If the same + * secret was used, PAP would reveal the secret to be used later with + * CHAP. + * + * Instead, for each user name there should be an indication of exactly + * one method used to authenticate that user name. If a user needs to + * make use of different authentication methods under different + * circumstances, then distinct user names SHOULD be employed, each of + * which identifies exactly one authentication method. + * + */ + ppp_settings.refuse_pap = 0; + ppp_settings.refuse_chap = 0; + break; + + case PPPAUTHTYPE_PAP: + ppp_settings.refuse_pap = 0; + ppp_settings.refuse_chap = 1; + break; + + case PPPAUTHTYPE_CHAP: + ppp_settings.refuse_pap = 1; + ppp_settings.refuse_chap = 0; + break; + } + + if(user) { + strncpy(ppp_settings.user, user, sizeof(ppp_settings.user)-1); + ppp_settings.user[sizeof(ppp_settings.user)-1] = '\0'; + } else { + ppp_settings.user[0] = '\0'; + } + + if(passwd) { + strncpy(ppp_settings.passwd, passwd, sizeof(ppp_settings.passwd)-1); + ppp_settings.passwd[sizeof(ppp_settings.passwd)-1] = '\0'; + } else { + ppp_settings.passwd[0] = '\0'; + } +} + +#if PPPOS_SUPPORT +/* Open a new PPP connection using the given I/O device. + * This initializes the PPP control block but does not + * attempt to negotiate the LCP session. If this port + * connects to a modem, the modem connection must be + * established before calling this. + * Return a new PPP connection descriptor on success or + * an error code (negative) on failure. */ +int +pppOverSerialOpen(sio_fd_t fd, void (*linkStatusCB)(void *ctx, int errCode, void *arg), void *linkStatusCtx) +{ + PPPControl *pc; + int pd; + + /* Find a free PPP session descriptor. Critical region? */ + for (pd = 0; pd < NUM_PPP && pppControl[pd].openFlag != 0; pd++); + + if (pd >= NUM_PPP) { + pd = PPPERR_OPEN; + } else { + pppControl[pd].openFlag = !0; + } + + /* Launch a deamon thread. */ + if (pd >= 0) { + pppControl[pd].openFlag = 1; + + lcp_init(pd); + pc = &pppControl[pd]; + pc->fd = fd; +#if PPPOE_SUPPORT + pc->ethif= NULL; +#endif /* PPPOE_SUPPORT */ + pc->kill_link = 0; + pc->sig_hup = 0; + pc->if_up = 0; + pc->errCode = 0; + pc->inState = PDIDLE; + pc->inHead = NULL; + pc->inTail = NULL; + pc->inEscaped = 0; + pc->lastXMit = 0; + +#if VJ_SUPPORT + pc->vjEnabled = 0; + vj_compress_init(&pc->vjComp); +#endif /* VJ_SUPPORT */ + + /* + * Default the in and out accm so that escape and flag characters + * are always escaped. + */ + memset(pc->inACCM, 0, sizeof(ext_accm)); + pc->inACCM[15] = 0x60; + memset(pc->outACCM, 0, sizeof(ext_accm)); + pc->outACCM[15] = 0x60; + + pc->linkStatusCB = linkStatusCB; + pc->linkStatusCtx = linkStatusCtx; + + sys_thread_new(PPP_THREAD_NAME, pppMain, (void*)pd, PPP_THREAD_STACKSIZE, PPP_THREAD_PRIO); + if(!linkStatusCB) { + while(pd >= 0 && !pc->if_up) { + sys_msleep(500); + if (lcp_phase[pd] == PHASE_DEAD) { + pppClose(pd); + if (pc->errCode) { + pd = pc->errCode; + } else { + pd = PPPERR_CONNECT; + } + } + } + } + } + + return pd; +} +#endif /* PPPOS_SUPPORT */ + +#if PPPOE_SUPPORT +static void pppOverEthernetLinkStatusCB(int pd, int up); + +void +pppOverEthernetClose(int pd) +{ + PPPControl* pc = &pppControl[pd]; + + /* *TJL* There's no lcp_deinit */ + lcp_close(pd, NULL); + + pppoe_destroy(&pc->netif); +} + +int pppOverEthernetOpen(struct netif *ethif, const char *service_name, const char *concentrator_name, void (*linkStatusCB)(void *ctx, int errCode, void *arg), void *linkStatusCtx) +{ + PPPControl *pc; + int pd; + + LWIP_UNUSED_ARG(service_name); + LWIP_UNUSED_ARG(concentrator_name); + + /* Find a free PPP session descriptor. Critical region? */ + for (pd = 0; pd < NUM_PPP && pppControl[pd].openFlag != 0; pd++); + if (pd >= NUM_PPP) { + pd = PPPERR_OPEN; + } else { + pppControl[pd].openFlag = !0; + } + + /* PPP session descriptor found, start PPPoE */ + if (pd >= 0) { + + pppControl[pd].openFlag = 1; + + lcp_init(pd); + + lcp_wantoptions[pd].mru = PPPOE_MAXMTU; + lcp_wantoptions[pd].neg_asyncmap = 0; + lcp_wantoptions[pd].neg_pcompression = 0; + lcp_wantoptions[pd].neg_accompression = 0; + + lcp_allowoptions[pd].mru = PPPOE_MAXMTU; + lcp_allowoptions[pd].neg_asyncmap = 0; + lcp_allowoptions[pd].neg_pcompression = 0; + lcp_allowoptions[pd].neg_accompression = 0; + + pc = &pppControl[pd]; + pc->if_up = 0; + pc->errCode = 0; + pc->lastXMit = 0; +#if PPPOS_SUPPORT + pc->kill_link = 0; + pc->sig_hup = 0; + pc->inState = PDIDLE; + pc->inHead = NULL; + pc->inTail = NULL; + pc->inEscaped = 0; +#if VJ_SUPPORT + pc->vjEnabled = 0; +#endif /* VJ_SUPPORT */ +#endif /* PPPOS_SUPPORT */ + pc->ethif= ethif; + + memset(pc->inACCM, 0, sizeof(ext_accm)); + memset(pc->outACCM, 0, sizeof(ext_accm)); + + pc->linkStatusCB = linkStatusCB; + pc->linkStatusCtx = linkStatusCtx; + + if(pppoe_create(ethif, pd, pppOverEthernetLinkStatusCB, &pc->pppoe_sc) != ERR_OK) { + pc->openFlag = 0; + return PPPERR_OPEN; + } + + pppoe_connect(pc->pppoe_sc); + + if(!linkStatusCB) { + while(pd >= 0 && !pc->if_up) { + sys_msleep(500); + if (lcp_phase[pd] == PHASE_DEAD) { + pppClose(pd); + if (pc->errCode) { + pd = pc->errCode; + } else { + pd = PPPERR_CONNECT; + } + } + } + } + } + + return pd; +} +#endif /* PPPOE_SUPPORT */ + + +/* Close a PPP connection and release the descriptor. + * Any outstanding packets in the queues are dropped. + * Return 0 on success, an error code on failure. */ +int +pppClose(int pd) +{ + PPPControl *pc = &pppControl[pd]; + int st = 0; + + /* Disconnect */ +#if PPPOE_SUPPORT + if(pc->ethif) { + PPPDEBUG((LOG_DEBUG, "pppClose: unit %d kill_link -> pppStopCB\n", pd)); + pc->errCode = PPPERR_USER; + /* This will leave us at PHASE_DEAD. */ + tcpip_callback(pppStopCB, (void*)pd); + } else +#endif /* PPPOE_SUPPORT */ + { +#if PPPOS_SUPPORT + pc->kill_link = !0; + pppMainWakeup(pd); +#endif /* PPPOS_SUPPORT */ + } + + if(!pc->linkStatusCB) { + while(st >= 0 && lcp_phase[pd] != PHASE_DEAD) { + sys_msleep(500); + break; + } + } + + return st; +} + +/* This function is called when carrier is lost on the PPP channel. */ +void +pppSigHUP(int pd) +{ + PPPControl *pc = &pppControl[pd]; + +#if PPPOE_SUPPORT + if(pc->ethif) { + PPPDEBUG((LOG_DEBUG, "pppSigHUP: unit %d sig_hup -> pppHupCB\n", pd)); + tcpip_callback(pppHupCB, (void*)pd); + } else +#endif /* PPPOE_SUPPORT */ + { +#if PPPOS_SUPPORT + pc->sig_hup = 1; + pppMainWakeup(pd); +#endif /* PPPOS_SUPPORT */ + } +} + +#if PPPOS_SUPPORT +static void +nPut(PPPControl *pc, struct pbuf *nb) +{ + struct pbuf *b; + int c; + + for(b = nb; b != NULL; b = b->next) { + if((c = sio_write(pc->fd, b->payload, b->len)) != b->len) { + PPPDEBUG((LOG_WARNING, + "PPP nPut: incomplete sio_write(%d,, %u) = %d\n", pc->fd, b->len, c)); + LINK_STATS_INC(link.err); + pc->lastXMit = 0; /* prepend PPP_FLAG to next packet */ + break; + } + } + + pbuf_free(nb); + LINK_STATS_INC(link.xmit); +} + +/* + * pppAppend - append given character to end of given pbuf. If outACCM + * is not NULL and the character needs to be escaped, do so. + * If pbuf is full, append another. + * Return the current pbuf. + */ +static struct pbuf * +pppAppend(u_char c, struct pbuf *nb, ext_accm *outACCM) +{ + struct pbuf *tb = nb; + + /* Make sure there is room for the character and an escape code. + * Sure we don't quite fill the buffer if the character doesn't + * get escaped but is one character worth complicating this? */ + /* Note: We assume no packet header. */ + if (nb && (PBUF_POOL_BUFSIZE - nb->len) < 2) { + tb = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); + if (tb) { + nb->next = tb; + } else { + LINK_STATS_INC(link.memerr); + } + nb = tb; + } + + if (nb) { + if (outACCM && ESCAPE_P(*outACCM, c)) { + *((u_char*)nb->payload + nb->len++) = PPP_ESCAPE; + *((u_char*)nb->payload + nb->len++) = c ^ PPP_TRANS; + } else { + *((u_char*)nb->payload + nb->len++) = c; + } + } + + return tb; +} +#endif /* PPPOS_SUPPORT */ + +#if PPPOE_SUPPORT +static err_t +pppifOutputOverEthernet(int pd, struct pbuf *p) +{ + PPPControl *pc = &pppControl[pd]; + struct pbuf *pb; + u_short protocol = PPP_IP; + int i=0; + + pb = pbuf_alloc(PBUF_LINK, pppoe_hdrlen + sizeof(protocol), PBUF_RAM); + if(!pb) { + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.proterr); + return ERR_MEM; + } + + pbuf_header(pb, -pppoe_hdrlen); + + pc->lastXMit = sys_jiffies(); + + if (!pc->pcomp || protocol > 0xFF) { + *((u_char*)pb->payload + i++) = (protocol >> 8) & 0xFF; + } + *((u_char*)pb->payload + i) = protocol & 0xFF; + + pbuf_chain(pb, p); + + if(pppoe_xmit(pc->pppoe_sc, pb) != ERR_OK) { + LINK_STATS_INC(link.err); + return PPPERR_DEVICE; + } + + LINK_STATS_INC(link.xmit); + return ERR_OK; +} +#endif /* PPPOE_SUPPORT */ + +/* Send a packet on the given connection. */ +static err_t +pppifOutput(struct netif *netif, struct pbuf *pb, struct ip_addr *ipaddr) +{ + int pd = (int)netif->state; + PPPControl *pc = &pppControl[pd]; +#if PPPOS_SUPPORT + u_short protocol = PPP_IP; + u_int fcsOut = PPP_INITFCS; + struct pbuf *headMB = NULL, *tailMB = NULL, *p; + u_char c; +#endif /* PPPOS_SUPPORT */ + + LWIP_UNUSED_ARG(ipaddr); + + /* Validate parameters. */ + /* We let any protocol value go through - it can't hurt us + * and the peer will just drop it if it's not accepting it. */ + if (pd < 0 || pd >= NUM_PPP || !pc->openFlag || !pb) { + PPPDEBUG((LOG_WARNING, "pppifOutput[%d]: bad parms prot=%d pb=%p\n", + pd, PPP_IP, pb)); + LINK_STATS_INC(link.opterr); + LINK_STATS_INC(link.drop); + return ERR_ARG; + } + + /* Check that the link is up. */ + if (lcp_phase[pd] == PHASE_DEAD) { + PPPDEBUG((LOG_ERR, "pppifOutput[%d]: link not up\n", pd)); + LINK_STATS_INC(link.rterr); + LINK_STATS_INC(link.drop); + return ERR_RTE; + } + +#if PPPOE_SUPPORT + if(pc->ethif) { + return pppifOutputOverEthernet(pd, pb); + } +#endif /* PPPOE_SUPPORT */ + +#if PPPOS_SUPPORT + /* Grab an output buffer. */ + headMB = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); + if (headMB == NULL) { + PPPDEBUG((LOG_WARNING, "pppifOutput[%d]: first alloc fail\n", pd)); + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.drop); + return ERR_MEM; + } + +#if VJ_SUPPORT + /* + * Attempt Van Jacobson header compression if VJ is configured and + * this is an IP packet. + */ + if (protocol == PPP_IP && pc->vjEnabled) { + switch (vj_compress_tcp(&pc->vjComp, pb)) { + case TYPE_IP: + /* No change... + protocol = PPP_IP_PROTOCOL; */ + break; + case TYPE_COMPRESSED_TCP: + protocol = PPP_VJC_COMP; + break; + case TYPE_UNCOMPRESSED_TCP: + protocol = PPP_VJC_UNCOMP; + break; + default: + PPPDEBUG((LOG_WARNING, "pppifOutput[%d]: bad IP packet\n", pd)); + LINK_STATS_INC(link.proterr); + LINK_STATS_INC(link.drop); + pbuf_free(headMB); + return ERR_VAL; + } + } +#endif /* VJ_SUPPORT */ + + tailMB = headMB; + + /* Build the PPP header. */ + if ((sys_jiffies() - pc->lastXMit) >= PPP_MAXIDLEFLAG) { + tailMB = pppAppend(PPP_FLAG, tailMB, NULL); + } + + pc->lastXMit = sys_jiffies(); + if (!pc->accomp) { + fcsOut = PPP_FCS(fcsOut, PPP_ALLSTATIONS); + tailMB = pppAppend(PPP_ALLSTATIONS, tailMB, &pc->outACCM); + fcsOut = PPP_FCS(fcsOut, PPP_UI); + tailMB = pppAppend(PPP_UI, tailMB, &pc->outACCM); + } + if (!pc->pcomp || protocol > 0xFF) { + c = (protocol >> 8) & 0xFF; + fcsOut = PPP_FCS(fcsOut, c); + tailMB = pppAppend(c, tailMB, &pc->outACCM); + } + c = protocol & 0xFF; + fcsOut = PPP_FCS(fcsOut, c); + tailMB = pppAppend(c, tailMB, &pc->outACCM); + + /* Load packet. */ + for(p = pb; p; p = p->next) { + int n; + u_char *sPtr; + + sPtr = (u_char*)p->payload; + n = p->len; + while (n-- > 0) { + c = *sPtr++; + + /* Update FCS before checking for special characters. */ + fcsOut = PPP_FCS(fcsOut, c); + + /* Copy to output buffer escaping special characters. */ + tailMB = pppAppend(c, tailMB, &pc->outACCM); + } + } + + /* Add FCS and trailing flag. */ + c = ~fcsOut & 0xFF; + tailMB = pppAppend(c, tailMB, &pc->outACCM); + c = (~fcsOut >> 8) & 0xFF; + tailMB = pppAppend(c, tailMB, &pc->outACCM); + tailMB = pppAppend(PPP_FLAG, tailMB, NULL); + + /* If we failed to complete the packet, throw it away. */ + if (!tailMB) { + PPPDEBUG((LOG_WARNING, + "pppifOutput[%d]: Alloc err - dropping proto=%d\n", + pd, protocol)); + pbuf_free(headMB); + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.drop); + return ERR_MEM; + } + + /* Send it. */ + PPPDEBUG((LOG_INFO, "pppifOutput[%d]: proto=0x%04X\n", pd, protocol)); + + nPut(pc, headMB); +#endif /* PPPOS_SUPPORT */ + + return ERR_OK; +} + +/* Get and set parameters for the given connection. + * Return 0 on success, an error code on failure. */ +int +pppIOCtl(int pd, int cmd, void *arg) +{ + PPPControl *pc = &pppControl[pd]; + int st = 0; + + if (pd < 0 || pd >= NUM_PPP) { + st = PPPERR_PARAM; + } else { + switch(cmd) { + case PPPCTLG_UPSTATUS: /* Get the PPP up status. */ + if (arg) { + *(int *)arg = (int)(pc->if_up); + } else { + st = PPPERR_PARAM; + } + break; + case PPPCTLS_ERRCODE: /* Set the PPP error code. */ + if (arg) { + pc->errCode = *(int *)arg; + } else { + st = PPPERR_PARAM; + } + break; + case PPPCTLG_ERRCODE: /* Get the PPP error code. */ + if (arg) { + *(int *)arg = (int)(pc->errCode); + } else { + st = PPPERR_PARAM; + } + break; +#if PPPOS_SUPPORT + case PPPCTLG_FD: + if (arg) { + *(sio_fd_t *)arg = pc->fd; + } else { + st = PPPERR_PARAM; + } + break; +#endif /* PPPOS_SUPPORT */ + default: + st = PPPERR_PARAM; + break; + } + } + + return st; +} + +/* + * Return the Maximum Transmission Unit for the given PPP connection. + */ +u_int +pppMTU(int pd) +{ + PPPControl *pc = &pppControl[pd]; + u_int st; + + /* Validate parameters. */ + if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { + st = 0; + } else { + st = pc->mtu; + } + + return st; +} + +#if PPPOE_SUPPORT +int +pppWriteOverEthernet(int pd, const u_char *s, int n) +{ + PPPControl *pc = &pppControl[pd]; + struct pbuf *pb; + + /* skip address & flags */ + s += 2; + n -= 2; + + pb = pbuf_alloc(PBUF_LINK, pppoe_hdrlen + n, PBUF_RAM); + if(!pb) { + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.proterr); + return PPPERR_ALLOC; + } + + pbuf_header(pb, -pppoe_hdrlen); + + pc->lastXMit = sys_jiffies(); + + MEMCPY(pb->payload, s, n); + + if(pppoe_xmit(pc->pppoe_sc, pb) != ERR_OK) { + LINK_STATS_INC(link.err); + return PPPERR_DEVICE; + } + + LINK_STATS_INC(link.xmit); + return PPPERR_NONE; +} +#endif /* PPPOE_SUPPORT */ + +/* + * Write n characters to a ppp link. + * RETURN: >= 0 Number of characters written + * -1 Failed to write to device + */ +int +pppWrite(int pd, const u_char *s, int n) +{ + PPPControl *pc = &pppControl[pd]; +#if PPPOS_SUPPORT + u_char c; + u_int fcsOut; + struct pbuf *headMB, *tailMB; +#endif /* PPPOS_SUPPORT */ + +#if PPPOE_SUPPORT + if(pc->ethif) { + return pppWriteOverEthernet(pd, s, n); + } +#endif /* PPPOE_SUPPORT */ + +#if PPPOS_SUPPORT + headMB = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); + if (headMB == NULL) { + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.proterr); + return PPPERR_ALLOC; + } + + tailMB = headMB; + + /* If the link has been idle, we'll send a fresh flag character to + * flush any noise. */ + if ((sys_jiffies() - pc->lastXMit) >= PPP_MAXIDLEFLAG) { + tailMB = pppAppend(PPP_FLAG, tailMB, NULL); + } + pc->lastXMit = sys_jiffies(); + + fcsOut = PPP_INITFCS; + /* Load output buffer. */ + while (n-- > 0) { + c = *s++; + + /* Update FCS before checking for special characters. */ + fcsOut = PPP_FCS(fcsOut, c); + + /* Copy to output buffer escaping special characters. */ + tailMB = pppAppend(c, tailMB, &pc->outACCM); + } + + /* Add FCS and trailing flag. */ + c = ~fcsOut & 0xFF; + tailMB = pppAppend(c, tailMB, &pc->outACCM); + c = (~fcsOut >> 8) & 0xFF; + tailMB = pppAppend(c, tailMB, &pc->outACCM); + tailMB = pppAppend(PPP_FLAG, tailMB, NULL); + + /* If we failed to complete the packet, throw it away. + * Otherwise send it. */ + if (!tailMB) { + PPPDEBUG((LOG_WARNING, + "pppWrite[%d]: Alloc err - dropping pbuf len=%d\n", pd, headMB->len)); + /*"pppWrite[%d]: Alloc err - dropping %d:%.*H", pd, headMB->len, LWIP_MIN(headMB->len * 2, 40), headMB->payload)); */ + pbuf_free(headMB); + LINK_STATS_INC(link.memerr); + LINK_STATS_INC(link.proterr); + return PPPERR_ALLOC; + } + + PPPDEBUG((LOG_INFO, "pppWrite[%d]: len=%d\n", pd, headMB->len)); + /* "pppWrite[%d]: %d:%.*H", pd, headMB->len, LWIP_MIN(headMB->len * 2, 40), headMB->payload)); */ + nPut(pc, headMB); +#endif /* PPPOS_SUPPORT */ + + return PPPERR_NONE; +} + +/* + * ppp_send_config - configure the transmit characteristics of + * the ppp interface. + */ +void +ppp_send_config( int unit, int mtu, u32_t asyncmap, int pcomp, int accomp) +{ + PPPControl *pc = &pppControl[unit]; + int i; + + pc->mtu = mtu; + pc->pcomp = pcomp; + pc->accomp = accomp; + + /* Load the ACCM bits for the 32 control codes. */ + for (i = 0; i < 32/8; i++) { + pc->outACCM[i] = (u_char)((asyncmap >> (8 * i)) & 0xFF); + } + PPPDEBUG((LOG_INFO, "ppp_send_config[%d]: outACCM=%X %X %X %X\n", + unit, + pc->outACCM[0], pc->outACCM[1], pc->outACCM[2], pc->outACCM[3])); +} + + +/* + * ppp_set_xaccm - set the extended transmit ACCM for the interface. + */ +void +ppp_set_xaccm(int unit, ext_accm *accm) +{ + SMEMCPY(pppControl[unit].outACCM, accm, sizeof(ext_accm)); + PPPDEBUG((LOG_INFO, "ppp_set_xaccm[%d]: outACCM=%X %X %X %X\n", + unit, + pppControl[unit].outACCM[0], + pppControl[unit].outACCM[1], + pppControl[unit].outACCM[2], + pppControl[unit].outACCM[3])); +} + + +/* + * ppp_recv_config - configure the receive-side characteristics of + * the ppp interface. + */ +void +ppp_recv_config( int unit, int mru, u32_t asyncmap, int pcomp, int accomp) +{ + PPPControl *pc = &pppControl[unit]; + int i; + + LWIP_UNUSED_ARG(accomp); + LWIP_UNUSED_ARG(pcomp); + LWIP_UNUSED_ARG(mru); + + /* Load the ACCM bits for the 32 control codes. */ + for (i = 0; i < 32 / 8; i++) { + pc->inACCM[i] = (u_char)(asyncmap >> (i * 8)); + } + PPPDEBUG((LOG_INFO, "ppp_recv_config[%d]: inACCM=%X %X %X %X\n", + unit, + pc->inACCM[0], pc->inACCM[1], pc->inACCM[2], pc->inACCM[3])); +} + +#if 0 +/* + * ccp_test - ask kernel whether a given compression method + * is acceptable for use. Returns 1 if the method and parameters + * are OK, 0 if the method is known but the parameters are not OK + * (e.g. code size should be reduced), or -1 if the method is unknown. + */ +int +ccp_test( int unit, int opt_len, int for_transmit, u_char *opt_ptr) +{ + return 0; /* XXX Currently no compression. */ +} + +/* + * ccp_flags_set - inform kernel about the current state of CCP. + */ +void +ccp_flags_set(int unit, int isopen, int isup) +{ + /* XXX */ +} + +/* + * ccp_fatal_error - returns 1 if decompression was disabled as a + * result of an error detected after decompression of a packet, + * 0 otherwise. This is necessary because of patent nonsense. + */ +int +ccp_fatal_error(int unit) +{ + /* XXX */ + return 0; +} +#endif + +/* + * get_idle_time - return how long the link has been idle. + */ +int +get_idle_time(int u, struct ppp_idle *ip) +{ + /* XXX */ + LWIP_UNUSED_ARG(u); + LWIP_UNUSED_ARG(ip); + + return 0; +} + + +/* + * Return user specified netmask, modified by any mask we might determine + * for address `addr' (in network byte order). + * Here we scan through the system's list of interfaces, looking for + * any non-point-to-point interfaces which might appear to be on the same + * network as `addr'. If we find any, we OR in their netmask to the + * user-specified netmask. + */ +u32_t +GetMask(u32_t addr) +{ + u32_t mask, nmask; + + htonl(addr); + if (IN_CLASSA(addr)) { /* determine network mask for address class */ + nmask = IN_CLASSA_NET; + } else if (IN_CLASSB(addr)) { + nmask = IN_CLASSB_NET; + } else { + nmask = IN_CLASSC_NET; + } + + /* class D nets are disallowed by bad_ip_adrs */ + mask = subnetMask | htonl(nmask); + + /* XXX + * Scan through the system's network interfaces. + * Get each netmask and OR them into our mask. + */ + + return mask; +} + +/* + * sifvjcomp - config tcp header compression + */ +int +sifvjcomp(int pd, int vjcomp, int cidcomp, int maxcid) +{ +#if PPPOS_SUPPORT && VJ_SUPPORT + PPPControl *pc = &pppControl[pd]; + + pc->vjEnabled = vjcomp; + pc->vjComp.compressSlot = cidcomp; + pc->vjComp.maxSlotIndex = maxcid; + PPPDEBUG((LOG_INFO, "sifvjcomp: VJ compress enable=%d slot=%d max slot=%d\n", + vjcomp, cidcomp, maxcid)); +#else /* PPPOS_SUPPORT && VJ_SUPPORT */ + LWIP_UNUSED_ARG(pd); + LWIP_UNUSED_ARG(vjcomp); + LWIP_UNUSED_ARG(cidcomp); + LWIP_UNUSED_ARG(maxcid); +#endif /* PPPOS_SUPPORT && VJ_SUPPORT */ + + return 0; +} + +/* + * pppifNetifInit - netif init callback + */ +static err_t +pppifNetifInit(struct netif *netif) +{ + netif->name[0] = 'p'; + netif->name[1] = 'p'; + netif->output = pppifOutput; + netif->mtu = pppMTU((int)netif->state); + return ERR_OK; +} + + +/* + * sifup - Config the interface up and enable IP packets to pass. + */ +int +sifup(int pd) +{ + PPPControl *pc = &pppControl[pd]; + int st = 1; + + if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { + st = 0; + PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); + } else { + netif_remove(&pc->netif); + if (netif_add(&pc->netif, &pc->addrs.our_ipaddr, &pc->addrs.netmask, &pc->addrs.his_ipaddr, (void *)pd, pppifNetifInit, ip_input)) { + netif_set_up(&pc->netif); + pc->if_up = 1; + pc->errCode = PPPERR_NONE; + + PPPDEBUG((LOG_DEBUG, "sifup: unit %d: linkStatusCB=%lx errCode=%d\n", pd, pc->linkStatusCB, pc->errCode)); + if(pc->linkStatusCB) { + pc->linkStatusCB(pc->linkStatusCtx, pc->errCode, &pc->addrs); + } + } else { + st = 0; + PPPDEBUG((LOG_ERR, "sifup[%d]: netif_add failed\n", pd)); + } + } + + return st; +} + +/* + * sifnpmode - Set the mode for handling packets for a given NP. + */ +int +sifnpmode(int u, int proto, enum NPmode mode) +{ + LWIP_UNUSED_ARG(u); + LWIP_UNUSED_ARG(proto); + LWIP_UNUSED_ARG(mode); + return 0; +} + +/* + * sifdown - Config the interface down and disable IP. + */ +int +sifdown(int pd) +{ + PPPControl *pc = &pppControl[pd]; + int st = 1; + + if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { + st = 0; + PPPDEBUG((LOG_WARNING, "sifdown[%d]: bad parms\n", pd)); + } else { + pc->if_up = 0; + /* make sure the netif status callback is called */ + netif_set_down(&pc->netif); + netif_remove(&pc->netif); + PPPDEBUG((LOG_DEBUG, "sifdown: unit %d: linkStatusCB=%lx errCode=%d\n", pd, pc->linkStatusCB, pc->errCode)); + if(pc->linkStatusCB) { + pc->linkStatusCB(pc->linkStatusCtx, PPPERR_CONNECT, NULL); + } + } + return st; +} + +/** + * sifaddr - Config the interface IP addresses and netmask. + * @param pd Interface unit ??? + * @param o Our IP address ??? + * @param h His IP address ??? + * @param m IP subnet mask ??? + * @param ns1 Primary DNS + * @param ns2 Secondary DNS + */ +int +sifaddr( int pd, u32_t o, u32_t h, u32_t m, u32_t ns1, u32_t ns2) +{ + PPPControl *pc = &pppControl[pd]; + int st = 1; + + if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { + st = 0; + PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); + } else { + SMEMCPY(&pc->addrs.our_ipaddr, &o, sizeof(o)); + SMEMCPY(&pc->addrs.his_ipaddr, &h, sizeof(h)); + SMEMCPY(&pc->addrs.netmask, &m, sizeof(m)); + SMEMCPY(&pc->addrs.dns1, &ns1, sizeof(ns1)); + SMEMCPY(&pc->addrs.dns2, &ns2, sizeof(ns2)); + } + return st; +} + +/** + * cifaddr - Clear the interface IP addresses, and delete routes + * through the interface if possible. + * @param pd Interface unit ??? + * @param o Our IP address ??? + * @param h IP broadcast address ??? + */ +int +cifaddr( int pd, u32_t o, u32_t h) +{ + PPPControl *pc = &pppControl[pd]; + int st = 1; + + LWIP_UNUSED_ARG(o); + LWIP_UNUSED_ARG(h); + if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { + st = 0; + PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); + } else { + IP4_ADDR(&pc->addrs.our_ipaddr, 0,0,0,0); + IP4_ADDR(&pc->addrs.his_ipaddr, 0,0,0,0); + IP4_ADDR(&pc->addrs.netmask, 255,255,255,0); + IP4_ADDR(&pc->addrs.dns1, 0,0,0,0); + IP4_ADDR(&pc->addrs.dns2, 0,0,0,0); + } + return st; +} + +/* + * sifdefaultroute - assign a default route through the address given. + */ +int +sifdefaultroute(int pd, u32_t l, u32_t g) +{ + PPPControl *pc = &pppControl[pd]; + int st = 1; + + LWIP_UNUSED_ARG(l); + LWIP_UNUSED_ARG(g); + + if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { + st = 0; + PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); + } else { + netif_set_default(&pc->netif); + } + + /* TODO: check how PPP handled the netMask, previously not set by ipSetDefault */ + + return st; +} + +/* + * cifdefaultroute - delete a default route through the address given. + */ +int +cifdefaultroute(int pd, u32_t l, u32_t g) +{ + PPPControl *pc = &pppControl[pd]; + int st = 1; + + LWIP_UNUSED_ARG(l); + LWIP_UNUSED_ARG(g); + + if (pd < 0 || pd >= NUM_PPP || !pc->openFlag) { + st = 0; + PPPDEBUG((LOG_WARNING, "sifup[%d]: bad parms\n", pd)); + } else { + netif_set_default(NULL); + } + + return st; +} + +/**********************************/ +/*** LOCAL FUNCTION DEFINITIONS ***/ +/**********************************/ + +#if PPPOS_SUPPORT +/* The main PPP process function. This implements the state machine according + * to section 4 of RFC 1661: The Point-To-Point Protocol. */ +static void +pppMain(void *arg) +{ + int pd = (int)arg; + struct pbuf *p; + PPPControl* pc; + int c; + + pc = &pppControl[pd]; + + p = pbuf_alloc(PBUF_RAW, PPP_MRU+PPP_HDRLEN, PBUF_RAM); + if (!p) { + LWIP_ASSERT("p != NULL", p); + pc->errCode = PPPERR_ALLOC; + goto out; + } + + /* + * Start the connection and handle incoming events (packet or timeout). + */ + PPPDEBUG((LOG_INFO, "pppMain: unit %d: Connecting\n", pd)); + tcpip_callback(pppStartCB, arg); + while (lcp_phase[pd] != PHASE_DEAD) { + if (pc->kill_link) { + PPPDEBUG((LOG_DEBUG, "pppMain: unit %d kill_link -> pppStopCB\n", pd)); + pc->errCode = PPPERR_USER; + /* This will leave us at PHASE_DEAD. */ + tcpip_callback(pppStopCB, arg); + pc->kill_link = 0; + } else if (pc->sig_hup) { + PPPDEBUG((LOG_DEBUG, "pppMain: unit %d sig_hup -> pppHupCB\n", pd)); + pc->sig_hup = 0; + tcpip_callback(pppHupCB, arg); + } else { + c = sio_read(pc->fd, p->payload, p->len); + if(c > 0) { + pppInProc(pd, p->payload, c); + } else { + /* nothing received, give other tasks a chance to run */ + sys_msleep(1); + } + } + } + PPPDEBUG((LOG_INFO, "pppMain: unit %d: PHASE_DEAD\n", pd)); + pppDrop(pc); /* bug fix #17726 */ + pbuf_free(p); + +out: + PPPDEBUG((LOG_DEBUG, "pppMain: unit %d: linkStatusCB=%lx errCode=%d\n", pd, pc->linkStatusCB, pc->errCode)); + if(pc->linkStatusCB) { + pc->linkStatusCB(pc->linkStatusCtx, pc->errCode ? pc->errCode : PPPERR_PROTOCOL, NULL); + } + + pc->openFlag = 0; +} +#endif /* PPPOS_SUPPORT */ + +#if PPPOE_SUPPORT + +void +pppOverEthernetInitFailed(void* arg) +{ + PPPControl* pc; + int pd = (int)arg; + + pppHupCB(arg); + pppStopCB(arg); + + pc = &pppControl[pd]; + pppoe_destroy(&pc->netif); + pc->openFlag = 0; + + if(pc->linkStatusCB) { + pc->linkStatusCB(pc->linkStatusCtx, pc->errCode ? pc->errCode : PPPERR_PROTOCOL, NULL); + } +} + +static void +pppOverEthernetLinkStatusCB(int pd, int up) +{ + if(up) { + PPPDEBUG((LOG_INFO, "pppMain: unit %d: Connecting\n", pd)); + tcpip_callback(pppStartCB, (void*)pd); + } else { + PPPControl* pc; + pc = &pppControl[pd]; + tcpip_callback(pppOverEthernetInitFailed, (void*)pd); + } +} +#endif /* PPPOE_SUPPORT */ + +struct pbuf * +pppSingleBuf(struct pbuf *p) +{ + struct pbuf *q, *b; + u_char *pl; + + if(p->tot_len == p->len) { + return p; + } + + q = pbuf_alloc(PBUF_RAW, p->tot_len, PBUF_RAM); + if(!q) { + PPPDEBUG((LOG_ERR, + "pppSingleBuf: unable to alloc new buf (%d)\n", p->tot_len)); + return p; /* live dangerously */ + } + + for(b = p, pl = q->payload; b != NULL; b = b->next) { + MEMCPY(pl, b->payload, b->len); + pl += b->len; + } + + pbuf_free(p); + + return q; +} + +struct pppInputHeader { + int unit; + u16_t proto; +}; + +/* + * Pass the processed input packet to the appropriate handler. + * This function and all handlers run in the context of the tcpip_thread + */ +static void +pppInput(void *arg) +{ + struct pbuf *nb = (struct pbuf *)arg; + u16_t protocol; + int pd; + + pd = ((struct pppInputHeader *)nb->payload)->unit; + protocol = ((struct pppInputHeader *)nb->payload)->proto; + + if(pbuf_header(nb, -(int)sizeof(struct pppInputHeader))) { + LWIP_ASSERT("pbuf_header failed\n", 0); + goto drop; + } + + LINK_STATS_INC(link.recv); + + /* + * Toss all non-LCP packets unless LCP is OPEN. + * Until we get past the authentication phase, toss all packets + * except LCP, LQR and authentication packets. + */ + if((lcp_phase[pd] <= PHASE_AUTHENTICATE) && (protocol != PPP_LCP)) { + if(!((protocol == PPP_LQR) || (protocol == PPP_PAP) || (protocol == PPP_CHAP)) || + (lcp_phase[pd] != PHASE_AUTHENTICATE)) { + PPPDEBUG((LOG_INFO, "pppInput: discarding proto 0x%04X in phase %d\n", protocol, lcp_phase[pd])); + goto drop; + } + } + + switch(protocol) { + case PPP_VJC_COMP: /* VJ compressed TCP */ +#if PPPOS_SUPPORT && VJ_SUPPORT + PPPDEBUG((LOG_INFO, "pppInput[%d]: vj_comp in pbuf len=%d\n", pd, nb->len)); + /* + * Clip off the VJ header and prepend the rebuilt TCP/IP header and + * pass the result to IP. + */ + if ((vj_uncompress_tcp(&nb, &pppControl[pd].vjComp) >= 0) && (pppControl[pd].netif.input)) { + pppControl[pd].netif.input(nb, &pppControl[pd].netif); + return; + } + /* Something's wrong so drop it. */ + PPPDEBUG((LOG_WARNING, "pppInput[%d]: Dropping VJ compressed\n", pd)); +#else /* PPPOS_SUPPORT && VJ_SUPPORT */ + /* No handler for this protocol so drop the packet. */ + PPPDEBUG((LOG_INFO, "pppInput[%d]: drop VJ Comp in %d:%s\n", pd, nb->len, nb->payload)); +#endif /* PPPOS_SUPPORT && VJ_SUPPORT */ + break; + + case PPP_VJC_UNCOMP: /* VJ uncompressed TCP */ +#if PPPOS_SUPPORT && VJ_SUPPORT + PPPDEBUG((LOG_INFO, "pppInput[%d]: vj_un in pbuf len=%d\n", pd, nb->len)); + /* + * Process the TCP/IP header for VJ header compression and then pass + * the packet to IP. + */ + if ((vj_uncompress_uncomp(nb, &pppControl[pd].vjComp) >= 0) && pppControl[pd].netif.input) { + pppControl[pd].netif.input(nb, &pppControl[pd].netif); + return; + } + /* Something's wrong so drop it. */ + PPPDEBUG((LOG_WARNING, "pppInput[%d]: Dropping VJ uncompressed\n", pd)); +#else /* PPPOS_SUPPORT && VJ_SUPPORT */ + /* No handler for this protocol so drop the packet. */ + PPPDEBUG((LOG_INFO, + "pppInput[%d]: drop VJ UnComp in %d:.*H\n", + pd, nb->len, LWIP_MIN(nb->len * 2, 40), nb->payload)); +#endif /* PPPOS_SUPPORT && VJ_SUPPORT */ + break; + + case PPP_IP: /* Internet Protocol */ + PPPDEBUG((LOG_INFO, "pppInput[%d]: ip in pbuf len=%d\n", pd, nb->len)); + if (pppControl[pd].netif.input) { + pppControl[pd].netif.input(nb, &pppControl[pd].netif); + return; + } + break; + + default: { + struct protent *protp; + int i; + + /* + * Upcall the proper protocol input routine. + */ + for (i = 0; (protp = ppp_protocols[i]) != NULL; ++i) { + if (protp->protocol == protocol && protp->enabled_flag) { + PPPDEBUG((LOG_INFO, "pppInput[%d]: %s len=%d\n", pd, protp->name, nb->len)); + nb = pppSingleBuf(nb); + (*protp->input)(pd, nb->payload, nb->len); + goto out; + } + } + + /* No handler for this protocol so reject the packet. */ + PPPDEBUG((LOG_INFO, "pppInput[%d]: rejecting unsupported proto 0x%04X len=%d\n", pd, protocol, nb->len)); + if (pbuf_header(nb, sizeof(protocol))) { + LWIP_ASSERT("pbuf_header failed\n", 0); + goto drop; + } +#if BYTE_ORDER == LITTLE_ENDIAN + protocol = htons(protocol); + SMEMCPY(nb->payload, &protocol, sizeof(protocol)); +#endif /* BYTE_ORDER == LITTLE_ENDIAN */ + lcp_sprotrej(pd, nb->payload, nb->len); + } + break; + } + +drop: + LINK_STATS_INC(link.drop); + +out: + pbuf_free(nb); + return; +} + +#if PPPOS_SUPPORT +/* + * Drop the input packet. + */ +static void +pppDrop(PPPControl *pc) +{ + if (pc->inHead != NULL) { +#if 0 + PPPDEBUG((LOG_INFO, "pppDrop: %d:%.*H\n", pc->inHead->len, min(60, pc->inHead->len * 2), pc->inHead->payload)); +#endif + PPPDEBUG((LOG_INFO, "pppDrop: pbuf len=%d\n", pc->inHead->len)); + if (pc->inTail && (pc->inTail != pc->inHead)) { + pbuf_free(pc->inTail); + } + pbuf_free(pc->inHead); + pc->inHead = NULL; + pc->inTail = NULL; + } +#if VJ_SUPPORT + vj_uncompress_err(&pc->vjComp); +#endif /* VJ_SUPPORT */ + + LINK_STATS_INC(link.drop); +} + +/** + * Process a received octet string. + */ +static void +pppInProc(int pd, u_char *s, int l) +{ + PPPControl *pc = &pppControl[pd]; + struct pbuf *nextNBuf; + u_char curChar; + + PPPDEBUG((LOG_DEBUG, "pppInProc[%d]: got %d bytes\n", pd, l)); + while (l-- > 0) { + curChar = *s++; + + /* Handle special characters. */ + if (ESCAPE_P(pc->inACCM, curChar)) { + /* Check for escape sequences. */ + /* XXX Note that this does not handle an escaped 0x5d character which + * would appear as an escape character. Since this is an ASCII ']' + * and there is no reason that I know of to escape it, I won't complicate + * the code to handle this case. GLL */ + if (curChar == PPP_ESCAPE) { + pc->inEscaped = 1; + /* Check for the flag character. */ + } else if (curChar == PPP_FLAG) { + /* If this is just an extra flag character, ignore it. */ + if (pc->inState <= PDADDRESS) { + /* ignore it */; + /* If we haven't received the packet header, drop what has come in. */ + } else if (pc->inState < PDDATA) { + PPPDEBUG((LOG_WARNING, + "pppInProc[%d]: Dropping incomplete packet %d\n", + pd, pc->inState)); + LINK_STATS_INC(link.lenerr); + pppDrop(pc); + /* If the fcs is invalid, drop the packet. */ + } else if (pc->inFCS != PPP_GOODFCS) { + PPPDEBUG((LOG_INFO, + "pppInProc[%d]: Dropping bad fcs 0x%04X proto=0x%04X\n", + pd, pc->inFCS, pc->inProtocol)); + LINK_STATS_INC(link.chkerr); + pppDrop(pc); + /* Otherwise it's a good packet so pass it on. */ + } else { + /* Trim off the checksum. */ + if(pc->inTail->len >= 2) { + pc->inTail->len -= 2; + + pc->inTail->tot_len = pc->inTail->len; + if (pc->inTail != pc->inHead) { + pbuf_cat(pc->inHead, pc->inTail); + } + } else { + pc->inTail->tot_len = pc->inTail->len; + if (pc->inTail != pc->inHead) { + pbuf_cat(pc->inHead, pc->inTail); + } + + pbuf_realloc(pc->inHead, pc->inHead->tot_len - 2); + } + + /* Dispatch the packet thereby consuming it. */ + if(tcpip_callback(pppInput, pc->inHead) != ERR_OK) { + PPPDEBUG((LOG_ERR, "pppInProc[%d]: tcpip_callback() failed, dropping packet\n", pd)); + pbuf_free(pc->inHead); + LINK_STATS_INC(link.drop); + } + pc->inHead = NULL; + pc->inTail = NULL; + } + + /* Prepare for a new packet. */ + pc->inFCS = PPP_INITFCS; + pc->inState = PDADDRESS; + pc->inEscaped = 0; + /* Other characters are usually control characters that may have + * been inserted by the physical layer so here we just drop them. */ + } else { + PPPDEBUG((LOG_WARNING, + "pppInProc[%d]: Dropping ACCM char <%d>\n", pd, curChar)); + } + /* Process other characters. */ + } else { + /* Unencode escaped characters. */ + if (pc->inEscaped) { + pc->inEscaped = 0; + curChar ^= PPP_TRANS; + } + + /* Process character relative to current state. */ + switch(pc->inState) { + case PDIDLE: /* Idle state - waiting. */ + /* Drop the character if it's not 0xff + * we would have processed a flag character above. */ + if (curChar != PPP_ALLSTATIONS) { + break; + } + + /* Fall through */ + case PDSTART: /* Process start flag. */ + /* Prepare for a new packet. */ + pc->inFCS = PPP_INITFCS; + + /* Fall through */ + case PDADDRESS: /* Process address field. */ + if (curChar == PPP_ALLSTATIONS) { + pc->inState = PDCONTROL; + break; + } + /* Else assume compressed address and control fields so + * fall through to get the protocol... */ + case PDCONTROL: /* Process control field. */ + /* If we don't get a valid control code, restart. */ + if (curChar == PPP_UI) { + pc->inState = PDPROTOCOL1; + break; + } +#if 0 + else { + PPPDEBUG((LOG_WARNING, + "pppInProc[%d]: Invalid control <%d>\n", pd, curChar)); + pc->inState = PDSTART; + } +#endif + case PDPROTOCOL1: /* Process protocol field 1. */ + /* If the lower bit is set, this is the end of the protocol + * field. */ + if (curChar & 1) { + pc->inProtocol = curChar; + pc->inState = PDDATA; + } else { + pc->inProtocol = (u_int)curChar << 8; + pc->inState = PDPROTOCOL2; + } + break; + case PDPROTOCOL2: /* Process protocol field 2. */ + pc->inProtocol |= curChar; + pc->inState = PDDATA; + break; + case PDDATA: /* Process data byte. */ + /* Make space to receive processed data. */ + if (pc->inTail == NULL || pc->inTail->len == PBUF_POOL_BUFSIZE) { + if(pc->inTail) { + pc->inTail->tot_len = pc->inTail->len; + if (pc->inTail != pc->inHead) { + pbuf_cat(pc->inHead, pc->inTail); + } + } + /* If we haven't started a packet, we need a packet header. */ + nextNBuf = pbuf_alloc(PBUF_RAW, 0, PBUF_POOL); + if (nextNBuf == NULL) { + /* No free buffers. Drop the input packet and let the + * higher layers deal with it. Continue processing + * the received pbuf chain in case a new packet starts. */ + PPPDEBUG((LOG_ERR, "pppInProc[%d]: NO FREE MBUFS!\n", pd)); + LINK_STATS_INC(link.memerr); + pppDrop(pc); + pc->inState = PDSTART; /* Wait for flag sequence. */ + break; + } + if (pc->inHead == NULL) { + struct pppInputHeader *pih = nextNBuf->payload; + + pih->unit = pd; + pih->proto = pc->inProtocol; + + nextNBuf->len += sizeof(*pih); + + pc->inHead = nextNBuf; + } + pc->inTail = nextNBuf; + } + /* Load character into buffer. */ + ((u_char*)pc->inTail->payload)[pc->inTail->len++] = curChar; + break; + } + + /* update the frame check sequence number. */ + pc->inFCS = PPP_FCS(pc->inFCS, curChar); + } + } + + avRandomize(); +} +#endif /* PPPOS_SUPPORT */ + +#if PPPOE_SUPPORT +void +pppInProcOverEthernet(int pd, struct pbuf *pb) +{ + struct pppInputHeader *pih; + u16_t inProtocol; + + if(pb->len < sizeof(inProtocol)) { + PPPDEBUG((LOG_ERR, "pppInProcOverEthernet: too small for protocol field\n")); + goto drop; + } + + inProtocol = (((u8_t *)pb->payload)[0] << 8) | ((u8_t*)pb->payload)[1]; + + /* make room for pppInputHeader - should not fail */ + if (pbuf_header(pb, sizeof(*pih) - sizeof(inProtocol)) != 0) { + PPPDEBUG((LOG_ERR, "pppInProcOverEthernet: could not allocate room for header\n")); + goto drop; + } + + pih = pb->payload; + + pih->unit = pd; + pih->proto = inProtocol; + + /* Dispatch the packet thereby consuming it. */ + if(tcpip_callback(pppInput, pb) != ERR_OK) { + PPPDEBUG((LOG_ERR, "pppInProcOverEthernet[%d]: tcpip_callback() failed, dropping packet\n", pd)); + goto drop; + } + + return; + +drop: + LINK_STATS_INC(link.drop); + pbuf_free(pb); + return; +} +#endif /* PPPOE_SUPPORT */ + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/ppp.h b/bertos/net/lwip/src/netif/ppp/ppp.h new file mode 100644 index 0000000..ebc733b --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/ppp.h @@ -0,0 +1,465 @@ +/***************************************************************************** +* ppp.h - Network Point to Point Protocol header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1997 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 97-11-05 Guy Lancaster , Global Election Systems Inc. +* Original derived from BSD codes. +*****************************************************************************/ + +#ifndef PPP_H +#define PPP_H + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "lwip/def.h" +#include "lwip/sio.h" +#include "lwip/api.h" +#include "lwip/sockets.h" +#include "lwip/stats.h" +#include "lwip/mem.h" +#include "lwip/tcpip.h" +#include "lwip/netif.h" + +/* + * pppd.h - PPP daemon global declarations. + * + * Copyright (c) 1989 Carnegie Mellon University. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by Carnegie Mellon University. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + */ +/* + * ppp_defs.h - PPP definitions. + * + * Copyright (c) 1994 The Australian National University. + * All rights reserved. + * + * Permission to use, copy, modify, and distribute this software and its + * documentation is hereby granted, provided that the above copyright + * notice appears in all copies. This software is provided without any + * warranty, express or implied. The Australian National University + * makes no representations about the suitability of this software for + * any purpose. + * + * IN NO EVENT SHALL THE AUSTRALIAN NATIONAL UNIVERSITY BE LIABLE TO ANY + * PARTY FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL, OR CONSEQUENTIAL DAMAGES + * ARISING OUT OF THE USE OF THIS SOFTWARE AND ITS DOCUMENTATION, EVEN IF + * THE AUSTRALIAN NATIONAL UNIVERSITY HAVE BEEN ADVISED OF THE POSSIBILITY + * OF SUCH DAMAGE. + * + * THE AUSTRALIAN NATIONAL UNIVERSITY SPECIFICALLY DISCLAIMS ANY WARRANTIES, + * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. THE SOFTWARE PROVIDED HEREUNDER IS + * ON AN "AS IS" BASIS, AND THE AUSTRALIAN NATIONAL UNIVERSITY HAS NO + * OBLIGATION TO PROVIDE MAINTENANCE, SUPPORT, UPDATES, ENHANCEMENTS, + * OR MODIFICATIONS. + */ + +#define TIMEOUT(f, a, t) sys_untimeout((f), (a)), sys_timeout((t)*1000, (f), (a)) +#define UNTIMEOUT(f, a) sys_untimeout((f), (a)) + + +#ifndef __u_char_defined + +/* Type definitions for BSD code. */ +typedef unsigned long u_long; +typedef unsigned int u_int; +typedef unsigned short u_short; +typedef unsigned char u_char; + +#endif + +/* + * Constants and structures defined by the internet system, + * Per RFC 790, September 1981, and numerous additions. + */ + +/* + * The basic PPP frame. + */ +#define PPP_HDRLEN 4 /* octets for standard ppp header */ +#define PPP_FCSLEN 2 /* octets for FCS */ + + +/* + * Significant octet values. + */ +#define PPP_ALLSTATIONS 0xff /* All-Stations broadcast address */ +#define PPP_UI 0x03 /* Unnumbered Information */ +#define PPP_FLAG 0x7e /* Flag Sequence */ +#define PPP_ESCAPE 0x7d /* Asynchronous Control Escape */ +#define PPP_TRANS 0x20 /* Asynchronous transparency modifier */ + +/* + * Protocol field values. + */ +#define PPP_IP 0x21 /* Internet Protocol */ +#define PPP_AT 0x29 /* AppleTalk Protocol */ +#define PPP_VJC_COMP 0x2d /* VJ compressed TCP */ +#define PPP_VJC_UNCOMP 0x2f /* VJ uncompressed TCP */ +#define PPP_COMP 0xfd /* compressed packet */ +#define PPP_IPCP 0x8021 /* IP Control Protocol */ +#define PPP_ATCP 0x8029 /* AppleTalk Control Protocol */ +#define PPP_CCP 0x80fd /* Compression Control Protocol */ +#define PPP_LCP 0xc021 /* Link Control Protocol */ +#define PPP_PAP 0xc023 /* Password Authentication Protocol */ +#define PPP_LQR 0xc025 /* Link Quality Report protocol */ +#define PPP_CHAP 0xc223 /* Cryptographic Handshake Auth. Protocol */ +#define PPP_CBCP 0xc029 /* Callback Control Protocol */ + +/* + * Values for FCS calculations. + */ +#define PPP_INITFCS 0xffff /* Initial FCS value */ +#define PPP_GOODFCS 0xf0b8 /* Good final FCS value */ +#define PPP_FCS(fcs, c) (((fcs) >> 8) ^ fcstab[((fcs) ^ (c)) & 0xff]) + +/* + * Extended asyncmap - allows any character to be escaped. + */ +typedef u_char ext_accm[32]; + +/* + * What to do with network protocol (NP) packets. + */ +enum NPmode { + NPMODE_PASS, /* pass the packet through */ + NPMODE_DROP, /* silently drop the packet */ + NPMODE_ERROR, /* return an error */ + NPMODE_QUEUE /* save it up for later. */ +}; + +/* + * Inline versions of get/put char/short/long. + * Pointer is advanced; we assume that both arguments + * are lvalues and will already be in registers. + * cp MUST be u_char *. + */ +#define GETCHAR(c, cp) { \ + (c) = *(cp)++; \ +} +#define PUTCHAR(c, cp) { \ + *(cp)++ = (u_char) (c); \ +} + + +#define GETSHORT(s, cp) { \ + (s) = *(cp); (cp)++; (s) <<= 8; \ + (s) |= *(cp); (cp)++; \ +} +#define PUTSHORT(s, cp) { \ + *(cp)++ = (u_char) ((s) >> 8); \ + *(cp)++ = (u_char) (s & 0xff); \ +} + +#define GETLONG(l, cp) { \ + (l) = *(cp); (cp)++; (l) <<= 8; \ + (l) |= *(cp); (cp)++; (l) <<= 8; \ + (l) |= *(cp); (cp)++; (l) <<= 8; \ + (l) |= *(cp); (cp)++; \ +} +#define PUTLONG(l, cp) { \ + *(cp)++ = (u_char) ((l) >> 24); \ + *(cp)++ = (u_char) ((l) >> 16); \ + *(cp)++ = (u_char) ((l) >> 8); \ + *(cp)++ = (u_char) (l); \ +} + + +#define INCPTR(n, cp) ((cp) += (n)) +#define DECPTR(n, cp) ((cp) -= (n)) + +#define BCMP(s0, s1, l) memcmp((u_char *)(s0), (u_char *)(s1), (l)) +#define BCOPY(s, d, l) MEMCPY((d), (s), (l)) +#define BZERO(s, n) memset(s, 0, n) + +#if PPP_DEBUG +#define PRINTMSG(m, l) { m[l] = '\0'; ppp_trace(LOG_INFO, "Remote message: %s\n", m); } +#else /* PPP_DEBUG */ +#define PRINTMSG(m, l) +#endif /* PPP_DEBUG */ + +/* + * MAKEHEADER - Add PPP Header fields to a packet. + */ +#define MAKEHEADER(p, t) { \ + PUTCHAR(PPP_ALLSTATIONS, p); \ + PUTCHAR(PPP_UI, p); \ + PUTSHORT(t, p); } + +/************************* +*** PUBLIC DEFINITIONS *** +*************************/ + +/* Error codes. */ +#define PPPERR_NONE 0 /* No error. */ +#define PPPERR_PARAM -1 /* Invalid parameter. */ +#define PPPERR_OPEN -2 /* Unable to open PPP session. */ +#define PPPERR_DEVICE -3 /* Invalid I/O device for PPP. */ +#define PPPERR_ALLOC -4 /* Unable to allocate resources. */ +#define PPPERR_USER -5 /* User interrupt. */ +#define PPPERR_CONNECT -6 /* Connection lost. */ +#define PPPERR_AUTHFAIL -7 /* Failed authentication challenge. */ +#define PPPERR_PROTOCOL -8 /* Failed to meet protocol. */ + +/* + * PPP IOCTL commands. + */ +/* + * Get the up status - 0 for down, non-zero for up. The argument must + * point to an int. + */ +#define PPPCTLG_UPSTATUS 100 /* Get the up status - 0 down else up */ +#define PPPCTLS_ERRCODE 101 /* Set the error code */ +#define PPPCTLG_ERRCODE 102 /* Get the error code */ +#define PPPCTLG_FD 103 /* Get the fd associated with the ppp */ + +/************************ +*** PUBLIC DATA TYPES *** +************************/ + +/* + * The following struct gives the addresses of procedures to call + * for a particular protocol. + */ +struct protent { + u_short protocol; /* PPP protocol number */ + /* Initialization procedure */ + void (*init) (int unit); + /* Process a received packet */ + void (*input) (int unit, u_char *pkt, int len); + /* Process a received protocol-reject */ + void (*protrej) (int unit); + /* Lower layer has come up */ + void (*lowerup) (int unit); + /* Lower layer has gone down */ + void (*lowerdown) (int unit); + /* Open the protocol */ + void (*open) (int unit); + /* Close the protocol */ + void (*close) (int unit, char *reason); +#if 0 + /* Print a packet in readable form */ + int (*printpkt) (u_char *pkt, int len, + void (*printer) (void *, char *, ...), + void *arg); + /* Process a received data packet */ + void (*datainput) (int unit, u_char *pkt, int len); +#endif + int enabled_flag; /* 0 iff protocol is disabled */ + char *name; /* Text name of protocol */ +#if 0 + /* Check requested options, assign defaults */ + void (*check_options) (u_long); + /* Configure interface for demand-dial */ + int (*demand_conf) (int unit); + /* Say whether to bring up link for this pkt */ + int (*active_pkt) (u_char *pkt, int len); +#endif +}; + +/* + * The following structure records the time in seconds since + * the last NP packet was sent or received. + */ +struct ppp_idle { + u_short xmit_idle; /* seconds since last NP packet sent */ + u_short recv_idle; /* seconds since last NP packet received */ +}; + +struct ppp_settings { + + u_int disable_defaultip : 1; /* Don't use hostname for default IP addrs */ + u_int auth_required : 1; /* Peer is required to authenticate */ + u_int explicit_remote : 1; /* remote_name specified with remotename opt */ + u_int refuse_pap : 1; /* Don't wanna auth. ourselves with PAP */ + u_int refuse_chap : 1; /* Don't wanna auth. ourselves with CHAP */ + u_int usehostname : 1; /* Use hostname for our_name */ + u_int usepeerdns : 1; /* Ask peer for DNS adds */ + + u_short idle_time_limit; /* Shut down link if idle for this long */ + int maxconnect; /* Maximum connect time (seconds) */ + + char user [MAXNAMELEN + 1]; /* Username for PAP */ + char passwd [MAXSECRETLEN + 1]; /* Password for PAP, secret for CHAP */ + char our_name [MAXNAMELEN + 1]; /* Our name for authentication purposes */ + char remote_name[MAXNAMELEN + 1]; /* Peer's name for authentication */ +}; + +struct ppp_addrs { + struct ip_addr our_ipaddr, his_ipaddr, netmask, dns1, dns2; +}; + +/***************************** +*** PUBLIC DATA STRUCTURES *** +*****************************/ + +/* Buffers for outgoing packets. */ +extern u_char outpacket_buf[NUM_PPP][PPP_MRU+PPP_HDRLEN]; + +extern struct ppp_settings ppp_settings; + +extern struct protent *ppp_protocols[]; /* Table of pointers to supported protocols */ + + +/*********************** +*** PUBLIC FUNCTIONS *** +***********************/ + +/* Initialize the PPP subsystem. */ +void pppInit(void); + +/* Warning: Using PPPAUTHTYPE_ANY might have security consequences. + * RFC 1994 says: + * + * In practice, within or associated with each PPP server, there is a + * database which associates "user" names with authentication + * information ("secrets"). It is not anticipated that a particular + * named user would be authenticated by multiple methods. This would + * make the user vulnerable to attacks which negotiate the least secure + * method from among a set (such as PAP rather than CHAP). If the same + * secret was used, PAP would reveal the secret to be used later with + * CHAP. + * + * Instead, for each user name there should be an indication of exactly + * one method used to authenticate that user name. If a user needs to + * make use of different authentication methods under different + * circumstances, then distinct user names SHOULD be employed, each of + * which identifies exactly one authentication method. + * + */ +enum pppAuthType { + PPPAUTHTYPE_NONE, + PPPAUTHTYPE_ANY, + PPPAUTHTYPE_PAP, + PPPAUTHTYPE_CHAP +}; + +void pppSetAuth(enum pppAuthType authType, const char *user, const char *passwd); + +/* + * Open a new PPP connection using the given serial I/O device. + * This initializes the PPP control block but does not + * attempt to negotiate the LCP session. + * Return a new PPP connection descriptor on success or + * an error code (negative) on failure. + */ +int pppOverSerialOpen(sio_fd_t fd, void (*linkStatusCB)(void *ctx, int errCode, void *arg), void *linkStatusCtx); + +/* + * Open a new PPP Over Ethernet (PPPOE) connection. + */ +int pppOverEthernetOpen(struct netif *ethif, const char *service_name, const char *concentrator_name, void (*linkStatusCB)(void *ctx, int errCode, void *arg), void *linkStatusCtx); + +/* for source code compatibility */ +#define pppOpen(fd,cb,ls) pppOverSerialOpen(fd,cb,ls) + +/* + * Close a PPP connection and release the descriptor. + * Any outstanding packets in the queues are dropped. + * Return 0 on success, an error code on failure. + */ +int pppClose(int pd); + +/* + * Indicate to the PPP process that the line has disconnected. + */ +void pppSigHUP(int pd); + +/* + * Get and set parameters for the given connection. + * Return 0 on success, an error code on failure. + */ +int pppIOCtl(int pd, int cmd, void *arg); + +/* + * Return the Maximum Transmission Unit for the given PPP connection. + */ +u_int pppMTU(int pd); + +/* + * Write n characters to a ppp link. + * RETURN: >= 0 Number of characters written, -1 Failed to write to device. + */ +int pppWrite(int pd, const u_char *s, int n); + +void pppInProcOverEthernet(int pd, struct pbuf *pb); + +struct pbuf *pppSingleBuf(struct pbuf *p); + +void pppLinkTerminated(int pd); + +void pppLinkDown(int pd); + +void pppMainWakeup(int pd); + +/* Configure i/f transmit parameters */ +void ppp_send_config (int, int, u32_t, int, int); +/* Set extended transmit ACCM */ +void ppp_set_xaccm (int, ext_accm *); +/* Configure i/f receive parameters */ +void ppp_recv_config (int, int, u32_t, int, int); +/* Find out how long link has been idle */ +int get_idle_time (int, struct ppp_idle *); + +/* Configure VJ TCP header compression */ +int sifvjcomp (int, int, int, int); +/* Configure i/f down (for IP) */ +int sifup (int); +/* Set mode for handling packets for proto */ +int sifnpmode (int u, int proto, enum NPmode mode); +/* Configure i/f down (for IP) */ +int sifdown (int); +/* Configure IP addresses for i/f */ +int sifaddr (int, u32_t, u32_t, u32_t, u32_t, u32_t); +/* Reset i/f IP addresses */ +int cifaddr (int, u32_t, u32_t); +/* Create default route through i/f */ +int sifdefaultroute (int, u32_t, u32_t); +/* Delete default route through i/f */ +int cifdefaultroute (int, u32_t, u32_t); + +/* Get appropriate netmask for address */ +u32_t GetMask (u32_t); + +#endif /* PPP_SUPPORT */ + +#endif /* PPP_H */ diff --git a/bertos/net/lwip/src/netif/ppp/ppp_oe.c b/bertos/net/lwip/src/netif/ppp/ppp_oe.c new file mode 100644 index 0000000..5a8a45c --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/ppp_oe.c @@ -0,0 +1,1227 @@ +/***************************************************************************** +* ppp_oe.c - PPP Over Ethernet implementation for lwIP. +* +* Copyright (c) 2006 by Marc Boucher, Services Informatiques (MBSI) inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 06-01-01 Marc Boucher +* Ported to lwIP. +*****************************************************************************/ + + + +/* based on NetBSD: if_pppoe.c,v 1.64 2006/01/31 23:50:15 martin Exp */ + +/*- + * Copyright (c) 2002 The NetBSD Foundation, Inc. + * All rights reserved. + * + * This code is derived from software contributed to The NetBSD Foundation + * by Martin Husemann . + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. All advertising materials mentioning features or use of this software + * must display the following acknowledgement: + * This product includes software developed by the NetBSD + * Foundation, Inc. and its contributors. + * 4. Neither the name of The NetBSD Foundation nor the names of its + * contributors may be used to endorse or promote products derived + * from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS + * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED + * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS + * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include "lwip/opt.h" + +#if PPPOE_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "lwip/sys.h" + +#include "netif/ppp_oe.h" +#include "netif/etharp.h" + +#include +#include + +/** @todo Replace this part with a simple list like other lwIP lists */ +#ifndef _SYS_QUEUE_H_ +#define _SYS_QUEUE_H_ + +/* + * A list is headed by a single forward pointer (or an array of forward + * pointers for a hash table header). The elements are doubly linked + * so that an arbitrary element can be removed without a need to + * traverse the list. New elements can be added to the list before + * or after an existing element or at the head of the list. A list + * may only be traversed in the forward direction. + * + * For details on the use of these macros, see the queue(3) manual page. + */ + +/* + * List declarations. + */ +#define LIST_HEAD(name, type) \ +struct name { \ + struct type *lh_first; /* first element */ \ +} + +#define LIST_HEAD_INITIALIZER(head) \ + { NULL } + +#define LIST_ENTRY(type) \ +struct { \ + struct type *le_next; /* next element */ \ + struct type **le_prev; /* address of previous next element */ \ +} + +/* + * List functions. + */ + +#define LIST_EMPTY(head) ((head)->lh_first == NULL) + +#define LIST_FIRST(head) ((head)->lh_first) + +#define LIST_FOREACH(var, head, field) \ + for ((var) = LIST_FIRST((head)); \ + (var); \ + (var) = LIST_NEXT((var), field)) + +#define LIST_INIT(head) do { \ + LIST_FIRST((head)) = NULL; \ +} while (0) + +#define LIST_INSERT_AFTER(listelm, elm, field) do { \ + if ((LIST_NEXT((elm), field) = LIST_NEXT((listelm), field)) != NULL) \ + LIST_NEXT((listelm), field)->field.le_prev = \ + &LIST_NEXT((elm), field); \ + LIST_NEXT((listelm), field) = (elm); \ + (elm)->field.le_prev = &LIST_NEXT((listelm), field); \ +} while (0) + +#define LIST_INSERT_BEFORE(listelm, elm, field) do { \ + (elm)->field.le_prev = (listelm)->field.le_prev; \ + LIST_NEXT((elm), field) = (listelm); \ + *(listelm)->field.le_prev = (elm); \ + (listelm)->field.le_prev = &LIST_NEXT((elm), field); \ +} while (0) + +#define LIST_INSERT_HEAD(head, elm, field) do { \ + if ((LIST_NEXT((elm), field) = LIST_FIRST((head))) != NULL) \ + LIST_FIRST((head))->field.le_prev = &LIST_NEXT((elm), field); \ + LIST_FIRST((head)) = (elm); \ + (elm)->field.le_prev = &LIST_FIRST((head)); \ +} while (0) + +#define LIST_NEXT(elm, field) ((elm)->field.le_next) + +#define LIST_REMOVE(elm, field) do { \ + if (LIST_NEXT((elm), field) != NULL) \ + LIST_NEXT((elm), field)->field.le_prev = \ + (elm)->field.le_prev; \ + *(elm)->field.le_prev = LIST_NEXT((elm), field); \ +} while (0) + +#endif /* !_SYS_QUEUE_H_ */ + + +/* Add a 16 bit unsigned value to a buffer pointed to by PTR */ +#define PPPOE_ADD_16(PTR, VAL) \ + *(PTR)++ = (VAL) / 256; \ + *(PTR)++ = (VAL) % 256 + +/* Add a complete PPPoE header to the buffer pointed to by PTR */ +#define PPPOE_ADD_HEADER(PTR, CODE, SESS, LEN) \ + *(PTR)++ = PPPOE_VERTYPE; \ + *(PTR)++ = (CODE); \ + PPPOE_ADD_16(PTR, SESS); \ + PPPOE_ADD_16(PTR, LEN) + +#define PPPOE_DISC_TIMEOUT (5*1000) /* base for quick timeout calculation */ +#define PPPOE_SLOW_RETRY (60*1000) /* persistent retry interval */ +#define PPPOE_DISC_MAXPADI 4 /* retry PADI four times (quickly) */ +#define PPPOE_DISC_MAXPADR 2 /* retry PADR twice */ + +#ifdef PPPOE_SERVER +/* from if_spppsubr.c */ +#define IFF_PASSIVE IFF_LINK0 /* wait passively for connection */ +#endif + +struct pppoe_softc { + LIST_ENTRY(pppoe_softc) sc_list; + struct netif *sc_ethif; /* ethernet interface we are using */ + int sc_pd; /* ppp unit number */ + void (*sc_linkStatusCB)(int pd, int up); + + int sc_state; /* discovery phase or session connected */ + struct eth_addr sc_dest; /* hardware address of concentrator */ + u16_t sc_session; /* PPPoE session id */ + + char *sc_service_name; /* if != NULL: requested name of service */ + char *sc_concentrator_name; /* if != NULL: requested concentrator id */ + u8_t *sc_ac_cookie; /* content of AC cookie we must echo back */ + size_t sc_ac_cookie_len; /* length of cookie data */ +#ifdef PPPOE_SERVER + u8_t *sc_hunique; /* content of host unique we must echo back */ + size_t sc_hunique_len; /* length of host unique */ +#endif + int sc_padi_retried; /* number of PADI retries already done */ + int sc_padr_retried; /* number of PADR retries already done */ +}; + +/* input routines */ +static void pppoe_dispatch_disc_pkt(struct netif *, struct pbuf *); + +/* management routines */ +static int pppoe_do_disconnect(struct pppoe_softc *); +static void pppoe_abort_connect(struct pppoe_softc *); +static void pppoe_clear_softc(struct pppoe_softc *, const char *); + +/* internal timeout handling */ +static void pppoe_timeout(void *); + +/* sending actual protocol controll packets */ +static err_t pppoe_send_padi(struct pppoe_softc *); +static err_t pppoe_send_padr(struct pppoe_softc *); +#ifdef PPPOE_SERVER +static err_t pppoe_send_pado(struct pppoe_softc *); +static err_t pppoe_send_pads(struct pppoe_softc *); +#endif +static err_t pppoe_send_padt(struct netif *, u_int, const u8_t *); + +/* internal helper functions */ +static struct pppoe_softc * pppoe_find_softc_by_session(u_int, struct netif *); +static struct pppoe_softc * pppoe_find_softc_by_hunique(u8_t *, size_t, struct netif *); + +static LIST_HEAD(pppoe_softc_head, pppoe_softc) pppoe_softc_list; + +int pppoe_hdrlen; + +void +pppoe_init(void) +{ + pppoe_hdrlen = sizeof(struct eth_hdr) + PPPOE_HEADERLEN; + LIST_INIT(&pppoe_softc_list); +} + +err_t +pppoe_create(struct netif *ethif, int pd, void (*linkStatusCB)(int pd, int up), struct pppoe_softc **scptr) +{ + struct pppoe_softc *sc; + + sc = mem_malloc(sizeof(struct pppoe_softc)); + if(!sc) { + *scptr = NULL; + return ERR_MEM; + } + memset(sc, 0, sizeof(struct pppoe_softc)); + + /* changed to real address later */ + MEMCPY(&sc->sc_dest, ethbroadcast.addr, sizeof(sc->sc_dest)); + + sc->sc_pd = pd; + sc->sc_linkStatusCB = linkStatusCB; + sc->sc_ethif = ethif; + + LIST_INSERT_HEAD(&pppoe_softc_list, sc, sc_list); + + *scptr = sc; + + return ERR_OK; +} + +err_t +pppoe_destroy(struct netif *ifp) +{ + struct pppoe_softc * sc; + + LIST_FOREACH(sc, &pppoe_softc_list, sc_list) { + if (sc->sc_ethif == ifp) { + break; + } + } + + if(!(sc && (sc->sc_ethif == ifp))) { + return ERR_IF; + } + + tcpip_untimeout(pppoe_timeout, sc); + LIST_REMOVE(sc, sc_list); + + if (sc->sc_concentrator_name) { + mem_free(sc->sc_concentrator_name); + } + if (sc->sc_service_name) { + mem_free(sc->sc_service_name); + } + if (sc->sc_ac_cookie) { + mem_free(sc->sc_ac_cookie); + } + mem_free(sc); + + return ERR_OK; +} + +/* + * Find the interface handling the specified session. + * Note: O(number of sessions open), this is a client-side only, mean + * and lean implementation, so number of open sessions typically should + * be 1. + */ +static struct pppoe_softc * +pppoe_find_softc_by_session(u_int session, struct netif *rcvif) +{ + struct pppoe_softc *sc; + + if (session == 0) { + return NULL; + } + + LIST_FOREACH(sc, &pppoe_softc_list, sc_list) { + if (sc->sc_state == PPPOE_STATE_SESSION + && sc->sc_session == session) { + if (sc->sc_ethif == rcvif) { + return sc; + } else { + return NULL; + } + } + } + return NULL; +} + +/* Check host unique token passed and return appropriate softc pointer, + * or NULL if token is bogus. */ +static struct pppoe_softc * +pppoe_find_softc_by_hunique(u8_t *token, size_t len, struct netif *rcvif) +{ + struct pppoe_softc *sc, *t; + + if (LIST_EMPTY(&pppoe_softc_list)) { + return NULL; + } + + if (len != sizeof sc) { + return NULL; + } + MEMCPY(&t, token, len); + + LIST_FOREACH(sc, &pppoe_softc_list, sc_list) { + if (sc == t) { + break; + } + } + + if (sc == NULL) { + PPPDEBUG((LOG_DEBUG, "pppoe: alien host unique tag, no session found\n")); + return NULL; + } + + /* should be safe to access *sc now */ + if (sc->sc_state < PPPOE_STATE_PADI_SENT || sc->sc_state >= PPPOE_STATE_SESSION) { + printf("%c%c%"U16_F": host unique tag found, but it belongs to a connection in state %d\n", + sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, sc->sc_state); + return NULL; + } + if (sc->sc_ethif != rcvif) { + printf("%c%c%"U16_F": wrong interface, not accepting host unique\n", + sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num); + return NULL; + } + return sc; +} + +static void +pppoe_linkstatus_up(void *arg) +{ + struct pppoe_softc *sc = (struct pppoe_softc*)arg; + + sc->sc_linkStatusCB(sc->sc_pd, 1); +} + +/* analyze and handle a single received packet while not in session state */ +static void +pppoe_dispatch_disc_pkt(struct netif *netif, struct pbuf *pb) +{ + u16_t tag, len; + u16_t session, plen; + struct pppoe_softc *sc; + const char *err_msg; + char devname[6]; + char *error; + u8_t *ac_cookie; + size_t ac_cookie_len; +#ifdef PPPOE_SERVER + u8_t *hunique; + size_t hunique_len; +#endif + struct pppoehdr *ph; + struct pppoetag pt; + int off, err, errortag; + struct eth_hdr *ethhdr; + + pb = pppSingleBuf(pb); + + strcpy(devname, "pppoe"); /* as long as we don't know which instance */ + err_msg = NULL; + errortag = 0; + if (pb->len < sizeof(*ethhdr)) { + goto done; + } + ethhdr = (struct eth_hdr *)pb->payload; + off = sizeof(*ethhdr); + + ac_cookie = NULL; + ac_cookie_len = 0; +#ifdef PPPOE_SERVER + hunique = NULL; + hunique_len = 0; +#endif + session = 0; + if (pb->len - off < PPPOE_HEADERLEN) { + printf("pppoe: packet too short: %d\n", pb->len); + goto done; + } + + ph = (struct pppoehdr *) (ethhdr + 1); + if (ph->vertype != PPPOE_VERTYPE) { + printf("pppoe: unknown version/type packet: 0x%x\n", ph->vertype); + goto done; + } + session = ntohs(ph->session); + plen = ntohs(ph->plen); + off += sizeof(*ph); + + if (plen + off > pb->len) { + printf("pppoe: packet content does not fit: data available = %d, packet size = %u\n", + pb->len - off, plen); + goto done; + } + if(pb->tot_len == pb->len) { + pb->tot_len = pb->len = off + plen; /* ignore trailing garbage */ + } + tag = 0; + len = 0; + sc = NULL; + while (off + sizeof(pt) <= pb->len) { + MEMCPY(&pt, (u8_t*)pb->payload + off, sizeof(pt)); + tag = ntohs(pt.tag); + len = ntohs(pt.len); + if (off + sizeof(pt) + len > pb->len) { + printf("pppoe: tag 0x%x len 0x%x is too long\n", tag, len); + goto done; + } + switch (tag) { + case PPPOE_TAG_EOL: + goto breakbreak; + case PPPOE_TAG_SNAME: + break; /* ignored */ + case PPPOE_TAG_ACNAME: + break; /* ignored */ + case PPPOE_TAG_HUNIQUE: + if (sc != NULL) { + break; + } +#ifdef PPPOE_SERVER + hunique = (u8_t*)pb->payload + off + sizeof(pt); + hunique_len = len; +#endif + sc = pppoe_find_softc_by_hunique((u8_t*)pb->payload + off + sizeof(pt), len, netif); + if (sc != NULL) { + snprintf(devname, sizeof(devname), "%c%c%"U16_F, sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num); + } + break; + case PPPOE_TAG_ACCOOKIE: + if (ac_cookie == NULL) { + ac_cookie = (u8_t*)pb->payload + off + sizeof(pt); + ac_cookie_len = len; + } + break; + case PPPOE_TAG_SNAME_ERR: + err_msg = "SERVICE NAME ERROR"; + errortag = 1; + break; + case PPPOE_TAG_ACSYS_ERR: + err_msg = "AC SYSTEM ERROR"; + errortag = 1; + break; + case PPPOE_TAG_GENERIC_ERR: + err_msg = "GENERIC ERROR"; + errortag = 1; + break; + } + if (err_msg) { + error = NULL; + if (errortag && len) { + error = mem_malloc(len+1); + if (error) { + strncpy(error, (char*)pb->payload + off + sizeof(pt), len); + error[len-1] = '\0'; + } + } + if (error) { + printf("%s: %s: %s\n", devname, err_msg, error); + mem_free(error); + } else { + printf("%s: %s\n", devname, err_msg); + } + if (errortag) { + goto done; + } + } + off += sizeof(pt) + len; + } + +breakbreak:; + switch (ph->code) { + case PPPOE_CODE_PADI: +#ifdef PPPOE_SERVER + /* + * got service name, concentrator name, and/or host unique. + * ignore if we have no interfaces with IFF_PASSIVE|IFF_UP. + */ + if (LIST_EMPTY(&pppoe_softc_list)) { + goto done; + } + LIST_FOREACH(sc, &pppoe_softc_list, sc_list) { + if (!(sc->sc_sppp.pp_if.if_flags & IFF_UP)) { + continue; + } + if (!(sc->sc_sppp.pp_if.if_flags & IFF_PASSIVE)) { + continue; + } + if (sc->sc_state == PPPOE_STATE_INITIAL) { + break; + } + } + if (sc == NULL) { + /* printf("pppoe: free passive interface is not found\n"); */ + goto done; + } + if (hunique) { + if (sc->sc_hunique) { + mem_free(sc->sc_hunique); + } + sc->sc_hunique = mem_malloc(hunique_len); + if (sc->sc_hunique == NULL) { + goto done; + } + sc->sc_hunique_len = hunique_len; + MEMCPY(sc->sc_hunique, hunique, hunique_len); + } + MEMCPY(&sc->sc_dest, eh->ether_shost, sizeof sc->sc_dest); + sc->sc_state = PPPOE_STATE_PADO_SENT; + pppoe_send_pado(sc); + break; + #endif /* PPPOE_SERVER */ + case PPPOE_CODE_PADR: + #ifdef PPPOE_SERVER + /* + * get sc from ac_cookie if IFF_PASSIVE + */ + if (ac_cookie == NULL) { + /* be quiet if there is not a single pppoe instance */ + printf("pppoe: received PADR but not includes ac_cookie\n"); + goto done; + } + sc = pppoe_find_softc_by_hunique(ac_cookie, ac_cookie_len, netif); + if (sc == NULL) { + /* be quiet if there is not a single pppoe instance */ + if (!LIST_EMPTY(&pppoe_softc_list)) { + printf("pppoe: received PADR but could not find request for it\n"); + } + goto done; + } + if (sc->sc_state != PPPOE_STATE_PADO_SENT) { + printf("%c%c%"U16_F": received unexpected PADR\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num); + goto done; + } + if (hunique) { + if (sc->sc_hunique) { + mem_free(sc->sc_hunique); + } + sc->sc_hunique = mem_malloc(hunique_len); + if (sc->sc_hunique == NULL) { + goto done; + } + sc->sc_hunique_len = hunique_len; + MEMCPY(sc->sc_hunique, hunique, hunique_len); + } + pppoe_send_pads(sc); + sc->sc_state = PPPOE_STATE_SESSION; + tcpip_timeout (100, pppoe_linkstatus_up, sc); /* notify upper layers */ + break; + #else + /* ignore, we are no access concentrator */ + goto done; + #endif /* PPPOE_SERVER */ + case PPPOE_CODE_PADO: + if (sc == NULL) { + /* be quiet if there is not a single pppoe instance */ + if (!LIST_EMPTY(&pppoe_softc_list)) { + printf("pppoe: received PADO but could not find request for it\n"); + } + goto done; + } + if (sc->sc_state != PPPOE_STATE_PADI_SENT) { + printf("%c%c%"U16_F": received unexpected PADO\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num); + goto done; + } + if (ac_cookie) { + if (sc->sc_ac_cookie) { + mem_free(sc->sc_ac_cookie); + } + sc->sc_ac_cookie = mem_malloc(ac_cookie_len); + if (sc->sc_ac_cookie == NULL) { + goto done; + } + sc->sc_ac_cookie_len = ac_cookie_len; + MEMCPY(sc->sc_ac_cookie, ac_cookie, ac_cookie_len); + } + MEMCPY(&sc->sc_dest, ethhdr->src.addr, sizeof(sc->sc_dest.addr)); + tcpip_untimeout(pppoe_timeout, sc); + sc->sc_padr_retried = 0; + sc->sc_state = PPPOE_STATE_PADR_SENT; + if ((err = pppoe_send_padr(sc)) != 0) { + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F": failed to send PADR, error=%d\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, err)); + } + tcpip_timeout(PPPOE_DISC_TIMEOUT * (1 + sc->sc_padr_retried), pppoe_timeout, sc); + break; + case PPPOE_CODE_PADS: + if (sc == NULL) { + goto done; + } + sc->sc_session = session; + tcpip_untimeout(pppoe_timeout, sc); + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F": session 0x%x connected\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, session)); + sc->sc_state = PPPOE_STATE_SESSION; + tcpip_timeout (100, pppoe_linkstatus_up, sc); /* notify upper layers */ + break; + case PPPOE_CODE_PADT: + if (sc == NULL) { + goto done; + } + pppoe_clear_softc(sc, "received PADT"); + break; + default: + if(sc) { + printf("%c%c%"U16_F": unknown code (0x%04x) session = 0x%04x\n", + sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, + ph->code, session); + } else { + printf("pppoe: unknown code (0x%04x) session = 0x%04x\n", ph->code, session); + } + break; + } + +done: + pbuf_free(pb); + return; +} + +void +pppoe_disc_input(struct netif *netif, struct pbuf *p) +{ + /* avoid error messages if there is not a single pppoe instance */ + if (!LIST_EMPTY(&pppoe_softc_list)) { + pppoe_dispatch_disc_pkt(netif, p); + } else { + pbuf_free(p); + } +} + +void +pppoe_data_input(struct netif *netif, struct pbuf *pb) +{ + u16_t session, plen; + struct pppoe_softc *sc; + struct pppoehdr *ph; +#ifdef PPPOE_TERM_UNKNOWN_SESSIONS + u8_t shost[ETHER_ADDR_LEN]; +#endif + +#ifdef PPPOE_TERM_UNKNOWN_SESSIONS + MEMCPY(shost, ((struct eth_hdr *)pb->payload)->src.addr, sizeof(shost)); +#endif + if (pbuf_header(pb, -(int)sizeof(struct eth_hdr)) != 0) { + /* bail out */ + PPPDEBUG((LOG_ERR, "pppoe_data_input: pbuf_header failed\n")); + LINK_STATS_INC(link.lenerr); + goto drop; + } + + pb = pppSingleBuf (pb); + + if (pb->len <= PPPOE_HEADERLEN) { + printf("pppoe (data): dropping too short packet: %d bytes\n", pb->len); + goto drop; + } + + if (pb->len < sizeof(*ph)) { + printf("pppoe_data_input: could not get PPPoE header\n"); + goto drop; + } + ph = (struct pppoehdr *)pb->payload; + + if (ph->vertype != PPPOE_VERTYPE) { + printf("pppoe (data): unknown version/type packet: 0x%x\n", ph->vertype); + goto drop; + } + if (ph->code != 0) { + goto drop; + } + + session = ntohs(ph->session); + sc = pppoe_find_softc_by_session(session, netif); + if (sc == NULL) { +#ifdef PPPOE_TERM_UNKNOWN_SESSIONS + printf("pppoe: input for unknown session 0x%x, sending PADT\n", session); + pppoe_send_padt(netif, session, shost); +#endif + goto drop; + } + + plen = ntohs(ph->plen); + + if (pbuf_header(pb, -(int)(PPPOE_HEADERLEN)) != 0) { + /* bail out */ + PPPDEBUG((LOG_ERR, "pppoe_data_input: pbuf_header PPPOE_HEADERLEN failed\n")); + LINK_STATS_INC(link.lenerr); + goto drop; + } + + PPPDEBUG((LOG_DEBUG, "pppoe_data_input: %c%c%"U16_F": pkthdr.len=%d, pppoe.len=%d\n", + sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, + pb->len, plen)); + + if (pb->len < plen) { + goto drop; + } + + pppInProcOverEthernet(sc->sc_pd, pb); + + return; + +drop: + pbuf_free(pb); +} + +static err_t +pppoe_output(struct pppoe_softc *sc, struct pbuf *pb) +{ + struct eth_hdr *ethhdr; + u16_t etype; + err_t res; + + if (!sc->sc_ethif) { + pbuf_free(pb); + return ERR_IF; + } + + ethhdr = (struct eth_hdr *)pb->payload; + etype = sc->sc_state == PPPOE_STATE_SESSION ? ETHTYPE_PPPOE : ETHTYPE_PPPOEDISC; + ethhdr->type = htons(etype); + MEMCPY(ethhdr->dest.addr, sc->sc_dest.addr, sizeof(ethhdr->dest.addr)); + MEMCPY(ethhdr->src.addr, ((struct eth_addr *)sc->sc_ethif->hwaddr)->addr, sizeof(ethhdr->src.addr)); + + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F" (%x) state=%d, session=0x%x output -> %02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F":%02"X16_F", len=%d\n", + sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, etype, + sc->sc_state, sc->sc_session, + sc->sc_dest.addr[0], sc->sc_dest.addr[1], sc->sc_dest.addr[2], sc->sc_dest.addr[3], sc->sc_dest.addr[4], sc->sc_dest.addr[5], + pb->tot_len)); + + res = sc->sc_ethif->linkoutput(sc->sc_ethif, pb); + + pbuf_free(pb); + + return res; +} + +static err_t +pppoe_send_padi(struct pppoe_softc *sc) +{ + struct pbuf *pb; + u8_t *p; + int len, l1 = 0, l2 = 0; /* XXX: gcc */ + + if (sc->sc_state >PPPOE_STATE_PADI_SENT) { + PPPDEBUG((LOG_ERR, "ERROR: pppoe_send_padi in state %d", sc->sc_state)); + } + + /* calculate length of frame (excluding ethernet header + pppoe header) */ + len = 2 + 2 + 2 + 2 + sizeof sc; /* service name tag is required, host unique is send too */ + if (sc->sc_service_name != NULL) { + l1 = strlen(sc->sc_service_name); + len += l1; + } + if (sc->sc_concentrator_name != NULL) { + l2 = strlen(sc->sc_concentrator_name); + len += 2 + 2 + l2; + } + + /* allocate a buffer */ + pb = pbuf_alloc(PBUF_LINK, sizeof(struct eth_hdr) + PPPOE_HEADERLEN + len, PBUF_RAM); + if (!pb) { + return ERR_MEM; + } + + p = (u8_t*)pb->payload + sizeof (struct eth_hdr); + /* fill in pkt */ + PPPOE_ADD_HEADER(p, PPPOE_CODE_PADI, 0, len); + PPPOE_ADD_16(p, PPPOE_TAG_SNAME); + if (sc->sc_service_name != NULL) { + PPPOE_ADD_16(p, l1); + MEMCPY(p, sc->sc_service_name, l1); + p += l1; + } else { + PPPOE_ADD_16(p, 0); + } + if (sc->sc_concentrator_name != NULL) { + PPPOE_ADD_16(p, PPPOE_TAG_ACNAME); + PPPOE_ADD_16(p, l2); + MEMCPY(p, sc->sc_concentrator_name, l2); + p += l2; + } + PPPOE_ADD_16(p, PPPOE_TAG_HUNIQUE); + PPPOE_ADD_16(p, sizeof(sc)); + MEMCPY(p, &sc, sizeof sc); + + /* send pkt */ + return pppoe_output(sc, pb); +} + +static void +pppoe_timeout(void *arg) +{ + int retry_wait, err; + struct pppoe_softc *sc = (struct pppoe_softc*)arg; + + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F": timeout\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num)); + + switch (sc->sc_state) { + case PPPOE_STATE_PADI_SENT: + /* + * We have two basic ways of retrying: + * - Quick retry mode: try a few times in short sequence + * - Slow retry mode: we already had a connection successfully + * established and will try infinitely (without user + * intervention) + * We only enter slow retry mode if IFF_LINK1 (aka autodial) + * is not set. + */ + + /* initialize for quick retry mode */ + retry_wait = PPPOE_DISC_TIMEOUT * (1 + sc->sc_padi_retried); + + sc->sc_padi_retried++; + if (sc->sc_padi_retried >= PPPOE_DISC_MAXPADI) { +#if 0 + if ((sc->sc_sppp.pp_if.if_flags & IFF_LINK1) == 0) { + /* slow retry mode */ + retry_wait = PPPOE_SLOW_RETRY; + } else +#endif + { + pppoe_abort_connect(sc); + return; + } + } + if ((err = pppoe_send_padi(sc)) != 0) { + sc->sc_padi_retried--; + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F": failed to transmit PADI, error=%d\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, err)); + } + tcpip_timeout(retry_wait, pppoe_timeout, sc); + break; + + case PPPOE_STATE_PADR_SENT: + sc->sc_padr_retried++; + if (sc->sc_padr_retried >= PPPOE_DISC_MAXPADR) { + MEMCPY(&sc->sc_dest, ethbroadcast.addr, sizeof(sc->sc_dest)); + sc->sc_state = PPPOE_STATE_PADI_SENT; + sc->sc_padr_retried = 0; + if ((err = pppoe_send_padi(sc)) != 0) { + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F": failed to send PADI, error=%d\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, err)); + } + tcpip_timeout(PPPOE_DISC_TIMEOUT * (1 + sc->sc_padi_retried), pppoe_timeout, sc); + return; + } + if ((err = pppoe_send_padr(sc)) != 0) { + sc->sc_padr_retried--; + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F": failed to send PADR, error=%d\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, err)); + } + tcpip_timeout(PPPOE_DISC_TIMEOUT * (1 + sc->sc_padr_retried), pppoe_timeout, sc); + break; + case PPPOE_STATE_CLOSING: + pppoe_do_disconnect(sc); + break; + default: + return; /* all done, work in peace */ + } +} + +/* Start a connection (i.e. initiate discovery phase) */ +int +pppoe_connect(struct pppoe_softc *sc) +{ + int err; + + if (sc->sc_state != PPPOE_STATE_INITIAL) { + return EBUSY; + } + +#ifdef PPPOE_SERVER + /* wait PADI if IFF_PASSIVE */ + if ((sc->sc_sppp.pp_if.if_flags & IFF_PASSIVE)) { + return 0; + } +#endif + /* save state, in case we fail to send PADI */ + sc->sc_state = PPPOE_STATE_PADI_SENT; + sc->sc_padr_retried = 0; + err = pppoe_send_padi(sc); + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F": failed to send PADI, error=%d\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, err)); + tcpip_timeout(PPPOE_DISC_TIMEOUT, pppoe_timeout, sc); + return err; +} + +/* disconnect */ +void +pppoe_disconnect(struct pppoe_softc *sc) +{ + if (sc->sc_state < PPPOE_STATE_SESSION) { + return; + } + /* + * Do not call pppoe_disconnect here, the upper layer state + * machine gets confused by this. We must return from this + * function and defer disconnecting to the timeout handler. + */ + sc->sc_state = PPPOE_STATE_CLOSING; + tcpip_timeout(20, pppoe_timeout, sc); +} + +static int +pppoe_do_disconnect(struct pppoe_softc *sc) +{ + int err; + + if (sc->sc_state < PPPOE_STATE_SESSION) { + err = EBUSY; + } else { + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F": disconnecting\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num)); + err = pppoe_send_padt(sc->sc_ethif, sc->sc_session, (const u8_t *)&sc->sc_dest); + } + + /* cleanup softc */ + sc->sc_state = PPPOE_STATE_INITIAL; + MEMCPY(&sc->sc_dest, ethbroadcast.addr, sizeof(sc->sc_dest)); + if (sc->sc_ac_cookie) { + mem_free(sc->sc_ac_cookie); + sc->sc_ac_cookie = NULL; + } + sc->sc_ac_cookie_len = 0; +#ifdef PPPOE_SERVER + if (sc->sc_hunique) { + mem_free(sc->sc_hunique); + sc->sc_hunique = NULL; + } + sc->sc_hunique_len = 0; +#endif + sc->sc_session = 0; + + sc->sc_linkStatusCB(sc->sc_pd, 0); /* notify upper layers */ + + return err; +} + +/* Connection attempt aborted */ +static void +pppoe_abort_connect(struct pppoe_softc *sc) +{ + printf("%c%c%"U16_F": could not establish connection\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num); + sc->sc_state = PPPOE_STATE_CLOSING; + + sc->sc_linkStatusCB(sc->sc_pd, 0); /* notify upper layers */ + + /* clear connection state */ + MEMCPY(&sc->sc_dest, ethbroadcast.addr, sizeof(sc->sc_dest)); + sc->sc_state = PPPOE_STATE_INITIAL; +} + +/* Send a PADR packet */ +static err_t +pppoe_send_padr(struct pppoe_softc *sc) +{ + struct pbuf *pb; + u8_t *p; + size_t len, l1 = 0; /* XXX: gcc */ + + if (sc->sc_state != PPPOE_STATE_PADR_SENT) { + return ERR_CONN; + } + + len = 2 + 2 + 2 + 2 + sizeof(sc); /* service name, host unique */ + if (sc->sc_service_name != NULL) { /* service name tag maybe empty */ + l1 = strlen(sc->sc_service_name); + len += l1; + } + if (sc->sc_ac_cookie_len > 0) { + len += 2 + 2 + sc->sc_ac_cookie_len; /* AC cookie */ + } + pb = pbuf_alloc(PBUF_LINK, sizeof(struct eth_hdr) + PPPOE_HEADERLEN + len, PBUF_RAM); + if (!pb) { + return ERR_MEM; + } + p = (u8_t*)pb->payload + sizeof (struct eth_hdr); + PPPOE_ADD_HEADER(p, PPPOE_CODE_PADR, 0, len); + PPPOE_ADD_16(p, PPPOE_TAG_SNAME); + if (sc->sc_service_name != NULL) { + PPPOE_ADD_16(p, l1); + MEMCPY(p, sc->sc_service_name, l1); + p += l1; + } else { + PPPOE_ADD_16(p, 0); + } + if (sc->sc_ac_cookie_len > 0) { + PPPOE_ADD_16(p, PPPOE_TAG_ACCOOKIE); + PPPOE_ADD_16(p, sc->sc_ac_cookie_len); + MEMCPY(p, sc->sc_ac_cookie, sc->sc_ac_cookie_len); + p += sc->sc_ac_cookie_len; + } + PPPOE_ADD_16(p, PPPOE_TAG_HUNIQUE); + PPPOE_ADD_16(p, sizeof(sc)); + MEMCPY(p, &sc, sizeof sc); + + return pppoe_output(sc, pb); +} + +/* send a PADT packet */ +static err_t +pppoe_send_padt(struct netif *outgoing_if, u_int session, const u8_t *dest) +{ + struct pbuf *pb; + struct eth_hdr *ethhdr; + err_t res; + u8_t *p; + + pb = pbuf_alloc(PBUF_LINK, sizeof(struct eth_hdr) + PPPOE_HEADERLEN, PBUF_RAM); + if (!pb) { + return ERR_MEM; + } + + ethhdr = (struct eth_hdr *)pb->payload; + ethhdr->type = htons(ETHTYPE_PPPOEDISC); + MEMCPY(ethhdr->dest.addr, dest, sizeof(ethhdr->dest.addr)); + MEMCPY(ethhdr->src.addr, ((struct eth_addr *)outgoing_if->hwaddr)->addr, sizeof(ethhdr->src.addr)); + + p = (u8_t*)(ethhdr + 1); + PPPOE_ADD_HEADER(p, PPPOE_CODE_PADT, session, 0); + + res = outgoing_if->linkoutput(outgoing_if, pb); + + pbuf_free(pb); + + return res; +} + +#ifdef PPPOE_SERVER +static err_t +pppoe_send_pado(struct pppoe_softc *sc) +{ + struct pbuf *pb; + u8_t *p; + size_t len; + + if (sc->sc_state != PPPOE_STATE_PADO_SENT) { + return ERR_CONN; + } + + /* calc length */ + len = 0; + /* include ac_cookie */ + len += 2 + 2 + sizeof(sc); + /* include hunique */ + len += 2 + 2 + sc->sc_hunique_len; + pb = pbuf_alloc(PBUF_LINK, sizeof(struct eth_hdr) + PPPOE_HEADERLEN + len, PBUF_RAM); + if (!pb) { + return ERR_MEM; + } + p = (u8_t*)pb->payload + sizeof (struct eth_hdr); + PPPOE_ADD_HEADER(p, PPPOE_CODE_PADO, 0, len); + PPPOE_ADD_16(p, PPPOE_TAG_ACCOOKIE); + PPPOE_ADD_16(p, sizeof(sc)); + MEMCPY(p, &sc, sizeof(sc)); + p += sizeof(sc); + PPPOE_ADD_16(p, PPPOE_TAG_HUNIQUE); + PPPOE_ADD_16(p, sc->sc_hunique_len); + MEMCPY(p, sc->sc_hunique, sc->sc_hunique_len); + return pppoe_output(sc, pb); +} + +static err_t +pppoe_send_pads(struct pppoe_softc *sc) +{ + struct pbuf *pb; + u8_t *p; + size_t len, l1 = 0; /* XXX: gcc */ + + if (sc->sc_state != PPPOE_STATE_PADO_SENT) { + return ERR_CONN; + } + + sc->sc_session = mono_time.tv_sec % 0xff + 1; + /* calc length */ + len = 0; + /* include hunique */ + len += 2 + 2 + 2 + 2 + sc->sc_hunique_len; /* service name, host unique*/ + if (sc->sc_service_name != NULL) { /* service name tag maybe empty */ + l1 = strlen(sc->sc_service_name); + len += l1; + } + pb = pbuf_alloc(PBUF_LINK, sizeof(struct eth_hdr) + PPPOE_HEADERLEN + len, PBUF_RAM); + if (!pb) { + return ERR_MEM; + } + p = (u8_t*)pb->payload + sizeof (struct eth_hdr); + PPPOE_ADD_HEADER(p, PPPOE_CODE_PADS, sc->sc_session, len); + PPPOE_ADD_16(p, PPPOE_TAG_SNAME); + if (sc->sc_service_name != NULL) { + PPPOE_ADD_16(p, l1); + MEMCPY(p, sc->sc_service_name, l1); + p += l1; + } else { + PPPOE_ADD_16(p, 0); + } + PPPOE_ADD_16(p, PPPOE_TAG_HUNIQUE); + PPPOE_ADD_16(p, sc->sc_hunique_len); + MEMCPY(p, sc->sc_hunique, sc->sc_hunique_len); + return pppoe_output(sc, pb); +} +#endif + +err_t +pppoe_xmit(struct pppoe_softc *sc, struct pbuf *pb) +{ + u8_t *p; + size_t len; + + /* are we ready to process data yet? */ + if (sc->sc_state < PPPOE_STATE_SESSION) { + /*sppp_flush(&sc->sc_sppp.pp_if);*/ + pbuf_free(pb); + return ERR_CONN; + } + + len = pb->tot_len; + + /* make room for Ethernet header - should not fail */ + if (pbuf_header(pb, sizeof(struct eth_hdr) + PPPOE_HEADERLEN) != 0) { + /* bail out */ + PPPDEBUG((LOG_ERR, "pppoe: %c%c%"U16_F": pppoe_xmit: could not allocate room for header\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num)); + LINK_STATS_INC(link.lenerr); + pbuf_free(pb); + return ERR_BUF; + } + + p = (u8_t*)pb->payload + sizeof(struct eth_hdr); + PPPOE_ADD_HEADER(p, 0, sc->sc_session, len); + + return pppoe_output(sc, pb); +} + +#if 0 /*def PFIL_HOOKS*/ +static int +pppoe_ifattach_hook(void *arg, struct pbuf **mp, struct netif *ifp, int dir) +{ + struct pppoe_softc *sc; + int s; + + if (mp != (struct pbuf **)PFIL_IFNET_DETACH) { + return 0; + } + + LIST_FOREACH(sc, &pppoe_softc_list, sc_list) { + if (sc->sc_ethif != ifp) { + continue; + } + if (sc->sc_sppp.pp_if.if_flags & IFF_UP) { + sc->sc_sppp.pp_if.if_flags &= ~(IFF_UP|IFF_RUNNING); + printf("%c%c%"U16_F": ethernet interface detached, going down\n", + sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num); + } + sc->sc_ethif = NULL; + pppoe_clear_softc(sc, "ethernet interface detached"); + } + + return 0; +} +#endif + +static void +pppoe_clear_softc(struct pppoe_softc *sc, const char *message) +{ + LWIP_UNUSED_ARG(message); + + /* stop timer */ + tcpip_untimeout(pppoe_timeout, sc); + PPPDEBUG((LOG_DEBUG, "pppoe: %c%c%"U16_F": session 0x%x terminated, %s\n", sc->sc_ethif->name[0], sc->sc_ethif->name[1], sc->sc_ethif->num, sc->sc_session, message)); + + /* fix our state */ + sc->sc_state = PPPOE_STATE_INITIAL; + + /* notify upper layers */ + sc->sc_linkStatusCB(sc->sc_pd, 0); + + /* clean up softc */ + MEMCPY(&sc->sc_dest, ethbroadcast.addr, sizeof(sc->sc_dest)); + if (sc->sc_ac_cookie) { + mem_free(sc->sc_ac_cookie); + sc->sc_ac_cookie = NULL; + } + sc->sc_ac_cookie_len = 0; + sc->sc_session = 0; +} + +#endif /* PPPOE_SUPPORT */ + diff --git a/bertos/net/lwip/src/netif/ppp/pppdebug.h b/bertos/net/lwip/src/netif/ppp/pppdebug.h new file mode 100644 index 0000000..6253863 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/pppdebug.h @@ -0,0 +1,86 @@ +/***************************************************************************** +* pppdebug.h - System debugging utilities. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* portions Copyright (c) 1998 Global Election Systems Inc. +* portions Copyright (c) 2001 by Cognizant Pty Ltd. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY (please don't use tabs!) +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 98-07-29 Guy Lancaster , Global Election Systems Inc. +* Original. +* +***************************************************************************** +*/ +#ifndef PPPDEBUG_H +#define PPPDEBUG_H + +/************************ +*** PUBLIC DATA TYPES *** +************************/ +/* Trace levels. */ +typedef enum { +LOG_CRITICAL = 0, +LOG_ERR = 1, +LOG_NOTICE = 2, +LOG_WARNING = 3, +LOG_INFO = 5, +LOG_DETAIL = 6, +LOG_DEBUG = 7 +} LogCodes; + + +/*********************** +*** PUBLIC FUNCTIONS *** +***********************/ +/* + * ppp_trace - a form of printf to send tracing information to stderr + */ +void ppp_trace(int level, const char *format,...); + +#define TRACELCP PPP_DEBUG + +#if PPP_DEBUG + +#define AUTHDEBUG(a) ppp_trace a +#define IPCPDEBUG(a) ppp_trace a +#define UPAPDEBUG(a) ppp_trace a +#define LCPDEBUG(a) ppp_trace a +#define FSMDEBUG(a) ppp_trace a +#define CHAPDEBUG(a) ppp_trace a +#define PPPDEBUG(a) ppp_trace a + +#else /* PPP_DEBUG */ + +#define AUTHDEBUG(a) +#define IPCPDEBUG(a) +#define UPAPDEBUG(a) +#define LCPDEBUG(a) +#define FSMDEBUG(a) +#define CHAPDEBUG(a) +#define PPPDEBUG(a) + +#endif /* PPP_DEBUG */ + +#endif /* PPPDEBUG_H */ diff --git a/bertos/net/lwip/src/netif/ppp/randm.c b/bertos/net/lwip/src/netif/ppp/randm.c new file mode 100644 index 0000000..83c4174 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/randm.c @@ -0,0 +1,249 @@ +/***************************************************************************** +* randm.c - Random number generator program file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* Copyright (c) 1998 by Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 98-06-03 Guy Lancaster , Global Election Systems Inc. +* Extracted from avos. +*****************************************************************************/ + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "md5.h" +#include "randm.h" + +#include "ppp.h" +#include "pppdebug.h" + +#include + +#if MD5_SUPPORT /* this module depends on MD5 */ +#define RANDPOOLSZ 16 /* Bytes stored in the pool of randomness. */ + +/*****************************/ +/*** LOCAL DATA STRUCTURES ***/ +/*****************************/ +static char randPool[RANDPOOLSZ]; /* Pool of randomness. */ +static long randCount = 0; /* Pseudo-random incrementer */ + + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ +/* + * Initialize the random number generator. + * + * Since this is to be called on power up, we don't have much + * system randomess to work with. Here all we use is the + * real-time clock. We'll accumulate more randomness as soon + * as things start happening. + */ +void +avRandomInit() +{ + avChurnRand(NULL, 0); +} + +/* + * Churn the randomness pool on a random event. Call this early and often + * on random and semi-random system events to build randomness in time for + * usage. For randomly timed events, pass a null pointer and a zero length + * and this will use the system timer and other sources to add randomness. + * If new random data is available, pass a pointer to that and it will be + * included. + * + * Ref: Applied Cryptography 2nd Ed. by Bruce Schneier p. 427 + */ +void +avChurnRand(char *randData, u32_t randLen) +{ + MD5_CTX md5; + + /* ppp_trace(LOG_INFO, "churnRand: %u@%P\n", randLen, randData); */ + MD5Init(&md5); + MD5Update(&md5, (u_char *)randPool, sizeof(randPool)); + if (randData) { + MD5Update(&md5, (u_char *)randData, randLen); + } else { + struct { + /* INCLUDE fields for any system sources of randomness */ + char foobar; + } sysData; + + /* Load sysData fields here. */ + MD5Update(&md5, (u_char *)&sysData, sizeof(sysData)); + } + MD5Final((u_char *)randPool, &md5); +/* ppp_trace(LOG_INFO, "churnRand: -> 0\n"); */ +} + +/* + * Use the random pool to generate random data. This degrades to pseudo + * random when used faster than randomness is supplied using churnRand(). + * Note: It's important that there be sufficient randomness in randPool + * before this is called for otherwise the range of the result may be + * narrow enough to make a search feasible. + * + * Ref: Applied Cryptography 2nd Ed. by Bruce Schneier p. 427 + * + * XXX Why does he not just call churnRand() for each block? Probably + * so that you don't ever publish the seed which could possibly help + * predict future values. + * XXX Why don't we preserve md5 between blocks and just update it with + * randCount each time? Probably there is a weakness but I wish that + * it was documented. + */ +void +avGenRand(char *buf, u32_t bufLen) +{ + MD5_CTX md5; + u_char tmp[16]; + u32_t n; + + while (bufLen > 0) { + n = LWIP_MIN(bufLen, RANDPOOLSZ); + MD5Init(&md5); + MD5Update(&md5, (u_char *)randPool, sizeof(randPool)); + MD5Update(&md5, (u_char *)&randCount, sizeof(randCount)); + MD5Final(tmp, &md5); + randCount++; + MEMCPY(buf, tmp, n); + buf += n; + bufLen -= n; + } +} + +/* + * Return a new random number. + */ +u32_t +avRandom() +{ + u32_t newRand; + + avGenRand((char *)&newRand, sizeof(newRand)); + + return newRand; +} + +#else /* MD5_SUPPORT */ + +/*****************************/ +/*** LOCAL DATA STRUCTURES ***/ +/*****************************/ +static int avRandomized = 0; /* Set when truely randomized. */ +static u32_t avRandomSeed = 0; /* Seed used for random number generation. */ + + +/***********************************/ +/*** PUBLIC FUNCTION DEFINITIONS ***/ +/***********************************/ +/* + * Initialize the random number generator. + * + * Here we attempt to compute a random number seed but even if + * it isn't random, we'll randomize it later. + * + * The current method uses the fields from the real time clock, + * the idle process counter, the millisecond counter, and the + * hardware timer tick counter. When this is invoked + * in startup(), then the idle counter and timer values may + * repeat after each boot and the real time clock may not be + * operational. Thus we call it again on the first random + * event. + */ +void +avRandomInit() +{ +#if 0 + /* Get a pointer into the last 4 bytes of clockBuf. */ + u32_t *lptr1 = (u32_t *)((char *)&clockBuf[3]); + + /* + * Initialize our seed using the real-time clock, the idle + * counter, the millisecond timer, and the hardware timer + * tick counter. The real-time clock and the hardware + * tick counter are the best sources of randomness but + * since the tick counter is only 16 bit (and truncated + * at that), the idle counter and millisecond timer + * (which may be small values) are added to help + * randomize the lower 16 bits of the seed. + */ + readClk(); + avRandomSeed += *(u32_t *)clockBuf + *lptr1 + OSIdleCtr + + ppp_mtime() + ((u32_t)TM1 << 16) + TM1; +#else + avRandomSeed += sys_jiffies(); /* XXX */ +#endif + + /* Initialize the Borland random number generator. */ + srand((unsigned)avRandomSeed); +} + +/* + * Randomize our random seed value. Here we use the fact that + * this function is called at *truely random* times by the polling + * and network functions. Here we only get 16 bits of new random + * value but we use the previous value to randomize the other 16 + * bits. + */ +void +avRandomize(void) +{ + static u32_t last_jiffies; + + if (!avRandomized) { + avRandomized = !0; + avRandomInit(); + /* The initialization function also updates the seed. */ + } else { + /* avRandomSeed += (avRandomSeed << 16) + TM1; */ + avRandomSeed += (sys_jiffies() - last_jiffies); /* XXX */ + } + last_jiffies = sys_jiffies(); +} + +/* + * Return a new random number. + * Here we use the Borland rand() function to supply a pseudo random + * number which we make truely random by combining it with our own + * seed which is randomized by truely random events. + * Thus the numbers will be truely random unless there have been no + * operator or network events in which case it will be pseudo random + * seeded by the real time clock. + */ +u32_t +avRandom() +{ + return ((((u32_t)rand() << 16) + rand()) + avRandomSeed); +} + +#endif /* MD5_SUPPORT */ + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/randm.h b/bertos/net/lwip/src/netif/ppp/randm.h new file mode 100644 index 0000000..a0984b0 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/randm.h @@ -0,0 +1,81 @@ +/***************************************************************************** +* randm.h - Random number generator header file. +* +* Copyright (c) 2003 by Marc Boucher, Services Informatiques (MBSI) inc. +* Copyright (c) 1998 Global Election Systems Inc. +* +* The authors hereby grant permission to use, copy, modify, distribute, +* and license this software and its documentation for any purpose, provided +* that existing copyright notices are retained in all copies and that this +* notice and the following disclaimer are included verbatim in any +* distributions. No written agreement, license, or royalty fee is required +* for any of the authorized uses. +* +* THIS SOFTWARE IS PROVIDED BY THE CONTRIBUTORS *AS IS* AND ANY EXPRESS OR +* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES +* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. +* IN NO EVENT SHALL THE CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, +* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT +* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF +* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +* +****************************************************************************** +* REVISION HISTORY +* +* 03-01-01 Marc Boucher +* Ported to lwIP. +* 98-05-29 Guy Lancaster , Global Election Systems Inc. +* Extracted from avos. +*****************************************************************************/ + +#ifndef RANDM_H +#define RANDM_H + +/*********************** +*** PUBLIC FUNCTIONS *** +***********************/ +/* + * Initialize the random number generator. + */ +void avRandomInit(void); + +/* + * Churn the randomness pool on a random event. Call this early and often + * on random and semi-random system events to build randomness in time for + * usage. For randomly timed events, pass a null pointer and a zero length + * and this will use the system timer and other sources to add randomness. + * If new random data is available, pass a pointer to that and it will be + * included. + */ +void avChurnRand(char *randData, u32_t randLen); + +/* + * Randomize our random seed value. To be called for truely random events + * such as user operations and network traffic. + */ +#if MD5_SUPPORT +#define avRandomize() avChurnRand(NULL, 0) +#else /* MD5_SUPPORT */ +void avRandomize(void); +#endif /* MD5_SUPPORT */ + +/* + * Use the random pool to generate random data. This degrades to pseudo + * random when used faster than randomness is supplied using churnRand(). + * Thus it's important to make sure that the results of this are not + * published directly because one could predict the next result to at + * least some degree. Also, it's important to get a good seed before + * the first use. + */ +void avGenRand(char *buf, u32_t bufLen); + +/* + * Return a new random number. + */ +u32_t avRandom(void); + + +#endif /* RANDM_H */ diff --git a/bertos/net/lwip/src/netif/ppp/vj.c b/bertos/net/lwip/src/netif/ppp/vj.c new file mode 100644 index 0000000..694b702 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/vj.c @@ -0,0 +1,660 @@ +/* + * Routines to compress and uncompess tcp packets (for transmission + * over low speed serial lines. + * + * Copyright (c) 1989 Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by the University of California, Berkeley. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * Van Jacobson (van@helios.ee.lbl.gov), Dec 31, 1989: + * Initial distribution. + * + * Modified June 1993 by Paul Mackerras, paulus@cs.anu.edu.au, + * so that the entire packet being decompressed doesn't have + * to be in contiguous memory (just the compressed header). + * + * Modified March 1998 by Guy Lancaster, glanca@gesn.com, + * for a 16 bit processor. + */ + +#include "lwip/opt.h" + +#if PPP_SUPPORT /* don't build if not configured for use in lwipopts.h */ + +#include "ppp.h" +#include "pppdebug.h" + +#include "vj.h" + +#include + +#if VJ_SUPPORT + +#if LINK_STATS +#define INCR(counter) ++comp->stats.counter +#else +#define INCR(counter) +#endif + +#if defined(NO_CHAR_BITFIELDS) +#define getip_hl(base) ((base).ip_hl_v&0xf) +#define getth_off(base) (((base).th_x2_off&0xf0)>>4) +#else +#define getip_hl(base) ((base).ip_hl) +#define getth_off(base) ((base).th_off) +#endif + +void +vj_compress_init(struct vjcompress *comp) +{ + register u_int i; + register struct cstate *tstate = comp->tstate; + +#if MAX_SLOTS == 0 + memset((char *)comp, 0, sizeof(*comp)); +#endif + comp->maxSlotIndex = MAX_SLOTS - 1; + comp->compressSlot = 0; /* Disable slot ID compression by default. */ + for (i = MAX_SLOTS - 1; i > 0; --i) { + tstate[i].cs_id = i; + tstate[i].cs_next = &tstate[i - 1]; + } + tstate[0].cs_next = &tstate[MAX_SLOTS - 1]; + tstate[0].cs_id = 0; + comp->last_cs = &tstate[0]; + comp->last_recv = 255; + comp->last_xmit = 255; + comp->flags = VJF_TOSS; +} + + +/* ENCODE encodes a number that is known to be non-zero. ENCODEZ + * checks for zero (since zero has to be encoded in the long, 3 byte + * form). + */ +#define ENCODE(n) { \ + if ((u_short)(n) >= 256) { \ + *cp++ = 0; \ + cp[1] = (n); \ + cp[0] = (n) >> 8; \ + cp += 2; \ + } else { \ + *cp++ = (n); \ + } \ +} +#define ENCODEZ(n) { \ + if ((u_short)(n) >= 256 || (u_short)(n) == 0) { \ + *cp++ = 0; \ + cp[1] = (n); \ + cp[0] = (n) >> 8; \ + cp += 2; \ + } else { \ + *cp++ = (n); \ + } \ +} + +#define DECODEL(f) { \ + if (*cp == 0) {\ + u32_t tmp = ntohl(f) + ((cp[1] << 8) | cp[2]); \ + (f) = htonl(tmp); \ + cp += 3; \ + } else { \ + u32_t tmp = ntohl(f) + (u32_t)*cp++; \ + (f) = htonl(tmp); \ + } \ +} + +#define DECODES(f) { \ + if (*cp == 0) {\ + u_short tmp = ntohs(f) + (((u_short)cp[1] << 8) | cp[2]); \ + (f) = htons(tmp); \ + cp += 3; \ + } else { \ + u_short tmp = ntohs(f) + (u_short)*cp++; \ + (f) = htons(tmp); \ + } \ +} + +#define DECODEU(f) { \ + if (*cp == 0) {\ + (f) = htons(((u_short)cp[1] << 8) | cp[2]); \ + cp += 3; \ + } else { \ + (f) = htons((u_short)*cp++); \ + } \ +} + +/* + * vj_compress_tcp - Attempt to do Van Jacobson header compression on a + * packet. This assumes that nb and comp are not null and that the first + * buffer of the chain contains a valid IP header. + * Return the VJ type code indicating whether or not the packet was + * compressed. + */ +u_int +vj_compress_tcp(struct vjcompress *comp, struct pbuf *pb) +{ + register struct ip *ip = (struct ip *)pb->payload; + register struct cstate *cs = comp->last_cs->cs_next; + register u_short hlen = getip_hl(*ip); + register struct tcphdr *oth; + register struct tcphdr *th; + register u_short deltaS, deltaA; + register u_long deltaL; + register u_int changes = 0; + u_char new_seq[16]; + register u_char *cp = new_seq; + + /* + * Check that the packet is IP proto TCP. + */ + if (ip->ip_p != IPPROTO_TCP) { + return (TYPE_IP); + } + + /* + * Bail if this is an IP fragment or if the TCP packet isn't + * `compressible' (i.e., ACK isn't set or some other control bit is + * set). + */ + if ((ip->ip_off & htons(0x3fff)) || pb->tot_len < 40) { + return (TYPE_IP); + } + th = (struct tcphdr *)&((long *)ip)[hlen]; + if ((th->th_flags & (TCP_SYN|TCP_FIN|TCP_RST|TCP_ACK)) != TCP_ACK) { + return (TYPE_IP); + } + /* + * Packet is compressible -- we're going to send either a + * COMPRESSED_TCP or UNCOMPRESSED_TCP packet. Either way we need + * to locate (or create) the connection state. Special case the + * most recently used connection since it's most likely to be used + * again & we don't have to do any reordering if it's used. + */ + INCR(vjs_packets); + if (ip->ip_src.s_addr != cs->cs_ip.ip_src.s_addr + || ip->ip_dst.s_addr != cs->cs_ip.ip_dst.s_addr + || *(long *)th != ((long *)&cs->cs_ip)[getip_hl(cs->cs_ip)]) { + /* + * Wasn't the first -- search for it. + * + * States are kept in a circularly linked list with + * last_cs pointing to the end of the list. The + * list is kept in lru order by moving a state to the + * head of the list whenever it is referenced. Since + * the list is short and, empirically, the connection + * we want is almost always near the front, we locate + * states via linear search. If we don't find a state + * for the datagram, the oldest state is (re-)used. + */ + register struct cstate *lcs; + register struct cstate *lastcs = comp->last_cs; + + do { + lcs = cs; cs = cs->cs_next; + INCR(vjs_searches); + if (ip->ip_src.s_addr == cs->cs_ip.ip_src.s_addr + && ip->ip_dst.s_addr == cs->cs_ip.ip_dst.s_addr + && *(long *)th == ((long *)&cs->cs_ip)[getip_hl(cs->cs_ip)]) { + goto found; + } + } while (cs != lastcs); + + /* + * Didn't find it -- re-use oldest cstate. Send an + * uncompressed packet that tells the other side what + * connection number we're using for this conversation. + * Note that since the state list is circular, the oldest + * state points to the newest and we only need to set + * last_cs to update the lru linkage. + */ + INCR(vjs_misses); + comp->last_cs = lcs; + hlen += getth_off(*th); + hlen <<= 2; + /* Check that the IP/TCP headers are contained in the first buffer. */ + if (hlen > pb->len) { + return (TYPE_IP); + } + goto uncompressed; + + found: + /* + * Found it -- move to the front on the connection list. + */ + if (cs == lastcs) { + comp->last_cs = lcs; + } else { + lcs->cs_next = cs->cs_next; + cs->cs_next = lastcs->cs_next; + lastcs->cs_next = cs; + } + } + + oth = (struct tcphdr *)&((long *)&cs->cs_ip)[hlen]; + deltaS = hlen; + hlen += getth_off(*th); + hlen <<= 2; + /* Check that the IP/TCP headers are contained in the first buffer. */ + if (hlen > pb->len) { + PPPDEBUG((LOG_INFO, "vj_compress_tcp: header len %d spans buffers\n", hlen)); + return (TYPE_IP); + } + + /* + * Make sure that only what we expect to change changed. The first + * line of the `if' checks the IP protocol version, header length & + * type of service. The 2nd line checks the "Don't fragment" bit. + * The 3rd line checks the time-to-live and protocol (the protocol + * check is unnecessary but costless). The 4th line checks the TCP + * header length. The 5th line checks IP options, if any. The 6th + * line checks TCP options, if any. If any of these things are + * different between the previous & current datagram, we send the + * current datagram `uncompressed'. + */ + if (((u_short *)ip)[0] != ((u_short *)&cs->cs_ip)[0] + || ((u_short *)ip)[3] != ((u_short *)&cs->cs_ip)[3] + || ((u_short *)ip)[4] != ((u_short *)&cs->cs_ip)[4] + || getth_off(*th) != getth_off(*oth) + || (deltaS > 5 && BCMP(ip + 1, &cs->cs_ip + 1, (deltaS - 5) << 2)) + || (getth_off(*th) > 5 && BCMP(th + 1, oth + 1, (getth_off(*th) - 5) << 2))) { + goto uncompressed; + } + + /* + * Figure out which of the changing fields changed. The + * receiver expects changes in the order: urgent, window, + * ack, seq (the order minimizes the number of temporaries + * needed in this section of code). + */ + if (th->th_flags & TCP_URG) { + deltaS = ntohs(th->th_urp); + ENCODEZ(deltaS); + changes |= NEW_U; + } else if (th->th_urp != oth->th_urp) { + /* argh! URG not set but urp changed -- a sensible + * implementation should never do this but RFC793 + * doesn't prohibit the change so we have to deal + * with it. */ + goto uncompressed; + } + + if ((deltaS = (u_short)(ntohs(th->th_win) - ntohs(oth->th_win))) != 0) { + ENCODE(deltaS); + changes |= NEW_W; + } + + if ((deltaL = ntohl(th->th_ack) - ntohl(oth->th_ack)) != 0) { + if (deltaL > 0xffff) { + goto uncompressed; + } + deltaA = (u_short)deltaL; + ENCODE(deltaA); + changes |= NEW_A; + } + + if ((deltaL = ntohl(th->th_seq) - ntohl(oth->th_seq)) != 0) { + if (deltaL > 0xffff) { + goto uncompressed; + } + deltaS = (u_short)deltaL; + ENCODE(deltaS); + changes |= NEW_S; + } + + switch(changes) { + case 0: + /* + * Nothing changed. If this packet contains data and the + * last one didn't, this is probably a data packet following + * an ack (normal on an interactive connection) and we send + * it compressed. Otherwise it's probably a retransmit, + * retransmitted ack or window probe. Send it uncompressed + * in case the other side missed the compressed version. + */ + if (ip->ip_len != cs->cs_ip.ip_len && + ntohs(cs->cs_ip.ip_len) == hlen) { + break; + } + + /* (fall through) */ + + case SPECIAL_I: + case SPECIAL_D: + /* + * actual changes match one of our special case encodings -- + * send packet uncompressed. + */ + goto uncompressed; + + case NEW_S|NEW_A: + if (deltaS == deltaA && deltaS == ntohs(cs->cs_ip.ip_len) - hlen) { + /* special case for echoed terminal traffic */ + changes = SPECIAL_I; + cp = new_seq; + } + break; + + case NEW_S: + if (deltaS == ntohs(cs->cs_ip.ip_len) - hlen) { + /* special case for data xfer */ + changes = SPECIAL_D; + cp = new_seq; + } + break; + } + + deltaS = (u_short)(ntohs(ip->ip_id) - ntohs(cs->cs_ip.ip_id)); + if (deltaS != 1) { + ENCODEZ(deltaS); + changes |= NEW_I; + } + if (th->th_flags & TCP_PSH) { + changes |= TCP_PUSH_BIT; + } + /* + * Grab the cksum before we overwrite it below. Then update our + * state with this packet's header. + */ + deltaA = ntohs(th->th_sum); + BCOPY(ip, &cs->cs_ip, hlen); + + /* + * We want to use the original packet as our compressed packet. + * (cp - new_seq) is the number of bytes we need for compressed + * sequence numbers. In addition we need one byte for the change + * mask, one for the connection id and two for the tcp checksum. + * So, (cp - new_seq) + 4 bytes of header are needed. hlen is how + * many bytes of the original packet to toss so subtract the two to + * get the new packet size. + */ + deltaS = (u_short)(cp - new_seq); + if (!comp->compressSlot || comp->last_xmit != cs->cs_id) { + comp->last_xmit = cs->cs_id; + hlen -= deltaS + 4; + if(pbuf_header(pb, -hlen)){ + /* Can we cope with this failing? Just assert for now */ + LWIP_ASSERT("pbuf_header failed\n", 0); + } + cp = (u_char *)pb->payload; + *cp++ = changes | NEW_C; + *cp++ = cs->cs_id; + } else { + hlen -= deltaS + 3; + if(pbuf_header(pb, -hlen)) { + /* Can we cope with this failing? Just assert for now */ + LWIP_ASSERT("pbuf_header failed\n", 0); + } + cp = (u_char *)pb->payload; + *cp++ = changes; + } + *cp++ = deltaA >> 8; + *cp++ = deltaA; + BCOPY(new_seq, cp, deltaS); + INCR(vjs_compressed); + return (TYPE_COMPRESSED_TCP); + + /* + * Update connection state cs & send uncompressed packet (that is, + * a regular ip/tcp packet but with the 'conversation id' we hope + * to use on future compressed packets in the protocol field). + */ +uncompressed: + BCOPY(ip, &cs->cs_ip, hlen); + ip->ip_p = cs->cs_id; + comp->last_xmit = cs->cs_id; + return (TYPE_UNCOMPRESSED_TCP); +} + +/* + * Called when we may have missed a packet. + */ +void +vj_uncompress_err(struct vjcompress *comp) +{ + comp->flags |= VJF_TOSS; + INCR(vjs_errorin); +} + +/* + * "Uncompress" a packet of type TYPE_UNCOMPRESSED_TCP. + * Return 0 on success, -1 on failure. + */ +int +vj_uncompress_uncomp(struct pbuf *nb, struct vjcompress *comp) +{ + register u_int hlen; + register struct cstate *cs; + register struct ip *ip; + + ip = (struct ip *)nb->payload; + hlen = getip_hl(*ip) << 2; + if (ip->ip_p >= MAX_SLOTS + || hlen + sizeof(struct tcphdr) > nb->len + || (hlen += getth_off(*((struct tcphdr *)&((char *)ip)[hlen])) << 2) + > nb->len + || hlen > MAX_HDR) { + PPPDEBUG((LOG_INFO, "vj_uncompress_uncomp: bad cid=%d, hlen=%d buflen=%d\n", + ip->ip_p, hlen, nb->len)); + comp->flags |= VJF_TOSS; + INCR(vjs_errorin); + return -1; + } + cs = &comp->rstate[comp->last_recv = ip->ip_p]; + comp->flags &=~ VJF_TOSS; + ip->ip_p = IPPROTO_TCP; + BCOPY(ip, &cs->cs_ip, hlen); + cs->cs_hlen = hlen; + INCR(vjs_uncompressedin); + return 0; +} + +/* + * Uncompress a packet of type TYPE_COMPRESSED_TCP. + * The packet is composed of a buffer chain and the first buffer + * must contain an accurate chain length. + * The first buffer must include the entire compressed TCP/IP header. + * This procedure replaces the compressed header with the uncompressed + * header and returns the length of the VJ header. + */ +int +vj_uncompress_tcp(struct pbuf **nb, struct vjcompress *comp) +{ + u_char *cp; + struct tcphdr *th; + struct cstate *cs; + u_short *bp; + struct pbuf *n0 = *nb; + u32_t tmp; + u_int vjlen, hlen, changes; + + INCR(vjs_compressedin); + cp = (u_char *)n0->payload; + changes = *cp++; + if (changes & NEW_C) { + /* + * Make sure the state index is in range, then grab the state. + * If we have a good state index, clear the 'discard' flag. + */ + if (*cp >= MAX_SLOTS) { + PPPDEBUG((LOG_INFO, "vj_uncompress_tcp: bad cid=%d\n", *cp)); + goto bad; + } + + comp->flags &=~ VJF_TOSS; + comp->last_recv = *cp++; + } else { + /* + * this packet has an implicit state index. If we've + * had a line error since the last time we got an + * explicit state index, we have to toss the packet. + */ + if (comp->flags & VJF_TOSS) { + PPPDEBUG((LOG_INFO, "vj_uncompress_tcp: tossing\n")); + INCR(vjs_tossed); + return (-1); + } + } + cs = &comp->rstate[comp->last_recv]; + hlen = getip_hl(cs->cs_ip) << 2; + th = (struct tcphdr *)&((u_char *)&cs->cs_ip)[hlen]; + th->th_sum = htons((*cp << 8) | cp[1]); + cp += 2; + if (changes & TCP_PUSH_BIT) { + th->th_flags |= TCP_PSH; + } else { + th->th_flags &=~ TCP_PSH; + } + + switch (changes & SPECIALS_MASK) { + case SPECIAL_I: + { + register u32_t i = ntohs(cs->cs_ip.ip_len) - cs->cs_hlen; + /* some compilers can't nest inline assembler.. */ + tmp = ntohl(th->th_ack) + i; + th->th_ack = htonl(tmp); + tmp = ntohl(th->th_seq) + i; + th->th_seq = htonl(tmp); + } + break; + + case SPECIAL_D: + /* some compilers can't nest inline assembler.. */ + tmp = ntohl(th->th_seq) + ntohs(cs->cs_ip.ip_len) - cs->cs_hlen; + th->th_seq = htonl(tmp); + break; + + default: + if (changes & NEW_U) { + th->th_flags |= TCP_URG; + DECODEU(th->th_urp); + } else { + th->th_flags &=~ TCP_URG; + } + if (changes & NEW_W) { + DECODES(th->th_win); + } + if (changes & NEW_A) { + DECODEL(th->th_ack); + } + if (changes & NEW_S) { + DECODEL(th->th_seq); + } + break; + } + if (changes & NEW_I) { + DECODES(cs->cs_ip.ip_id); + } else { + cs->cs_ip.ip_id = ntohs(cs->cs_ip.ip_id) + 1; + cs->cs_ip.ip_id = htons(cs->cs_ip.ip_id); + } + + /* + * At this point, cp points to the first byte of data in the + * packet. Fill in the IP total length and update the IP + * header checksum. + */ + vjlen = (u_short)(cp - (u_char*)n0->payload); + if (n0->len < vjlen) { + /* + * We must have dropped some characters (crc should detect + * this but the old slip framing won't) + */ + PPPDEBUG((LOG_INFO, "vj_uncompress_tcp: head buffer %d too short %d\n", + n0->len, vjlen)); + goto bad; + } + +#if BYTE_ORDER == LITTLE_ENDIAN + tmp = n0->tot_len - vjlen + cs->cs_hlen; + cs->cs_ip.ip_len = htons(tmp); +#else + cs->cs_ip.ip_len = htons(n0->tot_len - vjlen + cs->cs_hlen); +#endif + + /* recompute the ip header checksum */ + bp = (u_short *) &cs->cs_ip; + cs->cs_ip.ip_sum = 0; + for (tmp = 0; hlen > 0; hlen -= 2) { + tmp += *bp++; + } + tmp = (tmp & 0xffff) + (tmp >> 16); + tmp = (tmp & 0xffff) + (tmp >> 16); + cs->cs_ip.ip_sum = (u_short)(~tmp); + + /* Remove the compressed header and prepend the uncompressed header. */ + if(pbuf_header(n0, -((s16_t)(vjlen)))) { + /* Can we cope with this failing? Just assert for now */ + LWIP_ASSERT("pbuf_header failed\n", 0); + goto bad; + } + + if(LWIP_MEM_ALIGN(n0->payload) != n0->payload) { + struct pbuf *np, *q; + u8_t *bufptr; + + np = pbuf_alloc(PBUF_RAW, n0->len + cs->cs_hlen, PBUF_POOL); + if(!np) { + PPPDEBUG((LOG_WARNING, "vj_uncompress_tcp: realign failed\n")); + goto bad; + } + + if(pbuf_header(np, -cs->cs_hlen)) { + /* Can we cope with this failing? Just assert for now */ + LWIP_ASSERT("pbuf_header failed\n", 0); + goto bad; + } + + bufptr = n0->payload; + for(q = np; q != NULL; q = q->next) { + MEMCPY(q->payload, bufptr, q->len); + bufptr += q->len; + } + + if(n0->next) { + pbuf_chain(np, n0->next); + pbuf_dechain(n0); + } + pbuf_free(n0); + n0 = np; + } + + if(pbuf_header(n0, cs->cs_hlen)) { + struct pbuf *np; + + LWIP_ASSERT("vj_uncompress_tcp: cs->cs_hlen <= PBUF_POOL_BUFSIZE", cs->cs_hlen <= PBUF_POOL_BUFSIZE); + np = pbuf_alloc(PBUF_RAW, cs->cs_hlen, PBUF_POOL); + if(!np) { + PPPDEBUG((LOG_WARNING, "vj_uncompress_tcp: prepend failed\n")); + goto bad; + } + pbuf_cat(np, n0); + n0 = np; + } + LWIP_ASSERT("n0->len >= cs->cs_hlen", n0->len >= cs->cs_hlen); + MEMCPY(n0->payload, &cs->cs_ip, cs->cs_hlen); + + *nb = n0; + + return vjlen; + +bad: + comp->flags |= VJF_TOSS; + INCR(vjs_errorin); + return (-1); +} + +#endif /* VJ_SUPPORT */ + +#endif /* PPP_SUPPORT */ diff --git a/bertos/net/lwip/src/netif/ppp/vj.h b/bertos/net/lwip/src/netif/ppp/vj.h new file mode 100644 index 0000000..b9617da --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/vj.h @@ -0,0 +1,155 @@ +/* + * Definitions for tcp compression routines. + * + * $Id: vj.h,v 1.5 2007/12/19 20:47:23 fbernon Exp $ + * + * Copyright (c) 1989 Regents of the University of California. + * All rights reserved. + * + * Redistribution and use in source and binary forms are permitted + * provided that the above copyright notice and this paragraph are + * duplicated in all such forms and that any documentation, + * advertising materials, and other materials related to such + * distribution and use acknowledge that the software was developed + * by the University of California, Berkeley. The name of the + * University may not be used to endorse or promote products derived + * from this software without specific prior written permission. + * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED + * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE. + * + * Van Jacobson (van@helios.ee.lbl.gov), Dec 31, 1989: + * - Initial distribution. + */ + +#ifndef VJ_H +#define VJ_H + +#include "vjbsdhdr.h" + +#define MAX_SLOTS 16 /* must be > 2 and < 256 */ +#define MAX_HDR 128 + +/* + * Compressed packet format: + * + * The first octet contains the packet type (top 3 bits), TCP + * 'push' bit, and flags that indicate which of the 4 TCP sequence + * numbers have changed (bottom 5 bits). The next octet is a + * conversation number that associates a saved IP/TCP header with + * the compressed packet. The next two octets are the TCP checksum + * from the original datagram. The next 0 to 15 octets are + * sequence number changes, one change per bit set in the header + * (there may be no changes and there are two special cases where + * the receiver implicitly knows what changed -- see below). + * + * There are 5 numbers which can change (they are always inserted + * in the following order): TCP urgent pointer, window, + * acknowlegement, sequence number and IP ID. (The urgent pointer + * is different from the others in that its value is sent, not the + * change in value.) Since typical use of SLIP links is biased + * toward small packets (see comments on MTU/MSS below), changes + * use a variable length coding with one octet for numbers in the + * range 1 - 255 and 3 octets (0, MSB, LSB) for numbers in the + * range 256 - 65535 or 0. (If the change in sequence number or + * ack is more than 65535, an uncompressed packet is sent.) + */ + +/* + * Packet types (must not conflict with IP protocol version) + * + * The top nibble of the first octet is the packet type. There are + * three possible types: IP (not proto TCP or tcp with one of the + * control flags set); uncompressed TCP (a normal IP/TCP packet but + * with the 8-bit protocol field replaced by an 8-bit connection id -- + * this type of packet syncs the sender & receiver); and compressed + * TCP (described above). + * + * LSB of 4-bit field is TCP "PUSH" bit (a worthless anachronism) and + * is logically part of the 4-bit "changes" field that follows. Top + * three bits are actual packet type. For backward compatibility + * and in the interest of conserving bits, numbers are chosen so the + * IP protocol version number (4) which normally appears in this nibble + * means "IP packet". + */ + +/* packet types */ +#define TYPE_IP 0x40 +#define TYPE_UNCOMPRESSED_TCP 0x70 +#define TYPE_COMPRESSED_TCP 0x80 +#define TYPE_ERROR 0x00 + +/* Bits in first octet of compressed packet */ +#define NEW_C 0x40 /* flag bits for what changed in a packet */ +#define NEW_I 0x20 +#define NEW_S 0x08 +#define NEW_A 0x04 +#define NEW_W 0x02 +#define NEW_U 0x01 + +/* reserved, special-case values of above */ +#define SPECIAL_I (NEW_S|NEW_W|NEW_U) /* echoed interactive traffic */ +#define SPECIAL_D (NEW_S|NEW_A|NEW_W|NEW_U) /* unidirectional data */ +#define SPECIALS_MASK (NEW_S|NEW_A|NEW_W|NEW_U) + +#define TCP_PUSH_BIT 0x10 + + +/* + * "state" data for each active tcp conversation on the wire. This is + * basically a copy of the entire IP/TCP header from the last packet + * we saw from the conversation together with a small identifier + * the transmit & receive ends of the line use to locate saved header. + */ +struct cstate { + struct cstate *cs_next; /* next most recently used state (xmit only) */ + u_short cs_hlen; /* size of hdr (receive only) */ + u_char cs_id; /* connection # associated with this state */ + u_char cs_filler; + union { + char csu_hdr[MAX_HDR]; + struct ip csu_ip; /* ip/tcp hdr from most recent packet */ + } vjcs_u; +}; +#define cs_ip vjcs_u.csu_ip +#define cs_hdr vjcs_u.csu_hdr + + +struct vjstat { + unsigned long vjs_packets; /* outbound packets */ + unsigned long vjs_compressed; /* outbound compressed packets */ + unsigned long vjs_searches; /* searches for connection state */ + unsigned long vjs_misses; /* times couldn't find conn. state */ + unsigned long vjs_uncompressedin; /* inbound uncompressed packets */ + unsigned long vjs_compressedin; /* inbound compressed packets */ + unsigned long vjs_errorin; /* inbound unknown type packets */ + unsigned long vjs_tossed; /* inbound packets tossed because of error */ +}; + +/* + * all the state data for one serial line (we need one of these per line). + */ +struct vjcompress { + struct cstate *last_cs; /* most recently used tstate */ + u_char last_recv; /* last rcvd conn. id */ + u_char last_xmit; /* last sent conn. id */ + u_short flags; + u_char maxSlotIndex; + u_char compressSlot; /* Flag indicating OK to compress slot ID. */ +#if LINK_STATS + struct vjstat stats; +#endif + struct cstate tstate[MAX_SLOTS]; /* xmit connection states */ + struct cstate rstate[MAX_SLOTS]; /* receive connection states */ +}; + +/* flag values */ +#define VJF_TOSS 1U /* tossing rcvd frames because of input err */ + +extern void vj_compress_init (struct vjcompress *comp); +extern u_int vj_compress_tcp (struct vjcompress *comp, struct pbuf *pb); +extern void vj_uncompress_err (struct vjcompress *comp); +extern int vj_uncompress_uncomp(struct pbuf *nb, struct vjcompress *comp); +extern int vj_uncompress_tcp (struct pbuf **nb, struct vjcompress *comp); + +#endif /* VJ_H */ diff --git a/bertos/net/lwip/src/netif/ppp/vjbsdhdr.h b/bertos/net/lwip/src/netif/ppp/vjbsdhdr.h new file mode 100644 index 0000000..f462676 --- /dev/null +++ b/bertos/net/lwip/src/netif/ppp/vjbsdhdr.h @@ -0,0 +1,75 @@ +#ifndef VJBSDHDR_H +#define VJBSDHDR_H + +#include "lwip/tcp.h" + +/* + * Structure of an internet header, naked of options. + * + * We declare ip_len and ip_off to be short, rather than u_short + * pragmatically since otherwise unsigned comparisons can result + * against negative integers quite easily, and fail in subtle ways. + */ +PACK_STRUCT_BEGIN +struct ip +{ +#if defined(NO_CHAR_BITFIELDS) + u_char ip_hl_v; /* bug in GCC for mips means the bitfield stuff will sometimes break - so we use a char for both and get round it with macro's instead... */ +#else +#if BYTE_ORDER == LITTLE_ENDIAN + unsigned ip_hl:4, /* header length */ + ip_v :4; /* version */ +#elif BYTE_ORDER == BIG_ENDIAN + unsigned ip_v :4, /* version */ + ip_hl:4; /* header length */ +#else + COMPLAIN - NO BYTE ORDER SELECTED! +#endif +#endif + u_char ip_tos; /* type of service */ + u_short ip_len; /* total length */ + u_short ip_id; /* identification */ + u_short ip_off; /* fragment offset field */ +#define IP_DF 0x4000 /* dont fragment flag */ +#define IP_MF 0x2000 /* more fragments flag */ +#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */ + u_char ip_ttl; /* time to live */ + u_char ip_p; /* protocol */ + u_short ip_sum; /* checksum */ + struct in_addr ip_src,ip_dst; /* source and dest address */ +}; +PACK_STRUCT_END + +typedef u32_t tcp_seq; + +/* + * TCP header. + * Per RFC 793, September, 1981. + */ +PACK_STRUCT_BEGIN +struct tcphdr +{ + u_short th_sport; /* source port */ + u_short th_dport; /* destination port */ + tcp_seq th_seq; /* sequence number */ + tcp_seq th_ack; /* acknowledgement number */ +#if defined(NO_CHAR_BITFIELDS) + u_char th_x2_off; +#else +#if BYTE_ORDER == LITTLE_ENDIAN + unsigned th_x2 :4, /* (unused) */ + th_off:4; /* data offset */ +#endif +#if BYTE_ORDER == BIG_ENDIAN + unsigned th_off:4, /* data offset */ + th_x2 :4; /* (unused) */ +#endif +#endif + u_char th_flags; + u_short th_win; /* window */ + u_short th_sum; /* checksum */ + u_short th_urp; /* urgent pointer */ +}; +PACK_STRUCT_END + +#endif /* VJBSDHDR_H */ diff --git a/bertos/net/lwip/src/netif/slipif.c b/bertos/net/lwip/src/netif/slipif.c new file mode 100644 index 0000000..089d2d3 --- /dev/null +++ b/bertos/net/lwip/src/netif/slipif.c @@ -0,0 +1,367 @@ +/** + * @file + * SLIP Interface + * + */ + +/* + * Copyright (c) 2001-2004 Swedish Institute of Computer Science. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. Neither the name of the Institute nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * This file is built upon the file: src/arch/rtxc/netif/sioslip.c + * + * Author: Magnus Ivarsson + */ + +/* + * This is an arch independent SLIP netif. The specific serial hooks must be + * provided by another file. They are sio_open, sio_read/sio_tryread and sio_send + */ + +#include "netif/slipif.h" +#include "lwip/opt.h" + +#if LWIP_HAVE_SLIPIF + +#include "lwip/def.h" +#include "lwip/pbuf.h" +#include "lwip/sys.h" +#include "lwip/stats.h" +#include "lwip/snmp.h" +#include "lwip/sio.h" + +#define SLIP_BLOCK 1 +#define SLIP_DONTBLOCK 0 + +#define SLIP_END 0300 /* 0xC0 */ +#define SLIP_ESC 0333 /* 0xDB */ +#define SLIP_ESC_END 0334 /* 0xDC */ +#define SLIP_ESC_ESC 0335 /* 0xDD */ + +#define SLIP_MAX_SIZE 1500 + +enum slipif_recv_state { + SLIP_RECV_NORMAL, + SLIP_RECV_ESCAPE, +}; + +struct slipif_priv { + sio_fd_t sd; + /* q is the whole pbuf chain for a packet, p is the current pbuf in the chain */ + struct pbuf *p, *q; + enum slipif_recv_state state; + u16_t i, recved; +}; + +/** + * Send a pbuf doing the necessary SLIP encapsulation + * + * Uses the serial layer's sio_send() + * + * @param netif the lwip network interface structure for this slipif + * @param p the pbuf chaing packet to send + * @param ipaddr the ip address to send the packet to (not used for slipif) + * @return always returns ERR_OK since the serial layer does not provide return values + */ +err_t +slipif_output(struct netif *netif, struct pbuf *p, struct ip_addr *ipaddr) +{ + struct slipif_priv *priv; + struct pbuf *q; + u16_t i; + u8_t c; + + LWIP_ASSERT("netif != NULL", (netif != NULL)); + LWIP_ASSERT("netif->state != NULL", (netif->state != NULL)); + LWIP_ASSERT("p != NULL", (p != NULL)); + + LWIP_UNUSED_ARG(ipaddr); + + priv = netif->state; + + /* Send pbuf out on the serial I/O device. */ + sio_send(SLIP_END, priv->sd); + + for (q = p; q != NULL; q = q->next) { + for (i = 0; i < q->len; i++) { + c = ((u8_t *)q->payload)[i]; + switch (c) { + case SLIP_END: + sio_send(SLIP_ESC, priv->sd); + sio_send(SLIP_ESC_END, priv->sd); + break; + case SLIP_ESC: + sio_send(SLIP_ESC, priv->sd); + sio_send(SLIP_ESC_ESC, priv->sd); + break; + default: + sio_send(c, priv->sd); + break; + } + } + } + sio_send(SLIP_END, priv->sd); + return ERR_OK; +} + +/** + * Static function for easy use of blockig or non-blocking + * sio_read + * + * @param fd serial device handle + * @param data pointer to data buffer for receiving + * @param len maximum length (in bytes) of data to receive + * @param block if 1, call sio_read; if 0, call sio_tryread + * @return return value of sio_read of sio_tryread + */ +static u32_t +slip_sio_read(sio_fd_t fd, u8_t* data, u32_t len, u8_t block) +{ + if (block) { + return sio_read(fd, data, len); + } else { + return sio_tryread(fd, data, len); + } +} + +/** + * Handle the incoming SLIP stream character by character + * + * Poll the serial layer by calling sio_read() or sio_tryread(). + * + * @param netif the lwip network interface structure for this slipif + * @param block if 1, block until data is received; if 0, return when all data + * from the buffer is received (multiple calls to this function will + * return a complete packet, NULL is returned before - used for polling) + * @return The IP packet when SLIP_END is received + */ +static struct pbuf * +slipif_input(struct netif *netif, u8_t block) +{ + struct slipif_priv *priv; + u8_t c; + struct pbuf *t; + + LWIP_ASSERT("netif != NULL", (netif != NULL)); + LWIP_ASSERT("netif->state != NULL", (netif->state != NULL)); + + priv = netif->state; + + while (slip_sio_read(priv->sd, &c, 1, block) > 0) { + switch (priv->state) { + case SLIP_RECV_NORMAL: + switch (c) { + case SLIP_END: + if (priv->recved > 0) { + /* Received whole packet. */ + /* Trim the pbuf to the size of the received packet. */ + pbuf_realloc(priv->q, priv->recved); + + LINK_STATS_INC(link.recv); + + LWIP_DEBUGF(SLIP_DEBUG, ("slipif: Got packet\n")); + t = priv->q; + priv->p = priv->q = NULL; + priv->i = priv->recved = 0; + return t; + } + continue; + case SLIP_ESC: + priv->state = SLIP_RECV_ESCAPE; + continue; + } + break; + case SLIP_RECV_ESCAPE: + switch (c) { + case SLIP_ESC_END: + c = SLIP_END; + break; + case SLIP_ESC_ESC: + c = SLIP_ESC; + break; + } + priv->state = SLIP_RECV_NORMAL; + /* FALLTHROUGH */ + } + + /* byte received, packet not yet completely received */ + if (priv->p == NULL) { + /* allocate a new pbuf */ + LWIP_DEBUGF(SLIP_DEBUG, ("slipif_input: alloc\n")); + priv->p = pbuf_alloc(PBUF_LINK, (PBUF_POOL_BUFSIZE - PBUF_LINK_HLEN), PBUF_POOL); + + if (priv->p == NULL) { + LINK_STATS_INC(link.drop); + LWIP_DEBUGF(SLIP_DEBUG, ("slipif_input: no new pbuf! (DROP)\n")); + /* don't process any further since we got no pbuf to receive to */ + break; + } + + if (priv->q != NULL) { + /* 'chain' the pbuf to the existing chain */ + pbuf_cat(priv->q, priv->p); + } else { + /* p is the first pbuf in the chain */ + priv->q = priv->p; + } + } + + /* this automatically drops bytes if > SLIP_MAX_SIZE */ + if ((priv->p != NULL) && (priv->recved <= SLIP_MAX_SIZE)) { + ((u8_t *)priv->p->payload)[priv->i] = c; + priv->recved++; + priv->i++; + if (priv->i >= priv->p->len) { + /* on to the next pbuf */ + priv->i = 0; + if (priv->p->next != NULL && priv->p->next->len > 0) { + /* p is a chain, on to the next in the chain */ + priv->p = priv->p->next; + } else { + /* p is a single pbuf, set it to NULL so next time a new + * pbuf is allocated */ + priv->p = NULL; + } + } + } + } + + return NULL; +} + +#if !NO_SYS +/** + * The SLIP input thread. + * + * Feed the IP layer with incoming packets + * + * @param nf the lwip network interface structure for this slipif + */ +static void +slipif_loop_thread(void *nf) +{ + struct pbuf *p; + struct netif *netif = (struct netif *)nf; + + while (1) { + p = slipif_input(netif, SLIP_BLOCK); + if (p != NULL) { + if (netif->input(p, netif) != ERR_OK) { + pbuf_free(p); + p = NULL; + } + } + } +} +#endif /* !NO_SYS */ + +/** + * SLIP netif initialization + * + * Call the arch specific sio_open and remember + * the opened device in the state field of the netif. + * + * @param netif the lwip network interface structure for this slipif + * @return ERR_OK if serial line could be opened, + * ERR_MEM if no memory could be allocated, + * ERR_IF is serial line couldn't be opened + * + * @note netif->num must contain the number of the serial port to open + * (0 by default) + */ +err_t +slipif_init(struct netif *netif) +{ + struct slipif_priv *priv; + + LWIP_DEBUGF(SLIP_DEBUG, ("slipif_init: netif->num=%"U16_F"\n", (u16_t)netif->num)); + + /* Allocate private data */ + priv = mem_malloc(sizeof(struct slipif_priv)); + if (!priv) { + return ERR_MEM; + } + + netif->name[0] = 's'; + netif->name[1] = 'l'; + netif->output = slipif_output; + netif->mtu = SLIP_MAX_SIZE; + netif->flags |= NETIF_FLAG_POINTTOPOINT; + + /* Try to open the serial port (netif->num contains the port number). */ + priv->sd = sio_open(netif->num); + if (!priv->sd) { + /* Opening the serial port failed. */ + mem_free(priv); + return ERR_IF; + } + + /* Initialize private data */ + priv->p = NULL; + priv->q = NULL; + priv->state = SLIP_RECV_NORMAL; + priv->i = 0; + priv->recved = 0; + + netif->state = priv; + + /* initialize the snmp variables and counters inside the struct netif + * ifSpeed: no assumption can be made without knowing more about the + * serial line! + */ + NETIF_INIT_SNMP(netif, snmp_ifType_slip, 0); + + /* Create a thread to poll the serial line. */ + sys_thread_new(SLIPIF_THREAD_NAME, slipif_loop_thread, netif, + SLIPIF_THREAD_STACKSIZE, SLIPIF_THREAD_PRIO); + return ERR_OK; +} + +/** + * Polls the serial device and feeds the IP layer with incoming packets. + * + * @param netif The lwip network interface structure for this slipif + */ +void +slipif_poll(struct netif *netif) +{ + struct pbuf *p; + struct slipif_priv *priv; + + LWIP_ASSERT("netif != NULL", (netif != NULL)); + LWIP_ASSERT("netif->state != NULL", (netif->state != NULL)); + + priv = netif->state; + + while ((p = slipif_input(netif, SLIP_DONTBLOCK)) != NULL) { + if (netif->input(p, netif) != ERR_OK) { + pbuf_free(p); + } + } +} + +#endif /* LWIP_HAVE_SLIPIF */ diff --git a/bertos/net/lwip/test/unit/lwip_check.h b/bertos/net/lwip/test/unit/lwip_check.h new file mode 100644 index 0000000..d8984a1 --- /dev/null +++ b/bertos/net/lwip/test/unit/lwip_check.h @@ -0,0 +1,37 @@ +#ifndef __LWIP_CHECK_H__ +#define __LWIP_CHECK_H__ + +/* Common header file for lwIP unit tests using the check framework */ + +#include +#include +#include + +#define FAIL_RET() do { fail(); return; } while(0) +#define EXPECT(x) fail_unless(x) +#define EXPECT_RET(x) do { fail_unless(x); if(!(x)) { return; }} while(0) +#define EXPECT_RETX(x, y) do { fail_unless(x); if(!(x)) { return y; }} while(0) +#define EXPECT_RETNULL(x) EXPECT_RETX(x, NULL) + +/** typedef for a function returning a test suite */ +typedef Suite* (suite_getter_fn)(void); + +/** Create a test suite */ +static Suite* create_suite(const char* name, TFun *tests, size_t num_tests, SFun setup, SFun teardown) +{ + size_t i; + Suite *s = suite_create(name); + + for(i = 0; i < num_tests; i++) { + // Core test case + TCase *tc_core = tcase_create("Core"); + if ((setup != NULL) || (teardown != NULL)) { + tcase_add_checked_fixture(tc_core, setup, teardown); + } + tcase_add_test(tc_core, tests[i]); + suite_add_tcase(s, tc_core); + } + return s; +} + +#endif /* __LWIP_CHECK_H__ */ diff --git a/bertos/net/lwip/test/unit/lwip_unittests.c b/bertos/net/lwip/test/unit/lwip_unittests.c new file mode 100644 index 0000000..2dbeb6d --- /dev/null +++ b/bertos/net/lwip/test/unit/lwip_unittests.c @@ -0,0 +1,42 @@ +#include "lwip_check.h" + +#include "udp/test_udp.h" +#include "tcp/test_tcp.h" +#include "tcp/test_tcp_oos.h" + +#include "lwip/init.h" + + +int main() +{ + int number_failed; + SRunner *sr; + size_t i; + suite_getter_fn* suites[] = { + udp_suite, + tcp_suite, + tcp_oos_suite, + }; + size_t num = sizeof(suites)/sizeof(void*); + LWIP_ASSERT("No suites defined", num > 0); + + lwip_init(); + + sr = srunner_create((suites[0])()); + for(i = 1; i < num; i++) { + srunner_add_suite(sr, ((suite_getter_fn*)suites[i])()); + } + +#ifdef LWIP_UNITTESTS_NOFORK + srunner_set_fork_status(sr, CK_NOFORK); +#endif +#ifdef LWIP_UNITTESTS_FORK + srunner_set_fork_status(sr, CK_FORK); +#endif + + srunner_run_all(sr, CK_NORMAL); + number_failed = srunner_ntests_failed(sr); + srunner_free(sr); + return (number_failed == 0) ? EXIT_SUCCESS : EXIT_FAILURE; +} + diff --git a/bertos/net/lwip/test/unit/tcp/tcp_helper.c b/bertos/net/lwip/test/unit/tcp/tcp_helper.c new file mode 100644 index 0000000..0957cbe --- /dev/null +++ b/bertos/net/lwip/test/unit/tcp/tcp_helper.c @@ -0,0 +1,196 @@ +#include "tcp_helper.h" + +#include "lwip/tcp.h" +#include "lwip/stats.h" +#include "lwip/pbuf.h" +#include "lwip/inet_chksum.h" + +#if !LWIP_STATS || !TCP_STATS || !MEMP_STATS +#error "This tests needs TCP- and MEMP-statistics enabled" +#endif + +/** Remove all pcbs on the given list. */ +static void +tcp_remove(struct tcp_pcb* pcb_list) +{ + struct tcp_pcb *pcb = pcb_list; + struct tcp_pcb *pcb2; + + while(pcb != NULL) { + pcb2 = pcb; + pcb = pcb->next; + tcp_abort(pcb2); + } +} + +/** Remove all pcbs on listen-, active- and time-wait-list (bound- isn't exported). */ +void +tcp_remove_all(void) +{ + //tcp_remove(tcp_bound_pcbs); + tcp_remove(tcp_listen_pcbs.pcbs); + tcp_remove(tcp_active_pcbs); + tcp_remove(tcp_tw_pcbs); + fail_unless(lwip_stats.memp[MEMP_TCP_PCB].used == 0); + fail_unless(lwip_stats.memp[MEMP_TCP_PCB_LISTEN].used == 0); + fail_unless(lwip_stats.memp[MEMP_TCP_SEG].used == 0); + fail_unless(lwip_stats.memp[MEMP_PBUF_POOL].used == 0); +} + +/** Create a TCP segment usable for passing to tcp_input + * - IP-addresses, ports, seqno and ackno are taken from pcb + * - seqno and ackno can be altered with an offset + */ +struct pbuf* +tcp_create_rx_segment(struct tcp_pcb* pcb, void* data, size_t data_len, u32_t seqno_offset, + u32_t ackno_offset, u8_t headerflags) +{ + return tcp_create_segment(&pcb->remote_ip, &pcb->local_ip, pcb->remote_port, pcb->local_port, + data, data_len, pcb->rcv_nxt + seqno_offset, pcb->snd_nxt + ackno_offset, headerflags); +} + +/** Create a TCP segment usable for passing to tcp_input */ +struct pbuf* +tcp_create_segment(struct ip_addr* src_ip, struct ip_addr* dst_ip, + u16_t src_port, u16_t dst_port, void* data, size_t data_len, + u32_t seqno, u32_t ackno, u8_t headerflags) +{ + struct pbuf* p; + struct ip_hdr* iphdr; + struct tcp_hdr* tcphdr; + u16_t pbuf_len = sizeof(struct ip_hdr) + sizeof(struct tcp_hdr) + data_len; + + p = pbuf_alloc(PBUF_RAW, pbuf_len, PBUF_POOL); + EXPECT_RETNULL(p != NULL); + EXPECT_RETNULL(p->next == NULL); + + memset(p->payload, 0, p->len); + + iphdr = p->payload; + /* fill IP header */ + iphdr->dest.addr = dst_ip->addr; + iphdr->src.addr = src_ip->addr; + IPH_VHLTOS_SET(iphdr, 4, IP_HLEN / 4, 0); + IPH_LEN_SET(iphdr, htons(p->tot_len)); + IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN)); + + pbuf_header(p, -(s16_t)sizeof(struct ip_hdr)); + + tcphdr = p->payload; + tcphdr->src = htons(src_port); + tcphdr->dest = htons(dst_port); + tcphdr->seqno = htonl(seqno); + tcphdr->ackno = htonl(ackno); + TCPH_HDRLEN_SET(tcphdr, sizeof(struct tcp_hdr)/4); + TCPH_FLAGS_SET(tcphdr, headerflags); + tcphdr->wnd = htonl(TCP_WND); + + /* copy data */ + memcpy((char*)tcphdr + sizeof(struct tcp_hdr), data, data_len); + + /* calculate checksum */ + tcphdr->chksum = inet_chksum_pseudo(p, &(iphdr->src), &(iphdr->dest), + IP_PROTO_TCP, p->tot_len); + + pbuf_header(p, sizeof(struct ip_hdr)); + + return p; +} + +/** Safely bring a tcp_pcb into the requested state */ +void +tcp_set_state(struct tcp_pcb* pcb, enum tcp_state state, struct ip_addr* local_ip, + struct ip_addr* remote_ip, u16_t local_port, u16_t remote_port) +{ + /* @todo: are these all states? */ + /* @todo: remove from previous list */ + pcb->state = state; + if (state == ESTABLISHED) { + TCP_REG(&tcp_active_pcbs, pcb); + pcb->local_ip.addr = local_ip->addr; + pcb->local_port = local_port; + pcb->remote_ip.addr = remote_ip->addr; + pcb->remote_port = remote_port; + } else if(state == LISTEN) { + TCP_REG(&tcp_listen_pcbs.pcbs, pcb); + pcb->local_ip.addr = local_ip->addr; + pcb->local_port = local_port; + } else if(state == TIME_WAIT) { + TCP_REG(&tcp_tw_pcbs, pcb); + pcb->local_ip.addr = local_ip->addr; + pcb->local_port = local_port; + pcb->remote_ip.addr = remote_ip->addr; + pcb->remote_port = remote_port; + } else { + fail(); + } +} + +void +test_tcp_counters_err(void* arg, err_t err) +{ + struct test_tcp_counters* counters = arg; + EXPECT_RET(arg != NULL); + counters->err_calls++; + counters->last_err = err; +} + +static void +test_tcp_counters_check_rxdata(struct test_tcp_counters* counters, struct pbuf* p) +{ + struct pbuf* q; + u32_t i, received; + if(counters->expected_data == NULL) { + /* no data to compare */ + return; + } + EXPECT_RET(counters->recved_bytes + p->tot_len <= counters->expected_data_len); + received = counters->recved_bytes; + for(q = p; q != NULL; q = q->next) { + char *data = q->payload; + for(i = 0; i < q->len; i++) { + EXPECT_RET(data[i] == counters->expected_data[received]); + received++; + } + } + EXPECT(received == counters->recved_bytes + p->tot_len); +} + +err_t +test_tcp_counters_recv(void* arg, struct tcp_pcb* pcb, struct pbuf* p, err_t err) +{ + struct test_tcp_counters* counters = arg; + EXPECT_RETX(arg != NULL, ERR_OK); + EXPECT_RETX(pcb != NULL, ERR_OK); + EXPECT_RETX(err == ERR_OK, ERR_OK); + + if (p != NULL) { + if (counters->close_calls == 0) { + counters->recv_calls++; + test_tcp_counters_check_rxdata(counters, p); + counters->recved_bytes += p->tot_len; + } else { + counters->recv_calls_after_close++; + counters->recved_bytes_after_close += p->tot_len; + } + pbuf_free(p); + } else { + counters->close_calls++; + } + EXPECT(counters->recv_calls_after_close == 0 && counters->recved_bytes_after_close == 0); + return ERR_OK; +} + +/** Allocate a pcb and set up the test_tcp_counters_* callbacks */ +struct tcp_pcb* +test_tcp_new_counters_pcb(struct test_tcp_counters* counters) +{ + struct tcp_pcb* pcb = tcp_new(); + if (pcb != NULL) { + /* set up args and callbacks */ + tcp_arg(pcb, counters); + tcp_recv(pcb, test_tcp_counters_recv); + tcp_err(pcb, test_tcp_counters_err); + } + return pcb; +} diff --git a/bertos/net/lwip/test/unit/tcp/tcp_helper.h b/bertos/net/lwip/test/unit/tcp/tcp_helper.h new file mode 100644 index 0000000..b61e0f0 --- /dev/null +++ b/bertos/net/lwip/test/unit/tcp/tcp_helper.h @@ -0,0 +1,36 @@ +#ifndef __TCP_HELPER_H__ +#define __TCP_HELPER_H__ + +#include "../lwip_check.h" +#include "lwip/arch.h" +#include "lwip/tcp.h" + +/* counters used for test_tcp_counters_* callback functions */ +struct test_tcp_counters { + u32_t recv_calls; + u32_t recved_bytes; + u32_t recv_calls_after_close; + u32_t recved_bytes_after_close; + u32_t close_calls; + u32_t err_calls; + err_t last_err; + char* expected_data; + u32_t expected_data_len; +}; + +/* Helper functions */ +void tcp_remove_all(void); + +struct pbuf* tcp_create_segment(struct ip_addr* src_ip, struct ip_addr* dst_ip, + u16_t src_port, u16_t dst_port, void* data, size_t data_len, + u32_t seqno, u32_t ackno, u8_t headerflags); +struct pbuf* tcp_create_rx_segment(struct tcp_pcb* pcb, void* data, size_t data_len, + u32_t seqno_offset, u32_t ackno_offset, u8_t headerflags); +void tcp_set_state(struct tcp_pcb* pcb, enum tcp_state state, struct ip_addr* local_ip, + struct ip_addr* remote_ip, u16_t local_port, u16_t remote_port); +void test_tcp_counters_err(void* arg, err_t err); +err_t test_tcp_counters_recv(void* arg, struct tcp_pcb* pcb, struct pbuf* p, err_t err); + +struct tcp_pcb* test_tcp_new_counters_pcb(struct test_tcp_counters* counters); + +#endif diff --git a/bertos/net/lwip/test/unit/tcp/test_tcp.c b/bertos/net/lwip/test/unit/tcp/test_tcp.c new file mode 100644 index 0000000..350cb0c --- /dev/null +++ b/bertos/net/lwip/test/unit/tcp/test_tcp.c @@ -0,0 +1,104 @@ +#include "test_tcp.h" + +#include "lwip/tcp.h" +#include "lwip/stats.h" +#include "tcp_helper.h" + +#if !LWIP_STATS || !TCP_STATS || !MEMP_STATS +#error "This tests needs TCP- and MEMP-statistics enabled" +#endif + +/* Setups/teardown functions */ + +static void +tcp_setup(void) +{ + tcp_remove_all(); +} + +static void +tcp_teardown(void) +{ + tcp_remove_all(); +} + + +/* Test functions */ + +/** Call tcp_new() and tcp_abort() and test memp stats */ +START_TEST(test_tcp_new_abort) +{ + struct tcp_pcb* pcb; + LWIP_UNUSED_ARG(_i); + + fail_unless(lwip_stats.memp[MEMP_TCP_PCB].used == 0); + + pcb = tcp_new(); + fail_unless(pcb != NULL); + if (pcb != NULL) { + fail_unless(lwip_stats.memp[MEMP_TCP_PCB].used == 1); + tcp_abort(pcb); + fail_unless(lwip_stats.memp[MEMP_TCP_PCB].used == 0); + } +} +END_TEST + +/** Create an ESTABLISHED pcb and check if receive callback is called */ +START_TEST(test_tcp_recv_inseq) +{ + struct test_tcp_counters counters; + struct tcp_pcb* pcb; + struct pbuf* p; + char data[] = {1, 2, 3, 4}; + struct ip_addr remote_ip, local_ip; + u16_t data_len; + u16_t remote_port = 0x100, local_port = 0x101; + struct netif netif; + LWIP_UNUSED_ARG(_i); + + /* initialize local vars */ + memset(&netif, 0, sizeof(netif)); + IP4_ADDR(&local_ip, 192, 168, 1, 1); + IP4_ADDR(&remote_ip, 192, 168, 1, 2); + data_len = sizeof(data); + /* initialize counter struct */ + memset(&counters, 0, sizeof(counters)); + counters.expected_data_len = data_len; + counters.expected_data = data; + + /* create and initialize the pcb */ + pcb = test_tcp_new_counters_pcb(&counters); + EXPECT_RET(pcb != NULL); + tcp_set_state(pcb, ESTABLISHED, &local_ip, &remote_ip, local_port, remote_port); + + /* create a segment */ + p = tcp_create_rx_segment(pcb, counters.expected_data, data_len, 0, 0, 0); + EXPECT(p != NULL); + if (p != NULL) { + /* pass the segment to tcp_input */ + tcp_input(p, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 1); + EXPECT(counters.recved_bytes == data_len); + EXPECT(counters.err_calls == 0); + } + + /* make sure the pcb is freed */ + EXPECT(lwip_stats.memp[MEMP_TCP_PCB].used == 1); + tcp_abort(pcb); + EXPECT(lwip_stats.memp[MEMP_TCP_PCB].used == 0); +} +END_TEST + + +/** Create the suite including all tests for this module */ +Suite * +tcp_suite(void) +{ + TFun tests[] = { + test_tcp_new_abort, + test_tcp_recv_inseq, + }; + return create_suite("TCP", tests, sizeof(tests)/sizeof(TFun), tcp_setup, tcp_teardown); +} diff --git a/bertos/net/lwip/test/unit/tcp/test_tcp.h b/bertos/net/lwip/test/unit/tcp/test_tcp.h new file mode 100644 index 0000000..f1c4a46 --- /dev/null +++ b/bertos/net/lwip/test/unit/tcp/test_tcp.h @@ -0,0 +1,8 @@ +#ifndef __TEST_TCP_H__ +#define __TEST_TCP_H__ + +#include "../lwip_check.h" + +Suite *tcp_suite(void); + +#endif diff --git a/bertos/net/lwip/test/unit/tcp/test_tcp_oos.c b/bertos/net/lwip/test/unit/tcp/test_tcp_oos.c new file mode 100644 index 0000000..8e4c7f4 --- /dev/null +++ b/bertos/net/lwip/test/unit/tcp/test_tcp_oos.c @@ -0,0 +1,433 @@ +#include "test_tcp_oos.h" + +#include "lwip/tcp.h" +#include "lwip/stats.h" +#include "tcp_helper.h" + +#if !LWIP_STATS || !TCP_STATS || !MEMP_STATS +#error "This tests needs TCP- and MEMP-statistics enabled" +#endif +#if !TCP_QUEUE_OOSEQ +#error "This tests needs TCP_QUEUE_OOSEQ enabled" +#endif + +/** CHECK_SEGMENTS_ON_OOSEQ: + * 1: check count, seqno and len of segments on pcb->ooseq (strict) + * 0: only check that bytes are received in correct order (less strict) */ +#define CHECK_SEGMENTS_ON_OOSEQ 1 + +#if CHECK_SEGMENTS_ON_OOSEQ +#define EXPECT_OOSEQ(x) EXPECT(x) +#else +#define EXPECT_OOSEQ(x) +#endif + +/* helper functions */ + +/** Get the numbers of segments on the ooseq list */ +static int tcp_oos_count(struct tcp_pcb* pcb) +{ + int num = 0; + struct tcp_seg* seg = pcb->ooseq; + while(seg != NULL) { + num++; + seg = seg->next; + } + return num; +} + +/** Get the seqno of a segment (by index) on the ooseq list + * + * @param pcb the pcb to check for ooseq segments + * @param seg_index index of the segment on the ooseq list + * @return seqno of the segment + */ +static u32_t +tcp_oos_seg_seqno(struct tcp_pcb* pcb, int seg_index) +{ + int num = 0; + struct tcp_seg* seg = pcb->ooseq; + + /* then check the actual segment */ + while(seg != NULL) { + if(num == seg_index) { + return seg->tcphdr->seqno; + } + num++; + seg = seg->next; + } + fail(); + return 0; +} + +/** Get the tcplen of a segment (by index) on the ooseq list + * + * @param pcb the pcb to check for ooseq segments + * @param seg_index index of the segment on the ooseq list + * @return tcplen of the segment + */ +static int +tcp_oos_seg_tcplen(struct tcp_pcb* pcb, int seg_index) +{ + int num = 0; + struct tcp_seg* seg = pcb->ooseq; + + /* then check the actual segment */ + while(seg != NULL) { + if(num == seg_index) { + return TCP_TCPLEN(seg); + } + num++; + seg = seg->next; + } + fail(); + return -1; +} + +/* Setup/teardown functions */ + +static void +tcp_oos_setup(void) +{ + tcp_remove_all(); +} + +static void +tcp_oos_teardown(void) +{ + tcp_remove_all(); +} + + + +/* Test functions */ + +/** create multiple segments and pass them to tcp_input in a wrong + * order to see if ooseq-caching works correctly + * FIN is received in out-of-sequence segments only */ +START_TEST(test_tcp_recv_ooseq_FIN_OOSEQ) +{ + struct test_tcp_counters counters; + struct tcp_pcb* pcb; + struct pbuf *p_8_9, *p_4_8, *p_4_10, *p_2_14, *p_fin, *pinseq; + char data[] = { + 1, 2, 3, 4, + 5, 6, 7, 8, + 9, 10, 11, 12, + 13, 14, 15, 16}; + struct ip_addr remote_ip, local_ip; + u16_t data_len; + u16_t remote_port = 0x100, local_port = 0x101; + struct netif netif; + LWIP_UNUSED_ARG(_i); + + /* initialize local vars */ + memset(&netif, 0, sizeof(netif)); + IP4_ADDR(&local_ip, 192, 168, 1, 1); + IP4_ADDR(&remote_ip, 192, 168, 1, 2); + data_len = sizeof(data); + /* initialize counter struct */ + memset(&counters, 0, sizeof(counters)); + counters.expected_data_len = data_len; + counters.expected_data = data; + + /* create and initialize the pcb */ + pcb = test_tcp_new_counters_pcb(&counters); + EXPECT_RET(pcb != NULL); + tcp_set_state(pcb, ESTABLISHED, &local_ip, &remote_ip, local_port, remote_port); + + /* create segments */ + /* pinseq is sent as last segment! */ + pinseq = tcp_create_rx_segment(pcb, &data[0], 4, 0, 0, TCP_ACK); + /* p1: 8 bytes before FIN */ + /* seqno: 8..16 */ + p_8_9 = tcp_create_rx_segment(pcb, &data[8], 8, 8, 0, TCP_ACK|TCP_FIN); + /* p2: 4 bytes before p1, including the first 4 bytes of p1 (partly duplicate) */ + /* seqno: 4..11 */ + p_4_8 = tcp_create_rx_segment(pcb, &data[4], 8, 4, 0, TCP_ACK); + /* p3: same as p2 but 2 bytes longer */ + /* seqno: 4..13 */ + p_4_10 = tcp_create_rx_segment(pcb, &data[4], 10, 4, 0, TCP_ACK); + /* p4: 14 bytes before FIN, includes data from p1 and p2, plus partly from pinseq */ + /* seqno: 2..15 */ + p_2_14 = tcp_create_rx_segment(pcb, &data[2], 14, 2, 0, TCP_ACK); + /* FIN, seqno 16 */ + p_fin = tcp_create_rx_segment(pcb, NULL, 0,16, 0, TCP_ACK|TCP_FIN); + EXPECT(pinseq != NULL); + EXPECT(p_8_9 != NULL); + EXPECT(p_4_8 != NULL); + EXPECT(p_4_10 != NULL); + EXPECT(p_2_14 != NULL); + EXPECT(p_fin != NULL); + if ((pinseq != NULL) && (p_8_9 != NULL) && (p_4_8 != NULL) && (p_4_10 != NULL) && (p_2_14 != NULL) && (p_fin != NULL)) { + /* pass the segment to tcp_input */ + tcp_input(p_8_9, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 0); + EXPECT(counters.recved_bytes == 0); + EXPECT(counters.err_calls == 0); + /* check ooseq queue */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 1); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 8); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 9); /* includes FIN */ + + /* pass the segment to tcp_input */ + tcp_input(p_4_8, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 0); + EXPECT(counters.recved_bytes == 0); + EXPECT(counters.err_calls == 0); + /* check ooseq queue */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 2); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 4); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 4); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 1) == 8); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 1) == 9); /* includes FIN */ + + /* pass the segment to tcp_input */ + tcp_input(p_4_10, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 0); + EXPECT(counters.recved_bytes == 0); + EXPECT(counters.err_calls == 0); + /* ooseq queue: unchanged */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 2); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 4); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 4); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 1) == 8); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 1) == 9); /* includes FIN */ + + /* pass the segment to tcp_input */ + tcp_input(p_2_14, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 0); + EXPECT(counters.recved_bytes == 0); + EXPECT(counters.err_calls == 0); + /* check ooseq queue */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 2); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 2); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 6); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 1) == 8); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 1) == 9); /* includes FIN */ + + /* pass the segment to tcp_input */ + tcp_input(p_fin, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 0); + EXPECT(counters.recved_bytes == 0); + EXPECT(counters.err_calls == 0); + /* ooseq queue: unchanged */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 2); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 2); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 6); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 1) == 8); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 1) == 9); /* includes FIN */ + + /* pass the segment to tcp_input */ + tcp_input(pinseq, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 1); + EXPECT(counters.recv_calls == 1); + EXPECT(counters.recved_bytes == data_len); + EXPECT(counters.err_calls == 0); + EXPECT(pcb->ooseq == NULL); + } + + /* make sure the pcb is freed */ + EXPECT(lwip_stats.memp[MEMP_TCP_PCB].used == 1); + tcp_abort(pcb); + EXPECT(lwip_stats.memp[MEMP_TCP_PCB].used == 0); +} +END_TEST + + +/** create multiple segments and pass them to tcp_input in a wrong + * order to see if ooseq-caching works correctly + * FIN is received IN-SEQUENCE at the end */ +START_TEST(test_tcp_recv_ooseq_FIN_INSEQ) +{ + struct test_tcp_counters counters; + struct tcp_pcb* pcb; + struct pbuf *p_1_2, *p_4_8, *p_3_11, *p_2_12, *p_15_1, *p_15_1a, *pinseq, *pinseqFIN; + char data[] = { + 1, 2, 3, 4, + 5, 6, 7, 8, + 9, 10, 11, 12, + 13, 14, 15, 16}; + struct ip_addr remote_ip, local_ip; + u16_t data_len; + u16_t remote_port = 0x100, local_port = 0x101; + struct netif netif; + LWIP_UNUSED_ARG(_i); + + /* initialize local vars */ + memset(&netif, 0, sizeof(netif)); + IP4_ADDR(&local_ip, 192, 168, 1, 1); + IP4_ADDR(&remote_ip, 192, 168, 1, 2); + data_len = sizeof(data); + /* initialize counter struct */ + memset(&counters, 0, sizeof(counters)); + counters.expected_data_len = data_len; + counters.expected_data = data; + + /* create and initialize the pcb */ + pcb = test_tcp_new_counters_pcb(&counters); + EXPECT_RET(pcb != NULL); + tcp_set_state(pcb, ESTABLISHED, &local_ip, &remote_ip, local_port, remote_port); + + /* create segments */ + /* p1: 7 bytes - 2 before FIN */ + /* seqno: 1..2 */ + p_1_2 = tcp_create_rx_segment(pcb, &data[1], 2, 1, 0, TCP_ACK); + /* p2: 4 bytes before p1, including the first 4 bytes of p1 (partly duplicate) */ + /* seqno: 4..11 */ + p_4_8 = tcp_create_rx_segment(pcb, &data[4], 8, 4, 0, TCP_ACK); + /* p3: same as p2 but 2 bytes longer and one byte more at the front */ + /* seqno: 3..13 */ + p_3_11 = tcp_create_rx_segment(pcb, &data[3], 11, 3, 0, TCP_ACK); + /* p4: 13 bytes - 2 before FIN - should be ignored as contained in p1 and p3 */ + /* seqno: 2..13 */ + p_2_12 = tcp_create_rx_segment(pcb, &data[2], 12, 2, 0, TCP_ACK); + /* pinseq is the first segment that is held back to create ooseq! */ + /* seqno: 0..3 */ + pinseq = tcp_create_rx_segment(pcb, &data[0], 4, 0, 0, TCP_ACK); + /* p5: last byte before FIN */ + /* seqno: 15 */ + p_15_1 = tcp_create_rx_segment(pcb, &data[15], 1, 15, 0, TCP_ACK); + /* p6: same as p5, should be ignored */ + p_15_1a= tcp_create_rx_segment(pcb, &data[15], 1, 15, 0, TCP_ACK); + /* pinseqFIN: last 2 bytes plus FIN */ + /* only segment containing seqno 14 and FIN */ + pinseqFIN = tcp_create_rx_segment(pcb, &data[14], 2, 14, 0, TCP_ACK|TCP_FIN); + EXPECT(pinseq != NULL); + EXPECT(p_1_2 != NULL); + EXPECT(p_4_8 != NULL); + EXPECT(p_3_11 != NULL); + EXPECT(p_2_12 != NULL); + EXPECT(p_15_1 != NULL); + EXPECT(p_15_1a != NULL); + EXPECT(pinseqFIN != NULL); + if ((pinseq != NULL) && (p_1_2 != NULL) && (p_4_8 != NULL) && (p_3_11 != NULL) && (p_2_12 != NULL) + && (p_15_1 != NULL) && (p_15_1a != NULL) && (pinseqFIN != NULL)) { + /* pass the segment to tcp_input */ + tcp_input(p_1_2, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 0); + EXPECT(counters.recved_bytes == 0); + EXPECT(counters.err_calls == 0); + /* check ooseq queue */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 1); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 1); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 2); + + /* pass the segment to tcp_input */ + tcp_input(p_4_8, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 0); + EXPECT(counters.recved_bytes == 0); + EXPECT(counters.err_calls == 0); + /* check ooseq queue */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 2); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 1); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 2); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 1) == 4); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 1) == 8); + + /* pass the segment to tcp_input */ + tcp_input(p_3_11, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 0); + EXPECT(counters.recved_bytes == 0); + EXPECT(counters.err_calls == 0); + /* check ooseq queue */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 2); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 1); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 2); + /* p_3_11 has removed p_4_8 from ooseq */ + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 1) == 3); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 1) == 11); + + /* pass the segment to tcp_input */ + tcp_input(p_2_12, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 0); + EXPECT(counters.recved_bytes == 0); + EXPECT(counters.err_calls == 0); + /* check ooseq queue */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 3); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 1); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 1); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 1) == 2); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 1) == 1); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 2) == 3); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 2) == 11); + + /* pass the segment to tcp_input */ + tcp_input(pinseq, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 1); + EXPECT(counters.recved_bytes == 14); + EXPECT(counters.err_calls == 0); + EXPECT(pcb->ooseq == NULL); + + /* pass the segment to tcp_input */ + tcp_input(p_15_1, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 1); + EXPECT(counters.recved_bytes == 14); + EXPECT(counters.err_calls == 0); + /* check ooseq queue */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 1); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 15); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 1); + + /* pass the segment to tcp_input */ + tcp_input(p_15_1a, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 0); + EXPECT(counters.recv_calls == 1); + EXPECT(counters.recved_bytes == 14); + EXPECT(counters.err_calls == 0); + /* check ooseq queue: unchanged */ + EXPECT_OOSEQ(tcp_oos_count(pcb) == 1); + EXPECT_OOSEQ(tcp_oos_seg_seqno(pcb, 0) == 15); + EXPECT_OOSEQ(tcp_oos_seg_tcplen(pcb, 0) == 1); + + /* pass the segment to tcp_input */ + tcp_input(pinseqFIN, &netif); + /* check if counters are as expected */ + EXPECT(counters.close_calls == 1); + EXPECT(counters.recv_calls == 2); + EXPECT(counters.recved_bytes == data_len); + EXPECT(counters.err_calls == 0); + EXPECT(pcb->ooseq == NULL); + } + + /* make sure the pcb is freed */ + EXPECT(lwip_stats.memp[MEMP_TCP_PCB].used == 1); + tcp_abort(pcb); + EXPECT(lwip_stats.memp[MEMP_TCP_PCB].used == 0); +} +END_TEST + +/** Create the suite including all tests for this module */ +Suite * +tcp_oos_suite(void) +{ + TFun tests[] = { + test_tcp_recv_ooseq_FIN_OOSEQ, + test_tcp_recv_ooseq_FIN_INSEQ, + }; + return create_suite("TCP_OOS", tests, sizeof(tests)/sizeof(TFun), tcp_oos_setup, tcp_oos_teardown); +} diff --git a/bertos/net/lwip/test/unit/tcp/test_tcp_oos.h b/bertos/net/lwip/test/unit/tcp/test_tcp_oos.h new file mode 100644 index 0000000..5e411f0 --- /dev/null +++ b/bertos/net/lwip/test/unit/tcp/test_tcp_oos.h @@ -0,0 +1,8 @@ +#ifndef __TEST_TCP_OOS_H__ +#define __TEST_TCP_OOS_H__ + +#include "../lwip_check.h" + +Suite *tcp_oos_suite(void); + +#endif diff --git a/bertos/net/lwip/test/unit/udp/test_udp.c b/bertos/net/lwip/test/unit/udp/test_udp.c new file mode 100644 index 0000000..d9b407e --- /dev/null +++ b/bertos/net/lwip/test/unit/udp/test_udp.c @@ -0,0 +1,80 @@ +#include "test_udp.h" + +#include "lwip/udp.h" +#include "lwip/stats.h" + +#if !LWIP_STATS || !UDP_STATS || !MEMP_STATS +#error "This tests needs UDP- and MEMP-statistics enabled" +#endif + +/* Helper functions */ +static void +udp_remove_all(void) +{ + struct udp_pcb *pcb = udp_pcbs; + struct udp_pcb *pcb2; + + while(pcb != NULL) { + pcb2 = pcb; + pcb = pcb->next; + udp_remove(pcb2); + } + fail_unless(lwip_stats.memp[MEMP_UDP_PCB].used == 0); +} + +/* Setups/teardown functions */ + +static void +udp_setup(void) +{ + udp_remove_all(); +} + +static void +udp_teardown(void) +{ + udp_remove_all(); +} + + +/* Test functions */ + +START_TEST(test_udp_new_remove) +{ + struct udp_pcb* pcb; + LWIP_UNUSED_ARG(_i); + + fail_unless(lwip_stats.memp[MEMP_UDP_PCB].used == 0); + + pcb = udp_new(); + fail_unless(pcb != NULL); + if (pcb != NULL) { + fail_unless(lwip_stats.memp[MEMP_UDP_PCB].used == 1); + udp_remove(pcb); + fail_unless(lwip_stats.memp[MEMP_UDP_PCB].used == 0); + } +} +END_TEST + +START_TEST(test_udp_remove) +{ + struct udp_pcb* pcb; + LWIP_UNUSED_ARG(_i); + + pcb = NULL; + //pcb = udp_new(); + //fail_unless(pcb != NULL); +} +END_TEST + + +/** Create the suite including all tests for this module */ +Suite * +udp_suite(void) +{ + TFun tests[] = { + test_udp_new_remove, + test_udp_remove + }; + return create_suite("UDP", tests, sizeof(tests)/sizeof(TFun), udp_setup, udp_teardown); +} diff --git a/bertos/net/lwip/test/unit/udp/test_udp.h b/bertos/net/lwip/test/unit/udp/test_udp.h new file mode 100644 index 0000000..9335368 --- /dev/null +++ b/bertos/net/lwip/test/unit/udp/test_udp.h @@ -0,0 +1,8 @@ +#ifndef __TEST_UDP_H__ +#define __TEST_UDP_H__ + +#include "../lwip_check.h" + +Suite* udp_suite(void); + +#endif diff --git a/bertos/net/nmea.c b/bertos/net/nmea.c new file mode 100644 index 0000000..f748795 --- /dev/null +++ b/bertos/net/nmea.c @@ -0,0 +1,474 @@ +/** + * \file + * + * + * \brief NMEA parser implementation. + * + * NMEA 0183 is acronym of National Marine Electronics Association that + * combined electrical and data specification for communication between marine + * electronic devices such as echo sounder, sonars, anemometer (wind speed and direction), + * gyrocompass, autopilot, GPS receivers and many other types of instruments. + * It has been defined by, and is controlled by, the U.S.-based National Marine + * Electronics Association. + * The NMEA 0183 standard uses a simple ASCII, serial communications protocol + * that defines how data is transmitted in a "sentence" from one "talker" + * to multiple "listeners" at a time. + * At the application layer, the standard also defines the contents of each sentence + * (message) type so that all listeners can parse messages accurately. + * + * + * \author Daniele Basile + * + * notest:avr + */ + +#include "nmea.h" + +#include "cfg/cfg_nmea.h" + +#include + +#define LOG_LEVEL NMEA_LOG_LEVEL +#define LOG_FORMAT NMEA_LOG_FORMAT +#include + +#include + +#include +#include +#include +#include + +/* + * Make conversion from one string to int. + * + * You can specify the precision if the string is a float + * number. The result is an int multiplied to 10^precision. + */ +static uint32_t tokenToInt(const char *s, int precision) +{ + uint32_t num = 0; + bool sep_found = false; + int i; + + if (!s) + return 0; + + for(i = 0; i < NMEAP_MAX_SENTENCE_LENGTH; i++) + { + unsigned char c = *s++; + + if (c == '.') + { + sep_found = true; + continue; + } + + if (c == '\0' || !isdigit(c) || (precision == 0 && sep_found)) + break; + + if (sep_found) + precision--; + + num *= 10; + num += c - '0'; + } + + while (precision--) + num *= 10; + + return num; +} + +/* + * Convert a string to micro degree. + */ +static udegree_t convertToDegree(const char *str) +{ + uint32_t dec; + uint32_t deg; + uint32_t min; + + if (*str == 0) + return 0; + + dec = tokenToInt(str, 4); + deg = dec / 1000000; + min = dec - deg * 1000000; + dec = deg * 1000000 + ((min * 5) + 1) / 3; + + return dec; +} + +/* + * Retun latitude in micro degree from a string. + */ +static udegree_t nmea_latitude(const char *plat, const char *phem) +{ + int ns; + + if (*phem == 0) + return 0; + + /* north lat is +, south lat is - */ + ns = (*phem == 'N') ? 1 : -1; + + + return ns * convertToDegree(plat); +} + +/* + * Retun longitude in micro degree from a string. + */ +static udegree_t nmea_longitude(const char *plot, const char *phem) +{ + int ew; + + if (*phem == 0) + return 0; + + /* west long is negative, east long is positive */ + ew = (*phem == 'E') ? 1 : -1; + + return ew * convertToDegree(plot); +} + +/* + * Return altitude in meter from a string. + * + */ +static int32_t nmea_altitude(const char *palt, const char *punits) +{ + int32_t alt; + + if (*palt == 0) + return 0; + + alt = atoi(palt); + + if (*punits == 'F') + { + /* convert to feet */ + /* alt = alt * 3.2808399 */ + alt = alt * 3 + /* 3.0 */ + (alt >> 2) + /* 0.25 */ + (alt >> 6) + /* 0.015625 */ + (alt >> 7) + /* 0.0078125 */ + (alt >> 8); /* 0,00390625 */ + + } + + return alt; +} + +/* + * Convert time and date stamp string to unix time. + */ +static time_t timestampToSec(uint32_t time_stamp, uint32_t date_stamp) +{ + struct tm t; + uint16_t msec; + uint16_t tmr[3]; + uint16_t date[3]; + + memset(&t, 0, sizeof(t)); + memset(&tmr, 0, sizeof(tmr)); + memset(&date, 0, sizeof(date)); + + LOG_INFO("time_s[%lu],date[%lu]\n", (long)time_stamp, (long)date_stamp); + uint32_t res = time_stamp / 1000; + uint32_t all = time_stamp; + msec = all - res * 1000; + + for (int i = 0; i < 3; i++) + { + all = res; + res = all / 100; + tmr[i] = all - res * 100; + LOG_INFO("t[%d]%d\n", tmr[i],i); + } + + t.tm_sec = tmr[0] + (ROUND_UP(msec, 1000) / 1000); + t.tm_min = tmr[1]; + t.tm_hour = tmr[2]; + //If we do not have refence data, we set 1/1/1970 as default + t.tm_mday = 1; + t.tm_mon = 0; + t.tm_year = 70; + + if (date_stamp) + { + res = all = date_stamp; + for (int i = 0; i < 3; i++) + { + all = res; + res = all / 100; + date[i] = all - res * 100; + LOG_INFO("d[%d]%d\n", date[i],i); + } + t.tm_mday = date[2]; + t.tm_mon = date[1] - 1; // time struct count month from 0 to 11; + // we should specify the number of years from 1900, but the year field + // is only two digits, so we add 100 (2000 - 1900).. + t.tm_year = date[0] + 100; + } + LOG_INFO("times=%d,%d,%d,%d,%d,%d\n",t.tm_sec, t.tm_min, t.tm_hour, t.tm_year, t.tm_mon, t.tm_mday); + + return mktime(&t); +} + +/** + * Callout example for GGA data + */ +void gpgga_callout(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + (void)data; + LOG_INFOB( + NmeaGga *gga = (NmeaGga *)data; + LOG_INFO("Found GPGGA message %ld %ld %d %lu %d %d %d %d\n", + (long)gga->latitude, + (long)gga->longitude, + gga->altitude, + gga->time, + gga->satellites, + gga->quality, + gga->hdop, + gga->geoid); + ); +} + +/** + * Callout example for RMC + */ +void gprmc_callout(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + (void)data; + LOG_INFOB( + NmeaRmc *rmc = (NmeaRmc *)data; + + LOG_INFO("Found GPRMC message %lu %c %ld %ld %d %d %d\n", + rmc->time, + rmc->warn, + (long)rmc->latitude, + (long)rmc->longitude, + rmc->speed, + rmc->course, + rmc->mag_var); + ); +} + +/** + * Callout example for GSV data + */ +void gpgsv_callout(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + (void)data; + LOG_INFOB( + NmeaGsv *gsv = (NmeaGsv *)data; + + LOG_INFO("Found GPGSV message %d %d %d\n", gsv->tot_message, gsv->message_num, gsv->tot_svv); + + for (int i = 0; i < 4; i++) + LOG_INFO("%d %d %d %d\n", gsv->info[i].sv_prn, gsv->info[i].elevation, gsv->info[i].azimut, gsv->info[i].snr); + ); +} + +/** + * Callout example for VTG data + */ +void gpvtg_callout(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + (void)data; + LOG_INFOB( + NmeaVtg *vtg = (NmeaVtg *)data; + LOG_INFO("Found GPVTG message %d %d %d\n", vtg->track_good, vtg->knot_speed, vtg->km_speed); + ); +} + + + +/** + * standard GPGGA sentence parser + */ +int nmea_gpgga(nmeap_context_t *context, nmeap_sentence_t *sentence) +{ + /* + * get pointer to sentence data + */ + NmeaGga *gga = (NmeaGga *)sentence->data; + + ASSERT(gga); + ASSERT(context->tokens >= 12); + + gga->latitude = nmea_latitude(context->token[2],context->token[3]); + gga->longitude = nmea_longitude(context->token[4],context->token[5]); + gga->altitude = nmea_altitude(context->token[9],context->token[10]); + gga->time = timestampToSec(tokenToInt(context->token[1], 3), 0); + gga->satellites = atoi(context->token[7]); + gga->quality = atoi(context->token[6]); + gga->hdop = tokenToInt(context->token[8], 1); + gga->geoid = nmea_altitude(context->token[11],context->token[12]); + + /* + * if the sentence has a callout, call it + */ + + if (sentence->callout != 0) + (*sentence->callout)(context, gga, context->user_data); + + return NMEA_GPGGA; +} + +/** + * standard GPRMCntence parser + */ +int nmea_gprmc(nmeap_context_t *context, nmeap_sentence_t *sentence) +{ + + /* + * get pointer to sentence data + */ + NmeaRmc *rmc = (NmeaRmc *)sentence->data; + + ASSERT(rmc); + ASSERT(context->tokens >= 10); + + /* + * extract data from the tokens + */ + rmc->time = timestampToSec(tokenToInt(context->token[1], 3), tokenToInt(context->token[9], 0)); + rmc->warn = *context->token[2]; + rmc->latitude = nmea_latitude(context->token[3],context->token[4]); + rmc->longitude = nmea_longitude(context->token[5],context->token[6]); + rmc->speed = atoi(context->token[7]); + rmc->course = atoi(context->token[8]); + rmc->mag_var = atoi(context->token[10]); + + if (sentence->callout != 0) + (*sentence->callout)(context, rmc, context->user_data); + + return NMEA_GPRMC; +} + + +/** + * standard GPVTG sentence parser + */ +int nmea_gpvtg(nmeap_context_t *context, nmeap_sentence_t *sentence) +{ + + /* + * get pointer to sentence data + */ + NmeaVtg *vtg = (NmeaVtg *)sentence->data; + + ASSERT(vtg); + ASSERT(context->tokens >= 7); + + /* + * extract data from the tokens + */ + vtg->track_good = atoi(context->token[1]); + vtg->knot_speed = atoi(context->token[5]); + vtg->km_speed = atoi(context->token[7]); + + /* + * if the sentence has a callout, call it + */ + if (sentence->callout != 0) + (*sentence->callout)(context, vtg, context->user_data); + + return NMEA_GPVTG; +} + +/** + * standard GPGDSV sentence parser + */ +int nmea_gpgsv(nmeap_context_t *context, nmeap_sentence_t *sentence) +{ + /* + * get pointer to sentence data + */ + NmeaGsv *gsv = (NmeaGsv *)sentence->data; + + + /* + * extract data from the tokens + */ + gsv->tot_message = atoi(context->token[1]); + gsv->message_num = atoi(context->token[2]); + gsv->tot_svv = atoi(context->token[3]); + + // Fill remaning member until we have token + int j = 0; + for (int i = 4; i < context->tokens - 3; i += 4, j++) + { + + gsv->info[j].sv_prn = atoi(context->token[i]); + gsv->info[j].elevation = atoi(context->token[i + 1]); + gsv->info[j].azimut = atoi(context->token[i + 2]); + gsv->info[j].snr = atoi(context->token[i + 3]); + } + + /* + * if the sentence has a callout, call it + */ + if (sentence->callout != 0) + (*sentence->callout)(context, gsv, context->user_data); + + return NMEA_GPGSV; +} + + +/** + * Parse NMEA sentence from a channel. + */ +void nmea_poll(nmeap_context_t *context, KFile *channel) +{ + int c, e; + while ((c = kfile_getc(channel)) != EOF) + nmeap_parse(context, c); + + if ((e = kfile_error(channel))) + { + LOG_ERR("ch error [%0X]\n", e); + kfile_clearerr(channel); + } +} + diff --git a/bertos/net/nmea.h b/bertos/net/nmea.h new file mode 100644 index 0000000..184a7a0 --- /dev/null +++ b/bertos/net/nmea.h @@ -0,0 +1,151 @@ +/** + * \file + * + * \brief NMEA Parser. + * + * \author Daniele Basile + * + * $WIZ$ module_name = "nmea" + * $WIZ$ module_configuration = "bertos/cfg/cfg_nmea.h" + * $WIZ$ module_depends = "kfile", "nmeap01" + */ + +#ifndef NET_NMEA_H +#define NET_NMEA_H + +#include "cfg/cfg_nmea.h" + +#include + +#include + +#include + +/* + * Implemented NMEA parser strings. + */ +#define NMEA_GPGGA 1 // GGA MESSAGE ID +#define NMEA_GPRMC 2 // RMC MESSAGE ID +#define NMEA_GPVTG 3 // VTG MESSAGE ID +#define NMEA_GPGSV 4 // GSV MESSAGE ID + +// Standart type to rappresent fiels. +typedef int32_t udegree_t; // Micro degrees +typedef int32_t mdegree_t; // Milli degrees +typedef int16_t degree_t; // Degrees + + +/** + * Global Positioning System Fix Data. + * Extracted data from a GGA message + * + * Note: time member contains the seconds elapsed from 00:00:00 1/1/1970, + * because from nmea sentence we read only the time of UTC position, we + * have not any reference of date (day, month and year) so time is referred to + * the start of unix time. + */ +typedef struct NmeaGga +{ + udegree_t latitude; /* Latitude (micro degree) */ + udegree_t longitude; /* Longitude (micro degree) */ + int32_t altitude; /* Altitude (Meter) */ + time_t time; /* UTC of position (Unix time) */ + uint16_t satellites; /* Satellites are in view */ + uint16_t quality; /* Fix Quality: 0 = Invalid; 1 = GPS fix; 2 = DGPS fix; */ + uint16_t hdop; /* Relative accuracy of horizontal position (hdop * 10) */ + int16_t geoid; /* Height of geoid above WGS84 ellipsoid (Meter) */ +} NmeaGga; + +/** + * Recommended minimum specific GPS/Transit data. + * Extracted data from an RMC message + * + * Note: RMC sentences contain also date stamp so, time contains real seconds elapsed + * from 0:00:00 1/1/1970. + */ +typedef struct NmeaRmc +{ + time_t time; /* UTC of position (Unix time) */ + char warn; /* Navigation receiver warning A = OK, V = warning */ + udegree_t latitude; /* Latitude (micro degree) */ + udegree_t longitude; /* Longitude (micro degree) */ + uint16_t speed; /* Speed over ground (knots) */ + degree_t course; /* Track made good in degrees True (degree) */ + degree_t mag_var; /* Magnetic variation degrees (degree) */ +} NmeaRmc; + +/** + * Extracted data from an vtg message + */ +typedef struct NmeaVtg +{ + degree_t track_good; /* True track made good (degree) */ + uint16_t knot_speed; /* Speed over ground (knots) */ + uint16_t km_speed; /* Speed over ground in kilometers/hour */ +} NmeaVtg; + +/** + * Extracted data from an gsv message + */ +struct SvInfo +{ + uint16_t sv_prn; /* SV PRN number */ + degree_t elevation; /* Elevation in degrees, 90 maximum */ + degree_t azimut; /* Azimuth, degrees from true north, 000 to 359 */ + uint16_t snr; /* SNR, 00-99 dB (null when not tracking) */ +}; + +typedef struct NmeaGsv +{ + uint16_t tot_message; /* Total number of messages of this type in this cycle */ + uint16_t message_num; /* Message number */ + uint16_t tot_svv; /* Total number of SVs in view */ + struct SvInfo info[4]; /* Stanrd gsv nmea report up to 4 sv info */ +} NmeaGsv; + +void nmea_poll(nmeap_context_t *context, KFile *channel); + +int nmea_gpgsv(nmeap_context_t *context, nmeap_sentence_t *sentence); +int nmea_gpvtg(nmeap_context_t *context, nmeap_sentence_t *sentence); +int nmea_gprmc(nmeap_context_t *context, nmeap_sentence_t *sentence); +int nmea_gpgga(nmeap_context_t *context, nmeap_sentence_t *sentence); + +// Example of callout +void gpgga_callout(nmeap_context_t *context, void *data, void *user_data); +void gprmc_callout(nmeap_context_t *context, void *data, void *user_data); +void gpgsv_callout(nmeap_context_t *context, void *data, void *user_data); +void gpvtg_callout(nmeap_context_t *context, void *data, void *user_data); + +int nmea_testSetup(void); +int nmea_testTearDown(void); +int nmea_testRun(void); + +#endif /* NET_NMEA_H */ diff --git a/bertos/net/nmea_test.c b/bertos/net/nmea_test.c new file mode 100644 index 0000000..6292774 --- /dev/null +++ b/bertos/net/nmea_test.c @@ -0,0 +1,1034 @@ +/** + * \file + * + * + * \brief NMEA parser test. + * + * \author Daniele Basile + * + * notest:avr + */ + +#include "nmea.h" + +#include + +#include +#define LOG_LEVEL 3 +#define LOG_FORMAT NMEA_LOG_FORMAT +#include + +#include + +#include //strncmp + +static nmeap_context_t nmea; /* parser context */ +static NmeaRmc rmc; +static NmeaGga gga; +static NmeaGsv gsv; +static NmeaVtg vtg; + +static KFileMem mem; + +static uint8_t nmea_test[] = +{ +/* For these first sentences, we have a test_vector */ +"$GPRMC,170525.949,A,4351.0843,N,01108.8687,E,0.00,237.67,051009,,,A*61\r\n" /* acquired */ +"$GPVTG,237.67,T,,,0.00,N,0.00,K,A*77\r\n" /* acquired */ +"$GPGSV,3,1,09,3,78,302,37,6,87,031,,7,05,292,37,14,05,135,*48\r\n" /* acquired */ +"$GPGGA,170527.949,4351.0842,N,01108.8685,E,1,05,02.6,57.4,M,45.2,M,,*5C\r\n" /* acquired */ +"$GPGGA,170527.949,4351.0842,N,01108.8685,E,1,05,02.6,-57.4,M,45.2,M,,*71\r\n" /* acquired */ +"$GPGGA,170527.949,4351.0842,S,01108.8685,W,1,05,02.6,-57.4,M,-45.2,M,,*53\r\n" + +"$GPGGA,100019.604,4351.1480,N,01108.8750,E,1,03,16.8,0.0,M,45.2,M,,*64\r\n" +"$GPRMC,100019.604,A,4351.1480,N,01108.8750,E,2.03,134.29,131009,,,A*6F\r\n" +"$GPVTG,134.29,T,,,2.03,N,3.75,K,A*7D\r\n" +"$GPGGA,100020.604,4351.1491,N,01108.8751,E,1,03,16.8,0.0,M,45.2,M,,*6F\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,31,14,38,267,*49\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,35,30,68,313,*73\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100020.604,A,4351.1491,N,01108.8751,E,2.11,134.29,131009,,,A*67\r\n" +"$GPVTG,134.29,T,,,2.11,N,3.91,K,A*74\r\n" +"$GPGGA,100021.603,4351.1486,N,01108.8751,E,1,03,16.8,0.0,M,45.2,M,,*6F\r\n" +"$GPRMC,100021.603,A,4351.1486,N,01108.8751,E,2.18,134.29,131009,,,A*6E\r\n" +"$GPVTG,134.29,T,,,2.18,N,4.05,K,A*77\r\n" +"$GPGGA,100022.603,4351.1470,N,01108.8750,E,1,03,16.8,0.0,M,45.2,M,,*64\r\n" +"$GPRMC,100022.603,A,4351.1470,N,01108.8750,E,2.17,134.29,131009,,,A*6A\r\n" +"$GPVTG,134.29,T,,,2.17,N,4.01,K,A*7C\r\n" +"$GPGGA,100023.603,4351.1453,N,01108.8747,E,1,03,16.8,0.0,M,45.2,M,,*62\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,31,14,38,267,*49\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,33,29,42,214,36,30,68,313,*77\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100023.603,A,4351.1453,N,01108.8747,E,2.28,134.29,131009,,,A*60\r\n" +"$GPVTG,134.29,T,,,2.28,N,4.22,K,A*71\r\n" +"$GPGGA,100024.603,4351.1450,N,01108.8746,E,1,03,16.8,0.0,M,45.2,M,,*67\r\n" +"$GPRMC,100024.603,A,4351.1450,N,01108.8746,E,2.28,134.29,131009,,,A*65\r\n" +"$GPVTG,134.29,T,,,2.28,N,4.22,K,A*71\r\n$GPGG25.603,4351.1442,N,01108.8745,E,1,03,16.8,0.0,M,45.2,M,,*66\n" +"$GPRMC,100025.603,A,4351.1442,N,01108.8745,E,2.40,134.29,131009,,,A*6A\r\n" +"$GPVTG,134.29,T,,,2.40,N,4.45,K,A*7E\r\n" +"$GPGGA,100026.602,4351.1433,N,01108.8744,E,1,03,16.8,0.0,M,45.2,M,,*63\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,31,14,38,267,*49\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,33,29,42,214,36,30,68,313,*77\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100026.602,A,4351.1433,N,01108.8744,E,2.48,187.14,131009,,,A*61\r\n" +"$GPVTG,187.14,T,,,2.48,N,4.59,K,A*7D\r\n" +"$GPGGA,100027.602,4351.1425,N,01108.8743,E,1,03,16.8,0.0,M,45.2,M,,*62\r\n" +"$GPRMC,100027.602,A,4351.1425,N,01108.8743,E,2.39,185.89,131009,,,A*60\r\n" +"$GPVTG,185.89,T,,,2.39,N,4.42,K,A*77\r\n" +"$GPGGA,100028.602,4351.1424,N,01108.8743,E,1,03,16.8,0.0,M,45.2,M,,*6C\r\n" +"$GPRMC,100028.602,A,4351.1424,N,01108.8743,E,2.18,187.33,131009,,,A*6E\r\n" +"$GPVTG,187.33,T,,,2.18,N,4.04,K,A*75\r\n" +"$GPGGA,100029.602,4351.1399,N,01108.8739,E,1,03,16.8,0.0,M,45.2,M,,*61\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,31,14,38,267,*49\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,35,30,68,313,*73\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100029.602,A,4351.1399,N,01108.8739,E,1.98,188.78,131009,,,A*68\r\n" +"$GPVTG,188.78,T,,,1.98,N,3.67,K,A*7C\r\n" +"$GPGGA,100030.602,4351.1393,N,01108.8738,E,1,03,16.8,0.0,M,45.2,M,,*6ds2\r\n" +"$GPRMC,100030.602,A,4351.1393,N,01108.8738,E,1.90,188.62,131009,,,A*68\r\n" +"$GPVTG,188.62,T,,,1.90,N,3.53,K,A*78\r\n" +"$GPGGA,100031.601,4351.1389,N,01108.8737,E,1,03,16.8,0.0,M,45.2,M,,*64\r\n" +"$GPRMC,100031.601,A,adfsd4351.1389,N,01108.8737,E,1.82,188.25,131009,,,A*6E\r\n" +"$GPVTG,188.25,T,,,1.82,N,3.37,K,A*7A\r" +"$GadafPGGA,100032.601,4351.1384,N,01108.8737,E,1,03,16.8,0.0,M,45.2,M,,*6A\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,30,14,38,267,*48\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,33,29,42,214,35,30,68,313,*74\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100032.601,A,4351.1384,N,01108.8737,E,1.76,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,1.76,N,3.27,K,A*75\r\n" +"$GPGGA,100033.601,4351.1379,N,01108.8735,E,1,02,16.8,0.0,M,45.2,M,,*6A\r\n" +"$GPRMC,100033.601,A,4351.1379,N,01108.8735,E,1.72,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,1.72,N,3.18,K,A*7D\r\n" +"$GPGGA,100034.601,4351.1376,N,01108.8735,E,1,03,16.8,0.0,M,45.2,M,,*63\r\n" +"$GPRMC,100034.601,A,4351.1376,N,01108.8735,E,1.49,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,1.49,N,2.76,K,A*7C\r\n" +"$GPGGA,100035.600,4351.1374,N,01108.8735,E,1,03,16.8,0.0,M,45.2,M,,*61\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,30,14,38,267,*48\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,33,29,42,214,36,30,68,313,*77\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100035.600,A,4351.1374,N,01108.8735,E,1.22,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,1.22,N,2.26,K,A*74\r\n" +"$GPGGA,100036.600,4351.1374,N,01108.8736,E,1,03,16.8,0.0,M,45.2,M,,*61\r\n" +"$GPRMC,100036.600,A,4351.1374,N,01108.8736,E,0.00,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100037.600,4351.1373,N,01108.8734,E,1,03,16.8,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100037.600,A,4351.1373,N,01108.8734,E,0.00,187.49,131009,,,A*61\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100038.600,4351.1371,N,01108.8734,E,1,03,16.8,-0.0,M,45.2,M,,*45\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,30,14,38,267,*48\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,36,30,68,313,*70\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100038.600,A,4351.1371,N,01108.8734,E,0.00,187.49,131009,,,A*6C\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100039.600,4351.1370,N,01108.8734,E,1,03,16.8,-0.0,M,45.2,M,,*45\r\n" +"$GPRMC,100039.600,A,4351.1370,N,01108.8734,E,0.00,187.49,131009,,,A*6C\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100040.599,4351.1368,N,01108.8733,E,1,03,16.8,-0.0,M,45.2,M,,*46\r\n" +"$GPRMC,100040.599,A,4351.1368,N,01108.8733,E,0.00,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100041.599,4351.1367,N,01108.8733,E,1,03,16.8,-0.0,M,45.2,M,,*48\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,30,14,38,267,*48\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,36,30,68,313,30*73\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100041.599,A,4351.1367,N,01108.8733,E,1.04,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,1.04,N,1.93,K,A*7D\r\n" +"$GPGGA,100042.599,4351.1365,N,01108.8732,E,1,03,16.8,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100042.599,A,4351.1365,N,01108.8732,E,1.10,187.49,131009,,,A*61\r\n" +"$GPVTG,187.49,T,,,1.10,N,2.04,K,A*75\r\n" +"$GPGGA,100043.599,4351.1361,N,01108.ad2,E,1,03,16.8,-0.0,M,45.2,M,,*4D\r\n" +"$GPRMC,100043.599,A,4351.1361,N,01108.8732,E,1.12,187.49,131009,,,A*66\r\n" +"$GPVTG,187.49,T,,,1.12,N,2.07,K,A*74\r\n" +"$GPGGA,100044.599,4351.1358,N,01108.8732,E,1,03,16.8,-0.0,M,45.2,M,,*40\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,142,30,14,38,267,*48\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,36,30,68,313,30*73\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC,100044.599,A,4351.1358,N,01108.8732,E,1.06,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,1.06,N,1.95,K,A*79\r\n" +"$GPGGA,100045.598,4351.1357,N,01108.8731,E,1,03,16.8,-0.0,M,45.2,M,,*4C\r\n" +"$GPRMC,100045.598,A,4351.1357,N,01108.8731,E,0.00,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100046.598,4351.1356,N,01108.8731,E,1,03,16.8,-0.0,M,45.2,M,,*4E\r\n" +"$GPRMC,100046.598,A,4351.1356,N,01108.8731,E,0.00,187.49,131009,,,A*67\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100047.598,4351.1356,N,01108.8731,E,1,03,16.8,-0.0,M,45.2,M,,*4F\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.8,16.8,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,143,29,14,38,267,*41\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,36,30,68,313,30*73\r\n" +"$GPGSV,3,3,09,31,09,314,,,,,,,,,,,,,*4D\r\n" +"$GPRMC," +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100048.598,4351.1355,N,01108.8732,E,1,03,16.8,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100048.598,A,4351.1355,N,01108.8732,E,0.00,187.49,131009,,,A*69\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100049.597,4351.1356,N,01108.8731,E,1,03,16.9,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100049.597,A,4351.1356,N,01108.8731,E,0.00,187.49,131009,,,A*67\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100050.597,4351.1354,N,01108.8732,E,1,03,16.9,-0.0,M,45.2,M,,*46\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,143,29,14,38,266,*40\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,35,30,69,313,30*71\r\n" +"$GPGSV,3,3,09,31,10,314,,,,,,,,,,,,,*45\r\n" +"$GPRMC,100050.597,A,4351.1354,N,01108.8732,E,0.00,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100051.597,4351.1354,N,01108.8731,E,1,03,16.9,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100051.597,A,4351.1354,N,01108.8731,E,0.00,187.49,131009,,,A*6C\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100052.597,4351.1353,N,01108.8731,E,1,03,16.9,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100052.597,A,4351.1353,N,01108.8731,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100053.597,4351.1352,N,01108.8731,E,1,03,16.9,-0.0,M,45.2,M,,*40\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,143,29,14,38,266,*40\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,35,30,69,313,30*71\r\n" +"$GPGSV,3,3,09,31,10,314,,,,,,,,,,,,,*45\r\n" +"$GPRMC,100053.597,A,4351.1352,N,01108.8731,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100054.596,4351.1351,N,01108.8730,E,1,03,16.9,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100054.596,A,4351.1351,N,01108.8730,E,0.00,187.49,131009,,,A*6C\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100055.596,4351.1349,N,01108.8731,E,1,03,16.9,-0.0,M,45.2,M,,*4D\r\n" +"$GPRMC,100055.596,A,4351.1349,N,01108.8731,E,0.00,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100056.596,4351.1347,N,01108.8730,E,1,03,16.9,-0.0,M,45.2,M,,*41\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,32,143,29,14,38,266,*40\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,35,30,69,313,30*71\r\n" +"$GPGSV,3,3,09,31,10,314,,,,,,,,,,,,,*45\r\n" +"$GPRMC,100056.596,A,4351.1347,N,01108.8730,E,0.00,187.49,131009,,,A*69\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100057.596,4351.1344,N,01108.8729,E,1,03,16.9,-0.0,M,45.2,M,,*4B\r\n" +"$GPRMC,100057.596,A,4351.1344,N,01108.8729,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100058.595,4351.1343,N,01108.8730,E,1,03,16.9,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100058.595,A,4351.1343,N,01108.8730,E,1.01,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,1.01,N,1.86,K,A*7C\r\n" +"$GPGGA,100059.595,4351.1341,N,01108.8729,E,1,03,16.9,0.0,M,45.2,M,,*6E\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,09,2,34,087,,4,20,052,,9,31,143,30,14,38,266,*4B\r\n" +"$GPGSV,3,2,09,26,35,232,,27,25,143,34,29,42,214,36,30,69,313,30*72\r\n" +"$GPGSV,3,3,09,31,10,314,,,,,,,,,,,,,*45\r\n" +"$GPRMC,100059.595,A,4351.1341,N,01108.8729,E,1.28,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,1.28,N,2.37,K,A*7E\r\n" +"$GPGGA,100100.595,4351.1337,N,01108.8728,E,1,03,16.9,0.0,M,45.2,M,,*63\r\n" +"$GPRMC,100100.595,A,4351.1337,N,01108.8728,E,1.38,187.49,131009,,,A*6C\r\n" +"$GPVTG,187.49,T,,,1.38,N,2.55,K,A*7B\r\n" +"$GPGGA,100101.595,4351.1334,N,01108.8728,E,1,03,16.9,0.0,M,45.2,M,,*61\r\n" +"$GPRMC,100101.595,A,4351.1334,N,01108.8728,E,1.51,187.49,131009,,,A*61\r\n" +"$GPVTG,187.49,T,,,1.51,N,2.79,K,A*7A\r\n" +"$GPGGA,100102.595,4351.1331,N,01108.8727,E,1,03,16.9,0.0,M,45.2,M,,*68\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,30,12,62,057,*4B\r\n" +"$GPGSV,3,2,10,14,38,266,,26,35,232,,27,25,143,34,29,42,214,35*7B\r\n" +"$GPGSV,3,3,10,30,69,313,30,31,10,314,,,,,,,,,*73\r\n" +"$GPRMC,100102.595,A,4351.1331,N,01108.8727,E,1.57,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,1.57,N,2.91,K,A*7A\r\n" +"$GPGGA,100103.594,4351.1328,N,01108.8727,E,1,03,16.9,0.0,M,45.2,M,,*60\r\n" +"$GPRMC,100103.594,A,4351.1328,N,01108.8727,E,1.54,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,1.54,N,2.86,K,A*7F\r\n" +"$GPGGA,100104.594,4351.1326,N,01108.8727,E,1,03,16.9,0.0,M,45.2,M,,*69\r\n" +"$GPRMC,100104.594,A,4351.1326,N,01108.8727,E,1.38,187.49,131009,,,A*66\r\n" +"$GPVTG,187.49,T,,,1.38,N,2.56,K,A*78\r\n" +"$GPGGA,100105.594,4351.1322,N,01108.8726,E,1,03,16.9,0.0,M,45.2,M,,*6D\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,29,12,62,057,*43\r\n" +"$GPGSV,3,2,10,14,38,266,,26,35,232,,27,25,143,34,29,42,214,36*78\r\n" +"$GPGSV,3,3,10,30,69,313,30,31,10,314,,,,,,,,,*73\r\n" +"$GPRMC,100105.594,A,4351.1322,N,01108.8726,E,1.36,187.49,131009,,,A*6C\r\n" +"$GPVTG,187.49,T,,,1.36,N,2.53,K,A*73\r\n" +"$GPGGA,100106.594,4351.1318,N,01108.8726,E,1,03,16.9,0.0,M,45.2,M,,*67\r\n" +"$GPRMC,100106.594,A,4351.1318,N,01108.8726,E,1.47,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,1.47,N,2.73,K,A*77\r\n" +"$GPGGA,100107.594,4351.1313,N,01108.8725,E,1,03,16.9,0.0,M,45.2,M,,*6E\r\n" +"$GPRMC,100107.594,A,4351.1313,N,01108.8725,E,1.64,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,1.64,N,3.03,K,A*70\r\n" +"$GPGGA,100108.593,4351.1310,N,01108.8724,E,1,03,16.9,0.0,M,45.2,M,,*64\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,29,12,62,057,*43\r\n" +"$GPGSV,3,2,10,14,38,266,,26,35,232,,27,25,143,34,29,42,214,36*78\r\n" +"$GPGSV,3,3,10,30,69,313,30,31,10,314,,,,,,,,,*73\r\n" +"$GPRMC,100108.593,A,4351.1310,N,01108.8724,E,1.66,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,1.66,N,3.07,K,A*76\r\n" +"$GPGGA,100109.593,4351.1304,N,01108.8723,E,1,03,16.9,0.0,M,45.2,M,,*67\r\n" +"$GPRMC,100109.593,A,4351.1304,N,01108.8723,E,1.72,187.49,131009,,,A*66\r\n" +"$GPVTG,187.49,T,,,1.72,N,3.18,K,A*7D\r\n" +"$GPGGA,100110.593,4351.1301,N,01108.8722,E,1,03,16.9,0.0,M,45.2,M,,*6B\r\n" +"$GPRMC,100110.593,A,4351.1301,N,01108.8722,E,1.72,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,1.72,N,3.18,K,A*7D\r\n" +"$GPGGA,100111.593,4351.1297,N,01108.8722,E,1,03,16.9,0.0,M,45.2,M,,*64\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,29,12,62,057,*43\r\n" +"$GPGSV,3,2,10,14,38,266,,26,35,231,,27,25,143,34,29,42,214,35*78\r\n" +"$GPGSV,3,3,10,30,69,313,30,31,10,314,,,,,,,,,*73\r\n" +"$GPRMC,100111.593,A,4351.1297,N,01108.8722,E,1.65,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,1.65,N,3.05,K,A*77\r\n" +"$GPGGA,100112.592,4351.1295,N,01108.8722,E,1,03,16.9,0.0,M,45.2,M,,*64\r\n" +"$GPRMC,100112.592,A,4351.1295,N,01108.8722,E,1.50,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,1.50,N,2.78,K,A*7A\r\n" +"$GPGGA,100113.592,4351.1291,N,01108.8721,E,1,03,16.9,0.0,M,45.2,M,,*62\r\n" +"$GPRMC,100113.592,A,4351.1291,N,01108.8721,E,1.38,187.49,131009,,,A*6D\r\n" +"$GPVTG,187.49,T,,,1.38,N,2.55,K,A*7B\r\n" +"$GPGGA,100114.592,4351.1288,N,01108.8721,E,1,03,16.9,0.0,M,45.2,M,,*6D\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,29,12,62,057,*43\r\n" +"$GPGSV,3,2,10,14,38,266,,26,35,231,,27,25,143,34,29,43,214,35*79\r\n" +"$GPGSV,3,3,10,30,69,313,30,31,10,314,,,,,,,,,*73\r\n" +"$GPRMC,100114.592,A,4351.1288,N,01108.8721,E,1.24,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,1.24,N,2.29,K,A*7D\r\n" +"$GPGGA,100115.592,4351.1285,N,01108.8719,E,1,03,16.9,0.0,M,45.2,M,,*6A\r\n" +"$GPRMC,100115.592,A,4351.1285,N,01108.8719,E,1.01,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,1.01,N,1.87,K,A*7D\r\n" +"$GPGGA,100116.592,4351.1283,N,01108.8719,E,1,03,16.9,0.0,M,45.2,M,,*6F\r\n" +"$GPRMC,100116.592,A,4351.1283,N,01108.8719,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100117.591,4351.1282,N,01108.8719,E,1,03,16.9,0.0,M,45.2,M,,*6C\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,16.9,16.9,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,29,12,62,057,*43\r\n" +"$GPGSV,3,2,10,14,38,266,,26,35,231,,27,25,143,34,29,43,214,35*79\r\n" +"$GPGSV,3,3,10,30,69,313,30,31,10,314,,,,,,,,,*73\r\n" +"$GPRMC,100117.591,A,4351.1282,N,01108.8719,E,0.00,187.49,131009,,,A*69\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100118.591,4351.1280,N,01108.8718,E,1,03,16.9,-0.0,M,45.2,M,,*4D\r\n" +"$GPRMC,100118.591,A,4351.1280,N,01108.8718,E,0.00,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100119.591,4351.1278,N,01108.8718,E,1,03,17.1,-0.0,M,45.2,M,,*42\r\n" +"$GPRMC,100119.591,A,4351.1278,N,01108.8718,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100120.591,4351.1278,N,01108.8717,E,1,03,17.1,-0.0,M,45.2,M,,*47\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,28,12,62,057,*42\r\n" +"$GPGSV,3,2,10,14,38,266,,26,35,231,,27,25,143,34,29,43,214,35*79\r\n" +"$GPGSV,3,3,10,30,69,313,30,31,10,314,,,,,,,,,*73\r\n" +"$GPRMC,100120.591,A,4351.1278,N,01108.8717,E,0.00,187.49,131009,,,A*66\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100121.590,4351.1276,N,01108.8717,E,1,02,17.1,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100121.590,A,4351.1276,N,01108.8717,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100122.590,4351.1275,N,01108.8717,E,1,03,17.1,-0.0,M,45.2,M,,*49\r\n" +"$GPRMC,100122.590,A,4351.1275,N,01108.8717,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100123.590,4351.1275,N,01108.8717,E,1,03,17.1,-0.0,M,45.2,M,,*48\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,29,12,62,057,*43\r\n" +"$GPGSV,3,2,10,14,38,266,,26,35,231,,27,25,143,34,29,43,214,36*7A\r\n" +"$GPGSV,3,3,10,30,69,313,30,31,10,314,,,,,,,,,*73\r\n" +"$GPRMC,100123.590,A,4351.1275,N,01108.8717,E,0.00,187.49,131009,,,A*69\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100124.590,4351.1274,N,01108.8717,E,1,03,17.1,-0.0,M,45.2,M,,*4E\r\n" +"$GPRMC,100124.590,A,4351.1274,N,01108.8717,E,0.00,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100125.590,4351.1272,N,01108.8717,E,1,03,17.1,-0.0,M,45.2,M,,*49\r\n" +"$GPRMC,100125.590,A,4351.1272,N,01108.8717,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100126.589,4351.1271,N,01108.8716,E,1,03,17.1,-0.0,M,45.2,M,,*40\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,28,12,62,057,*42\r\n" +"$GPGSV,3,2,10,14,38,266,,26,35,231,,27,24,143,34,29,43,214,35*78\r\n" +"$GPGSV,3,3,10,30,69,313,30,31,10,314,,,,,,,,,*73\r\n" +"$GPRMC,100126.589,A,4351.1271,N,01108.8716,E,0.00,187.49,131009,,,A*61\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100127.589,4351.1270,N,01108.8715,E,1,03,17.1,-0.0,M,45.2,M,,*43\r\n" +"$GPRMC,100127.589,A,4351.1270,N,01108.8715,E,0.00,187.49,131009,,,A*62\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100128.589,4351.1269,N,01108.8715,E,1,03,17.1,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100128.589,A,4351.1269,N,01108.8715,E,0.00,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100129.589,4351.1268,N,01108.8715,E,1,03,17.1,-0.0,M,45.2,M,,*44\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,28,12,62,058,*4D\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,34,29,43,214,35*76\r\n" +"$GPGSV,3,3,10,30,69,314,29,31,10,314,,,,,,,,,*7C\r\n" +"$GPRMC,100129.589,A,4351.1268,N,01108.8715,E,0.00,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100130.589,4351.1266,N,01108.8715,E,1,03,17.1,-0.0,M,45.2,M,,*42\r\n" +"$GPRMC,100130.589,A,4351.1266,N,01108.8715,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100131.588,4351.1265,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100131.588,A,4351.1265,N,01108.8714,E,0.00,187.49,131009,,,A*61\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100132.588,4351.1264,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*42\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,28,12,62,058,*4D\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,214,35*71\r\n" +"$GPGSV,3,3,10,30,69,314,29,31,10,314,,,,,,,,,*7C\r\n" +"$GPRMC,100132.588,A,4351.1264,N,01108.8714,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100133.588,4351.1264,N,01108.8715,E,1,03,17.1,-0.0,M,45.2,M,,*42\r\n" +"$GPRMC,100133.588,A,4351.1264,N,01108.8715,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100134.588,4351.1262,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*42\r\n" +"$GPRMC,100134.588,A,4351.1262,N,01108.8714,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100135.587,4351.1263,N,01108.8715,E,1,03,17.1,-0.0,M,45.2,M,,*4C\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,214,35*71\r\n" +"$GPGSV,3,3,10,30,69,314,29,31,10,314,,,,,,,,,*7C\r\n" +"$GPRMC,100135.587,A,4351.1263,N,01108.8715,E,0.00,187.49,131009,,,A*6D\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100136.587,4351.1263,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*4E\r\n" +"$GPRMC,100136.587,A,4351.1263,N,01108.8714,E,0.00,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100137.587,4351.1263,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100137.587,A,4351.1263,N,01108.8714,E,0.00,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100138.587,4351.1263,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*40\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,34*71\r\n" +"$GPGSV,3,3,10,30,69,314,29,31,10,314,,,,,,,,,*7C\r\n" +"$GPRMC,100138.587,A,4351.1263,N,01108.8714,E,0.00,187.49,131009,,,A*61\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100139.587,4351.1263,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*41\r\n" +"$GPRMC,100139.587,A,4351.1263,N,01108.8714,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100140.586,4351.1263,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*4E\r\n" +"$GPRMC,100140.586,A,4351.1263,N,01108.8714,E,0.00,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100141.586,4351.1263,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*4F\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,34*71\r\n" +"$GPGSV,3,3,10,30,69,314,29,31,10,314,,,,,,,,,*7C\r\n" +"$GPRMC,100141.586,A,4351.1263,N,01108.8714,E,0.00,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100142.586,4351.1262,N,01108.8714,E,1,03,17.1,-0.0,M,45.2,M,,*4D\r\n" +"$GPRMC,100142.586,A,4351.1262,N,01108.8714,E,0.00,187.49,131009,,,A*6C\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100143.586,4351.1263,N,01108.8713,E,1,03,17.1,-0.0,M,45.2,M,,*4A\r\n" +"$GPRMC,100143.586,A,4351.1263,N,01108.8713,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100144.585,4351.1263,N,01108.8713,E,1,03,17.1,-0.0,M,45.2,M,,*4E\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,34*71\r\n" +"$GPGSV,3,3,10,30,69,314,29,31,10,314,,,,,,,,,*7C\r\n" +"$GPRMC,100144.585,A,4351.1263,N,01108.8713,E,0.00,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100145.585,4351.1263,N,01108.8713,E,1,03,17.1,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100145.585,A,4351.1263,N,01108.8713,E,0.00,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100146.585,4351.1262,N,01108.8712,E,1,03,17.1,-0.0,M,45.2,M,,*4C\r\n" +"$GPRMC,100146.585,A,4351.1262,N,01108.8712,E,0.00,187.49,131009,,,A*6D\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100147.585,4351.1262,N,01108.8712,E,1,03,17.1,-0.0,M,45.2,M,,*4D\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.1,17.1,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,34*71\r\n" +"$GPGSV,3,3,10,30,69,314,30,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100147.585,A,4351.1262,N,01108.8712,E,0.00,187.49,131009,,,A*6C\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100148.585,4351.1263,N,01108.8712,E,1,03,17.1,-0.0,M,45.2,M,,*43\r\n" +"$GPRMC,100148.585,A,4351.1263,N,01108.8712,E,0.00,187.49,131009,,,A*62\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100149.584,4351.1262,N,01108.8712,E,1,03,17.1,-0.0,M,45.2,M,,*42\r\n" +"$GPRMC,100149.584,A,4351.1262,N,01108.8712,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100150.584,4351.1263,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*48\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,34*71\r\n" +"$GPGSV,3,3,10,30,69,314,29,31,10,314,,,,,,,,,*7C\r\n" +"$GPRMC,100150.584,A,4351.1263,N,01108.8712,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100151.584,4351.1261,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4B\r\n" +"$GPRMC,100151.584,A,4351.1261,N,01108.8712,E,0.00,187.49,131009,,,A*69\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100152.584,4351.1259,N,01108.8713,E,1,03,17.2,-0.0,M,45.2,M,,*42\r\n" +"$GPRMC,100152.584,A,4351.1259,N,01108.8713,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,10015,N,01108.8713,E,1,03,17.2,-0.0,M,45.2,M,,*48\r" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"*74\r\n" +"$GPRMC,100153.584,A,4351.1261,N,01108.8713,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100154.583,4351.1260,N,01108.8713,E,1,03,17.2,0.0,M,45.2,M,,*64\r\n" +"$GPRMC,100154.583,A,4351.1260,N,01108.8713,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100155.583,4351.1259,N,01108.8712,E,1,03,17.2,0.0,M,45.2,M,,*6E\r\n" +"$GPRMC,100155.583,A,4351.1259,N,01108.8712,E,0.00,187.49,131009,,,A*61\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100156.583,4351.1258,N,01108.8712,E,1,03,17.2,0.0,M,45.2,M,,*6C\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,28,12,62,058,*4D\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,314,30,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100156.583,A,4351.1258,N,01108.8712,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100157.583,4351.1257,N,01108.8712,E,1,03,17.2,0.0,M,45.2,M,,*62\r\n" +"$GPRMC,100157.583,A,4351.1257,N,01108.8712,E,0.00,187.49,131009,,,A*6D\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100158.582,4351.1256,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100158.582,A,4351.1256,N,01108.8712,E,0.00,187.49,131009,,,A*62\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100159.582,4351.1255,N,01108.8712,E,1,03,17.2,0.0,M,45.2,M,,*6F\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,314,30,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100159.582,A,4351.1255,N,01108.8712,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100200.582,4351.1255,N,01108.8712,E,1,03,17.2,0.0,M,45.2,M,,*60\r\n" +"$GPRMC,100200.582,A,4351.1255,N,01108.8712,E,0.00,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100201.582,4351.1256,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100201.582,A,4351.1256,N,01108.8712,E,0.00,187.49,131009,,,A*6D\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100202.582,4351.1256,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4C\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,314,30,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100202.582,A,4351.1256,N,01108.8712,E,0.00,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100203.581,4351.1249,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*43\r\n" +"$GPRMC,100203.581,A,4351.1249,N,01108.8711,E,0.00,187.49,131009,,,A*61\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100204.581,4351.1250,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100204.581,A,4351.1250,N,01108.8712,E,0.00,187.49,131009,,,A*6D\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100205.581,4351.1253,N,01108.8713,E,1,03,17.2,-0.0,M,45.2,M,,*4C\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,36*73\r\n" +"$GPGSV,3,3,10,30,69,314,30,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100205.581,A,4351.1253,N,01108.8713,E,0.00,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100211.580,A,4351.1260,N,01108.8712,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100212.579,4351.1260,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4C\r\n" +"$GPRMC,100212.579,A,4351.1260,N,01108.8712,E,0.00,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100213.579,4351.1255,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100213.579,A,4351.1255,N,01108.8711,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100214.579,4351.1258,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*42\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,25,12,62,058,*40\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100214.579,A,4351.1258,N,01108.8711,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100215.579,4351.1260,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100215.579,A,4351.1260,N,01108.8711,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100216.579,4351.1261,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*4A\r\n" +"$GPRMC,100216.579,A,4351.1261,N,01108.8711,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100217.578,4351.1263,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4B\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,25,12,62,058,*40\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100217.578,A,4351.1263,N,01108.8712,E,0.00,187.49,131009,,,A*69\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100218.578,4351.1263,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100218.578,A,4351.1263,N,01108.8712,E,0.00,187.49,131009,,,A*66\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100219.578,4351.1261,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100219.578,A,4351.1261,N,01108.8711,E,0.00,187.49,131009,,,A*66\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100220.578,4351.1264,N,01108.8712,E,1,03,17.4,-0.0,M,45.2,M,,*4E\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100220.578,A,4351.1264,N,01108.8712,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100221.577,4351.1265,N,01108.8713,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100221.577,A,4351.1265,N,01108.8713,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100222.577,4351.1266,N,01108.8713,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100222.577,A,4351.1266,N,01108.8713,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100223.577,4351.1267,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*47\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,36*72\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100223.577,A,4351.1267,N,01108.8714,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100224.577,4351.1271,N,01108.8713,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100224.577,A,4351.1271,N,01108.8713,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100225.577,4351.1273,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100225.577,A,4351.1273,N,01108.8714,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100226.576,4351.1274,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*41\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,25,12,62,058,*40\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,35*71\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100226.576,A,4351.1274,N,01108.8714,E,0.00,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100227.576,4351.1274,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100227.576,A,4351.1274,N,01108.8714,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100228.576,4351.1276,N,01108.8715,E,1,03,17.4,-0.0,M,45.2,M,,*4C\r\n" +"$GPRMC,100228.576,A,4351.1276,N,01108.8715,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100229.576,4351.1280,N,01108.8715,E,1,03,17.4,-0.0,M,45.2,M,,*44\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100229.576,A,4351.1280,N,01108.8715,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100230.576,4351.1282,N,01108.8715,E,1,03,17.4,-0.0,M,45.2,M,,*4E\r\n" +"$GPRMC,100230.576,A,4351.1282,N,01108.8715,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100231.575,4351.1294,N,01108.8718,E,1,03,17.4,-0.0,M,45.2,M,,*46\r\n" +"$GPRMC,100231.575,A,4351.1294,N,01108.8718,E,0.00,187.49,131009,,,A*62\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100232.575,4351.1295,N,01108.8718,E,1,03,17.4,-0.0,M,45.2,M,,*44\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,34*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100232.575,A,4351.1295,N,01108.8718,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100233.575,4351.1297,N,01108.8718,E,1,03,17.4,0.0,M,45.2,M,,*6A\r\n" +"$GPRMC,100233.575,A,4351.1297,N,01108.8718,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100234.575,4351.1301,N,01108.8719,E,1,03,17.4,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100234.575,A,4351.1301,N,01108.8719,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100235.574,4351.1305,N,01108.8719,E,1,03,17.4,-0.0,M,45.2,M,,*4B\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,34*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100235.574,A,4351.1305,N,01108.8719,E,0.00,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100236.574,4351.1308,N,01108.8720,E,1,03,17.4,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100236.574,A,4351.1308,N,01108.8720,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100237.574,4351.1311,N,01108.8720,E,1,03,17.4,-0.0,M,45.2,M,,*46\r\n" +"$GPRMC,100237.574,A,4351.1311,N,01108.8720,E,0.00,187.49,131009,,,A*62\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100238.574,4351.1314,N,01108.8721,E,1,03,17.4,-0.0,M,45.2,M,,*4D\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,34*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GP351.1314,N,01108.8721,E,0.00,187.49,131009,,,A*69\r" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100239.574,4351.1316,N,01108.8722,E,1,03,17.4,-0.0,M,45.2,M,,*4D\r\n" +"$GPGGA,100206.581,4351.1256,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100206.581,A,4351.1256,N,01108.8711,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100207.581,4351.1257,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100207.581,A,4351.1257,N,01108.8711,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100208.580,4351.1258,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4A\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,314,30,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100208.580,A,4351.1258,N,01108.8712,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100209.580,4351.1258,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4B\r\n" +"$GPRMC,100209.580,A,4351.1258,N,01108.8712,E,0.00,187.49,131009,,,A*69\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100210.580,4351.1258,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*43\r\n" +"$GPRMC,100210.580,A,4351.1258,N,01108.8712,E,0.00,187.49,131009,,,A*61\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100211.580,4351.1260,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*49\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100211.580,A,4351.1260,N,01108.8712,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100212.579,4351.1260,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4C\r\n" +"$GPRMC,100212.579,A,4351.1260,N,01108.8712,E,0.00,187.49,131009,,,A*6E\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100213.579,4351.1255,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100213.579,A,4351.1255,N,01108.8711,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100214.579,4351.1258,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*42\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,25,12,62,058,*40\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100214.579,A,4351.1258,N,01108.8711,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100215.579,4351.1260,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*48\r\n" +"$GPRMC,100215.579,A,4351.1260,N,01108.8711,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100216.579,4351.1261,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*4A\r\n" +"$GPRMC,100216.579,A,4351.1261,N,01108.8711,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100217.578,4351.1263,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*4B\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.2,17.2,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,25,12,62,058,*40\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100217.578,A,4351.1263,N,01108.8712,E,0.00,187.49,131009,,,A*69\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100218.578,4351.1263,N,01108.8712,E,1,03,17.2,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100218.578,A,4351.1263,N,01108.8712,E,0.00,187.49,131009,,,A*66\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100219.578,4351.1261,N,01108.8711,E,1,03,17.2,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100219.578,A,4351.1261,N,01108.8711,E,0.00,187.49,131009,,,A*66\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100220.578,4351.1264,N,01108.8712,E,1,03,17.4,-0.0,M,45.2,M,,*4E\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100220.578,A,4351.1264,N,01108.8712,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100221.577,4351.1265,N,01108.8713,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100221.577,A,4351.1265,N,01108.8713,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100222.577,4351.1266,N,01108.8713,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100222.577,A,4351.1266,N,01108.8713,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100223.577,4351.1267,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*47\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,36*72\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100223.577,A,4351.1267,N,01108.8714,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100224.577,4351.1271,N,01108.8713,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100224.577,A,4351.1271,N,01108.8713,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100225.577,4351.1273,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*44\r\n" +"$GPRMC,100225.577,A,4351.1273,N,01108.8714,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100226.576,4351.1274,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*41\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,25,12,62,058,*40\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,35*71\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100226.576,A,4351.1274,N,01108.8714,E,0.00,187.49,131009,,,A*65\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100227.576,4351.1274,N,01108.8714,E,1,03,17.4,-0.0,M,45.2,M,,*40\r\n" +"$GPRMC,100227.576,A,4351.1274,N,01108.8714,E,0.00,187.49,131009,,,A*64\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100228.576,4351.1276,N,01108.8715,E,1,03,17.4,-0.0,M,45.2,M,,*4C\r\n" +"$GPRMC,100228.576,A,4351.1276,N,01108.8715,E,0.00,187.49,131009,,,A*68\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100229.576,4351.1280,N,01108.8715,E,1,03,17.4,-0.0,M,45.2,M,,*44\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,33,29,43,215,35*70\r\n" +"$GPGSV,3,3,10,30,69,315,31,31,10,314,,,,,,,,,*74\r\n" +"$GPRMC,100229.576,A,4351.1280,N,01108.8715,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100230.576,4351.1282,N,01108.8715,E,1,03,17.4,-0.0,M,45.2,M,,*4E\r\n" +"$GPRMC,100230.576,A,4351.1282,N,01108.8715,E,0.00,187.49,131009,,,A*6A\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100231.575,4351.1294,N,01108.8718,E,1,03,17.4,-0.0,M,45.2,M,,*46\r\n" +"$GPRMC,100231.575,A,4351.1294,N,01108.8718,E,0.00,187.49,131009,,,A*62\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100232.575,4351.1295,N,01108.8718,E,1,03,17.4,-0.0,M,45.2,M,,*44\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,34*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100232.575,A,4351.1295,N,01108.8718,E,0.00,187.49,131009,,,A*60\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100233.575,4351.1297,N,01108.8718,E,1,03,17.4,0.0,M,45.2,M,,*6A\r\n" +"$GPRMC,100233.575,A,4351.1297,N,01108.8718,E,0.00,187.49,131009,,,A*63\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100234.575,4351.1301,N,01108.8719,E,1,03,17.4,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100234.575,A,4351.1301,N,01108.8719,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100235.574,4351.1305,N,01108.8719,E,1,03,17.4,-0.0,M,45.2,M,,*4B\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,27,12,62,058,*42\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,34*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GPRMC,100235.574,A,4351.1305,N,01108.8719,E,0.00,187.49,131009,,,A*6F\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100236.574,4351.1308,N,01108.8720,E,1,03,17.4,-0.0,M,45.2,M,,*4F\r\n" +"$GPRMC,100236.574,A,4351.1308,N,01108.8720,E,0.00,187.49,131009,,,A*6B\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100237.574,4351.1311,N,01108.8720,E,1,03,17.4,-0.0,M,45.2,M,,*46\r\n" +"$GPRMC,100237.574,A,4351.1311,N,01108.8720,E,0.00,187.49,131009,,,A*62\r\n" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100238.574,4351.1314,N,01108.8721,E,1,03,17.4,-0.0,M,45.2,M,,*4D\r\n" +"$GPGSA,A,2,09,27,29,,,,,,,,,,17.4,17.4,0.0*34\r\n" +"$GPGSV,3,1,10,2,34,086,,4,20,052,,9,31,143,26,12,62,058,*43\r\n" +"$GPGSV,3,2,10,14,37,266,,26,34,231,,27,24,143,32,29,43,215,34*70\r\n" +"$GPGSV,3,3,10,30,69,315,30,31,10,314,,,,,,,,,*75\r\n" +"$GP351.1314,N,01108.8721,E,0.00,187.49,131009,,,A*69\r" +"$GPVTG,187.49,T,,,0.00,N,0.00,K,A*73\r\n" +"$GPGGA,100239.574,4351.1316,N,01108.8722,E,1,03,17.4,-0.0,M,45.2,M,,*4D\r\n" +}; + +static NmeaGga gga_test1 = +{ + .latitude = 43851403, + .longitude = 11147808, + .altitude = 57, + .time = 57928, + .satellites = 5, + .quality = 1, + .hdop = 26, + .geoid = 45, +}; + +static NmeaGga gga_test2 = +{ + .latitude = 43851403, + .longitude = 11147808, + .altitude = -57, + .time = 57928, + .satellites = 5, + .quality = 1, + .hdop = 26, + .geoid = 45, +}; + +static NmeaGga gga_test3 = +{ + .latitude = -43851403, + .longitude = -11147808, + .altitude = -57, + .time = 57928, + .satellites = 5, + .quality = 1, + .hdop = 26, + .geoid = -45, +}; + +static NmeaRmc rmc_test = +{ + .time = 1254758726, + .warn = 'A', + .latitude = 43851405, + .longitude = 11147812, + .speed = 0, + .course = 237, + .mag_var = 0 +}; + + +static NmeaVtg vtg_test = +{ + .track_good = 237, + .knot_speed = 0, + .km_speed = 0 +}; + +static NmeaGsv gsv_test = +{ + .tot_message = 3, + .message_num = 1, + .tot_svv = 9, + .info = + { + { 3, 78, 302, 37 }, + { 6, 87, 31, 0 }, + { 7, 5, 292, 37 }, + { 14, 5, 135, 0 } + + } +}; + +typedef struct NmeaTest +{ + int test_num; + void *val; +} NmeaTest; + +NmeaTest test_vector[] = +{ + {1, &rmc_test}, + {2, &vtg_test}, + {3, &gsv_test}, + {4, &gga_test1}, + {5, &gga_test2}, + {6, &gga_test3}, +}; + + +static void *find_test(int n) +{ + for (unsigned i=0; i < countof(test_vector); i++) + if (n == test_vector[i].test_num) + return test_vector[i].val; + + return NULL; +} + +#define TOT_GOOD_SENTENCE_NUM 665 +#define TOT_SENTENCE_NUM 731 + +static int tot_sentence_parsed = 0; + +/** + * do something with the GGA data + */ +static void gpgga_callout_test(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + NmeaGga *gga = (NmeaGga *)data; + + tot_sentence_parsed++; + void *test = find_test(tot_sentence_parsed); + if (test) + ASSERT(memcmp(test, gga, sizeof(*gga)) == 0); + + LOG_INFO("[%d]found GPGGA message %ld %ld %ld %lu %d %d %d %d\n",tot_sentence_parsed, + (long)gga->latitude, + (long)gga->longitude, + (long)gga->altitude, + gga->time, + gga->satellites, + gga->quality, + gga->hdop, + gga->geoid); +} + +/** + * do something with the RMC data + */ +static void gprmc_callout_test(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + NmeaRmc *rmc = (NmeaRmc *)data; + + tot_sentence_parsed++; + void *test = find_test(tot_sentence_parsed); + if (test) + ASSERT(memcmp(test, rmc, sizeof(*rmc)) == 0); + + LOG_INFO("[%d]found GPRMC Message %lu %c %ld %ld %d %d %d\n",tot_sentence_parsed, + rmc->time, + rmc->warn, + (long)rmc->latitude, + (long)rmc->longitude, + rmc->speed, + rmc->course, + rmc->mag_var); +} + +/** + * do something with the GSV data + */ +static void gpgsv_callout_test(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + NmeaGsv *gsv = (NmeaGsv *)data; + + tot_sentence_parsed++; + void *test = find_test(tot_sentence_parsed); + if (test) + ASSERT(memcmp(test, gsv, sizeof(*gsv)) == 0); + + LOG_INFO("[%d]Found GPGSV message %d %d %d\n",tot_sentence_parsed, + gsv->tot_message, + gsv->message_num, + gsv->tot_svv); + + for (int i = 0; i < 4; i++) + LOG_INFO("\t[%d]%d %d %d %d\n", i, gsv->info[i].sv_prn, gsv->info[i].elevation, gsv->info[i].azimut, gsv->info[i].snr); +} + +/** + * do something with the VTG data + */ +static void gpvtg_callout_test(nmeap_context_t *context, void *data, void *user_data) +{ + (void)context; + (void)user_data; + NmeaVtg *vtg = (NmeaVtg *)data; + + tot_sentence_parsed++; + void *test = find_test(tot_sentence_parsed); + if (test) + ASSERT(memcmp(test, vtg, sizeof(*vtg)) == 0); + + LOG_INFO("[%d]Found GPVTG message %d %d %d\n",tot_sentence_parsed, + vtg->track_good, + vtg->knot_speed, + vtg->km_speed); +} + +int nmea_testSetup(void) +{ + kdbg_init(); + + kfilemem_init(&mem, nmea_test, sizeof(nmea_test)); + LOG_INFO("Init test buffer..done.\n"); + + nmeap_init(&nmea, NULL); + nmeap_addParser(&nmea, "GPGGA", nmea_gpgga, gpgga_callout_test, &gga); + nmeap_addParser(&nmea, "GPRMC", nmea_gprmc, gprmc_callout_test, &rmc); + nmeap_addParser(&nmea, "GPGSV", nmea_gpgsv, gpgsv_callout_test, &gsv); + nmeap_addParser(&nmea, "GPVTG", nmea_gpvtg, gpvtg_callout_test, &vtg); + + return 0; +} + +int nmea_testTearDown(void) +{ + return 0; +} + +int nmea_testRun(void) +{ + for (int i = 0; i < TOT_SENTENCE_NUM; i++) + nmea_poll(&nmea, &mem.fd); + + kprintf("tot sentence %d\n", tot_sentence_parsed); + + if (tot_sentence_parsed != TOT_GOOD_SENTENCE_NUM) + { + LOG_ERR("Incorrect number of parsed sentence.\n"); + return -1; + } + + + return 0; +} + +TEST_MAIN(nmea); + diff --git a/bertos/net/nmeap/COPYING b/bertos/net/nmeap/COPYING new file mode 100644 index 0000000..9c54246 --- /dev/null +++ b/bertos/net/nmeap/COPYING @@ -0,0 +1,31 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License: + +Redistribution and use in source and binary forms, with or without +modification, are permitted provided that the following conditions are met: + + * Redistributions of source code must retain the above copyright notice, + this list of conditions and the following disclaimer. + * Redistributions in binary form must reproduce the above copyright + notice, this list of conditions and the following disclaimer in + the documentation and/or other materials provided with the distribution. + * Neither the name of the copyright holders nor the names of its + contributors may be used to endorse or promote products derived from + this software without specific prior written permission. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + diff --git a/bertos/net/nmeap/Doxyfile b/bertos/net/nmeap/Doxyfile new file mode 100644 index 0000000..aae008e --- /dev/null +++ b/bertos/net/nmeap/Doxyfile @@ -0,0 +1,1153 @@ +# Doxyfile 1.3.8 + +# This file describes the settings to be used by the documentation system +# doxygen (www.doxygen.org) for a project +# +# All text after a hash (#) is considered a comment and will be ignored +# The format is: +# TAG = value [value, ...] +# For lists items can also be appended using: +# TAG += value [value, ...] +# Values that contain spaces should be placed between quotes (" ") + +#--------------------------------------------------------------------------- +# Project related configuration options +#--------------------------------------------------------------------------- + +# The PROJECT_NAME tag is a single word (or a sequence of words surrounded +# by quotes) that should identify the project. + +PROJECT_NAME = NMEAP + +# The PROJECT_NUMBER tag can be used to enter a project or revision number. +# This could be handy for archiving the generated documentation or +# if some version control system is used. + +PROJECT_NUMBER = 0.1 + +# The OUTPUT_DIRECTORY tag is used to specify the (relative or absolute) +# base path where the generated documentation will be put. +# If a relative path is entered, it will be relative to the location +# where doxygen was started. If left blank the current directory will be used. + +OUTPUT_DIRECTORY = doc + +# If the CREATE_SUBDIRS tag is set to YES, then doxygen will create +# 4096 sub-directories (in 2 levels) under the output directory of each output +# format and will distribute the generated files over these directories. +# Enabling this option can be useful when feeding doxygen a huge amount of source +# files, where putting all generated files in the same directory would otherwise +# cause performance problems for the file system. + +CREATE_SUBDIRS = NO + +# The OUTPUT_LANGUAGE tag is used to specify the language in which all +# documentation generated by doxygen is written. Doxygen will use this +# information to generate all constant output in the proper language. +# The default language is English, other supported languages are: +# Brazilian, Catalan, Chinese, Chinese-Traditional, Croatian, Czech, Danish, +# Dutch, Finnish, French, German, Greek, Hungarian, Italian, Japanese, +# Japanese-en (Japanese with English messages), Korean, Korean-en, Norwegian, +# Polish, Portuguese, Romanian, Russian, Serbian, Slovak, Slovene, Spanish, +# Swedish, and Ukrainian. + +OUTPUT_LANGUAGE = English + +# This tag can be used to specify the encoding used in the generated output. +# The encoding is not always determined by the language that is chosen, +# but also whether or not the output is meant for Windows or non-Windows users. +# In case there is a difference, setting the USE_WINDOWS_ENCODING tag to YES +# forces the Windows encoding (this is the default for the Windows binary), +# whereas setting the tag to NO uses a Unix-style encoding (the default for +# all platforms other than Windows). + +USE_WINDOWS_ENCODING = NO + +# If the BRIEF_MEMBER_DESC tag is set to YES (the default) Doxygen will +# include brief member descriptions after the members that are listed in +# the file and class documentation (similar to JavaDoc). +# Set to NO to disable this. + +BRIEF_MEMBER_DESC = YES + +# If the REPEAT_BRIEF tag is set to YES (the default) Doxygen will prepend +# the brief description of a member or function before the detailed description. +# Note: if both HIDE_UNDOC_MEMBERS and BRIEF_MEMBER_DESC are set to NO, the +# brief descriptions will be completely suppressed. + +REPEAT_BRIEF = YES + +# This tag implements a quasi-intelligent brief description abbreviator +# that is used to form the text in various listings. Each string +# in this list, if found as the leading text of the brief description, will be +# stripped from the text and the result after processing the whole list, is used +# as the annotated text. Otherwise, the brief description is used as-is. If left +# blank, the following values are used ("$name" is automatically replaced with the +# name of the entity): "The $name class" "The $name widget" "The $name file" +# "is" "provides" "specifies" "contains" "represents" "a" "an" "the" + +ABBREVIATE_BRIEF = + +# If the ALWAYS_DETAILED_SEC and REPEAT_BRIEF tags are both set to YES then +# Doxygen will generate a detailed section even if there is only a brief +# description. + +ALWAYS_DETAILED_SEC = NO + +# If the INLINE_INHERITED_MEMB tag is set to YES, doxygen will show all inherited +# members of a class in the documentation of that class as if those members were +# ordinary class members. Constructors, destructors and assignment operators of +# the base classes will not be shown. + +INLINE_INHERITED_MEMB = NO + +# If the FULL_PATH_NAMES tag is set to YES then Doxygen will prepend the full +# path before files name in the file list and in the header files. If set +# to NO the shortest path that makes the file name unique will be used. + +FULL_PATH_NAMES = NO + +# If the FULL_PATH_NAMES tag is set to YES then the STRIP_FROM_PATH tag +# can be used to strip a user-defined part of the path. Stripping is +# only done if one of the specified strings matches the left-hand part of +# the path. The tag can be used to show relative paths in the file list. +# If left blank the directory from which doxygen is run is used as the +# path to strip. + +STRIP_FROM_PATH = + +# The STRIP_FROM_INC_PATH tag can be used to strip a user-defined part of +# the path mentioned in the documentation of a class, which tells +# the reader which header file to include in order to use a class. +# If left blank only the name of the header file containing the class +# definition is used. Otherwise one should specify the include paths that +# are normally passed to the compiler using the -I flag. + +STRIP_FROM_INC_PATH = + +# If the SHORT_NAMES tag is set to YES, doxygen will generate much shorter +# (but less readable) file names. This can be useful is your file systems +# doesn't support long names like on DOS, Mac, or CD-ROM. + +SHORT_NAMES = NO + +# If the JAVADOC_AUTOBRIEF tag is set to YES then Doxygen +# will interpret the first line (until the first dot) of a JavaDoc-style +# comment as the brief description. If set to NO, the JavaDoc +# comments will behave just like the Qt-style comments (thus requiring an +# explicit @brief command for a brief description. + +JAVADOC_AUTOBRIEF = NO + +# The MULTILINE_CPP_IS_BRIEF tag can be set to YES to make Doxygen +# treat a multi-line C++ special comment block (i.e. a block of //! or /// +# comments) as a brief description. This used to be the default behaviour. +# The new default is to treat a multi-line C++ comment block as a detailed +# description. Set this tag to YES if you prefer the old behaviour instead. + +MULTILINE_CPP_IS_BRIEF = NO + +# If the DETAILS_AT_TOP tag is set to YES then Doxygen +# will output the detailed description near the top, like JavaDoc. +# If set to NO, the detailed description appears after the member +# documentation. + +DETAILS_AT_TOP = NO + +# If the INHERIT_DOCS tag is set to YES (the default) then an undocumented +# member inherits the documentation from any documented member that it +# re-implements. + +INHERIT_DOCS = YES + +# If member grouping is used in the documentation and the DISTRIBUTE_GROUP_DOC +# tag is set to YES, then doxygen will reuse the documentation of the first +# member in the group (if any) for the other members of the group. By default +# all members of a group must be documented explicitly. + +DISTRIBUTE_GROUP_DOC = NO + +# The TAB_SIZE tag can be used to set the number of spaces in a tab. +# Doxygen uses this value to replace tabs by spaces in code fragments. + +TAB_SIZE = 8 + +# This tag can be used to specify a number of aliases that acts +# as commands in the documentation. An alias has the form "name=value". +# For example adding "sideeffect=\par Side Effects:\n" will allow you to +# put the command \sideeffect (or @sideeffect) in the documentation, which +# will result in a user-defined paragraph with heading "Side Effects:". +# You can put \n's in the value part of an alias to insert newlines. + +ALIASES = + +# Set the OPTIMIZE_OUTPUT_FOR_C tag to YES if your project consists of C sources +# only. Doxygen will then generate output that is more tailored for C. +# For instance, some of the names that are used will be different. The list +# of all members will be omitted, etc. + +OPTIMIZE_OUTPUT_FOR_C = YES + +# Set the OPTIMIZE_OUTPUT_JAVA tag to YES if your project consists of Java sources +# only. Doxygen will then generate output that is more tailored for Java. +# For instance, namespaces will be presented as packages, qualified scopes +# will look different, etc. + +OPTIMIZE_OUTPUT_JAVA = NO + +# Set the SUBGROUPING tag to YES (the default) to allow class member groups of +# the same type (for instance a group of public functions) to be put as a +# subgroup of that type (e.g. under the Public Functions section). Set it to +# NO to prevent subgrouping. Alternatively, this can be done per class using +# the \nosubgrouping command. + +SUBGROUPING = YES + +#--------------------------------------------------------------------------- +# Build related configuration options +#--------------------------------------------------------------------------- + +# If the EXTRACT_ALL tag is set to YES doxygen will assume all entities in +# documentation are documented, even if no documentation was available. +# Private class members and static file members will be hidden unless +# the EXTRACT_PRIVATE and EXTRACT_STATIC tags are set to YES + +EXTRACT_ALL = YES + +# If the EXTRACT_PRIVATE tag is set to YES all private members of a class +# will be included in the documentation. + +EXTRACT_PRIVATE = YES + +# If the EXTRACT_STATIC tag is set to YES all static members of a file +# will be included in the documentation. + +EXTRACT_STATIC = YES + +# If the EXTRACT_LOCAL_CLASSES tag is set to YES classes (and structs) +# defined locally in source files will be included in the documentation. +# If set to NO only classes defined in header files are included. + +EXTRACT_LOCAL_CLASSES = YES + +# This flag is only useful for Objective-C code. When set to YES local +# methods, which are defined in the implementation section but not in +# the interface are included in the documentation. +# If set to NO (the default) only methods in the interface are included. + +EXTRACT_LOCAL_METHODS = NO + +# If the HIDE_UNDOC_MEMBERS tag is set to YES, Doxygen will hide all +# undocumented members of documented classes, files or namespaces. +# If set to NO (the default) these members will be included in the +# various overviews, but no documentation section is generated. +# This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_MEMBERS = NO + +# If the HIDE_UNDOC_CLASSES tag is set to YES, Doxygen will hide all +# undocumented classes that are normally visible in the class hierarchy. +# If set to NO (the default) these classes will be included in the various +# overviews. This option has no effect if EXTRACT_ALL is enabled. + +HIDE_UNDOC_CLASSES = NO + +# If the HIDE_FRIEND_COMPOUNDS tag is set to YES, Doxygen will hide all +# friend (class|struct|union) declarations. +# If set to NO (the default) these declarations will be included in the +# documentation. + +HIDE_FRIEND_COMPOUNDS = NO + +# If the HIDE_IN_BODY_DOCS tag is set to YES, Doxygen will hide any +# documentation blocks found inside the body of a function. +# If set to NO (the default) these blocks will be appended to the +# function's detailed documentation block. + +HIDE_IN_BODY_DOCS = NO + +# The INTERNAL_DOCS tag determines if documentation +# that is typed after a \internal command is included. If the tag is set +# to NO (the default) then the documentation will be excluded. +# Set it to YES to include the internal documentation. + +INTERNAL_DOCS = NO + +# If the CASE_SENSE_NAMES tag is set to NO then Doxygen will only generate +# file names in lower-case letters. If set to YES upper-case letters are also +# allowed. This is useful if you have classes or files whose names only differ +# in case and if your file system supports case sensitive file names. Windows +# and Mac users are advised to set this option to NO. + +CASE_SENSE_NAMES = NO + +# If the HIDE_SCOPE_NAMES tag is set to NO (the default) then Doxygen +# will show members with their full class and namespace scopes in the +# documentation. If set to YES the scope will be hidden. + +HIDE_SCOPE_NAMES = NO + +# If the SHOW_INCLUDE_FILES tag is set to YES (the default) then Doxygen +# will put a list of the files that are included by a file in the documentation +# of that file. + +SHOW_INCLUDE_FILES = YES + +# If the INLINE_INFO tag is set to YES (the default) then a tag [inline] +# is inserted in the documentation for inline members. + +INLINE_INFO = YES + +# If the SORT_MEMBER_DOCS tag is set to YES (the default) then doxygen +# will sort the (detailed) documentation of file and class members +# alphabetically by member name. If set to NO the members will appear in +# declaration order. + +SORT_MEMBER_DOCS = YES + +# If the SORT_BRIEF_DOCS tag is set to YES then doxygen will sort the +# brief documentation of file, namespace and class members alphabetically +# by member name. If set to NO (the default) the members will appear in +# declaration order. + +SORT_BRIEF_DOCS = NO + +# If the SORT_BY_SCOPE_NAME tag is set to YES, the class list will be +# sorted by fully-qualified names, including namespaces. If set to +# NO (the default), the class list will be sorted only by class name, +# not including the namespace part. +# Note: This option is not very useful if HIDE_SCOPE_NAMES is set to YES. +# Note: This option applies only to the class list, not to the +# alphabetical list. + +SORT_BY_SCOPE_NAME = NO + +# The GENERATE_TODOLIST tag can be used to enable (YES) or +# disable (NO) the todo list. This list is created by putting \todo +# commands in the documentation. + +GENERATE_TODOLIST = YES + +# The GENERATE_TESTLIST tag can be used to enable (YES) or +# disable (NO) the test list. This list is created by putting \test +# commands in the documentation. + +GENERATE_TESTLIST = YES + +# The GENERATE_BUGLIST tag can be used to enable (YES) or +# disable (NO) the bug list. This list is created by putting \bug +# commands in the documentation. + +GENERATE_BUGLIST = YES + +# The GENERATE_DEPRECATEDLIST tag can be used to enable (YES) or +# disable (NO) the deprecated list. This list is created by putting +# \deprecated commands in the documentation. + +GENERATE_DEPRECATEDLIST= YES + +# The ENABLED_SECTIONS tag can be used to enable conditional +# documentation sections, marked by \if sectionname ... \endif. + +ENABLED_SECTIONS = + +# The MAX_INITIALIZER_LINES tag determines the maximum number of lines +# the initial value of a variable or define consists of for it to appear in +# the documentation. If the initializer consists of more lines than specified +# here it will be hidden. Use a value of 0 to hide initializers completely. +# The appearance of the initializer of individual variables and defines in the +# documentation can be controlled using \showinitializer or \hideinitializer +# command in the documentation regardless of this setting. + +MAX_INITIALIZER_LINES = 30 + +# Set the SHOW_USED_FILES tag to NO to disable the list of files generated +# at the bottom of the documentation of classes and structs. If set to YES the +# list will mention the files that were used to generate the documentation. + +SHOW_USED_FILES = YES + +#--------------------------------------------------------------------------- +# configuration options related to warning and progress messages +#--------------------------------------------------------------------------- + +# The QUIET tag can be used to turn on/off the messages that are generated +# by doxygen. Possible values are YES and NO. If left blank NO is used. + +QUIET = NO + +# The WARNINGS tag can be used to turn on/off the warning messages that are +# generated by doxygen. Possible values are YES and NO. If left blank +# NO is used. + +WARNINGS = YES + +# If WARN_IF_UNDOCUMENTED is set to YES, then doxygen will generate warnings +# for undocumented members. If EXTRACT_ALL is set to YES then this flag will +# automatically be disabled. + +WARN_IF_UNDOCUMENTED = YES + +# If WARN_IF_DOC_ERROR is set to YES, doxygen will generate warnings for +# potential errors in the documentation, such as not documenting some +# parameters in a documented function, or documenting parameters that +# don't exist or using markup commands wrongly. + +WARN_IF_DOC_ERROR = YES + +# The WARN_FORMAT tag determines the format of the warning messages that +# doxygen can produce. The string should contain the $file, $line, and $text +# tags, which will be replaced by the file and line number from which the +# warning originated and the warning text. + +WARN_FORMAT = "$file:$line: $text" + +# The WARN_LOGFILE tag can be used to specify a file to which warning +# and error messages should be written. If left blank the output is written +# to stderr. + +WARN_LOGFILE = + +#--------------------------------------------------------------------------- +# configuration options related to the input files +#--------------------------------------------------------------------------- + +# The INPUT tag can be used to specify the files and/or directories that contain +# documented source files. You may enter file names like "myfile.cpp" or +# directories like "/usr/src/myproject". Separate the files or directories +# with spaces. + +INPUT = inc/nmeap.h + +# If the value of the INPUT tag contains directories, you can use the +# FILE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank the following patterns are tested: +# *.c *.cc *.cxx *.cpp *.c++ *.java *.ii *.ixx *.ipp *.i++ *.inl *.h *.hh *.hxx *.hpp +# *.h++ *.idl *.odl *.cs *.php *.php3 *.inc *.m *.mm + +FILE_PATTERNS = *.h + +# The RECURSIVE tag can be used to turn specify whether or not subdirectories +# should be searched for input files as well. Possible values are YES and NO. +# If left blank NO is used. + +RECURSIVE = YES + +# The EXCLUDE tag can be used to specify files and/or directories that should +# excluded from the INPUT source files. This way you can easily exclude a +# subdirectory from a directory tree whose root is specified with the INPUT tag. + +EXCLUDE = + +# The EXCLUDE_SYMLINKS tag can be used select whether or not files or directories +# that are symbolic links (a Unix filesystem feature) are excluded from the input. + +EXCLUDE_SYMLINKS = NO + +# If the value of the INPUT tag contains directories, you can use the +# EXCLUDE_PATTERNS tag to specify one or more wildcard patterns to exclude +# certain files from those directories. + +EXCLUDE_PATTERNS = + +# The EXAMPLE_PATH tag can be used to specify one or more files or +# directories that contain example code fragments that are included (see +# the \include command). + +EXAMPLE_PATH = + +# If the value of the EXAMPLE_PATH tag contains directories, you can use the +# EXAMPLE_PATTERNS tag to specify one or more wildcard pattern (like *.cpp +# and *.h) to filter out the source-files in the directories. If left +# blank all files are included. + +EXAMPLE_PATTERNS = + +# If the EXAMPLE_RECURSIVE tag is set to YES then subdirectories will be +# searched for input files to be used with the \include or \dontinclude +# commands irrespective of the value of the RECURSIVE tag. +# Possible values are YES and NO. If left blank NO is used. + +EXAMPLE_RECURSIVE = NO + +# The IMAGE_PATH tag can be used to specify one or more files or +# directories that contain image that are included in the documentation (see +# the \image command). + +IMAGE_PATH = + +# The INPUT_FILTER tag can be used to specify a program that doxygen should +# invoke to filter for each input file. Doxygen will invoke the filter program +# by executing (via popen()) the command , where +# is the value of the INPUT_FILTER tag, and is the name of an +# input file. Doxygen will then use the output that the filter program writes +# to standard output. If FILTER_PATTERNS is specified, this tag will be +# ignored. + +INPUT_FILTER = + +# The FILTER_PATTERNS tag can be used to specify filters on a per file pattern +# basis. Doxygen will compare the file name with each pattern and apply the +# filter if there is a match. The filters are a list of the form: +# pattern=filter (like *.cpp=my_cpp_filter). See INPUT_FILTER for further +# info on how filters are used. If FILTER_PATTERNS is empty, INPUT_FILTER +# is applied to all files. + +FILTER_PATTERNS = + +# If the FILTER_SOURCE_FILES tag is set to YES, the input filter (if set using +# INPUT_FILTER) will be used to filter the input files when producing source +# files to browse (i.e. when SOURCE_BROWSER is set to YES). + +FILTER_SOURCE_FILES = NO + +#--------------------------------------------------------------------------- +# configuration options related to source browsing +#--------------------------------------------------------------------------- + +# If the SOURCE_BROWSER tag is set to YES then a list of source files will +# be generated. Documented entities will be cross-referenced with these sources. +# Note: To get rid of all source code in the generated output, make sure also +# VERBATIM_HEADERS is set to NO. + +SOURCE_BROWSER = NO + +# Setting the INLINE_SOURCES tag to YES will include the body +# of functions and classes directly in the documentation. + +INLINE_SOURCES = NO + +# Setting the STRIP_CODE_COMMENTS tag to YES (the default) will instruct +# doxygen to hide any special comment blocks from generated source code +# fragments. Normal C and C++ comments will always remain visible. + +STRIP_CODE_COMMENTS = NO + +# If the REFERENCED_BY_RELATION tag is set to YES (the default) +# then for each documented function all documented +# functions referencing it will be listed. + +REFERENCED_BY_RELATION = YES + +# If the REFERENCES_RELATION tag is set to YES (the default) +# then for each documented function all documented entities +# called/used by that function will be listed. + +REFERENCES_RELATION = YES + +# If the VERBATIM_HEADERS tag is set to YES (the default) then Doxygen +# will generate a verbatim copy of the header file for each class for +# which an include is specified. Set to NO to disable this. + +VERBATIM_HEADERS = YES + +#--------------------------------------------------------------------------- +# configuration options related to the alphabetical class index +#--------------------------------------------------------------------------- + +# If the ALPHABETICAL_INDEX tag is set to YES, an alphabetical index +# of all compounds will be generated. Enable this if the project +# contains a lot of classes, structs, unions or interfaces. + +ALPHABETICAL_INDEX = NO + +# If the alphabetical index is enabled (see ALPHABETICAL_INDEX) then +# the COLS_IN_ALPHA_INDEX tag can be used to specify the number of columns +# in which this list will be split (can be a number in the range [1..20]) + +COLS_IN_ALPHA_INDEX = 5 + +# In case all classes in a project start with a common prefix, all +# classes will be put under the same header in the alphabetical index. +# The IGNORE_PREFIX tag can be used to specify one or more prefixes that +# should be ignored while generating the index headers. + +IGNORE_PREFIX = + +#--------------------------------------------------------------------------- +# configuration options related to the HTML output +#--------------------------------------------------------------------------- + +# If the GENERATE_HTML tag is set to YES (the default) Doxygen will +# generate HTML output. + +GENERATE_HTML = YES + +# The HTML_OUTPUT tag is used to specify where the HTML docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `html' will be used as the default path. + +HTML_OUTPUT = html + +# The HTML_FILE_EXTENSION tag can be used to specify the file extension for +# each generated HTML page (for example: .htm,.php,.asp). If it is left blank +# doxygen will generate files with .html extension. + +HTML_FILE_EXTENSION = .html + +# The HTML_HEADER tag can be used to specify a personal HTML header for +# each generated HTML page. If it is left blank doxygen will generate a +# standard header. + +HTML_HEADER = + +# The HTML_FOOTER tag can be used to specify a personal HTML footer for +# each generated HTML page. If it is left blank doxygen will generate a +# standard footer. + +HTML_FOOTER = + +# The HTML_STYLESHEET tag can be used to specify a user-defined cascading +# style sheet that is used by each HTML page. It can be used to +# fine-tune the look of the HTML output. If the tag is left blank doxygen +# will generate a default style sheet. Note that doxygen will try to copy +# the style sheet file to the HTML output directory, so don't put your own +# stylesheet in the HTML output directory as well, or it will be erased! + +HTML_STYLESHEET = + +# If the HTML_ALIGN_MEMBERS tag is set to YES, the members of classes, +# files or namespaces will be aligned in HTML using tables. If set to +# NO a bullet list will be used. + +HTML_ALIGN_MEMBERS = YES + +# If the GENERATE_HTMLHELP tag is set to YES, additional index files +# will be generated that can be used as input for tools like the +# Microsoft HTML help workshop to generate a compressed HTML help file (.chm) +# of the generated HTML documentation. + +GENERATE_HTMLHELP = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the CHM_FILE tag can +# be used to specify the file name of the resulting .chm file. You +# can add a path in front of the file if the result should not be +# written to the html output directory. + +CHM_FILE = + +# If the GENERATE_HTMLHELP tag is set to YES, the HHC_LOCATION tag can +# be used to specify the location (absolute path including file name) of +# the HTML help compiler (hhc.exe). If non-empty doxygen will try to run +# the HTML help compiler on the generated index.hhp. + +HHC_LOCATION = + +# If the GENERATE_HTMLHELP tag is set to YES, the GENERATE_CHI flag +# controls if a separate .chi index file is generated (YES) or that +# it should be included in the master .chm file (NO). + +GENERATE_CHI = NO + +# If the GENERATE_HTMLHELP tag is set to YES, the BINARY_TOC flag +# controls whether a binary table of contents is generated (YES) or a +# normal table of contents (NO) in the .chm file. + +BINARY_TOC = NO + +# The TOC_EXPAND flag can be set to YES to add extra items for group members +# to the contents of the HTML help documentation and to the tree view. + +TOC_EXPAND = NO + +# The DISABLE_INDEX tag can be used to turn on/off the condensed index at +# top of each HTML page. The value NO (the default) enables the index and +# the value YES disables it. + +DISABLE_INDEX = NO + +# This tag can be used to set the number of enum values (range [1..20]) +# that doxygen will group on one line in the generated HTML documentation. + +ENUM_VALUES_PER_LINE = 4 + +# If the GENERATE_TREEVIEW tag is set to YES, a side panel will be +# generated containing a tree-like index structure (just like the one that +# is generated for HTML Help). For this to work a browser that supports +# JavaScript, DHTML, CSS and frames is required (for instance Mozilla 1.0+, +# Netscape 6.0+, Internet explorer 5.0+, or Konqueror). Windows users are +# probably better off using the HTML help feature. + +GENERATE_TREEVIEW = NO + +# If the treeview is enabled (see GENERATE_TREEVIEW) then this tag can be +# used to set the initial width (in pixels) of the frame in which the tree +# is shown. + +TREEVIEW_WIDTH = 250 + +#--------------------------------------------------------------------------- +# configuration options related to the LaTeX output +#--------------------------------------------------------------------------- + +# If the GENERATE_LATEX tag is set to YES (the default) Doxygen will +# generate Latex output. + +GENERATE_LATEX = NO + +# The LATEX_OUTPUT tag is used to specify where the LaTeX docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `latex' will be used as the default path. + +LATEX_OUTPUT = latex + +# The LATEX_CMD_NAME tag can be used to specify the LaTeX command name to be +# invoked. If left blank `latex' will be used as the default command name. + +LATEX_CMD_NAME = latex + +# The MAKEINDEX_CMD_NAME tag can be used to specify the command name to +# generate index for LaTeX. If left blank `makeindex' will be used as the +# default command name. + +MAKEINDEX_CMD_NAME = makeindex + +# If the COMPACT_LATEX tag is set to YES Doxygen generates more compact +# LaTeX documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_LATEX = NO + +# The PAPER_TYPE tag can be used to set the paper type that is used +# by the printer. Possible values are: a4, a4wide, letter, legal and +# executive. If left blank a4wide will be used. + +PAPER_TYPE = a4wide + +# The EXTRA_PACKAGES tag can be to specify one or more names of LaTeX +# packages that should be included in the LaTeX output. + +EXTRA_PACKAGES = + +# The LATEX_HEADER tag can be used to specify a personal LaTeX header for +# the generated latex document. The header should contain everything until +# the first chapter. If it is left blank doxygen will generate a +# standard header. Notice: only use this tag if you know what you are doing! + +LATEX_HEADER = + +# If the PDF_HYPERLINKS tag is set to YES, the LaTeX that is generated +# is prepared for conversion to pdf (using ps2pdf). The pdf file will +# contain links (just like the HTML output) instead of page references +# This makes the output suitable for online browsing using a pdf viewer. + +PDF_HYPERLINKS = NO + +# If the USE_PDFLATEX tag is set to YES, pdflatex will be used instead of +# plain latex in the generated Makefile. Set this option to YES to get a +# higher quality PDF documentation. + +USE_PDFLATEX = NO + +# If the LATEX_BATCHMODE tag is set to YES, doxygen will add the \\batchmode. +# command to the generated LaTeX files. This will instruct LaTeX to keep +# running if errors occur, instead of asking the user for help. +# This option is also used when generating formulas in HTML. + +LATEX_BATCHMODE = NO + +# If LATEX_HIDE_INDICES is set to YES then doxygen will not +# include the index chapters (such as File Index, Compound Index, etc.) +# in the output. + +LATEX_HIDE_INDICES = NO + +#--------------------------------------------------------------------------- +# configuration options related to the RTF output +#--------------------------------------------------------------------------- + +# If the GENERATE_RTF tag is set to YES Doxygen will generate RTF output +# The RTF output is optimized for Word 97 and may not look very pretty with +# other RTF readers or editors. + +GENERATE_RTF = NO + +# The RTF_OUTPUT tag is used to specify where the RTF docs will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `rtf' will be used as the default path. + +RTF_OUTPUT = rtf + +# If the COMPACT_RTF tag is set to YES Doxygen generates more compact +# RTF documents. This may be useful for small projects and may help to +# save some trees in general. + +COMPACT_RTF = NO + +# If the RTF_HYPERLINKS tag is set to YES, the RTF that is generated +# will contain hyperlink fields. The RTF file will +# contain links (just like the HTML output) instead of page references. +# This makes the output suitable for online browsing using WORD or other +# programs which support those fields. +# Note: wordpad (write) and others do not support links. + +RTF_HYPERLINKS = NO + +# Load stylesheet definitions from file. Syntax is similar to doxygen's +# config file, i.e. a series of assignments. You only have to provide +# replacements, missing definitions are set to their default value. + +RTF_STYLESHEET_FILE = + +# Set optional variables used in the generation of an rtf document. +# Syntax is similar to doxygen's config file. + +RTF_EXTENSIONS_FILE = + +#--------------------------------------------------------------------------- +# configuration options related to the man page output +#--------------------------------------------------------------------------- + +# If the GENERATE_MAN tag is set to YES (the default) Doxygen will +# generate man pages + +GENERATE_MAN = NO + +# The MAN_OUTPUT tag is used to specify where the man pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `man' will be used as the default path. + +MAN_OUTPUT = man + +# The MAN_EXTENSION tag determines the extension that is added to +# the generated man pages (default is the subroutine's section .3) + +MAN_EXTENSION = .3 + +# If the MAN_LINKS tag is set to YES and Doxygen generates man output, +# then it will generate one additional man file for each entity +# documented in the real man page(s). These additional files +# only source the real man page, but without them the man command +# would be unable to find the correct page. The default is NO. + +MAN_LINKS = NO + +#--------------------------------------------------------------------------- +# configuration options related to the XML output +#--------------------------------------------------------------------------- + +# If the GENERATE_XML tag is set to YES Doxygen will +# generate an XML file that captures the structure of +# the code including all documentation. + +GENERATE_XML = NO + +# The XML_OUTPUT tag is used to specify where the XML pages will be put. +# If a relative path is entered the value of OUTPUT_DIRECTORY will be +# put in front of it. If left blank `xml' will be used as the default path. + +XML_OUTPUT = xml + +# The XML_SCHEMA tag can be used to specify an XML schema, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_SCHEMA = + +# The XML_DTD tag can be used to specify an XML DTD, +# which can be used by a validating XML parser to check the +# syntax of the XML files. + +XML_DTD = + +# If the XML_PROGRAMLISTING tag is set to YES Doxygen will +# dump the program listings (including syntax highlighting +# and cross-referencing information) to the XML output. Note that +# enabling this will significantly increase the size of the XML output. + +XML_PROGRAMLISTING = YES + +#--------------------------------------------------------------------------- +# configuration options for the AutoGen Definitions output +#--------------------------------------------------------------------------- + +# If the GENERATE_AUTOGEN_DEF tag is set to YES Doxygen will +# generate an AutoGen Definitions (see autogen.sf.net) file +# that captures the structure of the code including all +# documentation. Note that this feature is still experimental +# and incomplete at the moment. + +GENERATE_AUTOGEN_DEF = NO + +#--------------------------------------------------------------------------- +# configuration options related to the Perl module output +#--------------------------------------------------------------------------- + +# If the GENERATE_PERLMOD tag is set to YES Doxygen will +# generate a Perl module file that captures the structure of +# the code including all documentation. Note that this +# feature is still experimental and incomplete at the +# moment. + +GENERATE_PERLMOD = NO + +# If the PERLMOD_LATEX tag is set to YES Doxygen will generate +# the necessary Makefile rules, Perl scripts and LaTeX code to be able +# to generate PDF and DVI output from the Perl module output. + +PERLMOD_LATEX = NO + +# If the PERLMOD_PRETTY tag is set to YES the Perl module output will be +# nicely formatted so it can be parsed by a human reader. This is useful +# if you want to understand what is going on. On the other hand, if this +# tag is set to NO the size of the Perl module output will be much smaller +# and Perl will parse it just the same. + +PERLMOD_PRETTY = YES + +# The names of the make variables in the generated doxyrules.make file +# are prefixed with the string contained in PERLMOD_MAKEVAR_PREFIX. +# This is useful so different doxyrules.make files included by the same +# Makefile don't overwrite each other's variables. + +PERLMOD_MAKEVAR_PREFIX = + +#--------------------------------------------------------------------------- +# Configuration options related to the preprocessor +#--------------------------------------------------------------------------- + +# If the ENABLE_PREPROCESSING tag is set to YES (the default) Doxygen will +# evaluate all C-preprocessor directives found in the sources and include +# files. + +ENABLE_PREPROCESSING = YES + +# If the MACRO_EXPANSION tag is set to YES Doxygen will expand all macro +# names in the source code. If set to NO (the default) only conditional +# compilation will be performed. Macro expansion can be done in a controlled +# way by setting EXPAND_ONLY_PREDEF to YES. + +MACRO_EXPANSION = NO + +# If the EXPAND_ONLY_PREDEF and MACRO_EXPANSION tags are both set to YES +# then the macro expansion is limited to the macros specified with the +# PREDEFINED and EXPAND_AS_PREDEFINED tags. + +EXPAND_ONLY_PREDEF = NO + +# If the SEARCH_INCLUDES tag is set to YES (the default) the includes files +# in the INCLUDE_PATH (see below) will be search if a #include is found. + +SEARCH_INCLUDES = YES + +# The INCLUDE_PATH tag can be used to specify one or more directories that +# contain include files that are not input files but should be processed by +# the preprocessor. + +INCLUDE_PATH = + +# You can use the INCLUDE_FILE_PATTERNS tag to specify one or more wildcard +# patterns (like *.h and *.hpp) to filter out the header-files in the +# directories. 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Also +# note that a graph may be further truncated if the graph's image dimensions are +# not sufficient to fit the graph (see MAX_DOT_GRAPH_WIDTH and MAX_DOT_GRAPH_HEIGHT). +# If 0 is used for the depth value (the default), the graph is not depth-constrained. + +MAX_DOT_GRAPH_DEPTH = 0 + +# If the GENERATE_LEGEND tag is set to YES (the default) Doxygen will +# generate a legend page explaining the meaning of the various boxes and +# arrows in the dot generated graphs. + +GENERATE_LEGEND = YES + +# If the DOT_CLEANUP tag is set to YES (the default) Doxygen will +# remove the intermediate dot files that are used to generate +# the various graphs. + +DOT_CLEANUP = YES + +#--------------------------------------------------------------------------- +# Configuration::additions related to the search engine +#--------------------------------------------------------------------------- + +# The SEARCHENGINE tag specifies whether or not a search engine should be +# used. If set to NO the values of all tags below this one will be ignored. + +SEARCHENGINE = NO diff --git a/bertos/net/nmeap/Makefile b/bertos/net/nmeap/Makefile new file mode 100644 index 0000000..425079a --- /dev/null +++ b/bertos/net/nmeap/Makefile @@ -0,0 +1,23 @@ +# rules +export CC=gcc +export CDEFS = -DNDEBUG + +# directories +BASE :=$(shell pwd) +export SRC=$(BASE)/src +export TST=$(BASE)/tst +export INC=$(BASE)/inc +export LIB=$(BASE)/lib + +all : + cd $(SRC) && $(MAKE) all + cd $(TST) && $(MAKE) all + + +clean : + cd $(SRC) && $(MAKE) clean + cd $(TST) && $(MAKE) clean + +doc : + doxygen + diff --git a/bertos/net/nmeap/README b/bertos/net/nmeap/README new file mode 100644 index 0000000..bc2a6a0 --- /dev/null +++ b/bertos/net/nmeap/README @@ -0,0 +1,24 @@ +NMEAP is licensed under the BSD Open Source License. See the file COPYING for terms of the license + +VERSION 0.2 - bug fixes and tutorial + a. fixed a bug in test3.c + b. added a tutorial in doc/tutorial.html + +Installation: + +Unpack the tarball or zip file into the desired working directory. + +Building: + +Under Linux, execute 'make' from the top level directory. + +Under Win32, execute 'nmake -f win32.mak' from the top level directory + +Using: + +This library is statically linked to the application. Just include it in +your linker command line. See the file 'nmeap.h' and the examples in the +'tst' directory for usage instructions. + + + diff --git a/bertos/net/nmeap/doc/tutorial.html b/bertos/net/nmeap/doc/tutorial.html new file mode 100644 index 0000000..539a05a --- /dev/null +++ b/bertos/net/nmeap/doc/tutorial.html @@ -0,0 +1,151 @@ + + +

NMEAP TUTORIAL AND REFERENCE

+
+
+copyright (c) 2005 David M. Howard
+This work is licensed under the Creative Commons Attribution License.
+To view a copy of this license, visit
+http://creativecommons.org/licenses/by/2.0/ or send a letter to
+Creative Commons, 559 Nathan Abbott Way, Stanford, California 94305,USA
+You are free:
+    * to copy, distribute, display, and perform the work
+    * to make derivative works
+    * to make commercial use of the work
+Under the following conditions:
+Attribution. You must give the original author credit.
+    * For any reuse or distribution, you must make clear to others the
+      license terms of this work.
+    * Any of these conditions can be waived if you get permission from
+      the author.
+
+
+

Table Of Contents

+
    +
  1. Installing the Source Code
    2. +
  2. Building the Library
    3. +
  3. Description and Examples
    4. +
  4. API Documentation
    5. +
+  +

1. Installing the source code

+Get the source code from NMEAP at sourceforge.net +
+
+Linux:
+	expand the tarball to a directory of your choice.
+	>tar --gzip -xf [tarball name]
+	>cd [nmeap...]
+	
+Windows:
+	use Winzip to unzip the zipfile to a directory of your choice
+	
+
+ +  +

2. Building the library

+
+
+Linux:
+	>cd [working directory]
+	>make
+	This builds a static library named libnmeap.a in the 'lib' directory. there is no option for a dynamic library. 
+	This thing is so small that it isn't worth the trouble. It also builds the test/examples programs in
+	'tst'.
+	
+Windows:
+	>cd [working directory]
+	>nmake -f win32.mak
+	Again, this builds a static library names libnmeap.lib in the 'lib' direcotry, plus the test programs in 'tst'
+
+  +

3. Description and Examples

+

The NMEA-0183 standard specifies how the output is formatted for GPS data output, usually on a serial port. The data +consists of 'sentences' delimited by CR/LF end of line markers. A lot has been written about the format, so this document +won't cover the specifics. A good place to start is the NMEA FAQ +maintained by Peter Bennett.

+

NMEAP is an extensible C language parser library that takes NMEA sentences as input and spits out the decoded data as output. You link +NMEAP in to your application, set it up, initialize it and feed it bytes. It signals you when it has found a complete valid sentence and +provides the parsed out data to you. Parsing NMEA-0183 is pretty easy but it has a few tricky bits. The value of NMEAP is not that it is +rocket science to write an NMEA parser, but that it provides a relatively efficient implementation that works, along with an +extension framework to add more sentence parsers without hacking the base source code.

+

An NMEA 'sentence' has the following format:

+
+	$name,data1,data2,...,dataN*XX[CR/LF]
+	OR
+	$name,data1,data2,...,dataN[CR/LF]
+	
+where
+	header       := a 5 digit sentence identifier. all ASCII upper case. e.g. GPGGA
+	data1..dataN := some number of data elements, all ASCII numbers or letters, in all kinds of weird formats.
+                    fields can be empty, in which case 2 commas will be side by side.
+                    normally data fields are identified by their position in the sentence. 
+	*XX          := a '*' plus two ASCII hex digits of checksum. this field is optional.
+	[CR/LF]      := end of line is terminated by a carriage return/linefeed pair.
+	
+example from the NMEA FAQ:
+ 	$GPGGA,123519,4807.038,N,01131.324,E,1,08,0.9,545.4,M,46.9,M,,*42
+
+

The NMEAP parser works as follows: +

    +
  1. the application sets up the parser and specifies which sentences are to be parsed + and what is to be done with the output data from the parser.
    2. +
  2. the application reads raw bytes from its IO device and passes the bytes to the parser, + either byte by byte or as a buffer/length pair.
    3. +
  3. nmeap: +
      +
    • runs the input bytes through a lexical scanner that recognizes complete and valid sentences
      • +
    • when a sentence is recognized, a second lexical scanner divides the sentence into discrete tokens.
      • +
    • the name field is matched internally to a sentence parser for that name
      • +
    • the sentence parser picks out the data strings and decodes them into an nmeap or user + defined data structure with normal data types such as integer, float, double etc.
      • +
    • notifies the client application that a sentence was found and decoded, either thru a callout + to an event handler (ala Expat) or via a return code and a shared data structure, or both.
      • +
    +
    4. +
+

Sentence Parsers

+

Most of the work in NMEAP is done by the sentence parsers. Each type of NMEA sentence string has an associated parser. NMEAP provides +standard ones, and the user can add more in a systematic way. +The sentence parser is responsible for knowing the token position of the data elements and whatever format they +are in. There are functions in nmeap to decode standard data element formats. If something is nonstandard, +the sentence parser decodes it. Each sentence parser has a 'struct' type associated with it +that the decoded data gets poked into an instance of that data structure, which is provided by the client application when nmeap is set +up.

+

Memory Allocation

+

All memory allocation is done by the application. Several data items are required. The application can declare them statically or use +malloc or whatever. NMEAP doesn't do any memory allocation on its own. This is an important requirement for portability and especially in +embedded systems where memory allocation needs to be tightly defined and controlled. +

+

Threads

+

NMEAP as implemented is not meant to be called from multiple threads. It expects to execute within the context of a single thread. The sentence callouts execute +in the context of the thread of the nmeap client thread. Given how nmeap works, it doesn't really make sense to make nmeap thread-safe +because the usage pattern is intrinsically single thread. If one wanted to, one could add some mutex locking within the nmeap function +calls to make it thread safe. In a multithreaded environment, a more likely approach to thread-safety is to put synchronization in the client side of the application, +within the sentence parser callouts or inline handling of sentence data. +

+

IO

+

NMEAP is IO agnostic. That is a pompous way of saying that NMEAP doesn't do the IO, the client application does it. There are way too +many IO schemes to handle to keep it portable, especially in the embedded world. That said, the example programs contain a Linux and a Win32 specific +program that includes serial IO for those two platforms. +

+ +

Examples

+Look at the code for the following example programs to see the usage patterns. The are all located in the +'tst' directory. There are big, obvious comments delineating the steps to setting up and using NMEAP. +The IO is simulated in the samples. Follow the comments in the code +to see the sequence of operations to setup and run the parser. When you are ready just plug in your own IO. +
    +
  1. tst/test1.c Setup for standard GGA and RMC sentences with byte by byte IO (easiest to code up)
    2. +
  2. tst/test2.c Setup for standard GGA and RMC sentences with block IO (more efficient from a system call standpoint)
    3. +
  3. tst/test3.c Adding a custom parser
    4. +
  4. tst/wingps.c A console program that reads a serial port and writes the decoded data to standard out for WIN32 applications
    5. +
+  +

API Documentation

+The documentation for the actual API is in Doxygen HTML format and is contained in the 'doc' directory of +the source distribution. Or, all the external data structures, constants and functions are defined in 'inc/nmeap.h'. + +

END

+ + diff --git a/bertos/net/nmeap/inc/nmeap.h b/bertos/net/nmeap/inc/nmeap.h new file mode 100644 index 0000000..f9bcc0f --- /dev/null +++ b/bertos/net/nmeap/inc/nmeap.h @@ -0,0 +1,227 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef __NMEAP_H__ +#define __NMEAP_H__ + +#ifdef __cplusplus +extern "C" { +#endif + +#include "cfg/cfg_nmea.h" + +/* +============================================ +COMPILE TIME CONFIGURATION CONSTANTS +============================================ +*/ + +/* these constants affect the size of the context object. tweak them as desired but know what you are doing */ + +/** maximum number of sentence parsers supported */ +#define NMEAP_MAX_SENTENCES CONFIG_NMEAP_MAX_SENTENCES +/** length of sentence name. leave this at 5 unless you really know what you are doing */ +#define NMEAP_MAX_SENTENCE_NAME_LENGTH 5 +/** max length of a complete sentence. the standard says 82 bytes, but its probably better to go at least 128 since + * some units don't adhere to the 82 bytes especially for proprietary sentences */ +#define NMEAP_MAX_SENTENCE_LENGTH CONFIG_NMEAP_MAX_SENTENCE_LENGTH +/** max tokens in one sentence. 24 is enough for any standard sentence */ +#define NMEAP_MAX_TOKENS CONFIG_NMEAP_MAX_TOKENS + +/* predefined message ID's */ + +/* GGA MESSAGE ID */ +#define NMEAP_GPGGA 1 +/* RMC MESSAGE ID */ +#define NMEAP_GPRMC 2 + +/** user defined parsers should make ID numbers using NMEAP_USER as the base value, plus some increment */ +#define NMEAP_USER 100 + +/* forward references */ +struct nmeap_context; +struct nmeap_sentence; + +/* +============================================ +CALLOUTS +============================================ +*/ + +/** + * sentence callout function type + * a callout is fired for each registered sentence type + * the callout gets the object context and a pointer to sentence specific data. + * the callout must cast the 'sentence_data' to the appropriate type for that callout + * @param context nmea object context + * @param sentence_data sentence specific data +*/ +typedef void (*nmeap_callout_t)(struct nmeap_context *context,void *sentence_data,void *user_data); + +/** + * sentence parser function type + * stored in the object context and called internally when the sentence name matches + * the specified value + * the callout gets the object context and a pointer to sentence specific data. + * the callout must cast the 'sentence_data' to the appropriate type for that callout + * @param context nmea object context + * @param sentence_data sentence specific data + * @return id of sentence (each sentence parser knows its own ID) +*/ +typedef int (*nmeap_sentence_parser_t)(struct nmeap_context *context,struct nmeap_sentence *sentence); + + +/* ==== opaque types === */ +#include "nmeap_def.h" + + +/* +============================================ +STANDARD SENTENCE DATA STRUCTURES +============================================ +*/ + +/** extracted data from a GGA message */ +struct nmeap_gga { + double latitude; + double longitude; + double altitude; + unsigned long time; + int satellites; + int quality; + double hdop; + double geoid; +}; +typedef struct nmeap_gga nmeap_gga_t; + +/** extracted data from an RMC message */ +struct nmeap_rmc { + unsigned long time; + char warn; + double latitude; + double longitude; + double speed; + double course; + unsigned long date; + double magvar; +}; + +typedef struct nmeap_rmc nmeap_rmc_t; + +/* +============================================ +METHODS +============================================ +*/ + +/** + * initialize an NMEA parser. call this function to initialize a user allocated context object + * @param context nmea object context. allocated by user statically or dynamically. + * @param user_data pointer to user defined data + * @return 0 if ok, -1 if initialization failed + */ +int nmeap_init(nmeap_context_t *context,void *user_data); + +/** + * register an NMEA sentence parser + * @param context nmea object context + * @param sentence_name string matching the sentence name for this parser. e.g. "GPGGA". not including the '$' + * @param sentence_parser parser function for this sentence + * @param sentence_callout callout triggered when this sentence is received and parsed. + * if null, no callout is triggered for this sentence + * @param sentence_data user allocated sentence specific data defined by the application. the parser uses + this data item to store the extracted data. This data object needs to persist over the life + of the parser, so be careful if allocated on the stack. + * @return 0 if registered ok, -1 if registration failed + */ +int nmeap_addParser(nmeap_context_t *context, + const char *sentence_name, + nmeap_sentence_parser_t sentence_parser, + nmeap_callout_t sentence_callout, + void *sentence_data + ); + +/** + * parse a buffer of nmea data. + * @param context nmea object context + * @param buffer buffer of input characters + * @param length [in,out] pointer to length of buffer. on return, contains number of characters not used for + * the current sentence + * @return -1 if error, 0 if the data did not complete a sentence, sentence code if a sentence was found in the stream + */ +int nmeap_parseBuffer(nmeap_context_t *context,const char *buffer,int *length); + +/** + * parse one character of nmea data. + * @param context nmea object context + * @param ch input character + * @return -1 if error, 0 if the data did not complete a sentence, sentence code if a sentence was found in the stream + */ +int nmeap_parse(nmeap_context_t *context,char ch); + + +/** + * built-in parser for GGA sentences. + * @param context nmea object context + * @param sentence sentence object for this parser + */ +int nmeap_gpgga(nmeap_context_t *context,nmeap_sentence_t *sentence); + +/** + * built-in parser for RMC sentences. + * @param context nmea object context + * @param sentence sentence object for this parser + */ +int nmeap_gprmc(nmeap_context_t *context,nmeap_sentence_t *sentence); + +/** + * extract latitude from 2 tokens in ddmm.mmmm,h format. + * @param plat pointer to token with numerical latitude + * @param phem pointer to token with hemisphere + * @return latitude in degrees and fractional degrees + */ +double nmeap_latitude(const char *plat,const char *phem); + + +/** + * extract longitude from 2 tokens in ddmm.mmmm,h format. + * @param plat pointer to token with numerical longitude + * @param phem pointer to token with hemisphere + * @return longitude in degrees and fractional degrees + */ +double nmeap_longitude(const char *plat,const char *phem); + + +/** + * extract altitude from 2 tokens in xx.x format. + * @param palt pointer to token with numerical altitude + * @param punits pointer to token with measure unint + * @return altitude in meter or feet + */ +double nmeap_altitude(const char *palt,const char *punits); + +#ifdef __cplusplus +} // extern C +#endif + + +#endif + diff --git a/bertos/net/nmeap/inc/nmeap_def.h b/bertos/net/nmeap/inc/nmeap_def.h new file mode 100644 index 0000000..e8c44e3 --- /dev/null +++ b/bertos/net/nmeap/inc/nmeap_def.h @@ -0,0 +1,72 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +#ifndef __NMEAP_DEF_H__ +#define __NMEAP_DEF_H__ + +/** + * context for a single sentence + */ +typedef struct nmeap_sentence { + char name[NMEAP_MAX_SENTENCE_NAME_LENGTH + 1]; + int id; + nmeap_sentence_parser_t parser; + nmeap_callout_t callout; + void *data; +} nmeap_sentence_t; + +/** + * parser context + */ +struct nmeap_context { + /** support up to 8 sentences */ + nmeap_sentence_t sentence[NMEAP_MAX_SENTENCES]; /* sentence descriptors */ + int sentence_count; /* number of initialized descriptors */ + + /** sentence input buffer */ + char input[NMEAP_MAX_SENTENCE_LENGTH + 1]; /* input line buffer */ + int input_count; /* index into 'input */ + int input_state; /* current lexical scanner state */ + char input_name[6]; /* sentence name */ + char icks; /* input checksum */ + char ccks; /* computed checksum */ + + /* tokenization */ + char *token[NMEAP_MAX_TOKENS]; /* list of delimited tokens */ + int tokens; /* list of tokens */ + + /** errors and debug. optimize these as desired */ + unsigned long msgs; /* count of good messages */ + unsigned long err_hdr; /* header error */ + unsigned long err_ovr; /* overrun error */ + unsigned long err_unk; /* unknown error */ + unsigned long err_id; /* bad character in id */ + unsigned long err_cks; /* bad checksum */ + unsigned long err_crl; /* expecting cr or lf, got something else */ + char debug_input[NMEAP_MAX_SENTENCE_LENGTH + 1]; /* input line buffer for debug */ + + /** opaque user data */ + void *user_data; +}; + +typedef struct nmeap_context nmeap_context_t; + +#endif /* __NMEAP_DEF_H__ */ diff --git a/bertos/net/nmeap/src/Makefile b/bertos/net/nmeap/src/Makefile new file mode 100644 index 0000000..5e94960 --- /dev/null +++ b/bertos/net/nmeap/src/Makefile @@ -0,0 +1,31 @@ +# specify compiler flags +CFLAGS = -I $(INC) $(CDEFS) -g -O0 -Werror -Wall + +# set library name +LIBNAME = libnmeap.a + +COBJ = nmeap01.o + +INCLUDES= $(INC)/nmeap.h $(INC)/nmeap_def.h + +# build everything +all : $(LIB)/$(LIBNAME) + +# build the library +$(LIB)/$(LIBNAME) : $(COBJ) + -$(RM) $(LIB)/$(LIBNAME) + $(AR) -q $(LIB)/$(LIBNAME) $(COBJ) + +# build all c files into .o files +$(COBJ): %.o: %.c + $(CC) -c $(CFLAGS) $(SRC)/$< -o $@ + +# erase all intermediate and output files +clean : + -$(RM) *.o + -$(RM) *~ + -$(RM) $(LIB)/$(LIBNAME) + +# include file dependencies +$(COBJ) : $(INCLUDES) + diff --git a/bertos/net/nmeap/src/nmeap.mak b/bertos/net/nmeap/src/nmeap.mak new file mode 100644 index 0000000..703ffc9 --- /dev/null +++ b/bertos/net/nmeap/src/nmeap.mak @@ -0,0 +1,20 @@ +INCLUDES= ..\inc\nmeap.h ..\inc\nmeap_def.h +CSRC = nmeap01.c +LIBNAME = ..\lib\libnmeap.lib + +# build everything +all : $(LIBNAME) + +$(LIBNAME) : nmeap01.obj + -erase $(LIBNAME) + lib /OUT:$(LIBNAME) nmeap01.obj + +nmeap01.obj : nmeap01.c $(INCLUDES) + cl /DNDEBUG /c /I..\inc nmeap01.c + +# erase all intermediate and output files +clean : + -erase *.obj + -erase $(LIBNAME) + + diff --git a/bertos/net/nmeap/src/nmeap01.c b/bertos/net/nmeap/src/nmeap01.c new file mode 100644 index 0000000..e09edc9 --- /dev/null +++ b/bertos/net/nmeap/src/nmeap01.c @@ -0,0 +1,634 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/** + * nmeap01.c + * nmeap gps data parser + * + * see the file COPYING for terms of the licnese +*/ + +#include +#include +#include +#include + +#include "../inc/nmeap.h" + +#include + +#define assert(x) ASSERT(x) + +#include "cfg/cfg_nmea.h" + +#define LOG_LEVEL NMEA_LOG_LEVEL +#define LOG_FORMAT NMEA_LOG_FORMAT +#include + +#ifdef _DEBUG + #undef NDEBUG + #define printf(str,...) LOG_INFO(str, ## __VA_ARGS__) +#endif + +/* this only works if you are sure you have an upper case hex digit */ +#define HEXTOBIN(ch) ((ch <= '9') ? ch - '0' : ch - ('A' - 10)) + +/* forward references */ +int nmeap_init(nmeap_context_t *context,void *user_data); +int nmeap_addParser(nmeap_context_t *context, + const char *sentence_name, + nmeap_sentence_parser_t sentence_parser, + nmeap_callout_t sentence_callout, + void *sentence_data + ); +int nmeap_tokenize(nmeap_context_t *context); +int nmeap_process(nmeap_context_t *context); +int nmeap_parse(nmeap_context_t *context,char ch); +int nmeap_parseBuffer(nmeap_context_t *context,const char *buffer,int *length); + +/** + * get a latitude out of a pair of nmea tokens + */ +double nmeap_latitude(const char *plat,const char *phem) +{ + double lat; + int deg; + double min; + int ns; + + assert(plat != 0); + assert(phem != 0); + + if (*plat == 0) { + return 0.0; + } + if (*phem == 0) { + return 0.0; + } + + /* north lat is +, south lat is - */ + if (*phem == 'N') { + ns = 1; + } + else { + ns = -1; + } + + /* latitude is degrees, minutes, fractional minutes */ + /* no validation is performed on the token. it better be good.*/ + /* if it comes back 0.0 then probably the token was bad */ + lat = atof(plat); + + /* extract the degree part */ + deg = (int)(lat / 100.0); + + /* mask out the degrees */ + min = lat - (deg * 100.0); + + /* compute the actual latitude in degrees.decimal-degrees */ + lat = (deg + (min / 60.0)) * ns; + + return lat; +} + +/** + * get a longitude out of a pair of nmea tokens + */ +double nmeap_longitude(const char *plon,const char *phem) +{ + double lon; + int deg; + double min; + int ew; + + assert(plon != 0); + assert(phem != 0); + + if (*plon == 0) { + return 0.0; + } + if (*phem == 0) { + return 0.0; + } + + /* west long is negative, east long is positive */ + if (*phem == 'E') { + ew = 1; + } + else { + ew = -1; + } + + /* longitude is degrees, minutes, fractional minutes */ + /* no validation is performed on the token. it better be good.*/ + /* if it comes back 0.0 then probably the token was bad */ + lon = atof(plon); + + /* extract the degree part */ + deg = (int)(lon / 100.0); + + /* mask out the degrees */ + min = lon - (deg * 100.0); + + /* compute the actual lonitude in degrees.decimal-degrees */ + lon = (deg + (min / 60.0)) * ew; + + + return lon; +} + +/** + * get an altitude longitude out of a pair of nmea tokens + * ALTITUDE is returned in METERS + */ +double nmeap_altitude(const char *palt,const char *punits) +{ + double alt; + + if (*palt == 0) { + return 0.0; + } + + /* convert with no error checking */ + alt = atof(palt); + + if (*punits == 'M') { + /* already in meters */ + } + else if (*punits == 'F') { + /* convert to feet */ + alt = alt * 3.2808399; + } + + return alt; +} + +/** + * initialize an NMEA parser + */ +int nmeap_init(nmeap_context_t *context,void *user_data) +{ + assert(context != 0); + + memset(context,0,sizeof(*context)); + + context->user_data = user_data; + + return 0; +} + +/** + * register an NMEA sentence parser + */ +int nmeap_addParser(nmeap_context_t *context, + const char *sentence_name, + nmeap_sentence_parser_t sentence_parser, + nmeap_callout_t sentence_callout, + void *sentence_data + ) +{ + nmeap_sentence_t *s = 0; + + /* runtime error */ + assert(context != 0); + + /* sentence capacity overflow */ + if (context->sentence_count >= NMEAP_MAX_SENTENCES) { + return -1; + } + + /* point at next empty sentence buffer */ + s = &context->sentence[context->sentence_count]; + + /* advance sentence data count */ + context->sentence_count++; + + /* clear the sentence data */ + memset(s,0,sizeof(*s)); + + /* name */ + strncpy(s->name,sentence_name,NMEAP_MAX_SENTENCE_NAME_LENGTH); + + /* parser */ + s->parser = sentence_parser; + + /* callout */ + s->callout = sentence_callout; + + /* data */ + s->data = sentence_data; + + return 0; +} + +/** + * tokenize a buffer + */ +int nmeap_tokenize(nmeap_context_t *context) +{ + char *s; + int tokens; + int state; + + /* first token is header. assume it is there */ + tokens = 0; + s = context->input; + context->token[tokens] = s; + + /* get rest of tokens */ + tokens = 1; + state = 0; + while((*s != 0)&&(tokens < NMEAP_MAX_TOKENS)) { + switch(state) { + case 0: + /* looking for end of a token */ + if (*s == ',') { + /* delimit at the comma */ + *s = 0; + /* new token */ + state = 1; + } + break; + case 1: + /* start of next token, might be another comma */ + context->token[tokens++] = s; + if (*s == ',') { + /* delimit at the comma */ + *s = 0; + } + else { + /* not a comma */ + state = 0; + } + break; + default: + state = 0; + break; + } + + // next character + s++; + } + return tokens; +} + +/** + * process a sentence + */ +int nmeap_process(nmeap_context_t *context) +{ + int id = 0; + int i; + nmeap_sentence_t *s; + + /* copy the input to a debug buffer */ + /* remove debug_input when everything is working. */ + strncpy(context->debug_input,context->input,sizeof(context->debug_input)); + + /* tokenize the input */ + context->tokens = nmeap_tokenize(context); + + /* try to find a matching sentence parser */ + /* this search is O(n). it has a lot of potential for optimization, at the expense of complexity, if you have a lot of sentences */ + /* binary search instead of linear (have to keep sentences in sorted order) O(NlogN) */ + /* OR, when sentences are added, create a TRIE structure to find the names with a constant time search O(5) */ + for(i=0;isentence_count;i++) { + s = &context->sentence[i]; + assert(s != 0); + if (strncmp(context->input_name,s->name,5) == 0) { + /* found a match, call its parser */ + id = (*context->sentence[i].parser)(context,s); + if (id > 0) { + break; + } + } + } + + return id; +} + +/** + +-5-+ +---+ + v | v | + +------+ +------+ +------+ +------+ +------+ + | 0 |--$--> |1-hdr |--alnum--> |2-data|----\r-->| 6-LF |---\n--->| done |--> 0 + +------+ +------+ +------+ +------+ +------+ + | ^ + * +--------\r-------+ + V | + +------+ +------+ +------+ + |3-cks |--xdigit-->|4-cks |-xdigit->| 5-CR | + +------+ +------+ +------+ + +return to start conditions: +1. buffer overflow +2. invalid character for state + +checksum calculation +two hex digits represent the XOR of all characters between, but not +including, the "$" and "*". A checksum is required on some +sentences. + +*/ +int nmeap_parse(nmeap_context_t *context,char ch) +{ + int status = 0; + + /* check for input buffer overrun first to avoid duplicating code in the + individual states + */ + if ((size_t)context->input_count >= (sizeof(context->input)-1)) { + /* input buffer overrun, restart state machine */ + context->input_state = 0; + /* reset input count */ + context->input_count = 0; + } + + /* store the byte */ + context->input[context->input_count] = ch; + + /* next buffer position */ + context->input_count++; + + /* run it through the lexical scanner */ + switch(context->input_state) { + /* LOOKING FOR $ */ + case 0: + if (ch == '$') { + /*look for id */ + context->input_state = 1; + context->ccks = 0; + context->icks = 0; + } + else { + /* header error, start over */ + context->err_hdr++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR 5 CHARACTER SENTENCE ID */ + case 1: + /* allow numbers even though it isn't usually done */ + /* a proprietary id might have a numeral */ + if (isalnum((unsigned char)ch)) { + /* store name separately */ + context->input_name[context->input_count - 2] = ch; + /* checksum */ + context->ccks ^= ch; + /* end of header? */ + if (context->input_count >= 6) { + /* yes, get body */ + context->input_state = 2; + } + } + else { + /* bad character, start over */ + context->err_id++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR CR OR CHECKSUM INDICATOR */ + case 2: + if (ch == '*') { + /* this sentence has a checksum */ + context->input_state = 3; + } + else if (ch == '\r') { + /* carriage return, no checksum, force a match */ + context->icks = 0; + context->ccks = 0; + context->input_state = 6; + } + else { + /* continue accumulating data */ + /* checksum */ + context->ccks ^= ch; + } + break; + /* LOOKING FOR FIRST CHECKSUM CHARACTER */ + case 3: + /* must be upper case hex digit */ + if (isxdigit((unsigned char)ch) && (ch <= 'F')) { + /* got first checksum byte */ + context->input_state = 4; + context->icks = HEXTOBIN(ch) << 4; + } + else { + /* input error, restart */ + context->err_cks++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR SECOND CHECKSUM CHARACTER */ + case 4: + /* must be upper case hex digit */ + if (isxdigit((unsigned char)ch) && (ch <= 'F')) { + /* got second checksum byte */ + context->input_state = 5; + context->icks += HEXTOBIN(ch); + } + else { + /* input error, restart */ + context->err_cks++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR CR */ + case 5: + if (ch == '\r') { + /* carriage return */ + context->input_state = 6; + } + else { + /* input error, restart */ + context->err_crl++; + context->input_state = 0; + context->input_count = 0; + } + break; + /* LOOKING FOR LINE FEED */ + case 6: + if (ch == '\n') { + /* linefeed, line complete */ + + /* delimit buffer */ + context->input[context->input_count] = 0; + + /* if the checksums match, process the sentence */ + if (context->ccks == context->icks) { + /* process */ + status = nmeap_process(context); + + /* count good messages */ + context->msgs++; + } + else { + /* count checksum errors */ + context->err_cks++; + } + + /* restart next time */ + context->input_state = 0; + context->input_count = 0; + } + else { + /* input error, restart */ + context->err_crl++; + context->input_state = 0; + context->input_count = 0; + } + break; + default: + context->err_unk++; + context->input_state = 0; + break; + } + + return status; +} + +/** + * parse a buffer of nmea data + */ +int nmeap_parseBuffer(nmeap_context_t *context,const char *buffer,int *length) +{ + int i; + int status; + int rem; + int tlen; + + tlen = *length; + rem = *length; + status = 0; + /* for each byte in the buffer */ + for(i=0;idata; + + /* if there is a data element, extract data from the tokens */ + if (gga != 0) { + gga->latitude = nmeap_latitude(context->token[2],context->token[3]); + gga->longitude = nmeap_longitude(context->token[4],context->token[5]); + gga->altitude = nmeap_altitude(context->token[9],context->token[10]); + gga->time = atoi(context->token[1]); + gga->satellites = atoi(context->token[7]); + gga->quality = atoi(context->token[6]); + gga->hdop = atof(context->token[8]); + gga->geoid = nmeap_altitude(context->token[11],context->token[12]); + } + +#ifndef NDEBUG + /* print raw input string */ + printf("%s",context->debug_input); + + /* print some validation data */ + printf("%s==%s %02x==%02x\n",context->input_name,sentence->name,context->icks,context->ccks); + + /* print the tokens */ + for(i=0;itokens;i++) { + printf("%d:%s\n",i,context->token[i]); + } +#endif + + /* if the sentence has a callout, call it */ + if (sentence->callout != 0) { + (*sentence->callout)(context,gga,context->user_data); + } + + return NMEAP_GPGGA; +} + +/** + * standard GPRMCntence parser + */ +int nmeap_gprmc(nmeap_context_t *context,nmeap_sentence_t *sentence) +{ +#ifndef NDEBUG + int i; +#endif + + /* get pointer to sentence data */ + nmeap_rmc_t *rmc = (nmeap_rmc_t *)sentence->data; + + /* if there is a data element, use it */ + if (rmc != 0) { + /* extract data from the tokens */ + rmc->time = atoi(context->token[1]); + rmc->warn = *context->token[2]; + rmc->latitude = nmeap_latitude(context->token[3],context->token[4]); + rmc->longitude = nmeap_longitude(context->token[5],context->token[6]); + rmc->speed = atof(context->token[7]); + rmc->course = atof(context->token[8]); + rmc->date = atoi(context->token[9]); + rmc->magvar = atof(context->token[10]); + } + +#ifndef NDEBUG + /* print raw input string */ + printf("%s",context->debug_input); + + /* print some validation data */ + printf("%s==%s %02x==%02x\n",context->input_name,sentence->name,context->icks,context->ccks); + + /* print the tokens */ + for(i=0;itokens;i++) { + printf("%d:%s\n",i,context->token[i]); + } +#endif + + /* if the sentence has a callout, call it */ + if (sentence->callout != 0) { + (*sentence->callout)(context,rmc,context->user_data); + } + + return NMEAP_GPRMC; +} + + diff --git a/bertos/net/nmeap/tst/Makefile b/bertos/net/nmeap/tst/Makefile new file mode 100644 index 0000000..e840752 --- /dev/null +++ b/bertos/net/nmeap/tst/Makefile @@ -0,0 +1,17 @@ +all : test1 test2 test3 + +test1 : $(LIB)/libnmeap.a $(TST)/test1.c + gcc -g -O0 -I $(INC) $(CDEFS) -Wall -Werror -o test1 $(TST)/test1.c $(LIB)/libnmeap.a + +test2 : $(LIB)/libnmeap.a $(TST)/test2.c + gcc -g -O0 -I $(INC) $(CDEFS) -Wall -Werror -o test2 $(TST)/test2.c $(LIB)/libnmeap.a + +test3 : $(LIB)/libnmeap.a $(TST)/test3.c + gcc -g -O0 -I $(INC) $(CDEFS) -Wall -Werror -o test3 $(TST)/test3.c $(LIB)/libnmeap.a + +clean: + -$(RM) test1 + -$(RM) test2 + -$(RM) test3 + + diff --git a/bertos/net/nmeap/tst/test1.c b/bertos/net/nmeap/tst/test1.c new file mode 100644 index 0000000..3c5e18b --- /dev/null +++ b/bertos/net/nmeap/tst/test1.c @@ -0,0 +1,193 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* +======================================================================================================== +EXAMPLE : SETUP FOR GGA AND RMC SENTENCES WITH CHARACTER BY CHARACTER IO +======================================================================================================= +*/ + + +#include +#include +#include +#include "nmeap.h" + +nmeap_gga_t g_gga; + +char test_vector[] = { +"$GPGGA,123519,3929.946667,N,11946.086667,E,1,08,0.9,545.4,M,46.9,M,,*4A\r\n" /* good */ +"$xyz,1234,asdfadfasdfasdfljsadfkjasdfk\r\n" /* junk */ +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*68\r\n" /* good */ +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*48\r\n" /* checksum error */ +}; + +char *pvec = test_vector; + +/** simulate character by character IO */ +int readchar() +{ + int ch; + if (*pvec == 0) { + ch = -1; + } + else { + ch = *pvec++; + } + return ch; +} + +/** do something with the GGA data */ +static void print_gga(nmeap_gga_t *gga) +{ + printf("found GPGGA message %.6f %.6f %.0f %lu %d %d %f %f\n", + gga->latitude , + gga->longitude, + gga->altitude , + gga->time , + gga->satellites, + gga->quality , + gga->hdop , + gga->geoid + ); +} + +/** called when a gpgga message is received and parsed */ +static void gpgga_callout(nmeap_context_t *context,void *data,void *user_data) +{ + nmeap_gga_t *gga = (nmeap_gga_t *)data; + + printf("-------------callout\n"); + print_gga(gga); +} + + +/** do something with the RMC data */ +static void print_rmc(nmeap_rmc_t *rmc) +{ + printf("found GPRMC Message %lu %c %.6f %.6f %f %f %lu %f\n", + rmc->time, + rmc->warn, + rmc->latitude, + rmc->longitude, + rmc->speed, + rmc->course, + rmc->date, + rmc->magvar + ); +} + +/** called when a gprmc message is received and parsed */ +static void gprmc_callout(nmeap_context_t *context,void *data,void *user_data) +{ + nmeap_rmc_t *rmc = (nmeap_rmc_t *)data; + + printf("-------------callout\n"); + print_rmc(rmc); +} + +/* ---------------------------------------------------------------------------------------*/ +/* STEP 1 : allocate the data structures. be careful if you put them on the stack because */ +/* they need to be live for the duration of the parser */ +/* ---------------------------------------------------------------------------------------*/ +static nmeap_context_t nmea; /* parser context */ +static nmeap_gga_t gga; /* this is where the data from GGA messages will show up */ +static nmeap_rmc_t rmc; /* this is where the data from RMC messages will show up */ +static int user_data; /* user can pass in anything. typically it will be a pointer to some user data */ + +int main(int argc,char *argv[]) +{ + int status; + char ch; + + /* ---------------------------------------*/ + /*STEP 2 : initialize the nmea context */ + /* ---------------------------------------*/ + status = nmeap_init(&nmea,(void *)&user_data); + if (status != 0) { + printf("nmeap_init %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 3 : add standard GPGGA parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,gpgga_callout,&gga); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 4 : add standard GPRMC parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,gprmc_callout,&rmc); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 5 : process input until done */ + /* -------------------------------------- */ + for(;;) { + /* ---------------------------------------*/ + /*STEP 6 : get a byte at a time */ + /* -------------------------------------- */ + ch = readchar(); + if (ch <= 0) { + break; + } + + /* --------------------------------------- */ + /*STEP 7 : pass it to the parser */ + /* status indicates whether a complete msg */ + /* arrived for this byte */ + /* NOTE : in addition to the return status */ + /* the message callout will be fired when */ + /* a complete message is processed */ + /* --------------------------------------- */ + status = nmeap_parse(&nmea,ch); + + /* ---------------------------------------*/ + /*STEP 8 : process the return code */ + /* -------------------------------------- */ + switch(status) { + case NMEAP_GPGGA: + /* GOT A GPGGA MESSAGE */ + printf("-------------switch\n"); + print_gga(&gga); + printf("-------------\n"); + break; + case NMEAP_GPRMC: + /* GOT A GPRMC MESSAGE */ + printf("-------------switch\n"); + print_rmc(&rmc); + printf("-------------\n"); + break; + default: + break; + } + } + + return 0; +} + diff --git a/bertos/net/nmeap/tst/test2.c b/bertos/net/nmeap/tst/test2.c new file mode 100644 index 0000000..39a700f --- /dev/null +++ b/bertos/net/nmeap/tst/test2.c @@ -0,0 +1,208 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* +======================================================================================================== +EXAMPLE : SETUP FOR GGA AND RMC SENTENCES WITH CHARACTER BY CHARACTER IO +======================================================================================================= +*/ + + +#include +#include +#include +#include "nmeap.h" + +nmeap_gga_t g_gga; + +char test_vector[] = { +"$GPGGA,123519,3929.946667,N,11946.086667,E,1,08,0.9,545.4,M,46.9,M,,*4A\r\n" /* good */ +"$xyz,1234,asdfadfasdfasdfljsadfkjasdfk\r\n" /* junk */ +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*68\r\n" /* good */ +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*48\r\n" /* checksum error */ +}; + +char *pvec = test_vector; + +/** simulate block IO */ +int readbuffer(char *buffer,int len) +{ + int i; + + if (*pvec == 0) { + // end of file + return -1; + } + + for(i=0;ilatitude , + gga->longitude, + gga->altitude , + gga->time , + gga->satellites, + gga->quality , + gga->hdop , + gga->geoid + ); +} + +/** called when a gpgga message is received and parsed */ +static void gpgga_callout(nmeap_context_t *context,void *data,void *user_data) +{ + nmeap_gga_t *gga = (nmeap_gga_t *)data; + + printf("-------------callout\n"); + print_gga(gga); +} + + +/** do something with the RMC data */ +static void print_rmc(nmeap_rmc_t *rmc) +{ + printf("found GPRMC Message %lu %c %.6f %.6f %f %f %lu %f\n", + rmc->time, + rmc->warn, + rmc->latitude, + rmc->longitude, + rmc->speed, + rmc->course, + rmc->date, + rmc->magvar + ); +} + +/** called when a gprmc message is received and parsed */ +static void gprmc_callout(nmeap_context_t *context,void *data,void *user_data) +{ + nmeap_rmc_t *rmc = (nmeap_rmc_t *)data; + + printf("-------------callout\n"); + print_rmc(rmc); +} + +/* ---------------------------------------------------------------------------------------*/ +/* STEP 1 : allocate the data structures. be careful if you put them on the stack because */ +/* they need to be live for the duration of the parser */ +/* ---------------------------------------------------------------------------------------*/ +static nmeap_context_t nmea; /* parser context */ +static nmeap_gga_t gga; /* this is where the data from GGA messages will show up */ +static nmeap_rmc_t rmc; /* this is where the data from RMC messages will show up */ +static int user_data; /* user can pass in anything. typically it will be a pointer to some user data */ + +int main(int argc,char *argv[]) +{ + int status; + int rem; + int offset; + int len; + char buffer[32]; + + /* ---------------------------------------*/ + /*STEP 2 : initialize the nmea context */ + /* ---------------------------------------*/ + status = nmeap_init(&nmea,(void *)&user_data); + if (status != 0) { + printf("nmeap_init %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 3 : add standard GPGGA parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,gpgga_callout,&gga); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 4 : add standard GPRMC parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,gprmc_callout,&rmc); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 5 : process input until done */ + /* -------------------------------------- */ + for(;;) { + /* ---------------------------------------*/ + /*STEP 6 : get a buffer of input */ + /* -------------------------------------- */ + len = rem = readbuffer(buffer,sizeof(buffer)); + if (len <= 0) { + break; + } + + /* ----------------------------------------------*/ + /*STEP 7 : process input until buffer is used up */ + /* --------------------------------------------- */ + offset = 0; + while(rem > 0) { + /* --------------------------------------- */ + /*STEP 8 : pass it to the parser */ + /* status indicates whether a complete msg */ + /* arrived for this byte */ + /* NOTE : in addition to the return status */ + /* the message callout will be fired when */ + /* a complete message is processed */ + /* --------------------------------------- */ + status = nmeap_parseBuffer(&nmea,&buffer[offset],&rem); + offset += (len - rem); + + /* ---------------------------------------*/ + /*STEP 9 : process the return code */ + /* -------------------------------------- */ + switch(status) { + case NMEAP_GPGGA: + printf("-------------switch\n"); + print_gga(&gga); + printf("-------------\n"); + break; + case NMEAP_GPRMC: + printf("-------------switch\n"); + print_rmc(&rmc); + printf("-------------\n"); + break; + default: + break; + } + } + } + + return 0; +} + diff --git a/bertos/net/nmeap/tst/test3.c b/bertos/net/nmeap/tst/test3.c new file mode 100644 index 0000000..250f53c --- /dev/null +++ b/bertos/net/nmeap/tst/test3.c @@ -0,0 +1,306 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* +======================================================================================================== +EXAMPLE : SETUP FOR GGA AND RMC SENTENCES + A CUSTOM SENTENCE PARSER WITH CHARACTER BY CHARACTER IO +======================================================================================================= +*/ + + +/* +$PGRMF + +GARMIN PROPRIETARY GPS Position Fix Data + +$PGRMF,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15*HH +1 = GPS week number +2 = GPS seconds in current week +3 = UTC date, ddmmyy format +4 = UTC time, hhmmss format +5 = GPS leap second count +6 = Latitude, dddmm.mmmm format +7 = Latitude hemisphere, N or S +8 = Longitude, dddmm.mmmm format +9 = Longitude hemisphere, E or W +10 = Mode (M=Manual, A=Automatic) +11 = Fix type (0=No fix, 1=2D fix, 2=3D fix) +12 = Speed over ground, kilometres / hour +13 = Course over ground, degrees true +14 = PDOP (Position dilution of precision), rounded to nearest integer +15 = TDOP (Time dilution of precision), rounded to nearest integer +HH = Checksum +*/ + + + +#include +#include +#include +#include +#include "nmeap.h" + +nmeap_gga_t g_gga; + +char test_vector[] = { +"$GPGGA,123519,3929.946667,N,11946.086667,E,1,08,0.9,545.4,M,46.9,M,,*4A\r\n" +"$GPRMC,225446,A,4916.45,N,12311.12,W,000.5,054.7,191194,020.3,E*68\r\n" +"$PGRMF,1,100,191105,123519,13,3929.946667,N,12311.12,W,A,2,100.1,181.2,3,8*35\r\n" +}; + +char *pvec = test_vector; + +/** simulate character by character IO */ +int readchar() +{ + int ch; + if (*pvec == 0) { + ch = -1; + } + else { + ch = *pvec++; + } + return ch; +} +/* --------------------------------------------------------------*/ +/*STEP 1a : define a data structure to contain the sentence data */ +/* ------------------------------------------------------------- */ +struct garmin_rmf { + /* field position in sentence */ + int week; /* 1 = GPS week number */ + int seconds_of_week; /* 2 = GPS seconds in current week */ + unsigned long date; /* 3 = UTC date, ddmmyy format */ + unsigned long time; /* 4 = UTC time, hhmmss format */ + int leap; /* 5 = GPS leap second count */ + double lat; /* 6,7 = Latitude, dddmm.mmmm format (north positive) */ + double lon; /* 8,9 = Longitude, dddmm.mmmm format (east positive) */ + int mode; /* 10 = Mode (M=Manual, A=Automatic) */ + int fix; /* 11 = Fix type (0=No fix, 1=2D fix, 2=3D fix) */ + double speed; /* 12 = Speed over ground, kilometres / hour */ + double course; /* 13 = Course over ground, degrees true */ + int pdop; /* 14 = PDOP (Position dilution of precision), rounded to nearest integer */ + int tdop; /* 15 = TDOP (Time dilution of precision), rounded to nearest integer */ +}; +typedef struct garmin_rmf garmin_rmf_t; + +/* --------------------------------------------------------------*/ +/*STEP 1b : define an id value for the message */ +/* ------------------------------------------------------------- */ +#define GARMIN_PGRMF (NMEAP_USER + 0) + + +/* --------------------------------------------------------------*/ +/* STEP 1c : write the sentence parser */ +/* ------------------------------------------------------------- */ +int custom_pgrmf(nmeap_context_t *context,nmeap_sentence_t *sentence) +{ +#ifndef NDEBUG + int i; +#endif + + /* get pointer to sentence data */ + garmin_rmf_t *rmf = (garmin_rmf_t *)sentence->data; + + if (rmf != 0) { + /* if the sentence has a data storage element, use it */ + + + /* extract data from the tokens */ + rmf->week = atoi(context->token[1]); + rmf->seconds_of_week = atoi(context->token[2]); + rmf->date = (unsigned long)atol(context->token[3]); + rmf->time = (unsigned long)atol(context->token[4]); + rmf->leap = atoi(context->token[5]); + rmf->lat = nmeap_latitude(context->token[6],context->token[7]); + rmf->lon = nmeap_longitude(context->token[8],context->token[9]); + rmf->mode = atoi(context->token[10]); + rmf->fix = atoi(context->token[11]); + rmf->speed = atof(context->token[12]); + rmf->course = atof(context->token[13]); + rmf->pdop = atoi(context->token[14]); + rmf->tdop = atoi(context->token[15]); + } + /* else there was no data element to store into */ + +#ifndef NDEBUG + /* print raw input string */ + printf("%s",context->debug_input); + + /* print some validation data */ + printf("%s==%s %02x==%02x\n",context->input_name,sentence->name,context->icks,context->ccks); + + /* print the tokens */ + for(i=0;itokens;i++) { + printf("%d:%s\n",i,context->token[i]); + } +#endif + + /* if the sentence has a callout, call it */ + if (sentence->callout != 0) { + (*sentence->callout)(context,rmf,context->user_data); + } + + return GARMIN_PGRMF; +} + + +/* -------------------------------------------------------------*/ +/*STEP 2 : write a function to do something with the data */ +/* ------------------------------------------------------------ */ +static void print_pgrmf(garmin_rmf_t *rmf) +{ + assert(rmf != 0); + + printf(" w sec date time lp lat lon m f spd crs p t\n"); + printf("found PGRMF message %d %d %lu %lu %d %.6f %.6f %d %d %.2f %.2f %d %d\n", + rmf->week, + rmf->seconds_of_week, + rmf->date, + rmf->time, + rmf->leap, + rmf->lat, + rmf->lon, + rmf->mode, + rmf->fix, + rmf->speed, + rmf->course, + rmf->pdop, + rmf->tdop + ); +} + +/* -------------------------------------------------------------*/ +/*STEP 3 : if using the callout method, write the callout */ +/* ------------------------------------------------------------ */ +static void pgrmf_callout(nmeap_context_t *context,void *data,void *user_data) +{ + garmin_rmf_t *rmf = (garmin_rmf_t *)data; + + printf("-------------callout\n"); + print_pgrmf(rmf); +} + + +/* ---------------------------------------------------------------------------------------*/ +/* STEP 4 : allocate the data structures. be careful if you put them on the stack because */ +/* they need to be live for the duration of the parser */ +/* ---------------------------------------------------------------------------------------*/ +static nmeap_context_t nmea; /* parser context */ +static nmeap_gga_t gga; /* this is where the data from GGA messages will show up */ +static nmeap_rmc_t rmc; /* this is where the data from RMC messages will show up */ +static garmin_rmf_t rmf; /* this is where the data from RMF messages will show up */ +static int user_data; /* user can pass in anything. typically it will be a pointer to some user data */ + +int main(int argc,char *argv[]) +{ + int status; + char ch; + + /* ---------------------------------------*/ + /*STEP 5 : initialize the nmea context */ + /* ---------------------------------------*/ + status = nmeap_init(&nmea,(void *)&user_data); + if (status != 0) { + printf("nmeap_init %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 6 : add standard GPGGA parser */ + /* (no callout this time) */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,0,&gga); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 7 : add standard GPRMC parser */ + /* (no callout this time) */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,0,&rmc); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 8 : ADD THE CUSTOM PARSER */ + /* with callout ) */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"PGRMF",custom_pgrmf,pgrmf_callout,&rmf); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + /* ---------------------------------------*/ + /*STEP 9 : process input until done */ + /* -------------------------------------- */ + for(;;) { + /* ---------------------------------------*/ + /*STEP 10: get a byte at a time */ + /* -------------------------------------- */ + ch = readchar(); + if (ch <= 0) { + break; + } + + /* --------------------------------------- */ + /*STEP 11: pass it to the parser */ + /* status indicates whether a complete msg */ + /* arrived for this byte */ + /* NOTE : in addition to the return status */ + /* the message callout will be fired when */ + /* a complete message is processed */ + /* --------------------------------------- */ + status = nmeap_parse(&nmea,ch); + + /* ---------------------------------------*/ + /*STEP 12 : process the return code */ + /* -------------------------------------- */ + switch(status) { + case NMEAP_GPGGA: + /* GOT A GPGGA MESSAGE */ + printf("-------------switch\n"); + printf("GPGGA\n"); + printf("-------------\n"); + break; + case NMEAP_GPRMC: + /* GOT A GPRMC MESSAGE */ + printf("-------------switch\n"); + printf("GPRMC\n"); + printf("-------------\n"); + break; + case GARMIN_PGRMF: + /* GOT A PGRMF MESSAGE */ + printf("-------------switch\n"); + print_pgrmf(&rmf); + printf("-------------\n"); + break; + default: + break; + } + } + + return 0; +} + diff --git a/bertos/net/nmeap/tst/tst.mak b/bertos/net/nmeap/tst/tst.mak new file mode 100644 index 0000000..df5f349 --- /dev/null +++ b/bertos/net/nmeap/tst/tst.mak @@ -0,0 +1,29 @@ +INCLUDES= ..\inc\nmeap.h ..\inc\nmeap_def.h +CSRC = nmeap01.c +LIBNAME = ..\lib\libnmeap.lib + +# build everything +all : test1.exe test2.exe test3.exe wingps.exe + +test1.exe : test1.c $(LIBNAME) + cl /DNDEBUG /c /I..\inc test1.c + link /OUT:test1.exe test1.obj $(LIBNAME) + +test2.exe : test2.c $(LIBNAME) + cl /DNDEBUG /c /I..\inc test2.c + link /OUT:test2.exe test2.obj $(LIBNAME) + +test3.exe : test3.c $(LIBNAME) + cl /DNDEBUG /c /I..\inc test3.c + link /OUT:test3.exe test3.obj $(LIBNAME) + +wingps.exe : wingps.c $(LIBNAME) + cl /DNDEBUG /c /I..\inc wingps.c + link /OUT:wingps.exe wingps.obj $(LIBNAME) + +# erase all intermediate and output files +clean : + -erase *.obj + -erase *.exe + + diff --git a/bertos/net/nmeap/tst/wingps.c b/bertos/net/nmeap/tst/wingps.c new file mode 100644 index 0000000..7e6b093 --- /dev/null +++ b/bertos/net/nmeap/tst/wingps.c @@ -0,0 +1,244 @@ +/* +Copyright (c) 2005, David M Howard (daveh at dmh2000.com) +All rights reserved. + +This product is licensed for use and distribution under the BSD Open Source License. +see the file COPYING for more details. + +THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" +AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE +IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE +ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE +LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, +OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT +OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; +OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, +WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE +OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, +EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +*/ + +/* +======================================================================================================== +EXAMPLE : SETUP FOR GGA AND RMC SENTENCES WITH SERIAL IO FOR WIN32 +======================================================================================================= +*/ +#define WIN32_LEAN_AND_MEAN +#include +#include +#include +#include +#include "nmeap.h" + +/** open a serial port */ +static HANDLE openPort(const char *port,int baud) +{ + HANDLE h; + DCB dcb; + COMMTIMEOUTS tmo; + int status; + + /* open the port */ + h = CreateFile( port, + GENERIC_READ | GENERIC_WRITE, + 0, + 0, + OPEN_EXISTING, + 0, + 0); + if (h == INVALID_HANDLE_VALUE) { + /* quit on error */ + return h; + } + + + /* read current configuration */ + status = GetCommState(h,&dcb); + if (status == 0) { + CloseHandle(h); + return INVALID_HANDLE_VALUE; + } + + /* set the baud rate and other parameters */ + dcb.BaudRate = baud; + dcb.ByteSize = 8; + dcb.Parity = NOPARITY; + dcb.StopBits = ONESTOPBIT; + + /* set configuration */ + status = SetCommState(h, &dcb); + if (status == 0) { + CloseHandle(h); + return INVALID_HANDLE_VALUE; + } + + /* read timeout configuration */ + status = GetCommTimeouts(h,&tmo); + if (status == 0) { + CloseHandle(h); + return INVALID_HANDLE_VALUE; + } + + /* set to indefinite blocking */ + tmo.ReadIntervalTimeout = 0; + tmo.ReadTotalTimeoutConstant = 0; + tmo.ReadTotalTimeoutMultiplier = 0; + status = SetCommTimeouts(h,&tmo); + if (status == 0) { + CloseHandle(h); + return INVALID_HANDLE_VALUE; + } + + return h; +} + +/** read a byte (blocking) */ +static int readPort(HANDLE h) +{ + BOOL status; + char ch; + DWORD count; + status = ReadFile(h,&ch,1,&count,0); + if (status == 0) { + return -1; + } + + return (int)ch; +} + + +static void closePort(HANDLE h) +{ + CloseHandle(h); +} + + +/** print current data */ +static void printGps(nmeap_gga_t *gga,nmeap_rmc_t *rmc) +{ + printf("%lu %lu %.6f %.6f %.0f %f %f %d %d\n", + gga->time, + rmc->date, + gga->latitude , + gga->longitude, + gga->altitude , + rmc->course, + rmc->speed, + gga->satellites, + gga->quality + ); +} + +/* ---------------------------------------------------------------------------------------*/ +/* STEP 1 : allocate the data structures. be careful if you put them on the stack because */ +/* they need to be live for the duration of the parser */ +/* ---------------------------------------------------------------------------------------*/ +static nmeap_context_t nmea; /* parser context */ +static nmeap_gga_t gga; /* this is where the data from GGA messages will show up */ +static nmeap_rmc_t rmc; /* this is where the data from RMC messages will show up */ +static int user_data; /* user can pass in anything. typically it will be a pointer to some user data */ + +int main(int argc,char *argv[]) +{ + int status; + char ch; + const char *port; + int baud; + HANDLE h; + + /* require both arguments */ + if (argc != 3) { + printf("%s \n",argv[0]); + return 1; + } + + /* serial port argument */ + port = argv[1]; + + /* baud rate argument */ + status = sscanf(argv[2],"%d",&baud); + if (status != 1) { + printf("%s \n",argv[0]); + printf("invalid : %s\n",argv[2]); + return 1; + } + + /** open the serial port */ + h = openPort(port,baud); + if (h == INVALID_HANDLE_VALUE) { + printf("can't open port : %s\n",port); + return 1; + } + + /* ---------------------------------------*/ + /*STEP 2 : initialize the nmea context */ + /* ---------------------------------------*/ + status = nmeap_init(&nmea,(void *)&user_data); + if (status != 0) { + printf("nmeap_init %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 3 : add standard GPGGA parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPGGA",nmeap_gpgga,0,&gga); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 4 : add standard GPRMC parser */ + /* -------------------------------------- */ + status = nmeap_addParser(&nmea,"GPRMC",nmeap_gprmc,0,&rmc); + if (status != 0) { + printf("nmeap_add %d\n",status); + exit(1); + } + + /* ---------------------------------------*/ + /*STEP 5 : process input until done */ + /* -------------------------------------- */ + for(;;) { + /* ---------------------------------------*/ + /*STEP 6 : get a byte at a time */ + /* -------------------------------------- */ + ch = readPort(h); + if (ch <= 0) { + break; + } + + /* --------------------------------------- */ + /*STEP 7 : pass it to the parser */ + /* status indicates whether a complete msg */ + /* arrived for this byte */ + /* NOTE : in addition to the return status */ + /* the message callout will be fired when */ + /* a complete message is processed */ + /* --------------------------------------- */ + status = nmeap_parse(&nmea,ch); + + /* ---------------------------------------*/ + /*STEP 8 : process the return code */ + /* -------------------------------------- */ + switch(status) { + case NMEAP_GPGGA: + /* GOT A GPGGA MESSAGE */ + printGps(&gga,&rmc); + break; + case NMEAP_GPRMC: + /* GOT A GPRMC MESSAGE */ + printGps(&gga,&rmc); + break; + default: + break; + } + } + + /* close and quit */ + closePort(h); + + return 0; +} diff --git a/bertos/net/nmeap/win32.mak b/bertos/net/nmeap/win32.mak new file mode 100644 index 0000000..5c79366 --- /dev/null +++ b/bertos/net/nmeap/win32.mak @@ -0,0 +1,22 @@ +# directories +SRC=src +TST=tst + +all : + cd $(SRC) + $(MAKE) -f nmeap.mak all + cd ..\$(TST) + $(MAKE) -f tst.mak all + cd .. + + +clean : + cd $(SRC) + $(MAKE) -f nmeap.mak clean + cd ..\$(TST) + $(MAKE) -f tst.mak clean + cd .. + +doc : + doxygen + diff --git a/bertos/net/pocketbus.c b/bertos/net/pocketbus.c new file mode 100644 index 0000000..bded2db --- /dev/null +++ b/bertos/net/pocketbus.c @@ -0,0 +1,291 @@ +/** + * \file + * + * + * \brief pocketBus protocol implementation. + * + * pocketBus protocol is a simple strictly master-slave protocol, usable + * in embedded systems. + * pocketBus frame is as follows: + * 
+ * +----------------------------------------+
+ * | STX | VER | ADDR | PAYLOAD | CKS | ETX |
+ * +----------------------------------------+
+ * |     |     |      |         |     |     |
+ * + 1B  + 1B  +  2B  + N Byte  + 2B  + 1B  +
+ *
+ * + * - STX, 1 byte (0x02), packet start + * - VER, 1 byte, packet version + * - ADDR, 2 byte, slave address + * - PAYLOAD, N byte, data field + * - CKS, 2 byte, checksum + * - ETX, 1 byte, (0x03) packet end + * + * Protocol parsing start on STX reception. When the receiving routine + * finds an STX char, it starts to read characters from the bus + * until an ETX is received. Once a packet is received, + * the parser checks packet correctness and checksum. If all is OK + * the payload is returned. + * + * STX (0x02), ETX(0x03) and ESC(0x1B) are special characters and cannot be + * transmitted inside payload without escaping them. + * To escape a character you must precede it by the ESC char. + * E.G. STX -> ESC + STX + * ETX -> ESC + ETX + * ESC -> ESC + ESC + * + * In the ADDR field is always specified the slave address. + * In the case of master trasmitting, ADDR contains the slave destination + * address. + * In case of slave replying, ADDR contains the slave address itself. + * Thus, the master device does not have an address. Packet must be routed to + * master by hardware bus design. + * + * The checksum algorithm used is rotating hash algortihm, quite simple but more + * reliable than simple checksum. + * The checksum in computed on all fields excluding STX, ETX and CHK fields itself. + * Checksum is computed on the packet *before* escaping. + * Escape sequence counts for 1 character only (the escaped one). + */ + +#include "pocketbus.h" + +#include "cfg/cfg_pocketbus.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL POCKETBUS_LOG_LEVEL +#define LOG_VERBOSITY POCKETBUS_LOG_FORMAT +#include +#include +#include + +#include + +#include + +#include + +/** + * Send a character over pocketBus channel stream, handling escape mode. + */ +void pocketbus_putchar(struct PocketBusCtx *ctx, uint8_t c) +{ + /* Update checksum */ + rotating_update1(c, &ctx->out_cks); + + /* Escape characters with special meaning */ + if (c == POCKETBUS_ESC || c == POCKETBUS_STX || c == POCKETBUS_ETX) + kfile_putc(POCKETBUS_ESC, ctx->fd); + + kfile_putc(c, ctx->fd); +} + +/** + * Send pocketBus packet header. + */ +void pocketbus_begin(struct PocketBusCtx *ctx, pocketbus_addr_t addr) +{ + PocketBusHdr hdr; + + hdr.ver = POCKETBUS_VER; + hdr.addr = cpu_to_be16(addr); + rotating_init(&ctx->out_cks); + + /* Send STX */ + kfile_putc(POCKETBUS_STX, ctx->fd); + + /* Send header */ + pocketbus_write(ctx, &hdr, sizeof(hdr)); +} + +/** + * Send buffer \a _data over bus, handling escape. + */ +void pocketbus_write(struct PocketBusCtx *ctx, const void *_data, size_t len) +{ + const uint8_t *data = (const uint8_t *)_data; + + while (len--) + pocketbus_putchar(ctx, *data++); +} + +/** + * Send pocketBus packet tail. + */ +void pocketbus_end(struct PocketBusCtx *ctx) +{ + /* Send checksum */ + rotating_t cks = cpu_to_be16(ctx->out_cks); + pocketbus_write(ctx, &cks, sizeof(cks)); + + /* Send ETX */ + kfile_putc(POCKETBUS_ETX, ctx->fd); +} + +/** + * Send buffer of \a data to address \a addr with a pocketBus packet over channel stream. + */ +void pocketbus_send(struct PocketBusCtx *ctx, pocketbus_addr_t addr, const void *data, size_t len) +{ + pocketbus_begin(ctx, addr); + + /* Send data */ + pocketbus_write(ctx, data, len); + + pocketbus_end(ctx); +} + + +/** + * Try to read a packet from the pocketBus. + * \return true if a packet is received, false otherwise. + */ +bool pocketbus_recv(struct PocketBusCtx *ctx, struct PocketMsg *msg) +{ + int c; + + /* Process incoming characters until buffer is not empty */ + while ((c = kfile_getc(ctx->fd)) != EOF) + { + /* Look for STX char */ + if (c == POCKETBUS_STX && !ctx->escape) + { + /* When an STX is found, inconditionally start a new packet */ + if (ctx->sync) + kprintf("pocketBus double sync!\n"); + + ctx->sync = true; + ctx->len = 0; + rotating_init(&ctx->in_cks); + continue; + } + + if (ctx->sync) + { + /* Handle escape mode */ + if (c == POCKETBUS_ESC && !ctx->escape) + { + ctx->escape = true; + continue; + } + + /* Handle message end */ + if (c == POCKETBUS_ETX && !ctx->escape) + { + ctx->sync = false; + + /* Check minimum size */ + if (ctx->len < sizeof(PocketBusHdr) + sizeof(rotating_t)) + { + kprintf("pocketBus short pkt!\n"); + continue; + } + + /* Remove checksum bytes from packet len */ + ctx->len -= sizeof(rotating_t); + + /* Compute checksum */ + rotating_update(ctx->buf, ctx->len, &ctx->in_cks); + uint8_t cks_h = *(ctx->buf + ctx->len); + uint8_t cks_l = *(ctx->buf + ctx->len + 1); + + rotating_t recv_cks = (cks_h << 8) | cks_l; + + /* Checksum check */ + if (recv_cks == ctx->in_cks) + { + PocketBusHdr *hdr = (PocketBusHdr *)ctx; + + /* Check packet version */ + if (hdr->ver == POCKETBUS_VER) + { + /* Packet received, set msg fields */ + msg->payload = ctx->buf + sizeof(PocketBusHdr); + msg->addr = be16_to_cpu(hdr->addr); + msg->len = ctx->len - sizeof(PocketBusHdr); + msg->ctx = ctx; + return true; + } + else + { + kprintf("pocketBus version mismatch, here[%d], there[%d]\n", POCKETBUS_VER, hdr->ver); + continue; + } + } + else + { + kprintf("pocketBus cks error, here[%04X], there[%04X]\n", ctx->in_cks, recv_cks); + continue; + } + + } + + ctx->escape = false; + + /* Check buffer overflow: simply ignore + received data and go to unsynced state. */ + if (ctx->len >= CONFIG_POCKETBUS_BUFLEN) + { + kprintf("pocketBus buffer overflow\n"); + ctx->sync = false; + continue; + } + + /* Put received data in the buffer */ + ctx->buf[ctx->len] = c; + ctx->len++; + } + } + + /* + * Check stream status. + */ + if (kfile_error(ctx->fd)) + { + LOG_ERR("fd status[%04X]\n", kfile_error(ctx->fd)); + kfile_clearerr(ctx->fd); + } + + return false; +} + + +/** + * Initialize pocketBus protocol handler. + */ +void pocketbus_init(struct PocketBusCtx *ctx, struct KFile *fd) +{ + ASSERT(ctx); + ASSERT(fd); + + memset(ctx, 0, sizeof(*ctx)); + ctx->fd = fd; +} diff --git a/bertos/net/pocketbus.h b/bertos/net/pocketbus.h new file mode 100644 index 0000000..db7b9c1 --- /dev/null +++ b/bertos/net/pocketbus.h @@ -0,0 +1,129 @@ +/** + * \file + * + * + * + * \author Francesco Sacchi + * + * \brief Basical functions to use pocketBus protocol. + * + * $WIZ$ module_name = "pocketbus" + * $WIZ$ module_depends = "rotating_hash", "kfile" + * $WIZ$ module_configuration = "bertos/cfg/cfg_pocketbus.h" + */ + +#ifndef NET_POCKETBUS_H +#define NET_POCKETBUS_H + +#include "cfg/cfg_pocketbus.h" /* for CONFIG_POCKETBUS_BUFLEN */ +#include + +#include + +#include + +/** + * pocketBus special characters definitions. + * \{ + */ +#define POCKETBUS_STX 0x02 //ASCII STX +#define POCKETBUS_ETX 0x03 //ASCII ETX +#define POCKETBUS_ESC 0x1B //ASCII ESC +#define POCKETBUS_ACK 0x06 //ASCII ACK +#define POCKETBUS_NAK 0x15 //ASCII NAK +/*\}*/ + +#define POCKETBUS_BROADCAST_ADDR 0xFFFF ///< pocketBus broadcast address + +/** + * Type for pocketBus length. + */ +typedef uint16_t pocketbus_len_t; + +/** + * Type for pocketBus addresses. + */ +typedef uint16_t pocketbus_addr_t; + +/** + * Header of pocketBus messages. + */ +typedef struct PocketBusHdr +{ + #define POCKETBUS_VER 1 + uint8_t ver; ///< packet version + pocketbus_addr_t addr; ///< slave address +} PocketBusHdr; + +/** + * pocketBus context structure. + */ +typedef struct PocketBusCtx +{ + uint8_t buf[CONFIG_POCKETBUS_BUFLEN]; ///< receiving Buffer + struct KFile *fd; ///< File descriptor + bool sync; ///< Status flag: true if we have received an STX, false otherwise + bool escape; ///< Status flag: true if we are in escape mode, false otherwise + rotating_t in_cks; ///< Checksum computation for received data. + rotating_t out_cks; ///< Checksum computation for transmitted data. + pocketbus_len_t len; ///< Received length +} PocketBusCtx; + +STATIC_ASSERT(offsetof(PocketBusCtx, buf) == 0); +/** + * Structure holding pocketBus message parameters. + */ +typedef struct PocketMsg +{ + struct PocketBusCtx *ctx; ///< pocketBus message context + pocketbus_addr_t addr; ///< address for received packet + pocketbus_len_t len; ///< payload length + const uint8_t *payload; ///< payload data +} PocketMsg; + +/** + * This ensure that endianess convertion functions work on + * the right data size. + * \{ + */ +STATIC_ASSERT(sizeof(pocketbus_addr_t) == sizeof(uint16_t)); +STATIC_ASSERT(sizeof(rotating_t) == sizeof(uint16_t)); +/*\}*/ + +void pocketbus_putchar(struct PocketBusCtx *ctx, uint8_t c); +void pocketbus_begin(struct PocketBusCtx *ctx, pocketbus_addr_t addr); +void pocketbus_write(struct PocketBusCtx *ctx, const void *_data, size_t len); +void pocketbus_end(struct PocketBusCtx *ctx); + +void pocketbus_send(struct PocketBusCtx *ctx, pocketbus_addr_t addr, const void *data, size_t len); +bool pocketbus_recv(struct PocketBusCtx *ctx, struct PocketMsg *msg); +void pocketbus_init(struct PocketBusCtx *ctx, struct KFile *fd); + +#endif /* NET_POCKETBUS_H */ diff --git a/bertos/net/pocketcmd.c b/bertos/net/pocketcmd.c new file mode 100644 index 0000000..14bdc02 --- /dev/null +++ b/bertos/net/pocketcmd.c @@ -0,0 +1,229 @@ +/** + * \file + * + * + * \brief pocketBus protocol Command layer implementation. + * + * This module implements command layer over pocketBus + * protocol. + * Payload packets received by pocketBus are first checked for + * address matching. + * If a packet is addressed to us we look for a suitable + * callback function to call. + * + * The received payload format is as follows: + * 
+ * +----------------------------------------+
+ * |  CMD |            DATA                 |
+ * +----------------------------------------+
+ * |      |                                 |
+ * +  2B  +           0..N Byte             +
+ *
+ * + * The CMD ID used is the same supplied by the master when + * the command was sent. + * + * \author Francesco Sacchi + */ + +#include "pocketcmd.h" +#include "pocketbus.h" + +#include "cfg/cfg_pocketbus.h" + +// Define logging setting (for cfg/log.h module). +#define LOG_LEVEL POCKETBUS_LOG_LEVEL +#define LOG_VERBOSITY POCKETBUS_LOG_FORMAT +#include +#include +#include +#include + +#include + +#include +#include + +#include + +/** + * pocketBus Command poll function. + * Call it to read and process pocketBus commands. + */ +void pocketcmd_poll(struct PocketCmdCtx *ctx) +{ + PocketCmdMsg msg; + while (pocketcmd_recv(ctx, &msg)) + { + /* Check for command callback */ + pocketcmd_hook_t callback = ctx->search(msg.cmd); + + /* Call it if exists */ + if (callback) + callback(&msg); + } +} + + + +/** + * pocketBus Command recv function. + * Call it to read and process pocketBus commands. + */ +bool pocketcmd_recv(struct PocketCmdCtx *ctx, PocketCmdMsg *recv_msg) +{ + PocketMsg msg; + + /* Try to read a packet from pocketBus */ + while (pocketbus_recv(ctx->bus_ctx, &msg)) + { + /* Check address */ + if (msg.addr == ctx->addr || + msg.addr == POCKETBUS_BROADCAST_ADDR) + { + + #if CPU_AVR + const PocketCmdHdr *hdr = (const PocketCmdHdr *)msg.payload; + #else + #if !CPU_ARM + #warning Fix alignment problem.. + /* + * The code below make one memcopy, this the only way to + * solve alignment problem on ARM. If you are use other + * architecture you should find other way to optimize + * this code. + */ + #endif + PocketCmdHdr hd; + memcpy(&hd, msg.payload, sizeof(PocketCmdHdr)); + const PocketCmdHdr *hdr = &hd; + #endif + + pocketcmd_t cmd = be16_to_cpu(hdr->cmd); + + /* We're no longer waiting for a reply (in case we were) */ + if (cmd == ctx->waiting) + ctx->waiting = PKTCMD_NULL; + + recv_msg->cmd_ctx = ctx; + recv_msg->cmd = cmd; + recv_msg->len = msg.len - sizeof(PocketCmdHdr); + recv_msg->buf = msg.payload + sizeof(PocketCmdHdr); + + return true; + } + } + + return false; +} + + +/** + * Send command \a cmd to/from slave adding \a len arguments in \a buf. + * Address used is contained in \a ctx->addr . + * If we are master and the message has a reply, you must set \a wait_reply to true. + * \return true if all is ok, false if we are already waiting a replay from another slave. + */ +bool pocketcmd_send(struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len, bool wait_reply) +{ + /* Check if we are waiting a reply from someone */ + if (ctx->waiting != PKTCMD_NULL) + { + /* Check is reply timeout is elapsed */ + if (timer_clock() - ctx->reply_timer < ms_to_ticks(CONFIG_POCKETBUS_CMD_REPLY_TIMEOUT)) + { + LOG_ERR("Pkt discard! waiting cmd[%04X]\n", ctx->waiting); + return false; + } + else + { + LOG_INFO("Timeout waiting cmd[%04X]\n", ctx->waiting); + ctx->waiting = PKTCMD_NULL; + } + } + + /* Endianess! */ + cmd = cpu_to_be16(cmd); + + /* Send packet */ + pocketbus_begin(ctx->bus_ctx, ctx->addr); + pocketbus_write(ctx->bus_ctx, &cmd, sizeof(cmd)); + pocketbus_write(ctx->bus_ctx, buf, len); + pocketbus_end(ctx->bus_ctx); + + if (wait_reply) + { + ctx->waiting = be16_to_cpu(cmd); + ctx->reply_timer = timer_clock(); + } + + return true; +} + +/** + * Init pocketBus command layer. + * \a ctx is pocketBus command layer context. + * \a bus_ctx is pocketBus context. + * \a addr is slave address (see pocketcmd_setAddr for details.) + * \a search is the lookup function used to search command ID callbacks. + */ +void pocketcmd_init(struct PocketCmdCtx *ctx, struct PocketBusCtx *bus_ctx, pocketbus_addr_t addr, pocketcmd_lookup_t search) +{ + ASSERT(ctx); + ASSERT(bus_ctx); + ASSERT(search); + MOD_CHECK(timer); + + memset(ctx, 0, sizeof(*ctx)); + ctx->bus_ctx = bus_ctx; + ctx->search = search; + pocketcmd_setAddr(ctx, addr); +} + +/** + * Helper function used to reply to master with an ACK. + */ +void pocketcmd_replyAck(struct PocketCmdMsg *msg) +{ + uint8_t ack[] = { POCKETBUS_ACK }; + + pocketcmd_slaveReply(msg->cmd_ctx, msg->cmd, ack, sizeof(ack)); +} + +/** + * Helper function used to reply to master with a NAK. + */ +void pocketcmd_replyNak(struct PocketCmdMsg *msg) +{ + uint8_t nak[] = { POCKETBUS_NAK }; + + pocketcmd_slaveReply(msg->cmd_ctx, msg->cmd, nak, sizeof(nak)); +} + diff --git a/bertos/net/pocketcmd.h b/bertos/net/pocketcmd.h new file mode 100644 index 0000000..8bfd5e0 --- /dev/null +++ b/bertos/net/pocketcmd.h @@ -0,0 +1,149 @@ +/** + * \file + * + * + * \brief PocketBus command abstraction layer. + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "pocketcmd" + * $WIZ$ module_depends = "timer", "pocketbus" + */ + +#ifndef NET_POCKETCMD_H +#define NET_POCKETCMD_H + +#include "pocketbus.h" +#include + +#define PKTCMD_NULL 0 ///< pocketBus Null command + +typedef uint16_t pocketcmd_t; ///< Type for Command IDs + +/** + * Header for transmitted pocketBus Commands. + */ +typedef struct PocketCmdHdr +{ + pocketcmd_t cmd; ///< command ID +} PocketCmdHdr; + +/** + * This ensure that endianess convertion functions work on + * the right data size. + * \{ + */ +STATIC_ASSERT(sizeof(pocketcmd_t) == sizeof(uint16_t)); +/*\}*/ + +/* fwd declaration */ +struct PocketCmdCtx; + +/** + * pocketBus command message structure. + */ +typedef struct PocketCmdMsg +{ + struct PocketCmdCtx *cmd_ctx; ///< command context + pocketcmd_t cmd; ///< command id + pocketbus_len_t len; ///< optional arg length + const uint8_t *buf; ///< optional arguments +} PocketCmdMsg; + +/** + * Type for command hooks. + */ +typedef void (*pocketcmd_hook_t)(struct PocketCmdMsg *cmd_msg); + +/** + * Type for lookup function hooks. + */ +typedef pocketcmd_hook_t (*pocketcmd_lookup_t)(pocketcmd_t cmd); + +/** + * pocketBus context for command layer communications. + */ +typedef struct PocketCmdCtx +{ + struct PocketBusCtx *bus_ctx; ///< pocketBus context + pocketbus_addr_t addr; ///< Our address + pocketcmd_lookup_t search; ///< Lookup function used to search for command callbacks + pocketcmd_t waiting; ///< The command ID we are waiting for or PKTCMD_NULL. + ticks_t reply_timer; ///< For waiting_reply +} PocketCmdCtx; + +/** + * Set slave address \a addr for pocketBus command layer. + * If we are a slave this is *our* address. + * If we are the master this is the slave address to send messages to. + */ +INLINE void pocketcmd_setAddr(struct PocketCmdCtx *ctx, pocketbus_addr_t addr) +{ + ctx->addr = addr; +} + +void pocketcmd_init(struct PocketCmdCtx *ctx, struct PocketBusCtx *bus_ctx, pocketbus_addr_t addr, pocketcmd_lookup_t search); +void pocketcmd_poll(struct PocketCmdCtx *ctx); +bool pocketcmd_send(struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len, bool has_replay); +bool pocketcmd_recv(struct PocketCmdCtx *ctx, PocketCmdMsg *recv_msg); +void pocketcmd_replyNak(struct PocketCmdMsg *msg); +void pocketcmd_replyAck(struct PocketCmdMsg *msg); + +/** + * Helper function used by master to send a command to slave \a addr. + */ +INLINE bool pocketcmd_masterSend(struct PocketCmdCtx *ctx, pocketbus_addr_t addr, pocketcmd_t cmd, const void *buf, size_t len) +{ + pocketcmd_setAddr(ctx, addr); + return pocketcmd_send(ctx, cmd, buf, len, true); +} + +/** + * Helper function used by slave to reply to a master command. + */ +INLINE bool pocketcmd_slaveReply(struct PocketCmdCtx *ctx, pocketcmd_t cmd, const void *buf, size_t len) +{ + return pocketcmd_send(ctx, cmd, buf, len, false); +} + +/** + * Return true if message contain NAK. + */ +INLINE bool pocketcmd_checkNak(struct PocketCmdMsg *msg) +{ + if (msg->buf[0] == POCKETBUS_NAK) + return true; + + return false; +} + + + +#endif /* NET_POCKETCMD_H */ diff --git a/bertos/net/tftp.c b/bertos/net/tftp.c new file mode 100644 index 0000000..233a216 --- /dev/null +++ b/bertos/net/tftp.c @@ -0,0 +1,331 @@ +/** + * \file + * + * + * \brief TFTP protocol implementation + * + * \author Luca Ottaviano + * + * notest:all + */ + +#include "tftp.h" +#include "cfg/cfg_tftp.h" +#define LOG_LEVEL TFTP_LOG_LEVEL +#define LOG_FORMAT TFTP_LOG_FORMAT +#include + +//#include +#include +#include +#include //memset + +#define TFTP_PACKET_SIZE 516 + +#define DECLARE_TIMEOUT(name, timeout) \ + struct timeval name; \ + name.tv_sec = timeout / 1000; \ + name.tv_usec = (timeout % 1000) * 1000; + +#define KFT_TFTPSESSION MAKE_ID('T', 'F', 'T', 'P') +INLINE TftpSession *TFTP_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_TFTPSESSION); + return (TftpSession *)containerof(fd, TftpSession, kfile_request); +} + +/* + * Check if received data is correct and send ACK if ok. + */ +static int checkPacket(TftpSession *ctx, const Tftpframe *frame) +{ + LOG_INFO("Checking block %hd\n", ctx->block); + if (ntohs(frame->hdr.opcode) != TFTP_DATA) + { + LOG_INFO("Opcode != TFTP_DATA (%hd != %d)\n", ntohs(frame->hdr.opcode), TFTP_DATA); + return -1; + } + if (ntohs(frame->hdr.th_u.block) != ctx->block + 1) + return -1; + + ctx->block++; + // if everything was ok, send ACK + // ACK is already in network order + struct ackframe ack; + ack.opcode = TFTP_ACK; + ack.block_num = htons(ctx->block); + ssize_t rc = lwip_sendto(ctx->sock, &ack, 4, 0, (struct sockaddr *)&ctx->addr, ctx->addr_len); + if (rc == 4) + return rc; + else + return -1; +} + +/* + * Return >0 if there's something to read in ctx, 0 on timeout, -1 on errors + */ +static int tftp_waitEvent(TftpSession *ctx, struct timeval *timeout) +{ + fd_set inset; + FD_ZERO(&inset); + FD_SET(ctx->sock, &inset); + struct timeval tmp = *timeout; + return lwip_select(ctx->sock + 1, &inset, NULL, NULL, &tmp); +} + +/* + * Read a block from TFTP. + * \param size Must be exactly 516 bytes + * \param timeout Time to wait the network connection, may be NULL to wait forever + * \return Number of bytes read if success, TFTP_ERR_TIMEOUT on timeout, TFTP_ERR otherwise + */ +static ssize_t tftp_readPacket(TftpSession *ctx, Tftpframe *frame, mtime_t timeout) +{ + DECLARE_TIMEOUT(wait_tm, timeout); + + int res = tftp_waitEvent(ctx, &wait_tm); + if (res == 0) + return TFTP_ERR_TIMEOUT; + if (res == -1) + return TFTP_ERR; + + ssize_t rlen = lwip_recvfrom(ctx->sock, frame, sizeof(Tftpframe), 0, NULL, NULL); + LOG_INFO("Received %zd bytes\n", rlen); + if (rlen > 0 && (checkPacket(ctx, frame) > 0)) + return rlen; + else + return TFTP_ERR; +} + +static size_t tftp_read(struct KFile *fd, void *buf, size_t size) +{ + TftpSession *fds = TFTP_CAST(fd); + uint8_t *_buf = (uint8_t *) buf; + size_t read_bytes = 0; + size_t offset = fds->valid_data - fds->bytes_available; + + if (fds->pending_ack) + { + ASSERT(fds->block == 0); + struct ackframe ack; + ack.opcode = TFTP_ACK; + ack.block_num = fds->block; + lwip_sendto(fds->sock, &ack, 4, 0, (struct sockaddr *)&fds->addr, fds->addr_len); + fds->pending_ack = false; + } + + if (fds->bytes_available < size) + { + /* check if we were called again after an error */ + if (fds->bytes_available > 0) + { + memcpy(_buf, fds->frame.data + offset, fds->bytes_available); + LOG_INFO("ba < size. Copied %zd bytes from offset %zd\n", fds->bytes_available, offset); + /* adjust buf and size */ + _buf += fds->bytes_available; + size -= fds->bytes_available; + read_bytes += fds->bytes_available; + } + + if (!fds->is_xfer_end) + { + LOG_INFO("Waiting for new TFTP packet\n"); + /* get more data, we can wait since the function is blocking */ + ssize_t rd = tftp_readPacket(fds, &fds->frame, fds->timeout); + if (rd < 0) + { + fds->bytes_available = 0; + fds->error = rd; + return 0; + } + else + { + if (rd < TFTP_PACKET_SIZE) + { + fds->is_xfer_end = true; + LOG_INFO("Received the last packet\n"); + } + fds->bytes_available = (size_t)rd - sizeof(struct TftpHeader); + fds->valid_data = fds->bytes_available; + offset = 0; + } + } + else + { + LOG_INFO("Transfer finished\n"); + fds->bytes_available -= fds->bytes_available; + fds->valid_data = 0; + return read_bytes; + } + } + + /* check how many bytes we need to copy */ + size_t res = MIN(fds->bytes_available, size); + LOG_INFO("Copying %zd bytes from offset %zd\n", res, offset); + memcpy(_buf, fds->frame.data + offset, res); + fds->bytes_available -= res; + read_bytes += res; + return read_bytes; +} + +static int tftp_error(struct KFile *fd) +{ + TftpSession *fds = TFTP_CAST(fd); + return fds->error; +} + +static void tftp_clearerr(struct KFile *fd) +{ + TftpSession *fds = TFTP_CAST(fd); + fds->error = 0; +} + +static int tftp_close(struct KFile *fd) +{ + TftpSession *fds = TFTP_CAST(fd); + struct errframe err; + if (fds->pending_ack) + { + err.opcode = TFTP_PROTOERR; + err.errcode = TFTP_PROTOERR_ACCESS_VIOLATION; + err.str = '\0'; + lwip_sendto(fds->sock, &err, 5, 0, (struct sockaddr *)&fds->addr, fds->addr_len); + LOG_INFO("Closed connection upon user request\n"); + } + return 0; +} + +static void resetTftpState(TftpSession *ctx) +{ + ctx->block = 0; + ctx->error = 0; + ctx->bytes_available = 0; + ctx->valid_data = 0; + ctx->is_xfer_end = false; + ctx->pending_ack = false; +} + +/** + * Listen for incoming tftp sessions. + * + * \note Only write requests are accepted. + * + * \param ctx Initialized TftpChannel + * \param filename String to be filled with file name to be written + * \param len Length of the filename + * \param mode Open mode for the returned KFile + * \return KFile pointer to read from + */ +KFile *tftp_listen(TftpSession *ctx, char *filename, size_t len, TftpOpenMode *mode) +{ + DECLARE_TIMEOUT(wait_tm, ctx->timeout); + resetTftpState(ctx); + + int res = tftp_waitEvent(ctx, &wait_tm); + if (res == 0) + { + ctx->error = TFTP_ERR_TIMEOUT; + return NULL; + } + if (res == -1) + { + ctx->error = TFTP_ERR; + return NULL; + } + + // listen onto TFTP port + ctx->addr_len = sizeof(ctx->addr); + ssize_t rd = 0; + if ((rd = lwip_recvfrom(ctx->sock, &ctx->frame, sizeof(Tftpframe), 0, (struct sockaddr *)&ctx->addr, &ctx->addr_len)) > 0) + { + // check if the packet is WRQ, otherwise discard the packet + if (ctx->frame.hdr.opcode == TFTP_WRQ) + { + *mode = TFTP_WRITE; + ctx->pending_ack = true; + strncpy(filename, (char *)&ctx->frame.hdr.th_u, len); + filename[len - 1] = '\0'; + ctx->error = 0; + return &ctx->kfile_request; + } + else + *mode = TFTP_READ; + } + ctx->error = TFTP_ERR; + return NULL; +} + +/** + * Init a server session + * + * Create a IPv4 session on all addresses and port \a port. + * + * \param ctx Context to be initialized as server + * \param port Port to listen incoming connections + * \param timeout Timeout to be used for tftp connections + * \return 0 if successful, -1 otherwise + */ +int tftp_init(TftpSession *ctx, unsigned short port, mtime_t timeout) +{ + DB(ctx->kfile_request._type = KFT_TFTPSESSION); + ctx->kfile_request.read = tftp_read; + ctx->kfile_request.error = tftp_error; + ctx->kfile_request.clearerr = tftp_clearerr; + ctx->kfile_request.close = tftp_close; + resetTftpState(ctx); + + /* Unused kfile methods */ + ctx->kfile_request.seek = NULL; + ctx->kfile_request.write = NULL; + ctx->kfile_request.flush = NULL; + ctx->kfile_request.reopen = NULL; + + struct sockaddr_in sa; + sa.sin_family = AF_INET; + sa.sin_addr.s_addr = htonl(INADDR_ANY); + sa.sin_port = htons(port); + ctx->timeout = timeout; + + ctx->sock = lwip_socket(AF_INET, SOCK_DGRAM, 0); + if (ctx->sock == -1) + { + LOG_INFO("TFTP socket error\n"); + return -1; + } + + if(lwip_bind(ctx->sock, (struct sockaddr *)&sa, sizeof(sa))) + { + LOG_INFO("Error binding socket\n"); + return -1; + } + return 0; +} + diff --git a/bertos/net/tftp.h b/bertos/net/tftp.h new file mode 100644 index 0000000..014bdb4 --- /dev/null +++ b/bertos/net/tftp.h @@ -0,0 +1,142 @@ +/** + * \file + * + * + * \brief TFTP protocol implementation + * + * This module implements a TFTP server with a handy KFile interface. + * The call to tftp_listen() will block until a client tries to connect, + * then it returns a KFile. + * If you want to accept the transfer, start reading from the handle and + * the transfer will continue. Otherwise, don't access it and immediately + * call kfile_close(). + * Close the KFile when you're done. + * + * The usage pattern is as follows: + * \code + * // initialize a TFTP session + * tftp_init(); + * // start listening for connections + * KFile *f = tftp_listen(); + * // now you can check the returned file name + * // and change behaviour at runtime + * if (!strcmp(filename, "firmware.bin")) + * // do something + * else if (!strcmp(filename, "conf.ini")) + * // update the configuration + * kfile_close(f); + * \endcode + * + * + * \author Luca Ottaviano + * + * $WIZ$ module_name = "tftp" + * $WIZ$ module_configuration = "bertos/cfg/cfg_tftp.h" + * $WIZ$ module_depends = "lwip", "kfile" + */ + +#ifndef TFTP_H +#define TFTP_H + +#include +#include // sockaddr_in, socklen_t +#include + +#define TFTP_RRQ 0x0100 /* TFTP read request packet (already in net endianess). */ +#define TFTP_WRQ 0x0200 /* TFTP write request packet (already in net endianess). */ +#define TFTP_DATA 03 /* TFTP data packet. */ +#define TFTP_ACK 0x0400 /* TFTP acknowledgement packet (already in net endianess). */ +#define TFTP_PROTOERR 0x0500 /* TFTP acknowledgement packet (already in net endianess). */ + +/* TFTP protocol error codes */ +#define TFTP_PROTOERR_ACCESS_VIOLATION 0x0200 + +#define TFTP_SERVER_PORT 69 + +/* Return error codes */ +#define TFTP_ERR_TIMEOUT -2 +#define TFTP_ERR -1 + +struct PACKED TftpHeader +{ + short opcode; ///< packet type */ + union PACKED + { + short block; /* block # */ + short code; /* error code */ + char stuff[1]; /* request packet stuff */ + } th_u; +}; + +typedef struct PACKED Tftpframe { + struct TftpHeader hdr; + char data[512]; /* data or error string */ +} Tftpframe; + +struct PACKED ackframe +{ + short opcode; + short block_num; +}; + +struct PACKED errframe +{ + short opcode; + short errcode; + char str; +}; + +typedef enum +{ + TFTP_READ, + TFTP_WRITE, +} TftpOpenMode; + +typedef struct TftpSession +{ + struct sockaddr_in addr; + socklen_t addr_len; + int sock; + unsigned short block; + mtime_t timeout; + int error; + Tftpframe frame; + size_t bytes_available; + size_t valid_data; + bool is_xfer_end; + bool pending_ack; + KFile kfile_request; +} TftpSession; + +int tftp_init(TftpSession *ctx, unsigned short port, mtime_t timeout); +KFile *tftp_listen(TftpSession *ctx, char *filename, size_t len, TftpOpenMode *mode); + +#endif // TFTP_H diff --git a/bertos/net/xmodem.c b/bertos/net/xmodem.c new file mode 100644 index 0000000..fbf4338 --- /dev/null +++ b/bertos/net/xmodem.c @@ -0,0 +1,436 @@ +/** + * \file + * + * + * \brief X-Modem serial transmission protocol (implementation) + * + * Supports the CRC-16 and 1K-blocks variants of the standard. + * \see ymodem.txt for the protocol description. + * + * \todo Break xmodem_send() and xmodem_recv() in smaller functions. + * + * \author Bernie Innocenti + * \author Francesco Sacchi + */ + + +#include "xmodem.h" + +#include "cfg/cfg_xmodem.h" + +#include +// Define log settings for cfg/log.h +#define LOG_LEVEL CONFIG_XMODEM_LOG_LEVEL +#define LOG_FORMAT CONFIG_XMODEM_LOG_FORMAT +#include + + +#include + +#include /* for memset() */ + +/** + * \name Protocol control codes + * \{ + */ +#define XM_SOH 0x01 /**< Start Of Header (128-byte block) */ +#define XM_STX 0x02 /**< Start Of Header (1024-byte block) */ +#define XM_EOT 0x04 /**< End Of Transmission */ +#define XM_ACK 0x06 /**< Acknowledge block */ +#define XM_NAK 0x15 /**< Negative Acknowledge */ +#define XM_C 0x43 /**< Request CRC-16 transmission */ +#define XM_CAN 0x18 /**< CANcel transmission */ +/*\}*/ + +#if CONFIG_XMODEM_1KCRC == 1 + #define XM_BUFSIZE 1024 /**< 1024 bytes of block buffer */ +#else + #define XM_BUFSIZE 128 /**< 128 bytes of block buffer */ +#endif + + +#if CONFIG_XMODEM_RECV +/** + * \brief Receive a file using the XModem protocol. + * + * \param ch Channel to use for transfer + * \param fd Destination file + * + * \note This function allocates a large amount of stack (\see XM_BUFSIZE). + */ +bool xmodem_recv(KFile *ch, KFile *fd) +{ + char block_buffer[XM_BUFSIZE]; /* Buffer to hold a block of data */ + int c, i, blocksize; + int blocknr = 0, last_block_done = 0, retries = 0; + char *buf; + uint8_t checksum; + uint16_t crc; + bool purge = false; + bool usecrc = true; + + + LOG_INFO("Starting Transfer...\n"); + purge = true; + kfile_clearerr(ch); + + /* Send initial NAK to start transmission */ + for(;;) + { + if (XMODEM_CHECK_ABORT) + { + kfile_putc(XM_CAN, ch); + kfile_putc(XM_CAN, ch); + LOG_INFO("Transfer aborted\n"); + return false; + } + + /* + * Discard incoming input until a timeout occurs, then send + * a NAK to the transmitter. + */ + if (purge) + { + purge = false; + + if (kfile_error(ch)) + { + LOG_ERR("Retries %d\n", retries); + } + + kfile_resync(ch, 200); + retries++; + + if (retries >= CONFIG_XMODEM_MAXRETRIES) + { + kfile_putc(XM_CAN, ch); + kfile_putc(XM_CAN, ch); + LOG_INFO("Transfer aborted\n"); + return false; + } + + /* Transmission start? */ + if (blocknr == 0) + { + if (retries < CONFIG_XMODEM_MAXCRCRETRIES) + { + LOG_INFO("Request Tx (CRC)\n"); + kfile_putc(XM_C, ch); + } + else + { + /* Give up with CRC and fall back to checksum */ + usecrc = false; + LOG_INFO("Request Tx (BCC)\n"); + kfile_putc(XM_NAK, ch); + } + } + else + kfile_putc(XM_NAK, ch); + } + + switch (kfile_getc(ch)) + { + #if XM_BUFSIZE >= 1024 + case XM_STX: /* Start of header (1024-byte block) */ + blocksize = 1024; + goto getblock; + #endif + + case XM_SOH: /* Start of header (128-byte block) */ + blocksize = 128; + /* Needed to avoid warning if XM_BUFSIZE < 1024 */ + + getblock: + /* Get block number */ + c = kfile_getc(ch); + + /* Check complemented block number */ + if ((~c & 0xff) != kfile_getc(ch)) + { + LOG_WARN("Bad blk (%d)\n", c); + purge = true; + break; + } + + /* Determine which block is being sent */ + if (c == (blocknr & 0xff)) + { + /* Last block repeated */ + LOG_INFO("Repeat blk %d\n", blocknr); + } + else if (c == ((blocknr + 1) & 0xff)) + { + /* Next block */ + LOG_INFO("Recv blk %d\n", ++blocknr); + } + else + { + /* Sync lost */ + LOG_WARN("Sync lost (%d/%d)\n", c, blocknr); + purge = true; + break; + } + + buf = block_buffer; /* Reset pointer to start of buffer */ + checksum = 0; + crc = 0; + for (i = 0; i < blocksize; i++) + { + if ((c = kfile_getc(ch)) == EOF) + { + purge = true; + break; + } + + /* Store in buffer */ + *buf++ = (char)c; + + /* Calculate block checksum or CRC */ + if (usecrc) + crc = UPDCRC16(c, crc); + else + checksum += (char)c; + } + + if (purge) + break; + + /* Get the checksum byte or the CRC-16 MSB */ + if ((c = kfile_getc(ch)) == EOF) + { + purge = true; + break; + } + + if (usecrc) + { + crc = UPDCRC16(c, crc); + + /* Get CRC-16 LSB */ + if ((c = kfile_getc(ch)) == EOF) + { + purge = true; + break; + } + + crc = UPDCRC16(c, crc); + + if (crc) + { + LOG_ERR("Bad CRC: %04x\n", crc); + purge = true; + break; + } + } + /* Compare the checksum */ + else if (c != checksum) + { + LOG_ERR("Bad sum: %04x/%04x\n", checksum, c); + purge = true; + break; + } + + /* + * Avoid flushing the same block twice. + * This could happen when the sender does not receive our + * acknowledge and resends the same block. + */ + if (last_block_done < blocknr) + { + /* Call user function to flush the buffer */ + if (kfile_write(fd, block_buffer, blocksize) == (size_t)blocksize) + { + /* Acknowledge block and clear error counter */ + kfile_putc(XM_ACK, ch); + retries = 0; + last_block_done = blocknr; + } + else + { + /* User callback failed: abort transfer immediately */ + retries = CONFIG_XMODEM_MAXRETRIES; + purge = true; + } + } + break; + + case XM_EOT: /* End of transmission */ + kfile_putc(XM_ACK, ch); + LOG_INFO("Transfer completed\n"); + return true; + + case EOF: /* Timeout or serial error */ + purge = true; + break; + + default: + LOG_INFO("Skipping garbage\n"); + purge = true; + break; + } + } /* End forever */ +} +#endif + + +#if CONFIG_XMODEM_SEND +/** + * \brief Transmit some data using the XModem protocol. + * + * \param ch Channel to use for transfer + * \param fd Source file + * + * \note This function allocates a large amount of stack for + * the XModem transfer buffer (\see XM_BUFSIZE). + */ +bool xmodem_send(KFile *ch, KFile *fd) +{ + char block_buffer[XM_BUFSIZE]; /* Buffer to hold a block of data */ + size_t size = -1; + int blocknr = 1, retries = 0, c, i; + bool proceed, usecrc = false; + uint16_t crc; + uint8_t sum; + + /* + * Reading a block can be very slow, so we read the first block early + * to avoid receiving double XM_C char. + * This could happen if we check for XM_C and then read the block, giving + * the receiving device time to send another XM_C char misinterpretating + * the blocks sent. + */ + size = kfile_read(fd, block_buffer, XM_BUFSIZE); + + kfile_clearerr(ch); + LOG_INFO("Wait remote host\n"); + + for(;;) + { + proceed = false; + do + { + if (XMODEM_CHECK_ABORT) + return false; + + switch (c = kfile_getc(ch)) + { + case XM_NAK: + LOG_INFO("Resend blk %d\n", blocknr); + proceed = true; + break; + + case XM_C: + if (c == XM_C) + { + LOG_INFO("Tx start (CRC)\n"); + usecrc = true; + } + else + { + LOG_INFO("Tx start (BCC)\n"); + } + + proceed = true; + break; + + case XM_ACK: + /* End of transfer? */ + if (!size) + return true; + + /* Call user function to read in one block */ + size = kfile_read(fd, block_buffer, XM_BUFSIZE); + LOG_INFO("Send blk %d\n", blocknr); + blocknr++; + retries = 0; + proceed = true; + break; + + case EOF: + kfile_clearerr(ch); + retries++; + LOG_INFO("Retries %d\n", retries); + if (retries <= CONFIG_XMODEM_MAXRETRIES) + break; + /* falling through! */ + + case XM_CAN: + LOG_INFO("Transfer aborted\n"); + return false; + + default: + LOG_INFO("Skipping garbage\n"); + break; + } + } + while (!proceed); + + if (!size) + { + kfile_putc(XM_EOT, ch); + continue; + } + + /* Pad block with 0xFF if it's partially full */ + memset(block_buffer + size, 0xFF, XM_BUFSIZE - size); + + /* Send block header (STX, blocknr, ~blocknr) */ + #if XM_BUFSIZE == 128 + kfile_putc(XM_SOH, ch); + #else + kfile_putc(XM_STX, ch); + #endif + kfile_putc(blocknr & 0xFF, ch); + kfile_putc(~blocknr & 0xFF, ch); + + /* Send block and compute its CRC/checksum */ + sum = 0; + crc = 0; + for (i = 0; i < XM_BUFSIZE; i++) + { + kfile_putc(block_buffer[i], ch); + crc = UPDCRC16(block_buffer[i], crc); + sum += block_buffer[i]; + } + + /* Send CRC/Checksum */ + if (usecrc) + { + kfile_putc(crc >> 8, ch); + kfile_putc(crc & 0xFF, ch); + } + else + kfile_putc(sum, ch); + } +} +#endif diff --git a/bertos/net/xmodem.h b/bertos/net/xmodem.h new file mode 100644 index 0000000..2e864d6 --- /dev/null +++ b/bertos/net/xmodem.h @@ -0,0 +1,63 @@ +/** + * \file + * + * \brief X-Modem serial transmission protocol. + * + * \author Bernie Innocenti + * \author Francesco Sacchi + * + * $WIZ$ module_name = "xmodem" + * $WIZ$ module_depends = "kfile", "crc16" + * $WIZ$ module_configuration = "bertos/cfg/cfg_xmodem.h" + */ + + +#ifndef NET_XMODEM_H +#define NET_XMODEM_H + +#include +#include + +/** + * Called to know if we want to abort data tranfer. + * Redefine to whatever you need. + * \{ + */ +#ifndef XMODEM_CHECK_ABORT +#define XMODEM_CHECK_ABORT (false) +#endif +/*\}*/ + +bool xmodem_recv(KFile *ch, KFile *fd); +bool xmodem_send(KFile *ch, KFile *fd); + +#endif /* NET_XMODEM_H */ diff --git a/bertos/os/hptime.c b/bertos/os/hptime.c new file mode 100644 index 0000000..c21a6a9 --- /dev/null +++ b/bertos/os/hptime.c @@ -0,0 +1,78 @@ +/** + * \file + * + * + * \brief Portable abstraction for high-resolution time handling (implementation) + * + * \author Bernie Innocenti + */ + +#include "hptime.h" + +#if defined(_WIN32) + +#include + +hptime_t hptime_get(void) +{ + FILETIME ft; + + /* + * La precisione dei FileTime sarebbe 100ns, ma il + * valore viene ottenuto convertendo una struttura + * SYSTEMTIME, che ha precisione di 1ms. Il numero + * che otteniamo e' quindi sempre un multiplo di + * 100000. + */ + GetSystemTimeAsFileTime(&ft); + + /* Copy the upper/lower into a quadword. */ + return (((hptime_t)ft.dwHighDateTime) << 32) + (hptime_t)ft.dwLowDateTime; +} + +#elif defined(__unix__) || (defined(__APPLE__) && defined(__MACH__)) + +#include /* for gettimeofday() */ +#include /* for NULL */ + +hptime_t hptime_get(void) +{ + struct timeval tv; + + gettimeofday(&tv, NULL); + return (hptime_t)tv.tv_sec * HPTIME_TICKS_PER_SECOND + + (hptime_t)tv.tv_usec; +} + +#else /* !__unix__ */ + #error OS dependent support code missing for this OS +#endif /* !__unix__ */ + diff --git a/bertos/os/hptime.h b/bertos/os/hptime.h new file mode 100644 index 0000000..d7699d0 --- /dev/null +++ b/bertos/os/hptime.h @@ -0,0 +1,86 @@ +/** + * \file + * + * + * \brief Portable abstraction for high-resolution time handling (interface) + * + * \author Bernie Innocenti + */ +#ifndef HPTIME_H +#define HPTIME_H + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + +#ifdef _WIN32 + + /** our type for "high precision absolute time" */ + typedef __int64 hptime_t; + #define SIZEOF_HPTIME_T 8 + + #define HPTIME_TICKS_PER_SECOND (10000000I64) + #define HPTIME_TICKS_PER_MILLISEC (10000I64) + #define HPTIME_TICKS_PER_MICRO (10I64) + +#elif defined(__unix__) || (defined(__APPLE__) && defined(__MACH__)) + + #include /* int64_t */ + + #ifndef DEVLIB_MTIME_DEFINED + #define DEVLIB_MTIME_DEFINED 1 /* Resolve conflict with */ + typedef int32_t mtime_t; + #define SIZEOF_MTIME_T (32 / CPU_BITS_PER_CHAR) + #define MTIME_INFINITE 0x7FFFFFFFL + #endif + + /** Type for "high precision absolute time". */ + typedef int64_t hptime_t; + #define SIZEOF_HPTIME_T 8 + + #define HPTIME_TICKS_PER_SECOND (1000000LL) + #define HPTIME_TICKS_PER_MILLISEC (1000LL) + #define HPTIME_TICKS_PER_MICRO (1LL) + +#else /* !__unix__ */ + #error OS dependent support code missing for this OS +#endif /* !__unix__ */ + +/** + * Return the current time with the maximum precision made available from the hosting OS + */ +extern hptime_t hptime_get(void); + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* HPTIME_H */ diff --git a/bertos/remote_merge b/bertos/remote_merge new file mode 100755 index 0000000..5afde9b --- /dev/null +++ b/bertos/remote_merge @@ -0,0 +1,48 @@ +#!/bin/bash +#set -x + +if [ $# -lt 2 ] ; then + printf "\nMerge remote url commits into local BeRTOS svn repository.\n" + printf "Usage: $0 []\n" + printf "If remote end revision is not supplied HEAD will be used.\n" + exit 1 +fi + + +MERGE_URL="$1" +START_REV="$2" +if [ z"$3" = z ] ; then + END_REV=HEAD +else + END_REV="$3" +fi + +#Check for local uncommitted modifications +STATUS=`svn status -q` +if [[ z"$STATUS" != z && "${STATUS:0:1}" != $'\n' ]] ; then + printf "Project has local modifications, it must be clean\n" + exit 1 +fi + +#Get list of revisions to merge. +REV_LIST=`svn log $MERGE_URL -r$START_REV:$END_REV --quiet 2>&1| perl -ne 'if(m/^r([0-9]+)/) {print $1, "\n";}'` + +printf "Merged from external project:\n" > header +for rev in $REV_LIST +do + #Get commit log message only + #svn pg --revprop -r$rev svn:log $MERGE_URL > tmp_msg + + #Get revision commit log with date and author + svn log -r$rev $MERGE_URL > tmp_msg + #Replace leading and trailing banners "---------------------..." + sed -i 's/^-\+/\*\*\*\*\*\*\*\*\*\*/' tmp_msg + #Indent all message + sed -i 's/\(^.*\)/\t\1/' tmp_msg + cat header tmp_msg > commit_msg + #Try to merge ... + svn merge $MERGE_URL -c$rev || exit 1 + #and commit! + svn ci -Fcommit_msg +done +rm -rf header tmp_msg commit_msg diff --git a/bertos/rules.mk b/bertos/rules.mk new file mode 100644 index 0000000..37eaaa7 --- /dev/null +++ b/bertos/rules.mk @@ -0,0 +1,399 @@ +# +# $Id: rules.mk 4643 2010-12-20 12:10:41Z lottaviano $ +# Copyright 2002,2003,2004,2005,2006 Develer S.r.l. (http://www.develer.com/) +# All rights reserved. +# +# Based on: +# GCC-AVR standard Makefile part 2 +# Volker Oth 1/2000 +# +# Author: Bernie Innocenti +# + +# Remove all default pattern rules +.SUFFIXES: + +# Verbosity +ifeq ($(V),1) +# Verbose build +Q := +L := @echo >/dev/null +else +# Quiet build +Q := @ +L := @echo +endif + +# Select Bourne Again SHell as default make shell +SHELL := bash + +# Checker build +ifeq ($(C),1) +CC = $(CHECKER) +CFLAGS += -Wundef -D__x86_64__=1 -D__unix__=1 -D__linux__=1 -D__STDC_VERSION__=199901L +endif + +# Initialize $(top_srcdir) with current directory, unless it was already initialized +top_srcdir ?= $(shell pwd) + +# Virtual Product: based on target products may be different. +# e.g. Embedded target = hex, s19, bin +# Hosted = exe +# Library = lib.a +TRG_TGT = $(TRG:%=$(OUTDIR)/%.tgt) + +RECURSIVE_TARGETS = all-recursive install-recursive clean-recursive + +# The default target +.PHONY: all +all:: all-recursive $(TRG_TGT) + +# Generate project documentation +.PHONY: docs +docs: + $L "Building documentation" + $Q $(DOXYGEN) + +# Generate ctags +.PHONY: tags +tags: + $L "Rebuilding C tags database" + $Q ctags -R --exclude=doc + +# Run testsuite +.PHONY: check +check: + $L "Running testsuite" + $Q test/run_tests.sh + +define build_target + +ifeq ($$($(1)_HOSTED),1) + #On Darwin architecture the assembly doesn't link correctly if these flags are set. + ifeq ($(shell uname | grep -c "Darwin"),1) + LIST_FLAGS := "" + MAP_FLAGS := "" + LDFLAGS := "" + endif + #use hosted specific map flags + $(1)_MAP_FLAGS = $$(MAP_FLAGS_HOST) + + #Handle library creation + ifeq ($$($(1)_MAKELIB),1) + $$(OUTDIR)/$(1).tgt : $$(OUTDIR)/$(1).a + else + #Otherwise in hosted application we need only executable file. + $$(OUTDIR)/$(1).tgt : $$(OUTDIR)/$(1) + endif +else + #use embedded specific map flags + $(1)_MAP_FLAGS = $$(MAP_FLAGS_EMB) + #In embedded we need s19, hex and bin + $$(OUTDIR)/$(1).tgt : $$(OUTDIR)/$(1).s19 $$(OUTDIR)/$(1).hex $$(OUTDIR)/$(1).bin +endif + +$(1)_LDFLAGS += $$($(1)_MAP_FLAGS) + +# In embedded systems the target CPU is needed, +# but there are different options on how to pass +# it to the compiler. +ifneq ($$(strip $$($(1)_MCU)),) + $(1)_MCPU = -mmcu=$$($(1)_MCU) +endif +ifneq ($$(strip $$($(1)_CPU)),) + $(1)_MCPU = -mcpu=$$($(1)_CPU) +endif + +# If a CPU is specified add to +# project specific flags. +ifneq ($$($(1)_MCPU),) + $(1)_CFLAGS += $$($(1)_MCPU) + $(1)_CXXFLAGS += $$($(1)_MCPU) + $(1)_ASFLAGS += $$($(1)_MCPU) + $(1)_CPPAFLAGS += $$($(1)_MCPU) + $(1)_LDFLAGS += $$($(1)_MCPU) +endif + +ifneq ($$(strip $$($(1)_LDSCRIPT)),) + $(1)_LDFLAGS += -Wl,-T$$($(1)_LDSCRIPT) +endif + +ifneq ($$($(1)_CROSS),) + #deprecated: use PREFIX, SUFFIX and HOSTED mechanism instead + $(1)_PREFIX = $$($(1)_CROSS) + $(1)_SUFFIX = +endif + +$(1)_CC ?= $$($(1)_PREFIX)$$(CC)$$($(1)_SUFFIX) +$(1)_CXX ?= $$($(1)_PREFIX)$$(CXX)$$($(1)_SUFFIX) +$(1)_AS ?= $$($(1)_PREFIX)$$(AS)$$($(1)_SUFFIX) +$(1)_AR ?= $$($(1)_PREFIX)$$(AR)$$($(1)_SUFFIX) +$(1)_OBJCOPY ?= $$($(1)_PREFIX)$$(OBJCOPY)$$($(1)_SUFFIX) +$(1)_STRIP ?= $$($(1)_PREFIX)$$(STRIP)$$($(1)_SUFFIX) +ifneq ($$(strip $$($(1)_CXXSRC)),) + $(1)_LD = $$($(1)_PREFIX)$$(LDXX)$$($(1)_SUFFIX) +else + $(1)_LD = $$($(1)_PREFIX)$$(LD)$$($(1)_SUFFIX) +endif + +# Debug stuff +ifeq ($$($(1)_DEBUG),1) + # AVR is an harvard processor + # and needs debug module + # to be compiled in program memory + ifeq ($$(findstring avr, $$($(1)_PREFIX)),avr) + $(1)_DEBUGSRC = $(1)_PCSRC + else + $(1)_DEBUGSRC = $(1)_CSRC + endif + + $$($(1)_DEBUGSRC) += bertos/drv/kdebug.c + + # Also add formatwr.c (printf) if not already present + ifneq ($$(findstring formatwr.c, $$($$($(1)_DEBUGSRC))),formatwr.c) + $$($(1)_DEBUGSRC) += bertos/mware/formatwr.c + endif + + # Also add hex.c (for printf) if not already present + ifneq ($$(findstring hex.c, $$($$($(1)_CSRC))),hex.c) + $$($(1)_CSRC) += bertos/mware/hex.c + endif + + $(1)_CFLAGS += -D_DEBUG + $(1)_CXXFLAGS += -D_DEBUG +else + $(1)_CFLAGS += -fomit-frame-pointer + $(1)_CXXFLAGS += -fomit-frame-pointer +endif + +$(1)_COBJ = $$(foreach file,$$($(1)_CSRC:%.c=%.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_CXXOBJ = $$(foreach file,$$($(1)_CXXSRC:%.cpp=%.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_PCOBJ = $$(foreach file,$$($(1)_PCSRC:%.c=%_P.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_AOBJ = $$(foreach file,$$($(1)_ASRC:%.s=%.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_CPPAOBJ = $$(foreach file,$$($(1)_CPPASRC:%.S=%.o),$$(OBJDIR)/$(1)/$$(file)) +$(1)_OBJ := $$($(1)_COBJ) $$($(1)_CXXOBJ) $$($(1)_PCOBJ) $$($(1)_AOBJ) $$($(1)_CPPAOBJ) +$(1)_SRC := $$($(1)_CSRC) $$($(1)_CXXSRC) $$($(1)_PCSRC) $$($(1)_ASRC) $$($(1)_CPPASRC) +OBJ += $$($(1)_OBJ) + +# Compile: instructions to create assembler and/or object files from C source +$$($(1)_COBJ) : $$(OBJDIR)/$(1)/%.o : %.c + $L "$(1): Compiling $$< (C)" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) -c $$(CFLAGS) $$($(1)_CFLAGS) $$($(1)_CPPFLAGS) $$(CPPFLAGS) $$($$(*F)_CFLAGS) $$< -o $$@ + +# Compile: instructions to create assembler and/or object files from C++ source +$$($(1)_CXXOBJ) : $$(OBJDIR)/$(1)/%.o : %.cpp + $L "$(1): Compiling $$< (C++)" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CXX) -c $$(CXXFLAGS) $$($(1)_CXXFLAGS) $$($(1)_CPPFLAGS) $$(CPPFLAGS) $$($$(*F)_CXXFLAGS) $$< -o $$@ + +# Generate assembly sources from C files (debug) +$$(OBJDIR)/$(1)/%.s : %.c + $L "$(1): Generating asm source $$<" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) -S $$(CFLAGS) $$($(1)_CFLAGS) $$($(1)_CPPFLAGS) $$($$(*F)_CFLAGS) $$< -o $$@ + +# Generate special progmem variant of a source file +$$($(1)_PCOBJ) : $$(OBJDIR)/$(1)/%_P.o : %.c + $L "$(1): Compiling $$< (PROGMEM)" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) -c -D_PROGMEM $$(CFLAGS) $$($(1)_CFLAGS) $$($(1)_CPPFLAGS) $$(CPPFLAGS) $$($$(*F)_CFLAGS) $$< -o $$@ + +# Assemble: instructions to create object file from assembler files +$$($(1)_AOBJ): $$(OBJDIR)/$(1)/%.o : %.s + $L "$(1): Assembling $$<" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_AS) -c $$(ASFLAGS) $$($(1)_ASFLAGS) $$($$(*F)_ASFLAGS) $$< -o $$@ + +$$($(1)_CPPAOBJ): $$(OBJDIR)/$(1)/%.o : %.S + $L "$(1): Assembling with CPP $$<" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) -c $$(CPPAFLAGS) $$($(1)_CPPAFLAGS) $$($(1)_CPPFLAGS) $$(CPPFLAGS) $$($$(*F)_CPPAFLAGS) $$< -o $$@ + + +# Link: instructions to create elf output file from object files +$$(OUTDIR)/$(1).elf $$(OUTDIR)/$(1)_nostrip: bumprev $$($(1)_OBJ) $$($(1)_LDSCRIPT) + $L "$(1): Linking $$@" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_LD) $$($(1)_OBJ) $$(LIB) $$(LDFLAGS) $$($(1)_LDFLAGS) -o $$@ + + +# Instructions to create a static library from object files +$$(OUTDIR)/$(1).a: bumprev $$($(1)_OBJ) + $L "$(1): Creating static library $$@" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_AR) $$(ARFLAGS) $$($(1)_ARFLAGS) $$@ $$($(1)_OBJ) + +# Strip debug info +$$(OUTDIR)/$(1): $$(OUTDIR)/$(1)_nostrip + $L "$(1): Generating stripped executable $$@" + $Q $$($(1)_STRIP) -o $$@ $$^ + +# Compile and link (program-at-a-time) +$$(OUTDIR)/$(1)_whole.elf: bumprev $$($(1)_SRC) $$($(1)_LDSCRIPT) + $L "$(1): Compiling and Linking whole program $$@" + @$$(MKDIR_P) $$(dir $$@) + $Q $$($(1)_CC) $$($(1)_SRC) $$(CFLAGS) $$($(1)_CFLAGS) $$(LIB) $$(LDFLAGS) $$($(1)_LDFLAGS) -o $$@ + +# Flash target +.PHONY: flash_$(1) +flash_$(1): $(OUTDIR)/$(1).hex flash_$(1)_local + $L "$(1): Flashing target" + $Q if [ ! -f $$($(1)_FLASH_SCRIPT) ] ; then \ + printf "CLDLG: No flash script found.\n" ; \ + exit 1 ; \ + fi + $Q if [ ! "$$($(1)_PROGRAMMER_TYPE)" == "none" ] ; then \ + PROGRAMMER_CPU=$$($(1)_PROGRAMMER_CPU) PROGRAMMER_TYPE=$$($(1)_PROGRAMMER_TYPE) \ + PROGRAMMER_PORT=$$($(1)_PROGRAMMER_PORT) IMAGE_FILE=$$< \ + $$($(1)_FLASH_SCRIPT) ; \ + else \ + printf "CLDLG: No programmer interface configured, see http://dev.bertos.org/wiki/ProgrammerInterface\n" ; \ + exit 1 ; \ + fi + +.PHONY: flash_$(1)_local +flash_$(1)_local: + +.PHONY: stopflash_$(1) +stopflash_$(1): + $L "$(1): Stopping target flashing" + $Q if [ ! -f $$($(1)_STOPFLASH_SCRIPT) ] ; then \ + printf "CLDLG: No stopflash script found.\n" ; \ + exit 1 ; \ + fi + $Q $$($(1)_STOPFLASH_SCRIPT) ; + + +# Debug target +.PHONY: debug_$(1) +debug_$(1): $(OUTDIR)/$(1).elf + $L "$(1): Debugging target" + $Q if [ ! -f $$($(1)_DEBUG_SCRIPT) ] ; then \ + printf "CLDLG: No debug script found.\n" ; \ + exit 1 ; \ + fi + $Q if [ ! "$$($(1)_PROGRAMMER_TYPE)" == "none" ] ; then \ + PROGRAMMER_CPU=$$($(1)_PROGRAMMER_CPU) PROGRAMMER_TYPE=$$($(1)_PROGRAMMER_TYPE) \ + PROGRAMMER_PORT=$$($(1)_PROGRAMMER_PORT) GDB_PORT=3333 \ + ELF_FILE=$$< \ + $$($(1)_DEBUG_SCRIPT) ; \ + else \ + printf "CLDLG: No programmer interface configured, see http://dev.bertos.org/wiki/ProgrammerInterface\n" ; \ + exit 1 ; \ + fi + +.PHONY: stopdebug_$(1) +stopdebug_$(1): + $L "$(1): Stopping debugger" + $Q if [ ! -f $$($(1)_STOPDEBUG_SCRIPT) ] ; then \ + printf "CLDLG: No stopdebug script found.\n" ; \ + exit 1 ; \ + fi + $Q $$($(1)_STOPDEBUG_SCRIPT) ; + +.PHONY: fuses_$(!) +fuses_$(1): + if [ ! -z "$$($(1)_efuse)" ] ; then \ + if ! $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U efuse:w:$$($(1)_efuse):m ; then \ + $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U efuse:w:$$($(1)_efuse):m ; \ + fi \ + fi + if [ ! -z "$$($(1)_hfuse)" ] ; then \ + if ! $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U hfuse:w:$$($(1)_hfuse):m ; then \ + $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U hfuse:w:$$($(1)_hfuse):m ; \ + fi \ + fi + if [ ! -z "$$($(1)_lfuse)" ] ; then \ + if ! $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U lfuse:w:$$($(1)_lfuse):m ; then \ + $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U lfuse:w:$$($(1)_lfuse):m ; \ + fi \ + fi + if [ ! -z "$$($(1)_lock)" ] ; then \ + if ! $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U lock:w:$$($(1)_lock):m ; then \ + $(AVRDUDE) $(DPROG) -p $$($(1)_MCU) -U lock:w:$$($(1)_lock):m ; \ + fi \ + fi + +$$(OUTDIR)/$(1).hex: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O ihex $$< $$@ + +$$(OUTDIR)/$(1).s19: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O srec $$< $$@ + +$$(OUTDIR)/$(1).bin: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O binary $$< $$@ + +$$(OUTDIR)/$(1).obj: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O avrobj $$< $$@ + +$$(OUTDIR)/$(1).rom: $$(OUTDIR)/$(1).elf + $$($(1)_OBJCOPY) -O $$(FORMAT) $$< $$@ +# $$($(1)_OBJCOPY) -j .eeprom --set-section-flags=.eeprom="alloc,load" -O $$(FORMAT) $$< $$(@:.rom=.eep) + +endef + +# Generate build rules for all targets +$(foreach t,$(TRG),$(eval $(call build_target,$(t)))) + +# Generate Qt's moc files from headers +# NOTE: moc totally sucks and can generate empty files for some error conditions, +# leading to puzzling linker errors. Kill 'em and abort build. +%_moc.cpp: %.h + $(QT_MOC) -o $@ $< + if [ ! -s $< ]; then \ + rm -f $@; \ + exit 1; \ + fi + + +%.cof: %.elf + $(COFFCONVERT) -O coff-ext-avr $< $@ +# $(COFFCONVERT) -O coff-avr $< $@ # For use with AVRstudio 3 + +#make instruction to delete created files +cleanall: clean +clean: clean-recursive + -$(RM_R) $(OBJDIR) + -$(RM_R) $(OUTDIR) + +$(RECURSIVE_TARGETS): + @target=`echo $@ | sed s/-recursive//`; \ + for dir in $(SUBDIRS); do \ + if [ -e $$dir/configure.in ] || [ -e $$dir/configure.ac ] && [ ! -x $$dir/configure ]; then \ + echo "Running autogen.sh in $$dir..."; \ + ( cd $$dir && chmod a+x autogen.sh && ./autogen.sh && rm -f Makefile || exit 1 ); \ + fi; \ + if [ ! -e $$dir/Makefile ]; then \ + if [ -e "$$dir/build-$(ARCH)" ]; then \ + echo "Running build script in $$dir..."; \ + ( cd $$dir && chmod a+x build && ./build || exit 1 ); \ + else \ + echo "Running configure in $$dir..."; \ + ( cd $$dir && ./configure --prefix=$(PREFIX) || exit 1 ); \ + fi; \ + fi; \ + $(MAKE) -C $$dir $$target || exit 1; \ + done + +BUILDREV_H = buildrev.h + +.PHONY: bumprev +bumprev: + @if [ -e bertos/verstag.c ]; then \ + buildnr=0; \ + if [ -f $(BUILDREV_H) ]; then \ + buildnr=`sed <"$(BUILDREV_H)" -n -e 's/#define VERS_BUILD \([0-9][0-9]*\)/\1/p'`; \ + fi; \ + buildnr=`expr $$buildnr + 1`; \ + buildhost=`hostname | sed -n -e '1h;2,$$H;$${g;s/\n//g;p;}'`; \ + echo "#define VERS_BUILD $$buildnr" >"$(BUILDREV_H)"; \ + echo "#define VERS_HOST \"$$buildhost\"" >>"$(BUILDREV_H)"; \ + echo "Building revision $$buildnr"; \ + fi; \ + # + +# Include dependencies +ifneq ($(strip $(OBJ)),) +-include $(OBJ:%.o=%.d) +endif diff --git a/bertos/struct/bitarray.h b/bertos/struct/bitarray.h new file mode 100644 index 0000000..83a0ef1 --- /dev/null +++ b/bertos/struct/bitarray.h @@ -0,0 +1,269 @@ +/** + * \file + * + * + * \brief Bitarray module + * + * \author Daniele Basile + * + * $WIZ$ module_name = "bitarray" + */ + +#ifndef STRUCT_BITARRAY_H +#define STRUCT_BITARRAY_H + +#include +#include +#include + +#include + +typedef struct BitArray +{ + size_t size; /// Size in bytes of the bitarray + size_t bitarray_len; /// Number of bits used + uint8_t *array; /// Pointer to memory occupied by the bitarray +} BitArray; + +/** + * Convenience macro to create a memory area for the BitArray. + * \param name Name of the variable. + * \param size Number of bits requested. It will be rounded to the nearest + * byte + */ +#define BITARRAY_ALLOC(name, size) uint8_t name[DIV_ROUNDUP((size), 8)] + +/** + * Set one bit into the bit array. + * \param bitx BitArray context + * \param idx The bit to set + */ +INLINE void bitarray_set(BitArray *bitx, int idx) +{ + ASSERT((size_t)idx <= bitx->bitarray_len); + + int page = idx / 8; + uint8_t bit = idx % 8; + + bitx->array[page] |= BV(bit); +} + +/** + * Clear one bit in the bit array. + * \param bitx BitArray context + * \param idx The bit to clear + */ +INLINE void bitarray_clear(BitArray *bitx, int idx) +{ + ASSERT((size_t)idx <= bitx->bitarray_len); + + int page = idx / 8; + uint8_t bit = idx % 8; + + bitx->array[page] &= ~BV(bit); +} + +/** + * Set a range of bits. + * + * The range starts from \a idx (inclusive) and spans \a offset bits. + * + * \param bitx BitArray context + * \param idx Starting bit + * \param offset Number of bit to set + */ +INLINE void bitarray_setRange(BitArray *bitx, int idx, int offset) +{ + ASSERT((size_t)idx <= bitx->bitarray_len); + + for (int i = idx; i < offset + idx; i++) + bitarray_set(bitx, i); +} + +/** + * Clear a range of bits. + * + * The range starts from \a idx (inclusive) and spans \a offset bits. + * + * \param bitx BitArray context + * \param idx Starting bit + * \param offset Number of bits to clear + */ +INLINE void bitarray_clearRange(BitArray *bitx, int idx, int offset) +{ + ASSERT((size_t)idx <= bitx->bitarray_len); + + for (int i = idx; i < offset + idx; i++) + bitarray_clear(bitx, i); +} + +/** + * Test a bit. + * + * \param bitx BitArray context + * \param idx Bit to test + * \return True if bit is set, false otherwise. + */ +INLINE bool bitarray_test(BitArray *bitx, int idx) +{ + ASSERT((size_t)idx <= bitx->bitarray_len); + int page = idx / 8; + uint8_t bit = idx % 8; + + return (bitx->array[page] & BV(bit)); +} + +/** + * Check if the bitarray is full + * + * Only \a bitarray_len bits are tested. + * + * \param bitx BitArray to test + * \return True if \a bitx is full, false otherwise + */ +INLINE bool bitarray_isFull(BitArray *bitx) +{ + // test full bytes except the last one + for (size_t page = 0; page <= bitx->size - 2; page++) + { + if (!(bitx->array[page] == 0xff)) + return 0; + } + // test the last byte using the correct bitmask + uint8_t mask = BV(bitx->bitarray_len >> 3) - 1; + if (!(bitx->array[bitx->size - 1] & mask)) + return 0; + + return 1; +} + +/* + * Ugly!.. reformat it. + */ +/** + * Test if a range of bit is full. + * + * \param bitx BitArray context + * \param idx Starting bit + * \param offset Number of bits to test + * \return True if range is full, false otherwise + */ +INLINE bool bitarray_isRangeFull(BitArray *bitx, int idx, int offset) +{ + ASSERT((size_t)(idx + offset) <= bitx->bitarray_len); + + for (int i = idx; i <= idx + offset; i++) + if (!bitarray_test(bitx, i)) + return 0; + + return 1; +} + +/* + * Ugly!.. reformat it. + */ +/** + * Test if a range of bit is empty. + * + * \param bitx BitArray context + * \param idx Starting bit + * \param offset Number of bits to test + * \return True if range is empty, false otherwise + */ +INLINE bool bitarray_isRangeEmpty(BitArray *bitx, int idx, int offset) +{ + ASSERT((size_t)(idx + offset) <= bitx->bitarray_len); + + for (int i = idx; i <= idx + offset; i++) + if (bitarray_test(bitx, i)) + return 0; + + return 1; +} + +/** + * Print on debug serial a BitArray. + * \note This module does not use the logging module, so you + * can't decide the logging level. + * \param bitx BitArray to be printed. + */ +INLINE void bitarray_dump(BitArray *bitx) +{ + kprintf("bitarray size[%zu]bits on [%zu]bytes\n", bitx->bitarray_len, bitx->size); + + int i = 0; + int j = 0; + int count = bitx->bitarray_len; + + while (count--) + { + kprintf("%d", bitarray_test(bitx, i++)); + if (j == 7) + { + kprintf("..%02x [%d]\n", bitx->array[(i / 8) - 1], i); + j = 0; + continue; + } + j++; + } + + if (j != 0) + kprintf("..%02x [%d]\n", bitx->array[i / 8], i); +} + +/** + * Init a BitArray. + * + * The BitArray uses an external array for storage. You can use the macro + * BITARRAY_ALLOC to declare an appropriate memory size. Example usage: + * \code + * BITARRAY_ALLOC(bits_mem, 17); + * BitArray bits; + * bitarray_init(&bits, 17, bits_mem, sizeof(bits_mem)) + * \endcode + * + * \param bitx BitArray context + * \param bitarray_len Number of bits in the BitArray + * \param array Memory area for the BitArray + * \param size Size (in bytes) of the memory area \a array + */ +INLINE void bitarray_init(BitArray *bitx, size_t bitarray_len, uint8_t *array, size_t size) +{ + bitx->size = size; + bitx->array = array; + bitx->bitarray_len = bitarray_len; +} + + +int bitarray_testSetup(void); +int bitarray_testRun(void); +int bitarray_testTearDown(void); + +#endif /* STRUCT_BITARRAY_H */ diff --git a/bertos/struct/bitarray_test.c b/bertos/struct/bitarray_test.c new file mode 100644 index 0000000..b917d0f --- /dev/null +++ b/bertos/struct/bitarray_test.c @@ -0,0 +1,132 @@ +/** + * \file + * + * + * \brief Bitarray test + * + * \author Daniele Basile + */ + +#include + +#include +#include +#include + +#include + +#define TEST1_LEN 31 +#define TEST2_LEN 17 + +BITARRAY_ALLOC(test1, TEST1_LEN); +BITARRAY_ALLOC(test2, TEST2_LEN); + +BitArray bitx1; +BitArray bitx2; + +int bitarray_testSetup(void) +{ + kdbg_init(); + bitarray_init(&bitx1, TEST1_LEN, test1, sizeof(test1)); + bitarray_init(&bitx2, TEST2_LEN, test2, sizeof(test2)); + return 0; +} + +int bitarray_testRun(void) +{ + memset(test1, 0xaa, sizeof(test1)); + + bitarray_dump(&bitx1); + for (size_t i = 0; i < TEST1_LEN; i++) + { + if (!((bool)(i % 2) == bitarray_test(&bitx1,i))) + goto error; + } + + memset(test1, 0, sizeof(test1)); + for (size_t i = 0; i < TEST1_LEN; i++) + { + if ((i % 2) == 0) + bitarray_clear(&bitx1,i); + else + bitarray_set(&bitx1, i); + } + + bitarray_dump(&bitx1); + for (size_t i = 0; i < TEST1_LEN; i++) + { + if (!((bool)(i % 2) == bitarray_test(&bitx1, i))) + goto error; + } + + memset(test1, 0, sizeof(test1)); + bitarray_set(&bitx1, 0); + bitarray_dump(&bitx1); + if (!bitarray_test(&bitx1, 0)) + goto error; + + memset(test1, 0, sizeof(test1)); + bitarray_set(&bitx1, TEST1_LEN); + bitarray_dump(&bitx1); + if (!bitarray_test(&bitx1, TEST1_LEN)) + goto error; + + kprintf("Test 2\n"); + memset(test2, 0xFF, sizeof(test2)); + bitarray_dump(&bitx2); + if (!bitarray_isFull(&bitx2)) + goto error; + + memset(test2, 0xFF, sizeof(test2)); + bitarray_clear(&bitx2, 5); + bitarray_dump(&bitx2); + if (bitarray_isFull(&bitx2)) + goto error; + + memset(test2, 0xFF, sizeof(test2)); + bitarray_clear(&bitx2, 13); + bitarray_dump(&bitx2); + if (bitarray_isFull(&bitx2)) + goto error; + + return 0; + +error: + kprintf("Error!\n"); + return -1; +} + +int bitarray_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(bitarray); diff --git a/bertos/struct/fifobuf.h b/bertos/struct/fifobuf.h new file mode 100644 index 0000000..f58e1c0 --- /dev/null +++ b/bertos/struct/fifobuf.h @@ -0,0 +1,363 @@ +/** + * \file + * + * + * \defgroup fifobuf FIFO buffer + * \ingroup struct + * \{ + * + * \brief General pourpose FIFO buffer implemented with a ring buffer + * + * \li \c begin points to the first buffer element; + * \li \c end points to the last buffer element (unlike the STL convention); + * \li \c head points to the element to be extracted next; + * \li \c tail points to the location following the last insertion; + * \li when any of the pointers advances beyond \c end, it is reset + * back to \c begin. + * + * \code + * + * +-----------------------------------+ + * | empty | valid data | empty | + * +-----------------------------------+ + * ^ ^ ^ ^ + * begin head tail end + * + * \endcode + * + * The buffer is EMPTY when \c head and \c tail point to the same location: + * \code head == tail \endcode + * + * The buffer is FULL when \c tail points to the location immediately + * after \c head: + * \code tail == head - 1 \endcode + * + * The buffer is also FULL when \c tail points to the last buffer + * location and head points to the first one: + * \code head == begin && tail == end \endcode + * + * \author Bernie Innocenti + */ + +#ifndef STRUCT_FIFO_H +#define STRUCT_FIFO_H + +#include +#include +#include + +typedef struct FIFOBuffer +{ + unsigned char * volatile head; + unsigned char * volatile tail; + unsigned char *begin; + unsigned char *end; +} FIFOBuffer; + + +#define ASSERT_VALID_FIFO(fifo) \ + ATOMIC( \ + ASSERT((fifo)->head >= (fifo)->begin); \ + ASSERT((fifo)->head <= (fifo)->end); \ + ASSERT((fifo)->tail >= (fifo)->begin); \ + ASSERT((fifo)->tail <= (fifo)->end); \ + ) + + +/** + * Check whether the fifo is empty + * + * \note Calling fifo_isempty() is safe while a concurrent + * execution context is calling fifo_push() or fifo_pop() + * only if the CPU can atomically update a pointer + * (which the AVR and other 8-bit processors can't do). + * + * \sa fifo_isempty_locked + */ +INLINE bool fifo_isempty(const FIFOBuffer *fb) +{ + //ASSERT_VALID_FIFO(fb); + return fb->head == fb->tail; +} + + +/** + * Check whether the fifo is full + * + * \note Calling fifo_isfull() is safe while a concurrent + * execution context is calling fifo_pop() and the + * CPU can update a pointer atomically. + * It is NOT safe when the other context calls + * fifo_push(). + * This limitation is not usually problematic in a + * consumer/producer scenario because the + * fifo_isfull() and fifo_push() are usually called + * in the producer context. + */ +INLINE bool fifo_isfull(const FIFOBuffer *fb) +{ + //ASSERT_VALID_FIFO(fb); + return + ((fb->head == fb->begin) && (fb->tail == fb->end)) + || (fb->tail == fb->head - 1); +} + + +/** + * Push a character on the fifo buffer. + * + * \note Calling \c fifo_push() on a full buffer is undefined. + * The caller must make sure the buffer has at least + * one free slot before calling this function. + * + * \note It is safe to call fifo_pop() and fifo_push() from + * concurrent contexts, unless the CPU can't update + * a pointer atomically (which the AVR and other 8-bit + * processors can't do). + * + * \sa fifo_push_locked + */ +INLINE void fifo_push(FIFOBuffer *fb, unsigned char c) +{ +#ifdef __MWERKS__ +#pragma interrupt called +#endif + //ASSERT_VALID_FIFO(fb); + + /* Write at tail position */ + *(fb->tail) = c; + + if (UNLIKELY(fb->tail == fb->end)) + /* wrap tail around */ + fb->tail = fb->begin; + else + /* Move tail forward */ + fb->tail++; +} + + +/** + * Pop a character from the fifo buffer. + * + * \note Calling \c fifo_pop() on an empty buffer is undefined. + * The caller must make sure the buffer contains at least + * one character before calling this function. + * + * \note It is safe to call fifo_pop() and fifo_push() from + * concurrent contexts. + */ +INLINE unsigned char fifo_pop(FIFOBuffer *fb) +{ +#ifdef __MWERKS__ +#pragma interrupt called +#endif + //ASSERT_VALID_FIFO(fb); + + if (UNLIKELY(fb->head == fb->end)) + { + /* wrap head around */ + fb->head = fb->begin; + return *(fb->end); + } + else + /* move head forward */ + return *(fb->head++); +} + + +/** + * Make the fifo empty, discarding all its current contents. + */ +INLINE void fifo_flush(FIFOBuffer *fb) +{ + //ASSERT_VALID_FIFO(fb); + fb->head = fb->tail; +} + + +#if CPU_REG_BITS >= CPU_BITS_PER_PTR + + /* + * 16/32bit CPUs that can update a pointer with a single write + * operation, no need to disable interrupts. + */ + #define fifo_isempty_locked(fb) fifo_isempty((fb)) + #define fifo_push_locked(fb, c) fifo_push((fb), (c)) + #define fifo_pop_locked(fb) fifo_pop((fb)) + #define fifo_flush_locked(fb) fifo_flush((fb)) + +#else /* CPU_REG_BITS < CPU_BITS_PER_PTR */ + + /** + * Similar to fifo_isempty(), but with stronger guarantees for + * concurrent access between user and interrupt code. + * + * \note This is actually only needed for 8-bit processors. + * + * \sa fifo_isempty() + */ + INLINE bool fifo_isempty_locked(const FIFOBuffer *fb) + { + bool result; + ATOMIC(result = fifo_isempty(fb)); + return result; + } + + + /** + * Similar to fifo_push(), but with stronger guarantees for + * concurrent access between user and interrupt code. + * + * \note This is actually only needed for 8-bit processors. + * + * \sa fifo_push() + */ + INLINE void fifo_push_locked(FIFOBuffer *fb, unsigned char c) + { + ATOMIC(fifo_push(fb, c)); + } + + /* Probably not really needed, but hard to prove. */ + INLINE unsigned char fifo_pop_locked(FIFOBuffer *fb) + { + unsigned char c; + ATOMIC(c = fifo_pop(fb)); + return c; + } + + /** + * Similar to fifo_flush(), but with stronger guarantees for + * concurrent access between user and interrupt code. + * + * \note This is actually only needed for 8-bit processors. + * + * \sa fifo_flush() + */ + INLINE void fifo_flush_locked(FIFOBuffer *fb) + { + ATOMIC(fifo_flush(fb)); + } + +#endif /* CPU_REG_BITS < BITS_PER_PTR */ + + +/** + * Thread safe version of fifo_isfull() + */ +INLINE bool fifo_isfull_locked(const FIFOBuffer *_fb) +{ + bool result; + ATOMIC(result = fifo_isfull(_fb)); + return result; +} + + +/** + * FIFO Initialization. + */ +INLINE void fifo_init(FIFOBuffer *fb, unsigned char *buf, size_t size) +{ + /* FIFO buffers have a known bug with 1-byte buffers. */ + ASSERT(size > 1); + + fb->head = fb->tail = fb->begin = buf; + fb->end = buf + size - 1; +} + +/** + * \return Lenght of the FIFOBuffer \a fb. + */ +INLINE size_t fifo_len(FIFOBuffer *fb) +{ + return fb->end - fb->begin; +} + + +#if 0 + +/* + * UNTESTED: if uncommented, to be moved in fifobuf.c + */ +void fifo_pushblock(FIFOBuffer *fb, unsigned char *block, size_t len) +{ + size_t freelen; + + /* Se c'e' spazio da tail alla fine del buffer */ + if (fb->tail >= fb->head) + { + freelen = fb->end - fb->tail + 1; + + /* C'e' abbastanza spazio per scrivere tutto il blocco? */ + if (freelen < len) + { + /* Scrivi quello che entra fino alla fine del buffer */ + memcpy(fb->tail, block, freelen); + block += freelen; + len -= freelen; + fb->tail = fb->begin; + } + else + { + /* Scrivi tutto il blocco */ + memcpy(fb->tail, block, len); + fb->tail += len; + return; + } + } + + for(;;) + { + while (!(freelen = fb->head - fb->tail - 1)) + Delay(FIFO_POLLDELAY); + + /* C'e' abbastanza spazio per scrivere tutto il blocco? */ + if (freelen < len) + { + /* Scrivi quello che entra fino alla fine del buffer */ + memcpy(fb->tail, block, freelen); + block += freelen; + len -= freelen; + fb->tail += freelen; + } + else + { + /* Scrivi tutto il blocco */ + memcpy(fb->tail, block, len); + fb->tail += len; + return; + } + } +} +#endif + +/** \} */ /* defgroup fifobuf */ + +#endif /* STRUCT_FIFO_H */ diff --git a/bertos/struct/hashtable.c b/bertos/struct/hashtable.c new file mode 100644 index 0000000..d895fe7 --- /dev/null +++ b/bertos/struct/hashtable.c @@ -0,0 +1,287 @@ +/** + * \file + * + * + * \brief Portable hash table implementation + * + * Some rationales of our choices in implementation: + * + * \li For embedded systems, it is vital to allocate the table in static memory. To do + * so, it is necessary to expose the \c HashNode and \c HashTable structures in the header file. + * Nevertheless, they should be used as opaque types (that is, the users should not + * access the structure fields directly). + * + * \li To statically allocate the structures, a macro is provided. With this macro, we + * are hiding completely \c HashNode to the user (who only manipulates \c HashTable). Without + * the macro, the user would have had to define both the \c HashNode and the \c HashTable + * manually, and pass both of them to \c ht_init() (which would have created the link between + * the two). Instead, the link is created with a literal initialization. + * + * \li The hash table is created as power of two to remove the divisions from the code. + * Of course, hash functions work at their best when the table size is a prime number. + * When calculating the modulus to convert the hash value to an index, the actual operation + * becomes a bitwise AND: this is fast, but truncates the value losing bits. Thus, the higher + * bits are first "merged" with the lower bits through some XOR operations (see the last line of + * \c calc_hash()). + * + * \li To minimize the memory occupation, there is no flag to set for the empty node. An + * empty node is recognized by its data pointer set to NULL. It is then invalid to store + * NULL as data pointer in the table. + * + * \li The visiting interface through iterators is implemented with pass-by-value semantic. + * While this is overkill for medium-to-stupid compilers, it is the best designed from an + * user point of view. Moreover, being totally inlined (defined completely in the header), + * even a stupid compiler should be able to perform basic optimizations on it. + * We thought about using a pass-by-pointer semantic but it was much more awful to use, and + * the compiler is then forced to spill everything to the stack (unless it is *very* smart). + * + * \li The current implementation allows to either store the key internally (that is, copy + * the key within the hash table) or keep it external (that is, a hook is used to extract + * the key from the data in the node). The former is more memory-hungry of course, as it + * allocated static space to store the key copies. The overhead to keep both methods at + * the same time is minimal: + *
    + *
  • There is a run-time check in node_get_key which is execute per each node visited.
    • + *
  • Theoretically, there is no memory overhead. In practice, there were no + * flags in \c struct HashTable till now, so we had to add a first bit flag, but the + * overhead will disappear if a second flag is added for a different reason later.
    • + *
  • There is a little interface overhead, since we have two different versions of + * \c ht_insert(), one with the key passed as parameter and one without, but in + * the common case (external keys) both can be used.
    • + *
+ * + * \author Giovanni Bajo + */ + +#include "hashtable.h" + +#include "cfg/cfg_hashtable.h" +#include +#include +#include //ROTL(), ROTR(); + +#include + + +typedef const void** HashNodePtr; +#define NODE_EMPTY(node) (!*(node)) +#define HT_HAS_INTERNAL_KEY(ht) (CONFIG_HT_OPTIONAL_INTERNAL_KEY && ht->flags.key_internal) + +/** For hash tables with internal keys, compute the pointer to the internal key for a given \a node. */ +INLINE uint8_t *key_internal_get_ptr(struct HashTable *ht, HashNodePtr node) +{ + uint8_t* key_buf = ht->key_data.mem; + size_t index; + + // Compute the index of the node and use it to move within the whole key buffer + index = node - &ht->mem[0]; + ASSERT(index < (size_t)(1 << ht->max_elts_log2)); + key_buf += index * (INTERNAL_KEY_MAX_LENGTH + 1); + + return key_buf; +} + + +INLINE void node_get_key(struct HashTable* ht, HashNodePtr node, const void** key, uint8_t* key_length) +{ + if (HT_HAS_INTERNAL_KEY(ht)) + { + uint8_t* k = key_internal_get_ptr(ht, node); + + // Key has its length stored in the first byte + *key_length = *k++; + *key = k; + } + else + *key = ht->key_data.hook(*node, key_length); +} + + +INLINE bool node_key_match(struct HashTable* ht, HashNodePtr node, const void* key, uint8_t key_length) +{ + const void* key2; + uint8_t key2_length; + + node_get_key(ht, node, &key2, &key2_length); + + return (key_length == key2_length && memcmp(key, key2, key_length) == 0); +} + + +static uint16_t calc_hash(const void* _key, uint8_t key_length) +{ + const char* key = (const char*)_key; + uint16_t hash = key_length; + int i; + int len = (int)key_length; + + for (i = 0; i < len; ++i) + hash = ROTL(hash, 4) ^ key[i]; + + return hash ^ (hash >> 6) ^ (hash >> 13); +} + + +static HashNodePtr perform_lookup(struct HashTable* ht, + const void* key, uint8_t key_length) +{ + uint16_t hash = calc_hash(key, key_length); + uint16_t mask = ((1 << ht->max_elts_log2) - 1); + uint16_t index = hash & mask; + uint16_t first_index = index; + uint16_t step; + HashNodePtr node; + + // Fast-path optimization: we check immediately if the current node + // is the one we were looking for, so we save the computation of the + // increment step in the common case. + node = &ht->mem[index]; + if (NODE_EMPTY(node) + || node_key_match(ht, node, key, key_length)) + return node; + + // Increment while going through the hash table in case of collision. + // This implements the double-hash technique: we use the higher part + // of the hash as a step increment instead of just going to the next + // element, to minimize the collisions. + // Notice that the number must be odd to be sure that the whole table + // is traversed. Actually MCD(table_size, step) must be 1, but + // table_size is always a power of 2, so we just ensure that step is + // never a multiple of 2. + step = (ROTR(hash, ht->max_elts_log2) & mask) | 1; + + do + { + index += step; + index &= mask; + + node = &ht->mem[index]; + if (NODE_EMPTY(node) + || node_key_match(ht, node, key, key_length)) + return node; + + // The check is done after the key compare. This actually causes + // one more compare in the case the table is full (since the first + // element was compared at the very start, and then at the end), + // but it makes faster the common path where we enter this loop + // for the first time, and index will not match first_index for + // sure. + } while (index != first_index); + + return NULL; +} + + +void ht_init(struct HashTable* ht) +{ + memset(ht->mem, 0, sizeof(ht->mem[0]) * (1 << ht->max_elts_log2)); +} + + +static bool insert(struct HashTable* ht, const void* key, uint8_t key_length, const void* data) +{ + HashNodePtr node; + + if (!data) + return false; + + if (HT_HAS_INTERNAL_KEY(ht)) + key_length = MIN(key_length, (uint8_t)INTERNAL_KEY_MAX_LENGTH); + + node = perform_lookup(ht, key, key_length); + if (!node) + return false; + + if (HT_HAS_INTERNAL_KEY(ht)) + { + uint8_t* k = key_internal_get_ptr(ht, node); + *k++ = key_length; + memcpy(k, key, key_length); + } + + *node = data; + return true; +} + + +bool ht_insert_with_key(struct HashTable* ht, const void* key, uint8_t key_length, const void* data) +{ +#ifdef _DEBUG + if (!HT_HAS_INTERNAL_KEY(ht)) + { + // Construct a fake node and use it to match the key + HashNodePtr node = &data; + if (!node_key_match(ht, node, key, key_length)) + { + ASSERT2(0, "parameter key is different from the external key"); + return false; + } + } +#endif + + return insert(ht, key, key_length, data); +} + + +bool ht_insert(struct HashTable* ht, const void* data) +{ + const void* key; + uint8_t key_length; + +#ifdef _DEBUG + if (HT_HAS_INTERNAL_KEY(ht)) + { + ASSERT("parameter cannot be a hash table with internal keys - use ht_insert_with_key()" + && 0); + return false; + } +#endif + + key = ht->key_data.hook(data, &key_length); + + return insert(ht, key, key_length, data); +} + + +const void* ht_find(struct HashTable* ht, const void* key, uint8_t key_length) +{ + HashNodePtr node; + + if (HT_HAS_INTERNAL_KEY(ht)) + key_length = MIN(key_length, (uint8_t)INTERNAL_KEY_MAX_LENGTH); + + node = perform_lookup(ht, key, key_length); + + if (!node || NODE_EMPTY(node)) + return NULL; + + return *node; +} diff --git a/bertos/struct/hashtable.h b/bertos/struct/hashtable.h new file mode 100644 index 0000000..07a514d --- /dev/null +++ b/bertos/struct/hashtable.h @@ -0,0 +1,301 @@ +/** + * \file + * + * + * \defgroup hashtable Hash table implementation + * \ingroup struct + * \{ + * + * \brief Portable hash table + * + * This file implements a portable hash table, with the following features: + * + * \li Open double-hashing. The maximum number of elements is fixed. The double hashing + * function improves recovery in case of collisions. + * \li Configurable size (which is clamped to a power of two) + * \li Visiting interface through iterator (returns the element in random order). + * \li The key is stored within the data and a hook is used to extract it. Optionally, it + * is possible to store a copy of the key within the hash table. + * + * Since the hashing is open, there is no way to remove elements from the table. Instead, a + * function is provided to clear the table completely. + * + * The data stored within the table must be a pointer. The NULL pointer is used as + * a marker for a free node, so it is invalid to store a NULL pointer in the table + * with \c ht_insert(). + * + * \author Giovanni Bajo + * + * $WIZ$ module_name = "hashtable" + * $WIZ$ module_configuration = "bertos/cfg/cfg_hashtable.h" + */ + +#ifndef STRUCT_HASHTABLE_H +#define STRUCT_HASHTABLE_H + +#include "cfg/cfg_hashtable.h" + +#include +#include +#include + +/// Maximum length of the internal key (use (2^n)-1 for slight speedup) +#define INTERNAL_KEY_MAX_LENGTH 15 + +/** + * Hook to get the key from \a data, which is an element of the hash table. The + * key must be returned together with \a key_length (in words). + */ +typedef const void *(*hook_get_key)(const void *data, uint8_t *key_length); + + +/** + * Hash table description + * + * \note This structures MUST NOT be accessed directly. Its definition is + * provided in the header file only for optimization purposes (see the rationale + * in hashtable.c). + * + * \note If new elements must be added to this list, please double check + * \c DECLARE_HASHTABLE, which requires the existing elements to be at the top. + */ +struct HashTable +{ + const void **mem; ///< Buckets of data + uint16_t max_elts_log2; ///< Log2 of the size of the table + struct { + bool key_internal : 1; ///< true if the key is copied internally + } flags; + union { + hook_get_key hook; ///< Hook to get the key + uint8_t *mem; ///< Pointer to the key memory + } key_data; +}; + + +/// Iterator to walk the hash table +typedef struct +{ + const void** pos; + const void** end; +} HashIterator; + + +/** + * Declare a hash table in the current scope + * + * \param name Variable name + * \param size Number of elements + * \param hook_gk Hook to be used to extract the key from the node + * + * \note The number of elements will be rounded down to the nearest + * power of two. + * + */ +#define DECLARE_HASHTABLE(name, size, hook_gk) \ + static const void* name##_nodes[1 << UINT32_LOG2(size)]; \ + struct HashTable name = \ + { \ + .mem = name##_nodes, \ + .max_elts_log2 = UINT32_LOG2(size), \ + .flags = { .key_internal = false }, \ + .key_data.hook = hook_gk \ + } + + +/** Exactly like \c DECLARE_HASHTABLE, but the variable will be declared as static. */ +#define DECLARE_HASHTABLE_STATIC(name, size, hook_gk) \ + enum { name##_SIZE = (1 << UINT32_LOG2(size)), }; \ + static const void* name##_nodes[name##_SIZE]; \ + static struct HashTable name = \ + { \ + .mem = name##_nodes, \ + .max_elts_log2 = UINT32_LOG2(size), \ + .flags = { .key_internal = false }, \ + .key_data.hook = hook_gk \ + } + +#if CONFIG_HT_OPTIONAL_INTERNAL_KEY + /** Declare a hash table with internal copies of the keys. This version does not + * require a hook, nor it requires the user to allocate static memory for the keys. + * It is mostly suggested for tables whose keys are computed on the fly and need + * to be stored somewhere. + */ + #define DECLARE_HASHTABLE_INTERNALKEY(name, size) \ + static uint8_t name##_keys[(1 << UINT32_LOG2(size)) * (INTERNAL_KEY_MAX_LENGTH + 1)]; \ + static const void* name##_nodes[1 << UINT32_LOG2(size)]; \ + struct HashTable name = { name##_nodes, UINT32_LOG2(size), { true }, name##_keys } + + /** Exactly like \c DECLARE_HASHTABLE_INTERNALKEY, but the variable will be declared as static. */ + #define DECLARE_HASHTABLE_INTERNALKEY_STATIC(name, size) \ + enum { name##_KEYS = ((1 << UINT32_LOG2(size)) * (INTERNAL_KEY_MAX_LENGTH + 1)), \ + name##_SIZE = (1 << UINT32_LOG2(size)), }; \ + static uint8_t name##_keys[name##_KEYS]; \ + static const void* name##_nodes[name##_SIZE]; \ + static struct HashTable name = \ + { \ + .mem = name##_nodes, \ + .max_elts_log2 = UINT32_LOG2(size), \ + .flags = { .key_internal = true }, \ + .key_data.mem = name##_keys \ + } +#endif + +/** + * Initialize (and clear) a hash table in a memory buffer. + * + * \param ht Hash table declared with \c DECLARE_HASHTABLE + * + * \note This function must be called before using the hash table. Optionally, + * it can be called later in the program to clear the hash table, + * removing all its elements. + */ +void ht_init(struct HashTable* ht); + +/** + * Insert an element into the hash table + * + * \param ht Handle of the hash table + * \param data Data to be inserted into the table + * \return true if insertion was successful, false otherwise (table is full) + * + * \note The key for the element to insert is extract from the data with + * the hook. This means that this function cannot be called for hashtables + * with internal keys. + * + * \note If an element with the same key already exists in the table, + * it will be overwritten. + * + * \note It is not allowed to store NULL in the table. If you pass NULL as data, + * the function call will fail. + */ +bool ht_insert(struct HashTable* ht, const void* data); + +/** + * Insert an element into the hash table + * + * \param ht Handle of the hash table + * \param key Key of the element + * \param key_length Length of the key in characters + * \param data Data to be inserted into the table + * \return true if insertion was successful, false otherwise (table is full) + * + * \note If this function is called for hash table with external keys, + * the key provided must be match the key that would be extracted with the + * hook, otherwise the function will fail. + * + * \note If an element with the same key already exists in the table, + * it will be overwritten. + * + * \note It is not allowed to store NULL in the table. If you pass NULL as data, + * the function call will fail. + */ +bool ht_insert_with_key(struct HashTable* ht, const void* key, uint8_t key_length, const void* data); + +/** + * Find an element in the hash table + * + * \param ht Handle of the hash table + * \param key Key of the element + * \param key_length Length of the key in characters + * \return Data of the element, or NULL if no element was found for the given key. + */ +const void* ht_find(struct HashTable* ht, const void* key, uint8_t key_length); + +/** Similar to \c ht_insert_with_key() but \a key is an ASCIIZ string */ +#define ht_insert_str(ht, key, data) ht_insert_with_key(ht, key, strlen(key), data) + +/** Similar to \c ht_find() but \a key is an ASCIIZ string */ +#define ht_find_str(ht, key) ht_find(ht, key, strlen(key)) + +/// Get an iterator to the begin of the hash table \a ht +INLINE HashIterator ht_iter_begin(struct HashTable* ht) +{ + HashIterator h; + + h.pos = &ht->mem[0]; + h.end = &ht->mem[1 << ht->max_elts_log2]; + + while (h.pos != h.end && !*h.pos) + ++h.pos; + + return h; +} + +/** + * Get an iterator to the (exclusive) end of the hash table \a ht + * + * \note Like in STL, the end iterator is not a valid iterator (you + * cannot call \c ht_iter_get() on it), and it must be used only to + * detect if we reached the end of the iteration (through \c ht_iter_cmp()). + */ +INLINE HashIterator ht_iter_end(struct HashTable* ht) +{ + HashIterator h; + + h.pos = h.end = &ht->mem[1 << ht->max_elts_log2]; + + return h; +} + +/// Compare \a it1 and \a it2 for equality +INLINE bool ht_iter_cmp(HashIterator it1, HashIterator it2) +{ + ASSERT(it1.end == it2.end); + return it1.pos == it2.pos; +} + +/// Get the element within the hash table \a ht pointed by the iterator \a iter +INLINE const void* ht_iter_get(HashIterator iter) +{ return *iter.pos; } + +/** Return an iterator pointing to the element following \a h + * + * \note The order of the elements visited during the iteration is casual, + * and depends on the implementation. + * + */ +INLINE HashIterator ht_iter_next(HashIterator h) +{ + ++h.pos; + while (h.pos != h.end && !(*h.pos)) + ++h.pos; + + return h; +} + +int hashtable_testSetup(void); +int hashtable_testRun(void); +int hashtable_testTearDown(void); + +/** \} */ // \defgroup hashtable + +#endif /* STRUCT_HASHTABLE_H */ diff --git a/bertos/struct/hashtable_test.c b/bertos/struct/hashtable_test.c new file mode 100644 index 0000000..4e5492b --- /dev/null +++ b/bertos/struct/hashtable_test.c @@ -0,0 +1,120 @@ +/** + * \file + * + * + * \brief Test hashtable module. + * + * Test the hashtable module (insertion and find). + * + * \author Andrea Righi + * + * $test$: cp bertos/cfg/cfg_hashtable.h $cfgdir/ + */ + +#include +#include +#include /* strlen() */ +#include "struct/hashtable.h" + +static const void *test_get_key(const void *ptr, uint8_t *length) +{ + const char *s = ptr; + + *length = strlen(s); + return s; +} + +#define NUM_ELEMENTS 256 +DECLARE_HASHTABLE_STATIC(hash1, NUM_ELEMENTS, test_get_key); +DECLARE_HASHTABLE_INTERNALKEY_STATIC(hash2, NUM_ELEMENTS); + +static char data[NUM_ELEMENTS][10]; +static char keydomain[] = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789"; + +static bool single_test(void) +{ + int i; + + ht_init(&hash1); + ht_init(&hash2); + + for (i = 0; i < NUM_ELEMENTS; i++) + { + int k, klen; + + klen = (i % 8) + 1; + for (k = 0; k < klen; k++) + data[i][k] = keydomain[i % (sizeof(keydomain) - 1)]; + data[i][k] = 0; + + ASSERT(ht_insert(&hash1, data[i])); + ASSERT(ht_insert_str(&hash2, data[i], data[i])); + } + for (i = 0; i < NUM_ELEMENTS; i++) + { + const char *found1, *found2; + + found1 = ht_find_str(&hash1, data[i]); + if (strcmp(found1, data[i])) + return false; + kprintf("hash1: found data[%d] = %s\n", i, found1); + + found2 = ht_find_str(&hash2, data[i]); + if (strcmp(found2, data[i])) + return false; + kprintf("hash2: found data[%d] = %s\n", i, found2); + } + return true; +} + +int hashtable_testRun(void) +{ + if (!single_test()) + { + kprintf("hashtable_test failed\n"); + return -1; + } + kprintf("hashtable_test successful\n"); + return 0; +} + +int hashtable_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int hashtable_testTearDown(void) +{ + kputs("TearDown hashtable test.\n"); + return 0; +} + +TEST_MAIN(hashtable); diff --git a/bertos/struct/heap.c b/bertos/struct/heap.c new file mode 100644 index 0000000..4c00bd7 --- /dev/null +++ b/bertos/struct/heap.c @@ -0,0 +1,258 @@ +/** + * \file + * + * + * \brief Heap subsystem (public interface). + * + * \author Bernie Innocenti + */ + +#include "heap.h" + +#include // ASSERT() +#include // memset() + +#define FREE_FILL_CODE 0xDEAD +#define ALLOC_FILL_CODE 0xBEEF + + +/* + * This function prototype is deprecated, will change in: + * void heap_init(struct Heap* h, heap_buf_t* memory, size_t size) + * in the next BeRTOS release. + */ +void heap_init(struct Heap* h, void* memory, size_t size) +{ + #ifdef _DEBUG + memset(memory, FREE_FILL_CODE, size); + #endif + + ASSERT2(((size_t)memory % alignof(heap_buf_t)) == 0, + "memory buffer is unaligned, please use the HEAP_DEFINE_BUF() macro to declare heap buffers!\n"); + + /* Initialize heap with a single big chunk */ + h->FreeList = (MemChunk *)memory; + h->FreeList->next = NULL; + h->FreeList->size = size; +} + + +void *heap_allocmem(struct Heap* h, size_t size) +{ + MemChunk *chunk, *prev; + + /* Round size up to the allocation granularity */ + size = ROUND_UP2(size, sizeof(MemChunk)); + + /* Handle allocations of 0 bytes */ + if (!size) + size = sizeof(MemChunk); + + /* Walk on the free list looking for any chunk big enough to + * fit the requested block size. + */ + for (prev = (MemChunk *)&h->FreeList, chunk = h->FreeList; + chunk; + prev = chunk, chunk = chunk->next) + { + if (chunk->size >= size) + { + if (chunk->size == size) + { + /* Just remove this chunk from the free list */ + prev->next = chunk->next; + #ifdef _DEBUG + memset(chunk, ALLOC_FILL_CODE, size); + #endif + return (void *)chunk; + } + else + { + /* Allocate from the END of an existing chunk */ + chunk->size -= size; + #ifdef _DEBUG + memset((uint8_t *)chunk + chunk->size, ALLOC_FILL_CODE, size); + #endif + return (void *)((uint8_t *)chunk + chunk->size); + } + } + } + + return NULL; /* fail */ +} + + +void heap_freemem(struct Heap* h, void *mem, size_t size) +{ + MemChunk *prev; + ASSERT(mem); + +#ifdef _DEBUG + memset(mem, FREE_FILL_CODE, size); +#endif + + /* Round size up to the allocation granularity */ + size = ROUND_UP2(size, sizeof(MemChunk)); + + /* Handle allocations of 0 bytes */ + if (!size) + size = sizeof(MemChunk); + + /* Special cases: first chunk in the free list or memory completely full */ + ASSERT((uint8_t*)mem != (uint8_t*)h->FreeList); + if (((uint8_t *)mem) < ((uint8_t *)h->FreeList) || !h->FreeList) + { + /* Insert memory block before the current free list head */ + prev = (MemChunk *)mem; + prev->next = h->FreeList; + prev->size = size; + h->FreeList = prev; + } + else /* Normal case: not the first chunk in the free list */ + { + /* + * Walk on the free list. Stop at the insertion point (when mem + * is between prev and prev->next) + */ + prev = h->FreeList; + while (prev->next < (MemChunk *)mem && prev->next) + prev = prev->next; + + /* Make sure mem is not *within* prev */ + ASSERT((uint8_t*)mem >= (uint8_t*)prev + prev->size); + + /* Should it be merged with previous block? */ + if (((uint8_t *)prev) + prev->size == ((uint8_t *)mem)) + { + /* Yes */ + prev->size += size; + } + else /* not merged with previous chunk */ + { + MemChunk *curr = (MemChunk*)mem; + + /* insert it after the previous node + * and move the 'prev' pointer forward + * for the following operations + */ + curr->next = prev->next; + curr->size = size; + prev->next = curr; + + /* Adjust for the following test */ + prev = curr; + } + } + + /* Also merge with next chunk? */ + if (((uint8_t *)prev) + prev->size == ((uint8_t *)prev->next)) + { + prev->size += prev->next->size; + prev->next = prev->next->next; + + /* There should be only one merge opportunity, becuase we always merge on free */ + ASSERT((uint8_t*)prev + prev->size != (uint8_t*)prev->next); + } +} + +/** + * Returns the number of free bytes in a heap. + * \param h the heap to check. + * + * \note The returned value is the sum of all free memory regions + * in the heap. + * Those regions are likely to be *not* contiguous, + * so a successive allocation may fail even if the + * requested amount of memory is lower than the current free space. + */ +size_t heap_freeSpace(struct Heap *h) +{ + size_t free_mem = 0; + for (MemChunk *chunk = h->FreeList; chunk; chunk = chunk->next) + free_mem += chunk->size; + + return free_mem; +} + +#if CONFIG_HEAP_MALLOC + +/** + * Standard malloc interface + */ +void *heap_malloc(struct Heap* h, size_t size) +{ + size_t *mem; + + size += sizeof(size_t); + if ((mem = (size_t*)heap_allocmem(h, size))) + *mem++ = size; + + return mem; +} + +/** + * Standard calloc interface + */ +void *heap_calloc(struct Heap* h, size_t size) +{ + void *mem; + + if ((mem = heap_malloc(h, size))) + memset(mem, 0, size); + + return mem; +} + +/** + * Free a block of memory, determining its size automatically. + * + * \param h Heap from which the block was allocated. + * \param mem Pointer to a block of memory previously allocated with + * either heap_malloc() or heap_calloc(). + * + * \note If \a mem is a NULL pointer, no operation is performed. + * + * \note Freeing the same memory block twice has undefined behavior. + * + * \note This function works like the ANSI C free(). + */ +void heap_free(struct Heap *h, void *mem) +{ + size_t *_mem = (size_t *)mem; + + if (_mem) + { + --_mem; + heap_freemem(h, _mem, *_mem); + } +} + +#endif /* CONFIG_HEAP_MALLOC */ diff --git a/bertos/struct/heap.h b/bertos/struct/heap.h new file mode 100644 index 0000000..9846079 --- /dev/null +++ b/bertos/struct/heap.h @@ -0,0 +1,125 @@ +/** + * \file + * + * + * \defgroup heap Embedded optimized memory allocator + * \ingroup core + * \{ + * + * \brief Heap subsystem (public interface). + * + * \todo Heap memory could be defined as an array of MemChunk, and used + * in this form also within the implementation. This would probably remove + * memory alignment problems, and also some aliasing issues. + * + * \author Bernie Innocenti + * + * $WIZ$ module_name = "heap" + * $WIZ$ module_configuration = "bertos/cfg/cfg_heap.h" + */ + +#ifndef STRUCT_HEAP_H +#define STRUCT_HEAP_H + +#include "cfg/cfg_heap.h" +#include +#include // IS_POW2() + +/* NOTE: struct size must be a 2's power! */ +typedef struct _MemChunk +{ + struct _MemChunk *next; + size_t size; +} MemChunk; + +STATIC_ASSERT(IS_POW2(sizeof(MemChunk))); + +typedef MemChunk heap_buf_t; + +/// A heap +typedef struct Heap +{ + struct _MemChunk *FreeList; ///< Head of the free list +} Heap; + +/** + * Utility macro to allocate a heap of size \a size. + * + * \param name Variable name for the heap. + * \param size Heap size in bytes. + */ +#define HEAP_DEFINE_BUF(name, size) \ + heap_buf_t name[((size) + sizeof(heap_buf_t) - 1) / sizeof(heap_buf_t)] + +/// Initialize \a heap within the buffer pointed by \a memory which is of \a size bytes +void heap_init(struct Heap* heap, void* memory, size_t size); + +/// Allocate a chunk of memory of \a size bytes from the heap +void *heap_allocmem(struct Heap* heap, size_t size); + +/// Free a chunk of memory of \a size bytes from the heap +void heap_freemem(struct Heap* heap, void *mem, size_t size); + +size_t heap_freeSpace(struct Heap *h); + +#define HNEW(heap, type) \ + (type*)heap_allocmem(heap, sizeof(type)) + +#define HNEWVEC(heap, type, nelem) \ + (type*)heap_allocmem(heap, sizeof(type) * (nelem)) + +#define HDELETE(heap, type, mem) \ + heap_freemem(heap, mem, sizeof(type)) + +#define HDELETEVEC(heap, type, nelem, mem) \ + heap_freemem(heap, mem, sizeof(type) * (nelem)) + + +#if CONFIG_HEAP_MALLOC + +/** + * \name Compatibility interface with C standard library + * \{ + */ +void *heap_malloc(struct Heap* heap, size_t size); +void *heap_calloc(struct Heap* heap, size_t size); +void heap_free(struct Heap* heap, void * mem); +/** \} */ + +#endif + +/** \} */ //defgroup heap + +int heap_testSetup(void); +int heap_testRun(void); +int heap_testTearDown(void); + +#endif /* STRUCT_HEAP_H */ diff --git a/bertos/struct/heap_test.c b/bertos/struct/heap_test.c new file mode 100644 index 0000000..2ce28cf --- /dev/null +++ b/bertos/struct/heap_test.c @@ -0,0 +1,123 @@ +/** + * \file + * + * + * \brief Heap test. + * + * \author Francesco Sacchi + */ + + +#include +#include + +#include +#include +#include + +#define TEST_LEN 31 +#define ALLOC_SIZE 113 + +#define TEST_LEN2 32 +#define ALLOC_SIZE2 128 + +#define HEAP_SIZE 4096 + +HEAP_DEFINE_BUF(heap_buf, HEAP_SIZE); +STATIC_ASSERT(sizeof(heap_buf) % sizeof(heap_buf_t) == 0); + +Heap h; + +int heap_testSetup(void) +{ + kdbg_init(); + heap_init(&h, heap_buf, sizeof(heap_buf)); + return 0; +} + +static void alloc_test(size_t size, size_t test_len) +{ + //Simple test + uint8_t *a[test_len]; + + for (size_t i = 0; i < test_len; i++) + { + a[i] = heap_allocmem(&h, size); + ASSERT(a[i]); + for (size_t j = 0; j < size; j++) + a[i][j] = i; + } + + ASSERT(heap_freeSpace(&h) == HEAP_SIZE - test_len * ROUND_UP2(size, sizeof(MemChunk))); + + for (size_t i = 0; i < test_len; i++) + { + for (size_t j = 0; j < size; j++) + { + kprintf("a[%d][%d] = %d\n", i, j, a[i][j]); + ASSERT(a[i][j] == i); + } + heap_freemem(&h, a[i], size); + } + ASSERT(heap_freeSpace(&h) == HEAP_SIZE); +} + +int heap_testRun(void) +{ + alloc_test(ALLOC_SIZE, TEST_LEN); + alloc_test(ALLOC_SIZE2, TEST_LEN2); + /* Try to allocate the whole heap */ + uint8_t *b = heap_allocmem(&h, HEAP_SIZE); + ASSERT(b); + ASSERT(heap_freeSpace(&h) == 0); + + ASSERT(!heap_allocmem(&h, HEAP_SIZE)); + + for (int j = 0; j < HEAP_SIZE; j++) + b[j] = j; + + for (int j = 0; j < HEAP_SIZE; j++) + { + kprintf("b[%d] = %d\n", j, j); + ASSERT(b[j] == (j & 0xff)); + } + heap_freemem(&h, b, HEAP_SIZE); + ASSERT(heap_freeSpace(&h) == HEAP_SIZE); + + return 0; +} + +int heap_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(heap); diff --git a/bertos/struct/kfile_fifo.c b/bertos/struct/kfile_fifo.c new file mode 100644 index 0000000..e35c42c --- /dev/null +++ b/bertos/struct/kfile_fifo.c @@ -0,0 +1,75 @@ +/** + * \file + * + * + * \brief KFile interface over a FIFO buffer. + * + * \author Francesco Sacchi + */ + +#include "kfile_fifo.h" +#include "fifobuf.h" + +#include + +#include + +static size_t kfilefifo_read(struct KFile *_fd, void *_buf, size_t size) +{ + KFileFifo *fd = KFILEFIFO_CAST(_fd); + uint8_t *buf = (uint8_t *)_buf; + + while (size-- && !fifo_isempty_locked(fd->fifo)) + *buf++ = fifo_pop_locked(fd->fifo); + + return buf - (uint8_t *)_buf; +} + +static size_t kfilefifo_write(struct KFile *_fd, const void *_buf, size_t size) +{ + KFileFifo *fd = KFILEFIFO_CAST(_fd); + const uint8_t *buf = (const uint8_t *)_buf; + + while (size-- && !fifo_isfull_locked(fd->fifo)) + fifo_push_locked(fd->fifo, *buf++); + + return buf - (const uint8_t *)_buf; +} + +void kfilefifo_init(KFileFifo *kf, FIFOBuffer *fifo) +{ + memset(kf, 0, sizeof(*kf)); + + kf->fifo = fifo; + kf->fd.read = kfilefifo_read; + kf->fd.write = kfilefifo_write; + DB(kf->fd._type = KFT_KFILEFIFO); +} diff --git a/bertos/struct/kfile_fifo.h b/bertos/struct/kfile_fifo.h new file mode 100644 index 0000000..fbc5d09 --- /dev/null +++ b/bertos/struct/kfile_fifo.h @@ -0,0 +1,99 @@ +/** + * \file + * + * + * \brief KFile interface over a FIFO buffer. + * + * Convenient way to push data into a FIFO using the KFile interface. + * For example, it's possible to read from a serial port and put the characters + * into a fifo: + * \code + * // serial reader process + * { + * // other stuff here... + * kfile_read(&ser_port.fd, buffer, sizeof(buffer)); + * kfile_write(&kfifo.fd, buffer, sizeof(buffer)); + * // ... + * } + * + * // controller process + * { + * //... + * kfile_read(&kfifo.fd, buffer2, sizeof(buffer2)); + * // use read data + * } + * \endcode + * + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kfilefifo" + * $WIZ$ module_depends = "kfile" + */ + +#ifndef STRUCT_KFILE_FIFO +#define STRUCT_KFILE_FIFO + +#include "fifobuf.h" +#include + +typedef struct KFileFifo +{ + KFile fd; + FIFOBuffer *fifo; +} KFileFifo; + +/** + * ID for KFile FIFO. + */ +#define KFT_KFILEFIFO MAKE_ID('F', 'I', 'F', '0') + +/** + * Convert + ASSERT from generic KFile to KFileFifo. + */ +INLINE KFileFifo * KFILEFIFO_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_KFILEFIFO); + return (KFileFifo *)fd; +} + +/** + * Initialize KFileFifo struct. + * + * \param kf Interface to initialize. + * \param fifo Fifo buffer to operate on. + */ +void kfilefifo_init(KFileFifo *kf, FIFOBuffer *fifo); + +int kfilefifo_testSetup(void); +int kfilefifo_testRun(void); +int kfilefifo_testTearDown(void); +#endif /* STRUCT_KFILE_FIFO */ diff --git a/bertos/struct/kfile_fifo_test.c b/bertos/struct/kfile_fifo_test.c new file mode 100644 index 0000000..cbd2928 --- /dev/null +++ b/bertos/struct/kfile_fifo_test.c @@ -0,0 +1,147 @@ +/** + * \file + * + * + * \brief FIFO and KFileFifo test. + * + * \author Bernie Innocenti + */ + + +#include +#include + +#include +#include +#include + + +int kfilefifo_testSetup(void) +{ + kdbg_init(); + return 0; +} + +int kfilefifo_testRun(void) +{ + #define FIFOBUF_LEN 256 + + uint8_t buf[FIFOBUF_LEN]; + + FIFOBuffer fifo; + fifo_init(&fifo, buf, sizeof(buf)); + + ASSERT(fifo_isempty(&fifo)); + ASSERT(!fifo_isfull(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isfull(&fifo)); + fifo_push(&fifo, i); + } + + ASSERT(fifo_isfull(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isempty(&fifo)); + ASSERT(fifo_pop(&fifo) == i); + } + + ASSERT(fifo_isempty(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isfull(&fifo)); + fifo_push(&fifo, i); + } + ASSERT(fifo_isfull(&fifo)); + fifo_flush(&fifo); + ASSERT(!fifo_isfull(&fifo)); + ASSERT(fifo_isempty(&fifo)); + + KFileFifo kfifo; + kfilefifo_init(&kfifo, &fifo); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isfull(&fifo)); + fifo_push(&fifo, i); + } + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + ASSERT(kfile_getc(&kfifo.fd) == i); + + ASSERT(kfile_getc(&kfifo.fd) == EOF); + ASSERT(fifo_isempty(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + ASSERT(kfile_putc(i, &kfifo.fd) == i); + + ASSERT(fifo_isfull(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + { + ASSERT(!fifo_isempty(&fifo)); + ASSERT(fifo_pop(&fifo) == i); + } + + ASSERT(fifo_isempty(&fifo)); + + for (int i = 0; i < FIFOBUF_LEN - 1; i++) + ASSERT(kfile_putc(i, &kfifo.fd) == i); + + ASSERT(fifo_isfull(&fifo)); + ASSERT(kfile_putc('a', &kfifo.fd) == EOF); + + fifo_flush(&fifo); + ASSERT(!fifo_isfull(&fifo)); + ASSERT(fifo_isempty(&fifo)); + ASSERT(kfile_getc(&kfifo.fd) == EOF); + + ASSERT(kfile_write(&kfifo.fd, "hello world", 11) == 11); + ASSERT(kfile_write(&kfifo.fd, "hello world", FIFOBUF_LEN) == FIFOBUF_LEN - 1 - 11); + + uint8_t test_buf[FIFOBUF_LEN]; + ASSERT(kfile_read(&kfifo.fd, test_buf, FIFOBUF_LEN + 20) == FIFOBUF_LEN - 1); + + ASSERT(!fifo_isfull(&fifo)); + ASSERT(fifo_isempty(&fifo)); + ASSERT(kfile_getc(&kfifo.fd) == EOF); + return 0; +} + +int kfilefifo_testTearDown(void) +{ + return 0; +} + +TEST_MAIN(kfilefifo); diff --git a/bertos/struct/kfile_mem.c b/bertos/struct/kfile_mem.c new file mode 100644 index 0000000..351e88d --- /dev/null +++ b/bertos/struct/kfile_mem.c @@ -0,0 +1,82 @@ +/** + * \file + * + * + * \brief KFile interface over a memory buffer. + * + * \author Francesco Sacchi + */ + +#include "kfile_mem.h" + +#include + +#include + +static size_t kfilemem_read(struct KFile *_fd, void *buf, size_t size) +{ + KFileMem *fd = KFILEMEM_CAST(_fd); + + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + uint8_t *mem = (uint8_t *)fd->mem; + memcpy(buf, mem + fd->fd.seek_pos, size); + fd->fd.seek_pos += size; + + return size; +} + +static size_t kfilemem_write(struct KFile *_fd, const void *buf, size_t size) +{ + KFileMem *fd = KFILEMEM_CAST(_fd); + + size = MIN((kfile_off_t)size, fd->fd.size - fd->fd.seek_pos); + uint8_t *mem = (uint8_t *)fd->mem; + memcpy(mem + fd->fd.seek_pos, buf, size); + fd->fd.seek_pos += size; + + return size; +} + +void kfilemem_init(KFileMem *km, void *mem, size_t len) +{ + ASSERT(km); + ASSERT(mem); + ASSERT(len); + + memset(km, 0, sizeof(*km)); + + km->mem = mem; + kfile_init(&km->fd); + km->fd.read = kfilemem_read; + km->fd.write = kfilemem_write; + km->fd.size = len; + DB(km->fd._type = KFT_KFILEMEM); +} diff --git a/bertos/struct/kfile_mem.h b/bertos/struct/kfile_mem.h new file mode 100644 index 0000000..b25f379 --- /dev/null +++ b/bertos/struct/kfile_mem.h @@ -0,0 +1,81 @@ +/** + * \file + * + * + * \brief KFile interface over a memory buffer. + * + * Convenient way to access a memory region using the KFile interface. + * + * + * \author Francesco Sacchi + * + * $WIZ$ module_name = "kfilemem" + * $WIZ$ module_depends = "kfile" + */ + +#ifndef STRUCT_KFILE_MEM +#define STRUCT_KFILE_MEM + +#include + +/** + * Context for KFile over memory buffer. + */ +typedef struct KFileMem +{ + KFile fd; ///< KFile base class + void *mem; ///< Pointer to the memory buffer used. +} KFileMem; + +/** + * ID for KFile Mem. + */ +#define KFT_KFILEMEM MAKE_ID('M', 'E', 'M', '0') + +/** + * Convert + ASSERT from generic KFile to KFileMem. + */ +INLINE KFileMem * KFILEMEM_CAST(KFile *fd) +{ + ASSERT(fd->_type == KFT_KFILEMEM); + return (KFileMem *)fd; +} + +/** + * Initialize KFileMem struct. + * + * \param km Interface to initialize. + * \param mem Pointer to the memory buffer to operate on. + * \param len Size of the buffer + */ +void kfilemem_init(KFileMem *km, void *mem, size_t len); + +#endif /* STRUCT_KFILE_MEM */ diff --git a/bertos/struct/list.h b/bertos/struct/list.h new file mode 100644 index 0000000..96b71b4 --- /dev/null +++ b/bertos/struct/list.h @@ -0,0 +1,410 @@ +/** + * \file + * + * + * \defgroup list General purpose lists + * \ingroup struct + * \{ + * + * \brief General pourpose double-linked lists + * + * Lists contain nodes. You can put any custom struct into any list as long + * as it has a Node struct inside it. If you make the Node struct the first + * member of your data type, you can simply cast it to (Node *) when passing + * it to list functions. + * + * Lists must be initialized before use with LIST_INIT(). You can then add + * objects using ADDHEAD() and ADDTAIL() macros, and remove them with + * list_remHead() and list_remTail(). + * + * You can create lists with priorities by using PriNode instead of Node as + * the base member struct. + * Use LIST_ENQUEUE() and LIST_ENQUEUE_HEAD() to insert a priority node into + * a list. + * + * To iterate over a list, use the macros FOREACH_NODE() and REVERSE_FOREACH_NODE() + * in this way: + * \code + * struct Foo + * { + * Node n; + * int a; + * } + * + * int main() + * { + * List foo_list; + * static Foo foo1, foo2; + * Foo *fp; + * + * LIST_INIT(&foo_list); + * ADDHEAD(&foo_list, (Node *)&foo1); + * INSERT_BEFORE(&foo_list, (Node *)&foo2); + * FOREACH_NODE(fp, &foo_list) + * fp->a = 10; + * } + * \endcode + * + * \author Bernie Innocenti + */ + +#ifndef STRUCT_LIST_H +#define STRUCT_LIST_H + +#include /* INLINE */ +#include /* ASSERT_VALID_PTR() */ + +/** + * This structure represents a node for bidirectional lists. + * + * Data is usually appended to nodes by making them the first + * field of another struture, as a poor-man's form of inheritance. + */ +typedef struct _Node +{ + struct _Node *succ; + struct _Node *pred; +} Node; + +/** + * Head of a doubly-linked list of \c Node structs. + * + * Lists must be initialized with LIST_INIT() prior to use. + * + * Nodes can be added and removed from either end of the list + * with O(1) performance. Iterating over these lists can be + * tricky: use the FOREACH_NODE() macro instead. + */ +typedef struct _List +{ + Node head; + Node tail; +} List; + +/** + * Extended node for priority queues. + */ +typedef struct _PriNode +{ + Node link; + int pri; +} PriNode; + + +/** + * Template for a naked node in a list of \a T structures. + * + * To be used as data member in other structures: + * + * \code + * struct Foo + * { + * DECLARE_NODE_ANON(struct Foo) + * int a; + * float b; + * } + * + * DECLARE_LIST_TYPE(Foo); + * + * void foo(void) + * { + * static LIST_TYPE(Foo) foo_list; + * static Foo foo1, foo2; + * Foo *fp; + * + * LIST_INIT(&foo_list); + * ADDHEAD(&foo_list, &foo1); + * INSERT_BEFORE(&foo_list, &foo2); + * FOREACH_NODE(fp, &foo_list) + * fp->a = 10; + * } + * + * \endcode + */ +#define DECLARE_NODE_ANON(T) \ + T *succ; T *pred; + +/** Declare a typesafe node for structures of type \a T. */ +#define DECLARE_NODE_TYPE(T) \ + typedef struct T##Node { T *succ; T *pred; } T##Node + +/** Template for a list of \a T structures. */ +#define DECLARE_LIST_TYPE(T) \ + DECLARE_NODE_TYPE(T); \ + typedef struct T##List { \ + T##Node head; \ + T##Node tail; \ + } T##List + +#define NODE_TYPE(T) T##Node +#define LIST_TYPE(T) T##List + +/** + * Get a pointer to the first node in a list. + * + * If \a l is empty, result points to l->tail. + */ +#define LIST_HEAD(l) ((l)->head.succ) + +/** + * Get a pointer to the last node in a list. + * + * If \a l is empty, result points to l->head. + */ +#define LIST_TAIL(l) ((l)->tail.pred) + +// TODO: move in compiler.h +#if COMPILER_TYPEOF + #define TYPEOF_OR_VOIDPTR(type) typeof(type) +#else + #define TYPEOF_OR_VOIDPTR(type) void * +#endif + +/** + * Iterate over all nodes in a list. + * + * This macro generates a "for" statement using the following parameters: + * \param n Node pointer to be used in each iteration. + * \param l Pointer to list. + */ +#define FOREACH_NODE(n, l) \ + for( \ + (n) = (TYPEOF_OR_VOIDPTR(n))LIST_HEAD(l); \ + ((Node *)(n))->succ; \ + (n) = (TYPEOF_OR_VOIDPTR(n))(((Node *)(n))->succ) \ + ) + +/** + * Iterate backwards over all nodes in a list. + * + * This macro generates a "for" statement using the following parameters: + * \param n Node pointer to be used in each iteration. + * \param l Pointer to list. + */ +#define REVERSE_FOREACH_NODE(n, l) \ + for( \ + (n) = (TYPEOF_OR_VOIDPTR(n))LIST_TAIL(l); \ + ((Node *)(n))->pred; \ + (n) = (TYPEOF_OR_VOIDPTR(n))(((Node *)(n))->pred) \ + ) + +/** + * Iterate on the list safely against node removal. + * + * This macro generates a "for" statement using the following parameters: + * \param n Node pointer to be used in each iteration. + * \param p Temporal storage for the iterator. + * \param l Pointer to list. + */ +#define FOREACH_NODE_SAFE(n, p, l) \ + for( \ + (n) = (TYPEOF_OR_VOIDPTR(n))LIST_HEAD(l), (p) = ((Node *)(n))->succ; \ + ((Node *)(n))->succ; \ + (n) = (p), (p) = (TYPEOF_OR_VOIDPTR(n))(((Node *)(n))->succ) \ + ) + +/** Initialize a list. */ +#define LIST_INIT(l) \ + do { \ + (l)->head.succ = (TYPEOF_OR_VOIDPTR((l)->head.succ)) &(l)->tail; \ + (l)->head.pred = NULL; \ + (l)->tail.succ = NULL; \ + (l)->tail.pred = (TYPEOF_OR_VOIDPTR((l)->tail.pred)) &(l)->head; \ + } while (0) + +#ifdef _DEBUG + /** Make sure that a list is valid (it was initialized and is not corrupted). */ + #define LIST_ASSERT_VALID(l) \ + do { \ + Node *n, *pred; \ + ASSERT((l)->head.succ != NULL); \ + ASSERT((l)->head.pred == NULL); \ + ASSERT((l)->tail.succ == NULL); \ + ASSERT((l)->tail.pred != NULL); \ + pred = &(l)->head; \ + FOREACH_NODE(n, l) \ + { \ + ASSERT(n->pred == pred); \ + pred = n; \ + } \ + ASSERT(n == &(l)->tail); \ + } while (0) + + /// Checks that a node isn't part of a given list + #define LIST_ASSERT_NOT_CONTAINS(list,node) \ + do { \ + Node *ln; \ + ASSERT_VALID_PTR(list); \ + ASSERT_VALID_PTR(node); \ + FOREACH_NODE(ln, list) \ + ASSERT(ln != (Node *)(node)); \ + } while (0) + + #define INVALIDATE_NODE(n) ((n)->succ = (n)->pred = NULL) +#else + #define LIST_ASSERT_VALID(l) do {} while (0) + #define LIST_ASSERT_NOT_CONTAINS(list,node) do {} while (0) + #define INVALIDATE_NODE(n) do {} while (0) +#endif + +/** Tell whether a list is empty. */ +#define LIST_EMPTY(l) ( (void *)((l)->head.succ) == (void *)(&(l)->tail) ) + +/** Add node to list head. */ +#define ADDHEAD(l,n) \ + do { \ + LIST_ASSERT_NOT_CONTAINS((l),(n)); \ + (n)->succ = (l)->head.succ; \ + (n)->pred = (l)->head.succ->pred; \ + (n)->succ->pred = (n); \ + (n)->pred->succ = (n); \ + } while (0) + +/** Add node to list tail. */ +#define ADDTAIL(l,n) \ + do { \ + LIST_ASSERT_NOT_CONTAINS((l),(n)); \ + (n)->succ = &(l)->tail; \ + (n)->pred = (l)->tail.pred; \ + (n)->pred->succ = (n); \ + (l)->tail.pred = (n); \ + } while (0) + +/** + * Insert node \a n before node \a ln. + * + * \note You can't pass in a list header as \a ln, but + * it is safe to pass list-\>head of an empty list. + */ +#define INSERT_BEFORE(n,ln) \ + do { \ + ASSERT_VALID_PTR(n); \ + ASSERT_VALID_PTR(ln); \ + (n)->succ = (ln); \ + (n)->pred = (ln)->pred; \ + (ln)->pred->succ = (n); \ + (ln)->pred = (n); \ + } while (0) + +/** + * Remove \a n from whatever list it is in. + * + * \note Removing a node that has not previously been + * inserted into a list invokes undefined behavior. + */ +#define REMOVE(n) \ + do { \ + ASSERT_VALID_PTR(n); \ + (n)->pred->succ = (n)->succ; \ + (n)->succ->pred = (n)->pred; \ + INVALIDATE_NODE(n); \ + } while (0) + +/** + * Insert a priority node in a priority queue. + * + * The new node is inserted immediately before the first node with the same + * priority or appended to the tail if no such node exists. + */ +#define LIST_ENQUEUE_HEAD(list, node) \ + do { \ + PriNode *ln; \ + LIST_ASSERT_NOT_CONTAINS((list),(node)); \ + FOREACH_NODE(ln, (list)) \ + if (ln->pri <= (node)->pri) \ + break; \ + INSERT_BEFORE(&(node)->link, &ln->link); \ + } while (0) + +/** + * Insert a priority node in a priority queue. + * + * The new node is inserted immediately before the first node with lower + * priority or appended to the tail if no such node exists. + */ +#define LIST_ENQUEUE(list, node) \ + do { \ + PriNode *ln; \ + LIST_ASSERT_NOT_CONTAINS((list),(node)); \ + FOREACH_NODE(ln, (list)) \ + if (ln->pri < (node)->pri) \ + break; \ + INSERT_BEFORE(&(node)->link, &ln->link); \ + } while (0) + + +/** + * Unlink a node from the head of the list \a l. + * + * \return Pointer to node, or NULL if the list was empty. + */ +INLINE Node *list_remHead(List *l) +{ + Node *n; + + ASSERT_VALID_PTR(l); + + if (LIST_EMPTY(l)) + return (Node *)0; + + n = l->head.succ; /* Get first node. */ + l->head.succ = n->succ; /* Link list head to second node. */ + n->succ->pred = &l->head; /* Link second node to list head. */ + + INVALIDATE_NODE(n); + return n; +} + +/** + * Unlink a node from the tail of the list \a l. + * + * \return Pointer to node, or NULL if the list was empty. + */ +INLINE Node *list_remTail(List *l) +{ + Node *n; + + ASSERT_VALID_PTR(l); + + if (LIST_EMPTY(l)) + return NULL; + + n = l->tail.pred; /* Get last node. */ + l->tail.pred = n->pred; /* Link list tail to second last node. */ + n->pred->succ = &l->tail; /* Link second last node to list tail. */ + + INVALIDATE_NODE(n); + return n; +} + +/** \} */ //defgroup list + +#endif /* STRUCT_LIST_H */ diff --git a/bertos/struct/pool.h b/bertos/struct/pool.h new file mode 100644 index 0000000..9bf4535 --- /dev/null +++ b/bertos/struct/pool.h @@ -0,0 +1,177 @@ +/** + * \file + * + * + * \defgroup pool Pool memory allocator + * \ingroup struct + * \{ + * + * \brief Pool macros. + * + * The pool module provides the boilerplate code to create a set of objects + * of the same type. + * It provides an interface similar to the heap module, with pool_alloc() and + * pool_free() functions that allocate and free an element respectively. + * In contrast with the heap module, you can specify exactly the number of + * items that you want to be in the pool. + * + * Items in the pool must be a derived class of Node *, which also + * means that they can be used as-is with list containers, eg. MsgPort. + * + * Example code: + * \code + * typedef struct MyType + * { + * Node *n; + * uint16_t *buf; + * // other members here... + * } MyType; + * + * DECLARE_POOL(mypool, MyType, POOL_SIZE); + * + * static void elem_init(MyType *e) + * { + * e->buf = NULL; + * // other initializations here + * } + * + * int main(void) + * { + * pool_init(&mypool, elem_init); + * + * MyType *foo = pool_alloc(&mypool); + * // do stuff with foo + * pool_free(&mypool, foo); + * } + * \endcode + * + * \author Giovanni Bajo + * \author Luca Ottaviano + */ + +#ifndef STRUCT_POOL_H +#define STRUCT_POOL_H + +#include +#include + +/** + * \brief Extern pool declaration + */ +#define EXTERN_POOL(name) \ + extern List name + +#define DECLARE_POOL_WITH_STORAGE(name, type, num, storage) \ + static type name##_items[num]; \ + storage name; \ + INLINE void name##_init(void (*init_func)(type*)) \ + { \ + size_t i; \ + LIST_INIT(&name); \ + for (i=0;iNode * + * type. + * + * \param name Variable name of the pool. + * \param type Data type held by the pool. + * \param num Number of elements in pool. + */ +#define DECLARE_POOL(name, type, num) \ + DECLARE_POOL_WITH_STORAGE(name, type, num, List) + +/** + * \brief Static Pool declaration + * + * \sa DECLARE_POOL + */ +#define DECLARE_POOL_STATIC(name, type, num) \ + DECLARE_POOL_WITH_STORAGE(name, type, num, static List) + +/** + * Initialize the pool \a name, calling \a init_func on each element. + * + * The init function must have the following prototype: + * \code + * void init_func(type *) + * \endcode + * where \a type is the type of objects held in the pool. + * + * \param name Pool to initialize + * \param init_func Init function to be called on each element + */ +#define pool_init(name, init_func) (*(name##_init))(init_func) + +/** + * \brief Allocate an element from the pool. + * + * The returned element is of type Node *, it's safe to + * cast it to the type contained in the pool. + * + * \note If the element was recycled with pool_free(), it will not be reset, + * so don't assume that the element has specific values. + * + * \param name Pointer to pool to alloc from. + * \return Element of the type present in the pool. + */ +#define pool_alloc(name) list_remHead(name) + +/** + * \brief Recycle an element into the pool + * + * \note Element fields are not reset to its original values, keep that in + * mind when you alloc nodes. + * + * \param name Pointer to pool where the node should be recycled. + * \param elem Element to be recycled. + */ +#define pool_free(name, elem) ADDHEAD(name, (Node*)elem) + +/** + * \brief Test if the pool is empty + * + * \param name Pointer to pool. + * \return True if the pool is empty, false otherwise. + */ +#define pool_empty(name) LIST_EMPTY(name) + + /** \} */ /* defgroup pool */ + +#endif /* STRUCT_POOL_H */ diff --git a/bertos/verstag.c b/bertos/verstag.c new file mode 100644 index 0000000..2405dd7 --- /dev/null +++ b/bertos/verstag.c @@ -0,0 +1,50 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Define application version strings + */ +#include + +/* + * "buildrev.h" is auto-generated by the build infrastructure, + * incrementing VERS_BUILD each time the project is rebuilt. + */ +#include "buildrev.h" + +const char vers_tag[] = VERS_TAG; +const char vers_build_str[] = _STRINGIZE(VERS_BUILD); +const char vers_host[] = VERS_HOST; +const int vers_build_nr = VERS_BUILD; + diff --git a/bertos/verstag.h b/bertos/verstag.h new file mode 100644 index 0000000..0287190 --- /dev/null +++ b/bertos/verstag.h @@ -0,0 +1,105 @@ +/** + * \file + * + * + * + * \author Bernie Innocenti + * + * \brief Declare application version strings + */ + + +#ifndef BERTOS_VERSTAG_H +#define BERTOS_VERSTAG_H + +#ifndef CFG_ARCH_CONFIG_H + #include "cfg/cfg_arch.h" +#endif + +#define APP_NAME "Appname" +#define APP_DESCRIPTION "Long application name description" +#define APP_AUTHOR "Develer" +#define APP_COPYRIGHT "Copyright 2009 Develer (http://www.develer.com/)" + + +#if ARCH & ARCH_DEFAULT + #define VERS_MAJOR 0 + #define VERS_MINOR 1 + #define VERS_REV 0 + #define VERS_LETTER "" +#elif ARCH & ARCH_NIGHTTEST + #define VERS_MAJOR 0 + #define VERS_MINOR 1 + #define VERS_REV 0 + #define VERS_LETTER "" +#else + #error unknown architecture +#endif + +/** + * If _SNAPSHOT is defined, \c VERS_TAG contains the build date + * date instead of a numeric version string. + */ +#define _SNAPSHOT + +#ifdef _DEBUG + #define VERS_DBG "D" +#else + #define VERS_DBG "" +#endif + +#define __STRINGIZE(x) #x +#define _STRINGIZE(x) __STRINGIZE(x) + +/** Build application version string (i.e.: "1.7.0") */ +#define MAKE_VERS(maj,min,rev) _STRINGIZE(maj) "." _STRINGIZE(min) "." _STRINGIZE(rev) VERS_LETTER VERS_DBG +#ifdef _SNAPSHOT + #define VERS_TAG "snapshot" " " __DATE__ " " __TIME__ " " VERS_LETTER " " VERS_DBG +#else + #define VERS_TAG MAKE_VERS(VERS_MAJOR,VERS_MINOR,VERS_REV) +#endif + +/** Build application version string suitable for MS windows resource files (i.e.: "1, 7, 0, 1") */ +#define MAKE_RCVERS(maj,min,rev,bld) _STRINGIZE(maj) ", " _STRINGIZE(min) ", " _STRINGIZE(rev) ", " _STRINGIZE(bld) +#define RCVERSION_TAG MAKE_VERS(VERS_MAJOR,VERS_MINOR,VERS_REV) + +/** The revision string (contains VERS_TAG) */ +extern const char vers_tag[]; + +/** Sequential build number (contains VERS_BUILD) */ +extern const int vers_build_nr; +//extern const char vers_build_str[]; + +/** Hostname of the machine used to build this binary (contains VERS_HOST) */ +extern const char vers_host[]; + +#endif /* BERTOS_VERSTAG_H */ diff --git a/buildrev.h b/buildrev.h new file mode 100644 index 0000000..bfcf5a8 --- /dev/null +++ b/buildrev.h @@ -0,0 +1,2 @@ +#define VERS_BUILD 5 +#define VERS_HOST "vixen" diff --git a/flash b/flash new file mode 100755 index 0000000..f0e8e15 --- /dev/null +++ b/flash @@ -0,0 +1,2 @@ +#!/bin/bash +avrdude -p m328p -c arduino -P /dev/ttyACM$1 -b 115200 -F -U flash:w:images/Modem.hex diff --git a/project.bertos b/project.bertos new file mode 100644 index 0000000..ce40f8b --- /dev/null +++ b/project.bertos @@ -0,0 +1,64 @@ +(dp0 +S'BERTOS_PATH' +p1 +S'.' +p2 +sS'SELECTED_FREQ' +p3 +V16000000 +p4 +sS'WIZARD_VERSION' +p5 +I4 +sS'PROJECT_NAME' +p6 +VModem +p7 +sS'TOOLCHAIN' +p8 +(dp9 +S'path' +p10 +V/usr/bin/avr-gcc +p11 +ssS'PROJECT_HW_PATH_FROM_MAKEFILE' +p12 +g7 +sS'ENABLED_MODULES' +p13 +(lp14 +S'debug' +p15 +aS'formatwr' +p16 +aS'heap' +p17 +aS'kfile' +p18 +aS'ser' +p19 +aS'timer' +p20 +asS'CPU_NAME' +p21 +VATmega328P +p22 +sS'PROJECT_HW_PATH' +p23 +VModem +p24 +sS'PROJECT_SRC_PATH' +p25 +VModem +p26 +sS'PRESET' +p27 +NsS'PROJECT_SRC_PATH_FROM_MAKEFILE' +p28 +g7 +sS'OUTPUT' +p29 +(lp30 +S'codelite' +p31 +as. \ No newline at end of file