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Mark Qvist
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336
bertos/cpu/arm/drv/i2c_lpc2.c
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336
bertos/cpu/arm/drv/i2c_lpc2.c
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/**
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* \file
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* <!--
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* This file is part of BeRTOS.
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*
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* Bertos is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*
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* As a special exception, you may use this file as part of a free software
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* library without restriction. Specifically, if other files instantiate
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* templates or use macros or inline functions from this file, or you compile
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* this file and link it with other files to produce an executable, this
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* file does not by itself cause the resulting executable to be covered by
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* the GNU General Public License. This exception does not however
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* invalidate any other reasons why the executable file might be covered by
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* the GNU General Public License.
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*
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* Copyright 2010 Develer S.r.l. (http://www.develer.com/)
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*
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* -->
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*
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* \brief Driver for the LPC23xx I2C (implementation)
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*
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* \author Daniele Basile <asterix@develer.com>
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*/
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#include "cfg/cfg_i2c.h"
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#define LOG_LEVEL I2C_LOG_LEVEL
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#define LOG_FORMAT I2C_LOG_FORMAT
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#include <cfg/log.h>
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#include <cfg/debug.h>
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#include <cfg/macros.h> // BV()
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#include <cpu/detect.h>
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#include <cpu/irq.h>
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#include <cpu/power.h>
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#include <drv/timer.h>
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#include <drv/i2c.h>
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#include <io/lpc23xx.h>
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struct I2cHardware
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{
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uint32_t base;
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uint32_t pconp;
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uint32_t pinsel_port;
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uint32_t pinsel;
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uint32_t pinsel_mask;
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uint32_t pclksel;
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uint32_t pclk_mask;
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uint32_t pclk_div;
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};
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/*
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* Wait that SI bit is set.
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*
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* Note: this bit is set when the I2C state changes. However, entering
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* state F8 does not set SI since there is nothing for an interrupt service
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* routine to do in that case.
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*/
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#define WAIT_SI(i2c) \
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do { \
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ticks_t start = timer_clock(); \
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while( !(HWREG(i2c->hw->base + I2C_CONSET_OFF) & BV(I2CON_SI)) ) \
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{ \
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if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT)) \
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{ \
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LOG_ERR("Timeout SI assert\n"); \
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LOG_ERR("[%08lx]\n", HWREG(i2c->hw->base + I2C_STAT_OFF)); \
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break; \
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} \
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cpu_relax(); \
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} \
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} while (0)
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static void i2c_hw_restart(I2c *i2c)
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{
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// Clear all pending flags.
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HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
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// Set start and ack bit.
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HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STA);
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WAIT_SI(i2c);
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}
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static void i2c_hw_stop(I2c *i2c)
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{
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/* Set the stop bit */
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HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_STO);
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/* Clear pending flags */
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HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
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}
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static void i2c_lpc2_putc(I2c *i2c, uint8_t data)
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{
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HWREG(i2c->hw->base + I2C_DAT_OFF) = data;
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HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
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WAIT_SI(i2c);
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uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
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/* Generate the stop if we finish to send all programmed bytes */
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if (i2c->xfer_size == 1)
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{
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if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
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i2c_hw_stop(i2c);
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}
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if (status == I2C_STAT_DATA_NACK)
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{
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LOG_ERR("Data NACK\n");
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i2c->errors |= I2C_NO_ACK;
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i2c_hw_stop(i2c);
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}
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else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
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{
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LOG_ERR("I2C error.\n");
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i2c->errors |= I2C_ERR;
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i2c_hw_stop(i2c);
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}
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}
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static uint8_t i2c_lpc2_getc(I2c *i2c)
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{
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/*
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* Set ack bit if we want read more byte, otherwise
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* we disable it
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*/
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if (i2c->xfer_size > 1)
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HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_AA);
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else
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HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_AAC);
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HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC);
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WAIT_SI(i2c);
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uint32_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
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uint8_t data = (uint8_t)HWREG(i2c->hw->base + I2C_DAT_OFF);
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if (status == I2C_STAT_RDATA_ACK)
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{
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return data;
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}
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else if (status == I2C_STAT_RDATA_NACK)
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{
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/*
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* last byte to read generate the stop if
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* required
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*/
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if (I2C_TEST_STOP(i2c->flags) == I2C_STOP)
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i2c_hw_stop(i2c);
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return data;
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}
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else if ((status == I2C_STAT_ERROR) || (status == I2C_STAT_UNKNOW))
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{
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LOG_ERR("I2C error.\n");
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i2c->errors |= I2C_ERR;
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i2c_hw_stop(i2c);
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}
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return 0xFF;
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}
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static void i2c_lpc2_start(struct I2c *i2c, uint16_t slave_addr)
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{
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if (I2C_TEST_START(i2c->flags) == I2C_START_W)
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{
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ticks_t start = timer_clock();
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while (true)
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{
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i2c_hw_restart(i2c);
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uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
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/* Start status ok, set addres and the R/W bit */
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if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
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HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr & ~I2C_READBIT;
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/* Clear the start bit and clear the SI bit */
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HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
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if (status == I2C_STAT_SLAW_ACK)
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break;
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if (status == I2C_STAT_ARB_LOST)
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{
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LOG_ERR("Arbitration lost\n");
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i2c->errors |= I2C_ARB_LOST;
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i2c_hw_stop(i2c);
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}
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if (timer_clock() - start > ms_to_ticks(CONFIG_I2C_START_TIMEOUT))
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{
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LOG_ERR("Timeout on I2C START\n");
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i2c->errors |= I2C_NO_ACK;
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i2c_hw_stop(i2c);
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break;
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}
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}
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}
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else if (I2C_TEST_START(i2c->flags) == I2C_START_R)
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{
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i2c_hw_restart(i2c);
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uint8_t status = HWREG(i2c->hw->base + I2C_STAT_OFF);
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/* Start status ok, set addres and the R/W bit */
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if ((status == I2C_STAT_SEND) || (status == I2C_STAT_RESEND))
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HWREG(i2c->hw->base + I2C_DAT_OFF) = slave_addr | I2C_READBIT;
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/* Clear the start bit and clear the SI bit */
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HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_SIC) | BV(I2CON_STAC);
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WAIT_SI(i2c);
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status = HWREG(i2c->hw->base + I2C_STAT_OFF);
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if (status == I2C_STAT_SLAR_NACK)
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{
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LOG_ERR("SLAR NACK:%02x\n", status);
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i2c->errors |= I2C_NO_ACK;
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i2c_hw_stop(i2c);
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}
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if (status == I2C_STAT_ARB_LOST)
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{
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LOG_ERR("Arbitration lost\n");
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i2c->errors |= I2C_ARB_LOST;
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i2c_hw_stop(i2c);
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}
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}
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else
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{
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ASSERT(0);
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}
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}
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static const I2cVT i2c_lpc_vt =
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{
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.start = i2c_lpc2_start,
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.getc = i2c_lpc2_getc,
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.putc = i2c_lpc2_putc,
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.write = i2c_genericWrite,
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.read = i2c_genericRead,
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};
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static struct I2cHardware i2c_lpc2_hw[] =
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{
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{ /* I2C0 */
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.base = I2C0_BASE_ADDR,
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.pconp = BV(PCONP_PCI2C0),
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.pinsel_port = PINSEL1_OFF,
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.pinsel = I2C0_PINSEL,
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.pinsel_mask = I2C0_PINSEL_MASK,
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.pclksel = PCLKSEL0_OFF,
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.pclk_mask = I2C0_PCLK_MASK,
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.pclk_div = I2C0_PCLK_DIV8,
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},
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{ /* I2C1 */
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.base = I2C1_BASE_ADDR,
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.pconp = BV(PCONP_PCI2C1),
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.pinsel_port = PINSEL0_OFF,
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.pinsel = I2C1_PINSEL,
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.pinsel_mask = I2C1_PINSEL_MASK,
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.pclksel = PCLKSEL1_OFF,
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.pclk_mask = I2C1_PCLK_MASK,
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.pclk_div = I2C1_PCLK_DIV8,
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},
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{ /* I2C2 */
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.base = I2C2_BASE_ADDR,
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.pconp = BV(PCONP_PCI2C2),
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.pinsel_port = PINSEL0_OFF,
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.pinsel = I2C2_PINSEL,
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.pinsel_mask = I2C2_PINSEL_MASK,
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.pclksel = PCLKSEL1_OFF,
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.pclk_mask = I2C2_PCLK_MASK,
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.pclk_div = I2C2_PCLK_DIV8,
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},
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};
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/**
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* Initialize I2C module.
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*/
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void i2c_hw_init(I2c *i2c, int dev, uint32_t clock)
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{
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i2c->hw = &i2c_lpc2_hw[dev];
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i2c->vt = &i2c_lpc_vt;
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/* Enable I2C clock */
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PCONP |= i2c->hw->pconp;
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ASSERT(clock <= 400000);
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HWREG(i2c->hw->base + I2C_CONCLR_OFF) = BV(I2CON_I2ENC) | BV(I2CON_STAC) | BV(I2CON_SIC) | BV(I2CON_AAC);
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/*
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* Bit Frequency = Fplk / (I2C_I2SCLH + I2C_I2SCLL)
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* value of I2SCLH and I2SCLL must be different
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*/
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HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) &= ~i2c->hw->pclk_mask;
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HWREG(SCB_BASE_ADDR + i2c->hw->pclksel) |= i2c->hw->pclk_div;
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HWREG(i2c->hw->base + I2C_SCLH_OFF) = (((CPU_FREQ / 8) / clock) / 2) + 1;
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HWREG(i2c->hw->base + I2C_SCLL_OFF) = (((CPU_FREQ / 8) / clock) / 2);
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ASSERT(HWREG(i2c->hw->base + I2C_SCLH_OFF) > 4);
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ASSERT(HWREG(i2c->hw->base + I2C_SCLL_OFF) > 4);
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/* Assign pins to SCL and SDA */
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HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) &= ~i2c->hw->pinsel_mask;
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HWREG(PINSEL_BASE_ADDR + i2c->hw->pinsel_port) |= i2c->hw->pinsel;
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// Enable I2C
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HWREG(i2c->hw->base + I2C_CONSET_OFF) = BV(I2CON_I2EN);
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}
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