mirror of
https://github.com/Divested-Mobile/DivestOS-Build.git
synced 2024-12-20 21:34:24 -05:00
425 lines
21 KiB
Diff
425 lines
21 KiB
Diff
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From e6fbf9568b5cfa91d9aa1006da1a799bd34f0c8f Mon Sep 17 00:00:00 2001
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From: flar2 <asegaert@gmail.com>
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Date: Tue, 3 Nov 2015 23:24:01 -0500
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Subject: [PATCH] msm8994 overclocking
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---
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arch/arm/boot/dts/qcom/msm8994-regulator.dtsi | 172 +++++++++++++-------------
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arch/arm/boot/dts/qcom/msm8994-v2.dtsi | 40 ++++--
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drivers/clk/qcom/clock-cpu-8994.c | 8 +-
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3 files changed, 122 insertions(+), 98 deletions(-)
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diff --git a/arch/arm/boot/dts/qcom/msm8994-regulator.dtsi b/arch/arm/boot/dts/qcom/msm8994-regulator.dtsi
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index 93c9c647d9b..c245a55182f 100644
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--- a/arch/arm/boot/dts/qcom/msm8994-regulator.dtsi
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+++ b/arch/arm/boot/dts/qcom/msm8994-regulator.dtsi
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@@ -606,7 +606,7 @@
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regulator-name = "apc0_corner";
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qcom,cpr-fuse-corners = <4>;
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regulator-min-microvolt = <1>;
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- regulator-max-microvolt = <13>;
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+ regulator-max-microvolt = <15>;
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qcom,cpr-voltage-ceiling = <900000 900000 1000000 1180000>;
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qcom,cpr-voltage-floor = <700000 700000 780000 835000>;
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@@ -666,17 +666,17 @@
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qcom,cpr-init-voltage-ref = <800000 900000 1000000 1225000>;
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qcom,cpr-init-voltage-step = <10000>;
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- qcom,cpr-corner-map = <1 2 2 2 3 3 3 4 4 4 4 4 4>;
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+ qcom,cpr-corner-map = <1 2 2 2 3 3 3 4 4 4 4 4 4 4 4>;
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qcom,cpr-voltage-ceiling-override =
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<0xFFFFFFFF 0 900000 900000 900000 900000
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1000000 1000000 1000000 1115000
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1115000 1180000 1180000 1180000
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- 1180000>;
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+ 1180000 1180000 1180000>;
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qcom,cpr-voltage-floor-override =
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<0xFFFFFFFF 0 700000 700000 700000 725000
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780000 800000 825000 835000
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850000 915000 970000 980000
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- 1000000>;
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+ 1000000 1000000 1000000>;
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qcom,cpr-fuse-version-map =
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<0xffffffff 0xffffffff 1 0 0 0 0>,
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@@ -716,9 +716,11 @@
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<10 1248000000>,
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<11 1344000000>,
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<12 1478400000>,
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- <13 1555200000>;
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+ <13 1555200000>,
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+ <14 1632000000>,
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+ <15 1708800000>;
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qcom,cpr-speed-bin-max-corners =
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- <0xFFFFFFFF 0 1 4 7 13>;
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+ <0xFFFFFFFF 0 1 4 7 15>;
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qcom,cpr-enable;
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};
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@@ -730,7 +732,7 @@
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regulator-name = "apc1_corner";
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qcom,cpr-fuse-corners = <4>;
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regulator-min-microvolt = <1>;
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- regulator-max-microvolt = <17>;
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+ regulator-max-microvolt = <19>;
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qcom,cpr-voltage-ceiling = <900000 900000 1000000 1225000>;
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qcom,cpr-voltage-floor = <700000 700000 750000 835000>;
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@@ -792,25 +794,25 @@
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qcom,cpr-init-voltage-ref = <900000 900000 1000000 1225000>;
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qcom,cpr-init-voltage-step = <10000>;
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- qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4 4 4>;
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+ qcom,cpr-corner-map = <1 2 2 2 2 3 3 3 4 4 4 4 4 4 4 4 4 4 4>;
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qcom,cpr-voltage-ceiling-override =
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<0 0 900000 900000 900000 900000 900000
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1000000 1000000 1000000 1160000 1160000
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1160000 1160000 1160000 1225000 1225000
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- 1225000 1225000>,
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+ 1225000 1225000 1225000 1225000>,
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<1 0 900000 900000 900000 900000 900000
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1000000 1000000 1000000 1160000 1160000
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1160000 1160000 1160000 1225000 1225000
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- 1225000 1225000>;
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+ 1225000 1225000 1225000 1225000>;
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qcom,cpr-voltage-floor-override =
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<0 0 700000 700000 700000 700000 725000
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750000 775000 795000 835000 860000
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880000 895000 915000 935000 945000
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- 950000 980000>,
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+ 950000 980000 980000 980000>,
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<1 0 700000 700000 700000 700000 725000
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750000 775000 795000 835000 860000
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880000 895000 915000 935000 945000
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- 950000 980000>;
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+ 950000 980000 980000 980000>;
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qcom,cpr-fuse-version-map =
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<0 0xffffffff 1 6 6 6 6>,
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@@ -848,90 +850,90 @@
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qcom,cpr-cpus = <&CPU4 &CPU5 &CPU6 &CPU7>;
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qcom,cpr-online-cpu-virtual-corner-init-voltage-adjustment =
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/* 1st fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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/* 2nd fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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/* 3rd fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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/* 4th fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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/* 5th fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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/* 6th fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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/* 7th fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) >, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) >, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10000) (-10000) (-10000) (-15000) (-15000) (-20000) 0 (-20000) (-30000) (-30000) (-30000) >, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-5000) (-5000) (-5000) (-5000) (-5000) (-10000) 0 (-10000) (-10000) (-10000) (-10000) >, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */
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qcom,cpr-online-cpu-virtual-corner-quotient-adjustment =
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/* 1st fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6)>, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18) (-18) (-18)>, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18) (-18) (-18)>, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6) (-6) (-6)>, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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/* 2nd fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18)>, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6)>, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18) (-18) (-18)>, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-6) (-6) (-6) (-9) (-9) (-12) 0 (-12) (-18) (-18) (-18)>, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-3) (-3) (-3) (-3) (-3) (-6) 0 (-6) (-6) (-6) (-6)>, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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/* 3rd fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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/* 4th fuse version tuple matched */
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- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */
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- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */
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- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
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- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */
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+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */
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||
|
+ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
|
||
|
/* 5th fuse version tuple matched */
|
||
|
- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
|
||
|
/* 6th fuse version tuple matched */
|
||
|
- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 4 CPUs online */
|
||
|
/* 7th fuse version tuple matched */
|
||
|
- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 0 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63)>, /* 1 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21)>, /* 2 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
|
||
|
- <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 0 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 (-21) (-21) (-21) (-31) (-31) (-42) 0 (-42) (-63) (-63) (-63)>, /* 1 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 (-10) (-10) (-10) (-10) (-10) (-21) 0 (-21) (-21) (-21) (-21)>, /* 2 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>, /* 3 CPUs online */
|
||
|
+ <0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0>; /* 4 CPUs online */
|
||
|
|
||
|
qcom,cpr-online-cpu-init-voltage-as-ceiling;
|
||
|
qcom,cpr-voltage-scaling-factor-max = <0 0 2000 2000>;
|
||
|
@@ -953,9 +955,11 @@
|
||
|
<14 1728000000>,
|
||
|
<15 1766400000>,
|
||
|
<16 1824000000>,
|
||
|
- <17 1958400000>;
|
||
|
+ <17 1958400000>,
|
||
|
+ <18 2016000000>,
|
||
|
+ <19 2054400000>;
|
||
|
qcom,cpr-speed-bin-max-corners =
|
||
|
- <0 0 1 5 8 17>,
|
||
|
+ <0 0 1 5 8 19>,
|
||
|
<1 0 1 5 8 15>;
|
||
|
qcom,cpr-enable;
|
||
|
};
|
||
|
diff --git a/arch/arm/boot/dts/qcom/msm8994-v2.dtsi b/arch/arm/boot/dts/qcom/msm8994-v2.dtsi
|
||
|
index add83045413..3fea4251dfc 100644
|
||
|
--- a/arch/arm/boot/dts/qcom/msm8994-v2.dtsi
|
||
|
+++ b/arch/arm/boot/dts/qcom/msm8994-v2.dtsi
|
||
|
@@ -83,7 +83,9 @@
|
||
|
< 1248000000 10>,
|
||
|
< 1344000000 11>,
|
||
|
< 1478400000 12>,
|
||
|
- < 1555200000 13>;
|
||
|
+ < 1555200000 13>,
|
||
|
+ < 1632000000 14>,
|
||
|
+ < 1708800000 15>;
|
||
|
qcom,a57-speedbin0-v0 =
|
||
|
< 0 0>,
|
||
|
< 384000000 5>,
|
||
|
@@ -99,7 +101,9 @@
|
||
|
< 1632000000 13>,
|
||
|
< 1728000000 14>,
|
||
|
< 1824000000 16>,
|
||
|
- < 1958400000 17>;
|
||
|
+ < 1958400000 17>,
|
||
|
+ < 2016000000 18>,
|
||
|
+ < 2054400000 19>;
|
||
|
qcom,a57-speedbin1-v0 =
|
||
|
< 0 0>,
|
||
|
< 384000000 5>,
|
||
|
@@ -146,7 +150,9 @@
|
||
|
< 1248000 >,
|
||
|
< 1344000 >,
|
||
|
< 1478400 >,
|
||
|
- < 1555200 >;
|
||
|
+ < 1555200 >,
|
||
|
+ < 1632000 >,
|
||
|
+ < 1708800 >;
|
||
|
|
||
|
qcom,cpufreq-table-4 =
|
||
|
< 384000 >,
|
||
|
@@ -162,7 +168,9 @@
|
||
|
< 1632000 >,
|
||
|
< 1728000 >,
|
||
|
< 1824000 >,
|
||
|
- < 1958400 >;
|
||
|
+ < 1958400 >,
|
||
|
+ < 2016000 >,
|
||
|
+ < 2054400 >;
|
||
|
};
|
||
|
|
||
|
&devfreq_cpufreq {
|
||
|
@@ -178,7 +186,9 @@
|
||
|
< 1248000 7904 >,
|
||
|
< 1344000 9887 >,
|
||
|
< 1478400 11863 >,
|
||
|
- < 1555200 11863 >;
|
||
|
+ < 1555200 11863 >,
|
||
|
+ < 1632000 11863 >,
|
||
|
+ < 1708800 11863 >;
|
||
|
cpu-to-dev-map-4 =
|
||
|
< 384000 1525 >,
|
||
|
< 480000 2288 >,
|
||
|
@@ -193,7 +203,9 @@
|
||
|
< 1632000 9887 >,
|
||
|
< 1728000 9887 >,
|
||
|
< 1824000 11863 >,
|
||
|
- < 1958400 11863 >;
|
||
|
+ < 1958400 11863 >,
|
||
|
+ < 2016000 11863 >,
|
||
|
+ < 2054400 11863 >;
|
||
|
};
|
||
|
|
||
|
mincpubw-cpufreq {
|
||
|
@@ -209,7 +221,9 @@
|
||
|
< 1248000 1525 >,
|
||
|
< 1344000 1525 >,
|
||
|
< 1478400 1525 >,
|
||
|
- < 1555200 1525 >;
|
||
|
+ < 1555200 1525 >,
|
||
|
+ < 1632000 1525 >,
|
||
|
+ < 1708800 1525 >;
|
||
|
cpu-to-dev-map-4 =
|
||
|
< 384000 1525 >,
|
||
|
< 480000 1525 >,
|
||
|
@@ -224,7 +238,9 @@
|
||
|
< 1632000 1525 >,
|
||
|
< 1728000 1525 >,
|
||
|
< 1824000 1525 >,
|
||
|
- < 1958400 7904 >;
|
||
|
+ < 1958400 7904 >,
|
||
|
+ < 2016000 7904 >,
|
||
|
+ < 2054400 7904 >;
|
||
|
};
|
||
|
|
||
|
cci-cpufreq {
|
||
|
@@ -239,7 +255,9 @@
|
||
|
< 1248000 729600 >,
|
||
|
< 1344000 787200 >,
|
||
|
< 1478400 787200 >,
|
||
|
- < 1555200 787200 >;
|
||
|
+ < 1555200 787200 >,
|
||
|
+ < 1632000 787200 >,
|
||
|
+ < 1708800 787200 >;
|
||
|
cpu-to-dev-map-4 =
|
||
|
< 384000 300000 >,
|
||
|
< 480000 300000 >,
|
||
|
@@ -254,7 +272,9 @@
|
||
|
< 1632000 787200 >,
|
||
|
< 1728000 787200 >,
|
||
|
< 1824000 787200 >,
|
||
|
- < 1958400 787200 >;
|
||
|
+ < 1958400 787200 >,
|
||
|
+ < 2016000 787200 >,
|
||
|
+ < 2054400 787200 >;
|
||
|
};
|
||
|
};
|
||
|
|
||
|
diff --git a/drivers/clk/qcom/clock-cpu-8994.c b/drivers/clk/qcom/clock-cpu-8994.c
|
||
|
index 7928f2ec0ca..351a66d4469 100644
|
||
|
--- a/drivers/clk/qcom/clock-cpu-8994.c
|
||
|
+++ b/drivers/clk/qcom/clock-cpu-8994.c
|
||
|
@@ -191,13 +191,13 @@ static struct pll_clk a57_pll0 = {
|
||
|
.test_ctl_lo_val = 0x00010000,
|
||
|
},
|
||
|
.min_rate = 1209600000,
|
||
|
- .max_rate = 1996800000,
|
||
|
+ .max_rate = 2073600000,
|
||
|
.base = &vbases[C1_PLL_BASE],
|
||
|
.c = {
|
||
|
.parent = &xo_ao.c,
|
||
|
.dbg_name = "a57_pll0",
|
||
|
.ops = &clk_ops_variable_rate_pll,
|
||
|
- VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 1996800000),
|
||
|
+ VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 2073600000),
|
||
|
CLK_INIT(a57_pll0.c),
|
||
|
},
|
||
|
};
|
||
|
@@ -229,13 +229,13 @@ static struct pll_clk a57_pll1 = {
|
||
|
/* Necessary since we'll be setting a rate before handoff on V1 */
|
||
|
.src_rate = 19200000,
|
||
|
.min_rate = 1209600000,
|
||
|
- .max_rate = 1996800000,
|
||
|
+ .max_rate = 2073600000,
|
||
|
.base = &vbases[C1_PLL_BASE],
|
||
|
.c = {
|
||
|
.parent = &xo_ao.c,
|
||
|
.dbg_name = "a57_pll1",
|
||
|
.ops = &clk_ops_variable_rate_pll,
|
||
|
- VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 1996800000),
|
||
|
+ VDD_DIG_FMAX_MAP2(LOW, 1593600000, NOMINAL, 2073600000),
|
||
|
CLK_INIT(a57_pll1.c),
|
||
|
},
|
||
|
};
|