mirror of
https://github.com/Divested-Mobile/DivestOS-Build.git
synced 2024-10-01 01:35:54 -04:00
317 lines
12 KiB
Diff
317 lines
12 KiB
Diff
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From 53c6b89349730765a71722d274fc3fa41287d21f Mon Sep 17 00:00:00 2001
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From: Ravi Kishore Tanuku <rktanuku@codeaurora.org>
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Date: Wed, 22 Feb 2017 20:00:13 +0530
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Subject: msm: camera: Add regulator enable and disable independent of CSID
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Regulator enable and disable of CSIPHY depends on the CSID module.
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Make the enable and disable of clk regulator independent of CSIPHY.
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CRs-Fixed: 1107702
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Change-Id: Iabb5eb28d63b34a4c3201c53be17054a1907f4fe
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Signed-off-by: Ravi Kishore Tanuku <rktanuku@codeaurora.org>
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---
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arch/arm/boot/dts/qcom/msm8996-camera.dtsi | 38 ++++++---
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.../msm/camera_v2/sensor/csiphy/msm_csiphy.c | 94 ++++++++++++++++++++--
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.../msm/camera_v2/sensor/csiphy/msm_csiphy.h | 6 +-
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3 files changed, 120 insertions(+), 18 deletions(-)
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diff --git a/arch/arm/boot/dts/qcom/msm8996-camera.dtsi b/arch/arm/boot/dts/qcom/msm8996-camera.dtsi
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index 3e1a889..e4960d0 100644
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--- a/arch/arm/boot/dts/qcom/msm8996-camera.dtsi
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+++ b/arch/arm/boot/dts/qcom/msm8996-camera.dtsi
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@@ -1,5 +1,5 @@
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/*
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- * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
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+ * Copyright (c) 2014-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@@ -28,18 +28,24 @@
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reg-names = "csiphy", "csiphy_clk_mux";
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interrupts = <0 78 0>;
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interrupt-names = "csiphy";
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- clocks = <&clock_mmss clk_camss_top_ahb_clk>,
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+ qcom,csi-vdd-voltage = <1250000>;
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+ qcom,mipi-csi-vdd-supply = <&pm8994_l2>;
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+ mmagic-supply = <&gdsc_mmagic_camss>;
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+ gdscr-supply = <&gdsc_camss_top>;
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+ qcom,cam-vreg-name = "mmagic", "gdscr";
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+ clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
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+ <&clock_mmss clk_camss_top_ahb_clk>,
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<&clock_mmss clk_camss_ispif_ahb_clk>,
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<&clock_mmss clk_csi0phytimer_clk_src>,
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<&clock_mmss clk_camss_csi0phytimer_clk>,
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<&clock_mmss clk_camss_ahb_clk>,
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<&clock_mmss clk_csiphy0_3p_clk_src>,
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<&clock_mmss clk_camss_csiphy0_3p_clk>;
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- clock-names = "camss_top_ahb_clk",
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+ clock-names = "mmagic_ahb_clk", "camss_top_ahb_clk",
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"ispif_ahb_clk", "csiphy_timer_src_clk",
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"csiphy_timer_clk", "camss_ahb_clk",
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"csiphy_3p_clk_src", "csi_phy_3p_clk";
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- qcom,clock-rates = <0 0 200000000 0 0 100000000 0>;
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+ qcom,clock-rates = <0 0 0 200000000 0 0 100000000 0>;
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};
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qcom,csiphy@a35000 {
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@@ -49,18 +55,24 @@
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reg-names = "csiphy", "csiphy_clk_mux";
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interrupts = <0 79 0>;
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interrupt-names = "csiphy";
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- clocks = <&clock_mmss clk_camss_top_ahb_clk>,
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+ qcom,csi-vdd-voltage = <1250000>;
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+ qcom,mipi-csi-vdd-supply = <&pm8994_l2>;
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+ mmagic-supply = <&gdsc_mmagic_camss>;
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+ gdscr-supply = <&gdsc_camss_top>;
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+ qcom,cam-vreg-name = "mmagic", "gdscr";
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+ clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
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+ <&clock_mmss clk_camss_top_ahb_clk>,
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<&clock_mmss clk_camss_ispif_ahb_clk>,
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<&clock_mmss clk_csi1phytimer_clk_src>,
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<&clock_mmss clk_camss_csi1phytimer_clk>,
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<&clock_mmss clk_camss_ahb_clk>,
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<&clock_mmss clk_csiphy1_3p_clk_src>,
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<&clock_mmss clk_camss_csiphy1_3p_clk>;
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- clock-names = "camss_top_ahb_clk",
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+ clock-names = "mmagic_ahb_clk", "camss_top_ahb_clk",
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"ispif_ahb_clk", "csiphy_timer_src_clk",
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"csiphy_timer_clk", "camss_ahb_clk",
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"csiphy_3p_clk_src", "csi_phy_3p_clk";
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- qcom,clock-rates = <0 0 200000000 0 0 100000000 0>;
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+ qcom,clock-rates = <0 0 0 200000000 0 0 100000000 0>;
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};
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qcom,csiphy@a36000 {
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@@ -70,18 +82,24 @@
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reg-names = "csiphy", "csiphy_clk_mux";
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interrupts = <0 80 0>;
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interrupt-names = "csiphy";
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- clocks = <&clock_mmss clk_camss_top_ahb_clk>,
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+ qcom,csi-vdd-voltage = <1250000>;
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+ qcom,mipi-csi-vdd-supply = <&pm8994_l2>;
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+ mmagic-supply = <&gdsc_mmagic_camss>;
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+ gdscr-supply = <&gdsc_camss_top>;
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+ qcom,cam-vreg-name = "mmagic", "gdscr";
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+ clocks = <&clock_mmss clk_mmss_mmagic_ahb_clk>,
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+ <&clock_mmss clk_camss_top_ahb_clk>,
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<&clock_mmss clk_camss_ispif_ahb_clk>,
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<&clock_mmss clk_csi2phytimer_clk_src>,
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<&clock_mmss clk_camss_csi2phytimer_clk>,
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<&clock_mmss clk_camss_ahb_clk>,
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<&clock_mmss clk_csiphy2_3p_clk_src>,
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<&clock_mmss clk_camss_csiphy2_3p_clk>;
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- clock-names = "camss_top_ahb_clk",
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+ clock-names = "mmagic_ahb_clk", "camss_top_ahb_clk",
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"ispif_ahb_clk", "csiphy_timer_src_clk",
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"csiphy_timer_clk", "camss_ahb_clk",
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"csiphy_3p_clk_src", "csi_phy_3p_clk";
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- qcom,clock-rates = <0 0 200000000 0 0 100000000 0>;
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+ qcom,clock-rates = <0 0 0 200000000 0 0 100000000 0>;
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};
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qcom,csid@a30000 {
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diff --git a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
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index 9d6952ee..d1bb9af 100644
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--- a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
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+++ b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.c
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@@ -1,4 +1,4 @@
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-/* Copyright (c) 2011-2016, The Linux Foundation. All rights reserved.
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+/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@@ -782,6 +782,25 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
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CDBG("%s:%d called\n", __func__, __LINE__);
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+ rc = msm_camera_config_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg,
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+ csiphy_dev->regulator_count, NULL, 0,
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+ &csiphy_dev->csiphy_reg_ptr[0], 1);
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+ if (rc < 0) {
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+ pr_err("%s:%d csiphy config_vreg failed\n",
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+ __func__, __LINE__);
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+ goto csiphy_vreg_config_fail;
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+ }
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+ rc = msm_camera_enable_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg,
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+ csiphy_dev->regulator_count, NULL, 0,
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+ &csiphy_dev->csiphy_reg_ptr[0], 1);
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+ if (rc < 0) {
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+ pr_err("%s:%d csiphy enable_vreg failed\n",
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+ __func__, __LINE__);
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+ goto top_vreg_enable_failed;
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+ }
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+
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rc = msm_camera_clk_enable(&csiphy_dev->pdev->dev,
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csiphy_dev->csiphy_clk_info, csiphy_dev->csiphy_clk,
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csiphy_dev->num_clk, true);
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@@ -790,7 +809,7 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
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if (rc < 0) {
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pr_err("%s: csiphy clk enable failed\n", __func__);
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csiphy_dev->ref_count--;
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- goto csiphy_resource_fail;
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+ goto csiphy_enable_clk_fail;
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}
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CDBG("%s:%d called\n", __func__, __LINE__);
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@@ -818,7 +837,17 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
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csiphy_dev->csiphy_state = CSIPHY_POWER_UP;
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return 0;
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-csiphy_resource_fail:
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+csiphy_enable_clk_fail:
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+ msm_camera_enable_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg,
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+ csiphy_dev->regulator_count, NULL, 0,
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+ &csiphy_dev->csiphy_reg_ptr[0], 0);
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+top_vreg_enable_failed:
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+ msm_camera_config_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg,
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+ csiphy_dev->regulator_count, NULL, 0,
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+ &csiphy_dev->csiphy_reg_ptr[0], 0);
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+csiphy_vreg_config_fail:
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if (cam_config_ahb_clk(NULL, 0, CAM_AHB_CLIENT_CSIPHY,
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CAM_AHB_SUSPEND_VOTE) < 0)
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pr_err("%s: failed to vote for AHB\n", __func__);
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@@ -856,6 +885,24 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
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pr_err("%s: failed to vote for AHB\n", __func__);
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return rc;
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}
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+ rc = msm_camera_config_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg,
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+ csiphy_dev->regulator_count, NULL, 0,
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+ &csiphy_dev->csiphy_reg_ptr[0], 1);
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+ if (rc < 0) {
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+ pr_err("%s:%d csiphy config_vreg failed\n",
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+ __func__, __LINE__);
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+ goto csiphy_vreg_config_fail;
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+ }
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+ rc = msm_camera_enable_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg,
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+ csiphy_dev->regulator_count, NULL, 0,
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+ &csiphy_dev->csiphy_reg_ptr[0], 1);
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+ if (rc < 0) {
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+ pr_err("%s:%d csiphy enable_vreg failed\n",
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+ __func__, __LINE__);
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+ goto top_vreg_enable_failed;
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+ }
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rc = msm_camera_clk_enable(&csiphy_dev->pdev->dev,
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csiphy_dev->csiphy_clk_info, csiphy_dev->csiphy_clk,
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@@ -865,9 +912,9 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
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if (rc < 0) {
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pr_err("%s: csiphy clk enable failed\n", __func__);
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csiphy_dev->ref_count--;
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- goto csiphy_resource_fail;
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+ goto csiphy_enable_clk_fail;
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}
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- CDBG("%s:%d called\n", __func__, __LINE__);
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+ CDBG("%s:%d clk enable success\n", __func__, __LINE__);
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if (csiphy_dev->csiphy_3phase == CSI_3PHASE_HW)
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msm_csiphy_3ph_reset(csiphy_dev);
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@@ -890,7 +937,17 @@ static int msm_csiphy_init(struct csiphy_device *csiphy_dev)
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csiphy_dev->csiphy_state = CSIPHY_POWER_UP;
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return 0;
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-csiphy_resource_fail:
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+csiphy_enable_clk_fail:
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+ msm_camera_enable_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg,
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+ csiphy_dev->regulator_count, NULL, 0,
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+ &csiphy_dev->csiphy_reg_ptr[0], 0);
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+top_vreg_enable_failed:
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+ msm_camera_config_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg,
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+ csiphy_dev->regulator_count, NULL, 0,
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+ &csiphy_dev->csiphy_reg_ptr[0], 0);
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+csiphy_vreg_config_fail:
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if (cam_config_ahb_clk(NULL, 0, CAM_AHB_CLIENT_CSIPHY,
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CAM_AHB_SUSPEND_VOTE) < 0)
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pr_err("%s: failed to vote for AHB\n", __func__);
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@@ -998,6 +1055,14 @@ static int msm_csiphy_release(struct csiphy_device *csiphy_dev, void *arg)
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csiphy_dev->csiphy_3p_clk, 2, false);
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}
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+ msm_camera_enable_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg,
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+ csiphy_dev->regulator_count, NULL, 0,
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+ &csiphy_dev->csiphy_reg_ptr[0], 0);
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+ msm_camera_config_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg, csiphy_dev->regulator_count,
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+ NULL, 0, &csiphy_dev->csiphy_reg_ptr[0], 0);
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+
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csiphy_dev->csiphy_state = CSIPHY_POWER_DOWN;
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if (cam_config_ahb_clk(NULL, 0, CAM_AHB_CLIENT_CSIPHY,
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@@ -1104,6 +1169,13 @@ static int msm_csiphy_release(struct csiphy_device *csiphy_dev, void *arg)
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csiphy_dev->csiphy_3p_clk, 2, false);
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}
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+ msm_camera_enable_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg, csiphy_dev->regulator_count,
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+ NULL, 0, &csiphy_dev->csiphy_reg_ptr[0], 0);
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+ msm_camera_config_vreg(&csiphy_dev->pdev->dev,
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+ csiphy_dev->csiphy_vreg, csiphy_dev->regulator_count,
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+ NULL, 0, &csiphy_dev->csiphy_reg_ptr[0], 0);
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+
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csiphy_dev->csiphy_state = CSIPHY_POWER_DOWN;
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if (cam_config_ahb_clk(NULL, 0, CAM_AHB_CLIENT_CSIPHY,
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@@ -1419,6 +1491,14 @@ static int csiphy_probe(struct platform_device *pdev)
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goto csiphy_no_resource;
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}
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+ rc = msm_camera_get_dt_vreg_data(pdev->dev.of_node,
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+ &(new_csiphy_dev->csiphy_vreg),
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+ &(new_csiphy_dev->regulator_count));
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+ if (rc < 0) {
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+ pr_err("%s: get vreg data from dtsi fail\n", __func__);
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+ rc = -EFAULT;
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+ goto csiphy_no_resource;
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+ }
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/* ToDo: Enable 3phase clock for dynamic clock enable/disable */
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rc = msm_csiphy_get_clk_info(new_csiphy_dev, pdev);
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if (rc < 0) {
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@@ -1493,7 +1573,7 @@ static int msm_csiphy_exit(struct platform_device *pdev)
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&csiphy_dev->csiphy_all_clk,
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csiphy_dev->num_all_clk);
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- msm_camera_put_reg_base(pdev, csiphy_dev->base, "csid", true);
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+ msm_camera_put_reg_base(pdev, csiphy_dev->base, "csiphy", true);
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if (csiphy_dev->hw_dts_version >= CSIPHY_VERSION_V30) {
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msm_camera_put_reg_base(pdev, csiphy_dev->clk_mux_base,
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"csiphy_clk_mux", true);
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diff --git a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.h b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.h
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index 4b3c407..07a0811 100644
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--- a/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.h
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+++ b/drivers/media/platform/msm/camera_v2/sensor/csiphy/msm_csiphy.h
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@@ -1,4 +1,4 @@
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-/* Copyright (c) 2011-2016, The Linux Foundation. All rights reserved.
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+/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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@@ -20,6 +20,7 @@
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#include <media/msm_cam_sensor.h>
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#include "msm_sd.h"
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#include "msm_camera_io_util.h"
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+#include "msm_camera_dt_util.h"
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#include "cam_soc_api.h"
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#define MAX_CSIPHY 3
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@@ -168,6 +169,9 @@ struct csiphy_device {
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uint8_t num_irq_registers;
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uint32_t csiphy_sof_debug;
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uint32_t csiphy_sof_debug_count;
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+ struct camera_vreg_t *csiphy_vreg;
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+ struct regulator *csiphy_reg_ptr[MAX_REGULATOR];
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+ int32_t regulator_count;
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};
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#define VIDIOC_MSM_CSIPHY_RELEASE \
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--
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cgit v1.1
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