tillitis-key/.gitignore
Michael Cardell Widerkrantz 6e793bea26
tool: Add default_partition.bin
Add default partition table

Partition table built with `./partition_table/partition_table -o
default_partition.bin --app0 ../fw/testloadapp/testloadapp.bin`
2025-04-16 13:28:15 +02:00

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/tests/*.o
/firmware/*.o
/firmware/firmware.bin
/firmware/firmware.elf
/firmware/firmware.hex
/firmware/firmware.map
/dhrystone/dhry.bin
/dhrystone/dhry.elf
/dhrystone/dhry.hex
/dhrystone/dhry.map
/dhrystone/testbench.vvp
/dhrystone/testbench.vcd
/dhrystone/testbench_nola.vvp
/dhrystone/testbench_nola.vcd
/dhrystone/timing.vvp
/dhrystone/timing.txt
/dhrystone/*.d
/dhrystone/*.o
/testbench.vvp
/testbench_wb.vvp
/testbench_ez.vvp
/testbench_sp.vvp
/testbench_rvf.vvp
/testbench_synth.vvp
/testbench.gtkw
/testbench.vcd
/testbench.trace
/testbench_verilator*
/check.smt2
/check.vcd
/hw/application_fpga/tkey-libs/libcommon.a
/hw/application_fpga/tkey-libs/libcrt0.a
/hw/application_fpga/tkey-libs/libmonocypher.a
/hw/application_fpga/tkey-libs/libblake2s.a
/hw/application_fpga/tools/partition_table/partition_table
/hw/application_fpga/tools/b2s/b2s
synth.json
synth.txt
synth.v
application_fpga_par.json
application_fpga_par.txt
tb_application_fpga_sim.fst
tb_application_fpga_sim.fst.hier
tb_verilated/
verilated/
*.o
*.asc
*.bin
!/hw/application_fpga/tools/default_partition.bin
*.elf
*.map
*.tmp
*.hex
!uds.hex
!udi.hex
.*.swp
*.sch-bak
*.sim
compile_commands.json
.cache