Joachim Strömbergson eb00b4e2e9 (fpga) Make free running the only timer mode ... Change timer from counting to a specified value and stopping or free running, to always be free running. But now the timer sets a reached flag when the target number of ticks has been reached. Signed-off-by: Joachim Strömbergson <joachim@assured.se>		2024-08-21 13:35:49 +02:00
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picorv32	FPGA: Ignore warnings about blocking assignment in clocked processes	2024-06-17 15:37:13 +02:00
timer	(fpga) Make free running the only timer mode	2024-08-21 13:35:49 +02:00
tk1	FPGA: Cleanup tk1 spi testbench	2024-07-11 09:39:31 +02:00
touch_sense	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
trng	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
uart	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
uds	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00