Joachim Strömbergson eade3e11c5 Fill RAM with random data using xorwow. ... xorwow provides significantly better random data, compared to previously used function. Making it harder to predict what data RAM is filled with. It adds a startup time of approx 80 ms, but can be compensated with optimising other parts of the startup routine. This changes both firmware and fpga hashes. Signed-off-by: Joachim Strömbergson <joachim@assured.se>		2024-06-11 11:15:00 +02:00
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core	FPGA: Fix linting of tk1 core	2024-06-10 14:22:59 +02:00
data	Change name of pin constraint file to match tk1 pcb	2023-07-04 09:04:29 +02:00
fw	Fill RAM with random data using xorwow.	2024-06-11 11:15:00 +02:00
rtl	Clean up code and silence warnings after linting	2024-03-20 16:39:53 +01:00
tb	Rename to TK1	2022-10-26 09:20:02 +02:00
tools	hw/tool: UDI/UDS storage	2024-04-03 11:27:00 +02:00
application_fpga.bin.sha256	Fill RAM with random data using xorwow.	2024-06-11 11:15:00 +02:00
config.vlt	Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal	2023-03-01 13:37:31 +01:00
firmware.bin.sha512	Fill RAM with random data using xorwow.	2024-06-11 11:15:00 +02:00
Makefile	Change filename personalize.py to patch_uds_udi.py	2024-03-26 13:07:11 +01:00