mirror of
https://github.com/tillitis/tillitis-key1.git
synced 2025-07-31 18:58:45 -04:00
111 lines
2.4 KiB
C
111 lines
2.4 KiB
C
// SPDX-FileCopyrightText: 2023 Tillitis AB <tillitis.se>
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// SPDX-License-Identifier: MIT
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#include <stdint.h>
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#include "ch554.h"
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// Set pin p1.4 and p1.5 to GPIO output mode.
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void gpio_init()
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{
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// p1.4
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P1_MOD_OC &= ~0x10;
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P1_DIR_PU |= 0x10;
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// p1.5
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P1_MOD_OC &= ~0x20;
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P1_DIR_PU |= 0x20;
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}
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void gpio_set(uint8_t pin)
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{
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switch (pin) {
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case 0x10: // p1.4
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P1 |= 0x10;
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break;
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case 0x20: // p1.5
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P1 |= 0x20;
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break;
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default: // do nothing, unsupported pin.
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break;
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}
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}
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void gpio_unset(uint8_t pin)
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{
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switch (pin) {
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case 0x10:
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P1 &= ~0x10;
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break;
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case 0x20:
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P1 &= ~0x20;
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break;
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default: // do nothing, unsupported pin.
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break;
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}
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}
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uint8_t gpio_get(uint8_t pin)
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{
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uint8_t ret = 0;
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switch (pin) {
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case 0x10: // p1.4
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ret = P1 & 0x10;
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break;
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case 0x20: // p1.5
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ret = P1 & 0x20;
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break;
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default: // do nothing, unsupported pin.
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ret = 0xff;
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break;
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}
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return ret;
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}
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// Set pin p1.4 to GPIO input mode. (FPGA_CTS)
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void gpio_init_p1_4_in()
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{
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// p1.4
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P1_MOD_OC &= ~0x10; // Output Mode: 0 = Push-pull output, 1 = Open-drain output
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P1_DIR_PU &= ~0x10; // Port Direction Control and Pull-up Enable Register:
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// Push-pull output mode:
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// 0 = Input.
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// 1 = Output
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// Open-drain output mode:
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// 0 = Pull-up resistor disabled
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// 1 = Pull-up resistor enabled
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}
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// Read status of pin 1.4
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uint8_t gpio_p1_4_get(void)
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{
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return (P1 & 0x10); // p1.4
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}
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// Set pin p1.5 to GPIO output mode. (CH552_CTS)
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void gpio_init_p1_5_out()
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{
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// p1.5
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P1_MOD_OC &= ~0x20; // Output Mode: 0 = Push-pull output, 1 = Open-drain output
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P1_DIR_PU |= 0x20; // Port Direction Control and Pull-up Enable Register:
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// Push-pull output mode:
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// 0 = Input.
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// 1 = Output
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// Open-drain output mode:
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// 0 = Pull-up resistor disabled
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// 1 = Pull-up resistor enabled
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}
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// Set pin 1.5 high
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void gpio_p1_5_set(void)
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{
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P1 |= 0x20;
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}
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// Set pin 1.5 low
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void gpio_p1_5_unset(void)
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{
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P1 &= ~0x20;
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}
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