Git-Mirrors/tillitis-key
1
0
Fork 0
mirror of https://github.com/tillitis/tillitis-key1.git synced 2025-11-22 08:42:37 -05:00
Code Issues Projects Releases Packages Wiki Activity
tillitis-key/hw/application_fpga/data
History
Jonas Thörnblad ab4ef5fdf9
fpga: Introduce CTS signals for UART 
Add incoming and outgoing CTS (Clear To Send) signals for the FPGA to
let the CH552 and FPGA signal each other that it is OK to send UART
data. The CTS signals indicate "OK to send" if high. If an incoming
CTS signal goes low, the receiver of that signal should immediatly
stop sending UART data.
2025-02-11 13:50:04 +01:00
..
application_fpga_mta1_usb_dev.pcf
application_fpga_tk1.pcf fpga: Introduce CTS signals for UART 2025-02-11 13:50:04 +01:00
udi.hex
uds.hex Use different byte values in test UDS words 2023-03-28 09:26:23 +02:00