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35052e50cb
Move the logic implementing the RAM address and data
scrambling, descrambling into the RAM module. This cleans up
the top level, and makes it easier to change the scrambling
without chaning the top. In order to do correct scrambling the
address to the RAM core must be 16 bits, not 15.
Clean up some minor details at the top level, fixing text
aligment and grouping of ports in instances.
Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2 lines
87 B
Plaintext
2 lines
87 B
Plaintext
deb4c6f80b28d12ecfb350ac749369c875866d6715c2d14b1ce1b80a272f3ee6 application_fpga.bin
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