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tillitis-key/hw/application_fpga/data
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Mikael Ågren c98249c3e3
fpga: Experimental fpga build for uwg30 package 
nextpnr-ice40 fails with:

```
Info: Placing PLLs..
ERROR: PLL 'reset_gen_inst.pll_inst' couldn't be placed anywhere, no
suitable BEL found.
    PLL bel 'X12/Y31/pll_3' cannot be used as it conflicts with input
'interface_ch552_cts$sb_io' on pin 'B3'.
```
2025-05-19 08:55:22 +02:00
..
application_fpga_mta1_usb_dev.pcf Rename to TK1 2022-10-26 09:20:02 +02:00
application_fpga_tk1.pcf fpga: Introduce CTS signals for UART 2025-02-11 13:50:04 +01:00
application_fpga_tk1_uwg30.pcf fpga: Experimental fpga build for uwg30 package 2025-05-19 08:55:22 +02:00
udi.hex Make initial public release 2022-09-19 08:51:11 +02:00
uds.hex Use different byte values in test UDS words 2023-03-28 09:26:23 +02:00