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95 lines
1.9 KiB
ArmAsm
95 lines
1.9 KiB
ArmAsm
// SPDX-FileCopyrightText: 2024 Tillitis AB <tillitis.se>
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// SPDX-License-Identifier: BSD-2-Clause
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#include "../tk1/picorv32/custom_ops.S"
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.section ".text"
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.globl syscall_enable
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.globl syscall
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syscall_enable:
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// Enable IRQs
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li t0, 0x7fffffff // IRQ31 mask
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picorv32_maskirq_insn(zero, t0) // Enable IRQs
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ret
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syscall:
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// Save registers to stack
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addi sp, sp, -32*4
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sw x0, 0*4(sp)
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sw x1, 1*4(sp)
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// x2 (sp) is assumed to be preserved by the interrupt handler.
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sw x3, 3*4(sp)
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sw x4, 4*4(sp)
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sw x5, 5*4(sp)
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sw x6, 6*4(sp)
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sw x7, 7*4(sp)
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sw x8, 8*4(sp)
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sw x9, 9*4(sp)
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// x10 (a0) will contain syscall return value. And should not be saved.
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sw x11, 11*4(sp)
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sw x12, 12*4(sp)
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sw x13, 13*4(sp)
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sw x14, 14*4(sp)
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sw x15, 15*4(sp)
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sw x16, 16*4(sp)
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sw x17, 17*4(sp)
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sw x18, 18*4(sp)
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sw x19, 19*4(sp)
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sw x20, 20*4(sp)
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sw x21, 21*4(sp)
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sw x22, 22*4(sp)
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sw x23, 23*4(sp)
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sw x24, 24*4(sp)
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sw x25, 25*4(sp)
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sw x26, 26*4(sp)
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sw x27, 27*4(sp)
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sw x28, 28*4(sp)
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sw x29, 29*4(sp)
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sw x30, 30*4(sp)
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sw x31, 31*4(sp)
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// Trigger syscall interrupt
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li t0, (1 << 31)
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and t0, a0, t0
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li t1, 0xe1000000 // Syscall interrupt trigger address
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sw zero, 0(t1) // Trigger interrupt
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// Restore registers from stack
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lw x0, 0*4(sp)
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lw x1, 1*4(sp)
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// x2 (sp) is assumed to be preserved by the interrupt handler.
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lw x3, 3*4(sp)
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lw x4, 4*4(sp)
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lw x5, 5*4(sp)
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lw x6, 6*4(sp)
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lw x7, 7*4(sp)
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lw x8, 8*4(sp)
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lw x9, 9*4(sp)
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// x10 (a0) contains syscall return value. And should not be destroyed.
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lw x11, 11*4(sp)
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lw x12, 12*4(sp)
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lw x13, 13*4(sp)
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lw x14, 14*4(sp)
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lw x15, 15*4(sp)
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lw x16, 16*4(sp)
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lw x17, 17*4(sp)
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lw x18, 18*4(sp)
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lw x19, 19*4(sp)
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lw x20, 20*4(sp)
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lw x21, 21*4(sp)
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lw x22, 22*4(sp)
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lw x23, 23*4(sp)
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lw x24, 24*4(sp)
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lw x25, 25*4(sp)
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lw x26, 26*4(sp)
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lw x27, 27*4(sp)
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lw x28, 28*4(sp)
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lw x29, 29*4(sp)
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lw x30, 30*4(sp)
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lw x31, 31*4(sp)
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addi sp, sp, 32*4
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ret
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