tillitis-key/hw/application_fpga
2022-10-11 17:25:00 +02:00
..
core Replace FiGaRO based TRNG with new ROSC based TRNG 2022-10-11 13:17:04 +02:00
data Make initial public release 2022-09-19 08:51:11 +02:00
fw Replace FiGaRO based TRNG with new ROSC based TRNG 2022-10-11 13:17:04 +02:00
rtl Remove redundant spram module 2022-10-11 13:27:57 +02:00
tb Update verilator top level module to match rom module changes 2022-10-06 13:59:01 +02:00
tools Add default values to tpt.py 2022-09-21 09:49:07 +02:00
Makefile Clarify BRAM_FW_SIZE 2022-10-11 17:25:00 +02:00