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tillitis-key/hw/boards/tk1/gerbers/tk1-F_Cu.gbr
Matthew Mets e71d70008b
TK-1 and TP-1 PCBs (#52) 
* Add kicad library for flat programming clip

* Add descriptions to part symbols

* Add extended values, manufacturer/distributor info to components in mta1

* Add new board entry for TK1

* Add TP1 programmer design

* Update MTA1-USB-V1 release files to match production

* Change SPI flash memory type to XT25F08BDFIGT-S
* Change touch sensor feedback cap to 1uF
* Add manufacturer, manufacturer part number, distributor, distributor part number

* Update component values for TK1 PCB

* Use specific part # for C8
* Change flash back to Winbond part, for easier sourcing
* Change C1 to 1pF

* Fixes for production programmer PCB

* Swap GND and 5V on J3
* Replace graphic logo with text
* Rename part to 'TP-1'

* TK-1 release

* Add dimensions for PCB
* Add layer stackup for PCB
* Change PCB component origin to match expanded board
* Change schematic title to 'TK-1', update release date

* mta1-usb-v1-programmer: Add corrected part numbers for OSFC production

* Q1, Q2, F1 part subsititutions
* add mfr/supplier info for all parts

* PCB library: add parts

* Rectangular footprint for TK-1 test pads
* BOM generation script used for TK-1 and TP-1 releases

* TP-1 release

* Schematic: Add manufacturer, supplier information for all parts
* Schematic: Update name and release date
* PCB: Add PCB fabrication information
* PCB: Correct pinouts on silkscreen

* PCB library: add 'screw' and 'foot' symbols

* Screw is a schematic-only part, for including mechanical screws in the
  BOM
* Foot is for self-adhesive rubber mounting feet that can be stuck to
  the bottom of a PCB

* TP-1 release: Add screws, feet to the BOM

* Pico library: Add footprint for RPi Pico w/solder paste

* TP-1 RevA release updates:

* Add fiducials in 3 corners (1mm exposed copper ring w/2mm soldermask opening)
* Add solder paste openings to Raspberry Pi Pico pads

* TK-1: RevA.1 release

* Add two fiducials to TK-1 board

* TP-1: Update fuse type to match actual part

* Make placement diagrams for TP-1, TK-1

* Update BC-1-xxx footprints to include placement outlines
* Update TP-1 PCB with new footprints, clean up top fab layer
* Take screenshots of top layers of both boards

* tk-1: fix placement footprints

* Add pin1 marking for ncp footprint
* Add refdes for w25q80 footprint
* Update board with new footprints, clear extraneous text on fab layer
2022-12-22 16:41:46 +01:00

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%TF.GenerationSoftware,KiCad,Pcbnew,(6.0.4)*%
%TF.CreationDate,2022-11-15T14:04:26+01:00*%
%TF.ProjectId,tk1,746b312e-6b69-4636-9164-5f7063625858,rev?*%
%TF.SameCoordinates,Original*%
%TF.FileFunction,Copper,L1,Top*%
%TF.FilePolarity,Positive*%
%FSLAX46Y46*%
G04 Gerber Fmt 4.6, Leading zero omitted, Abs format (unit mm)*
G04 Created by KiCad (PCBNEW (6.0.4)) date 2022-11-15 14:04:26*
%MOMM*%
%LPD*%
G01*
G04 APERTURE LIST*
G04 Aperture macros list*
%AMRoundRect*
0 Rectangle with rounded corners*
0 $1 Rounding radius*
0 $2 $3 $4 $5 $6 $7 $8 $9 X,Y pos of 4 corners*
0 Add a 4 corners polygon primitive as box body*
4,1,4,$2,$3,$4,$5,$6,$7,$8,$9,$2,$3,0*
0 Add four circle primitives for the rounded corners*
1,1,$1+$1,$2,$3*
1,1,$1+$1,$4,$5*
1,1,$1+$1,$6,$7*
1,1,$1+$1,$8,$9*
0 Add four rect primitives between the rounded corners*
20,1,$1+$1,$2,$3,$4,$5,0*
20,1,$1+$1,$4,$5,$6,$7,0*
20,1,$1+$1,$6,$7,$8,$9,0*
20,1,$1+$1,$8,$9,$2,$3,0*%
%AMRotRect*
0 Rectangle, with rotation*
0 The origin of the aperture is its center*
0 $1 length*
0 $2 width*
0 $3 Rotation angle, in degrees counterclockwise*
0 Add horizontal line*
21,1,$1,$2,0,0,$3*%
G04 Aperture macros list end*
%TA.AperFunction,SMDPad,CuDef*%
%ADD10C,0.750000*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD11RoundRect,0.129500X0.129500X-0.150500X0.129500X0.150500X-0.129500X0.150500X-0.129500X-0.150500X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD12RoundRect,0.129500X-0.014849X-0.197990X0.197990X0.014849X0.014849X0.197990X-0.197990X-0.014849X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD13RoundRect,0.129500X0.014849X0.197990X-0.197990X-0.014849X-0.014849X-0.197990X0.197990X0.014849X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD14RoundRect,0.129500X0.197990X-0.014849X-0.014849X0.197990X-0.197990X0.014849X0.014849X-0.197990X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD15RoundRect,0.147500X0.147500X0.172500X-0.147500X0.172500X-0.147500X-0.172500X0.147500X-0.172500X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD16R,0.450000X0.450000*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD17RoundRect,0.112500X-0.112500X0.112500X-0.112500X-0.112500X0.112500X-0.112500X0.112500X0.112500X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD18RoundRect,0.112500X-0.159099X0.000000X0.000000X-0.159099X0.159099X0.000000X0.000000X0.159099X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD19RoundRect,0.112500X0.000000X0.159099X-0.159099X0.000000X0.000000X-0.159099X0.159099X0.000000X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD20RoundRect,0.150000X0.512500X0.150000X-0.512500X0.150000X-0.512500X-0.150000X0.512500X-0.150000X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD21RoundRect,0.062500X0.220971X0.309359X-0.309359X-0.220971X-0.220971X-0.309359X0.309359X0.220971X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD22RoundRect,0.062500X-0.220971X0.309359X-0.309359X0.220971X0.220971X-0.309359X0.309359X-0.220971X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD23RotRect,5.600000X5.600000X225.000000*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD24RoundRect,0.200000X-0.225000X0.200000X-0.225000X-0.200000X0.225000X-0.200000X0.225000X0.200000X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD25RoundRect,0.200000X-0.275000X0.200000X-0.275000X-0.200000X0.275000X-0.200000X0.275000X0.200000X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD26RoundRect,0.112500X0.112500X-0.112500X0.112500X0.112500X-0.112500X0.112500X-0.112500X-0.112500X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD27RoundRect,0.150000X-0.512500X-0.150000X0.512500X-0.150000X0.512500X0.150000X-0.512500X0.150000X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD28R,1.000000X0.700000*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD29RoundRect,0.112500X0.112500X0.112500X-0.112500X0.112500X-0.112500X-0.112500X0.112500X-0.112500X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD30RoundRect,0.129500X0.150500X0.129500X-0.150500X0.129500X-0.150500X-0.129500X0.150500X-0.129500X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD31R,1.400000X0.300000*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD32RoundRect,0.112500X-0.112500X-0.112500X0.112500X-0.112500X0.112500X0.112500X-0.112500X0.112500X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD33RoundRect,0.075000X0.225000X0.075000X-0.225000X0.075000X-0.225000X-0.075000X0.225000X-0.075000X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD34RoundRect,0.075000X-0.075000X-0.775000X0.075000X-0.775000X0.075000X0.775000X-0.075000X0.775000X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD35RoundRect,0.129500X-0.150500X-0.129500X0.150500X-0.129500X0.150500X0.129500X-0.150500X0.129500X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD36RoundRect,0.250000X0.650000X-0.325000X0.650000X0.325000X-0.650000X0.325000X-0.650000X-0.325000X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD37RoundRect,0.075000X0.675000X0.075000X-0.675000X0.075000X-0.675000X-0.075000X0.675000X-0.075000X0*%
%TD*%
%TA.AperFunction,SMDPad,CuDef*%
%ADD38RoundRect,0.175000X0.525000X0.175000X-0.525000X0.175000X-0.525000X-0.175000X0.525000X-0.175000X0*%
%TD*%
%TA.AperFunction,ViaPad*%
%ADD39C,0.600000*%
%TD*%
%TA.AperFunction,Conductor*%
%ADD40C,0.200000*%
%TD*%
%TA.AperFunction,Conductor*%
%ADD41C,0.600000*%
%TD*%
%TA.AperFunction,Conductor*%
%ADD42C,0.125000*%
%TD*%
G04 APERTURE END LIST*
D10*
%TO.P,FID1,*%
%TO.N,*%
X101500000Y-88500000D03*
%TD*%
%TO.P,FID2,*%
%TO.N,*%
X124250000Y-96750000D03*
%TD*%
D11*
%TO.P,C7,1*%
%TO.N,+3V3*%
X111450000Y-93040000D03*
%TO.P,C7,2*%
%TO.N,GND*%
X111450000Y-92260000D03*
%TD*%
%TO.P,C13,1*%
%TO.N,+3V3*%
X112350000Y-93040000D03*
%TO.P,C13,2*%
%TO.N,GND*%
X112350000Y-92260000D03*
%TD*%
D12*
%TO.P,C16,1*%
%TO.N,+1V2*%
X123224228Y-92575772D03*
%TO.P,C16,2*%
%TO.N,GND*%
X123775772Y-92024228D03*
%TD*%
D13*
%TO.P,C17,1*%
%TO.N,/Application FPGA/APP_+1.2_PLL*%
X115075772Y-97924228D03*
%TO.P,C17,2*%
%TO.N,GND*%
X114524228Y-98475772D03*
%TD*%
D14*
%TO.P,C18,1*%
%TO.N,+2V5*%
X114075772Y-93025772D03*
%TO.P,C18,2*%
%TO.N,GND*%
X113524228Y-92474228D03*
%TD*%
D12*
%TO.P,C19,1*%
%TO.N,+3V3*%
X123924228Y-93275772D03*
%TO.P,C19,2*%
%TO.N,GND*%
X124475772Y-92724228D03*
%TD*%
D13*
%TO.P,C20,1*%
%TO.N,+1V2*%
X115775772Y-98624228D03*
%TO.P,C20,2*%
%TO.N,GND*%
X115224228Y-99175772D03*
%TD*%
%TO.P,C21,1*%
%TO.N,+3V3*%
X116475772Y-99324228D03*
%TO.P,C21,2*%
%TO.N,GND*%
X115924228Y-99875772D03*
%TD*%
D15*
%TO.P,D1,1,K*%
%TO.N,Net-(D1-Pad1)*%
X112985000Y-90850000D03*
%TO.P,D1,2,A*%
%TO.N,+2V5*%
X112015000Y-90850000D03*
%TD*%
D16*
%TO.P,D3,1,A*%
%TO.N,+3V3*%
X126380000Y-98570000D03*
%TO.P,D3,2,RK*%
%TO.N,Net-(D3-Pad2)*%
X126380000Y-99330000D03*
%TO.P,D3,3,GK*%
%TO.N,Net-(D3-Pad3)*%
X125620000Y-99330000D03*
%TO.P,D3,4,BK*%
%TO.N,Net-(D3-Pad4)*%
X125620000Y-98570000D03*
%TD*%
D17*
%TO.P,R1,1*%
%TO.N,+5V*%
X103550000Y-88300000D03*
%TO.P,R1,2*%
%TO.N,Net-(R1-Pad2)*%
X103550000Y-89100000D03*
%TD*%
%TO.P,R2,1*%
%TO.N,+5V*%
X103550000Y-92250000D03*
%TO.P,R2,2*%
%TO.N,VCC_OK*%
X103550000Y-93050000D03*
%TD*%
D18*
%TO.P,R16,1*%
%TO.N,APP_LED_RED*%
X121317157Y-99317157D03*
%TO.P,R16,2*%
%TO.N,Net-(D3-Pad2)*%
X121882843Y-99882843D03*
%TD*%
%TO.P,R17,1*%
%TO.N,APP_LED_GREEN*%
X122017157Y-98617157D03*
%TO.P,R17,2*%
%TO.N,Net-(D3-Pad3)*%
X122582843Y-99182843D03*
%TD*%
%TO.P,R18,1*%
%TO.N,APP_LED_BLUE*%
X122717157Y-97917157D03*
%TO.P,R18,2*%
%TO.N,Net-(D3-Pad4)*%
X123282843Y-98482843D03*
%TD*%
D19*
%TO.P,R19,1*%
%TO.N,+3V3*%
X122982843Y-91367157D03*
%TO.P,R19,2*%
%TO.N,APP_CDONE*%
X122417157Y-91932843D03*
%TD*%
D20*
%TO.P,U5,1,I/O1*%
%TO.N,INT_USB_D+*%
X106137500Y-96550000D03*
%TO.P,U5,2,GND*%
%TO.N,GND*%
X106137500Y-95600000D03*
%TO.P,U5,3,I/O2*%
%TO.N,INT_USB_D-*%
X106137500Y-94650000D03*
%TO.P,U5,4,I/O2*%
%TO.N,/USB to Serial converter/INT_USB_IN_D-*%
X103862500Y-94650000D03*
%TO.P,U5,5,VBUS*%
%TO.N,+5V*%
X103862500Y-95600000D03*
%TO.P,U5,6,I/O1*%
%TO.N,/USB to Serial converter/INT_USB_IN_D+*%
X103862500Y-96550000D03*
%TD*%
D21*
%TO.P,U6,1,VCCIO_2*%
%TO.N,+3V3*%
X123275223Y-94613864D03*
%TO.P,U6,2,IOB_6a*%
%TO.N,unconnected-(U6-Pad2)*%
X122921670Y-94260311D03*
%TO.P,U6,3,IOB_9b*%
%TO.N,unconnected-(U6-Pad3)*%
X122568116Y-93906757D03*
%TO.P,U6,4,IOB_8a*%
%TO.N,unconnected-(U6-Pad4)*%
X122214563Y-93553204D03*
%TO.P,U6,5,VCC*%
%TO.N,+1V2*%
X121861010Y-93199651D03*
%TO.P,U6,6,IOB_13b*%
%TO.N,TOUCH_EVENT*%
X121507456Y-92846097D03*
%TO.P,U6,7,CDONE*%
%TO.N,APP_CDONE*%
X121153903Y-92492544D03*
%TO.P,U6,8,~{CRESET}*%
%TO.N,APP_CRESET*%
X120800349Y-92138990D03*
%TO.P,U6,9,IOB_16a*%
%TO.N,unconnected-(U6-Pad9)*%
X120446796Y-91785437D03*
%TO.P,U6,10,IOB_18a*%
%TO.N,unconnected-(U6-Pad10)*%
X120093243Y-91431884D03*
%TO.P,U6,11,IOB_20a*%
%TO.N,unconnected-(U6-Pad11)*%
X119739689Y-91078330D03*
%TO.P,U6,12,IOB_22b*%
%TO.N,unconnected-(U6-Pad12)*%
X119386136Y-90724777D03*
D22*
%TO.P,U6,13,IOB_24a*%
%TO.N,unconnected-(U6-Pad13)*%
X118413864Y-90724777D03*
%TO.P,U6,14,IOB_32a_SPI_SO*%
%TO.N,APP_ICE_MISO*%
X118060311Y-91078330D03*
%TO.P,U6,15,IOB_34a_SPI_SCK*%
%TO.N,APP_ICE_SCK*%
X117706757Y-91431884D03*
%TO.P,U6,16,IOB_35b_SPI_SS*%
%TO.N,APP_ICE_SS*%
X117353204Y-91785437D03*
%TO.P,U6,17,IOB_33b_SPI_SI*%
%TO.N,APP_ICE_MOSI*%
X116999651Y-92138990D03*
%TO.P,U6,18,IOB_31b*%
%TO.N,unconnected-(U6-Pad18)*%
X116646097Y-92492544D03*
%TO.P,U6,19,IOB_29b*%
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X116292544Y-92846097D03*
%TO.P,U6,20,IOB_25b_G3*%
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X115938990Y-93199651D03*
%TO.P,U6,21,IOB_23b*%
%TO.N,unconnected-(U6-Pad21)*%
X115585437Y-93553204D03*
%TO.P,U6,22,SPI_VCCIO1*%
%TO.N,+3V3*%
X115231884Y-93906757D03*
%TO.P,U6,23,IOT_37a*%
%TO.N,unconnected-(U6-Pad23)*%
X114878330Y-94260311D03*
%TO.P,U6,24,VPP_2V5*%
%TO.N,+2V5*%
X114524777Y-94613864D03*
D21*
%TO.P,U6,25,IOT_36b*%
%TO.N,INTERFACE_TX*%
X114524777Y-95586136D03*
%TO.P,U6,26,IOT_39a*%
%TO.N,INTERFACE_RX*%
X114878330Y-95939689D03*
%TO.P,U6,27,IOT_38b*%
%TO.N,INTERFACE_CTS*%
X115231884Y-96293243D03*
%TO.P,U6,28,IOT_41a*%
%TO.N,INTERFACE_RTS*%
X115585437Y-96646796D03*
%TO.P,U6,29,VCCPLL*%
%TO.N,/Application FPGA/APP_+1.2_PLL*%
X115938990Y-97000349D03*
%TO.P,U6,30,VCC*%
%TO.N,+1V2*%
X116292544Y-97353903D03*
%TO.P,U6,31,IOT_42b*%
%TO.N,unconnected-(U6-Pad31)*%
X116646097Y-97707456D03*
%TO.P,U6,32,IOT_43a*%
%TO.N,unconnected-(U6-Pad32)*%
X116999651Y-98061010D03*
%TO.P,U6,33,VCCIO_0*%
%TO.N,+3V3*%
X117353204Y-98414563D03*
%TO.P,U6,34,IOT_44b*%
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X117706757Y-98768116D03*
%TO.P,U6,35,IOT_46b_G0*%
%TO.N,unconnected-(U6-Pad35)*%
X118060311Y-99121670D03*
%TO.P,U6,36,IOT_48b*%
%TO.N,APP_GPIO1*%
X118413864Y-99475223D03*
D22*
%TO.P,U6,37,IOT_45a_G1*%
%TO.N,unconnected-(U6-Pad37)*%
X119386136Y-99475223D03*
%TO.P,U6,38,IOT_50b*%
%TO.N,APP_GPIO2*%
X119739689Y-99121670D03*
%TO.P,U6,39,RGB0*%
%TO.N,APP_LED_RED*%
X120093243Y-98768116D03*
%TO.P,U6,40,RGB1*%
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X120446796Y-98414563D03*
%TO.P,U6,41,RGB2*%
%TO.N,APP_LED_BLUE*%
X120800349Y-98061010D03*
%TO.P,U6,42,IOT_51a*%
%TO.N,unconnected-(U6-Pad42)*%
X121153903Y-97707456D03*
%TO.P,U6,43,IOT_49a*%
%TO.N,unconnected-(U6-Pad43)*%
X121507456Y-97353903D03*
%TO.P,U6,44,IOB_3b_G6*%
%TO.N,unconnected-(U6-Pad44)*%
X121861010Y-97000349D03*
%TO.P,U6,45,IOB_5b*%
%TO.N,APP_GPIO3*%
X122214563Y-96646796D03*
%TO.P,U6,46,IOB_0a*%
%TO.N,APP_GPIO4*%
X122568116Y-96293243D03*
%TO.P,U6,47,IOB_2a*%
%TO.N,unconnected-(U6-Pad47)*%
X122921670Y-95939689D03*
%TO.P,U6,48,IOB_4a*%
%TO.N,unconnected-(U6-Pad48)*%
X123275223Y-95586136D03*
D23*
%TO.P,U6,49,GND*%
%TO.N,GND*%
X118900000Y-95100000D03*
%TD*%
D24*
%TO.P,C6,1*%
%TO.N,+5V*%
X104943750Y-91550000D03*
%TO.P,C6,2*%
%TO.N,GND*%
X104943750Y-92850000D03*
%TD*%
%TO.P,C25,1*%
%TO.N,/Application FPGA/APP_+1.2_PLL*%
X113050000Y-98150000D03*
%TO.P,C25,2*%
%TO.N,GND*%
X113050000Y-99450000D03*
%TD*%
D25*
%TO.P,FB3,1*%
%TO.N,/Application FPGA/APP_+1.2_PLL*%
X111500000Y-97975000D03*
%TO.P,FB3,2*%
%TO.N,+1V2*%
X111500000Y-99625000D03*
%TD*%
D17*
%TO.P,R22,1*%
%TO.N,+5V*%
X103000000Y-98600000D03*
%TO.P,R22,2*%
%TO.N,SPI_VCC_OK*%
X103000000Y-99400000D03*
%TD*%
D26*
%TO.P,R29,1*%
%TO.N,Net-(P1-PadA5)*%
X103550000Y-91050000D03*
%TO.P,R29,2*%
%TO.N,GND*%
X103550000Y-90250000D03*
%TD*%
D18*
%TO.P,R20,1*%
%TO.N,+3V3*%
X115617157Y-90367157D03*
%TO.P,R20,2*%
%TO.N,APP_CRESET*%
X116182843Y-90932843D03*
%TD*%
D24*
%TO.P,C1,1*%
%TO.N,+5V*%
X104843750Y-88250000D03*
%TO.P,C1,2*%
%TO.N,GND*%
X104843750Y-89550000D03*
%TD*%
%TO.P,C5,1*%
%TO.N,+1V2*%
X110450000Y-88250000D03*
%TO.P,C5,2*%
%TO.N,GND*%
X110450000Y-89550000D03*
%TD*%
D27*
%TO.P,U2,1,Vin*%
%TO.N,+5V*%
X106506250Y-88050000D03*
%TO.P,U2,2,GND*%
%TO.N,GND*%
X106506250Y-89000000D03*
%TO.P,U2,3,EN*%
%TO.N,Net-(R1-Pad2)*%
X106506250Y-89950000D03*
%TO.P,U2,4,PG*%
%TO.N,VCC_OK*%
X108781250Y-89950000D03*
%TO.P,U2,5,Vout*%
%TO.N,+1V2*%
X108781250Y-88050000D03*
%TD*%
D24*
%TO.P,C4,1*%
%TO.N,+2V5*%
X110000000Y-98150000D03*
%TO.P,C4,2*%
%TO.N,GND*%
X110000000Y-99450000D03*
%TD*%
%TO.P,C2,1*%
%TO.N,+5V*%
X104450000Y-98150000D03*
%TO.P,C2,2*%
%TO.N,GND*%
X104450000Y-99450000D03*
%TD*%
D27*
%TO.P,U1,1,Vin*%
%TO.N,+5V*%
X106112500Y-98000000D03*
%TO.P,U1,2,GND*%
%TO.N,GND*%
X106112500Y-98950000D03*
%TO.P,U1,3,/SHDN*%
%TO.N,SPI_VCC_OK*%
X106112500Y-99900000D03*
%TO.P,U1,4,PWRGD*%
%TO.N,unconnected-(U1-Pad4)*%
X108387500Y-99900000D03*
%TO.P,U1,5,Vout*%
%TO.N,+2V5*%
X108387500Y-98000000D03*
%TD*%
D24*
%TO.P,C3,1*%
%TO.N,+3V3*%
X110243750Y-91550000D03*
%TO.P,C3,2*%
%TO.N,GND*%
X110243750Y-92850000D03*
%TD*%
D18*
%TO.P,R3,1*%
%TO.N,Net-(D1-Pad1)*%
X114867157Y-91067157D03*
%TO.P,R3,2*%
%TO.N,GND*%
X115432843Y-91632843D03*
%TD*%
D14*
%TO.P,C22,1*%
%TO.N,+3V3*%
X114775772Y-92325772D03*
%TO.P,C22,2*%
%TO.N,GND*%
X114224228Y-91774228D03*
%TD*%
D28*
%TO.P,U9,1,IN*%
%TO.N,+5V*%
X106393750Y-91250000D03*
%TO.P,U9,2,GND*%
%TO.N,GND*%
X106393750Y-92200000D03*
%TO.P,U9,3,EN*%
%TO.N,VCC_OK*%
X106393750Y-93150000D03*
%TO.P,U9,4,PG*%
%TO.N,SPI_VCC_OK*%
X108793750Y-93150000D03*
%TO.P,U9,5,OUT*%
%TO.N,+3V3*%
X108793750Y-91250000D03*
%TD*%
D29*
%TO.P,R25,1*%
%TO.N,+3V3*%
X118600000Y-87950000D03*
%TO.P,R25,2*%
%TO.N,/Application FPGA/APP_FLASH_WP*%
X117800000Y-87950000D03*
%TD*%
D30*
%TO.P,C23,1*%
%TO.N,+3V3*%
X112890000Y-89850000D03*
%TO.P,C23,2*%
%TO.N,GND*%
X112110000Y-89850000D03*
%TD*%
D31*
%TO.P,U3,1,RTS(P1.4)*%
%TO.N,INTERFACE_RTS*%
X112400000Y-96500000D03*
%TO.P,U3,2,CTS(P1.5)*%
%TO.N,INTERFACE_CTS*%
X112400000Y-96000000D03*
%TO.P,U3,3,RX(PP1.6)*%
%TO.N,INTERFACE_RX*%
X112400000Y-95500000D03*
%TO.P,U3,4,TX(P1.7)*%
%TO.N,INTERFACE_TX*%
X112400000Y-95000000D03*
%TO.P,U3,5,RST*%
%TO.N,unconnected-(U3-Pad5)*%
X112400000Y-94500000D03*
%TO.P,U3,6,UDP(P3.6)*%
%TO.N,INT_USB_D+*%
X108000000Y-94500000D03*
%TO.P,U3,7,UDM(P3.7)*%
%TO.N,INT_USB_D-*%
X108000000Y-95000000D03*
%TO.P,U3,8,GND*%
%TO.N,GND*%
X108000000Y-95500000D03*
%TO.P,U3,9,VCC*%
%TO.N,+3V3*%
X108000000Y-96000000D03*
%TO.P,U3,10,V33*%
X108000000Y-96500000D03*
%TD*%
D11*
%TO.P,C26,1*%
%TO.N,+3V3*%
X120050000Y-89240000D03*
%TO.P,C26,2*%
%TO.N,GND*%
X120050000Y-88460000D03*
%TD*%
D29*
%TO.P,R23,1*%
%TO.N,+3V3*%
X118600000Y-89050000D03*
%TO.P,R23,2*%
%TO.N,APP_ICE_SS*%
X117800000Y-89050000D03*
%TD*%
D32*
%TO.P,R26,1*%
%TO.N,+3V3*%
X112100000Y-88900000D03*
%TO.P,R26,2*%
%TO.N,/Application FPGA/APP_FLASH_HOLD*%
X112900000Y-88900000D03*
%TD*%
D20*
%TO.P,U10,1,QC*%
%TO.N,TOUCH_EVENT*%
X123837500Y-89950000D03*
%TO.P,U10,2,VSS*%
%TO.N,GND*%
X123837500Y-89000000D03*
%TO.P,U10,3,TCH*%
%TO.N,Net-(C27-Pad1)*%
X123837500Y-88050000D03*
%TO.P,U10,4,AHLB*%
%TO.N,GND*%
X121562500Y-88050000D03*
%TO.P,U10,5,VDD*%
%TO.N,+3V3*%
X121562500Y-89000000D03*
%TO.P,U10,6,TOG*%
%TO.N,GND*%
X121562500Y-89950000D03*
%TD*%
D33*
%TO.P,U8,1,~{CS}*%
%TO.N,APP_ICE_SS*%
X116650000Y-89350000D03*
%TO.P,U8,2,DO(IO1)*%
%TO.N,APP_ICE_MOSI*%
X116650000Y-88850000D03*
%TO.P,U8,3,IO2*%
%TO.N,/Application FPGA/APP_FLASH_WP*%
X116650000Y-88350000D03*
%TO.P,U8,4,GND*%
%TO.N,GND*%
X116650000Y-87850000D03*
%TO.P,U8,5,DI(IO0)*%
%TO.N,APP_ICE_MISO*%
X114150000Y-87850000D03*
%TO.P,U8,6,CLK*%
%TO.N,APP_ICE_SCK*%
X114150000Y-88350000D03*
%TO.P,U8,7,IO3*%
%TO.N,/Application FPGA/APP_FLASH_HOLD*%
X114150000Y-88850000D03*
%TO.P,U8,8,VCC*%
%TO.N,+3V3*%
X114150000Y-89350000D03*
D34*
%TO.P,U8,9,EXP*%
%TO.N,unconnected-(U8-Pad9)*%
X115400000Y-88600000D03*
%TD*%
D32*
%TO.P,R30,1*%
%TO.N,Net-(C27-Pad1)*%
X125350000Y-89700000D03*
%TO.P,R30,2*%
%TO.N,/Application FPGA/TOUCH_PAD*%
X126150000Y-89700000D03*
%TD*%
D35*
%TO.P,C27,1*%
%TO.N,Net-(C27-Pad1)*%
X125360000Y-88700000D03*
%TO.P,C27,2*%
%TO.N,GND*%
X126140000Y-88700000D03*
%TD*%
D36*
%TO.P,C8,1*%
%TO.N,/Application FPGA/TOUCH_PAD*%
X126200000Y-95475000D03*
%TO.P,C8,2*%
X126200000Y-92525000D03*
%TD*%
D37*
%TO.P,P1,A1,GND*%
%TO.N,GND*%
X101050000Y-96750000D03*
%TO.P,P1,A2,TX1+*%
%TO.N,unconnected-(P1-PadA2)*%
X101050000Y-96250000D03*
%TO.P,P1,A3,TX1-*%
%TO.N,unconnected-(P1-PadA3)*%
X101050000Y-95750000D03*
%TO.P,P1,A4,VBUS*%
%TO.N,+5V*%
X101050000Y-95250000D03*
%TO.P,P1,A5,CC*%
%TO.N,Net-(P1-PadA5)*%
X101050000Y-94750000D03*
%TO.P,P1,A6,D+*%
%TO.N,/USB to Serial converter/INT_USB_IN_D+*%
X101050000Y-94250000D03*
%TO.P,P1,A7,D-*%
%TO.N,/USB to Serial converter/INT_USB_IN_D-*%
X101050000Y-93750000D03*
%TO.P,P1,A8,SBU1*%
%TO.N,unconnected-(P1-PadA8)*%
X101050000Y-93250000D03*
%TO.P,P1,A9,VBUS*%
%TO.N,+5V*%
X101050000Y-92750000D03*
%TO.P,P1,A10,RX2-*%
%TO.N,unconnected-(P1-PadA10)*%
X101050000Y-92250000D03*
%TO.P,P1,A11,RX2+*%
%TO.N,unconnected-(P1-PadA11)*%
X101050000Y-91750000D03*
%TO.P,P1,A12,GND*%
%TO.N,GND*%
X101050000Y-91250000D03*
D38*
%TO.P,P1,S1,SHIELD*%
X101100000Y-97500000D03*
%TD*%
D32*
%TO.P,R24,1*%
%TO.N,+3V3*%
X112100000Y-87950000D03*
%TO.P,R24,2*%
%TO.N,APP_ICE_SCK*%
X112900000Y-87950000D03*
%TD*%
D39*
%TO.N,GND*%
X113700000Y-91262489D03*
X126850000Y-89100000D03*
X109499292Y-92457430D03*
X105643750Y-92350000D03*
X114400000Y-100200000D03*
X102200000Y-90500000D03*
X107017510Y-95517510D03*
X112200000Y-91600000D03*
X117900000Y-96100000D03*
X116900000Y-95100000D03*
X114080000Y-98030000D03*
X110450000Y-90350000D03*
X116345293Y-87690236D03*
X119850000Y-94100000D03*
X118900000Y-93100000D03*
X102800000Y-90200000D03*
X102987526Y-89456771D03*
X124200000Y-91350000D03*
X102200000Y-91150000D03*
X111450000Y-91600000D03*
X113250000Y-91750000D03*
X114400000Y-99524500D03*
X117900000Y-94100000D03*
X105593750Y-89200000D03*
X118900000Y-95100000D03*
X122700000Y-89500000D03*
X108600500Y-99100000D03*
X106500000Y-99200000D03*
X120500000Y-87950000D03*
X119850000Y-96100000D03*
X102400000Y-98000000D03*
X102400000Y-97350000D03*
X124500000Y-92000000D03*
X120900000Y-95100000D03*
X111400000Y-89850000D03*
X115800000Y-92050000D03*
X118850000Y-97100000D03*
%TO.N,+5V*%
X105543750Y-88200000D03*
X105593750Y-91250000D03*
X102500000Y-91950000D03*
X103500000Y-98000000D03*
X102300000Y-92650000D03*
X102350000Y-95700000D03*
X102800000Y-88050000D03*
X102350000Y-96450000D03*
%TO.N,+3V3*%
X114700000Y-93400000D03*
X123371981Y-90871981D03*
X111400000Y-88850000D03*
X119300000Y-89900000D03*
X107256692Y-97601839D03*
X123522528Y-93677472D03*
X116610383Y-100162874D03*
X109550000Y-96150000D03*
X114599988Y-90338489D03*
X109543750Y-91350000D03*
X109350000Y-97050000D03*
X109400000Y-95350000D03*
X120050000Y-90000000D03*
X126850000Y-98600000D03*
X113700000Y-90150000D03*
%TO.N,+2V5*%
X111400000Y-90800000D03*
X113100000Y-93550000D03*
X107300000Y-98300000D03*
%TO.N,+1V2*%
X122900238Y-93064220D03*
X115875683Y-97957964D03*
X110518912Y-100172510D03*
X109750000Y-88100000D03*
%TO.N,APP_CDONE*%
X122750000Y-90450000D03*
%TO.N,APP_CRESET*%
X116400000Y-90250000D03*
X120896377Y-90771778D03*
%TO.N,APP_ICE_SCK*%
X113500000Y-88388000D03*
X117562000Y-90050000D03*
%TO.N,SPI_VCC_OK*%
X107400000Y-93450000D03*
X102463948Y-100180819D03*
%TO.N,INTERFACE_TX*%
X110707631Y-98894377D03*
%TO.N,Net-(P1-PadA5)*%
X102346800Y-94903200D03*
X103206258Y-91637342D03*
%TO.N,APP_ICE_SS*%
X118183368Y-88496982D03*
%TO.N,APP_ICE_MOSI*%
X115986240Y-89094334D03*
%TO.N,APP_ICE_MISO*%
X118400000Y-89900000D03*
X114606642Y-87860883D03*
%TO.N,INTERFACE_RX*%
X112400000Y-100100000D03*
%TO.N,INTERFACE_RTS*%
X115001531Y-97152723D03*
X115142397Y-99910606D03*
%TO.N,INTERFACE_CTS*%
X117188553Y-99431165D03*
X114400000Y-96762000D03*
%TO.N,APP_GPIO1*%
X118700000Y-100050000D03*
%TO.N,APP_GPIO2*%
X120500000Y-100050000D03*
%TO.N,APP_GPIO3*%
X124000000Y-98400500D03*
%TO.N,APP_GPIO4*%
X124796800Y-98396800D03*
%TD*%
D40*
%TO.N,GND*%
X114400000Y-99524500D02*
X113124500Y-99524500D01*
X106137500Y-95600000D02*
X106935020Y-95600000D01*
X124750000Y-92250000D02*
X124750000Y-92450000D01*
D41*
X101900000Y-97500000D02*
X102400000Y-98000000D01*
D40*
X109891862Y-92850000D02*
X110243750Y-92850000D01*
X123150000Y-89050000D02*
X122700000Y-89500000D01*
X113524228Y-92474228D02*
X113250000Y-92200000D01*
X115174228Y-99175772D02*
X115224228Y-99175772D01*
X121562500Y-88050000D02*
X120600000Y-88050000D01*
X112350000Y-92260000D02*
X112350000Y-91750000D01*
X102400000Y-97350000D02*
X102400000Y-98000000D01*
X104950000Y-92750000D02*
X105150000Y-92750000D01*
X105150000Y-92750000D02*
X105650000Y-92250000D01*
X124750000Y-92450000D02*
X124475772Y-92724228D01*
X124500000Y-92000000D02*
X124750000Y-92250000D01*
X106312500Y-99200000D02*
X106112500Y-99000000D01*
X115432843Y-91632843D02*
X115432843Y-91682843D01*
X103550000Y-89820552D02*
X103287980Y-89558532D01*
X123837500Y-89050000D02*
X123150000Y-89050000D01*
X114400000Y-99524500D02*
X114825500Y-99524500D01*
X105700000Y-89000000D02*
X105250000Y-89450000D01*
X114825500Y-99524500D02*
X115174228Y-99175772D01*
X126450000Y-88700000D02*
X126850000Y-89100000D01*
X106506250Y-89000000D02*
X105793750Y-89000000D01*
X106500000Y-99200000D02*
X104700000Y-99200000D01*
D41*
X101100000Y-97500000D02*
X101900000Y-97500000D01*
D40*
X108000000Y-95450000D02*
X107085020Y-95450000D01*
X110450000Y-89550000D02*
X110450000Y-90350000D01*
X107085020Y-95450000D02*
X107017510Y-95517510D01*
X101800000Y-96750000D02*
X102400000Y-97350000D01*
X113712489Y-91262489D02*
X114224228Y-91774228D01*
X113700000Y-91262489D02*
X113712489Y-91262489D01*
X103287980Y-89537980D02*
X103206771Y-89456771D01*
X109450000Y-99450000D02*
X110000000Y-99450000D01*
X103287980Y-89558532D02*
X103287980Y-89537980D01*
X116345293Y-87690236D02*
X116490236Y-87690236D01*
X114400000Y-100200000D02*
X114749511Y-100549511D01*
X124200000Y-91600000D02*
X123775772Y-92024228D01*
X105250000Y-89450000D02*
X104850000Y-89450000D01*
X106935020Y-95600000D02*
X107017510Y-95517510D01*
X113250000Y-92200000D02*
X113250000Y-91750000D01*
X120050000Y-88460000D02*
X120050000Y-88500000D01*
X115432843Y-91682843D02*
X115800000Y-92050000D01*
X105800000Y-92100000D02*
X105650000Y-92250000D01*
X106506250Y-89000000D02*
X105700000Y-89000000D01*
X101050000Y-96750000D02*
X101800000Y-96750000D01*
X102100000Y-91250000D02*
X102200000Y-91150000D01*
X101050000Y-91250000D02*
X102100000Y-91250000D01*
X120600000Y-88050000D02*
X120500000Y-87950000D01*
X120250000Y-87950000D02*
X120500000Y-87950000D01*
X104700000Y-99200000D02*
X104450000Y-99450000D01*
X114080000Y-98030000D02*
X114524228Y-98474228D01*
X114524228Y-98474228D02*
X114524228Y-98475772D01*
X112350000Y-91750000D02*
X112200000Y-91600000D01*
X120050000Y-88150000D02*
X120250000Y-87950000D01*
X115356905Y-100549511D02*
X115924228Y-99982188D01*
X121562500Y-90000000D02*
X122200000Y-90000000D01*
X111450000Y-92260000D02*
X111450000Y-91600000D01*
X108600500Y-99100000D02*
X109100000Y-99100000D01*
X106400000Y-92100000D02*
X105800000Y-92100000D01*
X103206771Y-89456771D02*
X102987526Y-89456771D01*
X124200000Y-91350000D02*
X124200000Y-91600000D01*
X109100000Y-99100000D02*
X109450000Y-99450000D01*
X120050000Y-88500000D02*
X120050000Y-88150000D01*
X126140000Y-88700000D02*
X126450000Y-88700000D01*
X116490236Y-87690236D02*
X116650000Y-87850000D01*
X106500000Y-99200000D02*
X106312500Y-99200000D01*
X115924228Y-99982188D02*
X115924228Y-99875772D01*
X114749511Y-100549511D02*
X115356905Y-100549511D01*
X109499292Y-92457430D02*
X109891862Y-92850000D01*
X103550000Y-90250000D02*
X103550000Y-89820552D01*
X122200000Y-90000000D02*
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%TO.N,Net-(D3-Pad2)*%
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%TO.N,/USB to Serial converter/INT_USB_IN_D-*%
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D40*
%TO.N,INT_USB_D-*%
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D42*
%TO.N,INTERFACE_TX*%
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D40*
%TO.N,Net-(P1-PadA5)*%
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D42*
%TO.N,APP_ICE_SS*%
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%TO.N,APP_ICE_MOSI*%
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%TO.N,APP_ICE_MISO*%
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X118390791Y-89900000D02*
X117842485Y-90448306D01*
X117842485Y-90860504D02*
X118060311Y-91078330D01*
X114606642Y-87860883D02*
X114595759Y-87850000D01*
X114595759Y-87850000D02*
X114150000Y-87850000D01*
%TO.N,INTERFACE_RX*%
X110862980Y-98362980D02*
X110862980Y-96187020D01*
X112400000Y-100100000D02*
X112400000Y-99269013D01*
X114000000Y-96300000D02*
X114518019Y-96300000D01*
X111200000Y-98700000D02*
X110862980Y-98362980D01*
X114518019Y-96300000D02*
X114878330Y-95939689D01*
X111830987Y-98700000D02*
X111200000Y-98700000D01*
X111550000Y-95500000D02*
X113200000Y-95500000D01*
X113200000Y-95500000D02*
X114000000Y-96300000D01*
X110862980Y-96187020D02*
X111550000Y-95500000D01*
X112400000Y-99269013D02*
X111830987Y-98700000D01*
%TO.N,INTERFACE_RTS*%
X115001531Y-97152723D02*
X114930243Y-97224011D01*
X114024011Y-97224011D02*
X113675000Y-96875000D01*
X114930243Y-97224011D02*
X114024011Y-97224011D01*
X114000000Y-97200000D02*
X114024011Y-97224011D01*
X113675000Y-96875000D02*
X114000000Y-97200000D01*
X113300000Y-96500000D02*
X113675000Y-96875000D01*
X112450000Y-96500000D02*
X113300000Y-96500000D01*
X115082233Y-97150000D02*
X115585437Y-96646796D01*
%TO.N,INTERFACE_CTS*%
X114100000Y-96750000D02*
X114775127Y-96750000D01*
X114775127Y-96750000D02*
X115231884Y-96293243D01*
X112450000Y-96000000D02*
X113350000Y-96000000D01*
X113350000Y-96000000D02*
X114100000Y-96750000D01*
%TO.N,Net-(C27-Pad1)*%
X123837500Y-88050000D02*
X124550000Y-88050000D01*
X124800000Y-89600000D02*
X124900000Y-89700000D01*
X124600000Y-88100000D02*
X124800000Y-88300000D01*
X124800000Y-88300000D02*
X124800000Y-88700000D01*
X125360000Y-88700000D02*
X124800000Y-88700000D01*
X124900000Y-89700000D02*
X125350000Y-89700000D01*
X124800000Y-88700000D02*
X124800000Y-89600000D01*
X124550000Y-88050000D02*
X124600000Y-88100000D01*
%TO.N,/Application FPGA/APP_FLASH_WP*%
X117400000Y-88000000D02*
X117800000Y-88000000D01*
X116650000Y-88350000D02*
X117050000Y-88350000D01*
X117050000Y-88350000D02*
X117400000Y-88000000D01*
%TO.N,/Application FPGA/APP_FLASH_HOLD*%
X112950000Y-88850000D02*
X114150000Y-88850000D01*
X112900000Y-88900000D02*
X112950000Y-88850000D01*
%TO.N,APP_GPIO1*%
X118413864Y-99475223D02*
X118413864Y-99763864D01*
X118413864Y-99763864D02*
X118700000Y-100050000D01*
%TO.N,APP_GPIO2*%
X120500000Y-100050000D02*
X120500000Y-99881982D01*
X119739689Y-99121670D02*
X119739689Y-99121671D01*
X120500000Y-99881982D02*
X120184009Y-99565991D01*
X119739689Y-99121671D02*
X120184009Y-99565991D01*
%TO.N,APP_GPIO3*%
X123968267Y-98400500D02*
X122214563Y-96646796D01*
X124000000Y-98400500D02*
X123968267Y-98400500D01*
%TO.N,APP_GPIO4*%
X122568116Y-96293243D02*
X122568116Y-96315233D01*
X122568116Y-96315233D02*
X124649683Y-98396800D01*
X124649683Y-98396800D02*
X124796800Y-98396800D01*
%TO.N,TOUCH_EVENT*%
X123837500Y-89950000D02*
X123837500Y-91059117D01*
X122334228Y-92665772D02*
X121687781Y-92665772D01*
X123737989Y-91262011D02*
X122334228Y-92665772D01*
X121687781Y-92665772D02*
X121507456Y-92846097D01*
X123837500Y-91059117D02*
X123737989Y-91158628D01*
X123737989Y-91158628D02*
X123737989Y-91262011D01*
%TO.N,Net-(D1-Pad1)*%
X114408116Y-90800000D02*
X114408616Y-90800500D01*
X112985000Y-90850000D02*
X113035000Y-90800000D01*
X114600500Y-90800500D02*
X114867157Y-91067157D01*
X113035000Y-90800000D02*
X114408116Y-90800000D01*
X114408616Y-90800500D02*
X114600500Y-90800500D01*
%TO.N,/Application FPGA/TOUCH_PAD*%
X126900000Y-89900000D02*
X126950000Y-89950000D01*
X126950000Y-89950000D02*
X126950000Y-91200000D01*
X126700000Y-89700000D02*
X126900000Y-89900000D01*
X126150000Y-89700000D02*
X126700000Y-89700000D01*
%TD*%
%TA.AperFunction,Conductor*%
%TO.N,/Application FPGA/TOUCH_PAD*%
G36*
X127387621Y-90220002D02*
G01*
X127434114Y-90273658D01*
X127445500Y-90326000D01*
X127445500Y-97674000D01*
X127425498Y-97742121D01*
X127371842Y-97788614D01*
X127319500Y-97800000D01*
X125426000Y-97800000D01*
X125357879Y-97779998D01*
X125311386Y-97726342D01*
X125300000Y-97674000D01*
X125300000Y-90326000D01*
X125320002Y-90257879D01*
X125373658Y-90211386D01*
X125426000Y-90200000D01*
X127319500Y-90200000D01*
X127387621Y-90220002D01*
G37*
%TD.AperFunction*%
%TD*%
M02*
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