tillitis-key/hw/application_fpga/core
Joachim Strömbergson 7e26c742bf
fpga: Add new SPI access control logis
New logic looks at instruction execution from a defined
      trampoline address to enable stateful SPI access.

      The access is disabled as soon as an instruction is executed
      from any address in RAM.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-07-11 11:04:07 +02:00
..
picorv32 FPGA: Ignore warnings about blocking assignment in clocked processes 2024-06-17 15:37:13 +02:00
timer Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
tk1 fpga: Add new SPI access control logis 2024-07-11 11:04:07 +02:00
touch_sense Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
trng Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
uart Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
uds Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00