72 lines
1.4 KiB
Plaintext
72 lines
1.4 KiB
Plaintext
/*
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* Copyright (C) 2022 - Tillitis AB
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* SPDX-License-Identifier: GPL-2.0-only
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*/
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OUTPUT_ARCH( "riscv" )
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ENTRY(_start)
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MEMORY
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{
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/* TODO ROM size should be adjusted, RAM should be ok. */
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ROM (rx) : ORIGIN = 0x00000000, LENGTH = 0x20000 /* 128 KB */
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RAM (rwx) : ORIGIN = 0x40000000, LENGTH = 0x20000 /* 128 KB */
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}
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SECTIONS
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{
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.text.init :
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{
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*(.text.init)
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} >ROM
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.htif :
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{
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. = ALIGN(0x00000000);
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*(.htif)
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} >ROM
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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*(.srodata) /* .rodata sections (constants, strings, etc.) */
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*(.srodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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_etext = .;
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_sidata = _etext;
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} >ROM
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.data : AT (_etext)
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{
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. = ALIGN(4);
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_sdata = .;
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. = ALIGN(4);
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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*(.sdata) /* .sdata sections */
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*(.sdata*) /* .sdata* sections */
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. = ALIGN(4);
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_edata = .;
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} >RAM
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/* Uninitialized data section */
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.bss :
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{
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. = ALIGN(4);
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_sbss = .;
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*(.bss)
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*(.bss*)
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*(.sbss)
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*(.sbss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .;
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} >RAM
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/* Init stack to _ebss + size */
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}
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