mirror of
https://github.com/tillitis/tillitis-key1.git
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774 lines
22 KiB
Python
Executable File
774 lines
22 KiB
Python
Executable File
#!/usr/bin/env python
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#
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# Copyright (C) 2021
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#
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# * Trammell Hudson <hudson@trmm.net>
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# * Matthew Mets https://github.com/cibomahto
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# * Peter Lawrence https://github.com/majbthrd
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#
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# Permission to use, copy, modify, and/or distribute this software
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# for any purpose with or without fee is hereby granted, provided
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# that the above copyright notice and this permission notice
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# appear in all copies.
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#
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# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
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# WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
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# WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
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# AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR
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# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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# LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT,
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# NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
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# CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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#
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"""NVCM programming tool for iCE40 FPGAs"""
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import os
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import sys
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import struct
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from time import sleep
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from iceflasher import IceFlasher
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from pybin2nvcm import pybin2nvcm
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def assert_bytes_equal(
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name: str,
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expected: bytes,
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val: bytes) -> None:
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""" Check if two bytes objects are equal
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Keyword arguments:
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name -- Description to print if the assertion fails
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expected -- Expected value
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val -- Value to check
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"""
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if expected != val:
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expected_str = ' '.join([f'{x:02x}' for x in expected])
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val_str = ' '.join([f'{x:02x}' for x in val])
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raise AssertionError(
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f'{name} expected:[{expected_str}] read:[{val_str}]')
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class Nvcm():
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"""NVCM programming interface for ICE40 FPGAs"""
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id_table = {
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0x06: "ICE40LP8K / ICE40HX8K",
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0x07: "ICE40LP4K / ICE40HX4K",
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0x08: "ICE40LP1K / ICE40HX1K",
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0x09: "ICE40LP384",
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0x0E: "ICE40LP1K_SWG16",
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0x0F: "ICE40LP640_SWG16",
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0x10: "ICE5LP1K",
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0x11: "ICE5LP2K",
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0x12: "ICE5LP4K",
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0x14: "ICE40UL1K",
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0x15: "ICE40UL640",
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0x20: "ICE40UP5K",
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0x21: "ICE40UP3K",
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}
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banks = {
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'nvcm': 0x00,
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'trim': 0x10,
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'sig': 0x20
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}
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def __init__(
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self,
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pins: dict,
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spi_speed: int,
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debug: bool = False) -> None:
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self.pins = pins
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self.debug = debug
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self.flasher = IceFlasher()
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self.flasher.gpio_put(self.pins['5v_en'], False)
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self.flasher.gpio_put(self.pins['crst'], False)
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# Configure pins for talking to ice40
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self.flasher.gpio_set_direction(pins['ss'], True)
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self.flasher.gpio_set_direction(pins['mosi'], True)
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self.flasher.gpio_set_direction(pins['sck'], True)
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self.flasher.gpio_set_direction(pins['miso'], False)
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self.flasher.gpio_set_direction(pins['5v_en'], True)
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self.flasher.gpio_set_direction(pins['crst'], True)
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self.flasher.gpio_set_direction(pins['cdne'], False)
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self.flasher.spi_configure(
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pins['sck'],
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pins['ss'],
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pins['mosi'],
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pins['miso'],
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spi_speed
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)
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def power_on(self) -> None:
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"""Enable power to the DUT"""
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self.flasher.gpio_put(self.pins['5v_en'], True)
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def power_off(self) -> None:
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"""Disable power to the DUT"""
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self.flasher.gpio_put(self.pins['5v_en'], False)
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def enable(self, chip_select: bool, reset: bool = True) -> None:
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"""Set the CS and Reset pin states"""
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self.flasher.gpio_put(self.pins['ss'], chip_select)
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self.flasher.gpio_put(self.pins['crst'], reset)
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def writehex(self, hex_data: str, toggle_cs: bool = True) -> None:
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"""Write SPI data to the target device
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Keyword arguments:
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hex_data -- data to send (formatted as a string of hex data)
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toggle_cs -- If true, automatically lower the CS pin before
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transmit, and raise it after transmit
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"""
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if self.debug and not hex_data == "0500":
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print("TX", hex_data)
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data = bytes.fromhex(hex_data)
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self.flasher.spi_write(data, toggle_cs)
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def sendhex(self, hex_data: str) -> bytes:
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"""Perform a full-duplex write/read on the target device
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Keyword arguments:
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s -- data to send (formatted as a string of hex data)
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"""
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if self.debug and not hex_data == "0500":
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print("TX", hex_data)
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bytes_data = bytes.fromhex(hex_data)
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ret = self.flasher.spi_rxtx(bytes_data)
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if self.debug and not hex_data == "0500":
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print("RX", ret.hex())
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return ret
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def delay(self, count: int) -> None:
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"""'Delay' by sending clocks with CS de-asserted
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Keyword arguments:
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count -- Number of bytes to clock
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"""
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self.flasher.spi_clk_out(count)
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def init(self) -> None:
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"""Reboot the part and enter SPI command mode"""
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if self.debug:
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print("init")
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self.enable(True, True)
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self.enable(True, False)
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self.enable(False, False)
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self.enable(False, True)
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sleep(0.1)
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self.enable(True, True)
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def status_wait(self) -> None:
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"""Wait for the status register to clear"""
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for _ in range(0, 1000):
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self.delay(1250)
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ret = self.sendhex("0500")
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status = struct.unpack('>H', ret)[0]
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if (status & 0x00c1) == 0:
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return
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raise ValueError("status failed to clear")
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def command(self, cmd: str) -> None:
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"""Send a command to the NVCM state machine"""
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self.writehex(cmd)
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self.status_wait()
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self.delay(2)
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def pgm_enable(self) -> None:
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"""Enable program mode"""
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self.command("06")
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def pgm_disable(self) -> None:
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"""Disable program mode"""
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self.command("04")
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def enable_access(self) -> None:
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"""Send the 'access NVCM' instruction"""
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self.command("7eaa997e010e")
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def read_bytes(
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self,
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cmd: int,
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address: int,
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length: int = 8) -> bytes:
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"""Read NVCM memory and return as a byte array
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Known read commands are:
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0x03: Read NVCM bank
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0x84: Read RF
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Keyword arguments:
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cmd -- Read command
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address -- NVCM memory address to read from
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length -- Number of bytes to read
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"""
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msg = ''
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msg += (f"{cmd:02x}{address:06x}")
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msg += ("00" * 9) # dummy bytes
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msg += ("00" * length) # read
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ret = self.sendhex(msg)
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return ret[4 + 9:]
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def read_int(
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self,
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cmd: int,
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address: int) -> int:
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"""Read NVCM memory and return as an integer
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Read commands are documented in read_bytes
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Keyword arguments:
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cmd -- Read command
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address -- NVCM memory address to read from
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"""
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val = self.read_bytes(cmd, address, 8)
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return struct.unpack('>Q', val)[0]
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def write(self, cmd: int, address: int, data: str) -> None:
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"""Write data to the NVCM memory
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Keyword arguments:
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cmd -- Write command
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address -- NVCM memory address to write to
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length -- Number of bytes to write
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"""
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self.writehex(f"{cmd:02x}{address:06x}" + data)
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try:
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self.status_wait()
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except Exception as exc:
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raise IOError(
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f"WRITE FAILED: cmd={cmd:02x} address={address:%06x} data={data}"
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) from exc
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self.delay(2)
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def bank_select(self, bank: str) -> None:
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""" Select the active NVCM bank to target
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Keyword arguments:
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bank -- NVCM bank: nvcm, trim, or sig
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"""
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self.write(0x83, 0x000025, f"{self.banks[bank]:02x}")
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def read_trim(self) -> int:
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"""Read the RF trim register"""
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self.enable_access()
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# ! Shift in READ_RF(0x84) instruction;
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# SDR 104 TDI(0x00000000000000000004000021);
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val = self.read_int(0x84, 0x000020)
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self.delay(2)
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# print("FSM Trim Register %x" % (x))
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self.bank_select('nvcm')
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return val
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def write_trim(self, data: str) -> None:
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"""Write to the RF trim register
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Keyword arguments:
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data -- Hex-formatted string, should be 8 bytes of data
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"""
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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self.write(0x82, 0x000020, data)
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def nvcm_enable(self) -> None:
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"""Enable NVCM interface by sending knock command"""
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if self.debug:
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print("enable")
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self.enable_access()
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# ! Setup Reading Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000230000000004000041;
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if self.debug:
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print("setup_nvcm")
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self.write_trim("00000000c4000000")
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def enable_trim(self) -> None:
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"""Enable NVCM write commands"""
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# ! Setup Programming Parameter in Trim Registers;
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# ! Shift in Trim setup-NVCM instruction;
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# TRIMInstruction[1] = 0x000000430F4FA80004000041;
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self.write_trim("0015f2f0c2000000")
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def trim_blank_check(self) -> None:
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"""Check that the NVCM trim parameters are blank"""
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print("NVCM Trim_Parameter_OTP blank check")
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self.bank_select('trim')
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ret = self.read_bytes(0x03, 0x000020, 1)[0]
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self.bank_select('nvcm')
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if ret != 0x00:
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raise ValueError(
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'NVCM Trim_Parameter_OTP Block not blank. ' +
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f'(read: 0x{ret:%02x})')
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def blank_check(self, total_fuse: int) -> None:
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"""Check if sub-section of the NVCM memory is blank
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To check all of the memory, first determine how much NVCM
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memory your part actually has, or at least the size of the
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file that you plan to write to it.
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Keyword arguments:
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total_fuse -- Number of fuse bytes to read before stopping
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"""
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self.bank_select('nvcm')
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status = True
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print("NVCM main memory blank check")
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contents = self.read_bytes(0x03, 0x000000, total_fuse)
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for index in range(0, total_fuse):
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val = contents[index]
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if self.debug:
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print(f"{index:08x}: {val:02x}")
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if val != 0:
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print(
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f"{index:08x}: NVCM Memory Block is not blank.",
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file=sys.stderr)
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status = False
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self.bank_select('nvcm')
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if not status:
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raise ValueError("NVCM Main Memory not blank")
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def program(self, rows: list[str]) -> None:
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"""Program the memory by running an NVCM command sequence
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Keyword arguments:
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rows -- List of NVCM commands to run, formatted as hex
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strings
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"""
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print("NVCM Program main memory")
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self.bank_select('nvcm')
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self.enable_trim()
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self.pgm_enable()
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i = 0
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for row in rows:
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# print('data for row:',i, row)
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if i % (1024 * 8) == 0:
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print("%6d / %6d bytes" % (i, len(rows) * 8))
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i += 8
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try:
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self.command(row)
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except Exception as exc:
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raise IOError(
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"programming failed, row:{row}"
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) from exc
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self.pgm_disable()
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def write_trim_pages(self, lock_bits: str) -> None:
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"""Write to the trim pages
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The trim pages can be written multiple times. Known usages
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are to configure the device for NVCM boot, and to secure
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the device by disabling the NVCM interface.
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Keyword arguments:
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lock_bits -- Mas of bits to set in the trim pages
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"""
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self.bank_select('nvcm')
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self.enable_trim()
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self.bank_select('trim')
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self.pgm_enable()
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# ! Program Security Bit row 1;
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# ! Shift in PAGEPGM instruction;
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# SDR 96 TDI(0x000000008000000C04000040);
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# ! Program Security Bit row 2;
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# SDR 96 TDI(0x000000008000000C06000040);
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# ! Program Security Bit row 3;
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# SDR 96 TDI(0x000000008000000C05000040);
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# ! Program Security Bit row 4;
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# SDR 96 TDI(0x00000000800000C07000040);
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self.write(0x02, 0x000020, lock_bits)
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self.write(0x02, 0x000060, lock_bits)
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self.write(0x02, 0x0000a0, lock_bits)
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self.write(0x02, 0x0000e0, lock_bits)
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self.pgm_disable()
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# verify a read back
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val = self.read_int(0x03, 0x000020)
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self.bank_select('nvcm')
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lock_bits_int = int(lock_bits, 16)
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if val & lock_bits_int != lock_bits_int:
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raise ValueError(
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"Failed to write trim lock bits: " +
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f"{val:016x} != expected {lock_bits_int:016x}"
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)
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print(f"New state {val:016x}")
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def trim_secure(self) -> None:
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"""Disable NVCM readout by programming the security bits
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Use with caution- the device will no longer respond to NVCM
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commands after this command runs.
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"""
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print("NVCM Secure")
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trim = self.read_trim()
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if (trim >> 60) & 0x3 != 0:
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print(
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"NVCM already secure? trim=%016x" %
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(trim), file=sys.stderr)
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self.write_trim_pages("3000000100000000")
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def trim_program(self) -> None:
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"""Configure the device to boot from NVCM (?)
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Use with caution- the device will no longer boot from
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external SPI flash after this command runs.
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"""
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print("NVCM Program Trim_Parameter_OTP")
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self.write_trim_pages("0015f2f1c4000000")
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def info(self) -> None:
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""" Print the contents of the configuration registers """
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self.bank_select('sig')
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sig1 = self.read_int(0x03, 0x000000)
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self.bank_select('sig')
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sig2 = self.read_int(0x03, 0x000008)
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# have to switch back to nvcm bank before switching to trim?
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self.bank_select('nvcm')
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trim = self.read_trim()
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# self.bank_select('nvcm')
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self.bank_select('trim')
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trim0 = self.read_int(0x03, 0x000020)
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self.bank_select('trim')
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trim1 = self.read_int(0x03, 0x000060)
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self.bank_select('trim')
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trim2 = self.read_int(0x03, 0x0000a0)
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self.bank_select('trim')
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trim3 = self.read_int(0x03, 0x0000e0)
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self.bank_select('nvcm')
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secured = (trim >> 60) & 0x3
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device_id = (sig1 >> 56) & 0xFF
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print("Device: %s (%02x) secure=%d" % (
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self.id_table.get(device_id, "Unknown"),
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device_id,
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secured
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))
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print("Sig 0: %016x" % (sig1))
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print("Sig 1: %016x" % (sig2))
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print("TrimRF: %016x" % (trim))
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print("Trim 0: %016x" % (trim0))
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print("Trim 1: %016x" % (trim1))
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print("Trim 2: %016x" % (trim2))
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print("Trim 3: %016x" % (trim3))
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def read_nvcm(self, length: int) -> bytes:
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""" Read out the contents of the NVCM fuses
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Keyword arguments:
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length: Length of data to read
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"""
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self.bank_select('nvcm')
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# contents = bytearray()
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#
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# for offset in range(0, length, 8):
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# if offset % (1024 * 8) == 0:
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# print("%6d / %6d bytes" % (offset, length))
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# nvcm_addr = int(offset / 328) * 4096 + (offset % 328)
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# contents += self.read_bytes(0x03, nvcm_addr, 8)
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# self.delay(2)
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# return bytes(contents)
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return self.read_bytes(0x03, 0x000000, length)
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def read_file(self, filename: str, length: int) -> None:
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""" Read the contents of the NVCM to a file
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Keyword arguments:
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filename -- File to write to, or '-' to write to stdout
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length -- Number of bytes to read from NVCM
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"""
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contents = bytearray()
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# prepend a header to the file, to identify it as an FPGA
|
|
# bitstream
|
|
contents += bytes([0xff, 0x00, 0x00, 0xff])
|
|
|
|
contents += self.read_nvcm(length)
|
|
|
|
if filename == '-':
|
|
with os.fdopen(sys.stdout.fileno(),
|
|
"wb",
|
|
closefd=False) as out_file:
|
|
out_file.write(contents)
|
|
out_file.flush()
|
|
else:
|
|
with open(filename, "wb") as out_file:
|
|
out_file.write(contents)
|
|
out_file.flush()
|
|
|
|
def verify(self, filename: str) -> None:
|
|
""" Verify that the contents of the NVCM match a file
|
|
|
|
Keyword arguments:
|
|
filename -- File to compare
|
|
"""
|
|
with open(filename, "rb") as verify_file:
|
|
compare = verify_file.read()
|
|
|
|
assert len(compare) > 0
|
|
|
|
contents = bytearray()
|
|
contents += bytes([0xff, 0x00, 0x00, 0xff])
|
|
contents += self.read_nvcm(len(compare))
|
|
|
|
# We might have read more than needed because of read
|
|
# boundaries
|
|
if len(contents) > len(compare):
|
|
contents = contents[:len(compare)]
|
|
|
|
assert compare == contents
|
|
print('Verification complete, NVCM contents match file')
|
|
|
|
|
|
def sleep_flash(pins: dict, spi_speed: int) -> None:
|
|
""" Put the SPI bootloader flash in deep sleep mode
|
|
|
|
Keyword arguments:
|
|
pins -- Dictionary of pins to use for SPI interface
|
|
"""
|
|
flasher = IceFlasher()
|
|
|
|
# Disable board power
|
|
flasher.gpio_put(pins['5v_en'], False)
|
|
flasher.gpio_set_direction(pins['5v_en'], True)
|
|
|
|
# Pull CRST low to prevent FPGA from starting
|
|
flasher.gpio_set_direction(pins['crst'], True)
|
|
flasher.gpio_put(pins['crst'], False)
|
|
|
|
# Enable board power
|
|
flasher.gpio_put(pins['5v_en'], True)
|
|
|
|
# Configure pins for talking to flash
|
|
flasher.gpio_set_direction(pins['ss'], True)
|
|
flasher.gpio_set_direction(pins['mosi'], False)
|
|
flasher.gpio_set_direction(pins['sck'], True)
|
|
flasher.gpio_set_direction(pins['miso'], True)
|
|
|
|
flasher.spi_configure(
|
|
pins['sck'],
|
|
pins['ss'],
|
|
pins['miso'],
|
|
pins['mosi'],
|
|
spi_speed
|
|
)
|
|
|
|
sleep(0.5)
|
|
|
|
# Wake the flash up
|
|
flasher.spi_write(bytes([0xAB]))
|
|
|
|
# Confirm we can talk to flash
|
|
data = flasher.spi_rxtx(bytes([0x9f, 0, 0]))
|
|
|
|
assert_bytes_equal('flash_id', bytes([0xff, 0xef, 0x40]), data)
|
|
|
|
# put the flash to sleep
|
|
flasher.spi_write(bytes([0xb9]))
|
|
|
|
# Confirm flash is asleep
|
|
data = flasher.spi_rxtx(bytes([0x9f, 0, 0]))
|
|
|
|
assert_bytes_equal('flash_sleep', bytes([0xff, 0xff, 0xff]), data)
|
|
|
|
|
|
if __name__ == "__main__":
|
|
|
|
import argparse
|
|
|
|
parser = argparse.ArgumentParser()
|
|
|
|
parser.add_argument(
|
|
'-v',
|
|
'--verbose',
|
|
dest='verbose',
|
|
action='store_true',
|
|
help='Show debug information and serial read/writes')
|
|
|
|
parser.add_argument(
|
|
'-f',
|
|
'--sleep_flash',
|
|
dest='sleep_flash',
|
|
action='store_true',
|
|
help='Put an attached SPI flash chip in deep sleep')
|
|
|
|
parser.add_argument(
|
|
'-b',
|
|
'--boot',
|
|
dest='do_boot',
|
|
action='store_true',
|
|
help='Deassert the reset line to allow the FPGA to boot')
|
|
|
|
parser.add_argument(
|
|
'--speed',
|
|
dest='spi_speed',
|
|
type=int,
|
|
default=15,
|
|
help='SPI clock speed, in MHz')
|
|
|
|
parser.add_argument('-i', '--info',
|
|
dest='read_info',
|
|
action='store_true',
|
|
help='Read chip ID, trim and other info')
|
|
|
|
parser.add_argument('--read',
|
|
dest='read_file',
|
|
type=str,
|
|
default=None,
|
|
help='Read contents of NVCM')
|
|
|
|
parser.add_argument('--verify',
|
|
dest='verify_file',
|
|
type=str,
|
|
default=None,
|
|
help='Verify the contents of NVCM')
|
|
|
|
parser.add_argument(
|
|
'--write',
|
|
dest='write_file',
|
|
type=str,
|
|
default=None,
|
|
help='bitstream file to write to NVCM ' +
|
|
'(warning: not reversable!)')
|
|
|
|
parser.add_argument('--ignore-blank',
|
|
dest='ignore_blank',
|
|
action='store_true',
|
|
help='Proceed even if the chip is not blank')
|
|
|
|
parser.add_argument(
|
|
'--secure',
|
|
dest='set_secure',
|
|
action='store_true',
|
|
help='Set security bits to prevent modification ' +
|
|
'(warning: not reversable!)')
|
|
|
|
parser.add_argument(
|
|
'--my-design-is-good-enough',
|
|
dest='good_enough',
|
|
action='store_true',
|
|
help='Enable the dangerous commands --write and --secure')
|
|
|
|
args = parser.parse_args()
|
|
|
|
if not args.good_enough \
|
|
and (args.write_file or args.set_secure):
|
|
print(
|
|
"Are you sure your design is good enough?",
|
|
file=sys.stderr)
|
|
sys.exit(1)
|
|
|
|
tp1_pins = {
|
|
'5v_en': 7,
|
|
'sck': 10,
|
|
'mosi': 11,
|
|
'ss': 12,
|
|
'miso': 13,
|
|
'crst': 14,
|
|
'cdne': 15
|
|
}
|
|
|
|
if args.sleep_flash:
|
|
sleep_flash(tp1_pins, args.spi_speed)
|
|
|
|
nvcm = Nvcm(
|
|
tp1_pins,
|
|
args.spi_speed,
|
|
debug=args.verbose)
|
|
nvcm.power_on()
|
|
|
|
# # Turn on ICE40 in CRAM boot mode
|
|
nvcm.init()
|
|
nvcm.nvcm_enable()
|
|
|
|
if args.read_info:
|
|
nvcm.info()
|
|
|
|
if args.write_file:
|
|
with open(args.write_file, "rb") as in_file:
|
|
bitstream = in_file.read()
|
|
print(f"read {len(bitstream)} bytes")
|
|
cmds = pybin2nvcm(bitstream)
|
|
|
|
if not args.ignore_blank:
|
|
nvcm.trim_blank_check()
|
|
# how much should we check?
|
|
nvcm.blank_check(100000)
|
|
|
|
# this is it!
|
|
nvcm.program(cmds)
|
|
|
|
# update the trim to boot from nvcm
|
|
nvcm.trim_program()
|
|
|
|
if args.read_file:
|
|
# read back after writing to the NVCM
|
|
nvcm.read_file(args.read_file, 104090)
|
|
|
|
if args.verify_file:
|
|
# read back after writing to the NVCM
|
|
nvcm.verify(args.verify_file)
|
|
|
|
if args.set_secure:
|
|
nvcm.trim_secure()
|
|
|
|
if args.do_boot:
|
|
# hold reset low for half a second
|
|
nvcm.enable(True, False)
|
|
sleep(0.5)
|
|
nvcm.enable(True, True)
|