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tillitis-key/hw/application_fpga
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Daniel Lublin 5f4f5c6584
Correct for new fw-ram size 
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-03-08 12:34:34 +01:00
..
core Bump FPGA design version to 5 2023-03-07 12:30:10 +01:00
data Rename to TK1 2022-10-26 09:20:02 +02:00
fw Adjust header file to new fw_ram size 2023-03-08 11:26:25 +01:00
rtl Correct for new fw-ram size 2023-03-08 12:34:34 +01:00
tb Rename to TK1 2022-10-26 09:20:02 +02:00
tools Correct to new path 2023-01-13 15:42:46 +01:00
config.vlt Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal 2023-03-01 13:37:31 +01:00
Makefile Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal 2023-03-01 13:37:31 +01:00