mirror of
https://github.com/tillitis/tillitis-key1.git
synced 2024-12-27 08:29:40 -05:00
35052e50cb
Move the logic implementing the RAM address and data scrambling, descrambling into the RAM module. This cleans up the top level, and makes it easier to change the scrambling without chaning the top. In order to do correct scrambling the address to the RAM core must be 16 bits, not 15. Clean up some minor details at the top level, fixing text aligment and grouping of ports in instances. Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2 lines
143 B
Plaintext
2 lines
143 B
Plaintext
edb39fca7dafb8ea0b89fdeecd960d7656e14ce461e49af97160a8bd6e67d9987e816adad37ba0fcfa63d107c3160988e4c3423ce4a71c39544bc0045888fec1 firmware.bin
|