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https://github.com/tillitis/tillitis-key1.git
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5535323b06
A proof-of-concept of enabling PicoRV32 interrupts. Two interrupt
sources, which can be triggered by writes to memory addresses, are
added. The design has only been simulated, not run on hardware.
Synthesis:
Ice40 LC utilization is 93% (4934/5280) when built using tkey-builder:4
Simulation:
A `tb_application_fpga_irqpoc` target is added. Running `make
tb_application_fpga_irqpoc` creates `tb_application_fpga_sim.fst` which
can be inspected in GTKWave or Surfer.
Firmware:
A simple firmware is added in `fw/irqpoc`. It enables both interrupts
and triggers each interrupt once.
Custom PicoRV32 instructions are located in `custom_ops.S`. It is
imported from upstream PicoRV32 commit:
70f3c33ac8
10 lines
238 B
Makefile
10 lines
238 B
Makefile
# Uses ../.clang-format
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FMTFILES=main.c
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.PHONY: fmt
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fmt:
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clang-format --dry-run --ferror-limit=0 $(FMTFILES)
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clang-format --verbose -i $(FMTFILES)
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.PHONY: checkfmt
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checkfmt:
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clang-format --dry-run --ferror-limit=0 --Werror $(FMTFILES)
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