Joachim Strömbergson 53c5e70795 FPGA: Update names for RAM randomization API ... Update: - README - testbench - Symbolic names and variables in fw - registers - port name and wires - Update fpga and fw digests Signed-off-by: Joachim Strömbergson <joachim@assured.se>		2024-07-10 13:45:26 +02:00
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picorv32	FPGA: Ignore warnings about blocking assignment in clocked processes	2024-06-17 15:37:13 +02:00
timer	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
tk1	FPGA: Update names for RAM randomization API	2024-07-10 13:45:26 +02:00
touch_sense	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
trng	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
uart	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00
uds	Update Verilog version to 2005 for linting	2024-04-24 08:44:08 +02:00