Joachim Strömbergson 49eac9d101

Complete init of DUT and input, output display ...

Signed-off-by: Joachim Strömbergson <joachim@assured.se>

2023-07-04 09:04:26 +02:00

..

core

Complete init of DUT and input, output display

2023-07-04 09:04:26 +02:00

data

Use different byte values in test UDS words

2023-03-28 09:26:23 +02:00

fw

Make memeq function side channel silent

2023-07-04 09:04:23 +02:00

rtl

bank1 access should also be disabled by default.

2023-03-13 12:43:07 +01:00

tb

Rename to TK1

2022-10-26 09:20:02 +02:00

tools

Correct to new path

2023-01-13 15:42:46 +01:00

application_fpga.bin.sha256

Use tkey-builder:2; add hashes & checks for bitstream & fw bins

2023-07-04 09:04:23 +02:00

config.vlt

Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal

2023-03-01 13:37:31 +01:00

firmware.bin.sha512

Use tkey-builder:2; add hashes & checks for bitstream & fw bins

2023-07-04 09:04:23 +02:00

Makefile

Include debug symbols in the ELF

2023-07-04 09:04:23 +02:00