Jonas Thörnblad 48cbb55d6e

Add incoming and outgoing CTS (Clear To Send) signals for the FPGA ...

to let the CH552 and FPGA signal each other that it is OK to send
UART data. The CTS signals indicate "OK to send" if high. If an
incoming CTS signal goes low, the receiver of that signal should
immediatly stop sending UART data.

2024-12-17 17:18:45 +01:00

..

application_fpga

Add incoming and outgoing CTS (Clear To Send) signals for the FPGA

2024-12-17 17:18:45 +01:00

usb_interface/ch552_fw

Wrap accesses to UART output buffers

2024-12-16 12:18:43 +01:00