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tillitis-key
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hw
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application_fpga
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Daniel Lublin
9aece67a41
testfw: test read bytes from CDI
...
Signed-off-by: Daniel Lublin <daniel@lublin.se>
2023-03-28 11:44:13 +02:00
..
core
Update fw ram last address to match new mem size
2023-03-08 13:31:45 +01:00
data
Use different byte values in test UDS words
2023-03-28 09:26:23 +02:00
fw
testfw: test read bytes from CDI
2023-03-28 11:44:13 +02:00
rtl
bank1 access should also be disabled by default.
2023-03-13 12:43:07 +01:00
tb
Rename to TK1
2022-10-26 09:20:02 +02:00
tools
Correct to new path
2023-01-13 15:42:46 +01:00
config.vlt
Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal
2023-03-01 13:37:31 +01:00
Makefile
fw: clang-tidy and splint: New make target: check
2023-03-22 11:05:32 +01:00