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tillitis-key/hw/application_fpga/core
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Joachim Strömbergson 3bc2453287
A construction of a minimal SPI master. 
- NOTE: This is an optional feature, not built by default. Not included
  in the tk1 for sale at Tillitis shop.
- This makes it possible to interface the SPI flash onboard TKey.
- To include the SPI master in the build, use `make application_fpga.bin
  YOSYS_FLAG=-DINCLUDE_SPI_MASTER`.

Signed-off-by: Joachim Strömbergson <joachim@assured.se>
2024-06-11 15:28:29 +02:00
..
picorv32 Squashed commit of the following: 2022-10-06 13:23:30 +02:00
timer Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
tk1 A construction of a minimal SPI master. 2024-06-11 15:28:29 +02:00
touch_sense Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
trng Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
uart Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00
uds Update Verilog version to 2005 for linting 2024-04-24 08:44:08 +02:00