Jonas Thörnblad 2364466a9e Rename rosc.v to trng.v		2024-11-14 16:35:51 +01:00
..
core	Rename rosc.v to trng.v	2024-11-14 16:35:51 +01:00
data	A construction of a minimal SPI master.	2024-06-11 15:28:29 +02:00
fw	Harmonize the naming of firmware and app mode.	2024-11-12 15:13:59 +01:00
rtl	Harmonize the naming of firmware and app mode.	2024-11-12 15:13:59 +01:00
tb	Rename top level simulation files	2024-11-12 15:33:33 +01:00
tools	Add place and route script	2024-10-22 15:20:39 +02:00
application_fpga.bin.sha256	Harmonize the naming of firmware and app mode.	2024-11-12 15:13:59 +01:00
config.vlt	Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal	2023-03-01 13:37:31 +01:00
firmware.bin.sha512	FPGA: Move RAM address and data scrambling into the RAM module.	2024-08-30 10:53:13 +02:00
Makefile	Rename rosc.v to trng.v	2024-11-14 16:35:51 +01:00