tillitis-key/hw/application_fpga
2023-03-16 13:51:24 +01:00
..
core Update fw ram last address to match new mem size 2023-03-08 13:31:45 +01:00
data Rename to TK1 2022-10-26 09:20:02 +02:00
fw fw: Initialize automatic variables 2023-03-16 13:51:24 +01:00
rtl bank1 access should also be disabled by default. 2023-03-13 12:43:07 +01:00
tb Rename to TK1 2022-10-26 09:20:02 +02:00
tools Correct to new path 2023-01-13 15:42:46 +01:00
config.vlt Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal 2023-03-01 13:37:31 +01:00
Makefile Add more complete fw_ram test; let testfw have stack in RAM 2023-03-14 11:21:47 +01:00