Jonas Thörnblad 1651a1a666 Update PicoRV32 clock frequency to 24 MHz ... Include a seed value for nextpnr to get a layout that reaches 24 MHz.		2024-11-04 11:26:41 +01:00
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clk_reset_gen	Update PicoRV32 clock frequency to 24 MHz	2024-11-04 11:26:41 +01:00
fw_ram	FPGA: Format verilog code	2024-10-22 12:04:19 +02:00
picorv32	FPGA: Ignore warnings about blocking assignment in clocked processes	2024-06-17 15:37:13 +02:00
ram	FPGA: Format verilog code	2024-10-22 12:04:19 +02:00
rom	FPGA: Format verilog code	2024-10-22 12:04:19 +02:00
timer	FPGA: Format verilog code	2024-10-22 12:04:19 +02:00
tk1	FPGA: Format verilog code	2024-10-22 12:04:19 +02:00
touch_sense	FPGA: Format verilog code	2024-10-22 12:04:19 +02:00
trng	Update PicoRV32 clock frequency to 24 MHz	2024-11-04 11:26:41 +01:00
uart	Update PicoRV32 clock frequency to 24 MHz	2024-11-04 11:26:41 +01:00
uds	FPGA: Format verilog code	2024-10-22 12:04:19 +02:00