tillitis-key/hw/application_fpga
2024-09-23 15:42:23 +02:00
..
core FPGA: Move RAM address and data scrambling into the RAM module. 2024-08-30 10:53:13 +02:00
data A construction of a minimal SPI master. 2024-06-11 15:28:29 +02:00
fw fw: break out trng and xorwow to rng.[ch] 2024-09-23 15:42:23 +02:00
rtl FPGA: Move RAM address and data scrambling into the RAM module. 2024-08-30 10:53:13 +02:00
tb Rename to TK1 2022-10-26 09:20:02 +02:00
tools hw/tool: UDI/UDS storage 2024-04-03 11:27:00 +02:00
application_fpga.bin.sha256 FPGA: Move RAM address and data scrambling into the RAM module. 2024-08-30 10:53:13 +02:00
config.vlt Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal 2023-03-01 13:37:31 +01:00
firmware.bin.sha512 FPGA: Move RAM address and data scrambling into the RAM module. 2024-08-30 10:53:13 +02:00
Makefile fw: break out trng and xorwow to rng.[ch] 2024-09-23 15:42:23 +02:00