tillitis-key/hw/application_fpga
2024-10-30 13:11:00 +01:00
..
core Revise pins for SPI and RGB 2024-10-30 13:11:00 +01:00
data Revise pins for SPI and RGB 2024-10-30 13:11:00 +01:00
fw fw: Fix erroneous type in frame header 2024-10-09 15:52:00 +02:00
rtl Build FPGA for the uwg30 wcsp package 2024-10-29 15:15:41 +01:00
tb FPGA: Format verilog code 2024-10-22 12:04:19 +02:00
tools Add place and route script 2024-10-22 15:20:39 +02:00
application_fpga.bin.sha256 Add yosys flags to optimize synthesis 2024-10-22 12:46:12 +02:00
config.vlt Config verilator lint to ignore known 3rd-party warnings; let warnings be fatal 2023-03-01 13:37:31 +01:00
firmware.bin.sha512 FPGA: Move RAM address and data scrambling into the RAM module. 2024-08-30 10:53:13 +02:00
Makefile Build FPGA for the uwg30 wcsp package 2024-10-29 15:15:41 +01:00