mirror of
https://github.com/tillitis/tillitis-key1.git
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ede92af2c1
- include printout of used clock and baud rate speed - Use the the same clock frequency as target
348 lines
6.0 KiB
C++
348 lines
6.0 KiB
C++
//======================================================================
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//
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// application_fpga_verilator.cc
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// -----------------------------
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// Wrapper to allow simulation of the application_fpga using Verilator.
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//
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//
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// Copyright (C) 2022 - Tillitis AB
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// SPDX-License-Identifier: GPL-2.0-only
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//
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//======================================================================
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#include <pty.h>
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#include <termios.h>
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#include <unistd.h>
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#include <stdio.h>
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#include <fcntl.h>
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#include <poll.h>
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#include <stdint.h>
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#include <string.h>
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#include <signal.h>
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#include <sys/types.h>
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#include "Vapplication_fpga_sim.h"
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#include "verilated.h"
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// Clock: 21 MHz, 62500 bps
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// Divisor = 21E6 / 62500 = 336
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#define CPU_CLOCK 21000000
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#define BAUD_RATE 62500
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#define BIT_DIV (CPU_CLOCK/BAUD_RATE)
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struct uart {
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int bit_div;
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unsigned int ts;
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unsigned int tx_next_ts;
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unsigned int rx_next_ts;
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int rx_state; /* 0, (idle), 1 (start), 2..9 (data), 10 (stop), 11 (stop end) */
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int tx_state; /* 0, (idle), 1..8 (data), 9 (stop), 10 (stop end) */
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uint8_t tx_data;
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uint8_t rx_data;
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int rx_has_data;
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int tx_has_data;
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uint8_t *tx;
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uint8_t *rx;
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};
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void uart_init(struct uart *u, uint8_t *tx, uint8_t *rx, int bit_div);
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void uart_tick(struct uart *u);
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int uart_can_send(struct uart *u);
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int uart_send(struct uart *u, uint8_t data);
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int uart_recv(struct uart *u, uint8_t *data);
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void uart_init(struct uart *u, uint8_t *tx, uint8_t *rx, int bit_div)
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{
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u->bit_div = bit_div;
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u->ts = 0;
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u->tx_next_ts = 0;
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u->rx_next_ts = 0;
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u->rx_state = 0;
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u->tx_state = 0;
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u->tx_data = 0;
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u->rx_data = 0;
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u->rx_has_data = 0;
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u->tx_has_data = 0;
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u->tx = tx;
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*u->tx = 1;
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u->rx = rx;
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}
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void uart_rx_tick(struct uart *u)
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{
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if (u->rx_state == 0) {
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// Idle
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if (!u->rx_has_data && !*u->rx) { // Active low
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u->rx_next_ts = u->ts + u->bit_div / 2; // sample mid-point
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u->rx_state = 1;
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}
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return;
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}
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if (u->rx_state == 1) {
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// Start
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if (u->ts < u->rx_next_ts)
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return;
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if (*u->rx) {
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u->rx_state = 0; // Back to idle, shouldn't happen
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return;
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}
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u->rx_next_ts += u->bit_div;
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u->rx_data = 0;
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u->rx_state = 2;
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return;
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}
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if (u->rx_state > 1 && u->rx_state < 10) {
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// Data
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if (u->ts < u->rx_next_ts)
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return;
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u->rx_next_ts += u->bit_div;
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u->rx_data |= (!!*u->rx) << (u->rx_state - 2);
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u->rx_state++;
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return;
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}
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if (u->rx_state == 10) {
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// Stop
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if (u->ts < u->rx_next_ts)
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return;
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if (!*u->rx) {
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u->rx_state = 0; // Back to dle, shouldn't happen
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return;
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}
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u->rx_next_ts += u->bit_div/2;
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u->rx_has_data = 1;
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u->rx_state = 11;
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return;
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}
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if (u->rx_state == 11) {
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if (u->ts < u->rx_next_ts)
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return;
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u->rx_state = 0;
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return;
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}
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}
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int uart_recv(struct uart *u, uint8_t *data)
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{
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if (u->rx_has_data && (u->rx_state == 0 || u->rx_state == 11)) {
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*data = u->rx_data;
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u->rx_has_data = 0;
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return 1;
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}
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return 0;
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}
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void uart_tx_tick(struct uart *u)
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{
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if (u->tx_state == 0) {
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// Idle
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if (u->tx_has_data) {
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u->tx_next_ts = u->ts + u->bit_div;
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*u->tx = 0; // Start
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u->tx_state = 1;
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}
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return;
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}
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if (u->tx_state > 0 && u->tx_state < 9) {
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// Data
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if (u->ts < u->tx_next_ts)
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return;
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u->tx_next_ts += u->bit_div;
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*u->tx = (u->tx_data >> (u->tx_state - 1)) & 1;
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u->tx_state++;
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return;
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}
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if (u->tx_state == 9) {
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// Stop
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if (u->ts < u->tx_next_ts)
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return;
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u->tx_next_ts += u->bit_div;
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*u->tx = 1; // Stop
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u->tx_has_data = 0;
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u->tx_state = 10;
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return;
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}
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if (u->tx_state == 10) {
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if (u->ts < u->tx_next_ts)
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return;
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u->tx_state = 0;
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return;
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}
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}
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int uart_can_send(struct uart *u)
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{
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return !u->tx_has_data;
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}
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int uart_send(struct uart *u, uint8_t data)
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{
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if (!uart_can_send(u))
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return 0;
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u->tx_has_data = 1;
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u->tx_data = data;
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return 1;
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}
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void uart_tick(struct uart *u)
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{
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u->ts++;
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uart_rx_tick(u);
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uart_tx_tick(u);
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}
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struct pty {
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int amaster;
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int aslave;
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char slave[32];
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};
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int pty_init(struct pty *p);
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int pty_can_recv(struct pty *p);
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int pty_recv(struct pty *p, uint8_t *data);
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void pty_send(struct pty *p, uint8_t data);
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int pty_init(struct pty *p)
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{
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struct termios tty;
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int flags;
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memset(p, 0, sizeof(*p));
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if (openpty(&p->amaster, &p->aslave, p->slave, NULL, NULL) < 0)
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return -1;
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if (tcgetattr(p->aslave, &tty) < 0)
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return -1;
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cfmakeraw(&tty);
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if (tcsetattr(p->aslave, TCSAFLUSH, &tty) < 0)
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return -1;
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if ((flags = fcntl(p->amaster, F_GETFL, 0) < 0))
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return -1;
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flags |= O_NONBLOCK;
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if (fcntl(p->amaster, F_SETFL, flags) < 0)
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return -1;
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printf("pty: %s\n", p->slave);
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return 0;
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}
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int pty_can_recv(struct pty *p)
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{
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struct pollfd fds = {p->amaster, POLLIN, 0};
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char c;
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return poll(&fds, 1, 0) == 1;
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}
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int pty_recv(struct pty *p, uint8_t *data)
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{
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return read(p->amaster, data, 1) == 1;
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}
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void pty_send(struct pty *p, uint8_t data)
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{
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ssize_t i __attribute__((unused));
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i = write(p->amaster, &data, 1);
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}
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volatile int touch_cyc = 0;
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void sighandler(int)
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{
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printf("touched!\n");
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touch_cyc = 1000;
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}
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void touch(uint8_t *touch_event)
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{
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if (touch_cyc > 0) {
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touch_cyc--;
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*touch_event = 1;
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} else {
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*touch_event = 0;
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}
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}
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vluint64_t main_time = 0;
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double sc_time_stamp()
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{
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return main_time;
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}
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int main(int argc, char **argv, char **env)
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{
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Verilated::commandArgs(argc, argv);
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int r = 0, g = 0, b = 0;
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Vapplication_fpga_sim top;
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struct uart u;
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struct pty p;
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int err;
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if (signal(SIGUSR1, sighandler) == SIG_ERR)
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return -1;
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printf("cpu clock: %d\n", CPU_CLOCK);
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printf("baud rate: %d\n", BAUD_RATE);
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printf("generate touch event: \"$ kill -USR1 %d\"\n", (int)getpid());
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err = pty_init(&p);
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if (err)
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return -1;
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uart_init(&u, &top.interface_tx, &top.interface_rx, BIT_DIV);
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top.clk = 0;
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while (!Verilated::gotFinish()) {
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uint8_t to_host = 0;
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top.clk = !top.clk;
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if (main_time < 10)
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goto skip;
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if (!top.clk) {
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touch(&top.touch_event);
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uart_tick(&u);
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}
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if (pty_can_recv(&p) && uart_can_send(&u)) {
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uint8_t from_host = 0;
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pty_recv(&p, &from_host);
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uart_send(&u, from_host);
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}
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if (uart_recv(&u, &to_host) == 1) {
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pty_send(&p, to_host);
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}
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skip:
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main_time++;
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top.eval();
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}
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}
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