build: Flash partition table when running make prog_flash

Changes make targets:

- prog_flash in hw/application/Makefile which flashes only the
  bitstream is renamed to prog_flash_bs.

- prog_flash in hw/application/Makefile is modified to flash the
  bitstream, the testloadapp.bin in app slot 0, and the partition table.

- flash in contrib/Makefile is modified to use prog_flash from
  hw/application/Makefile

contrib/Makefile

@@ -14,7 +14,7 @@ all:
 	@echo "run-tb                Run all the testbenches using image '$(IMAGE)' (Podman)"
 	@echo "run-make-no-clean     Like run-make but without cleaning first, useful for iterative firmware dev"
 	@echo "run-make-clean_fw     Like run-make but cleans only firmware"
-	@echo "flash                 Program the SPI flash on the TKey - needs an existing bitstream"
+	@echo "flash                 Build bitstream and testloadapp.bin then program them and the partition table onto the TKey SPI flash"
 	@echo "pull                  Pull down the image '$(IMAGE)' (Podman)"
 	@echo "build-image           Build a toolchain image named '$(BUILDIMAGE)' (Podman)"
 	@echo "                      A newly built image can be used like: make IMAGE=$(BUILDIMAGE) run"
@@ -54,7 +54,7 @@ flash:
 	--device /dev/bus/usb/$(lsusb | grep -m 1 1209:8886 | awk '{ printf "%s/%s", $2, substr($4,1,3) }') \
 	--mount type=bind,source="`pwd`/../hw/application_fpga",target=/build \
 	-w /build \
-	-it $(IMAGE) tillitis-iceprog /build/application_fpga.bin
+	-it $(IMAGE) make prog_flash
 
 
 pull:

hw/application_fpga/Makefile

@@ -473,8 +473,14 @@ tb_application_fpga: $(SIM_VERILOG_SRCS) \
 
 prog_flash: check-hardware application_fpga.bin
 	tillitis-iceprog application_fpga.bin
+	make -C apps
+	(cd tools && ./load_preloaded_app.sh 0 ../apps/testloadapp.bin)
 .PHONY: prog_flash
 
+prog_flash_bs: check-hardware application_fpga.bin
+	tillitis-iceprog application_fpga.bin
+.PHONY: prog_flash_bs
+
 prog_flash_testfw: check-hardware application_fpga_testfw.bin
 	tillitis-iceprog application_fpga_testfw.bin
 .PHONY: prog_flash_testfw
@@ -506,6 +512,7 @@ clean: clean_sim clean_fw clean_tb
 	rm -f lint_issues.txt
 	rm -f tools/tpt/*.hex
 	rm -rf tools/tpt/__pycache__
+	make -C apps clean
 .PHONY: clean
 
 clean_fw:
@@ -554,7 +561,8 @@ help:
 	@echo "tb_application_fpga  Build testbench simulation for the design"
 	@echo "lint                 Run lint on Verilog source files."
 	@echo "tb                   Run all testbenches"
-	@echo "prog_flash           Program device flash with FGPA bitstream including firmware (using the RPi Pico-based programmer)."
+	@echo "prog_flash           Program device flash with FGPA bitstream (including firmware), partition table, and testloadapp.bin (using the RPi Pico-based programmer)."
+	@echo "prog_flash_bs        Program device flash with FGPA bitstream including firmware (using the RPi Pico-based programmer)."
 	@echo "prog_flash_testfw    Program device flash as above, but with testfw."
 	@echo "clean                Delete all generated files."
 	@echo "clean_fw             Delete only generated files for firmware. Useful for fw devs."