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tb: fix tk1 testbench after name change

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This issue was introduced in commit 53c5e707, after name change of RAM
randomization API.
This commit is contained in:
Daniel Jobson 2024-10-10 09:45:53 +02:00
parent 056ee4d3ee
commit d9d41811bd
No known key found for this signature in database
GPG Key ID: 3707A9DBF4BB8F1A
1 changed files with 13 additions and 13 deletions
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26
hw/application_fpga/core/tk1/tb/tb_tk1.v
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@ -83,8 +83,8 @@ module tb_tk1();
reg tb_cpu_valid;
wire tb_force_trap;
wire [14 : 0] tb_ram_aslr;
wire [31 : 0] tb_ram_scramble;
wire [14 : 0] tb_ram_addr_rand;
wire [31 : 0] tb_ram_data_rand;
wire tb_led_r;
wire tb_led_g;
@ -129,8 +129,8 @@ module tb_tk1();
.cpu_valid(tb_cpu_valid),
.force_trap(tb_force_trap),
.ram_aslr(tb_ram_aslr),
.ram_scramble(tb_ram_scramble),
.ram_addr_rand(tb_ram_addr_rand),
.ram_data_rand(tb_ram_data_rand),
.led_r(tb_led_r),
.led_g(tb_led_g),
@ -198,7 +198,7 @@ module tb_tk1();
$display("tb_cpu_trap: 0x%1x, fw_app_mode: 0x%1x", tb_cpu_trap, tb_fw_app_mode);
$display("cpu_addr: 0x%08x, cpu_instr: 0x%1x, cpu_valid: 0x%1x, force_tap: 0x%1x",
tb_cpu_addr, tb_cpu_instr, tb_cpu_valid, tb_force_trap);
$display("ram_aslr: 0x%08x, ram_scramble: 0x%08x", tb_ram_aslr, tb_ram_scramble);
$display("ram_addr_rand: 0x%08x, ram_data_rand: 0x%08x", tb_ram_addr_rand, tb_ram_data_rand);
$display("led_r: 0x%1x, led_g: 0x%1x, led_b: 0x%1x", tb_led_r, tb_led_g, tb_led_b);
$display("ready: 0x%1x, cs: 0x%1x, we: 0x%1x, address: 0x%02x", tb_ready, tb_cs, tb_we, tb_address);
$display("write_data: 0x%08x, read_data: 0x%08x", tb_write_data, tb_read_data);
@ -548,33 +548,33 @@ module tb_tk1();
//----------------------------------------------------------------
// test6()
// Write and RAM scrambling in fw mode.
// Write RAM address and data randomizatio in fw mode.
//----------------------------------------------------------------
task test6;
begin
tc_ctr = tc_ctr + 1;
$display("");
$display("--- test6: Write RAM scrambling in fw mode.");
$display("--- test6: Write RAM addr and data randomization in fw mode.");
$display("--- test6: Reset DUT to switch to fw mode.");
reset_dut();
$display("--- test6: Write RAM ASLR and RAM SCRAMBLE.");
$display("--- test6: Write to ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND .");
write_word(ADDR_RAM_ADDR_RAND, 32'h13371337);
write_word(ADDR_RAM_DATA_RAND, 32'h47114711);
$display("--- test6: Check value in dut RAM ASLR and SCRAMBLE registers.");
$display("--- test6: ram_aslr_reg: 0x%04x, ram_scramble_reg: 0x%08x", dut.ram_aslr_reg, dut.ram_scramble_reg);
$display("--- test6: Check value in dut ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND registers.");
$display("--- test6: ram_addr_rand_reg: 0x%04x, ram_data_rand_reg: 0x%08x", dut.ram_addr_rand, dut.ram_data_rand);
$display("--- test6: Switch to app mode.");
write_word(ADDR_SWITCH_APP, 32'hf000000);
$display("--- test6: Write RAM ASLR and SCRAMBLE again.");
$display("--- test6: Write to ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND again.");
write_word(ADDR_RAM_ADDR_RAND, 32'hdeadbeef);
write_word(ADDR_RAM_DATA_RAND, 32'hf00ff00f);
$display("--- test6: Check value in dut RAM ASLR and SCRAMBLE registers.");
$display("--- test6: ram_aslr_reg: 0x%04x, ram_scramble_reg: 0x%08x", dut.ram_aslr_reg, dut.ram_scramble_reg);
$display("--- test6: Check value in dut ADDR_RAM_ADDR_RAND and ADDR_RAM_DATA_RAND registers.");
$display("--- test6: ram_addr_rand_reg: 0x%04x, ram_data_rand_reg: 0x%08x", dut.ram_addr_rand, dut.ram_data_rand);
$display("--- test6: completed.");
$display("");