diff --git a/hw/application_fpga/fw/tk1/firmware.lds b/hw/application_fpga/fw/tk1/firmware.lds
index 366f732..805b165 100644
--- a/hw/application_fpga/fw/tk1/firmware.lds
+++ b/hw/application_fpga/fw/tk1/firmware.lds
@@ -40,6 +40,8 @@ SECTIONS
 		_sidata = _etext;
 	} >ROM
 
+        /* XXX We don't allow any data or BSS - but they need be defined or linking will fail */
+
 	.data : AT (_etext)
 	{
 		. = ALIGN(4);
@@ -51,7 +53,7 @@ SECTIONS
 		*(.sdata*)          /* .sdata* sections */
 		. = ALIGN(4);
 		_edata = .;
-	} >RAM
+	} >ROM
 
 	/* Uninitialized data section */
 	.bss :
@@ -66,6 +68,5 @@ SECTIONS
 
 		. = ALIGN(4);
 		_ebss = .;
-	} >RAM
-	/* Init stack to _ebss + size */
+	} >ROM
 }
diff --git a/hw/application_fpga/fw/tk1/start.S b/hw/application_fpga/fw/tk1/start.S
index 9ce102f..5362a77 100644
--- a/hw/application_fpga/fw/tk1/start.S
+++ b/hw/application_fpga/fw/tk1/start.S
@@ -51,31 +51,6 @@ clear:
          */
         li sp, 0xd00003f0 // 1 kiB - 16 byte in FW_RAM
 
-	/* copy data section */
-	la a0, _sidata
-	la a1, _sdata
-	la a2, _edata
-	bge a1, a2, end_init_data
-
-loop_init_data:
-	lw a3, 0(a0)
-	sw a3, 0(a1)
-	addi a0, a0, 4
-	addi a1, a1, 4
-	blt a1, a2, loop_init_data
-
-end_init_data:
-	/* zero-init bss section */
-	la a0, _sbss
-	la a1, _ebss
-	bge a0, a1, end_init_bss
-
-loop_init_bss:
-	sw zero, 0(a0)
-	addi a0, a0, 4
-	blt a0, a1, loop_init_bss
-
-end_init_bss:
 	call main
 
 loop: