diff --git a/hw/application_fpga/Makefile b/hw/application_fpga/Makefile
index edafd7b..d33bbef 100644
--- a/hw/application_fpga/Makefile
+++ b/hw/application_fpga/Makefile
@@ -419,7 +419,7 @@ synth.json: $(FPGA_VERILOG_SRCS) $(VERILOG_SRCS) $(PICORV32_SRCS) bram_fw.hex
 application_fpga_par.json: synth.json $(P)/data/$(PIN_FILE)
 	$(NEXTPNR_PATH)nextpnr-ice40 \
 		-l application_fpga_par.txt \
-		--seed 9106179903728618585 \
+		--seed 4127945014473118301 \
 		--freq $(TARGET_FREQ) \
 		--ignore-loops \
 		--up5k \