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PoC: Remove Blake2s register

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Mikael Ågren 2024-12-10 19:08:55 +01:00
parent e18eb03c4f
commit cd959e9966
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2 changed files with 0 additions and 33 deletions
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12
hw/application_fpga/core/tk1/README.md
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@ -78,18 +78,6 @@ FW as part of the loading of the app. The registers can't be written
when the `ADDR_SYSTEM_MODE_CTRL` has been set. when the `ADDR_SYSTEM_MODE_CTRL` has been set.
### Access to Blake2s
```
ADDR_BLAKE2S: 0x10
```
This register provides the 32-bit function pointer address to the
Blake2s hash function in the FW. It is written by FW during boot. The
register can't be written to when the `ADDR_SYSTEM_MODE_CTRL` has been
set.
### Access to CDI ### Access to CDI
``` ```

21
hw/application_fpga/core/tk1/rtl/tk1.v
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@ -79,8 +79,6 @@ module tk1 #(
localparam ADDR_APP_START = 8'h0c; localparam ADDR_APP_START = 8'h0c;
localparam ADDR_APP_SIZE = 8'h0d; localparam ADDR_APP_SIZE = 8'h0d;
localparam ADDR_BLAKE2S = 8'h10;
localparam ADDR_CDI_FIRST = 8'h20; localparam ADDR_CDI_FIRST = 8'h20;
localparam ADDR_CDI_LAST = 8'h27; localparam ADDR_CDI_LAST = 8'h27;
@ -135,9 +133,6 @@ module tk1 #(
reg [31 : 0] app_size_reg; reg [31 : 0] app_size_reg;
reg app_size_we; reg app_size_we;
reg [31 : 0] blake2s_addr_reg;
reg blake2s_addr_we;
reg [23 : 0] cpu_trap_ctr_reg; reg [23 : 0] cpu_trap_ctr_reg;
reg [23 : 0] cpu_trap_ctr_new; reg [23 : 0] cpu_trap_ctr_new;
reg [ 2 : 0] cpu_trap_led_reg; reg [ 2 : 0] cpu_trap_led_reg;
@ -261,7 +256,6 @@ module tk1 #(
gpio4_reg <= 1'h0; gpio4_reg <= 1'h0;
app_start_reg <= 32'h0; app_start_reg <= 32'h0;
app_size_reg <= APP_SIZE; app_size_reg <= APP_SIZE;
blake2s_addr_reg <= 32'h0;
cdi_mem[0] <= 32'h0; cdi_mem[0] <= 32'h0;
cdi_mem[1] <= 32'h0; cdi_mem[1] <= 32'h0;
cdi_mem[2] <= 32'h0; cdi_mem[2] <= 32'h0;
@ -316,10 +310,6 @@ module tk1 #(
app_size_reg <= write_data; app_size_reg <= write_data;
end end
if (blake2s_addr_we) begin
blake2s_addr_reg <= write_data;
end
if (cdi_mem_we) begin if (cdi_mem_we) begin
cdi_mem[address[2 : 0]] <= write_data; cdi_mem[address[2 : 0]] <= write_data;
end end
@ -501,7 +491,6 @@ module tk1 #(
gpio4_we = 1'h0; gpio4_we = 1'h0;
app_start_we = 1'h0; app_start_we = 1'h0;
app_size_we = 1'h0; app_size_we = 1'h0;
blake2s_addr_we = 1'h0;
cdi_mem_we = 1'h0; cdi_mem_we = 1'h0;
ram_addr_rand_we = 1'h0; ram_addr_rand_we = 1'h0;
ram_data_rand_we = 1'h0; ram_data_rand_we = 1'h0;
@ -547,12 +536,6 @@ module tk1 #(
system_reset_new = 1'h1; system_reset_new = 1'h1;
end end
if (address == ADDR_BLAKE2S) begin
if (!system_mode_reg) begin
blake2s_addr_we = 1'h1;
end
end
if ((address >= ADDR_CDI_FIRST) && (address <= ADDR_CDI_LAST)) begin if ((address >= ADDR_CDI_FIRST) && (address <= ADDR_CDI_LAST)) begin
if (!system_mode_reg) begin if (!system_mode_reg) begin
cdi_mem_we = 1'h1; cdi_mem_we = 1'h1;
@ -633,10 +616,6 @@ module tk1 #(
tmp_read_data = app_size_reg; tmp_read_data = app_size_reg;
end end
if (address == ADDR_BLAKE2S) begin
tmp_read_data = blake2s_addr_reg;
end
if ((address >= ADDR_CDI_FIRST) && (address <= ADDR_CDI_LAST)) begin if ((address >= ADDR_CDI_FIRST) && (address <= ADDR_CDI_LAST)) begin
tmp_read_data = cdi_mem[address[2 : 0]]; tmp_read_data = cdi_mem[address[2 : 0]];
end end