From cbf1104fedb47b4702230a29cf79021a5ce5b6c7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joachim=20Str=C3=B6mbergson?= <joachim@assured.se>
Date: Tue, 11 Oct 2022 17:05:21 +0200
Subject: [PATCH] Write whole byte, not nybbles

---
 hw/application_fpga/rtl/fw_ram.v | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/hw/application_fpga/rtl/fw_ram.v b/hw/application_fpga/rtl/fw_ram.v
index d445d9c..5ee31a5 100644
--- a/hw/application_fpga/rtl/fw_ram.v
+++ b/hw/application_fpga/rtl/fw_ram.v
@@ -53,7 +53,7 @@ module fw_ram(
 		      .WCLKE(1'h1),
 		      .WDATA(write_data[15:0]),
 		      .WE(|we),
-		      .MASK({{4{we[1]}}, {4{we[0]}}})
+		      .MASK({{8{we[1]}}, {8{we[0]}}})
 		     );
 
 
@@ -68,7 +68,7 @@ module fw_ram(
 		      .WCLKE(1'h1),
 		      .WDATA(write_data[31:16]),
 		      .WE(|we),
-		      .MASK({{4{we[3]}}, {4{we[2]}}})
+		      .MASK({{8{we[3]}}, {8{we[2]}}})
 		     );