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Doc: fix typo in tk1 core readme

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Daniel Jobson 2024-10-10 13:06:57 +02:00
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hw/application_fpga/core/tk1/README.md
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@ -133,7 +133,7 @@ bitstream. This allows us to generate these device unique FPGA
bitstreams without having to do a full FPGA build. bitstreams without having to do a full FPGA build.
### RAM memory protecion ### RAM memory protection
``` ```
ADDR_RAM_ADDR_RAND: 0x40 ADDR_RAM_ADDR_RAND: 0x40
@ -143,7 +143,7 @@ bitstreams without having to do a full FPGA build.
These write only registers control how the data in the RAM is These write only registers control how the data in the RAM is
randomized as a way of protecting the data. The randomization is randomized as a way of protecting the data. The randomization is
implemented using a pseudo random number generator with a state implemented using a pseudo random number generator with a state
initalized by a seed. initialized by a seed.
The ADDR_RAM_ADDR_RAND store the seed for how the addresses are The ADDR_RAM_ADDR_RAND store the seed for how the addresses are
randomized over the memory space. The ADDR_RAM_DATA_RAND store the randomized over the memory space. The ADDR_RAM_DATA_RAND store the