From cadf8e9849d56b255524ed96387c0707c010ad14 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Joachim=20Str=C3=B6mbergson?= Date: Mon, 3 Jun 2024 15:07:01 +0200 Subject: [PATCH] FPGA: Add sim model of udi_rom MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Joachim Strömbergson --- hw/application_fpga/core/tk1/tb/udi_rom_sim.v | 36 +++++++++++++++++++ .../core/tk1/toolruns/Makefile | 2 +- 2 files changed, 37 insertions(+), 1 deletion(-) create mode 100644 hw/application_fpga/core/tk1/tb/udi_rom_sim.v diff --git a/hw/application_fpga/core/tk1/tb/udi_rom_sim.v b/hw/application_fpga/core/tk1/tb/udi_rom_sim.v new file mode 100644 index 0000000..3e9c81d --- /dev/null +++ b/hw/application_fpga/core/tk1/tb/udi_rom_sim.v @@ -0,0 +1,36 @@ +//====================================================================== +// +// udi_rom_sim.v +// --------- +// Simulation version of the UDI ROM. +// +// +// Author: Joachim Strömbergson. +// Copyright (C) 2023 - Tillitis AB +// SPDX-License-Identifier: GPL-2.0-only +// +//====================================================================== + +module udi_rom ( + input wire [0:0] addr, + output wire [31:0] data + ); + + reg [31 : 0] tmp_data; + assign data = tmp_data; + + always @* + begin : addr_mux + if (addr) begin + tmp_data = 32'h04050607; + end + else begin + tmp_data = 32'h00010203; + end + end + +endmodule // udi_rom + +//====================================================================== +// EOF udi_rom_sim.v +//====================================================================== diff --git a/hw/application_fpga/core/tk1/toolruns/Makefile b/hw/application_fpga/core/tk1/toolruns/Makefile index 93930cd..91f5cc2 100755 --- a/hw/application_fpga/core/tk1/toolruns/Makefile +++ b/hw/application_fpga/core/tk1/toolruns/Makefile @@ -12,7 +12,7 @@ #=================================================================== TOP_SRC=../rtl/tk1.v -TB_TOP_SRC =../tb/tb_tk1.v ../tb/sb_rgba_drv.v +TB_TOP_SRC =../tb/tb_tk1.v ../tb/sb_rgba_drv.v ../tb/udi_rom_sim.v CC = iverilog CC_FLAGS = -Wall