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https://github.com/tillitis/tillitis-key1.git
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PoC: Remove IRQ30 from fw/irqpoc_with_app
Removing IRQ30 since it us no longer exist
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@ -3,10 +3,11 @@
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* SPDX-License-Identifier: GPL-2.0-only
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*/
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// This firmware copies an app from ROM to app RAM. The app triggers both
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// IRQ_SYSCALL_HI and IRQ_SYSCALL_LO. One after the other. Finally, the
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// app tries to jump firmware. This should result in a trap since the
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// app in executing in app mode.
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// This firmware copies an app from ROM to app RAM. The app triggers IRQ_SYSCALL
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// Checks are done to make sure that firmware RAM can/cannot be read depending
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// on wether we're executing from firmware, syscall or app.
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// Finally the app tries to jump firmware. This should result in a trap since
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// the app is executing in app mode.
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//
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#include "custom_ops.S" // PicoRV32 custom instructions
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@ -25,17 +26,9 @@ _start:
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irq_handler:
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// PicoRV32 stores the IRQ bitmask in x4.
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// If bit 31 is 1: IRQ31 was triggered.
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// If bit 30 is 1: IRQ30 was triggered.
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irq_syscall_lo_check:
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li t4, (1 << 30)
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bne x4, t4, irq_syscall_hi_check
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// Firmware RAM should not be readable from IRQ_SYSCALL_LO
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call check_cannot_read_test_val_from_fw_ram
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j irq_source_check_done
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irq_syscall_hi_check:
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li t4, (1 << 31)
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bne x4, t4, unexpected_irq
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// Firmware RAM should be readable from IRQ_SYSCALL_HI
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// Firmware RAM should be readable from IRQ_SYSCALL
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call check_can_read_test_val_from_fw_ram
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j irq_source_check_done
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unexpected_irq:
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@ -56,9 +49,8 @@ init:
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// Firmware RAM should be readable from firmware mode
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call check_can_read_test_val_from_fw_ram
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// Enable IRQs
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li t0, 0x3fffffff // IRQ31 & IRQ30 mask
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li t0, 0x7fffffff // IRQ31
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picorv32_maskirq_insn(zero, t0) // Enable IRQs
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// Copy app to App RAM
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@ -84,13 +76,8 @@ app_start:
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// Firmware RAM should not be readable from app mode
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call check_cannot_read_test_val_from_fw_ram
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// Raise IRQ_SYSCALL_HI
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li t0, 0xe1000000 // IRQ_SYSCALL_HI (IRQ31) trigger address
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sw zero, 0(t0) // Raise IRQ by writing to interrupt trigger address.
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// Writing any data triggers an interrupt.
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// Raise IRQ_SYSCALL_LO
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li t0, 0xe0000000 // IRQ_SYSCALL_LO (IRQ30) trigger address
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// Raise IRQ_SYSCALL
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li t0, 0xe1000000 // IRQ_SYSCALL (IRQ31) trigger address
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sw zero, 0(t0) // Raise IRQ by writing to interrupt trigger address.
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// Writing any data triggers an interrupt.
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