fpga: Experimental fpga build for uwg30 package

nextpnr-ice40 fails with:

```
Info: Placing PLLs..
ERROR: PLL 'reset_gen_inst.pll_inst' couldn't be placed anywhere, no
suitable BEL found.
    PLL bel 'X12/Y31/pll_3' cannot be used as it conflicts with input
'interface_ch552_cts$sb_io' on pin 'B3'.
```
This commit is contained in:
Mikael Ågren 2025-05-09 14:22:14 +02:00
parent daa7807c0f
commit c98249c3e3
No known key found for this signature in database
GPG key ID: E02DA3D397792C46
5 changed files with 70 additions and 22 deletions

View file

@ -43,10 +43,10 @@ module application_fpga_sim (
input wire touch_event,
input wire app_gpio1,
input wire app_gpio2,
output wire app_gpio3,
output wire app_gpio4,
// input wire app_gpio1,
// input wire app_gpio2,
// output wire app_gpio3,
// output wire app_gpio4,
output wire led_r,
output wire led_g,
@ -377,10 +377,10 @@ module application_fpga_sim (
.led_g(led_g),
.led_b(led_b),
.gpio1(app_gpio1),
.gpio2(app_gpio2),
.gpio3(app_gpio3),
.gpio4(app_gpio4),
.gpio1(),
.gpio2(),
.gpio3(),
.gpio4(),
.syscall(irq31_eoi),