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fpga: Experimental fpga build for uwg30 package

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nextpnr-ice40 fails with:

```
Info: Placing PLLs..
ERROR: PLL 'reset_gen_inst.pll_inst' couldn't be placed anywhere, no
suitable BEL found.
    PLL bel 'X12/Y31/pll_3' cannot be used as it conflicts with input
'interface_ch552_cts$sb_io' on pin 'B3'.
```
This commit is contained in:
Mikael Ågren 2025-05-09 14:22:14 +02:00
parent daa7807c0f
commit c98249c3e3
No known key found for this signature in database
GPG key ID: E02DA3D397792C46
5 changed files with 70 additions and 22 deletions
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4
hw/application_fpga/core/tk1/rtl/tk1.v
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@ -211,9 +211,9 @@ module tk1 #(
.RGB1(led_g),
.RGB2(led_b),
.RGBLEDEN(1'h1),
.RGB0PWM(muxed_led[LED_R_BIT]),
.RGB0PWM(muxed_led[LED_B_BIT]),
.RGB1PWM(muxed_led[LED_G_BIT]),
.RGB2PWM(muxed_led[LED_B_BIT]),
.RGB2PWM(muxed_led[LED_R_BIT]),
.CURREN(1'b1)
);
/* verilator lint_on PINMISSING */